sc 1410 altq/altq_hfsc.c sc2isc(struct service_curve *sc, struct internal_sc *isc)
sc 1412 altq/altq_hfsc.c isc->sm1 = m2sm(sc->m1);
sc 1413 altq/altq_hfsc.c isc->ism1 = m2ism(sc->m1);
sc 1414 altq/altq_hfsc.c isc->dx = d2dx(sc->d);
sc 1416 altq/altq_hfsc.c isc->sm2 = m2sm(sc->m2);
sc 1417 altq/altq_hfsc.c isc->ism2 = m2ism(sc->m2);
sc 171 arch/i386/i386/acpi_machdep.c acpi_attach_machdep(struct acpi_softc *sc)
sc 174 arch/i386/i386/acpi_machdep.c sc->sc_interrupt = isa_intr_establish(NULL, sc->sc_fadt->sci_int,
sc 175 arch/i386/i386/acpi_machdep.c IST_LEVEL, IPL_TTY, acpi_interrupt, sc, "acpi");
sc 177 arch/i386/i386/apm.c int apm_record_event(struct apm_softc *sc, u_int type);
sc 244 arch/i386/i386/apm.c apm_power_print (struct apm_softc *sc, struct apmregs *regs)
sc 247 arch/i386/i386/apm.c sc->batt_life = BATT_LIFE(regs);
sc 250 arch/i386/i386/apm.c sc->sc_dev.dv_xname,
sc 253 arch/i386/i386/apm.c printf("%s: AC ", sc->sc_dev.dv_xname);
sc 343 arch/i386/i386/apm.c apm_resume(struct apm_softc *sc, struct apmregs *regs)
sc 355 arch/i386/i386/apm.c apm_record_event(sc, regs->bx);
sc 366 arch/i386/i386/apm.c apm_record_event(struct apm_softc *sc, u_int type)
sc 368 arch/i386/i386/apm.c if (!apm_error && (sc->sc_flags & SCFLAG_OPEN) == 0) {
sc 375 arch/i386/i386/apm.c KNOTE(&sc->sc_note, APM_EVENT_COMPOSE(type, apm_evindex));
sc 380 arch/i386/i386/apm.c apm_handle_event(struct apm_softc *sc, struct apmregs *regs)
sc 395 arch/i386/i386/apm.c if (apm_record_event(sc, regs->bx)) {
sc 410 arch/i386/i386/apm.c if (apm_record_event(sc, regs->bx)) {
sc 420 arch/i386/i386/apm.c if (apm_record_event(sc, regs->bx)) {
sc 435 arch/i386/i386/apm.c if (apm_record_event(sc, regs->bx)) {
sc 445 arch/i386/i386/apm.c (sc->sc_flags & SCFLAG_PRINT) != SCFLAG_NOPRINT &&
sc 446 arch/i386/i386/apm.c ((sc->sc_flags & SCFLAG_PRINT) != SCFLAG_PCTPRINT ||
sc 447 arch/i386/i386/apm.c sc->batt_life != BATT_LIFE(&nregs)))
sc 448 arch/i386/i386/apm.c apm_power_print(sc, &nregs);
sc 449 arch/i386/i386/apm.c apm_record_event(sc, regs->bx);
sc 453 arch/i386/i386/apm.c apm_resume(sc, regs);
sc 457 arch/i386/i386/apm.c apm_resume(sc, regs);
sc 461 arch/i386/i386/apm.c apm_resume(sc, regs);
sc 466 arch/i386/i386/apm.c apm_record_event(sc, regs->bx);
sc 470 arch/i386/i386/apm.c apm_record_event(sc, regs->bx);
sc 476 arch/i386/i386/apm.c apm_record_event(sc, regs->bx);
sc 508 arch/i386/i386/apm.c apm_periodic_check(struct apm_softc *sc)
sc 524 arch/i386/i386/apm.c if (apm_handle_event(sc, ®s))
sc 734 arch/i386/i386/apm.c apm_disconnect(struct apm_softc *sc)
sc 746 arch/i386/i386/apm.c printf("%s: disconnected\n", sc->sc_dev.dv_xname);
sc 797 arch/i386/i386/apm.c struct apm_softc *sc = (void *)self;
sc 817 arch/i386/i386/apm.c if ((sc->sc_dev.dv_cfdata->cf_flags & APM_VERMASK) &&
sc 819 arch/i386/i386/apm.c (sc->sc_dev.dv_cfdata->cf_flags & APM_VERMASK))
sc 821 arch/i386/i386/apm.c (sc->sc_dev.dv_cfdata->cf_flags & APM_VERMASK);
sc 822 arch/i386/i386/apm.c if (sc->sc_dev.dv_cfdata->cf_flags & APM_NOCLI) {
sc 826 arch/i386/i386/apm.c if (sc->sc_dev.dv_cfdata->cf_flags & APM_BEBATT)
sc 872 arch/i386/i386/apm.c sc->sc_dev.dv_xname));
sc 874 arch/i386/i386/apm.c apm_set_ver(sc);
sc 886 arch/i386/i386/apm.c apm_power_print(sc, ®s);
sc 891 arch/i386/i386/apm.c rw_init(&sc->sc_lock, "apmlk");
sc 899 arch/i386/i386/apm.c apm_periodic_check(sc);
sc 901 arch/i386/i386/apm.c if (apm_periodic_check(sc) == -1) {
sc 902 arch/i386/i386/apm.c apm_disconnect(sc);
sc 905 arch/i386/i386/apm.c kthread_create_deferred(apm_thread_create, sc);
sc 921 arch/i386/i386/apm.c struct apm_softc *sc = v;
sc 925 arch/i386/i386/apm.c apm_disconnect(sc);
sc 931 arch/i386/i386/apm.c if (kthread_create(apm_thread, sc, &sc->sc_thread, "%s",
sc 932 arch/i386/i386/apm.c sc->sc_dev.dv_xname)) {
sc 933 arch/i386/i386/apm.c apm_disconnect(sc);
sc 935 arch/i386/i386/apm.c sc->sc_dev.dv_xname);
sc 943 arch/i386/i386/apm.c struct apm_softc *sc = v;
sc 946 arch/i386/i386/apm.c rw_enter_write(&sc->sc_lock);
sc 947 arch/i386/i386/apm.c (void) apm_periodic_check(sc);
sc 948 arch/i386/i386/apm.c rw_exit_write(&sc->sc_lock);
sc 956 arch/i386/i386/apm.c struct apm_softc *sc;
sc 961 arch/i386/i386/apm.c !(sc = apm_cd.cd_devs[APMUNIT(dev)]))
sc 970 arch/i386/i386/apm.c rw_enter_write(&sc->sc_lock);
sc 977 arch/i386/i386/apm.c if (sc->sc_flags & SCFLAG_OWRITE) {
sc 981 arch/i386/i386/apm.c sc->sc_flags |= SCFLAG_OWRITE;
sc 988 arch/i386/i386/apm.c sc->sc_flags |= SCFLAG_OREAD;
sc 994 arch/i386/i386/apm.c rw_exit_write(&sc->sc_lock);
sc 1001 arch/i386/i386/apm.c struct apm_softc *sc;
sc 1005 arch/i386/i386/apm.c !(sc = apm_cd.cd_devs[APMUNIT(dev)]))
sc 1010 arch/i386/i386/apm.c rw_enter_write(&sc->sc_lock);
sc 1013 arch/i386/i386/apm.c sc->sc_flags &= ~SCFLAG_OWRITE;
sc 1016 arch/i386/i386/apm.c sc->sc_flags &= ~SCFLAG_OREAD;
sc 1019 arch/i386/i386/apm.c rw_exit_write(&sc->sc_lock);
sc 1026 arch/i386/i386/apm.c struct apm_softc *sc;
sc 1032 arch/i386/i386/apm.c !(sc = apm_cd.cd_devs[APMUNIT(dev)]))
sc 1035 arch/i386/i386/apm.c rw_enter_write(&sc->sc_lock);
sc 1058 arch/i386/i386/apm.c sc->sc_flags &= ~SCFLAG_PRINT;
sc 1061 arch/i386/i386/apm.c sc->sc_flags &= ~SCFLAG_PRINT;
sc 1062 arch/i386/i386/apm.c sc->sc_flags |= SCFLAG_NOPRINT;
sc 1065 arch/i386/i386/apm.c sc->sc_flags &= ~SCFLAG_PRINT;
sc 1066 arch/i386/i386/apm.c sc->sc_flags |= SCFLAG_PCTPRINT;
sc 1083 arch/i386/i386/apm.c sc->sc_dev.dv_xname, dev, regs.cx);
sc 1133 arch/i386/i386/apm.c rw_exit_write(&sc->sc_lock);
sc 1140 arch/i386/i386/apm.c struct apm_softc *sc = (struct apm_softc *)kn->kn_hook;
sc 1142 arch/i386/i386/apm.c rw_enter_write(&sc->sc_lock);
sc 1143 arch/i386/i386/apm.c SLIST_REMOVE(&sc->sc_note, kn, knote, kn_selnext);
sc 1144 arch/i386/i386/apm.c rw_exit_write(&sc->sc_lock);
sc 1159 arch/i386/i386/apm.c struct apm_softc *sc;
sc 1163 arch/i386/i386/apm.c !(sc = apm_cd.cd_devs[APMUNIT(dev)]))
sc 1174 arch/i386/i386/apm.c kn->kn_hook = (caddr_t)sc;
sc 1176 arch/i386/i386/apm.c rw_enter_write(&sc->sc_lock);
sc 1177 arch/i386/i386/apm.c SLIST_INSERT_HEAD(&sc->sc_note, kn, kn_selnext);
sc 1178 arch/i386/i386/apm.c rw_exit_write(&sc->sc_lock);
sc 140 arch/i386/i386/bios.c struct bios_softc *sc = (struct bios_softc *)self;
sc 151 arch/i386/i386/bios.c flags = sc->sc_dev.dv_cfdata->cf_flags;
sc 270 arch/i386/i386/bios.c printf("\n%s:", sc->sc_dev.dv_xname);
sc 282 arch/i386/i386/bios.c smbios_info(sc->sc_dev.dv_xname);
sc 361 arch/i386/i386/bios.c str = sc->sc_dev.dv_xname);
sc 539 arch/i386/i386/bios.c struct bios_softc *sc = bios_cd.cd_devs[0];
sc 544 arch/i386/i386/bios.c (void)sc;
sc 552 arch/i386/i386/bios.c struct bios_softc *sc = bios_cd.cd_devs[0];
sc 557 arch/i386/i386/bios.c (void)sc;
sc 565 arch/i386/i386/bios.c struct bios_softc *sc = bios_cd.cd_devs[0];
sc 575 arch/i386/i386/bios.c (void)sc;
sc 222 arch/i386/i386/esm.c struct esm_softc *sc = (struct esm_softc *)self;
sc 229 arch/i386/i386/esm.c sc->sc_iot = eaa->eaa_iot;
sc 230 arch/i386/i386/esm.c TAILQ_INIT(&sc->sc_sensors);
sc 232 arch/i386/i386/esm.c if (bus_space_map(sc->sc_iot, ESM2_BASE_PORT, 8, 0, &sc->sc_ioh) != 0) {
sc 238 arch/i386/i386/esm.c x = EREAD(sc, ESM2_INTMASK_REG);
sc 241 arch/i386/i386/esm.c EWRITE(sc, ESM2_INTMASK_REG, x);
sc 244 arch/i386/i386/esm.c x = EREAD(sc, ESM2_CTRL_REG);
sc 247 arch/i386/i386/esm.c EWRITE(sc, ESM2_CTRL_REG, x);
sc 250 arch/i386/i386/esm.c if (esm_bmc_ready(sc, ESM2_CTRL_REG, ESM2_TC_ECBUSY, 0, 1) != 0) {
sc 252 arch/i386/i386/esm.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, 8);
sc 256 arch/i386/i386/esm.c sc->sc_wdog_period = 0;
sc 257 arch/i386/i386/esm.c wdog_register(sc, esm_watchdog);
sc 260 arch/i386/i386/esm.c strlcpy(sc->sc_sensordev.xname, DEVNAME(sc),
sc 261 arch/i386/i386/esm.c sizeof(sc->sc_sensordev.xname));
sc 263 arch/i386/i386/esm.c if (esm_get_devmap(sc, i, &devmap) != 0)
sc 265 arch/i386/i386/esm.c esm_devmap(sc, &devmap);
sc 268 arch/i386/i386/esm.c if (!TAILQ_EMPTY(&sc->sc_sensors)) {
sc 269 arch/i386/i386/esm.c sensordev_install(&sc->sc_sensordev);
sc 270 arch/i386/i386/esm.c DPRINTF("%s: starting refresh\n", DEVNAME(sc));
sc 271 arch/i386/i386/esm.c sc->sc_nextsensor = TAILQ_FIRST(&sc->sc_sensors);
sc 272 arch/i386/i386/esm.c sc->sc_retries = 0;
sc 273 arch/i386/i386/esm.c timeout_set(&sc->sc_timeout, esm_refresh, sc);
sc 274 arch/i386/i386/esm.c timeout_add(&sc->sc_timeout, hz);
sc 281 arch/i386/i386/esm.c struct esm_softc *sc = arg;
sc 286 arch/i386/i386/esm.c if (sc->sc_wdog_period == period) {
sc 289 arch/i386/i386/esm.c if (sc->sc_step != 0) {
sc 291 arch/i386/i386/esm.c sc->sc_wdog_tickle = 1;
sc 294 arch/i386/i386/esm.c EWRITE(sc, ESM2_CTRL_REG, ESM2_TC_HBDB);
sc 321 arch/i386/i386/esm.c while (sc->sc_step != 0) {
sc 322 arch/i386/i386/esm.c if (tsleep(sc, PUSER | PCATCH, "esm", 0) == EINTR) {
sc 324 arch/i386/i386/esm.c return (sc->sc_wdog_period);
sc 328 arch/i386/i386/esm.c if (esm_cmd(sc, &prop, sizeof(prop), NULL, 0, 1, 0) != 0) {
sc 330 arch/i386/i386/esm.c return (sc->sc_wdog_period);
sc 338 arch/i386/i386/esm.c esm_cmd(sc, &state, sizeof(state), NULL, 0, 1, 0);
sc 342 arch/i386/i386/esm.c sc->sc_wdog_period = period;
sc 349 arch/i386/i386/esm.c struct esm_softc *sc = arg;
sc 350 arch/i386/i386/esm.c struct esm_sensor *es = sc->sc_nextsensor;
sc 376 arch/i386/i386/esm.c if ((step = esm_smb_cmd(sc, &req, &resp, 0, sc->sc_step)) != 0) {
sc 377 arch/i386/i386/esm.c sc->sc_step = step;
sc 378 arch/i386/i386/esm.c if (++sc->sc_retries < 10)
sc 452 arch/i386/i386/esm.c sc->sc_nextsensor = TAILQ_NEXT(es, es_entry);
sc 453 arch/i386/i386/esm.c sc->sc_retries = 0;
sc 454 arch/i386/i386/esm.c sc->sc_step = 0;
sc 456 arch/i386/i386/esm.c if (sc->sc_wdog_tickle) {
sc 461 arch/i386/i386/esm.c EWRITE(sc, ESM2_CTRL_REG, ESM2_TC_HBDB);
sc 462 arch/i386/i386/esm.c sc->sc_wdog_tickle = 0;
sc 464 arch/i386/i386/esm.c wakeup(sc);
sc 466 arch/i386/i386/esm.c if (sc->sc_nextsensor == NULL) {
sc 467 arch/i386/i386/esm.c sc->sc_nextsensor = TAILQ_FIRST(&sc->sc_sensors);
sc 468 arch/i386/i386/esm.c timeout_add(&sc->sc_timeout, hz * 10);
sc 472 arch/i386/i386/esm.c timeout_add(&sc->sc_timeout, hz / 20);
sc 476 arch/i386/i386/esm.c esm_get_devmap(struct esm_softc *sc, int dev, struct esm_devmap *devmap)
sc 492 arch/i386/i386/esm.c if (esm_cmd(sc, &req, sizeof(req), &resp, sizeof(resp), 1, 0) != 0)
sc 687 arch/i386/i386/esm.c esm_devmap(struct esm_softc *sc, struct esm_devmap *devmap)
sc 810 arch/i386/i386/esm.c printf("%s: %s%s%s %d.%d\n", DEVNAME(sc),
sc 814 arch/i386/i386/esm.c esm_make_sensors(sc, devmap, sensor_map, mapsize);
sc 818 arch/i386/i386/esm.c esm_make_sensors(struct esm_softc *sc, struct esm_devmap *devmap,
sc 841 arch/i386/i386/esm.c if (esm_smb_cmd(sc, &req, &resp, 1, 0) != 0)
sc 846 arch/i386/i386/esm.c DEVNAME(sc), devmap->index, i, sensor_map[i].name,
sc 914 arch/i386/i386/esm.c if (esm_thresholds(sc, devmap, es) != 0) {
sc 935 arch/i386/i386/esm.c sensor_attach(&sc->sc_sensordev, &s[j]);
sc 939 arch/i386/i386/esm.c TAILQ_INSERT_TAIL(&sc->sc_sensors, es, es_entry);
sc 944 arch/i386/i386/esm.c esm_thresholds(struct esm_softc *sc, struct esm_devmap *devmap,
sc 960 arch/i386/i386/esm.c if (esm_smb_cmd(sc, &req, &resp, 1, 0) != 0)
sc 965 arch/i386/i386/esm.c DEVNAME(sc), devmap->index, es->es_id, thr->t_lo_fail,
sc 978 arch/i386/i386/esm.c esm_bmc_ready(struct esm_softc *sc, int port, u_int8_t mask, u_int8_t val,
sc 984 arch/i386/i386/esm.c if ((EREAD(sc, port) & mask) == val)
sc 992 arch/i386/i386/esm.c esm_cmd(struct esm_softc *sc, void *cmd, size_t cmdlen, void *resp,
sc 1003 arch/i386/i386/esm.c if (esm_bmc_ready(sc, ESM2_CTRL_REG, ESM2_TC_READY,
sc 1008 arch/i386/i386/esm.c ECTRLWR(sc, ESM2_TC_CLR_WPTR);
sc 1011 arch/i386/i386/esm.c EDATAWR(sc, *tx);
sc 1016 arch/i386/i386/esm.c ECTRLWR(sc, ESM2_TC_H2ECDB);
sc 1020 arch/i386/i386/esm.c if (esm_bmc_ready(sc, ESM2_CTRL_REG, ESM2_TC_EC2HDB,
sc 1025 arch/i386/i386/esm.c ECTRLWR(sc, ESM2_TC_HOSTBUSY);
sc 1026 arch/i386/i386/esm.c ECTRLWR(sc, ESM2_TC_EC2HDB);
sc 1029 arch/i386/i386/esm.c ECTRLWR(sc, ESM2_TC_CLR_RPTR);
sc 1031 arch/i386/i386/esm.c *rx = EDATARD(sc);
sc 1037 arch/i386/i386/esm.c ECTRLWR(sc, ESM2_TC_HOSTBUSY);
sc 1045 arch/i386/i386/esm.c esm_smb_cmd(struct esm_softc *sc, struct esm_smb_req *req,
sc 1052 arch/i386/i386/esm.c err = esm_cmd(sc, req, sizeof(req->hdr) + req->h_txlen, resp,
sc 63 arch/i386/i386/i686_mem.c void i686_mrinit(struct mem_range_softc *sc);
sc 64 arch/i386/i386/i686_mem.c int i686_mrset(struct mem_range_softc *sc,
sc 67 arch/i386/i386/i686_mem.c void i686_mrAPinit(struct mem_range_softc *sc);
sc 78 arch/i386/i386/i686_mem.c struct mem_range_desc *mem_range_match(struct mem_range_softc *sc,
sc 80 arch/i386/i386/i686_mem.c void i686_mrfetch(struct mem_range_softc *sc);
sc 85 arch/i386/i386/i686_mem.c void i686_mrstore(struct mem_range_softc *sc);
sc 87 arch/i386/i386/i686_mem.c struct mem_range_desc *i686_mtrrfixsearch(struct mem_range_softc *sc,
sc 89 arch/i386/i386/i686_mem.c int i686_mrsetlow(struct mem_range_softc *sc,
sc 92 arch/i386/i386/i686_mem.c int i686_mrsetvariable(struct mem_range_softc *sc,
sc 137 arch/i386/i386/i686_mem.c mem_range_match(struct mem_range_softc *sc, struct mem_range_desc *mrd)
sc 142 arch/i386/i386/i686_mem.c for (i = 0, cand = sc->mr_desc; i < sc->mr_ndesc; i++, cand++)
sc 155 arch/i386/i386/i686_mem.c i686_mrfetch(struct mem_range_softc *sc)
sc 161 arch/i386/i386/i686_mem.c mrd = sc->mr_desc;
sc 164 arch/i386/i386/i686_mem.c if (sc->mr_cap & MR686_FIXMTRR) {
sc 208 arch/i386/i386/i686_mem.c for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
sc 264 arch/i386/i386/i686_mem.c i686_mrstore(struct mem_range_softc *sc)
sc 267 arch/i386/i386/i686_mem.c i686_mrstoreone((void *)sc);
sc 279 arch/i386/i386/i686_mem.c struct mem_range_softc *sc = (struct mem_range_softc *)arg;
sc 285 arch/i386/i386/i686_mem.c mrd = sc->mr_desc;
sc 295 arch/i386/i386/i686_mem.c if (sc->mr_cap & MR686_FIXMTRR) {
sc 336 arch/i386/i386/i686_mem.c for (; (mrd - sc->mr_desc) < sc->mr_ndesc; msr += 2, mrd++) {
sc 365 arch/i386/i386/i686_mem.c i686_mtrrfixsearch(struct mem_range_softc *sc, u_int64_t addr)
sc 370 arch/i386/i386/i686_mem.c for (i = 0, mrd = sc->mr_desc; i < (MTRR_N64K + MTRR_N16K + MTRR_N4K); i++, mrd++)
sc 387 arch/i386/i386/i686_mem.c i686_mrsetlow(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
sc 392 arch/i386/i386/i686_mem.c if (((first_md = i686_mtrrfixsearch(sc, mrd->mr_base)) == NULL) ||
sc 393 arch/i386/i386/i686_mem.c ((last_md = i686_mtrrfixsearch(sc, mrd->mr_base + mrd->mr_len - 1)) == NULL))
sc 419 arch/i386/i386/i686_mem.c i686_mrsetvariable(struct mem_range_softc *sc, struct mem_range_desc *mrd,
sc 432 arch/i386/i386/i686_mem.c i = (sc->mr_cap & MR686_FIXMTRR) ? MTRR_N64K + MTRR_N16K + MTRR_N4K : 0;
sc 433 arch/i386/i386/i686_mem.c curr_md = sc->mr_desc + i;
sc 435 arch/i386/i386/i686_mem.c for (; i < sc->mr_ndesc; i++, curr_md++) {
sc 480 arch/i386/i386/i686_mem.c i686_mrset(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg)
sc 495 arch/i386/i386/i686_mem.c if ((sc->mr_cap & MR686_FIXMTRR) &&
sc 497 arch/i386/i386/i686_mem.c if ((error = i686_mrsetlow(sc, mrd, arg)) != 0)
sc 501 arch/i386/i386/i686_mem.c if ((error = i686_mrsetvariable(sc, mrd, arg)) != 0)
sc 507 arch/i386/i386/i686_mem.c if ((targ = mem_range_match(sc, mrd)) == NULL)
sc 522 arch/i386/i386/i686_mem.c i686_mrstore(sc);
sc 523 arch/i386/i386/i686_mem.c i686_mrfetch(sc); /* refetch to see where we're at */
sc 532 arch/i386/i386/i686_mem.c i686_mrinit(struct mem_range_softc *sc)
sc 551 arch/i386/i386/i686_mem.c sc->mr_cap = MR686_FIXMTRR;
sc 555 arch/i386/i386/i686_mem.c sc->mr_desc = malloc(nmdesc * sizeof(struct mem_range_desc),
sc 557 arch/i386/i386/i686_mem.c bzero(sc->mr_desc, nmdesc * sizeof(struct mem_range_desc));
sc 558 arch/i386/i386/i686_mem.c sc->mr_ndesc = nmdesc;
sc 560 arch/i386/i386/i686_mem.c mrd = sc->mr_desc;
sc 563 arch/i386/i386/i686_mem.c if (sc->mr_cap & MR686_FIXMTRR) {
sc 585 arch/i386/i386/i686_mem.c i686_mrfetch(sc);
sc 586 arch/i386/i386/i686_mem.c mrd = sc->mr_desc;
sc 587 arch/i386/i386/i686_mem.c for (i = 0; i < sc->mr_ndesc; i++, mrd++) {
sc 597 arch/i386/i386/i686_mem.c i686_mrAPinit(struct mem_range_softc *sc)
sc 599 arch/i386/i386/i686_mem.c i686_mrstoreone((void *)sc); /* set MTRRs to match BSP */
sc 141 arch/i386/i386/ioapic.c ioapic_read(struct ioapic_softc *sc, int regid)
sc 148 arch/i386/i386/ioapic.c *(sc->sc_reg) = regid;
sc 149 arch/i386/i386/ioapic.c val = *sc->sc_data;
sc 156 arch/i386/i386/ioapic.c ioapic_write(struct ioapic_softc *sc, int regid, int val)
sc 161 arch/i386/i386/ioapic.c *(sc->sc_reg) = regid;
sc 162 arch/i386/i386/ioapic.c *(sc->sc_data) = val;
sc 168 arch/i386/i386/ioapic.c struct ioapic_softc *sc;
sc 180 arch/i386/i386/ioapic.c for (sc = ioapics; sc != NULL; sc = sc->sc_next)
sc 181 arch/i386/i386/ioapic.c if (sc->sc_apicid == apicid)
sc 182 arch/i386/i386/ioapic.c return (sc);
sc 194 arch/i386/i386/ioapic.c struct ioapic_softc *sc;
sc 196 arch/i386/i386/ioapic.c for (sc = ioapics; sc != NULL; sc = sc->sc_next) {
sc 197 arch/i386/i386/ioapic.c if (vec >= sc->sc_apic_vecbase &&
sc 198 arch/i386/i386/ioapic.c vec < (sc->sc_apic_vecbase + sc->sc_apic_sz))
sc 199 arch/i386/i386/ioapic.c return sc;
sc 206 arch/i386/i386/ioapic.c ioapic_add(struct ioapic_softc *sc)
sc 208 arch/i386/i386/ioapic.c sc->sc_next = ioapics;
sc 209 arch/i386/i386/ioapic.c ioapics = sc;
sc 214 arch/i386/i386/ioapic.c ioapic_print_redir(struct ioapic_softc *sc, char *why, int pin)
sc 216 arch/i386/i386/ioapic.c u_int32_t redirlo = ioapic_read(sc, IOAPIC_REDLO(pin));
sc 217 arch/i386/i386/ioapic.c u_int32_t redirhi = ioapic_read(sc, IOAPIC_REDHI(pin));
sc 219 arch/i386/i386/ioapic.c apic_format_redir(sc->sc_dev.dv_xname, why, pin, redirhi, redirlo);
sc 243 arch/i386/i386/ioapic.c ioapic_set_id(struct ioapic_softc *sc) {
sc 246 arch/i386/i386/ioapic.c ioapic_write(sc, IOAPIC_ID,
sc 247 arch/i386/i386/ioapic.c (ioapic_read(sc, IOAPIC_ID) & ~IOAPIC_ID_MASK) |
sc 248 arch/i386/i386/ioapic.c (sc->sc_apicid << IOAPIC_ID_SHIFT));
sc 250 arch/i386/i386/ioapic.c apic_id = (ioapic_read(sc, IOAPIC_ID) & IOAPIC_ID_MASK) >>
sc 253 arch/i386/i386/ioapic.c if (apic_id != sc->sc_apicid)
sc 254 arch/i386/i386/ioapic.c printf(", can't remap to apid %d\n", sc->sc_apicid);
sc 256 arch/i386/i386/ioapic.c printf(", remapped to apid %d\n", sc->sc_apicid);
sc 265 arch/i386/i386/ioapic.c struct ioapic_softc *sc = (struct ioapic_softc *)self;
sc 273 arch/i386/i386/ioapic.c sc->sc_flags = aaa->flags;
sc 274 arch/i386/i386/ioapic.c sc->sc_apicid = aaa->apic_id;
sc 282 arch/i386/i386/ioapic.c sc->sc_reg = (volatile u_int32_t *)(bh + IOAPIC_REG);
sc 283 arch/i386/i386/ioapic.c sc->sc_data = (volatile u_int32_t *)(bh + IOAPIC_DATA);
sc 285 arch/i386/i386/ioapic.c ver_sz = ioapic_read(sc, IOAPIC_VER);
sc 286 arch/i386/i386/ioapic.c sc->sc_apic_vers = (ver_sz & IOAPIC_VER_MASK) >> IOAPIC_VER_SHIFT;
sc 287 arch/i386/i386/ioapic.c sc->sc_apic_sz = (ver_sz & IOAPIC_MAX_MASK) >> IOAPIC_MAX_SHIFT;
sc 288 arch/i386/i386/ioapic.c sc->sc_apic_sz++;
sc 291 arch/i386/i386/ioapic.c sc->sc_apic_vecbase = aaa->apic_vecbase;
sc 297 arch/i386/i386/ioapic.c sc->sc_apic_vecbase = ioapic_vecbase;
sc 298 arch/i386/i386/ioapic.c ioapic_vecbase += sc->sc_apic_sz;
sc 306 arch/i386/i386/ioapic.c printf(", version %x, %d pins\n", sc->sc_apic_vers, sc->sc_apic_sz);
sc 314 arch/i386/i386/ioapic.c ioapic_found = ioapic_find(sc->sc_apicid) != NULL;
sc 315 arch/i386/i386/ioapic.c if (cpu_info[sc->sc_apicid] != NULL || ioapic_found) {
sc 316 arch/i386/i386/ioapic.c printf("%s: duplicate apic id", sc->sc_dev.dv_xname);
sc 328 arch/i386/i386/ioapic.c if (!ioapic_found && !IOAPIC_REMAPPED(sc->sc_apicid))
sc 329 arch/i386/i386/ioapic.c IOAPIC_REMAP(sc->sc_apicid, new_id);
sc 330 arch/i386/i386/ioapic.c sc->sc_apicid = new_id;
sc 331 arch/i386/i386/ioapic.c ioapic_set_id(sc);
sc 333 arch/i386/i386/ioapic.c ioapic_id_map &= ~(1 << sc->sc_apicid);
sc 335 arch/i386/i386/ioapic.c ioapic_add(sc);
sc 337 arch/i386/i386/ioapic.c apic_id = (ioapic_read(sc, IOAPIC_ID) & IOAPIC_ID_MASK) >>
sc 340 arch/i386/i386/ioapic.c sc->sc_pins = malloc(sizeof(struct ioapic_pin) * sc->sc_apic_sz,
sc 343 arch/i386/i386/ioapic.c for (i=0; i<sc->sc_apic_sz; i++) {
sc 344 arch/i386/i386/ioapic.c sc->sc_pins[i].ip_handler = NULL;
sc 345 arch/i386/i386/ioapic.c sc->sc_pins[i].ip_next = NULL;
sc 346 arch/i386/i386/ioapic.c sc->sc_pins[i].ip_map = NULL;
sc 347 arch/i386/i386/ioapic.c sc->sc_pins[i].ip_vector = 0;
sc 348 arch/i386/i386/ioapic.c sc->sc_pins[i].ip_type = 0;
sc 349 arch/i386/i386/ioapic.c sc->sc_pins[i].ip_minlevel = 0xff; /* XXX magic*/
sc 350 arch/i386/i386/ioapic.c sc->sc_pins[i].ip_maxlevel = 0; /* XXX magic */
sc 357 arch/i386/i386/ioapic.c if (apic_id != sc->sc_apicid) {
sc 358 arch/i386/i386/ioapic.c printf("%s: misconfigured as apic %d", sc->sc_dev.dv_xname,
sc 360 arch/i386/i386/ioapic.c ioapic_set_id(sc);
sc 365 arch/i386/i386/ioapic.c for (i=0; i<sc->sc_apic_sz; i++)
sc 366 arch/i386/i386/ioapic.c ioapic_print_redir(sc, "boot", i);
sc 396 arch/i386/i386/ioapic.c apic_set_redir(struct ioapic_softc *sc, int pin)
sc 405 arch/i386/i386/ioapic.c pp = &sc->sc_pins[pin];
sc 445 arch/i386/i386/ioapic.c ioapic_write(sc, IOAPIC_REDLO(pin), IOAPIC_REDLO_MASK);
sc 446 arch/i386/i386/ioapic.c ioapic_write(sc, IOAPIC_REDHI(pin), redhi);
sc 447 arch/i386/i386/ioapic.c ioapic_write(sc, IOAPIC_REDLO(pin), redlo);
sc 449 arch/i386/i386/ioapic.c ioapic_print_redir(sc, "int", pin);
sc 477 arch/i386/i386/ioapic.c apic_vectorset(struct ioapic_softc *sc, int pin, int minlevel, int maxlevel)
sc 479 arch/i386/i386/ioapic.c struct ioapic_pin *pp = &sc->sc_pins[pin];
sc 494 arch/i386/i386/ioapic.c "(%x..%x)\n", sc->sc_dev.dv_xname, pin,
sc 514 arch/i386/i386/ioapic.c sc->sc_dev.dv_xname, pin, maxlevel);
sc 547 arch/i386/i386/ioapic.c apic_set_redir(sc, pin);
sc 558 arch/i386/i386/ioapic.c struct ioapic_softc *sc;
sc 585 arch/i386/i386/ioapic.c for (sc = ioapics; sc != NULL; sc = sc->sc_next) {
sc 587 arch/i386/i386/ioapic.c printf("%s: enabling\n", sc->sc_dev.dv_xname);
sc 589 arch/i386/i386/ioapic.c for (p=0; p<sc->sc_apic_sz; p++) {
sc 593 arch/i386/i386/ioapic.c for (q = sc->sc_pins[p].ip_handler; q != NULL;
sc 600 arch/i386/i386/ioapic.c apic_vectorset(sc, p, minlevel, maxlevel);
sc 631 arch/i386/i386/ioapic.c struct ioapic_softc *sc = ioapic_find(ioapic);
sc 638 arch/i386/i386/ioapic.c if (sc == NULL)
sc 644 arch/i386/i386/ioapic.c if (intr >= sc->sc_apic_sz || type == IST_NONE)
sc 652 arch/i386/i386/ioapic.c pin = &sc->sc_pins[intr];
sc 701 arch/i386/i386/ioapic.c apic_vectorset(sc, intr, minlevel, maxlevel);
sc 745 arch/i386/i386/ioapic.c struct ioapic_softc *sc = ioapic_find(ioapic);
sc 746 arch/i386/i386/ioapic.c struct ioapic_pin *pin = &sc->sc_pins[intr];
sc 750 arch/i386/i386/ioapic.c if (sc == NULL)
sc 753 arch/i386/i386/ioapic.c if (intr >= sc->sc_apic_sz)
sc 782 arch/i386/i386/ioapic.c apic_vectorset(sc, intr, minlevel, maxlevel);
sc 791 arch/i386/i386/ioapic.c struct ioapic_softc *sc;
sc 794 arch/i386/i386/ioapic.c sc = ioapic_find(apicid);
sc 795 arch/i386/i386/ioapic.c if (sc == NULL)
sc 797 arch/i386/i386/ioapic.c printf("%s: stray interrupt %d\n", sc->sc_dev.dv_xname, irqnum);
sc 806 arch/i386/i386/ioapic.c struct ioapic_softc *sc;
sc 810 arch/i386/i386/ioapic.c for (sc = ioapics; sc != NULL; sc = sc->sc_next) {
sc 811 arch/i386/i386/ioapic.c for (p = 0; p < sc->sc_apic_sz; p++) {
sc 812 arch/i386/i386/ioapic.c ip = &sc->sc_pins[p];
sc 814 arch/i386/i386/ioapic.c ioapic_print_redir(sc, "dump", p);
sc 63 arch/i386/i386/k6_mem.c void k6_mrinit(struct mem_range_softc *sc);
sc 96 arch/i386/i386/k6_mem.c k6_mrinit(struct mem_range_softc *sc)
sc 102 arch/i386/i386/k6_mem.c sc->mr_cap = 0;
sc 103 arch/i386/i386/k6_mem.c sc->mr_ndesc = 2; /* XXX (BFF) For now, we only have one msr for this */
sc 104 arch/i386/i386/k6_mem.c sc->mr_desc = malloc(sc->mr_ndesc * sizeof(struct mem_range_desc),
sc 106 arch/i386/i386/k6_mem.c if (sc->mr_desc == NULL)
sc 109 arch/i386/i386/k6_mem.c bzero(sc->mr_desc, sc->mr_ndesc * sizeof(struct mem_range_desc));
sc 112 arch/i386/i386/k6_mem.c for (d = 0; d < sc->mr_ndesc; d++) {
sc 116 arch/i386/i386/k6_mem.c sc->mr_desc[d].mr_base = addr;
sc 117 arch/i386/i386/k6_mem.c sc->mr_desc[d].mr_len = ffs(mask) << 17;
sc 119 arch/i386/i386/k6_mem.c sc->mr_desc[d].mr_flags |= MDF_WRITECOMBINE;
sc 121 arch/i386/i386/k6_mem.c sc->mr_desc[d].mr_flags |= MDF_UNCACHEABLE;
sc 124 arch/i386/i386/k6_mem.c printf("mtrr: K6-family MTRR support (%d registers)\n", sc->mr_ndesc);
sc 128 arch/i386/i386/k6_mem.c k6_mrset(struct mem_range_softc *sc, struct mem_range_desc *desc, int *arg)
sc 139 arch/i386/i386/k6_mem.c for (d = 0; d < sc->mr_ndesc; d++) {
sc 140 arch/i386/i386/k6_mem.c if (!sc->mr_desc[d].mr_len) {
sc 141 arch/i386/i386/k6_mem.c sc->mr_desc[d] = *desc;
sc 144 arch/i386/i386/k6_mem.c if (sc->mr_desc[d].mr_base == desc->mr_base &&
sc 145 arch/i386/i386/k6_mem.c sc->mr_desc[d].mr_len == desc->mr_len)
sc 152 arch/i386/i386/k6_mem.c for (d = 0; d < sc->mr_ndesc; d++)
sc 153 arch/i386/i386/k6_mem.c if (sc->mr_desc[d].mr_base == desc->mr_base &&
sc 154 arch/i386/i386/k6_mem.c sc->mr_desc[d].mr_len == desc->mr_len) {
sc 155 arch/i386/i386/k6_mem.c bzero(&sc->mr_desc[d], sizeof(sc->mr_desc[d]));
sc 1039 arch/i386/i386/mpbios.c struct ioapic_softc *sc = NULL, *sc2;
sc 1085 arch/i386/i386/mpbios.c sc = ioapic_find(id);
sc 1086 arch/i386/i386/mpbios.c if (sc == NULL) {
sc 1096 arch/i386/i386/mpbios.c if (pin >= sc->sc_apic_sz) {
sc 1098 arch/i386/i386/mpbios.c if (sc2 != sc) {
sc 1105 arch/i386/i386/mpbios.c pin -= sc->sc_apic_vecbase;
sc 1108 arch/i386/i386/mpbios.c mpi->ioapic = sc;
sc 1111 arch/i386/i386/mpbios.c altmpi = sc->sc_pins[pin].ip_map;
sc 1118 arch/i386/i386/mpbios.c sc->sc_dev.dv_xname, pin);
sc 1121 arch/i386/i386/mpbios.c sc->sc_pins[pin].ip_map = mpi;
sc 1135 arch/i386/i386/mpbios.c sc ? sc->sc_dev.dv_xname : "local apic", pin,
sc 135 arch/i386/i386/via.c struct viac3_softc *sc = vc3_sc;
sc 141 arch/i386/i386/via.c if (sc == NULL || sidp == NULL || cri == NULL)
sc 144 arch/i386/i386/via.c if (sc->sc_sessions == NULL) {
sc 145 arch/i386/i386/via.c ses = sc->sc_sessions = malloc(sizeof(*ses), M_DEVBUF,
sc 150 arch/i386/i386/via.c sc->sc_nsessions = 1;
sc 152 arch/i386/i386/via.c for (sesn = 0; sesn < sc->sc_nsessions; sesn++) {
sc 153 arch/i386/i386/via.c if (sc->sc_sessions[sesn].ses_used == 0) {
sc 154 arch/i386/i386/via.c ses = &sc->sc_sessions[sesn];
sc 160 arch/i386/i386/via.c sesn = sc->sc_nsessions;
sc 165 arch/i386/i386/via.c bcopy(sc->sc_sessions, ses, sesn * sizeof(*ses));
sc 166 arch/i386/i386/via.c bzero(sc->sc_sessions, sesn * sizeof(*ses));
sc 167 arch/i386/i386/via.c free(sc->sc_sessions, M_DEVBUF);
sc 168 arch/i386/i386/via.c sc->sc_sessions = ses;
sc 169 arch/i386/i386/via.c ses = &sc->sc_sessions[sesn];
sc 170 arch/i386/i386/via.c sc->sc_nsessions++;
sc 292 arch/i386/i386/via.c struct viac3_softc *sc = vc3_sc;
sc 298 arch/i386/i386/via.c if (sc == NULL)
sc 301 arch/i386/i386/via.c if (sesn >= sc->sc_nsessions)
sc 304 arch/i386/i386/via.c if (sc->sc_sessions[sesn].swd) {
sc 305 arch/i386/i386/via.c swd = sc->sc_sessions[sesn].swd;
sc 319 arch/i386/i386/via.c bzero(&sc->sc_sessions[sesn], sizeof(sc->sc_sessions[sesn]));
sc 357 arch/i386/i386/via.c struct viac3_session *ses, struct viac3_softc *sc, caddr_t buf)
sc 367 arch/i386/i386/via.c sc->op_buf = malloc(crd->crd_len, M_DEVBUF, M_NOWAIT);
sc 368 arch/i386/i386/via.c if (sc->op_buf == NULL) {
sc 374 arch/i386/i386/via.c sc->op_cw[0] = ses->ses_cw0 | C3_CRYPT_CWLO_ENCRYPT;
sc 377 arch/i386/i386/via.c bcopy(crd->crd_iv, sc->op_iv, 16);
sc 379 arch/i386/i386/via.c bcopy(ses->ses_iv, sc->op_iv, 16);
sc 384 arch/i386/i386/via.c crd->crd_inject, 16, sc->op_iv);
sc 387 arch/i386/i386/via.c crd->crd_inject, 16, sc->op_iv);
sc 389 arch/i386/i386/via.c bcopy(sc->op_iv,
sc 393 arch/i386/i386/via.c sc->op_cw[0] = ses->ses_cw0 | C3_CRYPT_CWLO_DECRYPT;
sc 396 arch/i386/i386/via.c bcopy(crd->crd_iv, sc->op_iv, 16);
sc 400 arch/i386/i386/via.c crd->crd_inject, 16, sc->op_iv);
sc 403 arch/i386/i386/via.c crd->crd_inject, 16, sc->op_iv);
sc 406 arch/i386/i386/via.c sc->op_iv, 16);
sc 412 arch/i386/i386/via.c crd->crd_skip, crd->crd_len, sc->op_buf);
sc 415 arch/i386/i386/via.c crd->crd_skip, crd->crd_len, sc->op_buf);
sc 417 arch/i386/i386/via.c bcopy(crp->crp_buf + crd->crd_skip, sc->op_buf, crd->crd_len);
sc 419 arch/i386/i386/via.c sc->op_cw[1] = sc->op_cw[2] = sc->op_cw[3] = 0;
sc 420 arch/i386/i386/via.c viac3_cbc(&sc->op_cw, sc->op_buf, sc->op_buf, key,
sc 421 arch/i386/i386/via.c crd->crd_len / 16, sc->op_iv);
sc 425 arch/i386/i386/via.c crd->crd_skip, crd->crd_len, sc->op_buf);
sc 428 arch/i386/i386/via.c crd->crd_skip, crd->crd_len, sc->op_buf);
sc 430 arch/i386/i386/via.c bcopy(sc->op_buf, crp->crp_buf + crd->crd_skip,
sc 448 arch/i386/i386/via.c if (sc->op_buf != NULL) {
sc 449 arch/i386/i386/via.c bzero(sc->op_buf, crd->crd_len);
sc 450 arch/i386/i386/via.c free(sc->op_buf, M_DEVBUF);
sc 451 arch/i386/i386/via.c sc->op_buf = NULL;
sc 460 arch/i386/i386/via.c struct viac3_softc *sc = vc3_sc;
sc 471 arch/i386/i386/via.c if (sesn >= sc->sc_nsessions) {
sc 475 arch/i386/i386/via.c ses = &sc->sc_sessions[sesn];
sc 480 arch/i386/i386/via.c if ((err = viac3_crypto_encdec(crp, crd, ses, sc,
sc 489 arch/i386/isa/ahc_isa.c struct seeprom_config sc;
sc 511 arch/i386/isa/ahc_isa.c (u_int16_t *)&sc,
sc 513 arch/i386/isa/ahc_isa.c sizeof(sc)/2);
sc 518 arch/i386/isa/ahc_isa.c int maxaddr = (sizeof(sc)/2) - 1;
sc 519 arch/i386/isa/ahc_isa.c u_int16_t *scarray = (u_int16_t *)≻
sc 523 arch/i386/isa/ahc_isa.c if (checksum != sc.checksum) {
sc 548 arch/i386/isa/ahc_isa.c target_settings = (sc.device_flags[i] & CFXFER) << 4;
sc 549 arch/i386/isa/ahc_isa.c if (sc.device_flags[i] & CFSYNCH)
sc 551 arch/i386/isa/ahc_isa.c if (sc.device_flags[i] & CFWIDEB)
sc 553 arch/i386/isa/ahc_isa.c if (sc.device_flags[i] & CFDISC)
sc 560 arch/i386/isa/ahc_isa.c ahc->our_id = sc.brtime_id & CFSCSIID;
sc 563 arch/i386/isa/ahc_isa.c if (sc.adapter_control & CFSPARITY)
sc 565 arch/i386/isa/ahc_isa.c if (sc.adapter_control & CFRESETB)
sc 568 arch/i386/isa/ahc_isa.c if (sc.bios_control & CF284XEXTEND)
sc 573 arch/i386/isa/ahc_isa.c if (sc.adapter_control & CF284XSTERM)
sc 146 arch/i386/isa/clock.c mc146818_read(void *sc, u_int reg)
sc 161 arch/i386/isa/clock.c mc146818_write(void *sc, u_int reg, u_int datum)
sc 99 arch/i386/isa/isapnp_machdep.c isapnp_map(struct isapnp_softc *sc)
sc 103 arch/i386/isa/isapnp_machdep.c if (sc->sc_iot != I386_BUS_SPACE_IO)
sc 107 arch/i386/isa/isapnp_machdep.c sc->sc_addr_ioh = ISAPNP_ADDR;
sc 108 arch/i386/isa/isapnp_machdep.c sc->sc_wrdata_ioh = ISAPNP_WRDATA;
sc 116 arch/i386/isa/isapnp_machdep.c isapnp_unmap(struct isapnp_softc *sc)
sc 129 arch/i386/isa/isapnp_machdep.c isapnp_map_readport(struct isapnp_softc *sc)
sc 136 arch/i386/isa/isapnp_machdep.c if (sc->sc_iot != I386_BUS_SPACE_IO)
sc 142 arch/i386/isa/isapnp_machdep.c if ((error = bus_space_map(sc->sc_iot, sc->sc_read_port, 1, 0,
sc 143 arch/i386/isa/isapnp_machdep.c &sc->sc_read_ioh)) != 0)
sc 151 arch/i386/isa/isapnp_machdep.c bus_space_unmap(sc->sc_iot, sc->sc_read_ioh, 1);
sc 160 arch/i386/isa/isapnp_machdep.c isapnp_unmap_readport(struct isapnp_softc *sc)
sc 63 arch/i386/isa/joy.c struct joy_softc *sc;
sc 68 arch/i386/isa/joy.c sc = joy_cd.cd_devs[unit];
sc 69 arch/i386/isa/joy.c if (sc == NULL)
sc 72 arch/i386/isa/joy.c if (sc->timeout[i])
sc 75 arch/i386/isa/joy.c sc->x_off[i] = sc->y_off[i] = 0;
sc 76 arch/i386/isa/joy.c sc->timeout[i] = JOY_TIMEOUT;
sc 85 arch/i386/isa/joy.c struct joy_softc *sc = joy_cd.cd_devs[unit];
sc 87 arch/i386/isa/joy.c sc->timeout[i] = 0;
sc 95 arch/i386/isa/joy.c struct joy_softc *sc = joy_cd.cd_devs[unit];
sc 97 arch/i386/isa/joy.c int port = sc->port;
sc 105 arch/i386/isa/joy.c i = USEC2TICKS(sc->timeout[JOYPART(dev)]);
sc 121 arch/i386/isa/joy.c c.x = x ? sc->x_off[JOYPART(dev)] + TICKS2USEC(t0 - x) : 0x80000000;
sc 122 arch/i386/isa/joy.c c.y = y ? sc->y_off[JOYPART(dev)] + TICKS2USEC(t0 - y) : 0x80000000;
sc 133 arch/i386/isa/joy.c struct joy_softc *sc = joy_cd.cd_devs[unit];
sc 142 arch/i386/isa/joy.c sc->timeout[i] = x;
sc 145 arch/i386/isa/joy.c *(int *) data = sc->timeout[i];
sc 148 arch/i386/isa/joy.c sc->x_off[i] = *(int *) data;
sc 151 arch/i386/isa/joy.c sc->y_off[i] = *(int *) data;
sc 154 arch/i386/isa/joy.c *(int *) data = sc->x_off[i];
sc 157 arch/i386/isa/joy.c *(int *) data = sc->y_off[i];
sc 79 arch/i386/isa/joy_isa.c struct joy_softc *sc = (void *) self;
sc 83 arch/i386/isa/joy_isa.c sc->port = iobase;
sc 84 arch/i386/isa/joy_isa.c sc->timeout[0] = sc->timeout[1] = 0;
sc 68 arch/i386/isa/joy_isapnp.c struct joy_softc *sc = (void *) self;
sc 72 arch/i386/isa/joy_isapnp.c sc->port = iobase;
sc 73 arch/i386/isa/joy_isapnp.c sc->timeout[0] = sc->timeout[1] = 0;
sc 123 arch/i386/isa/lms.c struct lms_softc *sc = (void *)self;
sc 132 arch/i386/isa/lms.c printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
sc 137 arch/i386/isa/lms.c sc->sc_iot = iot;
sc 138 arch/i386/isa/lms.c sc->sc_ioh = ioh;
sc 139 arch/i386/isa/lms.c sc->sc_enabled = 0;
sc 141 arch/i386/isa/lms.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_PULSE,
sc 142 arch/i386/isa/lms.c IPL_TTY, lmsintr, sc, sc->sc_dev.dv_xname);
sc 145 arch/i386/isa/lms.c a.accesscookie = sc;
sc 153 arch/i386/isa/lms.c sc->sc_wsmousedev = config_found(self, &a, wsmousedevprint);
sc 159 arch/i386/isa/lms.c struct lms_softc *sc = v;
sc 161 arch/i386/isa/lms.c if (sc->sc_enabled)
sc 164 arch/i386/isa/lms.c sc->sc_enabled = 1;
sc 165 arch/i386/isa/lms.c sc->oldbuttons = 0;
sc 168 arch/i386/isa/lms.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, LMS_CNTRL, 0);
sc 176 arch/i386/isa/lms.c struct lms_softc *sc = v;
sc 179 arch/i386/isa/lms.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, LMS_CNTRL, 0x10);
sc 181 arch/i386/isa/lms.c sc->sc_enabled = 0;
sc 188 arch/i386/isa/lms.c struct lms_softc *sc = v;
sc 202 arch/i386/isa/lms.c struct lms_softc *sc = arg;
sc 203 arch/i386/isa/lms.c bus_space_tag_t iot = sc->sc_iot;
sc 204 arch/i386/isa/lms.c bus_space_handle_t ioh = sc->sc_ioh;
sc 210 arch/i386/isa/lms.c if (!sc->sc_enabled)
sc 234 arch/i386/isa/lms.c changed = (buttons ^ sc->oldbuttons);
sc 235 arch/i386/isa/lms.c sc->oldbuttons = buttons;
sc 238 arch/i386/isa/lms.c wsmouse_input(sc->sc_wsmousedev,
sc 112 arch/i386/isa/mms.c struct mms_softc *sc = (void *)self;
sc 121 arch/i386/isa/mms.c printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
sc 126 arch/i386/isa/mms.c sc->sc_iot = iot;
sc 127 arch/i386/isa/mms.c sc->sc_ioh = ioh;
sc 128 arch/i386/isa/mms.c sc->sc_enabled = 0;
sc 130 arch/i386/isa/mms.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_PULSE,
sc 131 arch/i386/isa/mms.c IPL_TTY, mmsintr, sc, sc->sc_dev.dv_xname);
sc 134 arch/i386/isa/mms.c a.accesscookie = sc;
sc 142 arch/i386/isa/mms.c sc->sc_wsmousedev = config_found(self, &a, wsmousedevprint);
sc 148 arch/i386/isa/mms.c struct mms_softc *sc = v;
sc 150 arch/i386/isa/mms.c if (sc->sc_enabled)
sc 153 arch/i386/isa/mms.c sc->sc_enabled = 1;
sc 156 arch/i386/isa/mms.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, MMS_ADDR, 0x07);
sc 157 arch/i386/isa/mms.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, MMS_DATA, 0x09);
sc 165 arch/i386/isa/mms.c struct mms_softc *sc = v;
sc 168 arch/i386/isa/mms.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, MMS_ADDR, 0x87);
sc 170 arch/i386/isa/mms.c sc->sc_enabled = 0;
sc 177 arch/i386/isa/mms.c struct mms_softc *sc = v;
sc 191 arch/i386/isa/mms.c struct mms_softc *sc = arg;
sc 192 arch/i386/isa/mms.c bus_space_tag_t iot = sc->sc_iot;
sc 193 arch/i386/isa/mms.c bus_space_handle_t ioh = sc->sc_ioh;
sc 199 arch/i386/isa/mms.c if (!sc->sc_enabled)
sc 232 arch/i386/isa/mms.c wsmouse_input(sc->sc_wsmousedev,
sc 368 arch/i386/isa/npx.c struct npx_softc *sc = (void *)self;
sc 375 arch/i386/isa/npx.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq,
sc 376 arch/i386/isa/npx.c IST_EDGE, IPL_NONE, npxintr, 0, sc->sc_dev.dv_xname);
sc 311 arch/i386/isa/pccom.c struct com_softc *sc = (void *)self;
sc 371 arch/i386/isa/pccom.c SET(sc->sc_hwflags, COM_HW_NOIEN);
sc 376 arch/i386/isa/pccom.c sc->sc_iot = iot;
sc 377 arch/i386/isa/pccom.c sc->sc_ioh = ioh;
sc 378 arch/i386/isa/pccom.c sc->sc_iobase = iobase;
sc 379 arch/i386/isa/pccom.c sc->sc_frequency = COM_FREQ;
sc 381 arch/i386/isa/pccom.c sc->sc_hwflags = 0;
sc 382 arch/i386/isa/pccom.c sc->sc_swflags = 0;
sc 395 arch/i386/isa/pccom.c sc->sc_ih = isa_intr_establish(ia->ia_ic, irq,
sc 396 arch/i386/isa/pccom.c IST_EDGE, IPL_HIGH, kgdbintr, sc,
sc 397 arch/i386/isa/pccom.c sc->sc_dev.dv_xname);
sc 399 arch/i386/isa/pccom.c sc->sc_ih = isa_intr_establish(ia->ia_ic, irq,
sc 400 arch/i386/isa/pccom.c IST_EDGE, IPL_HIGH, comintr, sc,
sc 401 arch/i386/isa/pccom.c sc->sc_dev.dv_xname);
sc 404 arch/i386/isa/pccom.c sc->sc_ih = isa_intr_establish(ia->ia_ic, irq,
sc 405 arch/i386/isa/pccom.c IST_EDGE, IPL_HIGH, comintr, sc,
sc 406 arch/i386/isa/pccom.c sc->sc_dev.dv_xname);
sc 413 arch/i386/isa/pccom.c com_attach_subr(sc);
sc 419 arch/i386/isa/pccom.c struct com_softc *sc = (struct com_softc *)self;
sc 436 arch/i386/isa/pccom.c if (sc->sc_tty) {
sc 437 arch/i386/isa/pccom.c ttyfree(sc->sc_tty);
sc 440 arch/i386/isa/pccom.c timeout_del(&sc->sc_dtr_tmo);
sc 441 arch/i386/isa/pccom.c timeout_del(&sc->sc_diag_tmo);
sc 449 arch/i386/isa/pccom.c struct com_softc *sc = (struct com_softc *)self;
sc 460 arch/i386/isa/pccom.c if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) {
sc 462 arch/i386/isa/pccom.c if (sc->sc_hwflags & COM_HW_CONSOLE) {
sc 468 arch/i386/isa/pccom.c if (sc->disable != NULL && sc->enabled != 0) {
sc 469 arch/i386/isa/pccom.c (*sc->disable)(sc);
sc 470 arch/i386/isa/pccom.c sc->enabled = 0;
sc 482 arch/i386/isa/pccom.c struct com_softc *sc;
sc 491 arch/i386/isa/pccom.c sc = pccom_cd.cd_devs[unit];
sc 492 arch/i386/isa/pccom.c if (!sc)
sc 499 arch/i386/isa/pccom.c if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
sc 504 arch/i386/isa/pccom.c if (!sc->sc_tty) {
sc 505 arch/i386/isa/pccom.c tp = sc->sc_tty = ttymalloc();
sc 507 arch/i386/isa/pccom.c tp = sc->sc_tty;
sc 519 arch/i386/isa/pccom.c if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
sc 523 arch/i386/isa/pccom.c if (ISSET(sc->sc_swflags, COM_SW_CLOCAL))
sc 525 arch/i386/isa/pccom.c if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS))
sc 527 arch/i386/isa/pccom.c if (ISSET(sc->sc_swflags, COM_SW_MDMBUF))
sc 534 arch/i386/isa/pccom.c iot = sc->sc_iot;
sc 535 arch/i386/isa/pccom.c ioh = sc->sc_ioh;
sc 540 arch/i386/isa/pccom.c switch (sc->sc_uarttype) {
sc 557 arch/i386/isa/pccom.c sc->sc_initialize = 1;
sc 561 arch/i386/isa/pccom.c sc->sc_rxput = sc->sc_rxget = sc->sc_tbc = 0;
sc 563 arch/i386/isa/pccom.c if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
sc 567 arch/i386/isa/pccom.c switch (sc->sc_uarttype) {
sc 622 arch/i386/isa/pccom.c if (sc->sc_uarttype == COM_UART_TI16750)
sc 630 arch/i386/isa/pccom.c sc->sc_mcr = MCR_DTR | MCR_RTS;
sc 631 arch/i386/isa/pccom.c if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
sc 632 arch/i386/isa/pccom.c SET(sc->sc_mcr, MCR_IENABLE);
sc 633 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 634 arch/i386/isa/pccom.c sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC;
sc 635 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
sc 637 arch/i386/isa/pccom.c sc->sc_msr = bus_space_read_1(iot, ioh, com_msr);
sc 638 arch/i386/isa/pccom.c if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) || DEVCUA(dev) ||
sc 639 arch/i386/isa/pccom.c ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF))
sc 654 arch/i386/isa/pccom.c sc->sc_cua = 1; /* We go into CUA mode */
sc 658 arch/i386/isa/pccom.c if (sc->sc_cua) {
sc 664 arch/i386/isa/pccom.c while (sc->sc_cua ||
sc 676 arch/i386/isa/pccom.c if (!sc->sc_cua && !ISSET(tp->t_state, TS_ISOPEN))
sc 677 arch/i386/isa/pccom.c compwroff(sc);
sc 692 arch/i386/isa/pccom.c struct com_softc *sc = pccom_cd.cd_devs[unit];
sc 693 arch/i386/isa/pccom.c bus_space_tag_t iot = sc->sc_iot;
sc 694 arch/i386/isa/pccom.c bus_space_handle_t ioh = sc->sc_ioh;
sc 695 arch/i386/isa/pccom.c struct tty *tp = sc->sc_tty;
sc 706 arch/i386/isa/pccom.c CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
sc 707 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 708 arch/i386/isa/pccom.c timeout_add(&sc->sc_dtr_tmo, hz * 2);
sc 711 arch/i386/isa/pccom.c compwroff(sc);
sc 714 arch/i386/isa/pccom.c sc->sc_cua = 0;
sc 719 arch/i386/isa/pccom.c if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
sc 721 arch/i386/isa/pccom.c sc->sc_tty = 0;
sc 728 arch/i386/isa/pccom.c compwroff(struct com_softc *sc)
sc 730 arch/i386/isa/pccom.c bus_space_tag_t iot = sc->sc_iot;
sc 731 arch/i386/isa/pccom.c bus_space_handle_t ioh = sc->sc_ioh;
sc 732 arch/i386/isa/pccom.c struct tty *tp = sc->sc_tty;
sc 734 arch/i386/isa/pccom.c CLR(sc->sc_lcr, LCR_SBREAK);
sc 735 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
sc 738 arch/i386/isa/pccom.c !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) {
sc 740 arch/i386/isa/pccom.c sc->sc_mcr = 0;
sc 741 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 754 arch/i386/isa/pccom.c switch (sc->sc_uarttype) {
sc 774 arch/i386/isa/pccom.c struct com_softc *sc = arg;
sc 776 arch/i386/isa/pccom.c SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
sc 777 arch/i386/isa/pccom.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr);
sc 783 arch/i386/isa/pccom.c struct com_softc *sc = pccom_cd.cd_devs[DEVUNIT(dev)];
sc 784 arch/i386/isa/pccom.c struct tty *tp = sc->sc_tty;
sc 792 arch/i386/isa/pccom.c struct com_softc *sc = pccom_cd.cd_devs[DEVUNIT(dev)];
sc 793 arch/i386/isa/pccom.c struct tty *tp = sc->sc_tty;
sc 801 arch/i386/isa/pccom.c struct com_softc *sc = pccom_cd.cd_devs[DEVUNIT(dev)];
sc 802 arch/i386/isa/pccom.c struct tty *tp = sc->sc_tty;
sc 823 arch/i386/isa/pccom.c struct com_softc *sc = pccom_cd.cd_devs[unit];
sc 824 arch/i386/isa/pccom.c struct tty *tp = sc->sc_tty;
sc 825 arch/i386/isa/pccom.c bus_space_tag_t iot = sc->sc_iot;
sc 826 arch/i386/isa/pccom.c bus_space_handle_t ioh = sc->sc_ioh;
sc 838 arch/i386/isa/pccom.c SET(sc->sc_lcr, LCR_SBREAK);
sc 839 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
sc 842 arch/i386/isa/pccom.c CLR(sc->sc_lcr, LCR_SBREAK);
sc 843 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
sc 846 arch/i386/isa/pccom.c SET(sc->sc_mcr, sc->sc_dtr);
sc 847 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 850 arch/i386/isa/pccom.c CLR(sc->sc_mcr, sc->sc_dtr);
sc 851 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 854 arch/i386/isa/pccom.c CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
sc 856 arch/i386/isa/pccom.c SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
sc 857 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 860 arch/i386/isa/pccom.c CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
sc 861 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 867 arch/i386/isa/pccom.c m = sc->sc_mcr;
sc 872 arch/i386/isa/pccom.c m = sc->sc_msr;
sc 889 arch/i386/isa/pccom.c driverbits = sc->sc_swflags;
sc 911 arch/i386/isa/pccom.c ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
sc 920 arch/i386/isa/pccom.c sc->sc_swflags = driverbits;
sc 933 arch/i386/isa/pccom.c struct com_softc *sc = pccom_cd.cd_devs[DEVUNIT(tp->t_dev)];
sc 934 arch/i386/isa/pccom.c bus_space_tag_t iot = sc->sc_iot;
sc 935 arch/i386/isa/pccom.c bus_space_handle_t ioh = sc->sc_ioh;
sc 936 arch/i386/isa/pccom.c int ospeed = comspeed(sc->sc_frequency, t->c_ospeed);
sc 945 arch/i386/isa/pccom.c lcr = ISSET(sc->sc_lcr, LCR_SBREAK);
sc 969 arch/i386/isa/pccom.c sc->sc_lcr = lcr;
sc 974 arch/i386/isa/pccom.c CLR(sc->sc_mcr, MCR_DTR);
sc 975 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 982 arch/i386/isa/pccom.c if (sc->sc_initialize || (tp->t_ispeed != t->c_ispeed)) {
sc 983 arch/i386/isa/pccom.c sc->sc_initialize = 0;
sc 997 arch/i386/isa/pccom.c ++sc->sc_halt;
sc 1000 arch/i386/isa/pccom.c --sc->sc_halt;
sc 1012 arch/i386/isa/pccom.c SET(sc->sc_mcr, MCR_DTR);
sc 1013 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 1017 arch/i386/isa/pccom.c if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
sc 1021 arch/i386/isa/pccom.c switch (sc->sc_uarttype) {
sc 1049 arch/i386/isa/pccom.c if (sc->sc_uarttype == COM_UART_TI16750)
sc 1057 arch/i386/isa/pccom.c if (ISSET(sc->sc_mcr, MCR_DTR)) {
sc 1058 arch/i386/isa/pccom.c if (!ISSET(sc->sc_mcr, MCR_RTS)) {
sc 1059 arch/i386/isa/pccom.c SET(sc->sc_mcr, MCR_RTS);
sc 1060 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 1063 arch/i386/isa/pccom.c if (ISSET(sc->sc_mcr, MCR_RTS)) {
sc 1064 arch/i386/isa/pccom.c CLR(sc->sc_mcr, MCR_RTS);
sc 1065 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 1068 arch/i386/isa/pccom.c sc->sc_dtr = MCR_DTR | MCR_RTS;
sc 1070 arch/i386/isa/pccom.c sc->sc_dtr = MCR_DTR;
sc 1082 arch/i386/isa/pccom.c if (!ISSET(sc->sc_msr, MSR_DCD) &&
sc 1083 arch/i386/isa/pccom.c !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) &&
sc 1086 arch/i386/isa/pccom.c CLR(sc->sc_mcr, sc->sc_dtr);
sc 1087 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 1102 arch/i386/isa/pccom.c struct com_softc *sc = pccom_cd.cd_devs[DEVUNIT(tp->t_dev)];
sc 1103 arch/i386/isa/pccom.c bus_space_tag_t iot = sc->sc_iot;
sc 1104 arch/i386/isa/pccom.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1115 arch/i386/isa/pccom.c CLR(sc->sc_mcr, (MCR_DTR | MCR_RTS));
sc 1116 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 1119 arch/i386/isa/pccom.c CLR(sc->sc_mcr, MCR_RTS);
sc 1120 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 1126 arch/i386/isa/pccom.c SET(sc->sc_mcr, (MCR_DTR | MCR_RTS));
sc 1127 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 1130 arch/i386/isa/pccom.c SET(sc->sc_mcr, MCR_RTS);
sc 1131 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 1141 arch/i386/isa/pccom.c struct com_softc *sc = pccom_cd.cd_devs[DEVUNIT(tp->t_dev)];
sc 1142 arch/i386/isa/pccom.c bus_space_tag_t iot = sc->sc_iot;
sc 1143 arch/i386/isa/pccom.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1149 arch/i386/isa/pccom.c if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP) || sc->sc_halt > 0)
sc 1151 arch/i386/isa/pccom.c if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, MSR_CTS))
sc 1166 arch/i386/isa/pccom.c if (!ISSET(sc->sc_ier, IER_ETXRDY)) {
sc 1167 arch/i386/isa/pccom.c SET(sc->sc_ier, IER_ETXRDY);
sc 1168 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
sc 1170 arch/i386/isa/pccom.c n = sc->sc_fifolen;
sc 1173 arch/i386/isa/pccom.c sc->sc_tba = tp->t_outq.c_cf;
sc 1175 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_data, *sc->sc_tba++);
sc 1178 arch/i386/isa/pccom.c sc->sc_tbc = count;
sc 1182 arch/i386/isa/pccom.c if (ISSET(sc->sc_ier, IER_ETXRDY)) {
sc 1183 arch/i386/isa/pccom.c CLR(sc->sc_ier, IER_ETXRDY);
sc 1184 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
sc 1198 arch/i386/isa/pccom.c struct com_softc *sc = pccom_cd.cd_devs[DEVUNIT(tp->t_dev)];
sc 1202 arch/i386/isa/pccom.c sc->sc_tbc = 0;
sc 1213 arch/i386/isa/pccom.c struct com_softc *sc = arg;
sc 1218 arch/i386/isa/pccom.c overflows = sc->sc_overflows;
sc 1219 arch/i386/isa/pccom.c sc->sc_overflows = 0;
sc 1224 arch/i386/isa/pccom.c sc->sc_dev.dv_xname, overflows, overflows == 1 ? "" : "s");
sc 1234 arch/i386/isa/pccom.c struct com_softc *sc;
sc 1247 arch/i386/isa/pccom.c sc = pccom_cd.cd_devs[unit];
sc 1248 arch/i386/isa/pccom.c if (sc == NULL)
sc 1250 arch/i386/isa/pccom.c tp = sc->sc_tty;
sc 1261 arch/i386/isa/pccom.c rxget = sc->sc_rxget;
sc 1262 arch/i386/isa/pccom.c while (rxget != sc->sc_rxput) {
sc 1265 arch/i386/isa/pccom.c lsr = sc->sc_rxbuf[rxget];
sc 1268 arch/i386/isa/pccom.c c = sc->sc_rxbuf[rxget];
sc 1270 arch/i386/isa/pccom.c sc->sc_overflows++;
sc 1271 arch/i386/isa/pccom.c if (sc->sc_errors++ == 0)
sc 1272 arch/i386/isa/pccom.c timeout_add(&sc->sc_diag_tmo, 60 * hz);
sc 1284 arch/i386/isa/pccom.c (int)(sc->sc_tba - tp->t_outq.c_cf));
sc 1285 arch/i386/isa/pccom.c if (sc->sc_halt > 0)
sc 1292 arch/i386/isa/pccom.c msr = sc->sc_rxbuf[rxget];
sc 1295 arch/i386/isa/pccom.c !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) {
sc 1299 arch/i386/isa/pccom.c CLR(sc->sc_mcr, sc->sc_dtr);
sc 1300 arch/i386/isa/pccom.c bus_space_write_1(sc->sc_iot,
sc 1301 arch/i386/isa/pccom.c sc->sc_ioh,
sc 1303 arch/i386/isa/pccom.c sc->sc_mcr);
sc 1312 arch/i386/isa/pccom.c sc->sc_rxget = rxget;
sc 1332 arch/i386/isa/pccom.c struct com_softc *sc = arg;
sc 1333 arch/i386/isa/pccom.c bus_space_tag_t iot = sc->sc_iot;
sc 1334 arch/i386/isa/pccom.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1337 arch/i386/isa/pccom.c if (!ISSET(sc->sc_hwflags, COM_HW_KGDB))
sc 1359 arch/i386/isa/pccom.c if (msr != sc->sc_msr) {
sc 1360 arch/i386/isa/pccom.c delta = msr ^ sc->sc_msr;
sc 1361 arch/i386/isa/pccom.c sc->sc_msr = msr;
sc 1363 arch/i386/isa/pccom.c if (!ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) {
sc 1364 arch/i386/isa/pccom.c CLR(sc->sc_mcr, sc->sc_dtr);
sc 1365 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 1378 arch/i386/isa/pccom.c struct com_softc *sc = arg;
sc 1379 arch/i386/isa/pccom.c struct tty *tp = sc->sc_tty;
sc 1380 arch/i386/isa/pccom.c bus_space_tag_t iot = sc->sc_iot;
sc 1381 arch/i386/isa/pccom.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1385 arch/i386/isa/pccom.c if (!sc->sc_tty)
sc 1391 arch/i386/isa/pccom.c rxput = sc->sc_rxput;
sc 1402 arch/i386/isa/pccom.c if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
sc 1411 arch/i386/isa/pccom.c sc->sc_rxbuf[rxput] = lsr;
sc 1413 arch/i386/isa/pccom.c sc->sc_rxbuf[rxput] = c;
sc 1417 arch/i386/isa/pccom.c delta = msr ^ sc->sc_msr;
sc 1419 arch/i386/isa/pccom.c ttytstamp(tp, sc->sc_msr & MSR_CTS, msr & MSR_CTS,
sc 1420 arch/i386/isa/pccom.c sc->sc_msr & MSR_DCD, msr & MSR_DCD);
sc 1424 arch/i386/isa/pccom.c sc->sc_msr = msr;
sc 1432 arch/i386/isa/pccom.c sc->sc_tbc = 0;
sc 1434 arch/i386/isa/pccom.c sc->sc_rxbuf[rxput] = 0;
sc 1436 arch/i386/isa/pccom.c sc->sc_rxbuf[rxput] = msr;
sc 1440 arch/i386/isa/pccom.c if (sc->sc_tbc > 0) {
sc 1443 arch/i386/isa/pccom.c n = sc->sc_fifolen;
sc 1444 arch/i386/isa/pccom.c if (n > sc->sc_tbc)
sc 1445 arch/i386/isa/pccom.c n = sc->sc_tbc;
sc 1447 arch/i386/isa/pccom.c bus_space_write_1(iot, ioh, com_data, *sc->sc_tba++);
sc 1448 arch/i386/isa/pccom.c --sc->sc_tbc;
sc 1452 arch/i386/isa/pccom.c sc->sc_rxbuf[rxput] = lsr;
sc 1456 arch/i386/isa/pccom.c if (sc->sc_rxput != rxput) {
sc 1466 arch/i386/isa/pccom.c cc = rxput - sc->sc_rxget;
sc 1472 arch/i386/isa/pccom.c sc->sc_rxput = rxput;
sc 83 arch/i386/pci/elan520.c #define elansc_wdogctl_reset(sc) elansc_wdogctl(sc, 1, 0)
sc 84 arch/i386/pci/elan520.c #define elansc_wdogctl_write(sc, val) elansc_wdogctl(sc, 0, val)
sc 127 arch/i386/pci/elan520.c struct elansc_softc *sc = (void *) self;
sc 135 arch/i386/pci/elan520.c sc->sc_memt = pa->pa_memt;
sc 136 arch/i386/pci/elan520.c if (bus_space_map(sc->sc_memt, MMCR_BASE_ADDR, NBPG, 0,
sc 137 arch/i386/pci/elan520.c &sc->sc_memh) != 0) {
sc 142 arch/i386/pci/elan520.c rev = bus_space_read_2(sc->sc_memt, sc->sc_memh, MMCR_REVID);
sc 143 arch/i386/pci/elan520.c cpuctl = bus_space_read_1(sc->sc_memt, sc->sc_memh, MMCR_CPUCTL);
sc 144 arch/i386/pci/elan520.c ressta = bus_space_read_1(sc->sc_memt, sc->sc_memh, MMCR_RESSTA);
sc 159 arch/i386/pci/elan520.c sc->sc_dev.dv_xname);
sc 160 arch/i386/pci/elan520.c bus_space_write_1(sc->sc_memt, sc->sc_memh, MMCR_RESSTA, ressta);
sc 163 arch/i386/pci/elan520.c elansc_wdogctl_write(sc, WDTMRCTL_WRST_ENB | WDTMRCTL_EXP_SEL30);
sc 166 arch/i386/pci/elan520.c elansc_wdogctl_reset(sc);
sc 168 arch/i386/pci/elan520.c wdog_register(sc, elansc_wdogctl_cb);
sc 169 arch/i386/pci/elan520.c elansc = sc;
sc 176 arch/i386/pci/elan520.c sc->sc_gpio_pins[pin].pin_num = pin;
sc 177 arch/i386/pci/elan520.c sc->sc_gpio_pins[pin].pin_caps = GPIO_PIN_INPUT |
sc 183 arch/i386/pci/elan520.c data = bus_space_read_2(sc->sc_memt, sc->sc_memh, reg);
sc 185 arch/i386/pci/elan520.c sc->sc_gpio_pins[pin].pin_flags = GPIO_PIN_INPUT;
sc 187 arch/i386/pci/elan520.c sc->sc_gpio_pins[pin].pin_flags = GPIO_PIN_OUTPUT;
sc 188 arch/i386/pci/elan520.c if (elansc_gpio_pin_read(sc, pin) == 0)
sc 189 arch/i386/pci/elan520.c sc->sc_gpio_pins[pin].pin_state = GPIO_PIN_LOW;
sc 191 arch/i386/pci/elan520.c sc->sc_gpio_pins[pin].pin_state = GPIO_PIN_HIGH;
sc 195 arch/i386/pci/elan520.c sc->sc_gpio_gc.gp_cookie = sc;
sc 196 arch/i386/pci/elan520.c sc->sc_gpio_gc.gp_pin_read = elansc_gpio_pin_read;
sc 197 arch/i386/pci/elan520.c sc->sc_gpio_gc.gp_pin_write = elansc_gpio_pin_write;
sc 198 arch/i386/pci/elan520.c sc->sc_gpio_gc.gp_pin_ctl = elansc_gpio_pin_ctl;
sc 201 arch/i386/pci/elan520.c gba.gba_gc = &sc->sc_gpio_gc;
sc 202 arch/i386/pci/elan520.c gba.gba_pins = sc->sc_gpio_pins;
sc 206 arch/i386/pci/elan520.c config_found(&sc->sc_dev, &gba, gpiobus_print);
sc 209 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, GPTMR1CTL,
sc 212 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, GPTMR1CNT, 0);
sc 213 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, GPTMR1MAXCMPA, 0);
sc 215 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, GPTMR2CTL,
sc 217 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, GPTMR2CNT, 0);
sc 218 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, GPTMR2MAXCMPA, 0);
sc 220 arch/i386/pci/elan520.c tmr = bus_space_read_1(sc->sc_memt, sc->sc_memh, SWTMRCFG);
sc 223 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, GPTMR1CTL,
sc 226 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, GPTMR2CTL,
sc 230 arch/i386/pci/elan520.c tc = &sc->sc_tc;
sc 235 arch/i386/pci/elan520.c tc->tc_name = sc->sc_dev.dv_xname;
sc 237 arch/i386/pci/elan520.c tc->tc_priv = sc;
sc 244 arch/i386/pci/elan520.c struct elansc_softc *sc = tc->tc_priv;
sc 248 arch/i386/pci/elan520.c m1 = bus_space_read_2(sc->sc_memt, sc->sc_memh, GPTMR1CNT);
sc 249 arch/i386/pci/elan520.c l = bus_space_read_2(sc->sc_memt, sc->sc_memh, GPTMR2CNT);
sc 250 arch/i386/pci/elan520.c m2 = bus_space_read_2(sc->sc_memt, sc->sc_memh, GPTMR1CNT);
sc 257 arch/i386/pci/elan520.c elansc_wdogctl(struct elansc_softc *sc, int do_reset, uint16_t val)
sc 265 arch/i386/pci/elan520.c echo_mode = bus_space_read_1(sc->sc_memt, sc->sc_memh, MMCR_GPECHO);
sc 266 arch/i386/pci/elan520.c bus_space_write_1(sc->sc_memt, sc->sc_memh, MMCR_GPECHO,
sc 271 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, MMCR_WDTMRCTL,
sc 273 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, MMCR_WDTMRCTL,
sc 277 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, MMCR_WDTMRCTL,
sc 279 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, MMCR_WDTMRCTL,
sc 283 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, MMCR_WDTMRCTL,
sc 288 arch/i386/pci/elan520.c bus_space_write_1(sc->sc_memt, sc->sc_memh, MMCR_GPECHO, echo_mode);
sc 308 arch/i386/pci/elan520.c struct elansc_softc *sc = self;
sc 312 arch/i386/pci/elan520.c elansc_wdogctl_write(sc,
sc 320 arch/i386/pci/elan520.c elansc_wdogctl_write(sc, WDTMRCTL_ENB |
sc 322 arch/i386/pci/elan520.c elansc_wdogctl_reset(sc);
sc 376 arch/i386/pci/elan520.c struct elansc_softc *sc = arg;
sc 382 arch/i386/pci/elan520.c data = bus_space_read_2(sc->sc_memt, sc->sc_memh, reg);
sc 390 arch/i386/pci/elan520.c struct elansc_softc *sc = arg;
sc 396 arch/i386/pci/elan520.c data = bus_space_read_2(sc->sc_memt, sc->sc_memh, reg);
sc 402 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, reg, data);
sc 408 arch/i386/pci/elan520.c struct elansc_softc *sc = arg;
sc 414 arch/i386/pci/elan520.c data = bus_space_read_2(sc->sc_memt, sc->sc_memh, reg);
sc 420 arch/i386/pci/elan520.c bus_space_write_2(sc->sc_memt, sc->sc_memh, reg, data);
sc 91 arch/i386/pci/geodesc.c struct geodesc_softc *sc = (void *) self;
sc 99 arch/i386/pci/geodesc.c sc->sc_iot = pa->pa_iot;
sc 101 arch/i386/pci/geodesc.c bus_space_map(sc->sc_iot, reg, 64, 0, &sc->sc_ioh)) {
sc 105 arch/i386/pci/geodesc.c cba = bus_space_read_2(sc->sc_iot, sc->sc_ioh, GCB_CBA);
sc 108 arch/i386/pci/geodesc.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, 64);
sc 111 arch/i386/pci/geodesc.c sts = bus_space_read_1(sc->sc_iot, sc->sc_ioh, GCB_WDSTS);
sc 112 arch/i386/pci/geodesc.c cnfg = bus_space_read_2(sc->sc_iot, sc->sc_ioh, GCB_WDCNFG);
sc 113 arch/i386/pci/geodesc.c iid = bus_space_read_1(sc->sc_iot, sc->sc_ioh, GCB_IID);
sc 114 arch/i386/pci/geodesc.c rev = bus_space_read_1(sc->sc_iot, sc->sc_ioh, GCB_REV);
sc 120 arch/i386/pci/geodesc.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, GCB_WDTO, 0);
sc 122 arch/i386/pci/geodesc.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, GCB_WDSTS, sts);
sc 125 arch/i386/pci/geodesc.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, GCB_WDCNFG, cnfg);
sc 127 arch/i386/pci/geodesc.c wdog_register(sc, geodesc_wdogctl_cb);
sc 131 arch/i386/pci/geodesc.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, GCB_TSCNFG, TSC_ENABLE);
sc 133 arch/i386/pci/geodesc.c geodesc_timecounter.tc_priv = sc;
sc 145 arch/i386/pci/geodesc.c struct geodesc_softc *sc = self;
sc 149 arch/i386/pci/geodesc.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, GCB_WDTO, period * 64);
sc 158 arch/i386/pci/geodesc.c struct geodesc_softc *sc = tc->tc_priv;
sc 160 arch/i386/pci/geodesc.c return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, GCB_TSC));
sc 226 arch/i386/pci/glxsb.c struct glxsb_softc *sc = (void *) self;
sc 245 arch/i386/pci/glxsb.c PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_iot,
sc 246 arch/i386/pci/glxsb.c &sc->sc_ioh, &membase, &memsize, SB_MEM_SIZE)) {
sc 268 arch/i386/pci/glxsb.c timeout_set(&sc->sc_to, glxsb_rnd, sc);
sc 269 arch/i386/pci/glxsb.c glxsb_rnd(sc);
sc 277 arch/i386/pci/glxsb.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, SB_AES_INT, intr);
sc 279 arch/i386/pci/glxsb.c sc->sc_dmat = pa->pa_dmat;
sc 281 arch/i386/pci/glxsb.c if (glxsb_crypto_setup(sc))
sc 291 arch/i386/pci/glxsb.c struct glxsb_softc *sc = v;
sc 295 arch/i386/pci/glxsb.c status = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SB_RANDOM_NUM_STATUS);
sc 297 arch/i386/pci/glxsb.c value = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SB_RANDOM_NUM);
sc 301 arch/i386/pci/glxsb.c timeout_add(&sc->sc_to, (hz > 100) ? (hz / 100) : 1);
sc 306 arch/i386/pci/glxsb.c glxsb_crypto_setup(struct glxsb_softc *sc)
sc 311 arch/i386/pci/glxsb.c if (glxsb_dma_alloc(sc, GLXSB_MAX_AES_LEN * 2, &sc->sc_dma) != 0)
sc 323 arch/i386/pci/glxsb.c sc->sc_cid = crypto_get_driverid(0);
sc 324 arch/i386/pci/glxsb.c if (sc->sc_cid < 0)
sc 327 arch/i386/pci/glxsb.c crypto_register(sc->sc_cid, algs, glxsb_crypto_newsession,
sc 330 arch/i386/pci/glxsb.c sc->sc_nsessions = 0;
sc 332 arch/i386/pci/glxsb.c glxsb_sc = sc;
sc 340 arch/i386/pci/glxsb.c struct glxsb_softc *sc = glxsb_sc;
sc 347 arch/i386/pci/glxsb.c if (sc == NULL || sidp == NULL || cri == NULL)
sc 350 arch/i386/pci/glxsb.c for (sesn = 0; sesn < sc->sc_nsessions; sesn++) {
sc 351 arch/i386/pci/glxsb.c if (sc->sc_sessions[sesn].ses_used == 0) {
sc 352 arch/i386/pci/glxsb.c ses = &sc->sc_sessions[sesn];
sc 358 arch/i386/pci/glxsb.c sesn = sc->sc_nsessions;
sc 363 arch/i386/pci/glxsb.c bcopy(sc->sc_sessions, ses, sesn * sizeof(*ses));
sc 364 arch/i386/pci/glxsb.c bzero(sc->sc_sessions, sesn * sizeof(*ses));
sc 365 arch/i386/pci/glxsb.c free(sc->sc_sessions, M_DEVBUF);
sc 367 arch/i386/pci/glxsb.c sc->sc_sessions = ses;
sc 368 arch/i386/pci/glxsb.c ses = &sc->sc_sessions[sesn];
sc 369 arch/i386/pci/glxsb.c sc->sc_nsessions++;
sc 469 arch/i386/pci/glxsb.c struct glxsb_softc *sc = glxsb_sc;
sc 475 arch/i386/pci/glxsb.c if (sc == NULL)
sc 478 arch/i386/pci/glxsb.c if (sesn >= sc->sc_nsessions)
sc 480 arch/i386/pci/glxsb.c if (sc->sc_sessions[sesn].ses_swd) {
sc 481 arch/i386/pci/glxsb.c swd = sc->sc_sessions[sesn].ses_swd;
sc 494 arch/i386/pci/glxsb.c bzero(&sc->sc_sessions[sesn], sizeof(sc->sc_sessions[sesn]));
sc 502 arch/i386/pci/glxsb.c glxsb_aes(struct glxsb_softc *sc, uint32_t control, uint32_t psrc,
sc 510 arch/i386/pci/glxsb.c sc->sc_dev.dv_xname, len);
sc 515 arch/i386/pci/glxsb.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, SB_SOURCE_A, psrc);
sc 518 arch/i386/pci/glxsb.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, SB_DEST_A, pdst);
sc 521 arch/i386/pci/glxsb.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, SB_LENGTH_A, len);
sc 525 arch/i386/pci/glxsb.c bus_space_write_region_4(sc->sc_iot, sc->sc_ioh,
sc 531 arch/i386/pci/glxsb.c bus_space_write_region_4(sc->sc_iot, sc->sc_ioh, SB_WKEY, key, 4);
sc 534 arch/i386/pci/glxsb.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, SB_CTL_A,
sc 559 arch/i386/pci/glxsb.c status = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SB_CTL_A);
sc 565 arch/i386/pci/glxsb.c printf("%s: operation failed to complete\n", sc->sc_dev.dv_xname);
sc 584 arch/i386/pci/glxsb.c struct glxsb_session *ses, struct glxsb_softc *sc, caddr_t buf)
sc 607 arch/i386/pci/glxsb.c op_src = sc->sc_dma.dma_vaddr;
sc 608 arch/i386/pci/glxsb.c op_dst = sc->sc_dma.dma_vaddr + xlen;
sc 610 arch/i386/pci/glxsb.c op_psrc = sc->sc_dma.dma_paddr;
sc 611 arch/i386/pci/glxsb.c op_pdst = sc->sc_dma.dma_paddr + xlen;
sc 666 arch/i386/pci/glxsb.c glxsb_dma_pre_op(sc, &sc->sc_dma);
sc 668 arch/i386/pci/glxsb.c glxsb_aes(sc, control, op_psrc, op_pdst, ses->ses_key,
sc 671 arch/i386/pci/glxsb.c glxsb_dma_post_op(sc, &sc->sc_dma);
sc 710 arch/i386/pci/glxsb.c bzero(sc->sc_dma.dma_vaddr, xlen * 2);
sc 719 arch/i386/pci/glxsb.c struct glxsb_softc *sc = glxsb_sc;
sc 738 arch/i386/pci/glxsb.c if (sesn >= sc->sc_nsessions) {
sc 742 arch/i386/pci/glxsb.c ses = &sc->sc_sessions[sesn];
sc 747 arch/i386/pci/glxsb.c if ((err = glxsb_crypto_encdec(crp, crd, ses, sc,
sc 777 arch/i386/pci/glxsb.c glxsb_dma_alloc(struct glxsb_softc *sc, int size, struct glxsb_dma_map *dma)
sc 784 arch/i386/pci/glxsb.c rc = bus_dmamap_create(sc->sc_dmat, size, dma->dma_nsegs, size,
sc 788 arch/i386/pci/glxsb.c sc->sc_dev.dv_xname, size, rc);
sc 793 arch/i386/pci/glxsb.c rc = bus_dmamem_alloc(sc->sc_dmat, size, SB_AES_ALIGN, 0,
sc 797 arch/i386/pci/glxsb.c sc->sc_dev.dv_xname, size, rc);
sc 802 arch/i386/pci/glxsb.c rc = bus_dmamem_map(sc->sc_dmat, &dma->dma_seg, 1, size,
sc 806 arch/i386/pci/glxsb.c sc->sc_dev.dv_xname, size, rc);
sc 811 arch/i386/pci/glxsb.c rc = bus_dmamap_load(sc->sc_dmat, dma->dma_map, dma->dma_vaddr,
sc 815 arch/i386/pci/glxsb.c sc->sc_dev.dv_xname, size, rc);
sc 825 arch/i386/pci/glxsb.c bus_dmamem_unmap(sc->sc_dmat, dma->dma_vaddr, size);
sc 827 arch/i386/pci/glxsb.c bus_dmamem_free(sc->sc_dmat, &dma->dma_seg, dma->dma_nsegs);
sc 829 arch/i386/pci/glxsb.c bus_dmamap_destroy(sc->sc_dmat, dma->dma_map);
sc 835 arch/i386/pci/glxsb.c glxsb_dma_pre_op(struct glxsb_softc *sc, struct glxsb_dma_map *dma)
sc 837 arch/i386/pci/glxsb.c bus_dmamap_sync(sc->sc_dmat, dma->dma_map, 0, dma->dma_size,
sc 842 arch/i386/pci/glxsb.c glxsb_dma_post_op(struct glxsb_softc *sc, struct glxsb_dma_map *dma)
sc 844 arch/i386/pci/glxsb.c bus_dmamap_sync(sc->sc_dmat, dma->dma_map, 0, dma->dma_size,
sc 849 arch/i386/pci/glxsb.c glxsb_dma_free(struct glxsb_softc *sc, struct glxsb_dma_map *dma)
sc 851 arch/i386/pci/glxsb.c bus_dmamap_unload(sc->sc_dmat, dma->dma_map);
sc 852 arch/i386/pci/glxsb.c bus_dmamem_unmap(sc->sc_dmat, dma->dma_vaddr, dma->dma_size);
sc 853 arch/i386/pci/glxsb.c bus_dmamem_free(sc->sc_dmat, &dma->dma_seg, dma->dma_nsegs);
sc 854 arch/i386/pci/glxsb.c bus_dmamap_destroy(sc->sc_dmat, dma->dma_map);
sc 90 arch/i386/pci/gscpcib.c struct gscpcib_softc *sc = (struct gscpcib_softc *)self;
sc 99 arch/i386/pci/gscpcib.c sc->sc_gpio_iot = pa->pa_iot;
sc 101 arch/i386/pci/gscpcib.c bus_space_map(sc->sc_gpio_iot, PCI_MAPREG_IO_ADDR(gpiobase),
sc 102 arch/i386/pci/gscpcib.c GSCGPIO_SIZE, 0, &sc->sc_gpio_ioh)) {
sc 109 arch/i386/pci/gscpcib.c sc->sc_gpio_pins[i].pin_num = i;
sc 110 arch/i386/pci/gscpcib.c sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT |
sc 116 arch/i386/pci/gscpcib.c sc->sc_gpio_pins[i].pin_state = gscpcib_gpio_pin_read(sc, i) ?
sc 121 arch/i386/pci/gscpcib.c sc->sc_gpio_gc.gp_cookie = sc;
sc 122 arch/i386/pci/gscpcib.c sc->sc_gpio_gc.gp_pin_read = gscpcib_gpio_pin_read;
sc 123 arch/i386/pci/gscpcib.c sc->sc_gpio_gc.gp_pin_write = gscpcib_gpio_pin_write;
sc 124 arch/i386/pci/gscpcib.c sc->sc_gpio_gc.gp_pin_ctl = gscpcib_gpio_pin_ctl;
sc 127 arch/i386/pci/gscpcib.c gba.gba_gc = &sc->sc_gpio_gc;
sc 128 arch/i386/pci/gscpcib.c gba.gba_pins = sc->sc_gpio_pins;
sc 141 arch/i386/pci/gscpcib.c config_found(&sc->sc_dev, &gba, gpiobus_print);
sc 147 arch/i386/pci/gscpcib.c gscpcib_gpio_pin_select(struct gscpcib_softc *sc, int pin)
sc 149 arch/i386/pci/gscpcib.c bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GSCGPIO_SEL, pin);
sc 155 arch/i386/pci/gscpcib.c struct gscpcib_softc *sc = arg;
sc 161 arch/i386/pci/gscpcib.c data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg);
sc 169 arch/i386/pci/gscpcib.c struct gscpcib_softc *sc = arg;
sc 175 arch/i386/pci/gscpcib.c data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg);
sc 181 arch/i386/pci/gscpcib.c bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg, data);
sc 187 arch/i386/pci/gscpcib.c struct gscpcib_softc *sc = arg;
sc 190 arch/i386/pci/gscpcib.c gscpcib_gpio_pin_select(sc, pin);
sc 191 arch/i386/pci/gscpcib.c conf = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh,
sc 202 arch/i386/pci/gscpcib.c bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh,
sc 95 arch/i386/pci/gscpm.c struct gscpm_softc *sc = (struct gscpm_softc *)self;
sc 99 arch/i386/pci/gscpm.c sc->sc_pc = pa->pa_pc;
sc 100 arch/i386/pci/gscpm.c sc->sc_tag = pa->pa_tag;
sc 101 arch/i386/pci/gscpm.c sc->sc_iot = pa->pa_iot;
sc 104 arch/i386/pci/gscpm.c csr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);
sc 105 arch/i386/pci/gscpm.c pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG,
sc 109 arch/i386/pci/gscpm.c acpibase = pci_conf_read(sc->sc_pc, sc->sc_tag, GSCPM_ACPIBASE);
sc 111 arch/i386/pci/gscpm.c bus_space_map(sc->sc_iot, PCI_MAPREG_IO_ADDR(acpibase),
sc 112 arch/i386/pci/gscpm.c GSCPM_ACPISIZE, 0, &sc->sc_acpi_ioh)) {
sc 121 arch/i386/pci/gscpm.c gscpm_timecounter.tc_priv = sc;
sc 128 arch/i386/pci/gscpm.c gscpm_cookie = sc;
sc 138 arch/i386/pci/gscpm.c struct gscpm_softc *sc = tc->tc_priv;
sc 140 arch/i386/pci/gscpm.c return (bus_space_read_4(sc->sc_iot, sc->sc_acpi_ioh, GSCPM_PM_TMR));
sc 148 arch/i386/pci/gscpm.c struct gscpm_softc *sc = gscpm_cookie;
sc 152 arch/i386/pci/gscpm.c pctl = bus_space_read_4(sc->sc_iot, sc->sc_acpi_ioh, GSCPM_P_CNT);
sc 166 arch/i386/pci/gscpm.c bus_space_write_4(sc->sc_iot, sc->sc_acpi_ioh, GSCPM_P_CNT, pctl);
sc 124 arch/i386/pci/ichpcib.c struct ichpcib_softc *sc = (struct ichpcib_softc *)self;
sc 136 arch/i386/pci/ichpcib.c sc->sc_pm_iot = pa->pa_iot;
sc 138 arch/i386/pci/ichpcib.c if (bus_space_map(sc->sc_pm_iot, PCI_MAPREG_IO_ADDR(pmbase),
sc 139 arch/i386/pci/ichpcib.c ICH_PMSIZE, 0, &sc->sc_pm_ioh) != 0)
sc 144 arch/i386/pci/ichpcib.c ichpcib_timecounter.tc_priv = sc;
sc 163 arch/i386/pci/ichpcib.c ichss_sc = sc;
sc 236 arch/i386/pci/ichpcib.c struct ichpcib_softc *sc = ichss_sc;
sc 241 arch/i386/pci/ichpcib.c if (sc == NULL) {
sc 248 arch/i386/pci/ichpcib.c state = bus_space_read_1(sc->sc_pm_iot, sc->sc_pm_ioh, ICH_PM_SS_CNTL);
sc 265 arch/i386/pci/ichpcib.c cntl = bus_space_read_1(sc->sc_pm_iot, sc->sc_pm_ioh,
sc 267 arch/i386/pci/ichpcib.c bus_space_write_1(sc->sc_pm_iot, sc->sc_pm_ioh, ICH_PM_CNTL,
sc 271 arch/i386/pci/ichpcib.c bus_space_write_1(sc->sc_pm_iot, sc->sc_pm_ioh, ICH_PM_SS_CNTL,
sc 275 arch/i386/pci/ichpcib.c bus_space_write_1(sc->sc_pm_iot, sc->sc_pm_ioh, ICH_PM_CNTL,
sc 291 arch/i386/pci/ichpcib.c struct ichpcib_softc *sc = tc->tc_priv;
sc 294 arch/i386/pci/ichpcib.c u2 = bus_space_read_4(sc->sc_pm_iot, sc->sc_pm_ioh, ICH_PM_TMR);
sc 295 arch/i386/pci/ichpcib.c u3 = bus_space_read_4(sc->sc_pm_iot, sc->sc_pm_ioh, ICH_PM_TMR);
sc 299 arch/i386/pci/ichpcib.c u3 = bus_space_read_4(sc->sc_pm_iot, sc->sc_pm_ioh,
sc 180 arch/i386/pci/pchb.c struct pchb_softc *sc = (struct pchb_softc *)self;
sc 357 arch/i386/pci/pchb.c sc->bt = pa->pa_memt;
sc 358 arch/i386/pci/pchb.c if (bus_space_map(sc->bt, I82802_IOBASE, I82802_IOSIZE,
sc 359 arch/i386/pci/pchb.c 0, &sc->bh))
sc 363 arch/i386/pci/pchb.c if (!(bus_space_read_1(sc->bt, sc->bh,
sc 368 arch/i386/pci/pchb.c bus_space_write_1(sc->bt, sc->bh, I82802_RNG_HWST,
sc 369 arch/i386/pci/pchb.c bus_space_read_1(sc->bt, sc->bh, I82802_RNG_HWST) |
sc 374 arch/i386/pci/pchb.c !(bus_space_read_1(sc->bt,sc->bh,I82802_RNG_RNGST)&
sc 378 arch/i386/pci/pchb.c if (!(bus_space_read_1(sc->bt, sc->bh,
sc 382 arch/i386/pci/pchb.c r = bus_space_read_1(sc->bt, sc->bh, I82802_RNG_DATA);
sc 387 arch/i386/pci/pchb.c while(!(bus_space_read_1(sc->bt, sc->bh,
sc 390 arch/i386/pci/pchb.c r = bus_space_read_1(sc->bt, sc->bh,
sc 403 arch/i386/pci/pchb.c timeout_set(&sc->sc_tmo, pchb_rnd, sc);
sc 404 arch/i386/pci/pchb.c sc->i = 4;
sc 405 arch/i386/pci/pchb.c pchb_rnd(sc);
sc 433 arch/i386/pci/pchb.c struct pchb_softc *sc = v;
sc 439 arch/i386/pci/pchb.c if ((bus_space_read_1(sc->bt, sc->bh, I82802_RNG_RNGST) &
sc 442 arch/i386/pci/pchb.c sc->ax = (sc->ax << 8) |
sc 443 arch/i386/pci/pchb.c bus_space_read_1(sc->bt, sc->bh, I82802_RNG_DATA);
sc 445 arch/i386/pci/pchb.c if (!sc->i--) {
sc 446 arch/i386/pci/pchb.c sc->i = 4;
sc 447 arch/i386/pci/pchb.c add_true_randomness(sc->ax);
sc 451 arch/i386/pci/pchb.c timeout_add(&sc->sc_tmo, 1);
sc 81 arch/i386/pci/pci_addr_fixup.c pci_addr_fixup(struct pcibios_softc *sc, pci_chipset_tag_t pc, int maxbus)
sc 105 arch/i386/pci/pci_addr_fixup.c sc->extent_mem = extent_create("PCI I/O memory space",
sc 107 arch/i386/pci/pci_addr_fixup.c KASSERT(sc->extent_mem);
sc 108 arch/i386/pci/pci_addr_fixup.c sc->extent_port = extent_create("PCI I/O port space",
sc 110 arch/i386/pci/pci_addr_fixup.c KASSERT(sc->extent_port);
sc 116 arch/i386/pci/pci_addr_fixup.c pci_device_foreach(sc, pc, maxbus, pciaddr_resource_reserve);
sc 117 arch/i386/pci/pci_addr_fixup.c pci_device_foreach(sc, pc, maxbus, pciaddr_resource_reserve_disabled);
sc 118 arch/i386/pci/pci_addr_fixup.c PCIBIOS_PRINTV((verbose_footer, sc->nbogus));
sc 124 arch/i386/pci/pci_addr_fixup.c error = extent_alloc_region(sc->extent_mem, srp->start,
sc 137 arch/i386/pci/pci_addr_fixup.c sc->mem_alloc_start = (start + 0x100000 + 1) & ~(0x100000 - 1);
sc 138 arch/i386/pci/pci_addr_fixup.c sc->port_alloc_start = PCIADDR_ISAPORT_RESERVE;
sc 140 arch/i386/pci/pci_addr_fixup.c "space start: 0x%08x\n", avail_end, sc->mem_alloc_start));
sc 146 arch/i386/pci/pci_addr_fixup.c sc->nbogus = 0;
sc 147 arch/i386/pci/pci_addr_fixup.c pci_device_foreach(sc, pc, maxbus, pciaddr_resource_allocate);
sc 148 arch/i386/pci/pci_addr_fixup.c PCIBIOS_PRINTV((verbose_footer, sc->nbogus));
sc 153 arch/i386/pci/pci_addr_fixup.c pciaddr_resource_reserve(struct pcibios_softc *sc, pci_chipset_tag_t pc,
sc 158 arch/i386/pci/pci_addr_fixup.c pciaddr_resource_manage(sc, pc, tag, pciaddr_do_resource_reserve);
sc 162 arch/i386/pci/pci_addr_fixup.c pciaddr_resource_reserve_disabled(struct pcibios_softc *sc,
sc 167 arch/i386/pci/pci_addr_fixup.c pciaddr_resource_manage(sc, pc, tag,
sc 172 arch/i386/pci/pci_addr_fixup.c pciaddr_resource_allocate(struct pcibios_softc *sc, pci_chipset_tag_t pc,
sc 177 arch/i386/pci/pci_addr_fixup.c pciaddr_resource_manage(sc, pc, tag, pciaddr_do_resource_allocate);
sc 181 arch/i386/pci/pci_addr_fixup.c pciaddr_resource_manage(struct pcibios_softc *sc, pci_chipset_tag_t pc,
sc 195 arch/i386/pci/pci_addr_fixup.c sc->nbogus++;
sc 238 arch/i386/pci/pci_addr_fixup.c ex = sc->extent_mem;
sc 243 arch/i386/pci/pci_addr_fixup.c ex = sc->extent_port;
sc 250 arch/i386/pci/pci_addr_fixup.c error += (*func) (sc, pc, tag, mapreg, ex, type, &addr, size);
sc 258 arch/i386/pci/pci_addr_fixup.c sc->nbogus++;
sc 264 arch/i386/pci/pci_addr_fixup.c pciaddr_do_resource_allocate(struct pcibios_softc *sc, pci_chipset_tag_t pc,
sc 278 arch/i386/pci/pci_addr_fixup.c start = (type == PCI_MAPREG_TYPE_MEM ? sc->mem_alloc_start
sc 279 arch/i386/pci/pci_addr_fixup.c : sc->port_alloc_start);
sc 310 arch/i386/pci/pci_addr_fixup.c pciaddr_do_resource_reserve(struct pcibios_softc *sc, pci_chipset_tag_t pc,
sc 339 arch/i386/pci/pci_addr_fixup.c pciaddr_do_resource_reserve_disabled(struct pcibios_softc *sc,
sc 419 arch/i386/pci/pci_addr_fixup.c struct pcibios_softc *sc;
sc 421 arch/i386/pci/pci_addr_fixup.c sc = (struct pcibios_softc *)device_lookup(&pcibios_cd, 0);
sc 422 arch/i386/pci/pci_addr_fixup.c if (sc && !(pcibios_flags & PCIBIOS_ADDR_FIXUP)) {
sc 424 arch/i386/pci/pci_addr_fixup.c struct extent *ex = mem_port? sc->extent_mem : sc->extent_port;
sc 733 arch/i386/pci/pci_intr_fixup.c pci_intr_fixup(struct pcibios_softc *sc, pci_chipset_tag_t pc,
sc 832 arch/i386/pci/pci_intr_fixup.c printf("%s: no compatible PCI ICU found", sc->sc_dev.dv_xname);
sc 849 arch/i386/pci/pci_intr_fixup.c sc->sc_dev.dv_xname, pirh->router_bus,
sc 173 arch/i386/pci/pcibios.c struct pcibios_softc *sc = (struct pcibios_softc *)self;
sc 176 arch/i386/pci/pcibios.c pcibios_flags = sc->sc_dev.dv_cfdata->cf_flags;
sc 180 arch/i386/pci/pcibios.c &scmech1, &scmech2, &sc->max_bus);
sc 187 arch/i386/pci/pcibios.c "last bus %d\n", sc->sc_dev.dv_xname,
sc 189 arch/i386/pci/pcibios.c scmech1 ? "[1]" : "[x]", scmech2 ? "[2]" : "[x]", sc->max_bus));
sc 210 arch/i386/pci/pcibios.c rv = pci_intr_fixup(sc, NULL, I386_BUS_SPACE_IO);
sc 215 arch/i386/pci/pcibios.c "routing\n", sc->sc_dev.dv_xname);
sc 220 arch/i386/pci/pcibios.c printf("%s: interrupt fixup failed\n", sc->sc_dev.dv_xname);
sc 231 arch/i386/pci/pcibios.c sc->max_bus = pci_bus_fixup(NULL, 0);
sc 233 arch/i386/pci/pcibios.c sc->sc_dev.dv_xname, sc->max_bus);
sc 237 arch/i386/pci/pcibios.c pci_addr_fixup(sc, NULL, sc->max_bus);
sc 241 arch/i386/pci/pcibios.c pcibios_pir_init(struct pcibios_softc *sc)
sc 270 arch/i386/pci/pcibios.c "(%d entries)\n", sc->sc_dev.dv_xname,
sc 276 arch/i386/pci/pcibios.c sc->sc_dev.dv_xname);
sc 281 arch/i386/pci/pcibios.c printf("%s: bad IRQ table size\n", sc->sc_dev.dv_xname);
sc 287 arch/i386/pci/pcibios.c sc->sc_dev.dv_xname);
sc 298 arch/i386/pci/pcibios.c printf("%s: no memory for $PIR\n", sc->sc_dev.dv_xname);
sc 321 arch/i386/pci/pcibios.c printf("%s: no memory for $PIR\n", sc->sc_dev.dv_xname);
sc 324 arch/i386/pci/pcibios.c if (pcibios_get_intr_routing(sc, pcibios_pir_table,
sc 328 arch/i386/pci/pcibios.c sc->sc_dev.dv_xname);
sc 335 arch/i386/pci/pcibios.c sc->sc_dev.dv_xname, pcibios_pir_table_nentries);
sc 338 arch/i386/pci/pcibios.c pcibios_print_exclirq(sc);
sc 345 arch/i386/pci/pcibios.c pcibios_get_status(struct pcibios_softc *sc, u_int32_t *rev_maj,
sc 366 arch/i386/pci/pcibios.c rv = pcibios_return_code(sc, ax, "pcibios_get_status");
sc 388 arch/i386/pci/pcibios.c pcibios_get_intr_routing(struct pcibios_softc *sc,
sc 419 arch/i386/pci/pcibios.c rv = pcibios_return_code(sc, ax, "pcibios_get_intr_routing");
sc 430 arch/i386/pci/pcibios.c pcibios_return_code(struct pcibios_softc *sc, u_int16_t ax, const char *func)
sc 436 arch/i386/pci/pcibios.c if (sc)
sc 437 arch/i386/pci/pcibios.c nam = sc->sc_dev.dv_xname;
sc 484 arch/i386/pci/pcibios.c pcibios_print_exclirq(struct pcibios_softc *sc)
sc 489 arch/i386/pci/pcibios.c printf("%s: PCI Exclusive IRQs:", sc->sc_dev.dv_xname);
sc 518 arch/i386/pci/pcibios.c pci_device_foreach(struct pcibios_softc *sc, pci_chipset_tag_t pc, int maxbus,
sc 563 arch/i386/pci/pcibios.c (*func)(sc, pc, tag);
sc 58 arch/i386/pci/pcic_pci_machdep.c pcic_pci_machdep_pcic_intr_establish(struct pcic_softc *sc, int (*fct)(void *))
sc 61 arch/i386/pci/pcic_pci_machdep.c IST_EDGE, &(sc->irq)))
sc 63 arch/i386/pci/pcic_pci_machdep.c printf("%s: interrupting at irq %d\n", sc->dev.dv_xname, sc->irq);
sc 64 arch/i386/pci/pcic_pci_machdep.c return (isa_intr_establish(NULL, sc->irq, IST_EDGE, IPL_TTY,
sc 65 arch/i386/pci/pcic_pci_machdep.c fct, sc, sc->dev.dv_xname));
sc 142 arch/i386/pci/piixpcib.c piixpcib_int15_gsic_call(struct piixpcib_softc *sc)
sc 153 arch/i386/pci/piixpcib.c sc->sc_sig = regs.eax;
sc 154 arch/i386/pci/piixpcib.c sc->sc_smi_port = regs.ebx & 0xff;
sc 160 arch/i386/pci/piixpcib.c sc->sc_command = (sc->sc_sig & 0xffffff00) | (cmd & 0xff);
sc 162 arch/i386/pci/piixpcib.c sc->sc_smi_data = regs.ecx;
sc 163 arch/i386/pci/piixpcib.c sc->sc_flags = regs.edx;
sc 168 arch/i386/pci/piixpcib.c piixpcib_set_ownership(struct piixpcib_softc *sc)
sc 180 arch/i386/pci/piixpcib.c : "a" (sc->sc_command),
sc 183 arch/i386/pci/piixpcib.c "d" (sc->sc_smi_port),
sc 191 arch/i386/pci/piixpcib.c piixpcib_configure_speedstep(struct piixpcib_softc *sc)
sc 195 arch/i386/pci/piixpcib.c sc->sc_sig = -1;
sc 198 arch/i386/pci/piixpcib.c sc->sc_smi_port = PIIXPCIB_DEFAULT_SMI_PORT;
sc 199 arch/i386/pci/piixpcib.c sc->sc_smi_data = PIIXPCIB_DEFAULT_SMI_DATA;
sc 200 arch/i386/pci/piixpcib.c sc->sc_command = PIIXPCIB_DEFAULT_COMMAND;
sc 201 arch/i386/pci/piixpcib.c sc->sc_flags = 0;
sc 203 arch/i386/pci/piixpcib.c piixpcib_int15_gsic_call(sc);
sc 206 arch/i386/pci/piixpcib.c if (sc->sc_sig != PIIXPCIB_ISGE)
sc 209 arch/i386/pci/piixpcib.c if (piixpcib_set_ownership(sc) != 0) {
sc 215 arch/i386/pci/piixpcib.c rv = piixpcib_getset_state(sc, &sc->state, PIIXPCIB_GETSTATE);
sc 223 arch/i386/pci/piixpcib.c piixpcib_sc = sc;
sc 240 arch/i386/pci/piixpcib.c struct piixpcib_softc *sc = (struct piixpcib_softc *)self;
sc 244 arch/i386/pci/piixpcib.c if (piixpcib_configure_speedstep(sc) == 0) {
sc 258 arch/i386/pci/piixpcib.c piixpcib_getset_state(struct piixpcib_softc *sc, int *state, int function)
sc 268 arch/i386/pci/piixpcib.c sc->sc_dev.dv_xname, __func__, function);
sc 279 arch/i386/pci/piixpcib.c : "a" (sc->sc_command),
sc 282 arch/i386/pci/piixpcib.c "d" (sc->sc_smi_port),
sc 305 arch/i386/pci/piixpcib.c struct piixpcib_softc *sc;
sc 309 arch/i386/pci/piixpcib.c sc = piixpcib_sc;
sc 312 arch/i386/pci/piixpcib.c if (sc == NULL) {
sc 324 arch/i386/pci/piixpcib.c if (sc->state == new_state)
sc 331 arch/i386/pci/piixpcib.c rv = piixpcib_getset_state(sc, &new_state,
sc 342 arch/i386/pci/piixpcib.c sc->sc_dev.dv_xname);
sc 345 arch/i386/pci/piixpcib.c sc->state = new_state;
sc 96 compat/linux/linux_cdrom.c struct ioc_read_subchannel sc;
sc 105 compat/linux/linux_cdrom.c struct linux_cdrom_subchnl sc;
sc 163 compat/linux/linux_cdrom.c error = copyin(SCARG(uap, data), &tmpl.sc, sizeof tmpl.sc);
sc 169 compat/linux/linux_cdrom.c bzero(&tmpb.sc, sizeof tmpb.sc);
sc 170 compat/linux/linux_cdrom.c tmpb.sc.data_format = CD_CURRENT_POSITION;
sc 171 compat/linux/linux_cdrom.c tmpb.sc.address_format = (tmpl.sc.cdsc_format == LINUX_CDROM_MSF)
sc 173 compat/linux/linux_cdrom.c tmpb.sc.data_len = sizeof(struct cd_sub_channel_info);
sc 174 compat/linux/linux_cdrom.c tmpb.sc.data = stackgap_alloc(&sg, tmpb.sc.data_len);
sc 177 compat/linux/linux_cdrom.c (caddr_t)&tmpb.sc, p);
sc 180 compat/linux/linux_cdrom.c if ((error = copyin(tmpb.sc.data, &data.scinfo, sizeof data.scinfo)))
sc 183 compat/linux/linux_cdrom.c tmpl.sc.cdsc_audiostatus = data.scinfo.header.audio_status;
sc 184 compat/linux/linux_cdrom.c tmpl.sc.cdsc_adr = data.scinfo.what.position.addr_type;
sc 185 compat/linux/linux_cdrom.c tmpl.sc.cdsc_ctrl = data.scinfo.what.position.control;
sc 186 compat/linux/linux_cdrom.c tmpl.sc.cdsc_trk = data.scinfo.what.position.track_number;
sc 187 compat/linux/linux_cdrom.c tmpl.sc.cdsc_ind = data.scinfo.what.position.index_number;
sc 189 compat/linux/linux_cdrom.c &tmpl.sc.cdsc_absaddr,
sc 190 compat/linux/linux_cdrom.c tmpb.sc.address_format);
sc 192 compat/linux/linux_cdrom.c &tmpl.sc.cdsc_reladdr,
sc 193 compat/linux/linux_cdrom.c tmpb.sc.address_format);
sc 195 compat/linux/linux_cdrom.c error = copyout(&tmpl, SCARG(uap, data), sizeof tmpl.sc);
sc 151 compat/svr4/svr4_sockio.c struct svr4_ifconf sc;
sc 153 compat/svr4/svr4_sockio.c if ((error = copyin(data, &sc, sizeof(sc))) != 0)
sc 158 compat/svr4/svr4_sockio.c sc.svr4_ifc_len));
sc 161 compat/svr4/svr4_sockio.c (caddr_t) &sc, p)) != 0)
sc 307 compat/svr4/svr4_stream.c sockaddr_to_netaddr_in(sc, sain)
sc 308 compat/svr4/svr4_stream.c struct svr4_strmcmd *sc;
sc 312 compat/svr4/svr4_stream.c na = SVR4_ADDROF(sc);
sc 323 compat/svr4/svr4_stream.c sockaddr_to_netaddr_un(sc, saun)
sc 324 compat/svr4/svr4_stream.c struct svr4_strmcmd *sc;
sc 328 compat/svr4/svr4_stream.c char *dst, *edst = ((char *) sc) + sc->offs + sizeof(na->family) + 1 -
sc 329 compat/svr4/svr4_stream.c sizeof(*sc);
sc 332 compat/svr4/svr4_stream.c na = SVR4_ADDROF(sc);
sc 342 compat/svr4/svr4_stream.c netaddr_to_sockaddr_in(sain, sc)
sc 344 compat/svr4/svr4_stream.c const struct svr4_strmcmd *sc;
sc 349 compat/svr4/svr4_stream.c na = SVR4_ADDROF(sc);
sc 361 compat/svr4/svr4_stream.c netaddr_to_sockaddr_un(saun, sc)
sc 363 compat/svr4/svr4_stream.c const struct svr4_strmcmd *sc;
sc 369 compat/svr4/svr4_stream.c na = SVR4_ADDROF(sc);
sc 887 compat/svr4/svr4_stream.c struct svr4_strmcmd sc;
sc 895 compat/svr4/svr4_stream.c sc.offs = 0x10;
sc 987 compat/svr4/svr4_stream.c sockaddr_to_netaddr_in(&sc, &sain);
sc 992 compat/svr4/svr4_stream.c sockaddr_to_netaddr_un(&sc, &saun);
sc 1000 compat/svr4/svr4_stream.c if ((error = copyout(SVR4_ADDROF(&sc), skb.buf, sasize)) != 0) {
sc 1418 compat/svr4/svr4_stream.c struct svr4_strmcmd sc;
sc 1459 compat/svr4/svr4_stream.c if (ctl.len > sizeof(sc)) {
sc 1466 compat/svr4/svr4_stream.c if ((error = copyin(ctl.buf, &sc, ctl.len)) != 0)
sc 1471 compat/svr4/svr4_stream.c if (sc.len != sizeof(sain)) {
sc 1472 compat/svr4/svr4_stream.c DPRINTF(("putmsg: Invalid inet length %ld\n", sc.len));
sc 1476 compat/svr4/svr4_stream.c netaddr_to_sockaddr_in(&sain, &sc);
sc 1491 compat/svr4/svr4_stream.c dev_t *dev = SVR4_ADDROF(&sc);
sc 1497 compat/svr4/svr4_stream.c netaddr_to_sockaddr_un(skp, &sc);
sc 1516 compat/svr4/svr4_stream.c switch (st->s_cmd = sc.cmd) {
sc 1549 compat/svr4/svr4_stream.c DPRINTF(("putmsg: Unimplemented command %lx\n", sc.cmd));
sc 1572 compat/svr4/svr4_stream.c struct svr4_strmcmd sc;
sc 1585 compat/svr4/svr4_stream.c bzero(&sc, sizeof(sc));
sc 1662 compat/svr4/svr4_stream.c sc.cmd = SVR4_TI_OK_REPLY;
sc 1663 compat/svr4/svr4_stream.c sc.len = 0;
sc 1668 compat/svr4/svr4_stream.c st->s_cmd = sc.cmd;
sc 1690 compat/svr4/svr4_stream.c sc.cmd = SVR4_TI_CONNECT_REPLY;
sc 1691 compat/svr4/svr4_stream.c sc.pad[0] = 0x4;
sc 1692 compat/svr4/svr4_stream.c sc.offs = 0x18;
sc 1693 compat/svr4/svr4_stream.c sc.pad[1] = 0x14;
sc 1694 compat/svr4/svr4_stream.c sc.pad[2] = 0x04000402;
sc 1698 compat/svr4/svr4_stream.c sc.len = sasize;
sc 1699 compat/svr4/svr4_stream.c sockaddr_to_netaddr_in(&sc, &sain);
sc 1703 compat/svr4/svr4_stream.c sc.len = sasize + 4;
sc 1704 compat/svr4/svr4_stream.c sockaddr_to_netaddr_un(&sc, &saun);
sc 1715 compat/svr4/svr4_stream.c st->s_cmd = sc.cmd;
sc 1724 compat/svr4/svr4_stream.c sc.cmd = SVR4_TI_OK_REPLY;
sc 1725 compat/svr4/svr4_stream.c sc.len = 1;
sc 1754 compat/svr4/svr4_stream.c sc.cmd = SVR4_TI_ACCEPT_REPLY;
sc 1755 compat/svr4/svr4_stream.c sc.len = sasize;
sc 1756 compat/svr4/svr4_stream.c sc.offs = 0x18;
sc 1757 compat/svr4/svr4_stream.c sc.pad[0] = 0x0;
sc 1758 compat/svr4/svr4_stream.c sc.pad[1] = 0x28;
sc 1759 compat/svr4/svr4_stream.c sc.pad[2] = 0x3;
sc 1763 compat/svr4/svr4_stream.c sc.pad[1] = 0x28;
sc 1764 compat/svr4/svr4_stream.c sockaddr_to_netaddr_in(&sc, &sain);
sc 1766 compat/svr4/svr4_stream.c sc.len = sasize;
sc 1770 compat/svr4/svr4_stream.c sc.pad[1] = 0x00010000;
sc 1771 compat/svr4/svr4_stream.c sc.pad[2] = 0xf6bcdaa0; /* I don't know what that is */
sc 1772 compat/svr4/svr4_stream.c sc.pad[3] = 0x00010000;
sc 1774 compat/svr4/svr4_stream.c sc.len = sasize + 4;
sc 1793 compat/svr4/svr4_stream.c if (ctl.len > sizeof(sc))
sc 1794 compat/svr4/svr4_stream.c ctl.len = sizeof(sc);
sc 1796 compat/svr4/svr4_stream.c if ((error = copyin(ctl.buf, &sc, ctl.len)) != 0)
sc 1801 compat/svr4/svr4_stream.c sockaddr_to_netaddr_in(&sc, &sain);
sc 1805 compat/svr4/svr4_stream.c sockaddr_to_netaddr_un(&sc, &saun);
sc 1832 compat/svr4/svr4_stream.c sc.cmd = SVR4_TI_RECVFROM_REPLY;
sc 1836 compat/svr4/svr4_stream.c sc.len = sasize;
sc 1837 compat/svr4/svr4_stream.c sockaddr_to_netaddr_in(&sc, &sain);
sc 1841 compat/svr4/svr4_stream.c sc.len = sasize + 4;
sc 1842 compat/svr4/svr4_stream.c sockaddr_to_netaddr_un(&sc, &saun);
sc 1852 compat/svr4/svr4_stream.c st->s_cmd = sc.cmd;
sc 1856 compat/svr4/svr4_stream.c st->s_cmd = sc.cmd;
sc 1864 compat/svr4/svr4_stream.c if ((error = copyout(&sc, ctl.buf, ctl.len)) != 0)
sc 147 compat/svr4/svr4_stropts.h #define SVR4_ADDROF(sc) (void *) (((char *) (sc)) + (sc)->offs)
sc 148 compat/svr4/svr4_stropts.h #define SVR4_C_ADDROF(sc) (const void *) (((const char *) (sc)) + (sc)->offs)
sc 327 ddb/db_sym.c char c, sc;
sc 343 ddb/db_sym.c if ((sc = *p++) == 0)
sc 345 ddb/db_sym.c } while (sc != c);
sc 86 dev/acpi/acpi.c #define ACPI_LOCK(sc)
sc 87 dev/acpi/acpi.c #define ACPI_UNLOCK(sc)
sc 120 dev/acpi/acpi.c acpi_delay(struct acpi_softc *sc, int64_t uSecs)
sc 127 dev/acpi/acpi.c acpi_gasio(struct acpi_softc *sc, int iodir, int iospace, uint64_t address,
sc 156 dev/acpi/acpi.c if (acpi_bus_space_map(sc->sc_iot, ioaddr, len, 0, &ioh) != 0) {
sc 165 dev/acpi/acpi.c sc->sc_iot, ioh, reg);
sc 171 dev/acpi/acpi.c sc->sc_iot, ioh, reg);
sc 177 dev/acpi/acpi.c sc->sc_iot, ioh, reg);
sc 183 dev/acpi/acpi.c bus_space_write_1(sc->sc_iot, ioh, reg,
sc 189 dev/acpi/acpi.c bus_space_write_2(sc->sc_iot, ioh, reg,
sc 195 dev/acpi/acpi.c bus_space_write_4(sc->sc_iot, ioh, reg,
sc 209 dev/acpi/acpi.c acpi_bus_space_unmap(sc->sc_iot, ioh, len, &ioaddr);
sc 240 dev/acpi/acpi.c if (sc->sc_ec == NULL)
sc 244 dev/acpi/acpi.c acpiec_read(sc->sc_ec, (u_int8_t)address, len, buffer);
sc 246 dev/acpi/acpi.c acpiec_write(sc->sc_ec, (u_int8_t)address, len, buffer);
sc 256 dev/acpi/acpi.c struct acpi_softc *sc = (struct acpi_softc *)arg;
sc 268 dev/acpi/acpi.c if (aml_evalname(sc, node, "_STA", 0, NULL, &res))
sc 272 dev/acpi/acpi.c aml_evalnode(sc, node, 0, NULL, NULL);
sc 279 dev/acpi/acpi.c struct acpi_softc *sc = (struct acpi_softc *)arg;
sc 287 dev/acpi/acpi.c aaa.aaa_iot = sc->sc_iot;
sc 288 dev/acpi/acpi.c aaa.aaa_memt = sc->sc_memt;
sc 318 dev/acpi/acpi.c struct acpi_softc *sc = arg;
sc 324 dev/acpi/acpi.c aaa.aaa_iot = sc->sc_iot;
sc 325 dev/acpi/acpi.c aaa.aaa_memt = sc->sc_memt;
sc 347 dev/acpi/acpi.c struct acpi_softc *sc = (struct acpi_softc *)self;
sc 358 dev/acpi/acpi.c sc->sc_iot = aaa->aaa_iot;
sc 359 dev/acpi/acpi.c sc->sc_memt = aaa->aaa_memt;
sc 370 dev/acpi/acpi.c SIMPLEQ_INIT(&sc->sc_tables);
sc 372 dev/acpi/acpi.c sc->sc_fadt = NULL;
sc 373 dev/acpi/acpi.c sc->sc_facs = NULL;
sc 374 dev/acpi/acpi.c sc->sc_powerbtn = 0;
sc 375 dev/acpi/acpi.c sc->sc_sleepbtn = 0;
sc 377 dev/acpi/acpi.c sc->sc_note = malloc(sizeof(struct klist), M_DEVBUF, M_NOWAIT);
sc 378 dev/acpi/acpi.c if (sc->sc_note == NULL) {
sc 383 dev/acpi/acpi.c memset(sc->sc_note, 0, sizeof(struct klist));
sc 385 dev/acpi/acpi.c if (acpi_loadtables(sc, rsdp)) {
sc 396 dev/acpi/acpi.c SIMPLEQ_FOREACH(entry, &sc->sc_tables, q_next) {
sc 399 dev/acpi/acpi.c sc->sc_fadt = entry->q_table;
sc 403 dev/acpi/acpi.c if (sc->sc_fadt == NULL) {
sc 412 dev/acpi/acpi.c if (!sc->sc_fadt->smi_cmd ||
sc 413 dev/acpi/acpi.c (!sc->sc_fadt->acpi_enable && !sc->sc_fadt->acpi_disable)) {
sc 431 dev/acpi/acpi.c if (sc->sc_fadt->hdr_revision < 3 || sc->sc_fadt->x_dsdt == 0)
sc 432 dev/acpi/acpi.c acpi_load_dsdt(sc->sc_fadt->dsdt, &entry);
sc 434 dev/acpi/acpi.c acpi_load_dsdt(sc->sc_fadt->x_dsdt, &entry);
sc 438 dev/acpi/acpi.c SIMPLEQ_INSERT_HEAD(&sc->sc_tables, entry, q_next);
sc 441 dev/acpi/acpi.c acpi_parse_aml(sc, p_dsdt->aml, p_dsdt->hdr_length -
sc 445 dev/acpi/acpi.c SIMPLEQ_FOREACH(entry, &sc->sc_tables, q_next) {
sc 449 dev/acpi/acpi.c acpi_parse_aml(sc, p_dsdt->aml, p_dsdt->hdr_length -
sc 462 dev/acpi/acpi.c acpi_init_states(sc);
sc 465 dev/acpi/acpi.c acpi_init_pm(sc);
sc 470 dev/acpi/acpi.c if (sc->sc_fadt->hdr_revision < 3 || sc->sc_fadt->x_firmware_ctl == 0)
sc 471 dev/acpi/acpi.c facspa = sc->sc_fadt->firmware_ctl;
sc 473 dev/acpi/acpi.c facspa = sc->sc_fadt->x_firmware_ctl;
sc 478 dev/acpi/acpi.c sc->sc_facs = (struct acpi_facs *)handle.va;
sc 481 dev/acpi/acpi.c acpi_map_pmregs(sc);
sc 484 dev/acpi/acpi.c acpi_init_gpes(sc);
sc 487 dev/acpi/acpi.c timeout_set(&sc->sc_dev_timeout, acpi_poll, sc);
sc 502 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_SMICMD, 0, sc->sc_fadt->acpi_enable);
sc 509 dev/acpi/acpi.c } while (!(acpi_read_pmreg(sc, ACPIREG_PM1_CNT, 0) & ACPI_PM1_SCI_EN));
sc 514 dev/acpi/acpi.c printf("%s: tables ", DEVNAME(sc));
sc 515 dev/acpi/acpi.c SIMPLEQ_FOREACH(entry, &sc->sc_tables, q_next) {
sc 529 dev/acpi/acpi.c aaa.aaa_iot = sc->sc_iot;
sc 530 dev/acpi/acpi.c aaa.aaa_memt = sc->sc_memt;
sc 532 dev/acpi/acpi.c aaa.aaa_pcit = sc->sc_pcit;
sc 533 dev/acpi/acpi.c aaa.aaa_smbust = sc->sc_smbust;
sc 542 dev/acpi/acpi.c SIMPLEQ_FOREACH(entry, &sc->sc_tables, q_next) {
sc 546 dev/acpi/acpi.c aaa.aaa_iot = sc->sc_iot;
sc 547 dev/acpi/acpi.c aaa.aaa_memt = sc->sc_memt;
sc 549 dev/acpi/acpi.c aaa.aaa_pcit = sc->sc_pcit;
sc 550 dev/acpi/acpi.c aaa.aaa_smbust = sc->sc_smbust;
sc 556 dev/acpi/acpi.c acpi_softc = sc;
sc 559 dev/acpi/acpi.c aml_find_node(aml_root.child, "_INI", acpi_inidev, sc);
sc 562 dev/acpi/acpi.c aml_find_node(aml_root.child, "_PRT", acpi_foundprt, sc);
sc 566 dev/acpi/acpi.c aml_find_node(aml_root.child, "_HID", acpi_foundec, sc);
sc 568 dev/acpi/acpi.c aml_walknodes(&aml_root, AML_WALK_PRE, acpi_add_device, sc);
sc 571 dev/acpi/acpi.c aml_find_node(aml_root.child, "_HID", acpi_foundhid, sc);
sc 574 dev/acpi/acpi.c aml_find_node(aml_root.child, "_DCK", acpi_founddock, sc);
sc 577 dev/acpi/acpi.c SLIST_INIT(&sc->sc_ac);
sc 578 dev/acpi/acpi.c SLIST_INIT(&sc->sc_bat);
sc 584 dev/acpi/acpi.c SLIST_INSERT_HEAD(&sc->sc_ac, ac, aac_link);
sc 591 dev/acpi/acpi.c SLIST_INSERT_HEAD(&sc->sc_bat, bat, aba_link);
sc 596 dev/acpi/acpi.c sc->sc_thread = malloc(sizeof(struct acpi_thread), M_DEVBUF, M_WAITOK);
sc 597 dev/acpi/acpi.c sc->sc_thread->sc = sc;
sc 598 dev/acpi/acpi.c sc->sc_thread->running = 1;
sc 600 dev/acpi/acpi.c kthread_create_deferred(acpi_create_thread, sc);
sc 647 dev/acpi/acpi.c acpi_loadtables(struct acpi_softc *sc, struct acpi_rsdp *rsdp)
sc 677 dev/acpi/acpi.c &sc->sc_tables);
sc 704 dev/acpi/acpi.c &sc->sc_tables);
sc 763 dev/acpi/acpi.c struct acpi_softc *sc;
sc 767 dev/acpi/acpi.c !(sc = acpi_cd.cd_devs[minor(dev)]))
sc 776 dev/acpi/acpi.c struct acpi_softc *sc;
sc 779 dev/acpi/acpi.c !(sc = acpi_cd.cd_devs[minor(dev)]))
sc 790 dev/acpi/acpi.c struct acpi_softc *sc;
sc 798 dev/acpi/acpi.c !(sc = acpi_cd.cd_devs[minor(dev)]))
sc 801 dev/acpi/acpi.c ACPI_LOCK(sc);
sc 807 dev/acpi/acpi.c SLIST_FOREACH(ac, &sc->sc_ac, aac_link) {
sc 823 dev/acpi/acpi.c SLIST_FOREACH(bat, &sc->sc_bat, aba_link) {
sc 872 dev/acpi/acpi.c ACPI_UNLOCK(sc);
sc 882 dev/acpi/acpi.c struct acpi_softc *sc = kn->kn_hook;
sc 884 dev/acpi/acpi.c ACPI_LOCK(sc);
sc 885 dev/acpi/acpi.c SLIST_REMOVE(sc->sc_note, kn, knote, kn_selnext);
sc 886 dev/acpi/acpi.c ACPI_UNLOCK(sc);
sc 902 dev/acpi/acpi.c struct acpi_softc *sc;
sc 905 dev/acpi/acpi.c !(sc = acpi_cd.cd_devs[minor(dev)]))
sc 916 dev/acpi/acpi.c kn->kn_hook = sc;
sc 918 dev/acpi/acpi.c ACPI_LOCK(sc);
sc 919 dev/acpi/acpi.c SLIST_INSERT_HEAD(sc->sc_note, kn, kn_selnext);
sc 920 dev/acpi/acpi.c ACPI_UNLOCK(sc);
sc 930 dev/acpi/acpi.c struct acpi_softc *sc = (struct acpi_softc *)arg;
sc 936 dev/acpi/acpi.c for (idx = 0; idx < sc->sc_lastgpe; idx += 8) {
sc 937 dev/acpi/acpi.c sts = acpi_read_pmreg(sc, ACPIREG_GPE_STS, idx>>3);
sc 938 dev/acpi/acpi.c en = acpi_read_pmreg(sc, ACPIREG_GPE_EN, idx>>3);
sc 942 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_GPE_EN, idx>>3, en & ~sts);
sc 946 dev/acpi/acpi.c sc->gpe_table[idx+jdx].active = 1;
sc 953 dev/acpi/acpi.c sts = acpi_read_pmreg(sc, ACPIREG_PM1_STS, 0);
sc 954 dev/acpi/acpi.c en = acpi_read_pmreg(sc, ACPIREG_PM1_EN, 0);
sc 957 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1_EN, 0, en & ~sts);
sc 958 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1_STS, 0, en);
sc 959 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1_EN, 0, en);
sc 961 dev/acpi/acpi.c sc->sc_powerbtn = 1;
sc 963 dev/acpi/acpi.c sc->sc_sleepbtn = 1;
sc 968 dev/acpi/acpi.c sc->sc_wakeup = 0;
sc 969 dev/acpi/acpi.c wakeup(sc);
sc 976 dev/acpi/acpi.c acpi_enable_onegpe(struct acpi_softc *sc, int gpe, int enable)
sc 982 dev/acpi/acpi.c en = acpi_read_pmreg(sc, ACPIREG_GPE_EN, gpe>>3);
sc 989 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_GPE_EN, gpe>>3, en);
sc 993 dev/acpi/acpi.c acpi_set_gpehandler(struct acpi_softc *sc, int gpe, int (*handler)
sc 996 dev/acpi/acpi.c if (gpe >= sc->sc_lastgpe || handler == NULL)
sc 999 dev/acpi/acpi.c if (sc->gpe_table[gpe].handler != NULL) {
sc 1005 dev/acpi/acpi.c sc->gpe_table[gpe].handler = handler;
sc 1006 dev/acpi/acpi.c sc->gpe_table[gpe].arg = arg;
sc 1014 dev/acpi/acpi.c acpi_gpe_level(struct acpi_softc *sc, int gpe, void *arg)
sc 1022 dev/acpi/acpi.c aml_evalnode(sc, node, 0, NULL, NULL);
sc 1023 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_GPE_STS, gpe>>3, mask);
sc 1024 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_GPE_EN, gpe>>3, mask);
sc 1030 dev/acpi/acpi.c acpi_gpe_edge(struct acpi_softc *sc, int gpe, void *arg)
sc 1039 dev/acpi/acpi.c aml_evalnode(sc, node, 0, NULL, NULL);
sc 1040 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_GPE_STS, gpe>>3, mask);
sc 1041 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_GPE_EN, gpe>>3, mask);
sc 1047 dev/acpi/acpi.c acpi_init_gpes(struct acpi_softc *sc)
sc 1053 dev/acpi/acpi.c sc->sc_lastgpe = sc->sc_fadt->gpe0_blk_len << 2;
sc 1054 dev/acpi/acpi.c if (sc->sc_fadt->gpe1_blk_len) {
sc 1056 dev/acpi/acpi.c dnprintf(50, "Last GPE: %.2x\n", sc->sc_lastgpe);
sc 1059 dev/acpi/acpi.c sc->gpe_table = malloc(sc->sc_lastgpe * sizeof(struct gpe_block),
sc 1061 dev/acpi/acpi.c memset(sc->gpe_table, 0, sc->sc_lastgpe * sizeof(struct gpe_block));
sc 1066 dev/acpi/acpi.c for (idx = 0; idx < sc->sc_lastgpe; idx += 8) {
sc 1067 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_GPE_EN, idx>>3, 0);
sc 1068 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_GPE_STS, idx>>3, -1);
sc 1070 dev/acpi/acpi.c for (idx = 0; idx < sc->sc_lastgpe; idx++) {
sc 1075 dev/acpi/acpi.c acpi_set_gpehandler(sc, idx, acpi_gpe_level, gpe,
sc 1082 dev/acpi/acpi.c acpi_set_gpehandler(sc, idx, acpi_gpe_edge, gpe,
sc 1086 dev/acpi/acpi.c sc->sc_maxgpe = ngpe;
sc 1090 dev/acpi/acpi.c acpi_init_states(struct acpi_softc *sc)
sc 1098 dev/acpi/acpi.c sc->sc_sleeptype[i].slp_typa = -1;
sc 1099 dev/acpi/acpi.c sc->sc_sleeptype[i].slp_typb = -1;
sc 1100 dev/acpi/acpi.c if (aml_evalname(sc, aml_root.child, name, 0, NULL, &res) == 0) {
sc 1102 dev/acpi/acpi.c sc->sc_sleeptype[i].slp_typa = aml_val2int(res.v_package[0]);
sc 1103 dev/acpi/acpi.c sc->sc_sleeptype[i].slp_typb = aml_val2int(res.v_package[1]);
sc 1111 dev/acpi/acpi.c acpi_init_pm(struct acpi_softc *sc)
sc 1113 dev/acpi/acpi.c sc->sc_tts = aml_searchname(aml_root.child, "_TTS");
sc 1114 dev/acpi/acpi.c sc->sc_pts = aml_searchname(aml_root.child, "_PTS");
sc 1115 dev/acpi/acpi.c sc->sc_wak = aml_searchname(aml_root.child, "_WAK");
sc 1116 dev/acpi/acpi.c sc->sc_bfs = aml_searchname(aml_root.child, "_BFS");
sc 1117 dev/acpi/acpi.c sc->sc_gts = aml_searchname(aml_root.child, "_GTS");
sc 1121 dev/acpi/acpi.c acpi_enter_sleep_state(struct acpi_softc *sc, int state)
sc 1130 dev/acpi/acpi.c if (sc->sc_sleeptype[state].slp_typa == -1 ||
sc 1131 dev/acpi/acpi.c sc->sc_sleeptype[state].slp_typb == -1) {
sc 1133 dev/acpi/acpi.c sc->sc_dev.dv_xname, state);
sc 1140 dev/acpi/acpi.c if (sc->sc_tts) {
sc 1141 dev/acpi/acpi.c if (aml_evalnode(sc, sc->sc_tts, 1, &env, NULL) != 0) {
sc 1143 dev/acpi/acpi.c DEVNAME(sc));
sc 1159 dev/acpi/acpi.c if (sc->sc_pts) {
sc 1160 dev/acpi/acpi.c if (aml_evalnode(sc, sc->sc_pts, 1, &env, NULL) != 0) {
sc 1162 dev/acpi/acpi.c DEVNAME(sc));
sc 1166 dev/acpi/acpi.c sc->sc_state = state;
sc 1168 dev/acpi/acpi.c if (sc->sc_gts) {
sc 1169 dev/acpi/acpi.c if (aml_evalnode(sc, sc->sc_gts, 1, &env, NULL) != 0) {
sc 1171 dev/acpi/acpi.c DEVNAME(sc));
sc 1178 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1_STS, 0, ACPI_PM1_WAK_STS);
sc 1181 dev/acpi/acpi.c rega = acpi_read_pmreg(sc, ACPIREG_PM1A_CNT, 0);
sc 1182 dev/acpi/acpi.c regb = acpi_read_pmreg(sc, ACPIREG_PM1B_CNT, 0);
sc 1185 dev/acpi/acpi.c rega |= ACPI_PM1_SLP_TYPX(sc->sc_sleeptype[state].slp_typa);
sc 1186 dev/acpi/acpi.c regb |= ACPI_PM1_SLP_TYPX(sc->sc_sleeptype[state].slp_typb);
sc 1187 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1A_CNT, 0, rega);
sc 1188 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1B_CNT, 0, regb);
sc 1193 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1A_CNT, 0, rega);
sc 1194 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1B_CNT, 0, regb);
sc 1198 dev/acpi/acpi.c rega = acpi_read_pmreg(sc, ACPIREG_PM1A_STS, 0);
sc 1199 dev/acpi/acpi.c regb = acpi_read_pmreg(sc, ACPIREG_PM1B_STS, 0);
sc 1211 dev/acpi/acpi.c acpi_resume(struct acpi_softc *sc)
sc 1216 dev/acpi/acpi.c env.v_integer = sc->sc_state;
sc 1218 dev/acpi/acpi.c if (sc->sc_bfs) {
sc 1219 dev/acpi/acpi.c if (aml_evalnode(sc, sc->sc_pts, 1, &env, NULL) != 0) {
sc 1221 dev/acpi/acpi.c DEVNAME(sc));
sc 1226 dev/acpi/acpi.c if (sc->sc_wak) {
sc 1227 dev/acpi/acpi.c if (aml_evalnode(sc, sc->sc_wak, 1, &env, NULL) != 0) {
sc 1229 dev/acpi/acpi.c DEVNAME(sc));
sc 1232 dev/acpi/acpi.c sc->sc_state = ACPI_STATE_S0;
sc 1233 dev/acpi/acpi.c if (sc->sc_tts) {
sc 1234 dev/acpi/acpi.c env.v_integer = sc->sc_state;
sc 1235 dev/acpi/acpi.c if (aml_evalnode(sc, sc->sc_wak, 1, &env, NULL) != 0) {
sc 1237 dev/acpi/acpi.c DEVNAME(sc));
sc 1252 dev/acpi/acpi.c struct acpi_softc *sc = thread->sc;
sc 1255 dev/acpi/acpi.c acpi_attach_machdep(sc);
sc 1262 dev/acpi/acpi.c if (sc->sc_interrupt) {
sc 1266 dev/acpi/acpi.c sc->sc_fadt->flags & FADT_SLP_BUTTON ? 'n' : 'y',
sc 1267 dev/acpi/acpi.c sc->sc_fadt->flags & FADT_PWR_BUTTON ? 'n' : 'y');
sc 1269 dev/acpi/acpi.c sc->sc_wakeup = 1;
sc 1272 dev/acpi/acpi.c flag = acpi_read_pmreg(sc, ACPIREG_PM1_EN, 0);
sc 1273 dev/acpi/acpi.c if (!(sc->sc_fadt->flags & FADT_PWR_BUTTON)) {
sc 1276 dev/acpi/acpi.c if (!(sc->sc_fadt->flags & FADT_SLP_BUTTON)) {
sc 1279 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1_EN, 0, flag);
sc 1282 dev/acpi/acpi.c for (gpe = 0; gpe < sc->sc_lastgpe; gpe++) {
sc 1283 dev/acpi/acpi.c if (sc->gpe_table[gpe].handler)
sc 1284 dev/acpi/acpi.c acpi_enable_onegpe(sc, gpe, 1);
sc 1289 dev/acpi/acpi.c dnprintf(10, "sleep... %d\n", sc->sc_wakeup);
sc 1290 dev/acpi/acpi.c while (sc->sc_wakeup)
sc 1291 dev/acpi/acpi.c tsleep(sc, PWAIT, "acpi_idle", 0);
sc 1292 dev/acpi/acpi.c sc->sc_wakeup = 1;
sc 1295 dev/acpi/acpi.c for (gpe = 0; gpe < sc->sc_lastgpe; gpe++) {
sc 1296 dev/acpi/acpi.c struct gpe_block *pgpe = &sc->gpe_table[gpe];
sc 1302 dev/acpi/acpi.c pgpe->handler(sc, gpe, pgpe->arg);
sc 1305 dev/acpi/acpi.c if (sc->sc_powerbtn) {
sc 1306 dev/acpi/acpi.c sc->sc_powerbtn = 0;
sc 1312 dev/acpi/acpi.c KNOTE(sc->sc_note, ACPI_EVENT_COMPOSE(ACPI_EV_PWRBTN,
sc 1315 dev/acpi/acpi.c if (sc->sc_sleepbtn) {
sc 1316 dev/acpi/acpi.c sc->sc_sleepbtn = 0;
sc 1322 dev/acpi/acpi.c KNOTE(sc->sc_note, ACPI_EVENT_COMPOSE(ACPI_EV_SLPBTN,
sc 1327 dev/acpi/acpi.c if (sc->sc_poll) {
sc 1328 dev/acpi/acpi.c sc->sc_poll = 0;
sc 1340 dev/acpi/acpi.c struct acpi_softc *sc = arg;
sc 1342 dev/acpi/acpi.c if (kthread_create(acpi_isr_thread, sc->sc_thread, NULL, DEVNAME(sc))
sc 1345 dev/acpi/acpi.c DEVNAME(sc));
sc 1351 dev/acpi/acpi.c acpi_map_address(struct acpi_softc *sc, struct acpi_gas *gas, bus_addr_t base, bus_size_t size,
sc 1363 dev/acpi/acpi.c *piot = sc->sc_memt;
sc 1366 dev/acpi/acpi.c *piot = sc->sc_iot;
sc 1379 dev/acpi/acpi.c acpi_map_pmregs(struct acpi_softc *sc)
sc 1392 dev/acpi/acpi.c addr = sc->sc_fadt->smi_cmd;
sc 1397 dev/acpi/acpi.c size = sc->sc_fadt->pm1_evt_len >> 1;
sc 1398 dev/acpi/acpi.c addr = sc->sc_fadt->pm1a_evt_blk;
sc 1406 dev/acpi/acpi.c size = sc->sc_fadt->pm1_cnt_len;
sc 1407 dev/acpi/acpi.c addr = sc->sc_fadt->pm1a_cnt_blk;
sc 1412 dev/acpi/acpi.c size = sc->sc_fadt->pm1_evt_len >> 1;
sc 1413 dev/acpi/acpi.c addr = sc->sc_fadt->pm1b_evt_blk;
sc 1421 dev/acpi/acpi.c size = sc->sc_fadt->pm1_cnt_len;
sc 1422 dev/acpi/acpi.c addr = sc->sc_fadt->pm1b_cnt_blk;
sc 1426 dev/acpi/acpi.c size = sc->sc_fadt->pm2_cnt_len;
sc 1427 dev/acpi/acpi.c addr = sc->sc_fadt->pm2_cnt_blk;
sc 1433 dev/acpi/acpi.c size = sc->sc_fadt->pm_tmr_len;
sc 1434 dev/acpi/acpi.c addr = sc->sc_fadt->pm_tmr_blk;
sc 1440 dev/acpi/acpi.c size = sc->sc_fadt->gpe0_blk_len >> 1;
sc 1441 dev/acpi/acpi.c addr = sc->sc_fadt->gpe0_blk;
sc 1444 dev/acpi/acpi.c sc->sc_fadt->gpe0_blk_len >> 1);
sc 1446 dev/acpi/acpi.c sc->sc_fadt->gpe0_blk);
sc 1455 dev/acpi/acpi.c size = sc->sc_fadt->gpe1_blk_len >> 1;
sc 1456 dev/acpi/acpi.c addr = sc->sc_fadt->gpe1_blk;
sc 1459 dev/acpi/acpi.c sc->sc_fadt->gpe1_blk_len >> 1);
sc 1461 dev/acpi/acpi.c sc->sc_fadt->gpe1_blk);
sc 1473 dev/acpi/acpi.c bus_space_map(sc->sc_iot, addr, size, 0,
sc 1474 dev/acpi/acpi.c &sc->sc_pmregs[reg].ioh);
sc 1476 dev/acpi/acpi.c sc->sc_pmregs[reg].name = name;
sc 1477 dev/acpi/acpi.c sc->sc_pmregs[reg].size = size;
sc 1478 dev/acpi/acpi.c sc->sc_pmregs[reg].addr = addr;
sc 1485 dev/acpi/acpi.c acpi_read_pmreg(struct acpi_softc *sc, int reg, int offset)
sc 1495 dev/acpi/acpi.c return (acpi_read_pmreg(sc, ACPIREG_PM1A_EN, offset) |
sc 1496 dev/acpi/acpi.c acpi_read_pmreg(sc, ACPIREG_PM1B_EN, offset));
sc 1498 dev/acpi/acpi.c return (acpi_read_pmreg(sc, ACPIREG_PM1A_STS, offset) |
sc 1499 dev/acpi/acpi.c acpi_read_pmreg(sc, ACPIREG_PM1B_STS, offset));
sc 1501 dev/acpi/acpi.c return (acpi_read_pmreg(sc, ACPIREG_PM1A_CNT, offset) |
sc 1502 dev/acpi/acpi.c acpi_read_pmreg(sc, ACPIREG_PM1B_CNT, offset));
sc 1506 dev/acpi/acpi.c sc->sc_fadt->gpe0_blk_len>>1, sc->sc_fadt->gpe1_blk_len>>1);
sc 1507 dev/acpi/acpi.c if (offset < (sc->sc_fadt->gpe0_blk_len >> 1)) {
sc 1514 dev/acpi/acpi.c offset, sc->sc_fadt->gpe0_blk_len>>1,
sc 1515 dev/acpi/acpi.c sc->sc_fadt->gpe1_blk_len>>1);
sc 1516 dev/acpi/acpi.c if (offset < (sc->sc_fadt->gpe0_blk_len >> 1)) {
sc 1522 dev/acpi/acpi.c if (reg >= ACPIREG_MAXREG || sc->sc_pmregs[reg].size == 0)
sc 1526 dev/acpi/acpi.c ioh = sc->sc_pmregs[reg].ioh;
sc 1527 dev/acpi/acpi.c size = sc->sc_pmregs[reg].size;
sc 1535 dev/acpi/acpi.c regval = bus_space_read_1(sc->sc_iot, ioh, offset);
sc 1538 dev/acpi/acpi.c regval = bus_space_read_2(sc->sc_iot, ioh, offset);
sc 1541 dev/acpi/acpi.c regval = bus_space_read_4(sc->sc_iot, ioh, offset);
sc 1546 dev/acpi/acpi.c sc->sc_pmregs[reg].name,
sc 1547 dev/acpi/acpi.c sc->sc_pmregs[reg].addr, offset, regval);
sc 1553 dev/acpi/acpi.c acpi_write_pmreg(struct acpi_softc *sc, int reg, int offset, int regval)
sc 1562 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1A_EN, offset, regval);
sc 1563 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1B_EN, offset, regval);
sc 1566 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1A_STS, offset, regval);
sc 1567 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1B_STS, offset, regval);
sc 1570 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1A_CNT, offset, regval);
sc 1571 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1B_CNT, offset, regval);
sc 1576 dev/acpi/acpi.c offset, sc->sc_fadt->gpe0_blk_len>>1,
sc 1577 dev/acpi/acpi.c sc->sc_fadt->gpe1_blk_len>>1, regval);
sc 1578 dev/acpi/acpi.c if (offset < (sc->sc_fadt->gpe0_blk_len >> 1)) {
sc 1585 dev/acpi/acpi.c offset, sc->sc_fadt->gpe0_blk_len>>1,
sc 1586 dev/acpi/acpi.c sc->sc_fadt->gpe1_blk_len>>1, regval);
sc 1587 dev/acpi/acpi.c if (offset < (sc->sc_fadt->gpe0_blk_len >> 1)) {
sc 1597 dev/acpi/acpi.c ioh = sc->sc_pmregs[reg].ioh;
sc 1598 dev/acpi/acpi.c size = sc->sc_pmregs[reg].size;
sc 1605 dev/acpi/acpi.c bus_space_write_1(sc->sc_iot, ioh, offset, regval);
sc 1608 dev/acpi/acpi.c bus_space_write_2(sc->sc_iot, ioh, offset, regval);
sc 1611 dev/acpi/acpi.c bus_space_write_4(sc->sc_iot, ioh, offset, regval);
sc 1616 dev/acpi/acpi.c sc->sc_pmregs[reg].name, sc->sc_pmregs[reg].addr, offset, regval);
sc 1622 dev/acpi/acpi.c struct acpi_softc *sc = (struct acpi_softc *)arg;
sc 1628 dev/acpi/acpi.c if (aml_evalnode(sc, node, 0, NULL, &res) != 0)
sc 1647 dev/acpi/acpi.c aaa.aaa_iot = sc->sc_iot;
sc 1648 dev/acpi/acpi.c aaa.aaa_memt = sc->sc_memt;
sc 1659 dev/acpi/acpi.c struct acpi_softc *sc = (struct acpi_softc *)arg;
sc 1666 dev/acpi/acpi.c if (aml_evalnode(sc, node, 0, NULL, &res) != 0)
sc 1683 dev/acpi/acpi.c aaa.aaa_iot = sc->sc_iot;
sc 1684 dev/acpi/acpi.c aaa.aaa_memt = sc->sc_memt;
sc 1705 dev/acpi/acpi.c struct acpi_softc *sc = (struct acpi_softc *)arg;
sc 1713 dev/acpi/acpi.c aaa.aaa_iot = sc->sc_iot;
sc 1714 dev/acpi/acpi.c aaa.aaa_memt = sc->sc_memt;
sc 65 dev/acpi/acpiac.c struct acpiac_softc *sc = (struct acpiac_softc *)self;
sc 68 dev/acpi/acpiac.c sc->sc_acpi = (struct acpi_softc *)parent;
sc 69 dev/acpi/acpiac.c sc->sc_devnode = aa->aaa_node->child;
sc 71 dev/acpi/acpiac.c aml_register_notify(sc->sc_devnode->parent, aa->aaa_dev,
sc 72 dev/acpi/acpiac.c acpiac_notify, sc, ACPIDEV_NOPOLL);
sc 74 dev/acpi/acpiac.c acpiac_getsta(sc);
sc 76 dev/acpi/acpiac.c if (sc->sc_ac_stat == PSR_ONLINE)
sc 78 dev/acpi/acpiac.c else if (sc->sc_ac_stat == PSR_OFFLINE)
sc 83 dev/acpi/acpiac.c strlcpy(sc->sc_sensdev.xname, DEVNAME(sc),
sc 84 dev/acpi/acpiac.c sizeof(sc->sc_sensdev.xname));
sc 85 dev/acpi/acpiac.c strlcpy(sc->sc_sens[0].desc, "power supply",
sc 86 dev/acpi/acpiac.c sizeof(sc->sc_sens[0].desc));
sc 87 dev/acpi/acpiac.c sc->sc_sens[0].type = SENSOR_INDICATOR;
sc 88 dev/acpi/acpiac.c sensor_attach(&sc->sc_sensdev, &sc->sc_sens[0]);
sc 89 dev/acpi/acpiac.c sensordev_install(&sc->sc_sensdev);
sc 90 dev/acpi/acpiac.c sc->sc_sens[0].value = sc->sc_ac_stat;
sc 96 dev/acpi/acpiac.c struct acpiac_softc *sc = arg;
sc 98 dev/acpi/acpiac.c acpiac_getsta(sc);
sc 99 dev/acpi/acpiac.c sc->sc_sens[0].value = sc->sc_ac_stat;
sc 103 dev/acpi/acpiac.c acpiac_getsta(struct acpiac_softc *sc)
sc 107 dev/acpi/acpiac.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_STA", 0, NULL, NULL)) {
sc 109 dev/acpi/acpiac.c DEVNAME(sc));
sc 112 dev/acpi/acpiac.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_PSR", 0, NULL, &res)) {
sc 114 dev/acpi/acpiac.c DEVNAME(sc));
sc 117 dev/acpi/acpiac.c sc->sc_ac_stat = aml_val2int(&res);
sc 125 dev/acpi/acpiac.c struct acpiac_softc *sc = arg;
sc 128 dev/acpi/acpiac.c sc->sc_devnode->parent->name);
sc 139 dev/acpi/acpiac.c acpiac_refresh(sc);
sc 140 dev/acpi/acpiac.c dnprintf(10, "A/C status: %d\n", sc->sc_ac_stat);
sc 68 dev/acpi/acpibat.c struct acpibat_softc *sc = (struct acpibat_softc *)self;
sc 72 dev/acpi/acpibat.c sc->sc_acpi = (struct acpi_softc *)parent;
sc 73 dev/acpi/acpibat.c sc->sc_devnode = aa->aaa_node->child;
sc 75 dev/acpi/acpibat.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_STA", 0, NULL, &res)) {
sc 76 dev/acpi/acpibat.c dnprintf(10, "%s: no _STA\n", DEVNAME(sc));
sc 80 dev/acpi/acpibat.c if ((sc->sc_bat_present = aml_val2int(&res) & STA_BATTERY) != 0) {
sc 81 dev/acpi/acpibat.c acpibat_getbif(sc);
sc 82 dev/acpi/acpibat.c acpibat_getbst(sc);
sc 84 dev/acpi/acpibat.c sc->sc_devnode->parent->name,
sc 85 dev/acpi/acpibat.c sc->sc_bif.bif_model,
sc 86 dev/acpi/acpibat.c sc->sc_bif.bif_serial,
sc 87 dev/acpi/acpibat.c sc->sc_bif.bif_type,
sc 88 dev/acpi/acpibat.c sc->sc_bif.bif_oem);
sc 90 dev/acpi/acpibat.c printf(": %s: not present\n", sc->sc_devnode->parent->name);
sc 95 dev/acpi/acpibat.c acpibat_monitor(sc);
sc 98 dev/acpi/acpibat.c acpibat_refresh(sc);
sc 100 dev/acpi/acpibat.c aml_register_notify(sc->sc_devnode->parent, aa->aaa_dev,
sc 101 dev/acpi/acpibat.c acpibat_notify, sc, ACPIDEV_POLL);
sc 105 dev/acpi/acpibat.c acpibat_monitor(struct acpibat_softc *sc)
sc 110 dev/acpi/acpibat.c strlcpy(sc->sc_sensdev.xname, DEVNAME(sc),
sc 111 dev/acpi/acpibat.c sizeof(sc->sc_sensdev.xname));
sc 113 dev/acpi/acpibat.c type = sc->sc_bif.bif_power_unit ? SENSOR_AMPHOUR : SENSOR_WATTHOUR;
sc 115 dev/acpi/acpibat.c strlcpy(sc->sc_sens[0].desc, "last full capacity",
sc 116 dev/acpi/acpibat.c sizeof(sc->sc_sens[0].desc));
sc 117 dev/acpi/acpibat.c sc->sc_sens[0].type = type;
sc 118 dev/acpi/acpibat.c sensor_attach(&sc->sc_sensdev, &sc->sc_sens[0]);
sc 119 dev/acpi/acpibat.c sc->sc_sens[0].value = sc->sc_bif.bif_last_capacity * 1000;
sc 121 dev/acpi/acpibat.c strlcpy(sc->sc_sens[1].desc, "warning capacity",
sc 122 dev/acpi/acpibat.c sizeof(sc->sc_sens[1].desc));
sc 123 dev/acpi/acpibat.c sc->sc_sens[1].type = type;
sc 124 dev/acpi/acpibat.c sensor_attach(&sc->sc_sensdev, &sc->sc_sens[1]);
sc 125 dev/acpi/acpibat.c sc->sc_sens[1].value = sc->sc_bif.bif_warning * 1000;
sc 127 dev/acpi/acpibat.c strlcpy(sc->sc_sens[2].desc, "low capacity",
sc 128 dev/acpi/acpibat.c sizeof(sc->sc_sens[2].desc));
sc 129 dev/acpi/acpibat.c sc->sc_sens[2].type = type;
sc 130 dev/acpi/acpibat.c sensor_attach(&sc->sc_sensdev, &sc->sc_sens[2]);
sc 131 dev/acpi/acpibat.c sc->sc_sens[2].value = sc->sc_bif.bif_low * 1000;
sc 133 dev/acpi/acpibat.c strlcpy(sc->sc_sens[3].desc, "voltage", sizeof(sc->sc_sens[3].desc));
sc 134 dev/acpi/acpibat.c sc->sc_sens[3].type = SENSOR_VOLTS_DC;
sc 135 dev/acpi/acpibat.c sensor_attach(&sc->sc_sensdev, &sc->sc_sens[3]);
sc 136 dev/acpi/acpibat.c sc->sc_sens[3].value = sc->sc_bif.bif_voltage * 1000;
sc 138 dev/acpi/acpibat.c strlcpy(sc->sc_sens[4].desc, "battery unknown",
sc 139 dev/acpi/acpibat.c sizeof(sc->sc_sens[4].desc));
sc 140 dev/acpi/acpibat.c sc->sc_sens[4].type = SENSOR_INTEGER;
sc 141 dev/acpi/acpibat.c sensor_attach(&sc->sc_sensdev, &sc->sc_sens[4]);
sc 142 dev/acpi/acpibat.c sc->sc_sens[4].value = sc->sc_bst.bst_state;
sc 144 dev/acpi/acpibat.c strlcpy(sc->sc_sens[5].desc, "rate", sizeof(sc->sc_sens[5].desc));
sc 145 dev/acpi/acpibat.c sc->sc_sens[5].type = SENSOR_INTEGER;
sc 146 dev/acpi/acpibat.c sensor_attach(&sc->sc_sensdev, &sc->sc_sens[5]);
sc 147 dev/acpi/acpibat.c sc->sc_sens[5].value = sc->sc_bst.bst_rate;
sc 149 dev/acpi/acpibat.c strlcpy(sc->sc_sens[6].desc, "remaining capacity",
sc 150 dev/acpi/acpibat.c sizeof(sc->sc_sens[6].desc));
sc 151 dev/acpi/acpibat.c sc->sc_sens[6].type = type;
sc 152 dev/acpi/acpibat.c sensor_attach(&sc->sc_sensdev, &sc->sc_sens[6]);
sc 153 dev/acpi/acpibat.c sc->sc_sens[6].value = sc->sc_bst.bst_capacity * 1000;
sc 155 dev/acpi/acpibat.c strlcpy(sc->sc_sens[7].desc, "current voltage",
sc 156 dev/acpi/acpibat.c sizeof(sc->sc_sens[7].desc));
sc 157 dev/acpi/acpibat.c sc->sc_sens[7].type = SENSOR_VOLTS_DC;
sc 158 dev/acpi/acpibat.c sensor_attach(&sc->sc_sensdev, &sc->sc_sens[7]);
sc 159 dev/acpi/acpibat.c sc->sc_sens[7].value = sc->sc_bst.bst_voltage * 1000;
sc 161 dev/acpi/acpibat.c sensordev_install(&sc->sc_sensdev);
sc 167 dev/acpi/acpibat.c struct acpibat_softc *sc = arg;
sc 170 dev/acpi/acpibat.c dnprintf(30, "%s: %s: refresh\n", DEVNAME(sc),
sc 171 dev/acpi/acpibat.c sc->sc_devnode->parent->name);
sc 173 dev/acpi/acpibat.c if (!sc->sc_bat_present) {
sc 175 dev/acpi/acpibat.c sc->sc_sens[i].value = 0;
sc 176 dev/acpi/acpibat.c sc->sc_sens[i].status = SENSOR_S_UNSPEC;
sc 177 dev/acpi/acpibat.c sc->sc_sens[i].flags = SENSOR_FINVALID;
sc 180 dev/acpi/acpibat.c strlcpy(sc->sc_sens[4].desc, "battery removed",
sc 181 dev/acpi/acpibat.c sizeof(sc->sc_sens[4].desc));
sc 189 dev/acpi/acpibat.c acpibat_getbif(sc);
sc 190 dev/acpi/acpibat.c acpibat_getbst(sc);
sc 193 dev/acpi/acpibat.c if (sc->sc_bif.bif_last_capacity == BIF_UNKNOWN) {
sc 194 dev/acpi/acpibat.c sc->sc_sens[0].value = 0;
sc 195 dev/acpi/acpibat.c sc->sc_sens[0].status = SENSOR_S_UNKNOWN;
sc 196 dev/acpi/acpibat.c sc->sc_sens[0].flags = SENSOR_FUNKNOWN;
sc 198 dev/acpi/acpibat.c sc->sc_sens[0].value = sc->sc_bif.bif_last_capacity * 1000;
sc 199 dev/acpi/acpibat.c sc->sc_sens[0].status = SENSOR_S_UNSPEC;
sc 200 dev/acpi/acpibat.c sc->sc_sens[0].flags = 0;
sc 202 dev/acpi/acpibat.c sc->sc_sens[1].value = sc->sc_bif.bif_warning * 1000;
sc 203 dev/acpi/acpibat.c sc->sc_sens[1].flags = 0;
sc 204 dev/acpi/acpibat.c sc->sc_sens[2].value = sc->sc_bif.bif_low * 1000;
sc 205 dev/acpi/acpibat.c sc->sc_sens[2].flags = 0;
sc 206 dev/acpi/acpibat.c if (sc->sc_bif.bif_voltage == BIF_UNKNOWN) {
sc 207 dev/acpi/acpibat.c sc->sc_sens[3].value = 0;
sc 208 dev/acpi/acpibat.c sc->sc_sens[3].status = SENSOR_S_UNKNOWN;
sc 209 dev/acpi/acpibat.c sc->sc_sens[3].flags = SENSOR_FUNKNOWN;
sc 211 dev/acpi/acpibat.c sc->sc_sens[3].value = sc->sc_bif.bif_voltage * 1000;
sc 212 dev/acpi/acpibat.c sc->sc_sens[3].status = SENSOR_S_UNSPEC;
sc 213 dev/acpi/acpibat.c sc->sc_sens[3].flags = 0;
sc 217 dev/acpi/acpibat.c sc->sc_sens[4].status = SENSOR_S_OK;
sc 218 dev/acpi/acpibat.c sc->sc_sens[4].flags = 0;
sc 219 dev/acpi/acpibat.c if (sc->sc_bif.bif_last_capacity == BIF_UNKNOWN ||
sc 220 dev/acpi/acpibat.c sc->sc_bst.bst_capacity == BST_UNKNOWN) {
sc 221 dev/acpi/acpibat.c sc->sc_sens[4].status = SENSOR_S_UNKNOWN;
sc 222 dev/acpi/acpibat.c sc->sc_sens[4].flags = SENSOR_FUNKNOWN;
sc 223 dev/acpi/acpibat.c strlcpy(sc->sc_sens[4].desc, "battery unknown",
sc 224 dev/acpi/acpibat.c sizeof(sc->sc_sens[4].desc));
sc 225 dev/acpi/acpibat.c } else if (sc->sc_bst.bst_capacity >= sc->sc_bif.bif_last_capacity)
sc 226 dev/acpi/acpibat.c strlcpy(sc->sc_sens[4].desc, "battery full",
sc 227 dev/acpi/acpibat.c sizeof(sc->sc_sens[4].desc));
sc 228 dev/acpi/acpibat.c else if (sc->sc_bst.bst_state & BST_DISCHARGE)
sc 229 dev/acpi/acpibat.c strlcpy(sc->sc_sens[4].desc, "battery discharging",
sc 230 dev/acpi/acpibat.c sizeof(sc->sc_sens[4].desc));
sc 231 dev/acpi/acpibat.c else if (sc->sc_bst.bst_state & BST_CHARGE)
sc 232 dev/acpi/acpibat.c strlcpy(sc->sc_sens[4].desc, "battery charging",
sc 233 dev/acpi/acpibat.c sizeof(sc->sc_sens[4].desc));
sc 234 dev/acpi/acpibat.c else if (sc->sc_bst.bst_state & BST_CRITICAL) {
sc 235 dev/acpi/acpibat.c strlcpy(sc->sc_sens[4].desc, "battery critical",
sc 236 dev/acpi/acpibat.c sizeof(sc->sc_sens[4].desc));
sc 237 dev/acpi/acpibat.c sc->sc_sens[4].status = SENSOR_S_CRIT;
sc 239 dev/acpi/acpibat.c strlcpy(sc->sc_sens[4].desc, "battery idle",
sc 240 dev/acpi/acpibat.c sizeof(sc->sc_sens[4].desc));
sc 241 dev/acpi/acpibat.c sc->sc_sens[4].value = sc->sc_bst.bst_state;
sc 243 dev/acpi/acpibat.c if (sc->sc_bst.bst_rate == BST_UNKNOWN) {
sc 244 dev/acpi/acpibat.c sc->sc_sens[5].value = 0;
sc 245 dev/acpi/acpibat.c sc->sc_sens[5].status = SENSOR_S_UNKNOWN;
sc 246 dev/acpi/acpibat.c sc->sc_sens[5].flags = SENSOR_FUNKNOWN;
sc 248 dev/acpi/acpibat.c sc->sc_sens[5].value = sc->sc_bst.bst_rate;
sc 249 dev/acpi/acpibat.c sc->sc_sens[5].status = SENSOR_S_UNSPEC;
sc 250 dev/acpi/acpibat.c sc->sc_sens[5].flags = 0;
sc 253 dev/acpi/acpibat.c if (sc->sc_bst.bst_capacity == BST_UNKNOWN) {
sc 254 dev/acpi/acpibat.c sc->sc_sens[6].value = 0;
sc 255 dev/acpi/acpibat.c sc->sc_sens[6].status = SENSOR_S_UNKNOWN;
sc 256 dev/acpi/acpibat.c sc->sc_sens[6].flags = SENSOR_FUNKNOWN;
sc 258 dev/acpi/acpibat.c sc->sc_sens[6].value = sc->sc_bst.bst_capacity * 1000;
sc 259 dev/acpi/acpibat.c sc->sc_sens[6].flags = 0;
sc 261 dev/acpi/acpibat.c if (sc->sc_bst.bst_capacity < sc->sc_bif.bif_low)
sc 263 dev/acpi/acpibat.c sc->sc_sens[6].status = SENSOR_S_CRIT;
sc 264 dev/acpi/acpibat.c else if (sc->sc_bst.bst_capacity < sc->sc_bif.bif_warning)
sc 265 dev/acpi/acpibat.c sc->sc_sens[6].status = SENSOR_S_WARN;
sc 267 dev/acpi/acpibat.c sc->sc_sens[6].status = SENSOR_S_OK;
sc 270 dev/acpi/acpibat.c if(sc->sc_bst.bst_voltage == BST_UNKNOWN) {
sc 271 dev/acpi/acpibat.c sc->sc_sens[7].value = 0;
sc 272 dev/acpi/acpibat.c sc->sc_sens[7].status = SENSOR_S_UNKNOWN;
sc 273 dev/acpi/acpibat.c sc->sc_sens[7].flags = SENSOR_FUNKNOWN;
sc 275 dev/acpi/acpibat.c sc->sc_sens[7].value = sc->sc_bst.bst_voltage * 1000;
sc 276 dev/acpi/acpibat.c sc->sc_sens[7].status = SENSOR_S_UNSPEC;
sc 277 dev/acpi/acpibat.c sc->sc_sens[7].flags = 0;
sc 282 dev/acpi/acpibat.c acpibat_getbif(struct acpibat_softc *sc)
sc 287 dev/acpi/acpibat.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_STA", 0, NULL, &res)) {
sc 288 dev/acpi/acpibat.c dnprintf(10, "%s: no _STA\n", DEVNAME(sc));
sc 293 dev/acpi/acpibat.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_BIF", 0, NULL, &res)) {
sc 294 dev/acpi/acpibat.c dnprintf(10, "%s: no _BIF\n", DEVNAME(sc));
sc 300 dev/acpi/acpibat.c DEVNAME(sc));
sc 304 dev/acpi/acpibat.c memset(&sc->sc_bif, 0, sizeof sc->sc_bif);
sc 305 dev/acpi/acpibat.c sc->sc_bif.bif_power_unit = aml_val2int(res.v_package[0]);
sc 306 dev/acpi/acpibat.c sc->sc_bif.bif_capacity = aml_val2int(res.v_package[1]);
sc 307 dev/acpi/acpibat.c sc->sc_bif.bif_last_capacity = aml_val2int(res.v_package[2]);
sc 308 dev/acpi/acpibat.c sc->sc_bif.bif_technology = aml_val2int(res.v_package[3]);
sc 309 dev/acpi/acpibat.c sc->sc_bif.bif_voltage = aml_val2int(res.v_package[4]);
sc 310 dev/acpi/acpibat.c sc->sc_bif.bif_warning = aml_val2int(res.v_package[5]);
sc 311 dev/acpi/acpibat.c sc->sc_bif.bif_low = aml_val2int(res.v_package[6]);
sc 312 dev/acpi/acpibat.c sc->sc_bif.bif_cap_granu1 = aml_val2int(res.v_package[7]);
sc 313 dev/acpi/acpibat.c sc->sc_bif.bif_cap_granu2 = aml_val2int(res.v_package[8]);
sc 315 dev/acpi/acpibat.c strlcpy(sc->sc_bif.bif_model, aml_strval(res.v_package[9]),
sc 316 dev/acpi/acpibat.c sizeof(sc->sc_bif.bif_model));
sc 317 dev/acpi/acpibat.c strlcpy(sc->sc_bif.bif_serial, aml_strval(res.v_package[10]),
sc 318 dev/acpi/acpibat.c sizeof(sc->sc_bif.bif_serial));
sc 319 dev/acpi/acpibat.c strlcpy(sc->sc_bif.bif_type, aml_strval(res.v_package[11]),
sc 320 dev/acpi/acpibat.c sizeof(sc->sc_bif.bif_type));
sc 321 dev/acpi/acpibat.c strlcpy(sc->sc_bif.bif_oem, aml_strval(res.v_package[12]),
sc 322 dev/acpi/acpibat.c sizeof(sc->sc_bif.bif_oem));
sc 327 dev/acpi/acpibat.c sc->sc_bif.bif_power_unit,
sc 328 dev/acpi/acpibat.c sc->sc_bif.bif_capacity,
sc 329 dev/acpi/acpibat.c sc->sc_bif.bif_last_capacity,
sc 330 dev/acpi/acpibat.c sc->sc_bif.bif_technology,
sc 331 dev/acpi/acpibat.c sc->sc_bif.bif_voltage,
sc 332 dev/acpi/acpibat.c sc->sc_bif.bif_warning,
sc 333 dev/acpi/acpibat.c sc->sc_bif.bif_low,
sc 334 dev/acpi/acpibat.c sc->sc_bif.bif_cap_granu1,
sc 335 dev/acpi/acpibat.c sc->sc_bif.bif_cap_granu2,
sc 336 dev/acpi/acpibat.c sc->sc_bif.bif_model,
sc 337 dev/acpi/acpibat.c sc->sc_bif.bif_serial,
sc 338 dev/acpi/acpibat.c sc->sc_bif.bif_type,
sc 339 dev/acpi/acpibat.c sc->sc_bif.bif_oem);
sc 348 dev/acpi/acpibat.c acpibat_getbst(struct acpibat_softc *sc)
sc 353 dev/acpi/acpibat.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_BST", 0, NULL, &res)) {
sc 354 dev/acpi/acpibat.c dnprintf(10, "%s: no _BST\n", DEVNAME(sc));
sc 360 dev/acpi/acpibat.c DEVNAME(sc));
sc 364 dev/acpi/acpibat.c sc->sc_bst.bst_state = aml_val2int(res.v_package[0]);
sc 365 dev/acpi/acpibat.c sc->sc_bst.bst_rate = aml_val2int(res.v_package[1]);
sc 366 dev/acpi/acpibat.c sc->sc_bst.bst_capacity = aml_val2int(res.v_package[2]);
sc 367 dev/acpi/acpibat.c sc->sc_bst.bst_voltage = aml_val2int(res.v_package[3]);
sc 370 dev/acpi/acpibat.c sc->sc_bst.bst_state,
sc 371 dev/acpi/acpibat.c sc->sc_bst.bst_rate,
sc 372 dev/acpi/acpibat.c sc->sc_bst.bst_capacity,
sc 373 dev/acpi/acpibat.c sc->sc_bst.bst_voltage);
sc 393 dev/acpi/acpibat.c struct acpibat_softc *sc = arg;
sc 396 dev/acpi/acpibat.c sc->sc_devnode->parent->name);
sc 400 dev/acpi/acpibat.c if (!sc->sc_bat_present) {
sc 401 dev/acpi/acpibat.c printf("%s: %s: inserted\n", DEVNAME(sc),
sc 402 dev/acpi/acpibat.c sc->sc_devnode->parent->name);
sc 403 dev/acpi/acpibat.c sc->sc_bat_present = 1;
sc 408 dev/acpi/acpibat.c if (sc->sc_bat_present) {
sc 409 dev/acpi/acpibat.c printf("%s: %s: removed\n", DEVNAME(sc),
sc 410 dev/acpi/acpibat.c sc->sc_devnode->parent->name);
sc 411 dev/acpi/acpibat.c sc->sc_bat_present = 0;
sc 418 dev/acpi/acpibat.c acpibat_refresh(sc);
sc 83 dev/acpi/acpibtn.c struct acpibtn_softc *sc = (struct acpibtn_softc *)self;
sc 86 dev/acpi/acpibtn.c sc->sc_acpi = (struct acpi_softc *)parent;
sc 87 dev/acpi/acpibtn.c sc->sc_devnode = aa->aaa_node->child;
sc 90 dev/acpi/acpibtn.c sc->sc_btn_type = ACPIBTN_LID;
sc 92 dev/acpi/acpibtn.c sc->sc_btn_type = ACPIBTN_POWER;
sc 94 dev/acpi/acpibtn.c sc->sc_btn_type = ACPIBTN_SLEEP;
sc 96 dev/acpi/acpibtn.c sc->sc_btn_type = ACPIBTN_UNKNOWN;
sc 98 dev/acpi/acpibtn.c acpibtn_getsta(sc);
sc 100 dev/acpi/acpibtn.c printf(": %s\n", sc->sc_devnode->parent->name);
sc 102 dev/acpi/acpibtn.c aml_register_notify(sc->sc_devnode->parent, aa->aaa_dev, acpibtn_notify,
sc 103 dev/acpi/acpibtn.c sc, ACPIDEV_NOPOLL);
sc 107 dev/acpi/acpibtn.c acpibtn_getsta(struct acpibtn_softc *sc)
sc 109 dev/acpi/acpibtn.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_STA", 0, NULL, NULL) != 0) {
sc 110 dev/acpi/acpibtn.c dnprintf(20, "%s: no _STA\n", DEVNAME(sc));
sc 120 dev/acpi/acpibtn.c struct acpibtn_softc *sc = arg;
sc 124 dev/acpi/acpibtn.c sc->sc_devnode->parent->name);
sc 126 dev/acpi/acpibtn.c switch (sc->sc_btn_type) {
sc 137 dev/acpi/acpibtn.c printf("%s: spurious acpi button interrupt %i\n", DEVNAME(sc),
sc 138 dev/acpi/acpibtn.c sc->sc_btn_type);
sc 58 dev/acpi/acpicpu.c #define CPU_MAXSTATE(sc) (1L << (sc)->sc_duty_wid)
sc 59 dev/acpi/acpicpu.c #define CPU_STATE(sc,pct) ((pct * CPU_MAXSTATE(sc) / 100) << (sc)->sc_duty_off)
sc 60 dev/acpi/acpicpu.c #define CPU_STATEMASK(sc) ((CPU_MAXSTATE(sc) - 1) << (sc)->sc_duty_off)
sc 133 dev/acpi/acpicpu.c acpicpu_set_throttle(struct acpicpu_softc *sc, int level)
sc 137 dev/acpi/acpicpu.c if (sc->sc_flags & FLAGS_NOTHROTTLE)
sc 141 dev/acpi/acpicpu.c pbval = inl(sc->sc_pblk_addr);
sc 142 dev/acpi/acpicpu.c outl(sc->sc_pblk_addr, pbval & ~CPU_THT_EN);
sc 144 dev/acpi/acpicpu.c pbval &= ~CPU_STATEMASK(sc);
sc 145 dev/acpi/acpicpu.c pbval |= CPU_STATE(sc, level);
sc 146 dev/acpi/acpicpu.c outl(sc->sc_pblk_addr, pbval & ~CPU_THT_EN);
sc 147 dev/acpi/acpicpu.c outl(sc->sc_pblk_addr, pbval | CPU_THT_EN);
sc 152 dev/acpi/acpicpu.c acpicpu_find_cstate(struct acpicpu_softc *sc, int type)
sc 156 dev/acpi/acpicpu.c SLIST_FOREACH(cx, &sc->sc_cstates, link)
sc 163 dev/acpi/acpicpu.c acpicpu_add_cstate(struct acpicpu_softc *sc, int type,
sc 174 dev/acpi/acpicpu.c (sc->sc_flags & FLAGS_NO_C2))
sc 179 dev/acpi/acpicpu.c (sc->sc_flags & FLAGS_NO_C3))
sc 192 dev/acpi/acpicpu.c SLIST_INSERT_HEAD(&sc->sc_cstates, cx, link);
sc 196 dev/acpi/acpicpu.c dprintf("acpicpu%d: C%d not supported", sc->sc_cpu, type);
sc 204 dev/acpi/acpicpu.c struct acpicpu_softc *sc = arg;
sc 211 dev/acpi/acpicpu.c acpicpu_add_cstate(sc, val->v_package[1]->v_integer,
sc 236 dev/acpi/acpicpu.c struct acpicpu_softc *sc = (struct acpicpu_softc *)self;
sc 242 dev/acpi/acpicpu.c sc->sc_acpi = (struct acpi_softc *)parent;
sc 243 dev/acpi/acpicpu.c sc->sc_devnode = aa->aaa_node;
sc 244 dev/acpi/acpicpu.c acpicpu_sc[sc->sc_dev.dv_unit] = sc;
sc 246 dev/acpi/acpicpu.c SLIST_INIT(&sc->sc_cstates);
sc 248 dev/acpi/acpicpu.c sc->sc_pss = NULL;
sc 250 dev/acpi/acpicpu.c if (aml_evalnode(sc->sc_acpi, sc->sc_devnode, 0, NULL, &res) == 0) {
sc 252 dev/acpi/acpicpu.c sc->sc_cpu = res.v_processor.proc_id;
sc 253 dev/acpi/acpicpu.c sc->sc_pblk_addr = res.v_processor.proc_addr;
sc 254 dev/acpi/acpicpu.c sc->sc_pblk_len = res.v_processor.proc_len;
sc 258 dev/acpi/acpicpu.c sc->sc_duty_off = sc->sc_acpi->sc_fadt->duty_offset;
sc 259 dev/acpi/acpicpu.c sc->sc_duty_wid = sc->sc_acpi->sc_fadt->duty_width;
sc 260 dev/acpi/acpicpu.c if (!valid_throttle(sc->sc_duty_off, sc->sc_duty_wid, sc->sc_pblk_addr))
sc 261 dev/acpi/acpicpu.c sc->sc_flags |= FLAGS_NOTHROTTLE;
sc 264 dev/acpi/acpicpu.c printf(": %s: ", sc->sc_devnode->name);
sc 266 dev/acpi/acpicpu.c sc->sc_acpi->sc_fadt->hdr_revision,
sc 267 dev/acpi/acpicpu.c sc->sc_pblk_addr, sc->sc_pblk_len,
sc 268 dev/acpi/acpicpu.c sc->sc_duty_off, sc->sc_duty_wid,
sc 269 dev/acpi/acpicpu.c sc->sc_acpi->sc_fadt->pstate_cnt,
sc 270 dev/acpi/acpicpu.c CPU_MAXSTATE(sc));
sc 274 dev/acpi/acpicpu.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_CST", 0, NULL, &res) == 0) {
sc 275 dev/acpi/acpicpu.c aml_foreachpkg(&res, 1, acpicpu_add_cstatepkg, sc);
sc 280 dev/acpi/acpicpu.c if (sc->sc_pblk_len < 5)
sc 281 dev/acpi/acpicpu.c sc->sc_flags |= FLAGS_NO_C2;
sc 282 dev/acpi/acpicpu.c if (sc->sc_pblk_len < 6)
sc 283 dev/acpi/acpicpu.c sc->sc_flags |= FLAGS_NO_C3;
sc 284 dev/acpi/acpicpu.c acpicpu_add_cstate(sc, ACPI_STATE_C2,
sc 285 dev/acpi/acpicpu.c sc->sc_acpi->sc_fadt->p_lvl2_lat, -1,
sc 286 dev/acpi/acpicpu.c sc->sc_pblk_addr + 4);
sc 287 dev/acpi/acpicpu.c acpicpu_add_cstate(sc, ACPI_STATE_C3,
sc 288 dev/acpi/acpicpu.c sc->sc_acpi->sc_fadt->p_lvl3_lat, -1,
sc 289 dev/acpi/acpicpu.c sc->sc_pblk_addr + 5);
sc 291 dev/acpi/acpicpu.c if (acpicpu_getpss(sc)) {
sc 293 dev/acpi/acpicpu.c sc->sc_flags |= FLAGS_NOPSS;
sc 297 dev/acpi/acpicpu.c for (i = 0; i < sc->sc_pss_len; i++) {
sc 299 dev/acpi/acpicpu.c sc->sc_pss[i].pss_core_freq,
sc 300 dev/acpi/acpicpu.c sc->sc_pss[i].pss_power,
sc 301 dev/acpi/acpicpu.c sc->sc_pss[i].pss_trans_latency,
sc 302 dev/acpi/acpicpu.c sc->sc_pss[i].pss_bus_latency,
sc 303 dev/acpi/acpicpu.c sc->sc_pss[i].pss_ctrl,
sc 304 dev/acpi/acpicpu.c sc->sc_pss[i].pss_status);
sc 309 dev/acpi/acpicpu.c if (acpicpu_getpct(sc))
sc 310 dev/acpi/acpicpu.c sc->sc_flags |= FLAGS_NOPCT;
sc 314 dev/acpi/acpicpu.c if (sc->sc_acpi->sc_fadt->pstate_cnt)
sc 315 dev/acpi/acpicpu.c acpi_write_pmreg(sc->sc_acpi, ACPIREG_SMICMD, 0,
sc 316 dev/acpi/acpicpu.c sc->sc_acpi->sc_fadt->pstate_cnt);
sc 318 dev/acpi/acpicpu.c aml_register_notify(sc->sc_devnode, NULL,
sc 319 dev/acpi/acpicpu.c acpicpu_notify, sc, ACPIDEV_NOPOLL);
sc 334 dev/acpi/acpicpu.c SLIST_FOREACH(cx, &sc->sc_cstates, link) {
sc 353 dev/acpi/acpicpu.c if (!(sc->sc_flags & FLAGS_NOPSS) && !(sc->sc_flags & FLAGS_NOPCT)) {
sc 357 dev/acpi/acpicpu.c } else if (!(sc->sc_flags & FLAGS_NOPSS)) {
sc 369 dev/acpi/acpicpu.c if (!(sc->sc_flags & FLAGS_NOPSS) && !(sc->sc_flags & FLAGS_NOPCT)) {
sc 370 dev/acpi/acpicpu.c printf("%s: ", sc->sc_dev.dv_xname);
sc 371 dev/acpi/acpicpu.c for (i = 0; i < sc->sc_pss_len; i++)
sc 372 dev/acpi/acpicpu.c printf("%d%s", sc->sc_pss[i].pss_core_freq,
sc 373 dev/acpi/acpicpu.c i < sc->sc_pss_len - 1 ? ", " : " MHz\n");
sc 378 dev/acpi/acpicpu.c acpicpu_getpct(struct acpicpu_softc *sc)
sc 383 dev/acpi/acpicpu.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_PPC", 0, NULL, &res)) {
sc 384 dev/acpi/acpicpu.c dnprintf(20, "%s: no _PPC\n", DEVNAME(sc));
sc 385 dev/acpi/acpicpu.c dnprintf(10, "%s: no _PPC\n", DEVNAME(sc));
sc 392 dev/acpi/acpicpu.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_PCT", 0, NULL, &res)) {
sc 393 dev/acpi/acpicpu.c dnprintf(20, "%s: no _PCT\n", DEVNAME(sc));
sc 398 dev/acpi/acpicpu.c dnprintf(20, "%s: %s: invalid _PCT length\n", DEVNAME(sc),
sc 399 dev/acpi/acpicpu.c sc->sc_devnode->name);
sc 403 dev/acpi/acpicpu.c memcpy(&sc->sc_pct.pct_ctrl, res.v_package[0]->v_buffer,
sc 404 dev/acpi/acpicpu.c sizeof sc->sc_pct.pct_ctrl);
sc 405 dev/acpi/acpicpu.c if (sc->sc_pct.pct_ctrl.grd_gas.address_space_id ==
sc 411 dev/acpi/acpicpu.c memcpy(&sc->sc_pct.pct_status, res.v_package[1]->v_buffer,
sc 412 dev/acpi/acpicpu.c sizeof sc->sc_pct.pct_status);
sc 413 dev/acpi/acpicpu.c if (sc->sc_pct.pct_status.grd_gas.address_space_id ==
sc 420 dev/acpi/acpicpu.c sc->sc_pct.pct_ctrl.grd_descriptor,
sc 421 dev/acpi/acpicpu.c sc->sc_pct.pct_ctrl.grd_length,
sc 422 dev/acpi/acpicpu.c sc->sc_pct.pct_ctrl.grd_gas.address_space_id,
sc 423 dev/acpi/acpicpu.c sc->sc_pct.pct_ctrl.grd_gas.register_bit_width,
sc 424 dev/acpi/acpicpu.c sc->sc_pct.pct_ctrl.grd_gas.register_bit_offset,
sc 425 dev/acpi/acpicpu.c sc->sc_pct.pct_ctrl.grd_gas.access_size,
sc 426 dev/acpi/acpicpu.c sc->sc_pct.pct_ctrl.grd_gas.address);
sc 429 dev/acpi/acpicpu.c sc->sc_pct.pct_status.grd_descriptor,
sc 430 dev/acpi/acpicpu.c sc->sc_pct.pct_status.grd_length,
sc 431 dev/acpi/acpicpu.c sc->sc_pct.pct_status.grd_gas.address_space_id,
sc 432 dev/acpi/acpicpu.c sc->sc_pct.pct_status.grd_gas.register_bit_width,
sc 433 dev/acpi/acpicpu.c sc->sc_pct.pct_status.grd_gas.register_bit_offset,
sc 434 dev/acpi/acpicpu.c sc->sc_pct.pct_status.grd_gas.access_size,
sc 435 dev/acpi/acpicpu.c sc->sc_pct.pct_status.grd_gas.address);
sc 444 dev/acpi/acpicpu.c acpicpu_getpss(struct acpicpu_softc *sc)
sc 449 dev/acpi/acpicpu.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_PSS", 0, NULL, &res)) {
sc 450 dev/acpi/acpicpu.c dprintf("%s: no _PSS\n", DEVNAME(sc));
sc 454 dev/acpi/acpicpu.c if (sc->sc_pss)
sc 455 dev/acpi/acpicpu.c free(sc->sc_pss, M_DEVBUF);
sc 457 dev/acpi/acpicpu.c sc->sc_pss = malloc(res.length * sizeof *sc->sc_pss, M_DEVBUF,
sc 460 dev/acpi/acpicpu.c memset(sc->sc_pss, 0, res.length * sizeof *sc->sc_pss);
sc 463 dev/acpi/acpicpu.c sc->sc_pss[i].pss_core_freq = aml_val2int(
sc 465 dev/acpi/acpicpu.c sc->sc_pss[i].pss_power = aml_val2int(
sc 467 dev/acpi/acpicpu.c sc->sc_pss[i].pss_trans_latency = aml_val2int(
sc 469 dev/acpi/acpicpu.c sc->sc_pss[i].pss_bus_latency = aml_val2int(
sc 471 dev/acpi/acpicpu.c sc->sc_pss[i].pss_ctrl = aml_val2int(
sc 473 dev/acpi/acpicpu.c sc->sc_pss[i].pss_status = aml_val2int(
sc 478 dev/acpi/acpicpu.c sc->sc_pss_len = res.length;
sc 489 dev/acpi/acpicpu.c struct acpicpu_softc *sc;
sc 491 dev/acpi/acpicpu.c sc = acpicpu_sc[0];
sc 492 dev/acpi/acpicpu.c if (!sc) {
sc 496 dev/acpi/acpicpu.c *pss = sc->sc_pss;
sc 498 dev/acpi/acpicpu.c return sc->sc_pss_len;
sc 504 dev/acpi/acpicpu.c struct acpicpu_softc *sc = arg;
sc 507 dev/acpi/acpicpu.c sc->sc_devnode->name);
sc 511 dev/acpi/acpicpu.c acpicpu_getpct(sc);
sc 512 dev/acpi/acpicpu.c acpicpu_getpss(sc);
sc 513 dev/acpi/acpicpu.c if (sc->sc_notify)
sc 514 dev/acpi/acpicpu.c sc->sc_notify(sc->sc_pss, sc->sc_pss_len);
sc 517 dev/acpi/acpicpu.c printf("%s: unhandled cpu event %x\n", DEVNAME(sc),
sc 527 dev/acpi/acpicpu.c struct acpicpu_softc *sc;
sc 529 dev/acpi/acpicpu.c sc = acpicpu_sc[0];
sc 530 dev/acpi/acpicpu.c if (sc != NULL)
sc 531 dev/acpi/acpicpu.c sc->sc_notify = func;
sc 536 dev/acpi/acpicpu.c struct acpicpu_softc *sc;
sc 542 dev/acpi/acpicpu.c sc = acpicpu_sc[cpu_number()];
sc 545 dev/acpi/acpicpu.c sc->sc_devnode->name, level);
sc 549 dev/acpi/acpicpu.c sc->sc_devnode->name);
sc 553 dev/acpi/acpicpu.c idx = (sc->sc_pss_len - 1) - (level / (100 / sc->sc_pss_len));
sc 556 dev/acpi/acpicpu.c if (idx > sc->sc_pss_len) {
sc 559 dev/acpi/acpicpu.c sc->sc_devnode->name);
sc 564 dev/acpi/acpicpu.c sc->sc_devnode->name, idx);
sc 566 dev/acpi/acpicpu.c pss = &sc->sc_pss[idx];
sc 569 dev/acpi/acpicpu.c stat_as = sc->sc_pct.pct_status.grd_gas.register_bit_width / 8;
sc 572 dev/acpi/acpicpu.c ctrl_as = sc->sc_pct.pct_ctrl.grd_gas.register_bit_width / 8;
sc 575 dev/acpi/acpicpu.c stat_len = sc->sc_pct.pct_status.grd_gas.access_size;
sc 578 dev/acpi/acpicpu.c ctrl_len = sc->sc_pct.pct_ctrl.grd_gas.access_size;
sc 585 dev/acpi/acpicpu.c sc->sc_pct.pct_status.grd_gas.address_space_id,
sc 586 dev/acpi/acpicpu.c sc->sc_pct.pct_status.grd_gas.address,
sc 588 dev/acpi/acpicpu.c sc->sc_pct.pct_ctrl.grd_gas.address_space_id,
sc 589 dev/acpi/acpicpu.c sc->sc_pct.pct_ctrl.grd_gas.address,
sc 592 dev/acpi/acpicpu.c acpi_gasio(sc->sc_acpi, ACPI_IOREAD,
sc 593 dev/acpi/acpicpu.c sc->sc_pct.pct_status.grd_gas.address_space_id,
sc 594 dev/acpi/acpicpu.c sc->sc_pct.pct_status.grd_gas.address, stat_as, stat_len,
sc 602 dev/acpi/acpicpu.c acpi_gasio(sc->sc_acpi, ACPI_IOWRITE,
sc 603 dev/acpi/acpicpu.c sc->sc_pct.pct_ctrl.grd_gas.address_space_id,
sc 604 dev/acpi/acpicpu.c sc->sc_pct.pct_ctrl.grd_gas.address, ctrl_as, ctrl_len,
sc 608 dev/acpi/acpicpu.c acpi_gasio(sc->sc_acpi, ACPI_IOREAD,
sc 609 dev/acpi/acpicpu.c sc->sc_pct.pct_status.grd_gas.address_space_id,
sc 610 dev/acpi/acpicpu.c sc->sc_pct.pct_status.grd_gas.address, stat_as, stat_as,
sc 619 dev/acpi/acpicpu.c sc->sc_devnode->name);
sc 75 dev/acpi/acpidock.c struct acpidock_softc *sc = (struct acpidock_softc *)self;
sc 79 dev/acpi/acpidock.c sc->sc_acpi = (struct acpi_softc *)parent;
sc 80 dev/acpi/acpidock.c sc->sc_devnode = aa->aaa_node->child;
sc 82 dev/acpi/acpidock.c printf(": %s", sc->sc_devnode->parent->name);
sc 84 dev/acpi/acpidock.c acpidock_status(sc);
sc 85 dev/acpi/acpidock.c if (sc->sc_docked == ACPIDOCK_STATUS_DOCKED) {
sc 86 dev/acpi/acpidock.c acpidock_docklock(sc, 1);
sc 87 dev/acpi/acpidock.c acpidock_dockctl(sc, 1);
sc 89 dev/acpi/acpidock.c acpidock_dockctl(sc, 0);
sc 90 dev/acpi/acpidock.c acpidock_docklock(sc, 0);
sc 93 dev/acpi/acpidock.c acpidock_status(sc);
sc 95 dev/acpi/acpidock.c sc->sc_docked == ACPIDOCK_STATUS_DOCKED ? "" : " not",
sc 96 dev/acpi/acpidock.c sc->sc_sta);
sc 98 dev/acpi/acpidock.c strlcpy(sc->sc_sensdev.xname, DEVNAME(sc),
sc 99 dev/acpi/acpidock.c sizeof(sc->sc_sensdev.xname));
sc 100 dev/acpi/acpidock.c if (sc->sc_docked)
sc 101 dev/acpi/acpidock.c strlcpy(sc->sc_sens.desc, "docked",
sc 102 dev/acpi/acpidock.c sizeof(sc->sc_sens.desc));
sc 104 dev/acpi/acpidock.c strlcpy(sc->sc_sens.desc, "not docked",
sc 105 dev/acpi/acpidock.c sizeof(sc->sc_sens.desc));
sc 107 dev/acpi/acpidock.c sc->sc_sens.type = SENSOR_INDICATOR;
sc 108 dev/acpi/acpidock.c sc->sc_sens.value = sc->sc_docked == ACPIDOCK_STATUS_DOCKED;
sc 109 dev/acpi/acpidock.c sensor_attach(&sc->sc_sensdev, &sc->sc_sens);
sc 110 dev/acpi/acpidock.c sensordev_install(&sc->sc_sensdev);
sc 112 dev/acpi/acpidock.c TAILQ_INIT(&sc->sc_deps_h);
sc 113 dev/acpi/acpidock.c aml_find_node(aml_root.child, "_EJD", acpidock_foundejd, sc);
sc 115 dev/acpi/acpidock.c aml_register_notify(sc->sc_devnode->parent, aa->aaa_dev,
sc 116 dev/acpi/acpidock.c acpidock_notify, sc, ACPIDEV_NOPOLL);
sc 121 dev/acpi/acpidock.c acpidock_status(struct acpidock_softc *sc)
sc 126 dev/acpi/acpidock.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_STA", 0, NULL,
sc 132 dev/acpi/acpidock.c sc->sc_sta = aml_val2int(&res);
sc 134 dev/acpi/acpidock.c sc->sc_docked = sc->sc_sta & STA_PRESENT;
sc 142 dev/acpi/acpidock.c acpidock_docklock(struct acpidock_softc *sc, int lock)
sc 151 dev/acpi/acpidock.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_LCK", 1, &cmd,
sc 153 dev/acpi/acpidock.c dnprintf(20, "%s: _LCK %d failed\n", DEVNAME(sc), lock);
sc 157 dev/acpi/acpidock.c dnprintf(20, "%s: _LCK %d successful\n", DEVNAME(sc), lock);
sc 168 dev/acpi/acpidock.c acpidock_dockctl(struct acpidock_softc *sc, int dock)
sc 177 dev/acpi/acpidock.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_DCK", 1, &cmd,
sc 180 dev/acpi/acpidock.c dnprintf(15, "%s: _DCK %d failed\n", DEVNAME(sc), dock);
sc 184 dev/acpi/acpidock.c dnprintf(15, "%s: _DCK %d successful\n", DEVNAME(sc), dock);
sc 195 dev/acpi/acpidock.c acpidock_eject(struct acpidock_softc *sc, struct aml_node *node)
sc 204 dev/acpi/acpidock.c if (aml_evalname(sc->sc_acpi, node, "_EJ0", 1, &cmd,
sc 207 dev/acpi/acpidock.c dnprintf(15, "%s: _EJ0 failed\n", DEVNAME(sc));
sc 211 dev/acpi/acpidock.c dnprintf(15, "%s: _EJ0 successful\n", DEVNAME(sc));
sc 224 dev/acpi/acpidock.c struct acpidock_softc *sc = arg;
sc 226 dev/acpi/acpidock.c dnprintf(5, "%s: acpidock_notify: notify %d\n", DEVNAME(sc),
sc 231 dev/acpi/acpidock.c printf("%s: dock", DEVNAME(sc));
sc 232 dev/acpi/acpidock.c acpidock_docklock(sc, 1);
sc 233 dev/acpi/acpidock.c acpidock_dockctl(sc, 1);
sc 239 dev/acpi/acpidock.c TAILQ_FOREACH(n, &sc->sc_deps_h, entries)
sc 240 dev/acpi/acpidock.c acpidock_eject(sc, n->node);
sc 242 dev/acpi/acpidock.c acpidock_dockctl(sc, 0);
sc 243 dev/acpi/acpidock.c acpidock_docklock(sc, 0);
sc 246 dev/acpi/acpidock.c acpidock_eject(sc, sc->sc_devnode);
sc 248 dev/acpi/acpidock.c printf("%s: undock", DEVNAME(sc));
sc 254 dev/acpi/acpidock.c acpidock_status(sc);
sc 255 dev/acpi/acpidock.c sc->sc_sens.value = sc->sc_docked == ACPIDOCK_STATUS_DOCKED;
sc 256 dev/acpi/acpidock.c if (sc->sc_docked)
sc 257 dev/acpi/acpidock.c strlcpy(sc->sc_sens.desc, "docked",
sc 258 dev/acpi/acpidock.c sizeof(sc->sc_sens.desc));
sc 260 dev/acpi/acpidock.c strlcpy(sc->sc_sens.desc, "not docked",
sc 261 dev/acpi/acpidock.c sizeof(sc->sc_sens.desc));
sc 264 dev/acpi/acpidock.c sc->sc_docked == ACPIDOCK_STATUS_DOCKED ? "docked" : "undocked");
sc 272 dev/acpi/acpidock.c struct acpidock_softc *sc = (struct acpidock_softc *)arg;
sc 275 dev/acpi/acpidock.c dnprintf(15, "%s: %s", DEVNAME(sc), node->parent->name);
sc 277 dev/acpi/acpidock.c if (aml_evalnode(sc->sc_acpi, node, 0, NULL, &res) == -1) {
sc 283 dev/acpi/acpidock.c dnprintf(10, "%s: %s depends on %s\n", DEVNAME(sc),
sc 291 dev/acpi/acpidock.c TAILQ_INSERT_TAIL(&sc->sc_deps_h, n, entries);
sc 42 dev/acpi/acpiec.c void acpiec_burst_enable(struct acpiec_softc *sc);
sc 118 dev/acpi/acpiec.c acpiec_wait(struct acpiec_softc *sc, u_int8_t mask, u_int8_t val)
sc 123 dev/acpi/acpiec.c DEVNAME(sc), (int)mask,
sc 126 dev/acpi/acpiec.c while (((stat = acpiec_status(sc)) & mask) != val) {
sc 128 dev/acpi/acpiec.c sc->sc_gotsci = 1;
sc 132 dev/acpi/acpiec.c tsleep(sc, PWAIT, "ecwait", 1);
sc 135 dev/acpi/acpiec.c dnprintf(40, "%s: EC wait_ns, stat: %b\n", DEVNAME(sc), (int)stat,
sc 140 dev/acpi/acpiec.c acpiec_status(struct acpiec_softc *sc)
sc 142 dev/acpi/acpiec.c return (bus_space_read_1(sc->sc_cmd_bt, sc->sc_cmd_bh, 0));
sc 146 dev/acpi/acpiec.c acpiec_write_data(struct acpiec_softc *sc, u_int8_t val)
sc 148 dev/acpi/acpiec.c acpiec_wait(sc, EC_STAT_IBF, 0);
sc 150 dev/acpi/acpiec.c bus_space_write_1(sc->sc_data_bt, sc->sc_data_bh, 0, val);
sc 154 dev/acpi/acpiec.c acpiec_write_cmd(struct acpiec_softc *sc, u_int8_t val)
sc 156 dev/acpi/acpiec.c acpiec_wait(sc, EC_STAT_IBF, 0);
sc 158 dev/acpi/acpiec.c bus_space_write_1(sc->sc_cmd_bt, sc->sc_cmd_bh, 0, val);
sc 162 dev/acpi/acpiec.c acpiec_read_data(struct acpiec_softc *sc)
sc 166 dev/acpi/acpiec.c acpiec_wait(sc, EC_STAT_OBF, EC_STAT_OBF);
sc 168 dev/acpi/acpiec.c val = bus_space_read_1(sc->sc_data_bt, sc->sc_data_bh, 0);
sc 174 dev/acpi/acpiec.c acpiec_sci_event(struct acpiec_softc *sc)
sc 178 dev/acpi/acpiec.c sc->sc_gotsci = 0;
sc 180 dev/acpi/acpiec.c acpiec_wait(sc, EC_STAT_IBF, 0);
sc 181 dev/acpi/acpiec.c bus_space_write_1(sc->sc_cmd_bt, sc->sc_cmd_bh, 0, EC_CMD_QR);
sc 183 dev/acpi/acpiec.c acpiec_wait(sc, EC_STAT_OBF, EC_STAT_OBF);
sc 184 dev/acpi/acpiec.c evt = bus_space_read_1(sc->sc_data_bt, sc->sc_data_bh, 0);
sc 187 dev/acpi/acpiec.c dnprintf(10, "%s: sci_event: 0x%02x\n", DEVNAME(sc), (int)evt);
sc 188 dev/acpi/acpiec.c aml_evalnode(sc->sc_acpi, sc->sc_events[evt].event, 0, NULL,
sc 194 dev/acpi/acpiec.c acpiec_read_1(struct acpiec_softc *sc, u_int8_t addr)
sc 198 dev/acpi/acpiec.c if ((acpiec_status(sc) & EC_STAT_SCI_EVT) == EC_STAT_SCI_EVT)
sc 199 dev/acpi/acpiec.c sc->sc_gotsci = 1;
sc 201 dev/acpi/acpiec.c acpiec_write_cmd(sc, EC_CMD_RD);
sc 202 dev/acpi/acpiec.c acpiec_write_data(sc, addr);
sc 204 dev/acpi/acpiec.c val = acpiec_read_data(sc);
sc 210 dev/acpi/acpiec.c acpiec_write_1(struct acpiec_softc *sc, u_int8_t addr, u_int8_t data)
sc 212 dev/acpi/acpiec.c if ((acpiec_status(sc) & EC_STAT_SCI_EVT) == EC_STAT_SCI_EVT)
sc 213 dev/acpi/acpiec.c sc->sc_gotsci = 1;
sc 215 dev/acpi/acpiec.c acpiec_write_cmd(sc, EC_CMD_WR);
sc 216 dev/acpi/acpiec.c acpiec_write_data(sc, addr);
sc 217 dev/acpi/acpiec.c acpiec_write_data(sc, data);
sc 221 dev/acpi/acpiec.c acpiec_burst_enable(struct acpiec_softc *sc)
sc 223 dev/acpi/acpiec.c acpiec_write_cmd(sc, EC_CMD_BE);
sc 224 dev/acpi/acpiec.c acpiec_read_data(sc);
sc 228 dev/acpi/acpiec.c acpiec_read(struct acpiec_softc *sc, u_int8_t addr, int len, u_int8_t *buffer)
sc 237 dev/acpi/acpiec.c acpiec_burst_enable(sc);
sc 238 dev/acpi/acpiec.c dnprintf(20, "%s: read %d, %d\n", DEVNAME(sc), (int)addr, len);
sc 241 dev/acpi/acpiec.c buffer[reg] = acpiec_read_1(sc, addr + reg);
sc 245 dev/acpi/acpiec.c acpiec_write(struct acpiec_softc *sc, u_int8_t addr, int len, u_int8_t *buffer)
sc 254 dev/acpi/acpiec.c acpiec_burst_enable(sc);
sc 255 dev/acpi/acpiec.c dnprintf(20, "%s: write %d, %d\n", DEVNAME(sc), (int)addr, len);
sc 257 dev/acpi/acpiec.c acpiec_write_1(sc, addr + reg, buffer[reg]);
sc 278 dev/acpi/acpiec.c struct acpiec_softc *sc = (struct acpiec_softc *)self;
sc 281 dev/acpi/acpiec.c sc->sc_acpi = (struct acpi_softc *)parent;
sc 282 dev/acpi/acpiec.c sc->sc_devnode = aa->aaa_node->child;
sc 284 dev/acpi/acpiec.c if (sc->sc_acpi->sc_ec != NULL) {
sc 289 dev/acpi/acpiec.c if (acpiec_getcrs(sc, aa)) {
sc 294 dev/acpi/acpiec.c if (acpiec_reg(sc)) {
sc 299 dev/acpi/acpiec.c acpiec_get_events(sc);
sc 301 dev/acpi/acpiec.c sc->sc_acpi->sc_ec = sc;
sc 303 dev/acpi/acpiec.c dnprintf(10, "%s: GPE: %d\n", DEVNAME(sc), sc->sc_gpe);
sc 306 dev/acpi/acpiec.c acpi_set_gpehandler(sc->sc_acpi, sc->sc_gpe, acpiec_gpehandler,
sc 307 dev/acpi/acpiec.c sc, "acpiec");
sc 310 dev/acpi/acpiec.c printf(": %s\n", sc->sc_devnode->parent->name);
sc 314 dev/acpi/acpiec.c acpiec_get_events(struct acpiec_softc *sc)
sc 319 dev/acpi/acpiec.c memset(sc->sc_events, 0, sizeof(sc->sc_events));
sc 322 dev/acpi/acpiec.c sc->sc_events[idx].event = aml_searchname(sc->sc_devnode, name);
sc 323 dev/acpi/acpiec.c if (sc->sc_events[idx].event != NULL)
sc 324 dev/acpi/acpiec.c dnprintf(10, "%s: Found event %s\n", DEVNAME(sc), name);
sc 331 dev/acpi/acpiec.c struct acpiec_softc *sc = arg;
sc 342 dev/acpi/acpiec.c if (sc->sc_gotsci)
sc 343 dev/acpi/acpiec.c acpiec_sci_event(sc);
sc 345 dev/acpi/acpiec.c stat = acpiec_status(sc);
sc 347 dev/acpi/acpiec.c DEVNAME(sc), (int)stat,
sc 351 dev/acpi/acpiec.c sc->sc_gotsci = 1;
sc 352 dev/acpi/acpiec.c } while (sc->sc_gotsci);
sc 398 dev/acpi/acpiec.c acpiec_getcrs(struct acpiec_softc *sc, struct acpi_attach_args *aa)
sc 406 dev/acpi/acpiec.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_GPE", 0, NULL, &res)) {
sc 407 dev/acpi/acpiec.c dnprintf(10, "%s: no _GPE\n", DEVNAME(sc));
sc 411 dev/acpi/acpiec.c sc->sc_gpe = aml_val2int(&res);
sc 414 dev/acpi/acpiec.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_CRS", 0, NULL, &res)) {
sc 415 dev/acpi/acpiec.c dnprintf(10, "%s: no _CRS\n", DEVNAME(sc));
sc 423 dev/acpi/acpiec.c DEVNAME(sc), res.type);
sc 434 dev/acpi/acpiec.c DEVNAME(sc));
sc 445 dev/acpi/acpiec.c DEVNAME(sc));
sc 454 dev/acpi/acpiec.c dnprintf(10, "%s: no _CRS end tag\n", DEVNAME(sc));
sc 463 dev/acpi/acpiec.c DEVNAME(sc), ec_data, ec_sc);
sc 466 dev/acpi/acpiec.c sc->sc_cmd_bt = aa->aaa_iot;
sc 468 dev/acpi/acpiec.c sc->sc_cmd_bt = aa->aaa_memt;
sc 470 dev/acpi/acpiec.c if (bus_space_map(sc->sc_cmd_bt, ec_sc, 1, 0, &sc->sc_cmd_bh)) {
sc 471 dev/acpi/acpiec.c dnprintf(10, "%s: failed to map S/C reg.\n", DEVNAME(sc));
sc 476 dev/acpi/acpiec.c sc->sc_data_bt = aa->aaa_iot;
sc 478 dev/acpi/acpiec.c sc->sc_data_bt = aa->aaa_memt;
sc 480 dev/acpi/acpiec.c if (bus_space_map(sc->sc_data_bt, ec_data, 1, 0, &sc->sc_data_bh)) {
sc 481 dev/acpi/acpiec.c dnprintf(10, "%s: failed to map DATA reg.\n", DEVNAME(sc));
sc 482 dev/acpi/acpiec.c bus_space_unmap(sc->sc_cmd_bt, sc->sc_cmd_bh, 1);
sc 490 dev/acpi/acpiec.c acpiec_reg(struct acpiec_softc *sc)
sc 502 dev/acpi/acpiec.c root = aml_searchname(sc->sc_devnode, "_REG");
sc 504 dev/acpi/acpiec.c dnprintf(10, "%s: no _REG method\n", DEVNAME(sc));
sc 508 dev/acpi/acpiec.c if (aml_evalnode(sc->sc_acpi, root, 2, arg, NULL) != 0) {
sc 509 dev/acpi/acpiec.c dnprintf(10, "%s: eval method _REG failed\n", DEVNAME(sc));
sc 88 dev/acpi/acpihpet.c struct acpihpet_softc *sc = (struct acpihpet_softc *) self;
sc 95 dev/acpi/acpihpet.c &sc->sc_ioh, &sc->sc_iot)) {
sc 100 dev/acpi/acpihpet.c period = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
sc 107 dev/acpi/acpihpet.c hpet_timecounter.tc_priv = sc;
sc 108 dev/acpi/acpihpet.c hpet_timecounter.tc_name = sc->sc_dev.dv_xname;
sc 109 dev/acpi/acpihpet.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, HPET_CONFIGURATION, 1);
sc 118 dev/acpi/acpihpet.c struct acpihpet_softc *sc = tc->tc_priv;
sc 120 dev/acpi/acpihpet.c return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, HPET_MAIN_COUNTER));
sc 87 dev/acpi/acpiprt.c struct acpiprt_softc *sc = (struct acpiprt_softc *)self;
sc 92 dev/acpi/acpiprt.c sc->sc_acpi = (struct acpi_softc *)parent;
sc 93 dev/acpi/acpiprt.c sc->sc_devnode = aa->aaa_node;
sc 94 dev/acpi/acpiprt.c sc->sc_bus = acpiprt_getpcibus(sc, sc->sc_devnode);
sc 96 dev/acpi/acpiprt.c printf(": bus %d (%s)", sc->sc_bus, sc->sc_devnode->parent->name);
sc 98 dev/acpi/acpiprt.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_PRT", 0, NULL, &res)) {
sc 111 dev/acpi/acpiprt.c if (sc->sc_bus == -1)
sc 115 dev/acpi/acpiprt.c acpiprt_prt_add(sc, res.v_package[i]);
sc 141 dev/acpi/acpiprt.c acpiprt_prt_add(struct acpiprt_softc *sc, struct aml_value *v)
sc 169 dev/acpi/acpiprt.c node = aml_searchname(sc->sc_devnode, pp->v_nameref);
sc 181 dev/acpi/acpiprt.c if (aml_evalname(sc->sc_acpi, node, "_STA", 0, NULL, &res))
sc 189 dev/acpi/acpiprt.c if (aml_evalname(sc->sc_acpi, node, "_CRS", 0, NULL, &res))
sc 206 dev/acpi/acpiprt.c DEVNAME(sc), aml_nodename(pp->node), addr, pin, irq);
sc 213 dev/acpi/acpiprt.c printf("%s: no apic found for irq %d\n", DEVNAME(sc), irq);
sc 234 dev/acpi/acpiprt.c map->next = mp_busses[sc->sc_bus].mb_intrs;
sc 235 dev/acpi/acpiprt.c mp_busses[sc->sc_bus].mb_intrs = map;
sc 241 dev/acpi/acpiprt.c bus = sc->sc_bus;
sc 275 dev/acpi/acpiprt.c acpiprt_getpcibus(struct acpiprt_softc *sc, struct aml_node *node)
sc 287 dev/acpi/acpiprt.c if (aml_evalname(sc->sc_acpi, parent, "_ADR", 0, NULL, &res) == 0) {
sc 288 dev/acpi/acpiprt.c bus = acpiprt_getpcibus(sc, parent);
sc 309 dev/acpi/acpiprt.c if (aml_evalname(sc->sc_acpi, parent, "_CRS", 0, NULL, &res) == 0) {
sc 318 dev/acpi/acpiprt.c if (aml_evalname(sc->sc_acpi, parent, "_BBN", 0, NULL, &res) == 0) {
sc 80 dev/acpi/acpitimer.c struct acpitimer_softc *sc = (struct acpitimer_softc *) self;
sc 86 dev/acpi/acpitimer.c psc->sc_fadt->pm_tmr_len, &sc->sc_ioh, &sc->sc_iot);
sc 89 dev/acpi/acpitimer.c psc->sc_fadt->pm_tmr_len, &sc->sc_ioh, &sc->sc_iot);
sc 101 dev/acpi/acpitimer.c acpi_timecounter.tc_priv = sc;
sc 102 dev/acpi/acpitimer.c acpi_timecounter.tc_name = sc->sc_dev.dv_xname;
sc 112 dev/acpi/acpitimer.c struct acpitimer_softc *sc = tc->tc_priv;
sc 115 dev/acpi/acpitimer.c u2 = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 0);
sc 116 dev/acpi/acpitimer.c u3 = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 0);
sc 120 dev/acpi/acpitimer.c u3 = bus_space_read_4(sc->sc_iot, sc->sc_ioh, 0);
sc 97 dev/acpi/acpitz.c struct acpitz_softc *sc = (struct acpitz_softc *)self;
sc 102 dev/acpi/acpitz.c sc->sc_acpi = (struct acpi_softc *)parent;
sc 103 dev/acpi/acpitz.c sc->sc_devnode = aa->aaa_node->child;
sc 105 dev/acpi/acpitz.c sc->sc_lasttmp = -1;
sc 106 dev/acpi/acpitz.c if ((sc->sc_tmp = acpitz_getreading(sc, "_TMP")) == -1) {
sc 111 dev/acpi/acpitz.c if ((sc->sc_crt = acpitz_getreading(sc, "_CRT")) == -1) {
sc 113 dev/acpi/acpitz.c sc->sc_crt = 0;
sc 116 dev/acpi/acpitz.c (sc->sc_crt - 2732) / 10);
sc 120 dev/acpi/acpitz.c sc->sc_ac[i] = acpitz_getreading(sc, name);
sc 121 dev/acpi/acpitz.c sc->sc_ac_stat[0] = -1;
sc 124 dev/acpi/acpitz.c sc->sc_hot = acpitz_getreading(sc, "_HOT");
sc 125 dev/acpi/acpitz.c sc->sc_tc1 = acpitz_getreading(sc, "_TC1");
sc 126 dev/acpi/acpitz.c sc->sc_tc2 = acpitz_getreading(sc, "_TC2");
sc 127 dev/acpi/acpitz.c sc->sc_psv = acpitz_getreading(sc, "_PSV");
sc 129 dev/acpi/acpitz.c strlcpy(sc->sc_sensdev.xname, DEVNAME(sc),
sc 130 dev/acpi/acpitz.c sizeof(sc->sc_sensdev.xname));
sc 131 dev/acpi/acpitz.c strlcpy(sc->sc_sens.desc, "zone temperature",
sc 132 dev/acpi/acpitz.c sizeof(sc->sc_sens.desc));
sc 133 dev/acpi/acpitz.c sc->sc_sens.type = SENSOR_TEMP;
sc 134 dev/acpi/acpitz.c sensor_attach(&sc->sc_sensdev, &sc->sc_sens);
sc 135 dev/acpi/acpitz.c sensordev_install(&sc->sc_sensdev);
sc 136 dev/acpi/acpitz.c sc->sc_sens.value = 0;
sc 138 dev/acpi/acpitz.c aml_register_notify(sc->sc_devnode->parent, NULL,
sc 139 dev/acpi/acpitz.c acpitz_notify, sc, ACPIDEV_POLL);
sc 143 dev/acpi/acpitz.c acpitz_setcpu(struct acpitz_softc *sc, int trend)
sc 148 dev/acpi/acpitz.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, "_PSL", 0, NULL, &res0)) {
sc 149 dev/acpi/acpitz.c printf("%s: _PSL failed\n", DEVNAME(sc));
sc 153 dev/acpi/acpitz.c printf("%s: not a package\n", DEVNAME(sc));
sc 158 dev/acpi/acpitz.c printf("%s: _PSL[%d] not a object ref\n", DEVNAME(sc), x);
sc 163 dev/acpi/acpitz.c printf("%s: _PSL[%d] not a CPU\n", DEVNAME(sc), x);
sc 171 dev/acpi/acpitz.c acpitz_setfan(struct acpitz_softc *sc, int i, char *method)
sc 177 dev/acpi/acpitz.c dnprintf(20, "%s: acpitz_setfan(%d, %s)\n", DEVNAME(sc), i, method);
sc 180 dev/acpi/acpitz.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, name, 0, NULL, &res0)) {
sc 181 dev/acpi/acpitz.c dnprintf(20, "%s: %s failed\n", DEVNAME(sc), name);
sc 186 dev/acpi/acpitz.c printf("%s: %s not a package\n", DEVNAME(sc), name);
sc 192 dev/acpi/acpitz.c printf("%s: %s[%d] not a object ref\n", DEVNAME(sc),
sc 197 dev/acpi/acpitz.c if (aml_evalname(sc->sc_acpi, ref->node, "_PR0",0 , NULL,
sc 199 dev/acpi/acpitz.c printf("%s: %s[%d] _PR0 failed\n", DEVNAME(sc),
sc 205 dev/acpi/acpitz.c printf("%s: %s[%d] _PR0 not a package\n", DEVNAME(sc),
sc 213 dev/acpi/acpitz.c DEVNAME(sc), name, x, y);
sc 217 dev/acpi/acpitz.c if (aml_evalname(sc->sc_acpi, ref->node, method, 0,
sc 220 dev/acpi/acpitz.c DEVNAME(sc), name, x, y, method);
sc 223 dev/acpi/acpitz.c if (aml_evalname(sc->sc_acpi, ref->node, "_STA", 0,
sc 226 dev/acpi/acpitz.c DEVNAME(sc), name, x, y);
sc 228 dev/acpi/acpitz.c sc->sc_ac_stat[i] = aml_val2int(&res2);
sc 243 dev/acpi/acpitz.c struct acpitz_softc *sc = arg;
sc 247 dev/acpi/acpitz.c dnprintf(30, "%s: %s: refresh\n", DEVNAME(sc),
sc 248 dev/acpi/acpitz.c sc->sc_devnode->parent->name);
sc 250 dev/acpi/acpitz.c if (-1 == (sc->sc_tmp = acpitz_getreading(sc, "_TMP"))) {
sc 251 dev/acpi/acpitz.c dnprintf(30, "%s: %s: failed to read temp!\n", DEVNAME(sc),
sc 252 dev/acpi/acpitz.c sc->sc_devnode->parent->name);
sc 253 dev/acpi/acpitz.c sc->sc_tmp = 0; /* XXX */
sc 256 dev/acpi/acpitz.c if (sc->sc_crt != -1 && sc->sc_crt <= sc->sc_tmp) {
sc 259 dev/acpi/acpitz.c DEVNAME(sc));
sc 263 dev/acpi/acpitz.c if (sc->sc_hot != -1 && sc->sc_hot <= sc->sc_tmp)
sc 264 dev/acpi/acpitz.c printf("%s: _HOT temperature\n", DEVNAME(sc));
sc 266 dev/acpi/acpitz.c if (sc->sc_lasttmp != -1 && sc->sc_tc1 != -1 && sc->sc_tc2 != -1 &&
sc 267 dev/acpi/acpitz.c sc->sc_psv != -1) {
sc 268 dev/acpi/acpitz.c if (sc->sc_psv <= sc->sc_tmp) {
sc 269 dev/acpi/acpitz.c sc->sc_pse = 1;
sc 270 dev/acpi/acpitz.c trend = sc->sc_tc1 * (sc->sc_tmp - sc->sc_lasttmp) +
sc 271 dev/acpi/acpitz.c sc->sc_tc2 * (sc->sc_tmp - sc->sc_psv);
sc 273 dev/acpi/acpitz.c } else if (sc->sc_pse)
sc 274 dev/acpi/acpitz.c sc->sc_pse = 0;
sc 276 dev/acpi/acpitz.c sc->sc_lasttmp = sc->sc_tmp;
sc 279 dev/acpi/acpitz.c if (sc->sc_ac[i] != -1 && sc->sc_ac[i] <= sc->sc_tmp) {
sc 281 dev/acpi/acpitz.c if (sc->sc_ac_stat[i] <= 0)
sc 282 dev/acpi/acpitz.c acpitz_setfan(sc, i, "_ON_");
sc 283 dev/acpi/acpitz.c } else if (sc->sc_ac[i] != -1) {
sc 285 dev/acpi/acpitz.c if (sc->sc_ac_stat[i] > 0)
sc 286 dev/acpi/acpitz.c acpitz_setfan(sc, i, "_OFF");
sc 289 dev/acpi/acpitz.c sc->sc_sens.value = sc->sc_tmp * 100000;
sc 293 dev/acpi/acpitz.c acpitz_getreading(struct acpitz_softc *sc, char *name)
sc 298 dev/acpi/acpitz.c if (aml_evalname(sc->sc_acpi, sc->sc_devnode, name, 0, NULL, &res)) {
sc 299 dev/acpi/acpitz.c dnprintf(10, "%s: no %s\n", DEVNAME(sc), name);
sc 311 dev/acpi/acpitz.c struct acpitz_softc *sc = arg;
sc 314 dev/acpi/acpitz.c dnprintf(10, "%s notify: %.2x %s\n", DEVNAME(sc), notify_type,
sc 315 dev/acpi/acpitz.c sc->sc_devnode->parent->name);
sc 319 dev/acpi/acpitz.c sc->sc_psv = acpitz_getreading(sc, "_PSV");
sc 320 dev/acpi/acpitz.c crt = sc->sc_crt;
sc 321 dev/acpi/acpitz.c sc->sc_crt = acpitz_getreading(sc, "_CRT");
sc 322 dev/acpi/acpitz.c if (crt != sc->sc_crt)
sc 324 dev/acpi/acpitz.c DEVNAME(sc), (sc->sc_crt - 2732) / 10);
sc 329 dev/acpi/acpitz.c acpitz_refresh(sc);
sc 101 dev/acpi/acpivar.h struct acpi_softc *sc;
sc 573 dev/acpi/dsdt.c aml_gasio(struct acpi_softc *sc, int type, uint64_t base, uint64_t length,
sc 580 dev/acpi/dsdt.c acpi_gasio(sc, mode, type, base+(bitpos>>3),
sc 915 dev/acpi/dsdt.c scope->sc = dsdt_softc;
sc 1163 dev/acpi/dsdt.c aml_gasio(scope->sc, pop->v_opregion.iospace,
sc 1176 dev/acpi/dsdt.c aml_gasio(scope->sc, pop->v_opregion.iospace,
sc 1203 dev/acpi/dsdt.c aml_gasio(scope->sc, pop->v_opregion.iospace,
sc 1220 dev/acpi/dsdt.c aml_gasio(scope->sc, pop->v_opregion.iospace,
sc 2014 dev/acpi/dsdt.c aml_evalnode(struct acpi_softc *sc, struct aml_node *node,
sc 2070 dev/acpi/dsdt.c aml_evalname(struct acpi_softc *sc, struct aml_node *parent, const char *name,
sc 2073 dev/acpi/dsdt.c return aml_evalnode(sc, aml_searchname(parent, name), argc, argv, res);
sc 2077 dev/acpi/dsdt.c aml_evalinteger(struct acpi_softc *sc, struct aml_node *parent,
sc 2084 dev/acpi/dsdt.c if (aml_evalnode(sc, parent, argc, argv, &res) == 0) {
sc 2307 dev/acpi/dsdt.c aml_getpciaddr(struct acpi_softc *sc, struct aml_node *root)
sc 3471 dev/acpi/dsdt.c acpi_parse_aml(struct acpi_softc *sc, u_int8_t *start, u_int32_t length)
sc 3475 dev/acpi/dsdt.c dsdt_softc = sc;
sc 28 dev/acpi/dsdt.h struct acpi_softc *sc;
sc 117 dev/adb/akbd.c struct akbd_softc *sc = (struct akbd_softc *)self;
sc 126 dev/adb/akbd.c sc->origaddr = aa_args->origaddr;
sc 127 dev/adb/akbd.c sc->adbaddr = aa_args->adbaddr;
sc 128 dev/adb/akbd.c sc->handler_id = aa_args->handler_id;
sc 130 dev/adb/akbd.c sc->sc_leds = (u_int8_t)0x00; /* initially off */
sc 131 dev/adb/akbd.c sc->sc_caps = 0;
sc 134 dev/adb/akbd.c adbinfo.siDataAreaAddr = (caddr_t)sc;
sc 137 dev/adb/akbd.c switch (sc->handler_id) {
sc 145 dev/adb/akbd.c cmd = ADBTALK(sc->adbaddr, 1);
sc 163 dev/adb/akbd.c blinkleds(sc);
sc 170 dev/adb/akbd.c blinkleds(sc);
sc 213 dev/adb/akbd.c blinkleds(sc);
sc 229 dev/adb/akbd.c printf("mapped device (%d)\n", sc->handler_id);
sc 235 dev/adb/akbd.c error = set_adb_info(&adbinfo, sc->adbaddr);
sc 242 dev/adb/akbd.c timeout_set(&sc->sc_rawrepeat_ch, akbd_rawrepeat, sc);
sc 251 dev/adb/akbd.c a.accesscookie = sc;
sc 253 dev/adb/akbd.c sc->sc_wskbddev = config_found(self, &a, wskbddevprint);
sc 265 dev/adb/akbd.c struct akbd_softc *sc;
sc 275 dev/adb/akbd.c sc = (struct akbd_softc *)data_area;
sc 283 dev/adb/akbd.c sc->handler_id, sc->origaddr, buffer[0]);
sc 290 dev/adb/akbd.c if (sc->sc_wskbddev != NULL)
sc 291 dev/adb/akbd.c akbd_processevent(sc, &event);
sc 322 dev/adb/akbd.c setleds(struct akbd_softc *sc, u_char leds)
sc 328 dev/adb/akbd.c addr = sc->adbaddr;
sc 357 dev/adb/akbd.c blinkleds(struct akbd_softc *sc)
sc 361 dev/adb/akbd.c origleds = getleds(sc->adbaddr);
sc 362 dev/adb/akbd.c setleds(sc, LED_NUMLOCK | LED_CAPSLOCK | LED_SCROLL_LOCK);
sc 364 dev/adb/akbd.c setleds(sc, origleds);
sc 367 dev/adb/akbd.c sc->sc_leds |= WSKBD_LED_NUM;
sc 369 dev/adb/akbd.c sc->sc_leds |= WSKBD_LED_CAPS;
sc 371 dev/adb/akbd.c sc->sc_leds |= WSKBD_LED_SCROLL;
sc 385 dev/adb/akbd.c struct akbd_softc *sc = v;
sc 388 dev/adb/akbd.c if (sc->sc_extended) {
sc 389 dev/adb/akbd.c if (sc->sc_leds == on)
sc 400 dev/adb/akbd.c setleds(sc, leds);
sc 408 dev/adb/akbd.c struct akbd_softc *sc = v;
sc 419 dev/adb/akbd.c *(int *)data = sc->sc_leds;
sc 423 dev/adb/akbd.c sc->sc_rawkbd = *(int *)data == WSKBD_RAW;
sc 424 dev/adb/akbd.c timeout_del(&sc->sc_rawrepeat_ch);
sc 446 dev/adb/akbd.c struct akbd_softc *sc = v;
sc 450 dev/adb/akbd.c wskbd_rawinput(sc->sc_wskbddev, sc->sc_rep, sc->sc_nrep);
sc 452 dev/adb/akbd.c timeout_add(&sc->sc_rawrepeat_ch, hz * REP_DELAYN / 1000);
sc 484 dev/adb/akbd.c akbd_processevent(struct akbd_softc *sc, adb_event_t *event)
sc 488 dev/adb/akbd.c akbd_capslockwrapper(sc, event->bytes[0]);
sc 498 dev/adb/akbd.c SET(sc->sc_caps, CL_DOWN_RESET);
sc 500 dev/adb/akbd.c if (ISSET(sc->sc_caps, CL_DOWN_RESET))
sc 501 dev/adb/akbd.c CLR(sc->sc_caps, CL_DOWN_RESET);
sc 502 dev/adb/akbd.c else if (ISSET(sc->sc_caps, CL_DOWN_ADB)) {
sc 503 dev/adb/akbd.c akbd_input(sc, ISSET(sc->sc_caps,
sc 507 dev/adb/akbd.c sc->sc_caps ^= CL_DOWN_LOGICAL;
sc 511 dev/adb/akbd.c akbd_capslockwrapper(sc, event->bytes[0]);
sc 512 dev/adb/akbd.c akbd_capslockwrapper(sc, event->bytes[1]);
sc 518 dev/adb/akbd.c sc->sc_dev.dv_xname, event->byte_count);
sc 526 dev/adb/akbd.c akbd_capslockwrapper(struct akbd_softc *sc, int key)
sc 529 dev/adb/akbd.c sc->sc_caps ^= CL_DOWN_ADB;
sc 532 dev/adb/akbd.c akbd_input(sc, key);
sc 537 dev/adb/akbd.c akbd_input(struct akbd_softc *sc, int key)
sc 550 dev/adb/akbd.c } else if (sc->sc_rawkbd) {
sc 569 dev/adb/akbd.c sc->sc_rep[npress++] = 0xe0;
sc 570 dev/adb/akbd.c sc->sc_rep[npress++] = c & 0x7f;
sc 574 dev/adb/akbd.c wskbd_rawinput(sc->sc_wskbddev, cbuf, j);
sc 576 dev/adb/akbd.c timeout_del(&sc->sc_rawrepeat_ch);
sc 577 dev/adb/akbd.c sc->sc_nrep = npress;
sc 579 dev/adb/akbd.c timeout_add(&sc->sc_rawrepeat_ch, hz * REP_DELAY1/1000);
sc 582 dev/adb/akbd.c wskbd_input(sc->sc_wskbddev, type, val);
sc 91 dev/adb/ams.c struct ams_softc *sc = (struct ams_softc *)self;
sc 96 dev/adb/ams.c sc->origaddr = aa_args->origaddr;
sc 97 dev/adb/ams.c sc->adbaddr = aa_args->adbaddr;
sc 98 dev/adb/ams.c sc->handler_id = aa_args->handler_id;
sc 100 dev/adb/ams.c sc->sc_class = MSCLASS_MOUSE;
sc 101 dev/adb/ams.c sc->sc_buttons = 1;
sc 102 dev/adb/ams.c sc->sc_res = 100;
sc 103 dev/adb/ams.c sc->sc_devid[0] = 0;
sc 104 dev/adb/ams.c sc->sc_devid[4] = 0;
sc 107 dev/adb/ams.c adbinfo.siDataAreaAddr = (caddr_t)sc;
sc 109 dev/adb/ams.c ems_init(sc);
sc 113 dev/adb/ams.c switch (sc->handler_id) {
sc 115 dev/adb/ams.c sc->sc_res = 200;
sc 118 dev/adb/ams.c printf("%d-button, %d dpi mouse\n", sc->sc_buttons,
sc 119 dev/adb/ams.c (int)(sc->sc_res));
sc 123 dev/adb/ams.c sc->sc_buttons, (int)(sc->sc_res));
sc 135 dev/adb/ams.c if (sc->sc_devid[0] == '\0') {
sc 137 dev/adb/ams.c switch (sc->sc_class) {
sc 151 dev/adb/ams.c switch (sc->sc_class) {
sc 168 dev/adb/ams.c printf(" <%s> %d-button, %d dpi\n", sc->sc_devid,
sc 169 dev/adb/ams.c sc->sc_buttons, (int)(sc->sc_res));
sc 174 dev/adb/ams.c sc->handler_id);
sc 177 dev/adb/ams.c error = set_adb_info(&adbinfo, sc->adbaddr);
sc 184 dev/adb/ams.c a.accesscookie = sc;
sc 185 dev/adb/ams.c sc->sc_wsmousedev = config_found(self, &a, wsmousedevprint);
sc 200 dev/adb/ams.c ems_init(struct ams_softc *sc)
sc 206 dev/adb/ams.c adbaddr = sc->adbaddr;
sc 207 dev/adb/ams.c if (sc->origaddr != ADBADDR_MS)
sc 209 dev/adb/ams.c if (sc->handler_id == ADBMS_USPEED ||
sc 210 dev/adb/ams.c sc->handler_id == ADBMS_UCONTOUR) {
sc 240 dev/adb/ams.c sc->sc_buttons = 3;
sc 241 dev/adb/ams.c sc->sc_res = 200;
sc 244 dev/adb/ams.c if (sc->handler_id == ADBMS_TURBO) {
sc 262 dev/adb/ams.c if ((sc->handler_id == ADBMS_100DPI) ||
sc 263 dev/adb/ams.c (sc->handler_id == ADBMS_200DPI)) {
sc 292 dev/adb/ams.c sc->handler_id = ADBMS_EXTENDED;
sc 301 dev/adb/ams.c sc->sc_class = buffer[7];
sc 302 dev/adb/ams.c sc->sc_buttons = buffer[8];
sc 303 dev/adb/ams.c sc->sc_res = (int)*(short *)&buffer[5];
sc 304 dev/adb/ams.c bcopy(&(buffer[1]), sc->sc_devid, 4);
sc 336 dev/adb/ams.c sc->sc_buttons = 3;
sc 337 dev/adb/ams.c sc->sc_res = 400;
sc 339 dev/adb/ams.c sc->sc_class = MSCLASS_TRACKBALL;
sc 341 dev/adb/ams.c sc->sc_class = MSCLASS_MOUSE;
sc 363 dev/adb/ams.c sc->handler_id = ADBMS_MSA3;
sc 376 dev/adb/ams.c sc->sc_buttons = 3;
sc 377 dev/adb/ams.c sc->sc_res = 300;
sc 393 dev/adb/ams.c struct ams_softc *sc;
sc 403 dev/adb/ams.c sc = (struct ams_softc *)data_area;
sc 405 dev/adb/ams.c if ((sc->handler_id == ADBMS_EXTENDED) && (sc->sc_devid[0] == 0)) {
sc 427 dev/adb/ams.c sc->handler_id, sc->origaddr, buffer[0]);
sc 434 dev/adb/ams.c ms_processevent(&event, sc);
sc 442 dev/adb/ams.c ms_processevent(adb_event_t *event, struct ams_softc *sc)
sc 455 dev/adb/ams.c switch (sc->handler_id) {
sc 480 dev/adb/ams.c if (sc->sc_class == MSCLASS_MOUSE)
sc 494 dev/adb/ams.c buttons |= sc->sc_mb;
sc 500 dev/adb/ams.c if (sc->sc_wsmousedev)
sc 501 dev/adb/ams.c wsmouse_input(sc->sc_wsmousedev, buttons, dx, -dy, 0, 0,
sc 377 dev/ata/wd.c struct wd_softc *sc = (struct wd_softc *)self;
sc 383 dev/ata/wd.c for (dp = &sc->sc_q; (bp = dp->b_actf) != NULL; ) {
sc 402 dev/ata/wd.c if (sc->sc_sdhook != NULL)
sc 403 dev/ata/wd.c shutdownhook_disestablish(sc->sc_sdhook);
sc 406 dev/ata/wd.c disk_detach(&sc->sc_dk);
sc 140 dev/audio.c void audio_selwakeup(struct audio_softc *sc, int play);
sc 232 dev/audio.c struct audio_softc *sc = (void *)self;
sc 258 dev/audio.c sc->hw_if = 0;
sc 263 dev/audio.c sc->hw_if = hwp;
sc 264 dev/audio.c sc->hw_hdl = hdlp;
sc 265 dev/audio.c sc->sc_dev = parent;
sc 267 dev/audio.c error = audio_alloc_ring(sc, &sc->sc_pr, AUMODE_PLAY, AU_RING_SIZE);
sc 269 dev/audio.c sc->hw_if = 0;
sc 273 dev/audio.c error = audio_alloc_ring(sc, &sc->sc_rr, AUMODE_RECORD, AU_RING_SIZE);
sc 275 dev/audio.c audio_free_ring(sc, &sc->sc_pr);
sc 276 dev/audio.c sc->hw_if = 0;
sc 284 dev/audio.c sc->sc_pparams = audio_default;
sc 285 dev/audio.c sc->sc_rparams = audio_default;
sc 288 dev/audio.c sc->sc_blkset = 0;
sc 289 dev/audio.c audio_calc_blksize(sc, AUMODE_RECORD);
sc 290 dev/audio.c audio_calc_blksize(sc, AUMODE_PLAY);
sc 291 dev/audio.c audio_init_ringbuffer(&sc->sc_rr);
sc 292 dev/audio.c audio_init_ringbuffer(&sc->sc_pr);
sc 293 dev/audio.c audio_calcwater(sc);
sc 296 dev/audio.c sc->sc_inports.index = -1;
sc 297 dev/audio.c sc->sc_inports.nports = 0;
sc 298 dev/audio.c sc->sc_inports.isenum = 0;
sc 299 dev/audio.c sc->sc_inports.allports = 0;
sc 300 dev/audio.c sc->sc_outports.index = -1;
sc 301 dev/audio.c sc->sc_outports.nports = 0;
sc 302 dev/audio.c sc->sc_outports.isenum = 0;
sc 303 dev/audio.c sc->sc_outports.allports = 0;
sc 304 dev/audio.c sc->sc_monitor_port = -1;
sc 323 dev/audio.c au_check_ports(sc, &sc->sc_inports, &mi, iclass,
sc 325 dev/audio.c au_check_ports(sc, &sc->sc_outports, &mi, oclass,
sc 329 dev/audio.c sc->sc_monitor_port = mi.index;
sc 330 dev/audio.c if ((sc->sc_monitor_port == -1) && (mi.mixer_class == oclass) &&
sc 332 dev/audio.c sc->sc_monitor_port = mi.index;
sc 335 dev/audio.c sc->sc_inports.allports, sc->sc_outports.allports));
sc 341 dev/audio.c struct audio_softc *sc = (struct audio_softc *)self;
sc 348 dev/audio.c sc->sc_dying = 1;
sc 357 dev/audio.c struct audio_softc *sc = (struct audio_softc *)self;
sc 361 dev/audio.c DPRINTF(("audio_detach: sc=%p flags=%d\n", sc, flags));
sc 363 dev/audio.c sc->sc_dying = 1;
sc 365 dev/audio.c wakeup(&sc->sc_wchan);
sc 366 dev/audio.c wakeup(&sc->sc_rchan);
sc 368 dev/audio.c if (--sc->sc_refcnt >= 0) {
sc 369 dev/audio.c if (tsleep(&sc->sc_refcnt, PZERO, "auddet", hz * 120))
sc 371 dev/audio.c sc->dev.dv_xname);
sc 376 dev/audio.c audio_free_ring(sc, &sc->sc_pr);
sc 377 dev/audio.c audio_free_ring(sc, &sc->sc_rr);
sc 395 dev/audio.c au_portof(struct audio_softc *sc, char *name)
sc 400 dev/audio.c sc->hw_if->query_devinfo(sc->hw_hdl, &mi) == 0;
sc 408 dev/audio.c au_check_ports(struct audio_softc *sc, struct au_mixer_ports *ports,
sc 430 dev/audio.c au_portof(sc, mi->un.e.member[j].label.name);
sc 445 dev/audio.c au_portof(sc, mi->un.s.member[j].label.name);
sc 508 dev/audio.c audio_printsc(struct audio_softc *sc)
sc 510 dev/audio.c printf("hwhandle %p hw_if %p ", sc->hw_hdl, sc->hw_if);
sc 511 dev/audio.c printf("open 0x%x mode 0x%x\n", sc->sc_open, sc->sc_mode);
sc 512 dev/audio.c printf("rchan 0x%x wchan 0x%x ", sc->sc_rchan, sc->sc_wchan);
sc 513 dev/audio.c printf("rring used 0x%x pring used=%d\n", sc->sc_rr.used, sc->sc_pr.used);
sc 514 dev/audio.c printf("rbus 0x%x pbus 0x%x ", sc->sc_rbus, sc->sc_pbus);
sc 515 dev/audio.c printf("blksize %d", sc->sc_pr.blksize);
sc 516 dev/audio.c printf("hiwat %d lowat %d\n", sc->sc_pr.usedhigh, sc->sc_pr.usedlow);
sc 528 dev/audio.c audio_alloc_ring(struct audio_softc *sc, struct audio_ringbuffer *r,
sc 531 dev/audio.c struct audio_hw_if *hw = sc->hw_if;
sc 532 dev/audio.c void *hdl = sc->hw_hdl;
sc 553 dev/audio.c audio_free_ring(struct audio_softc *sc, struct audio_ringbuffer *r)
sc 555 dev/audio.c if (sc->hw_if->freem) {
sc 556 dev/audio.c sc->hw_if->freem(sc->hw_hdl, r->start, M_DEVBUF);
sc 566 dev/audio.c struct audio_softc *sc;
sc 570 dev/audio.c (sc = audio_cd.cd_devs[unit]) == NULL)
sc 573 dev/audio.c if (sc->sc_dying)
sc 576 dev/audio.c if (!sc->hw_if)
sc 579 dev/audio.c sc->sc_refcnt ++;
sc 584 dev/audio.c error = audio_open(dev, sc, flags, ifmt, p);
sc 587 dev/audio.c error = mixer_open(dev, sc, flags, ifmt, p);
sc 594 dev/audio.c if (--sc->sc_refcnt < 0)
sc 595 dev/audio.c wakeup(&sc->sc_refcnt);
sc 621 dev/audio.c struct audio_softc *sc;
sc 625 dev/audio.c (sc = audio_cd.cd_devs[unit]) == NULL)
sc 628 dev/audio.c if (sc->sc_dying)
sc 631 dev/audio.c sc->sc_refcnt ++;
sc 646 dev/audio.c if (--sc->sc_refcnt < 0)
sc 647 dev/audio.c wakeup(&sc->sc_refcnt);
sc 655 dev/audio.c struct audio_softc *sc;
sc 659 dev/audio.c (sc = audio_cd.cd_devs[unit]) == NULL)
sc 662 dev/audio.c if (sc->sc_dying)
sc 665 dev/audio.c sc->sc_refcnt ++;
sc 680 dev/audio.c if (--sc->sc_refcnt < 0)
sc 681 dev/audio.c wakeup(&sc->sc_refcnt);
sc 689 dev/audio.c struct audio_softc *sc;
sc 693 dev/audio.c (sc = audio_cd.cd_devs[unit]) == NULL)
sc 696 dev/audio.c if (sc->sc_dying)
sc 699 dev/audio.c sc->sc_refcnt ++;
sc 714 dev/audio.c if (--sc->sc_refcnt < 0)
sc 715 dev/audio.c wakeup(&sc->sc_refcnt);
sc 723 dev/audio.c struct audio_softc *sc;
sc 727 dev/audio.c (sc = audio_cd.cd_devs[unit]) == NULL)
sc 730 dev/audio.c if (sc->sc_dying)
sc 733 dev/audio.c sc->sc_refcnt ++;
sc 748 dev/audio.c if (--sc->sc_refcnt < 0)
sc 749 dev/audio.c wakeup(&sc->sc_refcnt);
sc 757 dev/audio.c struct audio_softc *sc;
sc 761 dev/audio.c (sc = audio_cd.cd_devs[unit]) == NULL)
sc 764 dev/audio.c if (sc->sc_dying)
sc 767 dev/audio.c sc->sc_refcnt ++;
sc 782 dev/audio.c if (--sc->sc_refcnt < 0)
sc 783 dev/audio.c wakeup(&sc->sc_refcnt);
sc 820 dev/audio.c audio_initbufs(struct audio_softc *sc)
sc 822 dev/audio.c struct audio_hw_if *hw = sc->hw_if;
sc 825 dev/audio.c DPRINTF(("audio_initbufs: mode=0x%x\n", sc->sc_mode));
sc 826 dev/audio.c audio_init_ringbuffer(&sc->sc_rr);
sc 827 dev/audio.c if (hw->init_input && (sc->sc_mode & AUMODE_RECORD)) {
sc 828 dev/audio.c error = hw->init_input(sc->hw_hdl, sc->sc_rr.start,
sc 829 dev/audio.c sc->sc_rr.end - sc->sc_rr.start);
sc 834 dev/audio.c audio_init_ringbuffer(&sc->sc_pr);
sc 835 dev/audio.c sc->sc_sil_count = 0;
sc 836 dev/audio.c if (hw->init_output && (sc->sc_mode & AUMODE_PLAY)) {
sc 837 dev/audio.c error = hw->init_output(sc->hw_hdl, sc->sc_pr.start,
sc 838 dev/audio.c sc->sc_pr.end - sc->sc_pr.start);
sc 844 dev/audio.c sc->sc_pnintr = 0;
sc 845 dev/audio.c sc->sc_pblktime = (u_long)(
sc 846 dev/audio.c (u_long)sc->sc_pr.blksize * 100000 /
sc 847 dev/audio.c (u_long)(sc->sc_pparams.precision / NBBY *
sc 848 dev/audio.c sc->sc_pparams.channels *
sc 849 dev/audio.c sc->sc_pparams.sample_rate)) * 10;
sc 851 dev/audio.c sc->sc_pblktime, sc->sc_pr.blksize));
sc 852 dev/audio.c sc->sc_rnintr = 0;
sc 853 dev/audio.c sc->sc_rblktime = (u_long)(
sc 854 dev/audio.c (u_long)sc->sc_rr.blksize * 100000 /
sc 855 dev/audio.c (u_long)(sc->sc_rparams.precision / NBBY *
sc 856 dev/audio.c sc->sc_rparams.channels *
sc 857 dev/audio.c sc->sc_rparams.sample_rate)) * 10;
sc 859 dev/audio.c sc->sc_rblktime, sc->sc_rr.blksize));
sc 866 dev/audio.c audio_calcwater(struct audio_softc *sc)
sc 868 dev/audio.c sc->sc_pr.usedhigh = sc->sc_pr.end - sc->sc_pr.start;
sc 869 dev/audio.c sc->sc_pr.usedlow = sc->sc_pr.usedhigh * 3 / 4; /* set lowater at 75% */
sc 870 dev/audio.c if (sc->sc_pr.usedlow == sc->sc_pr.usedhigh)
sc 871 dev/audio.c sc->sc_pr.usedlow -= sc->sc_pr.blksize;
sc 872 dev/audio.c sc->sc_rr.usedhigh = sc->sc_rr.end - sc->sc_rr.start - sc->sc_rr.blksize;
sc 873 dev/audio.c sc->sc_rr.usedlow = 0;
sc 914 dev/audio.c audio_open(dev_t dev, struct audio_softc *sc, int flags, int ifmt,
sc 921 dev/audio.c DPRINTF(("audio_open: dev=0x%x flags=0x%x sc=%p hdl=%p\n", dev, flags, sc, sc->hw_hdl));
sc 926 dev/audio.c if ((sc->sc_open & (AUOPEN_READ|AUOPEN_WRITE)) != 0)
sc 929 dev/audio.c error = sc->hw_if->open(sc->hw_hdl, flags);
sc 933 dev/audio.c sc->sc_async_audio = 0;
sc 934 dev/audio.c sc->sc_rchan = 0;
sc 935 dev/audio.c sc->sc_wchan = 0;
sc 936 dev/audio.c sc->sc_blkset = 0; /* Block sizes not set yet */
sc 937 dev/audio.c sc->sc_sil_count = 0;
sc 938 dev/audio.c sc->sc_rbus = 0;
sc 939 dev/audio.c sc->sc_pbus = 0;
sc 940 dev/audio.c sc->sc_eof = 0;
sc 941 dev/audio.c sc->sc_playdrop = 0;
sc 943 dev/audio.c sc->sc_full_duplex = 0;
sc 951 dev/audio.c sc->sc_open |= AUOPEN_READ;
sc 955 dev/audio.c sc->sc_open |= AUOPEN_WRITE;
sc 966 dev/audio.c sc->sc_rparams = audio_default;
sc 967 dev/audio.c sc->sc_pparams = audio_default;
sc 975 dev/audio.c if (sc->sc_rparams.precision == 0 || sc->sc_pparams.precision == 0) {
sc 983 dev/audio.c ai.record.sample_rate = sc->sc_rparams.sample_rate;
sc 984 dev/audio.c ai.record.encoding = sc->sc_rparams.encoding;
sc 985 dev/audio.c ai.record.channels = sc->sc_rparams.channels;
sc 986 dev/audio.c ai.record.precision = sc->sc_rparams.precision;
sc 988 dev/audio.c ai.play.sample_rate = sc->sc_pparams.sample_rate;
sc 989 dev/audio.c ai.play.encoding = sc->sc_pparams.encoding;
sc 990 dev/audio.c ai.play.channels = sc->sc_pparams.channels;
sc 991 dev/audio.c ai.play.precision = sc->sc_pparams.precision;
sc 994 dev/audio.c sc->sc_pr.blksize = sc->sc_rr.blksize = 0; /* force recalculation */
sc 995 dev/audio.c error = audiosetinfo(sc, &ai);
sc 999 dev/audio.c DPRINTF(("audio_open: done sc_mode = 0x%x\n", sc->sc_mode));
sc 1004 dev/audio.c sc->hw_if->close(sc->hw_hdl);
sc 1005 dev/audio.c sc->sc_open = 0;
sc 1006 dev/audio.c sc->sc_mode = 0;
sc 1007 dev/audio.c sc->sc_full_duplex = 0;
sc 1015 dev/audio.c audio_init_record(struct audio_softc *sc)
sc 1019 dev/audio.c if (sc->hw_if->speaker_ctl &&
sc 1020 dev/audio.c (!sc->sc_full_duplex || (sc->sc_mode & AUMODE_PLAY) == 0))
sc 1021 dev/audio.c sc->hw_if->speaker_ctl(sc->hw_hdl, SPKR_OFF);
sc 1029 dev/audio.c audio_init_play(struct audio_softc *sc)
sc 1033 dev/audio.c sc->sc_wstamp = sc->sc_pr.stamp;
sc 1034 dev/audio.c if (sc->hw_if->speaker_ctl)
sc 1035 dev/audio.c sc->hw_if->speaker_ctl(sc->hw_hdl, SPKR_ON);
sc 1040 dev/audio.c audio_drain(struct audio_softc *sc)
sc 1043 dev/audio.c struct audio_ringbuffer *cb = &sc->sc_pr;
sc 1047 dev/audio.c sc->sc_pbus, sc->sc_pr.used));
sc 1048 dev/audio.c if (sc->sc_pr.mmapped || sc->sc_pr.used <= 0)
sc 1050 dev/audio.c if (!sc->sc_pbus) {
sc 1058 dev/audio.c if (sc->sc_pparams.sw_code) {
sc 1059 dev/audio.c int ncc = cc / sc->sc_pparams.factor;
sc 1060 dev/audio.c audio_fill_silence(&sc->sc_pparams, inp, ncc);
sc 1061 dev/audio.c sc->sc_pparams.sw_code(sc->hw_hdl, inp, ncc);
sc 1063 dev/audio.c audio_fill_silence(&sc->sc_pparams, inp, cc);
sc 1070 dev/audio.c error = audiostartp(sc);
sc 1091 dev/audio.c DPRINTF(("audio_drain: used=%d, drops=%ld\n", sc->sc_pr.used, cb->drops));
sc 1096 dev/audio.c error = audio_sleep_timo(&sc->sc_wchan, "aud_dr", 30*hz);
sc 1097 dev/audio.c if (sc->sc_dying)
sc 1112 dev/audio.c struct audio_softc *sc = audio_cd.cd_devs[unit];
sc 1113 dev/audio.c struct audio_hw_if *hw = sc->hw_if;
sc 1120 dev/audio.c if ((flags & FREAD) && sc->sc_rbus) {
sc 1126 dev/audio.c if (!sc->sc_full_duplex || sc->hw_if->halt_input != sc->hw_if->halt_output)
sc 1127 dev/audio.c sc->hw_if->halt_input(sc->hw_hdl);
sc 1128 dev/audio.c sc->sc_rbus = 0;
sc 1133 dev/audio.c sc->sc_pr.usedlow = sc->sc_pr.blksize; /* avoid excessive wakeups */
sc 1138 dev/audio.c if ((flags & FWRITE) && sc->sc_pbus) {
sc 1139 dev/audio.c if (!sc->sc_pr.pause && !audio_drain(sc) && hw->drain)
sc 1140 dev/audio.c (void)hw->drain(sc->hw_hdl);
sc 1141 dev/audio.c sc->hw_if->halt_output(sc->hw_hdl);
sc 1142 dev/audio.c sc->sc_pbus = 0;
sc 1145 dev/audio.c hw->close(sc->hw_hdl);
sc 1153 dev/audio.c sc->sc_open &= ~AUOPEN_READ;
sc 1154 dev/audio.c sc->sc_mode &= ~AUMODE_RECORD;
sc 1157 dev/audio.c sc->sc_open &= ~AUOPEN_WRITE;
sc 1158 dev/audio.c sc->sc_mode &= ~(AUMODE_PLAY|AUMODE_PLAY_ALL);
sc 1161 dev/audio.c sc->sc_async_audio = 0;
sc 1162 dev/audio.c sc->sc_full_duplex = 0;
sc 1173 dev/audio.c struct audio_softc *sc = audio_cd.cd_devs[unit];
sc 1174 dev/audio.c struct audio_ringbuffer *cb = &sc->sc_rr;
sc 1182 dev/audio.c uio->uio_resid, sc->sc_mode));
sc 1189 dev/audio.c if (!sc->sc_full_duplex &&
sc 1190 dev/audio.c (sc->sc_mode & AUMODE_PLAY)) {
sc 1194 dev/audio.c cc = sc->sc_pr.stamp - sc->sc_wstamp;
sc 1198 dev/audio.c sc->sc_pr.stamp, sc->sc_wstamp));
sc 1203 dev/audio.c error = audio_sleep(&sc->sc_rchan, "aud_hr");
sc 1204 dev/audio.c if (sc->sc_dying)
sc 1213 dev/audio.c if (uio->uio_resid < cc / sc->sc_rparams.factor)
sc 1214 dev/audio.c cc = uio->uio_resid * sc->sc_rparams.factor;
sc 1216 dev/audio.c error = audio_silence_copyout(sc,
sc 1217 dev/audio.c cc / sc->sc_rparams.factor, uio);
sc 1218 dev/audio.c sc->sc_wstamp += cc;
sc 1225 dev/audio.c if (!sc->sc_rbus && !sc->sc_rr.pause) {
sc 1226 dev/audio.c error = audiostartr(sc);
sc 1237 dev/audio.c error = audio_sleep(&sc->sc_rchan, "aud_rd");
sc 1238 dev/audio.c if (sc->sc_dying)
sc 1255 dev/audio.c if (uio->uio_resid < cc / sc->sc_rparams.factor)
sc 1256 dev/audio.c cc = uio->uio_resid * sc->sc_rparams.factor;
sc 1258 dev/audio.c if (sc->sc_rparams.sw_code)
sc 1259 dev/audio.c sc->sc_rparams.sw_code(sc->hw_hdl, outp, cc);
sc 1261 dev/audio.c error = uiomove(outp, cc / sc->sc_rparams.factor, uio);
sc 1276 dev/audio.c audio_clear(struct audio_softc *sc)
sc 1280 dev/audio.c if (sc->sc_rbus) {
sc 1281 dev/audio.c audio_wakeup(&sc->sc_rchan);
sc 1282 dev/audio.c sc->hw_if->halt_input(sc->hw_hdl);
sc 1283 dev/audio.c sc->sc_rbus = 0;
sc 1285 dev/audio.c if (sc->sc_pbus) {
sc 1286 dev/audio.c audio_wakeup(&sc->sc_wchan);
sc 1287 dev/audio.c sc->hw_if->halt_output(sc->hw_hdl);
sc 1288 dev/audio.c sc->sc_pbus = 0;
sc 1294 dev/audio.c audio_calc_blksize(struct audio_softc *sc, int mode)
sc 1296 dev/audio.c struct audio_hw_if *hw = sc->hw_if;
sc 1301 dev/audio.c if (sc->sc_blkset)
sc 1305 dev/audio.c parm = &sc->sc_pparams;
sc 1306 dev/audio.c rb = &sc->sc_pr;
sc 1308 dev/audio.c parm = &sc->sc_rparams;
sc 1309 dev/audio.c rb = &sc->sc_rr;
sc 1317 dev/audio.c bs = hw->round_blocksize(sc->hw_hdl, bs);
sc 1380 dev/audio.c audio_silence_copyout(struct audio_softc *sc, int n, struct uio *uio)
sc 1386 dev/audio.c audio_fill_silence(&sc->sc_rparams, zerobuf, sizeof zerobuf);
sc 1401 dev/audio.c struct audio_softc *sc = audio_cd.cd_devs[unit];
sc 1402 dev/audio.c struct audio_ringbuffer *cb = &sc->sc_pr;
sc 1406 dev/audio.c DPRINTFN(2, ("audio_write: sc=%p(unit=%d) count=%d used=%d(hi=%d)\n", sc, unit,
sc 1407 dev/audio.c uio->uio_resid, sc->sc_pr.used, sc->sc_pr.usedhigh));
sc 1413 dev/audio.c sc->sc_eof++;
sc 1420 dev/audio.c if (!sc->sc_full_duplex &&
sc 1421 dev/audio.c (sc->sc_mode & AUMODE_RECORD)) {
sc 1428 dev/audio.c if (!(sc->sc_mode & AUMODE_PLAY_ALL) && sc->sc_playdrop > 0) {
sc 1429 dev/audio.c n = min(sc->sc_playdrop, uio->uio_resid * sc->sc_pparams.factor);
sc 1431 dev/audio.c uio->uio_offset += n / sc->sc_pparams.factor;
sc 1432 dev/audio.c uio->uio_resid -= n / sc->sc_pparams.factor;
sc 1433 dev/audio.c sc->sc_playdrop -= n;
sc 1439 dev/audio.c sc->sc_pparams.sample_rate, sc->sc_pparams.encoding,
sc 1440 dev/audio.c sc->sc_pparams.precision, sc->sc_pparams.channels,
sc 1441 dev/audio.c sc->sc_pparams.sw_code, sc->sc_pparams.factor));
sc 1453 dev/audio.c error = audio_sleep(&sc->sc_wchan, "aud_wr");
sc 1454 dev/audio.c if (sc->sc_dying)
sc 1467 dev/audio.c if (sc->sc_pparams.factor != 1) {
sc 1469 dev/audio.c n /= sc->sc_pparams.factor;
sc 1470 dev/audio.c cc /= sc->sc_pparams.factor;
sc 1484 dev/audio.c sc->sc_pparams.sw_code, sc->sc_pparams.factor);
sc 1504 dev/audio.c if (sc->sc_pparams.sw_code) {
sc 1505 dev/audio.c sc->sc_pparams.sw_code(sc->hw_hdl, inp, cc);
sc 1507 dev/audio.c cc *= sc->sc_pparams.factor;
sc 1520 dev/audio.c sc->sc_sil_count = 0;
sc 1538 dev/audio.c if (!sc->sc_pbus && !cb->pause) {
sc 1540 dev/audio.c error = audiostartp(sc);
sc 1549 dev/audio.c if (sc->sc_pparams.sw_code) {
sc 1550 dev/audio.c int ncc = cc / sc->sc_pparams.factor;
sc 1551 dev/audio.c audio_fill_silence(&sc->sc_pparams, einp, ncc);
sc 1552 dev/audio.c sc->sc_pparams.sw_code(sc->hw_hdl, einp, ncc);
sc 1554 dev/audio.c audio_fill_silence(&sc->sc_pparams, einp, cc);
sc 1564 dev/audio.c struct audio_softc *sc = audio_cd.cd_devs[unit];
sc 1565 dev/audio.c struct audio_hw_if *hw = sc->hw_if;
sc 1579 dev/audio.c if (sc->sc_async_audio)
sc 1581 dev/audio.c sc->sc_async_audio = p;
sc 1584 dev/audio.c sc->sc_async_audio = 0;
sc 1589 dev/audio.c rbus = sc->sc_rbus;
sc 1590 dev/audio.c pbus = sc->sc_pbus;
sc 1591 dev/audio.c audio_clear(sc);
sc 1593 dev/audio.c error = audio_initbufs(sc);
sc 1598 dev/audio.c sc->sc_rr.pause = 0;
sc 1599 dev/audio.c sc->sc_pr.pause = 0;
sc 1600 dev/audio.c if ((sc->sc_mode & AUMODE_PLAY) && !sc->sc_pbus && pbus)
sc 1601 dev/audio.c error = audiostartp(sc);
sc 1603 dev/audio.c (sc->sc_mode & AUMODE_RECORD) && !sc->sc_rbus && rbus)
sc 1604 dev/audio.c error = audiostartr(sc);
sc 1624 dev/audio.c *(int *)addr = (sc->sc_rr.drops * NBBY) /
sc 1625 dev/audio.c (sc->sc_rparams.factor * sc->sc_rparams.channels *
sc 1626 dev/audio.c sc->sc_rparams.precision);
sc 1630 dev/audio.c *(int *)addr = (sc->sc_pr.drops * NBBY) /
sc 1631 dev/audio.c (sc->sc_pparams.factor * sc->sc_pparams.channels *
sc 1632 dev/audio.c sc->sc_pparams.precision);
sc 1642 dev/audio.c ao->samples = sc->sc_rr.stamp;
sc 1643 dev/audio.c ao->deltablks = (sc->sc_rr.stamp - sc->sc_rr.stamp_last) / sc->sc_rr.blksize;
sc 1644 dev/audio.c sc->sc_rr.stamp_last = sc->sc_rr.stamp;
sc 1645 dev/audio.c ao->offset = sc->sc_rr.inp - sc->sc_rr.start;
sc 1653 dev/audio.c offs = sc->sc_pr.outp - sc->sc_pr.start + sc->sc_pr.blksize;
sc 1654 dev/audio.c if (sc->sc_pr.start + offs >= sc->sc_pr.end)
sc 1656 dev/audio.c ao->samples = sc->sc_pr.stamp;
sc 1657 dev/audio.c ao->deltablks = (sc->sc_pr.stamp - sc->sc_pr.stamp_last) / sc->sc_pr.blksize;
sc 1658 dev/audio.c sc->sc_pr.stamp_last = sc->sc_pr.stamp;
sc 1668 dev/audio.c *(u_long *)addr = sc->sc_pr.used / sc->sc_pparams.factor;
sc 1672 dev/audio.c DPRINTF(("AUDIO_SETINFO mode=0x%x\n", sc->sc_mode));
sc 1673 dev/audio.c error = audiosetinfo(sc, (struct audio_info *)addr);
sc 1678 dev/audio.c error = audiogetinfo(sc, (struct audio_info *)addr);
sc 1683 dev/audio.c error = audio_drain(sc);
sc 1685 dev/audio.c error = hw->drain(sc->hw_hdl);
sc 1690 dev/audio.c error = hw->getdev(sc->hw_hdl, (audio_device_t *)addr);
sc 1696 dev/audio.c ((struct audio_encoding *)addr)->flags = sc->sc_open;
sc 1697 dev/audio.c error = hw->query_encoding(sc->hw_hdl, (struct audio_encoding *)addr);
sc 1702 dev/audio.c *(int *)addr = sc->sc_full_duplex;
sc 1708 dev/audio.c if (hw->get_props(sc->hw_hdl) & AUDIO_PROP_FULLDUPLEX) {
sc 1710 dev/audio.c error = hw->setfd(sc->hw_hdl, fd);
sc 1714 dev/audio.c sc->sc_full_duplex = fd;
sc 1725 dev/audio.c *(int *)addr = hw->get_props(sc->hw_hdl);
sc 1739 dev/audio.c audio_selwakeup(struct audio_softc *sc, int play)
sc 1743 dev/audio.c si = play? &sc->sc_wsel : &sc->sc_rsel;
sc 1745 dev/audio.c audio_wakeup(play? &sc->sc_wchan : &sc->sc_rchan);
sc 1747 dev/audio.c if (sc->sc_async_audio)
sc 1748 dev/audio.c psignal(sc->sc_async_audio, SIGIO);
sc 1752 dev/audio.c #define AUDIO_FILTREAD(sc) ( \
sc 1753 dev/audio.c (!sc->sc_full_duplex && (sc->sc_mode & AUMODE_PLAY)) ? \
sc 1754 dev/audio.c sc->sc_pr.stamp > sc->sc_wstamp : sc->sc_rr.used > sc->sc_rr.usedlow)
sc 1756 dev/audio.c #define AUDIO_FILTWRITE(sc) ( \
sc 1757 dev/audio.c (!sc->sc_full_duplex && (sc->sc_mode & AUMODE_RECORD)) || \
sc 1758 dev/audio.c (!(sc->sc_mode & AUMODE_PLAY_ALL) && sc->sc_playdrop > 0) || \
sc 1759 dev/audio.c (sc->sc_pr.used <= sc->sc_pr.usedlow))
sc 1765 dev/audio.c struct audio_softc *sc = audio_cd.cd_devs[unit];
sc 1768 dev/audio.c DPRINTF(("audio_poll: events=0x%x mode=%d\n", events, sc->sc_mode));
sc 1771 dev/audio.c if (AUDIO_FILTREAD(sc))
sc 1775 dev/audio.c if (AUDIO_FILTWRITE(sc))
sc 1780 dev/audio.c selrecord(p, &sc->sc_rsel);
sc 1782 dev/audio.c selrecord(p, &sc->sc_wsel);
sc 1793 dev/audio.c struct audio_softc *sc = audio_cd.cd_devs[unit];
sc 1794 dev/audio.c struct audio_hw_if *hw = sc->hw_if;
sc 1799 dev/audio.c if (!(hw->get_props(sc->hw_hdl) & AUDIO_PROP_MMAP) || !hw->mappage)
sc 1816 dev/audio.c cb = &sc->sc_pr;
sc 1818 dev/audio.c cb = &sc->sc_rr;
sc 1822 dev/audio.c cb = &sc->sc_pr;
sc 1829 dev/audio.c if (cb == &sc->sc_pr) {
sc 1830 dev/audio.c audio_fill_silence(&sc->sc_pparams, cb->start, cb->bufsize);
sc 1832 dev/audio.c if (!sc->sc_pbus && !sc->sc_pr.pause)
sc 1833 dev/audio.c (void)audiostartp(sc);
sc 1837 dev/audio.c if (!sc->sc_rbus && !sc->sc_rr.pause)
sc 1838 dev/audio.c (void)audiostartr(sc);
sc 1843 dev/audio.c return hw->mappage(sc->hw_hdl, cb->start, off, prot);
sc 1847 dev/audio.c audiostartr(struct audio_softc *sc)
sc 1852 dev/audio.c sc->sc_rr.start, sc->sc_rr.used, sc->sc_rr.usedhigh,
sc 1853 dev/audio.c sc->sc_rr.mmapped));
sc 1855 dev/audio.c if (sc->hw_if->trigger_input)
sc 1856 dev/audio.c error = sc->hw_if->trigger_input(sc->hw_hdl, sc->sc_rr.start,
sc 1857 dev/audio.c sc->sc_rr.end, sc->sc_rr.blksize,
sc 1858 dev/audio.c audio_rint, (void *)sc, &sc->sc_rparams);
sc 1860 dev/audio.c error = sc->hw_if->start_input(sc->hw_hdl, sc->sc_rr.start,
sc 1861 dev/audio.c sc->sc_rr.blksize, audio_rint, (void *)sc);
sc 1866 dev/audio.c sc->sc_rbus = 1;
sc 1871 dev/audio.c audiostartp(struct audio_softc *sc)
sc 1876 dev/audio.c sc->sc_pr.start, sc->sc_pr.used, sc->sc_pr.usedhigh,
sc 1877 dev/audio.c sc->sc_pr.mmapped));
sc 1879 dev/audio.c if (!sc->sc_pr.mmapped && sc->sc_pr.used < sc->sc_pr.blksize)
sc 1882 dev/audio.c if (sc->hw_if->trigger_output)
sc 1883 dev/audio.c error = sc->hw_if->trigger_output(sc->hw_hdl, sc->sc_pr.start,
sc 1884 dev/audio.c sc->sc_pr.end, sc->sc_pr.blksize,
sc 1885 dev/audio.c audio_pint, (void *)sc, &sc->sc_pparams);
sc 1887 dev/audio.c error = sc->hw_if->start_output(sc->hw_hdl, sc->sc_pr.outp,
sc 1888 dev/audio.c sc->sc_pr.blksize, audio_pint, (void *)sc);
sc 1893 dev/audio.c sc->sc_pbus = 1;
sc 1912 dev/audio.c audio_pint_silence(struct audio_softc *sc, struct audio_ringbuffer *cb,
sc 1917 dev/audio.c if (sc->sc_sil_count > 0) {
sc 1918 dev/audio.c s = sc->sc_sil_start; /* start of silence */
sc 1919 dev/audio.c e = s + sc->sc_sil_count; /* end of silence, may be beyond end */
sc 1928 dev/audio.c sc->sc_sil_count = max(sc->sc_sil_count, q-s);
sc 1930 dev/audio.c cc, inp, sc->sc_sil_count, (int)(cb->end - cb->start)));
sc 1932 dev/audio.c if (sc->sc_pparams.sw_code) {
sc 1933 dev/audio.c int ncc = cc / sc->sc_pparams.factor;
sc 1934 dev/audio.c audio_fill_silence(&sc->sc_pparams, inp, ncc);
sc 1935 dev/audio.c sc->sc_pparams.sw_code(sc->hw_hdl, inp, ncc);
sc 1937 dev/audio.c audio_fill_silence(&sc->sc_pparams, inp, cc);
sc 1944 dev/audio.c sc->sc_sil_start = inp;
sc 1945 dev/audio.c sc->sc_sil_count = cc;
sc 1949 dev/audio.c if (sc->sc_pparams.sw_code) {
sc 1950 dev/audio.c int ncc = cc / sc->sc_pparams.factor;
sc 1951 dev/audio.c audio_fill_silence(&sc->sc_pparams, inp, ncc);
sc 1952 dev/audio.c sc->sc_pparams.sw_code(sc->hw_hdl, inp, ncc);
sc 1954 dev/audio.c audio_fill_silence(&sc->sc_pparams, inp, cc);
sc 1968 dev/audio.c struct audio_softc *sc = v;
sc 1969 dev/audio.c struct audio_hw_if *hw = sc->hw_if;
sc 1970 dev/audio.c struct audio_ringbuffer *cb = &sc->sc_pr;
sc 1976 dev/audio.c if (!sc->sc_open)
sc 1991 dev/audio.c (void)hw->start_output(sc->hw_hdl, cb->outp,
sc 1992 dev/audio.c blksize, audio_pint, (void *)sc);
sc 2002 dev/audio.c if (sc->sc_pnintr) {
sc 2004 dev/audio.c lastdelta = t - sc->sc_plastintr - sc->sc_pblktime;
sc 2005 dev/audio.c if (lastdelta > sc->sc_pblktime / 3) {
sc 2007 dev/audio.c sc->sc_pnintr, lastdelta, sc->sc_pblktime);
sc 2009 dev/audio.c totdelta = t - sc->sc_pfirstintr - sc->sc_pblktime * sc->sc_pnintr;
sc 2010 dev/audio.c if (totdelta > sc->sc_pblktime) {
sc 2012 dev/audio.c sc->sc_pnintr, totdelta, sc->sc_pblktime);
sc 2013 dev/audio.c sc->sc_pnintr++; /* avoid repeated messages */
sc 2016 dev/audio.c sc->sc_pfirstintr = t;
sc 2017 dev/audio.c sc->sc_plastintr = t;
sc 2018 dev/audio.c sc->sc_pnintr++;
sc 2036 dev/audio.c sc->sc_playdrop += cc;
sc 2038 dev/audio.c audio_pint_silence(sc, cb, inp, cc);
sc 2047 dev/audio.c audio_pint_silence(sc, cb, inp, blksize);
sc 2053 dev/audio.c error = hw->start_output(sc->hw_hdl, cb->outp, blksize,
sc 2054 dev/audio.c audio_pint, (void *)sc);
sc 2058 dev/audio.c audio_clear(sc);
sc 2063 dev/audio.c sc->sc_mode, cb->pause, cb->used, cb->usedlow));
sc 2064 dev/audio.c if ((sc->sc_mode & AUMODE_PLAY) && !cb->pause &&
sc 2066 dev/audio.c audio_selwakeup(sc, 1);
sc 2069 dev/audio.c if (!sc->sc_full_duplex && sc->sc_rchan)
sc 2070 dev/audio.c audio_selwakeup(sc, 0);
sc 2081 dev/audio.c struct audio_softc *sc = v;
sc 2082 dev/audio.c struct audio_hw_if *hw = sc->hw_if;
sc 2083 dev/audio.c struct audio_ringbuffer *cb = &sc->sc_rr;
sc 2087 dev/audio.c if (!sc->sc_open)
sc 2102 dev/audio.c (void)hw->start_input(sc->hw_hdl, cb->inp, blksize,
sc 2103 dev/audio.c audio_rint, (void *)sc);
sc 2113 dev/audio.c if (sc->sc_rnintr) {
sc 2115 dev/audio.c lastdelta = t - sc->sc_rlastintr - sc->sc_rblktime;
sc 2116 dev/audio.c if (lastdelta > sc->sc_rblktime / 5) {
sc 2118 dev/audio.c sc->sc_rnintr, lastdelta, sc->sc_rblktime);
sc 2120 dev/audio.c totdelta = t - sc->sc_rfirstintr - sc->sc_rblktime * sc->sc_rnintr;
sc 2121 dev/audio.c if (totdelta > sc->sc_rblktime / 2) {
sc 2122 dev/audio.c sc->sc_rnintr++;
sc 2124 dev/audio.c sc->sc_rnintr, totdelta, sc->sc_rblktime);
sc 2125 dev/audio.c sc->sc_rnintr++; /* avoid repeated messages */
sc 2128 dev/audio.c sc->sc_rfirstintr = t;
sc 2129 dev/audio.c sc->sc_rlastintr = t;
sc 2130 dev/audio.c sc->sc_rnintr++;
sc 2150 dev/audio.c error = hw->start_input(sc->hw_hdl, cb->inp, blksize,
sc 2151 dev/audio.c audio_rint, (void *)sc);
sc 2155 dev/audio.c audio_clear(sc);
sc 2159 dev/audio.c audio_selwakeup(sc, 0);
sc 2222 dev/audio.c au_set_lr_value(struct audio_softc *sc, mixer_ctrl_t *ct, int l, int r)
sc 2228 dev/audio.c if (sc->hw_if->set_port(sc->hw_hdl, ct) == 0)
sc 2232 dev/audio.c return sc->hw_if->set_port(sc->hw_hdl, ct);
sc 2236 dev/audio.c au_set_gain(struct audio_softc *sc, struct au_mixer_ports *ports, int gain,
sc 2263 dev/audio.c error = au_set_lr_value(sc, &ct, l, r);
sc 2268 dev/audio.c error = sc->hw_if->get_port(sc->hw_hdl, &ct);
sc 2275 dev/audio.c au_set_lr_value(sc, &ct, l, r))
sc 2283 dev/audio.c error = sc->hw_if->get_port(sc->hw_hdl, &ct);
sc 2292 dev/audio.c au_set_lr_value(sc, &ct, l, r) == 0)
sc 2301 dev/audio.c mixer_signal(sc);
sc 2306 dev/audio.c au_get_lr_value(struct audio_softc *sc, mixer_ctrl_t *ct, int *l, int *r)
sc 2311 dev/audio.c if (sc->hw_if->get_port(sc->hw_hdl, ct) == 0) {
sc 2316 dev/audio.c error = sc->hw_if->get_port(sc->hw_hdl, ct);
sc 2325 dev/audio.c au_get_gain(struct audio_softc *sc, struct au_mixer_ports *ports, u_int *pgain,
sc 2338 dev/audio.c if (au_get_lr_value(sc, &ct, &lgain, &rgain))
sc 2344 dev/audio.c if (sc->hw_if->get_port(sc->hw_hdl, &ct))
sc 2351 dev/audio.c au_get_lr_value(sc, &ct,
sc 2360 dev/audio.c if (sc->hw_if->get_port(sc->hw_hdl, &ct))
sc 2368 dev/audio.c au_get_lr_value(sc, &ct, &l, &r))
sc 2398 dev/audio.c au_set_port(struct audio_softc *sc, struct au_mixer_ports *ports, u_int port)
sc 2417 dev/audio.c error = sc->hw_if->set_port(sc->hw_hdl, &ct);
sc 2429 dev/audio.c error = sc->hw_if->set_port(sc->hw_hdl, &ct);
sc 2432 dev/audio.c mixer_signal(sc);
sc 2437 dev/audio.c au_get_port(struct audio_softc *sc, struct au_mixer_ports *ports)
sc 2446 dev/audio.c if (sc->hw_if->get_port(sc->hw_hdl, &ct))
sc 2462 dev/audio.c audiosetinfo(struct audio_softc *sc, struct audio_info *ai)
sc 2468 dev/audio.c struct audio_hw_if *hw = sc->hw_if;
sc 2480 dev/audio.c rbus = sc->sc_rbus;
sc 2481 dev/audio.c pbus = sc->sc_pbus;
sc 2485 dev/audio.c pp = sc->sc_pparams; /* Temporary encoding storage in */
sc 2486 dev/audio.c rp = sc->sc_rparams; /* case setting the modes fails. */
sc 2534 dev/audio.c audio_clear(sc);
sc 2542 dev/audio.c audio_clear(sc);
sc 2551 dev/audio.c audio_clear(sc);
sc 2553 dev/audio.c sc->sc_mode = ai->mode;
sc 2554 dev/audio.c if (sc->sc_mode & AUMODE_PLAY_ALL)
sc 2555 dev/audio.c sc->sc_mode |= AUMODE_PLAY;
sc 2556 dev/audio.c if ((sc->sc_mode & AUMODE_PLAY) && !sc->sc_full_duplex)
sc 2558 dev/audio.c sc->sc_mode &= ~AUMODE_RECORD;
sc 2562 dev/audio.c int indep = hw->get_props(sc->hw_hdl) & AUDIO_PROP_INDEPENDENT;
sc 2569 dev/audio.c error = hw->set_params(sc->hw_hdl, setmode,
sc 2570 dev/audio.c sc->sc_mode & (AUMODE_PLAY | AUMODE_RECORD), &pp, &rp);
sc 2586 dev/audio.c sc->sc_rparams = rp;
sc 2587 dev/audio.c sc->sc_pparams = pp;
sc 2590 dev/audio.c oldpblksize = sc->sc_pr.blksize;
sc 2591 dev/audio.c oldrblksize = sc->sc_rr.blksize;
sc 2594 dev/audio.c audio_calc_blksize(sc, AUMODE_RECORD);
sc 2595 dev/audio.c audio_calc_blksize(sc, AUMODE_PLAY);
sc 2599 dev/audio.c audio_print_params("After setting record params", &sc->sc_rparams);
sc 2601 dev/audio.c audio_print_params("After setting play params", &sc->sc_pparams);
sc 2606 dev/audio.c audio_clear(sc);
sc 2609 dev/audio.c error = au_set_port(sc, &sc->sc_outports, p->port);
sc 2615 dev/audio.c audio_clear(sc);
sc 2618 dev/audio.c error = au_set_port(sc, &sc->sc_inports, r->port);
sc 2623 dev/audio.c au_get_gain(sc, &sc->sc_outports, &gain, &balance);
sc 2624 dev/audio.c error = au_set_gain(sc, &sc->sc_outports, p->gain, balance);
sc 2629 dev/audio.c au_get_gain(sc, &sc->sc_inports, &gain, &balance);
sc 2630 dev/audio.c error = au_set_gain(sc, &sc->sc_inports, r->gain, balance);
sc 2636 dev/audio.c au_get_gain(sc, &sc->sc_outports, &gain, &balance);
sc 2637 dev/audio.c error = au_set_gain(sc, &sc->sc_outports, gain, p->balance);
sc 2642 dev/audio.c au_get_gain(sc, &sc->sc_inports, &gain, &balance);
sc 2643 dev/audio.c error = au_set_gain(sc, &sc->sc_inports, gain, r->balance);
sc 2649 dev/audio.c sc->sc_monitor_port != -1) {
sc 2652 dev/audio.c ct.dev = sc->sc_monitor_port;
sc 2656 dev/audio.c error = sc->hw_if->set_port(sc->hw_hdl, &ct);
sc 2664 dev/audio.c audio_clear(sc);
sc 2668 dev/audio.c audio_calc_blksize(sc, AUMODE_RECORD);
sc 2669 dev/audio.c audio_calc_blksize(sc, AUMODE_PLAY);
sc 2670 dev/audio.c sc->sc_blkset = 0;
sc 2672 dev/audio.c int rbs = ai->blocksize * sc->sc_rparams.factor;
sc 2673 dev/audio.c int pbs = ai->blocksize * sc->sc_pparams.factor;
sc 2675 dev/audio.c rbs = hw->round_blocksize(sc->hw_hdl, rbs);
sc 2676 dev/audio.c pbs = hw->round_blocksize(sc->hw_hdl, pbs);
sc 2678 dev/audio.c sc->sc_rr.blksize = rbs;
sc 2679 dev/audio.c sc->sc_pr.blksize = pbs;
sc 2680 dev/audio.c sc->sc_blkset = 1;
sc 2685 dev/audio.c if (sc->sc_mode & AUMODE_PLAY)
sc 2686 dev/audio.c audio_init_play(sc);
sc 2687 dev/audio.c if (sc->sc_mode & AUMODE_RECORD)
sc 2688 dev/audio.c audio_init_record(sc);
sc 2692 dev/audio.c error = hw->commit_settings(sc->hw_hdl);
sc 2699 dev/audio.c error = audio_initbufs(sc);
sc 2701 dev/audio.c if (sc->sc_pr.blksize != oldpblksize ||
sc 2702 dev/audio.c sc->sc_rr.blksize != oldrblksize)
sc 2703 dev/audio.c audio_calcwater(sc);
sc 2704 dev/audio.c if ((sc->sc_mode & AUMODE_PLAY) &&
sc 2705 dev/audio.c pbus && !sc->sc_pbus && !sc->sc_pr.pause)
sc 2706 dev/audio.c error = audiostartp(sc);
sc 2708 dev/audio.c (sc->sc_mode & AUMODE_RECORD) &&
sc 2709 dev/audio.c rbus && !sc->sc_rbus && !sc->sc_rr.pause)
sc 2710 dev/audio.c error = audiostartr(sc);
sc 2720 dev/audio.c if (blks > sc->sc_pr.maxblks)
sc 2721 dev/audio.c blks = sc->sc_pr.maxblks;
sc 2724 dev/audio.c sc->sc_pr.usedhigh = blks * sc->sc_pr.blksize;
sc 2728 dev/audio.c if (blks > sc->sc_pr.maxblks - 1)
sc 2729 dev/audio.c blks = sc->sc_pr.maxblks - 1;
sc 2730 dev/audio.c sc->sc_pr.usedlow = blks * sc->sc_pr.blksize;
sc 2733 dev/audio.c if (sc->sc_pr.usedlow > sc->sc_pr.usedhigh - sc->sc_pr.blksize)
sc 2734 dev/audio.c sc->sc_pr.usedlow = sc->sc_pr.usedhigh - sc->sc_pr.blksize;
sc 2738 dev/audio.c sc->sc_pr.pause = p->pause;
sc 2739 dev/audio.c if (!p->pause && !sc->sc_pbus && (sc->sc_mode & AUMODE_PLAY)) {
sc 2741 dev/audio.c error = audiostartp(sc);
sc 2748 dev/audio.c sc->sc_rr.pause = r->pause;
sc 2749 dev/audio.c if (!r->pause && !sc->sc_rbus && (sc->sc_mode & AUMODE_RECORD)) {
sc 2751 dev/audio.c error = audiostartr(sc);
sc 2762 dev/audio.c audiogetinfo(struct audio_softc *sc, struct audio_info *ai)
sc 2765 dev/audio.c struct audio_hw_if *hw = sc->hw_if;
sc 2770 dev/audio.c p->sample_rate = sc->sc_pparams.sample_rate;
sc 2771 dev/audio.c r->sample_rate = sc->sc_rparams.sample_rate;
sc 2772 dev/audio.c p->channels = sc->sc_pparams.channels;
sc 2773 dev/audio.c r->channels = sc->sc_rparams.channels;
sc 2774 dev/audio.c p->precision = sc->sc_pparams.precision;
sc 2775 dev/audio.c r->precision = sc->sc_rparams.precision;
sc 2776 dev/audio.c p->encoding = sc->sc_pparams.encoding;
sc 2777 dev/audio.c r->encoding = sc->sc_rparams.encoding;
sc 2779 dev/audio.c r->port = au_get_port(sc, &sc->sc_inports);
sc 2780 dev/audio.c p->port = au_get_port(sc, &sc->sc_outports);
sc 2782 dev/audio.c r->avail_ports = sc->sc_inports.allports;
sc 2783 dev/audio.c p->avail_ports = sc->sc_outports.allports;
sc 2785 dev/audio.c au_get_gain(sc, &sc->sc_inports, &r->gain, &r->balance);
sc 2786 dev/audio.c au_get_gain(sc, &sc->sc_outports, &p->gain, &p->balance);
sc 2788 dev/audio.c if (sc->sc_monitor_port != -1) {
sc 2791 dev/audio.c ct.dev = sc->sc_monitor_port;
sc 2794 dev/audio.c if (sc->hw_if->get_port(sc->hw_hdl, &ct))
sc 2802 dev/audio.c p->seek = sc->sc_pr.used / sc->sc_pparams.factor;
sc 2803 dev/audio.c r->seek = sc->sc_rr.used / sc->sc_rparams.factor;
sc 2805 dev/audio.c p->samples = sc->sc_pr.stamp - sc->sc_pr.drops;
sc 2806 dev/audio.c r->samples = sc->sc_rr.stamp - sc->sc_rr.drops;
sc 2808 dev/audio.c p->eof = sc->sc_eof;
sc 2811 dev/audio.c p->pause = sc->sc_pr.pause;
sc 2812 dev/audio.c r->pause = sc->sc_rr.pause;
sc 2814 dev/audio.c p->error = sc->sc_pr.drops != 0;
sc 2815 dev/audio.c r->error = sc->sc_rr.drops != 0;
sc 2819 dev/audio.c p->open = (sc->sc_open & AUOPEN_WRITE) != 0;
sc 2820 dev/audio.c r->open = (sc->sc_open & AUOPEN_READ) != 0;
sc 2822 dev/audio.c p->active = sc->sc_pbus;
sc 2823 dev/audio.c r->active = sc->sc_rbus;
sc 2825 dev/audio.c p->buffer_size = sc->sc_pr.bufsize / sc->sc_pparams.factor;
sc 2826 dev/audio.c r->buffer_size = sc->sc_rr.bufsize / sc->sc_rparams.factor;
sc 2828 dev/audio.c if ((ai->blocksize = sc->sc_pr.blksize / sc->sc_pparams.factor) != 0) {
sc 2829 dev/audio.c ai->hiwat = sc->sc_pr.usedhigh / sc->sc_pr.blksize;
sc 2830 dev/audio.c ai->lowat = sc->sc_pr.usedlow / sc->sc_pr.blksize;
sc 2834 dev/audio.c ai->mode = sc->sc_mode;
sc 2843 dev/audio.c mixer_open(dev_t dev, struct audio_softc *sc, int flags, int ifmt,
sc 2846 dev/audio.c DPRINTF(("mixer_open: dev=0x%x flags=0x%x sc=%p\n", dev, flags, sc));
sc 2855 dev/audio.c mixer_remove(struct audio_softc *sc, struct proc *p)
sc 2859 dev/audio.c for(pm = &sc->sc_async_mixer; *pm; pm = &(*pm)->next) {
sc 2873 dev/audio.c mixer_signal(struct audio_softc *sc)
sc 2877 dev/audio.c for(m = sc->sc_async_mixer; m; m = m->next)
sc 2889 dev/audio.c struct audio_softc *sc = audio_cd.cd_devs[unit];
sc 2893 dev/audio.c mixer_remove(sc, p);
sc 2902 dev/audio.c struct audio_softc *sc = audio_cd.cd_devs[unit];
sc 2903 dev/audio.c struct audio_hw_if *hw = sc->hw_if;
sc 2911 dev/audio.c mixer_remove(sc, p); /* remove old entry */
sc 2916 dev/audio.c ma->next = sc->sc_async_mixer;
sc 2918 dev/audio.c sc->sc_async_mixer = ma;
sc 2925 dev/audio.c error = hw->getdev(sc->hw_hdl, (audio_device_t *)addr);
sc 2931 dev/audio.c error = hw->query_devinfo(sc->hw_hdl, (mixer_devinfo_t *)addr);
sc 2936 dev/audio.c error = hw->get_port(sc->hw_hdl, (mixer_ctrl_t *)addr);
sc 2943 dev/audio.c error = hw->set_port(sc->hw_hdl, (mixer_ctrl_t *)addr);
sc 2945 dev/audio.c error = hw->commit_settings(sc->hw_hdl);
sc 2947 dev/audio.c mixer_signal(sc);
sc 2964 dev/audio.c struct audio_softc *sc = audio_cd.cd_devs[unit];
sc 2970 dev/audio.c klist = &sc->sc_rsel.si_note;
sc 2974 dev/audio.c klist = &sc->sc_wsel.si_note;
sc 2980 dev/audio.c kn->kn_hook = (void *)sc;
sc 2992 dev/audio.c struct audio_softc *sc = (struct audio_softc *)kn->kn_hook;
sc 2995 dev/audio.c SLIST_REMOVE(&sc->sc_rsel.si_note, kn, knote, kn_selnext);
sc 3002 dev/audio.c struct audio_softc *sc = (struct audio_softc *)kn->kn_hook;
sc 3004 dev/audio.c return AUDIO_FILTREAD(sc);
sc 3010 dev/audio.c struct audio_softc *sc = (struct audio_softc *)kn->kn_hook;
sc 3013 dev/audio.c SLIST_REMOVE(&sc->sc_wsel.si_note, kn, knote, kn_selnext);
sc 3020 dev/audio.c struct audio_softc *sc = (struct audio_softc *)kn->kn_hook;
sc 3022 dev/audio.c return AUDIO_FILTWRITE(sc);
sc 3027 dev/audio.c wskbd_get_mixerdev(struct audio_softc *sc, int dir, int *index)
sc 3035 dev/audio.c error = sc->hw_if->query_devinfo(sc->hw_hdl, &mi);
sc 3052 dev/audio.c error = sc->hw_if->query_devinfo(sc->hw_hdl, &mi);
sc 3065 dev/audio.c error = sc->hw_if->query_devinfo(sc->hw_hdl,
sc 3086 dev/audio.c struct audio_softc *sc;
sc 3092 dev/audio.c if (audio_cd.cd_ndevs == 0 || (sc = audio_cd.cd_devs[0]) == NULL) {
sc 3097 dev/audio.c error = wskbd_get_mixerdev(sc, dir, &ct.dev);
sc 3109 dev/audio.c error = sc->hw_if->get_port(sc->hw_hdl, &ct);
sc 3127 dev/audio.c error = sc->hw_if->query_devinfo(sc->hw_hdl, &mi);
sc 3136 dev/audio.c error = au_get_lr_value(sc, &ct, &l, &r);
sc 3172 dev/audio.c error = au_set_lr_value(sc, &ct, l, r);
sc 55 dev/bluetooth/bthub.c struct bthub_softc *sc = (struct bthub_softc *)self;
sc 57 dev/bluetooth/bthub.c sc->sc_open = 0;
sc 85 dev/bluetooth/bthub.c struct bthub_softc *sc;
sc 91 dev/bluetooth/bthub.c sc = (struct bthub_softc *)dv;
sc 92 dev/bluetooth/bthub.c if (sc->sc_open) {
sc 97 dev/bluetooth/bthub.c sc->sc_open = 1;
sc 107 dev/bluetooth/bthub.c struct bthub_softc *sc;
sc 110 dev/bluetooth/bthub.c sc = (struct bthub_softc *)dv;
sc 111 dev/bluetooth/bthub.c sc->sc_open = 0;
sc 177 dev/bluetooth/btkbd.c struct btkbd_softc *sc = (struct btkbd_softc *)self;
sc 182 dev/bluetooth/btkbd.c sc->sc_output = ba->ba_output;
sc 185 dev/bluetooth/btkbd.c parserr = btkbd_parse_desc(sc, ba->ba_id, ba->ba_desc, ba->ba_dlen);
sc 195 dev/bluetooth/btkbd.c timeout_set(&sc->sc_repeat, NULL, NULL);
sc 203 dev/bluetooth/btkbd.c wska.accesscookie = sc;
sc 205 dev/bluetooth/btkbd.c sc->sc_wskbd = config_found((struct device *)sc, &wska, wskbddevprint);
sc 211 dev/bluetooth/btkbd.c struct btkbd_softc *sc = (struct btkbd_softc *)self;
sc 216 dev/bluetooth/btkbd.c timeout_del(&sc->sc_repeat);
sc 220 dev/bluetooth/btkbd.c if (sc->sc_wskbd != NULL) {
sc 221 dev/bluetooth/btkbd.c err = config_detach(sc->sc_wskbd, flags);
sc 222 dev/bluetooth/btkbd.c sc->sc_wskbd = NULL;
sc 229 dev/bluetooth/btkbd.c btkbd_parse_desc(struct btkbd_softc *sc, int id, const void *desc, int dlen)
sc 236 dev/bluetooth/btkbd.c sc->sc_nkeycode = 0;
sc 250 dev/bluetooth/btkbd.c sc->sc_modloc[imod] = h.loc;
sc 251 dev/bluetooth/btkbd.c sc->sc_mods[imod].mask = 1 << imod;
sc 252 dev/bluetooth/btkbd.c sc->sc_mods[imod].key = HID_GET_USAGE(h.usage);
sc 267 dev/bluetooth/btkbd.c if (sc->sc_nkeycode != 0)
sc 270 dev/bluetooth/btkbd.c sc->sc_keycodeloc = h.loc;
sc 271 dev/bluetooth/btkbd.c sc->sc_nkeycode = h.loc.count;
sc 274 dev/bluetooth/btkbd.c sc->sc_nmod = imod;
sc 278 dev/bluetooth/btkbd.c id, hid_output, &sc->sc_numloc, NULL);
sc 281 dev/bluetooth/btkbd.c id, hid_output, &sc->sc_capsloc, NULL);
sc 284 dev/bluetooth/btkbd.c id, hid_output, &sc->sc_scroloc, NULL);
sc 292 dev/bluetooth/btkbd.c struct btkbd_softc *sc = (struct btkbd_softc *)self;
sc 294 dev/bluetooth/btkbd.c sc->sc_enabled = on;
sc 301 dev/bluetooth/btkbd.c struct btkbd_softc *sc = (struct btkbd_softc *)self;
sc 304 dev/bluetooth/btkbd.c if (sc->sc_leds == leds)
sc 307 dev/bluetooth/btkbd.c sc->sc_leds = leds;
sc 315 dev/bluetooth/btkbd.c if ((leds & WSKBD_LED_SCROLL) && sc->sc_scroloc.size == 1)
sc 316 dev/bluetooth/btkbd.c report |= 1 << sc->sc_scroloc.pos;
sc 318 dev/bluetooth/btkbd.c if ((leds & WSKBD_LED_NUM) && sc->sc_numloc.size == 1)
sc 319 dev/bluetooth/btkbd.c report |= 1 << sc->sc_numloc.pos;
sc 321 dev/bluetooth/btkbd.c if ((leds & WSKBD_LED_CAPS) && sc->sc_capsloc.size == 1)
sc 322 dev/bluetooth/btkbd.c report |= 1 << sc->sc_capsloc.pos;
sc 324 dev/bluetooth/btkbd.c if (sc->sc_output)
sc 325 dev/bluetooth/btkbd.c (*sc->sc_output)(&sc->sc_hidev, &report, sizeof(report));
sc 331 dev/bluetooth/btkbd.c struct btkbd_softc *sc = (struct btkbd_softc *)self;
sc 339 dev/bluetooth/btkbd.c btkbd_set_leds(sc, *(int *)data);
sc 343 dev/bluetooth/btkbd.c *(int *)data = sc->sc_leds;
sc 348 dev/bluetooth/btkbd.c sc->sc_rawkbd = (*(int *)data == WSKBD_RAW);
sc 350 dev/bluetooth/btkbd.c timeout_del(&sc->sc_repeat);
sc 417 dev/bluetooth/btkbd.c struct btkbd_softc *sc = (struct btkbd_softc *)self;
sc 418 dev/bluetooth/btkbd.c struct btkbd_data *ud = &sc->sc_ndata;
sc 425 dev/bluetooth/btkbd.c if (sc->sc_wskbd == NULL || sc->sc_enabled == 0)
sc 430 dev/bluetooth/btkbd.c for (i = 0 ; i < sc->sc_nmod ; i++)
sc 431 dev/bluetooth/btkbd.c if (hid_get_data(data, &sc->sc_modloc[i]))
sc 432 dev/bluetooth/btkbd.c ud->modifiers |= sc->sc_mods[i].mask;
sc 435 dev/bluetooth/btkbd.c memcpy(ud->keycode, data + (sc->sc_keycodeloc.pos / 8),
sc 436 dev/bluetooth/btkbd.c sc->sc_nkeycode);
sc 443 dev/bluetooth/btkbd.c omod = sc->sc_odata.modifiers;
sc 445 dev/bluetooth/btkbd.c for (i = 0 ; i < sc->sc_nmod ; i++)
sc 446 dev/bluetooth/btkbd.c if ((mod & sc->sc_mods[i].mask) !=
sc 447 dev/bluetooth/btkbd.c (omod & sc->sc_mods[i].mask))
sc 448 dev/bluetooth/btkbd.c ADDKEY(sc->sc_mods[i].key |
sc 449 dev/bluetooth/btkbd.c (mod & sc->sc_mods[i].mask
sc 452 dev/bluetooth/btkbd.c if (memcmp(ud->keycode, sc->sc_odata.keycode, sc->sc_nkeycode) != 0) {
sc 454 dev/bluetooth/btkbd.c for (i = 0 ; i < sc->sc_nkeycode ; i++) {
sc 455 dev/bluetooth/btkbd.c key = sc->sc_odata.keycode[i];
sc 459 dev/bluetooth/btkbd.c for (j = 0 ; j < sc->sc_nkeycode ; j++)
sc 470 dev/bluetooth/btkbd.c for (i = 0 ; i < sc->sc_nkeycode ; i++) {
sc 475 dev/bluetooth/btkbd.c for (j = 0; j < sc->sc_nkeycode; j++)
sc 476 dev/bluetooth/btkbd.c if (key == sc->sc_odata.keycode[j])
sc 484 dev/bluetooth/btkbd.c sc->sc_odata = *ud;
sc 490 dev/bluetooth/btkbd.c if (sc->sc_rawkbd) {
sc 511 dev/bluetooth/btkbd.c sc->sc_rep[npress++] = 0xe0;
sc 513 dev/bluetooth/btkbd.c sc->sc_rep[npress++] = c & 0x7f;
sc 521 dev/bluetooth/btkbd.c wskbd_rawinput(sc->sc_wskbd, cbuf, j);
sc 524 dev/bluetooth/btkbd.c timeout_del(&sc->sc_repeat);
sc 526 dev/bluetooth/btkbd.c sc->sc_nrep = npress;
sc 527 dev/bluetooth/btkbd.c timeout_del(&sc->sc_repeat);
sc 528 dev/bluetooth/btkbd.c timeout_set(&sc->sc_repeat, btkbd_repeat, sc);
sc 529 dev/bluetooth/btkbd.c timeout_add(&sc->sc_repeat, hz * REP_DELAY1 / 1000);
sc 539 dev/bluetooth/btkbd.c wskbd_input(sc->sc_wskbd,
sc 551 dev/bluetooth/btkbd.c struct btkbd_softc *sc = arg;
sc 555 dev/bluetooth/btkbd.c wskbd_rawinput(sc->sc_wskbd, sc->sc_rep, sc->sc_nrep);
sc 557 dev/bluetooth/btkbd.c timeout_del(&sc->sc_repeat);
sc 558 dev/bluetooth/btkbd.c timeout_set(&sc->sc_repeat, btkbd_repeat, sc);
sc 559 dev/bluetooth/btkbd.c timeout_add(&sc->sc_repeat, hz * REP_DELAYN / 1000);
sc 129 dev/bluetooth/btms.c struct btms_softc *sc = (struct btms_softc *)self;
sc 141 dev/bluetooth/btms.c &sc->sc_loc_x, &flags);
sc 145 dev/bluetooth/btms.c sc->sc_hidev.sc_dev.dv_xname, flags);
sc 153 dev/bluetooth/btms.c &sc->sc_loc_y, &flags);
sc 157 dev/bluetooth/btms.c sc->sc_hidev.sc_dev.dv_xname, flags);
sc 165 dev/bluetooth/btms.c &sc->sc_loc_z, &flags);
sc 167 dev/bluetooth/btms.c zloc = &sc->sc_loc_z;
sc 171 dev/bluetooth/btms.c sc->sc_hidev.sc_dev.dv_xname, flags);
sc 174 dev/bluetooth/btms.c sc->sc_loc_z.size = 0;
sc 176 dev/bluetooth/btms.c sc->sc_flags |= BTMS_HASZ;
sc 178 dev/bluetooth/btms.c sc->sc_flags ^= BTMS_REVZ;
sc 180 dev/bluetooth/btms.c zloc = &sc->sc_loc_w;
sc 203 dev/bluetooth/btms.c if (sc->sc_flags & BTMS_HASZ)
sc 204 dev/bluetooth/btms.c sc->sc_flags |= BTMS_HASW;
sc 206 dev/bluetooth/btms.c sc->sc_flags |= BTMS_HASZ;
sc 213 dev/bluetooth/btms.c &sc->sc_loc_button[i - 1], NULL);
sc 218 dev/bluetooth/btms.c sc->sc_num_buttons = i - 1;
sc 220 dev/bluetooth/btms.c printf(": %d button%s%s%s%s.\n", sc->sc_num_buttons,
sc 221 dev/bluetooth/btms.c sc->sc_num_buttons == 1 ? "" : "s",
sc 222 dev/bluetooth/btms.c sc->sc_flags & BTMS_HASW ? ", W" : "",
sc 223 dev/bluetooth/btms.c sc->sc_flags & BTMS_HASZ ? " and Z dir" : "",
sc 224 dev/bluetooth/btms.c sc->sc_flags & BTMS_HASW ? "s" : "");
sc 227 dev/bluetooth/btms.c wsma.accesscookie = sc;
sc 229 dev/bluetooth/btms.c sc->sc_wsmouse = config_found((struct device *)sc,
sc 236 dev/bluetooth/btms.c struct btms_softc *sc = (struct btms_softc *)self;
sc 239 dev/bluetooth/btms.c if (sc->sc_wsmouse != NULL) {
sc 240 dev/bluetooth/btms.c err = config_detach(sc->sc_wsmouse, flags);
sc 241 dev/bluetooth/btms.c sc->sc_wsmouse = NULL;
sc 250 dev/bluetooth/btms.c struct btms_softc *sc = (struct btms_softc *)self;
sc 252 dev/bluetooth/btms.c if (sc->sc_enabled)
sc 255 dev/bluetooth/btms.c sc->sc_enabled = 1;
sc 279 dev/bluetooth/btms.c struct btms_softc *sc = (struct btms_softc *)self;
sc 281 dev/bluetooth/btms.c sc->sc_enabled = 0;
sc 287 dev/bluetooth/btms.c struct btms_softc *sc = (struct btms_softc *)self;
sc 292 dev/bluetooth/btms.c if (sc->sc_wsmouse == NULL || sc->sc_enabled == 0)
sc 295 dev/bluetooth/btms.c dx = hid_get_data(data, &sc->sc_loc_x);
sc 296 dev/bluetooth/btms.c dy = -hid_get_data(data, &sc->sc_loc_y);
sc 297 dev/bluetooth/btms.c dz = hid_get_data(data, &sc->sc_loc_z);
sc 298 dev/bluetooth/btms.c dw = hid_get_data(data, &sc->sc_loc_w);
sc 300 dev/bluetooth/btms.c if (sc->sc_flags & BTMS_REVZ)
sc 304 dev/bluetooth/btms.c for (i = 0 ; i < sc->sc_num_buttons ; i++)
sc 305 dev/bluetooth/btms.c if (hid_get_data(data, &sc->sc_loc_button[i]))
sc 309 dev/bluetooth/btms.c buttons != sc->sc_buttons) {
sc 310 dev/bluetooth/btms.c sc->sc_buttons = buttons;
sc 313 dev/bluetooth/btms.c wsmouse_input(sc->sc_wsmouse, buttons, dx, dy, dz, dw,
sc 111 dev/cardbus/cardbus.c struct cardbus_softc *sc = (void *)self;
sc 115 dev/cardbus/cardbus.c sc->sc_bus = cba->cba_bus;
sc 116 dev/cardbus/cardbus.c sc->sc_device = 0;
sc 117 dev/cardbus/cardbus.c sc->sc_intrline = cba->cba_intrline;
sc 118 dev/cardbus/cardbus.c sc->sc_cacheline = cba->cba_cacheline;
sc 119 dev/cardbus/cardbus.c sc->sc_lattimer = cba->cba_lattimer;
sc 121 dev/cardbus/cardbus.c printf(": bus %d device %d", sc->sc_bus, sc->sc_device);
sc 123 dev/cardbus/cardbus.c sc->sc_cacheline,sc->sc_lattimer);
sc 125 dev/cardbus/cardbus.c sc->sc_iot = cba->cba_iot; /* CardBus I/O space tag */
sc 126 dev/cardbus/cardbus.c sc->sc_memt = cba->cba_memt; /* CardBus MEM space tag */
sc 127 dev/cardbus/cardbus.c sc->sc_dmat = cba->cba_dmat; /* DMA tag */
sc 128 dev/cardbus/cardbus.c sc->sc_cc = cba->cba_cc;
sc 129 dev/cardbus/cardbus.c sc->sc_cf = cba->cba_cf;
sc 130 dev/cardbus/cardbus.c sc->sc_rbus_iot = cba->cba_rbus_iot;
sc 131 dev/cardbus/cardbus.c sc->sc_rbus_memt = cba->cba_rbus_memt;
sc 133 dev/cardbus/cardbus.c sc->sc_funcs = NULL;
sc 142 dev/cardbus/cardbus.c struct cardbus_softc *sc = ca->ca_ct->ct_sc;
sc 165 dev/cardbus/cardbus.c sc->sc_dev.dv_xname));
sc 190 dev/cardbus/cardbus.c sc->sc_dev.dv_xname));
sc 194 dev/cardbus/cardbus.c sc->sc_dev.dv_xname, cardbus_space - 1));
sc 204 dev/cardbus/cardbus.c sc->sc_dev.dv_xname);
sc 272 dev/cardbus/cardbus.c panic("%s: bad CIS space (%d)", sc->sc_dev.dv_xname,
sc 372 dev/cardbus/cardbus.c cardbus_attach_card(struct cardbus_softc *sc)
sc 382 dev/cardbus/cardbus.c struct cardbus_devfunc **previous_next = &(sc->sc_funcs);
sc 388 dev/cardbus/cardbus.c cc = sc->sc_cc;
sc 389 dev/cardbus/cardbus.c cf = sc->sc_cf;
sc 391 dev/cardbus/cardbus.c DPRINTF(("cardbus_attach_card: cb%d start\n", sc->sc_dev.dv_unit));
sc 396 dev/cardbus/cardbus.c sc->sc_dev.dv_unit));
sc 401 dev/cardbus/cardbus.c enable_function(sc, cdstatus, 8);
sc 405 dev/cardbus/cardbus.c tag = cardbus_make_tag(cc, cf, sc->sc_bus, sc->sc_device, function);
sc 415 dev/cardbus/cardbus.c if (tsleep((void *)sc, PCATCH, "cardbus",
sc 425 dev/cardbus/cardbus.c DPRINTF(("%s bhlc 0x%08x -> ", sc->sc_dev.dv_xname, bhlc));
sc 435 dev/cardbus/cardbus.c tag = cardbus_make_tag(cc, cf, sc->sc_bus, sc->sc_device,
sc 450 dev/cardbus/cardbus.c enable_function(sc, cdstatus, function);
sc 463 dev/cardbus/cardbus.c DPRINTF(("%s func%d bhlc 0x%08x -> ", sc->sc_dev.dv_xname,
sc 467 dev/cardbus/cardbus.c bhlc |= ((sc->sc_cacheline & CARDBUS_CACHELINE_MASK) <<
sc 469 dev/cardbus/cardbus.c bhlc |= ((sc->sc_lattimer & CARDBUS_LATTIMER_MASK) <<
sc 493 dev/cardbus/cardbus.c ct->ct_cc = sc->sc_cc;
sc 494 dev/cardbus/cardbus.c ct->ct_cf = sc->sc_cf;
sc 495 dev/cardbus/cardbus.c ct->ct_bus = sc->sc_bus;
sc 496 dev/cardbus/cardbus.c ct->ct_dev = sc->sc_device;
sc 498 dev/cardbus/cardbus.c ct->ct_sc = sc;
sc 504 dev/cardbus/cardbus.c ca.ca_unit = sc->sc_dev.dv_unit;
sc 507 dev/cardbus/cardbus.c ca.ca_iot = sc->sc_iot;
sc 508 dev/cardbus/cardbus.c ca.ca_memt = sc->sc_memt;
sc 509 dev/cardbus/cardbus.c ca.ca_dmat = sc->sc_dmat;
sc 510 dev/cardbus/cardbus.c ca.ca_rbus_iot = sc->sc_rbus_iot;
sc 511 dev/cardbus/cardbus.c ca.ca_rbus_memt = sc->sc_rbus_memt;
sc 513 dev/cardbus/cardbus.c ca.ca_bus = sc->sc_bus;
sc 514 dev/cardbus/cardbus.c ca.ca_device = sc->sc_device;
sc 519 dev/cardbus/cardbus.c ca.ca_intrline = sc->sc_intrline;
sc 534 dev/cardbus/cardbus.c if ((csc = config_found_sm((void *)sc, &ca, cardbusprint,
sc 537 dev/cardbus/cardbus.c disable_function(sc, function);
sc 551 dev/cardbus/cardbus.c disable_function(sc, 8);
sc 623 dev/cardbus/cardbus.c cardbus_detach_card(struct cardbus_softc *sc)
sc 627 dev/cardbus/cardbus.c prev_next = &(sc->sc_funcs->ct_next);
sc 629 dev/cardbus/cardbus.c for (ct = sc->sc_funcs; ct != NULL; ct = ct_next) {
sc 633 dev/cardbus/cardbus.c DPRINTF(("%s: detaching %s\n", sc->sc_dev.dv_xname,
sc 639 dev/cardbus/cardbus.c sc->sc_dev.dv_xname, fndev->dv_xname, ct->ct_func);
sc 642 dev/cardbus/cardbus.c sc->sc_poweron_func &= ~(1 << ct->ct_func);
sc 648 dev/cardbus/cardbus.c sc->sc_poweron_func = 0;
sc 649 dev/cardbus/cardbus.c sc->sc_cf->cardbus_power(sc->sc_cc, CARDBUS_VCC_0V | CARDBUS_VPP_0V);
sc 688 dev/cardbus/cardbus.c enable_function(struct cardbus_softc *sc, int cdstatus, int function)
sc 690 dev/cardbus/cardbus.c if (sc->sc_poweron_func == 0) {
sc 693 dev/cardbus/cardbus.c sc->sc_cf->cardbus_power(sc->sc_cc, CARDBUS_VCC_3V);
sc 698 dev/cardbus/cardbus.c (sc->sc_cf->cardbus_ctrl)(sc->sc_cc, CARDBUS_RESET);
sc 700 dev/cardbus/cardbus.c sc->sc_poweron_func |= (1 << function);
sc 704 dev/cardbus/cardbus.c disable_function(struct cardbus_softc *sc, int function)
sc 706 dev/cardbus/cardbus.c sc->sc_poweron_func &= ~(1 << function);
sc 707 dev/cardbus/cardbus.c if (sc->sc_poweron_func == 0) {
sc 709 dev/cardbus/cardbus.c sc->sc_cf->cardbus_power(sc->sc_cc, CARDBUS_VCC_0V);
sc 720 dev/cardbus/cardbus.c cardbus_function_enable(struct cardbus_softc *sc, int func)
sc 722 dev/cardbus/cardbus.c cardbus_chipset_tag_t cc = sc->sc_cc;
sc 723 dev/cardbus/cardbus.c cardbus_function_tag_t cf = sc->sc_cf;
sc 732 dev/cardbus/cardbus.c enable_function(sc, CARDBUS_3V_CARD, func);
sc 736 dev/cardbus/cardbus.c tag = cardbus_make_tag(cc, cf, sc->sc_bus, sc->sc_device, func);
sc 746 dev/cardbus/cardbus.c DPRINTF(("%x\n", sc->sc_poweron_func));
sc 758 dev/cardbus/cardbus.c cardbus_function_disable(struct cardbus_softc *sc, int func)
sc 762 dev/cardbus/cardbus.c disable_function(sc, func);
sc 246 dev/cardbus/cardbus_map.c cardbus_mapreg_map(struct cardbus_softc *sc, int func, int reg,
sc 250 dev/cardbus/cardbus_map.c cardbus_chipset_tag_t cc = sc->sc_cc;
sc 251 dev/cardbus/cardbus_map.c cardbus_function_tag_t cf = sc->sc_cf;
sc 260 dev/cardbus/cardbus_map.c cardbustag_t tag = cardbus_make_tag(cc, cf, sc->sc_bus,
sc 261 dev/cardbus/cardbus_map.c sc->sc_device, func);
sc 263 dev/cardbus/cardbus_map.c DPRINTF(("cardbus_mapreg_map called: %s %x\n", sc->sc_dev.dv_xname,
sc 270 dev/cardbus/cardbus_map.c bustag = sc->sc_iot;
sc 271 dev/cardbus/cardbus_map.c rbustag = sc->sc_rbus_iot;
sc 276 dev/cardbus/cardbus_map.c bustag = sc->sc_memt;
sc 277 dev/cardbus/cardbus_map.c rbustag = sc->sc_rbus_memt;
sc 319 dev/cardbus/cardbus_map.c cardbus_mapreg_unmap(struct cardbus_softc *sc, int func, int reg,
sc 322 dev/cardbus/cardbus_map.c cardbus_chipset_tag_t cc = sc->sc_cc;
sc 323 dev/cardbus/cardbus_map.c cardbus_function_tag_t cf = sc->sc_cf;
sc 328 dev/cardbus/cardbus_map.c if (sc->sc_iot == tag) {
sc 330 dev/cardbus/cardbus_map.c DPRINTF(("%s: unmap i/o space\n", sc->sc_dev.dv_xname));
sc 331 dev/cardbus/cardbus_map.c rbustag = sc->sc_rbus_iot;
sc 332 dev/cardbus/cardbus_map.c } else if (sc->sc_memt == tag) {
sc 334 dev/cardbus/cardbus_map.c DPRINTF(("%s: unmap mem space\n", sc->sc_dev.dv_xname));
sc 335 dev/cardbus/cardbus_map.c rbustag = sc->sc_rbus_memt;
sc 339 dev/cardbus/cardbus_map.c cardbustag = cardbus_make_tag(cc, cf, sc->sc_bus, sc->sc_device, func);
sc 94 dev/cardbus/cardslot.c struct cardslot_softc *sc = (struct cardslot_softc *)self;
sc 103 dev/cardbus/cardslot.c sc->sc_slot = sc->sc_dev.dv_unit;
sc 104 dev/cardbus/cardslot.c sc->sc_cb_softc = NULL;
sc 105 dev/cardbus/cardslot.c sc->sc_16_softc = NULL;
sc 106 dev/cardbus/cardslot.c SIMPLEQ_INIT(&sc->sc_events);
sc 107 dev/cardbus/cardslot.c sc->sc_th_enable = 0;
sc 109 dev/cardbus/cardslot.c printf(" slot %d flags %x\n", sc->sc_slot,
sc 110 dev/cardbus/cardslot.c sc->sc_dev.dv_cfdata->cf_flags);
sc 112 dev/cardbus/cardslot.c DPRINTF(("%s attaching CardBus bus...\n", sc->sc_dev.dv_xname));
sc 118 dev/cardbus/cardslot.c sc->sc_dev.dv_xname));
sc 119 dev/cardbus/cardslot.c sc->sc_cb_softc = csc;
sc 128 dev/cardbus/cardslot.c sc->sc_16_softc = psc;
sc 137 dev/cardbus/cardslot.c kthread_create_deferred(create_slot_manager, (void *)sc);
sc 142 dev/cardbus/cardslot.c cardslot_event_throw(sc, CARDSLOT_EVENT_INSERTION_CB);
sc 148 dev/cardbus/cardslot.c cardslot_event_throw(sc, CARDSLOT_EVENT_INSERTION_16);
sc 189 dev/cardbus/cardslot.c struct cardslot_softc *sc = (struct cardslot_softc *)arg;
sc 191 dev/cardbus/cardslot.c sc->sc_th_enable = 1;
sc 193 dev/cardbus/cardslot.c if (kthread_create(cardslot_event_thread, sc, &sc->sc_event_thread,
sc 194 dev/cardbus/cardslot.c "%s", sc->sc_dev.dv_xname)) {
sc 196 dev/cardbus/cardslot.c sc->sc_dev.dv_xname, sc->sc_slot);
sc 208 dev/cardbus/cardslot.c cardslot_event_throw(struct cardslot_softc *sc, int ev)
sc 227 dev/cardbus/cardslot.c SIMPLEQ_INSERT_TAIL(&sc->sc_events, ce, ce_q);
sc 231 dev/cardbus/cardslot.c wakeup(&sc->sc_events);
sc 244 dev/cardbus/cardslot.c struct cardslot_softc *sc = arg;
sc 252 dev/cardbus/cardslot.c while (sc->sc_th_enable) {
sc 254 dev/cardbus/cardslot.c if ((ce = SIMPLEQ_FIRST(&sc->sc_events)) == NULL) {
sc 256 dev/cardbus/cardslot.c (void) tsleep(&sc->sc_events, PWAIT, "cardslotev", 0);
sc 259 dev/cardbus/cardslot.c SIMPLEQ_REMOVE_HEAD(&sc->sc_events, ce_q);
sc 268 dev/cardbus/cardslot.c if ((ce1 = SIMPLEQ_FIRST(&sc->sc_events)) ==
sc 276 dev/cardbus/cardslot.c SIMPLEQ_REMOVE_HEAD(&sc->sc_events,
sc 279 dev/cardbus/cardslot.c SIMPLEQ_REMOVE_HEAD(&sc->sc_events,
sc 289 dev/cardbus/cardslot.c if ((CARDSLOT_CARDTYPE(sc->sc_status) ==
sc 291 dev/cardbus/cardslot.c (CARDSLOT_CARDTYPE(sc->sc_status) ==
sc 293 dev/cardbus/cardslot.c if (CARDSLOT_WORK(sc->sc_status) ==
sc 302 dev/cardbus/cardslot.c if (sc->sc_cb_softc) {
sc 303 dev/cardbus/cardslot.c CARDSLOT_SET_CARDTYPE(sc->sc_status,
sc 305 dev/cardbus/cardslot.c if (cardbus_attach_card(sc->sc_cb_softc) > 0) {
sc 307 dev/cardbus/cardslot.c CARDSLOT_SET_WORK(sc->sc_status,
sc 313 dev/cardbus/cardslot.c CARDSLOT_SET_WORK(sc->sc_status,
sc 317 dev/cardbus/cardslot.c panic("no cardbus on %s", sc->sc_dev.dv_xname);
sc 323 dev/cardbus/cardslot.c if ((CARDSLOT_CARDTYPE(sc->sc_status) ==
sc 325 dev/cardbus/cardslot.c (CARDSLOT_CARDTYPE(sc->sc_status) ==
sc 327 dev/cardbus/cardslot.c if (CARDSLOT_WORK(sc->sc_status) ==
sc 335 dev/cardbus/cardslot.c if (sc->sc_16_softc) {
sc 336 dev/cardbus/cardslot.c CARDSLOT_SET_CARDTYPE(sc->sc_status,
sc 339 dev/cardbus/cardslot.c (struct device *)sc->sc_16_softc)) {
sc 341 dev/cardbus/cardslot.c CARDSLOT_SET_WORK(sc->sc_status,
sc 345 dev/cardbus/cardslot.c CARDSLOT_SET_WORK(sc->sc_status,
sc 350 dev/cardbus/cardslot.c sc->sc_dev.dv_xname);
sc 356 dev/cardbus/cardslot.c if (CARDSLOT_CARDTYPE(sc->sc_status) ==
sc 359 dev/cardbus/cardslot.c if (CARDSLOT_WORK(sc->sc_status) ==
sc 361 dev/cardbus/cardslot.c cardbus_detach_card(sc->sc_cb_softc);
sc 362 dev/cardbus/cardslot.c CARDSLOT_SET_WORK(sc->sc_status,
sc 364 dev/cardbus/cardslot.c CARDSLOT_SET_WORK(sc->sc_status,
sc 367 dev/cardbus/cardslot.c CARDSLOT_SET_CARDTYPE(sc->sc_status,
sc 369 dev/cardbus/cardslot.c } else if (CARDSLOT_CARDTYPE(sc->sc_status) !=
sc 372 dev/cardbus/cardslot.c CARDSLOT_SET_CARDTYPE(sc->sc_status,
sc 375 dev/cardbus/cardslot.c CARDSLOT_SET_WORK(sc->sc_status,
sc 380 dev/cardbus/cardslot.c DPRINTF(("%s: removal event\n", sc->sc_dev.dv_xname));
sc 381 dev/cardbus/cardslot.c if (CARDSLOT_CARDTYPE(sc->sc_status) !=
sc 386 dev/cardbus/cardslot.c if ((sc->sc_16_softc != NULL) &&
sc 387 dev/cardbus/cardslot.c (CARDSLOT_WORK(sc->sc_status) ==
sc 389 dev/cardbus/cardslot.c struct pcmcia_softc *psc = sc->sc_16_softc;
sc 396 dev/cardbus/cardslot.c CARDSLOT_SET_CARDTYPE(sc->sc_status,
sc 398 dev/cardbus/cardslot.c CARDSLOT_SET_WORK(sc->sc_status,
sc 409 dev/cardbus/cardslot.c sc->sc_event_thread = NULL;
sc 412 dev/cardbus/cardslot.c wakeup(sc);
sc 250 dev/cardbus/com_cardbus.c struct com_softc *sc = (struct com_softc*)self;
sc 261 dev/cardbus/com_cardbus.c &sc->sc_iot, &sc->sc_ioh, &csc->cc_addr, &csc->cc_size) != 0) {
sc 277 dev/cardbus/com_cardbus.c sc->sc_iobase = csc->cc_addr;
sc 278 dev/cardbus/com_cardbus.c sc->sc_frequency = COM_FREQ;
sc 280 dev/cardbus/com_cardbus.c sc->enable = com_cardbus_enable;
sc 281 dev/cardbus/com_cardbus.c sc->disable = com_cardbus_disable;
sc 282 dev/cardbus/com_cardbus.c sc->enabled = 0;
sc 290 dev/cardbus/com_cardbus.c if (com_cardbus_enable(sc))
sc 292 dev/cardbus/com_cardbus.c sc->enabled = 1;
sc 294 dev/cardbus/com_cardbus.c sc->sc_hwflags = 0;
sc 295 dev/cardbus/com_cardbus.c sc->sc_swflags = 0;
sc 298 dev/cardbus/com_cardbus.c sc->sc_fifolen = 15;
sc 300 dev/cardbus/com_cardbus.c com_attach_subr(sc);
sc 336 dev/cardbus/com_cardbus.c com_cardbus_enable(struct com_softc *sc)
sc 338 dev/cardbus/com_cardbus.c struct com_cardbus_softc *csc = (struct com_cardbus_softc*)sc;
sc 340 dev/cardbus/com_cardbus.c (struct cardbus_softc *)sc->sc_dev.dv_parent;
sc 350 dev/cardbus/com_cardbus.c IPL_TTY, comintr, sc, DEVNAME(csc));
sc 362 dev/cardbus/com_cardbus.c com_cardbus_disable(struct com_softc *sc)
sc 364 dev/cardbus/com_cardbus.c struct com_cardbus_softc *csc = (struct com_cardbus_softc*)sc;
sc 366 dev/cardbus/com_cardbus.c (struct cardbus_softc *)sc->sc_dev.dv_parent;
sc 378 dev/cardbus/com_cardbus.c struct com_softc *sc = (struct com_softc *) self;
sc 387 dev/cardbus/com_cardbus.c Cardbus_mapreg_unmap(csc->cc_ct, csc->cc_reg, sc->sc_iot, sc->sc_ioh,
sc 74 dev/cardbus/ehci_cardbus.c ehci_softc_t sc;
sc 107 dev/cardbus/ehci_cardbus.c struct ehci_cardbus_softc *sc = (struct ehci_cardbus_softc *)self;
sc 116 dev/cardbus/ehci_cardbus.c const char *devname = sc->sc.sc_bus.bdev.dv_xname;
sc 123 dev/cardbus/ehci_cardbus.c &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
sc 128 dev/cardbus/ehci_cardbus.c sc->sc_cc = cc;
sc 129 dev/cardbus/ehci_cardbus.c sc->sc_cf = cf;
sc 130 dev/cardbus/ehci_cardbus.c sc->sc_ct = ct;
sc 131 dev/cardbus/ehci_cardbus.c sc->sc.sc_bus.dmatag = ca->ca_dmat;
sc 144 dev/cardbus/ehci_cardbus.c sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
sc 145 dev/cardbus/ehci_cardbus.c DPRINTF((": offs=%d", devname, sc->sc.sc_offs));
sc 146 dev/cardbus/ehci_cardbus.c EOWRITE2(&sc->sc, EHCI_USBINTR, 0);
sc 148 dev/cardbus/ehci_cardbus.c sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline,
sc 149 dev/cardbus/ehci_cardbus.c IPL_USB, ehci_intr, sc, devname);
sc 150 dev/cardbus/ehci_cardbus.c if (sc->sc_ih == NULL) {
sc 158 dev/cardbus/ehci_cardbus.c sc->sc.sc_id_vendor = CARDBUS_VENDOR(ca->ca_id);
sc 160 dev/cardbus/ehci_cardbus.c strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor));
sc 162 dev/cardbus/ehci_cardbus.c snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
sc 165 dev/cardbus/ehci_cardbus.c r = ehci_init(&sc->sc);
sc 170 dev/cardbus/ehci_cardbus.c cardbus_intr_disestablish(sc->sc_cc, sc->sc_cf, sc->sc_ih);
sc 171 dev/cardbus/ehci_cardbus.c sc->sc_ih = NULL;
sc 176 dev/cardbus/ehci_cardbus.c sc->sc.sc_shutdownhook = shutdownhook_establish(ehci_shutdown, &sc->sc);
sc 179 dev/cardbus/ehci_cardbus.c sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
sc 186 dev/cardbus/ehci_cardbus.c struct ehci_cardbus_softc *sc = (struct ehci_cardbus_softc *)self;
sc 187 dev/cardbus/ehci_cardbus.c struct cardbus_devfunc *ct = sc->sc_ct;
sc 190 dev/cardbus/ehci_cardbus.c rv = ehci_detach(&sc->sc, flags);
sc 193 dev/cardbus/ehci_cardbus.c if (sc->sc_ih != NULL) {
sc 194 dev/cardbus/ehci_cardbus.c cardbus_intr_disestablish(sc->sc_cc, sc->sc_cf, sc->sc_ih);
sc 195 dev/cardbus/ehci_cardbus.c sc->sc_ih = NULL;
sc 197 dev/cardbus/ehci_cardbus.c if (sc->sc.sc_size) {
sc 198 dev/cardbus/ehci_cardbus.c Cardbus_mapreg_unmap(ct, CARDBUS_CBMEM, sc->sc.iot,
sc 199 dev/cardbus/ehci_cardbus.c sc->sc.ioh, sc->sc.sc_size);
sc 200 dev/cardbus/ehci_cardbus.c sc->sc.sc_size = 0;
sc 114 dev/cardbus/if_acx_cardbus.c struct acx_softc *sc = &csc->sc_acx;
sc 120 dev/cardbus/if_acx_cardbus.c sc->sc_dmat = ca->ca_dmat;
sc 126 dev/cardbus/if_acx_cardbus.c sc->sc_enable = acx_cardbus_enable;
sc 127 dev/cardbus/if_acx_cardbus.c sc->sc_disable = acx_cardbus_disable;
sc 128 dev/cardbus/if_acx_cardbus.c sc->sc_power = acx_cardbus_power;
sc 146 dev/cardbus/if_acx_cardbus.c &sc->sc_mem1_bt, &sc->sc_mem1_bh, &base, &csc->sc_mapsize1);
sc 156 dev/cardbus/if_acx_cardbus.c &sc->sc_mem2_bt, &sc->sc_mem2_bh, &base, &csc->sc_mapsize2);
sc 170 dev/cardbus/if_acx_cardbus.c acx111_set_param(sc);
sc 172 dev/cardbus/if_acx_cardbus.c acx100_set_param(sc);
sc 174 dev/cardbus/if_acx_cardbus.c acx_attach(sc);
sc 183 dev/cardbus/if_acx_cardbus.c struct acx_softc *sc = &csc->sc_acx;
sc 189 dev/cardbus/if_acx_cardbus.c error = acx_detach(sc);
sc 204 dev/cardbus/if_acx_cardbus.c Cardbus_mapreg_unmap(ct, b1, sc->sc_mem1_bt,
sc 205 dev/cardbus/if_acx_cardbus.c sc->sc_mem1_bh, csc->sc_mapsize1);
sc 206 dev/cardbus/if_acx_cardbus.c Cardbus_mapreg_unmap(ct, b2, sc->sc_mem2_bt,
sc 207 dev/cardbus/if_acx_cardbus.c sc->sc_mem2_bh, csc->sc_mapsize2);
sc 216 dev/cardbus/if_acx_cardbus.c acx_cardbus_enable(struct acx_softc *sc)
sc 218 dev/cardbus/if_acx_cardbus.c struct acx_cardbus_softc *csc = (struct acx_cardbus_softc *)sc;
sc 231 dev/cardbus/if_acx_cardbus.c acx_intr, sc, sc->sc_dev.dv_xname);
sc 234 dev/cardbus/if_acx_cardbus.c sc->sc_dev.dv_xname, csc->sc_intrline);
sc 243 dev/cardbus/if_acx_cardbus.c acx_cardbus_disable(struct acx_softc *sc)
sc 245 dev/cardbus/if_acx_cardbus.c struct acx_cardbus_softc *csc = (struct acx_cardbus_softc *)sc;
sc 259 dev/cardbus/if_acx_cardbus.c acx_cardbus_power(struct acx_softc *sc, int why)
sc 261 dev/cardbus/if_acx_cardbus.c struct acx_cardbus_softc *csc = (struct acx_cardbus_softc *)sc;
sc 141 dev/cardbus/if_ath_cardbus.c struct ath_softc *sc = &csc->sc_ath;
sc 146 dev/cardbus/if_ath_cardbus.c sc->sc_dmat = ca->ca_dmat;
sc 153 dev/cardbus/if_ath_cardbus.c sc->sc_enable = ath_cardbus_enable;
sc 154 dev/cardbus/if_ath_cardbus.c sc->sc_disable = ath_cardbus_disable;
sc 155 dev/cardbus/if_ath_cardbus.c sc->sc_power = ath_cardbus_power;
sc 161 dev/cardbus/if_ath_cardbus.c &sc->sc_st, &sc->sc_sh, &adr, &csc->sc_mapsize) == 0) {
sc 183 dev/cardbus/if_ath_cardbus.c ath_attach(PCI_PRODUCT(ca->ca_id), sc);
sc 195 dev/cardbus/if_ath_cardbus.c struct ath_softc *sc = &csc->sc_ath;
sc 201 dev/cardbus/if_ath_cardbus.c panic("%s: data structure lacks", sc->sc_dev.dv_xname);
sc 204 dev/cardbus/if_ath_cardbus.c rv = ath_detach(sc, flags);
sc 220 dev/cardbus/if_ath_cardbus.c sc->sc_st, sc->sc_sh, csc->sc_mapsize);
sc 226 dev/cardbus/if_ath_cardbus.c ath_cardbus_enable(struct ath_softc *sc)
sc 228 dev/cardbus/if_ath_cardbus.c struct ath_cardbus_softc *csc = (void *) sc;
sc 247 dev/cardbus/if_ath_cardbus.c ath_intr, sc, sc->sc_dev.dv_xname);
sc 258 dev/cardbus/if_ath_cardbus.c ath_cardbus_disable(struct ath_softc *sc)
sc 260 dev/cardbus/if_ath_cardbus.c struct ath_cardbus_softc *csc = (void *) sc;
sc 274 dev/cardbus/if_ath_cardbus.c ath_cardbus_power(struct ath_softc *sc, int why)
sc 277 dev/cardbus/if_ath_cardbus.c ath_enable(sc);
sc 289 dev/cardbus/if_ath_cardbus.c (void)cardbus_setpowerstate(sc->sc_dev.dv_xname, ct, csc->sc_tag,
sc 146 dev/cardbus/if_atw_cardbus.c struct atw_softc *sc = &csc->sc_atw;
sc 151 dev/cardbus/if_atw_cardbus.c sc->sc_dmat = ca->ca_dmat;
sc 158 dev/cardbus/if_atw_cardbus.c sc->sc_enable = atw_cardbus_enable;
sc 159 dev/cardbus/if_atw_cardbus.c sc->sc_disable = atw_cardbus_disable;
sc 160 dev/cardbus/if_atw_cardbus.c sc->sc_power = atw_cardbus_power;
sc 163 dev/cardbus/if_atw_cardbus.c sc->sc_rev = PCI_REVISION(ca->ca_class);
sc 168 dev/cardbus/if_atw_cardbus.c sc->sc_dev.dv_xname);
sc 176 dev/cardbus/if_atw_cardbus.c CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr,
sc 180 dev/cardbus/if_atw_cardbus.c csc->sc_mapsize, sc->sc_dev.dv_xname);
sc 187 dev/cardbus/if_atw_cardbus.c CARDBUS_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
sc 191 dev/cardbus/if_atw_cardbus.c csc->sc_mapsize, sc->sc_dev.dv_xname);
sc 212 dev/cardbus/if_atw_cardbus.c (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf, csc->sc_intrline);
sc 219 dev/cardbus/if_atw_cardbus.c sc->sc_txthresh = 3; /* TBD name constant */
sc 225 dev/cardbus/if_atw_cardbus.c atw_attach(sc);
sc 227 dev/cardbus/if_atw_cardbus.c ATW_WRITE(sc, ATW_FER, ATW_FER_INTR);
sc 239 dev/cardbus/if_atw_cardbus.c struct atw_softc *sc = &csc->sc_atw;
sc 245 dev/cardbus/if_atw_cardbus.c panic("%s: data structure lacks", sc->sc_dev.dv_xname);
sc 248 dev/cardbus/if_atw_cardbus.c rv = atw_detach(sc);
sc 263 dev/cardbus/if_atw_cardbus.c sc->sc_st, sc->sc_sh, csc->sc_mapsize);
sc 269 dev/cardbus/if_atw_cardbus.c atw_cardbus_enable(struct atw_softc *sc)
sc 271 dev/cardbus/if_atw_cardbus.c struct atw_cardbus_softc *csc = (void *) sc;
sc 290 dev/cardbus/if_atw_cardbus.c atw_intr, sc, sc->sc_dev.dv_xname);
sc 293 dev/cardbus/if_atw_cardbus.c sc->sc_dev.dv_xname, csc->sc_intrline);
sc 302 dev/cardbus/if_atw_cardbus.c atw_cardbus_disable(struct atw_softc *sc)
sc 304 dev/cardbus/if_atw_cardbus.c struct atw_cardbus_softc *csc = (void *) sc;
sc 318 dev/cardbus/if_atw_cardbus.c atw_cardbus_power(struct atw_softc *sc, int why)
sc 321 dev/cardbus/if_atw_cardbus.c atw_enable(sc);
sc 328 dev/cardbus/if_atw_cardbus.c struct atw_softc *sc = &csc->sc_atw;
sc 336 dev/cardbus/if_atw_cardbus.c (void)cardbus_setpowerstate(sc->sc_dev.dv_xname, ct, csc->sc_tag,
sc 95 dev/cardbus/if_dc_cardbus.c struct dc_softc *sc = &csc->sc_dc;
sc 103 dev/cardbus/if_dc_cardbus.c sc->sc_dmat = ca->ca_dmat;
sc 110 dev/cardbus/if_dc_cardbus.c PCI_MAPREG_TYPE_IO, 0, &sc->dc_btag, &sc->dc_bhandle, &addr,
sc 116 dev/cardbus/if_dc_cardbus.c &sc->dc_btag, &sc->dc_bhandle, &addr, &csc->sc_mapsize) == 0) {
sc 125 dev/cardbus/if_dc_cardbus.c sc->dc_cachesize = cardbus_conf_read(cc, cf, ca->ca_tag, DC_PCI_CFLT)
sc 133 dev/cardbus/if_dc_cardbus.c dc_eeprom_width(sc);
sc 138 dev/cardbus/if_dc_cardbus.c sc->dc_type = DC_TYPE_21143;
sc 139 dev/cardbus/if_dc_cardbus.c sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
sc 140 dev/cardbus/if_dc_cardbus.c sc->dc_flags |= DC_REDUCED_MII_POLL;
sc 141 dev/cardbus/if_dc_cardbus.c dc_read_srom(sc, sc->dc_romwidth);
sc 142 dev/cardbus/if_dc_cardbus.c dc_parse_21143_srom(sc);
sc 148 dev/cardbus/if_dc_cardbus.c sc->dc_type = DC_TYPE_XIRCOM;
sc 149 dev/cardbus/if_dc_cardbus.c sc->dc_flags |= DC_TX_INTR_ALWAYS|DC_TX_COALESCE |
sc 151 dev/cardbus/if_dc_cardbus.c sc->dc_pmode = DC_PMODE_MII;
sc 154 dev/cardbus/if_dc_cardbus.c &sc->sc_arpcom.ac_enaddr,
sc 155 dev/cardbus/if_dc_cardbus.c sizeof sc->sc_arpcom.ac_enaddr);
sc 175 dev/cardbus/if_dc_cardbus.c sc->dc_type = DC_TYPE_AN983;
sc 176 dev/cardbus/if_dc_cardbus.c sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_ADMTEK_WAR |
sc 178 dev/cardbus/if_dc_cardbus.c sc->dc_pmode = DC_PMODE_MII;
sc 197 dev/cardbus/if_dc_cardbus.c sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_NET,
sc 198 dev/cardbus/if_dc_cardbus.c dc_intr, csc, sc->sc_dev.dv_xname);
sc 199 dev/cardbus/if_dc_cardbus.c if (sc->sc_ih == NULL) {
sc 206 dev/cardbus/if_dc_cardbus.c dc_reset(sc);
sc 208 dev/cardbus/if_dc_cardbus.c sc->dc_revision = PCI_REVISION(ca->ca_class);
sc 209 dev/cardbus/if_dc_cardbus.c dc_attach(sc);
sc 213 dev/cardbus/if_dc_cardbus.c dc_detach(sc)
sc 214 dev/cardbus/if_dc_cardbus.c struct dc_softc *sc;
sc 216 dev/cardbus/if_dc_cardbus.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 218 dev/cardbus/if_dc_cardbus.c if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL)
sc 219 dev/cardbus/if_dc_cardbus.c mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
sc 221 dev/cardbus/if_dc_cardbus.c if (sc->dc_srom)
sc 222 dev/cardbus/if_dc_cardbus.c free(sc->dc_srom, M_DEVBUF);
sc 224 dev/cardbus/if_dc_cardbus.c timeout_del(&sc->dc_tick_tmo);
sc 229 dev/cardbus/if_dc_cardbus.c if (sc->sc_dhook != NULL)
sc 230 dev/cardbus/if_dc_cardbus.c shutdownhook_disestablish(sc->sc_dhook);
sc 231 dev/cardbus/if_dc_cardbus.c if (sc->sc_pwrhook != NULL)
sc 232 dev/cardbus/if_dc_cardbus.c powerhook_disestablish(sc->sc_pwrhook);
sc 243 dev/cardbus/if_dc_cardbus.c struct dc_softc *sc = &csc->sc_dc;
sc 247 dev/cardbus/if_dc_cardbus.c rv = dc_detach(sc);
sc 251 dev/cardbus/if_dc_cardbus.c cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, sc->sc_ih);
sc 256 dev/cardbus/if_dc_cardbus.c sc->dc_btag, sc->dc_bhandle, csc->sc_mapsize);
sc 96 dev/cardbus/if_fxp_cardbus.c struct fxp_softc sc;
sc 131 dev/cardbus/if_fxp_cardbus.c struct fxp_softc *sc = (struct fxp_softc *) self;
sc 135 dev/cardbus/if_fxp_cardbus.c (struct cardbus_softc *)sc->sc_dev.dv_parent;
sc 152 dev/cardbus/if_fxp_cardbus.c sc->sc_st = iot;
sc 153 dev/cardbus/if_fxp_cardbus.c sc->sc_sh = ioh;
sc 159 dev/cardbus/if_fxp_cardbus.c sc->sc_st = memt;
sc 160 dev/cardbus/if_fxp_cardbus.c sc->sc_sh = memh;
sc 171 dev/cardbus/if_fxp_cardbus.c sc->sc_dmat = ca->ca_dmat;
sc 173 dev/cardbus/if_fxp_cardbus.c sc->sc_enable = fxp_cardbus_enable;
sc 174 dev/cardbus/if_fxp_cardbus.c sc->sc_disable = fxp_cardbus_disable;
sc 175 dev/cardbus/if_fxp_cardbus.c sc->sc_enabled = 0;
sc 180 dev/cardbus/if_fxp_cardbus.c fxp_cardbus_setup(sc);
sc 183 dev/cardbus/if_fxp_cardbus.c sc->sc_ih = cardbus_intr_establish(cc, cf, psc->sc_intrline, IPL_NET,
sc 184 dev/cardbus/if_fxp_cardbus.c fxp_intr, sc, sc->sc_dev.dv_xname);
sc 185 dev/cardbus/if_fxp_cardbus.c if (NULL == sc->sc_ih) {
sc 192 dev/cardbus/if_fxp_cardbus.c sc->sc_revision = PCI_REVISION(ca->ca_class);
sc 194 dev/cardbus/if_fxp_cardbus.c fxp_attach(sc, intrstr);
sc 198 dev/cardbus/if_fxp_cardbus.c fxp_cardbus_setup(struct fxp_softc *sc)
sc 200 dev/cardbus/if_fxp_cardbus.c struct fxp_cardbus_softc *csc = (struct fxp_cardbus_softc *) sc;
sc 202 dev/cardbus/if_fxp_cardbus.c (struct cardbus_softc *) sc->sc_dev.dv_parent;
sc 232 dev/cardbus/if_fxp_cardbus.c fxp_detach(struct fxp_softc *sc)
sc 234 dev/cardbus/if_fxp_cardbus.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 237 dev/cardbus/if_fxp_cardbus.c timeout_del(&sc->stats_update_to);
sc 240 dev/cardbus/if_fxp_cardbus.c if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL)
sc 241 dev/cardbus/if_fxp_cardbus.c mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
sc 244 dev/cardbus/if_fxp_cardbus.c ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
sc 249 dev/cardbus/if_fxp_cardbus.c if (sc->sc_sdhook != NULL)
sc 250 dev/cardbus/if_fxp_cardbus.c shutdownhook_disestablish(sc->sc_sdhook);
sc 251 dev/cardbus/if_fxp_cardbus.c if (sc->sc_powerhook != NULL)
sc 252 dev/cardbus/if_fxp_cardbus.c powerhook_disestablish(sc->sc_powerhook);
sc 260 dev/cardbus/if_fxp_cardbus.c struct fxp_softc *sc = (struct fxp_softc *) self;
sc 267 dev/cardbus/if_fxp_cardbus.c panic("%s: data structure lacks", sc->sc_dev.dv_xname);
sc 270 dev/cardbus/if_fxp_cardbus.c rv = fxp_detach(sc);
sc 275 dev/cardbus/if_fxp_cardbus.c cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, sc->sc_ih);
sc 284 dev/cardbus/if_fxp_cardbus.c Cardbus_mapreg_unmap(ct, reg, sc->sc_st, sc->sc_sh, csc->size);
sc 64 dev/cardbus/if_malo_cardbus.c int malo_cardbus_enable(struct malo_softc *sc);
sc 65 dev/cardbus/if_malo_cardbus.c void malo_cardbus_disable(struct malo_softc *sc);
sc 90 dev/cardbus/if_malo_cardbus.c struct malo_softc *sc = &csc->sc_malo;
sc 95 dev/cardbus/if_malo_cardbus.c sc->sc_dmat = ca->ca_dmat;
sc 101 dev/cardbus/if_malo_cardbus.c sc->sc_enable = malo_cardbus_enable;
sc 102 dev/cardbus/if_malo_cardbus.c sc->sc_disable = malo_cardbus_disable;
sc 104 dev/cardbus/if_malo_cardbus.c sc->sc_power = malo_cardbus_power;
sc 109 dev/cardbus/if_malo_cardbus.c CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_mem1_bt,
sc 110 dev/cardbus/if_malo_cardbus.c &sc->sc_mem1_bh, &base, &csc->sc_mapsize1);
sc 119 dev/cardbus/if_malo_cardbus.c CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_mem2_bt,
sc 120 dev/cardbus/if_malo_cardbus.c &sc->sc_mem2_bh, &base, &csc->sc_mapsize2);
sc 123 dev/cardbus/if_malo_cardbus.c Cardbus_mapreg_unmap(ct, CARDBUS_BASE0_REG, sc->sc_mem1_bt,
sc 124 dev/cardbus/if_malo_cardbus.c sc->sc_mem1_bh, csc->sc_mapsize1);
sc 134 dev/cardbus/if_malo_cardbus.c error = malo_attach(sc);
sc 136 dev/cardbus/if_malo_cardbus.c malo_cardbus_detach(&sc->sc_dev, 0);
sc 145 dev/cardbus/if_malo_cardbus.c struct malo_softc *sc = &csc->sc_malo;
sc 151 dev/cardbus/if_malo_cardbus.c error = malo_detach(sc);
sc 162 dev/cardbus/if_malo_cardbus.c Cardbus_mapreg_unmap(ct, CARDBUS_BASE0_REG, sc->sc_mem1_bt,
sc 163 dev/cardbus/if_malo_cardbus.c sc->sc_mem1_bh, csc->sc_mapsize1);
sc 164 dev/cardbus/if_malo_cardbus.c Cardbus_mapreg_unmap(ct, CARDBUS_BASE1_REG, sc->sc_mem2_bt,
sc 165 dev/cardbus/if_malo_cardbus.c sc->sc_mem2_bh, csc->sc_mapsize2);
sc 197 dev/cardbus/if_malo_cardbus.c malo_cardbus_enable(struct malo_softc *sc)
sc 199 dev/cardbus/if_malo_cardbus.c struct malo_cardbus_softc *csc = (struct malo_cardbus_softc *)sc;
sc 212 dev/cardbus/if_malo_cardbus.c malo_intr, sc, sc->sc_dev.dv_xname);
sc 215 dev/cardbus/if_malo_cardbus.c sc->sc_dev.dv_xname, csc->sc_intrline);
sc 224 dev/cardbus/if_malo_cardbus.c malo_cardbus_disable(struct malo_softc *sc)
sc 226 dev/cardbus/if_malo_cardbus.c struct malo_cardbus_softc *csc = (struct malo_cardbus_softc *)sc;
sc 99 dev/cardbus/if_pgt_cardbus.c struct pgt_softc *sc = &csc->sc_pgt;
sc 105 dev/cardbus/if_pgt_cardbus.c sc->sc_dmat = ca->ca_dmat;
sc 111 dev/cardbus/if_pgt_cardbus.c sc->sc_enable = pgt_cardbus_enable;
sc 112 dev/cardbus/if_pgt_cardbus.c sc->sc_disable = pgt_cardbus_disable;
sc 113 dev/cardbus/if_pgt_cardbus.c sc->sc_power = pgt_cardbus_power;
sc 117 dev/cardbus/if_pgt_cardbus.c sc->sc_flags |= SC_ISL3877;
sc 122 dev/cardbus/if_pgt_cardbus.c &sc->sc_iotag, &sc->sc_iohandle, &base, &csc->sc_mapsize);
sc 130 dev/cardbus/if_pgt_cardbus.c bus_space_write_4(sc->sc_iotag, sc->sc_iohandle, PGT_REG_INT_EN, 0);
sc 131 dev/cardbus/if_pgt_cardbus.c (void)bus_space_read_4(sc->sc_iotag, sc->sc_iohandle, PGT_REG_INT_EN);
sc 140 dev/cardbus/if_pgt_cardbus.c mountroothook_establish(pgt_attach, sc);
sc 142 dev/cardbus/if_pgt_cardbus.c pgt_attach(sc);
sc 149 dev/cardbus/if_pgt_cardbus.c struct pgt_softc *sc = &csc->sc_pgt;
sc 155 dev/cardbus/if_pgt_cardbus.c error = pgt_detach(sc);
sc 167 dev/cardbus/if_pgt_cardbus.c sc->sc_iotag, sc->sc_iohandle, csc->sc_mapsize);
sc 173 dev/cardbus/if_pgt_cardbus.c pgt_cardbus_enable(struct pgt_softc *sc)
sc 175 dev/cardbus/if_pgt_cardbus.c struct pgt_cardbus_softc *csc = (struct pgt_cardbus_softc *)sc;
sc 188 dev/cardbus/if_pgt_cardbus.c pgt_intr, sc, sc->sc_dev.dv_xname);
sc 191 dev/cardbus/if_pgt_cardbus.c sc->sc_dev.dv_xname, csc->sc_intrline);
sc 200 dev/cardbus/if_pgt_cardbus.c pgt_cardbus_disable(struct pgt_softc *sc)
sc 202 dev/cardbus/if_pgt_cardbus.c struct pgt_cardbus_softc *csc = (struct pgt_cardbus_softc *)sc;
sc 216 dev/cardbus/if_pgt_cardbus.c pgt_cardbus_power(struct pgt_softc *sc, int why)
sc 219 dev/cardbus/if_pgt_cardbus.c if (sc->sc_enable != NULL)
sc 220 dev/cardbus/if_pgt_cardbus.c (*sc->sc_enable)(sc);
sc 222 dev/cardbus/if_pgt_cardbus.c if (sc->sc_disable != NULL)
sc 223 dev/cardbus/if_pgt_cardbus.c (*sc->sc_disable)(sc);
sc 125 dev/cardbus/if_ral_cardbus.c struct rt2560_softc *sc = &csc->sc_sc;
sc 135 dev/cardbus/if_ral_cardbus.c sc->sc_dmat = ca->ca_dmat;
sc 141 dev/cardbus/if_ral_cardbus.c sc->sc_enable = ral_cardbus_enable;
sc 142 dev/cardbus/if_ral_cardbus.c sc->sc_disable = ral_cardbus_disable;
sc 143 dev/cardbus/if_ral_cardbus.c sc->sc_power = ral_cardbus_power;
sc 147 dev/cardbus/if_ral_cardbus.c CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &base,
sc 161 dev/cardbus/if_ral_cardbus.c (*csc->sc_opns->attach)(sc, CARDBUS_PRODUCT(ca->ca_id));
sc 170 dev/cardbus/if_ral_cardbus.c struct rt2560_softc *sc = &csc->sc_sc;
sc 176 dev/cardbus/if_ral_cardbus.c error = (*csc->sc_opns->detach)(sc);
sc 187 dev/cardbus/if_ral_cardbus.c Cardbus_mapreg_unmap(ct, CARDBUS_BASE0_REG, sc->sc_st, sc->sc_sh,
sc 194 dev/cardbus/if_ral_cardbus.c ral_cardbus_enable(struct rt2560_softc *sc)
sc 196 dev/cardbus/if_ral_cardbus.c struct ral_cardbus_softc *csc = (struct ral_cardbus_softc *)sc;
sc 209 dev/cardbus/if_ral_cardbus.c csc->sc_opns->intr, sc, sc->sc_dev.dv_xname);
sc 212 dev/cardbus/if_ral_cardbus.c sc->sc_dev.dv_xname, csc->sc_intrline);
sc 221 dev/cardbus/if_ral_cardbus.c ral_cardbus_disable(struct rt2560_softc *sc)
sc 223 dev/cardbus/if_ral_cardbus.c struct ral_cardbus_softc *csc = (struct ral_cardbus_softc *)sc;
sc 237 dev/cardbus/if_ral_cardbus.c ral_cardbus_power(struct rt2560_softc *sc, int why)
sc 239 dev/cardbus/if_ral_cardbus.c struct ral_cardbus_softc *csc = (struct ral_cardbus_softc *)sc;
sc 115 dev/cardbus/if_re_cardbus.c struct rl_softc *sc = &csc->sc_rl;
sc 118 dev/cardbus/if_re_cardbus.c (struct cardbus_softc *)sc->sc_dev.dv_parent;
sc 125 dev/cardbus/if_re_cardbus.c sc->sc_dmat = ca->ca_dmat;
sc 134 dev/cardbus/if_re_cardbus.c &sc->rl_btag, &sc->rl_bhandle, &adr, &csc->sc_mapsize) == 0) {
sc 149 dev/cardbus/if_re_cardbus.c re_cardbus_setup(sc);
sc 153 dev/cardbus/if_re_cardbus.c IPL_NET, re_intr, sc, sc->sc_dev.dv_xname);
sc 162 dev/cardbus/if_re_cardbus.c sc->sc_flags |= RL_ENABLED;
sc 163 dev/cardbus/if_re_cardbus.c sc->rl_type = RL_8169;
sc 165 dev/cardbus/if_re_cardbus.c sc->sc_sdhook = shutdownhook_establish(re_cardbus_shutdown, sc);
sc 166 dev/cardbus/if_re_cardbus.c sc->sc_pwrhook = powerhook_establish(re_cardbus_powerhook, sc);
sc 169 dev/cardbus/if_re_cardbus.c re_attach(sc, intrstr);
sc 176 dev/cardbus/if_re_cardbus.c re_cardbus_setup(struct rl_softc *sc)
sc 178 dev/cardbus/if_re_cardbus.c struct re_cardbus_softc *csc = (struct re_cardbus_softc *)sc;
sc 201 dev/cardbus/if_re_cardbus.c "-- setting to D0\n", sc->sc_dev.dv_xname,
sc 243 dev/cardbus/if_re_cardbus.c struct rl_softc *sc = &csc->sc_rl;
sc 245 dev/cardbus/if_re_cardbus.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 248 dev/cardbus/if_re_cardbus.c timeout_del(&sc->timer_handle);
sc 251 dev/cardbus/if_re_cardbus.c if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL)
sc 252 dev/cardbus/if_re_cardbus.c mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
sc 255 dev/cardbus/if_re_cardbus.c ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
sc 260 dev/cardbus/if_re_cardbus.c if (sc->sc_sdhook != NULL)
sc 261 dev/cardbus/if_re_cardbus.c shutdownhook_disestablish(sc->sc_sdhook);
sc 262 dev/cardbus/if_re_cardbus.c if (sc->sc_pwrhook != NULL)
sc 263 dev/cardbus/if_re_cardbus.c powerhook_disestablish(sc->sc_pwrhook);
sc 270 dev/cardbus/if_re_cardbus.c Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, sc->rl_btag, sc->rl_bhandle,
sc 279 dev/cardbus/if_re_cardbus.c struct rl_softc *sc = arg;
sc 280 dev/cardbus/if_re_cardbus.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 288 dev/cardbus/if_re_cardbus.c struct rl_softc *sc = arg;
sc 289 dev/cardbus/if_re_cardbus.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 152 dev/cardbus/if_rl_cardbus.c struct rl_softc *sc = &csc->sc_rl;
sc 155 dev/cardbus/if_rl_cardbus.c (struct cardbus_softc *)sc->sc_dev.dv_parent;
sc 161 dev/cardbus/if_rl_cardbus.c sc->sc_dmat = ca->ca_dmat;
sc 172 dev/cardbus/if_rl_cardbus.c &sc->rl_btag, &sc->rl_bhandle, &adr, &csc->sc_mapsize) == 0) {
sc 180 dev/cardbus/if_rl_cardbus.c &sc->rl_btag, &sc->rl_bhandle, &adr, &csc->sc_mapsize) == 0) {
sc 189 dev/cardbus/if_rl_cardbus.c sc->sc_dev.dv_xname);
sc 201 dev/cardbus/if_rl_cardbus.c rl_intr, sc, sc->sc_dev.dv_xname);
sc 210 dev/cardbus/if_rl_cardbus.c sc->rl_type = RL_8139;
sc 212 dev/cardbus/if_rl_cardbus.c rl_attach(sc);
sc 218 dev/cardbus/if_rl_cardbus.c rl_detach(sc)
sc 219 dev/cardbus/if_rl_cardbus.c struct rl_softc *sc;
sc 221 dev/cardbus/if_rl_cardbus.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 224 dev/cardbus/if_rl_cardbus.c timeout_del(&sc->sc_tick_tmo);
sc 227 dev/cardbus/if_rl_cardbus.c if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL)
sc 228 dev/cardbus/if_rl_cardbus.c mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
sc 231 dev/cardbus/if_rl_cardbus.c ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
sc 236 dev/cardbus/if_rl_cardbus.c if (sc->sc_sdhook != NULL)
sc 237 dev/cardbus/if_rl_cardbus.c shutdownhook_disestablish(sc->sc_sdhook);
sc 238 dev/cardbus/if_rl_cardbus.c if (sc->sc_pwrhook != NULL)
sc 239 dev/cardbus/if_rl_cardbus.c powerhook_disestablish(sc->sc_pwrhook);
sc 250 dev/cardbus/if_rl_cardbus.c struct rl_softc *sc = &csc->sc_rl;
sc 256 dev/cardbus/if_rl_cardbus.c panic("%s: data structure lacks", sc->sc_dev.dv_xname);
sc 258 dev/cardbus/if_rl_cardbus.c rv = rl_detach(sc);
sc 272 dev/cardbus/if_rl_cardbus.c sc->rl_btag, sc->rl_bhandle, csc->sc_mapsize);
sc 281 dev/cardbus/if_rl_cardbus.c struct rl_softc *sc = &csc->sc_rl;
sc 307 dev/cardbus/if_rl_cardbus.c "-- setting to D0\n", sc->sc_dev.dv_xname,
sc 202 dev/cardbus/if_rtw_cardbus.c struct rtw_softc *sc = &csc->sc_rtw;
sc 203 dev/cardbus/if_rtw_cardbus.c struct rtw_regs *regs = &sc->sc_regs;
sc 209 dev/cardbus/if_rtw_cardbus.c sc->sc_dmat = ca->ca_dmat;
sc 216 dev/cardbus/if_rtw_cardbus.c sc->sc_enable = rtw_cardbus_enable;
sc 217 dev/cardbus/if_rtw_cardbus.c sc->sc_disable = rtw_cardbus_disable;
sc 218 dev/cardbus/if_rtw_cardbus.c sc->sc_power = rtw_cardbus_power;
sc 220 dev/cardbus/if_rtw_cardbus.c sc->sc_intr_ack = rtw_cardbus_intr_ack;
sc 226 dev/cardbus/if_rtw_cardbus.c ("%s: pass %d.%d signature %08x\n", sc->sc_dev.dv_xname,
sc 239 dev/cardbus/if_rtw_cardbus.c sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize));
sc 249 dev/cardbus/if_rtw_cardbus.c sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize));
sc 256 dev/cardbus/if_rtw_cardbus.c sc->sc_dev.dv_xname);
sc 274 dev/cardbus/if_rtw_cardbus.c rtw_attach(sc);
sc 291 dev/cardbus/if_rtw_cardbus.c struct rtw_softc *sc = &csc->sc_rtw;
sc 292 dev/cardbus/if_rtw_cardbus.c struct rtw_regs *regs = &sc->sc_regs;
sc 298 dev/cardbus/if_rtw_cardbus.c panic("%s: data structure lacks", sc->sc_dev.dv_xname);
sc 301 dev/cardbus/if_rtw_cardbus.c rv = rtw_detach(sc);
sc 324 dev/cardbus/if_rtw_cardbus.c rtw_cardbus_enable(struct rtw_softc *sc)
sc 326 dev/cardbus/if_rtw_cardbus.c struct rtw_cardbus_softc *csc = (void *) sc;
sc 345 dev/cardbus/if_rtw_cardbus.c rtw_intr, sc, sc->sc_dev.dv_xname);
sc 348 dev/cardbus/if_rtw_cardbus.c sc->sc_dev.dv_xname, csc->sc_intrline);
sc 353 dev/cardbus/if_rtw_cardbus.c rtw_cardbus_funcregen(&sc->sc_regs, 1);
sc 355 dev/cardbus/if_rtw_cardbus.c RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR);
sc 356 dev/cardbus/if_rtw_cardbus.c RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR);
sc 362 dev/cardbus/if_rtw_cardbus.c rtw_cardbus_disable(struct rtw_softc *sc)
sc 364 dev/cardbus/if_rtw_cardbus.c struct rtw_cardbus_softc *csc = (void *) sc;
sc 369 dev/cardbus/if_rtw_cardbus.c RTW_WRITE(&sc->sc_regs, RTW_FEMR,
sc 370 dev/cardbus/if_rtw_cardbus.c RTW_READ(&sc->sc_regs, RTW_FEMR) & ~RTW_FEMR_INTR);
sc 372 dev/cardbus/if_rtw_cardbus.c rtw_cardbus_funcregen(&sc->sc_regs, 0);
sc 383 dev/cardbus/if_rtw_cardbus.c rtw_cardbus_power(struct rtw_softc *sc, int why)
sc 386 dev/cardbus/if_rtw_cardbus.c ("%s: rtw_cardbus_power\n", sc->sc_dev.dv_xname));
sc 389 dev/cardbus/if_rtw_cardbus.c rtw_enable(sc);
sc 395 dev/cardbus/if_rtw_cardbus.c struct rtw_softc *sc = &csc->sc_rtw;
sc 412 dev/cardbus/if_rtw_cardbus.c sc->sc_dev.dv_xname);
sc 418 dev/cardbus/if_rtw_cardbus.c sc->sc_dev.dv_xname, reg);
sc 208 dev/cardbus/if_xl_cardbus.c struct xl_softc *sc = &csc->sc_softc;
sc 219 dev/cardbus/if_xl_cardbus.c &sc->xl_btag, &ioh, &adr, &csc->sc_mapsize)) {
sc 232 dev/cardbus/if_xl_cardbus.c sc->xl_flags = ecp->ecp_flags;
sc 233 dev/cardbus/if_xl_cardbus.c sc->sc_dmat = ca->ca_dmat;
sc 236 dev/cardbus/if_xl_cardbus.c sc->xl_bhandle = ioh;
sc 285 dev/cardbus/if_xl_cardbus.c sc->xl_intrhand = cardbus_intr_establish(cc, cf, ca->ca_intrline,
sc 288 dev/cardbus/if_xl_cardbus.c if (sc->xl_intrhand == NULL) {
sc 296 dev/cardbus/if_xl_cardbus.c sc->intr_ack = xl_cardbus_intr_ack;
sc 298 dev/cardbus/if_xl_cardbus.c xl_attach(sc);
sc 307 dev/cardbus/if_xl_cardbus.c xl_detach(struct xl_softc *sc)
sc 309 dev/cardbus/if_xl_cardbus.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 313 dev/cardbus/if_xl_cardbus.c timeout_del(&sc->xl_stsup_tmo);
sc 315 dev/cardbus/if_xl_cardbus.c xl_freetxrx(sc);
sc 318 dev/cardbus/if_xl_cardbus.c if (sc->xl_hasmii)
sc 319 dev/cardbus/if_xl_cardbus.c mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
sc 322 dev/cardbus/if_xl_cardbus.c ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
sc 327 dev/cardbus/if_xl_cardbus.c if (sc->sc_sdhook != NULL)
sc 328 dev/cardbus/if_xl_cardbus.c shutdownhook_disestablish(sc->sc_sdhook);
sc 329 dev/cardbus/if_xl_cardbus.c if (sc->sc_pwrhook != NULL)
sc 330 dev/cardbus/if_xl_cardbus.c powerhook_disestablish(sc->sc_pwrhook);
sc 339 dev/cardbus/if_xl_cardbus.c struct xl_softc *sc = &csc->sc_softc;
sc 345 dev/cardbus/if_xl_cardbus.c panic("%s: data structure lacks", sc->sc_dev.dv_xname);
sc 349 dev/cardbus/if_xl_cardbus.c rv = xl_detach(sc);
sc 355 dev/cardbus/if_xl_cardbus.c sc->xl_intrhand);
sc 362 dev/cardbus/if_xl_cardbus.c Cardbus_mapreg_unmap(ct, CARDBUS_BASE0_REG, sc->xl_btag,
sc 363 dev/cardbus/if_xl_cardbus.c sc->xl_bhandle, csc->sc_mapsize);
sc 369 dev/cardbus/if_xl_cardbus.c xl_cardbus_intr_ack(struct xl_softc *sc)
sc 371 dev/cardbus/if_xl_cardbus.c struct xl_cardbus_softc *csc = (struct xl_cardbus_softc *)sc;
sc 73 dev/cardbus/ohci_cardbus.c ohci_softc_t sc;
sc 106 dev/cardbus/ohci_cardbus.c struct ohci_cardbus_softc *sc = (struct ohci_cardbus_softc *)self;
sc 115 dev/cardbus/ohci_cardbus.c const char *devname = sc->sc.sc_bus.bdev.dv_xname;
sc 122 dev/cardbus/ohci_cardbus.c &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
sc 128 dev/cardbus/ohci_cardbus.c bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
sc 131 dev/cardbus/ohci_cardbus.c sc->sc_cc = cc;
sc 132 dev/cardbus/ohci_cardbus.c sc->sc_cf = cf;
sc 133 dev/cardbus/ohci_cardbus.c sc->sc_ct = ct;
sc 134 dev/cardbus/ohci_cardbus.c sc->sc.sc_bus.dmatag = ca->ca_dmat;
sc 146 dev/cardbus/ohci_cardbus.c sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline,
sc 147 dev/cardbus/ohci_cardbus.c IPL_USB, ohci_intr, sc, devname);
sc 148 dev/cardbus/ohci_cardbus.c if (sc->sc_ih == NULL) {
sc 156 dev/cardbus/ohci_cardbus.c sc->sc.sc_id_vendor = CARDBUS_VENDOR(ca->ca_id);
sc 158 dev/cardbus/ohci_cardbus.c strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor));
sc 160 dev/cardbus/ohci_cardbus.c snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
sc 164 dev/cardbus/ohci_cardbus.c if (ohci_checkrev(&sc->sc) != USBD_NORMAL_COMPLETION ||
sc 165 dev/cardbus/ohci_cardbus.c ohci_handover(&sc->sc) != USBD_NORMAL_COMPLETION) {
sc 166 dev/cardbus/ohci_cardbus.c cardbus_intr_disestablish(sc->sc_cc, sc->sc_cf, sc->sc_ih);
sc 167 dev/cardbus/ohci_cardbus.c sc->sc_ih = 0;
sc 171 dev/cardbus/ohci_cardbus.c r = ohci_init(&sc->sc);
sc 176 dev/cardbus/ohci_cardbus.c cardbus_intr_disestablish(sc->sc_cc, sc->sc_cf, sc->sc_ih);
sc 177 dev/cardbus/ohci_cardbus.c sc->sc_ih = 0;
sc 182 dev/cardbus/ohci_cardbus.c sc->sc.sc_powerhook = powerhook_establish(ohci_power, &sc->sc);
sc 185 dev/cardbus/ohci_cardbus.c sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
sc 192 dev/cardbus/ohci_cardbus.c struct ohci_cardbus_softc *sc = (struct ohci_cardbus_softc *)self;
sc 193 dev/cardbus/ohci_cardbus.c struct cardbus_devfunc *ct = sc->sc_ct;
sc 196 dev/cardbus/ohci_cardbus.c rv = ohci_detach(&sc->sc, flags);
sc 200 dev/cardbus/ohci_cardbus.c if (sc->sc.sc_powerhook != NULL)
sc 201 dev/cardbus/ohci_cardbus.c powerhook_disestablish(sc->sc.sc_powerhook);
sc 203 dev/cardbus/ohci_cardbus.c if (sc->sc_ih != NULL) {
sc 204 dev/cardbus/ohci_cardbus.c cardbus_intr_disestablish(sc->sc_cc, sc->sc_cf, sc->sc_ih);
sc 205 dev/cardbus/ohci_cardbus.c sc->sc_ih = NULL;
sc 207 dev/cardbus/ohci_cardbus.c if (sc->sc.sc_size) {
sc 208 dev/cardbus/ohci_cardbus.c Cardbus_mapreg_unmap(ct, CARDBUS_CBMEM, sc->sc.iot,
sc 209 dev/cardbus/ohci_cardbus.c sc->sc.ioh, sc->sc.sc_size);
sc 210 dev/cardbus/ohci_cardbus.c sc->sc.sc_size = 0;
sc 85 dev/cardbus/puc_cardbus.c struct puc_softc *sc = &csc->sc_psc;
sc 99 dev/cardbus/puc_cardbus.c sc->sc_desc = puc_find_description(PCI_VENDOR(ca->ca_id),
sc 102 dev/cardbus/puc_cardbus.c puc_print_ports(sc->sc_desc);
sc 109 dev/cardbus/puc_cardbus.c sc->sc_bar_mappings[i].mapped = 0;
sc 114 dev/cardbus/puc_cardbus.c if (!(sc->sc_bar_mappings[i].mapped = !Cardbus_mapreg_map(ct,
sc 116 dev/cardbus/puc_cardbus.c &sc->sc_bar_mappings[i].t, &sc->sc_bar_mappings[i].h,
sc 117 dev/cardbus/puc_cardbus.c &sc->sc_bar_mappings[i].a, &sc->sc_bar_mappings[i].s)))
sc 119 dev/cardbus/puc_cardbus.c sc->sc_dev.dv_xname, (long)bar);
sc 120 dev/cardbus/puc_cardbus.c sc->sc_bar_mappings[i].type = type;
sc 130 dev/cardbus/puc_cardbus.c sc->sc_dev.dv_xname, reg);
sc 139 dev/cardbus/puc_cardbus.c paa.puc = sc;
sc 143 dev/cardbus/puc_cardbus.c puc_common_attach(sc, &paa);
sc 149 dev/cardbus/puc_cardbus.c struct puc_cardbus_softc *sc = paa->puc;
sc 152 dev/cardbus/puc_cardbus.c snprintf(str, sizeof str, "irq %d", sc->intrline);
sc 160 dev/cardbus/puc_cardbus.c struct puc_cardbus_softc *sc = paa->puc;
sc 161 dev/cardbus/puc_cardbus.c struct cardbus_devfunc *ct = sc->ct;
sc 163 dev/cardbus/puc_cardbus.c return (cardbus_intr_establish(ct->ct_cc, ct->ct_cf, sc->intrline,
sc 171 dev/cardbus/puc_cardbus.c struct puc_softc *sc = &csc->sc_psc;
sc 176 dev/cardbus/puc_cardbus.c if (sc->sc_ports[i].dev)
sc 177 dev/cardbus/puc_cardbus.c if ((rv = config_detach(sc->sc_ports[i].dev, flags)))
sc 181 dev/cardbus/puc_cardbus.c if (sc->sc_bar_mappings[i].mapped)
sc 182 dev/cardbus/puc_cardbus.c Cardbus_mapreg_unmap(ct, sc->sc_bar_mappings[i].type,
sc 183 dev/cardbus/puc_cardbus.c sc->sc_bar_mappings[i].t, sc->sc_bar_mappings[i].h,
sc 184 dev/cardbus/puc_cardbus.c sc->sc_bar_mappings[i].s);
sc 64 dev/cardbus/uhci_cardbus.c uhci_softc_t sc;
sc 96 dev/cardbus/uhci_cardbus.c struct uhci_cardbus_softc *sc = (struct uhci_cardbus_softc *)self;
sc 105 dev/cardbus/uhci_cardbus.c const char *devname = sc->sc.sc_bus.bdev.dv_xname;
sc 112 dev/cardbus/uhci_cardbus.c &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) {
sc 118 dev/cardbus/uhci_cardbus.c bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
sc 120 dev/cardbus/uhci_cardbus.c sc->sc_cc = cc;
sc 121 dev/cardbus/uhci_cardbus.c sc->sc_cf = cf;
sc 122 dev/cardbus/uhci_cardbus.c sc->sc_ct = ct;
sc 123 dev/cardbus/uhci_cardbus.c sc->sc.sc_bus.dmatag = ca->ca_dmat;
sc 135 dev/cardbus/uhci_cardbus.c sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline,
sc 136 dev/cardbus/uhci_cardbus.c IPL_USB, uhci_intr, sc, devname);
sc 137 dev/cardbus/uhci_cardbus.c if (sc->sc_ih == NULL) {
sc 149 dev/cardbus/uhci_cardbus.c sc->sc.sc_bus.usbrev = USBREV_PRE_1_0;
sc 152 dev/cardbus/uhci_cardbus.c sc->sc.sc_bus.usbrev = USBREV_1_0;
sc 155 dev/cardbus/uhci_cardbus.c sc->sc.sc_bus.usbrev = USBREV_1_1;
sc 158 dev/cardbus/uhci_cardbus.c sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
sc 162 dev/cardbus/uhci_cardbus.c uhci_run(&sc->sc, 0); /* stop the controller */
sc 164 dev/cardbus/uhci_cardbus.c bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
sc 166 dev/cardbus/uhci_cardbus.c bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
sc 170 dev/cardbus/uhci_cardbus.c sc->sc.sc_id_vendor = CARDBUS_VENDOR(ca->ca_id);
sc 172 dev/cardbus/uhci_cardbus.c strlcpy(sc->sc.sc_vendor, vendor, sizeof (sc->sc.sc_vendor));
sc 174 dev/cardbus/uhci_cardbus.c snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
sc 177 dev/cardbus/uhci_cardbus.c r = uhci_init(&sc->sc);
sc 180 dev/cardbus/uhci_cardbus.c bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc 185 dev/cardbus/uhci_cardbus.c sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
sc 192 dev/cardbus/uhci_cardbus.c struct uhci_cardbus_softc *sc = (struct uhci_cardbus_softc *)self;
sc 193 dev/cardbus/uhci_cardbus.c struct cardbus_devfunc *ct = sc->sc_ct;
sc 196 dev/cardbus/uhci_cardbus.c rv = uhci_detach(&sc->sc, flags);
sc 200 dev/cardbus/uhci_cardbus.c if (sc->sc_ih != NULL) {
sc 201 dev/cardbus/uhci_cardbus.c cardbus_intr_disestablish(sc->sc_cc, sc->sc_cf, sc->sc_ih);
sc 202 dev/cardbus/uhci_cardbus.c sc->sc_ih = NULL;
sc 205 dev/cardbus/uhci_cardbus.c if (sc->sc.sc_size) {
sc 206 dev/cardbus/uhci_cardbus.c Cardbus_mapreg_unmap(ct, PCI_CBIO, sc->sc.iot,
sc 207 dev/cardbus/uhci_cardbus.c sc->sc.ioh, sc->sc.sc_size);
sc 208 dev/cardbus/uhci_cardbus.c sc->sc.sc_size = 0;
sc 189 dev/ccd.c #define ccdlock(sc) rw_enter(&sc->sc_rwlock, RW_WRITE|RW_INTR)
sc 190 dev/ccd.c #define ccdunlock(sc) rw_exit_write(&sc->sc_rwlock)
sc 72 dev/dec/if_le_dec.c dec_le_common_attach(struct am7990_softc *sc, u_char *eap)
sc 76 dev/dec/if_le_dec.c sc->sc_rdcsr = le_dec_rdcsr;
sc 77 dev/dec/if_le_dec.c sc->sc_wrcsr = le_dec_wrcsr;
sc 78 dev/dec/if_le_dec.c sc->sc_hwinit = NULL;
sc 80 dev/dec/if_le_dec.c sc->sc_conf3 = 0;
sc 81 dev/dec/if_le_dec.c sc->sc_addr = 0;
sc 82 dev/dec/if_le_dec.c sc->sc_memsize = 65536;
sc 87 dev/dec/if_le_dec.c for (i = 0; i < sizeof(sc->sc_arpcom.ac_enaddr); i++) {
sc 88 dev/dec/if_le_dec.c sc->sc_arpcom.ac_enaddr[i] = *eap;
sc 92 dev/dec/if_le_dec.c am7990_config(sc);
sc 96 dev/dec/if_le_dec.c le_dec_wrcsr(struct am7990_softc *sc, u_int16_t port, u_int16_t val)
sc 98 dev/dec/if_le_dec.c struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1;
sc 105 dev/dec/if_le_dec.c le_dec_rdcsr(struct am7990_softc *sc, u_int16_t port)
sc 107 dev/dec/if_le_dec.c struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1;
sc 339 dev/eisa/aha1742.c ahb_send_mbox(sc, opcode, ecb)
sc 340 dev/eisa/aha1742.c struct ahb_softc *sc;
sc 344 dev/eisa/aha1742.c bus_space_tag_t iot = sc->sc_iot;
sc 345 dev/eisa/aha1742.c bus_space_handle_t ioh = sc->sc_ioh;
sc 355 dev/eisa/aha1742.c printf("%s: board not responding\n", sc->sc_dev.dv_xname);
sc 368 dev/eisa/aha1742.c ahb_poll(sc, xs, count)
sc 369 dev/eisa/aha1742.c struct ahb_softc *sc;
sc 373 dev/eisa/aha1742.c bus_space_tag_t iot = sc->sc_iot;
sc 374 dev/eisa/aha1742.c bus_space_handle_t ioh = sc->sc_ioh;
sc 382 dev/eisa/aha1742.c ahbintr(sc);
sc 395 dev/eisa/aha1742.c ahb_send_immed(sc, target, cmd)
sc 396 dev/eisa/aha1742.c struct ahb_softc *sc;
sc 400 dev/eisa/aha1742.c bus_space_tag_t iot = sc->sc_iot;
sc 401 dev/eisa/aha1742.c bus_space_handle_t ioh = sc->sc_ioh;
sc 411 dev/eisa/aha1742.c printf("%s: board not responding\n", sc->sc_dev.dv_xname);
sc 480 dev/eisa/aha1742.c struct ahb_softc *sc = (void *)self;
sc 488 dev/eisa/aha1742.c sc->sc_iot = iot;
sc 489 dev/eisa/aha1742.c sc->sc_ec = ec;
sc 494 dev/eisa/aha1742.c sc->sc_ioh = ioh;
sc 495 dev/eisa/aha1742.c if (ahb_find(iot, ioh, sc))
sc 498 dev/eisa/aha1742.c ahb_init(sc);
sc 499 dev/eisa/aha1742.c TAILQ_INIT(&sc->free_ecb);
sc 504 dev/eisa/aha1742.c sc->sc_link.adapter_softc = sc;
sc 505 dev/eisa/aha1742.c sc->sc_link.adapter_target = sc->ahb_scsi_dev;
sc 506 dev/eisa/aha1742.c sc->sc_link.adapter = &ahb_switch;
sc 507 dev/eisa/aha1742.c sc->sc_link.device = &ahb_dev;
sc 508 dev/eisa/aha1742.c sc->sc_link.openings = 2;
sc 522 dev/eisa/aha1742.c if (eisa_intr_map(ec, sc->sc_irq, &ih)) {
sc 524 dev/eisa/aha1742.c sc->sc_dev.dv_xname, sc->sc_irq);
sc 528 dev/eisa/aha1742.c sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO,
sc 529 dev/eisa/aha1742.c ahbintr, sc, sc->sc_dev.dv_xname);
sc 530 dev/eisa/aha1742.c if (sc->sc_ih == NULL) {
sc 532 dev/eisa/aha1742.c sc->sc_dev.dv_xname);
sc 542 dev/eisa/aha1742.c saa.saa_sc_link = &sc->sc_link;
sc 557 dev/eisa/aha1742.c struct ahb_softc *sc = arg;
sc 558 dev/eisa/aha1742.c bus_space_tag_t iot = sc->sc_iot;
sc 559 dev/eisa/aha1742.c bus_space_handle_t ioh = sc->sc_ioh;
sc 565 dev/eisa/aha1742.c printf("%s: ahbintr ", sc->sc_dev.dv_xname);
sc 591 dev/eisa/aha1742.c ecb = ahb_ecb_phys_kv(sc, mboxval);
sc 594 dev/eisa/aha1742.c sc->sc_dev.dv_xname);
sc 602 dev/eisa/aha1742.c ecb = sc->immed_ecb;
sc 603 dev/eisa/aha1742.c sc->immed_ecb = 0;
sc 608 dev/eisa/aha1742.c sc->sc_dev.dv_xname, ahbstat);
sc 620 dev/eisa/aha1742.c ahb_done(sc, ecb);
sc 634 dev/eisa/aha1742.c ahb_done(sc, ecb)
sc 635 dev/eisa/aha1742.c struct ahb_softc *sc;
sc 668 dev/eisa/aha1742.c sc->sc_dev.dv_xname, stat->host_stat);
sc 684 dev/eisa/aha1742.c sc->sc_dev.dv_xname, stat->target_stat);
sc 692 dev/eisa/aha1742.c ahb_free_ecb(sc, ecb, xs->flags);
sc 701 dev/eisa/aha1742.c ahb_free_ecb(sc, ecb, flags)
sc 702 dev/eisa/aha1742.c struct ahb_softc *sc;
sc 711 dev/eisa/aha1742.c TAILQ_INSERT_HEAD(&sc->free_ecb, ecb, chain);
sc 718 dev/eisa/aha1742.c wakeup(&sc->free_ecb);
sc 726 dev/eisa/aha1742.c ahb_init_ecb(sc, ecb)
sc 727 dev/eisa/aha1742.c struct ahb_softc *sc;
sc 739 dev/eisa/aha1742.c ecb->nexthash = sc->ecbhash[hashnum];
sc 740 dev/eisa/aha1742.c sc->ecbhash[hashnum] = ecb;
sc 746 dev/eisa/aha1742.c ahb_reset_ecb(sc, ecb)
sc 747 dev/eisa/aha1742.c struct ahb_softc *sc;
sc 760 dev/eisa/aha1742.c ahb_get_ecb(sc, flags)
sc 761 dev/eisa/aha1742.c struct ahb_softc *sc;
sc 774 dev/eisa/aha1742.c ecb = TAILQ_FIRST(&sc->free_ecb);
sc 776 dev/eisa/aha1742.c TAILQ_REMOVE(&sc->free_ecb, ecb, chain);
sc 779 dev/eisa/aha1742.c if (sc->numecbs < AHB_ECB_MAX) {
sc 783 dev/eisa/aha1742.c ahb_init_ecb(sc, ecb);
sc 784 dev/eisa/aha1742.c sc->numecbs++;
sc 787 dev/eisa/aha1742.c sc->sc_dev.dv_xname);
sc 794 dev/eisa/aha1742.c tsleep(&sc->free_ecb, PRIBIO, "ahbecb", 0);
sc 797 dev/eisa/aha1742.c ahb_reset_ecb(sc, ecb);
sc 809 dev/eisa/aha1742.c ahb_ecb_phys_kv(sc, ecb_phys)
sc 810 dev/eisa/aha1742.c struct ahb_softc *sc;
sc 814 dev/eisa/aha1742.c struct ahb_ecb *ecb = sc->ecbhash[hashnum];
sc 828 dev/eisa/aha1742.c ahb_find(iot, ioh, sc)
sc 831 dev/eisa/aha1742.c struct ahb_softc *sc;
sc 909 dev/eisa/aha1742.c if (sc != NULL) {
sc 910 dev/eisa/aha1742.c sc->sc_irq = irq;
sc 911 dev/eisa/aha1742.c sc->ahb_scsi_dev = busid;
sc 921 dev/eisa/aha1742.c ahb_init(sc)
sc 922 dev/eisa/aha1742.c struct ahb_softc *sc;
sc 946 dev/eisa/aha1742.c struct ahb_softc *sc = sc_link->adapter_softc;
sc 965 dev/eisa/aha1742.c printf("%s: done?\n", sc->sc_dev.dv_xname);
sc 968 dev/eisa/aha1742.c if ((ecb = ahb_get_ecb(sc, flags)) == NULL) {
sc 982 dev/eisa/aha1742.c if (sc->immed_ecb)
sc 984 dev/eisa/aha1742.c sc->immed_ecb = ecb;
sc 988 dev/eisa/aha1742.c ahb_send_immed(sc, sc_link->target, AHB_TARG_RESET);
sc 1001 dev/eisa/aha1742.c if (ahb_poll(sc, xs, xs->timeout))
sc 1102 dev/eisa/aha1742.c sc->sc_dev.dv_xname, AHB_NSEG);
sc 1104 dev/eisa/aha1742.c ahb_free_ecb(sc, ecb, flags);
sc 1121 dev/eisa/aha1742.c ahb_send_mbox(sc, OP_START_ECB, ecb);
sc 1137 dev/eisa/aha1742.c if (ahb_poll(sc, xs, xs->timeout)) {
sc 1139 dev/eisa/aha1742.c if (ahb_poll(sc, xs, 2000))
sc 1152 dev/eisa/aha1742.c struct ahb_softc *sc = sc_link->adapter_softc;
sc 1164 dev/eisa/aha1742.c ahb_done(sc, ecb);
sc 1178 dev/eisa/aha1742.c ahb_done(sc, ecb);
sc 1184 dev/eisa/aha1742.c ahb_send_mbox(sc, OP_ABORT_ECB, ecb);
sc 1207 dev/eisa/aha1742.c ahb_print_active_ecb(sc)
sc 1208 dev/eisa/aha1742.c struct ahb_softc *sc;
sc 1214 dev/eisa/aha1742.c ecb = sc->ecb_hash_list[i];
sc 155 dev/eisa/bha_eisa.c struct bha_softc *sc = (void *)self;
sc 184 dev/eisa/bha_eisa.c sc->sc_iot = iot;
sc 185 dev/eisa/bha_eisa.c sc->sc_ioh = ioh2;
sc 186 dev/eisa/bha_eisa.c sc->sc_dmat = ea->ea_dmat;
sc 192 dev/eisa/bha_eisa.c sc->sc_dmaflags = 0;
sc 199 dev/eisa/bha_eisa.c sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO,
sc 200 dev/eisa/bha_eisa.c bha_intr, sc, sc->sc_dev.dv_xname);
sc 201 dev/eisa/bha_eisa.c if (sc->sc_ih == NULL) {
sc 210 dev/eisa/bha_eisa.c bha_attach(sc, &bpd);
sc 155 dev/eisa/cac_eisa.c struct cac_softc *sc;
sc 161 dev/eisa/cac_eisa.c sc = (struct cac_softc *)self;
sc 171 dev/eisa/cac_eisa.c sc->sc_iot = iot;
sc 172 dev/eisa/cac_eisa.c sc->sc_ioh = ioh;
sc 173 dev/eisa/cac_eisa.c sc->sc_dmat = ea->ea_dmat;
sc 202 dev/eisa/cac_eisa.c if ((sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO,
sc 203 dev/eisa/cac_eisa.c cac_intr, sc, sc->sc_dv.dv_xname)) == NULL) {
sc 219 dev/eisa/cac_eisa.c sc->sc_cl = cac_eisa_type[i].ct_linkage;
sc 220 dev/eisa/cac_eisa.c cac_init(sc, 0);
sc 228 dev/eisa/cac_eisa.c cac_eisa_l0_fifo_full(struct cac_softc *sc)
sc 231 dev/eisa/cac_eisa.c return ((cac_inb(sc, CAC_EISAREG_SYSTEM_DOORBELL) &
sc 236 dev/eisa/cac_eisa.c cac_eisa_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb)
sc 247 dev/eisa/cac_eisa.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, (caddr_t)ccb - sc->sc_ccbs,
sc 250 dev/eisa/cac_eisa.c cac_outb(sc, CAC_EISAREG_SYSTEM_DOORBELL, CAC_EISA_CHANNEL_CLEAR);
sc 251 dev/eisa/cac_eisa.c cac_outl(sc, CAC_EISAREG_LIST_ADDR, ccb->ccb_paddr);
sc 252 dev/eisa/cac_eisa.c cac_outw(sc, CAC_EISAREG_LIST_LEN, size);
sc 253 dev/eisa/cac_eisa.c cac_outb(sc, CAC_EISAREG_LOCAL_DOORBELL, CAC_EISA_CHANNEL_BUSY);
sc 257 dev/eisa/cac_eisa.c cac_eisa_l0_completed(struct cac_softc *sc)
sc 263 dev/eisa/cac_eisa.c if ((cac_inb(sc, CAC_EISAREG_SYSTEM_DOORBELL) &
sc 267 dev/eisa/cac_eisa.c cac_outb(sc, CAC_EISAREG_SYSTEM_DOORBELL, CAC_EISA_CHANNEL_BUSY);
sc 268 dev/eisa/cac_eisa.c off = cac_inl(sc, CAC_EISAREG_COMPLETE_ADDR);
sc 269 dev/eisa/cac_eisa.c status = cac_inb(sc, CAC_EISAREG_LIST_STATUS);
sc 270 dev/eisa/cac_eisa.c cac_outb(sc, CAC_EISAREG_LOCAL_DOORBELL, CAC_EISA_CHANNEL_CLEAR);
sc 275 dev/eisa/cac_eisa.c off = (off & ~3) - sc->sc_ccbs_paddr;
sc 276 dev/eisa/cac_eisa.c ccb = (struct cac_ccb *)(sc->sc_ccbs + off);
sc 278 dev/eisa/cac_eisa.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off, sizeof(struct cac_ccb),
sc 286 dev/eisa/cac_eisa.c cac_eisa_l0_intr_pending(struct cac_softc *sc)
sc 289 dev/eisa/cac_eisa.c return (cac_inb(sc, CAC_EISAREG_SYSTEM_DOORBELL) &
sc 294 dev/eisa/cac_eisa.c cac_eisa_l0_intr_enable(struct cac_softc *sc, int state)
sc 298 dev/eisa/cac_eisa.c cac_outb(sc, CAC_EISAREG_SYSTEM_DOORBELL,
sc 300 dev/eisa/cac_eisa.c cac_outb(sc, CAC_EISAREG_LOCAL_DOORBELL,
sc 302 dev/eisa/cac_eisa.c cac_outb(sc, CAC_EISAREG_INTR_MASK, CAC_INTR_ENABLE);
sc 303 dev/eisa/cac_eisa.c cac_outb(sc, CAC_EISAREG_SYSTEM_MASK, CAC_INTR_ENABLE);
sc 305 dev/eisa/cac_eisa.c cac_outb(sc, CAC_EISAREG_SYSTEM_MASK, CAC_INTR_DISABLE);
sc 155 dev/eisa/dpt_eisa.c struct dpt_softc *sc;
sc 161 dev/eisa/dpt_eisa.c sc = (struct dpt_softc *)self;
sc 173 dev/eisa/dpt_eisa.c sc->sc_iot = iot;
sc 174 dev/eisa/dpt_eisa.c sc->sc_ioh = ioh;
sc 175 dev/eisa/dpt_eisa.c sc->sc_dmat = ea->ea_dmat;
sc 190 dev/eisa/dpt_eisa.c sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO,
sc 191 dev/eisa/dpt_eisa.c dpt_intr, sc);
sc 194 dev/eisa/dpt_eisa.c sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO,
sc 195 dev/eisa/dpt_eisa.c dpt_intr, sc, sc->sc_dv.dv_xname);
sc 197 dev/eisa/dpt_eisa.c if (sc->sc_ih == NULL) {
sc 206 dev/eisa/dpt_eisa.c if (dpt_readcfg(sc)) {
sc 208 dev/eisa/dpt_eisa.c sc->sc_dv.dv_xname);
sc 213 dev/eisa/dpt_eisa.c dpt_init(sc, intrstr);
sc 122 dev/eisa/if_ep_eisa.c struct ep_softc *sc = (void *)self;
sc 138 dev/eisa/if_ep_eisa.c sc->bustype = EP_BUS_EISA;
sc 139 dev/eisa/if_ep_eisa.c sc->sc_ioh = ioh;
sc 140 dev/eisa/if_ep_eisa.c sc->sc_iot = iot;
sc 188 dev/eisa/if_ep_eisa.c sc->sc_ih = eisa_intr_establish(ec, ih, IST_EDGE, IPL_NET,
sc 189 dev/eisa/if_ep_eisa.c epintr, sc, sc->sc_dev.dv_xname);
sc 190 dev/eisa/if_ep_eisa.c if (sc->sc_ih == NULL) {
sc 203 dev/eisa/if_ep_eisa.c epconfig(sc, chipset, NULL);
sc 108 dev/eisa/if_fea.c pdq_eisa_devinit(sc)
sc 109 dev/eisa/if_fea.c pdq_softc_t *sc;
sc 114 dev/eisa/if_fea.c tag = sc->sc_bc;
sc 119 dev/eisa/if_fea.c PDQ_OS_IOWR_8(tag, sc->sc_iobase, PDQ_EISA_FUNCTION_CTRL, 0x23);
sc 120 dev/eisa/if_fea.c PDQ_OS_IOWR_8(tag, sc->sc_iobase, PDQ_EISA_IO_CMP_1_1,
sc 121 dev/eisa/if_fea.c (sc->sc_iobase >> 8) & 0xF0);
sc 122 dev/eisa/if_fea.c PDQ_OS_IOWR_8(tag, sc->sc_iobase, PDQ_EISA_IO_CMP_0_1,
sc 123 dev/eisa/if_fea.c (sc->sc_iobase >> 8) & 0xF0);
sc 124 dev/eisa/if_fea.c PDQ_OS_IOWR_8(tag, sc->sc_iobase, PDQ_EISA_SLOT_CTRL, 0x01);
sc 125 dev/eisa/if_fea.c data = PDQ_OS_IORD_8(tag, sc->sc_iobase, PDQ_EISA_BURST_HOLDOFF);
sc 127 dev/eisa/if_fea.c PDQ_OS_IOWR_8(tag, sc->sc_iobase, PDQ_EISA_BURST_HOLDOFF, data & ~1);
sc 129 dev/eisa/if_fea.c PDQ_OS_IOWR_8(tag, sc->sc_iobase, PDQ_EISA_BURST_HOLDOFF, data | 1);
sc 131 dev/eisa/if_fea.c data = PDQ_OS_IORD_8(tag, sc->sc_iobase, PDQ_EISA_IO_CONFIG_STAT_0);
sc 132 dev/eisa/if_fea.c PDQ_OS_IOWR_8(tag, sc->sc_iobase, PDQ_EISA_IO_CONFIG_STAT_0,
sc 155 dev/eisa/if_fea.c pdq_softc_t *sc = (pdq_softc_t *) self;
sc 161 dev/eisa/if_fea.c sc->sc_iotag = ea->ea_iot;
sc 162 dev/eisa/if_fea.c bcopy(sc->sc_dev.dv_xname, sc->sc_if.if_xname, IFNAMSIZ);
sc 163 dev/eisa/if_fea.c sc->sc_if.if_flags = 0;
sc 164 dev/eisa/if_fea.c sc->sc_if.if_softc = sc;
sc 172 dev/eisa/if_fea.c if (bus_space_map(sc->sc_iotag, EISA_SLOT_ADDR(ea->ea_slot),
sc 173 dev/eisa/if_fea.c EISA_SLOT_SIZE, 0, &sc->sc_iobase)) {
sc 174 dev/eisa/if_fea.c printf("\n%s: failed to map I/O!\n", sc->sc_dev.dv_xname);
sc 178 dev/eisa/if_fea.c pdq_eisa_subprobe(sc->sc_iotag, sc->sc_iobase, &maddr, &msize, &irq);
sc 181 dev/eisa/if_fea.c sc->sc_csrtag = sc->sc_iotag;
sc 182 dev/eisa/if_fea.c sc->sc_csrhandle = sc->sc_iobase;
sc 186 dev/eisa/if_fea.c " required\n", sc->sc_dev.dv_xname);
sc 190 dev/eisa/if_fea.c if (bus_space_map(sc->sc_csrtag, maddr, msize, 0, &sc->sc_csrhandle)) {
sc 191 dev/eisa/if_fea.c bus_space_unmap(sc->sc_iotag, sc->sc_iobase, EISA_SLOT_SIZE);
sc 193 dev/eisa/if_fea.c sc->sc_dev.dv_xname, maddr, maddr + msize - 1);
sc 197 dev/eisa/if_fea.c pdq_eisa_devinit(sc);
sc 198 dev/eisa/if_fea.c sc->sc_pdq = pdq_initialize(sc->sc_bc, sc->sc_membase,
sc 199 dev/eisa/if_fea.c sc->sc_if.if_xname, 0, (void *) sc, PDQ_DEFEA);
sc 200 dev/eisa/if_fea.c if (sc->sc_pdq == NULL) {
sc 201 dev/eisa/if_fea.c printf("%s: initialization failed\n", sc->sc_dev.dv_xname);
sc 207 dev/eisa/if_fea.c sc->sc_dev.dv_xname, irq);
sc 211 dev/eisa/if_fea.c sc->sc_ih = eisa_intr_establish(ea->ea_ec, ih, IST_LEVEL, IPL_NET,
sc 212 dev/eisa/if_fea.c (int (*)(void *)) pdq_interrupt, sc->sc_pdq, sc->sc_dev.dv_xname);
sc 213 dev/eisa/if_fea.c if (sc->sc_ih == NULL) {
sc 214 dev/eisa/if_fea.c printf("%s: couldn't establish interrupt", sc->sc_dev.dv_xname);
sc 223 dev/eisa/if_fea.c bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes,
sc 224 dev/eisa/if_fea.c sc->sc_arpcom.ac_enaddr, 6);
sc 226 dev/eisa/if_fea.c pdq_ifattach(sc, NULL);
sc 228 dev/eisa/if_fea.c sc->sc_ats = shutdownhook_establish((void (*)(void *)) pdq_hwreset,
sc 229 dev/eisa/if_fea.c sc->sc_pdq);
sc 230 dev/eisa/if_fea.c if (sc->sc_ats == NULL)
sc 234 dev/eisa/if_fea.c printf("%s: using iomem 0x%x-0x%x\n", sc->sc_dev.dv_xname, maddr,
sc 114 dev/eisa/uha_eisa.c struct uha_softc *sc = (void *)self;
sc 131 dev/eisa/uha_eisa.c sc->sc_iot = iot;
sc 132 dev/eisa/uha_eisa.c sc->sc_ioh = ioh;
sc 133 dev/eisa/uha_eisa.c if (!u24_find(iot, ioh, sc))
sc 136 dev/eisa/uha_eisa.c if (eisa_intr_map(ec, sc->sc_irq, &ih)) {
sc 138 dev/eisa/uha_eisa.c sc->sc_dev.dv_xname, sc->sc_irq);
sc 142 dev/eisa/uha_eisa.c sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO,
sc 143 dev/eisa/uha_eisa.c u24_intr, sc, sc->sc_dev.dv_xname);
sc 144 dev/eisa/uha_eisa.c if (sc->sc_ih == NULL) {
sc 146 dev/eisa/uha_eisa.c sc->sc_dev.dv_xname);
sc 152 dev/eisa/uha_eisa.c printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
sc 155 dev/eisa/uha_eisa.c sc->start_mbox = u24_start_mbox;
sc 156 dev/eisa/uha_eisa.c sc->poll = u24_poll;
sc 157 dev/eisa/uha_eisa.c sc->init = u24_init;
sc 159 dev/eisa/uha_eisa.c uha_attach(sc);
sc 163 dev/eisa/uha_eisa.c u24_find(iot, ioh, sc)
sc 166 dev/eisa/uha_eisa.c struct uha_softc *sc;
sc 213 dev/eisa/uha_eisa.c if (sc != NULL) {
sc 214 dev/eisa/uha_eisa.c sc->sc_irq = irq;
sc 215 dev/eisa/uha_eisa.c sc->sc_drq = drq;
sc 216 dev/eisa/uha_eisa.c sc->sc_scsi_dev = config2 & U24_HOSTID_MASK;
sc 223 dev/eisa/uha_eisa.c u24_start_mbox(sc, mscp)
sc 224 dev/eisa/uha_eisa.c struct uha_softc *sc;
sc 227 dev/eisa/uha_eisa.c bus_space_tag_t iot = sc->sc_iot;
sc 228 dev/eisa/uha_eisa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 238 dev/eisa/uha_eisa.c sc->sc_dev.dv_xname);
sc 254 dev/eisa/uha_eisa.c u24_poll(sc, xs, count)
sc 255 dev/eisa/uha_eisa.c struct uha_softc *sc;
sc 259 dev/eisa/uha_eisa.c bus_space_tag_t iot = sc->sc_iot;
sc 260 dev/eisa/uha_eisa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 268 dev/eisa/uha_eisa.c u24_intr(sc);
sc 281 dev/eisa/uha_eisa.c struct uha_softc *sc = arg;
sc 282 dev/eisa/uha_eisa.c bus_space_tag_t iot = sc->sc_iot;
sc 283 dev/eisa/uha_eisa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 289 dev/eisa/uha_eisa.c printf("%s: uhaintr ", sc->sc_dev.dv_xname);
sc 312 dev/eisa/uha_eisa.c mscp = uha_mscp_phys_kv(sc, mboxval);
sc 315 dev/eisa/uha_eisa.c sc->sc_dev.dv_xname);
sc 319 dev/eisa/uha_eisa.c uha_done(sc, mscp);
sc 327 dev/eisa/uha_eisa.c u24_init(sc)
sc 328 dev/eisa/uha_eisa.c struct uha_softc *sc;
sc 330 dev/eisa/uha_eisa.c bus_space_tag_t iot = sc->sc_iot;
sc 331 dev/eisa/uha_eisa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 57 dev/flash.c #define flashlock(sc) disk_lock(&(sc)->sc_dk)
sc 58 dev/flash.c #define flashunlock(sc) disk_unlock(&(sc)->sc_dk)
sc 101 dev/flash.c flashattach(struct flash_softc *sc, struct flash_ctl_tag *tag,
sc 108 dev/flash.c sc->sc_tag = tag;
sc 109 dev/flash.c sc->sc_cookie = cookie;
sc 111 dev/flash.c if (sc->sc_maxwaitready <= 0)
sc 112 dev/flash.c sc->sc_maxwaitready = 1000; /* 1ms */
sc 113 dev/flash.c if (sc->sc_maxwaitcomplete <= 0)
sc 114 dev/flash.c sc->sc_maxwaitcomplete = 200000; /* 200ms */
sc 116 dev/flash.c flash_chip_enable(sc);
sc 119 dev/flash.c if (flash_chip_identify(sc, &vendor, &device) != 0) {
sc 121 dev/flash.c flash_chip_disable(sc);
sc 144 dev/flash.c flash_chip_disable(sc);
sc 147 dev/flash.c sc->sc_flashdev = &flashdevs[i];
sc 150 dev/flash.c if (flash_chip_reset(sc) != 0) {
sc 151 dev/flash.c printf("%s: reset failed\n", sc->sc_dev.dv_xname);
sc 152 dev/flash.c flash_chip_disable(sc);
sc 156 dev/flash.c flash_chip_disable(sc);
sc 161 dev/flash.c sc->sc_dk.dk_driver = &flashdkdriver;
sc 162 dev/flash.c sc->sc_dk.dk_name = sc->sc_dev.dv_xname;
sc 163 dev/flash.c disk_attach(&sc->sc_dk);
sc 171 dev/flash.c struct flash_softc *sc = (struct flash_softc *)self;
sc 174 dev/flash.c disk_detach(&sc->sc_dk);
sc 192 dev/flash.c flash_reg8_read(struct flash_softc *sc, int reg)
sc 194 dev/flash.c return sc->sc_tag->reg8_read(sc->sc_cookie, reg);
sc 198 dev/flash.c flash_reg8_read_page(struct flash_softc *sc, caddr_t data, caddr_t oob)
sc 202 dev/flash.c for (i = 0; i < sc->sc_flashdev->pagesize; i++)
sc 203 dev/flash.c data[i] = flash_reg8_read(sc, FLASH_REG_DATA);
sc 206 dev/flash.c for (i = 0; i < sc->sc_flashdev->oobsize; i++)
sc 207 dev/flash.c oob[i] = flash_reg8_read(sc, FLASH_REG_DATA);
sc 211 dev/flash.c flash_reg8_write(struct flash_softc *sc, int reg, u_int8_t value)
sc 213 dev/flash.c sc->sc_tag->reg8_write(sc->sc_cookie, reg, value);
sc 217 dev/flash.c flash_reg8_write_page(struct flash_softc *sc, caddr_t data, caddr_t oob)
sc 221 dev/flash.c for (i = 0; i < sc->sc_flashdev->pagesize; i++)
sc 222 dev/flash.c flash_reg8_write(sc, FLASH_REG_DATA, data[i]);
sc 225 dev/flash.c for (i = 0; i < sc->sc_flashdev->oobsize; i++)
sc 226 dev/flash.c flash_reg8_write(sc, FLASH_REG_DATA, oob[i]);
sc 234 dev/flash.c flash_wait_ready(struct flash_softc *sc)
sc 236 dev/flash.c int timo = sc->sc_maxwaitready;
sc 239 dev/flash.c ready = flash_reg8_read(sc, FLASH_REG_READY);
sc 242 dev/flash.c ready = flash_reg8_read(sc, FLASH_REG_READY);
sc 252 dev/flash.c flash_wait_complete(struct flash_softc *sc)
sc 254 dev/flash.c int timo = sc->sc_maxwaitcomplete;
sc 257 dev/flash.c (void)flash_wait_ready(sc);
sc 259 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 1);
sc 260 dev/flash.c flash_reg8_write(sc, FLASH_REG_CMD, SAMSUNG_CMD_STATUS);
sc 261 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 0);
sc 263 dev/flash.c status = flash_reg8_read(sc, FLASH_REG_DATA);
sc 265 dev/flash.c if (flash_reg8_read(sc, FLASH_REG_READY))
sc 268 dev/flash.c status = flash_reg8_read(sc, FLASH_REG_DATA);
sc 271 dev/flash.c status = flash_reg8_read(sc, FLASH_REG_DATA);
sc 276 dev/flash.c flash_chip_enable(struct flash_softc *sc)
sc 279 dev/flash.c flash_reg8_write(sc, FLASH_REG_CE, 1);
sc 283 dev/flash.c flash_chip_disable(struct flash_softc *sc)
sc 285 dev/flash.c flash_reg8_write(sc, FLASH_REG_CE, 0);
sc 290 dev/flash.c flash_chip_reset(struct flash_softc *sc)
sc 292 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 1);
sc 293 dev/flash.c flash_reg8_write(sc, FLASH_REG_CMD, SAMSUNG_CMD_RESET);
sc 294 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 0);
sc 296 dev/flash.c return flash_wait_ready(sc);
sc 300 dev/flash.c flash_chip_identify(struct flash_softc *sc, u_int8_t *vendor,
sc 305 dev/flash.c (void)flash_wait_ready(sc);
sc 307 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 1);
sc 308 dev/flash.c flash_reg8_write(sc, FLASH_REG_CMD, SAMSUNG_CMD_READID);
sc 309 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 0);
sc 311 dev/flash.c error = flash_wait_ready(sc);
sc 313 dev/flash.c *vendor = flash_reg8_read(sc, FLASH_REG_DATA);
sc 314 dev/flash.c *device = flash_reg8_read(sc, FLASH_REG_DATA);
sc 320 dev/flash.c flash_chip_erase_block(struct flash_softc *sc, long blkno)
sc 322 dev/flash.c long pageno = blkno * sc->sc_flashdev->blkpages;
sc 325 dev/flash.c (void)flash_wait_ready(sc);
sc 328 dev/flash.c flash_reg8_write(sc, FLASH_REG_WP, 0);
sc 330 dev/flash.c switch (sc->sc_flashdev->id) {
sc 333 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 1);
sc 334 dev/flash.c flash_reg8_write(sc, FLASH_REG_CMD, SAMSUNG_CMD_ERASE0);
sc 335 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 0);
sc 339 dev/flash.c switch (sc->sc_flashdev->id) {
sc 342 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 1);
sc 343 dev/flash.c flash_reg8_write(sc, FLASH_REG_ROW, pageno);
sc 344 dev/flash.c flash_reg8_write(sc, FLASH_REG_ROW, pageno >> 8);
sc 345 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 0);
sc 349 dev/flash.c switch (sc->sc_flashdev->id) {
sc 352 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 1);
sc 353 dev/flash.c flash_reg8_write(sc, FLASH_REG_CMD, SAMSUNG_CMD_ERASE1);
sc 354 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 0);
sc 358 dev/flash.c error = flash_wait_complete(sc);
sc 361 dev/flash.c flash_reg8_write(sc, FLASH_REG_WP, 1);
sc 367 dev/flash.c flash_chip_read_block(struct flash_softc *sc, long blkno, caddr_t data)
sc 373 dev/flash.c pageno = blkno * sc->sc_flashdev->blkpages;
sc 374 dev/flash.c blkend = pageno + sc->sc_flashdev->blkpages;
sc 377 dev/flash.c error = flash_chip_read_page(sc, pageno, data, NULL);
sc 380 dev/flash.c data += sc->sc_flashdev->pagesize;
sc 387 dev/flash.c flash_chip_read_page(struct flash_softc *sc, long pageno, caddr_t data,
sc 392 dev/flash.c (void)flash_wait_ready(sc);
sc 394 dev/flash.c switch (sc->sc_flashdev->id) {
sc 397 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 1);
sc 398 dev/flash.c flash_reg8_write(sc, FLASH_REG_CMD, SAMSUNG_CMD_PTRLO);
sc 399 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 0);
sc 403 dev/flash.c switch (sc->sc_flashdev->id) {
sc 405 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 1);
sc 406 dev/flash.c flash_reg8_write(sc, FLASH_REG_COL, 0x00);
sc 407 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 0);
sc 410 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 1);
sc 411 dev/flash.c flash_reg8_write(sc, FLASH_REG_COL, 0x00);
sc 412 dev/flash.c flash_reg8_write(sc, FLASH_REG_COL, 0x00);
sc 413 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 0);
sc 417 dev/flash.c switch (sc->sc_flashdev->id) {
sc 420 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 1);
sc 421 dev/flash.c flash_reg8_write(sc, FLASH_REG_ROW, pageno);
sc 422 dev/flash.c flash_reg8_write(sc, FLASH_REG_ROW, pageno >> 8);
sc 423 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 0);
sc 427 dev/flash.c switch (sc->sc_flashdev->id) {
sc 429 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 1);
sc 430 dev/flash.c flash_reg8_write(sc, FLASH_REG_CMD, SAMSUNG_CMD_READ);
sc 431 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 0);
sc 435 dev/flash.c if ((error = flash_wait_ready(sc)) != 0)
sc 439 dev/flash.c if (sc->sc_tag->regx_read_page) {
sc 440 dev/flash.c error = sc->sc_tag->regx_read_page(sc->sc_cookie, data,
sc 445 dev/flash.c flash_reg8_read_page(sc, data, oob);
sc 451 dev/flash.c flash_chip_read_oob(struct flash_softc *sc, long pageno, caddr_t oob)
sc 457 dev/flash.c (void)flash_wait_ready(sc);
sc 459 dev/flash.c switch (sc->sc_flashdev->id) {
sc 461 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 1);
sc 462 dev/flash.c flash_reg8_write(sc, FLASH_REG_CMD, SAMSUNG_CMD_PTROOB);
sc 463 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 0);
sc 466 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 1);
sc 467 dev/flash.c flash_reg8_write(sc, FLASH_REG_CMD, SAMSUNG_CMD_PTRLO);
sc 468 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 0);
sc 472 dev/flash.c switch (sc->sc_flashdev->id) {
sc 474 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 1);
sc 475 dev/flash.c flash_reg8_write(sc, FLASH_REG_COL, 0x00);
sc 476 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 0);
sc 479 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 1);
sc 480 dev/flash.c flash_reg8_write(sc, FLASH_REG_COL, 0x00);
sc 481 dev/flash.c flash_reg8_write(sc, FLASH_REG_COL, 0x08);
sc 482 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 0);
sc 486 dev/flash.c switch (sc->sc_flashdev->id) {
sc 489 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 1);
sc 490 dev/flash.c flash_reg8_write(sc, FLASH_REG_ROW, pageno);
sc 491 dev/flash.c flash_reg8_write(sc, FLASH_REG_ROW, pageno >> 8);
sc 492 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 0);
sc 496 dev/flash.c switch (sc->sc_flashdev->id) {
sc 498 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 1);
sc 499 dev/flash.c flash_reg8_write(sc, FLASH_REG_CMD, SAMSUNG_CMD_READ);
sc 500 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 0);
sc 504 dev/flash.c if ((error = flash_wait_ready(sc)) != 0)
sc 507 dev/flash.c for (i = 0; i < sc->sc_flashdev->oobsize; i++)
sc 508 dev/flash.c p[i] = flash_reg8_read(sc, FLASH_REG_DATA);
sc 514 dev/flash.c flash_chip_write_block(struct flash_softc *sc, long blkno, caddr_t data,
sc 522 dev/flash.c pageno = blkno * sc->sc_flashdev->blkpages;
sc 523 dev/flash.c blkend = pageno + sc->sc_flashdev->blkpages;
sc 527 dev/flash.c error = flash_chip_write_page(sc, pageno, p, oob);
sc 530 dev/flash.c p += sc->sc_flashdev->pagesize;
sc 535 dev/flash.c return flash_chip_verify_block(sc, blkno, data, oob);
sc 539 dev/flash.c flash_chip_write_page(struct flash_softc *sc, long pageno, caddr_t data,
sc 544 dev/flash.c (void)flash_wait_ready(sc);
sc 547 dev/flash.c flash_reg8_write(sc, FLASH_REG_WP, 0);
sc 549 dev/flash.c switch (sc->sc_flashdev->id) {
sc 552 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 1);
sc 553 dev/flash.c flash_reg8_write(sc, FLASH_REG_CMD, SAMSUNG_CMD_PTRLO);
sc 554 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 0);
sc 558 dev/flash.c switch (sc->sc_flashdev->id) {
sc 561 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 1);
sc 562 dev/flash.c flash_reg8_write(sc, FLASH_REG_CMD, SAMSUNG_CMD_SEQIN);
sc 563 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 0);
sc 567 dev/flash.c switch (sc->sc_flashdev->id) {
sc 569 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 1);
sc 570 dev/flash.c flash_reg8_write(sc, FLASH_REG_COL, 0x00);
sc 571 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 0);
sc 574 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 1);
sc 575 dev/flash.c flash_reg8_write(sc, FLASH_REG_COL, 0x00);
sc 576 dev/flash.c flash_reg8_write(sc, FLASH_REG_COL, 0x00);
sc 577 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 0);
sc 581 dev/flash.c switch (sc->sc_flashdev->id) {
sc 584 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 1);
sc 585 dev/flash.c flash_reg8_write(sc, FLASH_REG_ROW, pageno);
sc 586 dev/flash.c flash_reg8_write(sc, FLASH_REG_ROW, pageno >> 8);
sc 587 dev/flash.c flash_reg8_write(sc, FLASH_REG_ALE, 0);
sc 592 dev/flash.c if (sc->sc_tag->regx_write_page) {
sc 593 dev/flash.c error = sc->sc_tag->regx_write_page(sc->sc_cookie, data,
sc 598 dev/flash.c flash_reg8_write_page(sc, data, oob);
sc 600 dev/flash.c switch (sc->sc_flashdev->id) {
sc 603 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 1);
sc 604 dev/flash.c flash_reg8_write(sc, FLASH_REG_CMD, SAMSUNG_CMD_WRITE);
sc 605 dev/flash.c flash_reg8_write(sc, FLASH_REG_CLE, 0);
sc 613 dev/flash.c error = flash_wait_complete(sc);
sc 616 dev/flash.c flash_reg8_write(sc, FLASH_REG_WP, 1);
sc 622 dev/flash.c flash_chip_verify_block(struct flash_softc *sc, long blkno, caddr_t data,
sc 629 dev/flash.c pageno = blkno * sc->sc_flashdev->blkpages;
sc 630 dev/flash.c blkend = pageno + sc->sc_flashdev->blkpages;
sc 633 dev/flash.c error = flash_chip_verify_page(sc, pageno, data, oob);
sc 639 dev/flash.c data += sc->sc_flashdev->pagesize;
sc 646 dev/flash.c flash_chip_verify_page(struct flash_softc *sc, long pageno, caddr_t data,
sc 653 dev/flash.c error = flash_chip_read_page(sc, pageno, rbuf,
sc 659 dev/flash.c sc->sc_flashdev->pagesize) != 0)
sc 663 dev/flash.c (const void *)oob, sc->sc_flashdev->oobsize) != 0)
sc 676 dev/flash.c struct flash_softc *sc;
sc 680 dev/flash.c sc = flashlookup(flashunit(dev));
sc 681 dev/flash.c if (sc == NULL)
sc 684 dev/flash.c if ((error = flashlock(sc)) != 0) {
sc 685 dev/flash.c device_unref(&sc->sc_dev);
sc 694 dev/flash.c if (sc->sc_dk.dk_openmask == 0) {
sc 695 dev/flash.c if ((sc->sc_flags & FDK_LOADED) == 0 ||
sc 696 dev/flash.c ((sc->sc_flags & FDK_SAFE) == 0) !=
sc 698 dev/flash.c sc->sc_flags &= ~FDK_SAFE;
sc 699 dev/flash.c sc->sc_flags |= FDK_LOADED;
sc 701 dev/flash.c sc->sc_flags |= FDK_SAFE;
sc 702 dev/flash.c flashgetdisklabel(dev, sc, sc->sc_dk.dk_label, 0);
sc 704 dev/flash.c } else if (((sc->sc_flags & FDK_SAFE) == 0) !=
sc 706 dev/flash.c flashunlock(sc);
sc 707 dev/flash.c device_unref(&sc->sc_dev);
sc 714 dev/flash.c (part >= sc->sc_dk.dk_label->d_npartitions ||
sc 715 dev/flash.c sc->sc_dk.dk_label->d_partitions[part].p_fstype == FS_UNUSED)) {
sc 716 dev/flash.c flashunlock(sc);
sc 717 dev/flash.c device_unref(&sc->sc_dev);
sc 724 dev/flash.c sc->sc_dk.dk_copenmask |= (1 << part);
sc 727 dev/flash.c sc->sc_dk.dk_bopenmask |= (1 << part);
sc 730 dev/flash.c sc->sc_dk.dk_openmask =
sc 731 dev/flash.c sc->sc_dk.dk_copenmask | sc->sc_dk.dk_bopenmask;
sc 733 dev/flash.c flashunlock(sc);
sc 734 dev/flash.c device_unref(&sc->sc_dev);
sc 741 dev/flash.c struct flash_softc *sc;
sc 745 dev/flash.c sc = flashlookup(flashunit(dev));
sc 746 dev/flash.c if (sc == NULL)
sc 749 dev/flash.c if ((error = flashlock(sc)) != 0) {
sc 750 dev/flash.c device_unref(&sc->sc_dev);
sc 758 dev/flash.c sc->sc_dk.dk_copenmask &= ~(1 << part);
sc 761 dev/flash.c sc->sc_dk.dk_bopenmask &= ~(1 << part);
sc 764 dev/flash.c sc->sc_dk.dk_openmask =
sc 765 dev/flash.c sc->sc_dk.dk_copenmask | sc->sc_dk.dk_bopenmask;
sc 767 dev/flash.c if (sc->sc_dk.dk_openmask == 0) {
sc 771 dev/flash.c flashunlock(sc);
sc 772 dev/flash.c device_unref(&sc->sc_dev);
sc 782 dev/flash.c struct flash_softc *sc;
sc 785 dev/flash.c sc = flashlookup(flashunit(bp->b_dev));
sc 786 dev/flash.c if (sc == NULL) {
sc 792 dev/flash.c if ((bp->b_bcount % sc->sc_flashdev->pagesize) != 0) {
sc 798 dev/flash.c if ((sc->sc_flags & FDK_LOADED) == 0) {
sc 804 dev/flash.c if (flashsafe(bp->b_dev) && flashsafestrategy(sc, bp) <= 0)
sc 813 dev/flash.c bounds_check_with_label(bp, sc->sc_dk.dk_label, 0) <= 0)
sc 818 dev/flash.c disksort(&sc->sc_q, bp);
sc 819 dev/flash.c flashstart(sc);
sc 821 dev/flash.c device_unref(&sc->sc_dev);
sc 832 dev/flash.c if (sc != NULL)
sc 833 dev/flash.c device_unref(&sc->sc_dev);
sc 839 dev/flash.c struct flash_softc *sc;
sc 842 dev/flash.c sc = flashlookup(flashunit(dev));
sc 843 dev/flash.c if (sc == NULL)
sc 846 dev/flash.c if ((sc->sc_flags & FDK_LOADED) == 0) {
sc 847 dev/flash.c device_unref(&sc->sc_dev);
sc 853 dev/flash.c *(struct disklabel *)data = *sc->sc_dk.dk_label;
sc 860 dev/flash.c device_unref(&sc->sc_dev);
sc 879 dev/flash.c flashstart(struct flash_softc *sc)
sc 885 dev/flash.c dp = &sc->sc_q;
sc 892 dev/flash.c _flashstart(sc, bp);
sc 897 dev/flash.c _flashstart(struct flash_softc *sc, struct buf *bp)
sc 904 dev/flash.c offset = DL_GETPOFFSET(&sc->sc_dk.dk_label->d_partitions[part]) +
sc 906 dev/flash.c pgno = offset / (sc->sc_flashdev->pagesize / DEV_BSIZE);
sc 912 dev/flash.c if (!flashsafe(bp->b_dev) && pgno == sc->sc_flashdev->capacity) {
sc 916 dev/flash.c } else if (pgno >= sc->sc_flashdev->capacity) {
sc 923 dev/flash.c sc->sc_bp = bp;
sc 926 dev/flash.c disk_busy(&sc->sc_dk);
sc 929 dev/flash.c flash_chip_enable(sc);
sc 931 dev/flash.c bp->b_error = flash_chip_read_page(sc, pgno, bp->b_data,
sc 934 dev/flash.c bp->b_error = flash_chip_write_page(sc, pgno, bp->b_data,
sc 937 dev/flash.c bp->b_resid = bp->b_bcount - sc->sc_flashdev->pagesize;
sc 938 dev/flash.c flash_chip_disable(sc);
sc 939 dev/flash.c flashdone(sc);
sc 945 dev/flash.c struct flash_softc *sc = v;
sc 946 dev/flash.c struct buf *bp = sc->sc_bp;
sc 949 dev/flash.c disk_unbusy(&sc->sc_dk, bp->b_bcount - bp->b_resid,
sc 956 dev/flash.c flashstart(sc);
sc 960 dev/flash.c flashgetdefaultlabel(dev_t dev, struct flash_softc *sc,
sc 972 dev/flash.c strncpy(lp->d_packname, sc->sc_flashdev->longname,
sc 983 dev/flash.c lp->d_secsize = sc->sc_flashdev->pagesize;
sc 984 dev/flash.c lp->d_nsectors = sc->sc_flashdev->capacity / lp->d_ntracks
sc 1005 dev/flash.c flashgetdisklabel(dev_t dev, struct flash_softc *sc,
sc 1011 dev/flash.c flashgetdefaultlabel(dev, sc, lp);
sc 1013 dev/flash.c if (sc->sc_tag->default_disklabel != NULL)
sc 1014 dev/flash.c sc->sc_tag->default_disklabel(sc->sc_cookie, dev, lp);
sc 1031 dev/flash.c struct flash_softc *sc;
sc 1033 dev/flash.c sc = flashlookup(flashunit(bp->b_dev));
sc 1035 dev/flash.c if (bp->b_bcount > sc->sc_flashdev->pagesize)
sc 1036 dev/flash.c bp->b_bcount = sc->sc_flashdev->pagesize;
sc 1061 dev/flash.c flashsafestrategy(struct flash_softc *sc, struct buf *bp)
sc 1063 dev/flash.c if (sc->sc_tag->safe_strategy) {
sc 1064 dev/flash.c return sc->sc_tag->safe_strategy(sc->sc_cookie, bp);
sc 76 dev/gpio/gpio.c struct gpio_softc *sc = (struct gpio_softc *)self;
sc 79 dev/gpio/gpio.c sc->sc_gc = gba->gba_gc;
sc 80 dev/gpio/gpio.c sc->sc_pins = gba->gba_pins;
sc 81 dev/gpio/gpio.c sc->sc_npins = gba->gba_npins;
sc 83 dev/gpio/gpio.c printf(": %d pins\n", sc->sc_npins);
sc 89 dev/gpio/gpio.c config_search(gpio_search, self, sc);
sc 153 dev/gpio/gpio.c struct gpio_softc *sc = gpio;
sc 157 dev/gpio/gpio.c if (npins > sc->sc_npins)
sc 163 dev/gpio/gpio.c if (pin < 0 || pin >= sc->sc_npins)
sc 165 dev/gpio/gpio.c if (sc->sc_pins[pin].pin_mapped)
sc 167 dev/gpio/gpio.c sc->sc_pins[pin].pin_mapped = 1;
sc 178 dev/gpio/gpio.c struct gpio_softc *sc = gpio;
sc 183 dev/gpio/gpio.c sc->sc_pins[pin].pin_mapped = 0;
sc 190 dev/gpio/gpio.c struct gpio_softc *sc = gpio;
sc 192 dev/gpio/gpio.c return (gpiobus_pin_read(sc->sc_gc, map->pm_map[pin]));
sc 198 dev/gpio/gpio.c struct gpio_softc *sc = gpio;
sc 200 dev/gpio/gpio.c return (gpiobus_pin_write(sc->sc_gc, map->pm_map[pin], value));
sc 206 dev/gpio/gpio.c struct gpio_softc *sc = gpio;
sc 208 dev/gpio/gpio.c return (gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags));
sc 214 dev/gpio/gpio.c struct gpio_softc *sc = gpio;
sc 216 dev/gpio/gpio.c return (sc->sc_pins[map->pm_map[pin]].pin_caps);
sc 234 dev/gpio/gpio.c struct gpio_softc *sc;
sc 236 dev/gpio/gpio.c sc = (struct gpio_softc *)device_lookup(&gpio_cd, minor(dev));
sc 237 dev/gpio/gpio.c if (sc == NULL)
sc 240 dev/gpio/gpio.c if (sc->sc_opened)
sc 242 dev/gpio/gpio.c sc->sc_opened = 1;
sc 250 dev/gpio/gpio.c struct gpio_softc *sc;
sc 252 dev/gpio/gpio.c sc = (struct gpio_softc *)device_lookup(&gpio_cd, minor(dev));
sc 253 dev/gpio/gpio.c sc->sc_opened = 0;
sc 261 dev/gpio/gpio.c struct gpio_softc *sc;
sc 268 dev/gpio/gpio.c sc = (struct gpio_softc *)device_lookup(&gpio_cd, minor(dev));
sc 269 dev/gpio/gpio.c gc = sc->sc_gc;
sc 275 dev/gpio/gpio.c info->gpio_npins = sc->sc_npins;
sc 281 dev/gpio/gpio.c if (pin < 0 || pin >= sc->sc_npins)
sc 294 dev/gpio/gpio.c if (pin < 0 || pin >= sc->sc_npins)
sc 296 dev/gpio/gpio.c if (sc->sc_pins[pin].pin_mapped)
sc 305 dev/gpio/gpio.c op->gp_value = sc->sc_pins[pin].pin_state;
sc 307 dev/gpio/gpio.c sc->sc_pins[pin].pin_state = value;
sc 316 dev/gpio/gpio.c if (pin < 0 || pin >= sc->sc_npins)
sc 318 dev/gpio/gpio.c if (sc->sc_pins[pin].pin_mapped)
sc 321 dev/gpio/gpio.c value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ?
sc 325 dev/gpio/gpio.c op->gp_value = sc->sc_pins[pin].pin_state;
sc 327 dev/gpio/gpio.c sc->sc_pins[pin].pin_state = value;
sc 336 dev/gpio/gpio.c if (pin < 0 || pin >= sc->sc_npins)
sc 338 dev/gpio/gpio.c if (sc->sc_pins[pin].pin_mapped)
sc 343 dev/gpio/gpio.c if ((flags & sc->sc_pins[pin].pin_caps) != flags)
sc 346 dev/gpio/gpio.c ctl->gp_caps = sc->sc_pins[pin].pin_caps;
sc 348 dev/gpio/gpio.c ctl->gp_flags = sc->sc_pins[pin].pin_flags;
sc 352 dev/gpio/gpio.c sc->sc_pins[pin].pin_flags = flags;
sc 100 dev/gpio/gpioiic.c struct gpioiic_softc *sc = (struct gpioiic_softc *)self;
sc 112 dev/gpio/gpioiic.c sc->sc_gpio = ga->ga_gpio;
sc 113 dev/gpio/gpioiic.c sc->sc_map.pm_map = sc->__map;
sc 114 dev/gpio/gpioiic.c if (gpio_pin_map(sc->sc_gpio, ga->ga_offset, ga->ga_mask,
sc 115 dev/gpio/gpioiic.c &sc->sc_map)) {
sc 121 dev/gpio/gpioiic.c caps = gpio_pin_caps(sc->sc_gpio, &sc->sc_map, GPIOIIC_PIN_SDA);
sc 130 dev/gpio/gpioiic.c printf(": SDA[%d]", sc->sc_map.pm_map[GPIOIIC_PIN_SDA]);
sc 131 dev/gpio/gpioiic.c sc->sc_sda = GPIO_PIN_OUTPUT;
sc 134 dev/gpio/gpioiic.c sc->sc_sda |= GPIO_PIN_OPENDRAIN;
sc 137 dev/gpio/gpioiic.c sc->sc_sda |= GPIO_PIN_PUSHPULL;
sc 141 dev/gpio/gpioiic.c sc->sc_sda |= GPIO_PIN_PULLUP;
sc 143 dev/gpio/gpioiic.c gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOIIC_PIN_SDA, sc->sc_sda);
sc 146 dev/gpio/gpioiic.c caps = gpio_pin_caps(sc->sc_gpio, &sc->sc_map, GPIOIIC_PIN_SCL);
sc 151 dev/gpio/gpioiic.c printf(", SCL[%d]", sc->sc_map.pm_map[GPIOIIC_PIN_SCL]);
sc 152 dev/gpio/gpioiic.c sc->sc_scl = GPIO_PIN_OUTPUT;
sc 155 dev/gpio/gpioiic.c sc->sc_scl |= GPIO_PIN_OPENDRAIN;
sc 158 dev/gpio/gpioiic.c sc->sc_scl |= GPIO_PIN_PULLUP;
sc 162 dev/gpio/gpioiic.c sc->sc_scl |= GPIO_PIN_PUSHPULL;
sc 164 dev/gpio/gpioiic.c gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOIIC_PIN_SCL, sc->sc_scl);
sc 169 dev/gpio/gpioiic.c rw_init(&sc->sc_i2c_lock, "iiclk");
sc 170 dev/gpio/gpioiic.c sc->sc_i2c_tag.ic_cookie = sc;
sc 171 dev/gpio/gpioiic.c sc->sc_i2c_tag.ic_acquire_bus = gpioiic_i2c_acquire_bus;
sc 172 dev/gpio/gpioiic.c sc->sc_i2c_tag.ic_release_bus = gpioiic_i2c_release_bus;
sc 173 dev/gpio/gpioiic.c sc->sc_i2c_tag.ic_send_start = gpioiic_i2c_send_start;
sc 174 dev/gpio/gpioiic.c sc->sc_i2c_tag.ic_send_stop = gpioiic_i2c_send_stop;
sc 175 dev/gpio/gpioiic.c sc->sc_i2c_tag.ic_initiate_xfer = gpioiic_i2c_initiate_xfer;
sc 176 dev/gpio/gpioiic.c sc->sc_i2c_tag.ic_read_byte = gpioiic_i2c_read_byte;
sc 177 dev/gpio/gpioiic.c sc->sc_i2c_tag.ic_write_byte = gpioiic_i2c_write_byte;
sc 181 dev/gpio/gpioiic.c iba.iba_tag = &sc->sc_i2c_tag;
sc 187 dev/gpio/gpioiic.c gpio_pin_unmap(sc->sc_gpio, &sc->sc_map);
sc 199 dev/gpio/gpioiic.c struct gpioiic_softc *sc = cookie;
sc 204 dev/gpio/gpioiic.c return (rw_enter(&sc->sc_i2c_lock, RW_WRITE | RW_INTR));
sc 210 dev/gpio/gpioiic.c struct gpioiic_softc *sc = cookie;
sc 215 dev/gpio/gpioiic.c rw_exit(&sc->sc_i2c_lock);
sc 251 dev/gpio/gpioiic.c struct gpioiic_softc *sc = cookie;
sc 253 dev/gpio/gpioiic.c gpio_pin_write(sc->sc_gpio, &sc->sc_map, GPIOIIC_PIN_SDA,
sc 255 dev/gpio/gpioiic.c gpio_pin_write(sc->sc_gpio, &sc->sc_map, GPIOIIC_PIN_SCL,
sc 262 dev/gpio/gpioiic.c struct gpioiic_softc *sc = cookie;
sc 263 dev/gpio/gpioiic.c int sda = sc->sc_sda;
sc 269 dev/gpio/gpioiic.c if (sc->sc_sda != sda) {
sc 270 dev/gpio/gpioiic.c sc->sc_sda = sda;
sc 271 dev/gpio/gpioiic.c gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOIIC_PIN_SDA,
sc 272 dev/gpio/gpioiic.c sc->sc_sda);
sc 279 dev/gpio/gpioiic.c struct gpioiic_softc *sc = cookie;
sc 281 dev/gpio/gpioiic.c return (gpio_pin_read(sc->sc_gpio, &sc->sc_map,
sc 92 dev/gpio/gpioow.c struct gpioow_softc *sc = (struct gpioow_softc *)self;
sc 104 dev/gpio/gpioow.c sc->sc_gpio = ga->ga_gpio;
sc 105 dev/gpio/gpioow.c sc->sc_map.pm_map = sc->__map;
sc 106 dev/gpio/gpioow.c if (gpio_pin_map(sc->sc_gpio, ga->ga_offset, ga->ga_mask,
sc 107 dev/gpio/gpioow.c &sc->sc_map)) {
sc 113 dev/gpio/gpioow.c caps = gpio_pin_caps(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA);
sc 122 dev/gpio/gpioow.c printf(": DATA[%d]", sc->sc_map.pm_map[GPIOOW_PIN_DATA]);
sc 123 dev/gpio/gpioow.c sc->sc_data = GPIO_PIN_OUTPUT;
sc 126 dev/gpio/gpioow.c sc->sc_data |= GPIO_PIN_OPENDRAIN;
sc 129 dev/gpio/gpioow.c sc->sc_data |= GPIO_PIN_PUSHPULL;
sc 133 dev/gpio/gpioow.c sc->sc_data |= GPIO_PIN_PULLUP;
sc 135 dev/gpio/gpioow.c gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA, sc->sc_data);
sc 140 dev/gpio/gpioow.c sc->sc_ow_bus.bus_cookie = sc;
sc 141 dev/gpio/gpioow.c sc->sc_ow_bus.bus_reset = gpioow_ow_reset;
sc 142 dev/gpio/gpioow.c sc->sc_ow_bus.bus_bit = gpioow_ow_bit;
sc 145 dev/gpio/gpioow.c oba.oba_bus = &sc->sc_ow_bus;
sc 146 dev/gpio/gpioow.c sc->sc_ow_dev = config_found(self, &oba, onewirebus_print);
sc 151 dev/gpio/gpioow.c gpio_pin_unmap(sc->sc_gpio, &sc->sc_map);
sc 157 dev/gpio/gpioow.c struct gpioow_softc *sc = (struct gpioow_softc *)self;
sc 160 dev/gpio/gpioow.c if (sc->sc_ow_dev != NULL)
sc 161 dev/gpio/gpioow.c rv = config_detach(sc->sc_ow_dev, flags);
sc 169 dev/gpio/gpioow.c struct gpioow_softc *sc = (struct gpioow_softc *)self;
sc 176 dev/gpio/gpioow.c sc->sc_dying = 1;
sc 177 dev/gpio/gpioow.c if (sc->sc_ow_dev != NULL)
sc 178 dev/gpio/gpioow.c rv = config_deactivate(sc->sc_ow_dev);
sc 200 dev/gpio/gpioow.c struct gpioow_softc *sc = arg;
sc 201 dev/gpio/gpioow.c int data = sc->sc_data;
sc 207 dev/gpio/gpioow.c if (sc->sc_data != data) {
sc 208 dev/gpio/gpioow.c sc->sc_data = data;
sc 209 dev/gpio/gpioow.c gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA,
sc 210 dev/gpio/gpioow.c sc->sc_data);
sc 217 dev/gpio/gpioow.c struct gpioow_softc *sc = arg;
sc 218 dev/gpio/gpioow.c int data = sc->sc_data;
sc 222 dev/gpio/gpioow.c if (sc->sc_data != data) {
sc 223 dev/gpio/gpioow.c sc->sc_data = data;
sc 224 dev/gpio/gpioow.c gpio_pin_ctl(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA,
sc 225 dev/gpio/gpioow.c sc->sc_data);
sc 232 dev/gpio/gpioow.c struct gpioow_softc *sc = arg;
sc 234 dev/gpio/gpioow.c return (gpio_pin_read(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA) ==
sc 241 dev/gpio/gpioow.c struct gpioow_softc *sc = arg;
sc 243 dev/gpio/gpioow.c gpio_pin_write(sc->sc_gpio, &sc->sc_map, GPIOOW_PIN_DATA,
sc 104 dev/hil/hil.c int send_device_cmd(struct hil_softc *sc, u_int device, u_int cmd);
sc 111 dev/hil/hil.c #define hil_process_pending(sc) wakeup(&(sc)->sc_pending)
sc 114 dev/hil/hil.c hilwait(struct hil_softc *sc)
sc 120 dev/hil/hil.c if ((bus_space_read_1(sc->sc_bst, sc->sc_bsh, HILP_STAT) &
sc 129 dev/hil/hil.c hildatawait(struct hil_softc *sc)
sc 135 dev/hil/hil.c if ((bus_space_read_1(sc->sc_bst, sc->sc_bsh, HILP_STAT) &
sc 148 dev/hil/hil.c hil_attach(struct hil_softc *sc, int *hil_is_console)
sc 155 dev/hil/hil.c sc->sc_cmdending = 0;
sc 156 dev/hil/hil.c sc->sc_actdev = sc->sc_cmddev = 0;
sc 157 dev/hil/hil.c sc->sc_cmddone = 0;
sc 158 dev/hil/hil.c sc->sc_cmdbp = sc->sc_cmdbuf;
sc 159 dev/hil/hil.c sc->sc_pollbp = sc->sc_pollbuf;
sc 160 dev/hil/hil.c sc->sc_console = hil_is_console;
sc 200 dev/hil/hil.c struct hil_softc *sc = v;
sc 204 dev/hil/hil.c sc->sc_status = HIL_STATUS_BUSY;
sc 211 dev/hil/hil.c send_hil_cmd(sc, HIL_WRITELPCTRL, &db, 1, NULL);
sc 218 dev/hil/hil.c if (bus_space_read_1(sc->sc_bst, sc->sc_bsh, HILP_STAT) &
sc 220 dev/hil/hil.c db = bus_space_read_1(sc->sc_bst, sc->sc_bsh, HILP_DATA);
sc 231 dev/hil/hil.c if (send_hil_cmd(sc, HIL_READLPSTAT, NULL, 0, &db) == 0) {
sc 238 dev/hil/hil.c sc->sc_dev.dv_xname);
sc 245 dev/hil/hil.c printf("%s: no devices\n", sc->sc_dev.dv_xname);
sc 246 dev/hil/hil.c sc->sc_pending = 0;
sc 254 dev/hil/hil.c if (kthread_create(hil_thread, sc, &sc->sc_thread,
sc 255 dev/hil/hil.c "%s", sc->sc_dev.dv_xname) != 0) {
sc 257 dev/hil/hil.c sc->sc_dev.dv_xname);
sc 264 dev/hil/hil.c send_hil_cmd(sc, HIL_INTON, NULL, 0, NULL);
sc 269 dev/hil/hil.c sc->sc_status = HIL_STATUS_READY;
sc 270 dev/hil/hil.c hil_process_pending(sc);
sc 280 dev/hil/hil.c struct hil_softc *sc = v;
sc 286 dev/hil/hil.c stat = bus_space_read_1(sc->sc_bst, sc->sc_bsh, HILP_STAT);
sc 295 dev/hil/hil.c c = bus_space_read_1(sc->sc_bst, sc->sc_bsh,
sc 299 dev/hil/hil.c hil_process_int(sc, stat, c);
sc 301 dev/hil/hil.c if (sc->sc_status != HIL_STATUS_BUSY)
sc 302 dev/hil/hil.c hil_process_pending(sc);
sc 308 dev/hil/hil.c hil_process_int(struct hil_softc *sc, u_int8_t stat, u_int8_t c)
sc 315 dev/hil/hil.c sc->sc_cmddone = 1;
sc 318 dev/hil/hil.c sc->sc_pending = HIL_PENDING_RECONFIG;
sc 321 dev/hil/hil.c sc->sc_pending = HIL_PENDING_UNPLUGGED;
sc 328 dev/hil/hil.c dev = sc->sc_devices[sc->sc_actdev];
sc 331 dev/hil/hil.c sc->sc_pollbp - sc->sc_pollbuf,
sc 332 dev/hil/hil.c sc->sc_pollbuf);
sc 334 dev/hil/hil.c sc->sc_cmdending = 1;
sc 336 dev/hil/hil.c sc->sc_actdev = 0;
sc 339 dev/hil/hil.c sc->sc_actdev = (c & HIL_DEVMASK);
sc 340 dev/hil/hil.c sc->sc_pollbp = sc->sc_pollbuf;
sc 342 dev/hil/hil.c if (sc->sc_cmddev == (c & HIL_DEVMASK)) {
sc 343 dev/hil/hil.c sc->sc_cmdbp = sc->sc_cmdbuf;
sc 344 dev/hil/hil.c sc->sc_actdev = 0;
sc 350 dev/hil/hil.c if (sc->sc_actdev != 0) /* Collecting poll data */
sc 351 dev/hil/hil.c *sc->sc_pollbp++ = c;
sc 353 dev/hil/hil.c if (sc->sc_cmddev != 0) { /* Collecting cmd data */
sc 354 dev/hil/hil.c if (sc->sc_cmdending) {
sc 355 dev/hil/hil.c sc->sc_cmddone = 1;
sc 356 dev/hil/hil.c sc->sc_cmdending = 0;
sc 358 dev/hil/hil.c *sc->sc_cmdbp++ = c;
sc 370 dev/hil/hil.c hil_process_poll(struct hil_softc *sc, u_int8_t stat, u_int8_t c)
sc 377 dev/hil/hil.c sc->sc_cmddone = 1;
sc 385 dev/hil/hil.c sc->sc_pending = HIL_PENDING_RECONFIG;
sc 393 dev/hil/hil.c send_hil_cmd(sc, HIL_WRITEKBDSADR, &db,
sc 402 dev/hil/hil.c sc->sc_pending = HIL_PENDING_UNPLUGGED;
sc 410 dev/hil/hil.c sc->sc_cmdending = 1;
sc 412 dev/hil/hil.c sc->sc_actdev = 0;
sc 416 dev/hil/hil.c sc->sc_actdev = (c & HIL_DEVMASK);
sc 417 dev/hil/hil.c sc->sc_pollbp = sc->sc_pollbuf;
sc 420 dev/hil/hil.c if (sc->sc_cmddev == (c & HIL_DEVMASK)) {
sc 421 dev/hil/hil.c sc->sc_cmdbp = sc->sc_cmdbuf;
sc 422 dev/hil/hil.c sc->sc_actdev = 0;
sc 428 dev/hil/hil.c if (sc->sc_actdev != 0) /* Collecting poll data */
sc 431 dev/hil/hil.c if (sc->sc_cmddev != 0) { /* Discarding cmd data */
sc 432 dev/hil/hil.c if (sc->sc_cmdending) {
sc 433 dev/hil/hil.c sc->sc_cmddone = 1;
sc 434 dev/hil/hil.c sc->sc_cmdending = 0;
sc 447 dev/hil/hil.c struct hil_softc *sc = arg;
sc 452 dev/hil/hil.c if (sc->sc_pending == 0) {
sc 454 dev/hil/hil.c (void)tsleep(&sc->sc_pending, PWAIT, "hil_event", 0);
sc 458 dev/hil/hil.c switch (sc->sc_pending) {
sc 460 dev/hil/hil.c sc->sc_pending = 0;
sc 461 dev/hil/hil.c hilconfig(sc, sc->sc_maxdev);
sc 464 dev/hil/hil.c sc->sc_pending = 0;
sc 465 dev/hil/hil.c hilempty(sc);
sc 488 dev/hil/hil.c hilconfig(struct hil_softc *sc, u_int knowndevs)
sc 500 dev/hil/hil.c send_hil_cmd(sc, HIL_READLPSTAT, NULL, 0, &db);
sc 501 dev/hil/hil.c sc->sc_maxdev = db & LPS_DEVMASK;
sc 503 dev/hil/hil.c printf("%s: %d device(s)\n", sc->sc_dev.dv_xname, sc->sc_maxdev);
sc 510 dev/hil/hil.c send_hil_cmd(sc, HIL_WRITEKBDSADR, &db, 1, NULL);
sc 515 dev/hil/hil.c for (id = knowndevs + 1; id <= sc->sc_maxdev; id++) {
sc 519 dev/hil/hil.c if (send_device_cmd(sc, id, HIL_IDENTIFY) != 0) {
sc 521 dev/hil/hil.c sc->sc_dev.dv_xname, id);
sc 525 dev/hil/hil.c len = sc->sc_cmdbp - sc->sc_cmdbuf;
sc 529 dev/hil/hil.c sc->sc_dev.dv_xname, id);
sc 536 dev/hil/hil.c if (sc->sc_cmdbuf[0] >= hd->minid &&
sc 537 dev/hil/hil.c sc->sc_cmdbuf[0] <= hd->maxid) {
sc 539 dev/hil/hil.c ha.ha_console = *sc->sc_console;
sc 544 dev/hil/hil.c bcopy(sc->sc_cmdbuf, ha.ha_info, len);
sc 546 dev/hil/hil.c sc->sc_devices[id] = (struct hildev_softc *)
sc 547 dev/hil/hil.c config_found_sm(&sc->sc_dev, &ha, hildevprint,
sc 555 dev/hil/hil.c if (sc->sc_devices[id] != NULL &&
sc 558 dev/hil/hil.c *sc->sc_console = 1;
sc 566 dev/hil/hil.c for (id = sc->sc_maxdev + 1; id < NHILD; id++) {
sc 567 dev/hil/hil.c if (sc->sc_devices[id] != NULL)
sc 568 dev/hil/hil.c config_detach((struct device *)sc->sc_devices[id],
sc 570 dev/hil/hil.c sc->sc_devices[id] = NULL;
sc 573 dev/hil/hil.c sc->sc_cmdbp = sc->sc_cmdbuf;
sc 583 dev/hil/hil.c hilempty(struct hil_softc *sc)
sc 595 dev/hil/hil.c if (send_hil_cmd(sc, HIL_READLPSTAT, NULL, 0, &db) == 0) {
sc 605 dev/hil/hil.c sc->sc_maxdev = 0;
sc 608 dev/hil/hil.c send_hil_cmd(sc, HIL_READLPSTAT, NULL, 0, &db);
sc 609 dev/hil/hil.c oldmaxdev = sc->sc_maxdev;
sc 610 dev/hil/hil.c sc->sc_maxdev = db & LPS_DEVMASK;
sc 612 dev/hil/hil.c if (sc->sc_maxdev != 0) {
sc 617 dev/hil/hil.c hilconfig(sc, oldmaxdev);
sc 625 dev/hil/hil.c for (id = sc->sc_maxdev + 1; id < NHILD; id++) {
sc 626 dev/hil/hil.c if (sc->sc_devices[id] != NULL)
sc 627 dev/hil/hil.c config_detach((struct device *)sc->sc_devices[id],
sc 629 dev/hil/hil.c sc->sc_devices[id] = NULL;
sc 632 dev/hil/hil.c sc->sc_cmdbp = sc->sc_cmdbuf;
sc 646 dev/hil/hil.c send_hil_cmd(struct hil_softc *sc, u_int cmd, u_int8_t *data, u_int dlen,
sc 654 dev/hil/hil.c if (hilwait(sc) == 0) {
sc 656 dev/hil/hil.c printf("%s: no answer from the loop\n", sc->sc_dev.dv_xname);
sc 662 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_CMD, cmd);
sc 664 dev/hil/hil.c hilwait(sc);
sc 665 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_DATA, *data++);
sc 670 dev/hil/hil.c if (hildatawait(sc) == 0) {
sc 673 dev/hil/hil.c sc->sc_dev.dv_xname);
sc 677 dev/hil/hil.c status = bus_space_read_1(sc->sc_bst, sc->sc_bsh,
sc 679 dev/hil/hil.c *rdata = bus_space_read_1(sc->sc_bst, sc->sc_bsh,
sc 698 dev/hil/hil.c send_device_cmd(struct hil_softc *sc, u_int device, u_int cmd)
sc 703 dev/hil/hil.c polloff(sc);
sc 705 dev/hil/hil.c sc->sc_cmdbp = sc->sc_cmdbuf;
sc 706 dev/hil/hil.c sc->sc_cmddev = device;
sc 708 dev/hil/hil.c if (hilwait(sc) == 0) {
sc 711 dev/hil/hil.c sc->sc_dev.dv_xname, device);
sc 720 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_CMD, HIL_STARTCMD);
sc 721 dev/hil/hil.c hilwait(sc);
sc 722 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_DATA, 8 + device);
sc 723 dev/hil/hil.c hilwait(sc);
sc 724 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_DATA, cmd);
sc 725 dev/hil/hil.c hilwait(sc);
sc 726 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_DATA, HIL_TIMEOUT);
sc 731 dev/hil/hil.c hilwait(sc);
sc 732 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_CMD, HIL_TRIGGER);
sc 733 dev/hil/hil.c sc->sc_cmddone = 0;
sc 735 dev/hil/hil.c if (hildatawait(sc) == 0) {
sc 738 dev/hil/hil.c sc->sc_dev.dv_xname, device);
sc 743 dev/hil/hil.c status = bus_space_read_1(sc->sc_bst, sc->sc_bsh, HILP_STAT);
sc 744 dev/hil/hil.c c = bus_space_read_1(sc->sc_bst, sc->sc_bsh, HILP_DATA);
sc 746 dev/hil/hil.c hil_process_int(sc, status, c);
sc 747 dev/hil/hil.c } while (sc->sc_cmddone == 0);
sc 749 dev/hil/hil.c sc->sc_cmddev = 0;
sc 751 dev/hil/hil.c pollon(sc);
sc 759 dev/hil/hil.c struct hil_softc *sc = (struct hil_softc *)dev->sc_dev.dv_parent;
sc 764 dev/hil/hil.c if ((rc = send_device_cmd(sc, dev->sc_code, cmd)) == 0) {
sc 769 dev/hil/hil.c *outlen = min(*outlen, sc->sc_cmdbp - sc->sc_cmdbuf);
sc 770 dev/hil/hil.c bcopy(sc->sc_cmdbuf, outbuf, *outlen);
sc 782 dev/hil/hil.c polloff(struct hil_softc *sc)
sc 786 dev/hil/hil.c if (hilwait(sc) == 0)
sc 792 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_CMD, HIL_SETARR);
sc 793 dev/hil/hil.c hilwait(sc);
sc 794 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_DATA, 0);
sc 799 dev/hil/hil.c hilwait(sc);
sc 800 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_CMD, HIL_READLPCTRL);
sc 801 dev/hil/hil.c hildatawait(sc);
sc 802 dev/hil/hil.c db = bus_space_read_1(sc->sc_bst, sc->sc_bsh, HILP_DATA);
sc 804 dev/hil/hil.c hilwait(sc);
sc 805 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_CMD, HIL_WRITELPCTRL);
sc 806 dev/hil/hil.c hilwait(sc);
sc 807 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_DATA, db);
sc 813 dev/hil/hil.c hilwait(sc);
sc 814 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_CMD, HIL_READBUSY);
sc 815 dev/hil/hil.c hildatawait(sc);
sc 816 dev/hil/hil.c db = bus_space_read_1(sc->sc_bst, sc->sc_bsh, HILP_DATA);
sc 819 dev/hil/hil.c sc->sc_cmddone = 0;
sc 820 dev/hil/hil.c sc->sc_cmddev = 0;
sc 824 dev/hil/hil.c pollon(struct hil_softc *sc)
sc 828 dev/hil/hil.c if (hilwait(sc) == 0)
sc 834 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_CMD, HIL_READLPCTRL);
sc 835 dev/hil/hil.c hildatawait(sc);
sc 836 dev/hil/hil.c db = bus_space_read_1(sc->sc_bst, sc->sc_bsh, HILP_DATA);
sc 838 dev/hil/hil.c hilwait(sc);
sc 839 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_CMD, HIL_WRITELPCTRL);
sc 840 dev/hil/hil.c hilwait(sc);
sc 841 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_DATA, db);
sc 846 dev/hil/hil.c hilwait(sc);
sc 847 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_CMD, HIL_SETARR);
sc 848 dev/hil/hil.c hilwait(sc);
sc 849 dev/hil/hil.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, HILP_DATA, 0);
sc 854 dev/hil/hil.c hil_set_poll(struct hil_softc *sc, int on)
sc 857 dev/hil/hil.c pollon(sc);
sc 859 dev/hil/hil.c hil_process_pending(sc);
sc 860 dev/hil/hil.c send_hil_cmd(sc, HIL_INTON, NULL, 0, NULL);
sc 867 dev/hil/hil.c struct hil_softc *sc = (struct hil_softc *)dev->sc_dev.dv_parent;
sc 870 dev/hil/hil.c s = bus_space_read_1(sc->sc_bst, sc->sc_bsh, HILP_STAT);
sc 874 dev/hil/hil.c c = bus_space_read_1(sc->sc_bst, sc->sc_bsh, HILP_DATA);
sc 877 dev/hil/hil.c if (hil_process_poll(sc, s, c)) {
sc 879 dev/hil/hil.c if (sc->sc_actdev == dev->sc_code) {
sc 74 dev/hil/hilid.c struct hilid_softc *sc = (void *)self;
sc 78 dev/hil/hilid.c sc->hd_code = ha->ha_code;
sc 79 dev/hil/hilid.c sc->hd_type = ha->ha_type;
sc 80 dev/hil/hilid.c sc->hd_infolen = ha->ha_infolen;
sc 81 dev/hil/hilid.c bcopy(ha->ha_info, sc->hd_info, ha->ha_infolen);
sc 82 dev/hil/hilid.c sc->hd_fn = NULL;
sc 86 dev/hil/hilid.c bzero(sc->sc_id, sizeof(sc->sc_id));
sc 87 dev/hil/hilid.c len = sizeof(sc->sc_id);
sc 90 dev/hil/hilid.c if (send_hildev_cmd((struct hildev_softc *)sc,
sc 91 dev/hil/hilid.c HIL_SECURITY, sc->sc_id, &len) == 0) {
sc 92 dev/hil/hilid.c for (i = 0; i < sizeof(sc->sc_id); i++)
sc 93 dev/hil/hilid.c printf(" %02x", sc->sc_id[i]);
sc 148 dev/hil/hilkbd.c struct hilkbd_softc *sc = (void *)self;
sc 154 dev/hil/hilkbd.c sc->hd_code = ha->ha_code;
sc 155 dev/hil/hilkbd.c sc->hd_type = ha->ha_type;
sc 156 dev/hil/hilkbd.c sc->hd_infolen = ha->ha_infolen;
sc 157 dev/hil/hilkbd.c bcopy(ha->ha_info, sc->hd_info, ha->ha_infolen);
sc 158 dev/hil/hilkbd.c sc->hd_fn = hilkbd_callback;
sc 182 dev/hil/hilkbd.c sc->sc_numleds = (ha->ha_info[2] & HILIOB_PMASK) >> 4;
sc 183 dev/hil/hilkbd.c if (sc->sc_numleds != 0)
sc 184 dev/hil/hilkbd.c printf(", %d leds", sc->sc_numleds);
sc 197 dev/hil/hilkbd.c ps2 = (sc->sc_numleds != 0);
sc 200 dev/hil/hilkbd.c timeout_set(&sc->sc_rawrepeat_ch, hilkbd_rawrepeat, sc);
sc 210 dev/hil/hilkbd.c a.accesscookie = sc;
sc 213 dev/hil/hilkbd.c sc->sc_console = sc->sc_enabled = 1;
sc 214 dev/hil/hilkbd.c wskbd_cnattach(&hilkbd_consops, sc, a.keymap);
sc 216 dev/hil/hilkbd.c sc->sc_console = sc->sc_enabled = 0;
sc 219 dev/hil/hilkbd.c sc->sc_wskbddev = config_found(self, &a, wskbddevprint);
sc 226 dev/hil/hilkbd.c if (!ps2 && sc->sc_wskbddev != NULL) {
sc 227 dev/hil/hilkbd.c wskbd_input(sc->sc_wskbddev, WSCONS_EVENT_KEY_DOWN, 80);
sc 228 dev/hil/hilkbd.c wskbd_input(sc->sc_wskbddev, WSCONS_EVENT_KEY_UP, 80);
sc 235 dev/hil/hilkbd.c struct hilkbd_softc *sc = (void *)self;
sc 241 dev/hil/hilkbd.c if (sc->sc_console) {
sc 246 dev/hil/hilkbd.c if (sc->sc_wskbddev != NULL)
sc 247 dev/hil/hilkbd.c return config_detach(sc->sc_wskbddev, flags);
sc 255 dev/hil/hilkbd.c struct hilkbd_softc *sc = v;
sc 258 dev/hil/hilkbd.c if (sc->sc_enabled)
sc 261 dev/hil/hilkbd.c if (sc->sc_console)
sc 265 dev/hil/hilkbd.c sc->sc_enabled = on;
sc 273 dev/hil/hilkbd.c struct hilkbd_softc *sc = v;
sc 276 dev/hil/hilkbd.c if (sc->sc_numleds == 0)
sc 279 dev/hil/hilkbd.c changemask = leds ^ sc->sc_ledstate;
sc 285 dev/hil/hilkbd.c send_hildev_cmd((struct hildev_softc *)sc,
sc 289 dev/hil/hilkbd.c send_hildev_cmd((struct hildev_softc *)sc,
sc 293 dev/hil/hilkbd.c send_hildev_cmd((struct hildev_softc *)sc,
sc 297 dev/hil/hilkbd.c sc->sc_ledstate = leds;
sc 303 dev/hil/hilkbd.c struct hilkbd_softc *sc = v;
sc 313 dev/hil/hilkbd.c *(int *)data = sc->sc_ledstate;
sc 317 dev/hil/hilkbd.c sc->sc_rawkbd = *(int *)data == WSKBD_RAW;
sc 318 dev/hil/hilkbd.c timeout_del(&sc->sc_rawrepeat_ch);
sc 323 dev/hil/hilkbd.c hilkbd_bell((struct hil_softc *)sc->hd_parent,
sc 335 dev/hil/hilkbd.c struct hilkbd_softc *sc = v;
sc 339 dev/hil/hilkbd.c while (hil_poll_data((struct hildev_softc *)sc, &stat, &c) != 0)
sc 350 dev/hil/hilkbd.c hilkbd_decode(sc, c, type, data, HIL_KBDBUTTON);
sc 356 dev/hil/hilkbd.c struct hilkbd_softc *sc = v;
sc 358 dev/hil/hilkbd.c hil_set_poll((struct hil_softc *)sc->hd_parent, on);
sc 364 dev/hil/hilkbd.c struct hilkbd_softc *sc = v;
sc 366 dev/hil/hilkbd.c hilkbd_bell((struct hil_softc *)sc->hd_parent,
sc 371 dev/hil/hilkbd.c hilkbd_bell(struct hil_softc *sc, u_int pitch, u_int period, u_int volume)
sc 380 dev/hil/hilkbd.c send_hil_cmd(sc, HIL_SETTONE, buf, 2, NULL);
sc 386 dev/hil/hilkbd.c struct hilkbd_softc *sc = (struct hilkbd_softc *)dev;
sc 394 dev/hil/hilkbd.c if (sc->sc_enabled == 0)
sc 408 dev/hil/hilkbd.c if (sc->sc_rawkbd) {
sc 414 dev/hil/hilkbd.c hilkbd_decode(sc, *buf++, &type, &key, kbdtype);
sc 427 dev/hil/hilkbd.c sc->sc_rep[npress++] = 0xe0;
sc 428 dev/hil/hilkbd.c sc->sc_rep[npress++] = c & 0x7f;
sc 434 dev/hil/hilkbd.c wskbd_rawinput(sc->sc_wskbddev, cbuf, j);
sc 436 dev/hil/hilkbd.c timeout_del(&sc->sc_rawrepeat_ch);
sc 437 dev/hil/hilkbd.c sc->sc_nrep = npress;
sc 439 dev/hil/hilkbd.c timeout_add(&sc->sc_rawrepeat_ch,
sc 447 dev/hil/hilkbd.c hilkbd_decode(sc, *buf++, &type, &key, kbdtype);
sc 448 dev/hil/hilkbd.c if (sc->sc_wskbddev != NULL)
sc 449 dev/hil/hilkbd.c wskbd_input(sc->sc_wskbddev, type, key);
sc 456 dev/hil/hilkbd.c hilkbd_decode(struct hilkbd_softc *sc, u_int8_t data, u_int *type, int *key,
sc 461 dev/hil/hilkbd.c data = sc->sc_lastarrow;
sc 463 dev/hil/hilkbd.c sc->sc_lastarrow = data;
sc 489 dev/hil/hilkbd.c struct hilkbd_softc *sc = v;
sc 493 dev/hil/hilkbd.c wskbd_rawinput(sc->sc_wskbddev, sc->sc_rep, sc->sc_nrep);
sc 495 dev/hil/hilkbd.c timeout_add(&sc->sc_rawrepeat_ch, (hz * REP_DELAYN) / 1000);
sc 102 dev/hil/hilms.c struct hilms_softc *sc = (void *)self;
sc 107 dev/hil/hilms.c sc->hd_code = ha->ha_code;
sc 108 dev/hil/hilms.c sc->hd_type = ha->ha_type;
sc 109 dev/hil/hilms.c sc->hd_infolen = ha->ha_infolen;
sc 110 dev/hil/hilms.c bcopy(ha->ha_info, sc->hd_info, ha->ha_infolen);
sc 111 dev/hil/hilms.c sc->hd_fn = hilms_callback;
sc 118 dev/hil/hilms.c sc->sc_features = ha->ha_info[1];
sc 119 dev/hil/hilms.c sc->sc_axes = sc->sc_features & HIL_AXMASK;
sc 121 dev/hil/hilms.c if (sc->sc_features & HIL_IOB) {
sc 124 dev/hil/hilms.c if (sc->sc_features & HIL_ABSOLUTE) {
sc 127 dev/hil/hilms.c if (sc->sc_axes > 1)
sc 130 dev/hil/hilms.c iob += 2 * sc->sc_axes;
sc 134 dev/hil/hilms.c sc->sc_features &= ~(HIL_IOB | HILIOB_PIO);
sc 137 dev/hil/hilms.c sc->sc_buttons = iob & HILIOB_BMASK;
sc 138 dev/hil/hilms.c sc->sc_features |= (iob & HILIOB_PIO);
sc 143 dev/hil/hilms.c printf(", %d axes", sc->sc_axes);
sc 144 dev/hil/hilms.c if (sc->sc_buttons == 1)
sc 146 dev/hil/hilms.c else if (sc->sc_buttons > 1)
sc 147 dev/hil/hilms.c printf(", %d buttons", sc->sc_buttons);
sc 148 dev/hil/hilms.c if (sc->sc_features & HILIOB_PIO)
sc 150 dev/hil/hilms.c if (sc->sc_features & HIL_ABSOLUTE) {
sc 161 dev/hil/hilms.c sc->sc_enabled = 0;
sc 164 dev/hil/hilms.c a.accesscookie = sc;
sc 166 dev/hil/hilms.c sc->sc_wsmousedev = config_found(self, &a, wsmousedevprint);
sc 172 dev/hil/hilms.c struct hilms_softc *sc = (void *)self;
sc 174 dev/hil/hilms.c if (sc->sc_wsmousedev != NULL)
sc 175 dev/hil/hilms.c return config_detach(sc->sc_wsmousedev, flags);
sc 183 dev/hil/hilms.c struct hilms_softc *sc = v;
sc 185 dev/hil/hilms.c if (sc->sc_enabled)
sc 188 dev/hil/hilms.c sc->sc_enabled = 1;
sc 189 dev/hil/hilms.c sc->sc_buttonstate = 0;
sc 197 dev/hil/hilms.c struct hilms_softc *sc = v;
sc 199 dev/hil/hilms.c sc->sc_enabled = 0;
sc 206 dev/hil/hilms.c struct hilms_softc *sc = v;
sc 221 dev/hil/hilms.c struct hilms_softc *sc = (struct hilms_softc *)dev;
sc 231 dev/hil/hilms.c if (sc->sc_enabled == 0)
sc 243 dev/hil/hilms.c minlen += sc->sc_axes <<
sc 244 dev/hil/hilms.c (sc->sc_features & HIL_16_BITS) ? 1 : 0;
sc 259 dev/hil/hilms.c flags = sc->sc_features & HIL_ABSOLUTE ?
sc 262 dev/hil/hilms.c if (sc->sc_features & HIL_16_BITS) {
sc 265 dev/hil/hilms.c if (!(sc->sc_features & HIL_ABSOLUTE))
sc 269 dev/hil/hilms.c if (!(sc->sc_features & HIL_ABSOLUTE))
sc 272 dev/hil/hilms.c if (sc->sc_axes > 1) {
sc 273 dev/hil/hilms.c if (sc->sc_features & HIL_16_BITS) {
sc 276 dev/hil/hilms.c if (!(sc->sc_features & HIL_ABSOLUTE))
sc 280 dev/hil/hilms.c if (!(sc->sc_features & HIL_ABSOLUTE))
sc 283 dev/hil/hilms.c if (sc->sc_axes > 2) {
sc 284 dev/hil/hilms.c if (sc->sc_features & HIL_16_BITS) {
sc 287 dev/hil/hilms.c if (!(sc->sc_features & HIL_ABSOLUTE))
sc 291 dev/hil/hilms.c if (!(sc->sc_features & HIL_ABSOLUTE))
sc 302 dev/hil/hilms.c if ((sc->sc_features & HIL_ABSOLUTE) == 0 &&
sc 303 dev/hil/hilms.c sc->sc_buttons == 0)
sc 327 dev/hil/hilms.c sc->sc_buttonstate &= ~(1 << button);
sc 330 dev/hil/hilms.c sc->sc_buttonstate |= (1 << button);
sc 335 dev/hil/hilms.c if (sc->sc_wsmousedev != NULL)
sc 336 dev/hil/hilms.c wsmouse_input(sc->sc_wsmousedev,
sc 337 dev/hil/hilms.c sc->sc_buttonstate, dx, dy, dz, 0, flags);
sc 82 dev/i2c/ad741x.c struct adc_softc *sc = (struct adc_softc *)self;
sc 87 dev/i2c/ad741x.c sc->sc_tag = ia->ia_tag;
sc 88 dev/i2c/ad741x.c sc->sc_addr = ia->ia_addr;
sc 92 dev/i2c/ad741x.c sc->sc_chip = 0;
sc 94 dev/i2c/ad741x.c sc->sc_chip = 7417;
sc 96 dev/i2c/ad741x.c sc->sc_chip = 7418;
sc 98 dev/i2c/ad741x.c if (sc->sc_chip != 0) {
sc 101 dev/i2c/ad741x.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 102 dev/i2c/ad741x.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 109 dev/i2c/ad741x.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 110 dev/i2c/ad741x.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 115 dev/i2c/ad741x.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 116 dev/i2c/ad741x.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 120 dev/i2c/ad741x.c sc->sc_config = data;
sc 123 dev/i2c/ad741x.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 124 dev/i2c/ad741x.c sizeof(sc->sc_sensordev.xname));
sc 126 dev/i2c/ad741x.c sc->sc_sensor[ADC_TEMP].type = SENSOR_TEMP;
sc 127 dev/i2c/ad741x.c strlcpy(sc->sc_sensor[ADC_TEMP].desc, "Internal",
sc 128 dev/i2c/ad741x.c sizeof(sc->sc_sensor[ADC_TEMP].desc));
sc 131 dev/i2c/ad741x.c if (sc->sc_chip == 7417 || sc->sc_chip == 7418) {
sc 132 dev/i2c/ad741x.c sc->sc_sensor[ADC_ADC0].type = SENSOR_INTEGER;
sc 135 dev/i2c/ad741x.c if (sc->sc_chip == 7417 || sc->sc_chip == 7418) {
sc 136 dev/i2c/ad741x.c sc->sc_sensor[ADC_ADC1].type = SENSOR_INTEGER;
sc 137 dev/i2c/ad741x.c sc->sc_sensor[ADC_ADC2].type = SENSOR_INTEGER;
sc 138 dev/i2c/ad741x.c sc->sc_sensor[ADC_ADC3].type = SENSOR_INTEGER;
sc 142 dev/i2c/ad741x.c if (sensor_task_register(sc, adc_refresh, 5) == NULL) {
sc 147 dev/i2c/ad741x.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[0]);
sc 148 dev/i2c/ad741x.c if (sc->sc_chip == 7417 || sc->sc_chip == 7418)
sc 149 dev/i2c/ad741x.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[1]);
sc 150 dev/i2c/ad741x.c if (sc->sc_chip == 7417)
sc 152 dev/i2c/ad741x.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 153 dev/i2c/ad741x.c sensordev_install(&sc->sc_sensordev);
sc 161 dev/i2c/ad741x.c struct adc_softc *sc = arg;
sc 165 dev/i2c/ad741x.c iic_acquire_bus(sc->sc_tag, 0);
sc 167 dev/i2c/ad741x.c reg = (sc->sc_config & AD741X_CONFMASK) | (0 << 5);
sc 168 dev/i2c/ad741x.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 169 dev/i2c/ad741x.c sc->sc_addr, &cmd, sizeof cmd, ®, sizeof reg, 0))
sc 173 dev/i2c/ad741x.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 174 dev/i2c/ad741x.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0))
sc 176 dev/i2c/ad741x.c sc->sc_sensor[ADC_TEMP].value = 273150000 +
sc 179 dev/i2c/ad741x.c if (sc->sc_chip == 0)
sc 182 dev/i2c/ad741x.c if (sc->sc_chip == 7418) {
sc 184 dev/i2c/ad741x.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 185 dev/i2c/ad741x.c sc->sc_addr, &cmd, sizeof cmd, ®, sizeof reg, 0))
sc 189 dev/i2c/ad741x.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 190 dev/i2c/ad741x.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0))
sc 192 dev/i2c/ad741x.c sc->sc_sensor[ADC_ADC0].value =
sc 199 dev/i2c/ad741x.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 200 dev/i2c/ad741x.c sc->sc_addr, &cmd, sizeof cmd, ®, sizeof reg, 0))
sc 204 dev/i2c/ad741x.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 205 dev/i2c/ad741x.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0))
sc 207 dev/i2c/ad741x.c sc->sc_sensor[ADC_ADC0 + i].value =
sc 212 dev/i2c/ad741x.c iic_release_bus(sc->sc_tag, 0);
sc 85 dev/i2c/adm1021.c struct admtemp_softc *sc = (struct admtemp_softc *)self;
sc 90 dev/i2c/adm1021.c sc->sc_tag = ia->ia_tag;
sc 91 dev/i2c/adm1021.c sc->sc_addr = ia->ia_addr;
sc 99 dev/i2c/adm1021.c iic_acquire_bus(sc->sc_tag, 0);
sc 101 dev/i2c/adm1021.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 102 dev/i2c/adm1021.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 103 dev/i2c/adm1021.c iic_release_bus(sc->sc_tag, 0);
sc 109 dev/i2c/adm1021.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 110 dev/i2c/adm1021.c sc->sc_addr, &cmd, sizeof cmd, &stat, sizeof stat, 0)) {
sc 111 dev/i2c/adm1021.c iic_release_bus(sc->sc_tag, 0);
sc 116 dev/i2c/adm1021.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 117 dev/i2c/adm1021.c sc->sc_addr, &cmd, sizeof cmd, &stat, sizeof stat, 0)) {
sc 118 dev/i2c/adm1021.c iic_release_bus(sc->sc_tag, 0);
sc 127 dev/i2c/adm1021.c sc->sc_noexternal = 1;
sc 131 dev/i2c/adm1021.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 132 dev/i2c/adm1021.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 133 dev/i2c/adm1021.c iic_release_bus(sc->sc_tag, 0);
sc 138 dev/i2c/adm1021.c iic_release_bus(sc->sc_tag, 0);
sc 141 dev/i2c/adm1021.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 142 dev/i2c/adm1021.c sizeof(sc->sc_sensordev.xname));
sc 144 dev/i2c/adm1021.c sc->sc_sensor[ADMTEMP_EXT].type = SENSOR_TEMP;
sc 145 dev/i2c/adm1021.c strlcpy(sc->sc_sensor[ADMTEMP_EXT].desc,
sc 147 dev/i2c/adm1021.c sizeof(sc->sc_sensor[ADMTEMP_EXT].desc));
sc 149 dev/i2c/adm1021.c sc->sc_sensor[ADMTEMP_INT].type = SENSOR_TEMP;
sc 150 dev/i2c/adm1021.c strlcpy(sc->sc_sensor[ADMTEMP_INT].desc,
sc 152 dev/i2c/adm1021.c sizeof(sc->sc_sensor[ADMTEMP_INT].desc));
sc 154 dev/i2c/adm1021.c if (sensor_task_register(sc, admtemp_refresh, 5) == NULL) {
sc 159 dev/i2c/adm1021.c for (i = 0; i < (sc->sc_noexternal ? 1 : ADMTEMP_NUM_SENSORS); i++)
sc 160 dev/i2c/adm1021.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 161 dev/i2c/adm1021.c sensordev_install(&sc->sc_sensordev);
sc 169 dev/i2c/adm1021.c struct admtemp_softc *sc = arg;
sc 173 dev/i2c/adm1021.c iic_acquire_bus(sc->sc_tag, 0);
sc 175 dev/i2c/adm1021.c if (sc->sc_noexternal == 0) {
sc 177 dev/i2c/adm1021.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 180 dev/i2c/adm1021.c sc->sc_sensor[ADMTEMP_EXT].flags |= SENSOR_FINVALID;
sc 182 dev/i2c/adm1021.c sc->sc_sensor[ADMTEMP_EXT].value =
sc 184 dev/i2c/adm1021.c sc->sc_sensor[ADMTEMP_EXT].flags &= ~SENSOR_FINVALID;
sc 188 dev/i2c/adm1021.c sc->sc_sensor[ADMTEMP_EXT].flags |= SENSOR_FINVALID;
sc 192 dev/i2c/adm1021.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 195 dev/i2c/adm1021.c sc->sc_sensor[ADMTEMP_INT].flags |= SENSOR_FINVALID;
sc 197 dev/i2c/adm1021.c sc->sc_sensor[ADMTEMP_INT].value =
sc 199 dev/i2c/adm1021.c sc->sc_sensor[ADMTEMP_INT].flags &= ~SENSOR_FINVALID;
sc 203 dev/i2c/adm1021.c iic_release_bus(sc->sc_tag, 0);
sc 95 dev/i2c/adm1024.c struct admlc_softc *sc = (struct admlc_softc *)self;
sc 100 dev/i2c/adm1024.c sc->sc_tag = ia->ia_tag;
sc 101 dev/i2c/adm1024.c sc->sc_addr = ia->ia_addr;
sc 103 dev/i2c/adm1024.c iic_acquire_bus(sc->sc_tag, 0);
sc 105 dev/i2c/adm1024.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 106 dev/i2c/adm1024.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 107 dev/i2c/adm1024.c iic_release_bus(sc->sc_tag, 0);
sc 114 dev/i2c/adm1024.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 115 dev/i2c/adm1024.c sc->sc_addr, &cmd, sizeof cmd, &data2, sizeof data2, 0)) {
sc 116 dev/i2c/adm1024.c iic_release_bus(sc->sc_tag, 0);
sc 123 dev/i2c/adm1024.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 124 dev/i2c/adm1024.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 128 dev/i2c/adm1024.c sc->sc_fan1mul = (1 << (data >> 4) & 0x3);
sc 129 dev/i2c/adm1024.c sc->sc_fan2mul = (1 << (data >> 6) & 0x3);
sc 131 dev/i2c/adm1024.c iic_release_bus(sc->sc_tag, 0);
sc 134 dev/i2c/adm1024.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 135 dev/i2c/adm1024.c sizeof(sc->sc_sensordev.xname));
sc 137 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_INT].type = SENSOR_TEMP;
sc 138 dev/i2c/adm1024.c strlcpy(sc->sc_sensor[ADMLC_INT].desc, "Internal",
sc 139 dev/i2c/adm1024.c sizeof(sc->sc_sensor[ADMLC_INT].desc));
sc 141 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_EXT].type = SENSOR_TEMP;
sc 142 dev/i2c/adm1024.c strlcpy(sc->sc_sensor[ADMLC_EXT].desc, "External",
sc 143 dev/i2c/adm1024.c sizeof(sc->sc_sensor[ADMLC_EXT].desc));
sc 145 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_V2_5].type = SENSOR_VOLTS_DC;
sc 146 dev/i2c/adm1024.c strlcpy(sc->sc_sensor[ADMLC_V2_5].desc, "2.5 V",
sc 147 dev/i2c/adm1024.c sizeof(sc->sc_sensor[ADMLC_V2_5].desc));
sc 149 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_Vccp].type = SENSOR_VOLTS_DC;
sc 150 dev/i2c/adm1024.c strlcpy(sc->sc_sensor[ADMLC_Vccp].desc, "Vccp",
sc 151 dev/i2c/adm1024.c sizeof(sc->sc_sensor[ADMLC_Vccp].desc));
sc 153 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_Vcc].type = SENSOR_VOLTS_DC;
sc 154 dev/i2c/adm1024.c strlcpy(sc->sc_sensor[ADMLC_Vcc].desc, "Vcc",
sc 155 dev/i2c/adm1024.c sizeof(sc->sc_sensor[ADMLC_Vcc].desc));
sc 157 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_V5].type = SENSOR_VOLTS_DC;
sc 158 dev/i2c/adm1024.c strlcpy(sc->sc_sensor[ADMLC_V5].desc, "5 V",
sc 159 dev/i2c/adm1024.c sizeof(sc->sc_sensor[ADMLC_V5].desc));
sc 161 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_V12].type = SENSOR_VOLTS_DC;
sc 162 dev/i2c/adm1024.c strlcpy(sc->sc_sensor[ADMLC_V12].desc, "12 V",
sc 163 dev/i2c/adm1024.c sizeof(sc->sc_sensor[ADMLC_V12].desc));
sc 165 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_Vccp2].type = SENSOR_VOLTS_DC;
sc 166 dev/i2c/adm1024.c strlcpy(sc->sc_sensor[ADMLC_Vccp2].desc, "Vccp2",
sc 167 dev/i2c/adm1024.c sizeof(sc->sc_sensor[ADMLC_Vccp2].desc));
sc 169 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_FAN1].type = SENSOR_FANRPM;
sc 171 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_FAN2].type = SENSOR_FANRPM;
sc 174 dev/i2c/adm1024.c if (sensor_task_register(sc, admlc_refresh, 5) == NULL) {
sc 180 dev/i2c/adm1024.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 181 dev/i2c/adm1024.c sensordev_install(&sc->sc_sensordev);
sc 200 dev/i2c/adm1024.c struct admlc_softc *sc = arg;
sc 204 dev/i2c/adm1024.c iic_acquire_bus(sc->sc_tag, 0);
sc 207 dev/i2c/adm1024.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 208 dev/i2c/adm1024.c sc->sc_addr, &cmd, sizeof cmd, &sdata, sizeof sdata, 0) == 0)
sc 209 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_INT].value = 273150000 + 1000000 * sdata;
sc 212 dev/i2c/adm1024.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 213 dev/i2c/adm1024.c sc->sc_addr, &cmd, sizeof cmd, &sdata, sizeof sdata, 0) == 0)
sc 214 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_EXT].value = 273150000 + 1000000 * sdata;
sc 217 dev/i2c/adm1024.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 218 dev/i2c/adm1024.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0) {
sc 220 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_EXT].flags |= SENSOR_FINVALID;
sc 222 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_EXT].flags &= ~SENSOR_FINVALID;
sc 226 dev/i2c/adm1024.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 227 dev/i2c/adm1024.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 228 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_V2_5].value = 2500000 * data / 192;
sc 231 dev/i2c/adm1024.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 232 dev/i2c/adm1024.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 233 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_Vcc].value = 2249000 * data / 192;
sc 236 dev/i2c/adm1024.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 237 dev/i2c/adm1024.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 238 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_Vcc].value = 3300000 * data / 192;
sc 241 dev/i2c/adm1024.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 242 dev/i2c/adm1024.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 243 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_V5].value = 5000000 * data / 192;
sc 246 dev/i2c/adm1024.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 247 dev/i2c/adm1024.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 248 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_V12].value = 12000000 * data / 192;
sc 251 dev/i2c/adm1024.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 252 dev/i2c/adm1024.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 253 dev/i2c/adm1024.c sc->sc_sensor[ADMLC_Vccp2].value = 2700000 * data / 192;
sc 256 dev/i2c/adm1024.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 257 dev/i2c/adm1024.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 258 dev/i2c/adm1024.c fanval(&sc->sc_sensor[ADMLC_FAN1], sc->sc_fan1mul, data);
sc 261 dev/i2c/adm1024.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 262 dev/i2c/adm1024.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 263 dev/i2c/adm1024.c fanval(&sc->sc_sensor[ADMLC_FAN2], sc->sc_fan2mul, data);
sc 264 dev/i2c/adm1024.c iic_release_bus(sc->sc_tag, 0);
sc 97 dev/i2c/adm1025.c struct admtm_softc *sc = (struct admtm_softc *)self;
sc 102 dev/i2c/adm1025.c sc->sc_tag = ia->ia_tag;
sc 103 dev/i2c/adm1025.c sc->sc_addr = ia->ia_addr;
sc 107 dev/i2c/adm1025.c sc->sc_nsensors = ADMTM_NUM_SENSORS;
sc 108 dev/i2c/adm1025.c sc->sc_model = 1025;
sc 110 dev/i2c/adm1025.c sc->sc_nsensors += SMSC_NUM_SENSORS;
sc 111 dev/i2c/adm1025.c sc->sc_model = 192;
sc 114 dev/i2c/adm1025.c iic_acquire_bus(sc->sc_tag, 0);
sc 116 dev/i2c/adm1025.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 117 dev/i2c/adm1025.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 118 dev/i2c/adm1025.c iic_release_bus(sc->sc_tag, 0);
sc 125 dev/i2c/adm1025.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 126 dev/i2c/adm1025.c sc->sc_addr, &cmd, sizeof cmd, &data2, sizeof data2, 0)) {
sc 127 dev/i2c/adm1025.c iic_release_bus(sc->sc_tag, 0);
sc 132 dev/i2c/adm1025.c iic_release_bus(sc->sc_tag, 0);
sc 135 dev/i2c/adm1025.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 136 dev/i2c/adm1025.c sizeof(sc->sc_sensordev.xname));
sc 138 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_INT].type = SENSOR_TEMP;
sc 139 dev/i2c/adm1025.c strlcpy(sc->sc_sensor[ADMTM_INT].desc, "Internal",
sc 140 dev/i2c/adm1025.c sizeof(sc->sc_sensor[ADMTM_INT].desc));
sc 142 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_EXT].type = SENSOR_TEMP;
sc 143 dev/i2c/adm1025.c strlcpy(sc->sc_sensor[ADMTM_EXT].desc, "External",
sc 144 dev/i2c/adm1025.c sizeof(sc->sc_sensor[ADMTM_EXT].desc));
sc 146 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_V2_5].type = SENSOR_VOLTS_DC;
sc 147 dev/i2c/adm1025.c strlcpy(sc->sc_sensor[ADMTM_V2_5].desc, "2.5 V",
sc 148 dev/i2c/adm1025.c sizeof(sc->sc_sensor[ADMTM_V2_5].desc));
sc 150 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_Vccp].type = SENSOR_VOLTS_DC;
sc 151 dev/i2c/adm1025.c strlcpy(sc->sc_sensor[ADMTM_Vccp].desc, "Vccp",
sc 152 dev/i2c/adm1025.c sizeof(sc->sc_sensor[ADMTM_Vccp].desc));
sc 154 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_V3_3].type = SENSOR_VOLTS_DC;
sc 155 dev/i2c/adm1025.c strlcpy(sc->sc_sensor[ADMTM_V3_3].desc, "3.3 V",
sc 156 dev/i2c/adm1025.c sizeof(sc->sc_sensor[ADMTM_V3_3].desc));
sc 158 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_V5].type = SENSOR_VOLTS_DC;
sc 159 dev/i2c/adm1025.c strlcpy(sc->sc_sensor[ADMTM_V5].desc, "5 V",
sc 160 dev/i2c/adm1025.c sizeof(sc->sc_sensor[ADMTM_V5].desc));
sc 162 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_V12].type = SENSOR_VOLTS_DC;
sc 163 dev/i2c/adm1025.c strlcpy(sc->sc_sensor[ADMTM_V12].desc, "12 V",
sc 164 dev/i2c/adm1025.c sizeof(sc->sc_sensor[ADMTM_V12].desc));
sc 166 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_Vcc].type = SENSOR_VOLTS_DC;
sc 167 dev/i2c/adm1025.c strlcpy(sc->sc_sensor[ADMTM_Vcc].desc, "Vcc",
sc 168 dev/i2c/adm1025.c sizeof(sc->sc_sensor[ADMTM_Vcc].desc));
sc 170 dev/i2c/adm1025.c sc->sc_sensor[SMSC_V1_5].type = SENSOR_VOLTS_DC;
sc 171 dev/i2c/adm1025.c strlcpy(sc->sc_sensor[SMSC_V1_5].desc, "1.5 V",
sc 172 dev/i2c/adm1025.c sizeof(sc->sc_sensor[SMSC_V1_5].desc));
sc 174 dev/i2c/adm1025.c sc->sc_sensor[SMSC_V1_8].type = SENSOR_VOLTS_DC;
sc 175 dev/i2c/adm1025.c strlcpy(sc->sc_sensor[SMSC_V1_8].desc, "1.8 V",
sc 176 dev/i2c/adm1025.c sizeof(sc->sc_sensor[SMSC_V1_8].desc));
sc 178 dev/i2c/adm1025.c sc->sc_sensor[SMSC_TEMP2].type = SENSOR_TEMP;
sc 179 dev/i2c/adm1025.c strlcpy(sc->sc_sensor[SMSC_TEMP2].desc, "External",
sc 180 dev/i2c/adm1025.c sizeof(sc->sc_sensor[SMSC_TEMP2].desc));
sc 182 dev/i2c/adm1025.c if (sensor_task_register(sc, admtm_refresh, 5) == NULL) {
sc 187 dev/i2c/adm1025.c for (i = 0; i < sc->sc_nsensors; i++)
sc 188 dev/i2c/adm1025.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 189 dev/i2c/adm1025.c sensordev_install(&sc->sc_sensordev);
sc 197 dev/i2c/adm1025.c struct admtm_softc *sc = arg;
sc 201 dev/i2c/adm1025.c iic_acquire_bus(sc->sc_tag, 0);
sc 204 dev/i2c/adm1025.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 205 dev/i2c/adm1025.c sc->sc_addr, &cmd, sizeof cmd, &sdata, sizeof sdata, 0) == 0)
sc 206 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_INT].value = 273150000 + 1000000 * sdata;
sc 209 dev/i2c/adm1025.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 210 dev/i2c/adm1025.c sc->sc_addr, &cmd, sizeof cmd, &sdata, sizeof sdata, 0) == 0)
sc 211 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_EXT].value = 273150000 + 1000000 * sdata;
sc 214 dev/i2c/adm1025.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 215 dev/i2c/adm1025.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0) {
sc 217 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_EXT].flags |= SENSOR_FINVALID;
sc 219 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_EXT].flags &= ~SENSOR_FINVALID;
sc 223 dev/i2c/adm1025.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 224 dev/i2c/adm1025.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 225 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_V2_5].value = 2500000 * data / 192;
sc 228 dev/i2c/adm1025.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 229 dev/i2c/adm1025.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 230 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_Vcc].value = 2249000 * data / 192;
sc 233 dev/i2c/adm1025.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 234 dev/i2c/adm1025.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 235 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_V3_3].value = 3300000 * data / 192;
sc 238 dev/i2c/adm1025.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 239 dev/i2c/adm1025.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 240 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_V5].value = 5000000 * data / 192;
sc 243 dev/i2c/adm1025.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 244 dev/i2c/adm1025.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 245 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_V12].value = 12000000 * data / 192;
sc 248 dev/i2c/adm1025.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 249 dev/i2c/adm1025.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 250 dev/i2c/adm1025.c sc->sc_sensor[ADMTM_Vcc].value = 3300000 * data / 192;
sc 252 dev/i2c/adm1025.c if (sc->sc_model == 192) {
sc 254 dev/i2c/adm1025.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 255 dev/i2c/adm1025.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 256 dev/i2c/adm1025.c sc->sc_sensor[SMSC_V1_5].value = 1500000 * data / 192;
sc 259 dev/i2c/adm1025.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 260 dev/i2c/adm1025.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 261 dev/i2c/adm1025.c sc->sc_sensor[SMSC_V1_8].value = 1800000 * data / 192;
sc 264 dev/i2c/adm1025.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 265 dev/i2c/adm1025.c sc->sc_addr, &cmd, sizeof cmd, &sdata, sizeof sdata,
sc 267 dev/i2c/adm1025.c sc->sc_sensor[SMSC_TEMP2].value = 273150000 + 1000000 * sdata;
sc 271 dev/i2c/adm1025.c iic_release_bus(sc->sc_tag, 0);
sc 111 dev/i2c/adm1026.c struct admcts_softc *sc = (struct admcts_softc *)self;
sc 116 dev/i2c/adm1026.c sc->sc_tag = ia->ia_tag;
sc 117 dev/i2c/adm1026.c sc->sc_addr = ia->ia_addr;
sc 119 dev/i2c/adm1026.c iic_acquire_bus(sc->sc_tag, 0);
sc 121 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 122 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 123 dev/i2c/adm1026.c iic_release_bus(sc->sc_tag, 0);
sc 130 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 131 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data2, sizeof data2, 0)) {
sc 132 dev/i2c/adm1026.c iic_release_bus(sc->sc_tag, 0);
sc 139 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 140 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 141 dev/i2c/adm1026.c iic_release_bus(sc->sc_tag, 0);
sc 145 dev/i2c/adm1026.c sc->sc_fanmul[0] = (1 << (data >> 0) & 0x3);
sc 146 dev/i2c/adm1026.c sc->sc_fanmul[1] = (1 << (data >> 2) & 0x3);
sc 147 dev/i2c/adm1026.c sc->sc_fanmul[2] = (1 << (data >> 4) & 0x3);
sc 148 dev/i2c/adm1026.c sc->sc_fanmul[3] = (1 << (data >> 6) & 0x3);
sc 151 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 152 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 153 dev/i2c/adm1026.c iic_release_bus(sc->sc_tag, 0);
sc 157 dev/i2c/adm1026.c sc->sc_fanmul[4] = (1 << (data >> 0) & 0x3);
sc 158 dev/i2c/adm1026.c sc->sc_fanmul[5] = (1 << (data >> 2) & 0x3);
sc 159 dev/i2c/adm1026.c sc->sc_fanmul[6] = (1 << (data >> 4) & 0x3);
sc 160 dev/i2c/adm1026.c sc->sc_fanmul[7] = (1 << (data >> 6) & 0x3);
sc 162 dev/i2c/adm1026.c iic_release_bus(sc->sc_tag, 0);
sc 165 dev/i2c/adm1026.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 166 dev/i2c/adm1026.c sizeof(sc->sc_sensordev.xname));
sc 168 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_TEMP].type = SENSOR_TEMP;
sc 169 dev/i2c/adm1026.c strlcpy(sc->sc_sensor[ADMCTS_TEMP].desc, "Internal",
sc 170 dev/i2c/adm1026.c sizeof(sc->sc_sensor[ADMCTS_TEMP].desc));
sc 172 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_Vbat].type = SENSOR_VOLTS_DC;
sc 173 dev/i2c/adm1026.c strlcpy(sc->sc_sensor[ADMCTS_Vbat].desc, "Vbat",
sc 174 dev/i2c/adm1026.c sizeof(sc->sc_sensor[ADMCTS_Vbat].desc));
sc 176 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_EXT1].type = SENSOR_TEMP;
sc 177 dev/i2c/adm1026.c strlcpy(sc->sc_sensor[ADMCTS_EXT1].desc, "External",
sc 178 dev/i2c/adm1026.c sizeof(sc->sc_sensor[ADMCTS_EXT1].desc));
sc 180 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_EXT2].type = SENSOR_TEMP;
sc 181 dev/i2c/adm1026.c strlcpy(sc->sc_sensor[ADMCTS_EXT2].desc, "External",
sc 182 dev/i2c/adm1026.c sizeof(sc->sc_sensor[ADMCTS_EXT2].desc));
sc 184 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_V3_3stby].type = SENSOR_VOLTS_DC;
sc 185 dev/i2c/adm1026.c strlcpy(sc->sc_sensor[ADMCTS_V3_3stby].desc, "3.3 V standby",
sc 186 dev/i2c/adm1026.c sizeof(sc->sc_sensor[ADMCTS_V3_3stby].desc));
sc 188 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_V3_3main].type = SENSOR_VOLTS_DC;
sc 189 dev/i2c/adm1026.c strlcpy(sc->sc_sensor[ADMCTS_V3_3main].desc, "3.3 V main",
sc 190 dev/i2c/adm1026.c sizeof(sc->sc_sensor[ADMCTS_V3_3main].desc));
sc 192 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_V5].type = SENSOR_VOLTS_DC;
sc 193 dev/i2c/adm1026.c strlcpy(sc->sc_sensor[ADMCTS_V5].desc, "5 V",
sc 194 dev/i2c/adm1026.c sizeof(sc->sc_sensor[ADMCTS_V5].desc));
sc 196 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_Vccp].type = SENSOR_VOLTS_DC;
sc 197 dev/i2c/adm1026.c strlcpy(sc->sc_sensor[ADMCTS_Vccp].desc, "Vccp",
sc 198 dev/i2c/adm1026.c sizeof(sc->sc_sensor[ADMCTS_Vccp].desc));
sc 200 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_V12].type = SENSOR_VOLTS_DC;
sc 201 dev/i2c/adm1026.c strlcpy(sc->sc_sensor[ADMCTS_V12].desc, "12 V",
sc 202 dev/i2c/adm1026.c sizeof(sc->sc_sensor[ADMCTS_V12].desc));
sc 204 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_Vminus12].type = SENSOR_VOLTS_DC;
sc 205 dev/i2c/adm1026.c strlcpy(sc->sc_sensor[ADMCTS_Vminus12].desc, "-12 V",
sc 206 dev/i2c/adm1026.c sizeof(sc->sc_sensor[ADMCTS_Vminus12].desc));
sc 208 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_FAN1].type = SENSOR_FANRPM;
sc 209 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_FAN2].type = SENSOR_FANRPM;
sc 210 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_FAN3].type = SENSOR_FANRPM;
sc 211 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_FAN4].type = SENSOR_FANRPM;
sc 212 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_FAN5].type = SENSOR_FANRPM;
sc 213 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_FAN6].type = SENSOR_FANRPM;
sc 214 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_FAN7].type = SENSOR_FANRPM;
sc 216 dev/i2c/adm1026.c if (sensor_task_register(sc, admcts_refresh, 5) == NULL) {
sc 222 dev/i2c/adm1026.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 223 dev/i2c/adm1026.c sensordev_install(&sc->sc_sensordev);
sc 242 dev/i2c/adm1026.c struct admcts_softc *sc = arg;
sc 246 dev/i2c/adm1026.c iic_acquire_bus(sc->sc_tag, 0);
sc 249 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 250 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &sdata, sizeof sdata, 0) == 0)
sc 251 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_TEMP].value = 273150000 + 1000000 * sdata;
sc 254 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 255 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &sdata, sizeof sdata, 0) == 0)
sc 256 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_EXT1].value = 273150000 + 1000000 * sdata;
sc 259 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 260 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &sdata, sizeof sdata, 0) == 0)
sc 261 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_EXT2].value = 273150000 + 1000000 * sdata;
sc 264 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 265 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 266 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_Vbat].value = 3000000 * data / 192;
sc 269 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 270 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 271 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_V3_3stby].value = 3300000 * data / 192;
sc 274 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 275 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 276 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_V3_3main].value = 3300000 * data / 192;
sc 279 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 280 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 281 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_V5].value = 5500000 * data / 192;
sc 284 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 285 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 286 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_Vccp].value = 2250000 * data / 192;
sc 289 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 290 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 291 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_V12].value = 12000000 * data / 192;
sc 294 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 295 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 296 dev/i2c/adm1026.c sc->sc_sensor[ADMCTS_Vminus12].value = -2125000 * data / 192;
sc 299 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 300 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 301 dev/i2c/adm1026.c fanval(&sc->sc_sensor[ADMCTS_FAN0], sc->sc_fanmul[0], data);
sc 304 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 305 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 306 dev/i2c/adm1026.c fanval(&sc->sc_sensor[ADMCTS_FAN1], sc->sc_fanmul[1], data);
sc 309 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 310 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 311 dev/i2c/adm1026.c fanval(&sc->sc_sensor[ADMCTS_FAN2], sc->sc_fanmul[2], data);
sc 314 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 315 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 316 dev/i2c/adm1026.c fanval(&sc->sc_sensor[ADMCTS_FAN3], sc->sc_fanmul[3], data);
sc 319 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 320 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 321 dev/i2c/adm1026.c fanval(&sc->sc_sensor[ADMCTS_FAN4], sc->sc_fanmul[4], data);
sc 324 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 325 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 326 dev/i2c/adm1026.c fanval(&sc->sc_sensor[ADMCTS_FAN5], sc->sc_fanmul[5], data);
sc 329 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 330 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 331 dev/i2c/adm1026.c fanval(&sc->sc_sensor[ADMCTS_FAN6], sc->sc_fanmul[6], data);
sc 334 dev/i2c/adm1026.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 335 dev/i2c/adm1026.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 336 dev/i2c/adm1026.c fanval(&sc->sc_sensor[ADMCTS_FAN7], sc->sc_fanmul[7], data);
sc 338 dev/i2c/adm1026.c iic_release_bus(sc->sc_tag, 0);
sc 74 dev/i2c/adm1030.c struct admtmp_softc *sc = (struct admtmp_softc *)self;
sc 79 dev/i2c/adm1030.c sc->sc_tag = ia->ia_tag;
sc 80 dev/i2c/adm1030.c sc->sc_addr = ia->ia_addr;
sc 83 dev/i2c/adm1030.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 84 dev/i2c/adm1030.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 89 dev/i2c/adm1030.c sc->sc_fanmul = 11250/8 * (1 << ADM1024_FANC_VAL(data)) * 60;
sc 92 dev/i2c/adm1030.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 93 dev/i2c/adm1030.c sizeof(sc->sc_sensordev.xname));
sc 95 dev/i2c/adm1030.c sc->sc_sensor[ADMTMP_INT].type = SENSOR_TEMP;
sc 96 dev/i2c/adm1030.c strlcpy(sc->sc_sensor[ADMTMP_INT].desc, "Internal",
sc 97 dev/i2c/adm1030.c sizeof(sc->sc_sensor[ADMTMP_INT].desc));
sc 99 dev/i2c/adm1030.c sc->sc_sensor[ADMTMP_EXT].type = SENSOR_TEMP;
sc 100 dev/i2c/adm1030.c strlcpy(sc->sc_sensor[ADMTMP_EXT].desc, "External",
sc 101 dev/i2c/adm1030.c sizeof(sc->sc_sensor[ADMTMP_EXT].desc));
sc 103 dev/i2c/adm1030.c sc->sc_sensor[ADMTMP_FAN].type = SENSOR_FANRPM;
sc 105 dev/i2c/adm1030.c if (sensor_task_register(sc, admtmp_refresh, 5) == NULL) {
sc 111 dev/i2c/adm1030.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 112 dev/i2c/adm1030.c sensordev_install(&sc->sc_sensordev);
sc 120 dev/i2c/adm1030.c struct admtmp_softc *sc = arg;
sc 123 dev/i2c/adm1030.c iic_acquire_bus(sc->sc_tag, 0);
sc 126 dev/i2c/adm1030.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 127 dev/i2c/adm1030.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 128 dev/i2c/adm1030.c sc->sc_sensor[ADMTMP_INT].value = 273150000 + 1000000 * data;
sc 131 dev/i2c/adm1030.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 132 dev/i2c/adm1030.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 133 dev/i2c/adm1030.c sc->sc_sensor[ADMTMP_EXT].value = 273150000 + 1000000 * data;
sc 136 dev/i2c/adm1030.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 137 dev/i2c/adm1030.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0) {
sc 139 dev/i2c/adm1030.c sc->sc_sensor[ADMTMP_FAN].flags |= SENSOR_FINVALID;
sc 141 dev/i2c/adm1030.c sc->sc_sensor[ADMTMP_FAN].value =
sc 142 dev/i2c/adm1030.c sc->sc_fanmul / (2 * (int)data);
sc 143 dev/i2c/adm1030.c sc->sc_sensor[ADMTMP_FAN].flags &= ~SENSOR_FINVALID;
sc 147 dev/i2c/adm1030.c iic_release_bus(sc->sc_tag, 0);
sc 79 dev/i2c/adm1031.c struct admtt_softc *sc = (struct admtt_softc *)self;
sc 84 dev/i2c/adm1031.c sc->sc_tag = ia->ia_tag;
sc 85 dev/i2c/adm1031.c sc->sc_addr = ia->ia_addr;
sc 88 dev/i2c/adm1031.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 89 dev/i2c/adm1031.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 93 dev/i2c/adm1031.c sc->sc_fanmul = 11250/8 * (1 << ADM1024_FANC_VAL(data)) * 60;
sc 96 dev/i2c/adm1031.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 97 dev/i2c/adm1031.c sizeof(sc->sc_sensordev.xname));
sc 99 dev/i2c/adm1031.c sc->sc_sensor[ADMTT_INT].type = SENSOR_TEMP;
sc 100 dev/i2c/adm1031.c strlcpy(sc->sc_sensor[ADMTT_INT].desc, "Internal",
sc 101 dev/i2c/adm1031.c sizeof(sc->sc_sensor[ADMTT_INT].desc));
sc 103 dev/i2c/adm1031.c sc->sc_sensor[ADMTT_EXT].type = SENSOR_TEMP;
sc 104 dev/i2c/adm1031.c strlcpy(sc->sc_sensor[ADMTT_EXT].desc, "External",
sc 105 dev/i2c/adm1031.c sizeof(sc->sc_sensor[ADMTT_EXT].desc));
sc 107 dev/i2c/adm1031.c sc->sc_sensor[ADMTT_EXT2].type = SENSOR_TEMP;
sc 108 dev/i2c/adm1031.c strlcpy(sc->sc_sensor[ADMTT_EXT2].desc, "External",
sc 109 dev/i2c/adm1031.c sizeof(sc->sc_sensor[ADMTT_EXT2].desc));
sc 111 dev/i2c/adm1031.c sc->sc_sensor[ADMTT_FAN].type = SENSOR_FANRPM;
sc 113 dev/i2c/adm1031.c sc->sc_sensor[ADMTT_FAN2].type = SENSOR_FANRPM;
sc 115 dev/i2c/adm1031.c if (sensor_task_register(sc, admtt_refresh, 5) == NULL) {
sc 121 dev/i2c/adm1031.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 122 dev/i2c/adm1031.c sensordev_install(&sc->sc_sensordev);
sc 130 dev/i2c/adm1031.c struct admtt_softc *sc = arg;
sc 133 dev/i2c/adm1031.c iic_acquire_bus(sc->sc_tag, 0);
sc 136 dev/i2c/adm1031.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 137 dev/i2c/adm1031.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 138 dev/i2c/adm1031.c sc->sc_sensor[ADMTT_INT].value = 273150000 + 1000000 * data;
sc 141 dev/i2c/adm1031.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 142 dev/i2c/adm1031.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 143 dev/i2c/adm1031.c sc->sc_sensor[ADMTT_EXT].value = 273150000 + 1000000 * data;
sc 146 dev/i2c/adm1031.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 147 dev/i2c/adm1031.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 148 dev/i2c/adm1031.c sc->sc_sensor[ADMTT_EXT2].value = 273150000 + 1000000 * data;
sc 151 dev/i2c/adm1031.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 152 dev/i2c/adm1031.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0) {
sc 154 dev/i2c/adm1031.c sc->sc_sensor[ADMTT_FAN].flags |= SENSOR_FINVALID;
sc 156 dev/i2c/adm1031.c sc->sc_sensor[ADMTT_FAN].value =
sc 157 dev/i2c/adm1031.c sc->sc_fanmul / (2 * (int)data);
sc 158 dev/i2c/adm1031.c sc->sc_sensor[ADMTT_FAN].flags &= ~SENSOR_FINVALID;
sc 163 dev/i2c/adm1031.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 164 dev/i2c/adm1031.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0) {
sc 166 dev/i2c/adm1031.c sc->sc_sensor[ADMTT_FAN2].flags |= SENSOR_FINVALID;
sc 168 dev/i2c/adm1031.c sc->sc_sensor[ADMTT_FAN2].value =
sc 169 dev/i2c/adm1031.c sc->sc_fanmul / (2 * (int)data);
sc 170 dev/i2c/adm1031.c sc->sc_sensor[ADMTT_FAN2].flags &= ~SENSOR_FINVALID;
sc 174 dev/i2c/adm1031.c iic_release_bus(sc->sc_tag, 0);
sc 141 dev/i2c/adt7460.c struct adt_softc *sc = (struct adt_softc *)self;
sc 146 dev/i2c/adt7460.c sc->sc_tag = ia->ia_tag;
sc 147 dev/i2c/adt7460.c sc->sc_addr = ia->ia_addr;
sc 149 dev/i2c/adt7460.c iic_acquire_bus(sc->sc_tag, 0);
sc 153 dev/i2c/adt7460.c sc->chip = &adt_chips[i];
sc 159 dev/i2c/adt7460.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 160 dev/i2c/adt7460.c sc->sc_addr, &cmd, sizeof cmd, &rev, sizeof rev, 0)) {
sc 161 dev/i2c/adt7460.c iic_release_bus(sc->sc_tag, 0);
sc 167 dev/i2c/adt7460.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 168 dev/i2c/adt7460.c sc->sc_addr, &cmd, sizeof cmd, &sc->sc_conf, sizeof sc->sc_conf, 0)) {
sc 169 dev/i2c/adt7460.c iic_release_bus(sc->sc_tag, 0);
sc 174 dev/i2c/adt7460.c if (sc->chip->type == 7460) {
sc 177 dev/i2c/adt7460.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 178 dev/i2c/adt7460.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 179 dev/i2c/adt7460.c iic_release_bus(sc->sc_tag, 0);
sc 185 dev/i2c/adt7460.c iic_release_bus(sc->sc_tag, 0);
sc 190 dev/i2c/adt7460.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 191 dev/i2c/adt7460.c sizeof(sc->sc_sensordev.xname));
sc 193 dev/i2c/adt7460.c sc->sc_sensor[ADT_2_5V].type = SENSOR_VOLTS_DC;
sc 194 dev/i2c/adt7460.c strlcpy(sc->sc_sensor[ADT_2_5V].desc, "+2.5Vin",
sc 195 dev/i2c/adt7460.c sizeof(sc->sc_sensor[ADT_2_5V].desc));
sc 197 dev/i2c/adt7460.c if (sc->chip->type == 5017)
sc 198 dev/i2c/adt7460.c strlcpy(sc->sc_sensor[ADT_2_5V].desc, "+5VTR",
sc 199 dev/i2c/adt7460.c sizeof(sc->sc_sensor[ADT_2_5V].desc));
sc 201 dev/i2c/adt7460.c sc->sc_sensor[ADT_VCCP].type = SENSOR_VOLTS_DC;
sc 202 dev/i2c/adt7460.c strlcpy(sc->sc_sensor[ADT_VCCP].desc, "Vccp",
sc 203 dev/i2c/adt7460.c sizeof(sc->sc_sensor[ADT_VCCP].desc));
sc 205 dev/i2c/adt7460.c sc->sc_sensor[ADT_VCC].type = SENSOR_VOLTS_DC;
sc 206 dev/i2c/adt7460.c strlcpy(sc->sc_sensor[ADT_VCC].desc, "Vcc",
sc 207 dev/i2c/adt7460.c sizeof(sc->sc_sensor[ADT_VCC].desc));
sc 209 dev/i2c/adt7460.c sc->sc_sensor[ADT_V5].type = SENSOR_VOLTS_DC;
sc 210 dev/i2c/adt7460.c strlcpy(sc->sc_sensor[ADT_V5].desc, "+5V",
sc 211 dev/i2c/adt7460.c sizeof(sc->sc_sensor[ADT_V5].desc));
sc 213 dev/i2c/adt7460.c sc->sc_sensor[ADT_V12].type = SENSOR_VOLTS_DC;
sc 214 dev/i2c/adt7460.c strlcpy(sc->sc_sensor[ADT_V12].desc, "+12V",
sc 215 dev/i2c/adt7460.c sizeof(sc->sc_sensor[ADT_V12].desc));
sc 217 dev/i2c/adt7460.c sc->sc_sensor[ADT_REM1_TEMP].type = SENSOR_TEMP;
sc 218 dev/i2c/adt7460.c strlcpy(sc->sc_sensor[ADT_REM1_TEMP].desc, "Remote",
sc 219 dev/i2c/adt7460.c sizeof(sc->sc_sensor[ADT_REM1_TEMP].desc));
sc 221 dev/i2c/adt7460.c sc->sc_sensor[ADT_LOCAL_TEMP].type = SENSOR_TEMP;
sc 222 dev/i2c/adt7460.c strlcpy(sc->sc_sensor[ADT_LOCAL_TEMP].desc, "Internal",
sc 223 dev/i2c/adt7460.c sizeof(sc->sc_sensor[ADT_LOCAL_TEMP].desc));
sc 225 dev/i2c/adt7460.c sc->sc_sensor[ADT_REM2_TEMP].type = SENSOR_TEMP;
sc 226 dev/i2c/adt7460.c strlcpy(sc->sc_sensor[ADT_REM2_TEMP].desc, "Remote",
sc 227 dev/i2c/adt7460.c sizeof(sc->sc_sensor[ADT_REM2_TEMP].desc));
sc 229 dev/i2c/adt7460.c sc->sc_sensor[ADT_TACH1].type = SENSOR_FANRPM;
sc 230 dev/i2c/adt7460.c sc->sc_sensor[ADT_TACH2].type = SENSOR_FANRPM;
sc 231 dev/i2c/adt7460.c sc->sc_sensor[ADT_TACH3].type = SENSOR_FANRPM;
sc 232 dev/i2c/adt7460.c sc->sc_sensor[ADT_TACH4].type = SENSOR_FANRPM;
sc 234 dev/i2c/adt7460.c if (sensor_task_register(sc, adt_refresh, 5) == NULL) {
sc 241 dev/i2c/adt7460.c sc->chip->ratio[worklist[i].index - 32768] == 0)
sc 243 dev/i2c/adt7460.c sc->sc_sensor[i].flags &= ~SENSOR_FINVALID;
sc 244 dev/i2c/adt7460.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 246 dev/i2c/adt7460.c sensordev_install(&sc->sc_sensordev);
sc 255 dev/i2c/adt7460.c struct adt_softc *sc = arg;
sc 260 dev/i2c/adt7460.c iic_acquire_bus(sc->sc_tag, 0);
sc 265 dev/i2c/adt7460.c ratio = sc->chip->ratio[worklist[i].index - 32768];
sc 270 dev/i2c/adt7460.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 271 dev/i2c/adt7460.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 272 dev/i2c/adt7460.c sc->sc_sensor[i].flags |= SENSOR_FINVALID;
sc 276 dev/i2c/adt7460.c sc->sc_sensor[i].flags &= ~SENSOR_FINVALID;
sc 279 dev/i2c/adt7460.c if (sc->chip->vcc && (sc->sc_conf & ADT7460_CONFIG_Vcc))
sc 280 dev/i2c/adt7460.c ratio = sc->chip->vcc;
sc 286 dev/i2c/adt7460.c sc->sc_sensor[i].value = ratio * 1000 * (u_int)data / 192;
sc 292 dev/i2c/adt7460.c sc->sc_sensor[i].flags |= SENSOR_FINVALID;
sc 294 dev/i2c/adt7460.c sc->sc_sensor[i].value =
sc 302 dev/i2c/adt7460.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 303 dev/i2c/adt7460.c sc->sc_addr, &cmd, sizeof cmd, &data2, sizeof data2, 0)) {
sc 304 dev/i2c/adt7460.c sc->sc_sensor[i].flags |= SENSOR_FINVALID;
sc 310 dev/i2c/adt7460.c sc->sc_sensor[i].flags |= SENSOR_FINVALID;
sc 312 dev/i2c/adt7460.c sc->sc_sensor[i].value = (90000 * 60) / fan;
sc 315 dev/i2c/adt7460.c sc->sc_sensor[i].flags |= SENSOR_FINVALID;
sc 320 dev/i2c/adt7460.c iic_release_bus(sc->sc_tag, 0);
sc 140 dev/i2c/asb100.c asbtm_banksel(struct asbtm_softc *sc, u_int8_t new_bank, u_int8_t *orig_bank)
sc 147 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 157 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_addr,
sc 168 dev/i2c/asb100.c struct asbtm_softc *sc = (struct asbtm_softc *)self;
sc 173 dev/i2c/asb100.c sc->sc_tag = ia->ia_tag;
sc 174 dev/i2c/asb100.c sc->sc_addr = ia->ia_addr;
sc 176 dev/i2c/asb100.c iic_acquire_bus(sc->sc_tag, 0);
sc 178 dev/i2c/asb100.c if (asbtm_banksel(sc, 0, &orig_bank) == -1) {
sc 180 dev/i2c/asb100.c iic_release_bus(sc->sc_tag, 0);
sc 185 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 188 dev/i2c/asb100.c iic_release_bus(sc->sc_tag, 0);
sc 191 dev/i2c/asb100.c sc->sc_fanmul[0] = (1 << (data >> 4) & 0x3);
sc 192 dev/i2c/asb100.c sc->sc_fanmul[1] = (1 << (data >> 6) & 0x3);
sc 195 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 198 dev/i2c/asb100.c iic_release_bus(sc->sc_tag, 0);
sc 201 dev/i2c/asb100.c sc->sc_fanmul[0] = (1 << (data >> 6) & 0x3);
sc 204 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 207 dev/i2c/asb100.c iic_release_bus(sc->sc_tag, 0);
sc 211 dev/i2c/asb100.c sc->sc_satellite[0] = 0x48 + (data & 0xf);
sc 212 dev/i2c/asb100.c sc->sc_satellite[1] = 0x48 + ((data >> 4) & 0xf);
sc 214 dev/i2c/asb100.c iic_ignore_addr(sc->sc_satellite[0]);
sc 215 dev/i2c/asb100.c iic_ignore_addr(sc->sc_satellite[1]);
sc 216 dev/i2c/asb100.c if (sc->sc_satellite[0] == sc->sc_satellite[1])
sc 217 dev/i2c/asb100.c sc->sc_satellite[1] = -1;
sc 219 dev/i2c/asb100.c if (asbtm_banksel(sc, orig_bank, NULL) == -1) {
sc 221 dev/i2c/asb100.c iic_release_bus(sc->sc_tag, 0);
sc 225 dev/i2c/asb100.c iic_release_bus(sc->sc_tag, 0);
sc 228 dev/i2c/asb100.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 229 dev/i2c/asb100.c sizeof(sc->sc_sensordev.xname));
sc 231 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_VIN0].type = SENSOR_VOLTS_DC;
sc 232 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_VIN1].type = SENSOR_VOLTS_DC;
sc 233 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_VIN2].type = SENSOR_VOLTS_DC;
sc 234 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_VIN3].type = SENSOR_VOLTS_DC;
sc 235 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_VIN4].type = SENSOR_VOLTS_DC;
sc 236 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_VIN5].type = SENSOR_VOLTS_DC;
sc 237 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_VIN6].type = SENSOR_VOLTS_DC;
sc 239 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_FAN0].type = SENSOR_FANRPM;
sc 240 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_FAN1].type = SENSOR_FANRPM;
sc 241 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_FAN2].type = SENSOR_FANRPM;
sc 243 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_TEMP0].type = SENSOR_TEMP;
sc 244 dev/i2c/asb100.c strlcpy(sc->sc_sensor[ASB100_SENSOR_TEMP0].desc, "External",
sc 245 dev/i2c/asb100.c sizeof(sc->sc_sensor[ASB100_SENSOR_TEMP0].desc));
sc 247 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_TEMP1].type = SENSOR_TEMP;
sc 248 dev/i2c/asb100.c strlcpy(sc->sc_sensor[ASB100_SENSOR_TEMP1].desc, "Internal",
sc 249 dev/i2c/asb100.c sizeof(sc->sc_sensor[ASB100_SENSOR_TEMP1].desc));
sc 251 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_TEMP2].type = SENSOR_TEMP;
sc 252 dev/i2c/asb100.c strlcpy(sc->sc_sensor[ASB100_SENSOR_TEMP2].desc, "Internal",
sc 253 dev/i2c/asb100.c sizeof(sc->sc_sensor[ASB100_SENSOR_TEMP2].desc));
sc 254 dev/i2c/asb100.c if (sc->sc_satellite[1] == -1)
sc 255 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_TEMP2].flags |= SENSOR_FINVALID;
sc 257 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_TEMP3].type = SENSOR_TEMP;
sc 258 dev/i2c/asb100.c strlcpy(sc->sc_sensor[ASB100_SENSOR_TEMP3].desc, "External",
sc 259 dev/i2c/asb100.c sizeof(sc->sc_sensor[ASB100_SENSOR_TEMP3].desc));
sc 261 dev/i2c/asb100.c if (sensor_task_register(sc, asbtm_refresh, 5) == NULL) {
sc 267 dev/i2c/asb100.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 268 dev/i2c/asb100.c sensordev_install(&sc->sc_sensordev);
sc 289 dev/i2c/asb100.c struct asbtm_softc *sc = arg;
sc 294 dev/i2c/asb100.c iic_acquire_bus(sc->sc_tag, 0);
sc 296 dev/i2c/asb100.c if (asbtm_banksel(sc, 0, &orig_bank) == -1) {
sc 298 dev/i2c/asb100.c sc->sc_dev.dv_xname);
sc 299 dev/i2c/asb100.c iic_release_bus(sc->sc_tag, 0);
sc 304 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 306 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_VIN0].value = (data * 1000000) / 16;
sc 309 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 311 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_VIN1].value = (data * 1000000) / 16;
sc 314 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 316 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_VIN2].value = (data * 1000000) / 16;
sc 319 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 321 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_VIN3].value = (data * 1000000) / 16;
sc 324 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 326 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_VIN4].value = (data * 1000000) / 16;
sc 329 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 331 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_VIN5].value = (data * 1000000) / 16;
sc 334 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 336 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_VIN6].value = (data * 1000000) / 16;
sc 339 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 341 dev/i2c/asb100.c fanval(&sc->sc_sensor[ASB100_SENSOR_FAN0],
sc 342 dev/i2c/asb100.c sc->sc_fanmul[0], data);
sc 345 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 347 dev/i2c/asb100.c fanval(&sc->sc_sensor[ASB100_SENSOR_FAN1],
sc 348 dev/i2c/asb100.c sc->sc_fanmul[1], data);
sc 351 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 353 dev/i2c/asb100.c fanval(&sc->sc_sensor[ASB100_SENSOR_FAN2],
sc 354 dev/i2c/asb100.c sc->sc_fanmul[2], data);
sc 357 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 359 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_TEMP0].value = 273150000 +
sc 363 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 365 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_TEMP3].value = 273150000 +
sc 370 dev/i2c/asb100.c if (sc->sc_satellite[0] != -1) {
sc 371 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 372 dev/i2c/asb100.c sc->sc_satellite[0], &cmd, sizeof cmd, &sdata2,
sc 374 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_TEMP1].value = 273150000 +
sc 376 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_TEMP2].flags &=
sc 379 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_TEMP2].flags |=
sc 385 dev/i2c/asb100.c if (sc->sc_satellite[1] != -1) {
sc 386 dev/i2c/asb100.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 387 dev/i2c/asb100.c sc->sc_satellite[1], &cmd, sizeof cmd, &sdata2,
sc 389 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_TEMP2].value = 273150000 +
sc 391 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_TEMP2].flags &=
sc 394 dev/i2c/asb100.c sc->sc_sensor[ASB100_SENSOR_TEMP2].flags |=
sc 399 dev/i2c/asb100.c asbtm_banksel(sc, orig_bank, NULL);
sc 401 dev/i2c/asb100.c iic_release_bus(sc->sc_tag, 0);
sc 74 dev/i2c/ds1631.c struct maxds_softc *sc = (struct maxds_softc *)self;
sc 81 dev/i2c/ds1631.c sc->sc_tag = ia->ia_tag;
sc 82 dev/i2c/ds1631.c sc->sc_addr = ia->ia_addr;
sc 84 dev/i2c/ds1631.c iic_acquire_bus(sc->sc_tag, 0);
sc 87 dev/i2c/ds1631.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 88 dev/i2c/ds1631.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0) {
sc 96 dev/i2c/ds1631.c (void) iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 97 dev/i2c/ds1631.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0);
sc 107 dev/i2c/ds1631.c (void) iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 108 dev/i2c/ds1631.c sc->sc_addr, &cmd, sizeof cmd, NULL, 0, 0);
sc 113 dev/i2c/ds1631.c iic_release_bus(sc->sc_tag, 0);
sc 116 dev/i2c/ds1631.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 117 dev/i2c/ds1631.c sizeof(sc->sc_sensordev.xname));
sc 119 dev/i2c/ds1631.c sc->sc_sensor[MAXDS_TEMP].type = SENSOR_TEMP;
sc 120 dev/i2c/ds1631.c strlcpy(sc->sc_sensor[MAXDS_TEMP].desc, "Internal",
sc 121 dev/i2c/ds1631.c sizeof(sc->sc_sensor[MAXDS_TEMP].desc));
sc 123 dev/i2c/ds1631.c if (sensor_task_register(sc, maxds_refresh, 5) == NULL) {
sc 129 dev/i2c/ds1631.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 130 dev/i2c/ds1631.c sensordev_install(&sc->sc_sensordev);
sc 138 dev/i2c/ds1631.c struct maxds_softc *sc = arg;
sc 141 dev/i2c/ds1631.c iic_acquire_bus(sc->sc_tag, 0);
sc 144 dev/i2c/ds1631.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 145 dev/i2c/ds1631.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0) == 0)
sc 146 dev/i2c/ds1631.c sc->sc_sensor[MAXDS_TEMP].value = 273150000 +
sc 149 dev/i2c/ds1631.c iic_release_bus(sc->sc_tag, 0);
sc 83 dev/i2c/fcu.c struct fcu_softc *sc = (struct fcu_softc *)self;
sc 87 dev/i2c/fcu.c sc->sc_tag = ia->ia_tag;
sc 88 dev/i2c/fcu.c sc->sc_addr = ia->ia_addr;
sc 91 dev/i2c/fcu.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 92 dev/i2c/fcu.c sizeof(sc->sc_sensordev.xname));
sc 94 dev/i2c/fcu.c sc->sc_sensor[i].type = SENSOR_FANRPM;
sc 96 dev/i2c/fcu.c sc->sc_sensor[FCU_PWM1 + i].type = SENSOR_PERCENT;
sc 97 dev/i2c/fcu.c strlcpy(sc->sc_sensor[FCU_PWM1 + i].desc, "PWM",
sc 98 dev/i2c/fcu.c sizeof(sc->sc_sensor[FCU_PWM1 + i].desc));
sc 101 dev/i2c/fcu.c if (sensor_task_register(sc, fcu_refresh, 5) == NULL) {
sc 107 dev/i2c/fcu.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 108 dev/i2c/fcu.c sensordev_install(&sc->sc_sensordev);
sc 116 dev/i2c/fcu.c struct fcu_softc *sc = arg;
sc 120 dev/i2c/fcu.c iic_acquire_bus(sc->sc_tag, 0);
sc 123 dev/i2c/fcu.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 124 dev/i2c/fcu.c sc->sc_addr, &cmd, sizeof cmd, &fail, sizeof fail, 0))
sc 127 dev/i2c/fcu.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 128 dev/i2c/fcu.c sc->sc_addr, &cmd, sizeof cmd, &active, sizeof active, 0))
sc 134 dev/i2c/fcu.c sc->sc_sensor[i].flags |= SENSOR_FINVALID;
sc 136 dev/i2c/fcu.c sc->sc_sensor[i].flags &= ~SENSOR_FINVALID;
sc 140 dev/i2c/fcu.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 141 dev/i2c/fcu.c sc->sc_addr, &cmd, sizeof cmd, &fail, sizeof fail, 0))
sc 144 dev/i2c/fcu.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 145 dev/i2c/fcu.c sc->sc_addr, &cmd, sizeof cmd, &active, sizeof active, 0))
sc 151 dev/i2c/fcu.c sc->sc_sensor[FCU_PWMS + i].flags |= SENSOR_FINVALID;
sc 153 dev/i2c/fcu.c sc->sc_sensor[FCU_PWMS + i].flags &= ~SENSOR_FINVALID;
sc 158 dev/i2c/fcu.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 159 dev/i2c/fcu.c sc->sc_addr, &cmd, sizeof cmd, &fan, sizeof fan, 0)) {
sc 160 dev/i2c/fcu.c sc->sc_sensor[FCU_RPM1 + i].flags |= SENSOR_FINVALID;
sc 163 dev/i2c/fcu.c sc->sc_sensor[FCU_RPM1 + i].value = (fan[0] << 5) | (fan[1] >> 3);
sc 168 dev/i2c/fcu.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 169 dev/i2c/fcu.c sc->sc_addr, &cmd, sizeof cmd, &fan, sizeof fan, 0)) {
sc 170 dev/i2c/fcu.c sc->sc_sensor[FCU_PWM1 + i].flags |= SENSOR_FINVALID;
sc 173 dev/i2c/fcu.c sc->sc_sensor[FCU_PWM1 + i].value = (fan[0] * 100 * 1000) / 255;
sc 177 dev/i2c/fcu.c iic_release_bus(sc->sc_tag, 0);
sc 49 dev/i2c/fintek.c int fintek_read_reg(struct fintek_softc *sc, u_int8_t cmd, u_int8_t *data,
sc 51 dev/i2c/fintek.c int fintek_write_reg(struct fintek_softc *sc, u_int8_t cmd, u_int8_t *data,
sc 53 dev/i2c/fintek.c void fintek_fullspeed(struct fintek_softc *sc);
sc 95 dev/i2c/fintek.c fintek_read_reg(struct fintek_softc *sc, u_int8_t cmd, u_int8_t *data,
sc 98 dev/i2c/fintek.c return iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 99 dev/i2c/fintek.c sc->sc_addr, &cmd, sizeof cmd, data, size, 0);
sc 103 dev/i2c/fintek.c fintek_write_reg(struct fintek_softc *sc, u_int8_t cmd, u_int8_t *data,
sc 106 dev/i2c/fintek.c return iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 107 dev/i2c/fintek.c sc->sc_addr, &cmd, sizeof cmd, data, size, 0);
sc 113 dev/i2c/fintek.c struct fintek_softc *sc = (struct fintek_softc *)self;
sc 118 dev/i2c/fintek.c sc->sc_tag = ia->ia_tag;
sc 119 dev/i2c/fintek.c sc->sc_addr = ia->ia_addr;
sc 121 dev/i2c/fintek.c iic_acquire_bus(sc->sc_tag, 0);
sc 124 dev/i2c/fintek.c if (fintek_read_reg(sc, cmd, &data, sizeof data))
sc 136 dev/i2c/fintek.c if (sc->sc_dev.dv_cfdata->cf_flags & FINTEK_OPTION_FULLSPEED)
sc 137 dev/i2c/fintek.c fintek_fullspeed(sc);
sc 139 dev/i2c/fintek.c iic_release_bus(sc->sc_tag, 0);
sc 141 dev/i2c/fintek.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 142 dev/i2c/fintek.c sizeof(sc->sc_sensordev.xname));
sc 144 dev/i2c/fintek.c sc->sc_sensor[F_VCC].type = SENSOR_VOLTS_DC;
sc 145 dev/i2c/fintek.c strlcpy(sc->sc_sensor[F_VCC].desc, "Vcc",
sc 146 dev/i2c/fintek.c sizeof(sc->sc_sensor[F_VCC].desc));
sc 148 dev/i2c/fintek.c sc->sc_sensor[F_V1].type = SENSOR_VOLTS_DC;
sc 149 dev/i2c/fintek.c sc->sc_sensor[F_V2].type = SENSOR_VOLTS_DC;
sc 150 dev/i2c/fintek.c sc->sc_sensor[F_V3].type = SENSOR_VOLTS_DC;
sc 152 dev/i2c/fintek.c sc->sc_sensor[F_TEMP1].type = SENSOR_TEMP;
sc 153 dev/i2c/fintek.c sc->sc_sensor[F_TEMP2].type = SENSOR_TEMP;
sc 155 dev/i2c/fintek.c sc->sc_sensor[F_FAN1].type = SENSOR_FANRPM;
sc 156 dev/i2c/fintek.c sc->sc_sensor[F_FAN2].type = SENSOR_FANRPM;
sc 158 dev/i2c/fintek.c if (sensor_task_register(sc, fintek_refresh, 5) == NULL) {
sc 164 dev/i2c/fintek.c sc->sc_sensor[i].flags &= ~SENSOR_FINVALID;
sc 165 dev/i2c/fintek.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 167 dev/i2c/fintek.c sensordev_install(&sc->sc_sensordev);
sc 174 dev/i2c/fintek.c iic_release_bus(sc->sc_tag, 0);
sc 197 dev/i2c/fintek.c struct fintek_softc *sc = arg;
sc 201 dev/i2c/fintek.c iic_acquire_bus(sc->sc_tag, 0);
sc 205 dev/i2c/fintek.c if (fintek_read_reg(sc, cmd, &data, sizeof data)) {
sc 206 dev/i2c/fintek.c sc->sc_sensor[i].flags |= SENSOR_FINVALID;
sc 209 dev/i2c/fintek.c sc->sc_sensor[i].flags &= ~SENSOR_FINVALID;
sc 212 dev/i2c/fintek.c sc->sc_sensor[i].value = data * 16000;
sc 219 dev/i2c/fintek.c sc->sc_sensor[i].value = data * 8000;
sc 224 dev/i2c/fintek.c sc->sc_sensor[i].value = 273150000 + data * 1000000;
sc 231 dev/i2c/fintek.c if (fintek_read_reg(sc, cmd, &data2, sizeof data2)) {
sc 232 dev/i2c/fintek.c sc->sc_sensor[i].flags |= SENSOR_FINVALID;
sc 237 dev/i2c/fintek.c sc->sc_sensor[i].value = 0;
sc 239 dev/i2c/fintek.c sc->sc_sensor[i].value = 1500000 /
sc 243 dev/i2c/fintek.c sc->sc_sensor[i].flags |= SENSOR_FINVALID;
sc 248 dev/i2c/fintek.c iic_release_bus(sc->sc_tag, 0);
sc 252 dev/i2c/fintek.c fintek_fullspeed(struct fintek_softc *sc)
sc 257 dev/i2c/fintek.c fintek_write_reg(sc, FINTEK_CONFIG1, &data, sizeof data);
sc 260 dev/i2c/fintek.c fintek_write_reg(sc, FINTEK_RSTCR, &data, sizeof data);
sc 263 dev/i2c/fintek.c fintek_write_reg(sc, FINTEK_PWM_DUTY1, &data, sizeof data);
sc 264 dev/i2c/fintek.c fintek_write_reg(sc, FINTEK_PWM_DUTY2, &data, sizeof data);
sc 93 dev/i2c/gl518sm.c struct glenv_softc *sc = (struct glenv_softc *)self;
sc 98 dev/i2c/gl518sm.c sc->sc_tag = ia->ia_tag;
sc 99 dev/i2c/gl518sm.c sc->sc_addr = ia->ia_addr;
sc 101 dev/i2c/gl518sm.c iic_acquire_bus(sc->sc_tag, 0);
sc 104 dev/i2c/gl518sm.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 105 dev/i2c/gl518sm.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 106 dev/i2c/gl518sm.c iic_release_bus(sc->sc_tag, 0);
sc 114 dev/i2c/gl518sm.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 115 dev/i2c/gl518sm.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 116 dev/i2c/gl518sm.c iic_release_bus(sc->sc_tag, 0);
sc 120 dev/i2c/gl518sm.c sc->sc_fan1_div = 1 << ((data >> 6) & 0x03);
sc 121 dev/i2c/gl518sm.c sc->sc_fan2_div = 1 << ((data >> 4) & 0x03);
sc 124 dev/i2c/gl518sm.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 125 dev/i2c/gl518sm.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 126 dev/i2c/gl518sm.c iic_release_bus(sc->sc_tag, 0);
sc 131 dev/i2c/gl518sm.c sc->sc_fan2_div = 0;
sc 135 dev/i2c/gl518sm.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 136 dev/i2c/gl518sm.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 137 dev/i2c/gl518sm.c iic_release_bus(sc->sc_tag, 0);
sc 142 dev/i2c/gl518sm.c iic_release_bus(sc->sc_tag, 0);
sc 145 dev/i2c/gl518sm.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 146 dev/i2c/gl518sm.c sizeof(sc->sc_sensordev.xname));
sc 148 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_VIN3].type = SENSOR_VOLTS_DC;
sc 150 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_TEMP].type = SENSOR_TEMP;
sc 152 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_FAN1].type = SENSOR_FANRPM;
sc 154 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_FAN2].type = SENSOR_FANRPM;
sc 155 dev/i2c/gl518sm.c if (sc->sc_fan2_div == -1)
sc 156 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_FAN2].flags |= SENSOR_FINVALID;
sc 158 dev/i2c/gl518sm.c if (sensor_task_register(sc, glenv_refresh, 5) == NULL) {
sc 164 dev/i2c/gl518sm.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 165 dev/i2c/gl518sm.c sensordev_install(&sc->sc_sensordev);
sc 173 dev/i2c/gl518sm.c struct glenv_softc *sc = arg;
sc 177 dev/i2c/gl518sm.c iic_acquire_bus(sc->sc_tag, 0);
sc 180 dev/i2c/gl518sm.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 181 dev/i2c/gl518sm.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 182 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_VIN3].flags |= SENSOR_FINVALID;
sc 184 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_VIN3].flags &= ~SENSOR_FINVALID;
sc 185 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_VIN3].value = data * 19000;
sc 189 dev/i2c/gl518sm.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 190 dev/i2c/gl518sm.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 191 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_TEMP].flags |= SENSOR_FINVALID;
sc 193 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_TEMP].flags &= ~SENSOR_FINVALID;
sc 194 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_TEMP].value =
sc 199 dev/i2c/gl518sm.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 200 dev/i2c/gl518sm.c sc->sc_addr, &cmd, sizeof cmd, &data2, sizeof data2, 0)) {
sc 201 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_FAN1].flags |= SENSOR_FINVALID;
sc 202 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_FAN2].flags |= SENSOR_FINVALID;
sc 204 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_FAN1].flags &= ~SENSOR_FINVALID;
sc 205 dev/i2c/gl518sm.c tmp = data2[0] * sc->sc_fan1_div * 2;
sc 207 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_FAN1].flags |= SENSOR_FINVALID;
sc 209 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_FAN1].value = 960000 / tmp;
sc 211 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_FAN2].flags &= ~SENSOR_FINVALID;
sc 212 dev/i2c/gl518sm.c tmp = data2[1] * sc->sc_fan2_div * 2;
sc 214 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_FAN2].flags |= SENSOR_FINVALID;
sc 216 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_FAN2].value = 960000 / tmp;
sc 219 dev/i2c/gl518sm.c iic_release_bus(sc->sc_tag, 0);
sc 98 dev/i2c/i2c.c struct iic_softc *sc = (void *) parent;
sc 104 dev/i2c/i2c.c ia.ia_tag = sc->sc_tag;
sc 128 dev/i2c/i2c.c struct iic_softc *sc = (void *) self;
sc 131 dev/i2c/i2c.c sc->sc_tag = iba->iba_tag;
sc 160 dev/i2c/lm75.c struct lmtemp_softc *sc = (struct lmtemp_softc *)self;
sc 164 dev/i2c/lm75.c sc->sc_tag = ia->ia_tag;
sc 165 dev/i2c/lm75.c sc->sc_addr = ia->ia_addr;
sc 170 dev/i2c/lm75.c iic_acquire_bus(sc->sc_tag, 0);
sc 172 dev/i2c/lm75.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 173 dev/i2c/lm75.c sc->sc_addr, &cmd, 1, &data, 1, 0)) {
sc 174 dev/i2c/lm75.c iic_release_bus(sc->sc_tag, 0);
sc 179 dev/i2c/lm75.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 180 dev/i2c/lm75.c sc->sc_addr, &cmd, 1, &data, 1, 0)) {
sc 182 dev/i2c/lm75.c iic_release_bus(sc->sc_tag, 0);
sc 187 dev/i2c/lm75.c iic_release_bus(sc->sc_tag, 0);
sc 189 dev/i2c/lm75.c sc->sc_model = LM_MODEL_LM75;
sc 190 dev/i2c/lm75.c sc->sc_bits = 9;
sc 192 dev/i2c/lm75.c sc->sc_model = LM_MODEL_LM77;
sc 193 dev/i2c/lm75.c sc->sc_bits = 13;
sc 195 dev/i2c/lm75.c sc->sc_model = LM_MODEL_DS1775;
sc 196 dev/i2c/lm75.c sc->sc_bits = 9;
sc 200 dev/i2c/lm75.c sc->sc_model = LM_MODEL_LM75A;
sc 201 dev/i2c/lm75.c sc->sc_bits = 9;
sc 207 dev/i2c/lm75.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 208 dev/i2c/lm75.c sizeof(sc->sc_sensordev.xname));
sc 209 dev/i2c/lm75.c sc->sc_sensor.type = SENSOR_TEMP;
sc 212 dev/i2c/lm75.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor);
sc 213 dev/i2c/lm75.c sensordev_install(&sc->sc_sensordev);
sc 216 dev/i2c/lm75.c sensor_task_register(sc, lmtemp_refresh_sensor_data, LM_POLLTIME);
sc 220 dev/i2c/lm75.c lmtemp_temp_read(struct lmtemp_softc *sc, uint8_t which, int *valp)
sc 226 dev/i2c/lm75.c error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 227 dev/i2c/lm75.c sc->sc_addr, &cmd, 1, buf, 2, 0);
sc 236 dev/i2c/lm75.c *valp = ((buf[0] << 8) | buf[1]) / (1 << (16 - sc->sc_bits));
sc 243 dev/i2c/lm75.c struct lmtemp_softc *sc = aux;
sc 247 dev/i2c/lm75.c error = lmtemp_temp_read(sc, LM75_REG_TEMP, &val);
sc 251 dev/i2c/lm75.c sc->sc_dev.dv_xname, error);
sc 253 dev/i2c/lm75.c sc->sc_sensor.flags |= SENSOR_FINVALID;
sc 257 dev/i2c/lm75.c sc->sc_sensor.value = val * 500000 + 273150000;
sc 258 dev/i2c/lm75.c sc->sc_sensor.flags &= ~SENSOR_FINVALID;
sc 73 dev/i2c/lm78_i2c.c struct lm_i2c_softc *sc = (struct lm_i2c_softc *)self;
sc 77 dev/i2c/lm78_i2c.c sc->sc_tag = ia->ia_tag;
sc 78 dev/i2c/lm78_i2c.c sc->sc_addr = ia->ia_addr;
sc 81 dev/i2c/lm78_i2c.c sc->sc_lmsc.lm_writereg = lm_i2c_writereg;
sc 82 dev/i2c/lm78_i2c.c sc->sc_lmsc.lm_readreg = lm_i2c_readreg;
sc 83 dev/i2c/lm78_i2c.c lm_attach(&sc->sc_lmsc);
sc 86 dev/i2c/lm78_i2c.c sc->sc_lmsc.sbusaddr = ia->ia_addr;
sc 88 dev/i2c/lm78_i2c.c iic_acquire_bus(sc->sc_tag, 0);
sc 91 dev/i2c/lm78_i2c.c iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 92 dev/i2c/lm78_i2c.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0);
sc 94 dev/i2c/lm78_i2c.c iic_release_bus(sc->sc_tag, 0);
sc 104 dev/i2c/lm78_i2c.c struct lm_i2c_softc *sc = (struct lm_i2c_softc *)self;
sc 106 dev/i2c/lm78_i2c.c return lm_detach(&sc->sc_lmsc);
sc 112 dev/i2c/lm78_i2c.c struct lm_i2c_softc *sc = (struct lm_i2c_softc *)lmsc;
sc 115 dev/i2c/lm78_i2c.c iic_acquire_bus(sc->sc_tag, 0);
sc 118 dev/i2c/lm78_i2c.c iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 119 dev/i2c/lm78_i2c.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0);
sc 121 dev/i2c/lm78_i2c.c iic_release_bus(sc->sc_tag, 0);
sc 129 dev/i2c/lm78_i2c.c struct lm_i2c_softc *sc = (struct lm_i2c_softc *)lmsc;
sc 132 dev/i2c/lm78_i2c.c iic_acquire_bus(sc->sc_tag, 0);
sc 136 dev/i2c/lm78_i2c.c iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 137 dev/i2c/lm78_i2c.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0);
sc 139 dev/i2c/lm78_i2c.c iic_release_bus(sc->sc_tag, 0);
sc 100 dev/i2c/lm87.c struct lmenv_softc *sc = (struct lmenv_softc *)self;
sc 105 dev/i2c/lm87.c sc->sc_tag = ia->ia_tag;
sc 106 dev/i2c/lm87.c sc->sc_addr = ia->ia_addr;
sc 108 dev/i2c/lm87.c sc->sc_family = 87;
sc 112 dev/i2c/lm87.c sc->sc_family = 81;
sc 114 dev/i2c/lm87.c iic_acquire_bus(sc->sc_tag, 0);
sc 117 dev/i2c/lm87.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 118 dev/i2c/lm87.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 119 dev/i2c/lm87.c iic_release_bus(sc->sc_tag, 0);
sc 126 dev/i2c/lm87.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 127 dev/i2c/lm87.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 128 dev/i2c/lm87.c iic_release_bus(sc->sc_tag, 0);
sc 132 dev/i2c/lm87.c sc->sc_fan1_div = 1 << ((data >> 4) & 0x03);
sc 133 dev/i2c/lm87.c sc->sc_fan2_div = 1 << ((data >> 6) & 0x03);
sc 135 dev/i2c/lm87.c if (sc->sc_family == 87) {
sc 137 dev/i2c/lm87.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 138 dev/i2c/lm87.c sc->sc_addr, &cmd, sizeof cmd, &channel,
sc 140 dev/i2c/lm87.c iic_release_bus(sc->sc_tag, 0);
sc 147 dev/i2c/lm87.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 148 dev/i2c/lm87.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 149 dev/i2c/lm87.c iic_release_bus(sc->sc_tag, 0);
sc 162 dev/i2c/lm87.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 163 dev/i2c/lm87.c sc->sc_addr, &cmd, sizeof cmd, &data2, sizeof data2, 0)) {
sc 164 dev/i2c/lm87.c iic_release_bus(sc->sc_tag, 0);
sc 170 dev/i2c/lm87.c iic_release_bus(sc->sc_tag, 0);
sc 173 dev/i2c/lm87.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 174 dev/i2c/lm87.c sizeof(sc->sc_sensordev.xname));
sc 176 dev/i2c/lm87.c sc->sc_sensor[LMENV_2_5V].type = SENSOR_VOLTS_DC;
sc 177 dev/i2c/lm87.c strlcpy(sc->sc_sensor[LMENV_2_5V].desc, "+2.5Vin",
sc 178 dev/i2c/lm87.c sizeof(sc->sc_sensor[LMENV_2_5V].desc));
sc 180 dev/i2c/lm87.c sc->sc_sensor[LMENV_VCCP1].type = SENSOR_VOLTS_DC;
sc 181 dev/i2c/lm87.c strlcpy(sc->sc_sensor[LMENV_VCCP1].desc, "Vccp",
sc 182 dev/i2c/lm87.c sizeof(sc->sc_sensor[LMENV_VCCP1].desc));
sc 184 dev/i2c/lm87.c sc->sc_sensor[LMENV_VCC].type = SENSOR_VOLTS_DC;
sc 185 dev/i2c/lm87.c strlcpy(sc->sc_sensor[LMENV_VCC].desc, "+Vcc",
sc 186 dev/i2c/lm87.c sizeof(sc->sc_sensor[LMENV_VCC].desc));
sc 188 dev/i2c/lm87.c sc->sc_sensor[LMENV_5V].type = SENSOR_VOLTS_DC;
sc 189 dev/i2c/lm87.c strlcpy(sc->sc_sensor[LMENV_5V].desc, "+5Vin/Vcc",
sc 190 dev/i2c/lm87.c sizeof(sc->sc_sensor[LMENV_5V].desc));
sc 192 dev/i2c/lm87.c sc->sc_sensor[LMENV_12V].type = SENSOR_VOLTS_DC;
sc 193 dev/i2c/lm87.c strlcpy(sc->sc_sensor[LMENV_12V].desc, "+12Vin",
sc 194 dev/i2c/lm87.c sizeof(sc->sc_sensor[LMENV_12V].desc));
sc 196 dev/i2c/lm87.c sc->sc_sensor[LMENV_VCCP2].type = SENSOR_VOLTS_DC;
sc 197 dev/i2c/lm87.c strlcpy(sc->sc_sensor[LMENV_VCCP2].desc, "Vccp",
sc 198 dev/i2c/lm87.c sizeof(sc->sc_sensor[LMENV_VCCP2].desc));
sc 200 dev/i2c/lm87.c sc->sc_sensor[LMENV_EXT_TEMP].type = SENSOR_TEMP;
sc 201 dev/i2c/lm87.c strlcpy(sc->sc_sensor[LMENV_EXT_TEMP].desc, "External",
sc 202 dev/i2c/lm87.c sizeof(sc->sc_sensor[LMENV_EXT_TEMP].desc));
sc 203 dev/i2c/lm87.c if (sc->sc_family == 81)
sc 204 dev/i2c/lm87.c sc->sc_sensor[LMENV_EXT_TEMP].flags |= SENSOR_FINVALID;
sc 206 dev/i2c/lm87.c sc->sc_sensor[LMENV_INT_TEMP].type = SENSOR_TEMP;
sc 207 dev/i2c/lm87.c strlcpy(sc->sc_sensor[LMENV_INT_TEMP].desc, "Internal",
sc 208 dev/i2c/lm87.c sizeof(sc->sc_sensor[LMENV_INT_TEMP].desc));
sc 211 dev/i2c/lm87.c sc->sc_sensor[LMENV_FAN1].type = SENSOR_VOLTS_DC;
sc 212 dev/i2c/lm87.c strlcpy(sc->sc_sensor[LMENV_FAN1].desc, "AIN1",
sc 213 dev/i2c/lm87.c sizeof(sc->sc_sensor[LMENV_FAN1].desc));
sc 215 dev/i2c/lm87.c sc->sc_sensor[LMENV_FAN1].type = SENSOR_FANRPM;
sc 219 dev/i2c/lm87.c sc->sc_sensor[LMENV_FAN2].type = SENSOR_VOLTS_DC;
sc 220 dev/i2c/lm87.c strlcpy(sc->sc_sensor[LMENV_FAN2].desc, "AIN2",
sc 221 dev/i2c/lm87.c sizeof(sc->sc_sensor[LMENV_FAN2].desc));
sc 223 dev/i2c/lm87.c sc->sc_sensor[LMENV_FAN2].type = SENSOR_FANRPM;
sc 226 dev/i2c/lm87.c if (sensor_task_register(sc, lmenv_refresh, 5) == NULL) {
sc 232 dev/i2c/lm87.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 233 dev/i2c/lm87.c sensordev_install(&sc->sc_sensordev);
sc 241 dev/i2c/lm87.c struct lmenv_softc *sc = arg;
sc 246 dev/i2c/lm87.c iic_acquire_bus(sc->sc_tag, 0);
sc 250 dev/i2c/lm87.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 251 dev/i2c/lm87.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 252 dev/i2c/lm87.c sc->sc_sensor[sensor].flags |= SENSOR_FINVALID;
sc 256 dev/i2c/lm87.c sc->sc_sensor[sensor].flags &= ~SENSOR_FINVALID;
sc 259 dev/i2c/lm87.c sc->sc_sensor[sensor].value = 2500000 * data / 192;
sc 262 dev/i2c/lm87.c sc->sc_sensor[sensor].value = 5000000 * data / 192;
sc 265 dev/i2c/lm87.c sc->sc_sensor[sensor].value = 12000000 * data / 192;
sc 269 dev/i2c/lm87.c sc->sc_sensor[sensor].value = 2700000 * data / 192;
sc 272 dev/i2c/lm87.c sc->sc_sensor[sensor].value = 3300000 * data / 192;
sc 275 dev/i2c/lm87.c if (sc->sc_family == 81) {
sc 276 dev/i2c/lm87.c sc->sc_sensor[sensor].flags |= SENSOR_FINVALID;
sc 282 dev/i2c/lm87.c sc->sc_sensor[sensor].flags |= SENSOR_FINVALID;
sc 284 dev/i2c/lm87.c sc->sc_sensor[sensor].value =
sc 288 dev/i2c/lm87.c if (sc->sc_sensor[sensor].type == SENSOR_VOLTS_DC) {
sc 289 dev/i2c/lm87.c sc->sc_sensor[sensor].value =
sc 293 dev/i2c/lm87.c tmp = data * sc->sc_fan1_div;
sc 295 dev/i2c/lm87.c sc->sc_sensor[sensor].flags |= SENSOR_FINVALID;
sc 297 dev/i2c/lm87.c sc->sc_sensor[sensor].value = 1350000 / tmp;
sc 300 dev/i2c/lm87.c if (sc->sc_sensor[sensor].type == SENSOR_VOLTS_DC) {
sc 301 dev/i2c/lm87.c sc->sc_sensor[sensor].value =
sc 305 dev/i2c/lm87.c tmp = data * sc->sc_fan2_div;
sc 307 dev/i2c/lm87.c sc->sc_sensor[sensor].flags |= SENSOR_FINVALID;
sc 309 dev/i2c/lm87.c sc->sc_sensor[sensor].value = 1350000 / tmp;
sc 312 dev/i2c/lm87.c sc->sc_sensor[sensor].flags |= SENSOR_FINVALID;
sc 317 dev/i2c/lm87.c iic_release_bus(sc->sc_tag, 0);
sc 98 dev/i2c/maxim6690.c struct maxtmp_softc *sc = (struct maxtmp_softc *)self;
sc 102 dev/i2c/maxim6690.c sc->sc_tag = ia->ia_tag;
sc 103 dev/i2c/maxim6690.c sc->sc_addr = ia->ia_addr;
sc 106 dev/i2c/maxim6690.c sc->sc_temp_invalid[0] = MAX6642_TEMP_INVALID;
sc 107 dev/i2c/maxim6690.c sc->sc_temp_invalid[1] = MAX6642_TEMP_INVALID;
sc 108 dev/i2c/maxim6690.c sc->sc_temp2_mask = MAX6642_TEMP2_MASK;
sc 113 dev/i2c/maxim6690.c sc->sc_temp_invalid[0] = MAX6690_TEMP_INVALID;
sc 114 dev/i2c/maxim6690.c sc->sc_temp_invalid[1] = MAX6690_TEMP_INVALID2;
sc 115 dev/i2c/maxim6690.c sc->sc_temp2_mask = MAX6690_TEMP2_MASK;
sc 117 dev/i2c/maxim6690.c sc->sc_temp_invalid[0] = LM90_TEMP_INVALID;
sc 118 dev/i2c/maxim6690.c sc->sc_temp_invalid[1] = LM90_TEMP_INVALID;
sc 119 dev/i2c/maxim6690.c sc->sc_temp2_mask = LM90_TEMP2_MASK;
sc 124 dev/i2c/maxim6690.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 125 dev/i2c/maxim6690.c sizeof(sc->sc_sensordev.xname));
sc 127 dev/i2c/maxim6690.c sc->sc_sensor[MAXTMP_INT].type = SENSOR_TEMP;
sc 128 dev/i2c/maxim6690.c strlcpy(sc->sc_sensor[MAXTMP_INT].desc, "Internal",
sc 129 dev/i2c/maxim6690.c sizeof(sc->sc_sensor[MAXTMP_INT].desc));
sc 131 dev/i2c/maxim6690.c sc->sc_sensor[MAXTMP_EXT].type = SENSOR_TEMP;
sc 132 dev/i2c/maxim6690.c strlcpy(sc->sc_sensor[MAXTMP_EXT].desc, "External",
sc 133 dev/i2c/maxim6690.c sizeof(sc->sc_sensor[MAXTMP_EXT].desc));
sc 135 dev/i2c/maxim6690.c if (sensor_task_register(sc, maxtmp_refresh, 5) == NULL) {
sc 141 dev/i2c/maxim6690.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 142 dev/i2c/maxim6690.c sensordev_install(&sc->sc_sensordev);
sc 150 dev/i2c/maxim6690.c maxtmp_readport(struct maxtmp_softc *sc, u_int8_t cmd1, u_int8_t cmd2,
sc 155 dev/i2c/maxim6690.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 156 dev/i2c/maxim6690.c sc->sc_addr, &cmd1, sizeof cmd1, &data, sizeof data, 0))
sc 158 dev/i2c/maxim6690.c if (data == sc->sc_temp_invalid[0] || data == sc->sc_temp_invalid[1])
sc 160 dev/i2c/maxim6690.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 161 dev/i2c/maxim6690.c sc->sc_addr, &cmd2, sizeof cmd2, &data2, sizeof data2, 0))
sc 165 dev/i2c/maxim6690.c data2 &= sc->sc_temp2_mask;
sc 167 dev/i2c/maxim6690.c sc->sc_sensor[index].value = 273150000 +
sc 172 dev/i2c/maxim6690.c sc->sc_sensor[index].flags |= SENSOR_FINVALID;
sc 178 dev/i2c/maxim6690.c struct maxtmp_softc *sc = arg;
sc 180 dev/i2c/maxim6690.c iic_acquire_bus(sc->sc_tag, 0);
sc 182 dev/i2c/maxim6690.c maxtmp_readport(sc, MAX6690_INT_TEMP, MAX6690_INT_TEMP2, MAXTMP_INT);
sc 183 dev/i2c/maxim6690.c maxtmp_readport(sc, MAX6690_EXT_TEMP, MAX6690_EXT_TEMP2, MAXTMP_EXT);
sc 185 dev/i2c/maxim6690.c iic_release_bus(sc->sc_tag, 0);
sc 90 dev/i2c/pca9532.c struct pcaled_softc *sc = (void *)self;
sc 96 dev/i2c/pca9532.c sc->sc_tag = ia->ia_tag;
sc 97 dev/i2c/pca9532.c sc->sc_addr = ia->ia_addr;
sc 99 dev/i2c/pca9532.c iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
sc 102 dev/i2c/pca9532.c sc->sc_gpio_pin[i].pin_num = i;
sc 103 dev/i2c/pca9532.c sc->sc_gpio_pin[i].pin_caps = GPIO_PIN_INOUT;
sc 108 dev/i2c/pca9532.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 111 dev/i2c/pca9532.c sc->sc_gpio_pin[i].pin_state = (data >> (i & 3)) & 1;
sc 113 dev/i2c/pca9532.c sc->sc_gpio_gc.gp_cookie = sc;
sc 114 dev/i2c/pca9532.c sc->sc_gpio_gc.gp_pin_read = pcaled_gpio_pin_read;
sc 115 dev/i2c/pca9532.c sc->sc_gpio_gc.gp_pin_write = pcaled_gpio_pin_write;
sc 116 dev/i2c/pca9532.c sc->sc_gpio_gc.gp_pin_ctl = pcaled_gpio_pin_ctl;
sc 121 dev/i2c/pca9532.c gba.gba_gc = &sc->sc_gpio_gc;
sc 122 dev/i2c/pca9532.c gba.gba_pins = sc->sc_gpio_pin;
sc 125 dev/i2c/pca9532.c config_found(&sc->sc_dev, &gba, gpiobus_print);
sc 129 dev/i2c/pca9532.c iic_release_bus(sc->sc_tag, I2C_F_POLL);
sc 135 dev/i2c/pca9532.c struct pcaled_softc *sc = arg;
sc 136 dev/i2c/pca9532.c iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
sc 143 dev/i2c/pca9532.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 148 dev/i2c/pca9532.c iic_release_bus(sc->sc_tag, I2C_F_POLL);
sc 155 dev/i2c/pca9532.c struct pcaled_softc *sc = arg;
sc 165 dev/i2c/pca9532.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr,
sc 171 dev/i2c/pca9532.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_addr,
sc 176 dev/i2c/pca9532.c iic_release_bus(sc->sc_tag, I2C_F_POLL);
sc 86 dev/i2c/pca9554.c struct pcagpio_softc *sc = (struct pcagpio_softc *)self;
sc 92 dev/i2c/pca9554.c sc->sc_tag = ia->ia_tag;
sc 93 dev/i2c/pca9554.c sc->sc_addr = ia->ia_addr;
sc 96 dev/i2c/pca9554.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 97 dev/i2c/pca9554.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 101 dev/i2c/pca9554.c sc->sc_control = data;
sc 103 dev/i2c/pca9554.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 104 dev/i2c/pca9554.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 108 dev/i2c/pca9554.c sc->sc_polarity = data;
sc 110 dev/i2c/pca9554.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 111 dev/i2c/pca9554.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 117 dev/i2c/pca9554.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 118 dev/i2c/pca9554.c sizeof(sc->sc_sensordev.xname));
sc 121 dev/i2c/pca9554.c sc->sc_sensor[i].type = SENSOR_INDICATOR;
sc 122 dev/i2c/pca9554.c if ((sc->sc_control & (1 << i)) == 0) {
sc 123 dev/i2c/pca9554.c strlcpy(sc->sc_sensor[i].desc, "out",
sc 124 dev/i2c/pca9554.c sizeof(sc->sc_sensor[i].desc));
sc 127 dev/i2c/pca9554.c strlcpy(sc->sc_sensor[i].desc, "in",
sc 128 dev/i2c/pca9554.c sizeof(sc->sc_sensor[i].desc));
sc 132 dev/i2c/pca9554.c if (sensor_task_register(sc, pcagpio_refresh, 5) == NULL) {
sc 139 dev/i2c/pca9554.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor[i]);
sc 140 dev/i2c/pca9554.c sensordev_install(&sc->sc_sensordev);
sc 151 dev/i2c/pca9554.c sc->sc_gpio_pins[i].pin_num = i;
sc 152 dev/i2c/pca9554.c sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
sc 154 dev/i2c/pca9554.c if ((sc->sc_control & (1 << i)) == 0) {
sc 155 dev/i2c/pca9554.c sc->sc_gpio_pins[i].pin_flags = GPIO_PIN_OUTPUT;
sc 156 dev/i2c/pca9554.c sc->sc_gpio_pins[i].pin_state =
sc 162 dev/i2c/pca9554.c sc->sc_gpio_gc.gp_cookie = sc;
sc 163 dev/i2c/pca9554.c sc->sc_gpio_gc.gp_pin_read = pcagpio_gpio_pin_read;
sc 164 dev/i2c/pca9554.c sc->sc_gpio_gc.gp_pin_write = pcagpio_gpio_pin_write;
sc 165 dev/i2c/pca9554.c sc->sc_gpio_gc.gp_pin_ctl = pcagpio_gpio_pin_ctl;
sc 168 dev/i2c/pca9554.c gba.gba_gc = &sc->sc_gpio_gc;
sc 169 dev/i2c/pca9554.c gba.gba_pins = sc->sc_gpio_pins;
sc 172 dev/i2c/pca9554.c config_found(&sc->sc_dev, &gba, gpiobus_print);
sc 179 dev/i2c/pca9554.c struct pcagpio_softc *sc = arg;
sc 183 dev/i2c/pca9554.c iic_acquire_bus(sc->sc_tag, 0);
sc 186 dev/i2c/pca9554.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 187 dev/i2c/pca9554.c sc->sc_addr, &cmd, sizeof cmd, &in, sizeof in, 0))
sc 191 dev/i2c/pca9554.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 192 dev/i2c/pca9554.c sc->sc_addr, &cmd, sizeof cmd, &out, sizeof out, 0))
sc 197 dev/i2c/pca9554.c if ((sc->sc_control & bit))
sc 198 dev/i2c/pca9554.c sc->sc_sensor[i].value = (in & bit) ? 1 : 0;
sc 200 dev/i2c/pca9554.c sc->sc_sensor[i].value = (out & bit) ? 1 : 0;
sc 204 dev/i2c/pca9554.c iic_release_bus(sc->sc_tag, 0);
sc 211 dev/i2c/pca9554.c struct pcagpio_softc *sc = arg;
sc 215 dev/i2c/pca9554.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 216 dev/i2c/pca9554.c sc->sc_addr, &cmd, sizeof cmd, &in, sizeof in, 0))
sc 218 dev/i2c/pca9554.c return ((in ^ sc->sc_polarity) & (1 << pin)) ? 1 : 0;
sc 224 dev/i2c/pca9554.c struct pcagpio_softc *sc = arg;
sc 229 dev/i2c/pca9554.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 230 dev/i2c/pca9554.c sc->sc_addr, &cmd, sizeof cmd, &out, sizeof out, 0))
sc 235 dev/i2c/pca9554.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 236 dev/i2c/pca9554.c sc->sc_addr, &cmd, sizeof cmd, &out, sizeof out, 0))
sc 244 dev/i2c/pca9554.c struct pcagpio_softc *sc = arg;
sc 247 dev/i2c/pca9554.c pcagpio_gpio_pin_select(sc, pin);
sc 248 dev/i2c/pca9554.c conf = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh,
sc 259 dev/i2c/pca9554.c bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh,
sc 175 dev/i2c/rs5c372.c struct ricohrtc_softc *sc = (struct ricohrtc_softc *)self;
sc 180 dev/i2c/rs5c372.c sc->sc_tag = ia->ia_tag;
sc 181 dev/i2c/rs5c372.c sc->sc_address = ia->ia_addr;
sc 182 dev/i2c/rs5c372.c sc->sc_todr.cookie = sc;
sc 183 dev/i2c/rs5c372.c sc->sc_todr.todr_gettime = ricohrtc_gettime;
sc 184 dev/i2c/rs5c372.c sc->sc_todr.todr_settime = ricohrtc_settime;
sc 185 dev/i2c/rs5c372.c sc->sc_todr.todr_getcal = ricohrtc_getcal;
sc 186 dev/i2c/rs5c372.c sc->sc_todr.todr_setcal = ricohrtc_setcal;
sc 187 dev/i2c/rs5c372.c sc->sc_todr.todr_setwen = NULL;
sc 190 dev/i2c/rs5c372.c todr_attach(&sc->sc_todr);
sc 195 dev/i2c/rs5c372.c todr_handle = &sc->sc_todr;
sc 200 dev/i2c/rs5c372.c ricohrtc_reg_write(sc, RICOHRTC_CONTROL2, RICOHRTC_CONTROL2_24HRS);
sc 201 dev/i2c/rs5c372.c ricohrtc_reg_write(sc, RICOHRTC_CONTROL1, 0);
sc 207 dev/i2c/rs5c372.c struct ricohrtc_softc *sc = ch->cookie;
sc 211 dev/i2c/rs5c372.c if (ricohrtc_clock_read(sc, &dt) == 0)
sc 222 dev/i2c/rs5c372.c struct ricohrtc_softc *sc = ch->cookie;
sc 227 dev/i2c/rs5c372.c if (ricohrtc_clock_write(sc, &dt) == 0)
sc 247 dev/i2c/rs5c372.c ricohrtc_reg_write(struct ricohrtc_softc *sc, int reg, uint8_t val)
sc 251 dev/i2c/rs5c372.c iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
sc 254 dev/i2c/rs5c372.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
sc 256 dev/i2c/rs5c372.c iic_release_bus(sc->sc_tag, I2C_F_POLL);
sc 258 dev/i2c/rs5c372.c sc->sc_dev.dv_xname, reg);
sc 261 dev/i2c/rs5c372.c iic_release_bus(sc->sc_tag, I2C_F_POLL);
sc 265 dev/i2c/rs5c372.c ricohrtc_clock_read(struct ricohrtc_softc *sc, struct clock_ymdhms *dt)
sc 270 dev/i2c/rs5c372.c iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
sc 272 dev/i2c/rs5c372.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
sc 274 dev/i2c/rs5c372.c iic_release_bus(sc->sc_tag, I2C_F_POLL);
sc 276 dev/i2c/rs5c372.c sc->sc_dev.dv_xname);
sc 279 dev/i2c/rs5c372.c iic_release_bus(sc->sc_tag, I2C_F_POLL);
sc 294 dev/i2c/rs5c372.c ricohrtc_clock_write(struct ricohrtc_softc *sc, struct clock_ymdhms *dt)
sc 311 dev/i2c/rs5c372.c iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
sc 313 dev/i2c/rs5c372.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
sc 315 dev/i2c/rs5c372.c iic_release_bus(sc->sc_tag, I2C_F_POLL);
sc 317 dev/i2c/rs5c372.c sc->sc_dev.dv_xname);
sc 320 dev/i2c/rs5c372.c iic_release_bus(sc->sc_tag, I2C_F_POLL);
sc 74 dev/i2c/tsl2560.c struct tsl_softc *sc = (struct tsl_softc *)self;
sc 78 dev/i2c/tsl2560.c sc->sc_tag = ia->ia_tag;
sc 79 dev/i2c/tsl2560.c sc->sc_addr = ia->ia_addr;
sc 81 dev/i2c/tsl2560.c iic_acquire_bus(sc->sc_tag, 0);
sc 83 dev/i2c/tsl2560.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 84 dev/i2c/tsl2560.c sc->sc_addr, &cmd, 1, &data, 1, 0)) {
sc 85 dev/i2c/tsl2560.c iic_release_bus(sc->sc_tag, 0);
sc 91 dev/i2c/tsl2560.c if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 92 dev/i2c/tsl2560.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 93 dev/i2c/tsl2560.c iic_release_bus(sc->sc_tag, 0);
sc 98 dev/i2c/tsl2560.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 99 dev/i2c/tsl2560.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 100 dev/i2c/tsl2560.c iic_release_bus(sc->sc_tag, 0);
sc 104 dev/i2c/tsl2560.c iic_release_bus(sc->sc_tag, 0);
sc 119 dev/i2c/tsl2560.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 120 dev/i2c/tsl2560.c sizeof(sc->sc_sensordev.xname));
sc 121 dev/i2c/tsl2560.c sc->sc_sensor.type = SENSOR_LUX;
sc 123 dev/i2c/tsl2560.c if (sensor_task_register(sc, tsl_refresh, 5) == NULL) {
sc 128 dev/i2c/tsl2560.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor);
sc 129 dev/i2c/tsl2560.c sensordev_install(&sc->sc_sensordev);
sc 137 dev/i2c/tsl2560.c struct tsl_softc *sc = arg;
sc 141 dev/i2c/tsl2560.c iic_acquire_bus(sc->sc_tag, 0);
sc 143 dev/i2c/tsl2560.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 144 dev/i2c/tsl2560.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 145 dev/i2c/tsl2560.c iic_release_bus(sc->sc_tag, 0);
sc 146 dev/i2c/tsl2560.c sc->sc_sensor.flags |= SENSOR_FINVALID;
sc 151 dev/i2c/tsl2560.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 152 dev/i2c/tsl2560.c sc->sc_addr, &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 153 dev/i2c/tsl2560.c iic_release_bus(sc->sc_tag, 0);
sc 154 dev/i2c/tsl2560.c sc->sc_sensor.flags |= SENSOR_FINVALID;
sc 158 dev/i2c/tsl2560.c iic_release_bus(sc->sc_tag, 0);
sc 160 dev/i2c/tsl2560.c sc->sc_sensor.value = tsl_lux(chan0, chan1);
sc 161 dev/i2c/tsl2560.c sc->sc_sensor.flags &= ~SENSOR_FINVALID;
sc 162 dev/i2c/w83l784r.c struct wbenv_softc *sc = (struct wbenv_softc *)self;
sc 167 dev/i2c/w83l784r.c sc->sc_tag = ia->ia_tag;
sc 168 dev/i2c/w83l784r.c sc->sc_addr[0] = ia->ia_addr;
sc 170 dev/i2c/w83l784r.c iic_acquire_bus(sc->sc_tag, 0);
sc 173 dev/i2c/w83l784r.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 174 dev/i2c/w83l784r.c sc->sc_addr[0], &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 175 dev/i2c/w83l784r.c iic_release_bus(sc->sc_tag, 0);
sc 180 dev/i2c/w83l784r.c iic_release_bus(sc->sc_tag, 0);
sc 182 dev/i2c/w83l784r.c sc->sc_chip_id = data;
sc 184 dev/i2c/w83l784r.c switch (sc->sc_chip_id) {
sc 187 dev/i2c/w83l784r.c wbenv_setup_sensors(sc, w83l784r_sensors);
sc 191 dev/i2c/w83l784r.c wbenv_setup_sensors(sc, w83l785r_sensors);
sc 195 dev/i2c/w83l784r.c wbenv_setup_sensors(sc, w83l785ts_l_sensors);
sc 198 dev/i2c/w83l784r.c printf(": unknown Winbond chip (ID 0x%x)\n", sc->sc_chip_id);
sc 202 dev/i2c/w83l784r.c iic_acquire_bus(sc->sc_tag, 0);
sc 205 dev/i2c/w83l784r.c if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 206 dev/i2c/w83l784r.c sc->sc_addr[0], &cmd, sizeof cmd, &data, sizeof data, 0)) {
sc 207 dev/i2c/w83l784r.c iic_release_bus(sc->sc_tag, 0);
sc 212 dev/i2c/w83l784r.c iic_release_bus(sc->sc_tag, 0);
sc 214 dev/i2c/w83l784r.c sc->sc_addr[1] = 0x48 + (data & 0x7);
sc 215 dev/i2c/w83l784r.c sc->sc_addr[2] = 0x48 + ((data >> 4) & 0x7);
sc 218 dev/i2c/w83l784r.c iic_ignore_addr(sc->sc_addr[1]);
sc 219 dev/i2c/w83l784r.c iic_ignore_addr(sc->sc_addr[2]);
sc 222 dev/i2c/w83l784r.c if (sensor_task_register(sc, wbenv_refresh, 5) == NULL) {
sc 224 dev/i2c/w83l784r.c sc->sc_dev.dv_xname);
sc 229 dev/i2c/w83l784r.c config = wbenv_readreg(sc, W83L784R_CONFIG);
sc 230 dev/i2c/w83l784r.c wbenv_writereg(sc, W83L784R_CONFIG, config | 0x01);
sc 233 dev/i2c/w83l784r.c for (i = 0; i < sc->sc_numsensors; ++i)
sc 234 dev/i2c/w83l784r.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensors[i]);
sc 235 dev/i2c/w83l784r.c sensordev_install(&sc->sc_sensordev);
sc 239 dev/i2c/w83l784r.c wbenv_setup_sensors(struct wbenv_softc *sc, struct wbenv_sensor *sensors)
sc 243 dev/i2c/w83l784r.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 244 dev/i2c/w83l784r.c sizeof(sc->sc_sensordev.xname));
sc 247 dev/i2c/w83l784r.c sc->sc_sensors[i].type = sensors[i].type;
sc 248 dev/i2c/w83l784r.c strlcpy(sc->sc_sensors[i].desc, sensors[i].desc,
sc 249 dev/i2c/w83l784r.c sizeof(sc->sc_sensors[i].desc));
sc 250 dev/i2c/w83l784r.c sc->sc_numsensors++;
sc 252 dev/i2c/w83l784r.c sc->sc_wbenv_sensors = sensors;
sc 258 dev/i2c/w83l784r.c struct wbenv_softc *sc = arg;
sc 261 dev/i2c/w83l784r.c iic_acquire_bus(sc->sc_tag, 0);
sc 263 dev/i2c/w83l784r.c for (i = 0; i < sc->sc_numsensors; i++)
sc 264 dev/i2c/w83l784r.c sc->sc_wbenv_sensors[i].refresh(sc, i);
sc 266 dev/i2c/w83l784r.c iic_release_bus(sc->sc_tag, 0);
sc 270 dev/i2c/w83l784r.c w83l784r_refresh_volt(struct wbenv_softc *sc, int n)
sc 272 dev/i2c/w83l784r.c struct ksensor *sensor = &sc->sc_sensors[n];
sc 273 dev/i2c/w83l784r.c int data, reg = sc->sc_wbenv_sensors[n].reg;
sc 275 dev/i2c/w83l784r.c data = wbenv_readreg(sc, reg);
sc 277 dev/i2c/w83l784r.c sensor->value *= sc->sc_wbenv_sensors[n].rfact;
sc 282 dev/i2c/w83l784r.c w83l785r_refresh_volt(struct wbenv_softc *sc, int n)
sc 284 dev/i2c/w83l784r.c struct ksensor *sensor = &sc->sc_sensors[n];
sc 285 dev/i2c/w83l784r.c int data, reg = sc->sc_wbenv_sensors[n].reg;
sc 287 dev/i2c/w83l784r.c data = wbenv_readreg(sc, reg);
sc 289 dev/i2c/w83l784r.c sensor->value *= sc->sc_wbenv_sensors[n].rfact;
sc 294 dev/i2c/w83l784r.c wbenv_refresh_temp(struct wbenv_softc *sc, int n)
sc 296 dev/i2c/w83l784r.c struct ksensor *sensor = &sc->sc_sensors[n];
sc 299 dev/i2c/w83l784r.c sdata = wbenv_readreg(sc, sc->sc_wbenv_sensors[n].reg);
sc 306 dev/i2c/w83l784r.c w83l784r_refresh_temp(struct wbenv_softc *sc, int n)
sc 308 dev/i2c/w83l784r.c struct ksensor *sensor = &sc->sc_sensors[n];
sc 312 dev/i2c/w83l784r.c iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 313 dev/i2c/w83l784r.c sc->sc_addr[sc->sc_wbenv_sensors[n].reg],
sc 319 dev/i2c/w83l784r.c w83l784r_refresh_fanrpm(struct wbenv_softc *sc, int n)
sc 321 dev/i2c/w83l784r.c struct ksensor *sensor = &sc->sc_sensors[n];
sc 324 dev/i2c/w83l784r.c data = wbenv_readreg(sc, W83L784R_FANDIV);
sc 325 dev/i2c/w83l784r.c if (sc->sc_wbenv_sensors[n].reg == W83L784R_FAN1)
sc 330 dev/i2c/w83l784r.c data = wbenv_readreg(sc, sc->sc_wbenv_sensors[n].reg);
sc 341 dev/i2c/w83l784r.c w83l785r_refresh_fanrpm(struct wbenv_softc *sc, int n)
sc 343 dev/i2c/w83l784r.c struct ksensor *sensor = &sc->sc_sensors[n];
sc 346 dev/i2c/w83l784r.c data = wbenv_readreg(sc, W83L785R_FANDIV);
sc 347 dev/i2c/w83l784r.c if (sc->sc_wbenv_sensors[n].reg == W83L784R_FAN1)
sc 352 dev/i2c/w83l784r.c data = wbenv_readreg(sc, sc->sc_wbenv_sensors[n].reg);
sc 363 dev/i2c/w83l784r.c wbenv_readreg(struct wbenv_softc *sc, u_int8_t reg)
sc 367 dev/i2c/w83l784r.c iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
sc 368 dev/i2c/w83l784r.c sc->sc_addr[0], ®, sizeof reg, &data, sizeof data, 0);
sc 374 dev/i2c/w83l784r.c wbenv_writereg(struct wbenv_softc *sc, u_int8_t reg, u_int8_t data)
sc 376 dev/i2c/w83l784r.c iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
sc 377 dev/i2c/w83l784r.c sc->sc_addr[0], ®, sizeof reg, &data, sizeof data, 0);
sc 246 dev/i2o/iop.c iop_inl(struct iop_softc *sc, int off)
sc 249 dev/i2o/iop.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4,
sc 251 dev/i2o/iop.c return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, off));
sc 255 dev/i2o/iop.c iop_outl(struct iop_softc *sc, int off, u_int32_t val)
sc 258 dev/i2o/iop.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, off, val);
sc 259 dev/i2o/iop.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, off, 4,
sc 267 dev/i2o/iop.c iop_init(struct iop_softc *sc, const char *intrstr)
sc 280 dev/i2o/iop.c sc->sc_dv.dv_xname);
sc 289 dev/i2o/iop.c if (bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0,
sc 290 dev/i2o/iop.c BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &sc->sc_scr_dmamap) != 0) {
sc 292 dev/i2o/iop.c sc->sc_dv.dv_xname);
sc 297 dev/i2o/iop.c if (bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, PAGE_SIZE, 0,
sc 298 dev/i2o/iop.c sc->sc_scr_seg, 1, &nsegs, BUS_DMA_NOWAIT) != 0) {
sc 300 dev/i2o/iop.c sc->sc_dv.dv_xname);
sc 305 dev/i2o/iop.c if (bus_dmamem_map(sc->sc_dmat, sc->sc_scr_seg, nsegs, PAGE_SIZE,
sc 306 dev/i2o/iop.c &sc->sc_scr, 0)) {
sc 307 dev/i2o/iop.c printf("%s: cannot map scratch dmamem\n", sc->sc_dv.dv_xname);
sc 312 dev/i2o/iop.c if (bus_dmamap_load(sc->sc_dmat, sc->sc_scr_dmamap, sc->sc_scr,
sc 314 dev/i2o/iop.c printf("%s: cannot load scratch dmamap\n", sc->sc_dv.dv_xname);
sc 319 dev/i2o/iop.c if ((rv = iop_reset(sc)) != 0) {
sc 320 dev/i2o/iop.c printf("%s: not responding (reset)\n", sc->sc_dv.dv_xname);
sc 323 dev/i2o/iop.c if ((rv = iop_status_get(sc, 1)) != 0) {
sc 325 dev/i2o/iop.c sc->sc_dv.dv_xname);
sc 328 dev/i2o/iop.c sc->sc_flags |= IOP_HAVESTATUS;
sc 329 dev/i2o/iop.c iop_strvis(sc, sc->sc_status.productid,
sc 330 dev/i2o/iop.c sizeof(sc->sc_status.productid), ident, sizeof(ident));
sc 334 dev/i2o/iop.c printf("%s: orgid=0x%04x version=%d\n", sc->sc_dv.dv_xname,
sc 335 dev/i2o/iop.c letoh16(sc->sc_status.orgid),
sc 336 dev/i2o/iop.c (letoh32(sc->sc_status.segnumber) >> 12) & 15);
sc 337 dev/i2o/iop.c printf("%s: type want have cbase\n", sc->sc_dv.dv_xname);
sc 338 dev/i2o/iop.c printf("%s: mem %04x %04x %08x\n", sc->sc_dv.dv_xname,
sc 339 dev/i2o/iop.c letoh32(sc->sc_status.desiredprivmemsize),
sc 340 dev/i2o/iop.c letoh32(sc->sc_status.currentprivmemsize),
sc 341 dev/i2o/iop.c letoh32(sc->sc_status.currentprivmembase));
sc 342 dev/i2o/iop.c printf("%s: i/o %04x %04x %08x\n", sc->sc_dv.dv_xname,
sc 343 dev/i2o/iop.c letoh32(sc->sc_status.desiredpriviosize),
sc 344 dev/i2o/iop.c letoh32(sc->sc_status.currentpriviosize),
sc 345 dev/i2o/iop.c letoh32(sc->sc_status.currentpriviobase));
sc 348 dev/i2o/iop.c sc->sc_maxob = letoh32(sc->sc_status.maxoutboundmframes);
sc 349 dev/i2o/iop.c if (sc->sc_maxob > IOP_MAX_OUTBOUND)
sc 350 dev/i2o/iop.c sc->sc_maxob = IOP_MAX_OUTBOUND;
sc 351 dev/i2o/iop.c sc->sc_maxib = letoh32(sc->sc_status.maxinboundmframes);
sc 352 dev/i2o/iop.c if (sc->sc_maxib > IOP_MAX_INBOUND)
sc 353 dev/i2o/iop.c sc->sc_maxib = IOP_MAX_INBOUND;
sc 356 dev/i2o/iop.c im = malloc(sizeof(*im) * sc->sc_maxib, M_DEVBUF, M_NOWAIT);
sc 358 dev/i2o/iop.c printf("%s: couldn't allocate message", sc->sc_dv.dv_xname);
sc 363 dev/i2o/iop.c bzero(im, sizeof(*im) * sc->sc_maxib);
sc 364 dev/i2o/iop.c sc->sc_ims = im;
sc 365 dev/i2o/iop.c SLIST_INIT(&sc->sc_im_freelist);
sc 367 dev/i2o/iop.c for (i = 0; i < sc->sc_maxib; i++, im++) {
sc 368 dev/i2o/iop.c rv = bus_dmamap_create(sc->sc_dmat, IOP_MAX_XFER,
sc 374 dev/i2o/iop.c sc->sc_dv.dv_xname, rv);
sc 379 dev/i2o/iop.c SLIST_INSERT_HEAD(&sc->sc_im_freelist, im, im_chain);
sc 383 dev/i2o/iop.c if (iop_ofifo_init(sc) != 0) {
sc 385 dev/i2o/iop.c sc->sc_dv.dv_xname);
sc 394 dev/i2o/iop.c mask = iop_inl(sc, IOP_REG_INTR_MASK);
sc 395 dev/i2o/iop.c iop_outl(sc, IOP_REG_INTR_MASK, mask & ~IOP_INTR_OFIFO);
sc 398 dev/i2o/iop.c printf("%s: interrupting at %s\n", sc->sc_dv.dv_xname,
sc 403 dev/i2o/iop.c sc->sc_dv.dv_xname, sc->sc_maxib,
sc 404 dev/i2o/iop.c letoh32(sc->sc_status.maxinboundmframes),
sc 405 dev/i2o/iop.c sc->sc_maxob, letoh32(sc->sc_status.maxoutboundmframes));
sc 408 dev/i2o/iop.c lockinit(&sc->sc_conflock, PRIBIO, "iopconf", 0, 0);
sc 410 dev/i2o/iop.c startuphook_establish((void (*)(void *))iop_config_interrupts, sc);
sc 417 dev/i2o/iop.c bus_dmamap_unload(sc->sc_dmat, sc->sc_scr_dmamap);
sc 419 dev/i2o/iop.c bus_dmamem_unmap(sc->sc_dmat, sc->sc_scr, PAGE_SIZE);
sc 421 dev/i2o/iop.c bus_dmamem_free(sc->sc_dmat, sc->sc_scr_seg, nsegs);
sc 423 dev/i2o/iop.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_scr_dmamap);
sc 432 dev/i2o/iop.c struct iop_softc *sc, *iop;
sc 436 dev/i2o/iop.c sc = (struct iop_softc *)self;
sc 437 dev/i2o/iop.c LIST_INIT(&sc->sc_iilist);
sc 439 dev/i2o/iop.c printf("%s: configuring...\n", sc->sc_dv.dv_xname);
sc 441 dev/i2o/iop.c if (iop_hrt_get(sc) != 0) {
sc 442 dev/i2o/iop.c printf("%s: unable to retrieve HRT\n", sc->sc_dv.dv_xname);
sc 458 dev/i2o/iop.c sc->sc_dv.dv_xname);
sc 503 dev/i2o/iop.c if (iop_systab_set(sc) != 0) {
sc 504 dev/i2o/iop.c printf("%s: unable to set system table\n", sc->sc_dv.dv_xname);
sc 507 dev/i2o/iop.c if (iop_simple_cmd(sc, I2O_TID_IOP, I2O_EXEC_SYS_ENABLE, IOP_ICTX, 1,
sc 509 dev/i2o/iop.c printf("%s: unable to enable system\n", sc->sc_dv.dv_xname);
sc 516 dev/i2o/iop.c sc->sc_eventii.ii_dv = self;
sc 517 dev/i2o/iop.c sc->sc_eventii.ii_intr = iop_intr_event;
sc 518 dev/i2o/iop.c sc->sc_eventii.ii_flags = II_DISCARD | II_UTILITY;
sc 519 dev/i2o/iop.c sc->sc_eventii.ii_tid = I2O_TID_IOP;
sc 520 dev/i2o/iop.c iop_initiator_register(sc, &sc->sc_eventii);
sc 522 dev/i2o/iop.c rv = iop_util_eventreg(sc, &sc->sc_eventii,
sc 537 dev/i2o/iop.c sc->sc_dv.dv_xname);
sc 548 dev/i2o/iop.c lockmgr(&sc->sc_conflock, LK_EXCLUSIVE, NULL);
sc 549 dev/i2o/iop.c if ((rv = iop_reconfigure(sc, 0)) == -1) {
sc 550 dev/i2o/iop.c printf("%s: configure failed (%d)\n", sc->sc_dv.dv_xname, rv);
sc 553 dev/i2o/iop.c lockmgr(&sc->sc_conflock, LK_RELEASE, NULL);
sc 554 dev/i2o/iop.c kthread_create_deferred(iop_create_reconf_thread, sc);
sc 564 dev/i2o/iop.c struct iop_softc *sc;
sc 567 dev/i2o/iop.c sc = cookie;
sc 568 dev/i2o/iop.c sc->sc_flags |= IOP_ONLINE;
sc 570 dev/i2o/iop.c rv = kthread_create(iop_reconf_thread, sc, &sc->sc_reconf_proc,
sc 571 dev/i2o/iop.c "%s", sc->sc_dv.dv_xname);
sc 574 dev/i2o/iop.c sc->sc_dv.dv_xname, rv);
sc 586 dev/i2o/iop.c struct iop_softc *sc = cookie;
sc 591 dev/i2o/iop.c chgind = sc->sc_chgind + 1;
sc 595 dev/i2o/iop.c sc->sc_dv.dv_xname, chgind));
sc 597 dev/i2o/iop.c rv = iop_lct_get0(sc, &lct, sizeof(lct), chgind);
sc 600 dev/i2o/iop.c sc->sc_dv.dv_xname, letoh32(lct.changeindicator), rv));
sc 603 dev/i2o/iop.c lockmgr(&sc->sc_conflock, LK_EXCLUSIVE, NULL) == 0) {
sc 604 dev/i2o/iop.c iop_reconfigure(sc, letoh32(lct.changeindicator));
sc 605 dev/i2o/iop.c chgind = sc->sc_chgind + 1;
sc 606 dev/i2o/iop.c lockmgr(&sc->sc_conflock, LK_RELEASE, NULL);
sc 617 dev/i2o/iop.c iop_reconfigure(struct iop_softc *sc, u_int chgind)
sc 632 dev/i2o/iop.c if ((rv = iop_lct_get(sc)) != 0) {
sc 637 dev/i2o/iop.c le = sc->sc_lct->entry;
sc 638 dev/i2o/iop.c for (i = 0; i < sc->sc_nlctent; i++, le++) {
sc 644 dev/i2o/iop.c im = iop_msg_alloc(sc, NULL, IM_WAIT);
sc 651 dev/i2o/iop.c DPRINTF(("%s: scanning bus %d\n", sc->sc_dv.dv_xname,
sc 654 dev/i2o/iop.c rv = iop_msg_post(sc, im, &mf, 5*60*1000);
sc 655 dev/i2o/iop.c iop_msg_free(sc, im);
sc 659 dev/i2o/iop.c sc->sc_dv.dv_xname, rv);
sc 662 dev/i2o/iop.c } else if (chgind <= sc->sc_chgind) {
sc 663 dev/i2o/iop.c DPRINTF(("%s: LCT unchanged (async)\n", sc->sc_dv.dv_xname));
sc 668 dev/i2o/iop.c if ((rv = iop_lct_get(sc)) != 0) {
sc 672 dev/i2o/iop.c DPRINTF(("%s: %d LCT entries\n", sc->sc_dv.dv_xname, sc->sc_nlctent));
sc 674 dev/i2o/iop.c chgind = letoh32(sc->sc_lct->changeindicator);
sc 675 dev/i2o/iop.c if (chgind == sc->sc_chgind) {
sc 676 dev/i2o/iop.c DPRINTF(("%s: LCT unchanged\n", sc->sc_dv.dv_xname));
sc 679 dev/i2o/iop.c DPRINTF(("%s: LCT changed\n", sc->sc_dv.dv_xname));
sc 680 dev/i2o/iop.c sc->sc_chgind = chgind;
sc 682 dev/i2o/iop.c if (sc->sc_tidmap != NULL)
sc 683 dev/i2o/iop.c free(sc->sc_tidmap, M_DEVBUF);
sc 684 dev/i2o/iop.c sc->sc_tidmap = malloc(sc->sc_nlctent * sizeof(struct iop_tidmap),
sc 686 dev/i2o/iop.c if (!sc->sc_tidmap) {
sc 690 dev/i2o/iop.c bzero(sc->sc_tidmap, sc->sc_nlctent * sizeof(struct iop_tidmap));
sc 693 dev/i2o/iop.c iop_adjqparam(sc, 1);
sc 703 dev/i2o/iop.c iop_configure_devices(sc, IC_CONFIGURE | IC_PRIORITY,
sc 705 dev/i2o/iop.c if ((rv = iop_lct_get(sc)) != 0)
sc 707 dev/i2o/iop.c iop_configure_devices(sc, IC_CONFIGURE | IC_PRIORITY,
sc 710 dev/i2o/iop.c for (ii = LIST_FIRST(&sc->sc_iilist); ii != NULL; ii = nextii) {
sc 714 dev/i2o/iop.c for (i = 0; i < sc->sc_nlctent; i++)
sc 715 dev/i2o/iop.c if (ii->ii_tid == sc->sc_tidmap[i].it_tid)
sc 717 dev/i2o/iop.c if (i == sc->sc_nlctent ||
sc 718 dev/i2o/iop.c (sc->sc_tidmap[i].it_flags & IT_CONFIGURED) == 0)
sc 729 dev/i2o/iop.c sc->sc_dv.dv_xname, ii->ii_dv->dv_xname, rv);
sc 733 dev/i2o/iop.c if (sc->sc_nii != 0)
sc 734 dev/i2o/iop.c iop_adjqparam(sc, (sc->sc_maxib - sc->sc_nuii - IOP_MF_RESERVE)
sc 735 dev/i2o/iop.c / sc->sc_nii);
sc 744 dev/i2o/iop.c iop_configure_devices(struct iop_softc *sc, int mask, int maskval)
sc 753 dev/i2o/iop.c nent = sc->sc_nlctent;
sc 754 dev/i2o/iop.c for (i = 0, le = sc->sc_lct->entry; i < nent; i++, le++) {
sc 755 dev/i2o/iop.c sc->sc_tidmap[i].it_tid =
sc 764 dev/i2o/iop.c ia.ia_tid = sc->sc_tidmap[i].it_tid;
sc 778 dev/i2o/iop.c LIST_FOREACH(ii, &sc->sc_iilist, ii_list) {
sc 780 dev/i2o/iop.c sc->sc_tidmap[i].it_flags |= IT_CONFIGURED;
sc 781 dev/i2o/iop.c strlcpy(sc->sc_tidmap[i].it_dvname,
sc 783 dev/i2o/iop.c sizeof sc->sc_tidmap[i].it_dvname);
sc 789 dev/i2o/iop.c dv = config_found_sm(&sc->sc_dv, &ia, iop_print, iop_submatch);
sc 791 dev/i2o/iop.c sc->sc_tidmap[i].it_flags |= IT_CONFIGURED;
sc 792 dev/i2o/iop.c strlcpy(sc->sc_tidmap[i].it_dvname, dv->dv_xname,
sc 793 dev/i2o/iop.c sizeof sc->sc_tidmap[i].it_dvname);
sc 802 dev/i2o/iop.c iop_adjqparam(struct iop_softc *sc, int mpi)
sc 806 dev/i2o/iop.c LIST_FOREACH(ii, &sc->sc_iilist, ii_list)
sc 878 dev/i2o/iop.c struct iop_softc *sc;
sc 884 dev/i2o/iop.c if (!(sc = (struct iop_softc *)device_lookup(&iop_cd, i)))
sc 886 dev/i2o/iop.c if ((sc->sc_flags & IOP_ONLINE) == 0)
sc 889 dev/i2o/iop.c iop_simple_cmd(sc, I2O_TID_IOP, I2O_EXEC_SYS_QUIESCE, IOP_ICTX,
sc 892 dev/i2o/iop.c if (letoh16(sc->sc_status.orgid) != I2O_ORG_AMI) {
sc 897 dev/i2o/iop.c iop_simple_cmd(sc, I2O_TID_IOP, I2O_EXEC_IOP_CLEAR,
sc 911 dev/i2o/iop.c iop_status_get(struct iop_softc *sc, int nosleep)
sc 914 dev/i2o/iop.c paddr_t pa = sc->sc_scr_seg->ds_addr;
sc 915 dev/i2o/iop.c struct i2o_status *st = (struct i2o_status *)sc->sc_scr;
sc 929 dev/i2o/iop.c bus_dmamap_sync(sc->sc_dmat, sc->sc_scr_dmamap, 0, sizeof(*st),
sc 932 dev/i2o/iop.c if ((rv = iop_post(sc, (u_int32_t *)&mf)))
sc 937 dev/i2o/iop.c (bus_dmamap_sync(sc->sc_dmat, sc->sc_scr_dmamap, 0,
sc 943 dev/i2o/iop.c bcopy(st, &sc->sc_status, sizeof(sc->sc_status));
sc 951 dev/i2o/iop.c iop_ofifo_init(struct iop_softc *sc)
sc 957 dev/i2o/iop.c u_int32_t *sw = (u_int32_t *)sc->sc_scr;
sc 969 dev/i2o/iop.c mb[sizeof(*mf) / sizeof(u_int32_t) + 1] = sc->sc_scr_seg->ds_addr;
sc 973 dev/i2o/iop.c bus_dmamap_sync(sc->sc_dmat, sc->sc_scr_dmamap, 0, sizeof(*sw),
sc 982 dev/i2o/iop.c if ((rv = iop_post(sc, mb)))
sc 987 dev/i2o/iop.c (bus_dmamap_sync(sc->sc_dmat, sc->sc_scr_dmamap, 0, sizeof(*sw),
sc 992 dev/i2o/iop.c sc->sc_dv.dv_xname, letoh32(*sw));
sc 997 dev/i2o/iop.c if (sc->sc_rep_phys == 0) {
sc 998 dev/i2o/iop.c sc->sc_rep_size = sc->sc_maxob * IOP_MAX_MSG_SIZE;
sc 1000 dev/i2o/iop.c rv = bus_dmamem_alloc(sc->sc_dmat, sc->sc_rep_size, PAGE_SIZE,
sc 1003 dev/i2o/iop.c printf("%s: dma alloc = %d\n", sc->sc_dv.dv_xname,
sc 1008 dev/i2o/iop.c rv = bus_dmamem_map(sc->sc_dmat, &seg, rseg, sc->sc_rep_size,
sc 1009 dev/i2o/iop.c &sc->sc_rep, BUS_DMA_NOWAIT | BUS_DMA_COHERENT);
sc 1011 dev/i2o/iop.c printf("%s: dma map = %d\n", sc->sc_dv.dv_xname, rv);
sc 1015 dev/i2o/iop.c rv = bus_dmamap_create(sc->sc_dmat, sc->sc_rep_size, 1,
sc 1016 dev/i2o/iop.c sc->sc_rep_size, 0, BUS_DMA_NOWAIT, &sc->sc_rep_dmamap);
sc 1018 dev/i2o/iop.c printf("%s: dma create = %d\n", sc->sc_dv.dv_xname,
sc 1023 dev/i2o/iop.c rv = bus_dmamap_load(sc->sc_dmat, sc->sc_rep_dmamap,
sc 1024 dev/i2o/iop.c sc->sc_rep, sc->sc_rep_size, NULL, BUS_DMA_NOWAIT);
sc 1026 dev/i2o/iop.c printf("%s: dma load = %d\n", sc->sc_dv.dv_xname, rv);
sc 1030 dev/i2o/iop.c sc->sc_rep_phys = sc->sc_rep_dmamap->dm_segs[0].ds_addr;
sc 1034 dev/i2o/iop.c for (i = sc->sc_maxob, addr = sc->sc_rep_phys; i != 0; i--) {
sc 1035 dev/i2o/iop.c iop_outl(sc, IOP_REG_OFIFO, (u_int32_t)addr);
sc 1046 dev/i2o/iop.c iop_hrt_get0(struct iop_softc *sc, struct i2o_hrt *hrt, size_t size)
sc 1053 dev/i2o/iop.c im = iop_msg_alloc(sc, NULL, IM_WAIT);
sc 1060 dev/i2o/iop.c iop_msg_map(sc, im, mb, hrt, size, 0);
sc 1061 dev/i2o/iop.c rv = iop_msg_post(sc, im, mb, 30000);
sc 1062 dev/i2o/iop.c iop_msg_unmap(sc, im);
sc 1063 dev/i2o/iop.c iop_msg_free(sc, im);
sc 1071 dev/i2o/iop.c iop_hrt_get(struct iop_softc *sc)
sc 1077 dev/i2o/iop.c rv = iop_hrt_get0(sc, &hrthdr, sizeof(hrthdr));
sc 1081 dev/i2o/iop.c DPRINTF(("%s: %d hrt entries\n", sc->sc_dv.dv_xname,
sc 1090 dev/i2o/iop.c if ((rv = iop_hrt_get0(sc, hrt, size)) != 0) {
sc 1095 dev/i2o/iop.c if (sc->sc_hrt != NULL)
sc 1096 dev/i2o/iop.c free(sc->sc_hrt, M_DEVBUF);
sc 1097 dev/i2o/iop.c sc->sc_hrt = hrt;
sc 1108 dev/i2o/iop.c iop_lct_get0(struct iop_softc *sc, struct i2o_lct *lct, size_t size,
sc 1116 dev/i2o/iop.c im = iop_msg_alloc(sc, NULL, IM_WAIT);
sc 1134 dev/i2o/iop.c iop_msg_map(sc, im, mb, lct, size, 0);
sc 1135 dev/i2o/iop.c rv = iop_msg_post(sc, im, mb, (chgind == 0 ? 120*1000 : 0));
sc 1136 dev/i2o/iop.c iop_msg_unmap(sc, im);
sc 1137 dev/i2o/iop.c iop_msg_free(sc, im);
sc 1145 dev/i2o/iop.c iop_lct_get(struct iop_softc *sc)
sc 1151 dev/i2o/iop.c esize = letoh32(sc->sc_status.expectedlctsize);
sc 1156 dev/i2o/iop.c if ((rv = iop_lct_get0(sc, lct, esize, 0)) != 0) {
sc 1168 dev/i2o/iop.c if ((rv = iop_lct_get0(sc, lct, size, 0)) != 0) {
sc 1175 dev/i2o/iop.c if (sc->sc_lct != NULL)
sc 1176 dev/i2o/iop.c free(sc->sc_lct, M_DEVBUF);
sc 1177 dev/i2o/iop.c sc->sc_lct = lct;
sc 1178 dev/i2o/iop.c sc->sc_nlctent = ((letoh16(sc->sc_lct->tablesize) << 2) -
sc 1191 dev/i2o/iop.c iop_param_op(struct iop_softc *sc, int tid, struct iop_initiator *ii,
sc 1201 dev/i2o/iop.c im = iop_msg_alloc(sc, ii, (ii == NULL ? IM_WAIT : 0) | IM_NOSTATUS);
sc 1203 dev/i2o/iop.c iop_msg_free(sc, im);
sc 1207 dev/i2o/iop.c iop_msg_free(sc, im);
sc 1236 dev/i2o/iop.c iop_msg_map(sc, im, mb, pgop, sizeof(*pgop), 1);
sc 1237 dev/i2o/iop.c iop_msg_map(sc, im, mb, buf, size, write);
sc 1238 dev/i2o/iop.c rv = iop_msg_post(sc, im, mb, (ii == NULL ? 30000 : 0));
sc 1250 dev/i2o/iop.c iop_msg_unmap(sc, im);
sc 1251 dev/i2o/iop.c iop_msg_free(sc, im);
sc 1263 dev/i2o/iop.c iop_simple_cmd(struct iop_softc *sc, int tid, int function, int ictx,
sc 1271 dev/i2o/iop.c im = iop_msg_alloc(sc, NULL, fl);
sc 1278 dev/i2o/iop.c rv = iop_msg_post(sc, im, &mf, timo);
sc 1279 dev/i2o/iop.c iop_msg_free(sc, im);
sc 1287 dev/i2o/iop.c iop_systab_set(struct iop_softc *sc)
sc 1297 dev/i2o/iop.c im = iop_msg_alloc(sc, NULL, IM_WAIT);
sc 1304 dev/i2o/iop.c mf->iopid = (sc->sc_dv.dv_unit + 2) << 12;
sc 1307 dev/i2o/iop.c mema[1] = sc->sc_status.desiredprivmemsize;
sc 1308 dev/i2o/iop.c ioa[1] = sc->sc_status.desiredpriviosize;
sc 1315 dev/i2o/iop.c rv = bus_space_alloc(sc->sc_bus_memt, 0, 0xffffffff,
sc 1320 dev/i2o/iop.c sc->sc_dv.dv_xname, rv);
sc 1332 dev/i2o/iop.c rv = bus_space_alloc(sc->sc_bus_iot, 0, 0xffff,
sc 1337 dev/i2o/iop.c sc->sc_dv.dv_xname, rv);
sc 1343 dev/i2o/iop.c iop_msg_map(sc, im, mb, iop_systab, iop_systab_size, 1);
sc 1344 dev/i2o/iop.c iop_msg_map(sc, im, mb, mema, sizeof(mema), 1);
sc 1345 dev/i2o/iop.c iop_msg_map(sc, im, mb, ioa, sizeof(ioa), 1);
sc 1346 dev/i2o/iop.c rv = iop_msg_post(sc, im, mb, 5000);
sc 1347 dev/i2o/iop.c iop_msg_unmap(sc, im);
sc 1348 dev/i2o/iop.c iop_msg_free(sc, im);
sc 1356 dev/i2o/iop.c iop_reset(struct iop_softc *sc)
sc 1359 dev/i2o/iop.c paddr_t pa = sc->sc_scr_seg->ds_addr;
sc 1360 dev/i2o/iop.c u_int32_t *sw = (u_int32_t *)sc->sc_scr;
sc 1374 dev/i2o/iop.c bus_dmamap_sync(sc->sc_dmat, sc->sc_scr_dmamap, 0, sizeof(*sw),
sc 1377 dev/i2o/iop.c if ((rv = iop_post(sc, (u_int32_t *)&mf)))
sc 1382 dev/i2o/iop.c (bus_dmamap_sync(sc->sc_dmat, sc->sc_scr_dmamap, 0, sizeof(*sw),
sc 1386 dev/i2o/iop.c sc->sc_dv.dv_xname, letoh32(*sw));
sc 1394 dev/i2o/iop.c POLL(10000, (mfa = iop_inl(sc, IOP_REG_IFIFO)) != IOP_MFA_EMPTY);
sc 1396 dev/i2o/iop.c printf("%s: reset failed\n", sc->sc_dv.dv_xname);
sc 1400 dev/i2o/iop.c iop_release_mfa(sc, mfa);
sc 1410 dev/i2o/iop.c iop_initiator_register(struct iop_softc *sc, struct iop_initiator *ii)
sc 1424 dev/i2o/iop.c LIST_INSERT_HEAD(&sc->sc_iilist, ii, ii_list);
sc 1425 dev/i2o/iop.c sc->sc_nii++;
sc 1427 dev/i2o/iop.c sc->sc_nuii++;
sc 1439 dev/i2o/iop.c iop_initiator_unregister(struct iop_softc *sc, struct iop_initiator *ii)
sc 1445 dev/i2o/iop.c sc->sc_nii--;
sc 1447 dev/i2o/iop.c sc->sc_nuii--;
sc 1458 dev/i2o/iop.c iop_handle_reply(struct iop_softc *sc, u_int32_t rmfa)
sc 1466 dev/i2o/iop.c off = (int)(rmfa - sc->sc_rep_phys);
sc 1467 dev/i2o/iop.c rb = (struct i2o_reply *)(sc->sc_rep + off);
sc 1470 dev/i2o/iop.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rep_dmamap, off,
sc 1471 dev/i2o/iop.c sc->sc_rep_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
sc 1472 dev/i2o/iop.c if (--sc->sc_curib != 0)
sc 1473 dev/i2o/iop.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rep_dmamap, 0,
sc 1474 dev/i2o/iop.c sc->sc_rep_size, BUS_DMASYNC_PREREAD);
sc 1493 dev/i2o/iop.c iop_reply_print(sc, rb);
sc 1496 dev/i2o/iop.c sc->sc_dv.dv_xname, ictx);
sc 1510 dev/i2o/iop.c tctx = iop_inl(sc, fn->lowmfa + 12); /* XXX */
sc 1511 dev/i2o/iop.c iop_release_mfa(sc, fn->lowmfa);
sc 1512 dev/i2o/iop.c iop_tfn_print(sc, fn);
sc 1525 dev/i2o/iop.c im = sc->sc_ims + (tctx & IOP_TCTX_MASK);
sc 1526 dev/i2o/iop.c if ((tctx & IOP_TCTX_MASK) > sc->sc_maxib ||
sc 1530 dev/i2o/iop.c sc->sc_dv.dv_xname, tctx, im);
sc 1533 dev/i2o/iop.c sc->sc_dv.dv_xname, im->im_flags,
sc 1537 dev/i2o/iop.c iop_reply_print(sc, rb);
sc 1547 dev/i2o/iop.c panic("%s: dup reply", sc->sc_dv.dv_xname);
sc 1553 dev/i2o/iop.c iop_reply_print(sc, rb);
sc 1590 dev/i2o/iop.c struct iop_softc *sc;
sc 1593 dev/i2o/iop.c sc = arg;
sc 1595 dev/i2o/iop.c if ((iop_inl(sc, IOP_REG_INTR_STATUS) & IOP_INTR_OFIFO) == 0)
sc 1600 dev/i2o/iop.c if ((rmfa = iop_inl(sc, IOP_REG_OFIFO)) == IOP_MFA_EMPTY) {
sc 1601 dev/i2o/iop.c rmfa = iop_inl(sc, IOP_REG_OFIFO);
sc 1605 dev/i2o/iop.c iop_handle_reply(sc, rmfa);
sc 1606 dev/i2o/iop.c iop_outl(sc, IOP_REG_OFIFO, rmfa);
sc 1619 dev/i2o/iop.c struct iop_softc *sc;
sc 1622 dev/i2o/iop.c sc = (struct iop_softc *)dv;
sc 1636 dev/i2o/iop.c iop_msg_alloc(struct iop_softc *sc, struct iop_initiator *ii, int flags)
sc 1648 dev/i2o/iop.c im = SLIST_FIRST(&sc->sc_im_freelist);
sc 1653 dev/i2o/iop.c SLIST_REMOVE_HEAD(&sc->sc_im_freelist, im_chain);
sc 1675 dev/i2o/iop.c iop_msg_free(struct iop_softc *sc, struct iop_msg *im)
sc 1686 dev/i2o/iop.c SLIST_INSERT_HEAD(&sc->sc_im_freelist, im, im_chain);
sc 1694 dev/i2o/iop.c iop_msg_map(struct iop_softc *sc, struct iop_msg *im, u_int32_t *mb,
sc 1720 dev/i2o/iop.c rv = bus_dmamap_create(sc->sc_dmat, IOP_MAX_XFER,
sc 1728 dev/i2o/iop.c rv = bus_dmamap_load(sc->sc_dmat, dm, xferaddr, xfersize, NULL, 0);
sc 1740 dev/i2o/iop.c bus_dmamap_unload(sc->sc_dmat, ix->ix_map);
sc 1770 dev/i2o/iop.c bus_dmamap_sync(sc->sc_dmat, ix->ix_map, 0, xfersize,
sc 1786 dev/i2o/iop.c bus_dmamap_destroy(sc->sc_dmat, ix->ix_map);
sc 1796 dev/i2o/iop.c iop_msg_map_bio(struct iop_softc *sc, struct iop_msg *im, u_int32_t *mb,
sc 1817 dev/i2o/iop.c rv = bus_dmamap_load(sc->sc_dmat, dm, xferaddr, xfersize, NULL, 0);
sc 1875 dev/i2o/iop.c bus_dmamap_sync(sc->sc_dmat, ix->ix_map, 0,
sc 1891 dev/i2o/iop.c iop_msg_unmap(struct iop_softc *sc, struct iop_msg *im)
sc 1902 dev/i2o/iop.c bus_dmamap_sync(sc->sc_dmat, ix->ix_map, 0, ix->ix_size,
sc 1905 dev/i2o/iop.c bus_dmamap_unload(sc->sc_dmat, ix->ix_map);
sc 1909 dev/i2o/iop.c bus_dmamap_destroy(sc->sc_dmat, ix->ix_map);
sc 1921 dev/i2o/iop.c iop_post(struct iop_softc *sc, u_int32_t *mb)
sc 1944 dev/i2o/iop.c if ((mfa = iop_inl(sc, IOP_REG_IFIFO)) == IOP_MFA_EMPTY)
sc 1945 dev/i2o/iop.c if ((mfa = iop_inl(sc, IOP_REG_IFIFO)) == IOP_MFA_EMPTY) {
sc 1948 dev/i2o/iop.c sc->sc_dv.dv_xname);
sc 1957 dev/i2o/iop.c bus_space_write_region_4(sc->sc_iot, sc->sc_ioh, mfa, mb,
sc 1959 dev/i2o/iop.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, mfa, size,
sc 1963 dev/i2o/iop.c iop_outl(sc, IOP_REG_IFIFO, mfa);
sc 1973 dev/i2o/iop.c iop_msg_post(struct iop_softc *sc, struct iop_msg *im, void *xmb, int timo)
sc 1984 dev/i2o/iop.c if (sc->sc_curib++ == 0)
sc 1985 dev/i2o/iop.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rep_dmamap, 0,
sc 1986 dev/i2o/iop.c sc->sc_rep_size, BUS_DMASYNC_PREREAD);
sc 1988 dev/i2o/iop.c if ((rv = iop_post(sc, mb)) != 0)
sc 1992 dev/i2o/iop.c iop_msg_free(sc, im);
sc 1998 dev/i2o/iop.c iop_msg_poll(sc, im, timo);
sc 2000 dev/i2o/iop.c iop_msg_wait(sc, im, timo);
sc 2025 dev/i2o/iop.c iop_msg_poll(struct iop_softc *sc, struct iop_msg *im, int timo)
sc 2034 dev/i2o/iop.c if ((iop_inl(sc, IOP_REG_INTR_STATUS) & IOP_INTR_OFIFO) != 0) {
sc 2036 dev/i2o/iop.c rmfa = iop_inl(sc, IOP_REG_OFIFO);
sc 2038 dev/i2o/iop.c rmfa = iop_inl(sc, IOP_REG_OFIFO);
sc 2040 dev/i2o/iop.c status = iop_handle_reply(sc, rmfa);
sc 2046 dev/i2o/iop.c iop_outl(sc, IOP_REG_OFIFO, rmfa);
sc 2056 dev/i2o/iop.c printf("%s: poll - no reply\n", sc->sc_dv.dv_xname);
sc 2057 dev/i2o/iop.c if (iop_status_get(sc, 1) != 0)
sc 2061 dev/i2o/iop.c (letoh32(sc->sc_status.segnumber) >> 16) & 0xff);
sc 2072 dev/i2o/iop.c iop_msg_wait(struct iop_softc *sc, struct iop_msg *im, int timo)
sc 2087 dev/i2o/iop.c if (iop_status_get(sc, 0) != 0)
sc 2091 dev/i2o/iop.c (letoh32(sc->sc_status.segnumber) >> 16) & 0xff);
sc 2100 dev/i2o/iop.c iop_release_mfa(struct iop_softc *sc, u_int32_t mfa)
sc 2104 dev/i2o/iop.c iop_outl(sc, mfa, I2O_VERSION_11 | (4 << 16));
sc 2105 dev/i2o/iop.c iop_outl(sc, mfa + 4, I2O_MSGFUNC(I2O_TID_IOP, I2O_UTIL_NOP));
sc 2106 dev/i2o/iop.c iop_outl(sc, mfa + 8, 0);
sc 2107 dev/i2o/iop.c iop_outl(sc, mfa + 12, 0);
sc 2109 dev/i2o/iop.c iop_outl(sc, IOP_REG_IFIFO, mfa);
sc 2117 dev/i2o/iop.c iop_reply_print(struct iop_softc *sc, struct i2o_reply *rb)
sc 2127 dev/i2o/iop.c printf("%s: reply:\n", sc->sc_dv.dv_xname);
sc 2136 dev/i2o/iop.c sc->sc_dv.dv_xname, function, rb->reqstatus, statusstr);
sc 2139 dev/i2o/iop.c sc->sc_dv.dv_xname, function, rb->reqstatus);
sc 2142 dev/i2o/iop.c sc->sc_dv.dv_xname, detail, letoh32(rb->msgictx),
sc 2144 dev/i2o/iop.c printf("%s: tidi=%d tidt=%d flags=0x%02x\n", sc->sc_dv.dv_xname,
sc 2154 dev/i2o/iop.c iop_tfn_print(struct iop_softc *sc, struct i2o_fault_notify *fn)
sc 2157 dev/i2o/iop.c printf("%s: WARNING: transport failure:\n", sc->sc_dv.dv_xname);
sc 2159 dev/i2o/iop.c printf("%s: ictx=0x%08x tctx=0x%08x\n", sc->sc_dv.dv_xname,
sc 2162 dev/i2o/iop.c sc->sc_dv.dv_xname, fn->failurecode, fn->severity);
sc 2164 dev/i2o/iop.c sc->sc_dv.dv_xname, fn->highestver, fn->lowestver);
sc 2171 dev/i2o/iop.c iop_strvis(struct iop_softc *sc, const char *src, int slen, char *dst, int dlen)
sc 2185 dev/i2o/iop.c nit = (letoh16(sc->sc_status.orgid) != I2O_ORG_DPT);
sc 2208 dev/i2o/iop.c iop_print_ident(struct iop_softc *sc, int tid)
sc 2218 dev/i2o/iop.c rv = iop_param_op(sc, tid, NULL, 0, I2O_PARAM_DEVICE_IDENTITY, &p,
sc 2223 dev/i2o/iop.c iop_strvis(sc, p.di.vendorinfo, sizeof(p.di.vendorinfo), buf,
sc 2226 dev/i2o/iop.c iop_strvis(sc, p.di.productinfo, sizeof(p.di.productinfo), buf,
sc 2229 dev/i2o/iop.c iop_strvis(sc, p.di.revlevel, sizeof(p.di.revlevel), buf, sizeof(buf));
sc 2239 dev/i2o/iop.c iop_util_claim(struct iop_softc *sc, struct iop_initiator *ii, int release,
sc 2247 dev/i2o/iop.c im = iop_msg_alloc(sc, ii, IM_WAIT);
sc 2256 dev/i2o/iop.c rv = iop_msg_post(sc, im, &mf, 5000);
sc 2257 dev/i2o/iop.c iop_msg_free(sc, im);
sc 2264 dev/i2o/iop.c int iop_util_abort(struct iop_softc *sc, struct iop_initiator *ii, int func,
sc 2271 dev/i2o/iop.c im = iop_msg_alloc(sc, ii, IM_WAIT);
sc 2280 dev/i2o/iop.c rv = iop_msg_post(sc, im, &mf, 5000);
sc 2281 dev/i2o/iop.c iop_msg_free(sc, im);
sc 2288 dev/i2o/iop.c int iop_util_eventreg(struct iop_softc *sc, struct iop_initiator *ii, int mask)
sc 2293 dev/i2o/iop.c im = iop_msg_alloc(sc, ii, 0);
sc 2302 dev/i2o/iop.c return (iop_msg_post(sc, im, &mf, 0));
sc 2308 dev/i2o/iop.c struct iop_softc *sc;
sc 2310 dev/i2o/iop.c if (!(sc = (struct iop_softc *)device_lookup(&iop_cd, minor(dev))))
sc 2312 dev/i2o/iop.c if ((sc->sc_flags & IOP_ONLINE) == 0)
sc 2314 dev/i2o/iop.c if ((sc->sc_flags & IOP_OPEN) != 0)
sc 2316 dev/i2o/iop.c sc->sc_flags |= IOP_OPEN;
sc 2318 dev/i2o/iop.c sc->sc_ptb = malloc(IOP_MAX_XFER * IOP_MAX_MSG_XFERS, M_DEVBUF,
sc 2320 dev/i2o/iop.c if (sc->sc_ptb == NULL) {
sc 2321 dev/i2o/iop.c sc->sc_flags ^= IOP_OPEN;
sc 2331 dev/i2o/iop.c struct iop_softc *sc;
sc 2333 dev/i2o/iop.c sc = (struct iop_softc *)device_lookup(&iop_cd, minor(dev)); /* XXX */
sc 2334 dev/i2o/iop.c free(sc->sc_ptb, M_DEVBUF);
sc 2335 dev/i2o/iop.c sc->sc_flags &= ~IOP_OPEN;
sc 2342 dev/i2o/iop.c struct iop_softc *sc;
sc 2349 dev/i2o/iop.c sc = (struct iop_softc *)device_lookup(&iop_cd, minor(dev)); /* XXX */
sc 2353 dev/i2o/iop.c return (iop_passthrough(sc, (struct ioppt *)data));
sc 2362 dev/i2o/iop.c if ((rv = iop_status_get(sc, 0)) == 0)
sc 2363 dev/i2o/iop.c rv = copyout(&sc->sc_status, iov->iov_base, i);
sc 2373 dev/i2o/iop.c printf("%s: unknown ioctl %lx\n", sc->sc_dv.dv_xname, cmd);
sc 2378 dev/i2o/iop.c if ((rv = lockmgr(&sc->sc_conflock, LK_SHARED, NULL)) != 0)
sc 2384 dev/i2o/iop.c i = letoh16(sc->sc_lct->tablesize) << 2;
sc 2389 dev/i2o/iop.c rv = copyout(sc->sc_lct, iov->iov_base, i);
sc 2393 dev/i2o/iop.c rv = iop_reconfigure(sc, 0);
sc 2398 dev/i2o/iop.c i = sizeof(struct iop_tidmap) * sc->sc_nlctent;
sc 2403 dev/i2o/iop.c rv = copyout(sc->sc_tidmap, iov->iov_base, i);
sc 2407 dev/i2o/iop.c lockmgr(&sc->sc_conflock, LK_RELEASE, NULL);
sc 2412 dev/i2o/iop.c iop_passthrough(struct iop_softc *sc, struct ioppt *pt)
sc 2425 dev/i2o/iop.c pt->pt_msglen > (letoh16(sc->sc_status.inboundmframesize) << 2) ||
sc 2445 dev/i2o/iop.c im = iop_msg_alloc(sc, NULL, IM_WAIT | IM_NOSTATUS);
sc 2452 dev/i2o/iop.c buf = sc->sc_ptb + i * IOP_MAX_XFER;
sc 2465 dev/i2o/iop.c rv = iop_msg_map(sc, im, (u_int32_t *)mf, buf,
sc 2472 dev/i2o/iop.c if ((rv = iop_msg_post(sc, im, mf, pt->pt_timo)) != 0)
sc 2483 dev/i2o/iop.c iop_msg_unmap(sc, im);
sc 2490 dev/i2o/iop.c buf = sc->sc_ptb + i * IOP_MAX_XFER;
sc 2498 dev/i2o/iop.c iop_msg_unmap(sc, im);
sc 2500 dev/i2o/iop.c iop_msg_free(sc, im);
sc 180 dev/i2o/ioprbs.c struct ioprbs_softc *sc = (struct ioprbs_softc *)self;
sc 198 dev/i2o/ioprbs.c TAILQ_INIT(&sc->sc_free_ccb);
sc 199 dev/i2o/ioprbs.c TAILQ_INIT(&sc->sc_ccbq);
sc 200 dev/i2o/ioprbs.c LIST_INIT(&sc->sc_queue);
sc 204 dev/i2o/ioprbs.c TAILQ_INSERT_TAIL(&sc->sc_free_ccb, &sc->sc_ccbs[i],
sc 208 dev/i2o/ioprbs.c sc->sc_ii.ii_dv = self;
sc 209 dev/i2o/ioprbs.c sc->sc_ii.ii_intr = ioprbs_intr;
sc 210 dev/i2o/ioprbs.c sc->sc_ii.ii_adjqparam = ioprbs_adjqparam;
sc 211 dev/i2o/ioprbs.c sc->sc_ii.ii_flags = 0;
sc 212 dev/i2o/ioprbs.c sc->sc_ii.ii_tid = ia->ia_tid;
sc 213 dev/i2o/ioprbs.c iop_initiator_register(iop, &sc->sc_ii);
sc 216 dev/i2o/ioprbs.c sc->sc_eventii.ii_dv = self;
sc 217 dev/i2o/ioprbs.c sc->sc_eventii.ii_intr = ioprbs_intr_event;
sc 218 dev/i2o/ioprbs.c sc->sc_eventii.ii_flags = II_DISCARD | II_UTILITY;
sc 219 dev/i2o/ioprbs.c sc->sc_eventii.ii_tid = ia->ia_tid;
sc 220 dev/i2o/ioprbs.c iop_initiator_register(iop, &sc->sc_eventii);
sc 222 dev/i2o/ioprbs.c rv = iop_util_eventreg(iop, &sc->sc_eventii,
sc 235 dev/i2o/ioprbs.c sc->sc_maxqueuecnt = 1;
sc 237 dev/i2o/ioprbs.c sc->sc_maxxfer = IOP_MAX_XFER;
sc 247 dev/i2o/ioprbs.c rv = iop_util_claim(iop, &sc->sc_ii, 0,
sc 252 dev/i2o/ioprbs.c sc->sc_flags = rv ? 0 : IOPRBS_CLAIMED;
sc 258 dev/i2o/ioprbs.c sc->sc_dv.dv_xname, I2O_PARAM_RBS_DEVICE_INFO, rv);
sc 262 dev/i2o/ioprbs.c sc->sc_secsize = letoh32(param.p.bdi.blocksize);
sc 263 dev/i2o/ioprbs.c sc->sc_secperunit = (int)
sc 264 dev/i2o/ioprbs.c (letoh64(param.p.bdi.capacity) / sc->sc_secsize);
sc 308 dev/i2o/ioprbs.c sc->sc_dv.dv_xname, I2O_PARAM_RBS_CACHE_CONTROL, rv);
sc 325 dev/i2o/ioprbs.c sc->sc_dv.dv_xname, I2O_PARAM_RBS_OPERATION, rv);
sc 343 dev/i2o/ioprbs.c sc->sc_dv.dv_xname, I2O_PARAM_RBS_OPERATION, rv);
sc 349 dev/i2o/ioprbs.c sc->sc_flags |= IOPRBS_ENABLED;
sc 354 dev/i2o/ioprbs.c sc->sc_link.adapter_softc = sc;
sc 355 dev/i2o/ioprbs.c sc->sc_link.adapter = &ioprbs_switch;
sc 356 dev/i2o/ioprbs.c sc->sc_link.device = &ioprbs_dev;
sc 357 dev/i2o/ioprbs.c sc->sc_link.openings = 1;
sc 358 dev/i2o/ioprbs.c sc->sc_link.adapter_buswidth = 1;
sc 359 dev/i2o/ioprbs.c sc->sc_link.adapter_target = 1;
sc 362 dev/i2o/ioprbs.c saa.saa_sc_link = &sc->sc_link;
sc 364 dev/i2o/ioprbs.c config_found(&sc->sc_dv, &saa, scsiprint);
sc 369 dev/i2o/ioprbs.c ioprbs_unconfig(sc, state > 0);
sc 373 dev/i2o/ioprbs.c ioprbs_unconfig(struct ioprbs_softc *sc, int evreg)
sc 378 dev/i2o/ioprbs.c iop = (struct iop_softc *)sc->sc_dv.dv_parent;
sc 380 dev/i2o/ioprbs.c if ((sc->sc_flags & IOPRBS_CLAIMED) != 0)
sc 381 dev/i2o/ioprbs.c iop_util_claim(iop, &sc->sc_ii, 1,
sc 390 dev/i2o/ioprbs.c sc->sc_flags &= ~IOPRBS_NEW_EVTMASK;
sc 391 dev/i2o/ioprbs.c iop_util_eventreg(iop, &sc->sc_eventii,
sc 394 dev/i2o/ioprbs.c if ((sc->sc_flags & IOPRBS_NEW_EVTMASK) == 0)
sc 395 dev/i2o/ioprbs.c tsleep(&sc->sc_eventii, PRIBIO, "ioprbsevt", hz * 5);
sc 398 dev/i2o/ioprbs.c if ((sc->sc_flags & IOPRBS_NEW_EVTMASK) == 0)
sc 400 dev/i2o/ioprbs.c sc->sc_dv.dv_xname);
sc 404 dev/i2o/ioprbs.c iop_initiator_unregister(iop, &sc->sc_eventii);
sc 405 dev/i2o/ioprbs.c iop_initiator_unregister(iop, &sc->sc_ii);
sc 413 dev/i2o/ioprbs.c struct ioprbs_softc *sc = link->adapter_softc;
sc 421 dev/i2o/ioprbs.c lock = IOPRBS_LOCK(sc);
sc 424 dev/i2o/ioprbs.c if (xs != LIST_FIRST(&sc->sc_queue))
sc 425 dev/i2o/ioprbs.c ioprbs_enqueue(sc, xs, 0);
sc 427 dev/i2o/ioprbs.c while ((xs = ioprbs_dequeue(sc))) {
sc 490 dev/i2o/ioprbs.c if (blockno >= sc->sc_secperunit ||
sc 491 dev/i2o/ioprbs.c blockno + blockcnt > sc->sc_secperunit) {
sc 494 dev/i2o/ioprbs.c sc->sc_dv.dv_xname, blockno,
sc 495 dev/i2o/ioprbs.c blockcnt, sc->sc_secperunit);
sc 508 dev/i2o/ioprbs.c ccb = ioprbs_get_ccb(sc, xs->flags);
sc 514 dev/i2o/ioprbs.c IOPRBS_UNLOCK(sc, lock);
sc 523 dev/i2o/ioprbs.c ioprbs_enqueue_ccb(sc, ccb);
sc 528 dev/i2o/ioprbs.c if (!ioprbs_wait(sc, ccb, ccb->ic_timeout)) {
sc 529 dev/i2o/ioprbs.c IOPRBS_UNLOCK(sc, lock);
sc 531 dev/i2o/ioprbs.c sc->sc_dv.dv_xname);
sc 550 dev/i2o/ioprbs.c IOPRBS_UNLOCK(sc, lock);
sc 567 dev/i2o/ioprbs.c struct ioprbs_softc *sc = (struct ioprbs_softc *)dv;
sc 606 dev/i2o/ioprbs.c ioprbs_free_ccb(sc, ccb);
sc 613 dev/i2o/ioprbs.c struct ioprbs_softc *sc;
sc 622 dev/i2o/ioprbs.c sc = (struct ioprbs_softc *)dv;
sc 625 dev/i2o/ioprbs.c sc->sc_flags |= IOPRBS_NEW_EVTMASK;
sc 626 dev/i2o/ioprbs.c wakeup(&sc->sc_eventii);
sc 659 dev/i2o/ioprbs.c ioprbs_enqueue(sc, xs, infront)
sc 660 dev/i2o/ioprbs.c struct ioprbs_softc *sc;
sc 664 dev/i2o/ioprbs.c if (infront || LIST_FIRST(&sc->sc_queue) == NULL) {
sc 665 dev/i2o/ioprbs.c if (LIST_FIRST(&sc->sc_queue) == NULL)
sc 666 dev/i2o/ioprbs.c sc->sc_queuelast = xs;
sc 667 dev/i2o/ioprbs.c LIST_INSERT_HEAD(&sc->sc_queue, xs, free_list);
sc 670 dev/i2o/ioprbs.c LIST_INSERT_AFTER(sc->sc_queuelast, xs, free_list);
sc 671 dev/i2o/ioprbs.c sc->sc_queuelast = xs;
sc 678 dev/i2o/ioprbs.c ioprbs_dequeue(sc)
sc 679 dev/i2o/ioprbs.c struct ioprbs_softc *sc;
sc 683 dev/i2o/ioprbs.c xs = LIST_FIRST(&sc->sc_queue);
sc 688 dev/i2o/ioprbs.c if (LIST_FIRST(&sc->sc_queue) == NULL)
sc 689 dev/i2o/ioprbs.c sc->sc_queuelast = NULL;
sc 718 dev/i2o/ioprbs.c struct ioprbs_softc *sc = link->adapter_softc;
sc 772 dev/i2o/ioprbs.c _lto4b(sc->sc_secperunit - 1, rcd.addr);
sc 788 dev/i2o/ioprbs.c ioprbs_get_ccb(sc, flags)
sc 789 dev/i2o/ioprbs.c struct ioprbs_softc *sc;
sc 795 dev/i2o/ioprbs.c DPRINTF(("ioprbs_get_ccb(%p, 0x%x) ", sc, flags));
sc 797 dev/i2o/ioprbs.c lock = IOPRBS_LOCK(sc);
sc 800 dev/i2o/ioprbs.c ccb = TAILQ_FIRST(&sc->sc_free_ccb);
sc 805 dev/i2o/ioprbs.c tsleep(&sc->sc_free_ccb, PRIBIO, "ioprbs_ccb", 0);
sc 808 dev/i2o/ioprbs.c TAILQ_REMOVE(&sc->sc_free_ccb, ccb, ic_chain);
sc 814 dev/i2o/ioprbs.c IOPRBS_UNLOCK(sc, lock);
sc 819 dev/i2o/ioprbs.c ioprbs_free_ccb(sc, ccb)
sc 820 dev/i2o/ioprbs.c struct ioprbs_softc *sc;
sc 825 dev/i2o/ioprbs.c DPRINTF(("ioprbs_free_ccb(%p, %p) ", sc, ccb));
sc 827 dev/i2o/ioprbs.c lock = IOPRBS_LOCK(sc);
sc 829 dev/i2o/ioprbs.c TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, ic_chain);
sc 833 dev/i2o/ioprbs.c wakeup(&sc->sc_free_ccb);
sc 835 dev/i2o/ioprbs.c IOPRBS_UNLOCK(sc, lock);
sc 839 dev/i2o/ioprbs.c ioprbs_enqueue_ccb(sc, ccb)
sc 840 dev/i2o/ioprbs.c struct ioprbs_softc *sc;
sc 843 dev/i2o/ioprbs.c DPRINTF(("ioprbs_enqueue_ccb(%p, %p) ", sc, ccb));
sc 846 dev/i2o/ioprbs.c TAILQ_INSERT_TAIL(&sc->sc_ccbq, ccb, ic_chain);
sc 847 dev/i2o/ioprbs.c ioprbs_start_ccbs(sc);
sc 851 dev/i2o/ioprbs.c ioprbs_start_ccbs(sc)
sc 852 dev/i2o/ioprbs.c struct ioprbs_softc *sc;
sc 857 dev/i2o/ioprbs.c DPRINTF(("ioprbs_start_ccbs(%p) ", sc));
sc 859 dev/i2o/ioprbs.c while ((ccb = TAILQ_FIRST(&sc->sc_ccbq)) != NULL) {
sc 873 dev/i2o/ioprbs.c TAILQ_REMOVE(&sc->sc_ccbq, ccb, ic_chain);
sc 908 dev/i2o/ioprbs.c struct ioprbs_softc *sc = link->adapter_softc;
sc 913 dev/i2o/ioprbs.c struct iop_softc *iop = (struct iop_softc *)sc->sc_dv.dv_parent;
sc 919 dev/i2o/ioprbs.c im = iop_msg_alloc(iop, &sc->sc_ii, 0);
sc 949 dev/i2o/ioprbs.c mf->msgfunc = I2O_MSGFUNC(sc->sc_ii.ii_tid, mode);
sc 950 dev/i2o/ioprbs.c mf->msgictx = sc->sc_ii.ii_ictx;
sc 977 dev/i2o/ioprbs.c struct ioprbs_softc *sc = link->adapter_softc;
sc 986 dev/i2o/ioprbs.c lock = IOPRBS_LOCK(sc);
sc 987 dev/i2o/ioprbs.c ioprbs_enqueue_ccb(sc, ccb);
sc 988 dev/i2o/ioprbs.c IOPRBS_UNLOCK(sc, lock);
sc 997 dev/i2o/ioprbs.c struct ioprbs_softc *sc = link->adapter_softc;
sc 1000 dev/i2o/ioprbs.c lock = IOPRBS_LOCK(sc);
sc 1002 dev/i2o/ioprbs.c ioprbs_start_ccbs(sc);
sc 1003 dev/i2o/ioprbs.c IOPRBS_UNLOCK(sc, lock);
sc 92 dev/i2o/ioprbsvar.h #define IOPRBS_LOCK(sc) splbio()
sc 93 dev/i2o/ioprbsvar.h #define IOPRBS_UNLOCK(sc, lock) splx(lock)
sc 137 dev/i2o/iopsp.c struct iopsp_softc *sc = (struct iopsp_softc *)self;
sc 155 dev/i2o/iopsp.c sc->sc_ii.ii_dv = self;
sc 156 dev/i2o/iopsp.c sc->sc_ii.ii_intr = iopsp_intr;
sc 157 dev/i2o/iopsp.c sc->sc_ii.ii_flags = 0;
sc 158 dev/i2o/iopsp.c sc->sc_ii.ii_tid = ia->ia_tid;
sc 159 dev/i2o/iopsp.c sc->sc_ii.ii_reconfig = iopsp_reconfig;
sc 160 dev/i2o/iopsp.c sc->sc_ii.ii_adjqparam = iopsp_adjqparam;
sc 161 dev/i2o/iopsp.c iop_initiator_register(iop, &sc->sc_ii);
sc 167 dev/i2o/iopsp.c sc->sc_dv.dv_xname, I2O_PARAM_HBA_CTLR_INFO, rv);
sc 185 dev/i2o/iopsp.c sc->sc_dv.dv_xname, I2O_PARAM_HBA_SCSI_CTLR_INFO, rv);
sc 191 dev/i2o/iopsp.c sc->sc_dv.dv_xname, param.p.sci.maxdatawidth,
sc 196 dev/i2o/iopsp.c sc->sc_link.adapter_softc = sc;
sc 197 dev/i2o/iopsp.c sc->sc_link.adapter = &iopsp_switch;
sc 198 dev/i2o/iopsp.c sc->sc_link.adapter_target = letoh32(param.p.sci.initiatorid);
sc 199 dev/i2o/iopsp.c sc->sc_link.device = &iopsp_dev;
sc 200 dev/i2o/iopsp.c sc->sc_link.openings = 1;
sc 201 dev/i2o/iopsp.c sc->sc_link.adapter_buswidth = fcal?
sc 203 dev/i2o/iopsp.c sc->sc_link.luns = IOPSP_MAX_LUN;
sc 210 dev/i2o/iopsp.c size = sc->sc_link.adapter_buswidth * sizeof(struct iopsp_target);
sc 211 dev/i2o/iopsp.c sc->sc_targetmap = malloc(size, M_DEVBUF, M_NOWAIT);
sc 212 dev/i2o/iopsp.c bzero(sc->sc_targetmap, size);
sc 217 dev/i2o/iopsp.c printf("%s: configure failed\n", sc->sc_dv.dv_xname);
sc 222 dev/i2o/iopsp.c saa.saa_sc_link = &sc->sc_link;
sc 224 dev/i2o/iopsp.c config_found(&sc->sc_dv, &saa, scsiprint);
sc 228 dev/i2o/iopsp.c iop_initiator_unregister(iop, &sc->sc_ii);
sc 238 dev/i2o/iopsp.c struct iopsp_softc *sc = (struct iopsp_softc *)dv;
sc 239 dev/i2o/iopsp.c struct iop_softc *iop = (struct iop_softc *)sc->sc_dv.dv_parent;
sc 254 dev/i2o/iopsp.c if (iop->sc_chgind == sc->sc_chgind)
sc 262 dev/i2o/iopsp.c size = sc->sc_link.adapter_buswidth * IOPSP_MAX_LUN * sizeof(u_short);
sc 268 dev/i2o/iopsp.c for (i = 0; i < sc->sc_link.adapter_buswidth; i++)
sc 269 dev/i2o/iopsp.c sc->sc_targetmap[i].it_flags &= ~IT_PRESENT;
sc 275 dev/i2o/iopsp.c bptid = sc->sc_ii.ii_tid;
sc 297 dev/i2o/iopsp.c sc->sc_dv.dv_xname, I2O_PARAM_SCSI_DEVICE_INFO,
sc 304 dev/i2o/iopsp.c if (targ >= sc->sc_link.adapter_buswidth ||
sc 305 dev/i2o/iopsp.c lun >= sc->sc_link.adapter_buswidth) {
sc 307 dev/i2o/iopsp.c sc->sc_dv.dv_xname, targ, lun, tid);
sc 317 dev/i2o/iopsp.c it = &sc->sc_targetmap[targ];
sc 329 dev/i2o/iopsp.c printf("%s: target %d (tid %d): %d-bit, ", sc->sc_dv.dv_xname,
sc 341 dev/i2o/iopsp.c if (sc->sc_tidmap == NULL ||
sc 342 dev/i2o/iopsp.c IOPSP_TIDMAP(sc->sc_tidmap, targ, lun) !=
sc 345 dev/i2o/iopsp.c " tid %d\n", sc->sc_dv.dv_xname,
sc 355 dev/i2o/iopsp.c for (i = 0; i < sc->sc_link.adapter_buswidth; i++)
sc 356 dev/i2o/iopsp.c if ((sc->sc_targetmap[i].it_flags & IT_PRESENT) == 0)
sc 357 dev/i2o/iopsp.c sc->sc_targetmap[i].it_width = 0;
sc 362 dev/i2o/iopsp.c if (sc->sc_tidmap != NULL)
sc 363 dev/i2o/iopsp.c free(sc->sc_tidmap, M_DEVBUF);
sc 364 dev/i2o/iopsp.c sc->sc_tidmap = tidmap;
sc 366 dev/i2o/iopsp.c sc->sc_chgind = iop->sc_chgind;
sc 374 dev/i2o/iopsp.c iopsp_rescan(struct iopsp_softc *sc)
sc 381 dev/i2o/iopsp.c iop = (struct iop_softc *)sc->sc_dv.dv_parent;
sc 391 dev/i2o/iopsp.c im = iop_msg_alloc(iop, &sc->sc_ii, IM_WAIT);
sc 394 dev/i2o/iopsp.c mf.msgfunc = I2O_MSGFUNC(sc->sc_ii.ii_tid, I2O_HBA_BUS_SCAN);
sc 395 dev/i2o/iopsp.c mf.msgictx = sc->sc_ii.ii_ictx;
sc 402 dev/i2o/iopsp.c sc->sc_dv.dv_xname, rv);
sc 405 dev/i2o/iopsp.c rv = iopsp_reconfig(&sc->sc_dv);
sc 428 dev/i2o/iopsp.c struct iopsp_softc *sc = (struct iopsp_softc *)link->adapter_softc;
sc 429 dev/i2o/iopsp.c struct iop_softc *iop = (struct iop_softc *)sc->sc_dv.dv_parent;
sc 435 dev/i2o/iopsp.c tid = IOPSP_TIDMAP(sc->sc_tidmap, link->target, link->lun);
sc 447 dev/i2o/iopsp.c sc->sc_ii.ii_ictx, 1, 30*1000) != 0) {
sc 450 dev/i2o/iopsp.c sc->sc_dv.dv_xname);
sc 462 dev/i2o/iopsp.c panic("%s: CDB too large", sc->sc_dv.dv_xname);
sc 465 dev/i2o/iopsp.c im = iop_msg_alloc(iop, &sc->sc_ii, IM_POLL_INTR |
sc 472 dev/i2o/iopsp.c mf->msgictx = sc->sc_ii.ii_ictx;
sc 511 dev/i2o/iopsp.c sc->sc_curqd++;
sc 516 dev/i2o/iopsp.c sc->sc_curqd--;
sc 534 dev/i2o/iopsp.c iopsp_scsi_abort(struct iopsp_softc *sc, int atid, struct iop_msg *aim)
sc 541 dev/i2o/iopsp.c iop = (struct iop_softc *)sc->sc_dv.dv_parent;
sc 542 dev/i2o/iopsp.c im = iop_msg_alloc(iop, &sc->sc_ii, IM_POLL);
sc 546 dev/i2o/iopsp.c mf.msgictx = sc->sc_ii.ii_ictx;
sc 566 dev/i2o/iopsp.c struct iopsp_softc *sc;
sc 571 dev/i2o/iopsp.c sc = (struct iopsp_softc *)dv;
sc 602 dev/i2o/iopsp.c printf("%s: HBA status 0x%02x\n", sc->sc_dv.dv_xname,
sc 633 dev/i2o/iopsp.c if (--sc->sc_curqd == sc->sc_link.openings)
sc 634 dev/i2o/iopsp.c wakeup(&sc->sc_curqd);
sc 645 dev/i2o/iopsp.c struct iopsp_softc *sc = (struct iopsp_softc *)dv;
sc 649 dev/i2o/iopsp.c sc->sc_link.openings = mpi;
sc 650 dev/i2o/iopsp.c if (mpi < sc->sc_curqd)
sc 651 dev/i2o/iopsp.c tsleep(&sc->sc_curqd, PWAIT, "iopspdrn", 0);
sc 88 dev/ic/aac.c int aac_enqueue_response(struct aac_softc *sc, int queue,
sc 225 dev/ic/aac.c aac_attach(struct aac_softc *sc)
sc 233 dev/ic/aac.c aac_initq_free(sc);
sc 234 dev/ic/aac.c aac_initq_ready(sc);
sc 235 dev/ic/aac.c aac_initq_busy(sc);
sc 236 dev/ic/aac.c aac_initq_bio(sc);
sc 239 dev/ic/aac.c AAC_MASK_INTERRUPTS(sc);
sc 242 dev/ic/aac.c sc->aac_state |= AAC_STATE_SUSPEND;
sc 247 dev/ic/aac.c error = aac_check_firmware(sc);
sc 254 dev/ic/aac.c AAC_LOCK_INIT(&sc->aac_sync_lock, "AAC sync FIB lock");
sc 255 dev/ic/aac.c AAC_LOCK_INIT(&sc->aac_aifq_lock, "AAC AIF lock");
sc 256 dev/ic/aac.c AAC_LOCK_INIT(&sc->aac_io_lock, "AAC I/O lock");
sc 257 dev/ic/aac.c AAC_LOCK_INIT(&sc->aac_container_lock, "AAC container lock");
sc 258 dev/ic/aac.c TAILQ_INIT(&sc->aac_container_tqh);
sc 261 dev/ic/aac.c sc->aac_aifq_head = sc->aac_aifq_tail = AAC_AIFQ_LENGTH;
sc 266 dev/ic/aac.c error = aac_init(sc);
sc 271 dev/ic/aac.c sc->aac_link.adapter_softc = sc;
sc 272 dev/ic/aac.c sc->aac_link.adapter = &aac_switch;
sc 273 dev/ic/aac.c sc->aac_link.device = &aac_dev;
sc 274 dev/ic/aac.c sc->aac_link.openings = (sc->total_fibs - 8) /
sc 275 dev/ic/aac.c (sc->aac_container_count ? sc->aac_container_count : 1);
sc 276 dev/ic/aac.c sc->aac_link.adapter_buswidth = AAC_MAX_CONTAINERS;
sc 277 dev/ic/aac.c sc->aac_link.adapter_target = AAC_MAX_CONTAINERS;
sc 280 dev/ic/aac.c saa.saa_sc_link = &sc->aac_link;
sc 282 dev/ic/aac.c config_found(&sc->aac_dev, &saa, scsiprint);
sc 285 dev/ic/aac.c sc->aifthread = 0;
sc 286 dev/ic/aac.c sc->aifflags = 0;
sc 287 dev/ic/aac.c kthread_create_deferred(aac_create_thread, sc);
sc 291 dev/ic/aac.c sc->aac_sdh = shutdownhook_establish(aac_shutdown, (void *)sc);
sc 300 dev/ic/aac.c struct aac_softc *sc = arg;
sc 302 dev/ic/aac.c if (kthread_create(aac_command_thread, sc, &sc->aifthread, "%s",
sc 303 dev/ic/aac.c sc->aac_dev.dv_xname)) {
sc 306 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 309 dev/ic/aac.c sc->aac_dev.dv_xname));
sc 317 dev/ic/aac.c aac_startup(struct aac_softc *sc)
sc 325 dev/ic/aac.c aac_alloc_sync_fib(sc, &fib, 0);
sc 328 dev/ic/aac.c AAC_DPRINTF(AAC_D_MISC, ("%s: aac startup\n", sc->aac_dev.dv_xname));
sc 330 dev/ic/aac.c sc->aac_container_count = 0;
sc 338 dev/ic/aac.c if (aac_sync_fib(sc, ContainerCommand, 0, fib,
sc 341 dev/ic/aac.c sc->aac_dev.dv_xname, i);
sc 350 dev/ic/aac.c aac_add_container(sc, mir, 0);
sc 362 dev/ic/aac.c sc->aac_dev.dv_xname, i,
sc 368 dev/ic/aac.c sc->aac_container_count++;
sc 369 dev/ic/aac.c sc->aac_hdr[i].hd_present = 1;
sc 370 dev/ic/aac.c sc->aac_hdr[i].hd_size = mir->MntTable[0].Capacity;
sc 375 dev/ic/aac.c sc->aac_hdr[i].hd_size &= ~AAC_SECS32;
sc 376 dev/ic/aac.c aac_eval_mapping(sc->aac_hdr[i].hd_size, &drv_cyls,
sc 378 dev/ic/aac.c sc->aac_hdr[i].hd_heads = drv_hds;
sc 379 dev/ic/aac.c sc->aac_hdr[i].hd_secs = drv_secs;
sc 381 dev/ic/aac.c sc->aac_hdr[i].hd_size = drv_cyls * drv_hds * drv_secs;
sc 383 dev/ic/aac.c sc->aac_hdr[i].hd_devtype = mir->MntTable[0].VolType;
sc 392 dev/ic/aac.c aac_release_sync_fib(sc);
sc 396 dev/ic/aac.c if (bus_generic_attach(sc->aac_dev))
sc 398 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 403 dev/ic/aac.c sc->aac_state &= ~AAC_STATE_SUSPEND;
sc 406 dev/ic/aac.c AAC_UNMASK_INTERRUPTS(sc);
sc 414 dev/ic/aac.c aac_add_container(struct aac_softc *sc, struct aac_mntinforesp *mir, int f)
sc 431 dev/ic/aac.c sc->aac_dev.dv_xname,
sc 437 dev/ic/aac.c if ((child = device_add_child(sc->aac_dev, "aacd", -1)) == NULL)
sc 439 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 448 dev/ic/aac.c AAC_LOCK_ACQUIRE(&sc->aac_container_lock);
sc 449 dev/ic/aac.c TAILQ_INSERT_TAIL(&sc->aac_container_tqh, co, co_link);
sc 450 dev/ic/aac.c AAC_LOCK_RELEASE(&sc->aac_container_lock);
sc 462 dev/ic/aac.c aac_free(struct aac_softc *sc)
sc 468 dev/ic/aac.c if (sc->aac_dev_t != NULL)
sc 469 dev/ic/aac.c destroy_dev(sc->aac_dev_t);
sc 472 dev/ic/aac.c aac_free_commands(sc);
sc 473 dev/ic/aac.c if (sc->aac_fib_dmat)
sc 474 dev/ic/aac.c bus_dma_tag_destroy(sc->aac_fib_dmat);
sc 476 dev/ic/aac.c free(sc->aac_commands, M_AACBUF);
sc 479 dev/ic/aac.c if (sc->aac_common) {
sc 480 dev/ic/aac.c bus_dmamap_unload(sc->aac_common_dmat, sc->aac_common_dmamap);
sc 481 dev/ic/aac.c bus_dmamem_free(sc->aac_common_dmat, sc->aac_common,
sc 482 dev/ic/aac.c sc->aac_common_dmamap);
sc 484 dev/ic/aac.c if (sc->aac_common_dmat)
sc 485 dev/ic/aac.c bus_dma_tag_destroy(sc->aac_common_dmat);
sc 488 dev/ic/aac.c if (sc->aac_intr)
sc 489 dev/ic/aac.c bus_teardown_intr(sc->aac_dev, sc->aac_irq, sc->aac_intr);
sc 490 dev/ic/aac.c if (sc->aac_irq != NULL)
sc 491 dev/ic/aac.c bus_release_resource(sc->aac_dev, SYS_RES_IRQ, sc->aac_irq_rid,
sc 492 dev/ic/aac.c sc->aac_irq);
sc 495 dev/ic/aac.c if (sc->aac_buffer_dmat)
sc 496 dev/ic/aac.c bus_dma_tag_destroy(sc->aac_buffer_dmat);
sc 499 dev/ic/aac.c if (sc->aac_parent_dmat)
sc 500 dev/ic/aac.c bus_dma_tag_destroy(sc->aac_parent_dmat);
sc 503 dev/ic/aac.c if (sc->aac_regs_resource != NULL)
sc 504 dev/ic/aac.c bus_release_resource(sc->aac_dev, SYS_RES_MEMORY,
sc 505 dev/ic/aac.c sc->aac_regs_rid, sc->aac_regs_resource);
sc 514 dev/ic/aac.c struct aac_softc *sc;
sc 521 dev/ic/aac.c sc = device_get_softc(dev);
sc 523 dev/ic/aac.c if (sc->aac_state & AAC_STATE_OPEN)
sc 527 dev/ic/aac.c while ((co = TAILQ_FIRST(&sc->aac_container_tqh)) != NULL) {
sc 531 dev/ic/aac.c TAILQ_REMOVE(&sc->aac_container_tqh, co, co_link);
sc 536 dev/ic/aac.c while ((sim = TAILQ_FIRST(&sc->aac_sim_tqh)) != NULL) {
sc 537 dev/ic/aac.c TAILQ_REMOVE(&sc->aac_sim_tqh, sim, sim_link);
sc 544 dev/ic/aac.c if (sc->aifflags & AAC_AIFFLAGS_RUNNING) {
sc 545 dev/ic/aac.c sc->aifflags |= AAC_AIFFLAGS_EXIT;
sc 546 dev/ic/aac.c wakeup(sc->aifthread);
sc 547 dev/ic/aac.c tsleep(sc->aac_dev, PUSER | PCATCH, "aacdch", 30 * hz);
sc 550 dev/ic/aac.c if (sc->aifflags & AAC_AIFFLAGS_RUNNING)
sc 556 dev/ic/aac.c EVENTHANDLER_DEREGISTER(shutdown_final, sc->eh);
sc 558 dev/ic/aac.c aac_free(sc);
sc 574 dev/ic/aac.c struct aac_softc *sc;
sc 580 dev/ic/aac.c sc = device_get_softc(dev);
sc 582 dev/ic/aac.c sc->aac_state |= AAC_STATE_SUSPEND;
sc 589 dev/ic/aac.c device_printf(sc->aac_dev, "shutting down controller...");
sc 591 dev/ic/aac.c aac_alloc_sync_fib(sc, &fib, AAC_SYNC_LOCK_FORCE);
sc 597 dev/ic/aac.c if (aac_sync_fib(sc, ContainerCommand, 0, fib,
sc 611 dev/ic/aac.c if (aac_sync_fib(sc, FsaHostShutdown, AAC_FIBSTATE_SHUTDOWN,
sc 619 dev/ic/aac.c AAC_MASK_INTERRUPTS(sc);
sc 630 dev/ic/aac.c struct aac_softc *sc;
sc 634 dev/ic/aac.c sc = device_get_softc(dev);
sc 636 dev/ic/aac.c sc->aac_state |= AAC_STATE_SUSPEND;
sc 638 dev/ic/aac.c AAC_MASK_INTERRUPTS(sc);
sc 648 dev/ic/aac.c struct aac_softc *sc;
sc 652 dev/ic/aac.c sc = device_get_softc(dev);
sc 654 dev/ic/aac.c sc->aac_state &= ~AAC_STATE_SUSPEND;
sc 655 dev/ic/aac.c AAC_UNMASK_INTERRUPTS(sc);
sc 666 dev/ic/aac.c struct aac_softc *sc = arg;
sc 676 dev/ic/aac.c reason = AAC_GET_ISTATUS(sc);
sc 677 dev/ic/aac.c AAC_CLEAR_ISTATUS(sc, reason);
sc 678 dev/ic/aac.c (void)AAC_GET_ISTATUS(sc);
sc 684 dev/ic/aac.c sc->aac_dev.dv_xname, sc, reason));
sc 692 dev/ic/aac.c if (sc->aifflags & AAC_AIFFLAGS_RUNNING) {
sc 693 dev/ic/aac.c sc->aifflags |= AAC_AIFFLAGS_COMPLETE;
sc 695 dev/ic/aac.c AAC_LOCK_ACQUIRE(&sc->aac_io_lock);
sc 696 dev/ic/aac.c aac_complete(sc);
sc 697 dev/ic/aac.c AAC_LOCK_RELEASE(&sc->aac_io_lock);
sc 707 dev/ic/aac.c if (sc->aac_common->ac_printf[0] == 0)
sc 708 dev/ic/aac.c sc->aac_common->ac_printf[0] = 32;
sc 717 dev/ic/aac.c if (sc->aifthread)
sc 718 dev/ic/aac.c wakeup(sc->aifthread);
sc 733 dev/ic/aac.c aac_startio(struct aac_softc *sc)
sc 737 dev/ic/aac.c AAC_DPRINTF(AAC_D_CMD, ("%s: start command", sc->aac_dev.dv_xname));
sc 739 dev/ic/aac.c if (sc->flags & AAC_QUEUE_FRZN) {
sc 751 dev/ic/aac.c cm = aac_dequeue_ready(sc);
sc 759 dev/ic/aac.c aac_bio_command(sc, &cm);
sc 761 dev/ic/aac.c sc->aac_dev.dv_xname));
sc 776 dev/ic/aac.c sc->aac_dev.dv_xname));
sc 789 dev/ic/aac.c struct aac_softc *sc = cm->cm_sc;
sc 799 dev/ic/aac.c error = bus_dmamap_load(sc->aac_dmat, cm->cm_datamap,
sc 820 dev/ic/aac.c struct aac_softc *sc = arg;
sc 826 dev/ic/aac.c sc->aac_dev.dv_xname));
sc 827 dev/ic/aac.c AAC_LOCK_ACQUIRE(&sc->aac_io_lock);
sc 828 dev/ic/aac.c sc->aifflags = AAC_AIFFLAGS_RUNNING;
sc 830 dev/ic/aac.c while ((sc->aifflags & AAC_AIFFLAGS_EXIT) == 0) {
sc 834 dev/ic/aac.c sc->aac_dev.dv_xname, sc->aifflags));
sc 837 dev/ic/aac.c if ((sc->aifflags & AAC_AIFFLAGS_PENDING) == 0) {
sc 840 dev/ic/aac.c sc->aac_dev.dv_xname));
sc 841 dev/ic/aac.c AAC_LOCK_RELEASE(&sc->aac_io_lock);
sc 842 dev/ic/aac.c retval = tsleep(sc->aifthread, PRIBIO, "aifthd",
sc 844 dev/ic/aac.c AAC_LOCK_ACQUIRE(&sc->aac_io_lock);
sc 847 dev/ic/aac.c if ((sc->aifflags & AAC_AIFFLAGS_COMPLETE) != 0) {
sc 848 dev/ic/aac.c aac_complete(sc);
sc 849 dev/ic/aac.c sc->aifflags &= ~AAC_AIFFLAGS_COMPLETE;
sc 858 dev/ic/aac.c aac_timeout(sc);
sc 861 dev/ic/aac.c if (sc->aac_common->ac_printf[0] != 0)
sc 862 dev/ic/aac.c aac_print_printf(sc);
sc 865 dev/ic/aac.c while (aac_dequeue_fib(sc, AAC_HOST_NORM_CMD_QUEUE,
sc 868 dev/ic/aac.c AAC_PRINT_FIB(sc, fib);
sc 876 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 901 dev/ic/aac.c aac_enqueue_response(sc,
sc 907 dev/ic/aac.c sc->aifflags &= ~AAC_AIFFLAGS_RUNNING;
sc 908 dev/ic/aac.c AAC_LOCK_RELEASE(&sc->aac_io_lock);
sc 915 dev/ic/aac.c wakeup(sc->aac_dev);
sc 919 dev/ic/aac.c sc->aac_dev.dv_xname));
sc 929 dev/ic/aac.c struct aac_softc *sc = (struct aac_softc *)context;
sc 934 dev/ic/aac.c AAC_DPRINTF(AAC_D_CMD, ("%s: complete", sc->aac_dev.dv_xname));
sc 939 dev/ic/aac.c if (aac_dequeue_fib(sc, AAC_HOST_NORM_RESP_QUEUE, &fib_size,
sc 944 dev/ic/aac.c cm = sc->aac_commands + fib->Header.SenderData;
sc 946 dev/ic/aac.c AAC_PRINT_FIB(sc, fib);
sc 965 dev/ic/aac.c sc->flags &= ~AAC_QUEUE_FRZN;
sc 966 dev/ic/aac.c aac_startio(sc);
sc 973 dev/ic/aac.c aac_bio_command(struct aac_softc *sc, struct aac_command **cmp)
sc 980 dev/ic/aac.c AAC_DPRINTF(AAC_D_CMD, ("%s: bio command", sc->aac_dev.dv_xname));
sc 983 dev/ic/aac.c if ((cm = aac_dequeue_bio(sc)) == NULL)
sc 1010 dev/ic/aac.c panic("%s: invalid opcode %#x\n", sc->aac_dev.dv_xname,
sc 1015 dev/ic/aac.c if ((sc->flags & AAC_FLAGS_SG_64BIT) == 0) {
sc 1126 dev/ic/aac.c struct aac_softc *sc = cm->cm_sc;
sc 1135 dev/ic/aac.c aac_startio(sc);
sc 1138 dev/ic/aac.c sc->aac_dev.dv_xname));
sc 1139 dev/ic/aac.c AAC_LOCK_RELEASE(&sc->aac_io_lock);
sc 1141 dev/ic/aac.c AAC_LOCK_ACQUIRE(&sc->aac_io_lock);
sc 1154 dev/ic/aac.c aac_alloc_command(struct aac_softc *sc, struct aac_command **cmp)
sc 1159 dev/ic/aac.c if ((cm = aac_dequeue_free(sc)) == NULL) {
sc 1201 dev/ic/aac.c aac_alloc_commands(struct aac_softc *sc)
sc 1207 dev/ic/aac.c if (sc->total_fibs + AAC_FIB_COUNT > sc->aac_max_fibs)
sc 1216 dev/ic/aac.c if (bus_dmamem_alloc(sc->aac_dmat, AAC_FIBMAP_SIZE, PAGE_SIZE, 0,
sc 1218 dev/ic/aac.c printf("%s: can't alloc FIBs\n", sc->aac_dev.dv_xname);
sc 1223 dev/ic/aac.c if (bus_dmamem_map(sc->aac_dmat, &fm->aac_seg, 1,
sc 1225 dev/ic/aac.c printf("%s: can't map FIB structure\n", sc->aac_dev.dv_xname);
sc 1230 dev/ic/aac.c if (bus_dmamap_create(sc->aac_dmat, AAC_FIBMAP_SIZE, 1,
sc 1232 dev/ic/aac.c printf("%s: can't create dma map\n", sc->aac_dev.dv_xname);
sc 1237 dev/ic/aac.c if (bus_dmamap_load(sc->aac_dmat, fm->aac_fibmap, fm->aac_fibs,
sc 1239 dev/ic/aac.c printf("%s: can't load dma map\n", sc->aac_dev.dv_xname);
sc 1245 dev/ic/aac.c AAC_LOCK_ACQUIRE(&sc->aac_io_lock);
sc 1248 dev/ic/aac.c cm = sc->aac_commands + sc->total_fibs;
sc 1250 dev/ic/aac.c cm->cm_sc = sc;
sc 1254 dev/ic/aac.c cm->cm_index = sc->total_fibs;
sc 1256 dev/ic/aac.c if (bus_dmamap_create(sc->aac_dmat, MAXBSIZE, AAC_MAXSGENTRIES,
sc 1261 dev/ic/aac.c sc->total_fibs++;
sc 1265 dev/ic/aac.c TAILQ_INSERT_TAIL(&sc->aac_fibmap_tqh, fm, fm_link);
sc 1267 dev/ic/aac.c sc->aac_dev.dv_xname,
sc 1268 dev/ic/aac.c sc->total_fibs));
sc 1269 dev/ic/aac.c AAC_LOCK_RELEASE(&sc->aac_io_lock);
sc 1274 dev/ic/aac.c bus_dmamap_destroy(sc->aac_dmat, fm->aac_fibmap);
sc 1276 dev/ic/aac.c bus_dmamem_unmap(sc->aac_dmat, (caddr_t)fm->aac_fibs, AAC_FIBMAP_SIZE);
sc 1278 dev/ic/aac.c bus_dmamem_free(sc->aac_dmat, &fm->aac_seg, fm->aac_nsegs);
sc 1282 dev/ic/aac.c AAC_LOCK_RELEASE(&sc->aac_io_lock);
sc 1290 dev/ic/aac.c aac_free_commands(struct aac_softc *sc)
sc 1296 dev/ic/aac.c while ((fm = TAILQ_FIRST(&sc->aac_fibmap_tqh)) != NULL) {
sc 1298 dev/ic/aac.c TAILQ_REMOVE(&sc->aac_fibmap_tqh, fm, fm_link);
sc 1304 dev/ic/aac.c for (i = 0; i < AAC_FIB_COUNT && sc->total_fibs--; i++) {
sc 1306 dev/ic/aac.c bus_dmamap_destroy(sc->aac_dmat, cm->cm_datamap);
sc 1309 dev/ic/aac.c bus_dmamap_unload(sc->aac_dmat, fm->aac_fibmap);
sc 1310 dev/ic/aac.c bus_dmamap_destroy(sc->aac_dmat, fm->aac_fibmap);
sc 1311 dev/ic/aac.c bus_dmamem_unmap(sc->aac_dmat, (caddr_t)fm->aac_fibs,
sc 1313 dev/ic/aac.c bus_dmamem_free(sc->aac_dmat, &fm->aac_seg, fm->aac_nsegs);
sc 1326 dev/ic/aac.c struct aac_softc *sc = cm->cm_sc;
sc 1365 dev/ic/aac.c bus_dmamap_sync(sc->aac_dmat, cm->cm_datamap, 0,
sc 1369 dev/ic/aac.c bus_dmamap_sync(sc->aac_dmat, cm->cm_datamap, 0,
sc 1375 dev/ic/aac.c if (aac_enqueue_fib(sc, cm->cm_queue, cm) == EBUSY) {
sc 1388 dev/ic/aac.c struct aac_softc *sc = cm->cm_sc;
sc 1395 dev/ic/aac.c bus_dmamap_sync(sc->aac_dmat, cm->cm_datamap, 0,
sc 1399 dev/ic/aac.c bus_dmamap_sync(sc->aac_dmat, cm->cm_datamap, 0,
sc 1403 dev/ic/aac.c bus_dmamap_unload(sc->aac_dmat, cm->cm_datamap);
sc 1416 dev/ic/aac.c aac_check_firmware(struct aac_softc *sc)
sc 1424 dev/ic/aac.c if (sc->flags & AAC_FLAGS_PERC2QC) {
sc 1425 dev/ic/aac.c if (aac_sync_command(sc, AAC_MONKER_GETKERNVER, 0, 0, 0, 0,
sc 1428 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 1433 dev/ic/aac.c major = (AAC_GET_MAILBOX(sc, 1) & 0xff) - 0x30;
sc 1434 dev/ic/aac.c minor = (AAC_GET_MAILBOX(sc, 2) & 0xff) - 0x30;
sc 1437 dev/ic/aac.c sc->aac_dev.dv_xname, major, minor);
sc 1446 dev/ic/aac.c if (aac_sync_command(sc, AAC_MONKER_GETINFO, 0, 0, 0, 0, NULL)) {
sc 1448 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 1451 dev/ic/aac.c options = AAC_GET_MAILBOX(sc, 1);
sc 1452 dev/ic/aac.c sc->supported_options = options;
sc 1455 dev/ic/aac.c (sc->flags & AAC_FLAGS_NO4GB) == 0)
sc 1456 dev/ic/aac.c sc->flags |= AAC_FLAGS_4GB_WINDOW;
sc 1458 dev/ic/aac.c sc->flags |= AAC_FLAGS_ENABLE_CAM;
sc 1462 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 1463 dev/ic/aac.c sc->flags |= AAC_FLAGS_SG_64BIT;
sc 1467 dev/ic/aac.c if ((sc->flags & AAC_FLAGS_256FIBS) == 0)
sc 1468 dev/ic/aac.c sc->aac_max_fibs = AAC_MAX_FIBS;
sc 1470 dev/ic/aac.c sc->aac_max_fibs = 256;
sc 1476 dev/ic/aac.c aac_init(struct aac_softc *sc)
sc 1491 dev/ic/aac.c code = AAC_GET_FWSTATUS(sc);
sc 1494 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 1499 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 1508 dev/ic/aac.c sc->aac_dev.dv_xname, code);
sc 1518 dev/ic/aac.c if (bus_dmamem_alloc(sc->aac_dmat, AAC_COMMON_ALLOCSIZE, PAGE_SIZE, 0,
sc 1521 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 1526 dev/ic/aac.c if (bus_dmamem_map(sc->aac_dmat, &seg, nsegs, AAC_COMMON_ALLOCSIZE,
sc 1527 dev/ic/aac.c (caddr_t *)&sc->aac_common, BUS_DMA_NOWAIT)) {
sc 1529 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 1535 dev/ic/aac.c if (bus_dmamap_create(sc->aac_dmat, AAC_COMMON_ALLOCSIZE, 1,
sc 1536 dev/ic/aac.c AAC_COMMON_ALLOCSIZE, 0, BUS_DMA_NOWAIT, &sc->aac_common_map)) {
sc 1537 dev/ic/aac.c printf("%s: can't create dma map\n", sc->aac_dev.dv_xname);
sc 1543 dev/ic/aac.c if (bus_dmamap_load(sc->aac_dmat, sc->aac_common_map, sc->aac_common,
sc 1545 dev/ic/aac.c printf("%s: can't load dma map\n", sc->aac_dev.dv_xname);
sc 1551 dev/ic/aac.c sc->aac_common_busaddr = sc->aac_common_map->dm_segs[0].ds_addr;
sc 1553 dev/ic/aac.c if (sc->aac_common_busaddr < 8192) {
sc 1554 dev/ic/aac.c (uint8_t *)sc->aac_common += 8192;
sc 1555 dev/ic/aac.c sc->aac_common_busaddr += 8192;
sc 1557 dev/ic/aac.c bzero(sc->aac_common, sizeof *sc->aac_common);
sc 1560 dev/ic/aac.c TAILQ_INIT(&sc->aac_fibmap_tqh);
sc 1561 dev/ic/aac.c sc->aac_commands = malloc(AAC_MAX_FIBS * sizeof(struct aac_command),
sc 1563 dev/ic/aac.c bzero(sc->aac_commands, AAC_MAX_FIBS * sizeof(struct aac_command));
sc 1564 dev/ic/aac.c while (sc->total_fibs < AAC_MAX_FIBS) {
sc 1565 dev/ic/aac.c if (aac_alloc_commands(sc) != 0)
sc 1568 dev/ic/aac.c if (sc->total_fibs == 0)
sc 1575 dev/ic/aac.c ip = &sc->aac_common->ac_init;
sc 1579 dev/ic/aac.c ip->AdapterFibsPhysicalAddress = sc->aac_common_busaddr +
sc 1585 dev/ic/aac.c ip->PrintfBufferAddress = sc->aac_common_busaddr +
sc 1596 dev/ic/aac.c if (sc->flags & AAC_FLAGS_BROKEN_MEMMAP) {
sc 1620 dev/ic/aac.c sc->aac_queues =
sc 1621 dev/ic/aac.c (struct aac_queue_table *)((caddr_t)sc->aac_common + qoffset);
sc 1622 dev/ic/aac.c ip->CommHeaderAddress = sc->aac_common_busaddr + qoffset;
sc 1624 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_HOST_NORM_CMD_QUEUE][AAC_PRODUCER_INDEX] =
sc 1626 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_HOST_NORM_CMD_QUEUE][AAC_CONSUMER_INDEX] =
sc 1628 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_HOST_HIGH_CMD_QUEUE][AAC_PRODUCER_INDEX] =
sc 1630 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_HOST_HIGH_CMD_QUEUE][AAC_CONSUMER_INDEX] =
sc 1632 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_ADAP_NORM_CMD_QUEUE][AAC_PRODUCER_INDEX] =
sc 1634 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_ADAP_NORM_CMD_QUEUE][AAC_CONSUMER_INDEX] =
sc 1636 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_ADAP_HIGH_CMD_QUEUE][AAC_PRODUCER_INDEX] =
sc 1638 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_ADAP_HIGH_CMD_QUEUE][AAC_CONSUMER_INDEX] =
sc 1640 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_HOST_NORM_RESP_QUEUE][AAC_PRODUCER_INDEX]=
sc 1642 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_HOST_NORM_RESP_QUEUE][AAC_CONSUMER_INDEX]=
sc 1644 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_HOST_HIGH_RESP_QUEUE][AAC_PRODUCER_INDEX]=
sc 1646 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_HOST_HIGH_RESP_QUEUE][AAC_CONSUMER_INDEX]=
sc 1648 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_ADAP_NORM_RESP_QUEUE][AAC_PRODUCER_INDEX]=
sc 1650 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_ADAP_NORM_RESP_QUEUE][AAC_CONSUMER_INDEX]=
sc 1652 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_ADAP_HIGH_RESP_QUEUE][AAC_PRODUCER_INDEX]=
sc 1654 dev/ic/aac.c sc->aac_queues->qt_qindex[AAC_ADAP_HIGH_RESP_QUEUE][AAC_CONSUMER_INDEX]=
sc 1656 dev/ic/aac.c sc->aac_qentries[AAC_HOST_NORM_CMD_QUEUE] =
sc 1657 dev/ic/aac.c &sc->aac_queues->qt_HostNormCmdQueue[0];
sc 1658 dev/ic/aac.c sc->aac_qentries[AAC_HOST_HIGH_CMD_QUEUE] =
sc 1659 dev/ic/aac.c &sc->aac_queues->qt_HostHighCmdQueue[0];
sc 1660 dev/ic/aac.c sc->aac_qentries[AAC_ADAP_NORM_CMD_QUEUE] =
sc 1661 dev/ic/aac.c &sc->aac_queues->qt_AdapNormCmdQueue[0];
sc 1662 dev/ic/aac.c sc->aac_qentries[AAC_ADAP_HIGH_CMD_QUEUE] =
sc 1663 dev/ic/aac.c &sc->aac_queues->qt_AdapHighCmdQueue[0];
sc 1664 dev/ic/aac.c sc->aac_qentries[AAC_HOST_NORM_RESP_QUEUE] =
sc 1665 dev/ic/aac.c &sc->aac_queues->qt_HostNormRespQueue[0];
sc 1666 dev/ic/aac.c sc->aac_qentries[AAC_HOST_HIGH_RESP_QUEUE] =
sc 1667 dev/ic/aac.c &sc->aac_queues->qt_HostHighRespQueue[0];
sc 1668 dev/ic/aac.c sc->aac_qentries[AAC_ADAP_NORM_RESP_QUEUE] =
sc 1669 dev/ic/aac.c &sc->aac_queues->qt_AdapNormRespQueue[0];
sc 1670 dev/ic/aac.c sc->aac_qentries[AAC_ADAP_HIGH_RESP_QUEUE] =
sc 1671 dev/ic/aac.c &sc->aac_queues->qt_AdapHighRespQueue[0];
sc 1676 dev/ic/aac.c switch (sc->aac_hwif) {
sc 1678 dev/ic/aac.c AAC_SETREG4(sc, AAC_RX_ODBR, ~0);
sc 1681 dev/ic/aac.c AAC_SETREG4(sc, AAC_RKT_ODBR, ~0);
sc 1690 dev/ic/aac.c if (aac_sync_command(sc, AAC_MONKER_INITSTRUCT,
sc 1691 dev/ic/aac.c sc->aac_common_busaddr +
sc 1695 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 1700 dev/ic/aac.c aac_describe_controller(sc);
sc 1701 dev/ic/aac.c aac_startup(sc);
sc 1707 dev/ic/aac.c bus_dmamap_unload(sc->aac_dmat, sc->aac_common_map);
sc 1709 dev/ic/aac.c bus_dmamap_destroy(sc->aac_dmat, sc->aac_common_map);
sc 1711 dev/ic/aac.c bus_dmamem_unmap(sc->aac_dmat, (caddr_t)sc->aac_common,
sc 1712 dev/ic/aac.c sizeof *sc->aac_common);
sc 1714 dev/ic/aac.c bus_dmamem_free(sc->aac_dmat, &seg, 1);
sc 1724 dev/ic/aac.c aac_sync_command(struct aac_softc *sc, u_int32_t command, u_int32_t arg0,
sc 1733 dev/ic/aac.c AAC_SET_MAILBOX(sc, command, arg0, arg1, arg2, arg3);
sc 1736 dev/ic/aac.c AAC_CLEAR_ISTATUS(sc, AAC_DB_SYNC_COMMAND);
sc 1739 dev/ic/aac.c AAC_QNOTIFY(sc, AAC_DB_SYNC_COMMAND);
sc 1749 dev/ic/aac.c } while (!(AAC_GET_ISTATUS(sc) & AAC_DB_SYNC_COMMAND));
sc 1755 dev/ic/aac.c reason = AAC_GET_ISTATUS(sc);
sc 1758 dev/ic/aac.c reason = AAC_GET_ISTATUS(sc);
sc 1761 dev/ic/aac.c reason = AAC_GET_ISTATUS(sc);
sc 1773 dev/ic/aac.c AAC_CLEAR_ISTATUS(sc, AAC_DB_SYNC_COMMAND);
sc 1776 dev/ic/aac.c status = AAC_GET_MAILBOX(sc, 0);
sc 1788 dev/ic/aac.c aac_alloc_sync_fib(struct aac_softc *sc, struct aac_fib **fib, int flags)
sc 1796 dev/ic/aac.c AAC_LOCK_ACQUIRE(&sc->aac_sync_lock);
sc 1798 dev/ic/aac.c *fib = &sc->aac_common->ac_sync_fib;
sc 1807 dev/ic/aac.c aac_release_sync_fib(struct aac_softc *sc)
sc 1809 dev/ic/aac.c AAC_LOCK_RELEASE(&sc->aac_sync_lock);
sc 1816 dev/ic/aac.c aac_sync_fib(struct aac_softc *sc, u_int32_t command, u_int32_t xferstate,
sc 1838 dev/ic/aac.c fib->Header.ReceiverFibAddress = sc->aac_common_busaddr +
sc 1845 dev/ic/aac.c if (aac_sync_command(sc, AAC_MONKER_SYNCFIB,
sc 1848 dev/ic/aac.c sc->aac_dev.dv_xname));
sc 1886 dev/ic/aac.c aac_enqueue_fib(struct aac_softc *sc, int queue, struct aac_command *cm)
sc 1897 dev/ic/aac.c pi = sc->aac_queues->qt_qindex[queue][AAC_PRODUCER_INDEX];
sc 1898 dev/ic/aac.c ci = sc->aac_queues->qt_qindex[queue][AAC_CONSUMER_INDEX];
sc 1911 dev/ic/aac.c (sc->aac_qentries[queue] + pi)->aq_fib_size = fib_size;
sc 1912 dev/ic/aac.c (sc->aac_qentries[queue] + pi)->aq_fib_addr = fib_addr;
sc 1915 dev/ic/aac.c sc->aac_queues->qt_qindex[queue][AAC_PRODUCER_INDEX] = pi + 1;
sc 1925 dev/ic/aac.c AAC_QNOTIFY(sc, aac_qinfo[queue].notify);
sc 1938 dev/ic/aac.c aac_dequeue_fib(struct aac_softc *sc, int queue, u_int32_t *fib_size,
sc 1947 dev/ic/aac.c pi = sc->aac_queues->qt_qindex[queue][AAC_PRODUCER_INDEX];
sc 1948 dev/ic/aac.c ci = sc->aac_queues->qt_qindex[queue][AAC_CONSUMER_INDEX];
sc 1969 dev/ic/aac.c *fib_size = (sc->aac_qentries[queue] + ci)->aq_fib_size;
sc 1980 dev/ic/aac.c fib_index = (sc->aac_qentries[queue] + ci)->aq_fib_addr /
sc 1982 dev/ic/aac.c *fib_addr = &sc->aac_common->ac_fibs[fib_index];
sc 1997 dev/ic/aac.c fib_index = (sc->aac_qentries[queue] + ci)->aq_fib_addr;
sc 1998 dev/ic/aac.c cm = sc->aac_commands + (fib_index >> 1);
sc 2018 dev/ic/aac.c sc->aac_queues->qt_qindex[queue][AAC_CONSUMER_INDEX] = ci + 1;
sc 2022 dev/ic/aac.c AAC_QNOTIFY(sc, aac_qinfo[queue].notify);
sc 2033 dev/ic/aac.c aac_enqueue_response(struct aac_softc *sc, int queue, struct aac_fib *fib)
sc 2046 dev/ic/aac.c pi = sc->aac_queues->qt_qindex[queue][AAC_PRODUCER_INDEX];
sc 2047 dev/ic/aac.c ci = sc->aac_queues->qt_qindex[queue][AAC_CONSUMER_INDEX];
sc 2060 dev/ic/aac.c (sc->aac_qentries[queue] + pi)->aq_fib_size = fib_size;
sc 2061 dev/ic/aac.c (sc->aac_qentries[queue] + pi)->aq_fib_addr = fib_addr;
sc 2064 dev/ic/aac.c sc->aac_queues->qt_qindex[queue][AAC_PRODUCER_INDEX] = pi + 1;
sc 2068 dev/ic/aac.c AAC_QNOTIFY(sc, aac_qinfo[queue].notify);
sc 2079 dev/ic/aac.c struct aac_softc *sc = cm->cm_sc;
sc 2082 dev/ic/aac.c sc->aac_dev.dv_xname, cm, cm->cm_flags,
sc 2090 dev/ic/aac.c AAC_PRINT_FIB(sc, cm->cm_fib);
sc 2106 dev/ic/aac.c aac_timeout(struct aac_softc *sc)
sc 2116 dev/ic/aac.c TAILQ_FOREACH(cm, &sc->aac_busy, cm_link) {
sc 2130 dev/ic/aac.c aac_sa_get_fwstatus(struct aac_softc *sc)
sc 2132 dev/ic/aac.c return (AAC_GETREG4(sc, AAC_SA_FWSTATUS));
sc 2136 dev/ic/aac.c aac_rx_get_fwstatus(struct aac_softc *sc)
sc 2138 dev/ic/aac.c return (AAC_GETREG4(sc, AAC_RX_FWSTATUS));
sc 2142 dev/ic/aac.c aac_fa_get_fwstatus(struct aac_softc *sc)
sc 2144 dev/ic/aac.c return (AAC_GETREG4(sc, AAC_FA_FWSTATUS));
sc 2148 dev/ic/aac.c aac_rkt_get_fwstatus(struct aac_softc *sc)
sc 2150 dev/ic/aac.c return(AAC_GETREG4(sc, AAC_RKT_FWSTATUS));
sc 2158 dev/ic/aac.c aac_sa_qnotify(struct aac_softc *sc, int qbit)
sc 2160 dev/ic/aac.c AAC_SETREG2(sc, AAC_SA_DOORBELL1_SET, qbit);
sc 2164 dev/ic/aac.c aac_rx_qnotify(struct aac_softc *sc, int qbit)
sc 2166 dev/ic/aac.c AAC_SETREG4(sc, AAC_RX_IDBR, qbit);
sc 2170 dev/ic/aac.c aac_fa_qnotify(struct aac_softc *sc, int qbit)
sc 2172 dev/ic/aac.c AAC_SETREG2(sc, AAC_FA_DOORBELL1, qbit);
sc 2173 dev/ic/aac.c AAC_FA_HACK(sc);
sc 2177 dev/ic/aac.c aac_rkt_qnotify(struct aac_softc *sc, int qbit)
sc 2179 dev/ic/aac.c AAC_SETREG4(sc, AAC_RKT_IDBR, qbit);
sc 2186 dev/ic/aac.c aac_sa_get_istatus(struct aac_softc *sc)
sc 2188 dev/ic/aac.c return (AAC_GETREG2(sc, AAC_SA_DOORBELL0));
sc 2192 dev/ic/aac.c aac_rx_get_istatus(struct aac_softc *sc)
sc 2194 dev/ic/aac.c return (AAC_GETREG4(sc, AAC_RX_ODBR));
sc 2198 dev/ic/aac.c aac_fa_get_istatus(struct aac_softc *sc)
sc 2200 dev/ic/aac.c return (AAC_GETREG2(sc, AAC_FA_DOORBELL0));
sc 2204 dev/ic/aac.c aac_rkt_get_istatus(struct aac_softc *sc)
sc 2206 dev/ic/aac.c return(AAC_GETREG4(sc, AAC_RKT_ODBR));
sc 2213 dev/ic/aac.c aac_sa_clear_istatus(struct aac_softc *sc, int mask)
sc 2215 dev/ic/aac.c AAC_SETREG2(sc, AAC_SA_DOORBELL0_CLEAR, mask);
sc 2219 dev/ic/aac.c aac_rx_clear_istatus(struct aac_softc *sc, int mask)
sc 2221 dev/ic/aac.c AAC_SETREG4(sc, AAC_RX_ODBR, mask);
sc 2225 dev/ic/aac.c aac_fa_clear_istatus(struct aac_softc *sc, int mask)
sc 2227 dev/ic/aac.c AAC_SETREG2(sc, AAC_FA_DOORBELL0_CLEAR, mask);
sc 2228 dev/ic/aac.c AAC_FA_HACK(sc);
sc 2232 dev/ic/aac.c aac_rkt_clear_istatus(struct aac_softc *sc, int mask)
sc 2234 dev/ic/aac.c AAC_SETREG4(sc, AAC_RKT_ODBR, mask);
sc 2241 dev/ic/aac.c aac_sa_set_mailbox(struct aac_softc *sc, u_int32_t command, u_int32_t arg0,
sc 2244 dev/ic/aac.c AAC_SETREG4(sc, AAC_SA_MAILBOX, command);
sc 2245 dev/ic/aac.c AAC_SETREG4(sc, AAC_SA_MAILBOX + 4, arg0);
sc 2246 dev/ic/aac.c AAC_SETREG4(sc, AAC_SA_MAILBOX + 8, arg1);
sc 2247 dev/ic/aac.c AAC_SETREG4(sc, AAC_SA_MAILBOX + 12, arg2);
sc 2248 dev/ic/aac.c AAC_SETREG4(sc, AAC_SA_MAILBOX + 16, arg3);
sc 2252 dev/ic/aac.c aac_rx_set_mailbox(struct aac_softc *sc, u_int32_t command, u_int32_t arg0,
sc 2255 dev/ic/aac.c AAC_SETREG4(sc, AAC_RX_MAILBOX, command);
sc 2256 dev/ic/aac.c AAC_SETREG4(sc, AAC_RX_MAILBOX + 4, arg0);
sc 2257 dev/ic/aac.c AAC_SETREG4(sc, AAC_RX_MAILBOX + 8, arg1);
sc 2258 dev/ic/aac.c AAC_SETREG4(sc, AAC_RX_MAILBOX + 12, arg2);
sc 2259 dev/ic/aac.c AAC_SETREG4(sc, AAC_RX_MAILBOX + 16, arg3);
sc 2263 dev/ic/aac.c aac_fa_set_mailbox(struct aac_softc *sc, u_int32_t command, u_int32_t arg0,
sc 2266 dev/ic/aac.c AAC_SETREG4(sc, AAC_FA_MAILBOX, command);
sc 2267 dev/ic/aac.c AAC_FA_HACK(sc);
sc 2268 dev/ic/aac.c AAC_SETREG4(sc, AAC_FA_MAILBOX + 4, arg0);
sc 2269 dev/ic/aac.c AAC_FA_HACK(sc);
sc 2270 dev/ic/aac.c AAC_SETREG4(sc, AAC_FA_MAILBOX + 8, arg1);
sc 2271 dev/ic/aac.c AAC_FA_HACK(sc);
sc 2272 dev/ic/aac.c AAC_SETREG4(sc, AAC_FA_MAILBOX + 12, arg2);
sc 2273 dev/ic/aac.c AAC_FA_HACK(sc);
sc 2274 dev/ic/aac.c AAC_SETREG4(sc, AAC_FA_MAILBOX + 16, arg3);
sc 2275 dev/ic/aac.c AAC_FA_HACK(sc);
sc 2279 dev/ic/aac.c aac_rkt_set_mailbox(struct aac_softc *sc, u_int32_t command, u_int32_t arg0,
sc 2282 dev/ic/aac.c AAC_SETREG4(sc, AAC_RKT_MAILBOX, command);
sc 2283 dev/ic/aac.c AAC_SETREG4(sc, AAC_RKT_MAILBOX + 4, arg0);
sc 2284 dev/ic/aac.c AAC_SETREG4(sc, AAC_RKT_MAILBOX + 8, arg1);
sc 2285 dev/ic/aac.c AAC_SETREG4(sc, AAC_RKT_MAILBOX + 12, arg2);
sc 2286 dev/ic/aac.c AAC_SETREG4(sc, AAC_RKT_MAILBOX + 16, arg3);
sc 2293 dev/ic/aac.c aac_sa_get_mailbox(struct aac_softc *sc, int mb)
sc 2295 dev/ic/aac.c return (AAC_GETREG4(sc, AAC_SA_MAILBOX + (mb * 4)));
sc 2299 dev/ic/aac.c aac_rx_get_mailbox(struct aac_softc *sc, int mb)
sc 2301 dev/ic/aac.c return (AAC_GETREG4(sc, AAC_RX_MAILBOX + (mb * 4)));
sc 2305 dev/ic/aac.c aac_fa_get_mailbox(struct aac_softc *sc, int mb)
sc 2307 dev/ic/aac.c return (AAC_GETREG4(sc, AAC_FA_MAILBOX + (mb * 4)));
sc 2311 dev/ic/aac.c aac_rkt_get_mailbox(struct aac_softc *sc, int mb)
sc 2313 dev/ic/aac.c return(AAC_GETREG4(sc, AAC_RKT_MAILBOX + (mb * 4)));
sc 2320 dev/ic/aac.c aac_sa_set_interrupts(struct aac_softc *sc, int enable)
sc 2323 dev/ic/aac.c sc->aac_dev.dv_xname, enable ? "en" : "dis"));
sc 2326 dev/ic/aac.c AAC_SETREG2((sc), AAC_SA_MASK0_CLEAR, AAC_DB_INTERRUPTS);
sc 2328 dev/ic/aac.c AAC_SETREG2((sc), AAC_SA_MASK0_SET, ~0);
sc 2332 dev/ic/aac.c aac_rx_set_interrupts(struct aac_softc *sc, int enable)
sc 2335 dev/ic/aac.c sc->aac_dev.dv_xname, enable ? "en" : "dis"));
sc 2338 dev/ic/aac.c AAC_SETREG4(sc, AAC_RX_OIMR, ~AAC_DB_INTERRUPTS);
sc 2340 dev/ic/aac.c AAC_SETREG4(sc, AAC_RX_OIMR, ~0);
sc 2344 dev/ic/aac.c aac_fa_set_interrupts(struct aac_softc *sc, int enable)
sc 2347 dev/ic/aac.c sc->aac_dev.dv_xname, enable ? "en" : "dis"));
sc 2350 dev/ic/aac.c AAC_SETREG2((sc), AAC_FA_MASK0_CLEAR, AAC_DB_INTERRUPTS);
sc 2351 dev/ic/aac.c AAC_FA_HACK(sc);
sc 2353 dev/ic/aac.c AAC_SETREG2((sc), AAC_FA_MASK0, ~0);
sc 2354 dev/ic/aac.c AAC_FA_HACK(sc);
sc 2359 dev/ic/aac.c aac_rkt_set_interrupts(struct aac_softc *sc, int enable)
sc 2362 dev/ic/aac.c sc->aac_dev.dv_xname, enable ? "en" : "dis"));
sc 2365 dev/ic/aac.c AAC_SETREG4(sc, AAC_RKT_OIMR, ~AAC_DB_INTERRUPTS);
sc 2367 dev/ic/aac.c AAC_SETREG4(sc, AAC_RKT_OIMR, ~0);
sc 2397 dev/ic/aac.c struct aac_softc *sc = xs->sc_link->adapter_softc;
sc 2401 dev/ic/aac.c sc->aac_dev.dv_xname));
sc 2405 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 2417 dev/ic/aac.c struct aac_softc *sc = link->adapter_softc;
sc 2424 dev/ic/aac.c sc->aac_dev.dv_xname));
sc 2449 dev/ic/aac.c sc->aac_hdr[target].hd_devtype));
sc 2467 dev/ic/aac.c _lto4b(sc->aac_hdr[target].hd_size - 1, rcd.addr);
sc 2514 dev/ic/aac.c struct aac_softc *sc = xs->sc_link->adapter_softc;
sc 2517 dev/ic/aac.c sc->aac_dev.dv_xname));
sc 2528 dev/ic/aac.c struct aac_softc *sc = link->adapter_softc;
sc 2539 dev/ic/aac.c if (target >= AAC_MAX_CONTAINERS || !sc->aac_hdr[target].hd_present ||
sc 2552 dev/ic/aac.c AAC_DPRINTF(AAC_D_CMD, ("%s: aac_scsi_cmd: ", sc->aac_dev.dv_xname));
sc 2618 dev/ic/aac.c if (blockno >= sc->aac_hdr[target].hd_size ||
sc 2619 dev/ic/aac.c blockno + blockcnt > sc->aac_hdr[target].hd_size) {
sc 2622 dev/ic/aac.c sc->aac_dev.dv_xname, blockno,
sc 2623 dev/ic/aac.c blockcnt, sc->aac_hdr[target].hd_size);
sc 2635 dev/ic/aac.c if (aac_alloc_command(sc, &cm)) {
sc 2658 dev/ic/aac.c aac_startio(sc);
sc 2665 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 2683 dev/ic/aac.c sc->aac_dev.dv_xname));
sc 2695 dev/ic/aac.c aac_describe_controller(struct aac_softc *sc)
sc 2700 dev/ic/aac.c aac_alloc_sync_fib(sc, &fib, 0);
sc 2703 dev/ic/aac.c if (aac_sync_fib(sc, RequestAdapterInfo, 0, fib, 1)) {
sc 2705 dev/ic/aac.c sc->aac_dev.dv_xname);
sc 2706 dev/ic/aac.c aac_release_sync_fib(sc);
sc 2711 dev/ic/aac.c printf("%s: %s %dMHz, %dMB cache memory, %s\n", sc->aac_dev.dv_xname,
sc 2717 dev/ic/aac.c sc->aac_revision = info->KernelRevision;
sc 2719 dev/ic/aac.c sc->aac_dev.dv_xname,
sc 2726 dev/ic/aac.c aac_release_sync_fib(sc);
sc 2730 dev/ic/aac.c device_printf(sc->aac_dev, "Supported Options=%b\n",
sc 2731 dev/ic/aac.c sc->supported_options,
sc 2770 dev/ic/aac.c aac_print_fib(struct aac_softc *sc, struct aac_fib *fib, const char *caller)
sc 2841 dev/ic/aac.c aac_print_aif(struct aac_softc *sc, struct aac_aif_command *aif)
sc 2843 dev/ic/aac.c printf("%s: print_aif: ", sc->aac_dev.dv_xname);
sc 1306 dev/ic/aacreg.h #define AAC_FA_HACK(sc) (void)AAC_GETREG4(sc, AAC_FA_INTSRC)
sc 60 dev/ic/aacvar.h #define AAC_PRINT_FIB(sc, fib) do { \
sc 62 dev/ic/aacvar.h aac_print_fib((sc), (fib), __func__); \
sc 66 dev/ic/aacvar.h #define AAC_PRINT_FIB(sc, fib)
sc 187 dev/ic/aacvar.h #define AAC_GET_FWSTATUS(sc) ((sc)->aac_if.aif_get_fwstatus(sc))
sc 188 dev/ic/aacvar.h #define AAC_QNOTIFY(sc, qbit) \
sc 189 dev/ic/aacvar.h ((sc)->aac_if.aif_qnotify((sc), (qbit)))
sc 190 dev/ic/aacvar.h #define AAC_GET_ISTATUS(sc) ((sc)->aac_if.aif_get_istatus(sc))
sc 191 dev/ic/aacvar.h #define AAC_CLEAR_ISTATUS(sc, mask) \
sc 192 dev/ic/aacvar.h ((sc)->aac_if.aif_set_istatus((sc), (mask)))
sc 193 dev/ic/aacvar.h #define AAC_SET_MAILBOX(sc, command, arg0, arg1, arg2, arg3) \
sc 195 dev/ic/aacvar.h ((sc)->aac_if.aif_set_mailbox((sc), (command), (arg0), \
sc 198 dev/ic/aacvar.h #define AAC_GET_MAILBOX(sc, mb) \
sc 199 dev/ic/aacvar.h ((sc)->aac_if.aif_get_mailbox(sc, (mb)))
sc 200 dev/ic/aacvar.h #define AAC_MASK_INTERRUPTS(sc) \
sc 201 dev/ic/aacvar.h ((sc)->aac_if.aif_set_interrupts((sc), 0))
sc 202 dev/ic/aacvar.h #define AAC_UNMASK_INTERRUPTS(sc) \
sc 203 dev/ic/aacvar.h ((sc)->aac_if.aif_set_interrupts((sc), 1))
sc 205 dev/ic/aacvar.h #define AAC_SETREG4(sc, reg, val) \
sc 206 dev/ic/aacvar.h bus_space_write_4((sc)->aac_memt, (sc)->aac_memh, (reg), (val))
sc 207 dev/ic/aacvar.h #define AAC_GETREG4(sc, reg) \
sc 208 dev/ic/aacvar.h bus_space_read_4((sc)->aac_memt, (sc)->aac_memh, (reg))
sc 209 dev/ic/aacvar.h #define AAC_SETREG2(sc, reg, val) \
sc 210 dev/ic/aacvar.h bus_space_write_2((sc)->aac_memt, (sc)->aac_memh, (reg), (val))
sc 211 dev/ic/aacvar.h #define AAC_GETREG2(sc, reg) \
sc 212 dev/ic/aacvar.h bus_space_read_2((sc)->aac_memt, (sc)->aac_memh, (reg))
sc 213 dev/ic/aacvar.h #define AAC_SETREG1(sc, reg, val) \
sc 214 dev/ic/aacvar.h bus_space_write_1((sc)->aac_memt, (sc)->aac_memh, (reg), (val))
sc 215 dev/ic/aacvar.h #define AAC_GETREG1(sc, reg) \
sc 216 dev/ic/aacvar.h bus_space_read_1((sc)->aac_memt, (sc)->aac_memh, (reg))
sc 223 dev/ic/aacvar.h sc->aac_dev.dv_xname, __FUNCTION__, __LINE__)); \
sc 228 dev/ic/aacvar.h sc->aac_dev.dv_xname, __FUNCTION__, __LINE__)); \
sc 235 dev/ic/aacvar.h sc->aac_dev.dv_xname, __FUNCTION__, __LINE__)); \
sc 494 dev/ic/aacvar.h #define AACQ_ADD(sc, qname) \
sc 498 dev/ic/aacvar.h qs = &(sc)->aac_qstat[qname]; \
sc 505 dev/ic/aacvar.h #define AACQ_REMOVE(sc, qname) (sc)->aac_qstat[qname].q_length--
sc 506 dev/ic/aacvar.h #define AACQ_INIT(sc, qname) \
sc 508 dev/ic/aacvar.h sc->aac_qstat[qname].q_length = 0; \
sc 509 dev/ic/aacvar.h sc->aac_qstat[qname].q_max = 0; \
sc 515 dev/ic/aacvar.h aac_initq_ ## name (struct aac_softc *sc) \
sc 517 dev/ic/aacvar.h TAILQ_INIT(&sc->aac_ ## name); \
sc 518 dev/ic/aacvar.h AACQ_INIT(sc, index); \
sc 547 dev/ic/aacvar.h aac_dequeue_ ## name (struct aac_softc *sc) \
sc 551 dev/ic/aacvar.h if ((cm = TAILQ_FIRST(&sc->aac_ ## name)) != NULL) { \
sc 559 dev/ic/aacvar.h TAILQ_REMOVE(&sc->aac_ ## name, cm, cm_link); \
sc 561 dev/ic/aacvar.h AACQ_REMOVE(sc, index); \
sc 587 dev/ic/aacvar.h aac_print_printf(struct aac_softc *sc)
sc 593 dev/ic/aacvar.h printf("** %s: %.*s", sc->aac_dev.dv_xname, AAC_PRINTF_BUFSIZE,
sc 594 dev/ic/aacvar.h sc->aac_common->ac_printf);
sc 595 dev/ic/aacvar.h sc->aac_common->ac_printf[0] = 0;
sc 596 dev/ic/aacvar.h AAC_QNOTIFY(sc, AAC_DB_PRINTF);
sc 220 dev/ic/acx.c acx_attach(struct acx_softc *sc)
sc 222 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 223 dev/ic/acx.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 226 dev/ic/acx.c ifp->if_softc = sc;
sc 229 dev/ic/acx.c timeout_set(&sc->sc_chanscan_timer, acx_next_scan, sc);
sc 232 dev/ic/acx.c error = acx_dma_alloc(sc);
sc 237 dev/ic/acx.c error = acx_reset(sc);
sc 242 dev/ic/acx.c acx_disable_intr(sc);
sc 249 dev/ic/acx.c ee_info = CSR_READ_2(sc, ACXREG_EEPROM_INFO);
sc 251 dev/ic/acx.c sc->sc_form_factor = ACX_EEINFO_FORM_FACTOR(ee_info);
sc 252 dev/ic/acx.c sc->sc_radio_type = ACX_EEINFO_RADIO_TYPE(ee_info);
sc 261 dev/ic/acx.c printf("%s: %s, radio %s (0x%02x)", sc->sc_dev.dv_xname,
sc 262 dev/ic/acx.c (sc->sc_flags & ACX_FLAG_ACX111) ? "ACX111" : "ACX100",
sc 263 dev/ic/acx.c acx_get_rf(sc->sc_radio_type), sc->sc_radio_type);
sc 269 dev/ic/acx.c error = acx_read_eeprom(sc, i, &val);
sc 278 dev/ic/acx.c error = acx_read_eeprom(sc, ACX_EE_VERSION_OFS, &sc->sc_eeprom_ver);
sc 282 dev/ic/acx.c printf(", EEPROM ver %u", sc->sc_eeprom_ver);
sc 284 dev/ic/acx.c ifp->if_softc = sc;
sc 290 dev/ic/acx.c strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 298 dev/ic/acx.c ic->ic_channels[i].ic_flags = sc->chip_chan_flags;
sc 316 dev/ic/acx.c error = acx_read_eeprom(sc, sc->chip_ee_eaddr_ofs - i,
sc 330 dev/ic/acx.c sc->sc_newstate = ic->ic_newstate;
sc 334 dev/ic/acx.c ic->ic_max_rssi = acx_get_maxrssi(sc->sc_radio_type);
sc 340 dev/ic/acx.c sc->amrr.amrr_min_success_threshold = 1;
sc 341 dev/ic/acx.c sc->amrr.amrr_max_success_threshold = 15;
sc 342 dev/ic/acx.c timeout_set(&sc->amrr_ch, acx_amrr_timeout, sc);
sc 344 dev/ic/acx.c sc->sc_long_retry_limit = 4;
sc 345 dev/ic/acx.c sc->sc_short_retry_limit = 7;
sc 346 dev/ic/acx.c sc->sc_msdu_lifetime = 4096;
sc 349 dev/ic/acx.c bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
sc 352 dev/ic/acx.c sc->sc_rxtap_len = sizeof(sc->sc_rxtapu);
sc 353 dev/ic/acx.c sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
sc 354 dev/ic/acx.c sc->sc_rxtap.wr_ihdr.it_present = htole32(ACX_RX_RADIOTAP_PRESENT);
sc 356 dev/ic/acx.c sc->sc_txtap_len = sizeof(sc->sc_txtapu);
sc 357 dev/ic/acx.c sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
sc 358 dev/ic/acx.c sc->sc_txtap.wt_ihdr.it_present = htole32(ACX_TX_RADIOTAP_PRESENT);
sc 367 dev/ic/acx.c struct acx_softc *sc = xsc;
sc 368 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 371 dev/ic/acx.c acx_stop(sc);
sc 375 dev/ic/acx.c acx_dma_free(sc);
sc 383 dev/ic/acx.c struct acx_softc *sc = ifp->if_softc;
sc 384 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 388 dev/ic/acx.c error = acx_stop(sc);
sc 393 dev/ic/acx.c if (sc->sc_enable != NULL)
sc 394 dev/ic/acx.c (*sc->sc_enable)(sc);
sc 396 dev/ic/acx.c error = acx_init_tx_ring(sc);
sc 399 dev/ic/acx.c sc->sc_dev.dv_xname);
sc 403 dev/ic/acx.c error = acx_init_rx_ring(sc);
sc 406 dev/ic/acx.c sc->sc_dev.dv_xname);
sc 410 dev/ic/acx.c if (sc->sc_flags & ACX_FLAG_ACX111) {
sc 412 dev/ic/acx.c sc->sc_radio_type);
sc 413 dev/ic/acx.c error = acx_load_base_firmware(sc, fname);
sc 421 dev/ic/acx.c (sc->sc_flags & ACX_FLAG_ACX111) ? "111" : "100");
sc 422 dev/ic/acx.c error = acx_load_base_firmware(sc, fname);
sc 432 dev/ic/acx.c acx_init_cmd_reg(sc);
sc 433 dev/ic/acx.c acx_init_info_reg(sc);
sc 435 dev/ic/acx.c sc->sc_flags |= ACX_FLAG_FW_LOADED;
sc 439 dev/ic/acx.c (sc->sc_flags & ACX_FLAG_ACX111) ? "111" : "100",
sc 440 dev/ic/acx.c sc->sc_radio_type);
sc 441 dev/ic/acx.c error = acx_load_radio_firmware(sc, fname);
sc 447 dev/ic/acx.c error = sc->chip_init(sc);
sc 452 dev/ic/acx.c error = acx_config(sc);
sc 457 dev/ic/acx.c if (sc->sc_ic.ic_flags & IEEE80211_F_WEPON) {
sc 458 dev/ic/acx.c error = acx_set_crypt_keys(sc);
sc 464 dev/ic/acx.c CSR_CLRB_2(sc, ACXREG_GPIO_OUT, sc->chip_gpio_pled);
sc 466 dev/ic/acx.c acx_enable_intr(sc);
sc 480 dev/ic/acx.c acx_stop(sc);
sc 486 dev/ic/acx.c acx_init_info_reg(struct acx_softc *sc)
sc 488 dev/ic/acx.c sc->sc_info = CSR_READ_4(sc, ACXREG_INFO_REG_OFFSET);
sc 489 dev/ic/acx.c sc->sc_info_param = sc->sc_info + ACX_INFO_REG_SIZE;
sc 493 dev/ic/acx.c acx_set_crypt_keys(struct acx_softc *sc)
sc 495 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 505 dev/ic/acx.c if (sc->chip_hw_crypt) {
sc 506 dev/ic/acx.c error = sc->chip_set_wepkey(sc, k, i);
sc 518 dev/ic/acx.c if (acx_set_conf(sc, ACX_CONF_WEP_TXKEY, &wep_txkey,
sc 520 dev/ic/acx.c printf("%s: set WEP txkey failed\n", sc->sc_dev.dv_xname);
sc 530 dev/ic/acx.c struct acx_softc *sc = arg;
sc 531 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 539 dev/ic/acx.c acx_stop(struct acx_softc *sc)
sc 541 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 543 dev/ic/acx.c struct acx_buf_data *bd = &sc->sc_buf_data;
sc 544 dev/ic/acx.c struct acx_ring_data *rd = &sc->sc_ring_data;
sc 547 dev/ic/acx.c sc->sc_firmware_ver = 0;
sc 548 dev/ic/acx.c sc->sc_hardware_id = 0;
sc 551 dev/ic/acx.c error = acx_reset(sc);
sc 556 dev/ic/acx.c sc->sc_flags &= ~ACX_FLAG_FW_LOADED;
sc 558 dev/ic/acx.c acx_disable_intr(sc);
sc 561 dev/ic/acx.c timeout_del(&sc->sc_chanscan_timer);
sc 564 dev/ic/acx.c CSR_SETB_2(sc, ACXREG_GPIO_OUT, sc->chip_gpio_pled);
sc 574 dev/ic/acx.c bus_dmamap_unload(sc->sc_dmat, buf->tb_mbuf_dmamap);
sc 591 dev/ic/acx.c bus_dmamap_unload(sc->sc_dmat,
sc 603 dev/ic/acx.c ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1);
sc 606 dev/ic/acx.c if (sc->sc_disable != NULL)
sc 607 dev/ic/acx.c (*sc->sc_disable)(sc);
sc 613 dev/ic/acx.c acx_config(struct acx_softc *sc)
sc 618 dev/ic/acx.c error = acx_read_config(sc, &conf);
sc 622 dev/ic/acx.c error = acx_write_config(sc, &conf);
sc 626 dev/ic/acx.c error = acx_rx_config(sc);
sc 630 dev/ic/acx.c if (acx_set_probe_req_tmplt(sc, "", 0) != 0) {
sc 632 dev/ic/acx.c "(empty ssid)\n", sc->sc_dev.dv_xname);
sc 637 dev/ic/acx.c if (acx_set_null_tmplt(sc) != 0) {
sc 639 dev/ic/acx.c sc->sc_dev.dv_xname);
sc 647 dev/ic/acx.c acx_read_config(struct acx_softc *sc, struct acx_config *conf)
sc 657 dev/ic/acx.c if (acx_get_conf(sc, ACX_CONF_REGDOM, ®_dom, sizeof(reg_dom)) != 0) {
sc 658 dev/ic/acx.c printf("%s: can't get region domain\n", sc->sc_dev.dv_xname);
sc 662 dev/ic/acx.c DPRINTF(("%s: regdom %02x\n", sc->sc_dev.dv_xname, reg_dom.regdom));
sc 665 dev/ic/acx.c if (acx_get_conf(sc, ACX_CONF_ANTENNA, &ant, sizeof(ant)) != 0) {
sc 666 dev/ic/acx.c printf("%s: can't get antenna\n", sc->sc_dev.dv_xname);
sc 670 dev/ic/acx.c DPRINTF(("%s: antenna %02x\n", sc->sc_dev.dv_xname, ant.antenna));
sc 673 dev/ic/acx.c if (sc->sc_radio_type == ACX_RADIO_TYPE_MAXIM ||
sc 674 dev/ic/acx.c sc->sc_radio_type == ACX_RADIO_TYPE_RFMD ||
sc 675 dev/ic/acx.c sc->sc_radio_type == ACX_RADIO_TYPE_RALINK) {
sc 676 dev/ic/acx.c error = acx_read_phyreg(sc, ACXRV_PHYREG_SENSITIVITY, &sen);
sc 679 dev/ic/acx.c sc->sc_dev.dv_xname);
sc 684 dev/ic/acx.c DPRINTF(("%s: sensitivity %02x\n", sc->sc_dev.dv_xname, sen));
sc 687 dev/ic/acx.c if (acx_get_conf(sc, ACX_CONF_FWREV, &fw_rev, sizeof(fw_rev)) != 0) {
sc 689 dev/ic/acx.c sc->sc_dev.dv_xname);
sc 695 dev/ic/acx.c sc->sc_dev.dv_xname, fw_rev.fw_rev);
sc 708 dev/ic/acx.c sc->sc_firmware_ver = fw_rev_no;
sc 709 dev/ic/acx.c sc->sc_hardware_id = letoh32(fw_rev.hw_id);
sc 711 dev/ic/acx.c sc->sc_dev.dv_xname, sc->sc_firmware_ver, sc->sc_hardware_id));
sc 713 dev/ic/acx.c if (sc->chip_read_config != NULL) {
sc 714 dev/ic/acx.c error = sc->chip_read_config(sc, conf);
sc 723 dev/ic/acx.c acx_write_config(struct acx_softc *sc, struct acx_config *conf)
sc 731 dev/ic/acx.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 735 dev/ic/acx.c sretry.nretry = sc->sc_short_retry_limit;
sc 736 dev/ic/acx.c if (acx_set_conf(sc, ACX_CONF_NRETRY_SHORT, &sretry,
sc 742 dev/ic/acx.c lretry.nretry = sc->sc_long_retry_limit;
sc 743 dev/ic/acx.c if (acx_set_conf(sc, ACX_CONF_NRETRY_LONG, &lretry,
sc 750 dev/ic/acx.c msdu_lifetime.lifetime = htole32(sc->sc_msdu_lifetime);
sc 751 dev/ic/acx.c if (acx_set_conf(sc, ACX_CONF_MSDU_LIFETIME, &msdu_lifetime,
sc 759 dev/ic/acx.c if (acx_set_conf(sc, ACX_CONF_RATE_FALLBACK, &rate_fb,
sc 767 dev/ic/acx.c if (acx_set_conf(sc, ACX_CONF_ANTENNA, &ant, sizeof(ant)) != 0) {
sc 774 dev/ic/acx.c if (acx_set_conf(sc, ACX_CONF_REGDOM, ®_dom, sizeof(reg_dom)) != 0) {
sc 779 dev/ic/acx.c if (sc->chip_write_config != NULL) {
sc 780 dev/ic/acx.c error = sc->chip_write_config(sc, conf);
sc 789 dev/ic/acx.c acx_rx_config(struct acx_softc *sc)
sc 791 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 816 dev/ic/acx.c if (acx_set_conf(sc, ACX_CONF_RXOPT, &rx_opt, sizeof(rx_opt)) != 0) {
sc 817 dev/ic/acx.c printf("%s: can not set RX options!\n", sc->sc_dev.dv_xname);
sc 827 dev/ic/acx.c struct acx_softc *sc = ifp->if_softc;
sc 828 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 851 dev/ic/acx.c acx_stop(sc);
sc 874 dev/ic/acx.c (void)acx_set_channel(sc, chan);
sc 899 dev/ic/acx.c struct acx_softc *sc = ifp->if_softc;
sc 900 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 901 dev/ic/acx.c struct acx_buf_data *bd = &sc->sc_buf_data;
sc 905 dev/ic/acx.c if ((sc->sc_flags & ACX_FLAG_FW_LOADED) == 0 ||
sc 1000 dev/ic/acx.c if ((wh->i_fc[1] & IEEE80211_FC1_WEP) && !sc->chip_hw_crypt) {
sc 1011 dev/ic/acx.c if (sc->sc_drvbpf != NULL) {
sc 1013 dev/ic/acx.c struct acx_tx_radiotap_hdr *tap = &sc->sc_txtap;
sc 1023 dev/ic/acx.c mb.m_len = sc->sc_txtap_len;
sc 1028 dev/ic/acx.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 1032 dev/ic/acx.c if (acx_encap(sc, buf, m, ni, rate) != 0) {
sc 1061 dev/ic/acx.c sc->sc_txtimer = 5;
sc 1067 dev/ic/acx.c struct acx_softc *sc = ifp->if_softc;
sc 1074 dev/ic/acx.c if (sc->sc_txtimer) {
sc 1075 dev/ic/acx.c if (--sc->sc_txtimer == 0) {
sc 1090 dev/ic/acx.c struct acx_softc *sc = arg;
sc 1093 dev/ic/acx.c if ((sc->sc_flags & ACX_FLAG_FW_LOADED) == 0)
sc 1096 dev/ic/acx.c intr_status = CSR_READ_2(sc, ACXREG_INTR_STATUS_CLR);
sc 1102 dev/ic/acx.c intr_status &= sc->chip_intr_enable;
sc 1109 dev/ic/acx.c CSR_WRITE_2(sc, ACXREG_INTR_ACK, ACXRV_INTR_ALL);
sc 1112 dev/ic/acx.c acx_txeof(sc);
sc 1115 dev/ic/acx.c acx_rxeof(sc);
sc 1121 dev/ic/acx.c acx_disable_intr(struct acx_softc *sc)
sc 1123 dev/ic/acx.c CSR_WRITE_2(sc, ACXREG_INTR_MASK, sc->chip_intr_disable);
sc 1124 dev/ic/acx.c CSR_WRITE_2(sc, ACXREG_EVENT_MASK, 0);
sc 1128 dev/ic/acx.c acx_enable_intr(struct acx_softc *sc)
sc 1131 dev/ic/acx.c CSR_WRITE_2(sc, ACXREG_INTR_MASK, ~sc->chip_intr_enable);
sc 1132 dev/ic/acx.c CSR_WRITE_2(sc, ACXREG_EVENT_MASK, ACXRV_EVENT_DISABLE);
sc 1136 dev/ic/acx.c acx_txeof(struct acx_softc *sc)
sc 1143 dev/ic/acx.c ifp = &sc->sc_ic.ic_if;
sc 1145 dev/ic/acx.c bd = &sc->sc_buf_data;
sc 1151 dev/ic/acx.c ctrl = FW_TXDESC_GETFIELD_1(sc, buf, f_tx_ctrl);
sc 1156 dev/ic/acx.c bus_dmamap_unload(sc->sc_dmat, buf->tb_mbuf_dmamap);
sc 1160 dev/ic/acx.c error = FW_TXDESC_GETFIELD_1(sc, buf, f_tx_error);
sc 1162 dev/ic/acx.c acx_txerr(sc, error);
sc 1174 dev/ic/acx.c ic = &sc->sc_ic;
sc 1177 dev/ic/acx.c ntries = FW_TXDESC_GETFIELD_1(sc, buf, f_tx_rts_fail) +
sc 1178 dev/ic/acx.c FW_TXDESC_GETFIELD_1(sc, buf, f_tx_ack_fail);
sc 1183 dev/ic/acx.c sc->sc_dev.dv_xname, ntries));
sc 1191 dev/ic/acx.c FW_TXDESC_SETFIELD_1(sc, buf, f_tx_ctrl, DESC_CTRL_HOSTOWN);
sc 1200 dev/ic/acx.c sc->sc_txtimer = 0;
sc 1209 dev/ic/acx.c acx_txerr(struct acx_softc *sc, uint8_t err)
sc 1211 dev/ic/acx.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1212 dev/ic/acx.c struct acx_stats *stats = &sc->sc_stats;
sc 1220 dev/ic/acx.c sc->sc_dev.dv_xname));
sc 1277 dev/ic/acx.c acx_rxeof(struct acx_softc *sc)
sc 1279 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 1280 dev/ic/acx.c struct acx_ring_data *rd = &sc->sc_ring_data;
sc 1281 dev/ic/acx.c struct acx_buf_data *bd = &sc->sc_buf_data;
sc 1285 dev/ic/acx.c bus_dmamap_sync(sc->sc_dmat, rd->rx_ring_dmamap, 0,
sc 1329 dev/ic/acx.c bus_dmamap_sync(sc->sc_dmat, buf->rb_mbuf_dmamap, 0,
sc 1334 dev/ic/acx.c error = acx_newbuf(sc, buf, 0);
sc 1349 dev/ic/acx.c sc->chip_rxbuf_exhdr);
sc 1353 dev/ic/acx.c sc->chip_hw_crypt) {
sc 1358 dev/ic/acx.c if (sc->chip_proc_wep_rxbuf != NULL) {
sc 1359 dev/ic/acx.c sc->chip_proc_wep_rxbuf(sc, m, &len);
sc 1368 dev/ic/acx.c if (sc->sc_drvbpf != NULL) {
sc 1370 dev/ic/acx.c struct acx_rx_radiotap_hdr *tap = &sc->sc_rxtap;
sc 1381 dev/ic/acx.c mb.m_len = sc->sc_rxtap_len;
sc 1386 dev/ic/acx.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
sc 1405 dev/ic/acx.c bus_dmamap_sync(sc->sc_dmat, rd->rx_ring_dmamap, 0,
sc 1426 dev/ic/acx.c acx_reset(struct acx_softc *sc)
sc 1431 dev/ic/acx.c CSR_SETB_2(sc, ACXREG_ECPU_CTRL, ACXRV_ECPU_HALT);
sc 1434 dev/ic/acx.c reg = CSR_READ_2(sc, ACXREG_SOFT_RESET);
sc 1435 dev/ic/acx.c CSR_WRITE_2(sc, ACXREG_SOFT_RESET, reg | ACXRV_SOFT_RESET);
sc 1437 dev/ic/acx.c CSR_WRITE_2(sc, ACXREG_SOFT_RESET, reg);
sc 1440 dev/ic/acx.c CSR_SETB_2(sc, ACXREG_EEPROM_INIT, ACXRV_EEPROM_INIT);
sc 1444 dev/ic/acx.c reg = CSR_READ_2(sc, ACXREG_ECPU_CTRL);
sc 1446 dev/ic/acx.c printf("%s: can't halt ECPU\n", sc->sc_dev.dv_xname);
sc 1454 dev/ic/acx.c acx_read_eeprom(struct acx_softc *sc, uint32_t offset, uint8_t *val)
sc 1457 dev/ic/acx.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1459 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_EEPROM_CONF, 0);
sc 1460 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_EEPROM_ADDR, offset);
sc 1461 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_EEPROM_CTRL, ACXRV_EEPROM_READ);
sc 1465 dev/ic/acx.c if (CSR_READ_2(sc, ACXREG_EEPROM_CTRL) == 0)
sc 1476 dev/ic/acx.c *val = CSR_READ_1(sc, ACXREG_EEPROM_DATA);
sc 1482 dev/ic/acx.c acx_read_phyreg(struct acx_softc *sc, uint32_t reg, uint8_t *val)
sc 1484 dev/ic/acx.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1487 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_PHY_ADDR, reg);
sc 1488 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_PHY_CTRL, ACXRV_PHY_READ);
sc 1492 dev/ic/acx.c if (CSR_READ_4(sc, ACXREG_PHY_CTRL) == 0)
sc 1503 dev/ic/acx.c *val = CSR_READ_1(sc, ACXREG_PHY_DATA);
sc 1509 dev/ic/acx.c acx_write_phyreg(struct acx_softc *sc, uint32_t reg, uint8_t val)
sc 1511 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_PHY_DATA, val);
sc 1512 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_PHY_ADDR, reg);
sc 1513 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_PHY_CTRL, ACXRV_PHY_WRITE);
sc 1517 dev/ic/acx.c acx_load_base_firmware(struct acx_softc *sc, const char *name)
sc 1519 dev/ic/acx.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1533 dev/ic/acx.c error = acx_load_firmware(sc, 0, ucode, size);
sc 1541 dev/ic/acx.c DPRINTF(("%s: base firmware loaded\n", sc->sc_dev.dv_xname));
sc 1544 dev/ic/acx.c CSR_WRITE_2(sc, ACXREG_ECPU_CTRL, ACXRV_ECPU_START);
sc 1550 dev/ic/acx.c reg = CSR_READ_2(sc, ACXREG_INTR_STATUS);
sc 1552 dev/ic/acx.c CSR_WRITE_2(sc, ACXREG_INTR_ACK, ACXRV_INTR_FCS_THRESH);
sc 1564 dev/ic/acx.c acx_load_radio_firmware(struct acx_softc *sc, const char *name)
sc 1566 dev/ic/acx.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1585 dev/ic/acx.c if (acx_get_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
sc 1592 dev/ic/acx.c if (acx_exec_command(sc, ACXCMD_SLEEP, NULL, 0, NULL, 0) != 0) {
sc 1598 dev/ic/acx.c error = acx_load_firmware(sc, radio_fw_ofs, ucode, size);
sc 1606 dev/ic/acx.c DPRINTF(("%s: radio firmware loaded\n", sc->sc_dev.dv_xname));
sc 1609 dev/ic/acx.c if (acx_exec_command(sc, ACXCMD_WAKEUP, NULL, 0, NULL, 0) != 0)
sc 1613 dev/ic/acx.c if (acx_init_radio(sc, radio_fw_ofs, size) != 0)
sc 1617 dev/ic/acx.c if (acx_get_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0)
sc 1626 dev/ic/acx.c DPRINTF(("%s: radio firmware initialized\n", sc->sc_dev.dv_xname));
sc 1632 dev/ic/acx.c acx_load_firmware(struct acx_softc *sc, uint32_t offset, const uint8_t *data,
sc 1635 dev/ic/acx.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1665 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_START, ACXRV_FWMEM_START_OP);
sc 1667 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, 0);
sc 1669 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, ACXRV_FWMEM_ADDR_AUTOINC);
sc 1670 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset);
sc 1675 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset + (i * 4));
sc 1677 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_DATA, betoh32(fw[i]));
sc 1681 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_START, ACXRV_FWMEM_START_OP);
sc 1683 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, 0);
sc 1685 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, ACXRV_FWMEM_ADDR_AUTOINC);
sc 1686 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset);
sc 1693 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset + (i * 4));
sc 1695 dev/ic/acx.c val = CSR_READ_4(sc, ACXREG_FWMEM_DATA);
sc 1723 dev/ic/acx.c struct acx_softc *sc = ic->ic_if.if_softc;
sc 1727 dev/ic/acx.c timeout_del(&sc->amrr_ch);
sc 1736 dev/ic/acx.c (void)acx_set_channel(sc, chan);
sc 1738 dev/ic/acx.c timeout_add(&sc->sc_chanscan_timer,
sc 1751 dev/ic/acx.c if (acx_join_bss(sc, ACX_MODE_STA, ni) != 0) {
sc 1757 dev/ic/acx.c DPRINTF(("%s: join BSS\n", sc->sc_dev.dv_xname));
sc 1760 dev/ic/acx.c sc->sc_dev.dv_xname));
sc 1765 dev/ic/acx.c printf("%s: AP rates: ", sc->sc_dev.dv_xname);
sc 1784 dev/ic/acx.c if (acx_set_channel(sc, chan) != 0)
sc 1787 dev/ic/acx.c if (acx_set_beacon_tmplt(sc, ni) != 0) {
sc 1793 dev/ic/acx.c if (acx_set_probe_resp_tmplt(sc, ni) != 0) {
sc 1800 dev/ic/acx.c if (acx_join_bss(sc, ACX_MODE_ADHOC, ni) != 0) {
sc 1806 dev/ic/acx.c if (acx_join_bss(sc, ACX_MODE_AP, ni) != 0) {
sc 1813 dev/ic/acx.c DPRINTF(("%s: join IBSS\n", sc->sc_dev.dv_xname));
sc 1823 dev/ic/acx.c timeout_add(&sc->amrr_ch, hz / 2);
sc 1836 dev/ic/acx.c return (sc->sc_newstate(ic, nstate, arg));
sc 1840 dev/ic/acx.c acx_init_tmplt_ordered(struct acx_softc *sc)
sc 1861 dev/ic/acx.c if (acx_set_tmplt(sc, ACXCMD_TMPLT_PROBE_REQ, &data.preq,
sc 1865 dev/ic/acx.c if (acx_set_tmplt(sc, ACXCMD_TMPLT_NULL_DATA, &data.null,
sc 1869 dev/ic/acx.c if (acx_set_tmplt(sc, ACXCMD_TMPLT_BEACON, &data.beacon,
sc 1873 dev/ic/acx.c if (acx_set_tmplt(sc, ACXCMD_TMPLT_TIM, &data.tim,
sc 1877 dev/ic/acx.c if (acx_set_tmplt(sc, ACXCMD_TMPLT_PROBE_RESP, &data.presp,
sc 1885 dev/ic/acx.c acx_dma_alloc(struct acx_softc *sc)
sc 1887 dev/ic/acx.c struct acx_ring_data *rd = &sc->sc_ring_data;
sc 1888 dev/ic/acx.c struct acx_buf_data *bd = &sc->sc_buf_data;
sc 1889 dev/ic/acx.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1893 dev/ic/acx.c error = bus_dmamap_create(sc->sc_dmat, ACX_RX_RING_SIZE, 1,
sc 1898 dev/ic/acx.c sc->sc_dev.dv_xname);
sc 1902 dev/ic/acx.c error = bus_dmamem_alloc(sc->sc_dmat, ACX_RX_RING_SIZE, PAGE_SIZE,
sc 1907 dev/ic/acx.c sc->sc_dev.dv_xname);
sc 1911 dev/ic/acx.c error = bus_dmamem_map(sc->sc_dmat, &rd->rx_ring_seg, nsegs,
sc 1917 dev/ic/acx.c sc->sc_dev.dv_xname);
sc 1921 dev/ic/acx.c error = bus_dmamap_load(sc->sc_dmat, rd->rx_ring_dmamap,
sc 1926 dev/ic/acx.c sc->sc_dev.dv_xname);
sc 1927 dev/ic/acx.c bus_dmamem_free(sc->sc_dmat, &rd->rx_ring_seg, 1);
sc 1934 dev/ic/acx.c error = bus_dmamap_create(sc->sc_dmat, ACX_TX_RING_SIZE, 1,
sc 1942 dev/ic/acx.c error = bus_dmamem_alloc(sc->sc_dmat, ACX_TX_RING_SIZE, PAGE_SIZE,
sc 1951 dev/ic/acx.c error = bus_dmamem_map(sc->sc_dmat, &rd->tx_ring_seg, nsegs,
sc 1956 dev/ic/acx.c sc->sc_dev.dv_xname);
sc 1960 dev/ic/acx.c error = bus_dmamap_load(sc->sc_dmat, rd->tx_ring_dmamap,
sc 1965 dev/ic/acx.c bus_dmamem_free(sc->sc_dmat, &rd->tx_ring_seg, 1);
sc 1972 dev/ic/acx.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
sc 1982 dev/ic/acx.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 1994 dev/ic/acx.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 2009 dev/ic/acx.c acx_dma_free(struct acx_softc *sc)
sc 2011 dev/ic/acx.c struct acx_ring_data *rd = &sc->sc_ring_data;
sc 2012 dev/ic/acx.c struct acx_buf_data *bd = &sc->sc_buf_data;
sc 2016 dev/ic/acx.c bus_dmamap_unload(sc->sc_dmat, rd->rx_ring_dmamap);
sc 2017 dev/ic/acx.c bus_dmamem_free(sc->sc_dmat, &rd->rx_ring_seg, 1);
sc 2021 dev/ic/acx.c bus_dmamap_unload(sc->sc_dmat, rd->tx_ring_dmamap);
sc 2022 dev/ic/acx.c bus_dmamem_free(sc->sc_dmat, &rd->tx_ring_seg, 1);
sc 2028 dev/ic/acx.c bus_dmamap_unload(sc->sc_dmat,
sc 2032 dev/ic/acx.c bus_dmamap_destroy(sc->sc_dmat,
sc 2040 dev/ic/acx.c bus_dmamap_unload(sc->sc_dmat,
sc 2044 dev/ic/acx.c bus_dmamap_destroy(sc->sc_dmat,
sc 2050 dev/ic/acx.c bus_dmamap_destroy(sc->sc_dmat, bd->mbuf_tmp_dmamap);
sc 2054 dev/ic/acx.c acx_init_tx_ring(struct acx_softc *sc)
sc 2061 dev/ic/acx.c rd = &sc->sc_ring_data;
sc 2075 dev/ic/acx.c bus_dmamap_sync(sc->sc_dmat, rd->tx_ring_dmamap, 0,
sc 2078 dev/ic/acx.c bd = &sc->sc_buf_data;
sc 2087 dev/ic/acx.c acx_init_rx_ring(struct acx_softc *sc)
sc 2094 dev/ic/acx.c bd = &sc->sc_buf_data;
sc 2095 dev/ic/acx.c rd = &sc->sc_ring_data;
sc 2104 dev/ic/acx.c error = acx_newbuf(sc, &bd->rx_buf[i], 1);
sc 2114 dev/ic/acx.c bus_dmamap_sync(sc->sc_dmat, rd->rx_ring_dmamap, 0,
sc 2123 dev/ic/acx.c acx_newbuf(struct acx_softc *sc, struct acx_rxbuf *rb, int wait)
sc 2131 dev/ic/acx.c bd = &sc->sc_buf_data;
sc 2145 dev/ic/acx.c error = bus_dmamap_load_mbuf(sc->sc_dmat, bd->mbuf_tmp_dmamap, m,
sc 2150 dev/ic/acx.c sc->sc_dev.dv_xname, error);
sc 2156 dev/ic/acx.c bus_dmamap_unload(sc->sc_dmat, rb->rb_mbuf_dmamap);
sc 2168 dev/ic/acx.c bus_dmamap_sync(sc->sc_dmat, rb->rb_mbuf_dmamap, 0,
sc 2175 dev/ic/acx.c acx_encap(struct acx_softc *sc, struct acx_txbuf *txbuf, struct mbuf *m,
sc 2178 dev/ic/acx.c struct acx_ring_data *rd = &sc->sc_ring_data;
sc 2180 dev/ic/acx.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 2200 dev/ic/acx.c error = bus_dmamap_load_mbuf(sc->sc_dmat, txbuf->tb_mbuf_dmamap, m,
sc 2205 dev/ic/acx.c sc->sc_dev.dv_xname, error);
sc 2243 dev/ic/acx.c error = bus_dmamap_load_mbuf(sc->sc_dmat,
sc 2247 dev/ic/acx.c sc->sc_dev.dv_xname, error);
sc 2254 dev/ic/acx.c bus_dmamap_sync(sc->sc_dmat, txbuf->tb_mbuf_dmamap, 0,
sc 2285 dev/ic/acx.c htole16(sc->chip_txdesc1_len ? sc->chip_txdesc1_len
sc 2295 dev/ic/acx.c ctrl = FW_TXDESC_GETFIELD_1(sc, txbuf, f_tx_ctrl);
sc 2296 dev/ic/acx.c ctrl |= sc->chip_fw_txdesc_ctrl; /* extra chip specific flags */
sc 2299 dev/ic/acx.c FW_TXDESC_SETFIELD_2(sc, txbuf, f_tx_len, m->m_pkthdr.len);
sc 2300 dev/ic/acx.c FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_error, 0);
sc 2301 dev/ic/acx.c FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_ack_fail, 0);
sc 2302 dev/ic/acx.c FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_rts_fail, 0);
sc 2303 dev/ic/acx.c FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_rts_ok, 0);
sc 2304 dev/ic/acx.c sc->chip_set_fw_txdesc_rate(sc, txbuf, rate);
sc 2308 dev/ic/acx.c bus_dmamap_sync(sc->sc_dmat, rd->tx_ring_dmamap, 0,
sc 2311 dev/ic/acx.c FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_ctrl2, 0);
sc 2312 dev/ic/acx.c FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_ctrl, ctrl);
sc 2315 dev/ic/acx.c CSR_WRITE_2(sc, ACXREG_INTR_TRIG, ACXRV_TRIG_TX_FINI);
sc 2324 dev/ic/acx.c acx_set_null_tmplt(struct acx_softc *sc)
sc 2326 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 2340 dev/ic/acx.c return (acx_set_tmplt(sc, ACXCMD_TMPLT_NULL_DATA, &n, sizeof(n)));
sc 2344 dev/ic/acx.c acx_set_probe_req_tmplt(struct acx_softc *sc, const char *ssid, int ssid_len)
sc 2346 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 2364 dev/ic/acx.c frm = ieee80211_add_rates(frm, &ic->ic_sup_rates[sc->chip_phymode]);
sc 2365 dev/ic/acx.c frm = ieee80211_add_xrates(frm, &ic->ic_sup_rates[sc->chip_phymode]);
sc 2368 dev/ic/acx.c return (acx_set_tmplt(sc, ACXCMD_TMPLT_PROBE_REQ, &req,
sc 2376 dev/ic/acx.c acx_set_probe_resp_tmplt(struct acx_softc *sc, struct ieee80211_node *ni)
sc 2378 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 2406 dev/ic/acx.c return (acx_set_tmplt(sc, ACXCMD_TMPLT_PROBE_RESP, &resp, len));
sc 2436 dev/ic/acx.c acx_set_beacon_tmplt(struct acx_softc *sc, struct ieee80211_node *ni)
sc 2438 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 2456 dev/ic/acx.c if (acx_set_tmplt(sc, ACXCMD_TMPLT_BEACON, &beacon, len) != 0) {
sc 2472 dev/ic/acx.c return (acx_set_tmplt(sc, ACXCMD_TMPLT_TIM, &tim, len));
sc 2476 dev/ic/acx.c acx_init_cmd_reg(struct acx_softc *sc)
sc 2478 dev/ic/acx.c sc->sc_cmd = CSR_READ_4(sc, ACXREG_CMD_REG_OFFSET);
sc 2479 dev/ic/acx.c sc->sc_cmd_param = sc->sc_cmd + ACX_CMD_REG_SIZE;
sc 2482 dev/ic/acx.c CMD_WRITE_4(sc, 0);
sc 2486 dev/ic/acx.c acx_join_bss(struct acx_softc *sc, uint8_t mode, struct ieee80211_node *node)
sc 2501 dev/ic/acx.c dtim_intvl = sc->sc_ic.ic_opmode == IEEE80211_M_IBSS ? 1 : 10;
sc 2502 dev/ic/acx.c sc->chip_set_bss_join_param(sc, bj->chip_spec, dtim_intvl);
sc 2507 dev/ic/acx.c bj->channel = ieee80211_chan2ieee(&sc->sc_ic, node->ni_chan);
sc 2511 dev/ic/acx.c DPRINTF(("%s: join BSS/IBSS on channel %d\n", sc->sc_dev.dv_xname,
sc 2513 dev/ic/acx.c return (acx_exec_command(sc, ACXCMD_JOIN_BSS,
sc 2518 dev/ic/acx.c acx_set_channel(struct acx_softc *sc, uint8_t chan)
sc 2520 dev/ic/acx.c if (acx_exec_command(sc, ACXCMD_ENABLE_TXCHAN, &chan, sizeof(chan),
sc 2523 dev/ic/acx.c sc->sc_dev.dv_xname, chan));
sc 2527 dev/ic/acx.c if (acx_exec_command(sc, ACXCMD_ENABLE_RXCHAN, &chan, sizeof(chan),
sc 2530 dev/ic/acx.c sc->sc_dev.dv_xname, chan));
sc 2538 dev/ic/acx.c acx_get_conf(struct acx_softc *sc, uint16_t conf_id, void *conf,
sc 2545 dev/ic/acx.c sc->sc_dev.dv_xname, __func__);
sc 2553 dev/ic/acx.c return (acx_exec_command(sc, ACXCMD_GET_CONF, confcom, sizeof(*confcom),
sc 2558 dev/ic/acx.c acx_set_conf(struct acx_softc *sc, uint16_t conf_id, void *conf,
sc 2565 dev/ic/acx.c sc->sc_dev.dv_xname, __func__);
sc 2573 dev/ic/acx.c return (acx_exec_command(sc, ACXCMD_SET_CONF, conf, conf_len, NULL, 0));
sc 2577 dev/ic/acx.c acx_set_tmplt(struct acx_softc *sc, uint16_t cmd, void *tmplt,
sc 2584 dev/ic/acx.c sc->sc_dev.dv_xname, __func__);
sc 2591 dev/ic/acx.c return (acx_exec_command(sc, cmd, tmplt, tmplt_len, NULL, 0));
sc 2595 dev/ic/acx.c acx_init_radio(struct acx_softc *sc, uint32_t radio_ofs, uint32_t radio_len)
sc 2602 dev/ic/acx.c return (acx_exec_command(sc, ACXCMD_INIT_RADIO, &r, sizeof(r), NULL,
sc 2607 dev/ic/acx.c acx_exec_command(struct acx_softc *sc, uint16_t cmd, void *param,
sc 2613 dev/ic/acx.c if ((sc->sc_flags & ACX_FLAG_FW_LOADED) == 0) {
sc 2615 dev/ic/acx.c sc->sc_dev.dv_xname, cmd);
sc 2623 dev/ic/acx.c CMDPRM_WRITE_REGION_1(sc, param, param_len);
sc 2627 dev/ic/acx.c CMD_WRITE_4(sc, cmd);
sc 2630 dev/ic/acx.c CSR_WRITE_2(sc, ACXREG_INTR_TRIG, ACXRV_TRIG_CMD_FINI);
sc 2643 dev/ic/acx.c reg = CSR_READ_2(sc, ACXREG_INTR_STATUS);
sc 2645 dev/ic/acx.c CSR_WRITE_2(sc, ACXREG_INTR_ACK, ACXRV_INTR_CMD_FINI);
sc 2652 dev/ic/acx.c sc->sc_dev.dv_xname, cmd);
sc 2659 dev/ic/acx.c status = (CMD_READ_4(sc) >> ACX_CMD_STATUS_SHIFT);
sc 2661 dev/ic/acx.c DPRINTF(("%s: cmd %04x failed\n", sc->sc_dev.dv_xname, cmd));
sc 2668 dev/ic/acx.c CMDPRM_READ_REGION_1(sc, result, result_len);
sc 2672 dev/ic/acx.c CMD_WRITE_4(sc, 0);
sc 2704 dev/ic/acx.c struct acx_softc *sc = arg;
sc 2707 dev/ic/acx.c ieee80211_amrr_choose(&sc->amrr, ni, &wn->amn);
sc 2713 dev/ic/acx.c struct acx_softc *sc = arg;
sc 2714 dev/ic/acx.c struct ieee80211com *ic = &sc->sc_ic;
sc 2717 dev/ic/acx.c acx_iter_func(sc, ic->ic_bss);
sc 2719 dev/ic/acx.c ieee80211_iterate_nodes(ic, acx_iter_func, sc);
sc 2721 dev/ic/acx.c timeout_add(&sc->amrr_ch, hz / 2);
sc 2727 dev/ic/acx.c struct acx_softc *sc = ic->ic_if.if_softc;
sc 2730 dev/ic/acx.c ieee80211_amrr_node_init(&sc->amrr, &((struct acx_node *)ni)->amn);
sc 261 dev/ic/acx100.c acx100_set_param(struct acx_softc *sc)
sc 263 dev/ic/acx100.c sc->chip_mem1_rid = PCIR_BAR(1);
sc 264 dev/ic/acx100.c sc->chip_mem2_rid = PCIR_BAR(2);
sc 265 dev/ic/acx100.c sc->chip_ioreg = acx100_reg;
sc 266 dev/ic/acx100.c sc->chip_hw_crypt = 1;
sc 267 dev/ic/acx100.c sc->chip_intr_enable = ACX100_INTR_ENABLE;
sc 268 dev/ic/acx100.c sc->chip_intr_disable = ACX100_INTR_DISABLE;
sc 269 dev/ic/acx100.c sc->chip_gpio_pled = ACX100_GPIO_POWER_LED;
sc 270 dev/ic/acx100.c sc->chip_ee_eaddr_ofs = ACX100_EE_EADDR_OFS;
sc 271 dev/ic/acx100.c sc->chip_txdesc1_len = ACX_FRAME_HDRLEN;
sc 272 dev/ic/acx100.c sc->chip_fw_txdesc_ctrl = DESC_CTRL_AUTODMA |
sc 275 dev/ic/acx100.c sc->chip_phymode = IEEE80211_MODE_11B;
sc 276 dev/ic/acx100.c sc->chip_chan_flags = IEEE80211_CHAN_B;
sc 277 dev/ic/acx100.c sc->sc_ic.ic_phytype = IEEE80211_T_DS;
sc 278 dev/ic/acx100.c sc->sc_ic.ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
sc 280 dev/ic/acx100.c sc->chip_init = acx100_init;
sc 281 dev/ic/acx100.c sc->chip_set_wepkey = acx100_set_wepkey;
sc 282 dev/ic/acx100.c sc->chip_read_config = acx100_read_config;
sc 283 dev/ic/acx100.c sc->chip_write_config = acx100_write_config;
sc 284 dev/ic/acx100.c sc->chip_set_fw_txdesc_rate = acx100_set_fw_txdesc_rate;
sc 285 dev/ic/acx100.c sc->chip_set_bss_join_param = acx100_set_bss_join_param;
sc 286 dev/ic/acx100.c sc->chip_proc_wep_rxbuf = acx100_proc_wep_rxbuf;
sc 290 dev/ic/acx100.c acx100_init(struct acx_softc *sc)
sc 292 dev/ic/acx100.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 303 dev/ic/acx100.c if (acx100_init_wep(sc) != 0) {
sc 309 dev/ic/acx100.c if (acx100_init_tmplt(sc) != 0) {
sc 315 dev/ic/acx100.c if (acx100_init_fw_ring(sc) != 0) {
sc 321 dev/ic/acx100.c if (acx100_init_memory(sc) != 0) {
sc 331 dev/ic/acx100.c acx100_init_wep(struct acx_softc *sc)
sc 335 dev/ic/acx100.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 338 dev/ic/acx100.c if (acx_get_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
sc 345 dev/ic/acx100.c if (acx_set_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
sc 353 dev/ic/acx100.c if (acx_set_conf(sc, ACX_CONF_WEPOPT, &wep_opt, sizeof(wep_opt)) != 0) {
sc 362 dev/ic/acx100.c acx100_init_tmplt(struct acx_softc *sc)
sc 365 dev/ic/acx100.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 368 dev/ic/acx100.c if (acx_get_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
sc 374 dev/ic/acx100.c if (acx_set_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
sc 380 dev/ic/acx100.c if (acx_init_tmplt_ordered(sc) != 0) {
sc 389 dev/ic/acx100.c acx100_init_fw_ring(struct acx_softc *sc)
sc 393 dev/ic/acx100.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 397 dev/ic/acx100.c if (acx_get_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
sc 407 dev/ic/acx100.c if (acx_set_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
sc 427 dev/ic/acx100.c if (acx_set_conf(sc, ACX100_CONF_FW_RING, &ring, sizeof(ring)) != 0) {
sc 433 dev/ic/acx100.c acx100_init_fw_txring(sc, txring_start);
sc 434 dev/ic/acx100.c acx100_init_fw_rxring(sc, rxring_start);
sc 443 dev/ic/acx100.c acx100_init_memory(struct acx_softc *sc)
sc 448 dev/ic/acx100.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 453 dev/ic/acx100.c if (acx_get_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
sc 461 dev/ic/acx100.c if (acx_set_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
sc 468 dev/ic/acx100.c if (acx_set_conf(sc, ACX_CONF_MEMBLK_SIZE, &memblk_sz,
sc 475 dev/ic/acx100.c if (acx_get_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
sc 484 dev/ic/acx100.c mem.h_rxring_paddr = htole32(sc->sc_ring_data.rx_ring_paddr);
sc 503 dev/ic/acx100.c if (acx_set_conf(sc, ACX100_CONF_MEMOPT, &mem, sizeof(mem)) != 0) {
sc 509 dev/ic/acx100.c if (acx_exec_command(sc, ACXCMD_INIT_MEM, NULL, 0, NULL, 0) != 0) {
sc 520 dev/ic/acx100.c acx100_init_fw_txring(struct acx_softc *sc, uint32_t fw_txdesc_start)
sc 531 dev/ic/acx100.c tx_buf = sc->sc_buf_data.tx_buf;
sc 533 dev/ic/acx100.c desc_paddr = sc->sc_ring_data.tx_ring_paddr;
sc 546 dev/ic/acx100.c DESC_WRITE_REGION_1(sc, fw_desc_offset, &fw_desc,
sc 555 dev/ic/acx100.c acx100_init_fw_rxring(struct acx_softc *sc, uint32_t fw_rxdesc_start)
sc 575 dev/ic/acx100.c DESC_WRITE_REGION_1(sc, fw_desc_offset, &fw_desc,
sc 583 dev/ic/acx100.c acx100_read_config(struct acx_softc *sc, struct acx_config *conf)
sc 587 dev/ic/acx100.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 596 dev/ic/acx100.c if (acx_get_conf(sc, ACX_CONF_CCA_MODE, &cca, sizeof(cca)) != 0) {
sc 605 dev/ic/acx100.c if (acx_get_conf(sc, ACX_CONF_ED_THRESH, &ed, sizeof(ed)) != 0) {
sc 617 dev/ic/acx100.c acx100_write_config(struct acx_softc *sc, struct acx_config *conf)
sc 621 dev/ic/acx100.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 625 dev/ic/acx100.c if (acx_set_conf(sc, ACX_CONF_CCA_MODE, &cca, sizeof(cca)) != 0) {
sc 633 dev/ic/acx100.c if (acx_set_conf(sc, ACX_CONF_ED_THRESH, &ed, sizeof(ed)) != 0) {
sc 640 dev/ic/acx100.c acx100_set_txpower(sc); /* ignore return value */
sc 646 dev/ic/acx100.c acx100_set_txpower(struct acx_softc *sc)
sc 648 dev/ic/acx100.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 651 dev/ic/acx100.c switch (sc->sc_radio_type) {
sc 661 dev/ic/acx100.c ifp->if_xname, sc->sc_radio_type);
sc 665 dev/ic/acx100.c acx_write_phyreg(sc, ACXRV_PHYREG_TXPOWER, map[ACX100_TXPOWER]);
sc 671 dev/ic/acx100.c acx100_set_fw_txdesc_rate(struct acx_softc *sc, struct acx_txbuf *tx_buf,
sc 674 dev/ic/acx100.c FW_TXDESC_SETFIELD_1(sc, tx_buf, f_tx_rate100, ACX100_RATE(rate));
sc 678 dev/ic/acx100.c acx100_set_bss_join_param(struct acx_softc *sc, void *param, int dtim_intvl)
sc 688 dev/ic/acx100.c acx100_set_wepkey(struct acx_softc *sc, struct ieee80211_key *k, int k_idx)
sc 691 dev/ic/acx100.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 703 dev/ic/acx100.c if (acx_set_conf(sc, ACX_CONF_WEPKEY, &conf_wk, sizeof(conf_wk)) != 0) {
sc 712 dev/ic/acx100.c acx100_proc_wep_rxbuf(struct acx_softc *sc, struct mbuf *m, int *len)
sc 273 dev/ic/acx111.c acx111_set_param(struct acx_softc *sc)
sc 275 dev/ic/acx111.c sc->chip_mem1_rid = PCIR_BAR(0);
sc 276 dev/ic/acx111.c sc->chip_mem2_rid = PCIR_BAR(1);
sc 277 dev/ic/acx111.c sc->chip_ioreg = acx111_reg;
sc 278 dev/ic/acx111.c sc->chip_intr_enable = ACX111_INTR_ENABLE;
sc 279 dev/ic/acx111.c sc->chip_intr_disable = ACX111_INTR_DISABLE;
sc 280 dev/ic/acx111.c sc->chip_gpio_pled = ACX111_GPIO_POWER_LED;
sc 281 dev/ic/acx111.c sc->chip_ee_eaddr_ofs = ACX111_EE_EADDR_OFS;
sc 283 dev/ic/acx111.c sc->chip_phymode = IEEE80211_MODE_11G;
sc 284 dev/ic/acx111.c sc->chip_chan_flags = IEEE80211_CHAN_CCK |
sc 288 dev/ic/acx111.c sc->sc_ic.ic_caps = IEEE80211_C_WEP;
sc 289 dev/ic/acx111.c sc->sc_ic.ic_phytype = IEEE80211_T_OFDM;
sc 290 dev/ic/acx111.c sc->sc_ic.ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
sc 291 dev/ic/acx111.c sc->sc_ic.ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
sc 293 dev/ic/acx111.c sc->chip_init = acx111_init;
sc 294 dev/ic/acx111.c sc->chip_write_config = acx111_write_config;
sc 295 dev/ic/acx111.c sc->chip_set_fw_txdesc_rate = acx111_set_fw_txdesc_rate;
sc 296 dev/ic/acx111.c sc->chip_set_bss_join_param = acx111_set_bss_join_param;
sc 297 dev/ic/acx111.c sc->sc_flags |= ACX_FLAG_ACX111;
sc 301 dev/ic/acx111.c acx111_init(struct acx_softc *sc)
sc 303 dev/ic/acx111.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 312 dev/ic/acx111.c if (acx_init_tmplt_ordered(sc) != 0) {
sc 318 dev/ic/acx111.c if (acx111_init_memory(sc) != 0) {
sc 328 dev/ic/acx111.c acx111_init_memory(struct acx_softc *sc)
sc 332 dev/ic/acx111.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 347 dev/ic/acx111.c mem.h_rxring_paddr = htole32(sc->sc_ring_data.rx_ring_paddr);
sc 353 dev/ic/acx111.c if (acx_set_conf(sc, ACX111_CONF_MEM, &mem, sizeof(mem)) != 0) {
sc 359 dev/ic/acx111.c if (acx_get_conf(sc, ACX111_CONF_MEMINFO, &mem_info,
sc 366 dev/ic/acx111.c acx111_init_fw_txring(sc, letoh32(mem_info.fw_txring_start));
sc 377 dev/ic/acx111.c acx111_init_fw_txring(struct acx_softc *sc, uint32_t fw_txdesc_start)
sc 383 dev/ic/acx111.c tx_buf = sc->sc_buf_data.tx_buf;
sc 384 dev/ic/acx111.c desc_paddr = sc->sc_ring_data.tx_ring_paddr;
sc 394 dev/ic/acx111.c FW_TXDESC_SETFIELD_4(sc, &tx_buf[i], f_tx_host_desc,
sc 396 dev/ic/acx111.c FW_TXDESC_SETFIELD_1(sc, &tx_buf[i], f_tx_ctrl,
sc 404 dev/ic/acx111.c acx111_write_config(struct acx_softc *sc, struct acx_config *conf)
sc 408 dev/ic/acx111.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 413 dev/ic/acx111.c if (acx_set_conf(sc, ACX_CONF_TXPOWER, &tx_power,
sc 423 dev/ic/acx111.c if (acx_get_conf(sc, ACX_CONF_OPTION, &opt, sizeof(opt)) != 0) {
sc 433 dev/ic/acx111.c if (acx_set_conf(sc, ACX_CONF_OPTION, &opt, sizeof(opt)) != 0) {
sc 442 dev/ic/acx111.c acx111_set_fw_txdesc_rate(struct acx_softc *sc, struct acx_txbuf *tx_buf,
sc 452 dev/ic/acx111.c FW_TXDESC_SETFIELD_2(sc, tx_buf, u.r2.rate111, rate);
sc 456 dev/ic/acx111.c acx111_set_bss_join_param(struct acx_softc *sc, void *param, int dtim_intvl)
sc 429 dev/ic/acxreg.h #define CMDPRM_WRITE_REGION_1(sc, r, rlen) \
sc 430 dev/ic/acxreg.h bus_space_write_region_1((sc)->sc_mem2_bt, \
sc 431 dev/ic/acxreg.h (sc)->sc_mem2_bh, \
sc 432 dev/ic/acxreg.h (sc)->sc_cmd_param, \
sc 435 dev/ic/acxreg.h #define CMDPRM_READ_REGION_1(sc, r, rlen) \
sc 436 dev/ic/acxreg.h bus_space_read_region_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, \
sc 437 dev/ic/acxreg.h (sc)->sc_cmd_param, (uint8_t *)(r), (rlen))
sc 443 dev/ic/acxreg.h #define CMD_WRITE_4(sc, val) \
sc 444 dev/ic/acxreg.h bus_space_write_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, \
sc 445 dev/ic/acxreg.h (sc)->sc_cmd, (val))
sc 446 dev/ic/acxreg.h #define CMD_READ_4(sc) \
sc 447 dev/ic/acxreg.h bus_space_read_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (sc)->sc_cmd)
sc 76 dev/ic/acxvar.h #define CSR_READ_1(sc, reg) \
sc 77 dev/ic/acxvar.h bus_space_read_1((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, \
sc 78 dev/ic/acxvar.h (sc)->chip_ioreg[(reg)])
sc 79 dev/ic/acxvar.h #define CSR_READ_2(sc, reg) \
sc 80 dev/ic/acxvar.h bus_space_read_2((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, \
sc 81 dev/ic/acxvar.h (sc)->chip_ioreg[(reg)])
sc 82 dev/ic/acxvar.h #define CSR_READ_4(sc, reg) \
sc 83 dev/ic/acxvar.h bus_space_read_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, \
sc 84 dev/ic/acxvar.h (sc)->chip_ioreg[(reg)])
sc 86 dev/ic/acxvar.h #define CSR_WRITE_2(sc, reg, val) \
sc 87 dev/ic/acxvar.h bus_space_write_2((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, \
sc 88 dev/ic/acxvar.h (sc)->chip_ioreg[(reg)], val)
sc 89 dev/ic/acxvar.h #define CSR_WRITE_4(sc, reg, val) \
sc 90 dev/ic/acxvar.h bus_space_write_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, \
sc 91 dev/ic/acxvar.h (sc)->chip_ioreg[(reg)], val)
sc 93 dev/ic/acxvar.h #define CSR_SETB_2(sc, reg, b) \
sc 94 dev/ic/acxvar.h CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) | (b))
sc 95 dev/ic/acxvar.h #define CSR_CLRB_2(sc, reg, b) \
sc 96 dev/ic/acxvar.h CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) & (~(b)))
sc 98 dev/ic/acxvar.h #define DESC_WRITE_REGION_1(sc, off, d, dlen) \
sc 99 dev/ic/acxvar.h bus_space_write_region_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, \
sc 102 dev/ic/acxvar.h #define FW_TXDESC_SETFIELD_1(sc, mb, field, val) \
sc 103 dev/ic/acxvar.h bus_space_write_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, \
sc 105 dev/ic/acxvar.h #define FW_TXDESC_SETFIELD_2(sc, mb, field, val) \
sc 106 dev/ic/acxvar.h bus_space_write_2((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, \
sc 108 dev/ic/acxvar.h #define FW_TXDESC_SETFIELD_4(sc, mb, field, val) \
sc 109 dev/ic/acxvar.h bus_space_write_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, \
sc 112 dev/ic/acxvar.h #define FW_TXDESC_GETFIELD_1(sc, mb, field) \
sc 113 dev/ic/acxvar.h bus_space_read_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, \
sc 137 dev/ic/adv.c adv_enqueue(sc, xs, infront)
sc 138 dev/ic/adv.c ASC_SOFTC *sc;
sc 143 dev/ic/adv.c if (infront || LIST_EMPTY(&sc->sc_queue)) {
sc 144 dev/ic/adv.c if (LIST_EMPTY(&sc->sc_queue))
sc 145 dev/ic/adv.c sc->sc_queuelast = xs;
sc 146 dev/ic/adv.c LIST_INSERT_HEAD(&sc->sc_queue, xs, free_list);
sc 149 dev/ic/adv.c LIST_INSERT_AFTER(sc->sc_queuelast, xs, free_list);
sc 150 dev/ic/adv.c sc->sc_queuelast = xs;
sc 158 dev/ic/adv.c adv_dequeue(sc)
sc 159 dev/ic/adv.c ASC_SOFTC *sc;
sc 163 dev/ic/adv.c xs = LIST_FIRST(&sc->sc_queue);
sc 166 dev/ic/adv.c if (LIST_EMPTY(&sc->sc_queue))
sc 167 dev/ic/adv.c sc->sc_queuelast = NULL;
sc 179 dev/ic/adv.c adv_alloc_ccbs(sc)
sc 180 dev/ic/adv.c ASC_SOFTC *sc;
sc 188 dev/ic/adv.c if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct adv_control),
sc 191 dev/ic/adv.c " error = %d\n", sc->sc_dev.dv_xname, error);
sc 194 dev/ic/adv.c if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
sc 195 dev/ic/adv.c sizeof(struct adv_control), (caddr_t *) & sc->sc_control,
sc 198 dev/ic/adv.c sc->sc_dev.dv_xname, error);
sc 204 dev/ic/adv.c if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct adv_control),
sc 206 dev/ic/adv.c &sc->sc_dmamap_control)) != 0) {
sc 208 dev/ic/adv.c sc->sc_dev.dv_xname, error);
sc 211 dev/ic/adv.c if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_control,
sc 212 dev/ic/adv.c sc->sc_control, sizeof(struct adv_control), NULL,
sc 215 dev/ic/adv.c sc->sc_dev.dv_xname, error);
sc 227 dev/ic/adv.c adv_create_ccbs(sc, ccbstore, count)
sc 228 dev/ic/adv.c ASC_SOFTC *sc;
sc 238 dev/ic/adv.c if ((error = adv_init_ccb(sc, ccb)) != 0) {
sc 240 dev/ic/adv.c sc->sc_dev.dv_xname, error);
sc 243 dev/ic/adv.c TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, chain);
sc 254 dev/ic/adv.c adv_free_ccb(sc, ccb)
sc 255 dev/ic/adv.c ASC_SOFTC *sc;
sc 263 dev/ic/adv.c TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain);
sc 270 dev/ic/adv.c wakeup(&sc->sc_free_ccb);
sc 286 dev/ic/adv.c adv_init_ccb(sc, ccb)
sc 287 dev/ic/adv.c ASC_SOFTC *sc;
sc 295 dev/ic/adv.c error = bus_dmamap_create(sc->sc_dmat,
sc 301 dev/ic/adv.c sc->sc_dev.dv_xname, error);
sc 315 dev/ic/adv.c adv_get_ccb(sc, flags)
sc 316 dev/ic/adv.c ASC_SOFTC *sc;
sc 329 dev/ic/adv.c ccb = TAILQ_FIRST(&sc->sc_free_ccb);
sc 331 dev/ic/adv.c TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain);
sc 337 dev/ic/adv.c tsleep(&sc->sc_free_ccb, PRIBIO, "advccb", 0);
sc 352 dev/ic/adv.c adv_queue_ccb(sc, ccb)
sc 353 dev/ic/adv.c ASC_SOFTC *sc;
sc 358 dev/ic/adv.c TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain);
sc 360 dev/ic/adv.c adv_start_ccbs(sc);
sc 365 dev/ic/adv.c adv_start_ccbs(sc)
sc 366 dev/ic/adv.c ASC_SOFTC *sc;
sc 371 dev/ic/adv.c while ((ccb = TAILQ_FIRST(&sc->sc_waiting_ccb)) != NULL) {
sc 377 dev/ic/adv.c if (AscExeScsiQueue(sc, &ccb->scsiq) == ASC_BUSY) {
sc 384 dev/ic/adv.c TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain);
sc 466 dev/ic/adv.c adv_init(sc)
sc 467 dev/ic/adv.c ASC_SOFTC *sc;
sc 471 dev/ic/adv.c if (!AscFindSignature(sc->sc_iot, sc->sc_ioh))
sc 477 dev/ic/adv.c AscInitASC_SOFTC(sc);
sc 478 dev/ic/adv.c warn = AscInitFromEEP(sc);
sc 480 dev/ic/adv.c printf("%s -get: ", sc->sc_dev.dv_xname);
sc 515 dev/ic/adv.c if (sc->scsi_reset_wait > ASC_MAX_SCSI_RESET_WAIT)
sc 516 dev/ic/adv.c sc->scsi_reset_wait = ASC_MAX_SCSI_RESET_WAIT;
sc 521 dev/ic/adv.c warn = AscInitFromASC_SOFTC(sc);
sc 523 dev/ic/adv.c printf("%s -set: ", sc->sc_dev.dv_xname);
sc 537 dev/ic/adv.c sc->isr_callback = (ulong) adv_narrow_isr_callback;
sc 539 dev/ic/adv.c if (!(sc->overrun_buf = adv_alloc_overrunbuf(sc->sc_dev.dv_xname,
sc 540 dev/ic/adv.c sc->sc_dmat))) {
sc 549 dev/ic/adv.c adv_attach(sc)
sc 550 dev/ic/adv.c ASC_SOFTC *sc;
sc 558 dev/ic/adv.c switch (AscInitDriver(sc)) {
sc 564 dev/ic/adv.c panic("%s: bad signature", sc->sc_dev.dv_xname);
sc 569 dev/ic/adv.c sc->sc_dev.dv_xname);
sc 574 dev/ic/adv.c sc->sc_dev.dv_xname);
sc 579 dev/ic/adv.c sc->sc_dev.dv_xname);
sc 586 dev/ic/adv.c sc->sc_link.adapter_softc = sc;
sc 587 dev/ic/adv.c sc->sc_link.adapter_target = sc->chip_scsi_id;
sc 588 dev/ic/adv.c sc->sc_link.adapter = &adv_switch;
sc 589 dev/ic/adv.c sc->sc_link.device = &adv_dev;
sc 590 dev/ic/adv.c sc->sc_link.openings = 4;
sc 591 dev/ic/adv.c sc->sc_link.adapter_buswidth = 7;
sc 594 dev/ic/adv.c TAILQ_INIT(&sc->sc_free_ccb);
sc 595 dev/ic/adv.c TAILQ_INIT(&sc->sc_waiting_ccb);
sc 596 dev/ic/adv.c LIST_INIT(&sc->sc_queue);
sc 602 dev/ic/adv.c error = adv_alloc_ccbs(sc);
sc 609 dev/ic/adv.c i = adv_create_ccbs(sc, sc->sc_control->ccbs, ADV_MAX_CCB);
sc 612 dev/ic/adv.c sc->sc_dev.dv_xname);
sc 616 dev/ic/adv.c sc->sc_dev.dv_xname, i, ADV_MAX_CCB);
sc 620 dev/ic/adv.c saa.saa_sc_link = &sc->sc_link;
sc 621 dev/ic/adv.c config_found(&sc->sc_dev, &saa, scsiprint);
sc 645 dev/ic/adv.c ASC_SOFTC *sc = sc_link->adapter_softc;
sc 646 dev/ic/adv.c bus_dma_tag_t dmat = sc->sc_dmat;
sc 658 dev/ic/adv.c if (xs == LIST_FIRST(&sc->sc_queue)) {
sc 659 dev/ic/adv.c xs = adv_dequeue(sc);
sc 669 dev/ic/adv.c if (!LIST_EMPTY(&sc->sc_queue)) {
sc 681 dev/ic/adv.c adv_enqueue(sc, xs, 0);
sc 682 dev/ic/adv.c xs = adv_dequeue(sc);
sc 695 dev/ic/adv.c if ((ccb = adv_get_ccb(sc, flags)) == NULL) {
sc 707 dev/ic/adv.c adv_enqueue(sc, xs, fromqueue);
sc 729 dev/ic/adv.c ccb->scsiq.q1.sense_addr = sc->sc_dmamap_control->dm_segs[0].ds_addr +
sc 740 dev/ic/adv.c sc->reqcnt[sc_link->target]++;
sc 741 dev/ic/adv.c if ((sc->reqcnt[sc_link->target] > 0) &&
sc 742 dev/ic/adv.c (sc->reqcnt[sc_link->target] % 255) == 0) {
sc 770 dev/ic/adv.c sc->sc_dev.dv_xname, ASC_MAX_SG_LIST);
sc 774 dev/ic/adv.c sc->sc_dev.dv_xname, error);
sc 778 dev/ic/adv.c adv_free_ccb(sc, ccb);
sc 819 dev/ic/adv.c adv_queue_ccb(sc, ccb);
sc 831 dev/ic/adv.c if (adv_poll(sc, xs, ccb->timeout)) {
sc 833 dev/ic/adv.c if (adv_poll(sc, xs, ccb->timeout))
sc 844 dev/ic/adv.c ASC_SOFTC *sc = arg;
sc 850 dev/ic/adv.c if(ASC_IS_INT_PENDING(sc->sc_iot, sc->sc_ioh))
sc 856 dev/ic/adv.c AscISR(sc);
sc 870 dev/ic/adv.c if ((xs = LIST_FIRST(&sc->sc_queue)) != NULL)
sc 881 dev/ic/adv.c adv_poll(sc, xs, count)
sc 882 dev/ic/adv.c ASC_SOFTC *sc;
sc 889 dev/ic/adv.c adv_intr(sc);
sc 906 dev/ic/adv.c ASC_SOFTC *sc = sc_link->adapter_softc;
sc 922 dev/ic/adv.c if (AscResetBus(sc) == ASC_ERROR) {
sc 923 dev/ic/adv.c ccb->timeout = sc->scsi_reset_wait;
sc 924 dev/ic/adv.c adv_queue_ccb(sc, ccb);
sc 929 dev/ic/adv.c AscAbortCCB(sc, (u_int32_t) ccb);
sc 933 dev/ic/adv.c adv_queue_ccb(sc, ccb);
sc 947 dev/ic/adv.c ASC_SOFTC *sc = sc_link->adapter_softc;
sc 953 dev/ic/adv.c adv_start_ccbs(sc);
sc 970 dev/ic/adv.c adv_narrow_isr_callback(sc, qdonep)
sc 971 dev/ic/adv.c ASC_SOFTC *sc;
sc 974 dev/ic/adv.c bus_dma_tag_t dmat = sc->sc_dmat;
sc 1000 dev/ic/adv.c printf("%s: exiting ccb not allocated!\n", sc->sc_dev.dv_xname);
sc 1031 dev/ic/adv.c AscInquiryHandling(sc,
sc 1064 dev/ic/adv.c adv_free_ccb(sc, ccb);
sc 86 dev/ic/adv.h (((u_long)(c)) - ((u_long)&sc->sc_control->ccbs[0])))
sc 90 dev/ic/adv.h int adv_init(ASC_SOFTC *sc);
sc 91 dev/ic/adv.h void adv_attach(ASC_SOFTC *sc);
sc 253 dev/ic/advlib.c AscInitASC_SOFTC(sc)
sc 254 dev/ic/advlib.c ASC_SOFTC *sc;
sc 256 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 257 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 265 dev/ic/advlib.c sc->bug_fix_cntl = 0;
sc 266 dev/ic/advlib.c sc->pci_fix_asyn_xfer = 0;
sc 267 dev/ic/advlib.c sc->pci_fix_asyn_xfer_always = 0;
sc 268 dev/ic/advlib.c sc->sdtr_done = 0;
sc 269 dev/ic/advlib.c sc->cur_total_qng = 0;
sc 270 dev/ic/advlib.c sc->last_q_shortage = 0;
sc 271 dev/ic/advlib.c sc->use_tagged_qng = 0;
sc 272 dev/ic/advlib.c sc->unit_not_ready = 0;
sc 273 dev/ic/advlib.c sc->queue_full_or_busy = 0;
sc 274 dev/ic/advlib.c sc->host_init_sdtr_index = 0;
sc 275 dev/ic/advlib.c sc->can_tagged_qng = 0;
sc 276 dev/ic/advlib.c sc->cmd_qng_enabled = 0;
sc 277 dev/ic/advlib.c sc->dvc_cntl = ASC_DEF_DVC_CNTL;
sc 278 dev/ic/advlib.c sc->init_sdtr = 0;
sc 279 dev/ic/advlib.c sc->max_total_qng = ASC_DEF_MAX_TOTAL_QNG;
sc 280 dev/ic/advlib.c sc->scsi_reset_wait = 3;
sc 281 dev/ic/advlib.c sc->start_motor = ASC_SCSI_WIDTH_BIT_SET;
sc 282 dev/ic/advlib.c sc->max_dma_count = AscGetMaxDmaCount(sc->bus_type);
sc 283 dev/ic/advlib.c sc->sdtr_enable = ASC_SCSI_WIDTH_BIT_SET;
sc 284 dev/ic/advlib.c sc->disc_enable = ASC_SCSI_WIDTH_BIT_SET;
sc 285 dev/ic/advlib.c sc->chip_scsi_id = ASC_DEF_CHIP_SCSI_ID;
sc 286 dev/ic/advlib.c sc->lib_serial_no = ASC_LIB_SERIAL_NUMBER;
sc 287 dev/ic/advlib.c sc->lib_version = (ASC_LIB_VERSION_MAJOR << 8) | ASC_LIB_VERSION_MINOR;
sc 288 dev/ic/advlib.c chip_version = AscGetChipVersion(iot, ioh, sc->bus_type);
sc 289 dev/ic/advlib.c sc->chip_version = chip_version;
sc 290 dev/ic/advlib.c if ((sc->bus_type & ASC_IS_PCI) &&
sc 292 dev/ic/advlib.c sc->bus_type = ASC_IS_PCI_ULTRA;
sc 293 dev/ic/advlib.c sc->sdtr_period_tbl[0] = SYN_ULTRA_XFER_NS_0;
sc 294 dev/ic/advlib.c sc->sdtr_period_tbl[1] = SYN_ULTRA_XFER_NS_1;
sc 295 dev/ic/advlib.c sc->sdtr_period_tbl[2] = SYN_ULTRA_XFER_NS_2;
sc 296 dev/ic/advlib.c sc->sdtr_period_tbl[3] = SYN_ULTRA_XFER_NS_3;
sc 297 dev/ic/advlib.c sc->sdtr_period_tbl[4] = SYN_ULTRA_XFER_NS_4;
sc 298 dev/ic/advlib.c sc->sdtr_period_tbl[5] = SYN_ULTRA_XFER_NS_5;
sc 299 dev/ic/advlib.c sc->sdtr_period_tbl[6] = SYN_ULTRA_XFER_NS_6;
sc 300 dev/ic/advlib.c sc->sdtr_period_tbl[7] = SYN_ULTRA_XFER_NS_7;
sc 301 dev/ic/advlib.c sc->sdtr_period_tbl[8] = SYN_ULTRA_XFER_NS_8;
sc 302 dev/ic/advlib.c sc->sdtr_period_tbl[9] = SYN_ULTRA_XFER_NS_9;
sc 303 dev/ic/advlib.c sc->sdtr_period_tbl[10] = SYN_ULTRA_XFER_NS_10;
sc 304 dev/ic/advlib.c sc->sdtr_period_tbl[11] = SYN_ULTRA_XFER_NS_11;
sc 305 dev/ic/advlib.c sc->sdtr_period_tbl[12] = SYN_ULTRA_XFER_NS_12;
sc 306 dev/ic/advlib.c sc->sdtr_period_tbl[13] = SYN_ULTRA_XFER_NS_13;
sc 307 dev/ic/advlib.c sc->sdtr_period_tbl[14] = SYN_ULTRA_XFER_NS_14;
sc 308 dev/ic/advlib.c sc->sdtr_period_tbl[15] = SYN_ULTRA_XFER_NS_15;
sc 309 dev/ic/advlib.c sc->max_sdtr_index = 15;
sc 317 dev/ic/advlib.c sc->sdtr_period_tbl[0] = SYN_XFER_NS_0;
sc 318 dev/ic/advlib.c sc->sdtr_period_tbl[1] = SYN_XFER_NS_1;
sc 319 dev/ic/advlib.c sc->sdtr_period_tbl[2] = SYN_XFER_NS_2;
sc 320 dev/ic/advlib.c sc->sdtr_period_tbl[3] = SYN_XFER_NS_3;
sc 321 dev/ic/advlib.c sc->sdtr_period_tbl[4] = SYN_XFER_NS_4;
sc 322 dev/ic/advlib.c sc->sdtr_period_tbl[5] = SYN_XFER_NS_5;
sc 323 dev/ic/advlib.c sc->sdtr_period_tbl[6] = SYN_XFER_NS_6;
sc 324 dev/ic/advlib.c sc->sdtr_period_tbl[7] = SYN_XFER_NS_7;
sc 325 dev/ic/advlib.c sc->max_sdtr_index = 7;
sc 328 dev/ic/advlib.c if (sc->bus_type == ASC_IS_PCI)
sc 332 dev/ic/advlib.c sc->isa_dma_speed = ASC_DEF_ISA_DMA_SPEED;
sc 335 dev/ic/advlib.c sc->bus_type = ASC_IS_ISAPNP;
sc 337 dev/ic/advlib.c if ((sc->bus_type & ASC_IS_ISA) != 0)
sc 338 dev/ic/advlib.c sc->isa_dma_channel = AscGetIsaDmaChannel(iot, ioh);
sc 341 dev/ic/advlib.c sc->cur_dvc_qng[i] = 0;
sc 342 dev/ic/advlib.c sc->max_dvc_qng[i] = ASC_MAX_SCSI1_QNG;
sc 343 dev/ic/advlib.c sc->max_tag_qng[i] = ASC_MAX_INRAM_TAG_QNG;
sc 353 dev/ic/advlib.c AscInitFromEEP(sc)
sc 354 dev/ic/advlib.c ASC_SOFTC *sc;
sc 356 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 357 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 373 dev/ic/advlib.c DvcSleepMilliSecond(sc->scsi_reset_wait * 1000);
sc 390 dev/ic/advlib.c chksum = AscGetEEPConfig(iot, ioh, eep_config, sc->bus_type);
sc 399 dev/ic/advlib.c if (sc->chip_version == 3) {
sc 414 dev/ic/advlib.c if (AscGetChipVersion(iot, ioh, sc->bus_type) ==
sc 443 dev/ic/advlib.c sc->sdtr_enable = eep_config->init_sdtr;
sc 444 dev/ic/advlib.c sc->disc_enable = eep_config->disc_enable;
sc 445 dev/ic/advlib.c sc->cmd_qng_enabled = eep_config->use_cmd_qng;
sc 446 dev/ic/advlib.c sc->isa_dma_speed = eep_config->isa_dma_speed;
sc 447 dev/ic/advlib.c sc->start_motor = eep_config->start_motor;
sc 448 dev/ic/advlib.c sc->dvc_cntl = eep_config->cntl;
sc 450 dev/ic/advlib.c sc->adapter_info[0] = eep_config->adapter_info[1];
sc 451 dev/ic/advlib.c sc->adapter_info[1] = eep_config->adapter_info[0];
sc 452 dev/ic/advlib.c sc->adapter_info[2] = eep_config->adapter_info[3];
sc 453 dev/ic/advlib.c sc->adapter_info[3] = eep_config->adapter_info[2];
sc 454 dev/ic/advlib.c sc->adapter_info[4] = eep_config->adapter_info[5];
sc 455 dev/ic/advlib.c sc->adapter_info[5] = eep_config->adapter_info[4];
sc 457 dev/ic/advlib.c sc->adapter_info[0] = eep_config->adapter_info[0];
sc 458 dev/ic/advlib.c sc->adapter_info[1] = eep_config->adapter_info[1];
sc 459 dev/ic/advlib.c sc->adapter_info[2] = eep_config->adapter_info[2];
sc 460 dev/ic/advlib.c sc->adapter_info[3] = eep_config->adapter_info[3];
sc 461 dev/ic/advlib.c sc->adapter_info[4] = eep_config->adapter_info[4];
sc 462 dev/ic/advlib.c sc->adapter_info[5] = eep_config->adapter_info[5];
sc 466 dev/ic/advlib.c if (((sc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA)) {
sc 489 dev/ic/advlib.c sc->max_total_qng = eep_config->max_total_qng;
sc 495 dev/ic/advlib.c if (sc->bus_type & (ASC_IS_ISA | ASC_IS_VL | ASC_IS_EISA))
sc 496 dev/ic/advlib.c sc->irq_no = AscGetChipIRQ(iot, ioh, sc->bus_type);
sc 499 dev/ic/advlib.c sc->chip_scsi_id = eep_config->chip_scsi_id;
sc 500 dev/ic/advlib.c if (((sc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA) &&
sc 501 dev/ic/advlib.c !(sc->dvc_cntl & ASC_CNTL_SDTR_ENABLE_ULTRA)) {
sc 502 dev/ic/advlib.c sc->host_init_sdtr_index = ASC_SDTR_ULTRA_PCI_10MB_INDEX;
sc 505 dev/ic/advlib.c sc->max_tag_qng[i] = eep_config->max_tag_qng;
sc 506 dev/ic/advlib.c sc->sdtr_period_offset[i] = ASC_DEF_SDTR_OFFSET |
sc 507 dev/ic/advlib.c (sc->host_init_sdtr_index << 4);
sc 512 dev/ic/advlib.c AscSetEEPConfig(iot, ioh, eep_config, sc->bus_type);
sc 523 dev/ic/advlib.c AscInitFromASC_SOFTC(sc)
sc 524 dev/ic/advlib.c ASC_SOFTC *sc;
sc 526 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 527 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 530 dev/ic/advlib.c u_int16_t pci_device_id = sc->pci_device_id;
sc 541 dev/ic/advlib.c if ((sc->cmd_qng_enabled & sc->disc_enable) != sc->cmd_qng_enabled) {
sc 542 dev/ic/advlib.c sc->disc_enable = sc->cmd_qng_enabled;
sc 548 dev/ic/advlib.c if ((sc->bus_type & (ASC_IS_ISA | ASC_IS_VL)) != 0) {
sc 549 dev/ic/advlib.c AscSetChipIRQ(iot, ioh, sc->irq_no, sc->bus_type);
sc 551 dev/ic/advlib.c if (sc->bus_type & ASC_IS_PCI) {
sc 555 dev/ic/advlib.c if ((sc->bus_type & ASC_IS_PCI_ULTRA) != ASC_IS_PCI_ULTRA) {
sc 558 dev/ic/advlib.c sc->bug_fix_cntl |= ASC_BUG_FIX_IF_NOT_DWB;
sc 559 dev/ic/advlib.c sc->bug_fix_cntl |= ASC_BUG_FIX_ASYN_USE_SYN;
sc 562 dev/ic/advlib.c } else if (sc->bus_type == ASC_IS_ISAPNP) {
sc 563 dev/ic/advlib.c if (AscGetChipVersion(iot, ioh, sc->bus_type) ==
sc 565 dev/ic/advlib.c sc->bug_fix_cntl |= ASC_BUG_FIX_ASYN_USE_SYN;
sc 568 dev/ic/advlib.c AscSetChipScsiID(iot, ioh, sc->chip_scsi_id);
sc 570 dev/ic/advlib.c if (sc->bus_type & ASC_IS_ISA) {
sc 571 dev/ic/advlib.c AscSetIsaDmaChannel(iot, ioh, sc->isa_dma_channel);
sc 572 dev/ic/advlib.c AscSetIsaDmaSpeed(iot, ioh, sc->isa_dma_speed);
sc 585 dev/ic/advlib.c AscInitDriver(sc)
sc 586 dev/ic/advlib.c ASC_SOFTC *sc;
sc 588 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 589 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 598 dev/ic/advlib.c AscInitLram(sc);
sc 604 dev/ic/advlib.c if (AscInitMicroCodeVar(sc) == 0)
sc 631 dev/ic/advlib.c AscInitLram(sc)
sc 632 dev/ic/advlib.c ASC_SOFTC *sc;
sc 634 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 635 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 641 dev/ic/advlib.c (((sc->max_total_qng + 2 + 1) * 64) >> 1));
sc 646 dev/ic/advlib.c AscWriteLramByte(iot, ioh, s_addr + ASC_SCSIQ_B_BWD, sc->max_total_qng);
sc 650 dev/ic/advlib.c for (; i < sc->max_total_qng; i++, s_addr += ASC_QBLK_SIZE) {
sc 656 dev/ic/advlib.c AscWriteLramByte(iot, ioh, s_addr + ASC_SCSIQ_B_BWD, sc->max_total_qng - 1);
sc 657 dev/ic/advlib.c AscWriteLramByte(iot, ioh, s_addr + ASC_SCSIQ_B_QNO, sc->max_total_qng);
sc 660 dev/ic/advlib.c for (; i <= (u_int8_t) (sc->max_total_qng + 3); i++, s_addr += ASC_QBLK_SIZE) {
sc 669 dev/ic/advlib.c AscReInitLram(sc)
sc 670 dev/ic/advlib.c ASC_SOFTC *sc;
sc 673 dev/ic/advlib.c AscInitLram(sc);
sc 674 dev/ic/advlib.c AscInitQLinkVar(sc);
sc 679 dev/ic/advlib.c AscInitQLinkVar(sc)
sc 680 dev/ic/advlib.c ASC_SOFTC *sc;
sc 682 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 683 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 689 dev/ic/advlib.c ASC_PUT_RISC_VAR_DONE_QTAIL(iot, ioh, sc->max_total_qng);
sc 691 dev/ic/advlib.c ASC_PUT_VAR_DONE_QTAIL(iot, ioh, sc->max_total_qng);
sc 692 dev/ic/advlib.c AscWriteLramByte(iot, ioh, ASCV_BUSY_QHEAD_B, sc->max_total_qng + 1);
sc 693 dev/ic/advlib.c AscWriteLramByte(iot, ioh, ASCV_DISC1_QHEAD_B, sc->max_total_qng + 2);
sc 694 dev/ic/advlib.c AscWriteLramByte(iot, ioh, ASCV_TOTAL_READY_Q_B, sc->max_total_qng);
sc 1229 dev/ic/advlib.c AscInitMicroCodeVar(sc)
sc 1230 dev/ic/advlib.c ASC_SOFTC *sc;
sc 1232 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 1233 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1240 dev/ic/advlib.c sc->sdtr_period_offset[i]);
sc 1242 dev/ic/advlib.c AscInitQLinkVar(sc);
sc 1243 dev/ic/advlib.c AscWriteLramByte(iot, ioh, ASCV_DISC_ENABLE_B, sc->disc_enable);
sc 1245 dev/ic/advlib.c ASC_TID_TO_TARGET_ID(sc->chip_scsi_id));
sc 1247 dev/ic/advlib.c if ((phy_addr = AscGetOnePhyAddr(sc, sc->overrun_buf,
sc 1257 dev/ic/advlib.c sc->mcode_date = AscReadLramWord(iot, ioh, ASCV_MC_DATE_W);
sc 1258 dev/ic/advlib.c sc->mcode_version = AscReadLramWord(iot, ioh, ASCV_MC_VER_W);
sc 1299 dev/ic/advlib.c AscGetOnePhyAddr(sc, buf_addr, buf_size)
sc 1300 dev/ic/advlib.c ASC_SOFTC *sc;
sc 1307 dev/ic/advlib.c if (AscGetSGList(sc, buf_addr, buf_size, (ASC_SG_HEAD *) & sg_head) !=
sc 1319 dev/ic/advlib.c AscGetSGList(sc, buf_addr, buf_len, asc_sg_head_ptr)
sc 1320 dev/ic/advlib.c ASC_SOFTC *sc;
sc 1625 dev/ic/advlib.c AscISR(sc)
sc 1626 dev/ic/advlib.c ASC_SOFTC *sc;
sc 1628 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 1629 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1646 dev/ic/advlib.c if (!(sc->bus_type & (ASC_IS_VL | ASC_IS_EISA))) {
sc 1648 dev/ic/advlib.c sc->sdtr_done = 0;
sc 1672 dev/ic/advlib.c AscIsrChipHalted(sc);
sc 1675 dev/ic/advlib.c if (sc->dvc_cntl & ASC_CNTL_INT_MULTI_Q) {
sc 1676 dev/ic/advlib.c while (((status = AscIsrQDone(sc)) & 0x01) != 0);
sc 1679 dev/ic/advlib.c if ((status = AscIsrQDone(sc)) == 1)
sc 1698 dev/ic/advlib.c AscIsrQDone(sc)
sc 1699 dev/ic/advlib.c ASC_SOFTC *sc;
sc 1710 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 1711 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1720 dev/ic/advlib.c asc_isr_callback = (ASC_ISR_CALLBACK) sc->isr_callback;
sc 1731 dev/ic/advlib.c sc->max_dma_count);
sc 1744 dev/ic/advlib.c AscSetLibErrorCode(sc, ASCQ_ERR_SG_Q_LINKS);
sc 1755 dev/ic/advlib.c if (sc->queue_full_or_busy & target_id) {
sc 1759 dev/ic/advlib.c if (cur_target_qng < sc->max_dvc_qng[tid_no]) {
sc 1763 dev/ic/advlib.c sc->queue_full_or_busy &= ~target_id;
sc 1766 dev/ic/advlib.c if (sc->cur_total_qng >= n_q_used) {
sc 1767 dev/ic/advlib.c sc->cur_total_qng -= n_q_used;
sc 1768 dev/ic/advlib.c if (sc->cur_dvc_qng[tid_no] != 0) {
sc 1769 dev/ic/advlib.c sc->cur_dvc_qng[tid_no]--;
sc 1772 dev/ic/advlib.c AscSetLibErrorCode(sc, ASCQ_ERR_CUR_QNG);
sc 1798 dev/ic/advlib.c (*asc_isr_callback) (sc, scsiq);
sc 1802 dev/ic/advlib.c AscSetLibErrorCode(sc, ASCQ_ERR_Q_STATUS);
sc 1817 dev/ic/advlib.c AscIsrChipHalted(sc)
sc 1818 dev/ic/advlib.c ASC_SOFTC *sc;
sc 1820 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 1821 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1848 dev/ic/advlib.c if (sc->pci_fix_asyn_xfer & target_id) {
sc 1855 dev/ic/advlib.c if (sc->pci_fix_asyn_xfer & target_id) {
sc 1857 dev/ic/advlib.c sc->sdtr_data[tid_no] = 0;
sc 1861 dev/ic/advlib.c if (sc->pci_fix_asyn_xfer & target_id) {
sc 1863 dev/ic/advlib.c sc->sdtr_data[tid_no] = asyn_sdtr;
sc 1867 dev/ic/advlib.c AscHandleExtMsgIn(sc, halt_q_addr, q_cntl, target_id,
sc 1873 dev/ic/advlib.c if (sc->init_sdtr & target_id) {
sc 1874 dev/ic/advlib.c sc->sdtr_done &= ~target_id;
sc 1878 dev/ic/advlib.c AscMsgOutSDTR(sc, sc->sdtr_period_tbl[(sdtr_data >> 4) &
sc 1879 dev/ic/advlib.c (sc->max_sdtr_index - 1)],
sc 1887 dev/ic/advlib.c if ((sc->pci_fix_asyn_xfer & target_id) &&
sc 1888 dev/ic/advlib.c !(sc->pci_fix_asyn_xfer_always & target_id)) {
sc 1911 dev/ic/advlib.c sc->init_sdtr &= ~target_id;
sc 1912 dev/ic/advlib.c sc->sdtr_done &= ~target_id;
sc 1914 dev/ic/advlib.c sc->sdtr_data[tid_no] = asyn_sdtr;
sc 1924 dev/ic/advlib.c if ((cur_dvc_qng > 0) && (sc->cur_dvc_qng[tid_no] > 0)) {
sc 1928 dev/ic/advlib.c sc->queue_full_or_busy |= target_id;
sc 1933 dev/ic/advlib.c sc->max_dvc_qng[tid_no] = cur_dvc_qng;
sc 1939 dev/ic/advlib.c if ((sc->device[tid_no] != NULL) &&
sc 1940 dev/ic/advlib.c (sc->device[tid_no]->queue_curr_depth > cur_dvc_qng)) {
sc 1941 dev/ic/advlib.c sc->device[tid_no]->queue_curr_depth = cur_dvc_qng;
sc 1954 dev/ic/advlib.c AscWaitTixISRDone(sc, target_ix)
sc 1955 dev/ic/advlib.c ASC_SOFTC *sc;
sc 1964 dev/ic/advlib.c if ((cur_req = sc->cur_dvc_qng[tid_no]) == 0)
sc 1968 dev/ic/advlib.c if (sc->cur_dvc_qng[tid_no] == cur_req)
sc 1975 dev/ic/advlib.c AscWaitISRDone(sc)
sc 1976 dev/ic/advlib.c ASC_SOFTC *sc;
sc 1981 dev/ic/advlib.c AscWaitTixISRDone(sc, ASC_TID_TO_TIX(tid));
sc 2280 dev/ic/advlib.c AscHandleExtMsgIn(sc, halt_q_addr, q_cntl, target_id, tid_no, asyn_sdtr)
sc 2281 dev/ic/advlib.c ASC_SOFTC *sc;
sc 2288 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 2289 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2308 dev/ic/advlib.c sc->sdtr_period_tbl[sc->host_init_sdtr_index]) ||
sc 2310 dev/ic/advlib.c sc->sdtr_period_tbl[sc->max_sdtr_index])) {
sc 2312 dev/ic/advlib.c ext_msg.xfer_period = sc->sdtr_period_tbl[sc->host_init_sdtr_index];
sc 2315 dev/ic/advlib.c sdtr_data = AscCalSDTRData(sc, ext_msg.xfer_period,
sc 2319 dev/ic/advlib.c sc->init_sdtr &= ~target_id;
sc 2320 dev/ic/advlib.c sc->sdtr_done &= ~target_id;
sc 2322 dev/ic/advlib.c sc->sdtr_data[tid_no] = asyn_sdtr;
sc 2327 dev/ic/advlib.c sc->init_sdtr &= ~target_id;
sc 2328 dev/ic/advlib.c sc->sdtr_done &= ~target_id;
sc 2333 dev/ic/advlib.c sc->sdtr_done |= target_id;
sc 2334 dev/ic/advlib.c sc->init_sdtr |= target_id;
sc 2335 dev/ic/advlib.c sc->pci_fix_asyn_xfer &= ~target_id;
sc 2336 dev/ic/advlib.c sdtr_data = AscCalSDTRData(sc, ext_msg.xfer_period,
sc 2339 dev/ic/advlib.c sc->sdtr_data[tid_no] = sdtr_data;
sc 2342 dev/ic/advlib.c AscMsgOutSDTR(sc, ext_msg.xfer_period,
sc 2344 dev/ic/advlib.c sc->pci_fix_asyn_xfer &= ~target_id;
sc 2345 dev/ic/advlib.c sdtr_data = AscCalSDTRData(sc, ext_msg.xfer_period,
sc 2348 dev/ic/advlib.c sc->sdtr_data[tid_no] = sdtr_data;
sc 2349 dev/ic/advlib.c sc->sdtr_done |= target_id;
sc 2350 dev/ic/advlib.c sc->init_sdtr |= target_id;
sc 2372 dev/ic/advlib.c AscMsgOutSDTR(sc, sdtr_period, sdtr_offset)
sc 2373 dev/ic/advlib.c ASC_SOFTC *sc;
sc 2377 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 2378 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2389 dev/ic/advlib.c if ((sdtr_period_index = AscGetSynPeriodIndex(sc, sdtr_period)) <=
sc 2390 dev/ic/advlib.c sc->max_sdtr_index) {
sc 2421 dev/ic/advlib.c AscCalSDTRData(sc, sdtr_period, syn_offset)
sc 2422 dev/ic/advlib.c ASC_SOFTC *sc;
sc 2429 dev/ic/advlib.c sdtr_period_ix = AscGetSynPeriodIndex(sc, sdtr_period);
sc 2430 dev/ic/advlib.c if (sdtr_period_ix > sc->max_sdtr_index)
sc 2439 dev/ic/advlib.c AscGetSynPeriodIndex(sc, syn_time)
sc 2440 dev/ic/advlib.c ASC_SOFTC *sc;
sc 2448 dev/ic/advlib.c period_table = sc->sdtr_period_tbl;
sc 2449 dev/ic/advlib.c max_index = sc->max_sdtr_index;
sc 2450 dev/ic/advlib.c min_index = sc->host_init_sdtr_index;
sc 2471 dev/ic/advlib.c AscExeScsiQueue(sc, scsiq)
sc 2472 dev/ic/advlib.c ASC_SOFTC *sc;
sc 2475 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 2476 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2503 dev/ic/advlib.c if ((sc->init_sdtr & scsiq->q1.target_id) != 0) {
sc 2504 dev/ic/advlib.c sc->sdtr_done &= ~scsiq->q1.target_id;
sc 2506 dev/ic/advlib.c AscMsgOutSDTR(sc, sc->sdtr_period_tbl[(sdtr_data >> 4) &
sc 2507 dev/ic/advlib.c (sc->max_sdtr_index - 1)],
sc 2535 dev/ic/advlib.c if ((sc->pci_fix_asyn_xfer & scsiq->q1.target_id) &&
sc 2536 dev/ic/advlib.c !(sc->pci_fix_asyn_xfer_always & scsiq->q1.target_id)) {
sc 2571 dev/ic/advlib.c if (sc->bug_fix_cntl) {
sc 2572 dev/ic/advlib.c if (sc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) {
sc 2589 dev/ic/advlib.c if ((AscGetNumOfFreeQueue(sc, target_ix, n_q_required) >= n_q_required)
sc 2591 dev/ic/advlib.c retval = AscSendScsiQueue(sc, scsiq, n_q_required);
sc 2594 dev/ic/advlib.c if (sc->bug_fix_cntl) {
sc 2595 dev/ic/advlib.c if (sc->bug_fix_cntl & ASC_BUG_FIX_IF_NOT_DWB) {
sc 2611 dev/ic/advlib.c if ((AscGetNumOfFreeQueue(sc, target_ix, 1) >= 1) ||
sc 2613 dev/ic/advlib.c retval = AscSendScsiQueue(sc, scsiq, n_q_required);
sc 2622 dev/ic/advlib.c AscSendScsiQueue(sc, scsiq, n_q_required)
sc 2623 dev/ic/advlib.c ASC_SOFTC *sc;
sc 2627 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 2628 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2644 dev/ic/advlib.c sc->last_q_shortage = 0;
sc 2649 dev/ic/advlib.c if ((retval = AscPutReadySgListQueue(sc, scsiq, free_q_head)) == ASC_NOERROR) {
sc 2651 dev/ic/advlib.c sc->cur_total_qng += n_q_required;
sc 2652 dev/ic/advlib.c sc->cur_dvc_qng[tid_no]++;
sc 2660 dev/ic/advlib.c AscPutReadySgListQueue(sc, scsiq, q_no)
sc 2661 dev/ic/advlib.c ASC_SOFTC *sc;
sc 2665 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 2666 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2740 dev/ic/advlib.c retval = AscPutReadyQueue(sc, scsiq, q_no);
sc 2748 dev/ic/advlib.c AscPutReadyQueue(sc, scsiq, q_no)
sc 2749 dev/ic/advlib.c ASC_SOFTC *sc;
sc 2753 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 2754 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2762 dev/ic/advlib.c if (((sc->init_sdtr & scsiq->q1.target_id) != 0) &&
sc 2763 dev/ic/advlib.c ((sc->sdtr_done & scsiq->q1.target_id) == 0)) {
sc 2766 dev/ic/advlib.c syn_period_ix = (sdtr_data >> 4) & (sc->max_sdtr_index - 1);
sc 2768 dev/ic/advlib.c AscMsgOutSDTR(sc, sc->sdtr_period_tbl[syn_period_ix], syn_offset);
sc 2773 dev/ic/advlib.c if ((scsiq->q1.target_id & sc->use_tagged_qng) == 0) {
sc 2852 dev/ic/advlib.c AscGetNumOfFreeQueue(sc, target_ix, n_qs)
sc 2853 dev/ic/advlib.c ASC_SOFTC *sc;
sc 2862 dev/ic/advlib.c cur_used_qs = sc->cur_total_qng +
sc 2863 dev/ic/advlib.c sc->last_q_shortage +
sc 2866 dev/ic/advlib.c cur_used_qs = sc->cur_total_qng + ASC_MIN_FREE_Q;
sc 2869 dev/ic/advlib.c if ((cur_used_qs + n_qs) <= sc->max_total_qng) {
sc 2870 dev/ic/advlib.c cur_free_qs = sc->max_total_qng - cur_used_qs;
sc 2874 dev/ic/advlib.c if ((n_qs > sc->last_q_shortage) &&
sc 2875 dev/ic/advlib.c (n_qs <= (sc->max_total_qng - ASC_MIN_FREE_Q))) {
sc 2876 dev/ic/advlib.c sc->last_q_shortage = n_qs;
sc 3030 dev/ic/advlib.c AscAbortCCB(sc, ccb)
sc 3031 dev/ic/advlib.c ASC_SOFTC *sc;
sc 3034 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 3035 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 3041 dev/ic/advlib.c saved_unit_not_ready = sc->unit_not_ready;
sc 3042 dev/ic/advlib.c sc->unit_not_ready = 0xFF;
sc 3043 dev/ic/advlib.c AscWaitISRDone(sc);
sc 3045 dev/ic/advlib.c if (AscRiscHaltedAbortCCB(sc, ccb) == 1) {
sc 3054 dev/ic/advlib.c sc->unit_not_ready = saved_unit_not_ready;
sc 3061 dev/ic/advlib.c AscRiscHaltedAbortCCB(sc, ccb)
sc 3062 dev/ic/advlib.c ASC_SOFTC *sc;
sc 3065 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 3066 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 3075 dev/ic/advlib.c asc_isr_callback = (ASC_ISR_CALLBACK) sc->isr_callback;
sc 3079 dev/ic/advlib.c for (q_no = ASC_MIN_ACTIVE_QNO; q_no <= sc->max_total_qng; q_no++) {
sc 3084 dev/ic/advlib.c _AscCopyLramScsiDoneQ(iot, ioh, q_addr, scsiq, sc->max_dma_count);
sc 3093 dev/ic/advlib.c (*asc_isr_callback) (sc, scsiq);
sc 3106 dev/ic/advlib.c AscRiscHaltedAbortTIX(sc, target_ix)
sc 3107 dev/ic/advlib.c ASC_SOFTC *sc;
sc 3110 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 3111 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 3120 dev/ic/advlib.c asc_isr_callback = (ASC_ISR_CALLBACK) sc->isr_callback;
sc 3123 dev/ic/advlib.c for (q_no = ASC_MIN_ACTIVE_QNO; q_no <= sc->max_total_qng; q_no++) {
sc 3125 dev/ic/advlib.c _AscCopyLramScsiDoneQ(iot, ioh, q_addr, scsiq, sc->max_dma_count);
sc 3135 dev/ic/advlib.c (*asc_isr_callback) (sc, scsiq);
sc 3150 dev/ic/advlib.c AscResetDevice(sc, target_ix)
sc 3151 dev/ic/advlib.c ASC_SOFTC *sc;
sc 3154 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 3155 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 3168 dev/ic/advlib.c saved_unit_not_ready = sc->unit_not_ready;
sc 3169 dev/ic/advlib.c sc->unit_not_ready = target_id;
sc 3172 dev/ic/advlib.c AscWaitTixISRDone(sc, target_ix);
sc 3175 dev/ic/advlib.c if (AscRiscHaltedAbortTIX(sc, target_ix) == 1) {
sc 3178 dev/ic/advlib.c AscWaitTixISRDone(sc, target_ix);
sc 3192 dev/ic/advlib.c sc->unit_not_ready &= ~target_id;
sc 3193 dev/ic/advlib.c sc->sdtr_done |= target_id;
sc 3194 dev/ic/advlib.c if (AscExeScsiQueue(sc, (ASC_SCSI_Q *) scsiq) == ASC_NOERROR) {
sc 3195 dev/ic/advlib.c sc->unit_not_ready = target_id;
sc 3201 dev/ic/advlib.c if (sc->pci_fix_asyn_xfer & target_id)
sc 3204 dev/ic/advlib.c AscWaitTixISRDone(sc, target_ix);
sc 3208 dev/ic/advlib.c sc->sdtr_done &= ~target_id;
sc 3214 dev/ic/advlib.c sc->unit_not_ready = saved_unit_not_ready;
sc 3220 dev/ic/advlib.c AscResetBus(sc)
sc 3221 dev/ic/advlib.c ASC_SOFTC *sc;
sc 3223 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 3224 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 3229 dev/ic/advlib.c sc->unit_not_ready = 0xFF;
sc 3232 dev/ic/advlib.c AscWaitISRDone(sc);
sc 3234 dev/ic/advlib.c sc->sdtr_done = 0;
sc 3236 dev/ic/advlib.c DvcSleepMilliSecond((u_long) ((u_int16_t) sc->scsi_reset_wait * 1000));
sc 3237 dev/ic/advlib.c AscReInitLram(sc);
sc 3239 dev/ic/advlib.c sc->cur_dvc_qng[i] = 0;
sc 3240 dev/ic/advlib.c if (sc->pci_fix_asyn_xfer & (ASC_SCSI_BIT_ID_TYPE) (0x01 << i))
sc 3252 dev/ic/advlib.c sc->unit_not_ready = 0;
sc 3253 dev/ic/advlib.c sc->queue_full_or_busy = 0;
sc 3264 dev/ic/advlib.c AscSetLibErrorCode(sc, err_code)
sc 3265 dev/ic/advlib.c ASC_SOFTC *sc;
sc 3270 dev/ic/advlib.c */ AscWriteLramWord(sc->sc_iot, sc->sc_ioh, ASCV_ASCDVC_ERR_CODE_W,
sc 3285 dev/ic/advlib.c AscInquiryHandling(sc, tid_no, inq)
sc 3286 dev/ic/advlib.c ASC_SOFTC *sc;
sc 3290 dev/ic/advlib.c bus_space_tag_t iot = sc->sc_iot;
sc 3291 dev/ic/advlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 3296 dev/ic/advlib.c orig_init_sdtr = sc->init_sdtr;
sc 3297 dev/ic/advlib.c orig_use_tagged_qng = sc->use_tagged_qng;
sc 3299 dev/ic/advlib.c sc->init_sdtr &= ~tid_bit;
sc 3300 dev/ic/advlib.c sc->can_tagged_qng &= ~tid_bit;
sc 3301 dev/ic/advlib.c sc->use_tagged_qng &= ~tid_bit;
sc 3304 dev/ic/advlib.c if ((sc->sdtr_enable & tid_bit) && inq->byte7.Sync)
sc 3305 dev/ic/advlib.c sc->init_sdtr |= tid_bit;
sc 3307 dev/ic/advlib.c if ((sc->cmd_qng_enabled & tid_bit) && inq->byte7.CmdQue)
sc 3309 dev/ic/advlib.c sc->use_tagged_qng |= tid_bit;
sc 3310 dev/ic/advlib.c sc->can_tagged_qng |= tid_bit;
sc 3313 dev/ic/advlib.c if (orig_use_tagged_qng != sc->use_tagged_qng) {
sc 3315 dev/ic/advlib.c sc->disc_enable);
sc 3317 dev/ic/advlib.c sc->use_tagged_qng);
sc 3319 dev/ic/advlib.c sc->can_tagged_qng);
sc 3321 dev/ic/advlib.c sc->max_dvc_qng[tid_no] =
sc 3322 dev/ic/advlib.c sc->max_tag_qng[tid_no];
sc 3324 dev/ic/advlib.c sc->max_dvc_qng[tid_no]);
sc 3326 dev/ic/advlib.c if (orig_init_sdtr != sc->init_sdtr)
sc 3327 dev/ic/advlib.c AscAsyncFix(sc, tid_no, inq);
sc 3345 dev/ic/advlib.c AscAsyncFix(sc, tid_no, inq)
sc 3346 dev/ic/advlib.c ASC_SOFTC *sc;
sc 3357 dev/ic/advlib.c if (sc->bug_fix_cntl & ASC_BUG_FIX_ASYN_USE_SYN) {
sc 3358 dev/ic/advlib.c if (!(sc->init_sdtr & tid_bits)) {
sc 3361 dev/ic/advlib.c sc->pci_fix_asyn_xfer_always |= tid_bits;
sc 3363 dev/ic/advlib.c sc->pci_fix_asyn_xfer |= tid_bits;
sc 3366 dev/ic/advlib.c sc->pci_fix_asyn_xfer &= ~tid_bits;
sc 3371 dev/ic/advlib.c sc->pci_fix_asyn_xfer &= ~tid_bits;
sc 3375 dev/ic/advlib.c sc->pci_fix_asyn_xfer &= ~tid_bits;
sc 3380 dev/ic/advlib.c sc->pci_fix_asyn_xfer &= ~tid_bits;
sc 3385 dev/ic/advlib.c sc->pci_fix_asyn_xfer &= ~tid_bits;
sc 3387 dev/ic/advlib.c if (sc->pci_fix_asyn_xfer & tid_bits) {
sc 3388 dev/ic/advlib.c AscSetRunChipSynRegAtID(sc->sc_iot, sc->sc_ioh, tid_no,
sc 1256 dev/ic/advlib.h #define ASC_SYN_INDEX_TO_PERIOD(sc, index) (u_int8_t)((sc)->sdtr_period_tbl[ (index) ])
sc 124 dev/ic/adw.c adw_enqueue(sc, xs, infront)
sc 125 dev/ic/adw.c ADW_SOFTC *sc;
sc 130 dev/ic/adw.c if (infront || LIST_EMPTY(&sc->sc_queue)) {
sc 131 dev/ic/adw.c if (LIST_EMPTY(&sc->sc_queue))
sc 132 dev/ic/adw.c sc->sc_queuelast = xs;
sc 133 dev/ic/adw.c LIST_INSERT_HEAD(&sc->sc_queue, xs, free_list);
sc 136 dev/ic/adw.c LIST_INSERT_AFTER(sc->sc_queuelast, xs, free_list);
sc 137 dev/ic/adw.c sc->sc_queuelast = xs;
sc 145 dev/ic/adw.c adw_dequeue(sc)
sc 146 dev/ic/adw.c ADW_SOFTC *sc;
sc 150 dev/ic/adw.c xs = LIST_FIRST(&sc->sc_queue);
sc 153 dev/ic/adw.c if (LIST_EMPTY(&sc->sc_queue))
sc 154 dev/ic/adw.c sc->sc_queuelast = NULL;
sc 165 dev/ic/adw.c adw_alloc_controls(sc)
sc 166 dev/ic/adw.c ADW_SOFTC *sc;
sc 174 dev/ic/adw.c if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct adw_control),
sc 177 dev/ic/adw.c " error = %d\n", sc->sc_dev.dv_xname, error);
sc 180 dev/ic/adw.c if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
sc 181 dev/ic/adw.c sizeof(struct adw_control), (caddr_t *) & sc->sc_control,
sc 184 dev/ic/adw.c sc->sc_dev.dv_xname, error);
sc 191 dev/ic/adw.c if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct adw_control),
sc 193 dev/ic/adw.c &sc->sc_dmamap_control)) != 0) {
sc 195 dev/ic/adw.c sc->sc_dev.dv_xname, error);
sc 198 dev/ic/adw.c if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_control,
sc 199 dev/ic/adw.c sc->sc_control, sizeof(struct adw_control), NULL,
sc 202 dev/ic/adw.c sc->sc_dev.dv_xname, error);
sc 211 dev/ic/adw.c adw_alloc_carriers(sc)
sc 212 dev/ic/adw.c ADW_SOFTC *sc;
sc 220 dev/ic/adw.c sc->sc_control->carriers =
sc 223 dev/ic/adw.c if (sc->sc_control->carriers == NULL)
sc 227 dev/ic/adw.c if ((error = bus_dmamem_alloc(sc->sc_dmat,
sc 231 dev/ic/adw.c " error = %d\n", sc->sc_dev.dv_xname, error);
sc 234 dev/ic/adw.c if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
sc 236 dev/ic/adw.c (caddr_t *) &sc->sc_control->carriers,
sc 239 dev/ic/adw.c " error = %d\n", sc->sc_dev.dv_xname, error);
sc 246 dev/ic/adw.c if ((error = bus_dmamap_create(sc->sc_dmat,
sc 249 dev/ic/adw.c &sc->sc_dmamap_carrier)) != 0) {
sc 251 dev/ic/adw.c " error = %d\n", sc->sc_dev.dv_xname, error);
sc 254 dev/ic/adw.c if ((error = bus_dmamap_load(sc->sc_dmat,
sc 255 dev/ic/adw.c sc->sc_dmamap_carrier, sc->sc_control->carriers,
sc 259 dev/ic/adw.c " error = %d\n", sc->sc_dev.dv_xname, error);
sc 277 dev/ic/adw.c adw_create_ccbs(sc, ccbstore, count)
sc 278 dev/ic/adw.c ADW_SOFTC *sc;
sc 287 dev/ic/adw.c if ((error = adw_init_ccb(sc, ccb)) != 0) {
sc 289 dev/ic/adw.c sc->sc_dev.dv_xname, error);
sc 292 dev/ic/adw.c TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, chain);
sc 303 dev/ic/adw.c adw_free_ccb(sc, ccb)
sc 304 dev/ic/adw.c ADW_SOFTC *sc;
sc 312 dev/ic/adw.c TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain);
sc 319 dev/ic/adw.c wakeup(&sc->sc_free_ccb);
sc 335 dev/ic/adw.c adw_init_ccb(sc, ccb)
sc 336 dev/ic/adw.c ADW_SOFTC *sc;
sc 344 dev/ic/adw.c error = bus_dmamap_create(sc->sc_dmat,
sc 350 dev/ic/adw.c sc->sc_dev.dv_xname, error);
sc 358 dev/ic/adw.c ccb->hashkey = sc->sc_dmamap_control->dm_segs[0].ds_addr +
sc 361 dev/ic/adw.c ccb->nexthash = sc->sc_ccbhash[hashnum];
sc 362 dev/ic/adw.c sc->sc_ccbhash[hashnum] = ccb;
sc 374 dev/ic/adw.c adw_get_ccb(sc, flags)
sc 375 dev/ic/adw.c ADW_SOFTC *sc;
sc 388 dev/ic/adw.c ccb = TAILQ_FIRST(&sc->sc_free_ccb);
sc 390 dev/ic/adw.c TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain);
sc 396 dev/ic/adw.c tsleep(&sc->sc_free_ccb, PRIBIO, "adwccb", 0);
sc 411 dev/ic/adw.c adw_ccb_phys_kv(sc, ccb_phys)
sc 412 dev/ic/adw.c ADW_SOFTC *sc;
sc 416 dev/ic/adw.c ADW_CCB *ccb = sc->sc_ccbhash[hashnum];
sc 431 dev/ic/adw.c adw_queue_ccb(sc, ccb, retry)
sc 432 dev/ic/adw.c ADW_SOFTC *sc;
sc 439 dev/ic/adw.c TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain);
sc 442 dev/ic/adw.c while ((ccb = TAILQ_FIRST(&sc->sc_waiting_ccb)) != NULL) {
sc 444 dev/ic/adw.c errcode = AdwExeScsiQueue(sc, &ccb->scsiq);
sc 455 dev/ic/adw.c TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain);
sc 459 dev/ic/adw.c TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain);
sc 460 dev/ic/adw.c TAILQ_INSERT_TAIL(&sc->sc_pending_ccb, ccb, chain);
sc 478 dev/ic/adw.c adw_init(sc)
sc 479 dev/ic/adw.c ADW_SOFTC *sc;
sc 484 dev/ic/adw.c sc->cfg.lib_version = (ADW_LIB_VERSION_MAJOR << 8) |
sc 486 dev/ic/adw.c sc->cfg.chip_version =
sc 487 dev/ic/adw.c ADW_GET_CHIP_VERSION(sc->sc_iot, sc->sc_ioh, sc->bus_type);
sc 492 dev/ic/adw.c if (ADW_FIND_SIGNATURE(sc->sc_iot, sc->sc_ioh) == 0) {
sc 495 dev/ic/adw.c AdwResetChip(sc->sc_iot, sc->sc_ioh);
sc 497 dev/ic/adw.c warn_code = AdwInitFromEEPROM(sc);
sc 502 dev/ic/adw.c sc->sc_dev.dv_xname);
sc 506 dev/ic/adw.c sc->sc_dev.dv_xname);
sc 509 dev/ic/adw.c sc->isr_callback = (ADW_CALLBACK) adw_isr_callback;
sc 510 dev/ic/adw.c sc->async_callback = (ADW_CALLBACK) adw_async_callback;
sc 517 dev/ic/adw.c adw_attach(sc)
sc 518 dev/ic/adw.c ADW_SOFTC *sc;
sc 524 dev/ic/adw.c TAILQ_INIT(&sc->sc_free_ccb);
sc 525 dev/ic/adw.c TAILQ_INIT(&sc->sc_waiting_ccb);
sc 526 dev/ic/adw.c TAILQ_INIT(&sc->sc_pending_ccb);
sc 527 dev/ic/adw.c LIST_INIT(&sc->sc_queue);
sc 533 dev/ic/adw.c error = adw_alloc_controls(sc);
sc 537 dev/ic/adw.c bzero(sc->sc_control, sizeof(struct adw_control));
sc 542 dev/ic/adw.c i = adw_create_ccbs(sc, sc->sc_control->ccbs, ADW_MAX_CCB);
sc 545 dev/ic/adw.c sc->sc_dev.dv_xname);
sc 550 dev/ic/adw.c sc->sc_dev.dv_xname, i, ADW_MAX_CCB);
sc 556 dev/ic/adw.c error = adw_alloc_carriers(sc);
sc 563 dev/ic/adw.c bzero(sc->sc_freeze_dev, sizeof(sc->sc_freeze_dev));
sc 568 dev/ic/adw.c switch (AdwInitDriver(sc)) {
sc 571 dev/ic/adw.c sc->sc_dev.dv_xname);
sc 576 dev/ic/adw.c sc->sc_dev.dv_xname);
sc 581 dev/ic/adw.c sc->sc_dev.dv_xname);
sc 586 dev/ic/adw.c sc->sc_dev.dv_xname);
sc 591 dev/ic/adw.c sc->sc_dev.dv_xname);
sc 596 dev/ic/adw.c sc->sc_dev.dv_xname);
sc 602 dev/ic/adw.c sc->sc_dev.dv_xname);
sc 607 dev/ic/adw.c sc->sc_dev.dv_xname);
sc 612 dev/ic/adw.c sc->sc_dev.dv_xname);
sc 619 dev/ic/adw.c sc->sc_adapter.scsi_cmd = adw_scsi_cmd;
sc 620 dev/ic/adw.c sc->sc_adapter.scsi_minphys = adw_minphys;
sc 625 dev/ic/adw.c sc->sc_link.adapter_softc = sc;
sc 626 dev/ic/adw.c sc->sc_link.adapter_target = sc->chip_scsi_id;
sc 627 dev/ic/adw.c sc->sc_link.adapter = &sc->sc_adapter;
sc 628 dev/ic/adw.c sc->sc_link.device = &adw_dev;
sc 629 dev/ic/adw.c sc->sc_link.openings = 4;
sc 630 dev/ic/adw.c sc->sc_link.adapter_buswidth = ADW_MAX_TID+1;
sc 633 dev/ic/adw.c saa.saa_sc_link = &sc->sc_link;
sc 635 dev/ic/adw.c config_found(&sc->sc_dev, &saa, scsiprint);
sc 659 dev/ic/adw.c ADW_SOFTC *sc = sc_link->adapter_softc;
sc 670 dev/ic/adw.c if (xs == LIST_FIRST(&sc->sc_queue)) {
sc 671 dev/ic/adw.c if(sc->sc_freeze_dev[xs->sc_link->target]) {
sc 675 dev/ic/adw.c xs = adw_dequeue(sc);
sc 679 dev/ic/adw.c if(sc->sc_freeze_dev[xs->sc_link->target]) {
sc 690 dev/ic/adw.c if (!LIST_EMPTY(&sc->sc_queue)) {
sc 702 dev/ic/adw.c adw_enqueue(sc, xs, 0);
sc 703 dev/ic/adw.c xs = adw_dequeue(sc);
sc 718 dev/ic/adw.c if ((ccb = adw_get_ccb(sc, flags)) == NULL) {
sc 730 dev/ic/adw.c adw_enqueue(sc, xs, fromqueue);
sc 742 dev/ic/adw.c retry = adw_queue_ccb(sc, ccb, retry);
sc 763 dev/ic/adw.c if (adw_poll(sc, xs, ccb->timeout)) {
sc 765 dev/ic/adw.c if (adw_poll(sc, xs, ccb->timeout))
sc 783 dev/ic/adw.c ADW_SOFTC *sc = sc_link->adapter_softc;
sc 784 dev/ic/adw.c bus_dma_tag_t dmat = sc->sc_dmat;
sc 815 dev/ic/adw.c scsiqp->sense_addr = sc->sc_dmamap_control->dm_segs[0].ds_addr +
sc 845 dev/ic/adw.c sc->sc_dev.dv_xname, ADW_MAX_SG_LIST);
sc 849 dev/ic/adw.c sc->sc_dev.dv_xname, error);
sc 853 dev/ic/adw.c adw_free_ccb(sc, ccb);
sc 940 dev/ic/adw.c ADW_SOFTC *sc = arg;
sc 944 dev/ic/adw.c if(AdwISR(sc) != ADW_FALSE) {
sc 953 dev/ic/adw.c if ((xs = LIST_FIRST(&sc->sc_queue)) != NULL)
sc 967 dev/ic/adw.c adw_poll(sc, xs, count)
sc 968 dev/ic/adw.c ADW_SOFTC *sc;
sc 975 dev/ic/adw.c adw_intr(sc);
sc 980 dev/ic/adw.c adw_print_info(sc, xs->sc_link->target);
sc 997 dev/ic/adw.c ADW_SOFTC *sc = sc_link->adapter_softc;
sc 1014 dev/ic/adw.c adw_reset_bus(sc);
sc 1041 dev/ic/adw.c ADW_ABORT_CCB(sc, ccb);
sc 1073 dev/ic/adw.c ADW_ABORT_CCB(sc, ccb);
sc 1088 dev/ic/adw.c adw_reset_bus(sc)
sc 1089 dev/ic/adw.c ADW_SOFTC *sc;
sc 1095 dev/ic/adw.c AdwResetSCSIBus(sc); /* XXX - should check return value? */
sc 1096 dev/ic/adw.c while((ccb = TAILQ_LAST(&sc->sc_pending_ccb,
sc 1099 dev/ic/adw.c TAILQ_REMOVE(&sc->sc_pending_ccb, ccb, chain);
sc 1100 dev/ic/adw.c TAILQ_INSERT_HEAD(&sc->sc_waiting_ccb, ccb, chain);
sc 1103 dev/ic/adw.c bzero(sc->sc_freeze_dev, sizeof(sc->sc_freeze_dev));
sc 1104 dev/ic/adw.c adw_queue_ccb(sc, TAILQ_FIRST(&sc->sc_waiting_ccb), 1);
sc 1116 dev/ic/adw.c adw_print_info(sc, tid)
sc 1117 dev/ic/adw.c ADW_SOFTC *sc;
sc 1120 dev/ic/adw.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1121 dev/ic/adw.c bus_space_tag_t iot = sc->sc_iot;
sc 1137 dev/ic/adw.c printf("%s: target %d using %d bit ", sc->sc_dev.dv_xname, tid,
sc 1178 dev/ic/adw.c adw_isr_callback(sc, scsiq)
sc 1179 dev/ic/adw.c ADW_SOFTC *sc;
sc 1188 dev/ic/adw.c ccb = adw_ccb_phys_kv(sc, scsiq->ccb_ptr);
sc 1189 dev/ic/adw.c TAILQ_REMOVE(&sc->sc_pending_ccb, ccb, chain);
sc 1193 dev/ic/adw.c sc->sc_dev.dv_xname);
sc 1195 dev/ic/adw.c adw_free_ccb(sc, ccb);
sc 1206 dev/ic/adw.c dmat = sc->sc_dmat;
sc 1221 dev/ic/adw.c sc->sc_freeze_dev[scsiq->target_id] = 0;
sc 1261 dev/ic/adw.c sc->sc_freeze_dev[scsiq->target_id] = 1;
sc 1267 dev/ic/adw.c ,sc->sc_dev.dv_xname
sc 1295 dev/ic/adw.c ,sc->sc_dev.dv_xname, scsiq->host_status);
sc 1317 dev/ic/adw.c ,sc->sc_dev.dv_xname, scsiq->host_status);
sc 1318 dev/ic/adw.c adw_reset_bus(sc);
sc 1330 dev/ic/adw.c ,sc->sc_dev.dv_xname, scsiq->host_status);
sc 1347 dev/ic/adw.c ,sc->sc_dev.dv_xname
sc 1355 dev/ic/adw.c adw_free_ccb(sc, ccb);
sc 1366 dev/ic/adw.c adw_async_callback(sc, code)
sc 1367 dev/ic/adw.c ADW_SOFTC *sc;
sc 1373 dev/ic/adw.c printf("%s: SCSI Bus reset detected\n", sc->sc_dev.dv_xname);
sc 1382 dev/ic/adw.c " the adapter\n", sc->sc_dev.dv_xname);
sc 1383 dev/ic/adw.c adw_reset_bus(sc);
sc 1389 dev/ic/adw.c sc->sc_dev.dv_xname);
sc 1402 dev/ic/adw.c printf("%s: Carrier Ready failure!\n", sc->sc_dev.dv_xname);
sc 1408 dev/ic/adw.c sc->sc_dev.dv_xname, code);
sc 108 dev/ic/adw.h (((u_long)(c)) - ((u_long)&sc->sc_control->ccbs[0])))
sc 112 dev/ic/adw.h int adw_init(ADW_SOFTC *sc);
sc 113 dev/ic/adw.h void adw_attach(ADW_SOFTC *sc);
sc 247 dev/ic/adwlib.c AdwInitFromEEPROM(sc)
sc 248 dev/ic/adwlib.c ADW_SOFTC *sc;
sc 250 dev/ic/adwlib.c bus_space_tag_t iot = sc->sc_iot;
sc 251 dev/ic/adwlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 274 dev/ic/adwlib.c switch(sc->chip_type) {
sc 285 dev/ic/adwlib.c if (sc->cfg.pci_slot_info != 0) {
sc 352 dev/ic/adwlib.c sc->wdtr_able = eep_config.wdtr_able;
sc 353 dev/ic/adwlib.c if (sc->chip_type == ADW_CHIP_ASC3550) {
sc 354 dev/ic/adwlib.c sc->sdtr_able = eep_config.sdtr1.sdtr_able;
sc 355 dev/ic/adwlib.c sc->ultra_able = eep_config.sdtr2.ultra_able;
sc 357 dev/ic/adwlib.c sc->sdtr_speed1 = eep_config.sdtr1.sdtr_speed1;
sc 358 dev/ic/adwlib.c sc->sdtr_speed2 = eep_config.sdtr2.sdtr_speed2;
sc 359 dev/ic/adwlib.c sc->sdtr_speed3 = eep_config.sdtr3.sdtr_speed3;
sc 360 dev/ic/adwlib.c sc->sdtr_speed4 = eep_config.sdtr4.sdtr_speed4;
sc 362 dev/ic/adwlib.c sc->ppr_able = 0;
sc 363 dev/ic/adwlib.c sc->tagqng_able = eep_config.tagqng_able;
sc 364 dev/ic/adwlib.c sc->cfg.disc_enable = eep_config.disc_enable;
sc 365 dev/ic/adwlib.c sc->max_host_qng = eep_config.max_host_qng;
sc 366 dev/ic/adwlib.c sc->max_dvc_qng = eep_config.max_dvc_qng;
sc 367 dev/ic/adwlib.c sc->chip_scsi_id = (eep_config.adapter_scsi_id & ADW_MAX_TID);
sc 368 dev/ic/adwlib.c sc->start_motor = eep_config.start_motor;
sc 369 dev/ic/adwlib.c sc->scsi_reset_wait = eep_config.scsi_reset_delay;
sc 370 dev/ic/adwlib.c sc->bios_ctrl = eep_config.bios_ctrl;
sc 371 dev/ic/adwlib.c sc->no_scam = eep_config.scam_tolerant;
sc 372 dev/ic/adwlib.c sc->cfg.serial1 = eep_config.serial_number[0];
sc 373 dev/ic/adwlib.c sc->cfg.serial2 = eep_config.serial_number[1];
sc 374 dev/ic/adwlib.c sc->cfg.serial3 = eep_config.serial_number[2];
sc 376 dev/ic/adwlib.c if (sc->chip_type == ADW_CHIP_ASC38C0800 ||
sc 377 dev/ic/adwlib.c sc->chip_type == ADW_CHIP_ASC38C1600) {
sc 378 dev/ic/adwlib.c sc->sdtr_able = 0;
sc 381 dev/ic/adwlib.c sdtr_speed = sc->sdtr_speed1;
sc 383 dev/ic/adwlib.c sdtr_speed = sc->sdtr_speed2;
sc 385 dev/ic/adwlib.c sdtr_speed = sc->sdtr_speed3;
sc 387 dev/ic/adwlib.c sdtr_speed = sc->sdtr_speed4;
sc 390 dev/ic/adwlib.c sc->sdtr_able |= (1 << tid);
sc 435 dev/ic/adwlib.c sc->max_host_qng = eep_config.max_host_qng;
sc 436 dev/ic/adwlib.c sc->max_dvc_qng = eep_config.max_dvc_qng;
sc 448 dev/ic/adwlib.c switch(sc->chip_type) {
sc 450 dev/ic/adwlib.c sc->cfg.termination = 0; /* auto termination */
sc 454 dev/ic/adwlib.c sc->cfg.termination |= ADW_TERM_CTL_L;
sc 457 dev/ic/adwlib.c sc->cfg.termination |= ADW_TERM_CTL_H;
sc 460 dev/ic/adwlib.c sc->cfg.termination |= ADW_TERM_CTL_SEL;
sc 499 dev/ic/adwlib.c sc->cfg.termination = termination;
sc 503 dev/ic/adwlib.c sc->cfg.termination = termination;
sc 507 dev/ic/adwlib.c sc->cfg.termination = termination | ADW_TERM_LVD_HI;
sc 511 dev/ic/adwlib.c sc->cfg.termination = termination | ADW_TERM_LVD;
sc 518 dev/ic/adwlib.c sc->cfg.termination = termination;
sc 534 dev/ic/adwlib.c AdwInitDriver(sc)
sc 535 dev/ic/adwlib.c ADW_SOFTC *sc;
sc 537 dev/ic/adwlib.c bus_space_tag_t iot = sc->sc_iot;
sc 538 dev/ic/adwlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 566 dev/ic/adwlib.c switch (sc->chip_type) {
sc 606 dev/ic/adwlib.c if((error_code = AdwRamSelfTest(iot, ioh, sc->chip_type))) {
sc 614 dev/ic/adwlib.c if((error_code = AdwLoadMCode(iot, ioh, bios_mem, sc->chip_type))) {
sc 621 dev/ic/adwlib.c ADW_READ_WORD_LRAM(iot, ioh, ADW_MC_VERSION_DATE, sc->cfg.mcode_date);
sc 622 dev/ic/adwlib.c ADW_READ_WORD_LRAM(iot, ioh, ADW_MC_VERSION_NUM, sc->cfg.mcode_version);
sc 630 dev/ic/adwlib.c if (sc->cfg.control_flag & CONTROL_FLAG_IGNORE_PERR) {
sc 636 dev/ic/adwlib.c switch (sc->chip_type) {
sc 693 dev/ic/adwlib.c if ((sc->bios_ctrl & BIOS_CTRL_AIPP_DIS) == 0) {
sc 720 dev/ic/adwlib.c if ((sc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS) == 0) {
sc 721 dev/ic/adwlib.c ADW_WRITE_WORD_LRAM(iot, ioh, ADW_MC_WDTR_ABLE, sc->wdtr_able);
sc 722 dev/ic/adwlib.c ADW_WRITE_WORD_LRAM(iot, ioh, ADW_MC_SDTR_ABLE, sc->sdtr_able);
sc 735 dev/ic/adwlib.c switch (sc->chip_type) {
sc 739 dev/ic/adwlib.c if (ADW_TID_TO_TIDMASK(tid) & sc->ultra_able) {
sc 774 dev/ic/adwlib.c sc->cfg.disc_enable);
sc 781 dev/ic/adwlib.c sc->cfg.disc_enable);
sc 783 dev/ic/adwlib.c sc->sdtr_speed1);
sc 785 dev/ic/adwlib.c sc->sdtr_speed2);
sc 787 dev/ic/adwlib.c sc->sdtr_speed3);
sc 789 dev/ic/adwlib.c sc->sdtr_speed4);
sc 802 dev/ic/adwlib.c ADW_OUR_ID_EN | sc->chip_scsi_id);
sc 805 dev/ic/adwlib.c switch(sc->chip_type) {
sc 807 dev/ic/adwlib.c error_code = AdwASC3550Cabling(iot, ioh, &sc->cfg);
sc 811 dev/ic/adwlib.c error_code = AdwASC38C0800Cabling(iot, ioh, &sc->cfg);
sc 815 dev/ic/adwlib.c error_code = AdwASC38C1600Cabling(iot, ioh, &sc->cfg);
sc 829 dev/ic/adwlib.c ADW_TID_TO_TIDMASK(sc->chip_scsi_id));
sc 834 dev/ic/adwlib.c sc->carr_freelist = AdwInitCarriers(sc->sc_dmamap_carrier,
sc 835 dev/ic/adwlib.c sc->sc_control->carriers);
sc 841 dev/ic/adwlib.c if ((sc->icq_sp = sc->carr_freelist) == NULL) {
sc 844 dev/ic/adwlib.c sc->carr_freelist = ADW_CARRIER_VADDR(sc,
sc 845 dev/ic/adwlib.c ADW_GET_CARRP(sc->icq_sp->next_ba));
sc 850 dev/ic/adwlib.c sc->icq_sp->next_ba = ADW_CQ_STOPPER;
sc 855 dev/ic/adwlib.c ADW_WRITE_DWORD_LRAM(iot, ioh, ADW_MC_ICQ, sc->icq_sp->carr_ba);
sc 861 dev/ic/adwlib.c if(sc->chip_type == ADW_CHIP_ASC38C1600) {
sc 863 dev/ic/adwlib.c sc->icq_sp->carr_ba);
sc 869 dev/ic/adwlib.c if ((sc->irq_sp = sc->carr_freelist) == NULL) {
sc 872 dev/ic/adwlib.c sc->carr_freelist = ADW_CARRIER_VADDR(sc,
sc 873 dev/ic/adwlib.c ADW_GET_CARRP(sc->irq_sp->next_ba));
sc 882 dev/ic/adwlib.c sc->irq_sp->next_ba = ADW_CQ_STOPPER;
sc 887 dev/ic/adwlib.c ADW_WRITE_DWORD_LRAM(iot, ioh, ADW_MC_IRQ, sc->irq_sp->carr_ba);
sc 888 dev/ic/adwlib.c sc->carr_pending_cnt = 0;
sc 903 dev/ic/adwlib.c if (sc->bios_ctrl & BIOS_CTRL_RESET_SCSI_BUS)
sc 927 dev/ic/adwlib.c if (AdwResetCCB(sc) != ADW_TRUE) {
sc 1711 dev/ic/adwlib.c AdwExeScsiQueue(sc, scsiq)
sc 1712 dev/ic/adwlib.c ADW_SOFTC *sc;
sc 1715 dev/ic/adwlib.c bus_space_tag_t iot = sc->sc_iot;
sc 1716 dev/ic/adwlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1735 dev/ic/adwlib.c ccb = adw_ccb_phys_kv(sc, scsiq->ccb_ptr);
sc 1740 dev/ic/adwlib.c if ((new_carrp = sc->carr_freelist) == NULL) {
sc 1743 dev/ic/adwlib.c sc->carr_freelist = ADW_CARRIER_VADDR(sc,
sc 1745 dev/ic/adwlib.c sc->carr_pending_cnt++;
sc 1755 dev/ic/adwlib.c req_paddr = sc->sc_dmamap_control->dm_segs[0].ds_addr +
sc 1765 dev/ic/adwlib.c scsiq->carr_ba = sc->icq_sp->carr_ba;
sc 1766 dev/ic/adwlib.c scsiq->carr_va = sc->icq_sp->carr_ba;
sc 1773 dev/ic/adwlib.c sc->icq_sp->areq_ba = req_paddr;
sc 1780 dev/ic/adwlib.c sc->icq_sp->next_ba = new_carrp->carr_ba;
sc 1784 dev/ic/adwlib.c sc->icq_sp->carr_id,
sc 1785 dev/ic/adwlib.c sc->icq_sp->carr_ba,
sc 1786 dev/ic/adwlib.c sc->icq_sp->areq_ba,
sc 1787 dev/ic/adwlib.c sc->icq_sp->next_ba);
sc 1792 dev/ic/adwlib.c sc->icq_sp = new_carrp;
sc 1794 dev/ic/adwlib.c if (sc->chip_type == ADW_CHIP_ASC3550 ||
sc 1795 dev/ic/adwlib.c sc->chip_type == ADW_CHIP_ASC38C0800) {
sc 1801 dev/ic/adwlib.c if (sc->chip_type == ADW_CHIP_ASC3550) {
sc 1810 dev/ic/adwlib.c } else if (sc->chip_type == ADW_CHIP_ASC38C1600) {
sc 1854 dev/ic/adwlib.c AdwResetCCB(sc)
sc 1855 dev/ic/adwlib.c ADW_SOFTC *sc;
sc 1863 dev/ic/adwlib.c status = AdwSendIdleCmd(sc, (u_int16_t) IDLE_CMD_SCSI_RESET_START, 0L);
sc 1880 dev/ic/adwlib.c status = AdwSendIdleCmd(sc, (u_int16_t) IDLE_CMD_SCSI_RESET_END, 0L);
sc 1885 dev/ic/adwlib.c AdwSleepMilliSecond((u_int32_t) sc->scsi_reset_wait * 1000);
sc 1899 dev/ic/adwlib.c AdwResetSCSIBus(sc)
sc 1900 dev/ic/adwlib.c ADW_SOFTC *sc;
sc 1902 dev/ic/adwlib.c bus_space_tag_t iot = sc->sc_iot;
sc 1903 dev/ic/adwlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1915 dev/ic/adwlib.c if (sc->chip_type == ADW_CHIP_ASC38C1600) {
sc 1948 dev/ic/adwlib.c status = (AdwInitDriver(sc) == 0)? ADW_TRUE : ADW_FALSE;
sc 1960 dev/ic/adwlib.c if (sc->chip_type == ADW_CHIP_ASC38C1600) {
sc 1990 dev/ic/adwlib.c AdwISR(sc)
sc 1991 dev/ic/adwlib.c ADW_SOFTC *sc;
sc 1993 dev/ic/adwlib.c bus_space_tag_t iot = sc->sc_iot;
sc 1994 dev/ic/adwlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2025 dev/ic/adwlib.c if (sc->chip_type == ADW_CHIP_ASC3550 ||
sc 2026 dev/ic/adwlib.c sc->chip_type == ADW_CHIP_ASC38C0800) {
sc 2028 dev/ic/adwlib.c sc->carr_pending_cnt != 0) {
sc 2031 dev/ic/adwlib.c if (sc->chip_type == ADW_CHIP_ASC3550) {
sc 2038 dev/ic/adwlib.c if (sc->async_callback != 0) {
sc 2039 dev/ic/adwlib.c (*(ADW_ASYNC_CALLBACK)sc->async_callback)(sc, intrb_code);
sc 2046 dev/ic/adwlib.c while (((irq_next_pa = sc->irq_sp->next_ba) & ADW_RQ_DONE) != 0)
sc 2050 dev/ic/adwlib.c sc->irq_sp->carr_id,
sc 2051 dev/ic/adwlib.c sc->irq_sp->carr_ba,
sc 2052 dev/ic/adwlib.c sc->irq_sp->areq_ba,
sc 2053 dev/ic/adwlib.c sc->irq_sp->next_ba);
sc 2065 dev/ic/adwlib.c ccb = adw_ccb_phys_kv(sc, sc->irq_sp->areq_ba);
sc 2067 dev/ic/adwlib.c scsiq->ccb_ptr = sc->irq_sp->areq_ba;
sc 2085 dev/ic/adwlib.c free_carrp = sc->irq_sp;
sc 2086 dev/ic/adwlib.c sc->irq_sp = ADW_CARRIER_VADDR(sc, ADW_GET_CARRP(irq_next_pa));
sc 2088 dev/ic/adwlib.c free_carrp->next_ba = (sc->carr_freelist == NULL) ? NULL
sc 2089 dev/ic/adwlib.c : sc->carr_freelist->carr_ba;
sc 2090 dev/ic/adwlib.c sc->carr_freelist = free_carrp;
sc 2091 dev/ic/adwlib.c sc->carr_pending_cnt--;
sc 2111 dev/ic/adwlib.c AdwInquiryHandling(sc, scsiq);
sc 2118 dev/ic/adwlib.c (*(ADW_ISR_CALLBACK)sc->isr_callback)(sc, scsiq);
sc 2149 dev/ic/adwlib.c AdwSendIdleCmd(sc, idle_cmd, idle_cmd_parameter)
sc 2150 dev/ic/adwlib.c ADW_SOFTC *sc;
sc 2154 dev/ic/adwlib.c bus_space_tag_t iot = sc->sc_iot;
sc 2155 dev/ic/adwlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2181 dev/ic/adwlib.c if (sc->chip_type == ADW_CHIP_ASC3550) {
sc 2217 dev/ic/adwlib.c AdwInquiryHandling(sc, scsiq)
sc 2218 dev/ic/adwlib.c ADW_SOFTC *sc;
sc 2222 dev/ic/adwlib.c bus_space_tag_t iot = sc->sc_iot;
sc 2223 dev/ic/adwlib.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2277 dev/ic/adwlib.c if ((sc->wdtr_able & tidmask) && inq->WBus16) {
sc 2316 dev/ic/adwlib.c if ((sc->sdtr_able & tidmask) && inq->Sync) {
sc 2339 dev/ic/adwlib.c if (sc->chip_type == ADW_CHIP_ASC38C1600 &&
sc 2353 dev/ic/adwlib.c sc->ppr_able);
sc 2354 dev/ic/adwlib.c sc->ppr_able |= tidmask;
sc 2356 dev/ic/adwlib.c sc->ppr_able);
sc 2375 dev/ic/adwlib.c if ((sc->tagqng_able & tidmask) && inq->CmdQue) {
sc 2384 dev/ic/adwlib.c sc->max_dvc_qng);
sc 1013 dev/ic/adwlib.h #define ADW_ABORT_CCB(sc, ccb_ptr) \
sc 1014 dev/ic/adwlib.h AdwSendIdleCmd((sc), (u_int16_t) IDLE_CMD_ABORT, (ccb_ptr)->hashkey)
sc 1027 dev/ic/adwlib.h #define ADW_RESET_DEVICE(sc, target_id) \
sc 1028 dev/ic/adwlib.h AdwSendIdleCmd((sc), (u_int16_t) IDLE_CMD_DEVICE_RESET, (target_id), 0)
sc 262 dev/ic/aic6360.c aicattach(struct aic_softc *sc)
sc 266 dev/ic/aic6360.c sc->sc_state = AIC_INIT;
sc 268 dev/ic/aic6360.c sc->sc_initiator = 7;
sc 269 dev/ic/aic6360.c sc->sc_freq = 20; /* XXXX assume 20 MHz. */
sc 280 dev/ic/aic6360.c sc->sc_minsync = (2 * 250) / sc->sc_freq;
sc 281 dev/ic/aic6360.c sc->sc_maxsync = (9 * 250) / sc->sc_freq;
sc 283 dev/ic/aic6360.c aic_init(sc); /* init chip and driver */
sc 288 dev/ic/aic6360.c sc->sc_link.adapter_softc = sc;
sc 289 dev/ic/aic6360.c sc->sc_link.adapter_target = sc->sc_initiator;
sc 290 dev/ic/aic6360.c sc->sc_link.adapter = &aic_switch;
sc 291 dev/ic/aic6360.c sc->sc_link.device = &aic_dev;
sc 292 dev/ic/aic6360.c sc->sc_link.openings = 2;
sc 295 dev/ic/aic6360.c saa.saa_sc_link = &sc->sc_link;
sc 297 dev/ic/aic6360.c config_found(&sc->sc_dev, &saa, scsiprint);
sc 303 dev/ic/aic6360.c struct aic_softc *sc = (struct aic_softc *) self;
sc 306 dev/ic/aic6360.c rv = config_detach_children(&sc->sc_dev, flags);
sc 317 dev/ic/aic6360.c aic_reset(struct aic_softc *sc)
sc 319 dev/ic/aic6360.c bus_space_tag_t iot = sc->sc_iot;
sc 320 dev/ic/aic6360.c bus_space_handle_t ioh = sc->sc_ioh;
sc 357 dev/ic/aic6360.c bus_space_write_1(iot, ioh, SCSIID, sc->sc_initiator << OID_S);
sc 363 dev/ic/aic6360.c aic_scsi_reset(struct aic_softc *sc)
sc 365 dev/ic/aic6360.c bus_space_tag_t iot = sc->sc_iot;
sc 366 dev/ic/aic6360.c bus_space_handle_t ioh = sc->sc_ioh;
sc 378 dev/ic/aic6360.c aic_init(struct aic_softc *sc)
sc 380 dev/ic/aic6360.c bus_space_tag_t iot = sc->sc_iot;
sc 381 dev/ic/aic6360.c bus_space_handle_t ioh = sc->sc_ioh;
sc 385 dev/ic/aic6360.c aic_reset(sc);
sc 386 dev/ic/aic6360.c aic_scsi_reset(sc);
sc 387 dev/ic/aic6360.c aic_reset(sc);
sc 389 dev/ic/aic6360.c if (sc->sc_state == AIC_INIT) {
sc 391 dev/ic/aic6360.c TAILQ_INIT(&sc->ready_list);
sc 392 dev/ic/aic6360.c TAILQ_INIT(&sc->nexus_list);
sc 393 dev/ic/aic6360.c TAILQ_INIT(&sc->free_list);
sc 394 dev/ic/aic6360.c sc->sc_nexus = NULL;
sc 395 dev/ic/aic6360.c acb = sc->sc_acb;
sc 396 dev/ic/aic6360.c bzero(acb, sizeof(sc->sc_acb));
sc 397 dev/ic/aic6360.c for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
sc 398 dev/ic/aic6360.c TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
sc 401 dev/ic/aic6360.c bzero(&sc->sc_tinfo, sizeof(sc->sc_tinfo));
sc 404 dev/ic/aic6360.c sc->sc_state = AIC_CLEANING;
sc 405 dev/ic/aic6360.c if ((acb = sc->sc_nexus) != NULL) {
sc 408 dev/ic/aic6360.c aic_done(sc, acb);
sc 410 dev/ic/aic6360.c while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) {
sc 413 dev/ic/aic6360.c aic_done(sc, acb);
sc 417 dev/ic/aic6360.c sc->sc_prevphase = PH_INVALID;
sc 419 dev/ic/aic6360.c struct aic_tinfo *ti = &sc->sc_tinfo[r];
sc 424 dev/ic/aic6360.c ti->period = sc->sc_minsync;
sc 437 dev/ic/aic6360.c sc->sc_state = AIC_IDLE;
sc 442 dev/ic/aic6360.c aic_free_acb(struct aic_softc *sc, struct aic_acb *acb, int flags)
sc 449 dev/ic/aic6360.c TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
sc 456 dev/ic/aic6360.c wakeup(&sc->free_list);
sc 462 dev/ic/aic6360.c aic_get_acb(struct aic_softc *sc, int flags)
sc 469 dev/ic/aic6360.c while ((acb = TAILQ_FIRST(&sc->free_list)) == NULL &&
sc 471 dev/ic/aic6360.c tsleep(&sc->free_list, PRIBIO, "aicacb", 0);
sc 473 dev/ic/aic6360.c TAILQ_REMOVE(&sc->free_list, acb, chain);
sc 511 dev/ic/aic6360.c struct aic_softc *sc = sc_link->adapter_softc;
sc 520 dev/ic/aic6360.c if ((acb = aic_get_acb(sc, flags)) == NULL) {
sc 543 dev/ic/aic6360.c TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
sc 544 dev/ic/aic6360.c if (sc->sc_state == AIC_IDLE)
sc 545 dev/ic/aic6360.c aic_sched(sc);
sc 553 dev/ic/aic6360.c if (aic_poll(sc, xs, acb->timeout)) {
sc 555 dev/ic/aic6360.c if (aic_poll(sc, xs, acb->timeout))
sc 580 dev/ic/aic6360.c aic_poll(struct aic_softc *sc, struct scsi_xfer *xs, int count)
sc 582 dev/ic/aic6360.c bus_space_tag_t iot = sc->sc_iot;
sc 583 dev/ic/aic6360.c bus_space_handle_t ioh = sc->sc_ioh;
sc 592 dev/ic/aic6360.c aicintr(sc);
sc 606 dev/ic/aic6360.c aic_sched_msgout(struct aic_softc *sc, u_char m)
sc 608 dev/ic/aic6360.c bus_space_tag_t iot = sc->sc_iot;
sc 609 dev/ic/aic6360.c bus_space_handle_t ioh = sc->sc_ioh;
sc 611 dev/ic/aic6360.c if (sc->sc_msgpriq == 0)
sc 612 dev/ic/aic6360.c bus_space_write_1(iot, ioh, SCSISIG, sc->sc_phase | ATNO);
sc 613 dev/ic/aic6360.c sc->sc_msgpriq |= m;
sc 620 dev/ic/aic6360.c aic_setsync(struct aic_softc *sc, struct aic_tinfo *ti)
sc 623 dev/ic/aic6360.c bus_space_tag_t iot = sc->sc_iot;
sc 624 dev/ic/aic6360.c bus_space_handle_t ioh = sc->sc_ioh;
sc 628 dev/ic/aic6360.c ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
sc 639 dev/ic/aic6360.c aic_select(struct aic_softc *sc, struct aic_acb *acb)
sc 641 dev/ic/aic6360.c bus_space_tag_t iot = sc->sc_iot;
sc 642 dev/ic/aic6360.c bus_space_handle_t ioh = sc->sc_ioh;
sc 645 dev/ic/aic6360.c struct aic_tinfo *ti = &sc->sc_tinfo[target];
sc 648 dev/ic/aic6360.c sc->sc_initiator << OID_S | target);
sc 649 dev/ic/aic6360.c aic_setsync(sc, ti);
sc 657 dev/ic/aic6360.c sc->sc_state = AIC_SELECTING;
sc 661 dev/ic/aic6360.c aic_reselect(struct aic_softc *sc, int message)
sc 673 dev/ic/aic6360.c selid = sc->sc_selid & ~(1 << sc->sc_initiator);
sc 676 dev/ic/aic6360.c sc->sc_dev.dv_xname, selid);
sc 689 dev/ic/aic6360.c TAILQ_FOREACH(acb, &sc->nexus_list, chain) {
sc 696 dev/ic/aic6360.c sc->sc_dev.dv_xname, target, lun);
sc 703 dev/ic/aic6360.c TAILQ_REMOVE(&sc->nexus_list, acb, chain);
sc 704 dev/ic/aic6360.c sc->sc_state = AIC_CONNECTED;
sc 705 dev/ic/aic6360.c sc->sc_nexus = acb;
sc 706 dev/ic/aic6360.c ti = &sc->sc_tinfo[target];
sc 708 dev/ic/aic6360.c aic_setsync(sc, ti);
sc 711 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_DEV_RESET);
sc 713 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_ABORT);
sc 716 dev/ic/aic6360.c sc->sc_dp = acb->data_addr;
sc 717 dev/ic/aic6360.c sc->sc_dleft = acb->data_length;
sc 718 dev/ic/aic6360.c sc->sc_cp = (u_char *)&acb->scsi_cmd;
sc 719 dev/ic/aic6360.c sc->sc_cleft = acb->scsi_cmd_length;
sc 724 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_DEV_RESET);
sc 728 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_ABORT);
sc 739 dev/ic/aic6360.c aic_sched(struct aic_softc *sc)
sc 741 dev/ic/aic6360.c bus_space_tag_t iot = sc->sc_iot;
sc 742 dev/ic/aic6360.c bus_space_handle_t ioh = sc->sc_ioh;
sc 753 dev/ic/aic6360.c TAILQ_FOREACH(acb, &sc->ready_list, chain) {
sc 755 dev/ic/aic6360.c ti = &sc->sc_tinfo[sc_link->target];
sc 759 dev/ic/aic6360.c TAILQ_REMOVE(&sc->ready_list, acb, chain);
sc 760 dev/ic/aic6360.c sc->sc_nexus = acb;
sc 761 dev/ic/aic6360.c aic_select(sc, acb);
sc 775 dev/ic/aic6360.c aic_sense(struct aic_softc *sc, struct aic_acb *acb)
sc 779 dev/ic/aic6360.c struct aic_tinfo *ti = &sc->sc_tinfo[sc_link->target];
sc 795 dev/ic/aic6360.c if (acb == sc->sc_nexus) {
sc 796 dev/ic/aic6360.c aic_select(sc, acb);
sc 798 dev/ic/aic6360.c aic_dequeue(sc, acb);
sc 799 dev/ic/aic6360.c TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
sc 800 dev/ic/aic6360.c if (sc->sc_state == AIC_IDLE)
sc 801 dev/ic/aic6360.c aic_sched(sc);
sc 809 dev/ic/aic6360.c aic_done(struct aic_softc *sc, struct aic_acb *acb)
sc 813 dev/ic/aic6360.c struct aic_tinfo *ti = &sc->sc_tinfo[sc_link->target];
sc 834 dev/ic/aic6360.c aic_sense(sc, acb);
sc 859 dev/ic/aic6360.c if (acb == sc->sc_nexus) {
sc 860 dev/ic/aic6360.c sc->sc_nexus = NULL;
sc 861 dev/ic/aic6360.c sc->sc_state = AIC_IDLE;
sc 862 dev/ic/aic6360.c aic_sched(sc);
sc 864 dev/ic/aic6360.c aic_dequeue(sc, acb);
sc 866 dev/ic/aic6360.c aic_free_acb(sc, acb, xs->flags);
sc 872 dev/ic/aic6360.c aic_dequeue(struct aic_softc *sc, struct aic_acb *acb)
sc 876 dev/ic/aic6360.c TAILQ_REMOVE(&sc->nexus_list, acb, chain);
sc 878 dev/ic/aic6360.c TAILQ_REMOVE(&sc->ready_list, acb, chain);
sc 896 dev/ic/aic6360.c aic_msgin(struct aic_softc *sc)
sc 898 dev/ic/aic6360.c bus_space_tag_t iot = sc->sc_iot;
sc 899 dev/ic/aic6360.c bus_space_handle_t ioh = sc->sc_ioh;
sc 905 dev/ic/aic6360.c if (sc->sc_prevphase == PH_MSGIN) {
sc 907 dev/ic/aic6360.c n = sc->sc_imp - sc->sc_imess;
sc 912 dev/ic/aic6360.c sc->sc_flags &= ~AIC_DROP_MSGIN;
sc 916 dev/ic/aic6360.c sc->sc_imp = &sc->sc_imess[n];
sc 942 dev/ic/aic6360.c sc->sc_flags |= AIC_DROP_MSGIN;
sc 943 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_PARITY_ERROR);
sc 947 dev/ic/aic6360.c if ((sc->sc_flags & AIC_DROP_MSGIN) == 0) {
sc 950 dev/ic/aic6360.c sc->sc_flags |= AIC_DROP_MSGIN;
sc 951 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_REJECT);
sc 953 dev/ic/aic6360.c *sc->sc_imp++ = bus_space_read_1(iot, ioh,
sc 962 dev/ic/aic6360.c if (n == 1 && IS1BYTEMSG(sc->sc_imess[0]))
sc 964 dev/ic/aic6360.c if (n == 2 && IS2BYTEMSG(sc->sc_imess[0]))
sc 966 dev/ic/aic6360.c if (n >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
sc 967 dev/ic/aic6360.c n == sc->sc_imess[1] + 2)
sc 986 dev/ic/aic6360.c AIC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
sc 989 dev/ic/aic6360.c switch (sc->sc_state) {
sc 995 dev/ic/aic6360.c AIC_ASSERT(sc->sc_nexus != NULL);
sc 996 dev/ic/aic6360.c acb = sc->sc_nexus;
sc 997 dev/ic/aic6360.c ti = &sc->sc_tinfo[acb->xs->sc_link->target];
sc 999 dev/ic/aic6360.c switch (sc->sc_imess[0]) {
sc 1001 dev/ic/aic6360.c if ((long)sc->sc_dleft < 0) {
sc 1004 dev/ic/aic6360.c sc->sc_dev.dv_xname, (u_long)-sc->sc_dleft,
sc 1008 dev/ic/aic6360.c acb->xs->resid = acb->data_length = sc->sc_dleft;
sc 1009 dev/ic/aic6360.c sc->sc_state = AIC_CMDCOMPLETE;
sc 1014 dev/ic/aic6360.c aic_sched_msgout(sc, sc->sc_lastmsg);
sc 1018 dev/ic/aic6360.c AIC_MISC(("message rejected %02x ", sc->sc_lastmsg));
sc 1019 dev/ic/aic6360.c switch (sc->sc_lastmsg) {
sc 1024 dev/ic/aic6360.c aic_setsync(sc, ti);
sc 1032 dev/ic/aic6360.c aic_setsync(sc, ti);
sc 1042 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_ABORT);
sc 1052 dev/ic/aic6360.c sc->sc_state = AIC_DISCONNECT;
sc 1056 dev/ic/aic6360.c acb->data_addr = sc->sc_dp;
sc 1057 dev/ic/aic6360.c acb->data_length = sc->sc_dleft;
sc 1061 dev/ic/aic6360.c sc->sc_dp = acb->data_addr;
sc 1062 dev/ic/aic6360.c sc->sc_dleft = acb->data_length;
sc 1063 dev/ic/aic6360.c sc->sc_cp = (u_char *)&acb->scsi_cmd;
sc 1064 dev/ic/aic6360.c sc->sc_cleft = acb->scsi_cmd_length;
sc 1068 dev/ic/aic6360.c switch (sc->sc_imess[2]) {
sc 1071 dev/ic/aic6360.c if (sc->sc_imess[1] != 3)
sc 1073 dev/ic/aic6360.c ti->period = sc->sc_imess[3];
sc 1074 dev/ic/aic6360.c ti->offset = sc->sc_imess[4];
sc 1077 dev/ic/aic6360.c } else if (ti->period < sc->sc_minsync ||
sc 1078 dev/ic/aic6360.c ti->period > sc->sc_maxsync ||
sc 1081 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_SDTR);
sc 1089 dev/ic/aic6360.c aic_setsync(sc, ti);
sc 1095 dev/ic/aic6360.c if (sc->sc_imess[1] != 2)
sc 1097 dev/ic/aic6360.c ti->width = sc->sc_imess[3];
sc 1102 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_WDTR);
sc 1113 dev/ic/aic6360.c sc->sc_dev.dv_xname);
sc 1122 dev/ic/aic6360.c sc->sc_dev.dv_xname);
sc 1125 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_REJECT);
sc 1131 dev/ic/aic6360.c if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
sc 1133 dev/ic/aic6360.c sc->sc_dev.dv_xname);
sc 1139 dev/ic/aic6360.c (void) aic_reselect(sc, sc->sc_imess[0]);
sc 1144 dev/ic/aic6360.c sc->sc_dev.dv_xname);
sc 1147 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_DEV_RESET);
sc 1152 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_ABORT);
sc 1168 dev/ic/aic6360.c AIC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
sc 1175 dev/ic/aic6360.c aic_msgout(struct aic_softc *sc)
sc 1177 dev/ic/aic6360.c bus_space_tag_t iot = sc->sc_iot;
sc 1178 dev/ic/aic6360.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1192 dev/ic/aic6360.c if (sc->sc_prevphase == PH_MSGOUT) {
sc 1193 dev/ic/aic6360.c if (sc->sc_omp == sc->sc_omess) {
sc 1206 dev/ic/aic6360.c sc->sc_msgpriq |= sc->sc_msgoutq;
sc 1214 dev/ic/aic6360.c n = sc->sc_omp - sc->sc_omess;
sc 1220 dev/ic/aic6360.c sc->sc_msgoutq = 0;
sc 1221 dev/ic/aic6360.c sc->sc_lastmsg = 0;
sc 1225 dev/ic/aic6360.c sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
sc 1226 dev/ic/aic6360.c sc->sc_msgpriq &= ~sc->sc_currmsg;
sc 1227 dev/ic/aic6360.c sc->sc_msgoutq |= sc->sc_currmsg;
sc 1230 dev/ic/aic6360.c switch (sc->sc_currmsg) {
sc 1232 dev/ic/aic6360.c AIC_ASSERT(sc->sc_nexus != NULL);
sc 1233 dev/ic/aic6360.c sc->sc_omess[0] =
sc 1234 dev/ic/aic6360.c MSG_IDENTIFY(sc->sc_nexus->xs->sc_link->lun, 1);
sc 1240 dev/ic/aic6360.c AIC_ASSERT(sc->sc_nexus != NULL);
sc 1241 dev/ic/aic6360.c ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->target];
sc 1242 dev/ic/aic6360.c sc->sc_omess[4] = MSG_EXTENDED;
sc 1243 dev/ic/aic6360.c sc->sc_omess[3] = 3;
sc 1244 dev/ic/aic6360.c sc->sc_omess[2] = MSG_EXT_SDTR;
sc 1245 dev/ic/aic6360.c sc->sc_omess[1] = ti->period >> 2;
sc 1246 dev/ic/aic6360.c sc->sc_omess[0] = ti->offset;
sc 1253 dev/ic/aic6360.c AIC_ASSERT(sc->sc_nexus != NULL);
sc 1254 dev/ic/aic6360.c ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->target];
sc 1255 dev/ic/aic6360.c sc->sc_omess[3] = MSG_EXTENDED;
sc 1256 dev/ic/aic6360.c sc->sc_omess[2] = 2;
sc 1257 dev/ic/aic6360.c sc->sc_omess[1] = MSG_EXT_WDTR;
sc 1258 dev/ic/aic6360.c sc->sc_omess[0] = ti->width;
sc 1264 dev/ic/aic6360.c sc->sc_flags |= AIC_ABORTING;
sc 1265 dev/ic/aic6360.c sc->sc_omess[0] = MSG_BUS_DEV_RESET;
sc 1270 dev/ic/aic6360.c sc->sc_omess[0] = MSG_MESSAGE_REJECT;
sc 1275 dev/ic/aic6360.c sc->sc_omess[0] = MSG_PARITY_ERROR;
sc 1280 dev/ic/aic6360.c sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
sc 1285 dev/ic/aic6360.c sc->sc_flags |= AIC_ABORTING;
sc 1286 dev/ic/aic6360.c sc->sc_omess[0] = MSG_ABORT;
sc 1292 dev/ic/aic6360.c sc->sc_dev.dv_xname);
sc 1294 dev/ic/aic6360.c sc->sc_omess[0] = MSG_NOOP;
sc 1298 dev/ic/aic6360.c sc->sc_omp = &sc->sc_omess[n];
sc 1320 dev/ic/aic6360.c if (sc->sc_msgpriq == 0)
sc 1326 dev/ic/aic6360.c if (n == 1 && sc->sc_msgpriq == 0)
sc 1329 dev/ic/aic6360.c bus_space_write_1(iot, ioh, SCSIDAT, *--sc->sc_omp);
sc 1332 dev/ic/aic6360.c sc->sc_lastmsg = sc->sc_currmsg;
sc 1342 dev/ic/aic6360.c if (sc->sc_msgpriq != 0) {
sc 1367 dev/ic/aic6360.c aic_dataout_pio(struct aic_softc *sc, u_char *p, int n)
sc 1369 dev/ic/aic6360.c bus_space_tag_t iot = sc->sc_iot;
sc 1370 dev/ic/aic6360.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1509 dev/ic/aic6360.c aic_datain_pio(struct aic_softc *sc, u_char *p, int n)
sc 1511 dev/ic/aic6360.c bus_space_tag_t iot = sc->sc_iot;
sc 1512 dev/ic/aic6360.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1632 dev/ic/aic6360.c struct aic_softc *sc = arg;
sc 1633 dev/ic/aic6360.c bus_space_tag_t iot = sc->sc_iot;
sc 1634 dev/ic/aic6360.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1657 dev/ic/aic6360.c printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
sc 1665 dev/ic/aic6360.c printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
sc 1667 dev/ic/aic6360.c if (sc->sc_prevphase == PH_MSGIN) {
sc 1668 dev/ic/aic6360.c sc->sc_flags |= AIC_DROP_MSGIN;
sc 1669 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_PARITY_ERROR);
sc 1671 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_INIT_DET_ERR);
sc 1684 dev/ic/aic6360.c switch (sc->sc_state) {
sc 1695 dev/ic/aic6360.c sc->sc_dev.dv_xname);
sc 1706 dev/ic/aic6360.c if (sc->sc_state == AIC_SELECTING) {
sc 1708 dev/ic/aic6360.c AIC_ASSERT(sc->sc_nexus != NULL);
sc 1709 dev/ic/aic6360.c acb = sc->sc_nexus;
sc 1710 dev/ic/aic6360.c sc->sc_nexus = NULL;
sc 1711 dev/ic/aic6360.c TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
sc 1715 dev/ic/aic6360.c sc->sc_selid = bus_space_read_1(iot, ioh, SELID);
sc 1717 dev/ic/aic6360.c sc->sc_state = AIC_RESELECTED;
sc 1726 dev/ic/aic6360.c if (sc->sc_state != AIC_SELECTING) {
sc 1728 dev/ic/aic6360.c sc->sc_dev.dv_xname);
sc 1733 dev/ic/aic6360.c AIC_ASSERT(sc->sc_nexus != NULL);
sc 1734 dev/ic/aic6360.c acb = sc->sc_nexus;
sc 1736 dev/ic/aic6360.c ti = &sc->sc_tinfo[sc_link->target];
sc 1738 dev/ic/aic6360.c sc->sc_msgpriq = SEND_IDENTIFY;
sc 1740 dev/ic/aic6360.c sc->sc_msgpriq |= SEND_DEV_RESET;
sc 1742 dev/ic/aic6360.c sc->sc_msgpriq |= SEND_ABORT;
sc 1746 dev/ic/aic6360.c sc->sc_msgpriq |= SEND_SDTR;
sc 1750 dev/ic/aic6360.c sc->sc_msgpriq |= SEND_WDTR;
sc 1758 dev/ic/aic6360.c sc->sc_dp = acb->data_addr;
sc 1759 dev/ic/aic6360.c sc->sc_dleft = acb->data_length;
sc 1760 dev/ic/aic6360.c sc->sc_cp = (u_char *)&acb->scsi_cmd;
sc 1761 dev/ic/aic6360.c sc->sc_cleft = acb->scsi_cmd_length;
sc 1768 dev/ic/aic6360.c sc->sc_state = AIC_CONNECTED;
sc 1772 dev/ic/aic6360.c if (sc->sc_state != AIC_SELECTING) {
sc 1774 dev/ic/aic6360.c sc->sc_dev.dv_xname);
sc 1779 dev/ic/aic6360.c AIC_ASSERT(sc->sc_nexus != NULL);
sc 1780 dev/ic/aic6360.c acb = sc->sc_nexus;
sc 1790 dev/ic/aic6360.c if (sc->sc_state != AIC_IDLE) {
sc 1792 dev/ic/aic6360.c sc->sc_dev.dv_xname);
sc 1793 dev/ic/aic6360.c printf("state=%d\n", sc->sc_state);
sc 1816 dev/ic/aic6360.c sc->sc_flags = 0;
sc 1817 dev/ic/aic6360.c sc->sc_prevphase = PH_INVALID;
sc 1826 dev/ic/aic6360.c switch (sc->sc_state) {
sc 1831 dev/ic/aic6360.c AIC_ASSERT(sc->sc_nexus != NULL);
sc 1832 dev/ic/aic6360.c acb = sc->sc_nexus;
sc 1835 dev/ic/aic6360.c if (sc->sc_prevphase == PH_MSGOUT) {
sc 1842 dev/ic/aic6360.c ti = &sc->sc_tinfo[sc_link->target];
sc 1843 dev/ic/aic6360.c switch (sc->sc_lastmsg) {
sc 1860 dev/ic/aic6360.c if ((sc->sc_flags & AIC_ABORTING) == 0) {
sc 1870 dev/ic/aic6360.c sc->sc_dev.dv_xname);
sc 1873 dev/ic/aic6360.c aic_sense(sc, acb);
sc 1881 dev/ic/aic6360.c AIC_ASSERT(sc->sc_nexus != NULL);
sc 1882 dev/ic/aic6360.c acb = sc->sc_nexus;
sc 1884 dev/ic/aic6360.c acb->data_addr = sc->sc_dp;
sc 1885 dev/ic/aic6360.c acb->data_length = sc->sc_dleft;
sc 1887 dev/ic/aic6360.c TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
sc 1888 dev/ic/aic6360.c sc->sc_nexus = NULL;
sc 1892 dev/ic/aic6360.c AIC_ASSERT(sc->sc_nexus != NULL);
sc 1893 dev/ic/aic6360.c acb = sc->sc_nexus;
sc 1906 dev/ic/aic6360.c sc->sc_phase = bus_space_read_1(iot, ioh, SCSISIG) & PH_MASK;
sc 1907 dev/ic/aic6360.c bus_space_write_1(iot, ioh, SCSISIG, sc->sc_phase);
sc 1909 dev/ic/aic6360.c switch (sc->sc_phase) {
sc 1911 dev/ic/aic6360.c if (sc->sc_state != AIC_CONNECTED &&
sc 1912 dev/ic/aic6360.c sc->sc_state != AIC_RESELECTED)
sc 1914 dev/ic/aic6360.c aic_msgout(sc);
sc 1915 dev/ic/aic6360.c sc->sc_prevphase = PH_MSGOUT;
sc 1919 dev/ic/aic6360.c if (sc->sc_state != AIC_CONNECTED &&
sc 1920 dev/ic/aic6360.c sc->sc_state != AIC_RESELECTED)
sc 1922 dev/ic/aic6360.c aic_msgin(sc);
sc 1923 dev/ic/aic6360.c sc->sc_prevphase = PH_MSGIN;
sc 1927 dev/ic/aic6360.c if (sc->sc_state != AIC_CONNECTED)
sc 1931 dev/ic/aic6360.c AIC_ASSERT(sc->sc_nexus != NULL);
sc 1932 dev/ic/aic6360.c acb = sc->sc_nexus;
sc 1937 dev/ic/aic6360.c n = aic_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
sc 1938 dev/ic/aic6360.c sc->sc_cp += n;
sc 1939 dev/ic/aic6360.c sc->sc_cleft -= n;
sc 1940 dev/ic/aic6360.c sc->sc_prevphase = PH_CMD;
sc 1944 dev/ic/aic6360.c if (sc->sc_state != AIC_CONNECTED)
sc 1946 dev/ic/aic6360.c AIC_MISC(("dataout dleft=%lu ", (u_long)sc->sc_dleft));
sc 1947 dev/ic/aic6360.c n = aic_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
sc 1948 dev/ic/aic6360.c sc->sc_dp += n;
sc 1949 dev/ic/aic6360.c sc->sc_dleft -= n;
sc 1950 dev/ic/aic6360.c sc->sc_prevphase = PH_DATAOUT;
sc 1954 dev/ic/aic6360.c if (sc->sc_state != AIC_CONNECTED)
sc 1956 dev/ic/aic6360.c AIC_MISC(("datain %lu ", (u_long)sc->sc_dleft));
sc 1957 dev/ic/aic6360.c n = aic_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
sc 1958 dev/ic/aic6360.c sc->sc_dp += n;
sc 1959 dev/ic/aic6360.c sc->sc_dleft -= n;
sc 1960 dev/ic/aic6360.c sc->sc_prevphase = PH_DATAIN;
sc 1964 dev/ic/aic6360.c if (sc->sc_state != AIC_CONNECTED)
sc 1966 dev/ic/aic6360.c AIC_ASSERT(sc->sc_nexus != NULL);
sc 1967 dev/ic/aic6360.c acb = sc->sc_nexus;
sc 1972 dev/ic/aic6360.c sc->sc_prevphase = PH_STAT;
sc 1976 dev/ic/aic6360.c printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname);
sc 1979 dev/ic/aic6360.c aic_init(sc);
sc 1984 dev/ic/aic6360.c aic_done(sc, acb);
sc 1988 dev/ic/aic6360.c sc->sc_state = AIC_IDLE;
sc 1989 dev/ic/aic6360.c aic_sched(sc);
sc 1998 dev/ic/aic6360.c aic_abort(struct aic_softc *sc, struct aic_acb *acb)
sc 2005 dev/ic/aic6360.c if (acb == sc->sc_nexus) {
sc 2010 dev/ic/aic6360.c if (sc->sc_state == AIC_CONNECTED)
sc 2011 dev/ic/aic6360.c aic_sched_msgout(sc, SEND_ABORT);
sc 2013 dev/ic/aic6360.c aic_dequeue(sc, acb);
sc 2014 dev/ic/aic6360.c TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
sc 2015 dev/ic/aic6360.c if (sc->sc_state == AIC_IDLE)
sc 2016 dev/ic/aic6360.c aic_sched(sc);
sc 2026 dev/ic/aic6360.c struct aic_softc *sc = sc_link->adapter_softc;
sc 2042 dev/ic/aic6360.c aic_abort(sc, acb);
sc 2087 dev/ic/aic6360.c struct aic_softc *sc = aic_cd.cd_devs[0];
sc 2090 dev/ic/aic6360.c TAILQ_FOREACH(acb, &sc->ready_list, chain)
sc 2093 dev/ic/aic6360.c if (sc->sc_nexus != NULL)
sc 2094 dev/ic/aic6360.c aic_print_acb(sc->sc_nexus);
sc 2096 dev/ic/aic6360.c TAILQ_FOREACH(acb, &sc->nexus_list, chain)
sc 2101 dev/ic/aic6360.c aic_dump6360(struct aic_softc *sc)
sc 2103 dev/ic/aic6360.c bus_space_tag_t iot = sc->sc_iot;
sc 2104 dev/ic/aic6360.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2130 dev/ic/aic6360.c aic_dump_driver(struct aic_softc *sc)
sc 2135 dev/ic/aic6360.c printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
sc 2136 dev/ic/aic6360.c printf("state=%x msgin=%x ", sc->sc_state, sc->sc_imess[0]);
sc 2137 dev/ic/aic6360.c printf("msgpriq=%x msgoutq=%x lastmsg=%x currmsg=%x\n", sc->sc_msgpriq,
sc 2138 dev/ic/aic6360.c sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
sc 2140 dev/ic/aic6360.c ti = &sc->sc_tinfo[i];
sc 199 dev/ic/aic6360var.h sc->sc_dev.dv_xname, __LINE__); \
sc 123 dev/ic/aic6915.c #define sf_funcreg_read(sc, reg) \
sc 124 dev/ic/aic6915.c bus_space_read_4((sc)->sc_st, (sc)->sc_sh_func, (reg))
sc 125 dev/ic/aic6915.c #define sf_funcreg_write(sc, reg, val) \
sc 126 dev/ic/aic6915.c bus_space_write_4((sc)->sc_st, (sc)->sc_sh_func, (reg), (val))
sc 129 dev/ic/aic6915.c sf_reg_read(struct sf_softc *sc, bus_addr_t reg)
sc 132 dev/ic/aic6915.c if (__predict_false(sc->sc_iomapped)) {
sc 133 dev/ic/aic6915.c bus_space_write_4(sc->sc_st, sc->sc_sh, SF_IndirectIoAccess,
sc 135 dev/ic/aic6915.c return (bus_space_read_4(sc->sc_st, sc->sc_sh,
sc 139 dev/ic/aic6915.c return (bus_space_read_4(sc->sc_st, sc->sc_sh, reg));
sc 143 dev/ic/aic6915.c sf_reg_write(struct sf_softc *sc, bus_addr_t reg, uint32_t val)
sc 146 dev/ic/aic6915.c if (__predict_false(sc->sc_iomapped)) {
sc 147 dev/ic/aic6915.c bus_space_write_4(sc->sc_st, sc->sc_sh, SF_IndirectIoAccess,
sc 149 dev/ic/aic6915.c bus_space_write_4(sc->sc_st, sc->sc_sh, SF_IndirectIoDataPort,
sc 154 dev/ic/aic6915.c bus_space_write_4(sc->sc_st, sc->sc_sh, reg, val);
sc 157 dev/ic/aic6915.c #define sf_genreg_read(sc, reg) \
sc 158 dev/ic/aic6915.c sf_reg_read((sc), (reg) + SF_GENREG_OFFSET)
sc 159 dev/ic/aic6915.c #define sf_genreg_write(sc, reg, val) \
sc 160 dev/ic/aic6915.c sf_reg_write((sc), (reg) + SF_GENREG_OFFSET, (val))
sc 168 dev/ic/aic6915.c sf_attach(struct sf_softc *sc)
sc 170 dev/ic/aic6915.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 175 dev/ic/aic6915.c timeout_set(&sc->sc_mii_timeout, sf_tick, sc);
sc 183 dev/ic/aic6915.c if (sc->sc_iomapped)
sc 184 dev/ic/aic6915.c sc->sc_sh_func = sc->sc_sh;
sc 186 dev/ic/aic6915.c if ((error = bus_space_subregion(sc->sc_st, sc->sc_sh,
sc 187 dev/ic/aic6915.c SF_GENREG_OFFSET, SF_FUNCREG_SIZE, &sc->sc_sh_func)) != 0) {
sc 189 dev/ic/aic6915.c "registers, error = %d\n", sc->sc_dev.dv_xname,
sc 201 dev/ic/aic6915.c sc->sc_txthresh = 10;
sc 207 dev/ic/aic6915.c if ((error = bus_dmamem_alloc(sc->sc_dmat,
sc 211 dev/ic/aic6915.c sc->sc_dev.dv_xname, error);
sc 215 dev/ic/aic6915.c if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
sc 216 dev/ic/aic6915.c sizeof(struct sf_control_data), (caddr_t *)&sc->sc_control_data,
sc 219 dev/ic/aic6915.c sc->sc_dev.dv_xname, error);
sc 223 dev/ic/aic6915.c if ((error = bus_dmamap_create(sc->sc_dmat,
sc 226 dev/ic/aic6915.c &sc->sc_cddmamap)) != 0) {
sc 228 dev/ic/aic6915.c "error = %d\n", sc->sc_dev.dv_xname, error);
sc 232 dev/ic/aic6915.c if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
sc 233 dev/ic/aic6915.c sc->sc_control_data, sizeof(struct sf_control_data), NULL,
sc 236 dev/ic/aic6915.c sc->sc_dev.dv_xname, error);
sc 244 dev/ic/aic6915.c if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 246 dev/ic/aic6915.c &sc->sc_txsoft[i].ds_dmamap)) != 0) {
sc 248 dev/ic/aic6915.c "error = %d\n", sc->sc_dev.dv_xname, i, error);
sc 257 dev/ic/aic6915.c if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 259 dev/ic/aic6915.c &sc->sc_rxsoft[i].ds_dmamap)) != 0) {
sc 261 dev/ic/aic6915.c "error = %d\n", sc->sc_dev.dv_xname, i, error);
sc 269 dev/ic/aic6915.c sf_reset(sc);
sc 275 dev/ic/aic6915.c enaddr[i] = sf_read_eeprom(sc, (15 + (ETHER_ADDR_LEN - 1)) - i);
sc 280 dev/ic/aic6915.c if (sf_funcreg_read(sc, SF_PciDeviceConfig) & PDC_System64)
sc 281 dev/ic/aic6915.c printf("%s: 64-bit PCI slot detected\n", sc->sc_dev.dv_xname);
sc 287 dev/ic/aic6915.c sc->sc_mii.mii_ifp = ifp;
sc 288 dev/ic/aic6915.c sc->sc_mii.mii_readreg = sf_mii_read;
sc 289 dev/ic/aic6915.c sc->sc_mii.mii_writereg = sf_mii_write;
sc 290 dev/ic/aic6915.c sc->sc_mii.mii_statchg = sf_mii_statchg;
sc 291 dev/ic/aic6915.c ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, sf_mediachange,
sc 293 dev/ic/aic6915.c mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
sc 295 dev/ic/aic6915.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 296 dev/ic/aic6915.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
sc 297 dev/ic/aic6915.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
sc 299 dev/ic/aic6915.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 300 dev/ic/aic6915.c bcopy(enaddr, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 301 dev/ic/aic6915.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 302 dev/ic/aic6915.c ifp = &sc->sc_arpcom.ac_if;
sc 303 dev/ic/aic6915.c ifp->if_softc = sc;
sc 320 dev/ic/aic6915.c sc->sc_sdhook = shutdownhook_establish(sf_shutdown, sc);
sc 321 dev/ic/aic6915.c if (sc->sc_sdhook == NULL)
sc 323 dev/ic/aic6915.c sc->sc_dev.dv_xname);
sc 332 dev/ic/aic6915.c if (sc->sc_rxsoft[i].ds_dmamap != NULL)
sc 333 dev/ic/aic6915.c bus_dmamap_destroy(sc->sc_dmat,
sc 334 dev/ic/aic6915.c sc->sc_rxsoft[i].ds_dmamap);
sc 338 dev/ic/aic6915.c if (sc->sc_txsoft[i].ds_dmamap != NULL)
sc 339 dev/ic/aic6915.c bus_dmamap_destroy(sc->sc_dmat,
sc 340 dev/ic/aic6915.c sc->sc_txsoft[i].ds_dmamap);
sc 342 dev/ic/aic6915.c bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
sc 344 dev/ic/aic6915.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
sc 346 dev/ic/aic6915.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t) sc->sc_control_data,
sc 349 dev/ic/aic6915.c bus_dmamem_free(sc->sc_dmat, &seg, rseg);
sc 362 dev/ic/aic6915.c struct sf_softc *sc = arg;
sc 364 dev/ic/aic6915.c sf_stop(&sc->sc_arpcom.ac_if, 1);
sc 375 dev/ic/aic6915.c struct sf_softc *sc = ifp->if_softc;
sc 385 dev/ic/aic6915.c opending = sc->sc_txpending;
sc 392 dev/ic/aic6915.c sf_funcreg_read(sc, SF_TxDescQueueProducerIndex)));
sc 399 dev/ic/aic6915.c while (sc->sc_txpending < (SF_NTXDESC - 1)) {
sc 411 dev/ic/aic6915.c txd = &sc->sc_txdescs[producer];
sc 412 dev/ic/aic6915.c ds = &sc->sc_txsoft[producer];
sc 421 dev/ic/aic6915.c if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
sc 426 dev/ic/aic6915.c sc->sc_dev.dv_xname);
sc 433 dev/ic/aic6915.c "cluster\n", sc->sc_dev.dv_xname);
sc 440 dev/ic/aic6915.c error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
sc 444 dev/ic/aic6915.c "error = %d\n", sc->sc_dev.dv_xname, error);
sc 472 dev/ic/aic6915.c SF_CDTXDSYNC(sc, producer, BUS_DMASYNC_PREWRITE);
sc 473 dev/ic/aic6915.c bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
sc 482 dev/ic/aic6915.c sc->sc_txpending++;
sc 495 dev/ic/aic6915.c if (sc->sc_txpending == (SF_NTXDESC - 1)) {
sc 500 dev/ic/aic6915.c if (sc->sc_txpending != opending) {
sc 508 dev/ic/aic6915.c sc->sc_txdescs[last].td_word0 |= TD_W0_INTR;
sc 509 dev/ic/aic6915.c SF_CDTXDSYNC(sc, last, BUS_DMASYNC_PREWRITE);
sc 511 dev/ic/aic6915.c sf_funcreg_write(sc, SF_TxDescQueueProducerIndex,
sc 527 dev/ic/aic6915.c struct sf_softc *sc = ifp->if_softc;
sc 529 dev/ic/aic6915.c printf("%s: device timeout\n", sc->sc_dev.dv_xname);
sc 546 dev/ic/aic6915.c struct sf_softc *sc = (struct sf_softc *)ifp->if_softc;
sc 553 dev/ic/aic6915.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 565 dev/ic/aic6915.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 572 dev/ic/aic6915.c ((ifp->if_flags ^ sc->sc_flags) &
sc 574 dev/ic/aic6915.c sf_set_filter(sc);
sc 583 dev/ic/aic6915.c sc->sc_flags = ifp->if_flags;
sc 597 dev/ic/aic6915.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 598 dev/ic/aic6915.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 602 dev/ic/aic6915.c sf_set_filter(sc);
sc 609 dev/ic/aic6915.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
sc 631 dev/ic/aic6915.c struct sf_softc *sc = arg;
sc 637 dev/ic/aic6915.c isr = sf_funcreg_read(sc, SF_InterruptStatus);
sc 645 dev/ic/aic6915.c sf_rxintr(sc);
sc 649 dev/ic/aic6915.c sf_txintr(sc);
sc 655 dev/ic/aic6915.c sf_stats_update(sc);
sc 661 dev/ic/aic6915.c sc->sc_dev.dv_xname);
sc 666 dev/ic/aic6915.c if (sc->sc_txthresh < 0xff)
sc 667 dev/ic/aic6915.c sc->sc_txthresh++;
sc 671 dev/ic/aic6915.c sc->sc_dev.dv_xname,
sc 672 dev/ic/aic6915.c sc->sc_txthresh * 16);
sc 674 dev/ic/aic6915.c sf_funcreg_write(sc, SF_TransmitFrameCSR,
sc 675 dev/ic/aic6915.c sc->sc_TransmitFrameCSR |
sc 676 dev/ic/aic6915.c TFCSR_TransmitThreshold(sc->sc_txthresh));
sc 677 dev/ic/aic6915.c sf_funcreg_write(sc, SF_TxDescQueueCtrl,
sc 678 dev/ic/aic6915.c sc->sc_TxDescQueueCtrl |
sc 680 dev/ic/aic6915.c sc->sc_txthresh));
sc 688 dev/ic/aic6915.c sf_init(&sc->sc_arpcom.ac_if);
sc 691 dev/ic/aic6915.c sf_start(&sc->sc_arpcom.ac_if);
sc 703 dev/ic/aic6915.c sf_txintr(struct sf_softc *sc)
sc 705 dev/ic/aic6915.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 711 dev/ic/aic6915.c cqci = sf_funcreg_read(sc, SF_CompletionQueueConsumerIndex);
sc 715 dev/ic/aic6915.c sf_funcreg_read(sc, SF_CompletionQueueProducerIndex));
sc 723 dev/ic/aic6915.c SF_CDTXCSYNC(sc, consumer, BUS_DMASYNC_POSTREAD);
sc 724 dev/ic/aic6915.c tcd = letoh32(sc->sc_txcomp[consumer].tcd_word0);
sc 730 dev/ic/aic6915.c sc->sc_dev.dv_xname, txidx);
sc 737 dev/ic/aic6915.c ds = &sc->sc_txsoft[txidx];
sc 738 dev/ic/aic6915.c SF_CDTXDSYNC(sc, txidx, BUS_DMASYNC_POSTWRITE);
sc 739 dev/ic/aic6915.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap,
sc 746 dev/ic/aic6915.c sc->sc_txpending--;
sc 750 dev/ic/aic6915.c KASSERT(sc->sc_txpending >= 0);
sc 753 dev/ic/aic6915.c if (sc->sc_txpending == 0)
sc 757 dev/ic/aic6915.c sf_funcreg_write(sc, SF_CompletionQueueConsumerIndex,
sc 771 dev/ic/aic6915.c sf_rxintr(struct sf_softc *sc)
sc 773 dev/ic/aic6915.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 781 dev/ic/aic6915.c cqci = sf_funcreg_read(sc, SF_CompletionQueueConsumerIndex);
sc 785 dev/ic/aic6915.c sf_funcreg_read(sc, SF_CompletionQueueProducerIndex));
sc 787 dev/ic/aic6915.c sf_funcreg_read(sc, SF_RxDescQueue1Ptrs));
sc 793 dev/ic/aic6915.c rcd = &sc->sc_rxcomp[consumer];
sc 794 dev/ic/aic6915.c SF_CDRXCSYNC(sc, consumer,
sc 796 dev/ic/aic6915.c SF_CDRXCSYNC(sc, consumer,
sc 802 dev/ic/aic6915.c ds = &sc->sc_rxsoft[rxidx];
sc 808 dev/ic/aic6915.c SF_INIT_RXDESC(sc, rxidx);
sc 812 dev/ic/aic6915.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
sc 829 dev/ic/aic6915.c if (sf_add_rxbuf(sc, rxidx) != 0) {
sc 831 dev/ic/aic6915.c SF_INIT_RXDESC(sc, rxidx);
sc 832 dev/ic/aic6915.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
sc 847 dev/ic/aic6915.c SF_INIT_RXDESC(sc, rxidx);
sc 848 dev/ic/aic6915.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
sc 868 dev/ic/aic6915.c SF_INIT_RXDESC(sc, rxidx);
sc 869 dev/ic/aic6915.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
sc 890 dev/ic/aic6915.c sf_funcreg_write(sc, SF_CompletionQueueConsumerIndex,
sc 893 dev/ic/aic6915.c sf_funcreg_write(sc, SF_RxDescQueue1Ptrs,
sc 908 dev/ic/aic6915.c struct sf_softc *sc = arg;
sc 912 dev/ic/aic6915.c mii_tick(&sc->sc_mii);
sc 913 dev/ic/aic6915.c sf_stats_update(sc);
sc 916 dev/ic/aic6915.c timeout_add(&sc->sc_mii_timeout, hz);
sc 925 dev/ic/aic6915.c sf_stats_update(struct sf_softc *sc)
sc 928 dev/ic/aic6915.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 934 dev/ic/aic6915.c *p++ = sf_genreg_read(sc,
sc 936 dev/ic/aic6915.c sf_genreg_write(sc, SF_STATS_BASE + (i * sizeof(uint32_t)), 0);
sc 962 dev/ic/aic6915.c sf_reset(struct sf_softc *sc)
sc 966 dev/ic/aic6915.c sf_funcreg_write(sc, SF_GeneralEthernetCtrl, 0);
sc 968 dev/ic/aic6915.c sf_macreset(sc);
sc 970 dev/ic/aic6915.c sf_funcreg_write(sc, SF_PciDeviceConfig, PDC_SoftReset);
sc 973 dev/ic/aic6915.c if ((sf_funcreg_read(sc, SF_PciDeviceConfig) &
sc 979 dev/ic/aic6915.c printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname);
sc 980 dev/ic/aic6915.c sf_funcreg_write(sc, SF_PciDeviceConfig, 0);
sc 992 dev/ic/aic6915.c sf_macreset(struct sf_softc *sc)
sc 995 dev/ic/aic6915.c sf_genreg_write(sc, SF_MacConfig1, sc->sc_MacConfig1 | MC1_SoftRst);
sc 997 dev/ic/aic6915.c sf_genreg_write(sc, SF_MacConfig1, sc->sc_MacConfig1);
sc 1008 dev/ic/aic6915.c struct sf_softc *sc = ifp->if_softc;
sc 1021 dev/ic/aic6915.c sf_reset(sc);
sc 1025 dev/ic/aic6915.c sf_genreg_write(sc, SF_STATS_BASE + i, 0);
sc 1030 dev/ic/aic6915.c memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs));
sc 1031 dev/ic/aic6915.c sf_funcreg_write(sc, SF_TxDescQueueHighAddr, 0);
sc 1032 dev/ic/aic6915.c sf_funcreg_write(sc, SF_HiPrTxDescQueueBaseAddr, SF_CDTXDADDR(sc, 0));
sc 1033 dev/ic/aic6915.c sf_funcreg_write(sc, SF_LoPrTxDescQueueBaseAddr, 0);
sc 1039 dev/ic/aic6915.c sc->sc_txcomp[i].tcd_word0 = TCD_DMA_ID;
sc 1040 dev/ic/aic6915.c SF_CDTXCSYNC(sc, i, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
sc 1042 dev/ic/aic6915.c sf_funcreg_write(sc, SF_CompletionQueueHighAddr, 0);
sc 1043 dev/ic/aic6915.c sf_funcreg_write(sc, SF_TxCompletionQueueCtrl, SF_CDTXCADDR(sc, 0));
sc 1049 dev/ic/aic6915.c ds = &sc->sc_rxsoft[i];
sc 1051 dev/ic/aic6915.c if ((error = sf_add_rxbuf(sc, i)) != 0) {
sc 1054 dev/ic/aic6915.c sc->sc_dev.dv_xname, i, error);
sc 1059 dev/ic/aic6915.c sf_rxdrain(sc);
sc 1063 dev/ic/aic6915.c SF_INIT_RXDESC(sc, i);
sc 1065 dev/ic/aic6915.c sf_funcreg_write(sc, SF_RxDescQueueHighAddress, 0);
sc 1066 dev/ic/aic6915.c sf_funcreg_write(sc, SF_RxDescQueue1LowAddress, SF_CDRXDADDR(sc, 0));
sc 1067 dev/ic/aic6915.c sf_funcreg_write(sc, SF_RxDescQueue2LowAddress, 0);
sc 1073 dev/ic/aic6915.c sc->sc_rxcomp[i].rcd_word0 = RCD_W0_ID;
sc 1074 dev/ic/aic6915.c sc->sc_rxcomp[i].rcd_word1 = 0;
sc 1075 dev/ic/aic6915.c sc->sc_rxcomp[i].rcd_word2 = 0;
sc 1076 dev/ic/aic6915.c sc->sc_rxcomp[i].rcd_timestamp = 0;
sc 1077 dev/ic/aic6915.c SF_CDRXCSYNC(sc, i, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
sc 1079 dev/ic/aic6915.c sf_funcreg_write(sc, SF_RxCompletionQueue1Ctrl, SF_CDRXCADDR(sc, 0) |
sc 1081 dev/ic/aic6915.c sf_funcreg_write(sc, SF_RxCompletionQueue2Ctrl, 0);
sc 1086 dev/ic/aic6915.c sc->sc_TransmitFrameCSR = 0;
sc 1087 dev/ic/aic6915.c sf_funcreg_write(sc, SF_TransmitFrameCSR,
sc 1088 dev/ic/aic6915.c sc->sc_TransmitFrameCSR |
sc 1089 dev/ic/aic6915.c TFCSR_TransmitThreshold(sc->sc_txthresh));
sc 1094 dev/ic/aic6915.c sc->sc_TxDescQueueCtrl = TDQC_SkipLength(0) |
sc 1098 dev/ic/aic6915.c sf_funcreg_write(sc, SF_TxDescQueueCtrl,
sc 1099 dev/ic/aic6915.c sc->sc_TxDescQueueCtrl |
sc 1100 dev/ic/aic6915.c TDQC_TxHighPriorityFifoThreshold(sc->sc_txthresh));
sc 1105 dev/ic/aic6915.c sf_funcreg_write(sc, SF_RxDescQueue1Ctrl,
sc 1108 dev/ic/aic6915.c sf_funcreg_write(sc, SF_RxDescQueue2Ctrl, 0);
sc 1113 dev/ic/aic6915.c sf_funcreg_write(sc, SF_TxDescQueueProducerIndex,
sc 1120 dev/ic/aic6915.c sf_funcreg_write(sc, SF_RxDescQueue1Ptrs,
sc 1122 dev/ic/aic6915.c sf_funcreg_write(sc, SF_RxDescQueue2Ptrs,
sc 1128 dev/ic/aic6915.c sf_funcreg_write(sc, SF_CompletionQueueConsumerIndex,
sc 1131 dev/ic/aic6915.c sf_funcreg_write(sc, SF_RxHiPrCompletionPtrs, 0);
sc 1136 dev/ic/aic6915.c sf_funcreg_write(sc, SF_RxDmaCtrl,
sc 1143 dev/ic/aic6915.c sc->sc_RxAddressFilteringCtl = 0;
sc 1144 dev/ic/aic6915.c sf_set_filter(sc);
sc 1150 dev/ic/aic6915.c sc->sc_MacConfig1 = MC1_PadEn;
sc 1155 dev/ic/aic6915.c mii_mediachg(&sc->sc_mii);
sc 1160 dev/ic/aic6915.c sc->sc_InterruptEn = IS_PCIPadInt | IS_RxQ1DoneInt |
sc 1163 dev/ic/aic6915.c sf_funcreg_write(sc, SF_InterruptEn, sc->sc_InterruptEn);
sc 1165 dev/ic/aic6915.c sf_funcreg_write(sc, SF_PciDeviceConfig, PDC_IntEnable |
sc 1171 dev/ic/aic6915.c sf_funcreg_write(sc, SF_GeneralEthernetCtrl,
sc 1175 dev/ic/aic6915.c timeout_add(&sc->sc_mii_timeout, hz);
sc 1187 dev/ic/aic6915.c printf("%s: interface not running\n", sc->sc_dev.dv_xname);
sc 1198 dev/ic/aic6915.c sf_rxdrain(struct sf_softc *sc)
sc 1204 dev/ic/aic6915.c ds = &sc->sc_rxsoft[i];
sc 1206 dev/ic/aic6915.c bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
sc 1221 dev/ic/aic6915.c struct sf_softc *sc = ifp->if_softc;
sc 1226 dev/ic/aic6915.c timeout_del(&sc->sc_mii_timeout);
sc 1229 dev/ic/aic6915.c mii_down(&sc->sc_mii);
sc 1232 dev/ic/aic6915.c sf_funcreg_write(sc, SF_InterruptEn, 0);
sc 1235 dev/ic/aic6915.c sf_funcreg_write(sc, SF_GeneralEthernetCtrl, 0);
sc 1241 dev/ic/aic6915.c ds = &sc->sc_txsoft[i];
sc 1243 dev/ic/aic6915.c bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
sc 1250 dev/ic/aic6915.c sf_rxdrain(sc);
sc 1265 dev/ic/aic6915.c sf_read_eeprom(struct sf_softc *sc, int offset)
sc 1269 dev/ic/aic6915.c reg = sf_genreg_read(sc, SF_EEPROM_BASE + (offset & ~3));
sc 1280 dev/ic/aic6915.c sf_add_rxbuf(struct sf_softc *sc, int idx)
sc 1282 dev/ic/aic6915.c struct sf_descsoft *ds = &sc->sc_rxsoft[idx];
sc 1297 dev/ic/aic6915.c bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
sc 1301 dev/ic/aic6915.c error = bus_dmamap_load(sc->sc_dmat, ds->ds_dmamap,
sc 1306 dev/ic/aic6915.c sc->sc_dev.dv_xname, idx, error);
sc 1310 dev/ic/aic6915.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
sc 1313 dev/ic/aic6915.c SF_INIT_RXDESC(sc, idx);
sc 1319 dev/ic/aic6915.c sf_set_filter_perfect(struct sf_softc *sc, int slot, uint8_t *enaddr)
sc 1327 dev/ic/aic6915.c sf_genreg_write(sc, SF_PERFECT_BASE + (slot * 0x10) + 0, reg0);
sc 1328 dev/ic/aic6915.c sf_genreg_write(sc, SF_PERFECT_BASE + (slot * 0x10) + 4, reg1);
sc 1329 dev/ic/aic6915.c sf_genreg_write(sc, SF_PERFECT_BASE + (slot * 0x10) + 8, reg2);
sc 1333 dev/ic/aic6915.c sf_set_filter_hash(struct sf_softc *sc, uint8_t *enaddr)
sc 1340 dev/ic/aic6915.c reg = sf_genreg_read(sc, SF_HASH_BASE + (slot * 0x10));
sc 1342 dev/ic/aic6915.c sf_genreg_write(sc, SF_HASH_BASE + (slot * 0x10), reg);
sc 1351 dev/ic/aic6915.c sf_set_filter(struct sf_softc *sc)
sc 1353 dev/ic/aic6915.c struct arpcom *ac = &sc->sc_arpcom;
sc 1354 dev/ic/aic6915.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1361 dev/ic/aic6915.c sf_genreg_write(sc, SF_PERFECT_BASE + i, 0);
sc 1364 dev/ic/aic6915.c sf_genreg_write(sc, SF_HASH_BASE + i, 0);
sc 1369 dev/ic/aic6915.c sc->sc_RxAddressFilteringCtl &=
sc 1373 dev/ic/aic6915.c sc->sc_RxAddressFilteringCtl |= RAFC_PassBroadcast;
sc 1375 dev/ic/aic6915.c sc->sc_RxAddressFilteringCtl &= ~RAFC_PassBroadcast;
sc 1378 dev/ic/aic6915.c sc->sc_RxAddressFilteringCtl |= RAFC_PromiscuousMode;
sc 1381 dev/ic/aic6915.c sc->sc_RxAddressFilteringCtl &= ~RAFC_PromiscuousMode;
sc 1386 dev/ic/aic6915.c sc->sc_RxAddressFilteringCtl |= RAFC_PerfectFilteringMode(1);
sc 1392 dev/ic/aic6915.c sf_set_filter_perfect(sc, 0, LLADDR(ifp->if_sadl));
sc 1413 dev/ic/aic6915.c sf_set_filter_hash(sc, enm->enm_addrlo);
sc 1420 dev/ic/aic6915.c sc->sc_RxAddressFilteringCtl |= RAFC_HashFilteringMode(2);
sc 1427 dev/ic/aic6915.c sc->sc_RxAddressFilteringCtl |= RAFC_PassMulticast;
sc 1431 dev/ic/aic6915.c sf_funcreg_write(sc, SF_RxAddressFilteringCtl,
sc 1432 dev/ic/aic6915.c sc->sc_RxAddressFilteringCtl);
sc 1443 dev/ic/aic6915.c struct sf_softc *sc = (void *) self;
sc 1448 dev/ic/aic6915.c v = sf_genreg_read(sc, SF_MII_PHY_REG(phy, reg));
sc 1471 dev/ic/aic6915.c struct sf_softc *sc = (void *) self;
sc 1474 dev/ic/aic6915.c sf_genreg_write(sc, SF_MII_PHY_REG(phy, reg), val);
sc 1477 dev/ic/aic6915.c if ((sf_genreg_read(sc, SF_MII_PHY_REG(phy, reg)) &
sc 1483 dev/ic/aic6915.c printf("%s: MII write timed out\n", sc->sc_dev.dv_xname);
sc 1494 dev/ic/aic6915.c struct sf_softc *sc = (void *) self;
sc 1497 dev/ic/aic6915.c if (sc->sc_mii.mii_media_active & IFM_FDX) {
sc 1498 dev/ic/aic6915.c sc->sc_MacConfig1 |= MC1_FullDuplex;
sc 1501 dev/ic/aic6915.c sc->sc_MacConfig1 &= ~MC1_FullDuplex;
sc 1505 dev/ic/aic6915.c sf_genreg_write(sc, SF_MacConfig1, sc->sc_MacConfig1);
sc 1506 dev/ic/aic6915.c sf_macreset(sc);
sc 1508 dev/ic/aic6915.c sf_genreg_write(sc, SF_BkToBkIPG, ipg);
sc 1519 dev/ic/aic6915.c struct sf_softc *sc = ifp->if_softc;
sc 1521 dev/ic/aic6915.c mii_pollstat(&sc->sc_mii);
sc 1522 dev/ic/aic6915.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 1523 dev/ic/aic6915.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 1534 dev/ic/aic6915.c struct sf_softc *sc = ifp->if_softc;
sc 1537 dev/ic/aic6915.c mii_mediachg(&sc->sc_mii);
sc 811 dev/ic/aic6915.h #define SF_CDTXDADDR(sc, x) ((sc)->sc_cddma + SF_CDTXDOFF((x)))
sc 812 dev/ic/aic6915.h #define SF_CDTXCADDR(sc, x) ((sc)->sc_cddma + SF_CDTXCOFF((x)))
sc 813 dev/ic/aic6915.h #define SF_CDRXDADDR(sc, x) ((sc)->sc_cddma + SF_CDRXDOFF((x)))
sc 814 dev/ic/aic6915.h #define SF_CDRXCADDR(sc, x) ((sc)->sc_cddma + SF_CDRXCOFF((x)))
sc 816 dev/ic/aic6915.h #define SF_CDTXDSYNC(sc, x, ops) \
sc 817 dev/ic/aic6915.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 820 dev/ic/aic6915.h #define SF_CDTXCSYNC(sc, x, ops) \
sc 821 dev/ic/aic6915.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 824 dev/ic/aic6915.h #define SF_CDRXDSYNC(sc, x, ops) \
sc 825 dev/ic/aic6915.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 828 dev/ic/aic6915.h #define SF_CDRXCSYNC(sc, x, ops) \
sc 829 dev/ic/aic6915.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 832 dev/ic/aic6915.h #define SF_INIT_RXDESC(sc, x) \
sc 834 dev/ic/aic6915.h struct sf_descsoft *__ds = &sc->sc_rxsoft[(x)]; \
sc 836 dev/ic/aic6915.h (sc)->sc_rxbufdescs[(x)].rbd32_addr = \
sc 838 dev/ic/aic6915.h SF_CDRXDSYNC((sc), (x), BUS_DMASYNC_PREWRITE); \
sc 6778 dev/ic/aic79xx.c ahd_parse_cfgdata(struct ahd_softc *ahd, struct seeprom_config *sc)
sc 6783 dev/ic/aic79xx.c max_targ = sc->max_targets & CFMAXTARG;
sc 6784 dev/ic/aic79xx.c ahd->our_id = sc->brtime_id & CFSCSIID;
sc 6818 dev/ic/aic79xx.c if (sc->device_flags[targ] & CFDISC) {
sc 6826 dev/ic/aic79xx.c sc->device_flags[targ] &= ~CFPACKETIZED;
sc 6830 dev/ic/aic79xx.c user_tinfo->period = (sc->device_flags[targ] & CFXFER);
sc 6844 dev/ic/aic79xx.c if ((sc->device_flags[targ] & CFPACKETIZED) != 0) {
sc 6853 dev/ic/aic79xx.c if ((sc->device_flags[targ] & CFQAS) != 0)
sc 6856 dev/ic/aic79xx.c if ((sc->device_flags[targ] & CFWIDEB) != 0)
sc 6886 dev/ic/aic79xx.c if (sc->bios_control & CFSPARITY)
sc 6890 dev/ic/aic79xx.c if (sc->bios_control & CFRESETB)
sc 6894 dev/ic/aic79xx.c if (sc->bios_control & CFEXTEND)
sc 6898 dev/ic/aic79xx.c if ((sc->bios_control & CFBIOSSTATE) == CFBS_ENABLED)
sc 6902 dev/ic/aic79xx.c if ((sc->adapter_control & CFSTPWLEVEL) != 0)
sc 8143 dev/ic/aic79xx.c struct scsi_sense *sc;
sc 8170 dev/ic/aic79xx.c sc = (struct scsi_sense *)hscb->shared_data.idata.cdb;
sc 8185 dev/ic/aic79xx.c sc->opcode = REQUEST_SENSE;
sc 8186 dev/ic/aic79xx.c sc->byte2 = 0;
sc 8189 dev/ic/aic79xx.c sc->byte2 = SCB_GET_LUN(scb) << 5;
sc 8190 dev/ic/aic79xx.c sc->unused[0] = 0;
sc 8191 dev/ic/aic79xx.c sc->unused[1] = 0;
sc 8192 dev/ic/aic79xx.c sc->length = aic_get_sense_bufsize(ahd, scb);
sc 8193 dev/ic/aic79xx.c sc->control = 0;
sc 8223 dev/ic/aic79xx.c hscb->cdb_len = sizeof(*sc);
sc 9337 dev/ic/aic79xx.c ahd_verify_cksum(struct seeprom_config *sc)
sc 9344 dev/ic/aic79xx.c maxaddr = (sizeof(*sc)/2) - 1;
sc 9346 dev/ic/aic79xx.c scarray = (uint16_t *)sc;
sc 9351 dev/ic/aic79xx.c || (checksum & 0xFFFF) != sc->checksum) {
sc 1011 dev/ic/aic79xx.h int ahd_verify_cksum(struct seeprom_config *sc);
sc 1411 dev/ic/aic79xx.h struct seeprom_config *sc);
sc 537 dev/ic/aic7xxx.c struct scsi_sense *sc;
sc 559 dev/ic/aic7xxx.c sc = (struct scsi_sense *)(&hscb->shared_data.cdb);
sc 578 dev/ic/aic7xxx.c sc->opcode = REQUEST_SENSE;
sc 579 dev/ic/aic7xxx.c sc->byte2 = 0;
sc 582 dev/ic/aic7xxx.c sc->byte2 = SCB_GET_LUN(scb) << 5;
sc 583 dev/ic/aic7xxx.c sc->unused[0] = 0;
sc 584 dev/ic/aic7xxx.c sc->unused[1] = 0;
sc 585 dev/ic/aic7xxx.c sc->length = sg->len;
sc 586 dev/ic/aic7xxx.c sc->control = 0;
sc 616 dev/ic/aic7xxx.c hscb->cdb_len = sizeof(*sc);
sc 82 dev/ic/aic7xxx_seeprom.c static int verify_seeprom_cksum(struct seeprom_config *sc);
sc 101 dev/ic/aic7xxx_seeprom.c struct seeprom_config *sc;
sc 111 dev/ic/aic7xxx_seeprom.c sc = ahc->seep_config;
sc 141 dev/ic/aic7xxx_seeprom.c have_seeprom = read_seeprom(&sd, (uint16_t *)sc,
sc 143 dev/ic/aic7xxx_seeprom.c sizeof(*sc)/2);
sc 146 dev/ic/aic7xxx_seeprom.c have_seeprom = verify_seeprom_cksum(sc);
sc 178 dev/ic/aic7xxx_seeprom.c sc_data = (uint16_t *)sc;
sc 186 dev/ic/aic7xxx_seeprom.c have_seeprom = verify_seeprom_cksum(sc);
sc 204 dev/ic/aic7xxx_seeprom.c sc = NULL;
sc 206 dev/ic/aic7xxx_seeprom.c ahc_parse_pci_eeprom(ahc, sc);
sc 229 dev/ic/aic7xxx_seeprom.c configure_termination(ahc, &sd, sc->adapter_control, sxfrctl1);
sc 233 dev/ic/aic7xxx_seeprom.c if ((sc->adapter_control & CFSTERM) != 0)
sc 243 dev/ic/aic7xxx_seeprom.c ahc_parse_pci_eeprom(struct ahc_softc *ahc, struct seeprom_config *sc)
sc 250 dev/ic/aic7xxx_seeprom.c int max_targ = sc->max_targets & CFMAXTARG;
sc 257 dev/ic/aic7xxx_seeprom.c if ((sc->adapter_control & CFULTRAEN) != 0) {
sc 263 dev/ic/aic7xxx_seeprom.c if ((sc->device_flags[i] & CFSYNCHISULTRA) != 0) {
sc 275 dev/ic/aic7xxx_seeprom.c if (sc->device_flags[i] & CFDISC)
sc 278 dev/ic/aic7xxx_seeprom.c if ((sc->device_flags[i] & CFSYNCHISULTRA) != 0)
sc 280 dev/ic/aic7xxx_seeprom.c } else if ((sc->adapter_control & CFULTRAEN) != 0) {
sc 283 dev/ic/aic7xxx_seeprom.c if ((sc->device_flags[i] & CFXFER) == 0x04
sc 286 dev/ic/aic7xxx_seeprom.c sc->device_flags[i] &= ~CFXFER;
sc 292 dev/ic/aic7xxx_seeprom.c if (sc->device_flags[i] & CFSYNCH)
sc 303 dev/ic/aic7xxx_seeprom.c scsirate = (sc->device_flags[i] & CFXFER)
sc 305 dev/ic/aic7xxx_seeprom.c if (sc->device_flags[i] & CFWIDEB)
sc 308 dev/ic/aic7xxx_seeprom.c scsirate = (sc->device_flags[i] & CFXFER) << 4;
sc 309 dev/ic/aic7xxx_seeprom.c if (sc->device_flags[i] & CFSYNCH)
sc 311 dev/ic/aic7xxx_seeprom.c if (sc->device_flags[i] & CFWIDEB)
sc 316 dev/ic/aic7xxx_seeprom.c ahc->our_id = sc->brtime_id & CFSCSIID;
sc 319 dev/ic/aic7xxx_seeprom.c if (sc->adapter_control & CFSPARITY)
sc 321 dev/ic/aic7xxx_seeprom.c if (sc->adapter_control & CFRESETB)
sc 324 dev/ic/aic7xxx_seeprom.c ahc->flags |= (sc->adapter_control & CFBOOTCHAN) >> CFBOOTCHANSHIFT;
sc 326 dev/ic/aic7xxx_seeprom.c if (sc->bios_control & CFEXTEND)
sc 329 dev/ic/aic7xxx_seeprom.c if (sc->bios_control & CFBIOSEN)
sc 334 dev/ic/aic7xxx_seeprom.c if (!(sc->adapter_control & CFULTRAEN))
sc 339 dev/ic/aic7xxx_seeprom.c if (sc->signature == CFSIGNATURE
sc 340 dev/ic/aic7xxx_seeprom.c || sc->signature == CFSIGNATURE2) {
sc 346 dev/ic/aic7xxx_seeprom.c if ((sc->bios_control & CFSTPWLEVEL) != 0)
sc 758 dev/ic/aic7xxx_seeprom.c verify_seeprom_cksum(struct seeprom_config *sc)
sc 765 dev/ic/aic7xxx_seeprom.c maxaddr = (sizeof(*sc)/2) - 1;
sc 767 dev/ic/aic7xxx_seeprom.c scarray = (uint16_t *)sc;
sc 772 dev/ic/aic7xxx_seeprom.c || (checksum & 0xFFFF) != sc->checksum) {
sc 83 dev/ic/am7990.c #define ifp (&sc->sc_arpcom.ac_if)
sc 127 dev/ic/am7990.c am7990_config(sc)
sc 128 dev/ic/am7990.c struct am7990_softc *sc;
sc 133 dev/ic/am7990.c am7990_stop(sc);
sc 136 dev/ic/am7990.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 137 dev/ic/am7990.c ifp->if_softc = sc;
sc 155 dev/ic/am7990.c if (sc->sc_memsize > 262144)
sc 156 dev/ic/am7990.c sc->sc_memsize = 262144;
sc 158 dev/ic/am7990.c switch (sc->sc_memsize) {
sc 160 dev/ic/am7990.c sc->sc_nrbuf = 4;
sc 161 dev/ic/am7990.c sc->sc_ntbuf = 1;
sc 164 dev/ic/am7990.c sc->sc_nrbuf = 8;
sc 165 dev/ic/am7990.c sc->sc_ntbuf = 2;
sc 168 dev/ic/am7990.c sc->sc_nrbuf = 16;
sc 169 dev/ic/am7990.c sc->sc_ntbuf = 4;
sc 172 dev/ic/am7990.c sc->sc_nrbuf = 32;
sc 173 dev/ic/am7990.c sc->sc_ntbuf = 8;
sc 176 dev/ic/am7990.c sc->sc_nrbuf = 64;
sc 177 dev/ic/am7990.c sc->sc_ntbuf = 16;
sc 180 dev/ic/am7990.c sc->sc_nrbuf = 128;
sc 181 dev/ic/am7990.c sc->sc_ntbuf = 32;
sc 184 dev/ic/am7990.c panic("am7990_config: weird memory size %lu", sc->sc_memsize);
sc 187 dev/ic/am7990.c printf(": address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 189 dev/ic/am7990.c sc->sc_dev.dv_xname, sc->sc_nrbuf, sc->sc_ntbuf);
sc 191 dev/ic/am7990.c sc->sc_sh = shutdownhook_establish(am7990_shutdown, sc);
sc 192 dev/ic/am7990.c if (sc->sc_sh == NULL)
sc 196 dev/ic/am7990.c sc->sc_initaddr = mem;
sc 198 dev/ic/am7990.c sc->sc_rmdaddr = mem;
sc 199 dev/ic/am7990.c mem += sizeof(struct lermd) * sc->sc_nrbuf;
sc 200 dev/ic/am7990.c sc->sc_tmdaddr = mem;
sc 201 dev/ic/am7990.c mem += sizeof(struct letmd) * sc->sc_ntbuf;
sc 202 dev/ic/am7990.c sc->sc_rbufaddr = mem;
sc 203 dev/ic/am7990.c mem += ETHER_MAX_DIX_LEN * sc->sc_nrbuf;
sc 204 dev/ic/am7990.c sc->sc_tbufaddr = mem;
sc 205 dev/ic/am7990.c mem += ETHER_MAX_DIX_LEN * sc->sc_ntbuf;
sc 213 dev/ic/am7990.c am7990_reset(sc)
sc 214 dev/ic/am7990.c struct am7990_softc *sc;
sc 219 dev/ic/am7990.c am7990_init(sc);
sc 227 dev/ic/am7990.c am7990_meminit(sc)
sc 228 dev/ic/am7990.c register struct am7990_softc *sc;
sc 243 dev/ic/am7990.c (sc->sc_arpcom.ac_enaddr[1] << 8) | sc->sc_arpcom.ac_enaddr[0];
sc 245 dev/ic/am7990.c (sc->sc_arpcom.ac_enaddr[3] << 8) | sc->sc_arpcom.ac_enaddr[2];
sc 247 dev/ic/am7990.c (sc->sc_arpcom.ac_enaddr[5] << 8) | sc->sc_arpcom.ac_enaddr[4];
sc 248 dev/ic/am7990.c am7990_setladrf(&sc->sc_arpcom, init.init_ladrf);
sc 250 dev/ic/am7990.c sc->sc_last_rd = 0;
sc 251 dev/ic/am7990.c sc->sc_first_td = sc->sc_last_td = sc->sc_no_td = 0;
sc 253 dev/ic/am7990.c a = sc->sc_addr + LE_RMDADDR(sc, 0);
sc 255 dev/ic/am7990.c init.init_rlen = (a >> 16) | ((ffs(sc->sc_nrbuf) - 1) << 13);
sc 257 dev/ic/am7990.c a = sc->sc_addr + LE_TMDADDR(sc, 0);
sc 259 dev/ic/am7990.c init.init_tlen = (a >> 16) | ((ffs(sc->sc_ntbuf) - 1) << 13);
sc 261 dev/ic/am7990.c (*sc->sc_copytodesc)(sc, &init, LE_INITADDR(sc), sizeof(init));
sc 266 dev/ic/am7990.c for (bix = 0; bix < sc->sc_nrbuf; bix++) {
sc 267 dev/ic/am7990.c a = sc->sc_addr + LE_RBUFADDR(sc, bix);
sc 273 dev/ic/am7990.c (*sc->sc_copytodesc)(sc, &rmd, LE_RMDADDR(sc, bix),
sc 280 dev/ic/am7990.c for (bix = 0; bix < sc->sc_ntbuf; bix++) {
sc 281 dev/ic/am7990.c a = sc->sc_addr + LE_TBUFADDR(sc, bix);
sc 287 dev/ic/am7990.c (*sc->sc_copytodesc)(sc, &tmd, LE_TMDADDR(sc, bix),
sc 293 dev/ic/am7990.c am7990_stop(sc)
sc 294 dev/ic/am7990.c struct am7990_softc *sc;
sc 297 dev/ic/am7990.c (*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_STOP);
sc 305 dev/ic/am7990.c am7990_init(sc)
sc 306 dev/ic/am7990.c register struct am7990_softc *sc;
sc 311 dev/ic/am7990.c (*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_STOP);
sc 315 dev/ic/am7990.c if (sc->sc_hwreset)
sc 316 dev/ic/am7990.c (*sc->sc_hwreset)(sc);
sc 319 dev/ic/am7990.c (*sc->sc_wrcsr)(sc, LE_CSR3, sc->sc_conf3);
sc 322 dev/ic/am7990.c am7990_meminit(sc);
sc 325 dev/ic/am7990.c a = sc->sc_addr + LE_INITADDR(sc);
sc 326 dev/ic/am7990.c (*sc->sc_wrcsr)(sc, LE_CSR1, a);
sc 327 dev/ic/am7990.c (*sc->sc_wrcsr)(sc, LE_CSR2, a >> 16);
sc 331 dev/ic/am7990.c (*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_INIT);
sc 335 dev/ic/am7990.c if ((*sc->sc_rdcsr)(sc, LE_CSR0) & LE_C0_IDON)
sc 338 dev/ic/am7990.c if ((*sc->sc_rdcsr)(sc, LE_CSR0) & LE_C0_IDON) {
sc 340 dev/ic/am7990.c (*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_INEA | LE_C0_STRT |
sc 347 dev/ic/am7990.c printf("%s: controller failed to initialize\n", sc->sc_dev.dv_xname);
sc 348 dev/ic/am7990.c if (sc->sc_hwinit)
sc 349 dev/ic/am7990.c (*sc->sc_hwinit)(sc);
sc 357 dev/ic/am7990.c am7990_put(sc, boff, m)
sc 358 dev/ic/am7990.c struct am7990_softc *sc;
sc 371 dev/ic/am7990.c (*sc->sc_copytobuf)(sc, mtod(m, caddr_t), boff, len);
sc 377 dev/ic/am7990.c (*sc->sc_zerobuf)(sc, boff, LEMINSIZE - tlen);
sc 390 dev/ic/am7990.c am7990_get(sc, boff, totlen)
sc 391 dev/ic/am7990.c struct am7990_softc *sc;
sc 429 dev/ic/am7990.c (*sc->sc_copyfrombuf)(sc, mtod(m, caddr_t), boff, len);
sc 443 dev/ic/am7990.c am7990_read(sc, boff, len)
sc 444 dev/ic/am7990.c register struct am7990_softc *sc;
sc 456 dev/ic/am7990.c sc->sc_dev.dv_xname, len);
sc 463 dev/ic/am7990.c m = am7990_get(sc, boff, len);
sc 489 dev/ic/am7990.c if (ETHER_CMP(eh->ether_dhost, sc->sc_arpcom.ac_enaddr) &&
sc 501 dev/ic/am7990.c am7990_rint(sc)
sc 502 dev/ic/am7990.c struct am7990_softc *sc;
sc 508 dev/ic/am7990.c bix = sc->sc_last_rd;
sc 512 dev/ic/am7990.c rp = LE_RMDADDR(sc, bix);
sc 513 dev/ic/am7990.c (*sc->sc_copyfromdesc)(sc, &rmd, rp, sizeof(rmd));
sc 524 dev/ic/am7990.c sc->sc_dev.dv_xname);
sc 527 dev/ic/am7990.c sc->sc_dev.dv_xname);
sc 533 dev/ic/am7990.c sc->sc_dev.dv_xname);
sc 537 dev/ic/am7990.c sc->sc_dev.dv_xname);
sc 542 dev/ic/am7990.c sc->sc_dev.dv_xname);
sc 546 dev/ic/am7990.c if (sc->sc_debug)
sc 547 dev/ic/am7990.c am7990_recv_print(sc, sc->sc_last_rd);
sc 549 dev/ic/am7990.c am7990_read(sc, LE_RBUFADDR(sc, bix),
sc 556 dev/ic/am7990.c (*sc->sc_copytodesc)(sc, &rmd, rp, sizeof(rmd));
sc 559 dev/ic/am7990.c if (sc->sc_debug)
sc 563 dev/ic/am7990.c sc->sc_last_rd,
sc 568 dev/ic/am7990.c if (++bix == sc->sc_nrbuf)
sc 572 dev/ic/am7990.c sc->sc_last_rd = bix;
sc 576 dev/ic/am7990.c am7990_tint(sc)
sc 577 dev/ic/am7990.c register struct am7990_softc *sc;
sc 582 dev/ic/am7990.c bix = sc->sc_first_td;
sc 585 dev/ic/am7990.c if (sc->sc_no_td <= 0)
sc 588 dev/ic/am7990.c (*sc->sc_copyfromdesc)(sc, &tmd, LE_TMDADDR(sc, bix),
sc 592 dev/ic/am7990.c if (sc->sc_debug)
sc 608 dev/ic/am7990.c sc->sc_dev.dv_xname);
sc 610 dev/ic/am7990.c printf("%s: underflow\n", sc->sc_dev.dv_xname);
sc 612 dev/ic/am7990.c am7990_reset(sc);
sc 616 dev/ic/am7990.c if (sc->sc_nocarrier)
sc 617 dev/ic/am7990.c (*sc->sc_nocarrier)(sc);
sc 623 dev/ic/am7990.c sc->sc_dev.dv_xname,
sc 637 dev/ic/am7990.c if (++bix == sc->sc_ntbuf)
sc 640 dev/ic/am7990.c --sc->sc_no_td;
sc 643 dev/ic/am7990.c sc->sc_first_td = bix;
sc 647 dev/ic/am7990.c if (sc->sc_no_td == 0)
sc 658 dev/ic/am7990.c register struct am7990_softc *sc = arg;
sc 661 dev/ic/am7990.c isr = (*sc->sc_rdcsr)(sc, LE_CSR0);
sc 663 dev/ic/am7990.c if (sc->sc_debug){
sc 665 dev/ic/am7990.c sc->sc_dev.dv_xname, isr);
sc 677 dev/ic/am7990.c (*sc->sc_wrcsr)(sc, LE_CSR0, isr & ~LE_C0_INEA);
sc 678 dev/ic/am7990.c (*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_INEA);
sc 683 dev/ic/am7990.c printf("%s: babble\n", sc->sc_dev.dv_xname);
sc 689 dev/ic/am7990.c printf("%s: collision error\n", sc->sc_dev.dv_xname);
sc 695 dev/ic/am7990.c printf("%s: missed packet\n", sc->sc_dev.dv_xname);
sc 700 dev/ic/am7990.c printf("%s: memory error\n", sc->sc_dev.dv_xname);
sc 701 dev/ic/am7990.c am7990_reset(sc);
sc 707 dev/ic/am7990.c printf("%s: receiver disabled\n", sc->sc_dev.dv_xname);
sc 709 dev/ic/am7990.c am7990_reset(sc);
sc 713 dev/ic/am7990.c printf("%s: transmitter disabled\n", sc->sc_dev.dv_xname);
sc 715 dev/ic/am7990.c am7990_reset(sc);
sc 720 dev/ic/am7990.c am7990_rint(sc);
sc 722 dev/ic/am7990.c am7990_tint(sc);
sc 733 dev/ic/am7990.c struct am7990_softc *sc = ifp->if_softc;
sc 735 dev/ic/am7990.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 738 dev/ic/am7990.c am7990_reset(sc);
sc 751 dev/ic/am7990.c register struct am7990_softc *sc = ifp->if_softc;
sc 761 dev/ic/am7990.c bix = sc->sc_last_td;
sc 764 dev/ic/am7990.c rp = LE_TMDADDR(sc, bix);
sc 765 dev/ic/am7990.c (*sc->sc_copyfromdesc)(sc, &tmd, rp, sizeof(tmd));
sc 770 dev/ic/am7990.c sc->sc_no_td, sc->sc_last_td);
sc 789 dev/ic/am7990.c len = am7990_put(sc, LE_TBUFADDR(sc, bix), m);
sc 805 dev/ic/am7990.c (*sc->sc_copytodesc)(sc, &tmd, rp, sizeof(tmd));
sc 808 dev/ic/am7990.c if (sc->sc_debug)
sc 809 dev/ic/am7990.c am7990_xmit_print(sc, sc->sc_last_td);
sc 812 dev/ic/am7990.c (*sc->sc_wrcsr)(sc, LE_CSR0, LE_C0_INEA | LE_C0_TDMD);
sc 814 dev/ic/am7990.c if (++bix == sc->sc_ntbuf)
sc 817 dev/ic/am7990.c if (++sc->sc_no_td == sc->sc_ntbuf) {
sc 827 dev/ic/am7990.c sc->sc_last_td = bix;
sc 839 dev/ic/am7990.c register struct am7990_softc *sc = ifp->if_softc;
sc 846 dev/ic/am7990.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 859 dev/ic/am7990.c am7990_init(sc);
sc 860 dev/ic/am7990.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 864 dev/ic/am7990.c am7990_init(sc);
sc 876 dev/ic/am7990.c am7990_stop(sc);
sc 884 dev/ic/am7990.c am7990_init(sc);
sc 891 dev/ic/am7990.c am7990_init(sc);
sc 895 dev/ic/am7990.c sc->sc_debug = 1;
sc 897 dev/ic/am7990.c sc->sc_debug = 0;
sc 904 dev/ic/am7990.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 905 dev/ic/am7990.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 913 dev/ic/am7990.c am7990_reset(sc);
sc 920 dev/ic/am7990.c if (sc->sc_hasifmedia)
sc 921 dev/ic/am7990.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, cmd);
sc 945 dev/ic/am7990.c am7990_recv_print(sc, no)
sc 946 dev/ic/am7990.c struct am7990_softc *sc;
sc 953 dev/ic/am7990.c (*sc->sc_copyfromdesc)(sc, &rmd, LE_RMDADDR(sc, no), sizeof(rmd));
sc 955 dev/ic/am7990.c printf("%s: receive buffer %d, len = %d\n", sc->sc_dev.dv_xname, no,
sc 957 dev/ic/am7990.c printf("%s: status %04x\n", sc->sc_dev.dv_xname,
sc 958 dev/ic/am7990.c (*sc->sc_rdcsr)(sc, LE_CSR0));
sc 960 dev/ic/am7990.c sc->sc_dev.dv_xname,
sc 963 dev/ic/am7990.c (*sc->sc_copyfrombuf)(sc, &eh, LE_RBUFADDR(sc, no), sizeof(eh));
sc 964 dev/ic/am7990.c printf("%s: dst %s", sc->sc_dev.dv_xname,
sc 972 dev/ic/am7990.c am7990_xmit_print(sc, no)
sc 973 dev/ic/am7990.c struct am7990_softc *sc;
sc 980 dev/ic/am7990.c (*sc->sc_copyfromdesc)(sc, &tmd, LE_TMDADDR(sc, no), sizeof(tmd));
sc 982 dev/ic/am7990.c printf("%s: transmit buffer %d, len = %d\n", sc->sc_dev.dv_xname, no,
sc 984 dev/ic/am7990.c printf("%s: status %04x\n", sc->sc_dev.dv_xname,
sc 985 dev/ic/am7990.c (*sc->sc_rdcsr)(sc, LE_CSR0));
sc 987 dev/ic/am7990.c sc->sc_dev.dv_xname,
sc 990 dev/ic/am7990.c (*sc->sc_copyfrombuf)(sc, &eh, LE_TBUFADDR(sc, no), sizeof(eh));
sc 991 dev/ic/am7990.c printf("%s: dst %s", sc->sc_dev.dv_xname,
sc 1071 dev/ic/am7990.c am7990_copytobuf_contig(sc, from, boff, len)
sc 1072 dev/ic/am7990.c struct am7990_softc *sc;
sc 1076 dev/ic/am7990.c volatile caddr_t buf = sc->sc_mem;
sc 1085 dev/ic/am7990.c am7990_copyfrombuf_contig(sc, to, boff, len)
sc 1086 dev/ic/am7990.c struct am7990_softc *sc;
sc 1090 dev/ic/am7990.c volatile caddr_t buf = sc->sc_mem;
sc 1099 dev/ic/am7990.c am7990_zerobuf_contig(sc, boff, len)
sc 1100 dev/ic/am7990.c struct am7990_softc *sc;
sc 1103 dev/ic/am7990.c volatile caddr_t buf = sc->sc_mem;
sc 1125 dev/ic/am7990.c am7990_copytobuf_gap2(sc, fromv, boff, len)
sc 1126 dev/ic/am7990.c struct am7990_softc *sc;
sc 1131 dev/ic/am7990.c volatile caddr_t buf = sc->sc_mem;
sc 1154 dev/ic/am7990.c am7990_copyfrombuf_gap2(sc, tov, boff, len)
sc 1155 dev/ic/am7990.c struct am7990_softc *sc;
sc 1159 dev/ic/am7990.c volatile caddr_t buf = sc->sc_mem;
sc 1184 dev/ic/am7990.c am7990_zerobuf_gap2(sc, boff, len)
sc 1185 dev/ic/am7990.c struct am7990_softc *sc;
sc 1188 dev/ic/am7990.c volatile caddr_t buf = sc->sc_mem;
sc 1212 dev/ic/am7990.c am7990_copytobuf_gap16(sc, fromv, boff, len)
sc 1213 dev/ic/am7990.c struct am7990_softc *sc;
sc 1218 dev/ic/am7990.c volatile caddr_t buf = sc->sc_mem;
sc 1237 dev/ic/am7990.c am7990_copyfrombuf_gap16(sc, tov, boff, len)
sc 1238 dev/ic/am7990.c struct am7990_softc *sc;
sc 1242 dev/ic/am7990.c volatile caddr_t buf = sc->sc_mem;
sc 1261 dev/ic/am7990.c am7990_zerobuf_gap16(sc, boff, len)
sc 1262 dev/ic/am7990.c struct am7990_softc *sc;
sc 1265 dev/ic/am7990.c volatile caddr_t buf = sc->sc_mem;
sc 93 dev/ic/am7990reg.h #define LE_INITADDR(sc) (sc->sc_initaddr)
sc 94 dev/ic/am7990reg.h #define LE_RMDADDR(sc, bix) (sc->sc_rmdaddr + sizeof(struct lermd) * (bix))
sc 95 dev/ic/am7990reg.h #define LE_TMDADDR(sc, bix) (sc->sc_tmdaddr + sizeof(struct letmd) * (bix))
sc 96 dev/ic/am7990reg.h #define LE_RBUFADDR(sc, bix) (sc->sc_rbufaddr + ETHER_MAX_DIX_LEN * (bix))
sc 97 dev/ic/am7990reg.h #define LE_TBUFADDR(sc, bix) (sc->sc_tbufaddr + ETHER_MAX_DIX_LEN * (bix))
sc 91 dev/ic/am79c930.c void am79c930_regdump(struct am79c930_softc *sc);
sc 135 dev/ic/am79c930.c static void io_write_1 (sc, off, val)
sc 136 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 141 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
sc 144 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
sc 146 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA, val);
sc 150 dev/ic/am79c930.c static void io_write_2 (sc, off, val)
sc 151 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 156 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
sc 159 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_LMA_LO, (off&0xff));
sc 161 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA, val & 0xff);
sc 163 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA, (val>>8)&0xff);
sc 167 dev/ic/am79c930.c static void io_write_4 (sc, off, val)
sc 168 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 173 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
sc 176 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_LMA_LO, (off&0xff));
sc 178 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,val & 0xff);
sc 180 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>8)&0xff);
sc 182 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>16)&0xff);
sc 184 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>24)&0xff);
sc 188 dev/ic/am79c930.c static void io_write_bytes (sc, off, ptr, len)
sc 189 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 197 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
sc 200 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_LMA_LO, (off&0xff));
sc 203 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,ptr[i]);
sc 206 dev/ic/am79c930.c static u_int8_t io_read_1 (sc, off)
sc 207 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 212 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
sc 215 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
sc 217 dev/ic/am79c930.c val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA);
sc 222 dev/ic/am79c930.c static u_int16_t io_read_2 (sc, off)
sc 223 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 228 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
sc 231 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
sc 233 dev/ic/am79c930.c val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA);
sc 235 dev/ic/am79c930.c val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 8;
sc 240 dev/ic/am79c930.c static u_int32_t io_read_4 (sc, off)
sc 241 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 246 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
sc 249 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
sc 251 dev/ic/am79c930.c val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA);
sc 253 dev/ic/am79c930.c val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 8;
sc 255 dev/ic/am79c930.c val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 16;
sc 257 dev/ic/am79c930.c val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 24;
sc 262 dev/ic/am79c930.c static void io_read_bytes (sc, off, ptr, len)
sc 263 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 270 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
sc 273 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
sc 276 dev/ic/am79c930.c ptr[i] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 280 dev/ic/am79c930.c static void mem_write_1 (sc, off, val)
sc 281 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 285 dev/ic/am79c930.c bus_space_write_1(sc->sc_memt, sc->sc_memh, off, val);
sc 288 dev/ic/am79c930.c static void mem_write_2 (sc, off, val)
sc 289 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 293 dev/ic/am79c930.c bus_space_tag_t t = sc->sc_memt;
sc 294 dev/ic/am79c930.c bus_space_handle_t h = sc->sc_memh;
sc 305 dev/ic/am79c930.c static void mem_write_4 (sc, off, val)
sc 306 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 310 dev/ic/am79c930.c bus_space_tag_t t = sc->sc_memt;
sc 311 dev/ic/am79c930.c bus_space_handle_t h = sc->sc_memh;
sc 324 dev/ic/am79c930.c static void mem_write_bytes (sc, off, ptr, len)
sc 325 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 330 dev/ic/am79c930.c bus_space_write_region_1 (sc->sc_memt, sc->sc_memh, off, ptr, len);
sc 334 dev/ic/am79c930.c static u_int8_t mem_read_1 (sc, off)
sc 335 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 338 dev/ic/am79c930.c return bus_space_read_1(sc->sc_memt, sc->sc_memh, off);
sc 341 dev/ic/am79c930.c static u_int16_t mem_read_2 (sc, off)
sc 342 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 347 dev/ic/am79c930.c return bus_space_read_2(sc->sc_memt, sc->sc_memh, off);
sc 350 dev/ic/am79c930.c bus_space_read_1(sc->sc_memt, sc->sc_memh, off ) |
sc 351 dev/ic/am79c930.c (bus_space_read_1(sc->sc_memt, sc->sc_memh, off+1) << 8);
sc 354 dev/ic/am79c930.c static u_int32_t mem_read_4 (sc, off)
sc 355 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 360 dev/ic/am79c930.c return bus_space_read_4(sc->sc_memt, sc->sc_memh, off);
sc 363 dev/ic/am79c930.c bus_space_read_1(sc->sc_memt, sc->sc_memh, off ) |
sc 364 dev/ic/am79c930.c (bus_space_read_1(sc->sc_memt, sc->sc_memh, off+1) << 8) |
sc 365 dev/ic/am79c930.c (bus_space_read_1(sc->sc_memt, sc->sc_memh, off+2) <<16) |
sc 366 dev/ic/am79c930.c (bus_space_read_1(sc->sc_memt, sc->sc_memh, off+3) <<24);
sc 371 dev/ic/am79c930.c static void mem_read_bytes (sc, off, ptr, len)
sc 372 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 377 dev/ic/am79c930.c bus_space_read_region_1 (sc->sc_memt, sc->sc_memh, off, ptr, len);
sc 387 dev/ic/am79c930.c void am79c930_gcr_setbits (sc, bits)
sc 388 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 391 dev/ic/am79c930.c u_int8_t gcr = bus_space_read_1 (sc->sc_iot, sc->sc_ioh, AM79C930_GCR);
sc 395 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_GCR, gcr);
sc 402 dev/ic/am79c930.c void am79c930_gcr_clearbits (sc, bits)
sc 403 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 406 dev/ic/am79c930.c u_int8_t gcr = bus_space_read_1 (sc->sc_iot, sc->sc_ioh, AM79C930_GCR);
sc 410 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_GCR, gcr);
sc 413 dev/ic/am79c930.c u_int8_t am79c930_gcr_read (sc)
sc 414 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 416 dev/ic/am79c930.c return bus_space_read_1 (sc->sc_iot, sc->sc_ioh, AM79C930_GCR);
sc 420 dev/ic/am79c930.c void am79c930_regdump (sc)
sc 421 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 428 dev/ic/am79c930.c buf[i] = bus_space_read_1 (sc->sc_iot, sc->sc_ioh, i);
sc 439 dev/ic/am79c930.c void am79c930_chip_init (sc, how)
sc 440 dev/ic/am79c930.c struct am79c930_softc *sc;
sc 443 dev/ic/am79c930.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_BSS, 0);
sc 445 dev/ic/am79c930.c sc->sc_ops = &memspace_ops;
sc 447 dev/ic/am79c930.c sc->sc_ops = &iospace_ops;
sc 68 dev/ic/am79c930var.h void am79c930_chip_init(struct am79c930_softc *sc, int);
sc 70 dev/ic/am79c930var.h void am79c930_gcr_setbits(struct am79c930_softc *sc, u_int8_t bits);
sc 71 dev/ic/am79c930var.h void am79c930_gcr_clearbits(struct am79c930_softc *sc, u_int8_t bits);
sc 73 dev/ic/am79c930var.h u_int8_t am79c930_gcr_read(struct am79c930_softc *sc);
sc 75 dev/ic/am79c930var.h #define am79c930_hard_reset(sc) am79c930_gcr_setbits(sc, AM79C930_GCR_CORESET)
sc 76 dev/ic/am79c930var.h #define am79c930_hard_reset_off(sc) am79c930_gcr_clearbits(sc, AM79C930_GCR_CORESET)
sc 141 dev/ic/ami.c int ami_start_xs(struct ami_softc *sc, struct ami_ccb *,
sc 182 dev/ic/ami.c ami_get_ccb(struct ami_softc *sc)
sc 186 dev/ic/ami.c ccb = TAILQ_FIRST(&sc->sc_ccb_freeq);
sc 188 dev/ic/ami.c TAILQ_REMOVE(&sc->sc_ccb_freeq, ccb, ccb_link);
sc 198 dev/ic/ami.c struct ami_softc *sc = ccb->ccb_sc;
sc 204 dev/ic/ami.c TAILQ_INSERT_TAIL(&sc->sc_ccb_freeq, ccb, ccb_link);
sc 208 dev/ic/ami.c ami_read(struct ami_softc *sc, bus_size_t r)
sc 212 dev/ic/ami.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
sc 214 dev/ic/ami.c rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, r);
sc 221 dev/ic/ami.c ami_write(struct ami_softc *sc, bus_size_t r, u_int32_t v)
sc 225 dev/ic/ami.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
sc 226 dev/ic/ami.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
sc 231 dev/ic/ami.c ami_allocmem(struct ami_softc *sc, size_t size)
sc 243 dev/ic/ami.c if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 247 dev/ic/ami.c if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &am->am_seg, 1,
sc 251 dev/ic/ami.c if (bus_dmamem_map(sc->sc_dmat, &am->am_seg, nsegs, size, &am->am_kva,
sc 255 dev/ic/ami.c if (bus_dmamap_load(sc->sc_dmat, am->am_map, am->am_kva, size, NULL,
sc 263 dev/ic/ami.c bus_dmamem_unmap(sc->sc_dmat, am->am_kva, size);
sc 265 dev/ic/ami.c bus_dmamem_free(sc->sc_dmat, &am->am_seg, 1);
sc 267 dev/ic/ami.c bus_dmamap_destroy(sc->sc_dmat, am->am_map);
sc 275 dev/ic/ami.c ami_freemem(struct ami_softc *sc, struct ami_mem *am)
sc 277 dev/ic/ami.c bus_dmamap_unload(sc->sc_dmat, am->am_map);
sc 278 dev/ic/ami.c bus_dmamem_unmap(sc->sc_dmat, am->am_kva, am->am_size);
sc 279 dev/ic/ami.c bus_dmamem_free(sc->sc_dmat, &am->am_seg, 1);
sc 280 dev/ic/ami.c bus_dmamap_destroy(sc->sc_dmat, am->am_map);
sc 285 dev/ic/ami.c ami_copyhds(struct ami_softc *sc, const u_int32_t *sizes,
sc 290 dev/ic/ami.c for (i = 0; i < sc->sc_nunits; i++) {
sc 291 dev/ic/ami.c sc->sc_hdr[i].hd_present = 1;
sc 292 dev/ic/ami.c sc->sc_hdr[i].hd_is_logdrv = 1;
sc 293 dev/ic/ami.c sc->sc_hdr[i].hd_size = letoh32(sizes[i]);
sc 294 dev/ic/ami.c sc->sc_hdr[i].hd_prop = props[i];
sc 295 dev/ic/ami.c sc->sc_hdr[i].hd_stat = stats[i];
sc 300 dev/ic/ami.c ami_alloc_ccbs(struct ami_softc *sc, int nccbs)
sc 306 dev/ic/ami.c sc->sc_ccbs = malloc(sizeof(struct ami_ccb) * nccbs,
sc 308 dev/ic/ami.c if (sc->sc_ccbs == NULL) {
sc 313 dev/ic/ami.c sc->sc_ccbmem_am = ami_allocmem(sc, sizeof(struct ami_ccbmem) * nccbs);
sc 314 dev/ic/ami.c if (sc->sc_ccbmem_am == NULL) {
sc 318 dev/ic/ami.c ccbmem = AMIMEM_KVA(sc->sc_ccbmem_am);
sc 320 dev/ic/ami.c TAILQ_INIT(&sc->sc_ccb_freeq);
sc 321 dev/ic/ami.c TAILQ_INIT(&sc->sc_ccb_preq);
sc 322 dev/ic/ami.c TAILQ_INIT(&sc->sc_ccb_runq);
sc 323 dev/ic/ami.c timeout_set(&sc->sc_run_tmo, ami_runqueue_tick, sc);
sc 326 dev/ic/ami.c ccb = &sc->sc_ccbs[i];
sc 329 dev/ic/ami.c error = bus_dmamap_create(sc->sc_dmat, AMI_MAXFER,
sc 337 dev/ic/ami.c ccb->ccb_sc = sc;
sc 343 dev/ic/ami.c ccb->ccb_ptpa = htole32(AMIMEM_DVA(sc->sc_ccbmem_am) +
sc 347 dev/ic/ami.c ccb->ccb_sglistpa = htole32(AMIMEM_DVA(sc->sc_ccbmem_am) +
sc 356 dev/ic/ami.c while ((ccb = ami_get_ccb(sc)) != NULL)
sc 357 dev/ic/ami.c bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap);
sc 359 dev/ic/ami.c ami_freemem(sc, sc->sc_ccbmem_am);
sc 361 dev/ic/ami.c free(sc->sc_ccbs, M_DEVBUF);
sc 367 dev/ic/ami.c ami_attach(struct ami_softc *sc)
sc 378 dev/ic/ami.c am = ami_allocmem(sc, NBPG);
sc 385 dev/ic/ami.c sc->sc_mbox_am = ami_allocmem(sc, sizeof(struct ami_iocmd));
sc 386 dev/ic/ami.c if (sc->sc_mbox_am == NULL) {
sc 390 dev/ic/ami.c sc->sc_mbox = (volatile struct ami_iocmd *)AMIMEM_KVA(sc->sc_mbox_am);
sc 391 dev/ic/ami.c sc->sc_mbox_pa = htole32(AMIMEM_DVA(sc->sc_mbox_am));
sc 392 dev/ic/ami.c AMI_DPRINTF(AMI_D_CMD, ("mbox=%p ", sc->sc_mbox));
sc 393 dev/ic/ami.c AMI_DPRINTF(AMI_D_CMD, ("mbox_pa=0x%llx ", (long long)sc->sc_mbox_pa));
sc 397 dev/ic/ami.c iccb.ccb_sc = sc;
sc 401 dev/ic/ami.c (sc->sc_init)(sc);
sc 410 dev/ic/ami.c if (ami_poll(sc, &iccb) == 0) {
sc 414 dev/ic/ami.c sc->sc_nunits = einq->ain_nlogdrv;
sc 415 dev/ic/ami.c ami_copyhds(sc, einq->ain_ldsize, einq->ain_ldprop,
sc 422 dev/ic/ami.c if (ami_poll(sc, &iccb) == 0) {
sc 423 dev/ic/ami.c sc->sc_maxunits = AMI_BIG_MAX_LDRIVES;
sc 425 dev/ic/ami.c bcopy (pi->api_fwver, sc->sc_fwver, 16);
sc 426 dev/ic/ami.c sc->sc_fwver[15] = '\0';
sc 427 dev/ic/ami.c bcopy (pi->api_biosver, sc->sc_biosver, 16);
sc 428 dev/ic/ami.c sc->sc_biosver[15] = '\0';
sc 429 dev/ic/ami.c sc->sc_channels = pi->api_channels;
sc 430 dev/ic/ami.c sc->sc_targets = pi->api_fcloops;
sc 431 dev/ic/ami.c sc->sc_memory = letoh16(pi->api_ramsize);
sc 432 dev/ic/ami.c sc->sc_maxcmds = pi->api_maxcmd;
sc 437 dev/ic/ami.c if (sc->sc_maxunits == 0) {
sc 444 dev/ic/ami.c if (ami_poll(sc, &iccb) != 0) {
sc 449 dev/ic/ami.c if (ami_poll(sc, &iccb) != 0) {
sc 456 dev/ic/ami.c sc->sc_maxunits = AMI_MAX_LDRIVES;
sc 457 dev/ic/ami.c sc->sc_nunits = inq->ain_nlogdrv;
sc 458 dev/ic/ami.c ami_copyhds(sc, inq->ain_ldsize, inq->ain_ldprop,
sc 461 dev/ic/ami.c bcopy (inq->ain_fwver, sc->sc_fwver, 4);
sc 462 dev/ic/ami.c sc->sc_fwver[4] = '\0';
sc 463 dev/ic/ami.c bcopy (inq->ain_biosver, sc->sc_biosver, 4);
sc 464 dev/ic/ami.c sc->sc_biosver[4] = '\0';
sc 465 dev/ic/ami.c sc->sc_channels = inq->ain_channels;
sc 466 dev/ic/ami.c sc->sc_targets = inq->ain_targets;
sc 467 dev/ic/ami.c sc->sc_memory = inq->ain_ramsize;
sc 468 dev/ic/ami.c sc->sc_maxcmds = inq->ain_maxcmd;
sc 472 dev/ic/ami.c if (sc->sc_flags & AMI_BROKEN) {
sc 473 dev/ic/ami.c sc->sc_link.openings = 1;
sc 474 dev/ic/ami.c sc->sc_maxcmds = 1;
sc 475 dev/ic/ami.c sc->sc_maxunits = 1;
sc 477 dev/ic/ami.c sc->sc_maxunits = AMI_BIG_MAX_LDRIVES;
sc 478 dev/ic/ami.c if (sc->sc_maxcmds > AMI_MAXCMDS)
sc 479 dev/ic/ami.c sc->sc_maxcmds = AMI_MAXCMDS;
sc 485 dev/ic/ami.c sc->sc_maxcmds -= AMI_MAXIOCTLCMDS + AMI_MAXPROCS *
sc 486 dev/ic/ami.c AMI_MAXRAWCMDS * sc->sc_channels;
sc 488 dev/ic/ami.c if (sc->sc_nunits)
sc 489 dev/ic/ami.c sc->sc_link.openings =
sc 490 dev/ic/ami.c sc->sc_maxcmds / sc->sc_nunits;
sc 492 dev/ic/ami.c sc->sc_link.openings = sc->sc_maxcmds;
sc 497 dev/ic/ami.c ami_freemem(sc, am);
sc 499 dev/ic/ami.c if (ami_alloc_ccbs(sc, AMI_MAXCMDS) != 0) {
sc 505 dev/ic/ami.c if ('A' <= sc->sc_fwver[2] && sc->sc_fwver[2] <= 'Z' &&
sc 506 dev/ic/ami.c sc->sc_fwver[1] < ' ' && sc->sc_fwver[0] < ' ' &&
sc 507 dev/ic/ami.c 'A' <= sc->sc_biosver[2] && sc->sc_biosver[2] <= 'Z' &&
sc 508 dev/ic/ami.c sc->sc_biosver[1] < ' ' && sc->sc_biosver[0] < ' ') {
sc 510 dev/ic/ami.c snprintf(sc->sc_fwver, sizeof sc->sc_fwver, "%c.%02d.%02d",
sc 511 dev/ic/ami.c sc->sc_fwver[2], sc->sc_fwver[1], sc->sc_fwver[0]);
sc 512 dev/ic/ami.c snprintf(sc->sc_biosver, sizeof sc->sc_biosver, "%c.%02d.%02d",
sc 513 dev/ic/ami.c sc->sc_biosver[2], sc->sc_biosver[1], sc->sc_biosver[0]);
sc 519 dev/ic/ami.c sc->sc_link.device = &ami_dev;
sc 520 dev/ic/ami.c sc->sc_link.adapter_softc = sc;
sc 521 dev/ic/ami.c sc->sc_link.adapter = &ami_switch;
sc 522 dev/ic/ami.c sc->sc_link.adapter_target = sc->sc_maxunits;
sc 523 dev/ic/ami.c sc->sc_link.adapter_buswidth = sc->sc_maxunits;
sc 529 dev/ic/ami.c sc->sc_fwver, sc->sc_biosver, sc->sc_memory, DEVNAME(sc),
sc 530 dev/ic/ami.c sc->sc_channels, sc->sc_targets, p, sc->sc_nunits,
sc 531 dev/ic/ami.c sc->sc_link.openings, sc->sc_maxcmds, sc->sc_flags);
sc 535 dev/ic/ami.c sc->sc_fwver, sc->sc_biosver, sc->sc_memory, DEVNAME(sc),
sc 536 dev/ic/ami.c sc->sc_channels, sc->sc_targets, p, sc->sc_nunits);
sc 539 dev/ic/ami.c if (sc->sc_flags & AMI_BROKEN && sc->sc_nunits > 1)
sc 541 dev/ic/ami.c "disk\n", DEVNAME(sc));
sc 544 dev/ic/ami.c rw_init(&sc->sc_lock, NULL);
sc 547 dev/ic/ami.c saa.saa_sc_link = &sc->sc_link;
sc 549 dev/ic/ami.c config_found(&sc->sc_dev, &saa, scsiprint);
sc 552 dev/ic/ami.c if (sc->sc_flags & AMI_BROKEN)
sc 556 dev/ic/ami.c if (bio_register(&sc->sc_dev, ami_ioctl) != 0)
sc 557 dev/ic/ami.c printf("%s: controller registration failed\n", DEVNAME(sc));
sc 559 dev/ic/ami.c sc->sc_ioctl = ami_ioctl;
sc 562 dev/ic/ami.c if (ami_create_sensors(sc) != 0)
sc 563 dev/ic/ami.c printf("%s: unable to create sensors\n", DEVNAME(sc));
sc 567 dev/ic/ami.c rsc = malloc(sizeof(struct ami_rawsoftc) * sc->sc_channels,
sc 570 dev/ic/ami.c printf("%s: no memory for raw interface\n", DEVNAME(sc));
sc 574 dev/ic/ami.c bzero(rsc, sizeof(struct ami_rawsoftc) * sc->sc_channels);
sc 575 dev/ic/ami.c for (sc->sc_rawsoftcs = rsc;
sc 576 dev/ic/ami.c rsc < &sc->sc_rawsoftcs[sc->sc_channels]; rsc++) {
sc 578 dev/ic/ami.c rsc->sc_softc = sc;
sc 579 dev/ic/ami.c rsc->sc_channel = rsc - sc->sc_rawsoftcs;
sc 592 dev/ic/ami.c config_found(&sc->sc_dev, &saa, scsiprint);
sc 598 dev/ic/ami.c ami_freemem(sc, sc->sc_mbox_am);
sc 600 dev/ic/ami.c ami_freemem(sc, am);
sc 606 dev/ic/ami.c ami_quartz_init(struct ami_softc *sc)
sc 608 dev/ic/ami.c ami_write(sc, AMI_QIDB, 0);
sc 614 dev/ic/ami.c ami_quartz_exec(struct ami_softc *sc, struct ami_iocmd *cmd)
sc 616 dev/ic/ami.c if (sc->sc_mbox->acc_busy) {
sc 621 dev/ic/ami.c memcpy((struct ami_iocmd *)sc->sc_mbox, cmd, 16);
sc 622 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, AMIMEM_MAP(sc->sc_mbox_am), 0,
sc 625 dev/ic/ami.c sc->sc_mbox->acc_busy = 1;
sc 626 dev/ic/ami.c sc->sc_mbox->acc_poll = 0;
sc 627 dev/ic/ami.c sc->sc_mbox->acc_ack = 0;
sc 629 dev/ic/ami.c ami_write(sc, AMI_QIDB, sc->sc_mbox_pa | htole32(AMI_QIDB_EXEC));
sc 635 dev/ic/ami.c ami_quartz_done(struct ami_softc *sc, struct ami_iocmd *mbox)
sc 641 dev/ic/ami.c if (ami_read(sc, AMI_QODB) != AMI_QODB_READY)
sc 644 dev/ic/ami.c ami_write(sc, AMI_QODB, AMI_QODB_READY);
sc 653 dev/ic/ami.c while ((nstat = sc->sc_mbox->acc_nstat) == 0xff) {
sc 654 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, AMIMEM_MAP(sc->sc_mbox_am), 0,
sc 660 dev/ic/ami.c sc->sc_mbox->acc_nstat = 0xff;
sc 661 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, AMIMEM_MAP(sc->sc_mbox_am), 0,
sc 668 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, AMIMEM_MAP(sc->sc_mbox_am), 0,
sc 670 dev/ic/ami.c while ((completed[n] = sc->sc_mbox->acc_cmplidl[n]) == 0xff) {
sc 675 dev/ic/ami.c sc->sc_mbox->acc_cmplidl[n] = 0xff;
sc 676 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, AMIMEM_MAP(sc->sc_mbox_am), 0,
sc 681 dev/ic/ami.c if ((status = sc->sc_mbox->acc_status) == 0xff)
sc 682 dev/ic/ami.c panic("%s: status 0xff from the firmware", DEVNAME(sc));
sc 684 dev/ic/ami.c sc->sc_mbox->acc_status = 0xff;
sc 687 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, AMIMEM_MAP(sc->sc_mbox_am), 0, 16,
sc 689 dev/ic/ami.c memcpy(mbox, (struct ami_iocmd *)sc->sc_mbox, 16);
sc 696 dev/ic/ami.c ami_write(sc, AMI_QIDB, AMI_QIDB_ACK);
sc 702 dev/ic/ami.c ami_quartz_poll(struct ami_softc *sc, struct ami_iocmd *cmd)
sc 708 dev/ic/ami.c if (sc->sc_dis_poll)
sc 712 dev/ic/ami.c while (sc->sc_mbox->acc_busy && (i < AMI_MAX_BUSYWAIT)) {
sc 716 dev/ic/ami.c if (sc->sc_mbox->acc_busy) {
sc 721 dev/ic/ami.c memcpy((struct ami_iocmd *)sc->sc_mbox, cmd, 16);
sc 722 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, AMIMEM_MAP(sc->sc_mbox_am), 0, 16,
sc 725 dev/ic/ami.c sc->sc_mbox->acc_id = 0xfe;
sc 726 dev/ic/ami.c sc->sc_mbox->acc_busy = 1;
sc 727 dev/ic/ami.c sc->sc_mbox->acc_poll = 0;
sc 728 dev/ic/ami.c sc->sc_mbox->acc_ack = 0;
sc 730 dev/ic/ami.c sc->sc_mbox->acc_nstat = 0xff;
sc 731 dev/ic/ami.c sc->sc_mbox->acc_status = 0xff;
sc 734 dev/ic/ami.c ami_write(sc, AMI_QIDB, sc->sc_mbox_pa | htole32(AMI_QIDB_EXEC));
sc 736 dev/ic/ami.c while ((sc->sc_mbox->acc_nstat == 0xff) && (i < AMI_MAX_POLLWAIT)) {
sc 742 dev/ic/ami.c DEVNAME(sc));
sc 743 dev/ic/ami.c sc->sc_dis_poll = 1;
sc 747 dev/ic/ami.c sc->sc_mbox->acc_nstat = 0xff;
sc 749 dev/ic/ami.c while ((sc->sc_mbox->acc_status == 0xff) && (i < AMI_MAX_POLLWAIT)) {
sc 754 dev/ic/ami.c printf("%s: bad status, polling disabled\n", DEVNAME(sc));
sc 755 dev/ic/ami.c sc->sc_dis_poll = 1;
sc 758 dev/ic/ami.c status = sc->sc_mbox->acc_status;
sc 759 dev/ic/ami.c sc->sc_mbox->acc_status = 0xff;
sc 762 dev/ic/ami.c while ((sc->sc_mbox->acc_poll != 0x77) && (i < AMI_MAX_POLLWAIT)) {
sc 768 dev/ic/ami.c DEVNAME(sc));
sc 769 dev/ic/ami.c sc->sc_dis_poll = 1;
sc 773 dev/ic/ami.c sc->sc_mbox->acc_poll = 0;
sc 774 dev/ic/ami.c sc->sc_mbox->acc_ack = 0x77;
sc 777 dev/ic/ami.c ami_write(sc, AMI_QIDB, sc->sc_mbox_pa | htole32(AMI_QIDB_ACK));
sc 779 dev/ic/ami.c while((ami_read(sc, AMI_QIDB) & AMI_QIDB_ACK) &&
sc 786 dev/ic/ami.c DEVNAME(sc));
sc 787 dev/ic/ami.c sc->sc_dis_poll = 1;
sc 792 dev/ic/ami.c sc->sc_mbox->acc_cmplidl[i] = 0xff;
sc 798 dev/ic/ami.c ami_schwartz_init(struct ami_softc *sc)
sc 800 dev/ic/ami.c u_int32_t a = (u_int32_t)sc->sc_mbox_pa;
sc 802 dev/ic/ami.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, AMI_SMBADDR, a);
sc 804 dev/ic/ami.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMI_SMBENA, 0);
sc 806 dev/ic/ami.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMI_SCMD, AMI_SCMD_ACK);
sc 807 dev/ic/ami.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMI_SIEM, AMI_SEIM_ENA |
sc 808 dev/ic/ami.c bus_space_read_1(sc->sc_iot, sc->sc_ioh, AMI_SIEM));
sc 814 dev/ic/ami.c ami_schwartz_exec(struct ami_softc *sc, struct ami_iocmd *cmd)
sc 816 dev/ic/ami.c if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, AMI_SMBSTAT) &
sc 822 dev/ic/ami.c memcpy((struct ami_iocmd *)sc->sc_mbox, cmd, 16);
sc 823 dev/ic/ami.c sc->sc_mbox->acc_busy = 1;
sc 824 dev/ic/ami.c sc->sc_mbox->acc_poll = 0;
sc 825 dev/ic/ami.c sc->sc_mbox->acc_ack = 0;
sc 827 dev/ic/ami.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMI_SCMD, AMI_SCMD_EXEC);
sc 832 dev/ic/ami.c ami_schwartz_done(struct ami_softc *sc, struct ami_iocmd *mbox)
sc 838 dev/ic/ami.c if (sc->sc_mbox->acc_busy)
sc 841 dev/ic/ami.c if (bus_space_read_1(sc->sc_iot, sc->sc_ioh, AMI_SMBSTAT) &
sc 845 dev/ic/ami.c stat = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AMI_ISTAT);
sc 847 dev/ic/ami.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMI_ISTAT, stat);
sc 849 dev/ic/ami.c *mbox = *sc->sc_mbox;
sc 852 dev/ic/ami.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMI_SCMD,
sc 862 dev/ic/ami.c ami_schwartz_poll(struct ami_softc *sc, struct ami_iocmd *mbox)
sc 868 dev/ic/ami.c if (sc->sc_dis_poll)
sc 872 dev/ic/ami.c if (!(bus_space_read_1(sc->sc_iot, sc->sc_ioh, AMI_SMBSTAT) &
sc 882 dev/ic/ami.c memcpy((struct ami_iocmd *)sc->sc_mbox, mbox, 16);
sc 883 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, AMIMEM_MAP(sc->sc_mbox_am), 0, 16,
sc 886 dev/ic/ami.c sc->sc_mbox->acc_busy = 1;
sc 887 dev/ic/ami.c sc->sc_mbox->acc_poll = 0;
sc 888 dev/ic/ami.c sc->sc_mbox->acc_ack = 0;
sc 890 dev/ic/ami.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMI_SCMD, AMI_SCMD_EXEC);
sc 894 dev/ic/ami.c if (!(bus_space_read_1(sc->sc_iot, sc->sc_ioh, AMI_SMBSTAT) &
sc 901 dev/ic/ami.c DEVNAME(sc));
sc 902 dev/ic/ami.c sc->sc_dis_poll = 1;
sc 908 dev/ic/ami.c status = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AMI_ISTAT);
sc 915 dev/ic/ami.c DEVNAME(sc));
sc 916 dev/ic/ami.c sc->sc_dis_poll = 1;
sc 921 dev/ic/ami.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMI_ISTAT, status);
sc 924 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, AMIMEM_MAP(sc->sc_mbox_am), 0,
sc 926 dev/ic/ami.c *mbox = *sc->sc_mbox;
sc 927 dev/ic/ami.c rv = sc->sc_mbox->acc_status;
sc 930 dev/ic/ami.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMI_SCMD, AMI_SCMD_ACK);
sc 936 dev/ic/ami.c ami_start_xs(struct ami_softc *sc, struct ami_ccb *ccb, struct scsi_xfer *xs)
sc 941 dev/ic/ami.c ami_complete(sc, ccb, xs->timeout);
sc 946 dev/ic/ami.c ami_start(sc, ccb);
sc 952 dev/ic/ami.c ami_start(struct ami_softc *sc, struct ami_ccb *ccb)
sc 958 dev/ic/ami.c TAILQ_INSERT_TAIL(&sc->sc_ccb_preq, ccb, ccb_link);
sc 959 dev/ic/ami.c ami_runqueue(sc);
sc 966 dev/ic/ami.c struct ami_softc *sc = arg;
sc 970 dev/ic/ami.c ami_runqueue(sc);
sc 975 dev/ic/ami.c ami_runqueue(struct ami_softc *sc)
sc 979 dev/ic/ami.c while ((ccb = TAILQ_FIRST(&sc->sc_ccb_preq)) != NULL) {
sc 980 dev/ic/ami.c if (sc->sc_exec(sc, &ccb->ccb_cmd) != 0) {
sc 982 dev/ic/ami.c timeout_add(&sc->sc_run_tmo, 1);
sc 986 dev/ic/ami.c TAILQ_REMOVE(&sc->sc_ccb_preq, ccb, ccb_link);
sc 988 dev/ic/ami.c TAILQ_INSERT_TAIL(&sc->sc_ccb_runq, ccb, ccb_link);
sc 993 dev/ic/ami.c ami_poll(struct ami_softc *sc, struct ami_ccb *ccb)
sc 1004 dev/ic/ami.c error = sc->sc_poll(sc, &ccb->ccb_cmd);
sc 1008 dev/ic/ami.c ccb->ccb_done(sc, ccb);
sc 1015 dev/ic/ami.c ami_complete(struct ami_softc *sc, struct ami_ccb *ccb, int timeout)
sc 1028 dev/ic/ami.c if (sc->sc_exec(sc, &ccb->ccb_cmd) == 0) {
sc 1030 dev/ic/ami.c TAILQ_INSERT_TAIL(&sc->sc_ccb_runq, ccb, ccb_link);
sc 1042 dev/ic/ami.c if (sc->sc_done(sc, &mbox) != 0) {
sc 1045 dev/ic/ami.c ami_done(sc, ready);
sc 1057 dev/ic/ami.c printf("%s: timeout ccb %d\n", DEVNAME(sc),
sc 1059 dev/ic/ami.c TAILQ_REMOVE(&sc->sc_ccb_runq, ccb, ccb_link);
sc 1064 dev/ic/ami.c ami_runqueue(sc);
sc 1073 dev/ic/ami.c ccb->ccb_done(sc, ccb);
sc 1081 dev/ic/ami.c struct ami_softc *sc = ccb->ccb_sc;
sc 1089 dev/ic/ami.c TAILQ_REMOVE(&sc->sc_ccb_preq, ccb, ccb_link);
sc 1091 dev/ic/ami.c ccb->ccb_done(sc, ccb);
sc 1101 dev/ic/ami.c "state\n", DEVNAME(sc), cmd->acc_id));
sc 1105 dev/ic/ami.c panic("%s: ami_stimeout(%d) botch", DEVNAME(sc), cmd->acc_id);
sc 1112 dev/ic/ami.c ami_done(struct ami_softc *sc, int idx)
sc 1114 dev/ic/ami.c struct ami_ccb *ccb = &sc->sc_ccbs[idx - 1];
sc 1120 dev/ic/ami.c DEVNAME(sc), idx, ccb->ccb_state);
sc 1125 dev/ic/ami.c TAILQ_REMOVE(&sc->sc_ccb_runq, ccb, ccb_link);
sc 1127 dev/ic/ami.c ccb->ccb_done(sc, ccb);
sc 1133 dev/ic/ami.c ami_done_pt(struct ami_softc *sc, struct ami_ccb *ccb)
sc 1140 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, AMIMEM_MAP(sc->sc_ccbmem_am),
sc 1145 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
sc 1150 dev/ic/ami.c bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap);
sc 1173 dev/ic/ami.c ami_done_xs(struct ami_softc *sc, struct ami_ccb *ccb)
sc 1178 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
sc 1183 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, AMIMEM_MAP(sc->sc_ccbmem_am),
sc 1187 dev/ic/ami.c bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap);
sc 1202 dev/ic/ami.c ami_done_flush(struct ami_softc *sc, struct ami_ccb *ccb)
sc 1222 dev/ic/ami.c ami_start_xs(sc, ccb, xs);
sc 1226 dev/ic/ami.c ami_done_sysflush(struct ami_softc *sc, struct ami_ccb *ccb)
sc 1241 dev/ic/ami.c ami_done_ioctl(struct ami_softc *sc, struct ami_ccb *ccb)
sc 1247 dev/ic/ami.c ami_done_init(struct ami_softc *sc, struct ami_ccb *ccb)
sc 1280 dev/ic/ami.c struct ami_softc *sc = rsc->sc_softc;
sc 1308 dev/ic/ami.c ccb = ami_get_ccb(sc);
sc 1335 dev/ic/ami.c if (ami_load_ptmem(sc, ccb, xs->data, xs->datalen,
sc 1345 dev/ic/ami.c return (ami_start_xs(sc, ccb, xs));
sc 1349 dev/ic/ami.c ami_load_ptmem(struct ami_softc *sc, struct ami_ccb *ccb, void *data,
sc 1357 dev/ic/ami.c error = bus_dmamap_load(sc->sc_dmat, dmap, data, len, NULL,
sc 1385 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize,
sc 1389 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, AMIMEM_MAP(sc->sc_ccbmem_am),
sc 1400 dev/ic/ami.c struct ami_softc *sc = link->adapter_softc;
sc 1418 dev/ic/ami.c if (target >= sc->sc_nunits || !sc->sc_hdr[target].hd_present ||
sc 1443 dev/ic/ami.c ccb = ami_get_ccb(sc);
sc 1461 dev/ic/ami.c return (ami_start_xs(sc, ccb, xs));
sc 1466 dev/ic/ami.c strlcpy(sc->sc_hdr[target].dev, dev->dv_xname,
sc 1467 dev/ic/ami.c sizeof(sc->sc_hdr[target].dev));
sc 1512 dev/ic/ami.c _lto4b(sc->sc_hdr[target].hd_size - 1, rcd.addr);
sc 1541 dev/ic/ami.c if (blockno >= sc->sc_hdr[target].hd_size ||
sc 1542 dev/ic/ami.c blockno + blockcnt > sc->sc_hdr[target].hd_size) {
sc 1543 dev/ic/ami.c printf("%s: out of bounds %u-%u >= %u\n", DEVNAME(sc),
sc 1544 dev/ic/ami.c blockno, blockcnt, sc->sc_hdr[target].hd_size);
sc 1553 dev/ic/ami.c ccb = ami_get_ccb(sc);
sc 1572 dev/ic/ami.c error = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap,
sc 1605 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, AMIMEM_MAP(sc->sc_ccbmem_am),
sc 1609 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
sc 1613 dev/ic/ami.c return (ami_start_xs(sc, ccb, xs));
sc 1619 dev/ic/ami.c struct ami_softc *sc = v;
sc 1623 dev/ic/ami.c if (TAILQ_EMPTY(&sc->sc_ccb_runq))
sc 1628 dev/ic/ami.c while ((sc->sc_done)(sc, &mbox)) {
sc 1635 dev/ic/ami.c if (!ami_done(sc, ready))
sc 1641 dev/ic/ami.c ami_runqueue(sc);
sc 1651 dev/ic/ami.c struct ami_softc *sc = (struct ami_softc *)link->adapter_softc;
sc 1655 dev/ic/ami.c if (sc->sc_ioctl)
sc 1656 dev/ic/ami.c return (sc->sc_ioctl(link->adapter_softc, cmd, addr));
sc 1665 dev/ic/ami.c struct ami_softc *sc = (struct ami_softc *)dev;
sc 1668 dev/ic/ami.c AMI_DPRINTF(AMI_D_IOCTL, ("%s: ioctl ", DEVNAME(sc)));
sc 1670 dev/ic/ami.c if (sc->sc_flags & AMI_BROKEN)
sc 1676 dev/ic/ami.c error = ami_ioctl_inq(sc, (struct bioc_inq *)addr);
sc 1681 dev/ic/ami.c error = ami_ioctl_vol(sc, (struct bioc_vol *)addr);
sc 1686 dev/ic/ami.c error = ami_ioctl_disk(sc, (struct bioc_disk *)addr);
sc 1691 dev/ic/ami.c error = ami_ioctl_alarm(sc, (struct bioc_alarm *)addr);
sc 1696 dev/ic/ami.c error = ami_ioctl_setstate(sc, (struct bioc_setstate *)addr);
sc 1708 dev/ic/ami.c ami_drv_inq(struct ami_softc *sc, u_int8_t ch, u_int8_t tg, u_int8_t page,
sc 1717 dev/ic/ami.c rw_enter_write(&sc->sc_lock);
sc 1720 dev/ic/ami.c ccb = ami_get_ccb(sc);
sc 1753 dev/ic/ami.c if (ami_load_ptmem(sc, ccb, inqbuf, sizeof(struct scsi_inquiry_data),
sc 1759 dev/ic/ami.c ami_start(sc, ccb);
sc 1764 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
sc 1766 dev/ic/ami.c bus_dmamap_sync(sc->sc_dmat, AMIMEM_MAP(sc->sc_ccbmem_am),
sc 1769 dev/ic/ami.c bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap);
sc 1784 dev/ic/ami.c rw_exit_write(&sc->sc_lock);
sc 1789 dev/ic/ami.c ami_mgmt(struct ami_softc *sc, u_int8_t opcode, u_int8_t par1, u_int8_t par2,
sc 1799 dev/ic/ami.c rw_enter_write(&sc->sc_lock);
sc 1802 dev/ic/ami.c ccb = ami_get_ccb(sc);
sc 1810 dev/ic/ami.c if ((am = ami_allocmem(sc, size)) == NULL) {
sc 1839 dev/ic/ami.c ami_start(sc, ccb);
sc 1849 dev/ic/ami.c ami_freemem(sc, am);
sc 1857 dev/ic/ami.c rw_exit_write(&sc->sc_lock);
sc 1862 dev/ic/ami.c ami_ioctl_inq(struct ami_softc *sc, struct bioc_inq *bi)
sc 1882 dev/ic/ami.c if ((error = ami_mgmt(sc, AMI_FCOP, AMI_FC_RDCONF, 0, 0, sizeof *p,
sc 1891 dev/ic/ami.c strlcpy(bi->bi_dev, DEVNAME(sc), sizeof(bi->bi_dev));
sc 1914 dev/ic/ami.c for(i = 0; i < ((sc->sc_flags & AMI_QUARTZ) ?
sc 1928 dev/ic/ami.c if (!ami_drv_inq(sc, ch, tg, 0, &inqbuf)) {
sc 1945 dev/ic/ami.c ami_vol(struct ami_softc *sc, struct bioc_vol *bv, struct ami_big_diskarray *p)
sc 1971 dev/ic/ami.c for(i = 0; i < ((sc->sc_flags & AMI_QUARTZ) ?
sc 1985 dev/ic/ami.c if (!ami_drv_inq(sc, ch, tg, 0, &inqbuf)) {
sc 1996 dev/ic/ami.c sc->sc_hdr[bv->bv_volid].dev,
sc 2018 dev/ic/ami.c ami_disk(struct ami_softc *sc, struct bioc_disk *bd,
sc 2046 dev/ic/ami.c for(i = 0; i < ((sc->sc_flags & AMI_QUARTZ) ?
sc 2065 dev/ic/ami.c if (ami_drv_inq(sc, ch, tg, 0, &inqbuf))
sc 2078 dev/ic/ami.c if (!ami_drv_inq(sc, ch, tg, 0x80, &vpdbuf)) {
sc 2095 dev/ic/ami.c strlcpy(bd->bd_procdev, sc->sc_rawsoftcs[ch].sc_procdev,
sc 2120 dev/ic/ami.c ami_ioctl_vol(struct ami_softc *sc, struct bioc_vol *bv)
sc 2132 dev/ic/ami.c if ((error = ami_mgmt(sc, AMI_FCOP, AMI_FC_RDCONF, 0, 0, sizeof *p, p)))
sc 2136 dev/ic/ami.c error = ami_vol(sc, bv, p);
sc 2157 dev/ic/ami.c if (ami_mgmt(sc, AMI_MISC, AMI_GET_BGI, 0, 0, sizeof bgi, &bgi))
sc 2163 dev/ic/ami.c if (!ami_mgmt(sc, AMI_GCHECKPROGR, i, 0, 0, sizeof perc, &perc))
sc 2187 dev/ic/ami.c if (ami_mgmt(sc, AMI_GRBLDPROGR,
sc 2232 dev/ic/ami.c strlcpy(bv->bv_dev, sc->sc_hdr[i].dev, sizeof(bv->bv_dev));
sc 2241 dev/ic/ami.c ami_ioctl_disk(struct ami_softc *sc, struct bioc_disk *bd)
sc 2255 dev/ic/ami.c if ((error = ami_mgmt(sc, AMI_FCOP, AMI_FC_RDCONF, 0, 0, sizeof *p, p)))
sc 2259 dev/ic/ami.c error = ami_disk(sc, bd, p);
sc 2308 dev/ic/ami.c if (!ami_drv_inq(sc, ch, tg, 0, &inqbuf)) {
sc 2318 dev/ic/ami.c if (!ami_drv_inq(sc, ch, tg, 0x80, &vpdbuf)) {
sc 2333 dev/ic/ami.c strlcpy(bd->bd_procdev, sc->sc_rawsoftcs[ch].sc_procdev,
sc 2347 dev/ic/ami.c int ami_ioctl_alarm(struct ami_softc *sc, struct bioc_alarm *ba)
sc 2375 dev/ic/ami.c DEVNAME(sc), ba->ba_opcode));
sc 2379 dev/ic/ami.c if (!(error = ami_mgmt(sc, AMI_SPEAKER, func, 0, 0, sizeof ret,
sc 2391 dev/ic/ami.c ami_ioctl_setstate(struct ami_softc *sc, struct bioc_setstate *bs)
sc 2408 dev/ic/ami.c if (ami_drv_inq(sc, bs->bs_channel, bs->bs_target, 0,
sc 2417 dev/ic/ami.c , DEVNAME(sc), bs->bs_status));
sc 2421 dev/ic/ami.c if ((error = ami_mgmt(sc, AMI_CHSTATE, bs->bs_channel, bs->bs_target,
sc 2430 dev/ic/ami.c ami_create_sensors(struct ami_softc *sc)
sc 2437 dev/ic/ami.c if (dev->dv_parent != &sc->sc_dev)
sc 2442 dev/ic/ami.c if (ssc->adapter_link == &sc->sc_link)
sc 2449 dev/ic/ami.c sc->sc_sensors = malloc(sizeof(struct ksensor) * sc->sc_nunits,
sc 2451 dev/ic/ami.c if (sc->sc_sensors == NULL)
sc 2453 dev/ic/ami.c bzero(sc->sc_sensors, sizeof(struct ksensor) * sc->sc_nunits);
sc 2455 dev/ic/ami.c strlcpy(sc->sc_sensordev.xname, DEVNAME(sc),
sc 2456 dev/ic/ami.c sizeof(sc->sc_sensordev.xname));
sc 2458 dev/ic/ami.c for (i = 0; i < sc->sc_nunits; i++) {
sc 2464 dev/ic/ami.c sc->sc_sensors[i].type = SENSOR_DRIVE;
sc 2465 dev/ic/ami.c sc->sc_sensors[i].status = SENSOR_S_UNKNOWN;
sc 2467 dev/ic/ami.c strlcpy(sc->sc_sensors[i].desc, dev->dv_xname,
sc 2468 dev/ic/ami.c sizeof(sc->sc_sensors[i].desc));
sc 2470 dev/ic/ami.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensors[i]);
sc 2473 dev/ic/ami.c sc->sc_bd = malloc(sizeof(*sc->sc_bd), M_DEVBUF, M_WAITOK);
sc 2474 dev/ic/ami.c if (sc->sc_bd == NULL)
sc 2477 dev/ic/ami.c if (sensor_task_register(sc, ami_refresh_sensors, 10) == NULL)
sc 2480 dev/ic/ami.c sensordev_install(&sc->sc_sensordev);
sc 2485 dev/ic/ami.c free(sc->sc_bd, M_DEVBUF);
sc 2487 dev/ic/ami.c free(sc->sc_sensors, M_DEVBUF);
sc 2495 dev/ic/ami.c struct ami_softc *sc = arg;
sc 2498 dev/ic/ami.c if (ami_mgmt(sc, AMI_FCOP, AMI_FC_RDCONF, 0, 0, sizeof(*sc->sc_bd),
sc 2499 dev/ic/ami.c sc->sc_bd)) {
sc 2500 dev/ic/ami.c for (i = 0; i < sc->sc_nunits; i++) {
sc 2501 dev/ic/ami.c sc->sc_sensors[i].value = 0; /* unknown */
sc 2502 dev/ic/ami.c sc->sc_sensors[i].status = SENSOR_S_UNKNOWN;
sc 2507 dev/ic/ami.c for (i = 0; i < sc->sc_nunits; i++) {
sc 2508 dev/ic/ami.c switch (sc->sc_bd->ald[i].adl_status) {
sc 2510 dev/ic/ami.c sc->sc_sensors[i].value = SENSOR_DRIVE_FAIL;
sc 2511 dev/ic/ami.c sc->sc_sensors[i].status = SENSOR_S_CRIT;
sc 2515 dev/ic/ami.c sc->sc_sensors[i].value = SENSOR_DRIVE_PFAIL;
sc 2516 dev/ic/ami.c sc->sc_sensors[i].status = SENSOR_S_WARN;
sc 2520 dev/ic/ami.c sc->sc_sensors[i].value = SENSOR_DRIVE_ONLINE;
sc 2521 dev/ic/ami.c sc->sc_sensors[i].status = SENSOR_S_OK;
sc 2525 dev/ic/ami.c sc->sc_sensors[i].value = 0; /* unknown */
sc 2526 dev/ic/ami.c sc->sc_sensors[i].status = SENSOR_S_UNKNOWN;
sc 62 dev/ic/amivar.h void (*ccb_done)(struct ami_softc *sc,
sc 98 dev/ic/amivar.h int (*sc_init)(struct ami_softc *sc);
sc 99 dev/ic/amivar.h int (*sc_exec)(struct ami_softc *sc,
sc 101 dev/ic/amivar.h int (*sc_done)(struct ami_softc *sc,
sc 103 dev/ic/amivar.h int (*sc_poll)(struct ami_softc *sc,
sc 149 dev/ic/amivar.h int ami_attach(struct ami_softc *sc);
sc 152 dev/ic/amivar.h int ami_quartz_init(struct ami_softc *sc);
sc 153 dev/ic/amivar.h int ami_quartz_exec(struct ami_softc *sc, struct ami_iocmd *);
sc 154 dev/ic/amivar.h int ami_quartz_done(struct ami_softc *sc, struct ami_iocmd *);
sc 155 dev/ic/amivar.h int ami_quartz_poll(struct ami_softc *sc, struct ami_iocmd *);
sc 157 dev/ic/amivar.h int ami_schwartz_init(struct ami_softc *sc);
sc 158 dev/ic/amivar.h int ami_schwartz_exec(struct ami_softc *sc, struct ami_iocmd *);
sc 159 dev/ic/amivar.h int ami_schwartz_done(struct ami_softc *sc, struct ami_iocmd *);
sc 160 dev/ic/amivar.h int ami_schwartz_poll(struct ami_softc *sc, struct ami_iocmd *);
sc 183 dev/ic/an.c an_attach(struct an_softc *sc)
sc 185 dev/ic/an.c struct ieee80211com *ic = &sc->sc_ic;
sc 192 dev/ic/an.c sc->sc_invalid = 0;
sc 195 dev/ic/an.c CSR_WRITE_2(sc, AN_INT_EN, 0);
sc 196 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, 0xffff);
sc 199 dev/ic/an.c if (an_reset(sc) != 0) {
sc 200 dev/ic/an.c sc->sc_invalid = 1;
sc 205 dev/ic/an.c if (an_cmd(sc, AN_CMD_READCFG, 0) != 0) {
sc 207 dev/ic/an.c sc->sc_dev.dv_xname);
sc 212 dev/ic/an.c buflen = sizeof(sc->sc_config);
sc 213 dev/ic/an.c if (an_read_rid(sc, AN_RID_GENCONFIG, &sc->sc_config, &buflen) != 0) {
sc 214 dev/ic/an.c printf("%s: read config failed\n", sc->sc_dev.dv_xname);
sc 218 dev/ic/an.c an_swap16((u_int16_t *)&sc->sc_config.an_macaddr, 3);
sc 221 dev/ic/an.c buflen = sizeof(sc->sc_caps);
sc 222 dev/ic/an.c if (an_read_rid(sc, AN_RID_CAPABILITIES, &sc->sc_caps, &buflen) != 0) {
sc 223 dev/ic/an.c printf("%s: read caps failed\n", sc->sc_dev.dv_xname);
sc 227 dev/ic/an.c an_swap16((u_int16_t *)&sc->sc_caps.an_oemaddr, 3);
sc 228 dev/ic/an.c an_swap16((u_int16_t *)&sc->sc_caps.an_rates, 4);
sc 231 dev/ic/an.c akey = &sc->sc_buf.sc_wepkey;
sc 234 dev/ic/an.c while (an_read_rid(sc, rid, akey, &buflen) == 0) {
sc 243 dev/ic/an.c sc->sc_tx_perskey = akey->an_mac_addr[0];
sc 244 dev/ic/an.c sc->sc_tx_key = -1;
sc 249 dev/ic/an.c sc->sc_perskeylen[kid] = akey->an_key_len;
sc 250 dev/ic/an.c sc->sc_wepkeys[kid].an_wep_keylen = -1;
sc 255 dev/ic/an.c IEEE80211_ADDR_COPY(ic->ic_myaddr, sc->sc_caps.an_oemaddr);
sc 256 dev/ic/an.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 259 dev/ic/an.c sc->sc_caps.an_fwrev >> 8,
sc 260 dev/ic/an.c sc->sc_caps.an_fwrev & 0xff,
sc 261 dev/ic/an.c sc->sc_caps.an_fwsubrev);
sc 263 dev/ic/an.c if (sc->sc_config.an_radiotype & AN_RADIOTYPE_80211_FH)
sc 265 dev/ic/an.c else if (sc->sc_config.an_radiotype & AN_RADIOTYPE_80211_DS)
sc 267 dev/ic/an.c else if (sc->sc_config.an_radiotype & AN_RADIOTYPE_LM2000_DS)
sc 270 dev/ic/an.c printf("unknown (%x)", sc->sc_config.an_radiotype);
sc 274 dev/ic/an.c ifp->if_softc = sc;
sc 287 dev/ic/an.c IEEE80211_ADDR_COPY(ic->ic_myaddr, sc->sc_caps.an_oemaddr);
sc 289 dev/ic/an.c switch (sc->sc_caps.an_regdomain) {
sc 315 dev/ic/an.c for (i = 0; i < sizeof(sc->sc_caps.an_rates); i++) {
sc 316 dev/ic/an.c if (sc->sc_caps.an_rates[i] == 0)
sc 320 dev/ic/an.c sc->sc_caps.an_rates[i];
sc 329 dev/ic/an.c sc->sc_newstate = ic->ic_newstate;
sc 335 dev/ic/an.c bzero(&sc->sc_rxtapu, sizeof(sc->sc_rxtapu));
sc 336 dev/ic/an.c sc->sc_rxtap.ar_ihdr.it_len = sizeof(sc->sc_rxtapu);
sc 337 dev/ic/an.c sc->sc_rxtap.ar_ihdr.it_present = AN_RX_RADIOTAP_PRESENT;
sc 339 dev/ic/an.c bzero(&sc->sc_txtapu, sizeof(sc->sc_txtapu));
sc 340 dev/ic/an.c sc->sc_txtap.at_ihdr.it_len = sizeof(sc->sc_txtapu);
sc 341 dev/ic/an.c sc->sc_txtap.at_ihdr.it_present = AN_TX_RADIOTAP_PRESENT;
sc 343 dev/ic/an.c bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
sc 347 dev/ic/an.c sc->sc_sdhook = shutdownhook_establish(an_shutdown, sc);
sc 349 dev/ic/an.c sc->sc_attached = 1;
sc 355 dev/ic/an.c an_rxeof(struct an_softc *sc)
sc 357 dev/ic/an.c struct ieee80211com *ic = &sc->sc_ic;
sc 367 dev/ic/an.c fid = CSR_READ_2(sc, AN_RX_FID);
sc 370 dev/ic/an.c if (an_read_bap(sc, fid, 0, &frmhdr, sizeof(frmhdr), sizeof(frmhdr)) != 0) {
sc 371 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, AN_EV_RX);
sc 381 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, AN_EV_RX);
sc 393 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, AN_EV_RX);
sc 403 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, AN_EV_RX);
sc 411 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, AN_EV_RX);
sc 423 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, AN_EV_RX);
sc 440 dev/ic/an.c an_read_bap(sc, fid, -1, gap, gaplen + sizeof(u_int16_t),
sc 445 dev/ic/an.c an_read_bap(sc, fid, -1,
sc 453 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, AN_EV_RX);
sc 456 dev/ic/an.c if (sc->sc_drvbpf) {
sc 458 dev/ic/an.c struct an_rx_radiotap_header *tap = &sc->sc_rxtap;
sc 467 dev/ic/an.c mb.m_len = sizeof(sc->sc_rxtapu);
sc 472 dev/ic/an.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
sc 492 dev/ic/an.c an_txeof(struct an_softc *sc, u_int16_t status)
sc 494 dev/ic/an.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 497 dev/ic/an.c sc->sc_tx_timer = 0;
sc 500 dev/ic/an.c id = CSR_READ_2(sc, AN_TX_CMP_FID);
sc 501 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, status & (AN_EV_TX | AN_EV_TX_EXC));
sc 508 dev/ic/an.c cur = sc->sc_txcur;
sc 509 dev/ic/an.c if (sc->sc_txd[cur].d_fid == id) {
sc 510 dev/ic/an.c sc->sc_txd[cur].d_inuse = 0;
sc 513 dev/ic/an.c sc->sc_txcur = cur;
sc 516 dev/ic/an.c if (id == sc->sc_txd[cur].d_fid) {
sc 517 dev/ic/an.c sc->sc_txd[cur].d_inuse = 0;
sc 524 dev/ic/an.c sc->sc_dev.dv_xname,
sc 525 dev/ic/an.c sc->sc_txd[sc->sc_txcur].d_fid, sc->sc_txcur,
sc 533 dev/ic/an.c struct an_softc *sc = arg;
sc 534 dev/ic/an.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 538 dev/ic/an.c if (!sc->sc_enabled || sc->sc_invalid ||
sc 539 dev/ic/an.c (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0 ||
sc 544 dev/ic/an.c CSR_WRITE_2(sc, AN_INT_EN, 0);
sc 545 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, ~0);
sc 551 dev/ic/an.c if (!sc->sc_enabled || sc->sc_invalid)
sc 553 dev/ic/an.c if (CSR_READ_2(sc, AN_SW0) != AN_MAGIC) {
sc 555 dev/ic/an.c CSR_READ_2(sc, AN_SW0)));
sc 556 dev/ic/an.c sc->sc_invalid = 1;
sc 559 dev/ic/an.c status = CSR_READ_2(sc, AN_EVENT_STAT);
sc 560 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, status & ~(AN_INTRS));
sc 565 dev/ic/an.c an_rxeof(sc);
sc 568 dev/ic/an.c an_txeof(sc, status);
sc 571 dev/ic/an.c an_linkstat_intr(sc);
sc 574 dev/ic/an.c sc->sc_ic.ic_state == IEEE80211_S_RUN &&
sc 584 dev/ic/an.c an_cmd(struct an_softc *sc, int cmd, int val)
sc 589 dev/ic/an.c if (CSR_READ_2(sc, AN_COMMAND) & AN_CMD_BUSY) {
sc 590 dev/ic/an.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 591 dev/ic/an.c printf("%s: command 0x%x busy\n", sc->sc_dev.dv_xname,
sc 592 dev/ic/an.c CSR_READ_2(sc, AN_COMMAND));
sc 593 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, AN_EV_CLR_STUCK_BUSY);
sc 596 dev/ic/an.c CSR_WRITE_2(sc, AN_PARAM0, val);
sc 597 dev/ic/an.c CSR_WRITE_2(sc, AN_PARAM1, 0);
sc 598 dev/ic/an.c CSR_WRITE_2(sc, AN_PARAM2, 0);
sc 599 dev/ic/an.c CSR_WRITE_2(sc, AN_COMMAND, cmd);
sc 607 dev/ic/an.c if (CSR_READ_2(sc, AN_EVENT_STAT) & AN_EV_CMD)
sc 612 dev/ic/an.c stat = CSR_READ_2(sc, AN_STATUS);
sc 615 dev/ic/an.c if (CSR_READ_2(sc, AN_COMMAND) & AN_CMD_BUSY)
sc 616 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, AN_EV_CLR_STUCK_BUSY);
sc 619 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, AN_EV_CMD);
sc 622 dev/ic/an.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 624 dev/ic/an.c sc->sc_dev.dv_xname, cmd, val);
sc 628 dev/ic/an.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 631 dev/ic/an.c sc->sc_dev.dv_xname, cmd, val, stat,
sc 632 dev/ic/an.c CSR_READ_2(sc, AN_RESP0), CSR_READ_2(sc, AN_RESP1),
sc 633 dev/ic/an.c CSR_READ_2(sc, AN_RESP2));
sc 641 dev/ic/an.c an_reset(struct an_softc *sc)
sc 646 dev/ic/an.c if (!sc->sc_enabled)
sc 649 dev/ic/an.c an_cmd(sc, AN_CMD_ENABLE, 0);
sc 650 dev/ic/an.c an_cmd(sc, AN_CMD_FW_RESTART, 0);
sc 651 dev/ic/an.c an_cmd(sc, AN_CMD_NOOP2, 0);
sc 653 dev/ic/an.c if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT) {
sc 654 dev/ic/an.c printf("%s: reset failed\n", sc->sc_dev.dv_xname);
sc 658 dev/ic/an.c an_cmd(sc, AN_CMD_DISABLE, 0);
sc 663 dev/ic/an.c an_linkstat_intr(struct an_softc *sc)
sc 665 dev/ic/an.c struct ieee80211com *ic = &sc->sc_ic;
sc 668 dev/ic/an.c status = CSR_READ_2(sc, AN_LINKSTAT);
sc 669 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, AN_EV_LINKSTAT);
sc 686 dev/ic/an.c an_wait(struct an_softc *sc)
sc 690 dev/ic/an.c CSR_WRITE_2(sc, AN_COMMAND, AN_CMD_NOOP2);
sc 692 dev/ic/an.c if (CSR_READ_2(sc, AN_EVENT_STAT) & AN_EV_CMD)
sc 694 dev/ic/an.c (void)tsleep(sc, PWAIT, "anatch", 1);
sc 696 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, AN_EV_CMD);
sc 700 dev/ic/an.c an_read_bap(struct an_softc *sc, int id, int off, void *buf, int len, int blen)
sc 707 dev/ic/an.c off = sc->sc_bap_off;
sc 708 dev/ic/an.c if (id != sc->sc_bap_id || off != sc->sc_bap_off) {
sc 709 dev/ic/an.c if ((error = an_seek_bap(sc, id, off)) != 0)
sc 714 dev/ic/an.c CSR_READ_MULTI_STREAM_2(sc, AN_DATA0, (u_int16_t *)buf, cnt);
sc 716 dev/ic/an.c (void) CSR_READ_2(sc, AN_DATA0);
sc 717 dev/ic/an.c sc->sc_bap_off += cnt * 2;
sc 723 dev/ic/an.c an_write_bap(struct an_softc *sc, int id, int off, void *buf, int buflen)
sc 730 dev/ic/an.c off = sc->sc_bap_off;
sc 731 dev/ic/an.c if (id != sc->sc_bap_id || off != sc->sc_bap_off) {
sc 732 dev/ic/an.c if ((error = an_seek_bap(sc, id, off)) != 0)
sc 737 dev/ic/an.c CSR_WRITE_MULTI_STREAM_2(sc, AN_DATA0, (u_int16_t *)buf, cnt);
sc 738 dev/ic/an.c sc->sc_bap_off += cnt * 2;
sc 743 dev/ic/an.c an_seek_bap(struct an_softc *sc, int id, int off)
sc 747 dev/ic/an.c CSR_WRITE_2(sc, AN_SEL0, id);
sc 748 dev/ic/an.c CSR_WRITE_2(sc, AN_OFF0, off);
sc 751 dev/ic/an.c status = CSR_READ_2(sc, AN_OFF0);
sc 756 dev/ic/an.c sc->sc_dev.dv_xname, id, off);
sc 757 dev/ic/an.c sc->sc_bap_off = AN_OFF_ERR; /* invalidate */
sc 764 dev/ic/an.c sc->sc_dev.dv_xname, id, off);
sc 765 dev/ic/an.c sc->sc_bap_off = AN_OFF_ERR; /* invalidate */
sc 768 dev/ic/an.c sc->sc_bap_id = id;
sc 769 dev/ic/an.c sc->sc_bap_off = off;
sc 774 dev/ic/an.c an_mwrite_bap(struct an_softc *sc, int id, int off, struct mbuf *m, int totlen)
sc 779 dev/ic/an.c off = sc->sc_bap_off;
sc 780 dev/ic/an.c if (id != sc->sc_bap_id || off != sc->sc_bap_off) {
sc 781 dev/ic/an.c if ((error = an_seek_bap(sc, id, off)) != 0)
sc 791 dev/ic/an.c m_copydata(m, 0, totlen, (caddr_t)&sc->sc_buf.sc_txbuf);
sc 793 dev/ic/an.c an_swap16((u_int16_t *)&sc->sc_buf.sc_txbuf, cnt);
sc 794 dev/ic/an.c CSR_WRITE_MULTI_STREAM_2(sc, AN_DATA0,
sc 795 dev/ic/an.c sc->sc_buf.sc_val, cnt);
sc 801 dev/ic/an.c CSR_WRITE_MULTI_STREAM_2(sc, AN_DATA0, mtod(m, u_int16_t *),
sc 806 dev/ic/an.c sc->sc_bap_off = off;
sc 811 dev/ic/an.c an_alloc_nicmem(struct an_softc *sc, int len, int *idp)
sc 815 dev/ic/an.c if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) {
sc 817 dev/ic/an.c sc->sc_dev.dv_xname, len);
sc 822 dev/ic/an.c if (CSR_READ_2(sc, AN_EVENT_STAT) & AN_EV_ALLOC)
sc 825 dev/ic/an.c printf("%s: timeout in alloc\n", sc->sc_dev.dv_xname);
sc 831 dev/ic/an.c *idp = CSR_READ_2(sc, AN_ALLOC_FID);
sc 832 dev/ic/an.c CSR_WRITE_2(sc, AN_EVENT_ACK, AN_EV_ALLOC);
sc 837 dev/ic/an.c an_read_rid(struct an_softc *sc, int rid, void *buf, int *buflenp)
sc 843 dev/ic/an.c error = an_cmd(sc, AN_CMD_ACCESS | AN_ACCESS_READ, rid);
sc 848 dev/ic/an.c error = an_read_bap(sc, rid, 0, &len, sizeof(len), sizeof(len));
sc 853 dev/ic/an.c return an_read_bap(sc, rid, sizeof(len), buf, len, *buflenp);
sc 857 dev/ic/an.c an_write_rid(struct an_softc *sc, int rid, void *buf, int buflen)
sc 865 dev/ic/an.c error = an_write_bap(sc, rid, 0, &len, sizeof(len));
sc 868 dev/ic/an.c error = an_write_bap(sc, rid, sizeof(len), buf, buflen);
sc 872 dev/ic/an.c return an_cmd(sc, AN_CMD_ACCESS | AN_ACCESS_WRITE, rid);
sc 878 dev/ic/an.c struct an_softc *sc = ifp->if_softc;
sc 882 dev/ic/an.c if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
sc 894 dev/ic/an.c arp_ifinit(&sc->sc_ic.ic_ac, ifa);
sc 904 dev/ic/an.c if (sc->sc_enabled) {
sc 910 dev/ic/an.c error = an_cmd(sc, AN_CMD_SET_MODE,
sc 914 dev/ic/an.c } else if (sc->sc_enabled)
sc 923 dev/ic/an.c error = an_set_nwkey(sc, (struct ieee80211_nwkey *)data);
sc 926 dev/ic/an.c error = an_get_nwkey(sc, (struct ieee80211_nwkey *)data);
sc 933 dev/ic/an.c if (sc->sc_enabled)
sc 945 dev/ic/an.c struct an_softc *sc = ifp->if_softc;
sc 946 dev/ic/an.c struct ieee80211com *ic = &sc->sc_ic;
sc 949 dev/ic/an.c DPRINTF(("an_init: enabled %d\n", sc->sc_enabled));
sc 950 dev/ic/an.c if (!sc->sc_enabled) {
sc 951 dev/ic/an.c if (sc->sc_enable)
sc 952 dev/ic/an.c (*sc->sc_enable)(sc);
sc 953 dev/ic/an.c an_wait(sc);
sc 954 dev/ic/an.c sc->sc_enabled = 1;
sc 957 dev/ic/an.c if ((error = an_reset(sc)) != 0) {
sc 963 dev/ic/an.c CSR_WRITE_2(sc, AN_SW0, AN_MAGIC);
sc 967 dev/ic/an.c if ((error = an_alloc_nicmem(sc, AN_TX_MAX_LEN, &fid)) != 0) {
sc 974 dev/ic/an.c sc->sc_txd[i].d_fid = fid;
sc 975 dev/ic/an.c sc->sc_txd[i].d_inuse = 0;
sc 977 dev/ic/an.c sc->sc_txcur = sc->sc_txnext = 0;
sc 979 dev/ic/an.c IEEE80211_ADDR_COPY(sc->sc_config.an_macaddr, ic->ic_myaddr);
sc 980 dev/ic/an.c an_swap16((u_int16_t *)&sc->sc_config.an_macaddr, 3);
sc 981 dev/ic/an.c sc->sc_config.an_scanmode = AN_SCANMODE_ACTIVE;
sc 982 dev/ic/an.c sc->sc_config.an_authtype = AN_AUTHTYPE_OPEN; /*XXX*/
sc 984 dev/ic/an.c sc->sc_config.an_authtype |=
sc 987 dev/ic/an.c sc->sc_config.an_listen_interval = ic->ic_lintval;
sc 988 dev/ic/an.c sc->sc_config.an_beacon_period = ic->ic_lintval;
sc 990 dev/ic/an.c sc->sc_config.an_psave_mode = AN_PSAVE_PSP;
sc 992 dev/ic/an.c sc->sc_config.an_psave_mode = AN_PSAVE_CAM;
sc 993 dev/ic/an.c sc->sc_config.an_ds_channel =
sc 998 dev/ic/an.c sc->sc_config.an_opmode =
sc 1000 dev/ic/an.c sc->sc_config.an_rxmode = AN_RXMODE_BC_MC_ADDR;
sc 1003 dev/ic/an.c sc->sc_config.an_opmode = AN_OPMODE_IBSS_ADHOC;
sc 1004 dev/ic/an.c sc->sc_config.an_rxmode = AN_RXMODE_BC_MC_ADDR;
sc 1007 dev/ic/an.c sc->sc_config.an_opmode =
sc 1009 dev/ic/an.c sc->sc_config.an_rxmode =
sc 1011 dev/ic/an.c sc->sc_config.an_authtype = AN_AUTHTYPE_NONE;
sc 1013 dev/ic/an.c sc->sc_config.an_authtype |=
sc 1022 dev/ic/an.c sc->sc_config.an_rxmode |= AN_RXMODE_NO_8023_HEADER;
sc 1025 dev/ic/an.c memset(&sc->sc_buf, 0, sizeof(sc->sc_buf.sc_ssidlist));
sc 1026 dev/ic/an.c sc->sc_buf.sc_ssidlist.an_entry[0].an_ssid_len =
sc 1029 dev/ic/an.c memcpy(sc->sc_buf.sc_ssidlist.an_entry[0].an_ssid,
sc 1031 dev/ic/an.c an_swap16((u_int16_t *)&sc->sc_buf.sc_ssidlist.an_entry[0].an_ssid, 16);
sc 1032 dev/ic/an.c if (an_write_rid(sc, AN_RID_SSIDLIST, &sc->sc_buf,
sc 1033 dev/ic/an.c sizeof(sc->sc_buf.sc_ssidlist)) != 0) {
sc 1040 dev/ic/an.c memset(&sc->sc_buf, 0, sizeof(sc->sc_buf.sc_aplist));
sc 1041 dev/ic/an.c (void)an_write_rid(sc, AN_RID_APLIST, &sc->sc_buf,
sc 1042 dev/ic/an.c sizeof(sc->sc_buf.sc_aplist));
sc 1046 dev/ic/an.c sc->sc_buf.sc_encap.an_entry[i].an_ethertype = 0;
sc 1047 dev/ic/an.c sc->sc_buf.sc_encap.an_entry[i].an_action =
sc 1050 dev/ic/an.c (void)an_write_rid(sc, AN_RID_ENCAP, &sc->sc_buf,
sc 1051 dev/ic/an.c sizeof(sc->sc_buf.sc_encap));
sc 1055 dev/ic/an.c an_write_wepkey(sc, AN_RID_WEP_VOLATILE, sc->sc_wepkeys,
sc 1056 dev/ic/an.c sc->sc_tx_key);
sc 1059 dev/ic/an.c if (an_write_rid(sc, AN_RID_GENCONFIG, &sc->sc_config,
sc 1060 dev/ic/an.c sizeof(sc->sc_config)) != 0) {
sc 1067 dev/ic/an.c if (an_cmd(sc, AN_CMD_ENABLE, 0)) {
sc 1068 dev/ic/an.c printf("%s: failed to enable MAC\n", sc->sc_dev.dv_xname);
sc 1073 dev/ic/an.c an_cmd(sc, AN_CMD_SET_MODE, 0xffff);
sc 1082 dev/ic/an.c CSR_WRITE_2(sc, AN_INT_EN, AN_INTRS);
sc 1089 dev/ic/an.c struct an_softc *sc = (struct an_softc *)ifp->if_softc;
sc 1090 dev/ic/an.c struct ieee80211com *ic = &sc->sc_ic;
sc 1098 dev/ic/an.c if (!sc->sc_enabled || sc->sc_invalid) {
sc 1100 dev/ic/an.c sc->sc_enabled, sc->sc_invalid));
sc 1105 dev/ic/an.c cur = sc->sc_txnext;
sc 1116 dev/ic/an.c if (sc->sc_txd[cur].d_inuse) {
sc 1118 dev/ic/an.c sc->sc_txd[cur].d_fid, cur));
sc 1185 dev/ic/an.c if (sc->sc_drvbpf) {
sc 1187 dev/ic/an.c struct an_tx_radiotap_header *tap = &sc->sc_txtap;
sc 1197 dev/ic/an.c mb.m_len = sizeof(sc->sc_txtapu);
sc 1202 dev/ic/an.c bpf_mtap(sc->sc_drvbpf, m, BPF_DIRECTION_OUT);
sc 1206 dev/ic/an.c fid = sc->sc_txd[cur].d_fid;
sc 1207 dev/ic/an.c if (an_write_bap(sc, fid, 0, &frmhdr, sizeof(frmhdr)) != 0) {
sc 1213 dev/ic/an.c an_write_bap(sc, fid, -1, &frmhdr, AN_TXGAP_802_11);
sc 1214 dev/ic/an.c an_mwrite_bap(sc, fid, -1, m, m->m_pkthdr.len);
sc 1220 dev/ic/an.c sc->sc_txd[cur].d_inuse = 1;
sc 1221 dev/ic/an.c if (an_cmd(sc, AN_CMD_TX, fid)) {
sc 1223 dev/ic/an.c sc->sc_txd[cur].d_inuse = 0;
sc 1226 dev/ic/an.c sc->sc_tx_timer = 5;
sc 1229 dev/ic/an.c sc->sc_txnext = cur;
sc 1236 dev/ic/an.c struct an_softc *sc = ifp->if_softc;
sc 1239 dev/ic/an.c if (!sc->sc_enabled)
sc 1245 dev/ic/an.c ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1);
sc 1246 dev/ic/an.c if (!sc->sc_invalid) {
sc 1247 dev/ic/an.c an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0);
sc 1248 dev/ic/an.c CSR_WRITE_2(sc, AN_INT_EN, 0);
sc 1249 dev/ic/an.c an_cmd(sc, AN_CMD_DISABLE, 0);
sc 1252 dev/ic/an.c an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->sc_txd[i].d_fid);
sc 1255 dev/ic/an.c sc->sc_tx_timer = 0;
sc 1260 dev/ic/an.c if (sc->sc_disable)
sc 1261 dev/ic/an.c (*sc->sc_disable)(sc);
sc 1262 dev/ic/an.c sc->sc_enabled = 0;
sc 1270 dev/ic/an.c struct an_softc *sc = ifp->if_softc;
sc 1272 dev/ic/an.c if (!sc->sc_enabled)
sc 1275 dev/ic/an.c if (sc->sc_tx_timer) {
sc 1276 dev/ic/an.c if (--sc->sc_tx_timer == 0) {
sc 1290 dev/ic/an.c struct an_softc *sc = (struct an_softc *)self;
sc 1292 dev/ic/an.c if (sc->sc_attached)
sc 1293 dev/ic/an.c an_stop(&sc->sc_ic.ic_if, 1);
sc 1300 dev/ic/an.c struct an_softc *sc = ifp->if_softc;
sc 1301 dev/ic/an.c struct ieee80211com *ic = &sc->sc_ic;
sc 1340 dev/ic/an.c if (sc->sc_enabled)
sc 1353 dev/ic/an.c struct an_softc *sc = ifp->if_softc;
sc 1354 dev/ic/an.c struct ieee80211com *ic = &sc->sc_ic;
sc 1357 dev/ic/an.c if (sc->sc_enabled == 0) {
sc 1367 dev/ic/an.c buflen = sizeof(sc->sc_buf);
sc 1371 dev/ic/an.c else if (an_read_rid(sc, AN_RID_STATUS, &sc->sc_buf, &buflen) != 0)
sc 1374 dev/ic/an.c rate = sc->sc_buf.sc_status.an_current_tx_rate;
sc 1394 dev/ic/an.c an_set_nwkey(struct an_softc *sc, struct ieee80211_nwkey *nwkey)
sc 1397 dev/ic/an.c struct ieee80211com *ic = &sc->sc_ic;
sc 1401 dev/ic/an.c prevauth = sc->sc_config.an_authtype;
sc 1405 dev/ic/an.c sc->sc_config.an_authtype = AN_AUTHTYPE_OPEN;
sc 1411 dev/ic/an.c error = an_set_nwkey_wep(sc, nwkey);
sc 1413 dev/ic/an.c sc->sc_config.an_authtype =
sc 1423 dev/ic/an.c if (error == 0 && prevauth != sc->sc_config.an_authtype)
sc 1429 dev/ic/an.c an_set_nwkey_wep(struct an_softc *sc, struct ieee80211_nwkey *nwkey)
sc 1460 dev/ic/an.c sc->sc_perskeylen[txkey] == 0))
sc 1466 dev/ic/an.c sc->sc_dev.dv_xname,
sc 1468 dev/ic/an.c sc->sc_tx_key,
sc 1469 dev/ic/an.c sc->sc_wepkeys[0].an_wep_keylen, sc->sc_wepkeys[1].an_wep_keylen,
sc 1470 dev/ic/an.c sc->sc_wepkeys[2].an_wep_keylen, sc->sc_wepkeys[3].an_wep_keylen,
sc 1471 dev/ic/an.c sc->sc_tx_perskey,
sc 1472 dev/ic/an.c sc->sc_perskeylen[0], sc->sc_perskeylen[1],
sc 1473 dev/ic/an.c sc->sc_perskeylen[2], sc->sc_perskeylen[3],
sc 1479 dev/ic/an.c sc->sc_tx_key = txkey;
sc 1483 dev/ic/an.c memcpy(&sc->sc_wepkeys[i], &keys[i], sizeof(keys[i]));
sc 1489 dev/ic/an.c if (!sc->sc_enabled) {
sc 1490 dev/ic/an.c if (sc->sc_enable)
sc 1491 dev/ic/an.c (*sc->sc_enable)(sc);
sc 1492 dev/ic/an.c an_wait(sc);
sc 1493 dev/ic/an.c sc->sc_enabled = 1;
sc 1494 dev/ic/an.c error = an_write_wepkey(sc,
sc 1496 dev/ic/an.c if (sc->sc_disable)
sc 1497 dev/ic/an.c (*sc->sc_disable)(sc);
sc 1498 dev/ic/an.c sc->sc_enabled = 0;
sc 1500 dev/ic/an.c an_cmd(sc, AN_CMD_DISABLE, 0);
sc 1501 dev/ic/an.c error = an_write_wepkey(sc,
sc 1503 dev/ic/an.c an_cmd(sc, AN_CMD_ENABLE, 0);
sc 1509 dev/ic/an.c sc->sc_tx_perskey = txkey;
sc 1510 dev/ic/an.c if (sc->sc_tx_key >= 0) {
sc 1511 dev/ic/an.c sc->sc_tx_key = -1;
sc 1515 dev/ic/an.c if (sc->sc_wepkeys[i].an_wep_keylen >= 0) {
sc 1516 dev/ic/an.c memset(&sc->sc_wepkeys[i].an_wep_key, 0,
sc 1517 dev/ic/an.c sizeof(sc->sc_wepkeys[i].an_wep_key));
sc 1518 dev/ic/an.c sc->sc_wepkeys[i].an_wep_keylen = -1;
sc 1522 dev/ic/an.c sc->sc_perskeylen[i] = keys[i].an_wep_keylen;
sc 1527 dev/ic/an.c an_reset(sc);
sc 1535 dev/ic/an.c an_get_nwkey(struct an_softc *sc, struct ieee80211_nwkey *nwkey)
sc 1540 dev/ic/an.c if (sc->sc_config.an_authtype & AN_AUTHTYPE_LEAP)
sc 1542 dev/ic/an.c else if (sc->sc_config.an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE)
sc 1546 dev/ic/an.c if (sc->sc_tx_key == -1)
sc 1547 dev/ic/an.c nwkey->i_defkid = sc->sc_tx_perskey + 1;
sc 1549 dev/ic/an.c nwkey->i_defkid = sc->sc_tx_key + 1;
sc 1558 dev/ic/an.c nwkey->i_key[i].i_keylen = sc->sc_wepkeys[i].an_wep_keylen;
sc 1560 dev/ic/an.c if (sc->sc_perskeylen[i] == 0)
sc 1564 dev/ic/an.c if ((error = copyout(sc->sc_wepkeys[i].an_wep_key,
sc 1566 dev/ic/an.c sc->sc_wepkeys[i].an_wep_keylen)) != 0)
sc 1573 dev/ic/an.c an_write_wepkey(struct an_softc *sc, int type, struct an_wepkey *keys, int kid)
sc 1579 dev/ic/an.c akey = &sc->sc_buf.sc_wepkey;
sc 1591 dev/ic/an.c if ((error = an_write_rid(sc, type, akey, sizeof(*akey))) != 0)
sc 1601 dev/ic/an.c error = an_write_rid(sc, type, akey, sizeof(*akey));
sc 1609 dev/ic/an.c struct an_softc *sc = ic->ic_softc;
sc 1621 dev/ic/an.c return (*sc->sc_newstate)(ic, nstate, arg);
sc 1624 dev/ic/an.c buflen = sizeof(sc->sc_buf);
sc 1625 dev/ic/an.c an_read_rid(sc, AN_RID_STATUS, &sc->sc_buf, &buflen);
sc 1626 dev/ic/an.c an_swap16((u_int16_t *)&sc->sc_buf.sc_status.an_cur_bssid, 3);
sc 1627 dev/ic/an.c an_swap16((u_int16_t *)&sc->sc_buf.sc_status.an_ssid, 16);
sc 1629 dev/ic/an.c sc->sc_buf.sc_status.an_cur_bssid);
sc 1632 dev/ic/an.c sc->sc_buf.sc_status.an_cur_channel];
sc 1633 dev/ic/an.c ni->ni_esslen = sc->sc_buf.sc_status.an_ssidlen;
sc 1636 dev/ic/an.c memcpy(ni->ni_essid, sc->sc_buf.sc_status.an_ssid,
sc 1640 dev/ic/an.c printf("%s: ", sc->sc_dev.dv_xname);
sc 1648 dev/ic/an.c sc->sc_buf.sc_status.an_cur_channel,
sc 1649 dev/ic/an.c sc->sc_buf.sc_status.an_current_tx_rate/2);
sc 1662 dev/ic/an.c an_detach(struct an_softc *sc)
sc 1664 dev/ic/an.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1667 dev/ic/an.c if (!sc->sc_attached)
sc 1671 dev/ic/an.c sc->sc_invalid = 1;
sc 1673 dev/ic/an.c ifmedia_delete_instance(&sc->sc_ic.ic_media, IFM_INST_ANY);
sc 1676 dev/ic/an.c if (sc->sc_sdhook != NULL)
sc 1677 dev/ic/an.c shutdownhook_disestablish(sc->sc_sdhook);
sc 49 dev/ic/anvar.h #define CSR_WRITE_2(sc, reg, val) \
sc 50 dev/ic/anvar.h bus_space_write_2(sc->sc_iot, sc->sc_ioh, reg, val)
sc 52 dev/ic/anvar.h #define CSR_READ_2(sc, reg) \
sc 53 dev/ic/anvar.h bus_space_read_2(sc->sc_iot, sc->sc_ioh, reg)
sc 60 dev/ic/anvar.h #define CSR_WRITE_MULTI_STREAM_2(sc, reg, val, count) \
sc 61 dev/ic/anvar.h bus_space_write_multi_stream_2(sc->sc_iot, sc->sc_ioh, reg, val, count)
sc 62 dev/ic/anvar.h #define CSR_READ_MULTI_STREAM_2(sc, reg, buf, count) \
sc 63 dev/ic/anvar.h bus_space_read_multi_stream_2(sc->sc_iot, sc->sc_ioh, reg, buf, count)
sc 193 dev/ic/ar5210.c ar5k_ar5210_attach(u_int16_t device, void *sc, bus_space_tag_t st,
sc 197 dev/ic/ar5210.c struct ath_hal *hal = (struct ath_hal*) sc;
sc 197 dev/ic/ar5211.c ar5k_ar5211_attach(u_int16_t device, void *sc, bus_space_tag_t st,
sc 200 dev/ic/ar5211.c struct ath_hal *hal = (struct ath_hal*) sc;
sc 194 dev/ic/ar5212.c ar5k_ar5212_attach(u_int16_t device, void *sc, bus_space_tag_t st,
sc 197 dev/ic/ar5212.c struct ath_hal *hal = (struct ath_hal*) sc;
sc 153 dev/ic/ar5xxx.c struct ath_softc *sc = (struct ath_softc *)arg;
sc 185 dev/ic/ar5xxx.c hal->ah_sc = sc;
sc 132 dev/ic/ath.c int ath_rate_setup(struct ath_softc *sc, u_int mode);
sc 165 dev/ic/ath.c struct ath_softc *sc = (struct ath_softc *)self;
sc 173 dev/ic/ath.c if_deactivate(&sc->sc_ic.ic_if);
sc 182 dev/ic/ath.c ath_enable(struct ath_softc *sc)
sc 184 dev/ic/ath.c if (ATH_IS_ENABLED(sc) == 0) {
sc 185 dev/ic/ath.c if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
sc 187 dev/ic/ath.c sc->sc_dev.dv_xname);
sc 190 dev/ic/ath.c sc->sc_flags |= ATH_ENABLED;
sc 196 dev/ic/ath.c ath_disable(struct ath_softc *sc)
sc 198 dev/ic/ath.c if (!ATH_IS_ENABLED(sc))
sc 200 dev/ic/ath.c if (sc->sc_disable != NULL)
sc 201 dev/ic/ath.c (*sc->sc_disable)(sc);
sc 202 dev/ic/ath.c sc->sc_flags &= ~ATH_ENABLED;
sc 206 dev/ic/ath.c ath_attach(u_int16_t devid, struct ath_softc *sc)
sc 208 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 217 dev/ic/ath.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 218 dev/ic/ath.c sc->sc_flags &= ~ATH_ATTACHED; /* make sure that it's not attached */
sc 220 dev/ic/ath.c ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh, sc->sc_64bit,
sc 269 dev/ic/ath.c sc->sc_ah = ah;
sc 270 dev/ic/ath.c sc->sc_invalid = 0; /* ready to go, enable interrupt handling */
sc 282 dev/ic/ath.c error = ath_getchannels(sc, ath_outdoor, ath_xchanmode);
sc 289 dev/ic/ath.c ath_rate_setup(sc, IEEE80211_MODE_11A);
sc 290 dev/ic/ath.c ath_rate_setup(sc, IEEE80211_MODE_11B);
sc 291 dev/ic/ath.c ath_rate_setup(sc, IEEE80211_MODE_11G);
sc 292 dev/ic/ath.c ath_rate_setup(sc, IEEE80211_MODE_TURBO);
sc 294 dev/ic/ath.c error = ath_desc_alloc(sc);
sc 299 dev/ic/ath.c timeout_set(&sc->sc_scan_to, ath_next_scan, sc);
sc 300 dev/ic/ath.c timeout_set(&sc->sc_cal_to, ath_calibrate, sc);
sc 301 dev/ic/ath.c timeout_set(&sc->sc_rssadapt_to, ath_rssadapt_updatestats, sc);
sc 304 dev/ic/ath.c ATH_TXBUF_LOCK_INIT(sc);
sc 305 dev/ic/ath.c ATH_TXQ_LOCK_INIT(sc);
sc 308 dev/ic/ath.c ATH_TASK_INIT(&sc->sc_txtask, ath_tx_proc, sc);
sc 309 dev/ic/ath.c ATH_TASK_INIT(&sc->sc_rxtask, ath_rx_proc, sc);
sc 310 dev/ic/ath.c ATH_TASK_INIT(&sc->sc_rxorntask, ath_rxorn_proc, sc);
sc 311 dev/ic/ath.c ATH_TASK_INIT(&sc->sc_fataltask, ath_fatal_proc, sc);
sc 312 dev/ic/ath.c ATH_TASK_INIT(&sc->sc_bmisstask, ath_bmiss_proc, sc);
sc 313 dev/ic/ath.c ATH_TASK_INIT(&sc->sc_swbatask, ath_beacon_proc, sc);
sc 322 dev/ic/ath.c sc->sc_bhalq = ath_hal_setup_tx_queue(ah, HAL_TX_QUEUE_BEACON, NULL);
sc 323 dev/ic/ath.c if (sc->sc_bhalq == (u_int) -1) {
sc 332 dev/ic/ath.c sc->sc_txhalq[i] = ath_hal_setup_tx_queue(ah,
sc 334 dev/ic/ath.c if (sc->sc_txhalq[i] == (u_int) -1) {
sc 340 dev/ic/ath.c ifp->if_softc = sc;
sc 353 dev/ic/ath.c ic->ic_softc = sc;
sc 370 dev/ic/ath.c sc->sc_veol = ath_hal_has_veol(ah);
sc 382 dev/ic/ath.c sc->sc_node_free = ic->ic_node_free;
sc 384 dev/ic/ath.c sc->sc_node_copy = ic->ic_node_copy;
sc 387 dev/ic/ath.c sc->sc_newstate = ic->ic_newstate;
sc 389 dev/ic/ath.c sc->sc_recv_mgmt = ic->ic_recv_mgmt;
sc 392 dev/ic/ath.c bcopy(etherbroadcastaddr, sc->sc_broadcast_addr, IEEE80211_ADDR_LEN);
sc 398 dev/ic/ath.c bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
sc 401 dev/ic/ath.c sc->sc_rxtap_len = sizeof(sc->sc_rxtapu);
sc 402 dev/ic/ath.c bzero(&sc->sc_rxtapu, sc->sc_rxtap_len);
sc 403 dev/ic/ath.c sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
sc 404 dev/ic/ath.c sc->sc_rxtap.wr_ihdr.it_present = htole32(ATH_RX_RADIOTAP_PRESENT);
sc 406 dev/ic/ath.c sc->sc_txtap_len = sizeof(sc->sc_txtapu);
sc 407 dev/ic/ath.c bzero(&sc->sc_txtapu, sc->sc_txtap_len);
sc 408 dev/ic/ath.c sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
sc 409 dev/ic/ath.c sc->sc_txtap.wt_ihdr.it_present = htole32(ATH_TX_RADIOTAP_PRESENT);
sc 412 dev/ic/ath.c sc->sc_flags |= ATH_ATTACHED;
sc 416 dev/ic/ath.c sc->sc_sdhook = shutdownhook_establish(ath_shutdown, sc);
sc 417 dev/ic/ath.c if (sc->sc_sdhook == NULL)
sc 419 dev/ic/ath.c sc->sc_powerhook = powerhook_establish(ath_power, sc);
sc 420 dev/ic/ath.c if (sc->sc_powerhook == NULL)
sc 432 dev/ic/ath.c if (ath_gpio_attach(sc, devid) == 0)
sc 433 dev/ic/ath.c sc->sc_flags |= ATH_GPIO;
sc 437 dev/ic/ath.c ath_desc_free(sc);
sc 441 dev/ic/ath.c sc->sc_invalid = 1;
sc 446 dev/ic/ath.c ath_detach(struct ath_softc *sc, int flags)
sc 448 dev/ic/ath.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 451 dev/ic/ath.c if ((sc->sc_flags & ATH_ATTACHED) == 0)
sc 454 dev/ic/ath.c config_detach_children(&sc->sc_dev, flags);
sc 458 dev/ic/ath.c timeout_del(&sc->sc_scan_to);
sc 459 dev/ic/ath.c timeout_del(&sc->sc_cal_to);
sc 460 dev/ic/ath.c timeout_del(&sc->sc_rssadapt_to);
sc 464 dev/ic/ath.c ath_desc_free(sc);
sc 465 dev/ic/ath.c ath_hal_detach(sc->sc_ah);
sc 471 dev/ic/ath.c if (sc->sc_powerhook != NULL)
sc 472 dev/ic/ath.c powerhook_disestablish(sc->sc_powerhook);
sc 473 dev/ic/ath.c if (sc->sc_sdhook != NULL)
sc 474 dev/ic/ath.c shutdownhook_disestablish(sc->sc_sdhook);
sc 476 dev/ic/ath.c ATH_TXBUF_LOCK_DESTROY(sc);
sc 477 dev/ic/ath.c ATH_TXQ_LOCK_DESTROY(sc);
sc 486 dev/ic/ath.c struct ath_softc *sc = arg;
sc 495 dev/ic/ath.c ath_suspend(sc, why);
sc 498 dev/ic/ath.c ath_resume(sc, why);
sc 511 dev/ic/ath.c ath_suspend(struct ath_softc *sc, int why)
sc 513 dev/ic/ath.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 518 dev/ic/ath.c if (sc->sc_power != NULL)
sc 519 dev/ic/ath.c (*sc->sc_power)(sc, why);
sc 523 dev/ic/ath.c ath_resume(struct ath_softc *sc, int why)
sc 525 dev/ic/ath.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 532 dev/ic/ath.c (void)ath_intr(sc);
sc 534 dev/ic/ath.c if (sc->sc_power != NULL)
sc 535 dev/ic/ath.c (*sc->sc_power)(sc, why);
sc 544 dev/ic/ath.c struct ath_softc *sc = arg;
sc 546 dev/ic/ath.c ath_stop(&sc->sc_ic.ic_if);
sc 556 dev/ic/ath.c ath_intr1(struct ath_softc *sc)
sc 558 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 560 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 563 dev/ic/ath.c if (sc->sc_invalid) {
sc 582 dev/ic/ath.c status &= sc->sc_imask; /* discard unasked for bits */
sc 584 dev/ic/ath.c sc->sc_stats.ast_hardware++;
sc 586 dev/ic/ath.c ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_fataltask);
sc 588 dev/ic/ath.c sc->sc_stats.ast_rxorn++;
sc 590 dev/ic/ath.c ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask);
sc 594 dev/ic/ath.c sc->sc_stats.ast_mib++;
sc 595 dev/ic/ath.c ath_hal_update_mib_counters(ah, &sc->sc_mib_stats);
sc 603 dev/ic/ath.c sc->sc_stats.ast_rxeol++;
sc 604 dev/ic/ath.c sc->sc_rxlink = NULL;
sc 607 dev/ic/ath.c sc->sc_stats.ast_txurn++;
sc 612 dev/ic/ath.c ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxtask);
sc 614 dev/ic/ath.c ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_txtask);
sc 616 dev/ic/ath.c ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_swbatask);
sc 618 dev/ic/ath.c sc->sc_stats.ast_bmiss++;
sc 619 dev/ic/ath.c ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_bmisstask);
sc 628 dev/ic/ath.c struct ath_softc *sc = arg;
sc 629 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 634 dev/ic/ath.c ath_reset(sc, 1);
sc 640 dev/ic/ath.c struct ath_softc *sc = arg;
sc 641 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 646 dev/ic/ath.c ath_reset(sc, 1);
sc 652 dev/ic/ath.c struct ath_softc *sc = arg;
sc 653 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 698 dev/ic/ath.c ath_init1(struct ath_softc *sc)
sc 700 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 704 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 712 dev/ic/ath.c if ((error = ath_enable(sc)) != 0)
sc 743 dev/ic/ath.c ath_set_slot_time(sc);
sc 752 dev/ic/ath.c if ((error = ath_initkeytable(sc)) != 0) {
sc 758 dev/ic/ath.c if ((error = ath_startrecv(sc)) != 0) {
sc 766 dev/ic/ath.c sc->sc_imask = HAL_INT_RX | HAL_INT_TX
sc 770 dev/ic/ath.c sc->sc_imask |= HAL_INT_MIB;
sc 771 dev/ic/ath.c ath_hal_set_intr(ah, sc->sc_imask);
sc 784 dev/ic/ath.c if (mode != sc->sc_curmode)
sc 785 dev/ic/ath.c ath_setcurmode(sc, mode);
sc 800 dev/ic/ath.c struct ath_softc *sc = ifp->if_softc;
sc 801 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 805 dev/ic/ath.c __func__, sc->sc_invalid, ifp->if_flags));
sc 825 dev/ic/ath.c if (!sc->sc_invalid)
sc 827 dev/ic/ath.c ath_draintxq(sc);
sc 828 dev/ic/ath.c if (!sc->sc_invalid) {
sc 829 dev/ic/ath.c ath_stoprecv(sc);
sc 831 dev/ic/ath.c sc->sc_rxlink = NULL;
sc 834 dev/ic/ath.c ath_beacon_free(sc);
sc 836 dev/ic/ath.c if (!sc->sc_invalid) {
sc 839 dev/ic/ath.c ath_disable(sc);
sc 852 dev/ic/ath.c ath_reset(struct ath_softc *sc, int full)
sc 854 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 856 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 870 dev/ic/ath.c ath_draintxq(sc); /* stop xmit side */
sc 871 dev/ic/ath.c ath_stoprecv(sc); /* stop recv side */
sc 878 dev/ic/ath.c ath_set_slot_time(sc);
sc 881 dev/ic/ath.c ath_hal_set_intr(ah, sc->sc_imask);
sc 882 dev/ic/ath.c if (ath_startrecv(sc) != 0) /* restart recv */
sc 887 dev/ic/ath.c ath_beacon_config(sc); /* restart beacons */
sc 893 dev/ic/ath.c struct ath_softc *sc = ifp->if_softc;
sc 894 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 895 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 903 dev/ic/ath.c sc->sc_invalid)
sc 910 dev/ic/ath.c bf = TAILQ_FIRST(&sc->sc_txbuf);
sc 912 dev/ic/ath.c TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list);
sc 917 dev/ic/ath.c sc->sc_stats.ast_tx_qstop++;
sc 934 dev/ic/ath.c sc->sc_stats.ast_tx_discard++;
sc 936 dev/ic/ath.c TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
sc 943 dev/ic/ath.c TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
sc 962 dev/ic/ath.c sc->sc_stats.ast_tx_encap++;
sc 993 dev/ic/ath.c sc->sc_stats.ast_tx_mgmt++;
sc 996 dev/ic/ath.c if (ath_tx_start(sc, ni, bf, m)) {
sc 999 dev/ic/ath.c TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
sc 1007 dev/ic/ath.c sc->sc_tx_timer = 5;
sc 1030 dev/ic/ath.c struct ath_softc *sc = ifp->if_softc;
sc 1033 dev/ic/ath.c if ((ifp->if_flags & IFF_RUNNING) == 0 || sc->sc_invalid)
sc 1035 dev/ic/ath.c if (sc->sc_tx_timer) {
sc 1036 dev/ic/ath.c if (--sc->sc_tx_timer == 0) {
sc 1038 dev/ic/ath.c ath_reset(sc, 1);
sc 1040 dev/ic/ath.c sc->sc_stats.ast_watchdog++;
sc 1052 dev/ic/ath.c struct ath_softc *sc = ifp->if_softc;
sc 1053 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1076 dev/ic/ath.c ath_mode_init(sc);
sc 1087 dev/ic/ath.c if (!sc->sc_invalid)
sc 1102 dev/ic/ath.c ath_mode_init(sc);
sc 1105 dev/ic/ath.c ether_addmulti(ifr, &sc->sc_ic.ic_ac) :
sc 1106 dev/ic/ath.c ether_delmulti(ifr, &sc->sc_ic.ic_ac);
sc 1109 dev/ic/ath.c ath_mode_init(sc);
sc 1114 dev/ic/ath.c error = copyout(&sc->sc_stats,
sc 1115 dev/ic/ath.c ifr->ifr_data, sizeof (sc->sc_stats));
sc 1122 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1127 dev/ic/ath.c ath_reset(sc, 1);
sc 1141 dev/ic/ath.c ath_initkeytable(struct ath_softc *sc)
sc 1143 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1144 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 1194 dev/ic/ath.c ath_mcastfilter_compute(struct ath_softc *sc, u_int32_t (*mfilt)[2])
sc 1196 dev/ic/ath.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1200 dev/ic/ath.c ETHER_FIRST_MULTI(estep, &sc->sc_ic.ic_ac, enm);
sc 1231 dev/ic/ath.c ath_calcrxfilter(struct ath_softc *sc)
sc 1233 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1234 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 1250 dev/ic/ath.c ath_mode_init(struct ath_softc *sc)
sc 1252 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 1256 dev/ic/ath.c rfilt = ath_calcrxfilter(sc);
sc 1264 dev/ic/ath.c ath_mcastfilter_compute(sc, &mfilt);
sc 1296 dev/ic/ath.c ath_beacon_alloc(struct ath_softc *sc, struct ieee80211_node *ni)
sc 1298 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1299 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 1308 dev/ic/ath.c bf = sc->sc_bcbuf;
sc 1310 dev/ic/ath.c bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
sc 1324 dev/ic/ath.c sc->sc_stats.ast_be_nombuf++;
sc 1329 dev/ic/ath.c error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m,
sc 1343 dev/ic/ath.c if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_veol) {
sc 1358 dev/ic/ath.c rt = sc->sc_currates;
sc 1359 dev/ic/ath.c KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
sc 1404 dev/ic/ath.c struct ath_softc *sc = arg;
sc 1405 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1406 dev/ic/ath.c struct ath_buf *bf = sc->sc_bcbuf;
sc 1407 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 1417 dev/ic/ath.c if (!ath_hal_stop_tx_dma(ah, sc->sc_bhalq)) {
sc 1419 dev/ic/ath.c __func__, sc->sc_bhalq));
sc 1421 dev/ic/ath.c bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 0,
sc 1424 dev/ic/ath.c ath_hal_put_tx_buf(ah, sc->sc_bhalq, bf->bf_daddr);
sc 1425 dev/ic/ath.c ath_hal_tx_start(ah, sc->sc_bhalq);
sc 1428 dev/ic/ath.c sc->sc_bhalq, (caddr_t)bf->bf_daddr, bf->bf_desc));
sc 1432 dev/ic/ath.c ath_beacon_free(struct ath_softc *sc)
sc 1434 dev/ic/ath.c struct ath_buf *bf = sc->sc_bcbuf;
sc 1437 dev/ic/ath.c bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
sc 1460 dev/ic/ath.c ath_beacon_config(struct ath_softc *sc)
sc 1463 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 1464 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1532 dev/ic/ath.c sc->sc_imask |= HAL_INT_BMISS;
sc 1533 dev/ic/ath.c ath_hal_set_intr(ah, sc->sc_imask);
sc 1547 dev/ic/ath.c if (!sc->sc_veol)
sc 1548 dev/ic/ath.c sc->sc_imask |= HAL_INT_SWBA;
sc 1555 dev/ic/ath.c sc->sc_imask |= HAL_INT_SWBA; /* beacon prepare */
sc 1558 dev/ic/ath.c ath_hal_set_intr(ah, sc->sc_imask);
sc 1563 dev/ic/ath.c if (ic->ic_opmode == IEEE80211_M_IBSS && sc->sc_veol)
sc 1564 dev/ic/ath.c ath_beacon_proc(sc, 0);
sc 1569 dev/ic/ath.c ath_desc_alloc(struct ath_softc *sc)
sc 1576 dev/ic/ath.c sc->sc_desc_len = sizeof(struct ath_desc) *
sc 1578 dev/ic/ath.c if ((error = bus_dmamem_alloc(sc->sc_dmat, sc->sc_desc_len, PAGE_SIZE,
sc 1579 dev/ic/ath.c 0, &sc->sc_dseg, 1, &sc->sc_dnseg, 0)) != 0) {
sc 1581 dev/ic/ath.c sc->sc_dev.dv_xname, error);
sc 1585 dev/ic/ath.c if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg,
sc 1586 dev/ic/ath.c sc->sc_desc_len, (caddr_t *)&sc->sc_desc, BUS_DMA_COHERENT)) != 0) {
sc 1588 dev/ic/ath.c sc->sc_dev.dv_xname, error);
sc 1592 dev/ic/ath.c if ((error = bus_dmamap_create(sc->sc_dmat, sc->sc_desc_len, 1,
sc 1593 dev/ic/ath.c sc->sc_desc_len, 0, 0, &sc->sc_ddmamap)) != 0) {
sc 1595 dev/ic/ath.c "error = %d\n", sc->sc_dev.dv_xname, error);
sc 1599 dev/ic/ath.c if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_ddmamap, sc->sc_desc,
sc 1600 dev/ic/ath.c sc->sc_desc_len, NULL, 0)) != 0) {
sc 1602 dev/ic/ath.c sc->sc_dev.dv_xname, error);
sc 1606 dev/ic/ath.c ds = sc->sc_desc;
sc 1607 dev/ic/ath.c sc->sc_desc_paddr = sc->sc_ddmamap->dm_segs[0].ds_addr;
sc 1611 dev/ic/ath.c ds, (u_long)sc->sc_desc_len,
sc 1612 dev/ic/ath.c (caddr_t) sc->sc_desc_paddr, /*XXX*/ (u_long) sc->sc_desc_len));
sc 1619 dev/ic/ath.c sc->sc_dev.dv_xname);
sc 1624 dev/ic/ath.c sc->sc_bufptr = bf;
sc 1626 dev/ic/ath.c TAILQ_INIT(&sc->sc_rxbuf);
sc 1629 dev/ic/ath.c bf->bf_daddr = sc->sc_desc_paddr +
sc 1630 dev/ic/ath.c ((caddr_t)ds - (caddr_t)sc->sc_desc);
sc 1631 dev/ic/ath.c if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 1634 dev/ic/ath.c sc->sc_dev.dv_xname, error);
sc 1637 dev/ic/ath.c TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
sc 1640 dev/ic/ath.c TAILQ_INIT(&sc->sc_txbuf);
sc 1643 dev/ic/ath.c bf->bf_daddr = sc->sc_desc_paddr +
sc 1644 dev/ic/ath.c ((caddr_t)ds - (caddr_t)sc->sc_desc);
sc 1645 dev/ic/ath.c if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 1648 dev/ic/ath.c sc->sc_dev.dv_xname, error);
sc 1651 dev/ic/ath.c TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
sc 1653 dev/ic/ath.c TAILQ_INIT(&sc->sc_txq);
sc 1657 dev/ic/ath.c bf->bf_daddr = sc->sc_desc_paddr + ((caddr_t)ds - (caddr_t)sc->sc_desc);
sc 1658 dev/ic/ath.c if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0, 0,
sc 1661 dev/ic/ath.c sc->sc_dev.dv_xname, error);
sc 1664 dev/ic/ath.c sc->sc_bcbuf = bf;
sc 1669 dev/ic/ath.c if (sc->sc_bufptr[i].bf_dmamap == NULL)
sc 1671 dev/ic/ath.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap);
sc 1675 dev/ic/ath.c if (sc->sc_bufptr[i].bf_dmamap == NULL)
sc 1677 dev/ic/ath.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_bufptr[i].bf_dmamap);
sc 1680 dev/ic/ath.c bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
sc 1682 dev/ic/ath.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
sc 1683 dev/ic/ath.c sc->sc_ddmamap = NULL;
sc 1685 dev/ic/ath.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_desc, sc->sc_desc_len);
sc 1687 dev/ic/ath.c bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg);
sc 1692 dev/ic/ath.c ath_desc_free(struct ath_softc *sc)
sc 1696 dev/ic/ath.c bus_dmamap_unload(sc->sc_dmat, sc->sc_ddmamap);
sc 1697 dev/ic/ath.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_ddmamap);
sc 1698 dev/ic/ath.c bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_dnseg);
sc 1700 dev/ic/ath.c TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
sc 1701 dev/ic/ath.c bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
sc 1702 dev/ic/ath.c bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
sc 1705 dev/ic/ath.c TAILQ_FOREACH(bf, &sc->sc_txbuf, bf_list)
sc 1706 dev/ic/ath.c bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
sc 1707 dev/ic/ath.c TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
sc 1709 dev/ic/ath.c bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
sc 1710 dev/ic/ath.c bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
sc 1715 dev/ic/ath.c if (sc->sc_bcbuf != NULL) {
sc 1716 dev/ic/ath.c bus_dmamap_unload(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
sc 1717 dev/ic/ath.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_bcbuf->bf_dmamap);
sc 1718 dev/ic/ath.c sc->sc_bcbuf = NULL;
sc 1721 dev/ic/ath.c TAILQ_INIT(&sc->sc_rxbuf);
sc 1722 dev/ic/ath.c TAILQ_INIT(&sc->sc_txbuf);
sc 1723 dev/ic/ath.c TAILQ_INIT(&sc->sc_txq);
sc 1724 dev/ic/ath.c free(sc->sc_bufptr, M_DEVBUF);
sc 1725 dev/ic/ath.c sc->sc_bufptr = NULL;
sc 1747 dev/ic/ath.c struct ath_softc *sc = ic->ic_if.if_softc;
sc 1750 dev/ic/ath.c TAILQ_FOREACH(bf, &sc->sc_txq, bf_list) {
sc 1754 dev/ic/ath.c (*sc->sc_node_free)(ic, ni);
sc 1761 dev/ic/ath.c struct ath_softc *sc = ic->ic_if.if_softc;
sc 1765 dev/ic/ath.c (*sc->sc_node_copy)(ic, dst, src);
sc 1804 dev/ic/ath.c ath_rxbuf_init(struct ath_softc *sc, struct ath_buf *bf)
sc 1806 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 1807 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1825 dev/ic/ath.c sc->sc_stats.ast_rx_nombuf++;
sc 1831 dev/ic/ath.c error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m,
sc 1837 dev/ic/ath.c sc->sc_stats.ast_rx_busdma++;
sc 1844 dev/ic/ath.c bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 0,
sc 1872 dev/ic/ath.c if (sc->sc_rxlink != NULL)
sc 1873 dev/ic/ath.c *sc->sc_rxlink = bf->bf_daddr;
sc 1874 dev/ic/ath.c sc->sc_rxlink = &ds->ds_link;
sc 1884 dev/ic/ath.c struct ath_softc *sc = arg;
sc 1886 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1888 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 1901 dev/ic/ath.c bf = TAILQ_FIRST(&sc->sc_rxbuf);
sc 1929 dev/ic/ath.c bf->bf_daddr, PA2DESC(sc, ds->ds_link));
sc 1936 dev/ic/ath.c TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list);
sc 1960 dev/ic/ath.c sc->sc_stats.ast_rx_crcerr++;
sc 1962 dev/ic/ath.c sc->sc_stats.ast_rx_fifoerr++;
sc 1964 dev/ic/ath.c sc->sc_stats.ast_rx_badcrypt++;
sc 1966 dev/ic/ath.c sc->sc_stats.ast_rx_phyerr++;
sc 1968 dev/ic/ath.c sc->sc_stats.ast_rx_phy[phyerr]++;
sc 1984 dev/ic/ath.c sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR)
sc 1992 dev/ic/ath.c sc->sc_stats.ast_rx_tooshort++;
sc 1996 dev/ic/ath.c bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 0,
sc 1999 dev/ic/ath.c bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
sc 2005 dev/ic/ath.c if (sc->sc_drvbpf) {
sc 2008 dev/ic/ath.c sc->sc_rxtap.wr_rate =
sc 2009 dev/ic/ath.c sc->sc_hwmap[ds->ds_rxstat.rs_rate] &
sc 2011 dev/ic/ath.c sc->sc_rxtap.wr_antenna = ds->ds_rxstat.rs_antenna;
sc 2012 dev/ic/ath.c sc->sc_rxtap.wr_rssi = ds->ds_rxstat.rs_rssi;
sc 2013 dev/ic/ath.c sc->sc_rxtap.wr_max_rssi = ic->ic_max_rssi;
sc 2015 dev/ic/ath.c mb.m_data = (caddr_t)&sc->sc_rxtap;
sc 2016 dev/ic/ath.c mb.m_len = sc->sc_rxtap_len;
sc 2021 dev/ic/ath.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
sc 2083 dev/ic/ath.c TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
sc 2084 dev/ic/ath.c } while (ath_rxbuf_init(sc, bf) == 0);
sc 2100 dev/ic/ath.c ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
sc 2103 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 2104 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 2105 dev/ic/ath.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 2132 dev/ic/ath.c sc->sc_stats.ast_tx_nombuf++;
sc 2194 dev/ic/ath.c error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m0,
sc 2202 dev/ic/ath.c sc->sc_stats.ast_tx_linear++;
sc 2205 dev/ic/ath.c sc->sc_stats.ast_tx_nombuf++;
sc 2213 dev/ic/ath.c sc->sc_stats.ast_tx_nomcl++;
sc 2222 dev/ic/ath.c error = bus_dmamap_load_mbuf(sc->sc_dmat, bf->bf_dmamap, m0,
sc 2225 dev/ic/ath.c sc->sc_stats.ast_tx_busdma++;
sc 2233 dev/ic/ath.c sc->sc_stats.ast_tx_busdma++;
sc 2237 dev/ic/ath.c sc->sc_stats.ast_tx_nodata++;
sc 2242 dev/ic/ath.c bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 0,
sc 2250 dev/ic/ath.c rt = sc->sc_currates;
sc 2251 dev/ic/ath.c KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
sc 2288 dev/ic/ath.c rix = sc->sc_rixmap[ni->ni_rates.rs_rates[ni->ni_txrate] &
sc 2294 dev/ic/ath.c sc->sc_stats.ast_tx_badrate++;
sc 2310 dev/ic/ath.c sc->sc_stats.ast_tx_shortpre++;
sc 2322 dev/ic/ath.c sc->sc_stats.ast_tx_noack++;
sc 2325 dev/ic/ath.c sc->sc_stats.ast_tx_rts++;
sc 2393 dev/ic/ath.c if (sc->sc_drvbpf) {
sc 2396 dev/ic/ath.c sc->sc_txtap.wt_flags = 0;
sc 2398 dev/ic/ath.c sc->sc_txtap.wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
sc 2400 dev/ic/ath.c sc->sc_txtap.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
sc 2401 dev/ic/ath.c sc->sc_txtap.wt_rate = ni->ni_rates.rs_rates[ni->ni_txrate] &
sc 2403 dev/ic/ath.c sc->sc_txtap.wt_txpower = 30;
sc 2404 dev/ic/ath.c sc->sc_txtap.wt_antenna = antenna;
sc 2405 dev/ic/ath.c sc->sc_txtap.wt_hwqueue = hwqueue;
sc 2407 dev/ic/ath.c mb.m_data = (caddr_t)&sc->sc_txtap;
sc 2408 dev/ic/ath.c mb.m_len = sc->sc_txtap_len;
sc 2413 dev/ic/ath.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 2427 dev/ic/ath.c , iswep ? sc->sc_ic.ic_wep_txkey : HAL_TXKEYIX_INVALID
sc 2467 dev/ic/ath.c TAILQ_INSERT_TAIL(&sc->sc_txq, bf, bf_list);
sc 2468 dev/ic/ath.c if (sc->sc_txlink == NULL) {
sc 2469 dev/ic/ath.c ath_hal_put_tx_buf(ah, sc->sc_txhalq[hwqueue], bf->bf_daddr);
sc 2473 dev/ic/ath.c *sc->sc_txlink = bf->bf_daddr;
sc 2475 dev/ic/ath.c sc->sc_txlink, (caddr_t)bf->bf_daddr, bf->bf_desc));
sc 2477 dev/ic/ath.c sc->sc_txlink = &bf->bf_desc[bf->bf_nseg - 1].ds_link;
sc 2480 dev/ic/ath.c ath_hal_tx_start(ah, sc->sc_txhalq[hwqueue]);
sc 2487 dev/ic/ath.c struct ath_softc *sc = arg;
sc 2488 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 2490 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 2500 dev/ic/ath.c bf = TAILQ_FIRST(&sc->sc_txq);
sc 2502 dev/ic/ath.c sc->sc_txlink = NULL;
sc 2517 dev/ic/ath.c TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
sc 2534 dev/ic/ath.c sc->sc_stats.ast_tx_xretries++;
sc 2536 dev/ic/ath.c sc->sc_stats.ast_tx_fifoerr++;
sc 2538 dev/ic/ath.c sc->sc_stats.ast_tx_filtered++;
sc 2543 dev/ic/ath.c sc->sc_stats.ast_tx_shortretry += sr;
sc 2544 dev/ic/ath.c sc->sc_stats.ast_tx_longretry += lr;
sc 2554 dev/ic/ath.c bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 0,
sc 2556 dev/ic/ath.c bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
sc 2562 dev/ic/ath.c TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
sc 2566 dev/ic/ath.c sc->sc_tx_timer = 0;
sc 2575 dev/ic/ath.c ath_draintxq(struct ath_softc *sc)
sc 2577 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 2578 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 2585 dev/ic/ath.c if (!sc->sc_invalid) {
sc 2588 dev/ic/ath.c (void) ath_hal_stop_tx_dma(ah, sc->sc_txhalq[i]);
sc 2592 dev/ic/ath.c sc->sc_txhalq[i]), sc->sc_txlink));
sc 2594 dev/ic/ath.c (void) ath_hal_stop_tx_dma(ah, sc->sc_bhalq);
sc 2597 dev/ic/ath.c (caddr_t)(u_intptr_t)ath_hal_get_tx_buf(ah, sc->sc_bhalq)));
sc 2601 dev/ic/ath.c bf = TAILQ_FIRST(&sc->sc_txq);
sc 2603 dev/ic/ath.c sc->sc_txlink = NULL;
sc 2607 dev/ic/ath.c TAILQ_REMOVE(&sc->sc_txq, bf, bf_list);
sc 2615 dev/ic/ath.c bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
sc 2627 dev/ic/ath.c TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
sc 2631 dev/ic/ath.c sc->sc_tx_timer = 0;
sc 2638 dev/ic/ath.c ath_stoprecv(struct ath_softc *sc)
sc 2643 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 2653 dev/ic/ath.c (caddr_t)(u_intptr_t)ath_hal_get_rx_buf(ah), sc->sc_rxlink);
sc 2654 dev/ic/ath.c TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
sc 2657 dev/ic/ath.c PA2DESC(sc, ds->ds_link)) == HAL_OK)
sc 2662 dev/ic/ath.c sc->sc_rxlink = NULL; /* just in case */
sc 2670 dev/ic/ath.c ath_startrecv(struct ath_softc *sc)
sc 2672 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 2675 dev/ic/ath.c sc->sc_rxlink = NULL;
sc 2676 dev/ic/ath.c TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
sc 2677 dev/ic/ath.c int error = ath_rxbuf_init(sc, bf);
sc 2686 dev/ic/ath.c bf = TAILQ_FIRST(&sc->sc_rxbuf);
sc 2689 dev/ic/ath.c ath_mode_init(sc); /* set filters, etc. */
sc 2701 dev/ic/ath.c ath_chan_set(struct ath_softc *sc, struct ieee80211_channel *chan)
sc 2703 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 2704 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 2723 dev/ic/ath.c ath_draintxq(sc); /* clear pending tx frames */
sc 2724 dev/ic/ath.c ath_stoprecv(sc); /* turn off frame recv */
sc 2739 dev/ic/ath.c ath_set_slot_time(sc);
sc 2743 dev/ic/ath.c if (ath_startrecv(sc) != 0) {
sc 2753 dev/ic/ath.c sc->sc_txtap.wt_chan_freq = sc->sc_rxtap.wr_chan_freq =
sc 2755 dev/ic/ath.c sc->sc_txtap.wt_chan_flags = sc->sc_rxtap.wr_chan_flags =
sc 2765 dev/ic/ath.c if (mode != sc->sc_curmode)
sc 2766 dev/ic/ath.c ath_setcurmode(sc, mode);
sc 2771 dev/ic/ath.c ath_hal_set_intr(ah, sc->sc_imask);
sc 2779 dev/ic/ath.c struct ath_softc *sc = arg;
sc 2780 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 2793 dev/ic/ath.c ath_set_slot_time(struct ath_softc *sc)
sc 2795 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 2796 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 2811 dev/ic/ath.c struct ath_softc *sc = arg;
sc 2812 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 2813 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 2818 dev/ic/ath.c sc->sc_stats.ast_per_cal++;
sc 2837 dev/ic/ath.c sc->sc_stats.ast_per_rfgain++;
sc 2838 dev/ic/ath.c ath_reset(sc, 1);
sc 2844 dev/ic/ath.c sc->sc_stats.ast_per_calfail++;
sc 2846 dev/ic/ath.c timeout_add(&sc->sc_cal_to, hz * ath_calinterval);
sc 2851 dev/ic/ath.c ath_ledstate(struct ath_softc *sc, enum ieee80211_state state)
sc 2875 dev/ic/ath.c ath_hal_set_ledstate(sc->sc_ah, led);
sc 2876 dev/ic/ath.c if (sc->sc_softled) {
sc 2877 dev/ic/ath.c ath_hal_set_gpio_output(sc->sc_ah, AR5K_SOFTLED_PIN);
sc 2878 dev/ic/ath.c ath_hal_set_gpio(sc->sc_ah, AR5K_SOFTLED_PIN, softled);
sc 2886 dev/ic/ath.c struct ath_softc *sc = ifp->if_softc;
sc 2887 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 2897 dev/ic/ath.c timeout_del(&sc->sc_scan_to);
sc 2898 dev/ic/ath.c timeout_del(&sc->sc_cal_to);
sc 2899 dev/ic/ath.c ath_ledstate(sc, nstate);
sc 2902 dev/ic/ath.c timeout_del(&sc->sc_rssadapt_to);
sc 2903 dev/ic/ath.c sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
sc 2904 dev/ic/ath.c ath_hal_set_intr(ah, sc->sc_imask);
sc 2905 dev/ic/ath.c return (*sc->sc_newstate)(ic, nstate, arg);
sc 2908 dev/ic/ath.c error = ath_chan_set(sc, ni->ni_chan);
sc 2911 dev/ic/ath.c rfilt = ath_calcrxfilter(sc);
sc 2914 dev/ic/ath.c bssid = sc->sc_broadcast_addr;
sc 2953 dev/ic/ath.c error = ath_beacon_alloc(sc, ni);
sc 2961 dev/ic/ath.c ath_beacon_config(sc);
sc 2963 dev/ic/ath.c sc->sc_imask &= ~(HAL_INT_SWBA | HAL_INT_BMISS);
sc 2964 dev/ic/ath.c ath_hal_set_intr(ah, sc->sc_imask);
sc 2970 dev/ic/ath.c error = (*sc->sc_newstate)(ic, nstate, arg);
sc 2974 dev/ic/ath.c timeout_add(&sc->sc_cal_to, hz * ath_calinterval);
sc 2977 dev/ic/ath.c timeout_add(&sc->sc_rssadapt_to, hz / 10);
sc 2980 dev/ic/ath.c timeout_add(&sc->sc_scan_to, (hz * ath_dwelltime) / 1000);
sc 2990 dev/ic/ath.c struct ath_softc *sc = (struct ath_softc*)ic->ic_softc;
sc 2991 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 2993 dev/ic/ath.c (*sc->sc_recv_mgmt)(ic, m, ni, subtype, rssi, rstamp);
sc 3024 dev/ic/ath.c ath_getchannels(struct ath_softc *sc, HAL_BOOL outdoor, HAL_BOOL xchanmode)
sc 3026 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 3028 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 3032 dev/ic/ath.c sc->sc_nchan = 0;
sc 3061 dev/ic/ath.c sc->sc_dev.dv_xname, i, nchan, c->channel, c->channelFlags,
sc 3072 dev/ic/ath.c sc->sc_nchan++;
sc 3076 dev/ic/ath.c if (sc->sc_nchan < 1) {
sc 3090 dev/ic/ath.c ath_rate_setup(struct ath_softc *sc, u_int mode)
sc 3092 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 3093 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 3100 dev/ic/ath.c sc->sc_rates[mode] = ath_hal_get_rate_table(ah, HAL_MODE_11A);
sc 3103 dev/ic/ath.c sc->sc_rates[mode] = ath_hal_get_rate_table(ah, HAL_MODE_11B);
sc 3106 dev/ic/ath.c sc->sc_rates[mode] = ath_hal_get_rate_table(ah, HAL_MODE_11G);
sc 3109 dev/ic/ath.c sc->sc_rates[mode] = ath_hal_get_rate_table(ah, HAL_MODE_TURBO);
sc 3116 dev/ic/ath.c rt = sc->sc_rates[mode];
sc 3135 dev/ic/ath.c ath_setcurmode(struct ath_softc *sc, enum ieee80211_phymode mode)
sc 3140 dev/ic/ath.c memset(sc->sc_rixmap, 0xff, sizeof(sc->sc_rixmap));
sc 3141 dev/ic/ath.c rt = sc->sc_rates[mode];
sc 3144 dev/ic/ath.c sc->sc_rixmap[rt->info[i].dot11Rate & IEEE80211_RATE_VAL] = i;
sc 3145 dev/ic/ath.c bzero(sc->sc_hwmap, sizeof(sc->sc_hwmap));
sc 3147 dev/ic/ath.c sc->sc_hwmap[i] = rt->info[rt->rateCodeToIndex[i]].dot11Rate;
sc 3148 dev/ic/ath.c sc->sc_currates = rt;
sc 3149 dev/ic/ath.c sc->sc_curmode = mode;
sc 3163 dev/ic/ath.c struct ath_softc *sc = (struct ath_softc *)arg;
sc 3164 dev/ic/ath.c struct ieee80211com *ic = &sc->sc_ic;
sc 3172 dev/ic/ath.c timeout_add(&sc->sc_rssadapt_to, hz / 10);
sc 3211 dev/ic/ath.c ath_gpio_attach(struct ath_softc *sc, u_int16_t devid)
sc 3213 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 3222 dev/ic/ath.c sc->sc_gpio_pins[i].pin_num = i;
sc 3223 dev/ic/ath.c sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT |
sc 3228 dev/ic/ath.c sc->sc_gpio_pins[i].pin_flags = GPIO_PIN_INPUT;
sc 3231 dev/ic/ath.c sc->sc_gpio_pins[i].pin_state = ath_hal_get_gpio(ah, i) ?
sc 3238 dev/ic/ath.c sc->sc_softled = 1;
sc 3244 dev/ic/ath.c sc->sc_gpio_gc.gp_cookie = sc;
sc 3245 dev/ic/ath.c sc->sc_gpio_gc.gp_pin_read = ath_gpio_pin_read;
sc 3246 dev/ic/ath.c sc->sc_gpio_gc.gp_pin_write = ath_gpio_pin_write;
sc 3247 dev/ic/ath.c sc->sc_gpio_gc.gp_pin_ctl = ath_gpio_pin_ctl;
sc 3250 dev/ic/ath.c gba.gba_gc = &sc->sc_gpio_gc;
sc 3251 dev/ic/ath.c gba.gba_pins = sc->sc_gpio_pins;
sc 3256 dev/ic/ath.c if (config_found(&sc->sc_dev, &gba, gpiobus_print) == NULL)
sc 3267 dev/ic/ath.c struct ath_softc *sc = arg;
sc 3268 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 3275 dev/ic/ath.c struct ath_softc *sc = arg;
sc 3276 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 3283 dev/ic/ath.c struct ath_softc *sc = arg;
sc 3284 dev/ic/ath.c struct ath_hal *ah = sc->sc_ah;
sc 366 dev/ic/athvar.h #define ATH_IS_ENABLED(sc) ((sc)->sc_flags & ATH_ENABLED)
sc 158 dev/ic/atw.c #define DPRINTF(sc, x) if ((sc)->sc_ic.ic_if.if_flags & IFF_DEBUG) printf x
sc 159 dev/ic/atw.c #define DPRINTF2(sc, x) if ((sc)->sc_ic.ic_if.if_flags & IFF_DEBUG) ATW_DPRINTF2(x)
sc 160 dev/ic/atw.c #define DPRINTF3(sc, x) if ((sc)->sc_ic.ic_if.if_flags & IFF_DEBUG) ATW_DPRINTF3(x)
sc 166 dev/ic/atw.c int atw_rf3000_read(struct atw_softc *sc, u_int, u_int *);
sc 179 dev/ic/atw.c #define DPRINTF(sc, x) /* nothing */
sc 180 dev/ic/atw.c #define DPRINTF2(sc, x) /* nothing */
sc 181 dev/ic/atw.c #define DPRINTF3(sc, x) /* nothing */
sc 239 dev/ic/atw.c void atw_predict_beacon(struct atw_softc *sc);
sc 256 dev/ic/atw.c uint64_t atw_get_tsft(struct atw_softc *sc);
sc 325 dev/ic/atw.c struct atw_softc *sc = (struct atw_softc *)self;
sc 334 dev/ic/atw.c if_deactivate(&sc->sc_ic.ic_if);
sc 348 dev/ic/atw.c atw_enable(struct atw_softc *sc)
sc 351 dev/ic/atw.c if (ATW_IS_ENABLED(sc) == 0) {
sc 352 dev/ic/atw.c if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
sc 354 dev/ic/atw.c sc->sc_dev.dv_xname);
sc 357 dev/ic/atw.c sc->sc_flags |= ATWF_ENABLED;
sc 368 dev/ic/atw.c atw_disable(struct atw_softc *sc)
sc 370 dev/ic/atw.c if (!ATW_IS_ENABLED(sc))
sc 372 dev/ic/atw.c if (sc->sc_disable != NULL)
sc 373 dev/ic/atw.c (*sc->sc_disable)(sc);
sc 374 dev/ic/atw.c sc->sc_flags &= ~ATWF_ENABLED;
sc 379 dev/ic/atw.c atw_read_srom(struct atw_softc *sc)
sc 386 dev/ic/atw.c test0 = ATW_READ(sc, ATW_TEST0);
sc 388 dev/ic/atw.c switch (sc->sc_rev) {
sc 398 dev/ic/atw.c printf("%s: bad or missing/bad SROM\n", sc->sc_dev.dv_xname);
sc 404 dev/ic/atw.c ATW_DPRINTF(("%s: 93c66 SROM\n", sc->sc_dev.dv_xname));
sc 405 dev/ic/atw.c sc->sc_sromsz = 512;
sc 409 dev/ic/atw.c ATW_DPRINTF(("%s: 93c46 SROM\n", sc->sc_dev.dv_xname));
sc 410 dev/ic/atw.c sc->sc_sromsz = 128;
sc 414 dev/ic/atw.c printf("%s: unknown SROM type %d\n", sc->sc_dev.dv_xname,
sc 419 dev/ic/atw.c sc->sc_srom = malloc(sc->sc_sromsz, M_DEVBUF, M_NOWAIT);
sc 420 dev/ic/atw.c if (sc->sc_srom == NULL) {
sc 422 dev/ic/atw.c sc->sc_dev.dv_xname);
sc 426 dev/ic/atw.c (void)memset(sc->sc_srom, 0, sc->sc_sromsz);
sc 432 dev/ic/atw.c sd.sd_tag = sc->sc_st;
sc 433 dev/ic/atw.c sd.sd_bsh = sc->sc_sh;
sc 445 dev/ic/atw.c if (!read_seeprom(&sd, sc->sc_srom, 0, sc->sc_sromsz/2)) {
sc 446 dev/ic/atw.c printf("%s: could not read SROM\n", sc->sc_dev.dv_xname);
sc 447 dev/ic/atw.c free(sc->sc_srom, M_DEVBUF);
sc 454 dev/ic/atw.c for (i = 0; i < sc->sc_sromsz/2; i = i + 1) {
sc 458 dev/ic/atw.c ATW_DPRINTF((" 0x%x", sc->sc_srom[i]));
sc 468 dev/ic/atw.c atw_print_regs(struct atw_softc *sc, const char *where)
sc 470 dev/ic/atw.c #define PRINTREG(sc, reg) \
sc 472 dev/ic/atw.c sc->sc_dev.dv_xname, reg, ATW_READ(sc, reg)))
sc 474 dev/ic/atw.c ATW_DPRINTF2(("%s: %s\n", sc->sc_dev.dv_xname, where));
sc 476 dev/ic/atw.c PRINTREG(sc, ATW_PAR);
sc 477 dev/ic/atw.c PRINTREG(sc, ATW_FRCTL);
sc 478 dev/ic/atw.c PRINTREG(sc, ATW_TDR);
sc 479 dev/ic/atw.c PRINTREG(sc, ATW_WTDP);
sc 480 dev/ic/atw.c PRINTREG(sc, ATW_RDR);
sc 481 dev/ic/atw.c PRINTREG(sc, ATW_WRDP);
sc 482 dev/ic/atw.c PRINTREG(sc, ATW_RDB);
sc 483 dev/ic/atw.c PRINTREG(sc, ATW_CSR3A);
sc 484 dev/ic/atw.c PRINTREG(sc, ATW_TDBD);
sc 485 dev/ic/atw.c PRINTREG(sc, ATW_TDBP);
sc 486 dev/ic/atw.c PRINTREG(sc, ATW_STSR);
sc 487 dev/ic/atw.c PRINTREG(sc, ATW_CSR5A);
sc 488 dev/ic/atw.c PRINTREG(sc, ATW_NAR);
sc 489 dev/ic/atw.c PRINTREG(sc, ATW_CSR6A);
sc 490 dev/ic/atw.c PRINTREG(sc, ATW_IER);
sc 491 dev/ic/atw.c PRINTREG(sc, ATW_CSR7A);
sc 492 dev/ic/atw.c PRINTREG(sc, ATW_LPC);
sc 493 dev/ic/atw.c PRINTREG(sc, ATW_TEST1);
sc 494 dev/ic/atw.c PRINTREG(sc, ATW_SPR);
sc 495 dev/ic/atw.c PRINTREG(sc, ATW_TEST0);
sc 496 dev/ic/atw.c PRINTREG(sc, ATW_WCSR);
sc 497 dev/ic/atw.c PRINTREG(sc, ATW_WPDR);
sc 498 dev/ic/atw.c PRINTREG(sc, ATW_GPTMR);
sc 499 dev/ic/atw.c PRINTREG(sc, ATW_GPIO);
sc 500 dev/ic/atw.c PRINTREG(sc, ATW_BBPCTL);
sc 501 dev/ic/atw.c PRINTREG(sc, ATW_SYNCTL);
sc 502 dev/ic/atw.c PRINTREG(sc, ATW_PLCPHD);
sc 503 dev/ic/atw.c PRINTREG(sc, ATW_MMIWADDR);
sc 504 dev/ic/atw.c PRINTREG(sc, ATW_MMIRADDR1);
sc 505 dev/ic/atw.c PRINTREG(sc, ATW_MMIRADDR2);
sc 506 dev/ic/atw.c PRINTREG(sc, ATW_TXBR);
sc 507 dev/ic/atw.c PRINTREG(sc, ATW_CSR15A);
sc 508 dev/ic/atw.c PRINTREG(sc, ATW_ALCSTAT);
sc 509 dev/ic/atw.c PRINTREG(sc, ATW_TOFS2);
sc 510 dev/ic/atw.c PRINTREG(sc, ATW_CMDR);
sc 511 dev/ic/atw.c PRINTREG(sc, ATW_PCIC);
sc 512 dev/ic/atw.c PRINTREG(sc, ATW_PMCSR);
sc 513 dev/ic/atw.c PRINTREG(sc, ATW_PAR0);
sc 514 dev/ic/atw.c PRINTREG(sc, ATW_PAR1);
sc 515 dev/ic/atw.c PRINTREG(sc, ATW_MAR0);
sc 516 dev/ic/atw.c PRINTREG(sc, ATW_MAR1);
sc 517 dev/ic/atw.c PRINTREG(sc, ATW_ATIMDA0);
sc 518 dev/ic/atw.c PRINTREG(sc, ATW_ABDA1);
sc 519 dev/ic/atw.c PRINTREG(sc, ATW_BSSID0);
sc 520 dev/ic/atw.c PRINTREG(sc, ATW_TXLMT);
sc 521 dev/ic/atw.c PRINTREG(sc, ATW_MIBCNT);
sc 522 dev/ic/atw.c PRINTREG(sc, ATW_BCNT);
sc 523 dev/ic/atw.c PRINTREG(sc, ATW_TSFTH);
sc 524 dev/ic/atw.c PRINTREG(sc, ATW_TSC);
sc 525 dev/ic/atw.c PRINTREG(sc, ATW_SYNRF);
sc 526 dev/ic/atw.c PRINTREG(sc, ATW_BPLI);
sc 527 dev/ic/atw.c PRINTREG(sc, ATW_CAP0);
sc 528 dev/ic/atw.c PRINTREG(sc, ATW_CAP1);
sc 529 dev/ic/atw.c PRINTREG(sc, ATW_RMD);
sc 530 dev/ic/atw.c PRINTREG(sc, ATW_CFPP);
sc 531 dev/ic/atw.c PRINTREG(sc, ATW_TOFS0);
sc 532 dev/ic/atw.c PRINTREG(sc, ATW_TOFS1);
sc 533 dev/ic/atw.c PRINTREG(sc, ATW_IFST);
sc 534 dev/ic/atw.c PRINTREG(sc, ATW_RSPT);
sc 535 dev/ic/atw.c PRINTREG(sc, ATW_TSFTL);
sc 536 dev/ic/atw.c PRINTREG(sc, ATW_WEPCTL);
sc 537 dev/ic/atw.c PRINTREG(sc, ATW_WESK);
sc 538 dev/ic/atw.c PRINTREG(sc, ATW_WEPCNT);
sc 539 dev/ic/atw.c PRINTREG(sc, ATW_MACTEST);
sc 540 dev/ic/atw.c PRINTREG(sc, ATW_FER);
sc 541 dev/ic/atw.c PRINTREG(sc, ATW_FEMR);
sc 542 dev/ic/atw.c PRINTREG(sc, ATW_FPSR);
sc 543 dev/ic/atw.c PRINTREG(sc, ATW_FFER);
sc 568 dev/ic/atw.c atw_attach(struct atw_softc *sc)
sc 573 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 580 dev/ic/atw.c sc->sc_txth = atw_txthresh_tab_lo;
sc 582 dev/ic/atw.c SIMPLEQ_INIT(&sc->sc_txfreeq);
sc 583 dev/ic/atw.c SIMPLEQ_INIT(&sc->sc_txdirtyq);
sc 586 dev/ic/atw.c atw_print_regs(sc, "atw_attach");
sc 593 dev/ic/atw.c if ((error = bus_dmamem_alloc(sc->sc_dmat,
sc 594 dev/ic/atw.c sizeof(struct atw_control_data), PAGE_SIZE, 0, &sc->sc_cdseg,
sc 595 dev/ic/atw.c 1, &sc->sc_cdnseg, 0)) != 0) {
sc 597 dev/ic/atw.c sc->sc_dev.dv_xname, error);
sc 601 dev/ic/atw.c if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg,
sc 602 dev/ic/atw.c sizeof(struct atw_control_data), (caddr_t *)&sc->sc_control_data,
sc 605 dev/ic/atw.c sc->sc_dev.dv_xname, error);
sc 609 dev/ic/atw.c if ((error = bus_dmamap_create(sc->sc_dmat,
sc 611 dev/ic/atw.c sizeof(struct atw_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
sc 613 dev/ic/atw.c "error = %d\n", sc->sc_dev.dv_xname, error);
sc 617 dev/ic/atw.c if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
sc 618 dev/ic/atw.c sc->sc_control_data, sizeof(struct atw_control_data), NULL,
sc 621 dev/ic/atw.c sc->sc_dev.dv_xname, error);
sc 628 dev/ic/atw.c sc->sc_ntxsegs = ATW_NTXSEGS;
sc 630 dev/ic/atw.c if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 631 dev/ic/atw.c sc->sc_ntxsegs, MCLBYTES, 0, 0,
sc 632 dev/ic/atw.c &sc->sc_txsoft[i].txs_dmamap)) != 0) {
sc 634 dev/ic/atw.c "error = %d\n", sc->sc_dev.dv_xname, i, error);
sc 643 dev/ic/atw.c if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 644 dev/ic/atw.c MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) {
sc 646 dev/ic/atw.c "error = %d\n", sc->sc_dev.dv_xname, i, error);
sc 651 dev/ic/atw.c sc->sc_rxsoft[i].rxs_mbuf = NULL;
sc 654 dev/ic/atw.c switch (sc->sc_rev) {
sc 657 dev/ic/atw.c sc->sc_sramlen = ATW_SRAM_A_SIZE;
sc 661 dev/ic/atw.c sc->sc_sramlen = ATW_SRAM_B_SIZE;
sc 666 dev/ic/atw.c atw_reset(sc);
sc 668 dev/ic/atw.c if (atw_read_srom(sc) == -1)
sc 671 dev/ic/atw.c sc->sc_rftype = MASK_AND_RSHIFT(sc->sc_srom[ATW_SR_CSR20],
sc 674 dev/ic/atw.c sc->sc_bbptype = MASK_AND_RSHIFT(sc->sc_srom[ATW_SR_CSR20],
sc 677 dev/ic/atw.c if (sc->sc_rftype >= sizeof(type_strings)/sizeof(type_strings[0])) {
sc 678 dev/ic/atw.c printf("%s: unknown RF\n", sc->sc_dev.dv_xname);
sc 681 dev/ic/atw.c if (sc->sc_bbptype >= sizeof(type_strings)/sizeof(type_strings[0])) {
sc 682 dev/ic/atw.c printf("%s: unknown BBP\n", sc->sc_dev.dv_xname);
sc 686 dev/ic/atw.c printf("%s: MAC %s, BBP %s, RF %s", sc->sc_dev.dv_xname,
sc 687 dev/ic/atw.c atw_printmac(sc->sc_rev), type_strings[sc->sc_bbptype],
sc 688 dev/ic/atw.c type_strings[sc->sc_rftype]);
sc 694 dev/ic/atw.c reg = LSHIFT(sc->sc_rftype, ATW_SYNCTL_RFTYPE_MASK);
sc 696 dev/ic/atw.c switch (sc->sc_rftype) {
sc 707 dev/ic/atw.c sc->sc_synctl_rd = reg | ATW_SYNCTL_RD;
sc 708 dev/ic/atw.c sc->sc_synctl_wr = reg | ATW_SYNCTL_WR;
sc 710 dev/ic/atw.c reg = LSHIFT(sc->sc_bbptype, ATW_BBPCTL_TYPE_MASK);
sc 712 dev/ic/atw.c switch (sc->sc_bbptype) {
sc 724 dev/ic/atw.c sc->sc_dev.dv_xname);
sc 728 dev/ic/atw.c sc->sc_bbpctl_wr = reg | ATW_BBPCTL_WR;
sc 729 dev/ic/atw.c sc->sc_bbpctl_rd = reg | ATW_BBPCTL_RD;
sc 736 dev/ic/atw.c sc->sc_flags |= ATWF_ATTACHED /* | ATWF_RTSCTS */;
sc 739 dev/ic/atw.c htole16(sc->sc_srom[ATW_SR_MAC00]),
sc 740 dev/ic/atw.c htole16(sc->sc_srom[ATW_SR_MAC01]),
sc 741 dev/ic/atw.c htole16(sc->sc_srom[ATW_SR_MAC10])));
sc 743 dev/ic/atw.c srom_major = MASK_AND_RSHIFT(sc->sc_srom[ATW_SR_FORMAT_VERSION],
sc 747 dev/ic/atw.c sc->sc_rf3000_options1 = 0;
sc 748 dev/ic/atw.c else if (sc->sc_rev == ATW_REVISION_BA) {
sc 749 dev/ic/atw.c sc->sc_rf3000_options1 =
sc 750 dev/ic/atw.c MASK_AND_RSHIFT(sc->sc_srom[ATW_SR_CR28_CR03],
sc 753 dev/ic/atw.c sc->sc_rf3000_options1 = 0;
sc 755 dev/ic/atw.c sc->sc_rf3000_options2 = MASK_AND_RSHIFT(sc->sc_srom[ATW_SR_CTRY_CR29],
sc 758 dev/ic/atw.c country_code = MASK_AND_RSHIFT(sc->sc_srom[ATW_SR_CTRY_CR29],
sc 796 dev/ic/atw.c reg = ATW_READ(sc, ATW_PAR0);
sc 801 dev/ic/atw.c reg = ATW_READ(sc, ATW_PAR1);
sc 812 dev/ic/atw.c memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 813 dev/ic/atw.c ifp->if_softc = sc;
sc 839 dev/ic/atw.c sc->sc_newstate = ic->ic_newstate;
sc 842 dev/ic/atw.c sc->sc_recv_mgmt = ic->ic_recv_mgmt;
sc 845 dev/ic/atw.c sc->sc_node_free = ic->ic_node_free;
sc 848 dev/ic/atw.c sc->sc_node_alloc = ic->ic_node_alloc;
sc 858 dev/ic/atw.c timeout_set(&sc->sc_scan_to, atw_next_scan, sc);
sc 861 dev/ic/atw.c bpfattach(&sc->sc_radiobpf, ifp, DLT_IEEE802_11_RADIO,
sc 868 dev/ic/atw.c sc->sc_sdhook = shutdownhook_establish(atw_shutdown, sc);
sc 869 dev/ic/atw.c if (sc->sc_sdhook == NULL)
sc 871 dev/ic/atw.c sc->sc_dev.dv_xname);
sc 877 dev/ic/atw.c sc->sc_powerhook = powerhook_establish(atw_power, sc);
sc 878 dev/ic/atw.c if (sc->sc_powerhook == NULL)
sc 880 dev/ic/atw.c sc->sc_dev.dv_xname);
sc 882 dev/ic/atw.c memset(&sc->sc_rxtapu, 0, sizeof(sc->sc_rxtapu));
sc 883 dev/ic/atw.c sc->sc_rxtap.ar_ihdr.it_len = sizeof(sc->sc_rxtapu);
sc 884 dev/ic/atw.c sc->sc_rxtap.ar_ihdr.it_present = ATW_RX_RADIOTAP_PRESENT;
sc 886 dev/ic/atw.c memset(&sc->sc_txtapu, 0, sizeof(sc->sc_txtapu));
sc 887 dev/ic/atw.c sc->sc_txtap.at_ihdr.it_len = sizeof(sc->sc_txtapu);
sc 888 dev/ic/atw.c sc->sc_txtap.at_ihdr.it_present = ATW_TX_RADIOTAP_PRESENT;
sc 898 dev/ic/atw.c if (sc->sc_rxsoft[i].rxs_dmamap == NULL)
sc 900 dev/ic/atw.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_rxsoft[i].rxs_dmamap);
sc 904 dev/ic/atw.c if (sc->sc_txsoft[i].txs_dmamap == NULL)
sc 906 dev/ic/atw.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_txsoft[i].txs_dmamap);
sc 908 dev/ic/atw.c bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
sc 910 dev/ic/atw.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
sc 912 dev/ic/atw.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
sc 915 dev/ic/atw.c bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg);
sc 923 dev/ic/atw.c struct atw_softc *sc = (struct atw_softc *)ic->ic_if.if_softc;
sc 924 dev/ic/atw.c struct ieee80211_node *ni = (*sc->sc_node_alloc)(ic);
sc 926 dev/ic/atw.c DPRINTF(sc, ("%s: alloc node %p\n", sc->sc_dev.dv_xname, ni));
sc 933 dev/ic/atw.c struct atw_softc *sc = (struct atw_softc *)ic->ic_if.if_softc;
sc 935 dev/ic/atw.c DPRINTF(sc, ("%s: freeing node %p %s\n", sc->sc_dev.dv_xname, ni,
sc 937 dev/ic/atw.c (*sc->sc_node_free)(ic, ni);
sc 942 dev/ic/atw.c atw_test1_reset(struct atw_softc *sc)
sc 944 dev/ic/atw.c switch (sc->sc_rev) {
sc 947 dev/ic/atw.c ATW_SET(sc, ATW_TEST1, ATW_TEST1_TESTMODE_MONITOR);
sc 951 dev/ic/atw.c ATW_CLR(sc, ATW_TEST1, ATW_TEST1_TESTMODE_MASK);
sc 964 dev/ic/atw.c atw_reset(struct atw_softc *sc)
sc 969 dev/ic/atw.c ATW_WRITE(sc, ATW_NAR, 0x0);
sc 975 dev/ic/atw.c ATW_WRITE(sc, ATW_FRCTL, 0x0);
sc 977 dev/ic/atw.c ATW_WRITE(sc, ATW_PAR, ATW_PAR_SWR);
sc 980 dev/ic/atw.c if (ATW_READ(sc, ATW_PAR) == 0)
sc 988 dev/ic/atw.c DPRINTF2(sc, ("%s: atw_reset %d iterations\n", sc->sc_dev.dv_xname, i));
sc 990 dev/ic/atw.c if (ATW_ISSET(sc, ATW_PAR, ATW_PAR_SWR))
sc 991 dev/ic/atw.c printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname);
sc 993 dev/ic/atw.c atw_test1_reset(sc);
sc 997 dev/ic/atw.c sc->sc_busmode = ATW_PAR_PBL_8DW;
sc 999 dev/ic/atw.c ATW_WRITE(sc, ATW_PAR, sc->sc_busmode);
sc 1000 dev/ic/atw.c DPRINTF(sc, ("%s: ATW_PAR %08x busmode %08x\n", sc->sc_dev.dv_xname,
sc 1001 dev/ic/atw.c ATW_READ(sc, ATW_PAR), sc->sc_busmode));
sc 1008 dev/ic/atw.c ATW_WRITE(sc, ATW_FRCTL, 0x0);
sc 1013 dev/ic/atw.c ATW_SET(sc, ATW_TEST0, ATW_TEST0_EPRLD);
sc 1017 dev/ic/atw.c lpc = ATW_READ(sc, ATW_LPC);
sc 1019 dev/ic/atw.c DPRINTF(sc, ("%s: ATW_LPC %#08x\n", __func__, lpc));
sc 1024 dev/ic/atw.c atw_clear_sram(sc);
sc 1026 dev/ic/atw.c memset(sc->sc_bssid, 0xff, sizeof(sc->sc_bssid));
sc 1030 dev/ic/atw.c atw_clear_sram(struct atw_softc *sc)
sc 1032 dev/ic/atw.c memset(sc->sc_sram, 0, sizeof(sc->sc_sram));
sc 1034 dev/ic/atw.c atw_write_sram(sc, 0, sc->sc_sram, sc->sc_sramlen);
sc 1049 dev/ic/atw.c atw_wcsr_init(struct atw_softc *sc)
sc 1053 dev/ic/atw.c wcsr = ATW_READ(sc, ATW_WCSR);
sc 1056 dev/ic/atw.c ATW_WRITE(sc, ATW_WCSR, wcsr); /* XXX resets wake-up status bits */
sc 1058 dev/ic/atw.c DPRINTF(sc, ("%s: %s reg[WCSR] = %08x\n",
sc 1059 dev/ic/atw.c sc->sc_dev.dv_xname, __func__, ATW_READ(sc, ATW_WCSR)));
sc 1064 dev/ic/atw.c atw_cmdr_init(struct atw_softc *sc)
sc 1067 dev/ic/atw.c cmdr = ATW_READ(sc, ATW_CMDR);
sc 1073 dev/ic/atw.c ATW_WRITE(sc, ATW_CMDR, cmdr);
sc 1077 dev/ic/atw.c atw_tofs2_init(struct atw_softc *sc)
sc 1101 dev/ic/atw.c ATW_WRITE(sc, ATW_TOFS2, tofs2);
sc 1105 dev/ic/atw.c atw_nar_init(struct atw_softc *sc)
sc 1107 dev/ic/atw.c ATW_WRITE(sc, ATW_NAR, ATW_NAR_SF|ATW_NAR_PB);
sc 1111 dev/ic/atw.c atw_txlmt_init(struct atw_softc *sc)
sc 1113 dev/ic/atw.c ATW_WRITE(sc, ATW_TXLMT, LSHIFT(512, ATW_TXLMT_MTMLT_MASK) |
sc 1118 dev/ic/atw.c atw_test1_init(struct atw_softc *sc)
sc 1122 dev/ic/atw.c test1 = ATW_READ(sc, ATW_TEST1);
sc 1126 dev/ic/atw.c ATW_WRITE(sc, ATW_TEST1, test1);
sc 1130 dev/ic/atw.c atw_rf_reset(struct atw_softc *sc)
sc 1134 dev/ic/atw.c ATW_WRITE(sc, ATW_SYNRF, ATW_SYNRF_INTERSIL_EN);
sc 1136 dev/ic/atw.c ATW_WRITE(sc, ATW_SYNRF, 0);
sc 1142 dev/ic/atw.c atw_cfp_init(struct atw_softc *sc)
sc 1146 dev/ic/atw.c cfpp = ATW_READ(sc, ATW_CFPP);
sc 1149 dev/ic/atw.c ATW_WRITE(sc, ATW_CFPP, cfpp);
sc 1153 dev/ic/atw.c atw_tofs0_init(struct atw_softc *sc)
sc 1163 dev/ic/atw.c ATW_WRITE(sc, ATW_TOFS0,
sc 1170 dev/ic/atw.c atw_ifs_init(struct atw_softc *sc)
sc 1182 dev/ic/atw.c ATW_WRITE(sc, ATW_IFST, ifst);
sc 1186 dev/ic/atw.c atw_response_times_init(struct atw_softc *sc)
sc 1194 dev/ic/atw.c ATW_WRITE(sc, ATW_RSPT, LSHIFT(0xffff, ATW_RSPT_MART_MASK) |
sc 1203 dev/ic/atw.c atw_bbp_io_init(struct atw_softc *sc)
sc 1210 dev/ic/atw.c switch (sc->sc_rev) {
sc 1216 dev/ic/atw.c mmiraddr2 = ATW_READ(sc, ATW_MMIRADDR2);
sc 1222 dev/ic/atw.c switch (sc->sc_bbptype) {
sc 1224 dev/ic/atw.c ATW_WRITE(sc, ATW_MMIWADDR, ATW_MMIWADDR_INTERSIL);
sc 1225 dev/ic/atw.c ATW_WRITE(sc, ATW_MMIRADDR1, ATW_MMIRADDR1_INTERSIL);
sc 1233 dev/ic/atw.c ATW_WRITE(sc, ATW_MMIWADDR, ATW_MMIWADDR_RFMD);
sc 1234 dev/ic/atw.c ATW_WRITE(sc, ATW_MMIRADDR1, ATW_MMIRADDR1_RFMD);
sc 1238 dev/ic/atw.c ATW_WRITE(sc, ATW_MMIRADDR2, mmiraddr2);
sc 1240 dev/ic/atw.c atw_si4126_init(sc);
sc 1242 dev/ic/atw.c ATW_WRITE(sc, ATW_MACTEST, ATW_MACTEST_MMI_USETXCLK);
sc 1246 dev/ic/atw.c atw_si4126_init(struct atw_softc *sc)
sc 1248 dev/ic/atw.c switch (sc->sc_rftype) {
sc 1250 dev/ic/atw.c if (sc->sc_rev >= ATW_REVISION_BA) {
sc 1251 dev/ic/atw.c atw_si4126_write(sc, 0x1f, 0x00000);
sc 1252 dev/ic/atw.c atw_si4126_write(sc, 0x0c, 0x3001f);
sc 1253 dev/ic/atw.c atw_si4126_write(sc, SI4126_GAIN, 0x29c03);
sc 1254 dev/ic/atw.c atw_si4126_write(sc, SI4126_RF1N, 0x1ff6f);
sc 1255 dev/ic/atw.c atw_si4126_write(sc, SI4126_RF2N, 0x29403);
sc 1256 dev/ic/atw.c atw_si4126_write(sc, SI4126_RF2R, 0x1456f);
sc 1257 dev/ic/atw.c atw_si4126_write(sc, 0x09, 0x10050);
sc 1258 dev/ic/atw.c atw_si4126_write(sc, SI4126_IFR, 0x3fff8);
sc 1274 dev/ic/atw.c struct atw_softc *sc = ifp->if_softc;
sc 1275 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 1280 dev/ic/atw.c if ((error = atw_enable(sc)) != 0)
sc 1289 dev/ic/atw.c DPRINTF(sc, ("%s: channel %d freq %d flags 0x%04x\n",
sc 1293 dev/ic/atw.c atw_wcsr_init(sc);
sc 1295 dev/ic/atw.c atw_cmdr_init(sc);
sc 1301 dev/ic/atw.c ATW_WRITE(sc, ATW_PLCPHD, LSHIFT(10, ATW_PLCPHD_SIGNAL_MASK) |
sc 1304 dev/ic/atw.c atw_tofs2_init(sc);
sc 1306 dev/ic/atw.c atw_nar_init(sc);
sc 1308 dev/ic/atw.c atw_txlmt_init(sc);
sc 1310 dev/ic/atw.c atw_test1_init(sc);
sc 1312 dev/ic/atw.c atw_rf_reset(sc);
sc 1314 dev/ic/atw.c atw_cfp_init(sc);
sc 1316 dev/ic/atw.c atw_tofs0_init(sc);
sc 1318 dev/ic/atw.c atw_ifs_init(sc);
sc 1323 dev/ic/atw.c ATW_WRITE(sc, ATW_RMD,
sc 1326 dev/ic/atw.c atw_response_times_init(sc);
sc 1328 dev/ic/atw.c atw_bbp_io_init(sc);
sc 1330 dev/ic/atw.c ATW_WRITE(sc, ATW_STSR, 0xffffffff);
sc 1332 dev/ic/atw.c if ((error = atw_rf3000_init(sc)) != 0)
sc 1335 dev/ic/atw.c ATW_WRITE(sc, ATW_PAR, sc->sc_busmode);
sc 1336 dev/ic/atw.c DPRINTF(sc, ("%s: ATW_PAR %08x busmode %08x\n", sc->sc_dev.dv_xname,
sc 1337 dev/ic/atw.c ATW_READ(sc, ATW_PAR), sc->sc_busmode));
sc 1342 dev/ic/atw.c memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs));
sc 1344 dev/ic/atw.c sc->sc_txdescs[i].at_ctl = 0;
sc 1346 dev/ic/atw.c sc->sc_txdescs[i].at_flags = 0 /* ATW_TXFLAG_TCH */;
sc 1347 dev/ic/atw.c sc->sc_txdescs[i].at_buf2 =
sc 1348 dev/ic/atw.c htole32(ATW_CDTXADDR(sc, ATW_NEXTTX(i)));
sc 1351 dev/ic/atw.c sc->sc_txdescs[ATW_NTXDESC - 1].at_flags |= htole32(ATW_TXFLAG_TER);
sc 1352 dev/ic/atw.c ATW_CDTXSYNC(sc, 0, ATW_NTXDESC,
sc 1354 dev/ic/atw.c sc->sc_txfree = ATW_NTXDESC;
sc 1355 dev/ic/atw.c sc->sc_txnext = 0;
sc 1360 dev/ic/atw.c SIMPLEQ_INIT(&sc->sc_txfreeq);
sc 1361 dev/ic/atw.c SIMPLEQ_INIT(&sc->sc_txdirtyq);
sc 1363 dev/ic/atw.c txs = &sc->sc_txsoft[i];
sc 1365 dev/ic/atw.c SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
sc 1373 dev/ic/atw.c rxs = &sc->sc_rxsoft[i];
sc 1375 dev/ic/atw.c if ((error = atw_add_rxbuf(sc, i)) != 0) {
sc 1378 dev/ic/atw.c sc->sc_dev.dv_xname, i, error);
sc 1383 dev/ic/atw.c atw_rxdrain(sc);
sc 1387 dev/ic/atw.c ATW_INIT_RXDESC(sc, i);
sc 1389 dev/ic/atw.c sc->sc_rxptr = 0;
sc 1395 dev/ic/atw.c sc->sc_inten = ATW_INTR_TCI | ATW_INTR_TDU | ATW_INTR_RCI |
sc 1399 dev/ic/atw.c sc->sc_inten |= ATW_INTR_TPS | ATW_INTR_TLT | ATW_INTR_TRT |
sc 1403 dev/ic/atw.c sc->sc_linkint_mask = ATW_INTR_LINKON | ATW_INTR_LINKOFF |
sc 1405 dev/ic/atw.c sc->sc_rxint_mask = ATW_INTR_RCI | ATW_INTR_RDU;
sc 1406 dev/ic/atw.c sc->sc_txint_mask = ATW_INTR_TCI | ATW_INTR_TUF | ATW_INTR_TLT |
sc 1409 dev/ic/atw.c sc->sc_linkint_mask &= sc->sc_inten;
sc 1410 dev/ic/atw.c sc->sc_rxint_mask &= sc->sc_inten;
sc 1411 dev/ic/atw.c sc->sc_txint_mask &= sc->sc_inten;
sc 1413 dev/ic/atw.c ATW_WRITE(sc, ATW_IER, sc->sc_inten);
sc 1414 dev/ic/atw.c ATW_WRITE(sc, ATW_STSR, 0xffffffff);
sc 1416 dev/ic/atw.c DPRINTF(sc, ("%s: ATW_IER %08x, inten %08x\n",
sc 1417 dev/ic/atw.c sc->sc_dev.dv_xname, ATW_READ(sc, ATW_IER), sc->sc_inten));
sc 1422 dev/ic/atw.c ATW_WRITE(sc, ATW_RDB, ATW_CDRXADDR(sc, sc->sc_rxptr));
sc 1423 dev/ic/atw.c ATW_WRITE(sc, ATW_TDBD, ATW_CDTXADDR(sc, sc->sc_txnext));
sc 1425 dev/ic/atw.c sc->sc_txthresh = 0;
sc 1426 dev/ic/atw.c sc->sc_opmode = ATW_NAR_SR | ATW_NAR_ST |
sc 1427 dev/ic/atw.c sc->sc_txth[sc->sc_txthresh].txth_opmode;
sc 1455 dev/ic/atw.c sc->sc_wepctl = 0;
sc 1457 dev/ic/atw.c atw_write_ssid(sc);
sc 1458 dev/ic/atw.c atw_write_sup_rates(sc);
sc 1460 dev/ic/atw.c atw_write_wep(sc);
sc 1468 dev/ic/atw.c atw_filter_setup(sc);
sc 1473 dev/ic/atw.c ATW_WRITE(sc, ATW_RDR, 0x1);
sc 1482 dev/ic/atw.c atw_start_beacon(sc, 0);
sc 1492 dev/ic/atw.c printf("%s: interface not running\n", sc->sc_dev.dv_xname);
sc 1495 dev/ic/atw.c atw_print_regs(sc, "end of init");
sc 1509 dev/ic/atw.c atw_bbp_io_enable(struct atw_softc *sc, int enable)
sc 1512 dev/ic/atw.c ATW_WRITE(sc, ATW_SYNRF,
sc 1516 dev/ic/atw.c ATW_WRITE(sc, ATW_SYNRF, 0);
sc 1522 dev/ic/atw.c atw_tune(struct atw_softc *sc)
sc 1526 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 1532 dev/ic/atw.c if (chan == sc->sc_cur_chan)
sc 1535 dev/ic/atw.c DPRINTF(sc, ("%s: chan %d -> %d\n", sc->sc_dev.dv_xname,
sc 1536 dev/ic/atw.c sc->sc_cur_chan, chan));
sc 1538 dev/ic/atw.c atw_idle(sc, ATW_NAR_SR|ATW_NAR_ST);
sc 1540 dev/ic/atw.c atw_si4126_tune(sc, chan);
sc 1541 dev/ic/atw.c if ((rc = atw_rf3000_tune(sc, chan)) != 0)
sc 1542 dev/ic/atw.c printf("%s: failed to tune channel %d\n", sc->sc_dev.dv_xname,
sc 1545 dev/ic/atw.c ATW_WRITE(sc, ATW_NAR, sc->sc_opmode);
sc 1547 dev/ic/atw.c ATW_WRITE(sc, ATW_RDR, 0x1);
sc 1550 dev/ic/atw.c sc->sc_cur_chan = chan;
sc 1557 dev/ic/atw.c atw_si4126_print(struct atw_softc *sc)
sc 1559 dev/ic/atw.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1566 dev/ic/atw.c printf("%s: synth[%d] = ", sc->sc_dev.dv_xname, addr);
sc 1567 dev/ic/atw.c if (atw_si4126_read(sc, addr, &val) == 0) {
sc 1594 dev/ic/atw.c atw_si4126_tune(struct atw_softc *sc, u_int chan)
sc 1602 dev/ic/atw.c atw_si4126_print(sc);
sc 1605 dev/ic/atw.c if (sc->sc_rev >= ATW_REVISION_BA) {
sc 1606 dev/ic/atw.c atw_si4126_write(sc, SI4126_MAIN, 0x04007);
sc 1607 dev/ic/atw.c atw_si4126_write(sc, SI4126_POWER, 0x00033);
sc 1608 dev/ic/atw.c atw_si4126_write(sc, SI4126_IFN,
sc 1610 dev/ic/atw.c atw_si4126_write(sc, SI4126_RF1R,
sc 1614 dev/ic/atw.c atw_si4126_write(sc, 0x0a,
sc 1615 dev/ic/atw.c (sc->sc_srom[ATW_SR_CSR20] & mask) |
sc 1619 dev/ic/atw.c atw_si4126_write(sc, 0x09, 0x00050 |
sc 1620 dev/ic/atw.c sc->sc_srom[ATW_SR_TXPOWER(chan - 1)]);
sc 1647 dev/ic/atw.c atw_si4126_write(sc, SI4126_POWER,
sc 1651 dev/ic/atw.c atw_si4126_write(sc, SI4126_MAIN,
sc 1662 dev/ic/atw.c atw_si4126_write(sc, SI4126_GAIN, gain);
sc 1672 dev/ic/atw.c atw_si4126_write(sc, SI4126_IFN, 1496);
sc 1674 dev/ic/atw.c atw_si4126_write(sc, SI4126_IFR, R);
sc 1681 dev/ic/atw.c atw_si4126_write(sc, SI4126_RF1R, R);
sc 1683 dev/ic/atw.c atw_si4126_write(sc, SI4126_RF1N, mhz - 374);
sc 1690 dev/ic/atw.c atw_si4126_write(sc, SI4126_RF2R, R);
sc 1692 dev/ic/atw.c atw_si4126_write(sc, SI4126_RF2N, mhz - 374);
sc 1697 dev/ic/atw.c gpio = ATW_READ(sc, ATW_GPIO);
sc 1701 dev/ic/atw.c if ((sc->sc_if.if_flags & IFF_LINK1) != 0 && chan != 14) {
sc 1709 dev/ic/atw.c ATW_WRITE(sc, ATW_GPIO, gpio);
sc 1712 dev/ic/atw.c atw_si4126_print(sc);
sc 1724 dev/ic/atw.c atw_rf3000_init(struct atw_softc *sc)
sc 1728 dev/ic/atw.c atw_bbp_io_enable(sc, 1);
sc 1731 dev/ic/atw.c rc = atw_rf3000_write(sc, RF3000_CCACTL,
sc 1738 dev/ic/atw.c rc = atw_rf3000_write(sc, RF3000_DIVCTL, RF3000_DIVCTL_ENABLE);
sc 1744 dev/ic/atw.c rc = atw_rf3000_write(sc, RF3000_GAINCTL,
sc 1751 dev/ic/atw.c rc = atw_rf3000_write(sc, RF3000_LOGAINCAL,
sc 1757 dev/ic/atw.c rc = atw_rf3000_write(sc, RF3000_HIGAINCAL, RF3000_HIGAINCAL_DSSSPAD);
sc 1767 dev/ic/atw.c rc = atw_rf3000_write(sc, RF3000_OPTIONS1, sc->sc_rf3000_options1);
sc 1772 dev/ic/atw.c rc = atw_rf3000_write(sc, RF3000_OPTIONS2, sc->sc_rf3000_options2);
sc 1778 dev/ic/atw.c atw_bbp_io_enable(sc, 0);
sc 1784 dev/ic/atw.c atw_rf3000_print(struct atw_softc *sc)
sc 1786 dev/ic/atw.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1793 dev/ic/atw.c printf("%s: bbp[%d] = \n", sc->sc_dev.dv_xname, addr);
sc 1794 dev/ic/atw.c if (atw_rf3000_read(sc, addr, &val) != 0) {
sc 1805 dev/ic/atw.c atw_rf3000_tune(struct atw_softc *sc, u_int chan)
sc 1811 dev/ic/atw.c txpower = sc->sc_srom[ATW_SR_TXPOWER(chan)];
sc 1812 dev/ic/atw.c lpf_cutoff = sc->sc_srom[ATW_SR_LPF_CUTOFF(chan)];
sc 1813 dev/ic/atw.c lna_gs_thresh = sc->sc_srom[ATW_SR_LNA_GS_THRESH(chan)];
sc 1827 dev/ic/atw.c atw_rf3000_print(sc);
sc 1830 dev/ic/atw.c DPRINTF(sc, ("%s: chan %d txpower %02x, lpf_cutoff %02x, "
sc 1832 dev/ic/atw.c sc->sc_dev.dv_xname, chan, txpower, lpf_cutoff, lna_gs_thresh));
sc 1834 dev/ic/atw.c atw_bbp_io_enable(sc, 1);
sc 1836 dev/ic/atw.c if ((rc = atw_rf3000_write(sc, RF3000_GAINCTL,
sc 1840 dev/ic/atw.c if ((rc = atw_rf3000_write(sc, RF3000_LOGAINCAL, lpf_cutoff)) != 0)
sc 1843 dev/ic/atw.c if ((rc = atw_rf3000_write(sc, RF3000_HIGAINCAL, lna_gs_thresh)) != 0)
sc 1846 dev/ic/atw.c if ((rc = atw_rf3000_write(sc, RF3000_OPTIONS1, 0x0)) != 0)
sc 1849 dev/ic/atw.c rc = atw_rf3000_write(sc, RF3000_OPTIONS2, RF3000_OPTIONS2_LNAGS_DELAY);
sc 1854 dev/ic/atw.c atw_rf3000_print(sc);
sc 1858 dev/ic/atw.c atw_bbp_io_enable(sc, 0);
sc 1861 dev/ic/atw.c reg = ATW_READ(sc, ATW_PLCPHD);
sc 1865 dev/ic/atw.c ATW_WRITE(sc, ATW_PLCPHD, reg);
sc 1877 dev/ic/atw.c atw_rf3000_write(struct atw_softc *sc, u_int addr, u_int val)
sc 1882 dev/ic/atw.c reg = sc->sc_bbpctl_wr |
sc 1887 dev/ic/atw.c ATW_WRITE(sc, ATW_BBPCTL, reg);
sc 1889 dev/ic/atw.c if (ATW_ISSET(sc, ATW_BBPCTL, ATW_BBPCTL_WR) == 0)
sc 1894 dev/ic/atw.c printf("%s: BBPCTL still busy\n", sc->sc_dev.dv_xname);
sc 1915 dev/ic/atw.c atw_rf3000_read(struct atw_softc *sc, u_int addr, u_int *val)
sc 1921 dev/ic/atw.c if (ATW_ISSET(sc, ATW_BBPCTL, ATW_BBPCTL_RD|ATW_BBPCTL_WR) == 0)
sc 1928 dev/ic/atw.c sc->sc_dev.dv_xname);
sc 1932 dev/ic/atw.c reg = sc->sc_bbpctl_rd | LSHIFT(addr & 0x7f, ATW_BBPCTL_ADDR_MASK);
sc 1934 dev/ic/atw.c ATW_WRITE(sc, ATW_BBPCTL, reg);
sc 1938 dev/ic/atw.c if (ATW_ISSET(sc, ATW_BBPCTL, ATW_BBPCTL_RD) == 0)
sc 1942 dev/ic/atw.c ATW_CLR(sc, ATW_BBPCTL, ATW_BBPCTL_RD);
sc 1946 dev/ic/atw.c sc->sc_dev.dv_xname, reg);
sc 1963 dev/ic/atw.c atw_si4126_write(struct atw_softc *sc, u_int addr, u_int val)
sc 1968 dev/ic/atw.c if (sc->sc_rev >= ATW_REVISION_BA) {
sc 1988 dev/ic/atw.c ATW_WRITE(sc, ATW_SYNRF, reg | ATW_SYNRF_LEIF);
sc 1989 dev/ic/atw.c ATW_WRITE(sc, ATW_SYNRF, reg);
sc 1996 dev/ic/atw.c ATW_WRITE(sc, ATW_SYNRF, reg);
sc 1997 dev/ic/atw.c ATW_WRITE(sc, ATW_SYNRF, reg | ATW_SYNRF_SYNCLK);
sc 1998 dev/ic/atw.c ATW_WRITE(sc, ATW_SYNRF, reg);
sc 2000 dev/ic/atw.c ATW_WRITE(sc, ATW_SYNRF, reg | ATW_SYNRF_LEIF);
sc 2001 dev/ic/atw.c ATW_WRITE(sc, ATW_SYNRF, 0x0);
sc 2012 dev/ic/atw.c atw_si4126_read(struct atw_softc *sc, u_int addr, u_int *val)
sc 2020 dev/ic/atw.c if (ATW_ISSET(sc, ATW_SYNCTL, ATW_SYNCTL_RD|ATW_SYNCTL_WR) == 0)
sc 2027 dev/ic/atw.c sc->sc_dev.dv_xname);
sc 2031 dev/ic/atw.c reg = sc->sc_synctl_rd | LSHIFT(addr, ATW_SYNCTL_DATA_MASK);
sc 2033 dev/ic/atw.c ATW_WRITE(sc, ATW_SYNCTL, reg);
sc 2037 dev/ic/atw.c if (ATW_ISSET(sc, ATW_SYNCTL, ATW_SYNCTL_RD) == 0)
sc 2041 dev/ic/atw.c ATW_CLR(sc, ATW_SYNCTL, ATW_SYNCTL_RD);
sc 2045 dev/ic/atw.c sc->sc_dev.dv_xname, reg);
sc 2049 dev/ic/atw.c *val = MASK_AND_RSHIFT(ATW_READ(sc, ATW_SYNCTL),
sc 2065 dev/ic/atw.c atw_filter_setup(struct atw_softc *sc)
sc 2067 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 2073 dev/ic/atw.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 2085 dev/ic/atw.c atw_idle(sc, ATW_NAR_SR);
sc 2087 dev/ic/atw.c sc->sc_opmode &= ~(ATW_NAR_PR|ATW_NAR_MM);
sc 2094 dev/ic/atw.c sc->sc_opmode |= ATW_NAR_PR;
sc 2112 dev/ic/atw.c sc->sc_opmode |= ATW_NAR_MM;
sc 2118 dev/ic/atw.c sc->sc_opmode |= ATW_NAR_MM;
sc 2123 dev/ic/atw.c ATW_WRITE(sc, ATW_MAR0, hashes[0]);
sc 2124 dev/ic/atw.c ATW_WRITE(sc, ATW_MAR1, hashes[1]);
sc 2125 dev/ic/atw.c ATW_WRITE(sc, ATW_NAR, sc->sc_opmode);
sc 2127 dev/ic/atw.c ATW_WRITE(sc, ATW_RDR, 0x1);
sc 2129 dev/ic/atw.c DPRINTF(sc, ("%s: ATW_NAR %08x opmode %08x\n", sc->sc_dev.dv_xname,
sc 2130 dev/ic/atw.c ATW_READ(sc, ATW_NAR), sc->sc_opmode));
sc 2140 dev/ic/atw.c atw_write_bssid(struct atw_softc *sc)
sc 2142 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 2147 dev/ic/atw.c ATW_WRITE(sc, ATW_BSSID0,
sc 2153 dev/ic/atw.c ATW_WRITE(sc, ATW_ABDA1,
sc 2154 dev/ic/atw.c (ATW_READ(sc, ATW_ABDA1) &
sc 2159 dev/ic/atw.c DPRINTF(sc, ("%s: BSSID %s -> ", sc->sc_dev.dv_xname,
sc 2160 dev/ic/atw.c ether_sprintf(sc->sc_bssid)));
sc 2161 dev/ic/atw.c DPRINTF(sc, ("%s\n", ether_sprintf(bssid)));
sc 2163 dev/ic/atw.c memcpy(sc->sc_bssid, bssid, sizeof(sc->sc_bssid));
sc 2170 dev/ic/atw.c atw_write_sram(struct atw_softc *sc, u_int ofs, u_int8_t *buf, u_int buflen)
sc 2175 dev/ic/atw.c memcpy(&sc->sc_sram[ofs], buf, buflen);
sc 2179 dev/ic/atw.c KASSERT(buflen + ofs <= sc->sc_sramlen);
sc 2181 dev/ic/atw.c ptr = &sc->sc_sram[ofs];
sc 2184 dev/ic/atw.c ATW_WRITE(sc, ATW_WEPCTL, ATW_WEPCTL_WR |
sc 2188 dev/ic/atw.c ATW_WRITE(sc, ATW_WESK,
sc 2192 dev/ic/atw.c ATW_WRITE(sc, ATW_WEPCTL, sc->sc_wepctl); /* restore WEP condition */
sc 2194 dev/ic/atw.c if (sc->sc_if.if_flags & IFF_DEBUG) {
sc 2197 dev/ic/atw.c sc->sc_dev.dv_xname, buflen, ofs, sc->sc_wepctl);
sc 2210 dev/ic/atw.c atw_write_wep(struct atw_softc *sc)
sc 2212 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 2221 dev/ic/atw.c sc->sc_wepctl = 0;
sc 2222 dev/ic/atw.c ATW_WRITE(sc, ATW_WEPCTL, sc->sc_wepctl);
sc 2244 dev/ic/atw.c reg = ATW_READ(sc, ATW_MACTEST);
sc 2248 dev/ic/atw.c ATW_WRITE(sc, ATW_MACTEST, reg);
sc 2250 dev/ic/atw.c sc->sc_wepctl = ATW_WEPCTL_WEPENABLE;
sc 2252 dev/ic/atw.c switch (sc->sc_rev) {
sc 2256 dev/ic/atw.c sc->sc_wepctl |= ATW_WEPCTL_WEPRXBYP;
sc 2263 dev/ic/atw.c atw_write_sram(sc, ATW_SRAM_ADDR_SHARED_KEY, (u_int8_t*)&buf[0][0],
sc 2268 dev/ic/atw.c atw_change_ibss(struct atw_softc *sc)
sc 2270 dev/ic/atw.c atw_predict_beacon(sc);
sc 2271 dev/ic/atw.c atw_write_bssid(sc);
sc 2272 dev/ic/atw.c atw_start_beacon(sc, 1);
sc 2279 dev/ic/atw.c struct atw_softc *sc = (struct atw_softc*)ic->ic_softc;
sc 2283 dev/ic/atw.c sc->sc_rev < ATW_REVISION_BA)
sc 2286 dev/ic/atw.c (*sc->sc_recv_mgmt)(ic, m, ni, subtype, rssi, rstamp);
sc 2294 dev/ic/atw.c if (ieee80211_ibss_merge(ic, ni, atw_get_tsft(sc)) == ENETRESET)
sc 2295 dev/ic/atw.c atw_change_ibss(sc);
sc 2310 dev/ic/atw.c atw_write_ssid(struct atw_softc *sc)
sc 2312 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 2322 dev/ic/atw.c atw_write_sram(sc, ATW_SRAM_ADDR_SSID, buf,
sc 2331 dev/ic/atw.c atw_write_sup_rates(struct atw_softc *sc)
sc 2333 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 2346 dev/ic/atw.c atw_write_sram(sc, ATW_SRAM_ADDR_SUPRATES, buf, sizeof(buf));
sc 2351 dev/ic/atw.c atw_start_beacon(struct atw_softc *sc, int start)
sc 2353 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 2358 dev/ic/atw.c if (ATW_IS_ENABLED(sc) == 0)
sc 2370 dev/ic/atw.c bcnt = ATW_READ(sc, ATW_BCNT) & ~ATW_BCNT_BCNT_MASK;
sc 2371 dev/ic/atw.c cap0 = ATW_READ(sc, ATW_CAP0) & ~ATW_CAP0_CHN_MASK;
sc 2372 dev/ic/atw.c cap1 = ATW_READ(sc, ATW_CAP1) & ~ATW_CAP1_CAPI_MASK;
sc 2374 dev/ic/atw.c ATW_WRITE(sc, ATW_BCNT, bcnt);
sc 2375 dev/ic/atw.c ATW_WRITE(sc, ATW_CAP1, cap1);
sc 2383 dev/ic/atw.c if (sc->sc_flags & ATWF_SHORT_PREAMBLE)
sc 2414 dev/ic/atw.c ATW_WRITE(sc, ATW_BCNT, bcnt);
sc 2415 dev/ic/atw.c ATW_WRITE(sc, ATW_BPLI, bpli);
sc 2416 dev/ic/atw.c ATW_WRITE(sc, ATW_CAP0, cap0);
sc 2417 dev/ic/atw.c ATW_WRITE(sc, ATW_CAP1, cap1);
sc 2419 dev/ic/atw.c DPRINTF(sc, ("%s: atw_start_beacon reg[ATW_BCNT] = %08x\n",
sc 2420 dev/ic/atw.c sc->sc_dev.dv_xname, bcnt));
sc 2421 dev/ic/atw.c DPRINTF(sc, ("%s: atw_start_beacon reg[ATW_CAP1] = %08x\n",
sc 2422 dev/ic/atw.c sc->sc_dev.dv_xname, cap1));
sc 2446 dev/ic/atw.c atw_get_tsft(struct atw_softc *sc)
sc 2451 dev/ic/atw.c tsfth = ATW_READ(sc, ATW_TSFTH);
sc 2452 dev/ic/atw.c tsftl = ATW_READ(sc, ATW_TSFTL);
sc 2453 dev/ic/atw.c if (ATW_READ(sc, ATW_TSFTH) == tsfth)
sc 2466 dev/ic/atw.c atw_predict_beacon(struct atw_softc *sc)
sc 2470 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 2481 dev/ic/atw.c tsft = atw_get_tsft(sc);
sc 2505 dev/ic/atw.c ATW_WRITE(sc, ATW_TOFS1,
sc 2516 dev/ic/atw.c struct atw_softc *sc = arg;
sc 2517 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 2533 dev/ic/atw.c struct atw_softc *sc = ifp->if_softc;
sc 2538 dev/ic/atw.c timeout_del(&sc->sc_scan_to);
sc 2539 dev/ic/atw.c sc->sc_cur_chan = IEEE80211_CHAN_ANY;
sc 2540 dev/ic/atw.c atw_start_beacon(sc, 0);
sc 2541 dev/ic/atw.c return (*sc->sc_newstate)(ic, nstate, arg);
sc 2544 dev/ic/atw.c if ((error = atw_tune(sc)) != 0)
sc 2554 dev/ic/atw.c timeout_add(&sc->sc_scan_to, atw_dwelltime * hz / 1000);
sc 2561 dev/ic/atw.c atw_write_bssid(sc);
sc 2562 dev/ic/atw.c atw_write_ssid(sc);
sc 2563 dev/ic/atw.c atw_write_sup_rates(sc);
sc 2572 dev/ic/atw.c ATW_WRITE(sc, ATW_BPLI,
sc 2577 dev/ic/atw.c DPRINTF(sc, ("%s: reg[ATW_BPLI] = %08x\n",
sc 2578 dev/ic/atw.c sc->sc_dev.dv_xname, ATW_READ(sc, ATW_BPLI)));
sc 2580 dev/ic/atw.c atw_predict_beacon(sc);
sc 2585 dev/ic/atw.c timeout_del(&sc->sc_scan_to);
sc 2590 dev/ic/atw.c atw_start_beacon(sc, 1);
sc 2592 dev/ic/atw.c atw_start_beacon(sc, 0);
sc 2594 dev/ic/atw.c error = (*sc->sc_newstate)(ic, nstate, arg);
sc 2597 dev/ic/atw.c atw_write_bssid(sc);
sc 2608 dev/ic/atw.c atw_add_rxbuf(struct atw_softc *sc, int idx)
sc 2610 dev/ic/atw.c struct atw_rxsoft *rxs = &sc->sc_rxsoft[idx];
sc 2625 dev/ic/atw.c bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
sc 2629 dev/ic/atw.c error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap,
sc 2634 dev/ic/atw.c sc->sc_dev.dv_xname, idx, error);
sc 2638 dev/ic/atw.c bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
sc 2641 dev/ic/atw.c ATW_INIT_RXDESC(sc, idx);
sc 2650 dev/ic/atw.c atw_txdrain(struct atw_softc *sc)
sc 2654 dev/ic/atw.c while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
sc 2655 dev/ic/atw.c SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs_q);
sc 2657 dev/ic/atw.c bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
sc 2661 dev/ic/atw.c SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
sc 2663 dev/ic/atw.c sc->sc_tx_timer = 0;
sc 2674 dev/ic/atw.c struct atw_softc *sc = ifp->if_softc;
sc 2675 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 2686 dev/ic/atw.c ATW_WRITE(sc, ATW_IER, 0);
sc 2689 dev/ic/atw.c sc->sc_opmode = 0;
sc 2690 dev/ic/atw.c ATW_WRITE(sc, ATW_NAR, 0);
sc 2692 dev/ic/atw.c ATW_WRITE(sc, ATW_TDBD, 0);
sc 2693 dev/ic/atw.c ATW_WRITE(sc, ATW_TDBP, 0);
sc 2694 dev/ic/atw.c ATW_WRITE(sc, ATW_RDB, 0);
sc 2696 dev/ic/atw.c atw_txdrain(sc);
sc 2699 dev/ic/atw.c atw_rxdrain(sc);
sc 2700 dev/ic/atw.c atw_disable(sc);
sc 2704 dev/ic/atw.c atw_reset(sc);
sc 2713 dev/ic/atw.c atw_rxdrain(struct atw_softc *sc)
sc 2719 dev/ic/atw.c rxs = &sc->sc_rxsoft[i];
sc 2722 dev/ic/atw.c bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
sc 2734 dev/ic/atw.c atw_detach(struct atw_softc *sc)
sc 2736 dev/ic/atw.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 2744 dev/ic/atw.c if ((sc->sc_flags & ATWF_ATTACHED) == 0)
sc 2747 dev/ic/atw.c timeout_del(&sc->sc_scan_to);
sc 2753 dev/ic/atw.c rxs = &sc->sc_rxsoft[i];
sc 2755 dev/ic/atw.c bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
sc 2759 dev/ic/atw.c bus_dmamap_destroy(sc->sc_dmat, rxs->rxs_dmamap);
sc 2762 dev/ic/atw.c txs = &sc->sc_txsoft[i];
sc 2764 dev/ic/atw.c bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
sc 2768 dev/ic/atw.c bus_dmamap_destroy(sc->sc_dmat, txs->txs_dmamap);
sc 2770 dev/ic/atw.c bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
sc 2771 dev/ic/atw.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
sc 2772 dev/ic/atw.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
sc 2774 dev/ic/atw.c bus_dmamem_free(sc->sc_dmat, &sc->sc_cdseg, sc->sc_cdnseg);
sc 2776 dev/ic/atw.c if (sc->sc_sdhook != NULL)
sc 2777 dev/ic/atw.c shutdownhook_disestablish(sc->sc_sdhook);
sc 2778 dev/ic/atw.c if (sc->sc_powerhook != NULL)
sc 2779 dev/ic/atw.c powerhook_disestablish(sc->sc_powerhook);
sc 2781 dev/ic/atw.c if (sc->sc_srom)
sc 2782 dev/ic/atw.c free(sc->sc_srom, M_DEVBUF);
sc 2791 dev/ic/atw.c struct atw_softc *sc = arg;
sc 2793 dev/ic/atw.c atw_stop(&sc->sc_ic.ic_if, 1);
sc 2799 dev/ic/atw.c struct atw_softc *sc = arg;
sc 2800 dev/ic/atw.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 2805 dev/ic/atw.c if (ATW_IS_ENABLED(sc) == 0)
sc 2806 dev/ic/atw.c panic("%s: atw_intr: not enabled", sc->sc_dev.dv_xname);
sc 2814 dev/ic/atw.c (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
sc 2818 dev/ic/atw.c status = ATW_READ(sc, ATW_STSR);
sc 2821 dev/ic/atw.c ATW_WRITE(sc, ATW_STSR, status);
sc 2835 dev/ic/atw.c sc->sc_dev.dv_xname, status);
sc 2860 dev/ic/atw.c if ((status & sc->sc_inten) == 0)
sc 2865 dev/ic/atw.c rxstatus = status & sc->sc_rxint_mask;
sc 2866 dev/ic/atw.c txstatus = status & sc->sc_txint_mask;
sc 2867 dev/ic/atw.c linkstatus = status & sc->sc_linkint_mask;
sc 2870 dev/ic/atw.c atw_linkintr(sc, linkstatus);
sc 2875 dev/ic/atw.c atw_rxintr(sc);
sc 2879 dev/ic/atw.c sc->sc_dev.dv_xname);
sc 2881 dev/ic/atw.c ATW_WRITE(sc, ATW_RDR, 0x1);
sc 2888 dev/ic/atw.c atw_txintr(sc);
sc 2891 dev/ic/atw.c DPRINTF(sc, ("%s: tx lifetime exceeded\n",
sc 2892 dev/ic/atw.c sc->sc_dev.dv_xname));
sc 2895 dev/ic/atw.c DPRINTF(sc, ("%s: tx retry limit exceeded\n",
sc 2896 dev/ic/atw.c sc->sc_dev.dv_xname));
sc 2901 dev/ic/atw.c txthresh = sc->sc_txthresh + 1;
sc 2903 dev/ic/atw.c sc->sc_txth[txthresh].txth_name != NULL) {
sc 2905 dev/ic/atw.c atw_idle(sc, ATW_NAR_ST);
sc 2907 dev/ic/atw.c sc->sc_txthresh = txthresh;
sc 2908 dev/ic/atw.c sc->sc_opmode &= ~(ATW_NAR_TR_MASK|ATW_NAR_SF);
sc 2909 dev/ic/atw.c sc->sc_opmode |=
sc 2910 dev/ic/atw.c sc->sc_txth[txthresh].txth_opmode;
sc 2912 dev/ic/atw.c "threshold: %s\n", sc->sc_dev.dv_xname,
sc 2913 dev/ic/atw.c sc->sc_txth[txthresh].txth_name);
sc 2918 dev/ic/atw.c ATW_WRITE(sc, ATW_NAR, sc->sc_opmode);
sc 2920 dev/ic/atw.c ATW_WRITE(sc, ATW_RDR, 0x1);
sc 2930 dev/ic/atw.c sc->sc_dev.dv_xname);
sc 2933 dev/ic/atw.c sc->sc_dev.dv_xname);
sc 2939 dev/ic/atw.c printf("%s: fatal bus error\n", sc->sc_dev.dv_xname);
sc 2977 dev/ic/atw.c atw_idle(struct atw_softc *sc, u_int32_t bits)
sc 2984 dev/ic/atw.c opmode = sc->sc_opmode & ~bits;
sc 2995 dev/ic/atw.c ATW_WRITE(sc, ATW_NAR, opmode);
sc 2999 dev/ic/atw.c stsr = ATW_READ(sc, ATW_STSR);
sc 3005 dev/ic/atw.c ATW_WRITE(sc, ATW_STSR, stsr & ackmask);
sc 3010 dev/ic/atw.c test0 = ATW_READ(sc, ATW_TEST0);
sc 3014 dev/ic/atw.c DPRINTF2(sc, ("%s: transmit process not idle [%s]\n",
sc 3015 dev/ic/atw.c sc->sc_dev.dv_xname,
sc 3017 dev/ic/atw.c DPRINTF2(sc, ("%s: bits %08x test0 %08x stsr %08x\n",
sc 3018 dev/ic/atw.c sc->sc_dev.dv_xname, bits, test0, stsr));
sc 3023 dev/ic/atw.c DPRINTF2(sc, ("%s: receive process not idle [%s]\n",
sc 3024 dev/ic/atw.c sc->sc_dev.dv_xname,
sc 3026 dev/ic/atw.c DPRINTF2(sc, ("%s: bits %08x test0 %08x stsr %08x\n",
sc 3027 dev/ic/atw.c sc->sc_dev.dv_xname, bits, test0, stsr));
sc 3031 dev/ic/atw.c atw_txdrain(sc);
sc 3042 dev/ic/atw.c atw_linkintr(struct atw_softc *sc, u_int32_t linkstatus)
sc 3044 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 3050 dev/ic/atw.c DPRINTF(sc, ("%s: link on\n", sc->sc_dev.dv_xname));
sc 3051 dev/ic/atw.c sc->sc_rescan_timer = 0;
sc 3053 dev/ic/atw.c DPRINTF(sc, ("%s: link off\n", sc->sc_dev.dv_xname));
sc 3056 dev/ic/atw.c sc->sc_rescan_timer = 3;
sc 3062 dev/ic/atw.c atw_hw_decrypted(struct atw_softc *sc, struct ieee80211_frame *wh)
sc 3064 dev/ic/atw.c if ((sc->sc_ic.ic_flags & IEEE80211_F_WEPON) == 0)
sc 3068 dev/ic/atw.c return (sc->sc_wepctl & ATW_WEPCTL_WEPRXBYP) == 0;
sc 3077 dev/ic/atw.c atw_rxintr(struct atw_softc *sc)
sc 3080 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 3090 dev/ic/atw.c for (i = sc->sc_rxptr;; i = ATW_NEXTRX(i)) {
sc 3091 dev/ic/atw.c rxs = &sc->sc_rxsoft[i];
sc 3093 dev/ic/atw.c ATW_CDRXSYNC(sc, i, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
sc 3095 dev/ic/atw.c rxstat = letoh32(sc->sc_rxdescs[i].ar_stat);
sc 3096 dev/ic/atw.c rssi0 = letoh32(sc->sc_rxdescs[i].ar_rssi);
sc 3102 dev/ic/atw.c DPRINTF3(sc,
sc 3104 dev/ic/atw.c sc->sc_dev.dv_xname,
sc 3106 dev/ic/atw.c letoh32(sc->sc_rxdescs[i].ar_buf1),
sc 3107 dev/ic/atw.c letoh32(sc->sc_rxdescs[i].ar_buf2)));
sc 3116 dev/ic/atw.c sc->sc_dev.dv_xname);
sc 3131 dev/ic/atw.c ((sc->sc_ic.ic_if.if_capabilities & IFCAP_VLAN_MTU) == 0 ||
sc 3133 dev/ic/atw.c ((sc->sc_ic.ic_ec.ec_capenable & ETHERCAP_VLAN_MTU) == 0 ||
sc 3142 dev/ic/atw.c sc->sc_dev.dv_xname, str)
sc 3152 dev/ic/atw.c ATW_INIT_RXDESC(sc, i);
sc 3156 dev/ic/atw.c bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
sc 3171 dev/ic/atw.c if (atw_add_rxbuf(sc, i) != 0) {
sc 3173 dev/ic/atw.c ATW_INIT_RXDESC(sc, i);
sc 3174 dev/ic/atw.c bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
sc 3180 dev/ic/atw.c if (sc->sc_opmode & ATW_NAR_PR)
sc 3197 dev/ic/atw.c if (sc->sc_bbptype == ATW_BBPTYPE_RFMD)
sc 3204 dev/ic/atw.c if (sc->sc_radiobpf != NULL) {
sc 3207 dev/ic/atw.c struct atw_rx_radiotap_header *tap = &sc->sc_rxtap;
sc 3223 dev/ic/atw.c bpf_mtap(sc->sc_radiobpf, &mb, BPF_DIRECTION_IN);
sc 3230 dev/ic/atw.c if (atw_hw_decrypted(sc, wh))
sc 3243 dev/ic/atw.c sc->sc_rxptr = i;
sc 3252 dev/ic/atw.c atw_txintr(struct atw_softc *sc)
sc 3258 dev/ic/atw.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 3262 dev/ic/atw.c DPRINTF3(sc, ("%s: atw_txintr: sc_flags 0x%08x\n",
sc 3263 dev/ic/atw.c sc->sc_dev.dv_xname, sc->sc_flags));
sc 3271 dev/ic/atw.c while ((txs = SIMPLEQ_FIRST(&sc->sc_txdirtyq)) != NULL) {
sc 3272 dev/ic/atw.c ATW_CDTXSYNC(sc, txs->txs_lastdesc, 1,
sc 3279 dev/ic/atw.c ATW_CDTXSYNC(sc, txs->txs_firstdesc,
sc 3285 dev/ic/atw.c letoh32(sc->sc_txdescs[i].at_stat));
sc 3287 dev/ic/atw.c letoh32(sc->sc_txdescs[i].at_flags));
sc 3289 dev/ic/atw.c letoh32(sc->sc_txdescs[i].at_buf1));
sc 3291 dev/ic/atw.c letoh32(sc->sc_txdescs[i].at_buf2));
sc 3298 dev/ic/atw.c txstat = letoh32(sc->sc_txdescs[txs->txs_lastdesc].at_stat);
sc 3302 dev/ic/atw.c SIMPLEQ_REMOVE_HEAD(&sc->sc_txdirtyq, txs_q);
sc 3304 dev/ic/atw.c sc->sc_txfree += txs->txs_ndescs;
sc 3306 dev/ic/atw.c bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap,
sc 3309 dev/ic/atw.c bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
sc 3313 dev/ic/atw.c SIMPLEQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
sc 3318 dev/ic/atw.c printf("%s: txstat %b %d\n", sc->sc_dev.dv_xname,
sc 3325 dev/ic/atw.c printf("%s: txstat %s %d\n", sc->sc_dev.dv_xname,
sc 3335 dev/ic/atw.c sc->sc_stats.ts_tx_tuf++;
sc 3337 dev/ic/atw.c sc->sc_stats.ts_tx_tlt++;
sc 3339 dev/ic/atw.c sc->sc_stats.ts_tx_trt++;
sc 3341 dev/ic/atw.c sc->sc_stats.ts_tx_tro++;
sc 3343 dev/ic/atw.c sc->sc_stats.ts_tx_sofbr++;
sc 3360 dev/ic/atw.c sc->sc_tx_timer = 0;
sc 3373 dev/ic/atw.c struct atw_softc *sc = ifp->if_softc;
sc 3374 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 3378 dev/ic/atw.c if (ATW_IS_ENABLED(sc) == 0)
sc 3381 dev/ic/atw.c if (sc->sc_rescan_timer) {
sc 3382 dev/ic/atw.c if (--sc->sc_rescan_timer == 0)
sc 3385 dev/ic/atw.c if (sc->sc_tx_timer) {
sc 3386 dev/ic/atw.c if (--sc->sc_tx_timer == 0 &&
sc 3387 dev/ic/atw.c !SIMPLEQ_EMPTY(&sc->sc_txdirtyq)) {
sc 3394 dev/ic/atw.c if (sc->sc_tx_timer != 0 || sc->sc_rescan_timer != 0)
sc 3402 dev/ic/atw.c if (sc->sc_rev == ATW_REVISION_BA) {
sc 3403 dev/ic/atw.c test1 = ATW_READ(sc, ATW_TEST1);
sc 3585 dev/ic/atw.c struct atw_softc *sc = ifp->if_softc;
sc 3589 dev/ic/atw.c printf("%s: %d-byte packet\n", sc->sc_dev.dv_xname,
sc 3602 dev/ic/atw.c (noctets % 24 != 0) ? "\n" : "", sc->sc_dev.dv_xname, noctets);
sc 3614 dev/ic/atw.c struct atw_softc *sc = ifp->if_softc;
sc 3615 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 3626 dev/ic/atw.c DPRINTF2(sc, ("%s: atw_start: sc_flags 0x%08x, if_flags 0x%08x\n",
sc 3627 dev/ic/atw.c sc->sc_dev.dv_xname, sc->sc_flags, ifp->if_flags));
sc 3636 dev/ic/atw.c ofree = sc->sc_txfree;
sc 3637 dev/ic/atw.c firsttx = sc->sc_txnext;
sc 3639 dev/ic/atw.c DPRINTF2(sc, ("%s: atw_start: txfree %d, txnext %d\n",
sc 3640 dev/ic/atw.c sc->sc_dev.dv_xname, ofree, firsttx));
sc 3647 dev/ic/atw.c while ((txs = SIMPLEQ_FIRST(&sc->sc_txfreeq)) != NULL &&
sc 3648 dev/ic/atw.c sc->sc_txfree != 0) {
sc 3674 dev/ic/atw.c if (sc->sc_ic.ic_flags & IEEE80211_F_WEPON) {
sc 3694 dev/ic/atw.c (sc->sc_if.if_flags & (IFF_DEBUG|IFF_LINK2)) ==
sc 3696 dev/ic/atw.c DPRINTF2(sc, ("%s: fail compute duration\n", __func__));
sc 3714 dev/ic/atw.c if (sc->sc_radiobpf != NULL) {
sc 3716 dev/ic/atw.c struct atw_tx_radiotap_header *tap = &sc->sc_txtap;
sc 3730 dev/ic/atw.c bpf_mtap(sc->sc_radiobpf, &mb, BPF_DIRECTION_OUT);
sc 3764 dev/ic/atw.c sc->sc_dev.dv_xname);
sc 3805 dev/ic/atw.c } else if (sc->sc_flags & ATWF_RTSCTS) {
sc 3815 dev/ic/atw.c sc->sc_dev.dv_xname, ether_sprintf(hh->atw_dst),
sc 3821 dev/ic/atw.c sc->sc_dev.dv_xname, hh->atw_fc[0], hh->atw_fc[1],
sc 3827 dev/ic/atw.c sc->sc_dev.dv_xname, hh->atw_hdrctl,
sc 3831 dev/ic/atw.c sc->sc_dev.dv_xname, hh->atw_keyid);
sc 3844 dev/ic/atw.c (error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
sc 3850 dev/ic/atw.c sc->sc_dev.dv_xname);
sc 3857 dev/ic/atw.c "cluster\n", sc->sc_dev.dv_xname);
sc 3870 dev/ic/atw.c "error = %d\n", sc->sc_dev.dv_xname, error);
sc 3879 dev/ic/atw.c if (dmamap->dm_nsegs > sc->sc_txfree) {
sc 3890 dev/ic/atw.c bus_dmamap_unload(sc->sc_dmat, dmamap);
sc 3900 dev/ic/atw.c bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
sc 3908 dev/ic/atw.c DPRINTF2(sc, ("%s: TXDR <- max(10, %d)\n",
sc 3909 dev/ic/atw.c sc->sc_dev.dv_xname, rate * 5));
sc 3915 dev/ic/atw.c for (nexttx = sc->sc_txnext, seg = 0;
sc 3924 dev/ic/atw.c txd = &sc->sc_txdescs[nexttx];
sc 3940 dev/ic/atw.c sc->sc_txdescs[sc->sc_txnext].at_flags |=
sc 3942 dev/ic/atw.c sc->sc_txdescs[lasttx].at_flags |= htole32(ATW_TXFLAG_LS);
sc 3947 dev/ic/atw.c for (seg = sc->sc_txnext;; seg = ATW_NEXTTX(seg)) {
sc 3950 dev/ic/atw.c letoh32(sc->sc_txdescs[seg].at_ctl));
sc 3952 dev/ic/atw.c letoh32(sc->sc_txdescs[seg].at_flags));
sc 3954 dev/ic/atw.c letoh32(sc->sc_txdescs[seg].at_buf1));
sc 3956 dev/ic/atw.c letoh32(sc->sc_txdescs[seg].at_buf2));
sc 3964 dev/ic/atw.c ATW_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs,
sc 3973 dev/ic/atw.c txs->txs_firstdesc = sc->sc_txnext;
sc 3978 dev/ic/atw.c sc->sc_txfree -= dmamap->dm_nsegs;
sc 3979 dev/ic/atw.c sc->sc_txnext = nexttx;
sc 3981 dev/ic/atw.c SIMPLEQ_REMOVE_HEAD(&sc->sc_txfreeq, txs_q);
sc 3982 dev/ic/atw.c SIMPLEQ_INSERT_TAIL(&sc->sc_txdirtyq, txs, txs_q);
sc 3987 dev/ic/atw.c if (txs == NULL || sc->sc_txfree == 0) {
sc 3992 dev/ic/atw.c if (sc->sc_txfree != ofree) {
sc 3993 dev/ic/atw.c DPRINTF2(sc, ("%s: packets enqueued, IC on %d, OWN on %d\n",
sc 3994 dev/ic/atw.c sc->sc_dev.dv_xname, lasttx, firsttx));
sc 3999 dev/ic/atw.c sc->sc_txdescs[lasttx].at_flags |= htole32(ATW_TXFLAG_IC);
sc 4000 dev/ic/atw.c ATW_CDTXSYNC(sc, lasttx, 1,
sc 4007 dev/ic/atw.c sc->sc_txdescs[firsttx].at_ctl |= htole32(ATW_TXCTL_OWN);
sc 4008 dev/ic/atw.c ATW_CDTXSYNC(sc, firsttx, 1,
sc 4012 dev/ic/atw.c ATW_WRITE(sc, ATW_TDR, 0x1);
sc 4015 dev/ic/atw.c sc->sc_tx_timer = 5;
sc 4028 dev/ic/atw.c struct atw_softc *sc = arg;
sc 4029 dev/ic/atw.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 4032 dev/ic/atw.c DPRINTF(sc, ("%s: atw_power(%d,)\n", sc->sc_dev.dv_xname, why));
sc 4041 dev/ic/atw.c if (sc->sc_power != NULL)
sc 4042 dev/ic/atw.c (*sc->sc_power)(sc, why);
sc 4046 dev/ic/atw.c if (sc->sc_power != NULL)
sc 4047 dev/ic/atw.c (*sc->sc_power)(sc, why);
sc 4069 dev/ic/atw.c struct atw_softc *sc = ifp->if_softc;
sc 4070 dev/ic/atw.c struct ieee80211com *ic = &sc->sc_ic;
sc 4076 dev/ic/atw.c if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
sc 4099 dev/ic/atw.c if (ATW_IS_ENABLED(sc)) {
sc 4105 dev/ic/atw.c atw_filter_setup(sc);
sc 4108 dev/ic/atw.c } else if (ATW_IS_ENABLED(sc))
sc 4115 dev/ic/atw.c ether_addmulti(ifr, &sc->sc_ic.ic_ac) :
sc 4116 dev/ic/atw.c ether_delmulti(ifr, &sc->sc_ic.ic_ac);
sc 4118 dev/ic/atw.c ether_addmulti(ifr, &sc->sc_ic.ic_ec) :
sc 4119 dev/ic/atw.c ether_delmulti(ifr, &sc->sc_ic.ic_ec);
sc 4124 dev/ic/atw.c atw_filter_setup(sc); /* do not rescan */
sc 4131 dev/ic/atw.c if (ATW_IS_ENABLED(sc))
sc 4140 dev/ic/atw.c if (ATW_IS_ENABLED(sc))
sc 4165 dev/ic/atw.c struct atw_softc *sc = ifp->if_softc;
sc 4167 dev/ic/atw.c if (ATW_IS_ENABLED(sc) == 0) {
sc 376 dev/ic/atwvar.h #define ATW_IS_ENABLED(sc) ((sc)->sc_flags & ATWF_ENABLED)
sc 378 dev/ic/atwvar.h #define ATW_CDTXADDR(sc, x) ((sc)->sc_cddma + ATW_CDTXOFF((x)))
sc 379 dev/ic/atwvar.h #define ATW_CDRXADDR(sc, x) ((sc)->sc_cddma + ATW_CDRXOFF((x)))
sc 381 dev/ic/atwvar.h #define ATW_CDTXSYNC(sc, x, n, ops) \
sc 390 dev/ic/atwvar.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 398 dev/ic/atwvar.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 402 dev/ic/atwvar.h #define ATW_CDRXSYNC(sc, x, ops) \
sc 403 dev/ic/atwvar.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 411 dev/ic/atwvar.h #define ATW_INIT_RXDESC(sc, x) \
sc 413 dev/ic/atwvar.h struct atw_rxsoft *__rxs = &sc->sc_rxsoft[(x)]; \
sc 414 dev/ic/atwvar.h struct atw_rxdesc *__rxd = &sc->sc_rxdescs[(x)]; \
sc 420 dev/ic/atwvar.h htole32(ATW_CDRXADDR((sc), ATW_NEXTRX((x)))); \
sc 428 dev/ic/atwvar.h ATW_CDRXSYNC((sc), (x), \
sc 444 dev/ic/atwvar.h #define ATW_READ(sc, reg) \
sc 445 dev/ic/atwvar.h bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
sc 447 dev/ic/atwvar.h #define ATW_WRITE(sc, reg, val) \
sc 448 dev/ic/atwvar.h bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sc 450 dev/ic/atwvar.h #define ATW_SET(sc, reg, mask) \
sc 451 dev/ic/atwvar.h ATW_WRITE((sc), (reg), ATW_READ((sc), (reg)) | (mask))
sc 453 dev/ic/atwvar.h #define ATW_CLR(sc, reg, mask) \
sc 454 dev/ic/atwvar.h ATW_WRITE((sc), (reg), ATW_READ((sc), (reg)) & ~(mask))
sc 456 dev/ic/atwvar.h #define ATW_ISSET(sc, reg, mask) \
sc 457 dev/ic/atwvar.h (ATW_READ((sc), (reg)) & (mask))
sc 168 dev/ic/awi.c static int awi_media_rate2opt(struct awi_softc *sc, int rate);
sc 169 dev/ic/awi.c static int awi_media_opt2rate(struct awi_softc *sc, int opt);
sc 175 dev/ic/awi.c static void awi_txint(struct awi_softc *sc);
sc 176 dev/ic/awi.c static struct mbuf * awi_fix_txhdr(struct awi_softc *sc, struct mbuf *m0);
sc 177 dev/ic/awi.c static struct mbuf * awi_fix_rxhdr(struct awi_softc *sc, struct mbuf *m0);
sc 178 dev/ic/awi.c static void awi_input(struct awi_softc *sc, struct mbuf *m, u_int32_t rxts, u_int8_t rssi);
sc 179 dev/ic/awi.c static void awi_rxint(struct awi_softc *sc);
sc 180 dev/ic/awi.c static struct mbuf * awi_devget(struct awi_softc *sc, u_int32_t off, u_int16_t len);
sc 181 dev/ic/awi.c static int awi_init_hw(struct awi_softc *sc);
sc 182 dev/ic/awi.c static int awi_init_mibs(struct awi_softc *sc);
sc 183 dev/ic/awi.c static int awi_init_txrx(struct awi_softc *sc);
sc 184 dev/ic/awi.c static void awi_stop_txrx(struct awi_softc *sc);
sc 185 dev/ic/awi.c static int awi_start_scan(struct awi_softc *sc);
sc 186 dev/ic/awi.c static int awi_next_scan(struct awi_softc *sc);
sc 187 dev/ic/awi.c static void awi_stop_scan(struct awi_softc *sc);
sc 188 dev/ic/awi.c static void awi_recv_beacon(struct awi_softc *sc, struct mbuf *m0, u_int32_t rxts, u_int8_t rssi);
sc 189 dev/ic/awi.c static int awi_set_ss(struct awi_softc *sc);
sc 190 dev/ic/awi.c static void awi_try_sync(struct awi_softc *sc);
sc 191 dev/ic/awi.c static void awi_sync_done(struct awi_softc *sc);
sc 192 dev/ic/awi.c static void awi_send_deauth(struct awi_softc *sc);
sc 193 dev/ic/awi.c static void awi_send_auth(struct awi_softc *sc, int seq);
sc 194 dev/ic/awi.c static void awi_recv_auth(struct awi_softc *sc, struct mbuf *m0);
sc 195 dev/ic/awi.c static void awi_send_asreq(struct awi_softc *sc, int reassoc);
sc 196 dev/ic/awi.c static void awi_recv_asresp(struct awi_softc *sc, struct mbuf *m0);
sc 197 dev/ic/awi.c static int awi_mib(struct awi_softc *sc, u_int8_t cmd, u_int8_t mib);
sc 198 dev/ic/awi.c static int awi_cmd_scan(struct awi_softc *sc);
sc 199 dev/ic/awi.c static int awi_cmd(struct awi_softc *sc, u_int8_t cmd);
sc 200 dev/ic/awi.c static void awi_cmd_done(struct awi_softc *sc);
sc 201 dev/ic/awi.c static int awi_next_txd(struct awi_softc *sc, int len, u_int32_t *framep, u_int32_t*ntxdp);
sc 202 dev/ic/awi.c static int awi_lock(struct awi_softc *sc);
sc 203 dev/ic/awi.c static void awi_unlock(struct awi_softc *sc);
sc 204 dev/ic/awi.c static int awi_intr_lock(struct awi_softc *sc);
sc 205 dev/ic/awi.c static void awi_intr_unlock(struct awi_softc *sc);
sc 206 dev/ic/awi.c static int awi_cmd_wait(struct awi_softc *sc);
sc 210 dev/ic/awi.c static void awi_dump_pkt(struct awi_softc *sc, struct mbuf *m, int rssi);
sc 223 dev/ic/awi.c #define AWI_BPF_MTAP(sc, m, raw, dir) do { \
sc 224 dev/ic/awi.c if ((sc)->sc_ifp->if_bpf && (sc)->sc_rawbpf == (raw)) \
sc 225 dev/ic/awi.c bpf_mtap((sc)->sc_ifp, (m)); \
sc 228 dev/ic/awi.c #define AWI_BPF_MTAP(sc, m, raw, dir) do { \
sc 229 dev/ic/awi.c if ((sc)->sc_ifp->if_bpf && (sc)->sc_rawbpf == (raw)) \
sc 230 dev/ic/awi.c bpf_mtap((sc)->sc_ifp->if_bpf, (m), dir); \
sc 234 dev/ic/awi.c #define AWI_BPF_MTAP(sc, m, raw, dir)
sc 267 dev/ic/awi.c awi_attach(sc)
sc 268 dev/ic/awi.c struct awi_softc *sc;
sc 270 dev/ic/awi.c struct ifnet *ifp = sc->sc_ifp;
sc 286 dev/ic/awi.c sc->sc_busy = 1;
sc 287 dev/ic/awi.c sc->sc_status = AWI_ST_INIT;
sc 288 dev/ic/awi.c TAILQ_INIT(&sc->sc_scan);
sc 289 dev/ic/awi.c error = awi_init_hw(sc);
sc 291 dev/ic/awi.c sc->sc_invalid = 1;
sc 295 dev/ic/awi.c error = awi_init_mibs(sc);
sc 298 dev/ic/awi.c sc->sc_invalid = 1;
sc 302 dev/ic/awi.c ifp->if_softc = sc;
sc 313 dev/ic/awi.c memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 318 dev/ic/awi.c memcpy(sc->sc_ec.ac_enaddr, sc->sc_mib_addr.aMAC_Address,
sc 324 dev/ic/awi.c sc->sc_dev.dv_xname,
sc 325 dev/ic/awi.c sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH ? "FH" : "DS",
sc 326 dev/ic/awi.c sc->sc_tx_rate / 10, sc->sc_banner);
sc 328 dev/ic/awi.c sc->sc_dev.dv_xname, ether_sprintf(sc->sc_mib_addr.aMAC_Address));
sc 338 dev/ic/awi.c ether_ifattach(ifp, sc->sc_mib_addr.aMAC_Address);
sc 342 dev/ic/awi.c ifmedia_init(&sc->sc_media, 0, awi_media_change, awi_media_status);
sc 343 dev/ic/awi.c phy_rates = sc->sc_mib_phy.aSuprt_Data_Rates;
sc 345 dev/ic/awi.c mword = awi_media_rate2opt(sc, AWI_80211_RATE(phy_rates[2 + i]));
sc 349 dev/ic/awi.c ifmedia_add(&sc->sc_media, mword, 0, NULL);
sc 350 dev/ic/awi.c ifmedia_add(&sc->sc_media,
sc 352 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type != AWI_PHY_TYPE_FH)
sc 353 dev/ic/awi.c ifmedia_add(&sc->sc_media,
sc 357 dev/ic/awi.c ifmedia_set(&sc->sc_media, imr.ifm_active);
sc 361 dev/ic/awi.c awi_unlock(sc);
sc 364 dev/ic/awi.c sc->sc_attached = 1;
sc 370 dev/ic/awi.c awi_detach(sc)
sc 371 dev/ic/awi.c struct awi_softc *sc;
sc 373 dev/ic/awi.c struct ifnet *ifp = sc->sc_ifp;
sc 377 dev/ic/awi.c if (!sc->sc_attached)
sc 381 dev/ic/awi.c sc->sc_invalid = 1;
sc 382 dev/ic/awi.c awi_stop(sc);
sc 383 dev/ic/awi.c while (sc->sc_sleep_cnt > 0) {
sc 384 dev/ic/awi.c wakeup(sc);
sc 385 dev/ic/awi.c (void)tsleep(sc, PWAIT, "awidet", 1);
sc 387 dev/ic/awi.c if (sc->sc_wep_ctx != NULL)
sc 388 dev/ic/awi.c free(sc->sc_wep_ctx, M_DEVBUF);
sc 390 dev/ic/awi.c ifmedia_delete_instance(&sc->sc_media, IFM_INST_ANY);
sc 394 dev/ic/awi.c if (sc->sc_enabled) {
sc 395 dev/ic/awi.c if (sc->sc_disable)
sc 396 dev/ic/awi.c (*sc->sc_disable)(sc);
sc 397 dev/ic/awi.c sc->sc_enabled = 0;
sc 408 dev/ic/awi.c struct awi_softc *sc = (struct awi_softc *)self;
sc 417 dev/ic/awi.c sc->sc_invalid = 1;
sc 419 dev/ic/awi.c if (sc->sc_ifp)
sc 420 dev/ic/awi.c if_deactivate(sc->sc_ifp);
sc 430 dev/ic/awi.c awi_power(sc, why)
sc 431 dev/ic/awi.c struct awi_softc *sc;
sc 437 dev/ic/awi.c if (!sc->sc_enabled)
sc 441 dev/ic/awi.c ocansleep = sc->sc_cansleep;
sc 442 dev/ic/awi.c sc->sc_cansleep = 0;
sc 445 dev/ic/awi.c sc->sc_enabled = 0;
sc 446 dev/ic/awi.c awi_init(sc);
sc 447 dev/ic/awi.c (void)awi_intr(sc);
sc 449 dev/ic/awi.c awi_stop(sc);
sc 450 dev/ic/awi.c if (sc->sc_disable)
sc 451 dev/ic/awi.c (*sc->sc_disable)(sc);
sc 454 dev/ic/awi.c sc->sc_cansleep = ocansleep;
sc 465 dev/ic/awi.c struct awi_softc *sc = ifp->if_softc;
sc 475 dev/ic/awi.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 482 dev/ic/awi.c error = awi_lock(sc);
sc 497 dev/ic/awi.c sc->sc_format_llc = !(ifp->if_flags & IFF_LINK0);
sc 499 dev/ic/awi.c if (sc->sc_enabled) {
sc 500 dev/ic/awi.c awi_stop(sc);
sc 501 dev/ic/awi.c if (sc->sc_disable)
sc 502 dev/ic/awi.c (*sc->sc_disable)(sc);
sc 503 dev/ic/awi.c sc->sc_enabled = 0;
sc 507 dev/ic/awi.c error = awi_init(sc);
sc 516 dev/ic/awi.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 517 dev/ic/awi.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 524 dev/ic/awi.c error = awi_init(sc);
sc 545 dev/ic/awi.c if (sc->sc_mib_mac.aDesired_ESS_ID[1] == nwid.i_len &&
sc 546 dev/ic/awi.c memcmp(&sc->sc_mib_mac.aDesired_ESS_ID[2], nwid.i_nwid,
sc 549 dev/ic/awi.c memset(sc->sc_mib_mac.aDesired_ESS_ID, 0, AWI_ESS_ID_SIZE);
sc 550 dev/ic/awi.c sc->sc_mib_mac.aDesired_ESS_ID[0] = IEEE80211_ELEMID_SSID;
sc 551 dev/ic/awi.c sc->sc_mib_mac.aDesired_ESS_ID[1] = nwid.i_len;
sc 552 dev/ic/awi.c memcpy(&sc->sc_mib_mac.aDesired_ESS_ID[2], nwid.i_nwid,
sc 554 dev/ic/awi.c if (sc->sc_enabled) {
sc 555 dev/ic/awi.c awi_stop(sc);
sc 556 dev/ic/awi.c error = awi_init(sc);
sc 561 dev/ic/awi.c p = sc->sc_bss.essid;
sc 563 dev/ic/awi.c p = sc->sc_mib_mac.aDesired_ESS_ID;
sc 569 dev/ic/awi.c error = awi_wep_setnwkey(sc, (struct ieee80211_nwkey *)data);
sc 572 dev/ic/awi.c error = awi_wep_getnwkey(sc, (struct ieee80211_nwkey *)data);
sc 577 dev/ic/awi.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
sc 588 dev/ic/awi.c awi_unlock(sc);
sc 596 dev/ic/awi.c awi_media_rate2opt(sc, rate)
sc 597 dev/ic/awi.c struct awi_softc *sc;
sc 605 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH)
sc 611 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH)
sc 617 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_DS)
sc 621 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_DS)
sc 629 dev/ic/awi.c awi_media_opt2rate(sc, opt)
sc 630 dev/ic/awi.c struct awi_softc *sc;
sc 639 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type != AWI_PHY_TYPE_FH)
sc 646 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type != AWI_PHY_TYPE_DS)
sc 677 dev/ic/awi.c struct awi_softc *sc = ifp->if_softc;
sc 683 dev/ic/awi.c ime = sc->sc_media.ifm_cur;
sc 684 dev/ic/awi.c rate = awi_media_opt2rate(sc, ime->ifm_media);
sc 687 dev/ic/awi.c if (rate != sc->sc_tx_rate) {
sc 688 dev/ic/awi.c phy_rates = sc->sc_mib_phy.aSuprt_Data_Rates;
sc 697 dev/ic/awi.c sc->sc_mib_local.Network_Mode = 0;
sc 698 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH)
sc 699 dev/ic/awi.c sc->sc_no_bssid = 0;
sc 701 dev/ic/awi.c sc->sc_no_bssid = (ime->ifm_media & IFM_FLAG0) ? 1 : 0;
sc 703 dev/ic/awi.c sc->sc_mib_local.Network_Mode = 1;
sc 705 dev/ic/awi.c if (sc->sc_enabled) {
sc 706 dev/ic/awi.c awi_stop(sc);
sc 707 dev/ic/awi.c error = awi_init(sc);
sc 717 dev/ic/awi.c struct awi_softc *sc = ifp->if_softc;
sc 723 dev/ic/awi.c imr->ifm_active |= awi_media_rate2opt(sc, sc->sc_tx_rate);
sc 724 dev/ic/awi.c if (sc->sc_mib_local.Network_Mode == 0) {
sc 726 dev/ic/awi.c if (sc->sc_no_bssid)
sc 736 dev/ic/awi.c struct awi_softc *sc = arg;
sc 740 dev/ic/awi.c if (!sc->sc_enabled || !sc->sc_enab_intr || sc->sc_invalid)
sc 743 dev/ic/awi.c am79c930_gcr_setbits(&sc->sc_chip,
sc 745 dev/ic/awi.c awi_write_1(sc, AWI_DIS_PWRDN, 1);
sc 746 dev/ic/awi.c ocansleep = sc->sc_cansleep;
sc 747 dev/ic/awi.c sc->sc_cansleep = 0;
sc 750 dev/ic/awi.c error = awi_intr_lock(sc);
sc 753 dev/ic/awi.c status = awi_read_1(sc, AWI_INTSTAT);
sc 754 dev/ic/awi.c awi_write_1(sc, AWI_INTSTAT, 0);
sc 755 dev/ic/awi.c awi_write_1(sc, AWI_INTSTAT, 0);
sc 756 dev/ic/awi.c status |= awi_read_1(sc, AWI_INTSTAT2) << 8;
sc 757 dev/ic/awi.c awi_write_1(sc, AWI_INTSTAT2, 0);
sc 759 dev/ic/awi.c awi_intr_unlock(sc);
sc 760 dev/ic/awi.c if (!sc->sc_cmd_inprog)
sc 766 dev/ic/awi.c awi_rxint(sc);
sc 768 dev/ic/awi.c awi_txint(sc);
sc 770 dev/ic/awi.c awi_cmd_done(sc);
sc 772 dev/ic/awi.c if (sc->sc_status == AWI_ST_SCAN &&
sc 773 dev/ic/awi.c sc->sc_mgt_timer > 0)
sc 774 dev/ic/awi.c (void)awi_next_scan(sc);
sc 777 dev/ic/awi.c sc->sc_cansleep = ocansleep;
sc 778 dev/ic/awi.c am79c930_gcr_clearbits(&sc->sc_chip, AM79C930_GCR_DISPWDN);
sc 779 dev/ic/awi.c awi_write_1(sc, AWI_DIS_PWRDN, 0);
sc 784 dev/ic/awi.c awi_init(sc)
sc 785 dev/ic/awi.c struct awi_softc *sc;
sc 789 dev/ic/awi.c struct ifnet *ifp = sc->sc_ifp;
sc 800 dev/ic/awi.c sc->sc_mib_local.Accept_All_Multicast_Dis = 0;
sc 802 dev/ic/awi.c sc->sc_mib_mac.aPromiscuous_Enable = 1;
sc 805 dev/ic/awi.c sc->sc_mib_mac.aPromiscuous_Enable = 0;
sc 815 dev/ic/awi.c memcpy(sc->sc_mib_addr.aGroup_Addresses[n],
sc 821 dev/ic/awi.c ETHER_FIRST_MULTI(step, &sc->sc_arpcom, enm);
sc 827 dev/ic/awi.c memcpy(sc->sc_mib_addr.aGroup_Addresses[n], enm->enm_addrlo,
sc 834 dev/ic/awi.c memset(sc->sc_mib_addr.aGroup_Addresses[n], 0, ETHER_ADDR_LEN);
sc 836 dev/ic/awi.c sc->sc_mib_local.Accept_All_Multicast_Dis = 1;
sc 840 dev/ic/awi.c sc->sc_mib_mgt.Wep_Required = sc->sc_wep_algo != NULL ? 1 : 0;
sc 842 dev/ic/awi.c if (!sc->sc_enabled) {
sc 843 dev/ic/awi.c sc->sc_enabled = 1;
sc 844 dev/ic/awi.c if (sc->sc_enable)
sc 845 dev/ic/awi.c (*sc->sc_enable)(sc);
sc 846 dev/ic/awi.c sc->sc_status = AWI_ST_INIT;
sc 847 dev/ic/awi.c error = awi_init_hw(sc);
sc 851 dev/ic/awi.c ostatus = sc->sc_status;
sc 852 dev/ic/awi.c sc->sc_status = AWI_ST_INIT;
sc 853 dev/ic/awi.c if ((error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_LOCAL)) != 0 ||
sc 854 dev/ic/awi.c (error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_ADDR)) != 0 ||
sc 855 dev/ic/awi.c (error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_MAC)) != 0 ||
sc 856 dev/ic/awi.c (error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_MGT)) != 0 ||
sc 857 dev/ic/awi.c (error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_PHY)) != 0) {
sc 858 dev/ic/awi.c awi_stop(sc);
sc 862 dev/ic/awi.c sc->sc_status = AWI_ST_RUNNING;
sc 865 dev/ic/awi.c error = awi_init_txrx(sc);
sc 869 dev/ic/awi.c error = awi_start_scan(sc);
sc 875 dev/ic/awi.c awi_stop(sc)
sc 876 dev/ic/awi.c struct awi_softc *sc;
sc 878 dev/ic/awi.c struct ifnet *ifp = sc->sc_ifp;
sc 882 dev/ic/awi.c sc->sc_status = AWI_ST_INIT;
sc 883 dev/ic/awi.c if (!sc->sc_invalid) {
sc 884 dev/ic/awi.c (void)awi_cmd_wait(sc);
sc 885 dev/ic/awi.c if (sc->sc_mib_local.Network_Mode &&
sc 886 dev/ic/awi.c sc->sc_status > AWI_ST_AUTH)
sc 887 dev/ic/awi.c awi_send_deauth(sc);
sc 888 dev/ic/awi.c awi_stop_txrx(sc);
sc 892 dev/ic/awi.c sc->sc_tx_timer = sc->sc_rx_timer = sc->sc_mgt_timer = 0;
sc 894 dev/ic/awi.c IF_DEQUEUE(&sc->sc_mgtq, m);
sc 900 dev/ic/awi.c while ((bp = TAILQ_FIRST(&sc->sc_scan)) != NULL) {
sc 901 dev/ic/awi.c TAILQ_REMOVE(&sc->sc_scan, bp, list);
sc 910 dev/ic/awi.c struct awi_softc *sc = ifp->if_softc;
sc 913 dev/ic/awi.c if (sc->sc_invalid) {
sc 918 dev/ic/awi.c ocansleep = sc->sc_cansleep;
sc 919 dev/ic/awi.c sc->sc_cansleep = 0;
sc 920 dev/ic/awi.c if (sc->sc_tx_timer && --sc->sc_tx_timer == 0) {
sc 921 dev/ic/awi.c printf("%s: transmit timeout\n", sc->sc_dev.dv_xname);
sc 922 dev/ic/awi.c awi_txint(sc);
sc 924 dev/ic/awi.c if (sc->sc_rx_timer && --sc->sc_rx_timer == 0) {
sc 927 dev/ic/awi.c sc->sc_dev.dv_xname,
sc 928 dev/ic/awi.c ether_sprintf(sc->sc_bss.bssid));
sc 931 dev/ic/awi.c awi_start_scan(sc);
sc 933 dev/ic/awi.c if (sc->sc_mgt_timer && --sc->sc_mgt_timer == 0) {
sc 934 dev/ic/awi.c switch (sc->sc_status) {
sc 936 dev/ic/awi.c awi_stop_scan(sc);
sc 941 dev/ic/awi.c awi_start_scan(sc);
sc 948 dev/ic/awi.c if (sc->sc_tx_timer == 0 && sc->sc_rx_timer == 0 &&
sc 949 dev/ic/awi.c sc->sc_mgt_timer == 0)
sc 953 dev/ic/awi.c sc->sc_cansleep = ocansleep;
sc 960 dev/ic/awi.c struct awi_softc *sc = ifp->if_softc;
sc 967 dev/ic/awi.c txd = sc->sc_txnext;
sc 968 dev/ic/awi.c IF_DEQUEUE(&sc->sc_mgtq, m0);
sc 970 dev/ic/awi.c if (awi_next_txd(sc, m0->m_pkthdr.len, &frame, &ntxd)) {
sc 971 dev/ic/awi.c IF_PREPEND(&sc->sc_mgtq, m0);
sc 982 dev/ic/awi.c if (sc->sc_format_llc)
sc 985 dev/ic/awi.c if (sc->sc_wep_algo != NULL)
sc 988 dev/ic/awi.c if (awi_next_txd(sc, len, &frame, &ntxd)) {
sc 993 dev/ic/awi.c AWI_BPF_MTAP(sc, m0, AWI_BPF_NORM, BPF_DIRECTION_OUT);
sc 994 dev/ic/awi.c m0 = awi_fix_txhdr(sc, m0);
sc 995 dev/ic/awi.c if (sc->sc_wep_algo != NULL && m0 != NULL)
sc 996 dev/ic/awi.c m0 = awi_wep_encrypt(sc, m0, 1);
sc 1005 dev/ic/awi.c awi_dump_pkt(sc, m0, -1);
sc 1007 dev/ic/awi.c AWI_BPF_MTAP(sc, m0, AWI_BPF_RAW, BPF_DIRECTION_OUT);
sc 1010 dev/ic/awi.c awi_write_bytes(sc, frame + len, mtod(m, u_int8_t *),
sc 1015 dev/ic/awi.c rate = sc->sc_tx_rate; /*XXX*/
sc 1016 dev/ic/awi.c awi_write_1(sc, ntxd + AWI_TXD_STATE, 0);
sc 1017 dev/ic/awi.c awi_write_4(sc, txd + AWI_TXD_START, frame);
sc 1018 dev/ic/awi.c awi_write_4(sc, txd + AWI_TXD_NEXT, ntxd);
sc 1019 dev/ic/awi.c awi_write_4(sc, txd + AWI_TXD_LENGTH, len);
sc 1020 dev/ic/awi.c awi_write_1(sc, txd + AWI_TXD_RATE, rate);
sc 1021 dev/ic/awi.c awi_write_4(sc, txd + AWI_TXD_NDA, 0);
sc 1022 dev/ic/awi.c awi_write_4(sc, txd + AWI_TXD_NRA, 0);
sc 1023 dev/ic/awi.c awi_write_1(sc, txd + AWI_TXD_STATE, AWI_TXD_ST_OWN);
sc 1024 dev/ic/awi.c sc->sc_txnext = ntxd;
sc 1028 dev/ic/awi.c if (sc->sc_tx_timer == 0)
sc 1029 dev/ic/awi.c sc->sc_tx_timer = 5;
sc 1033 dev/ic/awi.c printf("awi_start: sent %d txdone %d txnext %d txbase %d txend %d\n", sent, sc->sc_txdone, sc->sc_txnext, sc->sc_txbase, sc->sc_txend);
sc 1039 dev/ic/awi.c awi_txint(sc)
sc 1040 dev/ic/awi.c struct awi_softc *sc;
sc 1042 dev/ic/awi.c struct ifnet *ifp = sc->sc_ifp;
sc 1045 dev/ic/awi.c while (sc->sc_txdone != sc->sc_txnext) {
sc 1046 dev/ic/awi.c flags = awi_read_1(sc, sc->sc_txdone + AWI_TXD_STATE);
sc 1051 dev/ic/awi.c sc->sc_txdone = awi_read_4(sc, sc->sc_txdone + AWI_TXD_NEXT) &
sc 1054 dev/ic/awi.c sc->sc_tx_timer = 0;
sc 1059 dev/ic/awi.c sc->sc_txdone, sc->sc_txnext, sc->sc_txbase, sc->sc_txend);
sc 1065 dev/ic/awi.c awi_fix_txhdr(sc, m0)
sc 1066 dev/ic/awi.c struct awi_softc *sc;
sc 1079 dev/ic/awi.c if (sc->sc_format_llc) {
sc 1096 dev/ic/awi.c if (sc->sc_mib_local.Network_Mode) {
sc 1098 dev/ic/awi.c memcpy(wh->i_addr1, sc->sc_bss.bssid, ETHER_ADDR_LEN);
sc 1105 dev/ic/awi.c memcpy(wh->i_addr3, sc->sc_bss.bssid, ETHER_ADDR_LEN);
sc 1111 dev/ic/awi.c awi_fix_rxhdr(sc, m0)
sc 1112 dev/ic/awi.c struct awi_softc *sc;
sc 1210 dev/ic/awi.c awi_input(sc, m, rxts, rssi)
sc 1211 dev/ic/awi.c struct awi_softc *sc;
sc 1216 dev/ic/awi.c struct ifnet *ifp = sc->sc_ifp;
sc 1221 dev/ic/awi.c AWI_BPF_MTAP(sc, m, AWI_BPF_RAW, BPF_DIRECTION_IN);
sc 1226 dev/ic/awi.c sc->sc_dev.dv_xname, wh->i_fc[0]);
sc 1232 dev/ic/awi.c m = awi_wep_encrypt(sc, m, 0);
sc 1241 dev/ic/awi.c awi_dump_pkt(sc, m, rssi);
sc 1244 dev/ic/awi.c if ((sc->sc_mib_local.Network_Mode || !sc->sc_no_bssid) &&
sc 1245 dev/ic/awi.c sc->sc_status == AWI_ST_RUNNING) {
sc 1246 dev/ic/awi.c if (memcmp(wh->i_addr2, sc->sc_bss.bssid, ETHER_ADDR_LEN) == 0) {
sc 1247 dev/ic/awi.c sc->sc_rx_timer = 10;
sc 1248 dev/ic/awi.c sc->sc_bss.rssi = rssi;
sc 1253 dev/ic/awi.c if (sc->sc_mib_local.Network_Mode) {
sc 1266 dev/ic/awi.c m = awi_fix_rxhdr(sc, m);
sc 1273 dev/ic/awi.c AWI_BPF_MTAP(sc, m, AWI_BPF_NORM, BPF_DIRECTION_IN);
sc 1290 dev/ic/awi.c awi_recv_beacon(sc, m, rxts, rssi);
sc 1293 dev/ic/awi.c awi_recv_auth(sc, m);
sc 1297 dev/ic/awi.c awi_recv_asresp(sc, m);
sc 1300 dev/ic/awi.c if (sc->sc_mib_local.Network_Mode)
sc 1301 dev/ic/awi.c awi_send_auth(sc, 1);
sc 1304 dev/ic/awi.c if (sc->sc_mib_local.Network_Mode)
sc 1305 dev/ic/awi.c awi_send_asreq(sc, 1);
sc 1319 dev/ic/awi.c awi_rxint(sc)
sc 1320 dev/ic/awi.c struct awi_softc *sc;
sc 1327 dev/ic/awi.c rxoff = sc->sc_rxdoff;
sc 1329 dev/ic/awi.c state = awi_read_1(sc, rxoff + AWI_RXD_HOST_DESC_STATE);
sc 1334 dev/ic/awi.c sc->sc_ifp->if_ierrors++;
sc 1336 dev/ic/awi.c len = awi_read_2(sc, rxoff + AWI_RXD_LEN);
sc 1337 dev/ic/awi.c rate = awi_read_1(sc, rxoff + AWI_RXD_RATE);
sc 1338 dev/ic/awi.c rssi = awi_read_1(sc, rxoff + AWI_RXD_RSSI);
sc 1339 dev/ic/awi.c frame = awi_read_4(sc, rxoff + AWI_RXD_START_FRAME) & 0x7fff;
sc 1340 dev/ic/awi.c rxts = awi_read_4(sc, rxoff + AWI_RXD_LOCALTIME);
sc 1341 dev/ic/awi.c m = awi_devget(sc, frame, len);
sc 1343 dev/ic/awi.c awi_input(sc, m, rxts, rssi);
sc 1345 dev/ic/awi.c sc->sc_rxpend = m;
sc 1348 dev/ic/awi.c awi_write_1(sc, rxoff + AWI_RXD_HOST_DESC_STATE, state);
sc 1350 dev/ic/awi.c next = awi_read_4(sc, rxoff + AWI_RXD_NEXT);
sc 1354 dev/ic/awi.c if (next != awi_read_4(sc, rxoff + AWI_RXD_NEXT))
sc 1357 dev/ic/awi.c awi_write_1(sc, rxoff + AWI_RXD_HOST_DESC_STATE, state);
sc 1360 dev/ic/awi.c sc->sc_rxdoff = rxoff;
sc 1364 dev/ic/awi.c awi_devget(sc, off, len)
sc 1365 dev/ic/awi.c struct awi_softc *sc;
sc 1373 dev/ic/awi.c top = sc->sc_rxpend;
sc 1376 dev/ic/awi.c sc->sc_rxpend = NULL;
sc 1392 dev/ic/awi.c awi_read_bytes(sc, off, mtod(m, u_int8_t *) + m->m_len, tlen);
sc 1402 dev/ic/awi.c m->m_pkthdr.rcvif = sc->sc_ifp;
sc 1420 dev/ic/awi.c (sc->sc_format_llc ? sizeof(struct llc) :
sc 1429 dev/ic/awi.c awi_read_bytes(sc, off, mtod(m, u_int8_t *), m->m_len);
sc 1444 dev/ic/awi.c awi_init_hw(sc)
sc 1445 dev/ic/awi.c struct awi_softc *sc;
sc 1451 dev/ic/awi.c sc->sc_enab_intr = 0;
sc 1452 dev/ic/awi.c sc->sc_invalid = 0; /* XXX: really? */
sc 1453 dev/ic/awi.c awi_drvstate(sc, AWI_DRV_RESET);
sc 1456 dev/ic/awi.c am79c930_gcr_setbits(&sc->sc_chip, AM79C930_GCR_CORESET);
sc 1458 dev/ic/awi.c awi_write_1(sc, AWI_SELFTEST, 0);
sc 1459 dev/ic/awi.c awi_write_1(sc, AWI_CMD, 0);
sc 1460 dev/ic/awi.c awi_write_1(sc, AWI_BANNER, 0);
sc 1461 dev/ic/awi.c am79c930_gcr_clearbits(&sc->sc_chip, AM79C930_GCR_CORESET);
sc 1468 dev/ic/awi.c sc->sc_dev.dv_xname);
sc 1471 dev/ic/awi.c status = awi_read_1(sc, AWI_SELFTEST);
sc 1474 dev/ic/awi.c if (sc->sc_cansleep) {
sc 1475 dev/ic/awi.c sc->sc_sleep_cnt++;
sc 1476 dev/ic/awi.c (void)tsleep(sc, PWAIT, "awitst", 1);
sc 1477 dev/ic/awi.c sc->sc_sleep_cnt--;
sc 1484 dev/ic/awi.c sc->sc_dev.dv_xname, status);
sc 1489 dev/ic/awi.c awi_read_bytes(sc, AWI_BANNER, sc->sc_banner, AWI_BANNER_LEN);
sc 1490 dev/ic/awi.c if (memcmp(sc->sc_banner, "PCnetMobile:", 12) != 0) {
sc 1492 dev/ic/awi.c sc->sc_dev.dv_xname);
sc 1494 dev/ic/awi.c printf("%s%02x", i ? ":" : "\t", sc->sc_banner[i]);
sc 1500 dev/ic/awi.c sc->sc_enab_intr = 1;
sc 1501 dev/ic/awi.c error = awi_intr_lock(sc);
sc 1506 dev/ic/awi.c awi_write_1(sc, AWI_INTMASK, ~intmask & 0xff);
sc 1507 dev/ic/awi.c awi_write_1(sc, AWI_INTMASK2, 0);
sc 1508 dev/ic/awi.c awi_write_1(sc, AWI_INTSTAT, 0);
sc 1509 dev/ic/awi.c awi_write_1(sc, AWI_INTSTAT2, 0);
sc 1510 dev/ic/awi.c awi_intr_unlock(sc);
sc 1511 dev/ic/awi.c am79c930_gcr_setbits(&sc->sc_chip, AM79C930_GCR_ENECINT);
sc 1514 dev/ic/awi.c error = awi_cmd(sc, AWI_CMD_NOP);
sc 1516 dev/ic/awi.c printf("%s: failed to complete selftest", sc->sc_dev.dv_xname);
sc 1521 dev/ic/awi.c else if (sc->sc_cansleep)
sc 1536 dev/ic/awi.c awi_init_mibs(sc)
sc 1537 dev/ic/awi.c struct awi_softc *sc;
sc 1542 dev/ic/awi.c if ((error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_LOCAL)) != 0 ||
sc 1543 dev/ic/awi.c (error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_ADDR)) != 0 ||
sc 1544 dev/ic/awi.c (error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_MAC)) != 0 ||
sc 1545 dev/ic/awi.c (error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_MGT)) != 0 ||
sc 1546 dev/ic/awi.c (error = awi_mib(sc, AWI_CMD_GET_MIB, AWI_MIB_PHY)) != 0) {
sc 1548 dev/ic/awi.c sc->sc_dev.dv_xname, error);
sc 1552 dev/ic/awi.c rate = sc->sc_mib_phy.aSuprt_Data_Rates;
sc 1553 dev/ic/awi.c sc->sc_tx_rate = AWI_RATE_1MBIT;
sc 1555 dev/ic/awi.c if (AWI_80211_RATE(rate[2 + i]) > sc->sc_tx_rate)
sc 1556 dev/ic/awi.c sc->sc_tx_rate = AWI_80211_RATE(rate[2 + i]);
sc 1558 dev/ic/awi.c awi_init_region(sc);
sc 1559 dev/ic/awi.c memset(&sc->sc_mib_mac.aDesired_ESS_ID, 0, AWI_ESS_ID_SIZE);
sc 1560 dev/ic/awi.c sc->sc_mib_mac.aDesired_ESS_ID[0] = IEEE80211_ELEMID_SSID;
sc 1561 dev/ic/awi.c sc->sc_mib_local.Fragmentation_Dis = 1;
sc 1562 dev/ic/awi.c sc->sc_mib_local.Accept_All_Multicast_Dis = 1;
sc 1563 dev/ic/awi.c sc->sc_mib_local.Power_Saving_Mode_Dis = 1;
sc 1566 dev/ic/awi.c sc->sc_txbase = AWI_BUFFERS;
sc 1567 dev/ic/awi.c sc->sc_txend = sc->sc_txbase +
sc 1570 dev/ic/awi.c LE_WRITE_4(&sc->sc_mib_local.Tx_Buffer_Offset, sc->sc_txbase);
sc 1571 dev/ic/awi.c LE_WRITE_4(&sc->sc_mib_local.Tx_Buffer_Size,
sc 1572 dev/ic/awi.c sc->sc_txend - sc->sc_txbase);
sc 1573 dev/ic/awi.c LE_WRITE_4(&sc->sc_mib_local.Rx_Buffer_Offset, sc->sc_txend);
sc 1574 dev/ic/awi.c LE_WRITE_4(&sc->sc_mib_local.Rx_Buffer_Size,
sc 1575 dev/ic/awi.c AWI_BUFFERS_END - sc->sc_txend);
sc 1576 dev/ic/awi.c sc->sc_mib_local.Network_Mode = 1;
sc 1577 dev/ic/awi.c sc->sc_mib_local.Acting_as_AP = 0;
sc 1587 dev/ic/awi.c awi_init_txrx(sc)
sc 1588 dev/ic/awi.c struct awi_softc *sc;
sc 1593 dev/ic/awi.c sc->sc_txdone = sc->sc_txnext = sc->sc_txbase;
sc 1594 dev/ic/awi.c awi_write_4(sc, sc->sc_txbase + AWI_TXD_START, 0);
sc 1595 dev/ic/awi.c awi_write_4(sc, sc->sc_txbase + AWI_TXD_NEXT, 0);
sc 1596 dev/ic/awi.c awi_write_4(sc, sc->sc_txbase + AWI_TXD_LENGTH, 0);
sc 1597 dev/ic/awi.c awi_write_1(sc, sc->sc_txbase + AWI_TXD_RATE, 0);
sc 1598 dev/ic/awi.c awi_write_4(sc, sc->sc_txbase + AWI_TXD_NDA, 0);
sc 1599 dev/ic/awi.c awi_write_4(sc, sc->sc_txbase + AWI_TXD_NRA, 0);
sc 1600 dev/ic/awi.c awi_write_1(sc, sc->sc_txbase + AWI_TXD_STATE, 0);
sc 1601 dev/ic/awi.c awi_write_4(sc, AWI_CMD_PARAMS+AWI_CA_TX_DATA, sc->sc_txbase);
sc 1602 dev/ic/awi.c awi_write_4(sc, AWI_CMD_PARAMS+AWI_CA_TX_MGT, 0);
sc 1603 dev/ic/awi.c awi_write_4(sc, AWI_CMD_PARAMS+AWI_CA_TX_BCAST, 0);
sc 1604 dev/ic/awi.c awi_write_4(sc, AWI_CMD_PARAMS+AWI_CA_TX_PS, 0);
sc 1605 dev/ic/awi.c awi_write_4(sc, AWI_CMD_PARAMS+AWI_CA_TX_CF, 0);
sc 1606 dev/ic/awi.c error = awi_cmd(sc, AWI_CMD_INIT_TX);
sc 1611 dev/ic/awi.c if (sc->sc_rxpend) {
sc 1612 dev/ic/awi.c m_freem(sc->sc_rxpend);
sc 1613 dev/ic/awi.c sc->sc_rxpend = NULL;
sc 1615 dev/ic/awi.c error = awi_cmd(sc, AWI_CMD_INIT_RX);
sc 1618 dev/ic/awi.c sc->sc_rxdoff = awi_read_4(sc, AWI_CMD_PARAMS+AWI_CA_IRX_DATA_DESC);
sc 1619 dev/ic/awi.c sc->sc_rxmoff = awi_read_4(sc, AWI_CMD_PARAMS+AWI_CA_IRX_PS_DESC);
sc 1624 dev/ic/awi.c awi_stop_txrx(sc)
sc 1625 dev/ic/awi.c struct awi_softc *sc;
sc 1628 dev/ic/awi.c if (sc->sc_cmd_inprog)
sc 1629 dev/ic/awi.c (void)awi_cmd_wait(sc);
sc 1630 dev/ic/awi.c (void)awi_cmd(sc, AWI_CMD_KILL_RX);
sc 1631 dev/ic/awi.c (void)awi_cmd_wait(sc);
sc 1632 dev/ic/awi.c sc->sc_cmd_inprog = AWI_CMD_FLUSH_TX;
sc 1633 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_FTX_DATA, 1);
sc 1634 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_FTX_MGT, 0);
sc 1635 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_FTX_BCAST, 0);
sc 1636 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_FTX_PS, 0);
sc 1637 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_FTX_CF, 0);
sc 1638 dev/ic/awi.c (void)awi_cmd(sc, AWI_CMD_FLUSH_TX);
sc 1639 dev/ic/awi.c (void)awi_cmd_wait(sc);
sc 1643 dev/ic/awi.c awi_init_region(sc)
sc 1644 dev/ic/awi.c struct awi_softc *sc;
sc 1647 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH) {
sc 1648 dev/ic/awi.c switch (sc->sc_mib_phy.aCurrent_Reg_Domain) {
sc 1652 dev/ic/awi.c sc->sc_scan_min = 0;
sc 1653 dev/ic/awi.c sc->sc_scan_max = 77;
sc 1656 dev/ic/awi.c sc->sc_scan_min = 0;
sc 1657 dev/ic/awi.c sc->sc_scan_max = 26;
sc 1660 dev/ic/awi.c sc->sc_scan_min = 0;
sc 1661 dev/ic/awi.c sc->sc_scan_max = 32;
sc 1664 dev/ic/awi.c sc->sc_scan_min = 6;
sc 1665 dev/ic/awi.c sc->sc_scan_max = 17;
sc 1670 dev/ic/awi.c sc->sc_scan_set = sc->sc_scan_cur % 3 + 1;
sc 1672 dev/ic/awi.c switch (sc->sc_mib_phy.aCurrent_Reg_Domain) {
sc 1675 dev/ic/awi.c sc->sc_scan_min = 1;
sc 1676 dev/ic/awi.c sc->sc_scan_max = 11;
sc 1677 dev/ic/awi.c sc->sc_scan_cur = 3;
sc 1680 dev/ic/awi.c sc->sc_scan_min = 1;
sc 1681 dev/ic/awi.c sc->sc_scan_max = 13;
sc 1682 dev/ic/awi.c sc->sc_scan_cur = 3;
sc 1685 dev/ic/awi.c sc->sc_scan_min = 10;
sc 1686 dev/ic/awi.c sc->sc_scan_max = 11;
sc 1687 dev/ic/awi.c sc->sc_scan_cur = 10;
sc 1690 dev/ic/awi.c sc->sc_scan_min = 10;
sc 1691 dev/ic/awi.c sc->sc_scan_max = 13;
sc 1692 dev/ic/awi.c sc->sc_scan_cur = 10;
sc 1695 dev/ic/awi.c sc->sc_scan_min = 14;
sc 1696 dev/ic/awi.c sc->sc_scan_max = 14;
sc 1697 dev/ic/awi.c sc->sc_scan_cur = 14;
sc 1703 dev/ic/awi.c sc->sc_ownch = sc->sc_scan_cur;
sc 1708 dev/ic/awi.c awi_start_scan(sc)
sc 1709 dev/ic/awi.c struct awi_softc *sc;
sc 1714 dev/ic/awi.c while ((bp = TAILQ_FIRST(&sc->sc_scan)) != NULL) {
sc 1715 dev/ic/awi.c TAILQ_REMOVE(&sc->sc_scan, bp, list);
sc 1718 dev/ic/awi.c if (!sc->sc_mib_local.Network_Mode && sc->sc_no_bssid) {
sc 1719 dev/ic/awi.c memset(&sc->sc_bss, 0, sizeof(sc->sc_bss));
sc 1720 dev/ic/awi.c sc->sc_bss.essid[0] = IEEE80211_ELEMID_SSID;
sc 1721 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH) {
sc 1722 dev/ic/awi.c sc->sc_bss.chanset = sc->sc_ownch % 3 + 1;
sc 1723 dev/ic/awi.c sc->sc_bss.pattern = sc->sc_ownch;
sc 1724 dev/ic/awi.c sc->sc_bss.index = 1;
sc 1725 dev/ic/awi.c sc->sc_bss.dwell_time = 200; /*XXX*/
sc 1727 dev/ic/awi.c sc->sc_bss.chanset = sc->sc_ownch;
sc 1728 dev/ic/awi.c sc->sc_status = AWI_ST_SETSS;
sc 1729 dev/ic/awi.c error = awi_set_ss(sc);
sc 1731 dev/ic/awi.c if (sc->sc_mib_local.Network_Mode)
sc 1732 dev/ic/awi.c awi_drvstate(sc, AWI_DRV_INFSC);
sc 1734 dev/ic/awi.c awi_drvstate(sc, AWI_DRV_ADHSC);
sc 1735 dev/ic/awi.c sc->sc_start_bss = 0;
sc 1736 dev/ic/awi.c sc->sc_active_scan = 1;
sc 1737 dev/ic/awi.c sc->sc_mgt_timer = AWI_ASCAN_WAIT / 1000;
sc 1738 dev/ic/awi.c sc->sc_ifp->if_timer = 1;
sc 1739 dev/ic/awi.c sc->sc_status = AWI_ST_SCAN;
sc 1740 dev/ic/awi.c error = awi_cmd_scan(sc);
sc 1746 dev/ic/awi.c awi_next_scan(sc)
sc 1747 dev/ic/awi.c struct awi_softc *sc;
sc 1760 dev/ic/awi.c sc->sc_scan_cur++;
sc 1761 dev/ic/awi.c if (sc->sc_scan_cur > sc->sc_scan_max) {
sc 1762 dev/ic/awi.c sc->sc_scan_cur = sc->sc_scan_min;
sc 1763 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH)
sc 1764 dev/ic/awi.c sc->sc_scan_set = sc->sc_scan_set % 3 + 1;
sc 1766 dev/ic/awi.c error = awi_cmd_scan(sc);
sc 1774 dev/ic/awi.c awi_stop_scan(sc)
sc 1775 dev/ic/awi.c struct awi_softc *sc;
sc 1777 dev/ic/awi.c struct ifnet *ifp = sc->sc_ifp;
sc 1781 dev/ic/awi.c bp = TAILQ_FIRST(&sc->sc_scan);
sc 1784 dev/ic/awi.c if (sc->sc_active_scan) {
sc 1787 dev/ic/awi.c sc->sc_dev.dv_xname);
sc 1788 dev/ic/awi.c sc->sc_active_scan = 0;
sc 1790 dev/ic/awi.c sc->sc_mgt_timer = AWI_PSCAN_WAIT / 1000;
sc 1792 dev/ic/awi.c (void)awi_next_scan(sc);
sc 1798 dev/ic/awi.c sc->sc_dev.dv_xname);
sc 1816 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH) {
sc 1817 dev/ic/awi.c if (bp->pattern < sc->sc_scan_min ||
sc 1818 dev/ic/awi.c bp->pattern > sc->sc_scan_max)
sc 1821 dev/ic/awi.c if (bp->chanset < sc->sc_scan_min ||
sc 1822 dev/ic/awi.c bp->chanset > sc->sc_scan_max)
sc 1825 dev/ic/awi.c if (sc->sc_mib_local.Network_Mode) {
sc 1834 dev/ic/awi.c if (sc->sc_wep_algo == NULL) {
sc 1841 dev/ic/awi.c if (sc->sc_mib_mac.aDesired_ESS_ID[1] != 0 &&
sc 1842 dev/ic/awi.c memcmp(&sc->sc_mib_mac.aDesired_ESS_ID, bp->essid,
sc 1848 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH)
sc 1874 dev/ic/awi.c sc->sc_bss = *sbp;
sc 1875 dev/ic/awi.c (void)awi_set_ss(sc);
sc 1879 dev/ic/awi.c awi_recv_beacon(sc, m0, rxts, rssi)
sc 1880 dev/ic/awi.c struct awi_softc *sc;
sc 1890 dev/ic/awi.c if (sc->sc_status != AWI_ST_SCAN)
sc 1953 dev/ic/awi.c for (bp = TAILQ_FIRST(&sc->sc_scan); bp != NULL;
sc 1963 dev/ic/awi.c TAILQ_INSERT_TAIL(&sc->sc_scan, bp, list);
sc 1974 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH) {
sc 1985 dev/ic/awi.c if (sc->sc_mgt_timer == 0)
sc 1986 dev/ic/awi.c awi_stop_scan(sc);
sc 1990 dev/ic/awi.c awi_set_ss(sc)
sc 1991 dev/ic/awi.c struct awi_softc *sc;
sc 1993 dev/ic/awi.c struct ifnet *ifp = sc->sc_ifp;
sc 1997 dev/ic/awi.c sc->sc_status = AWI_ST_SETSS;
sc 1998 dev/ic/awi.c bp = &sc->sc_bss;
sc 2001 dev/ic/awi.c sc->sc_dev.dv_xname, bp->chanset,
sc 2007 dev/ic/awi.c memcpy(&sc->sc_mib_mgt.aCurrent_BSS_ID, bp->bssid, ETHER_ADDR_LEN);
sc 2008 dev/ic/awi.c memcpy(&sc->sc_mib_mgt.aCurrent_ESS_ID, bp->essid,
sc 2010 dev/ic/awi.c LE_WRITE_2(&sc->sc_mib_mgt.aBeacon_Period, bp->interval);
sc 2011 dev/ic/awi.c error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_MGT);
sc 2016 dev/ic/awi.c awi_try_sync(sc)
sc 2017 dev/ic/awi.c struct awi_softc *sc;
sc 2021 dev/ic/awi.c sc->sc_status = AWI_ST_SYNC;
sc 2022 dev/ic/awi.c bp = &sc->sc_bss;
sc 2024 dev/ic/awi.c if (sc->sc_cmd_inprog) {
sc 2025 dev/ic/awi.c if (awi_cmd_wait(sc))
sc 2028 dev/ic/awi.c sc->sc_cmd_inprog = AWI_CMD_SYNC;
sc 2029 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_SYNC_SET, bp->chanset);
sc 2030 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_SYNC_PATTERN, bp->pattern);
sc 2031 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_SYNC_IDX, bp->index);
sc 2032 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_SYNC_STARTBSS,
sc 2033 dev/ic/awi.c sc->sc_start_bss ? 1 : 0);
sc 2034 dev/ic/awi.c awi_write_2(sc, AWI_CMD_PARAMS+AWI_CA_SYNC_DWELL, bp->dwell_time);
sc 2035 dev/ic/awi.c awi_write_2(sc, AWI_CMD_PARAMS+AWI_CA_SYNC_MBZ, 0);
sc 2036 dev/ic/awi.c awi_write_bytes(sc, AWI_CMD_PARAMS+AWI_CA_SYNC_TIMESTAMP,
sc 2038 dev/ic/awi.c awi_write_4(sc, AWI_CMD_PARAMS+AWI_CA_SYNC_REFTIME, bp->rxtime);
sc 2039 dev/ic/awi.c (void)awi_cmd(sc, AWI_CMD_SYNC);
sc 2043 dev/ic/awi.c awi_sync_done(sc)
sc 2044 dev/ic/awi.c struct awi_softc *sc;
sc 2046 dev/ic/awi.c struct ifnet *ifp = sc->sc_ifp;
sc 2048 dev/ic/awi.c if (sc->sc_mib_local.Network_Mode) {
sc 2049 dev/ic/awi.c awi_drvstate(sc, AWI_DRV_INFSY);
sc 2050 dev/ic/awi.c awi_send_auth(sc, 1);
sc 2053 dev/ic/awi.c printf("%s: synced with", sc->sc_dev.dv_xname);
sc 2054 dev/ic/awi.c if (sc->sc_no_bssid)
sc 2058 dev/ic/awi.c ether_sprintf(sc->sc_bss.bssid));
sc 2059 dev/ic/awi.c awi_print_essid(sc->sc_bss.essid);
sc 2061 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH)
sc 2063 dev/ic/awi.c sc->sc_bss.chanset, sc->sc_bss.pattern);
sc 2065 dev/ic/awi.c printf(" at channel %d\n", sc->sc_bss.chanset);
sc 2067 dev/ic/awi.c awi_drvstate(sc, AWI_DRV_ADHSY);
sc 2068 dev/ic/awi.c sc->sc_status = AWI_ST_RUNNING;
sc 2075 dev/ic/awi.c awi_send_deauth(sc)
sc 2076 dev/ic/awi.c struct awi_softc *sc;
sc 2078 dev/ic/awi.c struct ifnet *ifp = sc->sc_ifp;
sc 2087 dev/ic/awi.c printf("%s: sending deauth to %s\n", sc->sc_dev.dv_xname,
sc 2088 dev/ic/awi.c ether_sprintf(sc->sc_bss.bssid));
sc 2096 dev/ic/awi.c memcpy(wh->i_addr1, sc->sc_bss.bssid, ETHER_ADDR_LEN);
sc 2097 dev/ic/awi.c memcpy(wh->i_addr2, sc->sc_mib_addr.aMAC_Address, ETHER_ADDR_LEN);
sc 2098 dev/ic/awi.c memcpy(wh->i_addr3, sc->sc_bss.bssid, ETHER_ADDR_LEN);
sc 2105 dev/ic/awi.c IF_ENQUEUE(&sc->sc_mgtq, m);
sc 2107 dev/ic/awi.c awi_drvstate(sc, AWI_DRV_INFTOSS);
sc 2111 dev/ic/awi.c awi_send_auth(sc, seq)
sc 2112 dev/ic/awi.c struct awi_softc *sc;
sc 2115 dev/ic/awi.c struct ifnet *ifp = sc->sc_ifp;
sc 2123 dev/ic/awi.c sc->sc_status = AWI_ST_AUTH;
sc 2125 dev/ic/awi.c printf("%s: sending auth to %s\n", sc->sc_dev.dv_xname,
sc 2126 dev/ic/awi.c ether_sprintf(sc->sc_bss.bssid));
sc 2134 dev/ic/awi.c memcpy(wh->i_addr1, sc->sc_bss.esrc, ETHER_ADDR_LEN);
sc 2135 dev/ic/awi.c memcpy(wh->i_addr2, sc->sc_mib_addr.aMAC_Address, ETHER_ADDR_LEN);
sc 2136 dev/ic/awi.c memcpy(wh->i_addr3, sc->sc_bss.bssid, ETHER_ADDR_LEN);
sc 2150 dev/ic/awi.c IF_ENQUEUE(&sc->sc_mgtq, m);
sc 2153 dev/ic/awi.c sc->sc_mgt_timer = AWI_TRANS_TIMEOUT / 1000;
sc 2158 dev/ic/awi.c awi_recv_auth(sc, m0)
sc 2159 dev/ic/awi.c struct awi_softc *sc;
sc 2170 dev/ic/awi.c if (sc->sc_ifp->if_flags & IFF_DEBUG)
sc 2171 dev/ic/awi.c printf("%s: receive auth from %s\n", sc->sc_dev.dv_xname,
sc 2178 dev/ic/awi.c if (!sc->sc_mib_local.Network_Mode) {
sc 2179 dev/ic/awi.c if (sc->sc_status != AWI_ST_RUNNING)
sc 2182 dev/ic/awi.c awi_send_auth(sc, 2);
sc 2185 dev/ic/awi.c if (sc->sc_status != AWI_ST_AUTH)
sc 2195 dev/ic/awi.c sc->sc_dev.dv_xname, status);
sc 2196 dev/ic/awi.c for (bp = TAILQ_FIRST(&sc->sc_scan); bp != NULL;
sc 2198 dev/ic/awi.c if (memcmp(bp->esrc, sc->sc_bss.esrc, ETHER_ADDR_LEN)
sc 2206 dev/ic/awi.c sc->sc_mgt_timer = 0;
sc 2207 dev/ic/awi.c awi_drvstate(sc, AWI_DRV_INFAUTH);
sc 2208 dev/ic/awi.c awi_send_asreq(sc, 0);
sc 2212 dev/ic/awi.c awi_send_asreq(sc, reassoc)
sc 2213 dev/ic/awi.c struct awi_softc *sc;
sc 2216 dev/ic/awi.c struct ifnet *ifp = sc->sc_ifp;
sc 2225 dev/ic/awi.c sc->sc_status = AWI_ST_ASSOC;
sc 2227 dev/ic/awi.c printf("%s: sending %sassoc req to %s\n", sc->sc_dev.dv_xname,
sc 2229 dev/ic/awi.c ether_sprintf(sc->sc_bss.bssid));
sc 2240 dev/ic/awi.c memcpy(wh->i_addr1, sc->sc_bss.esrc, ETHER_ADDR_LEN);
sc 2241 dev/ic/awi.c memcpy(wh->i_addr2, sc->sc_mib_addr.aMAC_Address, ETHER_ADDR_LEN);
sc 2242 dev/ic/awi.c memcpy(wh->i_addr3, sc->sc_bss.bssid, ETHER_ADDR_LEN);
sc 2247 dev/ic/awi.c if (sc->sc_wep_algo == NULL)
sc 2254 dev/ic/awi.c lintval = LE_READ_2(&sc->sc_mib_mgt.aListen_Interval);
sc 2259 dev/ic/awi.c memcpy(asreq, sc->sc_bss.bssid, ETHER_ADDR_LEN);
sc 2263 dev/ic/awi.c memcpy(asreq, sc->sc_bss.essid, 2 + sc->sc_bss.essid[1]);
sc 2266 dev/ic/awi.c memcpy(asreq, &sc->sc_mib_phy.aSuprt_Data_Rates, 4);
sc 2270 dev/ic/awi.c IF_ENQUEUE(&sc->sc_mgtq, m);
sc 2273 dev/ic/awi.c sc->sc_mgt_timer = AWI_TRANS_TIMEOUT / 1000;
sc 2278 dev/ic/awi.c awi_recv_asresp(sc, m0)
sc 2279 dev/ic/awi.c struct awi_softc *sc;
sc 2292 dev/ic/awi.c if (sc->sc_ifp->if_flags & IFF_DEBUG)
sc 2293 dev/ic/awi.c printf("%s: receive assoc resp from %s\n", sc->sc_dev.dv_xname,
sc 2296 dev/ic/awi.c if (!sc->sc_mib_local.Network_Mode)
sc 2299 dev/ic/awi.c if (sc->sc_status != AWI_ST_ASSOC)
sc 2307 dev/ic/awi.c sc->sc_dev.dv_xname, status);
sc 2308 dev/ic/awi.c for (bp = TAILQ_FIRST(&sc->sc_scan); bp != NULL;
sc 2310 dev/ic/awi.c if (memcmp(bp->esrc, sc->sc_bss.esrc, ETHER_ADDR_LEN)
sc 2326 dev/ic/awi.c phy_rates = sc->sc_mib_phy.aSuprt_Data_Rates;
sc 2333 dev/ic/awi.c if (sc->sc_ifp->if_flags & IFF_DEBUG) {
sc 2335 dev/ic/awi.c sc->sc_dev.dv_xname, ether_sprintf(sc->sc_bss.bssid));
sc 2336 dev/ic/awi.c awi_print_essid(sc->sc_bss.essid);
sc 2337 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH)
sc 2339 dev/ic/awi.c sc->sc_bss.chanset, sc->sc_bss.pattern);
sc 2341 dev/ic/awi.c printf(" channel %d\n", sc->sc_bss.chanset);
sc 2343 dev/ic/awi.c sc->sc_tx_rate = rate;
sc 2344 dev/ic/awi.c sc->sc_mgt_timer = 0;
sc 2345 dev/ic/awi.c sc->sc_rx_timer = 10;
sc 2346 dev/ic/awi.c sc->sc_ifp->if_timer = 1;
sc 2347 dev/ic/awi.c sc->sc_status = AWI_ST_RUNNING;
sc 2348 dev/ic/awi.c sc->sc_ifp->if_flags |= IFF_RUNNING;
sc 2349 dev/ic/awi.c awi_drvstate(sc, AWI_DRV_INFASSOC);
sc 2350 dev/ic/awi.c awi_start(sc->sc_ifp);
sc 2354 dev/ic/awi.c awi_mib(sc, cmd, mib)
sc 2355 dev/ic/awi.c struct awi_softc *sc;
sc 2364 dev/ic/awi.c ptr = (u_int8_t *)&sc->sc_mib_local;
sc 2365 dev/ic/awi.c size = sizeof(sc->sc_mib_local);
sc 2368 dev/ic/awi.c ptr = (u_int8_t *)&sc->sc_mib_addr;
sc 2369 dev/ic/awi.c size = sizeof(sc->sc_mib_addr);
sc 2372 dev/ic/awi.c ptr = (u_int8_t *)&sc->sc_mib_mac;
sc 2373 dev/ic/awi.c size = sizeof(sc->sc_mib_mac);
sc 2376 dev/ic/awi.c ptr = (u_int8_t *)&sc->sc_mib_stat;
sc 2377 dev/ic/awi.c size = sizeof(sc->sc_mib_stat);
sc 2380 dev/ic/awi.c ptr = (u_int8_t *)&sc->sc_mib_mgt;
sc 2381 dev/ic/awi.c size = sizeof(sc->sc_mib_mgt);
sc 2384 dev/ic/awi.c ptr = (u_int8_t *)&sc->sc_mib_phy;
sc 2385 dev/ic/awi.c size = sizeof(sc->sc_mib_phy);
sc 2390 dev/ic/awi.c if (sc->sc_cmd_inprog) {
sc 2391 dev/ic/awi.c error = awi_cmd_wait(sc);
sc 2395 dev/ic/awi.c sc->sc_cmd_inprog);
sc 2399 dev/ic/awi.c sc->sc_cmd_inprog = cmd;
sc 2401 dev/ic/awi.c awi_write_bytes(sc, AWI_CMD_PARAMS+AWI_CA_MIB_DATA, ptr, size);
sc 2402 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_MIB_TYPE, mib);
sc 2403 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_MIB_SIZE, size);
sc 2404 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_MIB_INDEX, 0);
sc 2405 dev/ic/awi.c error = awi_cmd(sc, cmd);
sc 2409 dev/ic/awi.c awi_read_bytes(sc, AWI_CMD_PARAMS+AWI_CA_MIB_DATA, ptr, size);
sc 2425 dev/ic/awi.c awi_cmd_scan(sc)
sc 2426 dev/ic/awi.c struct awi_softc *sc;
sc 2431 dev/ic/awi.c if (sc->sc_active_scan)
sc 2435 dev/ic/awi.c if (sc->sc_mib_mgt.aScan_Mode != scan_mode) {
sc 2436 dev/ic/awi.c sc->sc_mib_mgt.aScan_Mode = scan_mode;
sc 2437 dev/ic/awi.c error = awi_mib(sc, AWI_CMD_SET_MIB, AWI_MIB_MGT);
sc 2441 dev/ic/awi.c if (sc->sc_cmd_inprog) {
sc 2442 dev/ic/awi.c error = awi_cmd_wait(sc);
sc 2446 dev/ic/awi.c sc->sc_cmd_inprog = AWI_CMD_SCAN;
sc 2447 dev/ic/awi.c awi_write_2(sc, AWI_CMD_PARAMS+AWI_CA_SCAN_DURATION,
sc 2448 dev/ic/awi.c sc->sc_active_scan ? AWI_ASCAN_DURATION : AWI_PSCAN_DURATION);
sc 2449 dev/ic/awi.c if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH) {
sc 2450 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_SCAN_SET,
sc 2451 dev/ic/awi.c sc->sc_scan_set);
sc 2452 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_SCAN_PATTERN,
sc 2453 dev/ic/awi.c sc->sc_scan_cur);
sc 2454 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_SCAN_IDX, 1);
sc 2456 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_SCAN_SET,
sc 2457 dev/ic/awi.c sc->sc_scan_cur);
sc 2458 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_SCAN_PATTERN, 0);
sc 2459 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_SCAN_IDX, 0);
sc 2461 dev/ic/awi.c awi_write_1(sc, AWI_CMD_PARAMS+AWI_CA_SCAN_SUSP, 0);
sc 2462 dev/ic/awi.c return awi_cmd(sc, AWI_CMD_SCAN);
sc 2466 dev/ic/awi.c awi_cmd(sc, cmd)
sc 2467 dev/ic/awi.c struct awi_softc *sc;
sc 2473 dev/ic/awi.c sc->sc_cmd_inprog = cmd;
sc 2474 dev/ic/awi.c awi_write_1(sc, AWI_CMD_STATUS, AWI_STAT_IDLE);
sc 2475 dev/ic/awi.c awi_write_1(sc, AWI_CMD, cmd);
sc 2476 dev/ic/awi.c if (sc->sc_status != AWI_ST_INIT)
sc 2478 dev/ic/awi.c error = awi_cmd_wait(sc);
sc 2481 dev/ic/awi.c status = awi_read_1(sc, AWI_CMD_STATUS);
sc 2482 dev/ic/awi.c awi_write_1(sc, AWI_CMD, 0);
sc 2490 dev/ic/awi.c sc->sc_dev.dv_xname, cmd, status);
sc 2497 dev/ic/awi.c awi_cmd_done(sc)
sc 2498 dev/ic/awi.c struct awi_softc *sc;
sc 2502 dev/ic/awi.c status = awi_read_1(sc, AWI_CMD_STATUS);
sc 2506 dev/ic/awi.c cmd = sc->sc_cmd_inprog;
sc 2507 dev/ic/awi.c sc->sc_cmd_inprog = 0;
sc 2508 dev/ic/awi.c if (sc->sc_status == AWI_ST_INIT) {
sc 2509 dev/ic/awi.c wakeup(sc);
sc 2512 dev/ic/awi.c awi_write_1(sc, AWI_CMD, 0);
sc 2516 dev/ic/awi.c sc->sc_dev.dv_xname, cmd, status);
sc 2519 dev/ic/awi.c switch (sc->sc_status) {
sc 2522 dev/ic/awi.c awi_cmd_scan(sc); /* retry */
sc 2525 dev/ic/awi.c awi_try_sync(sc);
sc 2528 dev/ic/awi.c awi_sync_done(sc);
sc 2536 dev/ic/awi.c awi_next_txd(sc, len, framep, ntxdp)
sc 2537 dev/ic/awi.c struct awi_softc *sc;
sc 2543 dev/ic/awi.c txd = sc->sc_txnext;
sc 2545 dev/ic/awi.c if (frame + len > sc->sc_txend)
sc 2546 dev/ic/awi.c frame = sc->sc_txbase;
sc 2548 dev/ic/awi.c if (ntxd + AWI_TXD_SIZE > sc->sc_txend)
sc 2549 dev/ic/awi.c ntxd = sc->sc_txbase;
sc 2564 dev/ic/awi.c if (txd < sc->sc_txdone && ntxd + AWI_TXD_SIZE > sc->sc_txdone)
sc 2567 dev/ic/awi.c if (txd < sc->sc_txdone || ntxd + AWI_TXD_SIZE > sc->sc_txdone)
sc 2574 dev/ic/awi.c awi_lock(sc)
sc 2575 dev/ic/awi.c struct awi_softc *sc;
sc 2587 dev/ic/awi.c if (sc->sc_busy) {
sc 2589 dev/ic/awi.c if (sc->sc_invalid)
sc 2592 dev/ic/awi.c sc->sc_busy = 1;
sc 2593 dev/ic/awi.c sc->sc_cansleep = 0;
sc 2596 dev/ic/awi.c while (sc->sc_busy) {
sc 2597 dev/ic/awi.c if (sc->sc_invalid)
sc 2599 dev/ic/awi.c sc->sc_sleep_cnt++;
sc 2600 dev/ic/awi.c error = tsleep(sc, PWAIT | PCATCH, "awilck", 0);
sc 2601 dev/ic/awi.c sc->sc_sleep_cnt--;
sc 2605 dev/ic/awi.c sc->sc_busy = 1;
sc 2606 dev/ic/awi.c sc->sc_cansleep = 1;
sc 2611 dev/ic/awi.c awi_unlock(sc)
sc 2612 dev/ic/awi.c struct awi_softc *sc;
sc 2614 dev/ic/awi.c sc->sc_busy = 0;
sc 2615 dev/ic/awi.c sc->sc_cansleep = 0;
sc 2616 dev/ic/awi.c if (sc->sc_sleep_cnt)
sc 2617 dev/ic/awi.c wakeup(sc);
sc 2621 dev/ic/awi.c awi_intr_lock(sc)
sc 2622 dev/ic/awi.c struct awi_softc *sc;
sc 2630 dev/ic/awi.c status = awi_read_1(sc, AWI_LOCKOUT_HOST);
sc 2637 dev/ic/awi.c awi_write_1(sc, AWI_LOCKOUT_MAC, 1);
sc 2638 dev/ic/awi.c status = awi_read_1(sc, AWI_LOCKOUT_HOST);
sc 2641 dev/ic/awi.c awi_write_1(sc, AWI_LOCKOUT_MAC, 0);
sc 2645 dev/ic/awi.c sc->sc_dev.dv_xname);
sc 2652 dev/ic/awi.c awi_intr_unlock(sc)
sc 2653 dev/ic/awi.c struct awi_softc *sc;
sc 2656 dev/ic/awi.c awi_write_1(sc, AWI_LOCKOUT_MAC, 0);
sc 2660 dev/ic/awi.c awi_cmd_wait(sc)
sc 2661 dev/ic/awi.c struct awi_softc *sc;
sc 2666 dev/ic/awi.c while (sc->sc_cmd_inprog) {
sc 2667 dev/ic/awi.c if (sc->sc_invalid)
sc 2669 dev/ic/awi.c if (awi_read_1(sc, AWI_CMD) != sc->sc_cmd_inprog) {
sc 2671 dev/ic/awi.c sc->sc_dev.dv_xname);
sc 2672 dev/ic/awi.c sc->sc_invalid = 1;
sc 2675 dev/ic/awi.c if (sc->sc_cansleep) {
sc 2676 dev/ic/awi.c sc->sc_sleep_cnt++;
sc 2677 dev/ic/awi.c error = tsleep(sc, PWAIT, "awicmd",
sc 2679 dev/ic/awi.c sc->sc_sleep_cnt--;
sc 2681 dev/ic/awi.c if (awi_read_1(sc, AWI_CMD_STATUS) != AWI_STAT_IDLE) {
sc 2682 dev/ic/awi.c awi_cmd_done(sc);
sc 2725 dev/ic/awi.c awi_dump_pkt(sc, m, rssi)
sc 2726 dev/ic/awi.c struct awi_softc *sc;
sc 160 dev/ic/awi_wep.c awi_wep_setnwkey(sc, nwkey)
sc 161 dev/ic/awi_wep.c struct awi_softc *sc;
sc 182 dev/ic/awi_wep.c error = awi_wep_setkey(sc, i, keybuf, len);
sc 187 dev/ic/awi_wep.c sc->sc_wep_defkid = nwkey->i_defkid - 1;
sc 188 dev/ic/awi_wep.c error = awi_wep_setalgo(sc, nwkey->i_wepon);
sc 189 dev/ic/awi_wep.c if (error == 0 && sc->sc_enabled) {
sc 190 dev/ic/awi_wep.c awi_stop(sc);
sc 191 dev/ic/awi_wep.c error = awi_init(sc);
sc 198 dev/ic/awi_wep.c awi_wep_getnwkey(sc, nwkey)
sc 199 dev/ic/awi_wep.c struct awi_softc *sc;
sc 205 dev/ic/awi_wep.c nwkey->i_wepon = awi_wep_getalgo(sc);
sc 206 dev/ic/awi_wep.c nwkey->i_defkid = sc->sc_wep_defkid + 1;
sc 226 dev/ic/awi_wep.c error = awi_wep_getkey(sc, i, keybuf, &len);
sc 242 dev/ic/awi_wep.c awi_wep_getalgo(sc)
sc 243 dev/ic/awi_wep.c struct awi_softc *sc;
sc 246 dev/ic/awi_wep.c if (sc->sc_wep_algo == NULL)
sc 248 dev/ic/awi_wep.c return sc->sc_wep_algo - awi_wep_algo;
sc 252 dev/ic/awi_wep.c awi_wep_setalgo(sc, algo)
sc 253 dev/ic/awi_wep.c struct awi_softc *sc;
sc 270 dev/ic/awi_wep.c if (sc->sc_wep_ctx != NULL) {
sc 271 dev/ic/awi_wep.c free(sc->sc_wep_ctx, M_DEVBUF);
sc 272 dev/ic/awi_wep.c sc->sc_wep_ctx = NULL;
sc 275 dev/ic/awi_wep.c sc->sc_wep_ctx = malloc(ctxlen, M_DEVBUF, M_NOWAIT);
sc 276 dev/ic/awi_wep.c if (sc->sc_wep_ctx == NULL)
sc 279 dev/ic/awi_wep.c sc->sc_wep_algo = awa;
sc 284 dev/ic/awi_wep.c awi_wep_setkey(sc, kid, key, keylen)
sc 285 dev/ic/awi_wep.c struct awi_softc *sc;
sc 295 dev/ic/awi_wep.c sc->sc_wep_keylen[kid] = keylen;
sc 297 dev/ic/awi_wep.c memcpy(sc->sc_wep_key[kid] + IEEE80211_WEP_IVLEN, key, keylen);
sc 302 dev/ic/awi_wep.c awi_wep_getkey(sc, kid, key, keylen)
sc 303 dev/ic/awi_wep.c struct awi_softc *sc;
sc 311 dev/ic/awi_wep.c if (*keylen < sc->sc_wep_keylen[kid])
sc 313 dev/ic/awi_wep.c *keylen = sc->sc_wep_keylen[kid];
sc 315 dev/ic/awi_wep.c memcpy(key, sc->sc_wep_key[kid] + IEEE80211_WEP_IVLEN, *keylen);
sc 320 dev/ic/awi_wep.c awi_wep_encrypt(sc, m0, txflag)
sc 321 dev/ic/awi_wep.c struct awi_softc *sc;
sc 335 dev/ic/awi_wep.c awa = sc->sc_wep_algo;
sc 338 dev/ic/awi_wep.c ctx = sc->sc_wep_ctx;
sc 367 dev/ic/awi_wep.c kid = sc->sc_wep_defkid;
sc 386 dev/ic/awi_wep.c key = sc->sc_wep_key[kid];
sc 387 dev/ic/awi_wep.c keylen = sc->sc_wep_keylen[kid];
sc 171 dev/ic/awivar.h #define awi_read_1(sc, off) ((sc)->sc_chip.sc_ops->read_1)(&sc->sc_chip, off)
sc 172 dev/ic/awivar.h #define awi_read_2(sc, off) ((sc)->sc_chip.sc_ops->read_2)(&sc->sc_chip, off)
sc 173 dev/ic/awivar.h #define awi_read_4(sc, off) ((sc)->sc_chip.sc_ops->read_4)(&sc->sc_chip, off)
sc 174 dev/ic/awivar.h #define awi_read_bytes(sc, off, ptr, len) ((sc)->sc_chip.sc_ops->read_bytes)(&sc->sc_chip, off, ptr, len)
sc 176 dev/ic/awivar.h #define awi_write_1(sc, off, val) \
sc 177 dev/ic/awivar.h ((sc)->sc_chip.sc_ops->write_1)(&sc->sc_chip, off, val)
sc 178 dev/ic/awivar.h #define awi_write_2(sc, off, val) \
sc 179 dev/ic/awivar.h ((sc)->sc_chip.sc_ops->write_2)(&sc->sc_chip, off, val)
sc 180 dev/ic/awivar.h #define awi_write_4(sc, off, val) \
sc 181 dev/ic/awivar.h ((sc)->sc_chip.sc_ops->write_4)(&sc->sc_chip, off, val)
sc 182 dev/ic/awivar.h #define awi_write_bytes(sc, off, ptr, len) \
sc 183 dev/ic/awivar.h ((sc)->sc_chip.sc_ops->write_bytes)(&sc->sc_chip, off, ptr, len)
sc 185 dev/ic/awivar.h #define awi_drvstate(sc, state) \
sc 186 dev/ic/awivar.h awi_write_1(sc, AWI_DRIVERSTATE, \
sc 215 dev/ic/awivar.h void awi_stop(struct awi_softc *sc);
sc 216 dev/ic/awivar.h int awi_init(struct awi_softc *sc);
sc 96 dev/ic/ax88190.c ax88190_media_init(struct dp8390_softc *sc)
sc 98 dev/ic/ax88190.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 100 dev/ic/ax88190.c sc->sc_mii.mii_ifp = ifp;
sc 101 dev/ic/ax88190.c sc->sc_mii.mii_readreg = ax88190_mii_readreg;
sc 102 dev/ic/ax88190.c sc->sc_mii.mii_writereg = ax88190_mii_writereg;
sc 103 dev/ic/ax88190.c sc->sc_mii.mii_statchg = ax88190_mii_statchg;
sc 104 dev/ic/ax88190.c ifmedia_init(&sc->sc_mii.mii_media, 0, dp8390_mediachange,
sc 107 dev/ic/ax88190.c mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
sc 110 dev/ic/ax88190.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 111 dev/ic/ax88190.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0,
sc 113 dev/ic/ax88190.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
sc 115 dev/ic/ax88190.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 119 dev/ic/ax88190.c ax88190_media_fini(struct dp8390_softc *sc)
sc 121 dev/ic/ax88190.c mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
sc 125 dev/ic/ax88190.c ax88190_mediachange(struct dp8390_softc *sc)
sc 127 dev/ic/ax88190.c mii_mediachg(&sc->sc_mii);
sc 132 dev/ic/ax88190.c ax88190_mediastatus(struct dp8390_softc *sc, struct ifmediareq *ifmr)
sc 134 dev/ic/ax88190.c mii_pollstat(&sc->sc_mii);
sc 135 dev/ic/ax88190.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 136 dev/ic/ax88190.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 140 dev/ic/ax88190.c ax88190_init_card(struct dp8390_softc *sc)
sc 142 dev/ic/ax88190.c mii_mediachg(&sc->sc_mii);
sc 146 dev/ic/ax88190.c ax88190_stop_card(struct dp8390_softc *sc)
sc 148 dev/ic/ax88190.c mii_down(&sc->sc_mii);
sc 155 dev/ic/ax88190.c struct ne2000_softc *sc = (void *)self;
sc 157 dev/ic/ax88190.c return (bus_space_read_1(sc->sc_asict, sc->sc_asich, AX88190_MEMR));
sc 165 dev/ic/ax88190.c struct ne2000_softc *sc = (void *)self;
sc 167 dev/ic/ax88190.c bus_space_write_1(sc->sc_asict, sc->sc_asich, AX88190_MEMR, val);
sc 89 dev/ic/bha.c #define ISWIDE(sc) ((sc)->sc_iswide)
sc 135 dev/ic/bha.c bha_enqueue(sc, xs, infront)
sc 136 dev/ic/bha.c struct bha_softc *sc;
sc 141 dev/ic/bha.c if (infront || LIST_EMPTY(&sc->sc_queue)) {
sc 142 dev/ic/bha.c if (LIST_EMPTY(&sc->sc_queue))
sc 143 dev/ic/bha.c sc->sc_queuelast = xs;
sc 144 dev/ic/bha.c LIST_INSERT_HEAD(&sc->sc_queue, xs, free_list);
sc 148 dev/ic/bha.c LIST_INSERT_AFTER(sc->sc_queuelast, xs, free_list);
sc 149 dev/ic/bha.c sc->sc_queuelast = xs;
sc 156 dev/ic/bha.c bha_dequeue(sc)
sc 157 dev/ic/bha.c struct bha_softc *sc;
sc 161 dev/ic/bha.c xs = LIST_FIRST(&sc->sc_queue);
sc 164 dev/ic/bha.c if (LIST_EMPTY(&sc->sc_queue))
sc 165 dev/ic/bha.c sc->sc_queuelast = NULL;
sc 185 dev/ic/bha.c bha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf)
sc 188 dev/ic/bha.c struct bha_softc *sc;
sc 198 dev/ic/bha.c if (sc != NULL)
sc 199 dev/ic/bha.c name = sc->sc_dev.dv_xname;
sc 311 dev/ic/bha.c bha_attach(sc, bpd)
sc 312 dev/ic/bha.c struct bha_softc *sc;
sc 321 dev/ic/bha.c sc->sc_adapter.scsi_cmd = bha_scsi_cmd;
sc 322 dev/ic/bha.c sc->sc_adapter.scsi_minphys = bhaminphys;
sc 327 dev/ic/bha.c sc->sc_link.adapter_softc = sc;
sc 328 dev/ic/bha.c sc->sc_link.adapter_target = bpd->sc_scsi_dev;
sc 329 dev/ic/bha.c sc->sc_link.adapter = &sc->sc_adapter;
sc 330 dev/ic/bha.c sc->sc_link.device = &bha_dev;
sc 331 dev/ic/bha.c sc->sc_link.openings = 4;
sc 333 dev/ic/bha.c TAILQ_INIT(&sc->sc_free_ccb);
sc 334 dev/ic/bha.c TAILQ_INIT(&sc->sc_waiting_ccb);
sc 335 dev/ic/bha.c LIST_INIT(&sc->sc_queue);
sc 338 dev/ic/bha.c bha_inquire_setup_information(sc);
sc 340 dev/ic/bha.c printf("%s: model BT-%s, firmware %s\n", sc->sc_dev.dv_xname,
sc 341 dev/ic/bha.c sc->sc_model, sc->sc_firmware);
sc 343 dev/ic/bha.c if (bha_init(sc) != 0) {
sc 352 dev/ic/bha.c saa.saa_sc_link = &sc->sc_link;
sc 357 dev/ic/bha.c config_found(&sc->sc_dev, &saa, scsiprint);
sc 361 dev/ic/bha.c bha_finish_ccbs(sc)
sc 362 dev/ic/bha.c struct bha_softc *sc;
sc 370 dev/ic/bha.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
sc 371 dev/ic/bha.c 0, sc->sc_dmamap_control->dm_mapsize,
sc 378 dev/ic/bha.c sc->sc_dev.dv_xname);
sc 382 dev/ic/bha.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
sc 383 dev/ic/bha.c 0, sc->sc_dmamap_control->dm_mapsize,
sc 388 dev/ic/bha.c sc->sc_dev.dv_xname);
sc 395 dev/ic/bha.c ccb = bha_ccb_phys_kv(sc, phystol(wmbi->ccb_addr));
sc 398 dev/ic/bha.c sc->sc_dev.dv_xname);
sc 402 dev/ic/bha.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
sc 403 dev/ic/bha.c 0, sc->sc_dmamap_control->dm_mapsize,
sc 444 dev/ic/bha.c sc->sc_dev.dv_xname, wmbi->comp_stat);
sc 449 dev/ic/bha.c bha_done(sc, ccb);
sc 453 dev/ic/bha.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
sc 454 dev/ic/bha.c 0, sc->sc_dmamap_control->dm_mapsize,
sc 457 dev/ic/bha.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
sc 458 dev/ic/bha.c 0, sc->sc_dmamap_control->dm_mapsize,
sc 472 dev/ic/bha.c struct bha_softc *sc = arg;
sc 473 dev/ic/bha.c bus_space_tag_t iot = sc->sc_iot;
sc 474 dev/ic/bha.c bus_space_handle_t ioh = sc->sc_ioh;
sc 478 dev/ic/bha.c printf("%s: bha_intr ", sc->sc_dev.dv_xname);
sc 492 dev/ic/bha.c bha_collect_mbo(sc);
sc 501 dev/ic/bha.c bha_cmd(iot, ioh, sc,
sc 504 dev/ic/bha.c bha_start_ccbs(sc);
sc 509 dev/ic/bha.c bha_finish_ccbs(sc);
sc 515 dev/ic/bha.c bha_reset_ccb(sc, ccb)
sc 516 dev/ic/bha.c struct bha_softc *sc;
sc 527 dev/ic/bha.c bha_free_ccb(sc, ccb)
sc 528 dev/ic/bha.c struct bha_softc *sc;
sc 535 dev/ic/bha.c bha_reset_ccb(sc, ccb);
sc 536 dev/ic/bha.c TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain);
sc 543 dev/ic/bha.c wakeup(&sc->sc_free_ccb);
sc 549 dev/ic/bha.c bha_init_ccb(sc, ccb)
sc 550 dev/ic/bha.c struct bha_softc *sc;
sc 553 dev/ic/bha.c bus_dma_tag_t dmat = sc->sc_dmat;
sc 560 dev/ic/bha.c 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW | sc->sc_dmaflags,
sc 564 dev/ic/bha.c sc->sc_dev.dv_xname, error);
sc 572 dev/ic/bha.c ccb->hashkey = sc->sc_dmamap_control->dm_segs[0].ds_addr +
sc 575 dev/ic/bha.c ccb->nexthash = sc->sc_ccbhash[hashnum];
sc 576 dev/ic/bha.c sc->sc_ccbhash[hashnum] = ccb;
sc 577 dev/ic/bha.c bha_reset_ccb(sc, ccb);
sc 586 dev/ic/bha.c bha_create_ccbs(sc, ccbstore, count)
sc 587 dev/ic/bha.c struct bha_softc *sc;
sc 597 dev/ic/bha.c if ((error = bha_init_ccb(sc, ccb)) != 0) {
sc 599 dev/ic/bha.c sc->sc_dev.dv_xname, error);
sc 602 dev/ic/bha.c TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, chain);
sc 615 dev/ic/bha.c bha_get_ccb(sc, flags)
sc 616 dev/ic/bha.c struct bha_softc *sc;
sc 629 dev/ic/bha.c ccb = TAILQ_FIRST(&sc->sc_free_ccb);
sc 631 dev/ic/bha.c TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain);
sc 636 dev/ic/bha.c tsleep(&sc->sc_free_ccb, PRIBIO, "bhaccb", 0);
sc 650 dev/ic/bha.c bha_ccb_phys_kv(sc, ccb_phys)
sc 651 dev/ic/bha.c struct bha_softc *sc;
sc 655 dev/ic/bha.c struct bha_ccb *ccb = sc->sc_ccbhash[hashnum];
sc 669 dev/ic/bha.c bha_queue_ccb(sc, ccb)
sc 670 dev/ic/bha.c struct bha_softc *sc;
sc 675 dev/ic/bha.c TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain);
sc 676 dev/ic/bha.c bha_start_ccbs(sc);
sc 683 dev/ic/bha.c bha_collect_mbo(sc)
sc 684 dev/ic/bha.c struct bha_softc *sc;
sc 693 dev/ic/bha.c while (sc->sc_mbofull > 0) {
sc 694 dev/ic/bha.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
sc 695 dev/ic/bha.c 0, sc->sc_dmamap_control->dm_mapsize,
sc 701 dev/ic/bha.c ccb = bha_ccb_phys_kv(sc, phystol(wmbo->ccb_addr));
sc 705 dev/ic/bha.c --sc->sc_mbofull;
sc 716 dev/ic/bha.c bha_start_ccbs(sc)
sc 717 dev/ic/bha.c struct bha_softc *sc;
sc 719 dev/ic/bha.c bus_space_tag_t iot = sc->sc_iot;
sc 720 dev/ic/bha.c bus_space_handle_t ioh = sc->sc_ioh;
sc 727 dev/ic/bha.c while ((ccb = TAILQ_FIRST(&sc->sc_waiting_ccb)) != NULL) {
sc 730 dev/ic/bha.c if (sc->sc_mbofull >= BHA_MBX_SIZE) {
sc 731 dev/ic/bha.c bha_collect_mbo(sc);
sc 732 dev/ic/bha.c if (sc->sc_mbofull >= BHA_MBX_SIZE) {
sc 737 dev/ic/bha.c bha_cmd(iot, ioh, sc,
sc 744 dev/ic/bha.c TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain);
sc 750 dev/ic/bha.c ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr +
sc 757 dev/ic/bha.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
sc 758 dev/ic/bha.c 0, sc->sc_dmamap_control->dm_mapsize,
sc 767 dev/ic/bha.c ++sc->sc_mbofull;
sc 780 dev/ic/bha.c bha_done(sc, ccb)
sc 781 dev/ic/bha.c struct bha_softc *sc;
sc 784 dev/ic/bha.c bus_dma_tag_t dmat = sc->sc_dmat;
sc 809 dev/ic/bha.c sc->sc_dev.dv_xname);
sc 816 dev/ic/bha.c sc->sc_dev.dv_xname);
sc 828 dev/ic/bha.c sc->sc_dev.dv_xname, ccb->host_stat);
sc 845 dev/ic/bha.c sc->sc_dev.dv_xname, ccb->target_stat);
sc 852 dev/ic/bha.c bha_free_ccb(sc, ccb);
sc 864 dev/ic/bha.c if ((xs = LIST_FIRST(&sc->sc_queue)) != NULL)
sc 872 dev/ic/bha.c bha_find(iot, ioh, sc)
sc 875 dev/ic/bha.c struct bha_probe_data *sc;
sc 1033 dev/ic/bha.c if (sc != NULL) {
sc 1034 dev/ic/bha.c sc->sc_irq = irq;
sc 1035 dev/ic/bha.c sc->sc_drq = drq;
sc 1036 dev/ic/bha.c sc->sc_scsi_dev = config.reply.scsi_dev;
sc 1037 dev/ic/bha.c sc->sc_iswide = iswide;
sc 1049 dev/ic/bha.c bha_disable_isacompat(sc)
sc 1050 dev/ic/bha.c struct bha_softc *sc;
sc 1056 dev/ic/bha.c bha_cmd(sc->sc_iot, sc->sc_ioh, sc,
sc 1067 dev/ic/bha.c bha_init(sc)
sc 1068 dev/ic/bha.c struct bha_softc *sc;
sc 1070 dev/ic/bha.c bus_space_tag_t iot = sc->sc_iot;
sc 1071 dev/ic/bha.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1080 dev/ic/bha.c if (strcmp(sc->sc_firmware, "3.31") >= 0) {
sc 1085 dev/ic/bha.c bha_cmd(iot, ioh, sc,
sc 1098 dev/ic/bha.c bha_cmd(iot, ioh, sc,
sc 1114 dev/ic/bha.c if (ISWIDE(sc)) {
sc 1116 dev/ic/bha.c bha_cmd(iot, ioh, sc,
sc 1128 dev/ic/bha.c initial_ccbs *= sc->sc_link.openings;
sc 1132 dev/ic/bha.c initial_ccbs = sc->sc_link.openings;
sc 1136 dev/ic/bha.c (ISWIDE(sc) ? sizeof(setup.reply_w) : 0);
sc 1139 dev/ic/bha.c bha_cmd(iot, ioh, sc,
sc 1143 dev/ic/bha.c printf("%s: %s, %s\n", sc->sc_dev.dv_xname,
sc 1149 dev/ic/bha.c if (ISWIDE(sc)) {
sc 1155 dev/ic/bha.c if (sc->sc_firmware[0] >= '3') {
sc 1157 dev/ic/bha.c (ISWIDE(sc) ? sizeof(period.reply_w) : 0);
sc 1160 dev/ic/bha.c bha_cmd(iot, ioh, sc,
sc 1171 dev/ic/bha.c sc->sc_dev.dv_xname, i,
sc 1174 dev/ic/bha.c if (ISWIDE(sc)) {
sc 1181 dev/ic/bha.c sc->sc_dev.dv_xname, i + 8,
sc 1190 dev/ic/bha.c if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct bha_control),
sc 1193 dev/ic/bha.c "error = %d\n", sc->sc_dev.dv_xname, error);
sc 1196 dev/ic/bha.c if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
sc 1197 dev/ic/bha.c sizeof(struct bha_control), (caddr_t *)&sc->sc_control,
sc 1200 dev/ic/bha.c sc->sc_dev.dv_xname, error);
sc 1208 dev/ic/bha.c if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct bha_control),
sc 1209 dev/ic/bha.c 1, sizeof(struct bha_control), 0, BUS_DMA_NOWAIT | sc->sc_dmaflags,
sc 1210 dev/ic/bha.c &sc->sc_dmamap_control)) != 0) {
sc 1212 dev/ic/bha.c sc->sc_dev.dv_xname, error);
sc 1215 dev/ic/bha.c if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_control,
sc 1216 dev/ic/bha.c sc->sc_control, sizeof(struct bha_control), NULL,
sc 1219 dev/ic/bha.c sc->sc_dev.dv_xname, error);
sc 1226 dev/ic/bha.c i = bha_create_ccbs(sc, sc->sc_control->bc_ccbs, initial_ccbs);
sc 1229 dev/ic/bha.c sc->sc_dev.dv_xname);
sc 1233 dev/ic/bha.c sc->sc_dev.dv_xname, i, initial_ccbs);
sc 1241 dev/ic/bha.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
sc 1242 dev/ic/bha.c 0, sc->sc_dmamap_control->dm_mapsize,
sc 1245 dev/ic/bha.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
sc 1246 dev/ic/bha.c 0, sc->sc_dmamap_control->dm_mapsize,
sc 1251 dev/ic/bha.c sc->sc_mbofull = 0;
sc 1256 dev/ic/bha.c ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr +
sc 1258 dev/ic/bha.c bha_cmd(iot, ioh, sc,
sc 1265 dev/ic/bha.c bha_inquire_setup_information(sc)
sc 1266 dev/ic/bha.c struct bha_softc *sc;
sc 1268 dev/ic/bha.c bus_space_tag_t iot = sc->sc_iot;
sc 1269 dev/ic/bha.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1278 dev/ic/bha.c p = sc->sc_firmware;
sc 1280 dev/ic/bha.c bha_cmd(iot, ioh, sc,
sc 1287 dev/ic/bha.c bha_cmd(iot, ioh, sc,
sc 1295 dev/ic/bha.c bha_cmd(iot, ioh, sc,
sc 1300 dev/ic/bha.c while (p > sc->sc_firmware && (p[-1] == ' ' || p[-1] == '\0'))
sc 1308 dev/ic/bha.c p = sc->sc_model;
sc 1311 dev/ic/bha.c bha_cmd(iot, ioh, sc,
sc 1318 dev/ic/bha.c while (p > sc->sc_model && (p[-1] == ' ' || p[-1] == '\0'))
sc 1322 dev/ic/bha.c while (p > sc->sc_model && (p[-1] == ' ' || p[-1] == '\0'))
sc 1326 dev/ic/bha.c strlcpy(sc->sc_model, "542B", sizeof sc->sc_model);
sc 1348 dev/ic/bha.c struct bha_softc *sc = sc_link->adapter_softc;
sc 1349 dev/ic/bha.c bus_dma_tag_t dmat = sc->sc_dmat;
sc 1362 dev/ic/bha.c if (xs == LIST_FIRST(&sc->sc_queue)) {
sc 1363 dev/ic/bha.c xs = bha_dequeue(sc);
sc 1374 dev/ic/bha.c if (!LIST_EMPTY(&sc->sc_queue)) {
sc 1387 dev/ic/bha.c bha_enqueue(sc, xs, 0);
sc 1388 dev/ic/bha.c xs = bha_dequeue(sc);
sc 1399 dev/ic/bha.c if ((ccb = bha_get_ccb(sc, flags)) == NULL) {
sc 1412 dev/ic/bha.c bha_enqueue(sc, xs, fromqueue);
sc 1459 dev/ic/bha.c sc->sc_dev.dv_xname, BHA_NSEG);
sc 1463 dev/ic/bha.c sc->sc_dev.dv_xname, error);
sc 1484 dev/ic/bha.c ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr +
sc 1501 dev/ic/bha.c ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr +
sc 1510 dev/ic/bha.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control,
sc 1511 dev/ic/bha.c 0, sc->sc_dmamap_control->dm_mapsize,
sc 1515 dev/ic/bha.c bha_queue_ccb(sc, ccb);
sc 1528 dev/ic/bha.c if (bha_poll(sc, xs, ccb->timeout)) {
sc 1530 dev/ic/bha.c if (bha_poll(sc, xs, ccb->timeout))
sc 1537 dev/ic/bha.c bha_free_ccb(sc, ccb);
sc 1545 dev/ic/bha.c bha_poll(sc, xs, count)
sc 1546 dev/ic/bha.c struct bha_softc *sc;
sc 1550 dev/ic/bha.c bus_space_tag_t iot = sc->sc_iot;
sc 1551 dev/ic/bha.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1561 dev/ic/bha.c bha_intr(sc);
sc 1577 dev/ic/bha.c struct bha_softc *sc = sc_link->adapter_softc;
sc 1589 dev/ic/bha.c bha_collect_mbo(sc);
sc 1591 dev/ic/bha.c printf("%s: not taking commands!\n", sc->sc_dev.dv_xname);
sc 1611 dev/ic/bha.c bha_queue_ccb(sc, ccb);
sc 86 dev/ic/bhavar.h #define wmbx (&sc->sc_control->bc_mbx)
sc 117 dev/ic/bhavar.h (((u_long)(c)) - ((u_long)&sc->sc_control->bc_ccbs[0])))
sc 114 dev/ic/cac.c int cac_cmd(struct cac_softc *sc, int command, void *data, int datasize,
sc 116 dev/ic/cac.c int cac_get_dinfo(struct cac_softc *sc, int target);
sc 117 dev/ic/cac.c int cac_flush(struct cac_softc *sc);
sc 142 dev/ic/cac.c cac_init(struct cac_softc *sc, int startfw)
sc 150 dev/ic/cac.c SIMPLEQ_INIT(&sc->sc_ccb_free);
sc 151 dev/ic/cac.c SIMPLEQ_INIT(&sc->sc_ccb_queue);
sc 155 dev/ic/cac.c if ((error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, seg, 1,
sc 158 dev/ic/cac.c sc->sc_dv.dv_xname, error);
sc 162 dev/ic/cac.c if ((error = bus_dmamem_map(sc->sc_dmat, seg, rseg, size,
sc 163 dev/ic/cac.c &sc->sc_ccbs, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
sc 165 dev/ic/cac.c sc->sc_dv.dv_xname, error);
sc 169 dev/ic/cac.c if ((error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 170 dev/ic/cac.c BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
sc 172 dev/ic/cac.c sc->sc_dv.dv_xname, error);
sc 176 dev/ic/cac.c if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_ccbs,
sc 179 dev/ic/cac.c sc->sc_dv.dv_xname, error);
sc 183 dev/ic/cac.c sc->sc_ccbs_paddr = sc->sc_dmamap->dm_segs[0].ds_addr;
sc 184 dev/ic/cac.c memset(sc->sc_ccbs, 0, size);
sc 185 dev/ic/cac.c ccb = (struct cac_ccb *)sc->sc_ccbs;
sc 189 dev/ic/cac.c error = bus_dmamap_create(sc->sc_dmat, CAC_MAX_XFER,
sc 196 dev/ic/cac.c sc->sc_dv.dv_xname, error);
sc 200 dev/ic/cac.c ccb->ccb_paddr = sc->sc_ccbs_paddr + i * sizeof(struct cac_ccb);
sc 201 dev/ic/cac.c SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_free, ccb, ccb_chain);
sc 206 dev/ic/cac.c if (cac_cmd(sc, CAC_CMD_START_FIRMWARE, &cinfo, sizeof(cinfo),
sc 209 dev/ic/cac.c sc->sc_dv.dv_xname);
sc 214 dev/ic/cac.c if (cac_cmd(sc, CAC_CMD_GET_CTRL_INFO, &cinfo, sizeof(cinfo), 0, 0,
sc 217 dev/ic/cac.c sc->sc_dv.dv_xname);
sc 222 dev/ic/cac.c printf("%s: no volumes defined\n", sc->sc_dv.dv_xname);
sc 226 dev/ic/cac.c sc->sc_nunits = cinfo.num_drvs;
sc 227 dev/ic/cac.c sc->sc_dinfos = malloc(cinfo.num_drvs * sizeof(struct cac_drive_info),
sc 229 dev/ic/cac.c if (sc->sc_dinfos == NULL) {
sc 231 dev/ic/cac.c sc->sc_dv.dv_xname);
sc 234 dev/ic/cac.c bzero(sc->sc_dinfos, cinfo.num_drvs * sizeof(struct cac_drive_info));
sc 236 dev/ic/cac.c sc->sc_link.adapter_softc = sc;
sc 237 dev/ic/cac.c sc->sc_link.adapter = &cac_switch;
sc 238 dev/ic/cac.c sc->sc_link.adapter_target = cinfo.num_drvs;
sc 239 dev/ic/cac.c sc->sc_link.adapter_buswidth = cinfo.num_drvs;
sc 240 dev/ic/cac.c sc->sc_link.device = &cac_dev;
sc 241 dev/ic/cac.c sc->sc_link.openings = CAC_MAX_CCBS / sc->sc_nunits;
sc 242 dev/ic/cac.c if (sc->sc_link.openings < 4 )
sc 243 dev/ic/cac.c sc->sc_link.openings = 4;
sc 246 dev/ic/cac.c saa.saa_sc_link = &sc->sc_link;
sc 248 dev/ic/cac.c config_found(&sc->sc_dv, &saa, scsiprint);
sc 254 dev/ic/cac.c (*sc->sc_cl->cl_intr_enable)(sc, 1);
sc 260 dev/ic/cac.c cac_flush(sc)
sc 261 dev/ic/cac.c struct cac_softc *sc;
sc 267 dev/ic/cac.c return cac_cmd(sc, CAC_CMD_FLUSH_CACHE, buf, sizeof(buf), 0, 0,
sc 278 dev/ic/cac.c struct cac_softc *sc;
sc 282 dev/ic/cac.c if ((sc = (struct cac_softc *)device_lookup(&cac_cd, i)) == NULL)
sc 284 dev/ic/cac.c cac_flush(sc);
sc 296 dev/ic/cac.c struct cac_softc *sc = v;
sc 300 dev/ic/cac.c if (!(istat = (sc->sc_cl->cl_intr_pending)(sc)))
sc 304 dev/ic/cac.c while ((ccb = (*sc->sc_cl->cl_completed)(sc)) != NULL) {
sc 306 dev/ic/cac.c cac_ccb_done(sc, ccb);
sc 308 dev/ic/cac.c cac_ccb_start(sc, NULL);
sc 317 dev/ic/cac.c cac_cmd(struct cac_softc *sc, int command, void *data, int datasize,
sc 329 dev/ic/cac.c if ((ccb = cac_ccb_alloc(sc, 0)) == NULL) {
sc 330 dev/ic/cac.c printf("%s: unable to alloc CCB\n", sc->sc_dv.dv_xname);
sc 335 dev/ic/cac.c bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer,
sc 338 dev/ic/cac.c bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0,
sc 381 dev/ic/cac.c if ((*sc->sc_cl->cl_fifo_full)(sc)) {
sc 382 dev/ic/cac.c cac_ccb_free(sc, ccb);
sc 386 dev/ic/cac.c (*sc->sc_cl->cl_submit)(sc, ccb);
sc 387 dev/ic/cac.c rv = cac_ccb_poll(sc, ccb, 2000);
sc 390 dev/ic/cac.c rv = cac_ccb_start(sc, ccb);
sc 399 dev/ic/cac.c cac_ccb_poll(struct cac_softc *sc, struct cac_ccb *wantccb, int timo)
sc 406 dev/ic/cac.c if ((ccb = (*sc->sc_cl->cl_completed)(sc)) != NULL)
sc 409 dev/ic/cac.c printf("%s: timeout\n", sc->sc_dv.dv_xname);
sc 412 dev/ic/cac.c cac_ccb_done(sc, ccb);
sc 423 dev/ic/cac.c cac_ccb_start(struct cac_softc *sc, struct cac_ccb *ccb)
sc 426 dev/ic/cac.c SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain);
sc 428 dev/ic/cac.c while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL &&
sc 429 dev/ic/cac.c !(*sc->sc_cl->cl_fifo_full)(sc)) {
sc 430 dev/ic/cac.c SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain);
sc 432 dev/ic/cac.c (*sc->sc_cl->cl_submit)(sc, ccb);
sc 442 dev/ic/cac.c cac_ccb_done(struct cac_softc *sc, struct cac_ccb *ccb)
sc 448 dev/ic/cac.c printf("%s: CCB not active, xs=%p\n", sc->sc_dv.dv_xname, xs);
sc 457 dev/ic/cac.c bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0,
sc 461 dev/ic/cac.c bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer);
sc 465 dev/ic/cac.c printf("%s: soft error; corrected\n", sc->sc_dv.dv_xname);
sc 468 dev/ic/cac.c printf("%s: hard error\n", sc->sc_dv.dv_xname);
sc 472 dev/ic/cac.c printf("%s: invalid request\n", sc->sc_dv.dv_xname);
sc 475 dev/ic/cac.c cac_ccb_free(sc, ccb);
sc 491 dev/ic/cac.c cac_ccb_alloc(struct cac_softc *sc, int nosleep)
sc 495 dev/ic/cac.c if ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_free)) != NULL)
sc 496 dev/ic/cac.c SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_free, ccb_chain);
sc 506 dev/ic/cac.c cac_ccb_free(struct cac_softc *sc, struct cac_ccb *ccb)
sc 510 dev/ic/cac.c SIMPLEQ_INSERT_HEAD(&sc->sc_ccb_free, ccb, ccb_chain);
sc 514 dev/ic/cac.c cac_get_dinfo(sc, target)
sc 515 dev/ic/cac.c struct cac_softc *sc;
sc 518 dev/ic/cac.c if (sc->sc_dinfos[target].ncylinders)
sc 521 dev/ic/cac.c if (cac_cmd(sc, CAC_CMD_GET_LOG_DRV_INFO, &sc->sc_dinfos[target],
sc 522 dev/ic/cac.c sizeof(*sc->sc_dinfos), target, 0, CAC_CCB_DATA_IN, NULL)) {
sc 524 dev/ic/cac.c sc->sc_dv.dv_xname);
sc 561 dev/ic/cac.c struct cac_softc *sc = link->adapter_softc;
sc 573 dev/ic/cac.c if (target >= sc->sc_nunits || link->lun != 0) {
sc 581 dev/ic/cac.c dinfo = &sc->sc_dinfos[target];
sc 602 dev/ic/cac.c if (cac_get_dinfo(sc, target)) {
sc 627 dev/ic/cac.c if (cac_get_dinfo(sc, target)) {
sc 642 dev/ic/cac.c if (cac_flush(sc))
sc 667 dev/ic/cac.c sc->sc_dv.dv_xname, blockno, blockcnt, size);
sc 687 dev/ic/cac.c if ((error = cac_cmd(sc, op, xs->data, blockcnt * DEV_BSIZE,
sc 725 dev/ic/cac.c cac_l0_fifo_full(struct cac_softc *sc)
sc 728 dev/ic/cac.c return (cac_inl(sc, CAC_REG_CMD_FIFO) == 0);
sc 732 dev/ic/cac.c cac_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb)
sc 737 dev/ic/cac.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0,
sc 738 dev/ic/cac.c sc->sc_dmamap->dm_mapsize,
sc 740 dev/ic/cac.c cac_outl(sc, CAC_REG_CMD_FIFO, ccb->ccb_paddr);
sc 744 dev/ic/cac.c cac_l0_completed(sc)
sc 745 dev/ic/cac.c struct cac_softc *sc;
sc 750 dev/ic/cac.c if (!(off = cac_inl(sc, CAC_REG_DONE_FIFO)))
sc 758 dev/ic/cac.c off = (off & ~3) - sc->sc_ccbs_paddr;
sc 759 dev/ic/cac.c ccb = (struct cac_ccb *)(sc->sc_ccbs + off);
sc 761 dev/ic/cac.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0,
sc 762 dev/ic/cac.c sc->sc_dmamap->dm_mapsize,
sc 769 dev/ic/cac.c cac_l0_intr_pending(struct cac_softc *sc)
sc 772 dev/ic/cac.c return (cac_inl(sc, CAC_REG_INTR_PENDING));
sc 776 dev/ic/cac.c cac_l0_intr_enable(struct cac_softc *sc, int state)
sc 779 dev/ic/cac.c cac_outl(sc, CAC_REG_INTR_MASK,
sc 48 dev/ic/cacvar.h #define cac_inb(sc, port) \
sc 49 dev/ic/cacvar.h bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, port)
sc 50 dev/ic/cacvar.h #define cac_inw(sc, port) \
sc 51 dev/ic/cacvar.h bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, port)
sc 52 dev/ic/cacvar.h #define cac_inl(sc, port) \
sc 53 dev/ic/cacvar.h bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, port)
sc 54 dev/ic/cacvar.h #define cac_outb(sc, port, val) \
sc 55 dev/ic/cacvar.h bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, port, val)
sc 56 dev/ic/cacvar.h #define cac_outw(sc, port, val) \
sc 57 dev/ic/cacvar.h bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, port, val)
sc 58 dev/ic/cacvar.h #define cac_outl(sc, port, val) \
sc 59 dev/ic/cacvar.h bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, port, val)
sc 98 dev/ic/ciss.c int ciss_sync(struct ciss_softc *sc);
sc 106 dev/ic/ciss.c struct ciss_ccb *ciss_get_ccb(struct ciss_softc *sc);
sc 112 dev/ic/ciss.c struct ciss_ld *ciss_pdscan(struct ciss_softc *sc, int ld);
sc 113 dev/ic/ciss.c int ciss_inq(struct ciss_softc *sc, struct ciss_inquiry *inq);
sc 114 dev/ic/ciss.c int ciss_ldmap(struct ciss_softc *sc);
sc 121 dev/ic/ciss.c ciss_get_ccb(struct ciss_softc *sc)
sc 125 dev/ic/ciss.c if ((ccb = TAILQ_LAST(&sc->sc_free_ccb, ciss_queue_head))) {
sc 126 dev/ic/ciss.c TAILQ_REMOVE(&sc->sc_free_ccb, ccb, ccb_link);
sc 135 dev/ic/ciss.c struct ciss_softc *sc = ccb->ccb_sc;
sc 138 dev/ic/ciss.c TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, ccb_link);
sc 142 dev/ic/ciss.c ciss_attach(struct ciss_softc *sc)
sc 154 dev/ic/ciss.c bus_space_read_region_4(sc->iot, sc->cfg_ioh, sc->cfgoff,
sc 155 dev/ic/ciss.c (u_int32_t *)&sc->cfg, sizeof(sc->cfg) / 4);
sc 157 dev/ic/ciss.c if (sc->cfg.signature != CISS_SIGNATURE) {
sc 158 dev/ic/ciss.c printf(": bad sign 0x%08x\n", sc->cfg.signature);
sc 162 dev/ic/ciss.c if (!(sc->cfg.methods & CISS_METH_SIMPL)) {
sc 163 dev/ic/ciss.c printf(": not simple 0x%08x\n", sc->cfg.methods);
sc 167 dev/ic/ciss.c sc->cfg.rmethod = CISS_METH_SIMPL;
sc 168 dev/ic/ciss.c sc->cfg.paddr_lim = 0; /* 32bit addrs */
sc 169 dev/ic/ciss.c sc->cfg.int_delay = 0; /* disable coalescing */
sc 170 dev/ic/ciss.c sc->cfg.int_count = 0;
sc 171 dev/ic/ciss.c strlcpy(sc->cfg.hostname, "HUMPPA", sizeof(sc->cfg.hostname));
sc 172 dev/ic/ciss.c sc->cfg.driverf |= CISS_DRV_PRF; /* enable prefetch */
sc 173 dev/ic/ciss.c if (!sc->cfg.maxsg)
sc 174 dev/ic/ciss.c sc->cfg.maxsg = MAXPHYS / PAGE_SIZE;
sc 176 dev/ic/ciss.c bus_space_write_region_4(sc->iot, sc->cfg_ioh, sc->cfgoff,
sc 177 dev/ic/ciss.c (u_int32_t *)&sc->cfg, sizeof(sc->cfg) / 4);
sc 178 dev/ic/ciss.c bus_space_barrier(sc->iot, sc->cfg_ioh, sc->cfgoff, sizeof(sc->cfg),
sc 181 dev/ic/ciss.c bus_space_write_4(sc->iot, sc->ioh, CISS_IDB, CISS_IDB_CFG);
sc 182 dev/ic/ciss.c bus_space_barrier(sc->iot, sc->ioh, CISS_IDB, 4,
sc 186 dev/ic/ciss.c (void)bus_space_read_4(sc->iot, sc->ioh, CISS_IDB + 4);
sc 187 dev/ic/ciss.c if (!(bus_space_read_4(sc->iot, sc->ioh, CISS_IDB) & CISS_IDB_CFG))
sc 189 dev/ic/ciss.c bus_space_barrier(sc->iot, sc->ioh, CISS_IDB, 4,
sc 193 dev/ic/ciss.c if (bus_space_read_4(sc->iot, sc->ioh, CISS_IDB) & CISS_IDB_CFG) {
sc 198 dev/ic/ciss.c bus_space_read_region_4(sc->iot, sc->cfg_ioh, sc->cfgoff,
sc 199 dev/ic/ciss.c (u_int32_t *)&sc->cfg, sizeof(sc->cfg) / 4);
sc 201 dev/ic/ciss.c if (!(sc->cfg.amethod & CISS_METH_SIMPL)) {
sc 202 dev/ic/ciss.c printf(": cannot simplify 0x%08x\n", sc->cfg.amethod);
sc 208 dev/ic/ciss.c if (bus_space_read_4(sc->iot, sc->cfg_ioh, sc->cfgoff +
sc 211 dev/ic/ciss.c bus_space_barrier(sc->iot, sc->cfg_ioh, sc->cfgoff +
sc 216 dev/ic/ciss.c if (!(bus_space_read_4(sc->iot, sc->cfg_ioh, sc->cfgoff +
sc 219 dev/ic/ciss.c sc->cfg.amethod);
sc 223 dev/ic/ciss.c sc->maxcmd = sc->cfg.maxcmd;
sc 224 dev/ic/ciss.c sc->maxsg = sc->cfg.maxsg;
sc 225 dev/ic/ciss.c if (sc->maxsg > MAXPHYS / PAGE_SIZE)
sc 226 dev/ic/ciss.c sc->maxsg = MAXPHYS / PAGE_SIZE;
sc 228 dev/ic/ciss.c sizeof(ccb->ccb_cmd.sgl[0]) * (sc->maxsg - 1);
sc 229 dev/ic/ciss.c for (sc->ccblen = 0x10; sc->ccblen < i; sc->ccblen <<= 1);
sc 231 dev/ic/ciss.c total = sc->ccblen * sc->maxcmd;
sc 232 dev/ic/ciss.c if ((error = bus_dmamem_alloc(sc->dmat, total, PAGE_SIZE, 0,
sc 233 dev/ic/ciss.c sc->cmdseg, 1, &rseg, BUS_DMA_NOWAIT))) {
sc 238 dev/ic/ciss.c if ((error = bus_dmamem_map(sc->dmat, sc->cmdseg, rseg, total,
sc 239 dev/ic/ciss.c (caddr_t *)&sc->ccbs, BUS_DMA_NOWAIT))) {
sc 243 dev/ic/ciss.c bzero(sc->ccbs, total);
sc 245 dev/ic/ciss.c if ((error = bus_dmamap_create(sc->dmat, total, 1,
sc 246 dev/ic/ciss.c total, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &sc->cmdmap))) {
sc 248 dev/ic/ciss.c bus_dmamem_free(sc->dmat, sc->cmdseg, 1);
sc 252 dev/ic/ciss.c if ((error = bus_dmamap_load(sc->dmat, sc->cmdmap, sc->ccbs, total,
sc 255 dev/ic/ciss.c bus_dmamem_free(sc->dmat, sc->cmdseg, 1);
sc 256 dev/ic/ciss.c bus_dmamap_destroy(sc->dmat, sc->cmdmap);
sc 260 dev/ic/ciss.c TAILQ_INIT(&sc->sc_ccbq);
sc 261 dev/ic/ciss.c TAILQ_INIT(&sc->sc_ccbdone);
sc 262 dev/ic/ciss.c TAILQ_INIT(&sc->sc_free_ccb);
sc 264 dev/ic/ciss.c maxfer = sc->maxsg * PAGE_SIZE;
sc 265 dev/ic/ciss.c for (i = 0; total; i++, total -= sc->ccblen) {
sc 266 dev/ic/ciss.c ccb = sc->ccbs + i * sc->ccblen;
sc 268 dev/ic/ciss.c pa = sc->cmdseg[0].ds_addr + i * sc->ccblen;
sc 270 dev/ic/ciss.c ccb->ccb_sc = sc;
sc 276 dev/ic/ciss.c cmd->sgin = sc->maxsg;
sc 282 dev/ic/ciss.c if ((error = bus_dmamap_create(sc->dmat, maxfer, sc->maxsg,
sc 287 dev/ic/ciss.c TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, ccb_link);
sc 290 dev/ic/ciss.c if (i < sc->maxcmd) {
sc 294 dev/ic/ciss.c bus_dmamem_free(sc->dmat, sc->cmdseg, 1);
sc 295 dev/ic/ciss.c bus_dmamap_destroy(sc->dmat, sc->cmdmap);
sc 300 dev/ic/ciss.c if ((error = bus_dmamem_alloc(sc->dmat, PAGE_SIZE, PAGE_SIZE, 0,
sc 306 dev/ic/ciss.c if ((error = bus_dmamem_map(sc->dmat, seg, rseg, PAGE_SIZE,
sc 307 dev/ic/ciss.c (caddr_t *)&sc->scratch, BUS_DMA_NOWAIT))) {
sc 311 dev/ic/ciss.c bzero(sc->scratch, PAGE_SIZE);
sc 313 dev/ic/ciss.c lock = CISS_LOCK_SCRATCH(sc);
sc 314 dev/ic/ciss.c inq = sc->scratch;
sc 315 dev/ic/ciss.c if (ciss_inq(sc, inq)) {
sc 317 dev/ic/ciss.c CISS_UNLOCK_SCRATCH(sc, lock);
sc 318 dev/ic/ciss.c bus_dmamem_free(sc->dmat, sc->cmdseg, 1);
sc 319 dev/ic/ciss.c bus_dmamap_destroy(sc->dmat, sc->cmdmap);
sc 326 dev/ic/ciss.c CISS_UNLOCK_SCRATCH(sc, lock);
sc 327 dev/ic/ciss.c bus_dmamem_free(sc->dmat, sc->cmdseg, 1);
sc 328 dev/ic/ciss.c bus_dmamap_destroy(sc->dmat, sc->cmdmap);
sc 332 dev/ic/ciss.c sc->maxunits = inq->numld;
sc 333 dev/ic/ciss.c sc->nbus = inq->nscsi_bus;
sc 334 dev/ic/ciss.c sc->ndrives = inq->buswidth;
sc 339 dev/ic/ciss.c CISS_UNLOCK_SCRATCH(sc, lock);
sc 341 dev/ic/ciss.c timeout_set(&sc->sc_hb, ciss_heartbeat, sc);
sc 342 dev/ic/ciss.c timeout_add(&sc->sc_hb, hz * 3);
sc 345 dev/ic/ciss.c if (ciss_ldmap(sc)) {
sc 346 dev/ic/ciss.c printf("%s: adapter LD map failed\n", sc->sc_dev.dv_xname);
sc 347 dev/ic/ciss.c bus_dmamem_free(sc->dmat, sc->cmdseg, 1);
sc 348 dev/ic/ciss.c bus_dmamap_destroy(sc->dmat, sc->cmdmap);
sc 352 dev/ic/ciss.c if (!(sc->sc_lds = malloc(sc->maxunits * sizeof(*sc->sc_lds),
sc 354 dev/ic/ciss.c bus_dmamem_free(sc->dmat, sc->cmdseg, 1);
sc 355 dev/ic/ciss.c bus_dmamap_destroy(sc->dmat, sc->cmdmap);
sc 358 dev/ic/ciss.c bzero(sc->sc_lds, sc->maxunits * sizeof(*sc->sc_lds));
sc 360 dev/ic/ciss.c sc->sc_flush = CISS_FLUSH_ENABLE;
sc 361 dev/ic/ciss.c if (!(sc->sc_sh = shutdownhook_establish(ciss_shutdown, sc))) {
sc 363 dev/ic/ciss.c bus_dmamem_free(sc->dmat, sc->cmdseg, 1);
sc 364 dev/ic/ciss.c bus_dmamap_destroy(sc->dmat, sc->cmdmap);
sc 369 dev/ic/ciss.c if (kthread_create(ciss_kthread, sc, NULL, "%s", sc->sc_dev.dv_xname)) {
sc 371 dev/ic/ciss.c shutdownhook_disestablish(sc->sc_sh);
sc 372 dev/ic/ciss.c bus_dmamem_free(sc->dmat, sc->cmdseg, 1);
sc 373 dev/ic/ciss.c bus_dmamap_destroy(sc->dmat, sc->cmdmap);
sc 378 dev/ic/ciss.c sc->sc_link.device = &ciss_dev;
sc 379 dev/ic/ciss.c sc->sc_link.adapter_softc = sc;
sc 380 dev/ic/ciss.c sc->sc_link.openings = sc->maxcmd / (sc->maxunits? sc->maxunits : 1);
sc 383 dev/ic/ciss.c if (sc->maxunits < 2 && sc->sc_link.openings > 2)
sc 384 dev/ic/ciss.c sc->sc_link.openings -= 2;
sc 386 dev/ic/ciss.c sc->sc_link.adapter = &ciss_switch;
sc 387 dev/ic/ciss.c sc->sc_link.adapter_target = sc->maxunits;
sc 388 dev/ic/ciss.c sc->sc_link.adapter_buswidth = sc->maxunits;
sc 390 dev/ic/ciss.c saa.saa_sc_link = &sc->sc_link;
sc 391 dev/ic/ciss.c scsibus = (struct scsibus_softc *)config_found_sm(&sc->sc_dev,
sc 395 dev/ic/ciss.c sc->sc_link_raw.device = &ciss_raw_dev;
sc 396 dev/ic/ciss.c sc->sc_link_raw.adapter_softc = sc;
sc 397 dev/ic/ciss.c sc->sc_link.openings = sc->maxcmd / (sc->maxunits? sc->maxunits : 1);
sc 398 dev/ic/ciss.c sc->sc_link_raw.adapter = &ciss_raw_switch;
sc 399 dev/ic/ciss.c sc->sc_link_raw.adapter_target = sc->ndrives;
sc 400 dev/ic/ciss.c sc->sc_link_raw.adapter_buswidth = sc->ndrives;
sc 402 dev/ic/ciss.c saa.saa_sc_link = &sc->sc_link_raw;
sc 403 dev/ic/ciss.c rawbus = (struct scsibus_softc *)config_found_sm(&sc->sc_dev,
sc 409 dev/ic/ciss.c if (!scsibus || sc->maxunits > 1 || sc->sc_link.openings == sc->maxcmd)
sc 414 dev/ic/ciss.c for (i = 0; i < sc->maxunits; i++)
sc 415 dev/ic/ciss.c if (!(sc->sc_lds[i] = ciss_pdscan(sc, i)))
sc 418 dev/ic/ciss.c if (bio_register(&sc->sc_dev, ciss_ioctl) != 0)
sc 420 dev/ic/ciss.c sc->sc_dev.dv_xname);
sc 422 dev/ic/ciss.c sc->sc_flags |= CISS_BIO;
sc 424 dev/ic/ciss.c sc->sensors = malloc(sizeof(struct ksensor) * sc->maxunits,
sc 426 dev/ic/ciss.c if (sc->sensors) {
sc 427 dev/ic/ciss.c bzero(sc->sensors, sizeof(struct ksensor) * sc->maxunits);
sc 428 dev/ic/ciss.c strlcpy(sc->sensordev.xname, sc->sc_dev.dv_xname,
sc 429 dev/ic/ciss.c sizeof(sc->sensordev.xname));
sc 430 dev/ic/ciss.c for (i = 0; i < sc->maxunits;
sc 431 dev/ic/ciss.c sensor_attach(&sc->sensordev, &sc->sensors[i++])) {
sc 432 dev/ic/ciss.c sc->sensors[i].type = SENSOR_DRIVE;
sc 433 dev/ic/ciss.c sc->sensors[i].status = SENSOR_S_UNKNOWN;
sc 434 dev/ic/ciss.c strlcpy(sc->sensors[i].desc, ((struct device *)
sc 436 dev/ic/ciss.c sizeof(sc->sensors[i].desc));
sc 437 dev/ic/ciss.c strlcpy(sc->sc_lds[i]->xname, ((struct device *)
sc 439 dev/ic/ciss.c sizeof(sc->sc_lds[i]->xname));
sc 441 dev/ic/ciss.c if (sensor_task_register(sc, ciss_sensors, 10) == NULL)
sc 442 dev/ic/ciss.c free(sc->sensors, M_DEVBUF);
sc 444 dev/ic/ciss.c sensordev_install(&sc->sensordev);
sc 455 dev/ic/ciss.c struct ciss_softc *sc = v;
sc 457 dev/ic/ciss.c sc->sc_flush = CISS_FLUSH_DISABLE;
sc 458 dev/ic/ciss.c timeout_del(&sc->sc_hb);
sc 459 dev/ic/ciss.c ciss_sync(sc);
sc 466 dev/ic/ciss.c #define CISS_MAXFER (PAGE_SIZE * (sc->maxsg + 1))
sc 482 dev/ic/ciss.c struct ciss_softc *sc = ccb->ccb_sc;
sc 490 dev/ic/ciss.c printf("%s: ccb %d not ready state=%b\n", sc->sc_dev.dv_xname,
sc 498 dev/ic/ciss.c if ((error = bus_dmamap_load(sc->dmat, dmap, ccb->ccb_data,
sc 501 dev/ic/ciss.c printf("more than %d dma segs\n", sc->maxsg);
sc 526 dev/ic/ciss.c bus_dmamap_sync(sc->dmat, dmap, 0, dmap->dm_mapsize,
sc 533 dev/ic/ciss.c bus_dmamap_sync(sc->dmat, sc->cmdmap, 0, sc->cmdmap->dm_mapsize,
sc 537 dev/ic/ciss.c bus_space_write_4(sc->iot, sc->ioh, CISS_IMR,
sc 538 dev/ic/ciss.c bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) | sc->iem);
sc 540 dev/ic/ciss.c TAILQ_INSERT_TAIL(&sc->sc_ccbq, ccb, ccb_link);
sc 543 dev/ic/ciss.c bus_space_write_4(sc->iot, sc->ioh, CISS_INQ, ccb->ccb_cmdpa);
sc 575 dev/ic/ciss.c if (!(bus_space_read_4(sc->iot, sc->ioh,
sc 576 dev/ic/ciss.c CISS_ISR) & sc->iem)) {
sc 581 dev/ic/ciss.c if ((id = bus_space_read_4(sc->iot, sc->ioh,
sc 588 dev/ic/ciss.c ccb1 = sc->ccbs + (id >> 2) * sc->ccblen;
sc 608 dev/ic/ciss.c bus_space_write_4(sc->iot, sc->ioh, CISS_IMR,
sc 609 dev/ic/ciss.c bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) & ~sc->iem);
sc 617 dev/ic/ciss.c struct ciss_softc *sc = ccb->ccb_sc;
sc 626 dev/ic/ciss.c sc->sc_dev.dv_xname, ccb, ccb->ccb_state, CISS_CCB_BITS);
sc 630 dev/ic/ciss.c lock = CISS_LOCK(sc);
sc 632 dev/ic/ciss.c TAILQ_REMOVE(&sc->sc_ccbq, ccb, ccb_link);
sc 638 dev/ic/ciss.c bus_dmamap_sync(sc->dmat, ccb->ccb_dmamap, 0,
sc 641 dev/ic/ciss.c bus_dmamap_unload(sc->dmat, ccb->ccb_dmamap);
sc 654 dev/ic/ciss.c CISS_UNLOCK(sc, lock);
sc 662 dev/ic/ciss.c struct ciss_softc *sc = ccb->ccb_sc;
sc 674 dev/ic/ciss.c sc->sc_dev.dv_xname, ccb->ccb_cmd.id,
sc 709 dev/ic/ciss.c sc->sc_dev.dv_xname, rv, err->scsi_stat));
sc 724 dev/ic/ciss.c ciss_inq(struct ciss_softc *sc, struct ciss_inquiry *inq)
sc 729 dev/ic/ciss.c ccb = ciss_get_ccb(sc);
sc 748 dev/ic/ciss.c ciss_ldmap(struct ciss_softc *sc)
sc 756 dev/ic/ciss.c lock = CISS_LOCK_SCRATCH(sc);
sc 757 dev/ic/ciss.c lmap = sc->scratch;
sc 758 dev/ic/ciss.c lmap->size = htobe32(sc->maxunits * sizeof(lmap->map));
sc 759 dev/ic/ciss.c total = sizeof(*lmap) + (sc->maxunits - 1) * sizeof(lmap->map);
sc 761 dev/ic/ciss.c ccb = ciss_get_ccb(sc);
sc 776 dev/ic/ciss.c CISS_UNLOCK_SCRATCH(sc, lock);
sc 788 dev/ic/ciss.c ciss_sync(struct ciss_softc *sc)
sc 796 dev/ic/ciss.c lock = CISS_LOCK_SCRATCH(sc);
sc 797 dev/ic/ciss.c flush = sc->scratch;
sc 799 dev/ic/ciss.c flush->flush = sc->sc_flush;
sc 801 dev/ic/ciss.c ccb = ciss_get_ccb(sc);
sc 817 dev/ic/ciss.c CISS_UNLOCK_SCRATCH(sc, lock);
sc 827 dev/ic/ciss.c struct ciss_softc *sc = rsc->sc_softc;
sc 846 dev/ic/ciss.c lock = CISS_LOCK(sc);
sc 852 dev/ic/ciss.c ccb = ciss_get_ccb(sc);
sc 874 dev/ic/ciss.c CISS_UNLOCK(sc, lock);
sc 878 dev/ic/ciss.c CISS_UNLOCK(sc, lock);
sc 886 dev/ic/ciss.c struct ciss_softc *sc = link->adapter_softc;
sc 906 dev/ic/ciss.c lock = CISS_LOCK(sc);
sc 912 dev/ic/ciss.c ccb = ciss_get_ccb(sc);
sc 933 dev/ic/ciss.c CISS_UNLOCK(sc, lock);
sc 937 dev/ic/ciss.c CISS_UNLOCK(sc, lock);
sc 944 dev/ic/ciss.c struct ciss_softc *sc = v;
sc 952 dev/ic/ciss.c if (!(bus_space_read_4(sc->iot, sc->ioh, CISS_ISR) & sc->iem))
sc 955 dev/ic/ciss.c lock = CISS_LOCK(sc);
sc 956 dev/ic/ciss.c while ((id = bus_space_read_4(sc->iot, sc->ioh, CISS_OUTQ)) !=
sc 959 dev/ic/ciss.c ccb = sc->ccbs + (id >> 2) * sc->ccblen;
sc 969 dev/ic/ciss.c CISS_UNLOCK(sc, lock);
sc 978 dev/ic/ciss.c struct ciss_softc *sc = v;
sc 981 dev/ic/ciss.c hb = bus_space_read_4(sc->iot, sc->cfg_ioh,
sc 982 dev/ic/ciss.c sc->cfgoff + offsetof(struct ciss_config, heartbeat));
sc 983 dev/ic/ciss.c if (hb == sc->heartbeat)
sc 984 dev/ic/ciss.c panic("%s: dead", sc->sc_dev.dv_xname); /* XXX reset! */
sc 986 dev/ic/ciss.c sc->heartbeat = hb;
sc 988 dev/ic/ciss.c timeout_add(&sc->sc_hb, hz * 3);
sc 994 dev/ic/ciss.c struct ciss_softc *sc = v;
sc 998 dev/ic/ciss.c tsleep(sc, PRIBIO, sc->sc_dev.dv_xname, 0);
sc 1000 dev/ic/ciss.c lock = CISS_LOCK(sc);
sc 1004 dev/ic/ciss.c CISS_UNLOCK(sc, lock);
sc 1029 dev/ic/ciss.c struct ciss_softc *sc = (struct ciss_softc *)dev;
sc 1045 dev/ic/ciss.c if (!(sc->sc_flags & CISS_BIO))
sc 1048 dev/ic/ciss.c lock = CISS_LOCK(sc);
sc 1052 dev/ic/ciss.c strlcpy(bi->bi_dev, sc->sc_dev.dv_xname, sizeof(bi->bi_dev));
sc 1053 dev/ic/ciss.c bi->bi_novol = sc->maxunits;
sc 1054 dev/ic/ciss.c bi->bi_nodisk = sc->ndrives;
sc 1059 dev/ic/ciss.c if (bv->bv_volid > sc->maxunits) {
sc 1063 dev/ic/ciss.c ldp = sc->sc_lds[bv->bv_volid];
sc 1066 dev/ic/ciss.c ldid = sc->scratch;
sc 1067 dev/ic/ciss.c if ((error = ciss_ldid(sc, bv->bv_volid, ldid)))
sc 1078 dev/ic/ciss.c ldstat = sc->scratch;
sc 1080 dev/ic/ciss.c if ((error = ciss_ldstat(sc, bv->bv_volid, ldstat)))
sc 1097 dev/ic/ciss.c if (bd->bd_volid > sc->maxunits) {
sc 1101 dev/ic/ciss.c ldp = sc->sc_lds[bd->bd_volid];
sc 1106 dev/ic/ciss.c ldstat = sc->scratch;
sc 1107 dev/ic/ciss.c if ((error = ciss_ldstat(sc, bd->bd_volid, ldstat)))
sc 1117 dev/ic/ciss.c sc->ndrives;
sc 1118 dev/ic/ciss.c bd->bd_target = ldp->tgts[pd] % sc->ndrives;
sc 1124 dev/ic/ciss.c pdid = sc->scratch;
sc 1125 dev/ic/ciss.c if ((error = ciss_pdid(sc, ldp->tgts[pd], pdid,
sc 1151 dev/ic/ciss.c blink = sc->scratch;
sc 1154 dev/ic/ciss.c for (ld = 0; ld < sc->maxunits; ld++) {
sc 1155 dev/ic/ciss.c ldp = sc->sc_lds[ld];
sc 1160 dev/ic/ciss.c bb->bb_channel * sc->ndrives +
sc 1162 dev/ic/ciss.c error = ciss_blink(sc, ld, pd,
sc 1171 dev/ic/ciss.c sc->sc_dev.dv_xname));
sc 1174 dev/ic/ciss.c CISS_UNLOCK(sc, lock);
sc 1183 dev/ic/ciss.c struct ciss_softc *sc = v;
sc 1187 dev/ic/ciss.c for (i = 0; i < sc->maxunits; i++) {
sc 1188 dev/ic/ciss.c ldstat = sc->scratch;
sc 1189 dev/ic/ciss.c if ((error = ciss_ldstat(sc, i, ldstat))) {
sc 1190 dev/ic/ciss.c sc->sensors[i].value = 0;
sc 1191 dev/ic/ciss.c sc->sensors[i].status = SENSOR_S_UNKNOWN;
sc 1197 dev/ic/ciss.c sc->sensors[i].value = SENSOR_DRIVE_ONLINE;
sc 1198 dev/ic/ciss.c sc->sensors[i].status = SENSOR_S_OK;
sc 1202 dev/ic/ciss.c sc->sensors[i].value = SENSOR_DRIVE_PFAIL;
sc 1203 dev/ic/ciss.c sc->sensors[i].status = SENSOR_S_WARN;
sc 1210 dev/ic/ciss.c sc->sensors[i].value = SENSOR_DRIVE_REBUILD;
sc 1211 dev/ic/ciss.c sc->sensors[i].status = SENSOR_S_WARN;
sc 1219 dev/ic/ciss.c sc->sensors[i].value = SENSOR_DRIVE_FAIL;
sc 1220 dev/ic/ciss.c sc->sensors[i].status = SENSOR_S_CRIT;
sc 1224 dev/ic/ciss.c sc->sensors[i].value = 0;
sc 1225 dev/ic/ciss.c sc->sensors[i].status = SENSOR_S_UNKNOWN;
sc 1232 dev/ic/ciss.c ciss_ldid(struct ciss_softc *sc, int target, struct ciss_ldid *id)
sc 1237 dev/ic/ciss.c ccb = ciss_get_ccb(sc);
sc 1260 dev/ic/ciss.c ciss_ldstat(struct ciss_softc *sc, int target, struct ciss_ldstat *stat)
sc 1265 dev/ic/ciss.c ccb = ciss_get_ccb(sc);
sc 1288 dev/ic/ciss.c ciss_pdid(struct ciss_softc *sc, u_int8_t drv, struct ciss_pdid *id, int wait)
sc 1293 dev/ic/ciss.c ccb = ciss_get_ccb(sc);
sc 1317 dev/ic/ciss.c ciss_pdscan(struct ciss_softc *sc, int ld)
sc 1324 dev/ic/ciss.c pdid = sc->scratch;
sc 1325 dev/ic/ciss.c for (i = 0; i < sc->nbus; i++)
sc 1326 dev/ic/ciss.c for (j = 0; j < sc->ndrives; j++) {
sc 1327 dev/ic/ciss.c drv = CISS_BIGBIT + i * sc->ndrives + j;
sc 1328 dev/ic/ciss.c if (!ciss_pdid(sc, drv, pdid, SCSI_NOSLEEP|SCSI_POLL))
sc 1346 dev/ic/ciss.c ciss_blink(struct ciss_softc *sc, int ld, int pd, int stat,
sc 1353 dev/ic/ciss.c if (ld > sc->maxunits)
sc 1356 dev/ic/ciss.c ldp = sc->sc_lds[ld];
sc 1364 dev/ic/ciss.c ccb = ciss_get_ccb(sc);
sc 68 dev/ic/cissvar.h #define CISS_LOCK(sc) splbio()
sc 69 dev/ic/cissvar.h #define CISS_UNLOCK(sc, lock) splx(lock)
sc 70 dev/ic/cissvar.h #define CISS_LOCK_SCRATCH(sc) splbio()
sc 71 dev/ic/cissvar.h #define CISS_UNLOCK_SCRATCH(sc, lock) splx(lock)
sc 74 dev/ic/cissvar.h int ciss_attach(struct ciss_softc *sc);
sc 201 dev/ic/com.c struct com_softc *sc = (struct com_softc *)self;
sc 204 dev/ic/com.c sc->sc_swflags |= COM_SW_DEAD;
sc 220 dev/ic/com.c if (sc->sc_tty) {
sc 221 dev/ic/com.c ttyfree(sc->sc_tty);
sc 224 dev/ic/com.c timeout_del(&sc->sc_dtr_tmo);
sc 225 dev/ic/com.c timeout_del(&sc->sc_diag_tmo);
sc 227 dev/ic/com.c softintr_disestablish(sc->sc_si);
sc 229 dev/ic/com.c timeout_del(&sc->sc_comsoft_tmo);
sc 238 dev/ic/com.c struct com_softc *sc = (struct com_softc *)self;
sc 248 dev/ic/com.c if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) {
sc 250 dev/ic/com.c if (sc->sc_hwflags & COM_HW_CONSOLE) {
sc 256 dev/ic/com.c if (sc->disable != NULL && sc->enabled != 0) {
sc 257 dev/ic/com.c (*sc->disable)(sc);
sc 258 dev/ic/com.c sc->enabled = 0;
sc 270 dev/ic/com.c struct com_softc *sc;
sc 279 dev/ic/com.c sc = com_cd.cd_devs[unit];
sc 280 dev/ic/com.c if (!sc)
sc 287 dev/ic/com.c if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
sc 292 dev/ic/com.c if (!sc->sc_tty) {
sc 293 dev/ic/com.c tp = sc->sc_tty = ttymalloc();
sc 295 dev/ic/com.c tp = sc->sc_tty;
sc 307 dev/ic/com.c if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
sc 312 dev/ic/com.c if (ISSET(sc->sc_swflags, COM_SW_CLOCAL))
sc 314 dev/ic/com.c if (ISSET(sc->sc_swflags, COM_SW_CRTSCTS))
sc 316 dev/ic/com.c if (ISSET(sc->sc_swflags, COM_SW_MDMBUF))
sc 323 dev/ic/com.c sc->sc_initialize = 1;
sc 328 dev/ic/com.c timeout_add(&sc->sc_comsoft_tmo, 1);
sc 331 dev/ic/com.c sc->sc_ibufp = sc->sc_ibuf = sc->sc_ibufs[0];
sc 332 dev/ic/com.c sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER;
sc 333 dev/ic/com.c sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
sc 335 dev/ic/com.c iot = sc->sc_iot;
sc 336 dev/ic/com.c ioh = sc->sc_ioh;
sc 341 dev/ic/com.c switch (sc->sc_uarttype) {
sc 358 dev/ic/com.c if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
sc 366 dev/ic/com.c if (sc->sc_uarttype == COM_UART_TI16750) {
sc 395 dev/ic/com.c if (sc->sc_uarttype == COM_UART_TI16750)
sc 403 dev/ic/com.c sc->sc_mcr = MCR_DTR | MCR_RTS;
sc 404 dev/ic/com.c if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
sc 405 dev/ic/com.c SET(sc->sc_mcr, MCR_IENABLE);
sc 406 dev/ic/com.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 407 dev/ic/com.c sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC;
sc 409 dev/ic/com.c if (sc->sc_uarttype == COM_UART_PXA2X0)
sc 410 dev/ic/com.c sc->sc_ier |= IER_EUART | IER_ERXTOUT;
sc 412 dev/ic/com.c bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
sc 414 dev/ic/com.c sc->sc_msr = bus_space_read_1(iot, ioh, com_msr);
sc 415 dev/ic/com.c if (ISSET(sc->sc_swflags, COM_SW_SOFTCAR) || DEVCUA(dev) ||
sc 416 dev/ic/com.c ISSET(sc->sc_msr, MSR_DCD) || ISSET(tp->t_cflag, MDMBUF))
sc 421 dev/ic/com.c if (sc->sc_uarttype == COM_UART_PXA2X0 &&
sc 422 dev/ic/com.c ISSET(sc->sc_hwflags, COM_HW_SIR)) {
sc 440 dev/ic/com.c sc->sc_cua = 1; /* We go into CUA mode */
sc 444 dev/ic/com.c if (sc->sc_cua) {
sc 450 dev/ic/com.c while (sc->sc_cua ||
sc 462 dev/ic/com.c if (!sc->sc_cua && !ISSET(tp->t_state, TS_ISOPEN))
sc 463 dev/ic/com.c compwroff(sc);
sc 479 dev/ic/com.c struct com_softc *sc = com_cd.cd_devs[unit];
sc 480 dev/ic/com.c bus_space_tag_t iot = sc->sc_iot;
sc 481 dev/ic/com.c bus_space_handle_t ioh = sc->sc_ioh;
sc 482 dev/ic/com.c struct tty *tp = sc->sc_tty;
sc 491 dev/ic/com.c if(sc->sc_swflags & COM_SW_DEAD)
sc 498 dev/ic/com.c CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
sc 499 dev/ic/com.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 500 dev/ic/com.c timeout_add(&sc->sc_dtr_tmo, hz * 2);
sc 503 dev/ic/com.c compwroff(sc);
sc 507 dev/ic/com.c timeout_del(&sc->sc_comsoft_tmo);
sc 509 dev/ic/com.c sc->sc_cua = 0;
sc 515 dev/ic/com.c if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
sc 517 dev/ic/com.c sc->sc_tty = 0;
sc 525 dev/ic/com.c compwroff(struct com_softc *sc)
sc 527 dev/ic/com.c bus_space_tag_t iot = sc->sc_iot;
sc 528 dev/ic/com.c bus_space_handle_t ioh = sc->sc_ioh;
sc 529 dev/ic/com.c struct tty *tp = sc->sc_tty;
sc 531 dev/ic/com.c CLR(sc->sc_lcr, LCR_SBREAK);
sc 532 dev/ic/com.c bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
sc 535 dev/ic/com.c !ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) {
sc 537 dev/ic/com.c sc->sc_mcr = 0;
sc 538 dev/ic/com.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 551 dev/ic/com.c switch (sc->sc_uarttype) {
sc 566 dev/ic/com.c if (ISSET(sc->sc_hwflags, COM_HW_SIR))
sc 577 dev/ic/com.c struct com_softc *sc = arg;
sc 579 dev/ic/com.c SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
sc 580 dev/ic/com.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr);
sc 586 dev/ic/com.c struct com_softc *sc = com_cd.cd_devs[DEVUNIT(dev)];
sc 587 dev/ic/com.c struct tty *tp = sc->sc_tty;
sc 595 dev/ic/com.c struct com_softc *sc = com_cd.cd_devs[DEVUNIT(dev)];
sc 596 dev/ic/com.c struct tty *tp = sc->sc_tty;
sc 604 dev/ic/com.c struct com_softc *sc = com_cd.cd_devs[DEVUNIT(dev)];
sc 605 dev/ic/com.c struct tty *tp = sc->sc_tty;
sc 626 dev/ic/com.c struct com_softc *sc = com_cd.cd_devs[unit];
sc 627 dev/ic/com.c struct tty *tp = sc->sc_tty;
sc 628 dev/ic/com.c bus_space_tag_t iot = sc->sc_iot;
sc 629 dev/ic/com.c bus_space_handle_t ioh = sc->sc_ioh;
sc 641 dev/ic/com.c SET(sc->sc_lcr, LCR_SBREAK);
sc 642 dev/ic/com.c bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
sc 645 dev/ic/com.c CLR(sc->sc_lcr, LCR_SBREAK);
sc 646 dev/ic/com.c bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
sc 649 dev/ic/com.c SET(sc->sc_mcr, sc->sc_dtr);
sc 650 dev/ic/com.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 653 dev/ic/com.c CLR(sc->sc_mcr, sc->sc_dtr);
sc 654 dev/ic/com.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 657 dev/ic/com.c CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
sc 659 dev/ic/com.c SET(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
sc 660 dev/ic/com.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 663 dev/ic/com.c CLR(sc->sc_mcr, tiocm_xxx2mcr(*(int *)data));
sc 664 dev/ic/com.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 670 dev/ic/com.c m = sc->sc_mcr;
sc 675 dev/ic/com.c m = sc->sc_msr;
sc 692 dev/ic/com.c driverbits = sc->sc_swflags;
sc 716 dev/ic/com.c ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
sc 727 dev/ic/com.c sc->sc_swflags = driverbits;
sc 741 dev/ic/com.c struct com_softc *sc = com_cd.cd_devs[DEVUNIT(tp->t_dev)];
sc 742 dev/ic/com.c bus_space_tag_t iot = sc->sc_iot;
sc 743 dev/ic/com.c bus_space_handle_t ioh = sc->sc_ioh;
sc 744 dev/ic/com.c int ospeed = comspeed(sc->sc_frequency, t->c_ospeed);
sc 752 dev/ic/com.c lcr = ISSET(sc->sc_lcr, LCR_SBREAK);
sc 776 dev/ic/com.c sc->sc_lcr = lcr;
sc 779 dev/ic/com.c CLR(sc->sc_mcr, MCR_DTR);
sc 780 dev/ic/com.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 787 dev/ic/com.c if (sc->sc_initialize || (tp->t_ispeed != t->c_ispeed)) {
sc 788 dev/ic/com.c sc->sc_initialize = 0;
sc 802 dev/ic/com.c ++sc->sc_halt;
sc 805 dev/ic/com.c --sc->sc_halt;
sc 816 dev/ic/com.c SET(sc->sc_mcr, MCR_DTR);
sc 817 dev/ic/com.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 821 dev/ic/com.c if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
sc 822 dev/ic/com.c if (sc->sc_uarttype == COM_UART_TI16750) {
sc 839 dev/ic/com.c if (ISSET(sc->sc_mcr, MCR_DTR)) {
sc 840 dev/ic/com.c if (!ISSET(sc->sc_mcr, MCR_RTS)) {
sc 841 dev/ic/com.c SET(sc->sc_mcr, MCR_RTS);
sc 842 dev/ic/com.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 845 dev/ic/com.c if (ISSET(sc->sc_mcr, MCR_RTS)) {
sc 846 dev/ic/com.c CLR(sc->sc_mcr, MCR_RTS);
sc 847 dev/ic/com.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 850 dev/ic/com.c sc->sc_dtr = MCR_DTR | MCR_RTS;
sc 852 dev/ic/com.c sc->sc_dtr = MCR_DTR;
sc 864 dev/ic/com.c if (!ISSET(sc->sc_msr, MSR_DCD) &&
sc 865 dev/ic/com.c !ISSET(sc->sc_swflags, COM_SW_SOFTCAR) &&
sc 868 dev/ic/com.c CLR(sc->sc_mcr, sc->sc_dtr);
sc 869 dev/ic/com.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 880 dev/ic/com.c struct com_softc *sc = com_cd.cd_devs[DEVUNIT(tp->t_dev)];
sc 881 dev/ic/com.c bus_space_tag_t iot = sc->sc_iot;
sc 882 dev/ic/com.c bus_space_handle_t ioh = sc->sc_ioh;
sc 888 dev/ic/com.c if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP) || sc->sc_halt > 0)
sc 890 dev/ic/com.c if (ISSET(tp->t_cflag, CRTSCTS) && !ISSET(sc->sc_msr, MSR_CTS))
sc 905 dev/ic/com.c if (sc->sc_uarttype == COM_UART_PXA2X0 &&
sc 906 dev/ic/com.c ISSET(sc->sc_hwflags, COM_HW_SIR))
sc 911 dev/ic/com.c if (!ISSET(sc->sc_ier, IER_ETXRDY)) {
sc 912 dev/ic/com.c SET(sc->sc_ier, IER_ETXRDY);
sc 913 dev/ic/com.c bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
sc 916 dev/ic/com.c if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
sc 919 dev/ic/com.c int n = q_to_b(&tp->t_outq, buffer, sc->sc_fifolen);
sc 931 dev/ic/com.c if (ISSET(sc->sc_ier, IER_ETXRDY)) {
sc 932 dev/ic/com.c CLR(sc->sc_ier, IER_ETXRDY);
sc 933 dev/ic/com.c bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
sc 935 dev/ic/com.c if (sc->sc_uarttype == COM_UART_PXA2X0 &&
sc 936 dev/ic/com.c ISSET(sc->sc_hwflags, COM_HW_SIR)) {
sc 972 dev/ic/com.c struct com_softc *sc = arg;
sc 977 dev/ic/com.c sc->sc_errors = 0;
sc 978 dev/ic/com.c overflows = sc->sc_overflows;
sc 979 dev/ic/com.c sc->sc_overflows = 0;
sc 980 dev/ic/com.c floods = sc->sc_floods;
sc 981 dev/ic/com.c sc->sc_floods = 0;
sc 984 dev/ic/com.c sc->sc_dev.dv_xname,
sc 992 dev/ic/com.c struct com_softc *sc = (struct com_softc *)arg;
sc 1005 dev/ic/com.c if (sc == NULL || sc->sc_ibufp == sc->sc_ibuf)
sc 1008 dev/ic/com.c tp = sc->sc_tty;
sc 1012 dev/ic/com.c ibufp = sc->sc_ibuf;
sc 1013 dev/ic/com.c ibufend = sc->sc_ibufp;
sc 1020 dev/ic/com.c sc->sc_ibufp = sc->sc_ibuf = (ibufp == sc->sc_ibufs[0]) ?
sc 1021 dev/ic/com.c sc->sc_ibufs[1] : sc->sc_ibufs[0];
sc 1022 dev/ic/com.c sc->sc_ibufhigh = sc->sc_ibuf + COM_IHIGHWATER;
sc 1023 dev/ic/com.c sc->sc_ibufend = sc->sc_ibuf + COM_IBUFSIZE;
sc 1031 dev/ic/com.c !ISSET(sc->sc_mcr, MCR_RTS)) {
sc 1033 dev/ic/com.c SET(sc->sc_mcr, MCR_RTS);
sc 1034 dev/ic/com.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr,
sc 1035 dev/ic/com.c sc->sc_mcr);
sc 1043 dev/ic/com.c sc->sc_overflows++;
sc 1044 dev/ic/com.c if (sc->sc_errors++ == 0)
sc 1045 dev/ic/com.c timeout_add(&sc->sc_diag_tmo, 60 * hz);
sc 1054 dev/ic/com.c timeout_add(&sc->sc_comsoft_tmo, 1);
sc 1072 dev/ic/com.c struct com_softc *sc = arg;
sc 1073 dev/ic/com.c bus_space_tag_t iot = sc->sc_iot;
sc 1074 dev/ic/com.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1077 dev/ic/com.c if (!ISSET(sc->sc_hwflags, COM_HW_KGDB))
sc 1099 dev/ic/com.c if (msr != sc->sc_msr) {
sc 1100 dev/ic/com.c delta = msr ^ sc->sc_msr;
sc 1101 dev/ic/com.c sc->sc_msr = msr;
sc 1103 dev/ic/com.c if (!ISSET(sc->sc_swflags, COM_SW_SOFTCAR)) {
sc 1104 dev/ic/com.c CLR(sc->sc_mcr, sc->sc_dtr);
sc 1105 dev/ic/com.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 1118 dev/ic/com.c struct com_softc *sc = arg;
sc 1119 dev/ic/com.c bus_space_tag_t iot = sc->sc_iot;
sc 1120 dev/ic/com.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1124 dev/ic/com.c if (!sc->sc_tty)
sc 1130 dev/ic/com.c tp = sc->sc_tty;
sc 1136 dev/ic/com.c u_char *p = sc->sc_ibufp;
sc 1139 dev/ic/com.c softintr_schedule(sc->sc_si);
sc 1145 dev/ic/com.c if (ISSET(sc->sc_hwflags,
sc 1154 dev/ic/com.c if (p >= sc->sc_ibufend) {
sc 1155 dev/ic/com.c sc->sc_floods++;
sc 1156 dev/ic/com.c if (sc->sc_errors++ == 0)
sc 1157 dev/ic/com.c timeout_add(&sc->sc_diag_tmo, 60 * hz);
sc 1161 dev/ic/com.c if (p == sc->sc_ibufhigh &&
sc 1164 dev/ic/com.c CLR(sc->sc_mcr, MCR_RTS);
sc 1166 dev/ic/com.c sc->sc_mcr);
sc 1175 dev/ic/com.c sc->sc_ibufp = p;
sc 1179 dev/ic/com.c if (msr != sc->sc_msr) {
sc 1180 dev/ic/com.c delta = msr ^ sc->sc_msr;
sc 1182 dev/ic/com.c ttytstamp(tp, sc->sc_msr & MSR_CTS, msr & MSR_CTS,
sc 1183 dev/ic/com.c sc->sc_msr & MSR_DCD, msr & MSR_DCD);
sc 1185 dev/ic/com.c sc->sc_msr = msr;
sc 1187 dev/ic/com.c if (!ISSET(sc->sc_swflags, COM_SW_SOFTCAR) &&
sc 1189 dev/ic/com.c CLR(sc->sc_mcr, sc->sc_dtr);
sc 1190 dev/ic/com.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 1202 dev/ic/com.c if (sc->sc_halt > 0)
sc 1208 dev/ic/com.c if (sc->sc_uarttype == COM_UART_PXA2X0 &&
sc 1209 dev/ic/com.c ISSET(sc->sc_hwflags, COM_HW_SIR) &&
sc 114 dev/ic/com_subr.c com_enable_debugport(sc)
sc 115 dev/ic/com_subr.c struct com_softc *sc;
sc 122 dev/ic/com_subr.c SET(sc->sc_ier, IER_ERXRDY);
sc 124 dev/ic/com_subr.c if (sc->sc_uarttype == COM_UART_PXA2X0)
sc 125 dev/ic/com_subr.c sc->sc_ier |= IER_EUART | IER_ERXTOUT;
sc 127 dev/ic/com_subr.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier);
sc 129 dev/ic/com_subr.c SET(sc->sc_mcr, MCR_DTR | MCR_RTS | MCR_IENABLE);
sc 130 dev/ic/com_subr.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr);
sc 137 dev/ic/com_subr.c com_attach_subr(sc)
sc 138 dev/ic/com_subr.c struct com_softc *sc;
sc 140 dev/ic/com_subr.c bus_space_tag_t iot = sc->sc_iot;
sc 141 dev/ic/com_subr.c bus_space_handle_t ioh = sc->sc_ioh;
sc 144 dev/ic/com_subr.c sc->sc_ier = 0;
sc 146 dev/ic/com_subr.c if (sc->sc_uarttype == COM_UART_PXA2X0)
sc 147 dev/ic/com_subr.c sc->sc_ier |= IER_EUART;
sc 150 dev/ic/com_subr.c bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
sc 153 dev/ic/com_subr.c if (sc->sc_iobase == comconsaddr) {
sc 156 dev/ic/com_subr.c SET(sc->sc_hwflags, COM_HW_CONSOLE);
sc 157 dev/ic/com_subr.c SET(sc->sc_swflags, COM_SW_SOFTCAR);
sc 175 dev/ic/com_subr.c if (sc->sc_uarttype == COM_UART_UNKNOWN)
sc 178 dev/ic/com_subr.c sc->sc_uarttype = COM_UART_16450;
sc 181 dev/ic/com_subr.c sc->sc_uarttype = COM_UART_16550;
sc 184 dev/ic/com_subr.c sc->sc_uarttype = COM_UART_16550A;
sc 187 dev/ic/com_subr.c sc->sc_uarttype = COM_UART_UNKNOWN;
sc 191 dev/ic/com_subr.c if (sc->sc_uarttype == COM_UART_16550A) { /* Probe for ST16650s */
sc 194 dev/ic/com_subr.c sc->sc_uarttype = COM_UART_ST16650;
sc 198 dev/ic/com_subr.c sc->sc_uarttype = COM_UART_ST16650V2;
sc 203 dev/ic/com_subr.c if (sc->sc_uarttype == COM_UART_ST16650V2) { /* Probe for XR16850s */
sc 216 dev/ic/com_subr.c sc->sc_uarttype = COM_UART_XR16850;
sc 217 dev/ic/com_subr.c sc->sc_uartrev = bus_space_read_1(iot, ioh, com_dlbl);
sc 226 dev/ic/com_subr.c if (sc->sc_uarttype == COM_UART_16550A) { /* Probe for TI16750s */
sc 235 dev/ic/com_subr.c sc->sc_uarttype = COM_UART_TI16750;
sc 242 dev/ic/com_subr.c if (sc->sc_uarttype == COM_UART_16450) { /* Probe for 8250 */
sc 253 dev/ic/com_subr.c sc->sc_uarttype = COM_UART_8250;
sc 259 dev/ic/com_subr.c switch (sc->sc_uarttype) {
sc 273 dev/ic/com_subr.c if (sc->sc_fifolen == 0)
sc 274 dev/ic/com_subr.c sc->sc_fifolen = 16;
sc 275 dev/ic/com_subr.c printf(": ns16550a, %d byte fifo\n", sc->sc_fifolen);
sc 276 dev/ic/com_subr.c SET(sc->sc_hwflags, COM_HW_FIFO);
sc 281 dev/ic/com_subr.c SET(sc->sc_hwflags, COM_HW_FIFO);
sc 282 dev/ic/com_subr.c sc->sc_fifolen = 32;
sc 283 dev/ic/com_subr.c if (sc->sc_iobase == comsiraddr) {
sc 284 dev/ic/com_subr.c SET(sc->sc_hwflags, COM_HW_SIR);
sc 294 dev/ic/com_subr.c if (sc->sc_fifolen == 0)
sc 295 dev/ic/com_subr.c sc->sc_fifolen = 32;
sc 296 dev/ic/com_subr.c printf(": st16650, %d byte fifo\n", sc->sc_fifolen);
sc 297 dev/ic/com_subr.c SET(sc->sc_hwflags, COM_HW_FIFO);
sc 301 dev/ic/com_subr.c SET(sc->sc_hwflags, COM_HW_FIFO);
sc 302 dev/ic/com_subr.c sc->sc_fifolen = 64;
sc 306 dev/ic/com_subr.c SET(sc->sc_hwflags, COM_HW_FIFO);
sc 307 dev/ic/com_subr.c sc->sc_fifolen = 64;
sc 311 dev/ic/com_subr.c printf(": xr16850 (rev %d), 128 byte fifo\n", sc->sc_uartrev);
sc 312 dev/ic/com_subr.c SET(sc->sc_hwflags, COM_HW_FIFO);
sc 313 dev/ic/com_subr.c sc->sc_fifolen = 128;
sc 317 dev/ic/com_subr.c printf(": ox16c950 (rev %d), 128 byte fifo\n", sc->sc_uartrev);
sc 318 dev/ic/com_subr.c SET(sc->sc_hwflags, COM_HW_FIFO);
sc 319 dev/ic/com_subr.c sc->sc_fifolen = 128;
sc 328 dev/ic/com_subr.c com_fifo_probe(sc);
sc 331 dev/ic/com_subr.c if (sc->sc_fifolen == 0) {
sc 332 dev/ic/com_subr.c CLR(sc->sc_hwflags, COM_HW_FIFO);
sc 333 dev/ic/com_subr.c sc->sc_fifolen = 1;
sc 341 dev/ic/com_subr.c sc->sc_mcr = 0;
sc 342 dev/ic/com_subr.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr);
sc 350 dev/ic/com_subr.c if (iot == com_kgdb_iot && sc->sc_iobase == com_kgdb_addr &&
sc 351 dev/ic/com_subr.c !ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
sc 352 dev/ic/com_subr.c printf("%s: kgdb\n", sc->sc_dev.dv_xname);
sc 353 dev/ic/com_subr.c SET(sc->sc_hwflags, COM_HW_KGDB);
sc 358 dev/ic/com_subr.c if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
sc 367 dev/ic/com_subr.c cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
sc 369 dev/ic/com_subr.c printf("%s: console\n", sc->sc_dev.dv_xname);
sc 373 dev/ic/com_subr.c timeout_set(&sc->sc_diag_tmo, comdiag, sc);
sc 374 dev/ic/com_subr.c timeout_set(&sc->sc_dtr_tmo, com_raisedtr, sc);
sc 377 dev/ic/com_subr.c sc->sc_si = softintr_establish(IPL_TTY, comsoft, sc);
sc 378 dev/ic/com_subr.c if (sc->sc_si == NULL)
sc 380 dev/ic/com_subr.c sc->sc_dev.dv_xname);
sc 382 dev/ic/com_subr.c timeout_set(&sc->sc_comsoft_tmo, comsoft, sc);
sc 390 dev/ic/com_subr.c if (!sc->enable)
sc 391 dev/ic/com_subr.c sc->enabled = 1;
sc 394 dev/ic/com_subr.c if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB))
sc 395 dev/ic/com_subr.c com_enable_debugport(sc);
sc 400 dev/ic/com_subr.c com_fifo_probe(struct com_softc *sc)
sc 402 dev/ic/com_subr.c bus_space_handle_t ioh = sc->sc_ioh;
sc 403 dev/ic/com_subr.c bus_space_tag_t iot = sc->sc_iot;
sc 407 dev/ic/com_subr.c if (!ISSET(sc->sc_hwflags, COM_HW_FIFO))
sc 412 dev/ic/com_subr.c if (sc->sc_uarttype == COM_UART_PXA2X0)
sc 423 dev/ic/com_subr.c if (sc->sc_uarttype == COM_UART_TI16750)
sc 450 dev/ic/com_subr.c if (sc->sc_fifolen > len) {
sc 452 dev/ic/com_subr.c sc->sc_dev.dv_xname, len);
sc 453 dev/ic/com_subr.c sc->sc_fifolen = len;
sc 207 dev/ic/cy.c struct cy_softc *sc = (void *)self;
sc 209 dev/ic/cy.c card = sc->sc_dev.dv_unit;
sc 210 dev/ic/cy.c num_chips = sc->sc_nr_cd1400s;
sc 214 dev/ic/cy.c timeout_set(&sc->sc_poll_to, cy_poll, sc);
sc 215 dev/ic/cy.c bzero(sc->sc_ports, sizeof(sc->sc_ports));
sc 216 dev/ic/cy.c sc->sc_nports = num_chips * CD1400_NO_OF_CHANNELS;
sc 221 dev/ic/cy.c cy_chip++, chip_offs += (CY_CD1400_MEMSPACING<<sc->sc_bustype)) {
sc 223 dev/ic/cy.c chip_offs -= (CY32_ADDR_FIX<<sc->sc_bustype);
sc 228 dev/ic/cy.c sc->sc_cd1400_offs[cy_chip] = chip_offs;
sc 232 dev/ic/cy.c cd_write_reg_sc(sc, cy_chip, CD1400_GCR, 0);
sc 235 dev/ic/cy.c if (cd_read_reg_sc(sc, cy_chip, CD1400_GFRCR) <= 0x46)
sc 241 dev/ic/cy.c cd_write_reg_sc(sc, cy_chip, CD1400_PPR,
sc 245 dev/ic/cy.c sc->sc_ports[port].cy_port_num = port;
sc 246 dev/ic/cy.c sc->sc_ports[port].cy_memt = sc->sc_memt;
sc 247 dev/ic/cy.c sc->sc_ports[port].cy_memh = sc->sc_memh;
sc 248 dev/ic/cy.c sc->sc_ports[port].cy_chip_offs = chip_offs;
sc 249 dev/ic/cy.c sc->sc_ports[port].cy_bustype = sc->sc_bustype;
sc 250 dev/ic/cy.c sc->sc_ports[port].cy_clock = cy_clock;
sc 261 dev/ic/cy.c bus_space_write_1(sc->sc_memt, sc->sc_memh,
sc 262 dev/ic/cy.c CY_CLEAR_INTR<<sc->sc_bustype, 0);
sc 284 dev/ic/cy.c struct cy_softc *sc;
sc 290 dev/ic/cy.c (sc = cy_cd.cd_devs[card]) == NULL) {
sc 295 dev/ic/cy.c printf("%s open port %d flag 0x%x mode 0x%x\n", sc->sc_dev.dv_xname,
sc 299 dev/ic/cy.c cy = &sc->sc_ports[port];
sc 336 dev/ic/cy.c sc->sc_dev.dv_xname, port);
sc 356 dev/ic/cy.c if (!timeout_pending(&sc->sc_poll_to))
sc 357 dev/ic/cy.c timeout_add(&sc->sc_poll_to, 1);
sc 417 dev/ic/cy.c struct cy_softc *sc = cy_cd.cd_devs[card];
sc 418 dev/ic/cy.c struct cy_port *cy = &sc->sc_ports[port];
sc 423 dev/ic/cy.c printf("%s close port %d, flag 0x%x, mode 0x%x\n", sc->sc_dev.dv_xname,
sc 460 dev/ic/cy.c struct cy_softc *sc = cy_cd.cd_devs[card];
sc 461 dev/ic/cy.c struct cy_port *cy = &sc->sc_ports[port];
sc 465 dev/ic/cy.c printf("%s read port %d uio 0x%x flag 0x%x\n", sc->sc_dev.dv_xname,
sc 483 dev/ic/cy.c struct cy_softc *sc = cy_cd.cd_devs[card];
sc 484 dev/ic/cy.c struct cy_port *cy = &sc->sc_ports[port];
sc 488 dev/ic/cy.c printf("%s write port %d uio 0x%x flag 0x%x\n", sc->sc_dev.dv_xname,
sc 504 dev/ic/cy.c struct cy_softc *sc = cy_cd.cd_devs[card];
sc 505 dev/ic/cy.c struct cy_port *cy = &sc->sc_ports[port];
sc 524 dev/ic/cy.c struct cy_softc *sc = cy_cd.cd_devs[card];
sc 525 dev/ic/cy.c struct cy_port *cy = &sc->sc_ports[port];
sc 531 dev/ic/cy.c sc->sc_dev.dv_xname, port, cmd, data, flag);
sc 610 dev/ic/cy.c struct cy_softc *sc = cy_cd.cd_devs[card];
sc 611 dev/ic/cy.c struct cy_port *cy = &sc->sc_ports[port];
sc 615 dev/ic/cy.c printf("%s port %d start, tty 0x%x\n", sc->sc_dev.dv_xname, port, tp);
sc 655 dev/ic/cy.c struct cy_softc *sc = cy_cd.cd_devs[card];
sc 656 dev/ic/cy.c struct cy_port *cy = &sc->sc_ports[port];
sc 660 dev/ic/cy.c printf("%s port %d stop tty 0x%x flag 0x%x\n", sc->sc_dev.dv_xname,
sc 691 dev/ic/cy.c struct cy_softc *sc = cy_cd.cd_devs[card];
sc 692 dev/ic/cy.c struct cy_port *cy = &sc->sc_ports[port];
sc 697 dev/ic/cy.c printf("%s port %d param tty 0x%x termios 0x%x\n", sc->sc_dev.dv_xname,
sc 938 dev/ic/cy.c struct cy_softc *sc = arg;
sc 950 dev/ic/cy.c if (sc->sc_events == 0 && ++counter < 200) {
sc 955 dev/ic/cy.c sc->sc_events = 0;
sc 959 dev/ic/cy.c sc->sc_poll_count1++;
sc 963 dev/ic/cy.c for (port = 0; port < sc->sc_nports; port++) {
sc 964 dev/ic/cy.c cy = &sc->sc_ports[port];
sc 992 dev/ic/cy.c sc->sc_dev.dv_xname, port, chr);
sc 1047 dev/ic/cy.c sc->sc_dev.dv_xname, port, carrier);
sc 1080 dev/ic/cy.c sc->sc_dev.dv_xname, port);
sc 1085 dev/ic/cy.c sc->sc_dev.dv_xname, port);
sc 1090 dev/ic/cy.c sc->sc_poll_count2++;
sc 1096 dev/ic/cy.c timeout_add(&sc->sc_poll_to, 1);
sc 1106 dev/ic/cy.c struct cy_softc *sc = arg;
sc 1115 dev/ic/cy.c for (cy_chip = 0; cy_chip < sc->sc_nr_cd1400s; cy_chip++) {
sc 1117 dev/ic/cy.c stat = cd_read_reg_sc(sc, cy_chip, CD1400_SVRR);
sc 1126 dev/ic/cy.c save_rir = cd_read_reg_sc(sc, cy_chip, CD1400_RIR);
sc 1127 dev/ic/cy.c save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR);
sc 1129 dev/ic/cy.c cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_rir);
sc 1131 dev/ic/cy.c serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_RIVR);
sc 1132 dev/ic/cy.c cy = &sc->sc_ports[serv_type >> 3];
sc 1151 dev/ic/cy.c sc->sc_dev.dv_xname, cy->cy_port_num,
sc 1168 dev/ic/cy.c sc->sc_events = 1;
sc 1182 dev/ic/cy.c sc->sc_dev.dv_xname, cy->cy_port_num,
sc 1199 dev/ic/cy.c sc->sc_events = 1;
sc 1228 dev/ic/cy.c save_mir = cd_read_reg_sc(sc, cy_chip, CD1400_MIR);
sc 1229 dev/ic/cy.c save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR);
sc 1231 dev/ic/cy.c cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_mir);
sc 1233 dev/ic/cy.c serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_MIVR);
sc 1234 dev/ic/cy.c cy = &sc->sc_ports[serv_type >> 3];
sc 1244 dev/ic/cy.c sc->sc_dev.dv_xname, cy->cy_port_num, modem_stat);
sc 1249 dev/ic/cy.c sc->sc_events = 1;
sc 1264 dev/ic/cy.c save_tir = cd_read_reg_sc(sc, cy_chip, CD1400_TIR);
sc 1265 dev/ic/cy.c save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR);
sc 1267 dev/ic/cy.c cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_tir);
sc 1269 dev/ic/cy.c serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_TIVR);
sc 1270 dev/ic/cy.c cy = &sc->sc_ports[serv_type >> 3];
sc 1276 dev/ic/cy.c printf("%s port %d tx service\n", sc->sc_dev.dv_xname,
sc 1348 dev/ic/cy.c sc->sc_events = 1;
sc 1359 dev/ic/cy.c bus_space_write_1(sc->sc_memt, sc->sc_memh,
sc 1360 dev/ic/cy.c CY_CLEAR_INTR<<sc->sc_bustype, 0);
sc 115 dev/ic/cyreg.h #define cd_read_reg_sc(sc,chip,reg) bus_space_read_1(sc->sc_memt, \
sc 116 dev/ic/cyreg.h sc->sc_memh, \
sc 117 dev/ic/cyreg.h sc->sc_cd1400_offs[chip]+\
sc 118 dev/ic/cyreg.h (((reg<<1))<<sc->sc_bustype))
sc 120 dev/ic/cyreg.h #define cd_write_reg_sc(sc,chip,reg,val) bus_space_write_1(sc->sc_memt, \
sc 121 dev/ic/cyreg.h sc->sc_memh, \
sc 122 dev/ic/cyreg.h sc->sc_cd1400_offs[chip]+\
sc 123 dev/ic/cyreg.h (((reg<<1))<<sc->sc_bustype), \
sc 197 dev/ic/dc.c #define DC_SETBIT(sc, reg, x) \
sc 198 dev/ic/dc.c CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (x))
sc 200 dev/ic/dc.c #define DC_CLRBIT(sc, reg, x) \
sc 201 dev/ic/dc.c CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~(x))
sc 203 dev/ic/dc.c #define SIO_SET(x) DC_SETBIT(sc, DC_SIO, (x))
sc 204 dev/ic/dc.c #define SIO_CLR(x) DC_CLRBIT(sc, DC_SIO, (x))
sc 207 dev/ic/dc.c dc_delay(sc)
sc 208 dev/ic/dc.c struct dc_softc *sc;
sc 213 dev/ic/dc.c CSR_READ_4(sc, DC_BUSCTL);
sc 217 dev/ic/dc.c dc_eeprom_width(sc)
sc 218 dev/ic/dc.c struct dc_softc *sc;
sc 223 dev/ic/dc.c dc_eeprom_idle(sc);
sc 226 dev/ic/dc.c CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL);
sc 227 dev/ic/dc.c dc_delay(sc);
sc 228 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_ROMCTL_READ);
sc 229 dev/ic/dc.c dc_delay(sc);
sc 230 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);
sc 231 dev/ic/dc.c dc_delay(sc);
sc 232 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CS);
sc 233 dev/ic/dc.c dc_delay(sc);
sc 237 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_EE_DATAIN);
sc 239 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_DATAIN);
sc 240 dev/ic/dc.c dc_delay(sc);
sc 241 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CLK);
sc 242 dev/ic/dc.c dc_delay(sc);
sc 243 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);
sc 244 dev/ic/dc.c dc_delay(sc);
sc 248 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CLK);
sc 249 dev/ic/dc.c dc_delay(sc);
sc 250 dev/ic/dc.c if (!(CSR_READ_4(sc, DC_SIO) & DC_SIO_EE_DATAOUT)) {
sc 251 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);
sc 252 dev/ic/dc.c dc_delay(sc);
sc 255 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);
sc 256 dev/ic/dc.c dc_delay(sc);
sc 260 dev/ic/dc.c dc_eeprom_idle(sc);
sc 263 dev/ic/dc.c sc->dc_romwidth = 6;
sc 265 dev/ic/dc.c sc->dc_romwidth = i;
sc 268 dev/ic/dc.c CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL);
sc 269 dev/ic/dc.c dc_delay(sc);
sc 270 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_ROMCTL_READ);
sc 271 dev/ic/dc.c dc_delay(sc);
sc 272 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);
sc 273 dev/ic/dc.c dc_delay(sc);
sc 274 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CS);
sc 275 dev/ic/dc.c dc_delay(sc);
sc 278 dev/ic/dc.c dc_eeprom_idle(sc);
sc 282 dev/ic/dc.c dc_eeprom_idle(sc)
sc 283 dev/ic/dc.c struct dc_softc *sc;
sc 287 dev/ic/dc.c CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL);
sc 288 dev/ic/dc.c dc_delay(sc);
sc 289 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_ROMCTL_READ);
sc 290 dev/ic/dc.c dc_delay(sc);
sc 291 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);
sc 292 dev/ic/dc.c dc_delay(sc);
sc 293 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CS);
sc 294 dev/ic/dc.c dc_delay(sc);
sc 297 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);
sc 298 dev/ic/dc.c dc_delay(sc);
sc 299 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CLK);
sc 300 dev/ic/dc.c dc_delay(sc);
sc 303 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);
sc 304 dev/ic/dc.c dc_delay(sc);
sc 305 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CS);
sc 306 dev/ic/dc.c dc_delay(sc);
sc 307 dev/ic/dc.c CSR_WRITE_4(sc, DC_SIO, 0x00000000);
sc 314 dev/ic/dc.c dc_eeprom_putbyte(sc, addr)
sc 315 dev/ic/dc.c struct dc_softc *sc;
sc 324 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_EE_DATAIN);
sc 326 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_DATAIN);
sc 327 dev/ic/dc.c dc_delay(sc);
sc 328 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CLK);
sc 329 dev/ic/dc.c dc_delay(sc);
sc 330 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);
sc 331 dev/ic/dc.c dc_delay(sc);
sc 337 dev/ic/dc.c for (i = sc->dc_romwidth; i--;) {
sc 343 dev/ic/dc.c dc_delay(sc);
sc 345 dev/ic/dc.c dc_delay(sc);
sc 347 dev/ic/dc.c dc_delay(sc);
sc 357 dev/ic/dc.c dc_eeprom_getword_pnic(sc, addr, dest)
sc 358 dev/ic/dc.c struct dc_softc *sc;
sc 365 dev/ic/dc.c CSR_WRITE_4(sc, DC_PN_SIOCTL, DC_PN_EEOPCODE_READ|addr);
sc 369 dev/ic/dc.c r = CSR_READ_4(sc, DC_SIO);
sc 383 dev/ic/dc.c dc_eeprom_getword_xircom(struct dc_softc *sc, int addr, u_int16_t *dest)
sc 388 dev/ic/dc.c CSR_WRITE_4(sc, DC_ROM, addr | 0x160);
sc 389 dev/ic/dc.c *dest = (u_int16_t)CSR_READ_4(sc, DC_SIO) & 0xff;
sc 391 dev/ic/dc.c CSR_WRITE_4(sc, DC_ROM, addr | 0x160);
sc 392 dev/ic/dc.c *dest |= ((u_int16_t)CSR_READ_4(sc, DC_SIO) & 0xff) << 8;
sc 401 dev/ic/dc.c dc_eeprom_getword(sc, addr, dest)
sc 402 dev/ic/dc.c struct dc_softc *sc;
sc 410 dev/ic/dc.c dc_eeprom_idle(sc);
sc 413 dev/ic/dc.c CSR_WRITE_4(sc, DC_SIO, DC_SIO_EESEL);
sc 414 dev/ic/dc.c dc_delay(sc);
sc 415 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_ROMCTL_READ);
sc 416 dev/ic/dc.c dc_delay(sc);
sc 417 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_EE_CLK);
sc 418 dev/ic/dc.c dc_delay(sc);
sc 419 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_EE_CS);
sc 420 dev/ic/dc.c dc_delay(sc);
sc 425 dev/ic/dc.c dc_eeprom_putbyte(sc, addr);
sc 432 dev/ic/dc.c dc_delay(sc);
sc 433 dev/ic/dc.c if (CSR_READ_4(sc, DC_SIO) & DC_SIO_EE_DATAOUT)
sc 435 dev/ic/dc.c dc_delay(sc);
sc 437 dev/ic/dc.c dc_delay(sc);
sc 441 dev/ic/dc.c dc_eeprom_idle(sc);
sc 449 dev/ic/dc.c void dc_read_eeprom(sc, dest, off, cnt, swap)
sc 450 dev/ic/dc.c struct dc_softc *sc;
sc 458 dev/ic/dc.c if (DC_IS_PNIC(sc))
sc 459 dev/ic/dc.c dc_eeprom_getword_pnic(sc, off + i, &word);
sc 460 dev/ic/dc.c else if (DC_IS_XIRCOM(sc))
sc 461 dev/ic/dc.c dc_eeprom_getword_xircom(sc, off + i, &word);
sc 463 dev/ic/dc.c dc_eeprom_getword(sc, off + i, &word);
sc 480 dev/ic/dc.c dc_mii_writebit(sc, bit)
sc 481 dev/ic/dc.c struct dc_softc *sc;
sc 485 dev/ic/dc.c CSR_WRITE_4(sc, DC_SIO,
sc 488 dev/ic/dc.c CSR_WRITE_4(sc, DC_SIO, DC_SIO_ROMCTL_WRITE);
sc 490 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_MII_CLK);
sc 491 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_MII_CLK);
sc 498 dev/ic/dc.c dc_mii_readbit(sc)
sc 499 dev/ic/dc.c struct dc_softc *sc;
sc 501 dev/ic/dc.c CSR_WRITE_4(sc, DC_SIO, DC_SIO_ROMCTL_READ|DC_SIO_MII_DIR);
sc 502 dev/ic/dc.c CSR_READ_4(sc, DC_SIO);
sc 503 dev/ic/dc.c DC_SETBIT(sc, DC_SIO, DC_SIO_MII_CLK);
sc 504 dev/ic/dc.c DC_CLRBIT(sc, DC_SIO, DC_SIO_MII_CLK);
sc 505 dev/ic/dc.c if (CSR_READ_4(sc, DC_SIO) & DC_SIO_MII_DATAIN)
sc 514 dev/ic/dc.c dc_mii_sync(sc)
sc 515 dev/ic/dc.c struct dc_softc *sc;
sc 519 dev/ic/dc.c CSR_WRITE_4(sc, DC_SIO, DC_SIO_ROMCTL_WRITE);
sc 522 dev/ic/dc.c dc_mii_writebit(sc, 1);
sc 529 dev/ic/dc.c dc_mii_send(sc, bits, cnt)
sc 530 dev/ic/dc.c struct dc_softc *sc;
sc 537 dev/ic/dc.c dc_mii_writebit(sc, bits & i);
sc 544 dev/ic/dc.c dc_mii_readreg(sc, frame)
sc 545 dev/ic/dc.c struct dc_softc *sc;
sc 563 dev/ic/dc.c dc_mii_sync(sc);
sc 568 dev/ic/dc.c dc_mii_send(sc, frame->mii_stdelim, 2);
sc 569 dev/ic/dc.c dc_mii_send(sc, frame->mii_opcode, 2);
sc 570 dev/ic/dc.c dc_mii_send(sc, frame->mii_phyaddr, 5);
sc 571 dev/ic/dc.c dc_mii_send(sc, frame->mii_regaddr, 5);
sc 575 dev/ic/dc.c dc_mii_writebit(sc, 1);
sc 576 dev/ic/dc.c dc_mii_writebit(sc, 0);
sc 580 dev/ic/dc.c ack = dc_mii_readbit(sc);
sc 588 dev/ic/dc.c dc_mii_readbit(sc);
sc 595 dev/ic/dc.c if (dc_mii_readbit(sc))
sc 602 dev/ic/dc.c dc_mii_writebit(sc, 0);
sc 603 dev/ic/dc.c dc_mii_writebit(sc, 0);
sc 616 dev/ic/dc.c dc_mii_writereg(sc, frame)
sc 617 dev/ic/dc.c struct dc_softc *sc;
sc 634 dev/ic/dc.c dc_mii_sync(sc);
sc 636 dev/ic/dc.c dc_mii_send(sc, frame->mii_stdelim, 2);
sc 637 dev/ic/dc.c dc_mii_send(sc, frame->mii_opcode, 2);
sc 638 dev/ic/dc.c dc_mii_send(sc, frame->mii_phyaddr, 5);
sc 639 dev/ic/dc.c dc_mii_send(sc, frame->mii_regaddr, 5);
sc 640 dev/ic/dc.c dc_mii_send(sc, frame->mii_turnaround, 2);
sc 641 dev/ic/dc.c dc_mii_send(sc, frame->mii_data, 16);
sc 644 dev/ic/dc.c dc_mii_writebit(sc, 0);
sc 645 dev/ic/dc.c dc_mii_writebit(sc, 0);
sc 657 dev/ic/dc.c struct dc_softc *sc = (struct dc_softc *)self;
sc 669 dev/ic/dc.c if (DC_IS_ADMTEK(sc) && phy != DC_ADMTEK_PHYADDR)
sc 677 dev/ic/dc.c if (DC_IS_CONEXANT(sc) && phy != DC_CONEXANT_PHYADDR)
sc 680 dev/ic/dc.c if (sc->dc_pmode != DC_PMODE_MII) {
sc 691 dev/ic/dc.c if (DC_IS_PNIC(sc))
sc 696 dev/ic/dc.c if (DC_IS_PNIC(sc))
sc 708 dev/ic/dc.c if (DC_IS_PNIC(sc)) {
sc 709 dev/ic/dc.c CSR_WRITE_4(sc, DC_PN_MII, DC_PN_MIIOPCODE_READ |
sc 713 dev/ic/dc.c rval = CSR_READ_4(sc, DC_PN_MII);
sc 722 dev/ic/dc.c if (DC_IS_COMET(sc)) {
sc 747 dev/ic/dc.c sc->sc_dev.dv_xname, reg);
sc 752 dev/ic/dc.c rval = CSR_READ_4(sc, phy_reg) & 0x0000FFFF;
sc 763 dev/ic/dc.c if (sc->dc_type == DC_TYPE_98713) {
sc 764 dev/ic/dc.c phy_reg = CSR_READ_4(sc, DC_NETCFG);
sc 765 dev/ic/dc.c CSR_WRITE_4(sc, DC_NETCFG, phy_reg & ~DC_NETCFG_PORTSEL);
sc 767 dev/ic/dc.c dc_mii_readreg(sc, &frame);
sc 768 dev/ic/dc.c if (sc->dc_type == DC_TYPE_98713)
sc 769 dev/ic/dc.c CSR_WRITE_4(sc, DC_NETCFG, phy_reg);
sc 779 dev/ic/dc.c struct dc_softc *sc = (struct dc_softc *)self;
sc 785 dev/ic/dc.c if (DC_IS_ADMTEK(sc) && phy != DC_ADMTEK_PHYADDR)
sc 787 dev/ic/dc.c if (DC_IS_CONEXANT(sc) && phy != DC_CONEXANT_PHYADDR)
sc 790 dev/ic/dc.c if (DC_IS_PNIC(sc)) {
sc 791 dev/ic/dc.c CSR_WRITE_4(sc, DC_PN_MII, DC_PN_MIIOPCODE_WRITE |
sc 794 dev/ic/dc.c if (!(CSR_READ_4(sc, DC_PN_MII) & DC_PN_MII_BUSY))
sc 800 dev/ic/dc.c if (DC_IS_COMET(sc)) {
sc 825 dev/ic/dc.c sc->sc_dev.dv_xname, reg);
sc 830 dev/ic/dc.c CSR_WRITE_4(sc, phy_reg, data);
sc 838 dev/ic/dc.c if (sc->dc_type == DC_TYPE_98713) {
sc 839 dev/ic/dc.c phy_reg = CSR_READ_4(sc, DC_NETCFG);
sc 840 dev/ic/dc.c CSR_WRITE_4(sc, DC_NETCFG, phy_reg & ~DC_NETCFG_PORTSEL);
sc 842 dev/ic/dc.c dc_mii_writereg(sc, &frame);
sc 843 dev/ic/dc.c if (sc->dc_type == DC_TYPE_98713)
sc 844 dev/ic/dc.c CSR_WRITE_4(sc, DC_NETCFG, phy_reg);
sc 851 dev/ic/dc.c struct dc_softc *sc = (struct dc_softc *)self;
sc 855 dev/ic/dc.c if (DC_IS_ADMTEK(sc))
sc 858 dev/ic/dc.c mii = &sc->sc_mii;
sc 860 dev/ic/dc.c if (DC_IS_DAVICOM(sc) && IFM_SUBTYPE(ifm->ifm_media) == IFM_HPNA_1) {
sc 861 dev/ic/dc.c dc_setcfg(sc, ifm->ifm_media);
sc 862 dev/ic/dc.c sc->dc_if_media = ifm->ifm_media;
sc 864 dev/ic/dc.c dc_setcfg(sc, mii->mii_media_active);
sc 865 dev/ic/dc.c sc->dc_if_media = mii->mii_media_active;
sc 874 dev/ic/dc.c dc_crc_le(sc, addr)
sc 875 dev/ic/dc.c struct dc_softc *sc;
sc 887 dev/ic/dc.c if (sc->dc_flags & DC_128BIT_HASH)
sc 891 dev/ic/dc.c if (sc->dc_flags & DC_64BIT_HASH)
sc 896 dev/ic/dc.c if (DC_IS_XIRCOM(sc)) {
sc 923 dev/ic/dc.c dc_setfilt_21143(sc)
sc 924 dev/ic/dc.c struct dc_softc *sc;
sc 928 dev/ic/dc.c struct arpcom *ac = &sc->sc_arpcom;
sc 934 dev/ic/dc.c ifp = &sc->sc_arpcom.ac_if;
sc 936 dev/ic/dc.c i = sc->dc_cdata.dc_tx_prod;
sc 937 dev/ic/dc.c DC_INC(sc->dc_cdata.dc_tx_prod, DC_TX_LIST_CNT);
sc 938 dev/ic/dc.c sc->dc_cdata.dc_tx_cnt++;
sc 939 dev/ic/dc.c sframe = &sc->dc_ldata->dc_tx_list[i];
sc 940 dev/ic/dc.c sp = &sc->dc_ldata->dc_sbuf[0];
sc 943 dev/ic/dc.c sframe->dc_data = htole32(sc->sc_listmap->dm_segs[0].ds_addr +
sc 948 dev/ic/dc.c sc->dc_cdata.dc_tx_chain[i].sd_mbuf =
sc 949 dev/ic/dc.c (struct mbuf *)&sc->dc_ldata->dc_sbuf[0];
sc 953 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC);
sc 955 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC);
sc 959 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI);
sc 961 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI);
sc 971 dev/ic/dc.c h = dc_crc_le(sc, enm->enm_addrlo);
sc 978 dev/ic/dc.c h = dc_crc_le(sc, (caddr_t)ðerbroadcastaddr);
sc 983 dev/ic/dc.c sp[39] = DC_SP_FIELD(sc->sc_arpcom.ac_enaddr, 0);
sc 984 dev/ic/dc.c sp[40] = DC_SP_FIELD(sc->sc_arpcom.ac_enaddr, 1);
sc 985 dev/ic/dc.c sp[41] = DC_SP_FIELD(sc->sc_arpcom.ac_enaddr, 2);
sc 987 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 995 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 999 dev/ic/dc.c CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF);
sc 1013 dev/ic/dc.c dc_setfilt_admtek(sc)
sc 1014 dev/ic/dc.c struct dc_softc *sc;
sc 1017 dev/ic/dc.c struct arpcom *ac = &sc->sc_arpcom;
sc 1023 dev/ic/dc.c ifp = &sc->sc_arpcom.ac_if;
sc 1026 dev/ic/dc.c CSR_WRITE_4(sc, DC_AL_PAR0, ac->ac_enaddr[3] << 24 |
sc 1028 dev/ic/dc.c CSR_WRITE_4(sc, DC_AL_PAR1, ac->ac_enaddr[5] << 8 | ac->ac_enaddr[4]);
sc 1032 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC);
sc 1034 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC);
sc 1038 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI);
sc 1040 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI);
sc 1043 dev/ic/dc.c CSR_WRITE_4(sc, DC_AL_MAR0, 0);
sc 1044 dev/ic/dc.c CSR_WRITE_4(sc, DC_AL_MAR1, 0);
sc 1061 dev/ic/dc.c if (DC_IS_CENTAUR(sc))
sc 1062 dev/ic/dc.c h = dc_crc_le(sc, enm->enm_addrlo);
sc 1072 dev/ic/dc.c CSR_WRITE_4(sc, DC_AL_MAR0, hashes[0]);
sc 1073 dev/ic/dc.c CSR_WRITE_4(sc, DC_AL_MAR1, hashes[1]);
sc 1077 dev/ic/dc.c dc_setfilt_asix(sc)
sc 1078 dev/ic/dc.c struct dc_softc *sc;
sc 1081 dev/ic/dc.c struct arpcom *ac = &sc->sc_arpcom;
sc 1087 dev/ic/dc.c ifp = &sc->sc_arpcom.ac_if;
sc 1090 dev/ic/dc.c CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_PAR0);
sc 1091 dev/ic/dc.c CSR_WRITE_4(sc, DC_AX_FILTDATA,
sc 1092 dev/ic/dc.c *(u_int32_t *)(&sc->sc_arpcom.ac_enaddr[0]));
sc 1093 dev/ic/dc.c CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_PAR1);
sc 1094 dev/ic/dc.c CSR_WRITE_4(sc, DC_AX_FILTDATA,
sc 1095 dev/ic/dc.c *(u_int32_t *)(&sc->sc_arpcom.ac_enaddr[4]));
sc 1099 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC);
sc 1101 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC);
sc 1104 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI);
sc 1106 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI);
sc 1113 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_AX_NETCFG_RX_BROAD);
sc 1115 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_AX_NETCFG_RX_BROAD);
sc 1118 dev/ic/dc.c CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_MAR0);
sc 1119 dev/ic/dc.c CSR_WRITE_4(sc, DC_AX_FILTDATA, 0);
sc 1120 dev/ic/dc.c CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_MAR1);
sc 1121 dev/ic/dc.c CSR_WRITE_4(sc, DC_AX_FILTDATA, 0);
sc 1141 dev/ic/dc.c CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_MAR0);
sc 1142 dev/ic/dc.c CSR_WRITE_4(sc, DC_AX_FILTDATA, hashes[0]);
sc 1143 dev/ic/dc.c CSR_WRITE_4(sc, DC_AX_FILTIDX, DC_AX_FILTIDX_MAR1);
sc 1144 dev/ic/dc.c CSR_WRITE_4(sc, DC_AX_FILTDATA, hashes[1]);
sc 1148 dev/ic/dc.c dc_setfilt_xircom(sc)
sc 1149 dev/ic/dc.c struct dc_softc *sc;
sc 1152 dev/ic/dc.c struct arpcom *ac = &sc->sc_arpcom;
sc 1159 dev/ic/dc.c ifp = &sc->sc_arpcom.ac_if;
sc 1160 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, (DC_NETCFG_TX_ON|DC_NETCFG_RX_ON));
sc 1162 dev/ic/dc.c i = sc->dc_cdata.dc_tx_prod;
sc 1163 dev/ic/dc.c DC_INC(sc->dc_cdata.dc_tx_prod, DC_TX_LIST_CNT);
sc 1164 dev/ic/dc.c sc->dc_cdata.dc_tx_cnt++;
sc 1165 dev/ic/dc.c sframe = &sc->dc_ldata->dc_tx_list[i];
sc 1166 dev/ic/dc.c sp = &sc->dc_ldata->dc_sbuf[0];
sc 1169 dev/ic/dc.c sframe->dc_data = htole32(sc->sc_listmap->dm_segs[0].ds_addr +
sc 1174 dev/ic/dc.c sc->dc_cdata.dc_tx_chain[i].sd_mbuf =
sc 1175 dev/ic/dc.c (struct mbuf *)&sc->dc_ldata->dc_sbuf[0];
sc 1179 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC);
sc 1181 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_PROMISC);
sc 1184 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI);
sc 1186 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_RX_ALLMULTI);
sc 1191 dev/ic/dc.c h = dc_crc_le(sc, enm->enm_addrlo);
sc 1197 dev/ic/dc.c h = dc_crc_le(sc, (caddr_t)ðerbroadcastaddr);
sc 1202 dev/ic/dc.c sp[0] = DC_SP_FIELD(sc->sc_arpcom.ac_enaddr, 0);
sc 1203 dev/ic/dc.c sp[1] = DC_SP_FIELD(sc->sc_arpcom.ac_enaddr, 1);
sc 1204 dev/ic/dc.c sp[2] = DC_SP_FIELD(sc->sc_arpcom.ac_enaddr, 2);
sc 1206 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON);
sc 1207 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_ON);
sc 1210 dev/ic/dc.c CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF);
sc 1221 dev/ic/dc.c dc_setfilt(sc)
sc 1222 dev/ic/dc.c struct dc_softc *sc;
sc 1224 dev/ic/dc.c if (DC_IS_INTEL(sc) || DC_IS_MACRONIX(sc) || DC_IS_PNIC(sc) ||
sc 1225 dev/ic/dc.c DC_IS_PNICII(sc) || DC_IS_DAVICOM(sc) || DC_IS_CONEXANT(sc))
sc 1226 dev/ic/dc.c dc_setfilt_21143(sc);
sc 1228 dev/ic/dc.c if (DC_IS_ASIX(sc))
sc 1229 dev/ic/dc.c dc_setfilt_asix(sc);
sc 1231 dev/ic/dc.c if (DC_IS_ADMTEK(sc))
sc 1232 dev/ic/dc.c dc_setfilt_admtek(sc);
sc 1234 dev/ic/dc.c if (DC_IS_XIRCOM(sc))
sc 1235 dev/ic/dc.c dc_setfilt_xircom(sc);
sc 1244 dev/ic/dc.c dc_setcfg(sc, media)
sc 1245 dev/ic/dc.c struct dc_softc *sc;
sc 1254 dev/ic/dc.c if (CSR_READ_4(sc, DC_NETCFG) & (DC_NETCFG_TX_ON|DC_NETCFG_RX_ON)) {
sc 1256 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, (DC_NETCFG_TX_ON|DC_NETCFG_RX_ON));
sc 1259 dev/ic/dc.c isr = CSR_READ_4(sc, DC_ISR);
sc 1269 dev/ic/dc.c "rx to idle state\n", sc->sc_dev.dv_xname);
sc 1273 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_SPEEDSEL);
sc 1274 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_HEARTBEAT);
sc 1275 dev/ic/dc.c if (sc->dc_pmode == DC_PMODE_MII) {
sc 1278 dev/ic/dc.c if (DC_IS_INTEL(sc)) {
sc 1280 dev/ic/dc.c watchdogreg = CSR_READ_4(sc, DC_WATCHDOG);
sc 1283 dev/ic/dc.c CSR_WRITE_4(sc, DC_WATCHDOG, watchdogreg);
sc 1285 dev/ic/dc.c DC_SETBIT(sc, DC_WATCHDOG, DC_WDOG_JABBERDIS);
sc 1287 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, (DC_NETCFG_PCS|
sc 1289 dev/ic/dc.c if (sc->dc_type == DC_TYPE_98713)
sc 1290 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, (DC_NETCFG_PCS|
sc 1292 dev/ic/dc.c if (!DC_IS_DAVICOM(sc))
sc 1293 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
sc 1294 dev/ic/dc.c DC_CLRBIT(sc, DC_10BTCTRL, 0xFFFF);
sc 1295 dev/ic/dc.c if (DC_IS_INTEL(sc))
sc 1296 dev/ic/dc.c dc_apply_fixup(sc, IFM_AUTO);
sc 1298 dev/ic/dc.c if (DC_IS_PNIC(sc)) {
sc 1299 dev/ic/dc.c DC_PN_GPIO_SETBIT(sc, DC_PN_GPIO_SPEEDSEL);
sc 1300 dev/ic/dc.c DC_PN_GPIO_SETBIT(sc, DC_PN_GPIO_100TX_LOOP);
sc 1301 dev/ic/dc.c DC_SETBIT(sc, DC_PN_NWAY, DC_PN_NWAY_SPEEDSEL);
sc 1303 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
sc 1304 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PCS);
sc 1305 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_SCRAMBLER);
sc 1306 dev/ic/dc.c if (DC_IS_INTEL(sc))
sc 1307 dev/ic/dc.c dc_apply_fixup(sc,
sc 1314 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_SPEEDSEL);
sc 1315 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_HEARTBEAT);
sc 1316 dev/ic/dc.c if (sc->dc_pmode == DC_PMODE_MII) {
sc 1319 dev/ic/dc.c if (DC_IS_INTEL(sc)) {
sc 1321 dev/ic/dc.c watchdogreg = CSR_READ_4(sc, DC_WATCHDOG);
sc 1324 dev/ic/dc.c CSR_WRITE_4(sc, DC_WATCHDOG, watchdogreg);
sc 1326 dev/ic/dc.c DC_SETBIT(sc, DC_WATCHDOG, DC_WDOG_JABBERDIS);
sc 1328 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, (DC_NETCFG_PCS|
sc 1330 dev/ic/dc.c if (sc->dc_type == DC_TYPE_98713)
sc 1331 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PCS);
sc 1332 dev/ic/dc.c if (!DC_IS_DAVICOM(sc))
sc 1333 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
sc 1334 dev/ic/dc.c DC_CLRBIT(sc, DC_10BTCTRL, 0xFFFF);
sc 1335 dev/ic/dc.c if (DC_IS_INTEL(sc))
sc 1336 dev/ic/dc.c dc_apply_fixup(sc, IFM_AUTO);
sc 1338 dev/ic/dc.c if (DC_IS_PNIC(sc)) {
sc 1339 dev/ic/dc.c DC_PN_GPIO_CLRBIT(sc, DC_PN_GPIO_SPEEDSEL);
sc 1340 dev/ic/dc.c DC_PN_GPIO_SETBIT(sc, DC_PN_GPIO_100TX_LOOP);
sc 1341 dev/ic/dc.c DC_CLRBIT(sc, DC_PN_NWAY, DC_PN_NWAY_SPEEDSEL);
sc 1343 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
sc 1344 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PCS);
sc 1345 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_SCRAMBLER);
sc 1346 dev/ic/dc.c if (DC_IS_INTEL(sc)) {
sc 1347 dev/ic/dc.c DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
sc 1348 dev/ic/dc.c DC_CLRBIT(sc, DC_10BTCTRL, 0xFFFF);
sc 1350 dev/ic/dc.c DC_SETBIT(sc, DC_10BTCTRL, 0x7F3D);
sc 1352 dev/ic/dc.c DC_SETBIT(sc, DC_10BTCTRL, 0x7F3F);
sc 1353 dev/ic/dc.c DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
sc 1354 dev/ic/dc.c DC_CLRBIT(sc, DC_10BTCTRL,
sc 1356 dev/ic/dc.c dc_apply_fixup(sc,
sc 1369 dev/ic/dc.c if (DC_IS_DAVICOM(sc)) {
sc 1371 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
sc 1372 dev/ic/dc.c sc->dc_link = 1;
sc 1374 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
sc 1379 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
sc 1380 dev/ic/dc.c if (sc->dc_pmode == DC_PMODE_SYM && DC_IS_PNIC(sc))
sc 1381 dev/ic/dc.c DC_SETBIT(sc, DC_PN_NWAY, DC_PN_NWAY_DUPLEX);
sc 1383 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
sc 1384 dev/ic/dc.c if (sc->dc_pmode == DC_PMODE_SYM && DC_IS_PNIC(sc))
sc 1385 dev/ic/dc.c DC_CLRBIT(sc, DC_PN_NWAY, DC_PN_NWAY_DUPLEX);
sc 1389 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON|DC_NETCFG_RX_ON);
sc 1393 dev/ic/dc.c dc_reset(sc)
sc 1394 dev/ic/dc.c struct dc_softc *sc;
sc 1398 dev/ic/dc.c DC_SETBIT(sc, DC_BUSCTL, DC_BUSCTL_RESET);
sc 1402 dev/ic/dc.c if (!(CSR_READ_4(sc, DC_BUSCTL) & DC_BUSCTL_RESET))
sc 1406 dev/ic/dc.c if (DC_IS_ASIX(sc) || DC_IS_ADMTEK(sc) || DC_IS_XIRCOM(sc) ||
sc 1407 dev/ic/dc.c DC_IS_INTEL(sc) || DC_IS_CONEXANT(sc)) {
sc 1409 dev/ic/dc.c DC_CLRBIT(sc, DC_BUSCTL, DC_BUSCTL_RESET);
sc 1414 dev/ic/dc.c printf("%s: reset never completed!\n", sc->sc_dev.dv_xname);
sc 1419 dev/ic/dc.c CSR_WRITE_4(sc, DC_IMR, 0x00000000);
sc 1420 dev/ic/dc.c CSR_WRITE_4(sc, DC_BUSCTL, 0x00000000);
sc 1421 dev/ic/dc.c CSR_WRITE_4(sc, DC_NETCFG, 0x00000000);
sc 1429 dev/ic/dc.c if (DC_IS_INTEL(sc)) {
sc 1430 dev/ic/dc.c DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
sc 1431 dev/ic/dc.c CSR_WRITE_4(sc, DC_10BTCTRL, 0);
sc 1432 dev/ic/dc.c CSR_WRITE_4(sc, DC_WATCHDOG, 0);
sc 1435 dev/ic/dc.c if (sc->dc_type == DC_TYPE_21145)
sc 1436 dev/ic/dc.c dc_setcfg(sc, IFM_10_T);
sc 1440 dev/ic/dc.c dc_apply_fixup(sc, media)
sc 1441 dev/ic/dc.c struct dc_softc *sc;
sc 1449 dev/ic/dc.c m = sc->dc_mi;
sc 1462 dev/ic/dc.c CSR_WRITE_4(sc, DC_WATCHDOG, reg);
sc 1467 dev/ic/dc.c CSR_WRITE_4(sc, DC_WATCHDOG, reg);
sc 1472 dev/ic/dc.c dc_decode_leaf_sia(sc, l)
sc 1473 dev/ic/dc.c struct dc_softc *sc;
sc 1514 dev/ic/dc.c m->dc_next = sc->dc_mi;
sc 1515 dev/ic/dc.c sc->dc_mi = m;
sc 1517 dev/ic/dc.c sc->dc_pmode = DC_PMODE_SIA;
sc 1521 dev/ic/dc.c dc_decode_leaf_sym(sc, l)
sc 1522 dev/ic/dc.c struct dc_softc *sc;
sc 1540 dev/ic/dc.c m->dc_next = sc->dc_mi;
sc 1541 dev/ic/dc.c sc->dc_mi = m;
sc 1543 dev/ic/dc.c sc->dc_pmode = DC_PMODE_SYM;
sc 1547 dev/ic/dc.c dc_decode_leaf_mii(sc, l)
sc 1548 dev/ic/dc.c struct dc_softc *sc;
sc 1570 dev/ic/dc.c m->dc_next = sc->dc_mi;
sc 1571 dev/ic/dc.c sc->dc_mi = m;
sc 1575 dev/ic/dc.c dc_read_srom(sc, bits)
sc 1576 dev/ic/dc.c struct dc_softc *sc;
sc 1582 dev/ic/dc.c sc->dc_srom = malloc(size, M_DEVBUF, M_NOWAIT);
sc 1583 dev/ic/dc.c if (sc->dc_srom == NULL)
sc 1585 dev/ic/dc.c dc_read_eeprom(sc, (caddr_t)sc->dc_srom, 0, (size / 2), 0);
sc 1589 dev/ic/dc.c dc_parse_21143_srom(sc)
sc 1590 dev/ic/dc.c struct dc_softc *sc;
sc 1598 dev/ic/dc.c loff = sc->dc_srom[27];
sc 1599 dev/ic/dc.c lhdr = (struct dc_leaf_hdr *)&(sc->dc_srom[loff]);
sc 1625 dev/ic/dc.c dc_decode_leaf_mii(sc, (struct dc_eblock_mii *)hdr);
sc 1629 dev/ic/dc.c dc_decode_leaf_sia(sc,
sc 1634 dev/ic/dc.c dc_decode_leaf_sym(sc,
sc 1651 dev/ic/dc.c dc_attach(sc)
sc 1652 dev/ic/dc.c struct dc_softc *sc;
sc 1661 dev/ic/dc.c if (sc->sc_hasmac)
sc 1664 dev/ic/dc.c switch(sc->dc_type) {
sc 1669 dev/ic/dc.c dc_read_eeprom(sc, (caddr_t)&mac_offset,
sc 1671 dev/ic/dc.c dc_read_eeprom(sc, (caddr_t)&sc->sc_arpcom.ac_enaddr,
sc 1675 dev/ic/dc.c dc_read_eeprom(sc, (caddr_t)&sc->sc_arpcom.ac_enaddr, 0, 3, 1);
sc 1681 dev/ic/dc.c dc_read_eeprom(sc, (caddr_t)&sc->sc_arpcom.ac_enaddr,
sc 1686 dev/ic/dc.c reg = CSR_READ_4(sc, DC_AL_PAR0);
sc 1687 dev/ic/dc.c sc->sc_arpcom.ac_enaddr[0] = (reg & 0xff);
sc 1688 dev/ic/dc.c sc->sc_arpcom.ac_enaddr[1] = (reg >> 8) & 0xff;
sc 1689 dev/ic/dc.c sc->sc_arpcom.ac_enaddr[2] = (reg >> 16) & 0xff;
sc 1690 dev/ic/dc.c sc->sc_arpcom.ac_enaddr[3] = (reg >> 24) & 0xff;
sc 1691 dev/ic/dc.c reg = CSR_READ_4(sc, DC_AL_PAR1);
sc 1692 dev/ic/dc.c sc->sc_arpcom.ac_enaddr[4] = (reg & 0xff);
sc 1693 dev/ic/dc.c sc->sc_arpcom.ac_enaddr[5] = (reg >> 8) & 0xff;
sc 1696 dev/ic/dc.c bcopy(&sc->dc_srom + DC_CONEXANT_EE_NODEADDR,
sc 1697 dev/ic/dc.c &sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 1702 dev/ic/dc.c dc_read_eeprom(sc, (caddr_t)&sc->sc_arpcom.ac_enaddr,
sc 1708 dev/ic/dc.c if (bus_dmamem_alloc(sc->sc_dmat, sizeof(struct dc_list_data),
sc 1709 dev/ic/dc.c PAGE_SIZE, 0, sc->sc_listseg, 1, &sc->sc_listnseg,
sc 1714 dev/ic/dc.c if (bus_dmamem_map(sc->sc_dmat, sc->sc_listseg, sc->sc_listnseg,
sc 1715 dev/ic/dc.c sizeof(struct dc_list_data), &sc->sc_listkva,
sc 1720 dev/ic/dc.c if (bus_dmamap_create(sc->sc_dmat, sizeof(struct dc_list_data), 1,
sc 1722 dev/ic/dc.c &sc->sc_listmap) != 0) {
sc 1726 dev/ic/dc.c if (bus_dmamap_load(sc->sc_dmat, sc->sc_listmap, sc->sc_listkva,
sc 1731 dev/ic/dc.c sc->dc_ldata = (struct dc_list_data *)sc->sc_listkva;
sc 1732 dev/ic/dc.c bzero(sc->dc_ldata, sizeof(struct dc_list_data));
sc 1735 dev/ic/dc.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
sc 1737 dev/ic/dc.c &sc->dc_cdata.dc_rx_chain[i].sd_map) != 0) {
sc 1742 dev/ic/dc.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0,
sc 1743 dev/ic/dc.c BUS_DMA_NOWAIT, &sc->sc_rx_sparemap) != 0) {
sc 1749 dev/ic/dc.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 1751 dev/ic/dc.c &sc->dc_cdata.dc_tx_chain[i].sd_map) != 0) {
sc 1756 dev/ic/dc.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, DC_TX_LIST_CNT - 5,
sc 1757 dev/ic/dc.c MCLBYTES, 0, BUS_DMA_NOWAIT, &sc->sc_tx_sparemap) != 0) {
sc 1765 dev/ic/dc.c printf(" address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 1767 dev/ic/dc.c ifp = &sc->sc_arpcom.ac_if;
sc 1768 dev/ic/dc.c ifp->if_softc = sc;
sc 1776 dev/ic/dc.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 1786 dev/ic/dc.c if (DC_IS_INTEL(sc)) {
sc 1787 dev/ic/dc.c dc_apply_fixup(sc, IFM_AUTO);
sc 1788 dev/ic/dc.c tmp = sc->dc_pmode;
sc 1789 dev/ic/dc.c sc->dc_pmode = DC_PMODE_MII;
sc 1797 dev/ic/dc.c if (DC_IS_XIRCOM(sc)) {
sc 1798 dev/ic/dc.c CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_WRITE_EN | DC_SIAGP_INT1_EN |
sc 1801 dev/ic/dc.c CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_INT1_EN |
sc 1806 dev/ic/dc.c sc->sc_mii.mii_ifp = ifp;
sc 1807 dev/ic/dc.c sc->sc_mii.mii_readreg = dc_miibus_readreg;
sc 1808 dev/ic/dc.c sc->sc_mii.mii_writereg = dc_miibus_writereg;
sc 1809 dev/ic/dc.c sc->sc_mii.mii_statchg = dc_miibus_statchg;
sc 1810 dev/ic/dc.c ifmedia_init(&sc->sc_mii.mii_media, 0, dc_ifmedia_upd, dc_ifmedia_sts);
sc 1811 dev/ic/dc.c mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
sc 1814 dev/ic/dc.c if (DC_IS_INTEL(sc)) {
sc 1815 dev/ic/dc.c if (LIST_EMPTY(&sc->sc_mii.mii_phys)) {
sc 1816 dev/ic/dc.c sc->dc_pmode = tmp;
sc 1817 dev/ic/dc.c if (sc->dc_pmode != DC_PMODE_SIA)
sc 1818 dev/ic/dc.c sc->dc_pmode = DC_PMODE_SYM;
sc 1819 dev/ic/dc.c sc->dc_flags |= DC_21143_NWAY;
sc 1820 dev/ic/dc.c if (sc->dc_flags & DC_MOMENCO_BOTCH)
sc 1821 dev/ic/dc.c sc->dc_pmode = DC_PMODE_MII;
sc 1822 dev/ic/dc.c mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
sc 1826 dev/ic/dc.c sc->dc_flags &= ~DC_TULIP_LEDS;
sc 1830 dev/ic/dc.c if (LIST_EMPTY(&sc->sc_mii.mii_phys)) {
sc 1831 dev/ic/dc.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
sc 1832 dev/ic/dc.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
sc 1833 dev/ic/dc.c printf("%s: MII without any PHY!\n", sc->sc_dev.dv_xname);
sc 1834 dev/ic/dc.c } else if (sc->dc_type == DC_TYPE_21145) {
sc 1835 dev/ic/dc.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
sc 1837 dev/ic/dc.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 1839 dev/ic/dc.c if (DC_IS_DAVICOM(sc) && sc->dc_revision >= DC_REVISION_DM9102A)
sc 1840 dev/ic/dc.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_HPNA_1,0,NULL);
sc 1842 dev/ic/dc.c if (DC_IS_ADMTEK(sc)) {
sc 1846 dev/ic/dc.c DC_SETBIT(sc, DC_AL_CR, DC_AL_CR_ATUR);
sc 1855 dev/ic/dc.c sc->sc_dhook = shutdownhook_establish(dc_shutdown, sc);
sc 1856 dev/ic/dc.c sc->sc_pwrhook = powerhook_establish(dc_power, sc);
sc 1866 dev/ic/dc.c dc_list_tx_init(sc)
sc 1867 dev/ic/dc.c struct dc_softc *sc;
sc 1874 dev/ic/dc.c cd = &sc->dc_cdata;
sc 1875 dev/ic/dc.c ld = sc->dc_ldata;
sc 1877 dev/ic/dc.c next = sc->sc_listmap->dm_segs[0].ds_addr;
sc 1902 dev/ic/dc.c dc_list_rx_init(sc)
sc 1903 dev/ic/dc.c struct dc_softc *sc;
sc 1910 dev/ic/dc.c cd = &sc->dc_cdata;
sc 1911 dev/ic/dc.c ld = sc->dc_ldata;
sc 1914 dev/ic/dc.c if (dc_newbuf(sc, i, NULL) == ENOBUFS)
sc 1916 dev/ic/dc.c next = sc->sc_listmap->dm_segs[0].ds_addr;
sc 1935 dev/ic/dc.c dc_newbuf(sc, i, m)
sc 1936 dev/ic/dc.c struct dc_softc *sc;
sc 1944 dev/ic/dc.c c = &sc->dc_ldata->dc_rx_list[i];
sc 1957 dev/ic/dc.c if (bus_dmamap_load_mbuf(sc->sc_dmat, sc->sc_rx_sparemap,
sc 1962 dev/ic/dc.c map = sc->dc_cdata.dc_rx_chain[i].sd_map;
sc 1963 dev/ic/dc.c sc->dc_cdata.dc_rx_chain[i].sd_map = sc->sc_rx_sparemap;
sc 1964 dev/ic/dc.c sc->sc_rx_sparemap = map;
sc 1983 dev/ic/dc.c if (sc->dc_flags & DC_PNIC_RX_BUG_WAR)
sc 1986 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, sc->dc_cdata.dc_rx_chain[i].sd_map, 0,
sc 1987 dev/ic/dc.c sc->dc_cdata.dc_rx_chain[i].sd_map->dm_mapsize,
sc 1990 dev/ic/dc.c sc->dc_cdata.dc_rx_chain[i].sd_mbuf = m_new;
sc 1992 dev/ic/dc.c sc->dc_cdata.dc_rx_chain[i].sd_map->dm_segs[0].ds_addr +
sc 1997 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 2059 dev/ic/dc.c dc_pnic_rx_bug_war(sc, idx)
sc 2060 dev/ic/dc.c struct dc_softc *sc;
sc 2070 dev/ic/dc.c i = sc->dc_pnic_rx_bug_save;
sc 2071 dev/ic/dc.c cur_rx = &sc->dc_ldata->dc_rx_list[idx];
sc 2072 dev/ic/dc.c ptr = sc->dc_pnic_rx_buf;
sc 2077 dev/ic/dc.c c = &sc->dc_ldata->dc_rx_list[i];
sc 2079 dev/ic/dc.c m = sc->dc_cdata.dc_rx_chain[i].sd_mbuf;
sc 2085 dev/ic/dc.c dc_newbuf(sc, i, m);
sc 2102 dev/ic/dc.c if (ptr < sc->dc_pnic_rx_buf)
sc 2103 dev/ic/dc.c ptr = sc->dc_pnic_rx_buf;
sc 2110 dev/ic/dc.c dc_newbuf(sc, i, m);
sc 2127 dev/ic/dc.c dc_rx_resync(sc)
sc 2128 dev/ic/dc.c struct dc_softc *sc;
sc 2133 dev/ic/dc.c pos = sc->dc_cdata.dc_rx_prod;
sc 2138 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 2142 dev/ic/dc.c stat = sc->dc_ldata->dc_rx_list[pos].dc_status;
sc 2153 dev/ic/dc.c sc->dc_cdata.dc_rx_prod = pos;
sc 2163 dev/ic/dc.c dc_rxeof(sc)
sc 2164 dev/ic/dc.c struct dc_softc *sc;
sc 2172 dev/ic/dc.c ifp = &sc->sc_arpcom.ac_if;
sc 2173 dev/ic/dc.c i = sc->dc_cdata.dc_rx_prod;
sc 2179 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 2183 dev/ic/dc.c cur_rx = &sc->dc_ldata->dc_rx_list[i];
sc 2188 dev/ic/dc.c m = sc->dc_cdata.dc_rx_chain[i].sd_mbuf;
sc 2191 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, sc->dc_cdata.dc_rx_chain[i].sd_map,
sc 2192 dev/ic/dc.c 0, sc->dc_cdata.dc_rx_chain[i].sd_map->dm_mapsize,
sc 2195 dev/ic/dc.c if (sc->dc_flags & DC_PNIC_RX_BUG_WAR) {
sc 2198 dev/ic/dc.c sc->dc_pnic_rx_bug_save = i;
sc 2203 dev/ic/dc.c dc_pnic_rx_bug_war(sc, i);
sc 2209 dev/ic/dc.c sc->dc_cdata.dc_rx_chain[i].sd_mbuf = NULL;
sc 2226 dev/ic/dc.c dc_newbuf(sc, i, m);
sc 2231 dev/ic/dc.c dc_init(sc);
sc 2243 dev/ic/dc.c dc_newbuf(sc, i, m);
sc 2260 dev/ic/dc.c sc->dc_cdata.dc_rx_prod = i;
sc 2269 dev/ic/dc.c dc_txeof(sc)
sc 2270 dev/ic/dc.c struct dc_softc *sc;
sc 2276 dev/ic/dc.c ifp = &sc->sc_arpcom.ac_if;
sc 2282 dev/ic/dc.c idx = sc->dc_cdata.dc_tx_cons;
sc 2283 dev/ic/dc.c while(idx != sc->dc_cdata.dc_tx_prod) {
sc 2287 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 2291 dev/ic/dc.c cur_tx = &sc->dc_ldata->dc_tx_list[idx];
sc 2309 dev/ic/dc.c if (DC_IS_PNIC(sc)) {
sc 2311 dev/ic/dc.c dc_setfilt(sc);
sc 2313 dev/ic/dc.c sc->dc_cdata.dc_tx_chain[idx].sd_mbuf = NULL;
sc 2315 dev/ic/dc.c sc->dc_cdata.dc_tx_cnt--;
sc 2320 dev/ic/dc.c if (DC_IS_XIRCOM(sc) || DC_IS_CONEXANT(sc)) {
sc 2330 dev/ic/dc.c sc->dc_pmode == DC_PMODE_MII &&
sc 2336 dev/ic/dc.c sc->dc_pmode == DC_PMODE_MII &&
sc 2349 dev/ic/dc.c dc_init(sc);
sc 2357 dev/ic/dc.c if (sc->dc_cdata.dc_tx_chain[idx].sd_map->dm_nsegs != 0) {
sc 2358 dev/ic/dc.c bus_dmamap_t map = sc->dc_cdata.dc_tx_chain[idx].sd_map;
sc 2360 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 2362 dev/ic/dc.c bus_dmamap_unload(sc->sc_dmat, map);
sc 2364 dev/ic/dc.c if (sc->dc_cdata.dc_tx_chain[idx].sd_mbuf != NULL) {
sc 2365 dev/ic/dc.c m_freem(sc->dc_cdata.dc_tx_chain[idx].sd_mbuf);
sc 2366 dev/ic/dc.c sc->dc_cdata.dc_tx_chain[idx].sd_mbuf = NULL;
sc 2369 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 2373 dev/ic/dc.c sc->dc_cdata.dc_tx_cnt--;
sc 2377 dev/ic/dc.c if (idx != sc->dc_cdata.dc_tx_cons) {
sc 2379 dev/ic/dc.c sc->dc_cdata.dc_tx_cons = idx;
sc 2382 dev/ic/dc.c ifp->if_timer = (sc->dc_cdata.dc_tx_cnt == 0) ? 0 : 5;
sc 2389 dev/ic/dc.c struct dc_softc *sc = (struct dc_softc *)xsc;
sc 2397 dev/ic/dc.c ifp = &sc->sc_arpcom.ac_if;
sc 2398 dev/ic/dc.c mii = &sc->sc_mii;
sc 2400 dev/ic/dc.c if (sc->dc_flags & DC_REDUCED_MII_POLL) {
sc 2401 dev/ic/dc.c if (sc->dc_flags & DC_21143_NWAY) {
sc 2402 dev/ic/dc.c r = CSR_READ_4(sc, DC_10BTSTAT);
sc 2405 dev/ic/dc.c sc->dc_link = 0;
sc 2410 dev/ic/dc.c sc->dc_link = 0;
sc 2413 dev/ic/dc.c if (sc->dc_link == 0)
sc 2416 dev/ic/dc.c r = CSR_READ_4(sc, DC_ISR);
sc 2418 dev/ic/dc.c sc->dc_cdata.dc_tx_cnt == 0 && !DC_IS_ASIX(sc)) {
sc 2421 dev/ic/dc.c sc->dc_link = 0;
sc 2446 dev/ic/dc.c if (!sc->dc_link && mii->mii_media_status & IFM_ACTIVE &&
sc 2448 dev/ic/dc.c sc->dc_link++;
sc 2453 dev/ic/dc.c if (sc->dc_flags & DC_21143_NWAY && !sc->dc_link)
sc 2454 dev/ic/dc.c timeout_add(&sc->dc_tick_tmo, hz / 10);
sc 2456 dev/ic/dc.c timeout_add(&sc->dc_tick_tmo, hz);
sc 2465 dev/ic/dc.c dc_tx_underrun(sc)
sc 2466 dev/ic/dc.c struct dc_softc *sc;
sc 2471 dev/ic/dc.c if (DC_IS_DAVICOM(sc))
sc 2472 dev/ic/dc.c dc_init(sc);
sc 2474 dev/ic/dc.c if (DC_IS_INTEL(sc)) {
sc 2480 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON);
sc 2483 dev/ic/dc.c isr = CSR_READ_4(sc, DC_ISR);
sc 2490 dev/ic/dc.c sc->sc_dev.dv_xname);
sc 2491 dev/ic/dc.c dc_init(sc);
sc 2495 dev/ic/dc.c sc->dc_txthresh += DC_TXTHRESH_INC;
sc 2496 dev/ic/dc.c if (sc->dc_txthresh > DC_TXTHRESH_MAX) {
sc 2497 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_STORENFWD);
sc 2499 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_TX_THRESH);
sc 2500 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, sc->dc_txthresh);
sc 2503 dev/ic/dc.c if (DC_IS_INTEL(sc))
sc 2504 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON);
sc 2513 dev/ic/dc.c struct dc_softc *sc;
sc 2518 dev/ic/dc.c sc = arg;
sc 2520 dev/ic/dc.c ifp = &sc->sc_arpcom.ac_if;
sc 2522 dev/ic/dc.c if ((CSR_READ_4(sc, DC_ISR) & DC_INTRS) == 0)
sc 2527 dev/ic/dc.c if (CSR_READ_4(sc, DC_ISR) & DC_INTRS)
sc 2528 dev/ic/dc.c dc_stop(sc);
sc 2533 dev/ic/dc.c CSR_WRITE_4(sc, DC_IMR, 0x00000000);
sc 2535 dev/ic/dc.c while (((status = CSR_READ_4(sc, DC_ISR)) & DC_INTRS) &&
sc 2540 dev/ic/dc.c CSR_WRITE_4(sc, DC_ISR, status);
sc 2545 dev/ic/dc.c dc_rxeof(sc);
sc 2547 dev/ic/dc.c while(dc_rx_resync(sc))
sc 2548 dev/ic/dc.c dc_rxeof(sc);
sc 2553 dev/ic/dc.c dc_txeof(sc);
sc 2556 dev/ic/dc.c dc_txeof(sc);
sc 2557 dev/ic/dc.c if (sc->dc_cdata.dc_tx_cnt) {
sc 2558 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON);
sc 2559 dev/ic/dc.c CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF);
sc 2564 dev/ic/dc.c dc_tx_underrun(sc);
sc 2570 dev/ic/dc.c dc_rxeof(sc);
sc 2572 dev/ic/dc.c while(dc_rx_resync(sc))
sc 2573 dev/ic/dc.c dc_rxeof(sc);
sc 2578 dev/ic/dc.c dc_reset(sc);
sc 2579 dev/ic/dc.c dc_init(sc);
sc 2584 dev/ic/dc.c CSR_WRITE_4(sc, DC_IMR, DC_INTRS);
sc 2597 dev/ic/dc.c dc_encap(sc, m_head, txidx)
sc 2598 dev/ic/dc.c struct dc_softc *sc;
sc 2611 dev/ic/dc.c map = sc->sc_tx_sparemap;
sc 2613 dev/ic/dc.c if (bus_dmamap_load_mbuf(sc->sc_dmat, map,
sc 2620 dev/ic/dc.c if (sc->dc_flags & DC_TX_ADMTEK_WAR) {
sc 2621 dev/ic/dc.c if (*txidx != sc->dc_cdata.dc_tx_prod &&
sc 2623 dev/ic/dc.c bus_dmamap_unload(sc->sc_dmat, map);
sc 2628 dev/ic/dc.c (sc->dc_cdata.dc_tx_cnt + cnt)) < 5) {
sc 2629 dev/ic/dc.c bus_dmamap_unload(sc->sc_dmat, map);
sc 2633 dev/ic/dc.c f = &sc->dc_ldata->dc_tx_list[frag];
sc 2646 dev/ic/dc.c sc->dc_cdata.dc_tx_cnt += cnt;
sc 2647 dev/ic/dc.c sc->dc_cdata.dc_tx_chain[cur].sd_mbuf = m_head;
sc 2648 dev/ic/dc.c sc->sc_tx_sparemap = sc->dc_cdata.dc_tx_chain[cur].sd_map;
sc 2649 dev/ic/dc.c sc->dc_cdata.dc_tx_chain[cur].sd_map = map;
sc 2650 dev/ic/dc.c sc->dc_ldata->dc_tx_list[cur].dc_ctl |= htole32(DC_TXCTL_LASTFRAG);
sc 2651 dev/ic/dc.c if (sc->dc_flags & DC_TX_INTR_FIRSTFRAG)
sc 2652 dev/ic/dc.c sc->dc_ldata->dc_tx_list[*txidx].dc_ctl |=
sc 2654 dev/ic/dc.c if (sc->dc_flags & DC_TX_INTR_ALWAYS)
sc 2655 dev/ic/dc.c sc->dc_ldata->dc_tx_list[cur].dc_ctl |=
sc 2657 dev/ic/dc.c if (sc->dc_flags & DC_TX_USE_TX_INTR && sc->dc_cdata.dc_tx_cnt > 64)
sc 2658 dev/ic/dc.c sc->dc_ldata->dc_tx_list[cur].dc_ctl |=
sc 2660 dev/ic/dc.c else if ((sc->dc_flags & DC_TX_USE_TX_INTR) &&
sc 2661 dev/ic/dc.c TBR_IS_ENABLED(&sc->sc_arpcom.ac_if.if_snd))
sc 2662 dev/ic/dc.c sc->dc_ldata->dc_tx_list[cur].dc_ctl |=
sc 2664 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 2667 dev/ic/dc.c sc->dc_ldata->dc_tx_list[*txidx].dc_status = htole32(DC_TXSTAT_OWN);
sc 2669 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 2685 dev/ic/dc.c dc_coal(sc, m_head)
sc 2686 dev/ic/dc.c struct dc_softc *sc;
sc 2721 dev/ic/dc.c struct dc_softc *sc;
sc 2725 dev/ic/dc.c sc = ifp->if_softc;
sc 2727 dev/ic/dc.c if (!sc->dc_link && ifp->if_snd.ifq_len < 10)
sc 2733 dev/ic/dc.c idx = sc->dc_cdata.dc_tx_prod;
sc 2735 dev/ic/dc.c while(sc->dc_cdata.dc_tx_chain[idx].sd_mbuf == NULL) {
sc 2740 dev/ic/dc.c if (sc->dc_flags & DC_TX_COALESCE &&
sc 2742 dev/ic/dc.c sc->dc_flags & DC_TX_ALIGN)) {
sc 2747 dev/ic/dc.c if (dc_coal(sc, &m_head)) {
sc 2753 dev/ic/dc.c if (dc_encap(sc, m_head, &idx)) {
sc 2759 dev/ic/dc.c if (sc->dc_flags & DC_TX_COALESCE) {
sc 2772 dev/ic/dc.c if (sc->dc_flags & DC_TX_ONE) {
sc 2777 dev/ic/dc.c if (idx == sc->dc_cdata.dc_tx_prod)
sc 2781 dev/ic/dc.c sc->dc_cdata.dc_tx_prod = idx;
sc 2782 dev/ic/dc.c if (!(sc->dc_flags & DC_TX_POLL))
sc 2783 dev/ic/dc.c CSR_WRITE_4(sc, DC_TXSTART, 0xFFFFFFFF);
sc 2795 dev/ic/dc.c struct dc_softc *sc = xsc;
sc 2796 dev/ic/dc.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 2802 dev/ic/dc.c mii = &sc->sc_mii;
sc 2807 dev/ic/dc.c dc_stop(sc);
sc 2808 dev/ic/dc.c dc_reset(sc);
sc 2813 dev/ic/dc.c if (DC_IS_ASIX(sc) || DC_IS_DAVICOM(sc))
sc 2814 dev/ic/dc.c CSR_WRITE_4(sc, DC_BUSCTL, 0);
sc 2816 dev/ic/dc.c CSR_WRITE_4(sc, DC_BUSCTL, DC_BUSCTL_MRME|DC_BUSCTL_MRLE);
sc 2820 dev/ic/dc.c if (DC_IS_INTEL(sc))
sc 2821 dev/ic/dc.c DC_SETBIT(sc, DC_BUSCTL, DC_BUSCTL_ARBITRATION);
sc 2822 dev/ic/dc.c if (DC_IS_DAVICOM(sc) || DC_IS_INTEL(sc)) {
sc 2823 dev/ic/dc.c DC_SETBIT(sc, DC_BUSCTL, DC_BURSTLEN_USECA);
sc 2825 dev/ic/dc.c DC_SETBIT(sc, DC_BUSCTL, DC_BURSTLEN_16LONG);
sc 2827 dev/ic/dc.c if (sc->dc_flags & DC_TX_POLL)
sc 2828 dev/ic/dc.c DC_SETBIT(sc, DC_BUSCTL, DC_TXPOLL_1);
sc 2829 dev/ic/dc.c switch(sc->dc_cachesize) {
sc 2831 dev/ic/dc.c DC_SETBIT(sc, DC_BUSCTL, DC_CACHEALIGN_32LONG);
sc 2834 dev/ic/dc.c DC_SETBIT(sc, DC_BUSCTL, DC_CACHEALIGN_16LONG);
sc 2837 dev/ic/dc.c DC_SETBIT(sc, DC_BUSCTL, DC_CACHEALIGN_8LONG);
sc 2841 dev/ic/dc.c DC_SETBIT(sc, DC_BUSCTL, DC_CACHEALIGN_NONE);
sc 2845 dev/ic/dc.c if (sc->dc_flags & DC_TX_STORENFWD)
sc 2846 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_STORENFWD);
sc 2848 dev/ic/dc.c if (sc->dc_txthresh > DC_TXTHRESH_MAX) {
sc 2849 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_STORENFWD);
sc 2851 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_STORENFWD);
sc 2852 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, sc->dc_txthresh);
sc 2856 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_NO_RXCRC);
sc 2857 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_TX_BACKOFF);
sc 2859 dev/ic/dc.c if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) {
sc 2868 dev/ic/dc.c DC_CLRBIT(sc, DC_MX_MAGICPACKET, 0xFFFF0000);
sc 2869 dev/ic/dc.c if (sc->dc_type == DC_TYPE_98713)
sc 2870 dev/ic/dc.c DC_SETBIT(sc, DC_MX_MAGICPACKET, DC_MX_MAGIC_98713);
sc 2872 dev/ic/dc.c DC_SETBIT(sc, DC_MX_MAGICPACKET, DC_MX_MAGIC_98715);
sc 2875 dev/ic/dc.c if (DC_IS_XIRCOM(sc)) {
sc 2876 dev/ic/dc.c CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_WRITE_EN | DC_SIAGP_INT1_EN |
sc 2879 dev/ic/dc.c CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_INT1_EN |
sc 2884 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_TX_THRESH);
sc 2885 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_TXTHRESH_MIN);
sc 2888 dev/ic/dc.c if (dc_list_rx_init(sc) == ENOBUFS) {
sc 2890 dev/ic/dc.c "memory for rx buffers\n", sc->sc_dev.dv_xname);
sc 2891 dev/ic/dc.c dc_stop(sc);
sc 2899 dev/ic/dc.c dc_list_tx_init(sc);
sc 2904 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 2905 dev/ic/dc.c 0, sc->sc_listmap->dm_mapsize,
sc 2911 dev/ic/dc.c CSR_WRITE_4(sc, DC_RXADDR, sc->sc_listmap->dm_segs[0].ds_addr +
sc 2913 dev/ic/dc.c CSR_WRITE_4(sc, DC_TXADDR, sc->sc_listmap->dm_segs[0].ds_addr +
sc 2919 dev/ic/dc.c CSR_WRITE_4(sc, DC_IMR, DC_INTRS);
sc 2920 dev/ic/dc.c CSR_WRITE_4(sc, DC_ISR, 0xFFFFFFFF);
sc 2923 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_TX_ON);
sc 2930 dev/ic/dc.c if (sc->dc_flags & DC_TULIP_LEDS) {
sc 2931 dev/ic/dc.c CSR_WRITE_4(sc, DC_WATCHDOG,
sc 2933 dev/ic/dc.c CSR_WRITE_4(sc, DC_WATCHDOG, 0);
sc 2942 dev/ic/dc.c dc_setfilt(sc);
sc 2945 dev/ic/dc.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_RX_ON);
sc 2946 dev/ic/dc.c CSR_WRITE_4(sc, DC_RXSTART, 0xFFFFFFFF);
sc 2949 dev/ic/dc.c dc_setcfg(sc, sc->dc_if_media);
sc 2956 dev/ic/dc.c timeout_set(&sc->dc_tick_tmo, dc_tick, sc);
sc 2959 dev/ic/dc.c sc->dc_link = 1;
sc 2961 dev/ic/dc.c if (sc->dc_flags & DC_21143_NWAY)
sc 2962 dev/ic/dc.c timeout_add(&sc->dc_tick_tmo, hz / 10);
sc 2964 dev/ic/dc.c timeout_add(&sc->dc_tick_tmo, hz);
sc 2968 dev/ic/dc.c if(sc->dc_srm_media) {
sc 2971 dev/ic/dc.c ifr.ifr_media = sc->dc_srm_media;
sc 2973 dev/ic/dc.c sc->dc_srm_media = 0;
sc 2985 dev/ic/dc.c struct dc_softc *sc;
sc 2989 dev/ic/dc.c sc = ifp->if_softc;
sc 2990 dev/ic/dc.c mii = &sc->sc_mii;
sc 2995 dev/ic/dc.c if (DC_IS_DAVICOM(sc) &&
sc 2997 dev/ic/dc.c dc_setcfg(sc, ifm->ifm_media);
sc 2999 dev/ic/dc.c sc->dc_link = 0;
sc 3012 dev/ic/dc.c struct dc_softc *sc;
sc 3016 dev/ic/dc.c sc = ifp->if_softc;
sc 3017 dev/ic/dc.c mii = &sc->sc_mii;
sc 3020 dev/ic/dc.c if (DC_IS_DAVICOM(sc)) {
sc 3037 dev/ic/dc.c struct dc_softc *sc = ifp->if_softc;
sc 3045 dev/ic/dc.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, command, data)) > 0) {
sc 3054 dev/ic/dc.c dc_init(sc);
sc 3057 dev/ic/dc.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 3063 dev/ic/dc.c (ifp->if_flags ^ sc->dc_if_flags) &
sc 3065 dev/ic/dc.c dc_setfilt(sc);
sc 3068 dev/ic/dc.c sc->dc_txthresh = 0;
sc 3069 dev/ic/dc.c dc_init(sc);
sc 3074 dev/ic/dc.c dc_stop(sc);
sc 3076 dev/ic/dc.c sc->dc_if_flags = ifp->if_flags;
sc 3088 dev/ic/dc.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 3089 dev/ic/dc.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 3097 dev/ic/dc.c dc_setfilt(sc);
sc 3103 dev/ic/dc.c mii = &sc->sc_mii;
sc 3106 dev/ic/dc.c if (sc->dc_srm_media)
sc 3107 dev/ic/dc.c sc->dc_srm_media = 0;
sc 3124 dev/ic/dc.c struct dc_softc *sc;
sc 3126 dev/ic/dc.c sc = ifp->if_softc;
sc 3129 dev/ic/dc.c printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
sc 3131 dev/ic/dc.c dc_stop(sc);
sc 3132 dev/ic/dc.c dc_reset(sc);
sc 3133 dev/ic/dc.c dc_init(sc);
sc 3144 dev/ic/dc.c dc_stop(sc)
sc 3145 dev/ic/dc.c struct dc_softc *sc;
sc 3150 dev/ic/dc.c ifp = &sc->sc_arpcom.ac_if;
sc 3153 dev/ic/dc.c timeout_del(&sc->dc_tick_tmo);
sc 3157 dev/ic/dc.c DC_CLRBIT(sc, DC_NETCFG, (DC_NETCFG_RX_ON|DC_NETCFG_TX_ON));
sc 3158 dev/ic/dc.c CSR_WRITE_4(sc, DC_IMR, 0x00000000);
sc 3159 dev/ic/dc.c CSR_WRITE_4(sc, DC_TXADDR, 0x00000000);
sc 3160 dev/ic/dc.c CSR_WRITE_4(sc, DC_RXADDR, 0x00000000);
sc 3161 dev/ic/dc.c sc->dc_link = 0;
sc 3167 dev/ic/dc.c if (sc->dc_cdata.dc_rx_chain[i].sd_map->dm_nsegs != 0) {
sc 3168 dev/ic/dc.c bus_dmamap_t map = sc->dc_cdata.dc_rx_chain[i].sd_map;
sc 3170 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 3172 dev/ic/dc.c bus_dmamap_unload(sc->sc_dmat, map);
sc 3174 dev/ic/dc.c if (sc->dc_cdata.dc_rx_chain[i].sd_mbuf != NULL) {
sc 3175 dev/ic/dc.c m_freem(sc->dc_cdata.dc_rx_chain[i].sd_mbuf);
sc 3176 dev/ic/dc.c sc->dc_cdata.dc_rx_chain[i].sd_mbuf = NULL;
sc 3179 dev/ic/dc.c bzero((char *)&sc->dc_ldata->dc_rx_list,
sc 3180 dev/ic/dc.c sizeof(sc->dc_ldata->dc_rx_list));
sc 3186 dev/ic/dc.c if (sc->dc_cdata.dc_tx_chain[i].sd_map->dm_nsegs != 0) {
sc 3187 dev/ic/dc.c bus_dmamap_t map = sc->dc_cdata.dc_tx_chain[i].sd_map;
sc 3189 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 3191 dev/ic/dc.c bus_dmamap_unload(sc->sc_dmat, map);
sc 3193 dev/ic/dc.c if (sc->dc_cdata.dc_tx_chain[i].sd_mbuf != NULL) {
sc 3194 dev/ic/dc.c if (sc->dc_ldata->dc_tx_list[i].dc_ctl &
sc 3196 dev/ic/dc.c sc->dc_cdata.dc_tx_chain[i].sd_mbuf = NULL;
sc 3199 dev/ic/dc.c m_freem(sc->dc_cdata.dc_tx_chain[i].sd_mbuf);
sc 3200 dev/ic/dc.c sc->dc_cdata.dc_tx_chain[i].sd_mbuf = NULL;
sc 3203 dev/ic/dc.c bzero((char *)&sc->dc_ldata->dc_tx_list,
sc 3204 dev/ic/dc.c sizeof(sc->dc_ldata->dc_tx_list));
sc 3206 dev/ic/dc.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 3207 dev/ic/dc.c 0, sc->sc_listmap->dm_mapsize,
sc 3219 dev/ic/dc.c struct dc_softc *sc = (struct dc_softc *)v;
sc 3221 dev/ic/dc.c dc_stop(sc);
sc 3229 dev/ic/dc.c struct dc_softc *sc = arg;
sc 3235 dev/ic/dc.c dc_stop(sc);
sc 3237 dev/ic/dc.c ifp = &sc->sc_arpcom.ac_if;
sc 3239 dev/ic/dc.c dc_init(sc);
sc 657 dev/ic/dcreg.h #define DC_PN_GPIO_SETBIT(sc, r) \
sc 658 dev/ic/dcreg.h DC_SETBIT(sc, DC_PN_GPIO, ((r) | (r << 4)))
sc 659 dev/ic/dcreg.h #define DC_PN_GPIO_CLRBIT(sc, r) \
sc 661 dev/ic/dcreg.h DC_SETBIT(sc, DC_PN_GPIO, ((r) << 4)); \
sc 662 dev/ic/dcreg.h DC_CLRBIT(sc, DC_PN_GPIO, (r)); \
sc 779 dev/ic/dcreg.h #define CSR_WRITE_4(sc, reg, val) \
sc 780 dev/ic/dcreg.h bus_space_write_4(sc->dc_btag, sc->dc_bhandle, reg, val)
sc 782 dev/ic/dcreg.h #define CSR_READ_4(sc, reg) \
sc 783 dev/ic/dcreg.h bus_space_read_4(sc->dc_btag, sc->dc_bhandle, reg)
sc 112 dev/ic/dl10019.c dl10019_mii_reset(struct dp8390_softc *sc)
sc 114 dev/ic/dl10019.c struct ne2000_softc *nsc = (void *) sc;
sc 121 dev/ic/dl10019.c bus_space_write_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO,
sc 124 dev/ic/dl10019.c bus_space_write_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO,
sc 128 dev/ic/dl10019.c bus_space_write_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO, 0x00);
sc 132 dev/ic/dl10019.c dl10019_media_init(struct dp8390_softc *sc)
sc 134 dev/ic/dl10019.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 136 dev/ic/dl10019.c sc->sc_mii.mii_ifp = ifp;
sc 137 dev/ic/dl10019.c sc->sc_mii.mii_readreg = dl10019_mii_readreg;
sc 138 dev/ic/dl10019.c sc->sc_mii.mii_writereg = dl10019_mii_writereg;
sc 139 dev/ic/dl10019.c sc->sc_mii.mii_statchg = dl10019_mii_statchg;
sc 140 dev/ic/dl10019.c ifmedia_init(&sc->sc_mii.mii_media, 0, dp8390_mediachange,
sc 143 dev/ic/dl10019.c dl10019_mii_reset(sc);
sc 145 dev/ic/dl10019.c mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
sc 148 dev/ic/dl10019.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 149 dev/ic/dl10019.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
sc 150 dev/ic/dl10019.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
sc 152 dev/ic/dl10019.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 156 dev/ic/dl10019.c dl10019_media_fini(struct dp8390_softc *sc)
sc 158 dev/ic/dl10019.c mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
sc 162 dev/ic/dl10019.c dl10019_mediachange(struct dp8390_softc *sc)
sc 164 dev/ic/dl10019.c mii_mediachg(&sc->sc_mii);
sc 169 dev/ic/dl10019.c dl10019_mediastatus(struct dp8390_softc *sc, struct ifmediareq *ifmr)
sc 171 dev/ic/dl10019.c mii_pollstat(&sc->sc_mii);
sc 172 dev/ic/dl10019.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 173 dev/ic/dl10019.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 177 dev/ic/dl10019.c dl10019_init_card(struct dp8390_softc *sc)
sc 179 dev/ic/dl10019.c dl10019_mii_reset(sc);
sc 180 dev/ic/dl10019.c mii_mediachg(&sc->sc_mii);
sc 184 dev/ic/dl10019.c dl10019_stop_card(struct dp8390_softc *sc)
sc 186 dev/ic/dl10019.c mii_down(&sc->sc_mii);
sc 192 dev/ic/dl10019.c struct dp8390_softc *sc = (void *) self;
sc 195 dev/ic/dl10019.c return (bus_space_read_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO) &
sc 202 dev/ic/dl10019.c struct dp8390_softc *sc = (void *) self;
sc 206 dev/ic/dl10019.c gpio = bus_space_read_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO);
sc 207 dev/ic/dl10019.c bus_space_write_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO,
sc 238 dev/ic/dl10019.c struct dp8390_softc *sc = (void *) self;
sc 248 dev/ic/dl10019.c if (sc->sc_mii.mii_media_active & IFM_FDX)
sc 252 dev/ic/dl10019.c bus_space_write_1(sc->sc_regt, sc->sc_regh,
sc 76 dev/ic/dp8390.c dp8390_media_init(struct dp8390_softc *sc)
sc 78 dev/ic/dp8390.c ifmedia_init(&sc->sc_media, 0, dp8390_mediachange, dp8390_mediastatus);
sc 79 dev/ic/dp8390.c ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL);
sc 80 dev/ic/dp8390.c ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
sc 87 dev/ic/dp8390.c dp8390_config(struct dp8390_softc *sc)
sc 89 dev/ic/dp8390.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 94 dev/ic/dp8390.c if (!sc->test_mem)
sc 95 dev/ic/dp8390.c sc->test_mem = dp8390_test_mem;
sc 98 dev/ic/dp8390.c if ((sc->mem_size < 16384) ||
sc 99 dev/ic/dp8390.c (sc->sc_flags & DP8390_NO_MULTI_BUFFERING))
sc 100 dev/ic/dp8390.c sc->txb_cnt = 1;
sc 101 dev/ic/dp8390.c else if (sc->mem_size < 8192 * 3)
sc 102 dev/ic/dp8390.c sc->txb_cnt = 2;
sc 104 dev/ic/dp8390.c sc->txb_cnt = 3;
sc 106 dev/ic/dp8390.c sc->tx_page_start = sc->mem_start >> ED_PAGE_SHIFT;
sc 107 dev/ic/dp8390.c sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
sc 108 dev/ic/dp8390.c sc->rec_page_stop = sc->tx_page_start + (sc->mem_size >> ED_PAGE_SHIFT);
sc 109 dev/ic/dp8390.c sc->mem_ring = sc->mem_start + (sc->rec_page_start << ED_PAGE_SHIFT);
sc 110 dev/ic/dp8390.c sc->mem_end = sc->mem_start + sc->mem_size;
sc 113 dev/ic/dp8390.c if ((*sc->test_mem)(sc))
sc 117 dev/ic/dp8390.c dp8390_stop(sc);
sc 120 dev/ic/dp8390.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 121 dev/ic/dp8390.c ifp->if_softc = sc;
sc 133 dev/ic/dp8390.c printf(", address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 136 dev/ic/dp8390.c (*sc->sc_media_init)(sc);
sc 153 dev/ic/dp8390.c struct dp8390_softc *sc = ifp->if_softc;
sc 155 dev/ic/dp8390.c if (sc->sc_mediachange)
sc 156 dev/ic/dp8390.c return ((*sc->sc_mediachange)(sc));
sc 167 dev/ic/dp8390.c struct dp8390_softc *sc = ifp->if_softc;
sc 169 dev/ic/dp8390.c if (sc->sc_enabled == 0) {
sc 175 dev/ic/dp8390.c if (sc->sc_mediastatus)
sc 176 dev/ic/dp8390.c (*sc->sc_mediastatus)(sc, ifmr);
sc 183 dev/ic/dp8390.c dp8390_reset(struct dp8390_softc *sc)
sc 188 dev/ic/dp8390.c dp8390_stop(sc);
sc 189 dev/ic/dp8390.c dp8390_init(sc);
sc 197 dev/ic/dp8390.c dp8390_stop(struct dp8390_softc *sc)
sc 199 dev/ic/dp8390.c bus_space_tag_t regt = sc->sc_regt;
sc 200 dev/ic/dp8390.c bus_space_handle_t regh = sc->sc_regh;
sc 206 dev/ic/dp8390.c sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STP);
sc 218 dev/ic/dp8390.c if (sc->stop_card != NULL)
sc 219 dev/ic/dp8390.c (*sc->stop_card)(sc);
sc 230 dev/ic/dp8390.c struct dp8390_softc *sc = ifp->if_softc;
sc 232 dev/ic/dp8390.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 233 dev/ic/dp8390.c ++sc->sc_arpcom.ac_if.if_oerrors;
sc 235 dev/ic/dp8390.c dp8390_reset(sc);
sc 242 dev/ic/dp8390.c dp8390_init(struct dp8390_softc *sc)
sc 244 dev/ic/dp8390.c bus_space_tag_t regt = sc->sc_regt;
sc 245 dev/ic/dp8390.c bus_space_handle_t regh = sc->sc_regh;
sc 246 dev/ic/dp8390.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 259 dev/ic/dp8390.c sc->txb_inuse = 0;
sc 260 dev/ic/dp8390.c sc->txb_new = 0;
sc 261 dev/ic/dp8390.c sc->txb_next_tx = 0;
sc 266 dev/ic/dp8390.c sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STP);
sc 269 dev/ic/dp8390.c if (sc->dcr_reg & ED_DCR_LS) {
sc 270 dev/ic/dp8390.c NIC_PUT(regt, regh, ED_P0_DCR, sc->dcr_reg);
sc 284 dev/ic/dp8390.c NIC_PUT(regt, regh, ED_P0_RCR, ED_RCR_MON | sc->rcr_proto);
sc 290 dev/ic/dp8390.c if (sc->is790)
sc 294 dev/ic/dp8390.c NIC_PUT(regt, regh, ED_P0_BNRY, sc->rec_page_start);
sc 295 dev/ic/dp8390.c NIC_PUT(regt, regh, ED_P0_PSTART, sc->rec_page_start);
sc 296 dev/ic/dp8390.c NIC_PUT(regt, regh, ED_P0_PSTOP, sc->rec_page_stop);
sc 317 dev/ic/dp8390.c sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
sc 323 dev/ic/dp8390.c sc->sc_arpcom.ac_enaddr[i]);
sc 326 dev/ic/dp8390.c dp8390_getmcaf(&sc->sc_arpcom, mcaf);
sc 334 dev/ic/dp8390.c sc->next_packet = sc->rec_page_start + 1;
sc 335 dev/ic/dp8390.c NIC_PUT(regt, regh, ED_P1_CURR, sc->next_packet);
sc 340 dev/ic/dp8390.c sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STP);
sc 344 dev/ic/dp8390.c i = ED_RCR_AB | ED_RCR_AM | sc->rcr_proto;
sc 358 dev/ic/dp8390.c if (sc->init_card)
sc 359 dev/ic/dp8390.c (*sc->init_card)(sc);
sc 364 dev/ic/dp8390.c sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STA);
sc 378 dev/ic/dp8390.c dp8390_xmit(struct dp8390_softc *sc)
sc 380 dev/ic/dp8390.c bus_space_tag_t regt = sc->sc_regt;
sc 381 dev/ic/dp8390.c bus_space_handle_t regh = sc->sc_regh;
sc 382 dev/ic/dp8390.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 386 dev/ic/dp8390.c if ((sc->txb_next_tx + sc->txb_inuse) % sc->txb_cnt != sc->txb_new)
sc 388 dev/ic/dp8390.c sc->txb_next_tx, sc->txb_inuse, sc->txb_cnt, sc->txb_new);
sc 390 dev/ic/dp8390.c if (sc->txb_inuse == 0)
sc 394 dev/ic/dp8390.c len = sc->txb_len[sc->txb_next_tx];
sc 399 dev/ic/dp8390.c sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STA);
sc 403 dev/ic/dp8390.c NIC_PUT(regt, regh, ED_P0_TPSR, sc->tx_page_start +
sc 404 dev/ic/dp8390.c sc->txb_next_tx * ED_TXBUF_SIZE);
sc 413 dev/ic/dp8390.c sc->cr_proto | ED_CR_PAGE_0 | ED_CR_TXP | ED_CR_STA);
sc 416 dev/ic/dp8390.c if (++sc->txb_next_tx == sc->txb_cnt)
sc 417 dev/ic/dp8390.c sc->txb_next_tx = 0;
sc 435 dev/ic/dp8390.c struct dp8390_softc *sc = ifp->if_softc;
sc 445 dev/ic/dp8390.c if (sc->txb_inuse == sc->txb_cnt) {
sc 465 dev/ic/dp8390.c buffer = sc->mem_start +
sc 466 dev/ic/dp8390.c ((sc->txb_new * ED_TXBUF_SIZE) << ED_PAGE_SHIFT);
sc 468 dev/ic/dp8390.c if (sc->write_mbuf)
sc 469 dev/ic/dp8390.c len = (*sc->write_mbuf)(sc, m0, buffer);
sc 471 dev/ic/dp8390.c len = dp8390_write_mbuf(sc, m0, buffer);
sc 474 dev/ic/dp8390.c sc->txb_len[sc->txb_new] = max(len, ETHER_MIN_LEN - ETHER_CRC_LEN);
sc 477 dev/ic/dp8390.c if (++sc->txb_new == sc->txb_cnt)
sc 478 dev/ic/dp8390.c sc->txb_new = 0;
sc 481 dev/ic/dp8390.c if (sc->txb_inuse++ == 0)
sc 482 dev/ic/dp8390.c dp8390_xmit(sc);
sc 492 dev/ic/dp8390.c dp8390_rint(struct dp8390_softc *sc)
sc 494 dev/ic/dp8390.c bus_space_tag_t regt = sc->sc_regt;
sc 495 dev/ic/dp8390.c bus_space_handle_t regh = sc->sc_regh;
sc 506 dev/ic/dp8390.c sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
sc 518 dev/ic/dp8390.c if (sc->next_packet == current)
sc 524 dev/ic/dp8390.c sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STA);
sc 529 dev/ic/dp8390.c packet_ptr = sc->mem_ring +
sc 530 dev/ic/dp8390.c ((sc->next_packet - sc->rec_page_start) << ED_PAGE_SHIFT);
sc 532 dev/ic/dp8390.c if (sc->read_hdr)
sc 533 dev/ic/dp8390.c (*sc->read_hdr)(sc, packet_ptr, &packet_hdr);
sc 535 dev/ic/dp8390.c dp8390_read_hdr(sc, packet_ptr, &packet_hdr);
sc 546 dev/ic/dp8390.c if (packet_hdr.next_packet >= sc->next_packet)
sc 547 dev/ic/dp8390.c nlen = (packet_hdr.next_packet - sc->next_packet);
sc 549 dev/ic/dp8390.c nlen = ((packet_hdr.next_packet - sc->rec_page_start) +
sc 550 dev/ic/dp8390.c (sc->rec_page_stop - sc->next_packet));
sc 558 dev/ic/dp8390.c "next packet pointer\n", sc->sc_dev.dv_xname);
sc 561 dev/ic/dp8390.c sc->sc_dev.dv_xname, packet_hdr.count, len,
sc 562 dev/ic/dp8390.c sc->rec_page_start, sc->next_packet, current,
sc 563 dev/ic/dp8390.c packet_hdr.next_packet, sc->rec_page_stop);
sc 576 dev/ic/dp8390.c packet_hdr.next_packet >= sc->rec_page_start &&
sc 577 dev/ic/dp8390.c packet_hdr.next_packet < sc->rec_page_stop) {
sc 579 dev/ic/dp8390.c dp8390_read(sc,
sc 586 dev/ic/dp8390.c sc->sc_dev.dv_xname, len);
sc 587 dev/ic/dp8390.c ++sc->sc_arpcom.ac_if.if_ierrors;
sc 588 dev/ic/dp8390.c dp8390_reset(sc);
sc 593 dev/ic/dp8390.c sc->next_packet = packet_hdr.next_packet;
sc 599 dev/ic/dp8390.c boundary = sc->next_packet - 1;
sc 600 dev/ic/dp8390.c if (boundary < sc->rec_page_start)
sc 601 dev/ic/dp8390.c boundary = sc->rec_page_stop - 1;
sc 603 dev/ic/dp8390.c } while (sc->next_packet != current);
sc 612 dev/ic/dp8390.c struct dp8390_softc *sc = (struct dp8390_softc *)arg;
sc 613 dev/ic/dp8390.c bus_space_tag_t regt = sc->sc_regt;
sc 614 dev/ic/dp8390.c bus_space_handle_t regh = sc->sc_regh;
sc 615 dev/ic/dp8390.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 618 dev/ic/dp8390.c if (sc->sc_enabled == 0)
sc 624 dev/ic/dp8390.c sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STA);
sc 641 dev/ic/dp8390.c if ((sc->sc_flags & DP8390_DO_AX88190_WORKAROUND) != 0)
sc 656 dev/ic/dp8390.c sc->txb_inuse != 0) {
sc 719 dev/ic/dp8390.c if (--sc->txb_inuse != 0)
sc 720 dev/ic/dp8390.c dp8390_xmit(sc);
sc 739 dev/ic/dp8390.c sc->sc_dev.dv_xname);
sc 742 dev/ic/dp8390.c dp8390_reset(sc);
sc 754 dev/ic/dp8390.c sc->sc_dev.dv_xname,
sc 768 dev/ic/dp8390.c if (sc->recv_int)
sc 769 dev/ic/dp8390.c (*sc->recv_int)(sc);
sc 771 dev/ic/dp8390.c dp8390_rint(sc);
sc 790 dev/ic/dp8390.c sc->cr_proto | ED_CR_PAGE_0 | ED_CR_STA);
sc 816 dev/ic/dp8390.c struct dp8390_softc *sc = ifp->if_softc;
sc 826 dev/ic/dp8390.c if ((error = dp8390_enable(sc)) != 0)
sc 833 dev/ic/dp8390.c dp8390_init(sc);
sc 834 dev/ic/dp8390.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 838 dev/ic/dp8390.c dp8390_init(sc);
sc 858 dev/ic/dp8390.c dp8390_stop(sc);
sc 860 dev/ic/dp8390.c dp8390_disable(sc);
sc 867 dev/ic/dp8390.c if ((error = dp8390_enable(sc)) != 0)
sc 869 dev/ic/dp8390.c dp8390_init(sc);
sc 875 dev/ic/dp8390.c dp8390_stop(sc);
sc 876 dev/ic/dp8390.c dp8390_init(sc);
sc 882 dev/ic/dp8390.c if (sc->sc_enabled == 0) {
sc 889 dev/ic/dp8390.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 890 dev/ic/dp8390.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 898 dev/ic/dp8390.c dp8390_stop(sc); /* XXX for ds_setmcaf? */
sc 899 dev/ic/dp8390.c dp8390_init(sc);
sc 907 dev/ic/dp8390.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
sc 924 dev/ic/dp8390.c dp8390_read(struct dp8390_softc *sc, int buf, u_short len)
sc 926 dev/ic/dp8390.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 930 dev/ic/dp8390.c m = dp8390_get(sc, buf, len);
sc 1021 dev/ic/dp8390.c dp8390_get(struct dp8390_softc *sc, int src, u_short total_len)
sc 1023 dev/ic/dp8390.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1055 dev/ic/dp8390.c if (sc->ring_copy)
sc 1056 dev/ic/dp8390.c src = (*sc->ring_copy)(sc, src, mtod(m, caddr_t), len);
sc 1058 dev/ic/dp8390.c src = dp8390_ring_copy(sc, src, mtod(m, caddr_t), len);
sc 1087 dev/ic/dp8390.c dp8390_test_mem(struct dp8390_softc *sc)
sc 1089 dev/ic/dp8390.c bus_space_tag_t buft = sc->sc_buft;
sc 1090 dev/ic/dp8390.c bus_space_handle_t bufh = sc->sc_bufh;
sc 1093 dev/ic/dp8390.c bus_space_set_region_1(buft, bufh, sc->mem_start, 0, sc->mem_size);
sc 1095 dev/ic/dp8390.c for (i = 0; i < sc->mem_size; ++i) {
sc 1096 dev/ic/dp8390.c if (bus_space_read_1(buft, bufh, sc->mem_start + i)) {
sc 1098 dev/ic/dp8390.c "check configuration\n", (sc->mem_start + i));
sc 1110 dev/ic/dp8390.c dp8390_read_hdr(struct dp8390_softc *sc, int src, struct dp8390_ring *hdrp)
sc 1112 dev/ic/dp8390.c bus_space_tag_t buft = sc->sc_buft;
sc 1113 dev/ic/dp8390.c bus_space_handle_t bufh = sc->sc_bufh;
sc 1131 dev/ic/dp8390.c dp8390_ring_copy(struct dp8390_softc *sc, int src, caddr_t dst, u_short amount)
sc 1133 dev/ic/dp8390.c bus_space_tag_t buft = sc->sc_buft;
sc 1134 dev/ic/dp8390.c bus_space_handle_t bufh = sc->sc_bufh;
sc 1138 dev/ic/dp8390.c if (src + amount > sc->mem_end) {
sc 1139 dev/ic/dp8390.c tmp_amount = sc->mem_end - src;
sc 1145 dev/ic/dp8390.c src = sc->mem_ring;
sc 1160 dev/ic/dp8390.c dp8390_write_mbuf(struct dp8390_softc *sc, struct mbuf *m, int buf)
sc 1162 dev/ic/dp8390.c bus_space_tag_t buft = sc->sc_buft;
sc 1163 dev/ic/dp8390.c bus_space_handle_t bufh = sc->sc_bufh;
sc 1184 dev/ic/dp8390.c dp8390_enable(struct dp8390_softc *sc)
sc 1187 dev/ic/dp8390.c if (sc->sc_enabled == 0 && sc->sc_enable != NULL) {
sc 1188 dev/ic/dp8390.c if ((*sc->sc_enable)(sc) != 0) {
sc 1190 dev/ic/dp8390.c sc->sc_dev.dv_xname);
sc 1195 dev/ic/dp8390.c sc->sc_enabled = 1;
sc 1203 dev/ic/dp8390.c dp8390_disable(struct dp8390_softc *sc)
sc 1205 dev/ic/dp8390.c if (sc->sc_enabled != 0 && sc->sc_disable != NULL) {
sc 1206 dev/ic/dp8390.c (*sc->sc_disable)(sc);
sc 1207 dev/ic/dp8390.c sc->sc_enabled = 0;
sc 1212 dev/ic/dp8390.c dp8390_detach(struct dp8390_softc *sc, int flags)
sc 1214 dev/ic/dp8390.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1217 dev/ic/dp8390.c dp8390_disable(sc);
sc 1219 dev/ic/dp8390.c if (sc->sc_media_fini != NULL)
sc 1220 dev/ic/dp8390.c (*sc->sc_media_fini)(sc);
sc 1223 dev/ic/dp8390.c ifmedia_delete_instance(&sc->sc_media, IFM_INST_ANY);
sc 148 dev/ic/dp8390var.h ((sc)->sc_reg_map[reg]))
sc 150 dev/ic/dp8390var.h ((sc)->sc_reg_map[reg]), (val))
sc 89 dev/ic/dp857xreg.h u_int dp857x_read(void *sc, u_int reg);
sc 90 dev/ic/dp857xreg.h void dp857x_write(void *sc, u_int reg, u_int datum);
sc 96 dev/ic/dp857xreg.h #define DP857X_GETTOD(sc, regs) \
sc 101 dev/ic/dp857xreg.h dp857x_write(sc, MAIN_STATUS, 0); \
sc 106 dev/ic/dp857xreg.h (*regs)[i] = dp857x_read(sc, i); \
sc 107 dev/ic/dp857xreg.h } while(dp857x_read(sc, PERIODIC_FLAGS) & 7); \
sc 114 dev/ic/dp857xreg.h #define DP857X_PUTTOD(sc, regs) \
sc 119 dev/ic/dp857xreg.h dp857x_write(sc, MAIN_STATUS, 0x40); \
sc 120 dev/ic/dp857xreg.h dp857x_write(sc, REAL_TIME_MODE, \
sc 121 dev/ic/dp857xreg.h dp857x_read(sc, REAL_TIME_MODE) & 0xF7); \
sc 125 dev/ic/dp857xreg.h dp857x_write(sc, i, (*regs)[i]); \
sc 128 dev/ic/dp857xreg.h dp857x_write(sc, REAL_TIME_MODE, \
sc 129 dev/ic/dp857xreg.h dp857x_read(sc, REAL_TIME_MODE) | 0x08); \
sc 158 dev/ic/dpt.c struct dpt_softc *sc;
sc 164 dev/ic/dpt.c sc = xxx_sc;
sc 165 dev/ic/dpt.c sp = sc->sc_statpack;
sc 170 dev/ic/dpt.c sc->sc_dv.dv_xname, dpt_inb(sc, HA_STATUS),
sc 171 dev/ic/dpt.c dpt_inb(sc, HA_AUX_STATUS));
sc 173 dev/ic/dpt.c (void) dpt_inb(sc, HA_STATUS);
sc 181 dev/ic/dpt.c if ((dpt_inb(sc, HA_AUX_STATUS) & HA_AUX_INTR) == 0)
sc 182 dev/ic/dpt.c printf("%s: spurious intr\n", sc->sc_dv.dv_xname);
sc 197 dev/ic/dpt.c if ((dpt_inb(sc, HA_AUX_STATUS) & HA_AUX_INTR) == 0) {
sc 205 dev/ic/dpt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_ccb, sc->sc_spoff,
sc 209 dev/ic/dpt.c more = dpt_inb(sc, HA_STATUS) & HA_ST_MORE;
sc 222 dev/ic/dpt.c sc->sc_dv.dv_xname);
sc 224 dev/ic/dpt.c if ((dpt_inb(sc, HA_AUX_STATUS) & HA_AUX_INTR) == 0)
sc 228 dev/ic/dpt.c sc->sc_dv.dv_xname);
sc 231 dev/ic/dpt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_ccb,
sc 232 dev/ic/dpt.c sc->sc_spoff, sizeof(struct eata_sp),
sc 237 dev/ic/dpt.c if (sp->sp_ccbid >= 0 && sp->sp_ccbid < sc->sc_nccbs) {
sc 239 dev/ic/dpt.c ccb = sc->sc_ccbs + sp->sp_ccbid;
sc 241 dev/ic/dpt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_ccb,
sc 242 dev/ic/dpt.c CCB_OFF(sc, ccb), sizeof(struct dpt_ccb),
sc 254 dev/ic/dpt.c more = dpt_inb(sc, HA_STATUS) & HA_ST_MORE;
sc 256 dev/ic/dpt.c dpt_done_ccb(sc, ccb);
sc 259 dev/ic/dpt.c sc->sc_dv.dv_xname, sp->sp_ccbid);
sc 263 dev/ic/dpt.c more = dpt_inb(sc, HA_STATUS) & HA_ST_MORE;
sc 279 dev/ic/dpt.c dpt_init(sc, intrstr)
sc 280 dev/ic/dpt.c struct dpt_softc *sc;
sc 289 dev/ic/dpt.c ec = &sc->sc_ec;
sc 292 dev/ic/dpt.c sc->sc_nccbs = min(betoh16(*(int16_t *)ec->ec_queuedepth),
sc 294 dev/ic/dpt.c sc->sc_spoff = sc->sc_nccbs * sizeof(struct dpt_ccb);
sc 295 dev/ic/dpt.c sc->sc_scroff = sc->sc_spoff + sizeof(struct eata_sp);
sc 296 dev/ic/dpt.c sc->sc_scrlen = 256; /* XXX */
sc 297 dev/ic/dpt.c mapsize = sc->sc_nccbs * sizeof(struct dpt_ccb) + sc->sc_scrlen +
sc 300 dev/ic/dpt.c if ((error = bus_dmamem_alloc(sc->sc_dmat, mapsize, NBPG, 0,
sc 303 dev/ic/dpt.c sc->sc_dv.dv_xname, error);
sc 307 dev/ic/dpt.c if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, mapsize,
sc 308 dev/ic/dpt.c (caddr_t *)&sc->sc_ccbs, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
sc 310 dev/ic/dpt.c sc->sc_dv.dv_xname, error);
sc 314 dev/ic/dpt.c if ((error = bus_dmamap_create(sc->sc_dmat, mapsize, mapsize, 1, 0,
sc 315 dev/ic/dpt.c BUS_DMA_NOWAIT, &sc->sc_dmamap_ccb)) != 0) {
sc 317 dev/ic/dpt.c sc->sc_dv.dv_xname, error);
sc 321 dev/ic/dpt.c if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_ccb,
sc 322 dev/ic/dpt.c sc->sc_ccbs, mapsize, NULL, BUS_DMA_NOWAIT)) != 0) {
sc 324 dev/ic/dpt.c sc->sc_dv.dv_xname, error);
sc 328 dev/ic/dpt.c sc->sc_statpack = (struct eata_sp *)((caddr_t)sc->sc_ccbs +
sc 329 dev/ic/dpt.c sc->sc_spoff);
sc 330 dev/ic/dpt.c sc->sc_sppa = sc->sc_dmamap_ccb->dm_segs[0].ds_addr + sc->sc_spoff;
sc 331 dev/ic/dpt.c sc->sc_scr = (caddr_t)sc->sc_ccbs + sc->sc_scroff;
sc 332 dev/ic/dpt.c sc->sc_scrpa = sc->sc_dmamap_ccb->dm_segs[0].ds_addr + sc->sc_scroff;
sc 333 dev/ic/dpt.c sc->sc_statpack->sp_ccbid = -1;
sc 336 dev/ic/dpt.c TAILQ_INIT(&sc->sc_free_ccb);
sc 337 dev/ic/dpt.c i = dpt_create_ccbs(sc, sc->sc_ccbs, sc->sc_nccbs);
sc 340 dev/ic/dpt.c printf("%s: unable to create CCBs\n", sc->sc_dv.dv_xname);
sc 342 dev/ic/dpt.c } else if (i != sc->sc_nccbs) {
sc 343 dev/ic/dpt.c printf("%s: %d/%d CCBs created!\n", sc->sc_dv.dv_xname, i,
sc 344 dev/ic/dpt.c sc->sc_nccbs);
sc 345 dev/ic/dpt.c sc->sc_nccbs = i;
sc 349 dev/ic/dpt.c sc->sc_sdh = shutdownhook_establish(dpt_shutdown, sc);
sc 352 dev/ic/dpt.c dpt_hba_inquire(sc, &ei);
sc 377 dev/ic/dpt.c printf("%s: interrupting at %s\n", sc->sc_dv.dv_xname, intrstr);
sc 380 dev/ic/dpt.c sc->sc_dv.dv_xname, sc->sc_nccbs, ec->ec_maxchannel + 1);
sc 387 dev/ic/dpt.c if (dpt_cmd(sc, NULL, 0, CP_IMMEDIATE, CPI_BUS_RESET))
sc 388 dev/ic/dpt.c panic("%s: dpt_cmd failed", sc->sc_dv.dv_xname);
sc 393 dev/ic/dpt.c sc->sc_adapter.scsipi_cmd = dpt_scsi_cmd;
sc 394 dev/ic/dpt.c sc->sc_adapter.scsipi_minphys = dpt_minphys;
sc 397 dev/ic/dpt.c sc->sc_adapter.scsi_cmd = dpt_scsi_cmd;
sc 398 dev/ic/dpt.c sc->sc_adapter.scsi_minphys = dpt_minphys;
sc 408 dev/ic/dpt.c sc->sc_hbaid[i] = ec->ec_hba[3 - i];
sc 409 dev/ic/dpt.c link = &sc->sc_link[i];
sc 412 dev/ic/dpt.c link->scsipi_scsi.adapter_target = sc->sc_hbaid[i];
sc 419 dev/ic/dpt.c link->adapter_target = sc->sc_hbaid[i];
sc 424 dev/ic/dpt.c link->adapter = &sc->sc_adapter;
sc 425 dev/ic/dpt.c link->adapter_softc = sc;
sc 426 dev/ic/dpt.c link->openings = sc->sc_nccbs;
sc 427 dev/ic/dpt.c config_found(&sc->sc_dv, link, scsiprint);
sc 439 dev/ic/dpt.c struct dpt_softc *sc;
sc 441 dev/ic/dpt.c sc = xxx_sc;
sc 442 dev/ic/dpt.c printf("shutting down %s...", sc->sc_dv.dv_xname);
sc 443 dev/ic/dpt.c dpt_cmd(sc, NULL, 0, CP_IMMEDIATE, CPI_POWEROFF_WARN);
sc 452 dev/ic/dpt.c dpt_cmd(sc, cp, addr, eatacmd, icmd)
sc 453 dev/ic/dpt.c struct dpt_softc *sc;
sc 461 dev/ic/dpt.c if ((dpt_inb(sc, HA_AUX_STATUS) & HA_AUX_BUSY) == 0)
sc 469 dev/ic/dpt.c sc->sc_dv.dv_xname);
sc 476 dev/ic/dpt.c dpt_outb(sc, HA_DMA_BASE + 0, (u_int32_t)addr);
sc 477 dev/ic/dpt.c dpt_outb(sc, HA_DMA_BASE + 1, (u_int32_t)addr >> 8);
sc 478 dev/ic/dpt.c dpt_outb(sc, HA_DMA_BASE + 2, (u_int32_t)addr >> 16);
sc 479 dev/ic/dpt.c dpt_outb(sc, HA_DMA_BASE + 3, (u_int32_t)addr >> 24);
sc 484 dev/ic/dpt.c dpt_outb(sc, HA_ICMD_CODE2, 0);
sc 485 dev/ic/dpt.c dpt_outb(sc, HA_ICMD_CODE1, 0);
sc 487 dev/ic/dpt.c dpt_outb(sc, HA_ICMD, icmd);
sc 490 dev/ic/dpt.c dpt_outb(sc, HA_COMMAND, eatacmd);
sc 498 dev/ic/dpt.c dpt_wait(sc, mask, state, ms)
sc 499 dev/ic/dpt.c struct dpt_softc *sc;
sc 505 dev/ic/dpt.c if ((dpt_inb(sc, HA_STATUS) & mask) == state)
sc 520 dev/ic/dpt.c dpt_poll(sc, ccb)
sc 521 dev/ic/dpt.c struct dpt_softc *sc;
sc 535 dev/ic/dpt.c if ((dpt_inb(sc, HA_AUX_STATUS) & HA_AUX_INTR) != 0)
sc 536 dev/ic/dpt.c dpt_intr(sc);
sc 548 dev/ic/dpt.c dpt_readcfg(sc)
sc 549 dev/ic/dpt.c struct dpt_softc *sc;
sc 555 dev/ic/dpt.c ec = &sc->sc_ec;
sc 558 dev/ic/dpt.c dpt_outb(sc, HA_COMMAND, CP_RESET);
sc 562 dev/ic/dpt.c if ((dpt_inb(sc, HA_STATUS) & HA_ST_READY) != 0)
sc 569 dev/ic/dpt.c sc->sc_dv.dv_xname, dpt_inb(sc, HA_STATUS));
sc 573 dev/ic/dpt.c while((((stat = dpt_inb(sc, HA_STATUS))
sc 577 dev/ic/dpt.c || (dpt_wait(sc, HA_ST_BUSY, 0, 2000))) {
sc 579 dev/ic/dpt.c if((dpt_inb(sc, HA_ERROR) != 'D')
sc 580 dev/ic/dpt.c || (dpt_inb(sc, HA_ERROR + 1) != 'P')
sc 581 dev/ic/dpt.c || (dpt_inb(sc, HA_ERROR + 2) != 'T')) {
sc 582 dev/ic/dpt.c printf("%s: HBA not ready\n", sc->sc_dv.dv_xname);
sc 592 dev/ic/dpt.c dpt_outb(sc, HA_COMMAND, CP_PIO_GETCFG);
sc 598 dev/ic/dpt.c if (dpt_wait(sc, 0xFF, HA_ST_DATA_RDY, 2000)) {
sc 600 dev/ic/dpt.c sc->sc_dv.dv_xname, dpt_inb(sc, HA_STATUS));
sc 606 dev/ic/dpt.c *p++ = dpt_inw(sc, HA_DATA);
sc 620 dev/ic/dpt.c *p++ = dpt_inw(sc, HA_DATA);
sc 625 dev/ic/dpt.c dpt_inw(sc, HA_DATA);
sc 631 dev/ic/dpt.c if ((dpt_inb(sc, HA_STATUS) & HA_ST_ERROR) != 0) {
sc 632 dev/ic/dpt.c printf("%s: HBA error\n", sc->sc_dv.dv_xname);
sc 637 dev/ic/dpt.c printf("%s: ec_hba field invalid\n", sc->sc_dv.dv_xname);
sc 642 dev/ic/dpt.c printf("%s: EATA signature mismatch\n", sc->sc_dv.dv_xname);
sc 647 dev/ic/dpt.c printf("%s: DMA not supported\n", sc->sc_dv.dv_xname);
sc 671 dev/ic/dpt.c dpt_free_ccb(sc, ccb)
sc 672 dev/ic/dpt.c struct dpt_softc *sc;
sc 679 dev/ic/dpt.c TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, ccb_chain);
sc 683 dev/ic/dpt.c wakeup(&sc->sc_free_ccb);
sc 691 dev/ic/dpt.c dpt_init_ccb(sc, ccb)
sc 692 dev/ic/dpt.c struct dpt_softc *sc;
sc 698 dev/ic/dpt.c error = bus_dmamap_create(sc->sc_dmat, DPT_MAX_XFER, DPT_SG_SIZE,
sc 704 dev/ic/dpt.c sc->sc_dv.dv_xname, error);
sc 709 dev/ic/dpt.c ccb->ccb_ccbpa = sc->sc_dmamap_ccb->dm_segs[0].ds_addr +
sc 710 dev/ic/dpt.c CCB_OFF(sc, ccb);
sc 718 dev/ic/dpt.c dpt_create_ccbs(sc, ccbstore, count)
sc 719 dev/ic/dpt.c struct dpt_softc *sc;
sc 729 dev/ic/dpt.c if ((error = dpt_init_ccb(sc, ccb)) != 0) {
sc 731 dev/ic/dpt.c sc->sc_dv.dv_xname, error);
sc 735 dev/ic/dpt.c TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, ccb_chain);
sc 747 dev/ic/dpt.c dpt_alloc_ccb(sc, flg)
sc 748 dev/ic/dpt.c struct dpt_softc *sc;
sc 757 dev/ic/dpt.c ccb = TAILQ_FIRST(&sc->sc_free_ccb);
sc 759 dev/ic/dpt.c TAILQ_REMOVE(&sc->sc_free_ccb, ccb, ccb_chain);
sc 771 dev/ic/dpt.c tsleep(&sc->sc_free_ccb, PRIBIO, "dptccb", 0);
sc 785 dev/ic/dpt.c dpt_done_ccb(sc, ccb)
sc 786 dev/ic/dpt.c struct dpt_softc *sc;
sc 799 dev/ic/dpt.c dmat = sc->sc_dmat;
sc 822 dev/ic/dpt.c panic("%s: done ccb not allocated!", sc->sc_dv.dv_xname);
sc 838 dev/ic/dpt.c sc->sc_dv.dv_xname, ccb->ccb_hba_status);
sc 859 dev/ic/dpt.c sc->sc_dv.dv_xname, ccb->ccb_scsi_status);
sc 869 dev/ic/dpt.c dpt_free_ccb(sc, ccb);
sc 886 dev/ic/dpt.c if ((xs = TAILQ_FIRST(&sc->sc_queue)) != NULL)
sc 889 dev/ic/dpt.c if ((xs = LIST_FIRST(&sc->sc_queue)) != NULL)
sc 901 dev/ic/dpt.c dpt_enqueue(sc, xs, infront)
sc 902 dev/ic/dpt.c struct dpt_softc *sc;
sc 907 dev/ic/dpt.c if (infront || LIST_EMPTY(&sc->sc_queue)) {
sc 908 dev/ic/dpt.c if (LIST_EMPTY(&sc->sc_queue))
sc 909 dev/ic/dpt.c sc->sc_queuelast = xs;
sc 910 dev/ic/dpt.c LIST_INSERT_HEAD(&sc->sc_queue, xs, free_list);
sc 913 dev/ic/dpt.c LIST_INSERT_AFTER(sc->sc_queuelast, xs, free_list);
sc 914 dev/ic/dpt.c sc->sc_queuelast = xs;
sc 921 dev/ic/dpt.c dpt_dequeue(sc)
sc 922 dev/ic/dpt.c struct dpt_softc *sc;
sc 926 dev/ic/dpt.c xs = LIST_FIRST(&sc->sc_queue);
sc 929 dev/ic/dpt.c if (LIST_EMPTY(&sc->sc_queue))
sc 930 dev/ic/dpt.c sc->sc_queuelast = NULL;
sc 955 dev/ic/dpt.c struct dpt_softc *sc;
sc 969 dev/ic/dpt.c sc = sc_link->adapter_softc;
sc 970 dev/ic/dpt.c dmat = sc->sc_dmat;
sc 984 dev/ic/dpt.c if (xs == TAILQ_FIRST(&sc->sc_queue)) {
sc 985 dev/ic/dpt.c TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q);
sc 988 dev/ic/dpt.c if (xs == LIST_FIRST(&sc->sc_queue)) {
sc 989 dev/ic/dpt.c xs = dpt_dequeue(sc);
sc 1022 dev/ic/dpt.c if (TAILQ_FIRST(&sc->sc_queue) != NULL) {
sc 1025 dev/ic/dpt.c if (!LIST_EMPTY(&sc->sc_queue)) {
sc 1038 dev/ic/dpt.c TAILQ_INSERT_TAIL(&sc->sc_queue, xs, adapter_q);
sc 1039 dev/ic/dpt.c xs = TAILQ_FIRST(&sc->sc_queue);
sc 1040 dev/ic/dpt.c TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q);
sc 1043 dev/ic/dpt.c dpt_enqueue(sc, xs, 0);
sc 1044 dev/ic/dpt.c xs = dpt_dequeue(sc);
sc 1052 dev/ic/dpt.c if ((ccb = dpt_alloc_ccb(sc, flags)) == NULL) {
sc 1055 dev/ic/dpt.c if ((ccb = dpt_alloc_ccb(sc, xs->flags)) == NULL) {
sc 1069 dev/ic/dpt.c TAILQ_INSERT_HEAD(&sc->sc_queue, xs, adapter_q);
sc 1071 dev/ic/dpt.c TAILQ_INSERT_TAIL(&sc->sc_queue, xs, adapter_q);
sc 1074 dev/ic/dpt.c dpt_enqueue(sc, xs, fromqueue);
sc 1104 dev/ic/dpt.c cp->cp_stataddr = htobe32(sc->sc_sppa);
sc 1111 dev/ic/dpt.c cp->cp_interpret = (sc->sc_hbaid[sc_link->scsipi_scsi.channel] ==
sc 1117 dev/ic/dpt.c cp->cp_interpret = (sc->sc_hbaid[sc_link->scsibus] == sc_link->target);
sc 1126 dev/ic/dpt.c cp->cp_senseaddr = htobe32(sc->sc_dmamap_ccb->dm_segs[0].ds_addr +
sc 1127 dev/ic/dpt.c CCB_OFF(sc, ccb) + offsetof(struct dpt_ccb, ccb_sense));
sc 1160 dev/ic/dpt.c printf("%s: dpt_scsi_cmd: ", sc->sc_dv.dv_xname);
sc 1167 dev/ic/dpt.c dpt_free_ccb(sc, ccb);
sc 1192 dev/ic/dpt.c cp->cp_dataaddr = htobe32(CCB_OFF(sc, ccb) +
sc 1193 dev/ic/dpt.c sc->sc_dmamap_ccb->dm_segs[0].ds_addr +
sc 1205 dev/ic/dpt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_ccb, CCB_OFF(sc, ccb),
sc 1207 dev/ic/dpt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_ccb, sc->sc_spoff,
sc 1218 dev/ic/dpt.c if (dpt_cmd(sc, &ccb->ccb_eata_cp, ccb->ccb_ccbpa, CP_DMA_CMD, 0)) {
sc 1219 dev/ic/dpt.c printf("%s: dpt_cmd failed\n", sc->sc_dv.dv_xname);
sc 1220 dev/ic/dpt.c dpt_free_ccb(sc, ccb);
sc 1228 dev/ic/dpt.c if (dpt_poll(sc, ccb)) {
sc 1231 dev/ic/dpt.c if (dpt_poll(sc, ccb))
sc 1235 dev/ic/dpt.c dpt_done_ccb(sc, ccb);
sc 1254 dev/ic/dpt.c struct dpt_softc *sc;
sc 1261 dev/ic/dpt.c sc = sc_link->adapter_softc;
sc 1270 dev/ic/dpt.c dpt_inb(sc, HA_STATUS), dpt_inb(sc, HA_AUX_STATUS));
sc 1277 dev/ic/dpt.c dpt_outb(sc, HA_COMMAND, CP_RESET);
sc 1286 dev/ic/dpt.c if (dpt_cmd(sc, &ccb->ccb_eata_cp, ccb->ccb_ccbpa,
sc 1288 dev/ic/dpt.c printf("%s: dpt_cmd failed\n", sc->sc_dv.dv_xname);
sc 1324 dev/ic/dpt.c dpt_hba_inquire(sc, ei)
sc 1325 dev/ic/dpt.c struct dpt_softc *sc;
sc 1332 dev/ic/dpt.c *ei = (struct eata_inquiry_data *)sc->sc_scr;
sc 1333 dev/ic/dpt.c dmat = sc->sc_dmat;
sc 1336 dev/ic/dpt.c if ((ccb = dpt_alloc_ccb(sc, 0)) == NULL)
sc 1337 dev/ic/dpt.c panic("%s: no CCB for inquiry", sc->sc_dv.dv_xname);
sc 1345 dev/ic/dpt.c cp->cp_id = sc->sc_hbaid[0];
sc 1349 dev/ic/dpt.c cp->cp_stataddr = htobe32(sc->sc_sppa);
sc 1358 dev/ic/dpt.c cp->cp_dataaddr = htobe32(sc->sc_scrpa);
sc 1368 dev/ic/dpt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_ccb, CCB_OFF(sc, ccb),
sc 1370 dev/ic/dpt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_ccb, sc->sc_spoff,
sc 1372 dev/ic/dpt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_ccb, sc->sc_scroff,
sc 1376 dev/ic/dpt.c if (dpt_cmd(sc, &ccb->ccb_eata_cp, ccb->ccb_ccbpa, CP_DMA_CMD, 0))
sc 1377 dev/ic/dpt.c panic("%s: dpt_cmd failed", sc->sc_dv.dv_xname);
sc 1379 dev/ic/dpt.c if (dpt_poll(sc, ccb))
sc 1380 dev/ic/dpt.c panic("%s: inquiry timed out", sc->sc_dv.dv_xname);
sc 1385 dev/ic/dpt.c sc->sc_dv.dv_xname, ccb->ccb_hba_status,
sc 1389 dev/ic/dpt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_ccb, sc->sc_scroff,
sc 1391 dev/ic/dpt.c dpt_free_ccb(sc, ccb);
sc 35 dev/ic/dptvar.h #define CCB_OFF(sc,m) ((u_long)(m) - (u_long)((sc)->sc_ccbs))
sc 142 dev/ic/elink3.c void ep_vortex_probemedia(struct ep_softc *sc);
sc 143 dev/ic/elink3.c void ep_isa_probemedia(struct ep_softc *sc);
sc 177 dev/ic/elink3.c static inline void ep_reset_cmd(struct ep_softc *sc, u_int cmd,u_int arg);
sc 187 dev/ic/elink3.c ep_reset_cmd(sc, cmd, arg)
sc 188 dev/ic/elink3.c struct ep_softc *sc;
sc 191 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 192 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 245 dev/ic/elink3.c ep_w1_reg(sc, reg)
sc 246 dev/ic/elink3.c struct ep_softc *sc;
sc 249 dev/ic/elink3.c switch (sc->ep_chipset) {
sc 266 dev/ic/elink3.c epconfig(sc, chipset, enaddr)
sc 267 dev/ic/elink3.c struct ep_softc *sc;
sc 271 dev/ic/elink3.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 272 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 273 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 276 dev/ic/elink3.c sc->ep_chipset = chipset;
sc 290 dev/ic/elink3.c u_int16_t x = ep_read_eeprom(sc, i);
sc 292 dev/ic/elink3.c sc->sc_arpcom.ac_enaddr[(i << 1)] = x >> 8;
sc 293 dev/ic/elink3.c sc->sc_arpcom.ac_enaddr[(i << 1) + 1] = x;
sc 296 dev/ic/elink3.c bcopy(enaddr, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 299 dev/ic/elink3.c printf(" address %s", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 300 dev/ic/elink3.c if (sc->ep_flags & EP_FLAGS_MII)
sc 324 dev/ic/elink3.c sc->txashift = 0;
sc 328 dev/ic/elink3.c sc->txashift = 2;
sc 338 dev/ic/elink3.c timeout_set(&sc->sc_epmbuffill_tmo, epmbuffill, sc);
sc 346 dev/ic/elink3.c SET_TX_AVAIL_THRESH | (1600 >> sc->txashift));
sc 348 dev/ic/elink3.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 349 dev/ic/elink3.c ifp->if_softc = sc;
sc 368 dev/ic/elink3.c ifmedia_init(&sc->sc_mii.mii_media, 0, ep_media_change,
sc 370 dev/ic/elink3.c sc->sc_mii.mii_ifp = ifp;
sc 371 dev/ic/elink3.c sc->sc_mii.mii_readreg = ep_mii_readreg;
sc 372 dev/ic/elink3.c sc->sc_mii.mii_writereg = ep_mii_writereg;
sc 373 dev/ic/elink3.c sc->sc_mii.mii_statchg = ep_statchg;
sc 381 dev/ic/elink3.c if (sc->ep_chipset == EP_CHIPSET_UNKNOWN && sc->txashift) {
sc 384 dev/ic/elink3.c sc->sc_chipset = EP_CHIPSET_VORTEX;
sc 391 dev/ic/elink3.c switch (sc->ep_chipset) {
sc 393 dev/ic/elink3.c if (sc->ep_flags & EP_FLAGS_MII) {
sc 394 dev/ic/elink3.c ep_roadrunner_mii_enable(sc);
sc 405 dev/ic/elink3.c if (sc->ep_flags & EP_FLAGS_MII) {
sc 406 dev/ic/elink3.c mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
sc 408 dev/ic/elink3.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 409 dev/ic/elink3.c ifmedia_add(&sc->sc_mii.mii_media,
sc 411 dev/ic/elink3.c ifmedia_set(&sc->sc_mii.mii_media,
sc 414 dev/ic/elink3.c ifmedia_set(&sc->sc_mii.mii_media,
sc 424 dev/ic/elink3.c ep_vortex_probemedia(sc);
sc 430 dev/ic/elink3.c ep_isa_probemedia(sc);
sc 436 dev/ic/elink3.c sc->tx_start_thresh = 20; /* probably a good starting point. */
sc 438 dev/ic/elink3.c ep_reset_cmd(sc, EP_COMMAND, RX_RESET);
sc 439 dev/ic/elink3.c ep_reset_cmd(sc, EP_COMMAND, TX_RESET);
sc 446 dev/ic/elink3.c struct ep_softc *sc = (struct ep_softc *)self;
sc 447 dev/ic/elink3.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 449 dev/ic/elink3.c if (sc->ep_flags & EP_FLAGS_MII)
sc 450 dev/ic/elink3.c mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
sc 452 dev/ic/elink3.c ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
sc 471 dev/ic/elink3.c ep_isa_probemedia(sc)
sc 472 dev/ic/elink3.c struct ep_softc *sc;
sc 474 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 475 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 476 dev/ic/elink3.c struct ifmedia *ifm = &sc->sc_mii.mii_media;
sc 494 dev/ic/elink3.c sc->ep_connectors = conn;
sc 497 dev/ic/elink3.c if (epbusyeeprom(sc))
sc 501 dev/ic/elink3.c if (epbusyeeprom(sc))
sc 524 dev/ic/elink3.c ep_vortex_probemedia(sc)
sc 525 dev/ic/elink3.c struct ep_softc *sc;
sc 527 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 528 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 529 dev/ic/elink3.c struct ifmedia *ifm = &sc->sc_mii.mii_media;
sc 559 dev/ic/elink3.c sc->ep_connectors = conn;
sc 590 dev/ic/elink3.c epinit(sc)
sc 591 dev/ic/elink3.c register struct ep_softc *sc;
sc 593 dev/ic/elink3.c register struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 594 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 595 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 602 dev/ic/elink3.c epstop(sc);
sc 604 dev/ic/elink3.c if (sc->bustype != EP_BUS_PCI) {
sc 610 dev/ic/elink3.c if (sc->bustype == EP_BUS_PCMCIA) {
sc 617 dev/ic/elink3.c sc->sc_arpcom.ac_enaddr[i]);
sc 619 dev/ic/elink3.c if (sc->bustype == EP_BUS_PCI || sc->bustype == EP_BUS_EISA)
sc 627 dev/ic/elink3.c ep_reset_cmd(sc, EP_COMMAND, RX_RESET);
sc 628 dev/ic/elink3.c ep_reset_cmd(sc, EP_COMMAND, TX_RESET);
sc 632 dev/ic/elink3.c bus_space_read_1(iot, ioh, ep_w1_reg(sc, EP_W1_TX_STATUS));
sc 636 dev/ic/elink3.c SET_TX_AVAIL_THRESH | (1600 >> sc->txashift));
sc 638 dev/ic/elink3.c if (sc->ep_chipset == EP_CHIPSET_ROADRUNNER) {
sc 654 dev/ic/elink3.c if (sc->ep_flags & EP_FLAGS_MII) {
sc 655 dev/ic/elink3.c ep_roadrunner_mii_enable(sc);
sc 674 dev/ic/elink3.c epsetfilter(sc);
sc 675 dev/ic/elink3.c epsetmedia(sc, sc->sc_mii.mii_media.ifm_cur->ifm_data);
sc 680 dev/ic/elink3.c epmbuffill(sc);
sc 696 dev/ic/elink3.c epsetfilter(sc)
sc 697 dev/ic/elink3.c register struct ep_softc *sc;
sc 699 dev/ic/elink3.c register struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 702 dev/ic/elink3.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, EP_COMMAND, SET_RX_FILTER |
sc 713 dev/ic/elink3.c register struct ep_softc *sc = ifp->if_softc;
sc 715 dev/ic/elink3.c return epsetmedia(sc, sc->sc_mii.mii_media.ifm_cur->ifm_data);
sc 722 dev/ic/elink3.c ep_roadrunner_mii_enable(sc)
sc 723 dev/ic/elink3.c struct ep_softc *sc;
sc 725 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 726 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 734 dev/ic/elink3.c ep_reset_cmd(sc, EP_COMMAND, TX_RESET);
sc 735 dev/ic/elink3.c ep_reset_cmd(sc, EP_COMMAND, RX_RESET);
sc 749 dev/ic/elink3.c epsetmedia(sc, medium)
sc 750 dev/ic/elink3.c struct ep_softc *sc;
sc 753 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 754 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 784 dev/ic/elink3.c if (sc->ep_flags & EP_FLAGS_MII) {
sc 789 dev/ic/elink3.c if (sc->ep_chipset == EP_CHIPSET_ROADRUNNER) {
sc 810 dev/ic/elink3.c mii_mediachg(&sc->sc_mii);
sc 821 dev/ic/elink3.c (sc->bustype == EP_BUS_PCMCIA ? MEDIA_LED : 0)));
sc 847 dev/ic/elink3.c printf("%s unknown media 0x%x\n", sc->sc_dev.dv_xname, medium);
sc 856 dev/ic/elink3.c switch (sc->ep_chipset) {
sc 867 dev/ic/elink3.c sc->sc_dev.dv_xname, config0, config1);
sc 874 dev/ic/elink3.c sc->sc_dev.dv_xname, medium, config1);
sc 904 dev/ic/elink3.c register struct ep_softc *sc = ifp->if_softc;
sc 905 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 906 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 913 dev/ic/elink3.c if (sc->ep_flags & EP_FLAGS_MII) {
sc 914 dev/ic/elink3.c mii_pollstat(&sc->sc_mii);
sc 915 dev/ic/elink3.c req->ifm_active = sc->sc_mii.mii_media_active;
sc 916 dev/ic/elink3.c req->ifm_status = sc->sc_mii.mii_media_status;
sc 921 dev/ic/elink3.c req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media;
sc 923 dev/ic/elink3.c switch (sc->ep_chipset) {
sc 953 dev/ic/elink3.c ifp->if_xname, sc->ep_chipset);
sc 973 dev/ic/elink3.c register struct ep_softc *sc = ifp->if_softc;
sc 974 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 975 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1009 dev/ic/elink3.c if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, EP_W1_FREE_TX)) <
sc 1012 dev/ic/elink3.c SET_TX_AVAIL_THRESH | ((len + pad + 4) >> sc->txashift));
sc 1026 dev/ic/elink3.c ((len / 4 + sc->tx_start_thresh) /*>> sc->txashift*/));
sc 1039 dev/ic/elink3.c txreg = ep_w1_reg(sc, EP_W1_TX_PIO_WR_1);
sc 1043 dev/ic/elink3.c if (EP_IS_BUS_32(sc->bustype)) {
sc 1075 dev/ic/elink3.c if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, EP_W1_RX_STATUS)) &
sc 1086 dev/ic/elink3.c epread(sc);
sc 1092 dev/ic/elink3.c if (epstatus(sc)) {
sc 1096 dev/ic/elink3.c sc->sc_dev.dv_xname);
sc 1098 dev/ic/elink3.c epreset(sc);
sc 1114 dev/ic/elink3.c epstatus(sc)
sc 1115 dev/ic/elink3.c register struct ep_softc *sc;
sc 1117 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 1118 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1130 dev/ic/elink3.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 1131 dev/ic/elink3.c printf("%s: RX underrun\n", sc->sc_dev.dv_xname);
sc 1133 dev/ic/elink3.c epreset(sc);
sc 1139 dev/ic/elink3.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 1140 dev/ic/elink3.c printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname);
sc 1147 dev/ic/elink3.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 1148 dev/ic/elink3.c printf("%s: RX overrun\n", sc->sc_dev.dv_xname);
sc 1155 dev/ic/elink3.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 1156 dev/ic/elink3.c printf("%s: TX overrun\n", sc->sc_dev.dv_xname);
sc 1158 dev/ic/elink3.c epreset(sc);
sc 1167 dev/ic/elink3.c eptxstat(sc)
sc 1168 dev/ic/elink3.c register struct ep_softc *sc;
sc 1170 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 1171 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1179 dev/ic/elink3.c ep_w1_reg(sc, EP_W1_TX_STATUS))) & TXS_COMPLETE) {
sc 1180 dev/ic/elink3.c bus_space_write_1(iot, ioh, ep_w1_reg(sc, EP_W1_TX_STATUS),
sc 1184 dev/ic/elink3.c ++sc->sc_arpcom.ac_if.if_oerrors;
sc 1186 dev/ic/elink3.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 1188 dev/ic/elink3.c sc->sc_dev.dv_xname, i);
sc 1190 dev/ic/elink3.c epreset(sc);
sc 1192 dev/ic/elink3.c ++sc->sc_arpcom.ac_if.if_oerrors;
sc 1194 dev/ic/elink3.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 1196 dev/ic/elink3.c sc->sc_dev.dv_xname, i,
sc 1197 dev/ic/elink3.c sc->tx_start_thresh);
sc 1199 dev/ic/elink3.c if (sc->tx_succ_ok < 100)
sc 1200 dev/ic/elink3.c sc->tx_start_thresh = min(ETHER_MAX_LEN,
sc 1201 dev/ic/elink3.c sc->tx_start_thresh + 20);
sc 1202 dev/ic/elink3.c sc->tx_succ_ok = 0;
sc 1203 dev/ic/elink3.c epreset(sc);
sc 1205 dev/ic/elink3.c ++sc->sc_arpcom.ac_if.if_collisions;
sc 1207 dev/ic/elink3.c sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
sc 1209 dev/ic/elink3.c sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
sc 1217 dev/ic/elink3.c register struct ep_softc *sc = arg;
sc 1218 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 1219 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1220 dev/ic/elink3.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1244 dev/ic/elink3.c epread(sc);
sc 1250 dev/ic/elink3.c epreset(sc);
sc 1254 dev/ic/elink3.c eptxstat(sc);
sc 1264 dev/ic/elink3.c epread(sc)
sc 1265 dev/ic/elink3.c register struct ep_softc *sc;
sc 1267 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 1268 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1269 dev/ic/elink3.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1273 dev/ic/elink3.c len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, EP_W1_RX_STATUS));
sc 1297 dev/ic/elink3.c printf("%s: %s\n", sc->sc_dev.dv_xname, s);
sc 1312 dev/ic/elink3.c m = epget(sc, len);
sc 1347 dev/ic/elink3.c if (epstatus(sc)) {
sc 1349 dev/ic/elink3.c ep_w1_reg(sc, EP_W1_RX_STATUS));
sc 1355 dev/ic/elink3.c sc->sc_dev.dv_xname);
sc 1357 dev/ic/elink3.c epreset(sc);
sc 1370 dev/ic/elink3.c epget(sc, totlen)
sc 1371 dev/ic/elink3.c struct ep_softc *sc;
sc 1374 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 1375 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1376 dev/ic/elink3.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1380 dev/ic/elink3.c m = sc->mb[sc->next_mb];
sc 1381 dev/ic/elink3.c sc->mb[sc->next_mb] = NULL;
sc 1388 dev/ic/elink3.c if (sc->last_mb == sc->next_mb)
sc 1389 dev/ic/elink3.c timeout_add(&sc->sc_epmbuffill_tmo, 1);
sc 1391 dev/ic/elink3.c sc->next_mb = (sc->next_mb + 1) % MAX_MBS;
sc 1418 dev/ic/elink3.c rxreg = ep_w1_reg(sc, EP_W1_RX_PIO_RD_1);
sc 1422 dev/ic/elink3.c m = sc->mb[sc->next_mb];
sc 1423 dev/ic/elink3.c sc->mb[sc->next_mb] = NULL;
sc 1432 dev/ic/elink3.c sc->next_mb = (sc->next_mb + 1) % MAX_MBS;
sc 1442 dev/ic/elink3.c if (EP_IS_BUS_32(sc->bustype)) {
sc 1478 dev/ic/elink3.c struct ep_softc *sc = ifp->if_softc;
sc 1485 dev/ic/elink3.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 1498 dev/ic/elink3.c epinit(sc);
sc 1499 dev/ic/elink3.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 1503 dev/ic/elink3.c epinit(sc);
sc 1510 dev/ic/elink3.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
sc 1528 dev/ic/elink3.c epstop(sc);
sc 1536 dev/ic/elink3.c epinit(sc);
sc 1542 dev/ic/elink3.c epinit(sc);
sc 1549 dev/ic/elink3.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 1550 dev/ic/elink3.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 1558 dev/ic/elink3.c epreset(sc);
sc 1573 dev/ic/elink3.c epreset(sc)
sc 1574 dev/ic/elink3.c struct ep_softc *sc;
sc 1579 dev/ic/elink3.c epinit(sc);
sc 1587 dev/ic/elink3.c struct ep_softc *sc = ifp->if_softc;
sc 1589 dev/ic/elink3.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1590 dev/ic/elink3.c ++sc->sc_arpcom.ac_if.if_oerrors;
sc 1592 dev/ic/elink3.c epreset(sc);
sc 1596 dev/ic/elink3.c epstop(sc)
sc 1597 dev/ic/elink3.c register struct ep_softc *sc;
sc 1599 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 1600 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1602 dev/ic/elink3.c if (sc->ep_flags & EP_FLAGS_MII) {
sc 1603 dev/ic/elink3.c mii_down(&sc->sc_mii);
sc 1606 dev/ic/elink3.c if (sc->ep_chipset == EP_CHIPSET_ROADRUNNER) {
sc 1621 dev/ic/elink3.c ep_reset_cmd(sc, EP_COMMAND, RX_RESET);
sc 1622 dev/ic/elink3.c ep_reset_cmd(sc, EP_COMMAND, TX_RESET);
sc 1629 dev/ic/elink3.c epmbufempty(sc);
sc 1665 dev/ic/elink3.c epbusyeeprom(sc)
sc 1666 dev/ic/elink3.c struct ep_softc *sc;
sc 1668 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 1669 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1681 dev/ic/elink3.c sc->sc_dev.dv_xname);
sc 1684 dev/ic/elink3.c if (sc->bustype != EP_BUS_PCMCIA && sc->bustype != EP_BUS_PCI &&
sc 1687 dev/ic/elink3.c sc->sc_dev.dv_xname);
sc 1694 dev/ic/elink3.c ep_read_eeprom(sc, offset)
sc 1695 dev/ic/elink3.c struct ep_softc *sc;
sc 1704 dev/ic/elink3.c if (sc->ep_chipset == EP_CHIPSET_ROADRUNNER)
sc 1709 dev/ic/elink3.c if (epbusyeeprom(sc))
sc 1711 dev/ic/elink3.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, EP_W0_EEPROM_COMMAND,
sc 1713 dev/ic/elink3.c if (epbusyeeprom(sc))
sc 1716 dev/ic/elink3.c return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, EP_W0_EEPROM_DATA));
sc 1723 dev/ic/elink3.c struct ep_softc *sc = v;
sc 1727 dev/ic/elink3.c i = sc->last_mb;
sc 1729 dev/ic/elink3.c if (sc->mb[i] == NULL)
sc 1730 dev/ic/elink3.c MGET(sc->mb[i], M_DONTWAIT, MT_DATA);
sc 1731 dev/ic/elink3.c if (sc->mb[i] == NULL)
sc 1734 dev/ic/elink3.c } while (i != sc->next_mb);
sc 1735 dev/ic/elink3.c sc->last_mb = i;
sc 1737 dev/ic/elink3.c if (sc->last_mb != sc->next_mb)
sc 1738 dev/ic/elink3.c timeout_add(&sc->sc_epmbuffill_tmo, 1);
sc 1743 dev/ic/elink3.c epmbufempty(sc)
sc 1744 dev/ic/elink3.c struct ep_softc *sc;
sc 1750 dev/ic/elink3.c if (sc->mb[i]) {
sc 1751 dev/ic/elink3.c m_freem(sc->mb[i]);
sc 1752 dev/ic/elink3.c sc->mb[i] = NULL;
sc 1755 dev/ic/elink3.c sc->last_mb = sc->next_mb = 0;
sc 1756 dev/ic/elink3.c timeout_del(&sc->sc_epmbuffill_tmo);
sc 1761 dev/ic/elink3.c ep_mii_setbit(sc, bit)
sc 1762 dev/ic/elink3.c struct ep_softc *sc;
sc 1768 dev/ic/elink3.c val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, EP_W4_BOOM_PHYSMGMT);
sc 1769 dev/ic/elink3.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, EP_W4_BOOM_PHYSMGMT,
sc 1774 dev/ic/elink3.c ep_mii_clrbit(sc, bit)
sc 1775 dev/ic/elink3.c struct ep_softc *sc;
sc 1781 dev/ic/elink3.c val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, EP_W4_BOOM_PHYSMGMT);
sc 1782 dev/ic/elink3.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, EP_W4_BOOM_PHYSMGMT,
sc 1787 dev/ic/elink3.c ep_mii_readbit(sc, bit)
sc 1788 dev/ic/elink3.c struct ep_softc *sc;
sc 1793 dev/ic/elink3.c return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, EP_W4_BOOM_PHYSMGMT) &
sc 1798 dev/ic/elink3.c ep_mii_sync(sc)
sc 1799 dev/ic/elink3.c struct ep_softc *sc;
sc 1804 dev/ic/elink3.c ep_mii_clrbit(sc, PHYSMGMT_DIR);
sc 1806 dev/ic/elink3.c ep_mii_clrbit(sc, PHYSMGMT_CLK);
sc 1807 dev/ic/elink3.c ep_mii_setbit(sc, PHYSMGMT_CLK);
sc 1812 dev/ic/elink3.c ep_mii_sendbits(sc, data, nbits)
sc 1813 dev/ic/elink3.c struct ep_softc *sc;
sc 1820 dev/ic/elink3.c ep_mii_setbit(sc, PHYSMGMT_DIR);
sc 1822 dev/ic/elink3.c ep_mii_clrbit(sc, PHYSMGMT_CLK);
sc 1823 dev/ic/elink3.c ep_mii_readbit(sc, PHYSMGMT_CLK);
sc 1825 dev/ic/elink3.c ep_mii_setbit(sc, PHYSMGMT_DATA);
sc 1827 dev/ic/elink3.c ep_mii_clrbit(sc, PHYSMGMT_DATA);
sc 1828 dev/ic/elink3.c ep_mii_setbit(sc, PHYSMGMT_CLK);
sc 1829 dev/ic/elink3.c ep_mii_readbit(sc, PHYSMGMT_CLK);
sc 1838 dev/ic/elink3.c struct ep_softc *sc = (struct ep_softc *)self;
sc 1847 dev/ic/elink3.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, EP_W4_BOOM_PHYSMGMT, 0);
sc 1849 dev/ic/elink3.c ep_mii_sync(sc);
sc 1850 dev/ic/elink3.c ep_mii_sendbits(sc, MII_COMMAND_START, 2);
sc 1851 dev/ic/elink3.c ep_mii_sendbits(sc, MII_COMMAND_READ, 2);
sc 1852 dev/ic/elink3.c ep_mii_sendbits(sc, phy, 5);
sc 1853 dev/ic/elink3.c ep_mii_sendbits(sc, reg, 5);
sc 1855 dev/ic/elink3.c ep_mii_clrbit(sc, PHYSMGMT_DIR);
sc 1856 dev/ic/elink3.c ep_mii_clrbit(sc, PHYSMGMT_CLK);
sc 1857 dev/ic/elink3.c ep_mii_setbit(sc, PHYSMGMT_CLK);
sc 1858 dev/ic/elink3.c ep_mii_clrbit(sc, PHYSMGMT_CLK);
sc 1860 dev/ic/elink3.c err = ep_mii_readbit(sc, PHYSMGMT_DATA);
sc 1861 dev/ic/elink3.c ep_mii_setbit(sc, PHYSMGMT_CLK);
sc 1866 dev/ic/elink3.c ep_mii_clrbit(sc, PHYSMGMT_CLK);
sc 1867 dev/ic/elink3.c if (err == 0 && ep_mii_readbit(sc, PHYSMGMT_DATA))
sc 1869 dev/ic/elink3.c ep_mii_setbit(sc, PHYSMGMT_CLK);
sc 1871 dev/ic/elink3.c ep_mii_clrbit(sc, PHYSMGMT_CLK);
sc 1872 dev/ic/elink3.c ep_mii_setbit(sc, PHYSMGMT_CLK);
sc 1884 dev/ic/elink3.c struct ep_softc *sc = (struct ep_softc *)self;
sc 1892 dev/ic/elink3.c ep_mii_sync(sc);
sc 1893 dev/ic/elink3.c ep_mii_sendbits(sc, MII_COMMAND_START, 2);
sc 1894 dev/ic/elink3.c ep_mii_sendbits(sc, MII_COMMAND_WRITE, 2);
sc 1895 dev/ic/elink3.c ep_mii_sendbits(sc, phy, 5);
sc 1896 dev/ic/elink3.c ep_mii_sendbits(sc, reg, 5);
sc 1897 dev/ic/elink3.c ep_mii_sendbits(sc, MII_COMMAND_ACK, 2);
sc 1898 dev/ic/elink3.c ep_mii_sendbits(sc, val, 16);
sc 1900 dev/ic/elink3.c ep_mii_clrbit(sc, PHYSMGMT_CLK);
sc 1901 dev/ic/elink3.c ep_mii_setbit(sc, PHYSMGMT_CLK);
sc 1910 dev/ic/elink3.c struct ep_softc *sc = (struct ep_softc *)self;
sc 1911 dev/ic/elink3.c bus_space_tag_t iot = sc->sc_iot;
sc 1912 dev/ic/elink3.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1919 dev/ic/elink3.c if (sc->sc_mii.mii_media_active & IFM_FDX)
sc 518 dev/ic/elink3reg.h #define GO_WINDOW(x) bus_space_write_2(sc->sc_iot, \
sc 519 dev/ic/elink3reg.h sc->sc_ioh, EP_COMMAND, WINDOW_SELECT|x)
sc 197 dev/ic/fxp.c fxp_scb_wait(struct fxp_softc *sc)
sc 201 dev/ic/fxp.c while (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) && --i)
sc 204 dev/ic/fxp.c printf("%s: warning: SCB timed out\n", sc->sc_dev.dv_xname);
sc 208 dev/ic/fxp.c fxp_eeprom_shiftin(struct fxp_softc *sc, int data, int length)
sc 221 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
sc 223 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg | FXP_EEPROM_EESK);
sc 225 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
sc 231 dev/ic/fxp.c fxp_eeprom_putword(struct fxp_softc *sc, int offset, u_int16_t data)
sc 238 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
sc 239 dev/ic/fxp.c fxp_eeprom_shiftin(sc, 0x4, 3);
sc 240 dev/ic/fxp.c fxp_eeprom_shiftin(sc, 0x03 << (sc->eeprom_size - 2), sc->eeprom_size);
sc 241 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
sc 246 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
sc 247 dev/ic/fxp.c fxp_eeprom_shiftin(sc, FXP_EEPROM_OPC_WRITE, 3);
sc 248 dev/ic/fxp.c fxp_eeprom_shiftin(sc, offset, sc->eeprom_size);
sc 249 dev/ic/fxp.c fxp_eeprom_shiftin(sc, data, 16);
sc 250 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
sc 255 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
sc 258 dev/ic/fxp.c if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO)
sc 262 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
sc 267 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
sc 268 dev/ic/fxp.c fxp_eeprom_shiftin(sc, 0x4, 3);
sc 269 dev/ic/fxp.c fxp_eeprom_shiftin(sc, 0, sc->eeprom_size);
sc 270 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
sc 275 dev/ic/fxp.c fxp_write_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words)
sc 280 dev/ic/fxp.c fxp_eeprom_putword(sc, offset + i, data[i]);
sc 300 dev/ic/fxp.c fxp_shutdown(void *sc)
sc 302 dev/ic/fxp.c fxp_stop((struct fxp_softc *) sc, 0);
sc 314 dev/ic/fxp.c struct fxp_softc *sc = arg;
sc 320 dev/ic/fxp.c fxp_stop(sc, 0);
sc 322 dev/ic/fxp.c ifp = &sc->sc_arpcom.ac_if;
sc 324 dev/ic/fxp.c fxp_init(sc);
sc 337 dev/ic/fxp.c fxp_attach(struct fxp_softc *sc, const char *intrstr)
sc 349 dev/ic/fxp.c CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SOFTWARE_RESET);
sc 352 dev/ic/fxp.c if (bus_dmamem_alloc(sc->sc_dmat, sizeof(struct fxp_ctrl),
sc 353 dev/ic/fxp.c PAGE_SIZE, 0, &sc->sc_cb_seg, 1, &sc->sc_cb_nseg, BUS_DMA_NOWAIT))
sc 355 dev/ic/fxp.c if (bus_dmamem_map(sc->sc_dmat, &sc->sc_cb_seg, sc->sc_cb_nseg,
sc 356 dev/ic/fxp.c sizeof(struct fxp_ctrl), (caddr_t *)&sc->sc_ctrl,
sc 358 dev/ic/fxp.c bus_dmamem_free(sc->sc_dmat, &sc->sc_cb_seg, sc->sc_cb_nseg);
sc 361 dev/ic/fxp.c if (bus_dmamap_create(sc->sc_dmat, sizeof(struct fxp_ctrl),
sc 363 dev/ic/fxp.c &sc->tx_cb_map)) {
sc 364 dev/ic/fxp.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_ctrl,
sc 366 dev/ic/fxp.c bus_dmamem_free(sc->sc_dmat, &sc->sc_cb_seg, sc->sc_cb_nseg);
sc 369 dev/ic/fxp.c if (bus_dmamap_load(sc->sc_dmat, sc->tx_cb_map, (caddr_t)sc->sc_ctrl,
sc 371 dev/ic/fxp.c bus_dmamap_destroy(sc->sc_dmat, sc->tx_cb_map);
sc 372 dev/ic/fxp.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_ctrl,
sc 374 dev/ic/fxp.c bus_dmamem_free(sc->sc_dmat, &sc->sc_cb_seg, sc->sc_cb_nseg);
sc 379 dev/ic/fxp.c if ((err = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 380 dev/ic/fxp.c FXP_NTXSEG, MCLBYTES, 0, 0, &sc->txs[i].tx_map)) != 0) {
sc 382 dev/ic/fxp.c sc->sc_dev.dv_xname, i, err);
sc 385 dev/ic/fxp.c sc->txs[i].tx_mbuf = NULL;
sc 386 dev/ic/fxp.c sc->txs[i].tx_cb = sc->sc_ctrl->tx_cb + i;
sc 387 dev/ic/fxp.c sc->txs[i].tx_off = offsetof(struct fxp_ctrl, tx_cb[i]);
sc 388 dev/ic/fxp.c sc->txs[i].tx_next = &sc->txs[(i + 1) & FXP_TXCB_MASK];
sc 390 dev/ic/fxp.c bzero(sc->sc_ctrl, sizeof(struct fxp_ctrl));
sc 395 dev/ic/fxp.c sc->sc_rxfree = 0;
sc 397 dev/ic/fxp.c if ((err = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 398 dev/ic/fxp.c MCLBYTES, 0, 0, &sc->sc_rxmaps[i])) != 0) {
sc 400 dev/ic/fxp.c sc->sc_dev.dv_xname, i, err);
sc 403 dev/ic/fxp.c sc->rx_bufs++;
sc 406 dev/ic/fxp.c if (fxp_add_rfabuf(sc, NULL) != 0)
sc 412 dev/ic/fxp.c fxp_autosize_eeprom(sc);
sc 417 dev/ic/fxp.c fxp_read_eeprom(sc, (u_int16_t *)&data, 6, 1);
sc 418 dev/ic/fxp.c sc->phy_primary_addr = data & 0xff;
sc 419 dev/ic/fxp.c sc->phy_primary_device = (data >> 8) & 0x3f;
sc 420 dev/ic/fxp.c sc->phy_10Mbps_only = data >> 15;
sc 425 dev/ic/fxp.c if (sc->sc_revision >= FXP_REV_82558_A4) {
sc 426 dev/ic/fxp.c sc->sc_int_delay = fxp_int_delay;
sc 427 dev/ic/fxp.c sc->sc_bundle_max = fxp_bundle_max;
sc 428 dev/ic/fxp.c sc->sc_min_size_mask = fxp_min_size_mask;
sc 433 dev/ic/fxp.c fxp_read_eeprom(sc, (u_int16_t *)enaddr, 0, 3);
sc 435 dev/ic/fxp.c ifp = &sc->sc_arpcom.ac_if;
sc 436 dev/ic/fxp.c bcopy(enaddr, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 437 dev/ic/fxp.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 438 dev/ic/fxp.c ifp->if_softc = sc;
sc 449 dev/ic/fxp.c ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 451 dev/ic/fxp.c if (sc->sc_flags & FXPF_DISABLE_STANDBY) {
sc 452 dev/ic/fxp.c fxp_read_eeprom(sc, &data, 10, 1);
sc 458 dev/ic/fxp.c sc->sc_dev.dv_xname);
sc 460 dev/ic/fxp.c fxp_write_eeprom(sc, &data, 10, 1);
sc 463 dev/ic/fxp.c for (i = 0; i < (1 << sc->eeprom_size) - 1; i++) {
sc 464 dev/ic/fxp.c fxp_read_eeprom(sc, &data, i, 1);
sc 467 dev/ic/fxp.c i = (1 << sc->eeprom_size) - 1;
sc 469 dev/ic/fxp.c fxp_read_eeprom(sc, &data, i, 1);
sc 470 dev/ic/fxp.c fxp_write_eeprom(sc, &cksum, i, 1);
sc 477 dev/ic/fxp.c fxp_read_eeprom(sc, &data, 3, 1);
sc 479 dev/ic/fxp.c sc->sc_flags |= FXPF_RECV_WORKAROUND;
sc 484 dev/ic/fxp.c sc->sc_mii.mii_ifp = ifp;
sc 485 dev/ic/fxp.c sc->sc_mii.mii_readreg = fxp_mdi_read;
sc 486 dev/ic/fxp.c sc->sc_mii.mii_writereg = fxp_mdi_write;
sc 487 dev/ic/fxp.c sc->sc_mii.mii_statchg = fxp_statchg;
sc 488 dev/ic/fxp.c ifmedia_init(&sc->sc_mii.mii_media, 0, fxp_mediachange,
sc 490 dev/ic/fxp.c mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
sc 493 dev/ic/fxp.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 494 dev/ic/fxp.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_MANUAL,
sc 497 dev/ic/fxp.c sc->sc_dev.dv_xname);
sc 500 dev/ic/fxp.c if (ifmedia_match(&sc->sc_mii.mii_media, IFM_ETHER|IFM_MANUAL, 0))
sc 501 dev/ic/fxp.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_MANUAL);
sc 502 dev/ic/fxp.c else if (ifmedia_match(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO, 0))
sc 503 dev/ic/fxp.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 505 dev/ic/fxp.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T);
sc 518 dev/ic/fxp.c sc->sc_sdhook = shutdownhook_establish(fxp_shutdown, sc);
sc 523 dev/ic/fxp.c sc->sc_powerhook = powerhook_establish(fxp_power, sc);
sc 528 dev/ic/fxp.c timeout_set(&sc->stats_update_to, fxp_stats_update, sc);
sc 533 dev/ic/fxp.c printf("%s: Failed to malloc memory\n", sc->sc_dev.dv_xname);
sc 534 dev/ic/fxp.c if (sc->tx_cb_map != NULL) {
sc 535 dev/ic/fxp.c bus_dmamap_unload(sc->sc_dmat, sc->tx_cb_map);
sc 536 dev/ic/fxp.c bus_dmamap_destroy(sc->sc_dmat, sc->tx_cb_map);
sc 537 dev/ic/fxp.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_ctrl,
sc 539 dev/ic/fxp.c bus_dmamem_free(sc->sc_dmat, &sc->sc_cb_seg, sc->sc_cb_nseg);
sc 541 dev/ic/fxp.c m = sc->rfa_headm;
sc 544 dev/ic/fxp.c bus_dmamap_unload(sc->sc_dmat, rxmap);
sc 545 dev/ic/fxp.c FXP_RXMAP_PUT(sc, rxmap);
sc 580 dev/ic/fxp.c fxp_autosize_eeprom(struct fxp_softc *sc)
sc 585 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
sc 595 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
sc 596 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
sc 599 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
sc 607 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
sc 608 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
sc 611 dev/ic/fxp.c if ((CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO) == 0)
sc 613 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
sc 616 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
sc 618 dev/ic/fxp.c sc->eeprom_size = x;
sc 629 dev/ic/fxp.c fxp_read_eeprom(struct fxp_softc *sc, u_short *data, int offset,
sc 636 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
sc 646 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
sc 647 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
sc 650 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
sc 656 dev/ic/fxp.c for (x = sc->eeprom_size; x > 0; x--) {
sc 662 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
sc 663 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
sc 666 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
sc 675 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
sc 678 dev/ic/fxp.c if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) &
sc 681 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
sc 685 dev/ic/fxp.c CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
sc 696 dev/ic/fxp.c struct fxp_softc *sc = ifp->if_softc;
sc 697 dev/ic/fxp.c struct fxp_txsw *txs = sc->sc_cbt_prod;
sc 700 dev/ic/fxp.c int cnt = sc->sc_cbt_cnt, seg;
sc 717 dev/ic/fxp.c if (bus_dmamap_load_mbuf(sc->sc_dmat, txs->tx_map,
sc 731 dev/ic/fxp.c if (bus_dmamap_load_mbuf(sc->sc_dmat, txs->tx_map,
sc 752 dev/ic/fxp.c FXP_MBUF_SYNC(sc, txs->tx_map, BUS_DMASYNC_PREWRITE);
sc 765 dev/ic/fxp.c FXP_TXCB_SYNC(sc, txs,
sc 769 dev/ic/fxp.c sc->sc_cbt_prod = txs;
sc 772 dev/ic/fxp.c if (cnt != sc->sc_cbt_cnt) {
sc 776 dev/ic/fxp.c txs = sc->sc_cbt_prod;
sc 778 dev/ic/fxp.c sc->sc_cbt_prod = txs;
sc 781 dev/ic/fxp.c FXP_TXCB_SYNC(sc, txs,
sc 784 dev/ic/fxp.c FXP_TXCB_SYNC(sc, sc->sc_cbt_prev,
sc 786 dev/ic/fxp.c sc->sc_cbt_prev->tx_cb->cb_command &=
sc 788 dev/ic/fxp.c FXP_TXCB_SYNC(sc, sc->sc_cbt_prev,
sc 791 dev/ic/fxp.c sc->sc_cbt_prev = txs;
sc 793 dev/ic/fxp.c fxp_scb_wait(sc);
sc 794 dev/ic/fxp.c fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_RESUME);
sc 796 dev/ic/fxp.c sc->sc_cbt_cnt = cnt + 1;
sc 806 dev/ic/fxp.c struct fxp_softc *sc = arg;
sc 807 dev/ic/fxp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 818 dev/ic/fxp.c statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK);
sc 821 dev/ic/fxp.c CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack);
sc 826 dev/ic/fxp.c while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) {
sc 833 dev/ic/fxp.c CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack);
sc 839 dev/ic/fxp.c int txcnt = sc->sc_cbt_cnt;
sc 840 dev/ic/fxp.c struct fxp_txsw *txs = sc->sc_cbt_cons;
sc 842 dev/ic/fxp.c FXP_TXCB_SYNC(sc, txs,
sc 849 dev/ic/fxp.c FXP_MBUF_SYNC(sc, txs->tx_map,
sc 851 dev/ic/fxp.c bus_dmamap_unload(sc->sc_dmat,
sc 858 dev/ic/fxp.c FXP_TXCB_SYNC(sc, txs,
sc 861 dev/ic/fxp.c sc->sc_cbt_cons = txs;
sc 862 dev/ic/fxp.c sc->sc_cbt_cnt = txcnt;
sc 883 dev/ic/fxp.c m = sc->rfa_headm;
sc 886 dev/ic/fxp.c bus_dmamap_sync(sc->sc_dmat, rxmap,
sc 901 dev/ic/fxp.c sc->rfa_headm = m->m_next;
sc 909 dev/ic/fxp.c if (fxp_add_rfabuf(sc, m) == 0) {
sc 944 dev/ic/fxp.c sc->rfa_headm->m_ext.ext_buf);
sc 945 dev/ic/fxp.c fxp_scb_wait(sc);
sc 946 dev/ic/fxp.c CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
sc 949 dev/ic/fxp.c fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_START);
sc 970 dev/ic/fxp.c struct fxp_softc *sc = arg;
sc 971 dev/ic/fxp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 972 dev/ic/fxp.c struct fxp_stats *sp = &sc->sc_ctrl->stats;
sc 975 dev/ic/fxp.c FXP_STATS_SYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
sc 980 dev/ic/fxp.c sc->rx_idle_secs = 0;
sc 981 dev/ic/fxp.c } else if (sc->sc_flags & FXPF_RECV_WORKAROUND)
sc 982 dev/ic/fxp.c sc->rx_idle_secs++;
sc 1008 dev/ic/fxp.c if (sc->rx_idle_secs > FXP_MAX_RX_IDLE) {
sc 1009 dev/ic/fxp.c sc->rx_idle_secs = 0;
sc 1010 dev/ic/fxp.c fxp_init(sc);
sc 1018 dev/ic/fxp.c FXP_STATS_SYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
sc 1019 dev/ic/fxp.c if (CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) == 0) {
sc 1023 dev/ic/fxp.c fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_DUMPRESET);
sc 1042 dev/ic/fxp.c mii_tick(&sc->sc_mii);
sc 1048 dev/ic/fxp.c timeout_add(&sc->stats_update_to, hz);
sc 1056 dev/ic/fxp.c fxp_stop(struct fxp_softc *sc, int drain)
sc 1058 dev/ic/fxp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1071 dev/ic/fxp.c timeout_del(&sc->stats_update_to);
sc 1072 dev/ic/fxp.c mii_down(&sc->sc_mii);
sc 1077 dev/ic/fxp.c CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
sc 1084 dev/ic/fxp.c if (sc->txs[i].tx_mbuf != NULL) {
sc 1085 dev/ic/fxp.c bus_dmamap_unload(sc->sc_dmat, sc->txs[i].tx_map);
sc 1086 dev/ic/fxp.c m_freem(sc->txs[i].tx_mbuf);
sc 1087 dev/ic/fxp.c sc->txs[i].tx_mbuf = NULL;
sc 1090 dev/ic/fxp.c sc->sc_cbt_cnt = 0;
sc 1099 dev/ic/fxp.c m = sc->rfa_headm;
sc 1102 dev/ic/fxp.c bus_dmamap_unload(sc->sc_dmat, rxmap);
sc 1103 dev/ic/fxp.c FXP_RXMAP_PUT(sc, rxmap);
sc 1105 dev/ic/fxp.c sc->rx_bufs--;
sc 1107 dev/ic/fxp.c sc->rfa_headm = NULL;
sc 1108 dev/ic/fxp.c sc->rfa_tailm = NULL;
sc 1110 dev/ic/fxp.c if (fxp_add_rfabuf(sc, NULL) != 0) {
sc 1118 dev/ic/fxp.c sc->rx_bufs++;
sc 1132 dev/ic/fxp.c struct fxp_softc *sc = ifp->if_softc;
sc 1134 dev/ic/fxp.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1137 dev/ic/fxp.c fxp_init(sc);
sc 1144 dev/ic/fxp.c fxp_scb_cmd(struct fxp_softc *sc, u_int8_t cmd)
sc 1146 dev/ic/fxp.c CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, cmd);
sc 1152 dev/ic/fxp.c struct fxp_softc *sc = xsc;
sc 1153 dev/ic/fxp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1165 dev/ic/fxp.c fxp_stop(sc, 0);
sc 1171 dev/ic/fxp.c fxp_scb_wait(sc);
sc 1172 dev/ic/fxp.c CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0);
sc 1173 dev/ic/fxp.c fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_BASE);
sc 1175 dev/ic/fxp.c fxp_scb_wait(sc);
sc 1176 dev/ic/fxp.c CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0);
sc 1177 dev/ic/fxp.c fxp_scb_cmd(sc, FXP_SCB_COMMAND_RU_BASE);
sc 1180 dev/ic/fxp.c fxp_load_ucode(sc);
sc 1183 dev/ic/fxp.c fxp_mc_setup(sc, 0);
sc 1194 dev/ic/fxp.c if (sc->sc_revision >= FXP_REV_82558_A4)
sc 1202 dev/ic/fxp.c fxp_scb_wait(sc);
sc 1203 dev/ic/fxp.c CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
sc 1204 dev/ic/fxp.c sc->tx_cb_map->dm_segs->ds_addr +
sc 1206 dev/ic/fxp.c fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_DUMP_ADR);
sc 1208 dev/ic/fxp.c cbp = &sc->sc_ctrl->u.cfg;
sc 1237 dev/ic/fxp.c cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */
sc 1277 dev/ic/fxp.c if (sc->sc_flags & FXPF_MWI_ENABLE)
sc 1280 dev/ic/fxp.c if(!sc->phy_10Mbps_only) /* interface mode */
sc 1300 dev/ic/fxp.c fxp_scb_wait(sc);
sc 1301 dev/ic/fxp.c FXP_CFG_SYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
sc 1302 dev/ic/fxp.c CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->tx_cb_map->dm_segs->ds_addr +
sc 1304 dev/ic/fxp.c fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START);
sc 1308 dev/ic/fxp.c FXP_CFG_SYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
sc 1314 dev/ic/fxp.c cb_ias = &sc->sc_ctrl->u.ias;
sc 1318 dev/ic/fxp.c bcopy(sc->sc_arpcom.ac_enaddr, (void *)cb_ias->macaddr,
sc 1319 dev/ic/fxp.c sizeof(sc->sc_arpcom.ac_enaddr));
sc 1324 dev/ic/fxp.c fxp_scb_wait(sc);
sc 1325 dev/ic/fxp.c FXP_IAS_SYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
sc 1326 dev/ic/fxp.c CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->tx_cb_map->dm_segs->ds_addr +
sc 1328 dev/ic/fxp.c fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START);
sc 1332 dev/ic/fxp.c FXP_IAS_SYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
sc 1336 dev/ic/fxp.c fxp_mc_setup(sc, 1);
sc 1341 dev/ic/fxp.c bzero(sc->sc_ctrl->tx_cb, sizeof(struct fxp_cb_tx) * FXP_NTXCB);
sc 1342 dev/ic/fxp.c txp = sc->sc_ctrl->tx_cb;
sc 1345 dev/ic/fxp.c txp[i].link_addr = htole32(sc->tx_cb_map->dm_segs->ds_addr +
sc 1347 dev/ic/fxp.c txp[i].tbd_array_addr =htole32(sc->tx_cb_map->dm_segs->ds_addr +
sc 1354 dev/ic/fxp.c sc->sc_cbt_prev = sc->sc_cbt_prod = sc->sc_cbt_cons = sc->txs;
sc 1355 dev/ic/fxp.c sc->sc_cbt_cnt = 1;
sc 1356 dev/ic/fxp.c sc->sc_ctrl->tx_cb[0].cb_command = htole16(FXP_CB_COMMAND_NOP |
sc 1358 dev/ic/fxp.c bus_dmamap_sync(sc->sc_dmat, sc->tx_cb_map, 0,
sc 1359 dev/ic/fxp.c sc->tx_cb_map->dm_mapsize,
sc 1362 dev/ic/fxp.c fxp_scb_wait(sc);
sc 1363 dev/ic/fxp.c CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->tx_cb_map->dm_segs->ds_addr +
sc 1365 dev/ic/fxp.c fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START);
sc 1374 dev/ic/fxp.c if (sc->rx_bufs > bufs) {
sc 1375 dev/ic/fxp.c while (sc->rfa_headm != NULL && sc->rx_bufs-- > bufs) {
sc 1376 dev/ic/fxp.c rxmap = *((bus_dmamap_t *)sc->rfa_headm->m_ext.ext_buf);
sc 1377 dev/ic/fxp.c bus_dmamap_unload(sc->sc_dmat, rxmap);
sc 1378 dev/ic/fxp.c FXP_RXMAP_PUT(sc, rxmap);
sc 1379 dev/ic/fxp.c sc->rfa_headm = m_free(sc->rfa_headm);
sc 1381 dev/ic/fxp.c } else if (sc->rx_bufs < bufs) {
sc 1382 dev/ic/fxp.c int err, tmp_rx_bufs = sc->rx_bufs;
sc 1383 dev/ic/fxp.c for (i = sc->rx_bufs; i < bufs; i++) {
sc 1384 dev/ic/fxp.c if ((err = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 1385 dev/ic/fxp.c MCLBYTES, 0, 0, &sc->sc_rxmaps[i])) != 0) {
sc 1387 dev/ic/fxp.c "error %d\n", sc->sc_dev.dv_xname, i, err);
sc 1390 dev/ic/fxp.c sc->rx_bufs++;
sc 1392 dev/ic/fxp.c for (i = tmp_rx_bufs; i < sc->rx_bufs; i++)
sc 1393 dev/ic/fxp.c if (fxp_add_rfabuf(sc, NULL) != 0)
sc 1396 dev/ic/fxp.c fxp_scb_wait(sc);
sc 1401 dev/ic/fxp.c mii_mediachg(&sc->sc_mii);
sc 1414 dev/ic/fxp.c CSR_WRITE_1(sc, FXP_CSR_SCB_INTRCNTL, FXP_SCB_INTRCNTL_REQUEST_SWI);
sc 1420 dev/ic/fxp.c timeout_add(&sc->stats_update_to, hz);
sc 1429 dev/ic/fxp.c struct fxp_softc *sc = ifp->if_softc;
sc 1430 dev/ic/fxp.c struct mii_data *mii = &sc->sc_mii;
sc 1437 dev/ic/fxp.c mii_mediachg(&sc->sc_mii);
sc 1447 dev/ic/fxp.c struct fxp_softc *sc = ifp->if_softc;
sc 1449 dev/ic/fxp.c mii_pollstat(&sc->sc_mii);
sc 1450 dev/ic/fxp.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 1451 dev/ic/fxp.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 1463 dev/ic/fxp.c fxp_add_rfabuf(struct fxp_softc *sc, struct mbuf *oldm)
sc 1481 dev/ic/fxp.c rxmap = FXP_RXMAP_GET(sc);
sc 1483 dev/ic/fxp.c bus_dmamap_load(sc->sc_dmat, rxmap,
sc 1490 dev/ic/fxp.c bus_dmamap_unload(sc->sc_dmat, rxmap);
sc 1491 dev/ic/fxp.c bus_dmamap_load(sc->sc_dmat, rxmap,
sc 1535 dev/ic/fxp.c bus_dmamap_sync(sc->sc_dmat, rxmap, 0, MCLBYTES,
sc 1542 dev/ic/fxp.c if (sc->rfa_headm != NULL) {
sc 1543 dev/ic/fxp.c sc->rfa_tailm->m_next = m;
sc 1545 dev/ic/fxp.c rfap = sc->rfa_tailm->m_ext.ext_buf + RFA_ALIGNMENT_FUDGE;
sc 1551 dev/ic/fxp.c bus_dmamap_sync(sc->sc_dmat,
sc 1552 dev/ic/fxp.c *((bus_dmamap_t *)sc->rfa_tailm->m_ext.ext_buf), 0,
sc 1555 dev/ic/fxp.c sc->rfa_headm = m;
sc 1557 dev/ic/fxp.c sc->rfa_tailm = m;
sc 1565 dev/ic/fxp.c struct fxp_softc *sc = (struct fxp_softc *)self;
sc 1569 dev/ic/fxp.c CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
sc 1572 dev/ic/fxp.c while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0
sc 1577 dev/ic/fxp.c printf("%s: fxp_mdi_read: timed out\n", sc->sc_dev.dv_xname);
sc 1591 dev/ic/fxp.c struct fxp_softc *sc = (struct fxp_softc *)self;
sc 1594 dev/ic/fxp.c CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
sc 1598 dev/ic/fxp.c while((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 &&
sc 1603 dev/ic/fxp.c printf("%s: fxp_mdi_write: timed out\n", sc->sc_dev.dv_xname);
sc 1609 dev/ic/fxp.c struct fxp_softc *sc = ifp->if_softc;
sc 1616 dev/ic/fxp.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, command, data)) > 0) {
sc 1625 dev/ic/fxp.c fxp_init(sc);
sc 1628 dev/ic/fxp.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 1647 dev/ic/fxp.c fxp_init(sc);
sc 1649 dev/ic/fxp.c fxp_stop(sc, 1);
sc 1655 dev/ic/fxp.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 1656 dev/ic/fxp.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 1663 dev/ic/fxp.c fxp_init(sc);
sc 1670 dev/ic/fxp.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, command);
sc 1695 dev/ic/fxp.c fxp_mc_setup(struct fxp_softc *sc, int doit)
sc 1697 dev/ic/fxp.c struct fxp_cb_mcs *mcsp = &sc->sc_ctrl->u.mcs;
sc 1698 dev/ic/fxp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1712 dev/ic/fxp.c ETHER_FIRST_MULTI(step, &sc->sc_arpcom, enm);
sc 1741 dev/ic/fxp.c while ((CSR_READ_1(sc, FXP_CSR_SCB_RUSCUS) >> 6) != FXP_SCB_CUS_IDLE);
sc 1746 dev/ic/fxp.c fxp_scb_wait(sc);
sc 1747 dev/ic/fxp.c FXP_MCS_SYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
sc 1748 dev/ic/fxp.c CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->tx_cb_map->dm_segs->ds_addr +
sc 1750 dev/ic/fxp.c fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START);
sc 1754 dev/ic/fxp.c FXP_MCS_SYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
sc 1805 dev/ic/fxp.c fxp_load_ucode(struct fxp_softc *sc)
sc 1808 dev/ic/fxp.c struct fxp_cb_ucode *cbp = &sc->sc_ctrl->u.code;
sc 1813 dev/ic/fxp.c if (sc->sc_flags & FXPF_UCODE)
sc 1817 dev/ic/fxp.c if (sc->sc_revision == uc->revision)
sc 1825 dev/ic/fxp.c sc->sc_dev.dv_xname, uc->uname, error);
sc 1826 dev/ic/fxp.c sc->sc_flags |= FXPF_UCODE;
sc 1838 dev/ic/fxp.c htole16(sc->sc_int_delay + sc->sc_int_delay / 2);
sc 1842 dev/ic/fxp.c htole16(sc->sc_bundle_max);
sc 1846 dev/ic/fxp.c htole16(sc->sc_min_size_mask);
sc 1848 dev/ic/fxp.c FXP_UCODE_SYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
sc 1853 dev/ic/fxp.c fxp_scb_wait(sc);
sc 1854 dev/ic/fxp.c CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, sc->tx_cb_map->dm_segs->ds_addr
sc 1856 dev/ic/fxp.c fxp_scb_cmd(sc, FXP_SCB_COMMAND_CU_START);
sc 1862 dev/ic/fxp.c FXP_UCODE_SYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
sc 1865 dev/ic/fxp.c printf("%s: timeout loading microcode\n", sc->sc_dev.dv_xname);
sc 1872 dev/ic/fxp.c sc->sc_dev.dv_xname, sc->sc_int_delay);
sc 1875 dev/ic/fxp.c printf(", bundle_max %d\n", sc->sc_bundle_max);
sc 1881 dev/ic/fxp.c sc->sc_flags |= FXPF_UCODE;
sc 149 dev/ic/fxpvar.h #define CSR_READ_1(sc, reg) \
sc 150 dev/ic/fxpvar.h bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
sc 151 dev/ic/fxpvar.h #define CSR_READ_2(sc, reg) \
sc 152 dev/ic/fxpvar.h bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
sc 153 dev/ic/fxpvar.h #define CSR_READ_4(sc, reg) \
sc 154 dev/ic/fxpvar.h bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
sc 155 dev/ic/fxpvar.h #define CSR_WRITE_1(sc, reg, val) \
sc 156 dev/ic/fxpvar.h bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sc 157 dev/ic/fxpvar.h #define CSR_WRITE_2(sc, reg, val) \
sc 158 dev/ic/fxpvar.h bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sc 159 dev/ic/fxpvar.h #define CSR_WRITE_4(sc, reg, val) \
sc 160 dev/ic/fxpvar.h bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sc 165 dev/ic/fxpvar.h #define FXP_RXMAP_GET(sc) ((sc)->sc_rxmaps[(sc)->sc_rxfree++])
sc 166 dev/ic/fxpvar.h #define FXP_RXMAP_PUT(sc,map) ((sc)->sc_rxmaps[--(sc)->sc_rxfree] = (map))
sc 168 dev/ic/fxpvar.h #define FXP_TXCB_SYNC(sc, txs, p) \
sc 169 dev/ic/fxpvar.h bus_dmamap_sync((sc)->sc_dmat, (sc)->tx_cb_map, (txs)->tx_off, \
sc 172 dev/ic/fxpvar.h #define FXP_MCS_SYNC(sc, p) \
sc 173 dev/ic/fxpvar.h bus_dmamap_sync((sc)->sc_dmat, (sc)->tx_cb_map, \
sc 176 dev/ic/fxpvar.h #define FXP_IAS_SYNC(sc, p) \
sc 177 dev/ic/fxpvar.h bus_dmamap_sync((sc)->sc_dmat, (sc)->tx_cb_map, \
sc 180 dev/ic/fxpvar.h #define FXP_CFG_SYNC(sc, p) \
sc 181 dev/ic/fxpvar.h bus_dmamap_sync((sc)->sc_dmat, (sc)->tx_cb_map, \
sc 184 dev/ic/fxpvar.h #define FXP_UCODE_SYNC(sc, p) \
sc 185 dev/ic/fxpvar.h bus_dmamap_sync((sc)->sc_dmat, (sc)->tx_cb_map, \
sc 188 dev/ic/fxpvar.h #define FXP_STATS_SYNC(sc, p) \
sc 189 dev/ic/fxpvar.h bus_dmamap_sync((sc)->sc_dmat, (sc)->tx_cb_map, \
sc 192 dev/ic/fxpvar.h #define FXP_MBUF_SYNC(sc, m, p) \
sc 193 dev/ic/fxpvar.h bus_dmamap_sync((sc)->sc_dmat, (m), 0, (m)->dm_mapsize, (p))
sc 1481 dev/ic/gdt_common.c struct gdt_softc *sc = (struct gdt_softc *)dev;
sc 1484 dev/ic/gdt_common.c GDT_DPRINTF(GDT_D_IOCTL, ("%s: ioctl ", DEVNAME(sc)));
sc 1489 dev/ic/gdt_common.c error = gdt_ioctl_inq(sc, (struct bioc_inq *)addr);
sc 1494 dev/ic/gdt_common.c error = gdt_ioctl_vol(sc, (struct bioc_vol *)addr);
sc 1499 dev/ic/gdt_common.c error = gdt_ioctl_disk(sc, (struct bioc_disk *)addr);
sc 1504 dev/ic/gdt_common.c error = gdt_ioctl_alarm(sc, (struct bioc_alarm *)addr);
sc 1509 dev/ic/gdt_common.c error = gdt_ioctl_setstate(sc, (struct bioc_setstate *)addr);
sc 1521 dev/ic/gdt_common.c gdt_ioctl_inq(struct gdt_softc *sc, struct bioc_inq *bi)
sc 1523 dev/ic/gdt_common.c bi->bi_novol = sc->sc_ndevs;
sc 1524 dev/ic/gdt_common.c bi->bi_nodisk = sc->sc_total_disks;
sc 1526 dev/ic/gdt_common.c strlcpy(bi->bi_dev, DEVNAME(sc), sizeof(bi->bi_dev));
sc 1532 dev/ic/gdt_common.c gdt_ioctl_vol(struct gdt_softc *sc, struct bioc_vol *bv)
sc 1538 dev/ic/gdt_common.c gdt_ioctl_disk(struct gdt_softc *sc, struct bioc_disk *bd)
sc 1544 dev/ic/gdt_common.c gdt_ioctl_alarm(struct gdt_softc *sc, struct bioc_alarm *ba)
sc 1550 dev/ic/gdt_common.c gdt_ioctl_setstate(struct gdt_softc *sc, struct bioc_setstate *bs)
sc 122 dev/ic/gem.c #define DPRINTF(sc, x) if ((sc)->sc_arpcom.ac_if.if_flags & IFF_DEBUG) \
sc 125 dev/ic/gem.c #define DPRINTF(sc, x) /* nothing */
sc 132 dev/ic/gem.c gem_config(struct gem_softc *sc)
sc 134 dev/ic/gem.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 135 dev/ic/gem.c struct mii_data *mii = &sc->sc_mii;
sc 141 dev/ic/gem.c ifp->if_softc = sc;
sc 142 dev/ic/gem.c gem_reset(sc);
sc 148 dev/ic/gem.c if ((error = bus_dmamem_alloc(sc->sc_dmatag,
sc 149 dev/ic/gem.c sizeof(struct gem_control_data), PAGE_SIZE, 0, &sc->sc_cdseg,
sc 150 dev/ic/gem.c 1, &sc->sc_cdnseg, 0)) != 0) {
sc 152 dev/ic/gem.c sc->sc_dev.dv_xname, error);
sc 157 dev/ic/gem.c if ((error = bus_dmamem_map(sc->sc_dmatag, &sc->sc_cdseg, sc->sc_cdnseg,
sc 158 dev/ic/gem.c sizeof(struct gem_control_data), (caddr_t *)&sc->sc_control_data,
sc 161 dev/ic/gem.c sc->sc_dev.dv_xname, error);
sc 165 dev/ic/gem.c if ((error = bus_dmamap_create(sc->sc_dmatag,
sc 167 dev/ic/gem.c sizeof(struct gem_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
sc 169 dev/ic/gem.c "error = %d\n", sc->sc_dev.dv_xname, error);
sc 173 dev/ic/gem.c if ((error = bus_dmamap_load(sc->sc_dmatag, sc->sc_cddmamap,
sc 174 dev/ic/gem.c sc->sc_control_data, sizeof(struct gem_control_data), NULL,
sc 177 dev/ic/gem.c sc->sc_dev.dv_xname, error);
sc 185 dev/ic/gem.c if ((error = bus_dmamap_create(sc->sc_dmatag, MCLBYTES, 1,
sc 186 dev/ic/gem.c MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) {
sc 188 dev/ic/gem.c "error = %d\n", sc->sc_dev.dv_xname, i, error);
sc 191 dev/ic/gem.c sc->sc_rxsoft[i].rxs_mbuf = NULL;
sc 197 dev/ic/gem.c if ((error = bus_dmamap_create(sc->sc_dmatag, MCLBYTES,
sc 199 dev/ic/gem.c &sc->sc_txd[i].sd_map)) != 0) {
sc 201 dev/ic/gem.c "error = %d\n", sc->sc_dev.dv_xname, i, error);
sc 204 dev/ic/gem.c sc->sc_txd[i].sd_mbuf = NULL;
sc 214 dev/ic/gem.c printf(", address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 217 dev/ic/gem.c sc->sc_rxfifosize = 64 *
sc 218 dev/ic/gem.c bus_space_read_4(sc->sc_bustag, sc->sc_h1, GEM_RX_FIFO_SIZE);
sc 221 dev/ic/gem.c strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, sizeof ifp->if_xname);
sc 222 dev/ic/gem.c ifp->if_softc = sc;
sc 242 dev/ic/gem.c if (sc->sc_variant != GEM_SUN_ERI)
sc 243 dev/ic/gem.c bus_space_write_4(sc->sc_bustag, sc->sc_h1,
sc 246 dev/ic/gem.c gem_mifinit(sc);
sc 251 dev/ic/gem.c if (sc->sc_mif_config & GEM_MIF_CONFIG_MDI1) {
sc 252 dev/ic/gem.c sc->sc_mif_config |= GEM_MIF_CONFIG_PHY_SEL;
sc 253 dev/ic/gem.c bus_space_write_4(sc->sc_bustag, sc->sc_h1,
sc 254 dev/ic/gem.c GEM_MIF_CONFIG, sc->sc_mif_config);
sc 256 dev/ic/gem.c switch (sc->sc_variant) {
sc 265 dev/ic/gem.c mii_attach(&sc->sc_dev, mii, 0xffffffff, phyad,
sc 273 dev/ic/gem.c if (child == NULL && sc->sc_mif_config & GEM_MIF_CONFIG_MDI0) {
sc 274 dev/ic/gem.c sc->sc_mif_config &= ~GEM_MIF_CONFIG_PHY_SEL;
sc 275 dev/ic/gem.c bus_space_write_4(sc->sc_bustag, sc->sc_h1,
sc 276 dev/ic/gem.c GEM_MIF_CONFIG, sc->sc_mif_config);
sc 278 dev/ic/gem.c switch (sc->sc_variant) {
sc 291 dev/ic/gem.c mii_attach(&sc->sc_dev, mii, 0xffffffff, phyad,
sc 300 dev/ic/gem.c if (child == NULL && sc->sc_variant != GEM_SUN_ERI &&
sc 301 dev/ic/gem.c sc->sc_mif_config & (GEM_MIF_CONFIG_MDI0|GEM_MIF_CONFIG_MDI1)) {
sc 302 dev/ic/gem.c bus_space_write_4(sc->sc_bustag, sc->sc_h1,
sc 305 dev/ic/gem.c bus_space_write_4(sc->sc_bustag, sc->sc_h1,
sc 309 dev/ic/gem.c bus_space_write_4(sc->sc_bustag, sc->sc_h1,
sc 315 dev/ic/gem.c mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY,
sc 322 dev/ic/gem.c ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL);
sc 323 dev/ic/gem.c ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
sc 329 dev/ic/gem.c ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_AUTO);
sc 333 dev/ic/gem.c TAILQ_FOREACH(ifm, &sc->sc_media.ifm_list, ifm_list) {
sc 338 dev/ic/gem.c sc->sc_flags |= GEM_GIGABIT;
sc 347 dev/ic/gem.c sc->sc_sh = shutdownhook_establish(gem_shutdown, sc);
sc 348 dev/ic/gem.c if (sc->sc_sh == NULL)
sc 351 dev/ic/gem.c timeout_set(&sc->sc_tick_ch, gem_tick, sc);
sc 360 dev/ic/gem.c if (sc->sc_txd[i].sd_map != NULL)
sc 361 dev/ic/gem.c bus_dmamap_destroy(sc->sc_dmatag,
sc 362 dev/ic/gem.c sc->sc_txd[i].sd_map);
sc 366 dev/ic/gem.c if (sc->sc_rxsoft[i].rxs_dmamap != NULL)
sc 367 dev/ic/gem.c bus_dmamap_destroy(sc->sc_dmatag,
sc 368 dev/ic/gem.c sc->sc_rxsoft[i].rxs_dmamap);
sc 370 dev/ic/gem.c bus_dmamap_unload(sc->sc_dmatag, sc->sc_cddmamap);
sc 372 dev/ic/gem.c bus_dmamap_destroy(sc->sc_dmatag, sc->sc_cddmamap);
sc 374 dev/ic/gem.c bus_dmamem_unmap(sc->sc_dmatag, (caddr_t)sc->sc_control_data,
sc 377 dev/ic/gem.c bus_dmamem_free(sc->sc_dmatag, &sc->sc_cdseg, sc->sc_cdnseg);
sc 386 dev/ic/gem.c struct gem_softc *sc = arg;
sc 387 dev/ic/gem.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 388 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 389 dev/ic/gem.c bus_space_handle_t mac = sc->sc_h1;
sc 406 dev/ic/gem.c mii_tick(&sc->sc_mii);
sc 409 dev/ic/gem.c timeout_add(&sc->sc_tick_ch, hz);
sc 413 dev/ic/gem.c gem_bitwait(struct gem_softc *sc, bus_space_handle_t h, int r,
sc 420 dev/ic/gem.c reg = bus_space_read_4(sc->sc_bustag, h, r);
sc 429 dev/ic/gem.c gem_reset(struct gem_softc *sc)
sc 431 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 432 dev/ic/gem.c bus_space_handle_t h = sc->sc_h2;
sc 436 dev/ic/gem.c DPRINTF(sc, ("%s: gem_reset\n", sc->sc_dev.dv_xname));
sc 437 dev/ic/gem.c gem_reset_rx(sc);
sc 438 dev/ic/gem.c gem_reset_tx(sc);
sc 442 dev/ic/gem.c if (!gem_bitwait(sc, h, GEM_RESET, GEM_RESET_RX | GEM_RESET_TX, 0))
sc 443 dev/ic/gem.c printf("%s: cannot reset device\n", sc->sc_dev.dv_xname);
sc 452 dev/ic/gem.c gem_rxdrain(struct gem_softc *sc)
sc 458 dev/ic/gem.c rxs = &sc->sc_rxsoft[i];
sc 460 dev/ic/gem.c bus_dmamap_sync(sc->sc_dmatag, rxs->rxs_dmamap, 0,
sc 462 dev/ic/gem.c bus_dmamap_unload(sc->sc_dmatag, rxs->rxs_dmamap);
sc 475 dev/ic/gem.c struct gem_softc *sc = (struct gem_softc *)ifp->if_softc;
sc 479 dev/ic/gem.c DPRINTF(sc, ("%s: gem_stop\n", sc->sc_dev.dv_xname));
sc 481 dev/ic/gem.c timeout_del(&sc->sc_tick_ch);
sc 489 dev/ic/gem.c mii_down(&sc->sc_mii);
sc 491 dev/ic/gem.c gem_reset_rx(sc);
sc 492 dev/ic/gem.c gem_reset_tx(sc);
sc 498 dev/ic/gem.c sd = &sc->sc_txd[i];
sc 500 dev/ic/gem.c bus_dmamap_sync(sc->sc_dmatag, sd->sd_map, 0,
sc 502 dev/ic/gem.c bus_dmamap_unload(sc->sc_dmatag, sd->sd_map);
sc 507 dev/ic/gem.c sc->sc_tx_cnt = sc->sc_tx_prod = sc->sc_tx_cons = 0;
sc 510 dev/ic/gem.c gem_rxdrain(sc);
sc 518 dev/ic/gem.c gem_reset_rx(struct gem_softc *sc)
sc 520 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 521 dev/ic/gem.c bus_space_handle_t h = sc->sc_h1, h2 = sc->sc_h2;
sc 527 dev/ic/gem.c gem_disable_rx(sc);
sc 530 dev/ic/gem.c if (!gem_bitwait(sc, h, GEM_RX_CONFIG, 1, 0))
sc 531 dev/ic/gem.c printf("%s: cannot disable rx dma\n", sc->sc_dev.dv_xname);
sc 538 dev/ic/gem.c if (!gem_bitwait(sc, h2, GEM_RESET, GEM_RESET_RX, 0)) {
sc 539 dev/ic/gem.c printf("%s: cannot reset receiver\n", sc->sc_dev.dv_xname);
sc 550 dev/ic/gem.c gem_reset_tx(struct gem_softc *sc)
sc 552 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 553 dev/ic/gem.c bus_space_handle_t h = sc->sc_h1, h2 = sc->sc_h2;
sc 559 dev/ic/gem.c gem_disable_tx(sc);
sc 562 dev/ic/gem.c if (!gem_bitwait(sc, h, GEM_TX_CONFIG, 1, 0))
sc 563 dev/ic/gem.c printf("%s: cannot disable tx dma\n", sc->sc_dev.dv_xname);
sc 570 dev/ic/gem.c if (!gem_bitwait(sc, h2, GEM_RESET, GEM_RESET_TX, 0)) {
sc 572 dev/ic/gem.c sc->sc_dev.dv_xname);
sc 582 dev/ic/gem.c gem_disable_rx(struct gem_softc *sc)
sc 584 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 585 dev/ic/gem.c bus_space_handle_t h = sc->sc_h1;
sc 594 dev/ic/gem.c return (gem_bitwait(sc, h, GEM_MAC_RX_CONFIG, GEM_MAC_RX_ENABLE, 0));
sc 601 dev/ic/gem.c gem_disable_tx(struct gem_softc *sc)
sc 603 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 604 dev/ic/gem.c bus_space_handle_t h = sc->sc_h1;
sc 613 dev/ic/gem.c return (gem_bitwait(sc, h, GEM_MAC_TX_CONFIG, GEM_MAC_TX_ENABLE, 0));
sc 620 dev/ic/gem.c gem_meminit(struct gem_softc *sc)
sc 629 dev/ic/gem.c sc->sc_txdescs[i].gd_flags = 0;
sc 630 dev/ic/gem.c sc->sc_txdescs[i].gd_addr = 0;
sc 632 dev/ic/gem.c GEM_CDTXSYNC(sc, 0, GEM_NTXDESC,
sc 640 dev/ic/gem.c rxs = &sc->sc_rxsoft[i];
sc 642 dev/ic/gem.c if ((error = gem_add_rxbuf(sc, i)) != 0) {
sc 645 dev/ic/gem.c sc->sc_dev.dv_xname, i, error);
sc 650 dev/ic/gem.c gem_rxdrain(sc);
sc 654 dev/ic/gem.c GEM_INIT_RXDESC(sc, i);
sc 656 dev/ic/gem.c sc->sc_rxptr = 0;
sc 697 dev/ic/gem.c struct gem_softc *sc = (struct gem_softc *)ifp->if_softc;
sc 698 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 699 dev/ic/gem.c bus_space_handle_t h = sc->sc_h1;
sc 706 dev/ic/gem.c DPRINTF(sc, ("%s: gem_init: calling stop\n", sc->sc_dev.dv_xname));
sc 716 dev/ic/gem.c gem_reset(sc);
sc 717 dev/ic/gem.c DPRINTF(sc, ("%s: gem_init: restarting\n", sc->sc_dev.dv_xname));
sc 720 dev/ic/gem.c gem_mifinit(sc);
sc 723 dev/ic/gem.c if (sc->sc_hwreset)
sc 724 dev/ic/gem.c (*sc->sc_hwreset)(sc);
sc 727 dev/ic/gem.c gem_meminit(sc);
sc 730 dev/ic/gem.c gem_init_regs(sc);
sc 736 dev/ic/gem.c gem_setladrf(sc);
sc 740 dev/ic/gem.c (((uint64_t)GEM_CDTXADDR(sc,0)) >> 32));
sc 741 dev/ic/gem.c bus_space_write_4(t, h, GEM_TX_RING_PTR_LO, GEM_CDTXADDR(sc, 0));
sc 744 dev/ic/gem.c (((uint64_t)GEM_CDRXADDR(sc,0)) >> 32));
sc 745 dev/ic/gem.c bus_space_write_4(t, h, GEM_RX_RING_PTR_LO, GEM_CDRXADDR(sc, 0));
sc 784 dev/ic/gem.c (3 * sc->sc_rxfifosize / 256) |
sc 785 dev/ic/gem.c ( (sc->sc_rxfifosize / 256) << 12));
sc 789 dev/ic/gem.c mii_mediachg(&sc->sc_mii);
sc 799 dev/ic/gem.c if (sc->sc_hwinit)
sc 800 dev/ic/gem.c (*sc->sc_hwinit)(sc);
sc 807 dev/ic/gem.c timeout_add(&sc->sc_tick_ch, hz);
sc 818 dev/ic/gem.c gem_init_regs(struct gem_softc *sc)
sc 820 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 821 dev/ic/gem.c bus_space_handle_t h = sc->sc_h1;
sc 825 dev/ic/gem.c sc->sc_inited = 0;
sc 826 dev/ic/gem.c if (!sc->sc_inited) {
sc 844 dev/ic/gem.c ((sc->sc_arpcom.ac_enaddr[5]<<8)|sc->sc_arpcom.ac_enaddr[4])&0x3ff);
sc 863 dev/ic/gem.c sc->sc_inited = 1;
sc 886 dev/ic/gem.c (sc->sc_arpcom.ac_enaddr[4]<<8) | sc->sc_arpcom.ac_enaddr[5]);
sc 888 dev/ic/gem.c (sc->sc_arpcom.ac_enaddr[2]<<8) | sc->sc_arpcom.ac_enaddr[3]);
sc 890 dev/ic/gem.c (sc->sc_arpcom.ac_enaddr[0]<<8) | sc->sc_arpcom.ac_enaddr[1]);
sc 896 dev/ic/gem.c sc->sc_mif_config = bus_space_read_4(t, h, GEM_MIF_CONFIG);
sc 898 dev/ic/gem.c if (sc->sc_mif_config & GEM_MIF_CONFIG_MDI1) {
sc 900 dev/ic/gem.c if (sc->sc_flags & GEM_GIGABIT)
sc 910 dev/ic/gem.c gem_rint(struct gem_softc *sc)
sc 912 dev/ic/gem.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 913 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 914 dev/ic/gem.c bus_space_handle_t h = sc->sc_h1;
sc 921 dev/ic/gem.c for (i = sc->sc_rxptr;; i = GEM_NEXTRX(i)) {
sc 922 dev/ic/gem.c rxs = &sc->sc_rxsoft[i];
sc 924 dev/ic/gem.c GEM_CDRXSYNC(sc, i,
sc 927 dev/ic/gem.c rxstat = GEM_DMA_READ(sc, sc->sc_rxdescs[i].gd_flags);
sc 939 dev/ic/gem.c sc->sc_dev.dv_xname);
sc 941 dev/ic/gem.c GEM_INIT_RXDESC(sc, i);
sc 945 dev/ic/gem.c bus_dmamap_sync(sc->sc_dmatag, rxs->rxs_dmamap, 0,
sc 951 dev/ic/gem.c GEM_DMA_READ(sc, sc->sc_rxdescs[i].gd_flags));
sc 953 dev/ic/gem.c GEM_DMA_READ(sc, sc->sc_rxdescs[i].gd_addr));
sc 966 dev/ic/gem.c if (gem_add_rxbuf(sc, i) != 0) {
sc 968 dev/ic/gem.c GEM_INIT_RXDESC(sc, i);
sc 969 dev/ic/gem.c bus_dmamap_sync(sc->sc_dmatag, rxs->rxs_dmamap, 0,
sc 994 dev/ic/gem.c sc->sc_rxptr = i;
sc 997 dev/ic/gem.c DPRINTF(sc, ("gem_rint: done sc->rxptr %d, complete %d\n",
sc 998 dev/ic/gem.c sc->sc_rxptr, bus_space_read_4(t, h, GEM_RX_COMPLETION)));
sc 1008 dev/ic/gem.c gem_add_rxbuf(struct gem_softc *sc, int idx)
sc 1010 dev/ic/gem.c struct gem_rxsoft *rxs = &sc->sc_rxsoft[idx];
sc 1030 dev/ic/gem.c bus_dmamap_unload(sc->sc_dmatag, rxs->rxs_dmamap);
sc 1034 dev/ic/gem.c error = bus_dmamap_load(sc->sc_dmatag, rxs->rxs_dmamap,
sc 1039 dev/ic/gem.c sc->sc_dev.dv_xname, idx, error);
sc 1043 dev/ic/gem.c bus_dmamap_sync(sc->sc_dmatag, rxs->rxs_dmamap, 0,
sc 1046 dev/ic/gem.c GEM_INIT_RXDESC(sc, idx);
sc 1053 dev/ic/gem.c gem_eint(struct gem_softc *sc, u_int status)
sc 1057 dev/ic/gem.c printf("%s: link status changed\n", sc->sc_dev.dv_xname);
sc 1062 dev/ic/gem.c printf("%s: status=%b\n", sc->sc_dev.dv_xname, status, GEM_INTR_BITS);
sc 1067 dev/ic/gem.c gem_pint(struct gem_softc *sc)
sc 1069 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 1070 dev/ic/gem.c bus_space_handle_t seb = sc->sc_h1;
sc 1077 dev/ic/gem.c printf("%s: link status changed\n", sc->sc_dev.dv_xname);
sc 1085 dev/ic/gem.c struct gem_softc *sc = (struct gem_softc *)v;
sc 1086 dev/ic/gem.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1087 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 1088 dev/ic/gem.c bus_space_handle_t seb = sc->sc_h1;
sc 1093 dev/ic/gem.c DPRINTF(sc, ("%s: gem_intr: cplt %xstatus %b\n",
sc 1094 dev/ic/gem.c sc->sc_dev.dv_xname, (status>>19), status, GEM_INTR_BITS));
sc 1097 dev/ic/gem.c r |= gem_pint(sc);
sc 1100 dev/ic/gem.c r |= gem_eint(sc, status);
sc 1103 dev/ic/gem.c r |= gem_tint(sc, status);
sc 1106 dev/ic/gem.c r |= gem_rint(sc);
sc 1114 dev/ic/gem.c sc->sc_dev.dv_xname, txstat);
sc 1124 dev/ic/gem.c sc->sc_dev.dv_xname, rxstat);
sc 1137 dev/ic/gem.c sc->sc_dev.dv_xname, rxstat);
sc 1147 dev/ic/gem.c struct gem_softc *sc = ifp->if_softc;
sc 1149 dev/ic/gem.c DPRINTF(sc, ("gem_watchdog: GEM_RX_CONFIG %x GEM_MAC_RX_STATUS %x "
sc 1151 dev/ic/gem.c bus_space_read_4(sc->sc_bustag, sc->sc_h1, GEM_RX_CONFIG),
sc 1152 dev/ic/gem.c bus_space_read_4(sc->sc_bustag, sc->sc_h1, GEM_MAC_RX_STATUS),
sc 1153 dev/ic/gem.c bus_space_read_4(sc->sc_bustag, sc->sc_h1, GEM_MAC_RX_CONFIG)));
sc 1155 dev/ic/gem.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1166 dev/ic/gem.c gem_mifinit(struct gem_softc *sc)
sc 1168 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 1169 dev/ic/gem.c bus_space_handle_t mif = sc->sc_h1;
sc 1172 dev/ic/gem.c sc->sc_mif_config = bus_space_read_4(t, mif, GEM_MIF_CONFIG);
sc 1173 dev/ic/gem.c sc->sc_mif_config &= ~GEM_MIF_CONFIG_BB_ENA;
sc 1174 dev/ic/gem.c bus_space_write_4(t, mif, GEM_MIF_CONFIG, sc->sc_mif_config);
sc 1194 dev/ic/gem.c struct gem_softc *sc = (void *)self;
sc 1195 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 1196 dev/ic/gem.c bus_space_handle_t mif = sc->sc_h1;
sc 1201 dev/ic/gem.c if (sc->sc_debug)
sc 1217 dev/ic/gem.c printf("%s: mii_read timeout\n", sc->sc_dev.dv_xname);
sc 1224 dev/ic/gem.c struct gem_softc *sc = (void *)self;
sc 1225 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 1226 dev/ic/gem.c bus_space_handle_t mif = sc->sc_h1;
sc 1231 dev/ic/gem.c if (sc->sc_debug)
sc 1250 dev/ic/gem.c printf("%s: mii_write timeout\n", sc->sc_dev.dv_xname);
sc 1256 dev/ic/gem.c struct gem_softc *sc = (void *)dev;
sc 1258 dev/ic/gem.c int instance = IFM_INST(sc->sc_mii.mii_media.ifm_cur->ifm_media);
sc 1260 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 1261 dev/ic/gem.c bus_space_handle_t mac = sc->sc_h1;
sc 1265 dev/ic/gem.c if (sc->sc_debug)
sc 1274 dev/ic/gem.c if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0) {
sc 1285 dev/ic/gem.c sc->sc_mif_config = bus_space_read_4(t, mac, GEM_MIF_CONFIG);
sc 1286 dev/ic/gem.c if ((sc->sc_mif_config & GEM_MIF_CONFIG_MDI1) != 0) {
sc 1288 dev/ic/gem.c if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0)
sc 1295 dev/ic/gem.c switch (IFM_SUBTYPE(sc->sc_mii.mii_media_active)) {
sc 1312 dev/ic/gem.c struct gem_softc *sc = (void *)self;
sc 1313 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 1314 dev/ic/gem.c bus_space_handle_t pcs = sc->sc_h1;
sc 1317 dev/ic/gem.c if (sc->sc_debug)
sc 1349 dev/ic/gem.c struct gem_softc *sc = (void *)self;
sc 1350 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 1351 dev/ic/gem.c bus_space_handle_t pcs = sc->sc_h1;
sc 1354 dev/ic/gem.c if (sc->sc_debug)
sc 1392 dev/ic/gem.c struct gem_softc *sc = ifp->if_softc;
sc 1393 dev/ic/gem.c struct mii_data *mii = &sc->sc_mii;
sc 1401 dev/ic/gem.c return (mii_mediachg(&sc->sc_mii));
sc 1407 dev/ic/gem.c struct gem_softc *sc = ifp->if_softc;
sc 1409 dev/ic/gem.c mii_pollstat(&sc->sc_mii);
sc 1410 dev/ic/gem.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 1411 dev/ic/gem.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 1420 dev/ic/gem.c struct gem_softc *sc = ifp->if_softc;
sc 1427 dev/ic/gem.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 1440 dev/ic/gem.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 1447 dev/ic/gem.c ((ifp->if_flags ^ sc->sc_if_flags) &
sc 1449 dev/ic/gem.c gem_setladrf(sc);
sc 1458 dev/ic/gem.c sc->sc_if_flags = ifp->if_flags;
sc 1461 dev/ic/gem.c sc->sc_debug = (ifp->if_flags & IFF_DEBUG) != 0 ? 1 : 0;
sc 1476 dev/ic/gem.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 1477 dev/ic/gem.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 1485 dev/ic/gem.c gem_setladrf(sc);
sc 1492 dev/ic/gem.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
sc 1508 dev/ic/gem.c struct gem_softc *sc = (struct gem_softc *)arg;
sc 1509 dev/ic/gem.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1518 dev/ic/gem.c gem_setladrf(struct gem_softc *sc)
sc 1520 dev/ic/gem.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1523 dev/ic/gem.c struct arpcom *ac = &sc->sc_arpcom;
sc 1524 dev/ic/gem.c bus_space_tag_t t = sc->sc_bustag;
sc 1525 dev/ic/gem.c bus_space_handle_t h = sc->sc_h1;
sc 1604 dev/ic/gem.c gem_encap(struct gem_softc *sc, struct mbuf *mhead, u_int32_t *bixp)
sc 1611 dev/ic/gem.c map = sc->sc_txd[cur].sd_map;
sc 1613 dev/ic/gem.c if (bus_dmamap_load_mbuf(sc->sc_dmatag, map, mhead,
sc 1618 dev/ic/gem.c if ((sc->sc_tx_cnt + map->dm_nsegs) > (GEM_NTXDESC - 2)) {
sc 1619 dev/ic/gem.c bus_dmamap_unload(sc->sc_dmatag, map);
sc 1623 dev/ic/gem.c bus_dmamap_sync(sc->sc_dmatag, map, 0, map->dm_mapsize,
sc 1627 dev/ic/gem.c sc->sc_txdescs[frag].gd_addr =
sc 1628 dev/ic/gem.c GEM_DMA_WRITE(sc, map->dm_segs[i].ds_addr);
sc 1632 dev/ic/gem.c sc->sc_txdescs[frag].gd_flags = GEM_DMA_WRITE(sc, flags);
sc 1633 dev/ic/gem.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_cddmamap,
sc 1641 dev/ic/gem.c sc->sc_tx_cnt += map->dm_nsegs;
sc 1642 dev/ic/gem.c sc->sc_txd[*bixp].sd_map = sc->sc_txd[cur].sd_map;
sc 1643 dev/ic/gem.c sc->sc_txd[cur].sd_map = map;
sc 1644 dev/ic/gem.c sc->sc_txd[cur].sd_mbuf = mhead;
sc 1646 dev/ic/gem.c bus_space_write_4(sc->sc_bustag, sc->sc_h1, GEM_TX_KICK, frag);
sc 1659 dev/ic/gem.c gem_tint(struct gem_softc *sc, u_int32_t status)
sc 1661 dev/ic/gem.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1666 dev/ic/gem.c cons = sc->sc_tx_cons;
sc 1668 dev/ic/gem.c sd = &sc->sc_txd[cons];
sc 1670 dev/ic/gem.c bus_dmamap_sync(sc->sc_dmatag, sd->sd_map, 0,
sc 1672 dev/ic/gem.c bus_dmamap_unload(sc->sc_dmatag, sd->sd_map);
sc 1676 dev/ic/gem.c sc->sc_tx_cnt--;
sc 1681 dev/ic/gem.c sc->sc_tx_cons = cons;
sc 1685 dev/ic/gem.c if (sc->sc_tx_cnt == 0)
sc 1694 dev/ic/gem.c struct gem_softc *sc = ifp->if_softc;
sc 1701 dev/ic/gem.c bix = sc->sc_tx_prod;
sc 1702 dev/ic/gem.c while (sc->sc_txd[bix].sd_mbuf == NULL) {
sc 1720 dev/ic/gem.c if (gem_encap(sc, m, &bix)) {
sc 1729 dev/ic/gem.c sc->sc_tx_prod = bix;
sc 209 dev/ic/gemvar.h #define GEM_DMA_READ(sc, v) (((sc)->sc_pci) ? letoh64(v) : betoh64(v))
sc 210 dev/ic/gemvar.h #define GEM_DMA_WRITE(sc, v) (((sc)->sc_pci) ? htole64(v) : htobe64(v))
sc 215 dev/ic/gemvar.h #define GEM_CURRENT_MEDIA(sc) \
sc 216 dev/ic/gemvar.h (IFM_SUBTYPE((sc)->sc_mii.mii_media.ifm_cur->ifm_media) != IFM_AUTO ? \
sc 217 dev/ic/gemvar.h (sc)->sc_mii.mii_media.ifm_cur : (sc)->sc_nway_active)
sc 223 dev/ic/gemvar.h #define GEM_MEDIA_NEEDSRESET(sc, newbits) \
sc 224 dev/ic/gemvar.h (((sc)->sc_opmode & OPMODE_MEDIA_BITS) != \
sc 227 dev/ic/gemvar.h #define GEM_CDTXADDR(sc, x) ((sc)->sc_cddma + GEM_CDTXOFF((x)))
sc 228 dev/ic/gemvar.h #define GEM_CDRXADDR(sc, x) ((sc)->sc_cddma + GEM_CDRXOFF((x)))
sc 230 dev/ic/gemvar.h #define GEM_CDSPADDR(sc) ((sc)->sc_cddma + GEM_CDSPOFF)
sc 232 dev/ic/gemvar.h #define GEM_CDTXSYNC(sc, x, n, ops) \
sc 241 dev/ic/gemvar.h bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap, \
sc 249 dev/ic/gemvar.h bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap, \
sc 253 dev/ic/gemvar.h #define GEM_CDRXSYNC(sc, x, ops) \
sc 254 dev/ic/gemvar.h bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap, \
sc 257 dev/ic/gemvar.h #define GEM_CDSPSYNC(sc, ops) \
sc 258 dev/ic/gemvar.h bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap, \
sc 261 dev/ic/gemvar.h #define GEM_INIT_RXDESC(sc, x) \
sc 263 dev/ic/gemvar.h struct gem_rxsoft *__rxs = &sc->sc_rxsoft[(x)]; \
sc 264 dev/ic/gemvar.h struct gem_desc *__rxd = &sc->sc_rxdescs[(x)]; \
sc 269 dev/ic/gemvar.h GEM_DMA_WRITE((sc), __rxs->rxs_dmamap->dm_segs[0].ds_addr); \
sc 271 dev/ic/gemvar.h GEM_DMA_WRITE((sc), \
sc 274 dev/ic/gemvar.h GEM_CDRXSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
sc 277 dev/ic/gemvar.h #define GEM_IS_APPLE(sc) \
sc 278 dev/ic/gemvar.h ((sc)->sc_variant >= GEM_APPLE_INTREPID2_GMAC && \
sc 279 dev/ic/gemvar.h (sc)->sc_variant <= GEM_APPLE_UNINORTH2GMAC)
sc 121 dev/ic/hme.c hme_config(sc)
sc 122 dev/ic/hme.c struct hme_softc *sc;
sc 124 dev/ic/hme.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 125 dev/ic/hme.c struct mii_data *mii = &sc->sc_mii;
sc 127 dev/ic/hme.c bus_dma_tag_t dmatag = sc->sc_dmatag;
sc 159 dev/ic/hme.c hme_stop(sc);
sc 162 dev/ic/hme.c if (bus_dmamap_create(sc->sc_dmatag, MCLBYTES, 1,
sc 164 dev/ic/hme.c &sc->sc_txd[i].sd_map) != 0) {
sc 165 dev/ic/hme.c sc->sc_txd[i].sd_map = NULL;
sc 170 dev/ic/hme.c if (bus_dmamap_create(sc->sc_dmatag, MCLBYTES, 1,
sc 172 dev/ic/hme.c &sc->sc_rxd[i].sd_map) != 0) {
sc 173 dev/ic/hme.c sc->sc_rxd[i].sd_map = NULL;
sc 177 dev/ic/hme.c if (bus_dmamap_create(sc->sc_dmatag, MCLBYTES, 1, MCLBYTES, 0,
sc 178 dev/ic/hme.c BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &sc->sc_rxmap_spare) != 0) {
sc 179 dev/ic/hme.c sc->sc_rxmap_spare = NULL;
sc 197 dev/ic/hme.c sc->sc_dev.dv_xname, error);
sc 203 dev/ic/hme.c &sc->sc_rb.rb_membase, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
sc 205 dev/ic/hme.c sc->sc_dev.dv_xname, error);
sc 206 dev/ic/hme.c bus_dmamap_unload(dmatag, sc->sc_dmamap);
sc 212 dev/ic/hme.c BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
sc 214 dev/ic/hme.c sc->sc_dev.dv_xname, error);
sc 219 dev/ic/hme.c if ((error = bus_dmamap_load(dmatag, sc->sc_dmamap,
sc 220 dev/ic/hme.c sc->sc_rb.rb_membase, size, NULL,
sc 223 dev/ic/hme.c sc->sc_dev.dv_xname, error);
sc 227 dev/ic/hme.c sc->sc_rb.rb_dmabase = sc->sc_dmamap->dm_segs[0].ds_addr;
sc 229 dev/ic/hme.c printf(", address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 232 dev/ic/hme.c strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, sizeof ifp->if_xname);
sc 233 dev/ic/hme.c ifp->if_softc = sc;
sc 239 dev/ic/hme.c sc->sc_if_flags = ifp->if_flags;
sc 252 dev/ic/hme.c hme_mifinit(sc);
sc 254 dev/ic/hme.c if (sc->sc_tcvr == -1)
sc 255 dev/ic/hme.c mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY,
sc 258 dev/ic/hme.c mii_attach(&sc->sc_dev, mii, 0xffffffff, sc->sc_tcvr,
sc 264 dev/ic/hme.c ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL);
sc 265 dev/ic/hme.c ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
sc 283 dev/ic/hme.c sc->sc_dev.dv_xname,
sc 289 dev/ic/hme.c sc->sc_phys[child->mii_inst] = child->mii_phy;
sc 296 dev/ic/hme.c ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_AUTO);
sc 303 dev/ic/hme.c sc->sc_sh = shutdownhook_establish(hme_shutdown, sc);
sc 304 dev/ic/hme.c if (sc->sc_sh == NULL)
sc 307 dev/ic/hme.c timeout_set(&sc->sc_tick_ch, hme_tick, sc);
sc 311 dev/ic/hme.c if (sc->sc_rxmap_spare != NULL)
sc 312 dev/ic/hme.c bus_dmamap_destroy(sc->sc_dmatag, sc->sc_rxmap_spare);
sc 314 dev/ic/hme.c if (sc->sc_txd[i].sd_map != NULL)
sc 315 dev/ic/hme.c bus_dmamap_destroy(sc->sc_dmatag, sc->sc_txd[i].sd_map);
sc 317 dev/ic/hme.c if (sc->sc_rxd[i].sd_map != NULL)
sc 318 dev/ic/hme.c bus_dmamap_destroy(sc->sc_dmatag, sc->sc_rxd[i].sd_map);
sc 325 dev/ic/hme.c struct hme_softc *sc = arg;
sc 326 dev/ic/hme.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 327 dev/ic/hme.c bus_space_tag_t t = sc->sc_bustag;
sc 328 dev/ic/hme.c bus_space_handle_t mac = sc->sc_mac;
sc 349 dev/ic/hme.c mii_tick(&sc->sc_mii);
sc 352 dev/ic/hme.c timeout_add(&sc->sc_tick_ch, hz);
sc 356 dev/ic/hme.c hme_reset(sc)
sc 357 dev/ic/hme.c struct hme_softc *sc;
sc 362 dev/ic/hme.c hme_init(sc);
sc 367 dev/ic/hme.c hme_stop(sc)
sc 368 dev/ic/hme.c struct hme_softc *sc;
sc 370 dev/ic/hme.c bus_space_tag_t t = sc->sc_bustag;
sc 371 dev/ic/hme.c bus_space_handle_t seb = sc->sc_seb;
sc 374 dev/ic/hme.c timeout_del(&sc->sc_tick_ch);
sc 375 dev/ic/hme.c mii_down(&sc->sc_mii);
sc 391 dev/ic/hme.c printf("%s: hme_stop: reset failed\n", sc->sc_dev.dv_xname);
sc 394 dev/ic/hme.c if (sc->sc_txd[n].sd_loaded) {
sc 395 dev/ic/hme.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_txd[n].sd_map,
sc 396 dev/ic/hme.c 0, sc->sc_txd[n].sd_map->dm_mapsize,
sc 398 dev/ic/hme.c bus_dmamap_unload(sc->sc_dmatag, sc->sc_txd[n].sd_map);
sc 399 dev/ic/hme.c sc->sc_txd[n].sd_loaded = 0;
sc 401 dev/ic/hme.c if (sc->sc_txd[n].sd_mbuf != NULL) {
sc 402 dev/ic/hme.c m_freem(sc->sc_txd[n].sd_mbuf);
sc 403 dev/ic/hme.c sc->sc_txd[n].sd_mbuf = NULL;
sc 409 dev/ic/hme.c hme_meminit(sc)
sc 410 dev/ic/hme.c struct hme_softc *sc;
sc 415 dev/ic/hme.c struct hme_ring *hr = &sc->sc_rb;
sc 446 dev/ic/hme.c HME_XD_SETADDR(sc->sc_pci, hr->rb_txd, i, 0);
sc 447 dev/ic/hme.c HME_XD_SETFLAGS(sc->sc_pci, hr->rb_txd, i, 0);
sc 448 dev/ic/hme.c sc->sc_txd[i].sd_mbuf = NULL;
sc 455 dev/ic/hme.c if (hme_newbuf(sc, &sc->sc_rxd[i], 1)) {
sc 457 dev/ic/hme.c sc->sc_dev.dv_xname);
sc 460 dev/ic/hme.c HME_XD_SETADDR(sc->sc_pci, hr->rb_rxd, i,
sc 461 dev/ic/hme.c sc->sc_rxd[i].sd_map->dm_segs[0].ds_addr);
sc 462 dev/ic/hme.c HME_XD_SETFLAGS(sc->sc_pci, hr->rb_rxd, i,
sc 466 dev/ic/hme.c sc->sc_tx_prod = sc->sc_tx_cons = sc->sc_tx_cnt = 0;
sc 467 dev/ic/hme.c sc->sc_last_rd = 0;
sc 475 dev/ic/hme.c hme_init(sc)
sc 476 dev/ic/hme.c struct hme_softc *sc;
sc 478 dev/ic/hme.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 479 dev/ic/hme.c bus_space_tag_t t = sc->sc_bustag;
sc 480 dev/ic/hme.c bus_space_handle_t seb = sc->sc_seb;
sc 481 dev/ic/hme.c bus_space_handle_t etx = sc->sc_etx;
sc 482 dev/ic/hme.c bus_space_handle_t erx = sc->sc_erx;
sc 483 dev/ic/hme.c bus_space_handle_t mac = sc->sc_mac;
sc 495 dev/ic/hme.c hme_stop(sc);
sc 498 dev/ic/hme.c hme_mifinit(sc);
sc 501 dev/ic/hme.c if (sc->sc_hwreset)
sc 502 dev/ic/hme.c (*sc->sc_hwreset)(sc);
sc 510 dev/ic/hme.c hme_meminit(sc);
sc 520 dev/ic/hme.c ea = sc->sc_arpcom.ac_enaddr;
sc 537 dev/ic/hme.c hme_setladrf(sc);
sc 540 dev/ic/hme.c bus_space_write_4(t, etx, HME_ETXI_RING, sc->sc_rb.rb_txddma);
sc 543 dev/ic/hme.c bus_space_write_4(t, erx, HME_ERXI_RING, sc->sc_rb.rb_rxddma);
sc 552 dev/ic/hme.c switch (sc->sc_burst) {
sc 618 dev/ic/hme.c if (sc->sc_hwinit)
sc 619 dev/ic/hme.c (*sc->sc_hwinit)(sc);
sc 622 dev/ic/hme.c mii_mediachg(&sc->sc_mii);
sc 625 dev/ic/hme.c timeout_add(&sc->sc_tick_ch, hz);
sc 629 dev/ic/hme.c sc->sc_if_flags = ifp->if_flags;
sc 638 dev/ic/hme.c struct hme_softc *sc = (struct hme_softc *)ifp->if_softc;
sc 645 dev/ic/hme.c bix = sc->sc_tx_prod;
sc 646 dev/ic/hme.c while (sc->sc_txd[bix].sd_mbuf == NULL) {
sc 660 dev/ic/hme.c if (hme_encap(sc, m, &bix)) {
sc 667 dev/ic/hme.c bus_space_write_4(sc->sc_bustag, sc->sc_etx, HME_ETXI_PENDING,
sc 673 dev/ic/hme.c sc->sc_tx_prod = bix;
sc 682 dev/ic/hme.c hme_tint(sc)
sc 683 dev/ic/hme.c struct hme_softc *sc;
sc 685 dev/ic/hme.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 688 dev/ic/hme.c int cnt = sc->sc_tx_cnt;
sc 691 dev/ic/hme.c ri = sc->sc_tx_cons;
sc 692 dev/ic/hme.c sd = &sc->sc_txd[ri];
sc 698 dev/ic/hme.c txflags = HME_XD_GETFLAGS(sc->sc_pci, sc->sc_rb.rb_txd, ri);
sc 707 dev/ic/hme.c bus_dmamap_sync(sc->sc_dmatag, sd->sd_map,
sc 709 dev/ic/hme.c bus_dmamap_unload(sc->sc_dmatag, sd->sd_map);
sc 719 dev/ic/hme.c sd = sc->sc_txd;
sc 726 dev/ic/hme.c sc->sc_tx_cnt = cnt;
sc 730 dev/ic/hme.c sc->sc_tx_cons = ri;
sc 836 dev/ic/hme.c hme_rint(sc)
sc 837 dev/ic/hme.c struct hme_softc *sc;
sc 839 dev/ic/hme.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 845 dev/ic/hme.c ri = sc->sc_last_rd;
sc 846 dev/ic/hme.c sd = &sc->sc_rxd[ri];
sc 852 dev/ic/hme.c flags = HME_XD_GETFLAGS(sc->sc_pci, sc->sc_rb.rb_rxd, ri);
sc 858 dev/ic/hme.c sc->sc_dev.dv_xname, ri, flags);
sc 866 dev/ic/hme.c if (hme_newbuf(sc, sd, 0)) {
sc 886 dev/ic/hme.c HME_XD_SETADDR(sc->sc_pci, sc->sc_rb.rb_rxd, ri,
sc 888 dev/ic/hme.c HME_XD_SETFLAGS(sc->sc_pci, sc->sc_rb.rb_rxd, ri,
sc 893 dev/ic/hme.c sd = sc->sc_rxd;
sc 898 dev/ic/hme.c sc->sc_last_rd = ri;
sc 903 dev/ic/hme.c hme_eint(sc, status)
sc 904 dev/ic/hme.c struct hme_softc *sc;
sc 907 dev/ic/hme.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 910 dev/ic/hme.c printf("%s: XXXlink status changed\n", sc->sc_dev.dv_xname);
sc 932 dev/ic/hme.c printf("%s: status=%b\n", sc->sc_dev.dv_xname, status, HME_SEB_STAT_BITS);
sc 941 dev/ic/hme.c struct hme_softc *sc = (struct hme_softc *)v;
sc 942 dev/ic/hme.c bus_space_tag_t t = sc->sc_bustag;
sc 943 dev/ic/hme.c bus_space_handle_t seb = sc->sc_seb;
sc 950 dev/ic/hme.c r |= hme_eint(sc, status);
sc 953 dev/ic/hme.c r |= hme_tint(sc);
sc 956 dev/ic/hme.c r |= hme_rint(sc);
sc 966 dev/ic/hme.c struct hme_softc *sc = ifp->if_softc;
sc 968 dev/ic/hme.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 971 dev/ic/hme.c hme_reset(sc);
sc 978 dev/ic/hme.c hme_mifinit(sc)
sc 979 dev/ic/hme.c struct hme_softc *sc;
sc 981 dev/ic/hme.c bus_space_tag_t t = sc->sc_bustag;
sc 982 dev/ic/hme.c bus_space_handle_t mif = sc->sc_mif;
sc 983 dev/ic/hme.c bus_space_handle_t mac = sc->sc_mac;
sc 990 dev/ic/hme.c phy = sc->sc_tcvr = HME_PHYAD_EXTERNAL;
sc 992 dev/ic/hme.c phy = sc->sc_tcvr = HME_PHYAD_INTERNAL;
sc 994 dev/ic/hme.c sc->sc_tcvr = -1;
sc 1018 dev/ic/hme.c struct hme_softc *sc = (struct hme_softc *)self;
sc 1019 dev/ic/hme.c bus_space_tag_t t = sc->sc_bustag;
sc 1020 dev/ic/hme.c bus_space_handle_t mif = sc->sc_mif;
sc 1021 dev/ic/hme.c bus_space_handle_t mac = sc->sc_mac;
sc 1061 dev/ic/hme.c printf("%s: mii_read timeout\n", sc->sc_dev.dv_xname);
sc 1076 dev/ic/hme.c struct hme_softc *sc = (void *)self;
sc 1077 dev/ic/hme.c bus_space_tag_t t = sc->sc_bustag;
sc 1078 dev/ic/hme.c bus_space_handle_t mif = sc->sc_mif;
sc 1079 dev/ic/hme.c bus_space_handle_t mac = sc->sc_mac;
sc 1118 dev/ic/hme.c printf("%s: mii_write timeout\n", sc->sc_dev.dv_xname);
sc 1130 dev/ic/hme.c struct hme_softc *sc = (void *)dev;
sc 1131 dev/ic/hme.c bus_space_tag_t t = sc->sc_bustag;
sc 1132 dev/ic/hme.c bus_space_handle_t mac = sc->sc_mac;
sc 1136 dev/ic/hme.c if (sc->sc_debug)
sc 1144 dev/ic/hme.c if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0) {
sc 1146 dev/ic/hme.c sc->sc_arpcom.ac_if.if_flags |= IFF_SIMPLEX;
sc 1149 dev/ic/hme.c sc->sc_arpcom.ac_if.if_flags &= ~IFF_SIMPLEX;
sc 1151 dev/ic/hme.c sc->sc_if_flags = sc->sc_arpcom.ac_if.if_flags;
sc 1159 dev/ic/hme.c struct hme_softc *sc = ifp->if_softc;
sc 1160 dev/ic/hme.c bus_space_tag_t t = sc->sc_bustag;
sc 1161 dev/ic/hme.c bus_space_handle_t mif = sc->sc_mif;
sc 1162 dev/ic/hme.c bus_space_handle_t mac = sc->sc_mac;
sc 1163 dev/ic/hme.c int instance = IFM_INST(sc->sc_mii.mii_media.ifm_cur->ifm_media);
sc 1164 dev/ic/hme.c int phy = sc->sc_phys[instance];
sc 1168 dev/ic/hme.c if (sc->sc_debug)
sc 1171 dev/ic/hme.c if (IFM_TYPE(sc->sc_media.ifm_media) != IFM_ETHER)
sc 1188 dev/ic/hme.c return (mii_mediachg(&sc->sc_mii));
sc 1196 dev/ic/hme.c struct hme_softc *sc = ifp->if_softc;
sc 1201 dev/ic/hme.c mii_pollstat(&sc->sc_mii);
sc 1202 dev/ic/hme.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 1203 dev/ic/hme.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 1215 dev/ic/hme.c struct hme_softc *sc = ifp->if_softc;
sc 1222 dev/ic/hme.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 1234 dev/ic/hme.c hme_setladrf(sc);
sc 1237 dev/ic/hme.c hme_init(sc);
sc 1239 dev/ic/hme.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 1243 dev/ic/hme.c hme_init(sc);
sc 1255 dev/ic/hme.c hme_stop(sc);
sc 1263 dev/ic/hme.c hme_init(sc);
sc 1271 dev/ic/hme.c if (ifp->if_flags == sc->sc_if_flags)
sc 1274 dev/ic/hme.c == (sc->sc_if_flags & (~RESETIGN)))
sc 1275 dev/ic/hme.c hme_setladrf(sc);
sc 1277 dev/ic/hme.c hme_init(sc);
sc 1281 dev/ic/hme.c sc->sc_debug = (ifp->if_flags & IFF_DEBUG) != 0 ? 1 : 0;
sc 1288 dev/ic/hme.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 1289 dev/ic/hme.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 1297 dev/ic/hme.c hme_setladrf(sc);
sc 1304 dev/ic/hme.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
sc 1312 dev/ic/hme.c sc->sc_if_flags = ifp->if_flags;
sc 1328 dev/ic/hme.c hme_setladrf(sc)
sc 1329 dev/ic/hme.c struct hme_softc *sc;
sc 1331 dev/ic/hme.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1334 dev/ic/hme.c struct arpcom *ac = &sc->sc_arpcom;
sc 1335 dev/ic/hme.c bus_space_tag_t t = sc->sc_bustag;
sc 1336 dev/ic/hme.c bus_space_handle_t mac = sc->sc_mac;
sc 1402 dev/ic/hme.c hme_encap(sc, mhead, bixp)
sc 1403 dev/ic/hme.c struct hme_softc *sc;
sc 1411 dev/ic/hme.c struct hme_ring *hr = &sc->sc_rb;
sc 1414 dev/ic/hme.c sd = &sc->sc_txd[frag];
sc 1420 dev/ic/hme.c if ((HME_TX_RING_SIZE - (sc->sc_tx_cnt + cnt)) < 5)
sc 1423 dev/ic/hme.c if (bus_dmamap_load(sc->sc_dmatag, sd->sd_map,
sc 1428 dev/ic/hme.c bus_dmamap_sync(sc->sc_dmatag, sd->sd_map, 0,
sc 1439 dev/ic/hme.c HME_XD_SETADDR(sc->sc_pci, hr->rb_txd, frag,
sc 1441 dev/ic/hme.c HME_XD_SETFLAGS(sc->sc_pci, hr->rb_txd, frag, flags);
sc 1447 dev/ic/hme.c sd = sc->sc_txd;
sc 1453 dev/ic/hme.c flags = HME_XD_GETFLAGS(sc->sc_pci, hr->rb_txd, cur);
sc 1455 dev/ic/hme.c HME_XD_SETFLAGS(sc->sc_pci, hr->rb_txd, cur, flags);
sc 1456 dev/ic/hme.c sc->sc_txd[cur].sd_mbuf = mhead;
sc 1459 dev/ic/hme.c flags = HME_XD_GETFLAGS(sc->sc_pci, hr->rb_txd, (*bixp));
sc 1461 dev/ic/hme.c HME_XD_SETFLAGS(sc->sc_pci, hr->rb_txd, (*bixp), flags);
sc 1463 dev/ic/hme.c sc->sc_tx_cnt += cnt;
sc 1478 dev/ic/hme.c sd = &sc->sc_txd[frag];
sc 1479 dev/ic/hme.c bus_dmamap_sync(sc->sc_dmatag, sd->sd_map, 0,
sc 1481 dev/ic/hme.c bus_dmamap_unload(sc->sc_dmatag, sd->sd_map);
sc 1489 dev/ic/hme.c hme_newbuf(sc, d, freeit)
sc 1490 dev/ic/hme.c struct hme_softc *sc;
sc 1505 dev/ic/hme.c m->m_pkthdr.rcvif = &sc->sc_arpcom.ac_if;
sc 1513 dev/ic/hme.c if (bus_dmamap_load(sc->sc_dmatag, sc->sc_rxmap_spare,
sc 1527 dev/ic/hme.c bus_dmamap_sync(sc->sc_dmatag, d->sd_map,
sc 1529 dev/ic/hme.c bus_dmamap_unload(sc->sc_dmatag, d->sd_map);
sc 1539 dev/ic/hme.c d->sd_map = sc->sc_rxmap_spare;
sc 1540 dev/ic/hme.c sc->sc_rxmap_spare = map;
sc 1544 dev/ic/hme.c bus_dmamap_sync(sc->sc_dmatag, d->sd_map, 0, d->sd_map->dm_mapsize,
sc 199 dev/ic/i82365.c pcic_attach(sc)
sc 200 dev/ic/i82365.c struct pcic_softc *sc;
sc 215 dev/ic/i82365.c sc->handle[0].ph_parent = (struct device *)sc;
sc 216 dev/ic/i82365.c sc->handle[0].sock = C0SA;
sc 218 dev/ic/i82365.c sc->handle[0].ph_read = st_pcic_read;
sc 219 dev/ic/i82365.c sc->handle[0].ph_write = st_pcic_write;
sc 220 dev/ic/i82365.c sc->handle[0].ph_bus_t = sc->iot;
sc 221 dev/ic/i82365.c sc->handle[0].ph_bus_h = sc->ioh;
sc 222 dev/ic/i82365.c if (pcic_ident_ok(reg = pcic_read(&sc->handle[0], PCIC_IDENT))) {
sc 223 dev/ic/i82365.c sc->handle[0].flags = PCIC_FLAG_SOCKETP;
sc 226 dev/ic/i82365.c sc->handle[0].flags = 0;
sc 228 dev/ic/i82365.c sc->handle[0].laststate = PCIC_LASTSTATE_EMPTY;
sc 232 dev/ic/i82365.c sc->handle[1].ph_parent = (struct device *)sc;
sc 233 dev/ic/i82365.c sc->handle[1].sock = C0SB;
sc 235 dev/ic/i82365.c sc->handle[1].ph_read = st_pcic_read;
sc 236 dev/ic/i82365.c sc->handle[1].ph_write = st_pcic_write;
sc 237 dev/ic/i82365.c sc->handle[1].ph_bus_t = sc->iot;
sc 238 dev/ic/i82365.c sc->handle[1].ph_bus_h = sc->ioh;
sc 239 dev/ic/i82365.c if (pcic_ident_ok(reg = pcic_read(&sc->handle[1], PCIC_IDENT))) {
sc 240 dev/ic/i82365.c sc->handle[1].flags = PCIC_FLAG_SOCKETP;
sc 243 dev/ic/i82365.c sc->handle[1].flags = 0;
sc 245 dev/ic/i82365.c sc->handle[1].laststate = PCIC_LASTSTATE_EMPTY;
sc 254 dev/ic/i82365.c sc->handle[2].ph_parent = (struct device *)sc;
sc 255 dev/ic/i82365.c sc->handle[2].sock = C1SA;
sc 257 dev/ic/i82365.c sc->handle[2].ph_read = st_pcic_read;
sc 258 dev/ic/i82365.c sc->handle[2].ph_write = st_pcic_write;
sc 259 dev/ic/i82365.c sc->handle[2].ph_bus_t = sc->iot;
sc 260 dev/ic/i82365.c sc->handle[2].ph_bus_h = sc->ioh;
sc 261 dev/ic/i82365.c if (pcic_vendor(&sc->handle[0]) != PCIC_VENDOR_CIRRUS_PD672X ||
sc 262 dev/ic/i82365.c pcic_read(&sc->handle[2], PCIC_IDENT) != 0) {
sc 263 dev/ic/i82365.c if (pcic_ident_ok(reg = pcic_read(&sc->handle[2],
sc 265 dev/ic/i82365.c sc->handle[2].flags = PCIC_FLAG_SOCKETP;
sc 268 dev/ic/i82365.c sc->handle[2].flags = 0;
sc 270 dev/ic/i82365.c sc->handle[2].laststate = PCIC_LASTSTATE_EMPTY;
sc 274 dev/ic/i82365.c sc->handle[3].ph_parent = (struct device *)sc;
sc 275 dev/ic/i82365.c sc->handle[3].sock = C1SB;
sc 277 dev/ic/i82365.c sc->handle[3].ph_read = st_pcic_read;
sc 278 dev/ic/i82365.c sc->handle[3].ph_write = st_pcic_write;
sc 279 dev/ic/i82365.c sc->handle[3].ph_bus_t = sc->iot;
sc 280 dev/ic/i82365.c sc->handle[3].ph_bus_h = sc->ioh;
sc 281 dev/ic/i82365.c if (pcic_ident_ok(reg = pcic_read(&sc->handle[3],
sc 283 dev/ic/i82365.c sc->handle[3].flags = PCIC_FLAG_SOCKETP;
sc 286 dev/ic/i82365.c sc->handle[3].flags = 0;
sc 288 dev/ic/i82365.c sc->handle[3].laststate = PCIC_LASTSTATE_EMPTY;
sc 292 dev/ic/i82365.c sc->handle[2].flags = 0;
sc 293 dev/ic/i82365.c sc->handle[3].flags = 0;
sc 308 dev/ic/i82365.c if (sc->handle[i].flags & PCIC_FLAG_SOCKETP) {
sc 309 dev/ic/i82365.c SIMPLEQ_INIT(&sc->handle[i].events);
sc 310 dev/ic/i82365.c pcic_write(&sc->handle[i], PCIC_CSC_INTR, 0);
sc 311 dev/ic/i82365.c pcic_read(&sc->handle[i], PCIC_CSC);
sc 316 dev/ic/i82365.c if ((sc->handle[i+0].flags & PCIC_FLAG_SOCKETP) ||
sc 317 dev/ic/i82365.c (sc->handle[i+1].flags & PCIC_FLAG_SOCKETP)) {
sc 318 dev/ic/i82365.c vendor = pcic_vendor(&sc->handle[i]);
sc 321 dev/ic/i82365.c sc->dev.dv_xname, i/2,
sc 324 dev/ic/i82365.c if ((sc->handle[i+0].flags & PCIC_FLAG_SOCKETP) &&
sc 325 dev/ic/i82365.c (sc->handle[i+1].flags & PCIC_FLAG_SOCKETP))
sc 327 dev/ic/i82365.c else if (sc->handle[i+0].flags & PCIC_FLAG_SOCKETP)
sc 332 dev/ic/i82365.c if (sc->handle[i+0].flags & PCIC_FLAG_SOCKETP)
sc 333 dev/ic/i82365.c sc->handle[i+0].vendor = vendor;
sc 334 dev/ic/i82365.c if (sc->handle[i+1].flags & PCIC_FLAG_SOCKETP)
sc 335 dev/ic/i82365.c sc->handle[i+1].vendor = vendor;
sc 341 dev/ic/i82365.c pcic_attach_sockets(sc)
sc 342 dev/ic/i82365.c struct pcic_softc *sc;
sc 347 dev/ic/i82365.c if (sc->handle[i].flags & PCIC_FLAG_SOCKETP)
sc 348 dev/ic/i82365.c pcic_attach_socket(&sc->handle[i]);
sc 356 dev/ic/i82365.c struct pcic_softc *sc = (struct pcic_softc *)(h->ph_parent);
sc 368 dev/ic/i82365.c paa.pct = (pcmcia_chipset_tag_t) sc->pct;
sc 370 dev/ic/i82365.c paa.iobase = sc->iobase;
sc 371 dev/ic/i82365.c paa.iosize = sc->iosize;
sc 373 dev/ic/i82365.c h->pcmcia = config_found_sm(&sc->dev, &paa, pcic_print,
sc 423 dev/ic/i82365.c struct pcic_softc *sc = (struct pcic_softc *)(h->ph_parent);
sc 443 dev/ic/i82365.c wakeup(sc);
sc 519 dev/ic/i82365.c struct pcic_softc *sc = (struct pcic_softc *)(h->ph_parent);
sc 532 dev/ic/i82365.c pcic_write(h, PCIC_CSC_INTR, (sc->irq << PCIC_CSC_INTR_IRQ_SHIFT) |
sc 658 dev/ic/i82365.c struct pcic_softc *sc = arg;
sc 661 dev/ic/i82365.c DPRINTF(("%s: intr\n", sc->dev.dv_xname));
sc 664 dev/ic/i82365.c if (sc->handle[i].flags & PCIC_FLAG_SOCKETP)
sc 665 dev/ic/i82365.c ret += pcic_intr_socket(&sc->handle[i]);
sc 674 dev/ic/i82365.c struct pcic_softc *sc = arg;
sc 684 dev/ic/i82365.c if (sc->handle[i].flags & PCIC_FLAG_SOCKETP)
sc 685 dev/ic/i82365.c pcic_intr_socket(&sc->handle[i]);
sc 687 dev/ic/i82365.c timeout_add(&sc->poll_timeout, hz / 2);
sc 837 dev/ic/i82365.c struct pcic_softc *sc = (struct pcic_softc *)h->ph_parent;
sc 841 dev/ic/i82365.c if (timeout_pending(&sc->poll_timeout))
sc 842 dev/ic/i82365.c timeout_del(&sc->poll_timeout);
sc 850 dev/ic/i82365.c timeout_add(&sc->poll_timeout, hz / 2);
sc 865 dev/ic/i82365.c struct pcic_softc *sc = (struct pcic_softc *)(h->ph_parent);
sc 880 dev/ic/i82365.c if ((sc->subregionmask & (mask << i)) == (mask << i)) {
sc 881 dev/ic/i82365.c if (bus_space_subregion(sc->memt, sc->memh,
sc 886 dev/ic/i82365.c addr = sc->membase + (i * PCIC_MEM_PAGESIZE);
sc 887 dev/ic/i82365.c sc->subregionmask &= ~(mhandle);
sc 888 dev/ic/i82365.c pcmhp->memt = sc->memt;
sc 911 dev/ic/i82365.c struct pcic_softc *sc = (struct pcic_softc *)(h->ph_parent);
sc 913 dev/ic/i82365.c sc->subregionmask |= pcmhp->mhandle;
sc 1042 dev/ic/i82365.c struct pcic_softc *sc = (struct pcic_softc *)(h->ph_parent);
sc 1061 dev/ic/i82365.c if (sc->memt != pcmhp->memt)
sc 1129 dev/ic/i82365.c struct pcic_softc *sc = (struct pcic_softc *)(h->ph_parent);
sc 1136 dev/ic/i82365.c iot = sc->iot;
sc 1144 dev/ic/i82365.c } else if (sc->ranges) {
sc 1161 dev/ic/i82365.c for (range = sc->ranges; range->start; range++) {
sc 1163 dev/ic/i82365.c beg = max(range->start, sc->iobase);
sc 1165 dev/ic/i82365.c sc->iobase + sc->iosize);
sc 1188 dev/ic/i82365.c if (bus_space_alloc(iot, sc->iobase,
sc 1189 dev/ic/i82365.c sc->iobase + sc->iosize, size, align, 0, 0,
sc 1309 dev/ic/i82365.c struct pcic_softc *sc = (struct pcic_softc *)(h->ph_parent);
sc 1329 dev/ic/i82365.c if (sc->iot != pcihp->iot)
sc 225 dev/ic/i82596.c i82596_probe(sc)
sc 226 dev/ic/i82596.c struct ie_softc *sc;
sc 230 dev/ic/i82596.c sc->scp = sc->sc_msize - IE_SCP_SZ;
sc 231 dev/ic/i82596.c sc->iscp = 0;
sc 232 dev/ic/i82596.c sc->scb = 32;
sc 234 dev/ic/i82596.c (sc->ie_bus_write16)(sc, IE_ISCP_BUSY(sc->iscp), 1);
sc 235 dev/ic/i82596.c (sc->ie_bus_write16)(sc, IE_ISCP_SCB(sc->iscp), sc->scb);
sc 236 dev/ic/i82596.c (sc->ie_bus_write24)(sc, IE_ISCP_BASE(sc->iscp), sc->sc_maddr);
sc 237 dev/ic/i82596.c (sc->ie_bus_write24)(sc, IE_SCP_ISCP(sc->scp), sc->sc_maddr);
sc 238 dev/ic/i82596.c (sc->ie_bus_write16)(sc, IE_SCP_BUS_USE(sc->scp), sc->sysbus);
sc 240 dev/ic/i82596.c (sc->hwreset)(sc, IE_CARD_RESET);
sc 242 dev/ic/i82596.c if ((sc->ie_bus_read16)(sc, IE_ISCP_BUSY(sc->iscp))) {
sc 244 dev/ic/i82596.c printf("%s: ISCP set failed\n", sc->sc_dev.dv_xname);
sc 249 dev/ic/i82596.c if (sc->port) {
sc 250 dev/ic/i82596.c (sc->ie_bus_write24)(sc, sc->scp, 0);
sc 251 dev/ic/i82596.c (sc->ie_bus_write24)(sc, IE_SCP_TEST(sc->scp), -1);
sc 252 dev/ic/i82596.c (sc->port)(sc, IE_PORT_TEST);
sc 254 dev/ic/i82596.c (sc->ie_bus_read16)(sc, IE_SCP_TEST(sc->scp));
sc 285 dev/ic/i82596.c i82596_attach(sc, name, etheraddr, media, nmedia, defmedia)
sc 286 dev/ic/i82596.c struct ie_softc *sc;
sc 292 dev/ic/i82596.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 295 dev/ic/i82596.c (sc->ie_bus_write16)(sc, IE_ISCP_BUSY(sc->iscp), 1);
sc 296 dev/ic/i82596.c (sc->ie_bus_write16)(sc, IE_ISCP_SCB(sc->iscp), sc->scb);
sc 297 dev/ic/i82596.c (sc->ie_bus_write24)(sc, IE_ISCP_BASE(sc->iscp), sc->sc_maddr);
sc 298 dev/ic/i82596.c (sc->ie_bus_write24)(sc, IE_SCP_ISCP(sc->scp), sc->sc_maddr +sc->iscp);
sc 299 dev/ic/i82596.c (sc->ie_bus_write16)(sc, IE_SCP_BUS_USE(sc->scp), sc->sysbus);
sc 300 dev/ic/i82596.c (sc->hwreset)(sc, IE_CARD_RESET);
sc 303 dev/ic/i82596.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 304 dev/ic/i82596.c ifp->if_softc = sc;
sc 316 dev/ic/i82596.c ifmedia_init(&sc->sc_media, 0, i82596_mediachange, i82596_mediastatus);
sc 319 dev/ic/i82596.c ifmedia_add(&sc->sc_media, media[i], 0, NULL);
sc 320 dev/ic/i82596.c ifmedia_set(&sc->sc_media, defmedia);
sc 322 dev/ic/i82596.c ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL);
sc 323 dev/ic/i82596.c ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
sc 331 dev/ic/i82596.c sc->sc_dev.dv_xname);
sc 341 dev/ic/i82596.c printf(" %s v%d.%d, address %s\n", name, sc->sc_vers / 10,
sc 342 dev/ic/i82596.c sc->sc_vers % 10, ether_sprintf(etheraddr));
sc 355 dev/ic/i82596.c struct ie_softc *sc = ifp->if_softc;
sc 357 dev/ic/i82596.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 360 dev/ic/i82596.c i82596_reset(sc, 1);
sc 364 dev/ic/i82596.c i82596_cmd_wait(sc)
sc 365 dev/ic/i82596.c struct ie_softc *sc;
sc 372 dev/ic/i82596.c off = IE_SCB_CMD(sc->scb);
sc 373 dev/ic/i82596.c bus_space_barrier(sc->bt, sc->bh, off, 2,
sc 375 dev/ic/i82596.c if ((sc->ie_bus_read16)(sc, off) == 0) {
sc 377 dev/ic/i82596.c if (sc->sc_debug & IED_CMDS)
sc 379 dev/ic/i82596.c sc->sc_dev.dv_xname, (180000 - i) * 5);
sc 386 dev/ic/i82596.c if (sc->sc_debug & IED_CMDS)
sc 388 dev/ic/i82596.c sc->async_cmd_inprogress? "a" : "",
sc 389 dev/ic/i82596.c sc->ie_bus_read16(sc, IE_SCB_STATUS(sc->scb)),
sc 406 dev/ic/i82596.c i82596_start_cmd(sc, cmd, iecmdbuf, mask, async)
sc 407 dev/ic/i82596.c struct ie_softc *sc;
sc 416 dev/ic/i82596.c if (sc->sc_debug & IED_CMDS)
sc 418 dev/ic/i82596.c sc, cmd, iecmdbuf, mask, IE_STAT_BITS, async?"a":"");
sc 420 dev/ic/i82596.c if (sc->async_cmd_inprogress != 0) {
sc 425 dev/ic/i82596.c if (i82596_cmd_wait(sc) != 0)
sc 427 dev/ic/i82596.c sc->async_cmd_inprogress = 0;
sc 430 dev/ic/i82596.c off = IE_SCB_CMD(sc->scb);
sc 431 dev/ic/i82596.c (sc->ie_bus_write16)(sc, off, cmd);
sc 432 dev/ic/i82596.c bus_space_barrier(sc->bt, sc->bh, off, 2, BUS_SPACE_BARRIER_WRITE);
sc 433 dev/ic/i82596.c (sc->chan_attn)(sc);
sc 436 dev/ic/i82596.c sc->async_cmd_inprogress = 1;
sc 451 dev/ic/i82596.c bus_space_barrier(sc->bt, sc->bh, off, 2,
sc 453 dev/ic/i82596.c status = (sc->ie_bus_read16)(sc, off);
sc 456 dev/ic/i82596.c if (sc->sc_debug & IED_CMDS)
sc 458 dev/ic/i82596.c sc->sc_dev.dv_xname,
sc 469 dev/ic/i82596.c return (i82596_cmd_wait(sc));
sc 480 dev/ic/i82596.c i82596_count_errors(struct ie_softc *sc)
sc 482 dev/ic/i82596.c int scb = sc->scb;
sc 484 dev/ic/i82596.c sc->sc_arpcom.ac_if.if_ierrors +=
sc 485 dev/ic/i82596.c sc->ie_bus_read16(sc, IE_SCB_ERRCRC(scb)) +
sc 486 dev/ic/i82596.c sc->ie_bus_read16(sc, IE_SCB_ERRALN(scb)) +
sc 487 dev/ic/i82596.c sc->ie_bus_read16(sc, IE_SCB_ERRRES(scb)) +
sc 488 dev/ic/i82596.c sc->ie_bus_read16(sc, IE_SCB_ERROVR(scb));
sc 491 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_SCB_ERRCRC(scb), 0);
sc 492 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_SCB_ERRALN(scb), 0);
sc 493 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_SCB_ERRRES(scb), 0);
sc 494 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_SCB_ERROVR(scb), 0);
sc 498 dev/ic/i82596.c i82596_rx_errors(struct ie_softc *sc, int fn, int status)
sc 500 dev/ic/i82596.c log(LOG_ERR, "%s: rx error (frame# %d): %b\n", sc->sc_dev.dv_xname, fn,
sc 511 dev/ic/i82596.c register struct ie_softc *sc = v;
sc 515 dev/ic/i82596.c off = IE_SCB_STATUS(sc->scb);
sc 516 dev/ic/i82596.c bus_space_barrier(sc->bt, sc->bh, off, 2, BUS_SPACE_BARRIER_READ);
sc 517 dev/ic/i82596.c status = sc->ie_bus_read16(sc, off) /* & IE_ST_WHENCE */;
sc 520 dev/ic/i82596.c if (sc->intrhook)
sc 521 dev/ic/i82596.c (sc->intrhook)(sc, IE_INTR_EXIT);
sc 528 dev/ic/i82596.c i82596_start_cmd(sc, status & IE_ST_WHENCE, 0, 0, 1);
sc 531 dev/ic/i82596.c if (sc->intrhook)
sc 532 dev/ic/i82596.c (sc->intrhook)(sc, IE_INTR_ENRCV);
sc 534 dev/ic/i82596.c if (i82596_rint(sc, status) != 0)
sc 539 dev/ic/i82596.c if (sc->intrhook)
sc 540 dev/ic/i82596.c (sc->intrhook)(sc, IE_INTR_ENSND);
sc 542 dev/ic/i82596.c if (i82596_tint(sc, status) != 0)
sc 547 dev/ic/i82596.c if ((status & IE_ST_CNA) && (sc->sc_debug & IED_CNA))
sc 548 dev/ic/i82596.c printf("%s: cna; status=%b\n", sc->sc_dev.dv_xname,
sc 551 dev/ic/i82596.c if (sc->intrhook)
sc 552 dev/ic/i82596.c (sc->intrhook)(sc, IE_INTR_LOOP);
sc 561 dev/ic/i82596.c if (i82596_cmd_wait(sc))
sc 564 dev/ic/i82596.c bus_space_barrier(sc->bt, sc->bh, off, 2, BUS_SPACE_BARRIER_READ);
sc 565 dev/ic/i82596.c status = sc->ie_bus_read16(sc, off);
sc 570 dev/ic/i82596.c if (sc->intrhook)
sc 571 dev/ic/i82596.c (sc->intrhook)(sc, IE_INTR_EXIT);
sc 575 dev/ic/i82596.c i82596_cmd_wait(sc);
sc 576 dev/ic/i82596.c i82596_reset(sc, 1);
sc 584 dev/ic/i82596.c i82596_rint(sc, scbstatus)
sc 585 dev/ic/i82596.c struct ie_softc *sc;
sc 592 dev/ic/i82596.c if (sc->sc_debug & IED_RINT)
sc 594 dev/ic/i82596.c sc->sc_dev.dv_xname, scbstatus, IE_ST_BITS);
sc 600 dev/ic/i82596.c i = sc->rfhead;
sc 601 dev/ic/i82596.c off = IE_RFRAME_STATUS(sc->rframes, i);
sc 602 dev/ic/i82596.c bus_space_barrier(sc->bt, sc->bh, off, 2,
sc 604 dev/ic/i82596.c status = sc->ie_bus_read16(sc, off);
sc 607 dev/ic/i82596.c if (sc->sc_debug & IED_RINT)
sc 609 dev/ic/i82596.c sc->sc_dev.dv_xname, i, status, IE_ST_BITS);
sc 614 dev/ic/i82596.c sc->sc_dev.dv_xname);
sc 615 dev/ic/i82596.c i82596_rx_errors(sc, i, status);
sc 620 dev/ic/i82596.c i82596_count_errors(sc);
sc 630 dev/ic/i82596.c i82596_rx_errors(sc, i, status);
sc 637 dev/ic/i82596.c sc->sc_dev.dv_xname, i, status, IE_ST_BITS);
sc 646 dev/ic/i82596.c sc->ie_bus_write16(sc, off, 0);
sc 649 dev/ic/i82596.c off = IE_RFRAME_LAST(sc->rframes, i);
sc 650 dev/ic/i82596.c sc->ie_bus_write16(sc, off, IE_FD_EOL|IE_FD_SUSP);
sc 653 dev/ic/i82596.c off = IE_RFRAME_BUFDESC(sc->rframes, i);
sc 654 dev/ic/i82596.c sc->ie_bus_write16(sc, off, 0xffff);
sc 657 dev/ic/i82596.c off = IE_RFRAME_LAST(sc->rframes, sc->rftail);
sc 658 dev/ic/i82596.c sc->ie_bus_write16(sc, off, 0);
sc 660 dev/ic/i82596.c if (++sc->rftail == sc->nframes)
sc 661 dev/ic/i82596.c sc->rftail = 0;
sc 662 dev/ic/i82596.c if (++sc->rfhead == sc->nframes)
sc 663 dev/ic/i82596.c sc->rfhead = 0;
sc 667 dev/ic/i82596.c i82596_drop_frames(sc);
sc 669 dev/ic/i82596.c sc->rnr_expect = 1;
sc 670 dev/ic/i82596.c sc->sc_arpcom.ac_if.if_ierrors++;
sc 671 dev/ic/i82596.c } else if (i82596_readframe(sc, i) != 0)
sc 692 dev/ic/i82596.c if (i82596_start_cmd(sc, IE_RUC_RESUME, 0, 0, 0) == 0)
sc 695 dev/ic/i82596.c sc->sc_dev.dv_xname);
sc 699 dev/ic/i82596.c if (sc->rnr_expect != 0) {
sc 705 dev/ic/i82596.c i82596_start_transceiver(sc);
sc 706 dev/ic/i82596.c sc->rnr_expect = 0;
sc 716 dev/ic/i82596.c if (i82596_chk_rx_ring(sc) != 0)
sc 719 dev/ic/i82596.c i82596_start_transceiver(sc);
sc 720 dev/ic/i82596.c sc->sc_arpcom.ac_if.if_ierrors++;
sc 724 dev/ic/i82596.c sc->sc_dev.dv_xname, scbstatus, IE_ST_BITS);
sc 726 dev/ic/i82596.c sc->sc_arpcom.ac_if.if_ierrors++;
sc 739 dev/ic/i82596.c i82596_tint(sc, scbstatus)
sc 740 dev/ic/i82596.c struct ie_softc *sc;
sc 743 dev/ic/i82596.c register struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 750 dev/ic/i82596.c if (sc->xmit_busy <= 0) {
sc 753 dev/ic/i82596.c sc->sc_dev.dv_xname,
sc 754 dev/ic/i82596.c sc->xmit_busy, sc->xctail, sc->xchead);
sc 759 dev/ic/i82596.c off = IE_CMD_XMIT_STATUS(sc->xmit_cmds, sc->xctail);
sc 760 dev/ic/i82596.c status = sc->ie_bus_read16(sc, off);
sc 763 dev/ic/i82596.c if (sc->sc_debug & IED_TINT)
sc 765 dev/ic/i82596.c sc->sc_dev.dv_xname, scbstatus, IE_ST_BITS,
sc 771 dev/ic/i82596.c "status=%b; tail=%d\n", sc->sc_dev.dv_xname,
sc 772 dev/ic/i82596.c status, IE_XS_BITS, sc->xctail);
sc 786 dev/ic/i82596.c printf("%s: send aborted\n", sc->sc_dev.dv_xname);
sc 788 dev/ic/i82596.c printf("%s: no carrier\n", sc->sc_dev.dv_xname);
sc 790 dev/ic/i82596.c printf("%s: lost CTS\n", sc->sc_dev.dv_xname);
sc 792 dev/ic/i82596.c printf("%s: DMA underrun\n", sc->sc_dev.dv_xname);
sc 795 dev/ic/i82596.c sc->sc_dev.dv_xname);
sc 796 dev/ic/i82596.c sc->sc_arpcom.ac_if.if_collisions += 16;
sc 805 dev/ic/i82596.c if (sc->want_mcsetup) {
sc 806 dev/ic/i82596.c ie_mc_setup(sc, IE_XBUF_ADDR(sc, sc->xctail));
sc 807 dev/ic/i82596.c sc->want_mcsetup = 0;
sc 811 dev/ic/i82596.c sc->xmit_busy--;
sc 812 dev/ic/i82596.c sc->xctail = (sc->xctail + 1) % NTXBUF;
sc 815 dev/ic/i82596.c if (sc->xmit_busy > 0)
sc 816 dev/ic/i82596.c i82596_xmit(sc);
sc 826 dev/ic/i82596.c i82596_get_rbd_list(sc, start, end, pktlen)
sc 827 dev/ic/i82596.c struct ie_softc *sc;
sc 832 dev/ic/i82596.c int off, rbbase = sc->rbds;
sc 837 dev/ic/i82596.c *start = rbindex = sc->rbhead;
sc 841 dev/ic/i82596.c bus_space_barrier(sc->bt, sc->bh, off, 2,
sc 843 dev/ic/i82596.c rbdstatus = sc->ie_bus_read16(sc, off);
sc 850 dev/ic/i82596.c print_rbd(sc, rbindex);
sc 854 dev/ic/i82596.c sc->sc_dev.dv_xname, rbindex);
sc 859 dev/ic/i82596.c if (++rbindex == sc->nrxbuf)
sc 874 dev/ic/i82596.c i82596_release_rbd_list(sc, start, end)
sc 875 dev/ic/i82596.c struct ie_softc *sc;
sc 879 dev/ic/i82596.c register int off, rbbase = sc->rbds;
sc 885 dev/ic/i82596.c sc->ie_bus_write16(sc, off, 0);
sc 886 dev/ic/i82596.c if (++rbindex == sc->nrxbuf)
sc 891 dev/ic/i82596.c rbindex = ((rbindex == 0) ? sc->nrxbuf : rbindex) - 1;
sc 893 dev/ic/i82596.c sc->ie_bus_write16(sc, off, IE_RBUF_SIZE|IE_RBD_EOL);
sc 896 dev/ic/i82596.c off = IE_RBD_BUFLEN(rbbase, sc->rbtail);
sc 897 dev/ic/i82596.c sc->ie_bus_write16(sc, off, IE_RBUF_SIZE);
sc 901 dev/ic/i82596.c sc->rbhead = end;
sc 902 dev/ic/i82596.c sc->rbtail = rbindex;
sc 912 dev/ic/i82596.c i82596_drop_frames(sc)
sc 913 dev/ic/i82596.c struct ie_softc *sc;
sc 918 dev/ic/i82596.c if (!i82596_get_rbd_list(sc, &bstart, &bend, &pktlen))
sc 920 dev/ic/i82596.c i82596_release_rbd_list(sc, bstart, bend);
sc 934 dev/ic/i82596.c i82596_chk_rx_ring(sc)
sc 935 dev/ic/i82596.c struct ie_softc *sc;
sc 939 dev/ic/i82596.c for (n = 0; n < sc->nrxbuf; n++) {
sc 940 dev/ic/i82596.c off = IE_RBD_BUFLEN(sc->rbds, n);
sc 941 dev/ic/i82596.c val = sc->ie_bus_read16(sc, off);
sc 942 dev/ic/i82596.c if ((n == sc->rbtail) ^ ((val & IE_RBD_EOL) != 0)) {
sc 946 dev/ic/i82596.c sc->sc_dev.dv_xname, n);
sc 953 dev/ic/i82596.c for (n = 0; n < sc->nframes; n++) {
sc 954 dev/ic/i82596.c off = IE_RFRAME_LAST(sc->rframes, n);
sc 955 dev/ic/i82596.c val = sc->ie_bus_read16(sc, off);
sc 956 dev/ic/i82596.c if ((n == sc->rftail) ^ ((val & (IE_FD_EOL|IE_FD_SUSP)) != 0)) {
sc 960 dev/ic/i82596.c sc->sc_dev.dv_xname, n);
sc 979 dev/ic/i82596.c i82596_get(struct ie_softc *sc, int head, int totlen)
sc 989 dev/ic/i82596.c (sc->memcopyin)(sc, &eh, IE_RBUF_ADDR(sc, head),
sc 997 dev/ic/i82596.c m0->m_pkthdr.rcvif = &sc->sc_arpcom.ac_if;
sc 1055 dev/ic/i82596.c off = IE_RBUF_ADDR(sc,head) + thisrboff;
sc 1056 dev/ic/i82596.c (sc->memcopyin)(sc, mtod(m, caddr_t) + thismboff, off, len);
sc 1066 dev/ic/i82596.c if (++head == sc->nrxbuf)
sc 1095 dev/ic/i82596.c i82596_readframe(sc, num)
sc 1096 dev/ic/i82596.c struct ie_softc *sc;
sc 1099 dev/ic/i82596.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1104 dev/ic/i82596.c if (i82596_get_rbd_list(sc, &bstart, &bend, &pktlen) == 0) {
sc 1109 dev/ic/i82596.c m = i82596_get(sc, bstart, pktlen);
sc 1110 dev/ic/i82596.c i82596_release_rbd_list(sc, bstart, bend);
sc 1113 dev/ic/i82596.c sc->sc_arpcom.ac_if.if_ierrors++;
sc 1118 dev/ic/i82596.c if (sc->sc_debug & IED_READFRAME) {
sc 1122 dev/ic/i82596.c sc->sc_dev.dv_xname, ether_sprintf(eh->ether_shost),
sc 1147 dev/ic/i82596.c i82596_xmit(sc)
sc 1148 dev/ic/i82596.c struct ie_softc *sc;
sc 1152 dev/ic/i82596.c cur = sc->xctail;
sc 1155 dev/ic/i82596.c if (sc->sc_debug & IED_XMIT)
sc 1156 dev/ic/i82596.c printf("%s: xmit buffer %d\n", sc->sc_dev.dv_xname, cur);
sc 1162 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_CMD_XMIT_DESC(sc->xmit_cmds, cur),
sc 1163 dev/ic/i82596.c IE_XBD_ADDR(sc->xbds, cur));
sc 1165 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_CMD_XMIT_STATUS(sc->xmit_cmds, cur), 0);
sc 1167 dev/ic/i82596.c if (sc->do_xmitnopchain) {
sc 1171 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_CMD_XMIT_LINK(sc->xmit_cmds, cur),
sc 1172 dev/ic/i82596.c IE_CMD_NOP_ADDR(sc->nop_cmds, cur));
sc 1173 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_CMD_XMIT_CMD(sc->xmit_cmds, cur),
sc 1179 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_CMD_NOP_STATUS(sc->nop_cmds, cur), 0);
sc 1180 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_CMD_NOP_LINK(sc->nop_cmds, cur),
sc 1181 dev/ic/i82596.c IE_CMD_NOP_ADDR(sc->nop_cmds, cur));
sc 1187 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_CMD_NOP_STATUS(sc->nop_cmds, prev), 0);
sc 1188 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_CMD_NOP_LINK(sc->nop_cmds, prev),
sc 1189 dev/ic/i82596.c IE_CMD_XMIT_ADDR(sc->xmit_cmds, cur));
sc 1191 dev/ic/i82596.c off = IE_SCB_STATUS(sc->scb);
sc 1192 dev/ic/i82596.c bus_space_barrier(sc->bt, sc->bh, off, 2,
sc 1194 dev/ic/i82596.c if ((sc->ie_bus_read16(sc, off) & IE_CUS_ACTIVE) == 0) {
sc 1196 dev/ic/i82596.c i82596_start_transceiver(sc);
sc 1199 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_CMD_XMIT_LINK(sc->xmit_cmds,cur),
sc 1202 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_CMD_XMIT_CMD(sc->xmit_cmds, cur),
sc 1205 dev/ic/i82596.c off = IE_SCB_CMDLST(sc->scb);
sc 1206 dev/ic/i82596.c sc->ie_bus_write16(sc, off, IE_CMD_XMIT_ADDR(sc->xmit_cmds, cur));
sc 1207 dev/ic/i82596.c bus_space_barrier(sc->bt, sc->bh, off, 2,
sc 1210 dev/ic/i82596.c if (i82596_start_cmd(sc, IE_CUC_START, 0, 0, 1)) {
sc 1212 dev/ic/i82596.c if (sc->sc_debug & IED_XMIT)
sc 1215 dev/ic/i82596.c sc->sc_dev.dv_xname);
sc 1220 dev/ic/i82596.c sc->sc_arpcom.ac_if.if_timer = 5;
sc 1231 dev/ic/i82596.c struct ie_softc *sc = ifp->if_softc;
sc 1237 dev/ic/i82596.c if (sc->sc_debug & IED_ENQ)
sc 1245 dev/ic/i82596.c if (sc->xmit_busy == NTXBUF) {
sc 1265 dev/ic/i82596.c printf("%s: tbuf overflow\n", sc->sc_dev.dv_xname);
sc 1267 dev/ic/i82596.c head = sc->xchead;
sc 1268 dev/ic/i82596.c sc->xchead = (head + 1) % NTXBUF;
sc 1269 dev/ic/i82596.c buffer = IE_XBUF_ADDR(sc, head);
sc 1272 dev/ic/i82596.c if (sc->sc_debug & IED_ENQ)
sc 1274 dev/ic/i82596.c sc->sc_dev.dv_xname, head, buffer);
sc 1279 dev/ic/i82596.c if (sc->sc_debug & IED_ENQ) {
sc 1287 dev/ic/i82596.c sc->sc_dev.dv_xname);
sc 1292 dev/ic/i82596.c (sc->memcopyout)(sc, mtod(m,caddr_t), buffer, m->m_len);
sc 1298 dev/ic/i82596.c (sc->memcopyout)(sc, padbuf, buffer,
sc 1305 dev/ic/i82596.c if (sc->sc_debug & IED_ENQ)
sc 1315 dev/ic/i82596.c xbase = sc->xbds;
sc 1316 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_XBD_FLAGS(xbase, head),
sc 1318 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_XBD_NEXT(xbase, head), 0xffff);
sc 1319 dev/ic/i82596.c sc->ie_bus_write24(sc, IE_XBD_BUF(xbase, head),
sc 1320 dev/ic/i82596.c sc->sc_maddr + IE_XBUF_ADDR(sc, head));
sc 1323 dev/ic/i82596.c if (sc->xmit_busy++ == 0)
sc 1324 dev/ic/i82596.c i82596_xmit(sc);
sc 1333 dev/ic/i82596.c i82596_proberam(sc)
sc 1334 dev/ic/i82596.c struct ie_softc *sc;
sc 1339 dev/ic/i82596.c off = IE_SCP_BUS_USE(sc->scp);
sc 1340 dev/ic/i82596.c (sc->ie_bus_write16)(sc, off, 0);
sc 1341 dev/ic/i82596.c bus_space_barrier(sc->bt, sc->bh, off, 2, BUS_SPACE_BARRIER_WRITE);
sc 1344 dev/ic/i82596.c off = IE_ISCP_BUSY(sc->iscp);
sc 1345 dev/ic/i82596.c (sc->ie_bus_write16)(sc, off, 1);
sc 1346 dev/ic/i82596.c bus_space_barrier(sc->bt, sc->bh, off, 2, BUS_SPACE_BARRIER_WRITE);
sc 1348 dev/ic/i82596.c if (sc->hwreset)
sc 1349 dev/ic/i82596.c (sc->hwreset)(sc, IE_CHIP_PROBE);
sc 1351 dev/ic/i82596.c (sc->chan_attn) (sc);
sc 1356 dev/ic/i82596.c off = IE_ISCP_BUSY(sc->iscp);
sc 1357 dev/ic/i82596.c bus_space_barrier(sc->bt, sc->bh, off, 1, BUS_SPACE_BARRIER_READ);
sc 1358 dev/ic/i82596.c result = (sc->ie_bus_read16)(sc, off) == 0;
sc 1361 dev/ic/i82596.c ie_ack(sc, IE_ST_WHENCE);
sc 1367 dev/ic/i82596.c i82596_reset(sc, hard)
sc 1368 dev/ic/i82596.c struct ie_softc *sc;
sc 1375 dev/ic/i82596.c printf("%s: reset\n", sc->sc_dev.dv_xname);
sc 1379 dev/ic/i82596.c sc->sc_arpcom.ac_if.if_timer = 0;
sc 1380 dev/ic/i82596.c sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
sc 1385 dev/ic/i82596.c if (i82596_start_cmd(sc, IE_RUC_ABORT | IE_CUC_ABORT, 0, 0, 0)) {
sc 1387 dev/ic/i82596.c printf("%s: abort commands timed out\n", sc->sc_dev.dv_xname);
sc 1396 dev/ic/i82596.c if (hard && sc->hwreset)
sc 1397 dev/ic/i82596.c (sc->hwreset)(sc, IE_CARD_RESET);
sc 1400 dev/ic/i82596.c ie_ack(sc, IE_ST_WHENCE);
sc 1402 dev/ic/i82596.c if ((sc->sc_arpcom.ac_if.if_flags & IFF_UP) != 0) {
sc 1405 dev/ic/i82596.c if (i82596_init(sc) == 1)
sc 1413 dev/ic/i82596.c i82596_simple_command(sc, cmd, cmdbuf)
sc 1414 dev/ic/i82596.c struct ie_softc *sc;
sc 1419 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_CMD_COMMON_STATUS(cmdbuf), 0);
sc 1420 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_CMD_COMMON_CMD(cmdbuf), cmd | IE_CMD_LAST);
sc 1421 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_CMD_COMMON_LINK(cmdbuf), 0xffff);
sc 1424 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_SCB_CMDLST(sc->scb), cmdbuf);
sc 1431 dev/ic/i82596.c ie_run_tdr(sc, cmd)
sc 1432 dev/ic/i82596.c struct ie_softc *sc;
sc 1437 dev/ic/i82596.c i82596_simple_command(sc, IE_CMD_TDR, cmd);
sc 1438 dev/ic/i82596.c (sc->ie_bus_write16)(sc, IE_CMD_TDR_TIME(cmd), 0);
sc 1440 dev/ic/i82596.c if (i82596_start_cmd(sc, IE_CUC_START, cmd, IE_STAT_COMPL, 0) ||
sc 1441 dev/ic/i82596.c !(sc->ie_bus_read16(sc, IE_CMD_COMMON_STATUS(cmd)) & IE_STAT_OK))
sc 1444 dev/ic/i82596.c result = sc->ie_bus_read16(sc, IE_CMD_TDR_TIME(cmd));
sc 1447 dev/ic/i82596.c ie_ack(sc, IE_ST_WHENCE);
sc 1454 dev/ic/i82596.c printf("%s: TDR command failed\n", sc->sc_dev.dv_xname);
sc 1456 dev/ic/i82596.c printf("%s: transceiver problem\n", sc->sc_dev.dv_xname);
sc 1459 dev/ic/i82596.c sc->sc_dev.dv_xname, clocks, clocks == 1? "":"s");
sc 1462 dev/ic/i82596.c sc->sc_dev.dv_xname, clocks, clocks == 1? "":"s");
sc 1465 dev/ic/i82596.c sc->sc_dev.dv_xname, result);
sc 1480 dev/ic/i82596.c i82596_setup_bufs(sc)
sc 1481 dev/ic/i82596.c struct ie_softc *sc;
sc 1483 dev/ic/i82596.c int n, r, ptr = sc->buf_area; /* memory pool */
sc 1498 dev/ic/i82596.c sc->nop_cmds = ptr - 2;
sc 1503 dev/ic/i82596.c sc->xmit_cmds = ptr - 2;
sc 1508 dev/ic/i82596.c sc->xbds = ptr - 2;
sc 1512 dev/ic/i82596.c sc->xbufs = ptr;
sc 1518 dev/ic/i82596.c n = sc->buf_area_sz - (ptr - sc->buf_area);
sc 1523 dev/ic/i82596.c sc->nframes = n / r;
sc 1525 dev/ic/i82596.c if (sc->nframes <= 8)
sc 1528 dev/ic/i82596.c sc->nrxbuf = sc->nframes * B_PER_F;
sc 1532 dev/ic/i82596.c sc->rframes = ptr - 2;
sc 1533 dev/ic/i82596.c ptr += sc->nframes * 64;
sc 1537 dev/ic/i82596.c sc->rbds = ptr - 2;
sc 1538 dev/ic/i82596.c ptr += sc->nrxbuf * 32;
sc 1541 dev/ic/i82596.c sc->rbufs = ptr;
sc 1542 dev/ic/i82596.c ptr += sc->nrxbuf * IE_RBUF_SIZE;
sc 1545 dev/ic/i82596.c printf("%s: %d frames %d bufs\n", sc->sc_dev.dv_xname, sc->nframes,
sc 1546 dev/ic/i82596.c sc->nrxbuf);
sc 1552 dev/ic/i82596.c for (n = 0; n < sc->nframes; n++) {
sc 1553 dev/ic/i82596.c int m = (n == sc->nframes - 1) ? 0 : n + 1;
sc 1556 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_RFRAME_STATUS(sc->rframes,n), 0);
sc 1559 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_RFRAME_BUFDESC(sc->rframes,n),
sc 1563 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_RFRAME_NEXT(sc->rframes,n),
sc 1564 dev/ic/i82596.c IE_RFRAME_ADDR(sc->rframes,m));
sc 1567 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_RFRAME_LAST(sc->rframes,n),
sc 1574 dev/ic/i82596.c for (n = 0; n < sc->nrxbuf; n++) {
sc 1575 dev/ic/i82596.c int m = (n == sc->nrxbuf - 1) ? 0 : n + 1;
sc 1578 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_RBD_STATUS(sc->rbds,n), 0);
sc 1581 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_RBD_NEXT(sc->rbds,n),
sc 1582 dev/ic/i82596.c IE_RBD_ADDR(sc->rbds,m));
sc 1585 dev/ic/i82596.c sc->ie_bus_write24(sc, IE_RBD_BUFADDR(sc->rbds, n),
sc 1586 dev/ic/i82596.c sc->sc_maddr + IE_RBUF_ADDR(sc, n));
sc 1587 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_RBD_BUFLEN(sc->rbds,n),
sc 1595 dev/ic/i82596.c (sc->ie_bus_write16)(sc, IE_CMD_NOP_STATUS(sc->nop_cmds, n), 0);
sc 1597 dev/ic/i82596.c (sc->ie_bus_write16)(sc, IE_CMD_NOP_CMD(sc->nop_cmds, n),
sc 1600 dev/ic/i82596.c (sc->ie_bus_write16)(sc, IE_CMD_NOP_LINK(sc->nop_cmds, n),
sc 1601 dev/ic/i82596.c IE_CMD_NOP_ADDR(sc->nop_cmds, n));
sc 1611 dev/ic/i82596.c sc->xchead = sc->xctail = 0;
sc 1614 dev/ic/i82596.c sc->xmit_busy = 0;
sc 1620 dev/ic/i82596.c sc->rfhead = 0;
sc 1621 dev/ic/i82596.c sc->rftail = sc->nframes - 1;
sc 1627 dev/ic/i82596.c sc->rbhead = 0;
sc 1628 dev/ic/i82596.c sc->rbtail = sc->nrxbuf - 1;
sc 1633 dev/ic/i82596.c sc->sc_dev.dv_xname, ptr - sc->buf_area);
sc 1638 dev/ic/i82596.c ie_cfg_setup(sc, cmd, promiscuous, manchester)
sc 1639 dev/ic/i82596.c struct ie_softc *sc;
sc 1645 dev/ic/i82596.c i82596_simple_command(sc, IE_CMD_CONFIG, cmd);
sc 1646 dev/ic/i82596.c bus_space_write_1(sc->bt, sc->bh, IE_CMD_CFG_CNT(cmd), 0x0c);
sc 1647 dev/ic/i82596.c bus_space_write_1(sc->bt, sc->bh, IE_CMD_CFG_FIFO(cmd), 8);
sc 1648 dev/ic/i82596.c bus_space_write_1(sc->bt, sc->bh, IE_CMD_CFG_SAVEBAD(cmd), 0x40);
sc 1649 dev/ic/i82596.c bus_space_write_1(sc->bt, sc->bh, IE_CMD_CFG_ADDRLEN(cmd), 0x2e);
sc 1650 dev/ic/i82596.c bus_space_write_1(sc->bt, sc->bh, IE_CMD_CFG_PRIORITY(cmd), 0);
sc 1651 dev/ic/i82596.c bus_space_write_1(sc->bt, sc->bh, IE_CMD_CFG_IFS(cmd), 0x60);
sc 1652 dev/ic/i82596.c bus_space_write_1(sc->bt, sc->bh, IE_CMD_CFG_SLOT_LOW(cmd), 0);
sc 1653 dev/ic/i82596.c bus_space_write_1(sc->bt, sc->bh, IE_CMD_CFG_SLOT_HIGH(cmd), 0xf2);
sc 1654 dev/ic/i82596.c bus_space_write_1(sc->bt, sc->bh, IE_CMD_CFG_PROMISC(cmd),
sc 1656 dev/ic/i82596.c bus_space_write_1(sc->bt, sc->bh, IE_CMD_CFG_CRSCDT(cmd), 0);
sc 1657 dev/ic/i82596.c bus_space_write_1(sc->bt, sc->bh, IE_CMD_CFG_MINLEN(cmd), 64);
sc 1658 dev/ic/i82596.c bus_space_write_1(sc->bt, sc->bh, IE_CMD_CFG_JUNK(cmd), 0xff);
sc 1659 dev/ic/i82596.c bus_space_barrier(sc->bt, sc->bh, cmd, IE_CMD_CFG_SZ,
sc 1662 dev/ic/i82596.c cmdresult = i82596_start_cmd(sc, IE_CUC_START, cmd, IE_STAT_COMPL, 0);
sc 1663 dev/ic/i82596.c status = sc->ie_bus_read16(sc, IE_CMD_COMMON_STATUS(cmd));
sc 1666 dev/ic/i82596.c sc->sc_dev.dv_xname, status, IE_STAT_BITS);
sc 1671 dev/ic/i82596.c sc->sc_dev.dv_xname, status, IE_STAT_BITS);
sc 1676 dev/ic/i82596.c ie_ack(sc, IE_ST_WHENCE);
sc 1681 dev/ic/i82596.c ie_ia_setup(sc, cmdbuf)
sc 1682 dev/ic/i82596.c struct ie_softc *sc;
sc 1687 dev/ic/i82596.c i82596_simple_command(sc, IE_CMD_IASETUP, cmdbuf);
sc 1689 dev/ic/i82596.c (sc->memcopyout)(sc, sc->sc_arpcom.ac_enaddr,
sc 1692 dev/ic/i82596.c cmdresult = i82596_start_cmd(sc, IE_CUC_START, cmdbuf, IE_STAT_COMPL, 0);
sc 1693 dev/ic/i82596.c status = sc->ie_bus_read16(sc, IE_CMD_COMMON_STATUS(cmdbuf));
sc 1696 dev/ic/i82596.c sc->sc_dev.dv_xname, status, IE_STAT_BITS);
sc 1701 dev/ic/i82596.c sc->sc_dev.dv_xname, status, IE_STAT_BITS);
sc 1706 dev/ic/i82596.c ie_ack(sc, IE_ST_WHENCE);
sc 1715 dev/ic/i82596.c ie_mc_setup(sc, cmdbuf)
sc 1716 dev/ic/i82596.c struct ie_softc *sc;
sc 1721 dev/ic/i82596.c if (sc->mcast_count == 0)
sc 1724 dev/ic/i82596.c i82596_simple_command(sc, IE_CMD_MCAST, cmdbuf);
sc 1726 dev/ic/i82596.c (sc->memcopyout)(sc, (caddr_t)sc->mcast_addrs,
sc 1728 dev/ic/i82596.c sc->mcast_count * ETHER_ADDR_LEN);
sc 1730 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_CMD_MCAST_BYTES(cmdbuf),
sc 1731 dev/ic/i82596.c sc->mcast_count * ETHER_ADDR_LEN);
sc 1734 dev/ic/i82596.c cmdresult = i82596_start_cmd(sc, IE_CUC_START, cmdbuf, IE_STAT_COMPL, 0);
sc 1735 dev/ic/i82596.c status = sc->ie_bus_read16(sc, IE_CMD_COMMON_STATUS(cmdbuf));
sc 1738 dev/ic/i82596.c sc->sc_dev.dv_xname, status, IE_STAT_BITS);
sc 1743 dev/ic/i82596.c sc->sc_dev.dv_xname, status, IE_STAT_BITS);
sc 1748 dev/ic/i82596.c ie_ack(sc, IE_ST_WHENCE);
sc 1761 dev/ic/i82596.c i82596_init(sc)
sc 1762 dev/ic/i82596.c struct ie_softc *sc;
sc 1764 dev/ic/i82596.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1767 dev/ic/i82596.c sc->async_cmd_inprogress = 0;
sc 1769 dev/ic/i82596.c cmd = sc->buf_area;
sc 1774 dev/ic/i82596.c if (ie_cfg_setup(sc, cmd, sc->promisc, 0) == 0)
sc 1780 dev/ic/i82596.c if (ie_ia_setup(sc, cmd) == 0)
sc 1786 dev/ic/i82596.c ie_run_tdr(sc, cmd);
sc 1791 dev/ic/i82596.c if (ie_mc_setup(sc, cmd) == 0)
sc 1797 dev/ic/i82596.c ie_ack(sc, IE_ST_WHENCE);
sc 1802 dev/ic/i82596.c i82596_setup_bufs(sc);
sc 1804 dev/ic/i82596.c if (sc->hwinit)
sc 1805 dev/ic/i82596.c (sc->hwinit)(sc);
sc 1811 dev/ic/i82596.c sc->do_xmitnopchain = 0;
sc 1813 dev/ic/i82596.c i82596_start_transceiver(sc);
sc 1821 dev/ic/i82596.c i82596_start_transceiver(sc)
sc 1822 dev/ic/i82596.c struct ie_softc *sc;
sc 1828 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_RFRAME_BUFDESC(sc->rframes,sc->rfhead),
sc 1829 dev/ic/i82596.c IE_RBD_ADDR(sc->rbds, sc->rbhead));
sc 1831 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_SCB_RCVLST(sc->scb),
sc 1832 dev/ic/i82596.c IE_RFRAME_ADDR(sc->rframes,sc->rfhead));
sc 1834 dev/ic/i82596.c if (sc->do_xmitnopchain) {
sc 1836 dev/ic/i82596.c if (i82596_start_cmd(sc, IE_CUC_SUSPEND|IE_RUC_SUSPEND, 0, 0, 0))
sc 1838 dev/ic/i82596.c sc->sc_dev.dv_xname);
sc 1843 dev/ic/i82596.c sc->ie_bus_write16(sc, IE_SCB_CMDLST(sc->scb),
sc 1845 dev/ic/i82596.c sc->nop_cmds,
sc 1846 dev/ic/i82596.c (sc->xctail + NTXBUF - 1) % NTXBUF));
sc 1848 dev/ic/i82596.c if (i82596_start_cmd(sc, IE_CUC_START|IE_RUC_START, 0, 0, 0))
sc 1850 dev/ic/i82596.c sc->sc_dev.dv_xname);
sc 1852 dev/ic/i82596.c if (i82596_start_cmd(sc, IE_RUC_START, 0, 0, 0))
sc 1854 dev/ic/i82596.c sc->sc_dev.dv_xname);
sc 1859 dev/ic/i82596.c i82596_stop(sc)
sc 1860 dev/ic/i82596.c struct ie_softc *sc;
sc 1863 dev/ic/i82596.c if (i82596_start_cmd(sc, IE_RUC_SUSPEND | IE_CUC_SUSPEND, 0, 0, 0))
sc 1865 dev/ic/i82596.c sc->sc_dev.dv_xname);
sc 1874 dev/ic/i82596.c struct ie_softc *sc = ifp->if_softc;
sc 1881 dev/ic/i82596.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 1894 dev/ic/i82596.c i82596_init(sc);
sc 1895 dev/ic/i82596.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 1899 dev/ic/i82596.c i82596_init(sc);
sc 1905 dev/ic/i82596.c sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI);
sc 1912 dev/ic/i82596.c i82596_stop(sc);
sc 1920 dev/ic/i82596.c i82596_init(sc);
sc 1926 dev/ic/i82596.c i82596_stop(sc);
sc 1927 dev/ic/i82596.c i82596_init(sc);
sc 1931 dev/ic/i82596.c sc->sc_debug = IED_ALL;
sc 1933 dev/ic/i82596.c sc->sc_debug = 0;
sc 1940 dev/ic/i82596.c ether_addmulti(ifr, &sc->sc_arpcom):
sc 1941 dev/ic/i82596.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 1949 dev/ic/i82596.c ie_mc_reset(sc);
sc 1956 dev/ic/i82596.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
sc 1967 dev/ic/i82596.c ie_mc_reset(sc)
sc 1968 dev/ic/i82596.c struct ie_softc *sc;
sc 1979 dev/ic/i82596.c sc->mcast_count = 0;
sc 1980 dev/ic/i82596.c ETHER_FIRST_MULTI(step, &sc->sc_arpcom, enm);
sc 1983 dev/ic/i82596.c if (sc->mcast_count >= IE_MAXMCAST ||
sc 1985 dev/ic/i82596.c sc->sc_arpcom.ac_if.if_flags |= IFF_ALLMULTI;
sc 1986 dev/ic/i82596.c i82596_ioctl(&sc->sc_arpcom.ac_if,
sc 1993 dev/ic/i82596.c if (size > sc->mcast_addrs_size) {
sc 1995 dev/ic/i82596.c if (sc->mcast_addrs_size)
sc 1996 dev/ic/i82596.c free(sc->mcast_addrs, M_IFMADDR);
sc 1997 dev/ic/i82596.c sc->mcast_addrs = (char *)
sc 1999 dev/ic/i82596.c sc->mcast_addrs_size = size;
sc 2005 dev/ic/i82596.c ETHER_FIRST_MULTI(step, &sc->sc_arpcom, enm);
sc 2007 dev/ic/i82596.c if (sc->mcast_count >= IE_MAXMCAST)
sc 2010 dev/ic/i82596.c bcopy(enm->enm_addrlo, &sc->mcast_addrs[sc->mcast_count], 6);
sc 2011 dev/ic/i82596.c sc->mcast_count++;
sc 2014 dev/ic/i82596.c sc->want_mcsetup = 1;
sc 2024 dev/ic/i82596.c struct ie_softc *sc = ifp->if_softc;
sc 2026 dev/ic/i82596.c if (sc->sc_mediachange)
sc 2027 dev/ic/i82596.c return ((*sc->sc_mediachange)(sc));
sc 2039 dev/ic/i82596.c struct ie_softc *sc = ifp->if_softc;
sc 2041 dev/ic/i82596.c if (sc->sc_mediastatus)
sc 2042 dev/ic/i82596.c (*sc->sc_mediastatus)(sc, ifmr);
sc 2047 dev/ic/i82596.c print_rbd(sc, n)
sc 2048 dev/ic/i82596.c struct ie_softc *sc;
sc 2053 dev/ic/i82596.c "length/EOL %04x\n", IE_RBD_ADDR(sc->rbds,n),
sc 2054 dev/ic/i82596.c sc->ie_bus_read16(sc, IE_RBD_STATUS(sc->rbds,n)), IE_STAT_BITS,
sc 2055 dev/ic/i82596.c sc->ie_bus_read16(sc, IE_RBD_NEXT(sc->rbds,n)),
sc 2057 dev/ic/i82596.c sc->ie_bus_read16(sc, IE_RBD_BUFLEN(sc->rbds,n)));
sc 252 dev/ic/i82596var.h #define IE_RBUF_ADDR(sc, i) (sc->rbufs + ((i) * IE_RBUF_SIZE))
sc 263 dev/ic/i82596var.h #define IE_XBUF_ADDR(sc, i) (sc->xbufs + ((i) * IE_TBUF_SIZE))
sc 296 dev/ic/i82596var.h ie_ack(struct ie_softc *sc, u_int mask) /* in native byte-order */
sc 299 dev/ic/i82596var.h int off = IE_SCB_STATUS(sc->scb);
sc 301 dev/ic/i82596var.h bus_space_barrier(sc->bt, sc->bh, off, 2, BUS_SPACE_BARRIER_READ);
sc 302 dev/ic/i82596var.h status = (sc->ie_bus_read16)(sc, off);
sc 303 dev/ic/i82596var.h i82596_start_cmd(sc, status & mask, 0, 0, 0);
sc 179 dev/ic/if_wi.c STATIC int wi_get_fid_io(struct wi_softc *sc, int fid);
sc 180 dev/ic/if_wi.c STATIC void wi_intr_enable(struct wi_softc *sc, int mode);
sc 181 dev/ic/if_wi.c STATIC void wi_intr_ack(struct wi_softc *sc, int mode);
sc 210 dev/ic/if_wi.c wi_attach(struct wi_softc *sc, struct wi_funcs *funcs)
sc 219 dev/ic/if_wi.c ic = &sc->sc_ic;
sc 222 dev/ic/if_wi.c sc->sc_funcs = funcs;
sc 223 dev/ic/if_wi.c sc->wi_cmd_count = 500;
sc 225 dev/ic/if_wi.c wi_reset(sc);
sc 230 dev/ic/if_wi.c error = wi_read_record(sc, (struct wi_ltv_gen *)&mac);
sc 238 dev/ic/if_wi.c wi_get_id(sc);
sc 241 dev/ic/if_wi.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 242 dev/ic/if_wi.c ifp->if_softc = sc;
sc 250 dev/ic/if_wi.c (void)wi_set_ssid(&sc->wi_node_name, WI_DEFAULT_NODENAME,
sc 252 dev/ic/if_wi.c (void)wi_set_ssid(&sc->wi_net_name, WI_DEFAULT_NETNAME,
sc 254 dev/ic/if_wi.c (void)wi_set_ssid(&sc->wi_ibss_name, WI_DEFAULT_IBSS,
sc 257 dev/ic/if_wi.c sc->wi_portnum = WI_DEFAULT_PORT;
sc 258 dev/ic/if_wi.c sc->wi_ptype = WI_PORTTYPE_BSS;
sc 259 dev/ic/if_wi.c sc->wi_ap_density = WI_DEFAULT_AP_DENSITY;
sc 260 dev/ic/if_wi.c sc->wi_rts_thresh = WI_DEFAULT_RTS_THRESH;
sc 261 dev/ic/if_wi.c sc->wi_tx_rate = WI_DEFAULT_TX_RATE;
sc 262 dev/ic/if_wi.c sc->wi_max_data_len = WI_DEFAULT_DATALEN;
sc 263 dev/ic/if_wi.c sc->wi_create_ibss = WI_DEFAULT_CREATE_IBSS;
sc 264 dev/ic/if_wi.c sc->wi_pm_enabled = WI_DEFAULT_PM_ENABLED;
sc 265 dev/ic/if_wi.c sc->wi_max_sleep = WI_DEFAULT_MAX_SLEEP;
sc 266 dev/ic/if_wi.c sc->wi_roaming = WI_DEFAULT_ROAMING;
sc 267 dev/ic/if_wi.c sc->wi_authtype = WI_DEFAULT_AUTHTYPE;
sc 268 dev/ic/if_wi.c sc->wi_diversity = WI_DEFAULT_DIVERSITY;
sc 269 dev/ic/if_wi.c sc->wi_crypto_algorithm = WI_CRYPTO_FIRMWARE_WEP;
sc 279 dev/ic/if_wi.c if (wi_read_record(sc, &gen) == 0)
sc 280 dev/ic/if_wi.c sc->wi_channel = letoh16(gen.wi_val);
sc 282 dev/ic/if_wi.c sc->wi_channel = 3;
sc 287 dev/ic/if_wi.c switch (sc->sc_firmware_type) {
sc 289 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_HAS_ROAMING;
sc 290 dev/ic/if_wi.c if (sc->sc_sta_firmware_ver >= 60000)
sc 291 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_HAS_MOR;
sc 292 dev/ic/if_wi.c if (sc->sc_sta_firmware_ver >= 60006) {
sc 293 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_HAS_IBSS;
sc 294 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_HAS_CREATE_IBSS;
sc 296 dev/ic/if_wi.c sc->wi_ibss_port = htole16(1);
sc 299 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_HAS_ROAMING;
sc 301 dev/ic/if_wi.c if (sc->sc_sta_firmware_ver < 10000)
sc 302 dev/ic/if_wi.c sc->wi_cmd_count = 5000;
sc 304 dev/ic/if_wi.c sc->wi_cmd_count = 2000;
sc 305 dev/ic/if_wi.c if (sc->sc_sta_firmware_ver >= 800) {
sc 311 dev/ic/if_wi.c if ((sc->sc_sta_firmware_ver != 10402) &&
sc 312 dev/ic/if_wi.c (!(sc->wi_flags & WI_FLAGS_BUS_USB)))
sc 313 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_HAS_HOSTAP;
sc 315 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_HAS_IBSS;
sc 316 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_HAS_CREATE_IBSS;
sc 318 dev/ic/if_wi.c if (sc->sc_sta_firmware_ver >= 10603)
sc 319 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_HAS_ENH_SECURITY;
sc 320 dev/ic/if_wi.c sc->wi_ibss_port = htole16(0);
sc 323 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_HAS_DIVERSITY;
sc 324 dev/ic/if_wi.c if (sc->sc_sta_firmware_ver >= 20000)
sc 325 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_HAS_IBSS;
sc 326 dev/ic/if_wi.c if (sc->sc_sta_firmware_ver >= 25000)
sc 327 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_HAS_CREATE_IBSS;
sc 328 dev/ic/if_wi.c sc->wi_ibss_port = htole16(4);
sc 337 dev/ic/if_wi.c if (wi_read_record(sc, &gen) == 0 && gen.wi_val != htole16(0))
sc 338 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_HAS_WEP;
sc 339 dev/ic/if_wi.c timeout_set(&sc->sc_timo, funcs->f_inquire, sc);
sc 341 dev/ic/if_wi.c bzero((char *)&sc->wi_stats, sizeof(sc->wi_stats));
sc 346 dev/ic/if_wi.c if (wi_read_record(sc, (struct wi_ltv_gen *)&rates) == 0) {
sc 353 dev/ic/if_wi.c sc->wi_supprates = 0;
sc 355 dev/ic/if_wi.c sc->wi_supprates |= rates.wi_rates[2 + i];
sc 357 dev/ic/if_wi.c sc->wi_supprates = WI_SUPPRATES_1M | WI_SUPPRATES_2M |
sc 360 dev/ic/if_wi.c ifmedia_init(&sc->sc_media, 0, wi_media_change, wi_media_status);
sc 361 dev/ic/if_wi.c #define ADD(m, c) ifmedia_add(&sc->sc_media, (m), (c), NULL)
sc 364 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_IBSS)
sc 367 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_CREATE_IBSS)
sc 370 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_HOSTAP)
sc 373 dev/ic/if_wi.c if (sc->wi_supprates & WI_SUPPRATES_1M) {
sc 377 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_IBSS)
sc 380 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_CREATE_IBSS)
sc 383 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_HOSTAP)
sc 387 dev/ic/if_wi.c if (sc->wi_supprates & WI_SUPPRATES_2M) {
sc 391 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_IBSS)
sc 394 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_CREATE_IBSS)
sc 397 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_HOSTAP)
sc 401 dev/ic/if_wi.c if (sc->wi_supprates & WI_SUPPRATES_5M) {
sc 405 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_IBSS)
sc 408 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_CREATE_IBSS)
sc 411 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_HOSTAP)
sc 415 dev/ic/if_wi.c if (sc->wi_supprates & WI_SUPPRATES_11M) {
sc 419 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_IBSS)
sc 422 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_CREATE_IBSS)
sc 425 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_HOSTAP)
sc 431 dev/ic/if_wi.c ifmedia_set(&sc->sc_media,
sc 443 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_ATTACHED;
sc 449 dev/ic/if_wi.c sc->sc_sdhook = shutdownhook_establish(wi_shutdown, sc);
sc 451 dev/ic/if_wi.c wi_init(sc);
sc 452 dev/ic/if_wi.c wi_stop(sc);
sc 458 dev/ic/if_wi.c wi_intr_enable(struct wi_softc *sc, int mode)
sc 460 dev/ic/if_wi.c if (!(sc->wi_flags & WI_FLAGS_BUS_USB))
sc 461 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_INT_EN, mode);
sc 465 dev/ic/if_wi.c wi_intr_ack(struct wi_softc *sc, int mode)
sc 467 dev/ic/if_wi.c if (!(sc->wi_flags & WI_FLAGS_BUS_USB))
sc 468 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_EVENT_ACK, mode);
sc 474 dev/ic/if_wi.c struct wi_softc *sc = vsc;
sc 478 dev/ic/if_wi.c DPRINTF(WID_INTR, ("wi_intr: sc %p\n", sc));
sc 480 dev/ic/if_wi.c ifp = &sc->sc_ic.ic_if;
sc 482 dev/ic/if_wi.c if (!(sc->wi_flags & WI_FLAGS_ATTACHED) || !(ifp->if_flags & IFF_UP)) {
sc 483 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_INT_EN, 0);
sc 484 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_EVENT_ACK, 0xffff);
sc 489 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_INT_EN, 0);
sc 491 dev/ic/if_wi.c status = CSR_READ_2(sc, WI_EVENT_STAT);
sc 492 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_EVENT_ACK, ~WI_INTRS);
sc 495 dev/ic/if_wi.c wi_rxeof(sc);
sc 496 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_EVENT_ACK, WI_EV_RX);
sc 500 dev/ic/if_wi.c wi_txeof(sc, status);
sc 501 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_EVENT_ACK, WI_EV_TX);
sc 506 dev/ic/if_wi.c id = CSR_READ_2(sc, WI_ALLOC_FID);
sc 507 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_EVENT_ACK, WI_EV_ALLOC);
sc 508 dev/ic/if_wi.c if (id == sc->wi_tx_data_id)
sc 509 dev/ic/if_wi.c wi_txeof(sc, status);
sc 513 dev/ic/if_wi.c wi_update_stats(sc);
sc 514 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_EVENT_ACK, WI_EV_INFO);
sc 518 dev/ic/if_wi.c wi_txeof(sc, status);
sc 519 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_EVENT_ACK, WI_EV_TX_EXC);
sc 523 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_EVENT_ACK, WI_EV_INFO_DROP);
sc 527 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_INT_EN, WI_INTRS);
sc 536 dev/ic/if_wi.c wi_get_fid_io(struct wi_softc *sc, int fid)
sc 538 dev/ic/if_wi.c return CSR_READ_2(sc, fid);
sc 543 dev/ic/if_wi.c wi_rxeof(struct wi_softc *sc)
sc 553 dev/ic/if_wi.c ifp = &sc->sc_ic.ic_if;
sc 555 dev/ic/if_wi.c id = wi_get_fid(sc, WI_RX_FID);
sc 557 dev/ic/if_wi.c if (sc->wi_procframe || sc->wi_debug.wi_monitor) {
sc 575 dev/ic/if_wi.c if (wi_read_data(sc, id, 0, mtod(m, caddr_t),
sc 609 dev/ic/if_wi.c "unknown type on port 7\n", WI_PRT_ARG(sc));
sc 621 dev/ic/if_wi.c "(wi_status=0x%x)\n", WI_PRT_ARG(sc),
sc 634 dev/ic/if_wi.c if (wi_read_data(sc, id, hdrlen, mtod(m, caddr_t) + hdrlen,
sc 646 dev/ic/if_wi.c if (wi_read_data(sc, id, 0, (caddr_t)&rx_frame,
sc 683 dev/ic/if_wi.c sc->wi_ptype == WI_PORTTYPE_HOSTAP) {
sc 690 dev/ic/if_wi.c "wi_status=0x%x)\n", sc->sc_dev.dv_xname,
sc 700 dev/ic/if_wi.c if (wi_read_data(sc, id, WI_802_11_OFFSET_RAW,
sc 704 dev/ic/if_wi.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 715 dev/ic/if_wi.c wihap_mgmt_input(sc, &rx_frame, m);
sc 728 dev/ic/if_wi.c WI_PRT_ARG(sc),
sc 745 dev/ic/if_wi.c if (wi_read_data(sc, id, WI_802_11_OFFSET,
sc 758 dev/ic/if_wi.c WI_PRT_ARG(sc),
sc 769 dev/ic/if_wi.c if (wi_read_data(sc, id, WI_802_3_OFFSET,
sc 780 dev/ic/if_wi.c if (sc->wi_use_wep &&
sc 784 dev/ic/if_wi.c switch (sc->wi_crypto_algorithm) {
sc 789 dev/ic/if_wi.c (caddr_t)sc->wi_rxbuf);
sc 792 dev/ic/if_wi.c if (wi_do_hostdecrypt(sc, sc->wi_rxbuf +
sc 794 dev/ic/if_wi.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 795 dev/ic/if_wi.c printf(WI_PRT_FMT ": Error decrypting incoming packet.\n", WI_PRT_ARG(sc));
sc 811 dev/ic/if_wi.c sc->wi_rxbuf + sizeof(struct ether_header) +
sc 821 dev/ic/if_wi.c if (sc->wi_ptype == WI_PORTTYPE_HOSTAP) {
sc 828 dev/ic/if_wi.c if (wihap_data_input(sc, &rx_frame, m))
sc 840 dev/ic/if_wi.c if (sc->wi_procframe || sc->wi_debug.wi_monitor)
sc 849 dev/ic/if_wi.c wi_txeof(struct wi_softc *sc, int status)
sc 853 dev/ic/if_wi.c ifp = &sc->sc_ic.ic_if;
sc 869 dev/ic/if_wi.c struct wi_softc *sc;
sc 873 dev/ic/if_wi.c sc = xsc;
sc 874 dev/ic/if_wi.c ifp = &sc->sc_ic.ic_if;
sc 876 dev/ic/if_wi.c timeout_add(&sc->sc_timo, hz * 60);
sc 883 dev/ic/if_wi.c rv = wi_cmd(sc, WI_CMD_INQUIRE, WI_INFO_COUNTERS, 0, 0);
sc 886 dev/ic/if_wi.c printf(WI_PRT_FMT ": wi_cmd failed with %d\n", WI_PRT_ARG(sc),
sc 893 dev/ic/if_wi.c wi_update_stats(struct wi_softc *sc)
sc 902 dev/ic/if_wi.c ifp = &sc->sc_ic.ic_if;
sc 904 dev/ic/if_wi.c id = wi_get_fid(sc, WI_INFO_FID);
sc 906 dev/ic/if_wi.c wi_read_data(sc, id, 0, (char *)&gen, 4);
sc 909 dev/ic/if_wi.c sc->wi_scanbuf_len = letoh16(gen.wi_len);
sc 910 dev/ic/if_wi.c wi_read_data(sc, id, 4, (caddr_t)sc->wi_scanbuf,
sc 911 dev/ic/if_wi.c sc->wi_scanbuf_len * 2);
sc 917 dev/ic/if_wi.c len = (letoh16(gen.wi_len) - 1 < sizeof(sc->wi_stats) / 4) ?
sc 918 dev/ic/if_wi.c letoh16(gen.wi_len) - 1 : sizeof(sc->wi_stats) / 4;
sc 920 dev/ic/if_wi.c ptr = (u_int32_t *)&sc->wi_stats;
sc 923 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_BUS_USB) {
sc 924 dev/ic/if_wi.c wi_read_data(sc, id, 4 + i*2, (char *)&t, 2);
sc 927 dev/ic/if_wi.c t = CSR_READ_2(sc, WI_DATA1);
sc 935 dev/ic/if_wi.c ifp->if_collisions = sc->wi_stats.wi_tx_single_retries +
sc 936 dev/ic/if_wi.c sc->wi_stats.wi_tx_multi_retries +
sc 937 dev/ic/if_wi.c sc->wi_stats.wi_tx_retry_limit;
sc 943 dev/ic/if_wi.c wi_cmd_io(struct wi_softc *sc, int cmd, int val0, int val1, int val2)
sc 948 dev/ic/if_wi.c for (i = sc->wi_cmd_count; i--; DELAY(1000)) {
sc 949 dev/ic/if_wi.c if (!(CSR_READ_2(sc, WI_COMMAND) & WI_CMD_BUSY))
sc 953 dev/ic/if_wi.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 955 dev/ic/if_wi.c WI_PRT_ARG(sc));
sc 959 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_PARAM0, val0);
sc 960 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_PARAM1, val1);
sc 961 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_PARAM2, val2);
sc 962 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_COMMAND, cmd);
sc 969 dev/ic/if_wi.c s = CSR_READ_2(sc, WI_EVENT_STAT) & WI_EV_CMD;
sc 972 dev/ic/if_wi.c s = CSR_READ_2(sc, WI_STATUS);
sc 973 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_EVENT_ACK, WI_EV_CMD);
sc 981 dev/ic/if_wi.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 984 dev/ic/if_wi.c WI_PRT_ARG(sc), cmd, s);
sc 992 dev/ic/if_wi.c wi_reset(struct wi_softc *sc)
sc 996 dev/ic/if_wi.c DPRINTF(WID_RESET, ("wi_reset: sc %p\n", sc));
sc 999 dev/ic/if_wi.c if (sc->sc_firmware_type == WI_SYMBOL) {
sc 1000 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_INITIALIZED)
sc 1006 dev/ic/if_wi.c if ((error = wi_cmd(sc, WI_CMD_INI, 0, 0, 0)) == 0)
sc 1010 dev/ic/if_wi.c printf(WI_PRT_FMT ": init failed\n", WI_PRT_ARG(sc));
sc 1013 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_INITIALIZED;
sc 1015 dev/ic/if_wi.c wi_intr_enable(sc, 0);
sc 1016 dev/ic/if_wi.c wi_intr_ack(sc, 0xffff);
sc 1025 dev/ic/if_wi.c wi_cor_reset(struct wi_softc *sc)
sc 1029 dev/ic/if_wi.c DPRINTF(WID_RESET, ("wi_cor_reset: sc %p\n", sc));
sc 1037 dev/ic/if_wi.c if (sc->sc_firmware_type != WI_LUCENT) {
sc 1038 dev/ic/if_wi.c cor_value = bus_space_read_1(sc->wi_ltag, sc->wi_lhandle,
sc 1039 dev/ic/if_wi.c sc->wi_cor_offset);
sc 1040 dev/ic/if_wi.c bus_space_write_1(sc->wi_ltag, sc->wi_lhandle,
sc 1041 dev/ic/if_wi.c sc->wi_cor_offset, (cor_value | WI_COR_SOFT_RESET));
sc 1043 dev/ic/if_wi.c bus_space_write_1(sc->wi_ltag, sc->wi_lhandle,
sc 1044 dev/ic/if_wi.c sc->wi_cor_offset, (cor_value & ~WI_COR_SOFT_RESET));
sc 1055 dev/ic/if_wi.c wi_read_record_io(struct wi_softc *sc, struct wi_ltv_gen *ltv)
sc 1061 dev/ic/if_wi.c if (sc->sc_firmware_type != WI_LUCENT) {
sc 1080 dev/ic/if_wi.c if (wi_cmd(sc, WI_CMD_ACCESS|WI_ACCESS_READ, ltv->wi_type, 0, 0))
sc 1084 dev/ic/if_wi.c if (wi_seek(sc, ltv->wi_type, 0, WI_BAP1))
sc 1092 dev/ic/if_wi.c len = CSR_READ_2(sc, WI_DATA1);
sc 1095 dev/ic/if_wi.c code = CSR_READ_2(sc, WI_DATA1);
sc 1105 dev/ic/if_wi.c CSR_READ_RAW_2(sc, WI_DATA1, ptr, (ltv->wi_len-1)*2);
sc 1107 dev/ic/if_wi.c if (ltv->wi_type == WI_RID_PORTTYPE && sc->wi_ptype == WI_PORTTYPE_IBSS
sc 1108 dev/ic/if_wi.c && ltv->wi_val == sc->wi_ibss_port) {
sc 1115 dev/ic/if_wi.c } else if (sc->sc_firmware_type != WI_LUCENT) {
sc 1155 dev/ic/if_wi.c wi_write_record_io(struct wi_softc *sc, struct wi_ltv_gen *ltv)
sc 1167 dev/ic/if_wi.c p2ltv.wi_val = sc->wi_ibss_port;
sc 1169 dev/ic/if_wi.c } else if (sc->sc_firmware_type != WI_LUCENT) {
sc 1202 dev/ic/if_wi.c if (sc->wi_authtype != IEEE80211_AUTH_OPEN ||
sc 1203 dev/ic/if_wi.c sc->sc_firmware_type == WI_SYMBOL)
sc 1206 dev/ic/if_wi.c switch (sc->wi_crypto_algorithm) {
sc 1212 dev/ic/if_wi.c if (sc->wi_ptype == WI_PORTTYPE_HOSTAP)
sc 1238 dev/ic/if_wi.c keylen = wk->wi_keys[sc->wi_tx_key].wi_keylen;
sc 1247 dev/ic/if_wi.c error = wi_write_record(sc,
sc 1257 dev/ic/if_wi.c if (wi_seek(sc, ltv->wi_type, 0, WI_BAP1))
sc 1260 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_DATA1, ltv->wi_len);
sc 1261 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_DATA1, ltv->wi_type);
sc 1265 dev/ic/if_wi.c CSR_WRITE_RAW_2(sc, WI_DATA1, ptr, (ltv->wi_len-1) *2);
sc 1267 dev/ic/if_wi.c if (wi_cmd(sc, WI_CMD_ACCESS|WI_ACCESS_WRITE, ltv->wi_type, 0, 0))
sc 1274 dev/ic/if_wi.c wi_seek(struct wi_softc *sc, int id, int off, int chan)
sc 1289 dev/ic/if_wi.c printf(WI_PRT_FMT ": invalid data path: %x\n", WI_PRT_ARG(sc),
sc 1294 dev/ic/if_wi.c CSR_WRITE_2(sc, selreg, id);
sc 1295 dev/ic/if_wi.c CSR_WRITE_2(sc, offreg, off);
sc 1298 dev/ic/if_wi.c if (!(CSR_READ_2(sc, offreg) & (WI_OFF_BUSY|WI_OFF_ERR)))
sc 1308 dev/ic/if_wi.c wi_read_data_io(struct wi_softc *sc, int id, int off, caddr_t buf, int len)
sc 1312 dev/ic/if_wi.c if (wi_seek(sc, id, off, WI_BAP1))
sc 1316 dev/ic/if_wi.c CSR_READ_RAW_2(sc, WI_DATA1, ptr, len);
sc 1334 dev/ic/if_wi.c wi_write_data_io(struct wi_softc *sc, int id, int off, caddr_t buf, int len)
sc 1342 dev/ic/if_wi.c if (wi_seek(sc, id, off, WI_BAP0))
sc 1346 dev/ic/if_wi.c CSR_WRITE_RAW_2(sc, WI_DATA0, ptr, len);
sc 1349 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_DATA0, 0x1234);
sc 1350 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_DATA0, 0x5678);
sc 1352 dev/ic/if_wi.c if (wi_seek(sc, id, off + len, WI_BAP0))
sc 1355 dev/ic/if_wi.c if (CSR_READ_2(sc, WI_DATA0) != 0x1234 ||
sc 1356 dev/ic/if_wi.c CSR_READ_2(sc, WI_DATA0) != 0x5678)
sc 1368 dev/ic/if_wi.c wi_alloc_nicmem_io(struct wi_softc *sc, int len, int *id)
sc 1372 dev/ic/if_wi.c if (wi_cmd(sc, WI_CMD_ALLOC_MEM, len, 0, 0)) {
sc 1374 dev/ic/if_wi.c WI_PRT_ARG(sc), len);
sc 1379 dev/ic/if_wi.c if (CSR_READ_2(sc, WI_EVENT_STAT) & WI_EV_ALLOC)
sc 1386 dev/ic/if_wi.c *id = CSR_READ_2(sc, WI_ALLOC_FID);
sc 1387 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_EVENT_ACK, WI_EV_ALLOC);
sc 1389 dev/ic/if_wi.c if (wi_seek(sc, *id, 0, WI_BAP0))
sc 1393 dev/ic/if_wi.c CSR_WRITE_2(sc, WI_DATA0, 0);
sc 1399 dev/ic/if_wi.c wi_setmulti(struct wi_softc *sc)
sc 1407 dev/ic/if_wi.c ifp = &sc->sc_ic.ic_if;
sc 1416 dev/ic/if_wi.c wi_write_record(sc, (struct wi_ltv_gen *)&mcast);
sc 1420 dev/ic/if_wi.c ETHER_FIRST_MULTI(step, &sc->sc_ic.ic_ac, enm);
sc 1438 dev/ic/if_wi.c wi_write_record(sc, (struct wi_ltv_gen *)&mcast);
sc 1444 dev/ic/if_wi.c wi_setdef(struct wi_softc *sc, struct wi_req *wreq)
sc 1449 dev/ic/if_wi.c ifp = &sc->sc_ic.ic_if;
sc 1455 dev/ic/if_wi.c bcopy((char *)&wreq->wi_val, (char *)&sc->sc_ic.ic_myaddr,
sc 1459 dev/ic/if_wi.c error = wi_sync_media(sc, letoh16(wreq->wi_val[0]),
sc 1460 dev/ic/if_wi.c sc->wi_tx_rate);
sc 1463 dev/ic/if_wi.c error = wi_sync_media(sc, sc->wi_ptype,
sc 1467 dev/ic/if_wi.c sc->wi_max_data_len = letoh16(wreq->wi_val[0]);
sc 1470 dev/ic/if_wi.c sc->wi_rts_thresh = letoh16(wreq->wi_val[0]);
sc 1473 dev/ic/if_wi.c sc->wi_ap_density = letoh16(wreq->wi_val[0]);
sc 1476 dev/ic/if_wi.c sc->wi_create_ibss = letoh16(wreq->wi_val[0]);
sc 1477 dev/ic/if_wi.c error = wi_sync_media(sc, sc->wi_ptype, sc->wi_tx_rate);
sc 1480 dev/ic/if_wi.c sc->wi_channel = letoh16(wreq->wi_val[0]);
sc 1483 dev/ic/if_wi.c error = wi_set_ssid(&sc->wi_node_name,
sc 1487 dev/ic/if_wi.c error = wi_set_ssid(&sc->wi_net_name,
sc 1491 dev/ic/if_wi.c error = wi_set_ssid(&sc->wi_ibss_name,
sc 1495 dev/ic/if_wi.c sc->wi_pm_enabled = letoh16(wreq->wi_val[0]);
sc 1498 dev/ic/if_wi.c sc->wi_mor_enabled = letoh16(wreq->wi_val[0]);
sc 1501 dev/ic/if_wi.c sc->wi_max_sleep = letoh16(wreq->wi_val[0]);
sc 1504 dev/ic/if_wi.c sc->wi_authtype = letoh16(wreq->wi_val[0]);
sc 1507 dev/ic/if_wi.c sc->wi_roaming = letoh16(wreq->wi_val[0]);
sc 1510 dev/ic/if_wi.c sc->wi_diversity = letoh16(wreq->wi_val[0]);
sc 1513 dev/ic/if_wi.c sc->wi_enh_security = letoh16(wreq->wi_val[0]);
sc 1516 dev/ic/if_wi.c sc->wi_use_wep = letoh16(wreq->wi_val[0]);
sc 1519 dev/ic/if_wi.c sc->wi_tx_key = letoh16(wreq->wi_val[0]);
sc 1522 dev/ic/if_wi.c bcopy((char *)wreq, (char *)&sc->wi_keys,
sc 1528 dev/ic/if_wi.c sc->wi_crypto_algorithm = WI_CRYPTO_FIRMWARE_WEP;
sc 1531 dev/ic/if_wi.c sc->wi_crypto_algorithm = WI_CRYPTO_SOFTWARE_WEP;
sc 1535 dev/ic/if_wi.c WI_PRT_ARG(sc), letoh16(wreq->wi_val[0]));
sc 1551 dev/ic/if_wi.c struct wi_softc *sc;
sc 1566 dev/ic/if_wi.c sc = ifp->if_softc;
sc 1569 dev/ic/if_wi.c if (!(sc->wi_flags & WI_FLAGS_ATTACHED)) {
sc 1577 dev/ic/if_wi.c if ((error = ether_ioctl(ifp, &sc->sc_ic.ic_ac, command, data)) > 0) {
sc 1588 dev/ic/if_wi.c wi_init(sc);
sc 1589 dev/ic/if_wi.c arp_ifinit(&sc->sc_ic.ic_ac, ifa);
sc 1593 dev/ic/if_wi.c wi_init(sc);
sc 1610 dev/ic/if_wi.c !(sc->wi_if_flags & IFF_PROMISC)) {
sc 1611 dev/ic/if_wi.c if (sc->wi_ptype != WI_PORTTYPE_HOSTAP)
sc 1615 dev/ic/if_wi.c sc->wi_if_flags & IFF_PROMISC) {
sc 1616 dev/ic/if_wi.c if (sc->wi_ptype != WI_PORTTYPE_HOSTAP)
sc 1619 dev/ic/if_wi.c wi_init(sc);
sc 1621 dev/ic/if_wi.c wi_stop(sc);
sc 1622 dev/ic/if_wi.c sc->wi_if_flags = ifp->if_flags;
sc 1629 dev/ic/if_wi.c ether_addmulti(ifr, &sc->sc_ic.ic_ac) :
sc 1630 dev/ic/if_wi.c ether_delmulti(ifr, &sc->sc_ic.ic_ac);
sc 1638 dev/ic/if_wi.c wi_setmulti(sc);
sc 1644 dev/ic/if_wi.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command);
sc 1659 dev/ic/if_wi.c bcopy((char *)&sc->wi_stats, (char *)&wreq->wi_val,
sc 1660 dev/ic/if_wi.c sizeof(sc->wi_stats));
sc 1661 dev/ic/if_wi.c wreq->wi_len = (sizeof(sc->wi_stats) / 2) + 1;
sc 1668 dev/ic/if_wi.c bcopy((char *)&sc->wi_keys, wreq,
sc 1673 dev/ic/if_wi.c wreq->wi_val[0] = htole16(sc->wi_procframe);
sc 1677 dev/ic/if_wi.c wreq->wi_val[0] = htole16(sc->sc_firmware_type ==
sc 1682 dev/ic/if_wi.c htole16((u_int16_t)sc->wi_crypto_algorithm);
sc 1686 dev/ic/if_wi.c if (sc->sc_firmware_type == WI_LUCENT) {
sc 1688 dev/ic/if_wi.c (char *)sc->wi_scanbuf,
sc 1689 dev/ic/if_wi.c sc->wi_scanbuf_len * 2);
sc 1690 dev/ic/if_wi.c wreq->wi_len = sc->wi_scanbuf_len;
sc 1695 dev/ic/if_wi.c if (wi_read_record(sc, (struct wi_ltv_gen *)wreq)) {
sc 1717 dev/ic/if_wi.c error = wi_mgmt_xmit(sc, (caddr_t)&wreq->wi_val,
sc 1721 dev/ic/if_wi.c sc->wi_procframe = letoh16(wreq->wi_val[0]);
sc 1726 dev/ic/if_wi.c if (sc->sc_firmware_type == WI_LUCENT)
sc 1727 dev/ic/if_wi.c wi_cmd(sc, WI_CMD_INQUIRE,
sc 1730 dev/ic/if_wi.c error = wi_write_record(sc,
sc 1734 dev/ic/if_wi.c if (sc->sc_firmware_type != WI_LUCENT) {
sc 1735 dev/ic/if_wi.c error = wi_setdef(sc, wreq);
sc 1737 dev/ic/if_wi.c wi_init(sc);
sc 1751 dev/ic/if_wi.c !(sc->wi_flags & WI_FLAGS_HAS_DIVERSITY)) ||
sc 1753 dev/ic/if_wi.c !(sc->wi_flags & WI_FLAGS_HAS_ROAMING)) ||
sc 1755 dev/ic/if_wi.c !(sc->wi_flags & WI_FLAGS_HAS_CREATE_IBSS)) ||
sc 1757 dev/ic/if_wi.c !(sc->wi_flags & WI_FLAGS_HAS_MOR)) ||
sc 1759 dev/ic/if_wi.c !(sc->wi_flags & WI_FLAGS_HAS_ENH_SECURITY)) ||
sc 1765 dev/ic/if_wi.c error = wi_write_record(sc, (struct wi_ltv_gen *)wreq);
sc 1767 dev/ic/if_wi.c error = wi_setdef(sc, wreq);
sc 1769 dev/ic/if_wi.c wi_init(sc);
sc 1779 dev/ic/if_wi.c sc->sc_firmware_type == WI_LUCENT) {
sc 1783 dev/ic/if_wi.c error = wi_get_debug(sc, wreq);
sc 1795 dev/ic/if_wi.c error = wi_set_debug(sc, wreq);
sc 1798 dev/ic/if_wi.c if ((ifp->if_flags & IFF_UP) && sc->wi_net_name.i_len > 0) {
sc 1800 dev/ic/if_wi.c error = copyout(&sc->wi_net_name, ifr->ifr_data,
sc 1801 dev/ic/if_wi.c sizeof(sc->wi_net_name));
sc 1807 dev/ic/if_wi.c if (wi_read_record(sc, (struct wi_ltv_gen *)wreq) ||
sc 1831 dev/ic/if_wi.c if (sc->wi_net_name.i_len == nwidp->i_len &&
sc 1832 dev/ic/if_wi.c memcmp(sc->wi_net_name.i_nwid, nwidp->i_nwid, nwidp->i_len) == 0)
sc 1834 dev/ic/if_wi.c wi_set_ssid(&sc->wi_net_name, nwidp->i_nwid, nwidp->i_len);
sc 1835 dev/ic/if_wi.c WI_SETSTR(WI_RID_DESIRED_SSID, sc->wi_net_name);
sc 1838 dev/ic/if_wi.c wi_init(sc);
sc 1843 dev/ic/if_wi.c error = wi_set_nwkey(sc, (struct ieee80211_nwkey *)data);
sc 1846 dev/ic/if_wi.c error = wi_get_nwkey(sc, (struct ieee80211_nwkey *)data);
sc 1851 dev/ic/if_wi.c error = wi_set_pm(sc, (struct ieee80211_power *)data);
sc 1854 dev/ic/if_wi.c error = wi_get_pm(sc, (struct ieee80211_power *)data);
sc 1859 dev/ic/if_wi.c error = wi_set_txpower(sc, (struct ieee80211_txpower *)data);
sc 1862 dev/ic/if_wi.c error = wi_get_txpower(sc, (struct ieee80211_txpower *)data);
sc 1876 dev/ic/if_wi.c error = wi_setdef(sc, wreq);
sc 1878 dev/ic/if_wi.c wi_init(sc);
sc 1885 dev/ic/if_wi.c if (wi_read_record(sc, (struct wi_ltv_gen *)wreq)) {
sc 1898 dev/ic/if_wi.c if (wi_read_record(sc, (struct wi_ltv_gen *)wreq)) {
sc 1907 dev/ic/if_wi.c if (sc->wi_ptype == WI_PORTTYPE_HOSTAP)
sc 1913 dev/ic/if_wi.c if (sc->sc_firmware_type == WI_LUCENT) {
sc 1914 dev/ic/if_wi.c wi_cmd(sc, WI_CMD_INQUIRE,
sc 1924 dev/ic/if_wi.c error = wi_write_record(sc,
sc 1929 dev/ic/if_wi.c sc->wi_scan_lock = 0;
sc 1930 dev/ic/if_wi.c timeout_set(&sc->wi_scan_timeout, wi_scan_timeout, sc);
sc 1932 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_BUS_USB) {
sc 1936 dev/ic/if_wi.c timeout_add(&sc->wi_scan_timeout, len);
sc 1939 dev/ic/if_wi.c error = tsleep(&sc->wi_scan_lock, PCATCH, "wiscan",
sc 1949 dev/ic/if_wi.c if (sc->wi_ptype == WI_PORTTYPE_HOSTAP) {
sc 1951 dev/ic/if_wi.c error = wihap_ioctl(sc, command, data);
sc 1958 dev/ic/if_wi.c if (sc->sc_firmware_type == WI_LUCENT) {
sc 1959 dev/ic/if_wi.c bcopy(sc->wi_scanbuf, wreq->wi_val,
sc 1960 dev/ic/if_wi.c sc->wi_scanbuf_len * 2);
sc 1961 dev/ic/if_wi.c wreq->wi_len = sc->wi_scanbuf_len;
sc 1965 dev/ic/if_wi.c if (wi_read_record(sc, (struct wi_ltv_gen *)wreq)) {
sc 2025 dev/ic/if_wi.c if (sc->wi_ptype != WI_PORTTYPE_HOSTAP)
sc 2028 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_ENH_SECURITY) {
sc 2033 dev/ic/if_wi.c if (wi_read_record(sc, (struct wi_ltv_gen *)wreq)) {
sc 2037 dev/ic/if_wi.c sc->wi_enh_security = letoh16(wreq->wi_val[0]);
sc 2038 dev/ic/if_wi.c if (sc->wi_enh_security == WI_HIDESSID_IGNPROBES)
sc 2046 dev/ic/if_wi.c if (sc->wi_ptype != WI_PORTTYPE_HOSTAP) {
sc 2051 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_ENH_SECURITY) {
sc 2052 dev/ic/if_wi.c sc->wi_enh_security = (flags & IEEE80211_F_HIDENWID) ?
sc 2054 dev/ic/if_wi.c WI_SETVAL(WI_RID_ENH_SECURITY, sc->wi_enh_security);
sc 2064 dev/ic/if_wi.c error = wihap_ioctl(sc, command, data);
sc 2082 dev/ic/if_wi.c struct wi_softc *sc = (struct wi_softc *)arg;
sc 2085 dev/ic/if_wi.c if (sc->wi_scan_lock++ < WI_WAVELAN_RES_TRIES &&
sc 2086 dev/ic/if_wi.c sc->sc_firmware_type != WI_LUCENT &&
sc 2087 dev/ic/if_wi.c (sc->wi_flags & WI_FLAGS_BUS_USB) == 0) {
sc 2101 dev/ic/if_wi.c if (wi_read_record(sc, (struct wi_ltv_gen *)&wreq) == 0 &&
sc 2104 dev/ic/if_wi.c timeout_add(&sc->wi_scan_timeout, WI_WAVELAN_RES_TIMEOUT);
sc 2109 dev/ic/if_wi.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 2111 dev/ic/if_wi.c WI_PRT_ARG(sc), sc->wi_scan_lock);
sc 2114 dev/ic/if_wi.c wakeup(&sc->wi_scan_lock);
sc 2115 dev/ic/if_wi.c sc->wi_scan_lock = 0;
sc 2119 dev/ic/if_wi.c wi_init_io(struct wi_softc *sc)
sc 2121 dev/ic/if_wi.c struct ifnet *ifp = &sc->sc_ic.ic_ac.ac_if;
sc 2126 dev/ic/if_wi.c if (!(sc->wi_flags & WI_FLAGS_ATTACHED))
sc 2129 dev/ic/if_wi.c DPRINTF(WID_INIT, ("wi_init: sc %p\n", sc));
sc 2134 dev/ic/if_wi.c wi_stop(sc);
sc 2136 dev/ic/if_wi.c wi_reset(sc);
sc 2139 dev/ic/if_wi.c WI_SETVAL(WI_RID_MAX_DATALEN, sc->wi_max_data_len);
sc 2142 dev/ic/if_wi.c WI_SETVAL(WI_RID_PORTTYPE, sc->wi_ptype);
sc 2145 dev/ic/if_wi.c WI_SETVAL(WI_RID_CREATE_IBSS, sc->wi_create_ibss);
sc 2148 dev/ic/if_wi.c WI_SETVAL(WI_RID_RTS_THRESH, sc->wi_rts_thresh);
sc 2151 dev/ic/if_wi.c WI_SETVAL(WI_RID_TX_RATE, sc->wi_tx_rate);
sc 2154 dev/ic/if_wi.c WI_SETVAL(WI_RID_SYSTEM_SCALE, sc->wi_ap_density);
sc 2157 dev/ic/if_wi.c WI_SETVAL(WI_RID_PM_ENABLED, sc->wi_pm_enabled);
sc 2160 dev/ic/if_wi.c WI_SETVAL(WI_RID_MAX_SLEEP, sc->wi_max_sleep);
sc 2163 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_ENH_SECURITY)
sc 2164 dev/ic/if_wi.c WI_SETVAL(WI_RID_ENH_SECURITY, sc->wi_enh_security);
sc 2167 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_ROAMING)
sc 2168 dev/ic/if_wi.c WI_SETVAL(WI_RID_ROAMING_MODE, sc->wi_roaming);
sc 2171 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_DIVERSITY)
sc 2172 dev/ic/if_wi.c WI_SETVAL(WI_RID_SYMBOL_DIVERSITY, sc->wi_diversity);
sc 2175 dev/ic/if_wi.c WI_SETSTR(WI_RID_DESIRED_SSID, sc->wi_net_name);
sc 2178 dev/ic/if_wi.c if (sc->wi_net_name.i_len != 0 && (sc->wi_ptype == WI_PORTTYPE_HOSTAP ||
sc 2179 dev/ic/if_wi.c (sc->wi_create_ibss && sc->wi_ptype == WI_PORTTYPE_IBSS)))
sc 2180 dev/ic/if_wi.c WI_SETSTR(WI_RID_OWN_SSID, sc->wi_net_name);
sc 2182 dev/ic/if_wi.c WI_SETSTR(WI_RID_OWN_SSID, sc->wi_ibss_name);
sc 2185 dev/ic/if_wi.c WI_SETVAL(WI_RID_OWN_CHNL, sc->wi_channel);
sc 2188 dev/ic/if_wi.c WI_SETSTR(WI_RID_NODENAME, sc->wi_node_name);
sc 2194 dev/ic/if_wi.c (char *)&sc->sc_ic.ic_myaddr, ETHER_ADDR_LEN);
sc 2195 dev/ic/if_wi.c bcopy((char *)&sc->sc_ic.ic_myaddr,
sc 2197 dev/ic/if_wi.c wi_write_record(sc, (struct wi_ltv_gen *)&mac);
sc 2207 dev/ic/if_wi.c if (sc->wi_ptype != WI_PORTTYPE_HOSTAP && ifp->if_flags & IFF_PROMISC)
sc 2213 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_HAS_WEP) {
sc 2214 dev/ic/if_wi.c WI_SETVAL(WI_RID_ENCRYPTION, sc->wi_use_wep);
sc 2215 dev/ic/if_wi.c WI_SETVAL(WI_RID_TX_CRYPT_KEY, sc->wi_tx_key);
sc 2216 dev/ic/if_wi.c sc->wi_keys.wi_len = (sizeof(struct wi_ltv_keys) / 2) + 1;
sc 2217 dev/ic/if_wi.c sc->wi_keys.wi_type = WI_RID_DEFLT_CRYPT_KEYS;
sc 2218 dev/ic/if_wi.c wi_write_record(sc, (struct wi_ltv_gen *)&sc->wi_keys);
sc 2219 dev/ic/if_wi.c if (sc->sc_firmware_type != WI_LUCENT && sc->wi_use_wep) {
sc 2228 dev/ic/if_wi.c if (sc->sc_firmware_type == WI_INTERSIL &&
sc 2229 dev/ic/if_wi.c sc->sc_sta_firmware_ver < 802 ) {
sc 2233 dev/ic/if_wi.c WI_SETVAL(WI_RID_CNFAUTHMODE, sc->wi_authtype);
sc 2238 dev/ic/if_wi.c wi_setmulti(sc);
sc 2241 dev/ic/if_wi.c wi_cmd(sc, WI_CMD_ENABLE | sc->wi_portnum, 0, 0, 0);
sc 2243 dev/ic/if_wi.c if (wi_alloc_nicmem(sc, ETHER_MAX_LEN + sizeof(struct wi_frame) + 8, &id))
sc 2245 dev/ic/if_wi.c WI_PRT_ARG(sc));
sc 2246 dev/ic/if_wi.c sc->wi_tx_data_id = id;
sc 2248 dev/ic/if_wi.c if (wi_alloc_nicmem(sc, ETHER_MAX_LEN + sizeof(struct wi_frame) + 8, &id))
sc 2250 dev/ic/if_wi.c WI_PRT_ARG(sc));
sc 2251 dev/ic/if_wi.c sc->wi_tx_mgmt_id = id;
sc 2254 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_TXPOWER)
sc 2255 dev/ic/if_wi.c wi_set_txpower(sc, NULL);
sc 2258 dev/ic/if_wi.c wi_intr_enable(sc, WI_INTRS);
sc 2260 dev/ic/if_wi.c wihap_init(sc);
sc 2267 dev/ic/if_wi.c timeout_add(&sc->sc_timo, hz * 60);
sc 2340 dev/ic/if_wi.c wi_do_hostencrypt(struct wi_softc *sc, caddr_t buf, int len)
sc 2347 dev/ic/if_wi.c if (!sc->wi_icv_flag) {
sc 2348 dev/ic/if_wi.c sc->wi_icv = arc4random();
sc 2349 dev/ic/if_wi.c sc->wi_icv_flag++;
sc 2351 dev/ic/if_wi.c sc->wi_icv++;
sc 2356 dev/ic/if_wi.c if (sc->wi_icv >= 0x03ff00 &&
sc 2357 dev/ic/if_wi.c (sc->wi_icv & 0xf8ff00) == 0x00ff00)
sc 2358 dev/ic/if_wi.c sc->wi_icv += 0x000100;
sc 2362 dev/ic/if_wi.c key[0] = sc->wi_icv >> 16;
sc 2363 dev/ic/if_wi.c key[1] = sc->wi_icv >> 8;
sc 2364 dev/ic/if_wi.c key[2] = sc->wi_icv;
sc 2366 dev/ic/if_wi.c klen = letoh16(sc->wi_keys.wi_keys[sc->wi_tx_key].wi_keylen);
sc 2367 dev/ic/if_wi.c bcopy((char *)&sc->wi_keys.wi_keys[sc->wi_tx_key].wi_keydat,
sc 2379 dev/ic/if_wi.c dat[3] = sc->wi_tx_key << 6; /* pad and keyid */
sc 2399 dev/ic/if_wi.c wi_do_hostdecrypt(struct wi_softc *sc, caddr_t buf, int len)
sc 2421 dev/ic/if_wi.c klen = letoh16(sc->wi_keys.wi_keys[kid].wi_keylen);
sc 2422 dev/ic/if_wi.c bcopy((char *)&sc->wi_keys.wi_keys[kid].wi_keydat,
sc 2442 dev/ic/if_wi.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 2444 dev/ic/if_wi.c "0x%02x%02x%02x%02x vs. 0x%x\n", WI_PRT_ARG(sc),
sc 2455 dev/ic/if_wi.c struct wi_softc *sc;
sc 2461 dev/ic/if_wi.c sc = ifp->if_softc;
sc 2463 dev/ic/if_wi.c DPRINTF(WID_START, ("wi_start: ifp %p sc %p\n", ifp, sc));
sc 2465 dev/ic/if_wi.c if (!(sc->wi_flags & WI_FLAGS_ATTACHED))
sc 2478 dev/ic/if_wi.c id = sc->wi_tx_data_id;
sc 2481 dev/ic/if_wi.c if (sc->wi_ptype == WI_PORTTYPE_HOSTAP) {
sc 2482 dev/ic/if_wi.c if (!wihap_check_tx(&sc->wi_hostap_info, eh->ether_dhost,
sc 2487 dev/ic/if_wi.c WI_PRT_ARG(sc),
sc 2504 dev/ic/if_wi.c if (sc->wi_ptype == WI_PORTTYPE_HOSTAP) {
sc 2507 dev/ic/if_wi.c bcopy((char *)&sc->sc_ic.ic_myaddr,
sc 2511 dev/ic/if_wi.c if (sc->wi_use_wep)
sc 2513 dev/ic/if_wi.c } else if (sc->wi_ptype == WI_PORTTYPE_BSS && sc->wi_use_wep &&
sc 2514 dev/ic/if_wi.c sc->wi_crypto_algorithm != WI_CRYPTO_FIRMWARE_WEP) {
sc 2517 dev/ic/if_wi.c bcopy((char *)&sc->sc_ic.ic_myaddr,
sc 2540 dev/ic/if_wi.c bcopy(&tx_frame.wi_dat[0], &sc->wi_txbuf[4], 8);
sc 2544 dev/ic/if_wi.c (caddr_t)&sc->wi_txbuf[12]);
sc 2546 dev/ic/if_wi.c wi_do_hostencrypt(sc, (caddr_t)&sc->wi_txbuf,
sc 2553 dev/ic/if_wi.c wi_write_data(sc, id, 0, (caddr_t)&tx_frame,
sc 2555 dev/ic/if_wi.c wi_write_data(sc, id, WI_802_11_OFFSET_RAW,
sc 2556 dev/ic/if_wi.c (caddr_t)&sc->wi_txbuf,
sc 2562 dev/ic/if_wi.c (caddr_t)&sc->wi_txbuf);
sc 2565 dev/ic/if_wi.c wi_write_data(sc, id, 0, (caddr_t)&tx_frame,
sc 2567 dev/ic/if_wi.c wi_write_data(sc, id, WI_802_11_OFFSET,
sc 2568 dev/ic/if_wi.c (caddr_t)&sc->wi_txbuf,
sc 2575 dev/ic/if_wi.c if (sc->wi_ptype == WI_PORTTYPE_HOSTAP && sc->wi_use_wep) {
sc 2580 dev/ic/if_wi.c WI_PRT_ARG(sc));
sc 2583 dev/ic/if_wi.c (caddr_t)&sc->wi_txbuf);
sc 2585 dev/ic/if_wi.c wi_write_data(sc, id, 0, (caddr_t)&tx_frame,
sc 2587 dev/ic/if_wi.c wi_write_data(sc, id, WI_802_3_OFFSET,
sc 2588 dev/ic/if_wi.c (caddr_t)&sc->wi_txbuf, m0->m_pkthdr.len + 2);
sc 2610 dev/ic/if_wi.c if (wi_cmd(sc, WI_CMD_TX|WI_RECLAIM, id, 0, 0))
sc 2611 dev/ic/if_wi.c printf(WI_PRT_FMT ": wi_start: xmit failed\n", WI_PRT_ARG(sc));
sc 2617 dev/ic/if_wi.c wi_mgmt_xmit(struct wi_softc *sc, caddr_t data, int len)
sc 2624 dev/ic/if_wi.c if (!(sc->wi_flags & WI_FLAGS_ATTACHED))
sc 2631 dev/ic/if_wi.c id = sc->wi_tx_mgmt_id;
sc 2641 dev/ic/if_wi.c wi_write_data(sc, id, 0, (caddr_t)&tx_frame, sizeof(struct wi_frame));
sc 2642 dev/ic/if_wi.c wi_write_data(sc, id, WI_802_11_OFFSET_RAW, dptr,
sc 2645 dev/ic/if_wi.c if (wi_cmd(sc, WI_CMD_TX|WI_RECLAIM, id, 0, 0)) {
sc 2647 dev/ic/if_wi.c WI_PRT_ARG(sc));
sc 2653 dev/ic/if_wi.c wi_reset(sc);
sc 2661 dev/ic/if_wi.c wi_stop(struct wi_softc *sc)
sc 2665 dev/ic/if_wi.c wihap_shutdown(sc);
sc 2667 dev/ic/if_wi.c if (!(sc->wi_flags & WI_FLAGS_ATTACHED))
sc 2670 dev/ic/if_wi.c DPRINTF(WID_STOP, ("wi_stop: sc %p\n", sc));
sc 2672 dev/ic/if_wi.c timeout_del(&sc->sc_timo);
sc 2674 dev/ic/if_wi.c ifp = &sc->sc_ic.ic_if;
sc 2676 dev/ic/if_wi.c wi_intr_enable(sc, 0);
sc 2677 dev/ic/if_wi.c wi_cmd(sc, WI_CMD_DISABLE|sc->wi_portnum, 0, 0, 0);
sc 2689 dev/ic/if_wi.c struct wi_softc *sc;
sc 2691 dev/ic/if_wi.c sc = ifp->if_softc;
sc 2693 dev/ic/if_wi.c printf(WI_PRT_FMT ": device timeout\n", WI_PRT_ARG(sc));
sc 2695 dev/ic/if_wi.c wi_cor_reset(sc);
sc 2696 dev/ic/if_wi.c wi_init(sc);
sc 2704 dev/ic/if_wi.c wi_detach(struct wi_softc *sc)
sc 2707 dev/ic/if_wi.c ifp = &sc->sc_ic.ic_if;
sc 2710 dev/ic/if_wi.c wi_stop(sc);
sc 2712 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_ATTACHED) {
sc 2713 dev/ic/if_wi.c sc->wi_flags &= ~WI_FLAGS_ATTACHED;
sc 2714 dev/ic/if_wi.c if (sc->sc_sdhook != NULL)
sc 2715 dev/ic/if_wi.c shutdownhook_disestablish(sc->sc_sdhook);
sc 2722 dev/ic/if_wi.c struct wi_softc *sc;
sc 2724 dev/ic/if_wi.c sc = arg;
sc 2725 dev/ic/if_wi.c wi_stop(sc);
sc 2731 dev/ic/if_wi.c wi_get_id(struct wi_softc *sc)
sc 2743 dev/ic/if_wi.c wi_read_record(sc, (struct wi_ltv_gen *)&ver);
sc 2750 dev/ic/if_wi.c sc->sc_firmware_type = id->firm_type;
sc 2753 dev/ic/if_wi.c sc->sc_firmware_type = WI_INTERSIL;
sc 2756 dev/ic/if_wi.c sc->sc_firmware_type = WI_LUCENT;
sc 2760 dev/ic/if_wi.c if (sc->sc_firmware_type != WI_LUCENT) {
sc 2764 dev/ic/if_wi.c wi_read_record(sc, (struct wi_ltv_gen *)&ver);
sc 2774 dev/ic/if_wi.c wi_read_record(sc, (struct wi_ltv_gen *)&ver);
sc 2778 dev/ic/if_wi.c sc->sc_sta_firmware_ver = ver.wi_ver[2] * 10000 +
sc 2781 dev/ic/if_wi.c if (sc->sc_firmware_type == WI_INTERSIL &&
sc 2782 dev/ic/if_wi.c (sc->sc_sta_firmware_ver == 10102 || sc->sc_sta_firmware_ver == 20102)) {
sc 2790 dev/ic/if_wi.c if (wi_read_record(sc, (struct wi_ltv_gen *)&sver) == 0 &&
sc 2793 dev/ic/if_wi.c sc->sc_firmware_type = WI_SYMBOL;
sc 2794 dev/ic/if_wi.c sc->sc_sta_firmware_ver = (p[1] - '0') * 10000 +
sc 2800 dev/ic/if_wi.c if (sc->sc_firmware_type == WI_LUCENT) {
sc 2801 dev/ic/if_wi.c printf("%s: Firmware %d.%02d variant %d, ", WI_PRT_ARG(sc),
sc 2805 dev/ic/if_wi.c WI_PRT_ARG(sc),
sc 2806 dev/ic/if_wi.c sc->sc_firmware_type == WI_SYMBOL ? "Symbol " : "",
sc 2808 dev/ic/if_wi.c pri_fw_ver[2], sc->sc_sta_firmware_ver / 10000,
sc 2809 dev/ic/if_wi.c (sc->sc_sta_firmware_ver % 10000) / 100,
sc 2810 dev/ic/if_wi.c sc->sc_sta_firmware_ver % 100);
sc 2815 dev/ic/if_wi.c wi_sync_media(struct wi_softc *sc, int ptype, int txrate)
sc 2817 dev/ic/if_wi.c int media = sc->sc_media.ifm_cur->ifm_media;
sc 2854 dev/ic/if_wi.c if (sc->wi_create_ibss)
sc 2865 dev/ic/if_wi.c if (ifmedia_match(&sc->sc_media, media, sc->sc_media.ifm_mask) == NULL)
sc 2867 dev/ic/if_wi.c ifmedia_set(&sc->sc_media, media);
sc 2868 dev/ic/if_wi.c sc->wi_ptype = ptype;
sc 2869 dev/ic/if_wi.c sc->wi_tx_rate = txrate;
sc 2876 dev/ic/if_wi.c struct wi_softc *sc = ifp->if_softc;
sc 2877 dev/ic/if_wi.c int otype = sc->wi_ptype;
sc 2878 dev/ic/if_wi.c int orate = sc->wi_tx_rate;
sc 2879 dev/ic/if_wi.c int ocreate_ibss = sc->wi_create_ibss;
sc 2881 dev/ic/if_wi.c if ((sc->sc_media.ifm_cur->ifm_media & IFM_IEEE80211_HOSTAP) &&
sc 2882 dev/ic/if_wi.c sc->sc_firmware_type != WI_INTERSIL)
sc 2885 dev/ic/if_wi.c sc->wi_create_ibss = 0;
sc 2887 dev/ic/if_wi.c switch (sc->sc_media.ifm_cur->ifm_media & IFM_OMASK) {
sc 2889 dev/ic/if_wi.c sc->wi_ptype = WI_PORTTYPE_BSS;
sc 2892 dev/ic/if_wi.c sc->wi_ptype = WI_PORTTYPE_ADHOC;
sc 2895 dev/ic/if_wi.c sc->wi_ptype = WI_PORTTYPE_HOSTAP;
sc 2899 dev/ic/if_wi.c if (!(sc->wi_flags & WI_FLAGS_HAS_CREATE_IBSS))
sc 2901 dev/ic/if_wi.c sc->wi_create_ibss = 1;
sc 2904 dev/ic/if_wi.c sc->wi_ptype = WI_PORTTYPE_IBSS;
sc 2911 dev/ic/if_wi.c switch (IFM_SUBTYPE(sc->sc_media.ifm_cur->ifm_media)) {
sc 2913 dev/ic/if_wi.c sc->wi_tx_rate = 1;
sc 2916 dev/ic/if_wi.c sc->wi_tx_rate = 2;
sc 2919 dev/ic/if_wi.c sc->wi_tx_rate = 3;
sc 2922 dev/ic/if_wi.c sc->wi_tx_rate = 5;
sc 2925 dev/ic/if_wi.c sc->wi_tx_rate = 11;
sc 2929 dev/ic/if_wi.c if (sc->sc_ic.ic_if.if_flags & IFF_UP) {
sc 2930 dev/ic/if_wi.c if (otype != sc->wi_ptype || orate != sc->wi_tx_rate ||
sc 2931 dev/ic/if_wi.c ocreate_ibss != sc->wi_create_ibss)
sc 2932 dev/ic/if_wi.c wi_init(sc);
sc 2935 dev/ic/if_wi.c ifp->if_baudrate = ifmedia_baudrate(sc->sc_media.ifm_cur->ifm_media);
sc 2943 dev/ic/if_wi.c struct wi_softc *sc = ifp->if_softc;
sc 2946 dev/ic/if_wi.c if (!(sc->sc_ic.ic_if.if_flags & IFF_UP)) {
sc 2952 dev/ic/if_wi.c if (sc->wi_tx_rate == 3) {
sc 2957 dev/ic/if_wi.c if (wi_read_record(sc, (struct wi_ltv_gen *)&wreq) == 0) {
sc 2974 dev/ic/if_wi.c imr->ifm_active = sc->sc_media.ifm_cur->ifm_media;
sc 2978 dev/ic/if_wi.c switch (sc->wi_ptype) {
sc 2993 dev/ic/if_wi.c if (wi_read_record(sc, (struct wi_ltv_gen *)&wreq) == 0 &&
sc 3000 dev/ic/if_wi.c wi_set_nwkey(struct wi_softc *sc, struct ieee80211_nwkey *nwkey)
sc 3006 dev/ic/if_wi.c if (!(sc->wi_flags & WI_FLAGS_HAS_WEP))
sc 3010 dev/ic/if_wi.c memcpy(wk, &sc->wi_keys, sizeof(*wk));
sc 3026 dev/ic/if_wi.c if (sc->sc_ic.ic_if.if_flags & IFF_UP) {
sc 3027 dev/ic/if_wi.c error = wi_write_record(sc, (struct wi_ltv_gen *)&wreq);
sc 3031 dev/ic/if_wi.c if ((error = wi_setdef(sc, &wreq)))
sc 3037 dev/ic/if_wi.c if (sc->sc_ic.ic_if.if_flags & IFF_UP) {
sc 3038 dev/ic/if_wi.c error = wi_write_record(sc, (struct wi_ltv_gen *)&wreq);
sc 3042 dev/ic/if_wi.c if ((error = wi_setdef(sc, &wreq)))
sc 3047 dev/ic/if_wi.c if (sc->sc_ic.ic_if.if_flags & IFF_UP) {
sc 3048 dev/ic/if_wi.c error = wi_write_record(sc, (struct wi_ltv_gen *)&wreq);
sc 3052 dev/ic/if_wi.c if ((error = wi_setdef(sc, &wreq)))
sc 3055 dev/ic/if_wi.c if (sc->sc_ic.ic_if.if_flags & IFF_UP)
sc 3056 dev/ic/if_wi.c wi_init(sc);
sc 3061 dev/ic/if_wi.c wi_get_nwkey(struct wi_softc *sc, struct ieee80211_nwkey *nwkey)
sc 3064 dev/ic/if_wi.c struct wi_ltv_keys *wk = &sc->wi_keys;
sc 3066 dev/ic/if_wi.c if (!(sc->wi_flags & WI_FLAGS_HAS_WEP))
sc 3068 dev/ic/if_wi.c nwkey->i_wepon = sc->wi_use_wep;
sc 3069 dev/ic/if_wi.c nwkey->i_defkid = sc->wi_tx_key + 1;
sc 3092 dev/ic/if_wi.c wi_set_pm(struct wi_softc *sc, struct ieee80211_power *power)
sc 3095 dev/ic/if_wi.c sc->wi_pm_enabled = power->i_enabled;
sc 3096 dev/ic/if_wi.c sc->wi_max_sleep = power->i_maxsleep;
sc 3098 dev/ic/if_wi.c if (sc->sc_ic.ic_if.if_flags & IFF_UP)
sc 3099 dev/ic/if_wi.c wi_init(sc);
sc 3105 dev/ic/if_wi.c wi_get_pm(struct wi_softc *sc, struct ieee80211_power *power)
sc 3108 dev/ic/if_wi.c power->i_enabled = sc->wi_pm_enabled;
sc 3109 dev/ic/if_wi.c power->i_maxsleep = sc->wi_max_sleep;
sc 3115 dev/ic/if_wi.c wi_set_txpower(struct wi_softc *sc, struct ieee80211_txpower *txpower)
sc 3124 dev/ic/if_wi.c if (!(sc->wi_flags & WI_FLAGS_TXPOWER))
sc 3130 dev/ic/if_wi.c sc->wi_flags &= ~WI_FLAGS_TXPOWER;
sc 3133 dev/ic/if_wi.c sc->wi_flags |= WI_FLAGS_TXPOWER;
sc 3134 dev/ic/if_wi.c sc->wi_txpower = txpower->i_val;
sc 3140 dev/ic/if_wi.c if ((error = wi_cmd(sc, cmd, alc, 0x8, 0)) != 0)
sc 3148 dev/ic/if_wi.c if (sc->wi_txpower > 20)
sc 3150 dev/ic/if_wi.c else if (sc->wi_txpower < -43)
sc 3153 dev/ic/if_wi.c tmp = sc->wi_txpower;
sc 3162 dev/ic/if_wi.c if ((error = wi_cmd(sc, cmd,
sc 3166 dev/ic/if_wi.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 3167 dev/ic/if_wi.c printf("%s: %u (%d dBm)\n", sc->sc_dev.dv_xname, power,
sc 3168 dev/ic/if_wi.c sc->wi_txpower);
sc 3174 dev/ic/if_wi.c wi_get_txpower(struct wi_softc *sc, struct ieee80211_txpower *txpower)
sc 3181 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_BUS_USB)
sc 3186 dev/ic/if_wi.c if ((error = wi_cmd(sc, cmd,
sc 3190 dev/ic/if_wi.c power = CSR_READ_2(sc, WI_RESP0);
sc 3201 dev/ic/if_wi.c if (sc->wi_flags & WI_FLAGS_TXPOWER)
sc 3221 dev/ic/if_wi.c wi_get_debug(struct wi_softc *sc, struct wi_req *wreq)
sc 3230 dev/ic/if_wi.c wreq->wi_val[0] = htole16(sc->wi_debug.wi_sleep);
sc 3234 dev/ic/if_wi.c wreq->wi_val[0] = htole16(sc->wi_debug.wi_delaysupp);
sc 3238 dev/ic/if_wi.c wreq->wi_val[0] = htole16(sc->wi_debug.wi_txsupp);
sc 3242 dev/ic/if_wi.c wreq->wi_val[0] = htole16(sc->wi_debug.wi_monitor);
sc 3246 dev/ic/if_wi.c wreq->wi_val[0] = htole16(sc->wi_debug.wi_ledtest);
sc 3247 dev/ic/if_wi.c wreq->wi_val[1] = htole16(sc->wi_debug.wi_ledtest_param0);
sc 3248 dev/ic/if_wi.c wreq->wi_val[2] = htole16(sc->wi_debug.wi_ledtest_param1);
sc 3252 dev/ic/if_wi.c wreq->wi_val[0] = htole16(sc->wi_debug.wi_conttx);
sc 3253 dev/ic/if_wi.c wreq->wi_val[1] = htole16(sc->wi_debug.wi_conttx_param0);
sc 3257 dev/ic/if_wi.c wreq->wi_val[0] = htole16(sc->wi_debug.wi_contrx);
sc 3261 dev/ic/if_wi.c wreq->wi_val[0] = htole16(sc->wi_debug.wi_sigstate);
sc 3262 dev/ic/if_wi.c wreq->wi_val[1] = htole16(sc->wi_debug.wi_sigstate_param0);
sc 3266 dev/ic/if_wi.c wreq->wi_val[0] = htole16(sc->wi_debug.wi_confbits);
sc 3267 dev/ic/if_wi.c wreq->wi_val[1] = htole16(sc->wi_debug.wi_confbits_param0);
sc 3278 dev/ic/if_wi.c wi_set_debug(struct wi_softc *sc, struct wi_req *wreq)
sc 3289 dev/ic/if_wi.c sc->wi_debug.wi_sleep = 1;
sc 3292 dev/ic/if_wi.c sc->wi_debug.wi_sleep = 0;
sc 3298 dev/ic/if_wi.c sc->wi_debug.wi_delaysupp = 1;
sc 3301 dev/ic/if_wi.c sc->wi_debug.wi_txsupp = 1;
sc 3304 dev/ic/if_wi.c sc->wi_debug.wi_monitor = 1;
sc 3309 dev/ic/if_wi.c sc->wi_debug.wi_ledtest = 1;
sc 3310 dev/ic/if_wi.c sc->wi_debug.wi_ledtest_param0 = param0;
sc 3311 dev/ic/if_wi.c sc->wi_debug.wi_ledtest_param1 = param1;
sc 3315 dev/ic/if_wi.c sc->wi_debug.wi_conttx = 1;
sc 3316 dev/ic/if_wi.c sc->wi_debug.wi_conttx_param0 = param0;
sc 3319 dev/ic/if_wi.c sc->wi_debug.wi_delaysupp = 0;
sc 3320 dev/ic/if_wi.c sc->wi_debug.wi_txsupp = 0;
sc 3321 dev/ic/if_wi.c sc->wi_debug.wi_monitor = 0;
sc 3322 dev/ic/if_wi.c sc->wi_debug.wi_ledtest = 0;
sc 3323 dev/ic/if_wi.c sc->wi_debug.wi_ledtest_param0 = 0;
sc 3324 dev/ic/if_wi.c sc->wi_debug.wi_ledtest_param1 = 0;
sc 3325 dev/ic/if_wi.c sc->wi_debug.wi_conttx = 0;
sc 3326 dev/ic/if_wi.c sc->wi_debug.wi_conttx_param0 = 0;
sc 3327 dev/ic/if_wi.c sc->wi_debug.wi_contrx = 0;
sc 3328 dev/ic/if_wi.c sc->wi_debug.wi_sigstate = 0;
sc 3329 dev/ic/if_wi.c sc->wi_debug.wi_sigstate_param0 = 0;
sc 3332 dev/ic/if_wi.c sc->wi_debug.wi_contrx = 1;
sc 3336 dev/ic/if_wi.c sc->wi_debug.wi_sigstate = 1;
sc 3337 dev/ic/if_wi.c sc->wi_debug.wi_sigstate_param0 = param0;
sc 3342 dev/ic/if_wi.c sc->wi_debug.wi_confbits = param0;
sc 3343 dev/ic/if_wi.c sc->wi_debug.wi_confbits_param0 = param1;
sc 3354 dev/ic/if_wi.c error = wi_cmd(sc, cmd, param0, param1, 0);
sc 82 dev/ic/if_wi_hostap.c struct wihap_sta_info *wihap_sta_alloc(struct wi_softc *sc, u_int8_t *addr);
sc 86 dev/ic/if_wi_hostap.c void wihap_auth_req(struct wi_softc *sc, struct wi_frame *rxfrm,
sc 88 dev/ic/if_wi_hostap.c void wihap_sta_deauth(struct wi_softc *sc, u_int8_t sta_addr[],
sc 90 dev/ic/if_wi_hostap.c void wihap_deauth_req(struct wi_softc *sc, struct wi_frame *rxfrm,
sc 92 dev/ic/if_wi_hostap.c void wihap_assoc_req(struct wi_softc *sc, struct wi_frame *rxfrm,
sc 94 dev/ic/if_wi_hostap.c void wihap_sta_disassoc(struct wi_softc *sc, u_int8_t sta_addr[],
sc 96 dev/ic/if_wi_hostap.c void wihap_disassoc_req(struct wi_softc *sc, struct wi_frame *rxfrm,
sc 188 dev/ic/if_wi_hostap.c wihap_init(struct wi_softc *sc)
sc 191 dev/ic/if_wi_hostap.c struct wihap_info *whi = &sc->wi_hostap_info;
sc 193 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 194 dev/ic/if_wi_hostap.c printf("wihap_init: sc=%p whi=%p\n", sc, whi);
sc 198 dev/ic/if_wi_hostap.c if (sc->wi_ptype != WI_PORTTYPE_HOSTAP)
sc 208 dev/ic/if_wi_hostap.c timeout_set(&whi->tmo, wihap_timeout, sc);
sc 216 dev/ic/if_wi_hostap.c wihap_sta_disassoc(struct wi_softc *sc, u_int8_t sta_addr[], u_int16_t reason)
sc 221 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 225 dev/ic/if_wi_hostap.c resp_hdr = (struct wi_80211_hdr *)sc->wi_txbuf;
sc 228 dev/ic/if_wi_hostap.c pkt = (caddr_t)&sc->wi_txbuf + sizeof(struct wi_80211_hdr);
sc 231 dev/ic/if_wi_hostap.c bcopy(sc->sc_ic.ic_myaddr, resp_hdr->addr2, IEEE80211_ADDR_LEN);
sc 232 dev/ic/if_wi_hostap.c bcopy(sc->sc_ic.ic_myaddr, resp_hdr->addr3, IEEE80211_ADDR_LEN);
sc 236 dev/ic/if_wi_hostap.c wi_mgmt_xmit(sc, (caddr_t)&sc->wi_txbuf,
sc 245 dev/ic/if_wi_hostap.c wihap_sta_deauth(struct wi_softc *sc, u_int8_t sta_addr[], u_int16_t reason)
sc 250 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 254 dev/ic/if_wi_hostap.c resp_hdr = (struct wi_80211_hdr *)sc->wi_txbuf;
sc 257 dev/ic/if_wi_hostap.c pkt = (caddr_t)&sc->wi_txbuf + sizeof(struct wi_80211_hdr);
sc 260 dev/ic/if_wi_hostap.c bcopy(sc->sc_ic.ic_myaddr, resp_hdr->addr2, IEEE80211_ADDR_LEN);
sc 261 dev/ic/if_wi_hostap.c bcopy(sc->sc_ic.ic_myaddr, resp_hdr->addr3, IEEE80211_ADDR_LEN);
sc 265 dev/ic/if_wi_hostap.c wi_mgmt_xmit(sc, (caddr_t)&sc->wi_txbuf,
sc 274 dev/ic/if_wi_hostap.c wihap_shutdown(struct wi_softc *sc)
sc 276 dev/ic/if_wi_hostap.c struct wihap_info *whi = &sc->wi_hostap_info;
sc 280 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 281 dev/ic/if_wi_hostap.c printf("wihap_shutdown: sc=%p whi=%p\n", sc, whi);
sc 296 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 306 dev/ic/if_wi_hostap.c if (sc->wi_flags & WI_FLAGS_ATTACHED) {
sc 308 dev/ic/if_wi_hostap.c wihap_sta_disassoc(sc, etherbroadcastaddr,
sc 310 dev/ic/if_wi_hostap.c wihap_sta_deauth(sc, etherbroadcastaddr,
sc 349 dev/ic/if_wi_hostap.c struct wi_softc *sc = v;
sc 350 dev/ic/if_wi_hostap.c struct wihap_info *whi = &sc->wi_hostap_info;
sc 364 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 369 dev/ic/if_wi_hostap.c wihap_sta_disassoc(sc, sta->addr,
sc 381 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 386 dev/ic/if_wi_hostap.c wihap_sta_deauth(sc, sta->addr,
sc 410 dev/ic/if_wi_hostap.c struct wi_softc *sc = sta->sc;
sc 411 dev/ic/if_wi_hostap.c struct wihap_info *whi = &sc->wi_hostap_info;
sc 435 dev/ic/if_wi_hostap.c struct wi_softc *sc = sta->sc;
sc 436 dev/ic/if_wi_hostap.c struct wihap_info *whi = &sc->wi_hostap_info;
sc 457 dev/ic/if_wi_hostap.c wihap_sta_alloc(struct wi_softc *sc, u_int8_t *addr)
sc 459 dev/ic/if_wi_hostap.c struct wihap_info *whi = &sc->wi_hostap_info;
sc 482 dev/ic/if_wi_hostap.c sta->sc = sc;
sc 512 dev/ic/if_wi_hostap.c struct wi_softc *sc = sta->sc;
sc 538 dev/ic/if_wi_hostap.c sta->rates &= sc->wi_supprates;
sc 550 dev/ic/if_wi_hostap.c wihap_auth_req(struct wi_softc *sc, struct wi_frame *rxfrm,
sc 553 dev/ic/if_wi_hostap.c struct wihap_info *whi = &sc->wi_hostap_info;
sc 566 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 576 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 609 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 614 dev/ic/if_wi_hostap.c sta = wihap_sta_alloc(sc, rxfrm->wi_addr2);
sc 629 dev/ic/if_wi_hostap.c if (sc->wi_authtype != IEEE80211_AUTH_OPEN) {
sc 641 dev/ic/if_wi_hostap.c if (sc->wi_authtype != IEEE80211_AUTH_SHARED) {
sc 658 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 687 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 697 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 701 dev/ic/if_wi_hostap.c resp_hdr = (struct wi_80211_hdr *)&sc->wi_txbuf;
sc 705 dev/ic/if_wi_hostap.c bcopy(sc->sc_ic.ic_myaddr, resp_hdr->addr2, IEEE80211_ADDR_LEN);
sc 706 dev/ic/if_wi_hostap.c bcopy(sc->sc_ic.ic_myaddr, resp_hdr->addr3, IEEE80211_ADDR_LEN);
sc 708 dev/ic/if_wi_hostap.c pkt = (caddr_t)&sc->wi_txbuf + sizeof(struct wi_80211_hdr);
sc 716 dev/ic/if_wi_hostap.c wi_mgmt_xmit(sc, (caddr_t)&sc->wi_txbuf,
sc 727 dev/ic/if_wi_hostap.c wihap_assoc_req(struct wi_softc *sc, struct wi_frame *rxfrm,
sc 730 dev/ic/if_wi_hostap.c struct wihap_info *whi = &sc->wi_hostap_info;
sc 766 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 771 dev/ic/if_wi_hostap.c if (sc->wi_net_name.i_len != ssid.i_len ||
sc 772 dev/ic/if_wi_hostap.c memcmp(sc->wi_net_name.i_nwid, ssid.i_nwid, ssid.i_len)) {
sc 774 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 776 dev/ic/if_wi_hostap.c ssid.i_len, ssid.i_nwid, sc->wi_net_name.i_len,
sc 777 dev/ic/if_wi_hostap.c sc->wi_net_name.i_nwid);
sc 784 dev/ic/if_wi_hostap.c wihap_sta_deauth(sc, rxfrm->wi_addr2,
sc 791 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 806 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 812 dev/ic/if_wi_hostap.c if ((sc->wi_use_wep && !(capinfo & IEEE80211_CAPINFO_PRIVACY)) ||
sc 813 dev/ic/if_wi_hostap.c (!sc->wi_use_wep && (capinfo & IEEE80211_CAPINFO_PRIVACY))) {
sc 814 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 821 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 831 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 840 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 844 dev/ic/if_wi_hostap.c resp_hdr = (struct wi_80211_hdr *)&sc->wi_txbuf;
sc 847 dev/ic/if_wi_hostap.c pkt = (caddr_t)&sc->wi_txbuf + sizeof(struct wi_80211_hdr);
sc 850 dev/ic/if_wi_hostap.c bcopy(sc->sc_ic.ic_myaddr, resp_hdr->addr2, IEEE80211_ADDR_LEN);
sc 851 dev/ic/if_wi_hostap.c bcopy(sc->sc_ic.ic_myaddr, resp_hdr->addr3, IEEE80211_ADDR_LEN);
sc 856 dev/ic/if_wi_hostap.c rates_len = put_rates(&pkt, sc->wi_supprates);
sc 858 dev/ic/if_wi_hostap.c wi_mgmt_xmit(sc, (caddr_t)&sc->wi_txbuf,
sc 867 dev/ic/if_wi_hostap.c wihap_deauth_req(struct wi_softc *sc, struct wi_frame *rxfrm,
sc 870 dev/ic/if_wi_hostap.c struct wihap_info *whi = &sc->wi_hostap_info;
sc 881 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 896 dev/ic/if_wi_hostap.c wihap_disassoc_req(struct wi_softc *sc, struct wi_frame *rxfrm,
sc 899 dev/ic/if_wi_hostap.c struct wihap_info *whi = &sc->wi_hostap_info;
sc 910 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 919 dev/ic/if_wi_hostap.c wihap_sta_deauth(sc, rxfrm->wi_addr2,
sc 995 dev/ic/if_wi_hostap.c wihap_mgmt_input(struct wi_softc *sc, struct wi_frame *rxfrm, struct mbuf *m)
sc 1000 dev/ic/if_wi_hostap.c if (sc->sc_ic.ic_if.if_flags & IFF_DEBUG)
sc 1013 dev/ic/if_wi_hostap.c wihap_assoc_req(sc, rxfrm, pkt, len);
sc 1018 dev/ic/if_wi_hostap.c wihap_assoc_req(sc, rxfrm, pkt, len);
sc 1031 dev/ic/if_wi_hostap.c wihap_disassoc_req(sc, rxfrm, pkt, len);
sc 1034 dev/ic/if_wi_hostap.c wihap_auth_req(sc, rxfrm, pkt, len);
sc 1037 dev/ic/if_wi_hostap.c wihap_deauth_req(sc, rxfrm, pkt, len);
sc 1108 dev/ic/if_wi_hostap.c wihap_data_input(struct wi_softc *sc, struct wi_frame *rxfrm, struct mbuf *m)
sc 1110 dev/ic/if_wi_hostap.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1111 dev/ic/if_wi_hostap.c struct wihap_info *whi = &sc->wi_hostap_info;
sc 1132 dev/ic/if_wi_hostap.c if (!addr_cmp(rxfrm->wi_addr1, sc->sc_ic.ic_myaddr)) {
sc 1150 dev/ic/if_wi_hostap.c wihap_sta_disassoc(sc, rxfrm->wi_addr2,
sc 1200 dev/ic/if_wi_hostap.c wihap_ioctl(struct wi_softc *sc, u_long command, caddr_t data)
sc 1204 dev/ic/if_wi_hostap.c struct wihap_info *whi = &sc->wi_hostap_info;
sc 1214 dev/ic/if_wi_hostap.c if (!(sc->sc_ic.ic_if.if_flags & IFF_RUNNING))
sc 1230 dev/ic/if_wi_hostap.c wihap_sta_disassoc(sc, sta->addr,
sc 1234 dev/ic/if_wi_hostap.c wihap_sta_deauth(sc, sta->addr,
sc 1279 dev/ic/if_wi_hostap.c sta = wihap_sta_alloc(sc, reqsta.addr);
sc 1342 dev/ic/if_wi_hostap.c &sc->sc_ic.ic_myaddr);
sc 1343 dev/ic/if_wi_hostap.c nr.nr_channel = sc->wi_channel;
sc 1380 dev/ic/if_wi_hostap.c wihap_init(struct wi_softc *sc)
sc 1386 dev/ic/if_wi_hostap.c wihap_shutdown(struct wi_softc *sc)
sc 1392 dev/ic/if_wi_hostap.c wihap_mgmt_input(struct wi_softc *sc, struct wi_frame *rxfrm, struct mbuf *m)
sc 1398 dev/ic/if_wi_hostap.c wihap_data_input(struct wi_softc *sc, struct wi_frame *rxfrm, struct mbuf *m)
sc 1404 dev/ic/if_wi_hostap.c wihap_ioctl(struct wi_softc *sc, u_long command, caddr_t data)
sc 83 dev/ic/if_wi_hostap.h struct wi_softc *sc;
sc 85 dev/ic/if_wireg.h #define WI_BIG_ENDIAN_POSSIBLE (sc->wi_flags & WI_FLAGS_BUS_PCMCIA)
sc 90 dev/ic/if_wireg.h #define CSR_WRITE_4(sc, reg, val) \
sc 91 dev/ic/if_wireg.h bus_space_write_4(sc->wi_btag, sc->wi_bhandle, \
sc 92 dev/ic/if_wireg.h (sc->sc_pci ? reg * 2: reg), \
sc 94 dev/ic/if_wireg.h #define CSR_WRITE_2(sc, reg, val) \
sc 95 dev/ic/if_wireg.h bus_space_write_2(sc->wi_btag, sc->wi_bhandle, \
sc 96 dev/ic/if_wireg.h (sc->sc_pci ? reg * 2: reg), \
sc 98 dev/ic/if_wireg.h #define CSR_WRITE_1(sc, reg, val) \
sc 99 dev/ic/if_wireg.h bus_space_write_1(sc->wi_btag, sc->wi_bhandle, \
sc 100 dev/ic/if_wireg.h (sc->sc_pci ? reg * 2: reg), val)
sc 102 dev/ic/if_wireg.h #define CSR_READ_4(sc, reg) \
sc 104 dev/ic/if_wireg.h letoh32(bus_space_read_4(sc->wi_btag, sc->wi_bhandle, \
sc 105 dev/ic/if_wireg.h (sc->sc_pci ? reg * 2: reg))) : \
sc 106 dev/ic/if_wireg.h bus_space_read_4(sc->wi_btag, sc->wi_bhandle, \
sc 107 dev/ic/if_wireg.h (sc->sc_pci ? reg * 2: reg)))
sc 108 dev/ic/if_wireg.h #define CSR_READ_2(sc, reg) \
sc 110 dev/ic/if_wireg.h letoh16(bus_space_read_2(sc->wi_btag, sc->wi_bhandle, \
sc 111 dev/ic/if_wireg.h (sc->sc_pci ? reg * 2: reg))) : \
sc 112 dev/ic/if_wireg.h bus_space_read_2(sc->wi_btag, sc->wi_bhandle, \
sc 113 dev/ic/if_wireg.h (sc->sc_pci ? reg * 2: reg)))
sc 114 dev/ic/if_wireg.h #define CSR_READ_1(sc, reg) \
sc 115 dev/ic/if_wireg.h bus_space_read_1(sc->wi_btag, sc->wi_bhandle, \
sc 116 dev/ic/if_wireg.h (sc->sc_pci ? reg * 2: reg))
sc 118 dev/ic/if_wireg.h #define CSR_READ_RAW_2(sc, ba, dst, sz) \
sc 119 dev/ic/if_wireg.h bus_space_read_raw_multi_2((sc)->wi_btag, \
sc 120 dev/ic/if_wireg.h (sc)->wi_bhandle, \
sc 121 dev/ic/if_wireg.h (sc->sc_pci? ba * 2: ba), (dst), (sz))
sc 122 dev/ic/if_wireg.h #define CSR_WRITE_RAW_2(sc, ba, dst, sz) \
sc 123 dev/ic/if_wireg.h bus_space_write_raw_multi_2((sc)->wi_btag, \
sc 124 dev/ic/if_wireg.h (sc)->wi_bhandle, \
sc 125 dev/ic/if_wireg.h (sc->sc_pci? ba * 2: ba), (dst), (sz))
sc 364 dev/ic/if_wireg.h wi_write_record(sc, &g); \
sc 378 dev/ic/if_wireg.h wi_write_record(sc, (struct wi_ltv_gen *)&s); \
sc 120 dev/ic/if_wivar.h #define wi_cmd sc->sc_funcs->f_cmd
sc 121 dev/ic/if_wivar.h #define wi_read_record sc->sc_funcs->f_read_record
sc 122 dev/ic/if_wivar.h #define wi_write_record sc->sc_funcs->f_write_record
sc 123 dev/ic/if_wivar.h #define wi_alloc_nicmem sc->sc_funcs->f_alloc_nicmem
sc 124 dev/ic/if_wivar.h #define wi_read_data sc->sc_funcs->f_read_data
sc 125 dev/ic/if_wivar.h #define wi_write_data sc->sc_funcs->f_write_data
sc 126 dev/ic/if_wivar.h #define wi_get_fid sc->sc_funcs->f_get_fid
sc 127 dev/ic/if_wivar.h #define wi_init sc->sc_funcs->f_init
sc 145 dev/ic/if_wivar.h #define WI_PRT_ARG(sc) (sc)->sc_dev.dv_xname
sc 148 dev/ic/if_wivar.h int (*f_cmd)(struct wi_softc *sc, int cmd, int val0, int val1,
sc 150 dev/ic/if_wivar.h int (*f_read_record)(struct wi_softc *sc, struct wi_ltv_gen *ltv);
sc 151 dev/ic/if_wivar.h int (*f_write_record)(struct wi_softc *sc,
sc 153 dev/ic/if_wivar.h int (*f_alloc_nicmem)(struct wi_softc *sc, int len, int *id);
sc 154 dev/ic/if_wivar.h int (*f_read_data)(struct wi_softc *sc, int id, int off,
sc 156 dev/ic/if_wivar.h int (*f_write_data)(struct wi_softc *sc, int id, int off,
sc 158 dev/ic/if_wivar.h int (*f_get_fid)(struct wi_softc *sc, int fid);
sc 159 dev/ic/if_wivar.h void (*f_init)(struct wi_softc *sc);
sc 176 dev/ic/if_wivar.h void wi_update_stats(struct wi_softc *sc);
sc 177 dev/ic/if_wivar.h void wi_rxeof(struct wi_softc *sc);
sc 178 dev/ic/if_wivar.h void wi_txeof(struct wi_softc *sc, int status);
sc 183 dev/ic/iha.c struct iha_softc *sc;
sc 187 dev/ic/iha.c sc = (struct iha_softc *)arg;
sc 188 dev/ic/iha.c iot = sc->sc_iot;
sc 189 dev/ic/iha.c ioh = sc->sc_ioh;
sc 196 dev/ic/iha.c if (sc->HCS_Semaph != SEMAPH_IN_MAIN) {
sc 199 dev/ic/iha.c sc->HCS_Semaph = SEMAPH_IN_MAIN;
sc 201 dev/ic/iha.c iha_main(sc, iot, ioh);
sc 203 dev/ic/iha.c sc->HCS_Semaph = ~SEMAPH_IN_MAIN;
sc 217 dev/ic/iha.c iha_setup_sg_list(sc, pScb)
sc 218 dev/ic/iha.c struct iha_softc *sc;
sc 225 dev/ic/iha.c error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_SGDma,
sc 250 dev/ic/iha.c bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
sc 268 dev/ic/iha.c struct iha_softc *sc = sc_link->adapter_softc;
sc 276 dev/ic/iha.c pScb = iha_pop_free_scb(sc);
sc 285 dev/ic/iha.c pScb->SCB_Tcs = &sc->HCS_Tcs[pScb->SCB_Target];
sc 303 dev/ic/iha.c error = bus_dmamap_load_uio(sc->sc_dmat,
sc 309 dev/ic/iha.c error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_DataDma,
sc 323 dev/ic/iha.c iha_append_free_scb(sc, pScb);
sc 328 dev/ic/iha.c bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma,
sc 333 dev/ic/iha.c error = iha_setup_sg_list(sc, pScb);
sc 335 dev/ic/iha.c bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma);
sc 351 dev/ic/iha.c iha_exec_scb(sc, pScb);
sc 364 dev/ic/iha.c iha_init_tulip(sc)
sc 365 dev/ic/iha.c struct iha_softc *sc;
sc 374 dev/ic/iha.c iot = sc->sc_iot;
sc 375 dev/ic/iha.c ioh = sc->sc_ioh;
sc 384 dev/ic/iha.c sc->sc_link.adapter_softc = sc;
sc 385 dev/ic/iha.c sc->sc_link.adapter = &iha_switch;
sc 386 dev/ic/iha.c sc->sc_link.device = &iha_dev;
sc 387 dev/ic/iha.c sc->sc_link.openings = 4; /* # xs's allowed per device */
sc 388 dev/ic/iha.c sc->sc_link.adapter_target = pScsi->NVM_SCSI_Id;
sc 389 dev/ic/iha.c sc->sc_link.adapter_buswidth = pScsi->NVM_SCSI_Targets;
sc 394 dev/ic/iha.c sc->HCS_Semaph = ~SEMAPH_IN_MAIN;
sc 395 dev/ic/iha.c sc->HCS_JSStatus0 = 0;
sc 396 dev/ic/iha.c sc->HCS_ActScb = NULL;
sc 398 dev/ic/iha.c TAILQ_INIT(&sc->HCS_FreeScb);
sc 399 dev/ic/iha.c TAILQ_INIT(&sc->HCS_PendScb);
sc 400 dev/ic/iha.c TAILQ_INIT(&sc->HCS_DoneScb);
sc 402 dev/ic/iha.c error = iha_alloc_scbs(sc);
sc 406 dev/ic/iha.c for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++) {
sc 409 dev/ic/iha.c error = bus_dmamap_create(sc->sc_dmat,
sc 416 dev/ic/iha.c sc->sc_dev.dv_xname, error);
sc 420 dev/ic/iha.c error = bus_dmamap_create(sc->sc_dmat,
sc 427 dev/ic/iha.c sc->sc_dev.dv_xname, error);
sc 431 dev/ic/iha.c TAILQ_INSERT_TAIL(&sc->HCS_FreeScb, pScb, SCB_ScbList);
sc 442 dev/ic/iha.c bus_space_write_1(iot, ioh, TUL_SID, sc->sc_link.adapter_target << 4);
sc 450 dev/ic/iha.c sc->HCS_SConf1 = (SCONFIG0DEFAULT | SPCHK);
sc 452 dev/ic/iha.c sc->HCS_SConf1 = (SCONFIG0DEFAULT);
sc 453 dev/ic/iha.c bus_space_write_1(iot, ioh, TUL_SCONFIG0, sc->HCS_SConf1);
sc 467 dev/ic/iha.c sc->HCS_Tcs[i].TCS_Flags = pScsi->NVM_SCSI_TargetFlags[i];
sc 468 dev/ic/iha.c iha_reset_tcs(&sc->HCS_Tcs[i], sc->HCS_SConf1);
sc 471 dev/ic/iha.c iha_reset_chip(sc, iot, ioh);
sc 516 dev/ic/iha.c iha_pop_free_scb(sc)
sc 517 dev/ic/iha.c struct iha_softc *sc;
sc 524 dev/ic/iha.c pScb = TAILQ_FIRST(&sc->HCS_FreeScb);
sc 528 dev/ic/iha.c TAILQ_REMOVE(&sc->HCS_FreeScb, pScb, SCB_ScbList);
sc 542 dev/ic/iha.c iha_append_free_scb(sc, pScb)
sc 543 dev/ic/iha.c struct iha_softc *sc;
sc 550 dev/ic/iha.c if (pScb == sc->HCS_ActScb)
sc 551 dev/ic/iha.c sc->HCS_ActScb = NULL;
sc 577 dev/ic/iha.c TAILQ_INSERT_TAIL(&sc->HCS_FreeScb, pScb, SCB_ScbList);
sc 583 dev/ic/iha.c iha_append_pend_scb(sc, pScb)
sc 584 dev/ic/iha.c struct iha_softc *sc;
sc 589 dev/ic/iha.c if (pScb == sc->HCS_ActScb)
sc 590 dev/ic/iha.c sc->HCS_ActScb = NULL;
sc 594 dev/ic/iha.c TAILQ_INSERT_TAIL(&sc->HCS_PendScb, pScb, SCB_ScbList);
sc 598 dev/ic/iha.c iha_push_pend_scb(sc, pScb)
sc 599 dev/ic/iha.c struct iha_softc *sc;
sc 606 dev/ic/iha.c if (pScb == sc->HCS_ActScb)
sc 607 dev/ic/iha.c sc->HCS_ActScb = NULL;
sc 611 dev/ic/iha.c TAILQ_INSERT_HEAD(&sc->HCS_PendScb, pScb, SCB_ScbList);
sc 623 dev/ic/iha.c iha_find_pend_scb(sc)
sc 624 dev/ic/iha.c struct iha_softc *sc;
sc 632 dev/ic/iha.c if (sc->HCS_ActScb != NULL)
sc 636 dev/ic/iha.c TAILQ_FOREACH(pScb, &sc->HCS_PendScb, SCB_ScbList) {
sc 696 dev/ic/iha.c iha_append_done_scb(sc, pScb, hastat)
sc 697 dev/ic/iha.c struct iha_softc *sc;
sc 709 dev/ic/iha.c if (pScb == sc->HCS_ActScb)
sc 710 dev/ic/iha.c sc->HCS_ActScb = NULL;
sc 723 dev/ic/iha.c TAILQ_INSERT_TAIL(&sc->HCS_DoneScb, pScb, SCB_ScbList);
sc 729 dev/ic/iha.c iha_pop_done_scb(sc)
sc 730 dev/ic/iha.c struct iha_softc *sc;
sc 737 dev/ic/iha.c pScb = TAILQ_FIRST(&sc->HCS_DoneScb);
sc 741 dev/ic/iha.c TAILQ_REMOVE(&sc->HCS_DoneScb, pScb, SCB_ScbList);
sc 755 dev/ic/iha.c iha_abort_xs(sc, xs, hastat)
sc 756 dev/ic/iha.c struct iha_softc *sc;
sc 767 dev/ic/iha.c for (pScb = TAILQ_FIRST(&sc->HCS_PendScb); pScb != NULL; pScb = next) {
sc 770 dev/ic/iha.c TAILQ_REMOVE(&sc->HCS_PendScb, pScb, SCB_ScbList);
sc 771 dev/ic/iha.c iha_append_done_scb(sc, pScb, hastat);
sc 782 dev/ic/iha.c for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++)
sc 787 dev/ic/iha.c iha_append_done_scb(sc, pScb, hastat);
sc 804 dev/ic/iha.c iha_bad_seq(sc)
sc 805 dev/ic/iha.c struct iha_softc *sc;
sc 807 dev/ic/iha.c struct iha_scb *pScb = sc->HCS_ActScb;
sc 810 dev/ic/iha.c iha_append_done_scb(sc, pScb, HOST_BAD_PHAS);
sc 812 dev/ic/iha.c iha_reset_scsi_bus(sc);
sc 813 dev/ic/iha.c iha_reset_chip(sc, sc->sc_iot, sc->sc_ioh);
sc 822 dev/ic/iha.c iha_push_sense_request(sc, pScb)
sc 823 dev/ic/iha.c struct iha_softc *sc;
sc 831 dev/ic/iha.c bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma,
sc 835 dev/ic/iha.c bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma);
sc 840 dev/ic/iha.c bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
sc 843 dev/ic/iha.c bus_dmamap_unload(sc->sc_dmat, pScb->SCB_SGDma);
sc 852 dev/ic/iha.c error = bus_dmamap_load(sc->sc_dmat, pScb->SCB_DataDma,
sc 863 dev/ic/iha.c bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma,
sc 870 dev/ic/iha.c error = iha_setup_sg_list(sc, pScb);
sc 891 dev/ic/iha.c iha_push_pend_scb(sc, pScb);
sc 903 dev/ic/iha.c iha_main(sc, iot, ioh)
sc 904 dev/ic/iha.c struct iha_softc *sc;
sc 912 dev/ic/iha.c iha_scsi(sc, iot, ioh);
sc 914 dev/ic/iha.c while ((pScb = iha_pop_done_scb(sc)) != NULL) {
sc 926 dev/ic/iha.c else if (iha_push_sense_request(sc, pScb) != 0)
sc 945 dev/ic/iha.c iha_done_scb(sc, pScb);
sc 955 dev/ic/iha.c && (iha_find_pend_scb(sc) == NULL))
sc 965 dev/ic/iha.c iha_scsi(sc, iot, ioh)
sc 966 dev/ic/iha.c struct iha_softc *sc;
sc 979 dev/ic/iha.c sc->HCS_JSStatus0 = stat;
sc 980 dev/ic/iha.c sc->HCS_JSStatus1 = bus_space_read_1(iot, ioh, TUL_STAT1);
sc 981 dev/ic/iha.c sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT);
sc 983 dev/ic/iha.c sc->HCS_Phase = sc->HCS_JSStatus0 & PH_MASK;
sc 985 dev/ic/iha.c if ((sc->HCS_JSInt & SRSTD) != 0) {
sc 986 dev/ic/iha.c iha_reset_scsi_bus(sc);
sc 990 dev/ic/iha.c if ((sc->HCS_JSInt & RSELED) != 0) {
sc 991 dev/ic/iha.c iha_resel(sc, iot, ioh);
sc 995 dev/ic/iha.c if ((sc->HCS_JSInt & (STIMEO | DISCD)) != 0) {
sc 996 dev/ic/iha.c iha_busfree(sc, iot, ioh);
sc 1000 dev/ic/iha.c if ((sc->HCS_JSInt & (SCMDN | SBSRV)) != 0) {
sc 1001 dev/ic/iha.c iha_next_state(sc, iot, ioh);
sc 1005 dev/ic/iha.c if ((sc->HCS_JSInt & SELED) != 0)
sc 1013 dev/ic/iha.c if ((pScb = iha_find_pend_scb(sc)) == NULL)
sc 1020 dev/ic/iha.c (sc->sc_link.adapter_target << 4) | pScb->SCB_Target);
sc 1028 dev/ic/iha.c iha_select(sc, iot, ioh, pScb, SELATNSTOP);
sc 1031 dev/ic/iha.c iha_select(sc, iot, ioh, pScb, SEL_ATN3);
sc 1034 dev/ic/iha.c iha_select(sc, iot, ioh, pScb, SEL_ATN);
sc 1037 dev/ic/iha.c iha_select(sc, iot, ioh, pScb, SELATNSTOP);
sc 1043 dev/ic/iha.c if (iha_wait(sc, iot, ioh, NO_OP) == -1)
sc 1045 dev/ic/iha.c if (iha_next_state(sc, iot, ioh) == -1)
sc 1064 dev/ic/iha.c iha_print_info(sc, pScb->SCB_Target);
sc 1134 dev/ic/iha.c iha_next_state(sc, iot, ioh)
sc 1135 dev/ic/iha.c struct iha_softc *sc;
sc 1139 dev/ic/iha.c if (sc->HCS_ActScb == NULL)
sc 1142 dev/ic/iha.c switch (sc->HCS_ActScb->SCB_NxtStat) {
sc 1144 dev/ic/iha.c if (iha_state_1(sc, iot, ioh) == 3)
sc 1149 dev/ic/iha.c switch (iha_state_2(sc, iot, ioh)) {
sc 1158 dev/ic/iha.c if (iha_state_3(sc, iot, ioh) == 4)
sc 1164 dev/ic/iha.c switch (iha_state_4(sc, iot, ioh)) {
sc 1172 dev/ic/iha.c switch (iha_state_5(sc, iot, ioh)) {
sc 1181 dev/ic/iha.c iha_state_6(sc, iot, ioh);
sc 1185 dev/ic/iha.c iha_state_8(sc, iot, ioh);
sc 1190 dev/ic/iha.c sc_print_addr(sc->HCS_ActScb->SCB_Xs->sc_link);
sc 1192 dev/ic/iha.c sc->HCS_ActScb->SCB_NxtStat);
sc 1194 dev/ic/iha.c iha_bad_seq(sc);
sc 1208 dev/ic/iha.c iha_state_1(sc, iot, ioh)
sc 1209 dev/ic/iha.c struct iha_softc *sc;
sc 1213 dev/ic/iha.c struct iha_scb *pScb = sc->HCS_ActScb;
sc 1234 dev/ic/iha.c if (sc->HCS_Phase == PHASE_MSG_OUT) {
sc 1247 dev/ic/iha.c if (iha_msgout_wdtr(sc, iot, ioh) == -1)
sc 1250 dev/ic/iha.c if (iha_msgout_sdtr(sc, iot, ioh) == -1)
sc 1269 dev/ic/iha.c iha_state_2(sc, iot, ioh)
sc 1270 dev/ic/iha.c struct iha_softc *sc;
sc 1274 dev/ic/iha.c struct iha_scb *pScb = sc->HCS_ActScb;
sc 1280 dev/ic/iha.c if ((sc->HCS_JSStatus1 & CPDNE) != 0)
sc 1296 dev/ic/iha.c iha_state_3(sc, iot, ioh)
sc 1297 dev/ic/iha.c struct iha_softc *sc;
sc 1301 dev/ic/iha.c struct iha_scb *pScb = sc->HCS_ActScb;
sc 1305 dev/ic/iha.c switch (sc->HCS_Phase) {
sc 1309 dev/ic/iha.c if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1)
sc 1311 dev/ic/iha.c else if (sc->HCS_Phase == PHASE_CMD_OUT) {
sc 1312 dev/ic/iha.c iha_bad_seq(sc);
sc 1319 dev/ic/iha.c if (iha_msgin(sc, iot, ioh) == -1)
sc 1324 dev/ic/iha.c if (iha_status_msg(sc, iot, ioh) == -1)
sc 1331 dev/ic/iha.c if (iha_msgout(sc, iot, ioh, MSG_NOOP) == -1)
sc 1333 dev/ic/iha.c } else if (iha_msgout_sdtr(sc, iot, ioh) == -1)
sc 1340 dev/ic/iha.c printf("[debug] -s3- bad phase = %d\n", sc->HCS_Phase);
sc 1342 dev/ic/iha.c iha_bad_seq(sc);
sc 1355 dev/ic/iha.c iha_state_4(sc, iot, ioh)
sc 1356 dev/ic/iha.c struct iha_softc *sc;
sc 1360 dev/ic/iha.c struct iha_scb *pScb = sc->HCS_ActScb;
sc 1369 dev/ic/iha.c switch (sc->HCS_Phase) {
sc 1373 dev/ic/iha.c if ((iha_status_msg(sc, iot, ioh)) == -1)
sc 1379 dev/ic/iha.c if (iha_msgin(sc, iot, ioh) == -1)
sc 1384 dev/ic/iha.c if ((sc->HCS_JSStatus0 & SPERR) != 0) {
sc 1387 dev/ic/iha.c if (iha_msgout(sc, iot, ioh,
sc 1393 dev/ic/iha.c if (iha_msgout(sc, iot, ioh, MSG_NOOP) == -1)
sc 1405 dev/ic/iha.c iha_bad_seq(sc);
sc 1418 dev/ic/iha.c iha_state_5(sc, iot, ioh)
sc 1419 dev/ic/iha.c struct iha_softc *sc;
sc 1423 dev/ic/iha.c struct iha_scb *pScb = sc->HCS_ActScb;
sc 1438 dev/ic/iha.c if ((sc->HCS_JSStatus0 & SPERR) != 0)
sc 1450 dev/ic/iha.c if ((sc->HCS_JSStatus1 & SXCMP) == 0) {
sc 1467 dev/ic/iha.c if ((cnt == 1) && (sc->HCS_Phase == PHASE_DATA_OUT)) {
sc 1468 dev/ic/iha.c if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1)
sc 1472 dev/ic/iha.c } else if ((sc->HCS_JSStatus1 & SXCMP) == 0)
sc 1486 dev/ic/iha.c bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
sc 1499 dev/ic/iha.c bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
sc 1519 dev/ic/iha.c iha_state_6(sc, iot, ioh)
sc 1520 dev/ic/iha.c struct iha_softc *sc;
sc 1525 dev/ic/iha.c switch (sc->HCS_Phase) {
sc 1527 dev/ic/iha.c if (iha_status_msg(sc, iot, ioh) == -1)
sc 1532 dev/ic/iha.c sc->HCS_ActScb->SCB_NxtStat = 6;
sc 1533 dev/ic/iha.c if ((iha_msgin(sc, iot, ioh)) == -1)
sc 1538 dev/ic/iha.c if ((iha_msgout(sc, iot, ioh, MSG_NOOP)) == -1)
sc 1543 dev/ic/iha.c if (iha_xpad_in(sc, iot, ioh) == -1)
sc 1548 dev/ic/iha.c if (iha_xpad_out(sc, iot, ioh) == -1)
sc 1553 dev/ic/iha.c iha_bad_seq(sc);
sc 1562 dev/ic/iha.c iha_state_8(sc, iot, ioh)
sc 1563 dev/ic/iha.c struct iha_softc *sc;
sc 1571 dev/ic/iha.c if (sc->HCS_Phase == PHASE_MSG_OUT) {
sc 1574 dev/ic/iha.c pScb = sc->HCS_ActScb;
sc 1577 dev/ic/iha.c iha_append_done_scb(sc, pScb, HOST_OK);
sc 1579 dev/ic/iha.c iha_reset_tcs(pScb->SCB_Tcs, sc->HCS_SConf1);
sc 1582 dev/ic/iha.c for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++)
sc 1586 dev/ic/iha.c iha_append_done_scb(sc,
sc 1591 dev/ic/iha.c iha_push_pend_scb(sc, pScb);
sc 1598 dev/ic/iha.c sc->HCS_Flags |= FLAG_EXPECT_DISC;
sc 1600 dev/ic/iha.c if (iha_wait(sc, iot, ioh, XF_FIFO_OUT) == -1)
sc 1604 dev/ic/iha.c iha_bad_seq(sc);
sc 1653 dev/ic/iha.c iha_xpad_in(sc, iot, ioh)
sc 1654 dev/ic/iha.c struct iha_softc *sc;
sc 1658 dev/ic/iha.c struct iha_scb *pScb = sc->HCS_ActScb;
sc 1669 dev/ic/iha.c switch (iha_wait(sc, iot, ioh, XF_FIFO_IN)) {
sc 1685 dev/ic/iha.c iha_xpad_out(sc, iot, ioh)
sc 1686 dev/ic/iha.c struct iha_softc *sc;
sc 1690 dev/ic/iha.c struct iha_scb *pScb = sc->HCS_ActScb;
sc 1703 dev/ic/iha.c switch (iha_wait(sc, iot, ioh, XF_FIFO_OUT)) {
sc 1720 dev/ic/iha.c iha_status_msg(sc, iot, ioh)
sc 1721 dev/ic/iha.c struct iha_softc *sc;
sc 1729 dev/ic/iha.c if ((phase = iha_wait(sc, iot, ioh, CMD_COMP)) == -1)
sc 1732 dev/ic/iha.c pScb = sc->HCS_ActScb;
sc 1737 dev/ic/iha.c if ((sc->HCS_JSStatus0 & SPERR) == 0)
sc 1744 dev/ic/iha.c return (iha_wait(sc, iot, ioh, XF_FIFO_OUT));
sc 1749 dev/ic/iha.c if ((sc->HCS_JSStatus0 & SPERR) != 0)
sc 1750 dev/ic/iha.c switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) {
sc 1756 dev/ic/iha.c return (iha_wait(sc, iot, ioh, XF_FIFO_OUT));
sc 1758 dev/ic/iha.c iha_bad_seq(sc);
sc 1765 dev/ic/iha.c iha_bad_seq(sc);
sc 1768 dev/ic/iha.c sc->HCS_Flags |= FLAG_EXPECT_DONE_DISC;
sc 1770 dev/ic/iha.c return (iha_wait(sc, iot, ioh, MSG_ACCEPT));
sc 1777 dev/ic/iha.c return (iha_wait(sc, iot, ioh, MSG_ACCEPT));
sc 1781 dev/ic/iha.c iha_bad_seq(sc);
sc 1793 dev/ic/iha.c iha_busfree(sc, iot, ioh)
sc 1794 dev/ic/iha.c struct iha_softc *sc;
sc 1804 dev/ic/iha.c pScb = sc->HCS_ActScb;
sc 1809 dev/ic/iha.c iha_append_done_scb(sc, pScb, HOST_SEL_TOUT);
sc 1812 dev/ic/iha.c iha_append_done_scb(sc, pScb, HOST_BAD_PHAS);
sc 1818 dev/ic/iha.c iha_reset_scsi_bus(sc)
sc 1819 dev/ic/iha.c struct iha_softc *sc;
sc 1827 dev/ic/iha.c iha_reset_dma(sc->sc_iot, sc->sc_ioh);
sc 1829 dev/ic/iha.c for (i = 0, pScb = sc->HCS_Scb; i < IHA_MAX_SCB; i++, pScb++)
sc 1832 dev/ic/iha.c iha_append_done_scb(sc, pScb, HOST_SCSI_RST);
sc 1836 dev/ic/iha.c iha_push_pend_scb(sc, pScb);
sc 1843 dev/ic/iha.c for (i = 0, pTcs = sc->HCS_Tcs; i < IHA_MAX_TARGETS; i++, pTcs++)
sc 1844 dev/ic/iha.c iha_reset_tcs(pTcs, sc->HCS_SConf1);
sc 1853 dev/ic/iha.c iha_resel(sc, iot, ioh)
sc 1854 dev/ic/iha.c struct iha_softc *sc;
sc 1862 dev/ic/iha.c if (sc->HCS_ActScb != NULL) {
sc 1863 dev/ic/iha.c if ((sc->HCS_ActScb->SCB_Status == STATUS_SELECT))
sc 1864 dev/ic/iha.c iha_push_pend_scb(sc, sc->HCS_ActScb);
sc 1865 dev/ic/iha.c sc->HCS_ActScb = NULL;
sc 1871 dev/ic/iha.c pTcs = &sc->HCS_Tcs[target];
sc 1890 dev/ic/iha.c switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) {
sc 1895 dev/ic/iha.c if ((iha_wait(sc, iot, ioh, XF_FIFO_IN)) == -1)
sc 1907 dev/ic/iha.c switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) {
sc 1912 dev/ic/iha.c if ((iha_wait(sc, iot, ioh, XF_FIFO_IN)) == -1)
sc 1920 dev/ic/iha.c pScb = &sc->HCS_Scb[tag];
sc 1929 dev/ic/iha.c iha_msgout_abort(sc, iot, ioh, abortmsg);
sc 1933 dev/ic/iha.c sc->HCS_ActScb = pScb;
sc 1935 dev/ic/iha.c if (iha_wait(sc, iot, ioh, MSG_ACCEPT) == -1)
sc 1938 dev/ic/iha.c return(iha_next_state(sc, iot, ioh));
sc 1942 dev/ic/iha.c iha_msgin(sc, iot, ioh)
sc 1943 dev/ic/iha.c struct iha_softc *sc;
sc 1957 dev/ic/iha.c phase = iha_wait(sc, iot, ioh, XF_FIFO_IN);
sc 1962 dev/ic/iha.c sc->HCS_Flags |= FLAG_EXPECT_DISC;
sc 1963 dev/ic/iha.c if (iha_wait(sc, iot, ioh, MSG_ACCEPT) != -1)
sc 1964 dev/ic/iha.c iha_bad_seq(sc);
sc 1970 dev/ic/iha.c phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
sc 1975 dev/ic/iha.c flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags;
sc 1978 dev/ic/iha.c phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
sc 1981 dev/ic/iha.c phase = iha_msgin_extended(sc, iot, ioh);
sc 1984 dev/ic/iha.c phase = iha_msgin_ignore_wid_resid(sc, iot, ioh);
sc 1987 dev/ic/iha.c sc->HCS_Flags |= FLAG_EXPECT_DONE_DISC;
sc 1989 dev/ic/iha.c phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
sc 1991 dev/ic/iha.c iha_bad_seq(sc);
sc 1999 dev/ic/iha.c phase = iha_msgout_reject(sc, iot, ioh);
sc 2010 dev/ic/iha.c iha_msgin_ignore_wid_resid(sc, iot, ioh)
sc 2011 dev/ic/iha.c struct iha_softc *sc;
sc 2017 dev/ic/iha.c phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
sc 2020 dev/ic/iha.c phase = iha_wait(sc, iot, ioh, XF_FIFO_IN);
sc 2027 dev/ic/iha.c phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
sc 2035 dev/ic/iha.c iha_msgin_extended(sc, iot, ioh)
sc 2036 dev/ic/iha.c struct iha_softc *sc;
sc 2047 dev/ic/iha.c phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
sc 2054 dev/ic/iha.c if (iha_wait(sc, iot, ioh, XF_FIFO_IN) == -1)
sc 2057 dev/ic/iha.c sc->HCS_Msg[i] = bus_space_read_1(iot, ioh, TUL_SFIFO);
sc 2059 dev/ic/iha.c if (sc->HCS_Msg[0] == i)
sc 2063 dev/ic/iha.c msglen = sc->HCS_Msg[0];
sc 2064 dev/ic/iha.c msgcode = sc->HCS_Msg[1];
sc 2067 dev/ic/iha.c if (iha_msgin_sdtr(sc) == 0) {
sc 2068 dev/ic/iha.c iha_sync_done(sc, iot, ioh);
sc 2069 dev/ic/iha.c return (iha_wait(sc, iot, ioh, MSG_ACCEPT));
sc 2074 dev/ic/iha.c phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
sc 2081 dev/ic/iha.c iha_sync_done(sc, iot, ioh); /* This is our final offer */
sc 2085 dev/ic/iha.c flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags;
sc 2089 dev/ic/iha.c sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_8_BIT;
sc 2091 dev/ic/iha.c else if (sc->HCS_Msg[2] > MSG_EXT_WDTR_BUS_32_BIT)
sc 2092 dev/ic/iha.c return (iha_msgout_reject(sc, iot, ioh));
sc 2094 dev/ic/iha.c else if (sc->HCS_Msg[2] == MSG_EXT_WDTR_BUS_32_BIT)
sc 2096 dev/ic/iha.c sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_32_BIT;
sc 2099 dev/ic/iha.c iha_wide_done(sc, iot, ioh);
sc 2102 dev/ic/iha.c return (iha_wait(sc, iot, ioh, MSG_ACCEPT));
sc 2107 dev/ic/iha.c phase = iha_wait(sc, iot, ioh, MSG_ACCEPT);
sc 2112 dev/ic/iha.c return (iha_msgout_reject(sc, iot, ioh));
sc 2115 dev/ic/iha.c return (iha_msgout_extended(sc, iot, ioh));
sc 2125 dev/ic/iha.c iha_msgin_sdtr(sc)
sc 2126 dev/ic/iha.c struct iha_softc *sc;
sc 2132 dev/ic/iha.c flags = sc->HCS_ActScb->SCB_Tcs->TCS_Flags;
sc 2136 dev/ic/iha.c if (sc->HCS_Msg[3] == 0) /* target offered async only. Accept it. */
sc 2142 dev/ic/iha.c sc->HCS_Msg[3] = 0;
sc 2146 dev/ic/iha.c if (sc->HCS_Msg[3] > IHA_MAX_TARGETS-1) {
sc 2147 dev/ic/iha.c sc->HCS_Msg[3] = IHA_MAX_TARGETS-1;
sc 2151 dev/ic/iha.c if (sc->HCS_Msg[2] < default_period) {
sc 2152 dev/ic/iha.c sc->HCS_Msg[2] = default_period;
sc 2156 dev/ic/iha.c if (sc->HCS_Msg[2] >= 59) {
sc 2157 dev/ic/iha.c sc->HCS_Msg[3] = 0;
sc 2165 dev/ic/iha.c iha_msgout(sc, iot, ioh, msg)
sc 2166 dev/ic/iha.c struct iha_softc *sc;
sc 2173 dev/ic/iha.c return (iha_wait(sc, iot, ioh, XF_FIFO_OUT));
sc 2177 dev/ic/iha.c iha_msgout_abort(sc, iot, ioh, aborttype)
sc 2178 dev/ic/iha.c struct iha_softc *sc;
sc 2185 dev/ic/iha.c switch (iha_wait(sc, iot, ioh, MSG_ACCEPT)) {
sc 2190 dev/ic/iha.c sc->HCS_Flags |= FLAG_EXPECT_DISC;
sc 2191 dev/ic/iha.c if (iha_msgout(sc, iot, ioh, aborttype) != -1)
sc 2192 dev/ic/iha.c iha_bad_seq(sc);
sc 2196 dev/ic/iha.c iha_bad_seq(sc);
sc 2202 dev/ic/iha.c iha_msgout_reject(sc, iot, ioh)
sc 2203 dev/ic/iha.c struct iha_softc *sc;
sc 2209 dev/ic/iha.c if (iha_wait(sc, iot, ioh, MSG_ACCEPT) == PHASE_MSG_OUT)
sc 2210 dev/ic/iha.c return (iha_msgout(sc, iot, ioh, MSG_MESSAGE_REJECT));
sc 2216 dev/ic/iha.c iha_msgout_extended(sc, iot, ioh)
sc 2217 dev/ic/iha.c struct iha_softc *sc;
sc 2226 dev/ic/iha.c sc->HCS_Msg, sc->HCS_Msg[0]+1);
sc 2228 dev/ic/iha.c phase = iha_wait(sc, iot, ioh, XF_FIFO_OUT);
sc 2237 dev/ic/iha.c iha_msgout_wdtr(sc, iot, ioh)
sc 2238 dev/ic/iha.c struct iha_softc *sc;
sc 2242 dev/ic/iha.c sc->HCS_ActScb->SCB_Tcs->TCS_Flags |= FLAG_WIDE_DONE;
sc 2244 dev/ic/iha.c sc->HCS_Msg[0] = MSG_EXT_WDTR_LEN;
sc 2245 dev/ic/iha.c sc->HCS_Msg[1] = MSG_EXT_WDTR;
sc 2246 dev/ic/iha.c sc->HCS_Msg[2] = MSG_EXT_WDTR_BUS_16_BIT;
sc 2248 dev/ic/iha.c return (iha_msgout_extended(sc, iot, ioh));
sc 2252 dev/ic/iha.c iha_msgout_sdtr(sc, iot, ioh)
sc 2253 dev/ic/iha.c struct iha_softc *sc;
sc 2260 dev/ic/iha.c rateindex = sc->HCS_ActScb->SCB_Tcs->TCS_Flags & FLAG_SCSI_RATE;
sc 2264 dev/ic/iha.c sc->HCS_Msg[0] = MSG_EXT_SDTR_LEN;
sc 2265 dev/ic/iha.c sc->HCS_Msg[1] = MSG_EXT_SDTR;
sc 2266 dev/ic/iha.c sc->HCS_Msg[2] = sync_rate;
sc 2267 dev/ic/iha.c sc->HCS_Msg[3] = IHA_MAX_TARGETS-1; /* REQ/ACK */
sc 2269 dev/ic/iha.c return (iha_msgout_extended(sc, iot, ioh));
sc 2273 dev/ic/iha.c iha_wide_done(sc, iot, ioh)
sc 2274 dev/ic/iha.c struct iha_softc *sc;
sc 2278 dev/ic/iha.c struct tcs *pTcs = sc->HCS_ActScb->SCB_Tcs;
sc 2282 dev/ic/iha.c if (sc->HCS_Msg[2] != 0)
sc 2294 dev/ic/iha.c iha_sync_done(sc, iot, ioh)
sc 2295 dev/ic/iha.c struct iha_softc *sc;
sc 2299 dev/ic/iha.c struct tcs *pTcs = sc->HCS_ActScb->SCB_Tcs;
sc 2303 dev/ic/iha.c if (sc->HCS_Msg[3] != 0) {
sc 2304 dev/ic/iha.c pTcs->TCS_JS_Period |= sc->HCS_Msg[3];
sc 2308 dev/ic/iha.c if (iha_rate_tbl[i] >= sc->HCS_Msg[2])
sc 2323 dev/ic/iha.c iha_reset_chip(sc, iot, ioh)
sc 2324 dev/ic/iha.c struct iha_softc *sc;
sc 2335 dev/ic/iha.c sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT);
sc 2336 dev/ic/iha.c while((sc->HCS_JSInt & SRSTD) == 0);
sc 2350 dev/ic/iha.c iha_select(sc, iot, ioh, pScb, select_type)
sc 2351 dev/ic/iha.c struct iha_softc *sc;
sc 2393 dev/ic/iha.c TAILQ_REMOVE(&sc->HCS_PendScb, pScb, SCB_ScbList);
sc 2398 dev/ic/iha.c sc->HCS_ActScb = pScb;
sc 2409 dev/ic/iha.c iha_wait(sc, iot, ioh, cmd)
sc 2410 dev/ic/iha.c struct iha_softc *sc;
sc 2423 dev/ic/iha.c sc->HCS_JSStatus0 = bus_space_read_1(iot, ioh, TUL_STAT0);
sc 2424 dev/ic/iha.c while ((sc->HCS_JSStatus0 & INTPD) == 0);
sc 2426 dev/ic/iha.c sc->HCS_JSStatus1 = bus_space_read_1(iot, ioh, TUL_STAT1);
sc 2427 dev/ic/iha.c sc->HCS_JSInt = bus_space_read_1(iot, ioh, TUL_SISTAT);
sc 2429 dev/ic/iha.c sc->HCS_Phase = sc->HCS_JSStatus0 & PH_MASK;
sc 2431 dev/ic/iha.c if ((sc->HCS_JSInt & SRSTD) != 0) {
sc 2433 dev/ic/iha.c iha_reset_scsi_bus(sc);
sc 2437 dev/ic/iha.c if ((sc->HCS_JSInt & RSELED) != 0)
sc 2439 dev/ic/iha.c return (iha_resel(sc, iot, ioh));
sc 2441 dev/ic/iha.c if ((sc->HCS_JSInt & STIMEO) != 0) {
sc 2443 dev/ic/iha.c iha_busfree(sc, iot, ioh);
sc 2447 dev/ic/iha.c if ((sc->HCS_JSInt & DISCD) != 0) {
sc 2449 dev/ic/iha.c if ((sc->HCS_Flags & FLAG_EXPECT_DONE_DISC) != 0) {
sc 2454 dev/ic/iha.c iha_append_done_scb(sc, sc->HCS_ActScb, HOST_OK);
sc 2455 dev/ic/iha.c sc->HCS_Flags &= ~FLAG_EXPECT_DONE_DISC;
sc 2457 dev/ic/iha.c } else if ((sc->HCS_Flags & FLAG_EXPECT_DISC) != 0) {
sc 2462 dev/ic/iha.c sc->HCS_ActScb = NULL;
sc 2463 dev/ic/iha.c sc->HCS_Flags &= ~FLAG_EXPECT_DISC;
sc 2466 dev/ic/iha.c iha_busfree(sc, iot, ioh);
sc 2471 dev/ic/iha.c return (sc->HCS_Phase);
sc 2479 dev/ic/iha.c iha_done_scb(sc, pScb)
sc 2480 dev/ic/iha.c struct iha_softc *sc;
sc 2492 dev/ic/iha.c bus_dmamap_sync(sc->sc_dmat, pScb->SCB_DataDma,
sc 2496 dev/ic/iha.c bus_dmamap_unload(sc->sc_dmat, pScb->SCB_DataDma);
sc 2499 dev/ic/iha.c bus_dmamap_sync(sc->sc_dmat, pScb->SCB_SGDma,
sc 2502 dev/ic/iha.c bus_dmamap_unload(sc->sc_dmat, pScb->SCB_SGDma);
sc 2568 dev/ic/iha.c iha_append_free_scb(sc, pScb);
sc 2586 dev/ic/iha.c iha_exec_scb(sc, pScb)
sc 2587 dev/ic/iha.c struct iha_softc *sc;
sc 2598 dev/ic/iha.c iha_push_pend_scb(sc, pScb); /* Insert SCB at head of Pend */
sc 2600 dev/ic/iha.c iha_append_pend_scb(sc, pScb); /* Append SCB to tail of Pend */
sc 2606 dev/ic/iha.c if (sc->HCS_Semaph != SEMAPH_IN_MAIN) {
sc 2607 dev/ic/iha.c iot = sc->sc_iot;
sc 2608 dev/ic/iha.c ioh = sc->sc_ioh;
sc 2611 dev/ic/iha.c sc->HCS_Semaph = SEMAPH_IN_MAIN;
sc 2614 dev/ic/iha.c iha_main(sc, iot, ioh);
sc 2617 dev/ic/iha.c sc->HCS_Semaph = ~SEMAPH_IN_MAIN;
sc 2642 dev/ic/iha.c iha_print_info(sc, target)
sc 2643 dev/ic/iha.c struct iha_softc *sc;
sc 2646 dev/ic/iha.c u_int8_t period = sc->HCS_Tcs[target].TCS_JS_Period;
sc 2647 dev/ic/iha.c u_int8_t config = sc->HCS_Tcs[target].TCS_SConfig0;
sc 2650 dev/ic/iha.c printf("%s: target %d using %d bit ", sc->sc_dev.dv_xname, target,
sc 2674 dev/ic/iha.c iha_alloc_scbs(sc)
sc 2675 dev/ic/iha.c struct iha_softc *sc;
sc 2683 dev/ic/iha.c if ((error = bus_dmamem_alloc(sc->sc_dmat,
sc 2688 dev/ic/iha.c " error = %d\n", sc->sc_dev.dv_xname, error);
sc 2691 dev/ic/iha.c if ((error = bus_dmamem_map(sc->sc_dmat,
sc 2693 dev/ic/iha.c (caddr_t *)&sc->HCS_Scb, BUS_DMA_NOWAIT | BUS_DMA_COHERENT))
sc 2696 dev/ic/iha.c sc->sc_dev.dv_xname, error);
sc 2699 dev/ic/iha.c bzero(sc->HCS_Scb, sizeof(struct iha_scb)*IHA_MAX_SCB);
sc 2441 dev/ic/isp.c u_int8_t sc[SNS_GA_NXT_RESP_SIZE];
sc 2443 dev/ic/isp.c rq = (sns_screq_t *)sc;
sc 2473 dev/ic/isp.c rs1 = (sns_ga_nxt_rsp_t *) sc;
sc 127 dev/ic/lancereg.h #define LE_INITADDR(sc) (sc->sc_initaddr)
sc 128 dev/ic/lancereg.h #define LE_RMDADDR(sc, bix) (sc->sc_rmdaddr + sizeof(struct lermd) * (bix))
sc 129 dev/ic/lancereg.h #define LE_TMDADDR(sc, bix) (sc->sc_tmdaddr + sizeof(struct letmd) * (bix))
sc 130 dev/ic/lancereg.h #define LE_RBUFADDR(sc, bix) (sc->sc_rbufaddr[bix])
sc 131 dev/ic/lancereg.h #define LE_TBUFADDR(sc, bix) (sc->sc_tbufaddr[bix])
sc 114 dev/ic/lemac.c lemac_rxd_intr(struct lemac_softc *sc, unsigned cs_value)
sc 127 dev/ic/lemac.c sc->sc_cntrs.cntr_rxd_intrs++;
sc 134 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_CS, cs_value);
sc 136 dev/ic/lemac.c if (LEMAC_INB(sc, LEMAC_REG_FMC) > 0)
sc 140 dev/ic/lemac.c lemac_txd_intr(sc, cs_value);
sc 142 dev/ic/lemac.c if ((LEMAC_INB(sc, LEMAC_REG_CS) & LEMAC_CS_RXD) == 0)
sc 146 dev/ic/lemac.c sc->sc_if.if_xname);
sc 148 dev/ic/lemac.c lemac_reset(sc);
sc 149 dev/ic/lemac.c if (sc->sc_if.if_flags & IFF_UP) {
sc 150 dev/ic/lemac.c lemac_init(sc);
sc 157 dev/ic/lemac.c printf("%s: recovery failed -- board disabled\n", sc->sc_if.if_xname);
sc 161 dev/ic/lemac.c lemac_tne_intr(struct lemac_softc *sc)
sc 163 dev/ic/lemac.c unsigned txcount = LEMAC_INB(sc, LEMAC_REG_TDC);
sc 165 dev/ic/lemac.c sc->sc_cntrs.cntr_tne_intrs++;
sc 167 dev/ic/lemac.c unsigned txsts = LEMAC_INB(sc, LEMAC_REG_TDQ);
sc 168 dev/ic/lemac.c sc->sc_if.if_opackets++; /* another one done */
sc 172 dev/ic/lemac.c sc->sc_flags &= ~LEMAC_LINKUP;
sc 173 dev/ic/lemac.c sc->sc_if.if_oerrors++;
sc 175 dev/ic/lemac.c sc->sc_flags |= LEMAC_LINKUP;
sc 177 dev/ic/lemac.c sc->sc_if.if_collisions++;
sc 180 dev/ic/lemac.c sc->sc_if.if_flags &= ~IFF_OACTIVE;
sc 181 dev/ic/lemac.c lemac_ifstart(&sc->sc_if);
sc 185 dev/ic/lemac.c lemac_txd_intr(struct lemac_softc *sc, unsigned cs_value)
sc 194 dev/ic/lemac.c sc->sc_cntrs.cntr_txd_intrs++;
sc 195 dev/ic/lemac.c if (sc->sc_txctl & LEMAC_TX_STP) {
sc 196 dev/ic/lemac.c sc->sc_if.if_oerrors++;
sc 198 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_FMQ, LEMAC_INB(sc, LEMAC_REG_TDQ));
sc 202 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_CS, cs_value & ~LEMAC_CS_TXD);
sc 203 dev/ic/lemac.c sc->sc_if.if_flags &= ~IFF_OACTIVE;
sc 207 dev/ic/lemac.c lemac_read_eeprom(struct lemac_softc *sc)
sc 214 dev/ic/lemac.c ep = sc->sc_eeprom;
sc 216 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_PI1, word_off);
sc 217 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_IOP, LEMAC_IOP_EEREAD);
sc 221 dev/ic/lemac.c *ep = LEMAC_INB(sc, LEMAC_REG_EE1);
sc 223 dev/ic/lemac.c *ep = LEMAC_INB(sc, LEMAC_REG_EE2);
sc 231 dev/ic/lemac.c sc->sc_txctl |= LEMAC_TX_FLAGS;
sc 233 dev/ic/lemac.c if ((sc->sc_eeprom[LEMAC_EEP_SWFLAGS] & LEMAC_EEP_SW_SQE) == 0)
sc 234 dev/ic/lemac.c sc->sc_txctl &= ~LEMAC_TX_SQE;
sc 236 dev/ic/lemac.c if (sc->sc_eeprom[LEMAC_EEP_SWFLAGS] & LEMAC_EEP_SW_LAB)
sc 237 dev/ic/lemac.c sc->sc_txctl |= LEMAC_TX_LAB;
sc 239 dev/ic/lemac.c bcopy(&sc->sc_eeprom[LEMAC_EEP_PRDNM], sc->sc_prodname,
sc 241 dev/ic/lemac.c sc->sc_prodname[LEMAC_EEP_PRDNMSZ] = '\0';
sc 247 dev/ic/lemac.c lemac_init_adapmem(struct lemac_softc *sc)
sc 251 dev/ic/lemac.c conf = LEMAC_INB(sc, LEMAC_REG_CNF);
sc 253 dev/ic/lemac.c if ((sc->sc_eeprom[LEMAC_EEP_SETUP] & LEMAC_EEP_ST_DRAM) == 0) {
sc 254 dev/ic/lemac.c sc->sc_lastpage = 63;
sc 257 dev/ic/lemac.c sc->sc_lastpage = 127;
sc 261 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_CNF, conf);
sc 263 dev/ic/lemac.c for (pg = 1; pg <= sc->sc_lastpage; pg++)
sc 264 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_FMQ, pg);
sc 268 dev/ic/lemac.c lemac_input(struct lemac_softc *sc, bus_size_t offset, size_t length)
sc 275 dev/ic/lemac.c sc->sc_if.if_ierrors++;
sc 278 dev/ic/lemac.c if (LEMAC_USE_PIO_MODE(sc)) {
sc 279 dev/ic/lemac.c LEMAC_INSB(sc, LEMAC_REG_DAT, sizeof(eh), (void *)&eh);
sc 281 dev/ic/lemac.c LEMAC_GETBUF16(sc, offset, sizeof(eh) / 2, (void *)&eh);
sc 286 dev/ic/lemac.c sc->sc_if.if_ierrors++;
sc 293 dev/ic/lemac.c sc->sc_if.if_ierrors++;
sc 299 dev/ic/lemac.c if (LEMAC_USE_PIO_MODE(sc)) {
sc 300 dev/ic/lemac.c LEMAC_INSB(sc, LEMAC_REG_DAT, length - sizeof(eh),
sc 303 dev/ic/lemac.c LEMAC_GETBUF16(sc, offset + sizeof(eh),
sc 307 dev/ic/lemac.c m->m_data[length - 1] = LEMAC_GET8(sc,
sc 311 dev/ic/lemac.c if (sc->sc_if.if_bpf != NULL) {
sc 313 dev/ic/lemac.c bpf_mtap(sc->sc_if.if_bpf, m, BPF_DIRECTION_IN);
sc 321 dev/ic/lemac.c !LEMAC_ADDREQUAL(eh.ether_dhost, sc->sc_arpcom.ac_enaddr)) {
sc 327 dev/ic/lemac.c m->m_pkthdr.rcvif = &sc->sc_if;
sc 328 dev/ic/lemac.c ether_input_mbuf(&sc->sc_if, m);
sc 332 dev/ic/lemac.c lemac_rne_intr(struct lemac_softc *sc)
sc 336 dev/ic/lemac.c sc->sc_cntrs.cntr_rne_intrs++;
sc 337 dev/ic/lemac.c rxcount = LEMAC_INB(sc, LEMAC_REG_RQC);
sc 339 dev/ic/lemac.c unsigned rxpg = LEMAC_INB(sc, LEMAC_REG_RQ);
sc 342 dev/ic/lemac.c sc->sc_if.if_ipackets++;
sc 343 dev/ic/lemac.c if (LEMAC_USE_PIO_MODE(sc)) {
sc 344 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_IOP, rxpg);
sc 345 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_PI1, 0);
sc 346 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_PI2, 0);
sc 347 dev/ic/lemac.c LEMAC_INSB(sc, LEMAC_REG_DAT, sizeof(rxlen),
sc 350 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_MPN, rxpg);
sc 351 dev/ic/lemac.c rxlen = LEMAC_GET32(sc, 0);
sc 354 dev/ic/lemac.c sc->sc_flags |= LEMAC_LINKUP;
sc 359 dev/ic/lemac.c lemac_input(sc, sizeof(rxlen), rxlen);
sc 361 dev/ic/lemac.c sc->sc_if.if_ierrors++;
sc 364 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_FMQ, rxpg);
sc 491 dev/ic/lemac.c lemac_multicast_filter(struct lemac_softc *sc)
sc 498 dev/ic/lemac.c bzero(sc->sc_mctbl, LEMAC_MCTBL_BITS / 8);
sc 500 dev/ic/lemac.c lemac_multicast_op(sc->sc_mctbl, etherbroadcastaddr, 1);
sc 503 dev/ic/lemac.c ETHER_FIRST_MULTI(step, &sc->sc_ec, enm);
sc 506 dev/ic/lemac.c sc->sc_flags |= LEMAC_ALLMULTI;
sc 507 dev/ic/lemac.c sc->sc_if.if_flags |= IFF_ALLMULTI;
sc 510 dev/ic/lemac.c lemac_multicast_op(sc->sc_mctbl, enm->enm_addrlo, TRUE);
sc 514 dev/ic/lemac.c sc->sc_flags &= ~LEMAC_ALLMULTI;
sc 515 dev/ic/lemac.c sc->sc_if.if_flags &= ~IFF_ALLMULTI;
sc 522 dev/ic/lemac.c lemac_reset(struct lemac_softc *const sc)
sc 529 dev/ic/lemac.c sc->sc_flags &= ~LEMAC_LINKUP;
sc 530 dev/ic/lemac.c sc->sc_if.if_flags &= ~IFF_OACTIVE;
sc 531 dev/ic/lemac.c LEMAC_INTR_DISABLE(sc);
sc 533 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_IOP, LEMAC_IOP_EEINIT);
sc 541 dev/ic/lemac.c if ((data = lemac_read_eeprom(sc)) != LEMAC_EEP_CKSUM) {
sc 543 dev/ic/lemac.c sc->sc_if.if_xname, data);
sc 550 dev/ic/lemac.c data = LEMAC_INB(sc, LEMAC_REG_CTL);
sc 551 dev/ic/lemac.c if ((data & (LEMAC_CTL_APD|LEMAC_CTL_PSL)) != sc->sc_ctlmode) {
sc 553 dev/ic/lemac.c data |= sc->sc_ctlmode;
sc 554 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_CTL, data);
sc 561 dev/ic/lemac.c data = LEMAC_INB(sc, LEMAC_REG_MBR);
sc 563 dev/ic/lemac.c sc->sc_flags |= LEMAC_2K_MODE;
sc 566 dev/ic/lemac.c sc->sc_flags |= LEMAC_WAS_64K_MODE;
sc 567 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_MBR, data);
sc 570 dev/ic/lemac.c sc->sc_flags |= LEMAC_WAS_32K_MODE;
sc 571 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_MBR, data);
sc 573 dev/ic/lemac.c sc->sc_flags |= LEMAC_PIO_MODE;
sc 581 dev/ic/lemac.c lemac_init_adapmem(sc);
sc 582 dev/ic/lemac.c sc->sc_flags |= LEMAC_ALIVE;
sc 586 dev/ic/lemac.c lemac_init(struct lemac_softc *const sc)
sc 588 dev/ic/lemac.c if ((sc->sc_flags & LEMAC_ALIVE) == 0)
sc 594 dev/ic/lemac.c if (sc->sc_if.if_flags & IFF_UP) {
sc 595 dev/ic/lemac.c int saved_cs = LEMAC_INB(sc, LEMAC_REG_CS);
sc 596 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_CS,
sc 598 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_PA0, sc->sc_arpcom.ac_enaddr[0]);
sc 599 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_PA1, sc->sc_arpcom.ac_enaddr[1]);
sc 600 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_PA2, sc->sc_arpcom.ac_enaddr[2]);
sc 601 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_PA3, sc->sc_arpcom.ac_enaddr[3]);
sc 602 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_PA4, sc->sc_arpcom.ac_enaddr[4]);
sc 603 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_PA5, sc->sc_arpcom.ac_enaddr[5]);
sc 605 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_IC,
sc 606 dev/ic/lemac.c LEMAC_INB(sc, LEMAC_REG_IC) | LEMAC_IC_IE);
sc 608 dev/ic/lemac.c if (sc->sc_if.if_flags & IFF_PROMISC) {
sc 609 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_CS,
sc 612 dev/ic/lemac.c LEMAC_INTR_DISABLE(sc);
sc 613 dev/ic/lemac.c lemac_multicast_filter(sc);
sc 614 dev/ic/lemac.c if (sc->sc_flags & LEMAC_ALLMULTI)
sc 615 dev/ic/lemac.c bcopy(lemac_allmulti_mctbl, sc->sc_mctbl,
sc 616 dev/ic/lemac.c sizeof(sc->sc_mctbl));
sc 617 dev/ic/lemac.c if (LEMAC_USE_PIO_MODE(sc)) {
sc 618 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_IOP, 0);
sc 619 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_PI1,
sc 621 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_PI2,
sc 623 dev/ic/lemac.c LEMAC_OUTSB(sc, LEMAC_REG_DAT,
sc 624 dev/ic/lemac.c sizeof(sc->sc_mctbl),
sc 625 dev/ic/lemac.c (void *)sc->sc_mctbl);
sc 627 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_MPN, 0);
sc 628 dev/ic/lemac.c LEMAC_PUTBUF8(sc, LEMAC_MCTBL_OFF,
sc 629 dev/ic/lemac.c sizeof(sc->sc_mctbl),
sc 630 dev/ic/lemac.c (void *)sc->sc_mctbl);
sc 633 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_CS, LEMAC_CS_MCE);
sc 636 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_CTL,
sc 637 dev/ic/lemac.c LEMAC_INB(sc, LEMAC_REG_CTL) ^ LEMAC_CTL_LED);
sc 639 dev/ic/lemac.c LEMAC_INTR_ENABLE(sc);
sc 640 dev/ic/lemac.c sc->sc_if.if_flags |= IFF_RUNNING;
sc 641 dev/ic/lemac.c lemac_ifstart(&sc->sc_if);
sc 643 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_CS, LEMAC_CS_RXD|LEMAC_CS_TXD);
sc 645 dev/ic/lemac.c LEMAC_INTR_DISABLE(sc);
sc 646 dev/ic/lemac.c sc->sc_if.if_flags &= ~IFF_RUNNING;
sc 653 dev/ic/lemac.c struct lemac_softc *const sc = LEMAC_IFP_TO_SOFTC(ifp);
sc 658 dev/ic/lemac.c LEMAC_INTR_DISABLE(sc);
sc 669 dev/ic/lemac.c if ((sc->sc_csr.csr_tqc = LEMAC_INB(sc, LEMAC_REG_TQC)) >=
sc 671 dev/ic/lemac.c sc->sc_cntrs.cntr_txfull++;
sc 679 dev/ic/lemac.c tx_pg = sc->sc_csr.csr_fmq = LEMAC_INB(sc, LEMAC_REG_FMQ);
sc 684 dev/ic/lemac.c if (tx_pg == 0 || tx_pg > sc->sc_lastpage) {
sc 685 dev/ic/lemac.c sc->sc_cntrs.cntr_txnospc++;
sc 699 dev/ic/lemac.c if (LEMAC_USE_PIO_MODE(sc)) {
sc 701 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_IOP, tx_pg);
sc 702 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_PI1, 0);
sc 703 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_PI2, 0);
sc 704 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_DAT, sc->sc_txctl);
sc 705 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_DAT,
sc 707 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_DAT,
sc 709 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_DAT, LEMAC_TX_HDRSZ);
sc 711 dev/ic/lemac.c LEMAC_OUTSB(sc, LEMAC_REG_DAT,
sc 717 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_MPN, tx_pg);
sc 718 dev/ic/lemac.c LEMAC_PUT8(sc, 0, sc->sc_txctl);
sc 719 dev/ic/lemac.c LEMAC_PUT8(sc, 1, (m->m_pkthdr.len >> 0) & 0xFF);
sc 720 dev/ic/lemac.c LEMAC_PUT8(sc, 2, (m->m_pkthdr.len >> 8) & 0xFF);
sc 721 dev/ic/lemac.c LEMAC_PUT8(sc, 3, txoff);
sc 728 dev/ic/lemac.c LEMAC_PUTBUF8(sc, txoff, m0->m_len,
sc 739 dev/ic/lemac.c LEMAC_PUTBUF8(sc, txoff, alen,
sc 746 dev/ic/lemac.c LEMAC_PUTBUF32(sc, txoff,
sc 758 dev/ic/lemac.c LEMAC_PUTBUF8(sc, txoff, alen,
sc 765 dev/ic/lemac.c LEMAC_PUTBUF16(sc, txoff,
sc 773 dev/ic/lemac.c LEMAC_PUTBUF8(sc, txoff, len, cp);
sc 781 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_TQ, tx_pg);
sc 783 dev/ic/lemac.c if (sc->sc_if.if_bpf != NULL)
sc 784 dev/ic/lemac.c bpf_mtap(sc->sc_if.if_bpf, m, BPF_DIRECTION_OUT);
sc 788 dev/ic/lemac.c LEMAC_INTR_ENABLE(sc);
sc 794 dev/ic/lemac.c struct lemac_softc *const sc = LEMAC_IFP_TO_SOFTC(ifp);
sc 802 dev/ic/lemac.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 810 dev/ic/lemac.c lemac_init(sc);
sc 814 dev/ic/lemac.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 824 dev/ic/lemac.c lemac_init(sc);
sc 833 dev/ic/lemac.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 834 dev/ic/lemac.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 839 dev/ic/lemac.c lemac_init(sc);
sc 847 dev/ic/lemac.c &sc->sc_ifmedia, cmd);
sc 870 dev/ic/lemac.c struct lemac_softc *const sc = LEMAC_IFP_TO_SOFTC(ifp);
sc 873 dev/ic/lemac.c switch (IFM_SUBTYPE(sc->sc_ifmedia.ifm_media)) {
sc 887 dev/ic/lemac.c if (sc->sc_ctlmode != new_ctl) {
sc 888 dev/ic/lemac.c sc->sc_ctlmode = new_ctl;
sc 889 dev/ic/lemac.c lemac_reset(sc);
sc 890 dev/ic/lemac.c if (sc->sc_if.if_flags & IFF_UP)
sc 891 dev/ic/lemac.c lemac_init(sc);
sc 902 dev/ic/lemac.c struct lemac_softc *sc = LEMAC_IFP_TO_SOFTC(ifp);
sc 903 dev/ic/lemac.c unsigned data = LEMAC_INB(sc, LEMAC_REG_CNF);
sc 906 dev/ic/lemac.c if (sc->sc_flags & LEMAC_LINKUP)
sc 909 dev/ic/lemac.c if (sc->sc_ctlmode & LEMAC_CTL_APD) {
sc 910 dev/ic/lemac.c if (sc->sc_ctlmode & LEMAC_CTL_PSL) {
sc 973 dev/ic/lemac.c struct lemac_softc *const sc = arg;
sc 976 dev/ic/lemac.c LEMAC_INTR_DISABLE(sc); /* Mask interrupts */
sc 983 dev/ic/lemac.c cs_value = LEMAC_INB(sc, LEMAC_REG_CS);
sc 991 dev/ic/lemac.c lemac_rne_intr(sc);
sc 993 dev/ic/lemac.c lemac_tne_intr(sc);
sc 1001 dev/ic/lemac.c lemac_txd_intr(sc, cs_value);
sc 1003 dev/ic/lemac.c lemac_rxd_intr(sc, cs_value);
sc 1009 dev/ic/lemac.c sc->sc_csr.csr_cs = LEMAC_INB(sc, LEMAC_REG_CS);
sc 1011 dev/ic/lemac.c LEMAC_OUTB(sc, LEMAC_REG_CTL,
sc 1012 dev/ic/lemac.c LEMAC_INB(sc, LEMAC_REG_CTL) ^ LEMAC_CTL_LED);
sc 1013 dev/ic/lemac.c LEMAC_INTR_ENABLE(sc); /* Unmask interrupts */
sc 1017 dev/ic/lemac.c rnd_add_uint32(&sc->rnd_source, cs_value);
sc 1037 dev/ic/lemac.c lemac_ifattach(struct lemac_softc *sc)
sc 1039 dev/ic/lemac.c struct ifnet *const ifp = &sc->sc_if;
sc 1041 dev/ic/lemac.c bcopy(sc->sc_dv.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 1043 dev/ic/lemac.c lemac_reset(sc);
sc 1045 dev/ic/lemac.c lemac_read_macaddr(sc->sc_arpcom.ac_enaddr, sc->sc_iot, sc->sc_ioh,
sc 1048 dev/ic/lemac.c printf(": %s\n", sc->sc_prodname);
sc 1051 dev/ic/lemac.c ether_sprintf(sc->sc_arpcom.ac_enaddr), sc->sc_lastpage * 2 + 2,
sc 1052 dev/ic/lemac.c lemac_modes[sc->sc_flags & LEMAC_MODE_MASK]);
sc 1054 dev/ic/lemac.c ifp->if_softc = (void *)sc;
sc 1064 dev/ic/lemac.c if (sc->sc_flags & LEMAC_ALIVE) {
sc 1073 dev/ic/lemac.c rnd_attach_source(&sc->rnd_source, sc->sc_dv.dv_xname,
sc 1077 dev/ic/lemac.c ifmedia_init(&sc->sc_ifmedia, 0, lemac_ifmedia_change,
sc 1079 dev/ic/lemac.c if (sc->sc_prodname[4] == '5') /* DE205 is UTP/AUI */
sc 1080 dev/ic/lemac.c ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_AUTO, 0,
sc 1082 dev/ic/lemac.c if (sc->sc_prodname[4] != '3') /* DE204 & 205 have UTP */
sc 1083 dev/ic/lemac.c ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_10_T, 0,
sc 1085 dev/ic/lemac.c if (sc->sc_prodname[4] != '4') /* DE203 & 205 have BNC */
sc 1086 dev/ic/lemac.c ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_10_5, 0,
sc 1088 dev/ic/lemac.c switch (sc->sc_prodname[4]) {
sc 1099 dev/ic/lemac.c ifmedia_set(&sc->sc_ifmedia, IFM_ETHER | media);
sc 80 dev/ic/lemacvar.h #define LEMAC_USE_PIO_MODE(sc) \
sc 81 dev/ic/lemacvar.h (((sc->sc_flags & LEMAC_MODE_MASK) == LEMAC_PIO_MODE) || \
sc 82 dev/ic/lemacvar.h (sc->sc_if.if_flags & IFF_LINK0))
sc 84 dev/ic/lemacvar.h #define LEMAC_OUTB(sc, o, v) \
sc 85 dev/ic/lemacvar.h bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (o), (v))
sc 86 dev/ic/lemacvar.h #define LEMAC_OUTSB(sc, o, l, p) \
sc 87 dev/ic/lemacvar.h bus_space_write_multi_1((sc)->sc_iot, (sc)->sc_ioh, (o), (p), (l))
sc 88 dev/ic/lemacvar.h #define LEMAC_INB(sc, o) \
sc 89 dev/ic/lemacvar.h bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (o))
sc 90 dev/ic/lemacvar.h #define LEMAC_INSB(sc, o, l, p) \
sc 91 dev/ic/lemacvar.h bus_space_read_multi_1((sc)->sc_iot, (sc)->sc_ioh, (o), (p), (l))
sc 93 dev/ic/lemacvar.h #define LEMAC_PUTBUF8(sc, o, l, p) \
sc 94 dev/ic/lemacvar.h bus_space_write_region_1((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
sc 95 dev/ic/lemacvar.h #define LEMAC_PUTBUF16(sc, o, l, p) \
sc 96 dev/ic/lemacvar.h bus_space_write_raw_region_2((sc)->sc_memt, (sc)->sc_memh, (o), (p), \
sc 98 dev/ic/lemacvar.h #define LEMAC_PUTBUF32(sc, o, l, p) \
sc 99 dev/ic/lemacvar.h bus_space_write_raw_region_4((sc)->sc_memt, (sc)->sc_memh, (o), (p), \
sc 102 dev/ic/lemacvar.h #define LEMAC_PUT8(sc, o, v) \
sc 103 dev/ic/lemacvar.h bus_space_write_1((sc)->sc_memt, (sc)->sc_memh, (o), (v))
sc 104 dev/ic/lemacvar.h #define LEMAC_PUT16(sc, o, v) \
sc 105 dev/ic/lemacvar.h bus_space_write_2((sc)->sc_memt, (sc)->sc_memh, (o), htole16(v))
sc 106 dev/ic/lemacvar.h #define LEMAC_PUT32(sc, o, v) \
sc 107 dev/ic/lemacvar.h bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, (o), htole32(v))
sc 109 dev/ic/lemacvar.h #define LEMAC_GETBUF8(sc, o, l, p) \
sc 110 dev/ic/lemacvar.h bus_space_read_region_1((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
sc 111 dev/ic/lemacvar.h #define LEMAC_GETBUF16(sc, o, l, p) \
sc 112 dev/ic/lemacvar.h bus_space_read_raw_region_2((sc)->sc_memt, (sc)->sc_memh, (o), (p), \
sc 114 dev/ic/lemacvar.h #define LEMAC_GETBUF32(sc, o, l, p) \
sc 115 dev/ic/lemacvar.h bus_space_read_raw_region_4((sc)->sc_memt, (sc)->sc_memh, (o), (p), \
sc 118 dev/ic/lemacvar.h #define LEMAC_GET8(sc, o) \
sc 119 dev/ic/lemacvar.h bus_space_read_1((sc)->sc_memt, (sc)->sc_memh, (o))
sc 120 dev/ic/lemacvar.h #define LEMAC_GET16(sc, o) \
sc 121 dev/ic/lemacvar.h letoh16(bus_space_read_2((sc)->sc_memt, (sc)->sc_memh, (o)))
sc 122 dev/ic/lemacvar.h #define LEMAC_GET32(sc, o) \
sc 123 dev/ic/lemacvar.h letoh32(bus_space_read_4((sc)->sc_memt, (sc)->sc_memh, (o)))
sc 125 dev/ic/lemacvar.h #define LEMAC_INTR_ENABLE(sc) \
sc 126 dev/ic/lemacvar.h LEMAC_OUTB(sc, LEMAC_REG_IC, \
sc 127 dev/ic/lemacvar.h LEMAC_INB(sc, LEMAC_REG_IC) | LEMAC_IC_ALL)
sc 129 dev/ic/lemacvar.h #define LEMAC_INTR_DISABLE(sc) \
sc 130 dev/ic/lemacvar.h LEMAC_OUTB(sc, LEMAC_REG_IC, \
sc 131 dev/ic/lemacvar.h LEMAC_INB(sc, LEMAC_REG_IC) & ~LEMAC_IC_ALL)
sc 390 dev/ic/lm78.c lm_attach(struct lm_softc *sc)
sc 395 dev/ic/lm78.c if (lm_chips[i].chip_match(sc))
sc 399 dev/ic/lm78.c if (sc->numsensors == 0)
sc 402 dev/ic/lm78.c sc->sensortask = sensor_task_register(sc, lm_refresh, 5);
sc 403 dev/ic/lm78.c if (sc->sensortask == NULL) {
sc 405 dev/ic/lm78.c sc->sc_dev.dv_xname);
sc 410 dev/ic/lm78.c config = sc->lm_readreg(sc, LM_CONFIG);
sc 411 dev/ic/lm78.c sc->lm_writereg(sc, LM_CONFIG, config | 0x01);
sc 414 dev/ic/lm78.c for (i = 0; i < sc->numsensors; ++i)
sc 415 dev/ic/lm78.c sensor_attach(&sc->sensordev, &sc->sensors[i]);
sc 416 dev/ic/lm78.c sensordev_install(&sc->sensordev);
sc 420 dev/ic/lm78.c lm_detach(struct lm_softc *sc)
sc 425 dev/ic/lm78.c sensordev_deinstall(&sc->sensordev);
sc 426 dev/ic/lm78.c for (i = 0; i < sc->numsensors; i++)
sc 427 dev/ic/lm78.c sensor_detach(&sc->sensordev, &sc->sensors[i]);
sc 429 dev/ic/lm78.c if (sc->sensortask != NULL)
sc 430 dev/ic/lm78.c sensor_task_unregister(sc->sensortask);
sc 436 dev/ic/lm78.c lm_match(struct lm_softc *sc)
sc 441 dev/ic/lm78.c chipid = sc->lm_readreg(sc, LM_CHIPID) & LM_CHIPID_MASK;
sc 459 dev/ic/lm78.c lm_setup_sensors(sc, lm78_sensors);
sc 460 dev/ic/lm78.c sc->refresh_sensor_data = lm_refresh_sensor_data;
sc 465 dev/ic/lm78.c def_match(struct lm_softc *sc)
sc 469 dev/ic/lm78.c chipid = sc->lm_readreg(sc, LM_CHIPID) & LM_CHIPID_MASK;
sc 472 dev/ic/lm78.c lm_setup_sensors(sc, lm78_sensors);
sc 473 dev/ic/lm78.c sc->refresh_sensor_data = lm_refresh_sensor_data;
sc 478 dev/ic/lm78.c wb_match(struct lm_softc *sc)
sc 483 dev/ic/lm78.c banksel = sc->lm_readreg(sc, WB_BANKSEL);
sc 484 dev/ic/lm78.c sc->lm_writereg(sc, WB_BANKSEL, WB_BANKSEL_HBAC);
sc 485 dev/ic/lm78.c vendid = sc->lm_readreg(sc, WB_VENDID) << 8;
sc 486 dev/ic/lm78.c sc->lm_writereg(sc, WB_BANKSEL, 0);
sc 487 dev/ic/lm78.c vendid |= sc->lm_readreg(sc, WB_VENDID);
sc 488 dev/ic/lm78.c sc->lm_writereg(sc, WB_BANKSEL, banksel);
sc 494 dev/ic/lm78.c sc->lm_writereg(sc, WB_BANKSEL, WB_BANKSEL_B0);
sc 495 dev/ic/lm78.c devid = sc->lm_readreg(sc, LM_CHIPID);
sc 496 dev/ic/lm78.c sc->chipid = sc->lm_readreg(sc, WB_BANK0_CHIPID);
sc 497 dev/ic/lm78.c sc->lm_writereg(sc, WB_BANKSEL, banksel);
sc 498 dev/ic/lm78.c DPRINTF((" winbond chip id 0x%x\n", sc->chipid));
sc 499 dev/ic/lm78.c switch(sc->chipid) {
sc 502 dev/ic/lm78.c lm_setup_sensors(sc, w83627hf_sensors);
sc 506 dev/ic/lm78.c lm_setup_sensors(sc, w83637hf_sensors);
sc 510 dev/ic/lm78.c lm_setup_sensors(sc, w83627ehf_sensors);
sc 514 dev/ic/lm78.c lm_setup_sensors(sc, w83627ehf_sensors);
sc 518 dev/ic/lm78.c lm_setup_sensors(sc, w83627dhg_sensors);
sc 522 dev/ic/lm78.c sc->lm_writereg(sc, WB_BANKSEL, WB_BANKSEL_B0);
sc 523 dev/ic/lm78.c if (sc->lm_readreg(sc, WB_BANK0_CONFIG) & WB_CONFIG_VMR9)
sc 524 dev/ic/lm78.c sc->vrm9 = 1;
sc 525 dev/ic/lm78.c sc->lm_writereg(sc, WB_BANKSEL, banksel);
sc 526 dev/ic/lm78.c lm_setup_sensors(sc, w83637hf_sensors);
sc 530 dev/ic/lm78.c lm_setup_sensors(sc, w83697hf_sensors);
sc 535 dev/ic/lm78.c lm_setup_sensors(sc, w83781d_sensors);
sc 539 dev/ic/lm78.c lm_setup_sensors(sc, w83782d_sensors);
sc 543 dev/ic/lm78.c lm_setup_sensors(sc, w83783s_sensors);
sc 547 dev/ic/lm78.c lm_setup_sensors(sc, w83791d_sensors);
sc 557 dev/ic/lm78.c lm_setup_sensors(sc, w83792d_sensors);
sc 562 dev/ic/lm78.c lm_setup_sensors(sc, w83781d_sensors);
sc 565 dev/ic/lm78.c lm_setup_sensors(sc, as99127f_sensors);
sc 569 dev/ic/lm78.c printf(": unknown Winbond chip (ID 0x%x)\n", sc->chipid);
sc 571 dev/ic/lm78.c lm_setup_sensors(sc, lm78_sensors);
sc 572 dev/ic/lm78.c sc->refresh_sensor_data = lm_refresh_sensor_data;
sc 576 dev/ic/lm78.c sc->refresh_sensor_data = wb_refresh_sensor_data;
sc 581 dev/ic/lm78.c lm_setup_sensors(struct lm_softc *sc, struct lm_sensor *sensors)
sc 585 dev/ic/lm78.c strlcpy(sc->sensordev.xname, sc->sc_dev.dv_xname,
sc 586 dev/ic/lm78.c sizeof(sc->sensordev.xname));
sc 589 dev/ic/lm78.c sc->sensors[i].type = sensors[i].type;
sc 590 dev/ic/lm78.c strlcpy(sc->sensors[i].desc, sensors[i].desc,
sc 591 dev/ic/lm78.c sizeof(sc->sensors[i].desc));
sc 592 dev/ic/lm78.c sc->numsensors++;
sc 594 dev/ic/lm78.c sc->lm_sensors = sensors;
sc 600 dev/ic/lm78.c struct lm_softc *sc = arg;
sc 602 dev/ic/lm78.c sc->refresh_sensor_data(sc);
sc 606 dev/ic/lm78.c lm_refresh_sensor_data(struct lm_softc *sc)
sc 610 dev/ic/lm78.c for (i = 0; i < sc->numsensors; i++)
sc 611 dev/ic/lm78.c sc->lm_sensors[i].refresh(sc, i);
sc 615 dev/ic/lm78.c lm_refresh_volt(struct lm_softc *sc, int n)
sc 617 dev/ic/lm78.c struct ksensor *sensor = &sc->sensors[n];
sc 620 dev/ic/lm78.c data = sc->lm_readreg(sc, sc->lm_sensors[n].reg);
sc 622 dev/ic/lm78.c sensor->value *= sc->lm_sensors[n].rfact;
sc 627 dev/ic/lm78.c lm_refresh_temp(struct lm_softc *sc, int n)
sc 629 dev/ic/lm78.c struct ksensor *sensor = &sc->sensors[n];
sc 636 dev/ic/lm78.c sdata = sc->lm_readreg(sc, sc->lm_sensors[n].reg);
sc 649 dev/ic/lm78.c lm_refresh_fanrpm(struct lm_softc *sc, int n)
sc 651 dev/ic/lm78.c struct ksensor *sensor = &sc->sensors[n];
sc 661 dev/ic/lm78.c if (sc->lm_sensors[n].reg == LM_FAN1 ||
sc 662 dev/ic/lm78.c sc->lm_sensors[n].reg == LM_FAN2) {
sc 663 dev/ic/lm78.c data = sc->lm_readreg(sc, LM_VIDFAN);
sc 664 dev/ic/lm78.c if (sc->lm_sensors[n].reg == LM_FAN1)
sc 670 dev/ic/lm78.c data = sc->lm_readreg(sc, sc->lm_sensors[n].reg);
sc 681 dev/ic/lm78.c wb_refresh_sensor_data(struct lm_softc *sc)
sc 689 dev/ic/lm78.c banksel = bank = sc->lm_readreg(sc, WB_BANKSEL);
sc 690 dev/ic/lm78.c for (i = 0; i < sc->numsensors; i++) {
sc 691 dev/ic/lm78.c if (bank != sc->lm_sensors[i].bank) {
sc 692 dev/ic/lm78.c bank = sc->lm_sensors[i].bank;
sc 693 dev/ic/lm78.c sc->lm_writereg(sc, WB_BANKSEL, bank);
sc 695 dev/ic/lm78.c sc->lm_sensors[i].refresh(sc, i);
sc 697 dev/ic/lm78.c sc->lm_writereg(sc, WB_BANKSEL, banksel);
sc 701 dev/ic/lm78.c wb_w83637hf_refresh_vcore(struct lm_softc *sc, int n)
sc 703 dev/ic/lm78.c struct ksensor *sensor = &sc->sensors[n];
sc 706 dev/ic/lm78.c data = sc->lm_readreg(sc, sc->lm_sensors[n].reg);
sc 714 dev/ic/lm78.c if (sc->vrm9)
sc 721 dev/ic/lm78.c wb_refresh_nvolt(struct lm_softc *sc, int n)
sc 723 dev/ic/lm78.c struct ksensor *sensor = &sc->sensors[n];
sc 726 dev/ic/lm78.c data = sc->lm_readreg(sc, sc->lm_sensors[n].reg);
sc 728 dev/ic/lm78.c sensor->value *= sc->lm_sensors[n].rfact;
sc 734 dev/ic/lm78.c wb_w83627ehf_refresh_nvolt(struct lm_softc *sc, int n)
sc 736 dev/ic/lm78.c struct ksensor *sensor = &sc->sensors[n];
sc 739 dev/ic/lm78.c data = sc->lm_readreg(sc, sc->lm_sensors[n].reg);
sc 747 dev/ic/lm78.c wb_refresh_temp(struct lm_softc *sc, int n)
sc 749 dev/ic/lm78.c struct ksensor *sensor = &sc->sensors[n];
sc 759 dev/ic/lm78.c sdata = sc->lm_readreg(sc, sc->lm_sensors[n].reg) << 1;
sc 760 dev/ic/lm78.c sdata += sc->lm_readreg(sc, sc->lm_sensors[n].reg + 1) >> 7;
sc 773 dev/ic/lm78.c wb_refresh_fanrpm(struct lm_softc *sc, int n)
sc 775 dev/ic/lm78.c struct ksensor *sensor = &sc->sensors[n];
sc 783 dev/ic/lm78.c if (sc->lm_sensors[n].reg == LM_FAN1 ||
sc 784 dev/ic/lm78.c sc->lm_sensors[n].reg == LM_FAN2 ||
sc 785 dev/ic/lm78.c sc->lm_sensors[n].reg == LM_FAN3) {
sc 786 dev/ic/lm78.c data = sc->lm_readreg(sc, WB_BANK0_VBAT);
sc 787 dev/ic/lm78.c fan = (sc->lm_sensors[n].reg - LM_FAN1);
sc 792 dev/ic/lm78.c if (sc->lm_sensors[n].reg == LM_FAN1 ||
sc 793 dev/ic/lm78.c sc->lm_sensors[n].reg == LM_FAN2) {
sc 794 dev/ic/lm78.c data = sc->lm_readreg(sc, LM_VIDFAN);
sc 795 dev/ic/lm78.c if (sc->lm_sensors[n].reg == LM_FAN1)
sc 799 dev/ic/lm78.c } else if (sc->lm_sensors[n].reg == LM_FAN3) {
sc 800 dev/ic/lm78.c data = sc->lm_readreg(sc, WB_PIN);
sc 802 dev/ic/lm78.c } else if (sc->lm_sensors[n].reg == WB_BANK0_FAN4 ||
sc 803 dev/ic/lm78.c sc->lm_sensors[n].reg == WB_BANK0_FAN5) {
sc 804 dev/ic/lm78.c data = sc->lm_readreg(sc, WB_BANK0_FAN45);
sc 805 dev/ic/lm78.c if (sc->lm_sensors[n].reg == WB_BANK0_FAN4)
sc 811 dev/ic/lm78.c data = sc->lm_readreg(sc, sc->lm_sensors[n].reg);
sc 822 dev/ic/lm78.c wb_w83792d_refresh_fanrpm(struct lm_softc *sc, int n)
sc 824 dev/ic/lm78.c struct ksensor *sensor = &sc->sensors[n];
sc 827 dev/ic/lm78.c switch (sc->lm_sensors[n].reg) {
sc 854 dev/ic/lm78.c data = sc->lm_readreg(sc, sc->lm_sensors[n].reg);
sc 860 dev/ic/lm78.c divisor = (sc->lm_readreg(sc, reg) >> shift) & 0x7;
sc 867 dev/ic/lm78.c as_refresh_temp(struct lm_softc *sc, int n)
sc 869 dev/ic/lm78.c struct ksensor *sensor = &sc->sensors[n];
sc 876 dev/ic/lm78.c sdata = sc->lm_readreg(sc, sc->lm_sensors[n].reg) << 1;
sc 877 dev/ic/lm78.c sdata += sc->lm_readreg(sc, sc->lm_sensors[n].reg + 1) >> 7;
sc 105 dev/ic/lpt.c lpt_not_ready(bus_space_read_1(iot, ioh, lpt_status), sc)
sc 138 dev/ic/lpt.c lpt_attach_common(sc)
sc 139 dev/ic/lpt.c struct lpt_softc *sc;
sc 143 dev/ic/lpt.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, lpt_control, LPC_NINIT);
sc 145 dev/ic/lpt.c timeout_set(&sc->sc_wakeup_tmo, lptwakeup, sc);
sc 160 dev/ic/lpt.c struct lpt_softc *sc;
sc 169 dev/ic/lpt.c sc = lpt_cd.cd_devs[unit];
sc 170 dev/ic/lpt.c if (!sc)
sc 173 dev/ic/lpt.c sc->sc_flags = (sc->sc_flags & LPT_POLLED) | flags;
sc 174 dev/ic/lpt.c if ((sc->sc_flags & (LPT_POLLED|LPT_NOINTR)) == LPT_POLLED)
sc 178 dev/ic/lpt.c if (sc->sc_state)
sc 179 dev/ic/lpt.c printf("%s: stat=0x%x not zero\n", sc->sc_dev.dv_xname,
sc 180 dev/ic/lpt.c sc->sc_state);
sc 183 dev/ic/lpt.c if (sc->sc_state)
sc 186 dev/ic/lpt.c sc->sc_state = LPT_INIT;
sc 187 dev/ic/lpt.c LPRINTF(("%s: open: flags=0x%x\n", sc->sc_dev.dv_xname, flags));
sc 188 dev/ic/lpt.c iot = sc->sc_iot;
sc 189 dev/ic/lpt.c ioh = sc->sc_ioh;
sc 203 dev/ic/lpt.c sc->sc_state = 0;
sc 208 dev/ic/lpt.c error = tsleep((caddr_t)sc, LPTPRI | PCATCH, "lptopen", STEP);
sc 210 dev/ic/lpt.c sc->sc_state = 0;
sc 219 dev/ic/lpt.c sc->sc_control = control;
sc 222 dev/ic/lpt.c sc->sc_inbuf = geteblk(LPT_BSIZE);
sc 223 dev/ic/lpt.c sc->sc_count = 0;
sc 224 dev/ic/lpt.c sc->sc_state = LPT_OPEN;
sc 226 dev/ic/lpt.c if ((sc->sc_flags & LPT_NOINTR) == 0)
sc 227 dev/ic/lpt.c lptwakeup(sc);
sc 229 dev/ic/lpt.c LPRINTF(("%s: opened\n", sc->sc_dev.dv_xname));
sc 234 dev/ic/lpt.c lpt_not_ready(status, sc)
sc 236 dev/ic/lpt.c struct lpt_softc *sc;
sc 241 dev/ic/lpt.c new = status & ~sc->sc_laststatus;
sc 242 dev/ic/lpt.c sc->sc_laststatus = status;
sc 245 dev/ic/lpt.c log(LOG_NOTICE, "%s: offline\n", sc->sc_dev.dv_xname);
sc 247 dev/ic/lpt.c log(LOG_NOTICE, "%s: out of paper\n", sc->sc_dev.dv_xname);
sc 249 dev/ic/lpt.c log(LOG_NOTICE, "%s: output error\n", sc->sc_dev.dv_xname);
sc 258 dev/ic/lpt.c struct lpt_softc *sc = arg;
sc 262 dev/ic/lpt.c lptintr(sc);
sc 265 dev/ic/lpt.c timeout_add(&sc->sc_wakeup_tmo, STEP);
sc 279 dev/ic/lpt.c struct lpt_softc *sc = lpt_cd.cd_devs[unit];
sc 280 dev/ic/lpt.c bus_space_tag_t iot = sc->sc_iot;
sc 281 dev/ic/lpt.c bus_space_handle_t ioh = sc->sc_ioh;
sc 283 dev/ic/lpt.c if (sc->sc_count)
sc 284 dev/ic/lpt.c (void) lptpushbytes(sc);
sc 286 dev/ic/lpt.c if ((sc->sc_flags & LPT_NOINTR) == 0)
sc 287 dev/ic/lpt.c timeout_del(&sc->sc_wakeup_tmo);
sc 290 dev/ic/lpt.c sc->sc_state = 0;
sc 292 dev/ic/lpt.c brelse(sc->sc_inbuf);
sc 294 dev/ic/lpt.c LPRINTF(("%s: closed\n", sc->sc_dev.dv_xname));
sc 299 dev/ic/lpt.c lptpushbytes(sc)
sc 300 dev/ic/lpt.c struct lpt_softc *sc;
sc 302 dev/ic/lpt.c bus_space_tag_t iot = sc->sc_iot;
sc 303 dev/ic/lpt.c bus_space_handle_t ioh = sc->sc_ioh;
sc 306 dev/ic/lpt.c if (sc->sc_flags & LPT_NOINTR) {
sc 308 dev/ic/lpt.c u_int8_t control = sc->sc_control;
sc 310 dev/ic/lpt.c while (sc->sc_count > 0) {
sc 313 dev/ic/lpt.c if (++spin < sc->sc_spinmax)
sc 317 dev/ic/lpt.c sc->sc_spinmax++;
sc 323 dev/ic/lpt.c error = tsleep((caddr_t)sc,
sc 331 dev/ic/lpt.c bus_space_write_1(iot, ioh, lpt_data, *sc->sc_cp++);
sc 334 dev/ic/lpt.c sc->sc_count--;
sc 338 dev/ic/lpt.c if (spin*2 + 16 < sc->sc_spinmax)
sc 339 dev/ic/lpt.c sc->sc_spinmax--;
sc 344 dev/ic/lpt.c while (sc->sc_count > 0) {
sc 346 dev/ic/lpt.c if ((sc->sc_state & LPT_OBUSY) == 0) {
sc 347 dev/ic/lpt.c LPRINTF(("%s: write %d\n", sc->sc_dev.dv_xname,
sc 348 dev/ic/lpt.c sc->sc_count));
sc 350 dev/ic/lpt.c (void) lptintr(sc);
sc 353 dev/ic/lpt.c error = tsleep((caddr_t)sc, LPTPRI | PCATCH,
sc 372 dev/ic/lpt.c struct lpt_softc *sc = lpt_cd.cd_devs[LPTUNIT(dev)];
sc 377 dev/ic/lpt.c uiomove(sc->sc_cp = sc->sc_inbuf->b_data, n, uio);
sc 378 dev/ic/lpt.c sc->sc_count = n;
sc 379 dev/ic/lpt.c error = lptpushbytes(sc);
sc 385 dev/ic/lpt.c uio->uio_resid += sc->sc_count;
sc 386 dev/ic/lpt.c sc->sc_count = 0;
sc 401 dev/ic/lpt.c struct lpt_softc *sc = arg;
sc 402 dev/ic/lpt.c bus_space_tag_t iot = sc->sc_iot;
sc 403 dev/ic/lpt.c bus_space_handle_t ioh = sc->sc_ioh;
sc 405 dev/ic/lpt.c if (((sc->sc_state & LPT_OPEN) == 0 && sc->sc_count == 0) ||
sc 406 dev/ic/lpt.c (sc->sc_flags & LPT_NOINTR))
sc 413 dev/ic/lpt.c if (sc->sc_count) {
sc 414 dev/ic/lpt.c u_int8_t control = sc->sc_control;
sc 416 dev/ic/lpt.c bus_space_write_1(iot, ioh, lpt_data, *sc->sc_cp++);
sc 419 dev/ic/lpt.c sc->sc_count--;
sc 421 dev/ic/lpt.c sc->sc_state |= LPT_OBUSY;
sc 423 dev/ic/lpt.c sc->sc_state &= ~LPT_OBUSY;
sc 425 dev/ic/lpt.c if (sc->sc_count == 0) {
sc 427 dev/ic/lpt.c wakeup((caddr_t)sc);
sc 94 dev/ic/lsi64854.c lsi64854_attach(sc)
sc 95 dev/ic/lsi64854.c struct lsi64854_softc *sc;
sc 101 dev/ic/lsi64854.c switch (sc->sc_channel) {
sc 103 dev/ic/lsi64854.c sc->intr = lsi64854_scsi_intr;
sc 104 dev/ic/lsi64854.c sc->setup = lsi64854_setup;
sc 107 dev/ic/lsi64854.c sc->intr = lsi64854_enet_intr;
sc 108 dev/ic/lsi64854.c sc->setup = lsi64854_setup;
sc 111 dev/ic/lsi64854.c sc->intr = lsi64854_pp_intr;
sc 112 dev/ic/lsi64854.c sc->setup = lsi64854_setup_pp;
sc 115 dev/ic/lsi64854.c printf("%s: unknown channel\n", sc->sc_dev.dv_xname);
sc 117 dev/ic/lsi64854.c sc->reset = lsi64854_reset;
sc 120 dev/ic/lsi64854.c if ((rc = bus_dmamap_create(sc->sc_dmatag, MAX_DMA_SZ, 1, MAX_DMA_SZ,
sc 121 dev/ic/lsi64854.c 0, BUS_DMA_WAITOK, &sc->sc_dmamap)) != 0) {
sc 127 dev/ic/lsi64854.c csr = L64854_GCSR(sc);
sc 128 dev/ic/lsi64854.c sc->sc_rev = csr & L64854_DEVID;
sc 129 dev/ic/lsi64854.c switch (sc->sc_rev) {
sc 149 dev/ic/lsi64854.c printf("unknown (0x%x)", sc->sc_rev);
sc 152 dev/ic/lsi64854.c DPRINTF(LDB_ANY, (", burst 0x%x, csr 0x%x", sc->sc_burst, csr));
sc 174 dev/ic/lsi64854.c #define DMA_DRAIN(sc, dontpanic) do { \
sc 182 dev/ic/lsi64854.c DMAWAIT(sc, L64854_GCSR(sc) & D_ESC_R_PEND, "R_PEND", dontpanic);\
sc 183 dev/ic/lsi64854.c if (sc->sc_rev != DMAREV_HME) { \
sc 188 dev/ic/lsi64854.c csr = L64854_GCSR(sc); \
sc 189 dev/ic/lsi64854.c if (sc->sc_rev == DMAREV_1 || sc->sc_rev == DMAREV_0) \
sc 194 dev/ic/lsi64854.c L64854_SCSR(sc,csr); \
sc 200 dev/ic/lsi64854.c DMAWAIT(sc, L64854_GCSR(sc) & L64854_DRAINING, "DRAINING", dontpanic);\
sc 203 dev/ic/lsi64854.c #define DMA_FLUSH(sc, dontpanic) do { \
sc 211 dev/ic/lsi64854.c DMAWAIT(sc, L64854_GCSR(sc) & D_ESC_R_PEND, "R_PEND", dontpanic);\
sc 212 dev/ic/lsi64854.c csr = L64854_GCSR(sc); \
sc 215 dev/ic/lsi64854.c L64854_SCSR(sc,csr); \
sc 219 dev/ic/lsi64854.c lsi64854_reset(sc)
sc 220 dev/ic/lsi64854.c struct lsi64854_softc *sc;
sc 224 dev/ic/lsi64854.c DMA_FLUSH(sc, 1);
sc 225 dev/ic/lsi64854.c csr = L64854_GCSR(sc);
sc 232 dev/ic/lsi64854.c if (sc->sc_dmamap->dm_nsegs > 0)
sc 233 dev/ic/lsi64854.c bus_dmamap_unload(sc->sc_dmatag, sc->sc_dmamap);
sc 235 dev/ic/lsi64854.c if (sc->sc_rev == DMAREV_HME)
sc 236 dev/ic/lsi64854.c L64854_SCSR(sc, csr | D_HW_RESET_FAS366);
sc 240 dev/ic/lsi64854.c L64854_SCSR(sc, csr);
sc 244 dev/ic/lsi64854.c csr = L64854_GCSR(sc);
sc 246 dev/ic/lsi64854.c L64854_SCSR(sc, csr);
sc 249 dev/ic/lsi64854.c csr = L64854_GCSR(sc);
sc 251 dev/ic/lsi64854.c if (sc->sc_rev > DMAREV_1 && sc->sc_channel == L64854_CHANNEL_SCSI) {
sc 252 dev/ic/lsi64854.c if (sc->sc_rev == DMAREV_HME)
sc 259 dev/ic/lsi64854.c switch (sc->sc_rev) {
sc 263 dev/ic/lsi64854.c if (sc->sc_burst == 32) {
sc 265 dev/ic/lsi64854.c } else if (sc->sc_burst == 16) {
sc 273 dev/ic/lsi64854.c if (sc->sc_burst == 32) {
sc 281 dev/ic/lsi64854.c L64854_SCSR(sc, csr);
sc 283 dev/ic/lsi64854.c if (sc->sc_rev == DMAREV_HME) {
sc 284 dev/ic/lsi64854.c bus_space_write_4(sc->sc_bustag, sc->sc_regs, L64854_REG_ADDR, 0);
sc 285 dev/ic/lsi64854.c sc->sc_dmactl = csr;
sc 287 dev/ic/lsi64854.c sc->sc_active = 0;
sc 298 dev/ic/lsi64854.c lsi64854_setup(sc, addr, len, datain, dmasize)
sc 299 dev/ic/lsi64854.c struct lsi64854_softc *sc;
sc 307 dev/ic/lsi64854.c DMA_FLUSH(sc, 0);
sc 310 dev/ic/lsi64854.c DMACSR(sc) &= ~D_INT_EN;
sc 312 dev/ic/lsi64854.c sc->sc_dmaaddr = addr;
sc 313 dev/ic/lsi64854.c sc->sc_dmalen = len;
sc 320 dev/ic/lsi64854.c *dmasize = sc->sc_dmasize =
sc 321 dev/ic/lsi64854.c min(*dmasize, DMAMAX((size_t) *sc->sc_dmaaddr));
sc 323 dev/ic/lsi64854.c DPRINTF(LDB_ANY, ("dma_setup: dmasize = %ld\n", (long)sc->sc_dmasize));
sc 328 dev/ic/lsi64854.c if (sc->sc_rev == DMAREV_HME) {
sc 330 dev/ic/lsi64854.c L64854_SCSR(sc, sc->sc_dmactl | L64854_RESET);
sc 331 dev/ic/lsi64854.c L64854_SCSR(sc, sc->sc_dmactl);
sc 333 dev/ic/lsi64854.c bus_space_write_4(sc->sc_bustag, sc->sc_regs, L64854_REG_CNT, *dmasize);
sc 337 dev/ic/lsi64854.c if (sc->sc_dmasize) {
sc 338 dev/ic/lsi64854.c sc->sc_dvmaaddr = *sc->sc_dmaaddr;
sc 339 dev/ic/lsi64854.c if (bus_dmamap_load(sc->sc_dmatag, sc->sc_dmamap,
sc 340 dev/ic/lsi64854.c *sc->sc_dmaaddr, sc->sc_dmasize,
sc 344 dev/ic/lsi64854.c sc->sc_dev.dv_xname);
sc 345 dev/ic/lsi64854.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, 0, sc->sc_dmasize,
sc 349 dev/ic/lsi64854.c bus_space_write_4(sc->sc_bustag, sc->sc_regs, L64854_REG_ADDR,
sc 350 dev/ic/lsi64854.c sc->sc_dmamap->dm_segs[0].ds_addr);
sc 353 dev/ic/lsi64854.c if (sc->sc_rev == DMAREV_ESC) {
sc 355 dev/ic/lsi64854.c long bcnt = sc->sc_dmasize;
sc 356 dev/ic/lsi64854.c long eaddr = bcnt + (long)*sc->sc_dmaaddr;
sc 359 dev/ic/lsi64854.c bus_space_write_4(sc->sc_bustag, sc->sc_regs, L64854_REG_CNT,
sc 364 dev/ic/lsi64854.c csr = L64854_GCSR(sc);
sc 372 dev/ic/lsi64854.c if (sc->sc_rev == DMAREV_HME) {
sc 376 dev/ic/lsi64854.c L64854_SCSR(sc, csr);
sc 392 dev/ic/lsi64854.c struct lsi64854_softc *sc = arg;
sc 393 dev/ic/lsi64854.c struct ncr53c9x_softc *nsc = sc->sc_client;
sc 398 dev/ic/lsi64854.c csr = L64854_GCSR(sc);
sc 400 dev/ic/lsi64854.c DPRINTF(LDB_SCSI, ("%s: dmaintr: addr 0x%x, csr %b\n", sc->sc_dev.dv_xname,
sc 401 dev/ic/lsi64854.c bus_space_read_4(sc->sc_bustag, sc->sc_regs, L64854_REG_ADDR),
sc 406 dev/ic/lsi64854.c printf("%s: error: csr=%s\n", sc->sc_dev.dv_xname, bits);
sc 410 dev/ic/lsi64854.c L64854_SCSR(sc, csr);
sc 415 dev/ic/lsi64854.c if (sc->sc_active == 0)
sc 418 dev/ic/lsi64854.c DMA_DRAIN(sc, 0);
sc 422 dev/ic/lsi64854.c L64854_SCSR(sc, csr);
sc 423 dev/ic/lsi64854.c sc->sc_active = 0;
sc 425 dev/ic/lsi64854.c if (sc->sc_dmasize == 0) {
sc 461 dev/ic/lsi64854.c if (resid == 0 && sc->sc_dmasize == 65536 &&
sc 467 dev/ic/lsi64854.c trans = sc->sc_dmasize - resid;
sc 476 dev/ic/lsi64854.c sc->sc_dev.dv_xname, trans, sc->sc_dmasize);
sc 478 dev/ic/lsi64854.c trans = sc->sc_dmasize;
sc 488 dev/ic/lsi64854.c if (sc->sc_dmamap->dm_nsegs > 0) {
sc 489 dev/ic/lsi64854.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, 0, sc->sc_dmasize,
sc 493 dev/ic/lsi64854.c bus_dmamap_unload(sc->sc_dmatag, sc->sc_dmamap);
sc 496 dev/ic/lsi64854.c *sc->sc_dmalen -= trans;
sc 497 dev/ic/lsi64854.c *sc->sc_dmaaddr += trans;
sc 500 dev/ic/lsi64854.c if (*sc->sc_dmalen == 0 ||
sc 505 dev/ic/lsi64854.c dma_start(sc, sc->sc_dmaaddr, sc->sc_dmalen, DMACSR(sc) & D_WRITE);
sc 518 dev/ic/lsi64854.c struct lsi64854_softc *sc = arg;
sc 524 dev/ic/lsi64854.c csr = L64854_GCSR(sc);
sc 531 dev/ic/lsi64854.c printf("%s: error: csr=%s\n", sc->sc_dev.dv_xname, bits);
sc 535 dev/ic/lsi64854.c L64854_SCSR(sc, csr);
sc 536 dev/ic/lsi64854.c DMA_RESET(sc);
sc 544 dev/ic/lsi64854.c L64854_SCSR(sc, csr);
sc 545 dev/ic/lsi64854.c while (i-- > 0 && (L64854_GCSR(sc) & D_DRAINING))
sc 549 dev/ic/lsi64854.c return (rv | (*sc->sc_intrchain)(sc->sc_intrchainarg));
sc 556 dev/ic/lsi64854.c lsi64854_setup_pp(sc, addr, len, datain, dmasize)
sc 557 dev/ic/lsi64854.c struct lsi64854_softc *sc;
sc 565 dev/ic/lsi64854.c DMA_FLUSH(sc, 0);
sc 567 dev/ic/lsi64854.c sc->sc_dmaaddr = addr;
sc 568 dev/ic/lsi64854.c sc->sc_dmalen = len;
sc 570 dev/ic/lsi64854.c DPRINTF(LDB_PP, ("%s: pp start %ld@%p,%d\n", sc->sc_dev.dv_xname,
sc 571 dev/ic/lsi64854.c (long)*sc->sc_dmalen, *sc->sc_dmaaddr, datain ? 1 : 0));
sc 578 dev/ic/lsi64854.c *dmasize = sc->sc_dmasize =
sc 579 dev/ic/lsi64854.c min(*dmasize, DMAMAX((size_t) *sc->sc_dmaaddr));
sc 581 dev/ic/lsi64854.c DPRINTF(LDB_PP, ("dma_setup_pp: dmasize = %ld\n", (long)sc->sc_dmasize));
sc 584 dev/ic/lsi64854.c if (sc->sc_dmasize) {
sc 585 dev/ic/lsi64854.c sc->sc_dvmaaddr = *sc->sc_dmaaddr;
sc 586 dev/ic/lsi64854.c if (bus_dmamap_load(sc->sc_dmatag, sc->sc_dmamap,
sc 587 dev/ic/lsi64854.c *sc->sc_dmaaddr, sc->sc_dmasize,
sc 591 dev/ic/lsi64854.c sc->sc_dev.dv_xname);
sc 592 dev/ic/lsi64854.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, 0, sc->sc_dmasize,
sc 596 dev/ic/lsi64854.c bus_space_write_4(sc->sc_bustag, sc->sc_regs, L64854_REG_ADDR,
sc 597 dev/ic/lsi64854.c sc->sc_dmamap->dm_segs[0].ds_addr);
sc 599 dev/ic/lsi64854.c bus_space_write_4(sc->sc_bustag, sc->sc_regs, L64854_REG_CNT,
sc 600 dev/ic/lsi64854.c sc->sc_dmasize);
sc 604 dev/ic/lsi64854.c csr = L64854_GCSR(sc);
sc 606 dev/ic/lsi64854.c if (sc->sc_burst == 32) {
sc 608 dev/ic/lsi64854.c } else if (sc->sc_burst == 16) {
sc 621 dev/ic/lsi64854.c L64854_SCSR(sc, csr);
sc 632 dev/ic/lsi64854.c struct lsi64854_softc *sc = arg;
sc 636 dev/ic/lsi64854.c csr = L64854_GCSR(sc);
sc 638 dev/ic/lsi64854.c DPRINTF(LDB_PP, ("%s: pp intr: addr 0x%x, csr %b\n", sc->sc_dev.dv_xname,
sc 639 dev/ic/lsi64854.c bus_space_read_4(sc->sc_bustag, sc->sc_regs, L64854_REG_ADDR),
sc 643 dev/ic/lsi64854.c resid = bus_space_read_4(sc->sc_bustag, sc->sc_regs,
sc 645 dev/ic/lsi64854.c printf("%s: pp error: resid %d csr=%b\n", sc->sc_dev.dv_xname,
sc 650 dev/ic/lsi64854.c L64854_SCSR(sc, csr);
sc 656 dev/ic/lsi64854.c if (sc->sc_active != 0) {
sc 657 dev/ic/lsi64854.c DMA_DRAIN(sc, 0);
sc 658 dev/ic/lsi64854.c resid = bus_space_read_4(sc->sc_bustag, sc->sc_regs,
sc 664 dev/ic/lsi64854.c L64854_SCSR(sc, csr);
sc 665 dev/ic/lsi64854.c sc->sc_active = 0;
sc 667 dev/ic/lsi64854.c trans = sc->sc_dmasize - resid;
sc 669 dev/ic/lsi64854.c trans = sc->sc_dmasize;
sc 671 dev/ic/lsi64854.c *sc->sc_dmalen -= trans;
sc 672 dev/ic/lsi64854.c *sc->sc_dmaaddr += trans;
sc 674 dev/ic/lsi64854.c if (sc->sc_dmamap->dm_nsegs > 0) {
sc 675 dev/ic/lsi64854.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_dmamap, 0, sc->sc_dmasize,
sc 679 dev/ic/lsi64854.c bus_dmamap_unload(sc->sc_dmatag, sc->sc_dmamap);
sc 73 dev/ic/lsi64854var.h #define L64854_GCSR(sc) \
sc 74 dev/ic/lsi64854var.h (bus_space_read_4((sc)->sc_bustag, (sc)->sc_regs, L64854_REG_CSR))
sc 76 dev/ic/lsi64854var.h #define L64854_SCSR(sc, csr) \
sc 77 dev/ic/lsi64854var.h bus_space_write_4((sc)->sc_bustag, (sc)->sc_regs, L64854_REG_CSR, csr)
sc 83 dev/ic/lsi64854var.h #define DMA_RESET(sc) (((sc)->reset)(sc))
sc 84 dev/ic/lsi64854var.h #define DMA_INTR(sc) (((sc)->intr)(sc))
sc 85 dev/ic/lsi64854var.h #define DMA_SETUP(sc, a, l, d, s) (((sc)->setup)(sc, a, l, d, s))
sc 87 dev/ic/lsi64854var.h #define DMA_ISACTIVE(sc) ((sc)->sc_active)
sc 89 dev/ic/lsi64854var.h #define DMA_ENINTR(sc) do { \
sc 90 dev/ic/lsi64854var.h u_int32_t csr = L64854_GCSR(sc); \
sc 92 dev/ic/lsi64854var.h L64854_SCSR(sc, csr); \
sc 95 dev/ic/lsi64854var.h #define DMA_ISINTR(sc) (L64854_GCSR(sc) & (D_INT_PEND|D_ERR_PEND))
sc 97 dev/ic/lsi64854var.h #define DMA_GO(sc) do { \
sc 98 dev/ic/lsi64854var.h u_int32_t csr = L64854_GCSR(sc); \
sc 100 dev/ic/lsi64854var.h L64854_SCSR(sc, csr); \
sc 101 dev/ic/lsi64854var.h sc->sc_active = 1; \
sc 222 dev/ic/malo.c #define malo_mem_write4(sc, off, x) \
sc 223 dev/ic/malo.c bus_space_write_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x))
sc 224 dev/ic/malo.c #define malo_mem_write2(sc, off, x) \
sc 225 dev/ic/malo.c bus_space_write_2((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x))
sc 226 dev/ic/malo.c #define malo_mem_write1(sc, off, x) \
sc 227 dev/ic/malo.c bus_space_write_1((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off), (x))
sc 229 dev/ic/malo.c #define malo_mem_read4(sc, off) \
sc 230 dev/ic/malo.c bus_space_read_4((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off))
sc 231 dev/ic/malo.c #define malo_mem_read1(sc, off) \
sc 232 dev/ic/malo.c bus_space_read_1((sc)->sc_mem1_bt, (sc)->sc_mem1_bh, (off))
sc 234 dev/ic/malo.c #define malo_ctl_write4(sc, off, x) \
sc 235 dev/ic/malo.c bus_space_write_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off), (x))
sc 236 dev/ic/malo.c #define malo_ctl_read4(sc, off) \
sc 237 dev/ic/malo.c bus_space_read_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off))
sc 238 dev/ic/malo.c #define malo_ctl_read1(sc, off) \
sc 239 dev/ic/malo.c bus_space_read_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (off))
sc 241 dev/ic/malo.c #define malo_ctl_barrier(sc, t) \
sc 242 dev/ic/malo.c bus_space_barrier((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, 0x0c00, 0xff, (t))
sc 248 dev/ic/malo.c int malo_alloc_cmd(struct malo_softc *sc);
sc 249 dev/ic/malo.c void malo_free_cmd(struct malo_softc *sc);
sc 250 dev/ic/malo.c void malo_send_cmd(struct malo_softc *sc, bus_addr_t addr);
sc 251 dev/ic/malo.c int malo_send_cmd_dma(struct malo_softc *sc, bus_addr_t addr);
sc 252 dev/ic/malo.c int malo_alloc_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring,
sc 254 dev/ic/malo.c void malo_reset_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring);
sc 255 dev/ic/malo.c void malo_free_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring);
sc 256 dev/ic/malo.c int malo_alloc_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring,
sc 258 dev/ic/malo.c void malo_reset_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring);
sc 259 dev/ic/malo.c void malo_free_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring);
sc 263 dev/ic/malo.c void malo_stop(struct malo_softc *sc);
sc 276 dev/ic/malo.c void malo_tx_intr(struct malo_softc *sc);
sc 277 dev/ic/malo.c int malo_tx_mgt(struct malo_softc *sc, struct mbuf *m0,
sc 279 dev/ic/malo.c int malo_tx_data(struct malo_softc *sc, struct mbuf *m0,
sc 281 dev/ic/malo.c void malo_tx_setup_desc(struct malo_softc *sc, struct malo_tx_desc *desc,
sc 283 dev/ic/malo.c void malo_rx_intr(struct malo_softc *sc);
sc 284 dev/ic/malo.c int malo_load_bootimg(struct malo_softc *sc);
sc 285 dev/ic/malo.c int malo_load_firmware(struct malo_softc *sc);
sc 287 dev/ic/malo.c int malo_set_wepkey(struct malo_softc *sc);
sc 288 dev/ic/malo.c int malo_set_slot(struct malo_softc *sc);
sc 297 dev/ic/malo.c int malo_cmd_get_spec(struct malo_softc *sc);
sc 298 dev/ic/malo.c int malo_cmd_set_wepkey(struct malo_softc *sc, struct ieee80211_key *k,
sc 300 dev/ic/malo.c int malo_cmd_set_prescan(struct malo_softc *sc);
sc 301 dev/ic/malo.c int malo_cmd_set_postscan(struct malo_softc *sc, uint8_t *macaddr,
sc 303 dev/ic/malo.c int malo_cmd_set_channel(struct malo_softc *sc, uint8_t channel);
sc 304 dev/ic/malo.c int malo_cmd_set_antenna(struct malo_softc *sc, uint16_t antenna_type);
sc 305 dev/ic/malo.c int malo_cmd_set_radio(struct malo_softc *sc, uint16_t mode,
sc 307 dev/ic/malo.c int malo_cmd_set_aid(struct malo_softc *sc, uint8_t *bssid,
sc 309 dev/ic/malo.c int malo_cmd_set_txpower(struct malo_softc *sc, unsigned int powerlevel);
sc 310 dev/ic/malo.c int malo_cmd_set_rts(struct malo_softc *sc, uint32_t threshold);
sc 311 dev/ic/malo.c int malo_cmd_set_slot(struct malo_softc *sc, uint8_t slot);
sc 312 dev/ic/malo.c int malo_cmd_set_rate(struct malo_softc *sc, uint8_t rate);
sc 317 dev/ic/malo.c struct malo_softc *sc = arg;
sc 320 dev/ic/malo.c status = malo_ctl_read4(sc, 0x0c30);
sc 326 dev/ic/malo.c malo_tx_intr(sc);
sc 328 dev/ic/malo.c malo_rx_intr(sc);
sc 330 dev/ic/malo.c struct malo_cmdheader *hdr = sc->sc_cmd_mem;
sc 334 dev/ic/malo.c sc->sc_dev.dv_xname,
sc 340 dev/ic/malo.c sc->sc_dev.dv_xname,
sc 349 dev/ic/malo.c DPRINTF(("%s: unkown interrupt %x\n", sc->sc_dev.dv_xname,
sc 353 dev/ic/malo.c malo_ctl_write4(sc, 0x0c30, 0);
sc 359 dev/ic/malo.c malo_attach(struct malo_softc *sc)
sc 361 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 362 dev/ic/malo.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 366 dev/ic/malo.c timeout_set(&sc->sc_scan_to, malo_next_scan, sc);
sc 369 dev/ic/malo.c malo_alloc_cmd(sc);
sc 370 dev/ic/malo.c malo_alloc_rx_ring(sc, &sc->sc_rxring, MALO_RX_RING_COUNT);
sc 371 dev/ic/malo.c malo_alloc_tx_ring(sc, &sc->sc_txring, MALO_TX_RING_COUNT);
sc 374 dev/ic/malo.c ifp->if_softc = sc;
sc 380 dev/ic/malo.c strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 387 dev/ic/malo.c sc->sc_last_txrate = -1;
sc 410 dev/ic/malo.c ic->ic_myaddr[i] = malo_ctl_read1(sc, 0xa528 + i);
sc 420 dev/ic/malo.c sc->sc_newstate = ic->ic_newstate;
sc 429 dev/ic/malo.c bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
sc 432 dev/ic/malo.c sc->sc_rxtap_len = sizeof(sc->sc_rxtapu);
sc 433 dev/ic/malo.c sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
sc 434 dev/ic/malo.c sc->sc_rxtap.wr_ihdr.it_present = htole32(MALO_RX_RADIOTAP_PRESENT);
sc 436 dev/ic/malo.c sc->sc_txtap_len = sizeof(sc->sc_txtapu);
sc 437 dev/ic/malo.c sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
sc 438 dev/ic/malo.c sc->sc_txtap.wt_ihdr.it_present = htole32(MALO_TX_RADIOTAP_PRESENT);
sc 447 dev/ic/malo.c struct malo_softc *sc = arg;
sc 448 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 452 dev/ic/malo.c timeout_del(&sc->sc_scan_to);
sc 454 dev/ic/malo.c malo_stop(sc);
sc 457 dev/ic/malo.c malo_free_cmd(sc);
sc 458 dev/ic/malo.c malo_free_rx_ring(sc, &sc->sc_rxring);
sc 459 dev/ic/malo.c malo_free_tx_ring(sc, &sc->sc_txring);
sc 465 dev/ic/malo.c malo_alloc_cmd(struct malo_softc *sc)
sc 469 dev/ic/malo.c error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1,
sc 470 dev/ic/malo.c PAGE_SIZE, 0, BUS_DMA_ALLOCNOW, &sc->sc_cmd_dmam);
sc 472 dev/ic/malo.c printf("%s: can not create DMA tag\n", sc->sc_dev.dv_xname);
sc 476 dev/ic/malo.c error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, PAGE_SIZE,
sc 477 dev/ic/malo.c 0, &sc->sc_cmd_dmas, 1, &nsegs, BUS_DMA_WAITOK);
sc 479 dev/ic/malo.c printf("%s: error alloc dma memory\n", sc->sc_dev.dv_xname);
sc 483 dev/ic/malo.c error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cmd_dmas, nsegs,
sc 484 dev/ic/malo.c PAGE_SIZE, (caddr_t *)&sc->sc_cmd_mem, BUS_DMA_WAITOK);
sc 486 dev/ic/malo.c printf("%s: error map dma memory\n", sc->sc_dev.dv_xname);
sc 490 dev/ic/malo.c error = bus_dmamap_load(sc->sc_dmat, sc->sc_cmd_dmam,
sc 491 dev/ic/malo.c sc->sc_cmd_mem, PAGE_SIZE, NULL, BUS_DMA_NOWAIT);
sc 493 dev/ic/malo.c printf("%s: error load dma memory\n", sc->sc_dev.dv_xname);
sc 494 dev/ic/malo.c bus_dmamem_free(sc->sc_dmat, &sc->sc_cmd_dmas, nsegs);
sc 498 dev/ic/malo.c sc->sc_cookie = sc->sc_cmd_mem;
sc 499 dev/ic/malo.c *sc->sc_cookie = htole32(0xaa55aa55);
sc 500 dev/ic/malo.c sc->sc_cmd_mem = sc->sc_cmd_mem + sizeof(uint32_t);
sc 501 dev/ic/malo.c sc->sc_cookie_dmaaddr = sc->sc_cmd_dmam->dm_segs[0].ds_addr;
sc 502 dev/ic/malo.c sc->sc_cmd_dmaaddr = sc->sc_cmd_dmam->dm_segs[0].ds_addr +
sc 509 dev/ic/malo.c malo_free_cmd(struct malo_softc *sc)
sc 511 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 513 dev/ic/malo.c bus_dmamap_unload(sc->sc_dmat, sc->sc_cmd_dmam);
sc 514 dev/ic/malo.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_cookie, PAGE_SIZE);
sc 515 dev/ic/malo.c bus_dmamem_free(sc->sc_dmat, &sc->sc_cmd_dmas, 1);
sc 519 dev/ic/malo.c malo_send_cmd(struct malo_softc *sc, bus_addr_t addr)
sc 521 dev/ic/malo.c malo_ctl_write4(sc, 0x0c10, (uint32_t)addr);
sc 522 dev/ic/malo.c malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE);
sc 523 dev/ic/malo.c malo_ctl_write4(sc, 0x0c18, 2); /* CPU_TRANSFER_CMD */
sc 524 dev/ic/malo.c malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE);
sc 528 dev/ic/malo.c malo_send_cmd_dma(struct malo_softc *sc, bus_addr_t addr)
sc 531 dev/ic/malo.c struct malo_cmdheader *hdr = sc->sc_cmd_mem;
sc 533 dev/ic/malo.c malo_ctl_write4(sc, 0x0c10, (uint32_t)addr);
sc 534 dev/ic/malo.c malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE);
sc 535 dev/ic/malo.c malo_ctl_write4(sc, 0x0c18, 2); /* CPU_TRANSFER_CMD */
sc 536 dev/ic/malo.c malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE);
sc 540 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 553 dev/ic/malo.c malo_alloc_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring, int count)
sc 562 dev/ic/malo.c error = bus_dmamap_create(sc->sc_dmat,
sc 568 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 572 dev/ic/malo.c error = bus_dmamem_alloc(sc->sc_dmat,
sc 577 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 581 dev/ic/malo.c error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
sc 586 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 590 dev/ic/malo.c error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
sc 594 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 605 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 618 dev/ic/malo.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
sc 622 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 629 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 637 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 642 dev/ic/malo.c error = bus_dmamap_load(sc->sc_dmat, data->map,
sc 646 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 656 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
sc 661 dev/ic/malo.c fail: malo_free_rx_ring(sc, ring);
sc 666 dev/ic/malo.c malo_reset_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring)
sc 673 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
sc 680 dev/ic/malo.c malo_free_rx_ring(struct malo_softc *sc, struct malo_rx_ring *ring)
sc 686 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
sc 688 dev/ic/malo.c bus_dmamap_unload(sc->sc_dmat, ring->map);
sc 689 dev/ic/malo.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,
sc 691 dev/ic/malo.c bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
sc 699 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 702 dev/ic/malo.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 707 dev/ic/malo.c bus_dmamap_destroy(sc->sc_dmat, data->map);
sc 714 dev/ic/malo.c malo_alloc_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring,
sc 723 dev/ic/malo.c error = bus_dmamap_create(sc->sc_dmat,
sc 728 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 732 dev/ic/malo.c error = bus_dmamem_alloc(sc->sc_dmat,
sc 737 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 741 dev/ic/malo.c error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
sc 746 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 750 dev/ic/malo.c error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
sc 754 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 765 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 772 dev/ic/malo.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 777 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 786 dev/ic/malo.c fail: malo_free_tx_ring(sc, ring);
sc 791 dev/ic/malo.c malo_reset_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring)
sc 802 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 804 dev/ic/malo.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 818 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
sc 826 dev/ic/malo.c malo_free_tx_ring(struct malo_softc *sc, struct malo_tx_ring *ring)
sc 832 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
sc 834 dev/ic/malo.c bus_dmamap_unload(sc->sc_dmat, ring->map);
sc 835 dev/ic/malo.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,
sc 837 dev/ic/malo.c bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
sc 845 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 848 dev/ic/malo.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 859 dev/ic/malo.c bus_dmamap_destroy(sc->sc_dmat, data->map);
sc 868 dev/ic/malo.c struct malo_softc *sc = ifp->if_softc;
sc 869 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 877 dev/ic/malo.c malo_stop(sc);
sc 880 dev/ic/malo.c if (sc->sc_enable)
sc 881 dev/ic/malo.c sc->sc_enable(sc);
sc 884 dev/ic/malo.c malo_ctl_read4(sc, 0x0c30);
sc 885 dev/ic/malo.c malo_ctl_write4(sc, 0x0c30, 0);
sc 886 dev/ic/malo.c malo_ctl_write4(sc, 0x0c34, 0);
sc 887 dev/ic/malo.c malo_ctl_write4(sc, 0x0c3c, 0);
sc 890 dev/ic/malo.c if ((error = malo_load_bootimg(sc)))
sc 892 dev/ic/malo.c if ((error = malo_load_firmware(sc)))
sc 896 dev/ic/malo.c malo_ctl_write4(sc, 0x0c34, 0x1f);
sc 897 dev/ic/malo.c malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE);
sc 898 dev/ic/malo.c malo_ctl_write4(sc, 0x0c3c, 0x1f);
sc 899 dev/ic/malo.c malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE);
sc 901 dev/ic/malo.c if ((error = malo_cmd_get_spec(sc)))
sc 909 dev/ic/malo.c if ((error = malo_cmd_set_channel(sc, chan))) {
sc 911 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 914 dev/ic/malo.c if ((error = malo_cmd_set_antenna(sc, 1))) {
sc 916 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 919 dev/ic/malo.c if ((error = malo_cmd_set_antenna(sc, 2))) {
sc 921 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 924 dev/ic/malo.c if ((error = malo_cmd_set_radio(sc, 1, 5))) {
sc 926 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 929 dev/ic/malo.c if ((error = malo_cmd_set_txpower(sc, 100))) {
sc 931 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 934 dev/ic/malo.c if ((error = malo_cmd_set_rts(sc, IEEE80211_RTS_MAX))) {
sc 936 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 941 dev/ic/malo.c if (sc->sc_ic.ic_flags & IEEE80211_F_WEPON) {
sc 943 dev/ic/malo.c if (malo_set_wepkey(sc)) {
sc 945 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 964 dev/ic/malo.c sc->sc_dev.dv_xname));
sc 965 dev/ic/malo.c malo_ctl_write4(sc, 0x0c18, (1 << 15));
sc 972 dev/ic/malo.c struct malo_softc *sc = ifp->if_softc;
sc 973 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 996 dev/ic/malo.c malo_stop(sc);
sc 1019 dev/ic/malo.c malo_cmd_set_channel(sc, chan);
sc 1044 dev/ic/malo.c struct malo_softc *sc = ifp->if_softc;
sc 1045 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1049 dev/ic/malo.c DPRINTFN(2, ("%s: %s\n", sc->sc_dev.dv_xname, __func__));
sc 1057 dev/ic/malo.c if (sc->sc_txring.queued >= MALO_TX_RING_COUNT) {
sc 1069 dev/ic/malo.c if (malo_tx_mgt(sc, m0, ni) != 0)
sc 1077 dev/ic/malo.c if (sc->sc_txring.queued >= MALO_TX_RING_COUNT - 1) {
sc 1093 dev/ic/malo.c if (malo_tx_data(sc, m0, ni) != 0) {
sc 1104 dev/ic/malo.c malo_stop(struct malo_softc *sc)
sc 1106 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1113 dev/ic/malo.c malo_ctl_write4(sc, 0x0c18, (1 << 15));
sc 1122 dev/ic/malo.c malo_reset_tx_ring(sc, &sc->sc_txring);
sc 1123 dev/ic/malo.c malo_reset_rx_ring(sc, &sc->sc_rxring);
sc 1126 dev/ic/malo.c sc->sc_last_txrate = -1;
sc 1129 dev/ic/malo.c if (sc->sc_disable)
sc 1130 dev/ic/malo.c sc->sc_disable(sc);
sc 1142 dev/ic/malo.c struct malo_softc *sc = ic->ic_if.if_softc;
sc 1147 dev/ic/malo.c DPRINTFN(2, ("%s: %s\n", sc->sc_dev.dv_xname, __func__));
sc 1150 dev/ic/malo.c timeout_del(&sc->sc_scan_to);
sc 1157 dev/ic/malo.c if (malo_cmd_set_prescan(sc) != 0)
sc 1159 dev/ic/malo.c sc->sc_dev.dv_xname));
sc 1163 dev/ic/malo.c malo_cmd_set_channel(sc, chan);
sc 1165 dev/ic/malo.c timeout_add(&sc->sc_scan_to, hz / 2);
sc 1169 dev/ic/malo.c malo_cmd_set_postscan(sc, ic->ic_myaddr, 1);
sc 1171 dev/ic/malo.c malo_cmd_set_channel(sc, chan);
sc 1176 dev/ic/malo.c malo_cmd_set_radio(sc, 1, 3); /* short preamble */
sc 1178 dev/ic/malo.c malo_cmd_set_radio(sc, 1, 1); /* long preamble */
sc 1180 dev/ic/malo.c malo_cmd_set_aid(sc, ic->ic_bss->ni_bssid,
sc 1185 dev/ic/malo.c malo_cmd_set_rate(sc, 0);
sc 1189 dev/ic/malo.c malo_cmd_set_rate(sc, rate);
sc 1192 dev/ic/malo.c malo_set_slot(sc);
sc 1201 dev/ic/malo.c return (sc->sc_newstate(ic, nstate, arg));
sc 1244 dev/ic/malo.c struct malo_softc *sc = ifp->if_softc;
sc 1245 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1253 dev/ic/malo.c imr->ifm_active |= ieee80211_rate2media(ic, sc->sc_last_txrate,
sc 1335 dev/ic/malo.c struct malo_softc *sc = arg;
sc 1336 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1351 dev/ic/malo.c malo_tx_intr(struct malo_softc *sc)
sc 1353 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1360 dev/ic/malo.c DPRINTFN(2, ("%s: %s\n", sc->sc_dev.dv_xname, __func__));
sc 1362 dev/ic/malo.c stat = sc->sc_txring.stat;
sc 1364 dev/ic/malo.c desc = &sc->sc_txring.desc[sc->sc_txring.stat];
sc 1365 dev/ic/malo.c data = &sc->sc_txring.data[sc->sc_txring.stat];
sc 1390 dev/ic/malo.c sc->sc_last_txrate = malo_chip2rate(desc->datarate);
sc 1393 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 1395 dev/ic/malo.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 1404 dev/ic/malo.c DPRINTFN(2, ("tx done idx=%u\n", sc->sc_txring.stat));
sc 1406 dev/ic/malo.c sc->sc_txring.queued--;
sc 1408 dev/ic/malo.c if (++sc->sc_txring.stat >= sc->sc_txring.count)
sc 1409 dev/ic/malo.c sc->sc_txring.stat = 0;
sc 1410 dev/ic/malo.c if (sc->sc_txring.stat == stat)
sc 1414 dev/ic/malo.c sc->sc_tx_timer = 0;
sc 1420 dev/ic/malo.c malo_tx_mgt(struct malo_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
sc 1422 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1429 dev/ic/malo.c DPRINTFN(2, ("%s: %s\n", sc->sc_dev.dv_xname, __func__));
sc 1431 dev/ic/malo.c desc = &sc->sc_txring.desc[sc->sc_txring.cur];
sc 1432 dev/ic/malo.c data = &sc->sc_txring.data[sc->sc_txring.cur];
sc 1453 dev/ic/malo.c if (sc->sc_drvbpf != NULL) {
sc 1455 dev/ic/malo.c struct malo_tx_radiotap_hdr *tap = &sc->sc_txtap;
sc 1458 dev/ic/malo.c tap->wt_rate = sc->sc_last_txrate;
sc 1463 dev/ic/malo.c mb.m_len = sc->sc_txtap_len;
sc 1468 dev/ic/malo.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 1482 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 1494 dev/ic/malo.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
sc 1498 dev/ic/malo.c sc->sc_dev.dv_xname, error);
sc 1507 dev/ic/malo.c malo_tx_setup_desc(sc, desc, m0->m_pkthdr.len, 0,
sc 1510 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
sc 1512 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_txring.map,
sc 1513 dev/ic/malo.c sc->sc_txring.cur * sizeof(struct malo_tx_desc),
sc 1517 dev/ic/malo.c sc->sc_dev.dv_xname, m0->m_pkthdr.len, sc->sc_txring.cur));
sc 1519 dev/ic/malo.c sc->sc_txring.queued++;
sc 1520 dev/ic/malo.c sc->sc_txring.cur = (sc->sc_txring.cur + 1) % MALO_TX_RING_COUNT;
sc 1523 dev/ic/malo.c malo_ctl_write4(sc, 0x0c18, 1);
sc 1524 dev/ic/malo.c malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE);
sc 1530 dev/ic/malo.c malo_tx_data(struct malo_softc *sc, struct mbuf *m0,
sc 1533 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1541 dev/ic/malo.c DPRINTFN(2, ("%s: %s\n", sc->sc_dev.dv_xname, __func__));
sc 1543 dev/ic/malo.c desc = &sc->sc_txring.desc[sc->sc_txring.cur];
sc 1544 dev/ic/malo.c data = &sc->sc_txring.data[sc->sc_txring.cur];
sc 1565 dev/ic/malo.c if (sc->sc_drvbpf != NULL) {
sc 1567 dev/ic/malo.c struct malo_tx_radiotap_hdr *tap = &sc->sc_txtap;
sc 1570 dev/ic/malo.c tap->wt_rate = sc->sc_last_txrate;
sc 1575 dev/ic/malo.c mb.m_len = sc->sc_txtap_len;
sc 1580 dev/ic/malo.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 1612 dev/ic/malo.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
sc 1616 dev/ic/malo.c sc->sc_dev.dv_xname, error);
sc 1625 dev/ic/malo.c malo_tx_setup_desc(sc, desc, m0->m_pkthdr.len, 1,
sc 1628 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
sc 1630 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_txring.map,
sc 1631 dev/ic/malo.c sc->sc_txring.cur * sizeof(struct malo_tx_desc),
sc 1635 dev/ic/malo.c sc->sc_dev.dv_xname, m0->m_pkthdr.len, sc->sc_txring.cur));
sc 1637 dev/ic/malo.c sc->sc_txring.queued++;
sc 1638 dev/ic/malo.c sc->sc_txring.cur = (sc->sc_txring.cur + 1) % MALO_TX_RING_COUNT;
sc 1641 dev/ic/malo.c malo_ctl_write4(sc, 0x0c18, 1);
sc 1642 dev/ic/malo.c malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE);
sc 1648 dev/ic/malo.c malo_tx_setup_desc(struct malo_softc *sc, struct malo_tx_desc *desc,
sc 1658 dev/ic/malo.c malo_rx_intr(struct malo_softc *sc)
sc 1660 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1670 dev/ic/malo.c rxRdPtr = malo_mem_read4(sc, sc->sc_RxPdRdPtr);
sc 1671 dev/ic/malo.c rxWrPtr = malo_mem_read4(sc, sc->sc_RxPdWrPtr);
sc 1674 dev/ic/malo.c desc = &sc->sc_rxring.desc[sc->sc_rxring.cur];
sc 1675 dev/ic/malo.c data = &sc->sc_rxring.data[sc->sc_rxring.cur];
sc 1677 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rxring.map,
sc 1678 dev/ic/malo.c sc->sc_rxring.cur * sizeof(struct malo_rx_desc),
sc 1684 dev/ic/malo.c sc->sc_rxring.cur, desc->rxctrl, desc->rssi, desc->status,
sc 1705 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 1707 dev/ic/malo.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 1709 dev/ic/malo.c error = bus_dmamap_load(sc->sc_dmat, data->map,
sc 1714 dev/ic/malo.c error = bus_dmamap_load(sc->sc_dmat, data->map,
sc 1719 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 1748 dev/ic/malo.c if (sc->sc_drvbpf != NULL) {
sc 1750 dev/ic/malo.c struct malo_rx_radiotap_hdr *tap = &sc->sc_rxtap;
sc 1761 dev/ic/malo.c mb.m_len = sc->sc_rxtap_len;
sc 1766 dev/ic/malo.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
sc 1783 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rxring.map,
sc 1784 dev/ic/malo.c sc->sc_rxring.cur * sizeof(struct malo_rx_desc),
sc 1787 dev/ic/malo.c sc->sc_rxring.cur = (sc->sc_rxring.cur + 1) %
sc 1791 dev/ic/malo.c malo_mem_write4(sc, sc->sc_RxPdRdPtr, rxRdPtr);
sc 1802 dev/ic/malo.c malo_load_bootimg(struct malo_softc *sc)
sc 1812 dev/ic/malo.c sc->sc_dev.dv_xname, error, name);
sc 1821 dev/ic/malo.c DPRINTF(("%s: loading boot firmware\n", sc->sc_dev.dv_xname));
sc 1822 dev/ic/malo.c malo_mem_write2(sc, 0xbef8, 0x001);
sc 1823 dev/ic/malo.c malo_mem_write2(sc, 0xbefa, size);
sc 1824 dev/ic/malo.c malo_mem_write4(sc, 0xbefc, 0);
sc 1826 dev/ic/malo.c bus_space_write_region_1(sc->sc_mem1_bt, sc->sc_mem1_bh, 0xbf00,
sc 1834 dev/ic/malo.c malo_send_cmd(sc, 0xc000bef8);
sc 1839 dev/ic/malo.c malo_ctl_barrier(sc, BUS_SPACE_BARRIER_READ);
sc 1840 dev/ic/malo.c if (malo_ctl_read4(sc, 0x0c14) == 0x5)
sc 1845 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 1852 dev/ic/malo.c malo_mem_write2(sc, 0xbef8, 0x001);
sc 1853 dev/ic/malo.c malo_mem_write2(sc, 0xbefa, 0);
sc 1854 dev/ic/malo.c malo_mem_write4(sc, 0xbefc, 0);
sc 1855 dev/ic/malo.c malo_send_cmd(sc, 0xc000bef8);
sc 1857 dev/ic/malo.c DPRINTF(("%s: boot firmware loaded\n", sc->sc_dev.dv_xname));
sc 1863 dev/ic/malo.c malo_load_firmware(struct malo_softc *sc)
sc 1875 dev/ic/malo.c sc->sc_dev.dv_xname, error, name);
sc 1879 dev/ic/malo.c DPRINTF(("%s: uploading firmware\n", sc->sc_dev.dv_xname));
sc 1881 dev/ic/malo.c hdr = sc->sc_cmd_mem;
sc 1894 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 1896 dev/ic/malo.c malo_send_cmd(sc, sc->sc_cmd_dmaaddr);
sc 1897 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 1903 dev/ic/malo.c DPRINTF(("%s: firmware upload finished\n", sc->sc_dev.dv_xname));
sc 1914 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 1916 dev/ic/malo.c malo_send_cmd(sc, sc->sc_cmd_dmaaddr);
sc 1917 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 1921 dev/ic/malo.c DPRINTF(("%s: loading firmware\n", sc->sc_dev.dv_xname));
sc 1925 dev/ic/malo.c malo_ctl_write4(sc, 0x0c10, 0x5a);
sc 1927 dev/ic/malo.c malo_ctl_barrier(sc, BUS_SPACE_BARRIER_WRITE |
sc 1929 dev/ic/malo.c if (malo_ctl_read4(sc, 0x0c14) == 0xf0f1f2f4)
sc 1933 dev/ic/malo.c printf("%s: timeout at firmware load!\n", sc->sc_dev.dv_xname);
sc 1937 dev/ic/malo.c DPRINTF(("%s: firmware loaded\n", sc->sc_dev.dv_xname));
sc 1943 dev/ic/malo.c malo_set_wepkey(struct malo_softc *sc)
sc 1945 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1954 dev/ic/malo.c if (malo_cmd_set_wepkey(sc, k, i))
sc 1962 dev/ic/malo.c malo_set_slot(struct malo_softc *sc)
sc 1964 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1968 dev/ic/malo.c if (malo_cmd_set_slot(sc, 1)) {
sc 1970 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 1975 dev/ic/malo.c if (malo_cmd_set_slot(sc, 0)) {
sc 1977 dev/ic/malo.c sc->sc_dev.dv_xname);
sc 1988 dev/ic/malo.c struct malo_softc *sc = ic->ic_if.if_softc;
sc 1990 dev/ic/malo.c malo_set_slot(sc);
sc 2082 dev/ic/malo.c malo_cmd_get_spec(struct malo_softc *sc)
sc 2084 dev/ic/malo.c struct malo_cmdheader *hdr = sc->sc_cmd_mem;
sc 2095 dev/ic/malo.c spec->CookiePtr = htole32(sc->sc_cookie_dmaaddr);
sc 2097 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 2100 dev/ic/malo.c if (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr) != 0)
sc 2105 dev/ic/malo.c "#Ant %d\n", sc->sc_dev.dv_xname, htole16(spec->HwVersion),
sc 2111 dev/ic/malo.c malo_mem_write4(sc, letoh32(spec->RxPdRdPtr) & 0xffff,
sc 2112 dev/ic/malo.c sc->sc_rxring.physaddr);
sc 2113 dev/ic/malo.c malo_mem_write4(sc, letoh32(spec->RxPdWrPtr) & 0xffff,
sc 2114 dev/ic/malo.c sc->sc_rxring.physaddr);
sc 2115 dev/ic/malo.c malo_mem_write4(sc, letoh32(spec->WcbBase0) & 0xffff,
sc 2116 dev/ic/malo.c sc->sc_txring.physaddr);
sc 2119 dev/ic/malo.c sc->sc_RxPdRdPtr = letoh32(spec->RxPdRdPtr) & 0xffff;
sc 2120 dev/ic/malo.c sc->sc_RxPdWrPtr = letoh32(spec->RxPdWrPtr) & 0xffff;
sc 2126 dev/ic/malo.c malo_cmd_set_wepkey(struct malo_softc *sc, struct ieee80211_key *k,
sc 2129 dev/ic/malo.c struct malo_cmdheader *hdr = sc->sc_cmd_mem;
sc 2145 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 2148 dev/ic/malo.c return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr));
sc 2152 dev/ic/malo.c malo_cmd_set_prescan(struct malo_softc *sc)
sc 2154 dev/ic/malo.c struct malo_cmdheader *hdr = sc->sc_cmd_mem;
sc 2161 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 2164 dev/ic/malo.c return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr));
sc 2168 dev/ic/malo.c malo_cmd_set_postscan(struct malo_softc *sc, uint8_t *macaddr, uint8_t ibsson)
sc 2170 dev/ic/malo.c struct malo_cmdheader *hdr = sc->sc_cmd_mem;
sc 2183 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 2186 dev/ic/malo.c return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr));
sc 2190 dev/ic/malo.c malo_cmd_set_channel(struct malo_softc *sc, uint8_t channel)
sc 2192 dev/ic/malo.c struct malo_cmdheader *hdr = sc->sc_cmd_mem;
sc 2205 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 2208 dev/ic/malo.c return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr));
sc 2212 dev/ic/malo.c malo_cmd_set_antenna(struct malo_softc *sc, uint16_t antenna)
sc 2214 dev/ic/malo.c struct malo_cmdheader *hdr = sc->sc_cmd_mem;
sc 2230 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 2233 dev/ic/malo.c return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr));
sc 2237 dev/ic/malo.c malo_cmd_set_radio(struct malo_softc *sc, uint16_t enable,
sc 2240 dev/ic/malo.c struct malo_cmdheader *hdr = sc->sc_cmd_mem;
sc 2254 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 2257 dev/ic/malo.c return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr));
sc 2261 dev/ic/malo.c malo_cmd_set_aid(struct malo_softc *sc, uint8_t *bssid, uint16_t associd)
sc 2263 dev/ic/malo.c struct malo_cmdheader *hdr = sc->sc_cmd_mem;
sc 2276 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 2279 dev/ic/malo.c return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr));
sc 2283 dev/ic/malo.c malo_cmd_set_txpower(struct malo_softc *sc, unsigned int powerlevel)
sc 2285 dev/ic/malo.c struct malo_cmdheader *hdr = sc->sc_cmd_mem;
sc 2303 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 2306 dev/ic/malo.c return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr));
sc 2310 dev/ic/malo.c malo_cmd_set_rts(struct malo_softc *sc, uint32_t threshold)
sc 2312 dev/ic/malo.c struct malo_cmdheader *hdr = sc->sc_cmd_mem;
sc 2321 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 2324 dev/ic/malo.c return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr));
sc 2328 dev/ic/malo.c malo_cmd_set_slot(struct malo_softc *sc, uint8_t slot)
sc 2330 dev/ic/malo.c struct malo_cmdheader *hdr = sc->sc_cmd_mem;
sc 2343 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 2346 dev/ic/malo.c return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr));
sc 2350 dev/ic/malo.c malo_cmd_set_rate(struct malo_softc *sc, uint8_t rate)
sc 2352 dev/ic/malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 2353 dev/ic/malo.c struct malo_cmdheader *hdr = sc->sc_cmd_mem;
sc 2396 dev/ic/malo.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cmd_dmam, 0, PAGE_SIZE,
sc 2399 dev/ic/malo.c return (malo_send_cmd_dma(sc, sc->sc_cmd_dmaaddr));
sc 130 dev/ic/malo.h int malo_attach(struct malo_softc *sc);
sc 151 dev/ic/mc146818reg.h u_int mc146818_read(void *sc, u_int reg);
sc 152 dev/ic/mc146818reg.h void mc146818_write(void *sc, u_int reg, u_int datum);
sc 163 dev/ic/mc146818reg.h #define MC146818_GETTOD(sc, regs) \
sc 168 dev/ic/mc146818reg.h while (mc146818_read(sc, MC_REGA) & MC_REGA_UIP) \
sc 173 dev/ic/mc146818reg.h (*regs)[i] = mc146818_read(sc, i); \
sc 180 dev/ic/mc146818reg.h #define MC146818_PUTTOD(sc, regs) \
sc 185 dev/ic/mc146818reg.h mc146818_write(sc, MC_REGB, \
sc 186 dev/ic/mc146818reg.h mc146818_read(sc, MC_REGB) | MC_REGB_SET); \
sc 190 dev/ic/mc146818reg.h mc146818_write(sc, i, (*regs)[i]); \
sc 193 dev/ic/mc146818reg.h mc146818_write(sc, MC_REGB, \
sc 194 dev/ic/mc146818reg.h mc146818_read(sc, MC_REGB) & ~MC_REGB_SET); \
sc 104 dev/ic/mfi.c int mfi_ioctl_blink(struct mfi_softc *sc, struct bioc_blink *);
sc 114 dev/ic/mfi.c mfi_get_ccb(struct mfi_softc *sc)
sc 120 dev/ic/mfi.c ccb = TAILQ_FIRST(&sc->sc_ccb_freeq);
sc 122 dev/ic/mfi.c TAILQ_REMOVE(&sc->sc_ccb_freeq, ccb, ccb_link);
sc 127 dev/ic/mfi.c DNPRINTF(MFI_D_CCB, "%s: mfi_get_ccb: %p\n", DEVNAME(sc), ccb);
sc 135 dev/ic/mfi.c struct mfi_softc *sc = ccb->ccb_sc;
sc 138 dev/ic/mfi.c DNPRINTF(MFI_D_CCB, "%s: mfi_put_ccb: %p\n", DEVNAME(sc), ccb);
sc 151 dev/ic/mfi.c TAILQ_INSERT_TAIL(&sc->sc_ccb_freeq, ccb, ccb_link);
sc 156 dev/ic/mfi.c mfi_init_ccb(struct mfi_softc *sc)
sc 162 dev/ic/mfi.c DNPRINTF(MFI_D_CCB, "%s: mfi_init_ccb\n", DEVNAME(sc));
sc 164 dev/ic/mfi.c sc->sc_ccb = malloc(sizeof(struct mfi_ccb) * sc->sc_max_cmds,
sc 166 dev/ic/mfi.c memset(sc->sc_ccb, 0, sizeof(struct mfi_ccb) * sc->sc_max_cmds);
sc 168 dev/ic/mfi.c for (i = 0; i < sc->sc_max_cmds; i++) {
sc 169 dev/ic/mfi.c ccb = &sc->sc_ccb[i];
sc 171 dev/ic/mfi.c ccb->ccb_sc = sc;
sc 175 dev/ic/mfi.c (MFIMEM_KVA(sc->sc_frames) + sc->sc_frames_size * i);
sc 177 dev/ic/mfi.c MFIMEM_DVA(sc->sc_frames) + sc->sc_frames_size * i;
sc 182 dev/ic/mfi.c (MFIMEM_KVA(sc->sc_sense) + MFI_SENSE_SIZE * i);
sc 184 dev/ic/mfi.c (MFIMEM_DVA(sc->sc_sense) + MFI_SENSE_SIZE * i);
sc 187 dev/ic/mfi.c error = bus_dmamap_create(sc->sc_dmat,
sc 188 dev/ic/mfi.c MAXPHYS, sc->sc_max_sgl, MAXPHYS, 0,
sc 192 dev/ic/mfi.c DEVNAME(sc), error);
sc 211 dev/ic/mfi.c ccb = &sc->sc_ccb[i];
sc 212 dev/ic/mfi.c bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap);
sc 216 dev/ic/mfi.c free(sc->sc_ccb, M_DEVBUF);
sc 222 dev/ic/mfi.c mfi_read(struct mfi_softc *sc, bus_size_t r)
sc 226 dev/ic/mfi.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
sc 228 dev/ic/mfi.c rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, r);
sc 230 dev/ic/mfi.c DNPRINTF(MFI_D_RW, "%s: mr 0x%x 0x08%x ", DEVNAME(sc), r, rv);
sc 235 dev/ic/mfi.c mfi_write(struct mfi_softc *sc, bus_size_t r, uint32_t v)
sc 237 dev/ic/mfi.c DNPRINTF(MFI_D_RW, "%s: mw 0x%x 0x%08x", DEVNAME(sc), r, v);
sc 239 dev/ic/mfi.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
sc 240 dev/ic/mfi.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
sc 245 dev/ic/mfi.c mfi_allocmem(struct mfi_softc *sc, size_t size)
sc 250 dev/ic/mfi.c DNPRINTF(MFI_D_MEM, "%s: mfi_allocmem: %d\n", DEVNAME(sc),
sc 260 dev/ic/mfi.c if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 264 dev/ic/mfi.c if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &mm->am_seg, 1,
sc 268 dev/ic/mfi.c if (bus_dmamem_map(sc->sc_dmat, &mm->am_seg, nsegs, size, &mm->am_kva,
sc 272 dev/ic/mfi.c if (bus_dmamap_load(sc->sc_dmat, mm->am_map, mm->am_kva, size, NULL,
sc 283 dev/ic/mfi.c bus_dmamem_unmap(sc->sc_dmat, mm->am_kva, size);
sc 285 dev/ic/mfi.c bus_dmamem_free(sc->sc_dmat, &mm->am_seg, 1);
sc 287 dev/ic/mfi.c bus_dmamap_destroy(sc->sc_dmat, mm->am_map);
sc 295 dev/ic/mfi.c mfi_freemem(struct mfi_softc *sc, struct mfi_mem *mm)
sc 297 dev/ic/mfi.c DNPRINTF(MFI_D_MEM, "%s: mfi_freemem: %p\n", DEVNAME(sc), mm);
sc 299 dev/ic/mfi.c bus_dmamap_unload(sc->sc_dmat, mm->am_map);
sc 300 dev/ic/mfi.c bus_dmamem_unmap(sc->sc_dmat, mm->am_kva, mm->am_size);
sc 301 dev/ic/mfi.c bus_dmamem_free(sc->sc_dmat, &mm->am_seg, 1);
sc 302 dev/ic/mfi.c bus_dmamap_destroy(sc->sc_dmat, mm->am_map);
sc 307 dev/ic/mfi.c mfi_transition_firmware(struct mfi_softc *sc)
sc 312 dev/ic/mfi.c fw_state = mfi_read(sc, MFI_OMSG0) & MFI_STATE_MASK;
sc 314 dev/ic/mfi.c DNPRINTF(MFI_D_CMD, "%s: mfi_transition_firmware: %#x\n", DEVNAME(sc),
sc 320 dev/ic/mfi.c DEVNAME(sc));
sc 324 dev/ic/mfi.c printf("%s: firmware fault\n", DEVNAME(sc));
sc 327 dev/ic/mfi.c mfi_write(sc, MFI_IDB, MFI_INIT_CLEAR_HANDSHAKE);
sc 331 dev/ic/mfi.c mfi_write(sc, MFI_IDB, MFI_INIT_READY);
sc 345 dev/ic/mfi.c DEVNAME(sc), fw_state);
sc 349 dev/ic/mfi.c fw_state = mfi_read(sc, MFI_OMSG0) & MFI_STATE_MASK;
sc 357 dev/ic/mfi.c DEVNAME(sc), fw_state);
sc 366 dev/ic/mfi.c mfi_initialize_firmware(struct mfi_softc *sc)
sc 372 dev/ic/mfi.c DNPRINTF(MFI_D_MISC, "%s: mfi_initialize_firmware\n", DEVNAME(sc));
sc 374 dev/ic/mfi.c if ((ccb = mfi_get_ccb(sc)) == NULL)
sc 381 dev/ic/mfi.c qinfo->miq_rq_entries = sc->sc_max_cmds + 1;
sc 382 dev/ic/mfi.c qinfo->miq_rq_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) +
sc 384 dev/ic/mfi.c qinfo->miq_pi_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) +
sc 386 dev/ic/mfi.c qinfo->miq_ci_addr_lo = htole32(MFIMEM_DVA(sc->sc_pcq) +
sc 394 dev/ic/mfi.c DEVNAME(sc),
sc 399 dev/ic/mfi.c printf("%s: mfi_initialize_firmware failed\n", DEVNAME(sc));
sc 409 dev/ic/mfi.c mfi_get_info(struct mfi_softc *sc)
sc 414 dev/ic/mfi.c DNPRINTF(MFI_D_MISC, "%s: mfi_get_info\n", DEVNAME(sc));
sc 416 dev/ic/mfi.c if (mfi_mgmt(sc, MR_DCMD_CTRL_GET_INFO, MFI_DATA_IN,
sc 417 dev/ic/mfi.c sizeof(sc->sc_info), &sc->sc_info, NULL))
sc 422 dev/ic/mfi.c for (i = 0; i < sc->sc_info.mci_image_component_count; i++) {
sc 424 dev/ic/mfi.c DEVNAME(sc),
sc 425 dev/ic/mfi.c sc->sc_info.mci_image_component[i].mic_name,
sc 426 dev/ic/mfi.c sc->sc_info.mci_image_component[i].mic_version,
sc 427 dev/ic/mfi.c sc->sc_info.mci_image_component[i].mic_build_date,
sc 428 dev/ic/mfi.c sc->sc_info.mci_image_component[i].mic_build_time);
sc 431 dev/ic/mfi.c for (i = 0; i < sc->sc_info.mci_pending_image_component_count; i++) {
sc 433 dev/ic/mfi.c DEVNAME(sc),
sc 434 dev/ic/mfi.c sc->sc_info.mci_pending_image_component[i].mic_name,
sc 435 dev/ic/mfi.c sc->sc_info.mci_pending_image_component[i].mic_version,
sc 436 dev/ic/mfi.c sc->sc_info.mci_pending_image_component[i].mic_build_date,
sc 437 dev/ic/mfi.c sc->sc_info.mci_pending_image_component[i].mic_build_time);
sc 441 dev/ic/mfi.c DEVNAME(sc),
sc 442 dev/ic/mfi.c sc->sc_info.mci_max_arms,
sc 443 dev/ic/mfi.c sc->sc_info.mci_max_spans,
sc 444 dev/ic/mfi.c sc->sc_info.mci_max_arrays,
sc 445 dev/ic/mfi.c sc->sc_info.mci_max_lds,
sc 446 dev/ic/mfi.c sc->sc_info.mci_product_name);
sc 449 dev/ic/mfi.c DEVNAME(sc),
sc 450 dev/ic/mfi.c sc->sc_info.mci_serial_number,
sc 451 dev/ic/mfi.c sc->sc_info.mci_hw_present,
sc 452 dev/ic/mfi.c sc->sc_info.mci_current_fw_time,
sc 453 dev/ic/mfi.c sc->sc_info.mci_max_cmds,
sc 454 dev/ic/mfi.c sc->sc_info.mci_max_sg_elements);
sc 457 dev/ic/mfi.c DEVNAME(sc),
sc 458 dev/ic/mfi.c sc->sc_info.mci_max_request_size,
sc 459 dev/ic/mfi.c sc->sc_info.mci_lds_present,
sc 460 dev/ic/mfi.c sc->sc_info.mci_lds_degraded,
sc 461 dev/ic/mfi.c sc->sc_info.mci_lds_offline,
sc 462 dev/ic/mfi.c sc->sc_info.mci_pd_present);
sc 465 dev/ic/mfi.c DEVNAME(sc),
sc 466 dev/ic/mfi.c sc->sc_info.mci_pd_disks_present,
sc 467 dev/ic/mfi.c sc->sc_info.mci_pd_disks_pred_failure,
sc 468 dev/ic/mfi.c sc->sc_info.mci_pd_disks_failed);
sc 471 dev/ic/mfi.c DEVNAME(sc),
sc 472 dev/ic/mfi.c sc->sc_info.mci_nvram_size,
sc 473 dev/ic/mfi.c sc->sc_info.mci_memory_size,
sc 474 dev/ic/mfi.c sc->sc_info.mci_flash_size);
sc 477 dev/ic/mfi.c DEVNAME(sc),
sc 478 dev/ic/mfi.c sc->sc_info.mci_ram_correctable_errors,
sc 479 dev/ic/mfi.c sc->sc_info.mci_ram_uncorrectable_errors,
sc 480 dev/ic/mfi.c sc->sc_info.mci_cluster_allowed,
sc 481 dev/ic/mfi.c sc->sc_info.mci_cluster_active);
sc 484 dev/ic/mfi.c DEVNAME(sc),
sc 485 dev/ic/mfi.c sc->sc_info.mci_max_strips_per_io,
sc 486 dev/ic/mfi.c sc->sc_info.mci_raid_levels,
sc 487 dev/ic/mfi.c sc->sc_info.mci_adapter_ops,
sc 488 dev/ic/mfi.c sc->sc_info.mci_ld_ops);
sc 491 dev/ic/mfi.c DEVNAME(sc),
sc 492 dev/ic/mfi.c sc->sc_info.mci_stripe_sz_ops.min,
sc 493 dev/ic/mfi.c sc->sc_info.mci_stripe_sz_ops.max,
sc 494 dev/ic/mfi.c sc->sc_info.mci_pd_ops,
sc 495 dev/ic/mfi.c sc->sc_info.mci_pd_mix_support);
sc 498 dev/ic/mfi.c DEVNAME(sc),
sc 499 dev/ic/mfi.c sc->sc_info.mci_ecc_bucket_count,
sc 500 dev/ic/mfi.c sc->sc_info.mci_package_version);
sc 503 dev/ic/mfi.c DEVNAME(sc),
sc 504 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_seq_num,
sc 505 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_pred_fail_poll_interval,
sc 506 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_intr_throttle_cnt,
sc 507 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_intr_throttle_timeout);
sc 510 dev/ic/mfi.c DEVNAME(sc),
sc 511 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_rebuild_rate,
sc 512 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_patrol_read_rate,
sc 513 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_bgi_rate,
sc 514 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_cc_rate);
sc 517 dev/ic/mfi.c DEVNAME(sc),
sc 518 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_recon_rate,
sc 519 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_cache_flush_interval,
sc 520 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_spinup_drv_cnt,
sc 521 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_spinup_delay,
sc 522 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_cluster_enable);
sc 525 dev/ic/mfi.c DEVNAME(sc),
sc 526 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_coercion_mode,
sc 527 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_alarm_enable,
sc 528 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_disable_auto_rebuild,
sc 529 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_disable_battery_warn,
sc 530 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_ecc_bucket_size);
sc 533 dev/ic/mfi.c DEVNAME(sc),
sc 534 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_ecc_bucket_leak_rate,
sc 535 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_restore_hotspare_on_insertion,
sc 536 dev/ic/mfi.c sc->sc_info.mci_properties.mcp_expose_encl_devices);
sc 539 dev/ic/mfi.c DEVNAME(sc),
sc 540 dev/ic/mfi.c sc->sc_info.mci_pci.mip_vendor,
sc 541 dev/ic/mfi.c sc->sc_info.mci_pci.mip_device,
sc 542 dev/ic/mfi.c sc->sc_info.mci_pci.mip_subvendor,
sc 543 dev/ic/mfi.c sc->sc_info.mci_pci.mip_subdevice);
sc 546 dev/ic/mfi.c DEVNAME(sc),
sc 547 dev/ic/mfi.c sc->sc_info.mci_host.mih_type,
sc 548 dev/ic/mfi.c sc->sc_info.mci_host.mih_port_count);
sc 551 dev/ic/mfi.c printf("%.0llx ", sc->sc_info.mci_host.mih_port_addr[i]);
sc 555 dev/ic/mfi.c DEVNAME(sc),
sc 556 dev/ic/mfi.c sc->sc_info.mci_device.mid_type,
sc 557 dev/ic/mfi.c sc->sc_info.mci_device.mid_port_count);
sc 560 dev/ic/mfi.c printf("%.0llx ", sc->sc_info.mci_device.mid_port_addr[i]);
sc 579 dev/ic/mfi.c mfi_attach(struct mfi_softc *sc)
sc 585 dev/ic/mfi.c DNPRINTF(MFI_D_MISC, "%s: mfi_attach\n", DEVNAME(sc));
sc 587 dev/ic/mfi.c if (mfi_transition_firmware(sc))
sc 590 dev/ic/mfi.c TAILQ_INIT(&sc->sc_ccb_freeq);
sc 592 dev/ic/mfi.c rw_init(&sc->sc_lock, "mfi_lock");
sc 594 dev/ic/mfi.c status = mfi_read(sc, MFI_OMSG0);
sc 595 dev/ic/mfi.c sc->sc_max_cmds = status & MFI_STATE_MAXCMD_MASK;
sc 596 dev/ic/mfi.c sc->sc_max_sgl = (status & MFI_STATE_MAXSGL_MASK) >> 16;
sc 598 dev/ic/mfi.c DEVNAME(sc), sc->sc_max_cmds, sc->sc_max_sgl);
sc 601 dev/ic/mfi.c sc->sc_pcq = mfi_allocmem(sc, (sizeof(uint32_t) * sc->sc_max_cmds) +
sc 603 dev/ic/mfi.c if (sc->sc_pcq == NULL) {
sc 605 dev/ic/mfi.c DEVNAME(sc));
sc 611 dev/ic/mfi.c frames = (sizeof(struct mfi_sg32) * sc->sc_max_sgl +
sc 613 dev/ic/mfi.c sc->sc_frames_size = frames * MFI_FRAME_SIZE;
sc 614 dev/ic/mfi.c sc->sc_frames = mfi_allocmem(sc, sc->sc_frames_size * sc->sc_max_cmds);
sc 615 dev/ic/mfi.c if (sc->sc_frames == NULL) {
sc 616 dev/ic/mfi.c printf("%s: unable to allocate frame memory\n", DEVNAME(sc));
sc 620 dev/ic/mfi.c if (MFIMEM_DVA(sc->sc_frames) & 0x3f) {
sc 622 dev/ic/mfi.c DEVNAME(sc), MFIMEM_DVA(sc->sc_frames));
sc 627 dev/ic/mfi.c sc->sc_sense = mfi_allocmem(sc, sc->sc_max_cmds * MFI_SENSE_SIZE);
sc 628 dev/ic/mfi.c if (sc->sc_sense == NULL) {
sc 629 dev/ic/mfi.c printf("%s: unable to allocate sense memory\n", DEVNAME(sc));
sc 634 dev/ic/mfi.c if (mfi_init_ccb(sc)) {
sc 635 dev/ic/mfi.c printf("%s: could not init ccb list\n", DEVNAME(sc));
sc 640 dev/ic/mfi.c if (mfi_initialize_firmware(sc)) {
sc 641 dev/ic/mfi.c printf("%s: could not initialize firmware\n", DEVNAME(sc));
sc 645 dev/ic/mfi.c if (mfi_get_info(sc)) {
sc 647 dev/ic/mfi.c DEVNAME(sc));
sc 652 dev/ic/mfi.c DEVNAME(sc),
sc 653 dev/ic/mfi.c sc->sc_info.mci_lds_present,
sc 654 dev/ic/mfi.c sc->sc_info.mci_package_version,
sc 655 dev/ic/mfi.c sc->sc_info.mci_memory_size);
sc 657 dev/ic/mfi.c sc->sc_ld_cnt = sc->sc_info.mci_lds_present;
sc 658 dev/ic/mfi.c sc->sc_max_ld = sc->sc_ld_cnt;
sc 659 dev/ic/mfi.c for (i = 0; i < sc->sc_ld_cnt; i++)
sc 660 dev/ic/mfi.c sc->sc_ld[i].ld_present = 1;
sc 662 dev/ic/mfi.c if (sc->sc_ld_cnt)
sc 663 dev/ic/mfi.c sc->sc_link.openings = sc->sc_max_cmds / sc->sc_ld_cnt;
sc 665 dev/ic/mfi.c sc->sc_link.openings = sc->sc_max_cmds;
sc 667 dev/ic/mfi.c sc->sc_link.device = &mfi_dev;
sc 668 dev/ic/mfi.c sc->sc_link.adapter_softc = sc;
sc 669 dev/ic/mfi.c sc->sc_link.adapter = &mfi_switch;
sc 670 dev/ic/mfi.c sc->sc_link.adapter_target = MFI_MAX_LD;
sc 671 dev/ic/mfi.c sc->sc_link.adapter_buswidth = sc->sc_max_ld;
sc 674 dev/ic/mfi.c saa.saa_sc_link = &sc->sc_link;
sc 676 dev/ic/mfi.c config_found(&sc->sc_dev, &saa, scsiprint);
sc 679 dev/ic/mfi.c mfi_write(sc, MFI_OMSK, MFI_ENABLE_INTR);
sc 682 dev/ic/mfi.c if (bio_register(&sc->sc_dev, mfi_ioctl) != 0)
sc 683 dev/ic/mfi.c panic("%s: controller registration failed", DEVNAME(sc));
sc 685 dev/ic/mfi.c sc->sc_ioctl = mfi_ioctl;
sc 688 dev/ic/mfi.c if (mfi_create_sensors(sc) != 0)
sc 689 dev/ic/mfi.c printf("%s: unable to create sensors\n", DEVNAME(sc));
sc 695 dev/ic/mfi.c mfi_freemem(sc, sc->sc_sense);
sc 697 dev/ic/mfi.c mfi_freemem(sc, sc->sc_frames);
sc 699 dev/ic/mfi.c mfi_freemem(sc, sc->sc_pcq);
sc 748 dev/ic/mfi.c struct mfi_softc *sc = arg;
sc 754 dev/ic/mfi.c status = mfi_read(sc, MFI_OSTS);
sc 758 dev/ic/mfi.c mfi_write(sc, MFI_OSTS, status);
sc 760 dev/ic/mfi.c DNPRINTF(MFI_D_INTR, "%s: mfi_intr %#x %#x\n", DEVNAME(sc), sc, pcq);
sc 762 dev/ic/mfi.c pcq = MFIMEM_KVA(sc->sc_pcq);
sc 768 dev/ic/mfi.c DEVNAME(sc), producer, consumer);
sc 774 dev/ic/mfi.c DEVNAME(sc), producer, consumer);
sc 777 dev/ic/mfi.c ccb = &sc->sc_ccb[ctx];
sc 779 dev/ic/mfi.c DEVNAME(sc), ctx);
sc 785 dev/ic/mfi.c if (consumer == (sc->sc_max_cmds + 1))
sc 843 dev/ic/mfi.c struct mfi_softc *sc = ccb->ccb_sc;
sc 847 dev/ic/mfi.c DEVNAME(sc), ccb, ccb->ccb_frame);
sc 851 dev/ic/mfi.c DEVNAME(sc));
sc 852 dev/ic/mfi.c bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
sc 857 dev/ic/mfi.c bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap);
sc 863 dev/ic/mfi.c DEVNAME(sc), hdr->mfh_cmd_status);
sc 868 dev/ic/mfi.c DEVNAME(sc), hdr->mfh_scsi_status,
sc 935 dev/ic/mfi.c struct mfi_softc *sc = link->adapter_softc;
sc 945 dev/ic/mfi.c DEVNAME(sc), xs->cmd->opcode);
sc 947 dev/ic/mfi.c if (target >= MFI_MAX_LD || !sc->sc_ld[target].ld_present ||
sc 950 dev/ic/mfi.c DEVNAME(sc), target);
sc 954 dev/ic/mfi.c if ((ccb = mfi_get_ccb(sc)) == NULL) {
sc 955 dev/ic/mfi.c DNPRINTF(MFI_D_CMD, "%s: mfi_scsi_cmd no ccb\n", DEVNAME(sc));
sc 989 dev/ic/mfi.c if (mfi_mgmt(sc, MR_DCMD_CTRL_CACHE_FLUSH, MFI_DATA_NONE,
sc 1000 dev/ic/mfi.c strlcpy(sc->sc_ld[target].ld_dev, dev->dv_xname,
sc 1001 dev/ic/mfi.c sizeof(sc->sc_ld[target].ld_dev));
sc 1012 dev/ic/mfi.c DNPRINTF(MFI_D_CMD, "%s: start io %d\n", DEVNAME(sc), target);
sc 1018 dev/ic/mfi.c DEVNAME(sc));
sc 1030 dev/ic/mfi.c DEVNAME(sc), ccb->ccb_dmamap->dm_nsegs);
sc 1038 dev/ic/mfi.c DNPRINTF(MFI_D_DMA, "%s: mfi_scsi_cmd queued %d\n", DEVNAME(sc),
sc 1053 dev/ic/mfi.c struct mfi_softc *sc = ccb->ccb_sc;
sc 1059 dev/ic/mfi.c DNPRINTF(MFI_D_DMA, "%s: mfi_create_sgl %#x\n", DEVNAME(sc),
sc 1065 dev/ic/mfi.c error = bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap,
sc 1070 dev/ic/mfi.c sc->sc_max_sgl);
sc 1083 dev/ic/mfi.c DEVNAME(sc), sgl->sg32[i].addr, sgl->sg32[i].len);
sc 1088 dev/ic/mfi.c bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
sc 1092 dev/ic/mfi.c bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
sc 1104 dev/ic/mfi.c DEVNAME(sc),
sc 1107 dev/ic/mfi.c sc->sc_frames_size,
sc 1115 dev/ic/mfi.c mfi_mgmt(struct mfi_softc *sc, uint32_t opc, uint32_t dir, uint32_t len,
sc 1122 dev/ic/mfi.c DNPRINTF(MFI_D_MISC, "%s: mfi_mgmt %#x\n", DEVNAME(sc), opc);
sc 1124 dev/ic/mfi.c if ((ccb = mfi_get_ccb(sc)) == NULL)
sc 1159 dev/ic/mfi.c DNPRINTF(MFI_D_MISC, "%s: mfi_mgmt sleeping\n", DEVNAME(sc));
sc 1177 dev/ic/mfi.c struct mfi_softc *sc = ccb->ccb_sc;
sc 1181 dev/ic/mfi.c DEVNAME(sc), ccb, ccb->ccb_frame);
sc 1185 dev/ic/mfi.c DEVNAME(sc));
sc 1186 dev/ic/mfi.c bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
sc 1191 dev/ic/mfi.c bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap);
sc 1207 dev/ic/mfi.c struct mfi_softc *sc = (struct mfi_softc *)link->adapter_softc;
sc 1209 dev/ic/mfi.c DNPRINTF(MFI_D_IOCTL, "%s: mfi_scsi_ioctl\n", DEVNAME(sc));
sc 1211 dev/ic/mfi.c if (sc->sc_ioctl)
sc 1212 dev/ic/mfi.c return (sc->sc_ioctl(link->adapter_softc, cmd, addr));
sc 1221 dev/ic/mfi.c struct mfi_softc *sc = (struct mfi_softc *)dev;
sc 1224 dev/ic/mfi.c DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl ", DEVNAME(sc));
sc 1226 dev/ic/mfi.c rw_enter_write(&sc->sc_lock);
sc 1231 dev/ic/mfi.c error = mfi_ioctl_inq(sc, (struct bioc_inq *)addr);
sc 1236 dev/ic/mfi.c error = mfi_ioctl_vol(sc, (struct bioc_vol *)addr);
sc 1241 dev/ic/mfi.c error = mfi_ioctl_disk(sc, (struct bioc_disk *)addr);
sc 1246 dev/ic/mfi.c error = mfi_ioctl_alarm(sc, (struct bioc_alarm *)addr);
sc 1251 dev/ic/mfi.c error = mfi_ioctl_blink(sc, (struct bioc_blink *)addr);
sc 1256 dev/ic/mfi.c error = mfi_ioctl_setstate(sc, (struct bioc_setstate *)addr);
sc 1264 dev/ic/mfi.c rw_exit_write(&sc->sc_lock);
sc 1270 dev/ic/mfi.c mfi_ioctl_inq(struct mfi_softc *sc, struct bioc_inq *bi)
sc 1275 dev/ic/mfi.c DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_inq\n", DEVNAME(sc));
sc 1277 dev/ic/mfi.c if (mfi_get_info(sc)) {
sc 1279 dev/ic/mfi.c DEVNAME(sc));
sc 1285 dev/ic/mfi.c if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, sizeof *cfg, cfg, NULL))
sc 1288 dev/ic/mfi.c strlcpy(bi->bi_dev, DEVNAME(sc), sizeof(bi->bi_dev));
sc 1290 dev/ic/mfi.c bi->bi_nodisk = sc->sc_info.mci_pd_disks_present;
sc 1299 dev/ic/mfi.c mfi_ioctl_vol(struct mfi_softc *sc, struct bioc_vol *bv)
sc 1305 dev/ic/mfi.c DEVNAME(sc), bv->bv_volid);
sc 1307 dev/ic/mfi.c if (mfi_mgmt(sc, MR_DCMD_LD_GET_LIST, MFI_DATA_IN,
sc 1308 dev/ic/mfi.c sizeof(sc->sc_ld_list), &sc->sc_ld_list, NULL))
sc 1312 dev/ic/mfi.c mbox[0] = sc->sc_ld_list.mll_list[i].mll_ld.mld_target;
sc 1314 dev/ic/mfi.c DEVNAME(sc), mbox[0]);
sc 1316 dev/ic/mfi.c if (mfi_mgmt(sc, MR_DCMD_LD_GET_INFO, MFI_DATA_IN,
sc 1317 dev/ic/mfi.c sizeof(sc->sc_ld_details), &sc->sc_ld_details, mbox))
sc 1320 dev/ic/mfi.c if (bv->bv_volid >= sc->sc_ld_list.mll_no_ld) {
sc 1322 dev/ic/mfi.c rv = mfi_bio_hs(sc, bv->bv_volid, MFI_MGMT_VD, bv);
sc 1326 dev/ic/mfi.c strlcpy(bv->bv_dev, sc->sc_ld[i].ld_dev, sizeof(bv->bv_dev));
sc 1328 dev/ic/mfi.c switch(sc->sc_ld_list.mll_list[i].mll_state) {
sc 1345 dev/ic/mfi.c DEVNAME(sc),
sc 1346 dev/ic/mfi.c sc->sc_ld_list.mll_list[i].mll_state);
sc 1350 dev/ic/mfi.c switch (sc->sc_ld_details.mld_progress.mlp_in_prog) {
sc 1354 dev/ic/mfi.c per = (int)sc->sc_ld_details.mld_progress.mlp_cc.mp_progress;
sc 1357 dev/ic/mfi.c sc->sc_ld_details.mld_progress.mlp_cc.mp_elapsed_seconds;
sc 1370 dev/ic/mfi.c bv->bv_level = sc->sc_ld_details.mld_cfg.mlc_parm.mpa_pri_raid;
sc 1371 dev/ic/mfi.c if (sc->sc_ld_details.mld_cfg.mlc_parm.mpa_sec_raid ==
sc 1375 dev/ic/mfi.c bv->bv_nodisk = sc->sc_ld_details.mld_cfg.mlc_parm.mpa_no_drv_per_span *
sc 1376 dev/ic/mfi.c sc->sc_ld_details.mld_cfg.mlc_parm.mpa_span_depth;
sc 1378 dev/ic/mfi.c bv->bv_size = sc->sc_ld_details.mld_size * 512; /* bytes per block */
sc 1386 dev/ic/mfi.c mfi_ioctl_disk(struct mfi_softc *sc, struct bioc_disk *bd)
sc 1400 dev/ic/mfi.c DEVNAME(sc), bd->bd_diskid);
sc 1406 dev/ic/mfi.c if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, sizeof *cfg, cfg, NULL))
sc 1415 dev/ic/mfi.c if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, size, cfg, NULL))
sc 1429 dev/ic/mfi.c rv = mfi_bio_hs(sc, bd->bd_volid, MFI_MGMT_SD, bd);
sc 1478 dev/ic/mfi.c if (mfi_mgmt(sc, MR_DCMD_PD_GET_INFO, MFI_DATA_IN,
sc 1504 dev/ic/mfi.c mfi_ioctl_alarm(struct mfi_softc *sc, struct bioc_alarm *ba)
sc 1534 dev/ic/mfi.c "opcode %x\n", DEVNAME(sc), ba->ba_opcode);
sc 1538 dev/ic/mfi.c if (mfi_mgmt(sc, opc, dir, sizeof(ret), &ret, NULL))
sc 1550 dev/ic/mfi.c mfi_ioctl_blink(struct mfi_softc *sc, struct bioc_blink *bb)
sc 1557 dev/ic/mfi.c DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_blink %x\n", DEVNAME(sc),
sc 1566 dev/ic/mfi.c if (mfi_mgmt(sc, MR_DCMD_PD_GET_LIST, MFI_DATA_IN,
sc 1596 dev/ic/mfi.c "opcode %x\n", DEVNAME(sc), bb->bb_status);
sc 1601 dev/ic/mfi.c if (mfi_mgmt(sc, cmd, MFI_DATA_NONE, 0, NULL, mbox))
sc 1611 dev/ic/mfi.c mfi_ioctl_setstate(struct mfi_softc *sc, struct bioc_setstate *bs)
sc 1618 dev/ic/mfi.c DNPRINTF(MFI_D_IOCTL, "%s: mfi_ioctl_setstate %x\n", DEVNAME(sc),
sc 1623 dev/ic/mfi.c if (mfi_mgmt(sc, MR_DCMD_PD_GET_LIST, MFI_DATA_IN,
sc 1663 dev/ic/mfi.c "opcode %x\n", DEVNAME(sc), bs->bs_status);
sc 1668 dev/ic/mfi.c if (mfi_mgmt(sc, MD_DCMD_PD_SET_STATE, MFI_DATA_NONE, 0, NULL, mbox))
sc 1678 dev/ic/mfi.c mfi_bio_hs(struct mfi_softc *sc, int volid, int type, void *bio_hs)
sc 1691 dev/ic/mfi.c DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs %d\n", DEVNAME(sc), volid);
sc 1700 dev/ic/mfi.c if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, sizeof *cfg, cfg, NULL))
sc 1709 dev/ic/mfi.c if (mfi_mgmt(sc, MD_DCMD_CONF_GET, MFI_DATA_IN, size, cfg, NULL))
sc 1728 dev/ic/mfi.c "hs %p cfg %p id %02x\n", DEVNAME(sc), i, volid, cfg->mfc_no_ld,
sc 1734 dev/ic/mfi.c if (mfi_mgmt(sc, MR_DCMD_PD_GET_INFO, MFI_DATA_IN,
sc 1737 dev/ic/mfi.c DEVNAME(sc));
sc 1766 dev/ic/mfi.c DNPRINTF(MFI_D_IOCTL, "%s: mfi_vol_hs 6\n", DEVNAME(sc));
sc 1777 dev/ic/mfi.c mfi_create_sensors(struct mfi_softc *sc)
sc 1784 dev/ic/mfi.c if (dev->dv_parent != &sc->sc_dev)
sc 1789 dev/ic/mfi.c if (ssc->adapter_link == &sc->sc_link)
sc 1796 dev/ic/mfi.c sc->sc_sensors = malloc(sizeof(struct ksensor) * sc->sc_ld_cnt,
sc 1798 dev/ic/mfi.c if (sc->sc_sensors == NULL)
sc 1800 dev/ic/mfi.c bzero(sc->sc_sensors, sizeof(struct ksensor) * sc->sc_ld_cnt);
sc 1802 dev/ic/mfi.c strlcpy(sc->sc_sensordev.xname, DEVNAME(sc),
sc 1803 dev/ic/mfi.c sizeof(sc->sc_sensordev.xname));
sc 1805 dev/ic/mfi.c for (i = 0; i < sc->sc_ld_cnt; i++) {
sc 1811 dev/ic/mfi.c sc->sc_sensors[i].type = SENSOR_DRIVE;
sc 1812 dev/ic/mfi.c sc->sc_sensors[i].status = SENSOR_S_UNKNOWN;
sc 1814 dev/ic/mfi.c strlcpy(sc->sc_sensors[i].desc, dev->dv_xname,
sc 1815 dev/ic/mfi.c sizeof(sc->sc_sensors[i].desc));
sc 1817 dev/ic/mfi.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensors[i]);
sc 1820 dev/ic/mfi.c if (sensor_task_register(sc, mfi_refresh_sensors, 10) == NULL)
sc 1823 dev/ic/mfi.c sensordev_install(&sc->sc_sensordev);
sc 1828 dev/ic/mfi.c free(sc->sc_sensors, M_DEVBUF);
sc 1836 dev/ic/mfi.c struct mfi_softc *sc = arg;
sc 1841 dev/ic/mfi.c for (i = 0; i < sc->sc_ld_cnt; i++) {
sc 1844 dev/ic/mfi.c if (mfi_ioctl_vol(sc, &bv))
sc 1849 dev/ic/mfi.c sc->sc_sensors[i].value = SENSOR_DRIVE_FAIL;
sc 1850 dev/ic/mfi.c sc->sc_sensors[i].status = SENSOR_S_CRIT;
sc 1854 dev/ic/mfi.c sc->sc_sensors[i].value = SENSOR_DRIVE_PFAIL;
sc 1855 dev/ic/mfi.c sc->sc_sensors[i].status = SENSOR_S_WARN;
sc 1860 dev/ic/mfi.c sc->sc_sensors[i].value = SENSOR_DRIVE_ONLINE;
sc 1861 dev/ic/mfi.c sc->sc_sensors[i].status = SENSOR_S_OK;
sc 1867 dev/ic/mfi.c sc->sc_sensors[i].value = 0; /* unknown */
sc 1868 dev/ic/mfi.c sc->sc_sensors[i].status = SENSOR_S_UNKNOWN;
sc 151 dev/ic/mfivar.h int mfi_attach(struct mfi_softc *sc);
sc 430 dev/ic/midway.c STATIC INLINE u_int32_t en_read(sc, r)
sc 432 dev/ic/midway.c struct en_softc *sc;
sc 443 dev/ic/midway.c return(bus_space_read_4(sc->en_memt, sc->en_base, r));
sc 451 dev/ic/midway.c STATIC INLINE void en_write(sc, r, v)
sc 453 dev/ic/midway.c struct en_softc *sc;
sc 463 dev/ic/midway.c bus_space_write_4(sc->en_memt, sc->en_base, r, v);
sc 541 dev/ic/midway.c STATIC INLINE int en_dqneed(sc, data, len, tx)
sc 543 dev/ic/midway.c struct en_softc *sc;
sc 552 dev/ic/midway.c if (sc->is_adaptec)
sc 574 dev/ic/midway.c if (sc->alburst && len) {
sc 575 dev/ic/midway.c needalign = (((unsigned long) data) & sc->bestburstmask);
sc 578 dev/ic/midway.c sz = min(len, sc->bestburstlen - needalign);
sc 583 dev/ic/midway.c if (len >= sc->bestburstlen) {
sc 584 dev/ic/midway.c sz = len / sc->bestburstlen;
sc 585 dev/ic/midway.c sz = sz * sc->bestburstlen;
sc 607 dev/ic/midway.c STATIC INLINE struct mbuf *en_mget(sc, totlen, drqneed)
sc 609 dev/ic/midway.c struct en_softc *sc;
sc 620 dev/ic/midway.c m->m_pkthdr.rcvif = &sc->enif;
sc 650 dev/ic/midway.c *drqneed += en_dqneed(sc, m->m_data, m->m_len, 0);
sc 662 dev/ic/midway.c void en_attach(sc)
sc 664 dev/ic/midway.c struct en_softc *sc;
sc 667 dev/ic/midway.c struct ifnet *ifp = &sc->enif;
sc 679 dev/ic/midway.c if (sc->en_busreset)
sc 680 dev/ic/midway.c sc->en_busreset(sc);
sc 681 dev/ic/midway.c EN_WRITE(sc, MID_RESID, 0x0); /* reset card before touching RAM */
sc 683 dev/ic/midway.c EN_WRITE(sc, lcv, lcv); /* data[address] = address */
sc 685 dev/ic/midway.c reg = EN_READ(sc, check);
sc 693 dev/ic/midway.c sc->en_obmemsz = (lcv + 4) - MID_RAMOFF;
sc 699 dev/ic/midway.c en_dmaprobe(sc);
sc 705 dev/ic/midway.c if (sc->en_busreset)
sc 706 dev/ic/midway.c sc->en_busreset(sc);
sc 707 dev/ic/midway.c EN_WRITE(sc, MID_RESID, 0x0); /* reset */
sc 708 dev/ic/midway.c for (lcv = MID_RAMOFF ; lcv < MID_RAMOFF + sc->en_obmemsz ; lcv += 4)
sc 709 dev/ic/midway.c EN_WRITE(sc, lcv, 0); /* zero memory */
sc 711 dev/ic/midway.c reg = EN_READ(sc, MID_RESID);
sc 714 dev/ic/midway.c sc->sc_dev.dv_xname, MID_VER(reg), MID_MID(reg), MID_DID(reg),
sc 718 dev/ic/midway.c sc->en_obmemsz / 1024);
sc 720 dev/ic/midway.c if (sc->is_adaptec) {
sc 721 dev/ic/midway.c if (sc->bestburstlen == 64 && sc->alburst == 0)
sc 722 dev/ic/midway.c printf("%s: passed 64 byte DMA test\n", sc->sc_dev.dv_xname);
sc 725 dev/ic/midway.c sc->sc_dev.dv_xname, sc->bestburstlen, sc->alburst);
sc 727 dev/ic/midway.c printf("%s: maximum DMA burst length = %d bytes%s\n", sc->sc_dev.dv_xname,
sc 728 dev/ic/midway.c sc->bestburstlen, (sc->alburst) ? " (must align)" : "");
sc 734 dev/ic/midway.c printf("%s: note: WMAYBE DMA has been disabled\n", sc->sc_dev.dv_xname);
sc 742 dev/ic/midway.c bcopy(sc->sc_dev.dv_xname, sc->enif.if_xname, IFNAMSIZ);
sc 745 dev/ic/midway.c sc->enif.if_softc = sc;
sc 757 dev/ic/midway.c sc->rxvc2slot[lcv] = RX_NONE;
sc 758 dev/ic/midway.c sc->txspeed[lcv] = 0; /* full */
sc 759 dev/ic/midway.c sc->txvc2slot[lcv] = 0; /* full speed == slot 0 */
sc 762 dev/ic/midway.c sz = sc->en_obmemsz - (MID_BUFOFF - MID_RAMOFF);
sc 767 dev/ic/midway.c printf("%s: EN_NTX/EN_TXSZ too big\n", sc->sc_dev.dv_xname);
sc 771 dev/ic/midway.c sc->txslot[lcv].mbsize = 0;
sc 772 dev/ic/midway.c sc->txslot[lcv].start = ptr;
sc 775 dev/ic/midway.c sc->txslot[lcv].stop = ptr;
sc 776 dev/ic/midway.c sc->txslot[lcv].nref = 0;
sc 777 dev/ic/midway.c bzero(&sc->txslot[lcv].indma, sizeof(sc->txslot[lcv].indma));
sc 778 dev/ic/midway.c bzero(&sc->txslot[lcv].q, sizeof(sc->txslot[lcv].q));
sc 780 dev/ic/midway.c printf("%s: tx%d: start 0x%x, stop 0x%x\n", sc->sc_dev.dv_xname, lcv,
sc 781 dev/ic/midway.c sc->txslot[lcv].start, sc->txslot[lcv].stop);
sc 788 dev/ic/midway.c sc->en_nrx = sz / (EN_RXSZ * 1024);
sc 789 dev/ic/midway.c if (sc->en_nrx <= 0) {
sc 790 dev/ic/midway.c printf("%s: EN_NTX/EN_TXSZ/EN_RXSZ too big\n", sc->sc_dev.dv_xname);
sc 798 dev/ic/midway.c if (sc->en_nrx >= MID_N_VC)
sc 799 dev/ic/midway.c sc->en_nrx = MID_N_VC - 1;
sc 801 dev/ic/midway.c for (lcv = 0 ; lcv < sc->en_nrx ; lcv++) {
sc 802 dev/ic/midway.c sc->rxslot[lcv].rxhand = NULL;
sc 803 dev/ic/midway.c sc->rxslot[lcv].oth_flags = ENOTHER_FREE;
sc 804 dev/ic/midway.c bzero(&sc->rxslot[lcv].indma, sizeof(sc->rxslot[lcv].indma));
sc 805 dev/ic/midway.c bzero(&sc->rxslot[lcv].q, sizeof(sc->rxslot[lcv].q));
sc 806 dev/ic/midway.c midvloc = sc->rxslot[lcv].start = ptr;
sc 809 dev/ic/midway.c sc->rxslot[lcv].stop = ptr;
sc 814 dev/ic/midway.c sc->rxslot[lcv].mode = midvloc |
sc 818 dev/ic/midway.c printf("%s: rx%d: start 0x%x, stop 0x%x, mode 0x%x\n", sc->sc_dev.dv_xname,
sc 819 dev/ic/midway.c lcv, sc->rxslot[lcv].start, sc->rxslot[lcv].stop, sc->rxslot[lcv].mode);
sc 824 dev/ic/midway.c sc->vtrash = sc->otrash = sc->mfix = sc->txmbovr = sc->dmaovr = 0;
sc 825 dev/ic/midway.c sc->txoutspace = sc->txdtqout = sc->launch = sc->lheader = sc->ltail = 0;
sc 826 dev/ic/midway.c sc->hwpull = sc->swadd = sc->rxqnotus = sc->rxqus = sc->rxoutboth = 0;
sc 827 dev/ic/midway.c sc->rxdrqout = sc->ttrash = sc->rxmbufout = sc->mfixfail = 0;
sc 828 dev/ic/midway.c sc->headbyte = sc->tailbyte = sc->tailflush = 0;
sc 830 dev/ic/midway.c sc->need_drqs = sc->need_dtqs = 0;
sc 833 dev/ic/midway.c sc->sc_dev.dv_xname, sc->en_nrx, EN_RXSZ, EN_NTX, EN_TXSZ);
sc 864 dev/ic/midway.c STATIC void en_dmaprobe(sc)
sc 866 dev/ic/midway.c struct en_softc *sc;
sc 873 dev/ic/midway.c sc->alburst = 0;
sc 882 dev/ic/midway.c bestalgn = bestnotalgn = en_dmaprobe_doit(sc, sp, dp, 0);
sc 885 dev/ic/midway.c try = en_dmaprobe_doit(sc, sp+lcv, dp+lcv, 0);
sc 891 dev/ic/midway.c sc->alburst = 1;
sc 893 dev/ic/midway.c sc->bestburstlen = bestalgn;
sc 894 dev/ic/midway.c sc->bestburstshift = en_log2(bestalgn);
sc 895 dev/ic/midway.c sc->bestburstmask = sc->bestburstlen - 1; /* must be power of 2 */
sc 896 dev/ic/midway.c sc->bestburstcode = en_sz2b(bestalgn);
sc 898 dev/ic/midway.c if (sc->bestburstlen <= 2*sizeof(u_int32_t))
sc 905 dev/ic/midway.c if (sc->is_adaptec) {
sc 916 dev/ic/midway.c try = sc->bestburstlen - 4;
sc 918 dev/ic/midway.c fail += en_dmaprobe_doit(sc, sp, dp, try);
sc 919 dev/ic/midway.c for (lcv = 4 ; lcv < sc->bestburstlen ; lcv += 4) {
sc 920 dev/ic/midway.c fail += en_dmaprobe_doit(sc, sp+lcv, dp+lcv, try);
sc 921 dev/ic/midway.c if (sc->alburst)
sc 927 dev/ic/midway.c sc->sc_dev.dv_xname, fail);
sc 939 dev/ic/midway.c en_dmaprobe_doit(sc, sp, dp, wmtry)
sc 941 dev/ic/midway.c struct en_softc *sc;
sc 953 dev/ic/midway.c if (sc->en_busreset)
sc 954 dev/ic/midway.c sc->en_busreset(sc);
sc 955 dev/ic/midway.c EN_WRITE(sc, MID_RESID, 0x0); /* reset card before touching RAM */
sc 958 dev/ic/midway.c EN_WRITE(sc, MIDX_PLACE(0), MIDX_MKPLACE(en_k2sz(1), midvloc));
sc 959 dev/ic/midway.c EN_WRITE(sc, MID_VC(0), (midvloc << MIDV_LOCSHIFT)
sc 961 dev/ic/midway.c EN_WRITE(sc, MID_DST_RP(0), 0);
sc 962 dev/ic/midway.c EN_WRITE(sc, MID_WP_ST_CNT(0), 0);
sc 966 dev/ic/midway.c EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA); /* enable DMA (only) */
sc 968 dev/ic/midway.c sc->drq_chip = MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX));
sc 969 dev/ic/midway.c sc->dtq_chip = MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX));
sc 988 dev/ic/midway.c EN_WRITE(sc, MID_BUFOFF+cnt, 0); /* zero memory */
sc 993 dev/ic/midway.c count = (sc->bestburstlen - sizeof(u_int32_t)) / sizeof(u_int32_t);
sc 1000 dev/ic/midway.c if (sc->is_adaptec)
sc 1001 dev/ic/midway.c EN_WRITE(sc, sc->dtq_chip, MID_MK_TXQ_ADP(lcv, 0, MID_DMA_END, 0));
sc 1003 dev/ic/midway.c EN_WRITE(sc, sc->dtq_chip, MID_MK_TXQ_ENI(count, 0, MID_DMA_END, bcode));
sc 1004 dev/ic/midway.c EN_WRITE(sc, sc->dtq_chip+4, vtophys(sp));
sc 1005 dev/ic/midway.c EN_WRITE(sc, MID_DMA_WRTX, MID_DTQ_A2REG(sc->dtq_chip+8));
sc 1007 dev/ic/midway.c while (EN_READ(sc, MID_DMA_RDTX) == MID_DTQ_A2REG(sc->dtq_chip)) {
sc 1011 dev/ic/midway.c printf("%s: unexpected timeout in tx DMA test\n", sc->sc_dev.dv_xname);
sc 1015 dev/ic/midway.c EN_WRAPADD(MID_DTQOFF, MID_DTQEND, sc->dtq_chip, 8);
sc 1016 dev/ic/midway.c reg = EN_READ(sc, MID_INTACK);
sc 1019 dev/ic/midway.c sc->sc_dev.dv_xname, reg);
sc 1022 dev/ic/midway.c EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA); /* re-enable DMA (only) */
sc 1026 dev/ic/midway.c if (sc->is_adaptec)
sc 1027 dev/ic/midway.c EN_WRITE(sc, sc->drq_chip, MID_MK_RXQ_ADP(lcv, 0, MID_DMA_END, 0));
sc 1029 dev/ic/midway.c EN_WRITE(sc, sc->drq_chip, MID_MK_RXQ_ENI(count, 0, MID_DMA_END, bcode));
sc 1030 dev/ic/midway.c EN_WRITE(sc, sc->drq_chip+4, vtophys(dp));
sc 1031 dev/ic/midway.c EN_WRITE(sc, MID_DMA_WRRX, MID_DRQ_A2REG(sc->drq_chip+8));
sc 1033 dev/ic/midway.c while (EN_READ(sc, MID_DMA_RDRX) == MID_DRQ_A2REG(sc->drq_chip)) {
sc 1037 dev/ic/midway.c printf("%s: unexpected timeout in rx DMA test\n", sc->sc_dev.dv_xname);
sc 1041 dev/ic/midway.c EN_WRAPADD(MID_DRQOFF, MID_DRQEND, sc->drq_chip, 8);
sc 1042 dev/ic/midway.c reg = EN_READ(sc, MID_INTACK);
sc 1045 dev/ic/midway.c sc->sc_dev.dv_xname, reg);
sc 1048 dev/ic/midway.c EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA); /* re-enable DMA (only) */
sc 1083 dev/ic/midway.c struct en_softc *sc = (struct en_softc *) en_cd.cd_devs[ifp->if_unit];
sc 1085 dev/ic/midway.c struct en_softc *sc = (struct en_softc *) ifp->if_softc;
sc 1100 dev/ic/midway.c error = en_rxctl(sc, api, 1);
sc 1104 dev/ic/midway.c error = en_rxctl(sc, api, 0);
sc 1109 dev/ic/midway.c if ((slot = sc->rxvc2slot[ario->npcb->npcb_vci]) == RX_NONE) {
sc 1116 dev/ic/midway.c sc->rxslot[slot].oth_flags |= ENOTHER_RAW;
sc 1117 dev/ic/midway.c sc->rxslot[slot].raw_threshold = ario->rawvalue;
sc 1119 dev/ic/midway.c sc->rxslot[slot].oth_flags &= (~ENOTHER_RAW);
sc 1120 dev/ic/midway.c sc->rxslot[slot].raw_threshold = 0;
sc 1124 dev/ic/midway.c sc->sc_dev.dv_xname, ario->npcb->npcb_vci,
sc 1133 dev/ic/midway.c en_reset(sc);
sc 1134 dev/ic/midway.c en_init(sc);
sc 1140 dev/ic/midway.c en_reset(sc);
sc 1141 dev/ic/midway.c en_init(sc);
sc 1164 dev/ic/midway.c en_reset(sc);
sc 1165 dev/ic/midway.c en_init(sc);
sc 1181 dev/ic/midway.c STATIC int en_rxctl(sc, pi, on)
sc 1183 dev/ic/midway.c struct en_softc *sc;
sc 1195 dev/ic/midway.c printf("%s: %s vpi=%d, vci=%d, flags=%d\n", sc->sc_dev.dv_xname,
sc 1207 dev/ic/midway.c if (sc->rxvc2slot[vci] != RX_NONE)
sc 1209 dev/ic/midway.c for (slot = 0 ; slot < sc->en_nrx ; slot++)
sc 1210 dev/ic/midway.c if (sc->rxslot[slot].oth_flags & ENOTHER_FREE)
sc 1212 dev/ic/midway.c if (slot == sc->en_nrx)
sc 1214 dev/ic/midway.c sc->rxvc2slot[vci] = slot;
sc 1215 dev/ic/midway.c sc->rxslot[slot].rxhand = NULL;
sc 1216 dev/ic/midway.c oldmode = sc->rxslot[slot].mode;
sc 1218 dev/ic/midway.c sc->rxslot[slot].mode = MIDV_SETMODE(oldmode, newmode);
sc 1219 dev/ic/midway.c sc->rxslot[slot].atm_vci = vci;
sc 1220 dev/ic/midway.c sc->rxslot[slot].atm_flags = flags;
sc 1221 dev/ic/midway.c sc->rxslot[slot].oth_flags = 0;
sc 1222 dev/ic/midway.c sc->rxslot[slot].rxhand = pi->rxhand;
sc 1223 dev/ic/midway.c if (sc->rxslot[slot].indma.ifq_head || sc->rxslot[slot].q.ifq_head)
sc 1225 dev/ic/midway.c sc->txspeed[vci] = 0; /* full speed to start */
sc 1226 dev/ic/midway.c sc->txvc2slot[vci] = 0; /* init value */
sc 1227 dev/ic/midway.c sc->txslot[0].nref++; /* bump reference count */
sc 1228 dev/ic/midway.c en_loadvc(sc, vci); /* does debug printf for us */
sc 1236 dev/ic/midway.c if (sc->rxvc2slot[vci] == RX_NONE)
sc 1238 dev/ic/midway.c slot = sc->rxvc2slot[vci];
sc 1239 dev/ic/midway.c if ((sc->rxslot[slot].oth_flags & (ENOTHER_FREE|ENOTHER_DRAIN)) != 0)
sc 1242 dev/ic/midway.c oldmode = EN_READ(sc, MID_VC(vci));
sc 1244 dev/ic/midway.c EN_WRITE(sc, MID_VC(vci), (newmode | (oldmode & MIDV_INSERVICE)));
sc 1247 dev/ic/midway.c sc->rxslot[slot].rxhand = NULL;
sc 1248 dev/ic/midway.c sc->rxslot[slot].mode = newmode;
sc 1250 dev/ic/midway.c sc->txslot[sc->txvc2slot[vci]].nref--;
sc 1251 dev/ic/midway.c sc->txspeed[vci] = 0;
sc 1252 dev/ic/midway.c sc->txvc2slot[vci] = 0;
sc 1255 dev/ic/midway.c if (sc->rxslot[slot].indma.ifq_head ||
sc 1256 dev/ic/midway.c sc->rxslot[slot].q.ifq_head ||
sc 1257 dev/ic/midway.c (sc->rxslot[slot].oth_flags & ENOTHER_SWSL) != 0) {
sc 1258 dev/ic/midway.c sc->rxslot[slot].oth_flags |= ENOTHER_DRAIN;
sc 1260 dev/ic/midway.c sc->rxslot[slot].oth_flags = ENOTHER_FREE;
sc 1261 dev/ic/midway.c sc->rxslot[slot].atm_vci = RX_NONE;
sc 1262 dev/ic/midway.c sc->rxvc2slot[vci] = RX_NONE;
sc 1266 dev/ic/midway.c printf("%s: rx%d: VCI %d is now %s\n", sc->sc_dev.dv_xname, slot, vci,
sc 1267 dev/ic/midway.c (sc->rxslot[slot].oth_flags & ENOTHER_DRAIN) ? "draining" : "free");
sc 1279 dev/ic/midway.c void en_reset(sc)
sc 1281 dev/ic/midway.c struct en_softc *sc;
sc 1288 dev/ic/midway.c printf("%s: reset\n", sc->sc_dev.dv_xname);
sc 1291 dev/ic/midway.c if (sc->en_busreset)
sc 1292 dev/ic/midway.c sc->en_busreset(sc);
sc 1293 dev/ic/midway.c EN_WRITE(sc, MID_RESID, 0x0); /* reset hardware */
sc 1301 dev/ic/midway.c if (sc->rxvc2slot[lcv] == RX_NONE)
sc 1303 dev/ic/midway.c slot = sc->rxvc2slot[lcv];
sc 1305 dev/ic/midway.c IF_DEQUEUE(&sc->rxslot[slot].indma, m);
sc 1311 dev/ic/midway.c IF_DEQUEUE(&sc->rxslot[slot].q, m);
sc 1316 dev/ic/midway.c sc->rxslot[slot].oth_flags &= ~ENOTHER_SWSL;
sc 1317 dev/ic/midway.c if (sc->rxslot[slot].oth_flags & ENOTHER_DRAIN) {
sc 1318 dev/ic/midway.c sc->rxslot[slot].oth_flags = ENOTHER_FREE;
sc 1319 dev/ic/midway.c sc->rxvc2slot[lcv] = RX_NONE;
sc 1321 dev/ic/midway.c printf("%s: rx%d: VCI %d is now free\n", sc->sc_dev.dv_xname, slot, lcv);
sc 1332 dev/ic/midway.c IF_DEQUEUE(&sc->txslot[lcv].indma, m);
sc 1338 dev/ic/midway.c IF_DEQUEUE(&sc->txslot[lcv].q, m);
sc 1343 dev/ic/midway.c sc->txslot[lcv].mbsize = 0;
sc 1354 dev/ic/midway.c STATIC void en_init(sc)
sc 1356 dev/ic/midway.c struct en_softc *sc;
sc 1362 dev/ic/midway.c if ((sc->enif.if_flags & IFF_UP) == 0) {
sc 1364 dev/ic/midway.c printf("%s: going down\n", sc->sc_dev.dv_xname);
sc 1366 dev/ic/midway.c en_reset(sc); /* to be safe */
sc 1367 dev/ic/midway.c sc->enif.if_flags &= ~IFF_RUNNING; /* disable */
sc 1372 dev/ic/midway.c printf("%s: going up\n", sc->sc_dev.dv_xname);
sc 1374 dev/ic/midway.c sc->enif.if_flags |= IFF_RUNNING; /* enable */
sc 1376 dev/ic/midway.c if (sc->en_busreset)
sc 1377 dev/ic/midway.c sc->en_busreset(sc);
sc 1378 dev/ic/midway.c EN_WRITE(sc, MID_RESID, 0x0); /* reset */
sc 1395 dev/ic/midway.c en_loadvc(sc, vc);
sc 1397 dev/ic/midway.c bzero(&sc->drq, sizeof(sc->drq));
sc 1398 dev/ic/midway.c sc->drq_free = MID_DRQ_N - 1; /* N - 1 */
sc 1399 dev/ic/midway.c sc->drq_chip = MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX));
sc 1400 dev/ic/midway.c EN_WRITE(sc, MID_DMA_WRRX, MID_DRQ_A2REG(sc->drq_chip));
sc 1402 dev/ic/midway.c sc->drq_us = sc->drq_chip;
sc 1404 dev/ic/midway.c bzero(&sc->dtq, sizeof(sc->dtq));
sc 1405 dev/ic/midway.c sc->dtq_free = MID_DTQ_N - 1; /* N - 1 */
sc 1406 dev/ic/midway.c sc->dtq_chip = MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX));
sc 1407 dev/ic/midway.c EN_WRITE(sc, MID_DMA_WRTX, MID_DRQ_A2REG(sc->dtq_chip));
sc 1409 dev/ic/midway.c sc->dtq_us = sc->dtq_chip;
sc 1411 dev/ic/midway.c sc->hwslistp = MID_SL_REG2A(EN_READ(sc, MID_SERV_WRITE));
sc 1412 dev/ic/midway.c sc->swsl_size = sc->swsl_head = sc->swsl_tail = 0;
sc 1416 dev/ic/midway.c sc->sc_dev.dv_xname, sc->drq_free, sc->drq_chip,
sc 1417 dev/ic/midway.c sc->dtq_free, sc->dtq_chip, sc->hwslistp);
sc 1421 dev/ic/midway.c sc->txslot[slot].bfree = EN_TXSZ * 1024;
sc 1422 dev/ic/midway.c EN_WRITE(sc, MIDX_READPTR(slot), 0);
sc 1423 dev/ic/midway.c EN_WRITE(sc, MIDX_DESCSTART(slot), 0);
sc 1424 dev/ic/midway.c loc = sc->txslot[slot].cur = sc->txslot[slot].start;
sc 1428 dev/ic/midway.c EN_WRITE(sc, MIDX_PLACE(slot), MIDX_MKPLACE(en_k2sz(EN_TXSZ), loc));
sc 1430 dev/ic/midway.c printf("%s: tx%d: place 0x%x\n", sc->sc_dev.dv_xname, slot,
sc 1431 dev/ic/midway.c EN_READ(sc, MIDX_PLACE(slot)));
sc 1439 dev/ic/midway.c EN_WRITE(sc, MID_INTENA, MID_INT_TX|MID_INT_DMA_OVR|MID_INT_IDENT|
sc 1442 dev/ic/midway.c EN_WRITE(sc, MID_MAST_CSR, MID_SETIPL(sc->ipl)|MID_MCSR_ENDMA|
sc 1452 dev/ic/midway.c STATIC void en_loadvc(sc, vc)
sc 1454 dev/ic/midway.c struct en_softc *sc;
sc 1459 dev/ic/midway.c u_int32_t reg = EN_READ(sc, MID_VC(vc));
sc 1462 dev/ic/midway.c EN_WRITE(sc, MID_VC(vc), reg);
sc 1465 dev/ic/midway.c if ((slot = sc->rxvc2slot[vc]) == RX_NONE)
sc 1469 dev/ic/midway.c EN_WRITE(sc, MID_DST_RP(vc), 0); /* read pointer = 0, desc. start = 0 */
sc 1470 dev/ic/midway.c EN_WRITE(sc, MID_WP_ST_CNT(vc), 0); /* write pointer = 0 */
sc 1471 dev/ic/midway.c EN_WRITE(sc, MID_VC(vc), sc->rxslot[slot].mode); /* set mode, size, loc */
sc 1472 dev/ic/midway.c sc->rxslot[slot].cur = sc->rxslot[slot].start;
sc 1475 dev/ic/midway.c printf("%s: rx%d: assigned to VCI %d\n", sc->sc_dev.dv_xname, slot, vc);
sc 1491 dev/ic/midway.c struct en_softc *sc = (struct en_softc *) en_cd.cd_devs[ifp->if_unit];
sc 1493 dev/ic/midway.c struct en_softc *sc = (struct en_softc *) ifp->if_softc;
sc 1530 dev/ic/midway.c if ((!sc->is_adaptec && EN_ENIDMAFIX) || EN_NOTXDMA || !en_dma) {
sc 1534 dev/ic/midway.c if (en_mfix(sc, &lastm, prev) == 0) { /* failed? */
sc 1567 dev/ic/midway.c sc->sc_dev.dv_xname, atm_vpi, atm_vci);
sc 1593 dev/ic/midway.c sc->sc_dev.dv_xname, atm_vci, mlen, got, need, toadd, cellcnt);
sc 1616 dev/ic/midway.c *dat++ = htonl(MID_TBD_MK1(aal, sc->txspeed[atm_vci], cellcnt));
sc 1643 dev/ic/midway.c txchan = sc->txvc2slot[atm_vci];
sc 1645 dev/ic/midway.c if (sc->txslot[txchan].mbsize > EN_TXHIWAT) {
sc 1646 dev/ic/midway.c EN_COUNT(sc->txmbovr);
sc 1649 dev/ic/midway.c printf("%s: tx%d: buffer space shortage\n", sc->sc_dev.dv_xname,
sc 1655 dev/ic/midway.c sc->txslot[txchan].mbsize += mlen;
sc 1659 dev/ic/midway.c sc->sc_dev.dv_xname, txchan, atm_vpi, atm_vci, atm_flags,
sc 1660 dev/ic/midway.c sc->txspeed[atm_vci]);
sc 1662 dev/ic/midway.c sc->txslot[txchan].mbsize);
sc 1665 dev/ic/midway.c IF_ENQUEUE(&sc->txslot[txchan].q, m);
sc 1666 dev/ic/midway.c en_txdma(sc, txchan);
sc 1677 dev/ic/midway.c STATIC int en_mfix(sc, mm, prev)
sc 1679 dev/ic/midway.c struct en_softc *sc;
sc 1690 dev/ic/midway.c EN_COUNT(sc->mfix); /* count # of calls */
sc 1692 dev/ic/midway.c printf("%s: mfix mbuf m_data=%p, m_len=%d\n", sc->sc_dev.dv_xname,
sc 1708 dev/ic/midway.c EN_COUNT(sc->mfixfail);
sc 1714 dev/ic/midway.c EN_COUNT(sc->mfixfail);
sc 1756 dev/ic/midway.c STATIC void en_txdma(sc, chan)
sc 1758 dev/ic/midway.c struct en_softc *sc;
sc 1769 dev/ic/midway.c printf("%s: tx%d: starting...\n", sc->sc_dev.dv_xname, chan);
sc 1786 dev/ic/midway.c launch.t = sc->txslot[chan].q.ifq_head; /* peek at head of queue */
sc 1790 dev/ic/midway.c printf("%s: tx%d: ...done!\n", sc->sc_dev.dv_xname, chan);
sc 1836 dev/ic/midway.c dtqneed += en_dqneed(sc, (caddr_t) cp, len, 1);
sc 1863 dev/ic/midway.c sc->sc_dev.dv_xname, chan, launch.need, EN_TXSZ * 1024);
sc 1874 dev/ic/midway.c if (launch.need >= sc->txslot[chan].bfree) {
sc 1875 dev/ic/midway.c EN_COUNT(sc->txoutspace);
sc 1877 dev/ic/midway.c printf("%s: tx%d: out of transmit space\n", sc->sc_dev.dv_xname, chan);
sc 1889 dev/ic/midway.c if (dtqneed > sc->dtq_free) {
sc 1890 dev/ic/midway.c sc->need_dtqs = 1;
sc 1891 dev/ic/midway.c EN_COUNT(sc->txdtqout);
sc 1893 dev/ic/midway.c printf("%s: tx%d: out of transmit DTQs\n", sc->sc_dev.dv_xname, chan);
sc 1902 dev/ic/midway.c IF_DEQUEUE(&sc->txslot[chan].q, tmp);
sc 1912 dev/ic/midway.c EN_COUNT(sc->launch);
sc 1913 dev/ic/midway.c sc->enif.if_opackets++;
sc 1915 dev/ic/midway.c EN_COUNT(sc->lheader);
sc 1917 dev/ic/midway.c launch.tbd1 = MID_TBD_MK1(launch.aal, sc->txspeed[launch.atm_vci], ncells);
sc 1921 dev/ic/midway.c EN_COUNT(sc->ltail);
sc 1926 dev/ic/midway.c if (sc->enif.if_bpf != NULL) {
sc 1941 dev/ic/midway.c bpf_mtap(sc->enif.if_bpf, launch.t, BPF_DIRECTION_OUT);
sc 1948 dev/ic/midway.c en_txlaunch(sc, chan, &launch);
sc 1954 dev/ic/midway.c sc->txslot[chan].bfree -= launch.need;
sc 1955 dev/ic/midway.c IF_ENQUEUE(&sc->txslot[chan].indma, launch.t);
sc 1967 dev/ic/midway.c IF_DEQUEUE(&sc->txslot[chan].q, tmp);
sc 1971 dev/ic/midway.c sc->txslot[chan].mbsize -= launch.mlen;
sc 1980 dev/ic/midway.c STATIC void en_txlaunch(sc, chan, l)
sc 1982 dev/ic/midway.c struct en_softc *sc;
sc 1988 dev/ic/midway.c u_int32_t cur = sc->txslot[chan].cur,
sc 1989 dev/ic/midway.c start = sc->txslot[chan].start,
sc 1990 dev/ic/midway.c stop = sc->txslot[chan].stop,
sc 2020 dev/ic/midway.c printf("%s: tx%d: bogus transmit needs (%d)\n", sc->sc_dev.dv_xname, chan,
sc 2025 dev/ic/midway.c sc->sc_dev.dv_xname, chan, l->t, cur, (cur-start)/4, need, addtail);
sc 2026 dev/ic/midway.c count = EN_READ(sc, MIDX_PLACE(chan));
sc 2028 dev/ic/midway.c MIDX_BASE(count), MIDX_SZ(count), EN_READ(sc, MIDX_READPTR(chan)),
sc 2029 dev/ic/midway.c EN_READ(sc, MIDX_DESCSTART(chan)));
sc 2039 dev/ic/midway.c printf("%s: tx%d: insert header 0x%x 0x%x\n", sc->sc_dev.dv_xname,
sc 2042 dev/ic/midway.c EN_WRITE(sc, cur, l->tbd1);
sc 2044 dev/ic/midway.c EN_WRITE(sc, cur, l->tbd2);
sc 2079 dev/ic/midway.c EN_WRITEDAT(sc, cur, *data);
sc 2086 dev/ic/midway.c sc->sc_dev.dv_xname, chan, len, need, cur);
sc 2093 dev/ic/midway.c EN_DTQADD(sc, WORD_IDX(start,cur), chan, MIDDMA_JK, 0, 0, 0);
sc 2096 dev/ic/midway.c sc->sc_dev.dv_xname, chan, cur);
sc 2118 dev/ic/midway.c if (sc->is_adaptec) {
sc 2124 dev/ic/midway.c sc->sc_dev.dv_xname, chan, len, need, cur);
sc 2127 dev/ic/midway.c EN_DTQADD(sc, len, chan, 0, vtophys(data), l->mlen, end);
sc 2144 dev/ic/midway.c EN_COUNT(sc->headbyte);
sc 2158 dev/ic/midway.c sc->sc_dev.dv_xname, chan, cnt, need, cur);
sc 2162 dev/ic/midway.c EN_DTQADD(sc, count, chan, bcode, vtophys(data), l->mlen, end);
sc 2169 dev/ic/midway.c if (sc->alburst &&
sc 2170 dev/ic/midway.c (needalign = (((unsigned long) data) & sc->bestburstmask)) != 0
sc 2172 dev/ic/midway.c cnt = sc->bestburstlen - needalign;
sc 2187 dev/ic/midway.c sc->sc_dev.dv_xname, chan, cnt, need, cur);
sc 2191 dev/ic/midway.c EN_DTQADD(sc, count, chan, bcode, vtophys(data), l->mlen, end);
sc 2198 dev/ic/midway.c if (len >= sc->bestburstlen) {
sc 2199 dev/ic/midway.c count = len >> sc->bestburstshift;
sc 2200 dev/ic/midway.c cnt = count << sc->bestburstshift;
sc 2201 dev/ic/midway.c bcode = sc->bestburstcode;
sc 2206 dev/ic/midway.c sc->sc_dev.dv_xname, chan, cnt, need, cur);
sc 2210 dev/ic/midway.c EN_DTQADD(sc, count, chan, bcode, vtophys(data), l->mlen, end);
sc 2226 dev/ic/midway.c sc->sc_dev.dv_xname, chan, cnt, need, cur);
sc 2230 dev/ic/midway.c EN_DTQADD(sc, count, chan, bcode, vtophys(data), l->mlen, end);
sc 2238 dev/ic/midway.c EN_COUNT(sc->tailbyte);
sc 2250 dev/ic/midway.c sc->sc_dev.dv_xname, chan, len, need, cur);
sc 2253 dev/ic/midway.c EN_DTQADD(sc, count, chan, bcode, vtophys(data), l->mlen, end);
sc 2285 dev/ic/midway.c bcode = (sc->is_adaptec) ? 0 : MIDDMA_BYTE;
sc 2286 dev/ic/midway.c EN_COUNT(sc->tailflush);
sc 2288 dev/ic/midway.c EN_DTQADD(sc, pad, chan, bcode, vtophys(l->t->m_data), 0, 0);
sc 2292 dev/ic/midway.c sc->sc_dev.dv_xname, chan, pad, need, cur);
sc 2302 dev/ic/midway.c sc->sc_dev.dv_xname, chan, pad * sizeof(u_int32_t), cur);
sc 2305 dev/ic/midway.c EN_WRITEDAT(sc, cur, 0); /* no byte order issues with zero */
sc 2309 dev/ic/midway.c EN_WRITE(sc, cur, l->pdu1); /* in host byte order */
sc 2316 dev/ic/midway.c EN_DTQADD(sc, WORD_IDX(start,cur), chan, MIDDMA_JK, 0,
sc 2323 dev/ic/midway.c sc->txslot[chan].cur = cur;
sc 2326 dev/ic/midway.c sc->sc_dev.dv_xname, chan, cur);
sc 2342 dev/ic/midway.c struct en_softc *sc = (struct en_softc *) arg;
sc 2348 dev/ic/midway.c reg = EN_READ(sc, MID_INTACK);
sc 2354 dev/ic/midway.c printf("%s: interrupt=0x%b\n", sc->sc_dev.dv_xname, reg, MID_INTBITS);
sc 2363 dev/ic/midway.c sc->sc_dev.dv_xname, reg, MID_INTBITS);
sc 2368 dev/ic/midway.c sc->enif.if_flags &= ~IFF_RUNNING; /* FREEZE! */
sc 2370 dev/ic/midway.c en_reset(sc);
sc 2371 dev/ic/midway.c en_init(sc);
sc 2391 dev/ic/midway.c val = EN_READ(sc, MIDX_READPTR(lcv)); /* current read pointer */
sc 2392 dev/ic/midway.c val = (val * sizeof(u_int32_t)) + sc->txslot[lcv].start;
sc 2394 dev/ic/midway.c if (val > sc->txslot[lcv].cur)
sc 2395 dev/ic/midway.c sc->txslot[lcv].bfree = val - sc->txslot[lcv].cur;
sc 2397 dev/ic/midway.c sc->txslot[lcv].bfree = (val + (EN_TXSZ*1024)) - sc->txslot[lcv].cur;
sc 2400 dev/ic/midway.c sc->sc_dev.dv_xname, lcv, sc->txslot[lcv].bfree);
sc 2413 dev/ic/midway.c val = EN_READ(sc, MID_DMA_RDTX); /* chip's current location */
sc 2414 dev/ic/midway.c idx = MID_DTQ_A2REG(sc->dtq_chip);/* where we last saw chip */
sc 2415 dev/ic/midway.c if (sc->need_dtqs) {
sc 2417 dev/ic/midway.c sc->need_dtqs = 0; /* recalculated in "kick" loop below */
sc 2419 dev/ic/midway.c printf("%s: cleared need DTQ condition\n", sc->sc_dev.dv_xname);
sc 2423 dev/ic/midway.c sc->dtq_free++;
sc 2424 dev/ic/midway.c if ((dtq = sc->dtq[idx]) != 0) {
sc 2425 dev/ic/midway.c sc->dtq[idx] = 0; /* don't forget to zero it out when done */
sc 2427 dev/ic/midway.c IF_DEQUEUE(&sc->txslot[slot].indma, m);
sc 2429 dev/ic/midway.c sc->txslot[slot].mbsize -= EN_DQ_LEN(dtq);
sc 2432 dev/ic/midway.c sc->sc_dev.dv_xname, slot, EN_DQ_LEN(dtq),
sc 2433 dev/ic/midway.c sc->txslot[slot].mbsize);
sc 2439 dev/ic/midway.c sc->dtq_chip = MID_DTQ_REG2A(val); /* sync softc */
sc 2449 dev/ic/midway.c printf("%s: tx kick mask = 0x%x\n", sc->sc_dev.dv_xname, kick);
sc 2452 dev/ic/midway.c if ((kick & mask) && sc->txslot[lcv].q.ifq_head) {
sc 2453 dev/ic/midway.c en_txdma(sc, lcv); /* kick it! */
sc 2468 dev/ic/midway.c val = EN_READ(sc, MID_DMA_RDRX); /* chip's current location */
sc 2469 dev/ic/midway.c idx = MID_DRQ_A2REG(sc->drq_chip);/* where we last saw chip */
sc 2471 dev/ic/midway.c sc->drq_free++;
sc 2472 dev/ic/midway.c if ((drq = sc->drq[idx]) != 0) {
sc 2473 dev/ic/midway.c sc->drq[idx] = 0; /* don't forget to zero it out when done */
sc 2478 dev/ic/midway.c IF_DEQUEUE(&sc->rxslot[slot].indma, m);
sc 2481 dev/ic/midway.c sc->sc_dev.dv_xname, slot);
sc 2485 dev/ic/midway.c if (sc->rxslot[slot].oth_flags & ENOTHER_DRAIN) { /* drain? */
sc 2488 dev/ic/midway.c vci = sc->rxslot[slot].atm_vci;
sc 2489 dev/ic/midway.c if (sc->rxslot[slot].indma.ifq_head == NULL &&
sc 2490 dev/ic/midway.c sc->rxslot[slot].q.ifq_head == NULL &&
sc 2491 dev/ic/midway.c (EN_READ(sc, MID_VC(vci)) & MIDV_INSERVICE) == 0 &&
sc 2492 dev/ic/midway.c (sc->rxslot[slot].oth_flags & ENOTHER_SWSL) == 0) {
sc 2493 dev/ic/midway.c sc->rxslot[slot].oth_flags = ENOTHER_FREE; /* done drain */
sc 2494 dev/ic/midway.c sc->rxslot[slot].atm_vci = RX_NONE;
sc 2495 dev/ic/midway.c sc->rxvc2slot[vci] = RX_NONE;
sc 2497 dev/ic/midway.c printf("%s: rx%d: VCI %d now free\n", sc->sc_dev.dv_xname,
sc 2502 dev/ic/midway.c ATM_PH_FLAGS(&ah) = sc->rxslot[slot].atm_flags;
sc 2504 dev/ic/midway.c ATM_PH_SETVCI(&ah, sc->rxslot[slot].atm_vci);
sc 2507 dev/ic/midway.c sc->sc_dev.dv_xname, slot, sc->rxslot[slot].atm_vci, m,
sc 2508 dev/ic/midway.c EN_DQ_LEN(drq), sc->rxslot[slot].rxhand);
sc 2510 dev/ic/midway.c sc->enif.if_ipackets++;
sc 2513 dev/ic/midway.c if (sc->enif.if_bpf)
sc 2514 dev/ic/midway.c bpf_mtap(sc->enif.if_bpf, m, BPF_DIRECTION_IN);
sc 2517 dev/ic/midway.c atm_input(&sc->enif, &ah, m, sc->rxslot[slot].rxhand);
sc 2523 dev/ic/midway.c sc->drq_chip = MID_DRQ_REG2A(val); /* sync softc */
sc 2525 dev/ic/midway.c if (sc->need_drqs) { /* true if we had a DRQ shortage */
sc 2527 dev/ic/midway.c sc->need_drqs = 0;
sc 2529 dev/ic/midway.c printf("%s: cleared need DRQ condition\n", sc->sc_dev.dv_xname);
sc 2539 dev/ic/midway.c chip = MID_SL_REG2A(EN_READ(sc, MID_SERV_WRITE));
sc 2541 dev/ic/midway.c while (sc->hwslistp != chip) {
sc 2544 dev/ic/midway.c vci = EN_READ(sc, sc->hwslistp);
sc 2545 dev/ic/midway.c EN_WRAPADD(MID_SLOFF, MID_SLEND, sc->hwslistp, 4);/* advance hw ptr */
sc 2546 dev/ic/midway.c slot = sc->rxvc2slot[vci];
sc 2550 dev/ic/midway.c sc->sc_dev.dv_xname, vci);
sc 2552 dev/ic/midway.c EN_WRITE(sc, MID_VC(vci), MIDV_TRASH); /* rx off, damn it! */
sc 2555 dev/ic/midway.c EN_WRITE(sc, MID_VC(vci), sc->rxslot[slot].mode); /* remove from hwsl */
sc 2556 dev/ic/midway.c EN_COUNT(sc->hwpull);
sc 2559 dev/ic/midway.c printf("%s: pulled VCI %d off hwslist\n", sc->sc_dev.dv_xname, vci);
sc 2563 dev/ic/midway.c if ((sc->rxslot[slot].oth_flags & ENOTHER_SWSL) == 0) {
sc 2564 dev/ic/midway.c EN_COUNT(sc->swadd);
sc 2566 dev/ic/midway.c sc->rxslot[slot].oth_flags |= ENOTHER_SWSL;
sc 2567 dev/ic/midway.c sc->swslist[sc->swsl_tail] = slot;
sc 2568 dev/ic/midway.c EN_WRAPADD(0, MID_SL_N, sc->swsl_tail, 1);
sc 2569 dev/ic/midway.c sc->swsl_size++;
sc 2571 dev/ic/midway.c printf("%s: added VCI %d to swslist\n", sc->sc_dev.dv_xname, vci);
sc 2582 dev/ic/midway.c en_service(sc);
sc 2589 dev/ic/midway.c EN_COUNT(sc->dmaovr);
sc 2591 dev/ic/midway.c printf("%s: MID_INT_DMA_OVR\n", sc->sc_dev.dv_xname);
sc 2594 dev/ic/midway.c reg = EN_READ(sc, MID_STAT);
sc 2596 dev/ic/midway.c sc->otrash += MID_OTRASH(reg);
sc 2597 dev/ic/midway.c sc->vtrash += MID_VTRASH(reg);
sc 2622 dev/ic/midway.c STATIC void en_service(sc)
sc 2624 dev/ic/midway.c struct en_softc *sc;
sc 2634 dev/ic/midway.c if (sc->swsl_size == 0) {
sc 2636 dev/ic/midway.c printf("%s: en_service done\n", sc->sc_dev.dv_xname);
sc 2645 dev/ic/midway.c slot = sc->swslist[sc->swsl_head];
sc 2646 dev/ic/midway.c vci = sc->rxslot[slot].atm_vci;
sc 2648 dev/ic/midway.c if (sc->rxvc2slot[vci] != slot) panic("en_service rx slot/vci sync");
sc 2655 dev/ic/midway.c raw = sc->rxslot[slot].oth_flags & ENOTHER_RAW;
sc 2656 dev/ic/midway.c start= sc->rxslot[slot].start;
sc 2657 dev/ic/midway.c stop= sc->rxslot[slot].stop;
sc 2658 dev/ic/midway.c cur = sc->rxslot[slot].cur;
sc 2662 dev/ic/midway.c sc->sc_dev.dv_xname, slot, vci, raw, start, stop, cur);
sc 2666 dev/ic/midway.c dstart = MIDV_DSTART(EN_READ(sc, MID_DST_RP(vci)));
sc 2672 dev/ic/midway.c EN_WRAPADD(0, MID_SL_N, sc->swsl_head, 1);
sc 2673 dev/ic/midway.c sc->rxslot[slot].oth_flags &= ~ENOTHER_SWSL;
sc 2674 dev/ic/midway.c sc->swsl_size--;
sc 2678 dev/ic/midway.c sc->sc_dev.dv_xname, slot, vci);
sc 2697 dev/ic/midway.c if (mlen < sc->rxslot[slot].raw_threshold)
sc 2703 dev/ic/midway.c aal5 = (sc->rxslot[slot].atm_flags & ATM_PH_AAL5);
sc 2704 dev/ic/midway.c llc = (aal5 && (sc->rxslot[slot].atm_flags & ATM_PH_LLCSNAP)) ? 1 : 0;
sc 2705 dev/ic/midway.c rbd = EN_READ(sc, cur);
sc 2712 dev/ic/midway.c EN_COUNT(sc->ttrash);
sc 2721 dev/ic/midway.c pdu = EN_READ(sc, pdu); /* get PDU in correct byte order */
sc 2724 dev/ic/midway.c printf("%s: %s, dropping frame\n", sc->sc_dev.dv_xname,
sc 2727 dev/ic/midway.c sc->sc_dev.dv_xname, MID_RBD_CNT(rbd), tlen - MID_RBD_SIZE,
sc 2749 dev/ic/midway.c m = sc->rxslot[slot].q.ifq_head;
sc 2756 dev/ic/midway.c sc->sc_dev.dv_xname, slot, m);
sc 2759 dev/ic/midway.c EN_COUNT(sc->rxqnotus);
sc 2761 dev/ic/midway.c EN_COUNT(sc->rxqus);
sc 2762 dev/ic/midway.c IF_DEQUEUE(&sc->rxslot[slot].q, m);
sc 2766 dev/ic/midway.c sc->sc_dev.dv_xname, slot, m, drqneed);
sc 2772 dev/ic/midway.c m = en_mget(sc, mlen, &drqneed); /* allocate! */
sc 2776 dev/ic/midway.c EN_COUNT(sc->rxmbufout);
sc 2778 dev/ic/midway.c printf("%s: rx%d: out of mbufs\n", sc->sc_dev.dv_xname, slot);
sc 2783 dev/ic/midway.c sc->sc_dev.dv_xname, slot, m, mlen, drqneed);
sc 2789 dev/ic/midway.c sc->sc_dev.dv_xname, slot, vci, m, mlen, fill);
sc 2798 dev/ic/midway.c if (drqneed + needfill > sc->drq_free) {
sc 2799 dev/ic/midway.c sc->need_drqs = 1; /* flag condition */
sc 2801 dev/ic/midway.c EN_COUNT(sc->rxoutboth);
sc 2803 dev/ic/midway.c printf("%s: rx%d: out of DRQs *and* mbufs!\n", sc->sc_dev.dv_xname, slot);
sc 2810 dev/ic/midway.c IF_ENQUEUE(&sc->rxslot[slot].q, m);
sc 2811 dev/ic/midway.c EN_COUNT(sc->rxdrqout);
sc 2813 dev/ic/midway.c printf("%s: rx%d: out of DRQs\n", sc->sc_dev.dv_xname, slot);
sc 2843 dev/ic/midway.c sc->sc_dev.dv_xname, slot, tmp, tmp->m_len, tmp->m_data, tlen);
sc 2851 dev/ic/midway.c *data = EN_READDAT(sc, cur);
sc 2858 dev/ic/midway.c sc->sc_dev.dv_xname, slot, vci, tlen, need);
sc 2865 dev/ic/midway.c EN_DRQADD(sc, WORD_IDX(start,cur), vci, MIDDMA_JK, 0, 0, 0, 0);
sc 2868 dev/ic/midway.c sc->sc_dev.dv_xname, slot, vci, cur);
sc 2878 dev/ic/midway.c if (sc->is_adaptec) {
sc 2883 dev/ic/midway.c sc->sc_dev.dv_xname, slot, vci, tlen, need);
sc 2886 dev/ic/midway.c EN_DRQADD(sc, tlen, vci, 0, vtophys(data), mlen, slot, end);
sc 2902 dev/ic/midway.c if (sc->alburst &&
sc 2903 dev/ic/midway.c (needalign = (((unsigned long) data) & sc->bestburstmask)) != 0) {
sc 2904 dev/ic/midway.c cnt = sc->bestburstlen - needalign;
sc 2918 dev/ic/midway.c sc->sc_dev.dv_xname, slot, vci, cnt, need);
sc 2922 dev/ic/midway.c EN_DRQADD(sc, count, vci, bcode, vtophys(data), mlen, slot, end);
sc 2929 dev/ic/midway.c if (tlen >= sc->bestburstlen) {
sc 2930 dev/ic/midway.c count = tlen >> sc->bestburstshift;
sc 2931 dev/ic/midway.c cnt = count << sc->bestburstshift;
sc 2932 dev/ic/midway.c bcode = sc->bestburstcode;
sc 2937 dev/ic/midway.c sc->sc_dev.dv_xname, slot, vci, cnt, need);
sc 2941 dev/ic/midway.c EN_DRQADD(sc, count, vci, bcode, vtophys(data), mlen, slot, end);
sc 2956 dev/ic/midway.c sc->sc_dev.dv_xname, slot, vci, tlen, need);
sc 2959 dev/ic/midway.c EN_DRQADD(sc, count, vci, bcode, vtophys(data), mlen, slot, end);
sc 2975 dev/ic/midway.c sc->sc_dev.dv_xname, slot, vci, fill);
sc 2978 dev/ic/midway.c sc->sc_dev.dv_xname, slot, vci, dma, cur);
sc 2981 dev/ic/midway.c EN_DRQADD(sc, WORD_IDX(start,cur), vci, MIDDMA_JK, 0, mlen,
sc 3002 dev/ic/midway.c IF_ENQUEUE(&sc->rxslot[slot].indma, m);
sc 3004 dev/ic/midway.c sc->rxslot[slot].cur = cur; /* update master copy of 'cur' */
sc 3008 dev/ic/midway.c sc->sc_dev.dv_xname, slot, vci, cur);
sc 3039 dev/ic/midway.c struct en_softc *sc;
sc 3044 dev/ic/midway.c sc = (struct en_softc *) en_cd.cd_devs[lcv];
sc 3045 dev/ic/midway.c if (sc == NULL) continue;
sc 3049 dev/ic/midway.c printf("dumping device %s at level 0x%b\n", sc->sc_dev.dv_xname, level,
sc 3052 dev/ic/midway.c if (sc->dtq_us == 0) {
sc 3060 dev/ic/midway.c sc->mfix, sc->mfixfail, sc->headbyte, sc->tailbyte, sc->tailflush);
sc 3061 dev/ic/midway.c printf(" %d rx dma overflow interrupts\n", sc->dmaovr);
sc 3063 dev/ic/midway.c sc->txoutspace);
sc 3064 dev/ic/midway.c printf(" %d times we ran out of DTQs\n", sc->txdtqout);
sc 3065 dev/ic/midway.c printf(" %d times we launched a packet\n", sc->launch);
sc 3066 dev/ic/midway.c printf(" %d times we launched without on-board header\n", sc->lheader);
sc 3067 dev/ic/midway.c printf(" %d times we launched without on-board tail\n", sc->ltail);
sc 3068 dev/ic/midway.c printf(" %d times we pulled the hw service list\n", sc->hwpull);
sc 3070 dev/ic/midway.c sc->swadd);
sc 3072 dev/ic/midway.c sc->rxqnotus);
sc 3073 dev/ic/midway.c printf(" %d times RX pulled a good mbuf from Q\n", sc->rxqus);
sc 3074 dev/ic/midway.c printf(" %d times we ran out of mbufs *and* DRQs\n", sc->rxoutboth);
sc 3075 dev/ic/midway.c printf(" %d times we ran out of DRQs\n", sc->rxdrqout);
sc 3077 dev/ic/midway.c printf(" %d transmit packets dropped due to mbsize\n", sc->txmbovr);
sc 3078 dev/ic/midway.c printf(" %d cells trashed due to turned off rxvc\n", sc->vtrash);
sc 3079 dev/ic/midway.c printf(" %d cells trashed due to totally full buffer\n", sc->otrash);
sc 3080 dev/ic/midway.c printf(" %d cells trashed due almost full buffer\n", sc->ttrash);
sc 3081 dev/ic/midway.c printf(" %d rx mbuf allocation failures\n", sc->rxmbufout);
sc 3093 dev/ic/midway.c printf("resid = 0x%x\n", EN_READ(sc, MID_RESID));
sc 3095 dev/ic/midway.c EN_READ(sc, MID_INTSTAT), MID_INTBITS);
sc 3097 dev/ic/midway.c EN_READ(sc, MID_INTENA), MID_INTBITS);
sc 3098 dev/ic/midway.c printf("mcsr = 0x%b\n", EN_READ(sc, MID_MAST_CSR), MID_MCSRBITS);
sc 3099 dev/ic/midway.c printf("serv_write = [chip=%d] [us=%d]\n", EN_READ(sc, MID_SERV_WRITE),
sc 3100 dev/ic/midway.c MID_SL_A2REG(sc->hwslistp));
sc 3101 dev/ic/midway.c printf("dma addr = 0x%x\n", EN_READ(sc, MID_DMA_ADDR));
sc 3103 dev/ic/midway.c MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX)),
sc 3104 dev/ic/midway.c MID_DRQ_REG2A(EN_READ(sc, MID_DMA_WRRX)), sc->drq_chip, sc->drq_us);
sc 3106 dev/ic/midway.c MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX)),
sc 3107 dev/ic/midway.c MID_DTQ_REG2A(EN_READ(sc, MID_DMA_WRTX)), sc->dtq_chip, sc->dtq_us);
sc 3111 dev/ic/midway.c if (sc->txspeed[cnt])
sc 3112 dev/ic/midway.c printf(" vci%d=0x%x", cnt, sc->txspeed[cnt]);
sc 3117 dev/ic/midway.c if (sc->rxvc2slot[cnt] != RX_NONE)
sc 3118 dev/ic/midway.c printf(" %d->%d", cnt, sc->rxvc2slot[cnt]);
sc 3127 dev/ic/midway.c sc->txslot[slot].start, sc->txslot[slot].stop, sc->txslot[slot].cur,
sc 3128 dev/ic/midway.c (sc->txslot[slot].cur - sc->txslot[slot].start)/4);
sc 3129 dev/ic/midway.c printf("mbsize=%d, bfree=%d\n", sc->txslot[slot].mbsize,
sc 3130 dev/ic/midway.c sc->txslot[slot].bfree);
sc 3132 dev/ic/midway.c MIDX_BASE(EN_READ(sc, MIDX_PLACE(slot))),
sc 3133 dev/ic/midway.c MIDX_SZ(EN_READ(sc, MIDX_PLACE(slot))),
sc 3134 dev/ic/midway.c EN_READ(sc, MIDX_READPTR(slot)), EN_READ(sc, MIDX_DESCSTART(slot)));
sc 3140 dev/ic/midway.c for (slot = 0 ; slot < sc->en_nrx; slot++) {
sc 3142 dev/ic/midway.c sc->rxslot[slot].atm_vci, sc->rxslot[slot].start,
sc 3143 dev/ic/midway.c sc->rxslot[slot].stop, sc->rxslot[slot].cur);
sc 3145 dev/ic/midway.c sc->rxslot[slot].mode, sc->rxslot[slot].atm_flags,
sc 3146 dev/ic/midway.c sc->rxslot[slot].oth_flags);
sc 3148 dev/ic/midway.c EN_READ(sc, MID_VC(sc->rxslot[slot].atm_vci)),
sc 3149 dev/ic/midway.c EN_READ(sc, MID_DST_RP(sc->rxslot[slot].atm_vci)),
sc 3150 dev/ic/midway.c EN_READ(sc, MID_WP_ST_CNT(sc->rxslot[slot].atm_vci)));
sc 3156 dev/ic/midway.c sc->need_dtqs, sc->dtq_free);
sc 3157 dev/ic/midway.c ptr = sc->dtq_chip;
sc 3158 dev/ic/midway.c while (ptr != sc->dtq_us) {
sc 3159 dev/ic/midway.c reg = EN_READ(sc, ptr);
sc 3161 dev/ic/midway.c sc->dtq[MID_DTQ_A2REG(ptr)], MID_DMA_CNT(reg), MID_DMA_TXCHAN(reg),
sc 3162 dev/ic/midway.c (reg & MID_DMA_END) != 0, MID_DMA_TYPE(reg), EN_READ(sc, ptr+4));
sc 3169 dev/ic/midway.c sc->need_drqs, sc->drq_free);
sc 3170 dev/ic/midway.c ptr = sc->drq_chip;
sc 3171 dev/ic/midway.c while (ptr != sc->drq_us) {
sc 3172 dev/ic/midway.c reg = EN_READ(sc, ptr);
sc 3174 dev/ic/midway.c sc->drq[MID_DRQ_A2REG(ptr)], MID_DMA_CNT(reg), MID_DMA_RXVCI(reg),
sc 3175 dev/ic/midway.c (reg & MID_DMA_END) != 0, MID_DMA_TYPE(reg), EN_READ(sc, ptr+4));
sc 3181 dev/ic/midway.c printf(" swslist [size=%d]: ", sc->swsl_size);
sc 3182 dev/ic/midway.c for (cnt = sc->swsl_head ; cnt != sc->swsl_tail ;
sc 3184 dev/ic/midway.c printf("0x%x ", sc->swslist[cnt]);
sc 3201 dev/ic/midway.c struct en_softc *sc;
sc 3205 dev/ic/midway.c (sc = (struct en_softc *) en_cd.cd_devs[unit]) == NULL) {
sc 3216 dev/ic/midway.c reg = EN_READ(sc, addr);
sc 148 dev/ic/mpi.c mpi_attach(struct mpi_softc *sc)
sc 156 dev/ic/mpi.c mpi_write(sc, MPI_INTR_MASK,
sc 159 dev/ic/mpi.c if (mpi_init(sc) != 0) {
sc 160 dev/ic/mpi.c printf("%s: unable to initialise\n", DEVNAME(sc));
sc 164 dev/ic/mpi.c if (mpi_iocfacts(sc) != 0) {
sc 165 dev/ic/mpi.c printf("%s: unable to get iocfacts\n", DEVNAME(sc));
sc 169 dev/ic/mpi.c if (mpi_alloc_ccbs(sc) != 0) {
sc 174 dev/ic/mpi.c if (mpi_alloc_replies(sc) != 0) {
sc 175 dev/ic/mpi.c printf("%s: unable to allocate reply space\n", DEVNAME(sc));
sc 179 dev/ic/mpi.c if (mpi_iocinit(sc) != 0) {
sc 180 dev/ic/mpi.c printf("%s: unable to send iocinit\n", DEVNAME(sc));
sc 185 dev/ic/mpi.c if (mpi_wait_eq(sc, MPI_DOORBELL, MPI_DOORBELL_STATE,
sc 187 dev/ic/mpi.c printf("%s: state: 0x%08x\n", DEVNAME(sc),
sc 188 dev/ic/mpi.c mpi_read_db(sc) & MPI_DOORBELL_STATE);
sc 189 dev/ic/mpi.c printf("%s: operational state timeout\n", DEVNAME(sc));
sc 193 dev/ic/mpi.c mpi_push_replies(sc);
sc 195 dev/ic/mpi.c if (mpi_portfacts(sc) != 0) {
sc 196 dev/ic/mpi.c printf("%s: unable to get portfacts\n", DEVNAME(sc));
sc 201 dev/ic/mpi.c if (mpi_eventnotify(sc) != 0) {
sc 202 dev/ic/mpi.c printf("%s: unable to get portfacts\n", DEVNAME(sc));
sc 207 dev/ic/mpi.c if (mpi_portenable(sc) != 0) {
sc 208 dev/ic/mpi.c printf("%s: unable to enable port\n", DEVNAME(sc));
sc 212 dev/ic/mpi.c if (mpi_fwupload(sc) != 0) {
sc 213 dev/ic/mpi.c printf("%s: unable to upload firmware\n", DEVNAME(sc));
sc 217 dev/ic/mpi.c if (sc->sc_porttype == MPI_PORTFACTS_PORTTYPE_SCSI)
sc 218 dev/ic/mpi.c mpi_squash_ppr(sc);
sc 221 dev/ic/mpi.c sc->sc_link.device = &mpi_dev;
sc 222 dev/ic/mpi.c sc->sc_link.adapter = &mpi_switch;
sc 223 dev/ic/mpi.c sc->sc_link.adapter_softc = sc;
sc 224 dev/ic/mpi.c sc->sc_link.adapter_target = sc->sc_target;
sc 225 dev/ic/mpi.c sc->sc_link.adapter_buswidth = sc->sc_buswidth;
sc 226 dev/ic/mpi.c sc->sc_link.openings = sc->sc_maxcmds / sc->sc_buswidth;
sc 229 dev/ic/mpi.c saa.saa_sc_link = &sc->sc_link;
sc 232 dev/ic/mpi.c sc->sc_scsibus = (struct scsibus_softc *) config_found(&sc->sc_dev,
sc 236 dev/ic/mpi.c mpi_get_raid(sc);
sc 239 dev/ic/mpi.c if (sc->sc_porttype == MPI_PORTFACTS_PORTTYPE_SCSI)
sc 240 dev/ic/mpi.c mpi_run_ppr(sc);
sc 243 dev/ic/mpi.c mpi_write(sc, MPI_INTR_MASK, MPI_INTR_MASK_DOORBELL);
sc 248 dev/ic/mpi.c bus_dmamap_sync(sc->sc_dmat, MPI_DMA_MAP(sc->sc_replies),
sc 250 dev/ic/mpi.c mpi_dmamem_free(sc, sc->sc_replies);
sc 252 dev/ic/mpi.c while ((ccb = mpi_get_ccb(sc)) != NULL)
sc 253 dev/ic/mpi.c bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap);
sc 254 dev/ic/mpi.c mpi_dmamem_free(sc, sc->sc_requests);
sc 255 dev/ic/mpi.c free(sc->sc_ccbs, M_DEVBUF);
sc 261 dev/ic/mpi.c mpi_squash_ppr(struct mpi_softc *sc)
sc 267 dev/ic/mpi.c DNPRINTF(MPI_D_PPR, "%s: mpi_squash_ppr\n", DEVNAME(sc));
sc 269 dev/ic/mpi.c for (i = 0; i < sc->sc_buswidth; i++) {
sc 270 dev/ic/mpi.c if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_SCSI_SPI_DEV,
sc 274 dev/ic/mpi.c if (mpi_cfg_page(sc, i, &hdr, 1, &page, sizeof(page)) != 0)
sc 279 dev/ic/mpi.c "req_params2: 0x%02x conf: 0x%08x\n", DEVNAME(sc), i,
sc 289 dev/ic/mpi.c if (mpi_cfg_page(sc, i, &hdr, 0, &page, sizeof(page)) != 0)
sc 295 dev/ic/mpi.c mpi_run_ppr(struct mpi_softc *sc)
sc 305 dev/ic/mpi.c if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_SCSI_SPI_PORT, 0, 0x0,
sc 308 dev/ic/mpi.c DEVNAME(sc));
sc 312 dev/ic/mpi.c if (mpi_cfg_page(sc, 0x0, &hdr, 1, &port_pg, sizeof(port_pg)) != 0) {
sc 314 dev/ic/mpi.c DEVNAME(sc));
sc 318 dev/ic/mpi.c for (i = 0; i < sc->sc_buswidth; i++) {
sc 319 dev/ic/mpi.c link = sc->sc_scsibus->sc_link[i][0];
sc 328 dev/ic/mpi.c while (mpi_ppr(sc, link, NULL, port_pg.min_period,
sc 333 dev/ic/mpi.c if ((sc->sc_flags & MPI_F_RAID) == 0)
sc 336 dev/ic/mpi.c if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_IOC, 3, 0x0,
sc 339 dev/ic/mpi.c "fetch ioc pg 3 header\n", DEVNAME(sc));
sc 347 dev/ic/mpi.c "allocate ioc pg 3\n", DEVNAME(sc));
sc 352 dev/ic/mpi.c if (mpi_cfg_page(sc, 0, &hdr, 1, physdisk_pg, pagelen) != 0) {
sc 354 dev/ic/mpi.c "fetch ioc page 3\n", DEVNAME(sc));
sc 358 dev/ic/mpi.c DNPRINTF(MPI_D_PPR|MPI_D_PPR, "%s: no_phys_disks: %d\n", DEVNAME(sc),
sc 365 dev/ic/mpi.c "num: %d\n", DEVNAME(sc), physdisk->phys_disk_id,
sc 369 dev/ic/mpi.c if (physdisk->phys_disk_ioc != sc->sc_ioc_number)
sc 373 dev/ic/mpi.c while (mpi_ppr(sc, NULL, physdisk, port_pg.min_period,
sc 383 dev/ic/mpi.c mpi_ppr(struct mpi_softc *sc, struct scsi_link *link,
sc 394 dev/ic/mpi.c "link quirks: 0x%x\n", DEVNAME(sc), period, offset, try,
sc 413 dev/ic/mpi.c if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_SCSI_SPI_DEV, 0,
sc 416 dev/ic/mpi.c DEVNAME(sc));
sc 420 dev/ic/mpi.c if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_SCSI_SPI_DEV, 1,
sc 423 dev/ic/mpi.c DEVNAME(sc));
sc 428 dev/ic/mpi.c if (mpi_cfg_page(sc, address, &hdr0, 1, &pg0, sizeof(pg0)) != 0) {
sc 430 dev/ic/mpi.c DEVNAME(sc));
sc 436 dev/ic/mpi.c "info: 0x%08x\n", DEVNAME(sc), pg0.neg_params1, pg0.neg_offset,
sc 440 dev/ic/mpi.c if (mpi_cfg_page(sc, address, &hdr1, 1, &pg1, sizeof(pg1)) != 0) {
sc 442 dev/ic/mpi.c DEVNAME(sc));
sc 448 dev/ic/mpi.c "conf: 0x%08x\n", DEVNAME(sc), pg1.req_params1, pg1.req_offset,
sc 484 dev/ic/mpi.c "conf: 0x%08x\n", DEVNAME(sc), pg1.req_params1, pg1.req_offset,
sc 487 dev/ic/mpi.c if (mpi_cfg_page(sc, address, &hdr1, 0, &pg1, sizeof(pg1)) != 0) {
sc 489 dev/ic/mpi.c DEVNAME(sc));
sc 493 dev/ic/mpi.c if (mpi_cfg_page(sc, address, &hdr1, 1, &pg1, sizeof(pg1)) != 0) {
sc 495 dev/ic/mpi.c DEVNAME(sc));
sc 501 dev/ic/mpi.c "conf: 0x%08x\n", DEVNAME(sc), pg1.req_params1, pg1.req_offset,
sc 504 dev/ic/mpi.c if (mpi_inq(sc, id, raid) != 0) {
sc 506 dev/ic/mpi.c "target %d\n", DEVNAME(sc), link->target);
sc 510 dev/ic/mpi.c if (mpi_cfg_page(sc, address, &hdr0, 1, &pg0, sizeof(pg0)) != 0) {
sc 512 dev/ic/mpi.c "inquiry\n", DEVNAME(sc));
sc 518 dev/ic/mpi.c "info: 0x%08x\n", DEVNAME(sc), pg0.neg_params1, pg0.neg_offset,
sc 523 dev/ic/mpi.c DEVNAME(sc));
sc 529 dev/ic/mpi.c DEVNAME(sc));
sc 535 dev/ic/mpi.c DEVNAME(sc), letoh32(pg0.information));
sc 561 dev/ic/mpi.c "QAS %d DT %d IU %d\n", DEVNAME(sc), raid ? "phys disk" : "target",
sc 573 dev/ic/mpi.c mpi_inq(struct mpi_softc *sc, u_int16_t target, int physdisk)
sc 587 dev/ic/mpi.c DNPRINTF(MPI_D_PPR, "%s: mpi_inq\n", DEVNAME(sc));
sc 593 dev/ic/mpi.c ccb = mpi_get_ccb(sc);
sc 641 dev/ic/mpi.c if (mpi_poll(sc, ccb, 5000) != 0)
sc 645 dev/ic/mpi.c mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva);
sc 647 dev/ic/mpi.c mpi_put_ccb(sc, ccb);
sc 653 dev/ic/mpi.c mpi_detach(struct mpi_softc *sc)
sc 661 dev/ic/mpi.c struct mpi_softc *sc = arg;
sc 665 dev/ic/mpi.c while ((reg = mpi_pop_reply(sc)) != 0xffffffff) {
sc 666 dev/ic/mpi.c mpi_reply(sc, reg);
sc 674 dev/ic/mpi.c mpi_reply(struct mpi_softc *sc, u_int32_t reg)
sc 683 dev/ic/mpi.c DNPRINTF(MPI_D_INTR, "%s: mpi_reply reg: 0x%08x\n", DEVNAME(sc), reg);
sc 686 dev/ic/mpi.c bus_dmamap_sync(sc->sc_dmat,
sc 687 dev/ic/mpi.c MPI_DMA_MAP(sc->sc_replies), 0, PAGE_SIZE,
sc 692 dev/ic/mpi.c i = (reply_dva - (u_int32_t)MPI_DMA_DVA(sc->sc_replies)) /
sc 694 dev/ic/mpi.c rcb = &sc->sc_rcbs[i];
sc 699 dev/ic/mpi.c bus_dmamap_sync(sc->sc_dmat,
sc 700 dev/ic/mpi.c MPI_DMA_MAP(sc->sc_replies), 0, PAGE_SIZE,
sc 710 dev/ic/mpi.c DEVNAME(sc));
sc 715 dev/ic/mpi.c DEVNAME(sc), id, reply);
sc 717 dev/ic/mpi.c ccb = &sc->sc_ccbs[id];
sc 719 dev/ic/mpi.c bus_dmamap_sync(sc->sc_dmat, MPI_DMA_MAP(sc->sc_requests),
sc 731 dev/ic/mpi.c mpi_dmamem_alloc(struct mpi_softc *sc, size_t size)
sc 743 dev/ic/mpi.c if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 747 dev/ic/mpi.c if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &mdm->mdm_seg,
sc 751 dev/ic/mpi.c if (bus_dmamem_map(sc->sc_dmat, &mdm->mdm_seg, nsegs, size,
sc 755 dev/ic/mpi.c if (bus_dmamap_load(sc->sc_dmat, mdm->mdm_map, mdm->mdm_kva, size,
sc 763 dev/ic/mpi.c DEVNAME(sc), size, mdm->mdm_map, nsegs, mdm->mdm_seg, mdm->mdm_kva);
sc 768 dev/ic/mpi.c bus_dmamem_unmap(sc->sc_dmat, mdm->mdm_kva, size);
sc 770 dev/ic/mpi.c bus_dmamem_free(sc->sc_dmat, &mdm->mdm_seg, 1);
sc 772 dev/ic/mpi.c bus_dmamap_destroy(sc->sc_dmat, mdm->mdm_map);
sc 780 dev/ic/mpi.c mpi_dmamem_free(struct mpi_softc *sc, struct mpi_dmamem *mdm)
sc 782 dev/ic/mpi.c DNPRINTF(MPI_D_MEM, "%s: mpi_dmamem_free %#x\n", DEVNAME(sc), mdm);
sc 784 dev/ic/mpi.c bus_dmamap_unload(sc->sc_dmat, mdm->mdm_map);
sc 785 dev/ic/mpi.c bus_dmamem_unmap(sc->sc_dmat, mdm->mdm_kva, mdm->mdm_size);
sc 786 dev/ic/mpi.c bus_dmamem_free(sc->sc_dmat, &mdm->mdm_seg, 1);
sc 787 dev/ic/mpi.c bus_dmamap_destroy(sc->sc_dmat, mdm->mdm_map);
sc 792 dev/ic/mpi.c mpi_alloc_ccbs(struct mpi_softc *sc)
sc 798 dev/ic/mpi.c TAILQ_INIT(&sc->sc_ccb_free);
sc 800 dev/ic/mpi.c sc->sc_ccbs = malloc(sizeof(struct mpi_ccb) * sc->sc_maxcmds,
sc 802 dev/ic/mpi.c if (sc->sc_ccbs == NULL) {
sc 803 dev/ic/mpi.c printf("%s: unable to allocate ccbs\n", DEVNAME(sc));
sc 806 dev/ic/mpi.c bzero(sc->sc_ccbs, sizeof(struct mpi_ccb) * sc->sc_maxcmds);
sc 808 dev/ic/mpi.c sc->sc_requests = mpi_dmamem_alloc(sc,
sc 809 dev/ic/mpi.c MPI_REQUEST_SIZE * sc->sc_maxcmds);
sc 810 dev/ic/mpi.c if (sc->sc_requests == NULL) {
sc 811 dev/ic/mpi.c printf("%s: unable to allocate ccb dmamem\n", DEVNAME(sc));
sc 814 dev/ic/mpi.c cmd = MPI_DMA_KVA(sc->sc_requests);
sc 815 dev/ic/mpi.c bzero(cmd, MPI_REQUEST_SIZE * sc->sc_maxcmds);
sc 817 dev/ic/mpi.c for (i = 0; i < sc->sc_maxcmds; i++) {
sc 818 dev/ic/mpi.c ccb = &sc->sc_ccbs[i];
sc 820 dev/ic/mpi.c if (bus_dmamap_create(sc->sc_dmat, MAXPHYS,
sc 821 dev/ic/mpi.c sc->sc_max_sgl_len, MAXPHYS, 0, 0,
sc 823 dev/ic/mpi.c printf("%s: unable to create dma map\n", DEVNAME(sc));
sc 827 dev/ic/mpi.c ccb->ccb_sc = sc;
sc 832 dev/ic/mpi.c ccb->ccb_cmd_dva = (u_int32_t)MPI_DMA_DVA(sc->sc_requests) +
sc 837 dev/ic/mpi.c DEVNAME(sc), i, ccb, ccb->ccb_dmamap, ccb->ccb_sc,
sc 841 dev/ic/mpi.c mpi_put_ccb(sc, ccb);
sc 847 dev/ic/mpi.c while ((ccb = mpi_get_ccb(sc)) != NULL)
sc 848 dev/ic/mpi.c bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap);
sc 850 dev/ic/mpi.c mpi_dmamem_free(sc, sc->sc_requests);
sc 852 dev/ic/mpi.c free(sc->sc_ccbs, M_DEVBUF);
sc 858 dev/ic/mpi.c mpi_get_ccb(struct mpi_softc *sc)
sc 862 dev/ic/mpi.c ccb = TAILQ_FIRST(&sc->sc_ccb_free);
sc 864 dev/ic/mpi.c DNPRINTF(MPI_D_CCB, "%s: mpi_get_ccb == NULL\n", DEVNAME(sc));
sc 868 dev/ic/mpi.c TAILQ_REMOVE(&sc->sc_ccb_free, ccb, ccb_link);
sc 872 dev/ic/mpi.c DNPRINTF(MPI_D_CCB, "%s: mpi_get_ccb %#x\n", DEVNAME(sc), ccb);
sc 878 dev/ic/mpi.c mpi_put_ccb(struct mpi_softc *sc, struct mpi_ccb *ccb)
sc 880 dev/ic/mpi.c DNPRINTF(MPI_D_CCB, "%s: mpi_put_ccb %#x\n", DEVNAME(sc), ccb);
sc 886 dev/ic/mpi.c TAILQ_INSERT_TAIL(&sc->sc_ccb_free, ccb, ccb_link);
sc 890 dev/ic/mpi.c mpi_alloc_replies(struct mpi_softc *sc)
sc 892 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: mpi_alloc_replies\n", DEVNAME(sc));
sc 894 dev/ic/mpi.c sc->sc_rcbs = malloc(MPI_REPLY_COUNT * sizeof(struct mpi_rcb),
sc 896 dev/ic/mpi.c if (sc->sc_rcbs == NULL)
sc 899 dev/ic/mpi.c sc->sc_replies = mpi_dmamem_alloc(sc, PAGE_SIZE);
sc 900 dev/ic/mpi.c if (sc->sc_replies == NULL) {
sc 901 dev/ic/mpi.c free(sc->sc_rcbs, M_DEVBUF);
sc 909 dev/ic/mpi.c mpi_push_replies(struct mpi_softc *sc)
sc 912 dev/ic/mpi.c char *kva = MPI_DMA_KVA(sc->sc_replies);
sc 915 dev/ic/mpi.c bus_dmamap_sync(sc->sc_dmat, MPI_DMA_MAP(sc->sc_replies),
sc 919 dev/ic/mpi.c rcb = &sc->sc_rcbs[i];
sc 922 dev/ic/mpi.c rcb->rcb_reply_dva = (u_int32_t)MPI_DMA_DVA(sc->sc_replies) +
sc 924 dev/ic/mpi.c mpi_push_reply(sc, rcb->rcb_reply_dva);
sc 929 dev/ic/mpi.c mpi_start(struct mpi_softc *sc, struct mpi_ccb *ccb)
sc 931 dev/ic/mpi.c DNPRINTF(MPI_D_RW, "%s: mpi_start %#x\n", DEVNAME(sc),
sc 934 dev/ic/mpi.c bus_dmamap_sync(sc->sc_dmat, MPI_DMA_MAP(sc->sc_requests),
sc 939 dev/ic/mpi.c mpi_write(sc, MPI_REQ_QUEUE, ccb->ccb_cmd_dva);
sc 943 dev/ic/mpi.c mpi_complete(struct mpi_softc *sc, struct mpi_ccb *ccb, int timeout)
sc 948 dev/ic/mpi.c DNPRINTF(MPI_D_INTR, "%s: mpi_complete timeout %d\n", DEVNAME(sc),
sc 952 dev/ic/mpi.c reg = mpi_pop_reply(sc);
sc 961 dev/ic/mpi.c id = mpi_reply(sc, reg);
sc 969 dev/ic/mpi.c mpi_poll(struct mpi_softc *sc, struct mpi_ccb *ccb, int timeout)
sc 974 dev/ic/mpi.c DNPRINTF(MPI_D_CMD, "%s: mpi_poll\n", DEVNAME(sc));
sc 977 dev/ic/mpi.c mpi_start(sc, ccb);
sc 978 dev/ic/mpi.c error = mpi_complete(sc, ccb, timeout);
sc 988 dev/ic/mpi.c struct mpi_softc *sc = link->adapter_softc;
sc 994 dev/ic/mpi.c DNPRINTF(MPI_D_CMD, "%s: mpi_scsi_cmd\n", DEVNAME(sc));
sc 998 dev/ic/mpi.c DEVNAME(sc), xs->cmdlen);
sc 1011 dev/ic/mpi.c ccb = mpi_get_ccb(sc);
sc 1021 dev/ic/mpi.c DEVNAME(sc), ccb->ccb_id, xs->flags);
sc 1071 dev/ic/mpi.c mpi_put_ccb(sc, ccb);
sc 1080 dev/ic/mpi.c if (mpi_poll(sc, ccb, xs->timeout) != 0)
sc 1086 dev/ic/mpi.c mpi_start(sc, ccb);
sc 1094 dev/ic/mpi.c struct mpi_softc *sc = ccb->ccb_sc;
sc 1101 dev/ic/mpi.c bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize,
sc 1105 dev/ic/mpi.c bus_dmamap_unload(sc->sc_dmat, dmap);
sc 1116 dev/ic/mpi.c mpi_put_ccb(sc, ccb);
sc 1124 dev/ic/mpi.c "flags 0x%x\n", DEVNAME(sc), xs->cmd->opcode, xs->datalen,
sc 1127 dev/ic/mpi.c "function: 0x%02x\n", DEVNAME(sc), sie->target_id, sie->bus,
sc 1130 dev/ic/mpi.c "msg_flags: 0x%02x\n", DEVNAME(sc), sie->cdb_length,
sc 1132 dev/ic/mpi.c DNPRINTF(MPI_D_CMD, "%s: msg_context: 0x%08x\n", DEVNAME(sc),
sc 1135 dev/ic/mpi.c "ioc_status: 0x%04x\n", DEVNAME(sc), sie->scsi_status,
sc 1137 dev/ic/mpi.c DNPRINTF(MPI_D_CMD, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc),
sc 1139 dev/ic/mpi.c DNPRINTF(MPI_D_CMD, "%s: transfer_count: %d\n", DEVNAME(sc),
sc 1141 dev/ic/mpi.c DNPRINTF(MPI_D_CMD, "%s: sense_count: %d\n", DEVNAME(sc),
sc 1143 dev/ic/mpi.c DNPRINTF(MPI_D_CMD, "%s: response_info: 0x%08x\n", DEVNAME(sc),
sc 1145 dev/ic/mpi.c DNPRINTF(MPI_D_CMD, "%s: tag: 0x%04x\n", DEVNAME(sc),
sc 1198 dev/ic/mpi.c DNPRINTF(MPI_D_CMD, "%s: xs err: 0x%02x status: %d\n", DEVNAME(sc),
sc 1201 dev/ic/mpi.c mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva);
sc 1202 dev/ic/mpi.c mpi_put_ccb(sc, ccb);
sc 1215 dev/ic/mpi.c struct mpi_softc *sc = ccb->ccb_sc;
sc 1232 dev/ic/mpi.c error = bus_dmamap_load(sc->sc_dmat, dmap,
sc 1236 dev/ic/mpi.c printf("%s: error %d loading dmamap\n", DEVNAME(sc), error);
sc 1244 dev/ic/mpi.c if (dmap->dm_nsegs > sc->sc_first_sgl_len) {
sc 1245 dev/ic/mpi.c ce = &mcb->mcb_sgl[sc->sc_first_sgl_len - 1];
sc 1256 dev/ic/mpi.c DEVNAME(sc), sge->sg_hdr,
sc 1259 dev/ic/mpi.c if ((dmap->dm_nsegs - i) > sc->sc_chain_len) {
sc 1260 dev/ic/mpi.c nce = &nsge[sc->sc_chain_len - 1];
sc 1263 dev/ic/mpi.c sizeof(struct mpi_sge) * sc->sc_chain_len;
sc 1282 dev/ic/mpi.c DEVNAME(sc), ce->sg_hdr, ce->sg_hi_addr,
sc 1288 dev/ic/mpi.c DNPRINTF(MPI_D_DMA, "%s: %d: %d 0x%016llx\n", DEVNAME(sc),
sc 1301 dev/ic/mpi.c DEVNAME(sc), i, sge->sg_hdr, sge->sg_hi_addr,
sc 1311 dev/ic/mpi.c bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize,
sc 1334 dev/ic/mpi.c mpi_read(struct mpi_softc *sc, bus_size_t r)
sc 1338 dev/ic/mpi.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
sc 1340 dev/ic/mpi.c rv = bus_space_read_4(sc->sc_iot, sc->sc_ioh, r);
sc 1342 dev/ic/mpi.c DNPRINTF(MPI_D_RW, "%s: mpi_read %#x %#x\n", DEVNAME(sc), r, rv);
sc 1348 dev/ic/mpi.c mpi_write(struct mpi_softc *sc, bus_size_t r, u_int32_t v)
sc 1350 dev/ic/mpi.c DNPRINTF(MPI_D_RW, "%s: mpi_write %#x %#x\n", DEVNAME(sc), r, v);
sc 1352 dev/ic/mpi.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
sc 1353 dev/ic/mpi.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
sc 1358 dev/ic/mpi.c mpi_wait_eq(struct mpi_softc *sc, bus_size_t r, u_int32_t mask,
sc 1363 dev/ic/mpi.c DNPRINTF(MPI_D_RW, "%s: mpi_wait_eq %#x %#x %#x\n", DEVNAME(sc), r,
sc 1367 dev/ic/mpi.c if ((mpi_read(sc, r) & mask) == target)
sc 1376 dev/ic/mpi.c mpi_wait_ne(struct mpi_softc *sc, bus_size_t r, u_int32_t mask,
sc 1381 dev/ic/mpi.c DNPRINTF(MPI_D_RW, "%s: mpi_wait_ne %#x %#x %#x\n", DEVNAME(sc), r,
sc 1385 dev/ic/mpi.c if ((mpi_read(sc, r) & mask) != target)
sc 1394 dev/ic/mpi.c mpi_init(struct mpi_softc *sc)
sc 1400 dev/ic/mpi.c if (mpi_wait_ne(sc, MPI_DOORBELL, MPI_DOORBELL_STATE,
sc 1403 dev/ic/mpi.c "reset state\n", DEVNAME(sc));
sc 1408 dev/ic/mpi.c db = mpi_read_db(sc);
sc 1411 dev/ic/mpi.c DEVNAME(sc));
sc 1419 dev/ic/mpi.c DEVNAME(sc));
sc 1425 dev/ic/mpi.c "reset\n" , DEVNAME(sc));
sc 1426 dev/ic/mpi.c if (mpi_reset_soft(sc) != 0)
sc 1427 dev/ic/mpi.c mpi_reset_hard(sc);
sc 1432 dev/ic/mpi.c "out of reset\n", DEVNAME(sc));
sc 1433 dev/ic/mpi.c if (mpi_wait_ne(sc, MPI_DOORBELL, MPI_DOORBELL_STATE,
sc 1438 dev/ic/mpi.c db = mpi_read_db(sc);
sc 1445 dev/ic/mpi.c mpi_reset_soft(struct mpi_softc *sc)
sc 1447 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: mpi_reset_soft\n", DEVNAME(sc));
sc 1449 dev/ic/mpi.c if (mpi_read_db(sc) & MPI_DOORBELL_INUSE)
sc 1452 dev/ic/mpi.c mpi_write_db(sc,
sc 1454 dev/ic/mpi.c if (mpi_wait_eq(sc, MPI_INTR_STATUS,
sc 1458 dev/ic/mpi.c if (mpi_wait_eq(sc, MPI_DOORBELL, MPI_DOORBELL_STATE,
sc 1466 dev/ic/mpi.c mpi_reset_hard(struct mpi_softc *sc)
sc 1468 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: mpi_reset_hard\n", DEVNAME(sc));
sc 1471 dev/ic/mpi.c mpi_write(sc, MPI_WRITESEQ, 0xff);
sc 1472 dev/ic/mpi.c mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_1);
sc 1473 dev/ic/mpi.c mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_2);
sc 1474 dev/ic/mpi.c mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_3);
sc 1475 dev/ic/mpi.c mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_4);
sc 1476 dev/ic/mpi.c mpi_write(sc, MPI_WRITESEQ, MPI_WRITESEQ_5);
sc 1479 dev/ic/mpi.c mpi_write(sc, MPI_HOSTDIAG, MPI_HOSTDIAG_RESET_ADAPTER);
sc 1484 dev/ic/mpi.c mpi_write(sc, MPI_WRITESEQ, 0xff);
sc 1493 dev/ic/mpi.c mpi_handshake_send(struct mpi_softc *sc, void *buf, size_t dwords)
sc 1499 dev/ic/mpi.c if (mpi_read_db(sc) & MPI_DOORBELL_INUSE)
sc 1503 dev/ic/mpi.c if (mpi_read_intr(sc) & MPI_INTR_STATUS_DOORBELL)
sc 1504 dev/ic/mpi.c mpi_write_intr(sc, 0);
sc 1510 dev/ic/mpi.c mpi_write_db(sc, MPI_DOORBELL_FUNCTION(MPI_FUNCTION_HANDSHAKE) |
sc 1517 dev/ic/mpi.c if (mpi_wait_db_int(sc) != 0)
sc 1519 dev/ic/mpi.c mpi_write_intr(sc, 0);
sc 1522 dev/ic/mpi.c if (mpi_wait_db_ack(sc) != 0)
sc 1527 dev/ic/mpi.c mpi_write_db(sc, htole32(query[i]));
sc 1528 dev/ic/mpi.c if (mpi_wait_db_ack(sc) != 0)
sc 1536 dev/ic/mpi.c mpi_handshake_recv_dword(struct mpi_softc *sc, u_int32_t *dword)
sc 1542 dev/ic/mpi.c if (mpi_wait_db_int(sc) != 0)
sc 1544 dev/ic/mpi.c words[i] = letoh16(mpi_read_db(sc) & MPI_DOORBELL_DATA_MASK);
sc 1545 dev/ic/mpi.c mpi_write_intr(sc, 0);
sc 1552 dev/ic/mpi.c mpi_handshake_recv(struct mpi_softc *sc, void *buf, size_t dwords)
sc 1559 dev/ic/mpi.c if (mpi_handshake_recv_dword(sc, &dbuf[0]) != 0)
sc 1563 dev/ic/mpi.c DEVNAME(sc), dwords, reply->msg_length);
sc 1570 dev/ic/mpi.c if (mpi_handshake_recv_dword(sc, &dbuf[i]) != 0)
sc 1576 dev/ic/mpi.c if (mpi_handshake_recv_dword(sc, &dummy) != 0)
sc 1579 dev/ic/mpi.c "0x%08x\n", DEVNAME(sc), dummy);
sc 1583 dev/ic/mpi.c if (mpi_wait_db_int(sc) != 0)
sc 1585 dev/ic/mpi.c mpi_write_intr(sc, 0);
sc 1597 dev/ic/mpi.c mpi_iocfacts(struct mpi_softc *sc)
sc 1602 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: mpi_iocfacts\n", DEVNAME(sc));
sc 1612 dev/ic/mpi.c if (mpi_handshake_send(sc, &ifq, dwordsof(ifq)) != 0) {
sc 1614 dev/ic/mpi.c DEVNAME(sc));
sc 1618 dev/ic/mpi.c if (mpi_handshake_recv(sc, &ifp, dwordsof(ifp)) != 0) {
sc 1620 dev/ic/mpi.c DEVNAME(sc));
sc 1625 dev/ic/mpi.c DEVNAME(sc), ifp.function, ifp.msg_length,
sc 1628 dev/ic/mpi.c "hdrver: %d.%d\n", DEVNAME(sc), ifp.msg_flags,
sc 1631 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: message context: 0x%08x\n", DEVNAME(sc),
sc 1634 dev/ic/mpi.c DEVNAME(sc), letoh16(ifp.ioc_status),
sc 1636 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: iocloginfo: 0x%08x\n", DEVNAME(sc),
sc 1639 dev/ic/mpi.c "maxchdepth: %d\n", DEVNAME(sc), ifp.flags,
sc 1642 dev/ic/mpi.c DEVNAME(sc), letoh16(ifp.request_frame_size),
sc 1644 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: productid: 0x%04x\n", DEVNAME(sc),
sc 1646 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: hostmfahiaddr: 0x%08x\n", DEVNAME(sc),
sc 1650 dev/ic/mpi.c DEVNAME(sc), ifp.event_state, ifp.number_of_ports,
sc 1652 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: sensebufhiaddr: 0x%08x\n", DEVNAME(sc),
sc 1655 dev/ic/mpi.c DEVNAME(sc), ifp.max_buses, ifp.max_devices,
sc 1657 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: fw_image_size: %d\n", DEVNAME(sc),
sc 1659 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: ioc_capabilities: 0x%08x\n", DEVNAME(sc),
sc 1662 dev/ic/mpi.c "fw_version_dev: 0x%02x\n", DEVNAME(sc),
sc 1666 dev/ic/mpi.c DEVNAME(sc), letoh16(ifp.hi_priority_queue_depth));
sc 1668 dev/ic/mpi.c "addr 0x%08x %08x\n", DEVNAME(sc),
sc 1673 dev/ic/mpi.c sc->sc_maxcmds = letoh16(ifp.global_credits);
sc 1674 dev/ic/mpi.c sc->sc_maxchdepth = ifp.max_chain_depth;
sc 1675 dev/ic/mpi.c sc->sc_ioc_number = ifp.ioc_number;
sc 1676 dev/ic/mpi.c if (sc->sc_flags & MPI_F_SPI)
sc 1677 dev/ic/mpi.c sc->sc_buswidth = 16;
sc 1679 dev/ic/mpi.c sc->sc_buswidth =
sc 1682 dev/ic/mpi.c sc->sc_fw_len = letoh32(ifp.fw_image_size);
sc 1688 dev/ic/mpi.c sc->sc_first_sgl_len = ((letoh16(ifp.request_frame_size) * 4) -
sc 1690 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: first sgl len: %d\n", DEVNAME(sc),
sc 1691 dev/ic/mpi.c sc->sc_first_sgl_len);
sc 1693 dev/ic/mpi.c sc->sc_chain_len = (letoh16(ifp.request_frame_size) * 4) /
sc 1695 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: chain len: %d\n", DEVNAME(sc),
sc 1696 dev/ic/mpi.c sc->sc_chain_len);
sc 1699 dev/ic/mpi.c sc->sc_max_sgl_len = MPI_MAX_SGL - 1;
sc 1701 dev/ic/mpi.c sc->sc_max_sgl_len -= (MPI_MAX_SGL - sc->sc_first_sgl_len) /
sc 1702 dev/ic/mpi.c sc->sc_chain_len;
sc 1703 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: max sgl len: %d\n", DEVNAME(sc),
sc 1704 dev/ic/mpi.c sc->sc_max_sgl_len);
sc 1712 dev/ic/mpi.c mpi_iocinit(struct mpi_softc *sc)
sc 1718 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: mpi_iocinit\n", DEVNAME(sc));
sc 1726 dev/ic/mpi.c iiq.max_devices = (sc->sc_buswidth == 256) ? 0 : sc->sc_buswidth;
sc 1733 dev/ic/mpi.c hi_addr = (u_int32_t)((u_int64_t)MPI_DMA_DVA(sc->sc_requests) >> 32);
sc 1737 dev/ic/mpi.c hi_addr = (u_int32_t)((u_int64_t)MPI_DMA_DVA(sc->sc_replies) >> 32);
sc 1746 dev/ic/mpi.c if (mpi_handshake_send(sc, &iiq, dwordsof(iiq)) != 0) {
sc 1748 dev/ic/mpi.c DEVNAME(sc));
sc 1752 dev/ic/mpi.c if (mpi_handshake_recv(sc, &iip, dwordsof(iip)) != 0) {
sc 1754 dev/ic/mpi.c DEVNAME(sc));
sc 1759 dev/ic/mpi.c "whoinit: 0x%02x\n", DEVNAME(sc), iip.function,
sc 1762 dev/ic/mpi.c "max_devices: %d flags: 0x%02x\n", DEVNAME(sc), iip.msg_flags,
sc 1764 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: msg_context: 0x%08x\n", DEVNAME(sc),
sc 1766 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: ioc_status: 0x%04x\n", DEVNAME(sc),
sc 1768 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc),
sc 1775 dev/ic/mpi.c mpi_portfacts(struct mpi_softc *sc)
sc 1782 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: mpi_portfacts\n", DEVNAME(sc));
sc 1785 dev/ic/mpi.c ccb = mpi_get_ccb(sc);
sc 1789 dev/ic/mpi.c DEVNAME(sc));
sc 1802 dev/ic/mpi.c if (mpi_poll(sc, ccb, 50000) != 0) {
sc 1803 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: mpi_portfacts poll\n", DEVNAME(sc));
sc 1809 dev/ic/mpi.c DEVNAME(sc));
sc 1815 dev/ic/mpi.c DEVNAME(sc), pfp->function, pfp->msg_length);
sc 1817 dev/ic/mpi.c DEVNAME(sc), pfp->msg_flags, pfp->port_number);
sc 1818 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: msg_context: 0x%08x\n", DEVNAME(sc),
sc 1820 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: ioc_status: 0x%04x\n", DEVNAME(sc),
sc 1822 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc),
sc 1825 dev/ic/mpi.c DEVNAME(sc), letoh16(pfp->max_devices), pfp->port_type);
sc 1827 dev/ic/mpi.c DEVNAME(sc), letoh16(pfp->protocol_flags),
sc 1830 dev/ic/mpi.c "max_posted_cmd_buffers: %d\n", DEVNAME(sc),
sc 1833 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: max_lan_buckets: %d\n", DEVNAME(sc),
sc 1836 dev/ic/mpi.c sc->sc_porttype = pfp->port_type;
sc 1837 dev/ic/mpi.c sc->sc_target = letoh16(pfp->port_scsi_id);
sc 1839 dev/ic/mpi.c mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva);
sc 1842 dev/ic/mpi.c mpi_put_ccb(sc, ccb);
sc 1848 dev/ic/mpi.c mpi_eventnotify(struct mpi_softc *sc)
sc 1855 dev/ic/mpi.c ccb = mpi_get_ccb(sc);
sc 1859 dev/ic/mpi.c DEVNAME(sc));
sc 1871 dev/ic/mpi.c mpi_start(sc, ccb);
sc 1878 dev/ic/mpi.c struct mpi_softc *sc = ccb->ccb_sc;
sc 1882 dev/ic/mpi.c DNPRINTF(MPI_D_EVT, "%s: mpi_eventnotify_done\n", DEVNAME(sc));
sc 1885 dev/ic/mpi.c "data_length: %d\n", DEVNAME(sc), enp->function, enp->msg_length,
sc 1888 dev/ic/mpi.c DEVNAME(sc), enp->ack_required, enp->msg_flags);
sc 1889 dev/ic/mpi.c DNPRINTF(MPI_D_EVT, "%s: msg_context: 0x%08x\n", DEVNAME(sc),
sc 1891 dev/ic/mpi.c DNPRINTF(MPI_D_EVT, "%s: ioc_status: 0x%04x\n", DEVNAME(sc),
sc 1893 dev/ic/mpi.c DNPRINTF(MPI_D_EVT, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc),
sc 1895 dev/ic/mpi.c DNPRINTF(MPI_D_EVT, "%s: event: 0x%08x\n", DEVNAME(sc),
sc 1897 dev/ic/mpi.c DNPRINTF(MPI_D_EVT, "%s: event_context: 0x%08x\n", DEVNAME(sc),
sc 1907 dev/ic/mpi.c if (sc->sc_scsibus == NULL)
sc 1910 dev/ic/mpi.c if (scsi_task(mpi_evt_sas, sc, ccb->ccb_rcb, 0) != 0) {
sc 1912 dev/ic/mpi.c DEVNAME(sc));
sc 1919 dev/ic/mpi.c printf("%s: unhandled event 0x%02x\n", DEVNAME(sc),
sc 1926 dev/ic/mpi.c mpi_eventack(sc, enp);
sc 1927 dev/ic/mpi.c mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva);
sc 1932 dev/ic/mpi.c mpi_put_ccb(sc, ccb);
sc 1939 dev/ic/mpi.c struct mpi_softc *sc = xsc;
sc 1956 dev/ic/mpi.c scsi_probe_target(sc->sc_scsibus, ch->target);
sc 1960 dev/ic/mpi.c scsi_detach_target(sc->sc_scsibus, ch->target, DETACH_FORCE);
sc 1969 dev/ic/mpi.c "0x%02x\n", DEVNAME(sc), ch->reason);
sc 1974 dev/ic/mpi.c mpi_push_reply(sc, rcb->rcb_reply_dva);
sc 1976 dev/ic/mpi.c mpi_eventack(sc, enp);
sc 1981 dev/ic/mpi.c mpi_eventack(struct mpi_softc *sc, struct mpi_msg_event_reply *enp)
sc 1986 dev/ic/mpi.c ccb = mpi_get_ccb(sc);
sc 1988 dev/ic/mpi.c DNPRINTF(MPI_D_EVT, "%s: mpi_eventack ccb_get\n", DEVNAME(sc));
sc 2001 dev/ic/mpi.c mpi_start(sc, ccb);
sc 2008 dev/ic/mpi.c struct mpi_softc *sc = ccb->ccb_sc;
sc 2010 dev/ic/mpi.c DNPRINTF(MPI_D_EVT, "%s: event ack done\n", DEVNAME(sc));
sc 2012 dev/ic/mpi.c mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva);
sc 2013 dev/ic/mpi.c mpi_put_ccb(sc, ccb);
sc 2017 dev/ic/mpi.c mpi_portenable(struct mpi_softc *sc)
sc 2024 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: mpi_portenable\n", DEVNAME(sc));
sc 2027 dev/ic/mpi.c ccb = mpi_get_ccb(sc);
sc 2031 dev/ic/mpi.c DEVNAME(sc));
sc 2042 dev/ic/mpi.c if (mpi_poll(sc, ccb, 50000) != 0) {
sc 2043 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: mpi_portenable poll\n", DEVNAME(sc));
sc 2049 dev/ic/mpi.c DEVNAME(sc));
sc 2054 dev/ic/mpi.c mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva);
sc 2055 dev/ic/mpi.c mpi_put_ccb(sc, ccb);
sc 2061 dev/ic/mpi.c mpi_fwupload(struct mpi_softc *sc)
sc 2073 dev/ic/mpi.c if (sc->sc_fw_len == 0)
sc 2076 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: mpi_fwupload\n", DEVNAME(sc));
sc 2078 dev/ic/mpi.c sc->sc_fw = mpi_dmamem_alloc(sc, sc->sc_fw_len);
sc 2079 dev/ic/mpi.c if (sc->sc_fw == NULL) {
sc 2081 dev/ic/mpi.c DEVNAME(sc), sc->sc_fw_len);
sc 2086 dev/ic/mpi.c ccb = mpi_get_ccb(sc);
sc 2090 dev/ic/mpi.c DEVNAME(sc));
sc 2103 dev/ic/mpi.c bundle->req.tce.image_size = htole32(sc->sc_fw_len);
sc 2107 dev/ic/mpi.c MPI_SGE_FL_EOL | (u_int32_t)sc->sc_fw_len);
sc 2108 dev/ic/mpi.c addr = MPI_DMA_DVA(sc->sc_fw);
sc 2112 dev/ic/mpi.c if (mpi_poll(sc, ccb, 50000) != 0) {
sc 2113 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_header poll\n", DEVNAME(sc));
sc 2118 dev/ic/mpi.c panic("%s: unable to do fw upload\n", DEVNAME(sc));
sc 2124 dev/ic/mpi.c mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva);
sc 2125 dev/ic/mpi.c mpi_put_ccb(sc, ccb);
sc 2130 dev/ic/mpi.c mpi_dmamem_free(sc, sc->sc_fw);
sc 2135 dev/ic/mpi.c mpi_get_raid(struct mpi_softc *sc)
sc 2145 dev/ic/mpi.c DNPRINTF(MPI_D_RAID, "%s: mpi_get_raid\n", DEVNAME(sc));
sc 2147 dev/ic/mpi.c if (mpi_cfg_header(sc, MPI_CONFIG_REQ_PAGE_TYPE_IOC, 2, 0, &hdr) != 0) {
sc 2149 dev/ic/mpi.c "for IOC page 2\n", DEVNAME(sc));
sc 2157 dev/ic/mpi.c "space for ioc config page 2\n", DEVNAME(sc));
sc 2162 dev/ic/mpi.c if (mpi_cfg_page(sc, 0, &hdr, 1, vol_page, pagelen) != 0) {
sc 2164 dev/ic/mpi.c "page 2\n", DEVNAME(sc));
sc 2170 dev/ic/mpi.c DNPRINTF(MPI_D_RAID, "%s: capabilities: 0x08%x\n", DEVNAME(sc),
sc 2173 dev/ic/mpi.c "active_physdisks: %d max_physdisks: %d\n", DEVNAME(sc),
sc 2179 dev/ic/mpi.c printf("%s: deadbeef in raid configuration\n", DEVNAME(sc));
sc 2187 dev/ic/mpi.c sc->sc_flags |= MPI_F_RAID;
sc 2193 dev/ic/mpi.c DEVNAME(sc), vol->vol_id, vol->vol_bus, vol->vol_ioc,
sc 2196 dev/ic/mpi.c DEVNAME(sc), vol->vol_type, vol->flags);
sc 2198 dev/ic/mpi.c if (vol->vol_ioc != sc->sc_ioc_number || vol->vol_bus != 0)
sc 2201 dev/ic/mpi.c link = sc->sc_scsibus->sc_link[vol->vol_id][0];
sc 2213 dev/ic/mpi.c mpi_cfg_header(struct mpi_softc *sc, u_int8_t type, u_int8_t number,
sc 2223 dev/ic/mpi.c "address: %d\n", DEVNAME(sc), type, number, address);
sc 2226 dev/ic/mpi.c ccb = mpi_get_ccb(sc);
sc 2230 dev/ic/mpi.c DEVNAME(sc));
sc 2248 dev/ic/mpi.c if (mpi_poll(sc, ccb, 50000) != 0) {
sc 2249 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_header poll\n", DEVNAME(sc));
sc 2254 dev/ic/mpi.c panic("%s: unable to fetch config header\n", DEVNAME(sc));
sc 2258 dev/ic/mpi.c "0x%02x\n", DEVNAME(sc), cp->action, cp->msg_length, cp->function);
sc 2260 dev/ic/mpi.c "msg_flags: 0x%02x\n", DEVNAME(sc),
sc 2263 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: msg_context: 0x%08x\n", DEVNAME(sc),
sc 2265 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: ioc_status: 0x%04x\n", DEVNAME(sc),
sc 2267 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc),
sc 2270 dev/ic/mpi.c "page_number: 0x%02x page_type: 0x%02x\n", DEVNAME(sc),
sc 2281 dev/ic/mpi.c mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva);
sc 2282 dev/ic/mpi.c mpi_put_ccb(sc, ccb);
sc 2288 dev/ic/mpi.c mpi_cfg_page(struct mpi_softc *sc, u_int32_t address, struct mpi_cfg_hdr *hdr,
sc 2300 dev/ic/mpi.c DEVNAME(sc), address, read, hdr->page_type);
sc 2307 dev/ic/mpi.c ccb = mpi_get_ccb(sc);
sc 2310 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_page ccb_get\n", DEVNAME(sc));
sc 2342 dev/ic/mpi.c if (mpi_poll(sc, ccb, 50000) != 0) {
sc 2343 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: mpi_cfg_page poll\n", DEVNAME(sc));
sc 2348 dev/ic/mpi.c mpi_put_ccb(sc, ccb);
sc 2354 dev/ic/mpi.c "0x%02x\n", DEVNAME(sc), cp->action, cp->msg_length, cp->function);
sc 2356 dev/ic/mpi.c "msg_flags: 0x%02x\n", DEVNAME(sc),
sc 2359 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: msg_context: 0x%08x\n", DEVNAME(sc),
sc 2361 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: ioc_status: 0x%04x\n", DEVNAME(sc),
sc 2363 dev/ic/mpi.c DNPRINTF(MPI_D_MISC, "%s: ioc_loginfo: 0x%08x\n", DEVNAME(sc),
sc 2366 dev/ic/mpi.c "page_number: 0x%02x page_type: 0x%02x\n", DEVNAME(sc),
sc 2377 dev/ic/mpi.c mpi_push_reply(sc, ccb->ccb_rcb->rcb_reply_dva);
sc 2378 dev/ic/mpi.c mpi_put_ccb(sc, ccb);
sc 78 dev/ic/mtd8xx.c static void mtd_reset(struct mtd_softc *sc);
sc 91 dev/ic/mtd8xx.c mtd_attach(struct mtd_softc *sc)
sc 93 dev/ic/mtd8xx.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 98 dev/ic/mtd8xx.c mtd_reset(sc);
sc 100 dev/ic/mtd8xx.c if (bus_dmamem_alloc(sc->sc_dmat, sizeof(struct mtd_list_data),
sc 101 dev/ic/mtd8xx.c PAGE_SIZE, 0, sc->sc_listseg, 1, &sc->sc_listnseg,
sc 106 dev/ic/mtd8xx.c if (bus_dmamem_map(sc->sc_dmat, sc->sc_listseg, sc->sc_listnseg,
sc 107 dev/ic/mtd8xx.c sizeof(struct mtd_list_data), &sc->sc_listkva,
sc 112 dev/ic/mtd8xx.c if (bus_dmamap_create(sc->sc_dmat, sizeof(struct mtd_list_data), 1,
sc 114 dev/ic/mtd8xx.c &sc->sc_listmap) != 0) {
sc 118 dev/ic/mtd8xx.c if (bus_dmamap_load(sc->sc_dmat, sc->sc_listmap, sc->sc_listkva,
sc 123 dev/ic/mtd8xx.c sc->mtd_ldata = (struct mtd_list_data *)sc->sc_listkva;
sc 124 dev/ic/mtd8xx.c bzero(sc->mtd_ldata, sizeof(struct mtd_list_data));
sc 127 dev/ic/mtd8xx.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
sc 129 dev/ic/mtd8xx.c &sc->mtd_cdata.mtd_rx_chain[i].sd_map) != 0) {
sc 134 dev/ic/mtd8xx.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0,
sc 135 dev/ic/mtd8xx.c BUS_DMA_NOWAIT, &sc->sc_rx_sparemap) != 0) {
sc 141 dev/ic/mtd8xx.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 143 dev/ic/mtd8xx.c &sc->mtd_cdata.mtd_tx_chain[i].sd_map) != 0) {
sc 148 dev/ic/mtd8xx.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, MTD_TX_LIST_CNT - 5,
sc 149 dev/ic/mtd8xx.c MCLBYTES, 0, BUS_DMA_NOWAIT, &sc->sc_tx_sparemap) != 0) {
sc 158 dev/ic/mtd8xx.c bcopy(enaddr, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 159 dev/ic/mtd8xx.c printf(" address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 162 dev/ic/mtd8xx.c ifp->if_softc = sc;
sc 169 dev/ic/mtd8xx.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 176 dev/ic/mtd8xx.c sc->sc_mii.mii_ifp = ifp;
sc 177 dev/ic/mtd8xx.c sc->sc_mii.mii_readreg = mtd_miibus_readreg;
sc 178 dev/ic/mtd8xx.c sc->sc_mii.mii_writereg = mtd_miibus_writereg;
sc 179 dev/ic/mtd8xx.c sc->sc_mii.mii_statchg = mtd_miibus_statchg;
sc 180 dev/ic/mtd8xx.c ifmedia_init(&sc->sc_mii.mii_media, 0, mtd_ifmedia_upd,
sc 182 dev/ic/mtd8xx.c mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
sc 184 dev/ic/mtd8xx.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 185 dev/ic/mtd8xx.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER | IFM_NONE, 0,
sc 187 dev/ic/mtd8xx.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_NONE);
sc 189 dev/ic/mtd8xx.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO);
sc 202 dev/ic/mtd8xx.c struct mtd_softc *sc = ifp->if_softc;
sc 204 dev/ic/mtd8xx.c return (mii_mediachg(&sc->sc_mii));
sc 211 dev/ic/mtd8xx.c struct mtd_softc *sc = ifp->if_softc;
sc 213 dev/ic/mtd8xx.c mii_pollstat(&sc->sc_mii);
sc 214 dev/ic/mtd8xx.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 215 dev/ic/mtd8xx.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 220 dev/ic/mtd8xx.c mtd_mii_command(struct mtd_softc *sc, int opcode, int phy, int reg)
sc 257 dev/ic/mtd8xx.c struct mtd_softc *sc = (void *)self;
sc 259 dev/ic/mtd8xx.c if (sc->sc_devid == PCI_PRODUCT_MYSON_MTD803)
sc 264 dev/ic/mtd8xx.c miir = mtd_mii_command(sc, MII_OPCODE_RD, phy, reg);
sc 286 dev/ic/mtd8xx.c struct mtd_softc *sc = (void *)self;
sc 288 dev/ic/mtd8xx.c if (sc->sc_devid == PCI_PRODUCT_MYSON_MTD803) {
sc 294 dev/ic/mtd8xx.c miir = mtd_mii_command(sc, MII_OPCODE_WR, phy, reg);
sc 318 dev/ic/mtd8xx.c mtd_setmulti(struct mtd_softc *sc)
sc 320 dev/ic/mtd8xx.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 341 dev/ic/mtd8xx.c ETHER_FIRST_MULTI(step, &sc->sc_arpcom, enm);
sc 366 dev/ic/mtd8xx.c mtd_encap(struct mtd_softc *sc, struct mbuf *m_head, u_int32_t *txidx)
sc 377 dev/ic/mtd8xx.c map = sc->sc_tx_sparemap;
sc 379 dev/ic/mtd8xx.c if (bus_dmamap_load_mbuf(sc->sc_dmat, map,
sc 387 dev/ic/mtd8xx.c (sc->mtd_cdata.mtd_tx_cnt + cnt)) < 5) {
sc 388 dev/ic/mtd8xx.c bus_dmamap_unload(sc->sc_dmat, map);
sc 392 dev/ic/mtd8xx.c f = &sc->mtd_ldata->mtd_tx_list[frag];
sc 406 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_tx_cnt += cnt;
sc 407 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_tx_chain[cur].sd_mbuf = m_head;
sc 408 dev/ic/mtd8xx.c sc->sc_tx_sparemap = sc->mtd_cdata.mtd_tx_chain[cur].sd_map;
sc 409 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_tx_chain[cur].sd_map = map;
sc 410 dev/ic/mtd8xx.c sc->mtd_ldata->mtd_tx_list[cur].td_tcw |= htole32(TCW_LD | TCW_IC);
sc 411 dev/ic/mtd8xx.c if (sc->sc_devid == PCI_PRODUCT_MYSON_MTD891)
sc 412 dev/ic/mtd8xx.c sc->mtd_ldata->mtd_tx_list[cur].td_tcw |=
sc 415 dev/ic/mtd8xx.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 418 dev/ic/mtd8xx.c sc->mtd_ldata->mtd_tx_list[*txidx].td_tsw = htole32(TSW_OWN);
sc 419 dev/ic/mtd8xx.c sc->mtd_ldata->mtd_tx_list[*txidx].td_tcw |=
sc 422 dev/ic/mtd8xx.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 437 dev/ic/mtd8xx.c mtd_list_tx_init(struct mtd_softc *sc)
sc 443 dev/ic/mtd8xx.c cd = &sc->mtd_cdata;
sc 444 dev/ic/mtd8xx.c ld = sc->mtd_ldata;
sc 451 dev/ic/mtd8xx.c sc->sc_listmap->dm_segs[0].ds_addr +
sc 466 dev/ic/mtd8xx.c mtd_list_rx_init(struct mtd_softc *sc)
sc 471 dev/ic/mtd8xx.c ld = sc->mtd_ldata;
sc 474 dev/ic/mtd8xx.c if (mtd_newbuf(sc, i, NULL))
sc 477 dev/ic/mtd8xx.c sc->sc_listmap->dm_segs[0].ds_addr +
sc 483 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_rx_prod = 0;
sc 493 dev/ic/mtd8xx.c mtd_newbuf(struct mtd_softc *sc, int i, struct mbuf *m)
sc 499 dev/ic/mtd8xx.c c = &sc->mtd_ldata->mtd_rx_list[i];
sc 512 dev/ic/mtd8xx.c if (bus_dmamap_load(sc->sc_dmat, sc->sc_rx_sparemap,
sc 518 dev/ic/mtd8xx.c map = sc->mtd_cdata.mtd_rx_chain[i].sd_map;
sc 519 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_rx_chain[i].sd_map = sc->sc_rx_sparemap;
sc 520 dev/ic/mtd8xx.c sc->sc_rx_sparemap = map;
sc 529 dev/ic/mtd8xx.c bus_dmamap_sync(sc->sc_dmat, sc->mtd_cdata.mtd_rx_chain[i].sd_map, 0,
sc 530 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_rx_chain[i].sd_map->dm_mapsize,
sc 533 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_rx_chain[i].sd_mbuf = m_new;
sc 535 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_rx_chain[i].sd_map->dm_segs[0].ds_addr +
sc 540 dev/ic/mtd8xx.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 550 dev/ic/mtd8xx.c mtd_reset(struct mtd_softc *sc)
sc 573 dev/ic/mtd8xx.c printf("%s: reset never completed!\n", sc->sc_dev.dv_xname);
sc 580 dev/ic/mtd8xx.c struct mtd_softc *sc = ifp->if_softc;
sc 586 dev/ic/mtd8xx.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, command, data)) > 0) {
sc 598 dev/ic/mtd8xx.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 622 dev/ic/mtd8xx.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 623 dev/ic/mtd8xx.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 631 dev/ic/mtd8xx.c mtd_setmulti(sc);
sc 637 dev/ic/mtd8xx.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, command);
sc 652 dev/ic/mtd8xx.c struct mtd_softc *sc = ifp->if_softc;
sc 667 dev/ic/mtd8xx.c if (sc->sc_devid == PCI_PRODUCT_MYSON_MTD891) {
sc 682 dev/ic/mtd8xx.c mtd_setmulti(sc);
sc 684 dev/ic/mtd8xx.c if (mtd_list_rx_init(sc)) {
sc 686 dev/ic/mtd8xx.c sc->sc_dev.dv_xname);
sc 690 dev/ic/mtd8xx.c mtd_list_tx_init(sc);
sc 692 dev/ic/mtd8xx.c CSR_WRITE_4(MTD_RXLBA, sc->sc_listmap->dm_segs[0].ds_addr +
sc 694 dev/ic/mtd8xx.c CSR_WRITE_4(MTD_TXLBA, sc->sc_listmap->dm_segs[0].ds_addr +
sc 722 dev/ic/mtd8xx.c struct mtd_softc *sc = ifp->if_softc;
sc 726 dev/ic/mtd8xx.c if (sc->mtd_cdata.mtd_tx_cnt) {
sc 731 dev/ic/mtd8xx.c idx = sc->mtd_cdata.mtd_tx_prod;
sc 732 dev/ic/mtd8xx.c while (sc->mtd_cdata.mtd_tx_chain[idx].sd_mbuf == NULL) {
sc 737 dev/ic/mtd8xx.c if (mtd_encap(sc, m_head, &idx)) {
sc 752 dev/ic/mtd8xx.c if (idx == sc->mtd_cdata.mtd_tx_prod)
sc 756 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_tx_prod = idx;
sc 769 dev/ic/mtd8xx.c struct mtd_softc *sc = ifp->if_softc;
sc 784 dev/ic/mtd8xx.c if (sc->mtd_cdata.mtd_rx_chain[i].sd_map->dm_nsegs != 0) {
sc 785 dev/ic/mtd8xx.c bus_dmamap_t map = sc->mtd_cdata.mtd_rx_chain[i].sd_map;
sc 787 dev/ic/mtd8xx.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 789 dev/ic/mtd8xx.c bus_dmamap_unload(sc->sc_dmat, map);
sc 791 dev/ic/mtd8xx.c if (sc->mtd_cdata.mtd_rx_chain[i].sd_mbuf != NULL) {
sc 792 dev/ic/mtd8xx.c m_freem(sc->mtd_cdata.mtd_rx_chain[i].sd_mbuf);
sc 793 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_rx_chain[i].sd_mbuf = NULL;
sc 796 dev/ic/mtd8xx.c bzero((char *)&sc->mtd_ldata->mtd_rx_list,
sc 797 dev/ic/mtd8xx.c sizeof(sc->mtd_ldata->mtd_rx_list));
sc 803 dev/ic/mtd8xx.c if (sc->mtd_cdata.mtd_tx_chain[i].sd_map->dm_nsegs != 0) {
sc 804 dev/ic/mtd8xx.c bus_dmamap_t map = sc->mtd_cdata.mtd_tx_chain[i].sd_map;
sc 806 dev/ic/mtd8xx.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 808 dev/ic/mtd8xx.c bus_dmamap_unload(sc->sc_dmat, map);
sc 810 dev/ic/mtd8xx.c if (sc->mtd_cdata.mtd_tx_chain[i].sd_mbuf != NULL) {
sc 811 dev/ic/mtd8xx.c m_freem(sc->mtd_cdata.mtd_tx_chain[i].sd_mbuf);
sc 812 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_tx_chain[i].sd_mbuf = NULL;
sc 816 dev/ic/mtd8xx.c bzero((char *)&sc->mtd_ldata->mtd_tx_list,
sc 817 dev/ic/mtd8xx.c sizeof(sc->mtd_ldata->mtd_tx_list));
sc 825 dev/ic/mtd8xx.c struct mtd_softc *sc = ifp->if_softc;
sc 828 dev/ic/mtd8xx.c printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
sc 831 dev/ic/mtd8xx.c mtd_reset(sc);
sc 842 dev/ic/mtd8xx.c struct mtd_softc *sc = xsc;
sc 843 dev/ic/mtd8xx.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 866 dev/ic/mtd8xx.c mtd_rxeof(sc);
sc 868 dev/ic/mtd8xx.c while(mtd_rx_resync(sc))
sc 869 dev/ic/mtd8xx.c mtd_rxeof(sc);
sc 878 dev/ic/mtd8xx.c mtd_txeof(sc);
sc 882 dev/ic/mtd8xx.c mtd_reset(sc);
sc 902 dev/ic/mtd8xx.c mtd_rxeof(struct mtd_softc *sc)
sc 910 dev/ic/mtd8xx.c ifp = &sc->sc_arpcom.ac_if;
sc 911 dev/ic/mtd8xx.c i = sc->mtd_cdata.mtd_rx_prod;
sc 913 dev/ic/mtd8xx.c while(!(sc->mtd_ldata->mtd_rx_list[i].rd_rsr & htole32(RSR_OWN))) {
sc 916 dev/ic/mtd8xx.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 921 dev/ic/mtd8xx.c cur_rx = &sc->mtd_ldata->mtd_rx_list[i];
sc 923 dev/ic/mtd8xx.c m = sc->mtd_cdata.mtd_rx_chain[i].sd_mbuf;
sc 926 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_rx_chain[i].sd_mbuf = NULL;
sc 936 dev/ic/mtd8xx.c mtd_newbuf(sc, i, m);
sc 949 dev/ic/mtd8xx.c bus_dmamap_sync(sc->sc_dmat, sc->mtd_cdata.mtd_rx_chain[i].sd_map,
sc 950 dev/ic/mtd8xx.c 0, sc->mtd_cdata.mtd_rx_chain[i].sd_map->dm_mapsize,
sc 955 dev/ic/mtd8xx.c mtd_newbuf(sc, i, m);
sc 973 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_rx_prod = i;
sc 989 dev/ic/mtd8xx.c mtd_rx_resync(sc)
sc 990 dev/ic/mtd8xx.c struct mtd_softc *sc;
sc 995 dev/ic/mtd8xx.c pos = sc->mtd_cdata.mtd_rx_prod;
sc 998 dev/ic/mtd8xx.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 1003 dev/ic/mtd8xx.c cur_rx = &sc->mtd_ldata->mtd_rx_list[pos];
sc 1014 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_rx_prod = pos;
sc 1025 dev/ic/mtd8xx.c mtd_txeof(struct mtd_softc *sc)
sc 1028 dev/ic/mtd8xx.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1038 dev/ic/mtd8xx.c idx = sc->mtd_cdata.mtd_tx_cons;
sc 1039 dev/ic/mtd8xx.c while(idx != sc->mtd_cdata.mtd_tx_prod) {
sc 1042 dev/ic/mtd8xx.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 1047 dev/ic/mtd8xx.c cur_tx = &sc->mtd_ldata->mtd_tx_list[idx];
sc 1054 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_tx_cnt--;
sc 1073 dev/ic/mtd8xx.c if (sc->mtd_cdata.mtd_tx_chain[idx].sd_map->dm_nsegs != 0) {
sc 1075 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_tx_chain[idx].sd_map;
sc 1076 dev/ic/mtd8xx.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 1078 dev/ic/mtd8xx.c bus_dmamap_unload(sc->sc_dmat, map);
sc 1080 dev/ic/mtd8xx.c if (sc->mtd_cdata.mtd_tx_chain[idx].sd_mbuf != NULL) {
sc 1081 dev/ic/mtd8xx.c m_freem(sc->mtd_cdata.mtd_tx_chain[idx].sd_mbuf);
sc 1082 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_tx_chain[idx].sd_mbuf = NULL;
sc 1084 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_tx_cnt--;
sc 1090 dev/ic/mtd8xx.c sc->mtd_cdata.mtd_tx_cons = idx;
sc 1092 dev/ic/mtd8xx.c if (sc->mtd_ldata->mtd_tx_list[idx].td_tsw ==
sc 1094 dev/ic/mtd8xx.c sc->mtd_ldata->mtd_tx_list[idx].td_tsw =
sc 200 dev/ic/mtd8xxreg.h #define CSR_READ_1(reg) bus_space_read_1(sc->sc_bust, sc->sc_bush, reg)
sc 202 dev/ic/mtd8xxreg.h bus_space_write_1(sc->sc_bust, sc->sc_bush, reg, val)
sc 204 dev/ic/mtd8xxreg.h #define CSR_READ_2(reg) bus_space_read_2(sc->sc_bust, sc->sc_bush, reg)
sc 206 dev/ic/mtd8xxreg.h bus_space_write_2(sc->sc_bust, sc->sc_bush, reg, val)
sc 208 dev/ic/mtd8xxreg.h #define CSR_READ_4(reg) bus_space_read_4(sc->sc_bust, sc->sc_bush, reg)
sc 210 dev/ic/mtd8xxreg.h bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val)
sc 187 dev/ic/ncr5380sbc.c static __inline int ncr5380_wait_req(sc)
sc 188 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 192 dev/ic/ncr5380sbc.c if (*sc->sci_bus_csr & SCI_BUS_REQ) {
sc 204 dev/ic/ncr5380sbc.c static __inline int ncr5380_wait_not_req(sc)
sc 205 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 209 dev/ic/ncr5380sbc.c if ((*sc->sci_bus_csr & SCI_BUS_REQ) == 0) {
sc 222 dev/ic/ncr5380sbc.c ncr_sched_msgout(sc, msg_code)
sc 223 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 227 dev/ic/ncr5380sbc.c if (sc->sc_msgpriq == 0) {
sc 229 dev/ic/ncr5380sbc.c icmd = *sc->sci_icmd & SCI_ICMD_RMASK;
sc 230 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd | SCI_ICMD_ATN;
sc 233 dev/ic/ncr5380sbc.c sc->sc_msgpriq |= msg_code;
sc 238 dev/ic/ncr5380sbc.c ncr5380_pio_out(sc, phase, count, data)
sc 239 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 247 dev/ic/ncr5380sbc.c icmd = *(sc->sci_icmd) & SCI_ICMD_RMASK;
sc 250 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 254 dev/ic/ncr5380sbc.c if (!SCI_BUSY(sc)) {
sc 258 dev/ic/ncr5380sbc.c if (ncr5380_wait_req(sc)) {
sc 262 dev/ic/ncr5380sbc.c if (SCI_BUS_PHASE(*sc->sci_bus_csr) != phase)
sc 267 dev/ic/ncr5380sbc.c *sc->sci_odata = *data++;
sc 269 dev/ic/ncr5380sbc.c *sc->sci_odata = 0;
sc 273 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 276 dev/ic/ncr5380sbc.c error = ncr5380_wait_not_req(sc);
sc 280 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 292 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 299 dev/ic/ncr5380sbc.c ncr5380_pio_in(sc, phase, count, data)
sc 300 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 308 dev/ic/ncr5380sbc.c icmd = *(sc->sci_icmd) & SCI_ICMD_RMASK;
sc 312 dev/ic/ncr5380sbc.c if (!SCI_BUSY(sc)) {
sc 316 dev/ic/ncr5380sbc.c if (ncr5380_wait_req(sc)) {
sc 321 dev/ic/ncr5380sbc.c if (SCI_BUS_PHASE(*sc->sci_bus_csr) != phase)
sc 326 dev/ic/ncr5380sbc.c *data++ = *sc->sci_data;
sc 328 dev/ic/ncr5380sbc.c (void) *sc->sci_data;
sc 332 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 335 dev/ic/ncr5380sbc.c error = ncr5380_wait_not_req(sc);
sc 339 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 354 dev/ic/ncr5380sbc.c ncr5380_init(sc)
sc 355 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 361 dev/ic/ncr5380sbc.c ncr5380_debug_sc = sc;
sc 365 dev/ic/ncr5380sbc.c sr = &sc->sc_ring[i];
sc 371 dev/ic/ncr5380sbc.c sc->sc_matrix[i][j] = NULL;
sc 373 dev/ic/ncr5380sbc.c sc->sc_link.openings = 2; /* XXX - Not SCI_OPENINGS */
sc 374 dev/ic/ncr5380sbc.c sc->sc_prevphase = PHASE_INVALID;
sc 375 dev/ic/ncr5380sbc.c sc->sc_state = NCR_IDLE;
sc 377 dev/ic/ncr5380sbc.c *sc->sci_tcmd = PHASE_INVALID;
sc 378 dev/ic/ncr5380sbc.c *sc->sci_icmd = 0;
sc 379 dev/ic/ncr5380sbc.c *sc->sci_mode = 0;
sc 380 dev/ic/ncr5380sbc.c *sc->sci_sel_enb = 0;
sc 381 dev/ic/ncr5380sbc.c SCI_CLR_INTR(sc);
sc 384 dev/ic/ncr5380sbc.c *sc->sci_sel_enb = 0x80;
sc 387 dev/ic/ncr5380sbc.c if (sc->sc_intr_on) {
sc 389 dev/ic/ncr5380sbc.c sc->sc_intr_on(sc);
sc 395 dev/ic/ncr5380sbc.c ncr5380_reset_scsibus(sc)
sc 396 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 400 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 402 dev/ic/ncr5380sbc.c *sc->sci_icmd = SCI_ICMD_RST;
sc 404 dev/ic/ncr5380sbc.c *sc->sci_icmd = 0;
sc 406 dev/ic/ncr5380sbc.c *sc->sci_mode = 0;
sc 407 dev/ic/ncr5380sbc.c *sc->sci_tcmd = PHASE_INVALID;
sc 409 dev/ic/ncr5380sbc.c SCI_CLR_INTR(sc);
sc 422 dev/ic/ncr5380sbc.c ncr5380_intr(sc)
sc 423 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 432 dev/ic/ncr5380sbc.c NCR_TRACE("intr: top, state=%d\n", sc->sc_state);
sc 434 dev/ic/ncr5380sbc.c if (sc->sc_state == NCR_IDLE) {
sc 442 dev/ic/ncr5380sbc.c if (sc->sc_intr_off) {
sc 444 dev/ic/ncr5380sbc.c sc->sc_intr_off(sc);
sc 447 dev/ic/ncr5380sbc.c ncr5380_reselect(sc);
sc 458 dev/ic/ncr5380sbc.c if (sc->sc_state & NCR_WORKING) {
sc 460 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 462 dev/ic/ncr5380sbc.c ncr5380_machine(sc);
sc 464 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 469 dev/ic/ncr5380sbc.c if (sc->sc_state == NCR_IDLE) {
sc 471 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 472 dev/ic/ncr5380sbc.c ncr5380_sched(sc);
sc 474 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 485 dev/ic/ncr5380sbc.c ncr5380_abort(sc)
sc 486 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 496 dev/ic/ncr5380sbc.c if (sc->sc_intr_off) {
sc 498 dev/ic/ncr5380sbc.c sc->sc_intr_off(sc);
sc 501 dev/ic/ncr5380sbc.c sc->sc_state |= NCR_ABORTING;
sc 502 dev/ic/ncr5380sbc.c if ((sc->sc_state & NCR_DOINGDMA) == 0) {
sc 503 dev/ic/ncr5380sbc.c ncr_sched_msgout(sc, SEND_ABORT);
sc 506 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 507 dev/ic/ncr5380sbc.c ncr5380_machine(sc);
sc 509 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 512 dev/ic/ncr5380sbc.c if (sc->sc_intr_on) {
sc 514 dev/ic/ncr5380sbc.c sc->sc_intr_on(sc);
sc 528 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 540 dev/ic/ncr5380sbc.c sc = sc_link->adapter_softc;
sc 543 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname,
sc 553 dev/ic/ncr5380sbc.c if (sc->sc_current == sr) {
sc 555 dev/ic/ncr5380sbc.c ncr5380_abort(sc);
sc 563 dev/ic/ncr5380sbc.c sc->sc_matrix[sr->sr_target][sr->sr_lun] = NULL;
sc 571 dev/ic/ncr5380sbc.c if (sc->sc_state == NCR_IDLE) {
sc 573 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 574 dev/ic/ncr5380sbc.c ncr5380_sched(sc);
sc 576 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 600 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 604 dev/ic/ncr5380sbc.c sc = xs->sc_link->adapter_softc;
sc 607 dev/ic/ncr5380sbc.c if (sc->sc_flags & NCR5380_FORCE_POLLING)
sc 617 dev/ic/ncr5380sbc.c sr = sc->sc_current;
sc 620 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname,
sc 622 dev/ic/ncr5380sbc.c ncr5380_abort(sc);
sc 624 dev/ic/ncr5380sbc.c if (sc->sc_state != NCR_IDLE) {
sc 634 dev/ic/ncr5380sbc.c if (sc->sc_ring[i].sr_xs == NULL)
sc 643 dev/ic/ncr5380sbc.c sr = &sc->sc_ring[i];
sc 652 dev/ic/ncr5380sbc.c sc->sc_ncmds++;
sc 659 dev/ic/ncr5380sbc.c sc->sc_rr = i;
sc 665 dev/ic/ncr5380sbc.c if (sc->sc_state == NCR_IDLE) {
sc 667 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 668 dev/ic/ncr5380sbc.c ncr5380_sched(sc);
sc 670 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 676 dev/ic/ncr5380sbc.c if (sc->sc_state != NCR_IDLE)
sc 693 dev/ic/ncr5380sbc.c ncr5380_done(sc)
sc 694 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 700 dev/ic/ncr5380sbc.c if (sc->sc_state == NCR_IDLE)
sc 702 dev/ic/ncr5380sbc.c if (sc->sc_current == NULL)
sc 706 dev/ic/ncr5380sbc.c sr = sc->sc_current;
sc 709 dev/ic/ncr5380sbc.c NCR_TRACE("done: top, cur=0x%x\n", (long) sc->sc_current);
sc 717 dev/ic/ncr5380sbc.c (*sc->sc_dma_free)(sc);
sc 724 dev/ic/ncr5380sbc.c if (sc->sc_state & NCR_ABORTING) {
sc 764 dev/ic/ncr5380sbc.c sc->sc_state = NCR_IDLE;
sc 765 dev/ic/ncr5380sbc.c sc->sc_current = NULL;
sc 766 dev/ic/ncr5380sbc.c sc->sc_matrix[sr->sr_target][sr->sr_lun] = NULL;
sc 778 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname, sr->sr_target, sr->sr_status);
sc 795 dev/ic/ncr5380sbc.c if ((sc->sc_state & NCR_WORKING) == 0)
sc 800 dev/ic/ncr5380sbc.c sc->sc_current = NULL;
sc 801 dev/ic/ncr5380sbc.c sc->sc_matrix[sr->sr_target][sr->sr_lun] = NULL;
sc 806 dev/ic/ncr5380sbc.c sc->sc_ncmds--;
sc 812 dev/ic/ncr5380sbc.c sc->sc_state = NCR_IDLE;
sc 824 dev/ic/ncr5380sbc.c ncr5380_sched(sc)
sc 825 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 833 dev/ic/ncr5380sbc.c if (sc->sc_intr_off) {
sc 835 dev/ic/ncr5380sbc.c sc->sc_intr_off(sc);
sc 843 dev/ic/ncr5380sbc.c if (sc->sc_state != NCR_IDLE)
sc 845 dev/ic/ncr5380sbc.c if (sc->sc_current)
sc 856 dev/ic/ncr5380sbc.c i = sc->sc_rr;
sc 859 dev/ic/ncr5380sbc.c if (sc->sc_ring[i].sr_xs) {
sc 860 dev/ic/ncr5380sbc.c target = sc->sc_ring[i].sr_target;
sc 861 dev/ic/ncr5380sbc.c lun = sc->sc_ring[i].sr_lun;
sc 862 dev/ic/ncr5380sbc.c if (sc->sc_matrix[target][lun] == NULL) {
sc 870 dev/ic/ncr5380sbc.c sc->sc_rr = i;
sc 871 dev/ic/ncr5380sbc.c sr = &sc->sc_ring[i];
sc 878 dev/ic/ncr5380sbc.c } while (i != sc->sc_rr);
sc 882 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 885 dev/ic/ncr5380sbc.c if (sc->sc_intr_on) {
sc 887 dev/ic/ncr5380sbc.c sc->sc_intr_on(sc);
sc 896 dev/ic/ncr5380sbc.c sc->sc_state = NCR_WORKING;
sc 897 dev/ic/ncr5380sbc.c error = ncr5380_select(sc, sr);
sc 898 dev/ic/ncr5380sbc.c if (sc->sc_current) {
sc 903 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname);
sc 905 dev/ic/ncr5380sbc.c sc->sc_state |= NCR_ABORTING;
sc 906 dev/ic/ncr5380sbc.c sc->sc_msgpriq |= SEND_ABORT;
sc 908 dev/ic/ncr5380sbc.c sr = sc->sc_current;
sc 915 dev/ic/ncr5380sbc.c sc->sc_matrix[target][lun] = sr;
sc 916 dev/ic/ncr5380sbc.c sc->sc_current = sr; /* connected */
sc 922 dev/ic/ncr5380sbc.c sc->sc_dataptr = sr->sr_dataptr;
sc 923 dev/ic/ncr5380sbc.c sc->sc_datalen = sr->sr_datalen;
sc 924 dev/ic/ncr5380sbc.c sc->sc_prevphase = PHASE_INVALID;
sc 925 dev/ic/ncr5380sbc.c sc->sc_msgpriq = SEND_IDENTIFY;
sc 926 dev/ic/ncr5380sbc.c sc->sc_msgoutq = 0;
sc 927 dev/ic/ncr5380sbc.c sc->sc_msgout = 0;
sc 938 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname);
sc 939 dev/ic/ncr5380sbc.c ncr5380_reset_scsibus(sc);
sc 945 dev/ic/ncr5380sbc.c ncr5380_done(sc);
sc 948 dev/ic/ncr5380sbc.c sc->sc_dataptr = NULL;
sc 949 dev/ic/ncr5380sbc.c sc->sc_datalen = 0;
sc 950 dev/ic/ncr5380sbc.c sc->sc_prevphase = PHASE_INVALID;
sc 951 dev/ic/ncr5380sbc.c sc->sc_msgpriq = 0;
sc 952 dev/ic/ncr5380sbc.c sc->sc_msgoutq = 0;
sc 953 dev/ic/ncr5380sbc.c sc->sc_msgout = 0;
sc 965 dev/ic/ncr5380sbc.c sc->sc_state |= NCR_ABORTING;
sc 966 dev/ic/ncr5380sbc.c sc->sc_msgpriq |= SEND_ABORT;
sc 997 dev/ic/ncr5380sbc.c sc->sc_msgpriq |= SEND_DEV_RESET;
sc 1003 dev/ic/ncr5380sbc.c if (sc->sc_dataptr) {
sc 1005 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname);
sc 1007 dev/ic/ncr5380sbc.c sc->sc_dataptr = NULL;
sc 1013 dev/ic/ncr5380sbc.c if (sc->sc_dataptr && sc->sc_dma_alloc &&
sc 1014 dev/ic/ncr5380sbc.c (sc->sc_datalen >= sc->sc_min_dma_len))
sc 1016 dev/ic/ncr5380sbc.c NCR_TRACE("sched: dma_alloc, len=%d\n", sc->sc_datalen);
sc 1017 dev/ic/ncr5380sbc.c (*sc->sc_dma_alloc)(sc);
sc 1029 dev/ic/ncr5380sbc.c if (sr->sr_dma_hand && sc->sc_dma_setup) {
sc 1032 dev/ic/ncr5380sbc.c sc->sc_dma_setup(sc);
sc 1046 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 1047 dev/ic/ncr5380sbc.c ncr5380_machine(sc);
sc 1049 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 1055 dev/ic/ncr5380sbc.c if (sc->sc_state == NCR_IDLE)
sc 1072 dev/ic/ncr5380sbc.c ncr5380_reselect(sc)
sc 1073 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 1086 dev/ic/ncr5380sbc.c if (sc->sc_current)
sc 1094 dev/ic/ncr5380sbc.c bus = *(sc->sci_bus_csr);
sc 1115 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname, bus);
sc 1117 dev/ic/ncr5380sbc.c ncr5380_reset_scsibus(sc);
sc 1121 dev/ic/ncr5380sbc.c bus = *(sc->sci_bus_csr);
sc 1135 dev/ic/ncr5380sbc.c data = *(sc->sci_data) & 0xFF;
sc 1144 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname, data);
sc 1147 dev/ic/ncr5380sbc.c ncr5380_reset_scsibus(sc);
sc 1162 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname, data);
sc 1169 dev/ic/ncr5380sbc.c *(sc->sci_icmd) = SCI_ICMD_BSY;
sc 1174 dev/ic/ncr5380sbc.c bus = *(sc->sci_bus_csr);
sc 1179 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname, bus);
sc 1188 dev/ic/ncr5380sbc.c *(sc->sci_icmd) = 0;
sc 1189 dev/ic/ncr5380sbc.c *sc->sci_sel_enb = 0;
sc 1190 dev/ic/ncr5380sbc.c SCI_CLR_INTR(sc);
sc 1199 dev/ic/ncr5380sbc.c if (ncr5380_wait_req(sc)) {
sc 1201 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname);
sc 1205 dev/ic/ncr5380sbc.c phase = SCI_BUS_PHASE(*sc->sci_bus_csr);
sc 1208 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname, phase);
sc 1213 dev/ic/ncr5380sbc.c *(sc->sci_tcmd) = PHASE_MSG_IN;
sc 1216 dev/ic/ncr5380sbc.c msg = *(sc->sci_data);
sc 1219 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname, msg);
sc 1225 dev/ic/ncr5380sbc.c sr = sc->sc_matrix[target][lun];
sc 1228 dev/ic/ncr5380sbc.c sc->sc_state |= NCR_WORKING;
sc 1229 dev/ic/ncr5380sbc.c sc->sc_current = sr;
sc 1233 dev/ic/ncr5380sbc.c sc->sc_dataptr = sr->sr_dataptr;
sc 1234 dev/ic/ncr5380sbc.c sc->sc_datalen = sr->sr_datalen;
sc 1236 dev/ic/ncr5380sbc.c sc->sc_prevphase = PHASE_INVALID;
sc 1237 dev/ic/ncr5380sbc.c sc->sc_msgpriq = 0;
sc 1238 dev/ic/ncr5380sbc.c sc->sc_msgoutq = 0;
sc 1239 dev/ic/ncr5380sbc.c sc->sc_msgout = 0;
sc 1243 dev/ic/ncr5380sbc.c if (sc->sc_parity_disable & target_mask)
sc 1244 dev/ic/ncr5380sbc.c *sc->sci_mode = (SCI_MODE_MONBSY);
sc 1246 dev/ic/ncr5380sbc.c *sc->sci_mode = (SCI_MODE_MONBSY | SCI_MODE_PAR_CHK);
sc 1253 dev/ic/ncr5380sbc.c if (sr->sr_dma_hand && sc->sc_dma_setup) {
sc 1256 dev/ic/ncr5380sbc.c sc->sc_dma_setup(sc);
sc 1260 dev/ic/ncr5380sbc.c ncr5380_pio_in(sc, PHASE_MSG_IN, 1, &msg);
sc 1265 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname, target, lun);
sc 1271 dev/ic/ncr5380sbc.c sc->sc_state |= NCR_ABORTING;
sc 1275 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 1279 dev/ic/ncr5380sbc.c ncr5380_pio_in(sc, PHASE_MSG_IN, 1, &msg);
sc 1282 dev/ic/ncr5380sbc.c sc->sc_prevphase = PHASE_INVALID;
sc 1283 dev/ic/ncr5380sbc.c sc->sc_msgpriq = SEND_ABORT;
sc 1284 dev/ic/ncr5380sbc.c ncr5380_msg_out(sc);
sc 1286 dev/ic/ncr5380sbc.c *(sc->sci_tcmd) = PHASE_INVALID;
sc 1287 dev/ic/ncr5380sbc.c *sc->sci_sel_enb = 0;
sc 1288 dev/ic/ncr5380sbc.c SCI_CLR_INTR(sc);
sc 1289 dev/ic/ncr5380sbc.c *sc->sci_sel_enb = 0x80;
sc 1291 dev/ic/ncr5380sbc.c sc->sc_state &= ~NCR_ABORTING;
sc 1306 dev/ic/ncr5380sbc.c ncr5380_select(sc, sr)
sc 1307 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 1314 dev/ic/ncr5380sbc.c ncr5380_reselect(sc);
sc 1315 dev/ic/ncr5380sbc.c if (sc->sc_current) {
sc 1317 dev/ic/ncr5380sbc.c (long) sc->sc_current);
sc 1325 dev/ic/ncr5380sbc.c *sc->sci_tcmd = PHASE_DATA_OUT;
sc 1326 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd = 0;
sc 1327 dev/ic/ncr5380sbc.c *sc->sci_mode = 0;
sc 1348 dev/ic/ncr5380sbc.c *(sc->sci_odata) = 0x80; /* OUR_ID */
sc 1349 dev/ic/ncr5380sbc.c *(sc->sci_mode) = SCI_MODE_ARB;
sc 1355 dev/ic/ncr5380sbc.c if (*(sc->sci_icmd) & SCI_ICMD_AIP)
sc 1376 dev/ic/ncr5380sbc.c if (*(sc->sci_icmd) & SCI_ICMD_LST) {
sc 1393 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 1409 dev/ic/ncr5380sbc.c if (*(sc->sci_icmd) & SCI_ICMD_LST) {
sc 1414 dev/ic/ncr5380sbc.c *sc->sci_icmd = 0;
sc 1415 dev/ic/ncr5380sbc.c *sc->sci_mode = 0;
sc 1423 dev/ic/ncr5380sbc.c ncr5380_reselect(sc);
sc 1428 dev/ic/ncr5380sbc.c *sc->sci_mode = 0;
sc 1429 dev/ic/ncr5380sbc.c *sc->sci_sel_enb = 0;
sc 1441 dev/ic/ncr5380sbc.c *(sc->sci_odata) = data;
sc 1443 dev/ic/ncr5380sbc.c *(sc->sci_icmd) = icmd;
sc 1448 dev/ic/ncr5380sbc.c *(sc->sci_icmd) = icmd;
sc 1456 dev/ic/ncr5380sbc.c if (*sc->sci_bus_csr & SCI_BUS_BSY)
sc 1472 dev/ic/ncr5380sbc.c *(sc->sci_icmd) = icmd;
sc 1474 dev/ic/ncr5380sbc.c if ((*sc->sci_bus_csr & SCI_BUS_BSY) == 0) {
sc 1476 dev/ic/ncr5380sbc.c *sc->sci_tcmd = PHASE_INVALID;
sc 1477 dev/ic/ncr5380sbc.c *sc->sci_icmd = 0;
sc 1478 dev/ic/ncr5380sbc.c *sc->sci_mode = 0;
sc 1479 dev/ic/ncr5380sbc.c *sc->sci_sel_enb = 0;
sc 1480 dev/ic/ncr5380sbc.c SCI_CLR_INTR(sc);
sc 1481 dev/ic/ncr5380sbc.c *sc->sci_sel_enb = 0x80;
sc 1493 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 1496 dev/ic/ncr5380sbc.c if (sc->sc_parity_disable & target_mask)
sc 1497 dev/ic/ncr5380sbc.c *sc->sci_mode = (SCI_MODE_MONBSY);
sc 1499 dev/ic/ncr5380sbc.c *sc->sci_mode = (SCI_MODE_MONBSY | SCI_MODE_PAR_CHK);
sc 1549 dev/ic/ncr5380sbc.c ncr5380_msg_in(sc)
sc 1550 dev/ic/ncr5380sbc.c register struct ncr5380_softc *sc;
sc 1552 dev/ic/ncr5380sbc.c struct sci_req *sr = sc->sc_current;
sc 1559 dev/ic/ncr5380sbc.c *sc->sci_tcmd = PHASE_MSG_IN;
sc 1562 dev/ic/ncr5380sbc.c icmd = *sc->sci_icmd & SCI_ICMD_RMASK;
sc 1564 dev/ic/ncr5380sbc.c if (sc->sc_prevphase == PHASE_MSG_IN) {
sc 1566 dev/ic/ncr5380sbc.c n = sc->sc_imp - sc->sc_imess;
sc 1572 dev/ic/ncr5380sbc.c sc->sc_state &= ~NCR_DROP_MSGIN;
sc 1576 dev/ic/ncr5380sbc.c sc->sc_imp = &sc->sc_imess[n];
sc 1589 dev/ic/ncr5380sbc.c if (!SCI_BUSY(sc)) {
sc 1595 dev/ic/ncr5380sbc.c if (ncr5380_wait_req(sc)) {
sc 1600 dev/ic/ncr5380sbc.c phase = SCI_BUS_PHASE(*sc->sci_bus_csr);
sc 1610 dev/ic/ncr5380sbc.c if (*sc->sci_csr & SCI_CSR_PERR) {
sc 1611 dev/ic/ncr5380sbc.c ncr_sched_msgout(sc, SEND_PARITY_ERROR);
sc 1612 dev/ic/ncr5380sbc.c sc->sc_state |= NCR_DROP_MSGIN;
sc 1616 dev/ic/ncr5380sbc.c if ((sc->sc_state & NCR_DROP_MSGIN) == 0) {
sc 1618 dev/ic/ncr5380sbc.c ncr_sched_msgout(sc, SEND_REJECT);
sc 1619 dev/ic/ncr5380sbc.c sc->sc_state |= NCR_DROP_MSGIN;
sc 1621 dev/ic/ncr5380sbc.c *sc->sc_imp++ = *sc->sci_data;
sc 1629 dev/ic/ncr5380sbc.c if (n == 1 && IS1BYTEMSG(sc->sc_imess[0]))
sc 1631 dev/ic/ncr5380sbc.c if (n == 2 && IS2BYTEMSG(sc->sc_imess[0]))
sc 1633 dev/ic/ncr5380sbc.c if (n >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
sc 1634 dev/ic/ncr5380sbc.c n == sc->sc_imess[1] + 2)
sc 1647 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 1649 dev/ic/ncr5380sbc.c if (ncr5380_wait_not_req(sc)) {
sc 1655 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 1666 dev/ic/ncr5380sbc.c switch (sc->sc_imess[0]) {
sc 1676 dev/ic/ncr5380sbc.c ncr_sched_msgout(sc, sc->sc_msgout);
sc 1678 dev/ic/ncr5380sbc.c icmd = *sc->sci_icmd & SCI_ICMD_RMASK;
sc 1683 dev/ic/ncr5380sbc.c NCR_TRACE("msg_in: got reject for 0x%x\n", sc->sc_msgout);
sc 1684 dev/ic/ncr5380sbc.c switch (sc->sc_msgout) {
sc 1708 dev/ic/ncr5380sbc.c sr->sr_dataptr = sc->sc_dataptr;
sc 1709 dev/ic/ncr5380sbc.c sr->sr_datalen = sc->sc_datalen;
sc 1714 dev/ic/ncr5380sbc.c sc->sc_dataptr = sr->sr_dataptr;
sc 1715 dev/ic/ncr5380sbc.c sc->sc_datalen = sr->sr_datalen;
sc 1719 dev/ic/ncr5380sbc.c switch (sc->sc_imess[2]) {
sc 1726 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname);
sc 1733 dev/ic/ncr5380sbc.c NCR_TRACE("msg_in: eh? imsg=0x%x\n", sc->sc_imess[0]);
sc 1735 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname);
sc 1739 dev/ic/ncr5380sbc.c ncr_sched_msgout(sc, SEND_REJECT);
sc 1741 dev/ic/ncr5380sbc.c icmd = *sc->sci_icmd & SCI_ICMD_RMASK;
sc 1745 dev/ic/ncr5380sbc.c sc->sc_state |= NCR_ABORTING;
sc 1746 dev/ic/ncr5380sbc.c ncr_sched_msgout(sc, SEND_ABORT);
sc 1752 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 1754 dev/ic/ncr5380sbc.c if (ncr5380_wait_not_req(sc)) {
sc 1760 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 1790 dev/ic/ncr5380sbc.c ncr5380_msg_out(sc)
sc 1791 dev/ic/ncr5380sbc.c register struct ncr5380_softc *sc;
sc 1793 dev/ic/ncr5380sbc.c struct sci_req *sr = sc->sc_current;
sc 1798 dev/ic/ncr5380sbc.c *sc->sci_tcmd = PHASE_MSG_OUT;
sc 1807 dev/ic/ncr5380sbc.c icmd = *sc->sci_icmd & SCI_ICMD_RMASK;
sc 1809 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 1811 dev/ic/ncr5380sbc.c if (sc->sc_prevphase == PHASE_MSG_OUT) {
sc 1812 dev/ic/ncr5380sbc.c if (sc->sc_omp == sc->sc_omess) {
sc 1824 dev/ic/ncr5380sbc.c sc->sc_msgpriq |= sc->sc_msgoutq;
sc 1825 dev/ic/ncr5380sbc.c NCR_TRACE("msg_out: retrans priq=0x%x\n", sc->sc_msgpriq);
sc 1828 dev/ic/ncr5380sbc.c n = sc->sc_omp - sc->sc_omess;
sc 1835 dev/ic/ncr5380sbc.c sc->sc_msgoutq = 0;
sc 1839 dev/ic/ncr5380sbc.c sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
sc 1840 dev/ic/ncr5380sbc.c sc->sc_msgpriq &= ~sc->sc_msgout;
sc 1841 dev/ic/ncr5380sbc.c sc->sc_msgoutq |= sc->sc_msgout;
sc 1844 dev/ic/ncr5380sbc.c switch (sc->sc_msgout) {
sc 1849 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname);
sc 1859 dev/ic/ncr5380sbc.c if (sc->sc_no_disconnect & (1 << sr->sr_target))
sc 1863 dev/ic/ncr5380sbc.c sc->sc_omess[0] = msg | sr->sr_lun;
sc 1872 dev/ic/ncr5380sbc.c sc->sc_omess[0] = MSG_BUS_DEV_RESET;
sc 1878 dev/ic/ncr5380sbc.c sc->sc_omess[0] = MSG_MESSAGE_REJECT;
sc 1884 dev/ic/ncr5380sbc.c sc->sc_omess[0] = MSG_PARITY_ERROR;
sc 1890 dev/ic/ncr5380sbc.c sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
sc 1899 dev/ic/ncr5380sbc.c sc->sc_omess[0] = MSG_ABORT;
sc 1905 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname);
sc 1909 dev/ic/ncr5380sbc.c sc->sc_omess[0] = MSG_NOOP;
sc 1915 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname);
sc 1919 dev/ic/ncr5380sbc.c sc->sc_omp = &sc->sc_omess[n];
sc 1928 dev/ic/ncr5380sbc.c if (!SCI_BUSY(sc)) {
sc 1932 dev/ic/ncr5380sbc.c if (ncr5380_wait_req(sc)) {
sc 1936 dev/ic/ncr5380sbc.c phase = SCI_BUS_PHASE(*sc->sci_bus_csr);
sc 1950 dev/ic/ncr5380sbc.c if (n == 0 && sc->sc_msgpriq == 0) {
sc 1952 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 1958 dev/ic/ncr5380sbc.c *sc->sci_odata = *--sc->sc_omp;
sc 1962 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 1965 dev/ic/ncr5380sbc.c if (ncr5380_wait_not_req(sc)) {
sc 1972 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 1982 dev/ic/ncr5380sbc.c if (sc->sc_msgpriq != 0) {
sc 1998 dev/ic/ncr5380sbc.c *sc->sci_icmd = icmd;
sc 2011 dev/ic/ncr5380sbc.c ncr5380_command(sc)
sc 2012 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 2014 dev/ic/ncr5380sbc.c struct sci_req *sr = sc->sc_current;
sc 2020 dev/ic/ncr5380sbc.c *sc->sci_tcmd = PHASE_COMMAND;
sc 2028 dev/ic/ncr5380sbc.c len = ncr5380_pio_out(sc, PHASE_COMMAND, sizeof(rqs),
sc 2034 dev/ic/ncr5380sbc.c len = ncr5380_pio_out(sc, PHASE_COMMAND, xs->cmdlen,
sc 2047 dev/ic/ncr5380sbc.c sc->sc_state |= NCR_ABORTING;
sc 2048 dev/ic/ncr5380sbc.c ncr_sched_msgout(sc, SEND_ABORT);
sc 2061 dev/ic/ncr5380sbc.c ncr5380_data_xfer(sc, phase)
sc 2062 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 2065 dev/ic/ncr5380sbc.c struct sci_req *sr = sc->sc_current;
sc 2073 dev/ic/ncr5380sbc.c printf("%s: sense phase error\n", sc->sc_dev.dv_xname);
sc 2077 dev/ic/ncr5380sbc.c *sc->sci_tcmd = PHASE_DATA_IN;
sc 2078 dev/ic/ncr5380sbc.c len = ncr5380_pio_in(sc, phase, sizeof(xs->sense),
sc 2086 dev/ic/ncr5380sbc.c if (sc->sc_state & NCR_ABORTING) {
sc 2088 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname, phase_names[phase & 7]);
sc 2096 dev/ic/ncr5380sbc.c printf("%s: data phase error\n", sc->sc_dev.dv_xname);
sc 2101 dev/ic/ncr5380sbc.c if (sc->sc_datalen <= 0) {
sc 2104 dev/ic/ncr5380sbc.c ncr5380_pio_in(sc, phase, 4096, NULL);
sc 2106 dev/ic/ncr5380sbc.c ncr5380_pio_out(sc, phase, 4096, NULL);
sc 2108 dev/ic/ncr5380sbc.c if (SCI_BUS_PHASE(*sc->sci_bus_csr) == phase) {
sc 2111 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname);
sc 2122 dev/ic/ncr5380sbc.c (sc->sc_datalen >= sc->sc_min_dma_len))
sc 2131 dev/ic/ncr5380sbc.c (*sc->sc_dma_start)(sc);
sc 2139 dev/ic/ncr5380sbc.c NCR_TRACE("data_xfer: doing PIO, len=%d\n", sc->sc_datalen);
sc 2141 dev/ic/ncr5380sbc.c *sc->sci_tcmd = phase; /* XXX: OK for PDMA? */
sc 2143 dev/ic/ncr5380sbc.c len = (*sc->sc_pio_out)(sc, phase, sc->sc_datalen, sc->sc_dataptr);
sc 2145 dev/ic/ncr5380sbc.c len = (*sc->sc_pio_in) (sc, phase, sc->sc_datalen, sc->sc_dataptr);
sc 2147 dev/ic/ncr5380sbc.c sc->sc_dataptr += len;
sc 2148 dev/ic/ncr5380sbc.c sc->sc_datalen -= len;
sc 2150 dev/ic/ncr5380sbc.c NCR_TRACE("data_xfer: did PIO, resid=%d\n", sc->sc_datalen);
sc 2154 dev/ic/ncr5380sbc.c sc->sc_state |= NCR_ABORTING;
sc 2155 dev/ic/ncr5380sbc.c ncr_sched_msgout(sc, SEND_ABORT);
sc 2161 dev/ic/ncr5380sbc.c ncr5380_status(sc)
sc 2162 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 2166 dev/ic/ncr5380sbc.c struct sci_req *sr = sc->sc_current;
sc 2169 dev/ic/ncr5380sbc.c *sc->sci_tcmd = PHASE_STATUS;
sc 2171 dev/ic/ncr5380sbc.c len = ncr5380_pio_in(sc, PHASE_STATUS, 1, &status);
sc 2192 dev/ic/ncr5380sbc.c ncr5380_machine(sc)
sc 2193 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 2200 dev/ic/ncr5380sbc.c if (sc->sc_state == NCR_IDLE)
sc 2202 dev/ic/ncr5380sbc.c if (sc->sc_current == NULL)
sc 2206 dev/ic/ncr5380sbc.c sr = sc->sc_current;
sc 2215 dev/ic/ncr5380sbc.c if (sc->sc_state & NCR_DOINGDMA) {
sc 2222 dev/ic/ncr5380sbc.c if (!SCI_BUSY(sc)) {
sc 2237 dev/ic/ncr5380sbc.c if (*sc->sci_bus_csr & SCI_BUS_REQ)
sc 2240 dev/ic/ncr5380sbc.c if (sc->sc_state & NCR_ABORTING) {
sc 2242 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname);
sc 2247 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname);
sc 2248 dev/ic/ncr5380sbc.c sc->sc_state |= NCR_ABORTING;
sc 2249 dev/ic/ncr5380sbc.c ncr_sched_msgout(sc, SEND_ABORT);
sc 2255 dev/ic/ncr5380sbc.c phase = SCI_BUS_PHASE(*sc->sci_bus_csr);
sc 2270 dev/ic/ncr5380sbc.c *sc->sci_tcmd = phase; /* acknowledge phase change */
sc 2277 dev/ic/ncr5380sbc.c act_flags = ncr5380_data_xfer(sc, phase);
sc 2281 dev/ic/ncr5380sbc.c act_flags = ncr5380_command(sc);
sc 2285 dev/ic/ncr5380sbc.c act_flags = ncr5380_status(sc);
sc 2289 dev/ic/ncr5380sbc.c act_flags = ncr5380_msg_out(sc);
sc 2293 dev/ic/ncr5380sbc.c act_flags = ncr5380_msg_in(sc);
sc 2298 dev/ic/ncr5380sbc.c sc->sc_state |= NCR_ABORTING;
sc 2299 dev/ic/ncr5380sbc.c ncr_sched_msgout(sc, SEND_ABORT);
sc 2303 dev/ic/ncr5380sbc.c sc->sc_prevphase = phase;
sc 2318 dev/ic/ncr5380sbc.c (*sc->sc_dma_poll)(sc);
sc 2322 dev/ic/ncr5380sbc.c sc->sc_state |= NCR_ABORTING;
sc 2325 dev/ic/ncr5380sbc.c (*sc->sc_dma_stop)(sc);
sc 2326 dev/ic/ncr5380sbc.c SCI_CLR_INTR(sc); /* XXX */
sc 2332 dev/ic/ncr5380sbc.c if (sc->sc_state & NCR_ABORTING) {
sc 2333 dev/ic/ncr5380sbc.c ncr_sched_msgout(sc, SEND_ABORT);
sc 2341 dev/ic/ncr5380sbc.c if (*(sc->sci_csr) & SCI_CSR_PERR) {
sc 2342 dev/ic/ncr5380sbc.c printf("%s: parity error!\n", sc->sc_dev.dv_xname);
sc 2344 dev/ic/ncr5380sbc.c ncr_sched_msgout(sc, SEND_PARITY_ERROR);
sc 2359 dev/ic/ncr5380sbc.c sc->sc_state |= NCR_ABORTING;
sc 2361 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname, sr->sr_target, sr->sr_lun);
sc 2362 dev/ic/ncr5380sbc.c ncr5380_reset_scsibus(sc);
sc 2369 dev/ic/ncr5380sbc.c if (sc->sc_datalen < 0) {
sc 2371 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname, -sc->sc_datalen,
sc 2373 dev/ic/ncr5380sbc.c sc->sc_datalen = 0;
sc 2375 dev/ic/ncr5380sbc.c xs->resid = sc->sc_datalen;
sc 2378 dev/ic/ncr5380sbc.c ncr5380_done(sc);
sc 2389 dev/ic/ncr5380sbc.c if (!SCI_BUSY(sc))
sc 2397 dev/ic/ncr5380sbc.c sc->sc_dev.dv_xname, sr->sr_target, sr->sr_lun);
sc 2398 dev/ic/ncr5380sbc.c ncr5380_reset_scsibus(sc);
sc 2403 dev/ic/ncr5380sbc.c *sc->sci_icmd = 0;
sc 2404 dev/ic/ncr5380sbc.c *sc->sci_mode = 0;
sc 2405 dev/ic/ncr5380sbc.c *sc->sci_tcmd = PHASE_INVALID;
sc 2406 dev/ic/ncr5380sbc.c *sc->sci_sel_enb = 0;
sc 2407 dev/ic/ncr5380sbc.c SCI_CLR_INTR(sc);
sc 2408 dev/ic/ncr5380sbc.c *sc->sci_sel_enb = 0x80;
sc 2420 dev/ic/ncr5380sbc.c sc->sc_state = NCR_IDLE;
sc 2421 dev/ic/ncr5380sbc.c sc->sc_current = NULL;
sc 2424 dev/ic/ncr5380sbc.c sc->sc_dataptr = NULL;
sc 2425 dev/ic/ncr5380sbc.c sc->sc_datalen = 0;
sc 2426 dev/ic/ncr5380sbc.c sc->sc_prevphase = PHASE_INVALID;
sc 2427 dev/ic/ncr5380sbc.c sc->sc_msgpriq = 0;
sc 2428 dev/ic/ncr5380sbc.c sc->sc_msgoutq = 0;
sc 2429 dev/ic/ncr5380sbc.c sc->sc_msgout = 0;
sc 2559 dev/ic/ncr5380sbc.c struct ncr5380_softc *sc;
sc 2563 dev/ic/ncr5380sbc.c sc = ncr5380_debug_sc;
sc 2565 dev/ic/ncr5380sbc.c if (sc == NULL) {
sc 2570 dev/ic/ncr5380sbc.c db_printf("sc_ncmds=%d\n", sc->sc_ncmds);
sc 2573 dev/ic/ncr5380sbc.c sr = &sc->sc_ring[i];
sc 2575 dev/ic/ncr5380sbc.c if (sr == sc->sc_current)
sc 2581 dev/ic/ncr5380sbc.c db_printf("sc_rr=%d, current=%d\n", sc->sc_rr, k);
sc 2586 dev/ic/ncr5380sbc.c sr = sc->sc_matrix[i][j];
sc 2593 dev/ic/ncr5380sbc.c db_printf("sc_state=0x%x\n", sc->sc_state);
sc 2594 dev/ic/ncr5380sbc.c db_printf("sc_current=%p\n", sc->sc_current);
sc 2595 dev/ic/ncr5380sbc.c db_printf("sc_dataptr=%p\n", sc->sc_dataptr);
sc 2596 dev/ic/ncr5380sbc.c db_printf("sc_datalen=0x%x\n", sc->sc_datalen);
sc 2598 dev/ic/ncr5380sbc.c db_printf("sc_prevphase=%d\n", sc->sc_prevphase);
sc 2599 dev/ic/ncr5380sbc.c db_printf("sc_msgpriq=0x%x\n", sc->sc_msgpriq);
sc 41 dev/ic/ncr5380var.h #define SCI_CLR_INTR(sc) (*(sc)->sci_iack)
sc 42 dev/ic/ncr5380var.h #define SCI_BUSY(sc) (*sc->sci_bus_csr & SCI_BUS_BSY)
sc 134 dev/ic/ncr53c9x.c #define NCR_SET_COUNT(sc, size) do { \
sc 135 dev/ic/ncr53c9x.c NCR_WRITE_REG((sc), NCR_TCL, (size)); \
sc 136 dev/ic/ncr53c9x.c NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \
sc 137 dev/ic/ncr53c9x.c if ((sc->sc_cfg2 & NCRCFG2_FE) || \
sc 138 dev/ic/ncr53c9x.c (sc->sc_rev == NCR_VARIANT_FAS366)) { \
sc 139 dev/ic/ncr53c9x.c NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \
sc 141 dev/ic/ncr53c9x.c if (sc->sc_rev == NCR_VARIANT_FAS366) { \
sc 142 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_RCH, 0); \
sc 189 dev/ic/ncr53c9x.c ncr53c9x_attach(sc, adapter, dev)
sc 190 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 196 dev/ic/ncr53c9x.c timeout_set(&sc->sc_watchdog, ncr53c9x_watch, sc);
sc 203 dev/ic/ncr53c9x.c if (sc->sc_omess == NULL)
sc 204 dev/ic/ncr53c9x.c sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
sc 206 dev/ic/ncr53c9x.c if (sc->sc_imess == NULL)
sc 207 dev/ic/ncr53c9x.c sc->sc_imess = malloc(NCR_MAX_MSG_LEN+1, M_DEVBUF, M_NOWAIT);
sc 209 dev/ic/ncr53c9x.c if (sc->sc_omess == NULL || sc->sc_imess == NULL) {
sc 217 dev/ic/ncr53c9x.c if (sc->sc_rev >= NCR_VARIANT_MAX) {
sc 219 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, sc->sc_rev);
sc 224 dev/ic/ncr53c9x.c ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
sc 226 dev/ic/ncr53c9x.c sc->sc_ccf = FREQTOCCF(sc->sc_freq);
sc 229 dev/ic/ncr53c9x.c if (sc->sc_ccf == 1)
sc 230 dev/ic/ncr53c9x.c sc->sc_ccf = 2;
sc 243 dev/ic/ncr53c9x.c sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
sc 246 dev/ic/ncr53c9x.c sc->sc_ccf &= 7;
sc 249 dev/ic/ncr53c9x.c switch (sc->sc_rev) {
sc 251 dev/ic/ncr53c9x.c sc->sc_ntarg = 16;
sc 254 dev/ic/ncr53c9x.c sc->sc_ntarg = 8;
sc 259 dev/ic/ncr53c9x.c sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
sc 260 dev/ic/ncr53c9x.c sc->sc_state = 0;
sc 261 dev/ic/ncr53c9x.c ncr53c9x_init(sc, 1);
sc 266 dev/ic/ncr53c9x.c sc->sc_link.adapter_softc = sc;
sc 267 dev/ic/ncr53c9x.c sc->sc_link.adapter_target = sc->sc_id;
sc 268 dev/ic/ncr53c9x.c sc->sc_link.adapter = adapter;
sc 269 dev/ic/ncr53c9x.c sc->sc_link.device = dev;
sc 270 dev/ic/ncr53c9x.c sc->sc_link.openings = 2;
sc 271 dev/ic/ncr53c9x.c sc->sc_link.adapter_buswidth = sc->sc_ntarg;
sc 274 dev/ic/ncr53c9x.c saa.saa_sc_link = &sc->sc_link;
sc 279 dev/ic/ncr53c9x.c config_found(&sc->sc_dev, &saa, scsiprint);
sc 280 dev/ic/ncr53c9x.c timeout_add(&sc->sc_watchdog, 60*hz);
sc 292 dev/ic/ncr53c9x.c ncr53c9x_reset(sc)
sc 293 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 297 dev/ic/ncr53c9x.c NCRDMA_RESET(sc);
sc 300 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_RSTCHIP);
sc 301 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_NOP);
sc 305 dev/ic/ncr53c9x.c switch (sc->sc_rev) {
sc 308 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
sc 309 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
sc 315 dev/ic/ncr53c9x.c sc->sc_features |= NCR_F_HASCFG3;
sc 316 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
sc 318 dev/ic/ncr53c9x.c sc->sc_features |= NCR_F_SELATN3;
sc 319 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
sc 321 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
sc 322 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
sc 323 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
sc 324 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
sc 327 dev/ic/ncr53c9x.c sc->sc_features |=
sc 329 dev/ic/ncr53c9x.c sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO;
sc 330 dev/ic/ncr53c9x.c sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI;
sc 331 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
sc 332 dev/ic/ncr53c9x.c sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE | NCRCFG2_HME32 */
sc 333 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
sc 334 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
sc 335 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
sc 336 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
sc 337 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
sc 341 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 342 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
sc 343 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
sc 344 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
sc 345 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
sc 348 dev/ic/ncr53c9x.c if (sc->sc_rev == NCR_VARIANT_AM53C974)
sc 349 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
sc 353 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, sc->sc_rev);
sc 355 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname,
sc 356 dev/ic/ncr53c9x.c sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3,
sc 357 dev/ic/ncr53c9x.c sc->sc_ccf, sc->sc_timeout);
sc 365 dev/ic/ncr53c9x.c ncr53c9x_scsi_reset(sc)
sc 366 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 369 dev/ic/ncr53c9x.c (*sc->sc_glue->gl_dma_stop)(sc);
sc 371 dev/ic/ncr53c9x.c printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname);
sc 372 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_RSTSCSI);
sc 379 dev/ic/ncr53c9x.c ncr53c9x_init(sc, doreset)
sc 380 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 387 dev/ic/ncr53c9x.c NCR_TRACE(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
sc 396 dev/ic/ncr53c9x.c if (sc->sc_state == 0) {
sc 399 dev/ic/ncr53c9x.c TAILQ_INIT(&sc->ready_list);
sc 400 dev/ic/ncr53c9x.c sc->sc_nexus = NULL;
sc 401 dev/ic/ncr53c9x.c bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo));
sc 402 dev/ic/ncr53c9x.c for (r = 0; r < sc->sc_ntarg; r++) {
sc 403 dev/ic/ncr53c9x.c LIST_INIT(&sc->sc_tinfo[r].luns);
sc 407 dev/ic/ncr53c9x.c sc->sc_state = NCR_CLEANING;
sc 408 dev/ic/ncr53c9x.c sc->sc_msgify = 0;
sc 409 dev/ic/ncr53c9x.c if ((ecb = sc->sc_nexus) != NULL) {
sc 411 dev/ic/ncr53c9x.c ncr53c9x_done(sc, ecb);
sc 413 dev/ic/ncr53c9x.c for (r = 0; r < sc->sc_ntarg; r++) {
sc 414 dev/ic/ncr53c9x.c LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
sc 424 dev/ic/ncr53c9x.c ncr53c9x_done(sc, ecb);
sc 430 dev/ic/ncr53c9x.c ncr53c9x_done(sc, ecb);
sc 440 dev/ic/ncr53c9x.c ncr53c9x_reset(sc);
sc 442 dev/ic/ncr53c9x.c sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
sc 443 dev/ic/ncr53c9x.c for (r = 0; r < sc->sc_ntarg; r++) {
sc 444 dev/ic/ncr53c9x.c struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r];
sc 447 dev/ic/ncr53c9x.c ti->flags = ((!(sc->sc_cfflags & (1 << (r + 16))) &&
sc 448 dev/ic/ncr53c9x.c sc->sc_minsync) ? 0 : T_SYNCHOFF) |
sc 449 dev/ic/ncr53c9x.c ((sc->sc_cfflags & (1 << r)) ? T_RSELECTOFF : 0) |
sc 455 dev/ic/ncr53c9x.c ti->period = sc->sc_minsync;
sc 461 dev/ic/ncr53c9x.c sc->sc_state = NCR_SBR;
sc 462 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_RSTSCSI);
sc 469 dev/ic/ncr53c9x.c switch (sc->sc_rev) {
sc 478 dev/ic/ncr53c9x.c sc->sc_state = NCR_IDLE;
sc 479 dev/ic/ncr53c9x.c ncr53c9x_sched(sc);
sc 493 dev/ic/ncr53c9x.c ncr53c9x_readregs(sc)
sc 494 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 497 dev/ic/ncr53c9x.c sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
sc 499 dev/ic/ncr53c9x.c sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
sc 501 dev/ic/ncr53c9x.c if (sc->sc_rev == NCR_VARIANT_FAS366)
sc 502 dev/ic/ncr53c9x.c sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2);
sc 504 dev/ic/ncr53c9x.c sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
sc 506 dev/ic/ncr53c9x.c if (sc->sc_glue->gl_clear_latched_intr != NULL)
sc 507 dev/ic/ncr53c9x.c (*sc->sc_glue->gl_clear_latched_intr)(sc);
sc 514 dev/ic/ncr53c9x.c sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS)
sc 516 dev/ic/ncr53c9x.c : sc->sc_espstat & NCRSTAT_PHASE;
sc 519 dev/ic/ncr53c9x.c sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2));
sc 526 dev/ic/ncr53c9x.c ncr53c9x_stp2cpb(sc, period)
sc 527 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 531 dev/ic/ncr53c9x.c v = (sc->sc_freq * period) / 250;
sc 532 dev/ic/ncr53c9x.c if (ncr53c9x_cpb2stp(sc, v) < period)
sc 539 dev/ic/ncr53c9x.c ncr53c9x_setsync(sc, ti)
sc 540 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 544 dev/ic/ncr53c9x.c u_char cfg3 = sc->sc_cfg3 | ti->cfg3;
sc 548 dev/ic/ncr53c9x.c synctp = ncr53c9x_stp2cpb(sc, ti->period);
sc 549 dev/ic/ncr53c9x.c if (sc->sc_features & NCR_F_FASTSCSI) {
sc 562 dev/ic/ncr53c9x.c cfg3 |= (sc->sc_rev == NCR_VARIANT_AM53C974) ?
sc 570 dev/ic/ncr53c9x.c if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
sc 578 dev/ic/ncr53c9x.c if (sc->sc_features & NCR_F_HASCFG3)
sc 579 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
sc 581 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
sc 582 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
sc 593 dev/ic/ncr53c9x.c ncr53c9x_select(sc, ecb)
sc 594 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 600 dev/ic/ncr53c9x.c struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target];
sc 610 dev/ic/ncr53c9x.c sc->sc_state = NCR_SELECTING;
sc 630 dev/ic/ncr53c9x.c if (sc->sc_rev == NCR_VARIANT_FAS366) {
sc 631 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 632 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME);
sc 634 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_SELID, target);
sc 636 dev/ic/ncr53c9x.c ncr53c9x_setsync(sc, ti);
sc 644 dev/ic/ncr53c9x.c if (sc->sc_features & NCR_F_DMASELECT) {
sc 647 dev/ic/ncr53c9x.c sc->sc_cmdlen = clen;
sc 648 dev/ic/ncr53c9x.c sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
sc 650 dev/ic/ncr53c9x.c NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0,
sc 653 dev/ic/ncr53c9x.c NCR_SET_COUNT(sc, dmasize);
sc 655 dev/ic/ncr53c9x.c if (sc->sc_rev != NCR_VARIANT_FAS366)
sc 656 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
sc 659 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
sc 660 dev/ic/ncr53c9x.c NCRDMA_GO(sc);
sc 662 dev/ic/ncr53c9x.c ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
sc 663 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_SELNATN);
sc 670 dev/ic/ncr53c9x.c if (sc->sc_features & NCR_F_SELATN3)
sc 700 dev/ic/ncr53c9x.c if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) {
sc 704 dev/ic/ncr53c9x.c sc->sc_cmdlen = clen;
sc 705 dev/ic/ncr53c9x.c sc->sc_cmdp = cmd;
sc 707 dev/ic/ncr53c9x.c NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
sc 709 dev/ic/ncr53c9x.c NCR_SET_COUNT(sc, dmasize);
sc 713 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
sc 717 dev/ic/ncr53c9x.c sc->sc_msgout = SEND_TAG;
sc 718 dev/ic/ncr53c9x.c sc->sc_flags |= NCR_ATN;
sc 719 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
sc 721 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
sc 722 dev/ic/ncr53c9x.c NCRDMA_GO(sc);
sc 732 dev/ic/ncr53c9x.c ncr53c9x_wrfifo(sc, cmd, clen);
sc 738 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_SELATNS);
sc 740 dev/ic/ncr53c9x.c sc->sc_msgout = SEND_TAG;
sc 741 dev/ic/ncr53c9x.c sc->sc_flags |= NCR_ATN;
sc 742 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_SELATN3);
sc 744 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_SELATN);
sc 748 dev/ic/ncr53c9x.c ncr53c9x_free_ecb(sc, ecb, flags)
sc 749 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 762 dev/ic/ncr53c9x.c ncr53c9x_get_ecb(sc, flags)
sc 763 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 797 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc = sc_link->adapter_softc;
sc 809 dev/ic/ncr53c9x.c ti = &sc->sc_tinfo[sc_link->target];
sc 826 dev/ic/ncr53c9x.c if ((ecb = ncr53c9x_get_ecb(sc, flags)) == NULL)
sc 847 dev/ic/ncr53c9x.c TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
sc 849 dev/ic/ncr53c9x.c if (sc->sc_state == NCR_IDLE)
sc 850 dev/ic/ncr53c9x.c ncr53c9x_sched(sc);
sc 858 dev/ic/ncr53c9x.c if (ncr53c9x_poll(sc, xs, ecb->timeout)) {
sc 860 dev/ic/ncr53c9x.c if (ncr53c9x_poll(sc, xs, ecb->timeout))
sc 870 dev/ic/ncr53c9x.c ncr53c9x_poll(sc, xs, count)
sc 871 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 878 dev/ic/ncr53c9x.c if (NCRDMA_ISINTR(sc)) {
sc 879 dev/ic/ncr53c9x.c ncr53c9x_intr(sc);
sc 882 dev/ic/ncr53c9x.c if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT)
sc 883 dev/ic/ncr53c9x.c ncr53c9x_intr(sc);
sc 887 dev/ic/ncr53c9x.c if (sc->sc_state == NCR_IDLE) {
sc 889 dev/ic/ncr53c9x.c ncr53c9x_sched(sc);
sc 909 dev/ic/ncr53c9x.c ncr53c9x_sched(sc)
sc 910 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 920 dev/ic/ncr53c9x.c if (sc->sc_state != NCR_IDLE)
sc 921 dev/ic/ncr53c9x.c panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
sc 927 dev/ic/ncr53c9x.c TAILQ_FOREACH(ecb, &sc->ready_list, chain) {
sc 929 dev/ic/ncr53c9x.c ti = &sc->sc_tinfo[sc_link->target];
sc 1019 dev/ic/ncr53c9x.c TAILQ_REMOVE(&sc->ready_list, ecb, chain);
sc 1021 dev/ic/ncr53c9x.c sc->sc_nexus = ecb;
sc 1022 dev/ic/ncr53c9x.c ncr53c9x_select(sc, ecb);
sc 1026 dev/ic/ncr53c9x.c TAILQ_REMOVE(&sc->ready_list, ecb, chain);
sc 1028 dev/ic/ncr53c9x.c sc->sc_nexus = ecb;
sc 1029 dev/ic/ncr53c9x.c ncr53c9x_select(sc, ecb);
sc 1039 dev/ic/ncr53c9x.c ncr53c9x_sense(sc, ecb)
sc 1040 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 1045 dev/ic/ncr53c9x.c struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->target];
sc 1064 dev/ic/ncr53c9x.c ncr53c9x_dequeue(sc, ecb);
sc 1067 dev/ic/ncr53c9x.c if (ecb == sc->sc_nexus) {
sc 1068 dev/ic/ncr53c9x.c ncr53c9x_select(sc, ecb);
sc 1070 dev/ic/ncr53c9x.c TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
sc 1072 dev/ic/ncr53c9x.c if (sc->sc_state == NCR_IDLE)
sc 1073 dev/ic/ncr53c9x.c ncr53c9x_sched(sc);
sc 1081 dev/ic/ncr53c9x.c ncr53c9x_done(sc, ecb)
sc 1082 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 1087 dev/ic/ncr53c9x.c struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->target];
sc 1102 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, sc_link->openings);
sc 1122 dev/ic/ncr53c9x.c ncr53c9x_sense(sc, ecb);
sc 1145 dev/ic/ncr53c9x.c ncr53c9x_dequeue(sc, ecb);
sc 1146 dev/ic/ncr53c9x.c if (ecb == sc->sc_nexus) {
sc 1147 dev/ic/ncr53c9x.c sc->sc_nexus = NULL;
sc 1148 dev/ic/ncr53c9x.c if (sc->sc_state != NCR_CLEANING) {
sc 1149 dev/ic/ncr53c9x.c sc->sc_state = NCR_IDLE;
sc 1150 dev/ic/ncr53c9x.c ncr53c9x_sched(sc);
sc 1164 dev/ic/ncr53c9x.c ncr53c9x_free_ecb(sc, ecb, xs->flags);
sc 1170 dev/ic/ncr53c9x.c ncr53c9x_dequeue(sc, ecb)
sc 1171 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 1175 dev/ic/ncr53c9x.c &sc->sc_tinfo[ecb->xs->sc_link->target];
sc 1203 dev/ic/ncr53c9x.c TAILQ_REMOVE(&sc->ready_list, ecb, chain);
sc 1219 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_SETATN); \
sc 1220 dev/ic/ncr53c9x.c sc->sc_flags |= NCR_ATN; \
sc 1221 dev/ic/ncr53c9x.c sc->sc_msgpriq |= (m); \
sc 1225 dev/ic/ncr53c9x.c ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
sc 1229 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 1231 dev/ic/ncr53c9x.c if (sc->sc_phase == COMMAND_PHASE ||
sc 1232 dev/ic/ncr53c9x.c sc->sc_phase == MESSAGE_OUT_PHASE)
sc 1237 dev/ic/ncr53c9x.c ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
sc 1244 dev/ic/ncr53c9x.c buf = sc->sc_imess;
sc 1245 dev/ic/ncr53c9x.c sc->sc_imlen = 0;
sc 1248 dev/ic/ncr53c9x.c buf = sc->sc_imess + sc->sc_imlen;
sc 1259 dev/ic/ncr53c9x.c n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
sc 1261 dev/ic/ncr53c9x.c if (sc->sc_rev == NCR_VARIANT_FAS366) {
sc 1265 dev/ic/ncr53c9x.c buf[i] = NCR_READ_REG(sc, NCR_FIFO);
sc 1267 dev/ic/ncr53c9x.c if (sc->sc_espstat2 & FAS_STAT2_ISHUTTLE) {
sc 1269 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_FIFO, 0);
sc 1270 dev/ic/ncr53c9x.c buf[i++] = NCR_READ_REG(sc, NCR_FIFO);
sc 1272 dev/ic/ncr53c9x.c NCR_READ_REG(sc, NCR_FIFO);
sc 1274 dev/ic/ncr53c9x.c ncr53c9x_flushfifo(sc);
sc 1278 dev/ic/ncr53c9x.c buf[i] = NCR_READ_REG(sc, NCR_FIFO);
sc 1281 dev/ic/ncr53c9x.c sc->sc_imlen += i;
sc 1289 dev/ic/ncr53c9x.c (int)sc->sc_imlen));
sc 1291 dev/ic/ncr53c9x.c for (j = 0; j < sc->sc_imlen; j++)
sc 1292 dev/ic/ncr53c9x.c printf(" %02x", sc->sc_imess[j]);
sc 1297 dev/ic/ncr53c9x.c return sc->sc_imlen;
sc 1301 dev/ic/ncr53c9x.c ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
sc 1315 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_FIFO, p[i]);
sc 1317 dev/ic/ncr53c9x.c if (sc->sc_rev == NCR_VARIANT_FAS366)
sc 1318 dev/ic/ncr53c9x.c NCR_WRITE_REG(sc, NCR_FIFO, 0);
sc 1323 dev/ic/ncr53c9x.c ncr53c9x_reselect(sc, message, tagtype, tagid)
sc 1324 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 1334 dev/ic/ncr53c9x.c if (sc->sc_rev == NCR_VARIANT_FAS366) {
sc 1335 dev/ic/ncr53c9x.c target = sc->sc_selid;
sc 1342 dev/ic/ncr53c9x.c selid = sc->sc_selid & ~(1 << sc->sc_id);
sc 1345 dev/ic/ncr53c9x.c " sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid);
sc 1359 dev/ic/ncr53c9x.c ti = &sc->sc_tinfo[target];
sc 1373 dev/ic/ncr53c9x.c sc->sc_state = NCR_IDENTIFIED;
sc 1379 dev/ic/ncr53c9x.c " sending ABORT\n", sc->sc_dev.dv_xname, target, lun, tagtype, tagid);
sc 1384 dev/ic/ncr53c9x.c sc->sc_state = NCR_CONNECTED;
sc 1385 dev/ic/ncr53c9x.c sc->sc_nexus = ecb;
sc 1386 dev/ic/ncr53c9x.c ncr53c9x_setsync(sc, ti);
sc 1394 dev/ic/ncr53c9x.c sc->sc_dp = ecb->daddr;
sc 1395 dev/ic/ncr53c9x.c sc->sc_dleft = ecb->dleft;
sc 1434 dev/ic/ncr53c9x.c ncr53c9x_msgin(sc)
sc 1435 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 1438 dev/ic/ncr53c9x.c NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
sc 1440 dev/ic/ncr53c9x.c if (sc->sc_imlen == 0) {
sc 1441 dev/ic/ncr53c9x.c printf("%s: msgin: no msg byte available\n", sc->sc_dev.dv_xname);
sc 1451 dev/ic/ncr53c9x.c if (sc->sc_prevphase != MESSAGE_IN_PHASE && sc->sc_state != NCR_RESELECTED) {
sc 1453 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state);
sc 1454 dev/ic/ncr53c9x.c sc->sc_flags &= ~NCR_DROP_MSGI;
sc 1455 dev/ic/ncr53c9x.c sc->sc_imlen = 0;
sc 1458 dev/ic/ncr53c9x.c NCR_TRACE(("<msgbyte:0x%02x>", sc->sc_imess[0]));
sc 1464 dev/ic/ncr53c9x.c if ((sc->sc_flags & NCR_DROP_MSGI)) {
sc 1465 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_MSGOK);
sc 1467 dev/ic/ncr53c9x.c sc->sc_imess[sc->sc_imlen]);
sc 1471 dev/ic/ncr53c9x.c if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
sc 1473 dev/ic/ncr53c9x.c sc->sc_flags |= NCR_DROP_MSGI;
sc 1478 dev/ic/ncr53c9x.c switch (sc->sc_state) {
sc 1484 dev/ic/ncr53c9x.c pb = sc->sc_imess + 1;
sc 1485 dev/ic/ncr53c9x.c plen = sc->sc_imlen - 1;
sc 1488 dev/ic/ncr53c9x.c pb = sc->sc_imess;
sc 1489 dev/ic/ncr53c9x.c plen = sc->sc_imlen;
sc 1498 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_MSGOK);
sc 1502 dev/ic/ncr53c9x.c NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state));
sc 1504 dev/ic/ncr53c9x.c sc->sc_imlen = 0;
sc 1512 dev/ic/ncr53c9x.c switch (sc->sc_state) {
sc 1519 dev/ic/ncr53c9x.c ecb = sc->sc_nexus;
sc 1520 dev/ic/ncr53c9x.c ti = &sc->sc_tinfo[ecb->xs->sc_link->target];
sc 1522 dev/ic/ncr53c9x.c switch (sc->sc_imess[0]) {
sc 1525 dev/ic/ncr53c9x.c if (sc->sc_dleft < 0) {
sc 1528 dev/ic/ncr53c9x.c -(long)sc->sc_dleft);
sc 1529 dev/ic/ncr53c9x.c sc->sc_dleft = 0;
sc 1533 dev/ic/ncr53c9x.c : sc->sc_dleft;
sc 1536 dev/ic/ncr53c9x.c sc->sc_state = NCR_CMDCOMPLETE;
sc 1540 dev/ic/ncr53c9x.c NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
sc 1541 dev/ic/ncr53c9x.c switch (sc->sc_msgout) {
sc 1549 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, ecb->xs->sc_link->target);
sc 1552 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 1569 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, ecb->xs->sc_link->target);
sc 1570 dev/ic/ncr53c9x.c sc->sc_flags &= ~NCR_SYNCHNEGO;
sc 1572 dev/ic/ncr53c9x.c ncr53c9x_setsync(sc, ti);
sc 1577 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, ecb->xs->sc_link->target);
sc 1594 dev/ic/ncr53c9x.c NCR_MSGS(("TAG %x:%x", sc->sc_imess[0], sc->sc_imess[1]));
sc 1600 dev/ic/ncr53c9x.c sc->sc_state = NCR_DISCONNECT;
sc 1608 dev/ic/ncr53c9x.c if (sc->sc_dleft == 0)
sc 1615 dev/ic/ncr53c9x.c ecb->daddr = sc->sc_dp;
sc 1616 dev/ic/ncr53c9x.c ecb->dleft = sc->sc_dleft;
sc 1621 dev/ic/ncr53c9x.c sc->sc_dp = ecb->daddr;
sc 1622 dev/ic/ncr53c9x.c sc->sc_dleft = ecb->dleft;
sc 1626 dev/ic/ncr53c9x.c NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
sc 1627 dev/ic/ncr53c9x.c switch (sc->sc_imess[2]) {
sc 1630 dev/ic/ncr53c9x.c sc->sc_imess[3], sc->sc_imess[4]));
sc 1631 dev/ic/ncr53c9x.c if (sc->sc_imess[1] != 3)
sc 1633 dev/ic/ncr53c9x.c ti->period = sc->sc_imess[3];
sc 1634 dev/ic/ncr53c9x.c ti->offset = sc->sc_imess[4];
sc 1636 dev/ic/ncr53c9x.c if (sc->sc_minsync == 0 ||
sc 1643 dev/ic/ncr53c9x.c if ((sc->sc_flags&NCR_SYNCHNEGO)
sc 1662 dev/ic/ncr53c9x.c p = ncr53c9x_stp2cpb(sc, ti->period);
sc 1663 dev/ic/ncr53c9x.c ti->period = ncr53c9x_cpb2stp(sc, p);
sc 1671 dev/ic/ncr53c9x.c if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) {
sc 1676 dev/ic/ncr53c9x.c sc->sc_minsync)
sc 1678 dev/ic/ncr53c9x.c sc->sc_minsync;
sc 1689 dev/ic/ncr53c9x.c sc->sc_flags &= ~NCR_SYNCHNEGO;
sc 1690 dev/ic/ncr53c9x.c ncr53c9x_setsync(sc, ti);
sc 1695 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, sc->sc_imess[3]);
sc 1696 dev/ic/ncr53c9x.c if (sc->sc_imess[3] == 1) {
sc 1698 dev/ic/ncr53c9x.c ncr53c9x_setsync(sc, ti);
sc 1725 dev/ic/ncr53c9x.c if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
sc 1726 dev/ic/ncr53c9x.c (sc->sc_msgify == 0)) {
sc 1730 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname,
sc 1731 dev/ic/ncr53c9x.c sc->sc_imess[0]);
sc 1734 dev/ic/ncr53c9x.c (void) ncr53c9x_reselect(sc, sc->sc_msgify,
sc 1735 dev/ic/ncr53c9x.c sc->sc_imess[0], sc->sc_imess[1]);
sc 1739 dev/ic/ncr53c9x.c if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
sc 1740 dev/ic/ncr53c9x.c sc->sc_msgify = sc->sc_imess[1];
sc 1745 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname,
sc 1746 dev/ic/ncr53c9x.c sc->sc_imess[1]);
sc 1749 dev/ic/ncr53c9x.c (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
sc 1754 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 1765 dev/ic/ncr53c9x.c if (sc->sc_msgpriq)
sc 1766 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_SETATN);
sc 1769 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_MSGOK);
sc 1772 dev/ic/ncr53c9x.c sc->sc_flags &= ~NCR_DROP_MSGI;
sc 1773 dev/ic/ncr53c9x.c sc->sc_imlen = 0;
sc 1781 dev/ic/ncr53c9x.c ncr53c9x_msgout(sc)
sc 1782 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 1789 dev/ic/ncr53c9x.c sc->sc_msgpriq, sc->sc_prevphase));
sc 1798 dev/ic/ncr53c9x.c if (sc->sc_flags & NCR_ATN) {
sc 1799 dev/ic/ncr53c9x.c if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
sc 1801 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 1803 dev/ic/ncr53c9x.c sc->sc_msgoutq = 0;
sc 1804 dev/ic/ncr53c9x.c sc->sc_omlen = 0;
sc 1807 dev/ic/ncr53c9x.c if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
sc 1808 dev/ic/ncr53c9x.c ncr53c9x_sched_msgout(sc->sc_msgoutq);
sc 1812 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, __LINE__);
sc 1816 dev/ic/ncr53c9x.c if (sc->sc_omlen == 0) {
sc 1818 dev/ic/ncr53c9x.c sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
sc 1819 dev/ic/ncr53c9x.c sc->sc_msgoutq |= sc->sc_msgout;
sc 1820 dev/ic/ncr53c9x.c sc->sc_msgpriq &= ~sc->sc_msgout;
sc 1821 dev/ic/ncr53c9x.c sc->sc_omlen = 1; /* "Default" message len */
sc 1822 dev/ic/ncr53c9x.c switch (sc->sc_msgout) {
sc 1824 dev/ic/ncr53c9x.c ecb = sc->sc_nexus;
sc 1825 dev/ic/ncr53c9x.c ti = &sc->sc_tinfo[ecb->xs->sc_link->target];
sc 1826 dev/ic/ncr53c9x.c sc->sc_omess[0] = MSG_EXTENDED;
sc 1827 dev/ic/ncr53c9x.c sc->sc_omess[1] = 3;
sc 1828 dev/ic/ncr53c9x.c sc->sc_omess[2] = MSG_EXT_SDTR;
sc 1829 dev/ic/ncr53c9x.c sc->sc_omess[3] = ti->period;
sc 1830 dev/ic/ncr53c9x.c sc->sc_omess[4] = ti->offset;
sc 1831 dev/ic/ncr53c9x.c sc->sc_omlen = 5;
sc 1832 dev/ic/ncr53c9x.c if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
sc 1834 dev/ic/ncr53c9x.c ncr53c9x_setsync(sc, ti);
sc 1838 dev/ic/ncr53c9x.c ecb = sc->sc_nexus;
sc 1839 dev/ic/ncr53c9x.c ti = &sc->sc_tinfo[ecb->xs->sc_link->target];
sc 1840 dev/ic/ncr53c9x.c sc->sc_omess[0] = MSG_EXTENDED;
sc 1841 dev/ic/ncr53c9x.c sc->sc_omess[1] = 2;
sc 1842 dev/ic/ncr53c9x.c sc->sc_omess[2] = MSG_EXT_WDTR;
sc 1843 dev/ic/ncr53c9x.c sc->sc_omess[3] = ti->width;
sc 1844 dev/ic/ncr53c9x.c sc->sc_omlen = 4;
sc 1847 dev/ic/ncr53c9x.c if (sc->sc_state != NCR_CONNECTED) {
sc 1849 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, __LINE__);
sc 1851 dev/ic/ncr53c9x.c ecb = sc->sc_nexus;
sc 1852 dev/ic/ncr53c9x.c sc->sc_omess[0] =
sc 1856 dev/ic/ncr53c9x.c if (sc->sc_state != NCR_CONNECTED) {
sc 1858 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, __LINE__);
sc 1860 dev/ic/ncr53c9x.c ecb = sc->sc_nexus;
sc 1861 dev/ic/ncr53c9x.c sc->sc_omess[0] = ecb->tag[0];
sc 1862 dev/ic/ncr53c9x.c sc->sc_omess[1] = ecb->tag[1];
sc 1863 dev/ic/ncr53c9x.c sc->sc_omlen = 2;
sc 1866 dev/ic/ncr53c9x.c sc->sc_flags |= NCR_ABORTING;
sc 1867 dev/ic/ncr53c9x.c sc->sc_omess[0] = MSG_BUS_DEV_RESET;
sc 1868 dev/ic/ncr53c9x.c ecb = sc->sc_nexus;
sc 1869 dev/ic/ncr53c9x.c ti = &sc->sc_tinfo[ecb->xs->sc_link->target];
sc 1876 dev/ic/ncr53c9x.c sc->sc_omess[0] = MSG_PARITY_ERROR;
sc 1879 dev/ic/ncr53c9x.c sc->sc_flags |= NCR_ABORTING;
sc 1880 dev/ic/ncr53c9x.c sc->sc_omess[0] = MSG_ABORT;
sc 1883 dev/ic/ncr53c9x.c sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
sc 1886 dev/ic/ncr53c9x.c sc->sc_omess[0] = MSG_MESSAGE_REJECT;
sc 1902 dev/ic/ncr53c9x.c sc->sc_flags &= ~NCR_ATN;
sc 1903 dev/ic/ncr53c9x.c sc->sc_omess[0] = MSG_NOOP;
sc 1906 dev/ic/ncr53c9x.c sc->sc_omp = sc->sc_omess;
sc 1913 dev/ic/ncr53c9x.c for (i = 0; i<sc->sc_omlen; i++)
sc 1914 dev/ic/ncr53c9x.c NCR_MISC(("<msgbyte:0x%02x>", sc->sc_omess[i]));
sc 1917 dev/ic/ncr53c9x.c if (sc->sc_rev == NCR_VARIANT_FAS366) {
sc 1921 dev/ic/ncr53c9x.c ncr53c9x_flushfifo(sc);
sc 1922 dev/ic/ncr53c9x.c ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen);
sc 1923 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_TRANS);
sc 1926 dev/ic/ncr53c9x.c size = min(sc->sc_omlen, sc->sc_maxxfer);
sc 1927 dev/ic/ncr53c9x.c NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
sc 1929 dev/ic/ncr53c9x.c NCR_SET_COUNT(sc, size);
sc 1932 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
sc 1933 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA);
sc 1934 dev/ic/ncr53c9x.c NCRDMA_GO(sc);
sc 1952 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc = arg;
sc 1959 dev/ic/ncr53c9x.c NCR_TRACE(("[ncr53c9x_intr: state %d] ", sc->sc_state));
sc 1961 dev/ic/ncr53c9x.c if (!NCRDMA_ISINTR(sc))
sc 1966 dev/ic/ncr53c9x.c ncr53c9x_readregs(sc);
sc 1986 dev/ic/ncr53c9x.c if (sc->sc_espintr & NCRINTR_SBR) {
sc 1987 dev/ic/ncr53c9x.c if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
sc 1988 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 1991 dev/ic/ncr53c9x.c if (sc->sc_state != NCR_SBR) {
sc 1993 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 1994 dev/ic/ncr53c9x.c ncr53c9x_init(sc, 0); /* Restart everything */
sc 2000 dev/ic/ncr53c9x.c sc->sc_espintr, sc->sc_espstat,
sc 2001 dev/ic/ncr53c9x.c sc->sc_espstep);
sc 2003 dev/ic/ncr53c9x.c if (sc->sc_nexus)
sc 2005 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 2009 dev/ic/ncr53c9x.c ecb = sc->sc_nexus;
sc 2012 dev/ic/ncr53c9x.c if (sc->sc_espintr & NCRINTR_ERR ||
sc 2013 dev/ic/ncr53c9x.c sc->sc_espstat & NCRSTAT_GE) {
sc 2015 dev/ic/ncr53c9x.c if (sc->sc_espstat & NCRSTAT_GE) {
sc 2017 dev/ic/ncr53c9x.c if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
sc 2018 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 2021 dev/ic/ncr53c9x.c if (sc->sc_state == NCR_CONNECTED ||
sc 2022 dev/ic/ncr53c9x.c sc->sc_state == NCR_SELECTING) {
sc 2024 dev/ic/ncr53c9x.c ncr53c9x_done(sc, ecb);
sc 2029 dev/ic/ncr53c9x.c if (sc->sc_espintr & NCRINTR_ILL) {
sc 2030 dev/ic/ncr53c9x.c if (sc->sc_flags & NCR_EXPECT_ILLCMD) {
sc 2039 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 2041 dev/ic/ncr53c9x.c sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
sc 2047 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, sc->sc_lastcmd,
sc 2048 dev/ic/ncr53c9x.c sc->sc_state, sc->sc_phase,
sc 2049 dev/ic/ncr53c9x.c sc->sc_prevphase);
sc 2050 dev/ic/ncr53c9x.c if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
sc 2051 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 2054 dev/ic/ncr53c9x.c ncr53c9x_init(sc, 1); /* Restart everything */
sc 2058 dev/ic/ncr53c9x.c sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
sc 2067 dev/ic/ncr53c9x.c if (NCRDMA_ISACTIVE(sc)) {
sc 2068 dev/ic/ncr53c9x.c int r = NCRDMA_INTR(sc);
sc 2071 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 2072 dev/ic/ncr53c9x.c ncr53c9x_init(sc, 1);
sc 2076 dev/ic/ncr53c9x.c if (NCRDMA_ISACTIVE(sc))
sc 2079 dev/ic/ncr53c9x.c if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
sc 2084 dev/ic/ncr53c9x.c if (sc->sc_state == NCR_SELECTING)
sc 2090 dev/ic/ncr53c9x.c else if (sc->sc_prevphase == MESSAGE_OUT_PHASE){
sc 2098 dev/ic/ncr53c9x.c if (sc->sc_phase != MESSAGE_IN_PHASE)
sc 2102 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname,
sc 2103 dev/ic/ncr53c9x.c sc->sc_espintr,
sc 2104 dev/ic/ncr53c9x.c sc->sc_espstat,
sc 2105 dev/ic/ncr53c9x.c sc->sc_espstep,
sc 2106 dev/ic/ncr53c9x.c sc->sc_prevphase,
sc 2107 dev/ic/ncr53c9x.c (u_long)sc->sc_omlen);
sc 2108 dev/ic/ncr53c9x.c } else if (sc->sc_dleft == 0) {
sc 2118 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname,
sc 2119 dev/ic/ncr53c9x.c sc->sc_espintr,
sc 2120 dev/ic/ncr53c9x.c sc->sc_espstat,
sc 2121 dev/ic/ncr53c9x.c sc->sc_espstep,
sc 2122 dev/ic/ncr53c9x.c sc->sc_prevphase,
sc 2131 dev/ic/ncr53c9x.c if (sc->sc_espstat & NCRSTAT_PE) {
sc 2132 dev/ic/ncr53c9x.c printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
sc 2133 dev/ic/ncr53c9x.c if (sc->sc_prevphase == MESSAGE_IN_PHASE)
sc 2139 dev/ic/ncr53c9x.c if (sc->sc_espintr & NCRINTR_DIS) {
sc 2140 dev/ic/ncr53c9x.c sc->sc_msgify = 0;
sc 2142 dev/ic/ncr53c9x.c sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
sc 2143 dev/ic/ncr53c9x.c if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
sc 2144 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 2151 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_ENSEL);
sc 2153 dev/ic/ncr53c9x.c switch (sc->sc_state) {
sc 2165 dev/ic/ncr53c9x.c ti = &sc->sc_tinfo[sc_link->target];
sc 2182 dev/ic/ncr53c9x.c if ((sc->sc_flags & NCR_SYNCHNEGO)) {
sc 2188 dev/ic/ncr53c9x.c ti = &sc->sc_tinfo[ecb->xs->sc_link->target];
sc 2189 dev/ic/ncr53c9x.c sc->sc_flags &= ~NCR_SYNCHNEGO;
sc 2194 dev/ic/ncr53c9x.c if ((sc->sc_flags & NCR_ABORTING) == 0) {
sc 2205 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 2212 dev/ic/ncr53c9x.c ncr53c9x_sense(sc, ecb);
sc 2220 dev/ic/ncr53c9x.c sc->sc_nexus = NULL;
sc 2228 dev/ic/ncr53c9x.c switch (sc->sc_state) {
sc 2232 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 2239 dev/ic/ncr53c9x.c if (sc->sc_phase != MESSAGE_IN_PHASE) {
sc 2241 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 2242 dev/ic/ncr53c9x.c ncr53c9x_init(sc, 1);
sc 2247 dev/ic/ncr53c9x.c ncr53c9x_msgin(sc);
sc 2248 dev/ic/ncr53c9x.c if (sc->sc_state != NCR_CONNECTED) {
sc 2251 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 2252 dev/ic/ncr53c9x.c ncr53c9x_init(sc, 1);
sc 2259 dev/ic/ncr53c9x.c ecb = sc->sc_nexus;
sc 2260 dev/ic/ncr53c9x.c if (sc->sc_phase != MESSAGE_IN_PHASE) {
sc 2261 dev/ic/ncr53c9x.c int i = (NCR_READ_REG(sc, NCR_FFLAG)
sc 2268 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, i);
sc 2271 dev/ic/ncr53c9x.c printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
sc 2272 dev/ic/ncr53c9x.c ncr53c9x_init(sc, 1);
sc 2280 dev/ic/ncr53c9x.c ecb = sc->sc_nexus;
sc 2281 dev/ic/ncr53c9x.c if (sc->sc_espintr & NCRINTR_RESEL) {
sc 2282 dev/ic/ncr53c9x.c sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
sc 2283 dev/ic/ncr53c9x.c sc->sc_flags = 0;
sc 2289 dev/ic/ncr53c9x.c if (sc->sc_state == NCR_SELECTING) {
sc 2292 dev/ic/ncr53c9x.c ncr53c9x_dequeue(sc, ecb);
sc 2293 dev/ic/ncr53c9x.c TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
sc 2295 dev/ic/ncr53c9x.c ecb = sc->sc_nexus = NULL;
sc 2297 dev/ic/ncr53c9x.c sc->sc_state = NCR_RESELECTED;
sc 2298 dev/ic/ncr53c9x.c if (sc->sc_phase != MESSAGE_IN_PHASE) {
sc 2304 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 2305 dev/ic/ncr53c9x.c ncr53c9x_init(sc, 1);
sc 2318 dev/ic/ncr53c9x.c nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
sc 2322 dev/ic/ncr53c9x.c sc->sc_rev != NCR_VARIANT_ESP100)) {
sc 2326 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname,
sc 2328 dev/ic/ncr53c9x.c sc->sc_espintr,
sc 2329 dev/ic/ncr53c9x.c sc->sc_espstat,
sc 2330 dev/ic/ncr53c9x.c sc->sc_espstep,
sc 2331 dev/ic/ncr53c9x.c sc->sc_prevphase);
sc 2332 dev/ic/ncr53c9x.c ncr53c9x_init(sc, 1);
sc 2335 dev/ic/ncr53c9x.c sc->sc_selid = sc->sc_imess[0];
sc 2336 dev/ic/ncr53c9x.c NCR_MISC(("selid=%2x ", sc->sc_selid));
sc 2339 dev/ic/ncr53c9x.c ncr53c9x_msgin(sc);
sc 2345 dev/ic/ncr53c9x.c sc->sc_flags |= NCR_EXPECT_ILLCMD;
sc 2346 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 2347 dev/ic/ncr53c9x.c } else if (sc->sc_features & NCR_F_DMASELECT &&
sc 2348 dev/ic/ncr53c9x.c sc->sc_rev == NCR_VARIANT_ESP100) {
sc 2349 dev/ic/ncr53c9x.c sc->sc_flags |= NCR_EXPECT_ILLCMD;
sc 2352 dev/ic/ncr53c9x.c if (sc->sc_state != NCR_CONNECTED &&
sc 2353 dev/ic/ncr53c9x.c sc->sc_state != NCR_IDENTIFIED) {
sc 2356 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, sc->sc_state,
sc 2357 dev/ic/ncr53c9x.c sc->sc_espintr);
sc 2358 dev/ic/ncr53c9x.c ncr53c9x_init(sc, 1);
sc 2365 dev/ic/ncr53c9x.c if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
sc 2370 dev/ic/ncr53c9x.c ecb = sc->sc_nexus;
sc 2375 dev/ic/ncr53c9x.c ti = &sc->sc_tinfo[sc_link->target];
sc 2377 dev/ic/ncr53c9x.c switch (sc->sc_espstep) {
sc 2388 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_RSTATN);
sc 2394 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 2397 dev/ic/ncr53c9x.c if (sc->sc_phase != MESSAGE_OUT_PHASE) {
sc 2399 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 2407 dev/ic/ncr53c9x.c ti->period = sc->sc_minsync;
sc 2409 dev/ic/ncr53c9x.c sc->sc_flags |= NCR_SYNCHNEGO;
sc 2418 dev/ic/ncr53c9x.c sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
sc 2429 dev/ic/ncr53c9x.c if (sc->sc_features & NCR_F_DMASELECT) {
sc 2430 dev/ic/ncr53c9x.c if (sc->sc_cmdlen == 0)
sc 2433 dev/ic/ncr53c9x.c } else if ((NCR_READ_REG(sc, NCR_FFLAG)
sc 2441 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname,
sc 2444 dev/ic/ncr53c9x.c NCR_READ_REG(sc, NCR_FFLAG)
sc 2446 dev/ic/ncr53c9x.c sc->sc_espintr, sc->sc_espstat,
sc 2447 dev/ic/ncr53c9x.c sc->sc_espstep);
sc 2448 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 2453 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 2456 dev/ic/ncr53c9x.c if (sc->sc_features & NCR_F_DMASELECT &&
sc 2457 dev/ic/ncr53c9x.c sc->sc_cmdlen != 0)
sc 2461 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname,
sc 2464 dev/ic/ncr53c9x.c (u_long)sc->sc_cmdlen,
sc 2465 dev/ic/ncr53c9x.c sc->sc_espintr,
sc 2466 dev/ic/ncr53c9x.c sc->sc_espstat,
sc 2467 dev/ic/ncr53c9x.c sc->sc_espstep);
sc 2472 dev/ic/ncr53c9x.c sc->sc_prevphase = INVALID_PHASE; /* ?? */
sc 2474 dev/ic/ncr53c9x.c sc->sc_dp = ecb->daddr;
sc 2475 dev/ic/ncr53c9x.c sc->sc_dleft = ecb->dleft;
sc 2476 dev/ic/ncr53c9x.c sc->sc_state = NCR_CONNECTED;
sc 2483 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname,
sc 2484 dev/ic/ncr53c9x.c sc->sc_espintr, sc->sc_espstat,
sc 2485 dev/ic/ncr53c9x.c sc->sc_espstep);
sc 2486 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 2490 dev/ic/ncr53c9x.c if (sc->sc_state == NCR_IDLE) {
sc 2492 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 2498 dev/ic/ncr53c9x.c if (sc->sc_flags & NCR_ICCS) {
sc 2502 dev/ic/ncr53c9x.c sc->sc_flags &= ~NCR_ICCS;
sc 2504 dev/ic/ncr53c9x.c if (!(sc->sc_espintr & NCRINTR_DONE)) {
sc 2507 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname,
sc 2508 dev/ic/ncr53c9x.c sc->sc_espintr, sc->sc_espstat,
sc 2509 dev/ic/ncr53c9x.c sc->sc_espstep);
sc 2511 dev/ic/ncr53c9x.c ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
sc 2512 dev/ic/ncr53c9x.c if (sc->sc_imlen < 2)
sc 2514 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, (int)sc->sc_imlen);
sc 2515 dev/ic/ncr53c9x.c ecb->stat = sc->sc_imess[sc->sc_imlen - 2];
sc 2516 dev/ic/ncr53c9x.c msg = sc->sc_imess[sc->sc_imlen - 1];
sc 2521 dev/ic/ncr53c9x.c : sc->sc_dleft;
sc 2524 dev/ic/ncr53c9x.c sc->sc_state = NCR_CMDCOMPLETE;
sc 2527 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname, msg);
sc 2528 dev/ic/ncr53c9x.c sc->sc_imlen = 0;
sc 2529 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_MSGOK);
sc 2536 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname,
sc 2537 dev/ic/ncr53c9x.c sc->sc_state);
sc 2538 dev/ic/ncr53c9x.c ncr53c9x_scsi_reset(sc);
sc 2547 dev/ic/ncr53c9x.c if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
sc 2551 dev/ic/ncr53c9x.c switch (sc->sc_phase) {
sc 2554 dev/ic/ncr53c9x.c ncr53c9x_msgout(sc);
sc 2555 dev/ic/ncr53c9x.c sc->sc_prevphase = MESSAGE_OUT_PHASE;
sc 2560 dev/ic/ncr53c9x.c if (sc->sc_espintr & NCRINTR_BS) {
sc 2561 dev/ic/ncr53c9x.c if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
sc 2562 dev/ic/ncr53c9x.c !(sc->sc_espstat2 & FAS_STAT2_EMPTY)) {
sc 2563 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 2565 dev/ic/ncr53c9x.c sc->sc_flags |= NCR_WAITI;
sc 2566 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_TRANS);
sc 2567 dev/ic/ncr53c9x.c } else if (sc->sc_espintr & NCRINTR_FC) {
sc 2568 dev/ic/ncr53c9x.c if ((sc->sc_flags & NCR_WAITI) == 0) {
sc 2571 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname,
sc 2572 dev/ic/ncr53c9x.c sc->sc_espintr, sc->sc_espstat,
sc 2573 dev/ic/ncr53c9x.c sc->sc_espstep);
sc 2575 dev/ic/ncr53c9x.c sc->sc_flags &= ~NCR_WAITI;
sc 2576 dev/ic/ncr53c9x.c ncr53c9x_rdfifo(sc,
sc 2577 dev/ic/ncr53c9x.c (sc->sc_prevphase == sc->sc_phase) ?
sc 2579 dev/ic/ncr53c9x.c ncr53c9x_msgin(sc);
sc 2583 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname,
sc 2584 dev/ic/ncr53c9x.c sc->sc_espintr, sc->sc_espstat,
sc 2585 dev/ic/ncr53c9x.c sc->sc_espstep);
sc 2587 dev/ic/ncr53c9x.c sc->sc_prevphase = MESSAGE_IN_PHASE;
sc 2601 dev/ic/ncr53c9x.c if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
sc 2602 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 2605 dev/ic/ncr53c9x.c if (sc->sc_features & NCR_F_DMASELECT) {
sc 2609 dev/ic/ncr53c9x.c sc->sc_cmdlen = size;
sc 2610 dev/ic/ncr53c9x.c sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
sc 2611 dev/ic/ncr53c9x.c NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
sc 2614 dev/ic/ncr53c9x.c NCR_SET_COUNT(sc, size);
sc 2617 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
sc 2620 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
sc 2621 dev/ic/ncr53c9x.c NCRDMA_GO(sc);
sc 2623 dev/ic/ncr53c9x.c ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
sc 2624 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_TRANS);
sc 2626 dev/ic/ncr53c9x.c sc->sc_prevphase = COMMAND_PHASE;
sc 2629 dev/ic/ncr53c9x.c NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft));
sc 2630 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 2631 dev/ic/ncr53c9x.c size = min(sc->sc_dleft, sc->sc_maxxfer);
sc 2632 dev/ic/ncr53c9x.c NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft,
sc 2634 dev/ic/ncr53c9x.c sc->sc_prevphase = DATA_OUT_PHASE;
sc 2638 dev/ic/ncr53c9x.c if (sc->sc_rev == NCR_VARIANT_ESP100)
sc 2639 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_FLUSH);
sc 2640 dev/ic/ncr53c9x.c size = min(sc->sc_dleft, sc->sc_maxxfer);
sc 2641 dev/ic/ncr53c9x.c NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft,
sc 2643 dev/ic/ncr53c9x.c sc->sc_prevphase = DATA_IN_PHASE;
sc 2649 dev/ic/ncr53c9x.c NCR_SET_COUNT(sc, size);
sc 2652 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA);
sc 2661 dev/ic/ncr53c9x.c NCRCMD(sc,
sc 2663 dev/ic/ncr53c9x.c NCRDMA_GO(sc);
sc 2667 dev/ic/ncr53c9x.c sc->sc_flags |= NCR_ICCS;
sc 2668 dev/ic/ncr53c9x.c NCRCMD(sc, NCRCMD_ICCS);
sc 2669 dev/ic/ncr53c9x.c sc->sc_prevphase = STATUS_PHASE;
sc 2676 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname);
sc 2684 dev/ic/ncr53c9x.c ncr53c9x_init(sc, 1);
sc 2688 dev/ic/ncr53c9x.c ncr53c9x_done(sc, ecb);
sc 2692 dev/ic/ncr53c9x.c sc->sc_state = NCR_IDLE;
sc 2693 dev/ic/ncr53c9x.c ncr53c9x_sched(sc);
sc 2710 dev/ic/ncr53c9x.c wait.tv_usec += 50/sc->sc_freq;
sc 2716 dev/ic/ncr53c9x.c if (NCRDMA_ISINTR(sc))
sc 2725 dev/ic/ncr53c9x.c ncr53c9x_abort(sc, ecb)
sc 2726 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc;
sc 2734 dev/ic/ncr53c9x.c if (ecb == sc->sc_nexus) {
sc 2741 dev/ic/ncr53c9x.c if (sc->sc_state == NCR_CONNECTED)
sc 2758 dev/ic/ncr53c9x.c if (sc->sc_state == NCR_IDLE)
sc 2759 dev/ic/ncr53c9x.c ncr53c9x_sched(sc);
sc 2770 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc = sc_link->adapter_softc;
sc 2771 dev/ic/ncr53c9x.c struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->target];
sc 2778 dev/ic/ncr53c9x.c sc->sc_dev.dv_xname,
sc 2780 dev/ic/ncr53c9x.c sc->sc_state, sc->sc_nexus,
sc 2781 dev/ic/ncr53c9x.c NCR_READ_REG(sc, NCR_STAT),
sc 2782 dev/ic/ncr53c9x.c sc->sc_phase, sc->sc_prevphase,
sc 2783 dev/ic/ncr53c9x.c (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
sc 2784 dev/ic/ncr53c9x.c NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
sc 2795 dev/ic/ncr53c9x.c ncr53c9x_init(sc, 1);
sc 2800 dev/ic/ncr53c9x.c ncr53c9x_abort(sc, ecb);
sc 2803 dev/ic/ncr53c9x.c if (ecb == sc->sc_nexus &&
sc 2805 dev/ic/ncr53c9x.c (sc->sc_phase & (MSGI|CDI)) == 0) {
sc 2808 dev/ic/ncr53c9x.c sc->sc_cfflags |= (1 << (sc_link->target + 16));
sc 2819 dev/ic/ncr53c9x.c struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
sc 2827 dev/ic/ncr53c9x.c for (t = 0; t < sc->sc_ntarg; t++) {
sc 2828 dev/ic/ncr53c9x.c ti = &sc->sc_tinfo[t];
sc 2843 dev/ic/ncr53c9x.c timeout_add(&sc->sc_watchdog, 60*hz);
sc 400 dev/ic/ncr53c9xvar.h #define NCR_READ_REG(sc, reg) \
sc 401 dev/ic/ncr53c9xvar.h (*(sc)->sc_glue->gl_read_reg)((sc), (reg))
sc 402 dev/ic/ncr53c9xvar.h #define NCR_WRITE_REG(sc, reg, val) \
sc 403 dev/ic/ncr53c9xvar.h (*(sc)->sc_glue->gl_write_reg)((sc), (reg), (val))
sc 406 dev/ic/ncr53c9xvar.h #define NCRCMD(sc, cmd) do { \
sc 409 dev/ic/ncr53c9xvar.h sc->sc_lastcmd = cmd; \
sc 410 dev/ic/ncr53c9xvar.h NCR_WRITE_REG(sc, NCR_CMD, cmd); \
sc 413 dev/ic/ncr53c9xvar.h #define NCRCMD(sc, cmd) NCR_WRITE_REG(sc, NCR_CMD, cmd)
sc 419 dev/ic/ncr53c9xvar.h #define NCRDMA_ISINTR(sc) (*(sc)->sc_glue->gl_dma_isintr)((sc))
sc 420 dev/ic/ncr53c9xvar.h #define NCRDMA_RESET(sc) (*(sc)->sc_glue->gl_dma_reset)((sc))
sc 421 dev/ic/ncr53c9xvar.h #define NCRDMA_INTR(sc) (*(sc)->sc_glue->gl_dma_intr)((sc))
sc 422 dev/ic/ncr53c9xvar.h #define NCRDMA_SETUP(sc, addr, len, datain, dmasize) \
sc 423 dev/ic/ncr53c9xvar.h (*(sc)->sc_glue->gl_dma_setup)((sc), (addr), (len), (datain), (dmasize))
sc 424 dev/ic/ncr53c9xvar.h #define NCRDMA_GO(sc) (*(sc)->sc_glue->gl_dma_go)((sc))
sc 425 dev/ic/ncr53c9xvar.h #define NCRDMA_ISACTIVE(sc) (*(sc)->sc_glue->gl_dma_isactive)((sc))
sc 431 dev/ic/ncr53c9xvar.h #define ncr53c9x_cpb2stp(sc, cpb) \
sc 432 dev/ic/ncr53c9xvar.h ((250 * (cpb)) / (sc)->sc_freq)
sc 467 dev/ic/ne2000.c ne2000_write_mbuf(struct dp8390_softc *sc, struct mbuf *m, int buf)
sc 469 dev/ic/ne2000.c struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
sc 470 dev/ic/ne2000.c bus_space_tag_t nict = sc->sc_regt;
sc 471 dev/ic/ne2000.c bus_space_handle_t nich = sc->sc_regh;
sc 592 dev/ic/ne2000.c if (sc->sc_flags & DP8390_NO_REMOTE_DMA_COMPLETE)
sc 613 dev/ic/ne2000.c sc->sc_dev.dv_xname);
sc 614 dev/ic/ne2000.c dp8390_reset(sc);
sc 626 dev/ic/ne2000.c ne2000_ring_copy(struct dp8390_softc *sc, int src, caddr_t dst,
sc 629 dev/ic/ne2000.c struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
sc 630 dev/ic/ne2000.c bus_space_tag_t nict = sc->sc_regt;
sc 631 dev/ic/ne2000.c bus_space_handle_t nich = sc->sc_regh;
sc 638 dev/ic/ne2000.c if (src + amount > sc->mem_end) {
sc 639 dev/ic/ne2000.c tmp_amount = sc->mem_end - src;
sc 646 dev/ic/ne2000.c src = sc->mem_ring;
sc 657 dev/ic/ne2000.c ne2000_read_hdr(struct dp8390_softc *sc, int buf, struct dp8390_ring *hdr)
sc 659 dev/ic/ne2000.c struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
sc 661 dev/ic/ne2000.c ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich,
sc 670 dev/ic/ne2000.c ne2000_test_mem(struct dp8390_softc *sc)
sc 775 dev/ic/ne2000.c ne2000_detach(struct ne2000_softc *sc, int flags)
sc 777 dev/ic/ne2000.c return (dp8390_detach(&sc->sc_dp8390, flags));
sc 124 dev/ic/oosiop.c #define oosiop_period(sc, tp, scf) \
sc 125 dev/ic/oosiop.c (((1000000000 / (sc)->sc_freq) * (tp) * (scf)) / 40)
sc 146 dev/ic/oosiop.c oosiop_attach(struct oosiop_softc *sc)
sc 158 dev/ic/oosiop.c err = bus_dmamem_alloc(sc->sc_dmat, scrsize, PAGE_SIZE, 0, &seg, 1,
sc 164 dev/ic/oosiop.c err = bus_dmamem_map(sc->sc_dmat, &seg, nseg, scrsize,
sc 165 dev/ic/oosiop.c (caddr_t *)&sc->sc_scr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT);
sc 170 dev/ic/oosiop.c err = bus_dmamap_create(sc->sc_dmat, scrsize, 1, scrsize, 0,
sc 171 dev/ic/oosiop.c BUS_DMA_NOWAIT, &sc->sc_scrdma);
sc 176 dev/ic/oosiop.c err = bus_dmamap_load_raw(sc->sc_dmat, sc->sc_scrdma,
sc 182 dev/ic/oosiop.c bzero(sc->sc_scr, scrsize);
sc 183 dev/ic/oosiop.c sc->sc_scrbase = sc->sc_scrdma->dm_segs[0].ds_addr;
sc 186 dev/ic/oosiop.c TAILQ_INIT(&sc->sc_free_cb);
sc 187 dev/ic/oosiop.c TAILQ_INIT(&sc->sc_cbq);
sc 188 dev/ic/oosiop.c if (oosiop_alloc_cb(sc, OOSIOP_NCB) != 0)
sc 192 dev/ic/oosiop.c cb = TAILQ_FIRST(&sc->sc_free_cb);
sc 193 dev/ic/oosiop.c sc->sc_reselbuf = cb->xferdma->dm_segs[0].ds_addr +
sc 197 dev/ic/oosiop.c sc->sc_tgt[i].nexus = NULL;
sc 198 dev/ic/oosiop.c sc->sc_tgt[i].flags = 0;
sc 202 dev/ic/oosiop.c if (sc->sc_freq <= 25000000) {
sc 203 dev/ic/oosiop.c sc->sc_ccf = 10;
sc 204 dev/ic/oosiop.c sc->sc_dcntl = OOSIOP_DCNTL_CF_1;
sc 205 dev/ic/oosiop.c } else if (sc->sc_freq <= 37500000) {
sc 206 dev/ic/oosiop.c sc->sc_ccf = 15;
sc 207 dev/ic/oosiop.c sc->sc_dcntl = OOSIOP_DCNTL_CF_1_5;
sc 208 dev/ic/oosiop.c } else if (sc->sc_freq <= 50000000) {
sc 209 dev/ic/oosiop.c sc->sc_ccf = 20;
sc 210 dev/ic/oosiop.c sc->sc_dcntl = OOSIOP_DCNTL_CF_2;
sc 212 dev/ic/oosiop.c sc->sc_ccf = 30;
sc 213 dev/ic/oosiop.c sc->sc_dcntl = OOSIOP_DCNTL_CF_3;
sc 216 dev/ic/oosiop.c if (sc->sc_chip == OOSIOP_700)
sc 217 dev/ic/oosiop.c sc->sc_minperiod = oosiop_period(sc, 4, sc->sc_ccf);
sc 219 dev/ic/oosiop.c sc->sc_minperiod = oosiop_period(sc, 4, 10);
sc 221 dev/ic/oosiop.c if (sc->sc_minperiod < 25)
sc 222 dev/ic/oosiop.c sc->sc_minperiod = 25; /* limit to 10MB/s */
sc 225 dev/ic/oosiop.c sc->sc_chip == OOSIOP_700_66 ? "-66" : "",
sc 226 dev/ic/oosiop.c oosiop_read_1(sc, OOSIOP_CTEST7) >> 4,
sc 227 dev/ic/oosiop.c sc->sc_freq / 1000000, sc->sc_id);
sc 231 dev/ic/oosiop.c oosiop_reset(sc);
sc 232 dev/ic/oosiop.c oosiop_reset_bus(sc);
sc 237 dev/ic/oosiop.c oosiop_load_script(sc);
sc 238 dev/ic/oosiop.c sc->sc_active = 0;
sc 239 dev/ic/oosiop.c oosiop_write_4(sc, OOSIOP_DSP, sc->sc_scrbase + Ent_wait_reselect);
sc 244 dev/ic/oosiop.c sc->sc_link.adapter = &oosiop_adapter;
sc 245 dev/ic/oosiop.c sc->sc_link.adapter_softc = sc;
sc 246 dev/ic/oosiop.c sc->sc_link.device = &oosiop_dev;
sc 247 dev/ic/oosiop.c sc->sc_link.openings = 1; /* XXX */
sc 248 dev/ic/oosiop.c sc->sc_link.adapter_buswidth = OOSIOP_NTGT;
sc 249 dev/ic/oosiop.c sc->sc_link.adapter_target = sc->sc_id;
sc 250 dev/ic/oosiop.c sc->sc_link.quirks = ADEV_NODOORLOCK;
sc 253 dev/ic/oosiop.c saa.saa_sc_link = &sc->sc_link;
sc 258 dev/ic/oosiop.c config_found(&sc->sc_dev, &saa, scsiprint);
sc 262 dev/ic/oosiop.c oosiop_alloc_cb(struct oosiop_softc *sc, int ncb)
sc 284 dev/ic/oosiop.c err = bus_dmamem_alloc(sc->sc_dmat, xfersize, PAGE_SIZE, 0, &seg, 1,
sc 290 dev/ic/oosiop.c err = bus_dmamem_map(sc->sc_dmat, &seg, nseg, xfersize,
sc 299 dev/ic/oosiop.c err = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, PAGE_SIZE,
sc 306 dev/ic/oosiop.c err = bus_dmamap_create(sc->sc_dmat, OOSIOP_MAX_XFER,
sc 314 dev/ic/oosiop.c err = bus_dmamap_create(sc->sc_dmat,
sc 322 dev/ic/oosiop.c err = bus_dmamap_load(sc->sc_dmat, cb->xferdma, xfer,
sc 332 dev/ic/oosiop.c TAILQ_INSERT_TAIL(&sc->sc_free_cb, cb, chain);
sc 343 dev/ic/oosiop.c oosiop_relocate_io(struct oosiop_softc *sc, bus_addr_t addr)
sc 348 dev/ic/oosiop.c dcmd = letoh32(sc->sc_scr[addr / 4 + 0]);
sc 349 dev/ic/oosiop.c dsps = letoh32(sc->sc_scr[addr / 4 + 1]);
sc 362 dev/ic/oosiop.c sc->sc_scr[addr / 4 + 0] = htole32(dcmd);
sc 366 dev/ic/oosiop.c sc->sc_scr[addr / 4 + 1] = htole32(dsps + sc->sc_scrbase);
sc 370 dev/ic/oosiop.c oosiop_relocate_tc(struct oosiop_softc *sc, bus_addr_t addr)
sc 375 dev/ic/oosiop.c dcmd = letoh32(sc->sc_scr[addr / 4 + 0]);
sc 376 dev/ic/oosiop.c dsps = letoh32(sc->sc_scr[addr / 4 + 1]);
sc 381 dev/ic/oosiop.c sc->sc_scr[addr / 4] = htole32(dcmd);
sc 393 dev/ic/oosiop.c sc->sc_scr[addr / 4 + 1] = htole32(dsps + sc->sc_scrbase);
sc 397 dev/ic/oosiop.c oosiop_fixup_select(struct oosiop_softc *sc, bus_addr_t addr, int id)
sc 401 dev/ic/oosiop.c dcmd = letoh32(sc->sc_scr[addr / 4]);
sc 404 dev/ic/oosiop.c sc->sc_scr[addr / 4] = htole32(dcmd);
sc 408 dev/ic/oosiop.c oosiop_fixup_jump(struct oosiop_softc *sc, bus_addr_t addr, bus_addr_t dst)
sc 411 dev/ic/oosiop.c sc->sc_scr[addr / 4 + 1] = htole32(dst);
sc 415 dev/ic/oosiop.c oosiop_fixup_move(struct oosiop_softc *sc, bus_addr_t addr, bus_size_t dbc,
sc 420 dev/ic/oosiop.c dcmd = letoh32(sc->sc_scr[addr / 4]);
sc 423 dev/ic/oosiop.c sc->sc_scr[addr / 4 + 0] = htole32(dcmd);
sc 424 dev/ic/oosiop.c sc->sc_scr[addr / 4 + 1] = htole32(dsps);
sc 428 dev/ic/oosiop.c oosiop_load_script(struct oosiop_softc *sc)
sc 434 dev/ic/oosiop.c sc->sc_scr[i] = htole32(oosiop_script[i]);
sc 441 dev/ic/oosiop.c oosiop_relocate_io(sc, i * 8);
sc 445 dev/ic/oosiop.c oosiop_relocate_tc(sc, i * 8);
sc 450 dev/ic/oosiop.c oosiop_fixup_move(sc, Ent_p_resel_msgin_move, 1, sc->sc_reselbuf);
sc 451 dev/ic/oosiop.c OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_PREWRITE);
sc 455 dev/ic/oosiop.c oosiop_setup_sgdma(struct oosiop_softc *sc, struct oosiop_cb *cb)
sc 461 dev/ic/oosiop.c OOSIOP_XFERSCR_SYNC(sc, cb,
sc 490 dev/ic/oosiop.c htole32(sc->sc_scrbase + Ent_phasedispatch);
sc 507 dev/ic/oosiop.c htole32(sc->sc_scrbase + Ent_phasedispatch);
sc 518 dev/ic/oosiop.c OOSIOP_XFERSCR_SYNC(sc, cb,
sc 526 dev/ic/oosiop.c oosiop_setup_dma(struct oosiop_softc *sc)
sc 531 dev/ic/oosiop.c cb = sc->sc_curcb;
sc 534 dev/ic/oosiop.c OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_POSTWRITE);
sc 536 dev/ic/oosiop.c oosiop_fixup_select(sc, Ent_p_select, cb->id);
sc 537 dev/ic/oosiop.c oosiop_fixup_jump(sc, Ent_p_datain_jump, xferbase +
sc 539 dev/ic/oosiop.c oosiop_fixup_jump(sc, Ent_p_dataout_jump, xferbase +
sc 541 dev/ic/oosiop.c oosiop_fixup_move(sc, Ent_p_msgin_move, 1, xferbase +
sc 543 dev/ic/oosiop.c oosiop_fixup_move(sc, Ent_p_extmsglen_move, 1, xferbase +
sc 545 dev/ic/oosiop.c oosiop_fixup_move(sc, Ent_p_msgout_move, cb->msgoutlen, xferbase +
sc 547 dev/ic/oosiop.c oosiop_fixup_move(sc, Ent_p_status_move, 1, xferbase +
sc 549 dev/ic/oosiop.c oosiop_fixup_move(sc, Ent_p_cmdout_move, cb->cmdlen,
sc 552 dev/ic/oosiop.c OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_PREWRITE);
sc 556 dev/ic/oosiop.c oosiop_flush_fifo(struct oosiop_softc *sc)
sc 559 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_DFIFO, oosiop_read_1(sc, OOSIOP_DFIFO) |
sc 561 dev/ic/oosiop.c while ((oosiop_read_1(sc, OOSIOP_CTEST1) & OOSIOP_CTEST1_FMT) !=
sc 564 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_DFIFO, oosiop_read_1(sc, OOSIOP_DFIFO) &
sc 569 dev/ic/oosiop.c oosiop_clear_fifo(struct oosiop_softc *sc)
sc 572 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_DFIFO, oosiop_read_1(sc, OOSIOP_DFIFO) |
sc 574 dev/ic/oosiop.c while ((oosiop_read_1(sc, OOSIOP_CTEST1) & OOSIOP_CTEST1_FMT) !=
sc 577 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_DFIFO, oosiop_read_1(sc, OOSIOP_DFIFO) &
sc 582 dev/ic/oosiop.c oosiop_phasemismatch(struct oosiop_softc *sc)
sc 588 dev/ic/oosiop.c cb = sc->sc_curcb;
sc 592 dev/ic/oosiop.c dsp = oosiop_read_4(sc, OOSIOP_DSP);
sc 593 dev/ic/oosiop.c dbc = oosiop_read_4(sc, OOSIOP_DBC) & OOSIOP_DBC_MAX;
sc 601 dev/ic/oosiop.c OOSIOP_DINSCR_SYNC(sc, cb,
sc 606 dev/ic/oosiop.c OOSIOP_DINSCR_SYNC(sc, cb,
sc 613 dev/ic/oosiop.c OOSIOP_DOUTSCR_SYNC(sc, cb,
sc 618 dev/ic/oosiop.c OOSIOP_DOUTSCR_SYNC(sc, cb,
sc 621 dev/ic/oosiop.c dfifo = oosiop_read_1(sc, OOSIOP_DFIFO);
sc 625 dev/ic/oosiop.c sstat1 = oosiop_read_1(sc, OOSIOP_SSTAT1);
sc 628 dev/ic/oosiop.c if ((sc->sc_tgt[cb->id].sxfer != 0) &&
sc 632 dev/ic/oosiop.c oosiop_clear_fifo(sc);
sc 634 dev/ic/oosiop.c printf("%s: phase mismatch addr=%08x\n", sc->sc_dev.dv_xname,
sc 635 dev/ic/oosiop.c oosiop_read_4(sc, OOSIOP_DSP) - 8);
sc 636 dev/ic/oosiop.c oosiop_clear_fifo(sc);
sc 643 dev/ic/oosiop.c oosiop_setup_sgdma(sc, cb);
sc 648 dev/ic/oosiop.c oosiop_setup_syncxfer(struct oosiop_softc *sc)
sc 652 dev/ic/oosiop.c id = sc->sc_curcb->id;
sc 653 dev/ic/oosiop.c if (sc->sc_chip != OOSIOP_700)
sc 654 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_SBCL, sc->sc_tgt[id].scf);
sc 656 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_SXFER, sc->sc_tgt[id].sxfer);
sc 660 dev/ic/oosiop.c oosiop_set_syncparam(struct oosiop_softc *sc, int id, int period, int offset)
sc 664 dev/ic/oosiop.c printf("%s: target %d now using 8 bit ", sc->sc_dev.dv_xname, id);
sc 668 dev/ic/oosiop.c sc->sc_tgt[id].scf = 0;
sc 669 dev/ic/oosiop.c sc->sc_tgt[id].sxfer = 0;
sc 673 dev/ic/oosiop.c if (sc->sc_chip == OOSIOP_700) {
sc 675 dev/ic/oosiop.c p = oosiop_period(sc, i, sc->sc_ccf);
sc 681 dev/ic/oosiop.c sc->sc_dev.dv_xname, id);
sc 684 dev/ic/oosiop.c sc->sc_tgt[id].scf = 0;
sc 685 dev/ic/oosiop.c sc->sc_tgt[id].sxfer = ((i - 4) << 4) | offset;
sc 688 dev/ic/oosiop.c p = oosiop_period(sc, synctbl[i].tp + 4,
sc 695 dev/ic/oosiop.c sc->sc_dev.dv_xname, id);
sc 698 dev/ic/oosiop.c sc->sc_tgt[id].scf = synctbl[i].scf;
sc 699 dev/ic/oosiop.c sc->sc_tgt[id].sxfer = (synctbl[i].tp << 4) | offset;
sc 719 dev/ic/oosiop.c struct oosiop_softc *sc;
sc 724 dev/ic/oosiop.c sc = (struct oosiop_softc *)xs->sc_link->adapter_softc;
sc 727 dev/ic/oosiop.c cb = TAILQ_FIRST(&sc->sc_free_cb);
sc 728 dev/ic/oosiop.c TAILQ_REMOVE(&sc->sc_free_cb, cb, chain);
sc 741 dev/ic/oosiop.c err = bus_dmamap_load(sc->sc_dmat, cb->cmddma, xs->cmd,
sc 747 dev/ic/oosiop.c sc->sc_dev.dv_xname, err);
sc 750 dev/ic/oosiop.c TAILQ_INSERT_TAIL(&sc->sc_free_cb, cb, chain);
sc 753 dev/ic/oosiop.c bus_dmamap_sync(sc->sc_dmat, cb->cmddma, 0, xs->cmdlen,
sc 759 dev/ic/oosiop.c err = bus_dmamap_load(sc->sc_dmat, cb->datadma,
sc 768 dev/ic/oosiop.c sc->sc_dev.dv_xname, err);
sc 770 dev/ic/oosiop.c bus_dmamap_unload(sc->sc_dmat, cb->cmddma);
sc 772 dev/ic/oosiop.c TAILQ_INSERT_TAIL(&sc->sc_free_cb, cb, chain);
sc 775 dev/ic/oosiop.c bus_dmamap_sync(sc->sc_dmat, cb->datadma,
sc 782 dev/ic/oosiop.c oosiop_setup(sc, cb);
sc 792 dev/ic/oosiop.c TAILQ_INSERT_TAIL(&sc->sc_cbq, cb, chain);
sc 794 dev/ic/oosiop.c if (!sc->sc_active) {
sc 796 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_ISTAT, OOSIOP_ISTAT_ABRT);
sc 799 dev/ic/oosiop.c oosiop_poll(sc, cb);
sc 814 dev/ic/oosiop.c oosiop_poll(struct oosiop_softc *sc, struct oosiop_cb *cb)
sc 824 dev/ic/oosiop.c while (((istat = oosiop_read_1(sc, OOSIOP_ISTAT)) &
sc 830 dev/ic/oosiop.c oosiop_reset(sc);
sc 838 dev/ic/oosiop.c oosiop_processintr(sc, istat);
sc 848 dev/ic/oosiop.c oosiop_setup(struct oosiop_softc *sc, struct oosiop_cb *cb)
sc 855 dev/ic/oosiop.c oosiop_setup_sgdma(sc, cb);
sc 858 dev/ic/oosiop.c OOSIOP_XFERMSG_SYNC(sc, cb,
sc 864 dev/ic/oosiop.c if (sc->sc_tgt[cb->id].flags & TGTF_SYNCNEG) {
sc 869 dev/ic/oosiop.c xfer->msgout[4] = sc->sc_minperiod;
sc 872 dev/ic/oosiop.c sc->sc_tgt[cb->id].flags &= ~TGTF_SYNCNEG;
sc 873 dev/ic/oosiop.c sc->sc_tgt[cb->id].flags |= TGTF_WAITSDTR;
sc 876 dev/ic/oosiop.c OOSIOP_XFERMSG_SYNC(sc, cb,
sc 881 dev/ic/oosiop.c oosiop_done(struct oosiop_softc *sc, struct oosiop_cb *cb)
sc 898 dev/ic/oosiop.c bus_dmamap_sync(sc->sc_dmat, cb->cmddma, 0, cb->cmdlen,
sc 900 dev/ic/oosiop.c bus_dmamap_unload(sc->sc_dmat, cb->cmddma);
sc 903 dev/ic/oosiop.c bus_dmamap_sync(sc->sc_dmat, cb->datadma, 0, cb->datalen,
sc 906 dev/ic/oosiop.c bus_dmamap_unload(sc->sc_dmat, cb->datadma);
sc 952 dev/ic/oosiop.c TAILQ_INSERT_TAIL(&sc->sc_free_cb, cb, chain);
sc 954 dev/ic/oosiop.c if (cb == sc->sc_curcb)
sc 955 dev/ic/oosiop.c sc->sc_curcb = NULL;
sc 956 dev/ic/oosiop.c if (cb == sc->sc_lastcb)
sc 957 dev/ic/oosiop.c sc->sc_lastcb = NULL;
sc 958 dev/ic/oosiop.c sc->sc_tgt[cb->id].nexus = NULL;
sc 974 dev/ic/oosiop.c err = bus_dmamap_load(sc->sc_dmat, cb->cmddma, cmd,
sc 979 dev/ic/oosiop.c sc->sc_dev.dv_xname, err);
sc 983 dev/ic/oosiop.c bus_dmamap_sync(sc->sc_dmat, cb->cmddma, 0, cb->cmdlen,
sc 987 dev/ic/oosiop.c err = bus_dmamap_load(sc->sc_dmat, cb->datadma,
sc 992 dev/ic/oosiop.c sc->sc_dev.dv_xname, err);
sc 994 dev/ic/oosiop.c bus_dmamap_unload(sc->sc_dmat, cb->cmddma);
sc 997 dev/ic/oosiop.c bus_dmamap_sync(sc->sc_dmat, cb->datadma,
sc 1000 dev/ic/oosiop.c oosiop_setup(sc, cb);
sc 1002 dev/ic/oosiop.c TAILQ_INSERT_HEAD(&sc->sc_cbq, cb, chain);
sc 1015 dev/ic/oosiop.c struct oosiop_softc *sc = xs->sc_link->adapter_softc;
sc 1023 dev/ic/oosiop.c oosiop_reset_bus(sc);
sc 1026 dev/ic/oosiop.c oosiop_done(sc, cb);
sc 1032 dev/ic/oosiop.c oosiop_reset(struct oosiop_softc *sc)
sc 1039 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_ISTAT, OOSIOP_ISTAT_ABRT);
sc 1041 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_ISTAT, 0);
sc 1044 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_DCNTL, sc->sc_dcntl | OOSIOP_DCNTL_RST);
sc 1046 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_DCNTL, sc->sc_dcntl);
sc 1050 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_SCNTL0, OOSIOP_ARB_FULL | OOSIOP_SCNTL0_EPG);
sc 1051 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_SCNTL1, OOSIOP_SCNTL1_ESR);
sc 1052 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_DCNTL, sc->sc_dcntl);
sc 1053 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_DMODE, OOSIOP_DMODE_BL_8);
sc 1054 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_SCID, OOSIOP_SCID_VALUE(sc->sc_id));
sc 1055 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_DWT, 0xff); /* Enable DMA timeout */
sc 1056 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_CTEST7, 0);
sc 1057 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_SXFER, 0);
sc 1060 dev/ic/oosiop.c (void)oosiop_read_1(sc, OOSIOP_SSTAT0);
sc 1061 dev/ic/oosiop.c (void)oosiop_read_1(sc, OOSIOP_SSTAT1);
sc 1062 dev/ic/oosiop.c (void)oosiop_read_1(sc, OOSIOP_DSTAT);
sc 1065 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_SIEN,
sc 1068 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_DIEN,
sc 1074 dev/ic/oosiop.c sc->sc_tgt[i].flags = 0;
sc 1075 dev/ic/oosiop.c sc->sc_tgt[i].scf = 0;
sc 1076 dev/ic/oosiop.c sc->sc_tgt[i].sxfer = 0;
sc 1083 dev/ic/oosiop.c oosiop_reset_bus(struct oosiop_softc *sc)
sc 1090 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_SCNTL1, OOSIOP_SCNTL1_RST);
sc 1092 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_SCNTL1, 0);
sc 1096 dev/ic/oosiop.c if (sc->sc_tgt[i].nexus) {
sc 1097 dev/ic/oosiop.c sc->sc_tgt[i].nexus->xfer->status =
sc 1099 dev/ic/oosiop.c oosiop_done(sc, sc->sc_tgt[i].nexus);
sc 1103 dev/ic/oosiop.c sc->sc_curcb = NULL;
sc 1114 dev/ic/oosiop.c oosiop_intr(struct oosiop_softc *sc)
sc 1118 dev/ic/oosiop.c istat = oosiop_read_1(sc, OOSIOP_ISTAT);
sc 1123 dev/ic/oosiop.c oosiop_processintr(sc, istat);
sc 1128 dev/ic/oosiop.c oosiop_processintr(struct oosiop_softc *sc, u_int8_t istat)
sc 1134 dev/ic/oosiop.c sc->sc_nextdsp = Ent_wait_reselect;
sc 1138 dev/ic/oosiop.c oosiop_write_1(sc, OOSIOP_ISTAT, 0);
sc 1140 dev/ic/oosiop.c dstat = oosiop_read_1(sc, OOSIOP_DSTAT);
sc 1143 dev/ic/oosiop.c sc->sc_nextdsp = oosiop_read_4(sc, OOSIOP_DSP) -
sc 1144 dev/ic/oosiop.c sc->sc_scrbase - 8;
sc 1146 dev/ic/oosiop.c if (sc->sc_nextdsp == Ent_p_resel_msgin_move &&
sc 1147 dev/ic/oosiop.c (oosiop_read_1(sc, OOSIOP_SBCL) & OOSIOP_ACK)) {
sc 1149 dev/ic/oosiop.c oosiop_flush_fifo(sc);
sc 1150 dev/ic/oosiop.c sc->sc_nextdsp += 8;
sc 1155 dev/ic/oosiop.c sc->sc_nextdsp = oosiop_read_4(sc, OOSIOP_DSP) -
sc 1156 dev/ic/oosiop.c sc->sc_scrbase;
sc 1157 dev/ic/oosiop.c printf("%s: single step %08x\n", sc->sc_dev.dv_xname,
sc 1158 dev/ic/oosiop.c sc->sc_nextdsp);
sc 1163 dev/ic/oosiop.c oosiop_flush_fifo(sc);
sc 1164 dev/ic/oosiop.c oosiop_scriptintr(sc);
sc 1168 dev/ic/oosiop.c printf("%s: DMA time out\n", sc->sc_dev.dv_xname);
sc 1169 dev/ic/oosiop.c oosiop_reset(sc);
sc 1173 dev/ic/oosiop.c dcmd = oosiop_read_4(sc, OOSIOP_DBC);
sc 1176 dev/ic/oosiop.c sc->sc_dev.dv_xname);
sc 1177 dev/ic/oosiop.c sc->sc_nextdsp = Ent_phasedispatch; /* XXX */
sc 1181 dev/ic/oosiop.c sc->sc_dev.dv_xname,
sc 1182 dev/ic/oosiop.c oosiop_read_4(sc, OOSIOP_DSP) - 8, dcmd,
sc 1183 dev/ic/oosiop.c oosiop_read_4(sc, OOSIOP_DSPS));
sc 1184 dev/ic/oosiop.c oosiop_reset(sc);
sc 1185 dev/ic/oosiop.c OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_POSTWRITE);
sc 1186 dev/ic/oosiop.c oosiop_load_script(sc);
sc 1191 dev/ic/oosiop.c oosiop_clear_fifo(sc);
sc 1198 dev/ic/oosiop.c sstat0 = oosiop_read_1(sc, OOSIOP_SSTAT0);
sc 1202 dev/ic/oosiop.c oosiop_phasemismatch(sc);
sc 1203 dev/ic/oosiop.c sc->sc_nextdsp = Ent_phasedispatch;
sc 1207 dev/ic/oosiop.c if (sc->sc_curcb) {
sc 1208 dev/ic/oosiop.c sc->sc_curcb->flags |= CBF_SELTOUT;
sc 1209 dev/ic/oosiop.c oosiop_done(sc, sc->sc_curcb);
sc 1214 dev/ic/oosiop.c printf("%s: SCSI gross error\n", sc->sc_dev.dv_xname);
sc 1215 dev/ic/oosiop.c oosiop_reset(sc);
sc 1220 dev/ic/oosiop.c if (sc->sc_curcb) {
sc 1222 dev/ic/oosiop.c sc->sc_dev.dv_xname);
sc 1223 dev/ic/oosiop.c oosiop_done(sc, sc->sc_curcb);
sc 1228 dev/ic/oosiop.c oosiop_reset(sc);
sc 1231 dev/ic/oosiop.c printf("%s: parity error\n", sc->sc_dev.dv_xname);
sc 1235 dev/ic/oosiop.c if (sc->sc_nextdsp == Ent_wait_reselect && TAILQ_FIRST(&sc->sc_cbq)) {
sc 1236 dev/ic/oosiop.c cb = sc->sc_curcb = TAILQ_FIRST(&sc->sc_cbq);
sc 1237 dev/ic/oosiop.c TAILQ_REMOVE(&sc->sc_cbq, cb, chain);
sc 1238 dev/ic/oosiop.c sc->sc_tgt[cb->id].nexus = cb;
sc 1240 dev/ic/oosiop.c oosiop_setup_dma(sc);
sc 1241 dev/ic/oosiop.c oosiop_setup_syncxfer(sc);
sc 1242 dev/ic/oosiop.c sc->sc_lastcb = cb;
sc 1243 dev/ic/oosiop.c sc->sc_nextdsp = Ent_start_select;
sc 1253 dev/ic/oosiop.c sc->sc_active = (sc->sc_nextdsp != Ent_wait_reselect);
sc 1256 dev/ic/oosiop.c oosiop_write_4(sc, OOSIOP_DSP, sc->sc_nextdsp + sc->sc_scrbase);
sc 1260 dev/ic/oosiop.c oosiop_scriptintr(struct oosiop_softc *sc)
sc 1268 dev/ic/oosiop.c cb = sc->sc_curcb;
sc 1269 dev/ic/oosiop.c icode = oosiop_read_4(sc, OOSIOP_DSPS);
sc 1274 dev/ic/oosiop.c oosiop_done(sc, cb);
sc 1279 dev/ic/oosiop.c oosiop_msgin(sc, cb);
sc 1284 dev/ic/oosiop.c sfbr = oosiop_read_1(sc, OOSIOP_SFBR);
sc 1285 dev/ic/oosiop.c OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_POSTWRITE);
sc 1286 dev/ic/oosiop.c oosiop_fixup_move(sc, Ent_p_extmsgin_move, sfbr,
sc 1289 dev/ic/oosiop.c OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_PREWRITE);
sc 1290 dev/ic/oosiop.c sc->sc_nextdsp = Ent_rcv_extmsg;
sc 1295 dev/ic/oosiop.c resid = oosiop_read_1(sc, OOSIOP_SFBR);
sc 1301 dev/ic/oosiop.c sc->sc_dev.dv_xname);
sc 1304 dev/ic/oosiop.c sc->sc_resid = i;
sc 1305 dev/ic/oosiop.c sc->sc_nextdsp = Ent_wait_resel_identify;
sc 1309 dev/ic/oosiop.c sc->sc_tgt[cb->id].nexus = NULL;
sc 1310 dev/ic/oosiop.c TAILQ_INSERT_HEAD(&sc->sc_cbq, cb, chain);
sc 1311 dev/ic/oosiop.c sc->sc_curcb = NULL;
sc 1317 dev/ic/oosiop.c cb = sc->sc_tgt[sc->sc_resid].nexus;
sc 1318 dev/ic/oosiop.c resmsg = oosiop_read_1(sc, OOSIOP_SFBR);
sc 1321 dev/ic/oosiop.c sc->sc_curcb = cb;
sc 1322 dev/ic/oosiop.c if (cb != sc->sc_lastcb) {
sc 1323 dev/ic/oosiop.c oosiop_setup_dma(sc);
sc 1324 dev/ic/oosiop.c oosiop_setup_syncxfer(sc);
sc 1325 dev/ic/oosiop.c sc->sc_lastcb = cb;
sc 1329 dev/ic/oosiop.c oosiop_setup_sgdma(sc, cb);
sc 1331 dev/ic/oosiop.c sc->sc_nextdsp = Ent_ack_msgin;
sc 1334 dev/ic/oosiop.c oosiop_reset_bus(sc);
sc 1344 dev/ic/oosiop.c sc->sc_curcb = NULL;
sc 1349 dev/ic/oosiop.c dsp = oosiop_read_4(sc, OOSIOP_DSP);
sc 1350 dev/ic/oosiop.c printf("%s: script error at 0x%08x\n", sc->sc_dev.dv_xname,
sc 1352 dev/ic/oosiop.c sc->sc_curcb = NULL;
sc 1356 dev/ic/oosiop.c printf("%s: unexpected datain\n", sc->sc_dev.dv_xname);
sc 1361 dev/ic/oosiop.c printf("%s: unexpected dataout\n", sc->sc_dev.dv_xname);
sc 1366 dev/ic/oosiop.c printf("%s: unknown intr code %08x\n", sc->sc_dev.dv_xname,
sc 1373 dev/ic/oosiop.c oosiop_msgin(struct oosiop_softc *sc, struct oosiop_cb *cb)
sc 1379 dev/ic/oosiop.c sc->sc_nextdsp = Ent_ack_msgin;
sc 1382 dev/ic/oosiop.c OOSIOP_XFERMSG_SYNC(sc, cb,
sc 1389 dev/ic/oosiop.c if (sc->sc_tgt[cb->id].flags & TGTF_WAITSDTR) {
sc 1391 dev/ic/oosiop.c sc->sc_tgt[cb->id].flags &= ~TGTF_WAITSDTR;
sc 1394 dev/ic/oosiop.c if (xfer->msgin[3] < sc->sc_minperiod)
sc 1395 dev/ic/oosiop.c xfer->msgin[3] = sc->sc_minperiod;
sc 1406 dev/ic/oosiop.c oosiop_set_syncparam(sc, cb->id, (int)xfer->msgin[3],
sc 1408 dev/ic/oosiop.c oosiop_setup_syncxfer(sc);
sc 1427 dev/ic/oosiop.c oosiop_setup_sgdma(sc, cb);
sc 1432 dev/ic/oosiop.c if (sc->sc_tgt[cb->id].flags & TGTF_WAITSDTR) {
sc 1434 dev/ic/oosiop.c sc->sc_tgt[cb->id].flags &= ~TGTF_WAITSDTR;
sc 1435 dev/ic/oosiop.c oosiop_set_syncparam(sc, cb->id, 0, 0);
sc 1436 dev/ic/oosiop.c oosiop_setup_syncxfer(sc);
sc 1447 dev/ic/oosiop.c OOSIOP_XFERMSG_SYNC(sc, cb,
sc 1451 dev/ic/oosiop.c OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_POSTWRITE);
sc 1452 dev/ic/oosiop.c oosiop_fixup_move(sc, Ent_p_msgout_move, cb->msgoutlen,
sc 1455 dev/ic/oosiop.c OOSIOP_SCRIPT_SYNC(sc, BUS_DMASYNC_PREWRITE);
sc 1456 dev/ic/oosiop.c sc->sc_nextdsp = Ent_sendmsg;
sc 54 dev/ic/oosiopvar.h #define OOSIOP_XFERSCR_SYNC(sc, cb, ops) \
sc 55 dev/ic/oosiopvar.h bus_dmamap_sync((sc)->sc_dmat, (cb)->xferdma, OOSIOP_DINSCROFF, \
sc 57 dev/ic/oosiopvar.h #define OOSIOP_DINSCR_SYNC(sc, cb, ops) \
sc 58 dev/ic/oosiopvar.h bus_dmamap_sync((sc)->sc_dmat, (cb)->xferdma, OOSIOP_DINSCROFF, \
sc 60 dev/ic/oosiopvar.h #define OOSIOP_DOUTSCR_SYNC(sc, cb, ops) \
sc 61 dev/ic/oosiopvar.h bus_dmamap_sync((sc)->sc_dmat, (cb)->xferdma, OOSIOP_DOUTSCROFF,\
sc 63 dev/ic/oosiopvar.h #define OOSIOP_XFERMSG_SYNC(sc, cb, ops) \
sc 64 dev/ic/oosiopvar.h bus_dmamap_sync((sc)->sc_dmat, (cb)->xferdma, OOSIOP_MSGINOFF, \
sc 67 dev/ic/oosiopvar.h #define OOSIOP_SCRIPT_SYNC(sc, ops) \
sc 68 dev/ic/oosiopvar.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_scrdma, \
sc 150 dev/ic/oosiopvar.h #define oosiop_read_1(sc, addr) \
sc 151 dev/ic/oosiopvar.h bus_space_read_1((sc)->sc_bst, (sc)->sc_bsh, (addr))
sc 152 dev/ic/oosiopvar.h #define oosiop_write_1(sc, addr, data) \
sc 153 dev/ic/oosiopvar.h bus_space_write_1((sc)->sc_bst, (sc)->sc_bsh, (addr), (data))
sc 155 dev/ic/oosiopvar.h #define oosiop_read_4(sc, addr) \
sc 156 dev/ic/oosiopvar.h letoh32(bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (addr)))
sc 157 dev/ic/oosiopvar.h #define oosiop_write_4(sc, addr, data) \
sc 158 dev/ic/oosiopvar.h bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (addr), htole32(data))
sc 152 dev/ic/opl.c opl_attach(sc)
sc 153 dev/ic/opl.c struct opl_softc *sc;
sc 158 dev/ic/opl.c oaa.iot = sc->iot;
sc 159 dev/ic/opl.c oaa.ioh = sc->ioh;
sc 160 dev/ic/opl.c oaa.offs = sc->offs;
sc 163 dev/ic/opl.c if ((sc->model = opl_find(&oaa)) == 0) {
sc 168 dev/ic/opl.c sc->syn.mets = &opl3_midi;
sc 169 dev/ic/opl.c snprintf(sc->syn.name, sizeof sc->syn.name, "%sYamaha OPL%d",
sc 170 dev/ic/opl.c sc->syn.name, sc->model);
sc 171 dev/ic/opl.c sc->syn.data = sc;
sc 172 dev/ic/opl.c sc->syn.nvoice = sc->model == OPL_2 ? OPL2_NVOICE : OPL3_NVOICE;
sc 173 dev/ic/opl.c sc->syn.flags = MS_DOALLOC | MS_FREQXLATE;
sc 174 dev/ic/opl.c midisyn_attach(&sc->mididev, &sc->syn);
sc 178 dev/ic/opl.c sc->voices[i] = voicetab[i];
sc 180 dev/ic/opl.c opl_reset(sc);
sc 182 dev/ic/opl.c printf(": model OPL%d\n", sc->model);
sc 184 dev/ic/opl.c midi_attach_mi(&midisyn_hw_if, &sc->syn, &sc->mididev.dev);
sc 203 dev/ic/opl.c opl_command(sc, offs, addr, data)
sc 204 dev/ic/opl.c struct opl_softc *sc;
sc 209 dev/ic/opl.c sc, offs, addr, data));
sc 210 dev/ic/opl.c offs += sc->offs;
sc 211 dev/ic/opl.c bus_space_write_1(sc->iot, sc->ioh, OPL_ADDR+offs, addr);
sc 212 dev/ic/opl.c if (sc->model == OPL_2)
sc 216 dev/ic/opl.c bus_space_write_1(sc->iot, sc->ioh, OPL_DATA+offs, data);
sc 217 dev/ic/opl.c if (sc->model == OPL_2)
sc 280 dev/ic/opl.c opl_set_op_reg(sc, base, voice, op, value)
sc 281 dev/ic/opl.c struct opl_softc *sc;
sc 287 dev/ic/opl.c struct opl_voice *v = &sc->voices[voice];
sc 288 dev/ic/opl.c opl_command(sc, v->iooffs, base + v->op[op], value);
sc 292 dev/ic/opl.c opl_set_ch_reg(sc, base, voice, value)
sc 293 dev/ic/opl.c struct opl_softc *sc;
sc 298 dev/ic/opl.c struct opl_voice *v = &sc->voices[voice];
sc 299 dev/ic/opl.c opl_command(sc, v->iooffs, base + v->voiceno, value);
sc 304 dev/ic/opl.c opl_load_patch(sc, v)
sc 305 dev/ic/opl.c struct opl_softc *sc;
sc 308 dev/ic/opl.c const struct opl_operators *p = sc->voices[v].patch;
sc 310 dev/ic/opl.c opl_set_op_reg(sc, OPL_AM_VIB, v, 0, p->ops[OO_CHARS+0]);
sc 311 dev/ic/opl.c opl_set_op_reg(sc, OPL_AM_VIB, v, 1, p->ops[OO_CHARS+1]);
sc 312 dev/ic/opl.c opl_set_op_reg(sc, OPL_KSL_LEVEL, v, 0, p->ops[OO_KSL_LEV+0]);
sc 313 dev/ic/opl.c opl_set_op_reg(sc, OPL_KSL_LEVEL, v, 1, p->ops[OO_KSL_LEV+1]);
sc 314 dev/ic/opl.c opl_set_op_reg(sc, OPL_ATTACK_DECAY, v, 0, p->ops[OO_ATT_DEC+0]);
sc 315 dev/ic/opl.c opl_set_op_reg(sc, OPL_ATTACK_DECAY, v, 1, p->ops[OO_ATT_DEC+1]);
sc 316 dev/ic/opl.c opl_set_op_reg(sc, OPL_SUSTAIN_RELEASE, v, 0, p->ops[OO_SUS_REL+0]);
sc 317 dev/ic/opl.c opl_set_op_reg(sc, OPL_SUSTAIN_RELEASE, v, 1, p->ops[OO_SUS_REL+1]);
sc 318 dev/ic/opl.c opl_set_op_reg(sc, OPL_WAVE_SELECT, v, 0, p->ops[OO_WAV_SEL+0]);
sc 319 dev/ic/opl.c opl_set_op_reg(sc, OPL_WAVE_SELECT, v, 1, p->ops[OO_WAV_SEL+1]);
sc 320 dev/ic/opl.c opl_set_ch_reg(sc, OPL_FEEDBACK_CONNECTION, v, p->ops[OO_FB_CONN]);
sc 344 dev/ic/opl.c opl_reset(sc)
sc 345 dev/ic/opl.c struct opl_softc *sc;
sc 350 dev/ic/opl.c opl_command(sc, OPL_L, OPL_KEYON_BLOCK + i, 0);
sc 352 dev/ic/opl.c opl_command(sc, OPL_L, OPL_TEST, OPL_ENABLE_WAVE_SELECT);
sc 353 dev/ic/opl.c opl_command(sc, OPL_L, OPL_PERCUSSION, 0);
sc 354 dev/ic/opl.c if (sc->model == OPL_3) {
sc 355 dev/ic/opl.c opl_command(sc, OPL_R, OPL_MODE, OPL3_ENABLE);
sc 356 dev/ic/opl.c opl_command(sc, OPL_R,OPL_CONNECTION_SELECT,OPL_NOCONNECTION);
sc 359 dev/ic/opl.c sc->volume = 64;
sc 367 dev/ic/opl.c struct opl_softc *sc = ms->data;
sc 372 dev/ic/opl.c if (sc->spkrctl)
sc 373 dev/ic/opl.c sc->spkrctl(sc->spkrarg, 1);
sc 381 dev/ic/opl.c struct opl_softc *sc = ms->data;
sc 386 dev/ic/opl.c if (sc->spkrctl)
sc 387 dev/ic/opl.c sc->spkrctl(sc->spkrarg, 0);
sc 396 dev/ic/opl.c struct opl_softc *sc = addr;
sc 398 dev/ic/opl.c sd->name = sc->model == OPL_2 ? "Yamaha OPL2" : "Yamaha OPL3";
sc 400 dev/ic/opl.c sd->subtype = sc->model == OPL_2 ? SYNTH_SUB_FM_TYPE_ADLIB
sc 410 dev/ic/opl.c struct opl_softc *sc = addr;
sc 412 dev/ic/opl.c opl_reset(sc);
sc 462 dev/ic/opl.c struct opl_softc *sc = ms->data;
sc 472 dev/ic/opl.c DPRINTFN(3, ("oplsyn_noteon: %p %d %d\n", sc, voice,
sc 476 dev/ic/opl.c if (voice < 0 || voice >= sc->syn.nvoice) {
sc 482 dev/ic/opl.c opl_set_op_reg(sc, OPL_KSL_LEVEL, voice, 0, 0xff);
sc 483 dev/ic/opl.c opl_set_op_reg(sc, OPL_KSL_LEVEL, voice, 1, 0xff);
sc 484 dev/ic/opl.c opl_set_ch_reg(sc, OPL_KEYON_BLOCK, voice, 0);
sc 486 dev/ic/opl.c v = &sc->voices[voice];
sc 490 dev/ic/opl.c opl_load_patch(sc, voice);
sc 518 dev/ic/opl.c vol0 = opl_calc_vol(ksl0, vel, sc->volume);
sc 519 dev/ic/opl.c vol1 = opl_calc_vol(ksl1, vel, sc->volume);
sc 522 dev/ic/opl.c vol1 = opl_calc_vol(ksl1, vel, sc->volume);
sc 533 dev/ic/opl.c if (sc->model == OPL_3) {
sc 538 dev/ic/opl.c opl_set_ch_reg(sc, OPL_FEEDBACK_CONNECTION, voice, fbc);
sc 540 dev/ic/opl.c opl_set_op_reg(sc, OPL_AM_VIB, voice, 0, r20m);
sc 541 dev/ic/opl.c opl_set_op_reg(sc, OPL_AM_VIB, voice, 1, r20c);
sc 542 dev/ic/opl.c opl_set_op_reg(sc, OPL_KSL_LEVEL, voice, 0, r40m);
sc 543 dev/ic/opl.c opl_set_op_reg(sc, OPL_KSL_LEVEL, voice, 1, r40c);
sc 544 dev/ic/opl.c opl_set_ch_reg(sc, OPL_FNUM_LOW, voice, rA0);
sc 545 dev/ic/opl.c opl_set_ch_reg(sc, OPL_KEYON_BLOCK, voice, rB0);
sc 553 dev/ic/opl.c struct opl_softc *sc = ms->data;
sc 556 dev/ic/opl.c DPRINTFN(3, ("oplsyn_noteoff: %p %d %d\n", sc, voice,
sc 560 dev/ic/opl.c if (voice < 0 || voice >= sc->syn.nvoice) {
sc 565 dev/ic/opl.c v = &sc->voices[voice];
sc 566 dev/ic/opl.c opl_set_ch_reg(sc, 0xB0, voice, v->rB0 & ~OPL_KEYON_BIT);
sc 575 dev/ic/opl.c struct opl_softc *sc = ms->data;
sc 576 dev/ic/opl.c DPRINTFN(1, ("oplsyn_keypressure: %p %d\n", sc, note));
sc 586 dev/ic/opl.c struct opl_softc *sc = ms->data;
sc 587 dev/ic/opl.c DPRINTFN(1, ("oplsyn_ctlchange: %p %d\n", sc, voice));
sc 597 dev/ic/opl.c struct opl_softc *sc = ms->data;
sc 598 dev/ic/opl.c DPRINTFN(1, ("oplsyn_pitchbend: %p %d\n", sc, voice));
sc 609 dev/ic/opl.c struct opl_softc *sc = ms->data;
sc 612 dev/ic/opl.c DPRINTFN(1, ("oplsyn_loadpatch: %p\n", sc));
sc 199 dev/ic/osiop.c osiop_attach(sc)
sc 200 dev/ic/osiop.c struct osiop_softc *sc;
sc 211 dev/ic/osiop.c err = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, PAGE_SIZE, 0,
sc 217 dev/ic/osiop.c err = bus_dmamem_map(sc->sc_dmat, &seg, nseg, PAGE_SIZE,
sc 218 dev/ic/osiop.c (caddr_t *)&sc->sc_script, BUS_DMA_NOWAIT | BUS_DMA_COHERENT);
sc 223 dev/ic/osiop.c err = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0,
sc 224 dev/ic/osiop.c BUS_DMA_NOWAIT, &sc->sc_scrdma);
sc 229 dev/ic/osiop.c err = bus_dmamap_load_raw(sc->sc_dmat, sc->sc_scrdma,
sc 235 dev/ic/osiop.c bzero(sc->sc_script, PAGE_SIZE);
sc 240 dev/ic/osiop.c memcpy(sc->sc_script, osiop_script, sizeof(osiop_script));
sc 241 dev/ic/osiop.c bus_dmamap_sync(sc->sc_dmat, sc->sc_scrdma, 0, sizeof(osiop_script),
sc 247 dev/ic/osiop.c err = bus_dmamem_alloc(sc->sc_dmat,
sc 254 dev/ic/osiop.c err = bus_dmamem_map(sc->sc_dmat, &seg, nseg,
sc 255 dev/ic/osiop.c sizeof(struct osiop_ds) * OSIOP_NACB, (caddr_t *)&sc->sc_ds,
sc 261 dev/ic/osiop.c err = bus_dmamap_create(sc->sc_dmat,
sc 264 dev/ic/osiop.c BUS_DMA_NOWAIT, &sc->sc_dsdma);
sc 269 dev/ic/osiop.c err = bus_dmamap_load_raw(sc->sc_dmat, sc->sc_dsdma,
sc 275 dev/ic/osiop.c bzero(sc->sc_ds, sizeof(struct osiop_ds) * OSIOP_NACB);
sc 287 dev/ic/osiop.c sc->sc_acb = acb;
sc 289 dev/ic/osiop.c sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
sc 290 dev/ic/osiop.c sc->sc_nexus = NULL;
sc 291 dev/ic/osiop.c sc->sc_active = 0;
sc 293 dev/ic/osiop.c bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo));
sc 296 dev/ic/osiop.c TAILQ_INIT(&sc->ready_list);
sc 297 dev/ic/osiop.c TAILQ_INIT(&sc->nexus_list);
sc 298 dev/ic/osiop.c TAILQ_INIT(&sc->free_list);
sc 304 dev/ic/osiop.c err = bus_dmamap_create(sc->sc_dmat, OSIOP_MAX_XFER, OSIOP_NSG,
sc 312 dev/ic/osiop.c acb->sc = sc;
sc 313 dev/ic/osiop.c acb->ds = &sc->sc_ds[i];
sc 316 dev/ic/osiop.c dsa = sc->sc_dsdma->dm_segs[0].ds_addr + acb->dsoffset;
sc 329 dev/ic/osiop.c TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
sc 333 dev/ic/osiop.c osiop_read_1(sc, OSIOP_CTEST8) >> 4, sc->sc_clock_freq, sc->sc_id);
sc 338 dev/ic/osiop.c osiop_init(sc);
sc 343 dev/ic/osiop.c sc->sc_link.adapter = &osiop_adapter;
sc 344 dev/ic/osiop.c sc->sc_link.adapter_softc = sc;
sc 345 dev/ic/osiop.c sc->sc_link.device = &osiop_dev;
sc 346 dev/ic/osiop.c sc->sc_link.openings = 4;
sc 347 dev/ic/osiop.c sc->sc_link.adapter_buswidth = OSIOP_NTGT;
sc 348 dev/ic/osiop.c sc->sc_link.adapter_target = sc->sc_id;
sc 351 dev/ic/osiop.c saa.saa_sc_link = &sc->sc_link;
sc 356 dev/ic/osiop.c config_found(&sc->sc_dev, &saa, scsiprint);
sc 382 dev/ic/osiop.c struct osiop_softc *sc = periph->adapter_softc;
sc 390 dev/ic/osiop.c if (sc->sc_nexus && (xs->flags & SCSI_POLL))
sc 398 dev/ic/osiop.c acb = TAILQ_FIRST(&sc->free_list);
sc 400 dev/ic/osiop.c TAILQ_REMOVE(&sc->free_list, acb, chain);
sc 426 dev/ic/osiop.c err = bus_dmamap_load(sc->sc_dmat, acb->datadma,
sc 433 dev/ic/osiop.c sc->sc_dev.dv_xname, err);
sc 436 dev/ic/osiop.c TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
sc 440 dev/ic/osiop.c bus_dmamap_sync(sc->sc_dmat, acb->datadma,
sc 451 dev/ic/osiop.c TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
sc 453 dev/ic/osiop.c osiop_sched(sc);
sc 457 dev/ic/osiop.c if ((acb->xsflags & SCSI_POLL) || (sc->sc_flags & OSIOP_NODMA))
sc 458 dev/ic/osiop.c osiop_poll(sc, acb);
sc 470 dev/ic/osiop.c osiop_poll(sc, acb)
sc 471 dev/ic/osiop.c struct osiop_softc *sc;
sc 480 dev/ic/osiop.c if (!TAILQ_EMPTY(&sc->nexus_list))
sc 482 dev/ic/osiop.c sc->sc_dev.dv_xname);
sc 485 dev/ic/osiop.c while (((istat = osiop_read_1(sc, OSIOP_ISTAT)) &
sc 494 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBCL),
sc 495 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DSP),
sc 496 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DSP) -
sc 497 dev/ic/osiop.c sc->sc_scrdma->dm_segs[0].ds_addr,
sc 498 dev/ic/osiop.c osiop_read_1(sc, OSIOP_DCMD),
sc 504 dev/ic/osiop.c osiop_reset(sc);
sc 512 dev/ic/osiop.c sstat0 = osiop_read_1(sc, OSIOP_SSTAT0);
sc 514 dev/ic/osiop.c dstat = osiop_read_1(sc, OSIOP_DSTAT);
sc 515 dev/ic/osiop.c if (osiop_checkintr(sc, istat, dstat, sstat0, &status)) {
sc 516 dev/ic/osiop.c if (acb != sc->sc_nexus)
sc 518 dev/ic/osiop.c " completed\n", sc->sc_dev.dv_xname);
sc 519 dev/ic/osiop.c else if ((sc->sc_flags & OSIOP_INTDEFER) == 0) {
sc 520 dev/ic/osiop.c sc->sc_flags &= ~OSIOP_INTSOFF;
sc 521 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SIEN, sc->sc_sien);
sc 522 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DIEN, sc->sc_dien);
sc 524 dev/ic/osiop.c osiop_scsidone(sc->sc_nexus, status);
sc 539 dev/ic/osiop.c osiop_sched(sc)
sc 540 dev/ic/osiop.c struct osiop_softc *sc;
sc 546 dev/ic/osiop.c if ((sc->sc_nexus != NULL) || TAILQ_EMPTY(&sc->ready_list)) {
sc 550 dev/ic/osiop.c sc->sc_dev.dv_xname, sc->sc_nexus,
sc 551 dev/ic/osiop.c sc->sc_nexus != NULL ?
sc 552 dev/ic/osiop.c sc->sc_nexus->xs->sc_link->target : 0,
sc 553 dev/ic/osiop.c TAILQ_FIRST(&sc->ready_list),
sc 554 dev/ic/osiop.c TAILQ_FIRST(&sc->ready_list) != NULL ?
sc 555 dev/ic/osiop.c TAILQ_FIRST(&sc->ready_list)->xs->sc_link->target :
sc 560 dev/ic/osiop.c TAILQ_FOREACH(acb, &sc->ready_list, chain) {
sc 562 dev/ic/osiop.c ti = &sc->sc_tinfo[periph->target];
sc 564 dev/ic/osiop.c TAILQ_REMOVE(&sc->ready_list, acb, chain);
sc 565 dev/ic/osiop.c sc->sc_nexus = acb;
sc 575 dev/ic/osiop.c sc->sc_dev.dv_xname);
sc 581 dev/ic/osiop.c osiop_reset(sc);
sc 583 dev/ic/osiop.c sc->sc_active++;
sc 584 dev/ic/osiop.c osiop_select(sc);
sc 594 dev/ic/osiop.c struct osiop_softc *sc;
sc 607 dev/ic/osiop.c sc = acb->sc;
sc 621 dev/ic/osiop.c sc->sc_dev.dv_xname, acb->status);
sc 625 dev/ic/osiop.c bus_dmamap_sync(sc->sc_dmat, acb->datadma, 0, acb->datalen,
sc 628 dev/ic/osiop.c bus_dmamap_unload(sc->sc_dmat, acb->datadma);
sc 665 dev/ic/osiop.c sc->sc_dev.dv_xname, status);
sc 678 dev/ic/osiop.c if (acb == sc->sc_nexus) {
sc 679 dev/ic/osiop.c sc->sc_nexus = NULL;
sc 680 dev/ic/osiop.c sc->sc_tinfo[periph->target].lubusy &=
sc 682 dev/ic/osiop.c sc->sc_active--;
sc 684 dev/ic/osiop.c } else if (sc->ready_list.tqh_last == &TAILQ_NEXT(acb, chain)) {
sc 685 dev/ic/osiop.c TAILQ_REMOVE(&sc->ready_list, acb, chain);
sc 689 dev/ic/osiop.c TAILQ_FOREACH(acb2, &sc->nexus_list, chain) {
sc 691 dev/ic/osiop.c TAILQ_REMOVE(&sc->nexus_list, acb, chain);
sc 692 dev/ic/osiop.c sc->sc_tinfo[periph->target].lubusy &=
sc 694 dev/ic/osiop.c sc->sc_active--;
sc 700 dev/ic/osiop.c TAILQ_REMOVE(&sc->ready_list, acb, chain);
sc 701 dev/ic/osiop.c sc->sc_active--;
sc 704 dev/ic/osiop.c sc->sc_dev.dv_xname);
sc 719 dev/ic/osiop.c TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
sc 720 dev/ic/osiop.c sc->sc_tinfo[periph->target].cmds++;
sc 743 dev/ic/osiop.c err = bus_dmamap_load(sc->sc_dmat, acb->datadma,
sc 748 dev/ic/osiop.c sc->sc_dev.dv_xname, err);
sc 752 dev/ic/osiop.c bus_dmamap_sync(sc->sc_dmat, acb->datadma,
sc 755 dev/ic/osiop.c sc->sc_tinfo[periph->target].senses++;
sc 757 dev/ic/osiop.c TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
sc 758 dev/ic/osiop.c if (((acb->xsflags & SCSI_POLL) == 0) && ((sc->sc_flags & OSIOP_NODMA) == 0))
sc 763 dev/ic/osiop.c osiop_sched(sc);
sc 767 dev/ic/osiop.c osiop_abort(sc, where)
sc 768 dev/ic/osiop.c struct osiop_softc *sc;
sc 773 dev/ic/osiop.c sstat0 = osiop_read_1(sc, OSIOP_SSTAT0);
sc 775 dev/ic/osiop.c dstat = osiop_read_1(sc, OSIOP_DSTAT);
sc 778 dev/ic/osiop.c sc->sc_dev.dv_xname, where,
sc 780 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBCL));
sc 783 dev/ic/osiop.c if (sc->sc_active > 0) {
sc 784 dev/ic/osiop.c sc->sc_active = 0;
sc 789 dev/ic/osiop.c osiop_init(sc)
sc 790 dev/ic/osiop.c struct osiop_softc *sc;
sc 794 dev/ic/osiop.c sc->sc_tcp[1] = 1000 / sc->sc_clock_freq;
sc 795 dev/ic/osiop.c sc->sc_tcp[2] = 1500 / sc->sc_clock_freq;
sc 796 dev/ic/osiop.c sc->sc_tcp[3] = 2000 / sc->sc_clock_freq;
sc 797 dev/ic/osiop.c sc->sc_minsync = sc->sc_tcp[1]; /* in 4ns units */
sc 799 dev/ic/osiop.c if (sc->sc_minsync < 25)
sc 800 dev/ic/osiop.c sc->sc_minsync = 25;
sc 802 dev/ic/osiop.c if (sc->sc_clock_freq <= 25) {
sc 803 dev/ic/osiop.c sc->sc_dcntl |= OSIOP_DCNTL_CF_1; /* SCLK/1 */
sc 804 dev/ic/osiop.c sc->sc_tcp[0] = sc->sc_tcp[1];
sc 805 dev/ic/osiop.c } else if (sc->sc_clock_freq <= 37) {
sc 806 dev/ic/osiop.c sc->sc_dcntl |= OSIOP_DCNTL_CF_1_5; /* SCLK/1.5 */
sc 807 dev/ic/osiop.c sc->sc_tcp[0] = sc->sc_tcp[2];
sc 808 dev/ic/osiop.c } else if (sc->sc_clock_freq <= 50) {
sc 809 dev/ic/osiop.c sc->sc_dcntl |= OSIOP_DCNTL_CF_2; /* SCLK/2 */
sc 810 dev/ic/osiop.c sc->sc_tcp[0] = sc->sc_tcp[3];
sc 812 dev/ic/osiop.c sc->sc_dcntl |= OSIOP_DCNTL_CF_3; /* SCLK/3 */
sc 813 dev/ic/osiop.c sc->sc_tcp[0] = 3000 / sc->sc_clock_freq;
sc 816 dev/ic/osiop.c if ((sc->sc_cfflags & 0x10000) != 0) {
sc 817 dev/ic/osiop.c sc->sc_flags |= OSIOP_NODMA;
sc 820 dev/ic/osiop.c sc->sc_dev.dv_xname);
sc 824 dev/ic/osiop.c inhibit_sync = (sc->sc_cfflags & 0xff00) >> 8; /* XXX */
sc 825 dev/ic/osiop.c inhibit_disc = sc->sc_cfflags & 0x00ff; /* XXX */
sc 829 dev/ic/osiop.c sc->sc_dev.dv_xname, inhibit_sync);
sc 832 dev/ic/osiop.c sc->sc_dev.dv_xname, inhibit_disc);
sc 836 dev/ic/osiop.c sc->sc_tinfo[i].flags |= TI_NOSYNC;
sc 838 dev/ic/osiop.c sc->sc_tinfo[i].flags |= TI_NODISC;
sc 841 dev/ic/osiop.c osiop_resetbus(sc);
sc 842 dev/ic/osiop.c osiop_reset(sc);
sc 846 dev/ic/osiop.c osiop_reset(sc)
sc 847 dev/ic/osiop.c struct osiop_softc *sc;
sc 854 dev/ic/osiop.c printf("%s: resetting chip\n", sc->sc_dev.dv_xname);
sc 856 dev/ic/osiop.c if (sc->sc_flags & OSIOP_ALIVE)
sc 857 dev/ic/osiop.c osiop_abort(sc, "reset");
sc 867 dev/ic/osiop.c osiop_write_1(sc, OSIOP_ISTAT,
sc 868 dev/ic/osiop.c osiop_read_1(sc, OSIOP_ISTAT) | OSIOP_ISTAT_ABRT);
sc 870 dev/ic/osiop.c osiop_write_1(sc, OSIOP_ISTAT,
sc 871 dev/ic/osiop.c osiop_read_1(sc, OSIOP_ISTAT) | OSIOP_ISTAT_RST);
sc 873 dev/ic/osiop.c osiop_write_1(sc, OSIOP_ISTAT,
sc 874 dev/ic/osiop.c osiop_read_1(sc, OSIOP_ISTAT) & ~OSIOP_ISTAT_RST);
sc 880 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SCNTL0,
sc 882 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SCNTL1, OSIOP_SCNTL1_ESR);
sc 883 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DCNTL, sc->sc_dcntl);
sc 884 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DMODE, sc->sc_dmode);
sc 886 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SIEN, 0x00);
sc 887 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DIEN, 0x00);
sc 888 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SCID, OSIOP_SCID_VALUE(sc->sc_id));
sc 889 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DWT, 0x00);
sc 890 dev/ic/osiop.c osiop_write_1(sc, OSIOP_CTEST0, osiop_read_1(sc, OSIOP_CTEST0)
sc 892 dev/ic/osiop.c osiop_write_1(sc, OSIOP_CTEST7,
sc 893 dev/ic/osiop.c osiop_read_1(sc, OSIOP_CTEST7) | sc->sc_ctest7);
sc 897 dev/ic/osiop.c sc->sc_tinfo[i].state = NEG_INIT;
sc 898 dev/ic/osiop.c sc->sc_tinfo[i].period = 0;
sc 899 dev/ic/osiop.c sc->sc_tinfo[i].offset = 0;
sc 902 dev/ic/osiop.c stat = osiop_read_1(sc, OSIOP_ISTAT);
sc 904 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SSTAT0);
sc 909 dev/ic/osiop.c osiop_read_1(sc, OSIOP_DSTAT);
sc 917 dev/ic/osiop.c if (sc->sc_nexus != NULL) {
sc 918 dev/ic/osiop.c sc->sc_nexus->xs->error =
sc 919 dev/ic/osiop.c (sc->sc_nexus->flags & ACB_F_TIMEOUT) ?
sc 921 dev/ic/osiop.c sc->sc_nexus->status = ACB_S_DONE;
sc 922 dev/ic/osiop.c osiop_scsidone(sc->sc_nexus, SCSI_OSIOP_NOCHECK);
sc 924 dev/ic/osiop.c while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) {
sc 932 dev/ic/osiop.c sc->sc_flags &= ~(OSIOP_INTDEFER | OSIOP_INTSOFF);
sc 934 dev/ic/osiop.c sc->sc_sien = OSIOP_SIEN_M_A | OSIOP_SIEN_STO | /*OSIOP_SIEN_SEL |*/
sc 936 dev/ic/osiop.c sc->sc_dien = OSIOP_DIEN_BF | OSIOP_DIEN_ABRT | OSIOP_DIEN_SIR |
sc 938 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SIEN, sc->sc_sien);
sc 939 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DIEN, sc->sc_dien);
sc 943 dev/ic/osiop.c osiop_resetbus(sc)
sc 944 dev/ic/osiop.c struct osiop_softc *sc;
sc 947 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SIEN, 0);
sc 948 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SCNTL1,
sc 949 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SCNTL1) | OSIOP_SCNTL1_RST);
sc 951 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SCNTL1,
sc 952 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SCNTL1) & ~OSIOP_SCNTL1_RST);
sc 960 dev/ic/osiop.c osiop_start(sc)
sc 961 dev/ic/osiop.c struct osiop_softc *sc;
sc 963 dev/ic/osiop.c struct osiop_acb *acb = sc->sc_nexus;
sc 966 dev/ic/osiop.c bus_dmamap_t dsdma = sc->sc_dsdma, datadma = acb->datadma;
sc 974 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBCL) & OSIOP_BSY) {
sc 976 dev/ic/osiop.c sc->sc_script, acb->ds, sc->sc_active);
sc 978 dev/ic/osiop.c osiop_read_1(sc, OSIOP_ISTAT),
sc 979 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SFBR),
sc 980 dev/ic/osiop.c osiop_read_1(sc, OSIOP_LCRC),
sc 981 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SIEN),
sc 982 dev/ic/osiop.c osiop_read_1(sc, OSIOP_DIEN));
sc 998 dev/ic/osiop.c ti = &sc->sc_tinfo[target];
sc 1020 dev/ic/osiop.c osiop_update_xfer_mode(sc, target);
sc 1031 dev/ic/osiop.c ds->msgout[4] = sc->sc_minsync;
sc 1057 dev/ic/osiop.c bus_dmamap_sync(sc->sc_dmat, dsdma,
sc 1065 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBCL) & OSIOP_BSY) {
sc 1068 dev/ic/osiop.c sc->sc_script, acb->ds, sc->sc_active);
sc 1076 dev/ic/osiop.c if (TAILQ_EMPTY(&sc->nexus_list)) {
sc 1077 dev/ic/osiop.c if (osiop_read_1(sc, OSIOP_ISTAT) & OSIOP_ISTAT_CON)
sc 1079 dev/ic/osiop.c sc->sc_dev.dv_xname);
sc 1080 dev/ic/osiop.c osiop_write_4(sc, OSIOP_TEMP, 0);
sc 1081 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SBCL, ti->sbcl);
sc 1082 dev/ic/osiop.c osiop_write_4(sc, OSIOP_DSA,
sc 1084 dev/ic/osiop.c osiop_write_4(sc, OSIOP_DSP,
sc 1085 dev/ic/osiop.c sc->sc_scrdma->dm_segs[0].ds_addr + Ent_scripts);
sc 1088 dev/ic/osiop.c if ((osiop_read_1(sc, OSIOP_ISTAT) & OSIOP_ISTAT_CON) == 0) {
sc 1089 dev/ic/osiop.c osiop_write_1(sc, OSIOP_ISTAT, OSIOP_ISTAT_SIGP);
sc 1093 dev/ic/osiop.c osiop_read_1(sc, OSIOP_ISTAT), 0);
sc 1106 dev/ic/osiop.c osiop_checkintr(sc, istat, dstat, sstat0, status)
sc 1107 dev/ic/osiop.c struct osiop_softc *sc;
sc 1113 dev/ic/osiop.c struct osiop_acb *acb = sc->sc_nexus;
sc 1115 dev/ic/osiop.c bus_dmamap_t dsdma = sc->sc_dsdma;
sc 1116 dev/ic/osiop.c bus_addr_t scraddr = sc->sc_scrdma->dm_segs[0].ds_addr;
sc 1120 dev/ic/osiop.c dfifo = osiop_read_1(sc, OSIOP_DFIFO);
sc 1121 dev/ic/osiop.c dbc = osiop_read_4(sc, OSIOP_DBC) & 0x00ffffff;
sc 1122 dev/ic/osiop.c sstat1 = osiop_read_1(sc, OSIOP_SSTAT1);
sc 1123 dev/ic/osiop.c osiop_write_1(sc, OSIOP_CTEST8,
sc 1124 dev/ic/osiop.c osiop_read_1(sc, OSIOP_CTEST8) | OSIOP_CTEST8_CLF);
sc 1125 dev/ic/osiop.c while ((osiop_read_1(sc, OSIOP_CTEST1) & OSIOP_CTEST1_FMT) !=
sc 1128 dev/ic/osiop.c osiop_write_1(sc, OSIOP_CTEST8,
sc 1129 dev/ic/osiop.c osiop_read_1(sc, OSIOP_CTEST8) & ~OSIOP_CTEST8_CLF);
sc 1130 dev/ic/osiop.c intcode = osiop_read_4(sc, OSIOP_DSPS);
sc 1133 dev/ic/osiop.c if (osiop_read_4(sc, OSIOP_DSP) != 0 &&
sc 1134 dev/ic/osiop.c (osiop_read_4(sc, OSIOP_DSP) < scraddr ||
sc 1135 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DSP) >= scraddr + sizeof(osiop_script))) {
sc 1137 dev/ic/osiop.c sc->sc_dev.dv_xname,
sc 1138 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DSP),
sc 1152 dev/ic/osiop.c bus_dmamap_sync(sc->sc_dmat, dsdma,
sc 1167 dev/ic/osiop.c sc->sc_dev.dv_xname);
sc 1171 dev/ic/osiop.c if (osiop_read_4(sc, OSIOP_DSA) !=
sc 1174 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DSA),
sc 1180 dev/ic/osiop.c ti = &sc->sc_tinfo[target];
sc 1184 dev/ic/osiop.c sc->sc_dev.dv_xname, target);
sc 1187 dev/ic/osiop.c sc->sc_dev.dv_xname, target);
sc 1190 dev/ic/osiop.c osiop_update_xfer_mode(sc, target);
sc 1194 dev/ic/osiop.c if (osiop_read_1(sc, OSIOP_SBCL) & OSIOP_BSY) {
sc 1205 dev/ic/osiop.c sc->sc_dev.dv_xname, ds->msgbuf[0]);
sc 1207 dev/ic/osiop.c if (!TAILQ_EMPTY(&sc->nexus_list))
sc 1208 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DCNTL,
sc 1209 dev/ic/osiop.c osiop_read_1(sc, OSIOP_DCNTL) | OSIOP_DCNTL_STD);
sc 1217 dev/ic/osiop.c sc->sc_dev.dv_xname);
sc 1224 dev/ic/osiop.c struct osiop_tinfo *ti = &sc->sc_tinfo[target];
sc 1235 dev/ic/osiop.c osiop_update_xfer_mode(sc, target);
sc 1237 dev/ic/osiop.c bus_dmamap_sync(sc->sc_dmat, dsdma,
sc 1240 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SXFER, ti->sxfer);
sc 1241 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SBCL, ti->sbcl);
sc 1244 dev/ic/osiop.c osiop_write_4(sc, OSIOP_DSP,
sc 1248 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DCNTL,
sc 1249 dev/ic/osiop.c osiop_read_1(sc, OSIOP_DCNTL) | OSIOP_DCNTL_STD);
sc 1262 dev/ic/osiop.c sc->sc_dev.dv_xname);
sc 1271 dev/ic/osiop.c acb->curaddr = osiop_read_4(sc, OSIOP_DNAD) - adjust;
sc 1280 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBCL),
sc 1290 dev/ic/osiop.c bus_dmamap_sync(sc->sc_dmat, dsdma,
sc 1298 dev/ic/osiop.c OSIOP_TRACE('m', osiop_read_1(sc, OSIOP_SBCL),
sc 1299 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DSP) >> 8,
sc 1300 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DSP));
sc 1303 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBCL),
sc 1304 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DSP) - scraddr,
sc 1305 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DBC));
sc 1307 dev/ic/osiop.c if ((osiop_read_1(sc, OSIOP_SBCL) & OSIOP_REQ) == 0) {
sc 1310 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBCL),
sc 1311 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DSP));
sc 1316 dev/ic/osiop.c switch (OSIOP_PHASE(osiop_read_1(sc, OSIOP_SBCL))) {
sc 1323 dev/ic/osiop.c osiop_write_4(sc, OSIOP_DSP, scraddr + Ent_switch);
sc 1326 dev/ic/osiop.c printf("%s: invalid phase\n", sc->sc_dev.dv_xname);
sc 1335 dev/ic/osiop.c sc->sc_dev.dv_xname);
sc 1343 dev/ic/osiop.c if (osiop_read_1(sc, OSIOP_SBCL) & OSIOP_BSY) {
sc 1345 dev/ic/osiop.c "script %p dsa %lx\n", sc->sc_script,
sc 1349 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBCL),
sc 1350 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SDID),
sc 1352 dev/ic/osiop.c if ((osiop_read_1(sc, OSIOP_SBCL) & OSIOP_BSY) == 0) {
sc 1356 dev/ic/osiop.c if (!TAILQ_EMPTY(&sc->nexus_list))
sc 1357 dev/ic/osiop.c osiop_write_4(sc, OSIOP_DSP,
sc 1363 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DCNTL,
sc 1364 dev/ic/osiop.c osiop_read_1(sc, OSIOP_DCNTL) | OSIOP_DCNTL_STD);
sc 1375 dev/ic/osiop.c if (!TAILQ_EMPTY(&sc->nexus_list))
sc 1376 dev/ic/osiop.c osiop_write_4(sc, OSIOP_DSP,
sc 1383 dev/ic/osiop.c target = sc->sc_id;
sc 1388 dev/ic/osiop.c "with no active command?\n", sc->sc_dev.dv_xname);
sc 1390 dev/ic/osiop.c sc->sc_dev.dv_xname, target);
sc 1393 dev/ic/osiop.c osiop_abort(sc, "osiop_chkintr");
sc 1396 dev/ic/osiop.c if (!TAILQ_EMPTY(&sc->nexus_list))
sc 1397 dev/ic/osiop.c osiop_write_4(sc, OSIOP_DSP,
sc 1406 dev/ic/osiop.c sc->sc_dev.dv_xname);
sc 1414 dev/ic/osiop.c sc->sc_dev.dv_xname, 1 << target,
sc 1415 dev/ic/osiop.c osiop_read_4(sc, OSIOP_TEMP),
sc 1416 dev/ic/osiop.c (osiop_read_4(sc, OSIOP_TEMP) != 0) ?
sc 1417 dev/ic/osiop.c osiop_read_4(sc, OSIOP_TEMP) - scraddr : 0,
sc 1421 dev/ic/osiop.c bus_dmamap_sync(sc->sc_dmat, dsdma,
sc 1435 dev/ic/osiop.c osiop_read_4(sc, OSIOP_TEMP) != 0) {
sc 1436 dev/ic/osiop.c long n = osiop_read_4(sc, OSIOP_TEMP) - scraddr;
sc 1442 dev/ic/osiop.c sc->sc_dev.dv_xname, n,
sc 1458 dev/ic/osiop.c sc->sc_dev.dv_xname, n);
sc 1476 dev/ic/osiop.c sc->sc_dev.dv_xname);
sc 1480 dev/ic/osiop.c sc->sc_dev.dv_xname, 1 << target);
sc 1523 dev/ic/osiop.c bus_dmamap_sync(sc->sc_dmat, dsdma,
sc 1527 dev/ic/osiop.c sc->sc_tinfo[target].dconns++;
sc 1533 dev/ic/osiop.c acb->intstat = sc->sc_flags & OSIOP_INTSOFF;
sc 1534 dev/ic/osiop.c TAILQ_INSERT_TAIL(&sc->nexus_list, acb, chain);
sc 1535 dev/ic/osiop.c sc->sc_nexus = NULL; /* no current device */
sc 1536 dev/ic/osiop.c osiop_write_4(sc, OSIOP_DSP, scraddr + Ent_wait_reselect);
sc 1538 dev/ic/osiop.c osiop_sched(sc);
sc 1542 dev/ic/osiop.c int reselid = ffs(osiop_read_4(sc, OSIOP_SCRATCH) & 0xff) - 1;
sc 1543 dev/ic/osiop.c int reselun = osiop_read_1(sc, OSIOP_SFBR) & 0x07;
sc 1550 dev/ic/osiop.c sc->sc_sstat1 = osiop_read_1(sc, OSIOP_SBCL);
sc 1554 dev/ic/osiop.c sc->sc_dev.dv_xname, reselid, intcode);
sc 1555 dev/ic/osiop.c resmsg = osiop_read_1(sc, OSIOP_SFBR);
sc 1558 dev/ic/osiop.c "%02x\n", sc->sc_dev.dv_xname, resmsg);
sc 1560 dev/ic/osiop.c if (sc->sc_nexus != NULL) {
sc 1562 dev/ic/osiop.c sc->sc_nexus->xs->sc_link;
sc 1566 dev/ic/osiop.c sc->sc_dev.dv_xname, reselid);
sc 1568 dev/ic/osiop.c TAILQ_INSERT_HEAD(&sc->ready_list,
sc 1569 dev/ic/osiop.c sc->sc_nexus, chain);
sc 1570 dev/ic/osiop.c sc->sc_tinfo[periph->target].lubusy
sc 1572 dev/ic/osiop.c sc->sc_active--;
sc 1578 dev/ic/osiop.c TAILQ_FOREACH(acb, &sc->nexus_list, chain) {
sc 1584 dev/ic/osiop.c TAILQ_REMOVE(&sc->nexus_list, acb, chain);
sc 1585 dev/ic/osiop.c sc->sc_nexus = acb;
sc 1586 dev/ic/osiop.c sc->sc_flags |= acb->intstat;
sc 1588 dev/ic/osiop.c osiop_write_4(sc, OSIOP_DSA,
sc 1590 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SXFER,
sc 1591 dev/ic/osiop.c sc->sc_tinfo[reselid].sxfer);
sc 1592 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SBCL,
sc 1593 dev/ic/osiop.c sc->sc_tinfo[reselid].sbcl);
sc 1598 dev/ic/osiop.c sc->sc_dev.dv_xname, reselid,
sc 1599 dev/ic/osiop.c TAILQ_FIRST(&sc->nexus_list));
sc 1603 dev/ic/osiop.c osiop_write_4(sc, OSIOP_TEMP, 0);
sc 1604 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DCNTL,
sc 1605 dev/ic/osiop.c osiop_read_1(sc, OSIOP_DCNTL) | OSIOP_DCNTL_STD);
sc 1610 dev/ic/osiop.c u_int8_t ctest2 = osiop_read_1(sc, OSIOP_CTEST2);
sc 1617 dev/ic/osiop.c sc->sc_dev.dv_xname,
sc 1618 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SCNTL1), ctest2,
sc 1619 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SFBR), istat,
sc 1620 dev/ic/osiop.c osiop_read_1(sc, OSIOP_ISTAT));
sc 1623 dev/ic/osiop.c if (sc->sc_nexus == NULL) {
sc 1626 dev/ic/osiop.c sc->sc_dev.dv_xname);
sc 1628 dev/ic/osiop.c osiop_dump(sc);
sc 1634 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DCNTL,
sc 1635 dev/ic/osiop.c osiop_read_1(sc, OSIOP_DCNTL) | OSIOP_DCNTL_STD);
sc 1638 dev/ic/osiop.c target = sc->sc_nexus->xs->sc_link->target;
sc 1639 dev/ic/osiop.c osiop_write_4(sc, OSIOP_TEMP, 0);
sc 1640 dev/ic/osiop.c osiop_write_4(sc, OSIOP_DSA,
sc 1641 dev/ic/osiop.c dsdma->dm_segs[0].ds_addr + sc->sc_nexus->dsoffset);
sc 1642 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SXFER, sc->sc_tinfo[target].sxfer);
sc 1643 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SBCL, sc->sc_tinfo[target].sbcl);
sc 1644 dev/ic/osiop.c osiop_write_4(sc, OSIOP_DSP, scraddr + Ent_scripts);
sc 1651 dev/ic/osiop.c sc->sc_dev.dv_xname);
sc 1655 dev/ic/osiop.c "sfbr %x msg %x sbcl %x\n", sc->sc_dev.dv_xname,
sc 1656 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SFBR), ds->msgbuf[1],
sc 1657 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBCL));
sc 1659 dev/ic/osiop.c osiop_write_4(sc, OSIOP_DSP, scraddr + Ent_switch);
sc 1660 dev/ic/osiop.c bus_dmamap_sync(sc->sc_dmat, dsdma,
sc 1668 dev/ic/osiop.c "sbcl %x sbdl %x\n", sc->sc_dev.dv_xname,
sc 1669 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBCL),
sc 1670 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBDL));
sc 1671 dev/ic/osiop.c if (osiop_read_1(sc, OSIOP_SBCL) == 0xa7) {
sc 1673 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DCNTL,
sc 1674 dev/ic/osiop.c osiop_read_1(sc, OSIOP_DCNTL) | OSIOP_DCNTL_STD);
sc 1681 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBCL));
sc 1682 dev/ic/osiop.c osiop_reset(sc);
sc 1687 dev/ic/osiop.c printf("%s: SCSI Gross Error\n", sc->sc_dev.dv_xname);
sc 1689 dev/ic/osiop.c printf("%s: Parity Error\n", sc->sc_dev.dv_xname);
sc 1692 dev/ic/osiop.c sc->sc_dev.dv_xname);
sc 1702 dev/ic/osiop.c sc->sc_dsdma->dm_segs[0].ds_addr + acb->dsoffset,
sc 1703 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DSP),
sc 1704 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DBC));
sc 1708 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DSA),
sc 1709 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBCL),
sc 1711 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SFBR));
sc 1721 dev/ic/osiop.c osiop_reset(sc); /* hard reset */
sc 1729 dev/ic/osiop.c osiop_select(sc)
sc 1730 dev/ic/osiop.c struct osiop_softc *sc;
sc 1732 dev/ic/osiop.c struct osiop_acb *acb = sc->sc_nexus;
sc 1736 dev/ic/osiop.c printf("%s: select ", sc->sc_dev.dv_xname);
sc 1739 dev/ic/osiop.c if (acb->xsflags & SCSI_POLL || sc->sc_flags & OSIOP_NODMA) {
sc 1740 dev/ic/osiop.c sc->sc_flags |= OSIOP_INTSOFF;
sc 1741 dev/ic/osiop.c sc->sc_flags &= ~OSIOP_INTDEFER;
sc 1742 dev/ic/osiop.c if ((osiop_read_1(sc, OSIOP_ISTAT) & OSIOP_ISTAT_CON) == 0) {
sc 1743 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SIEN, 0);
sc 1744 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DIEN, 0);
sc 1747 dev/ic/osiop.c } else if ((sc->sc_flags & OSIOP_INTDEFER) == 0) {
sc 1748 dev/ic/osiop.c sc->sc_flags &= ~OSIOP_INTSOFF;
sc 1749 dev/ic/osiop.c if ((osiop_read_1(sc, OSIOP_ISTAT) & OSIOP_ISTAT_CON) == 0) {
sc 1750 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SIEN, sc->sc_sien);
sc 1751 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DIEN, sc->sc_dien);
sc 1759 dev/ic/osiop.c acb->ds->scsi_cmd.opcode, sc->sc_nexus->ds);
sc 1762 dev/ic/osiop.c osiop_start(sc);
sc 1772 dev/ic/osiop.c osiop_intr(sc)
sc 1773 dev/ic/osiop.c struct osiop_softc *sc;
sc 1780 dev/ic/osiop.c istat = sc->sc_istat;
sc 1787 dev/ic/osiop.c dstat = sc->sc_dstat;
sc 1788 dev/ic/osiop.c sstat0 = sc->sc_sstat0;
sc 1789 dev/ic/osiop.c sc->sc_istat = 0;
sc 1791 dev/ic/osiop.c if (!sc->sc_active) {
sc 1795 dev/ic/osiop.c sc->sc_dev.dv_xname, istat, dstat, sstat0, sc->sc_nexus,
sc 1796 dev/ic/osiop.c (sc->sc_nexus != NULL) ? sc->sc_nexus->ds->stat[0] : 0);
sc 1805 dev/ic/osiop.c sc->sc_dev.dv_xname,
sc 1807 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DSPS),
sc 1808 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBCL),
sc 1809 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DSP),
sc 1810 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DBC),
sc 1811 dev/ic/osiop.c (sc->sc_nexus != NULL) ? sc->sc_nexus->ds->stat[0] : 0,
sc 1812 dev/ic/osiop.c (sc->sc_nexus != NULL) ? sc->sc_nexus->ds->msgbuf[0] : 0);
sc 1815 dev/ic/osiop.c if (sc->sc_flags & OSIOP_INTDEFER) {
sc 1816 dev/ic/osiop.c sc->sc_flags &= ~(OSIOP_INTDEFER | OSIOP_INTSOFF);
sc 1817 dev/ic/osiop.c osiop_write_1(sc, OSIOP_SIEN, sc->sc_sien);
sc 1818 dev/ic/osiop.c osiop_write_1(sc, OSIOP_DIEN, sc->sc_dien);
sc 1820 dev/ic/osiop.c if (osiop_checkintr(sc, istat, dstat, sstat0, &status)) {
sc 1825 dev/ic/osiop.c if ((sc->sc_flags & (OSIOP_INTSOFF | OSIOP_INTDEFER)) !=
sc 1828 dev/ic/osiop.c if (osiop_read_1(sc, OSIOP_SBCL) & OSIOP_BSY) {
sc 1831 dev/ic/osiop.c periph = sc->sc_nexus->xs->sc_link;
sc 1834 dev/ic/osiop.c "%02x dsp +%x\n", sc->sc_dev.dv_xname,
sc 1836 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SBCL),
sc 1837 dev/ic/osiop.c osiop_read_1(sc, OSIOP_SFBR),
sc 1838 dev/ic/osiop.c osiop_read_1(sc, OSIOP_LCRC),
sc 1839 dev/ic/osiop.c osiop_read_4(sc, OSIOP_DSP) -
sc 1840 dev/ic/osiop.c sc->sc_scrdma->dm_segs[0].ds_addr);
sc 1843 dev/ic/osiop.c osiop_scsidone(sc->sc_nexus, status);
sc 1850 dev/ic/osiop.c osiop_update_xfer_mode(sc, target)
sc 1851 dev/ic/osiop.c struct osiop_softc *sc;
sc 1854 dev/ic/osiop.c struct osiop_tinfo *ti = &sc->sc_tinfo[target];
sc 1856 dev/ic/osiop.c printf("%s: target %d now using 8 bit ", sc->sc_dev.dv_xname, target);
sc 1861 dev/ic/osiop.c scsi_period_to_osiop(sc, target);
sc 1909 dev/ic/osiop.c scsi_period_to_osiop(sc, target)
sc 1910 dev/ic/osiop.c struct osiop_softc *sc;
sc 1918 dev/ic/osiop.c period = sc->sc_tinfo[target].period;
sc 1919 dev/ic/osiop.c offset = sc->sc_tinfo[target].offset;
sc 1937 dev/ic/osiop.c sxfer = (period * 4 - 1) / sc->sc_tcp[sbcl] - 3;
sc 1956 dev/ic/osiop.c sc->sc_tcp[sbcl] * ((sxfer >> 4) + 4));
sc 1960 dev/ic/osiop.c sc->sc_tinfo[target].sxfer = sxfer;
sc 1961 dev/ic/osiop.c sc->sc_tinfo[target].sbcl = sbcl;
sc 1975 dev/ic/osiop.c struct osiop_softc *sc = acb->sc;
sc 1983 dev/ic/osiop.c osiop_resetbus(sc);
sc 1986 dev/ic/osiop.c osiop_reset(sc);
sc 2038 dev/ic/osiop.c osiop_dump(sc)
sc 2039 dev/ic/osiop.c struct osiop_softc *sc;
sc 2049 dev/ic/osiop.c sc->sc_dev.dv_xname, sc, osiop_read_1(sc, OSIOP_ISTAT));
sc 2050 dev/ic/osiop.c if ((acb = TAILQ_FIRST(&sc->free_list)) != NULL) {
sc 2057 dev/ic/osiop.c if ((acb = TAILQ_FIRST(&sc->ready_list)) != NULL) {
sc 2064 dev/ic/osiop.c if ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) {
sc 2071 dev/ic/osiop.c if (sc->sc_nexus) {
sc 2073 dev/ic/osiop.c osiop_dump_acb(sc->sc_nexus);
sc 2076 dev/ic/osiop.c if (sc->sc_tinfo[i].cmds > 2) {
sc 2078 dev/ic/osiop.c i, sc->sc_tinfo[i].cmds,
sc 2079 dev/ic/osiop.c sc->sc_tinfo[i].dconns,
sc 2080 dev/ic/osiop.c sc->sc_tinfo[i].lubusy);
sc 64 dev/ic/osiopvar.h #define osiop_read_1(sc, reg) \
sc 65 dev/ic/osiopvar.h bus_space_read_1((sc)->sc_bst, (sc)->sc_reg, reg)
sc 66 dev/ic/osiopvar.h #define osiop_write_1(sc, reg, val) \
sc 67 dev/ic/osiopvar.h bus_space_write_1((sc)->sc_bst, (sc)->sc_reg, reg, val)
sc 69 dev/ic/osiopvar.h #define osiop_read_4(sc, reg) \
sc 70 dev/ic/osiopvar.h bus_space_read_4((sc)->sc_bst, (sc)->sc_reg, reg)
sc 71 dev/ic/osiopvar.h #define osiop_write_4(sc, reg, val) \
sc 72 dev/ic/osiopvar.h bus_space_write_4((sc)->sc_bst, (sc)->sc_reg, reg, val)
sc 144 dev/ic/osiopvar.h struct osiop_softc *sc; /* points back to our adapter */
sc 90 dev/ic/pcf8584.c pcfiic_init(struct pcfiic_softc *sc)
sc 93 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S1, PCF_CTRL_PIN);
sc 95 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S0, sc->sc_addr);
sc 98 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S1, PCF_CTRL_PIN|PCF_CTRL_ES1);
sc 99 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S0, sc->sc_clock);
sc 101 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S1, PCF_CTRL_IDLE);
sc 107 dev/ic/pcf8584.c pcfiic_attach(struct pcfiic_softc *sc, i2c_addr_t addr, u_int8_t clock,
sc 115 dev/ic/pcf8584.c sc->sc_regmap[PCF_S1] = PCF_S0;
sc 116 dev/ic/pcf8584.c sc->sc_regmap[PCF_S0] = PCF_S1;
sc 118 dev/ic/pcf8584.c sc->sc_regmap[PCF_S0] = PCF_S0;
sc 119 dev/ic/pcf8584.c sc->sc_regmap[PCF_S1] = PCF_S1;
sc 121 dev/ic/pcf8584.c sc->sc_clock = clock;
sc 122 dev/ic/pcf8584.c sc->sc_addr = addr;
sc 124 dev/ic/pcf8584.c pcfiic_init(sc);
sc 128 dev/ic/pcf8584.c if (sc->sc_master)
sc 129 dev/ic/pcf8584.c pcfiic_choose_bus(sc, 0);
sc 131 dev/ic/pcf8584.c rw_init(&sc->sc_lock, "iiclk");
sc 132 dev/ic/pcf8584.c sc->sc_i2c.ic_cookie = sc;
sc 133 dev/ic/pcf8584.c sc->sc_i2c.ic_acquire_bus = pcfiic_i2c_acquire_bus;
sc 134 dev/ic/pcf8584.c sc->sc_i2c.ic_release_bus = pcfiic_i2c_release_bus;
sc 135 dev/ic/pcf8584.c sc->sc_i2c.ic_exec = pcfiic_i2c_exec;
sc 139 dev/ic/pcf8584.c iba.iba_tag = &sc->sc_i2c;
sc 142 dev/ic/pcf8584.c config_found(&sc->sc_dev, &iba, iicbus_print);
sc 154 dev/ic/pcf8584.c struct pcfiic_softc *sc = arg;
sc 156 dev/ic/pcf8584.c if (cold || sc->sc_poll || (flags & I2C_F_POLL))
sc 159 dev/ic/pcf8584.c return (rw_enter(&sc->sc_lock, RW_WRITE | RW_INTR));
sc 165 dev/ic/pcf8584.c struct pcfiic_softc *sc = arg;
sc 167 dev/ic/pcf8584.c if (cold || sc->sc_poll || (flags & I2C_F_POLL))
sc 170 dev/ic/pcf8584.c rw_exit(&sc->sc_lock);
sc 177 dev/ic/pcf8584.c struct pcfiic_softc *sc = arg;
sc 182 dev/ic/pcf8584.c sc->sc_dev.dv_xname, op, addr, cmdlen, len, flags);
sc 185 dev/ic/pcf8584.c if (cold || sc->sc_poll)
sc 188 dev/ic/pcf8584.c if (sc->sc_master)
sc 189 dev/ic/pcf8584.c pcfiic_choose_bus(sc, addr >> 7);
sc 192 dev/ic/pcf8584.c if (pcfiic_xmit(sc, addr & 0x7f, cmdbuf, cmdlen) != 0)
sc 197 dev/ic/pcf8584.c ret = pcfiic_xmit(sc, addr & 0x7f, buf, len);
sc 199 dev/ic/pcf8584.c ret = pcfiic_recv(sc, addr & 0x7f, buf, len);
sc 205 dev/ic/pcf8584.c pcfiic_xmit(struct pcfiic_softc *sc, u_int8_t addr, const u_int8_t *buf,
sc 211 dev/ic/pcf8584.c if (pcfiic_wait_nBB(sc) != 0)
sc 214 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S0, addr << 1);
sc 215 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S1, PCF_CTRL_START);
sc 218 dev/ic/pcf8584.c if (pcfiic_wait_pin(sc, &r) != 0) {
sc 219 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S1, PCF_CTRL_STOP);
sc 229 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S0, buf[i]);
sc 231 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S1, PCF_CTRL_STOP);
sc 236 dev/ic/pcf8584.c pcfiic_recv(struct pcfiic_softc *sc, u_int8_t addr, u_int8_t *buf, size_t len)
sc 241 dev/ic/pcf8584.c if (pcfiic_wait_nBB(sc) != 0)
sc 244 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S0, (addr << 1) | 0x01);
sc 245 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S1, PCF_CTRL_START);
sc 248 dev/ic/pcf8584.c if (pcfiic_wait_pin(sc, &r) != 0) {
sc 249 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S1, PCF_CTRL_STOP);
sc 254 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S1, PCF_CTRL_STOP);
sc 259 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S1, PCF_CTRL_ESO);
sc 261 dev/ic/pcf8584.c pcfiic_write(sc, PCF_S1, PCF_CTRL_STOP);
sc 264 dev/ic/pcf8584.c r = pcfiic_read(sc, PCF_S0);
sc 272 dev/ic/pcf8584.c pcfiic_read(struct pcfiic_softc *sc, bus_size_t r)
sc 274 dev/ic/pcf8584.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, sc->sc_regmap[r], 1,
sc 276 dev/ic/pcf8584.c return (bus_space_read_1(sc->sc_iot, sc->sc_ioh, sc->sc_regmap[r]));
sc 280 dev/ic/pcf8584.c pcfiic_write(struct pcfiic_softc *sc, bus_size_t r, u_int8_t v)
sc 282 dev/ic/pcf8584.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, sc->sc_regmap[r], v);
sc 283 dev/ic/pcf8584.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, sc->sc_regmap[r], 1,
sc 288 dev/ic/pcf8584.c pcfiic_choose_bus(struct pcfiic_softc *sc, u_int8_t bus)
sc 290 dev/ic/pcf8584.c bus_space_write_1(sc->sc_iot, sc->sc_ioh2, 0, bus);
sc 291 dev/ic/pcf8584.c bus_space_barrier(sc->sc_iot, sc->sc_ioh2, 0, 1,
sc 296 dev/ic/pcf8584.c pcfiic_wait_nBB(struct pcfiic_softc *sc)
sc 301 dev/ic/pcf8584.c if (pcfiic_read(sc, PCF_S1) & PCF_STAT_nBB)
sc 309 dev/ic/pcf8584.c pcfiic_wait_pin(struct pcfiic_softc *sc, volatile u_int8_t *r)
sc 314 dev/ic/pcf8584.c *r = pcfiic_read(sc, PCF_S1);
sc 263 dev/ic/pckbc.c pckbc_attach_slot(sc, slot)
sc 264 dev/ic/pckbc.c struct pckbc_softc *sc;
sc 267 dev/ic/pckbc.c struct pckbc_internal *t = sc->id;
sc 273 dev/ic/pckbc.c found = (config_found_sm((struct device *)sc, &pa,
sc 287 dev/ic/pckbc.c pckbc_attach(sc)
sc 288 dev/ic/pckbc.c struct pckbc_softc *sc;
sc 296 dev/ic/pckbc.c t = sc->id;
sc 336 dev/ic/pckbc.c if (pckbc_attach_slot(sc, PCKBC_KBD_SLOT))
sc 343 dev/ic/pckbc.c if (pckbc_attach_slot(sc, PCKBC_KBD_SLOT))
sc 386 dev/ic/pckbc.c if (pckbc_attach_slot(sc, PCKBC_AUX_SLOT))
sc 899 dev/ic/pckbc.c struct pckbc_softc *sc = t->t_sc;
sc 904 dev/ic/pckbc.c (*sc->intr_establish)(sc, slot);
sc 906 dev/ic/pckbc.c sc->inputhandler[slot] = func;
sc 907 dev/ic/pckbc.c sc->inputarg[slot] = arg;
sc 908 dev/ic/pckbc.c sc->subname[slot] = name;
sc 931 dev/ic/pckbc.c struct pckbc_softc *sc = (struct pckbc_softc *)vsc;
sc 933 dev/ic/pckbc.c return (pckbcintr_internal(sc->id, sc));
sc 937 dev/ic/pckbc.c pckbcintr_internal(t, sc)
sc 939 dev/ic/pckbc.c struct pckbc_softc *sc;
sc 978 dev/ic/pckbc.c if (sc != NULL) {
sc 979 dev/ic/pckbc.c if (sc->inputhandler[slot])
sc 980 dev/ic/pckbc.c (*sc->inputhandler[slot])(sc->inputarg[slot],
sc 83 dev/ic/pdq_ifsubr.c pdq_softc_t *sc)
sc 85 dev/ic/pdq_ifsubr.c if (sc->sc_if.if_flags & IFF_UP) {
sc 86 dev/ic/pdq_ifsubr.c sc->sc_if.if_flags |= IFF_RUNNING;
sc 87 dev/ic/pdq_ifsubr.c if (sc->sc_if.if_flags & IFF_PROMISC) {
sc 88 dev/ic/pdq_ifsubr.c sc->sc_pdq->pdq_flags |= PDQ_PROMISC;
sc 90 dev/ic/pdq_ifsubr.c sc->sc_pdq->pdq_flags &= ~PDQ_PROMISC;
sc 92 dev/ic/pdq_ifsubr.c if (sc->sc_if.if_flags & IFF_ALLMULTI) {
sc 93 dev/ic/pdq_ifsubr.c sc->sc_pdq->pdq_flags |= PDQ_ALLMULTI;
sc 95 dev/ic/pdq_ifsubr.c sc->sc_pdq->pdq_flags &= ~PDQ_ALLMULTI;
sc 97 dev/ic/pdq_ifsubr.c if (sc->sc_if.if_flags & IFF_LINK1) {
sc 98 dev/ic/pdq_ifsubr.c sc->sc_pdq->pdq_flags |= PDQ_PASS_SMT;
sc 100 dev/ic/pdq_ifsubr.c sc->sc_pdq->pdq_flags &= ~PDQ_PASS_SMT;
sc 102 dev/ic/pdq_ifsubr.c sc->sc_pdq->pdq_flags |= PDQ_RUNNING;
sc 103 dev/ic/pdq_ifsubr.c pdq_run(sc->sc_pdq);
sc 105 dev/ic/pdq_ifsubr.c sc->sc_if.if_flags &= ~IFF_RUNNING;
sc 106 dev/ic/pdq_ifsubr.c sc->sc_pdq->pdq_flags &= ~PDQ_RUNNING;
sc 107 dev/ic/pdq_ifsubr.c pdq_stop(sc->sc_pdq);
sc 129 dev/ic/pdq_ifsubr.c pdq_softc_t *sc = (pdq_softc_t *) ((caddr_t) ifp - offsetof(pdq_softc_t, sc_arpcom.ac_if));
sc 136 dev/ic/pdq_ifsubr.c if (sc->sc_if.if_timer == 0)
sc 137 dev/ic/pdq_ifsubr.c sc->sc_if.if_timer = PDQ_OS_TX_TIMEOUT;
sc 139 dev/ic/pdq_ifsubr.c if ((sc->sc_pdq->pdq_flags & PDQ_TXOK) == 0) {
sc 140 dev/ic/pdq_ifsubr.c sc->sc_if.if_flags |= IFF_OACTIVE;
sc 148 dev/ic/pdq_ifsubr.c if (pdq_queue_transmit_data(sc->sc_pdq, m) == PDQ_FALSE) {
sc 156 dev/ic/pdq_ifsubr.c PDQ_DO_TYPE2_PRODUCER(sc->sc_pdq);
sc 165 dev/ic/pdq_ifsubr.c pdq_softc_t *sc = (pdq_softc_t *) pdq->pdq_os_ctx;
sc 168 dev/ic/pdq_ifsubr.c sc->sc_if.if_ipackets++;
sc 170 dev/ic/pdq_ifsubr.c if (sc->sc_bpf != NULL)
sc 171 dev/ic/pdq_ifsubr.c PDQ_BPF_MTAP(sc, m, BPF_DIRECTION_IN);
sc 181 dev/ic/pdq_ifsubr.c m->m_pkthdr.rcvif = &sc->sc_if;
sc 182 dev/ic/pdq_ifsubr.c fddi_input(&sc->sc_if, fh, m);
sc 189 dev/ic/pdq_ifsubr.c pdq_softc_t *sc = (pdq_softc_t *) pdq->pdq_os_ctx;
sc 190 dev/ic/pdq_ifsubr.c sc->sc_if.if_flags &= ~IFF_OACTIVE;
sc 191 dev/ic/pdq_ifsubr.c if (!IFQ_IS_EMPTY(&sc->sc_if.if_snd)) {
sc 192 dev/ic/pdq_ifsubr.c sc->sc_if.if_timer = PDQ_OS_TX_TIMEOUT;
sc 193 dev/ic/pdq_ifsubr.c pdq_ifstart(&sc->sc_if);
sc 195 dev/ic/pdq_ifsubr.c sc->sc_if.if_timer = 0;
sc 204 dev/ic/pdq_ifsubr.c pdq_softc_t *sc = (pdq_softc_t *) pdq->pdq_os_ctx;
sc 206 dev/ic/pdq_ifsubr.c if (sc->sc_bpf != NULL)
sc 207 dev/ic/pdq_ifsubr.c PDQ_BPF_MTAP(sc, m, BPF_DIRECTION_OUT);
sc 210 dev/ic/pdq_ifsubr.c sc->sc_if.if_opackets++;
sc 219 dev/ic/pdq_ifsubr.c pdq_softc_t *sc = (pdq_softc_t *) pdq->pdq_os_ctx;
sc 223 dev/ic/pdq_ifsubr.c ETHER_FIRST_MULTI(step, &sc->sc_arpcom, enm);
sc 240 dev/ic/pdq_ifsubr.c pdq_softc_t *sc = (pdq_softc_t *) ((caddr_t) ifp - offsetof(pdq_softc_t, sc_arpcom.ac_if));
sc 253 dev/ic/pdq_ifsubr.c pdq_ifinit(sc);
sc 254 dev/ic/pdq_ifsubr.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 267 dev/ic/pdq_ifsubr.c ina->x_host = *(union ns_host *)(sc->sc_arpcom.ac_enaddr);
sc 271 dev/ic/pdq_ifsubr.c (caddr_t)sc->sc_arpcom.ac_enaddr,
sc 272 dev/ic/pdq_ifsubr.c sizeof sc->sc_arpcom.ac_enaddr);
sc 275 dev/ic/pdq_ifsubr.c pdq_ifinit(sc);
sc 281 dev/ic/pdq_ifsubr.c pdq_ifinit(sc);
sc 289 dev/ic/pdq_ifsubr.c pdq_ifinit(sc);
sc 299 dev/ic/pdq_ifsubr.c error = ether_addmulti((struct ifreq *)data, &sc->sc_arpcom);
sc 301 dev/ic/pdq_ifsubr.c error = ether_delmulti((struct ifreq *)data, &sc->sc_arpcom);
sc 304 dev/ic/pdq_ifsubr.c if (sc->sc_if.if_flags & IFF_RUNNING)
sc 305 dev/ic/pdq_ifsubr.c pdq_run(sc->sc_pdq);
sc 327 dev/ic/pdq_ifsubr.c pdq_softc_t *sc,
sc 330 dev/ic/pdq_ifsubr.c struct ifnet *ifp = &sc->sc_if;
sc 348 dev/ic/pdq_ifsubr.c PDQ_BPFATTACH(sc, DLT_FDDI, sizeof(struct fddi_header));
sc 113 dev/ic/pdqvar.h #define PDQ_BPF_MTAP(sc, m, dir) bpf_mtap(&(sc)->sc_if, m, dir)
sc 114 dev/ic/pdqvar.h #define PDQ_BPFATTACH(sc, t, s) bpfattach(&(sc)->sc_if, t, s)
sc 158 dev/ic/pdqvar.h #define PDQ_BPF_MTAP(sc, m, dir) bpf_mtap((sc)->sc_bpf, m, dir)
sc 162 dev/ic/pdqvar.h #define PDQ_BPFATTACH(sc, t, s)bpfattach(&(sc)->sc_bpf, &(sc)->sc_if, t, s)
sc 227 dev/ic/pdqvar.h extern void pdq_ifreset(pdq_softc_t *sc);
sc 228 dev/ic/pdqvar.h extern void pdq_ifinit(pdq_softc_t *sc);
sc 232 dev/ic/pdqvar.h extern void pdq_ifattach(pdq_softc_t *sc, ifnet_ret_t (*ifwatchdog)(int unit));
sc 104 dev/ic/pgt.c if (pgt_oid_set(sc, oid, var, size) != 0) \
sc 192 dev/ic/pgt.c int pgt_dma_alloc_queue(struct pgt_softc *sc, enum pgt_queue pq);
sc 194 dev/ic/pgt.c void pgt_dma_free_queue(struct pgt_softc *sc, enum pgt_queue pq);
sc 199 dev/ic/pgt.c pgt_write_memory_barrier(struct pgt_softc *sc)
sc 201 dev/ic/pgt.c bus_space_barrier(sc->sc_iotag, sc->sc_iohandle, 0, 0,
sc 206 dev/ic/pgt.c pgt_read_4(struct pgt_softc *sc, uint16_t offset)
sc 208 dev/ic/pgt.c return (bus_space_read_4(sc->sc_iotag, sc->sc_iohandle, offset));
sc 212 dev/ic/pgt.c pgt_write_4(struct pgt_softc *sc, uint16_t offset, uint32_t value)
sc 214 dev/ic/pgt.c bus_space_write_4(sc->sc_iotag, sc->sc_iohandle, offset, value);
sc 222 dev/ic/pgt.c pgt_write_4_flush(struct pgt_softc *sc, uint16_t offset, uint32_t value)
sc 224 dev/ic/pgt.c bus_space_write_4(sc->sc_iotag, sc->sc_iohandle, offset, value);
sc 225 dev/ic/pgt.c (void)bus_space_read_4(sc->sc_iotag, sc->sc_iohandle, PGT_REG_INT_EN);
sc 232 dev/ic/pgt.c pgt_debug_events(struct pgt_softc *sc, const char *when)
sc 235 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_driver_curfrag[i]) - \
sc 236 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_device_curfrag[i])
sc 237 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_EVENTS)
sc 239 dev/ic/pgt.c sc->sc_dev.dv_xname, when, COUNT(0), COUNT(1), COUNT(2),
sc 245 dev/ic/pgt.c pgt_queue_frags_pending(struct pgt_softc *sc, enum pgt_queue pq)
sc 247 dev/ic/pgt.c return (letoh32(sc->sc_cb->pcb_driver_curfrag[pq]) -
sc 248 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_device_curfrag[pq]));
sc 252 dev/ic/pgt.c pgt_reinit_rx_desc_frag(struct pgt_softc *sc, struct pgt_desc *pd)
sc 258 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, pd->pd_dmam, 0, pd->pd_dmam->dm_mapsize,
sc 263 dev/ic/pgt.c pgt_load_tx_desc_frag(struct pgt_softc *sc, enum pgt_queue pq,
sc 268 dev/ic/pgt.c error = bus_dmamap_load(sc->sc_dmat, pd->pd_dmam, pd->pd_mem,
sc 272 dev/ic/pgt.c sc->sc_dev.dv_xname,
sc 281 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, pd->pd_dmam, 0, pd->pd_dmam->dm_mapsize,
sc 288 dev/ic/pgt.c pgt_unload_tx_desc_frag(struct pgt_softc *sc, struct pgt_desc *pd)
sc 290 dev/ic/pgt.c bus_dmamap_unload(sc->sc_dmat, pd->pd_dmam);
sc 295 dev/ic/pgt.c pgt_load_firmware(struct pgt_softc *sc)
sc 303 dev/ic/pgt.c if (sc->sc_flags & SC_ISL3877)
sc 312 dev/ic/pgt.c sc->sc_dev.dv_xname, error, name));
sc 318 dev/ic/pgt.c sc->sc_dev.dv_xname, size));
sc 323 dev/ic/pgt.c pgt_reboot(sc);
sc 330 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_DIR_MEM_BASE, reg);
sc 339 dev/ic/pgt.c pgt_write_4(sc, dirreg, uc[ucodeoff]);
sc 346 dev/ic/pgt.c pgt_write_4_flush(sc, dirreg, uc[ucodeoff]);
sc 354 dev/ic/pgt.c sc->sc_dev.dv_xname, fwoff, name));
sc 356 dev/ic/pgt.c reg = pgt_read_4(sc, PGT_REG_CTRL_STAT);
sc 359 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_CTRL_STAT, reg);
sc 360 dev/ic/pgt.c pgt_write_memory_barrier(sc);
sc 364 dev/ic/pgt.c pgt_write_4(sc, PGT_REG_CTRL_STAT, reg);
sc 365 dev/ic/pgt.c pgt_write_memory_barrier(sc);
sc 369 dev/ic/pgt.c pgt_write_4(sc, PGT_REG_CTRL_STAT, reg);
sc 370 dev/ic/pgt.c pgt_write_memory_barrier(sc);
sc 379 dev/ic/pgt.c pgt_cleanup_queue(struct pgt_softc *sc, enum pgt_queue pq,
sc 385 dev/ic/pgt.c sc->sc_cb->pcb_device_curfrag[pq] = 0;
sc 388 dev/ic/pgt.c TAILQ_FOREACH(pd, &sc->sc_freeq[pq], pd_link) {
sc 392 dev/ic/pgt.c pgt_reinit_rx_desc_frag(sc, pd);
sc 395 dev/ic/pgt.c sc->sc_freeq_count[pq] = i;
sc 402 dev/ic/pgt.c sc->sc_cb->pcb_driver_curfrag[pq] = htole32(i);
sc 404 dev/ic/pgt.c sc->sc_cb->pcb_driver_curfrag[pq] = 0;
sc 412 dev/ic/pgt.c pgt_reset(struct pgt_softc *sc)
sc 417 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_INT_EN, 0);
sc 424 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cbdmam, 0,
sc 425 dev/ic/pgt.c sc->sc_cbdmam->dm_mapsize,
sc 427 dev/ic/pgt.c pgt_cleanup_queue(sc, PGT_QUEUE_DATA_LOW_RX,
sc 428 dev/ic/pgt.c &sc->sc_cb->pcb_data_low_rx[0]);
sc 429 dev/ic/pgt.c pgt_cleanup_queue(sc, PGT_QUEUE_DATA_LOW_TX,
sc 430 dev/ic/pgt.c &sc->sc_cb->pcb_data_low_tx[0]);
sc 431 dev/ic/pgt.c pgt_cleanup_queue(sc, PGT_QUEUE_DATA_HIGH_RX,
sc 432 dev/ic/pgt.c &sc->sc_cb->pcb_data_high_rx[0]);
sc 433 dev/ic/pgt.c pgt_cleanup_queue(sc, PGT_QUEUE_DATA_HIGH_TX,
sc 434 dev/ic/pgt.c &sc->sc_cb->pcb_data_high_tx[0]);
sc 435 dev/ic/pgt.c pgt_cleanup_queue(sc, PGT_QUEUE_MGMT_RX,
sc 436 dev/ic/pgt.c &sc->sc_cb->pcb_mgmt_rx[0]);
sc 437 dev/ic/pgt.c pgt_cleanup_queue(sc, PGT_QUEUE_MGMT_TX,
sc 438 dev/ic/pgt.c &sc->sc_cb->pcb_mgmt_tx[0]);
sc 439 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cbdmam, 0,
sc 440 dev/ic/pgt.c sc->sc_cbdmam->dm_mapsize,
sc 444 dev/ic/pgt.c if (sc->sc_flags & SC_NEEDS_FIRMWARE) {
sc 445 dev/ic/pgt.c error = pgt_load_firmware(sc);
sc 448 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 451 dev/ic/pgt.c sc->sc_flags &= ~SC_NEEDS_FIRMWARE;
sc 452 dev/ic/pgt.c DPRINTF(("%s: firmware loaded\n", sc->sc_dev.dv_xname));
sc 456 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_CTRL_BLK_BASE,
sc 457 dev/ic/pgt.c htole32((uint32_t)sc->sc_cbdmam->dm_segs[0].ds_addr));
sc 461 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_DEV_INT, PGT_DEV_INT_RESET);
sc 465 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_INT_EN, PGT_INT_STAT_INIT);
sc 476 dev/ic/pgt.c pgt_stop(struct pgt_softc *sc, unsigned int flag)
sc 482 dev/ic/pgt.c ic = &sc->sc_ic;
sc 485 dev/ic/pgt.c sc->sc_flags |= SC_UNINITIALIZED;
sc 486 dev/ic/pgt.c sc->sc_flags |= flag;
sc 488 dev/ic/pgt.c pgt_drain_tx_queue(sc, PGT_QUEUE_DATA_LOW_TX);
sc 489 dev/ic/pgt.c pgt_drain_tx_queue(sc, PGT_QUEUE_DATA_HIGH_TX);
sc 490 dev/ic/pgt.c pgt_drain_tx_queue(sc, PGT_QUEUE_MGMT_TX);
sc 494 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_INT_EN, 0);
sc 498 dev/ic/pgt.c pgt_reboot(sc);
sc 507 dev/ic/pgt.c while (!TAILQ_EMPTY(&sc->sc_mgmtinprog)) {
sc 510 dev/ic/pgt.c pmd = TAILQ_FIRST(&sc->sc_mgmtinprog);
sc 511 dev/ic/pgt.c TAILQ_REMOVE(&sc->sc_mgmtinprog, pmd, pmd_link);
sc 514 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_MGMT)
sc 516 dev/ic/pgt.c "(drained)\n", sc->sc_dev.dv_xname,
sc 521 dev/ic/pgt.c if (flag == SC_NEEDS_RESET && sc->sc_flags & SC_DYING) {
sc 522 dev/ic/pgt.c sc->sc_flags &= ~flag;
sc 531 dev/ic/pgt.c DPRINTF(("%s: resetting\n", sc->sc_dev.dv_xname));
sc 532 dev/ic/pgt.c sc->sc_flags &= ~SC_POWERSAVE;
sc 533 dev/ic/pgt.c sc->sc_flags |= SC_NEEDS_FIRMWARE;
sc 534 dev/ic/pgt.c error = pgt_reset(sc);
sc 536 dev/ic/pgt.c tsleep(&sc->sc_flags, 0, "pgtres", hz);
sc 537 dev/ic/pgt.c if (sc->sc_flags & SC_UNINITIALIZED) {
sc 539 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 546 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_INT_EN,
sc 556 dev/ic/pgt.c sc->sc_flags &= ~flag;
sc 558 dev/ic/pgt.c pgt_update_hw_from_sw(sc,
sc 564 dev/ic/pgt.c ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1);
sc 570 dev/ic/pgt.c struct pgt_softc *sc = xsc;
sc 576 dev/ic/pgt.c sc->sc_debug |= SC_DEBUG_UNEXPECTED;
sc 580 dev/ic/pgt.c sc->sc_debug |= SC_DEBUG_TRAP;
sc 581 dev/ic/pgt.c sc->sc_debug |= SC_DEBUG_LINK;
sc 587 dev/ic/pgt.c if (sc->sc_enable != NULL)
sc 588 dev/ic/pgt.c (*sc->sc_enable)(sc);
sc 590 dev/ic/pgt.c error = pgt_dma_alloc(sc);
sc 594 dev/ic/pgt.c sc->sc_ic.ic_if.if_softc = sc;
sc 595 dev/ic/pgt.c TAILQ_INIT(&sc->sc_mgmtinprog);
sc 596 dev/ic/pgt.c TAILQ_INIT(&sc->sc_kthread.sck_traps);
sc 597 dev/ic/pgt.c sc->sc_flags |= SC_NEEDS_FIRMWARE | SC_UNINITIALIZED;
sc 598 dev/ic/pgt.c sc->sc_80211_ioc_auth = IEEE80211_AUTH_OPEN;
sc 600 dev/ic/pgt.c error = pgt_reset(sc);
sc 604 dev/ic/pgt.c tsleep(&sc->sc_flags, 0, "pgtres", hz);
sc 605 dev/ic/pgt.c if (sc->sc_flags & SC_UNINITIALIZED) {
sc 606 dev/ic/pgt.c printf("%s: not responding\n", sc->sc_dev.dv_xname);
sc 610 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_INT_EN, PGT_INT_STAT_SOURCES);
sc 614 dev/ic/pgt.c error = pgt_net_attach(sc);
sc 618 dev/ic/pgt.c if (kthread_create(pgt_per_device_kthread, sc, NULL,
sc 619 dev/ic/pgt.c sc->sc_dev.dv_xname) != 0)
sc 622 dev/ic/pgt.c ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1);
sc 626 dev/ic/pgt.c pgt_detach(struct pgt_softc *sc)
sc 628 dev/ic/pgt.c if (sc->sc_flags & SC_NEEDS_FIRMWARE || sc->sc_flags & SC_UNINITIALIZED)
sc 633 dev/ic/pgt.c pgt_stop(sc, SC_DYING);
sc 634 dev/ic/pgt.c pgt_reboot(sc);
sc 639 dev/ic/pgt.c if (sc->sc_shutdown_hook != NULL)
sc 640 dev/ic/pgt.c shutdownhook_disestablish(sc->sc_shutdown_hook);
sc 641 dev/ic/pgt.c if (sc->sc_power_hook != NULL)
sc 642 dev/ic/pgt.c powerhook_disestablish(sc->sc_power_hook);
sc 644 dev/ic/pgt.c ieee80211_ifdetach(&sc->sc_ic.ic_if);
sc 645 dev/ic/pgt.c if_detach(&sc->sc_ic.ic_if);
sc 649 dev/ic/pgt.c if (sc->sc_disable != NULL)
sc 650 dev/ic/pgt.c (*sc->sc_disable)(sc);
sc 652 dev/ic/pgt.c pgt_dma_free(sc);
sc 658 dev/ic/pgt.c pgt_reboot(struct pgt_softc *sc)
sc 662 dev/ic/pgt.c reg = pgt_read_4(sc, PGT_REG_CTRL_STAT);
sc 664 dev/ic/pgt.c pgt_write_4(sc, PGT_REG_CTRL_STAT, reg);
sc 665 dev/ic/pgt.c pgt_write_memory_barrier(sc);
sc 669 dev/ic/pgt.c pgt_write_4(sc, PGT_REG_CTRL_STAT, reg);
sc 670 dev/ic/pgt.c pgt_write_memory_barrier(sc);
sc 674 dev/ic/pgt.c pgt_write_4(sc, PGT_REG_CTRL_STAT, reg);
sc 675 dev/ic/pgt.c pgt_write_memory_barrier(sc);
sc 680 dev/ic/pgt.c pgt_init_intr(struct pgt_softc *sc)
sc 682 dev/ic/pgt.c if ((sc->sc_flags & SC_UNINITIALIZED) == 0) {
sc 683 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 685 dev/ic/pgt.c sc->sc_dev.dv_xname));
sc 687 dev/ic/pgt.c sc->sc_flags &= ~SC_UNINITIALIZED;
sc 688 dev/ic/pgt.c wakeup(&sc->sc_flags);
sc 697 dev/ic/pgt.c pgt_update_intr(struct pgt_softc *sc, int hack)
sc 710 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cbdmam, 0,
sc 711 dev/ic/pgt.c sc->sc_cbdmam->dm_mapsize,
sc 713 dev/ic/pgt.c pgt_debug_events(sc, "intr");
sc 721 dev/ic/pgt.c qdirty = sc->sc_dirtyq_count[pqs[i]];
sc 722 dev/ic/pgt.c qfree = sc->sc_freeq_count[pqs[i]];
sc 735 dev/ic/pgt.c npend = pgt_queue_frags_pending(sc, pqs[i]);
sc 741 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 744 dev/ic/pgt.c sc->sc_dev.dv_xname, pqs[i],
sc 746 dev/ic/pgt.c sc->sc_flags |= SC_INTR_RESET;
sc 750 dev/ic/pgt.c pgt_rxdone(sc, pqs[i]);
sc 752 dev/ic/pgt.c npend = pgt_queue_frags_pending(sc, pqs[i]);
sc 754 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 757 dev/ic/pgt.c sc->sc_dev.dv_xname, pqs[i],
sc 759 dev/ic/pgt.c sc->sc_flags |= SC_INTR_RESET;
sc 768 dev/ic/pgt.c sc->sc_ic.ic_if.if_timer = 0;
sc 769 dev/ic/pgt.c sc->sc_ic.ic_if.if_flags &=
sc 773 dev/ic/pgt.c pgt_txdone(sc, pqs[i]);
sc 782 dev/ic/pgt.c dirtycount = sc->sc_dirtyq_count[PGT_QUEUE_MGMT_RX];
sc 783 dev/ic/pgt.c while (!TAILQ_EMPTY(&sc->sc_dirtyq[PGT_QUEUE_MGMT_RX])) {
sc 786 dev/ic/pgt.c pmd = TAILQ_FIRST(&sc->sc_mgmtinprog);
sc 792 dev/ic/pgt.c pgt_mgmtrx_completion(sc, pmd);
sc 794 dev/ic/pgt.c sc->sc_cb->pcb_driver_curfrag[PGT_QUEUE_MGMT_RX] =
sc 796 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_driver_curfrag[PGT_QUEUE_MGMT_RX]));
sc 798 dev/ic/pgt.c dirtycount = sc->sc_dirtyq_count[PGT_QUEUE_DATA_HIGH_RX];
sc 799 dev/ic/pgt.c while (!TAILQ_EMPTY(&sc->sc_dirtyq[PGT_QUEUE_DATA_HIGH_RX])) {
sc 800 dev/ic/pgt.c if ((m = pgt_datarx_completion(sc, PGT_QUEUE_DATA_HIGH_RX)))
sc 801 dev/ic/pgt.c pgt_input_frames(sc, m);
sc 803 dev/ic/pgt.c sc->sc_cb->pcb_driver_curfrag[PGT_QUEUE_DATA_HIGH_RX] =
sc 805 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_driver_curfrag[PGT_QUEUE_DATA_HIGH_RX]));
sc 807 dev/ic/pgt.c dirtycount = sc->sc_dirtyq_count[PGT_QUEUE_DATA_LOW_RX];
sc 808 dev/ic/pgt.c while (!TAILQ_EMPTY(&sc->sc_dirtyq[PGT_QUEUE_DATA_LOW_RX])) {
sc 809 dev/ic/pgt.c if ((m = pgt_datarx_completion(sc, PGT_QUEUE_DATA_LOW_RX)))
sc 810 dev/ic/pgt.c pgt_input_frames(sc, m);
sc 812 dev/ic/pgt.c sc->sc_cb->pcb_driver_curfrag[PGT_QUEUE_DATA_LOW_RX] =
sc 814 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_driver_curfrag[PGT_QUEUE_DATA_LOW_RX]));
sc 819 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cbdmam, 0,
sc 820 dev/ic/pgt.c sc->sc_cbdmam->dm_mapsize,
sc 825 dev/ic/pgt.c pgt_ieee80211_encap(struct pgt_softc *sc, struct ether_header *eh,
sc 832 dev/ic/pgt.c ic = &sc->sc_ic;
sc 911 dev/ic/pgt.c pgt_input_frames(struct pgt_softc *sc, struct mbuf *m)
sc 925 dev/ic/pgt.c ic = &sc->sc_ic;
sc 935 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 938 dev/ic/pgt.c sc->sc_dev.dv_xname));
sc 951 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 953 dev/ic/pgt.c sc->sc_dev.dv_xname));
sc 960 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_RXANNEX)
sc 964 dev/ic/pgt.c sc->sc_dev.dv_xname,
sc 972 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_RXETHER)
sc 974 dev/ic/pgt.c sc->sc_dev.dv_xname,
sc 1012 dev/ic/pgt.c m = pgt_ieee80211_encap(sc, &eh, m, &ni);
sc 1015 dev/ic/pgt.c if (sc->sc_drvbpf != NULL) {
sc 1017 dev/ic/pgt.c struct pgt_rx_radiotap_hdr *tap = &sc->sc_rxtap;
sc 1026 dev/ic/pgt.c mb.m_len = sc->sc_rxtap_len;
sc 1031 dev/ic/pgt.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
sc 1045 dev/ic/pgt.c ieee80211_release_node(&sc->sc_ic, ni);
sc 1053 dev/ic/pgt.c pgt_wakeup_intr(struct pgt_softc *sc)
sc 1060 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cbdmam, 0,
sc 1061 dev/ic/pgt.c sc->sc_cbdmam->dm_mapsize,
sc 1065 dev/ic/pgt.c shouldupdate = pgt_queue_frags_pending(sc, i);
sc 1067 dev/ic/pgt.c shouldupdate = pgt_queue_frags_pending(sc, i) <
sc 1068 dev/ic/pgt.c sc->sc_freeq_count[i];
sc 1070 dev/ic/pgt.c if (!TAILQ_EMPTY(&sc->sc_mgmtinprog))
sc 1072 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_POWER)
sc 1074 dev/ic/pgt.c sc->sc_dev.dv_xname, shouldupdate));
sc 1075 dev/ic/pgt.c sc->sc_flags &= ~SC_POWERSAVE;
sc 1077 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_DEV_INT, PGT_DEV_INT_UPDATE);
sc 1083 dev/ic/pgt.c pgt_sleep_intr(struct pgt_softc *sc)
sc 1090 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cbdmam, 0,
sc 1091 dev/ic/pgt.c sc->sc_cbdmam->dm_mapsize,
sc 1095 dev/ic/pgt.c allowed = pgt_queue_frags_pending(sc, i) == 0;
sc 1097 dev/ic/pgt.c allowed = pgt_queue_frags_pending(sc, i) >=
sc 1098 dev/ic/pgt.c sc->sc_freeq_count[i];
sc 1100 dev/ic/pgt.c if (!TAILQ_EMPTY(&sc->sc_mgmtinprog))
sc 1102 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_POWER)
sc 1104 dev/ic/pgt.c sc->sc_dev.dv_xname, allowed));
sc 1105 dev/ic/pgt.c if (allowed && sc->sc_ic.ic_flags & IEEE80211_F_PMGTON) {
sc 1106 dev/ic/pgt.c sc->sc_flags |= SC_POWERSAVE;
sc 1107 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_DEV_INT, PGT_DEV_INT_SLEEP);
sc 1129 dev/ic/pgt.c struct pgt_softc *sc;
sc 1135 dev/ic/pgt.c sc = argp;
sc 1136 dev/ic/pgt.c sck = &sc->sc_kthread;
sc 1140 dev/ic/pgt.c tsleep(&sc->sc_kthread, 0, "pgtkth", 0);
sc 1143 dev/ic/pgt.c sc->sc_dev.dv_xname));
sc 1148 dev/ic/pgt.c pgt_stop(sc, SC_NEEDS_RESET);
sc 1152 dev/ic/pgt.c sc->sc_dev.dv_xname));
sc 1157 dev/ic/pgt.c pgt_update_sw_from_hw(sc, pa, m);
sc 1161 dev/ic/pgt.c pgt_update_sw_from_hw(sc, NULL, NULL);
sc 1169 dev/ic/pgt.c pgt_async_reset(struct pgt_softc *sc)
sc 1171 dev/ic/pgt.c if (sc->sc_flags & (SC_DYING | SC_NEEDS_RESET))
sc 1173 dev/ic/pgt.c sc->sc_kthread.sck_reset = 1;
sc 1174 dev/ic/pgt.c wakeup(&sc->sc_kthread);
sc 1178 dev/ic/pgt.c pgt_async_update(struct pgt_softc *sc)
sc 1180 dev/ic/pgt.c if (sc->sc_flags & SC_DYING)
sc 1182 dev/ic/pgt.c sc->sc_kthread.sck_update = 1;
sc 1183 dev/ic/pgt.c wakeup(&sc->sc_kthread);
sc 1189 dev/ic/pgt.c struct pgt_softc *sc;
sc 1193 dev/ic/pgt.c sc = arg;
sc 1194 dev/ic/pgt.c ifp = &sc->sc_ic.ic_if;
sc 1203 dev/ic/pgt.c if (sc->sc_ic.ic_flags & IEEE80211_F_PMGTON &&
sc 1204 dev/ic/pgt.c sc->sc_flags & SC_POWERSAVE) {
sc 1208 dev/ic/pgt.c reg = pgt_read_4(sc, PGT_REG_CTRL_STAT);
sc 1212 dev/ic/pgt.c reg = pgt_read_4(sc, PGT_REG_INT_STAT);
sc 1216 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_INT_ACK, reg);
sc 1218 dev/ic/pgt.c pgt_init_intr(sc);
sc 1220 dev/ic/pgt.c pgt_update_intr(sc, 0);
sc 1224 dev/ic/pgt.c sc->sc_flags &= ~SC_POWERSAVE;
sc 1231 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_DEV_INT, PGT_DEV_INT_UPDATE);
sc 1235 dev/ic/pgt.c pgt_sleep_intr(sc);
sc 1237 dev/ic/pgt.c pgt_wakeup_intr(sc);
sc 1239 dev/ic/pgt.c if (sc->sc_flags & SC_INTR_RESET) {
sc 1240 dev/ic/pgt.c sc->sc_flags &= ~SC_INTR_RESET;
sc 1241 dev/ic/pgt.c pgt_async_reset(sc);
sc 1244 dev/ic/pgt.c if (reg & ~PGT_INT_STAT_SOURCES && sc->sc_debug & SC_DEBUG_UNEXPECTED) {
sc 1246 dev/ic/pgt.c sc->sc_dev.dv_xname,
sc 1248 dev/ic/pgt.c pgt_read_4(sc, PGT_REG_CTRL_STAT)));
sc 1258 dev/ic/pgt.c pgt_txdone(struct pgt_softc *sc, enum pgt_queue pq)
sc 1262 dev/ic/pgt.c pd = TAILQ_FIRST(&sc->sc_dirtyq[pq]);
sc 1263 dev/ic/pgt.c TAILQ_REMOVE(&sc->sc_dirtyq[pq], pd, pd_link);
sc 1264 dev/ic/pgt.c sc->sc_dirtyq_count[pq]--;
sc 1265 dev/ic/pgt.c TAILQ_INSERT_TAIL(&sc->sc_freeq[pq], pd, pd_link);
sc 1266 dev/ic/pgt.c sc->sc_freeq_count[pq]++;
sc 1267 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, pd->pd_dmam, 0,
sc 1271 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_QUEUES) {
sc 1273 dev/ic/pgt.c sc->sc_dev.dv_xname, pd->pd_fragnum, pq));
sc 1274 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_MGMT && pgt_queue_is_mgmt(pq)) {
sc 1280 dev/ic/pgt.c sc->sc_dev.dv_xname,
sc 1285 dev/ic/pgt.c pgt_unload_tx_desc_frag(sc, pd);
sc 1289 dev/ic/pgt.c pgt_rxdone(struct pgt_softc *sc, enum pgt_queue pq)
sc 1293 dev/ic/pgt.c pd = TAILQ_FIRST(&sc->sc_freeq[pq]);
sc 1294 dev/ic/pgt.c TAILQ_REMOVE(&sc->sc_freeq[pq], pd, pd_link);
sc 1295 dev/ic/pgt.c sc->sc_freeq_count[pq]--;
sc 1296 dev/ic/pgt.c TAILQ_INSERT_TAIL(&sc->sc_dirtyq[pq], pd, pd_link);
sc 1297 dev/ic/pgt.c sc->sc_dirtyq_count[pq]++;
sc 1298 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, pd->pd_dmam, 0,
sc 1301 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_QUEUES)
sc 1303 dev/ic/pgt.c sc->sc_dev.dv_xname, pd->pd_fragnum, pq));
sc 1304 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED &&
sc 1307 dev/ic/pgt.c sc->sc_dev.dv_xname, pq, letoh16(pd->pd_fragp->pf_flags)));
sc 1317 dev/ic/pgt.c pgt_trap_received(struct pgt_softc *sc, uint32_t oid, void *trapdata,
sc 1325 dev/ic/pgt.c if (sc->sc_flags & SC_DYING)
sc 1353 dev/ic/pgt.c TAILQ_INSERT_TAIL(&sc->sc_kthread.sck_traps, pa, pa_link);
sc 1354 dev/ic/pgt.c wakeup(&sc->sc_kthread);
sc 1362 dev/ic/pgt.c pgt_mgmtrx_completion(struct pgt_softc *sc, struct pgt_mgmt_desc *pmd)
sc 1368 dev/ic/pgt.c pd = TAILQ_FIRST(&sc->sc_dirtyq[PGT_QUEUE_MGMT_RX]);
sc 1369 dev/ic/pgt.c TAILQ_REMOVE(&sc->sc_dirtyq[PGT_QUEUE_MGMT_RX], pd, pd_link);
sc 1370 dev/ic/pgt.c sc->sc_dirtyq_count[PGT_QUEUE_MGMT_RX]--;
sc 1371 dev/ic/pgt.c TAILQ_INSERT_TAIL(&sc->sc_freeq[PGT_QUEUE_MGMT_RX],
sc 1373 dev/ic/pgt.c sc->sc_freeq_count[PGT_QUEUE_MGMT_RX]++;
sc 1375 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 1377 dev/ic/pgt.c sc->sc_dev.dv_xname,
sc 1383 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 1385 dev/ic/pgt.c sc->sc_dev.dv_xname, pmf->pmf_version));
sc 1389 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 1391 dev/ic/pgt.c sc->sc_dev.dv_xname, pmf->pmf_device));
sc 1395 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 1397 dev/ic/pgt.c sc->sc_dev.dv_xname,
sc 1411 dev/ic/pgt.c sc->sc_dev.dv_xname,
sc 1413 dev/ic/pgt.c pgt_trap_received(sc, oid, (char *)pmf + sizeof(*pmf),
sc 1418 dev/ic/pgt.c if (sc->sc_debug & (SC_DEBUG_UNEXPECTED | SC_DEBUG_MGMT))
sc 1420 dev/ic/pgt.c "(op %u, oid %#x, len %u)\n", sc->sc_dev.dv_xname,
sc 1432 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 1434 dev/ic/pgt.c sc->sc_dev.dv_xname, pmf->pmf_operation));
sc 1439 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 1441 dev/ic/pgt.c sc->sc_dev.dv_xname, pmd->pmd_oid, oid));
sc 1446 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 1448 dev/ic/pgt.c sc->sc_dev.dv_xname, oid, size));
sc 1461 dev/ic/pgt.c TAILQ_REMOVE(&sc->sc_mgmtinprog, pmd, pmd_link);
sc 1463 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_MGMT)
sc 1465 dev/ic/pgt.c sc->sc_dev.dv_xname, pmd, pmf->pmf_operation,
sc 1468 dev/ic/pgt.c pgt_reinit_rx_desc_frag(sc, pd);
sc 1477 dev/ic/pgt.c pgt_datarx_completion(struct pgt_softc *sc, enum pgt_queue pq)
sc 1486 dev/ic/pgt.c ifp = &sc->sc_ic.ic_if;
sc 1491 dev/ic/pgt.c while ((pd = TAILQ_FIRST(&sc->sc_dirtyq[pq])) != NULL) {
sc 1492 dev/ic/pgt.c TAILQ_REMOVE(&sc->sc_dirtyq[pq], pd, pd_link);
sc 1493 dev/ic/pgt.c sc->sc_dirtyq_count[pq]--;
sc 1498 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_RXFRAG)
sc 1500 dev/ic/pgt.c sc->sc_dev.dv_xname, datalen, dataoff,
sc 1505 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 1507 dev/ic/pgt.c sc->sc_dev.dv_xname, datalen));
sc 1532 dev/ic/pgt.c TAILQ_INSERT_TAIL(&sc->sc_freeq[pq], pd, pd_link);
sc 1533 dev/ic/pgt.c sc->sc_freeq_count[pq]++;
sc 1534 dev/ic/pgt.c pgt_reinit_rx_desc_frag(sc, pd);
sc 1548 dev/ic/pgt.c TAILQ_INSERT_TAIL(&sc->sc_freeq[pq], pd, pd_link);
sc 1549 dev/ic/pgt.c sc->sc_freeq_count[pq]++;
sc 1550 dev/ic/pgt.c pgt_reinit_rx_desc_frag(sc, pd);
sc 1559 dev/ic/pgt.c pgt_oid_get(struct pgt_softc *sc, enum pgt_oid oid,
sc 1570 dev/ic/pgt.c error = pgt_mgmt_request(sc, &pmd);
sc 1573 dev/ic/pgt.c if (error != 0 && error != EPERM && sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 1575 dev/ic/pgt.c sc->sc_dev.dv_xname, oid, error));
sc 1581 dev/ic/pgt.c pgt_oid_retrieve(struct pgt_softc *sc, enum pgt_oid oid,
sc 1593 dev/ic/pgt.c error = pgt_mgmt_request(sc, &pmd);
sc 1596 dev/ic/pgt.c if (error != 0 && error != EPERM && sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 1598 dev/ic/pgt.c sc->sc_dev.dv_xname, oid, error));
sc 1604 dev/ic/pgt.c pgt_oid_set(struct pgt_softc *sc, enum pgt_oid oid,
sc 1615 dev/ic/pgt.c error = pgt_mgmt_request(sc, &pmd);
sc 1618 dev/ic/pgt.c if (error != 0 && error != EPERM && sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 1620 dev/ic/pgt.c sc->sc_dev.dv_xname, oid, error));
sc 1626 dev/ic/pgt.c pgt_state_dump(struct pgt_softc *sc)
sc 1629 dev/ic/pgt.c sc->sc_dev.dv_xname,
sc 1630 dev/ic/pgt.c pgt_read_4(sc, PGT_REG_CTRL_STAT),
sc 1631 dev/ic/pgt.c pgt_read_4(sc, PGT_REG_INT_STAT));
sc 1634 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 1637 dev/ic/pgt.c sc->sc_dev.dv_xname,
sc 1638 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_driver_curfrag[0]),
sc 1639 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_driver_curfrag[1]),
sc 1640 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_driver_curfrag[2]),
sc 1641 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_driver_curfrag[3]),
sc 1642 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_driver_curfrag[4]),
sc 1643 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_driver_curfrag[5]));
sc 1646 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 1649 dev/ic/pgt.c sc->sc_dev.dv_xname,
sc 1650 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_device_curfrag[0]),
sc 1651 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_device_curfrag[1]),
sc 1652 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_device_curfrag[2]),
sc 1653 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_device_curfrag[3]),
sc 1654 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_device_curfrag[4]),
sc 1655 dev/ic/pgt.c letoh32(sc->sc_cb->pcb_device_curfrag[5]));
sc 1659 dev/ic/pgt.c pgt_mgmt_request(struct pgt_softc *sc, struct pgt_mgmt_desc *pmd)
sc 1665 dev/ic/pgt.c if (sc->sc_flags & (SC_DYING | SC_NEEDS_RESET))
sc 1669 dev/ic/pgt.c pd = TAILQ_FIRST(&sc->sc_freeq[PGT_QUEUE_MGMT_TX]);
sc 1672 dev/ic/pgt.c error = pgt_load_tx_desc_frag(sc, PGT_QUEUE_MGMT_TX, pd);
sc 1693 dev/ic/pgt.c TAILQ_INSERT_TAIL(&sc->sc_mgmtinprog, pmd, pmd_link);
sc 1694 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_MGMT)
sc 1696 dev/ic/pgt.c sc->sc_dev.dv_xname,
sc 1699 dev/ic/pgt.c pgt_desc_transmit(sc, PGT_QUEUE_MGMT_TX, pd,
sc 1715 dev/ic/pgt.c if (sc->sc_flags & (SC_DYING | SC_NEEDS_RESET)) {
sc 1717 dev/ic/pgt.c TAILQ_REMOVE(&sc->sc_mgmtinprog, pmd, pmd_link);
sc 1721 dev/ic/pgt.c pgt_maybe_trigger(sc, PGT_QUEUE_MGMT_RX);
sc 1723 dev/ic/pgt.c pgt_update_intr(sc, 0);
sc 1730 dev/ic/pgt.c sc->sc_dev.dv_xname, pmd->pmd_oid);
sc 1731 dev/ic/pgt.c TAILQ_REMOVE(&sc->sc_mgmtinprog, pmd, pmd_link);
sc 1732 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 1733 dev/ic/pgt.c pgt_state_dump(sc);
sc 1734 dev/ic/pgt.c pgt_async_reset(sc);
sc 1743 dev/ic/pgt.c pgt_desc_transmit(struct pgt_softc *sc, enum pgt_queue pq, struct pgt_desc *pd,
sc 1746 dev/ic/pgt.c TAILQ_REMOVE(&sc->sc_freeq[pq], pd, pd_link);
sc 1747 dev/ic/pgt.c sc->sc_freeq_count[pq]--;
sc 1748 dev/ic/pgt.c TAILQ_INSERT_TAIL(&sc->sc_dirtyq[pq], pd, pd_link);
sc 1749 dev/ic/pgt.c sc->sc_dirtyq_count[pq]++;
sc 1750 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_QUEUES)
sc 1751 dev/ic/pgt.c DPRINTF(("%s: queue: tx %u -> [%u]\n", sc->sc_dev.dv_xname,
sc 1753 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cbdmam, 0,
sc 1754 dev/ic/pgt.c sc->sc_cbdmam->dm_mapsize,
sc 1759 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, pd->pd_dmam, 0,
sc 1762 dev/ic/pgt.c sc->sc_cb->pcb_driver_curfrag[pq] =
sc 1763 dev/ic/pgt.c htole32(letoh32(sc->sc_cb->pcb_driver_curfrag[pq]) + 1);
sc 1764 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cbdmam, 0,
sc 1765 dev/ic/pgt.c sc->sc_cbdmam->dm_mapsize,
sc 1768 dev/ic/pgt.c pgt_maybe_trigger(sc, pq);
sc 1772 dev/ic/pgt.c pgt_maybe_trigger(struct pgt_softc *sc, enum pgt_queue pq)
sc 1777 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_TRIGGER)
sc 1779 dev/ic/pgt.c sc->sc_dev.dv_xname, pq));
sc 1780 dev/ic/pgt.c pgt_debug_events(sc, "trig");
sc 1781 dev/ic/pgt.c if (sc->sc_flags & SC_POWERSAVE) {
sc 1783 dev/ic/pgt.c if (pgt_read_4(sc, PGT_REG_INT_STAT) == 0xabadface) {
sc 1785 dev/ic/pgt.c reg = pgt_read_4(sc, PGT_REG_CTRL_STAT);
sc 1790 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 1793 dev/ic/pgt.c sc->sc_dev.dv_xname));
sc 1794 dev/ic/pgt.c pgt_async_reset(sc);
sc 1798 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_DEV_INT,
sc 1802 dev/ic/pgt.c (void)pgt_read_4(sc, PGT_REG_CTRL_STAT);
sc 1805 dev/ic/pgt.c pgt_write_4_flush(sc, PGT_REG_DEV_INT, PGT_DEV_INT_UPDATE);
sc 1859 dev/ic/pgt.c pgt_net_attach(struct pgt_softc *sc)
sc 1861 dev/ic/pgt.c struct ieee80211com *ic = &sc->sc_ic;
sc 1872 dev/ic/pgt.c psbuffer.pob_addr = htole32(sc->sc_psmdmam->dm_segs[0].ds_addr);
sc 1873 dev/ic/pgt.c error = pgt_oid_set(sc, PGT_OID_PSM_BUFFER, &psbuffer, sizeof(country));
sc 1876 dev/ic/pgt.c error = pgt_oid_get(sc, PGT_OID_PHY, &phymode, sizeof(phymode));
sc 1879 dev/ic/pgt.c error = pgt_oid_get(sc, PGT_OID_MAC_ADDRESS, ic->ic_myaddr,
sc 1883 dev/ic/pgt.c error = pgt_oid_get(sc, PGT_OID_COUNTRY, &country, sizeof(country));
sc 1887 dev/ic/pgt.c ifp->if_softc = sc;
sc 1893 dev/ic/pgt.c strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 1906 dev/ic/pgt.c error = pgt_oid_get(sc, PGT_OID_SUPPORTED_FREQUENCIES, freqs, j);
sc 1918 dev/ic/pgt.c sc->sc_dev.dv_xname, chan);
sc 1947 dev/ic/pgt.c sc->sc_dev.dv_xname, chan,
sc 1952 dev/ic/pgt.c printf("%s: no channels found\n", sc->sc_dev.dv_xname);
sc 1960 dev/ic/pgt.c error = pgt_oid_get(sc, PGT_OID_SUPPORTED_RATES, rates, sizeof(rates));
sc 1999 dev/ic/pgt.c sc->sc_newstate = ic->ic_newstate;
sc 2012 dev/ic/pgt.c bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
sc 2015 dev/ic/pgt.c sc->sc_rxtap_len = sizeof(sc->sc_rxtapu);
sc 2016 dev/ic/pgt.c sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
sc 2017 dev/ic/pgt.c sc->sc_rxtap.wr_ihdr.it_present = htole32(PGT_RX_RADIOTAP_PRESENT);
sc 2019 dev/ic/pgt.c sc->sc_txtap_len = sizeof(sc->sc_txtapu);
sc 2020 dev/ic/pgt.c sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
sc 2021 dev/ic/pgt.c sc->sc_txtap.wt_ihdr.it_present = htole32(PGT_TX_RADIOTAP_PRESENT);
sc 2027 dev/ic/pgt.c sc->sc_shutdown_hook = shutdownhook_establish(pgt_shutdown, sc);
sc 2028 dev/ic/pgt.c if (sc->sc_shutdown_hook == NULL)
sc 2030 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 2031 dev/ic/pgt.c sc->sc_power_hook = powerhook_establish(pgt_power, sc);
sc 2032 dev/ic/pgt.c if (sc->sc_power_hook == NULL)
sc 2034 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 2042 dev/ic/pgt.c struct pgt_softc *sc = ifp->if_softc;
sc 2047 dev/ic/pgt.c pgt_update_hw_from_sw(sc, 0, 0);
sc 2057 dev/ic/pgt.c struct pgt_softc *sc = ifp->if_softc;
sc 2058 dev/ic/pgt.c struct ieee80211com *ic = &sc->sc_ic;
sc 2074 dev/ic/pgt.c if (pgt_oid_get(sc, PGT_OID_LINK_STATE, &rate, sizeof(rate)))
sc 2077 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_LINK) {
sc 2079 dev/ic/pgt.c sc->sc_dev.dv_xname, __func__, rate));
sc 2122 dev/ic/pgt.c struct pgt_softc *sc;
sc 2128 dev/ic/pgt.c sc = ifp->if_softc;
sc 2129 dev/ic/pgt.c ic = &sc->sc_ic;
sc 2131 dev/ic/pgt.c if (sc->sc_flags & (SC_DYING | SC_NEEDS_RESET) ||
sc 2142 dev/ic/pgt.c for (; sc->sc_dirtyq_count[PGT_QUEUE_DATA_LOW_TX] <
sc 2144 dev/ic/pgt.c pd = TAILQ_FIRST(&sc->sc_freeq[PGT_QUEUE_DATA_LOW_TX]);
sc 2149 dev/ic/pgt.c error = pgt_load_tx_desc_frag(sc,
sc 2155 dev/ic/pgt.c pgt_desc_transmit(sc, PGT_QUEUE_DATA_LOW_TX,
sc 2166 dev/ic/pgt.c if (sc->sc_dirtyq_count[PGT_QUEUE_DATA_LOW_TX] + 2 >
sc 2170 dev/ic/pgt.c error = pgt_load_tx_desc_frag(sc,
sc 2173 dev/ic/pgt.c error = pgt_load_tx_desc_frag(sc,
sc 2176 dev/ic/pgt.c pgt_unload_tx_desc_frag(sc, pd);
sc 2177 dev/ic/pgt.c TAILQ_INSERT_HEAD(&sc->sc_freeq[
sc 2186 dev/ic/pgt.c pgt_desc_transmit(sc, PGT_QUEUE_DATA_LOW_TX,
sc 2190 dev/ic/pgt.c pgt_desc_transmit(sc, PGT_QUEUE_DATA_LOW_TX,
sc 2206 dev/ic/pgt.c sc->sc_txtimer = 5;
sc 2207 dev/ic/pgt.c ni = ieee80211_find_txnode(&sc->sc_ic,
sc 2212 dev/ic/pgt.c ieee80211_release_node(&sc->sc_ic, ni);
sc 2215 dev/ic/pgt.c if (sc->sc_drvbpf != NULL) {
sc 2218 dev/ic/pgt.c struct pgt_tx_radiotap_hdr *tap = &sc->sc_txtap;
sc 2223 dev/ic/pgt.c m = pgt_ieee80211_encap(sc, &eh, m, NULL);
sc 2235 dev/ic/pgt.c mb.m_len = sc->sc_txtap_len;
sc 2241 dev/ic/pgt.c bpf_mtap(sc->sc_drvbpf, &mb,
sc 2255 dev/ic/pgt.c struct pgt_softc *sc = ifp->if_softc;
sc 2267 dev/ic/pgt.c ic = &sc->sc_ic;
sc 2281 dev/ic/pgt.c tsleep(&sc->sc_flags, 0, "pgtsca", hz * SCAN_TIMEOUT);
sc 2293 dev/ic/pgt.c error = pgt_oid_get(sc, PGT_OID_NOISE_FLOOR, &noise,
sc 2298 dev/ic/pgt.c error = pgt_oid_get(sc, PGT_OID_BSS_LIST, pob,
sc 2328 dev/ic/pgt.c pgt_obj_bss2scanres(sc, &pob->pob_bsslist[i],
sc 2377 dev/ic/pgt.c arp_ifinit(&sc->sc_ic.ic_ac, ifa);
sc 2388 dev/ic/pgt.c pgt_stop(sc, SC_NEEDS_RESET);
sc 2414 dev/ic/pgt.c pgt_update_hw_from_sw(sc, 0, 0);
sc 2423 dev/ic/pgt.c pgt_obj_bss2scanres(struct pgt_softc *sc, struct pgt_obj_bss *pob,
sc 2430 dev/ic/pgt.c rs = &sc->sc_ic.ic_sup_rates[IEEE80211_MODE_AUTO];
sc 2481 dev/ic/pgt.c struct pgt_softc *sc;
sc 2483 dev/ic/pgt.c sc = ifp->if_softc;
sc 2489 dev/ic/pgt.c if (sc->sc_dirtyq_count[PGT_QUEUE_DATA_LOW_TX] != 0) {
sc 2493 dev/ic/pgt.c if (sc->sc_txtimer && --sc->sc_txtimer == 0) {
sc 2494 dev/ic/pgt.c count = pgt_drain_tx_queue(sc, PGT_QUEUE_DATA_LOW_TX);
sc 2495 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_UNEXPECTED)
sc 2497 dev/ic/pgt.c sc->sc_dev.dv_xname, count));
sc 2500 dev/ic/pgt.c if (sc->sc_flags & (SC_DYING | SC_NEEDS_RESET))
sc 2508 dev/ic/pgt.c sc->sc_ic.ic_state != IEEE80211_S_INIT &&
sc 2509 dev/ic/pgt.c sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR)
sc 2510 dev/ic/pgt.c pgt_async_update(sc);
sc 2519 dev/ic/pgt.c switch (sc->sc_ic.ic_opmode) {
sc 2521 dev/ic/pgt.c ieee80211_iterate_nodes(&sc->sc_ic,
sc 2525 dev/ic/pgt.c ieee80211_iterate_nodes(&sc->sc_ic,
sc 2538 dev/ic/pgt.c struct pgt_softc *sc = ifp->if_softc;
sc 2539 dev/ic/pgt.c struct ieee80211com *ic = &sc->sc_ic;
sc 2544 dev/ic/pgt.c if (!(sc->sc_flags & (SC_DYING | SC_UNINITIALIZED)))
sc 2545 dev/ic/pgt.c pgt_update_hw_from_sw(sc,
sc 2553 dev/ic/pgt.c ieee80211_new_state(&sc->sc_ic, IEEE80211_S_SCAN, -1);
sc 2567 dev/ic/pgt.c pgt_update_hw_from_sw(struct pgt_softc *sc, int keepassoc, int keepnodes)
sc 2569 dev/ic/pgt.c struct ieee80211com *ic = &sc->sc_ic;
sc 2624 dev/ic/pgt.c if (sc->sc_wds)
sc 2641 dev/ic/pgt.c DPRINTF(("%s: current mode is ", sc->sc_dev.dv_xname));
sc 2671 dev/ic/pgt.c switch (sc->sc_80211_ioc_auth) {
sc 2683 dev/ic/pgt.c if (sc->sc_ic.ic_flags & IEEE80211_F_WEPON) {
sc 2700 dev/ic/pgt.c if (!wep || !sc->sc_dot1x)
sc 2718 dev/ic/pgt.c DPRINTF(("%s: set rates", sc->sc_dev.dv_xname));
sc 2817 dev/ic/pgt.c sc->sc_flags |= SC_NOFREE_ALLNODES;
sc 2823 dev/ic/pgt.c printf("%s: problem setting modes\n", sc->sc_dev.dv_xname);
sc 2829 dev/ic/pgt.c pgt_hostap_handle_mlme(struct pgt_softc *sc, uint32_t oid,
sc 2832 dev/ic/pgt.c struct ieee80211com *ic = &sc->sc_ic;
sc 2841 dev/ic/pgt.c ieee80211_release_node(&sc->sc_ic, ni);
sc 2866 dev/ic/pgt.c pgt_update_sw_from_hw(struct pgt_softc *sc, struct pgt_async_trap *pa,
sc 2869 dev/ic/pgt.c struct ieee80211com *ic = &sc->sc_ic;
sc 2881 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_TRAP)
sc 2883 dev/ic/pgt.c sc->sc_dev.dv_xname, oid, args->m_len));
sc 2889 dev/ic/pgt.c if (sc->sc_debug & (SC_DEBUG_TRAP | SC_DEBUG_LINK))
sc 2891 dev/ic/pgt.c sc->sc_dev.dv_xname, __func__, ls));
sc 2904 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_TRAP)
sc 2907 dev/ic/pgt.c sc->sc_dev.dv_xname,
sc 2913 dev/ic/pgt.c pgt_hostap_handle_mlme(sc, oid, mlme);
sc 2920 dev/ic/pgt.c error = pgt_oid_get(sc, PGT_OID_LINK_STATE, &ls, sizeof(ls));
sc 2924 dev/ic/pgt.c DPRINTF(("%s: up_sw_from_hw: link %u\n", sc->sc_dev.dv_xname,
sc 2932 dev/ic/pgt.c if (pgt_oid_get(sc, PGT_OID_NOISE_FLOOR, &noise, sizeof(noise)) != 0)
sc 2934 dev/ic/pgt.c sc->sc_noise = letoh32(noise);
sc 2936 dev/ic/pgt.c if (pgt_oid_get(sc, PGT_OID_CHANNEL, &channel,
sc 2941 dev/ic/pgt.c if (pgt_oid_get(sc, PGT_OID_BSSID, ic->ic_bss->ni_bssid,
sc 2945 dev/ic/pgt.c error = pgt_oid_retrieve(sc, PGT_OID_BSS_FIND, &bss,
sc 2951 dev/ic/pgt.c error = pgt_oid_get(sc, PGT_OID_SSID, &ssid, sizeof(ssid));
sc 2967 dev/ic/pgt.c struct pgt_softc *sc = ic->ic_if.if_softc;
sc 2972 dev/ic/pgt.c DPRINTF(("%s: newstate %s -> %s\n", sc->sc_dev.dv_xname,
sc 2977 dev/ic/pgt.c if (sc->sc_dirtyq_count[PGT_QUEUE_DATA_LOW_TX] == 0)
sc 2990 dev/ic/pgt.c if (sc->sc_flags & SC_NOFREE_ALLNODES)
sc 2991 dev/ic/pgt.c sc->sc_flags &= ~SC_NOFREE_ALLNODES;
sc 3006 dev/ic/pgt.c return (sc->sc_newstate(ic, nstate, arg));
sc 3010 dev/ic/pgt.c pgt_drain_tx_queue(struct pgt_softc *sc, enum pgt_queue pq)
sc 3014 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cbdmam, 0,
sc 3015 dev/ic/pgt.c sc->sc_cbdmam->dm_mapsize,
sc 3017 dev/ic/pgt.c sc->sc_cb->pcb_device_curfrag[pq] =
sc 3018 dev/ic/pgt.c sc->sc_cb->pcb_driver_curfrag[pq];
sc 3019 dev/ic/pgt.c bus_dmamap_sync(sc->sc_dmat, sc->sc_cbdmam, 0,
sc 3020 dev/ic/pgt.c sc->sc_cbdmam->dm_mapsize,
sc 3022 dev/ic/pgt.c while (!TAILQ_EMPTY(&sc->sc_dirtyq[pq])) {
sc 3025 dev/ic/pgt.c pd = TAILQ_FIRST(&sc->sc_dirtyq[pq]);
sc 3026 dev/ic/pgt.c TAILQ_REMOVE(&sc->sc_dirtyq[pq], pd, pd_link);
sc 3027 dev/ic/pgt.c sc->sc_dirtyq_count[pq]--;
sc 3028 dev/ic/pgt.c TAILQ_INSERT_TAIL(&sc->sc_freeq[pq], pd, pd_link);
sc 3029 dev/ic/pgt.c sc->sc_freeq_count[pq]++;
sc 3030 dev/ic/pgt.c pgt_unload_tx_desc_frag(sc, pd);
sc 3031 dev/ic/pgt.c if (sc->sc_debug & SC_DEBUG_QUEUES)
sc 3033 dev/ic/pgt.c sc->sc_dev.dv_xname, pd->pd_fragnum, pq));
sc 3036 dev/ic/pgt.c sc->sc_ic.ic_if.if_oerrors++;
sc 3043 dev/ic/pgt.c pgt_dma_alloc(struct pgt_softc *sc)
sc 3049 dev/ic/pgt.c TAILQ_INIT(&sc->sc_freeq[i]);
sc 3050 dev/ic/pgt.c TAILQ_INIT(&sc->sc_dirtyq[i]);
sc 3058 dev/ic/pgt.c error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 3059 dev/ic/pgt.c BUS_DMA_NOWAIT, &sc->sc_cbdmam);
sc 3062 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 3066 dev/ic/pgt.c error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE,
sc 3067 dev/ic/pgt.c 0, &sc->sc_cbdmas, 1, &nsegs, BUS_DMA_NOWAIT);
sc 3070 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 3074 dev/ic/pgt.c error = bus_dmamem_map(sc->sc_dmat, &sc->sc_cbdmas, nsegs,
sc 3075 dev/ic/pgt.c size, (caddr_t *)&sc->sc_cb, BUS_DMA_NOWAIT);
sc 3078 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 3081 dev/ic/pgt.c bzero(sc->sc_cb, size);
sc 3083 dev/ic/pgt.c error = bus_dmamap_load(sc->sc_dmat, sc->sc_cbdmam,
sc 3084 dev/ic/pgt.c sc->sc_cb, size, NULL, BUS_DMA_NOWAIT);
sc 3087 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 3096 dev/ic/pgt.c error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 3097 dev/ic/pgt.c BUS_DMA_ALLOCNOW, &sc->sc_psmdmam);
sc 3100 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 3104 dev/ic/pgt.c error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE,
sc 3105 dev/ic/pgt.c 0, &sc->sc_psmdmas, 1, &nsegs, BUS_DMA_NOWAIT);
sc 3108 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 3112 dev/ic/pgt.c error = bus_dmamem_map(sc->sc_dmat, &sc->sc_psmdmas, nsegs,
sc 3113 dev/ic/pgt.c size, (caddr_t *)&sc->sc_psmbuf, BUS_DMA_NOWAIT);
sc 3116 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 3119 dev/ic/pgt.c bzero(sc->sc_psmbuf, size);
sc 3121 dev/ic/pgt.c error = bus_dmamap_load(sc->sc_dmat, sc->sc_psmdmam,
sc 3122 dev/ic/pgt.c sc->sc_psmbuf, size, NULL, BUS_DMA_WAITOK);
sc 3125 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 3132 dev/ic/pgt.c error = pgt_dma_alloc_queue(sc, PGT_QUEUE_DATA_LOW_RX);
sc 3136 dev/ic/pgt.c error = pgt_dma_alloc_queue(sc, PGT_QUEUE_DATA_LOW_TX);
sc 3140 dev/ic/pgt.c error = pgt_dma_alloc_queue(sc, PGT_QUEUE_DATA_HIGH_RX);
sc 3144 dev/ic/pgt.c error = pgt_dma_alloc_queue(sc, PGT_QUEUE_DATA_HIGH_TX);
sc 3148 dev/ic/pgt.c error = pgt_dma_alloc_queue(sc, PGT_QUEUE_MGMT_RX);
sc 3152 dev/ic/pgt.c error = pgt_dma_alloc_queue(sc, PGT_QUEUE_MGMT_TX);
sc 3158 dev/ic/pgt.c printf("%s: error in DMA allocation\n", sc->sc_dev.dv_xname);
sc 3159 dev/ic/pgt.c pgt_dma_free(sc);
sc 3166 dev/ic/pgt.c pgt_dma_alloc_queue(struct pgt_softc *sc, enum pgt_queue pq)
sc 3175 dev/ic/pgt.c pcbqueue = sc->sc_cb->pcb_data_low_rx;
sc 3179 dev/ic/pgt.c pcbqueue = sc->sc_cb->pcb_data_low_tx;
sc 3183 dev/ic/pgt.c pcbqueue = sc->sc_cb->pcb_data_high_rx;
sc 3187 dev/ic/pgt.c pcbqueue = sc->sc_cb->pcb_data_high_tx;
sc 3191 dev/ic/pgt.c pcbqueue = sc->sc_cb->pcb_mgmt_rx;
sc 3195 dev/ic/pgt.c pcbqueue = sc->sc_cb->pcb_mgmt_tx;
sc 3203 dev/ic/pgt.c error = bus_dmamap_create(sc->sc_dmat, PGT_FRAG_SIZE, 1,
sc 3207 dev/ic/pgt.c sc->sc_dev.dv_xname);
sc 3212 dev/ic/pgt.c error = bus_dmamem_alloc(sc->sc_dmat, PGT_FRAG_SIZE, PAGE_SIZE,
sc 3216 dev/ic/pgt.c sc->sc_dev.dv_xname, i, pq);
sc 3221 dev/ic/pgt.c error = bus_dmamem_map(sc->sc_dmat, &pd->pd_dmas, nsegs,
sc 3225 dev/ic/pgt.c sc->sc_dev.dv_xname, i, pq);
sc 3231 dev/ic/pgt.c error = bus_dmamap_load(sc->sc_dmat, pd->pd_dmam,
sc 3235 dev/ic/pgt.c sc->sc_dev.dv_xname, i, pq);
sc 3236 dev/ic/pgt.c bus_dmamem_free(sc->sc_dmat, &pd->pd_dmas,
sc 3243 dev/ic/pgt.c TAILQ_INSERT_TAIL(&sc->sc_freeq[pq], pd, pd_link);
sc 3250 dev/ic/pgt.c pgt_dma_free(struct pgt_softc *sc)
sc 3255 dev/ic/pgt.c if (sc->sc_dmat != NULL) {
sc 3256 dev/ic/pgt.c pgt_dma_free_queue(sc, PGT_QUEUE_DATA_LOW_RX);
sc 3257 dev/ic/pgt.c pgt_dma_free_queue(sc, PGT_QUEUE_DATA_LOW_TX);
sc 3258 dev/ic/pgt.c pgt_dma_free_queue(sc, PGT_QUEUE_DATA_HIGH_RX);
sc 3259 dev/ic/pgt.c pgt_dma_free_queue(sc, PGT_QUEUE_DATA_HIGH_TX);
sc 3260 dev/ic/pgt.c pgt_dma_free_queue(sc, PGT_QUEUE_MGMT_RX);
sc 3261 dev/ic/pgt.c pgt_dma_free_queue(sc, PGT_QUEUE_MGMT_TX);
sc 3267 dev/ic/pgt.c if (sc->sc_psmbuf != NULL) {
sc 3268 dev/ic/pgt.c bus_dmamap_unload(sc->sc_dmat, sc->sc_psmdmam);
sc 3269 dev/ic/pgt.c bus_dmamem_free(sc->sc_dmat, &sc->sc_psmdmas, 1);
sc 3270 dev/ic/pgt.c sc->sc_psmbuf = NULL;
sc 3271 dev/ic/pgt.c sc->sc_psmdmam = NULL;
sc 3277 dev/ic/pgt.c if (sc->sc_cb != NULL) {
sc 3278 dev/ic/pgt.c bus_dmamap_unload(sc->sc_dmat, sc->sc_cbdmam);
sc 3279 dev/ic/pgt.c bus_dmamem_free(sc->sc_dmat, &sc->sc_cbdmas, 1);
sc 3280 dev/ic/pgt.c sc->sc_cb = NULL;
sc 3281 dev/ic/pgt.c sc->sc_cbdmam = NULL;
sc 3286 dev/ic/pgt.c pgt_dma_free_queue(struct pgt_softc *sc, enum pgt_queue pq)
sc 3290 dev/ic/pgt.c while (!TAILQ_EMPTY(&sc->sc_freeq[pq])) {
sc 3291 dev/ic/pgt.c pd = TAILQ_FIRST(&sc->sc_freeq[pq]);
sc 3292 dev/ic/pgt.c TAILQ_REMOVE(&sc->sc_freeq[pq], pd, pd_link);
sc 3294 dev/ic/pgt.c bus_dmamap_unload(sc->sc_dmat, pd->pd_dmam);
sc 3297 dev/ic/pgt.c bus_dmamem_free(sc->sc_dmat, &pd->pd_dmas, 1);
sc 3305 dev/ic/pgt.c struct pgt_softc *sc = arg;
sc 3307 dev/ic/pgt.c DPRINTF(("%s: %s\n", sc->sc_dev.dv_xname, __func__));
sc 3309 dev/ic/pgt.c pgt_stop(sc, SC_DYING);
sc 3315 dev/ic/pgt.c struct pgt_softc *sc = arg;
sc 3316 dev/ic/pgt.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 3319 dev/ic/pgt.c DPRINTF(("%s: %s(%d)\n", sc->sc_dev.dv_xname, __func__, why));
sc 3326 dev/ic/pgt.c pgt_stop(sc, SC_NEEDS_RESET);
sc 3327 dev/ic/pgt.c pgt_update_hw_from_sw(sc, 0, 0);
sc 3329 dev/ic/pgt.c if (sc->sc_power != NULL)
sc 3330 dev/ic/pgt.c (*sc->sc_power)(sc, why);
sc 3333 dev/ic/pgt.c if (sc->sc_power != NULL)
sc 3334 dev/ic/pgt.c (*sc->sc_power)(sc, why);
sc 3336 dev/ic/pgt.c pgt_stop(sc, SC_NEEDS_RESET);
sc 3337 dev/ic/pgt.c pgt_update_hw_from_sw(sc, 0, 0);
sc 3342 dev/ic/pgt.c pgt_update_hw_from_sw(sc, 0, 0);
sc 201 dev/ic/re.c CSR_WRITE_1(sc, RL_EECMD, \
sc 202 dev/ic/re.c CSR_READ_1(sc, RL_EECMD) | x)
sc 205 dev/ic/re.c CSR_WRITE_1(sc, RL_EECMD, \
sc 206 dev/ic/re.c CSR_READ_1(sc, RL_EECMD) & ~x)
sc 246 dev/ic/re.c re_eeprom_putbyte(struct rl_softc *sc, int addr)
sc 250 dev/ic/re.c d = addr | (RL_9346_READ << sc->rl_eewidth);
sc 256 dev/ic/re.c for (i = 1 << (sc->rl_eewidth + 3); i; i >>= 1) {
sc 273 dev/ic/re.c re_eeprom_getword(struct rl_softc *sc, int addr, u_int16_t *dest)
sc 281 dev/ic/re.c re_eeprom_putbyte(sc, addr);
sc 289 dev/ic/re.c if (CSR_READ_1(sc, RL_EECMD) & RL_EE_DATAOUT)
sc 302 dev/ic/re.c re_read_eeprom(struct rl_softc *sc, caddr_t dest, int off, int cnt)
sc 307 dev/ic/re.c CSR_SETBIT_1(sc, RL_EECMD, RL_EEMODE_PROGRAM);
sc 312 dev/ic/re.c CSR_SETBIT_1(sc, RL_EECMD, RL_EE_SEL);
sc 313 dev/ic/re.c re_eeprom_getword(sc, off + i, &word);
sc 314 dev/ic/re.c CSR_CLRBIT_1(sc, RL_EECMD, RL_EE_SEL);
sc 319 dev/ic/re.c CSR_CLRBIT_1(sc, RL_EECMD, RL_EEMODE_PROGRAM);
sc 325 dev/ic/re.c struct rl_softc *sc = (struct rl_softc *)self;
sc 335 dev/ic/re.c rval = CSR_READ_1(sc, RL_GMEDIASTAT);
sc 339 dev/ic/re.c CSR_WRITE_4(sc, RL_PHYAR, reg << 16);
sc 343 dev/ic/re.c rval = CSR_READ_4(sc, RL_PHYAR);
sc 350 dev/ic/re.c printf ("%s: PHY read failed\n", sc->sc_dev.dv_xname);
sc 360 dev/ic/re.c struct rl_softc *sc = (struct rl_softc *)dev;
sc 364 dev/ic/re.c CSR_WRITE_4(sc, RL_PHYAR, (reg << 16) |
sc 369 dev/ic/re.c rval = CSR_READ_4(sc, RL_PHYAR);
sc 376 dev/ic/re.c printf ("%s: PHY write failed\n", sc->sc_dev.dv_xname);
sc 382 dev/ic/re.c struct rl_softc *sc = (struct rl_softc *)dev;
sc 389 dev/ic/re.c if (sc->rl_type == RL_8169) {
sc 427 dev/ic/re.c rval = CSR_READ_1(sc, RL_MEDIASTAT);
sc 431 dev/ic/re.c printf("%s: bad phy register %x\n", sc->sc_dev.dv_xname, reg);
sc 435 dev/ic/re.c rval = CSR_READ_2(sc, re8139_reg);
sc 436 dev/ic/re.c if (sc->rl_type == RL_8139CPLUS && re8139_reg == RL_BMCR) {
sc 447 dev/ic/re.c struct rl_softc *sc = (struct rl_softc *)dev;
sc 453 dev/ic/re.c if (sc->rl_type == RL_8169) {
sc 467 dev/ic/re.c if (sc->rl_type == RL_8139CPLUS) {
sc 490 dev/ic/re.c printf("%s: bad phy register %x\n", sc->sc_dev.dv_xname, reg);
sc 494 dev/ic/re.c CSR_WRITE_2(sc, re8139_reg, data);
sc 507 dev/ic/re.c re_setmulti(struct rl_softc *sc)
sc 514 dev/ic/re.c struct arpcom *ac = &sc->sc_arpcom;
sc 518 dev/ic/re.c ifp = &sc->sc_arpcom.ac_if;
sc 520 dev/ic/re.c rxfilt = CSR_READ_4(sc, RL_RXCFG);
sc 524 dev/ic/re.c CSR_WRITE_4(sc, RL_RXCFG, rxfilt);
sc 525 dev/ic/re.c CSR_WRITE_4(sc, RL_MAR0, 0xFFFFFFFF);
sc 526 dev/ic/re.c CSR_WRITE_4(sc, RL_MAR4, 0xFFFFFFFF);
sc 531 dev/ic/re.c CSR_WRITE_4(sc, RL_MAR0, 0);
sc 532 dev/ic/re.c CSR_WRITE_4(sc, RL_MAR4, 0);
sc 559 dev/ic/re.c CSR_WRITE_4(sc, RL_RXCFG, rxfilt);
sc 567 dev/ic/re.c hwrev = CSR_READ_4(sc, RL_TXCFG) & RL_TXCFG_HWREV;
sc 571 dev/ic/re.c CSR_WRITE_4(sc, RL_MAR0, swap32(hashes[1]));
sc 572 dev/ic/re.c CSR_WRITE_4(sc, RL_MAR4, swap32(hashes[0]));
sc 574 dev/ic/re.c CSR_WRITE_4(sc, RL_MAR0, hashes[0]);
sc 575 dev/ic/re.c CSR_WRITE_4(sc, RL_MAR4, hashes[1]);
sc 580 dev/ic/re.c re_setpromisc(struct rl_softc *sc)
sc 585 dev/ic/re.c ifp = &sc->sc_arpcom.ac_if;
sc 587 dev/ic/re.c rxcfg = CSR_READ_4(sc, RL_RXCFG);
sc 592 dev/ic/re.c CSR_WRITE_4(sc, RL_RXCFG, rxcfg);
sc 596 dev/ic/re.c re_reset(struct rl_softc *sc)
sc 600 dev/ic/re.c CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_RESET);
sc 604 dev/ic/re.c if (!(CSR_READ_1(sc, RL_COMMAND) & RL_CMD_RESET))
sc 608 dev/ic/re.c printf("%s: reset never completed!\n", sc->sc_dev.dv_xname);
sc 610 dev/ic/re.c CSR_WRITE_1(sc, 0x82, 1);
sc 636 dev/ic/re.c re_diag(struct rl_softc *sc)
sc 638 dev/ic/re.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 667 dev/ic/re.c sc->rl_testmode = 1;
sc 668 dev/ic/re.c re_reset(sc);
sc 670 dev/ic/re.c sc->rl_link = 1;
sc 671 dev/ic/re.c if (sc->rl_type == RL_8169)
sc 676 dev/ic/re.c re_miibus_writereg((struct device *)sc, phyaddr, MII_BMCR,
sc 679 dev/ic/re.c status = re_miibus_readreg((struct device *)sc,
sc 685 dev/ic/re.c re_miibus_writereg((struct device *)sc, phyaddr, MII_BMCR,
sc 687 dev/ic/re.c CSR_WRITE_2(sc, RL_ISR, RL_INTRS);
sc 703 dev/ic/re.c CSR_WRITE_2(sc, RL_ISR, 0xFFFF);
sc 716 dev/ic/re.c status = CSR_READ_2(sc, RL_ISR);
sc 717 dev/ic/re.c CSR_WRITE_2(sc, RL_ISR, status);
sc 725 dev/ic/re.c "in loopback mode\n", sc->sc_dev.dv_xname);
sc 735 dev/ic/re.c rxs = &sc->rl_ldata.rl_rxsoft[0];
sc 737 dev/ic/re.c bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
sc 739 dev/ic/re.c bus_dmamap_unload(sc->sc_dmat, dmamap);
sc 745 dev/ic/re.c RL_RXDESCSYNC(sc, 0, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
sc 746 dev/ic/re.c cur_rx = &sc->rl_ldata.rl_rx_list[0];
sc 748 dev/ic/re.c total_len = rxstat & sc->rl_rxlenmask;
sc 752 dev/ic/re.c sc->sc_dev.dv_xname);
sc 764 dev/ic/re.c printf("%s: WARNING, DMA FAILURE!\n", sc->sc_dev.dv_xname);
sc 766 dev/ic/re.c sc->sc_dev.dv_xname, ether_sprintf(dst));
sc 769 dev/ic/re.c sc->sc_dev.dv_xname,
sc 774 dev/ic/re.c "into a 64-bit PCI slot.\n", sc->sc_dev.dv_xname);
sc 776 dev/ic/re.c "for proper operation.\n", sc->sc_dev.dv_xname);
sc 778 dev/ic/re.c sc->sc_dev.dv_xname);
sc 785 dev/ic/re.c sc->rl_testmode = 0;
sc 786 dev/ic/re.c sc->rl_link = 0;
sc 815 dev/ic/re.c re_attach(struct rl_softc *sc, const char *intrstr)
sc 827 dev/ic/re.c re_reset(sc);
sc 829 dev/ic/re.c sc->rl_eewidth = RL_9356_ADDR_LEN;
sc 830 dev/ic/re.c re_read_eeprom(sc, (caddr_t)&re_did, 0, 1);
sc 832 dev/ic/re.c sc->rl_eewidth = RL_9346_ADDR_LEN;
sc 837 dev/ic/re.c re_read_eeprom(sc, (caddr_t)as, RL_EE_EADDR, 3);
sc 852 dev/ic/re.c boot_eaddr.eaddr_word[1] = letoh32(CSR_READ_4(sc, RL_IDR4));
sc 853 dev/ic/re.c boot_eaddr.eaddr_word[0] = letoh32(CSR_READ_4(sc, RL_IDR0));
sc 858 dev/ic/re.c eaddr[5] += sc->sc_dev.dv_unit;
sc 866 dev/ic/re.c if (sc->rl_type == RL_8169) {
sc 867 dev/ic/re.c sc->rl_rxlenmask = RL_RDESC_STAT_GFRAGLEN;
sc 868 dev/ic/re.c sc->rl_txstart = RL_GTXSTART;
sc 869 dev/ic/re.c sc->rl_ldata.rl_tx_desc_cnt = RL_TX_DESC_CNT_8169;
sc 871 dev/ic/re.c sc->rl_rxlenmask = RL_RDESC_STAT_FRAGLEN;
sc 872 dev/ic/re.c sc->rl_txstart = RL_TXSTART;
sc 873 dev/ic/re.c sc->rl_ldata.rl_tx_desc_cnt = RL_TX_DESC_CNT_8139;
sc 876 dev/ic/re.c bcopy(eaddr, (char *)&sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 878 dev/ic/re.c hwrev = CSR_READ_4(sc, RL_TXCFG) & RL_TXCFG_HWREV;
sc 890 dev/ic/re.c ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 892 dev/ic/re.c if (sc->rl_ldata.rl_tx_desc_cnt >
sc 894 dev/ic/re.c sc->rl_ldata.rl_tx_desc_cnt =
sc 899 dev/ic/re.c if ((error = bus_dmamem_alloc(sc->sc_dmat, RL_TX_LIST_SZ(sc),
sc 900 dev/ic/re.c RL_RING_ALIGN, 0, &sc->rl_ldata.rl_tx_listseg, 1,
sc 901 dev/ic/re.c &sc->rl_ldata.rl_tx_listnseg, BUS_DMA_NOWAIT)) != 0) {
sc 903 dev/ic/re.c sc->sc_dev.dv_xname, error);
sc 908 dev/ic/re.c if ((error = bus_dmamem_map(sc->sc_dmat, &sc->rl_ldata.rl_tx_listseg,
sc 909 dev/ic/re.c sc->rl_ldata.rl_tx_listnseg, RL_TX_LIST_SZ(sc),
sc 910 dev/ic/re.c (caddr_t *)&sc->rl_ldata.rl_tx_list,
sc 913 dev/ic/re.c sc->sc_dev.dv_xname, error);
sc 916 dev/ic/re.c memset(sc->rl_ldata.rl_tx_list, 0, RL_TX_LIST_SZ(sc));
sc 918 dev/ic/re.c if ((error = bus_dmamap_create(sc->sc_dmat, RL_TX_LIST_SZ(sc), 1,
sc 919 dev/ic/re.c RL_TX_LIST_SZ(sc), 0, 0,
sc 920 dev/ic/re.c &sc->rl_ldata.rl_tx_list_map)) != 0) {
sc 922 dev/ic/re.c sc->sc_dev.dv_xname, error);
sc 926 dev/ic/re.c if ((error = bus_dmamap_load(sc->sc_dmat,
sc 927 dev/ic/re.c sc->rl_ldata.rl_tx_list_map, sc->rl_ldata.rl_tx_list,
sc 928 dev/ic/re.c RL_TX_LIST_SZ(sc), NULL, BUS_DMA_NOWAIT)) != 0) {
sc 930 dev/ic/re.c sc->sc_dev.dv_xname, error);
sc 936 dev/ic/re.c error = bus_dmamap_create(sc->sc_dmat,
sc 938 dev/ic/re.c RL_TX_DESC_CNT(sc) - RL_NTXDESC_RSVD, RL_TDESC_CMD_FRAGLEN,
sc 939 dev/ic/re.c 0, 0, &sc->rl_ldata.rl_txq[i].txq_dmamap);
sc 942 dev/ic/re.c sc->sc_dev.dv_xname);
sc 948 dev/ic/re.c if ((error = bus_dmamem_alloc(sc->sc_dmat, RL_RX_DMAMEM_SZ,
sc 949 dev/ic/re.c RL_RING_ALIGN, 0, &sc->rl_ldata.rl_rx_listseg, 1,
sc 950 dev/ic/re.c &sc->rl_ldata.rl_rx_listnseg, BUS_DMA_NOWAIT)) != 0) {
sc 952 dev/ic/re.c sc->sc_dev.dv_xname, error);
sc 957 dev/ic/re.c if ((error = bus_dmamem_map(sc->sc_dmat, &sc->rl_ldata.rl_rx_listseg,
sc 958 dev/ic/re.c sc->rl_ldata.rl_rx_listnseg, RL_RX_DMAMEM_SZ,
sc 959 dev/ic/re.c (caddr_t *)&sc->rl_ldata.rl_rx_list,
sc 962 dev/ic/re.c sc->sc_dev.dv_xname, error);
sc 966 dev/ic/re.c memset(sc->rl_ldata.rl_rx_list, 0, RL_RX_DMAMEM_SZ);
sc 968 dev/ic/re.c if ((error = bus_dmamap_create(sc->sc_dmat, RL_RX_DMAMEM_SZ, 1,
sc 970 dev/ic/re.c &sc->rl_ldata.rl_rx_list_map)) != 0) {
sc 972 dev/ic/re.c sc->sc_dev.dv_xname, error);
sc 976 dev/ic/re.c if ((error = bus_dmamap_load(sc->sc_dmat,
sc 977 dev/ic/re.c sc->rl_ldata.rl_rx_list_map, sc->rl_ldata.rl_rx_list,
sc 980 dev/ic/re.c sc->sc_dev.dv_xname, error);
sc 986 dev/ic/re.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
sc 987 dev/ic/re.c 0, 0, &sc->rl_ldata.rl_rxsoft[i].rxs_dmamap);
sc 990 dev/ic/re.c sc->sc_dev.dv_xname);
sc 995 dev/ic/re.c ifp = &sc->sc_arpcom.ac_if;
sc 996 dev/ic/re.c ifp->if_softc = sc;
sc 997 dev/ic/re.c strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 1003 dev/ic/re.c if (sc->rl_type == RL_8169)
sc 1015 dev/ic/re.c timeout_set(&sc->timer_handle, re_tick, sc);
sc 1018 dev/ic/re.c sc->sc_mii.mii_ifp = ifp;
sc 1019 dev/ic/re.c sc->sc_mii.mii_readreg = re_miibus_readreg;
sc 1020 dev/ic/re.c sc->sc_mii.mii_writereg = re_miibus_writereg;
sc 1021 dev/ic/re.c sc->sc_mii.mii_statchg = re_miibus_statchg;
sc 1022 dev/ic/re.c ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, re_ifmedia_upd,
sc 1024 dev/ic/re.c mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
sc 1026 dev/ic/re.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 1027 dev/ic/re.c printf("%s: no PHY found!\n", sc->sc_dev.dv_xname);
sc 1028 dev/ic/re.c ifmedia_add(&sc->sc_mii.mii_media,
sc 1030 dev/ic/re.c ifmedia_set(&sc->sc_mii.mii_media,
sc 1033 dev/ic/re.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 1038 dev/ic/re.c re_reset(sc);
sc 1048 dev/ic/re.c if (sc->rl_type == RL_8169) {
sc 1049 dev/ic/re.c error = re_diag(sc);
sc 1052 dev/ic/re.c sc->sc_dev.dv_xname);
sc 1064 dev/ic/re.c if (sc->rl_ldata.rl_rxsoft[i].rxs_dmamap != NULL)
sc 1065 dev/ic/re.c bus_dmamap_destroy(sc->sc_dmat,
sc 1066 dev/ic/re.c sc->rl_ldata.rl_rxsoft[i].rxs_dmamap);
sc 1070 dev/ic/re.c bus_dmamap_unload(sc->sc_dmat, sc->rl_ldata.rl_rx_list_map);
sc 1072 dev/ic/re.c bus_dmamap_destroy(sc->sc_dmat, sc->rl_ldata.rl_rx_list_map);
sc 1074 dev/ic/re.c bus_dmamem_unmap(sc->sc_dmat,
sc 1075 dev/ic/re.c (caddr_t)sc->rl_ldata.rl_rx_list, RL_RX_DMAMEM_SZ);
sc 1077 dev/ic/re.c bus_dmamem_free(sc->sc_dmat,
sc 1078 dev/ic/re.c &sc->rl_ldata.rl_rx_listseg, sc->rl_ldata.rl_rx_listnseg);
sc 1083 dev/ic/re.c if (sc->rl_ldata.rl_txq[i].txq_dmamap != NULL)
sc 1084 dev/ic/re.c bus_dmamap_destroy(sc->sc_dmat,
sc 1085 dev/ic/re.c sc->rl_ldata.rl_txq[i].txq_dmamap);
sc 1089 dev/ic/re.c bus_dmamap_unload(sc->sc_dmat, sc->rl_ldata.rl_tx_list_map);
sc 1091 dev/ic/re.c bus_dmamap_destroy(sc->sc_dmat, sc->rl_ldata.rl_tx_list_map);
sc 1093 dev/ic/re.c bus_dmamem_unmap(sc->sc_dmat,
sc 1094 dev/ic/re.c (caddr_t)sc->rl_ldata.rl_tx_list, RL_TX_LIST_SZ(sc));
sc 1096 dev/ic/re.c bus_dmamem_free(sc->sc_dmat,
sc 1097 dev/ic/re.c &sc->rl_ldata.rl_tx_listseg, sc->rl_ldata.rl_tx_listnseg);
sc 1104 dev/ic/re.c re_newbuf(struct rl_softc *sc, int idx, struct mbuf *m)
sc 1135 dev/ic/re.c rxs = &sc->rl_ldata.rl_rxsoft[idx];
sc 1137 dev/ic/re.c error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
sc 1143 dev/ic/re.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 1146 dev/ic/re.c d = &sc->rl_ldata.rl_rx_list[idx];
sc 1147 dev/ic/re.c RL_RXDESCSYNC(sc, idx, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
sc 1149 dev/ic/re.c RL_RXDESCSYNC(sc, idx, BUS_DMASYNC_PREREAD);
sc 1152 dev/ic/re.c sc->sc_dev.dv_xname);
sc 1164 dev/ic/re.c RL_RXDESCSYNC(sc, idx, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
sc 1167 dev/ic/re.c RL_RXDESCSYNC(sc, idx, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
sc 1178 dev/ic/re.c re_tx_list_init(struct rl_softc *sc)
sc 1182 dev/ic/re.c memset(sc->rl_ldata.rl_tx_list, 0, RL_TX_LIST_SZ(sc));
sc 1184 dev/ic/re.c sc->rl_ldata.rl_txq[i].txq_mbuf = NULL;
sc 1187 dev/ic/re.c bus_dmamap_sync(sc->sc_dmat,
sc 1188 dev/ic/re.c sc->rl_ldata.rl_tx_list_map, 0,
sc 1189 dev/ic/re.c sc->rl_ldata.rl_tx_list_map->dm_mapsize,
sc 1191 dev/ic/re.c sc->rl_ldata.rl_txq_prodidx = 0;
sc 1192 dev/ic/re.c sc->rl_ldata.rl_txq_considx = 0;
sc 1193 dev/ic/re.c sc->rl_ldata.rl_tx_free = RL_TX_DESC_CNT(sc);
sc 1194 dev/ic/re.c sc->rl_ldata.rl_tx_nextfree = 0;
sc 1200 dev/ic/re.c re_rx_list_init(struct rl_softc *sc)
sc 1204 dev/ic/re.c memset((char *)sc->rl_ldata.rl_rx_list, 0, RL_RX_LIST_SZ);
sc 1207 dev/ic/re.c if (re_newbuf(sc, i, NULL) == ENOBUFS)
sc 1211 dev/ic/re.c sc->rl_ldata.rl_rx_prodidx = 0;
sc 1212 dev/ic/re.c sc->rl_head = sc->rl_tail = NULL;
sc 1223 dev/ic/re.c re_rxeof(struct rl_softc *sc)
sc 1232 dev/ic/re.c ifp = &sc->sc_arpcom.ac_if;
sc 1234 dev/ic/re.c for (i = sc->rl_ldata.rl_rx_prodidx;; i = RL_NEXT_RX_DESC(sc, i)) {
sc 1235 dev/ic/re.c cur_rx = &sc->rl_ldata.rl_rx_list[i];
sc 1236 dev/ic/re.c RL_RXDESCSYNC(sc, i,
sc 1239 dev/ic/re.c RL_RXDESCSYNC(sc, i, BUS_DMASYNC_PREREAD);
sc 1242 dev/ic/re.c total_len = rxstat & sc->rl_rxlenmask;
sc 1243 dev/ic/re.c rxs = &sc->rl_ldata.rl_rxsoft[i];
sc 1248 dev/ic/re.c bus_dmamap_sync(sc->sc_dmat,
sc 1251 dev/ic/re.c bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
sc 1255 dev/ic/re.c if (sc->rl_head == NULL)
sc 1256 dev/ic/re.c sc->rl_head = sc->rl_tail = m;
sc 1259 dev/ic/re.c sc->rl_tail->m_next = m;
sc 1260 dev/ic/re.c sc->rl_tail = m;
sc 1262 dev/ic/re.c re_newbuf(sc, i, NULL);
sc 1282 dev/ic/re.c if (sc->rl_type == RL_8169)
sc 1296 dev/ic/re.c if (sc->rl_head != NULL) {
sc 1297 dev/ic/re.c m_freem(sc->rl_head);
sc 1298 dev/ic/re.c sc->rl_head = sc->rl_tail = NULL;
sc 1300 dev/ic/re.c re_newbuf(sc, i, m);
sc 1309 dev/ic/re.c if (re_newbuf(sc, i, NULL)) {
sc 1311 dev/ic/re.c if (sc->rl_head != NULL) {
sc 1312 dev/ic/re.c m_freem(sc->rl_head);
sc 1313 dev/ic/re.c sc->rl_head = sc->rl_tail = NULL;
sc 1315 dev/ic/re.c re_newbuf(sc, i, m);
sc 1319 dev/ic/re.c if (sc->rl_head != NULL) {
sc 1330 dev/ic/re.c sc->rl_tail->m_len -=
sc 1336 dev/ic/re.c sc->rl_tail->m_next = m;
sc 1338 dev/ic/re.c m = sc->rl_head;
sc 1339 dev/ic/re.c sc->rl_head = sc->rl_tail = NULL;
sc 1369 dev/ic/re.c sc->rl_ldata.rl_rx_prodidx = i;
sc 1373 dev/ic/re.c re_txeof(struct rl_softc *sc)
sc 1380 dev/ic/re.c ifp = &sc->sc_arpcom.ac_if;
sc 1382 dev/ic/re.c for (idx = sc->rl_ldata.rl_txq_considx;; idx = RL_NEXT_TXQ(sc, idx)) {
sc 1383 dev/ic/re.c txq = &sc->rl_ldata.rl_txq[idx];
sc 1386 dev/ic/re.c KASSERT(idx == sc->rl_ldata.rl_txq_prodidx);
sc 1391 dev/ic/re.c RL_TXDESCSYNC(sc, descidx,
sc 1394 dev/ic/re.c letoh32(sc->rl_ldata.rl_tx_list[descidx].rl_cmdstat);
sc 1395 dev/ic/re.c RL_TXDESCSYNC(sc, descidx, BUS_DMASYNC_PREREAD);
sc 1400 dev/ic/re.c sc->rl_ldata.rl_tx_free += txq->txq_nsegs;
sc 1401 dev/ic/re.c KASSERT(sc->rl_ldata.rl_tx_free <= RL_TX_DESC_CNT(sc));
sc 1402 dev/ic/re.c bus_dmamap_sync(sc->sc_dmat, txq->txq_dmamap,
sc 1404 dev/ic/re.c bus_dmamap_unload(sc->sc_dmat, txq->txq_dmamap);
sc 1416 dev/ic/re.c sc->rl_ldata.rl_txq_considx = idx;
sc 1418 dev/ic/re.c if (sc->rl_ldata.rl_tx_free > RL_NTXDESC_RSVD)
sc 1421 dev/ic/re.c if (sc->rl_ldata.rl_tx_free < RL_TX_DESC_CNT(sc)) {
sc 1429 dev/ic/re.c CSR_WRITE_1(sc, sc->rl_txstart, RL_TXSTART_START);
sc 1437 dev/ic/re.c CSR_WRITE_4(sc, RL_TIMERCNT, 1);
sc 1445 dev/ic/re.c struct rl_softc *sc = xsc;
sc 1450 dev/ic/re.c ifp = &sc->sc_arpcom.ac_if;
sc 1451 dev/ic/re.c mii = &sc->sc_mii;
sc 1456 dev/ic/re.c if (sc->rl_link) {
sc 1458 dev/ic/re.c sc->rl_link = 0;
sc 1462 dev/ic/re.c sc->rl_link = 1;
sc 1469 dev/ic/re.c timeout_add(&sc->timer_handle, hz);
sc 1475 dev/ic/re.c struct rl_softc *sc = arg;
sc 1480 dev/ic/re.c ifp = &sc->sc_arpcom.ac_if;
sc 1487 dev/ic/re.c status = CSR_READ_2(sc, RL_ISR);
sc 1492 dev/ic/re.c CSR_WRITE_2(sc, RL_ISR, status);
sc 1498 dev/ic/re.c re_rxeof(sc);
sc 1504 dev/ic/re.c re_txeof(sc);
sc 1509 dev/ic/re.c re_reset(sc);
sc 1515 dev/ic/re.c timeout_del(&sc->timer_handle);
sc 1516 dev/ic/re.c re_tick(sc);
sc 1528 dev/ic/re.c re_encap(struct rl_softc *sc, struct mbuf *m, int *idx)
sc 1543 dev/ic/re.c if (sc->rl_ldata.rl_tx_free <= RL_NTXDESC_RSVD)
sc 1568 dev/ic/re.c txq = &sc->rl_ldata.rl_txq[*idx];
sc 1570 dev/ic/re.c error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
sc 1575 dev/ic/re.c sc->sc_dev.dv_xname, error);
sc 1587 dev/ic/re.c if (nsegs > sc->rl_ldata.rl_tx_free - RL_NTXDESC_RSVD) {
sc 1596 dev/ic/re.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 1610 dev/ic/re.c curidx = startidx = sc->rl_ldata.rl_tx_nextfree;
sc 1613 dev/ic/re.c seg++, curidx = RL_NEXT_TX_DESC(sc, curidx)) {
sc 1614 dev/ic/re.c d = &sc->rl_ldata.rl_tx_list[curidx];
sc 1615 dev/ic/re.c RL_TXDESCSYNC(sc, curidx,
sc 1618 dev/ic/re.c RL_TXDESCSYNC(sc, curidx, BUS_DMASYNC_PREREAD);
sc 1621 dev/ic/re.c sc->sc_dev.dv_xname);
sc 1623 dev/ic/re.c uidx = (curidx + RL_TX_DESC_CNT(sc) - seg) %
sc 1624 dev/ic/re.c RL_TX_DESC_CNT(sc);
sc 1625 dev/ic/re.c sc->rl_ldata.rl_tx_list[uidx].rl_cmdstat = 0;
sc 1626 dev/ic/re.c RL_TXDESCSYNC(sc, uidx,
sc 1640 dev/ic/re.c if (curidx == (RL_TX_DESC_CNT(sc) - 1))
sc 1647 dev/ic/re.c RL_TXDESCSYNC(sc, curidx,
sc 1653 dev/ic/re.c d = &sc->rl_ldata.rl_tx_list[curidx];
sc 1655 dev/ic/re.c paddaddr = RL_TXPADDADDR(sc);
sc 1660 dev/ic/re.c if (curidx == (RL_TX_DESC_CNT(sc) - 1))
sc 1663 dev/ic/re.c RL_TXDESCSYNC(sc, curidx,
sc 1666 dev/ic/re.c curidx = RL_NEXT_TX_DESC(sc, curidx);
sc 1678 dev/ic/re.c sc->rl_ldata.rl_tx_list[startidx].rl_vlanctl =
sc 1686 dev/ic/re.c sc->rl_ldata.rl_tx_list[startidx].rl_cmdstat |=
sc 1688 dev/ic/re.c RL_TXDESCSYNC(sc, startidx, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
sc 1695 dev/ic/re.c sc->rl_ldata.rl_tx_free -= nsegs;
sc 1696 dev/ic/re.c sc->rl_ldata.rl_tx_nextfree = curidx;
sc 1698 dev/ic/re.c *idx = RL_NEXT_TXQ(sc, *idx);
sc 1703 dev/ic/re.c bus_dmamap_unload(sc->sc_dmat, map);
sc 1715 dev/ic/re.c struct rl_softc *sc;
sc 1718 dev/ic/re.c sc = ifp->if_softc;
sc 1720 dev/ic/re.c if (!sc->rl_link || ifp->if_flags & IFF_OACTIVE)
sc 1723 dev/ic/re.c idx = sc->rl_ldata.rl_txq_prodidx;
sc 1732 dev/ic/re.c if (sc->rl_ldata.rl_txq[idx].txq_mbuf != NULL) {
sc 1733 dev/ic/re.c KASSERT(idx == sc->rl_ldata.rl_txq_considx);
sc 1738 dev/ic/re.c error = re_encap(sc, m, &idx);
sc 1740 dev/ic/re.c sc->rl_ldata.rl_tx_free == RL_TX_DESC_CNT(sc)) {
sc 1765 dev/ic/re.c if (sc->rl_ldata.rl_tx_free != RL_TX_DESC_CNT(sc))
sc 1766 dev/ic/re.c CSR_WRITE_4(sc, RL_TIMERCNT, 1);
sc 1770 dev/ic/re.c sc->rl_ldata.rl_txq_prodidx = idx;
sc 1772 dev/ic/re.c CSR_WRITE_1(sc, sc->rl_txstart, RL_TXSTART_START);
sc 1782 dev/ic/re.c CSR_WRITE_4(sc, RL_TIMERCNT, 1);
sc 1793 dev/ic/re.c struct rl_softc *sc = ifp->if_softc;
sc 1812 dev/ic/re.c CSR_WRITE_2(sc, RL_CPLUS_CMD, RL_CPLUSCMD_RXENB|
sc 1821 dev/ic/re.c bcopy(sc->sc_arpcom.ac_enaddr, eaddr.eaddr, ETHER_ADDR_LEN);
sc 1822 dev/ic/re.c CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_WRITECFG);
sc 1823 dev/ic/re.c CSR_WRITE_4(sc, RL_IDR4,
sc 1825 dev/ic/re.c CSR_WRITE_4(sc, RL_IDR0,
sc 1827 dev/ic/re.c CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF);
sc 1832 dev/ic/re.c re_rx_list_init(sc);
sc 1833 dev/ic/re.c re_tx_list_init(sc);
sc 1838 dev/ic/re.c CSR_WRITE_4(sc, RL_RXLIST_ADDR_HI,
sc 1839 dev/ic/re.c RL_ADDR_HI(sc->rl_ldata.rl_rx_list_map->dm_segs[0].ds_addr));
sc 1840 dev/ic/re.c CSR_WRITE_4(sc, RL_RXLIST_ADDR_LO,
sc 1841 dev/ic/re.c RL_ADDR_LO(sc->rl_ldata.rl_rx_list_map->dm_segs[0].ds_addr));
sc 1843 dev/ic/re.c CSR_WRITE_4(sc, RL_TXLIST_ADDR_HI,
sc 1844 dev/ic/re.c RL_ADDR_HI(sc->rl_ldata.rl_tx_list_map->dm_segs[0].ds_addr));
sc 1845 dev/ic/re.c CSR_WRITE_4(sc, RL_TXLIST_ADDR_LO,
sc 1846 dev/ic/re.c RL_ADDR_LO(sc->rl_ldata.rl_tx_list_map->dm_segs[0].ds_addr));
sc 1851 dev/ic/re.c CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB);
sc 1856 dev/ic/re.c if (sc->rl_testmode) {
sc 1857 dev/ic/re.c if (sc->rl_type == RL_8169)
sc 1858 dev/ic/re.c CSR_WRITE_4(sc, RL_TXCFG,
sc 1861 dev/ic/re.c CSR_WRITE_4(sc, RL_TXCFG,
sc 1864 dev/ic/re.c CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG);
sc 1866 dev/ic/re.c CSR_WRITE_1(sc, RL_EARLY_TX_THRESH, 16);
sc 1868 dev/ic/re.c CSR_WRITE_4(sc, RL_RXCFG, RL_RXCFG_CONFIG);
sc 1871 dev/ic/re.c rxcfg = CSR_READ_4(sc, RL_RXCFG);
sc 1882 dev/ic/re.c CSR_WRITE_4(sc, RL_RXCFG, rxcfg);
sc 1885 dev/ic/re.c re_setpromisc(sc);
sc 1890 dev/ic/re.c re_setmulti(sc);
sc 1895 dev/ic/re.c if (sc->rl_testmode)
sc 1896 dev/ic/re.c CSR_WRITE_2(sc, RL_IMR, 0);
sc 1898 dev/ic/re.c CSR_WRITE_2(sc, RL_IMR, RL_INTRS_CPLUS);
sc 1899 dev/ic/re.c CSR_WRITE_2(sc, RL_ISR, RL_INTRS_CPLUS);
sc 1902 dev/ic/re.c CSR_WRITE_4(sc, RL_MISSEDPKT, 0);
sc 1905 dev/ic/re.c CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB);
sc 1915 dev/ic/re.c if (sc->rl_type == RL_8169)
sc 1916 dev/ic/re.c CSR_WRITE_4(sc, RL_TIMERINT_8169, 0x800);
sc 1918 dev/ic/re.c CSR_WRITE_4(sc, RL_TIMERINT, 0x400);
sc 1924 dev/ic/re.c if (sc->rl_type == RL_8169)
sc 1925 dev/ic/re.c CSR_WRITE_2(sc, RL_MAXRXPKTLEN, 16383);
sc 1927 dev/ic/re.c if (sc->rl_testmode)
sc 1930 dev/ic/re.c mii_mediachg(&sc->sc_mii);
sc 1932 dev/ic/re.c CSR_WRITE_1(sc, RL_CFG1, CSR_READ_1(sc, RL_CFG1) | RL_CFG1_DRVLOAD);
sc 1939 dev/ic/re.c sc->rl_link = 0;
sc 1941 dev/ic/re.c timeout_add(&sc->timer_handle, hz);
sc 1952 dev/ic/re.c struct rl_softc *sc;
sc 1954 dev/ic/re.c sc = ifp->if_softc;
sc 1956 dev/ic/re.c return (mii_mediachg(&sc->sc_mii));
sc 1965 dev/ic/re.c struct rl_softc *sc;
sc 1967 dev/ic/re.c sc = ifp->if_softc;
sc 1969 dev/ic/re.c mii_pollstat(&sc->sc_mii);
sc 1970 dev/ic/re.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 1971 dev/ic/re.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 1977 dev/ic/re.c struct rl_softc *sc = ifp->if_softc;
sc 1984 dev/ic/re.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, command,
sc 1997 dev/ic/re.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 2009 dev/ic/re.c ((ifp->if_flags ^ sc->if_flags) &
sc 2011 dev/ic/re.c re_setpromisc(sc);
sc 2020 dev/ic/re.c sc->if_flags = ifp->if_flags;
sc 2025 dev/ic/re.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 2026 dev/ic/re.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 2033 dev/ic/re.c re_setmulti(sc);
sc 2039 dev/ic/re.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, command);
sc 2054 dev/ic/re.c struct rl_softc *sc;
sc 2057 dev/ic/re.c sc = ifp->if_softc;
sc 2059 dev/ic/re.c printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
sc 2062 dev/ic/re.c re_txeof(sc);
sc 2063 dev/ic/re.c re_rxeof(sc);
sc 2077 dev/ic/re.c struct rl_softc *sc;
sc 2080 dev/ic/re.c sc = ifp->if_softc;
sc 2083 dev/ic/re.c sc->rl_link = 0;
sc 2085 dev/ic/re.c timeout_del(&sc->timer_handle);
sc 2088 dev/ic/re.c mii_down(&sc->sc_mii);
sc 2090 dev/ic/re.c CSR_WRITE_1(sc, RL_COMMAND, 0x00);
sc 2091 dev/ic/re.c CSR_WRITE_2(sc, RL_IMR, 0x0000);
sc 2092 dev/ic/re.c CSR_WRITE_2(sc, RL_ISR, 0xFFFF);
sc 2094 dev/ic/re.c if (sc->rl_head != NULL) {
sc 2095 dev/ic/re.c m_freem(sc->rl_head);
sc 2096 dev/ic/re.c sc->rl_head = sc->rl_tail = NULL;
sc 2101 dev/ic/re.c if (sc->rl_ldata.rl_txq[i].txq_mbuf != NULL) {
sc 2102 dev/ic/re.c bus_dmamap_unload(sc->sc_dmat,
sc 2103 dev/ic/re.c sc->rl_ldata.rl_txq[i].txq_dmamap);
sc 2104 dev/ic/re.c m_freem(sc->rl_ldata.rl_txq[i].txq_mbuf);
sc 2105 dev/ic/re.c sc->rl_ldata.rl_txq[i].txq_mbuf = NULL;
sc 2111 dev/ic/re.c if (sc->rl_ldata.rl_rxsoft[i].rxs_mbuf != NULL) {
sc 2112 dev/ic/re.c bus_dmamap_unload(sc->sc_dmat,
sc 2113 dev/ic/re.c sc->rl_ldata.rl_rxsoft[i].rxs_dmamap);
sc 2114 dev/ic/re.c m_freem(sc->rl_ldata.rl_rxsoft[i].rxs_mbuf);
sc 2115 dev/ic/re.c sc->rl_ldata.rl_rxsoft[i].rxs_mbuf = NULL;
sc 82 dev/ic/rln.c rlnconfig(sc)
sc 83 dev/ic/rln.c struct rln_softc * sc;
sc 85 dev/ic/rln.c struct ifnet * ifp = &sc->sc_arpcom.ac_if;
sc 89 dev/ic/rln.c dprintf(" [attach %p]", sc);
sc 92 dev/ic/rln.c sc->sc_cardtype |= sc->sc_dev.dv_cfdata->cf_flags;
sc 95 dev/ic/rln.c sc->sc_pktseq = 0; /* rln_newseq() */
sc 96 dev/ic/rln.c sc->sc_txseq = 0;
sc 97 dev/ic/rln.c sc->sc_state = 0;
sc 100 dev/ic/rln.c sc->sc_param.rp_roam_config = RLN_ROAM_NORMAL;
sc 101 dev/ic/rln.c sc->sc_param.rp_security = RLN_SECURITY_DEFAULT;
sc 102 dev/ic/rln.c sc->sc_param.rp_station_type = RLN_STATIONTYPE_ALTMASTER;
sc 103 dev/ic/rln.c sc->sc_param.rp_domain = 0;
sc 104 dev/ic/rln.c sc->sc_param.rp_channel = 1;
sc 105 dev/ic/rln.c sc->sc_param.rp_subchannel = 1;
sc 107 dev/ic/rln.c bzero(sc->sc_param.rp_master, sizeof sc->sc_param.rp_master);
sc 111 dev/ic/rln.c sc->sc_mbox[i].mb_state = RLNMBOX_VOID;
sc 115 dev/ic/rln.c (sc->sc_cardtype & RLN_CTYPE_ONE_PIECE) ? "one" : "two");
sc 116 dev/ic/rln.c if (sc->sc_cardtype & RLN_CTYPE_OEM)
sc 118 dev/ic/rln.c if (sc->sc_cardtype & RLN_CTYPE_UISA)
sc 122 dev/ic/rln.c if (rln_getpromvers(sc, promvers, sizeof promvers)) {
sc 129 dev/ic/rln.c if (rln_getenaddr(sc, sc->sc_arpcom.ac_enaddr)) {
sc 133 dev/ic/rln.c printf(", addr %s", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 135 dev/ic/rln.c timeout_set(&sc->sc_timeout, rlnsoftintr, sc);
sc 138 dev/ic/rln.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 139 dev/ic/rln.c ifp->if_softc = sc;
sc 151 dev/ic/rln.c rlninit(sc)
sc 152 dev/ic/rln.c struct rln_softc * sc;
sc 155 dev/ic/rln.c struct ifnet * ifp = &sc->sc_arpcom.ac_if;
sc 161 dev/ic/rln.c sc->sc_intsel = 0;
sc 162 dev/ic/rln.c sc->sc_status = 0;
sc 163 dev/ic/rln.c sc->sc_control = 0;
sc 168 dev/ic/rln.c if (rln_reset(sc)) {
sc 169 dev/ic/rln.c printf("%s: could not reset card\n", sc->sc_dev.dv_xname);
sc 172 dev/ic/rln.c sc->sc_state = 0; /* Also clears RLN_STATE_NEEDINIT. */
sc 175 dev/ic/rln.c if (!cold && sc->sc_param.rp_master[0] == '\0') {
sc 176 dev/ic/rln.c bcopy(hostname, sc->sc_param.rp_master,
sc 177 dev/ic/rln.c min(hostnamelen, sizeof sc->sc_param.rp_master));
sc 180 dev/ic/rln.c rln_enable(sc, 1);
sc 183 dev/ic/rln.c if (rln_sendinit(sc)) {
sc 185 dev/ic/rln.c sc->sc_dev.dv_xname);
sc 189 dev/ic/rln.c rln_roamconfig(sc);
sc 192 dev/ic/rln.c rln_multicast(sc, 1);
sc 193 dev/ic/rln.c rln_roam(sc);
sc 196 dev/ic/rln.c rln_searchsync(sc);
sc 215 dev/ic/rln.c struct rln_softc * sc = (struct rln_softc *)ifp->if_softc;
sc 221 dev/ic/rln.c if (sc->sc_state & RLN_STATE_NEEDINIT)
sc 222 dev/ic/rln.c rlninit(sc);
sc 232 dev/ic/rln.c if ((sc->sc_state & RLN_STATE_SYNC) == 0) {
sc 237 dev/ic/rln.c rln_enable(sc, 1);
sc 257 dev/ic/rln.c printf("%s: no mbuf header\n", sc->sc_dev.dv_xname);
sc 273 dev/ic/rln.c sc->sc_dev.dv_xname, len + pad,
sc 280 dev/ic/rln.c ret = rln_transmit(sc, m0, len, pad);
sc 293 dev/ic/rln.c rln_need_reset(sc);
sc 299 dev/ic/rln.c rln_transmit(sc, m0, len, pad)
sc 300 dev/ic/rln.c struct rln_softc * sc;
sc 328 dev/ic/rln.c cmd.sequence = sc->sc_txseq;
sc 329 dev/ic/rln.c sc->sc_txseq++;
sc 330 dev/ic/rln.c if (sc->sc_txseq > RLN_MAXSEQ)
sc 331 dev/ic/rln.c sc->sc_txseq = 0;
sc 335 dev/ic/rln.c if (rln_msg_tx_start(sc, &cmd, sizeof cmd + tlen, &state))
sc 338 dev/ic/rln.c cmd.mm_cmd.cmd_seq = rln_newseq(sc);
sc 342 dev/ic/rln.c printf("%s: send %c%d seq %d data ", sc->sc_dev.dv_xname,
sc 347 dev/ic/rln.c rln_msg_tx_data(sc, &cmd, sizeof cmd, &state);
sc 358 dev/ic/rln.c rln_msg_tx_data(sc, mtod(m, void *), m->m_len, &state);
sc 375 dev/ic/rln.c rln_msg_tx_data(sc, zeroes, pad, &state);
sc 381 dev/ic/rln.c if (rln_msg_tx_end(sc, &state))
sc 395 dev/ic/rln.c struct rln_softc * sc = (struct rln_softc *)ifp->if_softc;
sc 397 dev/ic/rln.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 398 dev/ic/rln.c ++sc->sc_arpcom.ac_if.if_oerrors;
sc 399 dev/ic/rln.c rlninit(sc);
sc 400 dev/ic/rln.c rln_enable(sc, 1);
sc 408 dev/ic/rln.c struct rln_softc * sc = (struct rln_softc *)arg;
sc 413 dev/ic/rln.c rln_enable(sc, 0);
sc 417 dev/ic/rln.c rlnsoftintr(sc);
sc 420 dev/ic/rln.c timeout_add(&sc->sc_timeout, 1);
sc 430 dev/ic/rln.c struct rln_softc *sc = (struct rln_softc *)arg;
sc 431 dev/ic/rln.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 442 dev/ic/rln.c w = rln_wakeup(sc, RLN_WAKEUP_SET);
sc 444 dev/ic/rln.c if ((len = rln_rx_request(sc, 300)) < 0) {
sc 446 dev/ic/rln.c rln_need_reset(sc);
sc 447 dev/ic/rln.c rln_rx_end(sc);
sc 450 dev/ic/rln.c rln_rx_end(sc);
sc 451 dev/ic/rln.c printf("%s: short msg (%d)\n", sc->sc_dev.dv_xname, len);
sc 455 dev/ic/rln.c rln_rx_data(sc, &hdr, sizeof hdr);
sc 456 dev/ic/rln.c rlnread(sc, &hdr, len);
sc 462 dev/ic/rln.c rln_wakeup(sc, w);
sc 465 dev/ic/rln.c if ((sc->sc_state & RLN_STATE_NEEDINIT) == 0 &&
sc 466 dev/ic/rln.c rln_status_rx_ready(sc)) {
sc 467 dev/ic/rln.c if (rln_status_rx_read(sc) == RLN_STATUS_RX_ERROR) {
sc 469 dev/ic/rln.c printf("%s: protocol error\n", sc->sc_dev.dv_xname);
sc 472 dev/ic/rln.c rln_clear_nak(sc);
sc 475 dev/ic/rln.c printf("%s: intr piggyback\n", sc->sc_dev.dv_xname);
sc 481 dev/ic/rln.c rln_eoi(sc);
sc 482 dev/ic/rln.c rln_enable(sc, 1);
sc 490 dev/ic/rln.c rlnread(sc, hdr, len)
sc 491 dev/ic/rln.c struct rln_softc *sc;
sc 495 dev/ic/rln.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 507 dev/ic/rln.c if (rln_mbox_lock(sc, hdr->cmd_seq, (void **)&buf, &buflen) == 0) {
sc 518 dev/ic/rln.c rln_rx_pdata(sc, buf, len, &pd);
sc 522 dev/ic/rln.c sc->sc_dev.dv_xname,
sc 526 dev/ic/rln.c rln_rx_pdata(sc, buf, len, &pd);
sc 530 dev/ic/rln.c sc->sc_dev.dv_xname,
sc 534 dev/ic/rln.c rln_rx_pdata(sc, buf, buflen, &pd);
sc 536 dev/ic/rln.c rln_rx_pdata(sc, data, len - buflen, &pd);
sc 539 dev/ic/rln.c rln_rx_end(sc);
sc 542 dev/ic/rln.c rln_mbox_unlock(sc, hdr->cmd_seq, len + sizeof *hdr);
sc 550 dev/ic/rln.c printf("%s: msg too big (%d)\n", sc->sc_dev.dv_xname, len);
sc 552 dev/ic/rln.c rln_rx_end(sc);
sc 560 dev/ic/rln.c sc->sc_dev.dv_xname,
sc 565 dev/ic/rln.c rln_rx_end(sc);
sc 566 dev/ic/rln.c rln_need_reset(sc);
sc 576 dev/ic/rln.c m = rlnget(sc, hdr, len);
sc 577 dev/ic/rln.c rln_rx_end(sc);
sc 584 dev/ic/rln.c sc->sc_dev.dv_xname);
sc 601 dev/ic/rln.c rln_rx_pdata(sc, data + sizeof *hdr, len - sizeof *hdr, &pd);
sc 602 dev/ic/rln.c rln_rx_end(sc);
sc 605 dev/ic/rln.c printf("%s: recv %c%d seq %d data ", sc->sc_dev.dv_xname,
sc 618 dev/ic/rln.c sc->sc_dev.dv_xname, len);
sc 628 dev/ic/rln.c printf("%s: hardware fault\n", sc->sc_dev.dv_xname);
sc 632 dev/ic/rln.c if (bcmp(syncp->enaddr, sc->sc_arpcom.ac_enaddr,
sc 646 dev/ic/rln.c sc->sc_dev.dv_xname);
sc 649 dev/ic/rln.c printf("%s: synchronised to ", sc->sc_dev.dv_xname);
sc 657 dev/ic/rln.c sc->sc_param.rp_channel = syncp->channel;
sc 658 dev/ic/rln.c sc->sc_param.rp_subchannel = syncp->subchannel;
sc 659 dev/ic/rln.c sc->sc_state |= RLN_STATE_SYNC;
sc 668 dev/ic/rln.c printf("%s: lost sync\n", sc->sc_dev.dv_xname);
sc 669 dev/ic/rln.c sc->sc_state &= ~RLN_STATE_SYNC;
sc 673 dev/ic/rln.c printf("%s: roaming\n", sc->sc_dev.dv_xname);
sc 678 dev/ic/rln.c sc->sc_dev.dv_xname,
sc 692 dev/ic/rln.c rlnget(sc, hdr, totlen)
sc 693 dev/ic/rln.c struct rln_softc *sc;
sc 697 dev/ic/rln.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 718 dev/ic/rln.c printf("%s: recv %c%d seq %d data ", sc->sc_dev.dv_xname,
sc 727 dev/ic/rln.c printf("%s: empty packet", sc->sc_dev.dv_xname);
sc 733 dev/ic/rln.c rln_rx_pdata(sc, &hwhdr, sizeof hwhdr, &pd);
sc 776 dev/ic/rln.c rln_rx_pdata(sc, mtod(m, u_int8_t *), len, &pd);
sc 807 dev/ic/rln.c struct rln_softc *sc = ifp->if_softc;
sc 812 dev/ic/rln.c printf("%s: ioctl cmd[%c/%d] data=%x\n", sc->sc_dev.dv_xname,
sc 816 dev/ic/rln.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) != 0) {
sc 829 dev/ic/rln.c rlninit(sc);
sc 830 dev/ic/rln.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 834 dev/ic/rln.c rlninit(sc);
sc 845 dev/ic/rln.c rlnstop(sc);
sc 854 dev/ic/rln.c (sc->sc_state & RLN_STATE_PROMISC) == 0) {
sc 855 dev/ic/rln.c sc->sc_state |= RLN_STATE_PROMISC;
sc 859 dev/ic/rln.c (sc->sc_state & RLN_STATE_PROMISC)) {
sc 860 dev/ic/rln.c sc->sc_state &= ~RLN_STATE_PROMISC;
sc 866 dev/ic/rln.c rlninit(sc);
sc 877 dev/ic/rln.c error = rln_iosetparam(sc, (struct rln_param *)&data);
sc 881 dev/ic/rln.c bcopy(&sc->sc_param, (struct rln_param *)&data,
sc 882 dev/ic/rln.c sizeof sc->sc_param);
sc 897 dev/ic/rln.c rlnstop(sc)
sc 898 dev/ic/rln.c struct rln_softc *sc;
sc 900 dev/ic/rln.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 904 dev/ic/rln.c rln_enable(sc, 0);
sc 909 dev/ic/rln.c rln_getenaddr(sc, enaddr)
sc 910 dev/ic/rln.c struct rln_softc *sc;
sc 916 dev/ic/rln.c if (rln_msg_txrx(sc, &query, sizeof query,
sc 925 dev/ic/rln.c rln_getpromvers(sc, ver, verlen)
sc 926 dev/ic/rln.c struct rln_softc *sc;
sc 939 dev/ic/rln.c if (rln_msg_txrx(sc, &query, sizeof query,
sc 951 dev/ic/rln.c rln_sendinit(sc)
sc 952 dev/ic/rln.c struct rln_softc *sc;
sc 966 dev/ic/rln.c init.opmode = (sc->sc_state & RLN_STATE_PROMISC ?
sc 968 dev/ic/rln.c init.stationtype = sc->sc_param.rp_station_type;
sc 976 dev/ic/rln.c init.channel = sc->sc_param.rp_channel;
sc 977 dev/ic/rln.c init.subchannel = sc->sc_param.rp_subchannel;
sc 978 dev/ic/rln.c init.domain = sc->sc_param.rp_domain;
sc 981 dev/ic/rln.c bcopy(sc->sc_param.rp_master, init.mastername, sizeof init.mastername);
sc 984 dev/ic/rln.c init.sec1 = (sc->sc_param.rp_security & 0x0000ff) >> 0;
sc 985 dev/ic/rln.c init.sec2 = (sc->sc_param.rp_security & 0x00ff00) >> 8;
sc 986 dev/ic/rln.c init.sec3 = (sc->sc_param.rp_security & 0xff0000) >> 16;
sc 991 dev/ic/rln.c if (rln_msg_txrx(sc, &init, sizeof init,
sc 1006 dev/ic/rln.c if (rln_msg_txrx(sc, &magic, sizeof magic,
sc 1012 dev/ic/rln.c if (rln_msg_txrx(sc, &hop, sizeof hop,
sc 1023 dev/ic/rln.c rln_roamconfig(sc)
sc 1024 dev/ic/rln.c struct rln_softc *sc;
sc 1033 dev/ic/rln.c if (sc->sc_param.rp_roam_config > 2)
sc 1037 dev/ic/rln.c roam.retry_thresh = retry[sc->sc_param.rp_roam_config];
sc 1038 dev/ic/rln.c roam.rssi_threshold = rssi[sc->sc_param.rp_roam_config];
sc 1043 dev/ic/rln.c if (rln_msg_txrx(sc, &roam, sizeof roam,
sc 1052 dev/ic/rln.c rln_roam(sc)
sc 1053 dev/ic/rln.c struct rln_softc *sc;
sc 1058 dev/ic/rln.c return (rln_msg_txrx(sc, &roam, sizeof roam,
sc 1064 dev/ic/rln.c rln_multicast(sc, enable)
sc 1065 dev/ic/rln.c struct rln_softc *sc;
sc 1068 dev/ic/rln.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1075 dev/ic/rln.c ret = rln_msg_txrx(sc, &mcast, sizeof mcast,
sc 1088 dev/ic/rln.c rln_searchsync(sc)
sc 1089 dev/ic/rln.c struct rln_softc *sc;
sc 1095 dev/ic/rln.c search.domain = sc->sc_param.rp_domain;
sc 1102 dev/ic/rln.c return (rln_msg_txrx(sc, &search, sizeof search,
sc 1108 dev/ic/rln.c rln_iosetparam(sc, param)
sc 1109 dev/ic/rln.c struct rln_softc *sc;
sc 1126 dev/ic/rln.c bcopy(param, &sc->sc_param, sizeof *param);
sc 1127 dev/ic/rln.c if (rln_sendinit(sc))
sc 1135 dev/ic/rln.c rln_lockprom(sc)
sc 1136 dev/ic/rln.c struct rln_softc *sc;
sc 1142 dev/ic/rln.c return (rln_msg_txrx(sc, &lock, sizeof lock,
sc 1148 dev/ic/rln.c rln_ito(sc)
sc 1149 dev/ic/rln.c struct rln_softc * sc;
sc 1160 dev/ic/rln.c if (rln_msg_txrx(sc, &ito, sizeof ito,
sc 1167 dev/ic/rln.c rln_standby(sc)
sc 1168 dev/ic/rln.c struct rln_softc * sc;
sc 1173 dev/ic/rln.c if (rln_msg_txrx(sc, &ito, sizeof ito, NULL, 0))
sc 66 dev/ic/rlnreg.h _rln_register_write_1(sc, regoff, value)
sc 67 dev/ic/rlnreg.h struct rln_softc *sc;
sc 75 dev/ic/rlnreg.h bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (regoff), (value));
sc 80 dev/ic/rlnreg.h _rln_register_write_2(sc, regoff, value)
sc 81 dev/ic/rlnreg.h struct rln_softc *sc;
sc 89 dev/ic/rlnreg.h bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (regoff), (value));
sc 95 dev/ic/rlnreg.h _rln_register_read_1(sc, regoff)
sc 96 dev/ic/rlnreg.h struct rln_softc *sc;
sc 101 dev/ic/rlnreg.h ret = bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (regoff));
sc 103 dev/ic/rlnreg.h if (ret != (sc)->dbg_oreg[regoff]) {
sc 106 dev/ic/rlnreg.h (sc)->dbg_oreg[regoff] = ret;
sc 114 dev/ic/rlnreg.h _rln_register_read_2(sc, regoff)
sc 115 dev/ic/rlnreg.h struct rln_softc *sc;
sc 120 dev/ic/rlnreg.h ret = bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (regoff));
sc 122 dev/ic/rlnreg.h if (ret != (sc)->dbg_oreg[regoff]) {
sc 124 dev/ic/rlnreg.h (sc)->dbg_oreg[regoff] = ret;
sc 131 dev/ic/rlnreg.h #define rln_data_write_1(sc, value) \
sc 132 dev/ic/rlnreg.h _rln_register_write_1(sc, RLN_REG_DATA, (value))
sc 133 dev/ic/rlnreg.h #define rln_data_read_1(sc) \
sc 134 dev/ic/rlnreg.h _rln_register_read_1(sc, RLN_REG_DATA)
sc 135 dev/ic/rlnreg.h #define rln_data_write_multi_1(sc, buf, len) \
sc 136 dev/ic/rlnreg.h bus_space_write_multi_1((sc)->sc_iot, (sc)->sc_ioh, \
sc 138 dev/ic/rlnreg.h #define rln_data_read_multi_1(sc, buf, len) \
sc 139 dev/ic/rlnreg.h bus_space_read_multi_1((sc)->sc_iot, (sc)->sc_ioh, \
sc 143 dev/ic/rlnreg.h #define rln_data_write_2(sc, value) \
sc 144 dev/ic/rlnreg.h _rln_register_write_2(sc, RLN_REG_DATA, (value))
sc 145 dev/ic/rlnreg.h #define rln_data_read_2(sc) \
sc 146 dev/ic/rlnreg.h _rln_register_read_2(sc, RLN_REG_DATA)
sc 147 dev/ic/rlnreg.h #define rln_data_write_multi_2(sc, buf, len) \
sc 148 dev/ic/rlnreg.h bus_space_write_multi_2((sc)->sc_iot, (sc)->sc_ioh, \
sc 150 dev/ic/rlnreg.h #define rln_data_read_multi_2(sc, buf, len) \
sc 151 dev/ic/rlnreg.h bus_space_read_multi_2((sc)->sc_iot, (sc)->sc_ioh, \
sc 178 dev/ic/rlnreg.h #define rln_status_write(sc, value) \
sc 179 dev/ic/rlnreg.h _rln_register_write_1(sc, RLN_REG_STATUS, (value))
sc 180 dev/ic/rlnreg.h #define rln_status_set(sc, bits) \
sc 181 dev/ic/rlnreg.h rln_status_write(sc, (sc)->sc_status |= (bits))
sc 182 dev/ic/rlnreg.h #define rln_status_clear(sc, bits) \
sc 183 dev/ic/rlnreg.h rln_status_write(sc, (sc)->sc_status &= ~(bits))
sc 184 dev/ic/rlnreg.h #define _rln_status_setmask(sc, mask, bits) \
sc 189 dev/ic/rlnreg.h (sc)->sc_status = ((sc)->sc_status & (mask)) | (bits); \
sc 190 dev/ic/rlnreg.h rln_status_write(sc, (sc)->sc_status); \
sc 193 dev/ic/rlnreg.h #define rln_status_rx_write(sc, state) \
sc 194 dev/ic/rlnreg.h _rln_status_setmask((sc), ~RLN_STATUS_RX_MASK, state)
sc 195 dev/ic/rlnreg.h #define rln_status_tx_write(sc, state) \
sc 196 dev/ic/rlnreg.h _rln_status_setmask((sc), ~RLN_STATUS_TX_MASK, state)
sc 197 dev/ic/rlnreg.h #define rln_status_read(sc) \
sc 198 dev/ic/rlnreg.h _rln_register_read_1(sc, RLN_REG_STATUS)
sc 199 dev/ic/rlnreg.h #define rln_status_rx_read(sc) \
sc 200 dev/ic/rlnreg.h (rln_status_read(sc) & ~RLN_STATUS_TX_MASK)
sc 201 dev/ic/rlnreg.h #define rln_status_tx_read(sc) \
sc 202 dev/ic/rlnreg.h (rln_status_read(sc) & ~RLN_STATUS_RX_MASK)
sc 205 dev/ic/rlnreg.h rln_status_rx_ready(sc)
sc 206 dev/ic/rlnreg.h struct rln_softc *sc;
sc 210 dev/ic/rlnreg.h status = rln_status_rx_read(sc);
sc 216 dev/ic/rlnreg.h #define rln_status_tx_int(sc) do { \
sc 219 dev/ic/rlnreg.h rln_control_clear(sc, RLN_CONTROL_TXINT); \
sc 220 dev/ic/rlnreg.h rln_control_set(sc, RLN_CONTROL_TXINT); \
sc 223 dev/ic/rlnreg.h #define rln_status_rx_int(sc) do { \
sc 226 dev/ic/rlnreg.h rln_control_clear(sc, RLN_CONTROL_RXINT); \
sc 227 dev/ic/rlnreg.h rln_control_set(sc, RLN_CONTROL_RXINT); \
sc 240 dev/ic/rlnreg.h #define rln_control_write(sc, value) \
sc 241 dev/ic/rlnreg.h _rln_register_write_1(sc, RLN_REG_CONTROL, \
sc 242 dev/ic/rlnreg.h (sc)->sc_control = (value))
sc 243 dev/ic/rlnreg.h #define rln_control_read(sc) \
sc 244 dev/ic/rlnreg.h _rln_register_read_1(sc, RLN_REG_CONTROL)
sc 245 dev/ic/rlnreg.h #define rln_control_set(sc, bits) \
sc 246 dev/ic/rlnreg.h rln_control_write(sc, (sc)->sc_control | (bits))
sc 247 dev/ic/rlnreg.h #define rln_control_clear(sc, bits) \
sc 248 dev/ic/rlnreg.h rln_control_write(sc, (sc)->sc_control & ~(bits))
sc 249 dev/ic/rlnreg.h #define rln_control_outofstandby(sc) do { \
sc 250 dev/ic/rlnreg.h rln_control_write(sc, (sc)->sc_control | RLN_CONTROL_RESET);\
sc 252 dev/ic/rlnreg.h rln_control_write(sc, (sc)->sc_control); \
sc 260 dev/ic/rlnreg.h #define rln_intsel_disable(sc) do { \
sc 264 dev/ic/rlnreg.h _rln_register_write_1(sc, RLN_REG_INTSEL, \
sc 265 dev/ic/rlnreg.h (sc)->sc_intsel &= ~RLN_INTSEL_ENABLE); \
sc 268 dev/ic/rlnreg.h #define rln_intsel_enable(sc) do { \
sc 272 dev/ic/rlnreg.h _rln_register_write_1(sc, RLN_REG_INTSEL, \
sc 273 dev/ic/rlnreg.h (sc)->sc_intsel |= RLN_INTSEL_ENABLE); \
sc 276 dev/ic/rlnreg.h #define rln_intsel_write(sc, value) \
sc 277 dev/ic/rlnreg.h _rln_register_write_1(sc, RLN_REG_INTSEL, \
sc 278 dev/ic/rlnreg.h (sc)->sc_intsel |= (value))
sc 281 dev/ic/rlnreg.h #define rln_eoi(sc) \
sc 282 dev/ic/rlnreg.h (void) _rln_register_read_1(sc, RLN_REG_EOI)
sc 49 dev/ic/rlnsubr.c rln_enable(sc, enable)
sc 50 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 57 dev/ic/rlnsubr.c was_enabled = (sc->sc_intsel & RLN_INTSEL_ENABLE) ? 1 : 0;
sc 60 dev/ic/rlnsubr.c sc->sc_intsel |= RLN_INTSEL_ENABLE;
sc 62 dev/ic/rlnsubr.c sc->sc_intsel &=~RLN_INTSEL_ENABLE;
sc 63 dev/ic/rlnsubr.c _rln_register_write_1(sc, RLN_REG_INTSEL, sc->sc_intsel);
sc 78 dev/ic/rlnsubr.c rln_reset(sc)
sc 79 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 88 dev/ic/rlnsubr.c if (sc->sc_cardtype & (RLN_CTYPE_UISA | RLN_CTYPE_ONE_PIECE))
sc 90 dev/ic/rlnsubr.c if (rln_status_read(sc) & RLN_STATUS_WAKEUP) {
sc 91 dev/ic/rlnsubr.c rln_control_write(sc, op);
sc 92 dev/ic/rlnsubr.c rln_control_write(sc, op | RLN_CONTROL_RESET);
sc 95 dev/ic/rlnsubr.c rln_control_write(sc, op);
sc 99 dev/ic/rlnsubr.c rln_control_write(sc, op);
sc 100 dev/ic/rlnsubr.c rln_control_write(sc, op);
sc 101 dev/ic/rlnsubr.c rln_control_write(sc, op | RLN_CONTROL_BIT3);
sc 104 dev/ic/rlnsubr.c rln_status_write(sc, 0x00);
sc 105 dev/ic/rlnsubr.c if (sc->sc_cardtype & (RLN_CTYPE_UISA | RLN_CTYPE_ONE_PIECE))
sc 106 dev/ic/rlnsubr.c rln_control_write(sc, 0x38);
sc 109 dev/ic/rlnsubr.c rln_control_write(sc, 0x2c);
sc 113 dev/ic/rlnsubr.c rln_data_write_2(sc, 0xaa55);
sc 114 dev/ic/rlnsubr.c rln_status_write(sc, 0x5a);
sc 117 dev/ic/rlnsubr.c if ((status = rln_status_read(sc)) == 0x5a)
sc 126 dev/ic/rlnsubr.c if (sc->sc_width != 0)
sc 127 dev/ic/rlnsubr.c printf("%s: reset timeout\n", sc->sc_dev.dv_xname);
sc 131 dev/ic/rlnsubr.c if (sc->sc_width == 8) {
sc 132 dev/ic/rlnsubr.c if (sc->sc_cardtype & (RLN_CTYPE_UISA | RLN_CTYPE_ONE_PIECE))
sc 133 dev/ic/rlnsubr.c rln_control_write(sc, RLN_CONTROL_BIT3);
sc 135 dev/ic/rlnsubr.c rln_control_write(sc, RLN_CONTROL_BIT3 |
sc 137 dev/ic/rlnsubr.c rln_data_write_1(sc, 0x20);
sc 138 dev/ic/rlnsubr.c } else if (sc->sc_width == 16) {
sc 139 dev/ic/rlnsubr.c rln_data_write_2(sc, 0x0000);
sc 141 dev/ic/rlnsubr.c if (rln_data_read_2(sc) == 0x55aa) {
sc 142 dev/ic/rlnsubr.c rln_data_write_2(sc, 0x0000);
sc 143 dev/ic/rlnsubr.c sc->sc_width = 16;
sc 145 dev/ic/rlnsubr.c if (sc->sc_cardtype & (RLN_CTYPE_UISA |
sc 147 dev/ic/rlnsubr.c rln_control_write(sc, RLN_CONTROL_BIT3);
sc 149 dev/ic/rlnsubr.c rln_control_write(sc, RLN_CONTROL_BIT3 |
sc 151 dev/ic/rlnsubr.c rln_data_write_1(sc, 0x20);
sc 152 dev/ic/rlnsubr.c sc->sc_width = 8;
sc 157 dev/ic/rlnsubr.c rln_status_write(sc, 0x00);
sc 158 dev/ic/rlnsubr.c sc->sc_intsel = 0;
sc 159 dev/ic/rlnsubr.c rln_intsel_write(sc, sc->sc_irq);
sc 172 dev/ic/rlnsubr.c rln_wakeup(sc, wnew)
sc 173 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 180 dev/ic/rlnsubr.c wold = (sc->sc_status & RLN_STATUS_WAKEUP) |
sc 181 dev/ic/rlnsubr.c (sc->sc_control & RLN_CONTROL_RESET);
sc 186 dev/ic/rlnsubr.c rln_status_set(sc, RLN_STATUS_WAKEUP);
sc 195 dev/ic/rlnsubr.c s = rln_status_read(sc);
sc 196 dev/ic/rlnsubr.c rln_control_set(sc, RLN_CONTROL_RESET);
sc 201 dev/ic/rlnsubr.c rln_status_set(sc, RLN_STATUS_WAKEUP);
sc 208 dev/ic/rlnsubr.c rln_status_clear(sc, RLN_STATUS_WAKEUP);
sc 210 dev/ic/rlnsubr.c rln_control_clear(sc, RLN_CONTROL_RESET);
sc 224 dev/ic/rlnsubr.c rln_tx_request(sc, len)
sc 225 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 237 dev/ic/rlnsubr.c if (sc->sc_width == 16) {
sc 238 dev/ic/rlnsubr.c rln_status_tx_write(sc, RLN_STATUS_TX_HILEN_AVAIL);
sc 239 dev/ic/rlnsubr.c rln_data_write_2(sc, len);
sc 240 dev/ic/rlnsubr.c rln_status_tx_int(sc);
sc 244 dev/ic/rlnsubr.c status = rln_status_tx_read(sc);
sc 256 dev/ic/rlnsubr.c } else if (sc->sc_width == 8) {
sc 257 dev/ic/rlnsubr.c rln_status_tx_write(sc, RLN_STATUS_TX_LOLEN_AVAIL);
sc 258 dev/ic/rlnsubr.c rln_data_write_1(sc, len & 0xff);
sc 259 dev/ic/rlnsubr.c rln_status_tx_int(sc);
sc 262 dev/ic/rlnsubr.c status = rln_status_tx_read(sc);
sc 270 dev/ic/rlnsubr.c rln_data_write_1(sc, (len >> 8) & 0xff);
sc 271 dev/ic/rlnsubr.c rln_status_tx_write(sc, RLN_STATUS_TX_HILEN_AVAIL);
sc 274 dev/ic/rlnsubr.c status = rln_status_tx_read(sc);
sc 294 dev/ic/rlnsubr.c sc->sc_dev.dv_xname, status);
sc 302 dev/ic/rlnsubr.c printf("%s: tx protocol fault (nak)\n", sc->sc_dev.dv_xname);
sc 319 dev/ic/rlnsubr.c rln_tx_end(sc)
sc 320 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 330 dev/ic/rlnsubr.c status = rln_status_tx_read(sc);
sc 337 dev/ic/rlnsubr.c rln_status_tx_write(sc, RLN_STATUS_TX_IDLE);
sc 341 dev/ic/rlnsubr.c printf("%s: tx cmd failed (%02x)\n", sc->sc_dev.dv_xname,
sc 343 dev/ic/rlnsubr.c rln_need_reset(sc);
sc 356 dev/ic/rlnsubr.c rln_rx_request(sc, timeo)
sc 357 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 368 dev/ic/rlnsubr.c status = rln_status_rx_read(sc);
sc 378 dev/ic/rlnsubr.c status = rln_status_rx_read(sc);
sc 383 dev/ic/rlnsubr.c if (sc->sc_width == 16) {
sc 387 dev/ic/rlnsubr.c len = rln_data_read_2(sc);
sc 388 dev/ic/rlnsubr.c } else if (sc->sc_width == 8) {
sc 392 dev/ic/rlnsubr.c lo = rln_data_read_1(sc);
sc 393 dev/ic/rlnsubr.c rln_status_rx_write(sc, RLN_STATUS_RX_LOLEN_ACCEPT);
sc 394 dev/ic/rlnsubr.c rln_status_rx_int(sc);
sc 397 dev/ic/rlnsubr.c status = rln_status_rx_read(sc);
sc 406 dev/ic/rlnsubr.c hi = rln_data_read_1(sc);
sc 411 dev/ic/rlnsubr.c panic("rln: bus width %d", sc->sc_width);
sc 419 dev/ic/rlnsubr.c sc->sc_dev.dv_xname, status);
sc 422 dev/ic/rlnsubr.c printf("%s: rx protocol error (nak)\n", sc->sc_dev.dv_xname);
sc 429 dev/ic/rlnsubr.c rln_rx_pdata(sc, buf, len, pd)
sc 430 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 445 dev/ic/rlnsubr.c if (sc->sc_width == 16) {
sc 447 dev/ic/rlnsubr.c rln_data_read_multi_2(sc, data, len / 2);
sc 459 dev/ic/rlnsubr.c u.w = rln_data_read_2(sc);
sc 467 dev/ic/rlnsubr.c } else if (sc->sc_width == 8) {
sc 468 dev/ic/rlnsubr.c rln_data_read_multi_1(sc, data, len);
sc 475 dev/ic/rlnsubr.c pd->p_data = rln_data_read_1(sc);
sc 486 dev/ic/rlnsubr.c rln_rx_data(sc, buf, len)
sc 487 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 498 dev/ic/rlnsubr.c rln_status_rx_write(sc, RLN_STATUS_RX_HILEN_ACCEPT);
sc 499 dev/ic/rlnsubr.c rln_status_rx_int(sc);
sc 502 dev/ic/rlnsubr.c status = rln_status_rx_read(sc);
sc 513 dev/ic/rlnsubr.c rln_rx_pdata(sc, buf, len, &pd);
sc 525 dev/ic/rlnsubr.c rln_rx_end(sc)
sc 526 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 531 dev/ic/rlnsubr.c rln_status_rx_write(sc, RLN_STATUS_RX_XFR_COMPLETE);
sc 532 dev/ic/rlnsubr.c rln_status_rx_int(sc);
sc 539 dev/ic/rlnsubr.c rln_clear_nak(sc)
sc 540 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 544 dev/ic/rlnsubr.c rln_status_tx_write(sc, RLN_STATUS_CLRNAK);
sc 545 dev/ic/rlnsubr.c rln_status_tx_int(sc);
sc 555 dev/ic/rlnsubr.c rln_msg_tx_start(sc, buf, pktlen, state)
sc 556 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 564 dev/ic/rlnsubr.c state->ien = rln_enable(sc, 0);
sc 568 dev/ic/rlnsubr.c state->w = rln_wakeup(sc, RLN_WAKEUP_SET);
sc 572 dev/ic/rlnsubr.c ret = rln_tx_request(sc, pktlen);
sc 574 dev/ic/rlnsubr.c rln_clear_nak(sc);
sc 575 dev/ic/rlnsubr.c if (sc->sc_cardtype & RLN_CTYPE_OEM)
sc 576 dev/ic/rlnsubr.c rln_need_reset(sc);
sc 581 dev/ic/rlnsubr.c rln_status_tx_write(sc, RLN_STATUS_TX_XFR);
sc 588 dev/ic/rlnsubr.c rln_msg_tx_data(sc, buf, len, state)
sc 589 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 596 dev/ic/rlnsubr.c if (sc->sc_width == 16 && state->pd.p_nremain) {
sc 612 dev/ic/rlnsubr.c rln_data_write_2(sc, u.w);
sc 617 dev/ic/rlnsubr.c if (sc->sc_width == 16) {
sc 619 dev/ic/rlnsubr.c rln_data_write_multi_2(sc, buf, len / 2);
sc 624 dev/ic/rlnsubr.c } else if (sc->sc_width == 8)
sc 625 dev/ic/rlnsubr.c rln_data_write_multi_1(sc, buf, len);
sc 628 dev/ic/rlnsubr.c panic("rln_msg_tx_data width %d", sc->sc_width);
sc 639 dev/ic/rlnsubr.c rln_msg_tx_end(sc, state)
sc 640 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 647 dev/ic/rlnsubr.c rln_msg_tx_data(sc, NULL, 0, state);
sc 653 dev/ic/rlnsubr.c ret = rln_tx_end(sc);
sc 654 dev/ic/rlnsubr.c if (sc->sc_arpcom.ac_if.if_flags & IFF_OACTIVE)
sc 656 dev/ic/rlnsubr.c rln_wakeup(sc, state->w);
sc 657 dev/ic/rlnsubr.c rln_enable(sc, state->ien);
sc 663 dev/ic/rlnsubr.c rln_newseq(sc)
sc 664 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 670 dev/ic/rlnsubr.c seq = sc->sc_pktseq++;
sc 671 dev/ic/rlnsubr.c if (sc->sc_pktseq > RLN_MAXSEQ)
sc 672 dev/ic/rlnsubr.c sc->sc_pktseq = 0;
sc 687 dev/ic/rlnsubr.c rln_msg_txrx(sc, tx, txlen, rx, rxlen)
sc 688 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 705 dev/ic/rlnsubr.c txc->cmd_seq = rln_newseq(sc);
sc 708 dev/ic/rlnsubr.c printf("%s: send %c%d seq %d data ", sc->sc_dev.dv_xname,
sc 717 dev/ic/rlnsubr.c if (rln_mbox_create(sc, txc->cmd_seq, rx, rxlen) < 0)
sc 722 dev/ic/rlnsubr.c if ((ret = rln_msg_tx_start(sc, tx, txlen, &state))) {
sc 724 dev/ic/rlnsubr.c rln_mbox_wait(sc, txc->cmd_seq, -1);
sc 729 dev/ic/rlnsubr.c rln_msg_tx_data(sc, tx, (txlen + 1) & ~1, &state);
sc 732 dev/ic/rlnsubr.c if ((ret = rln_msg_tx_end(sc, &state))) {
sc 735 dev/ic/rlnsubr.c rln_mbox_wait(sc, txc->cmd_seq, -1);
sc 744 dev/ic/rlnsubr.c ien = rln_enable(sc, 1);
sc 747 dev/ic/rlnsubr.c if (rln_mbox_wait(sc, txc->cmd_seq, 4000) <= 0) {
sc 748 dev/ic/rlnsubr.c printf("%s: lost message %c%d seq %d\n", sc->sc_dev.dv_xname,
sc 750 dev/ic/rlnsubr.c rln_enable(sc, ien);
sc 753 dev/ic/rlnsubr.c rln_enable(sc, ien);
sc 756 dev/ic/rlnsubr.c printf("%s: recv %c%d seq %d data ", sc->sc_dev.dv_xname,
sc 767 dev/ic/rlnsubr.c sc->sc_dev.dv_xname,
sc 787 dev/ic/rlnsubr.c rln_mbox_create(sc, seq, buf, len)
sc 788 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 794 dev/ic/rlnsubr.c struct rln_mbox * mb = &sc->sc_mbox[seq];
sc 823 dev/ic/rlnsubr.c rln_mbox_wait(sc, seq, timeo)
sc 824 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 831 dev/ic/rlnsubr.c volatile struct rln_mbox * mb = &sc->sc_mbox[seq];
sc 883 dev/ic/rlnsubr.c rln_mbox_lock(sc, seq, bufp, lenp)
sc 884 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 890 dev/ic/rlnsubr.c struct rln_mbox * mb = &sc->sc_mbox[seq];
sc 916 dev/ic/rlnsubr.c rln_mbox_unlock(sc, seq, actlen)
sc 917 dev/ic/rlnsubr.c struct rln_softc * sc;
sc 922 dev/ic/rlnsubr.c struct rln_mbox * mb = &sc->sc_mbox[seq];
sc 63 dev/ic/rlnvar.h #define rln_need_reset(sc) \
sc 64 dev/ic/rlnvar.h (sc)->sc_state |= RLN_STATE_NEEDINIT
sc 176 dev/ic/rt2560.c struct rt2560_softc *sc = xsc;
sc 177 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 181 dev/ic/rt2560.c sc->amrr.amrr_min_success_threshold = 1;
sc 182 dev/ic/rt2560.c sc->amrr.amrr_max_success_threshold = 15;
sc 183 dev/ic/rt2560.c timeout_set(&sc->amrr_to, rt2560_amrr_timeout, sc);
sc 184 dev/ic/rt2560.c timeout_set(&sc->scan_to, rt2560_next_scan, sc);
sc 187 dev/ic/rt2560.c sc->asic_rev = RAL_READ(sc, RT2560_CSR0);
sc 190 dev/ic/rt2560.c rt2560_get_macaddr(sc, ic->ic_myaddr);
sc 194 dev/ic/rt2560.c rt2560_read_eeprom(sc);
sc 196 dev/ic/rt2560.c printf("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", sc->sc_dev.dv_xname,
sc 197 dev/ic/rt2560.c sc->asic_rev, rt2560_get_rf(sc->rf_rev));
sc 202 dev/ic/rt2560.c error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT);
sc 205 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 208 dev/ic/rt2560.c error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT);
sc 211 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 214 dev/ic/rt2560.c error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT);
sc 217 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 220 dev/ic/rt2560.c error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT);
sc 223 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 226 dev/ic/rt2560.c error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT);
sc 229 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 260 dev/ic/rt2560.c ifp->if_softc = sc;
sc 267 dev/ic/rt2560.c memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 276 dev/ic/rt2560.c sc->sc_newstate = ic->ic_newstate;
sc 281 dev/ic/rt2560.c bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
sc 284 dev/ic/rt2560.c sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
sc 285 dev/ic/rt2560.c sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
sc 286 dev/ic/rt2560.c sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT);
sc 288 dev/ic/rt2560.c sc->sc_txtap_len = sizeof sc->sc_txtapu;
sc 289 dev/ic/rt2560.c sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
sc 290 dev/ic/rt2560.c sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT);
sc 296 dev/ic/rt2560.c sc->sc_sdhook = shutdownhook_establish(rt2560_shutdown, sc);
sc 297 dev/ic/rt2560.c if (sc->sc_sdhook == NULL) {
sc 299 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 301 dev/ic/rt2560.c sc->sc_powerhook = powerhook_establish(rt2560_power, sc);
sc 302 dev/ic/rt2560.c if (sc->sc_powerhook == NULL) {
sc 304 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 308 dev/ic/rt2560.c fail5: rt2560_free_tx_ring(sc, &sc->bcnq);
sc 309 dev/ic/rt2560.c fail4: rt2560_free_tx_ring(sc, &sc->prioq);
sc 310 dev/ic/rt2560.c fail3: rt2560_free_tx_ring(sc, &sc->atimq);
sc 311 dev/ic/rt2560.c fail2: rt2560_free_tx_ring(sc, &sc->txq);
sc 318 dev/ic/rt2560.c struct rt2560_softc *sc = xsc;
sc 319 dev/ic/rt2560.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 321 dev/ic/rt2560.c timeout_del(&sc->scan_to);
sc 322 dev/ic/rt2560.c timeout_del(&sc->amrr_to);
sc 327 dev/ic/rt2560.c if (sc->sc_powerhook != NULL)
sc 328 dev/ic/rt2560.c powerhook_disestablish(sc->sc_powerhook);
sc 329 dev/ic/rt2560.c if (sc->sc_sdhook != NULL)
sc 330 dev/ic/rt2560.c shutdownhook_disestablish(sc->sc_sdhook);
sc 332 dev/ic/rt2560.c rt2560_free_tx_ring(sc, &sc->txq);
sc 333 dev/ic/rt2560.c rt2560_free_tx_ring(sc, &sc->atimq);
sc 334 dev/ic/rt2560.c rt2560_free_tx_ring(sc, &sc->prioq);
sc 335 dev/ic/rt2560.c rt2560_free_tx_ring(sc, &sc->bcnq);
sc 336 dev/ic/rt2560.c rt2560_free_rx_ring(sc, &sc->rxq);
sc 342 dev/ic/rt2560.c rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring,
sc 352 dev/ic/rt2560.c error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1,
sc 356 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 360 dev/ic/rt2560.c error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE,
sc 364 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 368 dev/ic/rt2560.c error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
sc 373 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 377 dev/ic/rt2560.c error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
sc 381 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 392 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 399 dev/ic/rt2560.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 404 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 411 dev/ic/rt2560.c fail: rt2560_free_tx_ring(sc, ring);
sc 416 dev/ic/rt2560.c rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
sc 425 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 427 dev/ic/rt2560.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 441 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
sc 450 dev/ic/rt2560.c rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
sc 455 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
sc 457 dev/ic/rt2560.c bus_dmamap_unload(sc->sc_dmat, ring->map);
sc 458 dev/ic/rt2560.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,
sc 460 dev/ic/rt2560.c bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
sc 468 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 471 dev/ic/rt2560.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 482 dev/ic/rt2560.c bus_dmamap_destroy(sc->sc_dmat, data->map);
sc 489 dev/ic/rt2560.c rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring,
sc 498 dev/ic/rt2560.c error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1,
sc 502 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 506 dev/ic/rt2560.c error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE,
sc 510 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 514 dev/ic/rt2560.c error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
sc 519 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 523 dev/ic/rt2560.c error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
sc 527 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 538 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 548 dev/ic/rt2560.c struct rt2560_rx_desc *desc = &sc->rxq.desc[i];
sc 549 dev/ic/rt2560.c struct rt2560_rx_data *data = &sc->rxq.data[i];
sc 551 dev/ic/rt2560.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
sc 555 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 562 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 569 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 574 dev/ic/rt2560.c error = bus_dmamap_load(sc->sc_dmat, data->map,
sc 578 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 586 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
sc 591 dev/ic/rt2560.c fail: rt2560_free_rx_ring(sc, ring);
sc 596 dev/ic/rt2560.c rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
sc 605 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
sc 613 dev/ic/rt2560.c rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
sc 618 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
sc 620 dev/ic/rt2560.c bus_dmamap_unload(sc->sc_dmat, ring->map);
sc 621 dev/ic/rt2560.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,
sc 623 dev/ic/rt2560.c bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
sc 631 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 634 dev/ic/rt2560.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 639 dev/ic/rt2560.c bus_dmamap_destroy(sc->sc_dmat, data->map);
sc 678 dev/ic/rt2560.c struct rt2560_softc *sc = arg;
sc 679 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 695 dev/ic/rt2560.c struct rt2560_softc *sc = arg;
sc 698 dev/ic/rt2560.c ieee80211_amrr_choose(&sc->amrr, ni, &rn->amn);
sc 704 dev/ic/rt2560.c struct rt2560_softc *sc = arg;
sc 705 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 710 dev/ic/rt2560.c rt2560_iter_func(sc, ic->ic_bss);
sc 712 dev/ic/rt2560.c ieee80211_iterate_nodes(ic, rt2560_iter_func, sc);
sc 715 dev/ic/rt2560.c timeout_add(&sc->amrr_to, hz / 2);
sc 721 dev/ic/rt2560.c struct rt2560_softc *sc = ic->ic_softc;
sc 724 dev/ic/rt2560.c ieee80211_amrr_node_init(&sc->amrr, &((struct rt2560_node *)ni)->amn);
sc 736 dev/ic/rt2560.c struct rt2560_softc *sc = ic->ic_if.if_softc;
sc 743 dev/ic/rt2560.c timeout_del(&sc->scan_to);
sc 744 dev/ic/rt2560.c timeout_del(&sc->amrr_to);
sc 750 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR14, 0);
sc 753 dev/ic/rt2560.c rt2560_update_led(sc, 0, 0);
sc 758 dev/ic/rt2560.c rt2560_set_chan(sc, ic->ic_bss->ni_chan);
sc 759 dev/ic/rt2560.c timeout_add(&sc->scan_to, hz / 5);
sc 763 dev/ic/rt2560.c rt2560_set_chan(sc, ic->ic_bss->ni_chan);
sc 767 dev/ic/rt2560.c rt2560_set_chan(sc, ic->ic_bss->ni_chan);
sc 771 dev/ic/rt2560.c rt2560_set_chan(sc, ic->ic_bss->ni_chan);
sc 776 dev/ic/rt2560.c rt2560_update_plcp(sc);
sc 777 dev/ic/rt2560.c rt2560_set_slottime(sc);
sc 778 dev/ic/rt2560.c rt2560_set_basicrates(sc);
sc 779 dev/ic/rt2560.c rt2560_set_bssid(sc, ni->ni_bssid);
sc 787 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 792 dev/ic/rt2560.c error = rt2560_tx_bcn(sc, m, ni);
sc 798 dev/ic/rt2560.c rt2560_update_led(sc, 1, 0);
sc 808 dev/ic/rt2560.c timeout_add(&sc->amrr_to, hz / 2);
sc 810 dev/ic/rt2560.c rt2560_enable_tsf_sync(sc);
sc 815 dev/ic/rt2560.c return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg);
sc 823 dev/ic/rt2560.c rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr)
sc 830 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, 0);
sc 832 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S);
sc 833 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
sc 834 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S);
sc 837 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
sc 838 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
sc 841 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
sc 842 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
sc 843 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S);
sc 844 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
sc 847 dev/ic/rt2560.c n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7;
sc 849 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S |
sc 851 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S |
sc 855 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S);
sc 860 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
sc 861 dev/ic/rt2560.c tmp = RAL_READ(sc, RT2560_CSR21);
sc 863 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S);
sc 866 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, 0);
sc 869 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_S);
sc 870 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, 0);
sc 871 dev/ic/rt2560.c RT2560_EEPROM_CTL(sc, RT2560_C);
sc 881 dev/ic/rt2560.c rt2560_encryption_intr(struct rt2560_softc *sc)
sc 886 dev/ic/rt2560.c hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) /
sc 889 dev/ic/rt2560.c for (; sc->txq.next_encrypt != hw;) {
sc 891 dev/ic/rt2560.c &sc->txq.desc[sc->txq.next_encrypt];
sc 893 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
sc 894 dev/ic/rt2560.c sc->txq.next_encrypt * RT2560_TX_DESC_SIZE,
sc 909 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
sc 910 dev/ic/rt2560.c sc->txq.next_encrypt * RT2560_TX_DESC_SIZE,
sc 914 dev/ic/rt2560.c sc->txq.next_encrypt));
sc 916 dev/ic/rt2560.c sc->txq.next_encrypt =
sc 917 dev/ic/rt2560.c (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT;
sc 921 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX);
sc 925 dev/ic/rt2560.c rt2560_tx_intr(struct rt2560_softc *sc)
sc 927 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 931 dev/ic/rt2560.c struct rt2560_tx_desc *desc = &sc->txq.desc[sc->txq.next];
sc 932 dev/ic/rt2560.c struct rt2560_tx_data *data = &sc->txq.data[sc->txq.next];
sc 935 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
sc 936 dev/ic/rt2560.c sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
sc 973 dev/ic/rt2560.c sc->sc_dev.dv_xname, letoh32(desc->flags));
sc 977 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 979 dev/ic/rt2560.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 988 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
sc 989 dev/ic/rt2560.c sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
sc 992 dev/ic/rt2560.c DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next));
sc 994 dev/ic/rt2560.c sc->txq.queued--;
sc 995 dev/ic/rt2560.c sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT;
sc 998 dev/ic/rt2560.c sc->sc_tx_timer = 0;
sc 1004 dev/ic/rt2560.c rt2560_prio_intr(struct rt2560_softc *sc)
sc 1006 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 1010 dev/ic/rt2560.c struct rt2560_tx_desc *desc = &sc->prioq.desc[sc->prioq.next];
sc 1011 dev/ic/rt2560.c struct rt2560_tx_data *data = &sc->prioq.data[sc->prioq.next];
sc 1013 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
sc 1014 dev/ic/rt2560.c sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
sc 1040 dev/ic/rt2560.c sc->sc_dev.dv_xname, letoh32(desc->flags));
sc 1043 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 1045 dev/ic/rt2560.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 1054 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
sc 1055 dev/ic/rt2560.c sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
sc 1058 dev/ic/rt2560.c DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next));
sc 1060 dev/ic/rt2560.c sc->prioq.queued--;
sc 1061 dev/ic/rt2560.c sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT;
sc 1064 dev/ic/rt2560.c sc->sc_tx_timer = 0;
sc 1074 dev/ic/rt2560.c rt2560_decryption_intr(struct rt2560_softc *sc)
sc 1076 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 1084 dev/ic/rt2560.c hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) /
sc 1087 dev/ic/rt2560.c for (; sc->rxq.cur_decrypt != hw;) {
sc 1089 dev/ic/rt2560.c &sc->rxq.desc[sc->rxq.cur_decrypt];
sc 1091 dev/ic/rt2560.c &sc->rxq.data[sc->rxq.cur_decrypt];
sc 1093 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
sc 1094 dev/ic/rt2560.c sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE,
sc 1131 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 1133 dev/ic/rt2560.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 1135 dev/ic/rt2560.c error = bus_dmamap_load(sc->sc_dmat, data->map,
sc 1141 dev/ic/rt2560.c error = bus_dmamap_load(sc->sc_dmat, data->map,
sc 1147 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 1167 dev/ic/rt2560.c if (sc->sc_drvbpf != NULL) {
sc 1169 dev/ic/rt2560.c struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap;
sc 1173 dev/ic/rt2560.c tsf_hi = RAL_READ(sc, RT2560_CSR17);
sc 1174 dev/ic/rt2560.c tsf_lo = RAL_READ(sc, RT2560_CSR16);
sc 1183 dev/ic/rt2560.c tap->wr_antenna = sc->rx_ant;
sc 1187 dev/ic/rt2560.c mb.m_len = sc->sc_txtap_len;
sc 1192 dev/ic/rt2560.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
sc 1206 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
sc 1207 dev/ic/rt2560.c sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE,
sc 1210 dev/ic/rt2560.c DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt));
sc 1212 dev/ic/rt2560.c sc->rxq.cur_decrypt =
sc 1213 dev/ic/rt2560.c (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT;
sc 1229 dev/ic/rt2560.c rt2560_rx_intr(struct rt2560_softc *sc)
sc 1232 dev/ic/rt2560.c struct rt2560_rx_desc *desc = &sc->rxq.desc[sc->rxq.cur];
sc 1233 dev/ic/rt2560.c struct rt2560_rx_data *data = &sc->rxq.data[sc->rxq.cur];
sc 1235 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
sc 1236 dev/ic/rt2560.c sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE,
sc 1264 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
sc 1265 dev/ic/rt2560.c sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE,
sc 1268 dev/ic/rt2560.c DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur));
sc 1270 dev/ic/rt2560.c sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT;
sc 1274 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT);
sc 1282 dev/ic/rt2560.c rt2560_beacon_expire(struct rt2560_softc *sc)
sc 1284 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 1291 dev/ic/rt2560.c data = &sc->bcnq.data[sc->bcnq.next];
sc 1293 dev/ic/rt2560.c if (sc->sc_flags & RT2560_UPDATE_SLOT) {
sc 1294 dev/ic/rt2560.c sc->sc_flags &= ~RT2560_UPDATE_SLOT;
sc 1295 dev/ic/rt2560.c sc->sc_flags |= RT2560_SET_SLOTTIME;
sc 1296 dev/ic/rt2560.c } else if (sc->sc_flags & RT2560_SET_SLOTTIME) {
sc 1297 dev/ic/rt2560.c sc->sc_flags &= ~RT2560_SET_SLOTTIME;
sc 1298 dev/ic/rt2560.c rt2560_set_slottime(sc);
sc 1303 dev/ic/rt2560.c *sc->erp = ic->ic_bss->ni_erp;
sc 1304 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 1317 dev/ic/rt2560.c rt2560_wakeup_expire(struct rt2560_softc *sc)
sc 1325 dev/ic/rt2560.c struct rt2560_softc *sc = arg;
sc 1326 dev/ic/rt2560.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1329 dev/ic/rt2560.c if ((r = RAL_READ(sc, RT2560_CSR7)) == 0)
sc 1333 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
sc 1336 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR7, r);
sc 1343 dev/ic/rt2560.c rt2560_beacon_expire(sc);
sc 1346 dev/ic/rt2560.c rt2560_wakeup_expire(sc);
sc 1349 dev/ic/rt2560.c rt2560_encryption_intr(sc);
sc 1352 dev/ic/rt2560.c rt2560_tx_intr(sc);
sc 1355 dev/ic/rt2560.c rt2560_prio_intr(sc);
sc 1358 dev/ic/rt2560.c rt2560_decryption_intr(sc);
sc 1361 dev/ic/rt2560.c rt2560_rx_intr(sc);
sc 1364 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
sc 1497 dev/ic/rt2560.c rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc,
sc 1500 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 1542 dev/ic/rt2560.c rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0,
sc 1545 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 1550 dev/ic/rt2560.c desc = &sc->bcnq.desc[sc->bcnq.cur];
sc 1551 dev/ic/rt2560.c data = &sc->bcnq.data[sc->bcnq.cur];
sc 1553 dev/ic/rt2560.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
sc 1557 dev/ic/rt2560.c sc->sc_dev.dv_xname, error);
sc 1565 dev/ic/rt2560.c rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF |
sc 1569 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
sc 1571 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map,
sc 1572 dev/ic/rt2560.c sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
sc 1582 dev/ic/rt2560.c sc->erp =
sc 1598 dev/ic/rt2560.c rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0,
sc 1601 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 1610 dev/ic/rt2560.c desc = &sc->prioq.desc[sc->prioq.cur];
sc 1611 dev/ic/rt2560.c data = &sc->prioq.data[sc->prioq.cur];
sc 1624 dev/ic/rt2560.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
sc 1628 dev/ic/rt2560.c sc->sc_dev.dv_xname, error);
sc 1634 dev/ic/rt2560.c if (sc->sc_drvbpf != NULL) {
sc 1636 dev/ic/rt2560.c struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
sc 1642 dev/ic/rt2560.c tap->wt_antenna = sc->tx_ant;
sc 1645 dev/ic/rt2560.c mb.m_len = sc->sc_txtap_len;
sc 1650 dev/ic/rt2560.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 1673 dev/ic/rt2560.c rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0,
sc 1676 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
sc 1678 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
sc 1679 dev/ic/rt2560.c sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
sc 1683 dev/ic/rt2560.c m0->m_pkthdr.len, sc->prioq.cur, rate));
sc 1686 dev/ic/rt2560.c sc->prioq.queued++;
sc 1687 dev/ic/rt2560.c sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT;
sc 1688 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO);
sc 1694 dev/ic/rt2560.c rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0,
sc 1697 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 1699 dev/ic/rt2560.c struct rt2560_tx_ring *txq = &sc->txq;
sc 1777 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 1785 dev/ic/rt2560.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, mprot,
sc 1789 dev/ic/rt2560.c sc->sc_dev.dv_xname, error);
sc 1801 dev/ic/rt2560.c rt2560_setup_tx_desc(sc, desc,
sc 1806 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 1808 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, txq->map,
sc 1822 dev/ic/rt2560.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
sc 1826 dev/ic/rt2560.c sc->sc_dev.dv_xname, error);
sc 1853 dev/ic/rt2560.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
sc 1857 dev/ic/rt2560.c sc->sc_dev.dv_xname, error);
sc 1867 dev/ic/rt2560.c if (sc->sc_drvbpf != NULL) {
sc 1869 dev/ic/rt2560.c struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
sc 1875 dev/ic/rt2560.c tap->wt_antenna = sc->tx_ant;
sc 1878 dev/ic/rt2560.c mb.m_len = sc->sc_txtap_len;
sc 1883 dev/ic/rt2560.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 1898 dev/ic/rt2560.c rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1,
sc 1901 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
sc 1903 dev/ic/rt2560.c bus_dmamap_sync(sc->sc_dmat, txq->map,
sc 1914 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT);
sc 1922 dev/ic/rt2560.c struct rt2560_softc *sc = ifp->if_softc;
sc 1923 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 1937 dev/ic/rt2560.c if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) {
sc 1949 dev/ic/rt2560.c if (rt2560_tx_mgt(sc, m0, ni) != 0)
sc 1958 dev/ic/rt2560.c if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) {
sc 1974 dev/ic/rt2560.c if (rt2560_tx_data(sc, m0, ni) != 0) {
sc 1982 dev/ic/rt2560.c sc->sc_tx_timer = 5;
sc 1990 dev/ic/rt2560.c struct rt2560_softc *sc = ifp->if_softc;
sc 1994 dev/ic/rt2560.c if (sc->sc_tx_timer > 0) {
sc 1995 dev/ic/rt2560.c if (--sc->sc_tx_timer == 0) {
sc 1996 dev/ic/rt2560.c printf("%s: device timeout\n", sc->sc_dev.dv_xname);
sc 2010 dev/ic/rt2560.c struct rt2560_softc *sc = ifp->if_softc;
sc 2011 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 2030 dev/ic/rt2560.c rt2560_update_promisc(sc);
sc 2061 dev/ic/rt2560.c rt2560_set_chan(sc, ic->ic_ibss_chan);
sc 2083 dev/ic/rt2560.c rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val)
sc 2089 dev/ic/rt2560.c if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
sc 2094 dev/ic/rt2560.c printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname);
sc 2099 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_BBPCSR, tmp);
sc 2105 dev/ic/rt2560.c rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg)
sc 2111 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_BBPCSR, val);
sc 2114 dev/ic/rt2560.c val = RAL_READ(sc, RT2560_BBPCSR);
sc 2120 dev/ic/rt2560.c printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname);
sc 2125 dev/ic/rt2560.c rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val)
sc 2131 dev/ic/rt2560.c if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY))
sc 2136 dev/ic/rt2560.c printf("%s: could not write to RF\n", sc->sc_dev.dv_xname);
sc 2142 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RFCSR, tmp);
sc 2145 dev/ic/rt2560.c sc->rf_regs[reg] = val;
sc 2151 dev/ic/rt2560.c rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c)
sc 2153 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 2161 dev/ic/rt2560.c power = min(sc->txpow[chan - 1], 31);
sc 2165 dev/ic/rt2560.c switch (sc->rf_rev) {
sc 2167 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF1, 0x00814);
sc 2168 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]);
sc 2169 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
sc 2173 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF1, 0x08804);
sc 2174 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]);
sc 2175 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044);
sc 2176 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF4,
sc 2181 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF1, 0x0c808);
sc 2182 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]);
sc 2183 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
sc 2184 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF4,
sc 2189 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF1, 0x08808);
sc 2190 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]);
sc 2191 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
sc 2192 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF4,
sc 2195 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF1, 0x08808);
sc 2196 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]);
sc 2197 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
sc 2198 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF4,
sc 2203 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF1, 0x08808);
sc 2204 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]);
sc 2205 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
sc 2206 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF4,
sc 2211 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]);
sc 2212 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF4,
sc 2214 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF1, 0x08804);
sc 2216 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]);
sc 2217 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
sc 2218 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF4,
sc 2226 dev/ic/rt2560.c tmp = rt2560_bbp_read(sc, 70);
sc 2232 dev/ic/rt2560.c rt2560_bbp_write(sc, 70, tmp);
sc 2235 dev/ic/rt2560.c rt2560_disable_rf_tune(sc);
sc 2238 dev/ic/rt2560.c RAL_READ(sc, RT2560_CNT0);
sc 2246 dev/ic/rt2560.c rt2560_disable_rf_tune(struct rt2560_softc *sc)
sc 2250 dev/ic/rt2560.c if (sc->rf_rev != RT2560_RF_2523) {
sc 2251 dev/ic/rt2560.c tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE;
sc 2252 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF1, tmp);
sc 2255 dev/ic/rt2560.c tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE;
sc 2256 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF3, tmp);
sc 2266 dev/ic/rt2560.c rt2560_enable_tsf_sync(struct rt2560_softc *sc)
sc 2268 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 2273 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR14, 0);
sc 2276 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR12, tmp);
sc 2278 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR13, 0);
sc 2283 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_BCNOCSR, tmp);
sc 2292 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR14, tmp);
sc 2298 dev/ic/rt2560.c rt2560_update_plcp(struct rt2560_softc *sc)
sc 2300 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 2303 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400);
sc 2307 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401);
sc 2308 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402);
sc 2309 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403);
sc 2312 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409);
sc 2313 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a);
sc 2314 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b);
sc 2324 dev/ic/rt2560.c struct rt2560_softc *sc = ic->ic_if.if_softc;
sc 2332 dev/ic/rt2560.c sc->sc_flags |= RT2560_UPDATE_SLOT;
sc 2334 dev/ic/rt2560.c rt2560_set_slottime(sc);
sc 2342 dev/ic/rt2560.c rt2560_set_slottime(struct rt2560_softc *sc)
sc 2344 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 2357 dev/ic/rt2560.c tmp = RAL_READ(sc, RT2560_CSR11);
sc 2359 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR11, tmp);
sc 2362 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR18, tmp);
sc 2365 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR19, tmp);
sc 2371 dev/ic/rt2560.c rt2560_set_basicrates(struct rt2560_softc *sc)
sc 2373 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 2378 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3);
sc 2381 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0xf);
sc 2386 dev/ic/rt2560.c rt2560_update_led(struct rt2560_softc *sc, int led1, int led2)
sc 2392 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_LEDCSR, tmp);
sc 2396 dev/ic/rt2560.c rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid)
sc 2401 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR5, tmp);
sc 2404 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR6, tmp);
sc 2410 dev/ic/rt2560.c rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr)
sc 2415 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR3, tmp);
sc 2418 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR4, tmp);
sc 2424 dev/ic/rt2560.c rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr)
sc 2428 dev/ic/rt2560.c tmp = RAL_READ(sc, RT2560_CSR3);
sc 2434 dev/ic/rt2560.c tmp = RAL_READ(sc, RT2560_CSR4);
sc 2440 dev/ic/rt2560.c rt2560_update_promisc(struct rt2560_softc *sc)
sc 2442 dev/ic/rt2560.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 2445 dev/ic/rt2560.c tmp = RAL_READ(sc, RT2560_RXCSR0);
sc 2451 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RXCSR0, tmp);
sc 2458 dev/ic/rt2560.c rt2560_set_txantenna(struct rt2560_softc *sc, int antenna)
sc 2463 dev/ic/rt2560.c tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK;
sc 2472 dev/ic/rt2560.c if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 ||
sc 2473 dev/ic/rt2560.c sc->rf_rev == RT2560_RF_5222)
sc 2476 dev/ic/rt2560.c rt2560_bbp_write(sc, RT2560_BBP_TX, tx);
sc 2479 dev/ic/rt2560.c tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007;
sc 2481 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_BBPCSR1, tmp);
sc 2485 dev/ic/rt2560.c rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna)
sc 2489 dev/ic/rt2560.c rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK;
sc 2498 dev/ic/rt2560.c if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526)
sc 2501 dev/ic/rt2560.c rt2560_bbp_write(sc, RT2560_BBP_RX, rx);
sc 2520 dev/ic/rt2560.c rt2560_read_eeprom(struct rt2560_softc *sc)
sc 2525 dev/ic/rt2560.c val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0);
sc 2526 dev/ic/rt2560.c sc->rf_rev = (val >> 11) & 0x1f;
sc 2527 dev/ic/rt2560.c sc->hw_radio = (val >> 10) & 0x1;
sc 2528 dev/ic/rt2560.c sc->led_mode = (val >> 6) & 0x7;
sc 2529 dev/ic/rt2560.c sc->rx_ant = (val >> 4) & 0x3;
sc 2530 dev/ic/rt2560.c sc->tx_ant = (val >> 2) & 0x3;
sc 2531 dev/ic/rt2560.c sc->nb_ant = val & 0x3;
sc 2535 dev/ic/rt2560.c val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i);
sc 2536 dev/ic/rt2560.c sc->bbp_prom[i].reg = val >> 8;
sc 2537 dev/ic/rt2560.c sc->bbp_prom[i].val = val & 0xff;
sc 2542 dev/ic/rt2560.c val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i);
sc 2543 dev/ic/rt2560.c sc->txpow[i * 2] = val >> 8;
sc 2544 dev/ic/rt2560.c sc->txpow[i * 2 + 1] = val & 0xff;
sc 2549 dev/ic/rt2560.c rt2560_bbp_init(struct rt2560_softc *sc)
sc 2556 dev/ic/rt2560.c if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0)
sc 2561 dev/ic/rt2560.c printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname);
sc 2567 dev/ic/rt2560.c rt2560_bbp_write(sc, rt2560_def_bbp[i].reg,
sc 2573 dev/ic/rt2560.c if (sc->bbp_prom[i].reg == 0xff)
sc 2575 dev/ic/rt2560.c rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
sc 2587 dev/ic/rt2560.c struct rt2560_softc *sc = ifp->if_softc;
sc 2588 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 2593 dev/ic/rt2560.c if (!(sc->sc_flags & RT2560_ENABLED)) {
sc 2594 dev/ic/rt2560.c if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
sc 2596 dev/ic/rt2560.c sc->sc_dev.dv_xname);
sc 2599 dev/ic/rt2560.c sc->sc_flags |= RT2560_ENABLED;
sc 2611 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR2, tmp);
sc 2612 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr);
sc 2613 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr);
sc 2614 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr);
sc 2615 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr);
sc 2620 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RXCSR1, tmp);
sc 2621 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr);
sc 2625 dev/ic/rt2560.c RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val);
sc 2628 dev/ic/rt2560.c rt2560_set_macaddr(sc, ic->ic_myaddr);
sc 2631 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153);
sc 2633 dev/ic/rt2560.c rt2560_set_txantenna(sc, 1);
sc 2634 dev/ic/rt2560.c rt2560_set_rxantenna(sc, 1);
sc 2635 dev/ic/rt2560.c rt2560_set_slottime(sc);
sc 2636 dev/ic/rt2560.c rt2560_update_plcp(sc);
sc 2637 dev/ic/rt2560.c rt2560_update_led(sc, 0, 0);
sc 2639 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
sc 2640 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY);
sc 2642 dev/ic/rt2560.c if (rt2560_bbp_init(sc) != 0) {
sc 2649 dev/ic/rt2560.c rt2560_set_chan(sc, ic->ic_bss->ni_chan);
sc 2660 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RXCSR0, tmp);
sc 2663 dev/ic/rt2560.c RAL_READ(sc, RT2560_CNT0);
sc 2664 dev/ic/rt2560.c RAL_READ(sc, RT2560_CNT4);
sc 2667 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
sc 2670 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
sc 2687 dev/ic/rt2560.c struct rt2560_softc *sc = ifp->if_softc;
sc 2688 dev/ic/rt2560.c struct ieee80211com *ic = &sc->sc_ic;
sc 2690 dev/ic/rt2560.c sc->sc_tx_timer = 0;
sc 2697 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX);
sc 2700 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX);
sc 2703 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
sc 2704 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR1, 0);
sc 2707 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
sc 2710 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
sc 2713 dev/ic/rt2560.c rt2560_reset_tx_ring(sc, &sc->txq);
sc 2714 dev/ic/rt2560.c rt2560_reset_tx_ring(sc, &sc->atimq);
sc 2715 dev/ic/rt2560.c rt2560_reset_tx_ring(sc, &sc->prioq);
sc 2716 dev/ic/rt2560.c rt2560_reset_tx_ring(sc, &sc->bcnq);
sc 2717 dev/ic/rt2560.c rt2560_reset_rx_ring(sc, &sc->rxq);
sc 2720 dev/ic/rt2560.c if (disable && sc->sc_disable != NULL) {
sc 2721 dev/ic/rt2560.c if (sc->sc_flags & RT2560_ENABLED) {
sc 2722 dev/ic/rt2560.c (*sc->sc_disable)(sc);
sc 2723 dev/ic/rt2560.c sc->sc_flags &= ~RT2560_ENABLED;
sc 2731 dev/ic/rt2560.c struct rt2560_softc *sc = arg;
sc 2732 dev/ic/rt2560.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 2735 dev/ic/rt2560.c DPRINTF(("%s: rt2560_power(%d)\n", sc->sc_dev.dv_xname, why));
sc 2742 dev/ic/rt2560.c if (sc->sc_power != NULL)
sc 2743 dev/ic/rt2560.c (*sc->sc_power)(sc, why);
sc 2748 dev/ic/rt2560.c if (sc->sc_power != NULL)
sc 2749 dev/ic/rt2560.c (*sc->sc_power)(sc, why);
sc 2761 dev/ic/rt2560.c struct rt2560_softc *sc = arg;
sc 2763 dev/ic/rt2560.c rt2560_stop(&sc->sc_ic.ic_if, 1);
sc 303 dev/ic/rt2560reg.h #define RAL_READ(sc, reg) \
sc 304 dev/ic/rt2560reg.h bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
sc 306 dev/ic/rt2560reg.h #define RAL_WRITE(sc, reg, val) \
sc 307 dev/ic/rt2560reg.h bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sc 312 dev/ic/rt2560reg.h #define RT2560_EEPROM_CTL(sc, val) do { \
sc 313 dev/ic/rt2560reg.h RAL_WRITE((sc), RT2560_CSR21, (val)); \
sc 185 dev/ic/rt2661.c struct rt2661_softc *sc = xsc;
sc 186 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 191 dev/ic/rt2661.c sc->sc_id = id;
sc 193 dev/ic/rt2661.c sc->amrr.amrr_min_success_threshold = 1;
sc 194 dev/ic/rt2661.c sc->amrr.amrr_max_success_threshold = 15;
sc 195 dev/ic/rt2661.c timeout_set(&sc->amrr_to, rt2661_updatestats, sc);
sc 196 dev/ic/rt2661.c timeout_set(&sc->scan_to, rt2661_next_scan, sc);
sc 200 dev/ic/rt2661.c if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
sc 206 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 211 dev/ic/rt2661.c rt2661_read_eeprom(sc);
sc 214 dev/ic/rt2661.c printf("%s: MAC/BBP RT%X, RF %s\n", sc->sc_dev.dv_xname, val,
sc 215 dev/ic/rt2661.c rt2661_get_rf(sc->rf_rev));
sc 221 dev/ic/rt2661.c error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
sc 225 dev/ic/rt2661.c sc->sc_dev.dv_xname, ac);
sc 230 dev/ic/rt2661.c error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
sc 233 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 237 dev/ic/rt2661.c error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
sc 240 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 258 dev/ic/rt2661.c if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) {
sc 294 dev/ic/rt2661.c ifp->if_softc = sc;
sc 301 dev/ic/rt2661.c memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 310 dev/ic/rt2661.c sc->sc_newstate = ic->ic_newstate;
sc 315 dev/ic/rt2661.c bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
sc 318 dev/ic/rt2661.c sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
sc 319 dev/ic/rt2661.c sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
sc 320 dev/ic/rt2661.c sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2661_RX_RADIOTAP_PRESENT);
sc 322 dev/ic/rt2661.c sc->sc_txtap_len = sizeof sc->sc_txtapu;
sc 323 dev/ic/rt2661.c sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
sc 324 dev/ic/rt2661.c sc->sc_txtap.wt_ihdr.it_present = htole32(RT2661_TX_RADIOTAP_PRESENT);
sc 330 dev/ic/rt2661.c sc->sc_sdhook = shutdownhook_establish(rt2661_shutdown, sc);
sc 331 dev/ic/rt2661.c if (sc->sc_sdhook == NULL) {
sc 333 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 335 dev/ic/rt2661.c sc->sc_powerhook = powerhook_establish(rt2661_power, sc);
sc 336 dev/ic/rt2661.c if (sc->sc_powerhook == NULL) {
sc 338 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 343 dev/ic/rt2661.c fail2: rt2661_free_tx_ring(sc, &sc->mgtq);
sc 345 dev/ic/rt2661.c rt2661_free_tx_ring(sc, &sc->txq[ac]);
sc 352 dev/ic/rt2661.c struct rt2661_softc *sc = xsc;
sc 353 dev/ic/rt2661.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 356 dev/ic/rt2661.c timeout_del(&sc->scan_to);
sc 357 dev/ic/rt2661.c timeout_del(&sc->amrr_to);
sc 362 dev/ic/rt2661.c if (sc->sc_powerhook != NULL)
sc 363 dev/ic/rt2661.c powerhook_disestablish(sc->sc_powerhook);
sc 364 dev/ic/rt2661.c if (sc->sc_sdhook != NULL)
sc 365 dev/ic/rt2661.c shutdownhook_disestablish(sc->sc_sdhook);
sc 368 dev/ic/rt2661.c rt2661_free_tx_ring(sc, &sc->txq[ac]);
sc 369 dev/ic/rt2661.c rt2661_free_tx_ring(sc, &sc->mgtq);
sc 370 dev/ic/rt2661.c rt2661_free_rx_ring(sc, &sc->rxq);
sc 376 dev/ic/rt2661.c rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
sc 385 dev/ic/rt2661.c error = bus_dmamap_create(sc->sc_dmat, count * RT2661_TX_DESC_SIZE, 1,
sc 389 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 393 dev/ic/rt2661.c error = bus_dmamem_alloc(sc->sc_dmat, count * RT2661_TX_DESC_SIZE,
sc 397 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 401 dev/ic/rt2661.c error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
sc 406 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 410 dev/ic/rt2661.c error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
sc 414 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 425 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 432 dev/ic/rt2661.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 437 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 444 dev/ic/rt2661.c fail: rt2661_free_tx_ring(sc, ring);
sc 449 dev/ic/rt2661.c rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
sc 458 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 460 dev/ic/rt2661.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 474 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
sc 482 dev/ic/rt2661.c rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
sc 487 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
sc 489 dev/ic/rt2661.c bus_dmamap_unload(sc->sc_dmat, ring->map);
sc 490 dev/ic/rt2661.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,
sc 492 dev/ic/rt2661.c bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
sc 500 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 503 dev/ic/rt2661.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 513 dev/ic/rt2661.c bus_dmamap_destroy(sc->sc_dmat, data->map);
sc 520 dev/ic/rt2661.c rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
sc 528 dev/ic/rt2661.c error = bus_dmamap_create(sc->sc_dmat, count * RT2661_RX_DESC_SIZE, 1,
sc 532 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 536 dev/ic/rt2661.c error = bus_dmamem_alloc(sc->sc_dmat, count * RT2661_RX_DESC_SIZE,
sc 540 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 544 dev/ic/rt2661.c error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
sc 549 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 553 dev/ic/rt2661.c error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
sc 557 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 568 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 578 dev/ic/rt2661.c struct rt2661_rx_desc *desc = &sc->rxq.desc[i];
sc 579 dev/ic/rt2661.c struct rt2661_rx_data *data = &sc->rxq.data[i];
sc 581 dev/ic/rt2661.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
sc 585 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 592 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 599 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 604 dev/ic/rt2661.c error = bus_dmamap_load(sc->sc_dmat, data->map,
sc 608 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 616 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
sc 621 dev/ic/rt2661.c fail: rt2661_free_rx_ring(sc, ring);
sc 626 dev/ic/rt2661.c rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
sc 633 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
sc 640 dev/ic/rt2661.c rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
sc 645 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
sc 647 dev/ic/rt2661.c bus_dmamap_unload(sc->sc_dmat, ring->map);
sc 648 dev/ic/rt2661.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,
sc 650 dev/ic/rt2661.c bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
sc 658 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 661 dev/ic/rt2661.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 666 dev/ic/rt2661.c bus_dmamap_destroy(sc->sc_dmat, data->map);
sc 705 dev/ic/rt2661.c struct rt2661_softc *sc = arg;
sc 706 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 722 dev/ic/rt2661.c struct rt2661_softc *sc = arg;
sc 725 dev/ic/rt2661.c ieee80211_amrr_choose(&sc->amrr, ni, &rn->amn);
sc 735 dev/ic/rt2661.c struct rt2661_softc *sc = arg;
sc 736 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 741 dev/ic/rt2661.c rt2661_iter_func(sc, ic->ic_bss);
sc 746 dev/ic/rt2661.c if (++sc->ncalls & 1)
sc 747 dev/ic/rt2661.c rt2661_rx_tune(sc);
sc 750 dev/ic/rt2661.c timeout_add(&sc->amrr_to, hz / 2);
sc 756 dev/ic/rt2661.c struct rt2661_softc *sc = ic->ic_softc;
sc 759 dev/ic/rt2661.c ieee80211_amrr_node_init(&sc->amrr, &((struct rt2661_node *)ni)->amn);
sc 771 dev/ic/rt2661.c struct rt2661_softc *sc = ic->ic_if.if_softc;
sc 778 dev/ic/rt2661.c timeout_del(&sc->scan_to);
sc 779 dev/ic/rt2661.c timeout_del(&sc->amrr_to);
sc 785 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
sc 786 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
sc 791 dev/ic/rt2661.c rt2661_set_chan(sc, ic->ic_bss->ni_chan);
sc 792 dev/ic/rt2661.c timeout_add(&sc->scan_to, hz / 5);
sc 797 dev/ic/rt2661.c rt2661_set_chan(sc, ic->ic_bss->ni_chan);
sc 801 dev/ic/rt2661.c rt2661_set_chan(sc, ic->ic_bss->ni_chan);
sc 806 dev/ic/rt2661.c rt2661_set_slottime(sc);
sc 807 dev/ic/rt2661.c rt2661_enable_mrr(sc);
sc 808 dev/ic/rt2661.c rt2661_set_txpreamble(sc);
sc 809 dev/ic/rt2661.c rt2661_set_basicrates(sc);
sc 810 dev/ic/rt2661.c rt2661_set_bssid(sc, ni->ni_bssid);
sc 815 dev/ic/rt2661.c rt2661_prepare_beacon(sc);
sc 823 dev/ic/rt2661.c sc->ncalls = 0;
sc 824 dev/ic/rt2661.c sc->avg_rssi = -95; /* reset EMA */
sc 825 dev/ic/rt2661.c timeout_add(&sc->amrr_to, hz / 2);
sc 826 dev/ic/rt2661.c rt2661_enable_tsf_sync(sc);
sc 831 dev/ic/rt2661.c return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg);
sc 839 dev/ic/rt2661.c rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
sc 846 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, 0);
sc 848 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S);
sc 849 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
sc 850 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S);
sc 853 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
sc 854 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
sc 857 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
sc 858 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
sc 859 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S);
sc 860 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
sc 863 dev/ic/rt2661.c n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
sc 865 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S |
sc 867 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S |
sc 871 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S);
sc 876 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
sc 877 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
sc 879 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S);
sc 882 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, 0);
sc 885 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_S);
sc 886 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, 0);
sc 887 dev/ic/rt2661.c RT2661_EEPROM_CTL(sc, RT2661_C);
sc 893 dev/ic/rt2661.c rt2661_tx_intr(struct rt2661_softc *sc)
sc 895 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 903 dev/ic/rt2661.c const uint32_t val = RAL_READ(sc, RT2661_STA_CSR4);
sc 909 dev/ic/rt2661.c txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
sc 942 dev/ic/rt2661.c sc->sc_dev.dv_xname, val);
sc 956 dev/ic/rt2661.c sc->sc_tx_timer = 0;
sc 962 dev/ic/rt2661.c rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
sc 968 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, txq->map,
sc 976 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 978 dev/ic/rt2661.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 986 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, txq->map,
sc 998 dev/ic/rt2661.c rt2661_rx_intr(struct rt2661_softc *sc)
sc 1000 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 1008 dev/ic/rt2661.c struct rt2661_rx_desc *desc = &sc->rxq.desc[sc->rxq.cur];
sc 1009 dev/ic/rt2661.c struct rt2661_rx_data *data = &sc->rxq.data[sc->rxq.cur];
sc 1011 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
sc 1012 dev/ic/rt2661.c sc->rxq.cur * RT2661_RX_DESC_SIZE, RT2661_RX_DESC_SIZE,
sc 1054 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 1056 dev/ic/rt2661.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 1058 dev/ic/rt2661.c error = bus_dmamap_load(sc->sc_dmat, data->map,
sc 1064 dev/ic/rt2661.c error = bus_dmamap_load(sc->sc_dmat, data->map,
sc 1070 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 1090 dev/ic/rt2661.c if (sc->sc_drvbpf != NULL) {
sc 1092 dev/ic/rt2661.c struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
sc 1096 dev/ic/rt2661.c tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
sc 1097 dev/ic/rt2661.c tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
sc 1103 dev/ic/rt2661.c tap->wr_chan_freq = htole16(sc->sc_curchan->ic_freq);
sc 1104 dev/ic/rt2661.c tap->wr_chan_flags = htole16(sc->sc_curchan->ic_flags);
sc 1108 dev/ic/rt2661.c mb.m_len = sc->sc_rxtap_len;
sc 1113 dev/ic/rt2661.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
sc 1128 dev/ic/rt2661.c rssi = rt2661_get_rssi(sc, desc->rssi);
sc 1129 dev/ic/rt2661.c sc->avg_rssi = (rssi + 7 * sc->avg_rssi) / 8;
sc 1136 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
sc 1137 dev/ic/rt2661.c sc->rxq.cur * RT2661_RX_DESC_SIZE, RT2661_RX_DESC_SIZE,
sc 1140 dev/ic/rt2661.c DPRINTFN(15, ("rx intr idx=%u\n", sc->rxq.cur));
sc 1142 dev/ic/rt2661.c sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
sc 1158 dev/ic/rt2661.c rt2661_mcu_beacon_expire(struct rt2661_softc *sc)
sc 1160 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 1162 dev/ic/rt2661.c if (sc->sc_flags & RT2661_UPDATE_SLOT) {
sc 1163 dev/ic/rt2661.c sc->sc_flags &= ~RT2661_UPDATE_SLOT;
sc 1164 dev/ic/rt2661.c sc->sc_flags |= RT2661_SET_SLOTTIME;
sc 1165 dev/ic/rt2661.c } else if (sc->sc_flags & RT2661_SET_SLOTTIME) {
sc 1166 dev/ic/rt2661.c sc->sc_flags &= ~RT2661_SET_SLOTTIME;
sc 1167 dev/ic/rt2661.c rt2661_set_slottime(sc);
sc 1172 dev/ic/rt2661.c RAL_WRITE_1(sc, sc->erp_csr, ic->ic_bss->ni_erp);
sc 1173 dev/ic/rt2661.c RAL_RW_BARRIER_1(sc, sc->erp_csr);
sc 1180 dev/ic/rt2661.c rt2661_mcu_wakeup(struct rt2661_softc *sc)
sc 1182 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
sc 1184 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
sc 1185 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
sc 1186 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
sc 1189 dev/ic/rt2661.c rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
sc 1193 dev/ic/rt2661.c rt2661_mcu_cmd_intr(struct rt2661_softc *sc)
sc 1195 dev/ic/rt2661.c RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
sc 1196 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
sc 1202 dev/ic/rt2661.c struct rt2661_softc *sc = arg;
sc 1203 dev/ic/rt2661.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1206 dev/ic/rt2661.c r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
sc 1207 dev/ic/rt2661.c r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
sc 1212 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
sc 1213 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
sc 1216 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
sc 1217 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
sc 1224 dev/ic/rt2661.c rt2661_tx_dma_intr(sc, &sc->mgtq);
sc 1227 dev/ic/rt2661.c rt2661_rx_intr(sc);
sc 1230 dev/ic/rt2661.c rt2661_tx_dma_intr(sc, &sc->txq[0]);
sc 1233 dev/ic/rt2661.c rt2661_tx_dma_intr(sc, &sc->txq[1]);
sc 1236 dev/ic/rt2661.c rt2661_tx_dma_intr(sc, &sc->txq[2]);
sc 1239 dev/ic/rt2661.c rt2661_tx_dma_intr(sc, &sc->txq[3]);
sc 1242 dev/ic/rt2661.c rt2661_tx_intr(sc);
sc 1245 dev/ic/rt2661.c rt2661_mcu_cmd_intr(sc);
sc 1248 dev/ic/rt2661.c rt2661_mcu_beacon_expire(sc);
sc 1251 dev/ic/rt2661.c rt2661_mcu_wakeup(sc);
sc 1254 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
sc 1255 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
sc 1384 dev/ic/rt2661.c rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
sc 1388 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 1445 dev/ic/rt2661.c rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
sc 1448 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 1457 dev/ic/rt2661.c desc = &sc->mgtq.desc[sc->mgtq.cur];
sc 1458 dev/ic/rt2661.c data = &sc->mgtq.data[sc->mgtq.cur];
sc 1474 dev/ic/rt2661.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
sc 1478 dev/ic/rt2661.c sc->sc_dev.dv_xname, error);
sc 1484 dev/ic/rt2661.c if (sc->sc_drvbpf != NULL) {
sc 1486 dev/ic/rt2661.c struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
sc 1490 dev/ic/rt2661.c tap->wt_chan_freq = htole16(sc->sc_curchan->ic_freq);
sc 1491 dev/ic/rt2661.c tap->wt_chan_flags = htole16(sc->sc_curchan->ic_flags);
sc 1494 dev/ic/rt2661.c mb.m_len = sc->sc_txtap_len;
sc 1499 dev/ic/rt2661.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 1510 dev/ic/rt2661.c sc->sifs;
sc 1520 dev/ic/rt2661.c rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
sc 1524 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
sc 1526 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, sc->mgtq.map,
sc 1527 dev/ic/rt2661.c sc->mgtq.cur * RT2661_TX_DESC_SIZE, RT2661_TX_DESC_SIZE,
sc 1531 dev/ic/rt2661.c m0->m_pkthdr.len, sc->mgtq.cur, rate));
sc 1534 dev/ic/rt2661.c sc->mgtq.queued++;
sc 1535 dev/ic/rt2661.c sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
sc 1536 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
sc 1542 dev/ic/rt2661.c rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
sc 1545 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 1547 dev/ic/rt2661.c struct rt2661_tx_ring *txq = &sc->txq[ac];
sc 1613 dev/ic/rt2661.c 2 * sc->sifs;
sc 1616 dev/ic/rt2661.c protrate), ic->ic_flags) + sc->sifs;
sc 1623 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 1631 dev/ic/rt2661.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, mprot,
sc 1635 dev/ic/rt2661.c sc->sc_dev.dv_xname, error);
sc 1647 dev/ic/rt2661.c rt2661_setup_tx_desc(sc, desc,
sc 1652 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 1654 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, txq->map,
sc 1667 dev/ic/rt2661.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
sc 1671 dev/ic/rt2661.c sc->sc_dev.dv_xname, error);
sc 1698 dev/ic/rt2661.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
sc 1702 dev/ic/rt2661.c sc->sc_dev.dv_xname, error);
sc 1712 dev/ic/rt2661.c if (sc->sc_drvbpf != NULL) {
sc 1714 dev/ic/rt2661.c struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
sc 1718 dev/ic/rt2661.c tap->wt_chan_freq = htole16(sc->sc_curchan->ic_freq);
sc 1719 dev/ic/rt2661.c tap->wt_chan_flags = htole16(sc->sc_curchan->ic_flags);
sc 1722 dev/ic/rt2661.c mb.m_len = sc->sc_txtap_len;
sc 1727 dev/ic/rt2661.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 1738 dev/ic/rt2661.c ic->ic_flags) + sc->sifs;
sc 1742 dev/ic/rt2661.c rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate,
sc 1745 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
sc 1747 dev/ic/rt2661.c bus_dmamap_sync(sc->sc_dmat, txq->map, txq->cur * RT2661_TX_DESC_SIZE,
sc 1756 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1);
sc 1764 dev/ic/rt2661.c struct rt2661_softc *sc = ifp->if_softc;
sc 1765 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 1779 dev/ic/rt2661.c if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
sc 1791 dev/ic/rt2661.c if (rt2661_tx_mgt(sc, m0, ni) != 0)
sc 1800 dev/ic/rt2661.c if (sc->txq[0].queued >= RT2661_TX_RING_COUNT - 1) {
sc 1818 dev/ic/rt2661.c if (rt2661_tx_data(sc, m0, ni, 0) != 0) {
sc 1826 dev/ic/rt2661.c sc->sc_tx_timer = 5;
sc 1834 dev/ic/rt2661.c struct rt2661_softc *sc = ifp->if_softc;
sc 1838 dev/ic/rt2661.c if (sc->sc_tx_timer > 0) {
sc 1839 dev/ic/rt2661.c if (--sc->sc_tx_timer == 0) {
sc 1840 dev/ic/rt2661.c printf("%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1854 dev/ic/rt2661.c struct rt2661_softc *sc = ifp->if_softc;
sc 1855 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 1874 dev/ic/rt2661.c rt2661_update_promisc(sc);
sc 1905 dev/ic/rt2661.c rt2661_set_chan(sc, ic->ic_ibss_chan);
sc 1927 dev/ic/rt2661.c rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
sc 1933 dev/ic/rt2661.c if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
sc 1938 dev/ic/rt2661.c printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname);
sc 1943 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
sc 1949 dev/ic/rt2661.c rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
sc 1955 dev/ic/rt2661.c if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
sc 1960 dev/ic/rt2661.c printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname);
sc 1965 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_PHY_CSR3, val);
sc 1968 dev/ic/rt2661.c val = RAL_READ(sc, RT2661_PHY_CSR3);
sc 1974 dev/ic/rt2661.c printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname);
sc 1979 dev/ic/rt2661.c rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
sc 1985 dev/ic/rt2661.c if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
sc 1990 dev/ic/rt2661.c printf("%s: could not write to RF\n", sc->sc_dev.dv_xname);
sc 1996 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
sc 1999 dev/ic/rt2661.c sc->rf_regs[reg] = val;
sc 2005 dev/ic/rt2661.c rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
sc 2007 dev/ic/rt2661.c if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
sc 2010 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
sc 2013 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
sc 2019 dev/ic/rt2661.c rt2661_select_antenna(struct rt2661_softc *sc)
sc 2024 dev/ic/rt2661.c bbp4 = rt2661_bbp_read(sc, 4);
sc 2025 dev/ic/rt2661.c bbp77 = rt2661_bbp_read(sc, 77);
sc 2030 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
sc 2031 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
sc 2033 dev/ic/rt2661.c rt2661_bbp_write(sc, 4, bbp4);
sc 2034 dev/ic/rt2661.c rt2661_bbp_write(sc, 77, bbp77);
sc 2037 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
sc 2045 dev/ic/rt2661.c rt2661_enable_mrr(struct rt2661_softc *sc)
sc 2047 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 2050 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
sc 2057 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
sc 2061 dev/ic/rt2661.c rt2661_set_txpreamble(struct rt2661_softc *sc)
sc 2065 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
sc 2068 dev/ic/rt2661.c if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
sc 2071 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
sc 2075 dev/ic/rt2661.c rt2661_set_basicrates(struct rt2661_softc *sc)
sc 2077 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 2082 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR5, 0x3);
sc 2085 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR5, 0x150);
sc 2088 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR5, 0xf);
sc 2097 dev/ic/rt2661.c rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
sc 2109 dev/ic/rt2661.c if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
sc 2110 dev/ic/rt2661.c (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
sc 2114 dev/ic/rt2661.c sc->bbp17 = bbp17;
sc 2115 dev/ic/rt2661.c rt2661_bbp_write(sc, 17, bbp17);
sc 2116 dev/ic/rt2661.c rt2661_bbp_write(sc, 96, bbp96);
sc 2117 dev/ic/rt2661.c rt2661_bbp_write(sc, 104, bbp104);
sc 2119 dev/ic/rt2661.c if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
sc 2120 dev/ic/rt2661.c (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
sc 2121 dev/ic/rt2661.c rt2661_bbp_write(sc, 75, 0x80);
sc 2122 dev/ic/rt2661.c rt2661_bbp_write(sc, 86, 0x80);
sc 2123 dev/ic/rt2661.c rt2661_bbp_write(sc, 88, 0x80);
sc 2126 dev/ic/rt2661.c rt2661_bbp_write(sc, 35, bbp35);
sc 2127 dev/ic/rt2661.c rt2661_bbp_write(sc, 97, bbp97);
sc 2128 dev/ic/rt2661.c rt2661_bbp_write(sc, 98, bbp98);
sc 2130 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_PHY_CSR0);
sc 2136 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
sc 2139 dev/ic/rt2661.c sc->sifs = IEEE80211_IS_CHAN_5GHZ(c) ? 16 : 10;
sc 2143 dev/ic/rt2661.c rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
sc 2145 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 2156 dev/ic/rt2661.c rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
sc 2161 dev/ic/rt2661.c power = sc->txpow[i];
sc 2174 dev/ic/rt2661.c if (c->ic_flags != sc->sc_curchan->ic_flags) {
sc 2175 dev/ic/rt2661.c rt2661_select_band(sc, c);
sc 2176 dev/ic/rt2661.c rt2661_select_antenna(sc);
sc 2178 dev/ic/rt2661.c sc->sc_curchan = c;
sc 2180 dev/ic/rt2661.c rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
sc 2181 dev/ic/rt2661.c rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
sc 2182 dev/ic/rt2661.c rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
sc 2183 dev/ic/rt2661.c rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
sc 2187 dev/ic/rt2661.c rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
sc 2188 dev/ic/rt2661.c rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
sc 2189 dev/ic/rt2661.c rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
sc 2190 dev/ic/rt2661.c rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
sc 2194 dev/ic/rt2661.c rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
sc 2195 dev/ic/rt2661.c rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
sc 2196 dev/ic/rt2661.c rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
sc 2197 dev/ic/rt2661.c rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
sc 2200 dev/ic/rt2661.c bbp3 = rt2661_bbp_read(sc, 3);
sc 2203 dev/ic/rt2661.c if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
sc 2206 dev/ic/rt2661.c rt2661_bbp_write(sc, 3, bbp3);
sc 2209 dev/ic/rt2661.c rt2661_bbp_write(sc, 94, bbp94);
sc 2217 dev/ic/rt2661.c rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
sc 2222 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
sc 2225 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
sc 2229 dev/ic/rt2661.c rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
sc 2234 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
sc 2237 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
sc 2241 dev/ic/rt2661.c rt2661_update_promisc(struct rt2661_softc *sc)
sc 2243 dev/ic/rt2661.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 2246 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
sc 2252 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
sc 2261 dev/ic/rt2661.c struct rt2661_softc *sc = ic->ic_if.if_softc;
sc 2269 dev/ic/rt2661.c sc->sc_flags |= RT2661_UPDATE_SLOT;
sc 2271 dev/ic/rt2661.c rt2661_set_slottime(sc);
sc 2275 dev/ic/rt2661.c rt2661_set_slottime(struct rt2661_softc *sc)
sc 2277 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 2283 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_MAC_CSR9);
sc 2285 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
sc 2303 dev/ic/rt2661.c rt2661_read_eeprom(struct rt2661_softc *sc)
sc 2305 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 2310 dev/ic/rt2661.c val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
sc 2314 dev/ic/rt2661.c val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
sc 2318 dev/ic/rt2661.c val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
sc 2322 dev/ic/rt2661.c val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
sc 2324 dev/ic/rt2661.c sc->rf_rev = (val >> 11) & 0x1f;
sc 2325 dev/ic/rt2661.c sc->hw_radio = (val >> 10) & 0x1;
sc 2326 dev/ic/rt2661.c sc->rx_ant = (val >> 4) & 0x3;
sc 2327 dev/ic/rt2661.c sc->tx_ant = (val >> 2) & 0x3;
sc 2328 dev/ic/rt2661.c sc->nb_ant = val & 0x3;
sc 2330 dev/ic/rt2661.c DPRINTF(("RF revision=%d\n", sc->rf_rev));
sc 2332 dev/ic/rt2661.c val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
sc 2333 dev/ic/rt2661.c sc->ext_5ghz_lna = (val >> 6) & 0x1;
sc 2334 dev/ic/rt2661.c sc->ext_2ghz_lna = (val >> 4) & 0x1;
sc 2337 dev/ic/rt2661.c sc->ext_2ghz_lna, sc->ext_5ghz_lna));
sc 2339 dev/ic/rt2661.c val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
sc 2341 dev/ic/rt2661.c sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
sc 2343 dev/ic/rt2661.c val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
sc 2345 dev/ic/rt2661.c sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
sc 2348 dev/ic/rt2661.c if (sc->ext_2ghz_lna)
sc 2349 dev/ic/rt2661.c sc->rssi_2ghz_corr -= 14;
sc 2350 dev/ic/rt2661.c if (sc->ext_5ghz_lna)
sc 2351 dev/ic/rt2661.c sc->rssi_5ghz_corr -= 14;
sc 2354 dev/ic/rt2661.c sc->rssi_2ghz_corr, sc->rssi_5ghz_corr));
sc 2356 dev/ic/rt2661.c val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
sc 2358 dev/ic/rt2661.c sc->rfprog = (val >> 8) & 0x3;
sc 2360 dev/ic/rt2661.c sc->rffreq = val & 0xff;
sc 2362 dev/ic/rt2661.c DPRINTF(("RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq));
sc 2366 dev/ic/rt2661.c val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
sc 2367 dev/ic/rt2661.c sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */
sc 2369 dev/ic/rt2661.c rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]));
sc 2370 dev/ic/rt2661.c sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */
sc 2372 dev/ic/rt2661.c rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]));
sc 2377 dev/ic/rt2661.c val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
sc 2380 dev/ic/rt2661.c sc->bbp_prom[i].reg = val >> 8;
sc 2381 dev/ic/rt2661.c sc->bbp_prom[i].val = val & 0xff;
sc 2382 dev/ic/rt2661.c DPRINTF(("BBP R%d=%02x\n", sc->bbp_prom[i].reg,
sc 2383 dev/ic/rt2661.c sc->bbp_prom[i].val));
sc 2388 dev/ic/rt2661.c rt2661_bbp_init(struct rt2661_softc *sc)
sc 2395 dev/ic/rt2661.c const uint8_t val = rt2661_bbp_read(sc, 0);
sc 2401 dev/ic/rt2661.c printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname);
sc 2407 dev/ic/rt2661.c rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
sc 2413 dev/ic/rt2661.c if (sc->bbp_prom[i].reg == 0)
sc 2415 dev/ic/rt2661.c rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
sc 2426 dev/ic/rt2661.c struct rt2661_softc *sc = ifp->if_softc;
sc 2427 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 2435 dev/ic/rt2661.c if (!(sc->sc_flags & RT2661_ENABLED)) {
sc 2436 dev/ic/rt2661.c if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
sc 2438 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 2441 dev/ic/rt2661.c sc->sc_flags |= RT2661_ENABLED;
sc 2446 dev/ic/rt2661.c if (!(sc->sc_flags & RT2661_FWLOADED)) {
sc 2447 dev/ic/rt2661.c switch (sc->sc_id) {
sc 2461 dev/ic/rt2661.c sc->sc_dev.dv_xname, name);
sc 2466 dev/ic/rt2661.c if (rt2661_load_microcode(sc, ucode, size) != 0) {
sc 2468 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 2475 dev/ic/rt2661.c sc->sc_flags |= RT2661_FWLOADED;
sc 2479 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
sc 2480 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
sc 2481 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
sc 2482 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
sc 2485 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
sc 2488 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
sc 2491 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TX_RING_CSR0,
sc 2497 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TX_RING_CSR1,
sc 2503 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_RX_RING_CSR,
sc 2509 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
sc 2512 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
sc 2515 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
sc 2519 dev/ic/rt2661.c RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
sc 2522 dev/ic/rt2661.c rt2661_set_macaddr(sc, ic->ic_myaddr);
sc 2525 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
sc 2526 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
sc 2530 dev/ic/rt2661.c if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
sc 2540 dev/ic/rt2661.c if (rt2661_bbp_init(sc) != 0) {
sc 2546 dev/ic/rt2661.c sc->sc_curchan = ic->ic_bss->ni_chan = ic->ic_ibss_chan;
sc 2547 dev/ic/rt2661.c rt2661_select_band(sc, sc->sc_curchan);
sc 2548 dev/ic/rt2661.c rt2661_select_antenna(sc);
sc 2549 dev/ic/rt2661.c rt2661_set_chan(sc, sc->sc_curchan);
sc 2552 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
sc 2564 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
sc 2567 dev/ic/rt2661.c RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta));
sc 2570 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
sc 2573 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
sc 2576 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
sc 2577 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
sc 2580 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
sc 2597 dev/ic/rt2661.c struct rt2661_softc *sc = ifp->if_softc;
sc 2598 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 2602 dev/ic/rt2661.c sc->sc_tx_timer = 0;
sc 2609 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
sc 2612 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
sc 2613 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
sc 2616 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
sc 2617 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
sc 2620 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
sc 2621 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
sc 2624 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
sc 2625 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
sc 2629 dev/ic/rt2661.c rt2661_reset_tx_ring(sc, &sc->txq[ac]);
sc 2630 dev/ic/rt2661.c rt2661_reset_tx_ring(sc, &sc->mgtq);
sc 2631 dev/ic/rt2661.c rt2661_reset_rx_ring(sc, &sc->rxq);
sc 2634 dev/ic/rt2661.c if (disable && sc->sc_disable != NULL) {
sc 2635 dev/ic/rt2661.c if (sc->sc_flags & RT2661_ENABLED) {
sc 2636 dev/ic/rt2661.c (*sc->sc_disable)(sc);
sc 2637 dev/ic/rt2661.c sc->sc_flags &= ~(RT2661_ENABLED | RT2661_FWLOADED);
sc 2643 dev/ic/rt2661.c rt2661_load_microcode(struct rt2661_softc *sc, const uint8_t *ucode, int size)
sc 2648 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
sc 2651 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
sc 2652 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
sc 2653 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
sc 2656 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
sc 2657 dev/ic/rt2661.c RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, ucode, size);
sc 2658 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
sc 2661 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
sc 2665 dev/ic/rt2661.c if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
sc 2682 dev/ic/rt2661.c rt2661_rx_tune(struct rt2661_softc *sc)
sc 2693 dev/ic/rt2661.c if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
sc 2695 dev/ic/rt2661.c if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
sc 2696 dev/ic/rt2661.c (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
sc 2700 dev/ic/rt2661.c dbm = sc->avg_rssi;
sc 2702 dev/ic/rt2661.c cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
sc 2708 dev/ic/rt2661.c bbp17 = sc->bbp17; /* current value */
sc 2731 dev/ic/rt2661.c if (bbp17 != sc->bbp17) {
sc 2732 dev/ic/rt2661.c DPRINTF(("BBP17 %x->%x\n", sc->bbp17, bbp17));
sc 2733 dev/ic/rt2661.c rt2661_bbp_write(sc, 17, bbp17);
sc 2734 dev/ic/rt2661.c sc->bbp17 = bbp17;
sc 2744 dev/ic/rt2661.c rt2661_radar_start(struct rt2661_softc *sc)
sc 2749 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
sc 2750 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
sc 2752 dev/ic/rt2661.c rt2661_bbp_write(sc, 82, 0x20);
sc 2753 dev/ic/rt2661.c rt2661_bbp_write(sc, 83, 0x00);
sc 2754 dev/ic/rt2661.c rt2661_bbp_write(sc, 84, 0x40);
sc 2757 dev/ic/rt2661.c sc->bbp18 = rt2661_bbp_read(sc, 18);
sc 2758 dev/ic/rt2661.c sc->bbp21 = rt2661_bbp_read(sc, 21);
sc 2759 dev/ic/rt2661.c sc->bbp22 = rt2661_bbp_read(sc, 22);
sc 2760 dev/ic/rt2661.c sc->bbp16 = rt2661_bbp_read(sc, 16);
sc 2761 dev/ic/rt2661.c sc->bbp17 = rt2661_bbp_read(sc, 17);
sc 2762 dev/ic/rt2661.c sc->bbp64 = rt2661_bbp_read(sc, 64);
sc 2764 dev/ic/rt2661.c rt2661_bbp_write(sc, 18, 0xff);
sc 2765 dev/ic/rt2661.c rt2661_bbp_write(sc, 21, 0x3f);
sc 2766 dev/ic/rt2661.c rt2661_bbp_write(sc, 22, 0x3f);
sc 2767 dev/ic/rt2661.c rt2661_bbp_write(sc, 16, 0xbd);
sc 2768 dev/ic/rt2661.c rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
sc 2769 dev/ic/rt2661.c rt2661_bbp_write(sc, 64, 0x21);
sc 2772 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
sc 2776 dev/ic/rt2661.c rt2661_radar_stop(struct rt2661_softc *sc)
sc 2781 dev/ic/rt2661.c bbp66 = rt2661_bbp_read(sc, 66);
sc 2784 dev/ic/rt2661.c rt2661_bbp_write(sc, 16, sc->bbp16);
sc 2785 dev/ic/rt2661.c rt2661_bbp_write(sc, 17, sc->bbp17);
sc 2786 dev/ic/rt2661.c rt2661_bbp_write(sc, 18, sc->bbp18);
sc 2787 dev/ic/rt2661.c rt2661_bbp_write(sc, 21, sc->bbp21);
sc 2788 dev/ic/rt2661.c rt2661_bbp_write(sc, 22, sc->bbp22);
sc 2789 dev/ic/rt2661.c rt2661_bbp_write(sc, 64, sc->bbp64);
sc 2796 dev/ic/rt2661.c rt2661_prepare_beacon(struct rt2661_softc *sc)
sc 2798 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 2807 dev/ic/rt2661.c sc->sc_dev.dv_xname);
sc 2814 dev/ic/rt2661.c rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
sc 2818 dev/ic/rt2661.c RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
sc 2821 dev/ic/rt2661.c RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
sc 2833 dev/ic/rt2661.c sc->erp_csr =
sc 2853 dev/ic/rt2661.c rt2661_enable_tsf_sync(struct rt2661_softc *sc)
sc 2855 dev/ic/rt2661.c struct ieee80211com *ic = &sc->sc_ic;
sc 2863 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
sc 2866 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
sc 2877 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
sc 2886 dev/ic/rt2661.c rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
sc 2895 dev/ic/rt2661.c if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
sc 2896 dev/ic/rt2661.c rssi += sc->rssi_2ghz_corr;
sc 2905 dev/ic/rt2661.c rssi += sc->rssi_5ghz_corr;
sc 2920 dev/ic/rt2661.c struct rt2661_softc *sc = arg;
sc 2921 dev/ic/rt2661.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 2924 dev/ic/rt2661.c DPRINTF(("%s: rt2661_power(%d)\n", sc->sc_dev.dv_xname, why));
sc 2931 dev/ic/rt2661.c sc->sc_flags &= ~RT2661_FWLOADED;
sc 2932 dev/ic/rt2661.c if (sc->sc_power != NULL)
sc 2933 dev/ic/rt2661.c (*sc->sc_power)(sc, why);
sc 2938 dev/ic/rt2661.c if (sc->sc_power != NULL)
sc 2939 dev/ic/rt2661.c (*sc->sc_power)(sc, why);
sc 2951 dev/ic/rt2661.c struct rt2661_softc *sc = arg;
sc 2952 dev/ic/rt2661.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 317 dev/ic/rt2661reg.h #define RAL_READ(sc, reg) \
sc 318 dev/ic/rt2661reg.h bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
sc 320 dev/ic/rt2661reg.h #define RAL_READ_REGION_4(sc, offset, datap, count) \
sc 321 dev/ic/rt2661reg.h bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
sc 324 dev/ic/rt2661reg.h #define RAL_WRITE(sc, reg, val) \
sc 325 dev/ic/rt2661reg.h bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sc 327 dev/ic/rt2661reg.h #define RAL_WRITE_1(sc, reg, val) \
sc 328 dev/ic/rt2661reg.h bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sc 330 dev/ic/rt2661reg.h #define RAL_RW_BARRIER_1(sc, reg) \
sc 331 dev/ic/rt2661reg.h bus_space_barrier((sc)->sc_st, (sc)->sc_sh, (reg), 1, \
sc 334 dev/ic/rt2661reg.h #define RAL_WRITE_REGION_1(sc, offset, datap, count) \
sc 335 dev/ic/rt2661reg.h bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \
sc 341 dev/ic/rt2661reg.h #define RT2661_EEPROM_CTL(sc, val) do { \
sc 342 dev/ic/rt2661reg.h RAL_WRITE((sc), RT2661_E2PROM_CSR, (val)); \
sc 84 dev/ic/rtl80x9.c rtl80x9_mediastatus(sc, ifmr)
sc 85 dev/ic/rtl80x9.c struct dp8390_softc *sc;
sc 88 dev/ic/rtl80x9.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 89 dev/ic/rtl80x9.c u_int8_t cr_proto = sc->cr_proto |
sc 98 dev/ic/rtl80x9.c NIC_PUT(sc->sc_regt, sc->sc_regh, ED_P0_CR, cr_proto | ED_CR_PAGE_3);
sc 100 dev/ic/rtl80x9.c if (NIC_GET(sc->sc_regt, sc->sc_regh, NERTL_RTL3_CONFIG0) &
sc 105 dev/ic/rtl80x9.c if (NIC_GET(sc->sc_regt, sc->sc_regh, NERTL_RTL3_CONFIG3) &
sc 111 dev/ic/rtl80x9.c NIC_PUT(sc->sc_regt, sc->sc_regh, ED_P0_CR, cr_proto | ED_CR_PAGE_0);
sc 115 dev/ic/rtl80x9.c rtl80x9_init_card(sc)
sc 116 dev/ic/rtl80x9.c struct dp8390_softc *sc;
sc 118 dev/ic/rtl80x9.c struct ifmedia *ifm = &sc->sc_media;
sc 119 dev/ic/rtl80x9.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 120 dev/ic/rtl80x9.c u_int8_t cr_proto = sc->cr_proto |
sc 125 dev/ic/rtl80x9.c NIC_PUT(sc->sc_regt, sc->sc_regh, ED_P0_CR, cr_proto | ED_CR_PAGE_3);
sc 128 dev/ic/rtl80x9.c NIC_PUT(sc->sc_regt, sc->sc_regh, NERTL_RTL3_EECR,
sc 132 dev/ic/rtl80x9.c reg = NIC_GET(sc->sc_regt, sc->sc_regh, NERTL_RTL3_CONFIG2);
sc 151 dev/ic/rtl80x9.c NIC_PUT(sc->sc_regt, sc->sc_regh, NERTL_RTL3_CONFIG2, reg);
sc 154 dev/ic/rtl80x9.c reg = NIC_GET(sc->sc_regt, sc->sc_regh, NERTL_RTL3_CONFIG3);
sc 159 dev/ic/rtl80x9.c NIC_PUT(sc->sc_regt, sc->sc_regh, NERTL_RTL3_CONFIG3, reg);
sc 162 dev/ic/rtl80x9.c NIC_PUT(sc->sc_regt, sc->sc_regh, NERTL_RTL3_EECR, 0);
sc 165 dev/ic/rtl80x9.c NIC_PUT(sc->sc_regt, sc->sc_regh, ED_P0_CR, cr_proto | ED_CR_PAGE_0);
sc 169 dev/ic/rtl80x9.c rtl80x9_media_init(sc)
sc 170 dev/ic/rtl80x9.c struct dp8390_softc *sc;
sc 185 dev/ic/rtl80x9.c bus_space_write_1(sc->sc_regt, sc->sc_regh, ED_P0_CR, ED_CR_PAGE_3);
sc 187 dev/ic/rtl80x9.c conf2 = bus_space_read_1(sc->sc_regt, sc->sc_regh, NERTL_RTL3_CONFIG2);
sc 188 dev/ic/rtl80x9.c conf3 = bus_space_read_1(sc->sc_regt, sc->sc_regh, NERTL_RTL3_CONFIG3);
sc 211 dev/ic/rtl80x9.c bus_space_write_1(sc->sc_regt, sc->sc_regh, ED_P0_CR, ED_CR_PAGE_0);
sc 213 dev/ic/rtl80x9.c ifmedia_init(&sc->sc_media, 0, dp8390_mediachange, dp8390_mediastatus);
sc 215 dev/ic/rtl80x9.c ifmedia_add(&sc->sc_media, rtl80x9_media[i], 0, NULL);
sc 216 dev/ic/rtl80x9.c ifmedia_set(&sc->sc_media, defmedia);
sc 166 dev/ic/rtl81x9.c CSR_WRITE_1(sc, RL_EECMD, \
sc 167 dev/ic/rtl81x9.c CSR_READ_1(sc, RL_EECMD) | x)
sc 170 dev/ic/rtl81x9.c CSR_WRITE_1(sc, RL_EECMD, \
sc 171 dev/ic/rtl81x9.c CSR_READ_1(sc, RL_EECMD) & ~x)
sc 176 dev/ic/rtl81x9.c void rl_eeprom_putbyte(sc, addr, addr_len)
sc 177 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 204 dev/ic/rtl81x9.c void rl_eeprom_getword(sc, addr, addr_len, dest)
sc 205 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 213 dev/ic/rtl81x9.c CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_PROGRAM|RL_EE_SEL);
sc 218 dev/ic/rtl81x9.c rl_eeprom_putbyte(sc, addr, addr_len);
sc 220 dev/ic/rtl81x9.c CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_PROGRAM|RL_EE_SEL);
sc 228 dev/ic/rtl81x9.c if (CSR_READ_1(sc, RL_EECMD) & RL_EE_DATAOUT)
sc 235 dev/ic/rtl81x9.c CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF);
sc 243 dev/ic/rtl81x9.c void rl_read_eeprom(sc, dest, off, addr_len, cnt, swap)
sc 244 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 255 dev/ic/rtl81x9.c rl_eeprom_getword(sc, off + i, addr_len, &word);
sc 271 dev/ic/rtl81x9.c CSR_WRITE_1(sc, RL_MII, \
sc 272 dev/ic/rtl81x9.c CSR_READ_1(sc, RL_MII) | x)
sc 275 dev/ic/rtl81x9.c CSR_WRITE_1(sc, RL_MII, \
sc 276 dev/ic/rtl81x9.c CSR_READ_1(sc, RL_MII) & ~x)
sc 281 dev/ic/rtl81x9.c void rl_mii_sync(sc)
sc 282 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 299 dev/ic/rtl81x9.c void rl_mii_send(sc, bits, cnt)
sc 300 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 323 dev/ic/rtl81x9.c int rl_mii_readreg(sc, frame)
sc 324 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 339 dev/ic/rtl81x9.c CSR_WRITE_2(sc, RL_MII, 0);
sc 346 dev/ic/rtl81x9.c rl_mii_sync(sc);
sc 351 dev/ic/rtl81x9.c rl_mii_send(sc, frame->mii_stdelim, 2);
sc 352 dev/ic/rtl81x9.c rl_mii_send(sc, frame->mii_opcode, 2);
sc 353 dev/ic/rtl81x9.c rl_mii_send(sc, frame->mii_phyaddr, 5);
sc 354 dev/ic/rtl81x9.c rl_mii_send(sc, frame->mii_regaddr, 5);
sc 368 dev/ic/rtl81x9.c ack = CSR_READ_2(sc, RL_MII) & RL_MII_DATAIN;
sc 390 dev/ic/rtl81x9.c if (CSR_READ_2(sc, RL_MII) & RL_MII_DATAIN)
sc 415 dev/ic/rtl81x9.c int rl_mii_writereg(sc, frame)
sc 416 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 435 dev/ic/rtl81x9.c rl_mii_sync(sc);
sc 437 dev/ic/rtl81x9.c rl_mii_send(sc, frame->mii_stdelim, 2);
sc 438 dev/ic/rtl81x9.c rl_mii_send(sc, frame->mii_opcode, 2);
sc 439 dev/ic/rtl81x9.c rl_mii_send(sc, frame->mii_phyaddr, 5);
sc 440 dev/ic/rtl81x9.c rl_mii_send(sc, frame->mii_regaddr, 5);
sc 441 dev/ic/rtl81x9.c rl_mii_send(sc, frame->mii_turnaround, 2);
sc 442 dev/ic/rtl81x9.c rl_mii_send(sc, frame->mii_data, 16);
sc 463 dev/ic/rtl81x9.c void rl_setmulti(sc)
sc 464 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 469 dev/ic/rtl81x9.c struct arpcom *ac = &sc->sc_arpcom;
sc 475 dev/ic/rtl81x9.c ifp = &sc->sc_arpcom.ac_if;
sc 477 dev/ic/rtl81x9.c rxfilt = CSR_READ_4(sc, RL_RXCFG);
sc 482 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_RXCFG, rxfilt);
sc 483 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_MAR0, 0xFFFFFFFF);
sc 484 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_MAR4, 0xFFFFFFFF);
sc 489 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_MAR0, 0);
sc 490 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_MAR4, 0);
sc 514 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_RXCFG, rxfilt);
sc 515 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_MAR0, hashes[0]);
sc 516 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_MAR4, hashes[1]);
sc 520 dev/ic/rtl81x9.c rl_reset(sc)
sc 521 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 525 dev/ic/rtl81x9.c CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_RESET);
sc 529 dev/ic/rtl81x9.c if (!(CSR_READ_1(sc, RL_COMMAND) & RL_CMD_RESET))
sc 533 dev/ic/rtl81x9.c printf("%s: reset never completed!\n", sc->sc_dev.dv_xname);
sc 541 dev/ic/rtl81x9.c rl_list_tx_init(sc)
sc 542 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 547 dev/ic/rtl81x9.c cd = &sc->rl_cdata;
sc 550 dev/ic/rtl81x9.c CSR_WRITE_4(sc,
sc 554 dev/ic/rtl81x9.c sc->rl_cdata.cur_tx = 0;
sc 555 dev/ic/rtl81x9.c sc->rl_cdata.last_tx = 0;
sc 588 dev/ic/rtl81x9.c rl_rxeof(sc)
sc 589 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 601 dev/ic/rtl81x9.c ifp = &sc->sc_arpcom.ac_if;
sc 603 dev/ic/rtl81x9.c cur_rx = (CSR_READ_2(sc, RL_CURRXADDR) + 16) % RL_RXBUFLEN;
sc 606 dev/ic/rtl81x9.c limit = CSR_READ_2(sc, RL_CURRXBUF) % RL_RXBUFLEN;
sc 613 dev/ic/rtl81x9.c while((CSR_READ_1(sc, RL_COMMAND) & RL_CMD_EMPTY_RXBUF) == 0) {
sc 614 dev/ic/rtl81x9.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rx_dmamap,
sc 615 dev/ic/rtl81x9.c 0, sc->sc_rx_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
sc 616 dev/ic/rtl81x9.c rxbufpos = sc->rl_cdata.rl_rx_buf + cur_rx;
sc 630 dev/ic/rtl81x9.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rx_dmamap,
sc 631 dev/ic/rtl81x9.c 0, sc->sc_rx_dmamap->dm_mapsize,
sc 640 dev/ic/rtl81x9.c rl_init(sc);
sc 641 dev/ic/rtl81x9.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rx_dmamap,
sc 642 dev/ic/rtl81x9.c 0, sc->sc_rx_dmamap->dm_mapsize,
sc 664 dev/ic/rtl81x9.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rx_dmamap,
sc 665 dev/ic/rtl81x9.c 0, sc->sc_rx_dmamap->dm_mapsize,
sc 670 dev/ic/rtl81x9.c rxbufpos = sc->rl_cdata.rl_rx_buf +
sc 673 dev/ic/rtl81x9.c if (rxbufpos == (sc->rl_cdata.rl_rx_buf + RL_RXBUFLEN))
sc 674 dev/ic/rtl81x9.c rxbufpos = sc->rl_cdata.rl_rx_buf;
sc 676 dev/ic/rtl81x9.c wrap = (sc->rl_cdata.rl_rx_buf + RL_RXBUFLEN) - rxbufpos;
sc 685 dev/ic/rtl81x9.c total_len - wrap, sc->rl_cdata.rl_rx_buf);
sc 707 dev/ic/rtl81x9.c CSR_WRITE_2(sc, RL_CURRXADDR, cur_rx - 16);
sc 710 dev/ic/rtl81x9.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rx_dmamap,
sc 711 dev/ic/rtl81x9.c 0, sc->sc_rx_dmamap->dm_mapsize,
sc 727 dev/ic/rtl81x9.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rx_dmamap,
sc 728 dev/ic/rtl81x9.c 0, sc->sc_rx_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
sc 736 dev/ic/rtl81x9.c void rl_txeof(sc)
sc 737 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 742 dev/ic/rtl81x9.c ifp = &sc->sc_arpcom.ac_if;
sc 749 dev/ic/rtl81x9.c if (RL_LAST_TXMBUF(sc) == NULL)
sc 751 dev/ic/rtl81x9.c txstat = CSR_READ_4(sc, RL_LAST_TXSTAT(sc));
sc 758 dev/ic/rtl81x9.c bus_dmamap_sync(sc->sc_dmat, RL_LAST_TXMAP(sc),
sc 759 dev/ic/rtl81x9.c 0, RL_LAST_TXMAP(sc)->dm_mapsize,
sc 761 dev/ic/rtl81x9.c bus_dmamap_unload(sc->sc_dmat, RL_LAST_TXMAP(sc));
sc 762 dev/ic/rtl81x9.c m_freem(RL_LAST_TXMBUF(sc));
sc 763 dev/ic/rtl81x9.c RL_LAST_TXMBUF(sc) = NULL;
sc 770 dev/ic/rtl81x9.c (sc->rl_txthresh < 2016))
sc 771 dev/ic/rtl81x9.c sc->rl_txthresh += 32;
sc 780 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG);
sc 781 dev/ic/rtl81x9.c oldthresh = sc->rl_txthresh;
sc 783 dev/ic/rtl81x9.c rl_reset(sc);
sc 784 dev/ic/rtl81x9.c rl_init(sc);
sc 786 dev/ic/rtl81x9.c sc->rl_txthresh = oldthresh;
sc 789 dev/ic/rtl81x9.c RL_INC(sc->rl_cdata.last_tx);
sc 791 dev/ic/rtl81x9.c } while (sc->rl_cdata.last_tx != sc->rl_cdata.cur_tx);
sc 793 dev/ic/rtl81x9.c if (RL_LAST_TXMBUF(sc) == NULL)
sc 802 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 807 dev/ic/rtl81x9.c sc = arg;
sc 808 dev/ic/rtl81x9.c ifp = &sc->sc_arpcom.ac_if;
sc 811 dev/ic/rtl81x9.c CSR_WRITE_2(sc, RL_IMR, 0x0000);
sc 814 dev/ic/rtl81x9.c status = CSR_READ_2(sc, RL_ISR);
sc 819 dev/ic/rtl81x9.c CSR_WRITE_2(sc, RL_ISR, status);
sc 823 dev/ic/rtl81x9.c rl_rxeof(sc);
sc 825 dev/ic/rtl81x9.c rl_rxeof(sc);
sc 827 dev/ic/rtl81x9.c rl_txeof(sc);
sc 829 dev/ic/rtl81x9.c rl_reset(sc);
sc 830 dev/ic/rtl81x9.c rl_init(sc);
sc 836 dev/ic/rtl81x9.c CSR_WRITE_2(sc, RL_IMR, RL_INTRS);
sc 848 dev/ic/rtl81x9.c int rl_encap(sc, m_head)
sc 849 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 890 dev/ic/rtl81x9.c if (bus_dmamap_load_mbuf(sc->sc_dmat, RL_CUR_TXMAP(sc),
sc 898 dev/ic/rtl81x9.c RL_CUR_TXMBUF(sc) = m_new;
sc 899 dev/ic/rtl81x9.c bus_dmamap_sync(sc->sc_dmat, RL_CUR_TXMAP(sc), 0,
sc 900 dev/ic/rtl81x9.c RL_CUR_TXMAP(sc)->dm_mapsize, BUS_DMASYNC_PREWRITE);
sc 911 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 915 dev/ic/rtl81x9.c sc = ifp->if_softc;
sc 917 dev/ic/rtl81x9.c while(RL_CUR_TXMBUF(sc) == NULL) {
sc 923 dev/ic/rtl81x9.c if (rl_encap(sc, m_head))
sc 933 dev/ic/rtl81x9.c bpf_mtap(ifp->if_bpf, RL_CUR_TXMBUF(sc),
sc 939 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_CUR_TXADDR(sc),
sc 940 dev/ic/rtl81x9.c RL_CUR_TXMAP(sc)->dm_segs[0].ds_addr);
sc 941 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_CUR_TXSTAT(sc),
sc 942 dev/ic/rtl81x9.c RL_TXTHRESH(sc->rl_txthresh) |
sc 943 dev/ic/rtl81x9.c RL_CUR_TXMAP(sc)->dm_segs[0].ds_len);
sc 945 dev/ic/rtl81x9.c RL_INC(sc->rl_cdata.cur_tx);
sc 960 dev/ic/rtl81x9.c if (RL_CUR_TXMBUF(sc) != NULL)
sc 967 dev/ic/rtl81x9.c struct rl_softc *sc = xsc;
sc 968 dev/ic/rtl81x9.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 977 dev/ic/rtl81x9.c rl_stop(sc);
sc 984 dev/ic/rtl81x9.c CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_WRITECFG);
sc 985 dev/ic/rtl81x9.c CSR_WRITE_RAW_4(sc, RL_IDR0,
sc 986 dev/ic/rtl81x9.c (u_int8_t *)(&sc->sc_arpcom.ac_enaddr[0]));
sc 987 dev/ic/rtl81x9.c CSR_WRITE_RAW_4(sc, RL_IDR4,
sc 988 dev/ic/rtl81x9.c (u_int8_t *)(&sc->sc_arpcom.ac_enaddr[4]));
sc 989 dev/ic/rtl81x9.c CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF);
sc 992 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_RXADDR, sc->rl_cdata.rl_rx_buf_pa);
sc 995 dev/ic/rtl81x9.c rl_list_tx_init(sc);
sc 1000 dev/ic/rtl81x9.c CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB);
sc 1005 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG);
sc 1006 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_RXCFG, RL_RXCFG_CONFIG);
sc 1009 dev/ic/rtl81x9.c rxcfg = CSR_READ_4(sc, RL_RXCFG);
sc 1017 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_RXCFG, rxcfg);
sc 1026 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_RXCFG, rxcfg);
sc 1031 dev/ic/rtl81x9.c rl_setmulti(sc);
sc 1036 dev/ic/rtl81x9.c CSR_WRITE_2(sc, RL_IMR, RL_INTRS);
sc 1039 dev/ic/rtl81x9.c sc->rl_txthresh = RL_TX_THRESH_INIT;
sc 1042 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_MISSEDPKT, 0);
sc 1045 dev/ic/rtl81x9.c CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB);
sc 1047 dev/ic/rtl81x9.c mii_mediachg(&sc->sc_mii);
sc 1049 dev/ic/rtl81x9.c CSR_WRITE_1(sc, RL_CFG1, RL_CFG1_DRVLOAD|RL_CFG1_FULLDUPLEX);
sc 1056 dev/ic/rtl81x9.c timeout_set(&sc->sc_tick_tmo, rl_tick, sc);
sc 1057 dev/ic/rtl81x9.c timeout_add(&sc->sc_tick_tmo, hz);
sc 1066 dev/ic/rtl81x9.c struct rl_softc *sc = (struct rl_softc *)ifp->if_softc;
sc 1068 dev/ic/rtl81x9.c mii_mediachg(&sc->sc_mii);
sc 1079 dev/ic/rtl81x9.c struct rl_softc *sc = ifp->if_softc;
sc 1081 dev/ic/rtl81x9.c mii_pollstat(&sc->sc_mii);
sc 1082 dev/ic/rtl81x9.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 1083 dev/ic/rtl81x9.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 1091 dev/ic/rtl81x9.c struct rl_softc *sc = ifp->if_softc;
sc 1098 dev/ic/rtl81x9.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, command, data)) > 0) {
sc 1109 dev/ic/rtl81x9.c rl_init(sc);
sc 1110 dev/ic/rtl81x9.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 1114 dev/ic/rtl81x9.c rl_init(sc);
sc 1127 dev/ic/rtl81x9.c rl_init(sc);
sc 1130 dev/ic/rtl81x9.c rl_stop(sc);
sc 1137 dev/ic/rtl81x9.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 1138 dev/ic/rtl81x9.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 1146 dev/ic/rtl81x9.c rl_setmulti(sc);
sc 1152 dev/ic/rtl81x9.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, command);
sc 1167 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 1169 dev/ic/rtl81x9.c sc = ifp->if_softc;
sc 1171 dev/ic/rtl81x9.c printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
sc 1173 dev/ic/rtl81x9.c rl_txeof(sc);
sc 1174 dev/ic/rtl81x9.c rl_rxeof(sc);
sc 1175 dev/ic/rtl81x9.c rl_init(sc);
sc 1182 dev/ic/rtl81x9.c void rl_stop(sc)
sc 1183 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 1188 dev/ic/rtl81x9.c ifp = &sc->sc_arpcom.ac_if;
sc 1191 dev/ic/rtl81x9.c timeout_del(&sc->sc_tick_tmo);
sc 1195 dev/ic/rtl81x9.c CSR_WRITE_1(sc, RL_COMMAND, 0x00);
sc 1196 dev/ic/rtl81x9.c CSR_WRITE_2(sc, RL_IMR, 0x0000);
sc 1202 dev/ic/rtl81x9.c if (sc->rl_cdata.rl_tx_chain[i] != NULL) {
sc 1203 dev/ic/rtl81x9.c bus_dmamap_sync(sc->sc_dmat,
sc 1204 dev/ic/rtl81x9.c sc->rl_cdata.rl_tx_dmamap[i], 0,
sc 1205 dev/ic/rtl81x9.c sc->rl_cdata.rl_tx_dmamap[i]->dm_mapsize,
sc 1207 dev/ic/rtl81x9.c bus_dmamap_unload(sc->sc_dmat,
sc 1208 dev/ic/rtl81x9.c sc->rl_cdata.rl_tx_dmamap[i]);
sc 1209 dev/ic/rtl81x9.c m_freem(sc->rl_cdata.rl_tx_chain[i]);
sc 1210 dev/ic/rtl81x9.c sc->rl_cdata.rl_tx_chain[i] = NULL;
sc 1211 dev/ic/rtl81x9.c CSR_WRITE_4(sc, RL_TXADDR0 + (i * sizeof(u_int32_t)),
sc 1218 dev/ic/rtl81x9.c rl_attach(sc)
sc 1219 dev/ic/rtl81x9.c struct rl_softc *sc;
sc 1221 dev/ic/rtl81x9.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1227 dev/ic/rtl81x9.c rl_reset(sc);
sc 1232 dev/ic/rtl81x9.c rl_read_eeprom(sc, (caddr_t)&rl_id, RL_EE_ID, RL_EEADDR_LEN1, 1, 0);
sc 1241 dev/ic/rtl81x9.c rl_read_eeprom(sc, (caddr_t)sc->sc_arpcom.ac_enaddr, RL_EE_EADDR,
sc 1244 dev/ic/rtl81x9.c printf(", address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 1246 dev/ic/rtl81x9.c rl_read_eeprom(sc, (caddr_t)&rl_did, RL_EE_PCI_DID, addr_len, 1, 0);
sc 1252 dev/ic/rtl81x9.c sc->rl_type = RL_8139;
sc 1254 dev/ic/rtl81x9.c sc->rl_type = RL_8129;
sc 1256 dev/ic/rtl81x9.c sc->rl_type = RL_UNKNOWN; /* could be 8138 or other */
sc 1258 dev/ic/rtl81x9.c if (bus_dmamem_alloc(sc->sc_dmat, RL_RXBUFLEN + 32, PAGE_SIZE, 0,
sc 1259 dev/ic/rtl81x9.c &sc->sc_rx_seg, 1, &rseg, BUS_DMA_NOWAIT)) {
sc 1260 dev/ic/rtl81x9.c printf("\n%s: can't alloc rx buffers\n", sc->sc_dev.dv_xname);
sc 1263 dev/ic/rtl81x9.c if (bus_dmamem_map(sc->sc_dmat, &sc->sc_rx_seg, rseg,
sc 1266 dev/ic/rtl81x9.c sc->sc_dev.dv_xname, RL_RXBUFLEN + 32);
sc 1267 dev/ic/rtl81x9.c bus_dmamem_free(sc->sc_dmat, &sc->sc_rx_seg, rseg);
sc 1270 dev/ic/rtl81x9.c if (bus_dmamap_create(sc->sc_dmat, RL_RXBUFLEN + 32, 1,
sc 1271 dev/ic/rtl81x9.c RL_RXBUFLEN + 32, 0, BUS_DMA_NOWAIT, &sc->sc_rx_dmamap)) {
sc 1272 dev/ic/rtl81x9.c printf("%s: can't create dma map\n", sc->sc_dev.dv_xname);
sc 1273 dev/ic/rtl81x9.c bus_dmamem_unmap(sc->sc_dmat, kva, RL_RXBUFLEN + 32);
sc 1274 dev/ic/rtl81x9.c bus_dmamem_free(sc->sc_dmat, &sc->sc_rx_seg, rseg);
sc 1277 dev/ic/rtl81x9.c if (bus_dmamap_load(sc->sc_dmat, sc->sc_rx_dmamap, kva,
sc 1279 dev/ic/rtl81x9.c printf("%s: can't load dma map\n", sc->sc_dev.dv_xname);
sc 1280 dev/ic/rtl81x9.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamap);
sc 1281 dev/ic/rtl81x9.c bus_dmamem_unmap(sc->sc_dmat, kva, RL_RXBUFLEN + 32);
sc 1282 dev/ic/rtl81x9.c bus_dmamem_free(sc->sc_dmat, &sc->sc_rx_seg, rseg);
sc 1285 dev/ic/rtl81x9.c sc->rl_cdata.rl_rx_buf = kva;
sc 1286 dev/ic/rtl81x9.c sc->rl_cdata.rl_rx_buf_pa = sc->sc_rx_dmamap->dm_segs[0].ds_addr;
sc 1288 dev/ic/rtl81x9.c bzero(sc->rl_cdata.rl_rx_buf, RL_RXBUFLEN + 32);
sc 1290 dev/ic/rtl81x9.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rx_dmamap,
sc 1291 dev/ic/rtl81x9.c 0, sc->sc_rx_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
sc 1294 dev/ic/rtl81x9.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0,
sc 1295 dev/ic/rtl81x9.c BUS_DMA_NOWAIT, &sc->rl_cdata.rl_tx_dmamap[i]) != 0) {
sc 1297 dev/ic/rtl81x9.c sc->sc_dev.dv_xname);
sc 1304 dev/ic/rtl81x9.c sc->rl_cdata.rl_rx_buf_ptr = sc->rl_cdata.rl_rx_buf;
sc 1305 dev/ic/rtl81x9.c sc->rl_cdata.rl_rx_buf += sizeof(u_int64_t);
sc 1306 dev/ic/rtl81x9.c sc->rl_cdata.rl_rx_buf_pa += sizeof(u_int64_t);
sc 1308 dev/ic/rtl81x9.c ifp->if_softc = sc;
sc 1316 dev/ic/rtl81x9.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 1323 dev/ic/rtl81x9.c sc->sc_mii.mii_ifp = ifp;
sc 1324 dev/ic/rtl81x9.c sc->sc_mii.mii_readreg = rl_miibus_readreg;
sc 1325 dev/ic/rtl81x9.c sc->sc_mii.mii_writereg = rl_miibus_writereg;
sc 1326 dev/ic/rtl81x9.c sc->sc_mii.mii_statchg = rl_miibus_statchg;
sc 1327 dev/ic/rtl81x9.c ifmedia_init(&sc->sc_mii.mii_media, 0, rl_ifmedia_upd, rl_ifmedia_sts);
sc 1328 dev/ic/rtl81x9.c mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
sc 1330 dev/ic/rtl81x9.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 1331 dev/ic/rtl81x9.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
sc 1332 dev/ic/rtl81x9.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
sc 1334 dev/ic/rtl81x9.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 1342 dev/ic/rtl81x9.c sc->sc_sdhook = shutdownhook_establish(rl_shutdown, sc);
sc 1343 dev/ic/rtl81x9.c sc->sc_pwrhook = powerhook_establish(rl_powerhook, sc);
sc 1352 dev/ic/rtl81x9.c struct rl_softc *sc = (struct rl_softc *)arg;
sc 1354 dev/ic/rtl81x9.c rl_stop(sc);
sc 1371 dev/ic/rtl81x9.c struct rl_softc *sc = (struct rl_softc *)self;
sc 1375 dev/ic/rtl81x9.c if (sc->rl_type == RL_8139) {
sc 1400 dev/ic/rtl81x9.c return (CSR_READ_1(sc, RL_MEDIASTAT));
sc 1406 dev/ic/rtl81x9.c return (CSR_READ_2(sc, rl8139_reg));
sc 1413 dev/ic/rtl81x9.c rl_mii_readreg(sc, &frame);
sc 1423 dev/ic/rtl81x9.c struct rl_softc *sc = (struct rl_softc *)self;
sc 1427 dev/ic/rtl81x9.c if (sc->rl_type == RL_8139) {
sc 1451 dev/ic/rtl81x9.c CSR_WRITE_2(sc, rl8139_reg, val);
sc 1459 dev/ic/rtl81x9.c rl_mii_writereg(sc, &frame);
sc 1472 dev/ic/rtl81x9.c struct rl_softc *sc = v;
sc 1474 dev/ic/rtl81x9.c mii_tick(&sc->sc_mii);
sc 1475 dev/ic/rtl81x9.c timeout_add(&sc->sc_tick_tmo, hz);
sc 609 dev/ic/rtl81x9reg.h #define RL_TX_DESC_CNT(sc) \
sc 610 dev/ic/rtl81x9reg.h ((sc)->rl_ldata.rl_tx_desc_cnt)
sc 611 dev/ic/rtl81x9reg.h #define RL_TX_LIST_SZ(sc) \
sc 612 dev/ic/rtl81x9reg.h (RL_TX_DESC_CNT(sc) * sizeof(struct rl_desc))
sc 613 dev/ic/rtl81x9reg.h #define RL_NEXT_TX_DESC(sc, x) \
sc 614 dev/ic/rtl81x9reg.h (((x) + 1) % RL_TX_DESC_CNT(sc))
sc 615 dev/ic/rtl81x9reg.h #define RL_NEXT_RX_DESC(sc, x) \
sc 617 dev/ic/rtl81x9reg.h #define RL_NEXT_TXQ(sc, x) \
sc 620 dev/ic/rtl81x9reg.h #define RL_TXDESCSYNC(sc, idx, ops) \
sc 621 dev/ic/rtl81x9reg.h bus_dmamap_sync((sc)->sc_dmat, \
sc 622 dev/ic/rtl81x9reg.h (sc)->rl_ldata.rl_tx_list_map, \
sc 626 dev/ic/rtl81x9reg.h #define RL_RXDESCSYNC(sc, idx, ops) \
sc 627 dev/ic/rtl81x9reg.h bus_dmamap_sync((sc)->sc_dmat, \
sc 628 dev/ic/rtl81x9reg.h (sc)->rl_ldata.rl_rx_list_map, \
sc 761 dev/ic/rtl81x9reg.h #define RL_TXPADDADDR(sc) \
sc 762 dev/ic/rtl81x9reg.h ((sc)->rl_ldata.rl_rx_list_map->dm_segs[0].ds_addr + RL_TXPADOFF)
sc 767 dev/ic/rtl81x9reg.h #define RL_IS_ENABLED(sc) ((sc)->sc_flags & RL_ENABLED)
sc 772 dev/ic/rtl81x9reg.h #define CSR_WRITE_RAW_4(sc, csr, val) \
sc 773 dev/ic/rtl81x9reg.h bus_space_write_raw_region_4(sc->rl_btag, sc->rl_bhandle, csr, val, 4)
sc 774 dev/ic/rtl81x9reg.h #define CSR_WRITE_4(sc, csr, val) \
sc 775 dev/ic/rtl81x9reg.h bus_space_write_4(sc->rl_btag, sc->rl_bhandle, csr, val)
sc 776 dev/ic/rtl81x9reg.h #define CSR_WRITE_2(sc, csr, val) \
sc 777 dev/ic/rtl81x9reg.h bus_space_write_2(sc->rl_btag, sc->rl_bhandle, csr, val)
sc 778 dev/ic/rtl81x9reg.h #define CSR_WRITE_1(sc, csr, val) \
sc 779 dev/ic/rtl81x9reg.h bus_space_write_1(sc->rl_btag, sc->rl_bhandle, csr, val)
sc 781 dev/ic/rtl81x9reg.h #define CSR_READ_4(sc, csr) \
sc 782 dev/ic/rtl81x9reg.h bus_space_read_4(sc->rl_btag, sc->rl_bhandle, csr)
sc 783 dev/ic/rtl81x9reg.h #define CSR_READ_2(sc, csr) \
sc 784 dev/ic/rtl81x9reg.h bus_space_read_2(sc->rl_btag, sc->rl_bhandle, csr)
sc 785 dev/ic/rtl81x9reg.h #define CSR_READ_1(sc, csr) \
sc 786 dev/ic/rtl81x9reg.h bus_space_read_1(sc->rl_btag, sc->rl_bhandle, csr)
sc 788 dev/ic/rtl81x9reg.h #define CSR_SETBIT_1(sc, offset, val) \
sc 789 dev/ic/rtl81x9reg.h CSR_WRITE_1(sc, offset, CSR_READ_1(sc, offset) | (val))
sc 791 dev/ic/rtl81x9reg.h #define CSR_CLRBIT_1(sc, offset, val) \
sc 792 dev/ic/rtl81x9reg.h CSR_WRITE_1(sc, offset, CSR_READ_1(sc, offset) & ~(val))
sc 794 dev/ic/rtl81x9reg.h #define CSR_SETBIT_2(sc, offset, val) \
sc 795 dev/ic/rtl81x9reg.h CSR_WRITE_2(sc, offset, CSR_READ_2(sc, offset) | (val))
sc 797 dev/ic/rtl81x9reg.h #define CSR_CLRBIT_2(sc, offset, val) \
sc 798 dev/ic/rtl81x9reg.h CSR_WRITE_2(sc, offset, CSR_READ_2(sc, offset) & ~(val))
sc 800 dev/ic/rtl81x9reg.h #define CSR_SETBIT_4(sc, offset, val) \
sc 801 dev/ic/rtl81x9reg.h CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) | (val))
sc 803 dev/ic/rtl81x9reg.h #define CSR_CLRBIT_4(sc, offset, val) \
sc 804 dev/ic/rtl81x9reg.h CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) & ~(val))
sc 275 dev/ic/rtw.c rtw_continuous_tx_enable(struct rtw_softc *sc, int enable)
sc 277 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc 289 dev/ic/rtw.c rtw_txdac_enable(sc, !enable);
sc 409 dev/ic/rtw.c rtw_txdac_enable(struct rtw_softc *sc, int enable)
sc 412 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc 493 dev/ic/rtw.c rtw_reset(struct rtw_softc *sc)
sc 498 dev/ic/rtw.c if ((rc = rtw_chip_reset(&sc->sc_regs, sc->sc_dev.dv_xname)) != 0)
sc 501 dev/ic/rtw.c if ((rc = rtw_recall_eeprom(&sc->sc_regs, sc->sc_dev.dv_xname)) != 0)
sc 504 dev/ic/rtw.c config1 = RTW_READ8(&sc->sc_regs, RTW_CONFIG1);
sc 505 dev/ic/rtw.c RTW_WRITE8(&sc->sc_regs, RTW_CONFIG1, config1 & ~RTW_CONFIG1_PMEN);
sc 562 dev/ic/rtw.c rtw_srom_parse(struct rtw_softc *sc)
sc 565 dev/ic/rtw.c struct rtw_srom *sr = &sc->sc_srom;
sc 566 dev/ic/rtw.c u_int32_t *flags = &sc->sc_flags;
sc 567 dev/ic/rtw.c u_int8_t *cs_threshold = &sc->sc_csthr;
sc 568 dev/ic/rtw.c int *rfchipid = &sc->sc_rfchipid;
sc 569 dev/ic/rtw.c u_int32_t *rcr = &sc->sc_rcr;
sc 570 dev/ic/rtw.c enum rtw_locale *locale = &sc->sc_locale;
sc 579 dev/ic/rtw.c ("%s: SROM %d.%d\n", sc->sc_dev.dv_xname, version >> 8,
sc 595 dev/ic/rtw.c ("%s: EEPROM MAC %s\n", sc->sc_dev.dv_xname, ether_sprintf(mac)));
sc 615 dev/ic/rtw.c if (sc->sc_flags & RTW_F_RTL8185) {
sc 1125 dev/ic/rtw.c rtw_intr_rx(struct rtw_softc *sc, u_int16_t isr)
sc 1145 dev/ic/rtw.c rdb = &sc->sc_rxdesc_blk;
sc 1153 dev/ic/rtw.c rs = &sc->sc_rxsoft[next];
sc 1179 dev/ic/rtw.c sc->sc_dev.dv_xname, next));
sc 1193 dev/ic/rtw.c printf("%s: ", sc->sc_dev.dv_xname);
sc 1211 dev/ic/rtw.c "rx descriptor %d\n", sc->sc_dev.dv_xname,
sc 1213 dev/ic/rtw.c sc->sc_if.if_ierrors++;
sc 1219 dev/ic/rtw.c sc->sc_ic.ic_stats.is_rx_tooshort++;
sc 1228 dev/ic/rtw.c printf("%s: unknown rate #%d\n", sc->sc_dev.dv_xname,
sc 1230 dev/ic/rtw.c sc->sc_if.if_ierrors++;
sc 1242 dev/ic/rtw.c sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR)
sc 1248 dev/ic/rtw.c sc->sc_dev.dv_xname);
sc 1252 dev/ic/rtw.c bus_dmamap_sync(sc->sc_dmat, rs->rs_dmamap, 0,
sc 1258 dev/ic/rtw.c switch (rtw_rxsoft_alloc(sc->sc_dmat, rs)) {
sc 1263 dev/ic/rtw.c "dropping this packet\n", sc->sc_dev.dv_xname,
sc 1269 dev/ic/rtw.c sc->sc_dev.dv_xname);
sc 1272 dev/ic/rtw.c if (sc->sc_rfchipid == RTW_RFCHIPID_PHILIPS)
sc 1289 dev/ic/rtw.c m->m_pkthdr.rcvif = &sc->sc_if;
sc 1295 dev/ic/rtw.c sc->sc_led_state.ls_event |= RTW_LED_S_RX;
sc 1297 dev/ic/rtw.c ni = ieee80211_find_rxnode(&sc->sc_ic, wh);
sc 1299 dev/ic/rtw.c sc->sc_tsfth = htsfth;
sc 1302 dev/ic/rtw.c if ((sc->sc_if.if_flags & (IFF_DEBUG|IFF_LINK2)) ==
sc 1310 dev/ic/rtw.c if (sc->sc_radiobpf != NULL) {
sc 1312 dev/ic/rtw.c struct ieee80211com *ic = &sc->sc_ic;
sc 1313 dev/ic/rtw.c struct rtw_rx_radiotap_header *rr = &sc->sc_rxtap;
sc 1331 dev/ic/rtw.c mb.m_len = sizeof(sc->sc_rxtapu);
sc 1336 dev/ic/rtw.c bpf_mtap(sc->sc_radiobpf, &mb, BPF_DIRECTION_IN);
sc 1340 dev/ic/rtw.c ieee80211_input(&sc->sc_if, m, ni, rssi, htsftl);
sc 1341 dev/ic/rtw.c ieee80211_release_node(&sc->sc_ic, ni);
sc 1353 dev/ic/rtw.c if (!IFQ_IS_EMPTY(&sc->sc_if.if_snd) &&
sc 1354 dev/ic/rtw.c !(sc->sc_if.if_flags & IFF_OACTIVE))
sc 1355 dev/ic/rtw.c (*sc->sc_if.if_start)(&sc->sc_if);
sc 1397 dev/ic/rtw.c rtw_collect_txpkt(struct rtw_softc *sc, struct rtw_txdesc_blk *tdb,
sc 1405 dev/ic/rtw.c rtw_txsoft_release(sc->sc_dmat, &sc->sc_ic, ts);
sc 1415 dev/ic/rtw.c sc->sc_if.if_collisions += rts_retry + data_retry;
sc 1420 dev/ic/rtw.c sc->sc_if.if_oerrors++;
sc 1424 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT_DESC,
sc 1426 dev/ic/rtw.c sc->sc_dev.dv_xname, ts, ts->ts_first, ts->ts_last,
sc 1431 dev/ic/rtw.c rtw_reset_oactive(struct rtw_softc *sc)
sc 1437 dev/ic/rtw.c oflags = sc->sc_if.if_flags;
sc 1439 dev/ic/rtw.c tsb = &sc->sc_txsoft_blk[pri];
sc 1440 dev/ic/rtw.c tdb = &sc->sc_txdesc_blk[pri];
sc 1442 dev/ic/rtw.c sc->sc_if.if_flags &= ~IFF_OACTIVE;
sc 1444 dev/ic/rtw.c if (oflags != sc->sc_if.if_flags) {
sc 1445 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_OACTIVE,
sc 1452 dev/ic/rtw.c rtw_collect_txring(struct rtw_softc *sc, struct rtw_txsoft_blk *tsb,
sc 1482 dev/ic/rtw.c rtw_collect_txpkt(sc, tdb, ts, ndesc);
sc 1489 dev/ic/rtw.c rtw_reset_oactive(sc);
sc 1493 dev/ic/rtw.c rtw_intr_tx(struct rtw_softc *sc, u_int16_t isr)
sc 1500 dev/ic/rtw.c tsb = &sc->sc_txsoft_blk[pri];
sc 1501 dev/ic/rtw.c tdb = &sc->sc_txdesc_blk[pri];
sc 1503 dev/ic/rtw.c rtw_collect_txring(sc, tsb, tdb, 0);
sc 1508 dev/ic/rtw.c rtw_start(&sc->sc_if);
sc 1512 dev/ic/rtw.c rtw_intr_beacon(struct rtw_softc *sc, u_int16_t isr)
sc 1517 dev/ic/rtw.c struct rtw_txdesc_blk *tdb = &sc->sc_txdesc_blk[RTW_TXPRIBCN];
sc 1518 dev/ic/rtw.c struct rtw_txsoft_blk *tsb = &sc->sc_txsoft_blk[RTW_TXPRIBCN];
sc 1521 dev/ic/rtw.c tsfth = RTW_READ(&sc->sc_regs, RTW_TSFTRH);
sc 1522 dev/ic/rtw.c tsftl = RTW_READ(&sc->sc_regs, RTW_TSFTRL);
sc 1525 dev/ic/rtw.c next = rtw_txring_next(&sc->sc_regs, tdb);
sc 1531 dev/ic/rtw.c if ((RTW_READ8(&sc->sc_regs, RTW_TPPOLL) & RTW_TPPOLL_BQ) == 0){
sc 1532 dev/ic/rtw.c rtw_collect_txring(sc, tsb, tdb, 1);
sc 1539 dev/ic/rtw.c sc->sc_ic.ic_state == IEEE80211_S_RUN &&
sc 1545 dev/ic/rtw.c ic = &sc->sc_ic;
sc 1553 dev/ic/rtw.c sc->sc_dev.dv_xname);
sc 1557 dev/ic/rtw.c IF_ENQUEUE(&sc->sc_beaconq, m);
sc 1558 dev/ic/rtw.c rtw_start(&sc->sc_if);
sc 1563 dev/ic/rtw.c rtw_intr_atim(struct rtw_softc *sc)
sc 1571 dev/ic/rtw.c rtw_dump_rings(struct rtw_softc *sc)
sc 1582 dev/ic/rtw.c tdb = &sc->sc_txdesc_blk[pri];
sc 1586 dev/ic/rtw.c rtw_print_txdesc(sc, ".", NULL, tdb, desc);
sc 1589 dev/ic/rtw.c rdb = &sc->sc_rxdesc_blk;
sc 1603 dev/ic/rtw.c rtw_hwring_setup(struct rtw_softc *sc)
sc 1606 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc 1609 dev/ic/rtw.c sc->sc_txdesc_blk[RTW_TXPRILO].tdb_basereg = RTW_TLPDA;
sc 1610 dev/ic/rtw.c sc->sc_txdesc_blk[RTW_TXPRILO].tdb_base = RTW_RING_BASE(sc, hd_txlo);
sc 1611 dev/ic/rtw.c sc->sc_txdesc_blk[RTW_TXPRIMD].tdb_basereg = RTW_TNPDA;
sc 1612 dev/ic/rtw.c sc->sc_txdesc_blk[RTW_TXPRIMD].tdb_base = RTW_RING_BASE(sc, hd_txmd);
sc 1613 dev/ic/rtw.c sc->sc_txdesc_blk[RTW_TXPRIHI].tdb_basereg = RTW_THPDA;
sc 1614 dev/ic/rtw.c sc->sc_txdesc_blk[RTW_TXPRIHI].tdb_base = RTW_RING_BASE(sc, hd_txhi);
sc 1615 dev/ic/rtw.c sc->sc_txdesc_blk[RTW_TXPRIBCN].tdb_basereg = RTW_TBDA;
sc 1616 dev/ic/rtw.c sc->sc_txdesc_blk[RTW_TXPRIBCN].tdb_base = RTW_RING_BASE(sc, hd_bcn);
sc 1619 dev/ic/rtw.c tdb = &sc->sc_txdesc_blk[pri];
sc 1626 dev/ic/rtw.c RTW_WRITE(regs, RTW_RDSAR, RTW_RING_BASE(sc, hd_rx));
sc 1630 dev/ic/rtw.c (u_int *)RTW_RING_BASE(sc, hd_rx)));
sc 1636 dev/ic/rtw.c rtw_swring_setup(struct rtw_softc *sc)
sc 1642 dev/ic/rtw.c rtw_txdesc_blk_init_all(&sc->sc_txdesc_blk[0]);
sc 1644 dev/ic/rtw.c rtw_txsoft_blk_init_all(&sc->sc_txsoft_blk[0]);
sc 1646 dev/ic/rtw.c rdb = &sc->sc_rxdesc_blk;
sc 1647 dev/ic/rtw.c if ((rc = rtw_rxsoft_init_all(sc->sc_dmat, sc->sc_rxsoft,
sc 1648 dev/ic/rtw.c &rdb->rdb_ndesc, sc->sc_dev.dv_xname)) != 0 &&
sc 1651 dev/ic/rtw.c sc->sc_dev.dv_xname);
sc 1655 dev/ic/rtw.c rdb = &sc->sc_rxdesc_blk;
sc 1658 dev/ic/rtw.c rtw_rxdesc_init_all(rdb, sc->sc_rxsoft, 1);
sc 1661 dev/ic/rtw.c tdb = &sc->sc_txdesc_blk[0];
sc 1687 dev/ic/rtw.c rtw_txring_fixup(struct rtw_softc *sc)
sc 1692 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc 1695 dev/ic/rtw.c tdb = &sc->sc_txdesc_blk[pri];
sc 1707 dev/ic/rtw.c rtw_rxring_fixup(struct rtw_softc *sc)
sc 1713 dev/ic/rtw.c rdsar = letoh32(RTW_READ(&sc->sc_regs, RTW_RDSAR));
sc 1714 dev/ic/rtw.c next = (rdsar - RTW_RING_BASE(sc, hd_rx)) / sizeof(struct rtw_rxdesc);
sc 1716 dev/ic/rtw.c rdb = &sc->sc_rxdesc_blk;
sc 1726 dev/ic/rtw.c rtw_txdescs_reset(struct rtw_softc *sc)
sc 1731 dev/ic/rtw.c rtw_collect_txring(sc, &sc->sc_txsoft_blk[pri],
sc 1732 dev/ic/rtw.c &sc->sc_txdesc_blk[pri], 1);
sc 1737 dev/ic/rtw.c rtw_intr_ioerror(struct rtw_softc *sc, u_int16_t isr)
sc 1741 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc 1745 dev/ic/rtw.c ("%s: tx fifo underflow\n", sc->sc_dev.dv_xname));
sc 1756 dev/ic/rtw.c "\n", sc->sc_dev.dv_xname, isr));
sc 1759 dev/ic/rtw.c rtw_dump_rings(sc);
sc 1766 dev/ic/rtw.c rtw_intr_rx(sc, 0);
sc 1771 dev/ic/rtw.c rtw_txdescs_reset(sc);
sc 1777 dev/ic/rtw.c rtw_chip_reset1(regs, sc->sc_dev.dv_xname);
sc 1780 dev/ic/rtw.c rtw_rxdesc_init_all(&sc->sc_rxdesc_blk, &sc->sc_rxsoft[0], 1);
sc 1783 dev/ic/rtw.c rtw_dump_rings(sc);
sc 1786 dev/ic/rtw.c RTW_WRITE16(regs, RTW_IMR, sc->sc_inten);
sc 1789 dev/ic/rtw.c rtw_rxring_fixup(sc);
sc 1792 dev/ic/rtw.c rtw_txring_fixup(sc);
sc 1796 dev/ic/rtw.c rtw_suspend_ticks(struct rtw_softc *sc)
sc 1799 dev/ic/rtw.c ("%s: suspending ticks\n", sc->sc_dev.dv_xname));
sc 1800 dev/ic/rtw.c sc->sc_do_tick = 0;
sc 1804 dev/ic/rtw.c rtw_resume_ticks(struct rtw_softc *sc)
sc 1808 dev/ic/rtw.c tsftrl0 = RTW_READ(&sc->sc_regs, RTW_TSFTRL);
sc 1810 dev/ic/rtw.c tsftrl1 = RTW_READ(&sc->sc_regs, RTW_TSFTRL);
sc 1812 dev/ic/rtw.c RTW_WRITE(&sc->sc_regs, RTW_TINT, next_tick);
sc 1814 dev/ic/rtw.c sc->sc_do_tick = 1;
sc 1818 dev/ic/rtw.c sc->sc_dev.dv_xname, tsftrl1 - tsftrl0, tsftrl1, next_tick));
sc 1822 dev/ic/rtw.c rtw_intr_timeout(struct rtw_softc *sc)
sc 1824 dev/ic/rtw.c RTW_DPRINTF(RTW_DEBUG_TIMEOUT, ("%s: timeout\n", sc->sc_dev.dv_xname));
sc 1825 dev/ic/rtw.c if (sc->sc_do_tick)
sc 1826 dev/ic/rtw.c rtw_resume_ticks(sc);
sc 1834 dev/ic/rtw.c struct rtw_softc *sc = arg;
sc 1835 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc 1842 dev/ic/rtw.c if ((sc->sc_flags & RTW_F_ENABLED) == 0 ||
sc 1843 dev/ic/rtw.c (sc->sc_if.if_flags & IFF_RUNNING) == 0 ||
sc 1844 dev/ic/rtw.c (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) {
sc 1846 dev/ic/rtw.c sc->sc_dev.dv_xname));
sc 1856 dev/ic/rtw.c if (sc->sc_intr_ack != NULL)
sc 1857 dev/ic/rtw.c (*sc->sc_intr_ack)(regs);
sc 1873 dev/ic/rtw.c printf("%s: reg[ISR] = %x", sc->sc_dev.dv_xname, isr);
sc 1898 dev/ic/rtw.c rtw_intr_rx(sc, isr & RTW_INTR_RX);
sc 1900 dev/ic/rtw.c rtw_intr_tx(sc, isr & RTW_INTR_TX);
sc 1902 dev/ic/rtw.c rtw_intr_beacon(sc, isr & RTW_INTR_BEACON);
sc 1904 dev/ic/rtw.c rtw_intr_atim(sc);
sc 1906 dev/ic/rtw.c rtw_intr_ioerror(sc, isr & RTW_INTR_IOERROR);
sc 1908 dev/ic/rtw.c rtw_intr_timeout(sc);
sc 1919 dev/ic/rtw.c struct rtw_softc *sc = (struct rtw_softc *)ifp->if_softc;
sc 1920 dev/ic/rtw.c struct ieee80211com *ic = &sc->sc_ic;
sc 1921 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc 1923 dev/ic/rtw.c if ((sc->sc_flags & RTW_F_ENABLED) == 0)
sc 1926 dev/ic/rtw.c rtw_suspend_ticks(sc);
sc 1930 dev/ic/rtw.c if ((sc->sc_flags & RTW_F_INVALID) == 0) {
sc 1943 dev/ic/rtw.c rtw_io_enable(&sc->sc_regs, RTW_CR_RE|RTW_CR_TE, 0);
sc 1947 dev/ic/rtw.c rtw_txsofts_release(sc->sc_dmat, &sc->sc_ic,
sc 1948 dev/ic/rtw.c &sc->sc_txsoft_blk[pri]);
sc 1951 dev/ic/rtw.c rtw_rxbufs_release(sc->sc_dmat, &sc->sc_rxsoft[0]);
sc 1954 dev/ic/rtw.c rtw_disable(sc);
sc 2111 dev/ic/rtw.c rtw_pwrstate0(struct rtw_softc *sc, enum rtw_pwrstate power, int before_rf,
sc 2114 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc 2118 dev/ic/rtw.c (*sc->sc_pwrstate_cb)(regs, power, before_rf, digphy);
sc 2126 dev/ic/rtw.c rtw_pwrstate(struct rtw_softc *sc, enum rtw_pwrstate power)
sc 2132 dev/ic/rtw.c rtw_pwrstate_string(sc->sc_pwrstate), rtw_pwrstate_string(power)));
sc 2134 dev/ic/rtw.c if (sc->sc_pwrstate == power)
sc 2137 dev/ic/rtw.c rtw_pwrstate0(sc, power, 1, sc->sc_flags & RTW_F_DIGPHY);
sc 2138 dev/ic/rtw.c rc = (*sc->sc_rf_pwrstate)(sc, power);
sc 2139 dev/ic/rtw.c rtw_pwrstate0(sc, power, 0, sc->sc_flags & RTW_F_DIGPHY);
sc 2153 dev/ic/rtw.c sc->sc_pwrstate = power;
sc 2155 dev/ic/rtw.c sc->sc_pwrstate = RTW_OFF;
sc 2160 dev/ic/rtw.c rtw_tune(struct rtw_softc *sc)
sc 2162 dev/ic/rtw.c struct ieee80211com *ic = &sc->sc_ic;
sc 2173 dev/ic/rtw.c if (chan == sc->sc_cur_chan) {
sc 2179 dev/ic/rtw.c rtw_suspend_ticks(sc);
sc 2181 dev/ic/rtw.c rtw_io_enable(&sc->sc_regs, RTW_CR_RE | RTW_CR_TE, 0);
sc 2185 dev/ic/rtw.c KASSERT((sc->sc_flags & RTW_F_ENABLED) != 0);
sc 2192 dev/ic/rtw.c txpower = RTW_SR_GET(&sc->sc_srom, idx);
sc 2194 dev/ic/rtw.c if ((rc = rtw_phy_init(sc)) != 0) {
sc 2196 dev/ic/rtw.c printf("%s: phy init failed\n", sc->sc_dev.dv_xname);
sc 2199 dev/ic/rtw.c sc->sc_cur_chan = chan;
sc 2201 dev/ic/rtw.c rtw_io_enable(&sc->sc_regs, RTW_CR_RE | RTW_CR_TE, 1);
sc 2203 dev/ic/rtw.c rtw_resume_ticks(sc);
sc 2209 dev/ic/rtw.c rtw_disable(struct rtw_softc *sc)
sc 2213 dev/ic/rtw.c if ((sc->sc_flags & RTW_F_ENABLED) == 0)
sc 2217 dev/ic/rtw.c if ((sc->sc_flags & RTW_F_INVALID) == 0 &&
sc 2218 dev/ic/rtw.c (rc = rtw_pwrstate(sc, RTW_OFF)) != 0) {
sc 2220 dev/ic/rtw.c sc->sc_dev.dv_xname, rc);
sc 2223 dev/ic/rtw.c if (sc->sc_disable != NULL)
sc 2224 dev/ic/rtw.c (*sc->sc_disable)(sc);
sc 2226 dev/ic/rtw.c sc->sc_flags &= ~RTW_F_ENABLED;
sc 2230 dev/ic/rtw.c rtw_enable(struct rtw_softc *sc)
sc 2232 dev/ic/rtw.c if ((sc->sc_flags & RTW_F_ENABLED) == 0) {
sc 2233 dev/ic/rtw.c if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
sc 2235 dev/ic/rtw.c sc->sc_dev.dv_xname);
sc 2238 dev/ic/rtw.c sc->sc_flags |= RTW_F_ENABLED;
sc 2244 dev/ic/rtw.c rtw_transmit_config(struct rtw_softc *sc)
sc 2246 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc 2254 dev/ic/rtw.c if ((sc->sc_flags & RTW_F_RTL8185) == 0)
sc 2270 dev/ic/rtw.c rtw_enable_interrupts(struct rtw_softc *sc)
sc 2272 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc 2274 dev/ic/rtw.c sc->sc_inten = RTW_INTR_RX|RTW_INTR_TX|RTW_INTR_BEACON|RTW_INTR_ATIMINT;
sc 2275 dev/ic/rtw.c sc->sc_inten |= RTW_INTR_IOERROR|RTW_INTR_TIMEOUT;
sc 2277 dev/ic/rtw.c RTW_WRITE16(regs, RTW_IMR, sc->sc_inten);
sc 2283 dev/ic/rtw.c if (sc->sc_intr_ack != NULL)
sc 2284 dev/ic/rtw.c (*sc->sc_intr_ack)(regs);
sc 2288 dev/ic/rtw.c rtw_set_nettype(struct rtw_softc *sc, enum ieee80211_opmode opmode)
sc 2293 dev/ic/rtw.c rtw_set_access(&sc->sc_regs, RTW_ACCESS_CONFIG);
sc 2295 dev/ic/rtw.c msr = RTW_READ8(&sc->sc_regs, RTW_MSR) & ~RTW_MSR_NETYPE_MASK;
sc 2313 dev/ic/rtw.c RTW_WRITE8(&sc->sc_regs, RTW_MSR, msr);
sc 2315 dev/ic/rtw.c rtw_set_access(&sc->sc_regs, RTW_ACCESS_NONE);
sc 2319 dev/ic/rtw.c rtw_pktfilt_load(struct rtw_softc *sc)
sc 2321 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc 2322 dev/ic/rtw.c struct ieee80211com *ic = &sc->sc_ic;
sc 2324 dev/ic/rtw.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 2332 dev/ic/rtw.c sc->sc_rcr &= ~RTW_RCR_PKTFILTER_MASK;
sc 2333 dev/ic/rtw.c sc->sc_rcr &= ~(RTW_RCR_MXDMA_MASK | RTW8180_RCR_RXFTH_MASK);
sc 2335 dev/ic/rtw.c sc->sc_rcr |= RTW_RCR_PKTFILTER_DEFAULT;
sc 2337 dev/ic/rtw.c sc->sc_rcr |= RTW_RCR_ENMARP;
sc 2339 dev/ic/rtw.c sc->sc_rcr |= RTW_RCR_MXDMA_1024 | RTW8180_RCR_RXFTH_WHOLE;
sc 2343 dev/ic/rtw.c sc->sc_rcr |= RTW_RCR_MONITOR;
sc 2348 dev/ic/rtw.c sc->sc_rcr |= RTW_RCR_ADD3;
sc 2358 dev/ic/rtw.c sc->sc_rcr |= RTW_RCR_AB; /* accept all broadcast */
sc 2361 dev/ic/rtw.c sc->sc_rcr |= RTW_RCR_AB; /* accept all broadcast */
sc 2380 dev/ic/rtw.c sc->sc_rcr |= RTW_RCR_AM;
sc 2390 dev/ic/rtw.c sc->sc_rcr |= RTW_RCR_AM; /* accept all multicast */
sc 2396 dev/ic/rtw.c RTW_WRITE(regs, RTW_RCR, sc->sc_rcr);
sc 2399 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_PKTFILT,
sc 2401 dev/ic/rtw.c sc->sc_dev.dv_xname, RTW_READ(regs, RTW_MAR0),
sc 2411 dev/ic/rtw.c struct rtw_softc *sc = (struct rtw_softc *)ifp->if_softc;
sc 2412 dev/ic/rtw.c struct ieee80211com *ic = &sc->sc_ic;
sc 2413 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc 2416 dev/ic/rtw.c if ((rc = rtw_enable(sc)) != 0)
sc 2423 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_TUNE, ("%s: channel %d freq %d flags 0x%04x\n",
sc 2427 dev/ic/rtw.c if ((rc = rtw_pwrstate(sc, RTW_OFF)) != 0)
sc 2430 dev/ic/rtw.c if ((rc = rtw_swring_setup(sc)) != 0)
sc 2433 dev/ic/rtw.c rtw_transmit_config(sc);
sc 2441 dev/ic/rtw.c if (sc->sc_flags & RTW_F_RTL8185)
sc 2454 dev/ic/rtw.c rtw_set_rfprog(regs, sc->sc_rfchipid, sc->sc_dev.dv_xname);
sc 2456 dev/ic/rtw.c RTW_WRITE8(regs, RTW_PHYDELAY, sc->sc_phydelay);
sc 2462 dev/ic/rtw.c rtw_enable_interrupts(sc);
sc 2464 dev/ic/rtw.c rtw_pktfilt_load(sc);
sc 2466 dev/ic/rtw.c rtw_hwring_setup(sc);
sc 2476 dev/ic/rtw.c rtw_resume_ticks(sc);
sc 2478 dev/ic/rtw.c rtw_set_nettype(sc, IEEE80211_M_MONITOR);
sc 2486 dev/ic/rtw.c printf("%s: interface not running\n", sc->sc_dev.dv_xname);
sc 2522 dev/ic/rtw.c rtw_led_newstate(struct rtw_softc *sc, enum ieee80211_state nstate)
sc 2526 dev/ic/rtw.c ls = &sc->sc_led_state;
sc 2530 dev/ic/rtw.c rtw_led_init(&sc->sc_regs);
sc 2551 dev/ic/rtw.c rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
sc 2608 dev/ic/rtw.c struct rtw_softc *sc = (struct rtw_softc *)arg;
sc 2609 dev/ic/rtw.c struct rtw_led_state *ls = &sc->sc_led_state;
sc 2624 dev/ic/rtw.c rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
sc 2634 dev/ic/rtw.c struct rtw_softc *sc = (struct rtw_softc *)arg;
sc 2635 dev/ic/rtw.c struct rtw_led_state *ls = &sc->sc_led_state;
sc 2639 dev/ic/rtw.c rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
sc 2655 dev/ic/rtw.c struct rtw_softc *sc = ifp->if_softc;
sc 2656 dev/ic/rtw.c struct ieee80211com *ic = &sc->sc_ic;
sc 2680 dev/ic/rtw.c if ((sc->sc_flags & RTW_F_ENABLED) != 0) {
sc 2681 dev/ic/rtw.c rtw_pktfilt_load(sc);
sc 2684 dev/ic/rtw.c } else if ((sc->sc_flags & RTW_F_ENABLED) != 0)
sc 2690 dev/ic/rtw.c rc = ether_addmulti(ifr, &sc->sc_ic.ic_ac);
sc 2692 dev/ic/rtw.c rc = ether_delmulti(ifr, &sc->sc_ic.ic_ac);
sc 2696 dev/ic/rtw.c rtw_pktfilt_load(sc);
sc 2701 dev/ic/rtw.c if ((sc->sc_flags & RTW_F_ENABLED) != 0)
sc 2716 dev/ic/rtw.c rtw_txring_choose(struct rtw_softc *sc, struct rtw_txsoft_blk **tsbp,
sc 2724 dev/ic/rtw.c tsb = &sc->sc_txsoft_blk[pri];
sc 2725 dev/ic/rtw.c tdb = &sc->sc_txdesc_blk[pri];
sc 2740 dev/ic/rtw.c rtw_80211_dequeue(struct rtw_softc *sc, struct ifqueue *ifq, int pri,
sc 2748 dev/ic/rtw.c if (rtw_txring_choose(sc, tsbp, tdbp, pri) == -1) {
sc 2749 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT_RSRC, ("%s: no ring %d descriptor\n",
sc 2752 dev/ic/rtw.c sc->sc_if.if_timer = 1;
sc 2770 dev/ic/rtw.c struct rtw_softc *sc;
sc 2773 dev/ic/rtw.c sc = (struct rtw_softc *)ifp->if_softc;
sc 2775 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT,
sc 2776 dev/ic/rtw.c ("%s: enter %s\n", sc->sc_dev.dv_xname, __func__));
sc 2780 dev/ic/rtw.c if (sc->sc_ic.ic_state == IEEE80211_S_RUN &&
sc 2781 dev/ic/rtw.c (*mp = rtw_80211_dequeue(sc, &sc->sc_beaconq, RTW_TXPRIBCN, tsbp,
sc 2783 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue beacon frame\n",
sc 2788 dev/ic/rtw.c if ((*mp = rtw_80211_dequeue(sc, &sc->sc_ic.ic_mgtq, RTW_TXPRIMD, tsbp,
sc 2790 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue mgt frame\n",
sc 2795 dev/ic/rtw.c if (sc->sc_ic.ic_state != IEEE80211_S_RUN) {
sc 2796 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: not running\n", __func__));
sc 2800 dev/ic/rtw.c if ((*mp = rtw_80211_dequeue(sc, &sc->sc_ic.ic_pwrsaveq, RTW_TXPRIHI,
sc 2802 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue pwrsave frame\n",
sc 2807 dev/ic/rtw.c if (sc->sc_ic.ic_state != IEEE80211_S_RUN) {
sc 2808 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: not running\n", __func__));
sc 2816 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: no frame ready\n",
sc 2821 dev/ic/rtw.c if (rtw_txring_choose(sc, tsbp, tdbp, RTW_TXPRIMD) == -1) {
sc 2822 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: no descriptor\n", __func__));
sc 2824 dev/ic/rtw.c sc->sc_if.if_timer = 1;
sc 2830 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: no frame/ring ready\n",
sc 2834 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue data frame\n", __func__));
sc 2841 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT,
sc 2848 dev/ic/rtw.c if (sc->sc_ic.ic_flags & IEEE80211_F_WEPON) {
sc 2853 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: leave\n", __func__));
sc 3100 dev/ic/rtw.c rtw_print_txdesc(struct rtw_softc *sc, const char *action,
sc 3104 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT_DESC, ("%s: %p %s txdesc[%d] next %#08x "
sc 3106 dev/ic/rtw.c sc->sc_dev.dv_xname, ts, action, desc,
sc 3124 dev/ic/rtw.c struct rtw_softc *sc;
sc 3131 dev/ic/rtw.c sc = (struct rtw_softc *)ifp->if_softc;
sc 3132 dev/ic/rtw.c ic = &sc->sc_ic;
sc 3134 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT,
sc 3135 dev/ic/rtw.c ("%s: enter %s\n", sc->sc_dev.dv_xname, __func__));
sc 3155 dev/ic/rtw.c m0 = rtw_dmamap_load_txbuf(sc->sc_dmat, dmamap, m0,
sc 3156 dev/ic/rtw.c tdb->tdb_nfree, &ifp->if_flags, sc->sc_dev.dv_xname);
sc 3159 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT,
sc 3174 dev/ic/rtw.c if ((sc->sc_if.if_flags & (IFF_DEBUG|IFF_LINK2)) ==
sc 3215 dev/ic/rtw.c (sc->sc_if.if_flags & (IFF_DEBUG|IFF_LINK2)) ==
sc 3217 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT,
sc 3246 dev/ic/rtw.c if (sc->sc_radiobpf != NULL) {
sc 3248 dev/ic/rtw.c struct rtw_tx_radiotap_header *rt = &sc->sc_txtap;
sc 3258 dev/ic/rtw.c mb.m_len = sizeof(sc->sc_txtapu);
sc 3263 dev/ic/rtw.c bpf_mtap(sc->sc_radiobpf, &mb, BPF_DIRECTION_OUT);
sc 3272 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT_DESC,
sc 3285 dev/ic/rtw.c rtw_print_txdesc(sc, "load", ts, tdb, desc);
sc 3299 dev/ic/rtw.c rtw_print_txdesc(sc, "FS on", ts, tdb, ts->ts_first);
sc 3300 dev/ic/rtw.c rtw_print_txdesc(sc, "LS on", ts, tdb, ts->ts_last);
sc 3313 dev/ic/rtw.c rtw_print_txdesc(sc, "OWN on", ts, tdb, ts->ts_first);
sc 3322 dev/ic/rtw.c if (tsb != &sc->sc_txsoft_blk[RTW_TXPRIBCN])
sc 3323 dev/ic/rtw.c sc->sc_led_state.ls_event |= RTW_LED_S_TX;
sc 3326 dev/ic/rtw.c tppoll = RTW_READ8(&sc->sc_regs, RTW_TPPOLL);
sc 3329 dev/ic/rtw.c RTW_WRITE8(&sc->sc_regs, RTW_TPPOLL, tppoll);
sc 3330 dev/ic/rtw.c RTW_SYNC(&sc->sc_regs, RTW_TPPOLL, RTW_TPPOLL);
sc 3333 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: leave\n", __func__));
sc 3336 dev/ic/rtw.c bus_dmamap_unload(sc->sc_dmat, dmamap);
sc 3339 dev/ic/rtw.c ieee80211_release_node(&sc->sc_ic, ni);
sc 3364 dev/ic/rtw.c struct rtw_softc *sc;
sc 3367 dev/ic/rtw.c sc = ifp->if_softc;
sc 3371 dev/ic/rtw.c if ((sc->sc_flags & RTW_F_ENABLED) == 0)
sc 3375 dev/ic/rtw.c tsb = &sc->sc_txsoft_blk[pri];
sc 3397 dev/ic/rtw.c rtw_idle(&sc->sc_regs);
sc 3398 dev/ic/rtw.c rtw_io_enable(&sc->sc_regs, RTW_CR_TE, 0);
sc 3399 dev/ic/rtw.c rtw_txdescs_reset(sc);
sc 3400 dev/ic/rtw.c rtw_io_enable(&sc->sc_regs, RTW_CR_TE, 1);
sc 3401 dev/ic/rtw.c rtw_txring_fixup(sc);
sc 3410 dev/ic/rtw.c struct rtw_softc *sc = arg;
sc 3411 dev/ic/rtw.c struct ieee80211com *ic = &sc->sc_ic;
sc 3423 dev/ic/rtw.c rtw_join_bss(struct rtw_softc *sc, u_int8_t *bssid, u_int16_t intval0)
sc 3427 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc 3461 dev/ic/rtw.c struct rtw_softc *sc = ifp->if_softc;
sc 3467 dev/ic/rtw.c rtw_led_newstate(sc, nstate);
sc 3470 dev/ic/rtw.c timeout_del(&sc->sc_scan_to);
sc 3471 dev/ic/rtw.c sc->sc_cur_chan = IEEE80211_CHAN_ANY;
sc 3472 dev/ic/rtw.c return (*sc->sc_mtbl.mt_newstate)(ic, nstate, arg);
sc 3476 dev/ic/rtw.c rtw_pwrstate(sc, RTW_ON);
sc 3478 dev/ic/rtw.c if ((error = rtw_tune(sc)) != 0)
sc 3488 dev/ic/rtw.c rtw_set_nettype(sc, IEEE80211_M_MONITOR);
sc 3491 dev/ic/rtw.c timeout_add(&sc->sc_scan_to, rtw_dwelltime * hz / 1000);
sc 3498 dev/ic/rtw.c rtw_set_nettype(sc, IEEE80211_M_MONITOR);
sc 3502 dev/ic/rtw.c rtw_join_bss(sc, ic->ic_bss->ni_bssid,
sc 3508 dev/ic/rtw.c rtw_set_nettype(sc, ic->ic_opmode);
sc 3516 dev/ic/rtw.c timeout_del(&sc->sc_scan_to);
sc 3518 dev/ic/rtw.c return (*sc->sc_mtbl.mt_newstate)(ic, nstate, arg);
sc 3535 dev/ic/rtw.c rtw_ibss_merge(struct rtw_softc *sc, struct ieee80211_node *ni,
sc 3539 dev/ic/rtw.c struct ieee80211com *ic = &sc->sc_ic;
sc 3542 dev/ic/rtw.c rtw_tsf_extend(&sc->sc_regs, rstamp)) == ENETRESET) {
sc 3546 dev/ic/rtw.c tppoll = RTW_READ8(&sc->sc_regs, RTW_TPPOLL);
sc 3548 dev/ic/rtw.c RTW_WRITE8(&sc->sc_regs, RTW_TPPOLL, tppoll);
sc 3549 dev/ic/rtw.c (void)ieee80211_new_state(&sc->sc_ic, IEEE80211_S_RUN, -1);
sc 3558 dev/ic/rtw.c struct rtw_softc *sc = (struct rtw_softc*)ic->ic_softc;
sc 3560 dev/ic/rtw.c (*sc->sc_mtbl.mt_recv_mgmt)(ic, m, ni, subtype, rssi, rstamp);
sc 3568 dev/ic/rtw.c rtw_ibss_merge(sc, ni, rstamp);
sc 3579 dev/ic/rtw.c struct rtw_softc *sc = (struct rtw_softc *)ic->ic_if.if_softc;
sc 3580 dev/ic/rtw.c struct ieee80211_node *ni = (*sc->sc_mtbl.mt_node_alloc)(ic);
sc 3582 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_NODE,
sc 3583 dev/ic/rtw.c ("%s: alloc node %p\n", sc->sc_dev.dv_xname, ni));
sc 3590 dev/ic/rtw.c struct rtw_softc *sc = (struct rtw_softc *)ic->ic_if.if_softc;
sc 3592 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_NODE,
sc 3593 dev/ic/rtw.c ("%s: freeing node %p %s\n", sc->sc_dev.dv_xname, ni,
sc 3595 dev/ic/rtw.c (*sc->sc_mtbl.mt_node_free)(ic, ni);
sc 3616 dev/ic/rtw.c struct rtw_softc *sc = ifp->if_softc;
sc 3618 dev/ic/rtw.c if ((sc->sc_flags & RTW_F_ENABLED) == 0) {
sc 3629 dev/ic/rtw.c struct rtw_softc *sc = arg;
sc 3630 dev/ic/rtw.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 3633 dev/ic/rtw.c DPRINTF(sc, RTW_DEBUG_PWR,
sc 3634 dev/ic/rtw.c ("%s: rtw_power(%d,)\n", sc->sc_dev.dv_xname, why));
sc 3643 dev/ic/rtw.c if (sc->sc_power != NULL)
sc 3644 dev/ic/rtw.c (*sc->sc_power)(sc, why);
sc 3648 dev/ic/rtw.c if (sc->sc_power != NULL)
sc 3649 dev/ic/rtw.c (*sc->sc_power)(sc, why);
sc 3661 dev/ic/rtw.c struct rtw_softc *sc = arg;
sc 3663 dev/ic/rtw.c rtw_stop(&sc->sc_ic.ic_if, 1);
sc 3713 dev/ic/rtw.c rtw_txsoft_blk_cleanup_all(struct rtw_softc *sc)
sc 3719 dev/ic/rtw.c tsb = &sc->sc_txsoft_blk[pri];
sc 3726 dev/ic/rtw.c rtw_txsoft_blk_setup_all(struct rtw_softc *sc)
sc 3733 dev/ic/rtw.c tsbs = sc->sc_txsoft_blk;
sc 3763 dev/ic/rtw.c rtw_txdesc_blk_setup_all(struct rtw_softc *sc)
sc 3765 dev/ic/rtw.c rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRILO],
sc 3766 dev/ic/rtw.c &sc->sc_descs->hd_txlo[0], RTW_NTXDESCLO,
sc 3767 dev/ic/rtw.c RTW_RING_OFFSET(hd_txlo), RTW_RING_BASE(sc, hd_txlo));
sc 3769 dev/ic/rtw.c rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRIMD],
sc 3770 dev/ic/rtw.c &sc->sc_descs->hd_txmd[0], RTW_NTXDESCMD,
sc 3771 dev/ic/rtw.c RTW_RING_OFFSET(hd_txmd), RTW_RING_BASE(sc, hd_txmd));
sc 3773 dev/ic/rtw.c rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRIHI],
sc 3774 dev/ic/rtw.c &sc->sc_descs->hd_txhi[0], RTW_NTXDESCHI,
sc 3775 dev/ic/rtw.c RTW_RING_OFFSET(hd_txhi), RTW_RING_BASE(sc, hd_txhi));
sc 3777 dev/ic/rtw.c rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRIBCN],
sc 3778 dev/ic/rtw.c &sc->sc_descs->hd_bcn[0], RTW_NTXDESCBCN,
sc 3779 dev/ic/rtw.c RTW_RING_OFFSET(hd_bcn), RTW_RING_BASE(sc, hd_bcn));
sc 3783 dev/ic/rtw.c rtw_rf_attach(struct rtw_softc *sc, int rfchipid)
sc 3785 dev/ic/rtw.c struct rtw_bbpset *bb = &sc->sc_bbpset;
sc 3793 dev/ic/rtw.c sc->sc_pwrstate_cb = rtw_rtl_pwrstate;
sc 3794 dev/ic/rtw.c sc->sc_rf_init = rtw_rtl8255_init;
sc 3795 dev/ic/rtw.c sc->sc_rf_pwrstate = rtw_rtl8225_pwrstate;
sc 3796 dev/ic/rtw.c sc->sc_rf_tune = rtw_rtl8225_tune;
sc 3797 dev/ic/rtw.c sc->sc_rf_txpower = rtw_rtl8225_txpower;
sc 3801 dev/ic/rtw.c sc->sc_pwrstate_cb = rtw_rtl_pwrstate;
sc 3802 dev/ic/rtw.c sc->sc_rf_init = rtw_rtl8255_init;
sc 3803 dev/ic/rtw.c sc->sc_rf_pwrstate = rtw_rtl8255_pwrstate;
sc 3804 dev/ic/rtw.c sc->sc_rf_tune = rtw_rtl8255_tune;
sc 3805 dev/ic/rtw.c sc->sc_rf_txpower = rtw_rtl8255_txpower;
sc 3823 dev/ic/rtw.c sc->sc_pwrstate_cb = rtw_maxim_pwrstate;
sc 3824 dev/ic/rtw.c sc->sc_rf_init = rtw_max2820_init;
sc 3825 dev/ic/rtw.c sc->sc_rf_pwrstate = rtw_max2820_pwrstate;
sc 3826 dev/ic/rtw.c sc->sc_rf_tune = rtw_max2820_tune;
sc 3827 dev/ic/rtw.c sc->sc_rf_txpower = rtw_max2820_txpower;
sc 3845 dev/ic/rtw.c sc->sc_pwrstate_cb = rtw_philips_pwrstate;
sc 3846 dev/ic/rtw.c sc->sc_rf_init = rtw_sa2400_init;
sc 3847 dev/ic/rtw.c sc->sc_rf_pwrstate = rtw_sa2400_pwrstate;
sc 3848 dev/ic/rtw.c sc->sc_rf_tune = rtw_sa2400_tune;
sc 3849 dev/ic/rtw.c sc->sc_rf_txpower = rtw_sa2400_txpower;
sc 3860 dev/ic/rtw.c sc->sc_pwrstate_cb = rtw_rfmd_pwrstate;
sc 3879 dev/ic/rtw.c sc->sc_pwrstate_cb = rtw_maxim_pwrstate;
sc 3880 dev/ic/rtw.c sc->sc_rf_init = rtw_grf5101_init;
sc 3881 dev/ic/rtw.c sc->sc_rf_pwrstate = rtw_grf5101_pwrstate;
sc 3882 dev/ic/rtw.c sc->sc_rf_tune = rtw_grf5101_tune;
sc 3883 dev/ic/rtw.c sc->sc_rf_txpower = rtw_grf5101_txpower;
sc 3930 dev/ic/rtw.c rtw_attach(struct rtw_softc *sc)
sc 3932 dev/ic/rtw.c struct ieee80211com *ic = &sc->sc_ic;
sc 3943 dev/ic/rtw.c if (sc->sc_regs.r_read8 == NULL) {
sc 3944 dev/ic/rtw.c sc->sc_regs.r_read8 = rtw_read8;
sc 3945 dev/ic/rtw.c sc->sc_regs.r_read16 = rtw_read16;
sc 3946 dev/ic/rtw.c sc->sc_regs.r_read32 = rtw_read32;
sc 3947 dev/ic/rtw.c sc->sc_regs.r_write8 = rtw_write8;
sc 3948 dev/ic/rtw.c sc->sc_regs.r_write16 = rtw_write16;
sc 3949 dev/ic/rtw.c sc->sc_regs.r_write32 = rtw_write32;
sc 3950 dev/ic/rtw.c sc->sc_regs.r_barrier = rtw_barrier;
sc 3953 dev/ic/rtw.c sc->sc_hwverid = RTW_READ(&sc->sc_regs, RTW_TCR) & RTW_TCR_HWVERID_MASK;
sc 3954 dev/ic/rtw.c switch (sc->sc_hwverid) {
sc 3957 dev/ic/rtw.c sc->sc_flags |= RTW_F_RTL8185;
sc 3967 dev/ic/rtw.c sc->sc_hwverid);
sc 3972 dev/ic/rtw.c printf("%s: ver %s, ", sc->sc_dev.dv_xname, vername);
sc 3974 dev/ic/rtw.c rc = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct rtw_descs),
sc 3975 dev/ic/rtw.c RTW_DESC_ALIGNMENT, 0, &sc->sc_desc_segs, 1, &sc->sc_desc_nsegs,
sc 3980 dev/ic/rtw.c sc->sc_dev.dv_xname, rc);
sc 3984 dev/ic/rtw.c rc = bus_dmamem_map(sc->sc_dmat, &sc->sc_desc_segs,
sc 3985 dev/ic/rtw.c sc->sc_desc_nsegs, sizeof(struct rtw_descs),
sc 3986 dev/ic/rtw.c (caddr_t*)&sc->sc_descs, BUS_DMA_COHERENT);
sc 3990 dev/ic/rtw.c sc->sc_dev.dv_xname, rc);
sc 3994 dev/ic/rtw.c rc = bus_dmamap_create(sc->sc_dmat, sizeof(struct rtw_descs), 1,
sc 3995 dev/ic/rtw.c sizeof(struct rtw_descs), 0, 0, &sc->sc_desc_dmamap);
sc 3999 dev/ic/rtw.c "error %d\n", sc->sc_dev.dv_xname, rc);
sc 4003 dev/ic/rtw.c sc->sc_rxdesc_blk.rdb_dmat = sc->sc_dmat;
sc 4004 dev/ic/rtw.c sc->sc_rxdesc_blk.rdb_dmamap = sc->sc_desc_dmamap;
sc 4007 dev/ic/rtw.c sc->sc_txdesc_blk[pri].tdb_dmat = sc->sc_dmat;
sc 4008 dev/ic/rtw.c sc->sc_txdesc_blk[pri].tdb_dmamap = sc->sc_desc_dmamap;
sc 4011 dev/ic/rtw.c rc = bus_dmamap_load(sc->sc_dmat, sc->sc_desc_dmamap, sc->sc_descs,
sc 4016 dev/ic/rtw.c "error %d\n", sc->sc_dev.dv_xname, rc);
sc 4020 dev/ic/rtw.c if (rtw_txsoft_blk_setup_all(sc) != 0)
sc 4023 dev/ic/rtw.c rtw_txdesc_blk_setup_all(sc);
sc 4025 dev/ic/rtw.c sc->sc_rxdesc_blk.rdb_desc = &sc->sc_descs->hd_rx[0];
sc 4028 dev/ic/rtw.c tsb = &sc->sc_txsoft_blk[pri];
sc 4030 dev/ic/rtw.c if ((rc = rtw_txdesc_dmamaps_create(sc->sc_dmat,
sc 4034 dev/ic/rtw.c sc->sc_dev.dv_xname, rc);
sc 4039 dev/ic/rtw.c if ((rc = rtw_rxdesc_dmamaps_create(sc->sc_dmat, &sc->sc_rxsoft[0],
sc 4042 dev/ic/rtw.c "error %d\n", sc->sc_dev.dv_xname, rc);
sc 4047 dev/ic/rtw.c if (rtw_reset(sc) != 0)
sc 4050 dev/ic/rtw.c sc->sc_rcr = RTW_READ(&sc->sc_regs, RTW_RCR);
sc 4052 dev/ic/rtw.c if ((sc->sc_rcr & RTW_RCR_9356SEL) != 0)
sc 4053 dev/ic/rtw.c sc->sc_flags |= RTW_F_9356SROM;
sc 4055 dev/ic/rtw.c if (rtw_srom_read(&sc->sc_regs, sc->sc_flags, &sc->sc_srom,
sc 4056 dev/ic/rtw.c sc->sc_dev.dv_xname) != 0)
sc 4059 dev/ic/rtw.c if (rtw_srom_parse(sc) != 0) {
sc 4061 dev/ic/rtw.c sc->sc_dev.dv_xname);
sc 4065 dev/ic/rtw.c RTW_DPRINTF(RTW_DEBUG_ATTACH, ("%s: %s PHY\n", sc->sc_dev.dv_xname,
sc 4066 dev/ic/rtw.c ((sc->sc_flags & RTW_F_DIGPHY) != 0) ? "digital" : "analog"));
sc 4069 dev/ic/rtw.c sc->sc_dev.dv_xname, sc->sc_csthr));
sc 4071 dev/ic/rtw.c if ((rtw_rf_attach(sc, sc->sc_rfchipid)) != 0) {
sc 4073 dev/ic/rtw.c sc->sc_dev.dv_xname);
sc 4077 dev/ic/rtw.c sc->sc_phydelay = rtw_check_phydelay(&sc->sc_regs, sc->sc_rcr);
sc 4080 dev/ic/rtw.c ("%s: PHY delay %d\n", sc->sc_dev.dv_xname, sc->sc_phydelay));
sc 4082 dev/ic/rtw.c if (sc->sc_locale == RTW_LOCALE_UNKNOWN)
sc 4083 dev/ic/rtw.c rtw_identify_country(&sc->sc_regs, &sc->sc_locale);
sc 4085 dev/ic/rtw.c rtw_init_channels(sc->sc_locale, &sc->sc_ic.ic_channels,
sc 4086 dev/ic/rtw.c sc->sc_dev.dv_xname);
sc 4088 dev/ic/rtw.c if (rtw_identify_sta(&sc->sc_regs, &sc->sc_ic.ic_myaddr,
sc 4089 dev/ic/rtw.c sc->sc_dev.dv_xname) != 0)
sc 4092 dev/ic/rtw.c ifp = &sc->sc_if;
sc 4093 dev/ic/rtw.c (void)memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 4094 dev/ic/rtw.c ifp->if_softc = sc;
sc 4101 dev/ic/rtw.c IFQ_SET_READY(&sc->sc_if.if_snd);
sc 4110 dev/ic/rtw.c rtw_led_attach(&sc->sc_led_state, (void *)sc);
sc 4115 dev/ic/rtw.c if_attach(&sc->sc_if);
sc 4116 dev/ic/rtw.c ieee80211_ifattach(&sc->sc_if);
sc 4118 dev/ic/rtw.c mtbl = &sc->sc_mtbl;
sc 4137 dev/ic/rtw.c ieee80211_media_init(&sc->sc_if, rtw_media_change, rtw_media_status);
sc 4138 dev/ic/rtw.c timeout_set(&sc->sc_scan_to, rtw_next_scan, sc);
sc 4141 dev/ic/rtw.c bzero(&sc->sc_rxtapu, sizeof(sc->sc_rxtapu));
sc 4142 dev/ic/rtw.c sc->sc_rxtap.rr_ihdr.it_len = sizeof(sc->sc_rxtapu);
sc 4143 dev/ic/rtw.c sc->sc_rxtap.rr_ihdr.it_present = RTW_RX_RADIOTAP_PRESENT;
sc 4145 dev/ic/rtw.c bzero(&sc->sc_txtapu, sizeof(sc->sc_txtapu));
sc 4146 dev/ic/rtw.c sc->sc_txtap.rt_ihdr.it_len = sizeof(sc->sc_txtapu);
sc 4147 dev/ic/rtw.c sc->sc_txtap.rt_ihdr.it_present = RTW_TX_RADIOTAP_PRESENT;
sc 4149 dev/ic/rtw.c bpfattach(&sc->sc_radiobpf, &sc->sc_ic.ic_if, DLT_IEEE802_11_RADIO,
sc 4153 dev/ic/rtw.c rtw_establish_hooks(&sc->sc_hooks, sc->sc_dev.dv_xname, (void*)sc);
sc 4158 dev/ic/rtw.c sr = &sc->sc_srom;
sc 4166 dev/ic/rtw.c rtw_rxdesc_dmamaps_destroy(sc->sc_dmat, &sc->sc_rxsoft[0],
sc 4171 dev/ic/rtw.c rtw_txdesc_dmamaps_destroy(sc->sc_dmat,
sc 4172 dev/ic/rtw.c sc->sc_txsoft_blk[pri].tsb_desc,
sc 4173 dev/ic/rtw.c sc->sc_txsoft_blk[pri].tsb_ndesc);
sc 4177 dev/ic/rtw.c rtw_txsoft_blk_cleanup_all(sc);
sc 4180 dev/ic/rtw.c bus_dmamap_unload(sc->sc_dmat, sc->sc_desc_dmamap);
sc 4182 dev/ic/rtw.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_desc_dmamap);
sc 4184 dev/ic/rtw.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_descs,
sc 4187 dev/ic/rtw.c bus_dmamem_free(sc->sc_dmat, &sc->sc_desc_segs,
sc 4188 dev/ic/rtw.c sc->sc_desc_nsegs);
sc 4194 dev/ic/rtw.c rtw_detach(struct rtw_softc *sc)
sc 4196 dev/ic/rtw.c sc->sc_flags |= RTW_F_INVALID;
sc 4198 dev/ic/rtw.c rtw_stop(&sc->sc_if, 1);
sc 4200 dev/ic/rtw.c rtw_disestablish_hooks(&sc->sc_hooks, sc->sc_dev.dv_xname,
sc 4201 dev/ic/rtw.c (void*)sc);
sc 4202 dev/ic/rtw.c timeout_del(&sc->sc_scan_to);
sc 4203 dev/ic/rtw.c ieee80211_ifdetach(&sc->sc_if);
sc 4204 dev/ic/rtw.c if_detach(&sc->sc_if);
sc 4261 dev/ic/rtw.c rtw_sa2400_txpower(struct rtw_softc *sc, u_int8_t opaque_txpower)
sc 4263 dev/ic/rtw.c return rtw_rf_macwrite(sc, SA2400_TX, opaque_txpower);
sc 4321 dev/ic/rtw.c rtw_sa2400_tune(struct rtw_softc *sc, u_int freq)
sc 4346 dev/ic/rtw.c if ((rc = rtw_rf_macwrite(sc, SA2400_SYNA, syna)) != 0)
sc 4348 dev/ic/rtw.c if ((rc = rtw_rf_macwrite(sc, SA2400_SYNB, synb)) != 0)
sc 4350 dev/ic/rtw.c if ((rc = rtw_rf_macwrite(sc, SA2400_SYNC, sync)) != 0)
sc 4352 dev/ic/rtw.c return rtw_rf_macwrite(sc, SA2400_SYND, 0x0);
sc 4356 dev/ic/rtw.c rtw_sa2400_pwrstate(struct rtw_softc *sc, enum rtw_pwrstate power)
sc 4372 dev/ic/rtw.c if (sc->sc_flags & RTW_F_DIGPHY)
sc 4375 dev/ic/rtw.c return rtw_rf_macwrite(sc, SA2400_OPMODE, opmode);
sc 4379 dev/ic/rtw.c rtw_sa2400_vcocal_start(struct rtw_softc *sc, int start)
sc 4389 dev/ic/rtw.c if (sc->sc_flags & RTW_F_DIGPHY)
sc 4392 dev/ic/rtw.c return rtw_rf_macwrite(sc, SA2400_OPMODE, opmode);
sc 4396 dev/ic/rtw.c rtw_sa2400_vco_calibration(struct rtw_softc *sc)
sc 4400 dev/ic/rtw.c if ((rc = rtw_sa2400_vcocal_start(sc, 1)) != 0)
sc 4404 dev/ic/rtw.c return rtw_sa2400_vcocal_start(sc, 0);
sc 4408 dev/ic/rtw.c rtw_sa2400_filter_calibration(struct rtw_softc *sc)
sc 4413 dev/ic/rtw.c if (sc->sc_flags & RTW_F_DIGPHY)
sc 4416 dev/ic/rtw.c return rtw_rf_macwrite(sc, SA2400_OPMODE, opmode);
sc 4420 dev/ic/rtw.c rtw_sa2400_dc_calibration(struct rtw_softc *sc)
sc 4425 dev/ic/rtw.c rtw_continuous_tx_enable(sc, 1);
sc 4429 dev/ic/rtw.c rc = rtw_rf_macwrite(sc, SA2400_OPMODE, dccal);
sc 4441 dev/ic/rtw.c rc = rtw_rf_macwrite(sc, SA2400_OPMODE, dccal);
sc 4447 dev/ic/rtw.c rtw_continuous_tx_enable(sc, 0);
sc 4453 dev/ic/rtw.c rtw_sa2400_calibrate(struct rtw_softc *sc, u_int freq)
sc 4459 dev/ic/rtw.c if ((rc = rtw_sa2400_vco_calibration(sc)) != 0)
sc 4463 dev/ic/rtw.c if ((rc = rtw_sa2400_tune(sc, freq)) != 0)
sc 4465 dev/ic/rtw.c if ((rc = rtw_sa2400_filter_calibration(sc)) != 0)
sc 4468 dev/ic/rtw.c if (!(sc->sc_flags & RTW_F_DIGPHY))
sc 4469 dev/ic/rtw.c return rtw_sa2400_dc_calibration(sc);
sc 4474 dev/ic/rtw.c rtw_sa2400_init(struct rtw_softc *sc, u_int freq, u_int8_t opaque_txpower,
sc 4480 dev/ic/rtw.c if ((rc = rtw_sa2400_txpower(sc, opaque_txpower)) != 0)
sc 4485 dev/ic/rtw.c return rtw_sa2400_pwrstate(sc, power);
sc 4488 dev/ic/rtw.c if ((rc = rtw_sa2400_pwrstate(sc, RTW_SLEEP)) != 0)
sc 4491 dev/ic/rtw.c if ((rc = rtw_sa2400_tune(sc, freq)) != 0)
sc 4499 dev/ic/rtw.c if ((rc = rtw_rf_macwrite(sc, SA2400_AGC, agc)) != 0)
sc 4507 dev/ic/rtw.c if ((rc = rtw_rf_macwrite(sc, SA2400_MANRX, manrx)) != 0)
sc 4510 dev/ic/rtw.c if ((rc = rtw_sa2400_calibrate(sc, freq)) != 0)
sc 4514 dev/ic/rtw.c return rtw_sa2400_pwrstate(sc, power);
sc 4519 dev/ic/rtw.c rtw_max2820_tune(struct rtw_softc *sc, u_int freq)
sc 4524 dev/ic/rtw.c return rtw_rf_hostwrite(sc, MAX2820_CHANNEL,
sc 4529 dev/ic/rtw.c rtw_max2820_init(struct rtw_softc *sc, u_int freq, u_int8_t opaque_txpower,
sc 4534 dev/ic/rtw.c if ((rc = rtw_rf_hostwrite(sc, MAX2820_TEST,
sc 4538 dev/ic/rtw.c if ((rc = rtw_rf_hostwrite(sc, MAX2820_ENABLE,
sc 4543 dev/ic/rtw.c if ((rc = rtw_max2820_pwrstate(sc, power)) != 0)
sc 4548 dev/ic/rtw.c if ((rc = rtw_rf_hostwrite(sc, MAX2820_SYNTH,
sc 4552 dev/ic/rtw.c if ((rc = rtw_max2820_tune(sc, freq)) != 0)
sc 4559 dev/ic/rtw.c if ((rc = rtw_rf_hostwrite(sc, MAX2820_RECEIVE,
sc 4565 dev/ic/rtw.c return rtw_rf_hostwrite(sc, MAX2820_TRANSMIT,
sc 4570 dev/ic/rtw.c rtw_max2820_txpower(struct rtw_softc *sc, u_int8_t opaque_txpower)
sc 4577 dev/ic/rtw.c rtw_max2820_pwrstate(struct rtw_softc *sc, enum rtw_pwrstate power)
sc 4591 dev/ic/rtw.c return rtw_rf_hostwrite(sc, MAX2820_ENABLE, enable);
sc 4595 dev/ic/rtw.c rtw_grf5101_init(struct rtw_softc *sc, u_int freq, u_int8_t opaque_txpower,
sc 4606 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x01, 0x1a23);
sc 4607 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x02, 0x4971);
sc 4608 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x03, 0x41de);
sc 4609 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x04, 0x2d80);
sc 4611 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x05, 0x61ff);
sc 4613 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x06, 0x0);
sc 4615 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x08, 0x7533);
sc 4616 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x09, 0xc401);
sc 4617 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x0a, 0x0);
sc 4618 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x0c, 0x1c7);
sc 4619 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x0d, 0x29d3);
sc 4620 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x0e, 0x2e8);
sc 4621 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x10, 0x192);
sc 4622 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x11, 0x248);
sc 4623 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x12, 0x0);
sc 4624 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x13, 0x20c4);
sc 4625 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x14, 0xf4fc);
sc 4626 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x15, 0x0);
sc 4627 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x16, 0x1500);
sc 4629 dev/ic/rtw.c if ((rc = rtw_grf5101_txpower(sc, opaque_txpower)) != 0)
sc 4632 dev/ic/rtw.c if ((rc = rtw_grf5101_tune(sc, freq)) != 0)
sc 4639 dev/ic/rtw.c rtw_grf5101_tune(struct rtw_softc *sc, u_int freq)
sc 4641 dev/ic/rtw.c struct ieee80211com *ic = &sc->sc_ic;
sc 4645 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x07, 0);
sc 4646 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x0b, channel - 1);
sc 4647 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x07, 0x1000);
sc 4653 dev/ic/rtw.c rtw_grf5101_txpower(struct rtw_softc *sc, u_int8_t opaque_txpower)
sc 4655 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x15, 0);
sc 4656 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x06, opaque_txpower);
sc 4657 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x15, 0x10);
sc 4658 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x15, 0x00);
sc 4664 dev/ic/rtw.c rtw_grf5101_pwrstate(struct rtw_softc *sc, enum rtw_pwrstate power)
sc 4669 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x07, 0x0000);
sc 4670 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x1f, 0x0045);
sc 4671 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x1f, 0x0005);
sc 4672 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x00, 0x08e4);
sc 4676 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x1f, 0x0001);
sc 4678 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x1f, 0x0001);
sc 4680 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x1f, 0x0041);
sc 4682 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x1f, 0x0061);
sc 4684 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x00, 0x0ae4);
sc 4686 dev/ic/rtw.c rtw_rf_macwrite(sc, 0x07, 0x1000);
sc 4695 dev/ic/rtw.c rtw_rtl8225_pwrstate(struct rtw_softc *sc, enum rtw_pwrstate power)
sc 4701 dev/ic/rtw.c rtw_rtl8225_init(struct rtw_softc *sc, u_int freq, u_int8_t opaque_txpower,
sc 4708 dev/ic/rtw.c rtw_rtl8225_txpower(struct rtw_softc *sc, u_int8_t opaque_txpower)
sc 4714 dev/ic/rtw.c rtw_rtl8225_tune(struct rtw_softc *sc, u_int freq)
sc 4720 dev/ic/rtw.c rtw_rtl8255_pwrstate(struct rtw_softc *sc, enum rtw_pwrstate power)
sc 4726 dev/ic/rtw.c rtw_rtl8255_init(struct rtw_softc *sc, u_int freq, u_int8_t opaque_txpower,
sc 4733 dev/ic/rtw.c rtw_rtl8255_txpower(struct rtw_softc *sc, u_int8_t opaque_txpower)
sc 4739 dev/ic/rtw.c rtw_rtl8255_tune(struct rtw_softc *sc, u_int freq)
sc 4745 dev/ic/rtw.c rtw_phy_init(struct rtw_softc *sc)
sc 4748 dev/ic/rtw.c struct ieee80211com *ic = &sc->sc_ic;
sc 4749 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc 4750 dev/ic/rtw.c int antdiv = sc->sc_flags & RTW_F_ANTDIV;
sc 4751 dev/ic/rtw.c int dflantb = sc->sc_flags & RTW_F_DFLANTB;
sc 4753 dev/ic/rtw.c u_int8_t opaque_txpower = rtw_chan2txpower(&sc->sc_srom, ic,
sc 4755 dev/ic/rtw.c u_int8_t cs_threshold = sc->sc_csthr;
sc 4764 dev/ic/rtw.c if ((rc = (*sc->sc_rf_txpower)(sc, opaque_txpower)) != 0)
sc 4766 dev/ic/rtw.c if ((rc = rtw_bbp_preinit(regs, sc->sc_bbpset.bb_antatten, dflantb,
sc 4769 dev/ic/rtw.c if ((rc = (*sc->sc_rf_tune)(sc, freq)) != 0)
sc 4772 dev/ic/rtw.c if ((rc = (*sc->sc_rf_init)(sc, freq, opaque_txpower, power)) != 0)
sc 4775 dev/ic/rtw.c if ((rc = (*sc->sc_rf_txpower)(sc, opaque_txpower)) != 0)
sc 4778 dev/ic/rtw.c return rtw_bbp_init(regs, &sc->sc_bbpset, antdiv, dflantb,
sc 5009 dev/ic/rtw.c rtw_rf_hostwrite(struct rtw_softc *sc, u_int addr, u_int32_t val)
sc 5020 dev/ic/rtw.c switch (sc->sc_rfchipid) {
sc 5062 dev/ic/rtw.c printf("%s: unknown rfchipid %d\n", __func__, sc->sc_rfchipid);
sc 5066 dev/ic/rtw.c (*rf_bangbits)(&sc->sc_regs, bits, lo_to_hi, nbits);
sc 5086 dev/ic/rtw.c rtw_rf_macwrite(struct rtw_softc *sc, u_int addr, u_int32_t val)
sc 5093 dev/ic/rtw.c switch (sc->sc_rfchipid) {
sc 5111 dev/ic/rtw.c switch (sc->sc_rfchipid) {
sc 5124 dev/ic/rtw.c printf("%s: unknown rfchipid %d\n", __func__, sc->sc_rfchipid);
sc 5128 dev/ic/rtw.c return rtw_rf_macbangbits(&sc->sc_regs, reg);
sc 254 dev/ic/rtwvar.h #define RTW_RING_BASE(sc, ring) ((sc)->sc_desc_physaddr + \
sc 177 dev/ic/sili.c sili_attach(struct sili_softc *sc)
sc 183 dev/ic/sili.c if (sili_ports_alloc(sc) != 0) {
sc 189 dev/ic/sili.c sili_write(sc, SILI_REG_GC, SILI_REG_GC_GR);
sc 190 dev/ic/sili.c sili_write(sc, SILI_REG_GC, 0x0);
sc 193 dev/ic/sili.c aaa.aaa_cookie = sc;
sc 196 dev/ic/sili.c aaa.aaa_nports = sc->sc_nports;
sc 200 dev/ic/sili.c sc->sc_atascsi = atascsi_attach(&sc->sc_dev, &aaa);
sc 206 dev/ic/sili.c sili_detach(struct sili_softc *sc, int flags)
sc 379 dev/ic/sili.c struct sili_softc *sc = arg;
sc 383 dev/ic/sili.c is = sili_read(sc, SILI_REG_GIS);
sc 386 dev/ic/sili.c sili_write(sc, SILI_REG_GIS, is);
sc 391 dev/ic/sili.c sili_port_intr(&sc->sc_ports[port], -1);
sc 399 dev/ic/sili.c sili_ports_alloc(struct sili_softc *sc)
sc 404 dev/ic/sili.c sc->sc_ports = malloc(sizeof(struct sili_port) * sc->sc_nports,
sc 406 dev/ic/sili.c bzero(sc->sc_ports, sizeof(struct sili_port) * sc->sc_nports);
sc 408 dev/ic/sili.c for (i = 0; i < sc->sc_nports; i++) {
sc 409 dev/ic/sili.c sp = &sc->sc_ports[i];
sc 411 dev/ic/sili.c sp->sp_sc = sc;
sc 414 dev/ic/sili.c DEVNAME(sc), i);
sc 416 dev/ic/sili.c if (bus_space_subregion(sc->sc_iot_port, sc->sc_ioh_port,
sc 419 dev/ic/sili.c "for port %d\n", DEVNAME(sc), i);
sc 429 dev/ic/sili.c sc->sc_ports = NULL;
sc 434 dev/ic/sili.c sili_ports_free(struct sili_softc *sc)
sc 439 dev/ic/sili.c for (i = 0; i < sc->sc_nports; i++) {
sc 440 dev/ic/sili.c sp = &sc->sc_ports[i];
sc 447 dev/ic/sili.c free(sc->sc_ports, M_DEVBUF);
sc 448 dev/ic/sili.c sc->sc_ports = NULL;
sc 454 dev/ic/sili.c struct sili_softc *sc = sp->sp_sc;
sc 465 dev/ic/sili.c sp->sp_cmds = sili_dmamem_alloc(sc, SILI_CMD_LEN * SILI_MAX_CMDS,
sc 469 dev/ic/sili.c sp->sp_scratch = sili_dmamem_alloc(sc, SILI_SCRATCH_LEN, PAGE_SIZE);
sc 480 dev/ic/sili.c if (bus_dmamap_create(sc->sc_dmat, MAXPHYS, SILI_DMA_SEGS,
sc 498 dev/ic/sili.c sili_dmamem_free(sc, sp->sp_scratch);
sc 500 dev/ic/sili.c sili_dmamem_free(sc, sp->sp_cmds);
sc 509 dev/ic/sili.c struct sili_softc *sc = sp->sp_sc;
sc 513 dev/ic/sili.c bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap);
sc 554 dev/ic/sili.c sili_dmamem_alloc(struct sili_softc *sc, bus_size_t size, bus_size_t align)
sc 563 dev/ic/sili.c if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 567 dev/ic/sili.c if (bus_dmamem_alloc(sc->sc_dmat, size, align, 0, &sdm->sdm_seg,
sc 571 dev/ic/sili.c if (bus_dmamem_map(sc->sc_dmat, &sdm->sdm_seg, nsegs, size,
sc 575 dev/ic/sili.c if (bus_dmamap_load(sc->sc_dmat, sdm->sdm_map, sdm->sdm_kva, size,
sc 584 dev/ic/sili.c bus_dmamem_unmap(sc->sc_dmat, sdm->sdm_kva, size);
sc 586 dev/ic/sili.c bus_dmamem_free(sc->sc_dmat, &sdm->sdm_seg, 1);
sc 588 dev/ic/sili.c bus_dmamap_destroy(sc->sc_dmat, sdm->sdm_map);
sc 596 dev/ic/sili.c sili_dmamem_free(struct sili_softc *sc, struct sili_dmamem *sdm)
sc 598 dev/ic/sili.c bus_dmamap_unload(sc->sc_dmat, sdm->sdm_map);
sc 599 dev/ic/sili.c bus_dmamem_unmap(sc->sc_dmat, sdm->sdm_kva, sdm->sdm_size);
sc 600 dev/ic/sili.c bus_dmamem_free(sc->sc_dmat, &sdm->sdm_seg, 1);
sc 601 dev/ic/sili.c bus_dmamap_destroy(sc->sc_dmat, sdm->sdm_map);
sc 606 dev/ic/sili.c sili_read(struct sili_softc *sc, bus_size_t r)
sc 610 dev/ic/sili.c bus_space_barrier(sc->sc_iot_global, sc->sc_ioh_global, r, 4,
sc 612 dev/ic/sili.c rv = bus_space_read_4(sc->sc_iot_global, sc->sc_ioh_global, r);
sc 618 dev/ic/sili.c sili_write(struct sili_softc *sc, bus_size_t r, u_int32_t v)
sc 620 dev/ic/sili.c bus_space_write_4(sc->sc_iot_global, sc->sc_ioh_global, r, v);
sc 621 dev/ic/sili.c bus_space_barrier(sc->sc_iot_global, sc->sc_ioh_global, r, 4,
sc 729 dev/ic/sili.c struct sili_softc *sc = xsc;
sc 730 dev/ic/sili.c struct sili_port *sp = &sc->sc_ports[port];
sc 780 dev/ic/sili.c sili_write(sc, SILI_REG_GC, sili_read(sc, SILI_REG_GC) | 1 << port);
sc 792 dev/ic/sili.c struct sili_softc *sc = sp->sp_sc;
sc 823 dev/ic/sili.c bus_dmamap_sync(sc->sc_dmat, SILI_DMA_MAP(sp->sp_cmds),
sc 854 dev/ic/sili.c struct sili_softc *sc = sp->sp_sc;
sc 861 dev/ic/sili.c bus_dmamap_sync(sc->sc_dmat, SILI_DMA_MAP(sp->sp_cmds),
sc 903 dev/ic/sili.c struct sili_softc *sc = sp->sp_sc;
sc 914 dev/ic/sili.c error = bus_dmamap_load(sc->sc_dmat, dmap, xa->data, xa->datalen, NULL,
sc 953 dev/ic/sili.c bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize,
sc 964 dev/ic/sili.c struct sili_softc *sc = sp->sp_sc;
sc 971 dev/ic/sili.c bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize,
sc 974 dev/ic/sili.c bus_dmamap_unload(sc->sc_dmat, dmap);
sc 1027 dev/ic/sili.c struct sili_softc *sc = sp->sp_sc;
sc 1064 dev/ic/sili.c bus_dmamap_sync(sc->sc_dmat, SILI_DMA_MAP(sp->sp_scratch), 0,
sc 1071 dev/ic/sili.c bus_dmamap_sync(sc->sc_dmat, SILI_DMA_MAP(sp->sp_scratch), 0,
sc 1103 dev/ic/sili.c struct sili_softc *sc = xsc;
sc 1104 dev/ic/sili.c struct sili_port *sp = &sc->sc_ports[port];
sc 139 dev/ic/siop.c struct siop_common_softc *sc = siop_cmd->cmd_c.siop_sc;
sc 144 dev/ic/siop.c bus_dmamap_sync(sc->sc_dmat, siop_cmd->siop_cbdp->xferdma, offset,
sc 149 dev/ic/siop.c siop_script_sync(sc, ops)
sc 150 dev/ic/siop.c struct siop_softc *sc;
sc 153 dev/ic/siop.c if ((sc->sc_c.features & SF_CHIP_RAM) == 0)
sc 154 dev/ic/siop.c bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_c.sc_scriptdma, 0,
sc 159 dev/ic/siop.c siop_script_read(sc, offset)
sc 160 dev/ic/siop.c struct siop_softc *sc;
sc 163 dev/ic/siop.c if (sc->sc_c.features & SF_CHIP_RAM) {
sc 164 dev/ic/siop.c return bus_space_read_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
sc 167 dev/ic/siop.c return siop_ctoh32(&sc->sc_c, sc->sc_c.sc_script[offset]);
sc 172 dev/ic/siop.c siop_script_write(sc, offset, val)
sc 173 dev/ic/siop.c struct siop_softc *sc;
sc 177 dev/ic/siop.c if (sc->sc_c.features & SF_CHIP_RAM) {
sc 178 dev/ic/siop.c bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
sc 181 dev/ic/siop.c sc->sc_c.sc_script[offset] = siop_htoc32(&sc->sc_c, val);
sc 186 dev/ic/siop.c siop_attach(sc)
sc 187 dev/ic/siop.c struct siop_softc *sc;
sc 191 dev/ic/siop.c if (siop_common_attach(&sc->sc_c) != 0)
sc 194 dev/ic/siop.c TAILQ_INIT(&sc->free_list);
sc 195 dev/ic/siop.c TAILQ_INIT(&sc->ready_list);
sc 196 dev/ic/siop.c TAILQ_INIT(&sc->urgent_list);
sc 197 dev/ic/siop.c TAILQ_INIT(&sc->cmds);
sc 198 dev/ic/siop.c TAILQ_INIT(&sc->lunsw_list);
sc 199 dev/ic/siop.c sc->sc_currschedslot = 0;
sc 200 dev/ic/siop.c sc->sc_c.sc_link.adapter = &siop_adapter;
sc 201 dev/ic/siop.c sc->sc_c.sc_link.device = &siop_dev;
sc 202 dev/ic/siop.c sc->sc_c.sc_link.openings = SIOP_NTAG;
sc 205 dev/ic/siop.c siop_morecbd(sc);
sc 209 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, (int)sizeof(siop_script),
sc 210 dev/ic/siop.c (u_int32_t)sc->sc_c.sc_scriptaddr, sc->sc_c.sc_script);
sc 214 dev/ic/siop.c siop_resetbus(&sc->sc_c);
sc 218 dev/ic/siop.c siop_reset(sc);
sc 220 dev/ic/siop.c siop_dump_script(sc);
sc 224 dev/ic/siop.c saa.saa_sc_link = &sc->sc_c.sc_link;
sc 226 dev/ic/siop.c config_found((struct device*)sc, &saa, scsiprint);
sc 230 dev/ic/siop.c siop_reset(sc)
sc 231 dev/ic/siop.c struct siop_softc *sc;
sc 236 dev/ic/siop.c siop_common_reset(&sc->sc_c);
sc 239 dev/ic/siop.c if (sc->sc_c.features & SF_CHIP_RAM) {
sc 240 dev/ic/siop.c bus_space_write_region_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 0,
sc 245 dev/ic/siop.c bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
sc 247 dev/ic/siop.c sc->sc_c.sc_scriptaddr + Ent_msgin_space);
sc 249 dev/ic/siop.c if (sc->sc_c.features & SF_CHIP_LED0) {
sc 250 dev/ic/siop.c bus_space_write_region_4(sc->sc_c.sc_ramt,
sc 251 dev/ic/siop.c sc->sc_c.sc_ramh,
sc 254 dev/ic/siop.c bus_space_write_region_4(sc->sc_c.sc_ramt,
sc 255 dev/ic/siop.c sc->sc_c.sc_ramh,
sc 258 dev/ic/siop.c bus_space_write_region_4(sc->sc_c.sc_ramt,
sc 259 dev/ic/siop.c sc->sc_c.sc_ramh,
sc 266 dev/ic/siop.c sc->sc_c.sc_script[j] =
sc 267 dev/ic/siop.c siop_htoc32(&sc->sc_c, siop_script[j]);
sc 272 dev/ic/siop.c sc->sc_c.sc_script[E_abs_msgin_Used[j]] =
sc 273 dev/ic/siop.c siop_htoc32(&sc->sc_c,
sc 274 dev/ic/siop.c sc->sc_c.sc_scriptaddr + Ent_msgin_space);
sc 276 dev/ic/siop.c if (sc->sc_c.features & SF_CHIP_LED0) {
sc 279 dev/ic/siop.c sc->sc_c.sc_script[
sc 281 dev/ic/siop.c ] = siop_htoc32(&sc->sc_c, siop_led_on[j]);
sc 284 dev/ic/siop.c sc->sc_c.sc_script[
sc 286 dev/ic/siop.c ] = siop_htoc32(&sc->sc_c, siop_led_on[j]);
sc 289 dev/ic/siop.c sc->sc_c.sc_script[
sc 291 dev/ic/siop.c ] = siop_htoc32(&sc->sc_c, siop_led_off[j]);
sc 294 dev/ic/siop.c sc->script_free_lo = sizeof(siop_script) / sizeof(siop_script[0]);
sc 295 dev/ic/siop.c sc->script_free_hi = sc->sc_c.ram_size / 4;
sc 296 dev/ic/siop.c sc->sc_ntargets = 0;
sc 299 dev/ic/siop.c while((lunsw = TAILQ_FIRST(&sc->lunsw_list)) != NULL) {
sc 302 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, lunsw->lunsw_off);
sc 304 dev/ic/siop.c TAILQ_REMOVE(&sc->lunsw_list, lunsw, next);
sc 307 dev/ic/siop.c TAILQ_INIT(&sc->lunsw_list);
sc 309 dev/ic/siop.c for (i = 0; i < sc->sc_c.sc_link.adapter_buswidth; i++) {
sc 311 dev/ic/siop.c if (sc->sc_c.targets[i] == NULL)
sc 315 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, i);
sc 317 dev/ic/siop.c target = (struct siop_target *)sc->sc_c.targets[i];
sc 319 dev/ic/siop.c target->lunsw = siop_get_lunsw(sc);
sc 322 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, i);
sc 325 dev/ic/siop.c siop_add_reselsw(sc, i);
sc 329 dev/ic/siop.c if ((sc->sc_c.features & SF_CHIP_RAM) == 0) {
sc 330 dev/ic/siop.c bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_c.sc_scriptdma, 0,
sc 333 dev/ic/siop.c bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP,
sc 334 dev/ic/siop.c sc->sc_c.sc_scriptaddr + Ent_reselect);
sc 341 dev/ic/siop.c sc->sc_c.sc_scriptaddr + ent); \
sc 342 dev/ic/siop.c bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, sc->sc_c.sc_scriptaddr + ent); \
sc 346 dev/ic/siop.c bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, sc->sc_c.sc_scriptaddr + ent); \
sc 354 dev/ic/siop.c struct siop_softc *sc = v;
sc 368 dev/ic/siop.c istat = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_ISTAT);
sc 374 dev/ic/siop.c bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 380 dev/ic/siop.c bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 385 dev/ic/siop.c dsa = bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA);
sc 386 dev/ic/siop.c TAILQ_FOREACH(cbdp, &sc->cmds, next) {
sc 431 dev/ic/siop.c dstat = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 436 dev/ic/siop.c siop_clearfifo(&sc->sc_c);
sc 441 dev/ic/siop.c (int)(bus_space_read_4(sc->sc_c.sc_rt,
sc 442 dev/ic/siop.c sc->sc_c.sc_rh, SIOP_DSP) -
sc 443 dev/ic/siop.c sc->sc_c.sc_scriptaddr),
sc 444 dev/ic/siop.c bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 448 dev/ic/siop.c bus_space_write_1(sc->sc_c.sc_rt,
sc 449 dev/ic/siop.c sc->sc_c.sc_rh, SIOP_DCNTL,
sc 450 dev/ic/siop.c bus_space_read_1(sc->sc_c.sc_rt,
sc 451 dev/ic/siop.c sc->sc_c.sc_rh, SIOP_DCNTL) | DCNTL_STD);
sc 457 dev/ic/siop.c printf("%s: DMA IRQ:", sc->sc_c.sc_dev.dv_xname);
sc 467 dev/ic/siop.c siop_clearfifo(&sc->sc_c);
sc 469 dev/ic/siop.c (int)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 470 dev/ic/siop.c SIOP_DSP) - sc->sc_c.sc_scriptaddr),
sc 471 dev/ic/siop.c bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA));
sc 475 dev/ic/siop.c siop_ctoh32(&sc->sc_c,
sc 489 dev/ic/siop.c sist = bus_space_read_2(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 491 dev/ic/siop.c sstat1 = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 496 dev/ic/siop.c bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA),
sc 497 dev/ic/siop.c (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 499 dev/ic/siop.c sc->sc_c.sc_scriptaddr));
sc 502 dev/ic/siop.c siop_handle_reset(sc);
sc 503 dev/ic/siop.c siop_start(sc);
sc 511 dev/ic/siop.c printf("%s:", sc->sc_c.sc_dev.dv_xname);
sc 519 dev/ic/siop.c dstat = bus_space_read_1(sc->sc_c.sc_rt,
sc 520 dev/ic/siop.c sc->sc_c.sc_rh, SIOP_DSTAT);
sc 525 dev/ic/siop.c bus_space_write_4(sc->sc_c.sc_rt,
sc 526 dev/ic/siop.c sc->sc_c.sc_rh,
sc 528 dev/ic/siop.c scratcha0 = bus_space_read_1(sc->sc_c.sc_rt,
sc 529 dev/ic/siop.c sc->sc_c.sc_rh, SIOP_SCRATCHA);
sc 543 dev/ic/siop.c siop_clearfifo(&sc->sc_c);
sc 556 dev/ic/siop.c siop_clearfifo(&sc->sc_c);
sc 557 dev/ic/siop.c bus_space_write_1(sc->sc_c.sc_rt,
sc 558 dev/ic/siop.c sc->sc_c.sc_rh, SIOP_SCRATCHA,
sc 564 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname,
sc 568 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname);
sc 577 dev/ic/siop.c printf("%s:", sc->sc_c.sc_dev.dv_xname);
sc 590 dev/ic/siop.c "command\n", sc->sc_c.sc_dev.dv_xname);
sc 601 dev/ic/siop.c siop_htoc32(&sc->sc_c, SCSI_CHECK);
sc 605 dev/ic/siop.c "command\n", sc->sc_c.sc_dev.dv_xname);
sc 610 dev/ic/siop.c if (siop_modechange(&sc->sc_c) == 0 || need_reset == 1)
sc 623 dev/ic/siop.c bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 625 dev/ic/siop.c bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 631 dev/ic/siop.c "DSA=0x%x DSP=0x%x\n", sc->sc_c.sc_dev.dv_xname,
sc 633 dev/ic/siop.c bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA),
sc 634 dev/ic/siop.c (int)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 635 dev/ic/siop.c SIOP_DSP) - sc->sc_c.sc_scriptaddr));
sc 646 dev/ic/siop.c siop_resetbus(&sc->sc_c);
sc 653 dev/ic/siop.c irqcode = bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 666 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, irqcode);
sc 673 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname,
sc 681 dev/ic/siop.c (int)(bus_space_read_4(sc->sc_c.sc_rt,
sc 682 dev/ic/siop.c sc->sc_c.sc_rh, SIOP_DSP) - sc->sc_c.sc_scriptaddr));
sc 691 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname);
sc 695 dev/ic/siop.c target = bus_space_read_1(sc->sc_c.sc_rt,
sc 696 dev/ic/siop.c sc->sc_c.sc_rh, SIOP_SCRATCHA) & 0xf;
sc 697 dev/ic/siop.c lun = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 699 dev/ic/siop.c tag = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 702 dev/ic/siop.c (struct siop_target *)sc->sc_c.targets[target];
sc 705 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, target);
sc 711 dev/ic/siop.c "lun %d\n", sc->sc_c.sc_dev.dv_xname,
sc 718 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname,
sc 723 dev/ic/siop.c bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 731 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname);
sc 735 dev/ic/siop.c int msgin = bus_space_read_1(sc->sc_c.sc_rt,
sc 736 dev/ic/siop.c sc->sc_c.sc_rh, SIOP_SFBR);
sc 760 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname);
sc 772 dev/ic/siop.c siop_update_xfer_mode(&sc->sc_c,
sc 781 dev/ic/siop.c sc->sc_c.st_minsync,
sc 782 dev/ic/siop.c sc->sc_c.maxoff);
sc 794 dev/ic/siop.c siop_update_xfer_mode(&sc->sc_c,
sc 821 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname);
sc 836 dev/ic/siop.c siop_htoc32(&sc->sc_c, 1);
sc 845 dev/ic/siop.c printf("%s: ", sc->sc_c.sc_dev.dv_xname);
sc 850 dev/ic/siop.c siop_htoc32(&sc->sc_c, 1);
sc 865 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname,
sc 868 dev/ic/siop.c siop_htoc32(&sc->sc_c,
sc 913 dev/ic/siop.c siop_update_scntl3(sc,
sc 921 dev/ic/siop.c siop_update_scntl3(sc,
sc 934 dev/ic/siop.c siop_update_scntl3(sc,
sc 942 dev/ic/siop.c siop_update_scntl3(sc,
sc 955 dev/ic/siop.c siop_update_scntl3(sc,
sc 963 dev/ic/siop.c siop_update_scntl3(sc,
sc 976 dev/ic/siop.c siop_htoc32(&sc->sc_c, 1);
sc 983 dev/ic/siop.c offset = bus_space_read_1(sc->sc_c.sc_rt,
sc 984 dev/ic/siop.c sc->sc_c.sc_rh, SIOP_SCRATCHA + 1);
sc 997 dev/ic/siop.c offset = bus_space_read_1(sc->sc_c.sc_rt,
sc 998 dev/ic/siop.c sc->sc_c.sc_rh, SIOP_SCRATCHA + 1);
sc 1008 dev/ic/siop.c siop_start(sc);
sc 1014 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname,
sc 1017 dev/ic/siop.c siop_start(sc);
sc 1024 dev/ic/siop.c siop_ctoh32(&sc->sc_c, siop_cmd->cmd_tables->id),
sc 1026 dev/ic/siop.c siop_ctoh32(&sc->sc_c,
sc 1031 dev/ic/siop.c offset = bus_space_read_1(sc->sc_c.sc_rt,
sc 1032 dev/ic/siop.c sc->sc_c.sc_rh, SIOP_SCRATCHA + 1);
sc 1063 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname,
sc 1073 dev/ic/siop.c xs->status = siop_ctoh32(&sc->sc_c, siop_cmd->cmd_tables->status);
sc 1081 dev/ic/siop.c siop_del_dev(sc, target, lun);
sc 1082 dev/ic/siop.c siop_start(sc);
sc 1093 dev/ic/siop.c struct siop_softc *sc = (struct siop_softc *)siop_cmd->cmd_c.siop_sc;
sc 1095 dev/ic/siop.c ((struct siop_target*)sc->sc_c.targets[xs->sc_link->target])->siop_lun[xs->sc_link->lun];
sc 1115 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname);
sc 1132 dev/ic/siop.c printf("%s:%d:%d: queue full (tag %d)\n", sc->sc_c.sc_dev.dv_xname,
sc 1140 dev/ic/siop.c TAILQ_INSERT_TAIL(&sc->urgent_list, siop_cmd, next);
sc 1159 dev/ic/siop.c bus_dmamap_sync(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_data, 0,
sc 1163 dev/ic/siop.c bus_dmamap_unload(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_data);
sc 1171 dev/ic/siop.c siop_htoc32(&sc->sc_c, sizeof(struct scsi_sense));
sc 1178 dev/ic/siop.c error = bus_dmamap_load(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_data,
sc 1184 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, error);
sc 1188 dev/ic/siop.c bus_dmamap_sync(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_data,
sc 1195 dev/ic/siop.c TAILQ_INSERT_HEAD(&sc->urgent_list, siop_cmd, next);
sc 1198 dev/ic/siop.c bus_dmamap_sync(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_data,
sc 1201 dev/ic/siop.c bus_dmamap_unload(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_data);
sc 1207 dev/ic/siop.c TAILQ_INSERT_TAIL(&sc->free_list, siop_cmd, next);
sc 1223 dev/ic/siop.c struct siop_softc *sc = (struct siop_softc *)siop_cmd->cmd_c.siop_sc;
sc 1228 dev/ic/siop.c ((struct siop_target*)sc->sc_c.targets[target])->siop_lun[lun];
sc 1232 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, target, lun, tag, siop_cmd->cmd_c.tag,
sc 1238 dev/ic/siop.c "lun %d (status %d)\n", sc->sc_c.sc_dev.dv_xname,
sc 1249 dev/ic/siop.c siop_script_write(sc,
sc 1265 dev/ic/siop.c siop_handle_reset(sc)
sc 1266 dev/ic/siop.c struct siop_softc *sc;
sc 1276 dev/ic/siop.c printf("%s: scsi bus reset\n", sc->sc_c.sc_dev.dv_xname);
sc 1278 dev/ic/siop.c siop_reset(sc);
sc 1283 dev/ic/siop.c for (target = 0; target < sc->sc_c.sc_link.adapter_buswidth;
sc 1285 dev/ic/siop.c if (sc->sc_c.targets[target] == NULL)
sc 1289 dev/ic/siop.c (struct siop_target *)sc->sc_c.targets[target];
sc 1295 dev/ic/siop.c ((sc->sc_c.targets[target]->flags & TARF_TAG) ?
sc 1308 dev/ic/siop.c if (sc->sc_c.targets[target]->status != TARST_PROBING) {
sc 1309 dev/ic/siop.c sc->sc_c.targets[target]->status = TARST_ASYNC;
sc 1310 dev/ic/siop.c sc->sc_c.targets[target]->flags &= ~TARF_ISWIDE;
sc 1311 dev/ic/siop.c sc->sc_c.targets[target]->period =
sc 1312 dev/ic/siop.c sc->sc_c.targets[target]->offset = 0;
sc 1313 dev/ic/siop.c siop_update_xfer_mode(&sc->sc_c, target);
sc 1317 dev/ic/siop.c for (siop_cmd = TAILQ_FIRST(&sc->urgent_list); siop_cmd != NULL;
sc 1320 dev/ic/siop.c TAILQ_REMOVE(&sc->urgent_list, siop_cmd, next);
sc 1327 dev/ic/siop.c for (siop_cmd = TAILQ_FIRST(&sc->ready_list); siop_cmd != NULL;
sc 1330 dev/ic/siop.c TAILQ_REMOVE(&sc->ready_list, siop_cmd, next);
sc 1364 dev/ic/siop.c struct siop_softc *sc = (struct siop_softc *)xs->sc_link->adapter_softc;
sc 1375 dev/ic/siop.c siop_cmd = TAILQ_FIRST(&sc->free_list);
sc 1380 dev/ic/siop.c TAILQ_REMOVE(&sc->free_list, siop_cmd, next);
sc 1389 dev/ic/siop.c siop_target = (struct siop_target*)sc->sc_c.targets[target];
sc 1393 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, target);
sc 1395 dev/ic/siop.c sc->sc_c.targets[target] =
sc 1398 dev/ic/siop.c if (sc->sc_c.targets[target] == NULL) {
sc 1400 dev/ic/siop.c "target %d\n", sc->sc_c.sc_dev.dv_xname,
sc 1405 dev/ic/siop.c bzero(sc->sc_c.targets[target], sizeof(struct siop_target));
sc 1407 dev/ic/siop.c (struct siop_target*)sc->sc_c.targets[target];
sc 1411 dev/ic/siop.c sc->sc_c.clock_div << 24; /* scntl3 */
sc 1416 dev/ic/siop.c siop_target->lunsw = siop_get_lunsw(sc);
sc 1419 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, target);
sc 1425 dev/ic/siop.c siop_add_reselsw(sc, target);
sc 1434 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, target, lun);
sc 1440 dev/ic/siop.c siop_cmd->cmd_c.siop_target = sc->sc_c.targets[target];
sc 1449 dev/ic/siop.c siop_htoc32(&sc->sc_c, xs->cmdlen);
sc 1453 dev/ic/siop.c error = bus_dmamap_load(sc->sc_c.sc_dmat,
sc 1460 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, error);
sc 1464 dev/ic/siop.c bus_dmamap_sync(sc->sc_c.sc_dmat,
sc 1476 dev/ic/siop.c TAILQ_INSERT_TAIL(&sc->ready_list, siop_cmd, next);
sc 1483 dev/ic/siop.c siop_start(sc);
sc 1491 dev/ic/siop.c siop_intr(sc);
sc 1508 dev/ic/siop.c siop_morecbd(sc);
sc 1514 dev/ic/siop.c if ((lun == 0) && (sc->sc_c.features & SF_BUS_ULTRA3))
sc 1515 dev/ic/siop.c sc->sc_c.targets[target]->flags |= TARF_DT;
sc 1522 dev/ic/siop.c siop_add_dev(sc, target, lun);
sc 1529 dev/ic/siop.c siop_intr(sc);
sc 1537 dev/ic/siop.c siop_start(sc)
sc 1538 dev/ic/siop.c struct siop_softc *sc;
sc 1552 dev/ic/siop.c siop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
sc 1565 dev/ic/siop.c slot = sc->sc_currschedslot;
sc 1572 dev/ic/siop.c if (siop_script_read(sc, (Ent_script_sched_slot0 / 4) + slot * 2) ==
sc 1574 dev/ic/siop.c slot = sc->sc_currschedslot = 1;
sc 1579 dev/ic/siop.c siop_cmd = TAILQ_FIRST(&sc->urgent_list);
sc 1591 dev/ic/siop.c ((struct siop_target*)sc->sc_c.targets[target])->siop_lun[lun];
sc 1623 dev/ic/siop.c if (siop_script_read(sc,
sc 1634 dev/ic/siop.c if (siop_script_read(sc, Ent_script_sched_slot0 / 4)
sc 1646 dev/ic/siop.c int msgcount = siop_ctoh32(&sc->sc_c,
sc 1650 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, target, lun, tag,
sc 1662 dev/ic/siop.c siop_htoc32(&sc->sc_c, 3);
sc 1674 dev/ic/siop.c TAILQ_REMOVE(&sc->ready_list, siop_cmd, next);
sc 1676 dev/ic/siop.c TAILQ_REMOVE(&sc->urgent_list, siop_cmd, next);
sc 1682 dev/ic/siop.c siop_script_write(sc,
sc 1689 dev/ic/siop.c siop_htoc32(&sc->sc_c, sc->sc_c.sc_scriptaddr +
sc 1693 dev/ic/siop.c siop_script_write(sc,
sc 1710 dev/ic/siop.c siop_script_write(sc, (Ent_script_sched_slot0 / 4) + slot * 2,
sc 1715 dev/ic/siop.c sc->sc_currschedslot = slot;
sc 1721 dev/ic/siop.c siop_cmd = TAILQ_FIRST(&sc->ready_list);
sc 1730 dev/ic/siop.c siop_script_sync(sc,BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
sc 1732 dev/ic/siop.c bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
sc 1743 dev/ic/siop.c struct siop_softc *sc = (struct siop_softc *)siop_cmd->cmd_c.siop_sc;
sc 1755 dev/ic/siop.c siop_resetbus(&sc->sc_c);
sc 1757 dev/ic/siop.c siop_handle_reset(sc);
sc 1765 dev/ic/siop.c siop_dump_script(sc)
sc 1766 dev/ic/siop.c struct siop_softc *sc;
sc 1771 dev/ic/siop.c siop_ctoh32(&sc->sc_c, sc->sc_c.sc_script[i]),
sc 1772 dev/ic/siop.c siop_ctoh32(&sc->sc_c, sc->sc_c.sc_script[i+1]));
sc 1773 dev/ic/siop.c if ((siop_ctoh32(&sc->sc_c,
sc 1774 dev/ic/siop.c sc->sc_c.sc_script[i]) & 0xe0000000) == 0xc0000000) {
sc 1776 dev/ic/siop.c printf(" 0x%08x", siop_ctoh32(&sc->sc_c,
sc 1777 dev/ic/siop.c sc->sc_c.sc_script[i+1]));
sc 1785 dev/ic/siop.c siop_morecbd(sc)
sc 1786 dev/ic/siop.c struct siop_softc *sc;
sc 1800 dev/ic/siop.c "head\n", sc->sc_c.sc_dev.dv_xname);
sc 1810 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname);
sc 1814 dev/ic/siop.c error = bus_dmamem_alloc(sc->sc_c.sc_dmat, PAGE_SIZE, PAGE_SIZE, 0, &seg,
sc 1818 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, error);
sc 1821 dev/ic/siop.c error = bus_dmamem_map(sc->sc_c.sc_dmat, &seg, rseg, PAGE_SIZE,
sc 1825 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, error);
sc 1828 dev/ic/siop.c error = bus_dmamap_create(sc->sc_c.sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0,
sc 1832 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, error);
sc 1835 dev/ic/siop.c error = bus_dmamap_load(sc->sc_c.sc_dmat, newcbd->xferdma, newcbd->xfers,
sc 1839 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, error);
sc 1843 dev/ic/siop.c printf("%s: alloc newcdb at PHY addr 0x%lx\n", sc->sc_c.sc_dev.dv_xname,
sc 1847 dev/ic/siop.c error = bus_dmamap_create(sc->sc_c.sc_dmat, MAXPHYS, SIOP_NSG,
sc 1853 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, error);
sc 1859 dev/ic/siop.c off = (sc->sc_c.features & SF_CHIP_BE) ? 3 : 0;
sc 1861 dev/ic/siop.c newcbd->cmds[i].cmd_c.siop_sc = &sc->sc_c;
sc 1870 dev/ic/siop.c xfer->siop_tables.t_msgout.count= siop_htoc32(&sc->sc_c, 1);
sc 1871 dev/ic/siop.c xfer->siop_tables.t_msgout.addr = siop_htoc32(&sc->sc_c, dsa);
sc 1872 dev/ic/siop.c xfer->siop_tables.t_msgin.count= siop_htoc32(&sc->sc_c, 1);
sc 1873 dev/ic/siop.c xfer->siop_tables.t_msgin.addr = siop_htoc32(&sc->sc_c,
sc 1875 dev/ic/siop.c xfer->siop_tables.t_extmsgin.count= siop_htoc32(&sc->sc_c, 2);
sc 1876 dev/ic/siop.c xfer->siop_tables.t_extmsgin.addr = siop_htoc32(&sc->sc_c,
sc 1878 dev/ic/siop.c xfer->siop_tables.t_extmsgdata.addr = siop_htoc32(&sc->sc_c,
sc 1880 dev/ic/siop.c xfer->siop_tables.t_status.count= siop_htoc32(&sc->sc_c, 1);
sc 1881 dev/ic/siop.c xfer->siop_tables.t_status.addr = siop_htoc32(&sc->sc_c,
sc 1883 dev/ic/siop.c xfer->siop_tables.cmd.count = siop_htoc32(&sc->sc_c, 0);
sc 1884 dev/ic/siop.c xfer->siop_tables.cmd.addr = siop_htoc32(&sc->sc_c,
sc 1889 dev/ic/siop.c scr[j] = siop_htoc32(&sc->sc_c, load_dsa[j]);
sc 1894 dev/ic/siop.c scr[Ent_rdsa0 / 4] = siop_htoc32(&sc->sc_c,
sc 1896 dev/ic/siop.c scr[Ent_rdsa1 / 4] = siop_htoc32(&sc->sc_c,
sc 1898 dev/ic/siop.c scr[Ent_rdsa2 / 4] = siop_htoc32(&sc->sc_c,
sc 1900 dev/ic/siop.c scr[Ent_rdsa3 / 4] = siop_htoc32(&sc->sc_c,
sc 1902 dev/ic/siop.c scr[E_ldsa_abs_reselected_Used[0]] = siop_htoc32(&sc->sc_c,
sc 1903 dev/ic/siop.c sc->sc_c.sc_scriptaddr + Ent_reselected);
sc 1904 dev/ic/siop.c scr[E_ldsa_abs_reselect_Used[0]] = siop_htoc32(&sc->sc_c,
sc 1905 dev/ic/siop.c sc->sc_c.sc_scriptaddr + Ent_reselect);
sc 1906 dev/ic/siop.c scr[E_ldsa_abs_selected_Used[0]] = siop_htoc32(&sc->sc_c,
sc 1907 dev/ic/siop.c sc->sc_c.sc_scriptaddr + Ent_selected);
sc 1908 dev/ic/siop.c scr[E_ldsa_abs_data_Used[0]] = siop_htoc32(&sc->sc_c,
sc 1911 dev/ic/siop.c scr[Ent_ldsa_data / 4] = siop_htoc32(&sc->sc_c, 0x80000000);
sc 1913 dev/ic/siop.c TAILQ_INSERT_TAIL(&sc->free_list, &newcbd->cmds[i], next);
sc 1918 dev/ic/siop.c siop_ctoh32(&sc->sc_c,
sc 1920 dev/ic/siop.c siop_ctoh32(&sc->sc_c,
sc 1922 dev/ic/siop.c siop_ctoh32(&sc->sc_c,
sc 1927 dev/ic/siop.c TAILQ_INSERT_TAIL(&sc->cmds, newcbd, next);
sc 1931 dev/ic/siop.c bus_dmamap_unload(sc->sc_c.sc_dmat, newcbd->xferdma);
sc 1932 dev/ic/siop.c bus_dmamap_destroy(sc->sc_c.sc_dmat, newcbd->xferdma);
sc 1934 dev/ic/siop.c bus_dmamem_free(sc->sc_c.sc_dmat, &seg, rseg);
sc 1943 dev/ic/siop.c siop_get_lunsw(sc)
sc 1944 dev/ic/siop.c struct siop_softc *sc;
sc 1949 dev/ic/siop.c if (sc->script_free_lo + (sizeof(lun_switch) / sizeof(lun_switch[0])) >=
sc 1950 dev/ic/siop.c sc->script_free_hi)
sc 1952 dev/ic/siop.c lunsw = TAILQ_FIRST(&sc->lunsw_list);
sc 1958 dev/ic/siop.c TAILQ_REMOVE(&sc->lunsw_list, lunsw, next);
sc 1966 dev/ic/siop.c printf("allocating lunsw at offset %d\n", sc->script_free_lo);
sc 1968 dev/ic/siop.c if (sc->sc_c.features & SF_CHIP_RAM) {
sc 1969 dev/ic/siop.c bus_space_write_region_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
sc 1970 dev/ic/siop.c sc->script_free_lo * 4, lun_switch,
sc 1972 dev/ic/siop.c bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
sc 1973 dev/ic/siop.c (sc->script_free_lo + E_abs_lunsw_return_Used[0]) * 4,
sc 1974 dev/ic/siop.c sc->sc_c.sc_scriptaddr + Ent_lunsw_return);
sc 1978 dev/ic/siop.c sc->sc_c.sc_script[sc->script_free_lo + i] =
sc 1979 dev/ic/siop.c siop_htoc32(&sc->sc_c, lun_switch[i]);
sc 1980 dev/ic/siop.c sc->sc_c.sc_script[
sc 1981 dev/ic/siop.c sc->script_free_lo + E_abs_lunsw_return_Used[0]] =
sc 1982 dev/ic/siop.c siop_htoc32(&sc->sc_c,
sc 1983 dev/ic/siop.c sc->sc_c.sc_scriptaddr + Ent_lunsw_return);
sc 1985 dev/ic/siop.c lunsw->lunsw_off = sc->script_free_lo;
sc 1987 dev/ic/siop.c sc->script_free_lo += lunsw->lunsw_size;
sc 1988 dev/ic/siop.c siop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
sc 1993 dev/ic/siop.c siop_add_reselsw(sc, target)
sc 1994 dev/ic/siop.c struct siop_softc *sc;
sc 2001 dev/ic/siop.c siop_target = (struct siop_target *)sc->sc_c.targets[target];
sc 2005 dev/ic/siop.c siop_script_sync(sc, BUS_DMASYNC_POSTWRITE);
sc 2008 dev/ic/siop.c if ((siop_script_read(sc, siop_target->reseloff) & 0xff)
sc 2015 dev/ic/siop.c siop_script_write(sc, siop_target->reseloff,
sc 2017 dev/ic/siop.c siop_script_write(sc, siop_target->reseloff + 1,
sc 2018 dev/ic/siop.c sc->sc_c.sc_scriptaddr +
sc 2027 dev/ic/siop.c sc->sc_ntargets++;
sc 2036 dev/ic/siop.c siop_add_dev(sc, target, i);
sc 2039 dev/ic/siop.c siop_update_scntl3(sc, sc->sc_c.targets[target]);
sc 2040 dev/ic/siop.c siop_script_sync(sc, BUS_DMASYNC_PREWRITE);
sc 2044 dev/ic/siop.c siop_update_scntl3(sc, _siop_target)
sc 2045 dev/ic/siop.c struct siop_softc *sc;
sc 2050 dev/ic/siop.c siop_script_write(sc,
sc 2054 dev/ic/siop.c siop_script_write(sc,
sc 2057 dev/ic/siop.c siop_script_sync(sc, BUS_DMASYNC_PREWRITE);
sc 2061 dev/ic/siop.c siop_add_dev(sc, target, lun)
sc 2062 dev/ic/siop.c struct siop_softc *sc;
sc 2068 dev/ic/siop.c (struct siop_target *)sc->sc_c.targets[target];
sc 2075 dev/ic/siop.c if ((lunsw->lunsw_off + lunsw->lunsw_size) < sc->script_free_lo) {
sc 2082 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, target, lun);
sc 2087 dev/ic/siop.c ntargets = (sc->sc_c.sc_link.adapter_buswidth - 1) - 1 - sc->sc_ntargets;
sc 2095 dev/ic/siop.c if (sc->script_free_lo + 2 +
sc 2098 dev/ic/siop.c sc->script_free_hi - (sizeof(tag_switch) / sizeof(tag_switch[0])) :
sc 2099 dev/ic/siop.c sc->script_free_hi)) {
sc 2106 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, target, lun);
sc 2112 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, target, lun);
sc 2115 dev/ic/siop.c siop_script_write(sc, sc->script_free_lo, 0x98080000);
sc 2116 dev/ic/siop.c siop_script_write(sc, sc->script_free_lo + 1, A_int_resellun);
sc 2118 dev/ic/siop.c siop_script_write(sc, sc->script_free_lo - 2,
sc 2120 dev/ic/siop.c siop_script_write(sc, sc->script_free_lo - 1, 0);
sc 2121 dev/ic/siop.c siop_lun->reseloff = sc->script_free_lo - 2;
sc 2123 dev/ic/siop.c sc->script_free_lo += 2;
sc 2126 dev/ic/siop.c sc->script_free_hi -=
sc 2128 dev/ic/siop.c if (sc->sc_c.features & SF_CHIP_RAM) {
sc 2129 dev/ic/siop.c bus_space_write_region_4(sc->sc_c.sc_ramt,
sc 2130 dev/ic/siop.c sc->sc_c.sc_ramh,
sc 2131 dev/ic/siop.c sc->script_free_hi * 4, tag_switch,
sc 2137 dev/ic/siop.c sc->sc_c.sc_script[sc->script_free_hi + i] =
sc 2138 dev/ic/siop.c siop_htoc32(&sc->sc_c, tag_switch[i]);
sc 2141 dev/ic/siop.c siop_script_write(sc,
sc 2143 dev/ic/siop.c sc->sc_c.sc_scriptaddr + sc->script_free_hi * 4 +
sc 2148 dev/ic/siop.c sc->script_free_hi + (Ent_resel_tag0 / 4) + i * 2;
sc 2155 dev/ic/siop.c siop_script_sync(sc, BUS_DMASYNC_PREWRITE);
sc 2159 dev/ic/siop.c siop_del_dev(sc, target, lun)
sc 2160 dev/ic/siop.c struct siop_softc *sc;
sc 2168 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, target, lun);
sc 2170 dev/ic/siop.c if (sc->sc_c.targets[target] == NULL)
sc 2172 dev/ic/siop.c siop_target = (struct siop_target *)sc->sc_c.targets[target];
sc 2183 dev/ic/siop.c sc->sc_c.sc_dev.dv_xname, target, lun,
sc 2190 dev/ic/siop.c siop_script_write(sc, siop_target->reseloff, 0x800c00ff);
sc 2191 dev/ic/siop.c siop_script_sync(sc, BUS_DMASYNC_PREWRITE);
sc 2192 dev/ic/siop.c TAILQ_INSERT_TAIL(&sc->lunsw_list, siop_target->lunsw, next);
sc 2193 dev/ic/siop.c free(sc->sc_c.targets[target], M_DEVBUF);
sc 2194 dev/ic/siop.c sc->sc_c.targets[target] = NULL;
sc 2195 dev/ic/siop.c sc->sc_ntargets--;
sc 61 dev/ic/siop_common.c siop_common_attach(sc)
sc 62 dev/ic/siop_common.c struct siop_common_softc *sc;
sc 71 dev/ic/siop_common.c if ((sc->features & SF_CHIP_RAM) == 0) {
sc 72 dev/ic/siop_common.c error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE,
sc 76 dev/ic/siop_common.c "error = %d\n", sc->sc_dev.dv_xname, error);
sc 79 dev/ic/siop_common.c error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, PAGE_SIZE,
sc 80 dev/ic/siop_common.c (caddr_t *)&sc->sc_script,
sc 84 dev/ic/siop_common.c "error = %d\n", sc->sc_dev.dv_xname, error);
sc 87 dev/ic/siop_common.c error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1,
sc 88 dev/ic/siop_common.c PAGE_SIZE, 0, BUS_DMA_NOWAIT, &sc->sc_scriptdma);
sc 91 dev/ic/siop_common.c "error = %d\n", sc->sc_dev.dv_xname, error);
sc 94 dev/ic/siop_common.c error = bus_dmamap_load(sc->sc_dmat, sc->sc_scriptdma,
sc 95 dev/ic/siop_common.c sc->sc_script, PAGE_SIZE, NULL, BUS_DMA_NOWAIT);
sc 98 dev/ic/siop_common.c "error = %d\n", sc->sc_dev.dv_xname, error);
sc 101 dev/ic/siop_common.c sc->sc_scriptaddr =
sc 102 dev/ic/siop_common.c sc->sc_scriptdma->dm_segs[0].ds_addr;
sc 103 dev/ic/siop_common.c sc->ram_size = PAGE_SIZE;
sc 111 dev/ic/siop_common.c sc->sc_link.adapter_softc = sc;
sc 112 dev/ic/siop_common.c sc->sc_link.adapter_buswidth =
sc 113 dev/ic/siop_common.c (sc->features & SF_BUS_WIDE) ? 16 : 8;
sc 114 dev/ic/siop_common.c sc->sc_link.adapter_target =
sc 115 dev/ic/siop_common.c bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCID);
sc 116 dev/ic/siop_common.c if (sc->sc_link.adapter_target == 0 ||
sc 117 dev/ic/siop_common.c sc->sc_link.adapter_target >=
sc 118 dev/ic/siop_common.c sc->sc_link.adapter_buswidth)
sc 119 dev/ic/siop_common.c sc->sc_link.adapter_target = SIOP_DEFAULT_TARGET;
sc 122 dev/ic/siop_common.c sc->targets[i] = NULL;
sc 125 dev/ic/siop_common.c sc->st_maxsync = 0;
sc 126 dev/ic/siop_common.c sc->dt_maxsync = 0;
sc 127 dev/ic/siop_common.c sc->st_minsync = 255;
sc 128 dev/ic/siop_common.c sc->dt_minsync = 255;
sc 130 dev/ic/siop_common.c if (sc->clock_period != scf_period[i].clock)
sc 132 dev/ic/siop_common.c if (sc->st_maxsync < scf_period[i].period)
sc 133 dev/ic/siop_common.c sc->st_maxsync = scf_period[i].period;
sc 134 dev/ic/siop_common.c if (sc->st_minsync > scf_period[i].period)
sc 135 dev/ic/siop_common.c sc->st_minsync = scf_period[i].period;
sc 137 dev/ic/siop_common.c if (sc->st_maxsync == 255 || sc->st_minsync == 0)
sc 140 dev/ic/siop_common.c if (sc->clock_period != dt_scf_period[i].clock)
sc 142 dev/ic/siop_common.c if (sc->dt_maxsync < dt_scf_period[i].period)
sc 143 dev/ic/siop_common.c sc->dt_maxsync = dt_scf_period[i].period;
sc 144 dev/ic/siop_common.c if (sc->dt_minsync > dt_scf_period[i].period)
sc 145 dev/ic/siop_common.c sc->dt_minsync = dt_scf_period[i].period;
sc 147 dev/ic/siop_common.c if (sc->dt_maxsync == 255 || sc->dt_minsync == 0)
sc 153 dev/ic/siop_common.c siop_common_reset(sc)
sc 154 dev/ic/siop_common.c struct siop_common_softc *sc;
sc 159 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_SRST);
sc 161 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, 0);
sc 164 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL0,
sc 166 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, 0);
sc 167 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3, sc->clock_div);
sc 168 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER, 0);
sc 169 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DIEN, 0xff);
sc 170 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SIEN0,
sc 172 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SIEN1,
sc 174 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2, 0);
sc 175 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3, STEST3_TE);
sc 176 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STIME0,
sc 178 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCID,
sc 179 dev/ic/siop_common.c sc->sc_link.adapter_target | SCID_RRE);
sc 180 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_RESPID0,
sc 181 dev/ic/siop_common.c 1 << sc->sc_link.adapter_target);
sc 182 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL,
sc 183 dev/ic/siop_common.c (sc->features & SF_CHIP_PF) ? DCNTL_COM | DCNTL_PFEN : DCNTL_COM);
sc 184 dev/ic/siop_common.c if (sc->features & SF_CHIP_AAIP)
sc 185 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh,
sc 189 dev/ic/siop_common.c if (sc->features & (SF_CHIP_DBLR | SF_CHIP_QUAD)) {
sc 190 dev/ic/siop_common.c stest3 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3);
sc 191 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1,
sc 193 dev/ic/siop_common.c if (sc->features & SF_CHIP_QUAD) {
sc 195 dev/ic/siop_common.c while ((bus_space_read_1(sc->sc_rt, sc->sc_rh,
sc 203 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3,
sc 205 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1,
sc 207 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3, stest3);
sc 209 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1, 0);
sc 211 dev/ic/siop_common.c if (sc->features & SF_CHIP_FIFO)
sc 212 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5,
sc 213 dev/ic/siop_common.c bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5) |
sc 215 dev/ic/siop_common.c if (sc->features & SF_CHIP_LED0) {
sc 217 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_GPCNTL,
sc 218 dev/ic/siop_common.c bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_GPCNTL) & 0xfe);
sc 220 dev/ic/siop_common.c if (sc->features & SF_BUS_ULTRA3) {
sc 222 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL4, 0);
sc 224 dev/ic/siop_common.c sc->mode = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST4) &
sc 231 dev/ic/siop_common.c if (sc->features & SF_CHIP_RAM)
sc 232 dev/ic/siop_common.c bus_space_set_region_4(sc->sc_ramt, sc->sc_ramh,
sc 233 dev/ic/siop_common.c 0, 0, sc->ram_size / 4);
sc 234 dev/ic/siop_common.c sc->sc_reset(sc);
sc 243 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc;
sc 248 dev/ic/siop_common.c int *targ_flags = &sc->targets[target]->flags;
sc 251 dev/ic/siop_common.c siop_cmd->siop_tables->id = siop_htoc32(sc, sc->targets[target]->id);
sc 257 dev/ic/siop_common.c else if ((sc->features & SF_CHIP_GEBUG) &&
sc 258 dev/ic/siop_common.c (sc->targets[target]->flags & TARF_ISWIDE) == 0)
sc 270 dev/ic/siop_common.c siop_cmd->siop_tables->t_msgout.count = siop_htoc32(sc, msgoffset);
sc 271 dev/ic/siop_common.c if (sc->targets[target]->status == TARST_ASYNC) {
sc 278 dev/ic/siop_common.c (sc->features & SF_BUS_WIDE))
sc 283 dev/ic/siop_common.c if ((sc->features & SF_CHIP_GEBUG) &&
sc 292 dev/ic/siop_common.c siop_add_dev((struct siop_softc *)sc, target, lun);
sc 295 dev/ic/siop_common.c (sc->mode == STEST4_MODE_LVD)) {
sc 296 dev/ic/siop_common.c sc->targets[target]->status = TARST_PPR_NEG;
sc 297 dev/ic/siop_common.c siop_ppr_msg(siop_cmd, msgoffset, sc->dt_minsync,
sc 298 dev/ic/siop_common.c sc->maxoff);
sc 300 dev/ic/siop_common.c sc->targets[target]->status = TARST_WIDE_NEG;
sc 304 dev/ic/siop_common.c sc->targets[target]->status = TARST_SYNC_NEG;
sc 305 dev/ic/siop_common.c siop_sdtr_msg(siop_cmd, msgoffset, sc->st_minsync,
sc 306 dev/ic/siop_common.c (sc->maxoff > 31) ? 31 : sc->maxoff);
sc 308 dev/ic/siop_common.c sc->targets[target]->status = TARST_OK;
sc 309 dev/ic/siop_common.c siop_update_xfer_mode(sc, target);
sc 311 dev/ic/siop_common.c } else if (sc->targets[target]->status == TARST_OK &&
sc 317 dev/ic/siop_common.c siop_htoc32(sc, SCSI_SIOP_NOSTATUS); /* set invalid status */
sc 325 dev/ic/siop_common.c siop_htoc32(sc,
sc 328 dev/ic/siop_common.c siop_htoc32(sc,
sc 338 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc;
sc 348 dev/ic/siop_common.c sc->targets[target]->id &= ~(SCNTL3_EWS << 24);
sc 353 dev/ic/siop_common.c sc->targets[target]->id |= (SCNTL3_EWS << 24);
sc 365 dev/ic/siop_common.c siop_update_xfer_mode(sc, target);
sc 367 dev/ic/siop_common.c "target %d (%d)\n", sc->sc_dev.dv_xname, target,
sc 369 dev/ic/siop_common.c tables->t_msgout.count = siop_htoc32(sc, 1);
sc 373 dev/ic/siop_common.c tables->id = siop_htoc32(sc, sc->targets[target]->id);
sc 374 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh,
sc 376 dev/ic/siop_common.c (sc->targets[target]->id >> 24) & 0xff);
sc 380 dev/ic/siop_common.c siop_sdtr_msg(siop_cmd, 0, sc->st_minsync,
sc 381 dev/ic/siop_common.c (sc->maxoff > 31) ? 31 : sc->maxoff);
sc 385 dev/ic/siop_common.c siop_update_xfer_mode(sc, target);
sc 393 dev/ic/siop_common.c sc->targets[target]->id |= SCNTL3_EWS << 24;
sc 396 dev/ic/siop_common.c sc->targets[target]->id &= ~(SCNTL3_EWS << 24);
sc 398 dev/ic/siop_common.c tables->id = siop_htoc32(sc, sc->targets[target]->id);
sc 399 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3,
sc 400 dev/ic/siop_common.c (sc->targets[target]->id >> 24) & 0xff);
sc 407 dev/ic/siop_common.c siop_update_xfer_mode(sc, target);
sc 418 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc;
sc 426 dev/ic/siop_common.c printf("%s: answer on ppr negotiation:", sc->sc_dev.dv_xname);
sc 440 dev/ic/siop_common.c "no DT option\n", sc->sc_dev.dv_xname, target);
sc 448 dev/ic/siop_common.c if (offset > sc->maxoff || sync < sc->dt_minsync ||
sc 449 dev/ic/siop_common.c sync > sc->dt_maxsync) {
sc 452 dev/ic/siop_common.c sc->sc_dev.dv_xname, target, offset, sync);
sc 463 dev/ic/siop_common.c if (sc->clock_period != dt_scf_period[i].clock)
sc 476 dev/ic/siop_common.c sc->sc_dev.dv_xname, target, sync);
sc 491 dev/ic/siop_common.c sc->sc_dev.dv_xname, target, tables->msg_in[6]);
sc 500 dev/ic/siop_common.c sc->targets[target]->id |= (SCNTL3_EWS << 24);
sc 501 dev/ic/siop_common.c sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24);
sc 502 dev/ic/siop_common.c sc->targets[target]->id |= scf << (24 + SCNTL3_SCF_SHIFT);
sc 503 dev/ic/siop_common.c sc->targets[target]->id &= ~(SXFER_MO_MASK << 8);
sc 504 dev/ic/siop_common.c sc->targets[target]->id |=
sc 506 dev/ic/siop_common.c sc->targets[target]->id &= ~0xff;
sc 507 dev/ic/siop_common.c sc->targets[target]->id |= SCNTL4_U3EN;
sc 509 dev/ic/siop_common.c siop_update_xfer_mode(sc, target);
sc 510 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3,
sc 511 dev/ic/siop_common.c (sc->targets[target]->id >> 24) & 0xff);
sc 512 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER,
sc 513 dev/ic/siop_common.c (sc->targets[target]->id >> 8) & 0xff);
sc 514 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL4,
sc 515 dev/ic/siop_common.c sc->targets[target]->id & 0xff);
sc 520 dev/ic/siop_common.c "target %d\n", sc->sc_dev.dv_xname, target);
sc 522 dev/ic/siop_common.c tables->t_msgout.count = siop_htoc32(sc, 1);
sc 532 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc;
sc 540 dev/ic/siop_common.c maxoffset = (sc->maxoff > 31) ? 31 : sc->maxoff;
sc 551 dev/ic/siop_common.c if (offset > maxoffset || sync < sc->st_minsync ||
sc 552 dev/ic/siop_common.c sync > sc->st_maxsync)
sc 556 dev/ic/siop_common.c if (sc->clock_period != scf_period[i].clock)
sc 562 dev/ic/siop_common.c sc->targets[target]->id &=
sc 564 dev/ic/siop_common.c sc->targets[target]->id |= scf_period[i].scf
sc 567 dev/ic/siop_common.c (sc->features & SF_BUS_ULTRA3) == 0)
sc 568 dev/ic/siop_common.c sc->targets[target]->id |=
sc 571 dev/ic/siop_common.c sc->targets[target]->id &=
sc 573 dev/ic/siop_common.c sc->targets[target]->id &=
sc 575 dev/ic/siop_common.c sc->targets[target]->id |=
sc 577 dev/ic/siop_common.c sc->targets[target]->id &= ~0xff; /* scntl4 */
sc 587 dev/ic/siop_common.c tables->t_msgout.count = siop_htoc32(sc, 1);
sc 589 dev/ic/siop_common.c sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24);
sc 590 dev/ic/siop_common.c sc->targets[target]->id &= ~(SCNTL3_ULTRA << 24);
sc 591 dev/ic/siop_common.c sc->targets[target]->id &= ~(SXFER_MO_MASK << 8);
sc 592 dev/ic/siop_common.c sc->targets[target]->id &= ~0xff; /* scntl4 */
sc 598 dev/ic/siop_common.c if (offset == 0 || sync > sc->st_maxsync) { /* async */
sc 603 dev/ic/siop_common.c if (sync < sc->st_minsync)
sc 604 dev/ic/siop_common.c sync = sc->st_minsync;
sc 608 dev/ic/siop_common.c if (sc->clock_period != scf_period[i].clock)
sc 614 dev/ic/siop_common.c sc->targets[target]->id &=
sc 616 dev/ic/siop_common.c sc->targets[target]->id |= scf_period[i].scf
sc 619 dev/ic/siop_common.c (sc->features & SF_BUS_ULTRA3) == 0)
sc 620 dev/ic/siop_common.c sc->targets[target]->id |=
sc 623 dev/ic/siop_common.c sc->targets[target]->id &=
sc 625 dev/ic/siop_common.c sc->targets[target]->id &=
sc 627 dev/ic/siop_common.c sc->targets[target]->id |=
sc 629 dev/ic/siop_common.c sc->targets[target]->id &= ~0xff; /* scntl4 */
sc 637 dev/ic/siop_common.c sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24);
sc 638 dev/ic/siop_common.c sc->targets[target]->id &= ~(SCNTL3_ULTRA << 24);
sc 639 dev/ic/siop_common.c sc->targets[target]->id &= ~(SXFER_MO_MASK << 8);
sc 640 dev/ic/siop_common.c sc->targets[target]->id &= ~0xff; /* scntl4 */
sc 646 dev/ic/siop_common.c siop_update_xfer_mode(sc, target);
sc 648 dev/ic/siop_common.c printf("id now 0x%x\n", sc->targets[target]->id);
sc 650 dev/ic/siop_common.c tables->id = siop_htoc32(sc, sc->targets[target]->id);
sc 651 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3,
sc 652 dev/ic/siop_common.c (sc->targets[target]->id >> 24) & 0xff);
sc 653 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER,
sc 654 dev/ic/siop_common.c (sc->targets[target]->id >> 8) & 0xff);
sc 724 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc;
sc 735 dev/ic/siop_common.c offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCRATCHA + 1);
sc 738 dev/ic/siop_common.c sc->sc_dev.dv_xname, offset);
sc 746 dev/ic/siop_common.c dbc = bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DBC) & 0x00ffffff;
sc 748 dev/ic/siop_common.c if (sc->features & SF_CHIP_DFBC) {
sc 750 dev/ic/siop_common.c bus_space_read_2(sc->sc_rt, sc->sc_rh, SIOP_DFBC);
sc 754 dev/ic/siop_common.c bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DFIFO);
sc 755 dev/ic/siop_common.c if (sc->features & SF_CHIP_FIFO) {
sc 756 dev/ic/siop_common.c dfifo |= (bus_space_read_1(sc->sc_rt, sc->sc_rh,
sc 763 dev/ic/siop_common.c sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT0);
sc 766 dev/ic/siop_common.c if ((sstat & SSTAT0_ORF) && (sc->features & SF_CHIP_DFBC) == 0)
sc 769 dev/ic/siop_common.c sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh,
sc 774 dev/ic/siop_common.c (sc->features & SF_CHIP_DFBC) == 0)
sc 778 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
sc 779 dev/ic/siop_common.c bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) |
sc 791 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc;
sc 833 dev/ic/siop_common.c siop_htoc32(sc, siop_ctoh32(sc, table->addr) +
sc 834 dev/ic/siop_common.c siop_ctoh32(sc, table->count) - siop_cmd->resid);
sc 835 dev/ic/siop_common.c table->count = siop_htoc32(sc, siop_cmd->resid);
sc 853 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc;
sc 867 dev/ic/siop_common.c siop_ctoh32(sc, siop_cmd->siop_tables->data[i].count);
sc 876 dev/ic/siop_common.c siop_ctoh32(sc, table->count) - siop_cmd->resid;
sc 886 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc;
sc 891 dev/ic/siop_common.c siop_cmd->siop_tables->t_msgout.count = siop_htoc32(sc, 1);
sc 896 dev/ic/siop_common.c offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCRATCHA + 1);
sc 906 dev/ic/siop_common.c if (siop_ctoh32(sc, table->count) & 1) {
sc 919 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh,
sc 934 dev/ic/siop_common.c siop_clearfifo(sc)
sc 935 dev/ic/siop_common.c struct siop_common_softc *sc;
sc 938 dev/ic/siop_common.c int ctest3 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3);
sc 943 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
sc 945 dev/ic/siop_common.c while ((bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) &
sc 950 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
sc 951 dev/ic/siop_common.c bus_space_read_1(sc->sc_rt, sc->sc_rh,
sc 959 dev/ic/siop_common.c siop_modechange(sc)
sc 960 dev/ic/siop_common.c struct siop_common_softc *sc;
sc 972 dev/ic/siop_common.c sist0 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SIST0);
sc 973 dev/ic/siop_common.c sist1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SIST1);
sc 976 dev/ic/siop_common.c sc->mode = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST4) &
sc 978 dev/ic/siop_common.c stest2 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2);
sc 979 dev/ic/siop_common.c switch(sc->mode) {
sc 982 dev/ic/siop_common.c sc->sc_dev.dv_xname);
sc 983 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
sc 988 dev/ic/siop_common.c sc->sc_dev.dv_xname);
sc 989 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
sc 994 dev/ic/siop_common.c sc->sc_dev.dv_xname);
sc 995 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
sc 1000 dev/ic/siop_common.c sc->sc_dev.dv_xname, sc->mode);
sc 1006 dev/ic/siop_common.c sc->sc_dev.dv_xname);
sc 1011 dev/ic/siop_common.c siop_resetbus(sc)
sc 1012 dev/ic/siop_common.c struct siop_common_softc *sc;
sc 1015 dev/ic/siop_common.c scntl1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1);
sc 1016 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1,
sc 1020 dev/ic/siop_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, scntl1);
sc 1024 dev/ic/siop_common.c siop_update_xfer_mode(sc, target)
sc 1025 dev/ic/siop_common.c struct siop_common_softc *sc;
sc 1030 dev/ic/siop_common.c siop_target = sc->targets[target];
sc 1033 dev/ic/siop_common.c sc->sc_dev.dv_xname, target,
sc 1075 dev/ic/siop_common.c if ((sc->features & SF_CHIP_GEBUG) &&
sc 214 dev/ic/siopvar_common.h #define siop_htoc32(sc, x) \
sc 215 dev/ic/siopvar_common.h (((sc)->features & SF_CHIP_BE) ? htobe32((x)) : htole32((x)))
sc 217 dev/ic/siopvar_common.h #define siop_ctoh32(sc, x) \
sc 218 dev/ic/siopvar_common.h (((sc)->features & SF_CHIP_BE) ? betoh32((x)) : letoh32((x)))
sc 40 dev/ic/sli.c sli_attach(struct sli_softc *sc)
sc 48 dev/ic/sli.c sli_detach(struct sli_softc *sc, int flags)
sc 128 dev/ic/smc83c170.c epic_attach(struct epic_softc *sc, const char *intrstr)
sc 130 dev/ic/smc83c170.c bus_space_tag_t st = sc->sc_st;
sc 131 dev/ic/smc83c170.c bus_space_handle_t sh = sc->sc_sh;
sc 132 dev/ic/smc83c170.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 140 dev/ic/smc83c170.c timeout_set(&sc->sc_mii_timeout, epic_tick, sc);
sc 146 dev/ic/smc83c170.c if ((error = bus_dmamem_alloc(sc->sc_dmat,
sc 154 dev/ic/smc83c170.c if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
sc 156 dev/ic/smc83c170.c (caddr_t *)&sc->sc_control_data,
sc 162 dev/ic/smc83c170.c (char *)sc->sc_control_data + sizeof(struct epic_control_data);
sc 165 dev/ic/smc83c170.c if ((error = bus_dmamap_create(sc->sc_dmat,
sc 168 dev/ic/smc83c170.c &sc->sc_cddmamap)) != 0) {
sc 174 dev/ic/smc83c170.c if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
sc 175 dev/ic/smc83c170.c sc->sc_control_data, sizeof(struct epic_control_data), NULL,
sc 186 dev/ic/smc83c170.c if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 188 dev/ic/smc83c170.c &EPIC_DSTX(sc, i)->ds_dmamap)) != 0) {
sc 199 dev/ic/smc83c170.c if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 201 dev/ic/smc83c170.c &EPIC_DSRX(sc, i)->ds_dmamap)) != 0) {
sc 206 dev/ic/smc83c170.c EPIC_DSRX(sc, i)->ds_mbuf = NULL;
sc 212 dev/ic/smc83c170.c if ((error = bus_dmamap_create(sc->sc_dmat, ETHER_PAD_LEN, 1,
sc 213 dev/ic/smc83c170.c ETHER_PAD_LEN, 0, BUS_DMA_NOWAIT,&sc->sc_nulldmamap)) != 0) {
sc 219 dev/ic/smc83c170.c if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_nulldmamap,
sc 225 dev/ic/smc83c170.c bus_dmamap_sync(sc->sc_dmat, sc->sc_nulldmamap, 0, ETHER_PAD_LEN,
sc 232 dev/ic/smc83c170.c epic_reset(sc);
sc 237 dev/ic/smc83c170.c epic_read_eeprom(sc, 0, (sizeof(myea) / sizeof(myea[0])), myea);
sc 246 dev/ic/smc83c170.c epic_read_eeprom(sc, 0x2c, (sizeof(mydevname) / sizeof(mydevname[0])),
sc 264 dev/ic/smc83c170.c if (sc->sc_hwflags & EPIC_HAS_MII_FIBER)
sc 270 dev/ic/smc83c170.c sc->sc_mii.mii_ifp = ifp;
sc 271 dev/ic/smc83c170.c sc->sc_mii.mii_readreg = epic_mii_read;
sc 272 dev/ic/smc83c170.c sc->sc_mii.mii_writereg = epic_mii_write;
sc 273 dev/ic/smc83c170.c sc->sc_mii.mii_statchg = epic_statchg;
sc 274 dev/ic/smc83c170.c ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, epic_mediachange,
sc 276 dev/ic/smc83c170.c mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
sc 278 dev/ic/smc83c170.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 279 dev/ic/smc83c170.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
sc 280 dev/ic/smc83c170.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
sc 282 dev/ic/smc83c170.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 284 dev/ic/smc83c170.c if (sc->sc_hwflags & EPIC_HAS_BNC) {
sc 286 dev/ic/smc83c170.c sc->sc_serinst = sc->sc_mii.mii_instance++;
sc 287 dev/ic/smc83c170.c ifmedia_add(&sc->sc_mii.mii_media,
sc 289 dev/ic/smc83c170.c sc->sc_serinst),
sc 292 dev/ic/smc83c170.c sc->sc_serinst = -1;
sc 294 dev/ic/smc83c170.c bcopy(enaddr, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 295 dev/ic/smc83c170.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 296 dev/ic/smc83c170.c ifp->if_softc = sc;
sc 315 dev/ic/smc83c170.c sc->sc_sdhook = shutdownhook_establish(epic_shutdown, sc);
sc 316 dev/ic/smc83c170.c if (sc->sc_sdhook == NULL)
sc 318 dev/ic/smc83c170.c sc->sc_dev.dv_xname);
sc 326 dev/ic/smc83c170.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_nulldmamap);
sc 329 dev/ic/smc83c170.c if (EPIC_DSRX(sc, i)->ds_dmamap != NULL)
sc 330 dev/ic/smc83c170.c bus_dmamap_destroy(sc->sc_dmat,
sc 331 dev/ic/smc83c170.c EPIC_DSRX(sc, i)->ds_dmamap);
sc 335 dev/ic/smc83c170.c if (EPIC_DSTX(sc, i)->ds_dmamap != NULL)
sc 336 dev/ic/smc83c170.c bus_dmamap_destroy(sc->sc_dmat,
sc 337 dev/ic/smc83c170.c EPIC_DSTX(sc, i)->ds_dmamap);
sc 339 dev/ic/smc83c170.c bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
sc 341 dev/ic/smc83c170.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
sc 343 dev/ic/smc83c170.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
sc 346 dev/ic/smc83c170.c bus_dmamem_free(sc->sc_dmat, &seg, rseg);
sc 357 dev/ic/smc83c170.c struct epic_softc *sc = arg;
sc 359 dev/ic/smc83c170.c epic_stop(&sc->sc_arpcom.ac_if, 1);
sc 369 dev/ic/smc83c170.c struct epic_softc *sc = ifp->if_softc;
sc 382 dev/ic/smc83c170.c opending = sc->sc_txpending;
sc 383 dev/ic/smc83c170.c firsttx = EPIC_NEXTTX(sc->sc_txlast);
sc 390 dev/ic/smc83c170.c while (sc->sc_txpending < EPIC_NTXDESC) {
sc 402 dev/ic/smc83c170.c nexttx = EPIC_NEXTTX(sc->sc_txlast);
sc 403 dev/ic/smc83c170.c txd = EPIC_CDTX(sc, nexttx);
sc 404 dev/ic/smc83c170.c fr = EPIC_CDFL(sc, nexttx);
sc 405 dev/ic/smc83c170.c ds = EPIC_DSTX(sc, nexttx);
sc 414 dev/ic/smc83c170.c if ((error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
sc 419 dev/ic/smc83c170.c bus_dmamap_unload(sc->sc_dmat, dmamap);
sc 433 dev/ic/smc83c170.c error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
sc 453 dev/ic/smc83c170.c fr->ef_frags[seg].ef_addr = sc->sc_nulldma;
sc 460 dev/ic/smc83c170.c EPIC_CDFLSYNC(sc, nexttx, BUS_DMASYNC_PREWRITE);
sc 463 dev/ic/smc83c170.c bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
sc 487 dev/ic/smc83c170.c EPIC_CDTXSYNC(sc, nexttx,
sc 491 dev/ic/smc83c170.c sc->sc_txpending++;
sc 492 dev/ic/smc83c170.c sc->sc_txlast = nexttx;
sc 503 dev/ic/smc83c170.c if (sc->sc_txpending == EPIC_NTXDESC) {
sc 508 dev/ic/smc83c170.c if (sc->sc_txpending != opending) {
sc 514 dev/ic/smc83c170.c sc->sc_txdirty = firsttx;
sc 520 dev/ic/smc83c170.c EPIC_CDTX(sc, sc->sc_txlast)->et_control |= ET_TXCTL_IAF;
sc 521 dev/ic/smc83c170.c EPIC_CDTXSYNC(sc, sc->sc_txlast,
sc 528 dev/ic/smc83c170.c EPIC_CDTX(sc, firsttx)->et_txstatus |= ET_TXSTAT_OWNER;
sc 529 dev/ic/smc83c170.c EPIC_CDTXSYNC(sc, firsttx,
sc 533 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_COMMAND,
sc 548 dev/ic/smc83c170.c struct epic_softc *sc = ifp->if_softc;
sc 550 dev/ic/smc83c170.c printf("%s: device timeout\n", sc->sc_dev.dv_xname);
sc 563 dev/ic/smc83c170.c struct epic_softc *sc = ifp->if_softc;
sc 570 dev/ic/smc83c170.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 583 dev/ic/smc83c170.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 615 dev/ic/smc83c170.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 616 dev/ic/smc83c170.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 624 dev/ic/smc83c170.c mii_pollstat(&sc->sc_mii);
sc 625 dev/ic/smc83c170.c epic_set_mchash(sc);
sc 633 dev/ic/smc83c170.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
sc 649 dev/ic/smc83c170.c struct epic_softc *sc = arg;
sc 650 dev/ic/smc83c170.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 663 dev/ic/smc83c170.c intstat = bus_space_read_4(sc->sc_st, sc->sc_sh, EPIC_INTSTAT);
sc 672 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_INTSTAT,
sc 679 dev/ic/smc83c170.c for (i = sc->sc_rxptr;; i = EPIC_NEXTRX(i)) {
sc 680 dev/ic/smc83c170.c rxd = EPIC_CDRX(sc, i);
sc 681 dev/ic/smc83c170.c ds = EPIC_DSRX(sc, i);
sc 683 dev/ic/smc83c170.c EPIC_CDRXSYNC(sc, i,
sc 704 dev/ic/smc83c170.c sc->sc_dev.dv_xname);
sc 707 dev/ic/smc83c170.c sc->sc_dev.dv_xname);
sc 709 dev/ic/smc83c170.c EPIC_INIT_RXDESC(sc, i);
sc 713 dev/ic/smc83c170.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
sc 727 dev/ic/smc83c170.c EPIC_INIT_RXDESC(sc, i);
sc 728 dev/ic/smc83c170.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
sc 751 dev/ic/smc83c170.c EPIC_INIT_RXDESC(sc, i);
sc 752 dev/ic/smc83c170.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
sc 757 dev/ic/smc83c170.c if (epic_add_rxbuf(sc, i) != 0) {
sc 760 dev/ic/smc83c170.c EPIC_INIT_RXDESC(sc, i);
sc 761 dev/ic/smc83c170.c bus_dmamap_sync(sc->sc_dmat,
sc 787 dev/ic/smc83c170.c sc->sc_rxptr = i;
sc 794 dev/ic/smc83c170.c sc->sc_dev.dv_xname);
sc 799 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_PRCDAR,
sc 800 dev/ic/smc83c170.c EPIC_CDRXADDR(sc, sc->sc_rxptr));
sc 801 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_COMMAND,
sc 811 dev/ic/smc83c170.c for (i = sc->sc_txdirty; sc->sc_txpending != 0;
sc 812 dev/ic/smc83c170.c i = EPIC_NEXTTX(i), sc->sc_txpending--) {
sc 813 dev/ic/smc83c170.c txd = EPIC_CDTX(sc, i);
sc 814 dev/ic/smc83c170.c ds = EPIC_DSTX(sc, i);
sc 816 dev/ic/smc83c170.c EPIC_CDTXSYNC(sc, i,
sc 823 dev/ic/smc83c170.c EPIC_CDFLSYNC(sc, i, BUS_DMASYNC_POSTWRITE);
sc 825 dev/ic/smc83c170.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap,
sc 828 dev/ic/smc83c170.c bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
sc 843 dev/ic/smc83c170.c sc->sc_dev.dv_xname);
sc 847 dev/ic/smc83c170.c sc->sc_txdirty = i;
sc 853 dev/ic/smc83c170.c if (sc->sc_txpending == 0)
sc 860 dev/ic/smc83c170.c printf("%s: transmit underrun\n", sc->sc_dev.dv_xname);
sc 861 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh,
sc 863 dev/ic/smc83c170.c if (sc->sc_txpending)
sc 864 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh,
sc 880 dev/ic/smc83c170.c sc->sc_dev.dv_xname);
sc 883 dev/ic/smc83c170.c sc->sc_dev.dv_xname);
sc 886 dev/ic/smc83c170.c sc->sc_dev.dv_xname);
sc 889 dev/ic/smc83c170.c sc->sc_dev.dv_xname);
sc 892 dev/ic/smc83c170.c sc->sc_dev.dv_xname);
sc 908 dev/ic/smc83c170.c struct epic_softc *sc = arg;
sc 912 dev/ic/smc83c170.c mii_tick(&sc->sc_mii);
sc 915 dev/ic/smc83c170.c timeout_add(&sc->sc_mii_timeout, hz);
sc 922 dev/ic/smc83c170.c epic_fixup_clock_source(struct epic_softc *sc)
sc 935 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_TEST,
sc 943 dev/ic/smc83c170.c epic_reset(struct epic_softc *sc)
sc 946 dev/ic/smc83c170.c epic_fixup_clock_source(sc);
sc 948 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_GENCTL, 0);
sc 950 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_GENCTL, GENCTL_SOFTRESET);
sc 953 dev/ic/smc83c170.c epic_fixup_clock_source(sc);
sc 962 dev/ic/smc83c170.c struct epic_softc *sc = ifp->if_softc;
sc 963 dev/ic/smc83c170.c bus_space_tag_t st = sc->sc_st;
sc 964 dev/ic/smc83c170.c bus_space_handle_t sh = sc->sc_sh;
sc 978 dev/ic/smc83c170.c epic_reset(sc);
sc 1012 dev/ic/smc83c170.c reg0 = sc->sc_arpcom.ac_enaddr[1] << 8 | sc->sc_arpcom.ac_enaddr[0];
sc 1014 dev/ic/smc83c170.c reg0 = sc->sc_arpcom.ac_enaddr[3] << 8 | sc->sc_arpcom.ac_enaddr[2];
sc 1016 dev/ic/smc83c170.c reg0 = sc->sc_arpcom.ac_enaddr[5] << 8 | sc->sc_arpcom.ac_enaddr[4];
sc 1034 dev/ic/smc83c170.c epic_set_mchash(sc);
sc 1042 dev/ic/smc83c170.c txd = EPIC_CDTX(sc, i);
sc 1044 dev/ic/smc83c170.c txd->et_bufaddr = EPIC_CDFLADDR(sc, i);
sc 1045 dev/ic/smc83c170.c txd->et_nextdesc = EPIC_CDTXADDR(sc, EPIC_NEXTTX(i));
sc 1046 dev/ic/smc83c170.c EPIC_CDTXSYNC(sc, i, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
sc 1048 dev/ic/smc83c170.c sc->sc_txpending = 0;
sc 1049 dev/ic/smc83c170.c sc->sc_txdirty = 0;
sc 1050 dev/ic/smc83c170.c sc->sc_txlast = EPIC_NTXDESC - 1;
sc 1056 dev/ic/smc83c170.c ds = EPIC_DSRX(sc, i);
sc 1058 dev/ic/smc83c170.c if ((error = epic_add_rxbuf(sc, i)) != 0) {
sc 1061 dev/ic/smc83c170.c sc->sc_dev.dv_xname, i, error);
sc 1066 dev/ic/smc83c170.c epic_rxdrain(sc);
sc 1070 dev/ic/smc83c170.c EPIC_INIT_RXDESC(sc, i);
sc 1072 dev/ic/smc83c170.c sc->sc_rxptr = 0;
sc 1084 dev/ic/smc83c170.c EPIC_CDTXADDR(sc, EPIC_NEXTTX(sc->sc_txlast)));
sc 1086 dev/ic/smc83c170.c EPIC_CDRXADDR(sc, sc->sc_rxptr));
sc 1103 dev/ic/smc83c170.c timeout_add(&sc->sc_mii_timeout, hz);
sc 1112 dev/ic/smc83c170.c printf("%s: interface not running\n", sc->sc_dev.dv_xname);
sc 1120 dev/ic/smc83c170.c epic_rxdrain(struct epic_softc *sc)
sc 1126 dev/ic/smc83c170.c ds = EPIC_DSRX(sc, i);
sc 1128 dev/ic/smc83c170.c bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
sc 1141 dev/ic/smc83c170.c struct epic_softc *sc = ifp->if_softc;
sc 1142 dev/ic/smc83c170.c bus_space_tag_t st = sc->sc_st;
sc 1143 dev/ic/smc83c170.c bus_space_handle_t sh = sc->sc_sh;
sc 1151 dev/ic/smc83c170.c timeout_del(&sc->sc_mii_timeout);
sc 1160 dev/ic/smc83c170.c mii_down(&sc->sc_mii);
sc 1163 dev/ic/smc83c170.c epic_fixup_clock_source(sc);
sc 1182 dev/ic/smc83c170.c ds = EPIC_DSTX(sc, i);
sc 1184 dev/ic/smc83c170.c bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
sc 1191 dev/ic/smc83c170.c epic_rxdrain(sc);
sc 1198 dev/ic/smc83c170.c epic_read_eeprom(struct epic_softc *sc, int word, int wordcnt, u_int16_t *data)
sc 1200 dev/ic/smc83c170.c bus_space_tag_t st = sc->sc_st;
sc 1201 dev/ic/smc83c170.c bus_space_handle_t sh = sc->sc_sh;
sc 1275 dev/ic/smc83c170.c epic_add_rxbuf(struct epic_softc *sc, int idx)
sc 1277 dev/ic/smc83c170.c struct epic_descsoft *ds = EPIC_DSRX(sc, idx);
sc 1292 dev/ic/smc83c170.c bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
sc 1296 dev/ic/smc83c170.c error = bus_dmamap_load(sc->sc_dmat, ds->ds_dmamap,
sc 1301 dev/ic/smc83c170.c sc->sc_dev.dv_xname, idx, error);
sc 1305 dev/ic/smc83c170.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
sc 1308 dev/ic/smc83c170.c EPIC_INIT_RXDESC(sc, idx);
sc 1319 dev/ic/smc83c170.c epic_set_mchash(struct epic_softc *sc)
sc 1321 dev/ic/smc83c170.c struct arpcom *ac = &sc->sc_arpcom;
sc 1322 dev/ic/smc83c170.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1339 dev/ic/smc83c170.c if (IFM_SUBTYPE(sc->sc_mii.mii_media_active) == IFM_10_T) {
sc 1368 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_MC0, mchash[0]);
sc 1369 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_MC1, mchash[1]);
sc 1370 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_MC2, mchash[2]);
sc 1371 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_MC3, mchash[3]);
sc 1378 dev/ic/smc83c170.c epic_mii_wait(struct epic_softc *sc, u_int32_t rw)
sc 1383 dev/ic/smc83c170.c if ((bus_space_read_4(sc->sc_st, sc->sc_sh, EPIC_MMCTL) & rw)
sc 1389 dev/ic/smc83c170.c printf("%s: MII timed out\n", sc->sc_dev.dv_xname);
sc 1402 dev/ic/smc83c170.c struct epic_softc *sc = (struct epic_softc *)self;
sc 1404 dev/ic/smc83c170.c if (epic_mii_wait(sc, MMCTL_WRITE))
sc 1407 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_MMCTL,
sc 1410 dev/ic/smc83c170.c if (epic_mii_wait(sc, MMCTL_READ))
sc 1413 dev/ic/smc83c170.c return (bus_space_read_4(sc->sc_st, sc->sc_sh, EPIC_MMDATA) &
sc 1423 dev/ic/smc83c170.c struct epic_softc *sc = (struct epic_softc *)self;
sc 1425 dev/ic/smc83c170.c if (epic_mii_wait(sc, MMCTL_WRITE))
sc 1428 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_MMDATA, val);
sc 1429 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_MMCTL,
sc 1439 dev/ic/smc83c170.c struct epic_softc *sc = (struct epic_softc *)self;
sc 1445 dev/ic/smc83c170.c txcon = bus_space_read_4(sc->sc_st, sc->sc_sh, EPIC_TXCON);
sc 1446 dev/ic/smc83c170.c if (sc->sc_mii.mii_media_active & IFM_FDX)
sc 1450 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_TXCON, txcon);
sc 1453 dev/ic/smc83c170.c if (sc->sc_hwflags & EPIC_DUPLEXLED_ON_694) {
sc 1454 dev/ic/smc83c170.c miicfg = bus_space_read_4(sc->sc_st, sc->sc_sh, EPIC_MIICFG);
sc 1455 dev/ic/smc83c170.c if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX)
sc 1459 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_MIICFG, miicfg);
sc 1466 dev/ic/smc83c170.c epic_set_mchash(sc);
sc 1475 dev/ic/smc83c170.c struct epic_softc *sc = ifp->if_softc;
sc 1477 dev/ic/smc83c170.c mii_pollstat(&sc->sc_mii);
sc 1478 dev/ic/smc83c170.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 1479 dev/ic/smc83c170.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 1488 dev/ic/smc83c170.c struct epic_softc *sc = ifp->if_softc;
sc 1489 dev/ic/smc83c170.c struct mii_data *mii = &sc->sc_mii;
sc 1499 dev/ic/smc83c170.c if (IFM_INST(media) != sc->sc_serinst) {
sc 1504 dev/ic/smc83c170.c miicfg = bus_space_read_4(sc->sc_st, sc->sc_sh, EPIC_MIICFG);
sc 1506 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_MIICFG, miicfg);
sc 1511 dev/ic/smc83c170.c if (IFM_INST(media) == sc->sc_serinst) {
sc 1516 dev/ic/smc83c170.c miicfg = bus_space_read_4(sc->sc_st, sc->sc_sh, EPIC_MIICFG);
sc 1518 dev/ic/smc83c170.c bus_space_write_4(sc->sc_st, sc->sc_sh, EPIC_MIICFG, miicfg);
sc 1524 dev/ic/smc83c170.c epic_statchg(&sc->sc_dev);
sc 144 dev/ic/smc83c170var.h #define EPIC_CDTXADDR(sc, x) ((sc)->sc_cddma + EPIC_CDTXOFF((x)))
sc 145 dev/ic/smc83c170var.h #define EPIC_CDRXADDR(sc, x) ((sc)->sc_cddma + EPIC_CDRXOFF((x)))
sc 146 dev/ic/smc83c170var.h #define EPIC_CDFLADDR(sc, x) ((sc)->sc_cddma + EPIC_CDFLOFF((x)))
sc 148 dev/ic/smc83c170var.h #define EPIC_CDTX(sc, x) (&(sc)->sc_control_data->ecd_txdescs[(x)])
sc 149 dev/ic/smc83c170var.h #define EPIC_CDRX(sc, x) (&(sc)->sc_control_data->ecd_rxdescs[(x)])
sc 150 dev/ic/smc83c170var.h #define EPIC_CDFL(sc, x) (&(sc)->sc_control_data->ecd_txfrags[(x)])
sc 152 dev/ic/smc83c170var.h #define EPIC_DSTX(sc, x) (&(sc)->sc_txsoft[(x)])
sc 153 dev/ic/smc83c170var.h #define EPIC_DSRX(sc, x) (&(sc)->sc_rxsoft[(x)])
sc 155 dev/ic/smc83c170var.h #define EPIC_CDTXSYNC(sc, x, ops) \
sc 156 dev/ic/smc83c170var.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 159 dev/ic/smc83c170var.h #define EPIC_CDRXSYNC(sc, x, ops) \
sc 160 dev/ic/smc83c170var.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 163 dev/ic/smc83c170var.h #define EPIC_CDFLSYNC(sc, x, ops) \
sc 164 dev/ic/smc83c170var.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 167 dev/ic/smc83c170var.h #define EPIC_INIT_RXDESC(sc, x) \
sc 169 dev/ic/smc83c170var.h struct epic_descsoft *__ds = EPIC_DSRX((sc), (x)); \
sc 170 dev/ic/smc83c170var.h struct epic_rxdesc *__rxd = EPIC_CDRX((sc), (x)); \
sc 182 dev/ic/smc83c170var.h __rxd->er_nextdesc = EPIC_CDRXADDR((sc), EPIC_NEXTRX((x))); \
sc 183 dev/ic/smc83c170var.h EPIC_CDRXSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
sc 210 dev/ic/smc91cxx.c smc91cxx_attach(sc, myea)
sc 211 dev/ic/smc91cxx.c struct smc91cxx_softc *sc;
sc 214 dev/ic/smc91cxx.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 215 dev/ic/smc91cxx.c bus_space_tag_t bst = sc->sc_bst;
sc 216 dev/ic/smc91cxx.c bus_space_handle_t bsh = sc->sc_bsh;
sc 217 dev/ic/smc91cxx.c struct ifmedia *ifm = &sc->sc_mii.mii_media;
sc 224 dev/ic/smc91cxx.c smc91cxx_stop(sc);
sc 226 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 3);
sc 228 dev/ic/smc91cxx.c sc->sc_chipid = RR_ID(tmp);
sc 232 dev/ic/smc91cxx.c printf("%s: invalid BSR 0x%04x\n", sc->sc_dev.dv_xname, tmp);
sc 236 dev/ic/smc91cxx.c printf("\n%s: ", sc->sc_dev.dv_xname);
sc 240 dev/ic/smc91cxx.c printf("unknown chip id %d, ", sc->sc_chipid);
sc 245 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 1);
sc 249 dev/ic/smc91cxx.c sc->sc_arpcom.ac_enaddr[i + 1] = (tmp >>8) & 0xff;
sc 250 dev/ic/smc91cxx.c sc->sc_arpcom.ac_enaddr[i] = tmp & 0xff;
sc 253 dev/ic/smc91cxx.c bcopy(myea, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 256 dev/ic/smc91cxx.c printf(": address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 259 dev/ic/smc91cxx.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 260 dev/ic/smc91cxx.c ifp->if_softc = sc;
sc 276 dev/ic/smc91cxx.c sc->sc_mii.mii_ifp = ifp;
sc 277 dev/ic/smc91cxx.c sc->sc_mii.mii_readreg = smc91cxx_mii_readreg;
sc 278 dev/ic/smc91cxx.c sc->sc_mii.mii_writereg = smc91cxx_mii_writereg;
sc 279 dev/ic/smc91cxx.c sc->sc_mii.mii_statchg = smc91cxx_statchg;
sc 282 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 1);
sc 286 dev/ic/smc91cxx.c switch (sc->sc_chipid) {
sc 297 dev/ic/smc91cxx.c sc->sc_dev.dv_xname);
sc 299 dev/ic/smc91cxx.c mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
sc 301 dev/ic/smc91cxx.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 302 dev/ic/smc91cxx.c ifmedia_add(&sc->sc_mii.mii_media,
sc 304 dev/ic/smc91cxx.c ifmedia_set(&sc->sc_mii.mii_media,
sc 307 dev/ic/smc91cxx.c ifmedia_set(&sc->sc_mii.mii_media,
sc 310 dev/ic/smc91cxx.c sc->sc_flags |= SMC_FLAGS_HAS_MII;
sc 317 dev/ic/smc91cxx.c printf("%s: default media %s\n", sc->sc_dev.dv_xname,
sc 327 dev/ic/smc91cxx.c sc->sc_flags |= SMC_FLAGS_ATTACHED;
sc 337 dev/ic/smc91cxx.c struct smc91cxx_softc *sc = ifp->if_softc;
sc 339 dev/ic/smc91cxx.c return (smc91cxx_set_media(sc, sc->sc_mii.mii_media.ifm_media));
sc 343 dev/ic/smc91cxx.c smc91cxx_set_media(sc, media)
sc 344 dev/ic/smc91cxx.c struct smc91cxx_softc *sc;
sc 347 dev/ic/smc91cxx.c bus_space_tag_t bst = sc->sc_bst;
sc 348 dev/ic/smc91cxx.c bus_space_handle_t bsh = sc->sc_bsh;
sc 356 dev/ic/smc91cxx.c if ((sc->sc_flags & SMC_FLAGS_ENABLED) == 0)
sc 362 dev/ic/smc91cxx.c if (sc->sc_flags & SMC_FLAGS_HAS_MII)
sc 363 dev/ic/smc91cxx.c return (mii_mediachg(&sc->sc_mii));
sc 368 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 1);
sc 393 dev/ic/smc91cxx.c struct smc91cxx_softc *sc = ifp->if_softc;
sc 394 dev/ic/smc91cxx.c bus_space_tag_t bst = sc->sc_bst;
sc 395 dev/ic/smc91cxx.c bus_space_handle_t bsh = sc->sc_bsh;
sc 398 dev/ic/smc91cxx.c if ((sc->sc_flags & SMC_FLAGS_ENABLED) == 0) {
sc 407 dev/ic/smc91cxx.c if (sc->sc_flags & SMC_FLAGS_HAS_MII) {
sc 408 dev/ic/smc91cxx.c mii_pollstat(&sc->sc_mii);
sc 409 dev/ic/smc91cxx.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 410 dev/ic/smc91cxx.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 414 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 1);
sc 424 dev/ic/smc91cxx.c smc91cxx_init(sc)
sc 425 dev/ic/smc91cxx.c struct smc91cxx_softc *sc;
sc 427 dev/ic/smc91cxx.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 428 dev/ic/smc91cxx.c bus_space_tag_t bst = sc->sc_bst;
sc 429 dev/ic/smc91cxx.c bus_space_handle_t bsh = sc->sc_bsh;
sc 442 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 0);
sc 451 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 1);
sc 454 dev/ic/smc91cxx.c sc->sc_arpcom.ac_enaddr[i]);
sc 467 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 2);
sc 480 dev/ic/smc91cxx.c smc91cxx_set_media(sc, sc->sc_mii.mii_media.ifm_cur->ifm_media);
sc 490 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 0);
sc 516 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 2);
sc 525 dev/ic/smc91cxx.c if (sc->sc_flags & SMC_FLAGS_HAS_MII) {
sc 527 dev/ic/smc91cxx.c timeout_set(&sc->sc_mii_timeout, smc91cxx_tick, sc);
sc 528 dev/ic/smc91cxx.c timeout_add(&sc->sc_mii_timeout, hz);
sc 547 dev/ic/smc91cxx.c struct smc91cxx_softc *sc = ifp->if_softc;
sc 548 dev/ic/smc91cxx.c bus_space_tag_t bst = sc->sc_bst;
sc 549 dev/ic/smc91cxx.c bus_space_handle_t bsh = sc->sc_bsh;
sc 581 dev/ic/smc91cxx.c printf("%s: large packet discarded\n", sc->sc_dev.dv_xname);
sc 608 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 2);
sc 734 dev/ic/smc91cxx.c struct smc91cxx_softc *sc = arg;
sc 735 dev/ic/smc91cxx.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 736 dev/ic/smc91cxx.c bus_space_tag_t bst = sc->sc_bst;
sc 737 dev/ic/smc91cxx.c bus_space_handle_t bsh = sc->sc_bsh;
sc 741 dev/ic/smc91cxx.c if ((sc->sc_flags & SMC_FLAGS_ENABLED) == 0 ||
sc 742 dev/ic/smc91cxx.c (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
sc 745 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 2);
sc 784 dev/ic/smc91cxx.c sc->sc_dev.dv_xname);
sc 788 dev/ic/smc91cxx.c smc91cxx_read(sc);
sc 841 dev/ic/smc91cxx.c sc->sc_dev.dv_xname);
sc 851 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 0);
sc 862 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 2);
sc 880 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 0);
sc 889 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 2);
sc 898 dev/ic/smc91cxx.c smc91cxx_stop(sc);
sc 899 dev/ic/smc91cxx.c smc91cxx_init(sc);
sc 923 dev/ic/smc91cxx.c smc91cxx_read(sc)
sc 924 dev/ic/smc91cxx.c struct smc91cxx_softc *sc;
sc 926 dev/ic/smc91cxx.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 927 dev/ic/smc91cxx.c bus_space_tag_t bst = sc->sc_bst;
sc 928 dev/ic/smc91cxx.c bus_space_handle_t bsh = sc->sc_bsh;
sc 986 dev/ic/smc91cxx.c sc->sc_dev.dv_xname);
sc 1046 dev/ic/smc91cxx.c struct smc91cxx_softc *sc = ifp->if_softc;
sc 1055 dev/ic/smc91cxx.c if ((error = smc91cxx_enable(sc)) != 0)
sc 1061 dev/ic/smc91cxx.c smc91cxx_init(sc);
sc 1062 dev/ic/smc91cxx.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 1066 dev/ic/smc91cxx.c smc91cxx_init(sc);
sc 1078 dev/ic/smc91cxx.c smc91cxx_stop(sc);
sc 1080 dev/ic/smc91cxx.c smc91cxx_disable(sc);
sc 1087 dev/ic/smc91cxx.c if ((error = smc91cxx_enable(sc)) != 0)
sc 1089 dev/ic/smc91cxx.c smc91cxx_init(sc);
sc 1095 dev/ic/smc91cxx.c smc91cxx_reset(sc);
sc 1101 dev/ic/smc91cxx.c if ((sc->sc_flags & SMC_FLAGS_ENABLED) == 0) {
sc 1107 dev/ic/smc91cxx.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 1108 dev/ic/smc91cxx.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 1115 dev/ic/smc91cxx.c smc91cxx_reset(sc);
sc 1122 dev/ic/smc91cxx.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
sc 1138 dev/ic/smc91cxx.c smc91cxx_reset(sc)
sc 1139 dev/ic/smc91cxx.c struct smc91cxx_softc *sc;
sc 1144 dev/ic/smc91cxx.c smc91cxx_stop(sc);
sc 1145 dev/ic/smc91cxx.c smc91cxx_init(sc);
sc 1156 dev/ic/smc91cxx.c struct smc91cxx_softc *sc = ifp->if_softc;
sc 1158 dev/ic/smc91cxx.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1159 dev/ic/smc91cxx.c ++sc->sc_arpcom.ac_if.if_oerrors;
sc 1161 dev/ic/smc91cxx.c smc91cxx_reset(sc);
sc 1168 dev/ic/smc91cxx.c smc91cxx_stop(sc)
sc 1169 dev/ic/smc91cxx.c struct smc91cxx_softc *sc;
sc 1171 dev/ic/smc91cxx.c bus_space_tag_t bst = sc->sc_bst;
sc 1172 dev/ic/smc91cxx.c bus_space_handle_t bsh = sc->sc_bsh;
sc 1177 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 2);
sc 1183 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 0);
sc 1190 dev/ic/smc91cxx.c sc->sc_arpcom.ac_if.if_timer = 0;
sc 1197 dev/ic/smc91cxx.c smc91cxx_enable(sc)
sc 1198 dev/ic/smc91cxx.c struct smc91cxx_softc *sc;
sc 1200 dev/ic/smc91cxx.c if ((sc->sc_flags & SMC_FLAGS_ENABLED) == 0 && sc->sc_enable != NULL) {
sc 1201 dev/ic/smc91cxx.c if ((*sc->sc_enable)(sc) != 0) {
sc 1203 dev/ic/smc91cxx.c sc->sc_dev.dv_xname);
sc 1208 dev/ic/smc91cxx.c sc->sc_flags |= SMC_FLAGS_ENABLED;
sc 1216 dev/ic/smc91cxx.c smc91cxx_disable(sc)
sc 1217 dev/ic/smc91cxx.c struct smc91cxx_softc *sc;
sc 1219 dev/ic/smc91cxx.c if ((sc->sc_flags & SMC_FLAGS_ENABLED) != 0 && sc->sc_disable != NULL) {
sc 1220 dev/ic/smc91cxx.c (*sc->sc_disable)(sc);
sc 1221 dev/ic/smc91cxx.c sc->sc_flags &= ~SMC_FLAGS_ENABLED;
sc 1231 dev/ic/smc91cxx.c struct smc91cxx_softc *sc = (struct smc91cxx_softc *)self;
sc 1242 dev/ic/smc91cxx.c if_deactivate(&sc->sc_ic.ic_if);
sc 1255 dev/ic/smc91cxx.c struct smc91cxx_softc *sc = (struct smc91cxx_softc *)self;
sc 1256 dev/ic/smc91cxx.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1259 dev/ic/smc91cxx.c if ((sc->sc_flags & SMC_FLAGS_ATTACHED) == 0)
sc 1263 dev/ic/smc91cxx.c smc91cxx_disable(sc);
sc 1268 dev/ic/smc91cxx.c ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
sc 1283 dev/ic/smc91cxx.c struct smc91cxx_softc *sc = (void *) self;
sc 1286 dev/ic/smc91cxx.c return (bus_space_read_2(sc->sc_bst, sc->sc_bsh, MGMT_REG_W));
sc 1294 dev/ic/smc91cxx.c struct smc91cxx_softc *sc = (void *) self;
sc 1297 dev/ic/smc91cxx.c bus_space_write_2(sc->sc_bst, sc->sc_bsh, MGMT_REG_W, val);
sc 1305 dev/ic/smc91cxx.c struct smc91cxx_softc *sc = (void *) self;
sc 1308 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 3);
sc 1312 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 2);
sc 1322 dev/ic/smc91cxx.c struct smc91cxx_softc *sc = (void *) self;
sc 1324 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 3);
sc 1328 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 2);
sc 1335 dev/ic/smc91cxx.c struct smc91cxx_softc *sc = (struct smc91cxx_softc *)self;
sc 1336 dev/ic/smc91cxx.c bus_space_tag_t bst = sc->sc_bst;
sc 1337 dev/ic/smc91cxx.c bus_space_handle_t bsh = sc->sc_bsh;
sc 1340 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 0);
sc 1342 dev/ic/smc91cxx.c if (sc->sc_mii.mii_media_active & IFM_FDX)
sc 1347 dev/ic/smc91cxx.c SMC_SELECT_BANK(sc, 2); /* back to operating window */
sc 1357 dev/ic/smc91cxx.c struct smc91cxx_softc *sc = arg;
sc 1361 dev/ic/smc91cxx.c if ((sc->sc_flags & SMC_FLAGS_HAS_MII) == 0)
sc 1365 dev/ic/smc91cxx.c if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
sc 1369 dev/ic/smc91cxx.c mii_tick(&sc->sc_mii);
sc 1372 dev/ic/smc91cxx.c timeout_add(&sc->sc_mii_timeout, hz);
sc 65 dev/ic/smc91cxxvar.h #define SMC_SELECT_BANK(sc, x) \
sc 66 dev/ic/smc91cxxvar.h bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, \
sc 112 dev/ic/sti.c #define STI_ENABLE_ROM(sc) \
sc 114 dev/ic/sti.c if ((sc) != NULL && (sc)->sc_enable_rom != NULL) \
sc 115 dev/ic/sti.c (*(sc)->sc_enable_rom)(sc); \
sc 117 dev/ic/sti.c #define STI_DISABLE_ROM(sc) \
sc 119 dev/ic/sti.c if ((sc) != NULL && (sc)->sc_disable_rom != NULL) \
sc 120 dev/ic/sti.c (*(sc)->sc_disable_rom)(sc); \
sc 123 dev/ic/sti.c #define STI_ENABLE_ROM(sc) do { /* nothing */ } while (0)
sc 124 dev/ic/sti.c #define STI_DISABLE_ROM(sc) do { /* nothing */ } while (0)
sc 128 dev/ic/sti.c sti_attach_common(sc, codebase)
sc 129 dev/ic/sti.c struct sti_softc *sc;
sc 142 dev/ic/sti.c sc->sc_scr = scr;
sc 143 dev/ic/sti.c scr->scr_main = sc;
sc 145 dev/ic/sti.c if ((rc = sti_screen_setup(scr, sc->iot, sc->memt, sc->romh, sc->bases,
sc 148 dev/ic/sti.c sc->sc_scr = NULL;
sc 152 dev/ic/sti.c sti_describe(sc);
sc 486 dev/ic/sti.c sti_describe(struct sti_softc *sc)
sc 488 dev/ic/sti.c struct sti_screen *scr = sc->sc_scr;
sc 497 dev/ic/sti.c sc->sc_dev.dv_xname, scr->fbwidth, scr->fbheight,
sc 502 dev/ic/sti.c sc->sc_dev.dv_xname, fp->width, fp->height,
sc 509 dev/ic/sti.c struct sti_softc *sc = v;
sc 512 dev/ic/sti.c sc->sc_wsmode = WSDISPLAYIO_MODE_EMUL;
sc 514 dev/ic/sti.c waa.console = sc->sc_flags & STI_CONSOLE ? 1 : 0;
sc 515 dev/ic/sti.c waa.scrdata = &sc->sc_scr->scr_screenlist;
sc 517 dev/ic/sti.c waa.accesscookie = sc;
sc 521 dev/ic/sti.c if (waa.console && !ISSET(sc->sc_flags, STI_ATTACHED)) {
sc 524 dev/ic/sti.c sti_alloc_attr(sc, 0, 0, 0, &defattr);
sc 525 dev/ic/sti.c wsdisplay_cnattach(&sc->sc_scr->scr_wsd, sc->sc_scr,
sc 526 dev/ic/sti.c 0, sc->sc_scr->scr_wsd.nrows - 1, defattr);
sc 527 dev/ic/sti.c sc->sc_flags |= STI_ATTACHED;
sc 530 dev/ic/sti.c config_found(&sc->sc_dev, &waa, wsemuldisplaydevprint);
sc 776 dev/ic/sti.c struct sti_softc *sc = v;
sc 777 dev/ic/sti.c struct sti_screen *scr = sc->sc_scr;
sc 786 dev/ic/sti.c *(u_int *)data = sc->sc_wsmode;
sc 791 dev/ic/sti.c if (sc->sc_wsmode == WSDISPLAYIO_MODE_EMUL &&
sc 794 dev/ic/sti.c else if (sc->sc_wsmode == WSDISPLAYIO_MODE_DUMBFB &&
sc 797 dev/ic/sti.c sc->sc_wsmode = mode;
sc 898 dev/ic/sti.c struct sti_softc *sc = v;
sc 900 dev/ic/sti.c if (sc->sc_nscreens > 0)
sc 903 dev/ic/sti.c *cookiep = sc->sc_scr;
sc 906 dev/ic/sti.c sti_alloc_attr(sc, 0, 0, 0, defattr);
sc 907 dev/ic/sti.c sc->sc_nscreens++;
sc 916 dev/ic/sti.c struct sti_softc *sc = v;
sc 918 dev/ic/sti.c sc->sc_nscreens--;
sc 107 dev/ic/stivar.h int sti_attach_common(struct sti_softc *sc, u_int codebase);
sc 320 dev/ic/tcic2.c tcic_attach(sc)
sc 321 dev/ic/tcic2.c struct tcic_softc *sc;
sc 326 dev/ic/tcic2.c switch (sc->chipid) {
sc 330 dev/ic/tcic2.c sc->pwrena = TCIC_PWR_ENA;
sc 333 dev/ic/tcic2.c sc->pwrena = 0;
sc 340 dev/ic/tcic2.c tcic_write_aux_1(sc->iot, sc->ioh, TCIC_AR_WCTL, TCIC_R_WCTL_WAIT, reg);
sc 342 dev/ic/tcic2.c tcic_write_aux_2(sc->iot, sc->ioh, TCIC_AR_SYSCFG, reg);
sc 343 dev/ic/tcic2.c reg = tcic_read_aux_2(sc->iot, sc->ioh, TCIC_AR_ILOCK);
sc 345 dev/ic/tcic2.c tcic_write_aux_2(sc->iot, sc->ioh, TCIC_AR_ILOCK, reg);
sc 350 dev/ic/tcic2.c sc->handle[i].sc = sc;
sc 351 dev/ic/tcic2.c sc->handle[i].sock = i;
sc 352 dev/ic/tcic2.c sc->handle[i].flags = TCIC_FLAG_SOCKETP;
sc 353 dev/ic/tcic2.c sc->handle[i].memwins
sc 354 dev/ic/tcic2.c = sc->chipid == TCIC_CHIPID_DB86082_1 ? 4 : 5;
sc 358 dev/ic/tcic2.c reg = tcic_read_1(&sc->handle[0], TCIC_R_IENA);
sc 359 dev/ic/tcic2.c tcic_write_1(&sc->handle[0], TCIC_R_IENA,
sc 361 dev/ic/tcic2.c reg = tcic_read_aux_2(sc->iot, sc->ioh, TCIC_AR_SYSCFG);
sc 362 dev/ic/tcic2.c tcic_write_aux_2(sc->iot, sc->ioh, TCIC_AR_SYSCFG,
sc 363 dev/ic/tcic2.c (reg & ~TCIC_SYSCFG_IRQ_MASK) | tcic_irqmap[sc->irq]);
sc 369 dev/ic/tcic2.c tcic_sel_sock(&sc->handle[i]);
sc 370 dev/ic/tcic2.c tcic_write_ind_2(&sc->handle[i], TCIC_IR_SCF1_N(i), 0);
sc 371 dev/ic/tcic2.c tcic_write_ind_2(&sc->handle[i], TCIC_IR_SCF2_N(i),
sc 378 dev/ic/tcic2.c tcic_write_1(&sc->handle[i], TCIC_R_MODE, 0);
sc 379 dev/ic/tcic2.c reg = tcic_read_aux_2(sc->iot, sc->ioh, TCIC_AR_SYSCFG);
sc 381 dev/ic/tcic2.c tcic_write_aux_2(sc->iot, sc->ioh, TCIC_AR_SYSCFG, reg);
sc 382 dev/ic/tcic2.c SIMPLEQ_INIT(&sc->handle[i].events);
sc 385 dev/ic/tcic2.c if ((sc->handle[0].flags & TCIC_FLAG_SOCKETP) ||
sc 386 dev/ic/tcic2.c (sc->handle[1].flags & TCIC_FLAG_SOCKETP)) {
sc 387 dev/ic/tcic2.c printf("%s: %s has ", sc->dev.dv_xname,
sc 388 dev/ic/tcic2.c tcic_chipid_to_string(sc->chipid));
sc 390 dev/ic/tcic2.c if ((sc->handle[0].flags & TCIC_FLAG_SOCKETP) &&
sc 391 dev/ic/tcic2.c (sc->handle[1].flags & TCIC_FLAG_SOCKETP))
sc 393 dev/ic/tcic2.c else if (sc->handle[0].flags & TCIC_FLAG_SOCKETP)
sc 402 dev/ic/tcic2.c tcic_attach_sockets(sc)
sc 403 dev/ic/tcic2.c struct tcic_softc *sc;
sc 408 dev/ic/tcic2.c if (sc->handle[i].flags & TCIC_FLAG_SOCKETP)
sc 409 dev/ic/tcic2.c tcic_attach_socket(&sc->handle[i]);
sc 428 dev/ic/tcic2.c paa.pct = (pcmcia_chipset_tag_t) h->sc->pct;
sc 430 dev/ic/tcic2.c paa.iobase = h->sc->iobase;
sc 431 dev/ic/tcic2.c paa.iosize = h->sc->iosize;
sc 433 dev/ic/tcic2.c h->pcmcia = config_found_sm(&h->sc->dev, &paa, tcic_print,
sc 463 dev/ic/tcic2.c "%s,%s", h->sc->dev.dv_xname, cs)) {
sc 465 dev/ic/tcic2.c h->sc->dev.dv_xname, h->sock);
sc 490 dev/ic/tcic2.c DPRINTF(("%s: insertion event\n", h->sc->dev.dv_xname));
sc 495 dev/ic/tcic2.c DPRINTF(("%s: removal event\n", h->sc->dev.dv_xname));
sc 509 dev/ic/tcic2.c wakeup(h->sc);
sc 608 dev/ic/tcic2.c struct tcic_softc *sc = arg;
sc 611 dev/ic/tcic2.c DPRINTF(("%s: intr\n", sc->dev.dv_xname));
sc 614 dev/ic/tcic2.c if (sc->handle[i].flags & TCIC_FLAG_SOCKETP)
sc 615 dev/ic/tcic2.c ret += tcic_intr_socket(&sc->handle[i]);
sc 630 dev/ic/tcic2.c DPRINTF(("%s: %d icsr: 0x%02x \n", h->sc->dev.dv_xname, h->sock, icsr));
sc 634 dev/ic/tcic2.c DPRINTF(("%s: %02x PROGTIME\n", h->sc->dev.dv_xname, h->sock));
sc 638 dev/ic/tcic2.c DPRINTF(("%s: %02x ILOCK\n", h->sc->dev.dv_xname, h->sock));
sc 642 dev/ic/tcic2.c DPRINTF(("%s: %02x ERR\n", h->sc->dev.dv_xname, h->sock));
sc 649 dev/ic/tcic2.c sstat = tcic_read_aux_1(h->sc->iot, h->sc->ioh,
sc 657 dev/ic/tcic2.c DPRINTF(("%s: %02x CDCHG %x\n", h->sc->dev.dv_xname, h->sock,
sc 669 dev/ic/tcic2.c h->sc->dev.dv_xname));
sc 676 dev/ic/tcic2.c h->sc->dev.dv_xname));
sc 680 dev/ic/tcic2.c h->sc->dev.dv_xname));
sc 686 dev/ic/tcic2.c DPRINTF(("%s: %02x READY\n", h->sc->dev.dv_xname, h->sock));
sc 690 dev/ic/tcic2.c DPRINTF(("%s: %02x LBAT1\n", h->sc->dev.dv_xname, h->sock));
sc 693 dev/ic/tcic2.c DPRINTF(("%s: %02x LBAT2\n", h->sc->dev.dv_xname, h->sock));
sc 696 dev/ic/tcic2.c DPRINTF(("%s: %02x WP\n", h->sc->dev.dv_xname, h->sock));
sc 823 dev/ic/tcic2.c if ((h->sc->subregionmask & (mask << i)) == (mask << i)) {
sc 824 dev/ic/tcic2.c if (bus_space_subregion(h->sc->memt, h->sc->memh,
sc 829 dev/ic/tcic2.c addr = h->sc->membase + (i * TCIC_MEM_PAGESIZE);
sc 830 dev/ic/tcic2.c h->sc->subregionmask &= ~(mhandle);
sc 841 dev/ic/tcic2.c pcmhp->memt = h->sc->memt;
sc 859 dev/ic/tcic2.c h->sc->subregionmask |= pcmhp->mhandle;
sc 913 dev/ic/tcic2.c if (h->sc->chipid == TCIC_CHIPID_DB86082_1) {
sc 974 dev/ic/tcic2.c if (h->sc->memt != pcmhp->memt)
sc 1074 dev/ic/tcic2.c iot = h->sc->iot;
sc 1084 dev/ic/tcic2.c if (bus_space_alloc(iot, h->sc->iobase,
sc 1085 dev/ic/tcic2.c h->sc->iobase + h->sc->iosize, size, align, 0, 0,
sc 1154 dev/ic/tcic2.c if (h->sc->chipid != TCIC_CHIPID_DB86082_1)
sc 1211 dev/ic/tcic2.c if (h->sc->iot != pcihp->iot)
sc 1266 dev/ic/tcic2.c reg = tcic_read_aux_2(h->sc->iot, h->sc->ioh, TCIC_AR_ILOCK);
sc 1269 dev/ic/tcic2.c tcic_write_aux_2(h->sc->iot, h->sc->ioh, TCIC_AR_ILOCK, reg);
sc 1275 dev/ic/tcic2.c reg = TCIC_PWR_VCC_N(h->sock) | TCIC_PWR_VPP_N(h->sock) | h->sc->pwrena;
sc 1276 dev/ic/tcic2.c if (h->sc->pwrena) /* this is a '84 type chip */
sc 1282 dev/ic/tcic2.c reg = tcic_read_aux_2(h->sc->iot, h->sc->ioh, TCIC_AR_ILOCK);
sc 1284 dev/ic/tcic2.c tcic_write_aux_2(h->sc->iot, h->sc->ioh, TCIC_AR_ILOCK, reg);
sc 1287 dev/ic/tcic2.c tcic_write_aux_2(h->sc->iot, h->sc->ioh, TCIC_AR_ILOCK, reg);
sc 1293 dev/ic/tcic2.c reg = tcic_read_aux_2(h->sc->iot, h->sc->ioh, TCIC_AR_ILOCK);
sc 1295 dev/ic/tcic2.c tcic_write_aux_2(h->sc->iot, h->sc->ioh, TCIC_AR_ILOCK, reg);
sc 1332 dev/ic/tcic2.c h->sc->dev.dv_xname, h->sock,
sc 1364 dev/ic/tcic2.c val = tcic_read_aux_2(h->sc->iot, h->sc->ioh, TCIC_AR_ILOCK);
sc 1366 dev/ic/tcic2.c tcic_write_aux_2(h->sc->iot, h->sc->ioh, TCIC_AR_ILOCK, val);
sc 57 dev/ic/tcic2var.h struct tcic_softc *sc;
sc 192 dev/ic/tcic2var.h return (bus_space_read_1(h->sc->iot, h->sc->ioh, reg));
sc 201 dev/ic/tcic2var.h return (bus_space_read_2(h->sc->iot, h->sc->ioh, reg));
sc 211 dev/ic/tcic2var.h val = bus_space_read_2(h->sc->iot, h->sc->ioh, reg);
sc 212 dev/ic/tcic2var.h val |= bus_space_read_2(h->sc->iot, h->sc->ioh, reg+2) << 16;
sc 223 dev/ic/tcic2var.h bus_space_write_1(h->sc->iot, h->sc->ioh, reg, (data));
sc 233 dev/ic/tcic2var.h bus_space_write_2(h->sc->iot, h->sc->ioh, reg, (data));
sc 243 dev/ic/tcic2var.h bus_space_write_2(h->sc->iot, h->sc->ioh, reg, (data));
sc 244 dev/ic/tcic2var.h bus_space_write_2(h->sc->iot, h->sc->ioh, reg+2, (data)>>16);
sc 256 dev/ic/tcic2var.h val = bus_space_read_2(h->sc->iot, h->sc->ioh, TCIC_R_DATA);
sc 271 dev/ic/tcic2var.h bus_space_write_2(h->sc->iot, h->sc->ioh, TCIC_R_DATA, (data));
sc 231 dev/ic/trm.c trm_GetFreeSRB(struct trm_softc *sc)
sc 237 dev/ic/trm.c pSRB = TAILQ_FIRST(&sc->freeSRB);
sc 240 dev/ic/trm.c TAILQ_REMOVE(&sc->freeSRB, pSRB, link);
sc 244 dev/ic/trm.c sc->sc_device.dv_xname, pSRB, TAILQ_FIRST(&sc->freeSRB));
sc 259 dev/ic/trm.c trm_RewaitSRB(struct trm_softc *sc, struct trm_scsi_req_q *pSRB)
sc 267 dev/ic/trm.c TAILQ_REMOVE(&sc->waitingSRB, pSRB, link);
sc 272 dev/ic/trm.c TAILQ_REMOVE(&sc->goingSRB, pSRB, link);
sc 280 dev/ic/trm.c TAILQ_INSERT_HEAD(&sc->waitingSRB, pSRB, link);
sc 295 dev/ic/trm.c trm_StartWaitingSRB(struct trm_softc *sc)
sc 302 dev/ic/trm.c if ((sc->pActiveDCB != NULL) ||
sc 303 dev/ic/trm.c (TAILQ_EMPTY(&sc->waitingSRB)) ||
sc 304 dev/ic/trm.c (sc->sc_Flag & (RESET_DETECT | RESET_DONE | RESET_DEV)) != 0)
sc 307 dev/ic/trm.c for (pSRB = TAILQ_FIRST(&sc->waitingSRB); pSRB != NULL; pSRB = next) {
sc 309 dev/ic/trm.c if (trm_StartSRB(sc, pSRB) == 0) {
sc 311 dev/ic/trm.c TAILQ_REMOVE(&sc->waitingSRB, pSRB, link);
sc 313 dev/ic/trm.c TAILQ_INSERT_TAIL(&sc->goingSRB, pSRB, link);
sc 334 dev/ic/trm.c struct trm_softc *sc;
sc 343 dev/ic/trm.c sc = (struct trm_softc *)xs->sc_link->adapter_softc;
sc 344 dev/ic/trm.c ioh = sc->sc_iohandle;
sc 345 dev/ic/trm.c iot = sc->sc_iotag;
sc 350 dev/ic/trm.c sc->sc_device.dv_xname, sc, xs, target, lun, xs->cmd->opcode);
sc 355 dev/ic/trm.c sc->sc_device.dv_xname, target, TRM_MAX_TARGETS);
sc 361 dev/ic/trm.c sc->sc_device.dv_xname, lun, TRM_MAX_LUNS);
sc 366 dev/ic/trm.c pDCB = sc->pDCB[target][lun];
sc 376 dev/ic/trm.c printf("%s: trm_reset\n", sc->sc_device.dv_xname);
sc 378 dev/ic/trm.c trm_reset(sc);
sc 385 dev/ic/trm.c printf("%s: Is it done?\n", sc->sc_device.dv_xname);
sc 396 dev/ic/trm.c pSRB = trm_GetFreeSRB(sc);
sc 408 dev/ic/trm.c printf("%s: xs->datalen=%x\n", sc->sc_device.dv_xname,
sc 410 dev/ic/trm.c printf("%s: sc->sc_dmatag=0x%x\n", sc->sc_device.dv_xname,
sc 411 dev/ic/trm.c (u_int32_t)sc->sc_dmatag);
sc 412 dev/ic/trm.c printf("%s: pSRB->dmamapxfer=0x%x\n", sc->sc_device.dv_xname,
sc 414 dev/ic/trm.c printf("%s: xs->data=0x%x\n", sc->sc_device.dv_xname,
sc 417 dev/ic/trm.c if ((error = bus_dmamap_load(sc->sc_dmatag, pSRB->dmamapxfer,
sc 422 dev/ic/trm.c , sc->sc_device.dv_xname, error);
sc 427 dev/ic/trm.c TAILQ_INSERT_HEAD(&sc->freeSRB, pSRB, link);
sc 432 dev/ic/trm.c bus_dmamap_sync(sc->sc_dmatag, pSRB->dmamapxfer,
sc 460 dev/ic/trm.c TAILQ_INSERT_TAIL(&sc->waitingSRB, pSRB, link);
sc 461 dev/ic/trm.c trm_StartWaitingSRB(sc);
sc 470 dev/ic/trm.c trm_Interrupt(sc);
sc 489 dev/ic/trm.c trm_ResetAllDevParam(struct trm_softc *sc)
sc 494 dev/ic/trm.c pEEpromBuf = &trm_eepromBuf[sc->sc_AdapterUnit];
sc 497 dev/ic/trm.c if (target == sc->sc_AdaptSCSIID)
sc 500 dev/ic/trm.c if ((sc->pDCB[target][0]->DCBFlag & TRM_QUIRKS_VALID) == 0)
sc 503 dev/ic/trm.c quirks = sc->pDCB[target][0]->sc_link->quirks;
sc 505 dev/ic/trm.c trm_ResetDevParam(sc, sc->pDCB[target][0], quirks);
sc 517 dev/ic/trm.c trm_ResetDevParam(struct trm_softc *sc, struct trm_dcb *pDCB, u_int8_t quirks)
sc 519 dev/ic/trm.c struct trm_adapter_nvram *pEEpromBuf = &trm_eepromBuf[sc->sc_AdapterUnit];
sc 536 dev/ic/trm.c ((sc->sc_config & HCC_WIDE_CARD) != 0))
sc 551 dev/ic/trm.c trm_SetXferParams(sc, pDCB, 0);
sc 562 dev/ic/trm.c trm_RecoverSRB(struct trm_softc *sc)
sc 568 dev/ic/trm.c while ((pSRB = TAILQ_FIRST(&sc->goingSRB)) != NULL) {
sc 570 dev/ic/trm.c TAILQ_REMOVE(&sc->goingSRB, pSRB, link);
sc 572 dev/ic/trm.c TAILQ_INSERT_HEAD(&sc->waitingSRB, pSRB, link);
sc 584 dev/ic/trm.c trm_reset (struct trm_softc *sc)
sc 586 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 587 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 591 dev/ic/trm.c printf("%s: trm_reset", sc->sc_device.dv_xname);
sc 599 dev/ic/trm.c trm_ResetSCSIBus(sc);
sc 623 dev/ic/trm.c trm_ResetAllDevParam(sc);
sc 624 dev/ic/trm.c trm_GoingSRB_Done(sc);
sc 625 dev/ic/trm.c sc->pActiveDCB = NULL;
sc 630 dev/ic/trm.c sc->sc_Flag = 0;
sc 631 dev/ic/trm.c trm_StartWaitingSRB(sc);
sc 648 dev/ic/trm.c struct trm_softc *sc;
sc 654 dev/ic/trm.c sc = xs->sc_link->adapter_softc;
sc 657 dev/ic/trm.c sc->sc_device.dv_xname, xs->cmd->opcode,
sc 660 dev/ic/trm.c trm_FinishSRB(sc, pSRB);
sc 661 dev/ic/trm.c trm_StartWaitingSRB(sc);
sc 666 dev/ic/trm.c sc->sc_device.dv_xname);
sc 681 dev/ic/trm.c trm_StartSRB(struct trm_softc *sc, struct trm_scsi_req_q *pSRB)
sc 683 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 684 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 691 dev/ic/trm.c sc->sc_device.dv_xname, sc, pDCB, pSRB);
sc 701 dev/ic/trm.c bus_space_write_1(iot, ioh, TRM_S1040_SCSI_HOSTID, sc->sc_AdaptSCSIID);
sc 706 dev/ic/trm.c if ((sc->pDCB[pDCB->target][0]->sc_link != NULL) &&
sc 707 dev/ic/trm.c ((sc->pDCB[pDCB->target][0]->DCBFlag & TRM_QUIRKS_VALID) == 0)) {
sc 708 dev/ic/trm.c sc->pDCB[pDCB->target][0]->DCBFlag |= TRM_QUIRKS_VALID;
sc 709 dev/ic/trm.c trm_ResetDevParam(sc, sc->pDCB[pDCB->target][0], sc->pDCB[pDCB->target][0]->sc_link->quirks);
sc 717 dev/ic/trm.c sc->MsgCnt = 1;
sc 718 dev/ic/trm.c sc->MsgBuf[0] = pDCB->IdentifyMsg;
sc 722 dev/ic/trm.c sc->MsgBuf[0] &= ~MSG_IDENTIFY_DISCFLAG;
sc 733 dev/ic/trm.c } else if ((sc->MsgBuf[0] & MSG_IDENTIFY_DISCFLAG) != 0) {
sc 744 dev/ic/trm.c sc->MsgCnt = 0;
sc 750 dev/ic/trm.c sc->MsgBuf[sc->MsgCnt++] = MSG_SIMPLE_Q_TAG;
sc 751 dev/ic/trm.c sc->MsgBuf[sc->MsgCnt++] = pSRB->TagNumber;
sc 758 dev/ic/trm.c sc->pActiveDCB = pDCB;
sc 761 dev/ic/trm.c if (sc->MsgCnt > 0) {
sc 762 dev/ic/trm.c bus_space_write_1(iot, ioh, TRM_S1040_SCSI_FIFO, sc->MsgBuf[0]);
sc 763 dev/ic/trm.c if (sc->MsgCnt > 1) {
sc 765 dev/ic/trm.c bus_space_write_multi_1(iot, ioh, TRM_S1040_SCSI_FIFO, &sc->MsgBuf[1], sc->MsgCnt - 1);
sc 767 dev/ic/trm.c sc->MsgCnt = 0;
sc 796 dev/ic/trm.c struct trm_softc *sc = (struct trm_softc *)vsc;
sc 804 dev/ic/trm.c if (sc == NULL) {
sc 809 dev/ic/trm.c ioh = sc->sc_iohandle;
sc 810 dev/ic/trm.c iot = sc->sc_iotag;
sc 821 dev/ic/trm.c sc->sc_device.dv_xname, scsi_status, scsi_intstatus);
sc 824 dev/ic/trm.c trm_Disconnect(sc);
sc 827 dev/ic/trm.c trm_Reselect(sc);
sc 830 dev/ic/trm.c trm_ScsiRstDetect(sc);
sc 832 dev/ic/trm.c else if ((sc->pActiveDCB != NULL) && ((scsi_intstatus & (INT_BUSSERVICE | INT_CMDDONE)) != 0)) {
sc 833 dev/ic/trm.c pSRB = sc->pActiveDCB->pActiveSRB;
sc 844 dev/ic/trm.c stateV(sc, pSRB, &scsi_status);
sc 860 dev/ic/trm.c stateV(sc, pSRB, &scsi_status);
sc 881 dev/ic/trm.c trm_MsgOutPhase0(struct trm_softc *sc, struct trm_scsi_req_q *pSRB, u_int8_t *pscsi_status)
sc 904 dev/ic/trm.c trm_MsgOutPhase1(struct trm_softc *sc, struct trm_scsi_req_q *pSRB, u_int8_t *pscsi_status)
sc 906 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 907 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 908 dev/ic/trm.c struct trm_dcb *pDCB = sc->pActiveDCB;
sc 919 dev/ic/trm.c sc->MsgBuf[0] = pDCB->IdentifyMsg & ~MSG_IDENTIFY_DISCFLAG;
sc 920 dev/ic/trm.c sc->MsgBuf[1] = MSG_EXTENDED;
sc 921 dev/ic/trm.c sc->MsgBuf[2] = MSG_EXT_WDTR_LEN;
sc 922 dev/ic/trm.c sc->MsgBuf[3] = MSG_EXT_WDTR;
sc 925 dev/ic/trm.c sc->MsgBuf[4] = MSG_EXT_WDTR_BUS_8_BIT;
sc 927 dev/ic/trm.c sc->MsgBuf[4] = MSG_EXT_WDTR_BUS_16_BIT;
sc 929 dev/ic/trm.c sc->MsgCnt = 5;
sc 936 dev/ic/trm.c sc->MsgCnt = 0;
sc 939 dev/ic/trm.c sc->MsgBuf[sc->MsgCnt++] = pDCB->IdentifyMsg & ~MSG_IDENTIFY_DISCFLAG;
sc 941 dev/ic/trm.c sc->MsgBuf[sc->MsgCnt++] = MSG_EXTENDED;
sc 942 dev/ic/trm.c sc->MsgBuf[sc->MsgCnt++] = MSG_EXT_SDTR_LEN;
sc 943 dev/ic/trm.c sc->MsgBuf[sc->MsgCnt++] = MSG_EXT_SDTR;
sc 944 dev/ic/trm.c sc->MsgBuf[sc->MsgCnt++] = pDCB->MaxNegoPeriod;
sc 947 dev/ic/trm.c sc->MsgBuf[sc->MsgCnt++] = TRM_MAX_SYNC_OFFSET;
sc 949 dev/ic/trm.c sc->MsgBuf[sc->MsgCnt++] = 0;
sc 952 dev/ic/trm.c if (sc->MsgCnt > 0) {
sc 953 dev/ic/trm.c bus_space_write_multi_1(iot, ioh, TRM_S1040_SCSI_FIFO, &sc->MsgBuf[0], sc->MsgCnt);
sc 954 dev/ic/trm.c if (sc->MsgBuf[0] == MSG_ABORT)
sc 956 dev/ic/trm.c sc->MsgCnt = 0;
sc 976 dev/ic/trm.c trm_CommandPhase1(struct trm_softc *sc, struct trm_scsi_req_q *pSRB, u_int8_t *pscsi_status)
sc 978 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 979 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 1004 dev/ic/trm.c trm_DataOutPhase0(struct trm_softc *sc, struct trm_scsi_req_q *pSRB, u_int8_t *pscsi_status)
sc 1006 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 1007 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 1129 dev/ic/trm.c trm_DataOutPhase1(struct trm_softc *sc, struct trm_scsi_req_q *pSRB, u_int8_t *pscsi_status)
sc 1131 dev/ic/trm.c trm_DataIO_transfer(sc, pSRB, XFERDATAOUT);
sc 1142 dev/ic/trm.c trm_DataInPhase0(struct trm_softc *sc, struct trm_scsi_req_q *pSRB, u_int8_t *pscsi_status)
sc 1144 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 1145 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 1229 dev/ic/trm.c trm_DataInPhase1(struct trm_softc *sc, struct trm_scsi_req_q *pSRB, u_int8_t *pscsi_status)
sc 1231 dev/ic/trm.c trm_DataIO_transfer(sc, pSRB, XFERDATAIN);
sc 1242 dev/ic/trm.c trm_DataIO_transfer(struct trm_softc *sc, struct trm_scsi_req_q *pSRB, u_int16_t ioDir)
sc 1244 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 1245 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 1329 dev/ic/trm.c trm_StatusPhase0(struct trm_softc *sc, struct trm_scsi_req_q *pSRB, u_int8_t *pscsi_status)
sc 1331 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 1332 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 1359 dev/ic/trm.c trm_StatusPhase1(struct trm_softc *sc, struct trm_scsi_req_q *pSRB, u_int8_t *pscsi_status)
sc 1361 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 1362 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 1417 dev/ic/trm.c trm_MsgInPhase0(struct trm_softc *sc, struct trm_scsi_req_q *pSRB, u_int8_t *pscsi_status)
sc 1419 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 1420 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 1424 dev/ic/trm.c pDCB = sc->pActiveDCB;
sc 1442 dev/ic/trm.c bzero(&sc->MsgBuf[0], sizeof(sc->MsgBuf));
sc 1443 dev/ic/trm.c sc->MsgBuf[0] = message_in_code;
sc 1444 dev/ic/trm.c sc->MsgCnt = 1;
sc 1509 dev/ic/trm.c sc->MsgBuf[sc->MsgCnt++] = message_in_code;
sc 1512 dev/ic/trm.c sc->sc_device.dv_xname,
sc 1513 dev/ic/trm.c sc->MsgBuf[0], sc->MsgBuf[1], sc->MsgBuf[2], sc->MsgBuf[3], sc->MsgBuf[4], sc->MsgBuf[5] );
sc 1515 dev/ic/trm.c switch (sc->MsgBuf[0]) {
sc 1519 dev/ic/trm.c if (sc->MsgCnt == 2) {
sc 1521 dev/ic/trm.c message_in_tag_id = sc->MsgBuf[1];
sc 1522 dev/ic/trm.c sc->MsgCnt = 0;
sc 1523 dev/ic/trm.c TAILQ_FOREACH(pSRB, &sc->goingSRB, link) {
sc 1531 dev/ic/trm.c pSRB = &sc->SRB[0];
sc 1534 dev/ic/trm.c trm_EnableMsgOut(sc, MSG_ABORT_TAG);
sc 1541 dev/ic/trm.c if ((sc->MsgBuf[2] == MSG_EXT_WDTR) && (sc->MsgCnt == 4)) {
sc 1555 dev/ic/trm.c if (sc->MsgBuf[1] != MSG_EXT_WDTR_LEN)
sc 1558 dev/ic/trm.c switch (sc->MsgBuf[3]) {
sc 1561 dev/ic/trm.c sc->MsgBuf[3] = MSG_EXT_WDTR_BUS_8_BIT;
sc 1563 dev/ic/trm.c sc->MsgBuf[3] = MSG_EXT_WDTR_BUS_16_BIT;
sc 1568 dev/ic/trm.c sc->MsgBuf[3] = MSG_EXT_WDTR_BUS_8_BIT;
sc 1589 dev/ic/trm.c sc->MsgCnt = 1;
sc 1590 dev/ic/trm.c sc->MsgBuf[0] = MSG_MESSAGE_REJECT;
sc 1597 dev/ic/trm.c } else if ((sc->MsgBuf[2] == MSG_EXT_SDTR) && (sc->MsgCnt == 5)) {
sc 1612 dev/ic/trm.c if (sc->MsgBuf[1] != MSG_EXT_SDTR_LEN)
sc 1615 dev/ic/trm.c if ((sc->MsgBuf[3] == 0) || (sc->MsgBuf[4] == 0)) {
sc 1629 dev/ic/trm.c pDCB->SyncOffset = sc->MsgBuf[4];
sc 1632 dev/ic/trm.c if (sc->MsgBuf[3] <= trm_clock_period[bIndex])
sc 1644 dev/ic/trm.c trm_SetXferParams(sc, pDCB, (pDCB->DCBFlag & TRM_QUIRKS_VALID));
sc 1675 dev/ic/trm.c trm_MsgInPhase1(struct trm_softc *sc, struct trm_scsi_req_q *pSRB, u_int8_t *pscsi_status)
sc 1677 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 1678 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 1701 dev/ic/trm.c trm_Nop(struct trm_softc *sc, struct trm_scsi_req_q *pSRB, u_int8_t *pscsi_status)
sc 1714 dev/ic/trm.c trm_SetXferParams(struct trm_softc *sc, struct trm_dcb *pDCB, int print_info)
sc 1723 dev/ic/trm.c printf("%s: trm_SetXferParams\n", sc->sc_device.dv_xname);
sc 1728 dev/ic/trm.c pDCBTemp = sc->pDCB[target][lun];
sc 1739 dev/ic/trm.c trm_print_info(sc, pDCB);
sc 1760 dev/ic/trm.c trm_Disconnect(struct trm_softc *sc)
sc 1762 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 1764 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 1769 dev/ic/trm.c printf("%s: trm_Disconnect\n", sc->sc_device.dv_xname);
sc 1772 dev/ic/trm.c pDCB = sc->pActiveDCB;
sc 1783 dev/ic/trm.c sc->pActiveDCB = NULL;
sc 1795 dev/ic/trm.c pSRB = TAILQ_FIRST(&sc->goingSRB);
sc 1807 dev/ic/trm.c trm_FinishSRB(sc, pSRB);
sc 1820 dev/ic/trm.c trm_RewaitSRB(sc, pSRB);
sc 1833 dev/ic/trm.c trm_FinishSRB(sc, pSRB);
sc 1840 dev/ic/trm.c trm_StartWaitingSRB(sc);
sc 1851 dev/ic/trm.c trm_Reselect(struct trm_softc *sc)
sc 1853 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 1854 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 1861 dev/ic/trm.c printf("%s: trm_Reselect\n", sc->sc_device.dv_xname);
sc 1864 dev/ic/trm.c pDCB = sc->pActiveDCB;
sc 1870 dev/ic/trm.c trm_RewaitSRB(sc, pSRB);
sc 1883 dev/ic/trm.c sc->sc_device.dv_xname, target, lun);
sc 1887 dev/ic/trm.c pDCB = sc->pDCB[target][lun];
sc 1893 dev/ic/trm.c sc->sc_device.dv_xname, target, lun);
sc 1895 dev/ic/trm.c sc->pActiveDCB = pDCB;
sc 1899 dev/ic/trm.c pSRB = &sc->SRB[0];
sc 1907 dev/ic/trm.c pSRB = &sc->SRB[0];
sc 1910 dev/ic/trm.c trm_EnableMsgOut(sc, MSG_ABORT);
sc 1920 dev/ic/trm.c bus_space_write_1(iot, ioh, TRM_S1040_SCSI_HOSTID, sc->sc_AdaptSCSIID);
sc 1946 dev/ic/trm.c trm_FinishSRB(struct trm_softc *sc, struct trm_scsi_req_q *pSRB)
sc 1956 dev/ic/trm.c sc->sc_device.dv_xname, sc, pSRB);
sc 1961 dev/ic/trm.c trm_ReleaseSRB(sc, pSRB);
sc 1979 dev/ic/trm.c sc->sc_device.dv_xname);
sc 2002 dev/ic/trm.c sc->sc_device.dv_xname);
sc 2010 dev/ic/trm.c sc->sc_device.dv_xname, pSRB->AdaptStatus);
sc 2023 dev/ic/trm.c trm_RequestSense(sc, pSRB);
sc 2031 dev/ic/trm.c trm_RewaitSRB(sc, pSRB);
sc 2072 dev/ic/trm.c sc->sc_device.dv_xname, target, lun);
sc 2075 dev/ic/trm.c sc->pDCB[target][lun] = NULL;
sc 2083 dev/ic/trm.c trm_ReleaseSRB(sc, pSRB);
sc 2093 dev/ic/trm.c sc->sc_device.dv_xname, target, lun, xs->cmd->opcode, xs->error, xs->status);
sc 2107 dev/ic/trm.c trm_ReleaseSRB(struct trm_softc *sc, struct trm_scsi_req_q *pSRB)
sc 2123 dev/ic/trm.c bus_dmamap_sync(sc->sc_dmatag, pSRB->dmamapxfer,
sc 2127 dev/ic/trm.c bus_dmamap_unload(sc->sc_dmatag, pSRB->dmamapxfer);
sc 2134 dev/ic/trm.c TAILQ_REMOVE(&sc->waitingSRB, pSRB, link);
sc 2138 dev/ic/trm.c TAILQ_REMOVE(&sc->goingSRB, pSRB, link);
sc 2158 dev/ic/trm.c if (pSRB != &sc->SRB[0])
sc 2159 dev/ic/trm.c TAILQ_INSERT_TAIL(&sc->freeSRB, pSRB, link);
sc 2172 dev/ic/trm.c trm_GoingSRB_Done(struct trm_softc *sc)
sc 2178 dev/ic/trm.c while ((pSRB = TAILQ_FIRST(&sc->goingSRB)) != NULL) {
sc 2181 dev/ic/trm.c trm_FinishSRB(sc, pSRB);
sc 2193 dev/ic/trm.c trm_ResetSCSIBus(struct trm_softc *sc)
sc 2195 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 2196 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 2201 dev/ic/trm.c sc->sc_Flag |= RESET_DEV;
sc 2218 dev/ic/trm.c trm_ScsiRstDetect(struct trm_softc *sc)
sc 2220 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 2221 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 2225 dev/ic/trm.c printf("%s: trm_ScsiRstDetect\n", sc->sc_device.dv_xname);
sc 2238 dev/ic/trm.c if ((sc->sc_Flag & RESET_DEV) != 0)
sc 2239 dev/ic/trm.c sc->sc_Flag |= RESET_DONE;
sc 2241 dev/ic/trm.c sc->sc_Flag |= RESET_DETECT;
sc 2242 dev/ic/trm.c trm_ResetAllDevParam(sc);
sc 2243 dev/ic/trm.c trm_RecoverSRB(sc);
sc 2244 dev/ic/trm.c sc->pActiveDCB = NULL;
sc 2245 dev/ic/trm.c sc->sc_Flag = 0;
sc 2246 dev/ic/trm.c trm_StartWaitingSRB(sc);
sc 2258 dev/ic/trm.c trm_RequestSense(struct trm_softc *sc, struct trm_scsi_req_q *pSRB)
sc 2288 dev/ic/trm.c if (trm_StartSRB(sc, pSRB) != 0)
sc 2289 dev/ic/trm.c trm_RewaitSRB(sc, pSRB);
sc 2300 dev/ic/trm.c trm_EnableMsgOut(struct trm_softc *sc, u_int8_t msg)
sc 2302 dev/ic/trm.c sc->MsgBuf[0] = msg;
sc 2303 dev/ic/trm.c sc->MsgCnt = 1;
sc 2305 dev/ic/trm.c bus_space_write_2(sc->sc_iotag, sc->sc_iohandle, TRM_S1040_SCSI_CONTROL, DO_SETATN);
sc 2316 dev/ic/trm.c trm_linkSRB(struct trm_softc *sc)
sc 2324 dev/ic/trm.c pSRB = &sc->SRB[i];
sc 2326 dev/ic/trm.c pSRB->PhysSRB = sc->sc_dmamap_control->dm_segs[0].ds_addr
sc 2329 dev/ic/trm.c pSRB->SRBSGPhyAddr = sc->sc_dmamap_control->dm_segs[0].ds_addr
sc 2333 dev/ic/trm.c pSRB->scsisensePhyAddr = sc->sc_dmamap_control->dm_segs[0].ds_addr
sc 2340 dev/ic/trm.c if (bus_dmamap_create(sc->sc_dmatag, TRM_MAX_PHYSG_BYTE,
sc 2345 dev/ic/trm.c sc->sc_device.dv_xname);
sc 2352 dev/ic/trm.c TAILQ_INSERT_TAIL(&sc->freeSRB, pSRB, link);
sc 2387 dev/ic/trm.c trm_initACB(struct trm_softc *sc, int unit)
sc 2389 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 2390 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 2396 dev/ic/trm.c sc->sc_config = HCC_AUTOTERM | HCC_PARITY;
sc 2399 dev/ic/trm.c sc->sc_config |= HCC_WIDE_CARD;
sc 2402 dev/ic/trm.c sc->sc_config |= HCC_SCSI_RESET;
sc 2404 dev/ic/trm.c TAILQ_INIT(&sc->freeSRB);
sc 2405 dev/ic/trm.c TAILQ_INIT(&sc->waitingSRB);
sc 2406 dev/ic/trm.c TAILQ_INIT(&sc->goingSRB);
sc 2408 dev/ic/trm.c sc->pActiveDCB = NULL;
sc 2409 dev/ic/trm.c sc->sc_AdapterUnit = unit;
sc 2410 dev/ic/trm.c sc->sc_AdaptSCSIID = pEEpromBuf->NvramScsiId;
sc 2411 dev/ic/trm.c sc->sc_TagMaxNum = 2 << pEEpromBuf->NvramMaxTag;
sc 2412 dev/ic/trm.c sc->sc_Flag = 0;
sc 2417 dev/ic/trm.c trm_linkSRB(sc);
sc 2423 dev/ic/trm.c if (target == sc->sc_AdaptSCSIID)
sc 2428 dev/ic/trm.c sc->pDCB[target][lun] = pDCB;
sc 2441 dev/ic/trm.c sc->sc_adapter.scsi_cmd = trm_scsi_cmd;
sc 2442 dev/ic/trm.c sc->sc_adapter.scsi_minphys = trm_minphys;
sc 2444 dev/ic/trm.c sc->sc_link.adapter_softc = sc;
sc 2445 dev/ic/trm.c sc->sc_link.adapter_target = sc->sc_AdaptSCSIID;
sc 2446 dev/ic/trm.c sc->sc_link.openings = 30; /* So TagMask (32 bit integer) always has space */
sc 2447 dev/ic/trm.c sc->sc_link.device = &trm_device;
sc 2448 dev/ic/trm.c sc->sc_link.adapter = &sc->sc_adapter;
sc 2449 dev/ic/trm.c sc->sc_link.adapter_buswidth = ((sc->sc_config & HCC_WIDE_CARD) == 0) ? 8:16;
sc 2451 dev/ic/trm.c trm_reset(sc);
sc 2786 dev/ic/trm.c trm_initAdapter(struct trm_softc *sc)
sc 2788 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 2789 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 2796 dev/ic/trm.c if ((sc->sc_config & HCC_PARITY) != 0) {
sc 2822 dev/ic/trm.c bval = sc->sc_AdaptSCSIID;
sc 2861 dev/ic/trm.c trm_init(struct trm_softc *sc, int unit)
sc 2863 dev/ic/trm.c const bus_space_handle_t ioh = sc->sc_iohandle;
sc 2864 dev/ic/trm.c const bus_space_tag_t iot = sc->sc_iotag;
sc 2881 dev/ic/trm.c error = bus_dmamem_alloc(sc->sc_dmatag, all_srbs_size, NBPG, 0, &seg,
sc 2885 dev/ic/trm.c sc->sc_device.dv_xname, error);
sc 2891 dev/ic/trm.c error = bus_dmamem_map(sc->sc_dmatag, &seg, rseg, all_srbs_size,
sc 2892 dev/ic/trm.c (caddr_t *)&sc->SRB, BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
sc 2895 dev/ic/trm.c sc->sc_device.dv_xname, error);
sc 2900 dev/ic/trm.c error = bus_dmamap_create(sc->sc_dmatag, all_srbs_size, 1,
sc 2901 dev/ic/trm.c all_srbs_size, 0, BUS_DMA_NOWAIT,&sc->sc_dmamap_control);
sc 2904 dev/ic/trm.c sc->sc_device.dv_xname, error);
sc 2909 dev/ic/trm.c error = bus_dmamap_load(sc->sc_dmatag, sc->sc_dmamap_control,
sc 2910 dev/ic/trm.c sc->SRB, all_srbs_size, NULL, BUS_DMA_NOWAIT);
sc 2913 dev/ic/trm.c sc->sc_device.dv_xname, error);
sc 2919 dev/ic/trm.c sc->sc_device.dv_xname, all_srbs_size);
sc 2921 dev/ic/trm.c bzero(sc->SRB, all_srbs_size);
sc 2922 dev/ic/trm.c trm_initACB(sc, unit);
sc 2923 dev/ic/trm.c trm_initAdapter(sc);
sc 2935 dev/ic/trm.c trm_print_info(struct trm_softc *sc, struct trm_dcb *pDCB)
sc 2941 dev/ic/trm.c printf("%s: target %d using ", sc->sc_device.dv_xname, pDCB->target);
sc 77 dev/ic/twe.c static __inline struct twe_ccb *twe_get_ccb(struct twe_softc *sc);
sc 79 dev/ic/twe.c void twe_dispose(struct twe_softc *sc);
sc 83 dev/ic/twe.c int twe_done(struct twe_softc *sc, struct twe_ccb *ccb);
sc 90 dev/ic/twe.c twe_get_ccb(sc)
sc 91 dev/ic/twe.c struct twe_softc *sc;
sc 95 dev/ic/twe.c ccb = TAILQ_LAST(&sc->sc_free_ccb, twe_queue_head);
sc 97 dev/ic/twe.c TAILQ_REMOVE(&sc->sc_free_ccb, ccb, ccb_link);
sc 105 dev/ic/twe.c struct twe_softc *sc = ccb->ccb_sc;
sc 108 dev/ic/twe.c TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, ccb_link);
sc 112 dev/ic/twe.c twe_dispose(sc)
sc 113 dev/ic/twe.c struct twe_softc *sc;
sc 116 dev/ic/twe.c if (sc->sc_cmdmap != NULL) {
sc 117 dev/ic/twe.c bus_dmamap_destroy(sc->dmat, sc->sc_cmdmap);
sc 119 dev/ic/twe.c for (ccb = &sc->sc_ccbs[TWE_MAXCMDS - 1]; ccb >= sc->sc_ccbs; ccb--)
sc 121 dev/ic/twe.c bus_dmamap_destroy(sc->dmat, ccb->ccb_dmamap);
sc 123 dev/ic/twe.c bus_dmamem_unmap(sc->dmat, sc->sc_cmds,
sc 125 dev/ic/twe.c bus_dmamem_free(sc->dmat, sc->sc_cmdseg, 1);
sc 129 dev/ic/twe.c twe_attach(sc)
sc 130 dev/ic/twe.c struct twe_softc *sc;
sc 146 dev/ic/twe.c error = bus_dmamem_alloc(sc->dmat, sizeof(struct twe_cmd) * TWE_MAXCMDS,
sc 147 dev/ic/twe.c PAGE_SIZE, 0, sc->sc_cmdseg, 1, &nseg, BUS_DMA_NOWAIT);
sc 153 dev/ic/twe.c error = bus_dmamem_map(sc->dmat, sc->sc_cmdseg, nseg,
sc 155 dev/ic/twe.c (caddr_t *)&sc->sc_cmds, BUS_DMA_NOWAIT);
sc 158 dev/ic/twe.c bus_dmamem_free(sc->dmat, sc->sc_cmdseg, 1);
sc 162 dev/ic/twe.c error = bus_dmamap_create(sc->dmat,
sc 165 dev/ic/twe.c BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &sc->sc_cmdmap);
sc 168 dev/ic/twe.c twe_dispose(sc);
sc 171 dev/ic/twe.c error = bus_dmamap_load(sc->dmat, sc->sc_cmdmap, sc->sc_cmds,
sc 175 dev/ic/twe.c twe_dispose(sc);
sc 179 dev/ic/twe.c TAILQ_INIT(&sc->sc_ccb2q);
sc 180 dev/ic/twe.c TAILQ_INIT(&sc->sc_ccbq);
sc 181 dev/ic/twe.c TAILQ_INIT(&sc->sc_free_ccb);
sc 182 dev/ic/twe.c TAILQ_INIT(&sc->sc_done_ccb);
sc 184 dev/ic/twe.c lockinit(&sc->sc_lock, PWAIT, "twelk", 0, 0);
sc 186 dev/ic/twe.c pa = sc->sc_cmdmap->dm_segs[0].ds_addr +
sc 188 dev/ic/twe.c for (cmd = (struct twe_cmd *)sc->sc_cmds + TWE_MAXCMDS - 1;
sc 189 dev/ic/twe.c cmd >= (struct twe_cmd *)sc->sc_cmds; cmd--, pa -= sizeof(*cmd)) {
sc 191 dev/ic/twe.c cmd->cmd_index = cmd - (struct twe_cmd *)sc->sc_cmds;
sc 192 dev/ic/twe.c ccb = &sc->sc_ccbs[cmd->cmd_index];
sc 193 dev/ic/twe.c error = bus_dmamap_create(sc->dmat,
sc 198 dev/ic/twe.c twe_dispose(sc);
sc 201 dev/ic/twe.c ccb->ccb_sc = sc;
sc 205 dev/ic/twe.c TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, ccb_link);
sc 216 dev/ic/twe.c status = bus_space_read_4(sc->iot, sc->ioh, TWE_STATUS);
sc 227 dev/ic/twe.c bus_space_write_4(sc->iot, sc->ioh, TWE_CONTROL,
sc 234 dev/ic/twe.c status = bus_space_read_4(sc->iot, sc->ioh, TWE_STATUS);
sc 247 dev/ic/twe.c if ((ccb = twe_get_ccb(sc)) == NULL) {
sc 301 dev/ic/twe.c bus_space_read_4(sc->iot, sc->ioh, TWE_READYQUEUE);
sc 302 dev/ic/twe.c status = bus_space_read_4(sc->iot, sc->ioh, TWE_STATUS);
sc 310 dev/ic/twe.c twe_dispose(sc);
sc 314 dev/ic/twe.c if ((ccb = twe_get_ccb(sc)) == NULL) {
sc 316 dev/ic/twe.c twe_dispose(sc);
sc 334 dev/ic/twe.c twe_dispose(sc);
sc 345 dev/ic/twe.c if ((ccb = twe_get_ccb(sc)) == NULL) {
sc 347 dev/ic/twe.c twe_dispose(sc);
sc 363 dev/ic/twe.c lock = TWE_LOCK(sc);
sc 365 dev/ic/twe.c TWE_UNLOCK(sc, lock);
sc 367 dev/ic/twe.c sc->sc_dev.dv_xname, i);
sc 370 dev/ic/twe.c TWE_UNLOCK(sc, lock);
sc 373 dev/ic/twe.c sc->sc_hdr[i].hd_present = 1;
sc 374 dev/ic/twe.c sc->sc_hdr[i].hd_devtype = 0;
sc 375 dev/ic/twe.c sc->sc_hdr[i].hd_size = letoh32(*(u_int32_t *)cap->data);
sc 377 dev/ic/twe.c i, sc->sc_hdr[i].hd_size));
sc 385 dev/ic/twe.c sc->sc_link.adapter_softc = sc;
sc 386 dev/ic/twe.c sc->sc_link.adapter = &twe_switch;
sc 387 dev/ic/twe.c sc->sc_link.adapter_target = TWE_MAX_UNITS;
sc 388 dev/ic/twe.c sc->sc_link.device = &twe_dev;
sc 389 dev/ic/twe.c sc->sc_link.openings = TWE_MAXCMDS / nunits;
sc 390 dev/ic/twe.c sc->sc_link.adapter_buswidth = TWE_MAX_UNITS;
sc 393 dev/ic/twe.c saa.saa_sc_link = &sc->sc_link;
sc 395 dev/ic/twe.c config_found(&sc->sc_dev, &saa, scsiprint);
sc 397 dev/ic/twe.c kthread_create_deferred(twe_thread_create, sc);
sc 405 dev/ic/twe.c struct twe_softc *sc = v;
sc 407 dev/ic/twe.c if (kthread_create(twe_thread, sc, &sc->sc_thread,
sc 408 dev/ic/twe.c "%s", sc->sc_dev.dv_xname)) {
sc 411 dev/ic/twe.c sc->sc_dev.dv_xname);
sc 416 dev/ic/twe.c bus_space_read_4(sc->iot, sc->ioh, TWE_STATUS), TWE_STAT_BITS));
sc 422 dev/ic/twe.c bus_space_write_4(sc->iot, sc->ioh, TWE_CONTROL,
sc 425 dev/ic/twe.c bus_space_read_4(sc->iot, sc->ioh, TWE_STATUS), TWE_STAT_BITS));
sc 427 dev/ic/twe.c bus_space_write_4(sc->iot, sc->ioh, TWE_CONTROL,
sc 436 dev/ic/twe.c struct twe_softc *sc = v;
sc 444 dev/ic/twe.c lock = TWE_LOCK(sc);
sc 446 dev/ic/twe.c while (!TAILQ_EMPTY(&sc->sc_done_ccb)) {
sc 447 dev/ic/twe.c ccb = TAILQ_FIRST(&sc->sc_done_ccb);
sc 448 dev/ic/twe.c TAILQ_REMOVE(&sc->sc_done_ccb, ccb, ccb_link);
sc 449 dev/ic/twe.c if ((err = twe_done(sc, ccb)))
sc 451 dev/ic/twe.c sc->sc_dev.dv_xname, err);
sc 454 dev/ic/twe.c status = bus_space_read_4(sc->iot, sc->ioh, TWE_STATUS);
sc 458 dev/ic/twe.c !TAILQ_EMPTY(&sc->sc_ccb2q)) {
sc 460 dev/ic/twe.c ccb = TAILQ_LAST(&sc->sc_ccb2q, twe_queue_head);
sc 461 dev/ic/twe.c TAILQ_REMOVE(&sc->sc_ccb2q, ccb, ccb_link);
sc 464 dev/ic/twe.c TAILQ_INSERT_TAIL(&sc->sc_ccbq, ccb, ccb_link);
sc 465 dev/ic/twe.c bus_space_write_4(sc->iot, sc->ioh, TWE_COMMANDQUEUE,
sc 468 dev/ic/twe.c status = bus_space_read_4(sc->iot, sc->ioh, TWE_STATUS);
sc 473 dev/ic/twe.c if (!TAILQ_EMPTY(&sc->sc_ccb2q))
sc 474 dev/ic/twe.c bus_space_write_4(sc->iot, sc->ioh, TWE_CONTROL,
sc 477 dev/ic/twe.c TWE_UNLOCK(sc, lock);
sc 478 dev/ic/twe.c sc->sc_thread_on = 1;
sc 479 dev/ic/twe.c tsleep(sc, PWAIT, "twespank", 0);
sc 488 dev/ic/twe.c struct twe_softc *sc = ccb->ccb_sc;
sc 498 dev/ic/twe.c error = bus_dmamem_alloc(sc->dmat, ccb->ccb_length, PAGE_SIZE,
sc 507 dev/ic/twe.c error = bus_dmamem_map(sc->dmat, ccb->ccb_2bseg, ccb->ccb_2nseg,
sc 511 dev/ic/twe.c bus_dmamem_free(sc->dmat, ccb->ccb_2bseg, ccb->ccb_2nseg);
sc 524 dev/ic/twe.c error = bus_dmamap_load(sc->dmat, dmap, ccb->ccb_data,
sc 533 dev/ic/twe.c bus_dmamem_unmap(sc->dmat, ccb->ccb_data,
sc 535 dev/ic/twe.c bus_dmamem_free(sc->dmat, ccb->ccb_2bseg,
sc 575 dev/ic/twe.c bus_dmamap_sync(sc->dmat, dmap, 0, dmap->dm_mapsize,
sc 578 dev/ic/twe.c bus_dmamap_sync(sc->dmat, sc->sc_cmdmap, 0, sc->sc_cmdmap->dm_mapsize,
sc 582 dev/ic/twe.c bus_dmamap_unload(sc->dmat, dmap);
sc 584 dev/ic/twe.c bus_dmamem_unmap(sc->dmat, ccb->ccb_data,
sc 586 dev/ic/twe.c bus_dmamem_free(sc->dmat, ccb->ccb_2bseg,
sc 601 dev/ic/twe.c struct twe_softc*sc = ccb->ccb_sc;
sc 612 dev/ic/twe.c TAILQ_INSERT_TAIL(&sc->sc_ccb2q, ccb, ccb_link);
sc 613 dev/ic/twe.c wakeup(sc);
sc 619 dev/ic/twe.c status = bus_space_read_4(sc->iot, sc->ioh, TWE_STATUS);
sc 627 dev/ic/twe.c bus_space_write_4(sc->iot, sc->ioh, TWE_COMMANDQUEUE,
sc 632 dev/ic/twe.c TAILQ_INSERT_TAIL(&sc->sc_ccbq, ccb, ccb_link);
sc 638 dev/ic/twe.c sc->sc_dev.dv_xname, cmd->cmd_index);
sc 648 dev/ic/twe.c struct twe_softc *sc = ccb->ccb_sc;
sc 653 dev/ic/twe.c u_int32_t status = bus_space_read_4(sc->iot, sc->ioh, TWE_STATUS);
sc 662 dev/ic/twe.c ready = bus_space_read_4(sc->iot, sc->ioh,
sc 667 dev/ic/twe.c ccb1 = &sc->sc_ccbs[TWE_READYID(ready)];
sc 668 dev/ic/twe.c TAILQ_REMOVE(&sc->sc_ccbq, ccb1, ccb_link);
sc 670 dev/ic/twe.c if (!twe_done(sc, ccb1) && ccb1 == ccb) {
sc 675 dev/ic/twe.c status = bus_space_read_4(sc->iot, sc->ioh, TWE_STATUS);
sc 685 dev/ic/twe.c twe_done(sc, ccb)
sc 686 dev/ic/twe.c struct twe_softc *sc;
sc 698 dev/ic/twe.c sc->sc_dev.dv_xname, cmd->cmd_index);
sc 706 dev/ic/twe.c bus_dmamap_sync(sc->dmat, dmap, 0,
sc 709 dev/ic/twe.c bus_dmamap_unload(sc->dmat, dmap);
sc 715 dev/ic/twe.c bus_dmamap_sync(sc->dmat, dmap, 0,
sc 717 dev/ic/twe.c bus_dmamap_unload(sc->dmat, dmap);
sc 721 dev/ic/twe.c bus_dmamap_sync(sc->dmat, dmap, 0,
sc 723 dev/ic/twe.c bus_dmamap_unload(sc->dmat, dmap);
sc 733 dev/ic/twe.c bus_dmamem_unmap(sc->dmat, ccb->ccb_data, ccb->ccb_length);
sc 734 dev/ic/twe.c bus_dmamem_free(sc->dmat, ccb->ccb_2bseg, ccb->ccb_2nseg);
sc 737 dev/ic/twe.c lock = TWE_LOCK(sc);
sc 745 dev/ic/twe.c TWE_UNLOCK(sc, lock);
sc 782 dev/ic/twe.c struct twe_softc *sc = link->adapter_softc;
sc 796 dev/ic/twe.c if (target >= TWE_MAX_UNITS || !sc->sc_hdr[target].hd_present ||
sc 829 dev/ic/twe.c sc->sc_hdr[target].hd_devtype));
sc 832 dev/ic/twe.c (sc->sc_hdr[target].hd_devtype & 4) ? T_CDROM : T_DIRECT;
sc 834 dev/ic/twe.c (sc->sc_hdr[target].hd_devtype & 1) ? SID_REMOVABLE : 0;
sc 848 dev/ic/twe.c _lto4b(sc->sc_hdr[target].hd_size - 1, rcd.addr);
sc 862 dev/ic/twe.c lock = TWE_LOCK(sc);
sc 881 dev/ic/twe.c if (blockno >= sc->sc_hdr[target].hd_size ||
sc 882 dev/ic/twe.c blockno + blockcnt > sc->sc_hdr[target].hd_size) {
sc 884 dev/ic/twe.c sc->sc_dev.dv_xname, blockno, blockcnt,
sc 885 dev/ic/twe.c sc->sc_hdr[target].hd_size);
sc 888 dev/ic/twe.c TWE_UNLOCK(sc, lock);
sc 901 dev/ic/twe.c if ((ccb = twe_get_ccb(sc)) == NULL) {
sc 904 dev/ic/twe.c TWE_UNLOCK(sc, lock);
sc 919 dev/ic/twe.c if (!sc->sc_thread_on)
sc 925 dev/ic/twe.c TWE_UNLOCK(sc, lock);
sc 936 dev/ic/twe.c TWE_UNLOCK(sc, lock);
sc 956 dev/ic/twe.c struct twe_softc *sc = v;
sc 963 dev/ic/twe.c status = bus_space_read_4(sc->iot, sc->ioh, TWE_STATUS);
sc 969 dev/ic/twe.c bus_space_write_4(sc->iot, sc->ioh, TWE_CONTROL,
sc 986 dev/ic/twe.c ready = bus_space_read_4(sc->iot, sc->ioh,
sc 989 dev/ic/twe.c ccb = &sc->sc_ccbs[TWE_READYID(ready)];
sc 990 dev/ic/twe.c TAILQ_REMOVE(&sc->sc_ccbq, ccb, ccb_link);
sc 992 dev/ic/twe.c TAILQ_INSERT_TAIL(&sc->sc_done_ccb, ccb, ccb_link);
sc 995 dev/ic/twe.c status = bus_space_read_4(sc->iot, sc->ioh, TWE_STATUS);
sc 1003 dev/ic/twe.c bus_space_write_4(sc->iot, sc->ioh, TWE_CONTROL,
sc 1008 dev/ic/twe.c wakeup(sc);
sc 1019 dev/ic/twe.c bus_space_write_4(sc->iot, sc->ioh, TWE_CONTROL,
sc 1022 dev/ic/twe.c lock = TWE_LOCK(sc);
sc 1028 dev/ic/twe.c if ((ccb = twe_get_ccb(sc)) == NULL)
sc 1051 dev/ic/twe.c TWE_UNLOCK(sc, lock);
sc 83 dev/ic/twevar.h #define TWE_LOCK(sc) splbio()
sc 84 dev/ic/twevar.h #define TWE_UNLOCK(sc, lock) splx(lock)
sc 136 dev/ic/uha.c uha_attach(sc)
sc 137 dev/ic/uha.c struct uha_softc *sc;
sc 141 dev/ic/uha.c (sc->init)(sc);
sc 142 dev/ic/uha.c TAILQ_INIT(&sc->sc_free_mscp);
sc 147 dev/ic/uha.c sc->sc_link.adapter_softc = sc;
sc 148 dev/ic/uha.c sc->sc_link.adapter_target = sc->sc_scsi_dev;
sc 149 dev/ic/uha.c sc->sc_link.adapter = &uha_switch;
sc 150 dev/ic/uha.c sc->sc_link.device = &uha_dev;
sc 151 dev/ic/uha.c sc->sc_link.openings = 2;
sc 154 dev/ic/uha.c saa.saa_sc_link = &sc->sc_link;
sc 159 dev/ic/uha.c config_found(&sc->sc_dev, &saa, uhaprint);
sc 163 dev/ic/uha.c uha_reset_mscp(sc, mscp)
sc 164 dev/ic/uha.c struct uha_softc *sc;
sc 175 dev/ic/uha.c uha_free_mscp(sc, mscp)
sc 176 dev/ic/uha.c struct uha_softc *sc;
sc 183 dev/ic/uha.c uha_reset_mscp(sc, mscp);
sc 184 dev/ic/uha.c TAILQ_INSERT_HEAD(&sc->sc_free_mscp, mscp, chain);
sc 191 dev/ic/uha.c wakeup(&sc->sc_free_mscp);
sc 197 dev/ic/uha.c uha_init_mscp(sc, mscp)
sc 198 dev/ic/uha.c struct uha_softc *sc;
sc 210 dev/ic/uha.c mscp->nexthash = sc->sc_mscphash[hashnum];
sc 211 dev/ic/uha.c sc->sc_mscphash[hashnum] = mscp;
sc 212 dev/ic/uha.c uha_reset_mscp(sc, mscp);
sc 222 dev/ic/uha.c uha_get_mscp(sc, flags)
sc 223 dev/ic/uha.c struct uha_softc *sc;
sc 236 dev/ic/uha.c mscp = TAILQ_FIRST(&sc->sc_free_mscp);
sc 238 dev/ic/uha.c TAILQ_REMOVE(&sc->sc_free_mscp, mscp, chain);
sc 241 dev/ic/uha.c if (sc->sc_nummscps < UHA_MSCP_MAX) {
sc 246 dev/ic/uha.c sc->sc_dev.dv_xname);
sc 249 dev/ic/uha.c uha_init_mscp(sc, mscp);
sc 250 dev/ic/uha.c sc->sc_nummscps++;
sc 255 dev/ic/uha.c tsleep(&sc->sc_free_mscp, PRIBIO, "uhamsc", 0);
sc 269 dev/ic/uha.c uha_mscp_phys_kv(sc, mscp_phys)
sc 270 dev/ic/uha.c struct uha_softc *sc;
sc 274 dev/ic/uha.c struct uha_mscp *mscp = sc->sc_mscphash[hashnum];
sc 289 dev/ic/uha.c uha_done(sc, mscp)
sc 290 dev/ic/uha.c struct uha_softc *sc;
sc 302 dev/ic/uha.c printf("%s: exiting ccb not allocated!\n", sc->sc_dev.dv_xname);
sc 314 dev/ic/uha.c sc->sc_dev.dv_xname, mscp->host_stat);
sc 330 dev/ic/uha.c sc->sc_dev.dv_xname, mscp->target_stat);
sc 336 dev/ic/uha.c uha_free_mscp(sc, mscp);
sc 360 dev/ic/uha.c struct uha_softc *sc = sc_link->adapter_softc;
sc 375 dev/ic/uha.c if ((mscp = uha_get_mscp(sc, flags)) == NULL) {
sc 484 dev/ic/uha.c sc->sc_dev.dv_xname, UHA_NSEG);
sc 501 dev/ic/uha.c (sc->start_mbox)(sc, mscp);
sc 513 dev/ic/uha.c if ((sc->poll)(sc, xs, mscp->timeout)) {
sc 515 dev/ic/uha.c if ((sc->poll)(sc, xs, mscp->timeout))
sc 522 dev/ic/uha.c uha_free_mscp(sc, mscp);
sc 533 dev/ic/uha.c struct uha_softc *sc = sc_link->adapter_softc;
sc 551 dev/ic/uha.c (sc->start_mbox)(sc, mscp);
sc 628 dev/ic/wdc.c u_int8_t st0, st1, sc, sn, cl, ch;
sc 694 dev/ic/wdc.c sc = CHP_READ_REG(chp, wdr_seccnt);
sc 703 dev/ic/wdc.c chp->channel, drive, st0, WDCS_BITS, sc, sn, cl, ch),
sc 204 dev/ic/xl.c struct xl_softc *sc = arg;
sc 210 dev/ic/xl.c xl_stop(sc);
sc 212 dev/ic/xl.c ifp = &sc->sc_arpcom.ac_if;
sc 214 dev/ic/xl.c xl_reset(sc);
sc 215 dev/ic/xl.c xl_init(sc);
sc 230 dev/ic/xl.c xl_wait(struct xl_softc *sc)
sc 235 dev/ic/xl.c if (!(CSR_READ_2(sc, XL_STATUS) & XL_STAT_CMDBUSY))
sc 240 dev/ic/xl.c printf("%s: command never completed!\n", sc->sc_dev.dv_xname);
sc 253 dev/ic/xl.c CSR_WRITE_2(sc, XL_W4_PHY_MGMT, \
sc 254 dev/ic/xl.c CSR_READ_2(sc, XL_W4_PHY_MGMT) | (x))
sc 257 dev/ic/xl.c CSR_WRITE_2(sc, XL_W4_PHY_MGMT, \
sc 258 dev/ic/xl.c CSR_READ_2(sc, XL_W4_PHY_MGMT) & ~(x))
sc 264 dev/ic/xl.c xl_mii_sync(struct xl_softc *sc)
sc 285 dev/ic/xl.c xl_mii_send(struct xl_softc *sc, u_int32_t bits, int cnt)
sc 307 dev/ic/xl.c xl_mii_readreg(struct xl_softc *sc, struct xl_mii_frame *frame)
sc 327 dev/ic/xl.c CSR_WRITE_2(sc, XL_W4_PHY_MGMT, 0);
sc 333 dev/ic/xl.c xl_mii_sync(sc);
sc 338 dev/ic/xl.c xl_mii_send(sc, frame->mii_stdelim, 2);
sc 339 dev/ic/xl.c xl_mii_send(sc, frame->mii_opcode, 2);
sc 340 dev/ic/xl.c xl_mii_send(sc, frame->mii_phyaddr, 5);
sc 341 dev/ic/xl.c xl_mii_send(sc, frame->mii_regaddr, 5);
sc 352 dev/ic/xl.c ack = CSR_READ_2(sc, XL_W4_PHY_MGMT) & XL_MII_DATA;
sc 370 dev/ic/xl.c if (CSR_READ_2(sc, XL_W4_PHY_MGMT) & XL_MII_DATA)
sc 392 dev/ic/xl.c xl_mii_writereg(struct xl_softc *sc, struct xl_mii_frame *frame)
sc 416 dev/ic/xl.c xl_mii_sync(sc);
sc 418 dev/ic/xl.c xl_mii_send(sc, frame->mii_stdelim, 2);
sc 419 dev/ic/xl.c xl_mii_send(sc, frame->mii_opcode, 2);
sc 420 dev/ic/xl.c xl_mii_send(sc, frame->mii_phyaddr, 5);
sc 421 dev/ic/xl.c xl_mii_send(sc, frame->mii_regaddr, 5);
sc 422 dev/ic/xl.c xl_mii_send(sc, frame->mii_turnaround, 2);
sc 423 dev/ic/xl.c xl_mii_send(sc, frame->mii_data, 16);
sc 442 dev/ic/xl.c struct xl_softc *sc = (struct xl_softc *)self;
sc 445 dev/ic/xl.c if (!(sc->xl_flags & XL_FLAG_PHYOK) && phy != 24)
sc 452 dev/ic/xl.c xl_mii_readreg(sc, &frame);
sc 460 dev/ic/xl.c struct xl_softc *sc = (struct xl_softc *)self;
sc 463 dev/ic/xl.c if (!(sc->xl_flags & XL_FLAG_PHYOK) && phy != 24)
sc 472 dev/ic/xl.c xl_mii_writereg(sc, &frame);
sc 478 dev/ic/xl.c struct xl_softc *sc = (struct xl_softc *)self;
sc 480 dev/ic/xl.c xl_setcfg(sc);
sc 484 dev/ic/xl.c if ((sc->sc_mii.mii_media_active & IFM_GMASK) == IFM_FDX)
sc 485 dev/ic/xl.c CSR_WRITE_1(sc, XL_W3_MAC_CTRL, XL_MACCTRL_DUPLEX);
sc 487 dev/ic/xl.c CSR_WRITE_1(sc, XL_W3_MAC_CTRL,
sc 488 dev/ic/xl.c (CSR_READ_1(sc, XL_W3_MAC_CTRL) & ~XL_MACCTRL_DUPLEX));
sc 496 dev/ic/xl.c xl_eeprom_wait(struct xl_softc *sc)
sc 501 dev/ic/xl.c if (CSR_READ_2(sc, XL_W0_EE_CMD) & XL_EE_BUSY)
sc 508 dev/ic/xl.c printf("%s: eeprom failed to come ready\n", sc->sc_dev.dv_xname);
sc 520 dev/ic/xl.c xl_read_eeprom(struct xl_softc *sc, caddr_t dest, int off, int cnt, int swap)
sc 532 dev/ic/xl.c if (xl_eeprom_wait(sc))
sc 535 dev/ic/xl.c if (sc->xl_flags & XL_FLAG_EEPROM_OFFSET_30)
sc 539 dev/ic/xl.c if (sc->xl_flags & XL_FLAG_8BITROM)
sc 540 dev/ic/xl.c CSR_WRITE_2(sc, XL_W0_EE_CMD,
sc 543 dev/ic/xl.c CSR_WRITE_2(sc, XL_W0_EE_CMD,
sc 545 dev/ic/xl.c err = xl_eeprom_wait(sc);
sc 548 dev/ic/xl.c word = CSR_READ_2(sc, XL_W0_EE_DATA);
sc 564 dev/ic/xl.c xl_setmulti(struct xl_softc *sc)
sc 567 dev/ic/xl.c struct arpcom *ac = &sc->sc_arpcom;
sc 570 dev/ic/xl.c ifp = &sc->sc_arpcom.ac_if;
sc 573 dev/ic/xl.c rxfilt = CSR_READ_1(sc, XL_W5_RX_FILTER);
sc 577 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_FILT|rxfilt);
sc 586 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_FILT|rxfilt);
sc 593 dev/ic/xl.c xl_setmulti_hash(struct xl_softc *sc)
sc 597 dev/ic/xl.c struct arpcom *ac = &sc->sc_arpcom;
sc 603 dev/ic/xl.c ifp = &sc->sc_arpcom.ac_if;
sc 606 dev/ic/xl.c rxfilt = CSR_READ_1(sc, XL_W5_RX_FILTER);
sc 611 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_FILT|rxfilt);
sc 619 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_HASH|i);
sc 630 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_HASH|XL_HASH_SET|h);
sc 640 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_FILT|rxfilt);
sc 644 dev/ic/xl.c xl_setpromisc(struct xl_softc *sc)
sc 649 dev/ic/xl.c ifp = &sc->sc_arpcom.ac_if;
sc 652 dev/ic/xl.c rxfilt = CSR_READ_1(sc, XL_W5_RX_FILTER);
sc 659 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_FILT|rxfilt);
sc 665 dev/ic/xl.c xl_testpacket(struct xl_softc *sc)
sc 671 dev/ic/xl.c ifp = &sc->sc_arpcom.ac_if;
sc 678 dev/ic/xl.c bcopy(&sc->sc_arpcom.ac_enaddr,
sc 680 dev/ic/xl.c bcopy(&sc->sc_arpcom.ac_enaddr,
sc 693 dev/ic/xl.c xl_setcfg(struct xl_softc *sc)
sc 698 dev/ic/xl.c icfg = CSR_READ_4(sc, XL_W3_INTERNAL_CFG);
sc 700 dev/ic/xl.c if (sc->xl_media & XL_MEDIAOPT_MII ||
sc 701 dev/ic/xl.c sc->xl_media & XL_MEDIAOPT_BT4)
sc 703 dev/ic/xl.c if (sc->xl_media & XL_MEDIAOPT_BTX)
sc 706 dev/ic/xl.c CSR_WRITE_4(sc, XL_W3_INTERNAL_CFG, icfg);
sc 707 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_STOP);
sc 711 dev/ic/xl.c xl_setmode(struct xl_softc *sc, int media)
sc 713 dev/ic/xl.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 718 dev/ic/xl.c mediastat = CSR_READ_2(sc, XL_W4_MEDIA_STATUS);
sc 720 dev/ic/xl.c icfg = CSR_READ_4(sc, XL_W3_INTERNAL_CFG);
sc 722 dev/ic/xl.c if (sc->xl_media & XL_MEDIAOPT_BT) {
sc 725 dev/ic/xl.c sc->xl_xcvr = XL_XCVR_10BT;
sc 734 dev/ic/xl.c if (sc->xl_media & XL_MEDIAOPT_BFX) {
sc 737 dev/ic/xl.c sc->xl_xcvr = XL_XCVR_100BFX;
sc 745 dev/ic/xl.c if (sc->xl_media & (XL_MEDIAOPT_AUI|XL_MEDIAOPT_10FL)) {
sc 748 dev/ic/xl.c sc->xl_xcvr = XL_XCVR_AUI;
sc 757 dev/ic/xl.c sc->xl_xcvr = XL_XCVR_AUI;
sc 766 dev/ic/xl.c if (sc->xl_media & XL_MEDIAOPT_BNC) {
sc 769 dev/ic/xl.c sc->xl_xcvr = XL_XCVR_COAX;
sc 781 dev/ic/xl.c CSR_WRITE_1(sc, XL_W3_MAC_CTRL, XL_MACCTRL_DUPLEX);
sc 784 dev/ic/xl.c CSR_WRITE_1(sc, XL_W3_MAC_CTRL,
sc 785 dev/ic/xl.c (CSR_READ_1(sc, XL_W3_MAC_CTRL) & ~XL_MACCTRL_DUPLEX));
sc 789 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_START);
sc 791 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_STOP);
sc 792 dev/ic/xl.c CSR_WRITE_4(sc, XL_W3_INTERNAL_CFG, icfg);
sc 794 dev/ic/xl.c CSR_WRITE_2(sc, XL_W4_MEDIA_STATUS, mediastat);
sc 800 dev/ic/xl.c xl_reset(struct xl_softc *sc)
sc 805 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RESET |
sc 806 dev/ic/xl.c ((sc->xl_flags & XL_FLAG_WEIRDRESET) ?
sc 819 dev/ic/xl.c if (!(CSR_READ_2(sc, XL_STATUS) & XL_STAT_CMDBUSY))
sc 824 dev/ic/xl.c printf("%s: reset didn't complete\n", sc->sc_dev.dv_xname);
sc 832 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_RESET);
sc 834 dev/ic/xl.c xl_wait(sc);
sc 835 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_RESET);
sc 836 dev/ic/xl.c xl_wait(sc);
sc 838 dev/ic/xl.c if (sc->xl_flags & XL_FLAG_INVERT_LED_PWR ||
sc 839 dev/ic/xl.c sc->xl_flags & XL_FLAG_INVERT_MII_PWR) {
sc 841 dev/ic/xl.c CSR_WRITE_2(sc, XL_W2_RESET_OPTIONS, CSR_READ_2(sc,
sc 843 dev/ic/xl.c | ((sc->xl_flags & XL_FLAG_INVERT_LED_PWR)?XL_RESETOPT_INVERT_LED:0)
sc 844 dev/ic/xl.c | ((sc->xl_flags & XL_FLAG_INVERT_MII_PWR)?XL_RESETOPT_INVERT_MII:0)
sc 865 dev/ic/xl.c xl_mediacheck(struct xl_softc *sc)
sc 873 dev/ic/xl.c if (sc->xl_media & (XL_MEDIAOPT_MASK & ~XL_MEDIAOPT_VCO)) {
sc 878 dev/ic/xl.c if (sc->xl_xcvr <= XL_XCVR_AUTO)
sc 882 dev/ic/xl.c "in EEPROM (%x)\n", sc->sc_dev.dv_xname, sc->xl_xcvr);
sc 884 dev/ic/xl.c "on card type\n", sc->sc_dev.dv_xname);
sc 887 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B &&
sc 888 dev/ic/xl.c sc->xl_media & XL_MEDIAOPT_10FL)
sc 891 dev/ic/xl.c "the media options register!!\n", sc->sc_dev.dv_xname);
sc 893 dev/ic/xl.c "your adapter or system\n", sc->sc_dev.dv_xname);
sc 895 dev/ic/xl.c "should probably consult your vendor\n", sc->sc_dev.dv_xname);
sc 898 dev/ic/xl.c xl_choose_xcvr(sc, 1);
sc 902 dev/ic/xl.c xl_choose_xcvr(struct xl_softc *sc, int verbose)
sc 911 dev/ic/xl.c xl_read_eeprom(sc, (caddr_t)&devid, XL_EE_PRODID, 1, 0);
sc 916 dev/ic/xl.c sc->xl_media = XL_MEDIAOPT_BT;
sc 917 dev/ic/xl.c sc->xl_xcvr = XL_XCVR_10BT;
sc 920 dev/ic/xl.c sc->sc_dev.dv_xname);
sc 924 dev/ic/xl.c sc->xl_media = XL_MEDIAOPT_BT|XL_MEDIAOPT_BNC|XL_MEDIAOPT_AUI;
sc 925 dev/ic/xl.c sc->xl_xcvr = XL_XCVR_10BT;
sc 928 dev/ic/xl.c sc->sc_dev.dv_xname);
sc 931 dev/ic/xl.c sc->xl_media = XL_MEDIAOPT_BT|XL_MEDIAOPT_BNC;
sc 932 dev/ic/xl.c sc->xl_xcvr = XL_XCVR_10BT;
sc 934 dev/ic/xl.c printf("%s: guessing TPC (BNC/TP)\n", sc->sc_dev.dv_xname);
sc 937 dev/ic/xl.c sc->xl_media = XL_MEDIAOPT_10FL;
sc 938 dev/ic/xl.c sc->xl_xcvr = XL_XCVR_AUI;
sc 940 dev/ic/xl.c printf("%s: guessing 10baseFL\n", sc->sc_dev.dv_xname);
sc 953 dev/ic/xl.c sc->xl_media = XL_MEDIAOPT_MII;
sc 954 dev/ic/xl.c sc->xl_xcvr = XL_XCVR_MII;
sc 956 dev/ic/xl.c printf("%s: guessing MII\n", sc->sc_dev.dv_xname);
sc 960 dev/ic/xl.c sc->xl_media = XL_MEDIAOPT_BT4;
sc 961 dev/ic/xl.c sc->xl_xcvr = XL_XCVR_MII;
sc 963 dev/ic/xl.c printf("%s: guessing 100BaseT4/MII\n", sc->sc_dev.dv_xname);
sc 971 dev/ic/xl.c sc->xl_media = XL_MEDIAOPT_BTX;
sc 972 dev/ic/xl.c sc->xl_xcvr = XL_XCVR_AUTO;
sc 975 dev/ic/xl.c sc->sc_dev.dv_xname);
sc 978 dev/ic/xl.c sc->xl_media = XL_MEDIAOPT_BTX|XL_MEDIAOPT_BNC|XL_MEDIAOPT_AUI;
sc 979 dev/ic/xl.c sc->xl_xcvr = XL_XCVR_AUTO;
sc 982 dev/ic/xl.c sc->sc_dev.dv_xname);
sc 986 dev/ic/xl.c "defaulting to 10baseT\n", sc->sc_dev.dv_xname, devid);
sc 987 dev/ic/xl.c sc->xl_media = XL_MEDIAOPT_BT;
sc 996 dev/ic/xl.c xl_list_tx_init(struct xl_softc *sc)
sc 1002 dev/ic/xl.c cd = &sc->xl_cdata;
sc 1003 dev/ic/xl.c ld = sc->xl_ldata;
sc 1022 dev/ic/xl.c xl_list_tx_init_90xB(struct xl_softc *sc)
sc 1028 dev/ic/xl.c cd = &sc->xl_cdata;
sc 1029 dev/ic/xl.c ld = sc->xl_ldata;
sc 1041 dev/ic/xl.c sc->sc_listmap->dm_segs[0].ds_addr +
sc 1063 dev/ic/xl.c xl_list_rx_init(struct xl_softc *sc)
sc 1070 dev/ic/xl.c cd = &sc->xl_cdata;
sc 1071 dev/ic/xl.c ld = sc->xl_ldata;
sc 1076 dev/ic/xl.c if (xl_newbuf(sc, &cd->xl_rx_chain[i]) == ENOBUFS)
sc 1083 dev/ic/xl.c next = sc->sc_listmap->dm_segs[0].ds_addr +
sc 1097 dev/ic/xl.c xl_newbuf(struct xl_softc *sc, struct xl_chain_onefrag *c)
sc 1113 dev/ic/xl.c if (bus_dmamap_load(sc->sc_dmat, sc->sc_rx_sparemap,
sc 1121 dev/ic/xl.c bus_dmamap_sync(sc->sc_dmat, c->map,
sc 1123 dev/ic/xl.c bus_dmamap_unload(sc->sc_dmat, c->map);
sc 1127 dev/ic/xl.c c->map = sc->sc_rx_sparemap;
sc 1128 dev/ic/xl.c sc->sc_rx_sparemap = map;
sc 1133 dev/ic/xl.c bus_dmamap_sync(sc->sc_dmat, c->map, 0, c->map->dm_mapsize,
sc 1143 dev/ic/xl.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 1144 dev/ic/xl.c ((caddr_t)c->xl_ptr - sc->sc_listkva), sizeof(struct xl_list),
sc 1151 dev/ic/xl.c xl_rx_resync(struct xl_softc *sc)
sc 1156 dev/ic/xl.c pos = sc->xl_cdata.xl_rx_head;
sc 1159 dev/ic/xl.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 1160 dev/ic/xl.c ((caddr_t)pos->xl_ptr - sc->sc_listkva),
sc 1172 dev/ic/xl.c sc->xl_cdata.xl_rx_head = pos;
sc 1182 dev/ic/xl.c xl_rxeof(struct xl_softc *sc)
sc 1190 dev/ic/xl.c ifp = &sc->sc_arpcom.ac_if;
sc 1194 dev/ic/xl.c while ((rxstat = letoh32(sc->xl_cdata.xl_rx_head->xl_ptr->xl_status))
sc 1196 dev/ic/xl.c cur_rx = sc->xl_cdata.xl_rx_head;
sc 1197 dev/ic/xl.c sc->xl_cdata.xl_rx_head = cur_rx->xl_next;
sc 1200 dev/ic/xl.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 1201 dev/ic/xl.c ((caddr_t)cur_rx->xl_ptr - sc->sc_listkva),
sc 1233 dev/ic/xl.c "packet dropped\n", sc->sc_dev.dv_xname);
sc 1249 dev/ic/xl.c if (xl_newbuf(sc, cur_rx) == ENOBUFS) {
sc 1267 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B) {
sc 1298 dev/ic/xl.c if (CSR_READ_4(sc, XL_UPLIST_PTR) == 0 ||
sc 1299 dev/ic/xl.c CSR_READ_4(sc, XL_UPLIST_STATUS) & XL_PKTSTAT_UP_STALLED) {
sc 1300 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_UP_STALL);
sc 1301 dev/ic/xl.c xl_wait(sc);
sc 1302 dev/ic/xl.c CSR_WRITE_4(sc, XL_UPLIST_PTR,
sc 1303 dev/ic/xl.c sc->sc_listmap->dm_segs[0].ds_addr +
sc 1305 dev/ic/xl.c sc->xl_cdata.xl_rx_head = &sc->xl_cdata.xl_rx_chain[0];
sc 1306 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_UP_UNSTALL);
sc 1316 dev/ic/xl.c xl_txeof(struct xl_softc *sc)
sc 1321 dev/ic/xl.c ifp = &sc->sc_arpcom.ac_if;
sc 1335 dev/ic/xl.c while (sc->xl_cdata.xl_tx_head != NULL) {
sc 1336 dev/ic/xl.c cur_tx = sc->xl_cdata.xl_tx_head;
sc 1338 dev/ic/xl.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 1339 dev/ic/xl.c ((caddr_t)cur_tx->xl_ptr - sc->sc_listkva),
sc 1343 dev/ic/xl.c if (CSR_READ_4(sc, XL_DOWNLIST_PTR))
sc 1346 dev/ic/xl.c sc->xl_cdata.xl_tx_head = cur_tx->xl_next;
sc 1351 dev/ic/xl.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 1353 dev/ic/xl.c bus_dmamap_unload(sc->sc_dmat, map);
sc 1359 dev/ic/xl.c cur_tx->xl_next = sc->xl_cdata.xl_tx_free;
sc 1360 dev/ic/xl.c sc->xl_cdata.xl_tx_free = cur_tx;
sc 1363 dev/ic/xl.c if (sc->xl_cdata.xl_tx_head == NULL) {
sc 1365 dev/ic/xl.c sc->xl_cdata.xl_tx_tail = NULL;
sc 1367 dev/ic/xl.c if (CSR_READ_4(sc, XL_DMACTL) & XL_DMACTL_DOWN_STALLED ||
sc 1368 dev/ic/xl.c !CSR_READ_4(sc, XL_DOWNLIST_PTR)) {
sc 1369 dev/ic/xl.c CSR_WRITE_4(sc, XL_DOWNLIST_PTR,
sc 1370 dev/ic/xl.c sc->sc_listmap->dm_segs[0].ds_addr +
sc 1371 dev/ic/xl.c ((caddr_t)sc->xl_cdata.xl_tx_head->xl_ptr -
sc 1372 dev/ic/xl.c sc->sc_listkva));
sc 1373 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_DOWN_UNSTALL);
sc 1379 dev/ic/xl.c xl_txeof_90xB(struct xl_softc *sc)
sc 1385 dev/ic/xl.c ifp = &sc->sc_arpcom.ac_if;
sc 1387 dev/ic/xl.c idx = sc->xl_cdata.xl_tx_cons;
sc 1388 dev/ic/xl.c while (idx != sc->xl_cdata.xl_tx_prod) {
sc 1390 dev/ic/xl.c cur_tx = &sc->xl_cdata.xl_tx_chain[idx];
sc 1402 dev/ic/xl.c bus_dmamap_sync(sc->sc_dmat, cur_tx->map,
sc 1404 dev/ic/xl.c bus_dmamap_unload(sc->sc_dmat, cur_tx->map);
sc 1409 dev/ic/xl.c sc->xl_cdata.xl_tx_cnt--;
sc 1414 dev/ic/xl.c sc->xl_cdata.xl_tx_cons = idx;
sc 1426 dev/ic/xl.c xl_txeoc(struct xl_softc *sc)
sc 1430 dev/ic/xl.c while ((txstat = CSR_READ_1(sc, XL_TX_STATUS))) {
sc 1436 dev/ic/xl.c sc->sc_dev.dv_xname, txstat);
sc 1438 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_RESET);
sc 1439 dev/ic/xl.c xl_wait(sc);
sc 1440 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B) {
sc 1441 dev/ic/xl.c if (sc->xl_cdata.xl_tx_cnt) {
sc 1445 dev/ic/xl.c i = sc->xl_cdata.xl_tx_cons;
sc 1446 dev/ic/xl.c c = &sc->xl_cdata.xl_tx_chain[i];
sc 1447 dev/ic/xl.c CSR_WRITE_4(sc, XL_DOWNLIST_PTR,
sc 1449 dev/ic/xl.c CSR_WRITE_1(sc, XL_DOWN_POLL, 64);
sc 1452 dev/ic/xl.c if (sc->xl_cdata.xl_tx_head != NULL)
sc 1453 dev/ic/xl.c CSR_WRITE_4(sc, XL_DOWNLIST_PTR,
sc 1454 dev/ic/xl.c sc->sc_listmap->dm_segs[0].ds_addr +
sc 1455 dev/ic/xl.c ((caddr_t)sc->xl_cdata.xl_tx_head->xl_ptr -
sc 1456 dev/ic/xl.c sc->sc_listkva));
sc 1462 dev/ic/xl.c CSR_WRITE_1(sc, XL_TX_FREETHRESH, XL_PACKET_SIZE >> 8);
sc 1464 dev/ic/xl.c sc->xl_tx_thresh < XL_PACKET_SIZE) {
sc 1465 dev/ic/xl.c sc->xl_tx_thresh += XL_MIN_FRAMELEN;
sc 1468 dev/ic/xl.c " threshold to %d\n", sc->sc_dev.dv_xname,
sc 1469 dev/ic/xl.c sc->xl_tx_thresh);
sc 1472 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND,
sc 1473 dev/ic/xl.c XL_CMD_TX_SET_START|sc->xl_tx_thresh);
sc 1474 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B) {
sc 1475 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND,
sc 1478 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_ENABLE);
sc 1479 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_DOWN_UNSTALL);
sc 1481 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_ENABLE);
sc 1482 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_DOWN_UNSTALL);
sc 1488 dev/ic/xl.c CSR_WRITE_1(sc, XL_TX_STATUS, 0x01);
sc 1495 dev/ic/xl.c struct xl_softc *sc;
sc 1500 dev/ic/xl.c sc = arg;
sc 1501 dev/ic/xl.c ifp = &sc->sc_arpcom.ac_if;
sc 1503 dev/ic/xl.c while ((status = CSR_READ_2(sc, XL_STATUS)) & XL_INTRS && status != 0xFFFF) {
sc 1507 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND,
sc 1510 dev/ic/xl.c if (sc->intr_ack)
sc 1511 dev/ic/xl.c (*sc->intr_ack)(sc);
sc 1517 dev/ic/xl.c xl_rxeof(sc);
sc 1519 dev/ic/xl.c while (xl_rx_resync(sc))
sc 1520 dev/ic/xl.c xl_rxeof(sc);
sc 1525 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B)
sc 1526 dev/ic/xl.c xl_txeof_90xB(sc);
sc 1528 dev/ic/xl.c xl_txeof(sc);
sc 1533 dev/ic/xl.c xl_txeoc(sc);
sc 1537 dev/ic/xl.c xl_reset(sc);
sc 1538 dev/ic/xl.c xl_init(sc);
sc 1542 dev/ic/xl.c sc->xl_stats_no_timeout = 1;
sc 1543 dev/ic/xl.c xl_stats_update(sc);
sc 1544 dev/ic/xl.c sc->xl_stats_no_timeout = 0;
sc 1557 dev/ic/xl.c struct xl_softc *sc;
sc 1566 dev/ic/xl.c sc = xsc;
sc 1567 dev/ic/xl.c ifp = &sc->sc_arpcom.ac_if;
sc 1568 dev/ic/xl.c if (sc->xl_hasmii)
sc 1569 dev/ic/xl.c mii = &sc->sc_mii;
sc 1577 dev/ic/xl.c *p++ = CSR_READ_1(sc, XL_W6_CARRIER_LOST + i);
sc 1592 dev/ic/xl.c CSR_READ_1(sc, XL_W4_BADSSD);
sc 1594 dev/ic/xl.c if (mii != NULL && (!sc->xl_stats_no_timeout))
sc 1599 dev/ic/xl.c if (!sc->xl_stats_no_timeout)
sc 1600 dev/ic/xl.c timeout_add(&sc->xl_stsup_tmo, hz);
sc 1608 dev/ic/xl.c xl_encap(struct xl_softc *sc, struct xl_chain *c, struct mbuf *m_head)
sc 1614 dev/ic/xl.c map = sc->sc_tx_sparemap;
sc 1617 dev/ic/xl.c error = bus_dmamap_load_mbuf(sc->sc_dmat, map,
sc 1672 dev/ic/xl.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 1676 dev/ic/xl.c bus_dmamap_sync(sc->sc_dmat, c->map,
sc 1678 dev/ic/xl.c bus_dmamap_unload(sc->sc_dmat, c->map);
sc 1682 dev/ic/xl.c sc->sc_tx_sparemap = c->map;
sc 1688 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B) {
sc 1704 dev/ic/xl.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 1721 dev/ic/xl.c struct xl_softc *sc;
sc 1727 dev/ic/xl.c sc = ifp->if_softc;
sc 1733 dev/ic/xl.c if (sc->xl_cdata.xl_tx_free == NULL) {
sc 1734 dev/ic/xl.c xl_txeoc(sc);
sc 1735 dev/ic/xl.c xl_txeof(sc);
sc 1736 dev/ic/xl.c if (sc->xl_cdata.xl_tx_free == NULL) {
sc 1742 dev/ic/xl.c start_tx = sc->xl_cdata.xl_tx_free;
sc 1744 dev/ic/xl.c while (sc->xl_cdata.xl_tx_free != NULL) {
sc 1751 dev/ic/xl.c cur_tx = sc->xl_cdata.xl_tx_free;
sc 1754 dev/ic/xl.c error = xl_encap(sc, cur_tx, m_head);
sc 1760 dev/ic/xl.c sc->xl_cdata.xl_tx_free = cur_tx->xl_next;
sc 1767 dev/ic/xl.c sc->sc_listmap->dm_segs[0].ds_addr +
sc 1768 dev/ic/xl.c ((caddr_t)cur_tx->xl_ptr - sc->sc_listkva);
sc 1803 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_DOWN_STALL);
sc 1804 dev/ic/xl.c xl_wait(sc);
sc 1806 dev/ic/xl.c if (sc->xl_cdata.xl_tx_head != NULL) {
sc 1807 dev/ic/xl.c sc->xl_cdata.xl_tx_tail->xl_next = start_tx;
sc 1808 dev/ic/xl.c sc->xl_cdata.xl_tx_tail->xl_ptr->xl_next =
sc 1809 dev/ic/xl.c sc->sc_listmap->dm_segs[0].ds_addr +
sc 1810 dev/ic/xl.c ((caddr_t)start_tx->xl_ptr - sc->sc_listkva);
sc 1811 dev/ic/xl.c sc->xl_cdata.xl_tx_tail->xl_ptr->xl_status &=
sc 1813 dev/ic/xl.c sc->xl_cdata.xl_tx_tail = cur_tx;
sc 1815 dev/ic/xl.c sc->xl_cdata.xl_tx_head = start_tx;
sc 1816 dev/ic/xl.c sc->xl_cdata.xl_tx_tail = cur_tx;
sc 1818 dev/ic/xl.c if (!CSR_READ_4(sc, XL_DOWNLIST_PTR))
sc 1819 dev/ic/xl.c CSR_WRITE_4(sc, XL_DOWNLIST_PTR,
sc 1820 dev/ic/xl.c sc->sc_listmap->dm_segs[0].ds_addr +
sc 1821 dev/ic/xl.c ((caddr_t)start_tx->xl_ptr - sc->sc_listkva));
sc 1823 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_DOWN_UNSTALL);
sc 1847 dev/ic/xl.c xl_rxeof(sc);
sc 1853 dev/ic/xl.c struct xl_softc *sc;
sc 1859 dev/ic/xl.c sc = ifp->if_softc;
sc 1864 dev/ic/xl.c idx = sc->xl_cdata.xl_tx_prod;
sc 1865 dev/ic/xl.c start_tx = &sc->xl_cdata.xl_tx_chain[idx];
sc 1867 dev/ic/xl.c while (sc->xl_cdata.xl_tx_chain[idx].xl_mbuf == NULL) {
sc 1869 dev/ic/xl.c if ((XL_TX_LIST_CNT - sc->xl_cdata.xl_tx_cnt) < 3) {
sc 1879 dev/ic/xl.c cur_tx = &sc->xl_cdata.xl_tx_chain[idx];
sc 1882 dev/ic/xl.c error = xl_encap(sc, cur_tx, m_head);
sc 1904 dev/ic/xl.c sc->xl_cdata.xl_tx_cnt++;
sc 1923 dev/ic/xl.c sc->xl_cdata.xl_tx_prod = idx;
sc 1935 dev/ic/xl.c struct xl_softc *sc = xsc;
sc 1936 dev/ic/xl.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1946 dev/ic/xl.c xl_stop(sc);
sc 1948 dev/ic/xl.c if (sc->xl_hasmii)
sc 1949 dev/ic/xl.c mii = &sc->sc_mii;
sc 1952 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_RESET);
sc 1953 dev/ic/xl.c xl_wait(sc);
sc 1955 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_RESET);
sc 1956 dev/ic/xl.c xl_wait(sc);
sc 1962 dev/ic/xl.c CSR_WRITE_1(sc, XL_W2_STATION_ADDR_LO + i,
sc 1963 dev/ic/xl.c sc->sc_arpcom.ac_enaddr[i]);
sc 1968 dev/ic/xl.c CSR_WRITE_2(sc, XL_W2_STATION_MASK_LO + (i * 2), 0);
sc 1971 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_RESET);
sc 1972 dev/ic/xl.c xl_wait(sc);
sc 1973 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_RESET);
sc 1974 dev/ic/xl.c xl_wait(sc);
sc 1977 dev/ic/xl.c if (xl_list_rx_init(sc) == ENOBUFS) {
sc 1979 dev/ic/xl.c "memory for rx buffers\n", sc->sc_dev.dv_xname);
sc 1980 dev/ic/xl.c xl_stop(sc);
sc 1986 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B)
sc 1987 dev/ic/xl.c xl_list_tx_init_90xB(sc);
sc 1989 dev/ic/xl.c xl_list_tx_init(sc);
sc 1997 dev/ic/xl.c CSR_WRITE_1(sc, XL_TX_FREETHRESH, XL_PACKET_SIZE >> 8);
sc 2000 dev/ic/xl.c sc->xl_tx_thresh = XL_MIN_FRAMELEN;
sc 2001 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_SET_START|sc->xl_tx_thresh);
sc 2012 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B) {
sc 2013 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND,
sc 2019 dev/ic/xl.c rxfilt = CSR_READ_1(sc, XL_W5_RX_FILTER);
sc 2024 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_FILT|rxfilt);
sc 2027 dev/ic/xl.c xl_setpromisc(sc);
sc 2029 dev/ic/xl.c rxfilt = CSR_READ_1(sc, XL_W5_RX_FILTER);
sc 2039 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_FILT|rxfilt);
sc 2044 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B)
sc 2045 dev/ic/xl.c xl_setmulti_hash(sc);
sc 2047 dev/ic/xl.c xl_setmulti(sc);
sc 2059 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_UP_STALL);
sc 2060 dev/ic/xl.c xl_wait(sc);
sc 2061 dev/ic/xl.c CSR_WRITE_4(sc, XL_UPLIST_PTR, sc->sc_listmap->dm_segs[0].ds_addr +
sc 2063 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_UP_UNSTALL);
sc 2064 dev/ic/xl.c xl_wait(sc);
sc 2066 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B) {
sc 2068 dev/ic/xl.c CSR_WRITE_1(sc, XL_DOWN_POLL, 64);
sc 2070 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_DOWN_STALL);
sc 2071 dev/ic/xl.c xl_wait(sc);
sc 2072 dev/ic/xl.c CSR_WRITE_4(sc, XL_DOWNLIST_PTR,
sc 2073 dev/ic/xl.c sc->sc_listmap->dm_segs[0].ds_addr +
sc 2075 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_DOWN_UNSTALL);
sc 2076 dev/ic/xl.c xl_wait(sc);
sc 2084 dev/ic/xl.c if (sc->xl_xcvr == XL_XCVR_COAX)
sc 2085 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_START);
sc 2087 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_STOP);
sc 2096 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B)
sc 2097 dev/ic/xl.c CSR_WRITE_2(sc, XL_W3_MAXPKTSIZE, XL_PACKET_SIZE);
sc 2100 dev/ic/xl.c macctl = CSR_READ_1(sc, XL_W3_MAC_CTRL);
sc 2102 dev/ic/xl.c CSR_WRITE_1(sc, XL_W3_MAC_CTRL, macctl);
sc 2106 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_STATS_DISABLE);
sc 2107 dev/ic/xl.c sc->xl_stats_no_timeout = 1;
sc 2108 dev/ic/xl.c xl_stats_update(sc);
sc 2109 dev/ic/xl.c sc->xl_stats_no_timeout = 0;
sc 2111 dev/ic/xl.c CSR_WRITE_2(sc, XL_W4_NET_DIAG, XL_NETDIAG_UPPER_BYTES_ENABLE);
sc 2112 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_STATS_ENABLE);
sc 2117 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ACK|0xFF);
sc 2118 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_STAT_ENB|XL_INTRS);
sc 2119 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ENB|XL_INTRS);
sc 2121 dev/ic/xl.c if (sc->intr_ack)
sc 2122 dev/ic/xl.c (*sc->intr_ack)(sc);
sc 2125 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_THRESH|(XL_PACKET_SIZE >>2));
sc 2126 dev/ic/xl.c CSR_WRITE_2(sc, XL_DMACTL, XL_DMACTL_UP_RX_EARLY);
sc 2129 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_ENABLE);
sc 2130 dev/ic/xl.c xl_wait(sc);
sc 2131 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_ENABLE);
sc 2132 dev/ic/xl.c xl_wait(sc);
sc 2146 dev/ic/xl.c timeout_add(&sc->xl_stsup_tmo, hz);
sc 2155 dev/ic/xl.c struct xl_softc *sc;
sc 2159 dev/ic/xl.c sc = ifp->if_softc;
sc 2161 dev/ic/xl.c if (sc->xl_hasmii)
sc 2162 dev/ic/xl.c mii = &sc->sc_mii;
sc 2164 dev/ic/xl.c ifm = &sc->ifmedia;
sc 2173 dev/ic/xl.c xl_setmode(sc, ifm->ifm_media);
sc 2180 dev/ic/xl.c if (sc->xl_media & XL_MEDIAOPT_MII || sc->xl_media & XL_MEDIAOPT_BTX
sc 2181 dev/ic/xl.c || sc->xl_media & XL_MEDIAOPT_BT4) {
sc 2182 dev/ic/xl.c xl_init(sc);
sc 2184 dev/ic/xl.c xl_setmode(sc, ifm->ifm_media);
sc 2196 dev/ic/xl.c struct xl_softc *sc;
sc 2201 dev/ic/xl.c sc = ifp->if_softc;
sc 2202 dev/ic/xl.c if (sc->xl_hasmii != 0)
sc 2203 dev/ic/xl.c mii = &sc->sc_mii;
sc 2206 dev/ic/xl.c status = CSR_READ_2(sc, XL_W4_MEDIA_STATUS);
sc 2209 dev/ic/xl.c icfg = CSR_READ_4(sc, XL_W3_INTERNAL_CFG) & XL_ICFG_CONNECTOR_MASK;
sc 2221 dev/ic/xl.c if (CSR_READ_1(sc, XL_W3_MAC_CTRL) & XL_MACCTRL_DUPLEX)
sc 2227 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B &&
sc 2228 dev/ic/xl.c sc->xl_media == XL_MEDIAOPT_10FL) {
sc 2230 dev/ic/xl.c if (CSR_READ_1(sc, XL_W3_MAC_CTRL) & XL_MACCTRL_DUPLEX)
sc 2257 dev/ic/xl.c printf("%s: unknown XCVR type: %d\n", sc->sc_dev.dv_xname, icfg);
sc 2265 dev/ic/xl.c struct xl_softc *sc = ifp->if_softc;
sc 2273 dev/ic/xl.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, command, data)) > 0) {
sc 2282 dev/ic/xl.c xl_init(sc);
sc 2285 dev/ic/xl.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 2300 dev/ic/xl.c (ifp->if_flags ^ sc->xl_if_flags) &
sc 2302 dev/ic/xl.c xl_setpromisc(sc);
sc 2306 dev/ic/xl.c xl_init(sc);
sc 2310 dev/ic/xl.c xl_stop(sc);
sc 2312 dev/ic/xl.c sc->xl_if_flags = ifp->if_flags;
sc 2317 dev/ic/xl.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 2318 dev/ic/xl.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 2326 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B)
sc 2327 dev/ic/xl.c xl_setmulti_hash(sc);
sc 2329 dev/ic/xl.c xl_setmulti(sc);
sc 2336 dev/ic/xl.c if (sc->xl_hasmii != 0)
sc 2337 dev/ic/xl.c mii = &sc->sc_mii;
sc 2340 dev/ic/xl.c &sc->ifmedia, command);
sc 2358 dev/ic/xl.c struct xl_softc *sc;
sc 2361 dev/ic/xl.c sc = ifp->if_softc;
sc 2365 dev/ic/xl.c status = CSR_READ_2(sc, XL_W4_MEDIA_STATUS);
sc 2366 dev/ic/xl.c printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
sc 2370 dev/ic/xl.c sc->sc_dev.dv_xname);
sc 2371 dev/ic/xl.c xl_txeoc(sc);
sc 2372 dev/ic/xl.c xl_txeof(sc);
sc 2373 dev/ic/xl.c xl_rxeof(sc);
sc 2374 dev/ic/xl.c xl_reset(sc);
sc 2375 dev/ic/xl.c xl_init(sc);
sc 2382 dev/ic/xl.c xl_freetxrx(struct xl_softc *sc)
sc 2391 dev/ic/xl.c if (sc->xl_cdata.xl_rx_chain[i].map->dm_nsegs != 0) {
sc 2392 dev/ic/xl.c map = sc->xl_cdata.xl_rx_chain[i].map;
sc 2394 dev/ic/xl.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 2396 dev/ic/xl.c bus_dmamap_unload(sc->sc_dmat, map);
sc 2398 dev/ic/xl.c if (sc->xl_cdata.xl_rx_chain[i].xl_mbuf != NULL) {
sc 2399 dev/ic/xl.c m_freem(sc->xl_cdata.xl_rx_chain[i].xl_mbuf);
sc 2400 dev/ic/xl.c sc->xl_cdata.xl_rx_chain[i].xl_mbuf = NULL;
sc 2403 dev/ic/xl.c bzero((char *)&sc->xl_ldata->xl_rx_list,
sc 2404 dev/ic/xl.c sizeof(sc->xl_ldata->xl_rx_list));
sc 2409 dev/ic/xl.c if (sc->xl_cdata.xl_tx_chain[i].map->dm_nsegs != 0) {
sc 2410 dev/ic/xl.c map = sc->xl_cdata.xl_tx_chain[i].map;
sc 2412 dev/ic/xl.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 2414 dev/ic/xl.c bus_dmamap_unload(sc->sc_dmat, map);
sc 2416 dev/ic/xl.c if (sc->xl_cdata.xl_tx_chain[i].xl_mbuf != NULL) {
sc 2417 dev/ic/xl.c m_freem(sc->xl_cdata.xl_tx_chain[i].xl_mbuf);
sc 2418 dev/ic/xl.c sc->xl_cdata.xl_tx_chain[i].xl_mbuf = NULL;
sc 2421 dev/ic/xl.c bzero((char *)&sc->xl_ldata->xl_tx_list,
sc 2422 dev/ic/xl.c sizeof(sc->xl_ldata->xl_tx_list));
sc 2430 dev/ic/xl.c xl_stop(struct xl_softc *sc)
sc 2434 dev/ic/xl.c ifp = &sc->sc_arpcom.ac_if;
sc 2437 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_DISABLE);
sc 2438 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_STATS_DISABLE);
sc 2439 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ENB);
sc 2440 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_DISCARD);
sc 2441 dev/ic/xl.c xl_wait(sc);
sc 2442 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_DISABLE);
sc 2443 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_COAX_STOP);
sc 2447 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_RESET);
sc 2448 dev/ic/xl.c xl_wait(sc);
sc 2449 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_RESET);
sc 2450 dev/ic/xl.c xl_wait(sc);
sc 2453 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ACK|XL_STAT_INTLATCH);
sc 2454 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_STAT_ENB|0);
sc 2455 dev/ic/xl.c CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_INTR_ENB|0);
sc 2457 dev/ic/xl.c if (sc->intr_ack)
sc 2458 dev/ic/xl.c (*sc->intr_ack)(sc);
sc 2461 dev/ic/xl.c timeout_del(&sc->xl_stsup_tmo);
sc 2465 dev/ic/xl.c xl_freetxrx(sc);
sc 2469 dev/ic/xl.c xl_attach(struct xl_softc *sc)
sc 2473 dev/ic/xl.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 2478 dev/ic/xl.c xl_reset(sc);
sc 2484 dev/ic/xl.c if (xl_read_eeprom(sc, (caddr_t)&enaddr, XL_EE_OEM_ADR0, 3, 1)) {
sc 2486 dev/ic/xl.c sc->sc_dev.dv_xname);
sc 2489 dev/ic/xl.c bcopy(enaddr, (char *)&sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 2491 dev/ic/xl.c if (bus_dmamem_alloc(sc->sc_dmat, sizeof(struct xl_list_data),
sc 2492 dev/ic/xl.c PAGE_SIZE, 0, sc->sc_listseg, 1, &sc->sc_listnseg,
sc 2497 dev/ic/xl.c if (bus_dmamem_map(sc->sc_dmat, sc->sc_listseg, sc->sc_listnseg,
sc 2498 dev/ic/xl.c sizeof(struct xl_list_data), &sc->sc_listkva,
sc 2503 dev/ic/xl.c if (bus_dmamap_create(sc->sc_dmat, sizeof(struct xl_list_data), 1,
sc 2505 dev/ic/xl.c &sc->sc_listmap) != 0) {
sc 2509 dev/ic/xl.c if (bus_dmamap_load(sc->sc_dmat, sc->sc_listmap, sc->sc_listkva,
sc 2514 dev/ic/xl.c sc->xl_ldata = (struct xl_list_data *)sc->sc_listkva;
sc 2515 dev/ic/xl.c bzero(sc->xl_ldata, sizeof(struct xl_list_data));
sc 2518 dev/ic/xl.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
sc 2520 dev/ic/xl.c &sc->xl_cdata.xl_rx_chain[i].map) != 0) {
sc 2525 dev/ic/xl.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0,
sc 2526 dev/ic/xl.c BUS_DMA_NOWAIT, &sc->sc_rx_sparemap) != 0) {
sc 2532 dev/ic/xl.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 2534 dev/ic/xl.c &sc->xl_cdata.xl_tx_chain[i].map) != 0) {
sc 2539 dev/ic/xl.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, XL_TX_LIST_CNT - 3,
sc 2540 dev/ic/xl.c MCLBYTES, 0, BUS_DMA_NOWAIT, &sc->sc_tx_sparemap) != 0) {
sc 2545 dev/ic/xl.c printf(", address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 2547 dev/ic/xl.c if (sc->xl_flags & (XL_FLAG_INVERT_LED_PWR|XL_FLAG_INVERT_MII_PWR)) {
sc 2551 dev/ic/xl.c n = CSR_READ_2(sc, 12);
sc 2553 dev/ic/xl.c if (sc->xl_flags & XL_FLAG_INVERT_LED_PWR)
sc 2556 dev/ic/xl.c if (sc->xl_flags & XL_FLAG_INVERT_MII_PWR)
sc 2559 dev/ic/xl.c CSR_WRITE_2(sc, 12, n);
sc 2572 dev/ic/xl.c xl_read_eeprom(sc, (caddr_t)&sc->xl_caps, XL_EE_CAPS, 1, 0);
sc 2573 dev/ic/xl.c if (sc->xl_caps & XL_CAPS_NO_TXLENGTH ||
sc 2574 dev/ic/xl.c !(sc->xl_caps & XL_CAPS_LARGE_PKTS))
sc 2575 dev/ic/xl.c sc->xl_type = XL_TYPE_905B;
sc 2577 dev/ic/xl.c sc->xl_type = XL_TYPE_90X;
sc 2579 dev/ic/xl.c timeout_set(&sc->xl_stsup_tmo, xl_stats_update, sc);
sc 2581 dev/ic/xl.c ifp->if_softc = sc;
sc 2584 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B)
sc 2592 dev/ic/xl.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 2602 dev/ic/xl.c sc->xl_media = CSR_READ_2(sc, XL_W3_MEDIA_OPT);
sc 2604 dev/ic/xl.c xl_read_eeprom(sc, (char *)&xcvr, XL_EE_ICFG_0, 2, 0);
sc 2605 dev/ic/xl.c sc->xl_xcvr = xcvr[0] | xcvr[1] << 16;
sc 2606 dev/ic/xl.c sc->xl_xcvr &= XL_ICFG_CONNECTOR_MASK;
sc 2607 dev/ic/xl.c sc->xl_xcvr >>= XL_ICFG_CONNECTOR_BITS;
sc 2609 dev/ic/xl.c xl_mediacheck(sc);
sc 2611 dev/ic/xl.c if (sc->xl_media & XL_MEDIAOPT_MII || sc->xl_media & XL_MEDIAOPT_BTX
sc 2612 dev/ic/xl.c || sc->xl_media & XL_MEDIAOPT_BT4) {
sc 2613 dev/ic/xl.c ifmedia_init(&sc->sc_mii.mii_media, 0,
sc 2615 dev/ic/xl.c sc->xl_hasmii = 1;
sc 2616 dev/ic/xl.c sc->sc_mii.mii_ifp = ifp;
sc 2617 dev/ic/xl.c sc->sc_mii.mii_readreg = xl_miibus_readreg;
sc 2618 dev/ic/xl.c sc->sc_mii.mii_writereg = xl_miibus_writereg;
sc 2619 dev/ic/xl.c sc->sc_mii.mii_statchg = xl_miibus_statchg;
sc 2620 dev/ic/xl.c xl_setcfg(sc);
sc 2621 dev/ic/xl.c mii_attach((struct device *)sc, &sc->sc_mii, 0xffffffff,
sc 2624 dev/ic/xl.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 2625 dev/ic/xl.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE,
sc 2627 dev/ic/xl.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
sc 2630 dev/ic/xl.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 2632 dev/ic/xl.c ifm = &sc->sc_mii.mii_media;
sc 2635 dev/ic/xl.c ifmedia_init(&sc->ifmedia, 0, xl_ifmedia_upd, xl_ifmedia_sts);
sc 2636 dev/ic/xl.c sc->xl_hasmii = 0;
sc 2637 dev/ic/xl.c ifm = &sc->ifmedia;
sc 2645 dev/ic/xl.c if (sc->xl_xcvr == XL_XCVR_AUTO) {
sc 2646 dev/ic/xl.c xl_choose_xcvr(sc, 0);
sc 2648 dev/ic/xl.c xl_reset(sc);
sc 2652 dev/ic/xl.c if (sc->xl_media & XL_MEDIAOPT_BT) {
sc 2655 dev/ic/xl.c if (sc->xl_caps & XL_CAPS_FULL_DUPLEX)
sc 2659 dev/ic/xl.c if (sc->xl_media & (XL_MEDIAOPT_AUI|XL_MEDIAOPT_10FL)) {
sc 2663 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B &&
sc 2664 dev/ic/xl.c sc->xl_media == XL_MEDIAOPT_10FL) {
sc 2668 dev/ic/xl.c if (sc->xl_caps & XL_CAPS_FULL_DUPLEX)
sc 2676 dev/ic/xl.c if (sc->xl_media & XL_MEDIAOPT_BNC) {
sc 2680 dev/ic/xl.c if (sc->xl_media & XL_MEDIAOPT_BFX) {
sc 2686 dev/ic/xl.c switch(sc->xl_xcvr) {
sc 2689 dev/ic/xl.c xl_setmode(sc, media);
sc 2692 dev/ic/xl.c if (sc->xl_type == XL_TYPE_905B &&
sc 2693 dev/ic/xl.c sc->xl_media == XL_MEDIAOPT_10FL) {
sc 2695 dev/ic/xl.c xl_setmode(sc, media);
sc 2698 dev/ic/xl.c xl_setmode(sc, media);
sc 2703 dev/ic/xl.c xl_setmode(sc, media);
sc 2712 dev/ic/xl.c xl_setmode(sc, media);
sc 2715 dev/ic/xl.c printf("%s: unknown XCVR type: %d\n", sc->sc_dev.dv_xname,
sc 2716 dev/ic/xl.c sc->xl_xcvr);
sc 2725 dev/ic/xl.c if (sc->xl_hasmii == 0)
sc 2726 dev/ic/xl.c ifmedia_set(&sc->ifmedia, media);
sc 2728 dev/ic/xl.c if (sc->xl_flags & XL_FLAG_NO_XCVR_PWR) {
sc 2730 dev/ic/xl.c CSR_WRITE_2(sc, XL_W0_MFG_ID, XL_NO_XCVR_PWR_MAGICBITS);
sc 2739 dev/ic/xl.c sc->sc_sdhook = shutdownhook_establish(xl_shutdown, sc);
sc 2740 dev/ic/xl.c sc->sc_pwrhook = powerhook_establish(xl_power, sc);
sc 2746 dev/ic/xl.c struct xl_softc *sc = (struct xl_softc *)v;
sc 2748 dev/ic/xl.c xl_reset(sc);
sc 2749 dev/ic/xl.c xl_stop(sc);
sc 634 dev/ic/xlreg.h #define CSR_WRITE_4(sc, reg, val) \
sc 635 dev/ic/xlreg.h bus_space_write_4(sc->xl_btag, sc->xl_bhandle, reg, val)
sc 636 dev/ic/xlreg.h #define CSR_WRITE_2(sc, reg, val) \
sc 637 dev/ic/xlreg.h bus_space_write_2(sc->xl_btag, sc->xl_bhandle, reg, val)
sc 638 dev/ic/xlreg.h #define CSR_WRITE_1(sc, reg, val) \
sc 639 dev/ic/xlreg.h bus_space_write_1(sc->xl_btag, sc->xl_bhandle, reg, val)
sc 641 dev/ic/xlreg.h #define CSR_READ_4(sc, reg) \
sc 642 dev/ic/xlreg.h bus_space_read_4(sc->xl_btag, sc->xl_bhandle, reg)
sc 643 dev/ic/xlreg.h #define CSR_READ_2(sc, reg) \
sc 644 dev/ic/xlreg.h bus_space_read_2(sc->xl_btag, sc->xl_bhandle, reg)
sc 645 dev/ic/xlreg.h #define CSR_READ_1(sc, reg) \
sc 646 dev/ic/xlreg.h bus_space_read_1(sc->xl_btag, sc->xl_bhandle, reg)
sc 649 dev/ic/xlreg.h CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_WINSEL | x)
sc 183 dev/ipmi.c void ipmi_refresh_sensors(struct ipmi_softc *sc);
sc 184 dev/ipmi.c int ipmi_map_regs(struct ipmi_softc *sc, struct ipmi_attach_args *ia);
sc 185 dev/ipmi.c void ipmi_unmap_regs(struct ipmi_softc *sc, struct ipmi_attach_args *ia);
sc 247 dev/ipmi.c bmc_read(struct ipmi_softc *sc, int offset)
sc 249 dev/ipmi.c return (bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 250 dev/ipmi.c offset * sc->sc_if_iospacing));
sc 254 dev/ipmi.c bmc_write(struct ipmi_softc *sc, int offset, u_int8_t val)
sc 256 dev/ipmi.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 257 dev/ipmi.c offset * sc->sc_if_iospacing, val);
sc 263 dev/ipmi.c struct ipmi_softc *sc = arg;
sc 264 dev/ipmi.c struct ipmi_bmc_args *a = sc->sc_iowait_args;
sc 266 dev/ipmi.c *a->v = bmc_read(sc, a->offset);
sc 268 dev/ipmi.c sc->sc_wakeup = 0;
sc 269 dev/ipmi.c wakeup(sc);
sc 273 dev/ipmi.c if (++sc->sc_retries > sc->sc_max_retries) {
sc 274 dev/ipmi.c sc->sc_wakeup = 0;
sc 275 dev/ipmi.c wakeup(sc);
sc 279 dev/ipmi.c timeout_add(&sc->sc_timeout, 1);
sc 283 dev/ipmi.c bmc_io_wait(struct ipmi_softc *sc, int offset, u_int8_t mask, u_int8_t value,
sc 290 dev/ipmi.c return (bmc_io_wait_cold(sc, offset, mask, value, lbl));
sc 292 dev/ipmi.c sc->sc_retries = 0;
sc 293 dev/ipmi.c sc->sc_wakeup = 1;
sc 299 dev/ipmi.c sc->sc_iowait_args = &args;
sc 301 dev/ipmi.c _bmc_io_wait(sc);
sc 303 dev/ipmi.c while (sc->sc_wakeup)
sc 304 dev/ipmi.c tsleep(sc, PWAIT, lbl, 0);
sc 306 dev/ipmi.c if (sc->sc_retries > sc->sc_max_retries) {
sc 308 dev/ipmi.c "b=%.2x %s\n", DEVNAME(sc), v, mask, value, lbl);
sc 316 dev/ipmi.c bmc_io_wait_cold(struct ipmi_softc *sc, int offset, u_int8_t mask,
sc 323 dev/ipmi.c v = bmc_read(sc, offset);
sc 331 dev/ipmi.c DEVNAME(sc), v, mask, value, lbl);
sc 365 dev/ipmi.c bt_read(struct ipmi_softc *sc, int reg)
sc 367 dev/ipmi.c return bmc_read(sc, reg);
sc 371 dev/ipmi.c bt_write(struct ipmi_softc *sc, int reg, uint8_t data)
sc 373 dev/ipmi.c if (bmc_io_wait(sc, _BT_CTRL_REG, BT_BMC_BUSY, 0, "bt_write") < 0)
sc 376 dev/ipmi.c bmc_write(sc, reg, data);
sc 381 dev/ipmi.c bt_sendmsg(struct ipmi_softc *sc, int len, const u_int8_t *data)
sc 385 dev/ipmi.c bt_write(sc, _BT_CTRL_REG, BT_CLR_WR_PTR);
sc 387 dev/ipmi.c bt_write(sc, _BT_DATAOUT_REG, data[i]);
sc 389 dev/ipmi.c bt_write(sc, _BT_CTRL_REG, BT_HOST2BMC_ATN);
sc 390 dev/ipmi.c if (bmc_io_wait(sc, _BT_CTRL_REG, BT_HOST2BMC_ATN | BT_BMC_BUSY, 0,
sc 398 dev/ipmi.c bt_recvmsg(struct ipmi_softc *sc, int maxlen, int *rxlen, u_int8_t *data)
sc 402 dev/ipmi.c if (bmc_io_wait(sc, _BT_CTRL_REG, BT_BMC2HOST_ATN, BT_BMC2HOST_ATN,
sc 406 dev/ipmi.c bt_write(sc, _BT_CTRL_REG, BT_HOST_BUSY);
sc 407 dev/ipmi.c bt_write(sc, _BT_CTRL_REG, BT_BMC2HOST_ATN);
sc 408 dev/ipmi.c bt_write(sc, _BT_CTRL_REG, BT_CLR_RD_PTR);
sc 409 dev/ipmi.c len = bt_read(sc, _BT_DATAIN_REG);
sc 411 dev/ipmi.c v = bt_read(sc, _BT_DATAIN_REG);
sc 415 dev/ipmi.c bt_write(sc, _BT_CTRL_REG, BT_HOST_BUSY);
sc 422 dev/ipmi.c bt_reset(struct ipmi_softc *sc)
sc 428 dev/ipmi.c bt_probe(struct ipmi_softc *sc)
sc 432 dev/ipmi.c rv = bmc_read(sc, _BT_CTRL_REG);
sc 435 dev/ipmi.c bmc_write(sc, _BT_CTRL_REG, rv);
sc 437 dev/ipmi.c rv = bmc_read(sc, _BT_INTMASK_REG);
sc 440 dev/ipmi.c bmc_write(sc, _BT_INTMASK_REG, rv);
sc 492 dev/ipmi.c smic_wait(struct ipmi_softc *sc, u_int8_t mask, u_int8_t val, const char *lbl)
sc 497 dev/ipmi.c v = bmc_io_wait(sc, _SMIC_FLAG_REG, mask, val, "smicwait");
sc 502 dev/ipmi.c v = bmc_read(sc, _SMIC_CTRL_REG);
sc 508 dev/ipmi.c smic_write_cmd_data(struct ipmi_softc *sc, u_int8_t cmd, const u_int8_t *data)
sc 513 dev/ipmi.c sts = smic_wait(sc, SMIC_TX_DATA_RDY | SMIC_BUSY, SMIC_TX_DATA_RDY,
sc 518 dev/ipmi.c bmc_write(sc, _SMIC_CTRL_REG, cmd);
sc 520 dev/ipmi.c bmc_write(sc, _SMIC_DATAOUT_REG, *data);
sc 523 dev/ipmi.c v = bmc_read(sc, _SMIC_FLAG_REG);
sc 524 dev/ipmi.c bmc_write(sc, _SMIC_FLAG_REG, v | SMIC_BUSY);
sc 526 dev/ipmi.c return (smic_wait(sc, SMIC_BUSY, 0, "smic_write_cmd_data busy"));
sc 530 dev/ipmi.c smic_read_data(struct ipmi_softc *sc, u_int8_t *data)
sc 534 dev/ipmi.c sts = smic_wait(sc, SMIC_RX_DATA_RDY | SMIC_BUSY, SMIC_RX_DATA_RDY,
sc 537 dev/ipmi.c *data = bmc_read(sc, _SMIC_DATAIN_REG);
sc 546 dev/ipmi.c smic_sendmsg(struct ipmi_softc *sc, int len, const u_int8_t *data)
sc 550 dev/ipmi.c sts = smic_write_cmd_data(sc, SMS_CC_START_TRANSFER, &data[0]);
sc 553 dev/ipmi.c sts = smic_write_cmd_data(sc, SMS_CC_NEXT_TRANSFER,
sc 557 dev/ipmi.c sts = smic_write_cmd_data(sc, SMS_CC_END_TRANSFER, &data[idx]);
sc 567 dev/ipmi.c smic_recvmsg(struct ipmi_softc *sc, int maxlen, int *len, u_int8_t *data)
sc 572 dev/ipmi.c sts = smic_wait(sc, SMIC_RX_DATA_RDY, SMIC_RX_DATA_RDY, "smic_recvmsg");
sc 576 dev/ipmi.c sts = smic_write_cmd_data(sc, SMS_CC_START_RECEIVE, NULL);
sc 579 dev/ipmi.c sts = smic_read_data(sc, &data[idx++]);
sc 582 dev/ipmi.c smic_write_cmd_data(sc, SMS_CC_NEXT_RECEIVE, NULL);
sc 588 dev/ipmi.c sts = smic_write_cmd_data(sc, SMS_CC_END_RECEIVE, NULL);
sc 598 dev/ipmi.c smic_reset(struct ipmi_softc *sc)
sc 604 dev/ipmi.c smic_probe(struct ipmi_softc *sc)
sc 607 dev/ipmi.c if (bmc_read(sc, _SMIC_FLAG_REG) == 0xFF)
sc 644 dev/ipmi.c kcs_wait(struct ipmi_softc *sc, u_int8_t mask, u_int8_t value, const char *lbl)
sc 648 dev/ipmi.c v = bmc_io_wait(sc, _KCS_STATUS_REGISTER, mask, value, lbl);
sc 654 dev/ipmi.c bmc_read(sc, _KCS_DATAIN_REGISTER);
sc 658 dev/ipmi.c bmc_write(sc, _KCS_COMMAND_REGISTER, KCS_GET_STATUS);
sc 659 dev/ipmi.c while (bmc_read(sc, _KCS_STATUS_REGISTER) & KCS_IBF)
sc 661 dev/ipmi.c printf("%s: error code: %x\n", DEVNAME(sc),
sc 662 dev/ipmi.c bmc_read(sc, _KCS_DATAIN_REGISTER));
sc 669 dev/ipmi.c kcs_write_cmd(struct ipmi_softc *sc, u_int8_t cmd)
sc 673 dev/ipmi.c bmc_write(sc, _KCS_COMMAND_REGISTER, cmd);
sc 675 dev/ipmi.c return (kcs_wait(sc, KCS_IBF, 0, "write_cmd"));
sc 679 dev/ipmi.c kcs_write_data(struct ipmi_softc *sc, u_int8_t data)
sc 683 dev/ipmi.c bmc_write(sc, _KCS_DATAOUT_REGISTER, data);
sc 685 dev/ipmi.c return (kcs_wait(sc, KCS_IBF, 0, "write_data"));
sc 689 dev/ipmi.c kcs_read_data(struct ipmi_softc *sc, u_int8_t * data)
sc 693 dev/ipmi.c sts = kcs_wait(sc, KCS_IBF | KCS_OBF, KCS_OBF, "read_data");
sc 698 dev/ipmi.c *data = bmc_read(sc, _KCS_DATAIN_REGISTER);
sc 699 dev/ipmi.c bmc_write(sc, _KCS_DATAOUT_REGISTER, KCS_READ_NEXT);
sc 708 dev/ipmi.c kcs_sendmsg(struct ipmi_softc *sc, int len, const u_int8_t * data)
sc 714 dev/ipmi.c sts = kcs_write_cmd(sc, KCS_WRITE_START);
sc 717 dev/ipmi.c sts = kcs_write_cmd(sc, KCS_WRITE_END);
sc 722 dev/ipmi.c sts = kcs_write_data(sc, data[idx]);
sc 734 dev/ipmi.c kcs_recvmsg(struct ipmi_softc *sc, int maxlen, int *rxlen, u_int8_t * data)
sc 739 dev/ipmi.c sts = kcs_read_data(sc, &data[idx]);
sc 743 dev/ipmi.c sts = kcs_wait(sc, KCS_IBF, 0, "recv");
sc 756 dev/ipmi.c kcs_reset(struct ipmi_softc *sc)
sc 762 dev/ipmi.c kcs_probe(struct ipmi_softc *sc)
sc 766 dev/ipmi.c v = bmc_read(sc, _KCS_STATUS_REGISTER);
sc 943 dev/ipmi.c bt_buildmsg(struct ipmi_softc *sc, int nfLun, int cmd, int len,
sc 956 dev/ipmi.c buf[IPMI_BTMSG_SEQ] = sc->sc_btseq++;
sc 972 dev/ipmi.c cmn_buildmsg(struct ipmi_softc *sc, int nfLun, int cmd, int len,
sc 993 dev/ipmi.c ipmi_sendcmd(struct ipmi_softc *sc, int rssa, int rslun, int netfn, int cmd,
sc 1004 dev/ipmi.c buf = sc->sc_if->buildmsg(sc, NETFN_LUN(APP_NETFN, BMC_LUN),
sc 1006 dev/ipmi.c pI2C->bus = (sc->if_ver == 0x09) ?
sc 1014 dev/ipmi.c imbreq->seqLn = NETFN_LUN(sc->imb_seq++, SMS_LUN);
sc 1023 dev/ipmi.c buf = sc->sc_if->buildmsg(sc, NETFN_LUN(netfn, rslun), cmd,
sc 1027 dev/ipmi.c printf("%s: sendcmd malloc fails\n", DEVNAME(sc));
sc 1030 dev/ipmi.c rc = sc->sc_if->sendmsg(sc, txlen, buf);
sc 1033 dev/ipmi.c ipmi_delay(sc, 5); /* give bmc chance to digest command */
sc 1040 dev/ipmi.c ipmi_recvcmd(struct ipmi_softc *sc, int maxlen, int *rxlen, void *data)
sc 1048 dev/ipmi.c printf("%s: ipmi_recvcmd: malloc fails\n", DEVNAME(sc));
sc 1052 dev/ipmi.c if (sc->sc_if->recvmsg(sc, maxlen + 3, &rawlen, buf))
sc 1073 dev/ipmi.c ipmi_delay(sc, 5); /* give bmc chance to digest command */
sc 1079 dev/ipmi.c ipmi_delay(struct ipmi_softc *sc, int period)
sc 1085 dev/ipmi.c while (tsleep(sc, PWAIT, "ipmicmd", period) != EWOULDBLOCK);
sc 1090 dev/ipmi.c get_sdr_partial(struct ipmi_softc *sc, u_int16_t recordId, u_int16_t reserveId,
sc 1100 dev/ipmi.c if (ipmi_sendcmd(sc, BMC_SA, 0, STORAGE_NETFN, STORAGE_GET_SDR, 6,
sc 1102 dev/ipmi.c printf("%s: sendcmd fails\n", DEVNAME(sc));
sc 1105 dev/ipmi.c if (ipmi_recvcmd(sc, 8 + length, &len, cmd)) {
sc 1106 dev/ipmi.c printf("%s: getSdrPartial: recvcmd fails\n", DEVNAME(sc));
sc 1120 dev/ipmi.c get_sdr(struct ipmi_softc *sc, u_int16_t recid, u_int16_t *nxtrec)
sc 1128 dev/ipmi.c if (ipmi_sendcmd(sc, BMC_SA, 0, STORAGE_NETFN, STORAGE_RESERVE_SDR,
sc 1133 dev/ipmi.c if (ipmi_recvcmd(sc, sizeof(resid), &len, &resid)) {
sc 1138 dev/ipmi.c if (get_sdr_partial(sc, recid, resid, 0, sizeof shdr, &shdr, nxtrec)) {
sc 1157 dev/ipmi.c if (get_sdr_partial(sc, recid, resid, offset, len,
sc 1165 dev/ipmi.c if (add_sdr_sensor(sc, psdr) == 0)
sc 1296 dev/ipmi.c ipmi_sensor_status(struct ipmi_softc *sc, struct ipmi_sensor *psensor,
sc 1330 dev/ipmi.c if (ipmi_sendcmd(sc, s1->owner_id, s1->owner_lun,
sc 1332 dev/ipmi.c ipmi_recvcmd(sc, sizeof(data), &rxlen, data))
sc 1381 dev/ipmi.c read_sensor(struct ipmi_softc *sc, struct ipmi_sensor *psensor)
sc 1388 dev/ipmi.c rw_enter_write(&sc->sc_lock);
sc 1392 dev/ipmi.c if (ipmi_sendcmd(sc, s1->owner_id, s1->owner_lun, SE_NETFN,
sc 1396 dev/ipmi.c if (ipmi_recvcmd(sc, sizeof(data), &rxlen, data))
sc 1406 dev/ipmi.c psensor->i_sensor.status = ipmi_sensor_status(sc, psensor, data);
sc 1410 dev/ipmi.c rw_exit_write(&sc->sc_lock);
sc 1441 dev/ipmi.c add_sdr_sensor(struct ipmi_softc *sc, u_int8_t *psdr)
sc 1451 dev/ipmi.c rc = add_child_sensors(sc, psdr, 1, s1->sensor_num,
sc 1457 dev/ipmi.c rc = add_child_sensors(sc, psdr, s2->share1 & 0xF,
sc 1470 dev/ipmi.c add_child_sensors(struct ipmi_softc *sc, u_int8_t *psdr, int count,
sc 1512 dev/ipmi.c if (read_sensor(sc, psensor) == 0) {
sc 1514 dev/ipmi.c sensor_attach(&sc->sc_sensordev, &psensor->i_sensor);
sc 1528 dev/ipmi.c struct ipmi_softc *sc = (struct ipmi_softc *)arg;
sc 1531 dev/ipmi.c v = bmc_read(sc, _KCS_STATUS_REGISTER);
sc 1540 dev/ipmi.c ipmi_refresh_sensors(struct ipmi_softc *sc)
sc 1548 dev/ipmi.c sc->current_sensor = SLIST_NEXT(sc->current_sensor, list);
sc 1549 dev/ipmi.c if (sc->current_sensor == NULL)
sc 1550 dev/ipmi.c sc->current_sensor = SLIST_FIRST(&ipmi_sensor_list);
sc 1552 dev/ipmi.c if (read_sensor(sc, sc->current_sensor)) {
sc 1553 dev/ipmi.c dbg_printf(1, "%s: error reading: %s\n", DEVNAME(sc),
sc 1554 dev/ipmi.c sc->current_sensor->i_sensor.desc);
sc 1560 dev/ipmi.c ipmi_map_regs(struct ipmi_softc *sc, struct ipmi_attach_args *ia)
sc 1562 dev/ipmi.c sc->sc_if = ipmi_get_if(ia->iaa_if_type);
sc 1563 dev/ipmi.c if (sc->sc_if == NULL)
sc 1567 dev/ipmi.c sc->sc_iot = ia->iaa_iot;
sc 1569 dev/ipmi.c sc->sc_iot = ia->iaa_memt;
sc 1571 dev/ipmi.c sc->sc_if_rev = ia->iaa_if_rev;
sc 1572 dev/ipmi.c sc->sc_if_iospacing = ia->iaa_if_iospacing;
sc 1573 dev/ipmi.c if (bus_space_map(sc->sc_iot, ia->iaa_if_iobase,
sc 1574 dev/ipmi.c sc->sc_if->nregs * sc->sc_if_iospacing,
sc 1575 dev/ipmi.c 0, &sc->sc_ioh)) {
sc 1577 dev/ipmi.c DEVNAME(sc),
sc 1578 dev/ipmi.c sc->sc_iot, ia->iaa_if_iobase,
sc 1579 dev/ipmi.c sc->sc_if->nregs * sc->sc_if_iospacing, &sc->sc_ioh);
sc 1584 dev/ipmi.c sc->ih = isa_intr_establish(-1, iaa->if_if_irq,
sc 1585 dev/ipmi.c iaa->if_irqlvl, IPL_BIO, ipmi_intr, sc, DEVNAME(sc));
sc 1591 dev/ipmi.c ipmi_unmap_regs(struct ipmi_softc *sc, struct ipmi_attach_args *ia)
sc 1593 dev/ipmi.c bus_space_unmap(sc->sc_iot, sc->sc_ioh,
sc 1594 dev/ipmi.c sc->sc_if->nregs * sc->sc_if_iospacing);
sc 1601 dev/ipmi.c struct ipmi_softc *sc = thread->sc;
sc 1604 dev/ipmi.c ipmi_refresh_sensors(sc);
sc 1615 dev/ipmi.c struct ipmi_softc *sc = arg;
sc 1617 dev/ipmi.c if (kthread_create(ipmi_poll_thread, sc->sc_thread, NULL,
sc 1618 dev/ipmi.c DEVNAME(sc)) != 0) {
sc 1620 dev/ipmi.c DEVNAME(sc));
sc 1655 dev/ipmi.c struct ipmi_softc sc;
sc 1666 dev/ipmi.c strlcpy(sc.sc_dev.dv_xname, "ipmi0", sizeof(sc.sc_dev.dv_xname));
sc 1668 dev/ipmi.c if (ipmi_map_regs(&sc, ia) == 0) {
sc 1669 dev/ipmi.c sc.sc_if->probe(&sc);
sc 1672 dev/ipmi.c if (ipmi_sendcmd(&sc, BMC_SA, 0, APP_NETFN, APP_GET_DEVICE_ID,
sc 1678 dev/ipmi.c if (ipmi_recvcmd(&sc, sizeof(cmd), &len, cmd)) {
sc 1686 dev/ipmi.c ipmi_unmap_regs(&sc, ia);
sc 1695 dev/ipmi.c struct ipmi_softc *sc = (void *) self;
sc 1700 dev/ipmi.c ipmi_map_regs(sc, ia);
sc 1704 dev/ipmi.c if (get_sdr(sc, rec, &rec)) {
sc 1706 dev/ipmi.c ipmi_unmap_regs(sc, ia);
sc 1711 dev/ipmi.c sc->sc_thread = malloc(sizeof(struct ipmi_thread), M_DEVBUF,
sc 1713 dev/ipmi.c if (sc->sc_thread == NULL) {
sc 1717 dev/ipmi.c sc->sc_thread->sc = sc;
sc 1718 dev/ipmi.c sc->sc_thread->running = 1;
sc 1722 dev/ipmi.c sc->current_sensor = SLIST_FIRST(&ipmi_sensor_list);
sc 1725 dev/ipmi.c kthread_create_deferred(ipmi_create_thread, sc);
sc 1727 dev/ipmi.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 1728 dev/ipmi.c sizeof(sc->sc_sensordev.xname));
sc 1729 dev/ipmi.c sensordev_install(&sc->sc_sensordev);
sc 1732 dev/ipmi.c ia->iaa_if_rev >> 4, ia->iaa_if_rev & 0xF, sc->sc_if->name,
sc 1734 dev/ipmi.c ia->iaa_if_iospacing * sc->sc_if->nregs, ia->iaa_if_iospacing);
sc 1743 dev/ipmi.c sc->sc_wdog_period = 0;
sc 1744 dev/ipmi.c wdog_register(sc, ipmi_watchdog);
sc 1747 dev/ipmi.c rw_init(&sc->sc_lock, DEVNAME(sc));
sc 1750 dev/ipmi.c sc->sc_retries = 0;
sc 1751 dev/ipmi.c sc->sc_wakeup = 0;
sc 1752 dev/ipmi.c sc->sc_max_retries = 50; /* 50 * 1/100 = 0.5 seconds max */
sc 1753 dev/ipmi.c timeout_set(&sc->sc_timeout, _bmc_io_wait, sc);
sc 1759 dev/ipmi.c struct ipmi_softc *sc = arg;
sc 1763 dev/ipmi.c if (sc->sc_wdog_period == period) {
sc 1767 dev/ipmi.c rc = ipmi_sendcmd(sc, BMC_SA, BMC_LUN, APP_NETFN,
sc 1769 dev/ipmi.c rc = ipmi_recvcmd(sc, 0, &len, NULL);
sc 1780 dev/ipmi.c rc = ipmi_sendcmd(sc, BMC_SA, BMC_LUN, APP_NETFN,
sc 1782 dev/ipmi.c rc = ipmi_recvcmd(sc, sizeof(wdog), &len, &wdog);
sc 1790 dev/ipmi.c rc = ipmi_sendcmd(sc, BMC_SA, BMC_LUN, APP_NETFN,
sc 1792 dev/ipmi.c rc = ipmi_recvcmd(sc, 0, &len, NULL);
sc 1796 dev/ipmi.c sc->sc_wdog_period = period;
sc 111 dev/ipmivar.h struct ipmi_softc *sc;
sc 157 dev/isa/ad1848.c #define ADREAD(sc, addr) bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (sc)->sc_iooffs+(addr))
sc 158 dev/isa/ad1848.c #define ADWRITE(sc, addr, data) bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (sc)->sc_iooffs+(addr), (data))
sc 161 dev/isa/ad1848.c ad_read(sc, reg)
sc 162 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 168 dev/isa/ad1848.c ADWRITE(sc, AD1848_IADDR, (reg & 0xff) | sc->MCE_bit);
sc 169 dev/isa/ad1848.c x = ADREAD(sc, AD1848_IDATA);
sc 177 dev/isa/ad1848.c ad_write(sc, reg, data)
sc 178 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 183 dev/isa/ad1848.c ADWRITE(sc, AD1848_IADDR, (reg & 0xff) | sc->MCE_bit);
sc 184 dev/isa/ad1848.c ADWRITE(sc, AD1848_IDATA, data & 0xff);
sc 190 dev/isa/ad1848.c ad_set_MCE(sc, state)
sc 191 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 195 dev/isa/ad1848.c sc->MCE_bit = MODE_CHANGE_ENABLE;
sc 197 dev/isa/ad1848.c sc->MCE_bit = 0;
sc 199 dev/isa/ad1848.c ADWRITE(sc, AD1848_IADDR, sc->MCE_bit);
sc 203 dev/isa/ad1848.c wait_for_calibration(sc)
sc 204 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 216 dev/isa/ad1848.c while (timeout > 0 && ADREAD(sc, AD1848_IADDR) == SP_IN_INIT)
sc 219 dev/isa/ad1848.c if (ADREAD(sc, AD1848_IADDR) == SP_IN_INIT)
sc 222 dev/isa/ad1848.c ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT);
sc 224 dev/isa/ad1848.c while (timeout > 0 && ADREAD(sc, AD1848_IADDR) != SP_TEST_AND_INIT)
sc 227 dev/isa/ad1848.c if (ADREAD(sc, AD1848_IADDR) == SP_TEST_AND_INIT)
sc 230 dev/isa/ad1848.c if (!(ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG)) {
sc 232 dev/isa/ad1848.c while (timeout > 0 && !(ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG))
sc 235 dev/isa/ad1848.c if (!(ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG))
sc 240 dev/isa/ad1848.c while (timeout > 0 && ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG)
sc 242 dev/isa/ad1848.c if (ad_read(sc, SP_TEST_AND_INIT) & AUTO_CAL_IN_PROG)
sc 250 dev/isa/ad1848.c ad1848_dump_regs(sc)
sc 251 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 256 dev/isa/ad1848.c printf("ad1848 status=%02x", ADREAD(sc, AD1848_STATUS));
sc 259 dev/isa/ad1848.c r = ad_read(sc, i);
sc 262 dev/isa/ad1848.c if (sc->mode == 2) {
sc 264 dev/isa/ad1848.c r = ad_read(sc, i);
sc 276 dev/isa/ad1848.c ad1848_mapprobe(sc, iobase)
sc 277 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 287 dev/isa/ad1848.c sc->sc_iooffs = 0;
sc 289 dev/isa/ad1848.c if (bus_space_map(sc->sc_iot, iobase, AD1848_NPORT, 0, &sc->sc_ioh))
sc 292 dev/isa/ad1848.c if (!ad1848_probe(sc)) {
sc 293 dev/isa/ad1848.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT);
sc 303 dev/isa/ad1848.c ad1848_probe(sc)
sc 304 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 312 dev/isa/ad1848.c sc->MCE_bit = MODE_CHANGE_ENABLE;
sc 313 dev/isa/ad1848.c sc->mode = 1; /* MODE 1 = original ad1848/ad1846/cs4248 */
sc 324 dev/isa/ad1848.c tmp = ADREAD(sc, AD1848_IADDR);
sc 337 dev/isa/ad1848.c ad_write(sc, 0, 0xaa);
sc 338 dev/isa/ad1848.c ad_write(sc, 1, 0x45); /* 0x55 with bit 0x10 clear */
sc 340 dev/isa/ad1848.c if ((tmp1 = ad_read(sc, 0)) != 0xaa ||
sc 341 dev/isa/ad1848.c (tmp2 = ad_read(sc, 1)) != 0x45) {
sc 346 dev/isa/ad1848.c ad_write(sc, 0, 0x45);
sc 347 dev/isa/ad1848.c ad_write(sc, 1, 0xaa);
sc 349 dev/isa/ad1848.c if ((tmp1 = ad_read(sc, 0)) != 0x45 ||
sc 350 dev/isa/ad1848.c (tmp2 = ad_read(sc, 1)) != 0xaa) {
sc 359 dev/isa/ad1848.c tmp = ad_read(sc, SP_MISC_INFO);
sc 360 dev/isa/ad1848.c ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f);
sc 362 dev/isa/ad1848.c if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) {
sc 378 dev/isa/ad1848.c sc->chip_name = "AD1848J";
sc 381 dev/isa/ad1848.c sc->chip_name = "AD1848K";
sc 385 dev/isa/ad1848.c sc->chip_name = "AD1846";
sc 389 dev/isa/ad1848.c sc->chip_name = "CS4248revB"; /* or CS4231 rev B; see below */
sc 392 dev/isa/ad1848.c sc->chip_name = "CS4248";
sc 395 dev/isa/ad1848.c sc->chip_name = "broken"; /* CS4231/AD1845; see below */
sc 398 dev/isa/ad1848.c sc->chip_name = "unknown";
sc 414 dev/isa/ad1848.c ad_write(sc, SP_MISC_INFO, 0); /* Mode2 = disabled */
sc 417 dev/isa/ad1848.c if ((tmp1 = ad_read(sc, i)) != (tmp2 = ad_read(sc, i + 16))) {
sc 429 dev/isa/ad1848.c ad_write(sc, SP_MISC_INFO, MODE2); /* Set mode2, clear 0x80 */
sc 431 dev/isa/ad1848.c tmp1 = ad_read(sc, SP_MISC_INFO);
sc 438 dev/isa/ad1848.c ad_write(sc, 18, 0x88); /* Set I18 to known value */
sc 440 dev/isa/ad1848.c ad_write(sc, 2, 0x45);
sc 441 dev/isa/ad1848.c if ((tmp2 = ad_read(sc, 18)) != 0x45) { /* No change -> CS4231? */
sc 442 dev/isa/ad1848.c ad_write(sc, 2, 0xaa);
sc 443 dev/isa/ad1848.c if ((tmp2 = ad_read(sc, 18)) == 0xaa) { /* Rotten bits? */
sc 453 dev/isa/ad1848.c tmp1 = ad_read(sc, CS_VERSION_ID);
sc 456 dev/isa/ad1848.c sc->chip_name = "CS4231A";
sc 460 dev/isa/ad1848.c sc->chip_name = "CS4231 or AD1845";
sc 464 dev/isa/ad1848.c sc->chip_name = "CS4232";
sc 467 dev/isa/ad1848.c sc->chip_name = "CS4236/CS4236B";
sc 471 dev/isa/ad1848.c sc->mode = 2;
sc 476 dev/isa/ad1848.c while(ADREAD(sc, AD1848_IADDR) & SP_IN_INIT)
sc 480 dev/isa/ad1848.c ADWRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT);
sc 481 dev/isa/ad1848.c while(ADREAD(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG)
sc 491 dev/isa/ad1848.c ad1848_unmap(sc)
sc 492 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 494 dev/isa/ad1848.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, AD1848_NPORT);
sc 502 dev/isa/ad1848.c ad1848_attach(sc)
sc 503 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 511 dev/isa/ad1848.c sc->sc_locked = 0;
sc 512 dev/isa/ad1848.c sc->sc_playrun = NOTRUNNING;
sc 513 dev/isa/ad1848.c sc->sc_recrun = NOTRUNNING;
sc 515 dev/isa/ad1848.c if (sc->sc_drq != -1) {
sc 516 dev/isa/ad1848.c if (isa_dmamap_create(sc->sc_isa, sc->sc_drq, MAX_ISADMA,
sc 519 dev/isa/ad1848.c sc->sc_drq);
sc 523 dev/isa/ad1848.c if (sc->sc_recdrq != -1 && sc->sc_recdrq != sc->sc_drq) {
sc 524 dev/isa/ad1848.c if (isa_dmamap_create(sc->sc_isa, sc->sc_recdrq, MAX_ISADMA,
sc 527 dev/isa/ad1848.c sc->sc_recdrq);
sc 534 dev/isa/ad1848.c ad_write(sc, i, ad1848_init_values[i]);
sc 536 dev/isa/ad1848.c while (timeout > 0 && ad_read(sc, AD1848_IADDR) & SP_IN_INIT)
sc 540 dev/isa/ad1848.c if (sc->mode == 2) {
sc 541 dev/isa/ad1848.c ad_write(sc, SP_INTERFACE_CONFIG, 0); /* disable SINGLE_DMA */
sc 544 dev/isa/ad1848.c ad_write(sc, i, ad1848_init_values[i]);
sc 547 dev/isa/ad1848.c ad_read(sc, AD1848_IADDR) & SP_IN_INIT)
sc 551 dev/isa/ad1848.c ad1848_reset(sc);
sc 555 dev/isa/ad1848.c (void) ad1848_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams);
sc 558 dev/isa/ad1848.c (void) ad1848_set_rec_gain(sc, &vol_mid);
sc 559 dev/isa/ad1848.c (void) ad1848_set_channel_gain(sc, AD1848_DAC_CHANNEL, &vol_mid);
sc 560 dev/isa/ad1848.c (void) ad1848_set_channel_gain(sc, AD1848_MONITOR_CHANNEL, &vol_0);
sc 561 dev/isa/ad1848.c (void) ad1848_set_channel_gain(sc, AD1848_AUX1_CHANNEL, &vol_mid); /* CD volume */
sc 562 dev/isa/ad1848.c if (sc->mode == 2) {
sc 563 dev/isa/ad1848.c (void) ad1848_set_channel_gain(sc, AD1848_AUX2_CHANNEL, &vol_mid); /* CD volume */
sc 564 dev/isa/ad1848.c (void) ad1848_set_channel_gain(sc, AD1848_LINE_CHANNEL, &vol_mid);
sc 565 dev/isa/ad1848.c (void) ad1848_set_channel_gain(sc, AD1848_MONO_CHANNEL, &vol_0);
sc 566 dev/isa/ad1848.c sc->mute[AD1848_MONO_CHANNEL] = MUTE_ALL;
sc 568 dev/isa/ad1848.c (void) ad1848_set_channel_gain(sc, AD1848_AUX2_CHANNEL, &vol_0);
sc 571 dev/isa/ad1848.c (void) ad1848_set_rec_port(sc, MIC_IN_PORT);
sc 573 dev/isa/ad1848.c if (sc->chip_name)
sc 574 dev/isa/ad1848.c printf(": %s", sc->chip_name);
sc 607 dev/isa/ad1848.c ad1848_mute_channel(sc, device, mute)
sc 608 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 614 dev/isa/ad1848.c reg = ad_read(sc, mixer_channel_info[device].left_reg);
sc 618 dev/isa/ad1848.c ad_write(sc, mixer_channel_info[device].left_reg, reg & 0xFE);
sc 620 dev/isa/ad1848.c ad_write(sc, mixer_channel_info[device].left_reg, reg | 0x80);
sc 621 dev/isa/ad1848.c } else if (!(sc->mute[device] & MUTE_LEFT)) {
sc 623 dev/isa/ad1848.c ad_write(sc, mixer_channel_info[device].left_reg, reg | 0x01);
sc 625 dev/isa/ad1848.c ad_write(sc, mixer_channel_info[device].left_reg, reg & ~0x80);
sc 632 dev/isa/ad1848.c reg = ad_read(sc, mixer_channel_info[device].right_reg);
sc 635 dev/isa/ad1848.c ad_write(sc, mixer_channel_info[device].right_reg, reg | 0x80);
sc 636 dev/isa/ad1848.c else if (!(sc->mute[device] & MUTE_RIGHT)) {
sc 637 dev/isa/ad1848.c ad_write(sc, mixer_channel_info[device].right_reg, reg & ~0x80);
sc 643 dev/isa/ad1848.c ad1848_set_channel_gain(sc, device, gp)
sc 644 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 652 dev/isa/ad1848.c sc->gains[device] = *gp;
sc 656 dev/isa/ad1848.c reg = ad_read(sc, info->left_reg) & (info->atten_mask);
sc 662 dev/isa/ad1848.c ad_write(sc, info->left_reg, reg);
sc 668 dev/isa/ad1848.c reg = ad_read(sc, info->right_reg);
sc 670 dev/isa/ad1848.c ad_write(sc, info->right_reg, (atten& info->atten_bits)|reg);
sc 677 dev/isa/ad1848.c ad1848_get_device_gain(sc, device, gp)
sc 678 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 682 dev/isa/ad1848.c *gp = sc->gains[device];
sc 687 dev/isa/ad1848.c ad1848_get_rec_gain(sc, gp)
sc 688 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 691 dev/isa/ad1848.c *gp = sc->rec_gain;
sc 696 dev/isa/ad1848.c ad1848_set_rec_gain(sc, gp)
sc 697 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 704 dev/isa/ad1848.c sc->rec_gain = *gp;
sc 707 dev/isa/ad1848.c reg = ad_read(sc, SP_LEFT_INPUT_CONTROL);
sc 709 dev/isa/ad1848.c ad_write(sc, SP_LEFT_INPUT_CONTROL, (gain&0x0f)|reg);
sc 712 dev/isa/ad1848.c reg = ad_read(sc, SP_RIGHT_INPUT_CONTROL);
sc 714 dev/isa/ad1848.c ad_write(sc, SP_RIGHT_INPUT_CONTROL, (gain&0x0f)|reg);
sc 725 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 728 dev/isa/ad1848.c if (sc->mode == 2) {
sc 729 dev/isa/ad1848.c ad1848_mute_channel(sc, AD1848_DAC_CHANNEL, mute ? MUTE_ALL : 0);
sc 730 dev/isa/ad1848.c ad1848_mute_channel(sc, AD1848_MONO_CHANNEL, mute ? MUTE_MONO : 0);
sc 731 dev/isa/ad1848.c ad1848_mute_channel(sc, AD1848_LINE_CHANNEL, mute ? MUTE_ALL : 0);
sc 734 dev/isa/ad1848.c ad1848_mute_channel(sc, AD1848_AUX2_CHANNEL, mute ? MUTE_ALL : 0);
sc 735 dev/isa/ad1848.c ad1848_mute_channel(sc, AD1848_AUX1_CHANNEL, mute ? MUTE_ALL : 0);
sc 739 dev/isa/ad1848.c ad1848_set_mic_gain(sc, gp)
sc 740 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 748 dev/isa/ad1848.c sc->mic_gain_on = 1;
sc 749 dev/isa/ad1848.c reg = ad_read(sc, SP_LEFT_INPUT_CONTROL);
sc 750 dev/isa/ad1848.c ad_write(sc, SP_LEFT_INPUT_CONTROL, reg | INPUT_MIC_GAIN_ENABLE);
sc 752 dev/isa/ad1848.c sc->mic_gain_on = 0;
sc 753 dev/isa/ad1848.c reg = ad_read(sc, SP_LEFT_INPUT_CONTROL);
sc 754 dev/isa/ad1848.c ad_write(sc, SP_LEFT_INPUT_CONTROL, reg & ~INPUT_MIC_GAIN_ENABLE);
sc 761 dev/isa/ad1848.c ad1848_get_mic_gain(sc, gp)
sc 762 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 765 dev/isa/ad1848.c if (sc->mic_gain_on)
sc 941 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 973 dev/isa/ad1848.c fp->flags = sc->mode == 1 ? AUDIO_ENCODINGFLAG_EMULATED : 0;
sc 997 dev/isa/ad1848.c if (sc->mode == 1)
sc 1017 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 1035 dev/isa/ad1848.c if (p->precision == 16 && sc->mode == 1) {
sc 1089 dev/isa/ad1848.c error = ad1848_set_speed(sc, &p->sample_rate);
sc 1096 dev/isa/ad1848.c sc->format_bits = bits;
sc 1097 dev/isa/ad1848.c sc->channels = p->channels;
sc 1098 dev/isa/ad1848.c sc->precision = p->precision;
sc 1099 dev/isa/ad1848.c sc->need_commit = 1;
sc 1106 dev/isa/ad1848.c ad1848_set_rec_port(sc, port)
sc 1107 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 1123 dev/isa/ad1848.c else if (sc->mode == 2 && port == AUX1_IN_PORT) {
sc 1129 dev/isa/ad1848.c reg = ad_read(sc, SP_LEFT_INPUT_CONTROL);
sc 1131 dev/isa/ad1848.c ad_write(sc, SP_LEFT_INPUT_CONTROL, (inp|reg));
sc 1133 dev/isa/ad1848.c reg = ad_read(sc, SP_RIGHT_INPUT_CONTROL);
sc 1135 dev/isa/ad1848.c ad_write(sc, SP_RIGHT_INPUT_CONTROL, (inp|reg));
sc 1137 dev/isa/ad1848.c sc->rec_port = port;
sc 1143 dev/isa/ad1848.c ad1848_get_rec_port(sc)
sc 1144 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 1146 dev/isa/ad1848.c return(sc->rec_port);
sc 1154 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 1156 dev/isa/ad1848.c sc->sc_lastcc = -1;
sc 1169 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 1171 dev/isa/ad1848.c DPRINTF(("ad1848_open: sc=%p\n", sc));
sc 1173 dev/isa/ad1848.c sc->sc_intr = 0;
sc 1174 dev/isa/ad1848.c sc->sc_lastcc = -1;
sc 1175 dev/isa/ad1848.c sc->sc_locked = 0;
sc 1179 dev/isa/ad1848.c ad_write(sc, SP_PIN_CONTROL, INTERRUPT_ENABLE|ad_read(sc, SP_PIN_CONTROL));
sc 1183 dev/isa/ad1848.c ad1848_dump_regs(sc);
sc 1196 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 1199 dev/isa/ad1848.c sc->sc_intr = 0;
sc 1202 dev/isa/ad1848.c if (sc->sc_playrun != NOTRUNNING) {
sc 1203 dev/isa/ad1848.c isa_dmaabort(sc->sc_isa, sc->sc_drq);
sc 1204 dev/isa/ad1848.c sc->sc_playrun = NOTRUNNING;
sc 1206 dev/isa/ad1848.c if (sc->sc_recrun != NOTRUNNING) {
sc 1207 dev/isa/ad1848.c isa_dmaabort(sc->sc_isa, sc->sc_recdrq);
sc 1208 dev/isa/ad1848.c sc->sc_recrun = NOTRUNNING;
sc 1210 dev/isa/ad1848.c ad_write(sc, SP_LOWER_BASE_COUNT, (u_char)0);
sc 1211 dev/isa/ad1848.c ad_write(sc, SP_UPPER_BASE_COUNT, (u_char)0);
sc 1215 dev/isa/ad1848.c ad_write(sc, SP_PIN_CONTROL,
sc 1216 dev/isa/ad1848.c ad_read(sc, SP_PIN_CONTROL) & ~INTERRUPT_ENABLE);
sc 1219 dev/isa/ad1848.c r = ad_read(sc, SP_INTERFACE_CONFIG);
sc 1221 dev/isa/ad1848.c ad_write(sc, SP_INTERFACE_CONFIG, r);
sc 1225 dev/isa/ad1848.c ad1848_dump_regs(sc);
sc 1236 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 1241 dev/isa/ad1848.c if (!sc->need_commit)
sc 1246 dev/isa/ad1848.c ad1848_mute_monitor(sc, 1);
sc 1248 dev/isa/ad1848.c ad_set_MCE(sc, 1); /* Enables changes to the format select reg */
sc 1250 dev/isa/ad1848.c fs = sc->speed_bits | (sc->format_bits << 5);
sc 1252 dev/isa/ad1848.c if (sc->channels == 2)
sc 1255 dev/isa/ad1848.c ad_write(sc, SP_CLOCK_DATA_FORMAT, fs);
sc 1260 dev/isa/ad1848.c if (sc->mode == 2) {
sc 1264 dev/isa/ad1848.c (void)ADREAD(sc, AD1848_IDATA);
sc 1265 dev/isa/ad1848.c (void)ADREAD(sc, AD1848_IDATA);
sc 1270 dev/isa/ad1848.c while (timeout > 0 && ADREAD(sc, AD1848_IADDR) == SP_IN_INIT)
sc 1273 dev/isa/ad1848.c ad_write(sc, CS_REC_FORMAT, fs);
sc 1277 dev/isa/ad1848.c (void)ADREAD(sc, AD1848_IDATA);
sc 1278 dev/isa/ad1848.c (void)ADREAD(sc, AD1848_IDATA);
sc 1285 dev/isa/ad1848.c while (timeout > 0 && ADREAD(sc, AD1848_IADDR) == SP_IN_INIT)
sc 1288 dev/isa/ad1848.c if (ADREAD(sc, AD1848_IADDR) == SP_IN_INIT)
sc 1295 dev/isa/ad1848.c ad_set_MCE(sc, 0);
sc 1296 dev/isa/ad1848.c wait_for_calibration(sc);
sc 1298 dev/isa/ad1848.c ad1848_mute_monitor(sc, 0);
sc 1300 dev/isa/ad1848.c sc->sc_lastcc = -1;
sc 1304 dev/isa/ad1848.c sc->need_commit = 0;
sc 1309 dev/isa/ad1848.c ad1848_reset(sc)
sc 1310 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 1317 dev/isa/ad1848.c r = ad_read(sc, SP_INTERFACE_CONFIG);
sc 1319 dev/isa/ad1848.c ad_write(sc, SP_INTERFACE_CONFIG, r);
sc 1321 dev/isa/ad1848.c if (sc->mode == 2) {
sc 1322 dev/isa/ad1848.c ADWRITE(sc, AD1848_IADDR, CS_IRQ_STATUS);
sc 1323 dev/isa/ad1848.c ADWRITE(sc, AD1848_IDATA, 0);
sc 1326 dev/isa/ad1848.c ADWRITE(sc, AD1848_STATUS, 0);
sc 1329 dev/isa/ad1848.c ad1848_dump_regs(sc);
sc 1334 dev/isa/ad1848.c ad1848_set_speed(sc, argp)
sc 1335 dev/isa/ad1848.c struct ad1848_softc *sc;
sc 1399 dev/isa/ad1848.c sc->speed_bits = speed_table[selected].bits;
sc 1400 dev/isa/ad1848.c sc->need_commit = 1;
sc 1413 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 1418 dev/isa/ad1848.c reg = ad_read(sc, SP_INTERFACE_CONFIG);
sc 1419 dev/isa/ad1848.c ad_write(sc, SP_INTERFACE_CONFIG, (reg & ~PLAYBACK_ENABLE));
sc 1420 dev/isa/ad1848.c sc->sc_locked = 0;
sc 1429 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 1434 dev/isa/ad1848.c reg = ad_read(sc, SP_INTERFACE_CONFIG);
sc 1435 dev/isa/ad1848.c ad_write(sc, SP_INTERFACE_CONFIG, (reg & ~CAPTURE_ENABLE));
sc 1436 dev/isa/ad1848.c sc->sc_locked = 0;
sc 1447 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 1449 dev/isa/ad1848.c sc->sc_recrun = DMARUNNING;
sc 1450 dev/isa/ad1848.c sc->sc_dma_flags = DMAMODE_READ | DMAMODE_LOOP;
sc 1451 dev/isa/ad1848.c sc->sc_dma_bp = buf;
sc 1452 dev/isa/ad1848.c sc->sc_dma_cnt = cc;
sc 1453 dev/isa/ad1848.c isa_dmastart(sc->sc_isa, sc->sc_recdrq, buf, cc, NULL,
sc 1454 dev/isa/ad1848.c sc->sc_dma_flags, BUS_DMA_NOWAIT);
sc 1470 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 1473 dev/isa/ad1848.c if (sc->sc_locked) {
sc 1482 dev/isa/ad1848.c sc->sc_locked = 1;
sc 1483 dev/isa/ad1848.c sc->sc_intr = intr;
sc 1484 dev/isa/ad1848.c sc->sc_arg = arg;
sc 1486 dev/isa/ad1848.c switch (sc->sc_recrun) {
sc 1488 dev/isa/ad1848.c sc->sc_dma_flags = DMAMODE_READ;
sc 1489 dev/isa/ad1848.c sc->sc_dma_bp = p;
sc 1490 dev/isa/ad1848.c sc->sc_dma_cnt = cc;
sc 1491 dev/isa/ad1848.c isa_dmastart(sc->sc_isa, sc->sc_recdrq, p, cc, NULL,
sc 1495 dev/isa/ad1848.c sc->sc_recrun = PCMRUNNING;
sc 1497 dev/isa/ad1848.c if (sc->precision == 16)
sc 1499 dev/isa/ad1848.c if (sc->channels == 2)
sc 1503 dev/isa/ad1848.c if (sc->sc_lastcc != cc || sc->sc_mode != AUMODE_RECORD) {
sc 1504 dev/isa/ad1848.c ad_write(sc, SP_LOWER_BASE_COUNT, (u_char)(cc & 0xff));
sc 1505 dev/isa/ad1848.c ad_write(sc, SP_UPPER_BASE_COUNT, (u_char)((cc >> 8) & 0xff));
sc 1507 dev/isa/ad1848.c if (sc->mode == 2) {
sc 1508 dev/isa/ad1848.c ad_write(sc, CS_LOWER_REC_CNT, (u_char)(cc & 0xff));
sc 1509 dev/isa/ad1848.c ad_write(sc, CS_UPPER_REC_CNT, (u_char)((cc >> 8) & 0xff));
sc 1512 dev/isa/ad1848.c reg = ad_read(sc, SP_INTERFACE_CONFIG);
sc 1513 dev/isa/ad1848.c ad_write(sc, SP_INTERFACE_CONFIG, (CAPTURE_ENABLE|reg));
sc 1515 dev/isa/ad1848.c sc->sc_lastcc = cc;
sc 1516 dev/isa/ad1848.c sc->sc_mode = AUMODE_RECORD;
sc 1535 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 1537 dev/isa/ad1848.c sc->sc_playrun = DMARUNNING;
sc 1538 dev/isa/ad1848.c sc->sc_dma_flags = DMAMODE_WRITE | DMAMODE_LOOP;
sc 1539 dev/isa/ad1848.c sc->sc_dma_bp = buf;
sc 1540 dev/isa/ad1848.c sc->sc_dma_cnt = cc;
sc 1541 dev/isa/ad1848.c isa_dmastart(sc->sc_isa, sc->sc_drq, buf, cc, NULL,
sc 1542 dev/isa/ad1848.c sc->sc_dma_flags, BUS_DMA_NOWAIT);
sc 1555 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 1558 dev/isa/ad1848.c if (sc->sc_locked) {
sc 1567 dev/isa/ad1848.c sc->sc_locked = 1;
sc 1568 dev/isa/ad1848.c sc->sc_intr = intr;
sc 1569 dev/isa/ad1848.c sc->sc_arg = arg;
sc 1571 dev/isa/ad1848.c switch (sc->sc_playrun) {
sc 1573 dev/isa/ad1848.c sc->sc_dma_flags = DMAMODE_WRITE;
sc 1574 dev/isa/ad1848.c sc->sc_dma_bp = p;
sc 1575 dev/isa/ad1848.c sc->sc_dma_cnt = cc;
sc 1576 dev/isa/ad1848.c isa_dmastart(sc->sc_isa, sc->sc_drq, p, cc, NULL,
sc 1580 dev/isa/ad1848.c sc->sc_playrun = PCMRUNNING;
sc 1582 dev/isa/ad1848.c if (sc->precision == 16)
sc 1584 dev/isa/ad1848.c if (sc->channels == 2)
sc 1588 dev/isa/ad1848.c if (sc->sc_lastcc != cc || sc->sc_mode != AUMODE_PLAY) {
sc 1589 dev/isa/ad1848.c ad_write(sc, SP_LOWER_BASE_COUNT, (u_char)(cc & 0xff));
sc 1590 dev/isa/ad1848.c ad_write(sc, SP_UPPER_BASE_COUNT, (u_char)((cc >> 8) & 0xff));
sc 1592 dev/isa/ad1848.c reg = ad_read(sc, SP_INTERFACE_CONFIG);
sc 1593 dev/isa/ad1848.c ad_write(sc, SP_INTERFACE_CONFIG, (PLAYBACK_ENABLE|reg));
sc 1595 dev/isa/ad1848.c sc->sc_lastcc = cc;
sc 1596 dev/isa/ad1848.c sc->sc_mode = AUMODE_PLAY;
sc 1610 dev/isa/ad1848.c struct ad1848_softc *sc = arg;
sc 1615 dev/isa/ad1848.c status = ADREAD(sc, AD1848_STATUS);
sc 1619 dev/isa/ad1848.c printf("ad1848_intr: intr=%p status=%x\n", sc->sc_intr, status);
sc 1621 dev/isa/ad1848.c sc->sc_locked = 0;
sc 1622 dev/isa/ad1848.c sc->sc_interrupts++;
sc 1625 dev/isa/ad1848.c if (sc->sc_intr && (status & INTERRUPT_STATUS)) {
sc 1628 dev/isa/ad1848.c if ((sc->sc_dma_flags & DMAMODE_READ) && sc->sc_recrun == NOTRUNNING)
sc 1629 dev/isa/ad1848.c isa_dmadone(sc->sc_isa, sc->sc_recdrq);
sc 1630 dev/isa/ad1848.c (*sc->sc_intr)(sc->sc_arg);
sc 1636 dev/isa/ad1848.c ADWRITE(sc, AD1848_STATUS, 0);
sc 1649 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 1652 dev/isa/ad1848.c if (sc->sc_mode == AUMODE_RECORD)
sc 1653 dev/isa/ad1848.c drq = sc->sc_recdrq == -1 ? sc->sc_drq : sc->sc_recdrq;
sc 1655 dev/isa/ad1848.c drq = sc->sc_drq;
sc 1657 dev/isa/ad1848.c return isa_malloc(sc->sc_isa, drq, size, pool, flags);
sc 1694 dev/isa/ad1848.c struct ad1848_softc *sc = addr;
sc 1697 dev/isa/ad1848.c (sc->sc_drq != sc->sc_recdrq ? AUDIO_PROP_FULLDUPLEX : 0);
sc 195 dev/isa/addcom_isa.c struct addcom_softc *sc = (void *)self;
sc 202 dev/isa/addcom_isa.c sc->sc_iot = ia->ia_iot;
sc 203 dev/isa/addcom_isa.c sc->sc_iobase = ia->ia_iobase;
sc 211 dev/isa/addcom_isa.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 212 dev/isa/addcom_isa.c IPL_TTY, addcomintr, sc, sc->sc_dev.dv_xname);
sc 213 dev/isa/addcom_isa.c if (sc->sc_ih == NULL) {
sc 219 dev/isa/addcom_isa.c 0, &sc->sc_statusioh)) {
sc 225 dev/isa/addcom_isa.c iobase = sc->sc_iobase
sc 231 dev/isa/addcom_isa.c &sc->sc_slaveioh[i])) {
sc 241 dev/isa/addcom_isa.c ca.ca_iot = sc->sc_iot;
sc 242 dev/isa/addcom_isa.c ca.ca_ioh = sc->sc_slaveioh[i];
sc 243 dev/isa/addcom_isa.c ca.ca_iobase = sc->sc_iobase
sc 248 dev/isa/addcom_isa.c sc->sc_slaves[i] = config_found(self, &ca, addcomprint);
sc 249 dev/isa/addcom_isa.c if (sc->sc_slaves[i] != NULL)
sc 250 dev/isa/addcom_isa.c sc->sc_alive[i] = 1;
sc 259 dev/isa/addcom_isa.c struct addcom_softc *sc = arg;
sc 265 dev/isa/addcom_isa.c if (sc->sc_alive[i] && comintr(sc->sc_slaves[i])) {
sc 130 dev/isa/aha.c #define wmbx (sc->sc_mbx)
sc 213 dev/isa/aha.c aha_cmd(iobase, sc, icnt, ibuf, ocnt, obuf)
sc 215 dev/isa/aha.c struct aha_softc *sc;
sc 225 dev/isa/aha.c if (sc != NULL)
sc 226 dev/isa/aha.c name = sc->sc_dev.dv_xname;
sc 379 dev/isa/aha.c struct aha_softc *sc = (void *)self;
sc 388 dev/isa/aha.c if (aha_find(ia, sc, isapnp) != 0)
sc 390 dev/isa/aha.c sc->sc_iobase = ia->ia_iobase;
sc 391 dev/isa/aha.c sc->sc_dmat = ia->ia_dmat;
sc 393 dev/isa/aha.c if (sc->sc_drq != DRQUNK && isapnp == 0)
sc 394 dev/isa/aha.c isadma_cascade(sc->sc_drq);
sc 396 dev/isa/aha.c aha_inquire_setup_information(sc);
sc 397 dev/isa/aha.c aha_init(sc);
sc 398 dev/isa/aha.c TAILQ_INIT(&sc->sc_free_ccb);
sc 399 dev/isa/aha.c TAILQ_INIT(&sc->sc_waiting_ccb);
sc 404 dev/isa/aha.c sc->sc_link.adapter_softc = sc;
sc 405 dev/isa/aha.c sc->sc_link.adapter_target = sc->sc_scsi_dev;
sc 406 dev/isa/aha.c sc->sc_link.adapter = &aha_switch;
sc 407 dev/isa/aha.c sc->sc_link.device = &aha_dev;
sc 408 dev/isa/aha.c sc->sc_link.openings = 2;
sc 411 dev/isa/aha.c saa.saa_sc_link = &sc->sc_link;
sc 413 dev/isa/aha.c sc->sc_ih = isa_intr_establish(ia->ia_ic, sc->sc_irq, IST_EDGE,
sc 414 dev/isa/aha.c IPL_BIO, ahaintr, sc, sc->sc_dev.dv_xname);
sc 423 dev/isa/aha.c aha_finish_ccbs(sc)
sc 424 dev/isa/aha.c struct aha_softc *sc;
sc 436 dev/isa/aha.c sc->sc_dev.dv_xname);
sc 443 dev/isa/aha.c sc->sc_dev.dv_xname);
sc 450 dev/isa/aha.c ccb = aha_ccb_phys_kv(sc, phystol(wmbi->ccb_addr));
sc 453 dev/isa/aha.c sc->sc_dev.dv_xname);
sc 494 dev/isa/aha.c sc->sc_dev.dv_xname, wmbi->stat);
sc 500 dev/isa/aha.c bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmam, 0,
sc 502 dev/isa/aha.c aha_done(sc, ccb);
sc 519 dev/isa/aha.c struct aha_softc *sc = arg;
sc 520 dev/isa/aha.c int iobase = sc->sc_iobase;
sc 525 dev/isa/aha.c printf("%s: ahaintr ", sc->sc_dev.dv_xname);
sc 539 dev/isa/aha.c aha_collect_mbo(sc);
sc 548 dev/isa/aha.c aha_cmd(iobase, sc, sizeof(toggle.cmd), (u_char *)&toggle.cmd,
sc 550 dev/isa/aha.c aha_start_ccbs(sc);
sc 555 dev/isa/aha.c aha_finish_ccbs(sc);
sc 561 dev/isa/aha.c aha_reset_ccb(sc, ccb)
sc 562 dev/isa/aha.c struct aha_softc *sc;
sc 573 dev/isa/aha.c aha_free_ccb(sc, ccb)
sc 574 dev/isa/aha.c struct aha_softc *sc;
sc 583 dev/isa/aha.c bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmam);
sc 588 dev/isa/aha.c hashccb = &sc->sc_ccbhash[hashnum];
sc 599 dev/isa/aha.c aha_reset_ccb(sc, ccb);
sc 600 dev/isa/aha.c TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain);
sc 607 dev/isa/aha.c wakeup(&sc->sc_free_ccb);
sc 613 dev/isa/aha.c aha_init_ccb(sc, ccb, flags)
sc 614 dev/isa/aha.c struct aha_softc *sc;
sc 621 dev/isa/aha.c aha_reset_ccb(sc, ccb);
sc 625 dev/isa/aha.c error = bus_dmamap_create(sc->sc_dmat, MAXPHYS, (MAXPHYS / NBPG) + 1,
sc 632 dev/isa/aha.c error = bus_dmamap_create(sc->sc_dmat, CCB_PHYS_SIZE, 1, CCB_PHYS_SIZE,
sc 641 dev/isa/aha.c bus_dmamap_destroy(sc->sc_dmat, ccb->dmam);
sc 652 dev/isa/aha.c aha_get_ccb(sc, flags)
sc 653 dev/isa/aha.c struct aha_softc *sc;
sc 666 dev/isa/aha.c ccb = TAILQ_FIRST(&sc->sc_free_ccb);
sc 668 dev/isa/aha.c TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain);
sc 671 dev/isa/aha.c if (sc->sc_numccbs < AHA_CCB_MAX) {
sc 676 dev/isa/aha.c sc->sc_dev.dv_xname);
sc 679 dev/isa/aha.c if (aha_init_ccb(sc, ccb, flags) == 0) {
sc 680 dev/isa/aha.c sc->sc_numccbs++;
sc 688 dev/isa/aha.c tsleep(&sc->sc_free_ccb, PRIBIO, "ahaccb", 0);
sc 693 dev/isa/aha.c if (bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmam, ccb, CCB_PHYS_SIZE,
sc 695 dev/isa/aha.c aha_free_ccb(sc, ccb);
sc 699 dev/isa/aha.c ccb->nexthash = sc->sc_ccbhash[hashnum];
sc 700 dev/isa/aha.c sc->sc_ccbhash[hashnum] = ccb;
sc 711 dev/isa/aha.c aha_ccb_phys_kv(sc, ccb_phys)
sc 712 dev/isa/aha.c struct aha_softc *sc;
sc 716 dev/isa/aha.c struct aha_ccb *ccb = sc->sc_ccbhash[hashnum];
sc 730 dev/isa/aha.c aha_queue_ccb(sc, ccb)
sc 731 dev/isa/aha.c struct aha_softc *sc;
sc 735 dev/isa/aha.c TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain);
sc 736 dev/isa/aha.c aha_start_ccbs(sc);
sc 743 dev/isa/aha.c aha_collect_mbo(sc)
sc 744 dev/isa/aha.c struct aha_softc *sc;
sc 753 dev/isa/aha.c while (sc->sc_mbofull > 0) {
sc 758 dev/isa/aha.c ccb = aha_ccb_phys_kv(sc, phystol(wmbo->ccb_addr));
sc 761 dev/isa/aha.c sc->sc_dev.dv_xname);
sc 766 dev/isa/aha.c --sc->sc_mbofull;
sc 777 dev/isa/aha.c aha_start_ccbs(sc)
sc 778 dev/isa/aha.c struct aha_softc *sc;
sc 780 dev/isa/aha.c int iobase = sc->sc_iobase;
sc 786 dev/isa/aha.c while ((ccb = TAILQ_FIRST(&sc->sc_waiting_ccb)) != NULL) {
sc 787 dev/isa/aha.c if (sc->sc_mbofull >= AHA_MBX_SIZE) {
sc 788 dev/isa/aha.c aha_collect_mbo(sc);
sc 789 dev/isa/aha.c if (sc->sc_mbofull >= AHA_MBX_SIZE) {
sc 794 dev/isa/aha.c aha_cmd(iobase, sc, sizeof(toggle.cmd),
sc 800 dev/isa/aha.c TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain);
sc 806 dev/isa/aha.c bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmam, 0,
sc 822 dev/isa/aha.c ++sc->sc_mbofull;
sc 835 dev/isa/aha.c aha_done(sc, ccb)
sc 836 dev/isa/aha.c struct aha_softc *sc;
sc 850 dev/isa/aha.c sc->sc_dev.dv_xname);
sc 857 dev/isa/aha.c sc->sc_dev.dv_xname);
sc 869 dev/isa/aha.c sc->sc_dev.dv_xname, ccb->host_stat);
sc 888 dev/isa/aha.c sc->sc_dev.dv_xname, ccb->target_stat);
sc 904 dev/isa/aha.c bus_dmamap_sync(sc->sc_dmat, ccb->dmam, 0,
sc 907 dev/isa/aha.c bus_dmamap_sync(sc->sc_dmat, ccb->dmam, 0,
sc 909 dev/isa/aha.c bus_dmamap_unload(sc->sc_dmat, ccb->dmam);
sc 911 dev/isa/aha.c aha_free_ccb(sc, ccb);
sc 919 dev/isa/aha.c aha_find(ia, sc, isapnp)
sc 921 dev/isa/aha.c struct aha_softc *sc;
sc 958 dev/isa/aha.c aha_cmd(iobase, sc, sizeof(config.cmd), (u_char *)&config.cmd,
sc 1011 dev/isa/aha.c if (sc != NULL) {
sc 1013 dev/isa/aha.c sc->sc_scsi_dev = config.reply.scsi_dev;
sc 1015 dev/isa/aha.c sc->sc_iobase = iobase;
sc 1016 dev/isa/aha.c sc->sc_irq = irq;
sc 1017 dev/isa/aha.c sc->sc_drq = drq;
sc 1038 dev/isa/aha.c aha_init(sc)
sc 1039 dev/isa/aha.c struct aha_softc *sc;
sc 1041 dev/isa/aha.c int iobase = sc->sc_iobase;
sc 1058 dev/isa/aha.c if (!strncmp(sc->sc_model, "1542C", 5)) {
sc 1063 dev/isa/aha.c sc->sc_dev.dv_xname);
sc 1065 dev/isa/aha.c aha_cmd(iobase, sc, sizeof(extbios.cmd),
sc 1071 dev/isa/aha.c sc->sc_dev.dv_xname,
sc 1078 dev/isa/aha.c aha_cmd(iobase, sc, sizeof(unlock.cmd), (u_char *)&unlock.cmd,
sc 1086 dev/isa/aha.c aha_cmd(sc, 1, 0, 0, 0, AHA_BUS_ON_TIME_SET, 7);
sc 1087 dev/isa/aha.c aha_cmd(sc, 1, 0, 0, 0, AHA_BUS_OFF_TIME_SET, 4);
sc 1092 dev/isa/aha.c aha_cmd(iobase, sc, sizeof(devices.cmd), (u_char *)&devices.cmd,
sc 1098 dev/isa/aha.c aha_cmd(iobase, sc, sizeof(setup.cmd), (u_char *)&setup.cmd,
sc 1102 dev/isa/aha.c sc->sc_dev.dv_xname,
sc 1112 dev/isa/aha.c sc->sc_dev.dv_xname, i, setup.reply.sync[i].offset,
sc 1149 dev/isa/aha.c sc->sc_mbofull = 0;
sc 1155 dev/isa/aha.c aha_cmd(iobase, sc, sizeof(mailbox.cmd), (u_char *)&mailbox.cmd,
sc 1160 dev/isa/aha.c aha_inquire_setup_information(sc)
sc 1161 dev/isa/aha.c struct aha_softc *sc;
sc 1163 dev/isa/aha.c int iobase = sc->sc_iobase;
sc 1169 dev/isa/aha.c strlcpy(sc->sc_model, "unknown", sizeof sc->sc_model);
sc 1178 dev/isa/aha.c if (aha_cmd(iobase, sc, sizeof(revision.cmd), (u_char *)&revision.cmd,
sc 1204 dev/isa/aha.c sc->sc_dev.dv_xname,
sc 1211 dev/isa/aha.c strlcpy(sc->sc_model, "1540", sizeof sc->sc_model);
sc 1214 dev/isa/aha.c strlcpy(sc->sc_model, "1540A/1542A/1542B", sizeof sc->sc_model);
sc 1217 dev/isa/aha.c strlcpy(sc->sc_model, "1640", sizeof sc->sc_model);
sc 1221 dev/isa/aha.c strlcpy(sc->sc_model, "1542C", sizeof sc->sc_model);
sc 1224 dev/isa/aha.c strlcpy(sc->sc_model, "1542CF", sizeof sc->sc_model);
sc 1227 dev/isa/aha.c strlcpy(sc->sc_model, "1542CP", sizeof sc->sc_model);
sc 1231 dev/isa/aha.c p = sc->sc_firmware;
sc 1238 dev/isa/aha.c printf(": model AHA-%s, firmware %s\n", sc->sc_model, sc->sc_firmware);
sc 1260 dev/isa/aha.c struct aha_softc *sc = sc_link->adapter_softc;
sc 1277 dev/isa/aha.c if ((ccb = aha_get_ccb(sc, flags)) == NULL) {
sc 1322 dev/isa/aha.c if (bus_dmamap_load(sc->sc_dmat, ccb->dmam, xs->data,
sc 1324 dev/isa/aha.c aha_free_ccb(sc, ccb);
sc 1336 dev/isa/aha.c bus_dmamap_sync(sc->sc_dmat, ccb->dmam, 0,
sc 1339 dev/isa/aha.c bus_dmamap_sync(sc->sc_dmat, ccb->dmam, 0,
sc 1363 dev/isa/aha.c aha_queue_ccb(sc, ccb);
sc 1376 dev/isa/aha.c bus_dmamap_sync(sc->sc_dmat, ccb->dmam, 0,
sc 1380 dev/isa/aha.c bus_dmamap_sync(sc->sc_dmat, ccb->dmam, 0,
sc 1383 dev/isa/aha.c bus_dmamap_unload(sc->sc_dmat, ccb->dmam);
sc 1385 dev/isa/aha.c aha_free_ccb(sc, ccb);
sc 1398 dev/isa/aha.c if (aha_poll(sc, xs, ccb->timeout)) {
sc 1400 dev/isa/aha.c if (aha_poll(sc, xs, ccb->timeout))
sc 1410 dev/isa/aha.c aha_poll(sc, xs, count)
sc 1411 dev/isa/aha.c struct aha_softc *sc;
sc 1415 dev/isa/aha.c int iobase = sc->sc_iobase;
sc 1426 dev/isa/aha.c ahaintr(sc);
sc 1444 dev/isa/aha.c struct aha_softc *sc;
sc 1448 dev/isa/aha.c bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmam, 0,
sc 1452 dev/isa/aha.c sc = sc_link->adapter_softc;
sc 1461 dev/isa/aha.c aha_collect_mbo(sc);
sc 1463 dev/isa/aha.c printf("%s: not taking commands!\n", sc->sc_dev.dv_xname);
sc 1483 dev/isa/aha.c aha_queue_ccb(sc, ccb);
sc 129 dev/isa/aic_isa.c struct aic_softc *sc = (void *)self;
sc 132 dev/isa/aic_isa.c panic("%s: could not map I/O-ports", sc->sc_dev.dv_xname);
sc 134 dev/isa/aic_isa.c sc->sc_iot = iot;
sc 135 dev/isa/aic_isa.c sc->sc_ioh = ioh;
sc 139 dev/isa/aic_isa.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 140 dev/isa/aic_isa.c IPL_BIO, aicintr, sc, sc->sc_dev.dv_xname);
sc 142 dev/isa/aic_isa.c aicattach(sc);
sc 82 dev/isa/aic_isapnp.c struct aic_softc *sc = (void *)self;
sc 87 dev/isa/aic_isapnp.c sc->sc_iot = ia->ia_iot;
sc 88 dev/isa/aic_isapnp.c sc->sc_ioh = ia->ia_ioh;
sc 89 dev/isa/aic_isapnp.c sc->sc_irq = ia->ia_irq;
sc 90 dev/isa/aic_isapnp.c sc->sc_drq = ia->ia_drq;
sc 93 dev/isa/aic_isapnp.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 94 dev/isa/aic_isapnp.c IPL_BIO, aicintr, sc, sc->sc_dev.dv_xname);
sc 96 dev/isa/aic_isapnp.c sc->sc_iot, sc->sc_ioh, sc->sc_irq, sc->sc_drq));
sc 97 dev/isa/aic_isapnp.c aicattach(sc);
sc 106 dev/isa/aps.c void aps_refresh_sensor_data(struct aps_softc *sc);
sc 185 dev/isa/aps.c struct aps_softc *sc = (void *)self;
sc 192 dev/isa/aps.c iot = sc->aps_iot = ia->ia_iot;
sc 194 dev/isa/aps.c if (bus_space_map(iot, iobase, APS_ADDR_SIZE, 0, &sc->aps_ioh)) {
sc 199 dev/isa/aps.c ioh = sc->aps_ioh;
sc 206 dev/isa/aps.c sc->sensors[APS_SENSOR_XACCEL].type = SENSOR_INTEGER;
sc 207 dev/isa/aps.c snprintf(sc->sensors[APS_SENSOR_XACCEL].desc,
sc 208 dev/isa/aps.c sizeof(sc->sensors[APS_SENSOR_XACCEL].desc), "X_ACCEL");
sc 210 dev/isa/aps.c sc->sensors[APS_SENSOR_YACCEL].type = SENSOR_INTEGER;
sc 211 dev/isa/aps.c snprintf(sc->sensors[APS_SENSOR_YACCEL].desc,
sc 212 dev/isa/aps.c sizeof(sc->sensors[APS_SENSOR_YACCEL].desc), "Y_ACCEL");
sc 214 dev/isa/aps.c sc->sensors[APS_SENSOR_TEMP1].type = SENSOR_TEMP;
sc 215 dev/isa/aps.c sc->sensors[APS_SENSOR_TEMP2].type = SENSOR_TEMP;
sc 217 dev/isa/aps.c sc->sensors[APS_SENSOR_XVAR].type = SENSOR_INTEGER;
sc 218 dev/isa/aps.c snprintf(sc->sensors[APS_SENSOR_XVAR].desc,
sc 219 dev/isa/aps.c sizeof(sc->sensors[APS_SENSOR_XVAR].desc), "X_VAR");
sc 221 dev/isa/aps.c sc->sensors[APS_SENSOR_YVAR].type = SENSOR_INTEGER;
sc 222 dev/isa/aps.c snprintf(sc->sensors[APS_SENSOR_YVAR].desc,
sc 223 dev/isa/aps.c sizeof(sc->sensors[APS_SENSOR_YVAR].desc), "Y_VAR");
sc 225 dev/isa/aps.c sc->sensors[APS_SENSOR_KBACT].type = SENSOR_INDICATOR;
sc 226 dev/isa/aps.c snprintf(sc->sensors[APS_SENSOR_KBACT].desc,
sc 227 dev/isa/aps.c sizeof(sc->sensors[APS_SENSOR_KBACT].desc), "Keyboard Active");
sc 229 dev/isa/aps.c sc->sensors[APS_SENSOR_MSACT].type = SENSOR_INDICATOR;
sc 230 dev/isa/aps.c snprintf(sc->sensors[APS_SENSOR_MSACT].desc,
sc 231 dev/isa/aps.c sizeof(sc->sensors[APS_SENSOR_MSACT].desc), "Mouse Active");
sc 233 dev/isa/aps.c sc->sensors[APS_SENSOR_LIDOPEN].type = SENSOR_INDICATOR;
sc 234 dev/isa/aps.c snprintf(sc->sensors[APS_SENSOR_LIDOPEN].desc,
sc 235 dev/isa/aps.c sizeof(sc->sensors[APS_SENSOR_LIDOPEN].desc), "Lid Open");
sc 238 dev/isa/aps.c strlcpy(sc->sensordev.xname, sc->sc_dev.dv_xname,
sc 239 dev/isa/aps.c sizeof(sc->sensordev.xname));
sc 241 dev/isa/aps.c sensor_attach(&sc->sensordev, &sc->sensors[i]);
sc 243 dev/isa/aps.c sensordev_install(&sc->sensordev);
sc 245 dev/isa/aps.c powerhook_establish(aps_power, (void *)sc);
sc 248 dev/isa/aps.c timeout_set(&aps_timeout, aps_refresh, sc);
sc 252 dev/isa/aps.c printf("%s: failed to initialise\n", sc->sc_dev.dv_xname);
sc 311 dev/isa/aps.c aps_read_data(struct aps_softc *sc)
sc 313 dev/isa/aps.c bus_space_tag_t iot = sc->aps_iot;
sc 314 dev/isa/aps.c bus_space_handle_t ioh = sc->aps_ioh;
sc 316 dev/isa/aps.c sc->aps_data.state = bus_space_read_1(iot, ioh, APS_STATE);
sc 317 dev/isa/aps.c sc->aps_data.x_accel = bus_space_read_2(iot, ioh, APS_XACCEL);
sc 318 dev/isa/aps.c sc->aps_data.y_accel = bus_space_read_2(iot, ioh, APS_YACCEL);
sc 319 dev/isa/aps.c sc->aps_data.temp1 = bus_space_read_1(iot, ioh, APS_TEMP);
sc 320 dev/isa/aps.c sc->aps_data.x_var = bus_space_read_2(iot, ioh, APS_XVAR);
sc 321 dev/isa/aps.c sc->aps_data.y_var = bus_space_read_2(iot, ioh, APS_YVAR);
sc 322 dev/isa/aps.c sc->aps_data.temp2 = bus_space_read_1(iot, ioh, APS_TEMP2);
sc 323 dev/isa/aps.c sc->aps_data.input = bus_space_read_1(iot, ioh, APS_INPUT);
sc 329 dev/isa/aps.c aps_refresh_sensor_data(struct aps_softc *sc)
sc 331 dev/isa/aps.c bus_space_tag_t iot = sc->aps_iot;
sc 332 dev/isa/aps.c bus_space_handle_t ioh = sc->aps_ioh;
sc 341 dev/isa/aps.c aps_read_data(sc);
sc 350 dev/isa/aps.c sc->sensors[i].flags &= ~SENSOR_FINVALID;
sc 353 dev/isa/aps.c sc->sensors[APS_SENSOR_XACCEL].value = sc->aps_data.x_accel;
sc 354 dev/isa/aps.c sc->sensors[APS_SENSOR_YACCEL].value = sc->aps_data.y_accel;
sc 357 dev/isa/aps.c temp = sc->aps_data.temp1 * 1000000;
sc 360 dev/isa/aps.c sc->sensors[APS_SENSOR_TEMP1].value = temp;
sc 363 dev/isa/aps.c temp = sc->aps_data.temp2 * 1000000;
sc 366 dev/isa/aps.c sc->sensors[APS_SENSOR_TEMP2].value = temp;
sc 368 dev/isa/aps.c sc->sensors[APS_SENSOR_XVAR].value = sc->aps_data.x_var;
sc 369 dev/isa/aps.c sc->sensors[APS_SENSOR_YVAR].value = sc->aps_data.y_var;
sc 370 dev/isa/aps.c sc->sensors[APS_SENSOR_KBACT].value =
sc 371 dev/isa/aps.c (sc->aps_data.input & APS_INPUT_KB) ? 1 : 0;
sc 372 dev/isa/aps.c sc->sensors[APS_SENSOR_MSACT].value =
sc 373 dev/isa/aps.c (sc->aps_data.input & APS_INPUT_MS) ? 1 : 0;
sc 374 dev/isa/aps.c sc->sensors[APS_SENSOR_LIDOPEN].value =
sc 375 dev/isa/aps.c (sc->aps_data.input & APS_INPUT_LIDOPEN) ? 1 : 0;
sc 381 dev/isa/aps.c struct aps_softc *sc = (struct aps_softc *)arg;
sc 383 dev/isa/aps.c aps_refresh_sensor_data(sc);
sc 390 dev/isa/aps.c struct aps_softc *sc = (struct aps_softc *)arg;
sc 391 dev/isa/aps.c bus_space_tag_t iot = sc->aps_iot;
sc 392 dev/isa/aps.c bus_space_handle_t ioh = sc->aps_ioh;
sc 277 dev/isa/aria.c register struct aria_softc *sc = (void *)self;
sc 279 dev/isa/aria.c struct cfdata *cf = sc->sc_dev.dv_cfdata;
sc 291 dev/isa/aria.c sc->sc_iobase = iobase;
sc 298 dev/isa/aria.c sc->sc_irq = ia->ia_irq;
sc 303 dev/isa/aria.c if (aria_reset(sc) != 0) {
sc 411 dev/isa/aria.c register struct aria_softc *sc = (struct aria_softc *)self;
sc 417 dev/isa/aria.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 418 dev/isa/aria.c IPL_AUDIO, aria_intr, sc, sc->sc_dev.dv_xname);
sc 422 dev/isa/aria.c sc->sc_hardware = 0;
sc 423 dev/isa/aria.c sc->sc_hardware |= ((i>>13)&0x01==1)?ARIA_TELEPHONE:0;
sc 424 dev/isa/aria.c sc->sc_hardware |= (((i>>5)&0x07)==0x04)?ARIA_MIXER:0;
sc 425 dev/isa/aria.c sc->sc_hardware |= (aria_getdspmem(iobase, ARIAA_MODEL_A)==1)?ARIA_MODEL:0;
sc 427 dev/isa/aria.c sc->sc_open = 0;
sc 428 dev/isa/aria.c sc->sc_play = 0;
sc 429 dev/isa/aria.c sc->sc_record = 0;
sc 430 dev/isa/aria.c sc->sc_rate = 7875;
sc 431 dev/isa/aria.c sc->sc_chans = 1;
sc 432 dev/isa/aria.c sc->sc_change = 1;
sc 433 dev/isa/aria.c sc->sc_blocksize = 1024;
sc 434 dev/isa/aria.c sc->sc_precision = 8;
sc 435 dev/isa/aria.c sc->sc_rintr = 0;
sc 436 dev/isa/aria.c sc->sc_rarg = 0;
sc 437 dev/isa/aria.c sc->sc_pintr = 0;
sc 438 dev/isa/aria.c sc->sc_parg = 0;
sc 439 dev/isa/aria.c sc->gain[0] = 127;
sc 440 dev/isa/aria.c sc->gain[1] = 127;
sc 444 dev/isa/aria.c sc->aria_mix[i].num_channels = 1;
sc 446 dev/isa/aria.c sc->aria_mix[i].num_channels = 2;
sc 447 dev/isa/aria.c sc->aria_mix[i].level[0] = 127;
sc 448 dev/isa/aria.c sc->aria_mix[i].level[1] = 127;
sc 451 dev/isa/aria.c sc->ariamix_master.num_channels = 2;
sc 452 dev/isa/aria.c sc->ariamix_master.level[0] = 222;
sc 453 dev/isa/aria.c sc->ariamix_master.level[1] = 222;
sc 454 dev/isa/aria.c sc->ariamix_master.bass[0] = 127;
sc 455 dev/isa/aria.c sc->ariamix_master.bass[1] = 127;
sc 456 dev/isa/aria.c sc->ariamix_master.treble[0] = 127;
sc 457 dev/isa/aria.c sc->ariamix_master.treble[1] = 127;
sc 458 dev/isa/aria.c sc->aria_mix_source = 0;
sc 460 dev/isa/aria.c sc->sc_change = 1;
sc 461 dev/isa/aria.c aria_commit_settings(sc); /* so that my cdplayer is at the 'right' vol */
sc 463 dev/isa/aria.c printf(": dsp %s", (ARIA_MODEL&sc->sc_hardware)?"SC18026":"SC18025");
sc 464 dev/isa/aria.c if (ARIA_TELEPHONE&sc->sc_hardware)
sc 466 dev/isa/aria.c if (ARIA_MIXER&sc->sc_hardware)
sc 471 dev/isa/aria.c (ARIA_MODEL&sc->sc_hardware?"SC18026":"SC18025"));
sc 473 dev/isa/aria.c if ((err = audio_hardware_attach(&aria_hw_if, sc)) != 0)
sc 486 dev/isa/aria.c struct aria_softc *sc;
sc 487 dev/isa/aria.c register u_short iobase = sc->sc_iobase;
sc 496 dev/isa/aria.c sc = aria_cd.cd_devs[unit];
sc 498 dev/isa/aria.c if (!sc || sc->sc_open != 0)
sc 501 dev/isa/aria.c sc->sc_open = 0;
sc 503 dev/isa/aria.c sc->sc_open |= ARIAR_OPEN_RECORD;
sc 505 dev/isa/aria.c sc->sc_open |= ARIAR_OPEN_PLAY;
sc 506 dev/isa/aria.c sc->sc_play = 0;
sc 507 dev/isa/aria.c sc->sc_record= 0;
sc 508 dev/isa/aria.c sc->sc_rintr = 0;
sc 509 dev/isa/aria.c sc->sc_rarg = 0;
sc 510 dev/isa/aria.c sc->sc_pintr = 0;
sc 511 dev/isa/aria.c sc->sc_parg = 0;
sc 512 dev/isa/aria.c sc->sc_change= 1;
sc 528 dev/isa/aria.c aria_printsc(struct aria_softc *sc)
sc 530 dev/isa/aria.c printf("open %x dmachan %d irq %d iobase %x nintr %d\n", sc->sc_open, sc->sc_drq,
sc 531 dev/isa/aria.c sc->sc_irq, sc->sc_iobase, sc->sc_interrupts);
sc 532 dev/isa/aria.c printf("irate %d encoding %x chans %d\n", sc->sc_rate, sc->encoding,
sc 533 dev/isa/aria.c sc->sc_chans);
sc 548 dev/isa/aria.c struct aria_softc *sc = addr;
sc 563 dev/isa/aria.c sc->sc_rate = sr;
sc 571 dev/isa/aria.c struct aria_softc *sc = addr;
sc 572 dev/isa/aria.c return sc->sc_rate;
sc 580 dev/isa/aria.c register struct aria_softc *sc = addr;
sc 604 dev/isa/aria.c register struct aria_softc *sc = addr;
sc 620 dev/isa/aria.c if (sc->encoding!=AUDIO_ENCODING_PCM16 && prec==16)
sc 623 dev/isa/aria.c sc->sc_encoding = enc;
sc 624 dev/isa/aria.c sc->sc_precision = prec;
sc 632 dev/isa/aria.c register struct aria_softc *sc = addr;
sc 636 dev/isa/aria.c return(sc->encoding);
sc 643 dev/isa/aria.c struct aria_softc *sc = addr;
sc 647 dev/isa/aria.c return sc->sc_precision;
sc 655 dev/isa/aria.c struct aria_softc *sc = addr;
sc 662 dev/isa/aria.c sc->sc_chans = chans;
sc 671 dev/isa/aria.c struct aria_softc *sc = addr;
sc 675 dev/isa/aria.c return sc->sc_chans;
sc 705 dev/isa/aria.c register struct aria_softc *sc = addr;
sc 712 dev/isa/aria.c sc->aria_mix_source = port;
sc 720 dev/isa/aria.c register struct aria_softc *sc = addr;
sc 724 dev/isa/aria.c return(sc->aria_mix_source);
sc 752 dev/isa/aria.c struct aria_softc *sc = addr;
sc 756 dev/isa/aria.c sc->sc_blocksize = i;
sc 757 dev/isa/aria.c sc->sc_change = 1;
sc 769 dev/isa/aria.c struct aria_softc *sc = addr;
sc 770 dev/isa/aria.c register u_short iobase = sc->sc_iobase;
sc 779 dev/isa/aria.c switch (sc->sc_rate) {
sc 789 dev/isa/aria.c format |= (sc->sc_chans==2)?1:0;
sc 790 dev/isa/aria.c format |= (sc->sc_precision==16)?2:0;
sc 795 dev/isa/aria.c if (sc->sc_hardware&ARIA_MIXER) {
sc 809 dev/isa/aria.c if (sc->aria_mix[i].mute == 1)
sc 812 dev/isa/aria.c aria_sendcmd(iobase, ARIADSPC_INPMONMODE, source, (sc->aria_mix[i].num_channels==2)?0:1, -1);
sc 814 dev/isa/aria.c aria_sendcmd(iobase, ARIADSPC_INPMONMODE, 0x8000|source, (sc->aria_mix[i].num_channels==2)?0:1, -1);
sc 815 dev/isa/aria.c aria_sendcmd(iobase, ARIADSPC_MIXERVOL, source, sc->aria_mix[i].level[0] << 7, sc->aria_mix[i].level[1] << 7);
sc 818 dev/isa/aria.c if (sc->aria_mix_source == i) {
sc 821 dev/isa/aria.c if (sc->sc_open & ARIAR_OPEN_RECORD)
sc 828 dev/isa/aria.c if (sc->sc_chans==2) {
sc 829 dev/isa/aria.c aria_sendcmd(iobase, ARIADSPC_CHAN_VOL, (sc->gain[0]+sc->gain[1])/2, -1, -1);
sc 830 dev/isa/aria.c aria_sendcmd(iobase, ARIADSPC_CHAN_PAN, (sc->gain[0]-sc->gain[1])/4+0x40, -1, -1);
sc 832 dev/isa/aria.c aria_sendcmd(iobase, ARIADSPC_CHAN_VOL, sc->gain[0], -1, -1);
sc 837 dev/isa/aria.c aria_sendcmd(iobase, ARIADSPC_MASMONMODE, (sc->ariamix_master.num_channels==2)?0:1, -1, -1);
sc 839 dev/isa/aria.c aria_sendcmd(iobase, ARIADSPC_MIXERVOL, 0x0004, sc->ariamix_master.level[0] << 7, sc->ariamix_master.level[1] << 7);
sc 843 dev/isa/aria.c left = tones[(sc->ariamix_master.bass[0]>>4)&0x0f]<<8 | tones[(sc->ariamix_master.treble[0]>>4)&0x0f];
sc 844 dev/isa/aria.c right = tones[(sc->ariamix_master.bass[1]>>4)&0x0f]<<8 | tones[(sc->ariamix_master.treble[1]>>4)&0x0f];
sc 849 dev/isa/aria.c if (sc->sc_change != 0)
sc 850 dev/isa/aria.c aria_sendcmd(iobase, ARIADSPC_BLOCKSIZE, sc->sc_blocksize/2, -1, -1);
sc 857 dev/isa/aria.c if (sc->sc_record&(1<<ARIAR_RECORD_CHAN)) {
sc 859 dev/isa/aria.c sc->sc_play |= (1<<ARIAR_RECORD_CHAN);
sc 862 dev/isa/aria.c if (sc->sc_play&(1<<ARIAR_PLAY_CHAN)) {
sc 864 dev/isa/aria.c sc->sc_play |= (1<<ARIAR_PLAY_CHAN);
sc 867 dev/isa/aria.c sc->sc_change = 0;
sc 876 dev/isa/aria.c struct aria_softc *sc = addr;
sc 877 dev/isa/aria.c register u_int iobase = sc->sc_iobase;
sc 879 dev/isa/aria.c DPRINTF(("aria_close sc=0x%x\n", sc));
sc 881 dev/isa/aria.c sc->spkr_state = SPKR_OFF;
sc 882 dev/isa/aria.c sc->sc_rintr = 0;
sc 883 dev/isa/aria.c sc->sc_pintr = 0;
sc 884 dev/isa/aria.c sc->sc_rdiobuffer = 0;
sc 885 dev/isa/aria.c sc->sc_pdiobuffer = 0;
sc 887 dev/isa/aria.c if (sc->sc_play&(1<<ARIAR_PLAY_CHAN) && sc->sc_open & ARIAR_OPEN_PLAY) {
sc 889 dev/isa/aria.c sc->sc_play &= ~(1<<ARIAR_PLAY_CHAN);
sc 892 dev/isa/aria.c if (sc->sc_record&(1<<ARIAR_RECORD_CHAN) && sc->sc_open & ARIAR_OPEN_RECORD) {
sc 894 dev/isa/aria.c sc->sc_record &= ~(1<<ARIAR_RECORD_CHAN);
sc 897 dev/isa/aria.c sc->sc_open = 0;
sc 899 dev/isa/aria.c if (aria_reset(sc) != 0) {
sc 901 dev/isa/aria.c aria_reset(sc);
sc 910 dev/isa/aria.c aria_reset(sc)
sc 911 dev/isa/aria.c register struct aria_softc *sc;
sc 913 dev/isa/aria.c register u_short iobase = sc->sc_iobase;
sc 1025 dev/isa/aria.c register struct aria_softc *sc = addr;
sc 1029 dev/isa/aria.c if (sc->sc_record&(1<<0)) {
sc 1030 dev/isa/aria.c aria_sendcmd(sc->sc_iobase, ARIADSPC_STOP_REC, 0, -1, -1);
sc 1031 dev/isa/aria.c sc->sc_record &= ~(1<<0);
sc 1041 dev/isa/aria.c register struct aria_softc *sc = addr;
sc 1045 dev/isa/aria.c if (sc->sc_play & (1<<1)) {
sc 1046 dev/isa/aria.c aria_sendcmd(sc->sc_iobase, ARIADSPC_STOP_PLAY, 1, -1, -1);
sc 1047 dev/isa/aria.c sc->sc_play &= ~(1<<1);
sc 1060 dev/isa/aria.c register struct aria_softc *sc = addr;
sc 1064 dev/isa/aria.c if (!(sc->sc_record&(1<<0)) && (sc->sc_open&ARIAR_OPEN_RECORD)) {
sc 1065 dev/isa/aria.c aria_sendcmd(sc->sc_iobase, ARIADSPC_START_REC, ARIAR_RECORD_CHAN, -1, -1);
sc 1066 dev/isa/aria.c sc->sc_record |= ~(1<<ARIAR_RECORD_CHAN);
sc 1069 dev/isa/aria.c if (!(sc->sc_play&(1<<ARIAR_PLAY_CHAN)) && (sc->sc_open&ARIAR_OPEN_PLAY)) {
sc 1070 dev/isa/aria.c aria_sendcmd(sc->sc_iobase, ARIADSPC_START_PLAY, 1, -1, -1);
sc 1071 dev/isa/aria.c sc->sc_play |= ~(1<<ARIAR_PLAY_CHAN);
sc 1090 dev/isa/aria.c register struct aria_softc *sc = addr;
sc 1095 dev/isa/aria.c if (cc != sc->sc_blocksize) {
sc 1097 dev/isa/aria.c cc, sc->sc_blocksize));
sc 1101 dev/isa/aria.c sc->sc_rarg = arg;
sc 1102 dev/isa/aria.c sc->sc_rintr = intr;
sc 1103 dev/isa/aria.c sc->sc_rdiobuffer = p;
sc 1105 dev/isa/aria.c if (!(sc->sc_record&(1<<0))) {
sc 1106 dev/isa/aria.c aria_sendcmd(sc->sc_iobase, ARIADSPC_START_REC, 0, -1, -1);
sc 1107 dev/isa/aria.c sc->sc_record |= (1<<0);
sc 1121 dev/isa/aria.c register struct aria_softc *sc = addr;
sc 1126 dev/isa/aria.c if (cc != sc->sc_blocksize) {
sc 1128 dev/isa/aria.c cc, sc->sc_blocksize));
sc 1132 dev/isa/aria.c sc->sc_parg = arg;
sc 1133 dev/isa/aria.c sc->sc_pintr = intr;
sc 1134 dev/isa/aria.c sc->sc_pdiobuffer = p;
sc 1136 dev/isa/aria.c if (!(sc->sc_play&(1<<1))) {
sc 1137 dev/isa/aria.c aria_sendcmd(sc->sc_iobase, ARIADSPC_START_PLAY, 1, -1, -1);
sc 1138 dev/isa/aria.c sc->sc_play |= (1<<1);
sc 1153 dev/isa/aria.c register struct aria_softc *sc = arg;
sc 1154 dev/isa/aria.c register u_short iobase = sc->sc_iobase;
sc 1155 dev/isa/aria.c register u_short *pdata = sc->sc_pdiobuffer;
sc 1156 dev/isa/aria.c register u_short *rdata = sc->sc_rdiobuffer;
sc 1163 dev/isa/aria.c sc->sc_interrupts++;
sc 1167 dev/isa/aria.c if ((sc->sc_open & ARIAR_OPEN_PLAY) && (pdata!=NULL)) {
sc 1169 dev/isa/aria.c address = 0x8000 - 2*(sc->sc_blocksize);
sc 1172 dev/isa/aria.c outsw(iobase + ARIADSP_DMADATA, pdata, sc->sc_blocksize/2);
sc 1173 dev/isa/aria.c if (sc->sc_pintr != NULL)
sc 1174 dev/isa/aria.c (*sc->sc_pintr)(sc->sc_parg);
sc 1177 dev/isa/aria.c if ((sc->sc_open & ARIAR_OPEN_RECORD) && (rdata!=NULL)) {
sc 1179 dev/isa/aria.c address = 0x8000 - (sc->sc_blocksize);
sc 1182 dev/isa/aria.c insw(iobase + ARIADSP_DMADATA, rdata, sc->sc_blocksize/2);
sc 1183 dev/isa/aria.c if (sc->sc_rintr != NULL)
sc 1184 dev/isa/aria.c (*sc->sc_rintr)(sc->sc_rarg);
sc 1209 dev/isa/aria.c register struct aria_softc *sc = addr;
sc 1214 dev/isa/aria.c if (!(ARIA_MIXER&sc->sc_hardware)) /* This could be done better, no mixer still has some controls. */
sc 1222 dev/isa/aria.c sc->aria_mix[ARIAMIX_MIC_LVL].num_channels = mv->num_channels;
sc 1223 dev/isa/aria.c sc->aria_mix[ARIAMIX_MIC_LVL].level[0] = mv->level[0];
sc 1224 dev/isa/aria.c sc->aria_mix[ARIAMIX_MIC_LVL].level[1] = mv->level[1];
sc 1231 dev/isa/aria.c sc->aria_mix[ARIAMIX_LINE_IN_LVL].num_channels = mv->num_channels;
sc 1232 dev/isa/aria.c sc->aria_mix[ARIAMIX_LINE_IN_LVL].level[0] = mv->level[0];
sc 1233 dev/isa/aria.c sc->aria_mix[ARIAMIX_LINE_IN_LVL].level[1] = mv->level[1];
sc 1240 dev/isa/aria.c sc->aria_mix[ARIAMIX_CD_LVL].num_channels = mv->num_channels;
sc 1241 dev/isa/aria.c sc->aria_mix[ARIAMIX_CD_LVL].level[0] = mv->level[0];
sc 1242 dev/isa/aria.c sc->aria_mix[ARIAMIX_CD_LVL].level[1] = mv->level[1];
sc 1249 dev/isa/aria.c sc->aria_mix[ARIAMIX_TEL_LVL].num_channels = mv->num_channels;
sc 1250 dev/isa/aria.c sc->aria_mix[ARIAMIX_TEL_LVL].level[0] = mv->level[0];
sc 1257 dev/isa/aria.c sc->aria_mix[ARIAMIX_DAC_LVL].num_channels = mv->num_channels;
sc 1258 dev/isa/aria.c sc->aria_mix[ARIAMIX_DAC_LVL].level[0] = mv->level[0];
sc 1259 dev/isa/aria.c sc->aria_mix[ARIAMIX_DAC_LVL].level[1] = mv->level[1];
sc 1266 dev/isa/aria.c sc->aria_mix[ARIAMIX_AUX_LVL].num_channels = mv->num_channels;
sc 1267 dev/isa/aria.c sc->aria_mix[ARIAMIX_AUX_LVL].level[0] = mv->level[0];
sc 1268 dev/isa/aria.c sc->aria_mix[ARIAMIX_AUX_LVL].level[1] = mv->level[1];
sc 1275 dev/isa/aria.c sc->ariamix_master.num_channels = mv->num_channels;
sc 1276 dev/isa/aria.c sc->ariamix_master.level[0] = mv->level[0];
sc 1277 dev/isa/aria.c sc->ariamix_master.level[1] = mv->level[1];
sc 1284 dev/isa/aria.c sc->ariamix_master.treble[0] = (mv->level[0]==0)?1:mv->level[0];
sc 1285 dev/isa/aria.c sc->ariamix_master.treble[1] = (mv->level[1]==0)?1:mv->level[1];
sc 1291 dev/isa/aria.c sc->ariamix_master.bass[0] = (mv->level[0]==0)?1:mv->level[0];
sc 1292 dev/isa/aria.c sc->ariamix_master.bass[1] = (mv->level[1]==0)?1:mv->level[1];
sc 1298 dev/isa/aria.c sc->gain[0] = mv->level[0];
sc 1299 dev/isa/aria.c sc->gain[1] = mv->level[1];
sc 1311 dev/isa/aria.c sc->aria_mix_source = cp->un.ord;
sc 1318 dev/isa/aria.c sc->aria_mix[ARIAMIX_MIC_LVL].mute = cp->un.ord;
sc 1325 dev/isa/aria.c sc->aria_mix[ARIAMIX_LINE_IN_LVL].mute = cp->un.ord;
sc 1332 dev/isa/aria.c sc->aria_mix[ARIAMIX_CD_LVL].mute = cp->un.ord;
sc 1339 dev/isa/aria.c sc->aria_mix[ARIAMIX_DAC_LVL].mute = cp->un.ord;
sc 1346 dev/isa/aria.c sc->aria_mix[ARIAMIX_AUX_LVL].mute = cp->un.ord;
sc 1353 dev/isa/aria.c sc->aria_mix[ARIAMIX_TEL_LVL].mute = cp->un.ord;
sc 1371 dev/isa/aria.c register struct aria_softc *sc = addr;
sc 1376 dev/isa/aria.c if (!(ARIA_MIXER&sc->sc_hardware)) /* This could be done better, no mixer still has some controls. */
sc 1382 dev/isa/aria.c cp->un.value.num_channels = sc->aria_mix[ARIAMIX_MIC_LVL].num_channels;
sc 1383 dev/isa/aria.c cp->un.value.level[0] = sc->aria_mix[ARIAMIX_MIC_LVL].level[0];
sc 1384 dev/isa/aria.c cp->un.value.level[1] = sc->aria_mix[ARIAMIX_MIC_LVL].level[1];
sc 1391 dev/isa/aria.c cp->un.value.num_channels = sc->aria_mix[ARIAMIX_LINE_IN_LVL].num_channels;
sc 1392 dev/isa/aria.c cp->un.value.level[0] = sc->aria_mix[ARIAMIX_LINE_IN_LVL].level[0];
sc 1393 dev/isa/aria.c cp->un.value.level[1] = sc->aria_mix[ARIAMIX_LINE_IN_LVL].level[1];
sc 1400 dev/isa/aria.c cp->un.value.num_channels = sc->aria_mix[ARIAMIX_CD_LVL].num_channels;
sc 1401 dev/isa/aria.c cp->un.value.level[0] = sc->aria_mix[ARIAMIX_CD_LVL].level[0];
sc 1402 dev/isa/aria.c cp->un.value.level[1] = sc->aria_mix[ARIAMIX_CD_LVL].level[1];
sc 1409 dev/isa/aria.c cp->un.value.num_channels = sc->aria_mix[ARIAMIX_TEL_LVL].num_channels;
sc 1410 dev/isa/aria.c cp->un.value.level[0] = sc->aria_mix[ARIAMIX_TEL_LVL].level[0];
sc 1416 dev/isa/aria.c cp->un.value.num_channels = sc->aria_mix[ARIAMIX_DAC_LVL].num_channels;
sc 1417 dev/isa/aria.c cp->un.value.level[0] = sc->aria_mix[ARIAMIX_DAC_LVL].level[0];
sc 1418 dev/isa/aria.c cp->un.value.level[1] = sc->aria_mix[ARIAMIX_DAC_LVL].level[1];
sc 1425 dev/isa/aria.c cp->un.value.num_channels = sc->aria_mix[ARIAMIX_AUX_LVL].num_channels;
sc 1426 dev/isa/aria.c cp->un.value.level[0] = sc->aria_mix[ARIAMIX_AUX_LVL].level[0];
sc 1427 dev/isa/aria.c cp->un.value.level[1] = sc->aria_mix[ARIAMIX_AUX_LVL].level[1];
sc 1434 dev/isa/aria.c cp->un.ord = sc->aria_mix[ARIAMIX_MIC_LVL].mute;
sc 1441 dev/isa/aria.c cp->un.ord = sc->aria_mix[ARIAMIX_LINE_IN_LVL].mute;
sc 1448 dev/isa/aria.c cp->un.ord = sc->aria_mix[ARIAMIX_CD_LVL].mute;
sc 1455 dev/isa/aria.c cp->un.ord = sc->aria_mix[ARIAMIX_DAC_LVL].mute;
sc 1462 dev/isa/aria.c cp->un.ord = sc->aria_mix[ARIAMIX_AUX_LVL].mute;
sc 1469 dev/isa/aria.c cp->un.ord = sc->aria_mix[ARIAMIX_TEL_LVL].mute;
sc 1476 dev/isa/aria.c cp->un.value.num_channels = sc->ariamix_master.num_channels;
sc 1477 dev/isa/aria.c cp->un.value.level[0] = sc->ariamix_master.level[0];
sc 1478 dev/isa/aria.c cp->un.value.level[1] = sc->ariamix_master.level[1];
sc 1486 dev/isa/aria.c cp->un.value.level[0] = sc->ariamix_master.treble[0];
sc 1487 dev/isa/aria.c cp->un.value.level[1] = sc->ariamix_master.treble[1];
sc 1495 dev/isa/aria.c cp->un.value.level[0] = sc->ariamix_master.bass[0];
sc 1496 dev/isa/aria.c cp->un.value.level[1] = sc->ariamix_master.bass[1];
sc 1503 dev/isa/aria.c cp->un.value.num_channels = sc->sc_chans;
sc 1504 dev/isa/aria.c cp->un.value.level[0] = sc->gain[0];
sc 1505 dev/isa/aria.c cp->un.value.level[1] = sc->gain[1];
sc 1511 dev/isa/aria.c cp->un.ord = sc->aria_mix_source;
sc 1530 dev/isa/aria.c register struct aria_softc *sc = addr;
sc 1534 dev/isa/aria.c if (!(ARIA_MIXER&sc->sc_hardware)) /* This could be done better, no mixer still has some controls. */
sc 146 dev/isa/ast.c struct ast_softc *sc = (void *)self;
sc 151 dev/isa/ast.c sc->sc_iot = ia->ia_iot;
sc 152 dev/isa/ast.c sc->sc_iobase = ia->ia_iobase;
sc 155 dev/isa/ast.c if (bus_space_map(sc->sc_iot, sc->sc_iobase + i * COM_NPORTS,
sc 156 dev/isa/ast.c COM_NPORTS, 0, &sc->sc_slaveioh[i]))
sc 162 dev/isa/ast.c bus_space_write_1(sc->sc_iot, sc->sc_slaveioh[3], 7, 0x80);
sc 168 dev/isa/ast.c ca.ca_iot = sc->sc_iot;
sc 169 dev/isa/ast.c ca.ca_ioh = sc->sc_slaveioh[i];
sc 170 dev/isa/ast.c ca.ca_iobase = sc->sc_iobase + i * COM_NPORTS;
sc 173 dev/isa/ast.c sc->sc_slaves[i] = config_found(self, &ca, astprint);
sc 174 dev/isa/ast.c if (sc->sc_slaves[i] != NULL)
sc 175 dev/isa/ast.c sc->sc_alive |= 1 << i;
sc 178 dev/isa/ast.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 179 dev/isa/ast.c IPL_TTY, astintr, sc, sc->sc_dev.dv_xname);
sc 186 dev/isa/ast.c struct ast_softc *sc = arg;
sc 187 dev/isa/ast.c bus_space_tag_t iot = sc->sc_iot;
sc 188 dev/isa/ast.c int alive = sc->sc_alive;
sc 191 dev/isa/ast.c bits = ~bus_space_read_1(iot, sc->sc_slaveioh[3], 7) & alive;
sc 198 dev/isa/ast.c comintr(sc->sc_slaves[n]);
sc 204 dev/isa/ast.c bits = ~bus_space_read_1(iot, sc->sc_slaveioh[3], 7) & alive;
sc 155 dev/isa/aztech.c struct az_softc *sc = (void *) self;
sc 158 dev/isa/aztech.c sc->lm.iot = ia->ia_iot;
sc 159 dev/isa/aztech.c sc->rf = LM700X_REF_050;
sc 160 dev/isa/aztech.c sc->stereo = LM700X_STEREO;
sc 161 dev/isa/aztech.c sc->mute = 0;
sc 162 dev/isa/aztech.c sc->freq = MIN_FM_FREQ;
sc 163 dev/isa/aztech.c sc->vol = 0;
sc 166 dev/isa/aztech.c if (bus_space_map(sc->lm.iot, ia->ia_iobase, ia->ia_iosize,
sc 167 dev/isa/aztech.c 0, &sc->lm.ioh)) {
sc 175 dev/isa/aztech.c sc->lm.offset = 0;
sc 176 dev/isa/aztech.c sc->lm.wzcl = AZ_WREN_ON | AZ_CLCK_OFF | AZ_DATA_OFF;
sc 177 dev/isa/aztech.c sc->lm.wzch = AZ_WREN_ON | AZ_CLCK_ON | AZ_DATA_OFF;
sc 178 dev/isa/aztech.c sc->lm.wocl = AZ_WREN_ON | AZ_CLCK_OFF | AZ_DATA_ON;
sc 179 dev/isa/aztech.c sc->lm.woch = AZ_WREN_ON | AZ_CLCK_ON | AZ_DATA_ON;
sc 180 dev/isa/aztech.c sc->lm.initdata = 0;
sc 181 dev/isa/aztech.c sc->lm.rsetdata = AZ_DATA_ON | AZ_CLCK_ON | AZ_WREN_OFF;
sc 182 dev/isa/aztech.c sc->lm.init = az_lm700x_init;
sc 183 dev/isa/aztech.c sc->lm.rset = az_lm700x_rset;
sc 185 dev/isa/aztech.c az_set_freq(sc, sc->freq);
sc 187 dev/isa/aztech.c radio_attach_mi(&az_hw_if, sc, &sc->sc_dev);
sc 194 dev/isa/aztech.c az_set_mute(struct az_softc *sc)
sc 196 dev/isa/aztech.c bus_space_write_1(sc->lm.iot, sc->lm.ioh, 0,
sc 197 dev/isa/aztech.c sc->mute ? 0 : sc->vol);
sc 199 dev/isa/aztech.c bus_space_write_1(sc->lm.iot, sc->lm.ioh, 0,
sc 200 dev/isa/aztech.c sc->mute ? 0 : sc->vol);
sc 204 dev/isa/aztech.c az_set_freq(struct az_softc *sc, u_int32_t nfreq)
sc 209 dev/isa/aztech.c vol = sc->mute ? 0 : sc->vol;
sc 216 dev/isa/aztech.c sc->freq = nfreq;
sc 218 dev/isa/aztech.c reg = lm700x_encode_freq(nfreq, sc->rf);
sc 219 dev/isa/aztech.c reg |= sc->stereo | sc->rf | LM700X_DIVIDER_FM;
sc 221 dev/isa/aztech.c lm700x_hardware_write(&sc->lm, reg, vol);
sc 223 dev/isa/aztech.c az_set_mute(sc);
sc 279 dev/isa/aztech.c struct az_softc sc;
sc 282 dev/isa/aztech.c sc.lm.iot = iot;
sc 283 dev/isa/aztech.c sc.lm.ioh = ioh;
sc 284 dev/isa/aztech.c sc.lm.offset = 0;
sc 285 dev/isa/aztech.c sc.lm.wzcl = AZ_WREN_ON | AZ_CLCK_OFF | AZ_DATA_OFF;
sc 286 dev/isa/aztech.c sc.lm.wzch = AZ_WREN_ON | AZ_CLCK_ON | AZ_DATA_OFF;
sc 287 dev/isa/aztech.c sc.lm.wocl = AZ_WREN_ON | AZ_CLCK_OFF | AZ_DATA_ON;
sc 288 dev/isa/aztech.c sc.lm.woch = AZ_WREN_ON | AZ_CLCK_ON | AZ_DATA_ON;
sc 289 dev/isa/aztech.c sc.lm.initdata = 0;
sc 290 dev/isa/aztech.c sc.lm.rsetdata = AZ_DATA_ON | AZ_CLCK_ON | AZ_WREN_OFF;
sc 291 dev/isa/aztech.c sc.lm.init = az_lm700x_init;
sc 292 dev/isa/aztech.c sc.lm.rset = az_lm700x_rset;
sc 293 dev/isa/aztech.c sc.rf = LM700X_REF_050;
sc 294 dev/isa/aztech.c sc.mute = 0;
sc 295 dev/isa/aztech.c sc.stereo = LM700X_STEREO;
sc 296 dev/isa/aztech.c sc.vol = 0;
sc 303 dev/isa/aztech.c az_set_freq(&sc, i);
sc 329 dev/isa/aztech.c struct az_softc *sc = v;
sc 331 dev/isa/aztech.c ri->mute = sc->mute;
sc 332 dev/isa/aztech.c ri->volume = az_unconv_vol(sc->vol);
sc 333 dev/isa/aztech.c ri->stereo = sc->stereo == LM700X_STEREO ? 1 : 0;
sc 335 dev/isa/aztech.c ri->rfreq = lm700x_decode_ref(sc->rf);
sc 336 dev/isa/aztech.c ri->info = az_state(sc->lm.iot, sc->lm.ioh);
sc 337 dev/isa/aztech.c ri->freq = sc->freq;
sc 348 dev/isa/aztech.c struct az_softc *sc = v;
sc 350 dev/isa/aztech.c sc->mute = ri->mute ? 1 : 0;
sc 351 dev/isa/aztech.c sc->vol = az_conv_vol(ri->volume);
sc 352 dev/isa/aztech.c sc->stereo = ri->stereo ? LM700X_STEREO : LM700X_MONO;
sc 353 dev/isa/aztech.c sc->rf = lm700x_encode_ref(ri->rfreq);
sc 355 dev/isa/aztech.c az_set_freq(sc, ri->freq);
sc 356 dev/isa/aztech.c az_set_mute(sc);
sc 136 dev/isa/bha_isa.c struct bha_softc *sc = (void *)self;
sc 148 dev/isa/bha_isa.c printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
sc 152 dev/isa/bha_isa.c sc->sc_iot = iot;
sc 153 dev/isa/bha_isa.c sc->sc_ioh = ioh;
sc 154 dev/isa/bha_isa.c sc->sc_dmat = ia->ia_dmat;
sc 156 dev/isa/bha_isa.c printf("%s: bha_find failed\n", sc->sc_dev.dv_xname);
sc 160 dev/isa/bha_isa.c sc->sc_dmaflags = 0;
sc 167 dev/isa/bha_isa.c sc->sc_dev.dv_xname, error);
sc 178 dev/isa/bha_isa.c bha_inquire_setup_information(sc);
sc 179 dev/isa/bha_isa.c if (strcmp(sc->sc_firmware, "3.37") < 0)
sc 181 dev/isa/bha_isa.c sc->sc_dev.dv_xname);
sc 183 dev/isa/bha_isa.c sc->sc_dmaflags = ISABUS_DMA_32BIT;
sc 186 dev/isa/bha_isa.c sc->sc_ih = isa_intr_establish(ic, bpd.sc_irq, IST_EDGE, IPL_BIO,
sc 187 dev/isa/bha_isa.c bha_intr, sc, sc->sc_dev.dv_xname);
sc 188 dev/isa/bha_isa.c if (sc->sc_ih == NULL) {
sc 190 dev/isa/bha_isa.c sc->sc_dev.dv_xname);
sc 194 dev/isa/bha_isa.c bha_attach(sc, &bpd);
sc 146 dev/isa/boca.c struct boca_softc *sc = (void *)self;
sc 152 dev/isa/boca.c sc->sc_iot = ia->ia_iot;
sc 153 dev/isa/boca.c sc->sc_iobase = ia->ia_iobase;
sc 156 dev/isa/boca.c if (bus_space_map(iot, sc->sc_iobase + i * COM_NPORTS,
sc 157 dev/isa/boca.c COM_NPORTS, 0, &sc->sc_slaveioh[i]))
sc 165 dev/isa/boca.c ca.ca_iot = sc->sc_iot;
sc 166 dev/isa/boca.c ca.ca_ioh = sc->sc_slaveioh[i];
sc 167 dev/isa/boca.c ca.ca_iobase = sc->sc_iobase + i * COM_NPORTS;
sc 170 dev/isa/boca.c sc->sc_slaves[i] = config_found(self, &ca, bocaprint);
sc 171 dev/isa/boca.c if (sc->sc_slaves[i] != NULL)
sc 172 dev/isa/boca.c sc->sc_alive |= 1 << i;
sc 175 dev/isa/boca.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 176 dev/isa/boca.c IPL_TTY, bocaintr, sc, sc->sc_dev.dv_xname);
sc 183 dev/isa/boca.c struct boca_softc *sc = arg;
sc 184 dev/isa/boca.c bus_space_tag_t iot = sc->sc_iot;
sc 185 dev/isa/boca.c int alive = sc->sc_alive;
sc 188 dev/isa/boca.c bits = bus_space_read_1(iot, sc->sc_slaveioh[0], 7) & alive;
sc 195 dev/isa/boca.c comintr(sc->sc_slaves[n]);
sc 205 dev/isa/boca.c bits = bus_space_read_1(iot, sc->sc_slaveioh[0], 7) & alive;
sc 113 dev/isa/com_commulti.c struct com_softc *sc = (void *)self;
sc 115 dev/isa/com_commulti.c sc->sc_hwflags = 0;
sc 116 dev/isa/com_commulti.c sc->sc_swflags = 0;
sc 117 dev/isa/com_commulti.c sc->sc_iot = ca->ca_iot;
sc 118 dev/isa/com_commulti.c sc->sc_ioh = ca->ca_ioh;
sc 119 dev/isa/com_commulti.c sc->sc_iobase = ca->ca_iobase;
sc 120 dev/isa/com_commulti.c sc->sc_frequency = COM_FREQ;
sc 122 dev/isa/com_commulti.c SET(sc->sc_hwflags, COM_HW_NOIEN);
sc 124 dev/isa/com_commulti.c com_attach_subr(sc);
sc 120 dev/isa/com_isa.c struct com_softc *sc = (struct com_softc *)self;
sc 126 dev/isa/com_isa.c sc->sc_hwflags = 0;
sc 127 dev/isa/com_isa.c sc->sc_swflags = 0;
sc 151 dev/isa/com_isa.c sc->sc_iot = iot;
sc 152 dev/isa/com_isa.c sc->sc_ioh = ioh;
sc 153 dev/isa/com_isa.c sc->sc_iobase = iobase;
sc 154 dev/isa/com_isa.c sc->sc_frequency = COM_FREQ;
sc 156 dev/isa/com_isa.c com_attach_subr(sc);
sc 162 dev/isa/com_isa.c sc->sc_ih = isa_intr_establish(ia->ia_ic, irq,
sc 163 dev/isa/com_isa.c IST_EDGE, IPL_HIGH, kgdbintr, sc,
sc 164 dev/isa/com_isa.c sc->sc_dev.dv_xname);
sc 166 dev/isa/com_isa.c sc->sc_ih = isa_intr_establish(ia->ia_ic, irq,
sc 167 dev/isa/com_isa.c IST_EDGE, IPL_TTY, comintr, sc,
sc 168 dev/isa/com_isa.c sc->sc_dev.dv_xname);
sc 171 dev/isa/com_isa.c sc->sc_ih = isa_intr_establish(ia->ia_ic, irq,
sc 172 dev/isa/com_isa.c IST_EDGE, IPL_TTY, comintr, sc,
sc 173 dev/isa/com_isa.c sc->sc_dev.dv_xname);
sc 110 dev/isa/com_isapnp.c struct com_softc *sc = (void *)self;
sc 122 dev/isa/com_isapnp.c sc->sc_hwflags = 0;
sc 123 dev/isa/com_isapnp.c sc->sc_swflags = 0;
sc 133 dev/isa/com_isapnp.c sc->sc_iot = iot;
sc 134 dev/isa/com_isapnp.c sc->sc_ioh = ioh;
sc 135 dev/isa/com_isapnp.c sc->sc_iobase = iobase;
sc 136 dev/isa/com_isapnp.c sc->sc_frequency = COM_FREQ;
sc 138 dev/isa/com_isapnp.c com_attach_subr(sc);
sc 144 dev/isa/com_isapnp.c sc->sc_ih = isa_intr_establish(ia->ia_ic, irq,
sc 145 dev/isa/com_isapnp.c IST_EDGE, IPL_HIGH, kgdbintr, sc,
sc 146 dev/isa/com_isapnp.c sc->sc_dev.dv_xname);
sc 148 dev/isa/com_isapnp.c sc->sc_ih = isa_intr_establish(ia->ia_ic, irq,
sc 149 dev/isa/com_isapnp.c IST_EDGE, IPL_TTY, comintr, sc,
sc 150 dev/isa/com_isapnp.c sc->sc_dev.dv_xname);
sc 153 dev/isa/com_isapnp.c sc->sc_ih = isa_intr_establish(ia->ia_ic, irq,
sc 154 dev/isa/com_isapnp.c IST_EDGE, IPL_TTY, comintr, sc,
sc 155 dev/isa/com_isapnp.c sc->sc_dev.dv_xname);
sc 94 dev/isa/cy_isa.c struct cy_softc *sc = (struct cy_softc *)self;
sc 97 dev/isa/cy_isa.c sc->sc_bustype = CY_BUSTYPE_ISA;
sc 98 dev/isa/cy_isa.c sc->sc_memt = ia->ia_memt;
sc 101 dev/isa/cy_isa.c &sc->sc_memh) != 0)
sc 104 dev/isa/cy_isa.c sc->sc_nr_cd1400s = cy_probe_common(sc->sc_memt, sc->sc_memh,
sc 109 dev/isa/cy_isa.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq,
sc 110 dev/isa/cy_isa.c IST_EDGE, IPL_TTY, cy_intr, sc, sc->sc_dev.dv_xname);
sc 112 dev/isa/cy_isa.c if (sc->sc_ih == NULL)
sc 506 dev/isa/ega.c struct ega_softc *sc = (struct ega_softc *)self;
sc 517 dev/isa/ega.c sc->nscreens = 1;
sc 531 dev/isa/ega.c sc->sc_dc = dc;
sc 276 dev/isa/ess.c ess_printsc(sc)
sc 277 dev/isa/ess.c struct ess_softc *sc;
sc 282 dev/isa/ess.c (int)sc->sc_open, sc->sc_iobase, sc->out_port,
sc 283 dev/isa/ess.c sc->in_port, sc->spkr_state ? "on" : "off");
sc 286 dev/isa/ess.c sc->sc_audio1.drq, sc->sc_audio1.irq, sc->sc_audio1.nintr,
sc 287 dev/isa/ess.c sc->sc_audio1.intr, sc->sc_audio1.arg);
sc 289 dev/isa/ess.c if (!ESS_USE_AUDIO1(sc->sc_model)) {
sc 291 dev/isa/ess.c sc->sc_audio2.drq, sc->sc_audio2.irq, sc->sc_audio2.nintr,
sc 292 dev/isa/ess.c sc->sc_audio2.intr, sc->sc_audio2.arg);
sc 296 dev/isa/ess.c for (i = 0; i < sc->ndevs; i++)
sc 297 dev/isa/ess.c printf(" %u,%u", sc->gain[i][ESS_LEFT], sc->gain[i][ESS_RIGHT]);
sc 302 dev/isa/ess.c ess_dump_mixer(sc)
sc 303 dev/isa/ess.c struct ess_softc *sc;
sc 306 dev/isa/ess.c 0x7C, ess_read_mix_reg(sc, 0x7C));
sc 308 dev/isa/ess.c 0x1A, ess_read_mix_reg(sc, 0x1A));
sc 310 dev/isa/ess.c 0x3E, ess_read_mix_reg(sc, 0x3E));
sc 312 dev/isa/ess.c 0x36, ess_read_mix_reg(sc, 0x36));
sc 314 dev/isa/ess.c 0x38, ess_read_mix_reg(sc, 0x38));
sc 316 dev/isa/ess.c 0x3A, ess_read_mix_reg(sc, 0x3A));
sc 318 dev/isa/ess.c 0x32, ess_read_mix_reg(sc, 0x32));
sc 320 dev/isa/ess.c 0x3C, ess_read_mix_reg(sc, 0x3C));
sc 322 dev/isa/ess.c 0x69, ess_read_mix_reg(sc, 0x69));
sc 324 dev/isa/ess.c 0x68, ess_read_mix_reg(sc, 0x68));
sc 326 dev/isa/ess.c 0x6E, ess_read_mix_reg(sc, 0x6E));
sc 328 dev/isa/ess.c 0x6B, ess_read_mix_reg(sc, 0x6B));
sc 330 dev/isa/ess.c 0x6A, ess_read_mix_reg(sc, 0x6A));
sc 332 dev/isa/ess.c 0x6C, ess_read_mix_reg(sc, 0x6C));
sc 334 dev/isa/ess.c 0xB4, ess_read_x_reg(sc, 0xB4));
sc 336 dev/isa/ess.c 0x14, ess_read_mix_reg(sc, 0x14));
sc 339 dev/isa/ess.c ESS_XCMD_PREAMP_CTRL, ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL));
sc 341 dev/isa/ess.c ESS_XCMD_AUDIO_CTRL, ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL));
sc 343 dev/isa/ess.c ESS_MREG_ADC_SOURCE, ess_read_mix_reg(sc, ESS_MREG_ADC_SOURCE),
sc 344 dev/isa/ess.c ESS_MREG_AUDIO2_CTRL2, ess_read_mix_reg(sc, ESS_MREG_AUDIO2_CTRL2));
sc 353 dev/isa/ess.c ess_config_addr(sc)
sc 354 dev/isa/ess.c struct ess_softc *sc;
sc 356 dev/isa/ess.c int iobase = sc->sc_iobase;
sc 357 dev/isa/ess.c bus_space_tag_t iot = sc->sc_iot;
sc 447 dev/isa/ess.c ess_config_irq(sc)
sc 448 dev/isa/ess.c struct ess_softc *sc;
sc 454 dev/isa/ess.c if (sc->sc_model == ESS_1887 &&
sc 455 dev/isa/ess.c sc->sc_audio1.irq == sc->sc_audio2.irq &&
sc 456 dev/isa/ess.c sc->sc_audio1.irq != -1) {
sc 459 dev/isa/ess.c switch (sc->sc_audio1.irq) {
sc 478 dev/isa/ess.c sc->sc_audio1.irq);
sc 483 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_INTR_ST, v);
sc 487 dev/isa/ess.c if (sc->sc_model == ESS_1887) {
sc 489 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_INTR_ST, ESS_IS_ES1888);
sc 492 dev/isa/ess.c if (sc->sc_audio1.polled) {
sc 498 dev/isa/ess.c switch (sc->sc_audio1.irq) {
sc 514 dev/isa/ess.c sc->sc_audio1.irq);
sc 519 dev/isa/ess.c ess_write_x_reg(sc, ESS_XCMD_IRQ_CTRL, v);
sc 521 dev/isa/ess.c if (ESS_USE_AUDIO1(sc->sc_model))
sc 524 dev/isa/ess.c if (sc->sc_audio2.polled) {
sc 526 dev/isa/ess.c ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
sc 530 dev/isa/ess.c ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
sc 537 dev/isa/ess.c ess_config_drq(sc)
sc 538 dev/isa/ess.c struct ess_softc *sc;
sc 546 dev/isa/ess.c switch (sc->sc_audio1.drq) {
sc 559 dev/isa/ess.c sc->sc_audio1.drq);
sc 564 dev/isa/ess.c ess_write_x_reg(sc, ESS_XCMD_DRQ_CTRL, v);
sc 566 dev/isa/ess.c if (ESS_USE_AUDIO1(sc->sc_model))
sc 571 dev/isa/ess.c switch (sc->sc_audio2.drq) {
sc 587 dev/isa/ess.c sc->sc_audio2.drq);
sc 591 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL3, v);
sc 593 dev/isa/ess.c ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2,
sc 601 dev/isa/ess.c ess_setup(sc)
sc 602 dev/isa/ess.c struct ess_softc *sc;
sc 605 dev/isa/ess.c ess_config_irq(sc);
sc 606 dev/isa/ess.c ess_config_drq(sc);
sc 620 dev/isa/ess.c ess_identify(sc)
sc 621 dev/isa/ess.c struct ess_softc *sc;
sc 628 dev/isa/ess.c sc->sc_model = ESS_UNSUPPORTED;
sc 629 dev/isa/ess.c sc->sc_version = 0;
sc 638 dev/isa/ess.c ess_wdsp(sc, ESS_ACMD_LEGACY_ID);
sc 640 dev/isa/ess.c if ((reg1 = ess_rdsp(sc)) != 0x68) {
sc 645 dev/isa/ess.c reg2 = ess_rdsp(sc);
sc 655 dev/isa/ess.c sc->sc_version = (reg1 << 8) + reg2;
sc 662 dev/isa/ess.c reg1 = ess_read_mix_reg(sc, ESS_MREG_VOLUME_CTRL);
sc 665 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_VOLUME_CTRL, reg2);
sc 667 dev/isa/ess.c if (ess_read_mix_reg(sc, ESS_MREG_VOLUME_CTRL) != reg2) {
sc 675 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_VOLUME_CTRL, reg1);
sc 684 dev/isa/ess.c reg1 = ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE);
sc 687 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, reg2);
sc 689 dev/isa/ess.c if (ess_read_mix_reg(sc, ESS_MREG_SAMPLE_RATE) != reg2) {
sc 691 dev/isa/ess.c sc->sc_model = ESS_1788;
sc 696 dev/isa/ess.c ess_read_multi_mix_reg(sc, 0x40, ident, sizeof(ident));
sc 700 dev/isa/ess.c sc->sc_model = ESS_1868;
sc 703 dev/isa/ess.c sc->sc_model = ESS_1878;
sc 715 dev/isa/ess.c reg1 = ess_read_mix_reg(sc, ESS_MREG_VOLUME_CTRL);
sc 718 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_VOLUME_CTRL, reg2);
sc 720 dev/isa/ess.c if (ess_read_mix_reg(sc, ESS_MREG_VOLUME_CTRL) == reg2) {
sc 721 dev/isa/ess.c sc->sc_model = ESS_1887;
sc 726 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_VOLUME_CTRL, reg1);
sc 731 dev/isa/ess.c ess_read_multi_mix_reg(sc, 0x40, ident, sizeof(ident));
sc 735 dev/isa/ess.c sc->sc_model = ESS_1869;
sc 738 dev/isa/ess.c sc->sc_model = ESS_1879;
sc 751 dev/isa/ess.c reg1 = ess_read_mix_reg(sc, 0x68);
sc 752 dev/isa/ess.c reg2 = ess_read_mix_reg(sc, 0x69);
sc 758 dev/isa/ess.c ess_write_mix_reg(sc, 0x68, reg2);
sc 759 dev/isa/ess.c ess_write_mix_reg(sc, 0x69, reg3);
sc 761 dev/isa/ess.c if (ess_read_mix_reg(sc, 0x68) == reg2 &&
sc 762 dev/isa/ess.c ess_read_mix_reg(sc, 0x69) == reg3)
sc 763 dev/isa/ess.c sc->sc_model = ESS_888;
sc 765 dev/isa/ess.c sc->sc_model = ESS_1888;
sc 770 dev/isa/ess.c ess_write_mix_reg(sc, 0x68, reg1);
sc 771 dev/isa/ess.c ess_write_mix_reg(sc, 0x69, reg2);
sc 780 dev/isa/ess.c ess_setup_sc(sc, doinit)
sc 781 dev/isa/ess.c struct ess_softc *sc;
sc 785 dev/isa/ess.c if (ess_reset(sc) != 0) {
sc 791 dev/isa/ess.c if (ess_identify(sc)) {
sc 803 dev/isa/ess.c essmatch(sc)
sc 804 dev/isa/ess.c struct ess_softc *sc;
sc 806 dev/isa/ess.c if (!ESS_BASE_VALID(sc->sc_iobase)) {
sc 807 dev/isa/ess.c printf("ess: configured iobase 0x%x invalid\n", sc->sc_iobase);
sc 812 dev/isa/ess.c if (ess_config_addr(sc))
sc 815 dev/isa/ess.c if (ess_setup_sc(sc, 1))
sc 818 dev/isa/ess.c if (sc->sc_model == ESS_UNSUPPORTED) {
sc 824 dev/isa/ess.c if (!ESS_DRQ1_VALID(sc->sc_audio1.drq)) {
sc 825 dev/isa/ess.c printf("ess: record drq %d invalid\n", sc->sc_audio1.drq);
sc 828 dev/isa/ess.c if (!isa_drq_isfree(sc->sc_isa, sc->sc_audio1.drq))
sc 830 dev/isa/ess.c if (!ESS_USE_AUDIO1(sc->sc_model)) {
sc 831 dev/isa/ess.c if (!ESS_DRQ2_VALID(sc->sc_audio2.drq)) {
sc 832 dev/isa/ess.c printf("ess: play drq %d invalid\n", sc->sc_audio2.drq);
sc 835 dev/isa/ess.c if (sc->sc_audio1.drq == sc->sc_audio2.drq) {
sc 837 dev/isa/ess.c sc->sc_audio1.drq);
sc 840 dev/isa/ess.c if (!isa_drq_isfree(sc->sc_isa, sc->sc_audio2.drq))
sc 848 dev/isa/ess.c if (sc->sc_model == ESS_1887 &&
sc 849 dev/isa/ess.c sc->sc_audio1.irq == sc->sc_audio2.irq &&
sc 850 dev/isa/ess.c sc->sc_audio1.irq != -1 &&
sc 851 dev/isa/ess.c ESS_IRQ12_VALID(sc->sc_audio1.irq))
sc 855 dev/isa/ess.c if (sc->sc_audio1.irq != -1 &&
sc 856 dev/isa/ess.c !ESS_IRQ1_VALID(sc->sc_audio1.irq)) {
sc 857 dev/isa/ess.c printf("ess: record irq %d invalid\n", sc->sc_audio1.irq);
sc 860 dev/isa/ess.c if (!ESS_USE_AUDIO1(sc->sc_model)) {
sc 861 dev/isa/ess.c if (sc->sc_audio2.irq != -1 &&
sc 862 dev/isa/ess.c !ESS_IRQ2_VALID(sc->sc_audio2.irq)) {
sc 863 dev/isa/ess.c printf("ess: play irq %d invalid\n", sc->sc_audio2.irq);
sc 866 dev/isa/ess.c if (sc->sc_audio1.irq == sc->sc_audio2.irq &&
sc 867 dev/isa/ess.c sc->sc_audio1.irq != -1) {
sc 869 dev/isa/ess.c sc->sc_audio1.irq);
sc 886 dev/isa/ess.c essattach(sc)
sc 887 dev/isa/ess.c struct ess_softc *sc;
sc 894 dev/isa/ess.c if (ess_setup_sc(sc, 0)) {
sc 900 dev/isa/ess.c essmodel[sc->sc_model], sc->sc_version);
sc 902 dev/isa/ess.c sc->sc_audio1.polled = sc->sc_audio1.irq == -1;
sc 903 dev/isa/ess.c if (!sc->sc_audio1.polled) {
sc 904 dev/isa/ess.c sc->sc_audio1.ih = isa_intr_establish(sc->sc_ic,
sc 905 dev/isa/ess.c sc->sc_audio1.irq, sc->sc_audio1.ist, IPL_AUDIO,
sc 906 dev/isa/ess.c ess_audio1_intr, sc, sc->sc_dev.dv_xname);
sc 908 dev/isa/ess.c sc->sc_dev.dv_xname, sc->sc_audio1.irq);
sc 910 dev/isa/ess.c printf("%s: audio1 polled\n", sc->sc_dev.dv_xname);
sc 911 dev/isa/ess.c if (isa_dmamap_create(sc->sc_isa, sc->sc_audio1.drq,
sc 914 dev/isa/ess.c sc->sc_dev.dv_xname, sc->sc_audio1.drq);
sc 918 dev/isa/ess.c if (!ESS_USE_AUDIO1(sc->sc_model)) {
sc 919 dev/isa/ess.c sc->sc_audio2.polled = sc->sc_audio2.irq == -1;
sc 920 dev/isa/ess.c if (!sc->sc_audio2.polled) {
sc 921 dev/isa/ess.c sc->sc_audio2.ih = isa_intr_establish(sc->sc_ic,
sc 922 dev/isa/ess.c sc->sc_audio2.irq, sc->sc_audio2.ist, IPL_AUDIO,
sc 923 dev/isa/ess.c ess_audio2_intr, sc, sc->sc_dev.dv_xname);
sc 925 dev/isa/ess.c sc->sc_dev.dv_xname, sc->sc_audio2.irq);
sc 927 dev/isa/ess.c printf("%s: audio2 polled\n", sc->sc_dev.dv_xname);
sc 928 dev/isa/ess.c if (isa_dmamap_create(sc->sc_isa, sc->sc_audio2.drq,
sc 931 dev/isa/ess.c sc->sc_dev.dv_xname, sc->sc_audio2.drq);
sc 936 dev/isa/ess.c timeout_set(&sc->sc_tmo1, ess_audio1_poll, sc);
sc 937 dev/isa/ess.c timeout_set(&sc->sc_tmo2, ess_audio2_poll, sc);
sc 945 dev/isa/ess.c ess_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams);
sc 948 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MIX_RESET, ESS_MIX_RESET);
sc 954 dev/isa/ess.c if (!ESS_USE_AUDIO1(sc->sc_model))
sc 955 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_VOLUME_VOICE, 0);
sc 956 dev/isa/ess.c ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR);
sc 958 dev/isa/ess.c if (ESS_USE_AUDIO1(sc->sc_model)) {
sc 959 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_ADC_SOURCE, ESS_SOURCE_MIC);
sc 960 dev/isa/ess.c sc->in_port = ESS_SOURCE_MIC;
sc 961 dev/isa/ess.c sc->ndevs = ESS_1788_NDEVS;
sc 969 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_ADC_SOURCE, ESS_SOURCE_MIXER);
sc 970 dev/isa/ess.c sc->in_mask = 1 << ESS_MIC_REC_VOL;
sc 971 dev/isa/ess.c sc->ndevs = ESS_1888_NDEVS;
sc 972 dev/isa/ess.c ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 0x10);
sc 973 dev/isa/ess.c ess_set_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL2, 0x08);
sc 981 dev/isa/ess.c for (i = 0; i < sc->ndevs; i++) {
sc 998 dev/isa/ess.c sc->gain[i][ESS_LEFT] = sc->gain[i][ESS_RIGHT] = v;
sc 999 dev/isa/ess.c ess_set_gain(sc, i, 1);
sc 1002 dev/isa/ess.c ess_setup(sc);
sc 1005 dev/isa/ess.c ess_speaker_off(sc);
sc 1006 dev/isa/ess.c sc->spkr_state = SPKR_OFF;
sc 1009 dev/isa/ess.c essmodel[sc->sc_model]);
sc 1011 dev/isa/ess.c sc->sc_version);
sc 1013 dev/isa/ess.c if (ESS_USE_AUDIO1(sc->sc_model))
sc 1014 dev/isa/ess.c audio_attach_mi(&ess_1788_hw_if, sc, &sc->sc_dev);
sc 1016 dev/isa/ess.c audio_attach_mi(&ess_1888_hw_if, sc, &sc->sc_dev);
sc 1021 dev/isa/ess.c (void)config_found(&sc->sc_dev, &arg, audioprint);
sc 1025 dev/isa/ess.c ess_printsc(sc);
sc 1038 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1040 dev/isa/ess.c DPRINTF(("ess_open: sc=%p\n", sc));
sc 1042 dev/isa/ess.c if (sc->sc_open != 0 || ess_reset(sc) != 0)
sc 1045 dev/isa/ess.c ess_setup(sc); /* because we did a reset */
sc 1047 dev/isa/ess.c sc->sc_open = 1;
sc 1058 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1060 dev/isa/ess.c DPRINTF(("ess_1788_close: sc=%p\n", sc));
sc 1062 dev/isa/ess.c ess_speaker_off(sc);
sc 1063 dev/isa/ess.c sc->spkr_state = SPKR_OFF;
sc 1065 dev/isa/ess.c ess_audio1_halt(sc);
sc 1067 dev/isa/ess.c sc->sc_open = 0;
sc 1075 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1077 dev/isa/ess.c DPRINTF(("ess_1888_close: sc=%p\n", sc));
sc 1079 dev/isa/ess.c ess_speaker_off(sc);
sc 1080 dev/isa/ess.c sc->spkr_state = SPKR_OFF;
sc 1082 dev/isa/ess.c ess_audio1_halt(sc);
sc 1083 dev/isa/ess.c ess_audio2_halt(sc);
sc 1085 dev/isa/ess.c sc->sc_open = 0;
sc 1107 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1109 dev/isa/ess.c if ((newstate == SPKR_ON) && (sc->spkr_state == SPKR_OFF)) {
sc 1110 dev/isa/ess.c ess_speaker_on(sc);
sc 1111 dev/isa/ess.c sc->spkr_state = SPKR_ON;
sc 1113 dev/isa/ess.c if ((newstate == SPKR_OFF) && (sc->spkr_state == SPKR_ON)) {
sc 1114 dev/isa/ess.c ess_speaker_off(sc);
sc 1115 dev/isa/ess.c sc->spkr_state = SPKR_OFF;
sc 1197 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1271 dev/isa/ess.c ess_write_x_reg(sc, ESS_XCMD_SAMPLE_RATE, ess_srtotc(rate));
sc 1272 dev/isa/ess.c ess_write_x_reg(sc, ESS_XCMD_FILTER_CLOCK, ess_srtofc(rate));
sc 1274 dev/isa/ess.c if (!ESS_USE_AUDIO1(sc->sc_model)) {
sc 1275 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_SAMPLE_RATE, ess_srtotc(rate));
sc 1276 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_FILTER_CLOCK, ess_srtofc(rate));
sc 1291 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1297 dev/isa/ess.c if (sc->sc_audio1.active)
sc 1300 dev/isa/ess.c sc->sc_audio1.active = 1;
sc 1301 dev/isa/ess.c sc->sc_audio1.intr = intr;
sc 1302 dev/isa/ess.c sc->sc_audio1.arg = arg;
sc 1303 dev/isa/ess.c if (sc->sc_audio1.polled) {
sc 1304 dev/isa/ess.c sc->sc_audio1.dmapos = 0;
sc 1305 dev/isa/ess.c sc->sc_audio1.buffersize = (char *)end - (char *)start;
sc 1306 dev/isa/ess.c sc->sc_audio1.dmacount = 0;
sc 1307 dev/isa/ess.c sc->sc_audio1.blksize = blksize;
sc 1308 dev/isa/ess.c timeout_add(&sc->sc_tmo1, hz/30);
sc 1311 dev/isa/ess.c reg = ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL);
sc 1319 dev/isa/ess.c ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL, reg);
sc 1321 dev/isa/ess.c reg = ess_read_x_reg(sc, ESS_XCMD_AUDIO1_CTRL1);
sc 1336 dev/isa/ess.c ess_write_x_reg(sc, ESS_XCMD_AUDIO1_CTRL1, reg);
sc 1338 dev/isa/ess.c isa_dmastart(sc->sc_isa, sc->sc_audio1.drq, start,
sc 1344 dev/isa/ess.c ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, blksize);
sc 1345 dev/isa/ess.c ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, blksize >> 8);
sc 1348 dev/isa/ess.c ess_set_xreg_bits(sc, ESS_XCMD_DEMAND_CTRL, ESS_DEMAND_CTRL_DEMAND_4);
sc 1351 dev/isa/ess.c ess_wdsp(sc, ESS_ACMD_ENABLE_SPKR);
sc 1352 dev/isa/ess.c reg = ess_read_x_reg(sc, ESS_XCMD_AUDIO1_CTRL2);
sc 1355 dev/isa/ess.c ess_write_x_reg(sc, ESS_XCMD_AUDIO1_CTRL2, reg);
sc 1369 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1375 dev/isa/ess.c if (sc->sc_audio2.active)
sc 1378 dev/isa/ess.c sc->sc_audio2.active = 1;
sc 1379 dev/isa/ess.c sc->sc_audio2.intr = intr;
sc 1380 dev/isa/ess.c sc->sc_audio2.arg = arg;
sc 1381 dev/isa/ess.c if (sc->sc_audio2.polled) {
sc 1382 dev/isa/ess.c sc->sc_audio2.dmapos = 0;
sc 1383 dev/isa/ess.c sc->sc_audio2.buffersize = (char *)end - (char *)start;
sc 1384 dev/isa/ess.c sc->sc_audio2.dmacount = 0;
sc 1385 dev/isa/ess.c sc->sc_audio2.blksize = blksize;
sc 1386 dev/isa/ess.c timeout_add(&sc->sc_tmo2, hz/30);
sc 1389 dev/isa/ess.c reg = ess_read_mix_reg(sc, ESS_MREG_AUDIO2_CTRL2);
sc 1403 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL2, reg);
sc 1405 dev/isa/ess.c isa_dmastart(sc->sc_isa, sc->sc_audio2.drq, start,
sc 1409 dev/isa/ess.c if (IS16BITDRQ(sc->sc_audio2.drq))
sc 1413 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTLO, blksize);
sc 1414 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_XFER_COUNTHI, blksize >> 8);
sc 1416 dev/isa/ess.c reg = ess_read_mix_reg(sc, ESS_MREG_AUDIO2_CTRL1);
sc 1417 dev/isa/ess.c if (IS16BITDRQ(sc->sc_audio2.drq))
sc 1424 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL1, reg);
sc 1438 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1444 dev/isa/ess.c if (sc->sc_audio1.active)
sc 1447 dev/isa/ess.c sc->sc_audio1.active = 1;
sc 1448 dev/isa/ess.c sc->sc_audio1.intr = intr;
sc 1449 dev/isa/ess.c sc->sc_audio1.arg = arg;
sc 1450 dev/isa/ess.c if (sc->sc_audio1.polled) {
sc 1451 dev/isa/ess.c sc->sc_audio1.dmapos = 0;
sc 1452 dev/isa/ess.c sc->sc_audio1.buffersize = (char *)end - (char *)start;
sc 1453 dev/isa/ess.c sc->sc_audio1.dmacount = 0;
sc 1454 dev/isa/ess.c sc->sc_audio1.blksize = blksize;
sc 1455 dev/isa/ess.c timeout_add(&sc->sc_tmo1, hz/30);
sc 1458 dev/isa/ess.c reg = ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL);
sc 1466 dev/isa/ess.c ess_write_x_reg(sc, ESS_XCMD_AUDIO_CTRL, reg);
sc 1468 dev/isa/ess.c reg = ess_read_x_reg(sc, ESS_XCMD_AUDIO1_CTRL1);
sc 1483 dev/isa/ess.c ess_write_x_reg(sc, ESS_XCMD_AUDIO1_CTRL1, reg);
sc 1485 dev/isa/ess.c isa_dmastart(sc->sc_isa, sc->sc_audio1.drq, start,
sc 1491 dev/isa/ess.c ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTLO, blksize);
sc 1492 dev/isa/ess.c ess_write_x_reg(sc, ESS_XCMD_XFER_COUNTHI, blksize >> 8);
sc 1495 dev/isa/ess.c ess_set_xreg_bits(sc, ESS_XCMD_DEMAND_CTRL, ESS_DEMAND_CTRL_DEMAND_4);
sc 1498 dev/isa/ess.c ess_wdsp(sc, ESS_ACMD_DISABLE_SPKR);
sc 1499 dev/isa/ess.c reg = ess_read_x_reg(sc, ESS_XCMD_AUDIO1_CTRL2);
sc 1502 dev/isa/ess.c ess_write_x_reg(sc, ESS_XCMD_AUDIO1_CTRL2, reg);
sc 1511 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1513 dev/isa/ess.c DPRINTF(("ess_audio1_halt: sc=%p\n", sc));
sc 1515 dev/isa/ess.c if (sc->sc_audio1.active) {
sc 1516 dev/isa/ess.c ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO1_CTRL2,
sc 1518 dev/isa/ess.c isa_dmaabort(sc->sc_isa, sc->sc_audio1.drq);
sc 1519 dev/isa/ess.c if (sc->sc_audio1.polled)
sc 1520 dev/isa/ess.c timeout_del(&sc->sc_tmo1);
sc 1521 dev/isa/ess.c sc->sc_audio1.active = 0;
sc 1531 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1533 dev/isa/ess.c DPRINTF(("ess_audio2_halt: sc=%p\n", sc));
sc 1535 dev/isa/ess.c if (sc->sc_audio2.active) {
sc 1536 dev/isa/ess.c ess_clear_mreg_bits(sc, ESS_MREG_AUDIO2_CTRL1,
sc 1539 dev/isa/ess.c isa_dmaabort(sc->sc_isa, sc->sc_audio2.drq);
sc 1540 dev/isa/ess.c if (sc->sc_audio2.polled)
sc 1541 dev/isa/ess.c timeout_del(&sc->sc_tmo2);
sc 1542 dev/isa/ess.c sc->sc_audio2.active = 0;
sc 1552 dev/isa/ess.c struct ess_softc *sc = arg;
sc 1555 dev/isa/ess.c DPRINTFN(1,("ess_audio1_intr: intr=%p\n", sc->sc_audio1.intr));
sc 1558 dev/isa/ess.c reg = EREAD1(sc->sc_iot, sc->sc_ioh, ESS_DSP_RW_STATUS);
sc 1561 dev/isa/ess.c reg = EREAD1(sc->sc_iot, sc->sc_ioh, ESS_CLEAR_INTR);
sc 1563 dev/isa/ess.c sc->sc_audio1.nintr++;
sc 1565 dev/isa/ess.c if (sc->sc_audio1.active) {
sc 1566 dev/isa/ess.c (*sc->sc_audio1.intr)(sc->sc_audio1.arg);
sc 1576 dev/isa/ess.c struct ess_softc *sc = arg;
sc 1579 dev/isa/ess.c DPRINTFN(1,("ess_audio2_intr: intr=%p\n", sc->sc_audio2.intr));
sc 1582 dev/isa/ess.c reg = ess_read_mix_reg(sc, ESS_MREG_AUDIO2_CTRL2);
sc 1586 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_AUDIO2_CTRL2, reg);
sc 1588 dev/isa/ess.c sc->sc_audio2.nintr++;
sc 1590 dev/isa/ess.c if (sc->sc_audio2.active) {
sc 1591 dev/isa/ess.c (*sc->sc_audio2.intr)(sc->sc_audio2.arg);
sc 1601 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1604 dev/isa/ess.c if (!sc->sc_audio1.active)
sc 1607 dev/isa/ess.c sc->sc_audio1.nintr++;
sc 1609 dev/isa/ess.c dmapos = isa_dmacount(sc->sc_isa, sc->sc_audio1.drq);
sc 1610 dev/isa/ess.c dmacount = sc->sc_audio1.dmapos - dmapos;
sc 1612 dev/isa/ess.c dmacount += sc->sc_audio1.buffersize;
sc 1613 dev/isa/ess.c sc->sc_audio1.dmapos = dmapos;
sc 1615 dev/isa/ess.c dmacount += sc->sc_audio1.dmacount;
sc 1616 dev/isa/ess.c while (dmacount > sc->sc_audio1.blksize) {
sc 1617 dev/isa/ess.c dmacount -= sc->sc_audio1.blksize;
sc 1618 dev/isa/ess.c (*sc->sc_audio1.intr)(sc->sc_audio1.arg);
sc 1620 dev/isa/ess.c sc->sc_audio1.dmacount = dmacount;
sc 1622 dev/isa/ess.c (*sc->sc_audio1.intr)(sc->sc_audio1.arg, dmacount);
sc 1625 dev/isa/ess.c timeout_add(&sc->sc_tmo1, hz/30);
sc 1632 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1635 dev/isa/ess.c if (!sc->sc_audio2.active)
sc 1638 dev/isa/ess.c sc->sc_audio2.nintr++;
sc 1640 dev/isa/ess.c dmapos = isa_dmacount(sc->sc_isa, sc->sc_audio2.drq);
sc 1641 dev/isa/ess.c dmacount = sc->sc_audio2.dmapos - dmapos;
sc 1643 dev/isa/ess.c dmacount += sc->sc_audio2.buffersize;
sc 1644 dev/isa/ess.c sc->sc_audio2.dmapos = dmapos;
sc 1646 dev/isa/ess.c dmacount += sc->sc_audio2.dmacount;
sc 1647 dev/isa/ess.c while (dmacount > sc->sc_audio2.blksize) {
sc 1648 dev/isa/ess.c dmacount -= sc->sc_audio2.blksize;
sc 1649 dev/isa/ess.c (*sc->sc_audio2.intr)(sc->sc_audio2.arg);
sc 1651 dev/isa/ess.c sc->sc_audio2.dmacount = dmacount;
sc 1653 dev/isa/ess.c (*sc->sc_audio2.intr)(sc->sc_audio2.arg, dmacount);
sc 1656 dev/isa/ess.c timeout_add(&sc->sc_tmo2, hz/30);
sc 1672 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1710 dev/isa/ess.c sc->gain[cp->dev][ESS_LEFT] = lgain;
sc 1711 dev/isa/ess.c sc->gain[cp->dev][ESS_RIGHT] = rgain;
sc 1712 dev/isa/ess.c ess_set_gain(sc, cp->dev, 1);
sc 1723 dev/isa/ess.c sc->gain[cp->dev][ESS_LEFT] = sc->gain[cp->dev][ESS_RIGHT] =
sc 1725 dev/isa/ess.c ess_set_gain(sc, cp->dev, 1);
sc 1729 dev/isa/ess.c if (ESS_USE_AUDIO1(sc->sc_model)) {
sc 1731 dev/isa/ess.c return (ess_set_in_port(sc, cp->un.ord));
sc 1736 dev/isa/ess.c return (ess_set_in_ports(sc, cp->un.mask));
sc 1748 dev/isa/ess.c ess_set_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
sc 1752 dev/isa/ess.c ess_clear_xreg_bits(sc, ESS_XCMD_AUDIO_CTRL,
sc 1757 dev/isa/ess.c if (ESS_USE_AUDIO1(sc->sc_model))
sc 1785 dev/isa/ess.c sc->gain[cp->dev][ESS_LEFT] = lgain;
sc 1786 dev/isa/ess.c sc->gain[cp->dev][ESS_RIGHT] = rgain;
sc 1787 dev/isa/ess.c ess_set_gain(sc, cp->dev, 1);
sc 1796 dev/isa/ess.c ess_set_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
sc 1800 dev/isa/ess.c ess_clear_xreg_bits(sc, ESS_XCMD_PREAMP_CTRL,
sc 1813 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1829 dev/isa/ess.c sc->gain[cp->dev][ESS_LEFT];
sc 1833 dev/isa/ess.c sc->gain[cp->dev][ESS_LEFT];
sc 1835 dev/isa/ess.c sc->gain[cp->dev][ESS_RIGHT];
sc 1847 dev/isa/ess.c sc->gain[cp->dev][ESS_LEFT];
sc 1851 dev/isa/ess.c if (ESS_USE_AUDIO1(sc->sc_model))
sc 1852 dev/isa/ess.c cp->un.ord = sc->in_port;
sc 1854 dev/isa/ess.c cp->un.mask = sc->in_mask;
sc 1858 dev/isa/ess.c cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_AUDIO_CTRL) &
sc 1863 dev/isa/ess.c if (ESS_USE_AUDIO1(sc->sc_model))
sc 1876 dev/isa/ess.c sc->gain[cp->dev][ESS_LEFT];
sc 1880 dev/isa/ess.c sc->gain[cp->dev][ESS_LEFT];
sc 1882 dev/isa/ess.c sc->gain[cp->dev][ESS_RIGHT];
sc 1890 dev/isa/ess.c cp->un.ord = (ess_read_x_reg(sc, ESS_XCMD_PREAMP_CTRL) &
sc 1903 dev/isa/ess.c struct ess_softc *sc = addr;
sc 1906 dev/isa/ess.c sc->sc_model, dip->index));
sc 1931 dev/isa/ess.c if (ESS_USE_AUDIO1(sc->sc_model))
sc 2032 dev/isa/ess.c if (ESS_USE_AUDIO1(sc->sc_model)) {
sc 2112 dev/isa/ess.c if (ESS_USE_AUDIO1(sc->sc_model))
sc 2204 dev/isa/ess.c struct ess_softc *sc = addr;
sc 2207 dev/isa/ess.c if (!ESS_USE_AUDIO1(sc->sc_model))
sc 2208 dev/isa/ess.c drq = sc->sc_audio2.drq;
sc 2210 dev/isa/ess.c drq = sc->sc_audio1.drq;
sc 2211 dev/isa/ess.c return (isa_malloc(sc->sc_isa, drq, size, pool, flags));
sc 2270 dev/isa/ess.c ess_reset(sc)
sc 2271 dev/isa/ess.c struct ess_softc *sc;
sc 2273 dev/isa/ess.c bus_space_tag_t iot = sc->sc_iot;
sc 2274 dev/isa/ess.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2276 dev/isa/ess.c sc->sc_audio1.active = 0;
sc 2277 dev/isa/ess.c sc->sc_audio2.active = 0;
sc 2282 dev/isa/ess.c if (ess_rdsp(sc) != ESS_MAGIC)
sc 2286 dev/isa/ess.c ess_wdsp(sc, ESS_ACMD_ENABLE_EXT);
sc 2292 dev/isa/ess.c ess_set_gain(sc, port, on)
sc 2293 dev/isa/ess.c struct ess_softc *sc;
sc 2315 dev/isa/ess.c if (ESS_USE_AUDIO1(sc->sc_model))
sc 2366 dev/isa/ess.c if (ESS_USE_AUDIO1(sc->sc_model) && mix && src > 0x62)
sc 2370 dev/isa/ess.c left = sc->gain[port][ESS_LEFT];
sc 2371 dev/isa/ess.c right = sc->gain[port][ESS_RIGHT];
sc 2382 dev/isa/ess.c ess_write_mix_reg(sc, src, gain);
sc 2384 dev/isa/ess.c ess_write_x_reg(sc, src, gain);
sc 2389 dev/isa/ess.c ess_set_in_port(sc, ord)
sc 2390 dev/isa/ess.c struct ess_softc *sc;
sc 2403 dev/isa/ess.c if (ess_query_devinfo(sc, &di))
sc 2414 dev/isa/ess.c ess_write_mix_reg(sc, ESS_MREG_ADC_SOURCE, ord);
sc 2416 dev/isa/ess.c sc->in_port = ord;
sc 2422 dev/isa/ess.c ess_set_in_ports(sc, mask)
sc 2423 dev/isa/ess.c struct ess_softc *sc;
sc 2436 dev/isa/ess.c if (ess_query_devinfo(sc, &di))
sc 2454 dev/isa/ess.c ess_set_gain(sc, port, mask & di.un.s.member[i].mask);
sc 2457 dev/isa/ess.c sc->in_mask = mask;
sc 2462 dev/isa/ess.c ess_speaker_on(sc)
sc 2463 dev/isa/ess.c struct ess_softc *sc;
sc 2466 dev/isa/ess.c ess_set_gain(sc, ESS_DAC_PLAY_VOL, 1);
sc 2470 dev/isa/ess.c ess_speaker_off(sc)
sc 2471 dev/isa/ess.c struct ess_softc *sc;
sc 2474 dev/isa/ess.c ess_set_gain(sc, ESS_DAC_PLAY_VOL, 0);
sc 2516 dev/isa/ess.c ess_get_dsp_status(sc)
sc 2517 dev/isa/ess.c struct ess_softc *sc;
sc 2519 dev/isa/ess.c return (EREAD1(sc->sc_iot, sc->sc_ioh, ESS_DSP_RW_STATUS));
sc 2528 dev/isa/ess.c ess_dsp_read_ready(sc)
sc 2529 dev/isa/ess.c struct ess_softc *sc;
sc 2531 dev/isa/ess.c return ((ess_get_dsp_status(sc) & ESS_DSP_READ_READY) ? 1 : 0);
sc 2540 dev/isa/ess.c ess_dsp_write_ready(sc)
sc 2541 dev/isa/ess.c struct ess_softc *sc;
sc 2543 dev/isa/ess.c return ((ess_get_dsp_status(sc) & ESS_DSP_WRITE_BUSY) ? 0 : 1);
sc 2551 dev/isa/ess.c ess_rdsp(sc)
sc 2552 dev/isa/ess.c struct ess_softc *sc;
sc 2554 dev/isa/ess.c bus_space_tag_t iot = sc->sc_iot;
sc 2555 dev/isa/ess.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2559 dev/isa/ess.c if (ess_dsp_read_ready(sc)) {
sc 2575 dev/isa/ess.c ess_wdsp(sc, v)
sc 2576 dev/isa/ess.c struct ess_softc *sc;
sc 2579 dev/isa/ess.c bus_space_tag_t iot = sc->sc_iot;
sc 2580 dev/isa/ess.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2586 dev/isa/ess.c if (ess_dsp_write_ready(sc)) {
sc 2601 dev/isa/ess.c ess_write_x_reg(sc, reg, val)
sc 2602 dev/isa/ess.c struct ess_softc *sc;
sc 2609 dev/isa/ess.c if ((error = ess_wdsp(sc, reg)) == 0)
sc 2610 dev/isa/ess.c error = ess_wdsp(sc, val);
sc 2619 dev/isa/ess.c ess_read_x_reg(sc, reg)
sc 2620 dev/isa/ess.c struct ess_softc *sc;
sc 2626 dev/isa/ess.c if ((error = ess_wdsp(sc, 0xC0)) == 0)
sc 2627 dev/isa/ess.c error = ess_wdsp(sc, reg);
sc 2631 dev/isa/ess.c val = ess_rdsp(sc);
sc 2637 dev/isa/ess.c ess_clear_xreg_bits(sc, reg, mask)
sc 2638 dev/isa/ess.c struct ess_softc *sc;
sc 2642 dev/isa/ess.c if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) & ~mask) == -1)
sc 2648 dev/isa/ess.c ess_set_xreg_bits(sc, reg, mask)
sc 2649 dev/isa/ess.c struct ess_softc *sc;
sc 2653 dev/isa/ess.c if (ess_write_x_reg(sc, reg, ess_read_x_reg(sc, reg) | mask) == -1)
sc 2663 dev/isa/ess.c ess_write_mix_reg(sc, reg, val)
sc 2664 dev/isa/ess.c struct ess_softc *sc;
sc 2668 dev/isa/ess.c bus_space_tag_t iot = sc->sc_iot;
sc 2669 dev/isa/ess.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2684 dev/isa/ess.c ess_read_mix_reg(sc, reg)
sc 2685 dev/isa/ess.c struct ess_softc *sc;
sc 2688 dev/isa/ess.c bus_space_tag_t iot = sc->sc_iot;
sc 2689 dev/isa/ess.c bus_space_handle_t ioh = sc->sc_ioh;
sc 2703 dev/isa/ess.c ess_clear_mreg_bits(sc, reg, mask)
sc 2704 dev/isa/ess.c struct ess_softc *sc;
sc 2708 dev/isa/ess.c ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) & ~mask);
sc 2712 dev/isa/ess.c ess_set_mreg_bits(sc, reg, mask)
sc 2713 dev/isa/ess.c struct ess_softc *sc;
sc 2717 dev/isa/ess.c ess_write_mix_reg(sc, reg, ess_read_mix_reg(sc, reg) | mask);
sc 2721 dev/isa/ess.c ess_read_multi_mix_reg(sc, reg, datap, count)
sc 2722 dev/isa/ess.c struct ess_softc *sc;
sc 2727 dev/isa/ess.c bus_space_tag_t iot = sc->sc_iot;
sc 2728 dev/isa/ess.c bus_space_handle_t ioh = sc->sc_ioh;
sc 79 dev/isa/ess_isapnp.c struct ess_softc *sc = (void *)self;
sc 82 dev/isa/ess_isapnp.c sc->sc_ic = ia->ia_ic;
sc 83 dev/isa/ess_isapnp.c sc->sc_iot = ia->ia_iot;
sc 84 dev/isa/ess_isapnp.c sc->sc_ioh = ia->ipa_io[0].h;
sc 85 dev/isa/ess_isapnp.c sc->sc_iobase = ia->ipa_io[0].base;
sc 87 dev/isa/ess_isapnp.c sc->sc_audio1.irq = ia->ipa_irq[0].num;
sc 88 dev/isa/ess_isapnp.c sc->sc_audio1.ist = ia->ipa_irq[0].type;
sc 89 dev/isa/ess_isapnp.c sc->sc_audio1.drq = ia->ipa_drq[0].num;
sc 90 dev/isa/ess_isapnp.c sc->sc_audio2.irq = ia->ipa_irq[0].num;
sc 91 dev/isa/ess_isapnp.c sc->sc_audio2.ist = ia->ipa_irq[0].type;
sc 92 dev/isa/ess_isapnp.c sc->sc_audio2.drq = ia->ipa_drq[1].num;
sc 94 dev/isa/ess_isapnp.c sc->sc_isa = parent->dv_parent;
sc 96 dev/isa/ess_isapnp.c if (!essmatch(sc)) {
sc 101 dev/isa/ess_isapnp.c essattach(sc);
sc 51 dev/isa/gscsio.c void *sc;
sc 96 dev/isa/gscsio.c bus_space_read_1(sc->sc_iot, acb->ioh, (reg))
sc 98 dev/isa/gscsio.c bus_space_write_1(sc->sc_iot, acb->ioh, (reg), (val))
sc 146 dev/isa/gscsio.c struct gscsio_softc *sc = (void *)self;
sc 151 dev/isa/gscsio.c sc->sc_iot = ia->ia_iot;
sc 152 dev/isa/gscsio.c if (bus_space_map(sc->sc_iot, ia->ipa_io[0].base, GSCSIO_IOSIZE,
sc 153 dev/isa/gscsio.c 0, &sc->sc_ioh)) {
sc 158 dev/isa/gscsio.c idxread(sc->sc_iot, sc->sc_ioh, GSCSIO_REV));
sc 162 dev/isa/gscsio.c sc->sc_ld_en[gscsio_ld[i].ld_num] = 0;
sc 165 dev/isa/gscsio.c idxwrite(sc->sc_iot, sc->sc_ioh, GSCSIO_LDN,
sc 167 dev/isa/gscsio.c if ((idxread(sc->sc_iot, sc->sc_ioh, GSCSIO_ACT) &
sc 173 dev/isa/gscsio.c iobase = idxread(sc->sc_iot, sc->sc_ioh,
sc 176 dev/isa/gscsio.c iobase |= idxread(sc->sc_iot, sc->sc_ioh,
sc 178 dev/isa/gscsio.c if (bus_space_map(sc->sc_iot, iobase,
sc 180 dev/isa/gscsio.c &sc->sc_ld_ioh0[gscsio_ld[i].ld_num]))
sc 186 dev/isa/gscsio.c iobase = idxread(sc->sc_iot, sc->sc_ioh,
sc 189 dev/isa/gscsio.c iobase |= idxread(sc->sc_iot, sc->sc_ioh,
sc 191 dev/isa/gscsio.c if (bus_space_map(sc->sc_iot, iobase,
sc 193 dev/isa/gscsio.c &sc->sc_ld_ioh0[gscsio_ld[i].ld_num])) {
sc 194 dev/isa/gscsio.c bus_space_unmap(sc->sc_iot,
sc 195 dev/isa/gscsio.c sc->sc_ld_ioh0[gscsio_ld[i].ld_num],
sc 201 dev/isa/gscsio.c sc->sc_ld_en[gscsio_ld[i].ld_num] = 1;
sc 207 dev/isa/gscsio.c if (sc->sc_ld_en[GSCSIO_LDN_ACB1]) {
sc 208 dev/isa/gscsio.c sc->sc_acb[0].sc = sc;
sc 209 dev/isa/gscsio.c sc->sc_acb[0].ioh = sc->sc_ld_ioh0[GSCSIO_LDN_ACB1];
sc 210 dev/isa/gscsio.c rw_init(&sc->sc_acb[0].buslock, "iiclk");
sc 211 dev/isa/gscsio.c gscsio_acb_init(&sc->sc_acb[0], &sc->sc_acb1_tag);
sc 215 dev/isa/gscsio.c if (sc->sc_ld_en[GSCSIO_LDN_ACB2]) {
sc 216 dev/isa/gscsio.c sc->sc_acb[1].sc = sc;
sc 217 dev/isa/gscsio.c sc->sc_acb[1].ioh = sc->sc_ld_ioh0[GSCSIO_LDN_ACB2];
sc 218 dev/isa/gscsio.c rw_init(&sc->sc_acb[1].buslock, "iiclk");
sc 219 dev/isa/gscsio.c gscsio_acb_init(&sc->sc_acb[1], &sc->sc_acb2_tag);
sc 226 dev/isa/gscsio.c struct gscsio_softc *sc = acb->sc;
sc 254 dev/isa/gscsio.c config_found(&sc->sc_dev, &iba, iicbus_print);
sc 260 dev/isa/gscsio.c struct gscsio_softc *sc = acb->sc;
sc 268 dev/isa/gscsio.c sc->sc_dev.dv_xname, flags);
sc 275 dev/isa/gscsio.c sc->sc_dev.dv_xname, flags);
sc 286 dev/isa/gscsio.c sc->sc_dev.dv_xname, flags);
sc 297 dev/isa/gscsio.c struct gscsio_softc *sc = acb->sc;
sc 342 dev/isa/gscsio.c struct gscsio_softc *sc = acb->sc;
sc 356 dev/isa/gscsio.c struct gscsio_softc *sc = acb->sc;
sc 370 dev/isa/gscsio.c struct gscsio_softc *sc = acb->sc;
sc 396 dev/isa/gscsio.c struct gscsio_softc *sc = acb->sc;
sc 421 dev/isa/gscsio.c struct gscsio_softc *sc = acb->sc;
sc 360 dev/isa/gus.c struct gus_softc *sc = addr;
sc 364 dev/isa/gus.c if (sc->sc_flags & GUS_OPEN)
sc 371 dev/isa/gus.c sc->sc_flags |= GUS_OPEN;
sc 372 dev/isa/gus.c sc->sc_dmabuf = 0;
sc 373 dev/isa/gus.c sc->sc_playbuf = -1;
sc 374 dev/isa/gus.c sc->sc_bufcnt = 0;
sc 375 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].start_addr = GUS_MEM_OFFSET - 1;
sc 376 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].current_addr = GUS_MEM_OFFSET;
sc 378 dev/isa/gus.c if (HAS_CODEC(sc)) {
sc 379 dev/isa/gus.c ad1848_open(&sc->sc_codec, flags);
sc 380 dev/isa/gus.c sc->sc_codec.mute[AD1848_AUX1_CHANNEL] = 0;
sc 381 dev/isa/gus.c ad1848_mute_channel(&sc->sc_codec, AD1848_AUX1_CHANNEL, 0); /* turn on DAC output */
sc 383 dev/isa/gus.c sc->sc_codec.mute[AD1848_MONO_CHANNEL] = 0;
sc 384 dev/isa/gus.c ad1848_mute_channel(&sc->sc_codec, AD1848_MONO_CHANNEL, 0);
sc 388 dev/isa/gus.c if (HAS_MIXER(sc)) {
sc 389 dev/isa/gus.c gusics_mic_mute(&sc->sc_mixer, 0);
sc 391 dev/isa/gus.c gus_mic_ctl(sc, SPKR_ON);
sc 393 dev/isa/gus.c if (sc->sc_nbufs == 0)
sc 394 dev/isa/gus.c gus_round_blocksize(sc, GUS_BUFFER_MULTIPLE); /* default blksiz */
sc 408 dev/isa/gus.c gus_deinterleave(sc, buf, size)
sc 409 dev/isa/gus.c struct gus_softc *sc;
sc 417 dev/isa/gus.c if (size > sc->sc_blocksize) {
sc 418 dev/isa/gus.c printf("gus: deinterleave %d > %d\n", size, sc->sc_blocksize);
sc 420 dev/isa/gus.c } else if (size < sc->sc_blocksize) {
sc 421 dev/isa/gus.c DPRINTF(("gus: deinterleave %d < %d\n", size, sc->sc_blocksize));
sc 427 dev/isa/gus.c if (sc->sc_precision == 16) {
sc 428 dev/isa/gus.c u_short *dei = sc->sc_deintr_buf;
sc 449 dev/isa/gus.c u_char *dei = sc->sc_deintr_buf;
sc 482 dev/isa/gus.c struct gus_softc *sc = arg;
sc 483 dev/isa/gus.c struct stereo_dma_intr *sa = &sc->sc_stereo;
sc 491 dev/isa/gus.c sc->sc_dmaoutintr = sa->intr;
sc 492 dev/isa/gus.c sc->sc_outarg = sa->arg;
sc 506 dev/isa/gus.c gusdmaout(sc, sa->flags, sa->dmabuf, (caddr_t) sa->buffer, sa->size);
sc 529 dev/isa/gus.c struct gus_softc *sc = addr;
sc 536 dev/isa/gus.c if (size != sc->sc_blocksize) {
sc 538 dev/isa/gus.c size, sc->sc_blocksize));
sc 543 dev/isa/gus.c if (sc->sc_precision == 16)
sc 545 dev/isa/gus.c if (sc->sc_encoding == AUDIO_ENCODING_ULAW ||
sc 546 dev/isa/gus.c sc->sc_encoding == AUDIO_ENCODING_ALAW ||
sc 547 dev/isa/gus.c sc->sc_encoding == AUDIO_ENCODING_ULINEAR_BE ||
sc 548 dev/isa/gus.c sc->sc_encoding == AUDIO_ENCODING_ULINEAR_LE)
sc 551 dev/isa/gus.c if (sc->sc_channels == 2) {
sc 552 dev/isa/gus.c if (sc->sc_precision == 16) {
sc 564 dev/isa/gus.c gus_deinterleave(sc, (void *)buffer, size);
sc 568 dev/isa/gus.c boarddma = size * sc->sc_dmabuf + GUS_MEM_OFFSET;
sc 570 dev/isa/gus.c sc->sc_stereo.intr = intr;
sc 571 dev/isa/gus.c sc->sc_stereo.arg = arg;
sc 572 dev/isa/gus.c sc->sc_stereo.size = size;
sc 573 dev/isa/gus.c sc->sc_stereo.dmabuf = boarddma + GUS_LEFT_RIGHT_OFFSET;
sc 574 dev/isa/gus.c sc->sc_stereo.buffer = buffer + size;
sc 575 dev/isa/gus.c sc->sc_stereo.flags = flags;
sc 578 dev/isa/gus.c arg = sc;
sc 581 dev/isa/gus.c boarddma = size * sc->sc_dmabuf + GUS_MEM_OFFSET;
sc 584 dev/isa/gus.c sc->sc_flags |= GUS_LOCKED;
sc 585 dev/isa/gus.c sc->sc_dmaoutintr = intr;
sc 586 dev/isa/gus.c sc->sc_outarg = arg;
sc 600 dev/isa/gus.c gusdmaout(sc, flags, boarddma, (caddr_t) buffer, size);
sc 610 dev/isa/gus.c struct gus_softc *sc = ac->parent;
sc 616 dev/isa/gus.c gusclose(sc);
sc 626 dev/isa/gus.c struct gus_softc *sc = addr;
sc 628 dev/isa/gus.c DPRINTF(("gus_close: sc=%p\n", sc));
sc 632 dev/isa/gus.c gus_halt_out_dma(sc);
sc 635 dev/isa/gus.c gus_halt_in_dma(sc);
sc 637 dev/isa/gus.c sc->sc_flags &= ~(GUS_OPEN|GUS_LOCKED|GUS_DMAOUT_ACTIVE|GUS_DMAIN_ACTIVE);
sc 639 dev/isa/gus.c if (sc->sc_deintr_buf) {
sc 640 dev/isa/gus.c free(sc->sc_deintr_buf, M_DEVBUF);
sc 641 dev/isa/gus.c sc->sc_deintr_buf = NULL;
sc 646 dev/isa/gus.c gus_stop_voice(sc, GUS_VOICE_LEFT, 1);
sc 647 dev/isa/gus.c gus_stop_voice(sc, GUS_VOICE_RIGHT, 0);
sc 665 dev/isa/gus.c struct gus_softc *sc = arg;
sc 666 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 667 dev/isa/gus.c bus_space_handle_t ioh1 = sc->sc_ioh1;
sc 668 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 677 dev/isa/gus.c if (HAS_CODEC(sc))
sc 678 dev/isa/gus.c retval = ad1848_intr(&sc->sc_codec);
sc 680 dev/isa/gus.c DMAPRINTF(("gusintr dma flags=%x\n", sc->sc_flags));
sc 684 dev/isa/gus.c retval += gus_dmaout_intr(sc);
sc 685 dev/isa/gus.c if (sc->sc_flags & GUS_DMAIN_ACTIVE) {
sc 689 dev/isa/gus.c retval += gus_dmain_intr(sc);
sc 694 dev/isa/gus.c DMAPRINTF(("gusintr voice flags=%x\n", sc->sc_flags));
sc 698 dev/isa/gus.c retval += gus_voice_intr(sc);
sc 729 dev/isa/gus.c struct gus_softc *sc = arg;
sc 730 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 731 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 734 dev/isa/gus.c printf("%s: dmaout timeout\n", sc->sc_dev.dv_xname);
sc 745 dev/isa/gus.c isa_dmaabort(sc->sc_dev.dv_parent, sc->sc_drq);
sc 748 dev/isa/gus.c gus_dmaout_dointr(sc);
sc 759 dev/isa/gus.c gus_dmaout_intr(sc)
sc 760 dev/isa/gus.c struct gus_softc *sc;
sc 762 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 763 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 772 dev/isa/gus.c timeout_del(&sc->sc_dma_tmo);
sc 773 dev/isa/gus.c gus_dmaout_dointr(sc);
sc 780 dev/isa/gus.c gus_dmaout_dointr(sc)
sc 781 dev/isa/gus.c struct gus_softc *sc;
sc 783 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 784 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 787 dev/isa/gus.c isa_dmadone(sc->sc_dev.dv_parent, sc->sc_drq);
sc 788 dev/isa/gus.c sc->sc_flags &= ~GUS_DMAOUT_ACTIVE; /* pending DMA is done */
sc 789 dev/isa/gus.c DMAPRINTF(("gus_dmaout_dointr %d @ %p\n", sc->sc_dmaoutcnt,
sc 790 dev/isa/gus.c sc->sc_dmaoutaddr));
sc 799 dev/isa/gus.c if (sc->sc_dmabuf == sc->sc_nbufs - 1) {
sc 801 dev/isa/gus.c switch (sc->sc_encoding) {
sc 804 dev/isa/gus.c if (sc->sc_precision == 8)
sc 808 dev/isa/gus.c guspoke(iot, ioh2, sc->sc_gusaddr -
sc 809 dev/isa/gus.c (sc->sc_nbufs - 1) * sc->sc_chanblocksize - i,
sc 810 dev/isa/gus.c sc->sc_dmaoutaddr[sc->sc_dmaoutcnt-i]);
sc 814 dev/isa/gus.c guspoke(iot, ioh2, sc->sc_gusaddr -
sc 815 dev/isa/gus.c (sc->sc_nbufs - 1) * sc->sc_chanblocksize - 2,
sc 817 dev/isa/gus.c sc->sc_gusaddr + sc->sc_chanblocksize - 2));
sc 822 dev/isa/gus.c guspoke(iot, ioh2, sc->sc_gusaddr -
sc 823 dev/isa/gus.c (sc->sc_nbufs - 1) * sc->sc_chanblocksize - 1,
sc 825 dev/isa/gus.c sc->sc_gusaddr + sc->sc_chanblocksize - 1));
sc 833 dev/isa/gus.c if (sc->sc_dmaoutintr == stereo_dmaintr) {
sc 834 dev/isa/gus.c (*sc->sc_dmaoutintr)(sc->sc_outarg);
sc 844 dev/isa/gus.c sc->sc_flags &= ~GUS_LOCKED;
sc 845 dev/isa/gus.c if (sc->sc_voc[GUS_VOICE_LEFT].voccntl &
sc 847 dev/isa/gus.c if (sc->sc_flags & GUS_PLAYING) {
sc 848 dev/isa/gus.c printf("%s: playing yet stopped?\n", sc->sc_dev.dv_xname);
sc 850 dev/isa/gus.c sc->sc_bufcnt++; /* another yet to be played */
sc 851 dev/isa/gus.c gus_start_playing(sc, sc->sc_dmabuf);
sc 865 dev/isa/gus.c if (++sc->sc_bufcnt == 2) {
sc 873 dev/isa/gus.c if (sc->sc_dmabuf == 0 &&
sc 874 dev/isa/gus.c sc->sc_playbuf == sc->sc_nbufs - 1) {
sc 877 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].voccntl |= GUSMASK_LOOP_ENABLE;
sc 878 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].volcntl &= ~GUSMASK_VOICE_ROLL;
sc 883 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].voccntl &= ~GUSMASK_LOOP_ENABLE;
sc 884 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].volcntl |= GUSMASK_VOICE_ROLL;
sc 890 dev/isa/gus.c playstats[playcntr].endaddr = sc->sc_voc[GUS_VOICE_LEFT].end_addr;
sc 891 dev/isa/gus.c playstats[playcntr].voccntl = sc->sc_voc[GUS_VOICE_LEFT].voccntl;
sc 892 dev/isa/gus.c playstats[playcntr].volcntl = sc->sc_voc[GUS_VOICE_LEFT].volcntl;
sc 893 dev/isa/gus.c playstats[playcntr].playbuf = sc->sc_playbuf;
sc 894 dev/isa/gus.c playstats[playcntr].dmabuf = sc->sc_dmabuf;
sc 895 dev/isa/gus.c playstats[playcntr].bufcnt = sc->sc_bufcnt;
sc 896 dev/isa/gus.c playstats[playcntr++].curaddr = gus_get_curaddr(sc, GUS_VOICE_LEFT);
sc 902 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[GUS_VOICE_LEFT].voccntl);
sc 904 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[GUS_VOICE_LEFT].volcntl);
sc 907 dev/isa/gus.c gus_bufcnt[sc->sc_bufcnt-1]++;
sc 912 dev/isa/gus.c sc->sc_dmabuf = ++sc->sc_dmabuf % sc->sc_nbufs;
sc 918 dev/isa/gus.c if (sc->sc_dmaoutintr && sc->sc_bufcnt < sc->sc_nbufs) {
sc 920 dev/isa/gus.c void (*pfunc)(void *) = sc->sc_dmaoutintr;
sc 921 dev/isa/gus.c void *arg = sc->sc_outarg;
sc 923 dev/isa/gus.c sc->sc_outarg = 0;
sc 924 dev/isa/gus.c sc->sc_dmaoutintr = 0;
sc 934 dev/isa/gus.c gus_voice_intr(sc)
sc 935 dev/isa/gus.c struct gus_softc *sc;
sc 937 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 938 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 984 dev/isa/gus.c sc->sc_dev.dv_xname, voice));
sc 985 dev/isa/gus.c gus_stop_voice(sc, voice, 0);
sc 988 dev/isa/gus.c gus_stop_voice(sc, voice, 1);
sc 990 dev/isa/gus.c gus_stop_voice(sc, GUS_VOICE_RIGHT, 0);
sc 991 dev/isa/gus.c sc->sc_bufcnt--; /* it finished a buffer */
sc 992 dev/isa/gus.c if (sc->sc_bufcnt > 0) {
sc 1000 dev/isa/gus.c sc->sc_dev.dv_xname, sc->sc_bufcnt);
sc 1003 dev/isa/gus.c sc->sc_playbuf = ++sc->sc_playbuf % sc->sc_nbufs;
sc 1004 dev/isa/gus.c gus_start_playing(sc, sc->sc_playbuf);
sc 1005 dev/isa/gus.c } else if (sc->sc_bufcnt < 0) {
sc 1008 dev/isa/gus.c sc->sc_dev.dv_xname);
sc 1012 dev/isa/gus.c sc->sc_dev.dv_xname);
sc 1015 dev/isa/gus.c sc->sc_playbuf = -1; /* none are active */
sc 1020 dev/isa/gus.c } else if (sc->sc_bufcnt != 0) {
sc 1026 dev/isa/gus.c if (gus_continue_playing(sc, voice)) {
sc 1032 dev/isa/gus.c gus_stop_voice(sc, GUS_VOICE_LEFT, 1);
sc 1034 dev/isa/gus.c gus_stop_voice(sc, GUS_VOICE_RIGHT, 0);
sc 1035 dev/isa/gus.c sc->sc_playbuf = -1;
sc 1060 dev/isa/gus.c if (sc->sc_dmaoutintr && !(sc->sc_flags & GUS_LOCKED)) {
sc 1061 dev/isa/gus.c if (sc->sc_dmaoutintr == stereo_dmaintr)
sc 1065 dev/isa/gus.c void (*pfunc)(void *) = sc->sc_dmaoutintr;
sc 1066 dev/isa/gus.c void *arg = sc->sc_outarg;
sc 1068 dev/isa/gus.c sc->sc_outarg = 0;
sc 1069 dev/isa/gus.c sc->sc_dmaoutintr = 0;
sc 1083 dev/isa/gus.c gus_start_playing(sc, bufno)
sc 1084 dev/isa/gus.c struct gus_softc *sc;
sc 1087 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1088 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 1097 dev/isa/gus.c if (sc->sc_bufcnt == 1) {
sc 1098 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].voccntl &= ~(GUSMASK_LOOP_ENABLE);
sc 1099 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].volcntl &= ~(GUSMASK_VOICE_ROLL);
sc 1101 dev/isa/gus.c if (bufno == sc->sc_nbufs - 1) {
sc 1102 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].voccntl |= GUSMASK_LOOP_ENABLE;
sc 1103 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].volcntl &= ~(GUSMASK_VOICE_ROLL);
sc 1105 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].voccntl &= ~GUSMASK_LOOP_ENABLE;
sc 1106 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].volcntl |= GUSMASK_VOICE_ROLL;
sc 1113 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[GUS_VOICE_LEFT].voccntl);
sc 1116 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[GUS_VOICE_LEFT].volcntl);
sc 1118 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].current_addr =
sc 1119 dev/isa/gus.c GUS_MEM_OFFSET + sc->sc_chanblocksize * bufno;
sc 1120 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].end_addr =
sc 1121 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].current_addr + sc->sc_chanblocksize - 1;
sc 1122 dev/isa/gus.c sc->sc_voc[GUS_VOICE_RIGHT].current_addr =
sc 1123 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].current_addr +
sc 1124 dev/isa/gus.c (gus_dostereo && sc->sc_channels == 2 ? GUS_LEFT_RIGHT_OFFSET : 0);
sc 1130 dev/isa/gus.c sc->sc_voc[GUS_VOICE_RIGHT].voccntl |= GUSMASK_LOOP_ENABLE;
sc 1131 dev/isa/gus.c sc->sc_voc[GUS_VOICE_RIGHT].volcntl &= ~(GUSMASK_VOICE_ROLL);
sc 1136 dev/isa/gus.c playstats[playcntr].curaddr = sc->sc_voc[GUS_VOICE_LEFT].current_addr;
sc 1138 dev/isa/gus.c playstats[playcntr].voccntl = sc->sc_voc[GUS_VOICE_LEFT].voccntl;
sc 1139 dev/isa/gus.c playstats[playcntr].volcntl = sc->sc_voc[GUS_VOICE_LEFT].volcntl;
sc 1140 dev/isa/gus.c playstats[playcntr].endaddr = sc->sc_voc[GUS_VOICE_LEFT].end_addr;
sc 1142 dev/isa/gus.c playstats[playcntr].dmabuf = sc->sc_dmabuf;
sc 1143 dev/isa/gus.c playstats[playcntr].bufcnt = sc->sc_bufcnt;
sc 1151 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[GUS_VOICE_RIGHT].voccntl);
sc 1153 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[GUS_VOICE_RIGHT].volcntl);
sc 1155 dev/isa/gus.c gus_start_voice(sc, GUS_VOICE_RIGHT, 0);
sc 1156 dev/isa/gus.c gus_start_voice(sc, GUS_VOICE_LEFT, 1);
sc 1157 dev/isa/gus.c if (sc->sc_playbuf == -1)
sc 1159 dev/isa/gus.c sc->sc_playbuf = bufno;
sc 1163 dev/isa/gus.c gus_continue_playing(sc, voice)
sc 1164 dev/isa/gus.c struct gus_softc *sc;
sc 1167 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1168 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 1175 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[voice].voccntl & ~(GUSMASK_VOICE_IRQ));
sc 1181 dev/isa/gus.c sc->sc_playbuf = ++sc->sc_playbuf % sc->sc_nbufs;
sc 1186 dev/isa/gus.c if (--sc->sc_bufcnt == 0) {
sc 1189 dev/isa/gus.c if (sc->sc_playbuf == sc->sc_dmabuf && (sc->sc_flags & GUS_LOCKED)) {
sc 1190 dev/isa/gus.c printf("%s: continue into active dmabuf?\n", sc->sc_dev.dv_xname);
sc 1205 dev/isa/gus.c gus_set_endaddr(sc, voice, GUS_MEM_OFFSET +
sc 1206 dev/isa/gus.c sc->sc_chanblocksize * (sc->sc_playbuf + 1) - 1);
sc 1208 dev/isa/gus.c if (sc->sc_bufcnt < 2) {
sc 1214 dev/isa/gus.c sc->sc_voc[voice].voccntl &= ~GUSMASK_LOOP_ENABLE;
sc 1215 dev/isa/gus.c sc->sc_voc[voice].volcntl &= ~GUSMASK_VOICE_ROLL;
sc 1222 dev/isa/gus.c if (sc->sc_playbuf == sc->sc_nbufs - 1) {
sc 1223 dev/isa/gus.c sc->sc_voc[voice].voccntl |= GUSMASK_LOOP_ENABLE;
sc 1224 dev/isa/gus.c sc->sc_voc[voice].volcntl &= ~GUSMASK_VOICE_ROLL;
sc 1227 dev/isa/gus.c sc->sc_voc[voice].voccntl &= ~GUSMASK_LOOP_ENABLE;
sc 1228 dev/isa/gus.c sc->sc_voc[voice].volcntl |= GUSMASK_VOICE_ROLL;
sc 1235 dev/isa/gus.c playstats[playcntr].curaddr = gus_get_curaddr(sc, voice);
sc 1237 dev/isa/gus.c playstats[playcntr].voccntl = sc->sc_voc[voice].voccntl;
sc 1238 dev/isa/gus.c playstats[playcntr].volcntl = sc->sc_voc[voice].volcntl;
sc 1239 dev/isa/gus.c playstats[playcntr].endaddr = sc->sc_voc[voice].end_addr;
sc 1240 dev/isa/gus.c playstats[playcntr].playbuf = sc->sc_playbuf;
sc 1241 dev/isa/gus.c playstats[playcntr].dmabuf = sc->sc_dmabuf;
sc 1242 dev/isa/gus.c playstats[playcntr++].bufcnt = sc->sc_bufcnt;
sc 1253 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[voice].voccntl);
sc 1255 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[voice].volcntl);
sc 1264 dev/isa/gus.c gusdmaout(sc, flags, gusaddr, buffaddr, length)
sc 1265 dev/isa/gus.c struct gus_softc *sc;
sc 1271 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1272 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 1274 dev/isa/gus.c DMAPRINTF(("gusdmaout flags=%x scflags=%x\n", flags, sc->sc_flags));
sc 1276 dev/isa/gus.c sc->sc_gusaddr = gusaddr;
sc 1283 dev/isa/gus.c if (sc->sc_drq >= 4) {
sc 1305 dev/isa/gus.c sc->sc_dmaoutaddr = (u_char *) buffaddr;
sc 1306 dev/isa/gus.c sc->sc_dmaoutcnt = length;
sc 1307 dev/isa/gus.c isa_dmastart(sc->sc_dev.dv_parent, sc->sc_drq, buffaddr, length,
sc 1314 dev/isa/gus.c sc->sc_flags |= GUS_DMAOUT_ACTIVE;
sc 1329 dev/isa/gus.c timeout_add(&sc->sc_dma_tmo, hz);
sc 1338 dev/isa/gus.c gus_start_voice(sc, voice, intrs)
sc 1339 dev/isa/gus.c struct gus_softc *sc;
sc 1343 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1344 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 1354 dev/isa/gus.c start = sc->sc_voc[voice].start_addr;
sc 1355 dev/isa/gus.c current = sc->sc_voc[voice].current_addr;
sc 1356 dev/isa/gus.c end = sc->sc_voc[voice].end_addr;
sc 1362 dev/isa/gus.c if (sc->sc_voc[voice].voccntl & GUSMASK_DATA_SIZE16) {
sc 1396 dev/isa/gus.c sc->sc_flags |= GUS_PLAYING; /* playing is about to start */
sc 1397 dev/isa/gus.c sc->sc_voc[voice].voccntl |= GUSMASK_VOICE_IRQ;
sc 1398 dev/isa/gus.c DMAPRINTF(("gus voice playing=%x\n", sc->sc_flags));
sc 1400 dev/isa/gus.c sc->sc_voc[voice].voccntl &= ~GUSMASK_VOICE_IRQ;
sc 1401 dev/isa/gus.c sc->sc_voc[voice].voccntl &= ~(GUSMASK_VOICE_STOPPED |
sc 1412 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[voice].current_volume >> 4);
sc 1419 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[voice].voccntl);
sc 1424 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[voice].voccntl);
sc 1435 dev/isa/gus.c gus_stop_voice(sc, voice, intrs_too)
sc 1436 dev/isa/gus.c struct gus_softc *sc;
sc 1440 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1441 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 1443 dev/isa/gus.c sc->sc_voc[voice].voccntl |= GUSMASK_VOICE_STOPPED |
sc 1446 dev/isa/gus.c sc->sc_voc[voice].voccntl &= ~(GUSMASK_VOICE_IRQ);
sc 1448 dev/isa/gus.c sc->sc_flags &= ~GUS_PLAYING;
sc 1450 dev/isa/gus.c DMAPRINTF(("gusintr voice notplaying=%x\n", sc->sc_flags));
sc 1459 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[voice].voccntl);
sc 1464 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[voice].voccntl);
sc 1478 dev/isa/gus.c gus_set_volume(sc, voice, volume)
sc 1479 dev/isa/gus.c struct gus_softc *sc;
sc 1482 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1483 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 1488 dev/isa/gus.c sc->sc_voc[voice].current_volume = gusvol;
sc 1516 dev/isa/gus.c struct gus_softc *sc = ac->parent;
sc 1522 dev/isa/gus.c error = gus_set_params(sc, setmode, usemode, p, r);
sc 1532 dev/isa/gus.c struct gus_softc *sc = addr;
sc 1550 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].voccntl &= ~GUSMASK_DATA_SIZE16;
sc 1551 dev/isa/gus.c sc->sc_voc[GUS_VOICE_RIGHT].voccntl &= ~GUSMASK_DATA_SIZE16;
sc 1553 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].voccntl |= GUSMASK_DATA_SIZE16;
sc 1554 dev/isa/gus.c sc->sc_voc[GUS_VOICE_RIGHT].voccntl |= GUSMASK_DATA_SIZE16;
sc 1557 dev/isa/gus.c sc->sc_encoding = p->encoding;
sc 1558 dev/isa/gus.c sc->sc_precision = p->precision;
sc 1559 dev/isa/gus.c sc->sc_channels = p->channels;
sc 1563 dev/isa/gus.c if (p->sample_rate > gus_max_frequency[sc->sc_voices - GUS_MIN_VOICES])
sc 1564 dev/isa/gus.c p->sample_rate = gus_max_frequency[sc->sc_voices - GUS_MIN_VOICES];
sc 1566 dev/isa/gus.c sc->sc_irate = p->sample_rate;
sc 1568 dev/isa/gus.c sc->sc_orate = p->sample_rate;
sc 1599 dev/isa/gus.c struct gus_softc *sc = ac->parent;
sc 1602 dev/isa/gus.c return gus_round_blocksize(sc, blocksize);
sc 1610 dev/isa/gus.c struct gus_softc *sc = addr;
sc 1614 dev/isa/gus.c if ((sc->sc_encoding == AUDIO_ENCODING_ULAW ||
sc 1615 dev/isa/gus.c sc->sc_encoding == AUDIO_ENCODING_ALAW) && blocksize > 32768)
sc 1626 dev/isa/gus.c if (sc->sc_deintr_buf) {
sc 1627 dev/isa/gus.c free(sc->sc_deintr_buf, M_DEVBUF);
sc 1628 dev/isa/gus.c sc->sc_deintr_buf = NULL;
sc 1630 dev/isa/gus.c sc->sc_deintr_buf = malloc(blocksize/2, M_DEVBUF, M_WAITOK);
sc 1632 dev/isa/gus.c sc->sc_blocksize = blocksize;
sc 1634 dev/isa/gus.c sc->sc_nbufs = /*GUS_MEM_FOR_BUFFERS / blocksize*/ 2;
sc 1636 dev/isa/gus.c gus_set_chan_addrs(sc);
sc 1645 dev/isa/gus.c struct gus_softc *sc = (struct gus_softc *) addr;
sc 1648 dev/isa/gus.c return sc->sc_ogain / 2;
sc 1651 dev/isa/gus.c inline void gus_set_voices(sc, voices)
sc 1652 dev/isa/gus.c struct gus_softc *sc;
sc 1655 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1656 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 1664 dev/isa/gus.c sc->sc_voices = voices;
sc 1676 dev/isa/gus.c struct gus_softc *sc = ac->parent;
sc 1682 dev/isa/gus.c return gus_commit_settings(sc);
sc 1692 dev/isa/gus.c struct gus_softc *sc = addr;
sc 1695 dev/isa/gus.c DPRINTF(("gus_commit_settings called (gain = %d)\n",sc->sc_ogain));
sc 1700 dev/isa/gus.c gus_set_recrate(sc, sc->sc_irate);
sc 1701 dev/isa/gus.c gus_set_volume(sc, GUS_VOICE_LEFT, sc->sc_ogain);
sc 1702 dev/isa/gus.c gus_set_volume(sc, GUS_VOICE_RIGHT, sc->sc_ogain);
sc 1703 dev/isa/gus.c gus_set_samprate(sc, GUS_VOICE_LEFT, sc->sc_orate);
sc 1704 dev/isa/gus.c gus_set_samprate(sc, GUS_VOICE_RIGHT, sc->sc_orate);
sc 1706 dev/isa/gus.c gus_set_chan_addrs(sc);
sc 1712 dev/isa/gus.c gus_set_chan_addrs(sc)
sc 1713 dev/isa/gus.c struct gus_softc *sc;
sc 1728 dev/isa/gus.c if (sc->sc_channels == 2)
sc 1729 dev/isa/gus.c sc->sc_chanblocksize = sc->sc_blocksize/2;
sc 1731 dev/isa/gus.c sc->sc_chanblocksize = sc->sc_blocksize;
sc 1733 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].start_addr = GUS_MEM_OFFSET - 1;
sc 1734 dev/isa/gus.c sc->sc_voc[GUS_VOICE_RIGHT].start_addr =
sc 1735 dev/isa/gus.c (gus_dostereo && sc->sc_channels == 2 ? GUS_LEFT_RIGHT_OFFSET : 0)
sc 1737 dev/isa/gus.c sc->sc_voc[GUS_VOICE_RIGHT].current_addr =
sc 1738 dev/isa/gus.c sc->sc_voc[GUS_VOICE_RIGHT].start_addr + 1;
sc 1739 dev/isa/gus.c sc->sc_voc[GUS_VOICE_RIGHT].end_addr =
sc 1740 dev/isa/gus.c sc->sc_voc[GUS_VOICE_RIGHT].start_addr +
sc 1741 dev/isa/gus.c sc->sc_nbufs * sc->sc_chanblocksize;
sc 1750 dev/isa/gus.c gus_set_samprate(sc, voice, freq)
sc 1751 dev/isa/gus.c struct gus_softc *sc;
sc 1754 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1755 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 1764 dev/isa/gus.c temp = (u_long) gus_max_frequency[sc->sc_voices-GUS_MIN_VOICES];
sc 1779 dev/isa/gus.c sc->sc_voc[voice].rate = freq;
sc 1789 dev/isa/gus.c gus_set_recrate(sc, rate)
sc 1790 dev/isa/gus.c struct gus_softc *sc;
sc 1793 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1794 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 1817 dev/isa/gus.c struct ad1848_softc *sc = addr;
sc 1818 dev/isa/gus.c return gus_speaker_ctl(sc->parent, newstate);
sc 1826 dev/isa/gus.c struct gus_softc *sc = (struct gus_softc *) addr;
sc 1827 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1828 dev/isa/gus.c bus_space_handle_t ioh1 = sc->sc_ioh1;
sc 1832 dev/isa/gus.c (sc->sc_mixcontrol & GUSMASK_LINE_OUT)) {
sc 1833 dev/isa/gus.c sc->sc_mixcontrol &= ~GUSMASK_LINE_OUT;
sc 1834 dev/isa/gus.c bus_space_write_1(iot, ioh1, GUS_MIX_CONTROL, sc->sc_mixcontrol);
sc 1837 dev/isa/gus.c (sc->sc_mixcontrol & GUSMASK_LINE_OUT) == 0) {
sc 1838 dev/isa/gus.c sc->sc_mixcontrol |= GUSMASK_LINE_OUT;
sc 1839 dev/isa/gus.c bus_space_write_1(iot, ioh1, GUS_MIX_CONTROL, sc->sc_mixcontrol);
sc 1850 dev/isa/gus.c struct gus_softc *sc = (struct gus_softc *) addr;
sc 1851 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1852 dev/isa/gus.c bus_space_handle_t ioh1 = sc->sc_ioh1;
sc 1856 dev/isa/gus.c (sc->sc_mixcontrol & GUSMASK_LINE_IN)) {
sc 1857 dev/isa/gus.c sc->sc_mixcontrol &= ~GUSMASK_LINE_IN;
sc 1858 dev/isa/gus.c bus_space_write_1(iot, ioh1, GUS_MIX_CONTROL, sc->sc_mixcontrol);
sc 1861 dev/isa/gus.c (sc->sc_mixcontrol & GUSMASK_LINE_IN) == 0) {
sc 1862 dev/isa/gus.c sc->sc_mixcontrol |= GUSMASK_LINE_IN;
sc 1863 dev/isa/gus.c bus_space_write_1(iot, ioh1, GUS_MIX_CONTROL, sc->sc_mixcontrol);
sc 1874 dev/isa/gus.c struct gus_softc *sc = (struct gus_softc *) addr;
sc 1875 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1876 dev/isa/gus.c bus_space_handle_t ioh1 = sc->sc_ioh1;
sc 1880 dev/isa/gus.c (sc->sc_mixcontrol & GUSMASK_MIC_IN) == 0) {
sc 1881 dev/isa/gus.c sc->sc_mixcontrol |= GUSMASK_MIC_IN;
sc 1882 dev/isa/gus.c bus_space_write_1(iot, ioh1, GUS_MIX_CONTROL, sc->sc_mixcontrol);
sc 1885 dev/isa/gus.c (sc->sc_mixcontrol & GUSMASK_MIC_IN)) {
sc 1886 dev/isa/gus.c sc->sc_mixcontrol &= ~GUSMASK_MIC_IN;
sc 1887 dev/isa/gus.c bus_space_write_1(iot, ioh1, GUS_MIX_CONTROL, sc->sc_mixcontrol);
sc 1898 dev/isa/gus.c gus_set_endaddr(sc, voice, addr)
sc 1899 dev/isa/gus.c struct gus_softc *sc;
sc 1903 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1904 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 1906 dev/isa/gus.c sc->sc_voc[voice].end_addr = addr;
sc 1908 dev/isa/gus.c if (sc->sc_voc[voice].voccntl & GUSMASK_DATA_SIZE16)
sc 1923 dev/isa/gus.c gus_set_curaddr(sc, voice, addr)
sc 1924 dev/isa/gus.c struct gus_softc *sc;
sc 1928 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1929 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 1931 dev/isa/gus.c sc->sc_voc[voice].current_addr = addr;
sc 1933 dev/isa/gus.c if (sc->sc_voc[voice].voccntl & GUSMASK_DATA_SIZE16)
sc 1949 dev/isa/gus.c gus_get_curaddr(sc, voice)
sc 1950 dev/isa/gus.c struct gus_softc *sc;
sc 1953 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 1954 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 1963 dev/isa/gus.c if (sc->sc_voc[voice].voccntl & GUSMASK_DATA_SIZE16)
sc 1966 dev/isa/gus.c voice, addr, sc->sc_voc[voice].end_addr));
sc 2052 dev/isa/gus.c gusreset(sc, voices)
sc 2053 dev/isa/gus.c struct gus_softc *sc;
sc 2056 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 2057 dev/isa/gus.c bus_space_handle_t ioh1 = sc->sc_ioh1;
sc 2058 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 2059 dev/isa/gus.c bus_space_handle_t ioh4 = sc->sc_ioh4;
sc 2103 dev/isa/gus.c gus_set_voices(sc, voices);
sc 2122 dev/isa/gus.c sc->sc_voc[i].voccntl = GUSMASK_VOICE_STOPPED |
sc 2125 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[i].voccntl);
sc 2127 dev/isa/gus.c sc->sc_voc[i].volcntl = GUSMASK_VOLUME_STOPPED |
sc 2131 dev/isa/gus.c bus_space_write_1(iot, ioh2, GUS_DATA_HIGH, sc->sc_voc[i].volcntl);
sc 2135 dev/isa/gus.c gus_set_samprate(sc, i, 8000);
sc 2182 dev/isa/gus.c gus_init_cs4231(sc)
sc 2183 dev/isa/gus.c struct gus_softc *sc;
sc 2185 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 2186 dev/isa/gus.c bus_space_handle_t ioh1 = sc->sc_ioh1;
sc 2187 dev/isa/gus.c int port = sc->sc_iobase;
sc 2195 dev/isa/gus.c if (sc->sc_drq >= 4)
sc 2197 dev/isa/gus.c if (sc->sc_recdrq >= 4)
sc 2202 dev/isa/gus.c sc->sc_codec.sc_iot = sc->sc_iot;
sc 2203 dev/isa/gus.c sc->sc_codec.sc_iobase = port+GUS_MAX_CODEC_BASE;
sc 2205 dev/isa/gus.c if (ad1848_mapprobe(&sc->sc_codec, sc->sc_codec.sc_iobase) == 0) {
sc 2206 dev/isa/gus.c sc->sc_flags &= ~GUS_CODEC_INSTALLED;
sc 2210 dev/isa/gus.c sc->sc_flags |= GUS_CODEC_INSTALLED;
sc 2211 dev/isa/gus.c sc->sc_codec.parent = sc;
sc 2212 dev/isa/gus.c sc->sc_codec.sc_drq = sc->sc_recdrq;
sc 2213 dev/isa/gus.c sc->sc_codec.sc_recdrq = sc->sc_drq;
sc 2217 dev/isa/gus.c sc->sc_mixcontrol &= ~GUSMASK_LINE_IN; /* 0 enables. */
sc 2218 dev/isa/gus.c sc->sc_mixcontrol |= GUSMASK_MIC_IN; /* 1 enables. */
sc 2219 dev/isa/gus.c bus_space_write_1(iot, ioh1, GUS_MIX_CONTROL, sc->sc_mixcontrol);
sc 2221 dev/isa/gus.c ad1848_attach(&sc->sc_codec);
sc 2223 dev/isa/gus.c ad1848_set_mic_gain(&sc->sc_codec, &vol);
sc 2273 dev/isa/gus.c struct ad1848_softc *sc = addr;
sc 2274 dev/isa/gus.c return gus_dma_input(sc->parent, buf, size, callback, arg);
sc 2289 dev/isa/gus.c struct gus_softc *sc = addr;
sc 2290 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 2291 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 2299 dev/isa/gus.c if (sc->sc_precision == 16)
sc 2304 dev/isa/gus.c if (sc->sc_recdrq >= 4)
sc 2306 dev/isa/gus.c if (sc->sc_encoding == AUDIO_ENCODING_ULAW ||
sc 2307 dev/isa/gus.c sc->sc_encoding == AUDIO_ENCODING_ALAW ||
sc 2308 dev/isa/gus.c sc->sc_encoding == AUDIO_ENCODING_ULINEAR_LE ||
sc 2309 dev/isa/gus.c sc->sc_encoding == AUDIO_ENCODING_ULINEAR_BE)
sc 2311 dev/isa/gus.c if (sc->sc_channels == 2)
sc 2313 dev/isa/gus.c isa_dmastart(sc->sc_dev.dv_parent, sc->sc_recdrq, buf, size,
sc 2317 dev/isa/gus.c sc->sc_flags |= GUS_DMAIN_ACTIVE;
sc 2318 dev/isa/gus.c sc->sc_dmainintr = callback;
sc 2319 dev/isa/gus.c sc->sc_inarg = arg;
sc 2320 dev/isa/gus.c sc->sc_dmaincnt = size;
sc 2321 dev/isa/gus.c sc->sc_dmainaddr = buf;
sc 2333 dev/isa/gus.c gus_dmain_intr(sc)
sc 2334 dev/isa/gus.c struct gus_softc *sc;
sc 2340 dev/isa/gus.c if (sc->sc_dmainintr) {
sc 2341 dev/isa/gus.c isa_dmadone(sc->sc_dev.dv_parent, sc->sc_recdrq);
sc 2342 dev/isa/gus.c callback = sc->sc_dmainintr;
sc 2343 dev/isa/gus.c arg = sc->sc_inarg;
sc 2345 dev/isa/gus.c sc->sc_dmainaddr = 0;
sc 2346 dev/isa/gus.c sc->sc_dmaincnt = 0;
sc 2347 dev/isa/gus.c sc->sc_dmainintr = 0;
sc 2348 dev/isa/gus.c sc->sc_inarg = 0;
sc 2350 dev/isa/gus.c sc->sc_flags &= ~GUS_DMAIN_ACTIVE;
sc 2364 dev/isa/gus.c struct ad1848_softc *sc = addr;
sc 2365 dev/isa/gus.c return gus_halt_out_dma(sc->parent);
sc 2373 dev/isa/gus.c struct ad1848_softc *sc = addr;
sc 2374 dev/isa/gus.c return gus_halt_in_dma(sc->parent);
sc 2384 dev/isa/gus.c struct gus_softc *sc = addr;
sc 2385 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 2386 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 2396 dev/isa/gus.c timeout_del(&sc->sc_dma_tmo);
sc 2397 dev/isa/gus.c isa_dmaabort(sc->sc_dev.dv_parent, sc->sc_drq);
sc 2398 dev/isa/gus.c sc->sc_flags &= ~(GUS_DMAOUT_ACTIVE|GUS_LOCKED);
sc 2399 dev/isa/gus.c sc->sc_dmaoutintr = 0;
sc 2400 dev/isa/gus.c sc->sc_outarg = 0;
sc 2401 dev/isa/gus.c sc->sc_dmaoutaddr = 0;
sc 2402 dev/isa/gus.c sc->sc_dmaoutcnt = 0;
sc 2403 dev/isa/gus.c sc->sc_dmabuf = 0;
sc 2404 dev/isa/gus.c sc->sc_bufcnt = 0;
sc 2405 dev/isa/gus.c sc->sc_playbuf = -1;
sc 2407 dev/isa/gus.c gus_stop_voice(sc, GUS_VOICE_LEFT, 1);
sc 2408 dev/isa/gus.c gus_stop_voice(sc, GUS_VOICE_RIGHT, 0);
sc 2420 dev/isa/gus.c struct gus_softc *sc = addr;
sc 2421 dev/isa/gus.c bus_space_tag_t iot = sc->sc_iot;
sc 2422 dev/isa/gus.c bus_space_handle_t ioh2 = sc->sc_ioh2;
sc 2433 dev/isa/gus.c isa_dmaabort(sc->sc_dev.dv_parent, sc->sc_recdrq);
sc 2434 dev/isa/gus.c sc->sc_flags &= ~GUS_DMAIN_ACTIVE;
sc 2435 dev/isa/gus.c sc->sc_dmainintr = 0;
sc 2436 dev/isa/gus.c sc->sc_inarg = 0;
sc 2437 dev/isa/gus.c sc->sc_dmainaddr = 0;
sc 2438 dev/isa/gus.c sc->sc_dmaincnt = 0;
sc 2468 dev/isa/gus.c struct gus_softc *sc = ac->parent;
sc 2480 dev/isa/gus.c if (sc->sc_mixcontrol & GUSMASK_LINE_OUT)
sc 2491 dev/isa/gus.c cp->un.ord = sc->sc_mixcontrol & GUSMASK_LINE_OUT ? 1 : 0;
sc 2508 dev/isa/gus.c struct gus_softc *sc = addr;
sc 2509 dev/isa/gus.c struct ics2101_softc *ic = &sc->sc_mixer;
sc 2515 dev/isa/gus.c if (!HAS_MIXER(sc) && cp->dev > GUSICS_MASTER_MUTE)
sc 2522 dev/isa/gus.c if (HAS_MIXER(sc))
sc 2526 dev/isa/gus.c sc->sc_mixcontrol & GUSMASK_MIC_IN ? 0 : 1;
sc 2533 dev/isa/gus.c if (HAS_MIXER(sc))
sc 2537 dev/isa/gus.c sc->sc_mixcontrol & GUSMASK_LINE_IN ? 1 : 0;
sc 2544 dev/isa/gus.c if (HAS_MIXER(sc))
sc 2548 dev/isa/gus.c sc->sc_mixcontrol & GUSMASK_LINE_OUT ? 1 : 0;
sc 2679 dev/isa/gus.c struct gus_softc *sc = ac->parent;
sc 2693 dev/isa/gus.c gus_speaker_ctl(sc, vol.left > AUDIO_MIN_GAIN ?
sc 2702 dev/isa/gus.c gus_speaker_ctl(sc, cp->un.ord ? SPKR_OFF : SPKR_ON);
sc 2719 dev/isa/gus.c struct gus_softc *sc = addr;
sc 2720 dev/isa/gus.c struct ics2101_softc *ic = &sc->sc_mixer;
sc 2726 dev/isa/gus.c if (!HAS_MIXER(sc) && cp->dev > GUSICS_MASTER_MUTE)
sc 2734 dev/isa/gus.c if (HAS_MIXER(sc)) {
sc 2737 dev/isa/gus.c gus_mic_ctl(sc, cp->un.ord ? SPKR_OFF : SPKR_ON);
sc 2745 dev/isa/gus.c if (HAS_MIXER(sc)) {
sc 2748 dev/isa/gus.c gus_linein_ctl(sc, cp->un.ord ? SPKR_OFF : SPKR_ON);
sc 2756 dev/isa/gus.c if (HAS_MIXER(sc)) {
sc 2759 dev/isa/gus.c gus_speaker_ctl(sc, cp->un.ord ? SPKR_OFF : SPKR_ON);
sc 2878 dev/isa/gus.c struct gus_softc *sc = addr;
sc 2880 dev/isa/gus.c (sc->sc_recdrq == sc->sc_drq ? 0 : AUDIO_PROP_FULLDUPLEX);
sc 3112 dev/isa/gus.c struct gus_softc *sc = addr;
sc 3116 dev/isa/gus.c if (!HAS_MIXER(sc) && dip->index > GUSICS_MASTER_MUTE)
sc 3330 dev/isa/gus.c gus_init_ics2101(sc)
sc 3331 dev/isa/gus.c struct gus_softc *sc;
sc 3333 dev/isa/gus.c struct ics2101_softc *ic = &sc->sc_mixer;
sc 3334 dev/isa/gus.c sc->sc_mixer.sc_iot = sc->sc_iot;
sc 3335 dev/isa/gus.c sc->sc_mixer.sc_selio = GUS_MIXER_SELECT;
sc 3336 dev/isa/gus.c sc->sc_mixer.sc_selio_ioh = sc->sc_ioh3;
sc 3337 dev/isa/gus.c sc->sc_mixer.sc_dataio = GUS_MIXER_DATA;
sc 3338 dev/isa/gus.c sc->sc_mixer.sc_dataio_ioh = sc->sc_ioh2;
sc 3339 dev/isa/gus.c sc->sc_mixer.sc_flags = (sc->sc_revision == 5) ? ICS_FLIP : 0;
sc 3355 dev/isa/gus.c gus_mic_ctl(sc, SPKR_ON);
sc 3411 dev/isa/gus.c gus_subattach(sc, ia)
sc 3412 dev/isa/gus.c struct gus_softc *sc;
sc 3419 dev/isa/gus.c iot = sc->sc_iot;
sc 3426 dev/isa/gus.c c = bus_space_read_1(iot, sc->sc_ioh3, GUS_BOARD_REV);
sc 3428 dev/isa/gus.c sc->sc_revision = c;
sc 3430 dev/isa/gus.c sc->sc_revision = 0;
sc 3432 dev/isa/gus.c SELECT_GUS_REG(iot, sc->sc_ioh2, GUSREG_RESET);
sc 3433 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh2, GUS_DATA_HIGH, 0x00);
sc 3435 dev/isa/gus.c gusreset(sc, GUS_MAX_VOICES); /* initialize all voices */
sc 3436 dev/isa/gus.c gusreset(sc, GUS_MIN_VOICES); /* then set to just the ones we use */
sc 3447 dev/isa/gus.c if (sc->sc_recdrq == sc->sc_drq)
sc 3448 dev/isa/gus.c d = (unsigned char) (gus_drq_map[sc->sc_drq] |
sc 3451 dev/isa/gus.c d = (unsigned char) (gus_drq_map[sc->sc_drq] |
sc 3452 dev/isa/gus.c gus_drq_map[sc->sc_recdrq] << 3);
sc 3466 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh1, GUS_REG_CONTROL, GUS_REG_IRQCTL);
sc 3467 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh1, GUS_MIX_CONTROL, m);
sc 3468 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh1, GUS_IRQCTL_CONTROL, 0x00);
sc 3469 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh1, 0x0f, 0x00);
sc 3471 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh1, GUS_MIX_CONTROL, m);
sc 3474 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh1, GUS_DMA_CONTROL, d | 0x80);
sc 3476 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh1, GUS_MIX_CONTROL,
sc 3478 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh1, GUS_IRQ_CONTROL, c);
sc 3480 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh1, GUS_MIX_CONTROL, m);
sc 3481 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh1, GUS_DMA_CONTROL, d);
sc 3483 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh1, GUS_MIX_CONTROL,
sc 3485 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh1, GUS_IRQ_CONTROL, c);
sc 3487 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh2, GUS_VOICE_SELECT, 0x00);
sc 3490 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh1, GUS_MIX_CONTROL,
sc 3492 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh2, GUS_VOICE_SELECT, 0x00);
sc 3496 dev/isa/gus.c sc->sc_mixcontrol =
sc 3499 dev/isa/gus.c sc->sc_codec.sc_isa = sc->sc_isa;
sc 3501 dev/isa/gus.c if (sc->sc_revision >= 5 && sc->sc_revision <= 9) {
sc 3502 dev/isa/gus.c sc->sc_flags |= GUS_MIXER_INSTALLED;
sc 3503 dev/isa/gus.c gus_init_ics2101(sc);
sc 3505 dev/isa/gus.c if (sc->sc_revision < 10 || !gus_init_cs4231(sc)) {
sc 3507 dev/isa/gus.c if (sc->sc_drq != -1) {
sc 3508 dev/isa/gus.c if (isa_dmamap_create(sc->sc_isa, sc->sc_drq,
sc 3511 dev/isa/gus.c sc->sc_dev.dv_xname, sc->sc_drq);
sc 3515 dev/isa/gus.c if (sc->sc_recdrq != -1 && sc->sc_recdrq != sc->sc_drq) {
sc 3516 dev/isa/gus.c if (isa_dmamap_create(sc->sc_isa, sc->sc_recdrq,
sc 3519 dev/isa/gus.c sc->sc_dev.dv_xname, sc->sc_recdrq);
sc 3525 dev/isa/gus.c timeout_set(&sc->sc_dma_tmo, gus_dmaout_timeout, sc);
sc 3527 dev/isa/gus.c SELECT_GUS_REG(iot, sc->sc_ioh2, GUSREG_RESET);
sc 3534 dev/isa/gus.c guspoke(iot, sc->sc_ioh2, 0L, 0x00);
sc 3542 dev/isa/gus.c if (guspeek(iot, sc->sc_ioh2, 0L) != 0)
sc 3547 dev/isa/gus.c guspoke(iot, sc->sc_ioh2, loc, 0xaa);
sc 3548 dev/isa/gus.c if (guspeek(iot, sc->sc_ioh2, loc) != 0xaa)
sc 3552 dev/isa/gus.c sc->sc_dsize = i;
sc 3560 dev/isa/gus.c sc->sc_revision);
sc 3562 dev/isa/gus.c printf(": ver %d", sc->sc_revision);
sc 3563 dev/isa/gus.c if (sc->sc_revision >= 10)
sc 3566 dev/isa/gus.c if (HAS_MIXER(sc))
sc 3568 dev/isa/gus.c if (HAS_CODEC(sc))
sc 3569 dev/isa/gus.c printf(", %s codec/mixer", sc->sc_codec.chip_name);
sc 3571 dev/isa/gus.c printf(", %dKB DRAM, ", sc->sc_dsize);
sc 3572 dev/isa/gus.c if (sc->sc_recdrq == sc->sc_drq) {
sc 3575 dev/isa/gus.c printf("full-duplex, record drq %d", sc->sc_recdrq);
sc 3587 dev/isa/gus.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 3588 dev/isa/gus.c IPL_AUDIO, gusintr, sc /* sc->sc_gusdsp */, sc->sc_dev.dv_xname);
sc 3595 dev/isa/gus.c sc->sc_irate = sc->sc_orate = 44100;
sc 3596 dev/isa/gus.c sc->sc_encoding = AUDIO_ENCODING_SLINEAR_LE;
sc 3597 dev/isa/gus.c sc->sc_precision = 16;
sc 3598 dev/isa/gus.c sc->sc_voc[GUS_VOICE_LEFT].voccntl |= GUSMASK_DATA_SIZE16;
sc 3599 dev/isa/gus.c sc->sc_voc[GUS_VOICE_RIGHT].voccntl |= GUSMASK_DATA_SIZE16;
sc 3600 dev/isa/gus.c sc->sc_channels = 1;
sc 3601 dev/isa/gus.c sc->sc_ogain = 340;
sc 3602 dev/isa/gus.c gus_commit_settings(sc);
sc 3609 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh2, GUS_VOICE_SELECT,
sc 3611 dev/isa/gus.c SELECT_GUS_REG(iot, sc->sc_ioh2, GUSREG_PAN_POS);
sc 3612 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh2, GUS_DATA_HIGH, GUS_PAN_FULL_LEFT);
sc 3614 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh2, GUS_VOICE_SELECT,
sc 3616 dev/isa/gus.c SELECT_GUS_REG(iot, sc->sc_ioh2, GUSREG_PAN_POS);
sc 3617 dev/isa/gus.c bus_space_write_1(iot, sc->sc_ioh2, GUS_DATA_HIGH, GUS_PAN_FULL_RIGHT);
sc 3623 dev/isa/gus.c audio_attach_mi(&gus_hw_if, HAS_CODEC(sc) ? (void *)&sc->sc_codec :
sc 3624 dev/isa/gus.c (void *)sc, &sc->sc_dev);
sc 208 dev/isa/gus_isa.c struct gus_softc *sc = (void *) self;
sc 211 dev/isa/gus_isa.c sc->sc_iot = ia->ia_iot;
sc 212 dev/isa/gus_isa.c sc->sc_iobase = ia->ia_iobase;
sc 215 dev/isa/gus_isa.c if (bus_space_map(sc->sc_iot, sc->sc_iobase, GUS_NPORT1, 0, &sc->sc_ioh1))
sc 217 dev/isa/gus_isa.c if (bus_space_map(sc->sc_iot, sc->sc_iobase+GUS_IOH2_OFFSET, GUS_NPORT2, 0,
sc 218 dev/isa/gus_isa.c &sc->sc_ioh2))
sc 223 dev/isa/gus_isa.c if (bus_space_map(sc->sc_iot, sc->sc_iobase+GUS_IOH3_OFFSET, GUS_NPORT3, 0,
sc 224 dev/isa/gus_isa.c &sc->sc_ioh3))
sc 227 dev/isa/gus_isa.c if (bus_space_map(sc->sc_iot, sc->sc_iobase+GUS_IOH4_OFFSET, GUS_NPORT4, 0,
sc 228 dev/isa/gus_isa.c &sc->sc_ioh4))
sc 231 dev/isa/gus_isa.c sc->sc_irq = ia->ia_irq;
sc 232 dev/isa/gus_isa.c sc->sc_drq = ia->ia_drq;
sc 233 dev/isa/gus_isa.c sc->sc_recdrq = ia->ia_drq2;
sc 234 dev/isa/gus_isa.c sc->sc_isa = parent;
sc 236 dev/isa/gus_isa.c gus_subattach(sc, aux);
sc 155 dev/isa/gus_isapnp.c struct gus_softc *sc = (void *) self;
sc 158 dev/isa/gus_isapnp.c sc->sc_iot = ipa->ia_iot;
sc 159 dev/isa/gus_isapnp.c sc->sc_iobase = ipa->ia_iobase;
sc 161 dev/isa/gus_isapnp.c sc->sc_ioh1 = ipa->ipa_io[0].h; /* p2xr */
sc 162 dev/isa/gus_isapnp.c sc->sc_ioh2 = ipa->ipa_io[1].h; /* p3xr */
sc 163 dev/isa/gus_isapnp.c sc->sc_ioh3 = ipa->ipa_io[2].h; /* codec/mixer */
sc 164 dev/isa/gus_isapnp.c sc->sc_ioh4 = NULL; /* midi */
sc 166 dev/isa/gus_isapnp.c sc->sc_irq = ipa->ipa_irq[0].num;
sc 167 dev/isa/gus_isapnp.c sc->sc_drq = ipa->ipa_drq[1].num;
sc 168 dev/isa/gus_isapnp.c sc->sc_recdrq = ipa->ipa_drq[0].num;
sc 169 dev/isa/gus_isapnp.c sc->sc_isa = parent->dv_parent;
sc 171 dev/isa/gus_isapnp.c gus_subattach(sc, ipa);
sc 227 dev/isa/gusvar.h #define HAS_CODEC(sc) ((sc)->sc_flags & GUS_CODEC_INSTALLED)
sc 228 dev/isa/gusvar.h #define HAS_MIXER(sc) ((sc)->sc_flags & GUS_MIXER_INSTALLED)
sc 410 dev/isa/gusvar.h #define GUS_LEFT_RIGHT_OFFSET (sc->sc_nbufs * sc->sc_chanblocksize + GUS_MEM_OFFSET)
sc 412 dev/isa/gusvar.h #define GUS_PREC_BYTES (sc->sc_precision >> 3) /* precision to bytes */
sc 194 dev/isa/hsq.c struct hsq_softc *sc = (void *)self;
sc 199 dev/isa/hsq.c sc->sc_iot = ia->ia_iot;
sc 200 dev/isa/hsq.c sc->sc_iobase = ia->ia_iobase;
sc 203 dev/isa/hsq.c if (bus_space_map(sc->sc_iot, sc->sc_iobase + i * COM_NPORTS,
sc 204 dev/isa/hsq.c COM_NPORTS, 0, &sc->sc_slaveioh[i]))
sc 212 dev/isa/hsq.c ca.ca_iot = sc->sc_iot;
sc 213 dev/isa/hsq.c ca.ca_ioh = sc->sc_slaveioh[i];
sc 214 dev/isa/hsq.c ca.ca_iobase = sc->sc_iobase + i * COM_NPORTS;
sc 217 dev/isa/hsq.c sc->sc_slaves[i] = config_found(self, &ca, hsqprint);
sc 221 dev/isa/hsq.c bus_space_write_1(sc->sc_iot, sc->sc_slaveioh[0], com_uer, UART_MASK);
sc 223 dev/isa/hsq.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 224 dev/isa/hsq.c IPL_TTY, hsqintr, sc, sc->sc_dev.dv_xname);
sc 231 dev/isa/hsq.c struct hsq_softc *sc = arg;
sc 232 dev/isa/hsq.c bus_space_tag_t iot = sc->sc_iot;
sc 235 dev/isa/hsq.c bits = bus_space_read_1(iot, sc->sc_slaveioh[0], com_uir) & UART_MASK;
sc 241 dev/isa/hsq.c if ( sc->sc_slaves[n] && bits & (1 << (n)) ) \
sc 242 dev/isa/hsq.c comintr(sc->sc_slaves[n]);
sc 250 dev/isa/hsq.c bits = bus_space_read_1(iot, sc->sc_slaveioh[0],
sc 158 dev/isa/i82365_isa.c struct pcic_softc *sc = (void *)self;
sc 180 dev/isa/i82365_isa.c sc->membase = ia->ia_maddr;
sc 181 dev/isa/i82365_isa.c sc->subregionmask = (1 << (ia->ia_msize / PCIC_MEM_PAGESIZE)) - 1;
sc 183 dev/isa/i82365_isa.c sc->intr_est = ic;
sc 184 dev/isa/i82365_isa.c sc->pct = (pcmcia_chipset_tag_t)&pcic_isa_functions;
sc 186 dev/isa/i82365_isa.c sc->iot = iot;
sc 187 dev/isa/i82365_isa.c sc->ioh = ioh;
sc 188 dev/isa/i82365_isa.c sc->memt = memt;
sc 189 dev/isa/i82365_isa.c sc->memh = memh;
sc 193 dev/isa/i82365_isa.c pcic_attach(sc);
sc 194 dev/isa/i82365_isa.c pcic_isa_bus_width_probe(sc, iot, ioh, ia->ia_iobase, ia->ia_iosize);
sc 195 dev/isa/i82365_isa.c pcic_attach_sockets(sc);
sc 204 dev/isa/i82365_isa.c irq = pcic_intr_find(sc, IST_EDGE);
sc 207 dev/isa/i82365_isa.c sc->ih = isa_intr_establish(ic, irq, IST_EDGE, IPL_TTY,
sc 208 dev/isa/i82365_isa.c pcic_intr, sc, sc->dev.dv_xname);
sc 209 dev/isa/i82365_isa.c if (!sc->ih)
sc 212 dev/isa/i82365_isa.c sc->irq = irq;
sc 215 dev/isa/i82365_isa.c printf("%s: irq %d, ", sc->dev.dv_xname, irq);
sc 219 dev/isa/i82365_isa.c h = &sc->handle[i];
sc 222 dev/isa/i82365_isa.c (sc->irq << PCIC_CSC_INTR_IRQ_SHIFT) |
sc 228 dev/isa/i82365_isa.c printf("%s: no irq, ", sc->dev.dv_xname);
sc 231 dev/isa/i82365_isa.c if (sc->poll_established == 0) {
sc 232 dev/isa/i82365_isa.c timeout_set(&sc->poll_timeout, pcic_poll_intr, sc);
sc 233 dev/isa/i82365_isa.c timeout_add(&sc->poll_timeout, hz / 2);
sc 234 dev/isa/i82365_isa.c sc->poll_established = 1;
sc 107 dev/isa/i82365_isapnp.c struct pcic_softc *sc = (void *) self;
sc 120 dev/isa/i82365_isapnp.c printf("%s: error in region allocation\n", sc->dev.dv_xname);
sc 124 dev/isa/i82365_isapnp.c printf("%s: %s %s", sc->dev.dv_xname, ipa->ipa_devident,
sc 130 dev/isa/i82365_isapnp.c sc->dev.dv_xname);
sc 153 dev/isa/i82365_isapnp.c sc->membase = ipa->ia_maddr;
sc 154 dev/isa/i82365_isapnp.c sc->subregionmask = (1 << (ipa->ia_msize / PCIC_MEM_PAGESIZE)) - 1;
sc 156 dev/isa/i82365_isapnp.c sc->intr_est = ic;
sc 157 dev/isa/i82365_isapnp.c sc->pct = (pcmcia_chipset_tag_t) & pcic_isa_functions;
sc 159 dev/isa/i82365_isapnp.c sc->iot = iot;
sc 160 dev/isa/i82365_isapnp.c sc->ioh = ioh;
sc 161 dev/isa/i82365_isapnp.c sc->memt = memt;
sc 162 dev/isa/i82365_isapnp.c sc->memh = memh;
sc 166 dev/isa/i82365_isapnp.c pcic_attach(sc);
sc 167 dev/isa/i82365_isapnp.c pcic_isa_bus_width_probe(sc, iot, ioh, ipa->ipa_io[0].base,
sc 169 dev/isa/i82365_isapnp.c pcic_attach_sockets(sc);
sc 178 dev/isa/i82365_isapnp.c sc->irq = ipa->ipa_irq[0].num;
sc 180 dev/isa/i82365_isapnp.c sc->irq = IRQUNK;
sc 182 dev/isa/i82365_isapnp.c if (sc->irq == IRQUNK)
sc 183 dev/isa/i82365_isapnp.c sc->irq = pcic_intr_find(sc, IST_EDGE);
sc 185 dev/isa/i82365_isapnp.c if (sc->irq) {
sc 186 dev/isa/i82365_isapnp.c sc->ih = isa_intr_establish(ic, sc->irq, IST_EDGE, IPL_TTY,
sc 187 dev/isa/i82365_isapnp.c pcic_intr, sc, sc->dev.dv_xname);
sc 188 dev/isa/i82365_isapnp.c if (!sc->ih)
sc 189 dev/isa/i82365_isapnp.c sc->irq = 0;
sc 192 dev/isa/i82365_isapnp.c if (sc->irq) {
sc 193 dev/isa/i82365_isapnp.c printf("%s: irq %d, ", sc->dev.dv_xname, sc->irq);
sc 197 dev/isa/i82365_isapnp.c h = &sc->handle[i];
sc 200 dev/isa/i82365_isapnp.c (sc->irq << PCIC_CSC_INTR_IRQ_SHIFT) |
sc 206 dev/isa/i82365_isapnp.c printf("%s: no irq, ", sc->dev.dv_xname);
sc 209 dev/isa/i82365_isapnp.c if (sc->poll_established == 0) {
sc 210 dev/isa/i82365_isapnp.c timeout_set(&sc->poll_timeout, pcic_poll_intr, sc);
sc 211 dev/isa/i82365_isapnp.c timeout_add(&sc->poll_timeout, hz / 2);
sc 212 dev/isa/i82365_isapnp.c sc->poll_established = 1;
sc 109 dev/isa/i82365_isasubr.c pcic_isa_bus_width_probe(sc, iot, ioh, base, length)
sc 110 dev/isa/i82365_isasubr.c struct pcic_softc *sc;
sc 135 dev/isa/i82365_isasubr.c printf("%s: can't map high i/o space\n", sc->dev.dv_xname);
sc 140 dev/isa/i82365_isasubr.c if (sc->handle[i].flags & PCIC_FLAG_SOCKETP) {
sc 146 dev/isa/i82365_isasubr.c sc->handle[i].sock + PCIC_IDENT);
sc 150 dev/isa/i82365_isasubr.c sc->handle[i].sock + PCIC_IDENT);
sc 160 dev/isa/i82365_isasubr.c sc->ranges = pcic_isa_addr;
sc 162 dev/isa/i82365_isasubr.c sc->iobase = 0x000;
sc 163 dev/isa/i82365_isasubr.c sc->iosize = 0x400;
sc 165 dev/isa/i82365_isasubr.c sc->iobase = 0x0000;
sc 166 dev/isa/i82365_isasubr.c sc->iosize = 0x1000;
sc 170 dev/isa/i82365_isasubr.c sc->dev.dv_xname, (long) sc->iobase,
sc 171 dev/isa/i82365_isasubr.c (long) sc->iobase + sc->iosize));
sc 174 dev/isa/i82365_isasubr.c sc->iobase = pcic_isa_alloc_iobase;
sc 175 dev/isa/i82365_isasubr.c sc->iosize = pcic_isa_alloc_iosize;
sc 178 dev/isa/i82365_isasubr.c "(config override)\n", sc->dev.dv_xname, (long) sc->iobase,
sc 179 dev/isa/i82365_isasubr.c (long) sc->iobase + sc->iosize));
sc 194 dev/isa/i82365_isasubr.c struct pcic_softc *sc = (struct pcic_softc *)(h->ph_parent);
sc 195 dev/isa/i82365_isasubr.c isa_chipset_tag_t ic = sc->intr_est;
sc 205 dev/isa/i82365_isasubr.c irq = pcic_intr_find(sc, ist);
sc 224 dev/isa/i82365_isasubr.c struct pcic_softc *sc = (struct pcic_softc *)(h->ph_parent);
sc 225 dev/isa/i82365_isasubr.c isa_chipset_tag_t ic = sc->intr_est;
sc 268 dev/isa/i82365_isasubr.c pcic_intr_find(sc, ist)
sc 269 dev/isa/i82365_isasubr.c struct pcic_softc *sc;
sc 272 dev/isa/i82365_isasubr.c struct pcic_handle *ph = &sc->handle[0];
sc 273 dev/isa/i82365_isasubr.c isa_chipset_tag_t ic = sc->intr_est;
sc 78 dev/isa/ics2101.c ics2101_mix_doit(sc, chan, side, value, flags)
sc 79 dev/isa/ics2101.c struct ics2101_softc *sc;
sc 82 dev/isa/ics2101.c bus_space_tag_t iot = sc->sc_iot;
sc 96 dev/isa/ics2101.c value = cvt_value(sc->sc_setting[chan][side]);
sc 97 dev/isa/ics2101.c sc->sc_mute[chan][side] = flags & ICS_MUTE_MUTED;
sc 99 dev/isa/ics2101.c sc->sc_setting[chan][side] = value;
sc 112 dev/isa/ics2101.c if (sc->sc_mute[chan][side])
sc 114 dev/isa/ics2101.c else if (sc->sc_flags & ICS_FLIP)
sc 121 dev/isa/ics2101.c if (sc->sc_mute[chan][side])
sc 123 dev/isa/ics2101.c else if (sc->sc_flags & ICS_FLIP)
sc 131 dev/isa/ics2101.c bus_space_write_1(iot, sc->sc_selio_ioh, sc->sc_selio, ctrl_addr);
sc 132 dev/isa/ics2101.c bus_space_write_1(iot, sc->sc_dataio_ioh, sc->sc_dataio, normal);
sc 134 dev/isa/ics2101.c bus_space_write_1(iot, sc->sc_selio_ioh, sc->sc_selio, attn_addr);
sc 135 dev/isa/ics2101.c bus_space_write_1(iot, sc->sc_dataio_ioh, sc->sc_dataio, (unsigned char) value);
sc 141 dev/isa/ics2101.c ics2101_mix_mute(sc, chan, side, domute)
sc 142 dev/isa/ics2101.c struct ics2101_softc *sc;
sc 145 dev/isa/ics2101.c ics2101_mix_doit(sc, chan, side, 0,
sc 150 dev/isa/ics2101.c ics2101_mix_attenuate(sc, chan, side, value)
sc 151 dev/isa/ics2101.c struct ics2101_softc *sc;
sc 154 dev/isa/ics2101.c ics2101_mix_doit(sc, chan, side, value, ICS_VALUE);
sc 70 dev/isa/if_an_isapnp.c struct an_softc *sc = (void *)self;
sc 73 dev/isa/if_an_isapnp.c sc->sc_iot = ia->ia_iot;
sc 74 dev/isa/if_an_isapnp.c sc->sc_ioh = ia->ipa_io[0].h;
sc 76 dev/isa/if_an_isapnp.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 77 dev/isa/if_an_isapnp.c IPL_NET, an_intr, sc, sc->sc_dev.dv_xname);
sc 79 dev/isa/if_an_isapnp.c an_attach(sc);
sc 253 dev/isa/if_ec.c struct dp8390_softc *sc = &esc->sc_dp8390;
sc 276 dev/isa/if_ec.c sc->sc_dev.dv_xname);
sc 284 dev/isa/if_ec.c sc->sc_dev.dv_xname);
sc 291 dev/isa/if_ec.c sc->sc_dev.dv_xname);
sc 298 dev/isa/if_ec.c sc->sc_regt = nict;
sc 299 dev/isa/if_ec.c sc->sc_regh = nich;
sc 301 dev/isa/if_ec.c sc->sc_buft = memt;
sc 302 dev/isa/if_ec.c sc->sc_bufh = memh;
sc 305 dev/isa/if_ec.c sc->sc_enabled = 1;
sc 309 dev/isa/if_ec.c sc->sc_reg_map[i] = i;
sc 344 dev/isa/if_ec.c sc->sc_arpcom.ac_enaddr[i] = NIC_GET(nict, nich, i);
sc 373 dev/isa/if_ec.c sc->sc_dev.dv_xname, esc->sc_16bitp ? "16" : "8");
sc 378 dev/isa/if_ec.c sc->cr_proto = ED_CR_RD2;
sc 388 dev/isa/if_ec.c sc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS |
sc 391 dev/isa/if_ec.c sc->test_mem = ec_fake_test_mem;
sc 392 dev/isa/if_ec.c sc->ring_copy = ec_ring_copy;
sc 393 dev/isa/if_ec.c sc->write_mbuf = ec_write_mbuf;
sc 394 dev/isa/if_ec.c sc->read_hdr = ec_read_hdr;
sc 396 dev/isa/if_ec.c sc->sc_media_init = ec_media_init;
sc 398 dev/isa/if_ec.c sc->sc_mediachange = ec_mediachange;
sc 399 dev/isa/if_ec.c sc->sc_mediastatus = ec_mediastatus;
sc 401 dev/isa/if_ec.c sc->mem_start = 0;
sc 402 dev/isa/if_ec.c sc->mem_size = memsize;
sc 405 dev/isa/if_ec.c if (dp8390_config(sc)) {
sc 423 dev/isa/if_ec.c if (sc->sc_dev.dv_cfdata->cf_flags & DP8390_NO_MULTI_BUFFERING)
sc 424 dev/isa/if_ec.c sc->txb_cnt = 1;
sc 426 dev/isa/if_ec.c sc->txb_cnt = 2;
sc 428 dev/isa/if_ec.c sc->tx_page_start = ELINK2_TX_PAGE_OFFSET_16BIT;
sc 429 dev/isa/if_ec.c sc->rec_page_start = ELINK2_RX_PAGE_OFFSET_16BIT;
sc 430 dev/isa/if_ec.c sc->rec_page_stop = (memsize >> ED_PAGE_SHIFT) +
sc 431 dev/isa/if_ec.c sc->rec_page_start;
sc 432 dev/isa/if_ec.c sc->mem_ring = sc->mem_start;
sc 434 dev/isa/if_ec.c sc->txb_cnt = 1;
sc 435 dev/isa/if_ec.c sc->tx_page_start = ELINK2_TX_PAGE_OFFSET_8BIT;
sc 436 dev/isa/if_ec.c sc->rec_page_start = sc->tx_page_start + ED_TXBUF_SIZE;
sc 437 dev/isa/if_ec.c sc->rec_page_stop = (memsize >> ED_PAGE_SHIFT) +
sc 438 dev/isa/if_ec.c sc->tx_page_start;
sc 439 dev/isa/if_ec.c sc->mem_ring = sc->mem_start +
sc 447 dev/isa/if_ec.c bus_space_write_1(asict, asich, ELINK2_PSTR, sc->rec_page_start);
sc 448 dev/isa/if_ec.c bus_space_write_1(asict, asich, ELINK2_PSPR, sc->rec_page_stop);
sc 462 dev/isa/if_ec.c sc->sc_dev.dv_xname);
sc 467 dev/isa/if_ec.c sc->sc_dev.dv_xname, ia->ia_irq);
sc 493 dev/isa/if_ec.c if (ec_test_mem(sc)) {
sc 494 dev/isa/if_ec.c printf("%s: memory test failed\n", sc->sc_dev.dv_xname);
sc 500 dev/isa/if_ec.c IPL_NET, dp8390_intr, sc, sc->sc_dev.dv_xname);
sc 502 dev/isa/if_ec.c printf("%s: can't establish interrupt\n", sc->sc_dev.dv_xname);
sc 506 dev/isa/if_ec.c ec_fake_test_mem(struct dp8390_softc *sc)
sc 518 dev/isa/if_ec.c ec_test_mem(struct dp8390_softc *sc)
sc 520 dev/isa/if_ec.c struct ec_softc *esc = (struct ec_softc *)sc;
sc 521 dev/isa/if_ec.c bus_space_tag_t memt = sc->sc_buft;
sc 522 dev/isa/if_ec.c bus_space_handle_t memh = sc->sc_bufh;
sc 523 dev/isa/if_ec.c bus_size_t memsize = sc->mem_size;
sc 547 dev/isa/if_ec.c sc->sc_dev.dv_xname, i);
sc 573 dev/isa/if_ec.c ec_write_mbuf(struct dp8390_softc *sc, struct mbuf *m, int buf)
sc 575 dev/isa/if_ec.c struct ec_softc *esc = (struct ec_softc *)sc;
sc 679 dev/isa/if_ec.c ec_ring_copy(struct dp8390_softc *sc, int src, caddr_t dst,
sc 682 dev/isa/if_ec.c struct ec_softc *esc = (struct ec_softc *)sc;
sc 686 dev/isa/if_ec.c if (src + amount > sc->mem_end) {
sc 687 dev/isa/if_ec.c tmp_amount = sc->mem_end - src;
sc 693 dev/isa/if_ec.c src = sc->mem_ring;
sc 703 dev/isa/if_ec.c ec_read_hdr(struct dp8390_softc *sc, int packet_ptr,
sc 706 dev/isa/if_ec.c struct ec_softc *esc = (struct ec_softc *)sc;
sc 716 dev/isa/if_ec.c ec_media_init(struct dp8390_softc *sc)
sc 718 dev/isa/if_ec.c ifmedia_init(&sc->sc_media, 0, dp8390_mediachange, dp8390_mediastatus);
sc 719 dev/isa/if_ec.c ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_10_2, 0, NULL);
sc 720 dev/isa/if_ec.c ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_10_5, 0, NULL);
sc 721 dev/isa/if_ec.c ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_10_2);
sc 725 dev/isa/if_ec.c ec_mediachange(struct dp8390_softc *sc)
sc 727 dev/isa/if_ec.c struct ec_softc *esc = (struct ec_softc *)sc;
sc 728 dev/isa/if_ec.c struct ifmedia *ifm = &sc->sc_media;
sc 734 dev/isa/if_ec.c ec_mediastatus(struct dp8390_softc *sc, struct ifmediareq *ifmr)
sc 736 dev/isa/if_ec.c struct ifmedia *ifm = &sc->sc_media;
sc 745 dev/isa/if_ec.c ec_init_card(struct dp8390_softc *sc)
sc 747 dev/isa/if_ec.c struct ec_softc *esc = (struct ec_softc *)sc;
sc 748 dev/isa/if_ec.c struct ifmedia *ifm = &sc->sc_media;
sc 157 dev/isa/if_ef_isapnp.c struct ef_softc *sc = (void *)self;
sc 159 dev/isa/if_ef_isapnp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 166 dev/isa/if_ef_isapnp.c sc->sc_iot = iot = ia->ia_iot;
sc 167 dev/isa/if_ef_isapnp.c sc->sc_ioh = ioh = ia->ipa_io[0].h;
sc 169 dev/isa/if_ef_isapnp.c efcompletecmd(sc, EP_COMMAND, GLOBAL_RESET);
sc 173 dev/isa/if_ef_isapnp.c if (efbusyeeprom(sc))
sc 179 dev/isa/if_ef_isapnp.c if (efbusyeeprom(sc))
sc 184 dev/isa/if_ef_isapnp.c sc->sc_arpcom.ac_enaddr[(i << 1)] = x >> 8;
sc 185 dev/isa/if_ef_isapnp.c sc->sc_arpcom.ac_enaddr[(i << 1) + 1] = x;
sc 188 dev/isa/if_ef_isapnp.c printf(": address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 196 dev/isa/if_ef_isapnp.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 197 dev/isa/if_ef_isapnp.c IPL_NET, efintr, sc, sc->sc_dv.dv_xname);
sc 202 dev/isa/if_ef_isapnp.c timeout_set(&sc->sc_tick_tmo, ef_tick, sc);
sc 204 dev/isa/if_ef_isapnp.c bcopy(sc->sc_dv.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 205 dev/isa/if_ef_isapnp.c ifp->if_softc = sc;
sc 213 dev/isa/if_ef_isapnp.c sc->sc_mii.mii_ifp = ifp;
sc 214 dev/isa/if_ef_isapnp.c sc->sc_mii.mii_readreg = ef_miibus_readreg;
sc 215 dev/isa/if_ef_isapnp.c sc->sc_mii.mii_writereg = ef_miibus_writereg;
sc 216 dev/isa/if_ef_isapnp.c sc->sc_mii.mii_statchg = ef_miibus_statchg;
sc 217 dev/isa/if_ef_isapnp.c ifmedia_init(&sc->sc_mii.mii_media, 0, ef_ifmedia_upd, ef_ifmedia_sts);
sc 218 dev/isa/if_ef_isapnp.c mii_attach(self, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY,
sc 220 dev/isa/if_ef_isapnp.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 221 dev/isa/if_ef_isapnp.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
sc 222 dev/isa/if_ef_isapnp.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
sc 224 dev/isa/if_ef_isapnp.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 229 dev/isa/if_ef_isapnp.c sc->sc_tx_start_thresh = 20;
sc 231 dev/isa/if_ef_isapnp.c efcompletecmd(sc, EP_COMMAND, RX_RESET);
sc 232 dev/isa/if_ef_isapnp.c efcompletecmd(sc, EP_COMMAND, TX_RESET);
sc 239 dev/isa/if_ef_isapnp.c struct ef_softc *sc = ifp->if_softc;
sc 240 dev/isa/if_ef_isapnp.c bus_space_tag_t iot = sc->sc_iot;
sc 241 dev/isa/if_ef_isapnp.c bus_space_handle_t ioh = sc->sc_ioh;
sc 278 dev/isa/if_ef_isapnp.c ((len / 4 + sc->sc_tx_start_thresh)));
sc 342 dev/isa/if_ef_isapnp.c struct ef_softc *sc = ifp->if_softc;
sc 349 dev/isa/if_ef_isapnp.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 360 dev/isa/if_ef_isapnp.c efinit(sc);
sc 361 dev/isa/if_ef_isapnp.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 365 dev/isa/if_ef_isapnp.c efinit(sc);
sc 371 dev/isa/if_ef_isapnp.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
sc 376 dev/isa/if_ef_isapnp.c efstop(sc);
sc 380 dev/isa/if_ef_isapnp.c efinit(sc);
sc 382 dev/isa/if_ef_isapnp.c efsetmulti(sc);
sc 388 dev/isa/if_ef_isapnp.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 389 dev/isa/if_ef_isapnp.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 393 dev/isa/if_ef_isapnp.c efreset(sc);
sc 396 dev/isa/if_ef_isapnp.c efsetmulti(sc);
sc 408 dev/isa/if_ef_isapnp.c efinit(sc)
sc 409 dev/isa/if_ef_isapnp.c struct ef_softc *sc;
sc 411 dev/isa/if_ef_isapnp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 412 dev/isa/if_ef_isapnp.c bus_space_tag_t iot = sc->sc_iot;
sc 413 dev/isa/if_ef_isapnp.c bus_space_handle_t ioh = sc->sc_ioh;
sc 418 dev/isa/if_ef_isapnp.c efstop(sc);
sc 426 dev/isa/if_ef_isapnp.c sc->sc_arpcom.ac_enaddr[i]);
sc 430 dev/isa/if_ef_isapnp.c efcompletecmd(sc, EP_COMMAND, RX_RESET);
sc 431 dev/isa/if_ef_isapnp.c efcompletecmd(sc, EP_COMMAND, TX_RESET);
sc 436 dev/isa/if_ef_isapnp.c efsetmulti(sc);
sc 451 dev/isa/if_ef_isapnp.c efsetmulti(sc);
sc 459 dev/isa/if_ef_isapnp.c (sc->sc_busmaster ? S_DMA_DONE : 0));
sc 464 dev/isa/if_ef_isapnp.c (sc->sc_busmaster ? S_DMA_DONE : 0) | S_UP_COMPLETE |
sc 467 dev/isa/if_ef_isapnp.c mii_mediachg(&sc->sc_mii);
sc 474 dev/isa/if_ef_isapnp.c timeout_add(&sc->sc_tick_tmo, hz);
sc 480 dev/isa/if_ef_isapnp.c efreset(sc)
sc 481 dev/isa/if_ef_isapnp.c struct ef_softc *sc;
sc 486 dev/isa/if_ef_isapnp.c efstop(sc);
sc 487 dev/isa/if_ef_isapnp.c efinit(sc);
sc 492 dev/isa/if_ef_isapnp.c efstop(sc)
sc 493 dev/isa/if_ef_isapnp.c struct ef_softc *sc;
sc 495 dev/isa/if_ef_isapnp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 496 dev/isa/if_ef_isapnp.c bus_space_tag_t iot = sc->sc_iot;
sc 497 dev/isa/if_ef_isapnp.c bus_space_handle_t ioh = sc->sc_ioh;
sc 502 dev/isa/if_ef_isapnp.c timeout_del(&sc->sc_tick_tmo);
sc 505 dev/isa/if_ef_isapnp.c efcompletecmd(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
sc 510 dev/isa/if_ef_isapnp.c efcompletecmd(sc, EP_COMMAND, RX_RESET);
sc 511 dev/isa/if_ef_isapnp.c efcompletecmd(sc, EP_COMMAND, TX_RESET);
sc 520 dev/isa/if_ef_isapnp.c efcompletecmd(sc, cmd, arg)
sc 521 dev/isa/if_ef_isapnp.c struct ef_softc *sc;
sc 524 dev/isa/if_ef_isapnp.c bus_space_tag_t iot = sc->sc_iot;
sc 525 dev/isa/if_ef_isapnp.c bus_space_handle_t ioh = sc->sc_ioh;
sc 536 dev/isa/if_ef_isapnp.c struct ef_softc *sc = vsc;
sc 537 dev/isa/if_ef_isapnp.c bus_space_tag_t iot = sc->sc_iot;
sc 538 dev/isa/if_ef_isapnp.c bus_space_handle_t ioh = sc->sc_ioh;
sc 539 dev/isa/if_ef_isapnp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 549 dev/isa/if_ef_isapnp.c efread(sc);
sc 554 dev/isa/if_ef_isapnp.c sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
sc 555 dev/isa/if_ef_isapnp.c efstart(&sc->sc_arpcom.ac_if);
sc 559 dev/isa/if_ef_isapnp.c efreset(sc);
sc 561 dev/isa/if_ef_isapnp.c sc->sc_dv.dv_xname, status);
sc 568 dev/isa/if_ef_isapnp.c eftxstat(sc);
sc 580 dev/isa/if_ef_isapnp.c eftxstat(sc)
sc 581 dev/isa/if_ef_isapnp.c struct ef_softc *sc;
sc 583 dev/isa/if_ef_isapnp.c bus_space_tag_t iot = sc->sc_iot;
sc 584 dev/isa/if_ef_isapnp.c bus_space_handle_t ioh = sc->sc_ioh;
sc 592 dev/isa/if_ef_isapnp.c sc->sc_arpcom.ac_if.if_oerrors++;
sc 594 dev/isa/if_ef_isapnp.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 596 dev/isa/if_ef_isapnp.c sc->sc_dv.dv_xname, i);
sc 598 dev/isa/if_ef_isapnp.c efreset(sc);
sc 601 dev/isa/if_ef_isapnp.c sc->sc_arpcom.ac_if.if_oerrors++;
sc 603 dev/isa/if_ef_isapnp.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 605 dev/isa/if_ef_isapnp.c sc->sc_dv.dv_xname, i,
sc 606 dev/isa/if_ef_isapnp.c sc->sc_tx_start_thresh);
sc 608 dev/isa/if_ef_isapnp.c if (sc->sc_tx_succ_ok < 100)
sc 609 dev/isa/if_ef_isapnp.c sc->sc_tx_start_thresh = min(ETHER_MAX_LEN,
sc 610 dev/isa/if_ef_isapnp.c sc->sc_tx_start_thresh + 20);
sc 611 dev/isa/if_ef_isapnp.c sc->sc_tx_succ_ok = 0;
sc 612 dev/isa/if_ef_isapnp.c efreset(sc);
sc 615 dev/isa/if_ef_isapnp.c sc->sc_arpcom.ac_if.if_collisions++;
sc 617 dev/isa/if_ef_isapnp.c sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
sc 620 dev/isa/if_ef_isapnp.c sc->sc_tx_succ_ok = (sc->sc_tx_succ_ok + 1) & 127;
sc 625 dev/isa/if_ef_isapnp.c efbusyeeprom(sc)
sc 626 dev/isa/if_ef_isapnp.c struct ef_softc *sc;
sc 631 dev/isa/if_ef_isapnp.c j = bus_space_read_2(sc->sc_iot, sc->sc_ioh,
sc 640 dev/isa/if_ef_isapnp.c sc->sc_dv.dv_xname);
sc 651 dev/isa/if_ef_isapnp.c struct ef_softc *sc = ifp->if_softc;
sc 653 dev/isa/if_ef_isapnp.c printf("%s: device timeout\n", sc->sc_dv.dv_xname);
sc 654 dev/isa/if_ef_isapnp.c sc->sc_arpcom.ac_if.if_oerrors++;
sc 655 dev/isa/if_ef_isapnp.c efreset(sc);
sc 659 dev/isa/if_ef_isapnp.c efsetmulti(sc)
sc 660 dev/isa/if_ef_isapnp.c struct ef_softc *sc;
sc 662 dev/isa/if_ef_isapnp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 663 dev/isa/if_ef_isapnp.c struct arpcom *ac = &sc->sc_arpcom;
sc 664 dev/isa/if_ef_isapnp.c bus_space_tag_t iot = sc->sc_iot;
sc 665 dev/isa/if_ef_isapnp.c bus_space_handle_t ioh = sc->sc_ioh;
sc 686 dev/isa/if_ef_isapnp.c efread(sc)
sc 687 dev/isa/if_ef_isapnp.c struct ef_softc *sc;
sc 689 dev/isa/if_ef_isapnp.c bus_space_tag_t iot = sc->sc_iot;
sc 690 dev/isa/if_ef_isapnp.c bus_space_handle_t ioh = sc->sc_ioh;
sc 691 dev/isa/if_ef_isapnp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 718 dev/isa/if_ef_isapnp.c printf("%s: %s\n", sc->sc_dv.dv_xname, s);
sc 727 dev/isa/if_ef_isapnp.c efcompletecmd(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
sc 732 dev/isa/if_ef_isapnp.c m = efget(sc, len);
sc 735 dev/isa/if_ef_isapnp.c efcompletecmd(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
sc 750 dev/isa/if_ef_isapnp.c efget(sc, totlen)
sc 751 dev/isa/if_ef_isapnp.c struct ef_softc *sc;
sc 754 dev/isa/if_ef_isapnp.c bus_space_tag_t iot = sc->sc_iot;
sc 755 dev/isa/if_ef_isapnp.c bus_space_handle_t ioh = sc->sc_ioh;
sc 756 dev/isa/if_ef_isapnp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 804 dev/isa/if_ef_isapnp.c efcompletecmd(sc, EP_COMMAND, RX_DISCARD_TOP_PACK);
sc 811 dev/isa/if_ef_isapnp.c #define MII_SET(sc, x) \
sc 812 dev/isa/if_ef_isapnp.c bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, EP_W4_CTRLR_STATUS, \
sc 813 dev/isa/if_ef_isapnp.c bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, EP_W4_CTRLR_STATUS) \
sc 816 dev/isa/if_ef_isapnp.c #define MII_CLR(sc, x) \
sc 817 dev/isa/if_ef_isapnp.c bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, EP_W4_CTRLR_STATUS, \
sc 818 dev/isa/if_ef_isapnp.c bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, EP_W4_CTRLR_STATUS) \
sc 822 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, b)
sc 823 dev/isa/if_ef_isapnp.c struct ef_softc *sc;
sc 826 dev/isa/if_ef_isapnp.c MII_CLR(sc, EF_MII_CLK);
sc 829 dev/isa/if_ef_isapnp.c MII_SET(sc, EF_MII_DATA);
sc 831 dev/isa/if_ef_isapnp.c MII_CLR(sc, EF_MII_DATA);
sc 833 dev/isa/if_ef_isapnp.c MII_CLR(sc, EF_MII_CLK);
sc 835 dev/isa/if_ef_isapnp.c MII_SET(sc, EF_MII_CLK);
sc 840 dev/isa/if_ef_isapnp.c ef_mii_sync(sc)
sc 841 dev/isa/if_ef_isapnp.c struct ef_softc *sc;
sc 846 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, 1);
sc 854 dev/isa/if_ef_isapnp.c struct ef_softc *sc = (struct ef_softc *)dev;
sc 860 dev/isa/if_ef_isapnp.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, EP_W4_CTRLR_STATUS, 0);
sc 863 dev/isa/if_ef_isapnp.c MII_SET(sc, EF_MII_DIR);
sc 864 dev/isa/if_ef_isapnp.c MII_CLR(sc, EF_MII_CLK);
sc 866 dev/isa/if_ef_isapnp.c ef_mii_sync(sc);
sc 869 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, 0);
sc 870 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, 1);
sc 873 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, 1);
sc 874 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, 0);
sc 878 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, (phy & i) ? 1 : 0);
sc 882 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, (reg & i) ? 1 : 0);
sc 885 dev/isa/if_ef_isapnp.c MII_CLR(sc, EF_MII_CLK | EF_MII_DATA);
sc 887 dev/isa/if_ef_isapnp.c MII_SET(sc, EF_MII_CLK);
sc 891 dev/isa/if_ef_isapnp.c MII_CLR(sc, EF_MII_DIR);
sc 894 dev/isa/if_ef_isapnp.c MII_CLR(sc, EF_MII_CLK);
sc 896 dev/isa/if_ef_isapnp.c MII_SET(sc, EF_MII_CLK);
sc 898 dev/isa/if_ef_isapnp.c ack = bus_space_read_2(sc->sc_iot, sc->sc_ioh, EP_W4_CTRLR_STATUS) &
sc 903 dev/isa/if_ef_isapnp.c MII_CLR(sc, EF_MII_CLK);
sc 905 dev/isa/if_ef_isapnp.c if (bus_space_read_2(sc->sc_iot, sc->sc_ioh,
sc 908 dev/isa/if_ef_isapnp.c MII_SET(sc, EF_MII_CLK);
sc 912 dev/isa/if_ef_isapnp.c MII_CLR(sc, EF_MII_CLK);
sc 914 dev/isa/if_ef_isapnp.c MII_SET(sc, EF_MII_CLK);
sc 927 dev/isa/if_ef_isapnp.c struct ef_softc *sc = (struct ef_softc *)dev;
sc 933 dev/isa/if_ef_isapnp.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, EP_W4_CTRLR_STATUS, 0);
sc 936 dev/isa/if_ef_isapnp.c MII_SET(sc, EF_MII_DIR);
sc 938 dev/isa/if_ef_isapnp.c ef_mii_sync(sc);
sc 940 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, 0);
sc 941 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, 1);
sc 942 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, 0);
sc 943 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, 1);
sc 946 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, (phy & i) ? 1 : 0);
sc 949 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, (reg & i) ? 1 : 0);
sc 951 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, 1);
sc 952 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, 0);
sc 955 dev/isa/if_ef_isapnp.c ef_mii_writeb(sc, (val & i) ? 1 : 0);
sc 964 dev/isa/if_ef_isapnp.c struct ef_softc *sc = ifp->if_softc;
sc 966 dev/isa/if_ef_isapnp.c mii_mediachg(&sc->sc_mii);
sc 975 dev/isa/if_ef_isapnp.c struct ef_softc *sc = ifp->if_softc;
sc 977 dev/isa/if_ef_isapnp.c mii_pollstat(&sc->sc_mii);
sc 978 dev/isa/if_ef_isapnp.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 979 dev/isa/if_ef_isapnp.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 986 dev/isa/if_ef_isapnp.c struct ef_softc *sc = (struct ef_softc *)self;
sc 992 dev/isa/if_ef_isapnp.c if ((sc->sc_mii.mii_media_active & IFM_GMASK) == IFM_FDX)
sc 993 dev/isa/if_ef_isapnp.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 996 dev/isa/if_ef_isapnp.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 1006 dev/isa/if_ef_isapnp.c struct ef_softc *sc = v;
sc 1010 dev/isa/if_ef_isapnp.c mii_tick(&sc->sc_mii);
sc 1012 dev/isa/if_ef_isapnp.c timeout_add(&sc->sc_tick_tmo, hz);
sc 141 dev/isa/if_eg.c egprintpcb(sc)
sc 142 dev/isa/if_eg.c struct eg_softc *sc;
sc 146 dev/isa/if_eg.c for (i = 0; i < sc->eg_pcb[1] + 2; i++)
sc 147 dev/isa/if_eg.c DPRINTF(("pcb[%2d] = %x\n", i, sc->eg_pcb[i]));
sc 166 dev/isa/if_eg.c egoutPCB(sc, b)
sc 167 dev/isa/if_eg.c struct eg_softc *sc;
sc 170 dev/isa/if_eg.c bus_space_tag_t bst = sc->sc_bst;
sc 171 dev/isa/if_eg.c bus_space_handle_t bsh = sc->sc_bsh;
sc 186 dev/isa/if_eg.c egreadPCBstat(sc, statb)
sc 187 dev/isa/if_eg.c struct eg_softc *sc;
sc 190 dev/isa/if_eg.c bus_space_tag_t bst = sc->sc_bst;
sc 191 dev/isa/if_eg.c bus_space_handle_t bsh = sc->sc_bsh;
sc 206 dev/isa/if_eg.c egreadPCBready(sc)
sc 207 dev/isa/if_eg.c struct eg_softc *sc;
sc 209 dev/isa/if_eg.c bus_space_tag_t bst = sc->sc_bst;
sc 210 dev/isa/if_eg.c bus_space_handle_t bsh = sc->sc_bsh;
sc 224 dev/isa/if_eg.c egwritePCB(sc)
sc 225 dev/isa/if_eg.c struct eg_softc *sc;
sc 227 dev/isa/if_eg.c bus_space_tag_t bst = sc->sc_bst;
sc 228 dev/isa/if_eg.c bus_space_handle_t bsh = sc->sc_bsh;
sc 236 dev/isa/if_eg.c len = sc->eg_pcb[1] + 2;
sc 238 dev/isa/if_eg.c egoutPCB(sc, sc->eg_pcb[i]);
sc 250 dev/isa/if_eg.c egoutPCB(sc, len);
sc 252 dev/isa/if_eg.c if (egreadPCBstat(sc, EG_PCB_ACCEPT))
sc 258 dev/isa/if_eg.c egreadPCB(sc)
sc 259 dev/isa/if_eg.c struct eg_softc *sc;
sc 261 dev/isa/if_eg.c bus_space_tag_t bst = sc->sc_bst;
sc 262 dev/isa/if_eg.c bus_space_handle_t bsh = sc->sc_bsh;
sc 270 dev/isa/if_eg.c bzero(sc->eg_pcb, sizeof(sc->eg_pcb));
sc 272 dev/isa/if_eg.c if (egreadPCBready(sc))
sc 275 dev/isa/if_eg.c sc->eg_pcb[0] = bus_space_read_1(bst, bsh, EG_COMMAND);
sc 277 dev/isa/if_eg.c if (egreadPCBready(sc))
sc 280 dev/isa/if_eg.c sc->eg_pcb[1] = bus_space_read_1(bst, bsh, EG_COMMAND);
sc 282 dev/isa/if_eg.c if (sc->eg_pcb[1] > 62) {
sc 283 dev/isa/if_eg.c DPRINTF(("len %d too large\n", sc->eg_pcb[1]));
sc 287 dev/isa/if_eg.c for (i = 0; i < sc->eg_pcb[1]; i++) {
sc 288 dev/isa/if_eg.c if (egreadPCBready(sc))
sc 290 dev/isa/if_eg.c sc->eg_pcb[2+i] = bus_space_read_1(bst, bsh, EG_COMMAND);
sc 292 dev/isa/if_eg.c if (egreadPCBready(sc))
sc 294 dev/isa/if_eg.c if (egreadPCBstat(sc, EG_PCB_DONE))
sc 296 dev/isa/if_eg.c if ((b = bus_space_read_1(bst, bsh, EG_COMMAND)) != sc->eg_pcb[1] + 2) {
sc 297 dev/isa/if_eg.c DPRINTF(("%d != %d\n", b, sc->eg_pcb[1] + 2));
sc 317 dev/isa/if_eg.c struct eg_softc *sc = match;
sc 319 dev/isa/if_eg.c bus_space_tag_t bst = sc->sc_bst = ia->ia_iot;
sc 329 dev/isa/if_eg.c DPRINTF(("%s: can't map I/O space\n", sc->sc_dev.dv_xname));
sc 332 dev/isa/if_eg.c sc->sc_bsh = bsh;
sc 348 dev/isa/if_eg.c sc->eg_pcb[0] = EG_CMD_GETINFO; /* Get Adapter Info */
sc 349 dev/isa/if_eg.c sc->eg_pcb[1] = 0;
sc 350 dev/isa/if_eg.c if (egwritePCB(sc) != 0)
sc 353 dev/isa/if_eg.c if (egreadPCB(sc) != 0) {
sc 354 dev/isa/if_eg.c egprintpcb(sc);
sc 358 dev/isa/if_eg.c if (sc->eg_pcb[0] != EG_RSP_GETINFO || /* Get Adapter Info Response */
sc 359 dev/isa/if_eg.c sc->eg_pcb[1] != 0x0a) {
sc 360 dev/isa/if_eg.c egprintpcb(sc);
sc 363 dev/isa/if_eg.c sc->eg_rom_major = sc->eg_pcb[3];
sc 364 dev/isa/if_eg.c sc->eg_rom_minor = sc->eg_pcb[2];
sc 365 dev/isa/if_eg.c sc->eg_ram = sc->eg_pcb[6] | (sc->eg_pcb[7] << 8);
sc 382 dev/isa/if_eg.c struct eg_softc *sc = (void *)self;
sc 384 dev/isa/if_eg.c bus_space_tag_t bst = sc->sc_bst = ia->ia_iot;
sc 386 dev/isa/if_eg.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 389 dev/isa/if_eg.c printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
sc 392 dev/isa/if_eg.c sc->sc_bsh = bsh;
sc 394 dev/isa/if_eg.c egstop(sc);
sc 396 dev/isa/if_eg.c sc->eg_pcb[0] = EG_CMD_GETEADDR; /* Get Station address */
sc 397 dev/isa/if_eg.c sc->eg_pcb[1] = 0;
sc 398 dev/isa/if_eg.c if (egwritePCB(sc) != 0) {
sc 402 dev/isa/if_eg.c if (egreadPCB(sc) != 0) {
sc 404 dev/isa/if_eg.c egprintpcb(sc);
sc 409 dev/isa/if_eg.c if (sc->eg_pcb[0] != EG_RSP_GETEADDR || sc->eg_pcb[1] != 0x06) {
sc 411 dev/isa/if_eg.c egprintpcb(sc);
sc 414 dev/isa/if_eg.c bcopy(&sc->eg_pcb[2], sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 417 dev/isa/if_eg.c sc->eg_rom_major, sc->eg_rom_minor, sc->eg_ram,
sc 418 dev/isa/if_eg.c ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 420 dev/isa/if_eg.c sc->eg_pcb[0] = EG_CMD_SETEADDR; /* Set station address */
sc 421 dev/isa/if_eg.c if (egwritePCB(sc) != 0) {
sc 425 dev/isa/if_eg.c if (egreadPCB(sc) != 0) {
sc 427 dev/isa/if_eg.c egprintpcb(sc);
sc 430 dev/isa/if_eg.c if (sc->eg_pcb[0] != EG_RSP_SETEADDR || sc->eg_pcb[1] != 0x02 ||
sc 431 dev/isa/if_eg.c sc->eg_pcb[2] != 0 || sc->eg_pcb[3] != 0) {
sc 433 dev/isa/if_eg.c egprintpcb(sc);
sc 438 dev/isa/if_eg.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 439 dev/isa/if_eg.c ifp->if_softc = sc;
sc 450 dev/isa/if_eg.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 451 dev/isa/if_eg.c IPL_NET, egintr, sc, sc->sc_dev.dv_xname);
sc 455 dev/isa/if_eg.c eginit(sc)
sc 456 dev/isa/if_eg.c register struct eg_softc *sc;
sc 458 dev/isa/if_eg.c bus_space_tag_t bst = sc->sc_bst;
sc 459 dev/isa/if_eg.c bus_space_handle_t bsh = sc->sc_bsh;
sc 460 dev/isa/if_eg.c register struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 470 dev/isa/if_eg.c sc->eg_pcb[0] = EG_CMD_CONFIG82586; /* Configure 82586 */
sc 471 dev/isa/if_eg.c sc->eg_pcb[1] = 2;
sc 472 dev/isa/if_eg.c sc->eg_pcb[2] = 3; /* receive broadcast & multicast */
sc 473 dev/isa/if_eg.c sc->eg_pcb[3] = 0;
sc 474 dev/isa/if_eg.c if (egwritePCB(sc) != 0)
sc 477 dev/isa/if_eg.c if (egreadPCB(sc) != 0) {
sc 479 dev/isa/if_eg.c egprintpcb(sc);
sc 480 dev/isa/if_eg.c } else if (sc->eg_pcb[2] != 0 || sc->eg_pcb[3] != 0)
sc 482 dev/isa/if_eg.c sc->sc_dev.dv_xname);
sc 484 dev/isa/if_eg.c if (sc->eg_inbuf == 0)
sc 485 dev/isa/if_eg.c sc->eg_inbuf = malloc(EG_BUFLEN, M_TEMP, M_NOWAIT);
sc 486 dev/isa/if_eg.c sc->eg_incount = 0;
sc 488 dev/isa/if_eg.c if (sc->eg_outbuf == 0)
sc 489 dev/isa/if_eg.c sc->eg_outbuf = malloc(EG_BUFLEN, M_TEMP, M_NOWAIT);
sc 493 dev/isa/if_eg.c sc->eg_incount = 0;
sc 494 dev/isa/if_eg.c egrecv(sc);
sc 505 dev/isa/if_eg.c egrecv(sc)
sc 506 dev/isa/if_eg.c struct eg_softc *sc;
sc 509 dev/isa/if_eg.c while (sc->eg_incount < EG_INLEN) {
sc 510 dev/isa/if_eg.c sc->eg_pcb[0] = EG_CMD_RECVPACKET;
sc 511 dev/isa/if_eg.c sc->eg_pcb[1] = 0x08;
sc 512 dev/isa/if_eg.c sc->eg_pcb[2] = 0; /* address not used.. we send zero */
sc 513 dev/isa/if_eg.c sc->eg_pcb[3] = 0;
sc 514 dev/isa/if_eg.c sc->eg_pcb[4] = 0;
sc 515 dev/isa/if_eg.c sc->eg_pcb[5] = 0;
sc 516 dev/isa/if_eg.c sc->eg_pcb[6] = EG_BUFLEN & 0xff; /* our buffer size */
sc 517 dev/isa/if_eg.c sc->eg_pcb[7] = (EG_BUFLEN >> 8) & 0xff;
sc 518 dev/isa/if_eg.c sc->eg_pcb[8] = 0; /* timeout, 0 == none */
sc 519 dev/isa/if_eg.c sc->eg_pcb[9] = 0;
sc 520 dev/isa/if_eg.c if (egwritePCB(sc) != 0)
sc 522 dev/isa/if_eg.c sc->eg_incount++;
sc 530 dev/isa/if_eg.c struct eg_softc *sc = ifp->if_softc;
sc 531 dev/isa/if_eg.c bus_space_tag_t bst = sc->sc_bst;
sc 532 dev/isa/if_eg.c bus_space_handle_t bsh = sc->sc_bsh;
sc 561 dev/isa/if_eg.c sc->eg_pcb[0] = EG_CMD_SENDPACKET;
sc 562 dev/isa/if_eg.c sc->eg_pcb[1] = 0x06;
sc 563 dev/isa/if_eg.c sc->eg_pcb[2] = 0; /* address not used, we send zero */
sc 564 dev/isa/if_eg.c sc->eg_pcb[3] = 0;
sc 565 dev/isa/if_eg.c sc->eg_pcb[4] = 0;
sc 566 dev/isa/if_eg.c sc->eg_pcb[5] = 0;
sc 567 dev/isa/if_eg.c sc->eg_pcb[6] = len; /* length of packet */
sc 568 dev/isa/if_eg.c sc->eg_pcb[7] = len >> 8;
sc 569 dev/isa/if_eg.c if (egwritePCB(sc) != 0) {
sc 577 dev/isa/if_eg.c buffer = sc->eg_outbuf;
sc 589 dev/isa/if_eg.c for (ptr = (u_short *)sc->eg_outbuf; len > 0; len -= 2) {
sc 597 dev/isa/if_eg.c printf("%s: start failed\n", sc->sc_dev.dv_xname);
sc 609 dev/isa/if_eg.c struct eg_softc *sc = arg;
sc 610 dev/isa/if_eg.c bus_space_tag_t bst = sc->sc_bst;
sc 611 dev/isa/if_eg.c bus_space_handle_t bsh = sc->sc_bsh;
sc 618 dev/isa/if_eg.c egreadPCB(sc);
sc 619 dev/isa/if_eg.c switch (sc->eg_pcb[0]) {
sc 621 dev/isa/if_eg.c len = sc->eg_pcb[6] | (sc->eg_pcb[7] << 8);
sc 628 dev/isa/if_eg.c for (ptr = (u_short *)sc->eg_inbuf; len > 0; len -= 2) {
sc 636 dev/isa/if_eg.c sc->sc_dev.dv_xname);
sc 643 dev/isa/if_eg.c len = sc->eg_pcb[8] | (sc->eg_pcb[9] << 8);
sc 644 dev/isa/if_eg.c egread(sc, sc->eg_inbuf, len);
sc 646 dev/isa/if_eg.c sc->eg_incount--;
sc 647 dev/isa/if_eg.c egrecv(sc);
sc 652 dev/isa/if_eg.c if (sc->eg_pcb[6] || sc->eg_pcb[7]) {
sc 654 dev/isa/if_eg.c sc->sc_arpcom.ac_if.if_oerrors++;
sc 656 dev/isa/if_eg.c sc->sc_arpcom.ac_if.if_opackets++;
sc 657 dev/isa/if_eg.c sc->sc_arpcom.ac_if.if_collisions +=
sc 658 dev/isa/if_eg.c sc->eg_pcb[8] & 0xf;
sc 659 dev/isa/if_eg.c sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
sc 660 dev/isa/if_eg.c egstart(&sc->sc_arpcom.ac_if);
sc 665 dev/isa/if_eg.c bcopy(&sc->eg_pcb[2], &i, sizeof(i));
sc 667 dev/isa/if_eg.c bcopy(&sc->eg_pcb[6], &i, sizeof(i));
sc 669 dev/isa/if_eg.c DPRINTF(("CRC errors %d\n", *(short *)&sc->eg_pcb[10]));
sc 671 dev/isa/if_eg.c *(short *)&sc->eg_pcb[12]));
sc 673 dev/isa/if_eg.c *(short *)&sc->eg_pcb[14]));
sc 675 dev/isa/if_eg.c *(short *)&sc->eg_pcb[16]));
sc 680 dev/isa/if_eg.c sc->eg_pcb[0]));
sc 681 dev/isa/if_eg.c egprintpcb(sc);
sc 693 dev/isa/if_eg.c egread(sc, buf, len)
sc 694 dev/isa/if_eg.c struct eg_softc *sc;
sc 698 dev/isa/if_eg.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 704 dev/isa/if_eg.c sc->sc_dev.dv_xname, len);
sc 710 dev/isa/if_eg.c m = egget(sc, buf, len);
sc 734 dev/isa/if_eg.c egget(sc, buf, totlen)
sc 735 dev/isa/if_eg.c struct eg_softc *sc;
sc 739 dev/isa/if_eg.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 783 dev/isa/if_eg.c struct eg_softc *sc = ifp->if_softc;
sc 789 dev/isa/if_eg.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 802 dev/isa/if_eg.c eginit(sc);
sc 803 dev/isa/if_eg.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 807 dev/isa/if_eg.c eginit(sc);
sc 819 dev/isa/if_eg.c egstop(sc);
sc 827 dev/isa/if_eg.c eginit(sc);
sc 829 dev/isa/if_eg.c sc->eg_pcb[0] = EG_CMD_GETSTATS;
sc 830 dev/isa/if_eg.c sc->eg_pcb[1] = 0;
sc 831 dev/isa/if_eg.c if (egwritePCB(sc) != 0)
sc 851 dev/isa/if_eg.c egreset(sc)
sc 852 dev/isa/if_eg.c struct eg_softc *sc;
sc 858 dev/isa/if_eg.c egstop(sc);
sc 859 dev/isa/if_eg.c eginit(sc);
sc 867 dev/isa/if_eg.c struct eg_softc *sc = ifp->if_softc;
sc 869 dev/isa/if_eg.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 870 dev/isa/if_eg.c sc->sc_arpcom.ac_if.if_oerrors++;
sc 872 dev/isa/if_eg.c egreset(sc);
sc 876 dev/isa/if_eg.c egstop(sc)
sc 877 dev/isa/if_eg.c register struct eg_softc *sc;
sc 879 dev/isa/if_eg.c bus_space_tag_t bst = sc->sc_bst;
sc 880 dev/isa/if_eg.c bus_space_handle_t bsh = sc->sc_bsh;
sc 86 dev/isa/if_el.c struct mbuf *elget(struct el_softc *sc, int);
sc 111 dev/isa/if_el.c struct el_softc *sc = match;
sc 122 dev/isa/if_el.c sc->sc_iobase = iobase;
sc 156 dev/isa/if_el.c bcopy(station_addr, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 173 dev/isa/if_el.c struct el_softc *sc = (void *)self;
sc 175 dev/isa/if_el.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 177 dev/isa/if_el.c dprintf(("Attaching %s...\n", sc->sc_dev.dv_xname));
sc 180 dev/isa/if_el.c elstop(sc);
sc 183 dev/isa/if_el.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 184 dev/isa/if_el.c ifp->if_softc = sc;
sc 197 dev/isa/if_el.c printf(": address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 199 dev/isa/if_el.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 200 dev/isa/if_el.c IPL_NET, elintr, sc, sc->sc_dev.dv_xname);
sc 209 dev/isa/if_el.c elreset(sc)
sc 210 dev/isa/if_el.c struct el_softc *sc;
sc 216 dev/isa/if_el.c elstop(sc);
sc 217 dev/isa/if_el.c elinit(sc);
sc 225 dev/isa/if_el.c elstop(sc)
sc 226 dev/isa/if_el.c struct el_softc *sc;
sc 229 dev/isa/if_el.c outb(sc->sc_iobase+EL_AC, 0);
sc 237 dev/isa/if_el.c el_hardreset(sc)
sc 238 dev/isa/if_el.c struct el_softc *sc;
sc 240 dev/isa/if_el.c int iobase = sc->sc_iobase;
sc 248 dev/isa/if_el.c outb(iobase+i, sc->sc_arpcom.ac_enaddr[i]);
sc 255 dev/isa/if_el.c elinit(sc)
sc 256 dev/isa/if_el.c struct el_softc *sc;
sc 258 dev/isa/if_el.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 259 dev/isa/if_el.c int iobase = sc->sc_iobase;
sc 262 dev/isa/if_el.c el_hardreset(sc);
sc 297 dev/isa/if_el.c struct el_softc *sc = ifp->if_softc;
sc 298 dev/isa/if_el.c int iobase = sc->sc_iobase;
sc 355 dev/isa/if_el.c if (el_xmit(sc)) {
sc 404 dev/isa/if_el.c el_xmit(sc)
sc 405 dev/isa/if_el.c struct el_softc *sc;
sc 407 dev/isa/if_el.c int iobase = sc->sc_iobase;
sc 436 dev/isa/if_el.c register struct el_softc *sc = arg;
sc 437 dev/isa/if_el.c int iobase = sc->sc_iobase;
sc 457 dev/isa/if_el.c el_hardreset(sc);
sc 459 dev/isa/if_el.c if (sc->sc_arpcom.ac_if.if_flags & IFF_PROMISC)
sc 475 dev/isa/if_el.c elread(sc, len);
sc 493 dev/isa/if_el.c elread(sc, len)
sc 494 dev/isa/if_el.c register struct el_softc *sc;
sc 497 dev/isa/if_el.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 503 dev/isa/if_el.c sc->sc_dev.dv_xname, len);
sc 509 dev/isa/if_el.c m = elget(sc, len);
sc 535 dev/isa/if_el.c elget(sc, totlen)
sc 536 dev/isa/if_el.c struct el_softc *sc;
sc 539 dev/isa/if_el.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 540 dev/isa/if_el.c int iobase = sc->sc_iobase;
sc 592 dev/isa/if_el.c struct el_softc *sc = ifp->if_softc;
sc 598 dev/isa/if_el.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 611 dev/isa/if_el.c elinit(sc);
sc 612 dev/isa/if_el.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 616 dev/isa/if_el.c elinit(sc);
sc 628 dev/isa/if_el.c elstop(sc);
sc 636 dev/isa/if_el.c elinit(sc);
sc 642 dev/isa/if_el.c elreset(sc);
sc 662 dev/isa/if_el.c struct el_softc *sc = ifp->if_softc;
sc 664 dev/isa/if_el.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 665 dev/isa/if_el.c sc->sc_arpcom.ac_if.if_oerrors++;
sc 667 dev/isa/if_el.c elreset(sc);
sc 266 dev/isa/if_ep_isa.c struct ep_softc *sc = (void *)self;
sc 276 dev/isa/if_ep_isa.c sc->sc_iot = iot;
sc 277 dev/isa/if_ep_isa.c sc->sc_ioh = ioh;
sc 278 dev/isa/if_ep_isa.c sc->bustype = EP_BUS_ISA;
sc 284 dev/isa/if_ep_isa.c epconfig(sc, EP_CHIPSET_3C509, NULL);
sc 290 dev/isa/if_ep_isa.c epconfig(sc, EP_CHIPSET_UNKNOWN, NULL);
sc 293 dev/isa/if_ep_isa.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 294 dev/isa/if_ep_isa.c IPL_NET, epintr, sc, sc->sc_dev.dv_xname);
sc 112 dev/isa/if_ep_isapnp.c struct ep_softc *sc = (void *)self;
sc 117 dev/isa/if_ep_isapnp.c sc->sc_iot = iot = ia->ia_iot;
sc 118 dev/isa/if_ep_isapnp.c sc->sc_ioh = ioh = ia->ipa_io[0].h;
sc 119 dev/isa/if_ep_isapnp.c sc->bustype = EP_BUS_ISA;
sc 124 dev/isa/if_ep_isapnp.c epconfig(sc, EP_CHIPSET_3C509, NULL);
sc 126 dev/isa/if_ep_isapnp.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 127 dev/isa/if_ep_isapnp.c IPL_NET, epintr, sc, sc->sc_dev.dv_xname);
sc 125 dev/isa/if_ex.c static int look_for_card(struct isa_attach_args *, struct ex_softc *sc);
sc 139 dev/isa/if_ex.c #define BANK_SEL(X) bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMD_REG, \
sc 141 dev/isa/if_ex.c #define ISA_GET(offset) bus_space_read_1(sc->sc_iot, sc->sc_ioh, (offset))
sc 142 dev/isa/if_ex.c #define ISA_PUT(offset, value) bus_space_write_1(sc->sc_iot, sc->sc_ioh, \
sc 144 dev/isa/if_ex.c #define ISA_GET_2(offset) bus_space_read_2(sc->sc_iot, sc->sc_ioh, \
sc 146 dev/isa/if_ex.c #define ISA_PUT_2(offset, value) bus_space_write_2(sc->sc_iot, sc->sc_ioh, \
sc 149 dev/isa/if_ex.c sc->sc_iot, sc->sc_ioh, (offset), (addr), (count))
sc 151 dev/isa/if_ex.c sc->sc_iot, sc->sc_ioh, (offset), (addr), (count))
sc 155 dev/isa/if_ex.c look_for_card(ia, sc)
sc 157 dev/isa/if_ex.c struct ex_softc *sc;
sc 182 dev/isa/if_ex.c struct ex_softc *sc = match;
sc 190 dev/isa/if_ex.c sc->sc_iot = ia->ia_iot;
sc 191 dev/isa/if_ex.c if(bus_space_map(sc->sc_iot, ia->ia_iobase, EX_IOSIZE, 0,
sc 192 dev/isa/if_ex.c &sc->sc_ioh))
sc 195 dev/isa/if_ex.c if (!look_for_card(ia, sc)) {
sc 196 dev/isa/if_ex.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, EX_IOSIZE);
sc 218 dev/isa/if_ex.c sc->iobase = ia->ia_iobase;
sc 219 dev/isa/if_ex.c eaddr_tmp = eeprom_read(sc, EE_Eth_Addr_Lo);
sc 220 dev/isa/if_ex.c sc->arpcom.ac_enaddr[5] = eaddr_tmp & 0xff;
sc 221 dev/isa/if_ex.c sc->arpcom.ac_enaddr[4] = eaddr_tmp >> 8;
sc 222 dev/isa/if_ex.c eaddr_tmp = eeprom_read(sc, EE_Eth_Addr_Mid);
sc 223 dev/isa/if_ex.c sc->arpcom.ac_enaddr[3] = eaddr_tmp & 0xff;
sc 224 dev/isa/if_ex.c sc->arpcom.ac_enaddr[2] = eaddr_tmp >> 8;
sc 225 dev/isa/if_ex.c eaddr_tmp = eeprom_read(sc, EE_Eth_Addr_Hi);
sc 226 dev/isa/if_ex.c sc->arpcom.ac_enaddr[1] = eaddr_tmp & 0xff;
sc 227 dev/isa/if_ex.c sc->arpcom.ac_enaddr[0] = eaddr_tmp >> 8;
sc 228 dev/isa/if_ex.c tmp = eeprom_read(sc, EE_IRQ_No) & IRQ_No_Mask;
sc 232 dev/isa/if_ex.c sc->irq_no = ia->ia_irq;
sc 235 dev/isa/if_ex.c sc->irq_no = ee2irqmap[tmp];
sc 236 dev/isa/if_ex.c ia->ia_irq = sc->irq_no;
sc 238 dev/isa/if_ex.c if (sc->irq_no == 0) {
sc 245 dev/isa/if_ex.c sc->connector = Conn_TPE;
sc 247 dev/isa/if_ex.c sc->connector = Conn_BNC;
sc 249 dev/isa/if_ex.c sc->connector = Conn_AUI;
sc 250 dev/isa/if_ex.c sc->mem_size = CARD_RAM_SIZE; /* XXX This should be read from the card
sc 265 dev/isa/if_ex.c struct ex_softc *sc = (void *)self;
sc 267 dev/isa/if_ex.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 278 dev/isa/if_ex.c ifp->if_softc = sc;
sc 293 dev/isa/if_ex.c ether_sprintf(sc->arpcom.ac_enaddr));
sc 294 dev/isa/if_ex.c switch(sc->connector) {
sc 301 dev/isa/if_ex.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 302 dev/isa/if_ex.c IPL_NET, exintr, sc, self->dv_xname);
sc 303 dev/isa/if_ex.c ex_init(sc);
sc 310 dev/isa/if_ex.c ex_init(sc)
sc 311 dev/isa/if_ex.c struct ex_softc *sc;
sc 313 dev/isa/if_ex.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 322 dev/isa/if_ex.c sc->arpcom.ac_if.if_timer = 0;
sc 332 dev/isa/if_ex.c ISA_PUT(I_ADDR_REG0 + i, sc->arpcom.ac_enaddr[i]);
sc 346 dev/isa/if_ex.c irq2eemap[sc->irq_no]);
sc 353 dev/isa/if_ex.c sc->rx_mem_size = sc->mem_size * 3 / 4;
sc 354 dev/isa/if_ex.c sc->tx_mem_size = sc->mem_size - sc->rx_mem_size;
sc 355 dev/isa/if_ex.c sc->rx_lower_limit = 0x0000;
sc 356 dev/isa/if_ex.c sc->rx_upper_limit = sc->rx_mem_size - 2;
sc 357 dev/isa/if_ex.c sc->tx_lower_limit = sc->rx_mem_size;
sc 358 dev/isa/if_ex.c sc->tx_upper_limit = sc->mem_size - 2;
sc 359 dev/isa/if_ex.c ISA_PUT(RCV_LOWER_LIMIT_REG, sc->rx_lower_limit >> 8);
sc 360 dev/isa/if_ex.c ISA_PUT(RCV_UPPER_LIMIT_REG, sc->rx_upper_limit >> 8);
sc 361 dev/isa/if_ex.c ISA_PUT(XMT_LOWER_LIMIT_REG, sc->tx_lower_limit >> 8);
sc 362 dev/isa/if_ex.c ISA_PUT(XMT_UPPER_LIMIT_REG, sc->tx_upper_limit >> 8);
sc 375 dev/isa/if_ex.c ISA_PUT_2(RCV_BAR, sc->rx_lower_limit);
sc 376 dev/isa/if_ex.c sc->rx_head = sc->rx_lower_limit;
sc 377 dev/isa/if_ex.c ISA_PUT_2(RCV_STOP_REG, sc->rx_upper_limit | 0xfe);
sc 378 dev/isa/if_ex.c ISA_PUT_2(XMT_BAR, sc->tx_lower_limit);
sc 379 dev/isa/if_ex.c sc->tx_head = sc->tx_tail = sc->tx_lower_limit;
sc 403 dev/isa/if_ex.c register struct ex_softc *sc = ifp->if_softc;
sc 437 dev/isa/if_ex.c if ((i = sc->tx_tail - sc->tx_head) >= 0)
sc 438 dev/isa/if_ex.c avail = sc->tx_mem_size - i;
sc 459 dev/isa/if_ex.c dest = sc->tx_tail;
sc 461 dev/isa/if_ex.c if (next > sc->tx_upper_limit) {
sc 462 dev/isa/if_ex.c if ((sc->tx_upper_limit + 2 - sc->tx_tail) <=
sc 464 dev/isa/if_ex.c dest = sc->tx_lower_limit;
sc 467 dev/isa/if_ex.c next = sc->tx_lower_limit + next -
sc 468 dev/isa/if_ex.c sc->tx_upper_limit - 2;
sc 504 dev/isa/if_ex.c if (sc->tx_head != sc->tx_tail) {
sc 505 dev/isa/if_ex.c if (sc->tx_tail != dest) {
sc 507 dev/isa/if_ex.c sc->tx_last + XMT_Chain_Point);
sc 510 dev/isa/if_ex.c ISA_PUT_2(HOST_ADDR_REG, sc->tx_last +
sc 513 dev/isa/if_ex.c ISA_PUT_2(HOST_ADDR_REG, sc->tx_last +
sc 528 dev/isa/if_ex.c if (sc->tx_head == sc->tx_tail) {
sc 531 dev/isa/if_ex.c sc->tx_head = dest;
sc 537 dev/isa/if_ex.c sc->tx_last = dest;
sc 538 dev/isa/if_ex.c sc->tx_tail = next;
sc 560 dev/isa/if_ex.c ex_stop(sc)
sc 561 dev/isa/if_ex.c struct ex_softc *sc;
sc 576 dev/isa/if_ex.c sc->tx_head = sc->tx_tail = sc->tx_lower_limit;
sc 577 dev/isa/if_ex.c sc->tx_last = 0; /* XXX I think these two lines are not necessary,
sc 593 dev/isa/if_ex.c struct ex_softc *sc = arg;
sc 594 dev/isa/if_ex.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 611 dev/isa/if_ex.c ex_rx_intr(sc);
sc 615 dev/isa/if_ex.c ex_tx_intr(sc);
sc 638 dev/isa/if_ex.c ex_tx_intr(sc)
sc 639 dev/isa/if_ex.c struct ex_softc *sc;
sc 641 dev/isa/if_ex.c register struct ifnet *ifp = &sc->arpcom.ac_if;
sc 652 dev/isa/if_ex.c while (sc->tx_head != sc->tx_tail) {
sc 653 dev/isa/if_ex.c ISA_PUT_2(HOST_ADDR_REG, sc->tx_head);
sc 657 dev/isa/if_ex.c sc->tx_head = ISA_GET_2(IO_PORT_REG);
sc 674 dev/isa/if_ex.c ex_rx_intr(sc)
sc 675 dev/isa/if_ex.c struct ex_softc *sc;
sc 677 dev/isa/if_ex.c register struct ifnet *ifp = &sc->arpcom.ac_if;
sc 689 dev/isa/if_ex.c ISA_PUT_2(HOST_ADDR_REG, sc->rx_head);
sc 692 dev/isa/if_ex.c sc->rx_head = ISA_GET_2(IO_PORT_REG);
sc 759 dev/isa/if_ex.c ISA_PUT_2(HOST_ADDR_REG, sc->rx_head);
sc 762 dev/isa/if_ex.c if (sc->rx_head < sc->rx_lower_limit + 2)
sc 763 dev/isa/if_ex.c ISA_PUT_2(RCV_STOP_REG, sc->rx_upper_limit);
sc 765 dev/isa/if_ex.c ISA_PUT_2(RCV_STOP_REG, sc->rx_head - 2);
sc 778 dev/isa/if_ex.c struct ex_softc *sc = ifp->if_softc;
sc 794 dev/isa/if_ex.c ex_init(sc);
sc 799 dev/isa/if_ex.c ex_init(sc);
sc 809 dev/isa/if_ex.c bcopy((caddr_t) sc->arpcom.ac_enaddr, (caddr_t) sa->sa_data,
sc 817 dev/isa/if_ex.c ex_stop(sc);
sc 820 dev/isa/if_ex.c ex_init(sc);
sc 825 dev/isa/if_ex.c bcopy((caddr_t) sc->sc_addr, (caddr_t) &ifr->ifr_data, sizeof(sc->sc_addr));
sc 856 dev/isa/if_ex.c ex_reset(sc)
sc 857 dev/isa/if_ex.c struct ex_softc *sc;
sc 864 dev/isa/if_ex.c ex_stop(sc);
sc 865 dev/isa/if_ex.c ex_init(sc);
sc 876 dev/isa/if_ex.c struct ex_softc *sc = ifp->if_softc;
sc 883 dev/isa/if_ex.c ex_reset(sc);
sc 891 dev/isa/if_ex.c eeprom_read(sc, location)
sc 892 dev/isa/if_ex.c struct ex_softc *sc;
sc 329 dev/isa/if_ie.c #define PORT sc->sc_iobase
sc 330 dev/isa/if_ie.c #define MEM sc->sc_maddr
sc 357 dev/isa/if_ie.c ie_ack(sc, mask)
sc 358 dev/isa/if_ie.c struct ie_softc *sc;
sc 361 dev/isa/if_ie.c volatile struct ie_sys_ctl_block *scb = sc->scb;
sc 364 dev/isa/if_ie.c (sc->chan_attn)(sc);
sc 375 dev/isa/if_ie.c struct ie_softc *sc = match;
sc 378 dev/isa/if_ie.c if (sl_probe(sc, ia))
sc 380 dev/isa/if_ie.c if (el_probe(sc, ia))
sc 382 dev/isa/if_ie.c if (ee16_probe(sc, ia))
sc 388 dev/isa/if_ie.c sl_probe(sc, ia)
sc 389 dev/isa/if_ie.c struct ie_softc *sc;
sc 394 dev/isa/if_ie.c sc->sc_iobase = ia->ia_iobase;
sc 397 dev/isa/if_ie.c sc->reset_586 = sl_reset_586;
sc 398 dev/isa/if_ie.c sc->chan_attn = sl_chan_attn;
sc 403 dev/isa/if_ie.c sc->hard_type = IE_STARLAN10;
sc 406 dev/isa/if_ie.c sc->hard_type = IE_EN100;
sc 409 dev/isa/if_ie.c sc->hard_type = IE_SLFIBER;
sc 416 dev/isa/if_ie.c sc->sc_dev.dv_xname, SL_BOARD(c));
sc 421 dev/isa/if_ie.c sc->hard_vers = SL_REV(c);
sc 425 dev/isa/if_ie.c sc->sc_dev.dv_xname, ie_hardware_names[sc->hard_type]);
sc 432 dev/isa/if_ie.c sc->sc_maddr = ISA_HOLE_VADDR(ia->ia_maddr);
sc 433 dev/isa/if_ie.c ie_find_mem_size(sc);
sc 435 dev/isa/if_ie.c if (!sc->sc_msize) {
sc 436 dev/isa/if_ie.c printf("%s: can't find shared memory\n", sc->sc_dev.dv_xname);
sc 441 dev/isa/if_ie.c ia->ia_msize = sc->sc_msize;
sc 442 dev/isa/if_ie.c else if (ia->ia_msize != sc->sc_msize) {
sc 444 dev/isa/if_ie.c sc->sc_dev.dv_xname, ia->ia_msize, sc->sc_msize);
sc 448 dev/isa/if_ie.c slel_get_address(sc);
sc 455 dev/isa/if_ie.c el_probe(sc, ia)
sc 456 dev/isa/if_ie.c struct ie_softc *sc;
sc 465 dev/isa/if_ie.c sc->sc_iobase = ia->ia_iobase;
sc 468 dev/isa/if_ie.c sc->reset_586 = el_reset_586;
sc 469 dev/isa/if_ie.c sc->chan_attn = el_chan_attn;
sc 483 dev/isa/if_ie.c elink_reset(iot, ioh, sc->sc_dev.dv_parent->dv_unit);
sc 497 dev/isa/if_ie.c sc->sc_dev.dv_xname);
sc 510 dev/isa/if_ie.c sc->hard_type = IE_3C507;
sc 511 dev/isa/if_ie.c sc->hard_vers = 10*(i / 16) + (i % 16) - 1;
sc 518 dev/isa/if_ie.c sc->sc_dev.dv_xname, ia->ia_irq, i);
sc 529 dev/isa/if_ie.c sc->sc_dev.dv_xname, ia->ia_maddr, i);
sc 540 dev/isa/if_ie.c sc->sc_maddr = ISA_HOLE_VADDR(ia->ia_maddr);
sc 541 dev/isa/if_ie.c ie_find_mem_size(sc);
sc 543 dev/isa/if_ie.c if (!sc->sc_msize) {
sc 544 dev/isa/if_ie.c printf("%s: can't find shared memory\n", sc->sc_dev.dv_xname);
sc 550 dev/isa/if_ie.c ia->ia_msize = sc->sc_msize;
sc 551 dev/isa/if_ie.c else if (ia->ia_msize != sc->sc_msize) {
sc 553 dev/isa/if_ie.c sc->sc_dev.dv_xname, ia->ia_msize, sc->sc_msize);
sc 558 dev/isa/if_ie.c slel_get_address(sc);
sc 574 dev/isa/if_ie.c ee16_probe(sc, ia)
sc 575 dev/isa/if_ie.c struct ie_softc *sc;
sc 587 dev/isa/if_ie.c sc->reset_586 = ee16_reset_586;
sc 588 dev/isa/if_ie.c sc->chan_attn = ee16_chan_attn;
sc 607 dev/isa/if_ie.c sc->sc_iobase = ia->ia_iobase;
sc 608 dev/isa/if_ie.c sc->hard_type = IE_EE16;
sc 632 dev/isa/if_ie.c i = (ee16_read_eeprom(sc, 6) & 0x00ff ) >> 3;
sc 654 dev/isa/if_ie.c sc->sc_maddr = ISA_HOLE_VADDR(ia->ia_maddr);
sc 655 dev/isa/if_ie.c sc->sc_msize = ia->ia_msize;
sc 662 dev/isa/if_ie.c checksum += ee16_read_eeprom(sc, i);
sc 688 dev/isa/if_ie.c if ((kvtop(sc->sc_maddr) < 0xC0000) ||
sc 689 dev/isa/if_ie.c (kvtop(sc->sc_maddr) + sc->sc_msize > 0xF0000)) {
sc 694 dev/isa/if_ie.c pg = (kvtop(sc->sc_maddr) & 0x3C000) >> 14;
sc 696 dev/isa/if_ie.c decode = ((1 << (sc->sc_msize / 16384)) - 1) << pg;
sc 712 dev/isa/if_ie.c bzero(sc->sc_maddr, 32);
sc 713 dev/isa/if_ie.c bzero(sc->sc_maddr, sc->sc_msize);
sc 721 dev/isa/if_ie.c irq = ee16_read_eeprom(sc, IEE16_EEPROM_CONFIG1);
sc 723 dev/isa/if_ie.c sc->irq_encoded = irq;
sc 728 dev/isa/if_ie.c printf("\nie%d: fatal: board IRQ %d does not match kernel\n", sc->sc_dev.dv_unit, irq);
sc 739 dev/isa/if_ie.c eaddrtemp = ee16_read_eeprom(sc, IEE16_EEPROM_ENET_HIGH);
sc 740 dev/isa/if_ie.c sc->sc_arpcom.ac_enaddr[1] = eaddrtemp & 0xFF;
sc 741 dev/isa/if_ie.c sc->sc_arpcom.ac_enaddr[0] = eaddrtemp >> 8;
sc 742 dev/isa/if_ie.c eaddrtemp = ee16_read_eeprom(sc, IEE16_EEPROM_ENET_MID);
sc 743 dev/isa/if_ie.c sc->sc_arpcom.ac_enaddr[3] = eaddrtemp & 0xFF;
sc 744 dev/isa/if_ie.c sc->sc_arpcom.ac_enaddr[2] = eaddrtemp >> 8;
sc 745 dev/isa/if_ie.c eaddrtemp = ee16_read_eeprom(sc, IEE16_EEPROM_ENET_LOW);
sc 746 dev/isa/if_ie.c sc->sc_arpcom.ac_enaddr[5] = eaddrtemp & 0xFF;
sc 747 dev/isa/if_ie.c sc->sc_arpcom.ac_enaddr[4] = eaddrtemp >> 8;
sc 750 dev/isa/if_ie.c outb(PORT + IEE16_IRQ, sc->irq_encoded);
sc 753 dev/isa/if_ie.c if(sc->hard_type == IE_EE16) {
sc 763 dev/isa/if_ie.c if (!check_ie_present(sc, sc->sc_maddr, sc->sc_msize))
sc 778 dev/isa/if_ie.c struct ie_softc *sc = (void *)self;
sc 780 dev/isa/if_ie.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 782 dev/isa/if_ie.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 783 dev/isa/if_ie.c ifp->if_softc = sc;
sc 796 dev/isa/if_ie.c ether_sprintf(sc->sc_arpcom.ac_enaddr),
sc 797 dev/isa/if_ie.c ie_hardware_names[sc->hard_type], sc->hard_vers + 1);
sc 799 dev/isa/if_ie.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 800 dev/isa/if_ie.c IPL_NET, ieintr, sc, sc->sc_dev.dv_xname);
sc 811 dev/isa/if_ie.c struct ie_softc *sc = ifp->if_softc;
sc 813 dev/isa/if_ie.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 814 dev/isa/if_ie.c ++sc->sc_arpcom.ac_if.if_oerrors;
sc 815 dev/isa/if_ie.c iereset(sc);
sc 825 dev/isa/if_ie.c struct ie_softc *sc = arg;
sc 829 dev/isa/if_ie.c if (sc->hard_type == IE_3C507)
sc 833 dev/isa/if_ie.c if (sc->hard_type == IE_EE16)
sc 834 dev/isa/if_ie.c outb(PORT + IEE16_IRQ, sc->irq_encoded);
sc 836 dev/isa/if_ie.c status = sc->scb->ie_status & IE_ST_WHENCE;
sc 842 dev/isa/if_ie.c ie_ack(sc, status);
sc 847 dev/isa/if_ie.c if (sc->sc_debug & IED_RINT)
sc 848 dev/isa/if_ie.c printf("%s: rint\n", sc->sc_dev.dv_xname);
sc 850 dev/isa/if_ie.c ierint(sc);
sc 859 dev/isa/if_ie.c if (sc->sc_debug & IED_TINT)
sc 860 dev/isa/if_ie.c printf("%s: tint\n", sc->sc_dev.dv_xname);
sc 862 dev/isa/if_ie.c ietint(sc);
sc 869 dev/isa/if_ie.c printf("%s: receiver not ready\n", sc->sc_dev.dv_xname);
sc 870 dev/isa/if_ie.c sc->sc_arpcom.ac_if.if_ierrors++;
sc 871 dev/isa/if_ie.c iereset(sc);
sc 875 dev/isa/if_ie.c if ((status & IE_ST_CNA) && (sc->sc_debug & IED_CNA))
sc 876 dev/isa/if_ie.c printf("%s: cna\n", sc->sc_dev.dv_xname);
sc 880 dev/isa/if_ie.c if (sc->hard_type == IE_3C507)
sc 883 dev/isa/if_ie.c status = sc->scb->ie_status & IE_ST_WHENCE;
sc 886 dev/isa/if_ie.c if (sc->hard_type == IE_EE16)
sc 887 dev/isa/if_ie.c outb(PORT + IEE16_IRQ, sc->irq_encoded | IEE16_IRQ_ENABLE);
sc 898 dev/isa/if_ie.c ierint(sc)
sc 899 dev/isa/if_ie.c struct ie_softc *sc;
sc 901 dev/isa/if_ie.c volatile struct ie_sys_ctl_block *scb = sc->scb;
sc 905 dev/isa/if_ie.c i = sc->rfhead;
sc 907 dev/isa/if_ie.c status = sc->rframes[i]->ie_fd_status;
sc 911 dev/isa/if_ie.c sc->sc_arpcom.ac_if.if_ierrors +=
sc 919 dev/isa/if_ie.c ie_readframe(sc, i);
sc 923 dev/isa/if_ie.c sc->rframes[0]->ie_fd_buf_desc =
sc 924 dev/isa/if_ie.c MK_16(MEM, sc->rbuffs[0]);
sc 925 dev/isa/if_ie.c scb->ie_recv_list = MK_16(MEM, sc->rframes[0]);
sc 926 dev/isa/if_ie.c command_and_wait(sc, IE_RU_START, 0, 0);
sc 940 dev/isa/if_ie.c ietint(sc)
sc 941 dev/isa/if_ie.c struct ie_softc *sc;
sc 943 dev/isa/if_ie.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 949 dev/isa/if_ie.c status = sc->xmit_cmds[sc->xctail]->ie_xmit_status;
sc 965 dev/isa/if_ie.c printf("%s: send aborted\n", sc->sc_dev.dv_xname);
sc 967 dev/isa/if_ie.c printf("%s: late collision\n", sc->sc_dev.dv_xname);
sc 969 dev/isa/if_ie.c printf("%s: no carrier\n", sc->sc_dev.dv_xname);
sc 971 dev/isa/if_ie.c printf("%s: lost CTS\n", sc->sc_dev.dv_xname);
sc 973 dev/isa/if_ie.c printf("%s: DMA underrun\n", sc->sc_dev.dv_xname);
sc 975 dev/isa/if_ie.c printf("%s: too many collisions\n", sc->sc_dev.dv_xname);
sc 985 dev/isa/if_ie.c if (sc->want_mcsetup) {
sc 986 dev/isa/if_ie.c mc_setup(sc, (caddr_t)sc->xmit_cbuffs[sc->xctail]);
sc 987 dev/isa/if_ie.c sc->want_mcsetup = 0;
sc 991 dev/isa/if_ie.c sc->xmit_busy--;
sc 992 dev/isa/if_ie.c sc->xctail = (sc->xctail + 1) % NTXBUF;
sc 995 dev/isa/if_ie.c if (sc->xmit_busy > 0)
sc 996 dev/isa/if_ie.c iexmit(sc);
sc 1029 dev/isa/if_ie.c check_eh(sc, eh, to_bpf)
sc 1030 dev/isa/if_ie.c struct ie_softc *sc;
sc 1036 dev/isa/if_ie.c switch (sc->promisc) {
sc 1043 dev/isa/if_ie.c *to_bpf = (sc->sc_arpcom.ac_if.if_bpf != 0); /* BPF gets this packet if anybody cares */
sc 1047 dev/isa/if_ie.c if (ether_equal(eh->ether_dhost, sc->sc_arpcom.ac_enaddr))
sc 1056 dev/isa/if_ie.c *to_bpf = (sc->sc_arpcom.ac_if.if_bpf != 0) ||
sc 1057 dev/isa/if_ie.c (sc->sc_arpcom.ac_if.if_bridge != NULL);
sc 1059 dev/isa/if_ie.c *to_bpf = (sc->sc_arpcom.ac_if.if_bridge != NULL);
sc 1062 dev/isa/if_ie.c if (ether_equal(eh->ether_dhost, sc->sc_arpcom.ac_enaddr))
sc 1066 dev/isa/if_ie.c if (*to_bpf && sc->sc_arpcom.ac_if.if_bridge == NULL)
sc 1080 dev/isa/if_ie.c for (i = 0; i < sc->mcast_count; i++) {
sc 1081 dev/isa/if_ie.c if (ether_equal(eh->ether_dhost, (u_char *)&sc->mcast_addrs[i])) {
sc 1097 dev/isa/if_ie.c *to_bpf = (sc->sc_arpcom.ac_if.if_bpf != 0) ||
sc 1098 dev/isa/if_ie.c (sc->sc_arpcom.ac_if.if_bridge != NULL);
sc 1100 dev/isa/if_ie.c *to_bpf = (sc->sc_arpcom.ac_if.if_bridge != NULL);
sc 1107 dev/isa/if_ie.c if (ether_equal(eh->ether_dhost, sc->sc_arpcom.ac_enaddr))
sc 1112 dev/isa/if_ie.c if (*to_bpf && sc->sc_arpcom.ac_if.if_bridge == NULL)
sc 1127 dev/isa/if_ie.c *to_bpf = (sc->sc_arpcom.ac_if.if_bpf != 0);
sc 1144 dev/isa/if_ie.c ie_buflen(sc, head)
sc 1145 dev/isa/if_ie.c struct ie_softc *sc;
sc 1149 dev/isa/if_ie.c return (sc->rbuffs[head]->ie_rbd_actual
sc 1154 dev/isa/if_ie.c ie_packet_len(sc)
sc 1155 dev/isa/if_ie.c struct ie_softc *sc;
sc 1158 dev/isa/if_ie.c int head = sc->rbhead;
sc 1162 dev/isa/if_ie.c if (!(sc->rbuffs[sc->rbhead]->ie_rbd_actual & IE_RBD_USED))
sc 1165 dev/isa/if_ie.c i = sc->rbuffs[head]->ie_rbd_actual & IE_RBD_LAST;
sc 1167 dev/isa/if_ie.c acc += ie_buflen(sc, head);
sc 1180 dev/isa/if_ie.c iexmit(sc)
sc 1181 dev/isa/if_ie.c struct ie_softc *sc;
sc 1185 dev/isa/if_ie.c if (sc->sc_debug & IED_XMIT)
sc 1186 dev/isa/if_ie.c printf("%s: xmit buffer %d\n", sc->sc_dev.dv_xname,
sc 1187 dev/isa/if_ie.c sc->xctail);
sc 1195 dev/isa/if_ie.c if (sc->sc_arpcom.ac_if.if_bpf)
sc 1196 dev/isa/if_ie.c bpf_tap(sc->sc_arpcom.ac_if.if_bpf,
sc 1197 dev/isa/if_ie.c sc->xmit_cbuffs[sc->xctail],
sc 1198 dev/isa/if_ie.c sc->xmit_buffs[sc->xctail]->ie_xmit_flags,
sc 1202 dev/isa/if_ie.c sc->xmit_buffs[sc->xctail]->ie_xmit_flags |= IE_XMIT_LAST;
sc 1203 dev/isa/if_ie.c sc->xmit_buffs[sc->xctail]->ie_xmit_next = 0xffff;
sc 1204 dev/isa/if_ie.c sc->xmit_buffs[sc->xctail]->ie_xmit_buf =
sc 1205 dev/isa/if_ie.c MK_24(MEM, sc->xmit_cbuffs[sc->xctail]);
sc 1207 dev/isa/if_ie.c sc->xmit_cmds[sc->xctail]->com.ie_cmd_link = 0xffff;
sc 1208 dev/isa/if_ie.c sc->xmit_cmds[sc->xctail]->com.ie_cmd_cmd =
sc 1211 dev/isa/if_ie.c sc->xmit_cmds[sc->xctail]->ie_xmit_status = 0;
sc 1212 dev/isa/if_ie.c sc->xmit_cmds[sc->xctail]->ie_xmit_desc =
sc 1213 dev/isa/if_ie.c MK_16(MEM, sc->xmit_buffs[sc->xctail]);
sc 1215 dev/isa/if_ie.c sc->scb->ie_command_list = MK_16(MEM, sc->xmit_cmds[sc->xctail]);
sc 1216 dev/isa/if_ie.c command_and_wait(sc, IE_CU_START, 0, 0);
sc 1218 dev/isa/if_ie.c sc->sc_arpcom.ac_if.if_timer = 5;
sc 1232 dev/isa/if_ie.c ieget(sc, ehp, to_bpf)
sc 1233 dev/isa/if_ie.c struct ie_softc *sc;
sc 1242 dev/isa/if_ie.c resid = totlen = ie_packet_len(sc);
sc 1246 dev/isa/if_ie.c head = sc->rbhead;
sc 1251 dev/isa/if_ie.c bcopy((caddr_t)sc->cbuffs[head], (caddr_t)ehp, sizeof *ehp);
sc 1260 dev/isa/if_ie.c if (!check_eh(sc, ehp, to_bpf)) {
sc 1261 dev/isa/if_ie.c sc->sc_arpcom.ac_if.if_ierrors--; /* just this case, it's not an error */
sc 1268 dev/isa/if_ie.c m->m_pkthdr.rcvif = &sc->sc_arpcom.ac_if;
sc 1308 dev/isa/if_ie.c int thisrblen = ie_buflen(sc, head) - thisrboff,
sc 1312 dev/isa/if_ie.c bcopy((caddr_t)(sc->cbuffs[head] + thisrboff),
sc 1347 dev/isa/if_ie.c ie_readframe(sc, num)
sc 1348 dev/isa/if_ie.c struct ie_softc *sc;
sc 1358 dev/isa/if_ie.c status = sc->rframes[num]->ie_fd_status;
sc 1361 dev/isa/if_ie.c sc->rframes[num]->ie_fd_status = 0;
sc 1362 dev/isa/if_ie.c sc->rframes[num]->ie_fd_last |= IE_FD_LAST;
sc 1363 dev/isa/if_ie.c sc->rframes[sc->rftail]->ie_fd_last &= ~IE_FD_LAST;
sc 1364 dev/isa/if_ie.c sc->rftail = (sc->rftail + 1) % NFRAMES;
sc 1365 dev/isa/if_ie.c sc->rfhead = (sc->rfhead + 1) % NFRAMES;
sc 1369 dev/isa/if_ie.c m = ieget(sc, &eh, &bpf_gets_it);
sc 1371 dev/isa/if_ie.c m = ieget(sc, &eh, 0);
sc 1373 dev/isa/if_ie.c ie_drop_packet_buffer(sc);
sc 1376 dev/isa/if_ie.c sc->sc_arpcom.ac_if.if_ierrors++;
sc 1381 dev/isa/if_ie.c if (sc->sc_debug & IED_READFRAME)
sc 1382 dev/isa/if_ie.c printf("%s: frame from ether %s type %x\n", sc->sc_dev.dv_xname,
sc 1390 dev/isa/if_ie.c bpf_mtap(sc->sc_arpcom.ac_if.if_bpf, m, BPF_DIRECTION_IN);
sc 1416 dev/isa/if_ie.c ether_input_mbuf(&sc->sc_arpcom.ac_if, m);
sc 1417 dev/isa/if_ie.c sc->sc_arpcom.ac_if.if_ipackets++;
sc 1421 dev/isa/if_ie.c ie_drop_packet_buffer(sc)
sc 1422 dev/isa/if_ie.c struct ie_softc *sc;
sc 1431 dev/isa/if_ie.c if (!(sc->rbuffs[sc->rbhead]->ie_rbd_actual & IE_RBD_USED)) {
sc 1433 dev/isa/if_ie.c print_rbd(sc->rbuffs[sc->rbhead]);
sc 1436 dev/isa/if_ie.c sc->sc_dev.dv_xname, sc->rbhead);
sc 1437 dev/isa/if_ie.c iereset(sc);
sc 1441 dev/isa/if_ie.c i = sc->rbuffs[sc->rbhead]->ie_rbd_actual & IE_RBD_LAST;
sc 1443 dev/isa/if_ie.c sc->rbuffs[sc->rbhead]->ie_rbd_length |= IE_RBD_LAST;
sc 1444 dev/isa/if_ie.c sc->rbuffs[sc->rbhead]->ie_rbd_actual = 0;
sc 1445 dev/isa/if_ie.c sc->rbhead = (sc->rbhead + 1) % NRXBUF;
sc 1446 dev/isa/if_ie.c sc->rbuffs[sc->rbtail]->ie_rbd_length &= ~IE_RBD_LAST;
sc 1447 dev/isa/if_ie.c sc->rbtail = (sc->rbtail + 1) % NRXBUF;
sc 1458 dev/isa/if_ie.c struct ie_softc *sc = ifp->if_softc;
sc 1467 dev/isa/if_ie.c if (sc->xmit_busy == NTXBUF) {
sc 1487 dev/isa/if_ie.c if (sc->sc_debug & IED_ENQ)
sc 1488 dev/isa/if_ie.c printf("%s: fill buffer %d\n", sc->sc_dev.dv_xname,
sc 1489 dev/isa/if_ie.c sc->xchead);
sc 1493 dev/isa/if_ie.c buffer = sc->xmit_cbuffs[sc->xchead];
sc 1502 dev/isa/if_ie.c printf("%s: tbuf overflow\n", sc->sc_dev.dv_xname);
sc 1512 dev/isa/if_ie.c sc->xmit_buffs[sc->xchead]->ie_xmit_flags = len;
sc 1515 dev/isa/if_ie.c if (sc->xmit_busy == 0)
sc 1516 dev/isa/if_ie.c iexmit(sc);
sc 1518 dev/isa/if_ie.c sc->xchead = (sc->xchead + 1) % NTXBUF;
sc 1519 dev/isa/if_ie.c sc->xmit_busy++;
sc 1527 dev/isa/if_ie.c check_ie_present(sc, where, size)
sc 1528 dev/isa/if_ie.c struct ie_softc *sc;
sc 1564 dev/isa/if_ie.c (sc->reset_586)(sc);
sc 1565 dev/isa/if_ie.c (sc->chan_attn)(sc);
sc 1586 dev/isa/if_ie.c (sc->reset_586)(sc);
sc 1587 dev/isa/if_ie.c (sc->chan_attn)(sc);
sc 1596 dev/isa/if_ie.c sc->sc_msize = size;
sc 1597 dev/isa/if_ie.c sc->sc_maddr = (caddr_t)realbase;
sc 1599 dev/isa/if_ie.c sc->iscp = iscp;
sc 1600 dev/isa/if_ie.c sc->scb = scb;
sc 1605 dev/isa/if_ie.c ie_ack(sc, IE_ST_WHENCE);
sc 1616 dev/isa/if_ie.c ie_find_mem_size(sc)
sc 1617 dev/isa/if_ie.c struct ie_softc *sc;
sc 1621 dev/isa/if_ie.c sc->sc_msize = 0;
sc 1624 dev/isa/if_ie.c if (check_ie_present(sc, sc->sc_maddr, size))
sc 1631 dev/isa/if_ie.c el_reset_586(sc)
sc 1632 dev/isa/if_ie.c struct ie_softc *sc;
sc 1642 dev/isa/if_ie.c sl_reset_586(sc)
sc 1643 dev/isa/if_ie.c struct ie_softc *sc;
sc 1650 dev/isa/if_ie.c ee16_reset_586(sc)
sc 1651 dev/isa/if_ie.c struct ie_softc *sc;
sc 1661 dev/isa/if_ie.c el_chan_attn(sc)
sc 1662 dev/isa/if_ie.c struct ie_softc *sc;
sc 1669 dev/isa/if_ie.c sl_chan_attn(sc)
sc 1670 dev/isa/if_ie.c struct ie_softc *sc;
sc 1677 dev/isa/if_ie.c ee16_chan_attn(sc)
sc 1678 dev/isa/if_ie.c struct ie_softc *sc;
sc 1684 dev/isa/if_ie.c ee16_read_eeprom(sc, location)
sc 1685 dev/isa/if_ie.c struct ie_softc *sc;
sc 1695 dev/isa/if_ie.c ee16_eeprom_outbits(sc, IEE16_EEPROM_READ, IEE16_EEPROM_OPSIZE1);
sc 1696 dev/isa/if_ie.c ee16_eeprom_outbits(sc, location, IEE16_EEPROM_ADDR_SIZE);
sc 1697 dev/isa/if_ie.c edata = ee16_eeprom_inbits(sc);
sc 1701 dev/isa/if_ie.c ee16_eeprom_clock(sc, 1);
sc 1702 dev/isa/if_ie.c ee16_eeprom_clock(sc, 0);
sc 1707 dev/isa/if_ie.c ee16_eeprom_outbits(sc, edata, count)
sc 1708 dev/isa/if_ie.c struct ie_softc *sc;
sc 1722 dev/isa/if_ie.c ee16_eeprom_clock(sc, 1);
sc 1723 dev/isa/if_ie.c ee16_eeprom_clock(sc, 0);
sc 1731 dev/isa/if_ie.c ee16_eeprom_inbits(sc)
sc 1732 dev/isa/if_ie.c struct ie_softc *sc;
sc 1740 dev/isa/if_ie.c ee16_eeprom_clock(sc, 1);
sc 1745 dev/isa/if_ie.c ee16_eeprom_clock(sc, 0);
sc 1751 dev/isa/if_ie.c ee16_eeprom_clock(sc, state)
sc 1752 dev/isa/if_ie.c struct ie_softc *sc;
sc 1767 dev/isa/if_ie.c ee16_interrupt_enable(sc)
sc 1768 dev/isa/if_ie.c struct ie_softc *sc;
sc 1771 dev/isa/if_ie.c outb(PORT + IEE16_IRQ, sc->irq_encoded | IEE16_IRQ_ENABLE);
sc 1775 dev/isa/if_ie.c slel_get_address(sc)
sc 1776 dev/isa/if_ie.c struct ie_softc *sc;
sc 1778 dev/isa/if_ie.c u_char *addr = sc->sc_arpcom.ac_enaddr;
sc 1786 dev/isa/if_ie.c iereset(sc)
sc 1787 dev/isa/if_ie.c struct ie_softc *sc;
sc 1791 dev/isa/if_ie.c iestop(sc);
sc 1796 dev/isa/if_ie.c if (command_and_wait(sc, IE_RU_ABORT | IE_CU_ABORT, 0, 0))
sc 1797 dev/isa/if_ie.c printf("%s: abort commands timed out\n", sc->sc_dev.dv_xname);
sc 1799 dev/isa/if_ie.c if (command_and_wait(sc, IE_RU_DISABLE | IE_CU_STOP, 0, 0))
sc 1800 dev/isa/if_ie.c printf("%s: disable commands timed out\n", sc->sc_dev.dv_xname);
sc 1802 dev/isa/if_ie.c ieinit(sc);
sc 1816 dev/isa/if_ie.c command_and_wait(sc, cmd, pcmd, mask)
sc 1817 dev/isa/if_ie.c struct ie_softc *sc;
sc 1823 dev/isa/if_ie.c volatile struct ie_sys_ctl_block *scb = sc->scb;
sc 1829 dev/isa/if_ie.c (sc->chan_attn)(sc);
sc 1850 dev/isa/if_ie.c (sc->chan_attn)(sc);
sc 1863 dev/isa/if_ie.c run_tdr(sc, cmd)
sc 1864 dev/isa/if_ie.c struct ie_softc *sc;
sc 1873 dev/isa/if_ie.c sc->scb->ie_command_list = MK_16(MEM, cmd);
sc 1876 dev/isa/if_ie.c if (command_and_wait(sc, IE_CU_START, cmd, IE_STAT_COMPL) ||
sc 1882 dev/isa/if_ie.c ie_ack(sc, IE_ST_WHENCE);
sc 1888 dev/isa/if_ie.c printf("%s: TDR command failed\n", sc->sc_dev.dv_xname);
sc 1890 dev/isa/if_ie.c printf("%s: transceiver problem\n", sc->sc_dev.dv_xname);
sc 1893 dev/isa/if_ie.c sc->sc_dev.dv_xname, result & IE_TDR_TIME);
sc 1896 dev/isa/if_ie.c sc->sc_dev.dv_xname, result & IE_TDR_TIME);
sc 1899 dev/isa/if_ie.c sc->sc_dev.dv_xname, result);
sc 1909 dev/isa/if_ie.c iememinit(ptr, sc)
sc 1911 dev/isa/if_ie.c struct ie_softc *sc;
sc 1917 dev/isa/if_ie.c sc->rframes[i] = ALLOC(ptr, sizeof(*sc->rframes[i]));
sc 1921 dev/isa/if_ie.c sc->rframes[i]->ie_fd_next =
sc 1922 dev/isa/if_ie.c MK_16(MEM, sc->rframes[(i + 1) % NFRAMES]);
sc 1925 dev/isa/if_ie.c sc->rframes[NFRAMES - 1]->ie_fd_last |= IE_FD_LAST;
sc 1933 dev/isa/if_ie.c sc->rbuffs[i] = ALLOC(ptr, sizeof(*sc->rbuffs[i]));
sc 1934 dev/isa/if_ie.c sc->rbuffs[i]->ie_rbd_length = IE_RBUF_SIZE;
sc 1935 dev/isa/if_ie.c sc->rbuffs[i]->ie_rbd_buffer = MK_24(MEM, ptr);
sc 1936 dev/isa/if_ie.c sc->cbuffs[i] = ALLOC(ptr, IE_RBUF_SIZE);
sc 1941 dev/isa/if_ie.c sc->rbuffs[i]->ie_rbd_next =
sc 1942 dev/isa/if_ie.c MK_16(MEM, sc->rbuffs[(i + 1) % NRXBUF]);
sc 1945 dev/isa/if_ie.c sc->rbuffs[NRXBUF - 1]->ie_rbd_length |= IE_RBD_LAST;
sc 1951 dev/isa/if_ie.c sc->rfhead = 0;
sc 1952 dev/isa/if_ie.c sc->rftail = NFRAMES - 1;
sc 1953 dev/isa/if_ie.c sc->rbhead = 0;
sc 1954 dev/isa/if_ie.c sc->rbtail = NRXBUF - 1;
sc 1956 dev/isa/if_ie.c sc->scb->ie_recv_list = MK_16(MEM, sc->rframes[0]);
sc 1957 dev/isa/if_ie.c sc->rframes[0]->ie_fd_buf_desc = MK_16(MEM, sc->rbuffs[0]);
sc 1964 dev/isa/if_ie.c sc->xmit_cmds[i] = ALLOC(ptr, sizeof(*sc->xmit_cmds[i]));
sc 1965 dev/isa/if_ie.c sc->xmit_buffs[i] = ALLOC(ptr, sizeof(*sc->xmit_buffs[i]));
sc 1969 dev/isa/if_ie.c sc->xmit_cbuffs[i] = ALLOC(ptr, IE_TBUF_SIZE);
sc 1972 dev/isa/if_ie.c sc->xchead = sc->xctail = 0;
sc 1975 dev/isa/if_ie.c sc->xmit_busy = 0;
sc 1983 dev/isa/if_ie.c mc_setup(sc, ptr)
sc 1984 dev/isa/if_ie.c struct ie_softc *sc;
sc 1993 dev/isa/if_ie.c bcopy((caddr_t)sc->mcast_addrs, (caddr_t)cmd->ie_mcast_addrs,
sc 1994 dev/isa/if_ie.c sc->mcast_count * sizeof *sc->mcast_addrs);
sc 1996 dev/isa/if_ie.c cmd->ie_mcast_bytes = sc->mcast_count * ETHER_ADDR_LEN; /* grrr... */
sc 1998 dev/isa/if_ie.c sc->scb->ie_command_list = MK_16(MEM, cmd);
sc 1999 dev/isa/if_ie.c if (command_and_wait(sc, IE_CU_START, cmd, IE_STAT_COMPL) ||
sc 2002 dev/isa/if_ie.c sc->sc_dev.dv_xname);
sc 2017 dev/isa/if_ie.c ieinit(sc)
sc 2018 dev/isa/if_ie.c struct ie_softc *sc;
sc 2020 dev/isa/if_ie.c volatile struct ie_sys_ctl_block *scb = sc->scb;
sc 2036 dev/isa/if_ie.c ie_setup_config(cmd, sc->promisc != 0,
sc 2037 dev/isa/if_ie.c sc->hard_type == IE_STARLAN10);
sc 2039 dev/isa/if_ie.c if (command_and_wait(sc, IE_CU_START, cmd, IE_STAT_COMPL) ||
sc 2042 dev/isa/if_ie.c sc->sc_dev.dv_xname);
sc 2058 dev/isa/if_ie.c bcopy(sc->sc_arpcom.ac_enaddr, (caddr_t)&cmd->ie_address,
sc 2061 dev/isa/if_ie.c if (command_and_wait(sc, IE_CU_START, cmd, IE_STAT_COMPL) ||
sc 2064 dev/isa/if_ie.c sc->sc_dev.dv_xname);
sc 2072 dev/isa/if_ie.c run_tdr(sc, ptr);
sc 2077 dev/isa/if_ie.c ie_ack(sc, IE_ST_WHENCE);
sc 2082 dev/isa/if_ie.c iememinit(ptr, sc);
sc 2084 dev/isa/if_ie.c sc->sc_arpcom.ac_if.if_flags |= IFF_RUNNING;
sc 2085 dev/isa/if_ie.c sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
sc 2087 dev/isa/if_ie.c sc->scb->ie_recv_list = MK_16(MEM, sc->rframes[0]);
sc 2088 dev/isa/if_ie.c command_and_wait(sc, IE_RU_START, 0, 0);
sc 2090 dev/isa/if_ie.c ie_ack(sc, IE_ST_WHENCE);
sc 2096 dev/isa/if_ie.c if(sc->hard_type == IE_EE16) {
sc 2101 dev/isa/if_ie.c ee16_interrupt_enable(sc);
sc 2102 dev/isa/if_ie.c ee16_chan_attn(sc);
sc 2109 dev/isa/if_ie.c iestop(sc)
sc 2110 dev/isa/if_ie.c struct ie_softc *sc;
sc 2113 dev/isa/if_ie.c command_and_wait(sc, IE_RU_DISABLE, 0, 0);
sc 2122 dev/isa/if_ie.c struct ie_softc *sc = ifp->if_softc;
sc 2129 dev/isa/if_ie.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 2142 dev/isa/if_ie.c ieinit(sc);
sc 2143 dev/isa/if_ie.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 2147 dev/isa/if_ie.c ieinit(sc);
sc 2153 dev/isa/if_ie.c sc->promisc = ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI);
sc 2160 dev/isa/if_ie.c iestop(sc);
sc 2168 dev/isa/if_ie.c ieinit(sc);
sc 2174 dev/isa/if_ie.c iestop(sc);
sc 2175 dev/isa/if_ie.c ieinit(sc);
sc 2179 dev/isa/if_ie.c sc->sc_debug = IED_ALL;
sc 2181 dev/isa/if_ie.c sc->sc_debug = 0;
sc 2188 dev/isa/if_ie.c ether_addmulti(ifr, &sc->sc_arpcom):
sc 2189 dev/isa/if_ie.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 2197 dev/isa/if_ie.c mc_reset(sc);
sc 2210 dev/isa/if_ie.c mc_reset(sc)
sc 2211 dev/isa/if_ie.c struct ie_softc *sc;
sc 2219 dev/isa/if_ie.c sc->mcast_count = 0;
sc 2220 dev/isa/if_ie.c ETHER_FIRST_MULTI(step, &sc->sc_arpcom, enm);
sc 2222 dev/isa/if_ie.c if (sc->mcast_count >= MAXMCAST ||
sc 2224 dev/isa/if_ie.c sc->sc_arpcom.ac_if.if_flags |= IFF_ALLMULTI;
sc 2225 dev/isa/if_ie.c ieioctl(&sc->sc_arpcom.ac_if, SIOCSIFFLAGS, (void *)0);
sc 2229 dev/isa/if_ie.c bcopy(enm->enm_addrlo, &sc->mcast_addrs[sc->mcast_count], 6);
sc 2230 dev/isa/if_ie.c sc->mcast_count++;
sc 2234 dev/isa/if_ie.c sc->want_mcsetup = 1;
sc 86 dev/isa/if_lc_isa.c lemac_isa_find(sc, ia, attach)
sc 87 dev/isa/if_lc_isa.c struct lemac_softc *sc;
sc 107 dev/isa/if_lc_isa.c sc->sc_iot = ia->ia_iot;
sc 114 dev/isa/if_lc_isa.c if (bus_space_map(sc->sc_iot, ia->ia_iobase, ia->ia_iosize, 0,
sc 115 dev/isa/if_lc_isa.c &sc->sc_ioh)) {
sc 126 dev/isa/if_lc_isa.c if (lemac_port_check(sc->sc_iot, sc->sc_ioh) == 0)
sc 132 dev/isa/if_lc_isa.c lemac_info_get(sc->sc_iot, sc->sc_ioh, &maddr, &msize, &irq);
sc 138 dev/isa/if_lc_isa.c sc->sc_memt = ia->ia_memt;
sc 140 dev/isa/if_lc_isa.c &sc->sc_memh)) {
sc 151 dev/isa/if_lc_isa.c printf("%s: overriding IRQ %d to %d\n", sc->sc_dv.dv_xname,
sc 155 dev/isa/if_lc_isa.c sc->sc_ats = shutdownhook_establish(lemac_shutdown, sc);
sc 156 dev/isa/if_lc_isa.c if (sc->sc_ats == NULL)
sc 159 dev/isa/if_lc_isa.c sc->sc_dv.dv_xname);
sc 161 dev/isa/if_lc_isa.c lemac_ifattach(sc);
sc 163 dev/isa/if_lc_isa.c sc->sc_ih = isa_intr_establish(ia->ia_ic, irq, IST_EDGE,
sc 164 dev/isa/if_lc_isa.c IPL_NET, lemac_intr, sc, sc->sc_dv.dv_xname);
sc 177 dev/isa/if_lc_isa.c bus_space_unmap(sc->sc_memt, sc->sc_memh, msize);
sc 180 dev/isa/if_lc_isa.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, LEMAC_IOSIZE);
sc 192 dev/isa/if_lc_isa.c struct lemac_softc sc;
sc 194 dev/isa/if_lc_isa.c snprintf(sc.sc_dv.dv_xname, sizeof sc.sc_dv.dv_xname, "%s%d",
sc 197 dev/isa/if_lc_isa.c return (lemac_isa_find(&sc, ia, 0));
sc 206 dev/isa/if_lc_isa.c struct lemac_softc *sc = (void *)self;
sc 209 dev/isa/if_lc_isa.c lemac_isa_find(sc, ia, 1);
sc 70 dev/isa/if_le.c le_isa_wrcsr(struct am7990_softc *sc, u_int16_t port, u_int16_t val)
sc 72 dev/isa/if_le.c struct le_softc *lesc = (struct le_softc *)sc;
sc 81 dev/isa/if_le.c le_isa_rdcsr(struct am7990_softc *sc, u_int16_t port)
sc 83 dev/isa/if_le.c struct le_softc *lesc = (struct le_softc *)sc;
sc 112 dev/isa/if_le_isa.c struct am7990_softc *sc = &lesc->sc_am7990;
sc 132 dev/isa/if_le_isa.c if (lance_isa_probe(sc) == 0) {
sc 174 dev/isa/if_le_isa.c printf("%s: address not found\n", sc->sc_dev.dv_xname);
sc 178 dev/isa/if_le_isa.c for (i = 0; i < sizeof(sc->sc_arpcom.ac_enaddr); i++)
sc 179 dev/isa/if_le_isa.c sc->sc_arpcom.ac_enaddr[i] = bus_space_read_1(iot, ioh, port);
sc 183 dev/isa/if_le_isa.c (sc->sc_arpcom.ac_enaddr[0] << 2) +
sc 184 dev/isa/if_le_isa.c (sc->sc_arpcom.ac_enaddr[1] << 10) +
sc 185 dev/isa/if_le_isa.c (sc->sc_arpcom.ac_enaddr[2] << 1) +
sc 186 dev/isa/if_le_isa.c (sc->sc_arpcom.ac_enaddr[3] << 9) +
sc 187 dev/isa/if_le_isa.c (sc->sc_arpcom.ac_enaddr[4] << 0) +
sc 188 dev/isa/if_le_isa.c (sc->sc_arpcom.ac_enaddr[5] << 8);
sc 197 dev/isa/if_le_isa.c sc->sc_dev.dv_xname, sum, rom_sum);
sc 214 dev/isa/if_le_isa.c struct am7990_softc *sc = &lesc->sc_am7990;
sc 228 dev/isa/if_le_isa.c if (lance_isa_probe(sc) == 0) {
sc 236 dev/isa/if_le_isa.c for (i = 0; i < sizeof(sc->sc_arpcom.ac_enaddr); i++)
sc 237 dev/isa/if_le_isa.c sc->sc_arpcom.ac_enaddr[i] = bus_space_read_1(iot, ioh, i);
sc 247 dev/isa/if_le_isa.c struct am7990_softc *sc = &lesc->sc_am7990;
sc 261 dev/isa/if_le_isa.c if (lance_isa_probe(sc) == 0) {
sc 269 dev/isa/if_le_isa.c for (i = 0; i < sizeof(sc->sc_arpcom.ac_enaddr); i++)
sc 270 dev/isa/if_le_isa.c sc->sc_arpcom.ac_enaddr[i] = bus_space_read_1(iot, ioh, i * 2);
sc 281 dev/isa/if_le_isa.c lance_isa_probe(struct am7990_softc *sc)
sc 285 dev/isa/if_le_isa.c le_isa_wrcsr(sc, LE_CSR0, LE_C0_STOP);
sc 288 dev/isa/if_le_isa.c if (le_isa_rdcsr(sc, LE_CSR0) != LE_C0_STOP)
sc 291 dev/isa/if_le_isa.c le_isa_wrcsr(sc, LE_CSR3, sc->sc_conf3);
sc 300 dev/isa/if_le_isa.c struct am7990_softc *sc = &lesc->sc_am7990;
sc 306 dev/isa/if_le_isa.c panic("%s: could not map I/O-ports", sc->sc_dev.dv_xname);
sc 316 dev/isa/if_le_isa.c mem = sc->sc_mem = ISA_HOLE_VADDR(ia->ia_maddr);
sc 325 dev/isa/if_le_isa.c sc->sc_dev.dv_xname);
sc 333 dev/isa/if_le_isa.c sc->sc_conf3 = LE_C3_ACON;
sc 334 dev/isa/if_le_isa.c sc->sc_addr = 0;
sc 335 dev/isa/if_le_isa.c sc->sc_memsize = ia->ia_msize;
sc 337 dev/isa/if_le_isa.c sc->sc_mem = malloc(16384, M_DEVBUF, M_NOWAIT);
sc 338 dev/isa/if_le_isa.c if (sc->sc_mem == 0) {
sc 340 dev/isa/if_le_isa.c sc->sc_dev.dv_xname);
sc 344 dev/isa/if_le_isa.c sc->sc_conf3 = 0;
sc 345 dev/isa/if_le_isa.c sc->sc_addr = kvtop(sc->sc_mem);
sc 346 dev/isa/if_le_isa.c sc->sc_memsize = 16384;
sc 349 dev/isa/if_le_isa.c sc->sc_copytodesc = am7990_copytobuf_contig;
sc 350 dev/isa/if_le_isa.c sc->sc_copyfromdesc = am7990_copyfrombuf_contig;
sc 351 dev/isa/if_le_isa.c sc->sc_copytobuf = am7990_copytobuf_contig;
sc 352 dev/isa/if_le_isa.c sc->sc_copyfrombuf = am7990_copyfrombuf_contig;
sc 353 dev/isa/if_le_isa.c sc->sc_zerobuf = am7990_zerobuf_contig;
sc 355 dev/isa/if_le_isa.c sc->sc_rdcsr = le_isa_rdcsr;
sc 356 dev/isa/if_le_isa.c sc->sc_wrcsr = le_isa_wrcsr;
sc 357 dev/isa/if_le_isa.c sc->sc_hwreset = NULL;
sc 358 dev/isa/if_le_isa.c sc->sc_hwinit = NULL;
sc 360 dev/isa/if_le_isa.c printf("%s", sc->sc_dev.dv_xname);
sc 361 dev/isa/if_le_isa.c am7990_config(sc);
sc 369 dev/isa/if_le_isa.c IPL_NET, le_isa_intredge, sc, sc->sc_dev.dv_xname);
sc 87 dev/isa/if_le_isapnp.c struct am7990_softc *sc = &lesc->sc_am7990;
sc 101 dev/isa/if_le_isapnp.c for (i = 0; i < sizeof(sc->sc_arpcom.ac_enaddr); i++)
sc 102 dev/isa/if_le_isapnp.c sc->sc_arpcom.ac_enaddr[i] = bus_space_read_1(iot, ioh, i);
sc 104 dev/isa/if_le_isapnp.c sc->sc_mem = malloc(16384, M_DEVBUF, M_NOWAIT);
sc 105 dev/isa/if_le_isapnp.c if (sc->sc_mem == 0) {
sc 110 dev/isa/if_le_isapnp.c sc->sc_conf3 = 0;
sc 111 dev/isa/if_le_isapnp.c sc->sc_addr = kvtop(sc->sc_mem);
sc 112 dev/isa/if_le_isapnp.c sc->sc_memsize = 16384;
sc 114 dev/isa/if_le_isapnp.c sc->sc_copytodesc = am7990_copytobuf_contig;
sc 115 dev/isa/if_le_isapnp.c sc->sc_copyfromdesc = am7990_copyfrombuf_contig;
sc 116 dev/isa/if_le_isapnp.c sc->sc_copytobuf = am7990_copytobuf_contig;
sc 117 dev/isa/if_le_isapnp.c sc->sc_copyfrombuf = am7990_copyfrombuf_contig;
sc 118 dev/isa/if_le_isapnp.c sc->sc_zerobuf = am7990_zerobuf_contig;
sc 120 dev/isa/if_le_isapnp.c sc->sc_rdcsr = le_isa_rdcsr;
sc 121 dev/isa/if_le_isapnp.c sc->sc_wrcsr = le_isa_wrcsr;
sc 122 dev/isa/if_le_isapnp.c sc->sc_hwreset = NULL;
sc 123 dev/isa/if_le_isapnp.c sc->sc_hwinit = NULL;
sc 125 dev/isa/if_le_isapnp.c am7990_config(sc);
sc 133 dev/isa/if_le_isapnp.c IPL_NET, le_isa_intredge, sc, sc->sc_dev.dv_xname);
sc 75 dev/isa/if_rln_isa.c struct rln_softc *sc = match;
sc 85 dev/isa/if_rln_isa.c sc->sc_iot = ia->ia_iot;
sc 86 dev/isa/if_rln_isa.c sc->sc_width = 0; /* Force width probe */
sc 87 dev/isa/if_rln_isa.c if (bus_space_map(sc->sc_iot, ia->ia_iobase, RLN_NPORTS, 0,
sc 88 dev/isa/if_rln_isa.c &sc->sc_ioh))
sc 91 dev/isa/if_rln_isa.c if (rln_reset(sc)) {
sc 92 dev/isa/if_rln_isa.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, RLN_NPORTS);
sc 105 dev/isa/if_rln_isa.c struct rln_softc *sc = (void *)self;
sc 132 dev/isa/if_rln_isa.c sc->sc_ih = isa_intr_establish(ia->ia_ic, irq, IST_EDGE,
sc 133 dev/isa/if_rln_isa.c IPL_NET, rlnintr, sc, sc->sc_dev.dv_xname);
sc 135 dev/isa/if_rln_isa.c if (sc->sc_ih == NULL)
sc 140 dev/isa/if_rln_isa.c sc->sc_irq = irq;
sc 141 dev/isa/if_rln_isa.c sc->sc_width = 0; /* re-probe width */
sc 143 dev/isa/if_rln_isa.c printf("%s: RangeLAN2 7100", sc->sc_dev.dv_xname);
sc 144 dev/isa/if_rln_isa.c rlnconfig(sc);
sc 168 dev/isa/if_sm_isa.c struct smc91cxx_softc *sc = &isc->sc_smc;
sc 179 dev/isa/if_sm_isa.c sc->sc_bst = iot;
sc 180 dev/isa/if_sm_isa.c sc->sc_bsh = ioh;
sc 183 dev/isa/if_sm_isa.c sc->sc_enabled = 1;
sc 188 dev/isa/if_sm_isa.c smc91cxx_attach(sc, NULL);
sc 192 dev/isa/if_sm_isa.c IPL_NET, smc91cxx_intr, sc, sc->sc_dev.dv_xname);
sc 195 dev/isa/if_sm_isa.c sc->sc_dev.dv_xname);
sc 340 dev/isa/if_we.c struct dp8390_softc *sc = &wsc->sc_dp8390;
sc 358 dev/isa/if_we.c sc->sc_dev.dv_xname);
sc 365 dev/isa/if_we.c sc->sc_dev.dv_xname);
sc 370 dev/isa/if_we.c &wsc->sc_16bitp, &sc->is790);
sc 373 dev/isa/if_we.c sc->sc_dev.dv_xname);
sc 385 dev/isa/if_we.c sc->sc_dev.dv_xname);
sc 400 dev/isa/if_we.c sc->sc_regt = nict;
sc 401 dev/isa/if_we.c sc->sc_regh = nich;
sc 403 dev/isa/if_we.c sc->sc_buft = memt;
sc 404 dev/isa/if_we.c sc->sc_bufh = memh;
sc 407 dev/isa/if_we.c sc->sc_enabled = 1;
sc 411 dev/isa/if_we.c sc->sc_reg_map[i] = i;
sc 415 dev/isa/if_we.c printf("%s: %s (%s-bit)", sc->sc_dev.dv_xname, typestr,
sc 420 dev/isa/if_we.c sc->sc_arpcom.ac_enaddr[i] =
sc 426 dev/isa/if_we.c if (sc->is790) {
sc 448 dev/isa/if_we.c if (sc->is790) {
sc 458 dev/isa/if_we.c sc->cr_proto = 0x00;
sc 473 dev/isa/if_we.c sc->cr_proto = ED_CR_RD2;
sc 488 dev/isa/if_we.c sc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS |
sc 491 dev/isa/if_we.c sc->test_mem = we_test_mem;
sc 492 dev/isa/if_we.c sc->ring_copy = we_ring_copy;
sc 493 dev/isa/if_we.c sc->write_mbuf = we_write_mbuf;
sc 494 dev/isa/if_we.c sc->read_hdr = we_read_hdr;
sc 495 dev/isa/if_we.c sc->recv_int = we_recv_int;
sc 497 dev/isa/if_we.c sc->sc_mediachange = we_mediachange;
sc 498 dev/isa/if_we.c sc->sc_mediastatus = we_mediastatus;
sc 500 dev/isa/if_we.c sc->mem_start = 0;
sc 501 dev/isa/if_we.c sc->mem_size = ia->ia_msize;
sc 503 dev/isa/if_we.c sc->sc_flags = self->dv_cfdata->cf_flags;
sc 507 dev/isa/if_we.c sc->sc_media_init = we_media_init;
sc 509 dev/isa/if_we.c sc->sc_media_init = dp8390_media_init;
sc 510 dev/isa/if_we.c if (dp8390_config(sc)) {
sc 532 dev/isa/if_we.c if (sc->is790)
sc 541 dev/isa/if_we.c sc->sc_dev.dv_xname, typestr);
sc 547 dev/isa/if_we.c IPL_NET, dp8390_intr, sc, sc->sc_dev.dv_xname);
sc 549 dev/isa/if_we.c printf("%s: can't establish interrupt\n", sc->sc_dev.dv_xname);
sc 553 dev/isa/if_we.c we_test_mem(struct dp8390_softc *sc)
sc 555 dev/isa/if_we.c struct we_softc *wsc = (struct we_softc *)sc;
sc 556 dev/isa/if_we.c bus_space_tag_t memt = sc->sc_buft;
sc 557 dev/isa/if_we.c bus_space_handle_t memh = sc->sc_bufh;
sc 558 dev/isa/if_we.c bus_size_t memsize = sc->mem_size;
sc 582 dev/isa/if_we.c sc->sc_dev.dv_xname, i);
sc 610 dev/isa/if_we.c we_write_mbuf(struct dp8390_softc *sc, struct mbuf *m, int buf)
sc 612 dev/isa/if_we.c struct we_softc *wsc = (struct we_softc *)sc;
sc 704 dev/isa/if_we.c we_ring_copy(struct dp8390_softc *sc, int src, caddr_t dst, u_short amount)
sc 706 dev/isa/if_we.c struct we_softc *wsc = (struct we_softc *)sc;
sc 710 dev/isa/if_we.c if (src + amount > sc->mem_end) {
sc 711 dev/isa/if_we.c tmp_amount = sc->mem_end - src;
sc 717 dev/isa/if_we.c src = sc->mem_ring;
sc 727 dev/isa/if_we.c we_read_hdr(struct dp8390_softc *sc, int packet_ptr,
sc 730 dev/isa/if_we.c struct we_softc *wsc = (struct we_softc *)sc;
sc 740 dev/isa/if_we.c we_recv_int(struct dp8390_softc *sc)
sc 742 dev/isa/if_we.c struct we_softc *wsc = (struct we_softc *)sc;
sc 745 dev/isa/if_we.c dp8390_rint(sc);
sc 750 dev/isa/if_we.c we_media_init(struct dp8390_softc *sc)
sc 752 dev/isa/if_we.c struct we_softc *wsc = (void *)sc;
sc 756 dev/isa/if_we.c if (sc->is790) {
sc 775 dev/isa/if_we.c ifmedia_init(&sc->sc_media, 0, dp8390_mediachange, dp8390_mediastatus);
sc 776 dev/isa/if_we.c ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_10_2, 0, NULL);
sc 777 dev/isa/if_we.c ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_10_5, 0, NULL);
sc 778 dev/isa/if_we.c ifmedia_set(&sc->sc_media, defmedia);
sc 782 dev/isa/if_we.c we_mediachange(struct dp8390_softc *sc)
sc 790 dev/isa/if_we.c dp8390_reset(sc);
sc 795 dev/isa/if_we.c we_mediastatus(struct dp8390_softc *sc, struct ifmediareq *ifmr)
sc 797 dev/isa/if_we.c struct ifmedia *ifm = &sc->sc_media;
sc 106 dev/isa/isa.c struct isa_softc *sc = (struct isa_softc *)self;
sc 112 dev/isa/isa.c sc->sc_iot = iba->iba_iot;
sc 113 dev/isa/isa.c sc->sc_memt = iba->iba_memt;
sc 115 dev/isa/isa.c sc->sc_dmat = iba->iba_dmat;
sc 117 dev/isa/isa.c sc->sc_ic = iba->iba_ic;
sc 120 dev/isa/isa.c isapnp_isa_attach_hook(sc);
sc 130 dev/isa/isa.c if (bus_space_map(sc->sc_iot, IO_DMA1, DMA1_IOSIZE, 0, &sc->sc_dma1h))
sc 132 dev/isa/isa.c if (bus_space_map(sc->sc_iot, IO_DMA2, DMA2_IOSIZE, 0, &sc->sc_dma2h))
sc 134 dev/isa/isa.c if (bus_space_map(sc->sc_iot, IO_DMAPG, 0xf, 0, &sc->sc_dmapgh))
sc 142 dev/isa/isa.c if (bus_space_subregion(sc->sc_iot, sc->sc_dmapgh, 0x04, 1,
sc 143 dev/isa/isa.c &sc->sc_delaybah))
sc 145 dev/isa/isa.c if (bus_space_map(sc->sc_iot, IO_DMAPG + 0x4, 0x1, 0,
sc 146 dev/isa/isa.c &sc->sc_delaybah))
sc 150 dev/isa/isa.c TAILQ_INIT(&sc->sc_subdevs);
sc 183 dev/isa/isa.c struct isa_softc *sc = (struct isa_softc *)parent;
sc 188 dev/isa/isa.c ia.ia_iot = sc->sc_iot;
sc 189 dev/isa/isa.c ia.ia_memt = sc->sc_memt;
sc 191 dev/isa/isa.c ia.ia_dmat = sc->sc_dmat;
sc 193 dev/isa/isa.c ia.ia_ic = sc->sc_ic;
sc 201 dev/isa/isa.c ia.ia_delaybah = sc->sc_delaybah;
sc 212 dev/isa/isa.c !isa_intr_check(sc->sc_ic, ia2.ia_irq, IST_EDGE)) {
sc 227 dev/isa/isa.c sc->sc_dev.dv_xname);
sc 234 dev/isa/isa.c ISA_DRQ_ALLOC((struct device *)sc, ia2.ia_drq);
sc 236 dev/isa/isa.c ISA_DRQ_ALLOC((struct device *)sc, ia2.ia_drq2);
sc 253 dev/isa/isa.c !isa_intr_check(sc->sc_ic, ia.ia_irq, IST_EDGE)) {
sc 266 dev/isa/isa.c ISA_DRQ_ALLOC((struct device *)sc, ia.ia_drq);
sc 268 dev/isa/isa.c ISA_DRQ_ALLOC((struct device *)sc, ia.ia_drq2);
sc 123 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)parent;
sc 130 dev/isa/isadma.c if ((bus_dmamap_create(sc->sc_dmat, sz, 1, sz, sz,
sc 146 dev/isa/isadma.c isa_dmaunmask(sc, chan)
sc 147 dev/isa/isadma.c struct isa_softc *sc;
sc 154 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
sc 157 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
sc 162 dev/isa/isadma.c isa_dmamask(sc, chan)
sc 163 dev/isa/isadma.c struct isa_softc *sc;
sc 170 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
sc 172 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
sc 175 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
sc 177 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
sc 191 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)isadev;
sc 195 dev/isa/isadma.c printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
sc 199 dev/isa/isadma.c if (ISA_DRQ_ISFREE(sc, chan) == 0) {
sc 200 dev/isa/isadma.c printf("%s: DRQ %d is not free\n", sc->sc_dev.dv_xname, chan);
sc 204 dev/isa/isadma.c ISA_DRQ_ALLOC(sc, chan);
sc 208 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma1h,
sc 211 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma2h,
sc 214 dev/isa/isadma.c isa_dmaunmask(sc, chan);
sc 228 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)isadev;
sc 232 dev/isa/isadma.c printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
sc 244 dev/isa/isadma.c if (ISA_DRQ_ISFREE(sc, chan) == 0) {
sc 245 dev/isa/isadma.c printf("%s: drq %d is not free\n", sc->sc_dev.dv_xname, chan);
sc 249 dev/isa/isadma.c ISA_DRQ_ALLOC(sc, chan);
sc 251 dev/isa/isadma.c return (bus_dmamap_create(sc->sc_dmat, size, 1, size, maxsize,
sc 252 dev/isa/isadma.c flags, &sc->sc_dmamaps[chan]));
sc 263 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)isadev;
sc 266 dev/isa/isadma.c printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
sc 270 dev/isa/isadma.c if (ISA_DRQ_ISFREE(sc, chan)) {
sc 272 dev/isa/isadma.c sc->sc_dev.dv_xname, chan);
sc 276 dev/isa/isadma.c ISA_DRQ_FREE(sc, chan);
sc 278 dev/isa/isadma.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamaps[chan]);
sc 299 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)isadev;
sc 312 dev/isa/isadma.c printf("%s: bogus drq %d\n", sc->sc_dev.dv_xname, chan);
sc 325 dev/isa/isadma.c sc->sc_dev.dv_xname, chan, nbytes, addr);
sc 331 dev/isa/isadma.c sc->sc_dev.dv_xname, chan, nbytes);
sc 336 dev/isa/isadma.c dmam = sc->sc_dmamaps[chan];
sc 340 dev/isa/isadma.c dmam = sc->sc_dmamaps[chan] = isadma_dmam[chan];
sc 346 dev/isa/isadma.c error = bus_dmamap_load(sc->sc_dmat, dmam, addr, nbytes, p,
sc 356 dev/isa/isadma.c bus_dmamap_sync(sc->sc_dmat, dmam, 0, dmam->dm_mapsize,
sc 358 dev/isa/isadma.c sc->sc_dmareads |= (1 << chan);
sc 360 dev/isa/isadma.c bus_dmamap_sync(sc->sc_dmat, dmam, 0, dmam->dm_mapsize,
sc 362 dev/isa/isadma.c sc->sc_dmareads &= ~(1 << chan);
sc 373 dev/isa/isadma.c sc->sc_dmalength[chan] = nbytes;
sc 375 dev/isa/isadma.c isa_dmamask(sc, chan);
sc 376 dev/isa/isadma.c sc->sc_dmafinished &= ~(1 << chan);
sc 380 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma1h, DMA1_MODE,
sc 385 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dmapgh,
sc 387 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport,
sc 389 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport,
sc 393 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport + 1,
sc 395 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma1h, waport + 1,
sc 399 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma2h, DMA2_MODE,
sc 404 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dmapgh,
sc 407 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport,
sc 409 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport,
sc 414 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport + 2,
sc 416 dev/isa/isadma.c bus_space_write_1(sc->sc_iot, sc->sc_dma2h, waport + 2,
sc 420 dev/isa/isadma.c isa_dmaunmask(sc, chan);
sc 432 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)isadev;
sc 435 dev/isa/isadma.c panic("isa_dmaabort: %s: bogus drq %d", sc->sc_dev.dv_xname,
sc 439 dev/isa/isadma.c isa_dmamask(sc, chan);
sc 440 dev/isa/isadma.c bus_dmamap_unload(sc->sc_dmat, sc->sc_dmamaps[chan]);
sc 441 dev/isa/isadma.c sc->sc_dmareads &= ~(1 << chan);
sc 449 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)isadev;
sc 455 dev/isa/isadma.c panic("isa_dmacount: %s: bogus drq %d", sc->sc_dev.dv_xname,
sc 459 dev/isa/isadma.c isa_dmamask(sc, chan);
sc 471 dev/isa/isadma.c nbytes = bus_space_read_1(sc->sc_iot, sc->sc_dma1h,
sc 473 dev/isa/isadma.c nbytes += bus_space_read_1(sc->sc_iot, sc->sc_dma1h,
sc 478 dev/isa/isadma.c nbytes = bus_space_read_1(sc->sc_iot, sc->sc_dma2h,
sc 480 dev/isa/isadma.c nbytes += bus_space_read_1(sc->sc_iot, sc->sc_dma2h,
sc 486 dev/isa/isadma.c if (nbytes == sc->sc_dmalength[chan])
sc 489 dev/isa/isadma.c isa_dmaunmask(sc, chan);
sc 498 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)isadev;
sc 501 dev/isa/isadma.c panic("isa_dmafinished: %s: bogus drq %d", sc->sc_dev.dv_xname,
sc 507 dev/isa/isadma.c sc->sc_dmafinished |= bus_space_read_1(sc->sc_iot,
sc 508 dev/isa/isadma.c sc->sc_dma1h, DMA1_SR) & 0x0f;
sc 510 dev/isa/isadma.c sc->sc_dmafinished |= (bus_space_read_1(sc->sc_iot,
sc 511 dev/isa/isadma.c sc->sc_dma2h, DMA2_SR) & 0x0f) << 4;
sc 513 dev/isa/isadma.c return ((sc->sc_dmafinished & (1 << chan)) != 0);
sc 521 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)isadev;
sc 525 dev/isa/isadma.c panic("isa_dmadone: %s: bogus drq %d", sc->sc_dev.dv_xname,
sc 529 dev/isa/isadma.c dmam = sc->sc_dmamaps[chan];
sc 531 dev/isa/isadma.c isa_dmamask(sc, chan);
sc 535 dev/isa/isadma.c sc->sc_dev.dv_xname, chan);
sc 537 dev/isa/isadma.c bus_dmamap_sync(sc->sc_dmat, dmam, 0, dmam->dm_mapsize,
sc 538 dev/isa/isadma.c (sc->sc_dmareads & (1 << chan)) ? BUS_DMASYNC_POSTREAD :
sc 541 dev/isa/isadma.c bus_dmamap_unload(sc->sc_dmat, dmam);
sc 542 dev/isa/isadma.c sc->sc_dmareads &= ~(1 << chan);
sc 553 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)isadev;
sc 559 dev/isa/isadma.c sc->sc_dev.dv_xname, chan);
sc 566 dev/isa/isadma.c error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, boundary,
sc 582 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)isadev;
sc 587 dev/isa/isadma.c sc->sc_dev.dv_xname, chan);
sc 593 dev/isa/isadma.c bus_dmamem_free(sc->sc_dmat, &seg, 1);
sc 605 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)isadev;
sc 609 dev/isa/isadma.c panic("isa_dmamem_map: %s: bogus drq %d", sc->sc_dev.dv_xname,
sc 616 dev/isa/isadma.c return (bus_dmamem_map(sc->sc_dmat, &seg, 1, size, kvap, flags));
sc 626 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)isadev;
sc 630 dev/isa/isadma.c sc->sc_dev.dv_xname, chan);
sc 633 dev/isa/isadma.c bus_dmamem_unmap(sc->sc_dmat, kva, size);
sc 644 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)isadev;
sc 648 dev/isa/isadma.c panic("isa_dmamem_mmap: %s: bogus drq %d", sc->sc_dev.dv_xname,
sc 658 dev/isa/isadma.c return (bus_dmamem_mmap(sc->sc_dmat, &seg, 1, off, prot, flags));
sc 666 dev/isa/isadma.c struct isa_softc *sc = (struct isa_softc *)isadev;
sc 668 dev/isa/isadma.c panic("isa_drq_isfree: %s: bogus drq %d", sc->sc_dev.dv_xname,
sc 671 dev/isa/isadma.c return ISA_DRQ_ISFREE(sc, chan);
sc 94 dev/isa/isagpio.c struct isagpio_softc *sc = (void *)self;
sc 100 dev/isa/isagpio.c &sc->sc_ioh) != 0) {
sc 107 dev/isa/isagpio.c sc->sc_iot = ia->ia_iot;
sc 108 dev/isa/isagpio.c sc->sc_gpio_mask = 0;
sc 111 dev/isa/isagpio.c sc->sc_gpio_pins[i].pin_num = i;
sc 112 dev/isa/isagpio.c sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
sc 113 dev/isa/isagpio.c sc->sc_gpio_pins[i].pin_state = GPIO_PIN_LOW;
sc 116 dev/isa/isagpio.c sc->sc_gpio_gc.gp_cookie = sc;
sc 117 dev/isa/isagpio.c sc->sc_gpio_gc.gp_pin_read = isagpio_pin_read;
sc 118 dev/isa/isagpio.c sc->sc_gpio_gc.gp_pin_write = isagpio_pin_write;
sc 119 dev/isa/isagpio.c sc->sc_gpio_gc.gp_pin_ctl = isagpio_pin_ctl;
sc 122 dev/isa/isagpio.c gba.gba_gc = &sc->sc_gpio_gc;
sc 123 dev/isa/isagpio.c gba.gba_pins = sc->sc_gpio_pins;
sc 126 dev/isa/isagpio.c (void)config_found(&sc->sc_dev, &gba, gpiobus_print);
sc 132 dev/isa/isagpio.c struct isagpio_softc *sc = arg;
sc 135 dev/isa/isagpio.c mask = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 0);
sc 142 dev/isa/isagpio.c struct isagpio_softc *sc = arg;
sc 145 dev/isa/isagpio.c sc->sc_gpio_mask &= ~(0x01 << pin);
sc 147 dev/isa/isagpio.c sc->sc_gpio_mask |= 0x01 << pin;
sc 148 dev/isa/isagpio.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, 0, sc->sc_gpio_mask);
sc 95 dev/isa/isapnp.c isapnp_init(sc)
sc 96 dev/isa/isapnp.c struct isapnp_softc *sc;
sc 102 dev/isa/isapnp.c ISAPNP_WRITE_ADDR(sc, 0);
sc 103 dev/isa/isapnp.c ISAPNP_WRITE_ADDR(sc, 0);
sc 107 dev/isa/isapnp.c ISAPNP_WRITE_ADDR(sc, v);
sc 117 dev/isa/isapnp.c isapnp_shift_bit(sc)
sc 118 dev/isa/isapnp.c struct isapnp_softc *sc;
sc 123 dev/isa/isapnp.c c1 = ISAPNP_READ_DATA(sc);
sc 125 dev/isa/isapnp.c c2 = ISAPNP_READ_DATA(sc);
sc 140 dev/isa/isapnp.c isapnp_findcard(sc)
sc 141 dev/isa/isapnp.c struct isapnp_softc *sc;
sc 146 dev/isa/isapnp.c if (sc->sc_ncards == ISAPNP_MAX_CARDS) {
sc 147 dev/isa/isapnp.c printf("%s: Too many pnp cards\n", sc->sc_dev.dv_xname);
sc 152 dev/isa/isapnp.c isapnp_write_reg(sc, ISAPNP_WAKE, 0);
sc 153 dev/isa/isapnp.c isapnp_write_reg(sc, ISAPNP_SET_RD_PORT, sc->sc_read_port >> 2);
sc 154 dev/isa/isapnp.c sc->sc_read_port |= 3;
sc 157 dev/isa/isapnp.c ISAPNP_WRITE_ADDR(sc, ISAPNP_SERIAL_ISOLATION);
sc 164 dev/isa/isapnp.c u_char neg = isapnp_shift_bit(sc);
sc 170 dev/isa/isapnp.c sc->sc_id[sc->sc_ncards][i] = w;
sc 175 dev/isa/isapnp.c u_char neg = isapnp_shift_bit(sc);
sc 180 dev/isa/isapnp.c sc->sc_id[sc->sc_ncards][8] = csum;
sc 183 dev/isa/isapnp.c sc->sc_ncards++;
sc 184 dev/isa/isapnp.c isapnp_write_reg(sc, ISAPNP_CARD_SELECT_NUM, sc->sc_ncards);
sc 399 dev/isa/isapnp.c isapnp_bestconfig(isa, sc, ipa)
sc 401 dev/isa/isapnp.c struct isapnp_softc *sc;
sc 423 dev/isa/isapnp.c error = isapnp_testconfig(sc->sc_iot, sc->sc_memt, best, 0);
sc 647 dev/isa/isapnp.c isapnp_find(sc, all)
sc 648 dev/isa/isapnp.c struct isapnp_softc *sc;
sc 653 dev/isa/isapnp.c isapnp_init(sc);
sc 655 dev/isa/isapnp.c isapnp_write_reg(sc, ISAPNP_CONFIG_CONTROL, ISAPNP_CC_RESET_DRV);
sc 658 dev/isa/isapnp.c isapnp_init(sc);
sc 662 dev/isa/isapnp.c sc->sc_read_port = p;
sc 663 dev/isa/isapnp.c if (isapnp_map_readport(sc))
sc 665 dev/isa/isapnp.c DPRINTF(("%s: Trying port %x\n", sc->sc_dev.dv_xname, p));
sc 666 dev/isa/isapnp.c if (isapnp_findcard(sc))
sc 668 dev/isa/isapnp.c isapnp_unmap_readport(sc);
sc 672 dev/isa/isapnp.c sc->sc_read_port = 0;
sc 677 dev/isa/isapnp.c while (isapnp_findcard(sc))
sc 690 dev/isa/isapnp.c isapnp_configure(sc, ipa)
sc 691 dev/isa/isapnp.c struct isapnp_softc *sc;
sc 719 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 721 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 731 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 733 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 736 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 739 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 752 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 773 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 785 dev/isa/isapnp.c isapnp_write_reg(sc, isapnp_drq_range[i], v);
sc 794 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 797 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 800 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 803 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 807 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 810 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 813 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 816 dev/isa/isapnp.c isapnp_write_reg(sc,
sc 833 dev/isa/isapnp.c struct isapnp_softc sc;
sc 835 dev/isa/isapnp.c bzero(&sc, sizeof sc);
sc 836 dev/isa/isapnp.c sc.sc_iot = isa_sc->sc_iot;
sc 837 dev/isa/isapnp.c sc.sc_ncards = 0;
sc 839 dev/isa/isapnp.c if (isapnp_map(&sc))
sc 842 dev/isa/isapnp.c isapnp_init(&sc);
sc 844 dev/isa/isapnp.c isapnp_write_reg(&sc, ISAPNP_CONFIG_CONTROL, ISAPNP_CC_RESET_DRV);
sc 847 dev/isa/isapnp.c isapnp_unmap(&sc);
sc 860 dev/isa/isapnp.c struct isapnp_softc sc;
sc 863 dev/isa/isapnp.c sc.sc_iot = ia->ia_iot;
sc 864 dev/isa/isapnp.c sc.sc_ncards = 0;
sc 865 dev/isa/isapnp.c (void) strlcpy(sc.sc_dev.dv_xname, "(isapnp probe)",
sc 866 dev/isa/isapnp.c sizeof sc.sc_dev.dv_xname);
sc 868 dev/isa/isapnp.c if (isapnp_map(&sc))
sc 871 dev/isa/isapnp.c rv = isapnp_find(&sc, 0);
sc 875 dev/isa/isapnp.c isapnp_unmap(&sc);
sc 877 dev/isa/isapnp.c isapnp_unmap_readport(&sc);
sc 891 dev/isa/isapnp.c struct isapnp_softc *sc = (struct isapnp_softc *) self;
sc 896 dev/isa/isapnp.c sc->sc_iot = ia->ia_iot;
sc 897 dev/isa/isapnp.c sc->sc_memt = ia->ia_memt;
sc 899 dev/isa/isapnp.c sc->sc_dmat = ia->ia_dmat;
sc 901 dev/isa/isapnp.c sc->sc_ncards = 0;
sc 903 dev/isa/isapnp.c if (isapnp_map(sc))
sc 904 dev/isa/isapnp.c panic("%s: bus map failed", sc->sc_dev.dv_xname);
sc 906 dev/isa/isapnp.c if (!isapnp_find(sc, 1)) {
sc 911 dev/isa/isapnp.c printf(": read port 0x%x\n", sc->sc_read_port);
sc 913 dev/isa/isapnp.c for (c = 0; c < sc->sc_ncards; c++) {
sc 917 dev/isa/isapnp.c isapnp_write_reg(sc, ISAPNP_WAKE, c + 1);
sc 919 dev/isa/isapnp.c if ((ipa = isapnp_get_resource(sc, c, ia)) == NULL)
sc 924 dev/isa/isapnp.c (lpa = isapnp_bestconfig(parent, sc, &ipa)) != NULL; d++) {
sc 925 dev/isa/isapnp.c isapnp_write_reg(sc, ISAPNP_LOGICAL_DEV_NUM, d);
sc 926 dev/isa/isapnp.c isapnp_configure(sc, lpa);
sc 931 dev/isa/isapnp.c isapnp_get_config(sc, &pa);
sc 937 dev/isa/isapnp.c sc->sc_dev.dv_xname,
sc 955 dev/isa/isapnp.c isapnp_write_reg(sc, ISAPNP_ACTIVATE, 1);
sc 966 dev/isa/isapnp.c isapnp_write_reg(sc, ISAPNP_ACTIVATE, 0);
sc 970 dev/isa/isapnp.c isapnp_write_reg(sc, ISAPNP_WAKE, 0); /* Good night cards */
sc 249 dev/isa/isapnpdebug.c isapnp_get_config(sc, pa)
sc 250 dev/isa/isapnpdebug.c struct isapnp_softc *sc;
sc 267 dev/isa/isapnpdebug.c v0 = isapnp_read_reg(sc,
sc 269 dev/isa/isapnpdebug.c v1 = isapnp_read_reg(sc,
sc 279 dev/isa/isapnpdebug.c v0 = isapnp_read_reg(sc,
sc 281 dev/isa/isapnpdebug.c v1 = isapnp_read_reg(sc,
sc 287 dev/isa/isapnpdebug.c v0 = isapnp_read_reg(sc,
sc 289 dev/isa/isapnpdebug.c v1 = isapnp_read_reg(sc,
sc 292 dev/isa/isapnpdebug.c v0 = isapnp_read_reg(sc,
sc 303 dev/isa/isapnpdebug.c v0 = isapnp_read_reg(sc,
sc 328 dev/isa/isapnpdebug.c v0 = isapnp_read_reg(sc, isapnp_drq_range[i]);
sc 338 dev/isa/isapnpdebug.c v0 = isapnp_read_reg(sc,
sc 340 dev/isa/isapnpdebug.c v1 = isapnp_read_reg(sc,
sc 342 dev/isa/isapnpdebug.c v2 = isapnp_read_reg(sc,
sc 344 dev/isa/isapnpdebug.c v3 = isapnp_read_reg(sc,
sc 350 dev/isa/isapnpdebug.c v0 = isapnp_read_reg(sc,
sc 352 dev/isa/isapnpdebug.c v1 = isapnp_read_reg(sc,
sc 354 dev/isa/isapnpdebug.c v2 = isapnp_read_reg(sc,
sc 356 dev/isa/isapnpdebug.c v3 = isapnp_read_reg(sc,
sc 359 dev/isa/isapnpdebug.c v0 = isapnp_read_reg(sc,
sc 71 dev/isa/isapnpres.c isapnp_wait_status(sc)
sc 72 dev/isa/isapnpres.c struct isapnp_softc *sc;
sc 78 dev/isa/isapnpres.c if (isapnp_read_reg(sc, ISAPNP_STATUS) & 1)
sc 440 dev/isa/isapnpres.c isapnp_get_resource(sc, c, template)
sc 441 dev/isa/isapnpres.c struct isapnp_softc *sc;
sc 458 dev/isa/isapnpres.c if (isapnp_wait_status(sc)) \
sc 460 dev/isa/isapnpres.c d = isapnp_read_reg(sc, ISAPNP_RESOURCE_DATA)
sc 465 dev/isa/isapnpres.c if (d != sc->sc_id[c][i] && i != ISAPNP_SERIAL_SIZE - 1) {
sc 468 dev/isa/isapnpres.c sc->sc_dev.dv_xname, c + 1, i);
sc 506 dev/isa/isapnpres.c sc->sc_dev.dv_xname, c + 1);
sc 514 dev/isa/isapnpres.c sc->sc_dev.dv_xname, c + 1);
sc 528 dev/isa/isapnpres.c printf("%s: %s, card %d\n", sc->sc_dev.dv_xname,
sc 158 dev/isa/isavar.h # define ISAPNP_WRITE_ADDR(sc, v) \
sc 159 dev/isa/isavar.h bus_space_write_1(sc->sc_iot, sc->sc_addr_ioh, 0, v)
sc 160 dev/isa/isavar.h # define ISAPNP_WRITE_DATA(sc, v) \
sc 161 dev/isa/isavar.h bus_space_write_1(sc->sc_iot, sc->sc_wrdata_ioh, 0, v)
sc 162 dev/isa/isavar.h # define ISAPNP_READ_DATA(sc) \
sc 163 dev/isa/isavar.h bus_space_read_1(sc->sc_iot, sc->sc_read_ioh, 0)
sc 418 dev/isa/isavar.h isapnp_write_reg(sc, r, v)
sc 419 dev/isa/isavar.h struct isapnp_softc *sc;
sc 423 dev/isa/isavar.h ISAPNP_WRITE_ADDR(sc, r);
sc 424 dev/isa/isavar.h ISAPNP_WRITE_DATA(sc, v);
sc 428 dev/isa/isavar.h isapnp_read_reg(sc, r)
sc 429 dev/isa/isavar.h struct isapnp_softc *sc;
sc 432 dev/isa/isavar.h ISAPNP_WRITE_ADDR(sc, r);
sc 433 dev/isa/isavar.h return ISAPNP_READ_DATA(sc);
sc 130 dev/isa/it.c struct it_softc *sc = (void *)self;
sc 138 dev/isa/it.c iot = sc->it_iot = ia->ia_iot;
sc 140 dev/isa/it.c if (bus_space_map(iot, iobase, 8, 0, &sc->it_ioh)) {
sc 145 dev/isa/it.c i = it_readreg(sc, ITD_CHIPID);
sc 152 dev/isa/it.c sc->numsensors = IT_NUM_SENSORS;
sc 154 dev/isa/it.c it_setup_fan(sc, 0, 3);
sc 155 dev/isa/it.c it_setup_volt(sc, 3, 9);
sc 156 dev/isa/it.c it_setup_temp(sc, 12, 3);
sc 158 dev/isa/it.c if (sensor_task_register(sc, it_refresh, 5) == NULL) {
sc 160 dev/isa/it.c sc->sc_dev.dv_xname);
sc 165 dev/isa/it.c cr = it_readreg(sc, ITD_CONFIG);
sc 167 dev/isa/it.c it_writereg(sc, ITD_CONFIG, cr);
sc 170 dev/isa/it.c strlcpy(sc->sensordev.xname, sc->sc_dev.dv_xname,
sc 171 dev/isa/it.c sizeof(sc->sensordev.xname));
sc 172 dev/isa/it.c for (i = 0; i < sc->numsensors; ++i)
sc 173 dev/isa/it.c sensor_attach(&sc->sensordev, &sc->sensors[i]);
sc 174 dev/isa/it.c sensordev_install(&sc->sensordev);
sc 178 dev/isa/it.c it_readreg(struct it_softc *sc, int reg)
sc 180 dev/isa/it.c bus_space_write_1(sc->it_iot, sc->it_ioh, ITC_ADDR, reg);
sc 181 dev/isa/it.c return (bus_space_read_1(sc->it_iot, sc->it_ioh, ITC_DATA));
sc 185 dev/isa/it.c it_writereg(struct it_softc *sc, int reg, int val)
sc 187 dev/isa/it.c bus_space_write_1(sc->it_iot, sc->it_ioh, ITC_ADDR, reg);
sc 188 dev/isa/it.c bus_space_write_1(sc->it_iot, sc->it_ioh, ITC_DATA, val);
sc 192 dev/isa/it.c it_setup_volt(struct it_softc *sc, int start, int n)
sc 197 dev/isa/it.c sc->sensors[start + i].type = SENSOR_VOLTS_DC;
sc 200 dev/isa/it.c snprintf(sc->sensors[start + 0].desc, sizeof(sc->sensors[0].desc),
sc 202 dev/isa/it.c snprintf(sc->sensors[start + 1].desc, sizeof(sc->sensors[1].desc),
sc 204 dev/isa/it.c snprintf(sc->sensors[start + 2].desc, sizeof(sc->sensors[2].desc),
sc 206 dev/isa/it.c snprintf(sc->sensors[start + 3].desc, sizeof(sc->sensors[3].desc),
sc 208 dev/isa/it.c snprintf(sc->sensors[start + 4].desc, sizeof(sc->sensors[4].desc),
sc 210 dev/isa/it.c snprintf(sc->sensors[start + 5].desc, sizeof(sc->sensors[5].desc),
sc 212 dev/isa/it.c snprintf(sc->sensors[start + 6].desc, sizeof(sc->sensors[6].desc),
sc 214 dev/isa/it.c snprintf(sc->sensors[start + 7].desc, sizeof(sc->sensors[7].desc),
sc 216 dev/isa/it.c snprintf(sc->sensors[start + 8].desc, sizeof(sc->sensors[8].desc),
sc 221 dev/isa/it.c it_setup_temp(struct it_softc *sc, int start, int n)
sc 226 dev/isa/it.c sc->sensors[start + i].type = SENSOR_TEMP;
sc 230 dev/isa/it.c it_setup_fan(struct it_softc *sc, int start, int n)
sc 235 dev/isa/it.c sc->sensors[start + i].type = SENSOR_FANRPM;
sc 239 dev/isa/it.c it_generic_stemp(struct it_softc *sc, struct ksensor *sensors)
sc 244 dev/isa/it.c sdata = it_readreg(sc, ITD_SENSORTEMPBASE + i);
sc 251 dev/isa/it.c it_generic_svolt(struct it_softc *sc, struct ksensor *sensors)
sc 256 dev/isa/it.c sdata = it_readreg(sc, ITD_SENSORVOLTBASE + i);
sc 273 dev/isa/it.c it_generic_fanrpm(struct it_softc *sc, struct ksensor *sensors)
sc 277 dev/isa/it.c odivisor = ndivisor = divisor = it_readreg(sc, ITD_FAN);
sc 280 dev/isa/it.c if ((sdata = it_readreg(sc, ITD_SENSORFANBASE + i)) == 0xff) {
sc 297 dev/isa/it.c it_writereg(sc, ITD_FAN, ndivisor);
sc 305 dev/isa/it.c it_refresh_sensor_data(struct it_softc *sc)
sc 308 dev/isa/it.c it_generic_stemp(sc, &sc->sensors[12]);
sc 309 dev/isa/it.c it_generic_svolt(sc, &sc->sensors[3]);
sc 310 dev/isa/it.c it_generic_fanrpm(sc, &sc->sensors[0]);
sc 316 dev/isa/it.c struct it_softc *sc = (struct it_softc *)arg;
sc 318 dev/isa/it.c it_refresh_sensor_data(sc);
sc 137 dev/isa/lm78_isa.c struct lm_isa_softc *sc = (struct lm_isa_softc *)self;
sc 144 dev/isa/lm78_isa.c sc->sc_iot = ia->ia_iot;
sc 147 dev/isa/lm78_isa.c if (bus_space_map(sc->sc_iot, iobase, 8, 0, &sc->sc_ioh)) {
sc 153 dev/isa/lm78_isa.c sc->sc_lmsc.lm_writereg = lm_isa_writereg;
sc 154 dev/isa/lm78_isa.c sc->sc_lmsc.lm_readreg = lm_isa_readreg;
sc 155 dev/isa/lm78_isa.c lm_attach(&sc->sc_lmsc);
sc 166 dev/isa/lm78_isa.c sbusaddr = lm_isa_readreg(&sc->sc_lmsc, LM_SBUSADDR);
sc 172 dev/isa/lm78_isa.c if (lmsc == &sc->sc_lmsc)
sc 175 dev/isa/lm78_isa.c lmsc->chipid == sc->sc_lmsc.chipid)
sc 183 dev/isa/lm78_isa.c struct lm_isa_softc *sc = (struct lm_isa_softc *)lmsc;
sc 185 dev/isa/lm78_isa.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, LMC_ADDR, reg);
sc 186 dev/isa/lm78_isa.c return (bus_space_read_1(sc->sc_iot, sc->sc_ioh, LMC_DATA));
sc 192 dev/isa/lm78_isa.c struct lm_isa_softc *sc = (struct lm_isa_softc *)lmsc;
sc 194 dev/isa/lm78_isa.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, LMC_ADDR, reg);
sc 195 dev/isa/lm78_isa.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, LMC_DATA, val);
sc 101 dev/isa/lpt_isa.c struct isa_softc *sc = (struct isa_softc *)parent;
sc 159 dev/isa/lpt_isa.c !isa_intr_check(sc->sc_ic, ia->ia_irq, IST_EDGE))
sc 177 dev/isa/lpt_isa.c struct lpt_softc *sc = (void *)self;
sc 180 dev/isa/lpt_isa.c sc->sc_state = 0;
sc 181 dev/isa/lpt_isa.c sc->sc_iot = ia->ia_iot;
sc 182 dev/isa/lpt_isa.c if (bus_space_map(sc->sc_iot, ia->ia_iobase, ia->ia_iosize, 0,
sc 183 dev/isa/lpt_isa.c &sc->sc_ioh))
sc 187 dev/isa/lpt_isa.c sc->sc_flags |= LPT_POLLED;
sc 191 dev/isa/lpt_isa.c lpt_attach_common(sc);
sc 194 dev/isa/lpt_isa.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 195 dev/isa/lpt_isa.c IPL_TTY, lptintr, sc, sc->sc_dev.dv_xname);
sc 88 dev/isa/mcd.c #define MCD_TRACE(fmt,a,b,c,d) {if (sc->debug) {printf("%s: st=%02x: ", sc->sc_dev.dv_xname, sc->status); printf(fmt,a,b,c,d);}}
sc 245 dev/isa/mcd.c struct mcd_softc *sc = (void *)self;
sc 257 dev/isa/mcd.c sc->sc_iot = iot;
sc 258 dev/isa/mcd.c sc->sc_ioh = ioh;
sc 260 dev/isa/mcd.c sc->probe = 0;
sc 261 dev/isa/mcd.c sc->debug = 0;
sc 263 dev/isa/mcd.c if (!mcd_find(iot, ioh, sc)) {
sc 268 dev/isa/mcd.c timeout_set(&sc->sc_pi_tmo, mcd_pseudointr, sc);
sc 273 dev/isa/mcd.c sc->sc_dk.dk_driver = &mcddkdriver;
sc 274 dev/isa/mcd.c sc->sc_dk.dk_name = sc->sc_dev.dv_xname;
sc 275 dev/isa/mcd.c disk_attach(&sc->sc_dk);
sc 277 dev/isa/mcd.c printf(": model %s\n", sc->type != 0 ? sc->type : "unknown");
sc 279 dev/isa/mcd.c (void) mcd_setlock(sc, MCD_LK_UNLOCK);
sc 286 dev/isa/mcd.c (void) mcd_send(sc, &mbx, 0);
sc 288 dev/isa/mcd.c mcd_soft_reset(sc);
sc 290 dev/isa/mcd.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 291 dev/isa/mcd.c IPL_BIO, mcdintr, sc, sc->sc_dev.dv_xname);
sc 301 dev/isa/mcd.c mcdlock(sc)
sc 302 dev/isa/mcd.c struct mcd_softc *sc;
sc 306 dev/isa/mcd.c while ((sc->flags & MCDF_LOCKED) != 0) {
sc 307 dev/isa/mcd.c sc->flags |= MCDF_WANTED;
sc 308 dev/isa/mcd.c if ((error = tsleep(sc, PRIBIO | PCATCH, "mcdlck", 0)) != 0)
sc 311 dev/isa/mcd.c sc->flags |= MCDF_LOCKED;
sc 319 dev/isa/mcd.c mcdunlock(sc)
sc 320 dev/isa/mcd.c struct mcd_softc *sc;
sc 323 dev/isa/mcd.c sc->flags &= ~MCDF_LOCKED;
sc 324 dev/isa/mcd.c if ((sc->flags & MCDF_WANTED) != 0) {
sc 325 dev/isa/mcd.c sc->flags &= ~MCDF_WANTED;
sc 326 dev/isa/mcd.c wakeup(sc);
sc 338 dev/isa/mcd.c struct mcd_softc *sc;
sc 343 dev/isa/mcd.c sc = mcd_cd.cd_devs[unit];
sc 344 dev/isa/mcd.c if (!sc)
sc 347 dev/isa/mcd.c if ((error = mcdlock(sc)) != 0)
sc 350 dev/isa/mcd.c if (sc->sc_dk.dk_openmask != 0) {
sc 355 dev/isa/mcd.c if ((sc->flags & MCDF_LOADED) == 0) {
sc 365 dev/isa/mcd.c (void) mcd_setlock(sc, MCD_LK_LOCK);
sc 367 dev/isa/mcd.c if ((sc->flags & MCDF_LOADED) == 0) {
sc 369 dev/isa/mcd.c sc->lastmode = MCD_MD_UNKNOWN;
sc 370 dev/isa/mcd.c sc->lastupc = MCD_UPC_UNKNOWN;
sc 372 dev/isa/mcd.c sc->flags |= MCDF_LOADED;
sc 375 dev/isa/mcd.c if ((error = mcd_setmode(sc, MCD_MD_COOKED)) != 0)
sc 379 dev/isa/mcd.c if (mcd_get_parms(sc) != 0) {
sc 385 dev/isa/mcd.c if ((error = mcd_read_toc(sc)) != 0)
sc 389 dev/isa/mcd.c mcdgetdisklabel(dev, sc, sc->sc_dk.dk_label, 0);
sc 394 dev/isa/mcd.c sc->disksize, sc->blksize, 0);
sc 400 dev/isa/mcd.c (part >= sc->sc_dk.dk_label->d_npartitions ||
sc 401 dev/isa/mcd.c sc->sc_dk.dk_label->d_partitions[part].p_fstype == FS_UNUSED)) {
sc 409 dev/isa/mcd.c sc->sc_dk.dk_copenmask |= (1 << part);
sc 412 dev/isa/mcd.c sc->sc_dk.dk_bopenmask |= (1 << part);
sc 415 dev/isa/mcd.c sc->sc_dk.dk_openmask = sc->sc_dk.dk_copenmask | sc->sc_dk.dk_bopenmask;
sc 417 dev/isa/mcd.c mcdunlock(sc);
sc 421 dev/isa/mcd.c sc->flags &= ~MCDF_LOADED;
sc 424 dev/isa/mcd.c if (sc->sc_dk.dk_openmask == 0) {
sc 426 dev/isa/mcd.c (void) mcd_setmode(sc, MCD_MD_SLEEP);
sc 428 dev/isa/mcd.c (void) mcd_setlock(sc, MCD_LK_UNLOCK);
sc 432 dev/isa/mcd.c mcdunlock(sc);
sc 442 dev/isa/mcd.c struct mcd_softc *sc = mcd_cd.cd_devs[DISKUNIT(dev)];
sc 448 dev/isa/mcd.c if ((error = mcdlock(sc)) != 0)
sc 453 dev/isa/mcd.c sc->sc_dk.dk_copenmask &= ~(1 << part);
sc 456 dev/isa/mcd.c sc->sc_dk.dk_bopenmask &= ~(1 << part);
sc 459 dev/isa/mcd.c sc->sc_dk.dk_openmask = sc->sc_dk.dk_copenmask | sc->sc_dk.dk_bopenmask;
sc 461 dev/isa/mcd.c if (sc->sc_dk.dk_openmask == 0) {
sc 465 dev/isa/mcd.c (void) mcd_setmode(sc, MCD_MD_SLEEP);
sc 467 dev/isa/mcd.c (void) mcd_setlock(sc, MCD_LK_UNLOCK);
sc 468 dev/isa/mcd.c if (sc->flags & MCDF_EJECTING) {
sc 469 dev/isa/mcd.c mcd_eject(sc);
sc 470 dev/isa/mcd.c sc->flags &= ~MCDF_EJECTING;
sc 473 dev/isa/mcd.c mcdunlock(sc);
sc 481 dev/isa/mcd.c struct mcd_softc *sc = mcd_cd.cd_devs[DISKUNIT(bp->b_dev)];
sc 488 dev/isa/mcd.c (bp->b_bcount % sc->blksize) != 0) {
sc 490 dev/isa/mcd.c sc->sc_dev.dv_xname, bp->b_blkno, bp->b_bcount);
sc 496 dev/isa/mcd.c if ((sc->flags & MCDF_LOADED) == 0) {
sc 511 dev/isa/mcd.c bounds_check_with_label(bp, sc->sc_dk.dk_label,
sc 512 dev/isa/mcd.c (sc->flags & (MCDF_WLABEL|MCDF_LABELLING)) != 0) <= 0)
sc 517 dev/isa/mcd.c disksort(&sc->buf_queue, bp);
sc 519 dev/isa/mcd.c if (!sc->buf_queue.b_active)
sc 520 dev/isa/mcd.c mcdstart(sc);
sc 533 dev/isa/mcd.c mcdstart(sc)
sc 534 dev/isa/mcd.c struct mcd_softc *sc;
sc 536 dev/isa/mcd.c struct buf *bp, *dp = &sc->buf_queue;
sc 556 dev/isa/mcd.c if ((sc->flags & MCDF_LOADED) == 0) {
sc 570 dev/isa/mcd.c disk_busy(&sc->sc_dk);
sc 573 dev/isa/mcd.c sc->mbx.retry = MCD_RDRETRIES;
sc 574 dev/isa/mcd.c sc->mbx.bp = bp;
sc 575 dev/isa/mcd.c sc->mbx.blkno = bp->b_blkno / (sc->blksize / DEV_BSIZE);
sc 578 dev/isa/mcd.c p = &sc->sc_dk.dk_label->d_partitions[DISKPART(bp->b_dev)];
sc 579 dev/isa/mcd.c sc->mbx.blkno += DL_GETPOFFSET(p);
sc 581 dev/isa/mcd.c sc->mbx.nblk = bp->b_bcount / sc->blksize;
sc 582 dev/isa/mcd.c sc->mbx.sz = sc->blksize;
sc 583 dev/isa/mcd.c sc->mbx.skip = 0;
sc 584 dev/isa/mcd.c sc->mbx.state = MCD_S_BEGIN;
sc 585 dev/isa/mcd.c sc->mbx.mode = MCD_MD_COOKED;
sc 588 dev/isa/mcd.c (void) mcdintr(sc);
sc 620 dev/isa/mcd.c struct mcd_softc *sc = mcd_cd.cd_devs[DISKUNIT(dev)];
sc 626 dev/isa/mcd.c if ((sc->flags & MCDF_LOADED) == 0)
sc 632 dev/isa/mcd.c mcdgetdisklabel(dev, sc, lp, 0);
sc 633 dev/isa/mcd.c bcopy(lp, sc->sc_dk.dk_label, sizeof(*lp));
sc 639 dev/isa/mcd.c *(struct disklabel *)addr = *(sc->sc_dk.dk_label);
sc 643 dev/isa/mcd.c ((struct partinfo *)addr)->disklab = sc->sc_dk.dk_label;
sc 645 dev/isa/mcd.c &sc->sc_dk.dk_label->d_partitions[DISKPART(dev)];
sc 653 dev/isa/mcd.c if ((error = mcdlock(sc)) != 0)
sc 655 dev/isa/mcd.c sc->flags |= MCDF_LABELLING;
sc 657 dev/isa/mcd.c error = setdisklabel(sc->sc_dk.dk_label,
sc 662 dev/isa/mcd.c sc->flags &= ~MCDF_LABELLING;
sc 663 dev/isa/mcd.c mcdunlock(sc);
sc 670 dev/isa/mcd.c return mcd_playtracks(sc, (struct ioc_play_track *)addr);
sc 672 dev/isa/mcd.c return mcd_playmsf(sc, (struct ioc_play_msf *)addr);
sc 674 dev/isa/mcd.c return mcd_playblocks(sc, (struct ioc_play_blocks *)addr);
sc 676 dev/isa/mcd.c return mcd_read_subchannel(sc, (struct ioc_read_subchannel *)addr);
sc 678 dev/isa/mcd.c return mcd_toc_header(sc, (struct ioc_toc_header *)addr);
sc 680 dev/isa/mcd.c return mcd_toc_entries(sc, (struct ioc_read_toc_entry *)addr);
sc 691 dev/isa/mcd.c return mcd_resume(sc);
sc 693 dev/isa/mcd.c return mcd_pause(sc);
sc 697 dev/isa/mcd.c return mcd_stop(sc);
sc 704 dev/isa/mcd.c sc->flags |= MCDF_EJECTING;
sc 707 dev/isa/mcd.c return mcd_setlock(sc, MCD_LK_UNLOCK);
sc 709 dev/isa/mcd.c return mcd_setlock(sc, MCD_LK_LOCK);
sc 711 dev/isa/mcd.c return mcd_setlock(sc,
sc 714 dev/isa/mcd.c sc->debug = 1;
sc 717 dev/isa/mcd.c sc->debug = 0;
sc 720 dev/isa/mcd.c return mcd_hard_reset(sc);
sc 732 dev/isa/mcd.c mcdgetdisklabel(dev, sc, lp, spoofonly)
sc 734 dev/isa/mcd.c struct mcd_softc *sc;
sc 742 dev/isa/mcd.c lp->d_secsize = sc->blksize;
sc 745 dev/isa/mcd.c lp->d_ncylinders = (sc->disksize / 100) + 1;
sc 755 dev/isa/mcd.c DL_SETDSIZE(lp, sc->disksize);
sc 775 dev/isa/mcd.c mcd_get_parms(sc)
sc 776 dev/isa/mcd.c struct mcd_softc *sc;
sc 786 dev/isa/mcd.c if ((error = mcd_send(sc, &mbx, 1)) != 0)
sc 794 dev/isa/mcd.c sc->volinfo = mbx.res.data.volinfo;
sc 795 dev/isa/mcd.c sc->blksize = MCD_BLKSIZE_COOKED;
sc 796 dev/isa/mcd.c size = msf2hsg(sc->volinfo.vol_msf, 0);
sc 797 dev/isa/mcd.c sc->disksize = size * (MCD_BLKSIZE_COOKED / DEV_BSIZE);
sc 826 dev/isa/mcd.c mcd_find(iot, ioh, sc)
sc 829 dev/isa/mcd.c struct mcd_softc *sc;
sc 834 dev/isa/mcd.c sc->sc_iot = iot;
sc 835 dev/isa/mcd.c sc->sc_ioh = ioh;
sc 849 dev/isa/mcd.c if (mcd_send(sc, &mbx, 0) != 0)
sc 856 dev/isa/mcd.c if (mcd_send(sc, &mbx, 0) != 0)
sc 868 dev/isa/mcd.c sc->readcmd = MCD_CMDREADSINGLESPEED;
sc 872 dev/isa/mcd.c sc->type = "LU002S";
sc 874 dev/isa/mcd.c sc->type = "LU005S";
sc 876 dev/isa/mcd.c sc->type = "LU006S";
sc 879 dev/isa/mcd.c sc->type = "FX001";
sc 882 dev/isa/mcd.c sc->type = "FX001D";
sc 883 dev/isa/mcd.c sc->readcmd = MCD_CMDREADDOUBLESPEED;
sc 888 dev/isa/mcd.c sc->sc_dev.dv_xname,
sc 891 dev/isa/mcd.c sc->type = 0;
sc 906 dev/isa/mcd.c struct mcd_softc sc;
sc 922 dev/isa/mcd.c bzero(&sc, sizeof sc);
sc 923 dev/isa/mcd.c sc.debug = 0;
sc 924 dev/isa/mcd.c sc.probe = 1;
sc 926 dev/isa/mcd.c rv = mcd_find(iot, ioh, &sc);
sc 939 dev/isa/mcd.c mcd_getreply(sc)
sc 940 dev/isa/mcd.c struct mcd_softc *sc;
sc 942 dev/isa/mcd.c bus_space_tag_t iot = sc->sc_iot;
sc 943 dev/isa/mcd.c bus_space_handle_t ioh = sc->sc_ioh;
sc 961 dev/isa/mcd.c mcd_getstat(sc)
sc 962 dev/isa/mcd.c struct mcd_softc *sc;
sc 969 dev/isa/mcd.c return mcd_send(sc, &mbx, 1);
sc 973 dev/isa/mcd.c mcd_getresult(sc, res)
sc 974 dev/isa/mcd.c struct mcd_softc *sc;
sc 979 dev/isa/mcd.c if (sc->debug)
sc 980 dev/isa/mcd.c printf("%s: mcd_getresult: %d", sc->sc_dev.dv_xname,
sc 983 dev/isa/mcd.c if ((x = mcd_getreply(sc)) < 0) {
sc 984 dev/isa/mcd.c if (sc->debug)
sc 986 dev/isa/mcd.c else if (sc->probe == 0)
sc 987 dev/isa/mcd.c printf("%s: timeout in getresult\n", sc->sc_dev.dv_xname);
sc 990 dev/isa/mcd.c if (sc->debug)
sc 992 dev/isa/mcd.c sc->status = x;
sc 993 dev/isa/mcd.c mcd_setflags(sc);
sc 995 dev/isa/mcd.c if ((sc->status & MCD_ST_CMDCHECK) != 0)
sc 999 dev/isa/mcd.c if ((x = mcd_getreply(sc)) < 0) {
sc 1000 dev/isa/mcd.c if (sc->debug)
sc 1003 dev/isa/mcd.c printf("%s: timeout in getresult\n", sc->sc_dev.dv_xname);
sc 1006 dev/isa/mcd.c if (sc->debug)
sc 1011 dev/isa/mcd.c if (sc->debug)
sc 1016 dev/isa/mcd.c while ((bus_space_read_1(sc->sc_iot, sc->sc_ioh, MCD_XFER) &
sc 1018 dev/isa/mcd.c x = bus_space_read_1(sc->sc_iot, sc->sc_ioh, MCD_STATUS);
sc 1020 dev/isa/mcd.c sc->sc_dev.dv_xname, (u_int)x);
sc 1029 dev/isa/mcd.c mcd_setflags(sc)
sc 1030 dev/isa/mcd.c struct mcd_softc *sc;
sc 1034 dev/isa/mcd.c if ((sc->flags & MCDF_LOADED) != 0 &&
sc 1035 dev/isa/mcd.c (sc->status & (MCD_ST_DSKCHNG | MCD_ST_DSKIN | MCD_ST_DOOROPEN)) !=
sc 1037 dev/isa/mcd.c if ((sc->status & MCD_ST_DOOROPEN) != 0)
sc 1038 dev/isa/mcd.c printf("%s: door open\n", sc->sc_dev.dv_xname);
sc 1039 dev/isa/mcd.c else if ((sc->status & MCD_ST_DSKIN) == 0)
sc 1040 dev/isa/mcd.c printf("%s: no disk present\n", sc->sc_dev.dv_xname);
sc 1041 dev/isa/mcd.c else if ((sc->status & MCD_ST_DSKCHNG) != 0)
sc 1042 dev/isa/mcd.c printf("%s: media change\n", sc->sc_dev.dv_xname);
sc 1043 dev/isa/mcd.c sc->flags &= ~MCDF_LOADED;
sc 1046 dev/isa/mcd.c if ((sc->status & MCD_ST_AUDIOBSY) != 0)
sc 1047 dev/isa/mcd.c sc->audio_status = CD_AS_PLAY_IN_PROGRESS;
sc 1048 dev/isa/mcd.c else if (sc->audio_status == CD_AS_PLAY_IN_PROGRESS ||
sc 1049 dev/isa/mcd.c sc->audio_status == CD_AS_AUDIO_INVALID)
sc 1050 dev/isa/mcd.c sc->audio_status = CD_AS_PLAY_COMPLETED;
sc 1054 dev/isa/mcd.c mcd_send(sc, mbx, diskin)
sc 1055 dev/isa/mcd.c struct mcd_softc *sc;
sc 1060 dev/isa/mcd.c bus_space_tag_t iot = sc->sc_iot;
sc 1061 dev/isa/mcd.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1063 dev/isa/mcd.c if (sc->debug) {
sc 1064 dev/isa/mcd.c printf("%s: mcd_send: %d %02x", sc->sc_dev.dv_xname,
sc 1075 dev/isa/mcd.c if ((error = mcd_getresult(sc, &mbx->res)) == 0)
sc 1082 dev/isa/mcd.c if (diskin && (sc->flags & MCDF_LOADED) == 0)
sc 1121 dev/isa/mcd.c struct mcd_softc *sc = v;
sc 1125 dev/isa/mcd.c (void) mcdintr(sc);
sc 1139 dev/isa/mcd.c struct mcd_softc *sc = arg;
sc 1140 dev/isa/mcd.c struct mcd_mbx *mbx = &sc->mbx;
sc 1142 dev/isa/mcd.c bus_space_tag_t iot = sc->sc_iot;
sc 1143 dev/isa/mcd.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1155 dev/isa/mcd.c if (mbx->mode == sc->lastmode)
sc 1158 dev/isa/mcd.c sc->lastmode = MCD_MD_UNKNOWN;
sc 1166 dev/isa/mcd.c timeout_del(&sc->sc_pi_tmo);
sc 1175 dev/isa/mcd.c sc->status = bus_space_read_1(iot, ioh, MCD_STATUS);
sc 1176 dev/isa/mcd.c mcd_setflags(sc);
sc 1177 dev/isa/mcd.c if ((sc->flags & MCDF_LOADED) == 0)
sc 1182 dev/isa/mcd.c sc->lastmode = mbx->mode;
sc 1192 dev/isa/mcd.c bus_space_write_1(iot, ioh, MCD_COMMAND, sc->readcmd);
sc 1204 dev/isa/mcd.c timeout_del(&sc->sc_pi_tmo);
sc 1217 dev/isa/mcd.c sc->status = bus_space_read_1(iot, ioh, MCD_STATUS);
sc 1218 dev/isa/mcd.c mcd_setflags(sc);
sc 1219 dev/isa/mcd.c if ((sc->flags & MCDF_LOADED) == 0)
sc 1223 dev/isa/mcd.c sc->sc_dev.dv_xname, (u_int)sc->status);
sc 1245 dev/isa/mcd.c disk_unbusy(&sc->sc_dk, bp->b_bcount, (bp->b_flags & B_READ));
sc 1248 dev/isa/mcd.c mcdstart(sc);
sc 1254 dev/isa/mcd.c sc->sc_dev.dv_xname, mbx->state);
sc 1259 dev/isa/mcd.c printf("%s: sleep in state %d\n", sc->sc_dev.dv_xname,
sc 1262 dev/isa/mcd.c timeout_add(&sc->sc_pi_tmo, hz / 100);
sc 1277 dev/isa/mcd.c disk_unbusy(&sc->sc_dk, (bp->b_bcount - bp->b_resid),
sc 1281 dev/isa/mcd.c mcdstart(sc);
sc 1285 dev/isa/mcd.c printf("%s: unit timeout; resetting\n", sc->sc_dev.dv_xname);
sc 1288 dev/isa/mcd.c (void) mcd_getstat(sc, 1);
sc 1289 dev/isa/mcd.c (void) mcd_getstat(sc, 1);
sc 1291 dev/isa/mcd.c sc->debug = 1; /* preventive set debug mode */
sc 1296 dev/isa/mcd.c mcd_soft_reset(sc)
sc 1297 dev/isa/mcd.c struct mcd_softc *sc;
sc 1300 dev/isa/mcd.c sc->debug = 0;
sc 1301 dev/isa/mcd.c sc->flags = 0;
sc 1302 dev/isa/mcd.c sc->lastmode = MCD_MD_UNKNOWN;
sc 1303 dev/isa/mcd.c sc->lastupc = MCD_UPC_UNKNOWN;
sc 1304 dev/isa/mcd.c sc->audio_status = CD_AS_AUDIO_INVALID;
sc 1305 dev/isa/mcd.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, MCD_CTL2, 0x0c); /* XXX */
sc 1309 dev/isa/mcd.c mcd_hard_reset(sc)
sc 1310 dev/isa/mcd.c struct mcd_softc *sc;
sc 1314 dev/isa/mcd.c mcd_soft_reset(sc);
sc 1319 dev/isa/mcd.c return mcd_send(sc, &mbx, 0);
sc 1323 dev/isa/mcd.c mcd_setmode(sc, mode)
sc 1324 dev/isa/mcd.c struct mcd_softc *sc;
sc 1330 dev/isa/mcd.c if (sc->lastmode == mode)
sc 1332 dev/isa/mcd.c if (sc->debug)
sc 1333 dev/isa/mcd.c printf("%s: setting mode to %d\n", sc->sc_dev.dv_xname, mode);
sc 1334 dev/isa/mcd.c sc->lastmode = MCD_MD_UNKNOWN;
sc 1340 dev/isa/mcd.c if ((error = mcd_send(sc, &mbx, 1)) != 0)
sc 1343 dev/isa/mcd.c sc->lastmode = mode;
sc 1348 dev/isa/mcd.c mcd_setupc(sc, upc)
sc 1349 dev/isa/mcd.c struct mcd_softc *sc;
sc 1355 dev/isa/mcd.c if (sc->lastupc == upc)
sc 1357 dev/isa/mcd.c if (sc->debug)
sc 1358 dev/isa/mcd.c printf("%s: setting upc to %d\n", sc->sc_dev.dv_xname, upc);
sc 1359 dev/isa/mcd.c sc->lastupc = MCD_UPC_UNKNOWN;
sc 1366 dev/isa/mcd.c if ((error = mcd_send(sc, &mbx, 1)) != 0)
sc 1369 dev/isa/mcd.c sc->lastupc = upc;
sc 1374 dev/isa/mcd.c mcd_toc_header(sc, th)
sc 1375 dev/isa/mcd.c struct mcd_softc *sc;
sc 1379 dev/isa/mcd.c if (sc->debug)
sc 1381 dev/isa/mcd.c sc->sc_dev.dv_xname);
sc 1383 dev/isa/mcd.c th->len = msf2hsg(sc->volinfo.vol_msf, 0);
sc 1384 dev/isa/mcd.c th->starting_track = bcd2bin(sc->volinfo.trk_low);
sc 1385 dev/isa/mcd.c th->ending_track = bcd2bin(sc->volinfo.trk_high);
sc 1391 dev/isa/mcd.c mcd_read_toc(sc)
sc 1392 dev/isa/mcd.c struct mcd_softc *sc;
sc 1398 dev/isa/mcd.c if ((error = mcd_toc_header(sc, &th)) != 0)
sc 1401 dev/isa/mcd.c if ((error = mcd_stop(sc)) != 0)
sc 1404 dev/isa/mcd.c if (sc->debug)
sc 1406 dev/isa/mcd.c sc->sc_dev.dv_xname);
sc 1409 dev/isa/mcd.c sc->toc[trk].toc.idx_no = 0x00;
sc 1412 dev/isa/mcd.c if (mcd_getqchan(sc, &q, CD_TRACK_INFO) != 0)
sc 1418 dev/isa/mcd.c sc->toc[idx].toc.idx_no == 0x00) {
sc 1419 dev/isa/mcd.c sc->toc[idx] = q;
sc 1425 dev/isa/mcd.c if ((error = mcd_setmode(sc, MCD_MD_COOKED)) != 0)
sc 1433 dev/isa/mcd.c sc->toc[idx].toc.control = sc->toc[idx-1].toc.control;
sc 1434 dev/isa/mcd.c sc->toc[idx].toc.addr_type = sc->toc[idx-1].toc.addr_type;
sc 1435 dev/isa/mcd.c sc->toc[idx].toc.trk_no = 0x00;
sc 1436 dev/isa/mcd.c sc->toc[idx].toc.idx_no = 0xaa;
sc 1437 dev/isa/mcd.c sc->toc[idx].toc.absolute_pos[0] = sc->volinfo.vol_msf[0];
sc 1438 dev/isa/mcd.c sc->toc[idx].toc.absolute_pos[1] = sc->volinfo.vol_msf[1];
sc 1439 dev/isa/mcd.c sc->toc[idx].toc.absolute_pos[2] = sc->volinfo.vol_msf[2];
sc 1445 dev/isa/mcd.c mcd_toc_entries(sc, te)
sc 1446 dev/isa/mcd.c struct mcd_softc *sc;
sc 1466 dev/isa/mcd.c if ((error = mcd_toc_header(sc, &data.header)) != 0)
sc 1481 dev/isa/mcd.c if (sc->toc[trk].toc.idx_no == 0x00)
sc 1483 dev/isa/mcd.c data.entries[n].control = sc->toc[trk].toc.control;
sc 1484 dev/isa/mcd.c data.entries[n].addr_type = sc->toc[trk].toc.addr_type;
sc 1485 dev/isa/mcd.c data.entries[n].track = bcd2bin(sc->toc[trk].toc.idx_no);
sc 1490 dev/isa/mcd.c bcd2bin(sc->toc[trk].toc.absolute_pos[0]);
sc 1492 dev/isa/mcd.c bcd2bin(sc->toc[trk].toc.absolute_pos[1]);
sc 1494 dev/isa/mcd.c bcd2bin(sc->toc[trk].toc.absolute_pos[2]);
sc 1497 dev/isa/mcd.c lba = msf2hsg(sc->toc[trk].toc.absolute_pos, 0);
sc 1514 dev/isa/mcd.c mcd_stop(sc)
sc 1515 dev/isa/mcd.c struct mcd_softc *sc;
sc 1520 dev/isa/mcd.c if (sc->debug)
sc 1521 dev/isa/mcd.c printf("%s: mcd_stop: stopping play\n", sc->sc_dev.dv_xname);
sc 1526 dev/isa/mcd.c if ((error = mcd_send(sc, &mbx, 1)) != 0)
sc 1529 dev/isa/mcd.c sc->audio_status = CD_AS_PLAY_COMPLETED;
sc 1534 dev/isa/mcd.c mcd_getqchan(sc, q, qchn)
sc 1535 dev/isa/mcd.c struct mcd_softc *sc;
sc 1543 dev/isa/mcd.c if ((error = mcd_setmode(sc, MCD_MD_TOC)) != 0)
sc 1546 dev/isa/mcd.c if ((error = mcd_setmode(sc, MCD_MD_COOKED)) != 0)
sc 1550 dev/isa/mcd.c if ((error = mcd_setupc(sc, MCD_UPC_ENABLE)) != 0)
sc 1553 dev/isa/mcd.c if ((error = mcd_setupc(sc, MCD_UPC_DISABLE)) != 0)
sc 1560 dev/isa/mcd.c if ((error = mcd_send(sc, &mbx, 1)) != 0)
sc 1568 dev/isa/mcd.c mcd_read_subchannel(sc, ch)
sc 1569 dev/isa/mcd.c struct mcd_softc *sc;
sc 1578 dev/isa/mcd.c if (sc->debug)
sc 1579 dev/isa/mcd.c printf("%s: subchan: af=%d df=%d\n", sc->sc_dev.dv_xname,
sc 1592 dev/isa/mcd.c if ((error = mcd_getqchan(sc, &q, ch->data_format)) != 0)
sc 1595 dev/isa/mcd.c data.header.audio_status = sc->audio_status;
sc 1653 dev/isa/mcd.c mcd_playtracks(sc, p)
sc 1654 dev/isa/mcd.c struct mcd_softc *sc;
sc 1662 dev/isa/mcd.c if (sc->debug)
sc 1664 dev/isa/mcd.c sc->sc_dev.dv_xname,
sc 1667 dev/isa/mcd.c if (a < bcd2bin(sc->volinfo.trk_low) ||
sc 1668 dev/isa/mcd.c a > bcd2bin(sc->volinfo.trk_high) ||
sc 1670 dev/isa/mcd.c z < bcd2bin(sc->volinfo.trk_low) ||
sc 1671 dev/isa/mcd.c z > bcd2bin(sc->volinfo.trk_high))
sc 1674 dev/isa/mcd.c if ((error = mcd_setmode(sc, MCD_MD_COOKED)) != 0)
sc 1679 dev/isa/mcd.c mbx.cmd.data.play.start_msf[0] = sc->toc[a].toc.absolute_pos[0];
sc 1680 dev/isa/mcd.c mbx.cmd.data.play.start_msf[1] = sc->toc[a].toc.absolute_pos[1];
sc 1681 dev/isa/mcd.c mbx.cmd.data.play.start_msf[2] = sc->toc[a].toc.absolute_pos[2];
sc 1682 dev/isa/mcd.c mbx.cmd.data.play.end_msf[0] = sc->toc[z+1].toc.absolute_pos[0];
sc 1683 dev/isa/mcd.c mbx.cmd.data.play.end_msf[1] = sc->toc[z+1].toc.absolute_pos[1];
sc 1684 dev/isa/mcd.c mbx.cmd.data.play.end_msf[2] = sc->toc[z+1].toc.absolute_pos[2];
sc 1685 dev/isa/mcd.c sc->lastpb = mbx.cmd;
sc 1687 dev/isa/mcd.c return mcd_send(sc, &mbx, 1);
sc 1691 dev/isa/mcd.c mcd_playmsf(sc, p)
sc 1692 dev/isa/mcd.c struct mcd_softc *sc;
sc 1698 dev/isa/mcd.c if (sc->debug)
sc 1700 dev/isa/mcd.c sc->sc_dev.dv_xname,
sc 1708 dev/isa/mcd.c if ((error = mcd_setmode(sc, MCD_MD_COOKED)) != 0)
sc 1719 dev/isa/mcd.c sc->lastpb = mbx.cmd;
sc 1721 dev/isa/mcd.c return mcd_send(sc, &mbx, 1);
sc 1725 dev/isa/mcd.c mcd_playblocks(sc, p)
sc 1726 dev/isa/mcd.c struct mcd_softc *sc;
sc 1732 dev/isa/mcd.c if (sc->debug)
sc 1734 dev/isa/mcd.c sc->sc_dev.dv_xname, p->blk, p->len);
sc 1736 dev/isa/mcd.c if (p->blk > sc->disksize || p->len > sc->disksize ||
sc 1737 dev/isa/mcd.c (p->blk + p->len) > sc->disksize)
sc 1740 dev/isa/mcd.c if ((error = mcd_setmode(sc, MCD_MD_COOKED)) != 0)
sc 1747 dev/isa/mcd.c sc->lastpb = mbx.cmd;
sc 1749 dev/isa/mcd.c return mcd_send(sc, &mbx, 1);
sc 1753 dev/isa/mcd.c mcd_pause(sc)
sc 1754 dev/isa/mcd.c struct mcd_softc *sc;
sc 1760 dev/isa/mcd.c if (sc->audio_status != CD_AS_PLAY_IN_PROGRESS) {
sc 1762 dev/isa/mcd.c sc->sc_dev.dv_xname);
sc 1767 dev/isa/mcd.c if ((error = mcd_getqchan(sc, &q, CD_CURRENT_POSITION)) != 0)
sc 1771 dev/isa/mcd.c sc->lastpb.data.seek.start_msf[0] = q.current.absolute_pos[0];
sc 1772 dev/isa/mcd.c sc->lastpb.data.seek.start_msf[1] = q.current.absolute_pos[1];
sc 1773 dev/isa/mcd.c sc->lastpb.data.seek.start_msf[2] = q.current.absolute_pos[2];
sc 1776 dev/isa/mcd.c if ((error = mcd_stop(sc)) != 0)
sc 1780 dev/isa/mcd.c sc->audio_status = CD_AS_PLAY_PAUSED;
sc 1785 dev/isa/mcd.c mcd_resume(sc)
sc 1786 dev/isa/mcd.c struct mcd_softc *sc;
sc 1791 dev/isa/mcd.c if (sc->audio_status != CD_AS_PLAY_PAUSED)
sc 1794 dev/isa/mcd.c if ((error = mcd_setmode(sc, MCD_MD_COOKED)) != 0)
sc 1797 dev/isa/mcd.c mbx.cmd = sc->lastpb;
sc 1799 dev/isa/mcd.c return mcd_send(sc, &mbx, 1);
sc 1803 dev/isa/mcd.c mcd_eject(sc)
sc 1804 dev/isa/mcd.c struct mcd_softc *sc;
sc 1811 dev/isa/mcd.c return mcd_send(sc, &mbx, 0);
sc 1815 dev/isa/mcd.c mcd_setlock(sc, mode)
sc 1816 dev/isa/mcd.c struct mcd_softc *sc;
sc 1825 dev/isa/mcd.c return mcd_send(sc, &mbx, 1);
sc 109 dev/isa/midi_pcppi.c struct midi_pcppi_softc *sc = (struct midi_pcppi_softc *)self;
sc 113 dev/isa/midi_pcppi.c ms = &sc->sc_midisyn;
sc 122 dev/isa/midi_pcppi.c midisyn_attach(&sc->sc_mididev, ms);
sc 123 dev/isa/midi_pcppi.c midi_attach(&sc->sc_mididev, parent);
sc 96 dev/isa/mpu401.c struct mpu_softc *sc = v;
sc 98 dev/isa/mpu401.c if (MPU_GETSTATUS(sc->iot, sc->ioh) == 0xff) {
sc 102 dev/isa/mpu401.c sc->open = 0;
sc 103 dev/isa/mpu401.c sc->intr = 0;
sc 104 dev/isa/mpu401.c if (mpu_reset(sc) == 0)
sc 111 dev/isa/mpu401.c mpu_waitready(sc)
sc 112 dev/isa/mpu401.c struct mpu_softc *sc;
sc 117 dev/isa/mpu401.c if (!(MPU_GETSTATUS(sc->iot, sc->ioh) & MPU_OUTPUT_BUSY))
sc 125 dev/isa/mpu401.c mpu_reset(sc)
sc 126 dev/isa/mpu401.c struct mpu_softc *sc;
sc 128 dev/isa/mpu401.c bus_space_tag_t iot = sc->iot;
sc 129 dev/isa/mpu401.c bus_space_handle_t ioh = sc->ioh;
sc 133 dev/isa/mpu401.c if (mpu_waitready(sc)) {
sc 159 dev/isa/mpu401.c struct mpu_softc *sc = v;
sc 161 dev/isa/mpu401.c DPRINTF(("mpu_open: sc=%p\n", sc));
sc 163 dev/isa/mpu401.c if (sc->open)
sc 165 dev/isa/mpu401.c if (mpu_reset(sc) != 0)
sc 168 dev/isa/mpu401.c bus_space_write_1(sc->iot, sc->ioh, MPU_COMMAND, MPU_UART_MODE);
sc 169 dev/isa/mpu401.c sc->open = 1;
sc 170 dev/isa/mpu401.c sc->intr = iintr;
sc 171 dev/isa/mpu401.c sc->arg = arg;
sc 179 dev/isa/mpu401.c struct mpu_softc *sc = v;
sc 181 dev/isa/mpu401.c DPRINTF(("mpu_close: sc=%p\n", sc));
sc 183 dev/isa/mpu401.c sc->open = 0;
sc 184 dev/isa/mpu401.c sc->intr = 0;
sc 185 dev/isa/mpu401.c mpu_reset(sc); /* exit UART mode */
sc 189 dev/isa/mpu401.c mpu_readinput(sc)
sc 190 dev/isa/mpu401.c struct mpu_softc *sc;
sc 192 dev/isa/mpu401.c bus_space_tag_t iot = sc->iot;
sc 193 dev/isa/mpu401.c bus_space_handle_t ioh = sc->ioh;
sc 198 dev/isa/mpu401.c DPRINTFN(3, ("mpu_rea: sc=%p 0x%02x\n", sc, data));
sc 199 dev/isa/mpu401.c if (sc->intr)
sc 200 dev/isa/mpu401.c sc->intr(sc->arg, data);
sc 209 dev/isa/mpu401.c struct mpu_softc *sc = v;
sc 212 dev/isa/mpu401.c DPRINTFN(3, ("mpu_output: sc=%p 0x%02x\n", sc, d));
sc 213 dev/isa/mpu401.c if (!(MPU_GETSTATUS(sc->iot, sc->ioh) & MPU_INPUT_EMPTY)) {
sc 215 dev/isa/mpu401.c mpu_readinput(sc);
sc 218 dev/isa/mpu401.c if (mpu_waitready(sc)) {
sc 222 dev/isa/mpu401.c bus_space_write_1(sc->iot, sc->ioh, MPU_DATA, d);
sc 239 dev/isa/mpu401.c struct mpu_softc *sc = v;
sc 241 dev/isa/mpu401.c if (MPU_GETSTATUS(sc->iot, sc->ioh) & MPU_INPUT_EMPTY) {
sc 245 dev/isa/mpu401.c mpu_readinput(sc);
sc 140 dev/isa/mpu_isa.c struct mpu_isa_softc *sc = (struct mpu_isa_softc *)self;
sc 143 dev/isa/mpu_isa.c sc->sc_mpu.iot = ia->ia_iot;
sc 146 dev/isa/mpu_isa.c 0, &sc->sc_mpu.ioh)) {
sc 151 dev/isa/mpu_isa.c if (!mpu_find(&sc->sc_mpu)) {
sc 158 dev/isa/mpu_isa.c midi_attach_mi(&mpu_midi_hw_if, &sc->sc_mpu, &sc->sc_dev);
sc 56 dev/isa/mpu_isapnp.c struct mpu_isapnp_softc *sc = (struct mpu_isapnp_softc *)self;
sc 61 dev/isa/mpu_isapnp.c sc->sc_mpu.iot = ipa->ia_iot;
sc 62 dev/isa/mpu_isapnp.c sc->sc_mpu.ioh = ipa->ipa_io[0].h;
sc 64 dev/isa/mpu_isapnp.c sc->sc_ih = isa_intr_establish(ipa->ia_ic, ipa->ipa_irq[0].num,
sc 65 dev/isa/mpu_isapnp.c ipa->ipa_irq[0].type, IPL_AUDIO, mpu_intr, &sc->sc_mpu,
sc 66 dev/isa/mpu_isapnp.c sc->sc_dev.dv_xname);
sc 68 dev/isa/mpu_isapnp.c if (!mpu_find(&sc->sc_mpu)) {
sc 69 dev/isa/mpu_isapnp.c printf("%s: find failed\n", sc->sc_dev.dv_xname);
sc 73 dev/isa/mpu_isapnp.c printf("%s: %s %s\n", sc->sc_dev.dv_xname, ipa->ipa_devident,
sc 76 dev/isa/mpu_isapnp.c midi_attach_mi(&mpu_midi_hw_if, &sc->sc_mpu, &sc->sc_dev);
sc 183 dev/isa/nsclpcsio_isa.c #define GPIO_READ(sc, reg) \
sc 184 dev/isa/nsclpcsio_isa.c bus_space_read_1((sc)->sc_iot, \
sc 185 dev/isa/nsclpcsio_isa.c (sc)->sc_ld_ioh[SIO_LDN_GPIO], (reg))
sc 186 dev/isa/nsclpcsio_isa.c #define GPIO_WRITE(sc, reg, val) \
sc 187 dev/isa/nsclpcsio_isa.c bus_space_write_1((sc)->sc_iot, \
sc 188 dev/isa/nsclpcsio_isa.c (sc)->sc_ld_ioh[SIO_LDN_GPIO], (reg), (val))
sc 189 dev/isa/nsclpcsio_isa.c #define TMS_WRITE(sc, reg, val) \
sc 190 dev/isa/nsclpcsio_isa.c bus_space_write_1((sc)->sc_iot, \
sc 191 dev/isa/nsclpcsio_isa.c (sc)->sc_ld_ioh[SIO_LDN_TMS], (reg), (val))
sc 192 dev/isa/nsclpcsio_isa.c #define TMS_READ(sc, reg) \
sc 193 dev/isa/nsclpcsio_isa.c bus_space_read_1((sc)->sc_iot, \
sc 194 dev/isa/nsclpcsio_isa.c (sc)->sc_ld_ioh[SIO_LDN_TMS], (reg))
sc 195 dev/isa/nsclpcsio_isa.c #define VLM_WRITE(sc, reg, val) \
sc 196 dev/isa/nsclpcsio_isa.c bus_space_write_1((sc)->sc_iot, \
sc 197 dev/isa/nsclpcsio_isa.c (sc)->sc_ld_ioh[SIO_LDN_VLM], (reg), (val))
sc 198 dev/isa/nsclpcsio_isa.c #define VLM_READ(sc, reg) \
sc 199 dev/isa/nsclpcsio_isa.c bus_space_read_1((sc)->sc_iot, \
sc 200 dev/isa/nsclpcsio_isa.c (sc)->sc_ld_ioh[SIO_LDN_VLM], (reg))
sc 279 dev/isa/nsclpcsio_isa.c struct nsclpcsio_softc *sc = (void *)self;
sc 287 dev/isa/nsclpcsio_isa.c sc->sc_iot = iot = ia->ia_iot;
sc 288 dev/isa/nsclpcsio_isa.c if (bus_space_map(ia->ia_iot, iobase, 2, 0, &sc->sc_ioh)) {
sc 293 dev/isa/nsclpcsio_isa.c nsread(sc->sc_iot, sc->sc_ioh, SIO_REG_SRID));
sc 297 dev/isa/nsclpcsio_isa.c sc->sc_ld_en[sio_ld[i].ld_num] = 0;
sc 300 dev/isa/nsclpcsio_isa.c nswrite(sc->sc_iot, sc->sc_ioh, SIO_REG_LDN, sio_ld[i].ld_num);
sc 301 dev/isa/nsclpcsio_isa.c if ((nsread(sc->sc_iot, sc->sc_ioh,
sc 307 dev/isa/nsclpcsio_isa.c iobase = (nsread(sc->sc_iot, sc->sc_ioh,
sc 309 dev/isa/nsclpcsio_isa.c iobase |= nsread(sc->sc_iot, sc->sc_ioh,
sc 311 dev/isa/nsclpcsio_isa.c if (bus_space_map(sc->sc_iot, iobase,
sc 313 dev/isa/nsclpcsio_isa.c &sc->sc_ld_ioh[sio_ld[i].ld_num]))
sc 317 dev/isa/nsclpcsio_isa.c sc->sc_ld_en[sio_ld[i].ld_num] = 1;
sc 323 dev/isa/nsclpcsio_isa.c nsclpcsio_gpio_init(sc);
sc 324 dev/isa/nsclpcsio_isa.c nsclpcsio_tms_init(sc);
sc 325 dev/isa/nsclpcsio_isa.c nsclpcsio_vlm_init(sc);
sc 328 dev/isa/nsclpcsio_isa.c strlcpy(sc->sensordev.xname, sc->sc_dev.dv_xname,
sc 329 dev/isa/nsclpcsio_isa.c sizeof(sc->sensordev.xname));
sc 331 dev/isa/nsclpcsio_isa.c if (i < SIO_VLM_OFF && !sc->sc_ld_en[SIO_LDN_TMS])
sc 333 dev/isa/nsclpcsio_isa.c if (i >= SIO_VLM_OFF && !sc->sc_ld_en[SIO_LDN_VLM])
sc 335 dev/isa/nsclpcsio_isa.c sensor_attach(&sc->sensordev, &sc->sensors[i]);
sc 337 dev/isa/nsclpcsio_isa.c sensordev_install(&sc->sensordev);
sc 338 dev/isa/nsclpcsio_isa.c if (sc->sc_ld_en[SIO_LDN_TMS] || sc->sc_ld_en[SIO_LDN_VLM]) {
sc 339 dev/isa/nsclpcsio_isa.c timeout_set(&nsclpcsio_timeout, nsclpcsio_refresh, sc);
sc 344 dev/isa/nsclpcsio_isa.c if (sc->sc_ld_en[SIO_LDN_GPIO]) {
sc 346 dev/isa/nsclpcsio_isa.c gba.gba_gc = &sc->sc_gpio_gc;
sc 347 dev/isa/nsclpcsio_isa.c gba.gba_pins = sc->sc_gpio_pins;
sc 349 dev/isa/nsclpcsio_isa.c config_found(&sc->sc_dev, &gba, NULL);
sc 356 dev/isa/nsclpcsio_isa.c struct nsclpcsio_softc *sc = (struct nsclpcsio_softc *)arg;
sc 358 dev/isa/nsclpcsio_isa.c if (sc->sc_ld_en[SIO_LDN_TMS])
sc 359 dev/isa/nsclpcsio_isa.c nsclpcsio_tms_update(sc);
sc 360 dev/isa/nsclpcsio_isa.c if (sc->sc_ld_en[SIO_LDN_VLM])
sc 361 dev/isa/nsclpcsio_isa.c nsclpcsio_vlm_update(sc);
sc 366 dev/isa/nsclpcsio_isa.c nsclpcsio_tms_init(struct nsclpcsio_softc *sc)
sc 371 dev/isa/nsclpcsio_isa.c TMS_WRITE(sc, 0x08, 0x00);
sc 372 dev/isa/nsclpcsio_isa.c TMS_WRITE(sc, 0x09, 0x0f);
sc 373 dev/isa/nsclpcsio_isa.c TMS_WRITE(sc, 0x0a, 0x08);
sc 374 dev/isa/nsclpcsio_isa.c TMS_WRITE(sc, 0x0b, 0x04);
sc 375 dev/isa/nsclpcsio_isa.c TMS_WRITE(sc, 0x0c, 0x35);
sc 376 dev/isa/nsclpcsio_isa.c TMS_WRITE(sc, 0x0d, 0x05);
sc 377 dev/isa/nsclpcsio_isa.c TMS_WRITE(sc, 0x0e, 0x05);
sc 379 dev/isa/nsclpcsio_isa.c TMS_WRITE(sc, SIO_TMSCFG, 0x00);
sc 383 dev/isa/nsclpcsio_isa.c TMS_WRITE(sc, SIO_TMSBS, i);
sc 384 dev/isa/nsclpcsio_isa.c TMS_WRITE(sc, SIO_TCHCFST, 0x01);
sc 386 dev/isa/nsclpcsio_isa.c sc->sensors[i].type = SENSOR_TEMP;
sc 389 dev/isa/nsclpcsio_isa.c strlcpy(sc->sensors[0].desc, "Remote", sizeof(sc->sensors[0].desc));
sc 390 dev/isa/nsclpcsio_isa.c strlcpy(sc->sensors[1].desc, "Remote", sizeof(sc->sensors[1].desc));
sc 391 dev/isa/nsclpcsio_isa.c strlcpy(sc->sensors[2].desc, "Local", sizeof(sc->sensors[2].desc));
sc 393 dev/isa/nsclpcsio_isa.c nsclpcsio_tms_update(sc);
sc 397 dev/isa/nsclpcsio_isa.c nsclpcsio_tms_update(struct nsclpcsio_softc *sc)
sc 404 dev/isa/nsclpcsio_isa.c TMS_WRITE(sc, SIO_TMSBS, i);
sc 405 dev/isa/nsclpcsio_isa.c status = TMS_READ(sc, SIO_TCHCFST);
sc 408 dev/isa/nsclpcsio_isa.c sc->sensors[i].desc, status));
sc 409 dev/isa/nsclpcsio_isa.c sc->sensors[i].value = 0;
sc 412 dev/isa/nsclpcsio_isa.c sdata = TMS_READ(sc, SIO_RDCHT);
sc 413 dev/isa/nsclpcsio_isa.c DPRINTF(("%s: status %d C %d\n", sc->sensors[i].desc,
sc 415 dev/isa/nsclpcsio_isa.c sc->sensors[i].value = sdata * 1000000 + 273150000;
sc 420 dev/isa/nsclpcsio_isa.c nsclpcsio_vlm_init(struct nsclpcsio_softc *sc)
sc 425 dev/isa/nsclpcsio_isa.c VLM_WRITE(sc, SIO_VLMCFG, 0x00);
sc 429 dev/isa/nsclpcsio_isa.c VLM_WRITE(sc, SIO_VLMBS, i);
sc 430 dev/isa/nsclpcsio_isa.c VLM_WRITE(sc, SIO_VCHCFST, 0x01);
sc 458 dev/isa/nsclpcsio_isa.c strlcpy(sc->sensors[SIO_VLM_OFF + i].desc, desc,
sc 459 dev/isa/nsclpcsio_isa.c sizeof(sc->sensors[SIO_VLM_OFF + i].desc));
sc 460 dev/isa/nsclpcsio_isa.c sc->sensors[SIO_VLM_OFF + i].type = SENSOR_VOLTS_DC;
sc 463 dev/isa/nsclpcsio_isa.c nsclpcsio_vlm_update(sc);
sc 467 dev/isa/nsclpcsio_isa.c nsclpcsio_vlm_update(struct nsclpcsio_softc *sc)
sc 474 dev/isa/nsclpcsio_isa.c VLM_WRITE(sc, SIO_VLMBS, i);
sc 475 dev/isa/nsclpcsio_isa.c status = VLM_READ(sc, SIO_VCHCFST);
sc 478 dev/isa/nsclpcsio_isa.c sc->sensors[SIO_VLM_OFF + i].desc, status));
sc 479 dev/isa/nsclpcsio_isa.c sc->sensors[SIO_VLM_OFF + i].value = 0;
sc 482 dev/isa/nsclpcsio_isa.c data = VLM_READ(sc, SIO_RDCHV);
sc 484 dev/isa/nsclpcsio_isa.c sc->sensors[SIO_VLM_OFF + i].desc, status, data));
sc 496 dev/isa/nsclpcsio_isa.c sc->sensors[SIO_VLM_OFF + i].value = data * rfact;
sc 501 dev/isa/nsclpcsio_isa.c nsclpcsio_gpio_pin_select(struct nsclpcsio_softc *sc, int pin)
sc 510 dev/isa/nsclpcsio_isa.c nswrite(sc->sc_iot, sc->sc_ioh, SIO_REG_LDN, SIO_LDN_GPIO);
sc 511 dev/isa/nsclpcsio_isa.c nswrite(sc->sc_iot, sc->sc_ioh, SIO_GPIO_PINSEL, data);
sc 515 dev/isa/nsclpcsio_isa.c nsclpcsio_gpio_init(struct nsclpcsio_softc *sc)
sc 520 dev/isa/nsclpcsio_isa.c sc->sc_gpio_pins[i].pin_num = i;
sc 521 dev/isa/nsclpcsio_isa.c sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT |
sc 527 dev/isa/nsclpcsio_isa.c sc->sc_gpio_pins[i].pin_state = nsclpcsio_gpio_pin_read(sc,
sc 532 dev/isa/nsclpcsio_isa.c sc->sc_gpio_gc.gp_cookie = sc;
sc 533 dev/isa/nsclpcsio_isa.c sc->sc_gpio_gc.gp_pin_read = nsclpcsio_gpio_pin_read;
sc 534 dev/isa/nsclpcsio_isa.c sc->sc_gpio_gc.gp_pin_write = nsclpcsio_gpio_pin_write;
sc 535 dev/isa/nsclpcsio_isa.c sc->sc_gpio_gc.gp_pin_ctl = nsclpcsio_gpio_pin_ctl;
sc 541 dev/isa/nsclpcsio_isa.c struct nsclpcsio_softc *sc = arg;
sc 563 dev/isa/nsclpcsio_isa.c data = GPIO_READ(sc, reg);
sc 571 dev/isa/nsclpcsio_isa.c struct nsclpcsio_softc *sc = arg;
sc 593 dev/isa/nsclpcsio_isa.c data = GPIO_READ(sc, reg);
sc 599 dev/isa/nsclpcsio_isa.c GPIO_WRITE(sc, reg, data);
sc 605 dev/isa/nsclpcsio_isa.c struct nsclpcsio_softc *sc = arg;
sc 608 dev/isa/nsclpcsio_isa.c nswrite(sc->sc_iot, sc->sc_ioh, SIO_REG_LDN, SIO_LDN_GPIO);
sc 609 dev/isa/nsclpcsio_isa.c nsclpcsio_gpio_pin_select(sc, pin);
sc 610 dev/isa/nsclpcsio_isa.c conf = nsread(sc->sc_iot, sc->sc_ioh, SIO_GPIO_PINCFG);
sc 621 dev/isa/nsclpcsio_isa.c nswrite(sc->sc_iot, sc->sc_ioh, SIO_GPIO_PINCFG, conf);
sc 95 dev/isa/opl_ess.c struct opl_softc *sc = (struct opl_softc *)self;
sc 97 dev/isa/opl_ess.c sc->ioh = ssc->sc_ioh;
sc 98 dev/isa/opl_ess.c sc->iot = ssc->sc_iot;
sc 99 dev/isa/opl_ess.c sc->offs = 0;
sc 100 dev/isa/opl_ess.c sc->spkrctl = ess_speaker_ctl;
sc 101 dev/isa/opl_ess.c sc->spkrarg = ssc;
sc 102 dev/isa/opl_ess.c strlcpy(sc->syn.name, "ESS ", sizeof sc->syn.name);
sc 104 dev/isa/opl_ess.c opl_attach(sc);
sc 77 dev/isa/opl_isa.c struct opl_softc sc;
sc 80 dev/isa/opl_isa.c memset(&sc, 0, sizeof sc);
sc 81 dev/isa/opl_isa.c sc.iot = ia->ia_iot;
sc 82 dev/isa/opl_isa.c if (bus_space_map(sc.iot, ia->ia_iobase, OPL_SIZE, 0, &sc.ioh))
sc 84 dev/isa/opl_isa.c r = opl_find(&sc);
sc 85 dev/isa/opl_isa.c bus_space_unmap(sc.iot, sc.ioh, OPL_SIZE);
sc 95 dev/isa/opl_isa.c struct opl_softc *sc = (struct opl_softc *)self;
sc 98 dev/isa/opl_isa.c if (bus_space_map(sc->iot, ia->ia_iobase, OPL_SIZE, 0, &sc->ioh)) {
sc 102 dev/isa/opl_isa.c sc->offs = 0;
sc 104 dev/isa/opl_isa.c opl_attach(sc);
sc 94 dev/isa/opl_sb.c struct opl_softc *sc = (struct opl_softc *)self;
sc 96 dev/isa/opl_sb.c sc->ioh = ssc->sc_ioh;
sc 97 dev/isa/opl_sb.c sc->iot = ssc->sc_iot;
sc 98 dev/isa/opl_sb.c sc->offs = 0;
sc 99 dev/isa/opl_sb.c sc->spkrctl = sbdsp_speaker_ctl;
sc 100 dev/isa/opl_sb.c sc->spkrarg = ssc;
sc 101 dev/isa/opl_sb.c strlcpy(sc->syn.name, "SB ", sizeof sc->syn.name);
sc 103 dev/isa/opl_sb.c opl_attach(sc);
sc 266 dev/isa/pas.c struct pas_softc *sc = match;
sc 328 dev/isa/pas.c sc->model = O_M_1_to_card[t];
sc 329 dev/isa/pas.c if (sc->model != 0) {
sc 330 dev/isa/pas.c sc->rev = pasread(BOARD_REV_ID);
sc 337 dev/isa/pas.c if (sc->model >= 0) {
sc 342 dev/isa/pas.c pasconf(sc->model, ia->ia_iobase, ia->ia_irq, 1);
sc 352 dev/isa/pas.c sc->sc_sbdsp.sc_iobase = ia->ia_iobase;
sc 353 dev/isa/pas.c sc->sc_sbdsp.sc_iot = ia->ia_iot;
sc 356 dev/isa/pas.c if (bus_space_map(sc->sc_sbdsp.sc_iot, ia->ia_iobase, SBP_NPORT, 0,
sc 357 dev/isa/pas.c &sc->sc_sbdsp.sc_ioh)) {
sc 363 dev/isa/pas.c if (sbdsp_reset(&sc->sc_sbdsp) < 0) {
sc 380 dev/isa/pas.c sc->sc_sbdsp.sc_irq = ia->ia_irq;
sc 381 dev/isa/pas.c sc->sc_sbdsp.sc_drq8 = ia->ia_drq;
sc 382 dev/isa/pas.c sc->sc_sbdsp.sc_drq16 = -1; /* XXX */
sc 383 dev/isa/pas.c sc->sc_sbdsp.sc_ic = ia->ia_ic;
sc 385 dev/isa/pas.c if (sbdsp_probe(&sc->sc_sbdsp) == 0) {
sc 394 dev/isa/pas.c bus_space_unmap(sc->sc_sbdsp.sc_iot, sc->sc_sbdsp.sc_ioh, SBP_NPORT);
sc 407 dev/isa/pas.c struct pas_softc *sc = (struct pas_softc *)self;
sc 411 dev/isa/pas.c sc->sc_sbdsp.sc_isa = parent;
sc 412 dev/isa/pas.c sc->sc_sbdsp.sc_iobase = iobase;
sc 413 dev/isa/pas.c sc->sc_sbdsp.sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 414 dev/isa/pas.c IPL_AUDIO, sbdsp_intr, &sc->sc_sbdsp, sc->sc_sbdsp.sc_dev.dv_xname);
sc 416 dev/isa/pas.c printf(" ProAudio Spectrum %s [rev %d] ", pasnames[sc->model], sc->rev);
sc 418 dev/isa/pas.c sbdsp_attach(&sc->sc_sbdsp);
sc 421 dev/isa/pas.c pasnames[sc->model]);
sc 423 dev/isa/pas.c sc->rev);
sc 425 dev/isa/pas.c audio_attach_mi(&pas_hw_if, &sc->sc_sbdsp, &sc->sc_sbdsp.sc_dev);
sc 261 dev/isa/pcdisplay.c struct pcdisplay_softc *sc = (struct pcdisplay_softc *)self;
sc 272 dev/isa/pcdisplay.c sc->nscreens = 1;
sc 286 dev/isa/pcdisplay.c sc->sc_dc = dc;
sc 291 dev/isa/pcdisplay.c aa.accesscookie = sc;
sc 364 dev/isa/pcdisplay.c struct pcdisplay_softc *sc = v;
sc 366 dev/isa/pcdisplay.c if (sc->nscreens > 0)
sc 369 dev/isa/pcdisplay.c *cookiep = sc->sc_dc;
sc 373 dev/isa/pcdisplay.c sc->nscreens++;
sc 382 dev/isa/pcdisplay.c struct pcdisplay_softc *sc = v;
sc 384 dev/isa/pcdisplay.c if (sc->sc_dc == &pcdisplay_console_dc)
sc 387 dev/isa/pcdisplay.c sc->nscreens--;
sc 399 dev/isa/pcdisplay.c struct pcdisplay_softc *sc = v;
sc 401 dev/isa/pcdisplay.c if (cookie != sc->sc_dc)
sc 121 dev/isa/pckbc_isa.c struct pckbc_softc *sc = &isc->sc_pckbc;
sc 138 dev/isa/pckbc_isa.c sc->intr_establish = pckbc_isa_intr_establish;
sc 160 dev/isa/pckbc_isa.c t->t_sc = sc;
sc 161 dev/isa/pckbc_isa.c sc->id = t;
sc 166 dev/isa/pckbc_isa.c pckbc_attach(sc);
sc 170 dev/isa/pckbc_isa.c pckbc_isa_intr_establish(sc, slot)
sc 171 dev/isa/pckbc_isa.c struct pckbc_softc *sc;
sc 174 dev/isa/pckbc_isa.c struct pckbc_isa_softc *isc = (void *) sc;
sc 178 dev/isa/pckbc_isa.c IPL_TTY, pckbcintr, sc, sc->sc_dv.dv_xname);
sc 181 dev/isa/pckbc_isa.c sc->sc_dv.dv_xname, pckbc_slot_names[slot]);
sc 183 dev/isa/pckbc_isa.c printf("%s: using irq %d for %s slot\n", sc->sc_dv.dv_xname,
sc 155 dev/isa/pcppi.c struct pcppi_softc *sc = (struct pcppi_softc *)self;
sc 160 dev/isa/pcppi.c timeout_set(&sc->sc_bell_timeout, pcppi_bell_stop, sc);
sc 162 dev/isa/pcppi.c sc->sc_iot = iot = ia->ia_iot;
sc 164 dev/isa/pcppi.c if (bus_space_map(iot, IO_TIMER1, 4, 0, &sc->sc_pit1_ioh) ||
sc 165 dev/isa/pcppi.c bus_space_map(iot, IO_PPI, 1, 0, &sc->sc_ppi_ioh))
sc 170 dev/isa/pcppi.c sc->sc_bellactive = sc->sc_bellpitch = sc->sc_slp = 0;
sc 174 dev/isa/pcppi.c pckbd_hookup_bell(pcppi_pckbd_bell, sc);
sc 177 dev/isa/pcppi.c pa.pa_cookie = sc;
sc 187 dev/isa/pcppi.c struct pcppi_softc *sc = self;
sc 191 dev/isa/pcppi.c if (sc->sc_bellactive) {
sc 192 dev/isa/pcppi.c if (sc->sc_timeout) {
sc 193 dev/isa/pcppi.c sc->sc_timeout = 0;
sc 194 dev/isa/pcppi.c timeout_del(&sc->sc_bell_timeout);
sc 196 dev/isa/pcppi.c if (sc->sc_slp)
sc 200 dev/isa/pcppi.c pcppi_bell_stop(sc);
sc 201 dev/isa/pcppi.c sc->sc_bellpitch = 0;
sc 205 dev/isa/pcppi.c if (!sc->sc_bellactive || sc->sc_bellpitch != pitch) {
sc 207 dev/isa/pcppi.c bus_space_write_1(sc->sc_iot, sc->sc_pit1_ioh, TIMER_MODE,
sc 209 dev/isa/pcppi.c bus_space_write_1(sc->sc_iot, sc->sc_pit1_ioh, TIMER_CNTR2,
sc 211 dev/isa/pcppi.c bus_space_write_1(sc->sc_iot, sc->sc_pit1_ioh, TIMER_CNTR2,
sc 215 dev/isa/pcppi.c bus_space_write_1(sc->sc_iot, sc->sc_ppi_ioh, 0,
sc 216 dev/isa/pcppi.c bus_space_read_1(sc->sc_iot, sc->sc_ppi_ioh, 0)
sc 219 dev/isa/pcppi.c sc->sc_bellpitch = pitch;
sc 221 dev/isa/pcppi.c sc->sc_bellactive = 1;
sc 225 dev/isa/pcppi.c pcppi_bell_stop(sc);
sc 227 dev/isa/pcppi.c sc->sc_timeout = 1;
sc 228 dev/isa/pcppi.c timeout_add(&sc->sc_bell_timeout, period);
sc 230 dev/isa/pcppi.c sc->sc_slp = 1;
sc 232 dev/isa/pcppi.c sc->sc_slp = 0;
sc 242 dev/isa/pcppi.c struct pcppi_softc *sc = arg;
sc 246 dev/isa/pcppi.c sc->sc_timeout = 0;
sc 249 dev/isa/pcppi.c bus_space_write_1(sc->sc_iot, sc->sc_ppi_ioh, 0,
sc 250 dev/isa/pcppi.c bus_space_read_1(sc->sc_iot, sc->sc_ppi_ioh, 0)
sc 252 dev/isa/pcppi.c sc->sc_bellactive = 0;
sc 253 dev/isa/pcppi.c if (sc->sc_slp)
sc 296 dev/isa/pss.c pss_dspwrite(sc, data)
sc 297 dev/isa/pss.c struct pss_softc *sc;
sc 301 dev/isa/pss.c int pss_base = sc->sc_iobase;
sc 442 dev/isa/pss.c pss_testirq(struct pss_softc *sc, int intNum)
sc 444 dev/isa/pss.c int config = sc->sc_iobase + PSS_CONFIG;
sc 516 dev/isa/pss.c pss_testdma(sc, dmaNum)
sc 517 dev/isa/pss.c struct pss_softc *sc;
sc 520 dev/isa/pss.c int config = sc->sc_iobase + PSS_CONFIG;
sc 581 dev/isa/pss.c pss_reset_dsp(sc)
sc 582 dev/isa/pss.c struct pss_softc *sc;
sc 585 dev/isa/pss.c int pss_base = sc->sc_iobase;
sc 609 dev/isa/pss.c pss_download_dsp(sc, block, size)
sc 610 dev/isa/pss.c struct pss_softc *sc;
sc 615 dev/isa/pss.c int pss_base = sc->sc_iobase;
sc 627 dev/isa/pss.c pss_reset_dsp(sc);
sc 684 dev/isa/pss.c wss_dump_regs(sc)
sc 685 dev/isa/pss.c struct ad1848_softc *sc;
sc 689 dev/isa/pss.c (u_char)inb(sc->sc_iobase-WSS_CODEC+WSS_STATUS));
sc 693 dev/isa/pss.c pss_dump_regs(sc)
sc 694 dev/isa/pss.c struct pss_softc *sc;
sc 698 dev/isa/pss.c (u_short)inw(sc->sc_iobase+PSS_STATUS),
sc 699 dev/isa/pss.c (u_short)inw(sc->sc_iobase+PSS_ID_VERS));
sc 702 dev/isa/pss.c (u_short)inw(sc->sc_iobase+PSS_CONFIG),
sc 703 dev/isa/pss.c (u_short)inw(sc->sc_iobase+PSS_WSS_CONFIG));
sc 716 dev/isa/pss.c struct pss_softc *sc = self;
sc 745 dev/isa/pss.c sc->sc_iobase = iobase;
sc 748 dev/isa/pss.c pss_setaddr(WSS_BASE_ADDRESS, sc->sc_iobase+PSS_WSS_CONFIG); /* XXX! */
sc 752 dev/isa/pss.c outw(sc->sc_iobase+PSS_CONFIG, 0);
sc 753 dev/isa/pss.c outw(sc->sc_iobase+PSS_WSS_CONFIG, 0);
sc 754 dev/isa/pss.c outw(sc->sc_iobase+SB_CONFIG, 0);
sc 755 dev/isa/pss.c outw(sc->sc_iobase+MIDI_CONFIG, 0);
sc 756 dev/isa/pss.c outw(sc->sc_iobase+CD_CONFIG, 0);
sc 761 dev/isa/pss.c if (pss_testirq(sc, i) != 0)
sc 774 dev/isa/pss.c if (pss_testirq(sc, ia->ia_irq) == 0) {
sc 781 dev/isa/pss.c if (pss_testdma(sc, ia->ia_drq) == 0) {
sc 789 dev/isa/pss.c pss_setint(ia->ia_irq, sc->sc_iobase+PSS_CONFIG);
sc 790 dev/isa/pss.c pss_setdma(sc->sc_drq, sc->sc_iobase+PSS_CONFIG);
sc 796 dev/isa/pss.c outw(sc->sc_iobase+PSS_STATUS, inw(sc->sc_iobase+PSS_STATUS) | GAME_BIT);
sc 798 dev/isa/pss.c outw(sc->sc_iobase+PSS_STATUS, inw(sc->sc_iobase+PSS_STATUS) & GAME_BIT_MASK);
sc 802 dev/isa/pss.c pss_reset_dsp(sc);
sc 816 dev/isa/pss.c struct ad1848_softc *sc = match;
sc 818 dev/isa/pss.c struct cfdata *cf = (void *)sc->sc_dev.dv_cfdata;
sc 823 dev/isa/pss.c sc->sc_iot = ia->ia_iot;
sc 824 dev/isa/pss.c sc->sc_iobase = cf->cf_iobase + WSS_CODEC;
sc 830 dev/isa/pss.c if (ad1848_probe(sc) == 0) {
sc 831 dev/isa/pss.c DPRINTF(("sp: no ad1848 ? iobase=%x\n", sc->sc_iobase));
sc 851 dev/isa/pss.c sc->sc_irq = i;
sc 856 dev/isa/pss.c sc->sc_irq = cf->cf_irq;
sc 857 dev/isa/pss.c if (pss_testirq(pc, sc->sc_irq) == 0) {
sc 858 dev/isa/pss.c DPRINTF(("sp: configured IRQ unavailable (%d)\n", sc->sc_irq));
sc 876 dev/isa/pss.c sc->sc_drq = cf->cf_drq = i;
sc 881 dev/isa/pss.c if (pss_testdma(pc, sc->sc_drq) == 0) {
sc 882 dev/isa/pss.c DPRINTF(("sp: configured DMA channel unavailable (%d)\n", sc->sc_drq));
sc 885 dev/isa/pss.c sc->sc_drq = cf->cf_drq;
sc 887 dev/isa/pss.c sc->sc_recdrq = sc->sc_drq;
sc 890 dev/isa/pss.c if ((bits = wss_interrupt_bits[sc->sc_irq]) == 0xff) {
sc 891 dev/isa/pss.c DPRINTF(("sp: invalid interrupt configuration (irq=%d)\n", sc->sc_irq));
sc 895 dev/isa/pss.c outb(sc->sc_iobase+WSS_CONFIG, (bits | 0x40));
sc 896 dev/isa/pss.c if ((inb(sc->sc_iobase+WSS_STATUS) & 0x40) == 0) /* XXX What do these bits mean ? */
sc 897 dev/isa/pss.c DPRINTF(("sp: IRQ %x\n", inb(sc->sc_iobase+WSS_STATUS)));
sc 899 dev/isa/pss.c outb(sc->sc_iobase+WSS_CONFIG, (bits | wss_dma_bits[sc->sc_drq]));
sc 901 dev/isa/pss.c pc->ad1848_sc = sc;
sc 902 dev/isa/pss.c sc->parent = pc;
sc 913 dev/isa/pss.c struct mpu_softc *sc = match;
sc 915 dev/isa/pss.c struct cfdata *cf = (void *)sc->sc_dev.dv_cfdata;
sc 918 dev/isa/pss.c sc->sc_iobase = cf->cf_iobase;
sc 932 dev/isa/pss.c sc->sc_irq = i;
sc 937 dev/isa/pss.c sc->sc_irq = cf->cf_irq;
sc 939 dev/isa/pss.c if (pss_testirq(pc, sc->sc_irq) == 0) {
sc 940 dev/isa/pss.c printf("pss: configured MIDI IRQ unavailable (%d)\n", sc->sc_irq);
sc 946 dev/isa/pss.c DPRINTF(("pss: mpu port 0x%x irq %d\n", sc->sc_iobase, sc->sc_irq));
sc 947 dev/isa/pss.c pss_setaddr(sc->sc_iobase, pc->sc_iobase+MIDI_CONFIG);
sc 948 dev/isa/pss.c pss_setint(sc->sc_irq, pc->sc_iobase+MIDI_CONFIG);
sc 958 dev/isa/pss.c struct pcd_softc *sc = match;
sc 960 dev/isa/pss.c struct cfdata *cf = (void *)sc->sc_dev.dv_cfdata;
sc 963 dev/isa/pss.c sc->sc_iobase = cf->cf_iobase;
sc 965 dev/isa/pss.c pss_setaddr(sc->sc_iobase, pc->sc_iobase+CD_CONFIG);
sc 986 dev/isa/pss.c sc->sc_irq = i;
sc 991 dev/isa/pss.c sc->sc_irq = cf->cf_irq;
sc 993 dev/isa/pss.c if (pss_testirq(pc, sc->sc_irq) == 0) {
sc 994 dev/isa/pss.c printf("pcd: configured CD IRQ unavailable (%d)\n", sc->sc_irq);
sc 999 dev/isa/pss.c pss_setint(sc->sc_irq, pc->sc_iobase+CD_CONFIG);
sc 1014 dev/isa/pss.c struct pss_softc *sc = (struct pss_softc *)self;
sc 1020 dev/isa/pss.c sc->sc_iobase = iobase;
sc 1021 dev/isa/pss.c sc->sc_drq = ia->ia_drq;
sc 1024 dev/isa/pss.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, IPL_AUDIO,
sc 1025 dev/isa/pss.c pssintr, sc, sc->sc_dev.dv_xname);
sc 1027 dev/isa/pss.c vers = (inw(sc->sc_iobase+PSS_ID_VERS)&0xff) - 1;
sc 1032 dev/isa/pss.c sc->out_port = PSS_MASTER_VOL;
sc 1034 dev/isa/pss.c (void)pss_set_master_mode(sc, PSS_SPKR_STEREO);
sc 1035 dev/isa/pss.c (void)pss_set_master_gain(sc, &vol);
sc 1036 dev/isa/pss.c (void)pss_set_treble(sc, AUDIO_MAX_GAIN/2);
sc 1037 dev/isa/pss.c (void)pss_set_bass(sc, AUDIO_MAX_GAIN/2);
sc 1039 dev/isa/pss.c audio_attach_mi(&pss_audio_if, sc->ad1848_sc, &sc->ad1848_sc->sc_dev);
sc 1047 dev/isa/pss.c struct ad1848_softc *sc = (struct ad1848_softc *)self;
sc 1048 dev/isa/pss.c struct cfdata *cf = (void *)sc->sc_dev.dv_cfdata;
sc 1052 dev/isa/pss.c sc->sc_iobase = iobase;
sc 1053 dev/isa/pss.c sc->sc_drq = cf->cf_drq;
sc 1055 dev/isa/pss.c sc->sc_ih = isa_intr_establish(ic, cf->cf_irq, IST_EDGE, IPL_AUDIO,
sc 1056 dev/isa/pss.c ad1848_intr, sc, sc->sc_dev.dv_xname);
sc 1058 dev/isa/pss.c sc->sc_isa = parent->dv_parent;
sc 1060 dev/isa/pss.c ad1848_attach(sc);
sc 1071 dev/isa/pss.c struct mpu_softc *sc = (struct mpu_softc *)self;
sc 1072 dev/isa/pss.c struct cfdata *cf = (void *)sc->sc_dev.dv_cfdata;
sc 1076 dev/isa/pss.c sc->sc_iobase = iobase;
sc 1078 dev/isa/pss.c sc->sc_ih = isa_intr_establish(ic, cf->cf_irq, IST_EDGE, IPL_AUDIO,
sc 1079 dev/isa/pss.c mpuintr, sc, sc->sc_dev.dv_xname);
sc 1083 dev/isa/pss.c sc->sc_iobase, MIDI_NPORT, cf->cf_irq);
sc 1091 dev/isa/pss.c struct pcd_softc *sc = (struct pcd_softc *)self;
sc 1092 dev/isa/pss.c struct cfdata *cf = (void *)sc->sc_dev.dv_cfdata;
sc 1100 dev/isa/pss.c sc->sc_iobase = iobase;
sc 1104 dev/isa/pss.c sc->sc_iobase, 2, cf->cf_irq);
sc 1110 dev/isa/pss.c pss_set_master_gain(sc, gp)
sc 1111 dev/isa/pss.c struct pss_softc *sc;
sc 1126 dev/isa/pss.c pss_dspwrite(sc, SET_MASTER_COMMAND);
sc 1127 dev/isa/pss.c pss_dspwrite(sc, MASTER_VOLUME_LEFT|(PHILLIPS_VOL_CONSTANT + gp->left / PHILLIPS_VOL_STEP));
sc 1128 dev/isa/pss.c pss_dspwrite(sc, SET_MASTER_COMMAND);
sc 1129 dev/isa/pss.c pss_dspwrite(sc, MASTER_VOLUME_RIGHT|(PHILLIPS_VOL_CONSTANT + gp->right / PHILLIPS_VOL_STEP));
sc 1132 dev/isa/pss.c sc->master_volume = *gp;
sc 1137 dev/isa/pss.c pss_set_master_mode(sc, mode)
sc 1138 dev/isa/pss.c struct pss_softc *sc;
sc 1157 dev/isa/pss.c pss_dspwrite(sc, SET_MASTER_COMMAND);
sc 1158 dev/isa/pss.c pss_dspwrite(sc, MASTER_SWITCH | mode);
sc 1161 dev/isa/pss.c sc->master_mode = mode;
sc 1167 dev/isa/pss.c pss_set_treble(sc, treb)
sc 1168 dev/isa/pss.c struct pss_softc *sc;
sc 1178 dev/isa/pss.c pss_dspwrite(sc, SET_MASTER_COMMAND);
sc 1179 dev/isa/pss.c pss_dspwrite(sc, MASTER_TREBLE|(PHILLIPS_TREBLE_CONSTANT + treb / PHILLIPS_TREBLE_STEP));
sc 1182 dev/isa/pss.c sc->monitor_treble = treb;
sc 1188 dev/isa/pss.c pss_set_bass(sc, bass)
sc 1189 dev/isa/pss.c struct pss_softc *sc;
sc 1199 dev/isa/pss.c pss_dspwrite(sc, SET_MASTER_COMMAND);
sc 1200 dev/isa/pss.c pss_dspwrite(sc, MASTER_BASS|(PHILLIPS_BASS_CONSTANT + bass / PHILLIPS_BASS_STEP));
sc 1203 dev/isa/pss.c sc->monitor_bass = bass;
sc 1209 dev/isa/pss.c pss_get_master_gain(sc, gp)
sc 1210 dev/isa/pss.c struct pss_softc *sc;
sc 1213 dev/isa/pss.c *gp = sc->master_volume;
sc 1218 dev/isa/pss.c pss_get_master_mode(sc, mode)
sc 1219 dev/isa/pss.c struct pss_softc *sc;
sc 1222 dev/isa/pss.c *mode = sc->master_mode;
sc 1227 dev/isa/pss.c pss_get_treble(sc, tp)
sc 1228 dev/isa/pss.c struct pss_softc *sc;
sc 1231 dev/isa/pss.c *tp = sc->monitor_treble;
sc 1236 dev/isa/pss.c pss_get_bass(sc, bp)
sc 1237 dev/isa/pss.c struct pss_softc *sc;
sc 1240 dev/isa/pss.c *bp = sc->monitor_bass;
sc 1256 dev/isa/pss.c struct pss_softc *sc = arg;
sc 1259 dev/isa/pss.c sr = inw(sc->sc_iobase+PSS_STATUS);
sc 1261 dev/isa/pss.c DPRINTF(("pssintr: sc=%p st=%x\n", sc, sr));
sc 1264 dev/isa/pss.c outw(sc->sc_iobase+PSS_IRQ_ACK, 0);
sc 1280 dev/isa/pss.c struct mpu_softc *sc = arg;
sc 1283 dev/isa/pss.c sr = inb(sc->sc_iobase+MIDI_STATUS_REG);
sc 1285 dev/isa/pss.c printf("mpuintr: sc=%p sr=%x\n", sc, sr);
sc 1323 dev/isa/pss.c struct pss_softc *sc = ac->parent;
sc 1334 dev/isa/pss.c error = pss_set_master_gain(sc, &vol);
sc 1340 dev/isa/pss.c error = pss_set_master_mode(sc, cp->un.ord);
sc 1345 dev/isa/pss.c error = pss_set_treble(sc, (u_char)cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
sc 1350 dev/isa/pss.c error = pss_set_bass(sc, (u_char)cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]);
sc 1367 dev/isa/pss.c struct pss_softc *sc = ac->parent;
sc 1380 dev/isa/pss.c error = pss_get_master_gain(sc, &vol);
sc 1388 dev/isa/pss.c error = pss_get_treble(sc, &eq);
sc 1396 dev/isa/pss.c error = pss_get_bass(sc, &eq);
sc 1404 dev/isa/pss.c error = pss_get_master_mode(sc, &cp->un.ord);
sc 78 dev/isa/radiotrack.c rtattach(struct rt_softc *sc) {
sc 79 dev/isa/radiotrack.c sc->sc_freq = MIN_FM_FREQ;
sc 80 dev/isa/radiotrack.c sc->sc_mute = 0;
sc 81 dev/isa/radiotrack.c sc->sc_vol = 0;
sc 82 dev/isa/radiotrack.c sc->sc_rf = LM700X_REF_050;
sc 83 dev/isa/radiotrack.c sc->sc_stereo = LM700X_STEREO;
sc 85 dev/isa/radiotrack.c sc->lm.wzcl = RT_WREN_ON | RT_CLCK_OFF | RT_DATA_OFF;
sc 86 dev/isa/radiotrack.c sc->lm.wzch = RT_WREN_ON | RT_CLCK_ON | RT_DATA_OFF;
sc 87 dev/isa/radiotrack.c sc->lm.wocl = RT_WREN_ON | RT_CLCK_OFF | RT_DATA_ON;
sc 88 dev/isa/radiotrack.c sc->lm.woch = RT_WREN_ON | RT_CLCK_ON | RT_DATA_ON;
sc 90 dev/isa/radiotrack.c switch (sc->sc_ct) {
sc 92 dev/isa/radiotrack.c sc->lm.initdata = 0;
sc 93 dev/isa/radiotrack.c sc->lm.rsetdata = RT_SIGNAL_METER;
sc 94 dev/isa/radiotrack.c sc->lm.init = rt_lm700x_init;
sc 95 dev/isa/radiotrack.c sc->lm.rset = rt_lm700x_rset;
sc 98 dev/isa/radiotrack.c sc->lm.initdata = RT_CARD_OFF;
sc 99 dev/isa/radiotrack.c sc->lm.rsetdata = RT_CARD_ON;
sc 100 dev/isa/radiotrack.c sc->lm.init = sfi_lm700x_init;
sc 101 dev/isa/radiotrack.c sc->lm.rset = sfi_lm700x_init;
sc 105 dev/isa/radiotrack.c rt_set_freq(sc, sc->sc_freq);
sc 106 dev/isa/radiotrack.c rt_set_mute(sc, sc->sc_vol);
sc 108 dev/isa/radiotrack.c radio_attach_mi(&rt_hw_if, sc, &sc->sc_dev);
sc 114 dev/isa/radiotrack.c struct rt_softc *sc = v;
sc 116 dev/isa/radiotrack.c sc->sc_mute = ri->mute ? 1 : 0;
sc 117 dev/isa/radiotrack.c sc->sc_rf = lm700x_encode_ref(ri->rfreq);
sc 119 dev/isa/radiotrack.c switch (sc->sc_ct) {
sc 121 dev/isa/radiotrack.c sc->sc_vol = rt_conv_vol(ri->volume);
sc 124 dev/isa/radiotrack.c sc->sc_vol = ri->volume ? 1 : 0;
sc 131 dev/isa/radiotrack.c sc->sc_stereo = ri->stereo ? LM700X_STEREO : LM700X_MONO;
sc 133 dev/isa/radiotrack.c rt_set_freq(sc, ri->freq);
sc 134 dev/isa/radiotrack.c rt_set_mute(sc, sc->sc_vol);
sc 142 dev/isa/radiotrack.c struct rt_softc *sc = v;
sc 144 dev/isa/radiotrack.c switch (sc->sc_ct) {
sc 147 dev/isa/radiotrack.c ri->info = 3 & rt_state(sc->lm.iot, sc->lm.ioh);
sc 148 dev/isa/radiotrack.c ri->volume = rt_unconv_vol(sc->sc_vol);
sc 152 dev/isa/radiotrack.c ri->volume = sc->sc_vol ? 255 : 0;
sc 160 dev/isa/radiotrack.c ri->mute = sc->sc_mute;
sc 161 dev/isa/radiotrack.c ri->stereo = sc->sc_stereo == LM700X_STEREO ? 0 : 1;
sc 162 dev/isa/radiotrack.c ri->rfreq = lm700x_decode_ref(sc->sc_rf);
sc 163 dev/isa/radiotrack.c ri->freq = sc->sc_freq;
sc 175 dev/isa/radiotrack.c rt_set_mute(struct rt_softc *sc, int vol)
sc 179 dev/isa/radiotrack.c if (sc->sc_ct == CARD_UNKNOWN)
sc 182 dev/isa/radiotrack.c if (sc->sc_ct == CARD_SF16FMI) {
sc 184 dev/isa/radiotrack.c bus_space_write_1(sc->lm.iot, sc->lm.ioh, 0,
sc 185 dev/isa/radiotrack.c sc->sc_mute ? RT_CARD_OFF : val);
sc 190 dev/isa/radiotrack.c if (sc->sc_mute) {
sc 191 dev/isa/radiotrack.c bus_space_write_1(sc->lm.iot, sc->lm.ioh, 0,
sc 194 dev/isa/radiotrack.c bus_space_write_1(sc->lm.iot, sc->lm.ioh, 0,
sc 196 dev/isa/radiotrack.c bus_space_write_1(sc->lm.iot, sc->lm.ioh, 0, RT_CARD_OFF);
sc 197 dev/isa/radiotrack.c bus_space_write_1(sc->lm.iot, sc->lm.ioh, 0, RT_CARD_OFF);
sc 199 dev/isa/radiotrack.c val = sc->sc_vol - vol;
sc 202 dev/isa/radiotrack.c bus_space_write_1(sc->lm.iot, sc->lm.ioh, 0,
sc 205 dev/isa/radiotrack.c bus_space_write_1(sc->lm.iot, sc->lm.ioh, 0,
sc 209 dev/isa/radiotrack.c bus_space_write_1(sc->lm.iot, sc->lm.ioh, 0,
sc 215 dev/isa/radiotrack.c rt_set_freq(struct rt_softc *sc, u_int32_t nfreq)
sc 224 dev/isa/radiotrack.c sc->sc_freq = nfreq;
sc 226 dev/isa/radiotrack.c reg = lm700x_encode_freq(nfreq, sc->sc_rf);
sc 227 dev/isa/radiotrack.c reg |= sc->sc_stereo | sc->sc_rf | LM700X_DIVIDER_FM;
sc 229 dev/isa/radiotrack.c lm700x_hardware_write(&sc->lm, reg, RT_VOLUME_STEADY);
sc 231 dev/isa/radiotrack.c rt_set_mute(sc, sc->sc_vol);
sc 154 dev/isa/radiotrack2.c struct rtii_softc *sc = (void *) self;
sc 156 dev/isa/radiotrack2.c struct cfdata *cf = sc->dev.dv_cfdata;
sc 158 dev/isa/radiotrack2.c sc->tea.iot = ia->ia_iot;
sc 159 dev/isa/radiotrack2.c sc->mute = 0;
sc 160 dev/isa/radiotrack2.c sc->vol = 0;
sc 161 dev/isa/radiotrack2.c sc->freq = MIN_FM_FREQ;
sc 162 dev/isa/radiotrack2.c sc->stereo = TEA5757_STEREO;
sc 163 dev/isa/radiotrack2.c sc->lock = TEA5757_S030;
sc 166 dev/isa/radiotrack2.c if (bus_space_map(sc->tea.iot, ia->ia_iobase, ia->ia_iosize,
sc 167 dev/isa/radiotrack2.c 0, &sc->tea.ioh)) {
sc 172 dev/isa/radiotrack2.c sc->tea.offset = 0;
sc 173 dev/isa/radiotrack2.c sc->tea.flags = cf->cf_flags;
sc 175 dev/isa/radiotrack2.c sc->tea.init = rtii_init;
sc 176 dev/isa/radiotrack2.c sc->tea.rset = rtii_rset;
sc 177 dev/isa/radiotrack2.c sc->tea.write_bit = rtii_write_bit;
sc 178 dev/isa/radiotrack2.c sc->tea.read = rtii_hw_read;
sc 181 dev/isa/radiotrack2.c tea5757_set_freq(&sc->tea, sc->stereo, sc->lock, sc->freq);
sc 182 dev/isa/radiotrack2.c rtii_set_mute(sc);
sc 184 dev/isa/radiotrack2.c radio_attach_mi(&rtii_hw_if, sc, &sc->dev);
sc 191 dev/isa/radiotrack2.c rtii_set_mute(struct rtii_softc *sc)
sc 195 dev/isa/radiotrack2.c mute = (sc->mute || !sc->vol) ? RTII_MUTE : RTII_UNMUTE;
sc 196 dev/isa/radiotrack2.c bus_space_write_1(sc->tea.iot, sc->tea.ioh, 0, mute);
sc 198 dev/isa/radiotrack2.c bus_space_write_1(sc->tea.iot, sc->tea.ioh, 0, mute);
sc 218 dev/isa/radiotrack2.c struct rtii_softc sc;
sc 221 dev/isa/radiotrack2.c sc.tea.iot = iot;
sc 222 dev/isa/radiotrack2.c sc.tea.ioh = ioh;
sc 223 dev/isa/radiotrack2.c sc.tea.offset = 0;
sc 224 dev/isa/radiotrack2.c sc.tea.flags = flags;
sc 225 dev/isa/radiotrack2.c sc.tea.init = rtii_init;
sc 226 dev/isa/radiotrack2.c sc.tea.rset = rtii_rset;
sc 227 dev/isa/radiotrack2.c sc.tea.write_bit = rtii_write_bit;
sc 228 dev/isa/radiotrack2.c sc.tea.read = rtii_hw_read;
sc 229 dev/isa/radiotrack2.c sc.lock = TEA5757_S030;
sc 230 dev/isa/radiotrack2.c sc.stereo = TEA5757_STEREO;
sc 237 dev/isa/radiotrack2.c sc.freq = MIN_FM_FREQ;
sc 238 dev/isa/radiotrack2.c tea5757_set_freq(&sc.tea, sc.stereo, sc.lock, sc.freq);
sc 239 dev/isa/radiotrack2.c rtii_set_mute(&sc);
sc 240 dev/isa/radiotrack2.c freq = rtii_hw_read(iot, ioh, sc.tea.offset);
sc 241 dev/isa/radiotrack2.c if (tea5757_decode_freq(freq, sc.tea.flags & TEA5757_TEA5759)
sc 242 dev/isa/radiotrack2.c == sc.freq)
sc 285 dev/isa/radiotrack2.c struct rtii_softc *sc = v;
sc 287 dev/isa/radiotrack2.c ri->mute = sc->mute;
sc 288 dev/isa/radiotrack2.c ri->volume = sc->vol ? 255 : 0;
sc 289 dev/isa/radiotrack2.c ri->stereo = sc->stereo == TEA5757_STEREO ? 1 : 0;
sc 292 dev/isa/radiotrack2.c ri->lock = tea5757_decode_lock(sc->lock);
sc 294 dev/isa/radiotrack2.c ri->freq = sc->freq = tea5757_decode_freq(rtii_hw_read(sc->tea.iot,
sc 295 dev/isa/radiotrack2.c sc->tea.ioh, sc->tea.offset), sc->tea.flags & TEA5757_TEA5759);
sc 297 dev/isa/radiotrack2.c switch (bus_space_read_1(sc->tea.iot, sc->tea.ioh, 0)) {
sc 314 dev/isa/radiotrack2.c struct rtii_softc *sc = v;
sc 316 dev/isa/radiotrack2.c sc->mute = ri->mute ? 1 : 0;
sc 317 dev/isa/radiotrack2.c sc->vol = ri->volume ? 255 : 0;
sc 318 dev/isa/radiotrack2.c sc->stereo = ri->stereo ? TEA5757_STEREO: TEA5757_MONO;
sc 319 dev/isa/radiotrack2.c sc->lock = tea5757_encode_lock(ri->lock);
sc 320 dev/isa/radiotrack2.c ri->freq = sc->freq = tea5757_set_freq(&sc->tea,
sc 321 dev/isa/radiotrack2.c sc->lock, sc->stereo, ri->freq);
sc 322 dev/isa/radiotrack2.c rtii_set_mute(sc);
sc 330 dev/isa/radiotrack2.c struct rtii_softc *sc = v;
sc 332 dev/isa/radiotrack2.c tea5757_search(&sc->tea, sc->lock, sc->stereo, f);
sc 333 dev/isa/radiotrack2.c rtii_set_mute(sc);
sc 80 dev/isa/rt_isa.c struct rt_softc *sc = (void *) self;
sc 92 dev/isa/rt_isa.c sc->sc_ct = CARD_RADIOTRACK;
sc 93 dev/isa/rt_isa.c sc->lm.iot = ia->ia_iot;
sc 94 dev/isa/rt_isa.c sc->lm.ioh = ioh;
sc 96 dev/isa/rt_isa.c rtattach(sc);
sc 59 dev/isa/rt_isapnp.c struct rt_softc *sc = (void *)self;
sc 64 dev/isa/rt_isapnp.c sc->sc_ct = CARD_SF16FMI;
sc 65 dev/isa/rt_isapnp.c sc->lm.iot = ia->ia_iot;
sc 66 dev/isa/rt_isapnp.c sc->lm.ioh = ia->ipa_io[0].h; /* ia_ioh */
sc 68 dev/isa/rt_isapnp.c rtattach(sc);
sc 148 dev/isa/rtfps.c struct rtfps_softc *sc = (void *)self;
sc 160 dev/isa/rtfps.c sc->sc_iot = ia->ia_iot;
sc 161 dev/isa/rtfps.c sc->sc_iobase = ia->ia_iobase;
sc 165 dev/isa/rtfps.c sc->sc_irqport = irqport[ia->ia_irq];
sc 168 dev/isa/rtfps.c if (bus_space_map(iot, sc->sc_iobase + i * COM_NPORTS,
sc 169 dev/isa/rtfps.c COM_NPORTS, 0, &sc->sc_slaveioh[i]))
sc 171 dev/isa/rtfps.c if (bus_space_map(iot, sc->sc_irqport, 1, 0, &sc->sc_irqioh))
sc 173 dev/isa/rtfps.c sc->sc_irqport);
sc 175 dev/isa/rtfps.c bus_space_write_1(iot, sc->sc_irqioh, 0, 0);
sc 181 dev/isa/rtfps.c ca.ca_iot = sc->sc_iot;
sc 182 dev/isa/rtfps.c ca.ca_ioh = sc->sc_slaveioh[i];
sc 183 dev/isa/rtfps.c ca.ca_iobase = sc->sc_iobase + i * COM_NPORTS;
sc 186 dev/isa/rtfps.c sc->sc_slaves[i] = config_found(self, &ca, rtfpsprint);
sc 187 dev/isa/rtfps.c if (sc->sc_slaves[i] != NULL)
sc 188 dev/isa/rtfps.c sc->sc_alive |= 1 << i;
sc 191 dev/isa/rtfps.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 192 dev/isa/rtfps.c IPL_TTY, rtfpsintr, sc, sc->sc_dev.dv_xname);
sc 199 dev/isa/rtfps.c struct rtfps_softc *sc = arg;
sc 200 dev/isa/rtfps.c bus_space_tag_t iot = sc->sc_iot;
sc 201 dev/isa/rtfps.c int alive = sc->sc_alive;
sc 203 dev/isa/rtfps.c bus_space_write_1(iot, sc->sc_irqioh, 0, 0);
sc 207 dev/isa/rtfps.c comintr(sc->sc_slaves[n]);
sc 147 dev/isa/sb.c sbmatch(sc)
sc 148 dev/isa/sb.c struct sbdsp_softc *sc;
sc 158 dev/isa/sb.c if (sbdsp_probe(sc) == 0)
sc 164 dev/isa/sb.c if (ISSBPROCLASS(sc)) {
sc 165 dev/isa/sb.c if (!SBP_DRQ_VALID(sc->sc_drq8)) {
sc 167 dev/isa/sb.c sc->sc_dev.dv_xname, sc->sc_drq8));
sc 171 dev/isa/sb.c if (!SB_DRQ_VALID(sc->sc_drq8)) {
sc 173 dev/isa/sb.c sc->sc_dev.dv_xname, sc->sc_drq8));
sc 178 dev/isa/sb.c if (0 <= sc->sc_drq16 && sc->sc_drq16 <= 3)
sc 184 dev/isa/sb.c sc->sc_drq16 = -1;
sc 186 dev/isa/sb.c if (ISSB16CLASS(sc)) {
sc 187 dev/isa/sb.c if (sc->sc_drq16 == -1)
sc 188 dev/isa/sb.c sc->sc_drq16 = sc->sc_drq8;
sc 189 dev/isa/sb.c if (!SB16_DRQ_VALID(sc->sc_drq16)) {
sc 191 dev/isa/sb.c sc->sc_dev.dv_xname, sc->sc_drq16));
sc 195 dev/isa/sb.c sc->sc_drq16 = sc->sc_drq8;
sc 197 dev/isa/sb.c if (ISSBPROCLASS(sc)) {
sc 198 dev/isa/sb.c if (!SBP_IRQ_VALID(sc->sc_irq)) {
sc 200 dev/isa/sb.c sc->sc_dev.dv_xname, sc->sc_irq));
sc 204 dev/isa/sb.c if (!SB_IRQ_VALID(sc->sc_irq)) {
sc 206 dev/isa/sb.c sc->sc_dev.dv_xname, sc->sc_irq));
sc 211 dev/isa/sb.c if (ISSB16CLASS(sc)) {
sc 214 dev/isa/sb.c DPRINTF(("%s: old drq conf %02x\n", sc->sc_dev.dv_xname,
sc 215 dev/isa/sb.c sbdsp_mix_read(sc, SBP_SET_DRQ)));
sc 216 dev/isa/sb.c DPRINTF(("%s: try drq conf %02x\n", sc->sc_dev.dv_xname,
sc 217 dev/isa/sb.c drq_conf[sc->sc_drq16] | drq_conf[sc->sc_drq8]));
sc 219 dev/isa/sb.c w = drq_conf[sc->sc_drq16] | drq_conf[sc->sc_drq8];
sc 220 dev/isa/sb.c sbdsp_mix_write(sc, SBP_SET_DRQ, w);
sc 221 dev/isa/sb.c r = sbdsp_mix_read(sc, SBP_SET_DRQ) & 0xeb;
sc 223 dev/isa/sb.c DPRINTF(("%s: setting drq mask %02x failed, got %02x\n", sc->sc_dev.dv_xname, w, r));
sc 227 dev/isa/sb.c DPRINTF(("%s: new drq conf %02x\n", sc->sc_dev.dv_xname,
sc 228 dev/isa/sb.c sbdsp_mix_read(sc, SBP_SET_DRQ)));
sc 232 dev/isa/sb.c DPRINTF(("%s: old irq conf %02x\n", sc->sc_dev.dv_xname,
sc 233 dev/isa/sb.c sbdsp_mix_read(sc, SBP_SET_IRQ)));
sc 234 dev/isa/sb.c DPRINTF(("%s: try irq conf %02x\n", sc->sc_dev.dv_xname,
sc 235 dev/isa/sb.c irq_conf[sc->sc_irq]));
sc 237 dev/isa/sb.c w = irq_conf[sc->sc_irq];
sc 238 dev/isa/sb.c sbdsp_mix_write(sc, SBP_SET_IRQ, w);
sc 239 dev/isa/sb.c r = sbdsp_mix_read(sc, SBP_SET_IRQ) & 0x0f;
sc 242 dev/isa/sb.c sc->sc_dev.dv_xname, w, r));
sc 246 dev/isa/sb.c DPRINTF(("%s: new irq conf %02x\n", sc->sc_dev.dv_xname,
sc 247 dev/isa/sb.c sbdsp_mix_read(sc, SBP_SET_IRQ)));
sc 256 dev/isa/sb.c sbattach(sc)
sc 257 dev/isa/sb.c struct sbdsp_softc *sc;
sc 264 dev/isa/sb.c sc->sc_ih = isa_intr_establish(sc->sc_ic, sc->sc_irq, IST_EDGE,
sc 265 dev/isa/sb.c IPL_AUDIO, sbdsp_intr, sc, sc->sc_dev.dv_xname);
sc 267 dev/isa/sb.c sbdsp_attach(sc);
sc 270 dev/isa/sb.c sc->sc_hasmpu = 0;
sc 271 dev/isa/sb.c if (ISSB16CLASS(sc) && sc->sc_mpu_sc.iobase != 0) {
sc 272 dev/isa/sb.c sc->sc_mpu_sc.iot = sc->sc_iot;
sc 273 dev/isa/sb.c if (mpu_find(&sc->sc_mpu_sc)) {
sc 274 dev/isa/sb.c sc->sc_hasmpu = 1;
sc 278 dev/isa/sb.c midi_attach_mi(mhw, sc, &sc->sc_dev);
sc 281 dev/isa/sb.c audio_attach_mi(&sb_hw_if, sc, &sc->sc_dev);
sc 286 dev/isa/sb.c (void)config_found(&sc->sc_dev, &arg, audioprint);
sc 298 dev/isa/sb.c struct sbdsp_softc *sc = addr;
sc 302 dev/isa/sb.c if (sc->sc_model == SB_JAZZ)
sc 307 dev/isa/sb.c SBVER_MAJOR(sc->sc_version),
sc 308 dev/isa/sb.c SBVER_MINOR(sc->sc_version));
sc 309 dev/isa/sb.c if (0 <= sc->sc_model && sc->sc_model < sizeof names / sizeof names[0])
sc 310 dev/isa/sb.c config = names[sc->sc_model];
sc 83 dev/isa/sb_isa.c struct sbdsp_softc probesc, *sc = &probesc;
sc 85 dev/isa/sb_isa.c bzero(sc, sizeof *sc);
sc 86 dev/isa/sb_isa.c sc->sc_dev.dv_cfdata = ((struct device *)match)->dv_cfdata;
sc 87 dev/isa/sb_isa.c strlcpy(sc->sc_dev.dv_xname, "sb", sizeof sc->sc_dev.dv_xname);
sc 88 dev/isa/sb_isa.c return sbfind(parent, sc, aux);
sc 92 dev/isa/sb_isa.c sbfind(parent, sc, ia)
sc 94 dev/isa/sb_isa.c struct sbdsp_softc *sc;
sc 102 dev/isa/sb_isa.c sc->sc_iot = ia->ia_iot;
sc 105 dev/isa/sb_isa.c if (bus_space_map(sc->sc_iot, ia->ia_iobase, SBP_NPORT, 0,
sc 106 dev/isa/sb_isa.c &sc->sc_ioh))
sc 109 dev/isa/sb_isa.c sc->sc_iobase = ia->ia_iobase;
sc 110 dev/isa/sb_isa.c sc->sc_irq = ia->ia_irq;
sc 111 dev/isa/sb_isa.c sc->sc_drq8 = ia->ia_drq;
sc 112 dev/isa/sb_isa.c sc->sc_drq16 = ia->ia_drq2;
sc 113 dev/isa/sb_isa.c sc->sc_ic = ia->ia_ic;
sc 115 dev/isa/sb_isa.c if (!sbmatch(sc))
sc 118 dev/isa/sb_isa.c if ((sc->sc_drq8 != -1 && !isa_drq_isfree(parent, sc->sc_drq8)) ||
sc 119 dev/isa/sb_isa.c (sc->sc_drq16 != -1 && !isa_drq_isfree(parent, sc->sc_drq16)))
sc 122 dev/isa/sb_isa.c if (ISSBPROCLASS(sc))
sc 127 dev/isa/sb_isa.c if (!ISSB16CLASS(sc) && sc->sc_model != SB_JAZZ)
sc 130 dev/isa/sb_isa.c ia->ia_irq = sc->sc_irq;
sc 135 dev/isa/sb_isa.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, SBP_NPORT);
sc 149 dev/isa/sb_isa.c struct sbdsp_softc *sc = (struct sbdsp_softc *)self;
sc 152 dev/isa/sb_isa.c if (!sbfind(parent, sc, ia) ||
sc 153 dev/isa/sb_isa.c bus_space_map(sc->sc_iot, ia->ia_iobase, ia->ia_iosize, 0,
sc 154 dev/isa/sb_isa.c &sc->sc_ioh)) {
sc 155 dev/isa/sb_isa.c printf("%s: sbfind failed\n", sc->sc_dev.dv_xname);
sc 158 dev/isa/sb_isa.c sc->sc_ic = ia->ia_ic;
sc 159 dev/isa/sb_isa.c sc->sc_isa = parent;
sc 160 dev/isa/sb_isa.c sbattach(sc);
sc 94 dev/isa/sb_isapnp.c struct sbdsp_softc *sc = (struct sbdsp_softc *) self;
sc 97 dev/isa/sb_isapnp.c sc->sc_iot = ia->ia_iot;
sc 98 dev/isa/sb_isapnp.c sc->sc_ioh = ia->ipa_io[0].h;
sc 99 dev/isa/sb_isapnp.c sc->sc_irq = ia->ipa_irq[0].num;
sc 100 dev/isa/sb_isapnp.c sc->sc_iobase = ia->ipa_io[0].base;
sc 101 dev/isa/sb_isapnp.c sc->sc_ic = ia->ia_ic;
sc 102 dev/isa/sb_isapnp.c sc->sc_drq8 = ia->ipa_drq[0].num;
sc 106 dev/isa/sb_isapnp.c if (sc->sc_drq8 >= 4) {
sc 107 dev/isa/sb_isapnp.c sc->sc_drq16 = sc->sc_drq8;
sc 108 dev/isa/sb_isapnp.c sc->sc_drq8 = ia->ipa_drq[1].num;
sc 110 dev/isa/sb_isapnp.c sc->sc_drq16 = ia->ipa_drq[1].num;
sc 112 dev/isa/sb_isapnp.c sc->sc_drq16 = DRQUNK;
sc 116 dev/isa/sb_isapnp.c sc->sc_mpu_sc.iobase = ia->ipa_io[1].base;
sc 117 dev/isa/sb_isapnp.c sc->sc_mpu_sc.ioh = ia->ipa_io[1].h;
sc 119 dev/isa/sb_isapnp.c sc->sc_mpu_sc.iobase = 0;
sc 122 dev/isa/sb_isapnp.c if (!sbmatch(sc)) {
sc 127 dev/isa/sb_isapnp.c sc->sc_isa = parent->dv_parent;
sc 128 dev/isa/sb_isapnp.c sbattach(sc);
sc 178 dev/isa/sbdsp.c void sbdsp_set_mixer_gain(struct sbdsp_softc *sc, int port);
sc 197 dev/isa/sbdsp.c sb_printsc(sc)
sc 198 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 203 dev/isa/sbdsp.c (int)sc->sc_open, sc->sc_i.run, sc->sc_o.run,
sc 204 dev/isa/sbdsp.c sc->sc_drq8, sc->sc_drq16,
sc 205 dev/isa/sbdsp.c sc->sc_iobase, sc->sc_irq);
sc 207 dev/isa/sbdsp.c sc->sc_i.rate, sc->sc_i.tc,
sc 208 dev/isa/sbdsp.c sc->sc_o.rate, sc->sc_o.tc);
sc 210 dev/isa/sbdsp.c sc->spkr_state, sc->sc_interrupts);
sc 212 dev/isa/sbdsp.c sc->sc_intr8, sc->sc_arg16);
sc 214 dev/isa/sbdsp.c sc->sc_intr8, sc->sc_arg16);
sc 217 dev/isa/sbdsp.c printf(" %u,%u", sc->gain[i][SB_LEFT], sc->gain[i][SB_RIGHT]);
sc 230 dev/isa/sbdsp.c sbdsp_probe(sc)
sc 231 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 234 dev/isa/sbdsp.c if (sbdsp_reset(sc) < 0) {
sc 239 dev/isa/sbdsp.c if (sc->sc_dev.dv_cfdata->cf_flags & 1)
sc 240 dev/isa/sbdsp.c sbdsp_jazz16_probe(sc);
sc 242 dev/isa/sbdsp.c sbversion(sc);
sc 243 dev/isa/sbdsp.c if (sc->sc_model == SB_UNK) {
sc 255 dev/isa/sbdsp.c sbdsp_jazz16_probe(sc)
sc 256 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 267 dev/isa/sbdsp.c bus_space_tag_t iot = sc->sc_iot;
sc 270 dev/isa/sbdsp.c sbversion(sc);
sc 279 dev/isa/sbdsp.c if (jazz16_drq_conf[sc->sc_drq8] == (u_char)-1 ||
sc 280 dev/isa/sbdsp.c jazz16_irq_conf[sc->sc_irq] == (u_char)-1) {
sc 288 dev/isa/sbdsp.c bus_space_write_1(iot, ioh, 0, sc->sc_iobase & 0x70);
sc 290 dev/isa/sbdsp.c if (sbdsp_reset(sc) < 0) {
sc 295 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, JAZZ16_READ_VER)) {
sc 300 dev/isa/sbdsp.c if (sbdsp_rdsp(sc) != JAZZ16_VER_JAZZ) {
sc 306 dev/isa/sbdsp.c sc->sc_drq16 = sc->sc_drq8;
sc 307 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, JAZZ16_SET_DMAINTR) ||
sc 308 dev/isa/sbdsp.c sbdsp_wdsp(sc, (jazz16_drq_conf[sc->sc_drq16] << 4) |
sc 309 dev/isa/sbdsp.c jazz16_drq_conf[sc->sc_drq8]) ||
sc 310 dev/isa/sbdsp.c sbdsp_wdsp(sc, jazz16_irq_conf[sc->sc_irq])) {
sc 314 dev/isa/sbdsp.c sc->sc_model = SB_JAZZ;
sc 315 dev/isa/sbdsp.c sc->sc_mixer_model = SBM_CT1345; /* XXX really? */
sc 327 dev/isa/sbdsp.c sbdsp_attach(sc)
sc 328 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 337 dev/isa/sbdsp.c if (sc->sc_drq8 != -1) {
sc 338 dev/isa/sbdsp.c if (isa_dmamap_create(sc->sc_isa, sc->sc_drq8,
sc 341 dev/isa/sbdsp.c sc->sc_dev.dv_xname, sc->sc_drq8);
sc 345 dev/isa/sbdsp.c if (sc->sc_drq16 != -1 && sc->sc_drq16 != sc->sc_drq8) {
sc 346 dev/isa/sbdsp.c if (isa_dmamap_create(sc->sc_isa, sc->sc_drq16,
sc 349 dev/isa/sbdsp.c sc->sc_dev.dv_xname, sc->sc_drq16);
sc 356 dev/isa/sbdsp.c sbdsp_set_params(sc, AUMODE_RECORD|AUMODE_PLAY, 0, &pparams, &rparams);
sc 358 dev/isa/sbdsp.c sbdsp_set_in_ports(sc, 1 << SB_MIC_VOL);
sc 360 dev/isa/sbdsp.c if (sc->sc_mixer_model != SBM_NONE) {
sc 362 dev/isa/sbdsp.c sbdsp_mix_write(sc, SBP_MIX_RESET, SBP_MIX_RESET);
sc 372 dev/isa/sbdsp.c v = SB_ADJUST_GAIN(sc, AUDIO_MAX_GAIN/2);
sc 388 dev/isa/sbdsp.c v = SB_ADJUST_GAIN(sc, AUDIO_MAX_GAIN / 2);
sc 391 dev/isa/sbdsp.c sc->gain[i][SB_LEFT] = sc->gain[i][SB_RIGHT] = v;
sc 392 dev/isa/sbdsp.c sbdsp_set_mixer_gain(sc, i);
sc 394 dev/isa/sbdsp.c sc->in_filter = 0; /* no filters turned on, please */
sc 398 dev/isa/sbdsp.c SBVER_MAJOR(sc->sc_version), SBVER_MINOR(sc->sc_version),
sc 399 dev/isa/sbdsp.c sc->sc_model == SB_JAZZ ? ": <Jazz16>" : "");
sc 401 dev/isa/sbdsp.c timeout_set(&sc->sc_tmo, sbdsp_to, sbdsp_to);
sc 402 dev/isa/sbdsp.c sc->sc_fullduplex = ISSB16CLASS(sc) &&
sc 403 dev/isa/sbdsp.c sc->sc_drq8 != -1 && sc->sc_drq16 != -1 &&
sc 404 dev/isa/sbdsp.c sc->sc_drq8 != sc->sc_drq16;
sc 408 dev/isa/sbdsp.c sbdsp_mix_write(sc, mixerport, val)
sc 409 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 413 dev/isa/sbdsp.c bus_space_tag_t iot = sc->sc_iot;
sc 414 dev/isa/sbdsp.c bus_space_handle_t ioh = sc->sc_ioh;
sc 426 dev/isa/sbdsp.c sbdsp_mix_read(sc, mixerport)
sc 427 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 430 dev/isa/sbdsp.c bus_space_tag_t iot = sc->sc_iot;
sc 431 dev/isa/sbdsp.c bus_space_handle_t ioh = sc->sc_ioh;
sc 453 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 456 dev/isa/sbdsp.c emul = ISSB16CLASS(sc) ? 0 : AUDIO_ENCODINGFLAG_EMULATED;
sc 484 dev/isa/sbdsp.c if (!ISSB16CLASS(sc) && sc->sc_model != SB_JAZZ)
sc 524 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 534 dev/isa/sbdsp.c if (sc->sc_open == SB_OPEN_MIDI)
sc 537 dev/isa/sbdsp.c model = sc->sc_model;
sc 545 dev/isa/sbdsp.c if (!ISSB16CLASS(sc) &&
sc 672 dev/isa/sbdsp.c chan = m->precision == 16 ? sc->sc_drq16 : sc->sc_drq8;
sc 674 dev/isa/sbdsp.c sc->sc_o.rate = rate;
sc 675 dev/isa/sbdsp.c sc->sc_o.tc = tc;
sc 676 dev/isa/sbdsp.c sc->sc_o.modep = m;
sc 677 dev/isa/sbdsp.c sc->sc_o.bmode = bmode;
sc 678 dev/isa/sbdsp.c sc->sc_o.dmachan = chan;
sc 680 dev/isa/sbdsp.c sc->sc_i.rate = rate;
sc 681 dev/isa/sbdsp.c sc->sc_i.tc = tc;
sc 682 dev/isa/sbdsp.c sc->sc_i.modep = m;
sc 683 dev/isa/sbdsp.c sc->sc_i.bmode = bmode;
sc 684 dev/isa/sbdsp.c sc->sc_i.dmachan = chan;
sc 690 dev/isa/sbdsp.c sc->sc_model, mode, p->sample_rate, p->precision, p->channels,
sc 699 dev/isa/sbdsp.c sc->sc_i.run = SB_NOTRUNNING;
sc 700 dev/isa/sbdsp.c sc->sc_o.run = SB_NOTRUNNING;
sc 702 dev/isa/sbdsp.c if (sc->sc_fullduplex &&
sc 704 dev/isa/sbdsp.c sc->sc_i.dmachan == sc->sc_o.dmachan) {
sc 705 dev/isa/sbdsp.c DPRINTF(("sbdsp_set_params: fd=%d, usemode=%d, idma=%d, odma=%d\n", sc->sc_fullduplex, usemode, sc->sc_i.dmachan, sc->sc_o.dmachan));
sc 706 dev/isa/sbdsp.c if (sc->sc_o.dmachan == sc->sc_drq8) {
sc 710 dev/isa/sbdsp.c sc->sc_o.modep = &sbpmodes[PLAY16];
sc 711 dev/isa/sbdsp.c sc->sc_o.dmachan = sc->sc_drq16;
sc 717 dev/isa/sbdsp.c sc->sc_i.dmachan, sc->sc_o.dmachan));
sc 727 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 730 dev/isa/sbdsp.c mixval = sbdsp_mix_read(sc, SBP_INFILTER) & ~SBP_IFILTER_MASK;
sc 744 dev/isa/sbdsp.c sc->in_filter = mixval & SBP_IFILTER_MASK;
sc 745 dev/isa/sbdsp.c sbdsp_mix_write(sc, SBP_INFILTER, mixval);
sc 752 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 754 dev/isa/sbdsp.c sc->in_filter =
sc 755 dev/isa/sbdsp.c sbdsp_mix_read(sc, SBP_INFILTER) & SBP_IFILTER_MASK;
sc 756 dev/isa/sbdsp.c switch (sc->in_filter) {
sc 767 dev/isa/sbdsp.c sbdsp_set_in_ports(sc, mask)
sc 768 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 774 dev/isa/sbdsp.c if (sc->sc_open == SB_OPEN_MIDI)
sc 778 dev/isa/sbdsp.c sc->sc_mixer_model, mask));
sc 780 dev/isa/sbdsp.c switch(sc->sc_mixer_model) {
sc 801 dev/isa/sbdsp.c sbdsp_mix_write(sc, SBP_RECORD_SOURCE, sbport | sc->in_filter);
sc 817 dev/isa/sbdsp.c sbdsp_mix_write(sc, SBP_RECORD_SOURCE_L, bitsl);
sc 818 dev/isa/sbdsp.c sbdsp_mix_write(sc, SBP_RECORD_SOURCE_R, bitsr);
sc 821 dev/isa/sbdsp.c sc->in_mask = mask;
sc 831 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 833 dev/isa/sbdsp.c if (sc->sc_open == SB_OPEN_MIDI)
sc 837 dev/isa/sbdsp.c (sc->spkr_state == SPKR_OFF)) {
sc 838 dev/isa/sbdsp.c sbdsp_spkron(sc);
sc 839 dev/isa/sbdsp.c sc->spkr_state = SPKR_ON;
sc 842 dev/isa/sbdsp.c (sc->spkr_state == SPKR_ON)) {
sc 843 dev/isa/sbdsp.c sbdsp_spkroff(sc);
sc 844 dev/isa/sbdsp.c sc->spkr_state = SPKR_OFF;
sc 862 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 864 dev/isa/sbdsp.c DPRINTF(("sbdsp_open: sc=%p\n", sc));
sc 866 dev/isa/sbdsp.c if (sc->sc_open != SB_CLOSED)
sc 868 dev/isa/sbdsp.c if (sbdsp_reset(sc) != 0)
sc 871 dev/isa/sbdsp.c sc->sc_open = SB_OPEN_AUDIO;
sc 872 dev/isa/sbdsp.c sc->sc_openflags = flags;
sc 873 dev/isa/sbdsp.c sc->sc_intrm = 0;
sc 874 dev/isa/sbdsp.c if (ISSBPRO(sc) &&
sc 875 dev/isa/sbdsp.c sbdsp_wdsp(sc, SB_DSP_RECORD_MONO) < 0) {
sc 895 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 897 dev/isa/sbdsp.c DPRINTF(("sbdsp_close: sc=%p\n", sc));
sc 899 dev/isa/sbdsp.c sc->sc_open = SB_CLOSED;
sc 900 dev/isa/sbdsp.c sbdsp_spkroff(sc);
sc 901 dev/isa/sbdsp.c sc->spkr_state = SPKR_OFF;
sc 902 dev/isa/sbdsp.c sc->sc_intr8 = 0;
sc 903 dev/isa/sbdsp.c sc->sc_intr16 = 0;
sc 904 dev/isa/sbdsp.c sc->sc_intrm = 0;
sc 905 dev/isa/sbdsp.c sbdsp_haltdma(sc);
sc 919 dev/isa/sbdsp.c sbdsp_reset(sc)
sc 920 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 922 dev/isa/sbdsp.c bus_space_tag_t iot = sc->sc_iot;
sc 923 dev/isa/sbdsp.c bus_space_handle_t ioh = sc->sc_ioh;
sc 925 dev/isa/sbdsp.c sc->sc_intr8 = 0;
sc 926 dev/isa/sbdsp.c sc->sc_intr16 = 0;
sc 927 dev/isa/sbdsp.c if (sc->sc_i.run != SB_NOTRUNNING) {
sc 928 dev/isa/sbdsp.c isa_dmaabort(sc->sc_isa, sc->sc_i.dmachan);
sc 929 dev/isa/sbdsp.c sc->sc_i.run = SB_NOTRUNNING;
sc 931 dev/isa/sbdsp.c if (sc->sc_o.run != SB_NOTRUNNING) {
sc 932 dev/isa/sbdsp.c isa_dmaabort(sc->sc_isa, sc->sc_o.dmachan);
sc 933 dev/isa/sbdsp.c sc->sc_o.run = SB_NOTRUNNING;
sc 945 dev/isa/sbdsp.c if (sbdsp_rdsp(sc) != SB_MAGIC)
sc 957 dev/isa/sbdsp.c sbdsp_wdsp(sc, v)
sc 958 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 961 dev/isa/sbdsp.c bus_space_tag_t iot = sc->sc_iot;
sc 962 dev/isa/sbdsp.c bus_space_handle_t ioh = sc->sc_ioh;
sc 983 dev/isa/sbdsp.c sbdsp_rdsp(sc)
sc 984 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 986 dev/isa/sbdsp.c bus_space_tag_t iot = sc->sc_iot;
sc 987 dev/isa/sbdsp.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1016 dev/isa/sbdsp.c sbdsp_pause(sc)
sc 1017 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 1021 dev/isa/sbdsp.c timeout_add(&sc->sc_tmo, hz/8);
sc 1036 dev/isa/sbdsp.c sbdsp_spkron(sc)
sc 1037 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 1039 dev/isa/sbdsp.c (void)sbdsp_wdsp(sc, SB_DSP_SPKR_ON);
sc 1040 dev/isa/sbdsp.c sbdsp_pause(sc);
sc 1047 dev/isa/sbdsp.c sbdsp_spkroff(sc)
sc 1048 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 1050 dev/isa/sbdsp.c (void)sbdsp_wdsp(sc, SB_DSP_SPKR_OFF);
sc 1051 dev/isa/sbdsp.c sbdsp_pause(sc);
sc 1059 dev/isa/sbdsp.c sbversion(sc)
sc 1060 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 1064 dev/isa/sbdsp.c sc->sc_model = SB_UNK;
sc 1065 dev/isa/sbdsp.c sc->sc_version = 0;
sc 1066 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, SB_DSP_VERSION) < 0)
sc 1068 dev/isa/sbdsp.c v = sbdsp_rdsp(sc) << 8;
sc 1069 dev/isa/sbdsp.c v |= sbdsp_rdsp(sc);
sc 1072 dev/isa/sbdsp.c sc->sc_version = v;
sc 1075 dev/isa/sbdsp.c sc->sc_mixer_model = SBM_NONE;
sc 1076 dev/isa/sbdsp.c sc->sc_model = SB_1;
sc 1080 dev/isa/sbdsp.c sbdsp_mix_write(sc, SBP_1335_MASTER_VOL, 0x04);
sc 1081 dev/isa/sbdsp.c sbdsp_mix_write(sc, SBP_1335_MIDI_VOL, 0x06);
sc 1083 dev/isa/sbdsp.c if ((sbdsp_mix_read(sc, SBP_1335_MASTER_VOL) & 0x0e) == 0x04 &&
sc 1084 dev/isa/sbdsp.c (sbdsp_mix_read(sc, SBP_1335_MIDI_VOL) & 0x0e) == 0x06)
sc 1085 dev/isa/sbdsp.c sc->sc_mixer_model = SBM_CT1335;
sc 1087 dev/isa/sbdsp.c sc->sc_mixer_model = SBM_NONE;
sc 1089 dev/isa/sbdsp.c sc->sc_model = SB_20;
sc 1091 dev/isa/sbdsp.c sc->sc_model = SB_2x;
sc 1094 dev/isa/sbdsp.c sc->sc_mixer_model = SBM_CT1345;
sc 1095 dev/isa/sbdsp.c sc->sc_model = SB_PRO;
sc 1101 dev/isa/sbdsp.c sbdsp_mix_write(sc, SB16P_TREBLE_L, 0x80);
sc 1103 dev/isa/sbdsp.c if ((sbdsp_mix_read(sc, SB16P_TREBLE_L) & 0xf0) == 0x80)
sc 1104 dev/isa/sbdsp.c sc->sc_mixer_model = SBM_CT1745;
sc 1106 dev/isa/sbdsp.c sc->sc_mixer_model = SBM_CT1XX5;
sc 1108 dev/isa/sbdsp.c sc->sc_mixer_model = SBM_CT1745;
sc 1114 dev/isa/sbdsp.c sc->sc_model = SB_64;
sc 1117 dev/isa/sbdsp.c sc->sc_model = SB_16;
sc 1129 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 1131 dev/isa/sbdsp.c DPRINTF(("sbdsp_haltdma: sc=%p\n", sc));
sc 1133 dev/isa/sbdsp.c sbdsp_reset(sc);
sc 1138 dev/isa/sbdsp.c sbdsp_set_timeconst(sc, tc)
sc 1139 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 1142 dev/isa/sbdsp.c DPRINTF(("sbdsp_set_timeconst: sc=%p tc=%d\n", sc, tc));
sc 1144 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, SB_DSP_TIMECONST) < 0 ||
sc 1145 dev/isa/sbdsp.c sbdsp_wdsp(sc, tc) < 0)
sc 1152 dev/isa/sbdsp.c sbdsp16_set_rate(sc, cmd, rate)
sc 1153 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 1156 dev/isa/sbdsp.c DPRINTF(("sbdsp16_set_rate: sc=%p cmd=0x%02x rate=%d\n", sc, cmd, rate));
sc 1158 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, cmd) < 0 ||
sc 1159 dev/isa/sbdsp.c sbdsp_wdsp(sc, rate >> 8) < 0 ||
sc 1160 dev/isa/sbdsp.c sbdsp_wdsp(sc, rate) < 0)
sc 1174 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 1186 dev/isa/sbdsp.c sc->sc_intrr = intr;
sc 1187 dev/isa/sbdsp.c sc->sc_argr = arg;
sc 1191 dev/isa/sbdsp.c if (sc->sc_i.dmachan != sc->sc_drq8) {
sc 1193 dev/isa/sbdsp.c width, sc->sc_i.dmachan);
sc 1197 dev/isa/sbdsp.c sc->sc_intr8 = sbdsp_block_input;
sc 1198 dev/isa/sbdsp.c sc->sc_arg8 = addr;
sc 1201 dev/isa/sbdsp.c if (sc->sc_i.dmachan != sc->sc_drq16) {
sc 1203 dev/isa/sbdsp.c width, sc->sc_i.dmachan);
sc 1207 dev/isa/sbdsp.c sc->sc_intr16 = sbdsp_block_input;
sc 1208 dev/isa/sbdsp.c sc->sc_arg16 = addr;
sc 1211 dev/isa/sbdsp.c if ((sc->sc_model == SB_JAZZ) ? (sc->sc_i.dmachan > 3) : (width == 16))
sc 1214 dev/isa/sbdsp.c sc->sc_i.blksize = blksize;
sc 1216 dev/isa/sbdsp.c if (ISSBPRO(sc)) {
sc 1217 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, sc->sc_i.modep->cmdchan) < 0)
sc 1219 dev/isa/sbdsp.c filter = stereo ? SBP_FILTER_OFF : sc->in_filter;
sc 1220 dev/isa/sbdsp.c sbdsp_mix_write(sc, SBP_INFILTER,
sc 1221 dev/isa/sbdsp.c (sbdsp_mix_read(sc, SBP_INFILTER) & ~SBP_IFILTER_MASK) |
sc 1225 dev/isa/sbdsp.c if (ISSB16CLASS(sc)) {
sc 1226 dev/isa/sbdsp.c if (sbdsp16_set_rate(sc, SB_DSP16_INPUTRATE, sc->sc_i.rate)) {
sc 1228 dev/isa/sbdsp.c sc->sc_i.rate));
sc 1232 dev/isa/sbdsp.c if (sbdsp_set_timeconst(sc, sc->sc_i.tc)) {
sc 1234 dev/isa/sbdsp.c sc->sc_i.rate));
sc 1240 dev/isa/sbdsp.c start, end, sc->sc_i.dmachan));
sc 1241 dev/isa/sbdsp.c isa_dmastart(sc->sc_isa, sc->sc_i.dmachan, start, (char *)end -
sc 1251 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 1252 dev/isa/sbdsp.c int cc = sc->sc_i.blksize;
sc 1256 dev/isa/sbdsp.c if (sc->sc_i.run != SB_NOTRUNNING)
sc 1257 dev/isa/sbdsp.c sc->sc_intrr(sc->sc_argr);
sc 1259 dev/isa/sbdsp.c if (sc->sc_model == SB_1) {
sc 1261 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, sc->sc_i.modep->cmd) < 0 ||
sc 1262 dev/isa/sbdsp.c sbdsp_wdsp(sc, cc) < 0 ||
sc 1263 dev/isa/sbdsp.c sbdsp_wdsp(sc, cc >> 8) < 0) {
sc 1267 dev/isa/sbdsp.c sc->sc_i.run = SB_RUNNING;
sc 1268 dev/isa/sbdsp.c } else if (sc->sc_i.run == SB_NOTRUNNING) {
sc 1270 dev/isa/sbdsp.c if (ISSB16CLASS(sc)) {
sc 1272 dev/isa/sbdsp.c sc->sc_i.modep->cmd, sc->sc_i.bmode, cc));
sc 1273 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, sc->sc_i.modep->cmd) < 0 ||
sc 1274 dev/isa/sbdsp.c sbdsp_wdsp(sc, sc->sc_i.bmode) < 0 ||
sc 1275 dev/isa/sbdsp.c sbdsp_wdsp(sc, cc) < 0 ||
sc 1276 dev/isa/sbdsp.c sbdsp_wdsp(sc, cc >> 8) < 0) {
sc 1282 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, SB_DSP_BLOCKSIZE) < 0 ||
sc 1283 dev/isa/sbdsp.c sbdsp_wdsp(sc, cc) < 0 ||
sc 1284 dev/isa/sbdsp.c sbdsp_wdsp(sc, cc >> 8) < 0) {
sc 1288 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, sc->sc_i.modep->cmd) < 0) {
sc 1293 dev/isa/sbdsp.c sc->sc_i.run = SB_LOOPING;
sc 1308 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 1320 dev/isa/sbdsp.c sc->sc_intrp = intr;
sc 1321 dev/isa/sbdsp.c sc->sc_argp = arg;
sc 1325 dev/isa/sbdsp.c if (sc->sc_o.dmachan != sc->sc_drq8) {
sc 1327 dev/isa/sbdsp.c width, sc->sc_o.dmachan);
sc 1331 dev/isa/sbdsp.c sc->sc_intr8 = sbdsp_block_output;
sc 1332 dev/isa/sbdsp.c sc->sc_arg8 = addr;
sc 1335 dev/isa/sbdsp.c if (sc->sc_o.dmachan != sc->sc_drq16) {
sc 1337 dev/isa/sbdsp.c width, sc->sc_o.dmachan);
sc 1341 dev/isa/sbdsp.c sc->sc_intr16 = sbdsp_block_output;
sc 1342 dev/isa/sbdsp.c sc->sc_arg16 = addr;
sc 1345 dev/isa/sbdsp.c if ((sc->sc_model == SB_JAZZ) ? (sc->sc_o.dmachan > 3) : (width == 16))
sc 1348 dev/isa/sbdsp.c sc->sc_o.blksize = blksize;
sc 1350 dev/isa/sbdsp.c if (ISSBPRO(sc)) {
sc 1352 dev/isa/sbdsp.c sbdsp_mix_write(sc, SBP_STEREO,
sc 1353 dev/isa/sbdsp.c (sbdsp_mix_read(sc, SBP_STEREO) & ~SBP_PLAYMODE_MASK) |
sc 1355 dev/isa/sbdsp.c cmd = sc->sc_o.modep->cmdchan;
sc 1356 dev/isa/sbdsp.c if (cmd && sbdsp_wdsp(sc, cmd) < 0)
sc 1360 dev/isa/sbdsp.c if (ISSB16CLASS(sc)) {
sc 1361 dev/isa/sbdsp.c if (sbdsp16_set_rate(sc, SB_DSP16_OUTPUTRATE, sc->sc_o.rate)) {
sc 1363 dev/isa/sbdsp.c sc->sc_o.rate));
sc 1367 dev/isa/sbdsp.c if (sbdsp_set_timeconst(sc, sc->sc_o.tc)) {
sc 1369 dev/isa/sbdsp.c sc->sc_o.rate));
sc 1375 dev/isa/sbdsp.c start, end, sc->sc_o.dmachan));
sc 1376 dev/isa/sbdsp.c isa_dmastart(sc->sc_isa, sc->sc_o.dmachan, start, (char *)end -
sc 1386 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 1387 dev/isa/sbdsp.c int cc = sc->sc_o.blksize;
sc 1391 dev/isa/sbdsp.c if (sc->sc_o.run != SB_NOTRUNNING)
sc 1392 dev/isa/sbdsp.c sc->sc_intrp(sc->sc_argp);
sc 1394 dev/isa/sbdsp.c if (sc->sc_model == SB_1) {
sc 1396 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, sc->sc_o.modep->cmd) < 0 ||
sc 1397 dev/isa/sbdsp.c sbdsp_wdsp(sc, cc) < 0 ||
sc 1398 dev/isa/sbdsp.c sbdsp_wdsp(sc, cc >> 8) < 0) {
sc 1402 dev/isa/sbdsp.c sc->sc_o.run = SB_RUNNING;
sc 1403 dev/isa/sbdsp.c } else if (sc->sc_o.run == SB_NOTRUNNING) {
sc 1405 dev/isa/sbdsp.c if (ISSB16CLASS(sc)) {
sc 1407 dev/isa/sbdsp.c sc->sc_o.modep->cmd,sc->sc_o.bmode, cc));
sc 1408 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, sc->sc_o.modep->cmd) < 0 ||
sc 1409 dev/isa/sbdsp.c sbdsp_wdsp(sc, sc->sc_o.bmode) < 0 ||
sc 1410 dev/isa/sbdsp.c sbdsp_wdsp(sc, cc) < 0 ||
sc 1411 dev/isa/sbdsp.c sbdsp_wdsp(sc, cc >> 8) < 0) {
sc 1417 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, SB_DSP_BLOCKSIZE) < 0 ||
sc 1418 dev/isa/sbdsp.c sbdsp_wdsp(sc, cc) < 0 ||
sc 1419 dev/isa/sbdsp.c sbdsp_wdsp(sc, cc >> 8) < 0) {
sc 1423 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, sc->sc_o.modep->cmd) < 0) {
sc 1428 dev/isa/sbdsp.c sc->sc_o.run = SB_LOOPING;
sc 1448 dev/isa/sbdsp.c struct sbdsp_softc *sc = arg;
sc 1452 dev/isa/sbdsp.c sc->sc_intr8, sc->sc_intr16));
sc 1453 dev/isa/sbdsp.c if (ISSB16CLASS(sc)) {
sc 1454 dev/isa/sbdsp.c irq = sbdsp_mix_read(sc, SBP_IRQ_STATUS);
sc 1464 dev/isa/sbdsp.c sc->sc_interrupts++;
sc 1469 dev/isa/sbdsp.c bus_space_read_1(sc->sc_iot, sc->sc_ioh, SBP_DSP_IRQACK8);
sc 1470 dev/isa/sbdsp.c if (sc->sc_intr8)
sc 1471 dev/isa/sbdsp.c sc->sc_intr8(sc->sc_arg8);
sc 1474 dev/isa/sbdsp.c bus_space_read_1(sc->sc_iot, sc->sc_ioh, SBP_DSP_IRQACK16);
sc 1475 dev/isa/sbdsp.c if (sc->sc_intr16)
sc 1476 dev/isa/sbdsp.c sc->sc_intr16(sc->sc_arg16);
sc 1479 dev/isa/sbdsp.c if ((irq & SBP_IRQ_MPU401) && sc->sc_hasmpu) {
sc 1480 dev/isa/sbdsp.c mpu_intr(&sc->sc_mpu_sc);
sc 1499 dev/isa/sbdsp.c sbdsp_set_mixer_gain(sc, port)
sc 1500 dev/isa/sbdsp.c struct sbdsp_softc *sc;
sc 1505 dev/isa/sbdsp.c switch(sc->sc_mixer_model) {
sc 1509 dev/isa/sbdsp.c gain = SB_1335_GAIN(sc->gain[port][SB_LEFT]);
sc 1522 dev/isa/sbdsp.c gain = SB_1335_MASTER_GAIN(sc->gain[port][SB_LEFT]);
sc 1527 dev/isa/sbdsp.c sbdsp_mix_write(sc, src, gain);
sc 1530 dev/isa/sbdsp.c gain = SB_STEREO_GAIN(sc->gain[port][SB_LEFT],
sc 1531 dev/isa/sbdsp.c sc->gain[port][SB_RIGHT]);
sc 1535 dev/isa/sbdsp.c gain = SB_MIC_GAIN(sc->gain[port][SB_LEFT]);
sc 1555 dev/isa/sbdsp.c sbdsp_mix_write(sc, src, gain);
sc 1591 dev/isa/sbdsp.c sbdsp_mix_write(sc, SB16P_PCSPEAKER, sc->gain[port][SB_LEFT]);
sc 1596 dev/isa/sbdsp.c sbdsp_mix_write(sc, src, sc->gain[port][SB_LEFT]);
sc 1597 dev/isa/sbdsp.c sbdsp_mix_write(sc, SB16P_L_TO_R(src), sc->gain[port][SB_RIGHT]);
sc 1607 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 1613 dev/isa/sbdsp.c if (sc->sc_open == SB_OPEN_MIDI)
sc 1619 dev/isa/sbdsp.c if (sc->sc_mixer_model == SBM_NONE)
sc 1625 dev/isa/sbdsp.c if (sc->sc_mixer_model == SBM_CT1345 ||
sc 1626 dev/isa/sbdsp.c sc->sc_mixer_model == SBM_CT1XX5) {
sc 1641 dev/isa/sbdsp.c if (!ISSBM1745(sc))
sc 1645 dev/isa/sbdsp.c if (sc->sc_mixer_model == SBM_CT1335)
sc 1665 dev/isa/sbdsp.c lgain = rgain = SB_ADJUST_MIC_GAIN(sc,
sc 1674 dev/isa/sbdsp.c lgain = rgain = SB_ADJUST_2_GAIN(sc,
sc 1680 dev/isa/sbdsp.c lgain = rgain = SB_ADJUST_GAIN(sc,
sc 1684 dev/isa/sbdsp.c if (sc->sc_mixer_model == SBM_CT1335)
sc 1686 dev/isa/sbdsp.c lgain = SB_ADJUST_GAIN(sc,
sc 1688 dev/isa/sbdsp.c rgain = SB_ADJUST_GAIN(sc,
sc 1696 dev/isa/sbdsp.c sc->gain[cp->dev][SB_LEFT] = lgain;
sc 1697 dev/isa/sbdsp.c sc->gain[cp->dev][SB_RIGHT] = rgain;
sc 1699 dev/isa/sbdsp.c sbdsp_set_mixer_gain(sc, cp->dev);
sc 1703 dev/isa/sbdsp.c if (ISSBM1745(sc)) {
sc 1706 dev/isa/sbdsp.c return sbdsp_set_in_ports(sc, cp->un.mask);
sc 1710 dev/isa/sbdsp.c sc->in_port = cp->un.ord;
sc 1711 dev/isa/sbdsp.c return sbdsp_set_in_ports(sc, 1 << cp->un.ord);
sc 1716 dev/isa/sbdsp.c if (!ISSBM1745(sc) || cp->type != AUDIO_MIXER_ENUM)
sc 1718 dev/isa/sbdsp.c sbdsp_mix_write(sc, SB16P_AGC, cp->un.ord & 1);
sc 1732 dev/isa/sbdsp.c bits = sbdsp_mix_read(sc, SB16P_OSWITCH);
sc 1733 dev/isa/sbdsp.c sc->gain[cp->dev][SB_LR] = cp->un.ord != 0;
sc 1738 dev/isa/sbdsp.c sbdsp_mix_write(sc, SB16P_OSWITCH, bits);
sc 1763 dev/isa/sbdsp.c lbits = sbdsp_mix_read(sc, SB16P_ISWITCH_L) & ~mask;
sc 1764 dev/isa/sbdsp.c rbits = sbdsp_mix_read(sc, SB16P_ISWITCH_R) & ~mask;
sc 1765 dev/isa/sbdsp.c sc->gain[cp->dev][SB_LR] = cp->un.ord != 0;
sc 1773 dev/isa/sbdsp.c if (sc->gain[swap][SB_LR]) {
sc 1778 dev/isa/sbdsp.c if (!sc->gain[mute][SB_LR]) {
sc 1782 dev/isa/sbdsp.c sbdsp_mix_write(sc, SB16P_ISWITCH_L, lbits);
sc 1783 dev/isa/sbdsp.c sbdsp_mix_write(sc, SB16P_ISWITCH_L, rbits);
sc 1798 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 1800 dev/isa/sbdsp.c if (sc->sc_open == SB_OPEN_MIDI)
sc 1805 dev/isa/sbdsp.c if (sc->sc_mixer_model == SBM_NONE)
sc 1811 dev/isa/sbdsp.c if (sc->sc_mixer_model == SBM_CT1345 ||
sc 1812 dev/isa/sbdsp.c sc->sc_mixer_model == SBM_CT1XX5) {
sc 1825 dev/isa/sbdsp.c if (!ISSBM1745(sc))
sc 1829 dev/isa/sbdsp.c if (sc->sc_mixer_model == SBM_CT1335)
sc 1845 dev/isa/sbdsp.c sc->gain[cp->dev][SB_LEFT];
sc 1849 dev/isa/sbdsp.c sc->gain[cp->dev][SB_LEFT];
sc 1851 dev/isa/sbdsp.c sc->gain[cp->dev][SB_RIGHT];
sc 1861 dev/isa/sbdsp.c if (ISSBM1745(sc))
sc 1862 dev/isa/sbdsp.c cp->un.mask = sc->in_mask;
sc 1864 dev/isa/sbdsp.c cp->un.ord = sc->in_port;
sc 1868 dev/isa/sbdsp.c if (!ISSBM1745(sc))
sc 1870 dev/isa/sbdsp.c cp->un.ord = sbdsp_mix_read(sc, SB16P_AGC);
sc 1884 dev/isa/sbdsp.c cp->un.ord = sc->gain[cp->dev][SB_LR];
sc 1899 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 1903 dev/isa/sbdsp.c sc->sc_mixer_model, dip->index));
sc 1905 dev/isa/sbdsp.c if (sc->sc_mixer_model == SBM_NONE)
sc 1908 dev/isa/sbdsp.c chan = sc->sc_mixer_model == SBM_CT1335 ? 1 : 2;
sc 1909 dev/isa/sbdsp.c is1745 = ISSBM1745(sc);
sc 1956 dev/isa/sbdsp.c if (sc->sc_mixer_model == SBM_CT1335)
sc 1985 dev/isa/sbdsp.c if (ISSBM1745(sc)) {
sc 2021 dev/isa/sbdsp.c if (sc->sc_mixer_model == SBM_CT1745) {
sc 2042 dev/isa/sbdsp.c if (sc->sc_mixer_model == SBM_CT1745) {
sc 2076 dev/isa/sbdsp.c if (sc->sc_mixer_model == SBM_CT1345)
sc 2217 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 2221 dev/isa/sbdsp.c if (sc->sc_drq8 != -1)
sc 2222 dev/isa/sbdsp.c drq = sc->sc_drq8;
sc 2224 dev/isa/sbdsp.c drq = sc->sc_drq16;
sc 2226 dev/isa/sbdsp.c return isa_malloc(sc->sc_isa, drq, size, pool, flags);
sc 2263 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 2265 dev/isa/sbdsp.c (sc->sc_fullduplex ? AUDIO_PROP_FULLDUPLEX : 0);
sc 2281 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 2283 dev/isa/sbdsp.c DPRINTF(("sbdsp_midi_open: sc=%p\n", sc));
sc 2285 dev/isa/sbdsp.c if (sc->sc_open != SB_CLOSED)
sc 2287 dev/isa/sbdsp.c if (sbdsp_reset(sc) != 0)
sc 2290 dev/isa/sbdsp.c if (sc->sc_model >= SB_20)
sc 2291 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, SB_MIDI_UART_INTR)) /* enter UART mode */
sc 2293 dev/isa/sbdsp.c sc->sc_open = SB_OPEN_MIDI;
sc 2294 dev/isa/sbdsp.c sc->sc_openflags = flags;
sc 2295 dev/isa/sbdsp.c sc->sc_intr8 = sbdsp_midi_intr;
sc 2296 dev/isa/sbdsp.c sc->sc_arg8 = addr;
sc 2297 dev/isa/sbdsp.c sc->sc_intrm = iintr;
sc 2298 dev/isa/sbdsp.c sc->sc_argm = arg;
sc 2306 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 2308 dev/isa/sbdsp.c DPRINTF(("sbdsp_midi_close: sc=%p\n", sc));
sc 2310 dev/isa/sbdsp.c if (sc->sc_model >= SB_20)
sc 2311 dev/isa/sbdsp.c sbdsp_reset(sc); /* exit UART mode */
sc 2312 dev/isa/sbdsp.c sc->sc_open = SB_CLOSED;
sc 2313 dev/isa/sbdsp.c sc->sc_intrm = 0;
sc 2321 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 2323 dev/isa/sbdsp.c if (sc->sc_model < SB_20 && sbdsp_wdsp(sc, SB_MIDI_WRITE))
sc 2325 dev/isa/sbdsp.c if (sbdsp_wdsp(sc, d))
sc 2335 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 2337 dev/isa/sbdsp.c mi->name = sc->sc_model < SB_20 ? "SB MIDI cmd" : "SB MIDI UART";
sc 2345 dev/isa/sbdsp.c struct sbdsp_softc *sc = addr;
sc 2347 dev/isa/sbdsp.c sc->sc_intrm(sc->sc_argm, sbdsp_rdsp(sc));
sc 188 dev/isa/sbdspvar.h #define ISSBPRO(sc) ((sc)->sc_model == SB_PRO || (sc)->sc_model == SB_JAZZ)
sc 189 dev/isa/sbdspvar.h #define ISSBPROCLASS(sc) ((sc)->sc_model >= SB_PRO)
sc 190 dev/isa/sbdspvar.h #define ISSB16CLASS(sc) ((sc)->sc_model >= SB_16)
sc 153 dev/isa/sbreg.h #define SB_ADJUST_MIC_GAIN(sc, x) sbdsp_adjust((x), ISSB16CLASS(sc) ? 0xf8 : 0xc0)
sc 154 dev/isa/sbreg.h #define SB_ADJUST_GAIN(sc, x) sbdsp_adjust((x), ISSB16CLASS(sc) ? 0xf8 : 0xe0)
sc 155 dev/isa/sbreg.h #define SB_ADJUST_2_GAIN(sc, x) sbdsp_adjust((x), 0xc0)
sc 131 dev/isa/sf16fmr.c struct sfr_softc *sc = (void *) self;
sc 134 dev/isa/sf16fmr.c sc->c.iot = ia->ia_iot;
sc 135 dev/isa/sf16fmr.c sc->mute = 0;
sc 136 dev/isa/sf16fmr.c sc->vol = 0;
sc 137 dev/isa/sf16fmr.c sc->freq = MIN_FM_FREQ;
sc 138 dev/isa/sf16fmr.c sc->c.period = SF16FMR_FREQ_PERIOD;
sc 139 dev/isa/sf16fmr.c sc->c.clock = SF16FMR_FREQ_CLOCK;
sc 140 dev/isa/sf16fmr.c sc->c.data = SF16FMR_FREQ_DATA;
sc 143 dev/isa/sf16fmr.c if (bus_space_map(sc->c.iot, ia->ia_iobase, ia->ia_iosize,
sc 144 dev/isa/sf16fmr.c 0, &sc->c.ioh)) {
sc 150 dev/isa/sf16fmr.c sfr_set_freq(&sc->c, sc->freq);
sc 151 dev/isa/sf16fmr.c sfr_set_vol(sc->c.iot, sc->c.ioh, sc->vol, sc->mute);
sc 153 dev/isa/sf16fmr.c radio_attach_mi(&sfr_hw_if, sc, &sc->sc_dev);
sc 159 dev/isa/sf16fmr.c struct sfr_softc sc;
sc 162 dev/isa/sf16fmr.c sc.c.iot = iot;
sc 163 dev/isa/sf16fmr.c sc.c.ioh = ioh;
sc 164 dev/isa/sf16fmr.c sc.c.offset = 0;
sc 165 dev/isa/sf16fmr.c sc.c.period = SF16FMR_FREQ_PERIOD;
sc 166 dev/isa/sf16fmr.c sc.c.clock = SF16FMR_FREQ_CLOCK;
sc 167 dev/isa/sf16fmr.c sc.c.data = SF16FMR_FREQ_DATA;
sc 174 dev/isa/sf16fmr.c sc.freq = MIN_FM_FREQ;
sc 176 dev/isa/sf16fmr.c sfr_set_freq(&sc.c, sc.freq);
sc 178 dev/isa/sf16fmr.c freq = sfr_set_freq(&sc.c, sc.freq);
sc 179 dev/isa/sf16fmr.c if (sc.freq == freq)
sc 188 dev/isa/sf16fmr.c struct sfr_softc *sc = v;
sc 190 dev/isa/sf16fmr.c ri->mute = sc->mute;
sc 191 dev/isa/sf16fmr.c ri->volume = sc->vol;
sc 193 dev/isa/sf16fmr.c ri->freq = sc->freq = sfr_get_freq(&sc->c);
sc 206 dev/isa/sf16fmr.c struct sfr_softc *sc = v;
sc 208 dev/isa/sf16fmr.c sc->mute = ri->mute ? 1 : 0;
sc 209 dev/isa/sf16fmr.c sc->vol = ri->volume;
sc 210 dev/isa/sf16fmr.c sc->freq = sfr_set_freq(&sc->c, ri->freq);
sc 211 dev/isa/sf16fmr.c sc->vol = sfr_set_vol(sc->c.iot, sc->c.ioh, sc->vol, sc->mute);
sc 167 dev/isa/sf16fmr2.c struct sf2r_softc *sc = (void *) self;
sc 169 dev/isa/sf16fmr2.c struct cfdata *cf = sc->sc_dev.dv_cfdata;
sc 172 dev/isa/sf16fmr2.c sc->tea.iot = ia->ia_iot;
sc 173 dev/isa/sf16fmr2.c sc->mute = 0;
sc 174 dev/isa/sf16fmr2.c sc->vol = 0;
sc 175 dev/isa/sf16fmr2.c sc->freq = MIN_FM_FREQ;
sc 176 dev/isa/sf16fmr2.c sc->stereo = TEA5757_STEREO;
sc 177 dev/isa/sf16fmr2.c sc->lock = TEA5757_S030;
sc 180 dev/isa/sf16fmr2.c if (bus_space_map(sc->tea.iot, ia->ia_iobase, ia->ia_iosize,
sc 181 dev/isa/sf16fmr2.c 0, &sc->tea.ioh)) {
sc 186 dev/isa/sf16fmr2.c sc->tea.offset = 0;
sc 187 dev/isa/sf16fmr2.c sc->tea.flags = cf->cf_flags;
sc 189 dev/isa/sf16fmr2.c sc->tea.init = sf2r_init;
sc 190 dev/isa/sf16fmr2.c sc->tea.rset = sf2r_rset;
sc 191 dev/isa/sf16fmr2.c sc->tea.write_bit = sf2r_write_bit;
sc 192 dev/isa/sf16fmr2.c sc->tea.read = sf2r_read_register;
sc 195 dev/isa/sf16fmr2.c tea5757_set_freq(&sc->tea, sc->stereo, sc->lock, sc->freq);
sc 196 dev/isa/sf16fmr2.c sf2r_set_mute(sc);
sc 198 dev/isa/sf16fmr2.c type = sf2r_read_register(sc->tea.iot, sc->tea.ioh, sc->tea.offset);
sc 199 dev/isa/sf16fmr2.c sc->type = (type >> 24) & (1 << 1)? SF16FMR2_AMP : SF16FMR2_NOAMP;
sc 201 dev/isa/sf16fmr2.c radio_attach_mi(&sf2r_hw_if, sc, &sc->sc_dev);
sc 208 dev/isa/sf16fmr2.c sf2r_set_mute(struct sf2r_softc *sc)
sc 213 dev/isa/sf16fmr2.c if (sc->type == SF16FMR2_NOAMP) {
sc 214 dev/isa/sf16fmr2.c mute = (sc->mute || !sc->vol)? SF16FMR2_MUTE : SF16FMR2_UNMUTE;
sc 215 dev/isa/sf16fmr2.c bus_space_write_1(sc->tea.iot, sc->tea.ioh, 0, mute);
sc 217 dev/isa/sf16fmr2.c bus_space_write_1(sc->tea.iot, sc->tea.ioh, 0, mute);
sc 219 dev/isa/sf16fmr2.c mute = sc->mute? SF16FMR2_MUTE : SF16FMR2_UNMUTE;
sc 220 dev/isa/sf16fmr2.c bus_space_write_1(sc->tea.iot, sc->tea.ioh, 0, mute);
sc 222 dev/isa/sf16fmr2.c bus_space_write_1(sc->tea.iot, sc->tea.ioh, 0, mute);
sc 224 dev/isa/sf16fmr2.c vol = pt2254a_encode_volume(&sc->vol, 255);
sc 228 dev/isa/sf16fmr2.c bus_space_write_1(sc->tea.iot, sc->tea.ioh,
sc 232 dev/isa/sf16fmr2.c sf2r_send_vol_bit(sc->tea.iot, sc->tea.ioh,
sc 235 dev/isa/sf16fmr2.c bus_space_write_1(sc->tea.iot, sc->tea.ioh,
sc 237 dev/isa/sf16fmr2.c bus_space_write_1(sc->tea.iot, sc->tea.ioh,
sc 239 dev/isa/sf16fmr2.c bus_space_write_1(sc->tea.iot, sc->tea.ioh,
sc 260 dev/isa/sf16fmr2.c struct sf2r_softc sc;
sc 263 dev/isa/sf16fmr2.c sc.tea.iot = iot;
sc 264 dev/isa/sf16fmr2.c sc.tea.ioh = ioh;
sc 265 dev/isa/sf16fmr2.c sc.tea.offset = 0;
sc 266 dev/isa/sf16fmr2.c sc.tea.flags = flags;
sc 267 dev/isa/sf16fmr2.c sc.tea.init = sf2r_init;
sc 268 dev/isa/sf16fmr2.c sc.tea.rset = sf2r_rset;
sc 269 dev/isa/sf16fmr2.c sc.tea.write_bit = sf2r_write_bit;
sc 270 dev/isa/sf16fmr2.c sc.tea.read = sf2r_read_register;
sc 271 dev/isa/sf16fmr2.c sc.lock = TEA5757_S030;
sc 272 dev/isa/sf16fmr2.c sc.stereo = TEA5757_STEREO;
sc 280 dev/isa/sf16fmr2.c sc.freq = MIN_FM_FREQ;
sc 281 dev/isa/sf16fmr2.c tea5757_set_freq(&sc.tea, sc.stereo, sc.lock, sc.freq);
sc 282 dev/isa/sf16fmr2.c sf2r_set_mute(&sc);
sc 283 dev/isa/sf16fmr2.c freq = sf2r_read_register(iot, ioh, sc.tea.offset);
sc 284 dev/isa/sf16fmr2.c if (tea5757_decode_freq(freq, sc.tea.flags & TEA5757_TEA5759)
sc 285 dev/isa/sf16fmr2.c == sc.freq)
sc 346 dev/isa/sf16fmr2.c struct sf2r_softc *sc = v;
sc 349 dev/isa/sf16fmr2.c ri->mute = sc->mute;
sc 350 dev/isa/sf16fmr2.c ri->volume = sc->vol? 255 : 0;
sc 351 dev/isa/sf16fmr2.c ri->stereo = sc->stereo == TEA5757_STEREO? 1 : 0;
sc 354 dev/isa/sf16fmr2.c ri->lock = tea5757_decode_lock(sc->lock);
sc 356 dev/isa/sf16fmr2.c buf = sf2r_read_register(sc->tea.iot, sc->tea.ioh, sc->tea.offset);
sc 357 dev/isa/sf16fmr2.c ri->freq = sc->freq = tea5757_decode_freq(buf,
sc 358 dev/isa/sf16fmr2.c sc->tea.flags & TEA5757_TEA5759);
sc 367 dev/isa/sf16fmr2.c struct sf2r_softc *sc = v;
sc 369 dev/isa/sf16fmr2.c sc->mute = ri->mute? 1 : 0;
sc 370 dev/isa/sf16fmr2.c sc->vol = ri->volume? 255 : 0;
sc 371 dev/isa/sf16fmr2.c sc->stereo = ri->stereo? TEA5757_STEREO: TEA5757_MONO;
sc 372 dev/isa/sf16fmr2.c sc->lock = tea5757_encode_lock(ri->lock);
sc 373 dev/isa/sf16fmr2.c ri->freq = sc->freq = tea5757_set_freq(&sc->tea,
sc 374 dev/isa/sf16fmr2.c sc->lock, sc->stereo, ri->freq);
sc 375 dev/isa/sf16fmr2.c sf2r_set_mute(sc);
sc 383 dev/isa/sf16fmr2.c struct sf2r_softc *sc = v;
sc 385 dev/isa/sf16fmr2.c tea5757_search(&sc->tea, sc->lock, sc->stereo, f);
sc 386 dev/isa/sf16fmr2.c sf2r_set_mute(sc);
sc 198 dev/isa/tcic2_isa.c struct tcic_softc *sc = (void *) self;
sc 218 dev/isa/tcic2_isa.c sc->membase = ia->ia_maddr;
sc 219 dev/isa/tcic2_isa.c sc->subregionmask = (1 << (ia->ia_msize / TCIC_MEM_PAGESIZE)) - 1;
sc 220 dev/isa/tcic2_isa.c sc->memsize2 = tcic_log2((u_int)ia->ia_msize);
sc 222 dev/isa/tcic2_isa.c sc->intr_est = ic;
sc 223 dev/isa/tcic2_isa.c sc->pct = (pcmcia_chipset_tag_t) &tcic_isa_functions;
sc 225 dev/isa/tcic2_isa.c sc->iot = iot;
sc 226 dev/isa/tcic2_isa.c sc->ioh = ioh;
sc 227 dev/isa/tcic2_isa.c sc->memt = memt;
sc 228 dev/isa/tcic2_isa.c sc->memh = memh;
sc 234 dev/isa/tcic2_isa.c sc->chipid = tcic_chipid(iot, ioh);
sc 235 dev/isa/tcic2_isa.c sc->validirqs = tcic_validirqs(sc->chipid);
sc 242 dev/isa/tcic2_isa.c if ((sc->irq = ia->ia_irq) == IRQUNK) {
sc 244 dev/isa/tcic2_isa.c sc->validirqs & (tcic_isa_intr_alloc_mask & 0xff00),
sc 245 dev/isa/tcic2_isa.c IST_EDGE, &sc->irq)) {
sc 247 dev/isa/tcic2_isa.c sc->dev.dv_xname);
sc 250 dev/isa/tcic2_isa.c printf(": using irq %d", sc->irq);
sc 254 dev/isa/tcic2_isa.c tcic_attach(sc);
sc 275 dev/isa/tcic2_isa.c sc->iobase = 0x400;
sc 276 dev/isa/tcic2_isa.c sc->iosize = 0xbff;
sc 284 dev/isa/tcic2_isa.c sc->iobase = 0x330;
sc 285 dev/isa/tcic2_isa.c sc->iosize = 0x0cf;
sc 289 dev/isa/tcic2_isa.c sc->dev.dv_xname, (long) sc->iobase,
sc 290 dev/isa/tcic2_isa.c (long) sc->iobase + sc->iosize));
sc 293 dev/isa/tcic2_isa.c sc->iobase = tcic_isa_alloc_iobase;
sc 294 dev/isa/tcic2_isa.c sc->iosize = tcic_isa_alloc_iosize;
sc 297 dev/isa/tcic2_isa.c "(config override)\n", sc->dev.dv_xname, (long) sc->iobase,
sc 298 dev/isa/tcic2_isa.c (long) sc->iobase + sc->iosize));
sc 300 dev/isa/tcic2_isa.c sc->ih = isa_intr_establish(ic, sc->irq, IST_EDGE, IPL_TTY,
sc 301 dev/isa/tcic2_isa.c tcic_intr, sc, sc->dev.dv_xname);
sc 302 dev/isa/tcic2_isa.c if (sc->ih == NULL) {
sc 303 dev/isa/tcic2_isa.c printf("%s: can't establish interrupt\n", sc->dev.dv_xname);
sc 307 dev/isa/tcic2_isa.c tcic_attach_sockets(sc);
sc 329 dev/isa/tcic2_isa.c DPRINTF(("%s: tcic_isa_chip_intr_establish\n", h->sc->dev.dv_xname));
sc 339 dev/isa/tcic2_isa.c if (isa_intr_alloc(h->sc->intr_est,
sc 340 dev/isa/tcic2_isa.c h->sc->validirqs & tcic_isa_intr_alloc_mask, ist, &irq))
sc 342 dev/isa/tcic2_isa.c if ((ih = isa_intr_establish(h->sc->intr_est, irq, ist, ipl,
sc 346 dev/isa/tcic2_isa.c DPRINTF(("%s: intr established\n", h->sc->dev.dv_xname));
sc 366 dev/isa/tcic2_isa.c DPRINTF(("%s: tcic_isa_chip_intr_disestablish\n", h->sc->dev.dv_xname));
sc 375 dev/isa/tcic2_isa.c isa_intr_disestablish(h->sc->intr_est, ih);
sc 85 dev/isa/uha_isa.c struct uha_softc sc;
sc 93 dev/isa/uha_isa.c rv = u14_find(iot, ioh, &sc);
sc 98 dev/isa/uha_isa.c if (ia->ia_irq != -1 && ia->ia_irq != sc.sc_irq)
sc 100 dev/isa/uha_isa.c if (ia->ia_drq != -1 && ia->ia_drq != sc.sc_drq)
sc 102 dev/isa/uha_isa.c ia->ia_irq = sc.sc_irq;
sc 103 dev/isa/uha_isa.c ia->ia_drq = sc.sc_drq;
sc 119 dev/isa/uha_isa.c struct uha_softc *sc = (void *)self;
sc 129 dev/isa/uha_isa.c sc->sc_iot = iot;
sc 130 dev/isa/uha_isa.c sc->sc_ioh = ioh;
sc 131 dev/isa/uha_isa.c if (!u14_find(iot, ioh, sc))
sc 134 dev/isa/uha_isa.c if (sc->sc_drq != -1)
sc 135 dev/isa/uha_isa.c isadma_cascade(sc->sc_drq);
sc 137 dev/isa/uha_isa.c sc->sc_ih = isa_intr_establish(ic, sc->sc_irq, IST_EDGE, IPL_BIO,
sc 138 dev/isa/uha_isa.c u14_intr, sc, sc->sc_dev.dv_xname);
sc 139 dev/isa/uha_isa.c if (sc->sc_ih == NULL) {
sc 141 dev/isa/uha_isa.c sc->sc_dev.dv_xname);
sc 146 dev/isa/uha_isa.c sc->start_mbox = u14_start_mbox;
sc 147 dev/isa/uha_isa.c sc->poll = u14_poll;
sc 148 dev/isa/uha_isa.c sc->init = u14_init;
sc 150 dev/isa/uha_isa.c uha_attach(sc);
sc 157 dev/isa/uha_isa.c u14_find(iot, ioh, sc)
sc 160 dev/isa/uha_isa.c struct uha_softc *sc;
sc 233 dev/isa/uha_isa.c if (sc != NULL) {
sc 234 dev/isa/uha_isa.c sc->sc_irq = irq;
sc 235 dev/isa/uha_isa.c sc->sc_drq = drq;
sc 236 dev/isa/uha_isa.c sc->sc_scsi_dev = config & U14_HOSTID_MASK;
sc 246 dev/isa/uha_isa.c u14_start_mbox(sc, mscp)
sc 247 dev/isa/uha_isa.c struct uha_softc *sc;
sc 250 dev/isa/uha_isa.c bus_space_tag_t iot = sc->sc_iot;
sc 251 dev/isa/uha_isa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 261 dev/isa/uha_isa.c sc->sc_dev.dv_xname);
sc 281 dev/isa/uha_isa.c u14_poll(sc, xs, count)
sc 282 dev/isa/uha_isa.c struct uha_softc *sc;
sc 286 dev/isa/uha_isa.c bus_space_tag_t iot = sc->sc_iot;
sc 287 dev/isa/uha_isa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 295 dev/isa/uha_isa.c u14_intr(sc);
sc 311 dev/isa/uha_isa.c struct uha_softc *sc = arg;
sc 312 dev/isa/uha_isa.c bus_space_tag_t iot = sc->sc_iot;
sc 313 dev/isa/uha_isa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 319 dev/isa/uha_isa.c printf("%s: uhaintr ", sc->sc_dev.dv_xname);
sc 342 dev/isa/uha_isa.c mscp = uha_mscp_phys_kv(sc, mboxval);
sc 345 dev/isa/uha_isa.c sc->sc_dev.dv_xname);
sc 350 dev/isa/uha_isa.c uha_done(sc, mscp);
sc 358 dev/isa/uha_isa.c u14_init(sc)
sc 359 dev/isa/uha_isa.c struct uha_softc *sc;
sc 361 dev/isa/uha_isa.c bus_space_tag_t iot = sc->sc_iot;
sc 362 dev/isa/uha_isa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 96 dev/isa/vga_isa.c struct vga_isa_softc *sc = (struct vga_isa_softc *)self;
sc 171 dev/isa/viasio.c struct viasio_softc *sc = (void *)self;
sc 176 dev/isa/viasio.c sc->sc_iot = ia->ia_iot;
sc 177 dev/isa/viasio.c if (bus_space_map(sc->sc_iot, ia->ipa_io[0].base,
sc 178 dev/isa/viasio.c VT1211_IOSIZE, 0, &sc->sc_ioh)) {
sc 184 dev/isa/viasio.c viasio_conf_enable(sc->sc_iot, sc->sc_ioh);
sc 187 dev/isa/viasio.c reg = viasio_conf_read(sc->sc_iot, sc->sc_ioh, VT1211_REV);
sc 191 dev/isa/viasio.c viasio_hm_init(sc);
sc 192 dev/isa/viasio.c viasio_wdg_init(sc);
sc 196 dev/isa/viasio.c viasio_conf_disable(sc->sc_iot, sc->sc_ioh);
sc 200 dev/isa/viasio.c viasio_hm_init(struct viasio_softc *sc)
sc 209 dev/isa/viasio.c viasio_conf_write(sc->sc_iot, sc->sc_ioh, VT1211_LDN, VT1211_LDN_HM);
sc 215 dev/isa/viasio.c reg0 = viasio_conf_read(sc->sc_iot, sc->sc_ioh, VT1211_HM_ACT);
sc 218 dev/isa/viasio.c if ((sc->sc_dev.dv_cfdata->cf_flags &
sc 221 dev/isa/viasio.c viasio_conf_write(sc->sc_iot, sc->sc_ioh,
sc 223 dev/isa/viasio.c reg0 = viasio_conf_read(sc->sc_iot, sc->sc_ioh,
sc 237 dev/isa/viasio.c reg0 = viasio_conf_read(sc->sc_iot, sc->sc_ioh, VT1211_HM_ADDR_LSB);
sc 238 dev/isa/viasio.c reg1 = viasio_conf_read(sc->sc_iot, sc->sc_ioh, VT1211_HM_ADDR_MSB);
sc 243 dev/isa/viasio.c if (bus_space_map(sc->sc_iot, iobase, VT1211_HM_IOSIZE, 0,
sc 244 dev/isa/viasio.c &sc->sc_hm_ioh)) {
sc 253 dev/isa/viasio.c reg0 = bus_space_read_1(sc->sc_iot, sc->sc_hm_ioh, VT1211_HM_CONF);
sc 256 dev/isa/viasio.c if ((sc->sc_dev.dv_cfdata->cf_flags &
sc 259 dev/isa/viasio.c bus_space_write_1(sc->sc_iot, sc->sc_hm_ioh,
sc 261 dev/isa/viasio.c reg0 = bus_space_read_1(sc->sc_iot, sc->sc_hm_ioh,
sc 275 dev/isa/viasio.c reg0 = bus_space_read_1(sc->sc_iot, sc->sc_hm_ioh, VT1211_HM_PWMCS);
sc 276 dev/isa/viasio.c sc->sc_hm_clock = vt1211_hm_clock[reg0 & 0x07];
sc 277 dev/isa/viasio.c DPRINTF((", PWMCS 0x%02x, %dHz", reg0, sc->sc_hm_clock));
sc 280 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_TEMP1].type = SENSOR_TEMP;
sc 283 dev/isa/viasio.c reg0 = bus_space_read_1(sc->sc_iot, sc->sc_hm_ioh, VT1211_HM_UCHCONF);
sc 288 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_UCH1 + i - 1].type =
sc 291 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_UCH1 + i - 1].type =
sc 294 dev/isa/viasio.c snprintf(sc->sc_hm_sensors[VT1211_HMS_UCH1 + i - 1].desc,
sc 295 dev/isa/viasio.c sizeof(sc->sc_hm_sensors[VT1211_HMS_UCH1 + i - 1].desc),
sc 300 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_33V].type = SENSOR_VOLTS_DC;
sc 301 dev/isa/viasio.c strlcpy(sc->sc_hm_sensors[VT1211_HMS_33V].desc, "+3.3V",
sc 302 dev/isa/viasio.c sizeof(sc->sc_hm_sensors[VT1211_HMS_33V].desc));
sc 305 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_FAN1].type = SENSOR_FANRPM;
sc 306 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_FAN2].type = SENSOR_FANRPM;
sc 309 dev/isa/viasio.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 310 dev/isa/viasio.c sizeof(sc->sc_sensordev.xname));
sc 312 dev/isa/viasio.c sensor_attach(&sc->sc_sensordev, &sc->sc_hm_sensors[i]);
sc 313 dev/isa/viasio.c sensordev_install(&sc->sc_sensordev);
sc 314 dev/isa/viasio.c timeout_set(&sc->sc_hm_timo, viasio_hm_refresh, sc);
sc 315 dev/isa/viasio.c timeout_add(&sc->sc_hm_timo, hz);
sc 321 dev/isa/viasio.c struct viasio_softc *sc = arg;
sc 327 dev/isa/viasio.c reg0 = bus_space_read_1(sc->sc_iot, sc->sc_hm_ioh, VT1211_HM_TEMP1);
sc 328 dev/isa/viasio.c reg1 = bus_space_read_1(sc->sc_iot, sc->sc_hm_ioh, VT1211_HM_TCONF1);
sc 336 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_TEMP1].flags |= SENSOR_FINVALID;
sc 338 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_TEMP1].flags &= ~SENSOR_FINVALID;
sc 339 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_TEMP1].value = val;
sc 344 dev/isa/viasio.c if (sc->sc_hm_sensors[VT1211_HMS_UCH1 + i - 1].type ==
sc 347 dev/isa/viasio.c reg0 = bus_space_read_1(sc->sc_iot, sc->sc_hm_ioh,
sc 350 dev/isa/viasio.c reg1 = bus_space_read_1(sc->sc_iot,
sc 351 dev/isa/viasio.c sc->sc_hm_ioh, VT1211_HM_VID4);
sc 354 dev/isa/viasio.c reg1 = bus_space_read_1(sc->sc_iot,
sc 355 dev/isa/viasio.c sc->sc_hm_ioh, VT1211_HM_ETR);
sc 364 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_UCH1 +
sc 367 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_UCH1 +
sc 369 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_UCH1 +
sc 374 dev/isa/viasio.c reg0 = bus_space_read_1(sc->sc_iot, sc->sc_hm_ioh,
sc 381 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_UCH1 + i - 1].value =
sc 387 dev/isa/viasio.c reg0 = bus_space_read_1(sc->sc_iot, sc->sc_hm_ioh, VT1211_HM_33V);
sc 393 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_33V].value = ((val * 100000000000ULL) /
sc 397 dev/isa/viasio.c reg0 = bus_space_read_1(sc->sc_iot, sc->sc_hm_ioh, VT1211_HM_FAN1);
sc 398 dev/isa/viasio.c reg1 = bus_space_read_1(sc->sc_iot, sc->sc_hm_ioh, VT1211_HM_FSCTL);
sc 405 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_FAN1].value =
sc 406 dev/isa/viasio.c (sc->sc_hm_clock * 60 / 2) / val;
sc 407 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_FAN1].flags &= ~SENSOR_FINVALID;
sc 409 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_FAN1].flags |= SENSOR_FINVALID;
sc 413 dev/isa/viasio.c reg0 = bus_space_read_1(sc->sc_iot, sc->sc_hm_ioh, VT1211_HM_FAN2);
sc 414 dev/isa/viasio.c reg1 = bus_space_read_1(sc->sc_iot, sc->sc_hm_ioh, VT1211_HM_FSCTL);
sc 421 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_FAN2].value =
sc 422 dev/isa/viasio.c (sc->sc_hm_clock * 60 / 2) / val;
sc 423 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_FAN2].flags &= ~SENSOR_FINVALID;
sc 425 dev/isa/viasio.c sc->sc_hm_sensors[VT1211_HMS_FAN2].flags |= SENSOR_FINVALID;
sc 428 dev/isa/viasio.c timeout_add(&sc->sc_hm_timo, hz);
sc 432 dev/isa/viasio.c viasio_wdg_init(struct viasio_softc *sc)
sc 440 dev/isa/viasio.c viasio_conf_write(sc->sc_iot, sc->sc_ioh, VT1211_LDN, VT1211_LDN_WDG);
sc 446 dev/isa/viasio.c reg0 = viasio_conf_read(sc->sc_iot, sc->sc_ioh, VT1211_WDG_ACT);
sc 449 dev/isa/viasio.c if ((sc->sc_dev.dv_cfdata->cf_flags &
sc 452 dev/isa/viasio.c viasio_conf_write(sc->sc_iot, sc->sc_ioh,
sc 454 dev/isa/viasio.c reg0 = viasio_conf_read(sc->sc_iot, sc->sc_ioh,
sc 468 dev/isa/viasio.c reg0 = viasio_conf_read(sc->sc_iot, sc->sc_ioh, VT1211_WDG_ADDR_LSB);
sc 469 dev/isa/viasio.c reg1 = viasio_conf_read(sc->sc_iot, sc->sc_ioh, VT1211_WDG_ADDR_MSB);
sc 474 dev/isa/viasio.c if (bus_space_map(sc->sc_iot, iobase, VT1211_WDG_IOSIZE, 0,
sc 475 dev/isa/viasio.c &sc->sc_wdg_ioh)) {
sc 481 dev/isa/viasio.c wdog_register(sc, viasio_wdg_cb);
sc 487 dev/isa/viasio.c struct viasio_softc *sc = arg;
sc 494 dev/isa/viasio.c bus_space_write_1(sc->sc_iot, sc->sc_wdg_ioh, VT1211_WDG_TIMEOUT, mins);
sc 126 dev/isa/wdc_isa.c struct wdc_isa_softc *sc = (void *)self;
sc 131 dev/isa/wdc_isa.c sc->wdc_channel.cmd_iot = ia->ia_iot;
sc 132 dev/isa/wdc_isa.c sc->wdc_channel.ctl_iot = ia->ia_iot;
sc 133 dev/isa/wdc_isa.c sc->sc_ic = ia->ia_ic;
sc 134 dev/isa/wdc_isa.c sc->sc_isa = parent;
sc 136 dev/isa/wdc_isa.c if (bus_space_map(sc->wdc_channel.cmd_iot, ia->ia_iobase,
sc 137 dev/isa/wdc_isa.c WDC_ISA_REG_NPORTS, 0, &sc->wdc_channel.cmd_ioh) ||
sc 138 dev/isa/wdc_isa.c bus_space_map(sc->wdc_channel.ctl_iot,
sc 140 dev/isa/wdc_isa.c 0, &sc->wdc_channel.ctl_ioh)) {
sc 142 dev/isa/wdc_isa.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 144 dev/isa/wdc_isa.c sc->wdc_channel.data32iot = sc->wdc_channel.cmd_iot;
sc 145 dev/isa/wdc_isa.c sc->wdc_channel.data32ioh = sc->wdc_channel.cmd_ioh;
sc 147 dev/isa/wdc_isa.c sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE,
sc 148 dev/isa/wdc_isa.c IPL_BIO, wdcintr, &sc->wdc_channel, sc->sc_wdcdev.sc_dev.dv_xname);
sc 152 dev/isa/wdc_isa.c sc->sc_drq = ia->ia_drq;
sc 154 dev/isa/wdc_isa.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
sc 155 dev/isa/wdc_isa.c sc->sc_wdcdev.dma_arg = sc;
sc 156 dev/isa/wdc_isa.c sc->sc_wdcdev.dma_init = wdc_isa_dma_init;
sc 157 dev/isa/wdc_isa.c sc->sc_wdcdev.dma_start = wdc_isa_dma_start;
sc 158 dev/isa/wdc_isa.c sc->sc_wdcdev.dma_finish = wdc_isa_dma_finish;
sc 159 dev/isa/wdc_isa.c wdc_isa_dma_setup(sc);
sc 162 dev/isa/wdc_isa.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 165 dev/isa/wdc_isa.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_PREATA;
sc 166 dev/isa/wdc_isa.c if (sc->sc_wdcdev.sc_dev.dv_cfdata->cf_flags & WDC_OPTIONS_32)
sc 167 dev/isa/wdc_isa.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA32;
sc 168 dev/isa/wdc_isa.c sc->sc_wdcdev.PIO_cap = 0;
sc 169 dev/isa/wdc_isa.c sc->wdc_chanptr = &sc->wdc_channel;
sc 170 dev/isa/wdc_isa.c sc->sc_wdcdev.channels = &sc->wdc_chanptr;
sc 171 dev/isa/wdc_isa.c sc->sc_wdcdev.nchannels = 1;
sc 172 dev/isa/wdc_isa.c sc->wdc_channel.channel = 0;
sc 173 dev/isa/wdc_isa.c sc->wdc_channel.wdc = &sc->sc_wdcdev;
sc 174 dev/isa/wdc_isa.c sc->wdc_channel.ch_queue = malloc(sizeof(struct channel_queue),
sc 176 dev/isa/wdc_isa.c if (sc->wdc_channel.ch_queue == NULL) {
sc 178 dev/isa/wdc_isa.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 181 dev/isa/wdc_isa.c wdcattach(&sc->wdc_channel);
sc 182 dev/isa/wdc_isa.c wdc_print_current_modes(&sc->wdc_channel);
sc 187 dev/isa/wdc_isa.c wdc_isa_dma_setup(struct wdc_isa_softc *sc)
sc 189 dev/isa/wdc_isa.c if (isa_dmamap_create(sc->sc_isa, sc->sc_drq,
sc 192 dev/isa/wdc_isa.c sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq);
sc 193 dev/isa/wdc_isa.c sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_DMA;
sc 201 dev/isa/wdc_isa.c struct wdc_isa_softc *sc = v;
sc 203 dev/isa/wdc_isa.c isa_dmastart(sc->sc_isa, sc->sc_drq, databuf, datalen, NULL,
sc 219 dev/isa/wdc_isa.c struct wdc_isa_softc *sc = v;
sc 221 dev/isa/wdc_isa.c isa_dmadone(sc->sc_isa, sc->sc_drq);
sc 101 dev/isa/wdc_isapnp.c struct wdc_isapnp_softc *sc = (void *)self;
sc 105 dev/isa/wdc_isapnp.c sc->wdc_channel.cmd_iot = ipa->ia_iot;
sc 106 dev/isa/wdc_isapnp.c sc->wdc_channel.ctl_iot = ipa->ia_iot;
sc 114 dev/isa/wdc_isapnp.c sc->wdc_channel.cmd_ioh = ipa->ipa_io[0].h;
sc 115 dev/isa/wdc_isapnp.c sc->wdc_channel.ctl_ioh = ipa->ipa_io[1].h;
sc 117 dev/isa/wdc_isapnp.c sc->wdc_channel.cmd_ioh = ipa->ipa_io[1].h;
sc 118 dev/isa/wdc_isapnp.c sc->wdc_channel.ctl_ioh = ipa->ipa_io[0].h;
sc 120 dev/isa/wdc_isapnp.c sc->wdc_channel.data32iot = sc->wdc_channel.cmd_iot;
sc 121 dev/isa/wdc_isapnp.c sc->wdc_channel.data32ioh = sc->wdc_channel.cmd_ioh;
sc 123 dev/isa/wdc_isapnp.c sc->sc_ic = ipa->ia_ic;
sc 124 dev/isa/wdc_isapnp.c sc->sc_ih = isa_intr_establish(ipa->ia_ic, ipa->ipa_irq[0].num,
sc 125 dev/isa/wdc_isapnp.c ipa->ipa_irq[0].type, IPL_BIO, wdcintr, &sc->wdc_channel,
sc 126 dev/isa/wdc_isapnp.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 130 dev/isa/wdc_isapnp.c sc->sc_drq = ipa->ipa_drq[0].num;
sc 132 dev/isa/wdc_isapnp.c sc->sc_ad.cap |= WDC_CAPABILITY_DMA;
sc 133 dev/isa/wdc_isapnp.c sc->sc_ad.dma_start = &wdc_isapnp_dma_start;
sc 134 dev/isa/wdc_isapnp.c sc->sc_ad.dma_finish = &wdc_isapnp_dma_finish;
sc 135 dev/isa/wdc_isapnp.c wdc_isapnp_dma_setup(sc);
sc 138 dev/isa/wdc_isapnp.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32;
sc 139 dev/isa/wdc_isapnp.c sc->sc_wdcdev.PIO_cap = 0;
sc 140 dev/isa/wdc_isapnp.c sc->wdc_chanptr = &sc->wdc_channel;
sc 141 dev/isa/wdc_isapnp.c sc->sc_wdcdev.channels = &sc->wdc_chanptr;
sc 142 dev/isa/wdc_isapnp.c sc->sc_wdcdev.nchannels = 1;
sc 143 dev/isa/wdc_isapnp.c sc->wdc_channel.channel = 0;
sc 144 dev/isa/wdc_isapnp.c sc->wdc_channel.wdc = &sc->sc_wdcdev;
sc 145 dev/isa/wdc_isapnp.c sc->wdc_channel.ch_queue = malloc(sizeof(struct channel_queue),
sc 147 dev/isa/wdc_isapnp.c if (sc->wdc_channel.ch_queue == NULL) {
sc 153 dev/isa/wdc_isapnp.c wdcattach(&sc->wdc_channel);
sc 154 dev/isa/wdc_isapnp.c wdc_print_current_modes(&sc->wdc_channel);
sc 159 dev/isa/wdc_isapnp.c wdc_isapnp_dma_setup(sc)
sc 160 dev/isa/wdc_isapnp.c struct wdc_isapnp_softc *sc;
sc 163 dev/isa/wdc_isapnp.c if (isa_dmamap_create(sc->sc_ic, sc->sc_drq,
sc 166 dev/isa/wdc_isapnp.c sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq);
sc 167 dev/isa/wdc_isapnp.c sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_DMA;
sc 177 dev/isa/wdc_isapnp.c struct wdc_isapnp_softc *sc = scv;
sc 179 dev/isa/wdc_isapnp.c isa_dmastart(sc->sc_ic, sc->sc_drq, buf, size, NULL,
sc 188 dev/isa/wdc_isapnp.c struct wdc_isapnp_softc *sc = scv;
sc 190 dev/isa/wdc_isapnp.c isa_dmadone(sc->sc_ic, sc->sc_drq);
sc 121 dev/isa/wds.c #define wmbx (&sc->sc_mbx)
sc 134 dev/isa/wds.c #define NEEDBUFFER(sc) (sc->sc_revision < 0x800)
sc 218 dev/isa/wds.c wds_cmd(sc, ibuf, icnt)
sc 219 dev/isa/wds.c struct wds_softc *sc;
sc 223 dev/isa/wds.c bus_space_tag_t iot = sc->sc_iot;
sc 224 dev/isa/wds.c bus_space_handle_t ioh = sc->sc_ioh;
sc 289 dev/isa/wds.c struct wds_softc *sc = (void *)self;
sc 295 dev/isa/wds.c printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
sc 299 dev/isa/wds.c if (!wds_find(ia, sc))
sc 301 dev/isa/wds.c wds_init(sc);
sc 303 dev/isa/wds.c if (sc->sc_drq != DRQUNK)
sc 304 dev/isa/wds.c isadma_cascade(sc->sc_drq);
sc 306 dev/isa/wds.c TAILQ_INIT(&sc->sc_free_scb);
sc 307 dev/isa/wds.c TAILQ_INIT(&sc->sc_waiting_scb);
sc 308 dev/isa/wds.c wds_inquire_setup_information(sc);
sc 314 dev/isa/wds.c sc->sc_link.channel = SCSI_CHANNEL_ONLY_ONE;
sc 316 dev/isa/wds.c sc->sc_link.adapter_softc = sc;
sc 317 dev/isa/wds.c sc->sc_link.adapter_target = sc->sc_scsi_dev;
sc 318 dev/isa/wds.c sc->sc_link.adapter = &wds_switch;
sc 319 dev/isa/wds.c sc->sc_link.device = &wds_dev;
sc 323 dev/isa/wds.c sc->sc_link.openings = 1;
sc 325 dev/isa/wds.c sc->sc_ih = isa_intr_establish(ia->ia_ic, sc->sc_irq, IST_EDGE,
sc 326 dev/isa/wds.c IPL_BIO, wdsintr, sc, sc->sc_dev.dv_xname);
sc 329 dev/isa/wds.c saa.saa_sc_link = &sc->sc_link;
sc 338 dev/isa/wds.c wds_finish_scbs(sc)
sc 339 dev/isa/wds.c struct wds_softc *sc;
sc 351 dev/isa/wds.c sc->sc_dev.dv_xname);
sc 358 dev/isa/wds.c sc->sc_dev.dv_xname);
sc 365 dev/isa/wds.c scb = wds_scb_phys_kv(sc, phystol(wmbi->scb_addr));
sc 368 dev/isa/wds.c sc->sc_dev.dv_xname);
sc 388 dev/isa/wds.c wds_done(sc, scb, wmbi->stat);
sc 405 dev/isa/wds.c struct wds_softc *sc = arg;
sc 406 dev/isa/wds.c bus_space_tag_t iot = sc->sc_iot;
sc 407 dev/isa/wds.c bus_space_handle_t ioh = sc->sc_ioh;
sc 422 dev/isa/wds.c wds_finish_scbs(sc);
sc 426 dev/isa/wds.c wds_start_scbs(sc);
sc 431 dev/isa/wds.c sc->sc_dev.dv_xname, c);
sc 439 dev/isa/wds.c wds_reset_scb(sc, scb)
sc 440 dev/isa/wds.c struct wds_softc *sc;
sc 451 dev/isa/wds.c wds_free_scb(sc, scb)
sc 452 dev/isa/wds.c struct wds_softc *sc;
sc 458 dev/isa/wds.c wds_free_buf(sc, scb->buf);
sc 469 dev/isa/wds.c wds_reset_scb(sc, scb);
sc 470 dev/isa/wds.c TAILQ_INSERT_HEAD(&sc->sc_free_scb, scb, chain);
sc 477 dev/isa/wds.c wakeup(&sc->sc_free_scb);
sc 483 dev/isa/wds.c wds_free_buf(sc, buf)
sc 484 dev/isa/wds.c struct wds_softc *sc;
sc 505 dev/isa/wds.c wds_init_scb(sc, scb)
sc 506 dev/isa/wds.c struct wds_softc *sc;
sc 518 dev/isa/wds.c scb->nexthash = sc->sc_scbhash[hashnum];
sc 519 dev/isa/wds.c sc->sc_scbhash[hashnum] = scb;
sc 520 dev/isa/wds.c wds_reset_scb(sc, scb);
sc 530 dev/isa/wds.c wds_get_scb(sc, flags, needbuffer)
sc 531 dev/isa/wds.c struct wds_softc *sc;
sc 555 dev/isa/wds.c scb = TAILQ_FIRST(&sc->sc_free_scb);
sc 557 dev/isa/wds.c TAILQ_REMOVE(&sc->sc_free_scb, scb, chain);
sc 560 dev/isa/wds.c if (sc->sc_numscbs < WDS_SCB_MAX) {
sc 565 dev/isa/wds.c sc->sc_dev.dv_xname);
sc 568 dev/isa/wds.c wds_init_scb(sc, scb);
sc 569 dev/isa/wds.c sc->sc_numscbs++;
sc 574 dev/isa/wds.c tsleep(&sc->sc_free_scb, PRIBIO, "wdsscb", 0);
sc 583 dev/isa/wds.c scb->nexthash = sc->sc_scbhash[hashnum];
sc 584 dev/isa/wds.c sc->sc_scbhash[hashnum] = ccb;
sc 587 dev/isa/wds.c wds_free_scb(sc, scb);
sc 592 dev/isa/wds.c scb->buf = wds_get_buf(sc, flags);
sc 594 dev/isa/wds.c wds_free_scb(sc, scb);
sc 607 dev/isa/wds.c wds_get_buf(sc, flags)
sc 608 dev/isa/wds.c struct wds_softc *sc;
sc 635 dev/isa/wds.c wds_scb_phys_kv(sc, scb_phys)
sc 636 dev/isa/wds.c struct wds_softc *sc;
sc 640 dev/isa/wds.c struct wds_scb *scb = sc->sc_scbhash[hashnum];
sc 657 dev/isa/wds.c wds_queue_scb(sc, scb)
sc 658 dev/isa/wds.c struct wds_softc *sc;
sc 662 dev/isa/wds.c TAILQ_INSERT_TAIL(&sc->sc_waiting_scb, scb, chain);
sc 663 dev/isa/wds.c wds_start_scbs(sc);
sc 670 dev/isa/wds.c wds_collect_mbo(sc)
sc 671 dev/isa/wds.c struct wds_softc *sc;
sc 680 dev/isa/wds.c while (sc->sc_mbofull > 0) {
sc 685 dev/isa/wds.c scb = wds_scb_phys_kv(sc, phystol(wmbo->scb_addr));
sc 689 dev/isa/wds.c --sc->sc_mbofull;
sc 700 dev/isa/wds.c wds_start_scbs(sc)
sc 701 dev/isa/wds.c struct wds_softc *sc;
sc 709 dev/isa/wds.c while ((scb = TAILQ_FIRST(&sc->sc_waiting_scb)) != NULL) {
sc 710 dev/isa/wds.c if (sc->sc_mbofull >= WDS_MBX_SIZE) {
sc 711 dev/isa/wds.c wds_collect_mbo(sc);
sc 712 dev/isa/wds.c if (sc->sc_mbofull >= WDS_MBX_SIZE) {
sc 714 dev/isa/wds.c wds_cmd(sc, &c, sizeof c);
sc 719 dev/isa/wds.c TAILQ_REMOVE(&sc->sc_waiting_scb, scb, chain);
sc 740 dev/isa/wds.c wds_cmd(sc, &c, sizeof c);
sc 747 dev/isa/wds.c ++sc->sc_mbofull;
sc 758 dev/isa/wds.c wds_done(sc, scb, stat)
sc 759 dev/isa/wds.c struct wds_softc *sc;
sc 789 dev/isa/wds.c printf("%s: Is this an error?\n", sc->sc_dev.dv_xname);
sc 796 dev/isa/wds.c wds_sense (sc, scb);
sc 809 dev/isa/wds.c printf("%s: VENDOR ERROR %02x, scsi %02x\n", sc->sc_dev.dv_xname, scb->cmd.venderr, scb->cmd.stat);
sc 836 dev/isa/wds.c if (NEEDBUFFER(sc) && xs->datalen) {
sc 851 dev/isa/wds.c wds_free_scb(sc, scb);
sc 857 dev/isa/wds.c wds_find(ia, sc)
sc 859 dev/isa/wds.c struct wds_softc *sc;
sc 890 dev/isa/wds.c sc ? sc->sc_dev.dv_xname : "wds?",
sc 895 dev/isa/wds.c sc ? sc->sc_dev.dv_xname : "wds?");
sc 911 dev/isa/wds.c if (sc != NULL) {
sc 914 dev/isa/wds.c sc->sc_scsi_dev = 7;
sc 916 dev/isa/wds.c sc->sc_iot = iot;
sc 917 dev/isa/wds.c sc->sc_ioh = ioh;
sc 918 dev/isa/wds.c sc->sc_irq = ia->ia_irq;
sc 919 dev/isa/wds.c sc->sc_drq = ia->ia_drq;
sc 929 dev/isa/wds.c wds_init(sc)
sc 930 dev/isa/wds.c struct wds_softc *sc;
sc 932 dev/isa/wds.c bus_space_tag_t iot = sc->sc_iot;
sc 933 dev/isa/wds.c bus_space_handle_t ioh = sc->sc_ioh;
sc 950 dev/isa/wds.c sc->sc_mbofull = 0;
sc 960 dev/isa/wds.c init.scsi_id = sc->sc_scsi_dev;
sc 962 dev/isa/wds.c sc->sc_scsi_dev = init.scsi_id;
sc 975 dev/isa/wds.c wds_cmd(sc, (u_char *)&init, sizeof init);
sc 980 dev/isa/wds.c wds_cmd(sc, &c, sizeof c);
sc 989 dev/isa/wds.c wds_inquire_setup_information(sc)
sc 990 dev/isa/wds.c struct wds_softc *sc;
sc 996 dev/isa/wds.c if ((scb = wds_get_scb(sc, SCSI_NOSLEEP, 0)) == NULL) {
sc 998 dev/isa/wds.c sc->sc_dev.dv_xname);
sc 1009 dev/isa/wds.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, WDS_HCR, WDSH_DRQEN);
sc 1013 dev/isa/wds.c wds_queue_scb(sc, scb);
sc 1016 dev/isa/wds.c if (wds_ipoll(sc, scb, scb->timeout))
sc 1021 dev/isa/wds.c sc->sc_revision = (scb->cmd.targ << 8) | scb->cmd.scb.opcode;
sc 1031 dev/isa/wds.c wds_free_scb(sc, scb);
sc 1051 dev/isa/wds.c struct wds_softc *sc = sc_link->adapter_softc;
sc 1052 dev/isa/wds.c bus_space_tag_t iot = sc->sc_iot;
sc 1053 dev/isa/wds.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1069 dev/isa/wds.c printf("%s: reset!\n", sc->sc_dev.dv_xname);
sc 1070 dev/isa/wds.c wds_init(sc);
sc 1081 dev/isa/wds.c if ((scb = wds_get_scb(sc, flags, NEEDBUFFER(sc))) == NULL) {
sc 1091 dev/isa/wds.c printf("%s: UIO is untested and disabled!\n", sc->sc_dev.dv_xname);
sc 1107 dev/isa/wds.c if (!NEEDBUFFER(sc) && xs->datalen) {
sc 1169 dev/isa/wds.c sc->sc_dev.dv_xname);
sc 1204 dev/isa/wds.c sc->sc_dev.dv_xname, WDS_NSEG);
sc 1210 dev/isa/wds.c sc->sc_dev.dv_xname);
sc 1228 dev/isa/wds.c sc->sc_dev.dv_xname);
sc 1259 dev/isa/wds.c wds_queue_scb(sc, scb);
sc 1273 dev/isa/wds.c wds_free_scb(sc, scb);
sc 1284 dev/isa/wds.c if (wds_poll(sc, xs, scb->timeout)) {
sc 1286 dev/isa/wds.c if (wds_poll(sc, xs, scb->timeout))
sc 1293 dev/isa/wds.c wds_free_scb(sc, scb);
sc 1301 dev/isa/wds.c wds_sense(sc, scb)
sc 1302 dev/isa/wds.c struct wds_softc *sc;
sc 1316 dev/isa/wds.c if (NEEDBUFFER(sc) && xs->datalen) {
sc 1335 dev/isa/wds.c wds_queue_scb(sc, scb);
sc 1351 dev/isa/wds.c wds_poll(sc, xs, count)
sc 1352 dev/isa/wds.c struct wds_softc *sc;
sc 1356 dev/isa/wds.c bus_space_tag_t iot = sc->sc_iot;
sc 1357 dev/isa/wds.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1366 dev/isa/wds.c wdsintr(sc);
sc 1379 dev/isa/wds.c wds_ipoll(sc, scb, count)
sc 1380 dev/isa/wds.c struct wds_softc *sc;
sc 1384 dev/isa/wds.c bus_space_tag_t iot = sc->sc_iot;
sc 1385 dev/isa/wds.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1394 dev/isa/wds.c wdsintr(sc);
sc 1410 dev/isa/wds.c struct wds_softc *sc;
sc 1419 dev/isa/wds.c sc = sc_link->adapter_softc;
sc 1428 dev/isa/wds.c wds_collect_mbo(sc);
sc 1430 dev/isa/wds.c printf("%s: not taking commands!\n", sc->sc_dev.dv_xname);
sc 1450 dev/isa/wds.c wds_queue_scb(sc, scb);
sc 121 dev/isa/wss.c wssattach(sc)
sc 122 dev/isa/wss.c struct wss_softc *sc;
sc 126 dev/isa/wss.c madattach(sc);
sc 128 dev/isa/wss.c sc->sc_ih = isa_intr_establish(sc->sc_ic, sc->wss_irq, IST_EDGE, IPL_AUDIO,
sc 129 dev/isa/wss.c ad1848_intr, &sc->sc_ad1848, sc->sc_dev.dv_xname);
sc 131 dev/isa/wss.c ad1848_attach(&sc->sc_ad1848);
sc 133 dev/isa/wss.c version = bus_space_read_1(sc->sc_iot, sc->sc_ioh, WSS_STATUS) & WSS_VERSMASK;
sc 135 dev/isa/wss.c switch(sc->mad_chip_type) {
sc 153 dev/isa/wss.c sc->sc_ad1848.parent = sc;
sc 155 dev/isa/wss.c audio_attach_mi(&wss_hw_if, &sc->sc_ad1848, &sc->sc_dev);
sc 371 dev/isa/wss.c mad_read(sc, port)
sc 372 dev/isa/wss.c struct wss_softc *sc;
sc 379 dev/isa/wss.c switch (sc->mad_chip_type) { /* Output password */
sc 391 dev/isa/wss.c panic("mad_read: Bad chip type=%d", sc->mad_chip_type);
sc 394 dev/isa/wss.c bus_space_write_1(sc->sc_iot, sc->mad_ioh, MC_PASSWD_REG, pwd);
sc 395 dev/isa/wss.c tmp = bus_space_read_1(sc->sc_iot, sc->mad_ioh, port);
sc 401 dev/isa/wss.c mad_write(sc, port, value)
sc 402 dev/isa/wss.c struct wss_softc *sc;
sc 409 dev/isa/wss.c switch (sc->mad_chip_type) { /* Output password */
sc 421 dev/isa/wss.c panic("mad_write: Bad chip type=%d", sc->mad_chip_type);
sc 424 dev/isa/wss.c bus_space_write_1(sc->sc_iot, sc->mad_ioh, MC_PASSWD_REG, pwd);
sc 425 dev/isa/wss.c bus_space_write_1(sc->sc_iot, sc->mad_ioh, port, value & 0xff);
sc 430 dev/isa/wss.c madattach(sc)
sc 431 dev/isa/wss.c struct wss_softc *sc;
sc 436 dev/isa/wss.c if (sc->mad_chip_type == MAD_NONE)
sc 440 dev/isa/wss.c joy = sc->sc_dev.dv_cfdata->cf_flags & 2 ? MC1_JOYDISABLE : 0;
sc 443 dev/isa/wss.c mad_write(sc, MC1_PORT, M_WSS_PORT_SELECT(sc->mad_ioindex) | joy);
sc 444 dev/isa/wss.c mad_write(sc, MC2_PORT, 0x03); /* ? */
sc 445 dev/isa/wss.c mad_write(sc, MC3_PORT, 0xf0); /* Disable SB */
sc 448 dev/isa/wss.c strncmp(sc->sc_ad1848.chip_name, "CS4248", 6) == 0 ||
sc 449 dev/isa/wss.c strncmp(sc->sc_ad1848.chip_name, "CS4231", 6) == 0 ? 0x02 : 0;
sc 451 dev/isa/wss.c if (sc->mad_chip_type == MAD_82C929) {
sc 452 dev/isa/wss.c mad_write(sc, MC4_PORT, 0x92);
sc 453 dev/isa/wss.c mad_write(sc, MC5_PORT, 0xA5 | cs4231_mode);
sc 454 dev/isa/wss.c mad_write(sc, MC6_PORT, 0x03); /* Disable MPU401 */
sc 456 dev/isa/wss.c mad_write(sc, MC4_PORT, 0x02);
sc 457 dev/isa/wss.c mad_write(sc, MC5_PORT, 0x30 | cs4231_mode);
sc 464 dev/isa/wss.c DPRINTF(("port %03x after init = %02x\n", i, mad_read(sc, i)));
sc 101 dev/isa/wss_isa.c struct wss_softc probesc, *sc = &probesc;
sc 103 dev/isa/wss_isa.c bzero(sc, sizeof *sc);
sc 104 dev/isa/wss_isa.c sc->sc_dev.dv_cfdata = ((struct device *)match)->dv_cfdata;
sc 105 dev/isa/wss_isa.c if (wssfind(parent, sc, aux)) {
sc 106 dev/isa/wss_isa.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, WSS_CODEC);
sc 107 dev/isa/wss_isa.c ad1848_unmap(&sc->sc_ad1848);
sc 108 dev/isa/wss_isa.c madunmap(sc);
sc 116 dev/isa/wss_isa.c wssfind(parent, sc, ia)
sc 118 dev/isa/wss_isa.c struct wss_softc *sc;
sc 126 dev/isa/wss_isa.c sc->sc_iot = ia->ia_iot;
sc 127 dev/isa/wss_isa.c if (sc->sc_dev.dv_cfdata->cf_flags & 1)
sc 128 dev/isa/wss_isa.c madprobe(sc, ia->ia_iobase);
sc 130 dev/isa/wss_isa.c sc->mad_chip_type = MAD_NONE;
sc 138 dev/isa/wss_isa.c if (bus_space_map(sc->sc_iot, ia->ia_iobase, WSS_CODEC, 0, &sc->sc_ioh))
sc 141 dev/isa/wss_isa.c sc->sc_ad1848.sc_iot = sc->sc_iot;
sc 144 dev/isa/wss_isa.c if (ad1848_mapprobe(&sc->sc_ad1848, ia->ia_iobase + WSS_CODEC) == 0)
sc 154 dev/isa/wss_isa.c sc->wss_drq = ia->ia_drq;
sc 156 dev/isa/wss_isa.c if (sc->wss_drq != DRQUNK && !isa_drq_isfree(parent, sc->wss_drq))
sc 164 dev/isa/wss_isa.c sc->wss_irq = ia->ia_irq;
sc 166 dev/isa/wss_isa.c if (sc->sc_ad1848.mode <= 1)
sc 168 dev/isa/wss_isa.c sc->wss_recdrq =
sc 169 dev/isa/wss_isa.c sc->sc_ad1848.mode > 1 && ia->ia_drq2 != DRQUNK ?
sc 171 dev/isa/wss_isa.c if (sc->wss_recdrq != sc->wss_drq && !isa_drq_isfree(parent, sc->wss_recdrq))
sc 175 dev/isa/wss_isa.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, WSS_CONFIG,
sc 181 dev/isa/wss_isa.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, WSS_CODEC);
sc 183 dev/isa/wss_isa.c madunmap(sc);
sc 196 dev/isa/wss_isa.c struct wss_softc *sc = (struct wss_softc *)self;
sc 199 dev/isa/wss_isa.c if (!wssfind(parent, sc, ia)) {
sc 200 dev/isa/wss_isa.c printf("%s: wssfind failed\n", sc->sc_dev.dv_xname);
sc 204 dev/isa/wss_isa.c sc->sc_ic = ia->ia_ic;
sc 205 dev/isa/wss_isa.c sc->sc_ad1848.sc_isa = parent;
sc 207 dev/isa/wss_isa.c wssattach(sc);
sc 245 dev/isa/wss_isa.c detect_mad16(sc, chip_type)
sc 246 dev/isa/wss_isa.c struct wss_softc *sc;
sc 251 dev/isa/wss_isa.c sc->mad_chip_type = chip_type;
sc 258 dev/isa/wss_isa.c if ((tmp = mad_read(sc, MC1_PORT)) == 0xff) {
sc 267 dev/isa/wss_isa.c if ((tmp2 = bus_space_read_1(sc->sc_iot, sc->mad_ioh, MC1_PORT)) == tmp) {
sc 272 dev/isa/wss_isa.c mad_write(sc, MC1_PORT, tmp ^ 0x80); /* Toggle a bit */
sc 275 dev/isa/wss_isa.c if ((tmp2 = mad_read(sc, MC1_PORT)) != (tmp ^ 0x80)) {
sc 276 dev/isa/wss_isa.c mad_write(sc, MC1_PORT, tmp); /* Restore */
sc 281 dev/isa/wss_isa.c mad_write(sc, MC1_PORT, tmp); /* Restore */
sc 286 dev/isa/wss_isa.c madprobe(sc, iobase)
sc 287 dev/isa/wss_isa.c struct wss_softc *sc;
sc 295 dev/isa/wss_isa.c if (bus_space_map(sc->sc_iot, MAD_BASE, MAD_NPORT, 0, &sc->mad_ioh))
sc 297 dev/isa/wss_isa.c if (bus_space_map(sc->sc_iot, MAD_REG1, MAD_LEN1, 0, &sc->mad_ioh1))
sc 299 dev/isa/wss_isa.c if (bus_space_map(sc->sc_iot, MAD_REG2, MAD_LEN2, 0, &sc->mad_ioh2))
sc 301 dev/isa/wss_isa.c if (bus_space_map(sc->sc_iot, MAD_REG3, MAD_LEN3, 0, &sc->mad_ioh3))
sc 305 dev/isa/wss_isa.c if (!detect_mad16(sc, MAD_82C928)) {
sc 308 dev/isa/wss_isa.c if (!detect_mad16(sc, MAD_82C929))
sc 310 dev/isa/wss_isa.c sc->mad_chip_type = MAD_82C929;
sc 313 dev/isa/wss_isa.c sc->mad_chip_type = MAD_82C928;
sc 314 dev/isa/wss_isa.c if ((mad_read(sc, MC3_PORT) & 0x03) == 0x03) {
sc 316 dev/isa/wss_isa.c sc->mad_chip_type = MAD_OTI601D;
sc 319 dev/isa/wss_isa.c sc->mad_chip_type = MAD_82C928;
sc 326 dev/isa/wss_isa.c printf("mad: port %03x = %02x\n", i, mad_read(sc, i));
sc 337 dev/isa/wss_isa.c sc->mad_ioindex = i;
sc 339 dev/isa/wss_isa.c mad_write(sc, MC1_PORT, M_WSS_PORT_SELECT(i) | MC1_JOYDISABLE);
sc 340 dev/isa/wss_isa.c mad_write(sc, MC2_PORT, 0x03); /* ? */
sc 341 dev/isa/wss_isa.c mad_write(sc, MC3_PORT, 0xf0); /* Disable SB */
sc 345 dev/isa/wss_isa.c bus_space_unmap(sc->sc_iot, sc->mad_ioh3, MAD_LEN3);
sc 347 dev/isa/wss_isa.c bus_space_unmap(sc->sc_iot, sc->mad_ioh2, MAD_LEN2);
sc 349 dev/isa/wss_isa.c bus_space_unmap(sc->sc_iot, sc->mad_ioh1, MAD_LEN1);
sc 351 dev/isa/wss_isa.c bus_space_unmap(sc->sc_iot, sc->mad_ioh, MAD_NPORT);
sc 353 dev/isa/wss_isa.c sc->mad_chip_type = MAD_NONE;
sc 357 dev/isa/wss_isa.c madunmap(sc)
sc 358 dev/isa/wss_isa.c struct wss_softc *sc;
sc 360 dev/isa/wss_isa.c if (sc->mad_chip_type == MAD_NONE)
sc 362 dev/isa/wss_isa.c bus_space_unmap(sc->sc_iot, sc->mad_ioh, MAD_NPORT);
sc 363 dev/isa/wss_isa.c bus_space_unmap(sc->sc_iot, sc->mad_ioh1, MAD_LEN1);
sc 364 dev/isa/wss_isa.c bus_space_unmap(sc->sc_iot, sc->mad_ioh2, MAD_LEN2);
sc 365 dev/isa/wss_isa.c bus_space_unmap(sc->sc_iot, sc->mad_ioh3, MAD_LEN3);
sc 97 dev/isa/wss_isapnp.c struct wss_softc *sc = (struct wss_softc *)self;
sc 98 dev/isa/wss_isapnp.c struct ad1848_softc *ac = &sc->sc_ad1848;
sc 104 dev/isa/wss_isapnp.c sc->sc_iot = ipa->ia_iot;
sc 105 dev/isa/wss_isapnp.c sc->sc_ioh = ipa->ipa_io[0].h;
sc 106 dev/isa/wss_isapnp.c sc->mad_chip_type = MAD_NONE;
sc 109 dev/isa/wss_isapnp.c ac->sc_iot = sc->sc_iot;
sc 111 dev/isa/wss_isapnp.c ac->sc_ioh = sc->sc_ioh;
sc 115 dev/isa/wss_isapnp.c sc->sc_ic = ipa->ia_ic;
sc 116 dev/isa/wss_isapnp.c sc->wss_irq = ipa->ipa_irq[0].num;
sc 117 dev/isa/wss_isapnp.c sc->wss_drq = ipa->ipa_drq[0].num;
sc 118 dev/isa/wss_isapnp.c sc->wss_recdrq = ipa->ipa_ndrq > 1 ? ipa->ipa_drq[1].num :
sc 121 dev/isa/wss_isapnp.c if (ad1848_probe(&sc->sc_ad1848)==0) {
sc 126 dev/isa/wss_isapnp.c wssattach(sc);
sc 135 dev/isa/ym.c struct ym_softc *sc = v;
sc 137 dev/isa/ym.c if ( /* XXX && */ sc->sc_hasmpu)
sc 138 dev/isa/ym.c mpu_intr(&sc->sc_mpu_sc);
sc 144 dev/isa/ym.c ym_attach(sc)
sc 145 dev/isa/ym.c struct ym_softc *sc;
sc 153 dev/isa/ym.c sc->sc_ih = isa_intr_establish(sc->sc_ic, sc->ym_irq, IST_EDGE,
sc 154 dev/isa/ym.c IPL_AUDIO, ym_intr, &sc->sc_ad1848, sc->sc_dev.dv_xname);
sc 156 dev/isa/ym.c ad1848_attach(&sc->sc_ad1848);
sc 158 dev/isa/ym.c sc->sc_ad1848.parent = sc;
sc 161 dev/isa/ym.c ym_set_master_gain(sc, &vol_mid);
sc 162 dev/isa/ym.c ym_set_mic_gain(sc, 0);
sc 163 dev/isa/ym.c sc->master_mute = 0;
sc 164 dev/isa/ym.c ym_mute(sc, SA3_VOL_L, sc->master_mute);
sc 165 dev/isa/ym.c ym_mute(sc, SA3_VOL_R, sc->master_mute);
sc 167 dev/isa/ym.c sc->mic_mute = 1;
sc 168 dev/isa/ym.c ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
sc 171 dev/isa/ym.c sc->sc_hasmpu = 0;
sc 172 dev/isa/ym.c if (sc->sc_mpu_sc.iobase) {
sc 173 dev/isa/ym.c sc->sc_mpu_sc.iot = sc->sc_iot;
sc 174 dev/isa/ym.c if (mpu_find(&sc->sc_mpu_sc)) {
sc 175 dev/isa/ym.c sc->sc_hasmpu = 1;
sc 179 dev/isa/ym.c midi_attach_mi(mhw, sc, &sc->sc_dev);
sc 182 dev/isa/ym.c audio_attach_mi(&ym_hw_if, &sc->sc_ad1848, &sc->sc_dev);
sc 186 dev/isa/ym.c ym_read(sc, reg)
sc 187 dev/isa/ym.c struct ym_softc *sc;
sc 190 dev/isa/ym.c bus_space_write_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX,
sc 192 dev/isa/ym.c return (bus_space_read_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_DATA));
sc 196 dev/isa/ym.c ym_write(sc, reg, data)
sc 197 dev/isa/ym.c struct ym_softc *sc;
sc 201 dev/isa/ym.c bus_space_write_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_INDEX,
sc 203 dev/isa/ym.c bus_space_write_1(sc->sc_iot, sc->sc_controlioh, SA3_CTL_DATA,
sc 240 dev/isa/ym.c ym_mute(sc, left_reg, mute)
sc 241 dev/isa/ym.c struct ym_softc *sc;
sc 247 dev/isa/ym.c reg = ym_read(sc, left_reg);
sc 249 dev/isa/ym.c ym_write(sc, left_reg, reg | 0x80);
sc 251 dev/isa/ym.c ym_write(sc, left_reg, reg & ~0x80);
sc 255 dev/isa/ym.c ym_set_master_gain(sc, vol)
sc 256 dev/isa/ym.c struct ym_softc *sc;
sc 261 dev/isa/ym.c sc->master_gain = *vol;
sc 266 dev/isa/ym.c ym_write(sc, SA3_VOL_L, (ym_read(sc, SA3_VOL_L) & ~SA3_VOL_MV) | atten);
sc 271 dev/isa/ym.c ym_write(sc, SA3_VOL_R, (ym_read(sc, SA3_VOL_R) & ~SA3_VOL_MV) | atten);
sc 275 dev/isa/ym.c ym_set_mic_gain(sc, vol)
sc 276 dev/isa/ym.c struct ym_softc *sc;
sc 281 dev/isa/ym.c sc->mic_gain = vol;
sc 286 dev/isa/ym.c ym_write(sc, SA3_MIC_VOL,
sc 287 dev/isa/ym.c (ym_read(sc, SA3_MIC_VOL) & ~SA3_MIC_MCV) | atten);
sc 291 dev/isa/ym.c ym_set_3d(sc, cp, val, reg)
sc 292 dev/isa/ym.c struct ym_softc *sc;
sc 306 dev/isa/ym.c ym_write(sc, reg, e);
sc 315 dev/isa/ym.c struct ym_softc *sc = ac->parent;
sc 327 dev/isa/ym.c ym_set_master_gain(sc, &vol);
sc 331 dev/isa/ym.c sc->master_mute = (cp->un.ord != 0);
sc 332 dev/isa/ym.c ym_mute(sc, SA3_VOL_L, sc->master_mute);
sc 333 dev/isa/ym.c ym_mute(sc, SA3_VOL_R, sc->master_mute);
sc 340 dev/isa/ym.c ym_set_mic_gain(sc,
sc 345 dev/isa/ym.c sc->sc_eqmode = cp->un.ord & SA3_SYS_CTL_YMODE;
sc 346 dev/isa/ym.c ym_write(sc, SA3_SYS_CTL, (ym_read(sc, SA3_SYS_CTL) &
sc 347 dev/isa/ym.c ~SA3_SYS_CTL_YMODE) | sc->sc_eqmode);
sc 351 dev/isa/ym.c ym_set_3d(sc, cp, &sc->sc_treble, SA3_3D_TREBLE);
sc 355 dev/isa/ym.c ym_set_3d(sc, cp, &sc->sc_bass, SA3_3D_BASS);
sc 359 dev/isa/ym.c ym_set_3d(sc, cp, &sc->sc_wide, SA3_3D_WIDE);
sc 363 dev/isa/ym.c sc->mic_mute = (cp->un.ord != 0);
sc 364 dev/isa/ym.c ym_mute(sc, SA3_MIC_VOL, sc->mic_mute);
sc 381 dev/isa/ym.c struct ym_softc *sc = ac->parent;
sc 392 dev/isa/ym.c ad1848_from_vol(cp, &sc->master_gain);
sc 396 dev/isa/ym.c cp->un.ord = sc->master_mute;
sc 402 dev/isa/ym.c cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = sc->mic_gain;
sc 406 dev/isa/ym.c cp->un.ord = sc->sc_eqmode;
sc 410 dev/isa/ym.c ad1848_from_vol(cp, &sc->sc_treble);
sc 414 dev/isa/ym.c ad1848_from_vol(cp, &sc->sc_bass);
sc 418 dev/isa/ym.c ad1848_from_vol(cp, &sc->sc_wide);
sc 422 dev/isa/ym.c cp->un.ord = sc->mic_mute;
sc 97 dev/isa/ym_isapnp.c struct ym_softc *sc = (struct ym_softc *)self;
sc 100 dev/isa/ym_isapnp.c sc->sc_iot = ia->ia_iot;
sc 101 dev/isa/ym_isapnp.c sc->sc_ioh = ia->ipa_io[1].h;
sc 102 dev/isa/ym_isapnp.c sc->sc_ic = ia->ia_ic;
sc 104 dev/isa/ym_isapnp.c sc->ym_irq = ia->ipa_irq[0].num;
sc 105 dev/isa/ym_isapnp.c sc->ym_drq = ia->ipa_drq[0].num;
sc 106 dev/isa/ym_isapnp.c sc->ym_recdrq = ia->ipa_drq[1].num;
sc 108 dev/isa/ym_isapnp.c sc->sc_controlioh = ia->ipa_io[4].h;
sc 110 dev/isa/ym_isapnp.c sc->sc_ad1848.sc_ioh = sc->sc_ioh;
sc 111 dev/isa/ym_isapnp.c sc->sc_ad1848.sc_isa = parent->dv_parent;
sc 112 dev/isa/ym_isapnp.c sc->sc_ad1848.sc_iot = sc->sc_iot;
sc 113 dev/isa/ym_isapnp.c sc->sc_ad1848.sc_iooffs = WSS_CODEC;
sc 114 dev/isa/ym_isapnp.c sc->sc_ad1848.mode = 2;
sc 115 dev/isa/ym_isapnp.c sc->sc_ad1848.MCE_bit = MODE_CHANGE_ENABLE;
sc 118 dev/isa/ym_isapnp.c sc->sc_mpu_sc.iobase = ia->ipa_io[3].base;
sc 119 dev/isa/ym_isapnp.c sc->sc_mpu_sc.ioh = ia->ipa_io[3].h;
sc 122 dev/isa/ym_isapnp.c ym_attach(sc);
sc 93 dev/microcode/adw/adwmcode.h #define ADW_CARRIER_VADDR(sc, x) ((ADW_CARRIER *) \
sc 94 dev/microcode/adw/adwmcode.h (((u_int8_t *)(sc)->sc_control->carriers) + \
sc 96 dev/microcode/adw/adwmcode.h (sc)->sc_dmamap_carrier->dm_segs[0].ds_addr))
sc 91 dev/midi.c struct midi_softc *sc = (struct midi_softc *)addr;
sc 92 dev/midi.c struct midi_buffer *mb = &sc->inbuf;
sc 94 dev/midi.c if (sc->isdying || !sc->isopen || !(sc->flags & FREAD)) return;
sc 97 dev/midi.c if (sc->seqopen) {
sc 98 dev/midi.c midi_toevent(sc, data);
sc 105 dev/midi.c if (sc->rchan) {
sc 106 dev/midi.c sc->rchan = 0;
sc 107 dev/midi.c wakeup(&sc->rchan);
sc 109 dev/midi.c selwakeup(&sc->rsel);
sc 110 dev/midi.c if (sc->async)
sc 111 dev/midi.c psignal(sc->async, SIGIO);
sc 120 dev/midi.c struct midi_softc *sc = MIDI_DEV2SC(dev);
sc 121 dev/midi.c struct midi_buffer *mb = &sc->inbuf;
sc 125 dev/midi.c if (!(sc->flags & FREAD))
sc 132 dev/midi.c if (sc->isdying) {
sc 140 dev/midi.c sc->rchan = 1;
sc 141 dev/midi.c error = tsleep(&sc->rchan, PWAIT|PCATCH, "mid_rd", 0);
sc 171 dev/midi.c struct midi_softc *sc = (struct midi_softc *)addr;
sc 175 dev/midi.c if (sc->isopen && !sc->isdying) {
sc 177 dev/midi.c if (!sc->isbusy) {
sc 181 dev/midi.c mb = &sc->outbuf;
sc 184 dev/midi.c midi_out_stop(sc);
sc 186 dev/midi.c midi_out_do(sc); /* restart output */
sc 193 dev/midi.c midi_out_start(struct midi_softc *sc)
sc 195 dev/midi.c if (!sc->isbusy) {
sc 196 dev/midi.c sc->isbusy = 1;
sc 197 dev/midi.c midi_out_do(sc);
sc 202 dev/midi.c midi_out_stop(struct midi_softc *sc)
sc 204 dev/midi.c sc->isbusy = 0;
sc 205 dev/midi.c if (sc->wchan) {
sc 206 dev/midi.c sc->wchan = 0;
sc 207 dev/midi.c wakeup(&sc->wchan);
sc 209 dev/midi.c selwakeup(&sc->wsel);
sc 210 dev/midi.c if (sc->async)
sc 211 dev/midi.c psignal(sc->async, SIGIO);
sc 220 dev/midi.c midi_out_do(struct midi_softc *sc)
sc 222 dev/midi.c struct midi_buffer *mb = &sc->outbuf;
sc 231 dev/midi.c max = sc->props & MIDI_PROP_OUT_INTR ? 1 : MIDI_MAXWRITE;
sc 235 dev/midi.c error = sc->hw_if->output(sc->hw_hdl, mb->data[mb->start]);
sc 256 dev/midi.c if (sc->hw_if->flush != NULL)
sc 257 dev/midi.c sc->hw_if->flush(sc->hw_hdl);
sc 258 dev/midi.c midi_out_stop(sc);
sc 268 dev/midi.c midi_out_stop(sc);
sc 273 dev/midi.c if (!(sc->props & MIDI_PROP_OUT_INTR)) {
sc 275 dev/midi.c midi_out_stop(sc);
sc 277 dev/midi.c timeout_add(&sc->timeo, sc->wait);
sc 285 dev/midi.c struct midi_softc *sc = MIDI_DEV2SC(dev);
sc 286 dev/midi.c struct midi_buffer *mb = &sc->outbuf;
sc 290 dev/midi.c if (!(sc->flags & FWRITE))
sc 292 dev/midi.c if (sc->isdying)
sc 316 dev/midi.c sc->wchan = 1;
sc 317 dev/midi.c error = tsleep(&sc->wchan, PWAIT|PCATCH, "mid_wr", 0);
sc 322 dev/midi.c if (sc->isdying) {
sc 339 dev/midi.c midi_out_start(sc);
sc 349 dev/midi.c struct midi_softc *sc = MIDI_DEV2SC(dev);
sc 352 dev/midi.c if (sc->isdying)
sc 358 dev/midi.c if (!MIDIBUF_ISEMPTY(&sc->inbuf))
sc 362 dev/midi.c if (!MIDIBUF_ISFULL(&sc->outbuf))
sc 367 dev/midi.c selrecord(p, &sc->rsel);
sc 369 dev/midi.c selrecord(p, &sc->wsel);
sc 379 dev/midi.c struct midi_softc *sc = MIDI_DEV2SC(dev);
sc 381 dev/midi.c if (sc->isdying) return EIO;
sc 389 dev/midi.c if (sc->async) return EBUSY;
sc 390 dev/midi.c sc->async = p;
sc 392 dev/midi.c sc->async = 0;
sc 405 dev/midi.c struct midi_softc *sc;
sc 410 dev/midi.c sc = MIDI_DEV2SC(dev);
sc 411 dev/midi.c if (sc == NULL) /* there may be more units than devices */
sc 413 dev/midi.c if (sc->isdying)
sc 415 dev/midi.c if (sc->isopen)
sc 418 dev/midi.c MIDIBUF_INIT(&sc->inbuf);
sc 419 dev/midi.c MIDIBUF_INIT(&sc->outbuf);
sc 420 dev/midi.c sc->isbusy = 0;
sc 421 dev/midi.c sc->rchan = sc->wchan = 0;
sc 422 dev/midi.c sc->async = 0;
sc 423 dev/midi.c sc->flags = flags;
sc 425 dev/midi.c err = sc->hw_if->open(sc->hw_hdl, flags, midi_iintr, midi_ointr, sc);
sc 428 dev/midi.c sc->isopen = 1;
sc 430 dev/midi.c sc->seq_md = 0;
sc 431 dev/midi.c sc->seqopen = 0;
sc 432 dev/midi.c sc->evstatus = 0xff;
sc 441 dev/midi.c struct midi_softc *sc = MIDI_DEV2SC(dev);
sc 446 dev/midi.c mb = &sc->outbuf;
sc 447 dev/midi.c if (!sc->isdying) {
sc 451 dev/midi.c midi_out_start(sc);
sc 452 dev/midi.c while (sc->isbusy) {
sc 453 dev/midi.c sc->wchan = 1;
sc 454 dev/midi.c error = tsleep(&sc->wchan, PWAIT|PCATCH, "mid_dr", 0);
sc 455 dev/midi.c if (error || sc->isdying)
sc 470 dev/midi.c tsleep(&sc->wchan, PWAIT|PCATCH, "mid_cl", 2 * sc->wait);
sc 471 dev/midi.c sc->hw_if->close(sc->hw_hdl);
sc 472 dev/midi.c sc->isopen = 0;
sc 486 dev/midi.c midi_attach(struct midi_softc *sc, struct device *parent)
sc 490 dev/midi.c sc->isdying = 0;
sc 491 dev/midi.c sc->wait = (hz * MIDI_MAXWRITE) / MIDI_RATE;
sc 492 dev/midi.c if (sc->wait == 0)
sc 493 dev/midi.c sc->wait = 1;
sc 494 dev/midi.c sc->hw_if->getinfo(sc->hw_hdl, &mi);
sc 495 dev/midi.c sc->props = mi.props;
sc 496 dev/midi.c sc->isopen = 0;
sc 497 dev/midi.c timeout_set(&sc->timeo, midi_ointr, sc);
sc 505 dev/midi.c struct midi_softc *sc = (struct midi_softc *)self;
sc 520 dev/midi.c sc->hw_if = hwif;
sc 521 dev/midi.c sc->hw_hdl = hdl;
sc 522 dev/midi.c midi_attach(sc, parent);
sc 529 dev/midi.c struct midi_softc *sc = (struct midi_softc *)self;
sc 532 dev/midi.c sc->isdying = 1;
sc 533 dev/midi.c if (sc->wchan) {
sc 534 dev/midi.c sc->wchan = 0;
sc 535 dev/midi.c wakeup(&sc->wchan);
sc 537 dev/midi.c if (sc->rchan) {
sc 538 dev/midi.c sc->rchan = 0;
sc 539 dev/midi.c wakeup(&sc->rchan);
sc 567 dev/midi.c struct midi_softc *sc = MIDI_DEV2SC(dev);
sc 568 dev/midi.c if (MIDI_UNIT(dev) >= midi_cd.cd_ndevs || sc == NULL || sc->isdying) {
sc 573 dev/midi.c sc->hw_if->getinfo(sc->hw_hdl, mi);
sc 601 dev/midi.c midi_toevent(struct midi_softc *sc, int data)
sc 612 dev/midi.c midiseq_in(sc->seq_md, mesg, 1);
sc 618 dev/midi.c sc->evstatus = data;
sc 619 dev/midi.c sc->evindex = 0;
sc 622 dev/midi.c if (sc->evstatus >= 0xf0 || sc->evstatus < 0x80)
sc 625 dev/midi.c sc->evdata[sc->evindex++] = data;
sc 626 dev/midi.c if (sc->evindex == MIDI_EVLEN(sc->evstatus)) {
sc 627 dev/midi.c sc->evindex = 0;
sc 628 dev/midi.c mesg[0] = sc->evstatus;
sc 629 dev/midi.c mesg[1] = sc->evdata[0];
sc 630 dev/midi.c mesg[2] = sc->evdata[1];
sc 631 dev/midi.c midiseq_in(sc->seq_md, mesg, 1 + MIDI_EVLEN(sc->evstatus));
sc 640 dev/midi.c struct midi_softc *sc = midi_cd.cd_devs[unit];
sc 641 dev/midi.c struct midi_buffer *mb = &sc->outbuf;
sc 659 dev/midi.c midi_out_start(sc);
sc 177 dev/midisyn.c midisyn_attach(sc, ms)
sc 178 dev/midisyn.c struct midi_softc *sc;
sc 189 dev/midisyn.c sc->hw_if = &midisyn_hw_if;
sc 190 dev/midisyn.c sc->hw_hdl = ms;
sc 191 dev/midisyn.c DPRINTF(("midisyn_attach: ms=%p\n", sc->hw_hdl));
sc 104 dev/mii/acphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 112 dev/mii/acphy.c sc->mii_inst = mii->mii_instance;
sc 113 dev/mii/acphy.c sc->mii_phy = ma->mii_phyno;
sc 114 dev/mii/acphy.c sc->mii_funcs = &acphy_funcs;
sc 115 dev/mii/acphy.c sc->mii_pdata = mii;
sc 116 dev/mii/acphy.c sc->mii_flags = ma->mii_flags;
sc 117 dev/mii/acphy.c sc->mii_anegticks = MII_ANEGTICKS;
sc 119 dev/mii/acphy.c PHY_RESET(sc);
sc 125 dev/mii/acphy.c sc->mii_capabilities =
sc 126 dev/mii/acphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 129 dev/mii/acphy.c if (sc->mii_flags & MIIF_HAVEFIBER) {
sc 130 dev/mii/acphy.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, sc->mii_inst),
sc 132 dev/mii/acphy.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, sc->mii_inst),
sc 137 dev/mii/acphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 138 dev/mii/acphy.c mii_phy_add_media(sc);
sc 142 dev/mii/acphy.c acphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 152 dev/mii/acphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 161 dev/mii/acphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 162 dev/mii/acphy.c reg = PHY_READ(sc, MII_BMCR);
sc 163 dev/mii/acphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 173 dev/mii/acphy.c mii_phy_setmedia(sc);
sc 180 dev/mii/acphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 183 dev/mii/acphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 188 dev/mii/acphy.c mii_phy_down(sc);
sc 193 dev/mii/acphy.c mii_phy_status(sc);
sc 196 dev/mii/acphy.c mii_phy_update(sc, cmd);
sc 201 dev/mii/acphy.c acphy_status(struct mii_softc *sc)
sc 203 dev/mii/acphy.c struct mii_data *mii = sc->mii_pdata;
sc 210 dev/mii/acphy.c bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
sc 211 dev/mii/acphy.c dr = PHY_READ(sc, MII_ACPHY_DR);
sc 216 dev/mii/acphy.c bmcr = PHY_READ(sc, MII_BMCR);
sc 107 dev/mii/amphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 115 dev/mii/amphy.c sc->mii_inst = mii->mii_instance;
sc 116 dev/mii/amphy.c sc->mii_phy = ma->mii_phyno;
sc 117 dev/mii/amphy.c sc->mii_funcs = &hy_funcs;
sc 118 dev/mii/amphy.c sc->mii_pdata = mii;
sc 119 dev/mii/amphy.c sc->mii_flags = ma->mii_flags;
sc 121 dev/mii/amphy.c sc->mii_flags |= MIIF_NOISOLATE;
sc 123 dev/mii/amphy.c PHY_RESET(sc);
sc 125 dev/mii/amphy.c sc->mii_capabilities =
sc 126 dev/mii/amphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 127 dev/mii/amphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 128 dev/mii/amphy.c mii_phy_add_media(sc);
sc 132 dev/mii/amphy.c amphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 142 dev/mii/amphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 151 dev/mii/amphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 152 dev/mii/amphy.c reg = PHY_READ(sc, MII_BMCR);
sc 153 dev/mii/amphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 163 dev/mii/amphy.c mii_phy_setmedia(sc);
sc 170 dev/mii/amphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 173 dev/mii/amphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 177 dev/mii/amphy.c mii_phy_down(sc);
sc 182 dev/mii/amphy.c mii_phy_status(sc);
sc 185 dev/mii/amphy.c mii_phy_update(sc, cmd);
sc 190 dev/mii/amphy.c amphy_status(struct mii_softc *sc)
sc 192 dev/mii/amphy.c struct mii_data *mii = sc->mii_pdata;
sc 199 dev/mii/amphy.c bmsr = PHY_READ(sc, MII_BMSR) |
sc 200 dev/mii/amphy.c PHY_READ(sc, MII_BMSR);
sc 204 dev/mii/amphy.c bmcr = PHY_READ(sc, MII_BMCR);
sc 225 dev/mii/amphy.c if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
sc 226 dev/mii/amphy.c anlpar = PHY_READ(sc, MII_ANAR) &
sc 227 dev/mii/amphy.c PHY_READ(sc, MII_ANLPAR);
sc 246 dev/mii/amphy.c par = PHY_READ(sc, MII_AMPHY_DSCSR);
sc 107 dev/mii/bmtphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 115 dev/mii/bmtphy.c sc->mii_model = MII_MODEL(ma->mii_id2);
sc 116 dev/mii/bmtphy.c sc->mii_inst = mii->mii_instance;
sc 117 dev/mii/bmtphy.c sc->mii_phy = ma->mii_phyno;
sc 118 dev/mii/bmtphy.c sc->mii_funcs = &bmtphy_funcs;
sc 119 dev/mii/bmtphy.c sc->mii_pdata = mii;
sc 120 dev/mii/bmtphy.c sc->mii_flags = ma->mii_flags;
sc 121 dev/mii/bmtphy.c sc->mii_anegticks = MII_ANEGTICKS;
sc 123 dev/mii/bmtphy.c PHY_RESET(sc);
sc 129 dev/mii/bmtphy.c sc->mii_capabilities =
sc 130 dev/mii/bmtphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 131 dev/mii/bmtphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 132 dev/mii/bmtphy.c mii_phy_add_media(sc);
sc 136 dev/mii/bmtphy.c bmtphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 141 dev/mii/bmtphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 149 dev/mii/bmtphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 158 dev/mii/bmtphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 159 dev/mii/bmtphy.c reg = PHY_READ(sc, MII_BMCR);
sc 160 dev/mii/bmtphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 170 dev/mii/bmtphy.c mii_phy_setmedia(sc);
sc 177 dev/mii/bmtphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 180 dev/mii/bmtphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 185 dev/mii/bmtphy.c mii_phy_down(sc);
sc 190 dev/mii/bmtphy.c mii_phy_status(sc);
sc 193 dev/mii/bmtphy.c mii_phy_update(sc, cmd);
sc 198 dev/mii/bmtphy.c bmtphy_status(struct mii_softc *sc)
sc 200 dev/mii/bmtphy.c struct mii_data *mii = sc->mii_pdata;
sc 207 dev/mii/bmtphy.c bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
sc 211 dev/mii/bmtphy.c bmcr = PHY_READ(sc, MII_BMCR);
sc 232 dev/mii/bmtphy.c aux_csr = PHY_READ(sc, MII_BMTPHY_AUX_CSR);
sc 247 dev/mii/bmtphy.c bmtphy_reset(struct mii_softc *sc)
sc 251 dev/mii/bmtphy.c mii_phy_reset(sc);
sc 253 dev/mii/bmtphy.c if (sc->mii_model == MII_MODEL_BROADCOM_BCM5221) {
sc 255 dev/mii/bmtphy.c data = PHY_READ(sc, 0x1f);
sc 256 dev/mii/bmtphy.c PHY_WRITE(sc, 0x1f, data | 0x0080);
sc 259 dev/mii/bmtphy.c data = PHY_READ(sc, MII_BMTPHY_AUX2);
sc 260 dev/mii/bmtphy.c PHY_WRITE(sc, MII_BMTPHY_AUX2, data | 0x0020);
sc 264 dev/mii/bmtphy.c data = PHY_READ(sc, MII_BMTPHY_INTR);
sc 265 dev/mii/bmtphy.c PHY_WRITE(sc, MII_BMTPHY_INTR, data | 0x0004);
sc 268 dev/mii/bmtphy.c data = PHY_READ(sc, 0x1f);
sc 269 dev/mii/bmtphy.c PHY_WRITE(sc, 0x1f, data & ~0x0080);
sc 157 dev/mii/brgphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 165 dev/mii/brgphy.c sc->mii_inst = mii->mii_instance;
sc 166 dev/mii/brgphy.c sc->mii_phy = ma->mii_phyno;
sc 167 dev/mii/brgphy.c sc->mii_funcs = &brgphy_funcs;
sc 168 dev/mii/brgphy.c sc->mii_model = MII_MODEL(ma->mii_id2);
sc 169 dev/mii/brgphy.c sc->mii_rev = MII_REV(ma->mii_id2);
sc 170 dev/mii/brgphy.c sc->mii_pdata = mii;
sc 171 dev/mii/brgphy.c sc->mii_flags = ma->mii_flags;
sc 172 dev/mii/brgphy.c sc->mii_anegticks = MII_ANEGTICKS;
sc 174 dev/mii/brgphy.c sc->mii_flags |= MIIF_NOISOLATE;
sc 176 dev/mii/brgphy.c PHY_RESET(sc);
sc 178 dev/mii/brgphy.c sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 179 dev/mii/brgphy.c if (sc->mii_capabilities & BMSR_EXTSTAT)
sc 180 dev/mii/brgphy.c sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
sc 181 dev/mii/brgphy.c if ((sc->mii_capabilities & BMSR_MEDIAMASK) ||
sc 182 dev/mii/brgphy.c (sc->mii_extcapabilities & EXTSR_MEDIAMASK))
sc 183 dev/mii/brgphy.c mii_phy_add_media(sc);
sc 187 dev/mii/brgphy.c brgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 192 dev/mii/brgphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 200 dev/mii/brgphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 209 dev/mii/brgphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 210 dev/mii/brgphy.c reg = PHY_READ(sc, MII_BMCR);
sc 211 dev/mii/brgphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 221 dev/mii/brgphy.c PHY_RESET(sc); /* XXX hardware bug work-around */
sc 225 dev/mii/brgphy.c (void) brgphy_mii_phy_auto(sc);
sc 236 dev/mii/brgphy.c brgphy_loop(sc);
sc 244 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_1000CTL, 0);
sc 245 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_BMCR, speed);
sc 246 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_ANAR, BRGPHY_SEL_TYPE);
sc 251 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_1000CTL, gig);
sc 252 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_BMCR,
sc 255 dev/mii/brgphy.c if (sc->mii_model != MII_MODEL_xxBROADCOM_BCM5701)
sc 260 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_1000CTL, gig);
sc 271 dev/mii/brgphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 291 dev/mii/brgphy.c reg = PHY_READ(sc, BRGPHY_MII_AUXSTS);
sc 298 dev/mii/brgphy.c if (++sc->mii_ticks <= sc->mii_anegticks)
sc 301 dev/mii/brgphy.c sc->mii_ticks = 0;
sc 302 dev/mii/brgphy.c brgphy_mii_phy_auto(sc);
sc 307 dev/mii/brgphy.c mii_phy_status(sc);
sc 313 dev/mii/brgphy.c if (sc->mii_media_active != mii->mii_media_active ||
sc 314 dev/mii/brgphy.c sc->mii_media_status != mii->mii_media_status ||
sc 316 dev/mii/brgphy.c switch (sc->mii_model) {
sc 318 dev/mii/brgphy.c brgphy_bcm5401_dspcode(sc);
sc 321 dev/mii/brgphy.c if (sc->mii_rev == 1 || sc->mii_rev == 3)
sc 322 dev/mii/brgphy.c brgphy_bcm5401_dspcode(sc);
sc 325 dev/mii/brgphy.c brgphy_bcm5411_dspcode(sc);
sc 331 dev/mii/brgphy.c mii_phy_update(sc, cmd);
sc 337 dev/mii/brgphy.c brgphy_status(struct mii_softc *sc)
sc 339 dev/mii/brgphy.c struct mii_data *mii = sc->mii_pdata;
sc 346 dev/mii/brgphy.c bmsr = PHY_READ(sc, BRGPHY_MII_BMSR);
sc 347 dev/mii/brgphy.c if (PHY_READ(sc, BRGPHY_MII_AUXSTS) & BRGPHY_AUXSTS_LINK)
sc 350 dev/mii/brgphy.c bmcr = PHY_READ(sc, BRGPHY_MII_BMCR);
sc 362 dev/mii/brgphy.c switch (PHY_READ(sc, BRGPHY_MII_AUXSTS) &
sc 391 dev/mii/brgphy.c mii->mii_media_active |= mii_phy_flowstatus(sc);
sc 393 dev/mii/brgphy.c gsr = PHY_READ(sc, BRGPHY_MII_1000STS);
sc 406 dev/mii/brgphy.c brgphy_mii_phy_auto(struct mii_softc *sc)
sc 410 dev/mii/brgphy.c brgphy_loop(sc);
sc 411 dev/mii/brgphy.c PHY_RESET(sc);
sc 413 dev/mii/brgphy.c if (sc->mii_model == MII_MODEL_xxBROADCOM_BCM5701)
sc 415 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_1000CTL, ktcr);
sc 416 dev/mii/brgphy.c ktcr = PHY_READ(sc, BRGPHY_MII_1000CTL);
sc 418 dev/mii/brgphy.c anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
sc 419 dev/mii/brgphy.c if (sc->mii_flags & MIIF_DOPAUSE)
sc 422 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_ANAR, anar);
sc 424 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_BMCR,
sc 426 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_IMR, 0xFF00);
sc 432 dev/mii/brgphy.c brgphy_loop(struct mii_softc *sc)
sc 437 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_BMCR, BRGPHY_BMCR_LOOP);
sc 439 dev/mii/brgphy.c bmsr = PHY_READ(sc, BRGPHY_MII_BMSR);
sc 447 dev/mii/brgphy.c brgphy_reset(struct mii_softc *sc)
sc 452 dev/mii/brgphy.c devname = sc->mii_dev.dv_parent->dv_cfdata->cf_driver->cd_name;
sc 454 dev/mii/brgphy.c mii_phy_reset(sc);
sc 456 dev/mii/brgphy.c switch (sc->mii_model) {
sc 458 dev/mii/brgphy.c brgphy_bcm5401_dspcode(sc);
sc 461 dev/mii/brgphy.c if (sc->mii_rev == 1 || sc->mii_rev == 3)
sc 462 dev/mii/brgphy.c brgphy_bcm5401_dspcode(sc);
sc 465 dev/mii/brgphy.c brgphy_bcm5411_dspcode(sc);
sc 468 dev/mii/brgphy.c brgphy_bcm5421_dspcode(sc);
sc 471 dev/mii/brgphy.c brgphy_bcm54k2_dspcode(sc);
sc 476 dev/mii/brgphy.c bge_sc = sc->mii_pdata->mii_ifp->if_softc;
sc 479 dev/mii/brgphy.c brgphy_adc_bug(sc);
sc 481 dev/mii/brgphy.c brgphy_5704_a0_bug(sc);
sc 483 dev/mii/brgphy.c brgphy_ber_bug(sc);
sc 485 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x0c00);
sc 486 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_DSP_ADDR_REG, 0x000a);
sc 489 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT,
sc 491 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_TEST1,
sc 494 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT,
sc 498 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x0400);
sc 503 dev/mii/brgphy.c brgphy_jumbo_settings(sc);
sc 507 dev/mii/brgphy.c brgphy_eth_wirespeed(sc);
sc 511 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
sc 512 dev/mii/brgphy.c PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL)
sc 516 dev/mii/brgphy.c brgphy_ber_bug(sc);
sc 519 dev/mii/brgphy.c brgphy_jumbo_settings(sc);
sc 522 dev/mii/brgphy.c brgphy_eth_wirespeed(sc);
sc 528 dev/mii/brgphy.c brgphy_bcm5401_dspcode(struct mii_softc *sc)
sc 550 dev/mii/brgphy.c PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sc 556 dev/mii/brgphy.c brgphy_bcm5411_dspcode(struct mii_softc *sc)
sc 570 dev/mii/brgphy.c PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sc 574 dev/mii/brgphy.c brgphy_bcm5421_dspcode(struct mii_softc *sc)
sc 579 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x1007);
sc 580 dev/mii/brgphy.c data = PHY_READ(sc, BRGPHY_MII_AUXCTL);
sc 581 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_AUXCTL, data | 0x0400);
sc 584 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x0007);
sc 585 dev/mii/brgphy.c data = PHY_READ(sc, BRGPHY_MII_AUXCTL);
sc 586 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_AUXCTL, data | 0x0800);
sc 587 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_DSP_ADDR_REG, 0x000a);
sc 588 dev/mii/brgphy.c data = PHY_READ(sc, BRGPHY_MII_DSP_RW_PORT);
sc 589 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_DSP_RW_PORT, data | 0x0200);
sc 593 dev/mii/brgphy.c brgphy_bcm54k2_dspcode(struct mii_softc *sc)
sc 606 dev/mii/brgphy.c PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sc 610 dev/mii/brgphy.c brgphy_adc_bug(struct mii_softc *sc)
sc 627 dev/mii/brgphy.c PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sc 631 dev/mii/brgphy.c brgphy_5704_a0_bug(struct mii_softc *sc)
sc 644 dev/mii/brgphy.c PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sc 648 dev/mii/brgphy.c brgphy_ber_bug(struct mii_softc *sc)
sc 667 dev/mii/brgphy.c PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
sc 671 dev/mii/brgphy.c brgphy_jumbo_settings(struct mii_softc *sc)
sc 676 dev/mii/brgphy.c if (sc->mii_model == MII_MODEL_BROADCOM_BCM5401) {
sc 678 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x4c20);
sc 680 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7);
sc 681 dev/mii/brgphy.c val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
sc 682 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_AUXCTL,
sc 686 dev/mii/brgphy.c val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL);
sc 687 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
sc 692 dev/mii/brgphy.c brgphy_eth_wirespeed(struct mii_softc *sc)
sc 697 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007);
sc 698 dev/mii/brgphy.c val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
sc 699 dev/mii/brgphy.c PHY_WRITE(sc, BRGPHY_MII_AUXCTL,
sc 116 dev/mii/ciphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 124 dev/mii/ciphy.c sc->mii_inst = mii->mii_instance;
sc 125 dev/mii/ciphy.c sc->mii_phy = ma->mii_phyno;
sc 126 dev/mii/ciphy.c sc->mii_funcs = &ciphy_funcs;
sc 127 dev/mii/ciphy.c sc->mii_pdata = mii;
sc 128 dev/mii/ciphy.c sc->mii_flags = ma->mii_flags;
sc 129 dev/mii/ciphy.c sc->mii_anegticks = MII_ANEGTICKS;
sc 131 dev/mii/ciphy.c sc->mii_flags |= MIIF_NOISOLATE;
sc 133 dev/mii/ciphy.c PHY_RESET(sc);
sc 135 dev/mii/ciphy.c sc->mii_capabilities =
sc 136 dev/mii/ciphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 137 dev/mii/ciphy.c if (sc->mii_capabilities & BMSR_EXTSTAT)
sc 138 dev/mii/ciphy.c sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
sc 139 dev/mii/ciphy.c if ((sc->mii_capabilities & BMSR_MEDIAMASK) ||
sc 140 dev/mii/ciphy.c (sc->mii_capabilities & EXTSR_MEDIAMASK))
sc 141 dev/mii/ciphy.c mii_phy_add_media(sc);
sc 145 dev/mii/ciphy.c ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 155 dev/mii/ciphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 164 dev/mii/ciphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 165 dev/mii/ciphy.c reg = PHY_READ(sc, MII_BMCR);
sc 166 dev/mii/ciphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 176 dev/mii/ciphy.c ciphy_fixup(sc); /* XXX hardware bug work-around */
sc 180 dev/mii/ciphy.c if (mii_phy_auto(sc, 0) == EJUSTRETURN)
sc 199 dev/mii/ciphy.c PHY_WRITE(sc, CIPHY_MII_1000CTL, 0);
sc 200 dev/mii/ciphy.c PHY_WRITE(sc, CIPHY_MII_BMCR, speed);
sc 201 dev/mii/ciphy.c PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE);
sc 206 dev/mii/ciphy.c PHY_WRITE(sc, CIPHY_MII_1000CTL, gig);
sc 207 dev/mii/ciphy.c PHY_WRITE(sc, CIPHY_MII_BMCR,
sc 212 dev/mii/ciphy.c PHY_WRITE(sc, CIPHY_MII_1000CTL, gig);
sc 215 dev/mii/ciphy.c PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
sc 227 dev/mii/ciphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 230 dev/mii/ciphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 236 dev/mii/ciphy.c mii_phy_status(sc);
sc 242 dev/mii/ciphy.c if (sc->mii_media_active != mii->mii_media_active ||
sc 243 dev/mii/ciphy.c sc->mii_media_status != mii->mii_media_status ||
sc 245 dev/mii/ciphy.c ciphy_fixup(sc);
sc 247 dev/mii/ciphy.c mii_phy_update(sc, cmd);
sc 252 dev/mii/ciphy.c ciphy_status(struct mii_softc *sc)
sc 254 dev/mii/ciphy.c struct mii_data *mii = sc->mii_pdata;
sc 260 dev/mii/ciphy.c bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
sc 265 dev/mii/ciphy.c bmcr = PHY_READ(sc, CIPHY_MII_BMCR);
sc 278 dev/mii/ciphy.c bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR);
sc 291 dev/mii/ciphy.c sc->mii_dev.dv_xname, bmsr & CIPHY_AUXCSR_SPEED);
sc 300 dev/mii/ciphy.c gsr = PHY_READ(sc, CIPHY_MII_1000STS);
sc 307 dev/mii/ciphy.c ciphy_reset(struct mii_softc *sc)
sc 309 dev/mii/ciphy.c mii_phy_reset(sc);
sc 319 dev/mii/ciphy.c ciphy_fixup(struct mii_softc *sc)
sc 324 dev/mii/ciphy.c model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2));
sc 325 dev/mii/ciphy.c status = PHY_READ(sc, CIPHY_MII_AUXCSR);
sc 328 dev/mii/ciphy.c if (strcmp(sc->mii_dev.dv_parent->dv_cfdata->cf_driver->cd_name, "nfe") == 0) {
sc 330 dev/mii/ciphy.c PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_INTSEL_RGMII);
sc 331 dev/mii/ciphy.c PHY_SETBIT(sc, CIPHY_MII_ECTL1, CIPHY_IOVOL_2500MV);
sc 338 dev/mii/ciphy.c PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
sc 346 dev/mii/ciphy.c PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
sc 348 dev/mii/ciphy.c PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
sc 352 dev/mii/ciphy.c PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
sc 365 dev/mii/ciphy.c PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
sc 367 dev/mii/ciphy.c PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
sc 373 dev/mii/ciphy.c sc->mii_dev.dv_xname, model);
sc 71 dev/mii/dcphy.c #define DC_SETBIT(sc, reg, x) \
sc 72 dev/mii/dcphy.c CSR_WRITE_4(sc, reg, \
sc 73 dev/mii/dcphy.c CSR_READ_4(sc, reg) | x)
sc 75 dev/mii/dcphy.c #define DC_CLRBIT(sc, reg, x) \
sc 76 dev/mii/dcphy.c CSR_WRITE_4(sc, reg, \
sc 77 dev/mii/dcphy.c CSR_READ_4(sc, reg) & ~x)
sc 128 dev/mii/dcphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 134 dev/mii/dcphy.c sc->mii_inst = mii->mii_instance;
sc 135 dev/mii/dcphy.c sc->mii_phy = ma->mii_phyno;
sc 136 dev/mii/dcphy.c sc->mii_funcs = &dcphy_funcs;
sc 137 dev/mii/dcphy.c sc->mii_pdata = mii;
sc 138 dev/mii/dcphy.c sc->mii_flags = ma->mii_flags;
sc 139 dev/mii/dcphy.c sc->mii_anegticks = 50;
sc 141 dev/mii/dcphy.c sc->mii_flags |= MIIF_NOISOLATE;
sc 152 dev/mii/dcphy.c sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
sc 156 dev/mii/dcphy.c sc->mii_capabilities =
sc 160 dev/mii/dcphy.c sc->mii_inst), BMCR_LOOP|BMCR_S100);
sc 162 dev/mii/dcphy.c sc->mii_capabilities =
sc 170 dev/mii/dcphy.c sc->mii_capabilities = BMSR_10THDX;
sc 172 dev/mii/dcphy.c sc->mii_capabilities &= ma->mii_capmask;
sc 173 dev/mii/dcphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 174 dev/mii/dcphy.c mii_phy_add_media(sc);
sc 179 dev/mii/dcphy.c dcphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 186 dev/mii/dcphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 196 dev/mii/dcphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 205 dev/mii/dcphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 214 dev/mii/dcphy.c sc->mii_flags = 0;
sc 223 dev/mii/dcphy.c sc->mii_flags &= ~MIIF_DOINGAUTO;
sc 224 dev/mii/dcphy.c (void) dcphy_mii_phy_auto(sc, 0);
sc 227 dev/mii/dcphy.c PHY_RESET(sc);
sc 263 dev/mii/dcphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 292 dev/mii/dcphy.c if (++sc->mii_ticks <= sc->mii_anegticks)
sc 295 dev/mii/dcphy.c sc->mii_ticks = 0;
sc 296 dev/mii/dcphy.c sc->mii_flags &= ~MIIF_DOINGAUTO;
sc 297 dev/mii/dcphy.c dcphy_mii_phy_auto(sc, 0);
sc 303 dev/mii/dcphy.c mii_phy_status(sc);
sc 306 dev/mii/dcphy.c mii_phy_update(sc, cmd);
sc 311 dev/mii/dcphy.c dcphy_status(struct mii_softc *sc)
sc 313 dev/mii/dcphy.c struct mii_data *mii = sc->mii_pdata;
sc 340 dev/mii/dcphy.c sc->mii_capabilities & BMSR_100TXHDX)
sc 343 dev/mii/dcphy.c sc->mii_capabilities & BMSR_100TXFDX)
sc 346 dev/mii/dcphy.c sc->mii_capabilities & BMSR_100TXHDX)
sc 395 dev/mii/dcphy.c struct dc_softc *sc;
sc 397 dev/mii/dcphy.c sc = mii->mii_pdata->mii_ifp->if_softc;
sc 400 dev/mii/dcphy.c DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
sc 401 dev/mii/dcphy.c DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
sc 402 dev/mii/dcphy.c DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
sc 404 dev/mii/dcphy.c CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
sc 406 dev/mii/dcphy.c CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
sc 407 dev/mii/dcphy.c DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
sc 408 dev/mii/dcphy.c DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
sc 409 dev/mii/dcphy.c DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
sc 415 dev/mii/dcphy.c if ((CSR_READ_4(sc, DC_10BTSTAT) & DC_TSTAT_ANEGSTAT)
sc 442 dev/mii/dcphy.c struct dc_softc *sc;
sc 444 dev/mii/dcphy.c sc = mii->mii_pdata->mii_ifp->if_softc;
sc 446 dev/mii/dcphy.c DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
sc 448 dev/mii/dcphy.c DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
sc 132 dev/mii/eephy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 141 dev/mii/eephy.c sc->mii_inst = mii->mii_instance;
sc 142 dev/mii/eephy.c sc->mii_phy = ma->mii_phyno;
sc 143 dev/mii/eephy.c sc->mii_funcs = &eephy_funcs;
sc 144 dev/mii/eephy.c sc->mii_model = MII_MODEL(ma->mii_id2);
sc 145 dev/mii/eephy.c sc->mii_pdata = mii;
sc 146 dev/mii/eephy.c sc->mii_flags = ma->mii_flags;
sc 149 dev/mii/eephy.c sc->mii_flags |= MIIF_NOLOOP;
sc 152 dev/mii/eephy.c if (sc->mii_model == MII_MODEL_MARVELL_E1112 &&
sc 153 dev/mii/eephy.c sc->mii_flags & MIIF_HAVEFIBER) {
sc 154 dev/mii/eephy.c page = PHY_READ(sc, E1000_EADR);
sc 155 dev/mii/eephy.c PHY_WRITE(sc, E1000_EADR, 2);
sc 156 dev/mii/eephy.c reg = PHY_READ(sc, E1000_SCR);
sc 159 dev/mii/eephy.c PHY_WRITE(sc, E1000_SCR, reg);
sc 160 dev/mii/eephy.c PHY_WRITE(sc, E1000_EADR, page);
sc 162 dev/mii/eephy.c PHY_RESET(sc);
sc 165 dev/mii/eephy.c sc->mii_capabilities = PHY_READ(sc, E1000_SR) & ma->mii_capmask;
sc 166 dev/mii/eephy.c if (sc->mii_capabilities & BMSR_EXTSTAT)
sc 167 dev/mii/eephy.c sc->mii_extcapabilities = PHY_READ(sc, E1000_ESR);
sc 169 dev/mii/eephy.c mii_phy_add_media(sc);
sc 175 dev/mii/eephy.c reg = PHY_READ(sc, E1000_SCR);
sc 181 dev/mii/eephy.c switch (sc->mii_model) {
sc 188 dev/mii/eephy.c if (sc->mii_flags & MIIF_IS_1000X)
sc 195 dev/mii/eephy.c switch(sc->mii_model) {
sc 204 dev/mii/eephy.c PHY_WRITE(sc, E1000_SCR, reg);
sc 207 dev/mii/eephy.c reg = PHY_READ(sc, E1000_ESCR);
sc 209 dev/mii/eephy.c PHY_WRITE(sc, E1000_ESCR, reg);
sc 216 dev/mii/eephy.c reg = PHY_READ(sc, E1000_CR);
sc 218 dev/mii/eephy.c PHY_WRITE(sc, E1000_CR, reg | E1000_CR_RESET);
sc 222 dev/mii/eephy.c eephy_reset(struct mii_softc *sc)
sc 226 dev/mii/eephy.c reg = PHY_READ(sc, E1000_CR);
sc 228 dev/mii/eephy.c PHY_WRITE(sc, E1000_CR, reg);
sc 232 dev/mii/eephy.c reg = PHY_READ(sc, E1000_CR);
sc 239 dev/mii/eephy.c eephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 244 dev/mii/eephy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 252 dev/mii/eephy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 261 dev/mii/eephy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 262 dev/mii/eephy.c bmcr = PHY_READ(sc, E1000_CR);
sc 263 dev/mii/eephy.c PHY_WRITE(sc, E1000_CR, bmcr | E1000_CR_ISOLATE);
sc 273 dev/mii/eephy.c mii_phy_setmedia(sc);
sc 280 dev/mii/eephy.c bmcr = PHY_READ(sc, E1000_CR);
sc 281 dev/mii/eephy.c PHY_WRITE(sc, E1000_CR, bmcr | E1000_CR_RESET);
sc 289 dev/mii/eephy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 292 dev/mii/eephy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 297 dev/mii/eephy.c mii_phy_down(sc);
sc 302 dev/mii/eephy.c mii_phy_status(sc);
sc 305 dev/mii/eephy.c mii_phy_update(sc, cmd);
sc 310 dev/mii/eephy.c eephy_status(struct mii_softc *sc)
sc 312 dev/mii/eephy.c struct mii_data *mii = sc->mii_pdata;
sc 318 dev/mii/eephy.c bmcr = PHY_READ(sc, E1000_CR);
sc 319 dev/mii/eephy.c ssr = PHY_READ(sc, E1000_SSR);
sc 333 dev/mii/eephy.c if (sc->mii_flags & MIIF_IS_1000X) {
sc 345 dev/mii/eephy.c mii->mii_media_active |= mii_phy_flowstatus(sc) | IFM_FDX;
sc 350 dev/mii/eephy.c gsr = PHY_READ(sc, E1000_1GSR) | PHY_READ(sc, E1000_1GSR);
sc 129 dev/mii/exphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 135 dev/mii/exphy.c sc->mii_inst = mii->mii_instance;
sc 136 dev/mii/exphy.c sc->mii_phy = ma->mii_phyno;
sc 137 dev/mii/exphy.c sc->mii_funcs = &exphy_funcs;
sc 138 dev/mii/exphy.c sc->mii_pdata = mii;
sc 139 dev/mii/exphy.c sc->mii_flags = ma->mii_flags;
sc 141 dev/mii/exphy.c sc->mii_flags |= MIIF_NOISOLATE;
sc 149 dev/mii/exphy.c sc->mii_dev.dv_xname);
sc 153 dev/mii/exphy.c PHY_RESET(sc);
sc 155 dev/mii/exphy.c sc->mii_capabilities =
sc 156 dev/mii/exphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 157 dev/mii/exphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 158 dev/mii/exphy.c mii_phy_add_media(sc);
sc 162 dev/mii/exphy.c exphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 166 dev/mii/exphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 172 dev/mii/exphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 186 dev/mii/exphy.c mii_phy_setmedia(sc);
sc 190 dev/mii/exphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 196 dev/mii/exphy.c mii_phy_down(sc);
sc 201 dev/mii/exphy.c mii_phy_status(sc);
sc 204 dev/mii/exphy.c mii_phy_update(sc, cmd);
sc 209 dev/mii/exphy.c exphy_reset(struct mii_softc *sc)
sc 212 dev/mii/exphy.c mii_phy_reset(sc);
sc 218 dev/mii/exphy.c PHY_WRITE(sc, MII_BMCR, BMCR_S100|BMCR_AUTOEN|BMCR_FDX);
sc 151 dev/mii/gentbi.c struct mii_softc *sc = (struct mii_softc *)self;
sc 158 dev/mii/gentbi.c sc->mii_inst = mii->mii_instance;
sc 159 dev/mii/gentbi.c sc->mii_phy = ma->mii_phyno;
sc 160 dev/mii/gentbi.c sc->mii_funcs = &gentbi_funcs;
sc 161 dev/mii/gentbi.c sc->mii_pdata = mii;
sc 162 dev/mii/gentbi.c sc->mii_flags = ma->mii_flags;
sc 163 dev/mii/gentbi.c sc->mii_anegticks = MII_ANEGTICKS;
sc 165 dev/mii/gentbi.c PHY_RESET(sc);
sc 171 dev/mii/gentbi.c sc->mii_capabilities =
sc 172 dev/mii/gentbi.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask & ~BMSR_MEDIAMASK;
sc 173 dev/mii/gentbi.c if (sc->mii_capabilities & BMSR_EXTSTAT)
sc 174 dev/mii/gentbi.c sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
sc 176 dev/mii/gentbi.c if ((sc->mii_capabilities & BMSR_MEDIAMASK) ||
sc 177 dev/mii/gentbi.c (sc->mii_extcapabilities & EXTSR_MEDIAMASK))
sc 178 dev/mii/gentbi.c mii_phy_add_media(sc);
sc 182 dev/mii/gentbi.c gentbi_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 192 dev/mii/gentbi.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 201 dev/mii/gentbi.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 202 dev/mii/gentbi.c reg = PHY_READ(sc, MII_BMCR);
sc 203 dev/mii/gentbi.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 213 dev/mii/gentbi.c mii_phy_setmedia(sc);
sc 220 dev/mii/gentbi.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 223 dev/mii/gentbi.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 228 dev/mii/gentbi.c mii_phy_down(sc);
sc 233 dev/mii/gentbi.c mii_phy_status(sc);
sc 236 dev/mii/gentbi.c mii_phy_update(sc, cmd);
sc 241 dev/mii/gentbi.c gentbi_status(struct mii_softc *sc)
sc 243 dev/mii/gentbi.c struct mii_data *mii = sc->mii_pdata;
sc 250 dev/mii/gentbi.c bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
sc 255 dev/mii/gentbi.c bmcr = PHY_READ(sc, MII_BMCR);
sc 282 dev/mii/gentbi.c anlpar = PHY_READ(sc, MII_ANLPAR);
sc 283 dev/mii/gentbi.c if ((sc->mii_extcapabilities & EXTSR_1000XFDX) != 0 &&
sc 138 dev/mii/icsphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 146 dev/mii/icsphy.c sc->mii_inst = mii->mii_instance;
sc 147 dev/mii/icsphy.c sc->mii_phy = ma->mii_phyno;
sc 148 dev/mii/icsphy.c sc->mii_funcs = &icsphy_funcs;
sc 149 dev/mii/icsphy.c sc->mii_pdata = mii;
sc 150 dev/mii/icsphy.c sc->mii_flags = ma->mii_flags;
sc 152 dev/mii/icsphy.c PHY_RESET(sc);
sc 154 dev/mii/icsphy.c sc->mii_capabilities =
sc 155 dev/mii/icsphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 156 dev/mii/icsphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 157 dev/mii/icsphy.c mii_phy_add_media(sc);
sc 161 dev/mii/icsphy.c icsphy_service(sc, mii, cmd)
sc 162 dev/mii/icsphy.c struct mii_softc *sc;
sc 169 dev/mii/icsphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 177 dev/mii/icsphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 186 dev/mii/icsphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 187 dev/mii/icsphy.c reg = PHY_READ(sc, MII_BMCR);
sc 188 dev/mii/icsphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 198 dev/mii/icsphy.c mii_phy_setmedia(sc);
sc 205 dev/mii/icsphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 208 dev/mii/icsphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 213 dev/mii/icsphy.c mii_phy_down(sc);
sc 218 dev/mii/icsphy.c mii_phy_status(sc);
sc 221 dev/mii/icsphy.c mii_phy_update(sc, cmd);
sc 226 dev/mii/icsphy.c icsphy_status(sc)
sc 227 dev/mii/icsphy.c struct mii_softc *sc;
sc 229 dev/mii/icsphy.c struct mii_data *mii = sc->mii_pdata;
sc 241 dev/mii/icsphy.c qpr = PHY_READ(sc, MII_ICSPHY_QPR); /* unlatch */
sc 242 dev/mii/icsphy.c qpr = PHY_READ(sc, MII_ICSPHY_QPR); /* real value */
sc 247 dev/mii/icsphy.c bmcr = PHY_READ(sc, MII_BMCR);
sc 278 dev/mii/icsphy.c icsphy_reset(sc)
sc 279 dev/mii/icsphy.c struct mii_softc *sc;
sc 282 dev/mii/icsphy.c mii_phy_reset(sc);
sc 283 dev/mii/icsphy.c PHY_WRITE(sc, MII_ICSPHY_ECR2, ECR2_10TPROT|ECR2_Q10T);
sc 289 dev/mii/icsphy.c PHY_WRITE(sc, MII_BMCR, BMCR_S100|BMCR_AUTOEN|BMCR_FDX);
sc 141 dev/mii/inphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 149 dev/mii/inphy.c sc->mii_inst = mii->mii_instance;
sc 150 dev/mii/inphy.c sc->mii_phy = ma->mii_phyno;
sc 151 dev/mii/inphy.c sc->mii_funcs = &inphy_funcs;
sc 152 dev/mii/inphy.c sc->mii_pdata = mii;
sc 153 dev/mii/inphy.c sc->mii_flags = ma->mii_flags;
sc 155 dev/mii/inphy.c PHY_RESET(sc);
sc 157 dev/mii/inphy.c sc->mii_capabilities =
sc 158 dev/mii/inphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 159 dev/mii/inphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 160 dev/mii/inphy.c mii_phy_add_media(sc);
sc 164 dev/mii/inphy.c inphy_service(sc, mii, cmd)
sc 165 dev/mii/inphy.c struct mii_softc *sc;
sc 172 dev/mii/inphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 180 dev/mii/inphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 189 dev/mii/inphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 190 dev/mii/inphy.c reg = PHY_READ(sc, MII_BMCR);
sc 191 dev/mii/inphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 201 dev/mii/inphy.c mii_phy_setmedia(sc);
sc 208 dev/mii/inphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 211 dev/mii/inphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 216 dev/mii/inphy.c mii_phy_down(sc);
sc 221 dev/mii/inphy.c mii_phy_status(sc);
sc 224 dev/mii/inphy.c mii_phy_update(sc, cmd);
sc 229 dev/mii/inphy.c inphy_status(sc)
sc 230 dev/mii/inphy.c struct mii_softc *sc;
sc 232 dev/mii/inphy.c struct mii_data *mii = sc->mii_pdata;
sc 239 dev/mii/inphy.c bmsr = PHY_READ(sc, MII_BMSR) |
sc 240 dev/mii/inphy.c PHY_READ(sc, MII_BMSR);
sc 244 dev/mii/inphy.c bmcr = PHY_READ(sc, MII_BMCR);
sc 261 dev/mii/inphy.c scr = PHY_READ(sc, MII_INPHY_SCR);
sc 138 dev/mii/iophy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 146 dev/mii/iophy.c sc->mii_inst = mii->mii_instance;
sc 147 dev/mii/iophy.c sc->mii_phy = ma->mii_phyno;
sc 148 dev/mii/iophy.c sc->mii_funcs = &iophy_funcs;
sc 149 dev/mii/iophy.c sc->mii_pdata = mii;
sc 150 dev/mii/iophy.c sc->mii_flags = ma->mii_flags;
sc 152 dev/mii/iophy.c PHY_RESET(sc);
sc 154 dev/mii/iophy.c sc->mii_capabilities =
sc 155 dev/mii/iophy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 156 dev/mii/iophy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 157 dev/mii/iophy.c mii_phy_add_media(sc);
sc 161 dev/mii/iophy.c iophy_service(sc, mii, cmd)
sc 162 dev/mii/iophy.c struct mii_softc *sc;
sc 169 dev/mii/iophy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 177 dev/mii/iophy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 186 dev/mii/iophy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 187 dev/mii/iophy.c reg = PHY_READ(sc, MII_BMCR);
sc 188 dev/mii/iophy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 198 dev/mii/iophy.c mii_phy_setmedia(sc);
sc 205 dev/mii/iophy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 208 dev/mii/iophy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 213 dev/mii/iophy.c mii_phy_down(sc);
sc 218 dev/mii/iophy.c mii_phy_status(sc);
sc 221 dev/mii/iophy.c mii_phy_update(sc, cmd);
sc 226 dev/mii/iophy.c iophy_status(sc)
sc 227 dev/mii/iophy.c struct mii_softc *sc;
sc 229 dev/mii/iophy.c struct mii_data *mii = sc->mii_pdata;
sc 236 dev/mii/iophy.c bmsr = PHY_READ(sc, MII_BMSR) |
sc 237 dev/mii/iophy.c PHY_READ(sc, MII_BMSR);
sc 241 dev/mii/iophy.c bmcr = PHY_READ(sc, MII_BMCR);
sc 258 dev/mii/iophy.c ext0 = PHY_READ(sc, MII_IOPHY_EXT0);
sc 104 dev/mii/ipgphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 112 dev/mii/ipgphy.c sc->mii_inst = mii->mii_instance;
sc 113 dev/mii/ipgphy.c sc->mii_phy = ma->mii_phyno;
sc 114 dev/mii/ipgphy.c sc->mii_funcs = &ipgphy_funcs;
sc 115 dev/mii/ipgphy.c sc->mii_pdata = mii;
sc 116 dev/mii/ipgphy.c sc->mii_anegticks = MII_ANEGTICKS_GIGE;
sc 118 dev/mii/ipgphy.c sc->mii_flags |= MIIF_NOISOLATE;
sc 122 dev/mii/ipgphy.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
sc 125 dev/mii/ipgphy.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst),
sc 127 dev/mii/ipgphy.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst),
sc 129 dev/mii/ipgphy.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst),
sc 131 dev/mii/ipgphy.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst),
sc 134 dev/mii/ipgphy.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, sc->mii_inst),
sc 136 dev/mii/ipgphy.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, sc->mii_inst),
sc 138 dev/mii/ipgphy.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0);
sc 141 dev/mii/ipgphy.c PHY_RESET(sc);
sc 145 dev/mii/ipgphy.c ipgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 155 dev/mii/ipgphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 164 dev/mii/ipgphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 165 dev/mii/ipgphy.c reg = PHY_READ(sc, IPGPHY_MII_BMCR);
sc 166 dev/mii/ipgphy.c PHY_WRITE(sc, IPGPHY_MII_BMCR,
sc 177 dev/mii/ipgphy.c PHY_RESET(sc);
sc 181 dev/mii/ipgphy.c (void)ipgphy_mii_phy_auto(sc);
sc 211 dev/mii/ipgphy.c PHY_WRITE(sc, IPGPHY_MII_1000CR, 0);
sc 212 dev/mii/ipgphy.c PHY_WRITE(sc, IPGPHY_MII_BMCR, speed);
sc 217 dev/mii/ipgphy.c PHY_WRITE(sc, IPGPHY_MII_1000CR, gig);
sc 218 dev/mii/ipgphy.c PHY_WRITE(sc, IPGPHY_MII_BMCR, speed);
sc 223 dev/mii/ipgphy.c PHY_WRITE(sc, IPGPHY_MII_1000CR, gig);
sc 232 dev/mii/ipgphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 244 dev/mii/ipgphy.c sc->mii_ticks = 0;
sc 251 dev/mii/ipgphy.c reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
sc 253 dev/mii/ipgphy.c sc->mii_ticks = 0;
sc 258 dev/mii/ipgphy.c if (sc->mii_ticks++ == 0)
sc 264 dev/mii/ipgphy.c if (sc->mii_ticks <= sc->mii_anegticks)
sc 267 dev/mii/ipgphy.c sc->mii_ticks = 0;
sc 268 dev/mii/ipgphy.c ipgphy_mii_phy_auto(sc);
sc 273 dev/mii/ipgphy.c mii_phy_status(sc);
sc 276 dev/mii/ipgphy.c mii_phy_update(sc, cmd);
sc 281 dev/mii/ipgphy.c ipgphy_status(struct mii_softc *sc)
sc 283 dev/mii/ipgphy.c struct mii_data *mii = sc->mii_pdata;
sc 289 dev/mii/ipgphy.c bmsr = PHY_READ(sc, IPGPHY_MII_BMSR) |
sc 290 dev/mii/ipgphy.c PHY_READ(sc, IPGPHY_MII_BMSR);
sc 294 dev/mii/ipgphy.c bmcr = PHY_READ(sc, IPGPHY_MII_BMCR);
sc 306 dev/mii/ipgphy.c stat = PHY_READ(sc, STGE_PhyCtrl);
sc 323 dev/mii/ipgphy.c mii->mii_media_active |= mii_phy_flowstatus(sc) | IFM_FDX;
sc 327 dev/mii/ipgphy.c stat = PHY_READ(sc, IPGPHY_MII_1000SR);
sc 341 dev/mii/ipgphy.c if (sc->mii_flags & MIIF_DOPAUSE)
sc 355 dev/mii/ipgphy.c ipgphy_load_dspcode(struct mii_softc *sc)
sc 357 dev/mii/ipgphy.c PHY_WRITE(sc, 31, 0x0001);
sc 358 dev/mii/ipgphy.c PHY_WRITE(sc, 27, 0x01e0);
sc 359 dev/mii/ipgphy.c PHY_WRITE(sc, 31, 0x0002);
sc 360 dev/mii/ipgphy.c PHY_WRITE(sc, 27, 0xeb8e);
sc 361 dev/mii/ipgphy.c PHY_WRITE(sc, 31, 0x0000);
sc 362 dev/mii/ipgphy.c PHY_WRITE(sc, 30, 0x005e);
sc 363 dev/mii/ipgphy.c PHY_WRITE(sc, 9, 0x0700);
sc 369 dev/mii/ipgphy.c ipgphy_reset(struct mii_softc *sc)
sc 375 dev/mii/ipgphy.c mii_phy_reset(sc);
sc 378 dev/mii/ipgphy.c reg = PHY_READ(sc, IPGPHY_MII_BMCR);
sc 380 dev/mii/ipgphy.c PHY_WRITE(sc, MII_BMCR, reg);
sc 382 dev/mii/ipgphy.c ifp = sc->mii_pdata->mii_ifp;
sc 387 dev/mii/ipgphy.c ipgphy_load_dspcode(sc);
sc 97 dev/mii/luphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 105 dev/mii/luphy.c sc->mii_inst = mii->mii_instance;
sc 106 dev/mii/luphy.c sc->mii_phy = ma->mii_phyno;
sc 107 dev/mii/luphy.c sc->mii_funcs = &luphy_funcs;
sc 108 dev/mii/luphy.c sc->mii_pdata = mii;
sc 109 dev/mii/luphy.c sc->mii_flags = ma->mii_flags;
sc 111 dev/mii/luphy.c sc->mii_flags |= MIIF_NOISOLATE;
sc 113 dev/mii/luphy.c PHY_RESET(sc);
sc 115 dev/mii/luphy.c sc->mii_capabilities =
sc 116 dev/mii/luphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 117 dev/mii/luphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 118 dev/mii/luphy.c mii_phy_add_media(sc);
sc 122 dev/mii/luphy.c luphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 131 dev/mii/luphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 141 dev/mii/luphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 150 dev/mii/luphy.c mii_phy_setmedia(sc);
sc 157 dev/mii/luphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 160 dev/mii/luphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 165 dev/mii/luphy.c mii_phy_down(sc);
sc 170 dev/mii/luphy.c mii_phy_status(sc);
sc 173 dev/mii/luphy.c mii_phy_update(sc, cmd);
sc 144 dev/mii/lxtphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 151 dev/mii/lxtphy.c sc->mii_funcs = &lxtphy_funcs;
sc 155 dev/mii/lxtphy.c sc->mii_funcs = &lxtphy971_funcs;
sc 161 dev/mii/lxtphy.c sc->mii_inst = mii->mii_instance;
sc 162 dev/mii/lxtphy.c sc->mii_phy = ma->mii_phyno;
sc 163 dev/mii/lxtphy.c sc->mii_pdata = mii;
sc 164 dev/mii/lxtphy.c sc->mii_flags = ma->mii_flags;
sc 166 dev/mii/lxtphy.c PHY_RESET(sc);
sc 168 dev/mii/lxtphy.c sc->mii_capabilities =
sc 169 dev/mii/lxtphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 170 dev/mii/lxtphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 171 dev/mii/lxtphy.c mii_phy_add_media(sc);
sc 175 dev/mii/lxtphy.c lxtphy_service(sc, mii, cmd)
sc 176 dev/mii/lxtphy.c struct mii_softc *sc;
sc 183 dev/mii/lxtphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 191 dev/mii/lxtphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 200 dev/mii/lxtphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 201 dev/mii/lxtphy.c reg = PHY_READ(sc, MII_BMCR);
sc 202 dev/mii/lxtphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 212 dev/mii/lxtphy.c mii_phy_setmedia(sc);
sc 219 dev/mii/lxtphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 222 dev/mii/lxtphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 227 dev/mii/lxtphy.c mii_phy_down(sc);
sc 232 dev/mii/lxtphy.c mii_phy_status(sc);
sc 235 dev/mii/lxtphy.c mii_phy_update(sc, cmd);
sc 240 dev/mii/lxtphy.c lxtphy_status(sc)
sc 241 dev/mii/lxtphy.c struct mii_softc *sc;
sc 243 dev/mii/lxtphy.c struct mii_data *mii = sc->mii_pdata;
sc 255 dev/mii/lxtphy.c csr = PHY_READ(sc, MII_LXTPHY_CSR);
sc 259 dev/mii/lxtphy.c bmcr = PHY_READ(sc, MII_BMCR);
sc 270 dev/mii/lxtphy.c bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
sc 290 dev/mii/lxtphy.c lxtphy_reset(sc)
sc 291 dev/mii/lxtphy.c struct mii_softc *sc;
sc 293 dev/mii/lxtphy.c mii_phy_reset(sc);
sc 294 dev/mii/lxtphy.c PHY_WRITE(sc, MII_LXTPHY_IER,
sc 295 dev/mii/lxtphy.c PHY_READ(sc, MII_LXTPHY_IER) & ~IER_INTEN);
sc 57 dev/mii/mii_bitbang.c ops->mbo_write(sc, (x)); \
sc 61 dev/mii/mii_bitbang.c #define READ ops->mbo_read(sc)
sc 75 dev/mii/mii_bitbang.c mii_bitbang_sync(struct device *sc, mii_bitbang_ops_t ops)
sc 95 dev/mii/mii_bitbang.c mii_bitbang_sendbits(struct device *sc, mii_bitbang_ops_t ops,
sc 121 dev/mii/mii_bitbang.c mii_bitbang_readreg(struct device *sc, mii_bitbang_ops_t ops, int phy,
sc 126 dev/mii/mii_bitbang.c mii_bitbang_sync(sc, ops);
sc 128 dev/mii/mii_bitbang.c mii_bitbang_sendbits(sc, ops, MII_COMMAND_START, 2);
sc 129 dev/mii/mii_bitbang.c mii_bitbang_sendbits(sc, ops, MII_COMMAND_READ, 2);
sc 130 dev/mii/mii_bitbang.c mii_bitbang_sendbits(sc, ops, phy, 5);
sc 131 dev/mii/mii_bitbang.c mii_bitbang_sendbits(sc, ops, reg, 5);
sc 169 dev/mii/mii_bitbang.c mii_bitbang_writereg(struct device *sc, mii_bitbang_ops_t ops,
sc 173 dev/mii/mii_bitbang.c mii_bitbang_sync(sc, ops);
sc 175 dev/mii/mii_bitbang.c mii_bitbang_sendbits(sc, ops, MII_COMMAND_START, 2);
sc 176 dev/mii/mii_bitbang.c mii_bitbang_sendbits(sc, ops, MII_COMMAND_WRITE, 2);
sc 177 dev/mii/mii_bitbang.c mii_bitbang_sendbits(sc, ops, phy, 5);
sc 178 dev/mii/mii_bitbang.c mii_bitbang_sendbits(sc, ops, reg, 5);
sc 179 dev/mii/mii_bitbang.c mii_bitbang_sendbits(sc, ops, MII_COMMAND_ACK, 2);
sc 180 dev/mii/mii_bitbang.c mii_bitbang_sendbits(sc, ops, val, 16);
sc 87 dev/mii/mii_physubr.c mii_phy_setmedia(struct mii_softc *sc)
sc 89 dev/mii/mii_physubr.c struct mii_data *mii = sc->mii_pdata;
sc 94 dev/mii/mii_physubr.c if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 ||
sc 95 dev/mii/mii_physubr.c (sc->mii_flags & MIIF_FORCEANEG))
sc 96 dev/mii/mii_physubr.c (void) mii_phy_auto(sc, 1);
sc 126 dev/mii/mii_physubr.c PHY_WRITE(sc, MII_ANAR, anar);
sc 127 dev/mii/mii_physubr.c PHY_WRITE(sc, MII_BMCR, bmcr);
sc 128 dev/mii/mii_physubr.c if (sc->mii_flags & MIIF_HAVE_GTCR)
sc 129 dev/mii/mii_physubr.c PHY_WRITE(sc, MII_100T2CR, gtcr);
sc 133 dev/mii/mii_physubr.c mii_phy_auto(struct mii_softc *sc, int waitfor)
sc 137 dev/mii/mii_physubr.c if ((sc->mii_flags & MIIF_DOINGAUTO) == 0) {
sc 142 dev/mii/mii_physubr.c if (sc->mii_flags & MIIF_IS_1000X) {
sc 145 dev/mii/mii_physubr.c if (sc->mii_extcapabilities & EXTSR_1000XFDX)
sc 147 dev/mii/mii_physubr.c if (sc->mii_extcapabilities & EXTSR_1000XHDX)
sc 150 dev/mii/mii_physubr.c if (sc->mii_flags & MIIF_DOPAUSE &&
sc 151 dev/mii/mii_physubr.c sc->mii_extcapabilities & EXTSR_1000XFDX)
sc 154 dev/mii/mii_physubr.c PHY_WRITE(sc, MII_ANAR, anar);
sc 158 dev/mii/mii_physubr.c anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) |
sc 165 dev/mii/mii_physubr.c if (sc->mii_flags & MIIF_DOPAUSE) {
sc 166 dev/mii/mii_physubr.c if (sc->mii_capabilities & BMSR_100TXFDX)
sc 168 dev/mii/mii_physubr.c if (sc->mii_extcapabilities & EXTSR_1000TFDX)
sc 171 dev/mii/mii_physubr.c PHY_WRITE(sc, MII_ANAR, anar);
sc 172 dev/mii/mii_physubr.c if (sc->mii_flags & MIIF_HAVE_GTCR) {
sc 175 dev/mii/mii_physubr.c if (sc->mii_extcapabilities & EXTSR_1000TFDX)
sc 177 dev/mii/mii_physubr.c if (sc->mii_extcapabilities & EXTSR_1000THDX)
sc 180 dev/mii/mii_physubr.c PHY_WRITE(sc, MII_100T2CR, gtcr);
sc 183 dev/mii/mii_physubr.c PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
sc 189 dev/mii/mii_physubr.c if ((bmsr = PHY_READ(sc, MII_BMSR)) & BMSR_ACOMP)
sc 207 dev/mii/mii_physubr.c if (sc->mii_flags & MIIF_AUTOTSLEEP) {
sc 208 dev/mii/mii_physubr.c sc->mii_flags |= MIIF_DOINGAUTO;
sc 209 dev/mii/mii_physubr.c tsleep(&sc->mii_flags, PZERO, "miiaut", hz >> 1);
sc 210 dev/mii/mii_physubr.c mii_phy_auto_timeout(sc);
sc 211 dev/mii/mii_physubr.c } else if ((sc->mii_flags & MIIF_DOINGAUTO) == 0) {
sc 212 dev/mii/mii_physubr.c sc->mii_flags |= MIIF_DOINGAUTO;
sc 213 dev/mii/mii_physubr.c timeout_set(&sc->mii_phy_timo, mii_phy_auto_timeout, sc);
sc 214 dev/mii/mii_physubr.c timeout_add(&sc->mii_phy_timo, hz / 2);
sc 222 dev/mii/mii_physubr.c struct mii_softc *sc = arg;
sc 225 dev/mii/mii_physubr.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 229 dev/mii/mii_physubr.c sc->mii_flags &= ~MIIF_DOINGAUTO;
sc 230 dev/mii/mii_physubr.c bmsr = PHY_READ(sc, MII_BMSR);
sc 233 dev/mii/mii_physubr.c (void) PHY_SERVICE(sc, sc->mii_pdata, MII_POLLSTAT);
sc 238 dev/mii/mii_physubr.c mii_phy_tick(struct mii_softc *sc)
sc 240 dev/mii/mii_physubr.c struct mii_data *mii = sc->mii_pdata;
sc 258 dev/mii/mii_physubr.c reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
sc 269 dev/mii/mii_physubr.c if (!sc->mii_anegticks)
sc 270 dev/mii/mii_physubr.c sc->mii_anegticks = MII_ANEGTICKS;
sc 272 dev/mii/mii_physubr.c if (++sc->mii_ticks <= sc->mii_anegticks)
sc 275 dev/mii/mii_physubr.c sc->mii_ticks = 0;
sc 276 dev/mii/mii_physubr.c PHY_RESET(sc);
sc 278 dev/mii/mii_physubr.c if (mii_phy_auto(sc, 0) == EJUSTRETURN)
sc 289 dev/mii/mii_physubr.c mii_phy_reset(struct mii_softc *sc)
sc 293 dev/mii/mii_physubr.c if (sc->mii_flags & MIIF_NOISOLATE)
sc 297 dev/mii/mii_physubr.c PHY_WRITE(sc, MII_BMCR, reg);
sc 311 dev/mii/mii_physubr.c reg = PHY_READ(sc, MII_BMCR);
sc 317 dev/mii/mii_physubr.c if (sc->mii_inst != 0 && ((sc->mii_flags & MIIF_NOISOLATE) == 0))
sc 318 dev/mii/mii_physubr.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 322 dev/mii/mii_physubr.c mii_phy_down(struct mii_softc *sc)
sc 324 dev/mii/mii_physubr.c if (sc->mii_flags & MIIF_DOINGAUTO) {
sc 325 dev/mii/mii_physubr.c sc->mii_flags &= ~MIIF_DOINGAUTO;
sc 326 dev/mii/mii_physubr.c timeout_del(&sc->mii_phy_timo);
sc 332 dev/mii/mii_physubr.c mii_phy_status(struct mii_softc *sc)
sc 334 dev/mii/mii_physubr.c PHY_STATUS(sc);
sc 338 dev/mii/mii_physubr.c mii_phy_update(struct mii_softc *sc, int cmd)
sc 340 dev/mii/mii_physubr.c struct mii_data *mii = sc->mii_pdata;
sc 344 dev/mii/mii_physubr.c if (sc->mii_media_active != mii->mii_media_active ||
sc 345 dev/mii/mii_physubr.c sc->mii_media_status != mii->mii_media_status ||
sc 347 dev/mii/mii_physubr.c announce = mii_phy_statusmsg(sc);
sc 348 dev/mii/mii_physubr.c (*mii->mii_statchg)(sc->mii_dev.dv_parent);
sc 349 dev/mii/mii_physubr.c sc->mii_media_active = mii->mii_media_active;
sc 350 dev/mii/mii_physubr.c sc->mii_media_status = mii->mii_media_status;
sc 361 dev/mii/mii_physubr.c mii_phy_statusmsg(struct mii_softc *sc)
sc 363 dev/mii/mii_physubr.c struct mii_data *mii = sc->mii_pdata;
sc 406 dev/mii/mii_physubr.c mii_phy_add_media(struct mii_softc *sc)
sc 408 dev/mii/mii_physubr.c struct mii_data *mii = sc->mii_pdata;
sc 412 dev/mii/mii_physubr.c if ((sc->mii_flags & MIIF_NOISOLATE) == 0)
sc 413 dev/mii/mii_physubr.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
sc 416 dev/mii/mii_physubr.c if (sc->mii_capabilities & BMSR_10THDX) {
sc 417 dev/mii/mii_physubr.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst),
sc 420 dev/mii/mii_physubr.c if (sc->mii_capabilities & BMSR_10TFDX) {
sc 421 dev/mii/mii_physubr.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst),
sc 424 dev/mii/mii_physubr.c if (sc->mii_capabilities & BMSR_100TXHDX) {
sc 425 dev/mii/mii_physubr.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst),
sc 428 dev/mii/mii_physubr.c if (sc->mii_capabilities & BMSR_100TXFDX) {
sc 429 dev/mii/mii_physubr.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst),
sc 432 dev/mii/mii_physubr.c if (sc->mii_capabilities & BMSR_100T4) {
sc 433 dev/mii/mii_physubr.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_T4, 0, sc->mii_inst),
sc 436 dev/mii/mii_physubr.c if (sc->mii_extcapabilities & EXTSR_MEDIAMASK) {
sc 441 dev/mii/mii_physubr.c if (sc->mii_extcapabilities & EXTSR_1000XHDX) {
sc 442 dev/mii/mii_physubr.c sc->mii_anegticks = MII_ANEGTICKS_GIGE;
sc 443 dev/mii/mii_physubr.c sc->mii_flags |= MIIF_IS_1000X;
sc 445 dev/mii/mii_physubr.c sc->mii_inst), MII_MEDIA_1000_X);
sc 447 dev/mii/mii_physubr.c if (sc->mii_extcapabilities & EXTSR_1000XFDX) {
sc 448 dev/mii/mii_physubr.c sc->mii_anegticks = MII_ANEGTICKS_GIGE;
sc 449 dev/mii/mii_physubr.c sc->mii_flags |= MIIF_IS_1000X;
sc 451 dev/mii/mii_physubr.c sc->mii_inst), MII_MEDIA_1000_X_FDX);
sc 462 dev/mii/mii_physubr.c if (sc->mii_extcapabilities & EXTSR_1000THDX) {
sc 463 dev/mii/mii_physubr.c sc->mii_anegticks = MII_ANEGTICKS_GIGE;
sc 464 dev/mii/mii_physubr.c sc->mii_flags |= MIIF_HAVE_GTCR;
sc 467 dev/mii/mii_physubr.c sc->mii_inst), MII_MEDIA_1000_T);
sc 469 dev/mii/mii_physubr.c if (sc->mii_extcapabilities & EXTSR_1000TFDX) {
sc 470 dev/mii/mii_physubr.c sc->mii_anegticks = MII_ANEGTICKS_GIGE;
sc 471 dev/mii/mii_physubr.c sc->mii_flags |= MIIF_HAVE_GTCR;
sc 474 dev/mii/mii_physubr.c sc->mii_inst), MII_MEDIA_1000_T_FDX);
sc 478 dev/mii/mii_physubr.c if (sc->mii_capabilities & BMSR_ANEG) {
sc 479 dev/mii/mii_physubr.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst),
sc 486 dev/mii/mii_physubr.c mii_phy_delete_media(struct mii_softc *sc)
sc 488 dev/mii/mii_physubr.c struct mii_data *mii = sc->mii_pdata;
sc 490 dev/mii/mii_physubr.c ifmedia_delete_instance(&mii->mii_media, sc->mii_inst);
sc 514 dev/mii/mii_physubr.c struct mii_softc *sc = (void *) self;
sc 516 dev/mii/mii_physubr.c if (sc->mii_flags & MIIF_DOINGAUTO)
sc 517 dev/mii/mii_physubr.c timeout_del(&sc->mii_phy_timo);
sc 519 dev/mii/mii_physubr.c mii_phy_delete_media(sc);
sc 540 dev/mii/mii_physubr.c mii_phy_flowstatus(struct mii_softc *sc)
sc 544 dev/mii/mii_physubr.c if ((sc->mii_flags & MIIF_DOPAUSE) == 0)
sc 547 dev/mii/mii_physubr.c anar = PHY_READ(sc, MII_ANAR);
sc 548 dev/mii/mii_physubr.c anlpar = PHY_READ(sc, MII_ANLPAR);
sc 551 dev/mii/mii_physubr.c if (sc->mii_flags & MIIF_IS_1000X) {
sc 88 dev/mii/mtdphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 96 dev/mii/mtdphy.c sc->mii_inst = mii->mii_instance;
sc 97 dev/mii/mtdphy.c sc->mii_phy = ma->mii_phyno;
sc 98 dev/mii/mtdphy.c sc->mii_funcs = &mtdphy_funcs;
sc 99 dev/mii/mtdphy.c sc->mii_pdata = mii;
sc 100 dev/mii/mtdphy.c sc->mii_flags = ma->mii_flags;
sc 102 dev/mii/mtdphy.c PHY_RESET(sc);
sc 104 dev/mii/mtdphy.c sc->mii_capabilities =
sc 105 dev/mii/mtdphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 106 dev/mii/mtdphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 107 dev/mii/mtdphy.c mii_phy_add_media(sc);
sc 111 dev/mii/mtdphy.c mtdphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 116 dev/mii/mtdphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 124 dev/mii/mtdphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 132 dev/mii/mtdphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 133 dev/mii/mtdphy.c reg = PHY_READ(sc, MII_BMCR);
sc 134 dev/mii/mtdphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 141 dev/mii/mtdphy.c mii_phy_setmedia(sc);
sc 148 dev/mii/mtdphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 151 dev/mii/mtdphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 156 dev/mii/mtdphy.c mii_phy_down(sc);
sc 161 dev/mii/mtdphy.c mii_phy_status(sc);
sc 164 dev/mii/mtdphy.c mii_phy_update(sc, cmd);
sc 108 dev/mii/nsgphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 117 dev/mii/nsgphy.c sc->mii_inst = mii->mii_instance;
sc 118 dev/mii/nsgphy.c sc->mii_phy = ma->mii_phyno;
sc 119 dev/mii/nsgphy.c sc->mii_funcs = &nsgphy_funcs;
sc 120 dev/mii/nsgphy.c sc->mii_pdata = mii;
sc 121 dev/mii/nsgphy.c sc->mii_flags = ma->mii_flags;
sc 122 dev/mii/nsgphy.c sc->mii_anegticks = MII_ANEGTICKS;
sc 124 dev/mii/nsgphy.c PHY_RESET(sc);
sc 126 dev/mii/nsgphy.c sc->mii_capabilities =
sc 127 dev/mii/nsgphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 128 dev/mii/nsgphy.c if (sc->mii_capabilities & BMSR_EXTSTAT)
sc 129 dev/mii/nsgphy.c sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
sc 138 dev/mii/nsgphy.c anar = PHY_READ(sc, MII_ANAR);
sc 140 dev/mii/nsgphy.c sc->mii_capabilities |= (BMSR_10THDX & ma->mii_capmask);
sc 142 dev/mii/nsgphy.c sc->mii_capabilities |= (BMSR_10TFDX & ma->mii_capmask);
sc 144 dev/mii/nsgphy.c if ((sc->mii_capabilities & BMSR_MEDIAMASK) ||
sc 145 dev/mii/nsgphy.c (sc->mii_extcapabilities & EXTSR_MEDIAMASK))
sc 146 dev/mii/nsgphy.c mii_phy_add_media(sc);
sc 150 dev/mii/nsgphy.c nsgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 155 dev/mii/nsgphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 163 dev/mii/nsgphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 172 dev/mii/nsgphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 173 dev/mii/nsgphy.c reg = PHY_READ(sc, MII_BMCR);
sc 174 dev/mii/nsgphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 184 dev/mii/nsgphy.c mii_phy_setmedia(sc);
sc 191 dev/mii/nsgphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 194 dev/mii/nsgphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 198 dev/mii/nsgphy.c mii_phy_down(sc);
sc 203 dev/mii/nsgphy.c mii_phy_status(sc);
sc 206 dev/mii/nsgphy.c mii_phy_update(sc, cmd);
sc 211 dev/mii/nsgphy.c nsgphy_status(struct mii_softc *sc)
sc 213 dev/mii/nsgphy.c struct mii_data *mii = sc->mii_pdata;
sc 220 dev/mii/nsgphy.c bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
sc 222 dev/mii/nsgphy.c physup = PHY_READ(sc, NSGPHY_MII_PHYSUP);
sc 227 dev/mii/nsgphy.c bmcr = PHY_READ(sc, MII_BMCR);
sc 247 dev/mii/nsgphy.c gtsr = PHY_READ(sc, MII_100T2SR);
sc 133 dev/mii/nsphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 141 dev/mii/nsphy.c sc->mii_inst = mii->mii_instance;
sc 142 dev/mii/nsphy.c sc->mii_phy = ma->mii_phyno;
sc 143 dev/mii/nsphy.c sc->mii_funcs = &nsphy_funcs;
sc 144 dev/mii/nsphy.c sc->mii_pdata = mii;
sc 145 dev/mii/nsphy.c sc->mii_flags = ma->mii_flags;
sc 146 dev/mii/nsphy.c sc->mii_anegticks = MII_ANEGTICKS;
sc 148 dev/mii/nsphy.c PHY_RESET(sc);
sc 150 dev/mii/nsphy.c sc->mii_capabilities =
sc 151 dev/mii/nsphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 152 dev/mii/nsphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 153 dev/mii/nsphy.c mii_phy_add_media(sc);
sc 157 dev/mii/nsphy.c nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 162 dev/mii/nsphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 170 dev/mii/nsphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 179 dev/mii/nsphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 180 dev/mii/nsphy.c reg = PHY_READ(sc, MII_BMCR);
sc 181 dev/mii/nsphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 191 dev/mii/nsphy.c reg = PHY_READ(sc, MII_NSPHY_PCR);
sc 219 dev/mii/nsphy.c PHY_WRITE(sc, MII_NSPHY_PCR, reg);
sc 221 dev/mii/nsphy.c mii_phy_setmedia(sc);
sc 228 dev/mii/nsphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 231 dev/mii/nsphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 236 dev/mii/nsphy.c mii_phy_down(sc);
sc 241 dev/mii/nsphy.c mii_phy_status(sc);
sc 244 dev/mii/nsphy.c mii_phy_update(sc, cmd);
sc 249 dev/mii/nsphy.c nsphy_status(struct mii_softc *sc)
sc 251 dev/mii/nsphy.c struct mii_data *mii = sc->mii_pdata;
sc 258 dev/mii/nsphy.c bmsr = PHY_READ(sc, MII_BMSR) |
sc 259 dev/mii/nsphy.c PHY_READ(sc, MII_BMSR);
sc 263 dev/mii/nsphy.c bmcr = PHY_READ(sc, MII_BMCR);
sc 289 dev/mii/nsphy.c if (PHY_READ(sc, MII_ANER) & ANER_LPAN) {
sc 290 dev/mii/nsphy.c anlpar = PHY_READ(sc, MII_ANAR) &
sc 291 dev/mii/nsphy.c PHY_READ(sc, MII_ANLPAR);
sc 312 dev/mii/nsphy.c par = PHY_READ(sc, MII_NSPHY_PAR);
sc 323 dev/mii/nsphy.c nsphy_reset(struct mii_softc *sc)
sc 327 dev/mii/nsphy.c mii_phy_reset(sc);
sc 328 dev/mii/nsphy.c anar = PHY_READ(sc, MII_ANAR);
sc 329 dev/mii/nsphy.c anar |= BMSR_MEDIA_TO_ANAR(PHY_READ(sc, MII_BMSR));
sc 330 dev/mii/nsphy.c PHY_WRITE(sc, MII_ANAR, anar);
sc 136 dev/mii/nsphyter.c struct mii_softc *sc = (struct mii_softc *)self;
sc 144 dev/mii/nsphyter.c sc->mii_inst = mii->mii_instance;
sc 145 dev/mii/nsphyter.c sc->mii_phy = ma->mii_phyno;
sc 146 dev/mii/nsphyter.c sc->mii_funcs = &nsphyter_funcs;
sc 147 dev/mii/nsphyter.c sc->mii_pdata = mii;
sc 148 dev/mii/nsphyter.c sc->mii_flags = ma->mii_flags;
sc 150 dev/mii/nsphyter.c PHY_RESET(sc);
sc 152 dev/mii/nsphyter.c sc->mii_capabilities =
sc 153 dev/mii/nsphyter.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 154 dev/mii/nsphyter.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 155 dev/mii/nsphyter.c mii_phy_add_media(sc);
sc 159 dev/mii/nsphyter.c nsphyter_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 164 dev/mii/nsphyter.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 172 dev/mii/nsphyter.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 181 dev/mii/nsphyter.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 182 dev/mii/nsphyter.c reg = PHY_READ(sc, MII_BMCR);
sc 183 dev/mii/nsphyter.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 193 dev/mii/nsphyter.c mii_phy_setmedia(sc);
sc 200 dev/mii/nsphyter.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 203 dev/mii/nsphyter.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 208 dev/mii/nsphyter.c mii_phy_down(sc);
sc 213 dev/mii/nsphyter.c mii_phy_status(sc);
sc 216 dev/mii/nsphyter.c mii_phy_update(sc, cmd);
sc 221 dev/mii/nsphyter.c nsphyter_status(struct mii_softc *sc)
sc 223 dev/mii/nsphyter.c struct mii_data *mii = sc->mii_pdata;
sc 230 dev/mii/nsphyter.c bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
sc 231 dev/mii/nsphyter.c physts = PHY_READ(sc, MII_NSPHYTER_PHYSTS);
sc 236 dev/mii/nsphyter.c bmcr = PHY_READ(sc, MII_BMCR);
sc 132 dev/mii/qsphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 140 dev/mii/qsphy.c sc->mii_inst = mii->mii_instance;
sc 141 dev/mii/qsphy.c sc->mii_phy = ma->mii_phyno;
sc 142 dev/mii/qsphy.c sc->mii_funcs = &qsphy_funcs;
sc 143 dev/mii/qsphy.c sc->mii_pdata = mii;
sc 144 dev/mii/qsphy.c sc->mii_flags = ma->mii_flags;
sc 146 dev/mii/qsphy.c PHY_RESET(sc);
sc 148 dev/mii/qsphy.c sc->mii_capabilities =
sc 149 dev/mii/qsphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 150 dev/mii/qsphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 151 dev/mii/qsphy.c mii_phy_add_media(sc);
sc 155 dev/mii/qsphy.c qsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 160 dev/mii/qsphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 168 dev/mii/qsphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 177 dev/mii/qsphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 178 dev/mii/qsphy.c reg = PHY_READ(sc, MII_BMCR);
sc 179 dev/mii/qsphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 189 dev/mii/qsphy.c mii_phy_setmedia(sc);
sc 196 dev/mii/qsphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 199 dev/mii/qsphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 204 dev/mii/qsphy.c mii_phy_down(sc);
sc 209 dev/mii/qsphy.c mii_phy_status(sc);
sc 212 dev/mii/qsphy.c mii_phy_update(sc, cmd);
sc 217 dev/mii/qsphy.c qsphy_status(struct mii_softc *sc)
sc 219 dev/mii/qsphy.c struct mii_data *mii = sc->mii_pdata;
sc 226 dev/mii/qsphy.c bmsr = PHY_READ(sc, MII_BMSR) |
sc 227 dev/mii/qsphy.c PHY_READ(sc, MII_BMSR);
sc 231 dev/mii/qsphy.c bmcr = PHY_READ(sc, MII_BMCR);
sc 247 dev/mii/qsphy.c pctl = PHY_READ(sc, MII_QSPHY_PCTL) |
sc 248 dev/mii/qsphy.c PHY_READ(sc, MII_QSPHY_PCTL);
sc 275 dev/mii/qsphy.c qsphy_reset(struct mii_softc *sc)
sc 277 dev/mii/qsphy.c mii_phy_reset(sc);
sc 278 dev/mii/qsphy.c PHY_WRITE(sc, MII_QSPHY_IMASK, 0);
sc 118 dev/mii/rgephy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 126 dev/mii/rgephy.c sc->mii_inst = mii->mii_instance;
sc 127 dev/mii/rgephy.c sc->mii_phy = ma->mii_phyno;
sc 128 dev/mii/rgephy.c sc->mii_funcs = &rgephy_funcs;
sc 129 dev/mii/rgephy.c sc->mii_pdata = mii;
sc 130 dev/mii/rgephy.c sc->mii_flags = ma->mii_flags;
sc 131 dev/mii/rgephy.c sc->mii_anegticks = MII_ANEGTICKS_GIGE;
sc 133 dev/mii/rgephy.c sc->mii_flags |= MIIF_NOISOLATE;
sc 135 dev/mii/rgephy.c sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 137 dev/mii/rgephy.c if (sc->mii_capabilities & BMSR_EXTSTAT)
sc 138 dev/mii/rgephy.c sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
sc 139 dev/mii/rgephy.c if ((sc->mii_capabilities & BMSR_MEDIAMASK) ||
sc 140 dev/mii/rgephy.c (sc->mii_extcapabilities & EXTSR_MEDIAMASK))
sc 141 dev/mii/rgephy.c mii_phy_add_media(sc);
sc 143 dev/mii/rgephy.c PHY_RESET(sc);
sc 147 dev/mii/rgephy.c rgephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 157 dev/mii/rgephy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 166 dev/mii/rgephy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 167 dev/mii/rgephy.c reg = PHY_READ(sc, MII_BMCR);
sc 168 dev/mii/rgephy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 178 dev/mii/rgephy.c PHY_RESET(sc); /* XXX hardware bug work-around */
sc 180 dev/mii/rgephy.c anar = PHY_READ(sc, RGEPHY_MII_ANAR);
sc 186 dev/mii/rgephy.c (void) rgephy_mii_phy_auto(sc);
sc 199 dev/mii/rgephy.c rgephy_loop(sc);
sc 216 dev/mii/rgephy.c PHY_WRITE(sc, RGEPHY_MII_1000CTL, gig);
sc 217 dev/mii/rgephy.c PHY_WRITE(sc, RGEPHY_MII_BMCR, speed |
sc 219 dev/mii/rgephy.c PHY_WRITE(sc, RGEPHY_MII_ANAR, anar);
sc 223 dev/mii/rgephy.c PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
sc 236 dev/mii/rgephy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 256 dev/mii/rgephy.c reg = PHY_READ(sc, RL_GMEDIASTAT);
sc 263 dev/mii/rgephy.c if (++sc->mii_ticks <= sc->mii_anegticks)
sc 266 dev/mii/rgephy.c sc->mii_ticks = 0;
sc 267 dev/mii/rgephy.c rgephy_mii_phy_auto(sc);
sc 272 dev/mii/rgephy.c mii_phy_status(sc);
sc 279 dev/mii/rgephy.c if (sc->mii_media_active != mii->mii_media_active ||
sc 280 dev/mii/rgephy.c sc->mii_media_status != mii->mii_media_status ||
sc 282 dev/mii/rgephy.c rgephy_load_dspcode(sc);
sc 285 dev/mii/rgephy.c mii_phy_update(sc, cmd);
sc 291 dev/mii/rgephy.c rgephy_status(struct mii_softc *sc)
sc 293 dev/mii/rgephy.c struct mii_data *mii = sc->mii_pdata;
sc 299 dev/mii/rgephy.c bmsr = PHY_READ(sc, RL_GMEDIASTAT);
sc 303 dev/mii/rgephy.c bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);
sc 305 dev/mii/rgephy.c bmcr = PHY_READ(sc, RGEPHY_MII_BMCR);
sc 318 dev/mii/rgephy.c bmsr = PHY_READ(sc, RL_GMEDIASTAT);
sc 327 dev/mii/rgephy.c mii->mii_media_active |= mii_phy_flowstatus(sc) | IFM_FDX;
sc 331 dev/mii/rgephy.c gtsr = PHY_READ(sc, RGEPHY_MII_1000STS);
sc 339 dev/mii/rgephy.c rgephy_mii_phy_auto(struct mii_softc *sc)
sc 343 dev/mii/rgephy.c rgephy_loop(sc);
sc 344 dev/mii/rgephy.c PHY_RESET(sc);
sc 346 dev/mii/rgephy.c anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
sc 347 dev/mii/rgephy.c if (sc->mii_flags & MIIF_DOPAUSE)
sc 350 dev/mii/rgephy.c PHY_WRITE(sc, RGEPHY_MII_ANAR, anar);
sc 352 dev/mii/rgephy.c PHY_WRITE(sc, RGEPHY_MII_1000CTL,
sc 355 dev/mii/rgephy.c PHY_WRITE(sc, RGEPHY_MII_BMCR,
sc 363 dev/mii/rgephy.c rgephy_loop(struct mii_softc *sc)
sc 368 dev/mii/rgephy.c PHY_WRITE(sc, RGEPHY_MII_BMCR, RGEPHY_BMCR_PDOWN);
sc 372 dev/mii/rgephy.c bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);
sc 392 dev/mii/rgephy.c rgephy_load_dspcode(struct mii_softc *sc)
sc 397 dev/mii/rgephy.c id2 = PHY_READ(sc, MII_PHYIDR2);
sc 401 dev/mii/rgephy.c PHY_WRITE(sc, 31, 0x0001);
sc 402 dev/mii/rgephy.c PHY_WRITE(sc, 21, 0x1000);
sc 403 dev/mii/rgephy.c PHY_WRITE(sc, 24, 0x65C7);
sc 404 dev/mii/rgephy.c PHY_CLRBIT(sc, 4, 0x0800);
sc 405 dev/mii/rgephy.c val = PHY_READ(sc, 4) & 0xFFF;
sc 406 dev/mii/rgephy.c PHY_WRITE(sc, 4, val);
sc 407 dev/mii/rgephy.c PHY_WRITE(sc, 3, 0x00A1);
sc 408 dev/mii/rgephy.c PHY_WRITE(sc, 2, 0x0008);
sc 409 dev/mii/rgephy.c PHY_WRITE(sc, 1, 0x1020);
sc 410 dev/mii/rgephy.c PHY_WRITE(sc, 0, 0x1000);
sc 411 dev/mii/rgephy.c PHY_SETBIT(sc, 4, 0x0800);
sc 412 dev/mii/rgephy.c PHY_CLRBIT(sc, 4, 0x0800);
sc 413 dev/mii/rgephy.c val = (PHY_READ(sc, 4) & 0xFFF) | 0x7000;
sc 414 dev/mii/rgephy.c PHY_WRITE(sc, 4, val);
sc 415 dev/mii/rgephy.c PHY_WRITE(sc, 3, 0xFF41);
sc 416 dev/mii/rgephy.c PHY_WRITE(sc, 2, 0xDE60);
sc 417 dev/mii/rgephy.c PHY_WRITE(sc, 1, 0x0140);
sc 418 dev/mii/rgephy.c PHY_WRITE(sc, 0, 0x0077);
sc 419 dev/mii/rgephy.c val = (PHY_READ(sc, 4) & 0xFFF) | 0xA000;
sc 420 dev/mii/rgephy.c PHY_WRITE(sc, 4, val);
sc 421 dev/mii/rgephy.c PHY_WRITE(sc, 3, 0xDF01);
sc 422 dev/mii/rgephy.c PHY_WRITE(sc, 2, 0xDF20);
sc 423 dev/mii/rgephy.c PHY_WRITE(sc, 1, 0xFF95);
sc 424 dev/mii/rgephy.c PHY_WRITE(sc, 0, 0xFA00);
sc 425 dev/mii/rgephy.c val = (PHY_READ(sc, 4) & 0xFFF) | 0xB000;
sc 426 dev/mii/rgephy.c PHY_WRITE(sc, 4, val);
sc 427 dev/mii/rgephy.c PHY_WRITE(sc, 3, 0xFF41);
sc 428 dev/mii/rgephy.c PHY_WRITE(sc, 2, 0xDE20);
sc 429 dev/mii/rgephy.c PHY_WRITE(sc, 1, 0x0140);
sc 430 dev/mii/rgephy.c PHY_WRITE(sc, 0, 0x00BB);
sc 431 dev/mii/rgephy.c val = (PHY_READ(sc, 4) & 0xFFF) | 0xF000;
sc 432 dev/mii/rgephy.c PHY_WRITE(sc, 4, val);
sc 433 dev/mii/rgephy.c PHY_WRITE(sc, 3, 0xDF01);
sc 434 dev/mii/rgephy.c PHY_WRITE(sc, 2, 0xDF20);
sc 435 dev/mii/rgephy.c PHY_WRITE(sc, 1, 0xFF95);
sc 436 dev/mii/rgephy.c PHY_WRITE(sc, 0, 0xBF00);
sc 437 dev/mii/rgephy.c PHY_SETBIT(sc, 4, 0x0800);
sc 438 dev/mii/rgephy.c PHY_CLRBIT(sc, 4, 0x0800);
sc 439 dev/mii/rgephy.c PHY_WRITE(sc, 31, 0x0000);
sc 445 dev/mii/rgephy.c rgephy_reset(struct mii_softc *sc)
sc 447 dev/mii/rgephy.c mii_phy_reset(sc);
sc 449 dev/mii/rgephy.c rgephy_load_dspcode(sc);
sc 111 dev/mii/rlphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 123 dev/mii/rlphy.c sc->mii_inst = mii->mii_instance;
sc 124 dev/mii/rlphy.c sc->mii_phy = ma->mii_phyno;
sc 125 dev/mii/rlphy.c sc->mii_funcs = &rlphy_funcs;
sc 126 dev/mii/rlphy.c sc->mii_pdata = mii;
sc 127 dev/mii/rlphy.c sc->mii_flags = ma->mii_flags;
sc 129 dev/mii/rlphy.c sc->mii_flags |= MIIF_NOISOLATE;
sc 131 dev/mii/rlphy.c PHY_RESET(sc);
sc 133 dev/mii/rlphy.c sc->mii_capabilities =
sc 134 dev/mii/rlphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 135 dev/mii/rlphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 136 dev/mii/rlphy.c mii_phy_add_media(sc);
sc 140 dev/mii/rlphy.c rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 144 dev/mii/rlphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 150 dev/mii/rlphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 169 dev/mii/rlphy.c if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN)
sc 171 dev/mii/rlphy.c (void) mii_phy_auto(sc, 0);
sc 182 dev/mii/rlphy.c PHY_WRITE(sc, MII_ANAR,
sc 184 dev/mii/rlphy.c PHY_WRITE(sc, MII_BMCR, ife->ifm_data);
sc 208 dev/mii/rlphy.c mii_phy_down(sc);
sc 213 dev/mii/rlphy.c mii_phy_status(sc);
sc 216 dev/mii/rlphy.c mii_phy_update(sc, cmd);
sc 221 dev/mii/rlphy.c rlphy_status(struct mii_softc *sc)
sc 223 dev/mii/rlphy.c struct mii_data *mii = sc->mii_pdata;
sc 228 dev/mii/rlphy.c devname = sc->mii_dev.dv_parent->dv_cfdata->cf_driver->cd_name;
sc 233 dev/mii/rlphy.c bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
sc 237 dev/mii/rlphy.c bmcr = PHY_READ(sc, MII_BMCR);
sc 259 dev/mii/rlphy.c if ((anlpar = PHY_READ(sc, MII_ANAR) &
sc 260 dev/mii/rlphy.c PHY_READ(sc, MII_ANLPAR))) {
sc 305 dev/mii/rlphy.c if (PHY_READ(sc, RL_MEDIASTAT) & RL_MEDIASTAT_SPEED10)
sc 310 dev/mii/rlphy.c if (PHY_READ(sc, 0x0019) & 0x01)
sc 136 dev/mii/sqphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 144 dev/mii/sqphy.c sc->mii_inst = mii->mii_instance;
sc 145 dev/mii/sqphy.c sc->mii_phy = ma->mii_phyno;
sc 146 dev/mii/sqphy.c sc->mii_funcs = &sqphy_funcs;
sc 147 dev/mii/sqphy.c sc->mii_pdata = mii;
sc 148 dev/mii/sqphy.c sc->mii_flags = ma->mii_flags;
sc 150 dev/mii/sqphy.c PHY_RESET(sc);
sc 152 dev/mii/sqphy.c sc->mii_capabilities =
sc 153 dev/mii/sqphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 154 dev/mii/sqphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 155 dev/mii/sqphy.c mii_phy_add_media(sc);
sc 159 dev/mii/sqphy.c sqphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 164 dev/mii/sqphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 172 dev/mii/sqphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 181 dev/mii/sqphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 182 dev/mii/sqphy.c reg = PHY_READ(sc, MII_BMCR);
sc 183 dev/mii/sqphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 193 dev/mii/sqphy.c mii_phy_setmedia(sc);
sc 200 dev/mii/sqphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 203 dev/mii/sqphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 208 dev/mii/sqphy.c mii_phy_down(sc);
sc 213 dev/mii/sqphy.c mii_phy_status(sc);
sc 216 dev/mii/sqphy.c mii_phy_update(sc, cmd);
sc 221 dev/mii/sqphy.c sqphy_status(struct mii_softc *sc)
sc 223 dev/mii/sqphy.c struct mii_data *mii = sc->mii_pdata;
sc 230 dev/mii/sqphy.c bmsr = PHY_READ(sc, MII_BMSR) |
sc 231 dev/mii/sqphy.c PHY_READ(sc, MII_BMSR);
sc 235 dev/mii/sqphy.c bmcr = PHY_READ(sc, MII_BMCR);
sc 256 dev/mii/sqphy.c status = PHY_READ(sc, MII_SQPHY_STATUS);
sc 148 dev/mii/tlphy.c struct tlphy_softc *sc = (struct tlphy_softc *)self;
sc 157 dev/mii/tlphy.c sc->sc_mii.mii_inst = mii->mii_instance;
sc 158 dev/mii/tlphy.c sc->sc_mii.mii_phy = ma->mii_phyno;
sc 159 dev/mii/tlphy.c sc->sc_mii.mii_funcs = &tlphy_funcs;
sc 160 dev/mii/tlphy.c sc->sc_mii.mii_pdata = mii;
sc 161 dev/mii/tlphy.c sc->sc_mii.mii_flags = ma->mii_flags;
sc 163 dev/mii/tlphy.c sc->sc_mii.mii_flags &= ~MIIF_NOISOLATE;
sc 164 dev/mii/tlphy.c PHY_RESET(&sc->sc_mii);
sc 165 dev/mii/tlphy.c sc->sc_mii.mii_flags |= MIIF_NOISOLATE;
sc 174 dev/mii/tlphy.c sc->sc_tlphycap = tlsc->tl_product->tp_tlphymedia;
sc 175 dev/mii/tlphy.c if ((sc->sc_tlphycap & TLPHY_MEDIA_NO_10_T) == 0)
sc 176 dev/mii/tlphy.c sc->sc_mii.mii_capabilities =
sc 177 dev/mii/tlphy.c PHY_READ(&sc->sc_mii, MII_BMSR) & ma->mii_capmask;
sc 179 dev/mii/tlphy.c sc->sc_mii.mii_capabilities = 0;
sc 182 dev/mii/tlphy.c if (sc->sc_tlphycap & TLPHY_MEDIA_10_2)
sc 184 dev/mii/tlphy.c IFM_10_2, 0, sc->sc_mii.mii_inst), 0, NULL);
sc 185 dev/mii/tlphy.c if (sc->sc_tlphycap & TLPHY_MEDIA_10_5)
sc 187 dev/mii/tlphy.c IFM_10_5, 0, sc->sc_mii.mii_inst), 0, NULL);
sc 188 dev/mii/tlphy.c if (sc->sc_mii.mii_capabilities & BMSR_MEDIAMASK)
sc 189 dev/mii/tlphy.c mii_phy_add_media(&sc->sc_mii);
sc 195 dev/mii/tlphy.c struct tlphy_softc *sc = (struct tlphy_softc *)self;
sc 199 dev/mii/tlphy.c if ((sc->sc_mii.mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 202 dev/mii/tlphy.c if ((sc->sc_mii.mii_flags & MIIF_DOINGAUTO) == 0 && sc->sc_need_acomp)
sc 203 dev/mii/tlphy.c tlphy_acomp(sc);
sc 210 dev/mii/tlphy.c if (IFM_INST(ife->ifm_media) != sc->sc_mii.mii_inst)
sc 219 dev/mii/tlphy.c if (IFM_INST(ife->ifm_media) != sc->sc_mii.mii_inst) {
sc 220 dev/mii/tlphy.c reg = PHY_READ(&sc->sc_mii, MII_BMCR);
sc 221 dev/mii/tlphy.c PHY_WRITE(&sc->sc_mii, MII_BMCR, reg | BMCR_ISO);
sc 238 dev/mii/tlphy.c (void) tlphy_mii_phy_auto(sc, 1);
sc 242 dev/mii/tlphy.c PHY_WRITE(&sc->sc_mii, MII_BMCR, 0);
sc 243 dev/mii/tlphy.c PHY_WRITE(&sc->sc_mii, MII_TLPHY_CTRL, CTRL_AUISEL);
sc 247 dev/mii/tlphy.c PHY_WRITE(&sc->sc_mii, MII_TLPHY_CTRL, 0);
sc 249 dev/mii/tlphy.c mii_phy_setmedia(&sc->sc_mii);
sc 261 dev/mii/tlphy.c if (IFM_INST(ife->ifm_media) != sc->sc_mii.mii_inst)
sc 264 dev/mii/tlphy.c if (mii_phy_tick(&sc->sc_mii) == EJUSTRETURN)
sc 269 dev/mii/tlphy.c mii_phy_down(&sc->sc_mii);
sc 274 dev/mii/tlphy.c mii_phy_status(&sc->sc_mii);
sc 277 dev/mii/tlphy.c mii_phy_update(&sc->sc_mii, cmd);
sc 284 dev/mii/tlphy.c struct tlphy_softc *sc = (void *) physc;
sc 285 dev/mii/tlphy.c struct mii_data *mii = sc->sc_mii.mii_pdata;
sc 291 dev/mii/tlphy.c bmcr = PHY_READ(&sc->sc_mii, MII_BMCR);
sc 298 dev/mii/tlphy.c tlctrl = PHY_READ(&sc->sc_mii, MII_TLPHY_CTRL);
sc 305 dev/mii/tlphy.c bmsr = PHY_READ(&sc->sc_mii, MII_BMSR) |
sc 306 dev/mii/tlphy.c PHY_READ(&sc->sc_mii, MII_BMSR);
sc 327 dev/mii/tlphy.c tlphy_mii_phy_auto(struct tlphy_softc *sc, int waitfor)
sc 331 dev/mii/tlphy.c switch ((error = mii_phy_auto(&sc->sc_mii, waitfor))) {
sc 337 dev/mii/tlphy.c PHY_WRITE(&sc->sc_mii, MII_BMCR, 0);
sc 342 dev/mii/tlphy.c sc->sc_need_acomp = 1;
sc 346 dev/mii/tlphy.c tlphy_acomp(sc);
sc 353 dev/mii/tlphy.c tlphy_acomp(struct tlphy_softc *sc)
sc 357 dev/mii/tlphy.c sc->sc_need_acomp = 0;
sc 365 dev/mii/tlphy.c aner = PHY_READ(&sc->sc_mii, MII_ANER);
sc 367 dev/mii/tlphy.c anlpar = PHY_READ(&sc->sc_mii, MII_ANLPAR) &
sc 368 dev/mii/tlphy.c PHY_READ(&sc->sc_mii, MII_ANAR);
sc 370 dev/mii/tlphy.c PHY_WRITE(&sc->sc_mii, MII_BMCR, BMCR_FDX);
sc 374 dev/mii/tlphy.c PHY_WRITE(&sc->sc_mii, MII_BMCR, 0);
sc 133 dev/mii/tqphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 141 dev/mii/tqphy.c sc->mii_inst = mii->mii_instance;
sc 142 dev/mii/tqphy.c sc->mii_phy = ma->mii_phyno;
sc 143 dev/mii/tqphy.c sc->mii_funcs = &tqphy_funcs;
sc 144 dev/mii/tqphy.c sc->mii_pdata = mii;
sc 145 dev/mii/tqphy.c sc->mii_flags = ma->mii_flags;
sc 150 dev/mii/tqphy.c sc->mii_flags |= MIIF_NOLOOP;
sc 152 dev/mii/tqphy.c PHY_RESET(sc);
sc 154 dev/mii/tqphy.c sc->mii_capabilities =
sc 155 dev/mii/tqphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 156 dev/mii/tqphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 157 dev/mii/tqphy.c mii_phy_add_media(sc);
sc 161 dev/mii/tqphy.c tqphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 166 dev/mii/tqphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 174 dev/mii/tqphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 183 dev/mii/tqphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 184 dev/mii/tqphy.c reg = PHY_READ(sc, MII_BMCR);
sc 185 dev/mii/tqphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 195 dev/mii/tqphy.c mii_phy_setmedia(sc);
sc 202 dev/mii/tqphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 205 dev/mii/tqphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 210 dev/mii/tqphy.c mii_phy_down(sc);
sc 215 dev/mii/tqphy.c mii_phy_status(sc);
sc 218 dev/mii/tqphy.c mii_phy_update(sc, cmd);
sc 223 dev/mii/tqphy.c tqphy_status(struct mii_softc *sc)
sc 225 dev/mii/tqphy.c struct mii_data *mii = sc->mii_pdata;
sc 232 dev/mii/tqphy.c bmsr = PHY_READ(sc, MII_BMSR) |
sc 233 dev/mii/tqphy.c PHY_READ(sc, MII_BMSR);
sc 237 dev/mii/tqphy.c bmcr = PHY_READ(sc, MII_BMCR);
sc 253 dev/mii/tqphy.c diag = PHY_READ(sc, MII_TQPHY_DIAG);
sc 87 dev/mii/txphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 95 dev/mii/txphy.c sc->mii_inst = mii->mii_instance;
sc 96 dev/mii/txphy.c sc->mii_phy = ma->mii_phyno;
sc 97 dev/mii/txphy.c sc->mii_funcs = &txphy_funcs;
sc 98 dev/mii/txphy.c sc->mii_pdata = mii;
sc 99 dev/mii/txphy.c sc->mii_flags = ma->mii_flags;
sc 101 dev/mii/txphy.c PHY_RESET(sc);
sc 103 dev/mii/txphy.c sc->mii_capabilities =
sc 104 dev/mii/txphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 105 dev/mii/txphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 106 dev/mii/txphy.c mii_phy_add_media(sc);
sc 110 dev/mii/txphy.c txphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 114 dev/mii/txphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 120 dev/mii/txphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 134 dev/mii/txphy.c mii_phy_setmedia(sc);
sc 138 dev/mii/txphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 143 dev/mii/txphy.c mii_phy_down(sc);
sc 148 dev/mii/txphy.c mii_phy_status(sc);
sc 151 dev/mii/txphy.c mii_phy_update(sc, cmd);
sc 118 dev/mii/ukphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 127 dev/mii/ukphy.c sc->mii_inst = mii->mii_instance;
sc 128 dev/mii/ukphy.c sc->mii_phy = ma->mii_phyno;
sc 129 dev/mii/ukphy.c sc->mii_funcs = &ukphy_funcs;
sc 130 dev/mii/ukphy.c sc->mii_pdata = mii;
sc 131 dev/mii/ukphy.c sc->mii_flags = ma->mii_flags;
sc 136 dev/mii/ukphy.c sc->mii_flags |= MIIF_NOLOOP;
sc 138 dev/mii/ukphy.c PHY_RESET(sc);
sc 140 dev/mii/ukphy.c sc->mii_capabilities =
sc 141 dev/mii/ukphy.c PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 142 dev/mii/ukphy.c if (sc->mii_capabilities & BMSR_EXTSTAT)
sc 143 dev/mii/ukphy.c sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
sc 144 dev/mii/ukphy.c if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0 &&
sc 145 dev/mii/ukphy.c (sc->mii_extcapabilities & EXTSR_MEDIAMASK) == 0)
sc 146 dev/mii/ukphy.c printf("%s: no media present\n", sc->mii_dev.dv_xname);
sc 148 dev/mii/ukphy.c mii_phy_add_media(sc);
sc 152 dev/mii/ukphy.c ukphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 157 dev/mii/ukphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 165 dev/mii/ukphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 174 dev/mii/ukphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 175 dev/mii/ukphy.c reg = PHY_READ(sc, MII_BMCR);
sc 176 dev/mii/ukphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 186 dev/mii/ukphy.c mii_phy_setmedia(sc);
sc 193 dev/mii/ukphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 196 dev/mii/ukphy.c if (mii_phy_tick(sc) == EJUSTRETURN)
sc 201 dev/mii/ukphy.c mii_phy_down(sc);
sc 206 dev/mii/ukphy.c mii_phy_status(sc);
sc 209 dev/mii/ukphy.c mii_phy_update(sc, cmd);
sc 104 dev/mii/urlphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 110 dev/mii/urlphy.c DPRINTF(("%s: %s: enter\n", sc->mii_dev.dv_xname, __func__));
sc 112 dev/mii/urlphy.c sc->mii_inst = mii->mii_instance;
sc 113 dev/mii/urlphy.c sc->mii_phy = ma->mii_phyno;
sc 114 dev/mii/urlphy.c sc->mii_funcs = &urlphy_funcs;
sc 115 dev/mii/urlphy.c sc->mii_pdata = mii;
sc 116 dev/mii/urlphy.c sc->mii_flags = ma->mii_flags;
sc 117 dev/mii/urlphy.c sc->mii_anegticks = MII_ANEGTICKS_GIGE;
sc 120 dev/mii/urlphy.c sc->mii_flags |= MIIF_NOLOOP;
sc 122 dev/mii/urlphy.c sc->mii_flags |= MIIF_NOISOLATE;
sc 126 dev/mii/urlphy.c sc->mii_dev.dv_xname);
sc 129 dev/mii/urlphy.c PHY_RESET(sc);
sc 131 dev/mii/urlphy.c sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
sc 132 dev/mii/urlphy.c if (sc->mii_capabilities & BMSR_MEDIAMASK)
sc 133 dev/mii/urlphy.c mii_phy_add_media(sc);
sc 137 dev/mii/urlphy.c urlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 142 dev/mii/urlphy.c DPRINTF(("%s: %s: enter\n", sc->mii_dev.dv_xname, __func__));
sc 144 dev/mii/urlphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 152 dev/mii/urlphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 160 dev/mii/urlphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 167 dev/mii/urlphy.c mii_phy_setmedia(sc);
sc 174 dev/mii/urlphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 191 dev/mii/urlphy.c reg = PHY_READ(sc, URLPHY_MSR) | PHY_READ(sc, URLPHY_MSR);
sc 198 dev/mii/urlphy.c if (++sc->mii_ticks <= sc->mii_anegticks)
sc 201 dev/mii/urlphy.c sc->mii_ticks = 0;
sc 202 dev/mii/urlphy.c PHY_RESET(sc);
sc 204 dev/mii/urlphy.c if (mii_phy_auto(sc, 0) == EJUSTRETURN)
sc 210 dev/mii/urlphy.c mii_phy_down(sc);
sc 215 dev/mii/urlphy.c mii_phy_status(sc);
sc 218 dev/mii/urlphy.c mii_phy_update(sc, cmd);
sc 224 dev/mii/urlphy.c urlphy_status(struct mii_softc *sc)
sc 226 dev/mii/urlphy.c struct mii_data *mii = sc->mii_pdata;
sc 230 dev/mii/urlphy.c DPRINTF(("%s: %s: enter\n", sc->mii_dev.dv_xname, __func__));
sc 239 dev/mii/urlphy.c msr = PHY_READ(sc, URLPHY_MSR) | PHY_READ(sc, URLPHY_MSR);
sc 243 dev/mii/urlphy.c DPRINTF(("%s: %s: link %s\n", sc->mii_dev.dv_xname, __func__,
sc 246 dev/mii/urlphy.c bmcr = PHY_READ(sc, MII_BMCR);
sc 248 dev/mii/urlphy.c bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
sc 104 dev/mii/xmphy.c struct mii_softc *sc = (struct mii_softc *)self;
sc 112 dev/mii/xmphy.c sc->mii_inst = mii->mii_instance;
sc 113 dev/mii/xmphy.c sc->mii_phy = ma->mii_phyno;
sc 114 dev/mii/xmphy.c sc->mii_funcs = &xmphy_funcs;
sc 115 dev/mii/xmphy.c sc->mii_pdata = mii;
sc 116 dev/mii/xmphy.c sc->mii_flags = ma->mii_flags;
sc 117 dev/mii/xmphy.c sc->mii_anegticks = MII_ANEGTICKS;
sc 119 dev/mii/xmphy.c sc->mii_flags |= MIIF_NOISOLATE;
sc 123 dev/mii/xmphy.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
sc 126 dev/mii/xmphy.c PHY_RESET(sc);
sc 128 dev/mii/xmphy.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0, sc->mii_inst),
sc 130 dev/mii/xmphy.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, sc->mii_inst), 0);
sc 131 dev/mii/xmphy.c ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0);
sc 137 dev/mii/xmphy.c xmphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
sc 142 dev/mii/xmphy.c if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
sc 150 dev/mii/xmphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 159 dev/mii/xmphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
sc 160 dev/mii/xmphy.c reg = PHY_READ(sc, MII_BMCR);
sc 161 dev/mii/xmphy.c PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
sc 173 dev/mii/xmphy.c (void) xmphy_mii_phy_auto(sc);
sc 176 dev/mii/xmphy.c PHY_RESET(sc);
sc 178 dev/mii/xmphy.c PHY_WRITE(sc, XMPHY_MII_ANAR, XMPHY_ANAR_FDX);
sc 179 dev/mii/xmphy.c PHY_WRITE(sc, XMPHY_MII_BMCR, XMPHY_BMCR_FDX);
sc 181 dev/mii/xmphy.c PHY_WRITE(sc, XMPHY_MII_ANAR, XMPHY_ANAR_HDX);
sc 182 dev/mii/xmphy.c PHY_WRITE(sc, XMPHY_MII_BMCR, 0);
sc 197 dev/mii/xmphy.c if (IFM_INST(ife->ifm_media) != sc->mii_inst)
sc 217 dev/mii/xmphy.c reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
sc 224 dev/mii/xmphy.c if (++sc->mii_ticks <= sc->mii_anegticks)
sc 227 dev/mii/xmphy.c sc->mii_ticks = 0;
sc 228 dev/mii/xmphy.c PHY_RESET(sc);
sc 230 dev/mii/xmphy.c xmphy_mii_phy_auto(sc);
sc 235 dev/mii/xmphy.c mii_phy_status(sc);
sc 238 dev/mii/xmphy.c mii_phy_update(sc, cmd);
sc 243 dev/mii/xmphy.c xmphy_status(struct mii_softc *sc)
sc 245 dev/mii/xmphy.c struct mii_data *mii = sc->mii_pdata;
sc 251 dev/mii/xmphy.c bmsr = PHY_READ(sc, XMPHY_MII_BMSR) |
sc 252 dev/mii/xmphy.c PHY_READ(sc, XMPHY_MII_BMSR);
sc 257 dev/mii/xmphy.c bmcr = PHY_READ(sc, XMPHY_MII_EXTSTS);
sc 259 dev/mii/xmphy.c bmcr = PHY_READ(sc, XMPHY_MII_BMCR);
sc 277 dev/mii/xmphy.c anlpar = PHY_READ(sc, XMPHY_MII_ANAR) &
sc 278 dev/mii/xmphy.c PHY_READ(sc, XMPHY_MII_ANLPAR);
sc 297 dev/mii/xmphy.c xmphy_mii_phy_auto(struct mii_softc *sc)
sc 301 dev/mii/xmphy.c anar = PHY_READ(sc, XMPHY_MII_ANAR);
sc 303 dev/mii/xmphy.c PHY_WRITE(sc, XMPHY_MII_ANAR, anar);
sc 305 dev/mii/xmphy.c PHY_WRITE(sc, XMPHY_MII_BMCR,
sc 97 dev/onewire/onewire.c struct onewire_softc *sc = (struct onewire_softc *)self;
sc 100 dev/onewire/onewire.c sc->sc_bus = oba->oba_bus;
sc 101 dev/onewire/onewire.c rw_init(&sc->sc_lock, sc->sc_dev.dv_xname);
sc 102 dev/onewire/onewire.c TAILQ_INIT(&sc->sc_devs);
sc 106 dev/onewire/onewire.c kthread_create_deferred(onewire_createthread, sc);
sc 112 dev/onewire/onewire.c struct onewire_softc *sc = (struct onewire_softc *)self;
sc 114 dev/onewire/onewire.c sc->sc_dying = 1;
sc 115 dev/onewire/onewire.c if (sc->sc_thread != NULL) {
sc 116 dev/onewire/onewire.c wakeup(sc->sc_thread);
sc 117 dev/onewire/onewire.c tsleep(&sc->sc_dying, PWAIT, "owdt", 0);
sc 126 dev/onewire/onewire.c struct onewire_softc *sc = (struct onewire_softc *)self;
sc 132 dev/onewire/onewire.c sc->sc_dying = 1;
sc 173 dev/onewire/onewire.c struct onewire_softc *sc = arg;
sc 179 dev/onewire/onewire.c return (rw_enter(&sc->sc_lock, lflags));
sc 185 dev/onewire/onewire.c struct onewire_softc *sc = arg;
sc 187 dev/onewire/onewire.c rw_exit(&sc->sc_lock);
sc 193 dev/onewire/onewire.c struct onewire_softc *sc = arg;
sc 194 dev/onewire/onewire.c struct onewire_bus *bus = sc->sc_bus;
sc 202 dev/onewire/onewire.c struct onewire_softc *sc = arg;
sc 203 dev/onewire/onewire.c struct onewire_bus *bus = sc->sc_bus;
sc 211 dev/onewire/onewire.c struct onewire_softc *sc = arg;
sc 212 dev/onewire/onewire.c struct onewire_bus *bus = sc->sc_bus;
sc 228 dev/onewire/onewire.c struct onewire_softc *sc = arg;
sc 229 dev/onewire/onewire.c struct onewire_bus *bus = sc->sc_bus;
sc 242 dev/onewire/onewire.c struct onewire_softc *sc = arg;
sc 243 dev/onewire/onewire.c struct onewire_bus *bus = sc->sc_bus;
sc 256 dev/onewire/onewire.c struct onewire_softc *sc = arg;
sc 257 dev/onewire/onewire.c struct onewire_bus *bus = sc->sc_bus;
sc 270 dev/onewire/onewire.c struct onewire_softc *sc = arg;
sc 271 dev/onewire/onewire.c struct onewire_bus *bus = sc->sc_bus;
sc 298 dev/onewire/onewire.c struct onewire_softc *sc = arg;
sc 299 dev/onewire/onewire.c struct onewire_bus *bus = sc->sc_bus;
sc 313 dev/onewire/onewire.c struct onewire_softc *sc = arg;
sc 314 dev/onewire/onewire.c struct onewire_bus *bus = sc->sc_bus;
sc 324 dev/onewire/onewire.c tsleep(sc, PWAIT, "owscan", hz / 10);
sc 334 dev/onewire/onewire.c onewire_lock(sc, 0);
sc 335 dev/onewire/onewire.c onewire_reset(sc);
sc 336 dev/onewire/onewire.c onewire_write_byte(sc, ONEWIRE_CMD_SEARCH_ROM);
sc 343 dev/onewire/onewire.c rv = onewire_triplet(sc, dir);
sc 359 dev/onewire/onewire.c sc->sc_dev.dv_xname, rv, i));
sc 360 dev/onewire/onewire.c onewire_unlock(sc);
sc 365 dev/onewire/onewire.c onewire_unlock(sc);
sc 392 dev/onewire/onewire.c struct onewire_softc *sc = arg;
sc 394 dev/onewire/onewire.c while (!sc->sc_dying) {
sc 395 dev/onewire/onewire.c onewire_scan(sc);
sc 396 dev/onewire/onewire.c tsleep(sc->sc_thread, PWAIT, "owidle", ONEWIRE_SCANTIME * hz);
sc 399 dev/onewire/onewire.c sc->sc_thread = NULL;
sc 400 dev/onewire/onewire.c wakeup(&sc->sc_dying);
sc 407 dev/onewire/onewire.c struct onewire_softc *sc = arg;
sc 409 dev/onewire/onewire.c if (kthread_create(onewire_thread, sc, &sc->sc_thread,
sc 410 dev/onewire/onewire.c "%s", sc->sc_dev.dv_xname) != 0)
sc 412 dev/onewire/onewire.c sc->sc_dev.dv_xname);
sc 416 dev/onewire/onewire.c onewire_scan(struct onewire_softc *sc)
sc 430 dev/onewire/onewire.c TAILQ_FOREACH(d, &sc->sc_devs, d_list)
sc 437 dev/onewire/onewire.c onewire_lock(sc, 0);
sc 438 dev/onewire/onewire.c rv = onewire_reset(sc);
sc 439 dev/onewire/onewire.c onewire_unlock(sc);
sc 441 dev/onewire/onewire.c DPRINTF(("%s: no presence pulse\n", sc->sc_dev.dv_xname));
sc 446 dev/onewire/onewire.c if ((rv = onewire_search(sc, sc->sc_rombuf, ONEWIRE_MAXDEVS, 0)) == -1)
sc 450 dev/onewire/onewire.c rom = sc->sc_rombuf[i];
sc 457 dev/onewire/onewire.c TAILQ_FOREACH(d, &sc->sc_devs, d_list) {
sc 466 dev/onewire/onewire.c oa.oa_onewire = sc;
sc 468 dev/onewire/onewire.c if ((dev = config_found(&sc->sc_dev, &oa,
sc 479 dev/onewire/onewire.c TAILQ_INSERT_TAIL(&sc->sc_devs, nd, d_list);
sc 485 dev/onewire/onewire.c for (d = TAILQ_FIRST(&sc->sc_devs);
sc 486 dev/onewire/onewire.c d != TAILQ_END(&sc->sc_dev); d = next) {
sc 490 dev/onewire/onewire.c TAILQ_REMOVE(&sc->sc_devs, d, d_list);
sc 77 dev/onewire/owid.c struct owid_softc *sc = (struct owid_softc *)self;
sc 80 dev/onewire/owid.c sc->sc_onewire = oa->oa_onewire;
sc 81 dev/onewire/owid.c sc->sc_rom = oa->oa_rom;
sc 84 dev/onewire/owid.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 85 dev/onewire/owid.c sizeof(sc->sc_sensordev.xname));
sc 86 dev/onewire/owid.c sc->sc_sensor.type = SENSOR_INTEGER;
sc 87 dev/onewire/owid.c sc->sc_sensor.value = ONEWIRE_ROM_SN(sc->sc_rom);
sc 88 dev/onewire/owid.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor);
sc 89 dev/onewire/owid.c sensordev_install(&sc->sc_sensordev);
sc 97 dev/onewire/owid.c struct owid_softc *sc = (struct owid_softc *)self;
sc 99 dev/onewire/owid.c sensordev_deinstall(&sc->sc_sensordev);
sc 107 dev/onewire/owid.c struct owid_softc *sc = (struct owid_softc *)self;
sc 113 dev/onewire/owid.c sc->sc_dying = 1;
sc 110 dev/onewire/owsbm.c struct owsbm_softc *sc = (struct owsbm_softc *)self;
sc 113 dev/onewire/owsbm.c sc->sc_onewire = oa->oa_onewire;
sc 114 dev/onewire/owsbm.c sc->sc_rom = oa->oa_rom;
sc 117 dev/onewire/owsbm.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 118 dev/onewire/owsbm.c sizeof(sc->sc_sensordev.xname));
sc 119 dev/onewire/owsbm.c sc->sc_temp.type = SENSOR_TEMP;
sc 120 dev/onewire/owsbm.c sensor_attach(&sc->sc_sensordev, &sc->sc_temp);
sc 123 dev/onewire/owsbm.c sc->sc_voltage_vdd.type = SENSOR_VOLTS_DC;
sc 124 dev/onewire/owsbm.c strlcpy(sc->sc_voltage_vdd.desc, "VDD", sizeof(sc->sc_voltage_vdd.desc));
sc 125 dev/onewire/owsbm.c sensor_attach(&sc->sc_sensordev, &sc->sc_voltage_vdd);
sc 128 dev/onewire/owsbm.c sc->sc_voltage_vad.type = SENSOR_VOLTS_DC;
sc 129 dev/onewire/owsbm.c strlcpy(sc->sc_voltage_vad.desc, "VAD", sizeof(sc->sc_voltage_vad.desc));
sc 130 dev/onewire/owsbm.c sensor_attach(&sc->sc_sensordev, &sc->sc_voltage_vad);
sc 133 dev/onewire/owsbm.c sc->sc_voltage_cr.type = SENSOR_VOLTS_DC;
sc 134 dev/onewire/owsbm.c strlcpy(sc->sc_voltage_cr.desc, "CR", sizeof(sc->sc_voltage_cr.desc));
sc 135 dev/onewire/owsbm.c sensor_attach(&sc->sc_sensordev, &sc->sc_voltage_cr);
sc 137 dev/onewire/owsbm.c sc->sc_sensortask = sensor_task_register(sc, owsbm_update, 10);
sc 138 dev/onewire/owsbm.c if (sc->sc_sensortask == NULL) {
sc 143 dev/onewire/owsbm.c sensordev_install(&sc->sc_sensordev);
sc 145 dev/onewire/owsbm.c rw_init(&sc->sc_lock, sc->sc_dev.dv_xname);
sc 152 dev/onewire/owsbm.c struct owsbm_softc *sc = (struct owsbm_softc *)self;
sc 154 dev/onewire/owsbm.c rw_enter_write(&sc->sc_lock);
sc 155 dev/onewire/owsbm.c sensordev_deinstall(&sc->sc_sensordev);
sc 156 dev/onewire/owsbm.c if (sc->sc_sensortask != NULL)
sc 157 dev/onewire/owsbm.c sensor_task_unregister(sc->sc_sensortask);
sc 158 dev/onewire/owsbm.c rw_exit_write(&sc->sc_lock);
sc 172 dev/onewire/owsbm.c struct owsbm_softc *sc = arg;
sc 175 dev/onewire/owsbm.c rw_enter_write(&sc->sc_lock);
sc 176 dev/onewire/owsbm.c onewire_lock(sc->sc_onewire, 0);
sc 177 dev/onewire/owsbm.c if (onewire_reset(sc->sc_onewire) != 0)
sc 180 dev/onewire/owsbm.c onewire_matchrom(sc->sc_onewire, sc->sc_rom);
sc 181 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, DSSBM_CMD_CONVERT_T);
sc 182 dev/onewire/owsbm.c if (onewire_reset(sc->sc_onewire) != 0)
sc 185 dev/onewire/owsbm.c onewire_matchrom(sc->sc_onewire, sc->sc_rom);
sc 186 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, DSSBM_CMD_CONVERT_V);
sc 187 dev/onewire/owsbm.c if (onewire_reset(sc->sc_onewire) != 0)
sc 190 dev/onewire/owsbm.c onewire_matchrom(sc->sc_onewire, sc->sc_rom);
sc 192 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, DSSBM_CMD_RECALL_MEMORY);
sc 193 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, 0);
sc 195 dev/onewire/owsbm.c if (onewire_reset(sc->sc_onewire) != 0)
sc 198 dev/onewire/owsbm.c onewire_matchrom(sc->sc_onewire, sc->sc_rom);
sc 200 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, DSSBM_CMD_READ_SCRATCHPAD);
sc 201 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, 0);
sc 202 dev/onewire/owsbm.c onewire_read_block(sc->sc_onewire, data, 9);
sc 204 dev/onewire/owsbm.c sc->sc_temp.value = 273150000 +
sc 207 dev/onewire/owsbm.c sc->sc_voltage_vdd.value =
sc 211 dev/onewire/owsbm.c sc->sc_voltage_cr.value =
sc 218 dev/onewire/owsbm.c if (onewire_reset(sc->sc_onewire) != 0)
sc 221 dev/onewire/owsbm.c onewire_matchrom(sc->sc_onewire, sc->sc_rom);
sc 222 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, DSSBM_CMD_WRITE_SCRATCHPAD);
sc 223 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, 0);
sc 224 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, 0x7); /* AD = 0 */
sc 226 dev/onewire/owsbm.c if (onewire_reset(sc->sc_onewire) != 0)
sc 229 dev/onewire/owsbm.c onewire_matchrom(sc->sc_onewire, sc->sc_rom);
sc 230 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, DSSBM_CMD_CONVERT_V);
sc 231 dev/onewire/owsbm.c if (onewire_reset(sc->sc_onewire) != 0)
sc 234 dev/onewire/owsbm.c onewire_matchrom(sc->sc_onewire, sc->sc_rom);
sc 236 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, DSSBM_CMD_RECALL_MEMORY);
sc 237 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, 0);
sc 239 dev/onewire/owsbm.c if (onewire_reset(sc->sc_onewire) != 0)
sc 242 dev/onewire/owsbm.c onewire_matchrom(sc->sc_onewire, sc->sc_rom);
sc 243 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, DSSBM_CMD_READ_SCRATCHPAD);
sc 244 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, 0);
sc 245 dev/onewire/owsbm.c onewire_read_block(sc->sc_onewire, data, 9);
sc 247 dev/onewire/owsbm.c sc->sc_voltage_vad.value =
sc 254 dev/onewire/owsbm.c if (onewire_reset(sc->sc_onewire) != 0)
sc 257 dev/onewire/owsbm.c onewire_matchrom(sc->sc_onewire, sc->sc_rom);
sc 258 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, DSSBM_CMD_WRITE_SCRATCHPAD);
sc 259 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, 0);
sc 260 dev/onewire/owsbm.c onewire_write_byte(sc->sc_onewire, 0xf); /* AD = 1 */
sc 261 dev/onewire/owsbm.c onewire_reset(sc->sc_onewire);
sc 264 dev/onewire/owsbm.c onewire_unlock(sc->sc_onewire);
sc 265 dev/onewire/owsbm.c rw_exit_write(&sc->sc_lock);
sc 93 dev/onewire/owtemp.c struct owtemp_softc *sc = (struct owtemp_softc *)self;
sc 96 dev/onewire/owtemp.c sc->sc_onewire = oa->oa_onewire;
sc 97 dev/onewire/owtemp.c sc->sc_rom = oa->oa_rom;
sc 100 dev/onewire/owtemp.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 101 dev/onewire/owtemp.c sizeof(sc->sc_sensordev.xname));
sc 102 dev/onewire/owtemp.c sc->sc_sensor.type = SENSOR_TEMP;
sc 104 dev/onewire/owtemp.c sc->sc_sensortask = sensor_task_register(sc, owtemp_update, 5);
sc 105 dev/onewire/owtemp.c if (sc->sc_sensortask == NULL) {
sc 109 dev/onewire/owtemp.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor);
sc 110 dev/onewire/owtemp.c sensordev_install(&sc->sc_sensordev);
sc 112 dev/onewire/owtemp.c rw_init(&sc->sc_lock, sc->sc_dev.dv_xname);
sc 119 dev/onewire/owtemp.c struct owtemp_softc *sc = (struct owtemp_softc *)self;
sc 121 dev/onewire/owtemp.c rw_enter_write(&sc->sc_lock);
sc 122 dev/onewire/owtemp.c sensordev_deinstall(&sc->sc_sensordev);
sc 123 dev/onewire/owtemp.c if (sc->sc_sensortask != NULL)
sc 124 dev/onewire/owtemp.c sensor_task_unregister(sc->sc_sensortask);
sc 125 dev/onewire/owtemp.c rw_exit_write(&sc->sc_lock);
sc 139 dev/onewire/owtemp.c struct owtemp_softc *sc = arg;
sc 144 dev/onewire/owtemp.c rw_enter_write(&sc->sc_lock);
sc 145 dev/onewire/owtemp.c onewire_lock(sc->sc_onewire, 0);
sc 146 dev/onewire/owtemp.c if (onewire_reset(sc->sc_onewire) != 0)
sc 148 dev/onewire/owtemp.c onewire_matchrom(sc->sc_onewire, sc->sc_rom);
sc 157 dev/onewire/owtemp.c onewire_write_byte(sc->sc_onewire, DS1920_CMD_CONVERT);
sc 158 dev/onewire/owtemp.c tsleep(sc, PRIBIO, "owtemp", hz);
sc 160 dev/onewire/owtemp.c if (onewire_reset(sc->sc_onewire) != 0)
sc 162 dev/onewire/owtemp.c onewire_matchrom(sc->sc_onewire, sc->sc_rom);
sc 168 dev/onewire/owtemp.c onewire_write_byte(sc->sc_onewire, DS1920_CMD_READ_SCRATCHPAD);
sc 169 dev/onewire/owtemp.c onewire_read_block(sc->sc_onewire, data, 9);
sc 185 dev/onewire/owtemp.c sc->sc_sensor.value = 273150000 + val;
sc 189 dev/onewire/owtemp.c onewire_unlock(sc->sc_onewire);
sc 190 dev/onewire/owtemp.c rw_exit_write(&sc->sc_lock);
sc 218 dev/pci/aac_pci.c struct aac_softc *sc = (void *)self;
sc 246 dev/pci/aac_pci.c PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->aac_memt,
sc 247 dev/pci/aac_pci.c &sc->aac_memh, &membase, &memsize, AAC_REGSIZE)) {
sc 258 dev/pci/aac_pci.c sc->aac_ih = pci_intr_establish(pc, ih, IPL_BIO, aac_intr, sc,
sc 259 dev/pci/aac_pci.c sc->aac_dev.dv_xname);
sc 260 dev/pci/aac_pci.c if (sc->aac_ih == NULL) {
sc 271 dev/pci/aac_pci.c sc->aac_dmat = pa->pa_dmat;
sc 278 dev/pci/aac_pci.c sc->aac_hwif = m->hwif;
sc 279 dev/pci/aac_pci.c switch(sc->aac_hwif) {
sc 283 dev/pci/aac_pci.c sc->aac_if = aac_rx_interface;
sc 288 dev/pci/aac_pci.c sc->aac_if = aac_sa_interface;
sc 293 dev/pci/aac_pci.c sc->aac_if = aac_fa_interface;
sc 298 dev/pci/aac_pci.c sc->aac_if = aac_rkt_interface;
sc 301 dev/pci/aac_pci.c sc->aac_hwif = AAC_HWIF_UNKNOWN;
sc 308 dev/pci/aac_pci.c if (aac_attach(sc))
sc 315 dev/pci/aac_pci.c pci_intr_disestablish(pc, sc->aac_ih);
sc 317 dev/pci/aac_pci.c bus_space_unmap(sc->aac_memt, sc->aac_memh, memsize);
sc 128 dev/pci/adv_pci.c ASC_SOFTC *sc = (void *) self;
sc 136 dev/pci/adv_pci.c sc->sc_flags = 0x0;
sc 165 dev/pci/adv_pci.c &sc->sc_iot, &ioh, NULL, &advsize, 0);
sc 170 dev/pci/adv_pci.c sc->sc_ioh = ioh;
sc 171 dev/pci/adv_pci.c sc->sc_dmat = pa->pa_dmat;
sc 172 dev/pci/adv_pci.c sc->pci_device_id = pa->pa_id;
sc 173 dev/pci/adv_pci.c sc->bus_type = ASC_IS_PCI;
sc 178 dev/pci/adv_pci.c if (adv_init(sc)) {
sc 180 dev/pci/adv_pci.c bus_space_unmap(sc->sc_iot, ioh, advsize);
sc 189 dev/pci/adv_pci.c bus_space_unmap(sc->sc_iot, ioh, advsize);
sc 197 dev/pci/adv_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, adv_intr, sc,
sc 198 dev/pci/adv_pci.c sc->sc_dev.dv_xname);
sc 199 dev/pci/adv_pci.c if (sc->sc_ih == NULL) {
sc 204 dev/pci/adv_pci.c bus_space_unmap(sc->sc_iot, ioh, advsize);
sc 212 dev/pci/adv_pci.c adv_attach(sc);
sc 117 dev/pci/adw_pci.c ADW_SOFTC *sc = (void *) self;
sc 130 dev/pci/adw_pci.c sc->chip_type = ADW_CHIP_ASC3550;
sc 134 dev/pci/adw_pci.c sc->chip_type = ADW_CHIP_ASC38C0800;
sc 138 dev/pci/adw_pci.c sc->chip_type = ADW_CHIP_ASC38C1600;
sc 142 dev/pci/adw_pci.c printf("\n%s: unknown model: %d\n", sc->sc_dev.dv_xname,
sc 149 dev/pci/adw_pci.c sc->cfg.control_flag |= CONTROL_FLAG_IGNORE_PERR;
sc 157 dev/pci/adw_pci.c sc->sc_dev.dv_xname);
sc 160 dev/pci/adw_pci.c sc->sc_iot = iot;
sc 161 dev/pci/adw_pci.c sc->sc_ioh = ioh;
sc 162 dev/pci/adw_pci.c sc->sc_dmat = pa->pa_dmat;
sc 167 dev/pci/adw_pci.c if (adw_init(sc)) {
sc 168 dev/pci/adw_pci.c printf("%s: adw_init failed", sc->sc_dev.dv_xname);
sc 176 dev/pci/adw_pci.c printf("\n%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
sc 184 dev/pci/adw_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, adw_intr, sc,
sc 185 dev/pci/adw_pci.c sc->sc_dev.dv_xname);
sc 186 dev/pci/adw_pci.c if (sc->sc_ih == NULL) {
sc 187 dev/pci/adw_pci.c printf("\n%s: couldn't establish interrupt", sc->sc_dev.dv_xname);
sc 198 dev/pci/adw_pci.c adw_attach(sc);
sc 48 dev/pci/agp.c struct agp_memory *agp_find_memory(struct vga_pci_softc *sc, int id);
sc 58 dev/pci/agp.c struct vga_pci_softc *sc = (struct vga_pci_softc *)self;
sc 88 dev/pci/agp.c sc->sc_maxmem = agp_max[i][1] << 20;
sc 95 dev/pci/agp.c lockinit(&sc->sc_lock, PZERO|PCATCH, "agplk", 0, 0);
sc 97 dev/pci/agp.c TAILQ_INIT(&sc->sc_memory);
sc 99 dev/pci/agp.c sc->sc_pcitag = pa->pa_tag;
sc 100 dev/pci/agp.c sc->sc_pc = pa->pa_pc;
sc 101 dev/pci/agp.c sc->sc_id = pa->pa_id;
sc 102 dev/pci/agp.c sc->sc_dmat = pa->pa_dmat;
sc 104 dev/pci/agp.c pci_get_capability(sc->sc_pc, sc->sc_pcitag, PCI_CAP_AGP,
sc 105 dev/pci/agp.c &sc->sc_capoff, NULL);
sc 107 dev/pci/agp.c ret = (*ap->ap_attach)(sc, pa, &agp_pchb_pa);
sc 110 dev/pci/agp.c (u_long)sc->sc_apaddr,
sc 111 dev/pci/agp.c (u_long)AGP_GET_APERTURE(sc));
sc 113 dev/pci/agp.c sc->sc_chipc = NULL;
sc 123 dev/pci/agp.c struct vga_pci_softc* sc = (struct vga_pci_softc *)vs->vc_softc;
sc 125 dev/pci/agp.c if (sc->sc_apaddr) {
sc 127 dev/pci/agp.c if (off > AGP_GET_APERTURE(sc))
sc 130 dev/pci/agp.c return atop(sc->sc_apaddr + off);
sc 139 dev/pci/agp.c struct vga_pci_softc *sc = (struct vga_pci_softc *)vc->vc_softc;
sc 149 dev/pci/agp.c if (sc->sc_methods == NULL || sc->sc_chipc == NULL)
sc 154 dev/pci/agp.c if (!sc->sc_chipc)
sc 171 dev/pci/agp.c info->bridge_id = sc->sc_id;
sc 172 dev/pci/agp.c if (sc->sc_capoff != 0)
sc 173 dev/pci/agp.c info->agp_mode = pci_conf_read(sc->sc_pc, sc->sc_pcitag,
sc 174 dev/pci/agp.c AGP_STATUS + sc->sc_capoff);
sc 177 dev/pci/agp.c info->aper_base = sc->sc_apaddr;
sc 178 dev/pci/agp.c info->aper_size = AGP_GET_APERTURE(sc) >> 20;
sc 180 dev/pci/agp.c info->pg_system = sc->sc_maxmem >> AGP_PAGE_SHIFT;
sc 181 dev/pci/agp.c info->pg_used = sc->sc_allocated >> AGP_PAGE_SHIFT;
sc 185 dev/pci/agp.c if (sc->sc_state != AGP_ACQUIRE_FREE)
sc 188 dev/pci/agp.c sc->sc_state = AGP_ACQUIRE_USER;
sc 192 dev/pci/agp.c if (sc->sc_state == AGP_ACQUIRE_FREE)
sc 195 dev/pci/agp.c if (sc->sc_state != AGP_ACQUIRE_USER) {
sc 204 dev/pci/agp.c TAILQ_FOREACH(mem, &sc->sc_memory, am_link) {
sc 208 dev/pci/agp.c AGP_UNBIND_MEMORY(sc, mem);
sc 211 dev/pci/agp.c sc->sc_state = AGP_ACQUIRE_FREE;
sc 216 dev/pci/agp.c error = AGP_ENABLE(sc, setup->agp_mode);
sc 222 dev/pci/agp.c if (sc->sc_allocated + size > sc->sc_maxmem)
sc 225 dev/pci/agp.c mem = AGP_ALLOC_MEMORY(sc, alloc->type, size);
sc 235 dev/pci/agp.c mem = agp_find_memory(sc, *(int *)addr);
sc 237 dev/pci/agp.c AGP_FREE_MEMORY(sc, mem);
sc 244 dev/pci/agp.c mem = agp_find_memory(sc, bind->key);
sc 248 dev/pci/agp.c error = AGP_BIND_MEMORY(sc, mem,
sc 254 dev/pci/agp.c mem = agp_find_memory(sc, unbind->key);
sc 258 dev/pci/agp.c error = AGP_UNBIND_MEMORY(sc, mem);
sc 272 dev/pci/agp.c struct vga_pci_softc *sc = (struct vga_pci_softc *)vc->vc_softc;
sc 279 dev/pci/agp.c TAILQ_FOREACH(mem, &sc->sc_memory, am_link) {
sc 281 dev/pci/agp.c AGP_UNBIND_MEMORY(sc, mem);
sc 285 dev/pci/agp.c while (!TAILQ_EMPTY(&sc->sc_memory)) {
sc 286 dev/pci/agp.c mem = TAILQ_FIRST(&sc->sc_memory);
sc 287 dev/pci/agp.c AGP_FREE_MEMORY(sc, mem);
sc 290 dev/pci/agp.c sc->sc_state = AGP_ACQUIRE_FREE;
sc 295 dev/pci/agp.c agp_find_memory(struct vga_pci_softc *sc, int id)
sc 300 dev/pci/agp.c TAILQ_FOREACH(mem, &sc->sc_memory, am_link) {
sc 353 dev/pci/agp.c agp_map_aperture(struct vga_pci_softc *sc, u_int32_t bar, u_int32_t memtype)
sc 359 dev/pci/agp.c if (pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, bar,
sc 360 dev/pci/agp.c memtype, &sc->sc_apaddr, &sc->sc_apsize,
sc 361 dev/pci/agp.c &sc->sc_apflags) != 0)
sc 368 dev/pci/agp.c agp_alloc_gatt(struct vga_pci_softc *sc)
sc 370 dev/pci/agp.c u_int32_t apsize = AGP_GET_APERTURE(sc);
sc 381 dev/pci/agp.c if (agp_alloc_dmamem(sc->sc_dmat, entries * sizeof(u_int32_t),
sc 394 dev/pci/agp.c agp_free_gatt(struct vga_pci_softc *sc, struct agp_gatt *gatt)
sc 396 dev/pci/agp.c agp_free_dmamem(sc->sc_dmat, gatt->ag_size, gatt->ag_dmamap,
sc 402 dev/pci/agp.c agp_generic_detach(struct vga_pci_softc *sc)
sc 404 dev/pci/agp.c lockmgr(&sc->sc_lock, LK_DRAIN, NULL);
sc 410 dev/pci/agp.c agp_generic_enable(struct vga_pci_softc *sc, u_int32_t mode)
sc 416 dev/pci/agp.c if (pci_get_capability(sc->sc_pc, sc->sc_pcitag, PCI_CAP_AGP,
sc 422 dev/pci/agp.c tstatus = pci_conf_read(sc->sc_pc, sc->sc_pcitag,
sc 423 dev/pci/agp.c sc->sc_capoff + AGP_STATUS);
sc 424 dev/pci/agp.c mstatus = pci_conf_read(sc->sc_pc, sc->sc_pcitag,
sc 461 dev/pci/agp.c pci_conf_write(sc->sc_pc, sc->sc_pcitag,
sc 462 dev/pci/agp.c sc->sc_capoff + AGP_COMMAND, command);
sc 463 dev/pci/agp.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, capoff + AGP_COMMAND, command);
sc 468 dev/pci/agp.c agp_generic_alloc_memory(struct vga_pci_softc *sc, int type, vsize_t size)
sc 482 dev/pci/agp.c if (bus_dmamap_create(sc->sc_dmat, size, size / PAGE_SIZE + 1,
sc 488 dev/pci/agp.c mem->am_id = sc->sc_nextid++;
sc 490 dev/pci/agp.c TAILQ_INSERT_TAIL(&sc->sc_memory, mem, am_link);
sc 491 dev/pci/agp.c sc->sc_allocated += size;
sc 497 dev/pci/agp.c agp_generic_free_memory(struct vga_pci_softc *sc, struct agp_memory *mem)
sc 502 dev/pci/agp.c sc->sc_allocated -= mem->am_size;
sc 503 dev/pci/agp.c TAILQ_REMOVE(&sc->sc_memory, mem, am_link);
sc 504 dev/pci/agp.c bus_dmamap_destroy(sc->sc_dmat, mem->am_dmamap);
sc 510 dev/pci/agp.c agp_generic_bind_memory(struct vga_pci_softc *sc, struct agp_memory *mem,
sc 519 dev/pci/agp.c lockmgr(&sc->sc_lock, LK_EXCLUSIVE, NULL);
sc 523 dev/pci/agp.c lockmgr(&sc->sc_lock, LK_RELEASE, NULL);
sc 529 dev/pci/agp.c || offset + mem->am_size > AGP_GET_APERTURE(sc)) {
sc 532 dev/pci/agp.c lockmgr(&sc->sc_lock, LK_RELEASE, NULL);
sc 546 dev/pci/agp.c lockmgr(&sc->sc_lock, LK_RELEASE, NULL);
sc 551 dev/pci/agp.c if ((error = bus_dmamem_alloc(sc->sc_dmat, mem->am_size, PAGE_SIZE, 0,
sc 554 dev/pci/agp.c lockmgr(&sc->sc_lock, LK_RELEASE, NULL);
sc 558 dev/pci/agp.c if ((error = bus_dmamem_map(sc->sc_dmat, segs, mem->am_nseg,
sc 560 dev/pci/agp.c bus_dmamem_free(sc->sc_dmat, segs, mem->am_nseg);
sc 562 dev/pci/agp.c lockmgr(&sc->sc_lock, LK_RELEASE, NULL);
sc 566 dev/pci/agp.c if ((error = bus_dmamap_load(sc->sc_dmat, mem->am_dmamap,
sc 569 dev/pci/agp.c bus_dmamem_unmap(sc->sc_dmat, mem->am_virtual,
sc 571 dev/pci/agp.c bus_dmamem_free(sc->sc_dmat, segs, mem->am_nseg);
sc 573 dev/pci/agp.c lockmgr(&sc->sc_lock, LK_RELEASE, NULL);
sc 598 dev/pci/agp.c error = AGP_BIND_PAGE(sc, offset + done + j, pa);
sc 605 dev/pci/agp.c AGP_UNBIND_PAGE(sc, offset + k);
sc 607 dev/pci/agp.c bus_dmamap_unload(sc->sc_dmat, mem->am_dmamap);
sc 608 dev/pci/agp.c bus_dmamem_unmap(sc->sc_dmat, mem->am_virtual,
sc 610 dev/pci/agp.c bus_dmamem_free(sc->sc_dmat, mem->am_dmaseg,
sc 613 dev/pci/agp.c lockmgr(&sc->sc_lock, LK_RELEASE, NULL);
sc 630 dev/pci/agp.c AGP_FLUSH_TLB(sc);
sc 635 dev/pci/agp.c lockmgr(&sc->sc_lock, LK_RELEASE, NULL);
sc 641 dev/pci/agp.c agp_generic_unbind_memory(struct vga_pci_softc *sc, struct agp_memory *mem)
sc 645 dev/pci/agp.c lockmgr(&sc->sc_lock, LK_EXCLUSIVE, NULL);
sc 649 dev/pci/agp.c lockmgr(&sc->sc_lock, LK_RELEASE, NULL);
sc 659 dev/pci/agp.c AGP_UNBIND_PAGE(sc, mem->am_offset + i);
sc 662 dev/pci/agp.c AGP_FLUSH_TLB(sc);
sc 664 dev/pci/agp.c bus_dmamap_unload(sc->sc_dmat, mem->am_dmamap);
sc 665 dev/pci/agp.c bus_dmamem_unmap(sc->sc_dmat, mem->am_virtual, mem->am_size);
sc 666 dev/pci/agp.c bus_dmamem_free(sc->sc_dmat, mem->am_dmaseg, mem->am_nseg);
sc 673 dev/pci/agp.c lockmgr(&sc->sc_lock, LK_RELEASE, NULL);
sc 59 dev/pci/agp_ali.c int agp_ali_set_aperture(struct vga_pci_softc *sc, u_int32_t);
sc 78 dev/pci/agp_ali.c agp_ali_attach(struct vga_pci_softc *sc, struct pci_attach_args *pa,
sc 90 dev/pci/agp_ali.c sc->sc_chipc = asc;
sc 91 dev/pci/agp_ali.c sc->sc_methods = &agp_ali_methods;
sc 93 dev/pci/agp_ali.c if (agp_map_aperture(sc, AGP_APBASE, PCI_MAPREG_TYPE_MEM) != 0) {
sc 99 dev/pci/agp_ali.c asc->initial_aperture = agp_ali_get_aperture(sc);
sc 102 dev/pci/agp_ali.c gatt = agp_alloc_gatt(sc);
sc 110 dev/pci/agp_ali.c if (AGP_SET_APERTURE(sc, AGP_GET_APERTURE(sc) / 2)) {
sc 111 dev/pci/agp_ali.c agp_generic_detach(sc);
sc 119 dev/pci/agp_ali.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_ALI_ATTBASE);
sc 121 dev/pci/agp_ali.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_ALI_ATTBASE, reg);
sc 124 dev/pci/agp_ali.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_ALI_TLBCTRL);
sc 126 dev/pci/agp_ali.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_ALI_TLBCTRL, reg);
sc 133 dev/pci/agp_ali.c agp_ali_detach(struct vga_pci_softc *sc)
sc 137 dev/pci/agp_ali.c struct agp_ali_softc *asc = sc->sc_chipc;
sc 139 dev/pci/agp_ali.c error = agp_generic_detach(sc);
sc 144 dev/pci/agp_ali.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_ALI_TLBCTRL);
sc 147 dev/pci/agp_ali.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_ALI_TLBCTRL, reg);
sc 150 dev/pci/agp_ali.c AGP_SET_APERTURE(sc, asc->initial_aperture);
sc 151 dev/pci/agp_ali.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_ALI_ATTBASE);
sc 153 dev/pci/agp_ali.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_ALI_ATTBASE, reg);
sc 155 dev/pci/agp_ali.c agp_free_gatt(sc, asc->gatt);
sc 178 dev/pci/agp_ali.c agp_ali_get_aperture(struct vga_pci_softc *sc)
sc 186 dev/pci/agp_ali.c i = (int)pci_conf_read(sc->sc_pc, sc->sc_pcitag,
sc 194 dev/pci/agp_ali.c agp_ali_set_aperture(struct vga_pci_softc *sc, u_int32_t aperture)
sc 205 dev/pci/agp_ali.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_ALI_ATTBASE);
sc 208 dev/pci/agp_ali.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_ALI_ATTBASE, reg);
sc 213 dev/pci/agp_ali.c agp_ali_bind_page(struct vga_pci_softc *sc, off_t offset, bus_addr_t physical)
sc 215 dev/pci/agp_ali.c struct agp_ali_softc *asc = sc->sc_chipc;
sc 225 dev/pci/agp_ali.c agp_ali_unbind_page(struct vga_pci_softc *sc, off_t offset)
sc 227 dev/pci/agp_ali.c struct agp_ali_softc *asc = sc->sc_chipc;
sc 237 dev/pci/agp_ali.c agp_ali_flush_tlb(struct vga_pci_softc *sc)
sc 241 dev/pci/agp_ali.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_ALI_TLBCTRL);
sc 244 dev/pci/agp_ali.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_ALI_TLBCTRL, reg);
sc 247 dev/pci/agp_ali.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_ALI_TLBCTRL, reg);
sc 99 dev/pci/agp_amd.c agp_amd_alloc_gatt(struct vga_pci_softc *sc)
sc 101 dev/pci/agp_amd.c u_int32_t apsize = AGP_GET_APERTURE(sc);
sc 111 dev/pci/agp_amd.c if (agp_alloc_dmamem(sc->sc_dmat,
sc 148 dev/pci/agp_amd.c agp_amd_free_gatt(struct vga_pci_softc *sc, struct agp_amd_gatt *gatt)
sc 150 dev/pci/agp_amd.c agp_free_dmamem(sc->sc_dmat, gatt->ag_size,
sc 158 dev/pci/agp_amd.c agp_amd_attach(struct vga_pci_softc *sc, struct pci_attach_args *pa, struct pci_attach_args *pchb_pa)
sc 177 dev/pci/agp_amd.c agp_generic_detach(sc);
sc 181 dev/pci/agp_amd.c if (agp_map_aperture(sc, AGP_APBASE, PCI_MAPREG_TYPE_MEM) != 0) {
sc 183 dev/pci/agp_amd.c agp_generic_detach(sc);
sc 187 dev/pci/agp_amd.c sc->sc_methods = &agp_amd_methods;
sc 188 dev/pci/agp_amd.c sc->sc_chipc = asc;
sc 189 dev/pci/agp_amd.c asc->initial_aperture = AGP_GET_APERTURE(sc);
sc 192 dev/pci/agp_amd.c gatt = agp_amd_alloc_gatt(sc);
sc 200 dev/pci/agp_amd.c if (AGP_SET_APERTURE(sc, AGP_GET_APERTURE(sc) / 2)) {
sc 211 dev/pci/agp_amd.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_AMD751_MODECTRL);
sc 214 dev/pci/agp_amd.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_AMD751_MODECTRL, reg);
sc 218 dev/pci/agp_amd.c AGP_FLUSH_TLB(sc);
sc 225 dev/pci/agp_amd.c agp_amd_detach(struct vga_pci_softc *sc)
sc 228 dev/pci/agp_amd.c struct agp_amd_softc *asc = sc->sc_chipc;
sc 235 dev/pci/agp_amd.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_AMD751_MODECTRL);
sc 237 dev/pci/agp_amd.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_AMD751_MODECTRL, reg);
sc 243 dev/pci/agp_amd.c AGP_SET_APERTURE(sc, asc->initial_aperture);
sc 245 dev/pci/agp_amd.c agp_amd_free_gatt(sc, asc->gatt);
sc 254 dev/pci/agp_amd.c agp_amd_get_aperture(struct vga_pci_softc *sc)
sc 258 dev/pci/agp_amd.c vas = (pci_conf_read(sc->sc_pc, sc->sc_pcitag,
sc 268 dev/pci/agp_amd.c agp_amd_set_aperture(struct vga_pci_softc *sc, u_int32_t aperture)
sc 284 dev/pci/agp_amd.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_AMD751_APCTRL);
sc 286 dev/pci/agp_amd.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_AMD751_APCTRL, reg);
sc 292 dev/pci/agp_amd.c agp_amd_bind_page(struct vga_pci_softc *sc, off_t offset, bus_addr_t physical)
sc 294 dev/pci/agp_amd.c struct agp_amd_softc *asc = sc->sc_chipc;
sc 304 dev/pci/agp_amd.c agp_amd_unbind_page(struct vga_pci_softc *sc, off_t offset)
sc 306 dev/pci/agp_amd.c struct agp_amd_softc *asc = sc->sc_chipc;
sc 316 dev/pci/agp_amd.c agp_amd_flush_tlb(struct vga_pci_softc *sc)
sc 318 dev/pci/agp_amd.c struct agp_amd_softc *asc = sc->sc_chipc;
sc 110 dev/pci/agp_i810.c agp_i810_attach(struct vga_pci_softc *sc, struct pci_attach_args *pa,
sc 125 dev/pci/agp_i810.c sc->sc_chipc = isc;
sc 126 dev/pci/agp_i810.c sc->sc_methods = &agp_i810_methods;
sc 172 dev/pci/agp_i810.c error = agp_map_aperture(sc, gmaddr, memtype);
sc 191 dev/pci/agp_i810.c agp_generic_detach(sc);
sc 198 dev/pci/agp_i810.c agp_generic_detach(sc);
sc 203 dev/pci/agp_i810.c gatt->ag_entries = AGP_GET_APERTURE(sc) >> AGP_PAGE_SHIFT;
sc 214 dev/pci/agp_i810.c if (agp_alloc_dmamem(sc->sc_dmat, 64 * 1024,
sc 218 dev/pci/agp_i810.c agp_generic_detach(sc);
sc 251 dev/pci/agp_i810.c agp_generic_detach(sc);
sc 302 dev/pci/agp_i810.c agp_generic_detach(sc);
sc 373 dev/pci/agp_i810.c agp_generic_detach(sc);
sc 418 dev/pci/agp_i810.c agp_generic_detach(sc);
sc 445 dev/pci/agp_i810.c agp_i810_get_aperture(struct vga_pci_softc *sc)
sc 447 dev/pci/agp_i810.c struct agp_i810_softc *isc = sc->sc_chipc;
sc 497 dev/pci/agp_i810.c agp_i810_set_aperture(struct vga_pci_softc *sc, u_int32_t aperture)
sc 499 dev/pci/agp_i810.c struct agp_i810_softc *isc = sc->sc_chipc;
sc 594 dev/pci/agp_i810.c agp_i810_bind_page(struct vga_pci_softc *sc, off_t offset, bus_addr_t physical)
sc 596 dev/pci/agp_i810.c struct agp_i810_softc *isc = sc->sc_chipc;
sc 621 dev/pci/agp_i810.c agp_i810_unbind_page(struct vga_pci_softc *sc, off_t offset)
sc 623 dev/pci/agp_i810.c struct agp_i810_softc *isc = sc->sc_chipc;
sc 645 dev/pci/agp_i810.c agp_i810_flush_tlb(struct vga_pci_softc *sc)
sc 650 dev/pci/agp_i810.c agp_i810_enable(struct vga_pci_softc *sc, u_int32_t mode)
sc 656 dev/pci/agp_i810.c agp_i810_alloc_memory(struct vga_pci_softc *sc, int type, vsize_t size)
sc 658 dev/pci/agp_i810.c struct agp_i810_softc *isc = sc->sc_chipc;
sc 685 dev/pci/agp_i810.c mem->am_id = sc->sc_nextid++;
sc 700 dev/pci/agp_i810.c if ((error = agp_alloc_dmamem(sc->sc_dmat, size, 0,
sc 709 dev/pci/agp_i810.c if ((error = bus_dmamap_create(sc->sc_dmat, size,
sc 718 dev/pci/agp_i810.c TAILQ_INSERT_TAIL(&sc->sc_memory, mem, am_link);
sc 719 dev/pci/agp_i810.c sc->sc_allocated += size;
sc 725 dev/pci/agp_i810.c agp_i810_free_memory(struct vga_pci_softc *sc, struct agp_memory *mem)
sc 731 dev/pci/agp_i810.c agp_free_dmamem(sc->sc_dmat, mem->am_size, mem->am_dmamap,
sc 736 dev/pci/agp_i810.c sc->sc_allocated -= mem->am_size;
sc 737 dev/pci/agp_i810.c TAILQ_REMOVE(&sc->sc_memory, mem, am_link);
sc 743 dev/pci/agp_i810.c agp_i810_bind_memory(struct vga_pci_softc *sc, struct agp_memory *mem,
sc 746 dev/pci/agp_i810.c struct agp_i810_softc *isc = sc->sc_chipc;
sc 775 dev/pci/agp_i810.c return (agp_generic_bind_memory(sc, mem, offset));
sc 789 dev/pci/agp_i810.c agp_i810_unbind_memory(struct vga_pci_softc *sc, struct agp_memory *mem)
sc 791 dev/pci/agp_i810.c struct agp_i810_softc *isc = sc->sc_chipc;
sc 804 dev/pci/agp_i810.c return (agp_generic_unbind_memory(sc, mem));
sc 78 dev/pci/agp_intel.c agp_intel_attach(struct vga_pci_softc *sc, struct pci_attach_args *pa,
sc 92 dev/pci/agp_intel.c sc->sc_methods = &agp_intel_methods;
sc 93 dev/pci/agp_intel.c sc->sc_chipc = isc;
sc 95 dev/pci/agp_intel.c if (agp_map_aperture(sc, AGP_APBASE, PCI_MAPREG_TYPE_MEM) != 0) {
sc 98 dev/pci/agp_intel.c sc->sc_chipc = NULL;
sc 102 dev/pci/agp_intel.c isc->initial_aperture = AGP_GET_APERTURE(sc);
sc 105 dev/pci/agp_intel.c gatt = agp_alloc_gatt(sc);
sc 113 dev/pci/agp_intel.c if (AGP_SET_APERTURE(sc, AGP_GET_APERTURE(sc) / 2)) {
sc 114 dev/pci/agp_intel.c agp_generic_detach(sc);
sc 122 dev/pci/agp_intel.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_ATTBASE,
sc 127 dev/pci/agp_intel.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_AGPCTRL, 0x2280);
sc 128 dev/pci/agp_intel.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_NBXCFG);
sc 131 dev/pci/agp_intel.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_NBXCFG, reg);
sc 133 dev/pci/agp_intel.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_STS);
sc 136 dev/pci/agp_intel.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_STS, reg);
sc 143 dev/pci/agp_intel.c agp_intel_detach(struct vga_pci_softc *sc)
sc 147 dev/pci/agp_intel.c struct agp_intel_softc *isc = sc->sc_chipc;
sc 149 dev/pci/agp_intel.c error = agp_generic_detach(sc);
sc 153 dev/pci/agp_intel.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_NBXCFG);
sc 156 dev/pci/agp_intel.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_NBXCFG, reg);
sc 157 dev/pci/agp_intel.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_ATTBASE, 0);
sc 158 dev/pci/agp_intel.c AGP_SET_APERTURE(sc, isc->initial_aperture);
sc 159 dev/pci/agp_intel.c agp_free_gatt(sc, isc->gatt);
sc 166 dev/pci/agp_intel.c agp_intel_get_aperture(struct vga_pci_softc *sc)
sc 170 dev/pci/agp_intel.c apsize = pci_conf_read(sc->sc_pc, sc->sc_pcitag,
sc 184 dev/pci/agp_intel.c agp_intel_set_aperture(struct vga_pci_softc *sc, u_int32_t aperture)
sc 200 dev/pci/agp_intel.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_APSIZE);
sc 202 dev/pci/agp_intel.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_APSIZE, reg);
sc 208 dev/pci/agp_intel.c agp_intel_bind_page(struct vga_pci_softc *sc, off_t offset, bus_addr_t physical)
sc 210 dev/pci/agp_intel.c struct agp_intel_softc *isc = sc->sc_chipc;
sc 220 dev/pci/agp_intel.c agp_intel_unbind_page(struct vga_pci_softc *sc, off_t offset)
sc 222 dev/pci/agp_intel.c struct agp_intel_softc *isc = sc->sc_chipc;
sc 232 dev/pci/agp_intel.c agp_intel_flush_tlb(struct vga_pci_softc *sc)
sc 234 dev/pci/agp_intel.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_AGPCTRL, 0x2200);
sc 235 dev/pci/agp_intel.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_AGPCTRL, 0x2280);
sc 77 dev/pci/agp_sis.c agp_sis_attach(struct vga_pci_softc *sc, struct pci_attach_args *pa,
sc 89 dev/pci/agp_sis.c sc->sc_methods = &agp_sis_methods;
sc 90 dev/pci/agp_sis.c sc->sc_chipc = ssc;
sc 92 dev/pci/agp_sis.c if (agp_map_aperture(sc, AGP_APBASE, PCI_MAPREG_TYPE_MEM) != 0) {
sc 98 dev/pci/agp_sis.c ssc->initial_aperture = AGP_GET_APERTURE(sc);
sc 101 dev/pci/agp_sis.c gatt = agp_alloc_gatt(sc);
sc 109 dev/pci/agp_sis.c if (AGP_SET_APERTURE(sc, AGP_GET_APERTURE(sc) / 2)) {
sc 110 dev/pci/agp_sis.c agp_generic_detach(sc);
sc 118 dev/pci/agp_sis.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_SIS_ATTBASE,
sc 122 dev/pci/agp_sis.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_SIS_WINCTRL);
sc 124 dev/pci/agp_sis.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_SIS_WINCTRL, reg);
sc 131 dev/pci/agp_sis.c agp_sis_detach(struct vga_pci_softc *sc)
sc 133 dev/pci/agp_sis.c struct agp_sis_softc *ssc = sc->sc_chipc;
sc 137 dev/pci/agp_sis.c error = agp_generic_detach(sc);
sc 141 dev/pci/agp_sis.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_SIS_WINCTRL);
sc 144 dev/pci/agp_sis.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_SIS_WINCTRL, reg);
sc 147 dev/pci/agp_sis.c AGP_SET_APERTURE(sc, ssc->initial_aperture);
sc 149 dev/pci/agp_sis.c agp_free_gatt(sc, ssc->gatt);
sc 155 dev/pci/agp_sis.c agp_sis_get_aperture(struct vga_pci_softc *sc)
sc 162 dev/pci/agp_sis.c gws = (pci_conf_read(sc->sc_pc, sc->sc_pcitag,
sc 168 dev/pci/agp_sis.c agp_sis_set_aperture(struct vga_pci_softc *sc, u_int32_t aperture)
sc 184 dev/pci/agp_sis.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_SIS_WINCTRL);
sc 187 dev/pci/agp_sis.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_SIS_WINCTRL, reg);
sc 193 dev/pci/agp_sis.c agp_sis_bind_page(struct vga_pci_softc *sc, off_t offset, bus_addr_t physical)
sc 195 dev/pci/agp_sis.c struct agp_sis_softc *ssc = sc->sc_chipc;
sc 205 dev/pci/agp_sis.c agp_sis_unbind_page(struct vga_pci_softc *sc, off_t offset)
sc 207 dev/pci/agp_sis.c struct agp_sis_softc *ssc = sc->sc_chipc;
sc 217 dev/pci/agp_sis.c agp_sis_flush_tlb(struct vga_pci_softc *sc)
sc 221 dev/pci/agp_sis.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_SIS_TLBFLUSH);
sc 224 dev/pci/agp_sis.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_SIS_TLBFLUSH, reg);
sc 77 dev/pci/agp_via.c agp_via_attach(struct vga_pci_softc *sc, struct pci_attach_args *pa,
sc 89 dev/pci/agp_via.c sc->sc_chipc = asc;
sc 90 dev/pci/agp_via.c sc->sc_methods = &agp_via_methods;
sc 92 dev/pci/agp_via.c if (agp_map_aperture(sc, AGP_APBASE, PCI_MAPREG_TYPE_MEM) != 0) {
sc 98 dev/pci/agp_via.c asc->initial_aperture = AGP_GET_APERTURE(sc);
sc 101 dev/pci/agp_via.c gatt = agp_alloc_gatt(sc);
sc 109 dev/pci/agp_via.c if (AGP_SET_APERTURE(sc, AGP_GET_APERTURE(sc) / 2)) {
sc 110 dev/pci/agp_via.c agp_generic_detach(sc);
sc 118 dev/pci/agp_via.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_VIA_ATTBASE,
sc 122 dev/pci/agp_via.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_VIA_GARTCTRL, 0x0000000f);
sc 129 dev/pci/agp_via.c agp_via_detach(struct vga_pci_softc *sc)
sc 131 dev/pci/agp_via.c struct agp_via_softc *asc = sc->sc_chipc;
sc 134 dev/pci/agp_via.c error = agp_generic_detach(sc);
sc 138 dev/pci/agp_via.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_VIA_GARTCTRL, 0);
sc 139 dev/pci/agp_via.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_VIA_ATTBASE, 0);
sc 140 dev/pci/agp_via.c AGP_SET_APERTURE(sc, asc->initial_aperture);
sc 141 dev/pci/agp_via.c agp_free_gatt(sc, asc->gatt);
sc 148 dev/pci/agp_via.c agp_via_get_aperture(struct vga_pci_softc *sc)
sc 152 dev/pci/agp_via.c apsize = pci_conf_read(sc->sc_pc, sc->sc_pcitag,
sc 166 dev/pci/agp_via.c agp_via_set_aperture(struct vga_pci_softc *sc, u_int32_t aperture)
sc 182 dev/pci/agp_via.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_VIA_APSIZE);
sc 185 dev/pci/agp_via.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_VIA_APSIZE, reg);
sc 191 dev/pci/agp_via.c agp_via_bind_page(struct vga_pci_softc *sc, off_t offset, bus_addr_t physical)
sc 193 dev/pci/agp_via.c struct agp_via_softc *asc = sc->sc_chipc;
sc 203 dev/pci/agp_via.c agp_via_unbind_page(struct vga_pci_softc *sc, off_t offset)
sc 205 dev/pci/agp_via.c struct agp_via_softc *asc = sc->sc_chipc;
sc 215 dev/pci/agp_via.c agp_via_flush_tlb(struct vga_pci_softc *sc)
sc 217 dev/pci/agp_via.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_VIA_GARTCTRL, 0x8f);
sc 218 dev/pci/agp_via.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, AGP_VIA_GARTCTRL, 0x0f);
sc 62 dev/pci/agpvar.h #define AGP_GET_APERTURE(sc) ((sc)->sc_methods->get_aperture(sc))
sc 63 dev/pci/agpvar.h #define AGP_SET_APERTURE(sc,a) ((sc)->sc_methods->set_aperture((sc),(a)))
sc 64 dev/pci/agpvar.h #define AGP_BIND_PAGE(sc,o,p) ((sc)->sc_methods->bind_page((sc),(o),(p)))
sc 65 dev/pci/agpvar.h #define AGP_UNBIND_PAGE(sc,o) ((sc)->sc_methods->unbind_page((sc), (o)))
sc 66 dev/pci/agpvar.h #define AGP_FLUSH_TLB(sc) ((sc)->sc_methods->flush_tlb(sc))
sc 67 dev/pci/agpvar.h #define AGP_ENABLE(sc,m) ((sc)->sc_methods->enable((sc),(m)))
sc 68 dev/pci/agpvar.h #define AGP_ALLOC_MEMORY(sc,t,s) ((sc)->sc_methods->alloc_memory((sc),(t),(s)))
sc 69 dev/pci/agpvar.h #define AGP_FREE_MEMORY(sc,m) ((sc)->sc_methods->free_memory((sc),(m)))
sc 70 dev/pci/agpvar.h #define AGP_BIND_MEMORY(sc,m,o) ((sc)->sc_methods->bind_memory((sc),(m),(o)))
sc 71 dev/pci/agpvar.h #define AGP_UNBIND_MEMORY(sc,m) ((sc)->sc_methods->unbind_memory((sc),(m)))
sc 541 dev/pci/ahci.c ahci_vt8251_attach(struct ahci_softc *sc, struct pci_attach_args *pa)
sc 543 dev/pci/ahci.c sc->sc_flags |= AHCI_F_NO_NCQ;
sc 574 dev/pci/ahci.c struct ahci_softc *sc = (struct ahci_softc *)self;
sc 584 dev/pci/ahci.c if (ad->ad_attach(sc, pa) != 0) {
sc 596 dev/pci/ahci.c if (ahci_map_regs(sc, pa) != 0) {
sc 601 dev/pci/ahci.c if (ahci_init(sc) != 0) {
sc 606 dev/pci/ahci.c if (ahci_map_intr(sc, pa, ih) != 0) {
sc 613 dev/pci/ahci.c sc->sc_dmat = pa->pa_dmat;
sc 615 dev/pci/ahci.c cap = ahci_read(sc, AHCI_REG_CAP);
sc 616 dev/pci/ahci.c sc->sc_ncmds = AHCI_REG_CAP_NCS(cap);
sc 634 dev/pci/ahci.c DEVNAME(sc), cap, AHCI_FMT_CAP,
sc 635 dev/pci/ahci.c AHCI_REG_CAP_NP(cap), sc->sc_ncmds, gen);
sc 639 dev/pci/ahci.c pi = ahci_read(sc, AHCI_REG_PI);
sc 641 dev/pci/ahci.c DEVNAME(sc), pi);
sc 651 dev/pci/ahci.c ccc_ctl = ahci_read(sc, AHCI_REG_CCC_CTL);
sc 653 dev/pci/ahci.c ahci_write(sc, AHCI_REG_CCC_CTL, ccc_ctl);
sc 655 dev/pci/ahci.c sc->sc_ccc_mask = 1 << AHCI_REG_CCC_CTL_INT(ccc_ctl);
sc 656 dev/pci/ahci.c if (pi & sc->sc_ccc_mask) {
sc 660 dev/pci/ahci.c DEVNAME(sc), pi, sc->sc_ccc_mask);
sc 661 dev/pci/ahci.c sc->sc_ccc_mask = 0;
sc 666 dev/pci/ahci.c sc->sc_ccc_ports = pi;
sc 667 dev/pci/ahci.c sc->sc_ccc_ports_cur = 0;
sc 672 dev/pci/ahci.c ahci_write(sc, AHCI_REG_CCC_CTL, ccc_ctl);
sc 673 dev/pci/ahci.c ahci_write(sc, AHCI_REG_CCC_PORTS, 0);
sc 674 dev/pci/ahci.c ahci_write(sc, AHCI_REG_CCC_CTL, ccc_ctl | 1);
sc 684 dev/pci/ahci.c if (ahci_port_alloc(sc, i) == ENOMEM)
sc 689 dev/pci/ahci.c aaa.aaa_cookie = sc;
sc 693 dev/pci/ahci.c aaa.aaa_ncmds = sc->sc_ncmds;
sc 695 dev/pci/ahci.c if (!(sc->sc_flags & AHCI_F_NO_NCQ) && (cap & AHCI_REG_CAP_SNCQ))
sc 698 dev/pci/ahci.c sc->sc_atascsi = atascsi_attach(&sc->sc_dev, &aaa);
sc 701 dev/pci/ahci.c ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_AE | AHCI_REG_GHC_IE);
sc 707 dev/pci/ahci.c if (sc->sc_ports[i] != NULL)
sc 708 dev/pci/ahci.c ahci_port_free(sc, i);
sc 711 dev/pci/ahci.c ahci_write(sc, AHCI_REG_GHC, 0);
sc 712 dev/pci/ahci.c ahci_unmap_regs(sc, pa);
sc 717 dev/pci/ahci.c ahci_map_regs(struct ahci_softc *sc, struct pci_attach_args *pa)
sc 722 dev/pci/ahci.c if (pci_mapreg_map(pa, AHCI_PCI_BAR, maptype, 0, &sc->sc_iot,
sc 723 dev/pci/ahci.c &sc->sc_ioh, NULL, &sc->sc_ios, 0) != 0) {
sc 732 dev/pci/ahci.c ahci_unmap_regs(struct ahci_softc *sc, struct pci_attach_args *pa)
sc 734 dev/pci/ahci.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 735 dev/pci/ahci.c sc->sc_ios = 0;
sc 739 dev/pci/ahci.c ahci_map_intr(struct ahci_softc *sc, struct pci_attach_args *pa,
sc 742 dev/pci/ahci.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO,
sc 743 dev/pci/ahci.c ahci_intr, sc, DEVNAME(sc));
sc 744 dev/pci/ahci.c if (sc->sc_ih == NULL) {
sc 745 dev/pci/ahci.c printf("%s: unable to map interrupt\n", DEVNAME(sc));
sc 755 dev/pci/ahci.c ahci_unmap_intr(struct ahci_softc *sc, struct pci_attach_args *pa)
sc 757 dev/pci/ahci.c pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
sc 762 dev/pci/ahci.c ahci_init(struct ahci_softc *sc)
sc 767 dev/pci/ahci.c DPRINTF(AHCI_D_VERBOSE, " GHC 0x%b", ahci_read(sc, AHCI_REG_GHC),
sc 771 dev/pci/ahci.c cap = ahci_read(sc, AHCI_REG_CAP);
sc 774 dev/pci/ahci.c pi = ahci_read(sc, AHCI_REG_PI);
sc 776 dev/pci/ahci.c if (ISSET(AHCI_REG_GHC_AE, ahci_read(sc, AHCI_REG_GHC))) {
sc 778 dev/pci/ahci.c ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_HR);
sc 779 dev/pci/ahci.c if (ahci_wait_ne(sc, AHCI_REG_GHC, AHCI_REG_GHC_HR,
sc 787 dev/pci/ahci.c ahci_write(sc, AHCI_REG_GHC, AHCI_REG_GHC_AE);
sc 790 dev/pci/ahci.c ahci_write(sc, AHCI_REG_CAP, cap);
sc 791 dev/pci/ahci.c ahci_write(sc, AHCI_REG_PI, pi);
sc 794 dev/pci/ahci.c reg = ahci_read(sc, AHCI_REG_VS);
sc 817 dev/pci/ahci.c ahci_port_alloc(struct ahci_softc *sc, u_int port)
sc 830 dev/pci/ahci.c DEVNAME(sc), port);
sc 837 dev/pci/ahci.c DEVNAME(sc), port);
sc 839 dev/pci/ahci.c sc->sc_ports[port] = ap;
sc 841 dev/pci/ahci.c if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
sc 844 dev/pci/ahci.c DEVNAME(sc), port);
sc 848 dev/pci/ahci.c ap->ap_sc = sc;
sc 868 dev/pci/ahci.c DEVNAME(sc), r == 2 ? "CR" : "FR", port);
sc 878 dev/pci/ahci.c ap->ap_dmamem_rfis = ahci_dmamem_alloc(sc, sizeof(struct ahci_rfis));
sc 901 dev/pci/ahci.c ap->ap_ccbs = malloc(sizeof(struct ahci_ccb) * sc->sc_ncmds, M_DEVBUF,
sc 905 dev/pci/ahci.c DEVNAME(sc), port);
sc 908 dev/pci/ahci.c bzero(ap->ap_ccbs, sizeof(struct ahci_ccb) * sc->sc_ncmds);
sc 911 dev/pci/ahci.c ap->ap_dmamem_cmd_list = ahci_dmamem_alloc(sc,
sc 912 dev/pci/ahci.c sc->sc_ncmds * sizeof(struct ahci_cmd_hdr));
sc 913 dev/pci/ahci.c ap->ap_dmamem_cmd_table = ahci_dmamem_alloc(sc,
sc 914 dev/pci/ahci.c sc->sc_ncmds * sizeof(struct ahci_cmd_table));
sc 918 dev/pci/ahci.c DEVNAME(sc), port);
sc 930 dev/pci/ahci.c for (i = 0; i < sc->sc_ncmds; i++) {
sc 933 dev/pci/ahci.c if (bus_dmamap_create(sc->sc_dmat, MAXPHYS, AHCI_MAX_PRDT,
sc 937 dev/pci/ahci.c "ccb %d\n", DEVNAME(sc), port, i);
sc 971 dev/pci/ahci.c DEVNAME(sc), port);
sc 974 dev/pci/ahci.c printf("%s: PHY offline on port %d\n", DEVNAME(sc),
sc 979 dev/pci/ahci.c "on port %d\n", DEVNAME(sc), port);
sc 986 dev/pci/ahci.c "TFD: 0x%b\n", DEVNAME(sc), port,
sc 993 dev/pci/ahci.c "with device on port %d\n", DEVNAME(sc), port);
sc 1002 dev/pci/ahci.c DEVNAME(sc), port);
sc 1007 dev/pci/ahci.c "disabling\n", DEVNAME(sc), port);
sc 1013 dev/pci/ahci.c ahci_write(sc, AHCI_REG_IS, 1 << port);
sc 1020 dev/pci/ahci.c ((sc->sc_ccc_ports & (1 << port)) ? 0 : (AHCI_PREG_IE_SDBE |
sc 1029 dev/pci/ahci.c ahci_port_free(sc, port);
sc 1035 dev/pci/ahci.c ahci_port_free(struct ahci_softc *sc, u_int port)
sc 1037 dev/pci/ahci.c struct ahci_port *ap = sc->sc_ports[port];
sc 1045 dev/pci/ahci.c ahci_write(sc, AHCI_REG_IS, 1 << port);
sc 1050 dev/pci/ahci.c bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap);
sc 1055 dev/pci/ahci.c ahci_dmamem_free(sc, ap->ap_dmamem_cmd_list);
sc 1057 dev/pci/ahci.c ahci_dmamem_free(sc, ap->ap_dmamem_rfis);
sc 1059 dev/pci/ahci.c ahci_dmamem_free(sc, ap->ap_dmamem_cmd_table);
sc 1064 dev/pci/ahci.c sc->sc_ports[port] = NULL;
sc 1135 dev/pci/ahci.c struct ahci_softc *sc = ap->ap_sc;
sc 1139 dev/pci/ahci.c if (!ISSET(ahci_read(sc, AHCI_REG_CAP), AHCI_REG_CAP_SCLO))
sc 1326 dev/pci/ahci.c struct ahci_softc *sc = ap->ap_sc;
sc 1339 dev/pci/ahci.c error = bus_dmamap_load(sc->sc_dmat, dmap, xa->data, xa->datalen, NULL,
sc 1371 dev/pci/ahci.c bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize,
sc 1382 dev/pci/ahci.c struct ahci_softc *sc = ap->ap_sc;
sc 1387 dev/pci/ahci.c bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize,
sc 1391 dev/pci/ahci.c bus_dmamap_unload(sc->sc_dmat, dmap);
sc 1432 dev/pci/ahci.c struct ahci_softc *sc = ap->ap_sc;
sc 1440 dev/pci/ahci.c bus_dmamap_sync(sc->sc_dmat, AHCI_DMA_MAP(ap->ap_dmamem_cmd_list),
sc 1443 dev/pci/ahci.c bus_dmamap_sync(sc->sc_dmat, AHCI_DMA_MAP(ap->ap_dmamem_cmd_table),
sc 1448 dev/pci/ahci.c bus_dmamap_sync(sc->sc_dmat, AHCI_DMA_MAP(ap->ap_dmamem_rfis), 0,
sc 1558 dev/pci/ahci.c struct ahci_softc *sc = arg;
sc 1563 dev/pci/ahci.c is = ahci_read(sc, AHCI_REG_IS);
sc 1570 dev/pci/ahci.c if (is & sc->sc_ccc_mask) {
sc 1572 dev/pci/ahci.c DEVNAME(sc));
sc 1573 dev/pci/ahci.c is &= ~sc->sc_ccc_mask;
sc 1574 dev/pci/ahci.c is |= sc->sc_ccc_ports_cur;
sc 1581 dev/pci/ahci.c if (sc->sc_ports[port])
sc 1582 dev/pci/ahci.c ahci_port_intr(sc->sc_ports[port],
sc 1588 dev/pci/ahci.c ahci_write(sc, AHCI_REG_IS, ack);
sc 1596 dev/pci/ahci.c struct ahci_softc *sc = ap->ap_sc;
sc 1781 dev/pci/ahci.c bus_dmamap_sync(sc->sc_dmat,
sc 1786 dev/pci/ahci.c bus_dmamap_sync(sc->sc_dmat,
sc 1791 dev/pci/ahci.c bus_dmamap_sync(sc->sc_dmat,
sc 2028 dev/pci/ahci.c ahci_dmamem_alloc(struct ahci_softc *sc, size_t size)
sc 2040 dev/pci/ahci.c if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 2044 dev/pci/ahci.c if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &adm->adm_seg,
sc 2048 dev/pci/ahci.c if (bus_dmamem_map(sc->sc_dmat, &adm->adm_seg, nsegs, size,
sc 2052 dev/pci/ahci.c if (bus_dmamap_load(sc->sc_dmat, adm->adm_map, adm->adm_kva, size,
sc 2061 dev/pci/ahci.c bus_dmamem_unmap(sc->sc_dmat, adm->adm_kva, size);
sc 2063 dev/pci/ahci.c bus_dmamem_free(sc->sc_dmat, &adm->adm_seg, 1);
sc 2065 dev/pci/ahci.c bus_dmamap_destroy(sc->sc_dmat, adm->adm_map);
sc 2073 dev/pci/ahci.c ahci_dmamem_free(struct ahci_softc *sc, struct ahci_dmamem *adm)
sc 2075 dev/pci/ahci.c bus_dmamap_unload(sc->sc_dmat, adm->adm_map);
sc 2076 dev/pci/ahci.c bus_dmamem_unmap(sc->sc_dmat, adm->adm_kva, adm->adm_size);
sc 2077 dev/pci/ahci.c bus_dmamem_free(sc->sc_dmat, &adm->adm_seg, 1);
sc 2078 dev/pci/ahci.c bus_dmamap_destroy(sc->sc_dmat, adm->adm_map);
sc 2083 dev/pci/ahci.c ahci_read(struct ahci_softc *sc, bus_size_t r)
sc 2085 dev/pci/ahci.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
sc 2087 dev/pci/ahci.c return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, r));
sc 2091 dev/pci/ahci.c ahci_write(struct ahci_softc *sc, bus_size_t r, u_int32_t v)
sc 2093 dev/pci/ahci.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
sc 2094 dev/pci/ahci.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
sc 2099 dev/pci/ahci.c ahci_wait_ne(struct ahci_softc *sc, bus_size_t r, u_int32_t mask,
sc 2105 dev/pci/ahci.c if ((ahci_read(sc, r) & mask) != target)
sc 2147 dev/pci/ahci.c struct ahci_softc *sc = xsc;
sc 2148 dev/pci/ahci.c struct ahci_port *ap = sc->sc_ports[port];
sc 2164 dev/pci/ahci.c struct ahci_softc *sc = aaa_cookie;
sc 2165 dev/pci/ahci.c struct ahci_port *ap = sc->sc_ports[port];
sc 653 dev/pci/ahd_pci.c struct seeprom_config *sc;
sc 658 dev/pci/ahd_pci.c sc = ahd->seep_config;
sc 671 dev/pci/ahd_pci.c start_addr = ((2 * sizeof(*sc))
sc 688 dev/pci/ahd_pci.c start_addr = (sizeof(*sc) / 2) * (ahd->channel - 'A');
sc 690 dev/pci/ahd_pci.c error = ahd_read_seeprom(ahd, (uint16_t *)sc,
sc 691 dev/pci/ahd_pci.c start_addr, sizeof(*sc)/2,
sc 698 dev/pci/ahd_pci.c have_seeprom = ahd_verify_cksum(sc);
sc 739 dev/pci/ahd_pci.c sc_data = (uint16_t *)sc;
sc 742 dev/pci/ahd_pci.c have_seeprom = ahd_verify_cksum(sc);
sc 755 dev/pci/ahd_pci.c sc_data = (uint16_t *)sc;
sc 756 dev/pci/ahd_pci.c for (i = 0; i < (sizeof(*sc)); i += 2)
sc 771 dev/pci/ahd_pci.c error = ahd_parse_cfgdata(ahd, sc);
sc 772 dev/pci/ahd_pci.c adapter_control = sc->adapter_control;
sc 142 dev/pci/alipm.c struct alipm_softc *sc = (struct alipm_softc *) self;
sc 153 dev/pci/alipm.c sc->sc_iot = pa->pa_iot;
sc 155 dev/pci/alipm.c bus_space_map(sc->sc_iot, iobase >> 16,
sc 156 dev/pci/alipm.c iosize, 0, &sc->sc_ioh)) {
sc 175 dev/pci/alipm.c &sc->sc_iot, &sc->sc_ioh, NULL, &iosize, ALIPM_SMB_SIZE)) {
sc 214 dev/pci/alipm.c rw_init(&sc->sc_smb_lock, "alipm");
sc 215 dev/pci/alipm.c sc->sc_smb_tag.ic_cookie = sc;
sc 216 dev/pci/alipm.c sc->sc_smb_tag.ic_acquire_bus = alipm_smb_acquire_bus;
sc 217 dev/pci/alipm.c sc->sc_smb_tag.ic_release_bus = alipm_smb_release_bus;
sc 218 dev/pci/alipm.c sc->sc_smb_tag.ic_exec = alipm_smb_exec;
sc 222 dev/pci/alipm.c iba.iba_tag = &sc->sc_smb_tag;
sc 227 dev/pci/alipm.c config_found(&sc->sc_dev, &iba, iicbus_print);
sc 232 dev/pci/alipm.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
sc 238 dev/pci/alipm.c struct alipm_softc *sc = cookie;
sc 243 dev/pci/alipm.c return (rw_enter(&sc->sc_smb_lock, RW_WRITE | RW_INTR));
sc 249 dev/pci/alipm.c struct alipm_softc *sc = cookie;
sc 254 dev/pci/alipm.c rw_exit(&sc->sc_smb_lock);
sc 261 dev/pci/alipm.c struct alipm_softc *sc = cookie;
sc 267 dev/pci/alipm.c "flags 0x%x\n", sc->sc_dev.dv_xname, op, addr, cmdlen,
sc 274 dev/pci/alipm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS,
sc 277 dev/pci/alipm.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
sc 282 dev/pci/alipm.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS);
sc 283 dev/pci/alipm.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
sc 291 dev/pci/alipm.c printf("%s: timeout st 0x%b\n", sc->sc_dev.dv_xname,
sc 297 dev/pci/alipm.c printf("%s: error st 0x%b\n", sc->sc_dev.dv_xname,
sc 303 dev/pci/alipm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_TXSLVA,
sc 310 dev/pci/alipm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 317 dev/pci/alipm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 320 dev/pci/alipm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 331 dev/pci/alipm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC, ctl);
sc 334 dev/pci/alipm.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE,
sc 336 dev/pci/alipm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_START, 0xff);
sc 337 dev/pci/alipm.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE,
sc 343 dev/pci/alipm.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS);
sc 344 dev/pci/alipm.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
sc 353 dev/pci/alipm.c sc->sc_dev.dv_xname, st, ALIPM_SMB_HS_BITS);
sc 354 dev/pci/alipm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC,
sc 356 dev/pci/alipm.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE,
sc 358 dev/pci/alipm.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS);
sc 359 dev/pci/alipm.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
sc 366 dev/pci/alipm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC,
sc 368 dev/pci/alipm.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE,
sc 370 dev/pci/alipm.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS);
sc 371 dev/pci/alipm.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
sc 374 dev/pci/alipm.c printf("%s: error st 0x%b\n", sc->sc_dev.dv_xname,
sc 389 dev/pci/alipm.c b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 391 dev/pci/alipm.c bus_space_barrier(sc->sc_iot, sc->sc_ioh,
sc 395 dev/pci/alipm.c b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 397 dev/pci/alipm.c bus_space_barrier(sc->sc_iot, sc->sc_ioh,
sc 404 dev/pci/alipm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, st);
sc 138 dev/pci/amdiic.c struct amdiic_softc *sc = (struct amdiic_softc *)self;
sc 148 dev/pci/amdiic.c &sc->sc_iot, &sc->sc_ioh, NULL, &iosize, 0)) {
sc 157 dev/pci/amdiic.c sc->sc_poll = 1;
sc 165 dev/pci/amdiic.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO,
sc 166 dev/pci/amdiic.c amdiic_intr, sc, sc->sc_dev.dv_xname);
sc 167 dev/pci/amdiic.c if (sc->sc_ih != NULL) {
sc 169 dev/pci/amdiic.c sc->sc_poll = 0;
sc 172 dev/pci/amdiic.c if (sc->sc_poll)
sc 179 dev/pci/amdiic.c rw_init(&sc->sc_i2c_lock, "iiclk");
sc 180 dev/pci/amdiic.c sc->sc_i2c_tag.ic_cookie = sc;
sc 181 dev/pci/amdiic.c sc->sc_i2c_tag.ic_acquire_bus = amdiic_i2c_acquire_bus;
sc 182 dev/pci/amdiic.c sc->sc_i2c_tag.ic_release_bus = amdiic_i2c_release_bus;
sc 183 dev/pci/amdiic.c sc->sc_i2c_tag.ic_exec = amdiic_i2c_exec;
sc 187 dev/pci/amdiic.c iba.iba_tag = &sc->sc_i2c_tag;
sc 194 dev/pci/amdiic.c amdiic_read(struct amdiic_softc *sc, u_int8_t reg)
sc 196 dev/pci/amdiic.c if (amdiic_wait(sc, 0))
sc 198 dev/pci/amdiic.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMD8111_SMB_SC_CMD,
sc 200 dev/pci/amdiic.c if (amdiic_wait(sc, 0))
sc 202 dev/pci/amdiic.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMD8111_SMB_SC_DATA, reg);
sc 203 dev/pci/amdiic.c if (amdiic_wait(sc, 1))
sc 206 dev/pci/amdiic.c return (bus_space_read_1(sc->sc_iot, sc->sc_ioh, AMD8111_SMB_SC_DATA));
sc 210 dev/pci/amdiic.c amdiic_write(struct amdiic_softc *sc, u_int8_t reg, u_int8_t val)
sc 212 dev/pci/amdiic.c if (amdiic_wait(sc, 0))
sc 214 dev/pci/amdiic.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMD8111_SMB_SC_CMD,
sc 216 dev/pci/amdiic.c if (amdiic_wait(sc, 0))
sc 218 dev/pci/amdiic.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMD8111_SMB_SC_DATA, reg);
sc 219 dev/pci/amdiic.c if (amdiic_wait(sc, 0))
sc 221 dev/pci/amdiic.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMD8111_SMB_SC_DATA, val);
sc 227 dev/pci/amdiic.c amdiic_wait(struct amdiic_softc *sc, int output)
sc 233 dev/pci/amdiic.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 241 dev/pci/amdiic.c DPRINTF(("%s: %s wait timeout: st 0x%b\n", sc->sc_dev.dv_xname,
sc 250 dev/pci/amdiic.c struct amdiic_softc *sc = cookie;
sc 252 dev/pci/amdiic.c if (cold || sc->sc_poll || (flags & I2C_F_POLL))
sc 255 dev/pci/amdiic.c return (rw_enter(&sc->sc_i2c_lock, RW_WRITE | RW_INTR));
sc 261 dev/pci/amdiic.c struct amdiic_softc *sc = cookie;
sc 263 dev/pci/amdiic.c if (cold || sc->sc_poll || (flags & I2C_F_POLL))
sc 266 dev/pci/amdiic.c rw_exit(&sc->sc_i2c_lock);
sc 273 dev/pci/amdiic.c struct amdiic_softc *sc = cookie;
sc 279 dev/pci/amdiic.c "flags 0x%02x\n", sc->sc_dev.dv_xname, op, addr,
sc 282 dev/pci/amdiic.c if (cold || sc->sc_poll)
sc 289 dev/pci/amdiic.c sc->sc_i2c_xfer.op = op;
sc 290 dev/pci/amdiic.c sc->sc_i2c_xfer.buf = buf;
sc 291 dev/pci/amdiic.c sc->sc_i2c_xfer.len = len;
sc 292 dev/pci/amdiic.c sc->sc_i2c_xfer.flags = flags;
sc 293 dev/pci/amdiic.c sc->sc_i2c_xfer.error = 0;
sc 296 dev/pci/amdiic.c if (amdiic_write(sc, AMD8111_SMB_ADDR,
sc 303 dev/pci/amdiic.c if (amdiic_write(sc, AMD8111_SMB_CMD, b[0]) == -1)
sc 310 dev/pci/amdiic.c if (amdiic_write(sc, AMD8111_SMB_DATA(0), b[0]) == -1)
sc 313 dev/pci/amdiic.c if (amdiic_write(sc, AMD8111_SMB_DATA(1), b[1]) == -1)
sc 330 dev/pci/amdiic.c amdiic_write(sc, AMD8111_SMB_PROTO, proto);
sc 336 dev/pci/amdiic.c st = amdiic_read(sc, AMD8111_SMB_STAT);
sc 344 dev/pci/amdiic.c sc->sc_dev.dv_xname, op, addr, cmdlen, len, flags);
sc 347 dev/pci/amdiic.c amdiic_intr(sc);
sc 350 dev/pci/amdiic.c if (tsleep(sc, PRIBIO, "iicexec", AMDIIC_TIMEOUT * hz))
sc 354 dev/pci/amdiic.c if (sc->sc_i2c_xfer.error)
sc 363 dev/pci/amdiic.c struct amdiic_softc *sc = arg;
sc 369 dev/pci/amdiic.c if ((st = amdiic_read(sc, AMD8111_SMB_STAT)) == -1)
sc 375 dev/pci/amdiic.c DPRINTF(("%s: intr: st 0x%02x\n", sc->sc_dev.dv_xname, st));
sc 379 dev/pci/amdiic.c sc->sc_i2c_xfer.error = 1;
sc 384 dev/pci/amdiic.c if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op))
sc 388 dev/pci/amdiic.c b = sc->sc_i2c_xfer.buf;
sc 389 dev/pci/amdiic.c len = sc->sc_i2c_xfer.len;
sc 391 dev/pci/amdiic.c b[0] = amdiic_read(sc, AMD8111_SMB_DATA(0));
sc 393 dev/pci/amdiic.c b[1] = amdiic_read(sc, AMD8111_SMB_DATA(1));
sc 397 dev/pci/amdiic.c if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0)
sc 398 dev/pci/amdiic.c wakeup(sc);
sc 224 dev/pci/amdpm.c struct amdpm_softc *sc = (struct amdpm_softc *) self;
sc 230 dev/pci/amdpm.c sc->sc_pc = pa->pa_pc;
sc 231 dev/pci/amdpm.c sc->sc_tag = pa->pa_tag;
sc 232 dev/pci/amdpm.c sc->sc_iot = pa->pa_iot;
sc 233 dev/pci/amdpm.c sc->sc_poll = 1; /* XXX */
sc 245 dev/pci/amdpm.c bus_space_map(sc->sc_iot, AMDPM_PMBASE(reg), AMDPM_PMSIZE,
sc 246 dev/pci/amdpm.c 0, &sc->sc_ioh)) {
sc 250 dev/pci/amdpm.c if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, AMDPM_SMB_REGS,
sc 251 dev/pci/amdpm.c AMDPM_SMB_SIZE, &sc->sc_i2c_ioh)) {
sc 264 dev/pci/amdpm.c amdpm_timecounter.tc_priv = sc;
sc 280 dev/pci/amdpm.c (void) bus_space_read_4(sc->sc_iot, sc->sc_ioh,
sc 283 dev/pci/amdpm.c if (bus_space_read_1(sc->sc_iot,
sc 284 dev/pci/amdpm.c sc->sc_ioh, AMDPM_RNGSTAT) &
sc 289 dev/pci/amdpm.c if (bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 292 dev/pci/amdpm.c timeout_set(&sc->sc_rnd_ch,
sc 293 dev/pci/amdpm.c amdpm_rnd_callout, sc);
sc 294 dev/pci/amdpm.c amdpm_rnd_callout(sc);
sc 301 dev/pci/amdpm.c bus_space_map(sc->sc_iot, AMDPM_PMBASE(reg), AMDPM_SMB_SIZE, 0,
sc 302 dev/pci/amdpm.c &sc->sc_i2c_ioh)) {
sc 310 dev/pci/amdpm.c rw_init(&sc->sc_i2c_lock, "iiclk");
sc 311 dev/pci/amdpm.c sc->sc_i2c_tag.ic_cookie = sc;
sc 312 dev/pci/amdpm.c sc->sc_i2c_tag.ic_acquire_bus = amdpm_i2c_acquire_bus;
sc 313 dev/pci/amdpm.c sc->sc_i2c_tag.ic_release_bus = amdpm_i2c_release_bus;
sc 314 dev/pci/amdpm.c sc->sc_i2c_tag.ic_exec = amdpm_i2c_exec;
sc 318 dev/pci/amdpm.c iba.iba_tag = &sc->sc_i2c_tag;
sc 325 dev/pci/amdpm.c struct amdpm_softc *sc = v;
sc 328 dev/pci/amdpm.c if ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, AMDPM_RNGSTAT) &
sc 330 dev/pci/amdpm.c reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, AMDPM_RNGDATA);
sc 333 dev/pci/amdpm.c timeout_add(&sc->sc_rnd_ch, 1);
sc 340 dev/pci/amdpm.c struct amdpm_softc *sc = tc->tc_priv;
sc 346 dev/pci/amdpm.c u2 = bus_space_read_4(sc->sc_iot, sc->sc_ioh, AMDPM_TMR);
sc 348 dev/pci/amdpm.c u3 = bus_space_read_4(sc->sc_iot, sc->sc_ioh, AMDPM_TMR);
sc 352 dev/pci/amdpm.c u3 = bus_space_read_4(sc->sc_iot, sc->sc_ioh, AMDPM_TMR);
sc 362 dev/pci/amdpm.c struct amdpm_softc *sc = cookie;
sc 364 dev/pci/amdpm.c if (cold || sc->sc_poll || (flags & I2C_F_POLL))
sc 367 dev/pci/amdpm.c return (rw_enter(&sc->sc_i2c_lock, RW_WRITE | RW_INTR));
sc 373 dev/pci/amdpm.c struct amdpm_softc *sc = cookie;
sc 375 dev/pci/amdpm.c if (cold || sc->sc_poll || (flags & I2C_F_POLL))
sc 378 dev/pci/amdpm.c rw_exit(&sc->sc_i2c_lock);
sc 385 dev/pci/amdpm.c struct amdpm_softc *sc = cookie;
sc 391 dev/pci/amdpm.c "flags 0x%02x\n", sc->sc_dev.dv_xname, op, addr, cmdlen,
sc 396 dev/pci/amdpm.c st = bus_space_read_2(sc->sc_iot, sc->sc_i2c_ioh, AMDPM_SMBSTAT);
sc 401 dev/pci/amdpm.c DPRINTF("%s: exec: st 0x%b\n", sc->sc_dev.dv_xname, st,
sc 406 dev/pci/amdpm.c if (cold || sc->sc_poll)
sc 413 dev/pci/amdpm.c sc->sc_i2c_xfer.op = op;
sc 414 dev/pci/amdpm.c sc->sc_i2c_xfer.buf = buf;
sc 415 dev/pci/amdpm.c sc->sc_i2c_xfer.len = len;
sc 416 dev/pci/amdpm.c sc->sc_i2c_xfer.flags = flags;
sc 417 dev/pci/amdpm.c sc->sc_i2c_xfer.error = 0;
sc 420 dev/pci/amdpm.c bus_space_write_2(sc->sc_iot, sc->sc_i2c_ioh, AMDPM_SMBADDR,
sc 427 dev/pci/amdpm.c bus_space_write_1(sc->sc_iot, sc->sc_i2c_ioh, AMDPM_SMBCMD, b[0]);
sc 438 dev/pci/amdpm.c bus_space_write_2(sc->sc_iot, sc->sc_i2c_ioh,
sc 455 dev/pci/amdpm.c bus_space_write_2(sc->sc_iot, sc->sc_i2c_ioh, AMDPM_SMBCTL, ctl);
sc 461 dev/pci/amdpm.c st = bus_space_read_2(sc->sc_iot, sc->sc_i2c_ioh,
sc 469 dev/pci/amdpm.c amdpm_intr(sc);
sc 472 dev/pci/amdpm.c if (tsleep(sc, PRIBIO, "iicexec", AMDPM_SMBUS_TIMEOUT * hz))
sc 476 dev/pci/amdpm.c if (sc->sc_i2c_xfer.error)
sc 487 dev/pci/amdpm.c sc->sc_dev.dv_xname, op, addr, cmdlen, len, flags,
sc 489 dev/pci/amdpm.c bus_space_write_2(sc->sc_iot, sc->sc_i2c_ioh, AMDPM_SMBCTL,
sc 492 dev/pci/amdpm.c st = bus_space_read_2(sc->sc_iot, sc->sc_i2c_ioh, AMDPM_SMBSTAT);
sc 495 dev/pci/amdpm.c sc->sc_dev.dv_xname, st, AMDPM_SMBSTAT_BITS);
sc 496 dev/pci/amdpm.c bus_space_write_2(sc->sc_iot, sc->sc_i2c_ioh, AMDPM_SMBSTAT, st);
sc 503 dev/pci/amdpm.c struct amdpm_softc *sc = arg;
sc 509 dev/pci/amdpm.c st = bus_space_read_2(sc->sc_iot, sc->sc_i2c_ioh, AMDPM_SMBSTAT);
sc 517 dev/pci/amdpm.c DPRINTF("%s: intr: st 0x%b\n", sc->sc_dev.dv_xname, st,
sc 521 dev/pci/amdpm.c bus_space_write_2(sc->sc_iot, sc->sc_i2c_ioh, AMDPM_SMBSTAT, st);
sc 526 dev/pci/amdpm.c sc->sc_i2c_xfer.error = 1;
sc 531 dev/pci/amdpm.c if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op))
sc 535 dev/pci/amdpm.c b = sc->sc_i2c_xfer.buf;
sc 536 dev/pci/amdpm.c len = sc->sc_i2c_xfer.len;
sc 538 dev/pci/amdpm.c data = bus_space_read_2(sc->sc_iot, sc->sc_i2c_ioh,
sc 547 dev/pci/amdpm.c if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0)
sc 548 dev/pci/amdpm.c wakeup(sc);
sc 190 dev/pci/ami_pci.c struct ami_softc *sc = (struct ami_softc *)self;
sc 201 dev/pci/ami_pci.c &sc->sc_iot, &sc->sc_ioh, NULL, &size, AMI_PCI_MEMSIZE)) {
sc 207 dev/pci/ami_pci.c sc->sc_init = ami_schwartz_init;
sc 208 dev/pci/ami_pci.c sc->sc_exec = ami_schwartz_exec;
sc 209 dev/pci/ami_pci.c sc->sc_done = ami_schwartz_done;
sc 210 dev/pci/ami_pci.c sc->sc_poll = ami_schwartz_poll;
sc 212 dev/pci/ami_pci.c sc->sc_init = ami_quartz_init;
sc 213 dev/pci/ami_pci.c sc->sc_exec = ami_quartz_exec;
sc 214 dev/pci/ami_pci.c sc->sc_done = ami_quartz_done;
sc 215 dev/pci/ami_pci.c sc->sc_poll = ami_quartz_poll;
sc 216 dev/pci/ami_pci.c sc->sc_flags |= AMI_QUARTZ;
sc 218 dev/pci/ami_pci.c sc->sc_dmat = pa->pa_dmat;
sc 222 dev/pci/ami_pci.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
sc 226 dev/pci/ami_pci.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ami_intr, sc,
sc 227 dev/pci/ami_pci.c sc->sc_dev.dv_xname);
sc 228 dev/pci/ami_pci.c if (!sc->sc_ih) {
sc 233 dev/pci/ami_pci.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
sc 243 dev/pci/ami_pci.c sc->sc_flags |= ssp->flags;
sc 286 dev/pci/ami_pci.c sc->sc_flags |= AMI_BROKEN;
sc 292 dev/pci/ami_pci.c printf("%s: %s, %s", sc->sc_dev.dv_xname, model, lhc);
sc 294 dev/pci/ami_pci.c if (ami_attach(sc)) {
sc 295 dev/pci/ami_pci.c pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
sc 296 dev/pci/ami_pci.c sc->sc_ih = NULL;
sc 297 dev/pci/ami_pci.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
sc 512 dev/pci/arc.c struct arc_softc *sc = (struct arc_softc *)self;
sc 517 dev/pci/arc.c sc->sc_talking = 0;
sc 518 dev/pci/arc.c rw_init(&sc->sc_lock, "arcmsg");
sc 520 dev/pci/arc.c if (arc_map_pci_resources(sc, pa) != 0) {
sc 525 dev/pci/arc.c if (arc_query_firmware(sc) != 0) {
sc 530 dev/pci/arc.c if (arc_alloc_ccbs(sc) != 0) {
sc 535 dev/pci/arc.c sc->sc_shutdownhook = shutdownhook_establish(arc_shutdown, sc);
sc 536 dev/pci/arc.c if (sc->sc_shutdownhook == NULL)
sc 539 dev/pci/arc.c sc->sc_link.device = &arc_dev;
sc 540 dev/pci/arc.c sc->sc_link.adapter = &arc_switch;
sc 541 dev/pci/arc.c sc->sc_link.adapter_softc = sc;
sc 542 dev/pci/arc.c sc->sc_link.adapter_target = ARC_MAX_TARGET;
sc 543 dev/pci/arc.c sc->sc_link.adapter_buswidth = ARC_MAX_TARGET;
sc 544 dev/pci/arc.c sc->sc_link.openings = sc->sc_req_count / ARC_MAX_TARGET;
sc 547 dev/pci/arc.c saa.saa_sc_link = &sc->sc_link;
sc 550 dev/pci/arc.c sc->sc_scsibus = (struct scsibus_softc *)child;
sc 553 dev/pci/arc.c arc_write(sc, ARC_REG_INTRMASK,
sc 558 dev/pci/arc.c panic("%s: bioctl registration failed\n", DEVNAME(sc));
sc 566 dev/pci/arc.c if (scsi_task(arc_create_sensors, sc, NULL, 1) != 0)
sc 568 dev/pci/arc.c "scsi task", DEVNAME(sc));
sc 578 dev/pci/arc.c struct arc_softc *sc = (struct arc_softc *)self;
sc 580 dev/pci/arc.c shutdownhook_disestablish(sc->sc_shutdownhook);
sc 582 dev/pci/arc.c if (arc_msg0(sc, ARC_REG_INB_MSG0_STOP_BGRB) != 0)
sc 583 dev/pci/arc.c printf("%s: timeout waiting to stop bg rebuild\n", DEVNAME(sc));
sc 585 dev/pci/arc.c if (arc_msg0(sc, ARC_REG_INB_MSG0_FLUSH_CACHE) != 0)
sc 586 dev/pci/arc.c printf("%s: timeout waiting to flush cache\n", DEVNAME(sc));
sc 594 dev/pci/arc.c struct arc_softc *sc = xsc;
sc 596 dev/pci/arc.c if (arc_msg0(sc, ARC_REG_INB_MSG0_STOP_BGRB) != 0)
sc 597 dev/pci/arc.c printf("%s: timeout waiting to stop bg rebuild\n", DEVNAME(sc));
sc 599 dev/pci/arc.c if (arc_msg0(sc, ARC_REG_INB_MSG0_FLUSH_CACHE) != 0)
sc 600 dev/pci/arc.c printf("%s: timeout waiting to flush cache\n", DEVNAME(sc));
sc 606 dev/pci/arc.c struct arc_softc *sc = arg;
sc 608 dev/pci/arc.c char *kva = ARC_DMA_KVA(sc->sc_requests);
sc 612 dev/pci/arc.c intrstat = arc_read(sc, ARC_REG_INTRSTAT);
sc 616 dev/pci/arc.c arc_write(sc, ARC_REG_INTRSTAT, intrstat);
sc 619 dev/pci/arc.c if (sc->sc_talking) {
sc 621 dev/pci/arc.c arc_write(sc, ARC_REG_INTRMASK,
sc 623 dev/pci/arc.c wakeup(sc);
sc 626 dev/pci/arc.c reg = arc_read(sc, ARC_REG_OUTB_DOORBELL);
sc 627 dev/pci/arc.c arc_write(sc, ARC_REG_OUTB_DOORBELL, reg);
sc 629 dev/pci/arc.c arc_write(sc, ARC_REG_INB_DOORBELL,
sc 634 dev/pci/arc.c while ((reg = arc_pop(sc)) != 0xffffffff) {
sc 637 dev/pci/arc.c (u_int32_t)ARC_DMA_DVA(sc->sc_requests)));
sc 638 dev/pci/arc.c ccb = &sc->sc_ccbs[letoh32(cmd->cmd.context)];
sc 640 dev/pci/arc.c bus_dmamap_sync(sc->sc_dmat, ARC_DMA_MAP(sc->sc_requests),
sc 644 dev/pci/arc.c arc_scsi_cmd_done(sc, ccb, reg);
sc 654 dev/pci/arc.c struct arc_softc *sc = link->adapter_softc;
sc 674 dev/pci/arc.c ccb = arc_get_ccb(sc);
sc 689 dev/pci/arc.c arc_put_ccb(sc, ccb);
sc 718 dev/pci/arc.c bus_dmamap_sync(sc->sc_dmat, ARC_DMA_MAP(sc->sc_requests),
sc 723 dev/pci/arc.c arc_push(sc, reg);
sc 726 dev/pci/arc.c if (arc_complete(sc, ccb, xs->timeout) != 0) {
sc 739 dev/pci/arc.c struct arc_softc *sc = ccb->ccb_sc;
sc 749 dev/pci/arc.c error = bus_dmamap_load(sc->sc_dmat, dmap,
sc 753 dev/pci/arc.c printf("%s: error %d loading dmamap\n", DEVNAME(sc), error);
sc 766 dev/pci/arc.c bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize,
sc 774 dev/pci/arc.c arc_scsi_cmd_done(struct arc_softc *sc, struct arc_ccb *ccb, u_int32_t reg)
sc 780 dev/pci/arc.c bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap, 0,
sc 783 dev/pci/arc.c bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap);
sc 822 dev/pci/arc.c arc_put_ccb(sc, ccb);
sc 827 dev/pci/arc.c arc_complete(struct arc_softc *sc, struct arc_ccb *nccb, int timeout)
sc 830 dev/pci/arc.c char *kva = ARC_DMA_KVA(sc->sc_requests);
sc 835 dev/pci/arc.c reg = arc_pop(sc);
sc 846 dev/pci/arc.c ARC_DMA_DVA(sc->sc_requests)));
sc 847 dev/pci/arc.c ccb = &sc->sc_ccbs[letoh32(cmd->cmd.context)];
sc 849 dev/pci/arc.c bus_dmamap_sync(sc->sc_dmat, ARC_DMA_MAP(sc->sc_requests),
sc 853 dev/pci/arc.c arc_scsi_cmd_done(sc, ccb, reg);
sc 868 dev/pci/arc.c arc_map_pci_resources(struct arc_softc *sc, struct pci_attach_args *pa)
sc 874 dev/pci/arc.c sc->sc_pc = pa->pa_pc;
sc 875 dev/pci/arc.c sc->sc_tag = pa->pa_tag;
sc 876 dev/pci/arc.c sc->sc_dmat = pa->pa_dmat;
sc 878 dev/pci/arc.c memtype = pci_mapreg_type(sc->sc_pc, sc->sc_tag, ARC_PCI_BAR);
sc 879 dev/pci/arc.c if (pci_mapreg_map(pa, ARC_PCI_BAR, memtype, 0, &sc->sc_iot,
sc 880 dev/pci/arc.c &sc->sc_ioh, NULL, &sc->sc_ios, 0) != 0) {
sc 890 dev/pci/arc.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO,
sc 891 dev/pci/arc.c arc_intr, sc, DEVNAME(sc));
sc 892 dev/pci/arc.c if (sc->sc_ih == NULL) {
sc 903 dev/pci/arc.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 904 dev/pci/arc.c sc->sc_ios = 0;
sc 909 dev/pci/arc.c arc_query_firmware(struct arc_softc *sc)
sc 914 dev/pci/arc.c if (arc_wait_eq(sc, ARC_REG_OUTB_ADDR1, ARC_REG_OUTB_ADDR1_FIRMWARE_OK,
sc 916 dev/pci/arc.c printf("%s: timeout waiting for firmware ok\n", DEVNAME(sc));
sc 920 dev/pci/arc.c if (arc_msg0(sc, ARC_REG_INB_MSG0_GET_CONFIG) != 0) {
sc 921 dev/pci/arc.c printf("%s: timeout waiting for get config\n", DEVNAME(sc));
sc 925 dev/pci/arc.c arc_read_region(sc, ARC_REG_MSGBUF, &fwinfo, sizeof(fwinfo));
sc 927 dev/pci/arc.c DNPRINTF(ARC_D_INIT, "%s: signature: 0x%08x\n", DEVNAME(sc),
sc 931 dev/pci/arc.c printf("%s: invalid firmware info from iop\n", DEVNAME(sc));
sc 935 dev/pci/arc.c DNPRINTF(ARC_D_INIT, "%s: request_len: %d\n", DEVNAME(sc),
sc 937 dev/pci/arc.c DNPRINTF(ARC_D_INIT, "%s: queue_len: %d\n", DEVNAME(sc),
sc 939 dev/pci/arc.c DNPRINTF(ARC_D_INIT, "%s: sdram_size: %d\n", DEVNAME(sc),
sc 941 dev/pci/arc.c DNPRINTF(ARC_D_INIT, "%s: sata_ports: %d\n", DEVNAME(sc),
sc 946 dev/pci/arc.c DNPRINTF(ARC_D_INIT, "%s: vendor: \"%s\"\n", DEVNAME(sc), string);
sc 948 dev/pci/arc.c DNPRINTF(ARC_D_INIT, "%s: model: \"%s\"\n", DEVNAME(sc), string);
sc 952 dev/pci/arc.c DNPRINTF(ARC_D_INIT, "%s: model: \"%s\"\n", DEVNAME(sc), string);
sc 956 dev/pci/arc.c DEVNAME(sc), letoh32(fwinfo.request_len), ARC_MAX_IOCMDLEN);
sc 960 dev/pci/arc.c sc->sc_req_count = letoh32(fwinfo.queue_len);
sc 962 dev/pci/arc.c if (arc_msg0(sc, ARC_REG_INB_MSG0_START_BGRB) != 0) {
sc 964 dev/pci/arc.c DEVNAME(sc));
sc 969 dev/pci/arc.c DEVNAME(sc), letoh32(fwinfo.sata_ports),
sc 979 dev/pci/arc.c struct arc_softc *sc = (struct arc_softc *)self;
sc 984 dev/pci/arc.c error = arc_bio_inq(sc, (struct bioc_inq *)addr);
sc 988 dev/pci/arc.c error = arc_bio_vol(sc, (struct bioc_vol *)addr);
sc 992 dev/pci/arc.c error = arc_bio_disk(sc, (struct bioc_disk *)addr);
sc 996 dev/pci/arc.c error = arc_bio_alarm(sc, (struct bioc_alarm *)addr);
sc 1008 dev/pci/arc.c arc_bio_alarm(struct arc_softc *sc, struct bioc_alarm *ba)
sc 1033 dev/pci/arc.c return (arc_bio_alarm_state(sc, ba));
sc 1039 dev/pci/arc.c arc_lock(sc);
sc 1040 dev/pci/arc.c error = arc_msgbuf(sc, request, len, reply, sizeof(reply));
sc 1041 dev/pci/arc.c arc_unlock(sc);
sc 1053 dev/pci/arc.c arc_bio_alarm_state(struct arc_softc *sc, struct bioc_alarm *ba)
sc 1063 dev/pci/arc.c arc_lock(sc);
sc 1064 dev/pci/arc.c error = arc_msgbuf(sc, &request, sizeof(request),
sc 1066 dev/pci/arc.c arc_unlock(sc);
sc 1080 dev/pci/arc.c arc_bio_inq(struct arc_softc *sc, struct bioc_inq *bi)
sc 1091 dev/pci/arc.c arc_lock(sc);
sc 1094 dev/pci/arc.c error = arc_msgbuf(sc, request, 1, sysinfo,
sc 1104 dev/pci/arc.c error = arc_msgbuf(sc, request, sizeof(request), volinfo,
sc 1119 dev/pci/arc.c strlcpy(bi->bi_dev, DEVNAME(sc), sizeof(bi->bi_dev));
sc 1122 dev/pci/arc.c arc_unlock(sc);
sc 1129 dev/pci/arc.c arc_bio_getvol(struct arc_softc *sc, int vol, struct arc_fw_volinfo *volinfo)
sc 1139 dev/pci/arc.c error = arc_msgbuf(sc, request, 1, sysinfo,
sc 1149 dev/pci/arc.c error = arc_msgbuf(sc, request, sizeof(request), volinfo,
sc 1177 dev/pci/arc.c arc_bio_vol(struct arc_softc *sc, struct bioc_vol *bv)
sc 1188 dev/pci/arc.c arc_lock(sc);
sc 1189 dev/pci/arc.c error = arc_bio_getvol(sc, bv->bv_volid, volinfo);
sc 1190 dev/pci/arc.c arc_unlock(sc);
sc 1243 dev/pci/arc.c sc_link = sc->sc_scsibus->sc_link[volinfo->scsi_attr.target]
sc 1256 dev/pci/arc.c arc_bio_disk(struct arc_softc *sc, struct bioc_disk *bd)
sc 1272 dev/pci/arc.c arc_lock(sc);
sc 1274 dev/pci/arc.c error = arc_bio_getvol(sc, bd->bd_volid, volinfo);
sc 1280 dev/pci/arc.c error = arc_msgbuf(sc, request, sizeof(request), raidinfo,
sc 1305 dev/pci/arc.c error = arc_msgbuf(sc, request, sizeof(request), diskinfo,
sc 1338 dev/pci/arc.c arc_unlock(sc);
sc 1361 dev/pci/arc.c arc_msgbuf(struct arc_softc *sc, void *wptr, size_t wbuflen, void *rptr,
sc 1375 dev/pci/arc.c DEVNAME(sc), wbuflen, rbuflen);
sc 1377 dev/pci/arc.c if (arc_read(sc, ARC_REG_OUTB_DOORBELL) != 0)
sc 1386 dev/pci/arc.c DNPRINTF(ARC_D_DB, "%s: arc_msgbuf wlen: %d rlen: %d\n", DEVNAME(sc),
sc 1405 dev/pci/arc.c printf("%s: write %d:", DEVNAME(sc), rwlen);
sc 1413 dev/pci/arc.c arc_write(sc, ARC_REG_IOC_WBUF_LEN, rwlen);
sc 1414 dev/pci/arc.c arc_write_region(sc, ARC_REG_IOC_WBUF, rwbuf,
sc 1418 dev/pci/arc.c arc_write(sc, ARC_REG_INB_DOORBELL,
sc 1424 dev/pci/arc.c while ((reg = arc_read(sc, ARC_REG_OUTB_DOORBELL)) == 0)
sc 1425 dev/pci/arc.c arc_wait(sc);
sc 1426 dev/pci/arc.c arc_write(sc, ARC_REG_OUTB_DOORBELL, reg);
sc 1428 dev/pci/arc.c DNPRINTF(ARC_D_DB, "%s: reg: 0x%08x\n", DEVNAME(sc), reg);
sc 1431 dev/pci/arc.c rwlen = arc_read(sc, ARC_REG_IOC_RBUF_LEN);
sc 1434 dev/pci/arc.c DEVNAME(sc));
sc 1439 dev/pci/arc.c arc_read_region(sc, ARC_REG_IOC_RBUF, rwbuf,
sc 1442 dev/pci/arc.c arc_write(sc, ARC_REG_INB_DOORBELL,
sc 1446 dev/pci/arc.c printf("%s: len: %d+%d=%d/%d\n", DEVNAME(sc),
sc 1449 dev/pci/arc.c printf("%s: read:", DEVNAME(sc));
sc 1458 dev/pci/arc.c DEVNAME(sc));
sc 1471 dev/pci/arc.c DNPRINTF(ARC_D_DB, "%s: rbuf hdr is wrong\n", DEVNAME(sc));
sc 1479 dev/pci/arc.c DNPRINTF(ARC_D_DB, "%s: invalid cksum\n", DEVNAME(sc));
sc 1492 dev/pci/arc.c arc_lock(struct arc_softc *sc)
sc 1496 dev/pci/arc.c rw_enter_write(&sc->sc_lock);
sc 1498 dev/pci/arc.c arc_write(sc, ARC_REG_INTRMASK, ~ARC_REG_INTRMASK_POSTQUEUE);
sc 1499 dev/pci/arc.c sc->sc_talking = 1;
sc 1504 dev/pci/arc.c arc_unlock(struct arc_softc *sc)
sc 1509 dev/pci/arc.c sc->sc_talking = 0;
sc 1510 dev/pci/arc.c arc_write(sc, ARC_REG_INTRMASK,
sc 1513 dev/pci/arc.c rw_exit_write(&sc->sc_lock);
sc 1517 dev/pci/arc.c arc_wait(struct arc_softc *sc)
sc 1522 dev/pci/arc.c arc_write(sc, ARC_REG_INTRMASK,
sc 1524 dev/pci/arc.c if (tsleep(sc, PWAIT, "arcdb", hz) == EWOULDBLOCK)
sc 1525 dev/pci/arc.c arc_write(sc, ARC_REG_INTRMASK, ~ARC_REG_INTRMASK_POSTQUEUE);
sc 1533 dev/pci/arc.c struct arc_softc *sc = xsc;
sc 1542 dev/pci/arc.c tsleep(sc, PWAIT, "arcspew", 2 * hz);
sc 1545 dev/pci/arc.c if (arc_bio_inq(sc, &bi) != 0) {
sc 1547 dev/pci/arc.c DEVNAME(sc));
sc 1550 dev/pci/arc.c sc->sc_nsensors = bi.bi_novol;
sc 1552 dev/pci/arc.c sc->sc_sensors = malloc(sizeof(struct ksensor) * sc->sc_nsensors,
sc 1554 dev/pci/arc.c bzero(sc->sc_sensors, sizeof(struct ksensor) * sc->sc_nsensors);
sc 1556 dev/pci/arc.c strlcpy(sc->sc_sensordev.xname, DEVNAME(sc),
sc 1557 dev/pci/arc.c sizeof(sc->sc_sensordev.xname));
sc 1559 dev/pci/arc.c for (i = 0; i < sc->sc_nsensors; i++) {
sc 1562 dev/pci/arc.c if (arc_bio_vol(sc, &bv) != 0)
sc 1565 dev/pci/arc.c sc->sc_sensors[i].type = SENSOR_DRIVE;
sc 1566 dev/pci/arc.c sc->sc_sensors[i].status = SENSOR_S_UNKNOWN;
sc 1568 dev/pci/arc.c strlcpy(sc->sc_sensors[i].desc, bv.bv_dev,
sc 1569 dev/pci/arc.c sizeof(sc->sc_sensors[i].desc));
sc 1571 dev/pci/arc.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensors[i]);
sc 1574 dev/pci/arc.c if (sensor_task_register(sc, arc_refresh_sensors, 120) == NULL)
sc 1577 dev/pci/arc.c sensordev_install(&sc->sc_sensordev);
sc 1582 dev/pci/arc.c free(sc->sc_sensors, M_DEVBUF);
sc 1588 dev/pci/arc.c struct arc_softc *sc = arg;
sc 1592 dev/pci/arc.c for (i = 0; i < sc->sc_nsensors; i++) {
sc 1595 dev/pci/arc.c if (arc_bio_vol(sc, &bv)) {
sc 1596 dev/pci/arc.c sc->sc_sensors[i].flags = SENSOR_FINVALID;
sc 1602 dev/pci/arc.c sc->sc_sensors[i].value = SENSOR_DRIVE_FAIL;
sc 1603 dev/pci/arc.c sc->sc_sensors[i].status = SENSOR_S_CRIT;
sc 1607 dev/pci/arc.c sc->sc_sensors[i].value = SENSOR_DRIVE_PFAIL;
sc 1608 dev/pci/arc.c sc->sc_sensors[i].status = SENSOR_S_WARN;
sc 1613 dev/pci/arc.c sc->sc_sensors[i].value = SENSOR_DRIVE_ONLINE;
sc 1614 dev/pci/arc.c sc->sc_sensors[i].status = SENSOR_S_OK;
sc 1620 dev/pci/arc.c sc->sc_sensors[i].value = 0; /* unknown */
sc 1621 dev/pci/arc.c sc->sc_sensors[i].status = SENSOR_S_UNKNOWN;
sc 1630 dev/pci/arc.c arc_read(struct arc_softc *sc, bus_size_t r)
sc 1634 dev/pci/arc.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
sc 1636 dev/pci/arc.c v = bus_space_read_4(sc->sc_iot, sc->sc_ioh, r);
sc 1638 dev/pci/arc.c DNPRINTF(ARC_D_RW, "%s: arc_read 0x%x 0x%08x\n", DEVNAME(sc), r, v);
sc 1644 dev/pci/arc.c arc_read_region(struct arc_softc *sc, bus_size_t r, void *buf, size_t len)
sc 1646 dev/pci/arc.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, len,
sc 1648 dev/pci/arc.c bus_space_read_raw_region_4(sc->sc_iot, sc->sc_ioh, r, buf, len);
sc 1652 dev/pci/arc.c arc_write(struct arc_softc *sc, bus_size_t r, u_int32_t v)
sc 1654 dev/pci/arc.c DNPRINTF(ARC_D_RW, "%s: arc_write 0x%x 0x%08x\n", DEVNAME(sc), r, v);
sc 1656 dev/pci/arc.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
sc 1657 dev/pci/arc.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
sc 1662 dev/pci/arc.c arc_write_region(struct arc_softc *sc, bus_size_t r, void *buf, size_t len)
sc 1664 dev/pci/arc.c bus_space_write_raw_region_4(sc->sc_iot, sc->sc_ioh, r, buf, len);
sc 1665 dev/pci/arc.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, len,
sc 1670 dev/pci/arc.c arc_wait_eq(struct arc_softc *sc, bus_size_t r, u_int32_t mask,
sc 1676 dev/pci/arc.c DEVNAME(sc), r, mask, target);
sc 1679 dev/pci/arc.c if ((arc_read(sc, r) & mask) == target)
sc 1688 dev/pci/arc.c arc_wait_ne(struct arc_softc *sc, bus_size_t r, u_int32_t mask,
sc 1694 dev/pci/arc.c DEVNAME(sc), r, mask, target);
sc 1697 dev/pci/arc.c if ((arc_read(sc, r) & mask) != target)
sc 1706 dev/pci/arc.c arc_msg0(struct arc_softc *sc, u_int32_t m)
sc 1709 dev/pci/arc.c arc_write(sc, ARC_REG_INB_MSG0, m);
sc 1711 dev/pci/arc.c if (arc_wait_eq(sc, ARC_REG_INTRSTAT, ARC_REG_INTRSTAT_MSG0,
sc 1716 dev/pci/arc.c arc_write(sc, ARC_REG_INTRSTAT, ARC_REG_INTRSTAT_MSG0);
sc 1722 dev/pci/arc.c arc_dmamem_alloc(struct arc_softc *sc, size_t size)
sc 1734 dev/pci/arc.c if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 1738 dev/pci/arc.c if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &adm->adm_seg,
sc 1742 dev/pci/arc.c if (bus_dmamem_map(sc->sc_dmat, &adm->adm_seg, nsegs, size,
sc 1746 dev/pci/arc.c if (bus_dmamap_load(sc->sc_dmat, adm->adm_map, adm->adm_kva, size,
sc 1755 dev/pci/arc.c bus_dmamem_unmap(sc->sc_dmat, adm->adm_kva, size);
sc 1757 dev/pci/arc.c bus_dmamem_free(sc->sc_dmat, &adm->adm_seg, 1);
sc 1759 dev/pci/arc.c bus_dmamap_destroy(sc->sc_dmat, adm->adm_map);
sc 1767 dev/pci/arc.c arc_dmamem_free(struct arc_softc *sc, struct arc_dmamem *adm)
sc 1769 dev/pci/arc.c bus_dmamap_unload(sc->sc_dmat, adm->adm_map);
sc 1770 dev/pci/arc.c bus_dmamem_unmap(sc->sc_dmat, adm->adm_kva, adm->adm_size);
sc 1771 dev/pci/arc.c bus_dmamem_free(sc->sc_dmat, &adm->adm_seg, 1);
sc 1772 dev/pci/arc.c bus_dmamap_destroy(sc->sc_dmat, adm->adm_map);
sc 1777 dev/pci/arc.c arc_alloc_ccbs(struct arc_softc *sc)
sc 1783 dev/pci/arc.c TAILQ_INIT(&sc->sc_ccb_free);
sc 1785 dev/pci/arc.c sc->sc_ccbs = malloc(sizeof(struct arc_ccb) * sc->sc_req_count,
sc 1787 dev/pci/arc.c bzero(sc->sc_ccbs, sizeof(struct arc_ccb) * sc->sc_req_count);
sc 1789 dev/pci/arc.c sc->sc_requests = arc_dmamem_alloc(sc,
sc 1790 dev/pci/arc.c ARC_MAX_IOCMDLEN * sc->sc_req_count);
sc 1791 dev/pci/arc.c if (sc->sc_requests == NULL) {
sc 1792 dev/pci/arc.c printf("%s: unable to allocate ccb dmamem\n", DEVNAME(sc));
sc 1795 dev/pci/arc.c cmd = ARC_DMA_KVA(sc->sc_requests);
sc 1797 dev/pci/arc.c for (i = 0; i < sc->sc_req_count; i++) {
sc 1798 dev/pci/arc.c ccb = &sc->sc_ccbs[i];
sc 1800 dev/pci/arc.c if (bus_dmamap_create(sc->sc_dmat, MAXPHYS, ARC_SGL_MAXLEN,
sc 1803 dev/pci/arc.c DEVNAME(sc), i);
sc 1807 dev/pci/arc.c ccb->ccb_sc = sc;
sc 1812 dev/pci/arc.c ccb->ccb_cmd_post = (ARC_DMA_DVA(sc->sc_requests) +
sc 1815 dev/pci/arc.c arc_put_ccb(sc, ccb);
sc 1821 dev/pci/arc.c while ((ccb = arc_get_ccb(sc)) != NULL)
sc 1822 dev/pci/arc.c bus_dmamap_destroy(sc->sc_dmat, ccb->ccb_dmamap);
sc 1823 dev/pci/arc.c arc_dmamem_free(sc, sc->sc_requests);
sc 1826 dev/pci/arc.c free(sc->sc_ccbs, M_DEVBUF);
sc 1832 dev/pci/arc.c arc_get_ccb(struct arc_softc *sc)
sc 1836 dev/pci/arc.c ccb = TAILQ_FIRST(&sc->sc_ccb_free);
sc 1838 dev/pci/arc.c TAILQ_REMOVE(&sc->sc_ccb_free, ccb, ccb_link);
sc 1844 dev/pci/arc.c arc_put_ccb(struct arc_softc *sc, struct arc_ccb *ccb)
sc 1848 dev/pci/arc.c TAILQ_INSERT_TAIL(&sc->sc_ccb_free, ccb, ccb_link);
sc 348 dev/pci/auich.c struct auich_softc *sc = (struct auich_softc *)self;
sc 367 dev/pci/auich.c &sc->iot_mix, &sc->mix_ioh, NULL, &mix_size, 0)) {
sc 372 dev/pci/auich.c 0, &sc->iot_mix, &sc->mix_ioh, NULL, &mix_size, 0)) {
sc 379 dev/pci/auich.c &sc->iot, &sc->aud_ioh, NULL, &aud_size, 0)) {
sc 384 dev/pci/auich.c PCI_MAPREG_TYPE_IO, 0, &sc->iot,
sc 385 dev/pci/auich.c &sc->aud_ioh, NULL, &aud_size, 0)) {
sc 387 dev/pci/auich.c bus_space_unmap(sc->iot_mix, sc->mix_ioh, mix_size);
sc 393 dev/pci/auich.c 0, &sc->iot_mix, &sc->mix_ioh, NULL, &mix_size, 0)) {
sc 399 dev/pci/auich.c 0, &sc->iot, &sc->aud_ioh, NULL, &aud_size, 0)) {
sc 401 dev/pci/auich.c bus_space_unmap(sc->iot_mix, sc->mix_ioh, mix_size);
sc 405 dev/pci/auich.c sc->dmat = pa->pa_dmat;
sc 410 dev/pci/auich.c if (bus_dmamem_alloc(sc->dmat, dmasz, PAGE_SIZE, 0, sc->dmalist_seg,
sc 415 dev/pci/auich.c if (bus_dmamem_map(sc->dmat, sc->dmalist_seg, segs, dmasz,
sc 416 dev/pci/auich.c &sc->dmalist_kva, BUS_DMA_NOWAIT)) {
sc 418 dev/pci/auich.c bus_dmamem_free(sc->dmat, sc->dmalist_seg, segs);
sc 421 dev/pci/auich.c if (bus_dmamap_create(sc->dmat, dmasz, segs, dmasz, 0, BUS_DMA_NOWAIT,
sc 422 dev/pci/auich.c &sc->dmalist_map)) {
sc 424 dev/pci/auich.c bus_dmamem_unmap(sc->dmat, sc->dmalist_kva, dmasz);
sc 425 dev/pci/auich.c bus_dmamem_free(sc->dmat, sc->dmalist_seg, segs);
sc 428 dev/pci/auich.c if (bus_dmamap_load_raw(sc->dmat, sc->dmalist_map, sc->dmalist_seg,
sc 432 dev/pci/auich.c bus_dmamap_destroy(sc->dmat, sc->dmalist_map);
sc 433 dev/pci/auich.c bus_dmamem_unmap(sc->dmat, sc->dmalist_kva, dmasz);
sc 434 dev/pci/auich.c bus_dmamem_free(sc->dmat, sc->dmalist_seg, segs);
sc 439 dev/pci/auich.c bus_space_unmap(sc->iot, sc->aud_ioh, aud_size);
sc 440 dev/pci/auich.c bus_space_unmap(sc->iot_mix, sc->mix_ioh, mix_size);
sc 444 dev/pci/auich.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, auich_intr,
sc 445 dev/pci/auich.c sc, sc->sc_dev.dv_xname);
sc 446 dev/pci/auich.c if (!sc->sc_ih) {
sc 451 dev/pci/auich.c bus_space_unmap(sc->iot, sc->aud_ioh, aud_size);
sc 452 dev/pci/auich.c bus_space_unmap(sc->iot_mix, sc->mix_ioh, mix_size);
sc 460 dev/pci/auich.c snprintf(sc->sc_audev.name, sizeof sc->sc_audev.name, "%s AC97",
sc 462 dev/pci/auich.c snprintf(sc->sc_audev.version, sizeof sc->sc_audev.version, "0x%02x",
sc 464 dev/pci/auich.c strlcpy(sc->sc_audev.config, sc->sc_dev.dv_xname,
sc 465 dev/pci/auich.c sizeof sc->sc_audev.config);
sc 467 dev/pci/auich.c printf(": %s, %s\n", intrstr, sc->sc_audev.name);
sc 472 dev/pci/auich.c sc->sc_sts_reg = AUICH_PICB;
sc 473 dev/pci/auich.c sc->sc_sample_size = 1;
sc 475 dev/pci/auich.c bus_space_write_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL,
sc 476 dev/pci/auich.c bus_space_read_4(sc->iot, sc->aud_ioh, ICH_SIS_NV_CTL) |
sc 479 dev/pci/auich.c sc->sc_sts_reg = AUICH_STS;
sc 480 dev/pci/auich.c sc->sc_sample_size = 2;
sc 483 dev/pci/auich.c sc->dmalist_pcmo = (struct auich_dmalist *)(sc->dmalist_kva +
sc 485 dev/pci/auich.c sc->dmalist_pcmo_pa = sc->dmalist_map->dm_segs[0].ds_addr +
sc 488 dev/pci/auich.c sc->dmalist_pcmi = (struct auich_dmalist *)(sc->dmalist_kva +
sc 490 dev/pci/auich.c sc->dmalist_pcmi_pa = sc->dmalist_map->dm_segs[0].ds_addr +
sc 493 dev/pci/auich.c sc->dmalist_mici = (struct auich_dmalist *)(sc->dmalist_kva +
sc 495 dev/pci/auich.c sc->dmalist_mici_pa = sc->dmalist_map->dm_segs[0].ds_addr +
sc 499 dev/pci/auich.c sc->dmalist_pcmo, sc->dmalist_pcmi, sc->dmalist_mici));
sc 502 dev/pci/auich.c auich_reset_codec(sc);
sc 503 dev/pci/auich.c status = bus_space_read_4(sc->iot, sc->aud_ioh, AUICH_GSTS);
sc 511 dev/pci/auich.c sc->sc_ignore_codecready = 1;
sc 513 dev/pci/auich.c printf("%s: reset failed!\n", sc->sc_dev.dv_xname);
sc 518 dev/pci/auich.c sc->host_if.arg = sc;
sc 519 dev/pci/auich.c sc->host_if.attach = auich_attach_codec;
sc 520 dev/pci/auich.c sc->host_if.read = auich_read_codec;
sc 521 dev/pci/auich.c sc->host_if.write = auich_write_codec;
sc 522 dev/pci/auich.c sc->host_if.reset = auich_reset_codec;
sc 523 dev/pci/auich.c sc->host_if.flags = auich_flags_codec;
sc 524 dev/pci/auich.c if (sc->sc_dev.dv_cfdata->cf_flags & 0x0001)
sc 525 dev/pci/auich.c sc->flags = AC97_HOST_SWAPPED_CHANNELS;
sc 527 dev/pci/auich.c if (ac97_attach(&sc->host_if) != 0) {
sc 528 dev/pci/auich.c pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
sc 529 dev/pci/auich.c bus_space_unmap(sc->iot, sc->aud_ioh, aud_size);
sc 530 dev/pci/auich.c bus_space_unmap(sc->iot_mix, sc->mix_ioh, mix_size);
sc 534 dev/pci/auich.c audio_attach_mi(&auich_hw_if, sc, &sc->sc_dev);
sc 537 dev/pci/auich.c sc->suspend = PWR_RESUME;
sc 538 dev/pci/auich.c sc->powerhook = powerhook_establish(auich_powerhook, sc);
sc 540 dev/pci/auich.c sc->sc_ac97rate = -1;
sc 549 dev/pci/auich.c struct auich_softc *sc = v;
sc 554 dev/pci/auich.c bus_space_read_1(sc->iot, sc->aud_ioh, AUICH_CAS) & 1; DELAY(1));
sc 556 dev/pci/auich.c if (!sc->sc_ignore_codecready && i < 0) {
sc 558 dev/pci/auich.c ("%s: read_codec timeout\n", sc->sc_dev.dv_xname));
sc 562 dev/pci/auich.c *val = bus_space_read_2(sc->iot_mix, sc->mix_ioh, reg);
sc 564 dev/pci/auich.c sc->sc_dev.dv_xname, reg, *val));
sc 574 dev/pci/auich.c struct auich_softc *sc = v;
sc 579 dev/pci/auich.c bus_space_read_1(sc->iot, sc->aud_ioh, AUICH_CAS) & 1; DELAY(1));
sc 581 dev/pci/auich.c if (sc->sc_ignore_codecready || i >= 0) {
sc 583 dev/pci/auich.c sc->sc_dev.dv_xname, reg, val));
sc 584 dev/pci/auich.c bus_space_write_2(sc->iot_mix, sc->mix_ioh, reg, val);
sc 588 dev/pci/auich.c ("%s: write_codec timeout\n", sc->sc_dev.dv_xname));
sc 598 dev/pci/auich.c struct auich_softc *sc = v;
sc 600 dev/pci/auich.c sc->codec_if = cif;
sc 608 dev/pci/auich.c struct auich_softc *sc = v;
sc 612 dev/pci/auich.c control = bus_space_read_4(sc->iot, sc->aud_ioh, AUICH_GCTRL);
sc 615 dev/pci/auich.c bus_space_write_4(sc->iot, sc->aud_ioh, AUICH_GCTRL, control);
sc 618 dev/pci/auich.c !(bus_space_read_4(sc->iot, sc->aud_ioh, AUICH_GSTS) & AUICH_PCR);
sc 623 dev/pci/auich.c ("%s: reset_codec timeout\n", sc->sc_dev.dv_xname));
sc 629 dev/pci/auich.c struct auich_softc *sc = v;
sc 631 dev/pci/auich.c return (sc->flags);
sc 639 dev/pci/auich.c struct auich_softc *sc = v;
sc 641 dev/pci/auich.c if (sc->sc_ac97rate == -1)
sc 642 dev/pci/auich.c sc->sc_ac97rate = auich_calibrate(sc);
sc 717 dev/pci/auich.c struct auich_softc *sc = v;
sc 890 dev/pci/auich.c if (sc->sc_ac97rate != 0)
sc 891 dev/pci/auich.c adj_rate = orate * AUICH_FIXED_RATE / sc->sc_ac97rate;
sc 893 dev/pci/auich.c error = ac97_set_rate(sc->codec_if, play, AUMODE_PLAY);
sc 968 dev/pci/auich.c if (sc->sc_ac97rate != 0)
sc 970 dev/pci/auich.c sc->sc_ac97rate;
sc 971 dev/pci/auich.c error = ac97_set_rate(sc->codec_if, rec, AUMODE_RECORD);
sc 992 dev/pci/auich.c struct auich_softc *sc = v;
sc 994 dev/pci/auich.c DPRINTF(AUICH_DEBUG_DMA, ("%s: halt_output\n", sc->sc_dev.dv_xname));
sc 996 dev/pci/auich.c bus_space_write_1(sc->iot, sc->aud_ioh, AUICH_PCMO + AUICH_CTRL, AUICH_RR);
sc 1005 dev/pci/auich.c struct auich_softc *sc = v;
sc 1008 dev/pci/auich.c ("%s: halt_input\n", sc->sc_dev.dv_xname));
sc 1012 dev/pci/auich.c bus_space_write_1(sc->iot, sc->aud_ioh, AUICH_PCMI + AUICH_CTRL, AUICH_RR);
sc 1013 dev/pci/auich.c bus_space_write_1(sc->iot, sc->aud_ioh, AUICH_MICI + AUICH_CTRL, AUICH_RR);
sc 1023 dev/pci/auich.c struct auich_softc *sc = v;
sc 1024 dev/pci/auich.c *adp = sc->sc_audev;
sc 1033 dev/pci/auich.c struct auich_softc *sc = v;
sc 1034 dev/pci/auich.c return sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp);
sc 1042 dev/pci/auich.c struct auich_softc *sc = v;
sc 1043 dev/pci/auich.c return sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp);
sc 1051 dev/pci/auich.c struct auich_softc *sc = v;
sc 1052 dev/pci/auich.c return sc->codec_if->vtbl->query_devinfo(sc->codec_if, dp);
sc 1062 dev/pci/auich.c struct auich_softc *sc = v;
sc 1075 dev/pci/auich.c if ((error = bus_dmamem_alloc(sc->dmat, p->size, NBPG, 0, p->segs,
sc 1078 dev/pci/auich.c sc->sc_dev.dv_xname, error);
sc 1083 dev/pci/auich.c if ((error = bus_dmamem_map(sc->dmat, p->segs, p->nsegs, p->size,
sc 1086 dev/pci/auich.c sc->sc_dev.dv_xname, error);
sc 1087 dev/pci/auich.c bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
sc 1092 dev/pci/auich.c if ((error = bus_dmamap_create(sc->dmat, p->size, 1,
sc 1095 dev/pci/auich.c sc->sc_dev.dv_xname, error);
sc 1096 dev/pci/auich.c bus_dmamem_unmap(sc->dmat, p->addr, size);
sc 1097 dev/pci/auich.c bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
sc 1102 dev/pci/auich.c if ((error = bus_dmamap_load(sc->dmat, p->map, p->addr, p->size,
sc 1105 dev/pci/auich.c sc->sc_dev.dv_xname, error);
sc 1106 dev/pci/auich.c bus_dmamap_destroy(sc->dmat, p->map);
sc 1107 dev/pci/auich.c bus_dmamem_unmap(sc->dmat, p->addr, size);
sc 1108 dev/pci/auich.c bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
sc 1113 dev/pci/auich.c p->next = sc->sc_dmas;
sc 1114 dev/pci/auich.c sc->sc_dmas = p;
sc 1125 dev/pci/auich.c struct auich_softc *sc = v;
sc 1128 dev/pci/auich.c for (p = sc->sc_dmas; p->addr != ptr; p = p->next)
sc 1134 dev/pci/auich.c bus_dmamap_unload(sc->dmat, p->map);
sc 1135 dev/pci/auich.c bus_dmamap_destroy(sc->dmat, p->map);
sc 1136 dev/pci/auich.c bus_dmamem_unmap(sc->dmat, p->addr, p->size);
sc 1137 dev/pci/auich.c bus_dmamem_free(sc->dmat, p->segs, p->nsegs);
sc 1160 dev/pci/auich.c struct auich_softc *sc = v;
sc 1166 dev/pci/auich.c for (p = sc->sc_dmas; p && p->addr != mem; p = p->next);
sc 1170 dev/pci/auich.c return bus_dmamem_mmap(sc->dmat, p->segs, p->nsegs,
sc 1185 dev/pci/auich.c struct auich_softc *sc = v;
sc 1188 dev/pci/auich.c gsts = bus_space_read_2(sc->iot, sc->aud_ioh, AUICH_GSTS);
sc 1192 dev/pci/auich.c sts = bus_space_read_2(sc->iot, sc->aud_ioh,
sc 1193 dev/pci/auich.c AUICH_PCMO + sc->sc_sts_reg);
sc 1200 dev/pci/auich.c sc->sc_dev.dv_xname, ++sc->pcmo_fifoe);
sc 1203 dev/pci/auich.c i = bus_space_read_1(sc->iot, sc->aud_ioh, AUICH_PCMO + AUICH_CIV);
sc 1207 dev/pci/auich.c q = sc->dmap_pcmo;
sc 1208 dev/pci/auich.c qe = &sc->dmalist_pcmo[i];
sc 1212 dev/pci/auich.c q->base = sc->pcmo_p;
sc 1213 dev/pci/auich.c q->len = (sc->pcmo_blksize /
sc 1214 dev/pci/auich.c sc->sc_sample_size) | AUICH_DMAF_IOC;
sc 1217 dev/pci/auich.c qe, q, sc->pcmo_blksize /
sc 1218 dev/pci/auich.c sc->sc_sample_size, sc->pcmo_p));
sc 1220 dev/pci/auich.c sc->pcmo_p += sc->pcmo_blksize;
sc 1221 dev/pci/auich.c if (sc->pcmo_p >= sc->pcmo_end)
sc 1222 dev/pci/auich.c sc->pcmo_p = sc->pcmo_start;
sc 1224 dev/pci/auich.c if (++q == &sc->dmalist_pcmo[AUICH_DMALIST_MAX])
sc 1225 dev/pci/auich.c q = sc->dmalist_pcmo;
sc 1228 dev/pci/auich.c sc->dmap_pcmo = q;
sc 1229 dev/pci/auich.c bus_space_write_1(sc->iot, sc->aud_ioh,
sc 1231 dev/pci/auich.c (sc->dmap_pcmo - sc->dmalist_pcmo - 1) &
sc 1235 dev/pci/auich.c if (sts & AUICH_BCIS && sc->sc_pintr)
sc 1236 dev/pci/auich.c sc->sc_pintr(sc->sc_parg);
sc 1239 dev/pci/auich.c bus_space_write_2(sc->iot, sc->aud_ioh,
sc 1240 dev/pci/auich.c AUICH_PCMO + sc->sc_sts_reg, sts &
sc 1242 dev/pci/auich.c bus_space_write_2(sc->iot, sc->aud_ioh, AUICH_GSTS, AUICH_POINT);
sc 1247 dev/pci/auich.c sts = bus_space_read_2(sc->iot, sc->aud_ioh,
sc 1248 dev/pci/auich.c AUICH_PCMI + sc->sc_sts_reg);
sc 1255 dev/pci/auich.c sc->sc_dev.dv_xname, ++sc->pcmi_fifoe);
sc 1258 dev/pci/auich.c i = bus_space_read_1(sc->iot, sc->aud_ioh, AUICH_PCMI + AUICH_CIV);
sc 1262 dev/pci/auich.c q = sc->dmap_pcmi;
sc 1263 dev/pci/auich.c qe = &sc->dmalist_pcmi[i];
sc 1267 dev/pci/auich.c q->base = sc->pcmi_p;
sc 1268 dev/pci/auich.c q->len = (sc->pcmi_blksize /
sc 1269 dev/pci/auich.c sc->sc_sample_size) | AUICH_DMAF_IOC;
sc 1272 dev/pci/auich.c qe, q, sc->pcmi_blksize /
sc 1273 dev/pci/auich.c sc->sc_sample_size, sc->pcmi_p));
sc 1275 dev/pci/auich.c sc->pcmi_p += sc->pcmi_blksize;
sc 1276 dev/pci/auich.c if (sc->pcmi_p >= sc->pcmi_end)
sc 1277 dev/pci/auich.c sc->pcmi_p = sc->pcmi_start;
sc 1279 dev/pci/auich.c if (++q == &sc->dmalist_pcmi[AUICH_DMALIST_MAX])
sc 1280 dev/pci/auich.c q = sc->dmalist_pcmi;
sc 1283 dev/pci/auich.c sc->dmap_pcmi = q;
sc 1284 dev/pci/auich.c bus_space_write_1(sc->iot, sc->aud_ioh,
sc 1286 dev/pci/auich.c (sc->dmap_pcmi - sc->dmalist_pcmi - 1) &
sc 1290 dev/pci/auich.c if (sts & AUICH_BCIS && sc->sc_rintr)
sc 1291 dev/pci/auich.c sc->sc_rintr(sc->sc_rarg);
sc 1294 dev/pci/auich.c bus_space_write_2(sc->iot, sc->aud_ioh,
sc 1295 dev/pci/auich.c AUICH_PCMI + sc->sc_sts_reg, sts &
sc 1297 dev/pci/auich.c bus_space_write_2(sc->iot, sc->aud_ioh, AUICH_GSTS, AUICH_PIINT);
sc 1302 dev/pci/auich.c sts = bus_space_read_2(sc->iot, sc->aud_ioh,
sc 1303 dev/pci/auich.c AUICH_MICI + sc->sc_sts_reg);
sc 1308 dev/pci/auich.c printf("%s: mic fifo overrun\n", sc->sc_dev.dv_xname);
sc 1313 dev/pci/auich.c bus_space_write_2(sc->iot, sc->aud_ioh, AUICH_GSTS, AUICH_MIINT);
sc 1328 dev/pci/auich.c struct auich_softc *sc = v;
sc 1336 dev/pci/auich.c for (p = sc->sc_dmas; p && p->addr != start; p = p->next);
sc 1340 dev/pci/auich.c sc->sc_pintr = intr;
sc 1341 dev/pci/auich.c sc->sc_parg = arg;
sc 1348 dev/pci/auich.c sc->pcmo_start = p->segs->ds_addr;
sc 1349 dev/pci/auich.c sc->pcmo_p = sc->pcmo_start + blksize;
sc 1350 dev/pci/auich.c sc->pcmo_end = sc->pcmo_start + ((char *)end - (char *)start);
sc 1351 dev/pci/auich.c sc->pcmo_blksize = blksize;
sc 1353 dev/pci/auich.c q = sc->dmap_pcmo = sc->dmalist_pcmo;
sc 1354 dev/pci/auich.c q->base = sc->pcmo_start;
sc 1355 dev/pci/auich.c q->len = (blksize / sc->sc_sample_size) | AUICH_DMAF_IOC;
sc 1356 dev/pci/auich.c if (++q == &sc->dmalist_pcmo[AUICH_DMALIST_MAX])
sc 1357 dev/pci/auich.c q = sc->dmalist_pcmo;
sc 1358 dev/pci/auich.c sc->dmap_pcmo = q;
sc 1360 dev/pci/auich.c bus_space_write_4(sc->iot, sc->aud_ioh, AUICH_PCMO + AUICH_BDBAR,
sc 1361 dev/pci/auich.c sc->dmalist_pcmo_pa);
sc 1362 dev/pci/auich.c bus_space_write_1(sc->iot, sc->aud_ioh, AUICH_PCMO + AUICH_CTRL,
sc 1364 dev/pci/auich.c bus_space_write_1(sc->iot, sc->aud_ioh, AUICH_PCMO + AUICH_LVI,
sc 1365 dev/pci/auich.c (sc->dmap_pcmo - 1 - sc->dmalist_pcmo) & AUICH_LVI_MASK);
sc 1379 dev/pci/auich.c struct auich_softc *sc = v;
sc 1387 dev/pci/auich.c for (p = sc->sc_dmas; p && p->addr != start; p = p->next);
sc 1391 dev/pci/auich.c sc->sc_rintr = intr;
sc 1392 dev/pci/auich.c sc->sc_rarg = arg;
sc 1399 dev/pci/auich.c sc->pcmi_start = p->segs->ds_addr;
sc 1400 dev/pci/auich.c sc->pcmi_p = sc->pcmi_start + blksize;
sc 1401 dev/pci/auich.c sc->pcmi_end = sc->pcmi_start + ((char *)end - (char *)start);
sc 1402 dev/pci/auich.c sc->pcmi_blksize = blksize;
sc 1404 dev/pci/auich.c q = sc->dmap_pcmi = sc->dmalist_pcmi;
sc 1405 dev/pci/auich.c q->base = sc->pcmi_start;
sc 1406 dev/pci/auich.c q->len = (blksize / sc->sc_sample_size) | AUICH_DMAF_IOC;
sc 1407 dev/pci/auich.c if (++q == &sc->dmalist_pcmi[AUICH_DMALIST_MAX])
sc 1408 dev/pci/auich.c q = sc->dmalist_pcmi;
sc 1409 dev/pci/auich.c sc->dmap_pcmi = q;
sc 1411 dev/pci/auich.c bus_space_write_4(sc->iot, sc->aud_ioh, AUICH_PCMI + AUICH_BDBAR,
sc 1412 dev/pci/auich.c sc->dmalist_pcmi_pa);
sc 1413 dev/pci/auich.c bus_space_write_1(sc->iot, sc->aud_ioh, AUICH_PCMI + AUICH_CTRL,
sc 1415 dev/pci/auich.c bus_space_write_1(sc->iot, sc->aud_ioh, AUICH_PCMI + AUICH_LVI,
sc 1416 dev/pci/auich.c (sc->dmap_pcmi - 1 - sc->dmalist_pcmi) & AUICH_LVI_MASK);
sc 1426 dev/pci/auich.c struct auich_softc *sc = (struct auich_softc *)self;
sc 1431 dev/pci/auich.c sc->suspend = why;
sc 1432 dev/pci/auich.c auich_read_codec(sc, AC97_REG_EXT_AUDIO_CTRL, &sc->ext_ctrl);
sc 1437 dev/pci/auich.c if (sc->suspend == PWR_RESUME) {
sc 1439 dev/pci/auich.c sc->sc_dev.dv_xname);
sc 1440 dev/pci/auich.c sc->suspend = why;
sc 1443 dev/pci/auich.c sc->suspend = why;
sc 1444 dev/pci/auich.c auich_reset_codec(sc);
sc 1446 dev/pci/auich.c (sc->codec_if->vtbl->restore_ports)(sc->codec_if);
sc 1447 dev/pci/auich.c auich_write_codec(sc, AC97_REG_EXT_AUDIO_CTRL, sc->ext_ctrl);
sc 1457 dev/pci/auich.c auich_calibrate(struct auich_softc *sc)
sc 1476 dev/pci/auich.c temp_buffer = auich_allocm(sc, AUMODE_RECORD, bytes, M_DEVBUF,
sc 1480 dev/pci/auich.c for (p = sc->sc_dmas; p && p->addr != temp_buffer; p = p->next)
sc 1488 dev/pci/auich.c sc->dmalist_pcmi[i].base = p->map->dm_segs[0].ds_addr;
sc 1489 dev/pci/auich.c sc->dmalist_pcmi[i].len = bytes / sc->sc_sample_size;
sc 1505 dev/pci/auich.c ociv = bus_space_read_1(sc->iot, sc->aud_ioh, AUICH_PCMI + AUICH_CIV);
sc 1507 dev/pci/auich.c bus_space_write_4(sc->iot, sc->aud_ioh, AUICH_PCMI + AUICH_BDBAR,
sc 1508 dev/pci/auich.c sc->dmalist_pcmi_pa);
sc 1509 dev/pci/auich.c bus_space_write_1(sc->iot, sc->aud_ioh, AUICH_PCMI + AUICH_LVI,
sc 1514 dev/pci/auich.c bus_space_write_1(sc->iot, sc->aud_ioh, AUICH_PCMI + AUICH_CTRL,
sc 1522 dev/pci/auich.c nciv = bus_space_read_1(sc->iot, sc->aud_ioh,
sc 1528 dev/pci/auich.c bus_space_write_1(sc->iot, sc->aud_ioh, AUICH_PCMI + AUICH_CTRL, AUICH_RR);
sc 1529 dev/pci/auich.c bus_space_write_1(sc->iot, sc->aud_ioh, AUICH_MICI + AUICH_CTRL, AUICH_RR);
sc 1536 dev/pci/auich.c auich_freem(sc, temp_buffer, M_DEVBUF);
sc 1541 dev/pci/auich.c sc->sc_dev.dv_xname, wait_us);
sc 1553 dev/pci/auich.c sc->sc_dev.dv_xname, actual_48k_rate);
sc 282 dev/pci/auixp.c struct auixp_softc *sc;
sc 290 dev/pci/auixp.c sc = co->sc;
sc 291 dev/pci/auixp.c iot = sc->sc_iot;
sc 292 dev/pci/auixp.c ioh = sc->sc_ioh;
sc 295 dev/pci/auixp.c params = &sc->sc_play_params;
sc 305 dev/pci/auixp.c params = &sc->sc_play_params;
sc 343 dev/pci/auixp.c if (sc->has_spdif) {
sc 366 dev/pci/auixp.c struct auixp_softc *sc;
sc 370 dev/pci/auixp.c sc = co->sc;
sc 607 dev/pci/auixp.c struct auixp_softc *sc;
sc 612 dev/pci/auixp.c sc = co->sc;
sc 619 dev/pci/auixp.c error = auixp_allocmem(sc, size, 16, dma);
sc 623 dev/pci/auixp.c sc->sc_dev.dv_xname);
sc 626 dev/pci/auixp.c SLIST_INSERT_HEAD(&sc->sc_dma_list, dma, dma_chain);
sc 644 dev/pci/auixp.c struct auixp_softc *sc;
sc 648 dev/pci/auixp.c sc = co->sc;
sc 649 dev/pci/auixp.c SLIST_FOREACH(dma, &sc->sc_dma_list, dma_chain) {
sc 651 dev/pci/auixp.c SLIST_REMOVE(&sc->sc_dma_list, dma, auixp_dma,
sc 653 dev/pci/auixp.c auixp_freemem(sc, dma);
sc 663 dev/pci/auixp.c struct auixp_softc *sc = v;
sc 664 dev/pci/auixp.c *adp = sc->sc_audev;
sc 732 dev/pci/auixp.c auixp_link_daisychain(struct auixp_softc *sc,
sc 741 dev/pci/auixp.c auixp_disable_dma(sc, c_dma);
sc 777 dev/pci/auixp.c auixp_allocate_dma_chain(struct auixp_softc *sc, struct auixp_dma **dmap)
sc 790 dev/pci/auixp.c error = auixp_allocmem(sc, DMA_DESC_CHAIN * sizeof(atiixp_dma_desc_t),
sc 794 dev/pci/auixp.c sc->sc_dev.dv_xname);
sc 810 dev/pci/auixp.c auixp_program_dma_chain(struct auixp_softc *sc, struct auixp_dma *dma)
sc 816 dev/pci/auixp.c iot = sc->sc_iot;
sc 817 dev/pci/auixp.c ioh = sc->sc_ioh;
sc 827 dev/pci/auixp.c auixp_disable_dma(sc, dma);
sc 828 dev/pci/auixp.c auixp_enable_dma(sc, dma);
sc 837 dev/pci/auixp.c auixp_dma_update(struct auixp_softc *sc, struct auixp_dma *dma)
sc 856 dev/pci/auixp.c auixp_update_busbusy(struct auixp_softc *sc)
sc 863 dev/pci/auixp.c iot = sc->sc_iot;
sc 864 dev/pci/auixp.c ioh = sc->sc_ioh;
sc 869 dev/pci/auixp.c running = ((sc->sc_output_dma->running) || (sc->sc_input_dma->running));
sc 889 dev/pci/auixp.c struct auixp_softc *sc;
sc 895 dev/pci/auixp.c sc = co->sc;
sc 896 dev/pci/auixp.c chain_dma = sc->sc_output_dma;
sc 911 dev/pci/auixp.c SLIST_FOREACH(sound_dma, &sc->sc_dma_list, dma_chain) {
sc 919 dev/pci/auixp.c sc->sc_dev.dv_xname, start);
sc 924 dev/pci/auixp.c auixp_link_daisychain(sc, chain_dma, sound_dma, blksize, blocks);
sc 925 dev/pci/auixp.c auixp_program_dma_chain(sc, chain_dma);
sc 931 dev/pci/auixp.c auixp_update_busbusy(sc);
sc 943 dev/pci/auixp.c struct auixp_softc *sc;
sc 947 dev/pci/auixp.c sc = co->sc;
sc 948 dev/pci/auixp.c dma = sc->sc_output_dma;
sc 949 dev/pci/auixp.c auixp_disable_dma(sc, dma);
sc 952 dev/pci/auixp.c auixp_update_busbusy(sc);
sc 964 dev/pci/auixp.c struct auixp_softc *sc;
sc 970 dev/pci/auixp.c sc = co->sc;
sc 971 dev/pci/auixp.c chain_dma = sc->sc_input_dma;
sc 986 dev/pci/auixp.c SLIST_FOREACH(sound_dma, &sc->sc_dma_list, dma_chain) {
sc 994 dev/pci/auixp.c sc->sc_dev.dv_xname, start);
sc 999 dev/pci/auixp.c auixp_link_daisychain(sc, chain_dma, sound_dma, blksize, blocks);
sc 1000 dev/pci/auixp.c auixp_program_dma_chain(sc, chain_dma);
sc 1006 dev/pci/auixp.c auixp_update_busbusy(sc);
sc 1018 dev/pci/auixp.c struct auixp_softc *sc;
sc 1022 dev/pci/auixp.c sc = co->sc;
sc 1023 dev/pci/auixp.c dma = sc->sc_input_dma;
sc 1024 dev/pci/auixp.c auixp_disable_dma(sc, dma);
sc 1027 dev/pci/auixp.c auixp_update_busbusy(sc);
sc 1044 dev/pci/auixp.c struct auixp_softc *sc;
sc 1050 dev/pci/auixp.c sc = softc;
sc 1051 dev/pci/auixp.c iot = sc->sc_iot;
sc 1052 dev/pci/auixp.c ioh = sc->sc_ioh;
sc 1060 dev/pci/auixp.c DPRINTF(("%s: (status = %x)\n", sc->sc_dev.dv_xname, status));
sc 1065 dev/pci/auixp.c auixp_dma_update(sc, sc->sc_input_dma);
sc 1069 dev/pci/auixp.c auixp_dma_update(sc, sc->sc_output_dma);
sc 1088 dev/pci/auixp.c sc->sc_codec_not_ready_bits |= detected_codecs;
sc 1105 dev/pci/auixp.c auixp_allocmem(struct auixp_softc *sc, size_t size,
sc 1114 dev/pci/auixp.c error = bus_dmamem_alloc(sc->sc_dmat, dma->size, align, 0,
sc 1124 dev/pci/auixp.c error = bus_dmamem_map(sc->sc_dmat, dma->segs, dma->nsegs, dma->size,
sc 1130 dev/pci/auixp.c error = bus_dmamap_create(sc->sc_dmat, dma->size, 1, dma->size, 0,
sc 1139 dev/pci/auixp.c error = bus_dmamap_load(sc->sc_dmat, dma->map, dma->addr, dma->size, NULL,
sc 1147 dev/pci/auixp.c bus_dmamap_destroy(sc->sc_dmat, dma->map);
sc 1149 dev/pci/auixp.c bus_dmamem_unmap(sc->sc_dmat, dma->addr, dma->size);
sc 1151 dev/pci/auixp.c bus_dmamem_free(sc->sc_dmat, dma->segs, dma->nsegs);
sc 1159 dev/pci/auixp.c auixp_freemem(struct auixp_softc *sc, struct auixp_dma *p)
sc 1162 dev/pci/auixp.c bus_dmamap_unload(sc->sc_dmat, p->map);
sc 1163 dev/pci/auixp.c bus_dmamap_destroy(sc->sc_dmat, p->map);
sc 1164 dev/pci/auixp.c bus_dmamem_unmap(sc->sc_dmat, p->addr, p->size);
sc 1165 dev/pci/auixp.c bus_dmamem_free(sc->sc_dmat, p->segs, p->nsegs);
sc 1176 dev/pci/auixp.c struct auixp_softc *sc;
sc 1180 dev/pci/auixp.c sc = co->sc;
sc 1186 dev/pci/auixp.c SLIST_FOREACH(p, &sc->sc_dma_list, dma_chain) {
sc 1196 dev/pci/auixp.c return bus_dmamem_mmap(sc->sc_dmat, p->segs, p->nsegs,
sc 1210 dev/pci/auixp.c struct auixp_softc *sc;
sc 1218 dev/pci/auixp.c sc = (struct auixp_softc *)self;
sc 1225 dev/pci/auixp.c &sc->sc_iot, &sc->sc_ioh, &sc->sc_iob, &sc->sc_ios, 0)) {
sc 1231 dev/pci/auixp.c sc->sc_tag = tag;
sc 1232 dev/pci/auixp.c sc->sc_pct = pc;
sc 1233 dev/pci/auixp.c sc->sc_dmat = pa->pa_dmat;
sc 1234 dev/pci/auixp.c SLIST_INIT(&sc->sc_dma_list);
sc 1237 dev/pci/auixp.c auixp_allocate_dma_chain(sc, &sc->sc_output_dma);
sc 1238 dev/pci/auixp.c auixp_allocate_dma_chain(sc, &sc->sc_input_dma);
sc 1241 dev/pci/auixp.c if (!sc->sc_output_dma || !sc->sc_input_dma)
sc 1247 dev/pci/auixp.c sc->sc_output_dma->linkptr = ATI_REG_OUT_DMA_LINKPTR;
sc 1248 dev/pci/auixp.c sc->sc_output_dma->dma_enable_bit = ATI_REG_CMD_OUT_DMA_EN |
sc 1251 dev/pci/auixp.c if (sc->has_spdif)
sc 1252 dev/pci/auixp.c sc->sc_output_dma->dma_enable_bit |= ATI_REG_CMD_SPDF_OUT_EN;
sc 1255 dev/pci/auixp.c sc->sc_input_dma->linkptr = ATI_REG_IN_DMA_LINKPTR;
sc 1256 dev/pci/auixp.c sc->sc_input_dma->dma_enable_bit = ATI_REG_CMD_IN_DMA_EN |
sc 1261 dev/pci/auixp.c auixp_program_dma_chain(sc, sc->sc_output_dma);
sc 1262 dev/pci/auixp.c auixp_program_dma_chain(sc, sc->sc_input_dma);
sc 1270 dev/pci/auixp.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, auixp_intr, sc,
sc 1271 dev/pci/auixp.c sc->sc_dev.dv_xname);
sc 1272 dev/pci/auixp.c if (sc->sc_ih == NULL) {
sc 1281 dev/pci/auixp.c strlcpy(sc->sc_audev.name, "ATI IXP AC97", sizeof sc->sc_audev.name);
sc 1282 dev/pci/auixp.c snprintf(sc->sc_audev.version, sizeof sc->sc_audev.version, "0x%02x",
sc 1284 dev/pci/auixp.c strlcpy(sc->sc_audev.config, sc->sc_dev.dv_xname,
sc 1285 dev/pci/auixp.c sizeof sc->sc_audev.config);
sc 1288 dev/pci/auixp.c auixp_power(sc, PCI_PMCSR_STATE_D0);
sc 1291 dev/pci/auixp.c if (auixp_init(sc) == -1) {
sc 1293 dev/pci/auixp.c sc->sc_dev.dv_xname);
sc 1304 dev/pci/auixp.c sc->savemem = (u_int16_t *)malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO);
sc 1305 dev/pci/auixp.c if (sc->savemem == NULL) {
sc 1307 dev/pci/auixp.c sc->sc_dev.dv_xname);
sc 1311 dev/pci/auixp.c sc->powerhook = powerhook_establish(auixp_powerhook, sc);
sc 1312 dev/pci/auixp.c if (sc->powerhook == NULL)
sc 1314 dev/pci/auixp.c sc->sc_dev.dv_xname);
sc 1329 dev/pci/auixp.c struct auixp_softc *sc;
sc 1333 dev/pci/auixp.c sc = (struct auixp_softc *)self;
sc 1335 dev/pci/auixp.c auixp_autodetect_codecs(sc);
sc 1339 dev/pci/auixp.c sc->has_4ch = AC97_IS_4CH(codec->codec_if);
sc 1340 dev/pci/auixp.c sc->has_6ch = AC97_IS_6CH(codec->codec_if);
sc 1341 dev/pci/auixp.c sc->is_fixed = AC97_IS_FIXED_RATE(codec->codec_if);
sc 1342 dev/pci/auixp.c sc->has_spdif = AC97_HAS_SPDIF(codec->codec_if);
sc 1347 dev/pci/auixp.c codec = &sc->sc_codec[codec_nr];
sc 1349 dev/pci/auixp.c audio_attach_mi(&auixp_hw_if, codec, &sc->sc_dev);
sc 1353 dev/pci/auixp.c auixp_enable_interrupts(sc);
sc 1357 dev/pci/auixp.c auixp_enable_interrupts(struct auixp_softc *sc)
sc 1363 dev/pci/auixp.c iot = sc->sc_iot;
sc 1364 dev/pci/auixp.c ioh = sc->sc_ioh;
sc 1384 dev/pci/auixp.c auixp_disable_interrupts(struct auixp_softc *sc)
sc 1389 dev/pci/auixp.c iot = sc->sc_iot;
sc 1390 dev/pci/auixp.c ioh = sc->sc_ioh;
sc 1402 dev/pci/auixp.c struct auixp_softc *sc;
sc 1404 dev/pci/auixp.c sc = (struct auixp_softc *)self;
sc 1410 dev/pci/auixp.c auixp_disable_interrupts(sc);
sc 1413 dev/pci/auixp.c config_detach(&sc->sc_dev, flags); /* XXX OK? XXX */
sc 1415 dev/pci/auixp.c if (sc->sc_ih != NULL)
sc 1416 dev/pci/auixp.c pci_intr_disestablish(sc->sc_pct, sc->sc_ih);
sc 1417 dev/pci/auixp.c if (sc->sc_ios)
sc 1418 dev/pci/auixp.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 1420 dev/pci/auixp.c if (sc->savemem)
sc 1421 dev/pci/auixp.c free(sc->savemem, M_DEVBUF);
sc 1452 dev/pci/auixp.c struct auixp_softc *sc;
sc 1459 dev/pci/auixp.c sc = co->sc;
sc 1460 dev/pci/auixp.c iot = sc->sc_iot;
sc 1461 dev/pci/auixp.c ioh = sc->sc_ioh;
sc 1462 dev/pci/auixp.c if (auixp_wait_for_codecs(sc, "read_codec"))
sc 1473 dev/pci/auixp.c if (auixp_wait_for_codecs(sc, "read_codec"))
sc 1492 dev/pci/auixp.c sc->sc_dev.dv_xname, reg);
sc 1501 dev/pci/auixp.c struct auixp_softc *sc;
sc 1508 dev/pci/auixp.c sc = co->sc;
sc 1509 dev/pci/auixp.c iot = sc->sc_iot;
sc 1510 dev/pci/auixp.c ioh = sc->sc_ioh;
sc 1511 dev/pci/auixp.c if (auixp_wait_for_codecs(sc, "write_codec"))
sc 1542 dev/pci/auixp.c auixp_wait_for_codecs(struct auixp_softc *sc, const char *func)
sc 1549 dev/pci/auixp.c iot = sc->sc_iot;
sc 1550 dev/pci/auixp.c ioh = sc->sc_ioh;
sc 1562 dev/pci/auixp.c printf("%s: %s: timed out\n", func, sc->sc_dev.dv_xname);
sc 1567 dev/pci/auixp.c auixp_autodetect_codecs(struct auixp_softc *sc)
sc 1575 dev/pci/auixp.c iot = sc->sc_iot;
sc 1576 dev/pci/auixp.c ioh = sc->sc_ioh;
sc 1577 dev/pci/auixp.c subdev = pci_conf_read(sc->sc_pct, sc->sc_tag, PCI_SUBSYS_ID_REG);
sc 1580 dev/pci/auixp.c sc->sc_codec_not_ready_bits = 0;
sc 1581 dev/pci/auixp.c sc->sc_num_codecs = 0;
sc 1591 dev/pci/auixp.c if (sc->sc_codec_not_ready_bits)
sc 1599 dev/pci/auixp.c sc->sc_dev.dv_xname);
sc 1602 dev/pci/auixp.c auixp_disable_interrupts(sc);
sc 1606 dev/pci/auixp.c codec = &sc->sc_codec[codec_nr];
sc 1609 dev/pci/auixp.c codec->sc = sc;
sc 1626 dev/pci/auixp.c if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC0_NOT_READY)) {
sc 1629 dev/pci/auixp.c if (ac97_attach(&sc->sc_codec[0].host_if) == 0)
sc 1630 dev/pci/auixp.c sc->sc_num_codecs++;
sc 1634 dev/pci/auixp.c if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC1_NOT_READY)) {
sc 1637 dev/pci/auixp.c if (ac97_attach(&sc->sc_codec[1].host_if, &sc->sc_dev) == 0)
sc 1638 dev/pci/auixp.c sc->sc_num_codecs++;
sc 1641 dev/pci/auixp.c if (!(sc->sc_codec_not_ready_bits & ATI_REG_ISR_CODEC2_NOT_READY)) {
sc 1644 dev/pci/auixp.c if (ac97_attach(&sc->sc_codec[2].host_if, &sc->sc_dev) == 0)
sc 1645 dev/pci/auixp.c sc->sc_num_codecs++;
sc 1649 dev/pci/auixp.c if (sc->sc_num_codecs == 0) {
sc 1651 dev/pci/auixp.c sc->sc_dev.dv_xname);
sc 1657 dev/pci/auixp.c auixp_disable_dma(struct auixp_softc *sc, struct auixp_dma *dma)
sc 1663 dev/pci/auixp.c iot = sc->sc_iot;
sc 1664 dev/pci/auixp.c ioh = sc->sc_ioh;
sc 1674 dev/pci/auixp.c auixp_enable_dma(struct auixp_softc *sc, struct auixp_dma *dma)
sc 1680 dev/pci/auixp.c iot = sc->sc_iot;
sc 1681 dev/pci/auixp.c ioh = sc->sc_ioh;
sc 1691 dev/pci/auixp.c auixp_reset_aclink(struct auixp_softc *sc)
sc 1697 dev/pci/auixp.c iot = sc->sc_iot;
sc 1698 dev/pci/auixp.c ioh = sc->sc_ioh;
sc 1703 dev/pci/auixp.c printf("%s: powering up\n", sc->sc_dev.dv_xname);
sc 1713 dev/pci/auixp.c printf("%s: soft resetting aclink\n", sc->sc_dev.dv_xname);
sc 1734 dev/pci/auixp.c sc->sc_dev.dv_xname);
sc 1758 dev/pci/auixp.c printf("%s: giving up aclink reset\n", sc->sc_dev.dv_xname);
sc 1762 dev/pci/auixp.c sc->sc_dev.dv_xname);
sc 1773 dev/pci/auixp.c auixp_init(struct auixp_softc *sc)
sc 1779 dev/pci/auixp.c iot = sc->sc_iot;
sc 1780 dev/pci/auixp.c ioh = sc->sc_ioh;
sc 1782 dev/pci/auixp.c auixp_disable_interrupts(sc);
sc 1792 dev/pci/auixp.c auixp_reset_aclink(sc);
sc 1808 dev/pci/auixp.c auixp_power(struct auixp_softc *sc, int state)
sc 1815 dev/pci/auixp.c tag = sc->sc_tag;
sc 1816 dev/pci/auixp.c pc = sc->sc_pct;
sc 1830 dev/pci/auixp.c struct auixp_softc *sc;
sc 1832 dev/pci/auixp.c sc = (struct auixp_softc *)hdl;
sc 1836 dev/pci/auixp.c auixp_suspend(sc);
sc 1839 dev/pci/auixp.c auixp_resume(sc);
sc 1841 dev/pci/auixp.c (sc->codec_if->vtbl->restore_ports)(sc->codec_if);
sc 1847 dev/pci/auixp.c auixp_suspend(struct auixp_softc *sc)
sc 1855 dev/pci/auixp.c auixp_resume(struct auixp_softc *sc)
sc 73 dev/pci/auixpvar.h struct auixp_softc *sc;
sc 84 dev/pci/autri.c #define TWRITE1(sc, r, x) bus_space_write_1((sc)->memt, (sc)->memh, (r), (x))
sc 85 dev/pci/autri.c #define TWRITE2(sc, r, x) bus_space_write_2((sc)->memt, (sc)->memh, (r), (x))
sc 86 dev/pci/autri.c #define TWRITE4(sc, r, x) bus_space_write_4((sc)->memt, (sc)->memh, (r), (x))
sc 87 dev/pci/autri.c #define TREAD1(sc, r) bus_space_read_1((sc)->memt, (sc)->memh, (r))
sc 88 dev/pci/autri.c #define TREAD2(sc, r) bus_space_read_2((sc)->memt, (sc)->memh, (r))
sc 89 dev/pci/autri.c #define TREAD4(sc, r) bus_space_read_4((sc)->memt, (sc)->memh, (r))
sc 96 dev/pci/autri.c int autri_attach_codec(void *sc, struct ac97_codec_if *);
sc 97 dev/pci/autri.c int autri_read_codec(void *sc, u_int8_t a, u_int16_t *d);
sc 98 dev/pci/autri.c int autri_write_codec(void *sc, u_int8_t a, u_int16_t d);
sc 99 dev/pci/autri.c void autri_reset_codec(void *sc);
sc 103 dev/pci/autri.c int autri_init(void *sc);
sc 105 dev/pci/autri.c void autri_setup_channel(struct autri_softc *sc,int mode,
sc 107 dev/pci/autri.c void autri_enable_interrupt(struct autri_softc *sc, int ch);
sc 108 dev/pci/autri.c void autri_disable_interrupt(struct autri_softc *sc, int ch);
sc 109 dev/pci/autri.c void autri_startch(struct autri_softc *sc, int ch, int ch_intr);
sc 110 dev/pci/autri.c void autri_stopch(struct autri_softc *sc, int ch, int ch_intr);
sc 111 dev/pci/autri.c void autri_enable_loop_interrupt(void *sc);
sc 113 dev/pci/autri.c void autri_disable_loop_interrupt(void *sc);
sc 197 dev/pci/autri.c autri_reg_set_1(sc, no, mask)
sc 198 dev/pci/autri.c struct autri_softc *sc;
sc 202 dev/pci/autri.c bus_space_write_1(sc->memt, sc->memh, no,
sc 203 dev/pci/autri.c (bus_space_read_1(sc->memt, sc->memh, no) | mask));
sc 207 dev/pci/autri.c autri_reg_clear_1(sc, no, mask)
sc 208 dev/pci/autri.c struct autri_softc *sc;
sc 212 dev/pci/autri.c bus_space_write_1(sc->memt, sc->memh, no,
sc 213 dev/pci/autri.c (bus_space_read_1(sc->memt, sc->memh, no) & ~mask));
sc 217 dev/pci/autri.c autri_reg_set_4(sc, no, mask)
sc 218 dev/pci/autri.c struct autri_softc *sc;
sc 222 dev/pci/autri.c bus_space_write_4(sc->memt, sc->memh, no,
sc 223 dev/pci/autri.c (bus_space_read_4(sc->memt, sc->memh, no) | mask));
sc 227 dev/pci/autri.c autri_reg_clear_4(sc, no, mask)
sc 228 dev/pci/autri.c struct autri_softc *sc;
sc 232 dev/pci/autri.c bus_space_write_4(sc->memt, sc->memh, no,
sc 233 dev/pci/autri.c (bus_space_read_4(sc->memt, sc->memh, no) & ~mask));
sc 244 dev/pci/autri.c struct autri_codec_softc *sc = sc_;
sc 248 dev/pci/autri.c sc->codec_if = codec_if;
sc 259 dev/pci/autri.c struct autri_softc *sc = codec->sc;
sc 265 dev/pci/autri.c switch (sc->sc_devid) {
sc 282 dev/pci/autri.c if (sc->sc_revision > 0x01)
sc 291 dev/pci/autri.c sc->sc_dev.dv_xname);
sc 297 dev/pci/autri.c if ((TREAD4(sc, addr) & busy) == 0)
sc 304 dev/pci/autri.c sc->sc_dev.dv_xname);
sc 309 dev/pci/autri.c TWRITE4(sc, addr, (index & 0x7f) | cmd);
sc 313 dev/pci/autri.c status = TREAD4(sc, addr);
sc 321 dev/pci/autri.c sc->sc_dev.dv_xname);
sc 337 dev/pci/autri.c struct autri_softc *sc = codec->sc;
sc 343 dev/pci/autri.c switch (sc->sc_devid) {
sc 362 dev/pci/autri.c if (sc->sc_revision > 0x01)
sc 368 dev/pci/autri.c sc->sc_dev.dv_xname);
sc 374 dev/pci/autri.c if ((TREAD4(sc, addr) & busy) == 0)
sc 381 dev/pci/autri.c sc->sc_dev.dv_xname);
sc 386 dev/pci/autri.c TWRITE4(sc, addr, (data << 16) | (index & 0x7f) | cmd);
sc 396 dev/pci/autri.c struct autri_softc *sc = codec->sc;
sc 400 dev/pci/autri.c DPRINTF(("autri_reset_codec(codec=%p,sc=%p)\n",codec,sc));
sc 401 dev/pci/autri.c DPRINTF(("sc->sc_devid=%X\n",sc->sc_devid));
sc 403 dev/pci/autri.c switch (sc->sc_devid) {
sc 406 dev/pci/autri.c autri_reg_set_4(sc, AUTRI_DX_ACR2, 1);
sc 409 dev/pci/autri.c autri_reg_clear_4(sc, AUTRI_DX_ACR2, 1);
sc 417 dev/pci/autri.c autri_reg_set_4(sc, AUTRI_NX_ACR0, 1);
sc 420 dev/pci/autri.c autri_reg_clear_4(sc, AUTRI_NX_ACR0, 1);
sc 428 dev/pci/autri.c autri_reg_set_4(sc, AUTRI_SIS_SCTRL, 2);
sc 431 dev/pci/autri.c autri_reg_clear_4(sc, AUTRI_SIS_SCTRL, 3);
sc 439 dev/pci/autri.c autri_reg_set_4(sc, AUTRI_ALI_SCTRL, 1);
sc 442 dev/pci/autri.c autri_reg_clear_4(sc, AUTRI_ALI_SCTRL, 3);
sc 452 dev/pci/autri.c reg = TREAD4(sc, addr);
sc 460 dev/pci/autri.c sc->sc_dev.dv_xname);
sc 466 dev/pci/autri.c struct autri_codec_softc *sc = v;
sc 468 dev/pci/autri.c return (sc->flags);
sc 510 dev/pci/autri.c struct autri_softc *sc = (struct autri_softc *)self;
sc 520 dev/pci/autri.c sc->sc_devid = pa->pa_id;
sc 521 dev/pci/autri.c sc->sc_class = pa->pa_class;
sc 522 dev/pci/autri.c sc->sc_revision = PCI_REVISION(pa->pa_class);
sc 526 dev/pci/autri.c PCI_MAPREG_TYPE_MEM, 0, &sc->memt, &sc->memh, NULL, &iosize, 0)) {
sc 527 dev/pci/autri.c printf("%s: can't map memory space\n", sc->sc_dev.dv_xname);
sc 533 dev/pci/autri.c printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
sc 534 dev/pci/autri.c bus_space_unmap(sc->memt, sc->memh, iosize);
sc 538 dev/pci/autri.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, autri_intr, sc,
sc 539 dev/pci/autri.c sc->sc_dev.dv_xname);
sc 540 dev/pci/autri.c if (sc->sc_ih == NULL) {
sc 542 dev/pci/autri.c sc->sc_dev.dv_xname);
sc 546 dev/pci/autri.c bus_space_unmap(sc->memt, sc->memh, iosize);
sc 551 dev/pci/autri.c sc->sc_dmatag = pa->pa_dmat;
sc 552 dev/pci/autri.c sc->sc_pc = pc;
sc 553 dev/pci/autri.c sc->sc_pt = pa->pa_tag;
sc 556 dev/pci/autri.c autri_init(sc);
sc 559 dev/pci/autri.c codec = &sc->sc_codec;
sc 560 dev/pci/autri.c memcpy(&codec->sc_dev, &sc->sc_dev, sizeof(codec->sc_dev));
sc 561 dev/pci/autri.c codec->sc = sc;
sc 570 dev/pci/autri.c if (sc->sc_dev.dv_cfdata->cf_flags & 0x0001)
sc 575 dev/pci/autri.c sc->sc_dev.dv_xname, r);
sc 576 dev/pci/autri.c pci_intr_disestablish(pc, sc->sc_ih);
sc 577 dev/pci/autri.c bus_space_unmap(sc->memt, sc->memh, iosize);
sc 596 dev/pci/autri.c ctl.dev = sc->sc_codec.codec_if->vtbl->get_portnum_by_name(sc->sc_codec.codec_if,
sc 599 dev/pci/autri.c ctl.dev = autri_get_portnum_by_name(sc,d[i].class,
sc 601 dev/pci/autri.c autri_mixer_set_port(sc, &ctl);
sc 610 dev/pci/autri.c ctl.dev = autri_get_portnum_by_name(sc,AudioCoutputs,AudioNmaster,NULL);
sc 611 dev/pci/autri.c autri_mixer_set_port(sc, &ctl);
sc 613 dev/pci/autri.c audio_attach_mi(&autri_hw_if, sc, &sc->sc_dev);
sc 616 dev/pci/autri.c midi_attach_mi(&autri_midi_hw_if, sc, &sc->sc_dev);
sc 619 dev/pci/autri.c sc->sc_old_power = PWR_RESUME;
sc 620 dev/pci/autri.c powerhook_establish(autri_powerhook, sc);
sc 626 dev/pci/autri.c struct autri_softc *sc = addr;
sc 628 dev/pci/autri.c if (why == PWR_RESUME && sc->sc_old_power == PWR_SUSPEND) {
sc 630 dev/pci/autri.c autri_init(sc);
sc 632 dev/pci/autri.c (sc->sc_codec.codec_if->vtbl->restore_ports)(sc->sc_codec.codec_if);
sc 634 dev/pci/autri.c sc->sc_old_power = why;
sc 641 dev/pci/autri.c struct autri_softc *sc = sc_;
sc 644 dev/pci/autri.c pci_chipset_tag_t pc = sc->sc_pc;
sc 645 dev/pci/autri.c pcitag_t pt = sc->sc_pt;
sc 651 dev/pci/autri.c switch (sc->sc_devid) {
sc 667 dev/pci/autri.c autri_reg_set_4(sc,AUTRI_DX_ACR2,0x02);
sc 684 dev/pci/autri.c autri_reg_set_4(sc,AUTRI_NX_ACR0,0x02);
sc 701 dev/pci/autri.c TWRITE1(sc, AUTRI_SIS_ACGPIO, 0);
sc 703 dev/pci/autri.c autri_reg_set_4(sc, AUTRI_LFO_GC_CIR, BANK_B_EN);
sc 720 dev/pci/autri.c autri_reg_set_4(sc, AUTRI_ALI_GCONTROL, AUTRI_ALI_GCONTROL_PCM_IN);
sc 724 dev/pci/autri.c if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) {
sc 725 dev/pci/autri.c sc->sc_play.ch = 0;
sc 726 dev/pci/autri.c sc->sc_play.ch_intr = 1;
sc 727 dev/pci/autri.c sc->sc_rec.ch = 31;
sc 728 dev/pci/autri.c sc->sc_rec.ch_intr = 2;
sc 730 dev/pci/autri.c sc->sc_play.ch = 0x20;
sc 731 dev/pci/autri.c sc->sc_play.ch_intr = 0x21;
sc 732 dev/pci/autri.c sc->sc_rec.ch = 0x22;
sc 733 dev/pci/autri.c sc->sc_rec.ch_intr = 0x23;
sc 737 dev/pci/autri.c TWRITE4(sc, AUTRI_STOP_A, 0xffffffff);
sc 738 dev/pci/autri.c TWRITE4(sc, AUTRI_STOP_B, 0xffffffff);
sc 741 dev/pci/autri.c TWRITE4(sc, AUTRI_AINTEN_A, 0);
sc 742 dev/pci/autri.c TWRITE4(sc, AUTRI_AINTEN_B, 0);
sc 746 dev/pci/autri.c if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) {
sc 747 dev/pci/autri.c TWRITE4(sc,AUTRI_NX_TLBC,0);
sc 751 dev/pci/autri.c autri_enable_loop_interrupt(sc);
sc 761 dev/pci/autri.c struct autri_softc *sc = sc_;
sc 767 dev/pci/autri.c if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018)
sc 770 dev/pci/autri.c autri_reg_set_4(sc,AUTRI_LFO_GC_CIR,reg);
sc 778 dev/pci/autri.c struct autri_softc *sc = sc_;
sc 782 dev/pci/autri.c autri_reg_clear_4(sc,AUTRI_LFO_GC_CIR,reg);
sc 790 dev/pci/autri.c struct autri_softc *sc = p;
sc 799 dev/pci/autri.c intsrc = TREAD4(sc,AUTRI_MISCINT);
sc 805 dev/pci/autri.c active[0] = TREAD4(sc,AUTRI_AIN_A);
sc 806 dev/pci/autri.c active[1] = TREAD4(sc,AUTRI_AIN_B);
sc 808 dev/pci/autri.c if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) {
sc 819 dev/pci/autri.c TWRITE4(sc, (ch & 0x20) ? AUTRI_AIN_B : AUTRI_AIN_A, mask);
sc 821 dev/pci/autri.c autri_reg_clear_4(sc,(ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A, mask);
sc 823 dev/pci/autri.c reg = TREAD4(sc,AUTRI_LFO_GC_CIR) & ~0x0000003f;
sc 824 dev/pci/autri.c TWRITE4(sc,AUTRI_LFO_GC_CIR, reg | ch);
sc 826 dev/pci/autri.c if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) {
sc 827 dev/pci/autri.c cso = TREAD4(sc, 0xe0) & 0x00ffffff;
sc 828 dev/pci/autri.c eso = TREAD4(sc, 0xe8) & 0x00ffffff;
sc 830 dev/pci/autri.c cso = (TREAD4(sc, 0xe0) >> 16) & 0x0000ffff;
sc 831 dev/pci/autri.c eso = (TREAD4(sc, 0xe8) >> 16) & 0x0000ffff;
sc 835 dev/pci/autri.c if (ch == sc->sc_play.ch_intr) {
sc 836 dev/pci/autri.c if (sc->sc_play.intr)
sc 837 dev/pci/autri.c sc->sc_play.intr(sc->sc_play.intr_arg);
sc 840 dev/pci/autri.c if (ch == sc->sc_rec.ch_intr) {
sc 841 dev/pci/autri.c if (sc->sc_rec.intr)
sc 842 dev/pci/autri.c sc->sc_rec.intr(sc->sc_rec.intr_arg);
sc 846 dev/pci/autri.c autri_reg_set_4(sc, (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A, mask);
sc 855 dev/pci/autri.c autri_reg_set_4(sc,AUTRI_MISCINT,
sc 866 dev/pci/autri.c autri_allocmem(sc, size, align, p)
sc 867 dev/pci/autri.c struct autri_softc *sc;
sc 875 dev/pci/autri.c error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0,
sc 881 dev/pci/autri.c error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size,
sc 886 dev/pci/autri.c error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size,
sc 891 dev/pci/autri.c error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL,
sc 898 dev/pci/autri.c bus_dmamap_destroy(sc->sc_dmatag, p->map);
sc 900 dev/pci/autri.c bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
sc 902 dev/pci/autri.c bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
sc 907 dev/pci/autri.c autri_freemem(sc, p)
sc 908 dev/pci/autri.c struct autri_softc *sc;
sc 911 dev/pci/autri.c bus_dmamap_unload(sc->sc_dmatag, p->map);
sc 912 dev/pci/autri.c bus_dmamap_destroy(sc->sc_dmatag, p->map);
sc 913 dev/pci/autri.c bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
sc 914 dev/pci/autri.c bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
sc 1065 dev/pci/autri.c struct autri_softc *sc = addr;
sc 1069 dev/pci/autri.c sc->sc_play.intr = NULL;
sc 1070 dev/pci/autri.c autri_stopch(sc, sc->sc_play.ch, sc->sc_play.ch_intr);
sc 1071 dev/pci/autri.c autri_disable_interrupt(sc, sc->sc_play.ch_intr);
sc 1080 dev/pci/autri.c struct autri_softc *sc = addr;
sc 1084 dev/pci/autri.c sc->sc_rec.intr = NULL;
sc 1085 dev/pci/autri.c autri_stopch(sc, sc->sc_rec.ch, sc->sc_rec.ch_intr);
sc 1086 dev/pci/autri.c autri_disable_interrupt(sc, sc->sc_rec.ch_intr);
sc 1096 dev/pci/autri.c struct autri_softc *sc = addr;
sc 1102 dev/pci/autri.c PCI_REVISION(sc->sc_class));
sc 1104 dev/pci/autri.c switch (sc->sc_devid) {
sc 1129 dev/pci/autri.c struct autri_softc *sc = addr;
sc 1131 dev/pci/autri.c return (sc->sc_codec.codec_if->vtbl->mixer_set_port(
sc 1132 dev/pci/autri.c sc->sc_codec.codec_if, cp));
sc 1140 dev/pci/autri.c struct autri_softc *sc = addr;
sc 1142 dev/pci/autri.c return (sc->sc_codec.codec_if->vtbl->mixer_get_port(
sc 1143 dev/pci/autri.c sc->sc_codec.codec_if, cp));
sc 1151 dev/pci/autri.c struct autri_softc *sc = addr;
sc 1153 dev/pci/autri.c return (sc->sc_codec.codec_if->vtbl->query_devinfo(
sc 1154 dev/pci/autri.c sc->sc_codec.codec_if, dip));
sc 1158 dev/pci/autri.c autri_get_portnum_by_name(sc, class, device, qualifier)
sc 1159 dev/pci/autri.c struct autri_softc *sc;
sc 1162 dev/pci/autri.c return (sc->sc_codec.codec_if->vtbl->get_portnum_by_name(
sc 1163 dev/pci/autri.c sc->sc_codec.codec_if, class, device, qualifier));
sc 1173 dev/pci/autri.c struct autri_softc *sc = addr;
sc 1182 dev/pci/autri.c error = autri_allocmem(sc, size, 16, p);
sc 1184 dev/pci/autri.c error = autri_allocmem(sc, size, 0x10000, p);
sc 1190 dev/pci/autri.c p->next = sc->sc_dmas;
sc 1191 dev/pci/autri.c sc->sc_dmas = p;
sc 1201 dev/pci/autri.c struct autri_softc *sc = addr;
sc 1204 dev/pci/autri.c for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
sc 1206 dev/pci/autri.c autri_freemem(sc, p);
sc 1215 dev/pci/autri.c autri_find_dma(sc, addr)
sc 1216 dev/pci/autri.c struct autri_softc *sc;
sc 1221 dev/pci/autri.c for (p = sc->sc_dmas; p && KERNADDR(p) != addr; p = p->next)
sc 1234 dev/pci/autri.c struct autri_softc *sc = addr;
sc 1240 dev/pci/autri.c p = autri_find_dma(sc, mem);
sc 1244 dev/pci/autri.c return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs,
sc 1257 dev/pci/autri.c autri_setup_channel(sc, mode, param)
sc 1258 dev/pci/autri.c struct autri_softc *sc;
sc 1301 dev/pci/autri.c chst = &sc->sc_play;
sc 1309 dev/pci/autri.c chst = &sc->sc_rec;
sc 1311 dev/pci/autri.c if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018) {
sc 1332 dev/pci/autri.c if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018)
sc 1341 dev/pci/autri.c switch (sc->sc_devid) {
sc 1375 dev/pci/autri.c reg = TREAD4(sc,AUTRI_LFO_GC_CIR) & ~0x0000003f;
sc 1376 dev/pci/autri.c TWRITE4(sc,AUTRI_LFO_GC_CIR, reg | channel);
sc 1379 dev/pci/autri.c TWRITE4(sc, AUTRI_ARAM_CR + i*sizeof(cr[0]), cr[i]);
sc 1385 dev/pci/autri.c TWRITE4(sc, AUTRI_EBUF1, AUTRI_EMOD_STILL);
sc 1386 dev/pci/autri.c TWRITE4(sc, AUTRI_EBUF2, AUTRI_EMOD_STILL);
sc 1401 dev/pci/autri.c struct autri_softc *sc = addr;
sc 1407 dev/pci/autri.c sc->sc_play.intr = intr;
sc 1408 dev/pci/autri.c sc->sc_play.intr_arg = arg;
sc 1409 dev/pci/autri.c sc->sc_play.offset = 0;
sc 1410 dev/pci/autri.c sc->sc_play.blksize = blksize;
sc 1411 dev/pci/autri.c sc->sc_play.length = (char *)end - (char *)start;
sc 1413 dev/pci/autri.c p = autri_find_dma(sc, start);
sc 1419 dev/pci/autri.c sc->sc_play.dma = p;
sc 1422 dev/pci/autri.c autri_setup_channel(sc, AUMODE_PLAY, param);
sc 1425 dev/pci/autri.c TWRITE4(sc, AUTRI_MUSICVOL_WAVEVOL, 0);
sc 1428 dev/pci/autri.c autri_enable_interrupt(sc, sc->sc_play.ch_intr);
sc 1431 dev/pci/autri.c autri_startch(sc, sc->sc_play.ch, sc->sc_play.ch_intr);
sc 1445 dev/pci/autri.c struct autri_softc *sc = addr;
sc 1451 dev/pci/autri.c sc->sc_rec.intr = intr;
sc 1452 dev/pci/autri.c sc->sc_rec.intr_arg = arg;
sc 1453 dev/pci/autri.c sc->sc_rec.offset = 0;
sc 1454 dev/pci/autri.c sc->sc_rec.blksize = blksize;
sc 1455 dev/pci/autri.c sc->sc_rec.length = (char *)end - (char *)start;
sc 1458 dev/pci/autri.c p = autri_find_dma(sc, start);
sc 1464 dev/pci/autri.c sc->sc_rec.dma = p;
sc 1467 dev/pci/autri.c if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) {
sc 1468 dev/pci/autri.c autri_reg_set_4(sc, AUTRI_NX_ACR0, AUTRI_NX_ACR0_PSB_CAPTURE);
sc 1469 dev/pci/autri.c TWRITE1(sc, AUTRI_NX_RCI3, AUTRI_NX_RCI3_ENABLE | sc->sc_rec.ch);
sc 1474 dev/pci/autri.c if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_DX ||
sc 1475 dev/pci/autri.c sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX)
sc 1479 dev/pci/autri.c autri_setup_channel(sc, AUMODE_RECORD, param);
sc 1482 dev/pci/autri.c autri_enable_interrupt(sc, sc->sc_rec.ch_intr);
sc 1485 dev/pci/autri.c autri_startch(sc, sc->sc_rec.ch, sc->sc_rec.ch_intr);
sc 1492 dev/pci/autri.c autri_halt(sc)
sc 1493 dev/pci/autri.c struct autri_softc *sc;
sc 1497 dev/pci/autri.c autri_disable_interrupt(sc, sc->sc_play.channel);
sc 1498 dev/pci/autri.c autri_disable_interrupt(sc, sc->sc_rec.channel);
sc 1504 dev/pci/autri.c autri_enable_interrupt(sc, ch)
sc 1505 dev/pci/autri.c struct autri_softc *sc;
sc 1513 dev/pci/autri.c autri_reg_set_4(sc, reg, 1 << ch);
sc 1517 dev/pci/autri.c autri_disable_interrupt(sc, ch)
sc 1518 dev/pci/autri.c struct autri_softc *sc;
sc 1526 dev/pci/autri.c autri_reg_clear_4(sc, reg, 1 << ch);
sc 1530 dev/pci/autri.c autri_startch(sc, ch, ch_intr)
sc 1531 dev/pci/autri.c struct autri_softc *sc;
sc 1541 dev/pci/autri.c autri_reg_set_4(sc, reg, chmask);
sc 1545 dev/pci/autri.c autri_stopch(sc, ch, ch_intr)
sc 1546 dev/pci/autri.c struct autri_softc *sc;
sc 1556 dev/pci/autri.c autri_reg_set_4(sc, reg, chmask);
sc 1566 dev/pci/autri.c struct autri_softc *sc = addr;
sc 1570 dev/pci/autri.c DPRINTFN(5,("MPUR1 : 0x%02X\n",TREAD1(sc,AUTRI_MPUR1)));
sc 1571 dev/pci/autri.c DPRINTFN(5,("MPUR2 : 0x%02X\n",TREAD1(sc,AUTRI_MPUR2)));
sc 1573 dev/pci/autri.c sc->sc_iintr = iintr;
sc 1574 dev/pci/autri.c sc->sc_ointr = ointr;
sc 1575 dev/pci/autri.c sc->sc_arg = arg;
sc 1578 dev/pci/autri.c autri_reg_clear_1(sc, AUTRI_MPUR2, AUTRI_MIDIIN_ENABLE_INTR);
sc 1581 dev/pci/autri.c autri_reg_set_1(sc, AUTRI_MPUR2, AUTRI_MIDIOUT_CONNECT);
sc 1589 dev/pci/autri.c struct autri_softc *sc = addr;
sc 1593 dev/pci/autri.c tsleep(sc, PWAIT, "autri", hz/10); /* give uart a chance to drain */
sc 1595 dev/pci/autri.c sc->sc_iintr = NULL;
sc 1596 dev/pci/autri.c sc->sc_ointr = NULL;
sc 1602 dev/pci/autri.c struct autri_softc *sc = addr;
sc 1606 dev/pci/autri.c if ((TREAD1(sc, AUTRI_MPUR1) & AUTRI_MIDIOUT_READY) == 0) {
sc 1607 dev/pci/autri.c TWRITE1(sc, AUTRI_MPUR0, d);
sc 45 dev/pci/autrivar.h struct autri_softc *sc;
sc 202 dev/pci/auvia.c int auvia_waitready_codec(struct auvia_softc *sc);
sc 203 dev/pci/auvia.c int auvia_waitvalid_codec(struct auvia_softc *sc);
sc 222 dev/pci/auvia.c struct auvia_softc *sc = (struct auvia_softc *) self;
sc 233 dev/pci/auvia.c sc->sc_flags |= AUVIA_FLAGS_VT8233;
sc 235 dev/pci/auvia.c if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->sc_iot,
sc 236 dev/pci/auvia.c &sc->sc_ioh, NULL, &iosize, 0)) {
sc 241 dev/pci/auvia.c sc->sc_dmat = pa->pa_dmat;
sc 242 dev/pci/auvia.c sc->sc_pc = pc;
sc 243 dev/pci/auvia.c sc->sc_pt = pt;
sc 247 dev/pci/auvia.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
sc 252 dev/pci/auvia.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, auvia_intr, sc,
sc 253 dev/pci/auvia.c sc->sc_dev.dv_xname);
sc 254 dev/pci/auvia.c if (sc->sc_ih == NULL) {
sc 259 dev/pci/auvia.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
sc 278 dev/pci/auvia.c sc->host_if.arg = sc;
sc 279 dev/pci/auvia.c sc->host_if.attach = auvia_attach_codec;
sc 280 dev/pci/auvia.c sc->host_if.read = auvia_read_codec;
sc 281 dev/pci/auvia.c sc->host_if.write = auvia_write_codec;
sc 282 dev/pci/auvia.c sc->host_if.reset = auvia_reset_codec;
sc 284 dev/pci/auvia.c if ((r = ac97_attach(&sc->host_if)) != 0) {
sc 286 dev/pci/auvia.c sc->sc_dev.dv_xname, r);
sc 287 dev/pci/auvia.c pci_intr_disestablish(pc, sc->sc_ih);
sc 288 dev/pci/auvia.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
sc 306 dev/pci/auvia.c ctl.dev = sc->codec_if->vtbl->get_portnum_by_name(sc->codec_if,
sc 308 dev/pci/auvia.c auvia_set_port(sc, &ctl);
sc 318 dev/pci/auvia.c ctl.dev = sc->codec_if->vtbl->get_portnum_by_name(sc->codec_if,
sc 320 dev/pci/auvia.c auvia_set_port(sc, &ctl);
sc 322 dev/pci/auvia.c audio_attach_mi(&auvia_hw_if, sc, &sc->sc_dev);
sc 329 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 331 dev/pci/auvia.c sc->codec_if = cif;
sc 341 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 346 dev/pci/auvia.c r = pci_conf_read(sc->sc_pc, sc->sc_pt, AUVIA_PCICONF_JUNK);
sc 349 dev/pci/auvia.c pci_conf_write(sc->sc_pc, sc->sc_pt, AUVIA_PCICONF_JUNK, r);
sc 353 dev/pci/auvia.c pci_conf_write(sc->sc_pc, sc->sc_pt, AUVIA_PCICONF_JUNK, r);
sc 356 dev/pci/auvia.c for (i = 500000; i != 0 && !(pci_conf_read(sc->sc_pc, sc->sc_pt,
sc 360 dev/pci/auvia.c printf("%s: codec reset timed out\n", sc->sc_dev.dv_xname);
sc 365 dev/pci/auvia.c auvia_waitready_codec(struct auvia_softc *sc)
sc 370 dev/pci/auvia.c for (i = 0; (i < TIMEOUT) && (bus_space_read_4(sc->sc_iot, sc->sc_ioh,
sc 375 dev/pci/auvia.c printf("%s: codec busy\n", sc->sc_dev.dv_xname);
sc 384 dev/pci/auvia.c auvia_waitvalid_codec(struct auvia_softc *sc)
sc 389 dev/pci/auvia.c for (i = 0; (i < TIMEOUT) && !(bus_space_read_4(sc->sc_iot, sc->sc_ioh,
sc 394 dev/pci/auvia.c printf("%s: codec invalid\n", sc->sc_dev.dv_xname);
sc 405 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 407 dev/pci/auvia.c if (auvia_waitready_codec(sc))
sc 410 dev/pci/auvia.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, AUVIA_CODEC_CTL,
sc 420 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 422 dev/pci/auvia.c if (auvia_waitready_codec(sc))
sc 425 dev/pci/auvia.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, AUVIA_CODEC_CTL,
sc 428 dev/pci/auvia.c if (auvia_waitready_codec(sc))
sc 431 dev/pci/auvia.c if (auvia_waitvalid_codec(sc))
sc 434 dev/pci/auvia.c *val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, AUVIA_CODEC_CTL);
sc 450 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 452 dev/pci/auvia.c auvia_halt_output(sc);
sc 453 dev/pci/auvia.c auvia_halt_input(sc);
sc 455 dev/pci/auvia.c sc->sc_play.sc_intr = NULL;
sc 456 dev/pci/auvia.c sc->sc_record.sc_intr = NULL;
sc 522 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 541 dev/pci/auvia.c if (sc->sc_flags & AUVIA_FLAGS_VT8233) {
sc 542 dev/pci/auvia.c u_int32_t v = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
sc 554 dev/pci/auvia.c bus_space_write_4(sc->sc_iot, sc->sc_ioh,
sc 558 dev/pci/auvia.c if (ac97_set_rate(sc->codec_if, p, mode))
sc 616 dev/pci/auvia.c sc->sc_play.sc_reg = regval;
sc 618 dev/pci/auvia.c sc->sc_record.sc_reg = regval;
sc 635 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 637 dev/pci/auvia.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 647 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 649 dev/pci/auvia.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 659 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 663 dev/pci/auvia.c sc->sc_flags & AUVIA_FLAGS_VT8233? "VIA VT8233" :
sc 665 dev/pci/auvia.c strncpy(retp->version, sc->sc_revision, sizeof(retp->version));
sc 676 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 678 dev/pci/auvia.c return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp));
sc 685 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 687 dev/pci/auvia.c return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp));
sc 694 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 696 dev/pci/auvia.c return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dip));
sc 703 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 713 dev/pci/auvia.c if ((error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &p->seg,
sc 716 dev/pci/auvia.c sc->sc_dev.dv_xname, error);
sc 720 dev/pci/auvia.c if ((error = bus_dmamem_map(sc->sc_dmat, &p->seg, rseg, size, &p->addr,
sc 723 dev/pci/auvia.c sc->sc_dev.dv_xname, error);
sc 727 dev/pci/auvia.c if ((error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 730 dev/pci/auvia.c sc->sc_dev.dv_xname, error);
sc 734 dev/pci/auvia.c if ((error = bus_dmamap_load(sc->sc_dmat, p->map, p->addr, size, NULL,
sc 737 dev/pci/auvia.c sc->sc_dev.dv_xname, error);
sc 741 dev/pci/auvia.c p->next = sc->sc_dmas;
sc 742 dev/pci/auvia.c sc->sc_dmas = p;
sc 748 dev/pci/auvia.c bus_dmamap_destroy(sc->sc_dmat, p->map);
sc 750 dev/pci/auvia.c bus_dmamem_unmap(sc->sc_dmat, p->addr, size);
sc 752 dev/pci/auvia.c bus_dmamem_free(sc->sc_dmat, &p->seg, 1);
sc 762 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 765 dev/pci/auvia.c for (pp = &(sc->sc_dmas); (p = *pp) != NULL; pp = &p->next)
sc 767 dev/pci/auvia.c bus_dmamap_unload(sc->sc_dmat, p->map);
sc 768 dev/pci/auvia.c bus_dmamap_destroy(sc->sc_dmat, p->map);
sc 769 dev/pci/auvia.c bus_dmamem_unmap(sc->sc_dmat, p->addr, p->size);
sc 770 dev/pci/auvia.c bus_dmamem_free(sc->sc_dmat, &p->seg, 1);
sc 783 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 789 dev/pci/auvia.c for (p = sc->sc_dmas; p && p->addr != mem; p = p->next)
sc 795 dev/pci/auvia.c return bus_dmamem_mmap(sc->sc_dmat, &p->seg, 1, off, prot,
sc 809 dev/pci/auvia.c auvia_build_dma_ops(struct auvia_softc *sc, struct auvia_softc_chan *ch,
sc 825 dev/pci/auvia.c auvia_free(sc, ch->sc_dma_ops, M_DEVBUF);
sc 827 dev/pci/auvia.c ch->sc_dma_ops = auvia_malloc(sc, 0,
sc 830 dev/pci/auvia.c for (dp = sc->sc_dmas; dp &&
sc 836 dev/pci/auvia.c "address (%p)", sc->sc_dev.dv_xname,
sc 863 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 864 dev/pci/auvia.c struct auvia_softc_chan *ch = &(sc->sc_play);
sc 867 dev/pci/auvia.c for (p = sc->sc_dmas; p && p->addr != start; p = p->next)
sc 874 dev/pci/auvia.c if (auvia_build_dma_ops(sc, ch, p, start, end, blksize)) {
sc 881 dev/pci/auvia.c bus_space_write_4(sc->sc_iot, sc->sc_ioh,
sc 885 dev/pci/auvia.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 888 dev/pci/auvia.c if (sc->sc_flags & AUVIA_FLAGS_VT8233) {
sc 889 dev/pci/auvia.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 891 dev/pci/auvia.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 893 dev/pci/auvia.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 898 dev/pci/auvia.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 909 dev/pci/auvia.c struct auvia_softc *sc = addr;
sc 910 dev/pci/auvia.c struct auvia_softc_chan *ch = &(sc->sc_record);
sc 913 dev/pci/auvia.c for (p = sc->sc_dmas; p && p->addr != start; p = p->next)
sc 920 dev/pci/auvia.c if (auvia_build_dma_ops(sc, ch, p, start, end, blksize))
sc 926 dev/pci/auvia.c bus_space_write_4(sc->sc_iot, sc->sc_ioh,
sc 929 dev/pci/auvia.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 932 dev/pci/auvia.c if (sc->sc_flags & AUVIA_FLAGS_VT8233) {
sc 933 dev/pci/auvia.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 935 dev/pci/auvia.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 937 dev/pci/auvia.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 942 dev/pci/auvia.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 952 dev/pci/auvia.c struct auvia_softc *sc = arg;
sc 956 dev/pci/auvia.c r = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 959 dev/pci/auvia.c if (sc->sc_record.sc_intr)
sc 960 dev/pci/auvia.c sc->sc_record.sc_intr(sc->sc_record.sc_arg);
sc 963 dev/pci/auvia.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 968 dev/pci/auvia.c r = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 971 dev/pci/auvia.c if (sc->sc_play.sc_intr)
sc 972 dev/pci/auvia.c sc->sc_play.sc_intr(sc->sc_play.sc_arg);
sc 975 dev/pci/auvia.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 209 dev/pci/azalia.c #define XNAME(sc) ((sc)->dev.dv_xname)
sc 364 dev/pci/azalia.c azalia_t *sc;
sc 370 dev/pci/azalia.c sc = (azalia_t*)self;
sc 373 dev/pci/azalia.c sc->dmat = pa->pa_dmat;
sc 378 dev/pci/azalia.c &sc->iot, &sc->ioh, NULL, &sc->map_size, 0)) {
sc 396 dev/pci/azalia.c sc->pc = pa->pa_pc;
sc 398 dev/pci/azalia.c sc->ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, azalia_intr,
sc 399 dev/pci/azalia.c sc, sc->dev.dv_xname);
sc 400 dev/pci/azalia.c if (sc->ih == NULL) {
sc 409 dev/pci/azalia.c sc->pciid = pa->pa_id;
sc 411 dev/pci/azalia.c if (azalia_attach(sc)) {
sc 412 dev/pci/azalia.c printf("%s: initialization failure\n", XNAME(sc));
sc 416 dev/pci/azalia.c sc->subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
sc 424 dev/pci/azalia.c azalia_t *sc;
sc 427 dev/pci/azalia.c sc = (azalia_t*)self;
sc 433 dev/pci/azalia.c if (sc->audiodev != NULL)
sc 434 dev/pci/azalia.c ret = config_deactivate(sc->audiodev);
sc 110 dev/pci/bha_pci.c struct bha_softc *sc = (void *)self;
sc 132 dev/pci/bha_pci.c sc->sc_iot = iot;
sc 133 dev/pci/bha_pci.c sc->sc_ioh = ioh;
sc 134 dev/pci/bha_pci.c sc->sc_dmat = pa->pa_dmat;
sc 141 dev/pci/bha_pci.c sc->sc_dmaflags = 0;
sc 149 dev/pci/bha_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, bha_intr, sc,
sc 150 dev/pci/bha_pci.c sc->sc_dev.dv_xname);
sc 151 dev/pci/bha_pci.c if (sc->sc_ih == NULL) {
sc 161 dev/pci/bha_pci.c bha_attach(sc, &bpd);
sc 163 dev/pci/bha_pci.c bha_disable_isacompat(sc);
sc 493 dev/pci/bktr/bktr_os.c struct bktr_softc *sc = v;
sc 494 dev/pci/bktr/bktr_os.c struct TVTUNER *tv = &sc->tuner;
sc 500 dev/pci/bktr/bktr_os.c set_audio(sc, AUDIO_MUTE);
sc 503 dev/pci/bktr/bktr_os.c set_audio(sc, AUDIO_UNMUTE);
sc 504 dev/pci/bktr/bktr_os.c init_audio_devices(sc);
sc 507 dev/pci/bktr/bktr_os.c set_audio(sc, AUDIO_INTERN); /* use internal audio */
sc 508 dev/pci/bktr/bktr_os.c temp_mute(sc, TRUE);
sc 518 dev/pci/bktr/bktr_os.c ri->chan = tv_channel(sc, chan);
sc 531 dev/pci/bktr/bktr_os.c ri->freq = tv_freq(sc, freq, FM_RADIO_FREQUENCY) * 10;
sc 543 dev/pci/bktr/bktr_os.c temp_mute(sc, FALSE);
sc 551 dev/pci/bktr/bktr_os.c struct bktr_softc *sc = v;
sc 552 dev/pci/bktr/bktr_os.c struct TVTUNER *tv = &sc->tuner;
sc 555 dev/pci/bktr/bktr_os.c status = get_tuner_status(sc);
sc 558 dev/pci/bktr/bktr_os.c ri->mute = (int)sc->audio_mute_state ? 1 : 0;
sc 448 dev/pci/bktr/bktr_reg.h #define INB(sc,o) (({ \
sc 450 dev/pci/bktr/bktr_reg.h __v = bus_space_read_1((sc)->memt, (sc)->memh, (o)); \
sc 451 dev/pci/bktr/bktr_reg.h bus_space_barrier((sc)->memt, (sc)->memh, (o), 1, \
sc 455 dev/pci/bktr/bktr_reg.h #define INW(sc,o) (({ \
sc 457 dev/pci/bktr/bktr_reg.h __v = bus_space_read_2((sc)->memt, (sc)->memh, (o)); \
sc 458 dev/pci/bktr/bktr_reg.h bus_space_barrier((sc)->memt, (sc)->memh, (o), 4, \
sc 462 dev/pci/bktr/bktr_reg.h #define INL(sc,o) (({ \
sc 464 dev/pci/bktr/bktr_reg.h __v = bus_space_read_4((sc)->memt, (sc)->memh, (o)); \
sc 465 dev/pci/bktr/bktr_reg.h bus_space_barrier((sc)->memt, (sc)->memh, (o), 4, \
sc 469 dev/pci/bktr/bktr_reg.h #define OUTB(sc,o,v) do { \
sc 470 dev/pci/bktr/bktr_reg.h bus_space_write_1((sc)->memt, (sc)->memh, (o), (v)); \
sc 471 dev/pci/bktr/bktr_reg.h bus_space_barrier((sc)->memt, (sc)->memh, (o), 1, \
sc 474 dev/pci/bktr/bktr_reg.h #define OUTW(sc,o,v) do { \
sc 475 dev/pci/bktr/bktr_reg.h bus_space_write_2((sc)->memt, (sc)->memh, (o), (v)); \
sc 476 dev/pci/bktr/bktr_reg.h bus_space_barrier((sc)->memt, (sc)->memh, (o), 2, \
sc 479 dev/pci/bktr/bktr_reg.h #define OUTL(sc,o,v) do { \
sc 480 dev/pci/bktr/bktr_reg.h bus_space_write_4((sc)->memt, (sc)->memh, (o), (v)); \
sc 481 dev/pci/bktr/bktr_reg.h bus_space_barrier((sc)->memt, (sc)->memh, (o), 4, \
sc 169 dev/pci/cac_pci.c struct cac_softc *sc;
sc 177 dev/pci/cac_pci.c sc = (struct cac_softc *)self;
sc 202 dev/pci/cac_pci.c &sc->sc_iot, &sc->sc_ioh, NULL, &size, 0))
sc 209 dev/pci/cac_pci.c &sc->sc_iot, &sc->sc_ioh, NULL, &size, 0))
sc 216 dev/pci/cac_pci.c sc->sc_dmat = pa->pa_dmat;
sc 221 dev/pci/cac_pci.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
sc 225 dev/pci/cac_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, cac_intr,
sc 226 dev/pci/cac_pci.c sc, sc->sc_dv.dv_xname);
sc 227 dev/pci/cac_pci.c if (sc->sc_ih == NULL) {
sc 232 dev/pci/cac_pci.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
sc 239 dev/pci/cac_pci.c sc->sc_cl = ct->ct_linkage;
sc 240 dev/pci/cac_pci.c cac_init(sc, (ct->ct_flags & CT_STARTFW) != 0);
sc 244 dev/pci/cac_pci.c cac_pci_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb)
sc 247 dev/pci/cac_pci.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0,
sc 248 dev/pci/cac_pci.c sc->sc_dmamap->dm_mapsize,
sc 250 dev/pci/cac_pci.c cac_outl(sc, CAC_42REG_CMD_FIFO, ccb->ccb_paddr);
sc 254 dev/pci/cac_pci.c cac_pci_l0_completed(struct cac_softc *sc)
sc 259 dev/pci/cac_pci.c if ((off = cac_inl(sc, CAC_42REG_DONE_FIFO)) == 0xffffffffU)
sc 262 dev/pci/cac_pci.c cac_outl(sc, CAC_42REG_DONE_FIFO, 0);
sc 263 dev/pci/cac_pci.c off = (off & ~3) - sc->sc_ccbs_paddr;
sc 264 dev/pci/cac_pci.c ccb = (struct cac_ccb *)(sc->sc_ccbs + off);
sc 266 dev/pci/cac_pci.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0,
sc 267 dev/pci/cac_pci.c sc->sc_dmamap->dm_mapsize,
sc 274 dev/pci/cac_pci.c cac_pci_l0_intr_pending(struct cac_softc *sc)
sc 277 dev/pci/cac_pci.c return ((cac_inl(sc, CAC_42REG_STATUS) & CAC_42_EXTINT) != 0);
sc 281 dev/pci/cac_pci.c cac_pci_l0_intr_enable(struct cac_softc *sc, int state)
sc 284 dev/pci/cac_pci.c cac_outl(sc, CAC_42REG_INTR_MASK, (state ? 0 : 8)); /* XXX */
sc 288 dev/pci/cac_pci.c cac_pci_l0_fifo_full(struct cac_softc *sc)
sc 291 dev/pci/cac_pci.c return (cac_inl(sc, CAC_42REG_CMD_FIFO) != 0);
sc 95 dev/pci/ciss_pci.c struct ciss_softc *sc = (struct ciss_softc *)self;
sc 110 dev/pci/ciss_pci.c &sc->iot, &sc->ioh, NULL, &size, 0)) {
sc 114 dev/pci/ciss_pci.c sc->dmat = pa->pa_dmat;
sc 116 dev/pci/ciss_pci.c sc->iem = CISS_READYENA;
sc 122 dev/pci/ciss_pci.c sc->iem = CISS_READYENAB;
sc 124 dev/pci/ciss_pci.c cfg_bar = bus_space_read_2(sc->iot, sc->ioh, CISS_CFG_BAR);
sc 125 dev/pci/ciss_pci.c sc->cfgoff = bus_space_read_4(sc->iot, sc->ioh, CISS_CFG_OFF);
sc 128 dev/pci/ciss_pci.c NULL, &sc->cfg_ioh, NULL, &cfgsz, 0)) {
sc 130 dev/pci/ciss_pci.c bus_space_unmap(sc->iot, sc->ioh, size);
sc 134 dev/pci/ciss_pci.c sc->cfg_ioh = sc->ioh;
sc 138 dev/pci/ciss_pci.c if (sc->cfgoff + sizeof(struct ciss_config) > cfgsz) {
sc 140 dev/pci/ciss_pci.c bus_space_unmap(sc->iot, sc->ioh, size);
sc 142 dev/pci/ciss_pci.c bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
sc 147 dev/pci/ciss_pci.c bus_space_write_4(sc->iot, sc->ioh, CISS_IMR,
sc 148 dev/pci/ciss_pci.c bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) | sc->iem);
sc 152 dev/pci/ciss_pci.c bus_space_unmap(sc->iot, sc->ioh, size);
sc 154 dev/pci/ciss_pci.c bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
sc 158 dev/pci/ciss_pci.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ciss_intr, sc,
sc 159 dev/pci/ciss_pci.c sc->sc_dev.dv_xname);
sc 160 dev/pci/ciss_pci.c if (!sc->sc_ih) {
sc 165 dev/pci/ciss_pci.c bus_space_unmap(sc->iot, sc->ioh, size);
sc 167 dev/pci/ciss_pci.c bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
sc 170 dev/pci/ciss_pci.c printf(": %s\n%s", intrstr, sc->sc_dev.dv_xname);
sc 172 dev/pci/ciss_pci.c if (ciss_attach(sc)) {
sc 173 dev/pci/ciss_pci.c pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
sc 174 dev/pci/ciss_pci.c sc->sc_ih = NULL;
sc 175 dev/pci/ciss_pci.c bus_space_unmap(sc->iot, sc->ioh, size);
sc 177 dev/pci/ciss_pci.c bus_space_unmap(sc->iot, sc->cfg_ioh, cfgsz);
sc 182 dev/pci/ciss_pci.c bus_space_write_4(sc->iot, sc->ioh, CISS_IMR,
sc 183 dev/pci/ciss_pci.c bus_space_read_4(sc->iot, sc->ioh, CISS_IMR) & ~sc->iem);
sc 206 dev/pci/cmpci.c cmpci_mixerreg_read(struct cmpci_softc *sc, uint8_t no)
sc 210 dev/pci/cmpci.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
sc 212 dev/pci/cmpci.c ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA);
sc 218 dev/pci/cmpci.c cmpci_mixerreg_write(struct cmpci_softc *sc, uint8_t no, uint8_t val)
sc 220 dev/pci/cmpci.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBADDR, no);
sc 222 dev/pci/cmpci.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_SBDATA, val);
sc 228 dev/pci/cmpci.c cmpci_reg_partial_write_1(struct cmpci_softc *sc, int no, int shift,
sc 231 dev/pci/cmpci.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
sc 233 dev/pci/cmpci.c (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
sc 238 dev/pci/cmpci.c cmpci_reg_partial_write_4(struct cmpci_softc *sc, int no, int shift,
sc 241 dev/pci/cmpci.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
sc 243 dev/pci/cmpci.c (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~(mask<<shift)));
sc 249 dev/pci/cmpci.c cmpci_reg_set_1(struct cmpci_softc *sc, int no, uint8_t mask)
sc 251 dev/pci/cmpci.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
sc 252 dev/pci/cmpci.c (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) | mask));
sc 257 dev/pci/cmpci.c cmpci_reg_clear_1(struct cmpci_softc *sc, int no, uint8_t mask)
sc 259 dev/pci/cmpci.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, no,
sc 260 dev/pci/cmpci.c (bus_space_read_1(sc->sc_iot, sc->sc_ioh, no) & ~mask));
sc 265 dev/pci/cmpci.c cmpci_reg_set_4(struct cmpci_softc *sc, int no, uint32_t mask)
sc 270 dev/pci/cmpci.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
sc 271 dev/pci/cmpci.c (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) | mask));
sc 276 dev/pci/cmpci.c cmpci_reg_clear_4(struct cmpci_softc *sc, int no, uint32_t mask)
sc 281 dev/pci/cmpci.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, no,
sc 282 dev/pci/cmpci.c (bus_space_read_4(sc->sc_iot, sc->sc_ioh, no) & ~mask));
sc 291 dev/pci/cmpci.c cmpci_reg_set_reg_misc(struct cmpci_softc *sc, uint32_t mask)
sc 293 dev/pci/cmpci.c sc->sc_reg_misc |= mask;
sc 294 dev/pci/cmpci.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
sc 295 dev/pci/cmpci.c sc->sc_reg_misc);
sc 300 dev/pci/cmpci.c cmpci_reg_clear_reg_misc(struct cmpci_softc *sc, uint32_t mask)
sc 302 dev/pci/cmpci.c sc->sc_reg_misc &= ~mask;
sc 303 dev/pci/cmpci.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MISC,
sc 304 dev/pci/cmpci.c sc->sc_reg_misc);
sc 370 dev/pci/cmpci.c struct cmpci_softc *sc = (struct cmpci_softc *)self;
sc 377 dev/pci/cmpci.c sc->sc_id = pa->pa_id;
sc 378 dev/pci/cmpci.c sc->sc_class = pa->pa_class;
sc 379 dev/pci/cmpci.c switch (PCI_PRODUCT(sc->sc_id)) {
sc 383 dev/pci/cmpci.c sc->sc_capable = CMPCI_CAP_CMI8338;
sc 388 dev/pci/cmpci.c sc->sc_capable = CMPCI_CAP_CMI8738;
sc 394 dev/pci/cmpci.c &sc->sc_iot, &sc->sc_ioh, NULL, NULL, 0)) {
sc 405 dev/pci/cmpci.c sc->sc_ih=pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, cmpci_intr, sc,
sc 406 dev/pci/cmpci.c sc->sc_dev.dv_xname);
sc 407 dev/pci/cmpci.c if (sc->sc_ih == NULL) {
sc 416 dev/pci/cmpci.c sc->sc_dmat = pa->pa_dmat;
sc 418 dev/pci/cmpci.c audio_attach_mi(&cmpci_hw_if, sc, &sc->sc_dev);
sc 424 dev/pci/cmpci.c (void)config_found(&sc->sc_dev, &aa, audioprint);
sc 430 dev/pci/cmpci.c if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
sc 431 dev/pci/cmpci.c CMPCI_REG_MPU_BASE, CMPCI_REG_MPU_SIZE, &sc->sc_mpu_ioh) == 0)
sc 432 dev/pci/cmpci.c sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint);
sc 435 dev/pci/cmpci.c sc->sc_reg_misc = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
sc 438 dev/pci/cmpci.c cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_RESET, 0);
sc 439 dev/pci/cmpci.c cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, 0);
sc 440 dev/pci/cmpci.c cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, 0);
sc 441 dev/pci/cmpci.c cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX,
sc 498 dev/pci/cmpci.c sc->sc_gain[i][CMPCI_LEFT] = sc->sc_gain[i][CMPCI_RIGHT] = v;
sc 499 dev/pci/cmpci.c cmpci_set_mixer_gain(sc, i);
sc 506 dev/pci/cmpci.c struct cmpci_softc *sc = handle;
sc 509 dev/pci/cmpci.c intrstat = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
sc 519 dev/pci/cmpci.c cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
sc 522 dev/pci/cmpci.c cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL,
sc 526 dev/pci/cmpci.c if (sc->sc_play.intr != NULL)
sc 527 dev/pci/cmpci.c (*sc->sc_play.intr)(sc->sc_play.intr_arg);
sc 530 dev/pci/cmpci.c if (sc->sc_rec.intr != NULL)
sc 531 dev/pci/cmpci.c (*sc->sc_rec.intr)(sc->sc_rec.intr_arg);
sc 536 dev/pci/cmpci.c cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
sc 539 dev/pci/cmpci.c cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL,
sc 543 dev/pci/cmpci.c if (intrstat & CMPCI_REG_UART_INTR && sc->sc_mpudev != NULL)
sc 544 dev/pci/cmpci.c mpu_intr(sc->sc_mpudev);
sc 625 dev/pci/cmpci.c struct cmpci_softc *sc = handle;
sc 749 dev/pci/cmpci.c cmpci_reg_partial_write_4(sc,
sc 754 dev/pci/cmpci.c cmpci_reg_partial_write_4(sc,
sc 763 dev/pci/cmpci.c sc->sc_dev.dv_xname, (int)p->sample_rate, md_divide));
sc 765 dev/pci/cmpci.c cmpci_reg_partial_write_4(sc,
sc 768 dev/pci/cmpci.c sc->sc_play.md_divide = md_divide;
sc 770 dev/pci/cmpci.c cmpci_reg_partial_write_4(sc,
sc 773 dev/pci/cmpci.c sc->sc_rec.md_divide = md_divide;
sc 775 dev/pci/cmpci.c cmpci_set_out_ports(sc);
sc 776 dev/pci/cmpci.c cmpci_set_in_ports(sc);
sc 791 dev/pci/cmpci.c struct cmpci_softc *sc = handle;
sc 795 dev/pci/cmpci.c sc->sc_play.intr = NULL;
sc 796 dev/pci/cmpci.c cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
sc 797 dev/pci/cmpci.c cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
sc 799 dev/pci/cmpci.c cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
sc 801 dev/pci/cmpci.c cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_RESET);
sc 810 dev/pci/cmpci.c struct cmpci_softc *sc = handle;
sc 814 dev/pci/cmpci.c sc->sc_rec.intr = NULL;
sc 815 dev/pci/cmpci.c cmpci_reg_clear_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
sc 816 dev/pci/cmpci.c cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
sc 818 dev/pci/cmpci.c cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
sc 820 dev/pci/cmpci.c cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_RESET);
sc 830 dev/pci/cmpci.c struct cmpci_softc *sc = handle;
sc 834 dev/pci/cmpci.c PCI_REVISION(sc->sc_class));
sc 835 dev/pci/cmpci.c switch (PCI_PRODUCT(sc->sc_id)) {
sc 867 dev/pci/cmpci.c struct cmpci_softc *sc = handle;
sc 994 dev/pci/cmpci.c if (CMPCI_ISCAP(sc, 2ND_SPDIN)) {
sc 1105 dev/pci/cmpci.c cmpci_alloc_dmamem(struct cmpci_softc *sc, size_t size, int type, int flags,
sc 1121 dev/pci/cmpci.c n->cd_tag = sc->sc_dmat;
sc 1141 dev/pci/cmpci.c n->cd_next = sc->sc_dmap;
sc 1142 dev/pci/cmpci.c sc->sc_dmap = n;
sc 1160 dev/pci/cmpci.c cmpci_free_dmamem(struct cmpci_softc *sc, caddr_t addr, int type)
sc 1164 dev/pci/cmpci.c for (nnp = &sc->sc_dmap; *nnp; nnp = &(*nnp)->cd_next) {
sc 1180 dev/pci/cmpci.c cmpci_find_dmamem(struct cmpci_softc *sc, caddr_t addr)
sc 1184 dev/pci/cmpci.c for (p = sc->sc_dmap; p; p = p->cd_next) {
sc 1231 dev/pci/cmpci.c cmpci_set_mixer_gain(struct cmpci_softc *sc, int port)
sc 1238 dev/pci/cmpci.c cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_MIC,
sc 1239 dev/pci/cmpci.c CMPCI_ADJUST_MIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
sc 1248 dev/pci/cmpci.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, CMPCI_REG_MIXER_AUX,
sc 1249 dev/pci/cmpci.c CMPCI_ADJUST_AUX_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT],
sc 1250 dev/pci/cmpci.c sc->sc_gain[port][CMPCI_RIGHT]));
sc 1253 dev/pci/cmpci.c cmpci_reg_partial_write_1(sc, CMPCI_REG_MIXER25,
sc 1255 dev/pci/cmpci.c CMPCI_ADJUST_ADMIC_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
sc 1267 dev/pci/cmpci.c cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_SPEAKER,
sc 1268 dev/pci/cmpci.c CMPCI_ADJUST_2_GAIN(sc, sc->sc_gain[port][CMPCI_LR]));
sc 1271 dev/pci/cmpci.c if (sc->sc_gain[port][CMPCI_LR])
sc 1272 dev/pci/cmpci.c cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
sc 1275 dev/pci/cmpci.c cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
sc 1280 dev/pci/cmpci.c if (sc->sc_gain[port][CMPCI_LR])
sc 1281 dev/pci/cmpci.c cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
sc 1284 dev/pci/cmpci.c cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
sc 1288 dev/pci/cmpci.c if (sc->sc_gain[port][CMPCI_LR])
sc 1289 dev/pci/cmpci.c cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
sc 1292 dev/pci/cmpci.c cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
sc 1296 dev/pci/cmpci.c if (sc->sc_gain[port][CMPCI_LR])
sc 1297 dev/pci/cmpci.c cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
sc 1300 dev/pci/cmpci.c cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
sc 1312 dev/pci/cmpci.c bits = cmpci_mixerreg_read(sc, CMPCI_SB16_MIXER_OUTMIX);
sc 1313 dev/pci/cmpci.c if (sc->sc_gain[port][CMPCI_LR])
sc 1317 dev/pci/cmpci.c cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_OUTMIX, bits);
sc 1325 dev/pci/cmpci.c cmpci_set_out_ports(sc);
sc 1328 dev/pci/cmpci.c if (CMPCI_ISCAP(sc, SPDOUT_VOLTAGE)) {
sc 1329 dev/pci/cmpci.c if (sc->sc_gain[CMPCI_SPDIF_OUT_VOLTAGE][CMPCI_LR]
sc 1331 dev/pci/cmpci.c cmpci_reg_clear_reg_misc(sc, CMPCI_REG_5V);
sc 1333 dev/pci/cmpci.c cmpci_reg_set_reg_misc(sc, CMPCI_REG_5V);
sc 1337 dev/pci/cmpci.c if (CMPCI_ISCAP(sc, SURROUND)) {
sc 1338 dev/pci/cmpci.c if (sc->sc_gain[CMPCI_SURROUND][CMPCI_LR])
sc 1339 dev/pci/cmpci.c cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
sc 1342 dev/pci/cmpci.c cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
sc 1347 dev/pci/cmpci.c if (CMPCI_ISCAP(sc, REAR)) {
sc 1348 dev/pci/cmpci.c if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
sc 1349 dev/pci/cmpci.c cmpci_reg_set_reg_misc(sc, CMPCI_REG_N4SPK3D);
sc 1351 dev/pci/cmpci.c cmpci_reg_clear_reg_misc(sc, CMPCI_REG_N4SPK3D);
sc 1355 dev/pci/cmpci.c if (CMPCI_ISCAP(sc, INDIVIDUAL_REAR)) {
sc 1356 dev/pci/cmpci.c if (sc->sc_gain[CMPCI_REAR][CMPCI_LR])
sc 1357 dev/pci/cmpci.c cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
sc 1360 dev/pci/cmpci.c cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
sc 1365 dev/pci/cmpci.c if (CMPCI_ISCAP(sc, REVERSE_FR)) {
sc 1366 dev/pci/cmpci.c if (sc->sc_gain[CMPCI_REVERSE][CMPCI_LR])
sc 1367 dev/pci/cmpci.c cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
sc 1370 dev/pci/cmpci.c cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
sc 1375 dev/pci/cmpci.c if (CMPCI_ISCAP(sc, SPDIN_PHASE)) {
sc 1376 dev/pci/cmpci.c if (sc->sc_gain[CMPCI_SPDIF_IN_PHASE][CMPCI_LR]
sc 1378 dev/pci/cmpci.c cmpci_reg_clear_1(sc, CMPCI_REG_CHANNEL_FORMAT,
sc 1381 dev/pci/cmpci.c cmpci_reg_set_1(sc, CMPCI_REG_CHANNEL_FORMAT,
sc 1389 dev/pci/cmpci.c cmpci_mixerreg_write(sc, src,
sc 1390 dev/pci/cmpci.c CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_LEFT]));
sc 1391 dev/pci/cmpci.c cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_L_TO_R(src),
sc 1392 dev/pci/cmpci.c CMPCI_ADJUST_GAIN(sc, sc->sc_gain[port][CMPCI_RIGHT]));
sc 1396 dev/pci/cmpci.c cmpci_set_out_ports(struct cmpci_softc *sc)
sc 1401 dev/pci/cmpci.c if (!CMPCI_ISCAP(sc, SPDLOOP))
sc 1405 dev/pci/cmpci.c if (sc->sc_gain[CMPCI_SPDIF_LOOP][CMPCI_LR] == CMPCI_SPDIF_LOOP_OFF) {
sc 1407 dev/pci/cmpci.c cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
sc 1410 dev/pci/cmpci.c cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF_LOOP);
sc 1414 dev/pci/cmpci.c v = sc->sc_gain[CMPCI_SPDIF_IN_SELECT][CMPCI_LR];
sc 1416 dev/pci/cmpci.c cmpci_reg_set_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
sc 1418 dev/pci/cmpci.c cmpci_reg_clear_reg_misc(sc, CMPCI_REG_2ND_SPDIFIN);
sc 1420 dev/pci/cmpci.c cmpci_reg_set_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
sc 1422 dev/pci/cmpci.c cmpci_reg_clear_reg_misc(sc, CMPCI_REG_SPDFLOOPI);
sc 1425 dev/pci/cmpci.c if (CMPCI_ISCAP(sc, SPDOUT) &&
sc 1426 dev/pci/cmpci.c sc->sc_gain[CMPCI_PLAYBACK_MODE][CMPCI_LR]
sc 1428 dev/pci/cmpci.c (sc->sc_play.md_divide == CMPCI_REG_RATE_44100 ||
sc 1429 dev/pci/cmpci.c (CMPCI_ISCAP(sc, SPDOUT_48K) &&
sc 1430 dev/pci/cmpci.c sc->sc_play.md_divide==CMPCI_REG_RATE_48000))) {
sc 1432 dev/pci/cmpci.c cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1, CMPCI_REG_SPDIF0_ENABLE);
sc 1434 dev/pci/cmpci.c if (sc->sc_play.md_divide==CMPCI_REG_RATE_48000)
sc 1435 dev/pci/cmpci.c cmpci_reg_set_reg_misc(sc,
sc 1438 dev/pci/cmpci.c cmpci_reg_clear_reg_misc(sc,
sc 1442 dev/pci/cmpci.c cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
sc 1444 dev/pci/cmpci.c if (CMPCI_ISCAP(sc, SPDOUT_48K))
sc 1445 dev/pci/cmpci.c cmpci_reg_clear_reg_misc(sc,
sc 1450 dev/pci/cmpci.c if (CMPCI_ISCAP(sc, SPDLEGACY)) {
sc 1451 dev/pci/cmpci.c if (sc->sc_gain[CMPCI_SPDIF_OUT_PLAYBACK][CMPCI_LR]
sc 1453 dev/pci/cmpci.c cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
sc 1456 dev/pci/cmpci.c cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
sc 1463 dev/pci/cmpci.c if (CMPCI_ISCAP(sc, XSPDOUT) && enspdout)
sc 1464 dev/pci/cmpci.c cmpci_reg_set_4(sc, CMPCI_REG_LEGACY_CTRL,
sc 1467 dev/pci/cmpci.c cmpci_reg_clear_4(sc, CMPCI_REG_LEGACY_CTRL,
sc 1471 dev/pci/cmpci.c if (CMPCI_ISCAP(sc, SPDIN_MONITOR)) {
sc 1472 dev/pci/cmpci.c v = sc->sc_gain[CMPCI_MONITOR_DAC][CMPCI_LR];
sc 1474 dev/pci/cmpci.c cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
sc 1477 dev/pci/cmpci.c cmpci_reg_set_4(sc, CMPCI_REG_FUNC_1,
sc 1480 dev/pci/cmpci.c cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_1,
sc 1483 dev/pci/cmpci.c cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
sc 1489 dev/pci/cmpci.c cmpci_set_in_ports(struct cmpci_softc *sc)
sc 1494 dev/pci/cmpci.c mask = sc->sc_in_mask;
sc 1509 dev/pci/cmpci.c cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_L, bitsl);
sc 1510 dev/pci/cmpci.c cmpci_mixerreg_write(sc, CMPCI_SB16_MIXER_ADCMIX_R, bitsr);
sc 1513 dev/pci/cmpci.c cmpci_reg_set_1(sc, CMPCI_REG_MIXER25,
sc 1516 dev/pci/cmpci.c cmpci_reg_clear_1(sc, CMPCI_REG_MIXER25,
sc 1520 dev/pci/cmpci.c cmpci_reg_set_1(sc, CMPCI_REG_MIXER24,
sc 1523 dev/pci/cmpci.c cmpci_reg_clear_1(sc, CMPCI_REG_MIXER24,
sc 1526 dev/pci/cmpci.c if (CMPCI_ISCAP(sc, SPDIN) &&
sc 1527 dev/pci/cmpci.c (sc->sc_rec.md_divide == CMPCI_REG_RATE_44100 ||
sc 1528 dev/pci/cmpci.c (CMPCI_ISCAP(sc, SPDOUT_48K) &&
sc 1529 dev/pci/cmpci.c sc->sc_rec.md_divide == CMPCI_REG_RATE_48000/* XXX? */))) {
sc 1532 dev/pci/cmpci.c cmpci_reg_set_4(sc,
sc 1536 dev/pci/cmpci.c cmpci_reg_clear_4(sc,
sc 1548 dev/pci/cmpci.c struct cmpci_softc *sc = handle;
sc 1578 dev/pci/cmpci.c sc->sc_gain[cp->dev][CMPCI_LEFT] = lgain;
sc 1579 dev/pci/cmpci.c sc->sc_gain[cp->dev][CMPCI_RIGHT] = rgain;
sc 1581 dev/pci/cmpci.c cmpci_set_mixer_gain(sc, cp->dev);
sc 1597 dev/pci/cmpci.c sc->sc_in_mask = cp->un.mask;
sc 1598 dev/pci/cmpci.c return cmpci_set_in_ports(sc);
sc 1619 dev/pci/cmpci.c sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord != 0;
sc 1620 dev/pci/cmpci.c cmpci_set_mixer_gain(sc, cp->dev);
sc 1645 dev/pci/cmpci.c sc->sc_gain[cp->dev][CMPCI_LR] = cp->un.ord;
sc 1646 dev/pci/cmpci.c cmpci_set_mixer_gain(sc, cp->dev);
sc 1659 dev/pci/cmpci.c struct cmpci_softc *sc = handle;
sc 1677 dev/pci/cmpci.c sc->sc_gain[cp->dev][CMPCI_LEFT];
sc 1681 dev/pci/cmpci.c sc->sc_gain[cp->dev][CMPCI_LEFT];
sc 1683 dev/pci/cmpci.c sc->sc_gain[cp->dev][CMPCI_RIGHT];
sc 1691 dev/pci/cmpci.c cp->un.mask = sc->sc_in_mask;
sc 1712 dev/pci/cmpci.c cp->un.ord = sc->sc_gain[cp->dev][CMPCI_LR];
sc 1735 dev/pci/cmpci.c struct cmpci_softc *sc = handle;
sc 1738 dev/pci/cmpci.c if (offset < 0 || NULL == (p = cmpci_find_dmamem(sc, addr)))
sc 1757 dev/pci/cmpci.c struct cmpci_softc *sc = handle;
sc 1761 dev/pci/cmpci.c sc->sc_play.intr = intr;
sc 1762 dev/pci/cmpci.c sc->sc_play.intr_arg = arg;
sc 1768 dev/pci/cmpci.c if (!(p = cmpci_find_dmamem(sc, start)))
sc 1770 dev/pci/cmpci.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BASE,
sc 1773 dev/pci/cmpci.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_BYTES,
sc 1778 dev/pci/cmpci.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA0_SAMPLES,
sc 1783 dev/pci/cmpci.c cmpci_reg_clear_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_DIR); /* PLAY */
sc 1784 dev/pci/cmpci.c cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH0_INTR_ENABLE);
sc 1785 dev/pci/cmpci.c cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH0_ENABLE);
sc 1794 dev/pci/cmpci.c struct cmpci_softc *sc = handle;
sc 1798 dev/pci/cmpci.c sc->sc_rec.intr = intr;
sc 1799 dev/pci/cmpci.c sc->sc_rec.intr_arg = arg;
sc 1805 dev/pci/cmpci.c if (!(p = cmpci_find_dmamem(sc, start)))
sc 1807 dev/pci/cmpci.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BASE,
sc 1810 dev/pci/cmpci.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_BYTES,
sc 1815 dev/pci/cmpci.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, CMPCI_REG_DMA1_SAMPLES,
sc 1820 dev/pci/cmpci.c cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_DIR); /* REC */
sc 1821 dev/pci/cmpci.c cmpci_reg_set_4(sc, CMPCI_REG_INTR_CTRL, CMPCI_REG_CH1_INTR_ENABLE);
sc 1822 dev/pci/cmpci.c cmpci_reg_set_4(sc, CMPCI_REG_FUNC_0, CMPCI_REG_CH1_ENABLE);
sc 169 dev/pci/cmpcireg.h # define CMPCI_ADJUST_MIC_GAIN(sc, x) cmpci_adjust((x), 0xf8)
sc 170 dev/pci/cmpcireg.h # define CMPCI_ADJUST_GAIN(sc, x) cmpci_adjust((x), 0xf8)
sc 171 dev/pci/cmpcireg.h # define CMPCI_ADJUST_2_GAIN(sc, x) cmpci_adjust((x), 0xc0)
sc 191 dev/pci/cmpcireg.h # define CMPCI_ADJUST_ADMIC_GAIN(sc, x) (cmpci_adjust((x), 0xe0) >> 5)
sc 198 dev/pci/cmpcireg.h # define CMPCI_ADJUST_AUX_GAIN(sc, l, r) \
sc 210 dev/pci/cmpcivar.h #define CMPCI_ISCAP(sc, name) (sc->sc_capable & CMPCI_CAP_ ## name)
sc 165 dev/pci/cs4280.c #define BA0READ4(sc, r) bus_space_read_4((sc)->ba0t, (sc)->ba0h, (r))
sc 166 dev/pci/cs4280.c #define BA0WRITE4(sc, r, x) bus_space_write_4((sc)->ba0t, (sc)->ba0h, (r), (x))
sc 167 dev/pci/cs4280.c #define BA1READ4(sc, r) bus_space_read_4((sc)->ba1t, (sc)->ba1h, (r))
sc 168 dev/pci/cs4280.c #define BA1WRITE4(sc, r, x) bus_space_write_4((sc)->ba1t, (sc)->ba1h, (r), (x))
sc 229 dev/pci/cs4280.c int cs4280_attach_codec(void *sc, struct ac97_codec_if *);
sc 230 dev/pci/cs4280.c int cs4280_read_codec(void *sc, u_int8_t a, u_int16_t *d);
sc 231 dev/pci/cs4280.c int cs4280_write_codec(void *sc, u_int8_t a, u_int16_t d);
sc 232 dev/pci/cs4280.c void cs4280_reset_codec(void *sc);
sc 316 dev/pci/cs4280.c struct cs4280_softc *sc = sc_;
sc 324 dev/pci/cs4280.c BA0READ4(sc, CS4280_ACSDA);
sc 327 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACCAD, add);
sc 328 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACCDA, 0);
sc 329 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACCTL,
sc 332 dev/pci/cs4280.c if (cs4280_src_wait(sc) < 0) {
sc 334 dev/pci/cs4280.c sc->sc_dev.dv_xname, add);
sc 340 dev/pci/cs4280.c while (!(BA0READ4(sc, CS4280_ACSTS) & ACSTS_VSTS)) {
sc 344 dev/pci/cs4280.c sc->sc_dev.dv_xname, add);
sc 348 dev/pci/cs4280.c *data = BA0READ4(sc, CS4280_ACSDA);
sc 359 dev/pci/cs4280.c struct cs4280_softc *sc = sc_;
sc 362 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACCAD, add);
sc 363 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACCDA, data);
sc 364 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACCTL,
sc 367 dev/pci/cs4280.c if (cs4280_src_wait(sc) < 0) {
sc 369 dev/pci/cs4280.c "0x%04x\n", sc->sc_dev.dv_xname, add, data);
sc 376 dev/pci/cs4280.c cs4280_src_wait(sc)
sc 377 dev/pci/cs4280.c struct cs4280_softc *sc;
sc 382 dev/pci/cs4280.c while ((BA0READ4(sc, CS4280_ACCTL) & ACCTL_DCV)) {
sc 392 dev/pci/cs4280.c cs4280_set_adc_rate(sc, rate)
sc 393 dev/pci/cs4280.c struct cs4280_softc *sc;
sc 473 dev/pci/cs4280.c tmp1 = BA1READ4(sc, CS4280_CSRC) & ~CSRC_MASK;
sc 475 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CSRC, tmp1);
sc 478 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CSRC, CS4280_MK_CSRC(csrc, cy));
sc 487 dev/pci/cs4280.c tmp1 = BA1READ4(sc, CS4280_CCI) & ~CCI_MASK;
sc 489 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CCI, tmp1);
sc 491 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CCI, cci);
sc 494 dev/pci/cs4280.c tmp1 = BA1READ4(sc, CS4280_CD) & ~CD_MASK;
sc 496 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CD, tmp1);
sc 498 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CPI, cpi);
sc 500 dev/pci/cs4280.c tmp1 = BA1READ4(sc, CS4280_CGL) & ~CGL_MASK;
sc 502 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CGL, tmp1);
sc 504 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CNT, cnt);
sc 506 dev/pci/cs4280.c tmp1 = BA1READ4(sc, CS4280_CGC) & ~CGC_MASK;
sc 508 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CGC, tmp1);
sc 512 dev/pci/cs4280.c cs4280_set_dac_rate(sc, rate)
sc 513 dev/pci/cs4280.c struct cs4280_softc *sc;
sc 548 dev/pci/cs4280.c px = BA1READ4(sc, CS4280_PSRC) & ~PSRC_MASK;
sc 549 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_PSRC,
sc 553 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_PSRC, CS4280_MK_PSRC(psrc,py));
sc 555 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_PPI, ppi);
sc 561 dev/pci/cs4280.c struct cs4280_softc *sc = xsc;
sc 565 dev/pci/cs4280.c if (cs4280_init2(sc, 1) != 0)
sc 568 dev/pci/cs4280.c printf("%s: firmware loaded\n", sc->sc_dev.dv_xname);
sc 574 dev/pci/cs4280.c ctl.dev = cs4280_get_portnum_by_name(sc, AudioCoutputs,
sc 576 dev/pci/cs4280.c cs4280_mixer_set_port(sc, &ctl);
sc 578 dev/pci/cs4280.c ctl.dev = cs4280_get_portnum_by_name(sc, AudioCinputs,
sc 580 dev/pci/cs4280.c cs4280_mixer_set_port(sc, &ctl);
sc 582 dev/pci/cs4280.c ctl.dev = cs4280_get_portnum_by_name(sc, AudioCinputs,
sc 584 dev/pci/cs4280.c cs4280_mixer_set_port(sc, &ctl);
sc 586 dev/pci/cs4280.c audio_attach_mi(&cs4280_hw_if, sc, &sc->sc_dev);
sc 589 dev/pci/cs4280.c midi_attach_mi(&cs4280_midi_hw_if, sc, &sc->sc_dev);
sc 591 dev/pci/cs4280.c sc->sc_suspend = PWR_RESUME;
sc 592 dev/pci/cs4280.c sc->sc_powerhook = powerhook_establish(cs4280_power, sc);
sc 601 dev/pci/cs4280.c struct cs4280_softc *sc = (struct cs4280_softc *) self;
sc 611 dev/pci/cs4280.c &sc->ba0t, &sc->ba0h, NULL, NULL, 0)) {
sc 617 dev/pci/cs4280.c &sc->ba1t, &sc->ba1h, NULL, NULL, 0)) {
sc 622 dev/pci/cs4280.c sc->sc_dmatag = pa->pa_dmat;
sc 639 dev/pci/cs4280.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, cs4280_intr, sc,
sc 640 dev/pci/cs4280.c sc->sc_dev.dv_xname);
sc 641 dev/pci/cs4280.c if (sc->sc_ih == NULL) {
sc 651 dev/pci/cs4280.c if (cs4280_init(sc, 1) != 0)
sc 654 dev/pci/cs4280.c mountroothook_establish(cs4280_attachhook, sc);
sc 657 dev/pci/cs4280.c sc->host_if.arg = sc;
sc 658 dev/pci/cs4280.c sc->host_if.attach = cs4280_attach_codec;
sc 659 dev/pci/cs4280.c sc->host_if.read = cs4280_read_codec;
sc 660 dev/pci/cs4280.c sc->host_if.write = cs4280_write_codec;
sc 661 dev/pci/cs4280.c sc->host_if.reset = cs4280_reset_codec;
sc 663 dev/pci/cs4280.c if (ac97_attach(&sc->host_if) != 0) {
sc 664 dev/pci/cs4280.c printf("%s: ac97_attach failed\n", sc->sc_dev.dv_xname);
sc 695 dev/pci/cs4280.c struct cs4280_softc *sc = p;
sc 701 dev/pci/cs4280.c intr = BA0READ4(sc, CS4280_HISR);
sc 702 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_HICR, HICR_CHGM | HICR_IEV);
sc 707 dev/pci/cs4280.c mem = BA1READ4(sc, CS4280_PFIE);
sc 708 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_PFIE, (mem & ~PFIE_PI_MASK) | PFIE_PI_DISABLE);
sc 709 dev/pci/cs4280.c if (sc->sc_pintr) {
sc 710 dev/pci/cs4280.c if ((sc->sc_pi%sc->sc_pcount) == 0)
sc 711 dev/pci/cs4280.c sc->sc_pintr(sc->sc_parg);
sc 716 dev/pci/cs4280.c ++sc->sc_pi;
sc 717 dev/pci/cs4280.c empty_dma = sc->sc_pdma->addr;
sc 718 dev/pci/cs4280.c if (sc->sc_pi&1)
sc 720 dev/pci/cs4280.c memcpy(empty_dma, sc->sc_pn, CS4280_ICHUNK);
sc 721 dev/pci/cs4280.c sc->sc_pn += CS4280_ICHUNK;
sc 722 dev/pci/cs4280.c if (sc->sc_pn >= sc->sc_pe)
sc 723 dev/pci/cs4280.c sc->sc_pn = sc->sc_ps;
sc 724 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_PFIE, mem);
sc 732 dev/pci/cs4280.c mem = BA1READ4(sc, CS4280_CIE);
sc 733 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CIE, (mem & ~CIE_CI_MASK) | CIE_CI_DISABLE);
sc 734 dev/pci/cs4280.c ++sc->sc_ri;
sc 735 dev/pci/cs4280.c empty_dma = sc->sc_rdma->addr;
sc 736 dev/pci/cs4280.c if ((sc->sc_ri&1) == 0)
sc 745 dev/pci/cs4280.c switch(sc->sc_rparam) {
sc 748 dev/pci/cs4280.c memcpy(sc->sc_rn, empty_dma, CS4280_ICHUNK);
sc 749 dev/pci/cs4280.c sc->sc_rn += CS4280_ICHUNK;
sc 755 dev/pci/cs4280.c *((int16_t *)sc->sc_rn)++ = rdata;
sc 761 dev/pci/cs4280.c *sc->sc_rn++ = rdata >> 8;
sc 763 dev/pci/cs4280.c *sc->sc_rn++ = rdata >> 8;
sc 770 dev/pci/cs4280.c *sc->sc_rn++ = rdata >>8;
sc 775 dev/pci/cs4280.c printf("unknown sc->sc_rparam: %d\n", sc->sc_rparam);
sc 777 dev/pci/cs4280.c if (sc->sc_rn >= sc->sc_re)
sc 778 dev/pci/cs4280.c sc->sc_rn = sc->sc_rs;
sc 779 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CIE, mem);
sc 780 dev/pci/cs4280.c if (sc->sc_rintr) {
sc 781 dev/pci/cs4280.c if ((sc->sc_ri%(sc->sc_rcount)) == 0)
sc 782 dev/pci/cs4280.c sc->sc_rintr(sc->sc_rarg);
sc 795 dev/pci/cs4280.c BA0READ4(sc, CS4280_MIDSR)));
sc 797 dev/pci/cs4280.c while ((sc->sc_iintr != NULL) &&
sc 798 dev/pci/cs4280.c ((BA0READ4(sc, CS4280_MIDSR) & MIDSR_RBE) == 0)) {
sc 799 dev/pci/cs4280.c data = BA0READ4(sc, CS4280_MIDRP) & MIDRP_MASK;
sc 801 dev/pci/cs4280.c sc->sc_iintr(sc->sc_arg, data);
sc 810 dev/pci/cs4280.c if ((BA0READ4(sc, CS4280_MIDSR) & MIDSR_TBF) == 0) {
sc 812 dev/pci/cs4280.c if (sc->sc_ointr != NULL)
sc 813 dev/pci/cs4280.c sc->sc_ointr(sc->sc_arg);
sc 816 dev/pci/cs4280.c while ((sc->sc_ointr != NULL) &&
sc 817 dev/pci/cs4280.c ((BA0READ4(sc, CS4280_MIDSR) & MIDSR_TBF) == 0)) {
sc 819 dev/pci/cs4280.c sc->sc_ointr(sc->sc_arg);
sc 833 dev/pci/cs4280.c cs4280_download(sc, src, offset, len)
sc 834 dev/pci/cs4280.c struct cs4280_softc *sc;
sc 853 dev/pci/cs4280.c BA1WRITE4(sc, offset+ctr*4, htole32(*(src+ctr)));
sc 856 dev/pci/cs4280.c c0 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+0);
sc 857 dev/pci/cs4280.c c1 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+1);
sc 858 dev/pci/cs4280.c c2 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+2);
sc 859 dev/pci/cs4280.c c3 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+3);
sc 874 dev/pci/cs4280.c cs4280_download_image(sc)
sc 875 dev/pci/cs4280.c struct cs4280_softc *sc;
sc 892 dev/pci/cs4280.c err = cs4280_download(sc, &BA1Struct->map[offset],
sc 896 dev/pci/cs4280.c sc->sc_dev.dv_xname, idx);
sc 906 dev/pci/cs4280.c cs4280_checkimage(sc, src, offset, len)
sc 907 dev/pci/cs4280.c struct cs4280_softc *sc;
sc 922 dev/pci/cs4280.c data = BA1READ4(sc, offset+ctr*4);
sc 934 dev/pci/cs4280.c cs4280_check_images(sc)
sc 935 dev/pci/cs4280.c struct cs4280_softc *sc;
sc 943 dev/pci/cs4280.c err = cs4280_checkimage(sc, &BA1Struct->map[offset],
sc 948 dev/pci/cs4280.c sc->sc_dev.dv_xname, idx);
sc 962 dev/pci/cs4280.c struct cs4280_softc *sc = sc_;
sc 964 dev/pci/cs4280.c sc->codec_if = codec_if;
sc 972 dev/pci/cs4280.c struct cs4280_softc *sc = sc_;
sc 976 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACCTL, 0);
sc 978 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACCTL, ACCTL_RSTN);
sc 985 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACCTL, ACCTL_ESYN | ACCTL_RSTN);
sc 989 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACCTL, ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN);
sc 993 dev/pci/cs4280.c while (BA0READ4(sc, CS4280_ACISV) != (ACISV_ISV3 | ACISV_ISV4)) {
sc 1008 dev/pci/cs4280.c struct cs4280_softc *sc = sc_;
sc 1011 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_SPCR, SPCR_RSTSP);
sc 1014 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_SPCR, 0);
sc 1016 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_SPCR, SPCR_DRQEN);
sc 1031 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1033 dev/pci/cs4280.c cs4280_halt_output(sc);
sc 1034 dev/pci/cs4280.c cs4280_halt_input(sc);
sc 1036 dev/pci/cs4280.c sc->sc_pintr = 0;
sc 1037 dev/pci/cs4280.c sc->sc_rintr = 0;
sc 1106 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1197 dev/pci/cs4280.c cs4280_set_dac_rate(sc, play->sample_rate);
sc 1198 dev/pci/cs4280.c cs4280_set_adc_rate(sc, rec->sample_rate);
sc 1242 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1244 dev/pci/cs4280.c return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp));
sc 1254 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1259 dev/pci/cs4280.c for (p = sc->sc_dmas; p && BUFADDR(p) != mem; p = p->next)
sc 1265 dev/pci/cs4280.c return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs,
sc 1275 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1277 dev/pci/cs4280.c return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dip));
sc 1281 dev/pci/cs4280.c cs4280_get_portnum_by_name(sc, class, device, qualifier)
sc 1282 dev/pci/cs4280.c struct cs4280_softc *sc;
sc 1285 dev/pci/cs4280.c return (sc->codec_if->vtbl->get_portnum_by_name(sc->codec_if, class,
sc 1293 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1296 dev/pci/cs4280.c mem = BA1READ4(sc, CS4280_PCTL);
sc 1297 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_PCTL, mem & ~PCTL_MASK);
sc 1299 dev/pci/cs4280.c sc->sc_prun = 0;
sc 1308 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1311 dev/pci/cs4280.c mem = BA1READ4(sc, CS4280_CCTL);
sc 1312 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CCTL, mem & ~CCTL_MASK);
sc 1314 dev/pci/cs4280.c sc->sc_rrun = 0;
sc 1333 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1336 dev/pci/cs4280.c val = sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp);
sc 1343 dev/pci/cs4280.c cs4280_freemem(sc, p)
sc 1344 dev/pci/cs4280.c struct cs4280_softc *sc;
sc 1347 dev/pci/cs4280.c bus_dmamap_unload(sc->sc_dmatag, p->map);
sc 1348 dev/pci/cs4280.c bus_dmamap_destroy(sc->sc_dmatag, p->map);
sc 1349 dev/pci/cs4280.c bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
sc 1350 dev/pci/cs4280.c bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
sc 1355 dev/pci/cs4280.c cs4280_allocmem(sc, size, align, p)
sc 1356 dev/pci/cs4280.c struct cs4280_softc *sc;
sc 1365 dev/pci/cs4280.c error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0,
sc 1370 dev/pci/cs4280.c sc->sc_dev.dv_xname, error);
sc 1374 dev/pci/cs4280.c error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size,
sc 1378 dev/pci/cs4280.c sc->sc_dev.dv_xname, error);
sc 1382 dev/pci/cs4280.c error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size,
sc 1386 dev/pci/cs4280.c sc->sc_dev.dv_xname, error);
sc 1390 dev/pci/cs4280.c error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL,
sc 1394 dev/pci/cs4280.c sc->sc_dev.dv_xname, error);
sc 1400 dev/pci/cs4280.c bus_dmamap_destroy(sc->sc_dmatag, p->map);
sc 1402 dev/pci/cs4280.c bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
sc 1404 dev/pci/cs4280.c bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
sc 1416 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1433 dev/pci/cs4280.c error = cs4280_allocmem(sc, CS4280_DCHUNK, CS4280_DALIGN, p);
sc 1441 dev/pci/cs4280.c p->next = sc->sc_dmas;
sc 1442 dev/pci/cs4280.c sc->sc_dmas = p;
sc 1454 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1457 dev/pci/cs4280.c for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
sc 1459 dev/pci/cs4280.c cs4280_freemem(sc, p);
sc 1477 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1482 dev/pci/cs4280.c if (sc->sc_prun)
sc 1484 dev/pci/cs4280.c sc->sc_prun = 1;
sc 1489 dev/pci/cs4280.c sc->sc_pintr = intr;
sc 1490 dev/pci/cs4280.c sc->sc_parg = arg;
sc 1493 dev/pci/cs4280.c mem = BA1READ4(sc, CS4280_PCTL);
sc 1494 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_PCTL, mem & ~PCTL_MASK);
sc 1497 dev/pci/cs4280.c pdtc = BA1READ4(sc, CS4280_PDTC);
sc 1500 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_PDTC, pdtc);
sc 1505 dev/pci/cs4280.c for (p = sc->sc_dmas; p != NULL && BUFADDR(p) != start; p = p->next)
sc 1517 dev/pci/cs4280.c sc->sc_pcount = blksize / CS4280_ICHUNK; /* CS4280_ICHUNK is fixed hardware blksize*/
sc 1518 dev/pci/cs4280.c sc->sc_ps = (char *)start;
sc 1519 dev/pci/cs4280.c sc->sc_pe = (char *)end;
sc 1520 dev/pci/cs4280.c sc->sc_pdma = p;
sc 1521 dev/pci/cs4280.c sc->sc_pbuf = KERNADDR(p);
sc 1522 dev/pci/cs4280.c sc->sc_pi = 0;
sc 1523 dev/pci/cs4280.c sc->sc_pn = sc->sc_ps;
sc 1525 dev/pci/cs4280.c sc->sc_pn = sc->sc_ps + CS4280_DCHUNK;
sc 1526 dev/pci/cs4280.c memcpy(sc->sc_pbuf, start, CS4280_DCHUNK);
sc 1527 dev/pci/cs4280.c ++sc->sc_pi;
sc 1529 dev/pci/cs4280.c sc->sc_pn = sc->sc_ps + CS4280_ICHUNK;
sc 1530 dev/pci/cs4280.c memcpy(sc->sc_pbuf, start, CS4280_ICHUNK);
sc 1534 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_PBA, DMAADDR(p));
sc 1537 dev/pci/cs4280.c pfie = BA1READ4(sc, CS4280_PFIE) & ~PFIE_MASK;
sc 1551 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_PFIE, pfie | PFIE_PI_ENABLE);
sc 1553 dev/pci/cs4280.c cs4280_set_dac_rate(sc, param->sample_rate);
sc 1555 dev/pci/cs4280.c pctl = BA1READ4(sc, CS4280_PCTL) & ~PCTL_MASK;
sc 1556 dev/pci/cs4280.c pctl |= sc->pctl;
sc 1557 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_PCTL, pctl);
sc 1570 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1575 dev/pci/cs4280.c if (sc->sc_rrun)
sc 1577 dev/pci/cs4280.c sc->sc_rrun = 1;
sc 1581 dev/pci/cs4280.c sc->sc_rintr = intr;
sc 1582 dev/pci/cs4280.c sc->sc_rarg = arg;
sc 1584 dev/pci/cs4280.c sc->sc_ri = 0;
sc 1585 dev/pci/cs4280.c sc->sc_rcount = blksize / CS4280_ICHUNK; /* CS4280_ICHUNK is fixed hardware blksize*/
sc 1586 dev/pci/cs4280.c sc->sc_rs = (char *)start;
sc 1587 dev/pci/cs4280.c sc->sc_re = (char *)end;
sc 1588 dev/pci/cs4280.c sc->sc_rn = sc->sc_rs;
sc 1591 dev/pci/cs4280.c sc->sc_rparam = 0;
sc 1593 dev/pci/cs4280.c sc->sc_rparam += CF_8BIT;
sc 1594 dev/pci/cs4280.c sc->sc_rcount <<= 1;
sc 1597 dev/pci/cs4280.c sc->sc_rparam += CF_MONO;
sc 1598 dev/pci/cs4280.c sc->sc_rcount <<= 1;
sc 1602 dev/pci/cs4280.c cctl = BA1READ4(sc, CS4280_CCTL) & ~CCTL_MASK;
sc 1603 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CCTL, cctl);
sc 1605 dev/pci/cs4280.c for (p = sc->sc_dmas; p && BUFADDR(p) != start; p = p->next)
sc 1616 dev/pci/cs4280.c sc->sc_rdma = p;
sc 1617 dev/pci/cs4280.c sc->sc_rbuf = KERNADDR(p);
sc 1620 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CBA, DMAADDR(p));
sc 1623 dev/pci/cs4280.c cie = BA1READ4(sc, CS4280_CIE) & ~CIE_CI_MASK;
sc 1624 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CIE, cie | CIE_CI_ENABLE);
sc 1626 dev/pci/cs4280.c cs4280_set_adc_rate(sc, param->sample_rate);
sc 1628 dev/pci/cs4280.c cctl = BA1READ4(sc, CS4280_CCTL) & ~CCTL_MASK;
sc 1629 dev/pci/cs4280.c cctl |= sc->cctl;
sc 1630 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CCTL, cctl);
sc 1636 dev/pci/cs4280.c cs4280_init(sc, init)
sc 1637 dev/pci/cs4280.c struct cs4280_softc *sc;
sc 1644 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_CLKCR1, 0);
sc 1646 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_SERMC1, 0);
sc 1652 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_SERACC, SERACC_HSP | SERACC_CTYPE_1_03); /* AC 97 1.03 */
sc 1654 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_SERACC, SERACC_HSP | SERACC_CTYPE_2_0); /* AC 97 2.0 */
sc 1658 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACCTL, 0);
sc 1660 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACCTL, ACCTL_RSTN);
sc 1663 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACCTL, ACCTL_ESYN | ACCTL_RSTN);
sc 1667 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_SERMC1, SERMC1_PTC_AC97);
sc 1670 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_PLLCC, PLLCC_CDR_STATE|PLLCC_LPF_STATE);
sc 1671 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_PLLM, PLLM_STATE);
sc 1672 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_CLKCR2, CLKCR2_PDIVS_8);
sc 1675 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_CLKCR1, CLKCR1_PLLP);
sc 1679 dev/pci/cs4280.c mem = BA0READ4(sc, CS4280_CLKCR1) | CLKCR1_SWCE;
sc 1680 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_CLKCR1, mem);
sc 1684 dev/pci/cs4280.c cs4280_clear_fifos(sc);
sc 1688 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_SERBSP, 0);
sc 1692 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_SERC1, SERC1_SO1EN | SERC1_SO1F_AC97);
sc 1693 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_SERC2, SERC2_SI1EN | SERC2_SI1F_AC97);
sc 1694 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_SERMC1, SERMC1_MSPE | SERMC1_PTC_AC97);
sc 1698 dev/pci/cs4280.c while ((BA0READ4(sc, CS4280_ACSTS) & ACSTS_CRDY) == 0) {
sc 1702 dev/pci/cs4280.c sc->sc_dev.dv_xname);
sc 1708 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACCTL, ACCTL_VFRM | ACCTL_ESYN | ACCTL_RSTN);
sc 1712 dev/pci/cs4280.c while ((BA0READ4(sc, CS4280_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) !=
sc 1722 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_ACOSV, ACOSV_SLV3 | ACOSV_SLV4);
sc 1725 dev/pci/cs4280.c cs4280_reset(sc);
sc 1730 dev/pci/cs4280.c cs4280_init2(sc, init)
sc 1731 dev/pci/cs4280.c struct cs4280_softc *sc;
sc 1738 dev/pci/cs4280.c if (cs4280_download_image(sc) != 0) {
sc 1739 dev/pci/cs4280.c printf("%s: image download error\n", sc->sc_dev.dv_xname);
sc 1747 dev/pci/cs4280.c mem = BA1READ4(sc, CS4280_PCTL);
sc 1748 dev/pci/cs4280.c sc->pctl = mem & PCTL_MASK; /* save startup value */
sc 1749 dev/pci/cs4280.c cs4280_halt_output(sc);
sc 1755 dev/pci/cs4280.c mem = BA1READ4(sc, CS4280_CCTL);
sc 1756 dev/pci/cs4280.c sc->cctl = mem & CCTL_MASK; /* save startup value */
sc 1757 dev/pci/cs4280.c cs4280_halt_input(sc);
sc 1762 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_FRMT, FRMT_FTV);
sc 1763 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_SPCR, SPCR_RUN | SPCR_RUNFR | SPCR_DRQEN);
sc 1767 dev/pci/cs4280.c while (BA1READ4(sc, CS4280_SPCR) & SPCR_RUNFR) {
sc 1776 dev/pci/cs4280.c while (!(BA1READ4(sc, CS4280_SPCS) & SPCS_SPRUN)) {
sc 1786 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_PVOL, 0x80008000);
sc 1787 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CVOL, 0x80008000);
sc 1790 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_HICR, HICR_IEV|HICR_CHGM);
sc 1793 dev/pci/cs4280.c mem = BA1READ4(sc, CS4280_PFIE) & ~PFIE_PI_MASK;
sc 1795 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_PFIE, mem);
sc 1797 dev/pci/cs4280.c mem = BA1READ4(sc, CS4280_CIE) & ~CIE_CI_MASK;
sc 1799 dev/pci/cs4280.c BA1WRITE4(sc, CS4280_CIE, mem);
sc 1803 dev/pci/cs4280.c mem = BA0READ4(sc, CS4280_MIDCR) & ~MIDCR_MASK;
sc 1804 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_MIDCR, mem | MIDCR_MRST);
sc 1805 dev/pci/cs4280.c DPRINTF(("midi reset: 0x%x\n", BA0READ4(sc, CS4280_MIDCR)));
sc 1808 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_MIDCR, mem);
sc 1818 dev/pci/cs4280.c struct cs4280_softc *sc = (struct cs4280_softc *)v;
sc 1822 dev/pci/cs4280.c sc->sc_dev.dv_xname, why));
sc 1824 dev/pci/cs4280.c sc->sc_suspend = why;
sc 1826 dev/pci/cs4280.c cs4280_halt_output(sc);
sc 1827 dev/pci/cs4280.c cs4280_halt_input(sc);
sc 1832 dev/pci/cs4280.c cs4280_read_codec(sc, 2*i, &sc->ac97_reg[i]);
sc 1835 dev/pci/cs4280.c cs4280_write_codec(sc, AC97_REG_POWER, CS4280_POWER_DOWN_ALL);
sc 1837 dev/pci/cs4280.c if (sc->sc_suspend == PWR_RESUME) {
sc 1839 dev/pci/cs4280.c sc->sc_suspend = why;
sc 1842 dev/pci/cs4280.c sc->sc_suspend = why;
sc 1843 dev/pci/cs4280.c cs4280_init(sc, 0);
sc 1844 dev/pci/cs4280.c cs4280_init2(sc, 0);
sc 1845 dev/pci/cs4280.c cs4280_reset_codec(sc);
sc 1851 dev/pci/cs4280.c cs4280_write_codec(sc, 2*i, sc->ac97_reg[i]);
sc 1857 dev/pci/cs4280.c cs4280_clear_fifos(sc)
sc 1858 dev/pci/cs4280.c struct cs4280_softc *sc;
sc 1867 dev/pci/cs4280.c mem = BA0READ4(sc, CS4280_CLKCR1);
sc 1870 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_CLKCR1, mem | CLKCR1_SWCE);
sc 1873 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_SERBWP, 0);
sc 1876 dev/pci/cs4280.c while (BA0READ4(sc, CS4280_SERBST) & SERBST_WBSY) {
sc 1883 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_SERBAD, cnt);
sc 1884 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_SERBCM, SERBCM_WRC);
sc 1887 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_CLKCR1, mem);
sc 1899 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1903 dev/pci/cs4280.c sc->sc_iintr = iintr;
sc 1904 dev/pci/cs4280.c sc->sc_ointr = ointr;
sc 1905 dev/pci/cs4280.c sc->sc_arg = arg;
sc 1908 dev/pci/cs4280.c mem = BA0READ4(sc, CS4280_MIDCR) & ~MIDCR_MASK;
sc 1910 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_MIDCR, mem);
sc 1912 dev/pci/cs4280.c if (mem != BA0READ4(sc, CS4280_MIDCR)) {
sc 1913 dev/pci/cs4280.c DPRINTF(("midi_open: MIDCR=%d\n", BA0READ4(sc, CS4280_MIDCR)));
sc 1916 dev/pci/cs4280.c DPRINTF(("MIDCR=0x%x\n", BA0READ4(sc, CS4280_MIDCR)));
sc 1925 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1929 dev/pci/cs4280.c mem = BA0READ4(sc, CS4280_MIDCR);
sc 1931 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_MIDCR, mem);
sc 1933 dev/pci/cs4280.c sc->sc_iintr = 0;
sc 1934 dev/pci/cs4280.c sc->sc_ointr = 0;
sc 1942 dev/pci/cs4280.c struct cs4280_softc *sc = addr;
sc 1947 dev/pci/cs4280.c if ((BA0READ4(sc, CS4280_MIDSR) & MIDSR_TBF) == 0) {
sc 1948 dev/pci/cs4280.c mem = BA0READ4(sc, CS4280_MIDWP) & ~MIDWP_MASK;
sc 1951 dev/pci/cs4280.c BA0WRITE4(sc, CS4280_MIDWP, mem);
sc 1952 dev/pci/cs4280.c if (mem != BA0READ4(sc, CS4280_MIDWP)) {
sc 1954 dev/pci/cs4280.c mem, BA0READ4(sc, CS4280_MIDWP)));
sc 148 dev/pci/cs4281.c #define BA0READ4(sc, r) bus_space_read_4((sc)->ba0t, (sc)->ba0h, (r))
sc 149 dev/pci/cs4281.c #define BA0WRITE4(sc, r, x) bus_space_write_4((sc)->ba0t, (sc)->ba0h, (r), (x))
sc 293 dev/pci/cs4281.c struct cs4281_softc *sc = (struct cs4281_softc *)self;
sc 302 dev/pci/cs4281.c PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->ba0t,
sc 303 dev/pci/cs4281.c &sc->ba0h, NULL, NULL, 0)) {
sc 304 dev/pci/cs4281.c printf("%s: can't map BA0 space\n", sc->sc_dev.dv_xname);
sc 308 dev/pci/cs4281.c PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->ba1t,
sc 309 dev/pci/cs4281.c &sc->ba1h, NULL, NULL, 0)) {
sc 310 dev/pci/cs4281.c printf("%s: can't map BA1 space\n", sc->sc_dev.dv_xname);
sc 314 dev/pci/cs4281.c sc->sc_dmatag = pa->pa_dmat;
sc 337 dev/pci/cs4281.c printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
sc 342 dev/pci/cs4281.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, cs4281_intr, sc,
sc 343 dev/pci/cs4281.c sc->sc_dev.dv_xname);
sc 344 dev/pci/cs4281.c if (sc->sc_ih == NULL) {
sc 345 dev/pci/cs4281.c printf("%s: couldn't establish interrupt",sc->sc_dev.dv_xname);
sc 356 dev/pci/cs4281.c if (cs4281_init(sc) != 0)
sc 359 dev/pci/cs4281.c sc->halt_input = cs4281_halt_input;
sc 360 dev/pci/cs4281.c sc->halt_output = cs4281_halt_output;
sc 362 dev/pci/cs4281.c sc->dma_size = CS4281_BUFFER_SIZE / MAX_CHANNELS;
sc 363 dev/pci/cs4281.c sc->dma_align = 0x10;
sc 364 dev/pci/cs4281.c sc->hw_blocksize = sc->dma_size / 2;
sc 367 dev/pci/cs4281.c sc->host_if.arg = sc;
sc 368 dev/pci/cs4281.c sc->host_if.attach = cs4281_attach_codec;
sc 369 dev/pci/cs4281.c sc->host_if.read = cs4281_read_codec;
sc 370 dev/pci/cs4281.c sc->host_if.write = cs4281_write_codec;
sc 371 dev/pci/cs4281.c sc->host_if.reset = cs4281_reset_codec;
sc 372 dev/pci/cs4281.c if (ac97_attach(&sc->host_if) != 0) {
sc 373 dev/pci/cs4281.c printf("%s: ac97_attach failed\n", sc->sc_dev.dv_xname);
sc 376 dev/pci/cs4281.c audio_attach_mi(&cs4281_hw_if, sc, &sc->sc_dev);
sc 379 dev/pci/cs4281.c midi_attach_mi(&cs4281_midi_hw_if, sc, &sc->sc_dev);
sc 382 dev/pci/cs4281.c sc->sc_suspend = PWR_RESUME;
sc 383 dev/pci/cs4281.c sc->sc_powerhook = powerhook_establish(cs4281_power, sc);
sc 391 dev/pci/cs4281.c struct cs4281_softc *sc = p;
sc 395 dev/pci/cs4281.c intr = BA0READ4(sc, CS4281_HISR);
sc 397 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_HICR, HICR_IEV | HICR_CHGM);
sc 403 dev/pci/cs4281.c val = BA0READ4(sc, CS4281_HDSR0); /* clear intr condition */
sc 405 dev/pci/cs4281.c val = BA0READ4(sc, CS4281_HDSR1); /* clear intr condition */
sc 406 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_HICR, HICR_IEV | HICR_CHGM);
sc 410 dev/pci/cs4281.c DPRINTF((" PB DMA 0x%x(%d)", (int)BA0READ4(sc, CS4281_DCA0),
sc 411 dev/pci/cs4281.c (int)BA0READ4(sc, CS4281_DCC0)));
sc 412 dev/pci/cs4281.c if (sc->sc_pintr) {
sc 413 dev/pci/cs4281.c if ((sc->sc_pi%sc->sc_pcount) == 0)
sc 414 dev/pci/cs4281.c sc->sc_pintr(sc->sc_parg);
sc 419 dev/pci/cs4281.c ++sc->sc_pi;
sc 420 dev/pci/cs4281.c empty_dma = sc->sc_pdma->addr;
sc 421 dev/pci/cs4281.c if (sc->sc_pi&1)
sc 422 dev/pci/cs4281.c empty_dma += sc->hw_blocksize;
sc 423 dev/pci/cs4281.c memcpy(empty_dma, sc->sc_pn, sc->hw_blocksize);
sc 424 dev/pci/cs4281.c sc->sc_pn += sc->hw_blocksize;
sc 425 dev/pci/cs4281.c if (sc->sc_pn >= sc->sc_pe)
sc 426 dev/pci/cs4281.c sc->sc_pn = sc->sc_ps;
sc 429 dev/pci/cs4281.c val = BA0READ4(sc, CS4281_HDSR1);
sc 431 dev/pci/cs4281.c DPRINTF((" CP DMA 0x%x(%d)", (int)BA0READ4(sc, CS4281_DCA1),
sc 432 dev/pci/cs4281.c (int)BA0READ4(sc, CS4281_DCC1)));
sc 433 dev/pci/cs4281.c ++sc->sc_ri;
sc 434 dev/pci/cs4281.c empty_dma = sc->sc_rdma->addr;
sc 435 dev/pci/cs4281.c if ((sc->sc_ri & 1) == 0)
sc 436 dev/pci/cs4281.c empty_dma += sc->hw_blocksize;
sc 437 dev/pci/cs4281.c memcpy(sc->sc_rn, empty_dma, sc->hw_blocksize);
sc 438 dev/pci/cs4281.c if (sc->sc_rn >= sc->sc_re)
sc 439 dev/pci/cs4281.c sc->sc_rn = sc->sc_rs;
sc 440 dev/pci/cs4281.c if (sc->sc_rintr) {
sc 441 dev/pci/cs4281.c if ((sc->sc_ri % sc->sc_rcount) == 0)
sc 442 dev/pci/cs4281.c sc->sc_rintr(sc->sc_rarg);
sc 517 dev/pci/cs4281.c struct cs4281_softc *sc = addr;
sc 577 dev/pci/cs4281.c cs4281_set_dac_rate(sc, play->sample_rate);
sc 578 dev/pci/cs4281.c cs4281_set_adc_rate(sc, rec->sample_rate);
sc 586 dev/pci/cs4281.c struct cs4281_softc *sc = addr;
sc 588 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DCR0, BA0READ4(sc, CS4281_DCR0) | DCRn_MSK);
sc 590 dev/pci/cs4281.c sc->sc_prun = 0;
sc 599 dev/pci/cs4281.c struct cs4281_softc *sc = addr;
sc 601 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DCR1, BA0READ4(sc, CS4281_DCR1) | DCRn_MSK);
sc 603 dev/pci/cs4281.c sc->sc_rrun = 0;
sc 628 dev/pci/cs4281.c struct cs4281_softc *sc = addr;
sc 634 dev/pci/cs4281.c if (sc->sc_prun)
sc 636 dev/pci/cs4281.c sc->sc_prun = 1;
sc 641 dev/pci/cs4281.c sc->sc_pintr = intr;
sc 642 dev/pci/cs4281.c sc->sc_parg = arg;
sc 645 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DCR0, BA0READ4(sc, CS4281_DCR0) | DCRn_MSK);
sc 650 dev/pci/cs4281.c for (p = sc->sc_dmas; p != NULL && BUFADDR(p) != start; p = p->next)
sc 657 dev/pci/cs4281.c sc->sc_pcount = blksize / sc->hw_blocksize;
sc 658 dev/pci/cs4281.c sc->sc_ps = (char *)start;
sc 659 dev/pci/cs4281.c sc->sc_pe = (char *)end;
sc 660 dev/pci/cs4281.c sc->sc_pdma = p;
sc 661 dev/pci/cs4281.c sc->sc_pbuf = KERNADDR(p);
sc 662 dev/pci/cs4281.c sc->sc_pi = 0;
sc 663 dev/pci/cs4281.c sc->sc_pn = sc->sc_ps;
sc 664 dev/pci/cs4281.c if (blksize >= sc->dma_size) {
sc 665 dev/pci/cs4281.c sc->sc_pn = sc->sc_ps + sc->dma_size;
sc 666 dev/pci/cs4281.c memcpy(sc->sc_pbuf, start, sc->dma_size);
sc 667 dev/pci/cs4281.c ++sc->sc_pi;
sc 669 dev/pci/cs4281.c sc->sc_pn = sc->sc_ps + sc->hw_blocksize;
sc 670 dev/pci/cs4281.c memcpy(sc->sc_pbuf, start, sc->hw_blocksize);
sc 673 dev/pci/cs4281.c dma_count = sc->dma_size;
sc 681 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DBA0, DMAADDR(p));
sc 682 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DBC0, dma_count-1);
sc 685 dev/pci/cs4281.c fmt = BA0READ4(sc, CS4281_DMR0) & ~DMRn_FMTMSK;
sc 696 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DMR0, fmt);
sc 699 dev/pci/cs4281.c cs4281_set_dac_rate(sc, param->sample_rate);
sc 702 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DCR0, BA0READ4(sc, CS4281_DCR0) & ~DCRn_MSK);
sc 704 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_HICR, HICR_IEV | HICR_CHGM);
sc 706 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_PPRVC, 7);
sc 707 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_PPLVC, 7);
sc 709 dev/pci/cs4281.c DPRINTF(("HICR =0x%08x(expected 0x00000001)\n", BA0READ4(sc, CS4281_HICR)));
sc 710 dev/pci/cs4281.c DPRINTF(("HIMR =0x%08x(expected 0x00f0fc3f)\n", BA0READ4(sc, CS4281_HIMR)));
sc 711 dev/pci/cs4281.c DPRINTF(("DMR0 =0x%08x(expected 0x2???0018)\n", BA0READ4(sc, CS4281_DMR0)));
sc 712 dev/pci/cs4281.c DPRINTF(("DCR0 =0x%08x(expected 0x00030000)\n", BA0READ4(sc, CS4281_DCR0)));
sc 713 dev/pci/cs4281.c DPRINTF(("FCR0 =0x%08x(expected 0x81000f00)\n", BA0READ4(sc, CS4281_FCR0)));
sc 715 dev/pci/cs4281.c BA0READ4(sc, CS4281_DACSR)));
sc 716 dev/pci/cs4281.c DPRINTF(("SRCSA=0x%08x(expected 0x0b0a0100)\n", BA0READ4(sc, CS4281_SRCSA)));
sc 718 dev/pci/cs4281.c BA0READ4(sc, CS4281_SSPM) & SSPM_PSRCEN));
sc 732 dev/pci/cs4281.c struct cs4281_softc *sc = addr;
sc 739 dev/pci/cs4281.c if (sc->sc_rrun)
sc 741 dev/pci/cs4281.c sc->sc_rrun = 1;
sc 745 dev/pci/cs4281.c sc->sc_rintr = intr;
sc 746 dev/pci/cs4281.c sc->sc_rarg = arg;
sc 749 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DCR1, BA0READ4(sc, CS4281_DCR1) | DCRn_MSK);
sc 751 dev/pci/cs4281.c for (p = sc->sc_dmas; p && BUFADDR(p) != start; p = p->next)
sc 758 dev/pci/cs4281.c sc->sc_rcount = blksize / sc->hw_blocksize;
sc 759 dev/pci/cs4281.c sc->sc_rs = (char *)start;
sc 760 dev/pci/cs4281.c sc->sc_re = (char *)end;
sc 761 dev/pci/cs4281.c sc->sc_rdma = p;
sc 762 dev/pci/cs4281.c sc->sc_rbuf = KERNADDR(p);
sc 763 dev/pci/cs4281.c sc->sc_ri = 0;
sc 764 dev/pci/cs4281.c sc->sc_rn = sc->sc_rs;
sc 766 dev/pci/cs4281.c dma_count = sc->dma_size;
sc 774 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DBA1, DMAADDR(p));
sc 775 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DBC1, dma_count-1);
sc 778 dev/pci/cs4281.c fmt = BA0READ4(sc, CS4281_DMR1) & ~DMRn_FMTMSK;
sc 789 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DMR1, fmt);
sc 792 dev/pci/cs4281.c cs4281_set_adc_rate(sc, param->sample_rate);
sc 795 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DCR1, BA0READ4(sc, CS4281_DCR1) & ~DCRn_MSK);
sc 797 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_HICR, HICR_IEV | HICR_CHGM);
sc 799 dev/pci/cs4281.c DPRINTF(("HICR=0x%08x\n", BA0READ4(sc, CS4281_HICR)));
sc 800 dev/pci/cs4281.c DPRINTF(("HIMR=0x%08x\n", BA0READ4(sc, CS4281_HIMR)));
sc 801 dev/pci/cs4281.c DPRINTF(("DMR1=0x%08x\n", BA0READ4(sc, CS4281_DMR1)));
sc 802 dev/pci/cs4281.c DPRINTF(("DCR1=0x%08x\n", BA0READ4(sc, CS4281_DCR1)));
sc 847 dev/pci/cs4281.c cs4281_set_dac_rate(sc, rate)
sc 848 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 851 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DACSR, cs4281_sr2regval(rate));
sc 855 dev/pci/cs4281.c cs4281_set_adc_rate(sc, rate)
sc 856 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 859 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ADCSR, cs4281_sr2regval(rate));
sc 863 dev/pci/cs4281.c cs4281_init(sc)
sc 864 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 872 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_CWPR, 0x4281);
sc 878 dev/pci/cs4281.c dat32 = BA0READ4(sc, CS4281_EPPMC);
sc 880 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_EPPMC, dat32 & ~EPPMC_FPDN);
sc 883 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_CLKCR1, 0);
sc 885 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SERMC, 0);
sc 888 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ACCTL, 0);
sc 891 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SPMC, 0);
sc 893 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SPMC, SPMC_RSTN);
sc 895 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SPMC, SPMC_RSTN | SPCM_ASDIN2E);
sc 896 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SERMC, SERMC_TCID);
sc 901 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_CLKCR1, CLKCR1_DLLP);
sc 903 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_CLKCR1, CLKCR1_SWCE | CLKCR1_DLLP);
sc 906 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SSPM,
sc 917 dev/pci/cs4281.c while ((BA0READ4(sc, CS4281_CLKCR1)& (CLKCR1_DLLRDY | CLKCR1_CLKON))
sc 925 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ACCTL, ACCTL_ESYN);
sc 929 dev/pci/cs4281.c while((BA0READ4(sc, CS4281_ACSTS) & ACSTS_CRDY) == 0) {
sc 938 dev/pci/cs4281.c while((BA0READ4(sc, CS4281_ACSTS2) & ACSTS2_CRDY2) == 0) {
sc 947 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SERMC, SERMC_PTCAC97);
sc 955 dev/pci/cs4281.c sc->sc_dev.dv_xname);
sc 958 dev/pci/cs4281.c dat32 = BA0READ4(sc, CS4281_ACSTS) & ACSTS_CRDY;
sc 962 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ACCTL, ACCTL_ESYN | ACCTL_VFRM);
sc 970 dev/pci/cs4281.c sc->sc_dev.dv_xname);
sc 973 dev/pci/cs4281.c cs4281_read_codec(sc, AC97_REG_POWER, &data);
sc 978 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SERMC, SERMC_PTCAC97);
sc 986 dev/pci/cs4281.c sc->sc_dev.dv_xname);
sc 989 dev/pci/cs4281.c dat32 = BA0READ4(sc, CS4281_ACISV) & (ACISV_ISV3 | ACISV_ISV4);
sc 993 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ACOSV, (ACOSV_SLV3 | ACOSV_SLV4));
sc 995 dev/pci/cs4281.c cs4281_write_codec(sc, AC97_REG_HEADPHONE_VOLUME, 0);
sc 996 dev/pci/cs4281.c cs4281_write_codec(sc, AC97_REG_MASTER_VOLUME, 0);
sc 999 dev/pci/cs4281.c cs4281_read_codec(sc, AC97_REG_POWER, &data);
sc 1000 dev/pci/cs4281.c cs4281_write_codec(sc, AC97_REG_POWER, data &= 0xfdff);
sc 1007 dev/pci/cs4281.c cs4281_read_codec(sc, AC97_REG_POWER, &data);
sc 1013 dev/pci/cs4281.c cs4281_read_codec(sc, AC97_REG_POWER, &data);
sc 1014 dev/pci/cs4281.c cs4281_write_codec(sc, AC97_REG_POWER, data &= 0xfeff);
sc 1021 dev/pci/cs4281.c cs4281_read_codec(sc, AC97_REG_POWER, &data);
sc 1029 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SSCR, ~SSCR_HVC); /* disable HW volume setting */
sc 1038 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SSCR, SSCR_SB);
sc 1043 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_FCR0, (BA0READ4(sc,CS4281_FCR0) & ~FCRn_FEN));
sc 1059 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_FCR0, dat32);
sc 1060 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_FCR0, dat32 | FCRn_FEN);
sc 1064 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_FCR1, (BA0READ4(sc,CS4281_FCR1) & ~FCRn_FEN));
sc 1082 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_FCR1, dat32 | FCRn_PSH);
sc 1083 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_FCR1, dat32 | FCRn_FEN);
sc 1087 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_FCR2, (BA0READ4(sc,CS4281_FCR2) & ~FCRn_FEN));
sc 1088 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_FCR3, (BA0READ4(sc,CS4281_FCR3) & ~FCRn_FEN));
sc 1120 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SRCSA, dat32);
sc 1127 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DCR0, dat32);
sc 1128 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DCR1, dat32);
sc 1131 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DMR0,
sc 1133 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_DMR1,
sc 1137 dev/pci/cs4281.c dat32 = BA0READ4(sc, CS4281_HIMR) & 0xfffbfcff;
sc 1138 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_HIMR, dat32);
sc 1147 dev/pci/cs4281.c struct cs4281_softc *sc = (struct cs4281_softc *)v;
sc 1150 dev/pci/cs4281.c DPRINTF(("%s: cs4281_power why=%d\n", sc->sc_dev.dv_xname, why));
sc 1152 dev/pci/cs4281.c sc->sc_suspend = why;
sc 1154 dev/pci/cs4281.c cs4281_halt_output(sc);
sc 1155 dev/pci/cs4281.c cs4281_halt_input(sc);
sc 1160 dev/pci/cs4281.c cs4281_read_codec(sc, 2*i, &sc->ac97_reg[i>>1]);
sc 1163 dev/pci/cs4281.c cs4281_write_codec(sc, AC97_REG_POWER, CS4281_POWER_DOWN_ALL);
sc 1165 dev/pci/cs4281.c if (sc->sc_suspend == PWR_RESUME) {
sc 1167 dev/pci/cs4281.c sc->sc_suspend = why;
sc 1170 dev/pci/cs4281.c sc->sc_suspend = why;
sc 1171 dev/pci/cs4281.c cs4281_init(sc);
sc 1172 dev/pci/cs4281.c cs4281_reset_codec(sc);
sc 1178 dev/pci/cs4281.c cs4281_write_codec(sc, 2*i, sc->ac97_reg[i>>1]);
sc 1186 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 1191 dev/pci/cs4281.c sc = addr;
sc 1196 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ACCTL, 0);
sc 1199 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SPMC, 0);
sc 1201 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SPMC, SPMC_RSTN);
sc 1203 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SPMC, SPMC_RSTN | SPCM_ASDIN2E);
sc 1204 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SERMC, SERMC_TCID);
sc 1209 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ACCTL, ACCTL_ESYN);
sc 1213 dev/pci/cs4281.c while((BA0READ4(sc, CS4281_ACSTS) & ACSTS_CRDY) == 0) {
sc 1223 dev/pci/cs4281.c while((BA0READ4(sc, CS4281_ACSTS2) & ACSTS2_CRDY2) == 0) {
sc 1231 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SERMC, SERMC_PTCAC97);
sc 1239 dev/pci/cs4281.c sc->sc_dev.dv_xname);
sc 1242 dev/pci/cs4281.c dat32 = BA0READ4(sc, CS4281_ACSTS) & ACSTS_CRDY;
sc 1246 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ACCTL, ACCTL_ESYN | ACCTL_VFRM);
sc 1254 dev/pci/cs4281.c sc->sc_dev.dv_xname);
sc 1257 dev/pci/cs4281.c cs4281_read_codec(sc, AC97_REG_POWER, &data);
sc 1262 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_SERMC, SERMC_PTCAC97);
sc 1270 dev/pci/cs4281.c sc->sc_dev.dv_xname);
sc 1273 dev/pci/cs4281.c dat32 = BA0READ4(sc, CS4281_ACISV) & (ACISV_ISV3 | ACISV_ISV4) ;
sc 1277 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ACOSV, (ACOSV_SLV3 | ACOSV_SLV4));
sc 1289 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 1291 dev/pci/cs4281.c sc = addr;
sc 1293 dev/pci/cs4281.c (*sc->halt_output)(sc);
sc 1294 dev/pci/cs4281.c (*sc->halt_input)(sc);
sc 1296 dev/pci/cs4281.c sc->sc_pintr = 0;
sc 1297 dev/pci/cs4281.c sc->sc_rintr = 0;
sc 1303 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 1308 dev/pci/cs4281.c sc=addr;
sc 1309 dev/pci/cs4281.c if (blk < sc->hw_blocksize)
sc 1310 dev/pci/cs4281.c retval = sc->hw_blocksize;
sc 1312 dev/pci/cs4281.c retval = blk & -(sc->hw_blocksize);
sc 1322 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 1325 dev/pci/cs4281.c sc = addr;
sc 1326 dev/pci/cs4281.c val = sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp);
sc 1334 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 1336 dev/pci/cs4281.c sc = addr;
sc 1337 dev/pci/cs4281.c return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp));
sc 1344 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 1346 dev/pci/cs4281.c sc = addr;
sc 1347 dev/pci/cs4281.c return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dip));
sc 1353 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 1357 dev/pci/cs4281.c sc = addr;
sc 1363 dev/pci/cs4281.c error = cs4281_allocmem(sc, size, pool, flags, p);
sc 1370 dev/pci/cs4281.c p->next = sc->sc_dmas;
sc 1371 dev/pci/cs4281.c sc->sc_dmas = p;
sc 1380 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 1383 dev/pci/cs4281.c sc = addr;
sc 1384 dev/pci/cs4281.c for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
sc 1386 dev/pci/cs4281.c bus_dmamap_unload(sc->sc_dmatag, p->map);
sc 1387 dev/pci/cs4281.c bus_dmamap_destroy(sc->sc_dmatag, p->map);
sc 1388 dev/pci/cs4281.c bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
sc 1389 dev/pci/cs4281.c bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
sc 1413 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 1416 dev/pci/cs4281.c sc = addr;
sc 1420 dev/pci/cs4281.c for (p = sc->sc_dmas; p && BUFADDR(p) != mem; p = p->next)
sc 1428 dev/pci/cs4281.c return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs, off, prot,
sc 1449 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 1452 dev/pci/cs4281.c sc = addr;
sc 1453 dev/pci/cs4281.c sc->codec_if = codec_if;
sc 1461 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 1465 dev/pci/cs4281.c sc = addr;
sc 1472 dev/pci/cs4281.c BA0READ4(sc, CS4281_ACSDA);
sc 1475 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ACCAD, ac97_addr);
sc 1476 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ACCDA, 0);
sc 1479 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ACCTL, acctl);
sc 1481 dev/pci/cs4281.c if (cs4281_src_wait(sc) < 0) {
sc 1483 dev/pci/cs4281.c sc->sc_dev.dv_xname, ac97_addr);
sc 1489 dev/pci/cs4281.c while ((BA0READ4(sc, CS4281_ACSTS) & ACSTS_VSTS) == 0) {
sc 1493 dev/pci/cs4281.c sc->sc_dev.dv_xname, ac97_addr);
sc 1497 dev/pci/cs4281.c *ac97_data = BA0READ4(sc, CS4281_ACSDA);
sc 1505 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 1508 dev/pci/cs4281.c sc = addr;
sc 1511 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ACCAD, ac97_addr);
sc 1512 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ACCDA, ac97_data);
sc 1515 dev/pci/cs4281.c BA0WRITE4(sc, CS4281_ACCTL, acctl);
sc 1517 dev/pci/cs4281.c if (cs4281_src_wait(sc) < 0) {
sc 1519 dev/pci/cs4281.c "0x%04x\n", sc->sc_dev.dv_xname, ac97_addr, ac97_data);
sc 1526 dev/pci/cs4281.c cs4281_allocmem(struct cs4281_softc *sc, size_t size, int pool, int flags,
sc 1532 dev/pci/cs4281.c align = sc->dma_align;
sc 1533 dev/pci/cs4281.c p->size = sc->dma_size;
sc 1538 dev/pci/cs4281.c error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0,
sc 1543 dev/pci/cs4281.c sc->sc_dev.dv_xname, error);
sc 1547 dev/pci/cs4281.c error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size,
sc 1551 dev/pci/cs4281.c sc->sc_dev.dv_xname, error);
sc 1555 dev/pci/cs4281.c error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size,
sc 1559 dev/pci/cs4281.c sc->sc_dev.dv_xname, error);
sc 1563 dev/pci/cs4281.c error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL,
sc 1567 dev/pci/cs4281.c sc->sc_dev.dv_xname, error);
sc 1573 dev/pci/cs4281.c bus_dmamap_destroy(sc->sc_dmatag, p->map);
sc 1575 dev/pci/cs4281.c bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
sc 1577 dev/pci/cs4281.c bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
sc 1583 dev/pci/cs4281.c cs4281_src_wait(sc)
sc 1584 dev/pci/cs4281.c struct cs4281_softc *sc;
sc 1589 dev/pci/cs4281.c while ((BA0READ4(sc, CS4281_ACCTL) & ACCTL_DCV)) {
sc 97 dev/pci/cy_pci.c struct cy_softc *sc = (struct cy_softc *)self;
sc 104 dev/pci/cy_pci.c sc->sc_bustype = CY_BUSTYPE_PCI;
sc 125 dev/pci/cy_pci.c if (pci_mapreg_map(pa, 0x18, memtype, 0, &sc->sc_memt,
sc 126 dev/pci/cy_pci.c &sc->sc_memh, NULL, NULL, 0) != 0) {
sc 131 dev/pci/cy_pci.c if ((sc->sc_nr_cd1400s = cy_probe_common(sc->sc_memt, sc->sc_memh,
sc 143 dev/pci/cy_pci.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_TTY, cy_intr,
sc 144 dev/pci/cy_pci.c sc, sc->sc_dev.dv_xname);
sc 145 dev/pci/cy_pci.c if (sc->sc_ih == NULL) {
sc 157 dev/pci/cy_pci.c plx_ver = bus_space_read_1(sc->sc_memt, sc->sc_memh, CY_PLX_VER) & 0x0f;
sc 190 dev/pci/cz.c void cztty_shutdown(struct cztty_softc *sc);
sc 191 dev/pci/cz.c void cztty_modem(struct cztty_softc *sc, int onoff);
sc 192 dev/pci/cz.c void cztty_break(struct cztty_softc *sc, int onoff);
sc 193 dev/pci/cz.c void tiocm_to_cztty(struct cztty_softc *sc, u_long how, int ttybits);
sc 194 dev/pci/cz.c int cztty_to_tiocm(struct cztty_softc *sc);
sc 233 dev/pci/cz.c #define CZTTY_CHAN_READ(sc, off) \
sc 234 dev/pci/cz.c bus_space_read_4((sc)->sc_chan_st, (sc)->sc_chan_sh, (off))
sc 236 dev/pci/cz.c #define CZTTY_CHAN_WRITE(sc, off, val) \
sc 237 dev/pci/cz.c bus_space_write_4((sc)->sc_chan_st, (sc)->sc_chan_sh, \
sc 240 dev/pci/cz.c #define CZTTY_BUF_READ(sc, off) \
sc 241 dev/pci/cz.c bus_space_read_4((sc)->sc_chan_st, (sc)->sc_buf_sh, (off))
sc 243 dev/pci/cz.c #define CZTTY_BUF_WRITE(sc, off, val) \
sc 244 dev/pci/cz.c bus_space_write_4((sc)->sc_chan_st, (sc)->sc_buf_sh, \
sc 299 dev/pci/cz.c struct cztty_softc *sc;
sc 398 dev/pci/cz.c sc = &cz->cz_ports[i];
sc 400 dev/pci/cz.c sc->sc_channel = i;
sc 401 dev/pci/cz.c sc->sc_chan_st = cz->cz_win_st;
sc 402 dev/pci/cz.c sc->sc_parent = cz;
sc 406 dev/pci/cz.c ZFIRM_CHNCTL_SIZE, &sc->sc_chan_sh)) {
sc 409 dev/pci/cz.c sc->sc_channel = CZTTY_CHANNEL_DEAD;
sc 414 dev/pci/cz.c ZFIRM_BUFCTL_SIZE, &sc->sc_buf_sh)) {
sc 417 dev/pci/cz.c sc->sc_channel = CZTTY_CHANNEL_DEAD;
sc 421 dev/pci/cz.c timeout_set(&sc->sc_diag_to, cztty_diag, sc);
sc 429 dev/pci/cz.c sc->sc_tty = tp;
sc 431 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_OP_MODE, C_CH_DISABLE);
sc 432 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_INTR_ENABLE, CZ_INTERRUPTS);
sc 433 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_SW_FLOW, 0);
sc 434 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_FLOW_XON, 0x11);
sc 435 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_FLOW_XOFF, 0x13);
sc 436 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_BAUD, TTYDEF_SPEED);
sc 437 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_PARITY, C_PR_NONE);
sc 438 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_DATA_L, C_DL_CS8 | C_DL_1STOP);
sc 439 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_FLAGS, 0);
sc 440 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_HW_FLOW, C_RS_CTS | C_RS_RTS);
sc 441 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, 0);
sc 691 dev/pci/cz.c struct cztty_softc *sc;
sc 710 dev/pci/cz.c sc = &cz->cz_ports[channel];
sc 712 dev/pci/cz.c if (sc->sc_channel == CZTTY_CHANNEL_DEAD)
sc 715 dev/pci/cz.c tp = sc->sc_tty;
sc 730 dev/pci/cz.c if (cztty_transmit(sc, tp)) {
sc 746 dev/pci/cz.c CZTTY_BUF_WRITE(sc, BUFCTL_RX_GET,
sc 747 dev/pci/cz.c CZTTY_BUF_READ(sc, BUFCTL_RX_PUT));
sc 751 dev/pci/cz.c if (cztty_receive(sc, tp)) {
sc 765 dev/pci/cz.c ISSET(C_RS_DCD, CZTTY_CHAN_READ(sc,
sc 779 dev/pci/cz.c sc->sc_parity_errors++;
sc 783 dev/pci/cz.c sc->sc_framing_errors++;
sc 787 dev/pci/cz.c sc->sc_overflows++;
sc 789 dev/pci/cz.c if (sc->sc_errors++ == 0)
sc 790 dev/pci/cz.c timeout_add(&sc->sc_diag_to, 60 * hz);
sc 809 dev/pci/cz.c cz->cz_dev.dv_xname, sc->sc_channel, command);
sc 844 dev/pci/cz.c #define CZTTY_CZ(sc) ((sc)->sc_parent)
sc 893 dev/pci/cz.c struct cztty_softc *sc = CZTTY_SOFTC(dev);
sc 896 dev/pci/cz.c if (sc == NULL)
sc 900 dev/pci/cz.c return (sc->sc_tty);
sc 909 dev/pci/cz.c cztty_shutdown(struct cztty_softc *sc)
sc 911 dev/pci/cz.c struct cz_softc *cz = CZTTY_CZ(sc);
sc 912 dev/pci/cz.c struct tty *tp = sc->sc_tty;
sc 918 dev/pci/cz.c cztty_break(sc, 0);
sc 925 dev/pci/cz.c cztty_modem(sc, 0);
sc 931 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_OP_MODE, C_CH_DISABLE);
sc 932 dev/pci/cz.c CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel);
sc 953 dev/pci/cz.c struct cztty_softc *sc = CZTTY_SOFTC(dev);
sc 958 dev/pci/cz.c if (sc == NULL)
sc 961 dev/pci/cz.c if (sc->sc_channel == CZTTY_CHANNEL_DEAD)
sc 964 dev/pci/cz.c cz = CZTTY_CZ(sc);
sc 965 dev/pci/cz.c tp = sc->sc_tty;
sc 997 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_OP_MODE, C_CH_ENABLE);
sc 1006 dev/pci/cz.c if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
sc 1008 dev/pci/cz.c if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
sc 1016 dev/pci/cz.c CZTTY_BUF_WRITE(sc, BUFCTL_RX_GET,
sc 1017 dev/pci/cz.c CZTTY_BUF_READ(sc, BUFCTL_RX_PUT));
sc 1018 dev/pci/cz.c CZTTY_BUF_WRITE(sc, BUFCTL_TX_PUT,
sc 1019 dev/pci/cz.c CZTTY_BUF_READ(sc, BUFCTL_TX_GET));
sc 1037 dev/pci/cz.c cztty_modem(sc, 1);
sc 1058 dev/pci/cz.c cztty_shutdown(sc);
sc 1072 dev/pci/cz.c struct cztty_softc *sc = CZTTY_SOFTC(dev);
sc 1073 dev/pci/cz.c struct tty *tp = sc->sc_tty;
sc 1088 dev/pci/cz.c cztty_shutdown(sc);
sc 1102 dev/pci/cz.c struct cztty_softc *sc = CZTTY_SOFTC(dev);
sc 1103 dev/pci/cz.c struct tty *tp = sc->sc_tty;
sc 1116 dev/pci/cz.c struct cztty_softc *sc = CZTTY_SOFTC(dev);
sc 1117 dev/pci/cz.c struct tty *tp = sc->sc_tty;
sc 1131 dev/pci/cz.c struct cztty_softc *sc = CZTTY_SOFTC(dev);
sc 1132 dev/pci/cz.c struct tty *tp = sc->sc_tty;
sc 1146 dev/pci/cz.c struct cztty_softc *sc = CZTTY_SOFTC(dev);
sc 1147 dev/pci/cz.c struct tty *tp = sc->sc_tty;
sc 1164 dev/pci/cz.c cztty_break(sc, 1);
sc 1168 dev/pci/cz.c cztty_break(sc, 0);
sc 1172 dev/pci/cz.c *(int *)data = sc->sc_swflags;
sc 1179 dev/pci/cz.c sc->sc_swflags = *(int *)data;
sc 1183 dev/pci/cz.c cztty_modem(sc, 1);
sc 1187 dev/pci/cz.c cztty_modem(sc, 0);
sc 1193 dev/pci/cz.c tiocm_to_cztty(sc, cmd, *(int *)data);
sc 1197 dev/pci/cz.c *(int *)data = cztty_to_tiocm(sc);
sc 1216 dev/pci/cz.c cztty_break(struct cztty_softc *sc, int onoff)
sc 1218 dev/pci/cz.c struct cz_softc *cz = CZTTY_CZ(sc);
sc 1222 dev/pci/cz.c CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel);
sc 1233 dev/pci/cz.c cztty_modem(struct cztty_softc *sc, int onoff)
sc 1235 dev/pci/cz.c struct cz_softc *cz = CZTTY_CZ(sc);
sc 1237 dev/pci/cz.c if (sc->sc_rs_control_dtr == 0)
sc 1243 dev/pci/cz.c sc->sc_chanctl_rs_control |= sc->sc_rs_control_dtr;
sc 1245 dev/pci/cz.c sc->sc_chanctl_rs_control &= ~sc->sc_rs_control_dtr;
sc 1246 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, sc->sc_chanctl_rs_control);
sc 1248 dev/pci/cz.c CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel);
sc 1258 dev/pci/cz.c tiocm_to_cztty(struct cztty_softc *sc, u_long how, int ttybits)
sc 1260 dev/pci/cz.c struct cz_softc *cz = CZTTY_CZ(sc);
sc 1273 dev/pci/cz.c CLR(sc->sc_chanctl_rs_control, czttybits);
sc 1277 dev/pci/cz.c SET(sc->sc_chanctl_rs_control, czttybits);
sc 1281 dev/pci/cz.c CLR(sc->sc_chanctl_rs_control, C_RS_DTR | C_RS_RTS);
sc 1282 dev/pci/cz.c SET(sc->sc_chanctl_rs_control, czttybits);
sc 1286 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, sc->sc_chanctl_rs_control);
sc 1288 dev/pci/cz.c CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel);
sc 1298 dev/pci/cz.c cztty_to_tiocm(struct cztty_softc *sc)
sc 1300 dev/pci/cz.c struct cz_softc *cz = CZTTY_CZ(sc);
sc 1306 dev/pci/cz.c rs_status = CZTTY_CHAN_READ(sc, CHNCTL_RS_STATUS);
sc 1307 dev/pci/cz.c op_mode = CZTTY_CHAN_READ(sc, CHNCTL_OP_MODE);
sc 1339 dev/pci/cz.c struct cztty_softc *sc = CZTTY_SOFTC(tp->t_dev);
sc 1340 dev/pci/cz.c struct cz_softc *cz = CZTTY_CZ(sc);
sc 1353 dev/pci/cz.c if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR)) {
sc 1368 dev/pci/cz.c sc->sc_chanctl_comm_data_l = 0;
sc 1371 dev/pci/cz.c sc->sc_chanctl_comm_data_l |= C_DL_CS5;
sc 1375 dev/pci/cz.c sc->sc_chanctl_comm_data_l |= C_DL_CS6;
sc 1379 dev/pci/cz.c sc->sc_chanctl_comm_data_l |= C_DL_CS7;
sc 1383 dev/pci/cz.c sc->sc_chanctl_comm_data_l |= C_DL_CS8;
sc 1389 dev/pci/cz.c if ((sc->sc_chanctl_comm_data_l & C_DL_CS) == C_DL_CS5)
sc 1390 dev/pci/cz.c sc->sc_chanctl_comm_data_l |= C_DL_15STOP;
sc 1392 dev/pci/cz.c sc->sc_chanctl_comm_data_l |= C_DL_2STOP;
sc 1394 dev/pci/cz.c sc->sc_chanctl_comm_data_l |= C_DL_1STOP;
sc 1399 dev/pci/cz.c sc->sc_chanctl_comm_parity = C_PR_ODD;
sc 1401 dev/pci/cz.c sc->sc_chanctl_comm_parity = C_PR_EVEN;
sc 1403 dev/pci/cz.c sc->sc_chanctl_comm_parity = C_PR_NONE;
sc 1410 dev/pci/cz.c sc->sc_rs_control_dtr = C_RS_DTR;
sc 1411 dev/pci/cz.c sc->sc_chanctl_hw_flow = C_RS_CTS | C_RS_RTS;
sc 1413 dev/pci/cz.c sc->sc_rs_control_dtr = 0;
sc 1414 dev/pci/cz.c sc->sc_chanctl_hw_flow = C_RS_DCD | C_RS_DTR;
sc 1421 dev/pci/cz.c sc->sc_rs_control_dtr = C_RS_DTR | C_RS_RTS;
sc 1422 dev/pci/cz.c sc->sc_chanctl_hw_flow = 0;
sc 1423 dev/pci/cz.c if (ISSET(sc->sc_chanctl_rs_control, C_RS_DTR))
sc 1424 dev/pci/cz.c SET(sc->sc_chanctl_rs_control, C_RS_RTS);
sc 1426 dev/pci/cz.c CLR(sc->sc_chanctl_rs_control, C_RS_RTS);
sc 1430 dev/pci/cz.c sc->sc_chanctl_comm_baud = ospeed;
sc 1443 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_BAUD, sc->sc_chanctl_comm_baud);
sc 1444 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_DATA_L, sc->sc_chanctl_comm_data_l);
sc 1445 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_PARITY, sc->sc_chanctl_comm_parity);
sc 1446 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_HW_FLOW, sc->sc_chanctl_hw_flow);
sc 1447 dev/pci/cz.c CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, sc->sc_chanctl_rs_control);
sc 1449 dev/pci/cz.c CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel);
sc 1454 dev/pci/cz.c CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel);
sc 1464 dev/pci/cz.c rs_status = CZTTY_CHAN_READ(sc, CHNCTL_RS_STATUS);
sc 1478 dev/pci/cz.c struct cztty_softc *sc = CZTTY_SOFTC(tp->t_dev);
sc 1495 dev/pci/cz.c cztty_transmit(sc, tp);
sc 1527 dev/pci/cz.c struct cztty_softc *sc = arg;
sc 1528 dev/pci/cz.c struct cz_softc *cz = CZTTY_CZ(sc);
sc 1534 dev/pci/cz.c overflows = sc->sc_overflows;
sc 1535 dev/pci/cz.c sc->sc_overflows = 0;
sc 1537 dev/pci/cz.c parity_errors = sc->sc_parity_errors;
sc 1538 dev/pci/cz.c sc->sc_parity_errors = 0;
sc 1540 dev/pci/cz.c framing_errors = sc->sc_framing_errors;
sc 1541 dev/pci/cz.c sc->sc_framing_errors = 0;
sc 1543 dev/pci/cz.c sc->sc_errors = 0;
sc 1549 dev/pci/cz.c cz->cz_dev.dv_xname, sc->sc_channel,
sc 1577 dev/pci/cz.c cztty_transmit(struct cztty_softc *sc, struct tty *tp)
sc 1579 dev/pci/cz.c struct cz_softc *cz = CZTTY_CZ(sc);
sc 1587 dev/pci/cz.c size = CZTTY_BUF_READ(sc, BUFCTL_TX_BUFSIZE);
sc 1588 dev/pci/cz.c get = CZTTY_BUF_READ(sc, BUFCTL_TX_GET);
sc 1589 dev/pci/cz.c put = CZTTY_BUF_READ(sc, BUFCTL_TX_PUT);
sc 1590 dev/pci/cz.c address = CZTTY_BUF_READ(sc, BUFCTL_TX_BUFADDR);
sc 1600 dev/pci/cz.c sc->sc_channel);
sc 1617 dev/pci/cz.c CZTTY_BUF_WRITE(sc, BUFCTL_TX_PUT, put);
sc 1623 dev/pci/cz.c cztty_receive(struct cztty_softc *sc, struct tty *tp)
sc 1625 dev/pci/cz.c struct cz_softc *cz = CZTTY_CZ(sc);
sc 1629 dev/pci/cz.c size = CZTTY_BUF_READ(sc, BUFCTL_RX_BUFSIZE);
sc 1630 dev/pci/cz.c get = CZTTY_BUF_READ(sc, BUFCTL_RX_GET);
sc 1631 dev/pci/cz.c put = CZTTY_BUF_READ(sc, BUFCTL_RX_PUT);
sc 1632 dev/pci/cz.c address = CZTTY_BUF_READ(sc, BUFCTL_RX_BUFADDR);
sc 1650 dev/pci/cz.c CZTTY_BUF_WRITE(sc, BUFCTL_RX_GET, get);
sc 108 dev/pci/dpt_pci.c struct dpt_softc *sc;
sc 113 dev/pci/dpt_pci.c sc = (struct dpt_softc *)self;
sc 118 dev/pci/dpt_pci.c if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, &sc->sc_iot,
sc 119 dev/pci/dpt_pci.c &sc->sc_ioh, NULL, NULL, 0)) {
sc 124 dev/pci/dpt_pci.c sc->sc_dmat = pa->pa_dmat;
sc 133 dev/pci/dpt_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, dpt_intr, sc);
sc 136 dev/pci/dpt_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, dpt_intr, sc,
sc 137 dev/pci/dpt_pci.c sc->sc_dv.dv_xname);
sc 139 dev/pci/dpt_pci.c if (sc->sc_ih == NULL) {
sc 148 dev/pci/dpt_pci.c if (dpt_readcfg(sc)) {
sc 150 dev/pci/dpt_pci.c sc->sc_dv.dv_xname);
sc 155 dev/pci/dpt_pci.c dpt_init(sc, intrstr);
sc 157 dev/pci/eap.c #define EWRITE1(sc, r, x) bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x))
sc 158 dev/pci/eap.c #define EWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x))
sc 159 dev/pci/eap.c #define EWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
sc 160 dev/pci/eap.c #define EREAD1(sc, r) bus_space_read_1((sc)->iot, (sc)->ioh, (r))
sc 161 dev/pci/eap.c #define EREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
sc 162 dev/pci/eap.c #define EREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
sc 190 dev/pci/eap.c void eap1370_set_mixer(struct eap_softc *sc, int a, int d);
sc 191 dev/pci/eap.c u_int32_t eap1371_src_wait(struct eap_softc *sc);
sc 192 dev/pci/eap.c void eap1371_set_adc_rate(struct eap_softc *sc, int rate);
sc 193 dev/pci/eap.c void eap1371_set_dac_rate(struct eap_softc *sc, int rate, int which);
sc 194 dev/pci/eap.c int eap1371_src_read(struct eap_softc *sc, int a);
sc 195 dev/pci/eap.c void eap1371_src_write(struct eap_softc *sc, int a, int d);
sc 198 dev/pci/eap.c int eap1371_attach_codec(void *sc, struct ac97_codec_if *);
sc 199 dev/pci/eap.c int eap1371_read_codec(void *sc, u_int8_t a, u_int16_t *d);
sc 200 dev/pci/eap.c int eap1371_write_codec(void *sc, u_int8_t a, u_int16_t d);
sc 201 dev/pci/eap.c void eap1371_reset_codec(void *sc);
sc 302 dev/pci/eap.c eap1370_write_codec(struct eap_softc *sc, int a, int d)
sc 308 dev/pci/eap.c icss = EREAD4(sc, EAP_ICSS);
sc 312 dev/pci/eap.c sc->sc_dev.dv_xname);
sc 316 dev/pci/eap.c EWRITE4(sc, EAP_CODEC, EAP_SET_CODEC(a, d));
sc 325 dev/pci/eap.c eap1371_ready_codec(struct eap_softc *sc, u_int8_t a, u_int32_t wd)
sc 331 dev/pci/eap.c if (!(EREAD4(sc, E1371_CODEC) & E1371_CODEC_WIP))
sc 337 dev/pci/eap.c sc->sc_dev.dv_xname);
sc 340 dev/pci/eap.c src = eap1371_src_wait(sc) & E1371_SRC_CTLMASK;
sc 341 dev/pci/eap.c EWRITE4(sc, E1371_SRC, src | E1371_SRC_STATE_OK);
sc 344 dev/pci/eap.c t = EREAD4(sc, E1371_SRC);
sc 351 dev/pci/eap.c sc->sc_dev.dv_xname);
sc 354 dev/pci/eap.c t = EREAD4(sc, E1371_SRC);
sc 361 dev/pci/eap.c sc->sc_dev.dv_xname);
sc 363 dev/pci/eap.c EWRITE4(sc, E1371_CODEC, wd);
sc 365 dev/pci/eap.c eap1371_src_wait(sc);
sc 366 dev/pci/eap.c EWRITE4(sc, E1371_SRC, src);
sc 374 dev/pci/eap.c struct eap_softc *sc = sc_;
sc 378 dev/pci/eap.c eap1371_ready_codec(sc, a, E1371_SET_CODEC(a, 0) | E1371_CODEC_READ);
sc 381 dev/pci/eap.c if (!(EREAD4(sc, E1371_CODEC) & E1371_CODEC_WIP))
sc 387 dev/pci/eap.c sc->sc_dev.dv_xname);
sc 390 dev/pci/eap.c t = EREAD4(sc, E1371_CODEC);
sc 397 dev/pci/eap.c sc->sc_dev.dv_xname);
sc 409 dev/pci/eap.c struct eap_softc *sc = sc_;
sc 411 dev/pci/eap.c eap1371_ready_codec(sc, a, E1371_SET_CODEC(a, d));
sc 419 dev/pci/eap.c eap1371_src_wait(struct eap_softc *sc)
sc 425 dev/pci/eap.c src = EREAD4(sc, E1371_SRC);
sc 430 dev/pci/eap.c printf("%s: eap1371_src_wait timeout\n", sc->sc_dev.dv_xname);
sc 435 dev/pci/eap.c eap1371_src_read(struct eap_softc *sc, int a)
sc 440 dev/pci/eap.c src = eap1371_src_wait(sc) & E1371_SRC_CTLMASK;
sc 442 dev/pci/eap.c EWRITE4(sc, E1371_SRC, src | E1371_SRC_STATE_OK);
sc 444 dev/pci/eap.c if ((eap1371_src_wait(sc) & E1371_SRC_STATE_MASK) != E1371_SRC_STATE_OK) {
sc 446 dev/pci/eap.c t = EREAD4(sc, E1371_SRC);
sc 453 dev/pci/eap.c EWRITE4(sc, E1371_SRC, src);
sc 459 dev/pci/eap.c eap1371_src_write(struct eap_softc *sc, int a, int d)
sc 463 dev/pci/eap.c r = eap1371_src_wait(sc) & E1371_SRC_CTLMASK;
sc 465 dev/pci/eap.c EWRITE4(sc, E1371_SRC, r);
sc 469 dev/pci/eap.c eap1371_set_adc_rate(struct eap_softc *sc, int rate)
sc 497 dev/pci/eap.c eap1371_src_write(sc, ESRC_ADC+ESRC_TRUNC_N, out);
sc 500 dev/pci/eap.c out = eap1371_src_read(sc, ESRC_ADC+ESRC_IREGS) & 0xff;
sc 501 dev/pci/eap.c eap1371_src_write(sc, ESRC_ADC+ESRC_IREGS, out |
sc 503 dev/pci/eap.c eap1371_src_write(sc, ESRC_ADC+ESRC_VFF, freq & 0x7fff);
sc 504 dev/pci/eap.c eap1371_src_write(sc, ESRC_ADC_VOLL, ESRC_SET_ADC_VOL(n));
sc 505 dev/pci/eap.c eap1371_src_write(sc, ESRC_ADC_VOLR, ESRC_SET_ADC_VOL(n));
sc 510 dev/pci/eap.c eap1371_set_dac_rate(struct eap_softc *sc, int rate, int which)
sc 525 dev/pci/eap.c eap1371_src_wait(sc);
sc 526 dev/pci/eap.c r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE |
sc 529 dev/pci/eap.c EWRITE4(sc, E1371_SRC, r);
sc 530 dev/pci/eap.c r = eap1371_src_read(sc, dac + ESRC_IREGS) & 0x00ff;
sc 531 dev/pci/eap.c eap1371_src_write(sc, dac + ESRC_IREGS, r | ((freq >> 5) & 0xfc00));
sc 532 dev/pci/eap.c eap1371_src_write(sc, dac + ESRC_VFF, freq & 0x7fff);
sc 533 dev/pci/eap.c r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE |
sc 536 dev/pci/eap.c EWRITE4(sc, E1371_SRC, r);
sc 543 dev/pci/eap.c struct eap_softc *sc = (struct eap_softc *)self;
sc 554 dev/pci/eap.c sc->sc_1371 = !(PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ENSONIQ &&
sc 558 dev/pci/eap.c if (sc->sc_1371) {
sc 570 dev/pci/eap.c &sc->iot, &sc->ioh, NULL, NULL, 0)) {
sc 574 dev/pci/eap.c sc->sc_dmatag = pa->pa_dmat;
sc 582 dev/pci/eap.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, eap_intr, sc,
sc 583 dev/pci/eap.c sc->sc_dev.dv_xname);
sc 584 dev/pci/eap.c if (sc->sc_ih == NULL) {
sc 593 dev/pci/eap.c if (!sc->sc_1371) {
sc 596 dev/pci/eap.c EWRITE4(sc, EAP_SIC, EAP_P2_INTR_EN | EAP_R1_INTR_EN);
sc 597 dev/pci/eap.c EWRITE4(sc, EAP_ICSC, EAP_CDC_EN);
sc 602 dev/pci/eap.c eap1370_write_codec(sc, AK_RESET, AK_PD);
sc 603 dev/pci/eap.c eap1370_write_codec(sc, AK_RESET, AK_PD | AK_NRST);
sc 604 dev/pci/eap.c eap1370_write_codec(sc, AK_CS, 0x0);
sc 614 dev/pci/eap.c eap_hw_if->set_port(sc, &ctl);
sc 621 dev/pci/eap.c eap_hw_if->set_port(sc, &ctl);
sc 624 dev/pci/eap.c eap_hw_if->set_port(sc, &ctl);
sc 628 dev/pci/eap.c eap_hw_if->set_port(sc, &ctl);
sc 632 dev/pci/eap.c eap_hw_if->set_port(sc, &ctl);
sc 636 dev/pci/eap.c EWRITE4(sc, EAP_SIC, 0);
sc 637 dev/pci/eap.c EWRITE4(sc, EAP_ICSC, 0);
sc 638 dev/pci/eap.c EWRITE4(sc, E1371_LEGACY, 0);
sc 641 dev/pci/eap.c EWRITE4(sc, EAP_ICSS, EAP_CT5880_AC97_RESET);
sc 647 dev/pci/eap.c EWRITE4(sc, EAP_ICSC, E1371_SYNC_RES);
sc 649 dev/pci/eap.c EWRITE4(sc, EAP_ICSC, 0);
sc 656 dev/pci/eap.c EWRITE4(sc, E1371_SRC, E1371_SRC_DISABLE);
sc 658 dev/pci/eap.c eap1371_src_write(sc, i, 0);
sc 659 dev/pci/eap.c eap1371_src_write(sc, ESRC_DAC1+ESRC_TRUNC_N, ESRC_SET_N(16));
sc 660 dev/pci/eap.c eap1371_src_write(sc, ESRC_DAC2+ESRC_TRUNC_N, ESRC_SET_N(16));
sc 661 dev/pci/eap.c eap1371_src_write(sc, ESRC_DAC1+ESRC_IREGS, ESRC_SET_VFI(16));
sc 662 dev/pci/eap.c eap1371_src_write(sc, ESRC_DAC2+ESRC_IREGS, ESRC_SET_VFI(16));
sc 663 dev/pci/eap.c eap1371_src_write(sc, ESRC_ADC_VOLL, ESRC_SET_ADC_VOL(16));
sc 664 dev/pci/eap.c eap1371_src_write(sc, ESRC_ADC_VOLR, ESRC_SET_ADC_VOL(16));
sc 665 dev/pci/eap.c eap1371_src_write(sc, ESRC_DAC1_VOLL, ESRC_SET_DAC_VOLI(1));
sc 666 dev/pci/eap.c eap1371_src_write(sc, ESRC_DAC1_VOLR, ESRC_SET_DAC_VOLI(1));
sc 667 dev/pci/eap.c eap1371_src_write(sc, ESRC_DAC2_VOLL, ESRC_SET_DAC_VOLI(1));
sc 668 dev/pci/eap.c eap1371_src_write(sc, ESRC_DAC2_VOLR, ESRC_SET_DAC_VOLI(1));
sc 669 dev/pci/eap.c eap1371_set_adc_rate(sc, 22050);
sc 670 dev/pci/eap.c eap1371_set_dac_rate(sc, 22050, 1);
sc 671 dev/pci/eap.c eap1371_set_dac_rate(sc, 22050, 2);
sc 673 dev/pci/eap.c EWRITE4(sc, E1371_SRC, 0);
sc 678 dev/pci/eap.c sc->host_if.arg = sc;
sc 679 dev/pci/eap.c sc->host_if.attach = eap1371_attach_codec;
sc 680 dev/pci/eap.c sc->host_if.read = eap1371_read_codec;
sc 681 dev/pci/eap.c sc->host_if.write = eap1371_write_codec;
sc 682 dev/pci/eap.c sc->host_if.reset = eap1371_reset_codec;
sc 683 dev/pci/eap.c sc->host_if.flags = eap_flags_codec;
sc 684 dev/pci/eap.c sc->flags = AC97_HOST_DONT_READ;
sc 686 dev/pci/eap.c if (ac97_attach(&sc->host_if) == 0) {
sc 688 dev/pci/eap.c EWRITE4(sc, EAP_SIC, EAP_P2_INTR_EN | EAP_R1_INTR_EN);
sc 697 dev/pci/eap.c ctl.dev = eap1371_get_portnum_by_name(sc, AudioCoutputs,
sc 699 dev/pci/eap.c eap1371_mixer_set_port(sc, &ctl);
sc 700 dev/pci/eap.c ctl.dev = eap1371_get_portnum_by_name(sc, AudioCinputs,
sc 702 dev/pci/eap.c eap1371_mixer_set_port(sc, &ctl);
sc 703 dev/pci/eap.c ctl.dev = eap1371_get_portnum_by_name(sc, AudioCrecord,
sc 705 dev/pci/eap.c eap1371_mixer_set_port(sc, &ctl);
sc 707 dev/pci/eap.c ctl.dev = eap1371_get_portnum_by_name(sc, AudioCrecord,
sc 711 dev/pci/eap.c eap1371_mixer_set_port(sc, &ctl);
sc 715 dev/pci/eap.c audio_attach_mi(eap_hw_if, sc, &sc->sc_dev);
sc 717 dev/pci/eap.c sc->sc_mididev = midi_attach_mi(&eap_midi_hw_if, sc, &sc->sc_dev);
sc 724 dev/pci/eap.c struct eap_softc *sc = sc_;
sc 726 dev/pci/eap.c sc->codec_if = codec_if;
sc 733 dev/pci/eap.c struct eap_softc *sc = sc_;
sc 738 dev/pci/eap.c icsc = EREAD4(sc, EAP_ICSC);
sc 739 dev/pci/eap.c EWRITE4(sc, EAP_ICSC, icsc | E1371_SYNC_RES);
sc 741 dev/pci/eap.c EWRITE4(sc, EAP_ICSC, icsc & ~E1371_SYNC_RES);
sc 751 dev/pci/eap.c struct eap_softc *sc = p;
sc 754 dev/pci/eap.c intr = EREAD4(sc, EAP_ICSS);
sc 757 dev/pci/eap.c sic = EREAD4(sc, EAP_SIC);
sc 770 dev/pci/eap.c EWRITE4(sc, EAP_MEMPAGE, EAP_ADC_PAGE);
sc 771 dev/pci/eap.c s = EREAD4(sc, EAP_ADC_CSR);
sc 774 dev/pci/eap.c while (((EREAD4(sc, EAP_ADC_SIZE) >> 16) + 8) % nw == 0) {
sc 783 dev/pci/eap.c EWRITE4(sc, EAP_SIC, sic & ~EAP_R1_INTR_EN);
sc 784 dev/pci/eap.c EWRITE4(sc, EAP_SIC, sic | EAP_R1_INTR_EN);
sc 785 dev/pci/eap.c if (sc->sc_rintr)
sc 786 dev/pci/eap.c sc->sc_rintr(sc->sc_rarg);
sc 789 dev/pci/eap.c EWRITE4(sc, EAP_SIC, sic & ~EAP_P2_INTR_EN);
sc 790 dev/pci/eap.c EWRITE4(sc, EAP_SIC, sic | EAP_P2_INTR_EN);
sc 791 dev/pci/eap.c if (sc->sc_pintr)
sc 792 dev/pci/eap.c sc->sc_pintr(sc->sc_parg);
sc 795 dev/pci/eap.c if ((intr & EAP_I_UART) && sc->sc_iintr != NULL) {
sc 798 dev/pci/eap.c if (EREAD1(sc, EAP_UART_STATUS) & EAP_US_RXINT) {
sc 799 dev/pci/eap.c while (EREAD1(sc, EAP_UART_STATUS) & EAP_US_RXRDY) {
sc 800 dev/pci/eap.c data = EREAD1(sc, EAP_UART_DATA);
sc 801 dev/pci/eap.c sc->sc_iintr(sc->sc_arg, data);
sc 810 dev/pci/eap.c eap_allocmem(struct eap_softc *sc, size_t size, size_t align, struct eap_dma *p)
sc 815 dev/pci/eap.c error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0,
sc 821 dev/pci/eap.c error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size,
sc 826 dev/pci/eap.c error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size,
sc 831 dev/pci/eap.c error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL,
sc 838 dev/pci/eap.c bus_dmamap_destroy(sc->sc_dmatag, p->map);
sc 840 dev/pci/eap.c bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
sc 842 dev/pci/eap.c bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
sc 847 dev/pci/eap.c eap_freemem(struct eap_softc *sc, struct eap_dma *p)
sc 849 dev/pci/eap.c bus_dmamap_unload(sc->sc_dmatag, p->map);
sc 850 dev/pci/eap.c bus_dmamap_destroy(sc->sc_dmatag, p->map);
sc 851 dev/pci/eap.c bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
sc 852 dev/pci/eap.c bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
sc 868 dev/pci/eap.c struct eap_softc *sc = addr;
sc 870 dev/pci/eap.c eap_halt_output(sc);
sc 871 dev/pci/eap.c eap_halt_input(sc);
sc 873 dev/pci/eap.c sc->sc_pintr = 0;
sc 874 dev/pci/eap.c sc->sc_rintr = 0;
sc 938 dev/pci/eap.c struct eap_softc *sc = addr;
sc 946 dev/pci/eap.c if (!sc->sc_1371) {
sc 1016 dev/pci/eap.c if (sc->sc_1371) {
sc 1017 dev/pci/eap.c eap1371_set_dac_rate(sc, play->sample_rate, 1);
sc 1018 dev/pci/eap.c eap1371_set_dac_rate(sc, play->sample_rate, 2);
sc 1019 dev/pci/eap.c eap1371_set_adc_rate(sc, rec->sample_rate);
sc 1023 dev/pci/eap.c EREAD4(sc, EAP_ICSC)));
sc 1024 dev/pci/eap.c div = EREAD4(sc, EAP_ICSC) & ~EAP_PCLKBITS;
sc 1038 dev/pci/eap.c EWRITE4(sc, EAP_ICSC, div);
sc 1061 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1067 dev/pci/eap.c if (sc->sc_prun)
sc 1069 dev/pci/eap.c sc->sc_prun = 1;
sc 1074 dev/pci/eap.c sc->sc_pintr = intr;
sc 1075 dev/pci/eap.c sc->sc_parg = arg;
sc 1077 dev/pci/eap.c sic = EREAD4(sc, EAP_SIC);
sc 1089 dev/pci/eap.c EWRITE4(sc, EAP_SIC, sic & ~EAP_P2_INTR_EN);
sc 1090 dev/pci/eap.c EWRITE4(sc, EAP_SIC, sic | EAP_P2_INTR_EN);
sc 1092 dev/pci/eap.c for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next)
sc 1102 dev/pci/eap.c EWRITE4(sc, EAP_MEMPAGE, EAP_DAC_PAGE);
sc 1103 dev/pci/eap.c EWRITE4(sc, EAP_DAC2_ADDR, DMAADDR(p));
sc 1104 dev/pci/eap.c EWRITE4(sc, EAP_DAC2_SIZE,
sc 1107 dev/pci/eap.c EWRITE4(sc, EAP_DAC2_CSR, (blksize >> sampshift) - 1);
sc 1109 dev/pci/eap.c if (sc->sc_1371)
sc 1110 dev/pci/eap.c EWRITE4(sc, E1371_SRC, 0);
sc 1112 dev/pci/eap.c icsc = EREAD4(sc, EAP_ICSC);
sc 1113 dev/pci/eap.c EWRITE4(sc, EAP_ICSC, icsc | EAP_DAC2_EN);
sc 1130 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1136 dev/pci/eap.c if (sc->sc_rrun)
sc 1138 dev/pci/eap.c sc->sc_rrun = 1;
sc 1143 dev/pci/eap.c sc->sc_rintr = intr;
sc 1144 dev/pci/eap.c sc->sc_rarg = arg;
sc 1146 dev/pci/eap.c sic = EREAD4(sc, EAP_SIC);
sc 1157 dev/pci/eap.c EWRITE4(sc, EAP_SIC, sic & ~EAP_R1_INTR_EN);
sc 1158 dev/pci/eap.c EWRITE4(sc, EAP_SIC, sic | EAP_R1_INTR_EN);
sc 1160 dev/pci/eap.c for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next)
sc 1170 dev/pci/eap.c EWRITE4(sc, EAP_MEMPAGE, EAP_ADC_PAGE);
sc 1171 dev/pci/eap.c EWRITE4(sc, EAP_ADC_ADDR, DMAADDR(p));
sc 1172 dev/pci/eap.c EWRITE4(sc, EAP_ADC_SIZE,
sc 1175 dev/pci/eap.c EWRITE4(sc, EAP_ADC_CSR, (blksize >> sampshift) - 1);
sc 1177 dev/pci/eap.c if (sc->sc_1371)
sc 1178 dev/pci/eap.c EWRITE4(sc, E1371_SRC, 0);
sc 1180 dev/pci/eap.c icsc = EREAD4(sc, EAP_ICSC);
sc 1181 dev/pci/eap.c EWRITE4(sc, EAP_ICSC, icsc | EAP_ADC_EN);
sc 1191 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1195 dev/pci/eap.c icsc = EREAD4(sc, EAP_ICSC);
sc 1196 dev/pci/eap.c EWRITE4(sc, EAP_ICSC, icsc & ~EAP_DAC2_EN);
sc 1198 dev/pci/eap.c sc->sc_prun = 0;
sc 1206 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1210 dev/pci/eap.c icsc = EREAD4(sc, EAP_ICSC);
sc 1211 dev/pci/eap.c EWRITE4(sc, EAP_ICSC, icsc & ~EAP_ADC_EN);
sc 1213 dev/pci/eap.c sc->sc_rrun = 0;
sc 1228 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1230 dev/pci/eap.c return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp));
sc 1236 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1238 dev/pci/eap.c return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp));
sc 1244 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1246 dev/pci/eap.c return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dip));
sc 1250 dev/pci/eap.c eap1371_get_portnum_by_name(struct eap_softc *sc,
sc 1253 dev/pci/eap.c return (sc->codec_if->vtbl->get_portnum_by_name(sc->codec_if, class,
sc 1258 dev/pci/eap.c eap1370_set_mixer(struct eap_softc *sc, int a, int d)
sc 1260 dev/pci/eap.c eap1370_write_codec(sc, a, d);
sc 1262 dev/pci/eap.c sc->sc_port[a] = d;
sc 1269 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1276 dev/pci/eap.c m = sc->sc_record_source = cp->un.mask;
sc 1290 dev/pci/eap.c eap1370_set_mixer(sc, AK_IN_MIXER1_L, l1);
sc 1291 dev/pci/eap.c eap1370_set_mixer(sc, AK_IN_MIXER1_R, r1);
sc 1292 dev/pci/eap.c eap1370_set_mixer(sc, AK_IN_MIXER2_L, l2);
sc 1293 dev/pci/eap.c eap1370_set_mixer(sc, AK_IN_MIXER2_R, r2);
sc 1299 dev/pci/eap.c m = sc->sc_output_source = cp->un.mask;
sc 1313 dev/pci/eap.c eap1370_set_mixer(sc, AK_OUT_MIXER1, o1);
sc 1314 dev/pci/eap.c eap1370_set_mixer(sc, AK_OUT_MIXER2, o2);
sc 1322 dev/pci/eap.c sc->sc_mic_preamp = cp->un.ord;
sc 1323 dev/pci/eap.c eap1370_set_mixer(sc, AK_MGAIN, cp->un.ord);
sc 1374 dev/pci/eap.c eap1370_set_mixer(sc, la, l);
sc 1376 dev/pci/eap.c eap1370_set_mixer(sc, ra, r);
sc 1384 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1391 dev/pci/eap.c cp->un.mask = sc->sc_record_source;
sc 1396 dev/pci/eap.c cp->un.mask = sc->sc_output_source;
sc 1401 dev/pci/eap.c cp->un.ord = sc->sc_mic_preamp;
sc 1404 dev/pci/eap.c l = ATT5_TO_VOL(sc->sc_port[AK_MASTER_L]);
sc 1405 dev/pci/eap.c r = ATT5_TO_VOL(sc->sc_port[AK_MASTER_R]);
sc 1432 dev/pci/eap.c l = GAIN5_TO_VOL(sc->sc_port[la]);
sc 1433 dev/pci/eap.c r = GAIN5_TO_VOL(sc->sc_port[ra]);
sc 1613 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1620 dev/pci/eap.c error = eap_allocmem(sc, size, 16, p);
sc 1625 dev/pci/eap.c p->next = sc->sc_dmas;
sc 1626 dev/pci/eap.c sc->sc_dmas = p;
sc 1633 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1636 dev/pci/eap.c for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
sc 1638 dev/pci/eap.c eap_freemem(sc, p);
sc 1649 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1654 dev/pci/eap.c for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next)
sc 1658 dev/pci/eap.c return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs,
sc 1672 dev/pci/eap.c struct eap_softc *sc = v;
sc 1674 dev/pci/eap.c return (sc->flags);
sc 1683 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1686 dev/pci/eap.c sc->sc_iintr = iintr;
sc 1687 dev/pci/eap.c sc->sc_ointr = ointr;
sc 1688 dev/pci/eap.c sc->sc_arg = arg;
sc 1690 dev/pci/eap.c EWRITE4(sc, EAP_ICSC, EREAD4(sc, EAP_ICSC) | EAP_UART_EN);
sc 1699 dev/pci/eap.c EWRITE1(sc, EAP_UART_CONTROL, uctrl);
sc 1707 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1709 dev/pci/eap.c tsleep(sc, PWAIT, "eapclm", hz/10); /* give uart a chance to drain */
sc 1710 dev/pci/eap.c EWRITE1(sc, EAP_UART_CONTROL, 0);
sc 1711 dev/pci/eap.c EWRITE4(sc, EAP_ICSC, EREAD4(sc, EAP_ICSC) & ~EAP_UART_EN);
sc 1713 dev/pci/eap.c sc->sc_iintr = 0;
sc 1714 dev/pci/eap.c sc->sc_ointr = 0;
sc 1720 dev/pci/eap.c struct eap_softc *sc = addr;
sc 1724 dev/pci/eap.c if (EREAD1(sc, EAP_UART_STATUS) & EAP_US_TXRDY) {
sc 1725 dev/pci/eap.c EWRITE1(sc, EAP_UART_DATA, d);
sc 69 dev/pci/ehci_pci.c ehci_softc_t sc;
sc 104 dev/pci/ehci_pci.c struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self;
sc 111 dev/pci/ehci_pci.c char *devname = sc->sc.sc_bus.bdev.dv_xname;
sc 117 dev/pci/ehci_pci.c &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size, 0)) {
sc 122 dev/pci/ehci_pci.c sc->sc_pc = pc;
sc 123 dev/pci/ehci_pci.c sc->sc_tag = tag;
sc 124 dev/pci/ehci_pci.c sc->sc.sc_bus.dmatag = pa->pa_dmat;
sc 128 dev/pci/ehci_pci.c sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
sc 129 dev/pci/ehci_pci.c DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs));
sc 130 dev/pci/ehci_pci.c EOWRITE2(&sc->sc, EHCI_USBINTR, 0);
sc 138 dev/pci/ehci_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ehci_intr, sc, devname);
sc 139 dev/pci/ehci_pci.c if (sc->sc_ih == NULL) {
sc 152 dev/pci/ehci_pci.c sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
sc 156 dev/pci/ehci_pci.c sc->sc.sc_bus.usbrev = USBREV_2_0;
sc 159 dev/pci/ehci_pci.c sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
sc 165 dev/pci/ehci_pci.c sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
sc 167 dev/pci/ehci_pci.c strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor));
sc 169 dev/pci/ehci_pci.c snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor),
sc 173 dev/pci/ehci_pci.c if (sc->sc.sc_id_vendor == PCI_VENDOR_VIATECH)
sc 174 dev/pci/ehci_pci.c sc->sc.sc_flags |= EHCIF_DROPPED_INTR_WORKAROUND;
sc 176 dev/pci/ehci_pci.c ehci_pci_takecontroller(sc);
sc 177 dev/pci/ehci_pci.c r = ehci_init(&sc->sc);
sc 183 dev/pci/ehci_pci.c sc->sc.sc_shutdownhook = shutdownhook_establish(ehci_pci_shutdown, sc);
sc 187 dev/pci/ehci_pci.c sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
sc 193 dev/pci/ehci_pci.c bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc 200 dev/pci/ehci_pci.c struct ehci_pci_softc *sc = (struct ehci_pci_softc *)self;
sc 203 dev/pci/ehci_pci.c rv = ehci_detach(&sc->sc, flags);
sc 206 dev/pci/ehci_pci.c if (sc->sc_ih != NULL) {
sc 207 dev/pci/ehci_pci.c pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
sc 208 dev/pci/ehci_pci.c sc->sc_ih = NULL;
sc 210 dev/pci/ehci_pci.c if (sc->sc.sc_size) {
sc 211 dev/pci/ehci_pci.c bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc 212 dev/pci/ehci_pci.c sc->sc.sc_size = 0;
sc 218 dev/pci/ehci_pci.c ehci_pci_givecontroller(struct ehci_pci_softc *sc)
sc 223 dev/pci/ehci_pci.c cparams = EREAD4(&sc->sc, EHCI_HCCPARAMS);
sc 226 dev/pci/ehci_pci.c eec = pci_conf_read(sc->sc_pc, sc->sc_tag, eecp);
sc 230 dev/pci/ehci_pci.c pci_conf_write(sc->sc_pc, sc->sc_tag, eecp,
sc 236 dev/pci/ehci_pci.c ehci_pci_takecontroller(struct ehci_pci_softc *sc)
sc 241 dev/pci/ehci_pci.c cparams = EREAD4(&sc->sc, EHCI_HCCPARAMS);
sc 245 dev/pci/ehci_pci.c eec = pci_conf_read(sc->sc_pc, sc->sc_tag, eecp);
sc 249 dev/pci/ehci_pci.c pci_conf_write(sc->sc_pc, sc->sc_tag, eecp,
sc 253 dev/pci/ehci_pci.c sc->sc.sc_bus.bdev.dv_xname));
sc 255 dev/pci/ehci_pci.c legsup = pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 263 dev/pci/ehci_pci.c sc->sc.sc_bus.bdev.dv_xname);
sc 271 dev/pci/ehci_pci.c struct ehci_pci_softc *sc = (struct ehci_pci_softc *)v;
sc 273 dev/pci/ehci_pci.c ehci_shutdown(&sc->sc);
sc 274 dev/pci/ehci_pci.c ehci_pci_givecontroller(sc);
sc 87 dev/pci/emuxki.c int emuxki_scinit(struct emuxki_softc *sc);
sc 88 dev/pci/emuxki.c void emuxki_pci_shutdown(struct emuxki_softc *sc);
sc 96 dev/pci/emuxki.c struct emuxki_mem *emuxki_mem_new(struct emuxki_softc *sc, int ptbidx,
sc 124 dev/pci/emuxki.c void emuxki_voice_recsrc_release(struct emuxki_softc *sc, emuxki_recsrc_t source);
sc 147 dev/pci/emuxki.c void emuxki_resched_timer(struct emuxki_softc *sc);
sc 162 dev/pci/emuxki.c void emuxki_initfx(struct emuxki_softc *sc);
sc 163 dev/pci/emuxki.c void emuxki_dsp_addop(struct emuxki_softc *sc, u_int16_t *pc, u_int8_t op,
sc 165 dev/pci/emuxki.c void emuxki_write_micro(struct emuxki_softc *sc, u_int32_t pc, u_int32_t data);
sc 202 dev/pci/emuxki.c int emuxki_ac97_init(struct emuxki_softc *sc);
sc 358 dev/pci/emuxki.c emuxki_pci_shutdown(struct emuxki_softc *sc)
sc 360 dev/pci/emuxki.c if (sc->sc_ih != NULL)
sc 361 dev/pci/emuxki.c pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
sc 362 dev/pci/emuxki.c if (sc->sc_ios)
sc 363 dev/pci/emuxki.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 367 dev/pci/emuxki.c emuxki_scinit(struct emuxki_softc *sc)
sc 371 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_HCFG,
sc 373 dev/pci/emuxki.c (sc->sc_type == EMUXKI_APS? 0 : EMU_HCFG_GPOUTPUT0) |
sc 376 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_INTE,
sc 379 dev/pci/emuxki.c if ((err = emuxki_init(sc)))
sc 382 dev/pci/emuxki.c if (sc->sc_type & EMUXKI_AUDIGY2) {
sc 383 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_HCFG,
sc 386 dev/pci/emuxki.c } else if (sc->sc_type & EMUXKI_AUDIGY) {
sc 387 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_HCFG,
sc 390 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_HCFG,
sc 394 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_INTE,
sc 395 dev/pci/emuxki.c bus_space_read_4(sc->sc_iot, sc->sc_ioh, EMU_INTE) |
sc 399 dev/pci/emuxki.c if (sc->sc_type & EMUXKI_AUDIGY2) {
sc 400 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_A_IOCFG,
sc 402 dev/pci/emuxki.c bus_space_read_4(sc->sc_iot, sc->sc_ioh, EMU_A_IOCFG));
sc 406 dev/pci/emuxki.c sc->pvoice = sc->rvoice = NULL;
sc 412 dev/pci/emuxki.c emuxki_ac97_init(struct emuxki_softc *sc)
sc 414 dev/pci/emuxki.c sc->hostif.arg = sc;
sc 415 dev/pci/emuxki.c sc->hostif.attach = emuxki_ac97_attach;
sc 416 dev/pci/emuxki.c sc->hostif.read = emuxki_ac97_read;
sc 417 dev/pci/emuxki.c sc->hostif.write = emuxki_ac97_write;
sc 418 dev/pci/emuxki.c sc->hostif.reset = emuxki_ac97_reset;
sc 419 dev/pci/emuxki.c sc->hostif.flags = NULL;
sc 420 dev/pci/emuxki.c return (ac97_attach(&(sc->hostif)));
sc 433 dev/pci/emuxki.c struct emuxki_softc *sc = (struct emuxki_softc *) self;
sc 439 dev/pci/emuxki.c &(sc->sc_iot), &(sc->sc_ioh), &(sc->sc_iob), &(sc->sc_ios), 0)) {
sc 444 dev/pci/emuxki.c sc->sc_pc = pa->pa_pc;
sc 445 dev/pci/emuxki.c sc->sc_dmat = pa->pa_dmat;
sc 449 dev/pci/emuxki.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 454 dev/pci/emuxki.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, emuxki_intr,
sc 455 dev/pci/emuxki.c sc, sc->sc_dev.dv_xname);
sc 456 dev/pci/emuxki.c if (sc->sc_ih == NULL) {
sc 461 dev/pci/emuxki.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 468 dev/pci/emuxki.c sc->sc_type = EMUXKI_AUDIGY;
sc 471 dev/pci/emuxki.c sc->sc_type |= EMUXKI_AUDIGY2;
sc 472 dev/pci/emuxki.c strlcpy(sc->sc_audv.name, "Audigy2", sizeof sc->sc_audv.name);
sc 474 dev/pci/emuxki.c strlcpy(sc->sc_audv.name, "Audigy", sizeof sc->sc_audv.name);
sc 478 dev/pci/emuxki.c sc->sc_type = EMUXKI_APS;
sc 479 dev/pci/emuxki.c strlcpy(sc->sc_audv.name, "E-mu APS", sizeof sc->sc_audv.name);
sc 481 dev/pci/emuxki.c sc->sc_type = EMUXKI_SBLIVE;
sc 482 dev/pci/emuxki.c strlcpy(sc->sc_audv.name, "SB Live!", sizeof sc->sc_audv.name);
sc 484 dev/pci/emuxki.c snprintf(sc->sc_audv.version, sizeof sc->sc_audv.version, "0x%02x",
sc 486 dev/pci/emuxki.c strlcpy(sc->sc_audv.config, "emuxki", sizeof sc->sc_audv.config);
sc 488 dev/pci/emuxki.c if (emuxki_scinit(sc) ||
sc 490 dev/pci/emuxki.c (sc->sc_type == EMUXKI_APS || emuxki_ac97_init(sc)) ||
sc 491 dev/pci/emuxki.c (sc->sc_audev = audio_attach_mi(&emuxki_hw_if, sc, self)) == NULL) {
sc 492 dev/pci/emuxki.c emuxki_pci_shutdown(sc);
sc 500 dev/pci/emuxki.c struct emuxki_softc *sc = (struct emuxki_softc *) self;
sc 502 dev/pci/emuxki.c if (sc->sc_audev != NULL) /* Test in case audio didn't attach */
sc 503 dev/pci/emuxki.c config_detach(sc->sc_audev, 0);
sc 507 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_HCFG,
sc 510 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_INTE, 0);
sc 512 dev/pci/emuxki.c emuxki_shutdown(sc);
sc 514 dev/pci/emuxki.c emuxki_pci_shutdown(sc);
sc 585 dev/pci/emuxki.c emuxki_read(struct emuxki_softc *sc, u_int16_t chano, u_int32_t reg)
sc 592 dev/pci/emuxki.c (sc->sc_type & EMUXKI_AUDIGY ?
sc 602 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_PTR, ptr);
sc 603 dev/pci/emuxki.c ptr = (bus_space_read_4(sc->sc_iot, sc->sc_ioh, EMU_DATA) & mask)
sc 611 dev/pci/emuxki.c emuxki_write(struct emuxki_softc *sc, u_int16_t chano,
sc 619 dev/pci/emuxki.c (sc->sc_type & EMUXKI_AUDIGY ?
sc 632 dev/pci/emuxki.c (emuxki_read(sc, chano, reg & 0xffff) & ~mask);
sc 636 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_PTR, ptr);
sc 637 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_DATA, data);
sc 644 dev/pci/emuxki.c emuxki_write_micro(struct emuxki_softc *sc, u_int32_t pc, u_int32_t data)
sc 646 dev/pci/emuxki.c emuxki_write(sc, 0,
sc 647 dev/pci/emuxki.c (sc->sc_type & EMUXKI_AUDIGY ?
sc 653 dev/pci/emuxki.c emuxki_dsp_addop(struct emuxki_softc *sc, u_int16_t *pc, u_int8_t op,
sc 656 dev/pci/emuxki.c if (sc->sc_type & EMUXKI_AUDIGY) {
sc 657 dev/pci/emuxki.c emuxki_write_micro(sc, *pc << 1,
sc 660 dev/pci/emuxki.c emuxki_write_micro(sc, (*pc << 1) + 1,
sc 665 dev/pci/emuxki.c emuxki_write_micro(sc, *pc << 1,
sc 668 dev/pci/emuxki.c emuxki_write_micro(sc, (*pc << 1) + 1,
sc 679 dev/pci/emuxki.c emuxki_initfx(struct emuxki_softc *sc)
sc 685 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_DSP_GPR(pc), 0);
sc 687 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_TANKMEMDATAREGBASE + pc, 0);
sc 688 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_TANKMEMADDRREGBASE + pc, 0);
sc 692 dev/pci/emuxki.c if (sc->sc_type & EMUXKI_AUDIGY) {
sc 694 dev/pci/emuxki.c emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS,
sc 698 dev/pci/emuxki.c emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS,
sc 705 dev/pci/emuxki.c emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS,
sc 709 dev/pci/emuxki.c emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS,
sc 715 dev/pci/emuxki.c emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_ACC3,
sc 719 dev/pci/emuxki.c emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_ACC3,
sc 726 dev/pci/emuxki.c emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_ACC3,
sc 730 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_A_DBG, 0); /* Is it really necessary ? */
sc 733 dev/pci/emuxki.c emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS,
sc 737 dev/pci/emuxki.c emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS,
sc 744 dev/pci/emuxki.c emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS,
sc 748 dev/pci/emuxki.c emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS,
sc 754 dev/pci/emuxki.c emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_ACC3,
sc 758 dev/pci/emuxki.c emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_ACC3,
sc 765 dev/pci/emuxki.c emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_ACC3,
sc 769 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_DBG, 0); /* Is it really necessary ? */
sc 774 dev/pci/emuxki.c emuxki_init(struct emuxki_softc *sc)
sc 781 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_CLIEL, 0);
sc 782 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_CLIEH, 0);
sc 783 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_SOLEL, 0);
sc 784 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_SOLEH, 0);
sc 787 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
sc 788 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_MICBA, 0);
sc 789 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
sc 790 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_FXBA, 0);
sc 791 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
sc 792 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_ADCBA, 0);
sc 794 dev/pci/emuxki.c if(sc->sc_type & EMUXKI_AUDIGY) {
sc 795 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_SPBYPASS, EMU_SPBYPASS_24_BITS);
sc 796 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_AC97SLOT, EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE);
sc 801 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_DCYSUSV, 0);
sc 802 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_IP, 0);
sc 803 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_VTFT, 0xffff);
sc 804 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_CVCF, 0xffff);
sc 805 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_PTRX, 0);
sc 806 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_CPF, 0);
sc 807 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_CCR, 0);
sc 808 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_PSST, 0);
sc 809 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_DSL, 0x10); /* Why 16 ? */
sc 810 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_CCCA, 0);
sc 811 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_Z1, 0);
sc 812 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_Z2, 0);
sc 813 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_FXRT, 0x32100000);
sc 814 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_ATKHLDM, 0);
sc 815 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_DCYSUSM, 0);
sc 816 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_IFATN, 0xffff);
sc 817 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_PEFE, 0);
sc 818 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_FMMOD, 0);
sc 819 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_TREMFRQ, 24);
sc 820 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_FM2FRQ2, 24);
sc 821 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_TEMPENV, 0);
sc 824 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_LFOVAL2, 0);
sc 825 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_LFOVAL1, 0);
sc 826 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_ATKHLDV, 0);
sc 827 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_ENVVOL, 0);
sc 828 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_ENVVAL, 0);
sc 837 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_SPCS0, spcs);
sc 838 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_SPCS1, spcs);
sc 839 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_SPCS2, spcs);
sc 841 dev/pci/emuxki.c if(sc->sc_type & EMUXKI_AUDIGY2) {
sc 842 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_A2_SPDIF_SAMPLERATE, EMU_A2_SPDIF_UNKNOWN);
sc 844 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_A2_PTR, EMU_A2_SRCSEL);
sc 845 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_A2_DATA,
sc 848 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_A2_PTR, EMU_A2_SRCMULTI);
sc 849 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_A2_DATA, EMU_A2_SRCMULTI_ENABLE_INPUT);
sc 854 dev/pci/emuxki.c emuxki_initfx(sc);
sc 857 dev/pci/emuxki.c if ((sc->ptb = emuxki_dmamem_alloc(sc->sc_dmat,
sc 864 dev/pci/emuxki.c if ((sc->silentpage = emuxki_dmamem_alloc(sc->sc_dmat, EMU_PTESIZE,
sc 866 dev/pci/emuxki.c emuxki_dmamem_free(sc->ptb, M_DEVBUF);
sc 872 dev/pci/emuxki.c memset(KERNADDR(sc->silentpage), 0, DMASIZE(sc->silentpage));
sc 879 dev/pci/emuxki.c silentpage = DMAADDR(sc->silentpage) << 1;
sc 880 dev/pci/emuxki.c ptb = KERNADDR(sc->ptb);
sc 885 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_PTB, DMAADDR(sc->ptb));
sc 886 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_TCBS, 0); /* This means 16K TCB */
sc 887 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_TCB, 0); /* No TCB use for now */
sc 895 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_MAPA, silentpage);
sc 896 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_MAPB, silentpage);
sc 897 dev/pci/emuxki.c sc->channel[i] = NULL;
sc 901 dev/pci/emuxki.c LIST_INIT(&(sc->voices));
sc 904 dev/pci/emuxki.c sc->timerstate &= ~EMU_TIMER_STATE_ENABLED;
sc 909 dev/pci/emuxki.c emuxki_shutdown(struct emuxki_softc *sc)
sc 914 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_CLIEL, 0);
sc 915 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_CLIEH, 0);
sc 916 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_SOLEL, 0);
sc 917 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_SOLEH, 0);
sc 927 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_DCYSUSV, 0);
sc 929 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_VTFT, 0);
sc 930 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_CVCF, 0);
sc 931 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_PTRX, 0);
sc 932 dev/pci/emuxki.c emuxki_write(sc, i, EMU_CHAN_CPF, 0);
sc 939 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE);
sc 940 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_MICBA, 0);
sc 941 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE);
sc 942 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_FXBA, 0);
sc 943 dev/pci/emuxki.c if(sc->sc_type & EMUXKI_AUDIGY) {
sc 944 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_A_FXWC1, 0);
sc 945 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_A_FXWC2, 0);
sc 947 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_FXWC, 0);
sc 949 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE);
sc 950 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_ADCBA, 0);
sc 956 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_TCB, 0); /* 16K again */
sc 957 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_TCBS, 0);
sc 959 dev/pci/emuxki.c emuxki_write(sc, 0, EMU_DBG, 0x8000); /* necessary ? */
sc 961 dev/pci/emuxki.c emuxki_dmamem_free(sc->silentpage, M_DEVBUF);
sc 962 dev/pci/emuxki.c emuxki_dmamem_free(sc->ptb, M_DEVBUF);
sc 968 dev/pci/emuxki.c emuxki_mem_new(struct emuxki_softc *sc, int ptbidx,
sc 977 dev/pci/emuxki.c if ((mem->dmamem = emuxki_dmamem_alloc(sc->sc_dmat, size,
sc 993 dev/pci/emuxki.c emuxki_pmem_alloc(struct emuxki_softc *sc, size_t size, int type, int flags)
sc 1000 dev/pci/emuxki.c ptb = KERNADDR(sc->ptb);
sc 1001 dev/pci/emuxki.c silentpage = DMAADDR(sc->silentpage) << 1;
sc 1016 dev/pci/emuxki.c if ((mem = emuxki_mem_new(sc, i,
sc 1025 dev/pci/emuxki.c LIST_INSERT_HEAD(&(sc->mem), mem, next);
sc 1036 dev/pci/emuxki.c emuxki_rmem_alloc(struct emuxki_softc *sc, size_t size, int type, int flags)
sc 1041 dev/pci/emuxki.c mem = emuxki_mem_new(sc, EMU_RMEM, size, type, flags);
sc 1046 dev/pci/emuxki.c LIST_INSERT_HEAD(&(sc->mem), mem, next);
sc 1069 dev/pci/emuxki.c chan->voice->sc->sc_type & EMUXKI_AUDIGY ?
sc 1136 dev/pci/emuxki.c chan->voice->sc->channel[num] = chan;
sc 1144 dev/pci/emuxki.c chan->voice->sc->channel[chan->num] = NULL;
sc 1197 dev/pci/emuxki.c struct emuxki_softc *sc = chan->voice->sc;
sc 1200 dev/pci/emuxki.c if(sc->sc_type & EMUXKI_AUDIGY) {
sc 1201 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_A_CHAN_FXRT1,
sc 1206 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_A_CHAN_FXRT2,
sc 1211 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_A_CHAN_SENDAMOUNTS,
sc 1217 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_FXRT,
sc 1224 dev/pci/emuxki.c emuxki_write(sc, chano, 0x10000000 | EMU_CHAN_PTRX,
sc 1226 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_DSL,
sc 1228 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_PSST,
sc 1236 dev/pci/emuxki.c struct emuxki_softc *sc = voice->sc;
sc 1243 dev/pci/emuxki.c mapval = DMAADDR(sc->silentpage) << 1 | EMU_CHAN_MAP_PTI_MASK;
sc 1246 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_CPF_STEREO, voice->stereo);
sc 1250 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_CCCA,
sc 1254 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_Z1, 0);
sc 1255 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_Z2, 0);
sc 1256 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_MAPA, mapval);
sc 1257 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_MAPB, mapval);
sc 1258 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_CVCF_CURRFILTER,
sc 1260 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_VTFT_FILTERTARGET,
sc 1262 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_ATKHLDM,
sc 1265 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_DCYSUSM,
sc 1268 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_LFOVAL1,
sc 1270 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_LFOVAL2,
sc 1272 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_FMMOD,
sc 1275 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_TREMFRQ,
sc 1277 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_FM2FRQ2,
sc 1280 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_ENVVAL,
sc 1282 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_ATKHLDV,
sc 1285 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_ENVVOL,
sc 1287 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_PEFE,
sc 1297 dev/pci/emuxki.c struct emuxki_softc *sc = voice->sc;
sc 1308 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_CD0 + cache_sample,
sc 1311 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_CCR_CACHEINVALIDSIZE, 0);
sc 1312 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_CCR_READADDRESS, 64);
sc 1313 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_CCR_CACHEINVALIDSIZE,
sc 1315 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_IFATN,
sc 1318 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_VTFT_VOLUMETARGET,
sc 1320 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_CVCF_CURRVOL,
sc 1322 dev/pci/emuxki.c emuxki_write(sc, 0,
sc 1325 dev/pci/emuxki.c emuxki_write(sc, 0,
sc 1328 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_DCYSUSV,
sc 1331 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_PTRX_PITCHTARGET,
sc 1333 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_CPF_PITCH,
sc 1335 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_IP, chan->pitch.initial);
sc 1345 dev/pci/emuxki.c struct emuxki_softc *sc = chan->voice->sc;
sc 1348 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_PTRX_PITCHTARGET, 0);
sc 1349 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_CPF_PITCH, 0);
sc 1350 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_IFATN_ATTENUATION, 0xff);
sc 1351 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_VTFT_VOLUMETARGET, 0);
sc 1352 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_CVCF_CURRVOL, 0);
sc 1353 dev/pci/emuxki.c emuxki_write(sc, chano, EMU_CHAN_IP, 0);
sc 1368 dev/pci/emuxki.c struct emuxki_channel **channel = voice->sc->channel;
sc 1423 dev/pci/emuxki.c if (voice->sc->recsrc[source] == voice)
sc 1425 dev/pci/emuxki.c if (voice->sc->recsrc[source] != NULL)
sc 1427 dev/pci/emuxki.c voice->sc->recsrc[source] = voice;
sc 1433 dev/pci/emuxki.c emuxki_voice_recsrc_release(struct emuxki_softc *sc, emuxki_recsrc_t source)
sc 1435 dev/pci/emuxki.c sc->recsrc[source] = NULL;
sc 1462 dev/pci/emuxki.c emuxki_voice_recsrc_release(voice->sc,
sc 1470 dev/pci/emuxki.c emuxki_voice_new(struct emuxki_softc *sc, u_int8_t use)
sc 1476 dev/pci/emuxki.c voice = sc->lvoice;
sc 1477 dev/pci/emuxki.c sc->lvoice = NULL;
sc 1488 dev/pci/emuxki.c voice->sc = sc;
sc 1507 dev/pci/emuxki.c LIST_INSERT_HEAD((&sc->voices), voice, next);
sc 1516 dev/pci/emuxki.c struct emuxki_softc *sc = voice->sc;
sc 1525 dev/pci/emuxki.c lvoice = sc->lvoice;
sc 1526 dev/pci/emuxki.c sc->lvoice = voice;
sc 1652 dev/pci/emuxki.c LIST_FOREACH(mem, &voice->sc->mem, next) {
sc 1690 dev/pci/emuxki.c emuxki_write(voice->sc, 0,
sc 1692 dev/pci/emuxki.c emuxki_write(voice->sc, 0,
sc 1732 dev/pci/emuxki.c return (emuxki_read(voice->sc,
sc 1740 dev/pci/emuxki.c idxreg = (voice->sc->sc_type & EMUXKI_AUDIGY) ?
sc 1744 dev/pci/emuxki.c idxreg = (voice->sc->sc_type & EMUXKI_AUDIGY) ?
sc 1756 dev/pci/emuxki.c return (emuxki_read(voice->sc, 0, EMU_RECIDX(idxreg))
sc 1763 dev/pci/emuxki.c emuxki_resched_timer(struct emuxki_softc *sc)
sc 1771 dev/pci/emuxki.c LIST_FOREACH(voice, &sc->voices, next) {
sc 1781 dev/pci/emuxki.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, EMU_TIMER, timerate);
sc 1782 dev/pci/emuxki.c if (!active && (sc->timerstate & EMU_TIMER_STATE_ENABLED)) {
sc 1783 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_INTE,
sc 1784 dev/pci/emuxki.c bus_space_read_4(sc->sc_iot, sc->sc_ioh, EMU_INTE) &
sc 1786 dev/pci/emuxki.c sc->timerstate &= ~EMU_TIMER_STATE_ENABLED;
sc 1787 dev/pci/emuxki.c } else if (active && !(sc->timerstate & EMU_TIMER_STATE_ENABLED)) {
sc 1788 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_INTE,
sc 1789 dev/pci/emuxki.c bus_space_read_4(sc->sc_iot, sc->sc_ioh, EMU_INTE) |
sc 1791 dev/pci/emuxki.c sc->timerstate |= EMU_TIMER_STATE_ENABLED;
sc 1819 dev/pci/emuxki.c if(voice->sc->sc_type & EMUXKI_AUDIGY)
sc 1829 dev/pci/emuxki.c if(voice->sc->sc_type & EMUXKI_AUDIGY)
sc 1835 dev/pci/emuxki.c if(voice->sc->sc_type & EMUXKI_AUDIGY)
sc 1868 dev/pci/emuxki.c if (voice->sc->sc_type & EMUXKI_AUDIGY) {
sc 1878 dev/pci/emuxki.c emuxki_write(voice->sc, 0, EMU_ADCCR, 0);
sc 1879 dev/pci/emuxki.c emuxki_write(voice->sc, 0, EMU_ADCCR, val);
sc 1893 dev/pci/emuxki.c val = emu_rd(sc, INTE, 4);
sc 1895 dev/pci/emuxki.c emu_wr(sc, INTE, val, 4);
sc 1900 dev/pci/emuxki.c emuxki_resched_timer(voice->sc);
sc 1913 dev/pci/emuxki.c emuxki_write(voice->sc, 0, EMU_ADCCR, 0);
sc 1923 dev/pci/emuxki.c emuxki_write(voice->sc, 0,
sc 1929 dev/pci/emuxki.c val = emu_rd(sc, INTE, 4);
sc 1931 dev/pci/emuxki.c emu_wr(sc, INTE, val, 4);
sc 1936 dev/pci/emuxki.c emuxki_resched_timer(voice->sc);
sc 1945 dev/pci/emuxki.c struct emuxki_softc *sc = arg;
sc 1949 dev/pci/emuxki.c while ((ipr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, EMU_IPR))) {
sc 1951 dev/pci/emuxki.c LIST_FOREACH(voice, &sc->voices, next) {
sc 1979 dev/pci/emuxki.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, EMU_IPR, ipr);
sc 1993 dev/pci/emuxki.c struct emuxki_softc *sc = addr;
sc 1996 dev/pci/emuxki.c printf("%s: emuxki_open called\n", sc->sc_dev.dv_xname);
sc 2012 dev/pci/emuxki.c sc->rvoice = emuxki_voice_new(sc, 0 /* EMU_VOICE_USE_RECORD */);
sc 2013 dev/pci/emuxki.c if (sc->rvoice == NULL)
sc 2017 dev/pci/emuxki.c sc->rvoice->dataloc.source = EMU_RECSRC_ADC;
sc 2021 dev/pci/emuxki.c sc->pvoice = emuxki_voice_new(sc, EMU_VOICE_USE_PLAY);
sc 2022 dev/pci/emuxki.c if (sc->pvoice == NULL) {
sc 2024 dev/pci/emuxki.c emuxki_voice_delete(sc->rvoice);
sc 2035 dev/pci/emuxki.c struct emuxki_softc *sc = addr;
sc 2038 dev/pci/emuxki.c printf("%s: emu10K1_close called\n", sc->sc_dev.dv_xname);
sc 2042 dev/pci/emuxki.c if (sc->rvoice != NULL)
sc 2043 dev/pci/emuxki.c emuxki_voice_delete(sc->rvoice);
sc 2044 dev/pci/emuxki.c sc->rvoice = NULL;
sc 2045 dev/pci/emuxki.c if (sc->pvoice != NULL)
sc 2046 dev/pci/emuxki.c emuxki_voice_delete(sc->pvoice);
sc 2047 dev/pci/emuxki.c sc->pvoice = NULL;
sc 2054 dev/pci/emuxki.c struct emuxki_softc *sc = addr;
sc 2056 dev/pci/emuxki.c printf("%s: emuxki_query_encoding called\n", sc->sc_dev.dv_xname);
sc 2206 dev/pci/emuxki.c struct emuxki_softc *sc = addr;
sc 2219 dev/pci/emuxki.c sc->pvoice : sc->rvoice, p)))
sc 2229 dev/pci/emuxki.c struct emuxki_softc *sc = addr;
sc 2232 dev/pci/emuxki.c if (sc->pvoice == NULL)
sc 2235 dev/pci/emuxki.c emuxki_voice_halt(sc->pvoice);
sc 2242 dev/pci/emuxki.c struct emuxki_softc *sc = addr;
sc 2245 dev/pci/emuxki.c printf("%s: emuxki_halt_input called\n", sc->sc_dev.dv_xname);
sc 2249 dev/pci/emuxki.c if (sc->rvoice == NULL)
sc 2251 dev/pci/emuxki.c emuxki_voice_halt(sc->rvoice);
sc 2258 dev/pci/emuxki.c struct emuxki_softc *sc = v;
sc 2259 dev/pci/emuxki.c *adp = sc->sc_audv;
sc 2266 dev/pci/emuxki.c struct emuxki_softc *sc = addr;
sc 2268 dev/pci/emuxki.c return sc->codecif->vtbl->mixer_set_port(sc->codecif, mctl);
sc 2274 dev/pci/emuxki.c struct emuxki_softc *sc = addr;
sc 2276 dev/pci/emuxki.c return sc->codecif->vtbl->mixer_get_port(sc->codecif, mctl);
sc 2282 dev/pci/emuxki.c struct emuxki_softc *sc = addr;
sc 2284 dev/pci/emuxki.c return sc->codecif->vtbl->query_devinfo(sc->codecif, minfo);
sc 2290 dev/pci/emuxki.c struct emuxki_softc *sc = addr;
sc 2293 dev/pci/emuxki.c return emuxki_pmem_alloc(sc, size, type, flags);
sc 2295 dev/pci/emuxki.c return emuxki_rmem_alloc(sc, size, type, flags);
sc 2301 dev/pci/emuxki.c struct emuxki_softc *sc = addr;
sc 2307 dev/pci/emuxki.c ptb = KERNADDR(sc->ptb);
sc 2308 dev/pci/emuxki.c silentpage = DMAADDR(sc->silentpage) << 1;
sc 2309 dev/pci/emuxki.c LIST_FOREACH(mem, &sc->mem, next) {
sc 2379 dev/pci/emuxki.c struct emuxki_softc *sc = addr;
sc 2382 dev/pci/emuxki.c LIST_FOREACH(mem, &sc->mem, next) {
sc 2406 dev/pci/emuxki.c struct emuxki_softc *sc = addr;
sc 2408 dev/pci/emuxki.c struct emuxki_voice *voice = sc->pvoice;
sc 2429 dev/pci/emuxki.c struct emuxki_softc *sc = addr;
sc 2431 dev/pci/emuxki.c struct emuxki_voice *voice = sc->rvoice;
sc 2455 dev/pci/emuxki.c struct emuxki_softc *sc = arg;
sc 2457 dev/pci/emuxki.c sc->codecif = codecif;
sc 2464 dev/pci/emuxki.c struct emuxki_softc *sc = arg;
sc 2468 dev/pci/emuxki.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, EMU_AC97ADDR, reg);
sc 2469 dev/pci/emuxki.c *val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, EMU_AC97DATA);
sc 2478 dev/pci/emuxki.c struct emuxki_softc *sc = arg;
sc 2482 dev/pci/emuxki.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, EMU_AC97ADDR, reg);
sc 2483 dev/pci/emuxki.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, EMU_AC97DATA, val);
sc 189 dev/pci/emuxkivar.h struct emuxki_softc *sc; /* our softc */
sc 340 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)vc->parent;
sc 356 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 363 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 369 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 379 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 386 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 392 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 415 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)vc->parent;
sc 416 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 417 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 425 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 428 dev/pci/esa.c sc->sc_ntimers--;
sc 429 dev/pci/esa.c if (sc->sc_ntimers == 0) {
sc 430 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 432 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 439 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 441 dev/pci/esa.c sc->mixer_list.indexmap[vc->index]);
sc 443 dev/pci/esa.c esa_remove_list(vc, &sc->mixer_list, vc->index);
sc 444 dev/pci/esa.c esa_remove_list(vc, &sc->dma_list, vc->index);
sc 445 dev/pci/esa.c esa_remove_list(vc, &sc->msrc_list, vc->index);
sc 454 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)vc->parent;
sc 455 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 456 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 464 dev/pci/esa.c sc->sc_ntimers--;
sc 465 dev/pci/esa.c if (sc->sc_ntimers == 0) {
sc 466 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 468 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 475 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, vc->rec.data_offset +
sc 477 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, ESA_KDATA_ADC1_REQUEST,
sc 481 dev/pci/esa.c esa_remove_list(vc, &sc->adc1_list, vc->index + ESA_NUM_VOICES);
sc 482 dev/pci/esa.c esa_remove_list(vc, &sc->dma_list, vc->index + ESA_NUM_VOICES);
sc 483 dev/pci/esa.c esa_remove_list(vc, &sc->msrc_list, vc->index + ESA_NUM_VOICES);
sc 492 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)vc->parent;
sc 499 dev/pci/esa.c error = esa_allocmem(sc, size, 16, p);
sc 503 dev/pci/esa.c sc->sc_dev.dv_xname);
sc 516 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)vc->parent;
sc 522 dev/pci/esa.c esa_freemem(sc, p);
sc 542 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)vc->parent;
sc 544 dev/pci/esa.c return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, mc));
sc 551 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)vc->parent;
sc 553 dev/pci/esa.c return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, mc));
sc 560 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)vc->parent;
sc 562 dev/pci/esa.c return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, di));
sc 591 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)vc->parent;
sc 593 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 594 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 617 dev/pci/esa.c sc->sc_dev.dv_xname, start);
sc 634 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 636 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 638 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 640 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 642 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 644 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 648 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 650 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 652 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 654 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 656 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 658 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 660 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 662 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 666 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 668 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 671 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 675 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 682 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 686 dev/pci/esa.c esa_add_list(vc, &sc->msrc_list, dac_data >> ESA_DP_SHIFT_COUNT,
sc 688 dev/pci/esa.c esa_add_list(vc, &sc->dma_list, dac_data >> ESA_DP_SHIFT_COUNT,
sc 690 dev/pci/esa.c esa_add_list(vc, &sc->mixer_list, dac_data >> ESA_DP_SHIFT_COUNT,
sc 698 dev/pci/esa.c sc->sc_ntimers++;
sc 700 dev/pci/esa.c if (sc->sc_ntimers == 1) {
sc 701 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 703 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 710 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, dac_data +
sc 712 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 714 dev/pci/esa.c sc->mixer_list.indexmap[vc->index]);
sc 725 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)vc->parent;
sc 727 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 728 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 756 dev/pci/esa.c sc->sc_dev.dv_xname, start);
sc 773 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 775 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 777 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 779 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 781 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 783 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 787 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 789 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 791 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 793 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 795 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 797 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 799 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 801 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 805 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 808 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 815 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 819 dev/pci/esa.c esa_add_list(vc, &sc->adc1_list, adc_data >> ESA_DP_SHIFT_COUNT,
sc 821 dev/pci/esa.c esa_add_list(vc, &sc->msrc_list, adc_data >> ESA_DP_SHIFT_COUNT,
sc 823 dev/pci/esa.c esa_add_list(vc, &sc->dma_list, adc_data >> ESA_DP_SHIFT_COUNT,
sc 831 dev/pci/esa.c sc->sc_ntimers++;
sc 832 dev/pci/esa.c if (sc->sc_ntimers == 1) {
sc 833 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 835 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 842 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, adc_data +
sc 844 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, ESA_KDATA_ADC1_REQUEST,
sc 855 dev/pci/esa.c struct esa_softc *sc = hdl;
sc 857 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 858 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 876 dev/pci/esa.c printf("%s: hardware volume interrupt\n", sc->sc_dev.dv_xname);
sc 883 dev/pci/esa.c printf("%s: esa_intr: FIXME\n", sc->sc_dev.dv_xname);
sc 887 dev/pci/esa.c sc->sc_dev.dv_xname, event);
sc 903 dev/pci/esa.c vc = &sc->voice[i];
sc 907 dev/pci/esa.c pos = esa_get_pointer(sc, &vc->play)
sc 921 dev/pci/esa.c pos = esa_get_pointer(sc, &vc->rec)
sc 941 dev/pci/esa.c esa_allocmem(struct esa_softc *sc, size_t size, size_t align,
sc 947 dev/pci/esa.c error = bus_dmamem_alloc(sc->sc_dmat, p->size, align, 0,
sc 953 dev/pci/esa.c error = bus_dmamem_map(sc->sc_dmat, p->segs, p->nsegs, p->size,
sc 958 dev/pci/esa.c error = bus_dmamap_create(sc->sc_dmat, p->size, 1, p->size, 0,
sc 963 dev/pci/esa.c error = bus_dmamap_load(sc->sc_dmat, p->map, p->addr, p->size, NULL,
sc 971 dev/pci/esa.c bus_dmamap_destroy(sc->sc_dmat, p->map);
sc 973 dev/pci/esa.c bus_dmamem_unmap(sc->sc_dmat, p->addr, p->size);
sc 975 dev/pci/esa.c bus_dmamem_free(sc->sc_dmat, p->segs, p->nsegs);
sc 981 dev/pci/esa.c esa_freemem(struct esa_softc *sc, struct esa_dma *p)
sc 984 dev/pci/esa.c bus_dmamap_unload(sc->sc_dmat, p->map);
sc 985 dev/pci/esa.c bus_dmamap_destroy(sc->sc_dmat, p->map);
sc 986 dev/pci/esa.c bus_dmamem_unmap(sc->sc_dmat, p->addr, p->size);
sc 987 dev/pci/esa.c bus_dmamem_free(sc->sc_dmat, p->segs, p->nsegs);
sc 1011 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)self;
sc 1023 dev/pci/esa.c sc->type = card->type;
sc 1024 dev/pci/esa.c sc->delay1 = card->delay1;
sc 1025 dev/pci/esa.c sc->delay2 = card->delay2;
sc 1031 dev/pci/esa.c &sc->sc_iot, &sc->sc_ioh, &sc->sc_iob, &sc->sc_ios, 0)) {
sc 1037 dev/pci/esa.c sc->sc_tag = tag;
sc 1038 dev/pci/esa.c sc->sc_pct = pc;
sc 1039 dev/pci/esa.c sc->sc_dmat = pa->pa_dmat;
sc 1044 dev/pci/esa.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 1048 dev/pci/esa.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, esa_intr, self,
sc 1049 dev/pci/esa.c sc->sc_dev.dv_xname);
sc 1050 dev/pci/esa.c if (sc->sc_ih == NULL) {
sc 1055 dev/pci/esa.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 1061 dev/pci/esa.c esa_power(sc, PCI_PMCSR_STATE_D0);
sc 1064 dev/pci/esa.c if (esa_init(sc) == -1) {
sc 1066 dev/pci/esa.c sc->sc_dev.dv_xname);
sc 1067 dev/pci/esa.c pci_intr_disestablish(pc, sc->sc_ih);
sc 1068 dev/pci/esa.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 1075 dev/pci/esa.c sc->savemem = (u_int16_t *)malloc(len, M_DEVBUF, M_NOWAIT);
sc 1076 dev/pci/esa.c if (sc->savemem == NULL) {
sc 1078 dev/pci/esa.c sc->sc_dev.dv_xname);
sc 1079 dev/pci/esa.c pci_intr_disestablish(pc, sc->sc_ih);
sc 1080 dev/pci/esa.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 1083 dev/pci/esa.c bzero(sc->savemem, len);
sc 1094 dev/pci/esa.c sc->codec_flags |= AC97_HOST_SWAPPED_CHANNELS;
sc 1095 dev/pci/esa.c sc->codec_flags |= AC97_HOST_DONT_READ;
sc 1098 dev/pci/esa.c sc->host_if.arg = self;
sc 1099 dev/pci/esa.c sc->host_if.attach = esa_attach_codec;
sc 1100 dev/pci/esa.c sc->host_if.read = esa_read_codec;
sc 1101 dev/pci/esa.c sc->host_if.write = esa_write_codec;
sc 1102 dev/pci/esa.c sc->host_if.reset = esa_reset_codec;
sc 1103 dev/pci/esa.c sc->host_if.flags = esa_flags_codec;
sc 1105 dev/pci/esa.c if (ac97_attach(&sc->host_if) != 0) {
sc 1106 dev/pci/esa.c pci_intr_disestablish(pc, sc->sc_ih);
sc 1107 dev/pci/esa.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 1108 dev/pci/esa.c free(sc->savemem, M_DEVBUF);
sc 1113 dev/pci/esa.c sc->mixer_list.mem_addr = ESA_KDATA_MIXER_XFER0;
sc 1114 dev/pci/esa.c sc->mixer_list.max = ESA_MAX_VIRTUAL_MIXER_CHANNELS;
sc 1115 dev/pci/esa.c sc->adc1_list.mem_addr = ESA_KDATA_ADC1_XFER0;
sc 1116 dev/pci/esa.c sc->adc1_list.max = ESA_MAX_VIRTUAL_ADC1_CHANNELS;
sc 1117 dev/pci/esa.c sc->dma_list.mem_addr = ESA_KDATA_DMA_XFER0;
sc 1118 dev/pci/esa.c sc->dma_list.max = ESA_MAX_VIRTUAL_DMA_CHANNELS;
sc 1119 dev/pci/esa.c sc->msrc_list.mem_addr = ESA_KDATA_INSTANCE0_MINISRC;
sc 1120 dev/pci/esa.c sc->msrc_list.max = ESA_MAX_INSTANCE_MINISRC;
sc 1124 dev/pci/esa.c sc->mixer_list.indexmap[i] = -1;
sc 1125 dev/pci/esa.c sc->msrc_list.indexmap[i] = -1;
sc 1126 dev/pci/esa.c sc->dma_list.indexmap[i] = -1;
sc 1127 dev/pci/esa.c sc->adc1_list.indexmap[i] = -1;
sc 1130 dev/pci/esa.c sc->voice[i].parent = (struct device *)sc;
sc 1131 dev/pci/esa.c sc->voice[i].index = i;
sc 1132 dev/pci/esa.c sc->sc_audiodev[i] =
sc 1133 dev/pci/esa.c audio_attach_mi(&esa_hw_if, &sc->voice[i], &sc->sc_dev);
sc 1136 dev/pci/esa.c sc->powerhook = powerhook_establish(esa_powerhook, sc);
sc 1137 dev/pci/esa.c if (sc->powerhook == NULL)
sc 1139 dev/pci/esa.c sc->sc_dev.dv_xname);
sc 1147 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)self;
sc 1151 dev/pci/esa.c if (sc->sc_audiodev[i] != NULL)
sc 1152 dev/pci/esa.c config_detach(sc->sc_audiodev[i], flags);
sc 1155 dev/pci/esa.c if (sc->sc_ih != NULL)
sc 1156 dev/pci/esa.c pci_intr_disestablish(sc->sc_pct, sc->sc_ih);
sc 1157 dev/pci/esa.c if (sc->sc_ios)
sc 1158 dev/pci/esa.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 1160 dev/pci/esa.c free(sc->savemem, M_DEVBUF);
sc 1166 dev/pci/esa.c esa_read_assp(struct esa_softc *sc, u_int16_t region, u_int16_t index)
sc 1169 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 1170 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1181 dev/pci/esa.c esa_write_assp(struct esa_softc *sc, u_int16_t region, u_int16_t index,
sc 1184 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 1185 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1196 dev/pci/esa.c esa_init_codec(struct esa_softc *sc)
sc 1198 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 1199 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1210 dev/pci/esa.c struct esa_softc *sc = aux;
sc 1212 dev/pci/esa.c sc->codec_if = codec_if;
sc 1220 dev/pci/esa.c struct esa_softc *sc = aux;
sc 1221 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 1222 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1224 dev/pci/esa.c if (esa_wait(sc))
sc 1225 dev/pci/esa.c printf("%s: esa_read_codec: timed out\n", sc->sc_dev.dv_xname);
sc 1228 dev/pci/esa.c if (esa_wait(sc))
sc 1229 dev/pci/esa.c printf("%s: esa_read_codec: timed out\n", sc->sc_dev.dv_xname);
sc 1238 dev/pci/esa.c struct esa_softc *sc = aux;
sc 1239 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 1240 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1242 dev/pci/esa.c if (esa_wait(sc)) {
sc 1243 dev/pci/esa.c printf("%s: esa_write_codec: timed out\n", sc->sc_dev.dv_xname);
sc 1263 dev/pci/esa.c struct esa_softc *sc = aux;
sc 1265 dev/pci/esa.c return (sc->codec_flags);
sc 1269 dev/pci/esa.c esa_wait(struct esa_softc *sc)
sc 1272 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 1273 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1286 dev/pci/esa.c esa_init(struct esa_softc *sc)
sc 1289 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 1290 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1291 dev/pci/esa.c pcitag_t tag = sc->sc_tag;
sc 1292 dev/pci/esa.c pci_chipset_tag_t pc = sc->sc_pct;
sc 1305 dev/pci/esa.c esa_config(sc);
sc 1307 dev/pci/esa.c reset_state = esa_assp_halt(sc);
sc 1309 dev/pci/esa.c esa_init_codec(sc);
sc 1310 dev/pci/esa.c esa_codec_reset(sc);
sc 1315 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 1317 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 1322 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, ESA_KDATA_CURRENT_DMA,
sc 1328 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_CODE,
sc 1333 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_CODE, 0x400 + i,
sc 1339 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_CODE,
sc 1341 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_CODE,
sc 1343 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, ESA_KDATA_TASK0, 0x400);
sc 1345 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 1348 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 1350 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 1353 dev/pci/esa.c if (esa_amp_enable(sc))
sc 1358 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, i, 0);
sc 1362 dev/pci/esa.c vc = &sc->voice[i];
sc 1367 dev/pci/esa.c esa_enable_interrupts(sc);
sc 1376 dev/pci/esa.c esa_config(struct esa_softc *sc)
sc 1378 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 1379 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1380 dev/pci/esa.c pcitag_t tag = sc->sc_tag;
sc 1381 dev/pci/esa.c pci_chipset_tag_t pc = sc->sc_pct;
sc 1392 dev/pci/esa.c if (sc->type == ESS_MAESTRO3) {
sc 1399 dev/pci/esa.c if (sc->type == ESS_ALLEGRO1) {
sc 1417 dev/pci/esa.c esa_assp_halt(struct esa_softc *sc)
sc 1419 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 1420 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1434 dev/pci/esa.c esa_codec_reset(struct esa_softc *sc)
sc 1436 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 1437 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1467 dev/pci/esa.c delay(sc->delay1 * 1000);
sc 1474 dev/pci/esa.c delay(sc->delay2 * 1000);
sc 1476 dev/pci/esa.c esa_read_codec(sc, 0x7c, &data);
sc 1481 dev/pci/esa.c sc->sc_dev.dv_xname);
sc 1485 dev/pci/esa.c sc->sc_dev.dv_xname);
sc 1494 dev/pci/esa.c esa_amp_enable(struct esa_softc *sc)
sc 1496 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 1497 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1501 dev/pci/esa.c switch (sc->type) {
sc 1510 dev/pci/esa.c sc->sc_dev.dv_xname);
sc 1530 dev/pci/esa.c esa_enable_interrupts(struct esa_softc *sc)
sc 1532 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 1533 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1550 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)vc->parent;
sc 1553 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 1563 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)vc->parent;
sc 1573 dev/pci/esa.c val = esa_read_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 1575 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 1583 dev/pci/esa.c sc->sc_dev.dv_xname);
sc 1588 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA,
sc 1596 dev/pci/esa.c esa_power(struct esa_softc *sc, int state)
sc 1598 dev/pci/esa.c pcitag_t tag = sc->sc_tag;
sc 1599 dev/pci/esa.c pci_chipset_tag_t pc = sc->sc_pct;
sc 1615 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)hdl;
sc 1620 dev/pci/esa.c esa_suspend(sc);
sc 1623 dev/pci/esa.c esa_resume(sc);
sc 1624 dev/pci/esa.c (sc->codec_if->vtbl->restore_ports)(sc->codec_if);
sc 1630 dev/pci/esa.c esa_suspend(struct esa_softc *sc)
sc 1632 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 1633 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1641 dev/pci/esa.c esa_assp_halt(sc);
sc 1646 dev/pci/esa.c sc->savemem[index++] = esa_read_assp(sc,
sc 1650 dev/pci/esa.c sc->savemem[index++] = esa_read_assp(sc,
sc 1653 dev/pci/esa.c esa_power(sc, PCI_PMCSR_STATE_D3);
sc 1659 dev/pci/esa.c esa_resume(struct esa_softc *sc) {
sc 1660 dev/pci/esa.c bus_space_tag_t iot = sc->sc_iot;
sc 1661 dev/pci/esa.c bus_space_handle_t ioh = sc->sc_ioh;
sc 1667 dev/pci/esa.c esa_power(sc, PCI_PMCSR_STATE_D0);
sc 1670 dev/pci/esa.c esa_config(sc);
sc 1672 dev/pci/esa.c reset_state = esa_assp_halt(sc);
sc 1674 dev/pci/esa.c esa_codec_reset(sc);
sc 1679 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_CODE, i,
sc 1680 dev/pci/esa.c sc->savemem[index++]);
sc 1683 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, i,
sc 1684 dev/pci/esa.c sc->savemem[index++]);
sc 1686 dev/pci/esa.c esa_write_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, ESA_KDATA_DMA_ACTIVE, 0);
sc 1690 dev/pci/esa.c esa_enable_interrupts(sc);
sc 1691 dev/pci/esa.c esa_amp_enable(sc);
sc 1697 dev/pci/esa.c esa_get_pointer(struct esa_softc *sc, struct esa_channel *ch)
sc 1703 dev/pci/esa.c hi = esa_read_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, data_offset +
sc 1705 dev/pci/esa.c lo = esa_read_assp(sc, ESA_MEMTYPE_INTERNAL_DATA, data_offset +
sc 1716 dev/pci/esa.c struct esa_softc *sc = (struct esa_softc *)vc->parent;
sc 1725 dev/pci/esa.c return (bus_dmamem_mmap(sc->sc_dmat, p->segs, p->nsegs,
sc 208 dev/pci/eso.c struct eso_softc *sc = (struct eso_softc *)self;
sc 215 dev/pci/eso.c sc->sc_revision = PCI_REVISION(pa->pa_class);
sc 217 dev/pci/eso.c if (sc->sc_revision <
sc 219 dev/pci/eso.c printf(": %s", eso_rev2model[sc->sc_revision]);
sc 221 dev/pci/eso.c printf(": (unknown rev. 0x%02x)", sc->sc_revision);
sc 225 dev/pci/eso.c &sc->sc_iot, &sc->sc_ioh, NULL, NULL, 0)) {
sc 230 dev/pci/eso.c &sc->sc_sb_iot, &sc->sc_sb_ioh, NULL, NULL, 0)) {
sc 235 dev/pci/eso.c &sc->sc_dmac_iot, &sc->sc_dmac_ioh, &vcbase, &sc->sc_vcsize, 0)) {
sc 237 dev/pci/eso.c sc->sc_vcsize = 0x10; /* From the data sheet. */
sc 241 dev/pci/eso.c &sc->sc_mpu_iot, &sc->sc_mpu_ioh, NULL, NULL, 0)) {
sc 246 dev/pci/eso.c &sc->sc_game_iot, &sc->sc_game_ioh, NULL, NULL, 0)) {
sc 251 dev/pci/eso.c sc->sc_dmat = pa->pa_dmat;
sc 252 dev/pci/eso.c sc->sc_dmas = NULL;
sc 253 dev/pci/eso.c sc->sc_dmac_configured = 0;
sc 255 dev/pci/eso.c sc->sc_pa = *pa;
sc 257 dev/pci/eso.c eso_setup(sc, 1);
sc 266 dev/pci/eso.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, eso_intr, sc,
sc 267 dev/pci/eso.c sc->sc_dev.dv_xname);
sc 269 dev/pci/eso.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_AUDIO, eso_intr, sc);
sc 271 dev/pci/eso.c if (sc->sc_ih == NULL) {
sc 300 dev/pci/eso.c sc->sc_dmac_configured = 1;
sc 303 dev/pci/eso.c sc->sc_dev.dv_xname, (unsigned long)vcbase);
sc 306 dev/pci/eso.c sc->sc_dev.dv_xname, (unsigned long)vcbase));
sc 307 dev/pci/eso.c config_defer((struct device *)sc, eso_defer);
sc 310 dev/pci/eso.c audio_attach_mi(&eso_hw_if, sc, &sc->sc_dev);
sc 315 dev/pci/eso.c (void)config_found(&sc->sc_dev, &aa, audioprint);
sc 317 dev/pci/eso.c sc->sc_powerhook = powerhook_establish(&eso_powerhook, sc);
sc 323 dev/pci/eso.c sc->sc_mpudev = config_found(&sc->sc_dev, &aa, audioprint);
sc 328 dev/pci/eso.c eso_setup(sc, verbose)
sc 329 dev/pci/eso.c struct eso_softc *sc;
sc 332 dev/pci/eso.c struct pci_attach_args *pa = &sc->sc_pa;
sc 337 dev/pci/eso.c if (eso_reset(sc) != 0) {
sc 348 dev/pci/eso.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ESO_IO_IRQCTL,
sc 352 dev/pci/eso.c a2mode = eso_read_mixreg(sc, ESO_MIXREG_A2MODE);
sc 354 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_A2MODE, a2mode);
sc 382 dev/pci/eso.c sc->sc_gain[idx][ESO_LEFT] = sc->sc_gain[idx][ESO_RIGHT] = v;
sc 383 dev/pci/eso.c eso_set_gain(sc, idx);
sc 385 dev/pci/eso.c eso_set_recsrc(sc, ESO_MIXREG_ERS_MIC);
sc 392 dev/pci/eso.c struct eso_softc *sc = (struct eso_softc *)self;
sc 393 dev/pci/eso.c struct pci_attach_args *pa = &sc->sc_pa;
sc 396 dev/pci/eso.c printf("%s: ", sc->sc_dev.dv_xname);
sc 405 dev/pci/eso.c if (bus_space_alloc(sc->sc_iot,
sc 406 dev/pci/eso.c start + sc->sc_vcsize, start + 0x0400 - 1,
sc 407 dev/pci/eso.c sc->sc_vcsize, sc->sc_vcsize, 0, 0, &addr,
sc 408 dev/pci/eso.c &sc->sc_dmac_ioh) != 0)
sc 413 dev/pci/eso.c sc->sc_dmac_iot = sc->sc_iot;
sc 414 dev/pci/eso.c sc->sc_dmac_configured = 1;
sc 425 dev/pci/eso.c eso_write_cmd(sc, cmd)
sc 426 dev/pci/eso.c struct eso_softc *sc;
sc 433 dev/pci/eso.c if ((bus_space_read_1(sc->sc_sb_iot, sc->sc_sb_ioh, ESO_SB_RSR)
sc 435 dev/pci/eso.c bus_space_write_1(sc->sc_sb_iot, sc->sc_sb_ioh,
sc 443 dev/pci/eso.c printf("%s: WDR timeout\n", sc->sc_dev.dv_xname);
sc 449 dev/pci/eso.c eso_write_ctlreg(sc, reg, val)
sc 450 dev/pci/eso.c struct eso_softc *sc;
sc 456 dev/pci/eso.c eso_write_cmd(sc, reg);
sc 457 dev/pci/eso.c eso_write_cmd(sc, val);
sc 462 dev/pci/eso.c eso_read_rdr(sc)
sc 463 dev/pci/eso.c struct eso_softc *sc;
sc 468 dev/pci/eso.c if (bus_space_read_1(sc->sc_sb_iot, sc->sc_sb_ioh,
sc 470 dev/pci/eso.c return (bus_space_read_1(sc->sc_sb_iot,
sc 471 dev/pci/eso.c sc->sc_sb_ioh, ESO_SB_RDR));
sc 477 dev/pci/eso.c printf("%s: RDR timeout\n", sc->sc_dev.dv_xname);
sc 483 dev/pci/eso.c eso_read_ctlreg(sc, reg)
sc 484 dev/pci/eso.c struct eso_softc *sc;
sc 488 dev/pci/eso.c eso_write_cmd(sc, ESO_CMD_RCR);
sc 489 dev/pci/eso.c eso_write_cmd(sc, reg);
sc 490 dev/pci/eso.c return (eso_read_rdr(sc));
sc 494 dev/pci/eso.c eso_write_mixreg(sc, reg, val)
sc 495 dev/pci/eso.c struct eso_softc *sc;
sc 503 dev/pci/eso.c bus_space_write_1(sc->sc_sb_iot, sc->sc_sb_ioh, ESO_SB_MIXERADDR, reg);
sc 504 dev/pci/eso.c bus_space_write_1(sc->sc_sb_iot, sc->sc_sb_ioh, ESO_SB_MIXERDATA, val);
sc 509 dev/pci/eso.c eso_read_mixreg(sc, reg)
sc 510 dev/pci/eso.c struct eso_softc *sc;
sc 517 dev/pci/eso.c bus_space_write_1(sc->sc_sb_iot, sc->sc_sb_ioh, ESO_SB_MIXERADDR, reg);
sc 518 dev/pci/eso.c val = bus_space_read_1(sc->sc_sb_iot, sc->sc_sb_ioh, ESO_SB_MIXERDATA);
sc 528 dev/pci/eso.c struct eso_softc *sc = hdl;
sc 531 dev/pci/eso.c irqctl = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ESO_IO_IRQCTL);
sc 539 dev/pci/eso.c (void)bus_space_read_1(sc->sc_sb_iot, sc->sc_sb_ioh,
sc 542 dev/pci/eso.c if (sc->sc_rintr)
sc 543 dev/pci/eso.c sc->sc_rintr(sc->sc_rarg);
sc 545 dev/pci/eso.c wakeup(&sc->sc_rintr);
sc 553 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_A2C2, sc->sc_a2c2);
sc 555 dev/pci/eso.c if (sc->sc_pintr)
sc 556 dev/pci/eso.c sc->sc_pintr(sc->sc_parg);
sc 558 dev/pci/eso.c wakeup(&sc->sc_pintr);
sc 562 dev/pci/eso.c if ((irqctl & ESO_IO_IRQCTL_MPUIRQ) && sc->sc_mpudev != 0)
sc 563 dev/pci/eso.c mpu_intr(sc->sc_mpudev);
sc 571 dev/pci/eso.c eso_reset(sc)
sc 572 dev/pci/eso.c struct eso_softc *sc;
sc 576 dev/pci/eso.c bus_space_write_1(sc->sc_sb_iot, sc->sc_sb_ioh, ESO_SB_RESET,
sc 579 dev/pci/eso.c (void)bus_space_read_1(sc->sc_sb_iot, sc->sc_sb_ioh, ESO_SB_STATUS);
sc 580 dev/pci/eso.c bus_space_write_1(sc->sc_sb_iot, sc->sc_sb_ioh, ESO_SB_RESET, 0);
sc 585 dev/pci/eso.c if ((bus_space_read_1(sc->sc_sb_iot, sc->sc_sb_ioh,
sc 587 dev/pci/eso.c bus_space_read_1(sc->sc_sb_iot, sc->sc_sb_ioh,
sc 591 dev/pci/eso.c eso_write_cmd(sc, ESO_CMD_EXTENB);
sc 593 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_RESET,
sc 602 dev/pci/eso.c printf("%s: reset timeout\n", sc->sc_dev.dv_xname);
sc 613 dev/pci/eso.c struct eso_softc *sc = hdl;
sc 615 dev/pci/eso.c DPRINTF(("%s: open\n", sc->sc_dev.dv_xname));
sc 617 dev/pci/eso.c sc->sc_pintr = NULL;
sc 618 dev/pci/eso.c sc->sc_rintr = NULL;
sc 727 dev/pci/eso.c struct eso_softc *sc = hdl;
sc 800 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_SRG, srg);
sc 801 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_FLTDIV, fltdiv);
sc 805 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_A2SRG, srg);
sc 806 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_A2FLTDIV, fltdiv);
sc 828 dev/pci/eso.c struct eso_softc *sc = hdl;
sc 831 dev/pci/eso.c DPRINTF(("%s: halt_output\n", sc->sc_dev.dv_xname));
sc 845 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_A2C1,
sc 847 dev/pci/eso.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ESO_IO_A2DMAM,
sc 850 dev/pci/eso.c sc->sc_pintr = NULL;
sc 851 dev/pci/eso.c error = tsleep(&sc->sc_pintr, PCATCH | PWAIT, "esoho", hz);
sc 855 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_A2C1, 0);
sc 856 dev/pci/eso.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ESO_IO_A2DMAM, 0);
sc 865 dev/pci/eso.c struct eso_softc *sc = hdl;
sc 868 dev/pci/eso.c DPRINTF(("%s: halt_input\n", sc->sc_dev.dv_xname));
sc 872 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_A1C2,
sc 875 dev/pci/eso.c bus_space_write_1(sc->sc_dmac_iot, sc->sc_dmac_ioh, ESO_DMAC_MODE,
sc 878 dev/pci/eso.c sc->sc_rintr = NULL;
sc 879 dev/pci/eso.c error = tsleep(&sc->sc_rintr, PCATCH | PWAIT, "esohi", hz);
sc 883 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_A1C2,
sc 885 dev/pci/eso.c bus_space_write_1(sc->sc_dmac_iot, sc->sc_dmac_ioh, ESO_DMAC_MASK,
sc 897 dev/pci/eso.c struct eso_softc *sc = hdl;
sc 901 dev/pci/eso.c sc->sc_revision);
sc 902 dev/pci/eso.c if (sc->sc_revision <=
sc 904 dev/pci/eso.c strlcpy(retp->config, eso_rev2model[sc->sc_revision],
sc 917 dev/pci/eso.c struct eso_softc *sc = hdl;
sc 958 dev/pci/eso.c sc->sc_gain[cp->dev][ESO_LEFT] = lgain;
sc 959 dev/pci/eso.c sc->sc_gain[cp->dev][ESO_RIGHT] = rgain;
sc 960 dev/pci/eso.c eso_set_gain(sc, cp->dev);
sc 983 dev/pci/eso.c sc->sc_gain[cp->dev][ESO_LEFT] = lgain;
sc 984 dev/pci/eso.c sc->sc_gain[cp->dev][ESO_RIGHT] = rgain;
sc 985 dev/pci/eso.c eso_set_gain(sc, cp->dev);
sc 993 dev/pci/eso.c sc->sc_gain[cp->dev][ESO_LEFT] =
sc 994 dev/pci/eso.c sc->sc_gain[cp->dev][ESO_RIGHT] =
sc 997 dev/pci/eso.c eso_set_gain(sc, cp->dev);
sc 1006 dev/pci/eso.c sc->sc_gain[cp->dev][ESO_LEFT] =
sc 1007 dev/pci/eso.c sc->sc_gain[cp->dev][ESO_RIGHT] =
sc 1010 dev/pci/eso.c eso_set_gain(sc, cp->dev);
sc 1018 dev/pci/eso.c sc->sc_gain[cp->dev][ESO_LEFT] =
sc 1019 dev/pci/eso.c sc->sc_gain[cp->dev][ESO_RIGHT] =
sc 1022 dev/pci/eso.c eso_set_gain(sc, cp->dev);
sc 1029 dev/pci/eso.c sc->sc_spatializer = (cp->un.ord != 0);
sc 1031 dev/pci/eso.c tmp = eso_read_mixreg(sc, ESO_MIXREG_SPAT);
sc 1032 dev/pci/eso.c if (sc->sc_spatializer)
sc 1036 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_SPAT,
sc 1044 dev/pci/eso.c sc->sc_monooutsrc = cp->un.ord;
sc 1046 dev/pci/eso.c tmp = eso_read_mixreg(sc, ESO_MIXREG_MPM);
sc 1048 dev/pci/eso.c tmp |= sc->sc_monooutsrc;
sc 1049 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_MPM, tmp);
sc 1056 dev/pci/eso.c sc->sc_recmon = (cp->un.ord != 0);
sc 1058 dev/pci/eso.c tmp = eso_read_ctlreg(sc, ESO_CTLREG_ACTL);
sc 1059 dev/pci/eso.c if (sc->sc_recmon)
sc 1063 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_ACTL, tmp);
sc 1070 dev/pci/eso.c return (eso_set_recsrc(sc, cp->un.ord));
sc 1076 dev/pci/eso.c sc->sc_preamp = (cp->un.ord != 0);
sc 1078 dev/pci/eso.c tmp = eso_read_mixreg(sc, ESO_MIXREG_MPM);
sc 1080 dev/pci/eso.c if (sc->sc_preamp)
sc 1084 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_MPM, tmp);
sc 1099 dev/pci/eso.c struct eso_softc *sc = hdl;
sc 1124 dev/pci/eso.c sc->sc_gain[cp->dev][ESO_LEFT];
sc 1128 dev/pci/eso.c sc->sc_gain[cp->dev][ESO_LEFT];
sc 1130 dev/pci/eso.c sc->sc_gain[cp->dev][ESO_RIGHT];
sc 1144 dev/pci/eso.c sc->sc_gain[cp->dev][ESO_LEFT];
sc 1148 dev/pci/eso.c cp->un.ord = sc->sc_recmon;
sc 1152 dev/pci/eso.c cp->un.ord = sc->sc_recsrc;
sc 1156 dev/pci/eso.c cp->un.ord = sc->sc_monooutsrc;
sc 1160 dev/pci/eso.c cp->un.ord = sc->sc_spatializer;
sc 1164 dev/pci/eso.c cp->un.ord = sc->sc_preamp;
sc 1473 dev/pci/eso.c eso_allocmem(sc, size, align, boundary, flags, ed)
sc 1474 dev/pci/eso.c struct eso_softc *sc;
sc 1486 dev/pci/eso.c error = bus_dmamem_alloc(sc->sc_dmat, ed->ed_size, align, boundary,
sc 1492 dev/pci/eso.c error = bus_dmamem_map(sc->sc_dmat, ed->ed_segs, ed->ed_nsegs,
sc 1497 dev/pci/eso.c error = bus_dmamap_create(sc->sc_dmat, ed->ed_size, 1, ed->ed_size, 0,
sc 1502 dev/pci/eso.c error = bus_dmamap_load(sc->sc_dmat, ed->ed_map, ed->ed_addr,
sc 1510 dev/pci/eso.c bus_dmamap_destroy(sc->sc_dmat, ed->ed_map);
sc 1512 dev/pci/eso.c bus_dmamem_unmap(sc->sc_dmat, ed->ed_addr, ed->ed_size);
sc 1514 dev/pci/eso.c bus_dmamem_free(sc->sc_dmat, ed->ed_segs, ed->ed_nsegs);
sc 1520 dev/pci/eso.c eso_freemem(sc, ed)
sc 1521 dev/pci/eso.c struct eso_softc *sc;
sc 1525 dev/pci/eso.c bus_dmamap_unload(sc->sc_dmat, ed->ed_map);
sc 1526 dev/pci/eso.c bus_dmamap_destroy(sc->sc_dmat, ed->ed_map);
sc 1527 dev/pci/eso.c bus_dmamem_unmap(sc->sc_dmat, ed->ed_addr, ed->ed_size);
sc 1528 dev/pci/eso.c bus_dmamem_free(sc->sc_dmat, ed->ed_segs, ed->ed_nsegs);
sc 1538 dev/pci/eso.c struct eso_softc *sc = hdl;
sc 1558 dev/pci/eso.c error = eso_allocmem(sc, size, 32, boundary, flags, ed);
sc 1563 dev/pci/eso.c ed->ed_next = sc->sc_dmas;
sc 1564 dev/pci/eso.c sc->sc_dmas = ed;
sc 1575 dev/pci/eso.c struct eso_softc *sc = hdl;
sc 1578 dev/pci/eso.c for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->ed_next) {
sc 1580 dev/pci/eso.c eso_freemem(sc, p);
sc 1609 dev/pci/eso.c struct eso_softc *sc = hdl;
sc 1614 dev/pci/eso.c for (ed = sc->sc_dmas; ed != NULL && KVADDR(ed) == addr;
sc 1620 dev/pci/eso.c return (bus_dmamem_mmap(sc->sc_dmat, ed->ed_segs, ed->ed_nsegs,
sc 1643 dev/pci/eso.c struct eso_softc *sc = hdl;
sc 1649 dev/pci/eso.c sc->sc_dev.dv_xname, start, end, blksize, intr, arg));
sc 1651 dev/pci/eso.c sc->sc_dev.dv_xname, param->sample_rate, param->encoding,
sc 1655 dev/pci/eso.c for (ed = sc->sc_dmas; ed != NULL && KVADDR(ed) != start;
sc 1660 dev/pci/eso.c sc->sc_dev.dv_xname, start);
sc 1664 dev/pci/eso.c sc->sc_pintr = intr;
sc 1665 dev/pci/eso.c sc->sc_parg = arg;
sc 1669 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_A2TCRLO, blksize & 0xff);
sc 1670 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_A2TCRHI, blksize >> 8);
sc 1675 dev/pci/eso.c sc->sc_a2c2 |= ESO_MIXREG_A2C2_16BIT;
sc 1677 dev/pci/eso.c sc->sc_a2c2 &= ~ESO_MIXREG_A2C2_16BIT;
sc 1679 dev/pci/eso.c sc->sc_a2c2 |= ESO_MIXREG_A2C2_STEREO;
sc 1681 dev/pci/eso.c sc->sc_a2c2 &= ~ESO_MIXREG_A2C2_STEREO;
sc 1684 dev/pci/eso.c sc->sc_a2c2 |= ESO_MIXREG_A2C2_SIGNED;
sc 1686 dev/pci/eso.c sc->sc_a2c2 &= ~ESO_MIXREG_A2C2_SIGNED;
sc 1688 dev/pci/eso.c sc->sc_a2c2 |= ESO_MIXREG_A2C2_IRQM;
sc 1689 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_A2C2, sc->sc_a2c2);
sc 1692 dev/pci/eso.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, ESO_IO_A2DMAA, DMAADDR(ed));
sc 1693 dev/pci/eso.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, ESO_IO_A2DMAC,
sc 1695 dev/pci/eso.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ESO_IO_A2DMAM,
sc 1699 dev/pci/eso.c a2c1 = eso_read_mixreg(sc, ESO_MIXREG_A2C1);
sc 1703 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_A2C1, a2c1);
sc 1717 dev/pci/eso.c struct eso_softc *sc = hdl;
sc 1723 dev/pci/eso.c sc->sc_dev.dv_xname, start, end, blksize, intr, arg));
sc 1725 dev/pci/eso.c sc->sc_dev.dv_xname, param->sample_rate, param->encoding,
sc 1732 dev/pci/eso.c if (!sc->sc_dmac_configured)
sc 1736 dev/pci/eso.c for (ed = sc->sc_dmas; ed != NULL && KVADDR(ed) != start;
sc 1741 dev/pci/eso.c sc->sc_dev.dv_xname, start);
sc 1745 dev/pci/eso.c sc->sc_rintr = intr;
sc 1746 dev/pci/eso.c sc->sc_rarg = arg;
sc 1749 dev/pci/eso.c actl = eso_read_ctlreg(sc, ESO_CTLREG_ACTL);
sc 1757 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_ACTL, actl);
sc 1760 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_A1TT, ESO_CTLREG_A1TT_DEMAND4);
sc 1764 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_A1TCRLO, blksize & 0xff);
sc 1765 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_A1TCRHI, blksize >> 8);
sc 1778 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_A1C1, a1c1);
sc 1781 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_LAIC,
sc 1783 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_DRQCTL,
sc 1787 dev/pci/eso.c bus_space_write_1(sc->sc_dmac_iot, sc->sc_dmac_ioh, ESO_DMAC_CLEAR, 0);
sc 1788 dev/pci/eso.c bus_space_write_1(sc->sc_dmac_iot, sc->sc_dmac_ioh, ESO_DMAC_MASK,
sc 1790 dev/pci/eso.c bus_space_write_1(sc->sc_dmac_iot, sc->sc_dmac_ioh, ESO_DMAC_MODE,
sc 1792 dev/pci/eso.c bus_space_write_4(sc->sc_dmac_iot, sc->sc_dmac_ioh, ESO_DMAC_DMAA,
sc 1794 dev/pci/eso.c bus_space_write_2(sc->sc_dmac_iot, sc->sc_dmac_ioh, ESO_DMAC_DMAC,
sc 1796 dev/pci/eso.c bus_space_write_1(sc->sc_dmac_iot, sc->sc_dmac_ioh, ESO_DMAC_MASK, 0);
sc 1799 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_A1C2,
sc 1807 dev/pci/eso.c eso_set_recsrc(sc, recsrc)
sc 1808 dev/pci/eso.c struct eso_softc *sc;
sc 1812 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_ERS, recsrc);
sc 1813 dev/pci/eso.c sc->sc_recsrc = recsrc;
sc 1818 dev/pci/eso.c eso_set_gain(sc, port)
sc 1819 dev/pci/eso.c struct eso_softc *sc;
sc 1871 dev/pci/eso.c tmp = eso_read_mixreg(sc, ESO_MIXREG_PCSVR);
sc 1874 dev/pci/eso.c tmp |= (sc->sc_gain[port][ESO_LEFT] >> 5);
sc 1875 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_PCSVR, tmp);
sc 1881 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_LMVM,
sc 1882 dev/pci/eso.c sc->sc_gain[port][ESO_LEFT] >> 2);
sc 1883 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_RMVM,
sc 1884 dev/pci/eso.c sc->sc_gain[port][ESO_RIGHT] >> 2);
sc 1889 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_SPATLVL,
sc 1890 dev/pci/eso.c sc->sc_gain[port][ESO_LEFT]);
sc 1895 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_RECLVL,ESO_4BIT_GAIN_TO_STEREO(
sc 1896 dev/pci/eso.c sc->sc_gain[port][ESO_LEFT], sc->sc_gain[port][ESO_RIGHT]));
sc 1908 dev/pci/eso.c eso_write_mixreg(sc, mixreg, ESO_4BIT_GAIN_TO_STEREO(
sc 1909 dev/pci/eso.c sc->sc_gain[port][ESO_LEFT], sc->sc_gain[port][ESO_RIGHT]));
sc 1918 dev/pci/eso.c struct eso_softc *sc = (struct eso_softc *)self;
sc 1921 dev/pci/eso.c eso_halt_output(sc);
sc 1922 dev/pci/eso.c eso_halt_input(sc);
sc 1924 dev/pci/eso.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ESO_IO_A2DMAM, 0);
sc 1925 dev/pci/eso.c bus_space_write_1(sc->sc_dmac_iot,
sc 1926 dev/pci/eso.c sc->sc_dmac_ioh, ESO_DMAC_CLEAR, 0);
sc 1927 dev/pci/eso.c bus_space_write_1(sc->sc_sb_iot,
sc 1928 dev/pci/eso.c sc->sc_sb_ioh, ESO_SB_STATUSFLAGS, 3);
sc 1931 dev/pci/eso.c pci_conf_write(sc->sc_pa.pa_pc,
sc 1932 dev/pci/eso.c sc->sc_pa.pa_tag, ESO_PCI_DDMAC, 0);
sc 1934 dev/pci/eso.c eso_setup(sc, 0);
sc 181 dev/pci/fms.c struct fms_softc *sc = (struct fms_softc *) self;
sc 191 dev/pci/fms.c if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->sc_iot,
sc 192 dev/pci/fms.c &sc->sc_ioh, NULL, &iosize, 0)) {
sc 197 dev/pci/fms.c if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 0x30, 2,
sc 198 dev/pci/fms.c &sc->sc_mpu_ioh)) {
sc 200 dev/pci/fms.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
sc 204 dev/pci/fms.c if (bus_space_subregion(sc->sc_iot, sc->sc_ioh, 0x68, 4,
sc 205 dev/pci/fms.c &sc->sc_opl_ioh)) {
sc 207 dev/pci/fms.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
sc 213 dev/pci/fms.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
sc 218 dev/pci/fms.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, fms_intr, sc,
sc 219 dev/pci/fms.c sc->sc_dev.dv_xname);
sc 220 dev/pci/fms.c if (sc->sc_ih == NULL) {
sc 225 dev/pci/fms.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
sc 231 dev/pci/fms.c sc->sc_dmat = pa->pa_dmat;
sc 237 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_CODEC_CTL, 0x0020);
sc 239 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_CODEC_CTL, 0x0000);
sc 243 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_PCM_VOLUME, 0x0808);
sc 244 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_FM_VOLUME, 0x0808);
sc 245 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_I2S_VOLUME, 0x0808);
sc 247 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_RECORD_SOURCE, 0x0000);
sc 250 dev/pci/fms.c k1 = bus_space_read_2(sc->sc_iot, sc->sc_ioh, FM_INTMASK);
sc 251 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_INTMASK,
sc 254 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_INTSTATUS,
sc 259 dev/pci/fms.c fmsradio_attach(sc);
sc 262 dev/pci/fms.c sc->host_if.arg = sc;
sc 263 dev/pci/fms.c sc->host_if.attach = fms_attach_codec;
sc 264 dev/pci/fms.c sc->host_if.read = fms_read_codec;
sc 265 dev/pci/fms.c sc->host_if.write = fms_write_codec;
sc 266 dev/pci/fms.c sc->host_if.reset = fms_reset_codec;
sc 268 dev/pci/fms.c if (ac97_attach(&sc->host_if) != 0)
sc 284 dev/pci/fms.c ctl.dev = sc->codec_if->vtbl->get_portnum_by_name(sc->codec_if,
sc 286 dev/pci/fms.c fms_set_port(sc, &ctl);
sc 289 dev/pci/fms.c audio_attach_mi(&fms_hw_if, sc, &sc->sc_dev);
sc 294 dev/pci/fms.c config_found(&sc->sc_dev, &aa, audioprint);
sc 299 dev/pci/fms.c sc->sc_mpu_dev = config_found(&sc->sc_dev, &aa, audioprint);
sc 313 dev/pci/fms.c struct fms_softc *sc = addr;
sc 317 dev/pci/fms.c for (i = 0; i < TIMO && bus_space_read_2(sc->sc_iot, sc->sc_ioh,
sc 326 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_CODEC_CMD,
sc 330 dev/pci/fms.c for (i = 0; i < TIMO && !(bus_space_read_2(sc->sc_iot, sc->sc_ioh,
sc 339 dev/pci/fms.c *val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, FM_CODEC_DATA);
sc 349 dev/pci/fms.c struct fms_softc *sc = addr;
sc 353 dev/pci/fms.c for (i = 0; i < TIMO && bus_space_read_2(sc->sc_iot, sc->sc_ioh,
sc 362 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_CODEC_DATA, val);
sc 364 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_CODEC_CMD, reg);
sc 374 dev/pci/fms.c struct fms_softc *sc = addr;
sc 376 dev/pci/fms.c sc->codec_if = cif;
sc 385 dev/pci/fms.c struct fms_softc *sc = addr;
sc 386 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_CODEC_CTL, 0x0020);
sc 388 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_CODEC_CTL, 0x0000);
sc 396 dev/pci/fms.c struct fms_softc *sc = arg;
sc 399 dev/pci/fms.c istat = bus_space_read_2(sc->sc_iot, sc->sc_ioh, FM_INTSTATUS);
sc 402 dev/pci/fms.c if ((sc->sc_play_nextblk += sc->sc_play_blksize) >=
sc 403 dev/pci/fms.c sc->sc_play_end)
sc 404 dev/pci/fms.c sc->sc_play_nextblk = sc->sc_play_start;
sc 406 dev/pci/fms.c bus_space_write_4(sc->sc_iot, sc->sc_ioh,
sc 407 dev/pci/fms.c sc->sc_play_flip++ & 1 ?
sc 408 dev/pci/fms.c FM_PLAY_DMABUF2 : FM_PLAY_DMABUF1, sc->sc_play_nextblk);
sc 410 dev/pci/fms.c if (sc->sc_pintr)
sc 411 dev/pci/fms.c sc->sc_pintr(sc->sc_parg);
sc 417 dev/pci/fms.c if ((sc->sc_rec_nextblk += sc->sc_rec_blksize) >=
sc 418 dev/pci/fms.c sc->sc_rec_end)
sc 419 dev/pci/fms.c sc->sc_rec_nextblk = sc->sc_rec_start;
sc 421 dev/pci/fms.c bus_space_write_4(sc->sc_iot, sc->sc_ioh,
sc 422 dev/pci/fms.c sc->sc_rec_flip++ & 1 ?
sc 423 dev/pci/fms.c FM_REC_DMABUF2 : FM_REC_DMABUF1, sc->sc_rec_nextblk);
sc 425 dev/pci/fms.c if (sc->sc_rintr)
sc 426 dev/pci/fms.c sc->sc_rintr(sc->sc_rarg);
sc 433 dev/pci/fms.c mpu_intr(sc->sc_mpu_dev);
sc 436 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_INTSTATUS,
sc 548 dev/pci/fms.c struct fms_softc *sc = addr;
sc 588 dev/pci/fms.c sc->sc_play_reg = (play->channels == 2 ? FM_PLAY_STEREO : 0) |
sc 629 dev/pci/fms.c sc->sc_rec_reg =
sc 650 dev/pci/fms.c struct fms_softc *sc = addr;
sc 653 dev/pci/fms.c k1 = bus_space_read_2(sc->sc_iot, sc->sc_ioh, FM_PLAY_CTL);
sc 654 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_PLAY_CTL,
sc 665 dev/pci/fms.c struct fms_softc *sc = addr;
sc 668 dev/pci/fms.c k1 = bus_space_read_2(sc->sc_iot, sc->sc_ioh, FM_REC_CTL);
sc 669 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_REC_CTL,
sc 690 dev/pci/fms.c struct fms_softc *sc = addr;
sc 692 dev/pci/fms.c return (sc->codec_if->vtbl->mixer_set_port(sc->codec_if, cp));
sc 700 dev/pci/fms.c struct fms_softc *sc = addr;
sc 702 dev/pci/fms.c return (sc->codec_if->vtbl->mixer_get_port(sc->codec_if, cp));
sc 712 dev/pci/fms.c struct fms_softc *sc = addr;
sc 722 dev/pci/fms.c if ((error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, 0, &p->seg, 1,
sc 725 dev/pci/fms.c sc->sc_dev.dv_xname, error);
sc 729 dev/pci/fms.c if ((error = bus_dmamem_map(sc->sc_dmat, &p->seg, rseg, size, &p->addr,
sc 732 dev/pci/fms.c sc->sc_dev.dv_xname, error);
sc 736 dev/pci/fms.c if ((error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 739 dev/pci/fms.c sc->sc_dev.dv_xname, error);
sc 743 dev/pci/fms.c if ((error = bus_dmamap_load(sc->sc_dmat, p->map, p->addr, size, NULL,
sc 746 dev/pci/fms.c sc->sc_dev.dv_xname, error);
sc 750 dev/pci/fms.c p->next = sc->sc_dmas;
sc 751 dev/pci/fms.c sc->sc_dmas = p;
sc 757 dev/pci/fms.c bus_dmamap_destroy(sc->sc_dmat, p->map);
sc 759 dev/pci/fms.c bus_dmamem_unmap(sc->sc_dmat, p->addr, size);
sc 761 dev/pci/fms.c bus_dmamem_free(sc->sc_dmat, &p->seg, 1);
sc 773 dev/pci/fms.c struct fms_softc *sc = addr;
sc 776 dev/pci/fms.c for (pp = &(sc->sc_dmas); (p = *pp) != NULL; pp = &p->next)
sc 778 dev/pci/fms.c bus_dmamap_unload(sc->sc_dmat, p->map);
sc 779 dev/pci/fms.c bus_dmamap_destroy(sc->sc_dmat, p->map);
sc 780 dev/pci/fms.c bus_dmamem_unmap(sc->sc_dmat, p->addr, p->size);
sc 781 dev/pci/fms.c bus_dmamem_free(sc->sc_dmat, &p->seg, 1);
sc 798 dev/pci/fms.c struct fms_softc *sc = addr;
sc 804 dev/pci/fms.c for (p = sc->sc_dmas; p && p->addr != mem; p = p->next)
sc 809 dev/pci/fms.c return bus_dmamem_mmap(sc->sc_dmat, &p->seg, 1, off, prot,
sc 826 dev/pci/fms.c struct fms_softc *sc = addr;
sc 828 dev/pci/fms.c return (sc->codec_if->vtbl->query_devinfo(sc->codec_if, dip));
sc 840 dev/pci/fms.c struct fms_softc *sc = addr;
sc 843 dev/pci/fms.c sc->sc_pintr = intr;
sc 844 dev/pci/fms.c sc->sc_parg = arg;
sc 846 dev/pci/fms.c for (p = sc->sc_dmas; p && p->addr != start; p = p->next)
sc 853 dev/pci/fms.c sc->sc_play_start = p->map->dm_segs[0].ds_addr;
sc 854 dev/pci/fms.c sc->sc_play_end = sc->sc_play_start + ((char *)end - (char *)start);
sc 855 dev/pci/fms.c sc->sc_play_blksize = blksize;
sc 856 dev/pci/fms.c sc->sc_play_nextblk = sc->sc_play_start + sc->sc_play_blksize;
sc 857 dev/pci/fms.c sc->sc_play_flip = 0;
sc 858 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_PLAY_DMALEN, blksize - 1);
sc 859 dev/pci/fms.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, FM_PLAY_DMABUF1,
sc 860 dev/pci/fms.c sc->sc_play_start);
sc 861 dev/pci/fms.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, FM_PLAY_DMABUF2,
sc 862 dev/pci/fms.c sc->sc_play_nextblk);
sc 863 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_PLAY_CTL,
sc 864 dev/pci/fms.c FM_PLAY_START | FM_PLAY_STOPNOW | sc->sc_play_reg);
sc 878 dev/pci/fms.c struct fms_softc *sc = addr;
sc 881 dev/pci/fms.c sc->sc_rintr = intr;
sc 882 dev/pci/fms.c sc->sc_rarg = arg;
sc 884 dev/pci/fms.c for (p = sc->sc_dmas; p && p->addr != start; p = p->next)
sc 891 dev/pci/fms.c sc->sc_rec_start = p->map->dm_segs[0].ds_addr;
sc 892 dev/pci/fms.c sc->sc_rec_end = sc->sc_rec_start + ((char *)end - (char *)start);
sc 893 dev/pci/fms.c sc->sc_rec_blksize = blksize;
sc 894 dev/pci/fms.c sc->sc_rec_nextblk = sc->sc_rec_start + sc->sc_rec_blksize;
sc 895 dev/pci/fms.c sc->sc_rec_flip = 0;
sc 896 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_REC_DMALEN, blksize - 1);
sc 897 dev/pci/fms.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, FM_REC_DMABUF1,
sc 898 dev/pci/fms.c sc->sc_rec_start);
sc 899 dev/pci/fms.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, FM_REC_DMABUF2,
sc 900 dev/pci/fms.c sc->sc_rec_nextblk);
sc 901 dev/pci/fms.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, FM_REC_CTL,
sc 902 dev/pci/fms.c FM_REC_START | FM_REC_STOPNOW | sc->sc_rec_reg);
sc 160 dev/pci/fmsradio.c fmsradio_attach(struct fms_softc *sc)
sc 167 dev/pci/fmsradio.c sc->sc_dev.dv_xname);
sc 171 dev/pci/fmsradio.c sc->radio = r;
sc 172 dev/pci/fmsradio.c r->tea.iot = sc->sc_iot;
sc 173 dev/pci/fmsradio.c r->tea.ioh = sc->sc_ioh;
sc 175 dev/pci/fmsradio.c r->tea.flags = sc->sc_dev.dv_cfdata->cf_flags;
sc 183 dev/pci/fmsradio.c if ((r->type = sf64pcr_probe(sc)) == TUNER_SF64PCR)
sc 184 dev/pci/fmsradio.c printf("%s: SF64-PCR FM Radio\n", sc->sc_dev.dv_xname);
sc 185 dev/pci/fmsradio.c else if ((r->type = sf256pcpr_probe(sc)) == TUNER_SF256PCPR)
sc 186 dev/pci/fmsradio.c printf("%s: SF256-PCP-R FM Radio\n", sc->sc_dev.dv_xname);
sc 187 dev/pci/fmsradio.c else if ((r->type = sf256pcs_probe(sc)) == TUNER_SF256PCS)
sc 188 dev/pci/fmsradio.c printf("%s: SF256-PCS-R FM Radio\n", sc->sc_dev.dv_xname);
sc 192 dev/pci/fmsradio.c fmsradio_set_mute(sc);
sc 193 dev/pci/fmsradio.c radio_attach_mi(&fmsradio_hw_if, sc, &sc->sc_dev);
sc 199 dev/pci/fmsradio.c sf256pcs_probe(struct fms_softc *sc)
sc 201 dev/pci/fmsradio.c struct fmsradio_if *radio = (struct fmsradio_if *)sc->radio;
sc 285 dev/pci/fmsradio.c sf256pcpr_probe(struct fms_softc *sc)
sc 287 dev/pci/fmsradio.c struct fmsradio_if *radio = (struct fmsradio_if *)sc->radio;
sc 371 dev/pci/fmsradio.c sf64pcr_probe(struct fms_softc *sc)
sc 373 dev/pci/fmsradio.c struct fmsradio_if *radio = (struct fmsradio_if *)sc->radio;
sc 476 dev/pci/fmsradio.c fmsradio_set_mute(struct fms_softc *sc)
sc 478 dev/pci/fmsradio.c struct fmsradio_if *radio = (struct fmsradio_if *)sc->radio;
sc 508 dev/pci/fmsradio.c struct fms_softc *sc = v;
sc 509 dev/pci/fmsradio.c struct fmsradio_if *radio = (struct fmsradio_if *)sc->radio;
sc 544 dev/pci/fmsradio.c sc->sc_dev.dv_cfdata->cf_flags & TEA5757_TEA5759);
sc 546 dev/pci/fmsradio.c fmsradio_set_mute(sc);
sc 557 dev/pci/fmsradio.c struct fms_softc *sc = v;
sc 558 dev/pci/fmsradio.c struct fmsradio_if *radio = (struct fmsradio_if *)sc->radio;
sc 566 dev/pci/fmsradio.c fmsradio_set_mute(sc);
sc 574 dev/pci/fmsradio.c struct fms_softc *sc = v;
sc 575 dev/pci/fmsradio.c struct fmsradio_if *radio = (struct fmsradio_if *)sc->radio;
sc 579 dev/pci/fmsradio.c fmsradio_set_mute(sc);
sc 134 dev/pci/gtp.c struct gtp_softc *sc = (struct gtp_softc *) self;
sc 136 dev/pci/gtp.c struct cfdata *cf = sc->sc_dev.dv_cfdata;
sc 138 dev/pci/gtp.c if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->tea.iot,
sc 139 dev/pci/gtp.c &sc->tea.ioh, NULL, NULL, 0)) {
sc 144 dev/pci/gtp.c sc->vol = 0;
sc 145 dev/pci/gtp.c sc->mute = 0;
sc 146 dev/pci/gtp.c sc->freq = MIN_FM_FREQ;
sc 147 dev/pci/gtp.c sc->stereo = TEA5757_STEREO;
sc 148 dev/pci/gtp.c sc->lock = TEA5757_S030;
sc 149 dev/pci/gtp.c sc->tea.offset = 0;
sc 150 dev/pci/gtp.c sc->tea.flags = cf->cf_flags;
sc 151 dev/pci/gtp.c sc->tea.init = gtp_init;
sc 152 dev/pci/gtp.c sc->tea.rset = gtp_rset;
sc 153 dev/pci/gtp.c sc->tea.write_bit = gtp_write_bit;
sc 154 dev/pci/gtp.c sc->tea.read = gtp_hardware_read;
sc 158 dev/pci/gtp.c radio_attach_mi(>p_hw_if, sc, &sc->sc_dev);
sc 164 dev/pci/gtp.c struct gtp_softc *sc = v;
sc 166 dev/pci/gtp.c ri->mute = sc->mute;
sc 167 dev/pci/gtp.c ri->volume = sc->vol ? 255 : 0;
sc 168 dev/pci/gtp.c ri->stereo = sc->stereo == TEA5757_STEREO ? 1 : 0;
sc 171 dev/pci/gtp.c ri->lock = tea5757_decode_lock(sc->lock);
sc 174 dev/pci/gtp.c ri->freq = sc->freq;
sc 176 dev/pci/gtp.c ri->info = gtp_state(sc->tea.iot, sc->tea.ioh);
sc 177 dev/pci/gtp.c gtp_set_mute(sc);
sc 185 dev/pci/gtp.c struct gtp_softc *sc = v;
sc 187 dev/pci/gtp.c sc->mute = ri->mute ? 1 : 0;
sc 188 dev/pci/gtp.c sc->vol = ri->volume ? 255 : 0;
sc 189 dev/pci/gtp.c sc->stereo = ri->stereo ? TEA5757_STEREO: TEA5757_MONO;
sc 190 dev/pci/gtp.c sc->lock = tea5757_encode_lock(ri->lock);
sc 191 dev/pci/gtp.c ri->freq = sc->freq = tea5757_set_freq(&sc->tea,
sc 192 dev/pci/gtp.c sc->lock, sc->stereo, ri->freq);
sc 193 dev/pci/gtp.c gtp_set_mute(sc);
sc 201 dev/pci/gtp.c struct gtp_softc *sc = v;
sc 203 dev/pci/gtp.c tea5757_search(&sc->tea, sc->lock, sc->stereo, f);
sc 204 dev/pci/gtp.c gtp_set_mute(sc);
sc 210 dev/pci/gtp.c gtp_set_mute(struct gtp_softc *sc)
sc 212 dev/pci/gtp.c if (sc->mute || !sc->vol)
sc 213 dev/pci/gtp.c bus_space_write_2(sc->tea.iot, sc->tea.ioh, 0, GEMTEK_PCI_MUTE);
sc 215 dev/pci/gtp.c sc->freq = tea5757_set_freq(&sc->tea,
sc 216 dev/pci/gtp.c sc->lock, sc->stereo, sc->freq);
sc 144 dev/pci/hifn7751.c struct hifn_softc *sc = (struct hifn_softc *)self;
sc 156 dev/pci/hifn7751.c sc->sc_pci_pc = pa->pa_pc;
sc 157 dev/pci/hifn7751.c sc->sc_pci_tag = pa->pa_tag;
sc 161 dev/pci/hifn7751.c sc->sc_flags = HIFN_HAS_RNG | HIFN_HAS_PUBLIC;
sc 166 dev/pci/hifn7751.c sc->sc_flags = HIFN_IS_7956 | HIFN_HAS_AES | HIFN_HAS_RNG |
sc 171 dev/pci/hifn7751.c sc->sc_flags |= HIFN_IS_7811 | HIFN_HAS_RNG | HIFN_HAS_LEDS |
sc 175 dev/pci/hifn7751.c &sc->sc_st0, &sc->sc_sh0, NULL, &iosize0, 0)) {
sc 181 dev/pci/hifn7751.c &sc->sc_st1, &sc->sc_sh1, NULL, &iosize1, 0)) {
sc 186 dev/pci/hifn7751.c hifn_set_retry(sc);
sc 188 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_NO_BURSTWRITE) {
sc 189 dev/pci/hifn7751.c sc->sc_waw_lastgroup = -1;
sc 190 dev/pci/hifn7751.c sc->sc_waw_lastreg = 1;
sc 193 dev/pci/hifn7751.c sc->sc_dmat = pa->pa_dmat;
sc 194 dev/pci/hifn7751.c if (bus_dmamap_create(sc->sc_dmat, sizeof(*sc->sc_dma), 1,
sc 195 dev/pci/hifn7751.c sizeof(*sc->sc_dma), 0, BUS_DMA_NOWAIT, &sc->sc_dmamap)) {
sc 199 dev/pci/hifn7751.c if (bus_dmamem_alloc(sc->sc_dmat, sizeof(*sc->sc_dma), PAGE_SIZE, 0,
sc 200 dev/pci/hifn7751.c sc->sc_dmasegs, 1, &sc->sc_dmansegs, BUS_DMA_NOWAIT)) {
sc 202 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamap);
sc 205 dev/pci/hifn7751.c if (bus_dmamem_map(sc->sc_dmat, sc->sc_dmasegs, sc->sc_dmansegs,
sc 206 dev/pci/hifn7751.c sizeof(*sc->sc_dma), &kva, BUS_DMA_NOWAIT)) {
sc 208 dev/pci/hifn7751.c (u_long)sizeof(*sc->sc_dma));
sc 209 dev/pci/hifn7751.c bus_dmamem_free(sc->sc_dmat, sc->sc_dmasegs, sc->sc_dmansegs);
sc 210 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamap);
sc 213 dev/pci/hifn7751.c if (bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, kva,
sc 214 dev/pci/hifn7751.c sizeof(*sc->sc_dma), NULL, BUS_DMA_NOWAIT)) {
sc 216 dev/pci/hifn7751.c bus_dmamem_unmap(sc->sc_dmat, kva, sizeof(*sc->sc_dma));
sc 217 dev/pci/hifn7751.c bus_dmamem_free(sc->sc_dmat, sc->sc_dmasegs, sc->sc_dmansegs);
sc 218 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamap);
sc 221 dev/pci/hifn7751.c sc->sc_dma = (struct hifn_dma *)kva;
sc 222 dev/pci/hifn7751.c bzero(sc->sc_dma, sizeof(*sc->sc_dma));
sc 224 dev/pci/hifn7751.c hifn_reset_board(sc, 0);
sc 226 dev/pci/hifn7751.c if (hifn_enable_crypto(sc, pa->pa_id) != 0) {
sc 227 dev/pci/hifn7751.c printf("%s: crypto enabling failed\n", sc->sc_dv.dv_xname);
sc 230 dev/pci/hifn7751.c hifn_reset_puc(sc);
sc 232 dev/pci/hifn7751.c hifn_init_dma(sc);
sc 233 dev/pci/hifn7751.c hifn_init_pci_registers(sc);
sc 235 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_IS_7956)
sc 236 dev/pci/hifn7751.c sc->sc_drammodel = 1;
sc 237 dev/pci/hifn7751.c else if (hifn_ramtype(sc))
sc 240 dev/pci/hifn7751.c if (sc->sc_drammodel == 0)
sc 241 dev/pci/hifn7751.c hifn_sramsize(sc);
sc 243 dev/pci/hifn7751.c hifn_dramsize(sc);
sc 252 dev/pci/hifn7751.c sc->sc_ramsize >>= 1;
sc 259 dev/pci/hifn7751.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, hifn_intr, sc,
sc 261 dev/pci/hifn7751.c if (sc->sc_ih == NULL) {
sc 269 dev/pci/hifn7751.c hifn_sessions(sc);
sc 271 dev/pci/hifn7751.c rseg = sc->sc_ramsize / 1024;
sc 273 dev/pci/hifn7751.c if (sc->sc_ramsize >= (1024 * 1024)) {
sc 278 dev/pci/hifn7751.c sc->sc_drammodel ? 'd' : 's', intrstr);
sc 280 dev/pci/hifn7751.c sc->sc_cid = crypto_get_driverid(0);
sc 281 dev/pci/hifn7751.c if (sc->sc_cid < 0)
sc 284 dev/pci/hifn7751.c WRITE_REG_0(sc, HIFN_0_PUCNFG,
sc 285 dev/pci/hifn7751.c READ_REG_0(sc, HIFN_0_PUCNFG) | HIFN_PUCNFG_CHIPID);
sc 286 dev/pci/hifn7751.c ena = READ_REG_0(sc, HIFN_0_PUSTAT) & HIFN_PUSTAT_CHIPENA;
sc 303 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_HAS_AES)
sc 306 dev/pci/hifn7751.c crypto_register(sc->sc_cid, algs, hifn_newsession,
sc 309 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0,
sc 310 dev/pci/hifn7751.c sc->sc_dmamap->dm_mapsize,
sc 313 dev/pci/hifn7751.c if (sc->sc_flags & (HIFN_HAS_PUBLIC | HIFN_HAS_RNG))
sc 314 dev/pci/hifn7751.c hifn_init_pubrng(sc);
sc 316 dev/pci/hifn7751.c timeout_set(&sc->sc_tickto, hifn_tick, sc);
sc 317 dev/pci/hifn7751.c timeout_add(&sc->sc_tickto, hz);
sc 322 dev/pci/hifn7751.c pci_intr_disestablish(pc, sc->sc_ih);
sc 324 dev/pci/hifn7751.c bus_dmamap_unload(sc->sc_dmat, sc->sc_dmamap);
sc 325 dev/pci/hifn7751.c bus_dmamem_unmap(sc->sc_dmat, kva, sizeof(*sc->sc_dma));
sc 326 dev/pci/hifn7751.c bus_dmamem_free(sc->sc_dmat, sc->sc_dmasegs, sc->sc_dmansegs);
sc 327 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamap);
sc 330 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
sc 334 dev/pci/hifn7751.c bus_space_unmap(sc->sc_st1, sc->sc_sh1, iosize1);
sc 336 dev/pci/hifn7751.c bus_space_unmap(sc->sc_st0, sc->sc_sh0, iosize0);
sc 340 dev/pci/hifn7751.c hifn_init_pubrng(struct hifn_softc *sc)
sc 345 dev/pci/hifn7751.c if ((sc->sc_flags & HIFN_IS_7811) == 0) {
sc 347 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_PUB_RESET,
sc 348 dev/pci/hifn7751.c READ_REG_1(sc, HIFN_1_PUB_RESET) | HIFN_PUBRST_RESET);
sc 352 dev/pci/hifn7751.c if ((READ_REG_1(sc, HIFN_1_PUB_RESET) &
sc 359 dev/pci/hifn7751.c sc->sc_dv.dv_xname);
sc 365 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_HAS_RNG) {
sc 366 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_IS_7811) {
sc 367 dev/pci/hifn7751.c r = READ_REG_1(sc, HIFN_1_7811_RNGENA);
sc 370 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_7811_RNGENA, r);
sc 372 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_7811_RNGCFG,
sc 375 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_7811_RNGENA, r);
sc 377 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_RNG_CONFIG,
sc 378 dev/pci/hifn7751.c READ_REG_1(sc, HIFN_1_RNG_CONFIG) |
sc 381 dev/pci/hifn7751.c sc->sc_rngfirst = 1;
sc 383 dev/pci/hifn7751.c sc->sc_rnghz = hz / 100;
sc 385 dev/pci/hifn7751.c sc->sc_rnghz = 1;
sc 386 dev/pci/hifn7751.c timeout_set(&sc->sc_rngto, hifn_rng, sc);
sc 387 dev/pci/hifn7751.c timeout_add(&sc->sc_rngto, sc->sc_rnghz);
sc 391 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_HAS_PUBLIC) {
sc 392 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_PUB_IEN, HIFN_PUBIEN_DONE);
sc 393 dev/pci/hifn7751.c sc->sc_dmaier |= HIFN_DMAIER_PUBDONE;
sc 394 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier);
sc 403 dev/pci/hifn7751.c struct hifn_softc *sc = vsc;
sc 407 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_IS_7811) {
sc 409 dev/pci/hifn7751.c sts = READ_REG_1(sc, HIFN_1_7811_RNGSTS);
sc 412 dev/pci/hifn7751.c sc->sc_dv.dv_xname);
sc 422 dev/pci/hifn7751.c num1 = READ_REG_1(sc, HIFN_1_7811_RNGDAT);
sc 423 dev/pci/hifn7751.c num2 = READ_REG_1(sc, HIFN_1_7811_RNGDAT);
sc 424 dev/pci/hifn7751.c if (sc->sc_rngfirst)
sc 425 dev/pci/hifn7751.c sc->sc_rngfirst = 0;
sc 432 dev/pci/hifn7751.c num1 = READ_REG_1(sc, HIFN_1_RNG_DATA);
sc 434 dev/pci/hifn7751.c if (sc->sc_rngfirst)
sc 435 dev/pci/hifn7751.c sc->sc_rngfirst = 0;
sc 440 dev/pci/hifn7751.c timeout_add(&sc->sc_rngto, sc->sc_rnghz);
sc 444 dev/pci/hifn7751.c hifn_puc_wait(struct hifn_softc *sc)
sc 450 dev/pci/hifn7751.c if (!(READ_REG_0(sc, HIFN_0_PUCTRL) & HIFN_PUCTRL_RESET))
sc 454 dev/pci/hifn7751.c printf("%s: proc unit did not reset\n", sc->sc_dv.dv_xname);
sc 461 dev/pci/hifn7751.c hifn_reset_puc(struct hifn_softc *sc)
sc 464 dev/pci/hifn7751.c WRITE_REG_0(sc, HIFN_0_PUCTRL, HIFN_PUCTRL_DMAENA);
sc 465 dev/pci/hifn7751.c hifn_puc_wait(sc);
sc 469 dev/pci/hifn7751.c hifn_set_retry(struct hifn_softc *sc)
sc 473 dev/pci/hifn7751.c r = pci_conf_read(sc->sc_pci_pc, sc->sc_pci_tag, HIFN_TRDY_TIMEOUT);
sc 475 dev/pci/hifn7751.c pci_conf_write(sc->sc_pci_pc, sc->sc_pci_tag, HIFN_TRDY_TIMEOUT, r);
sc 483 dev/pci/hifn7751.c hifn_reset_board(struct hifn_softc *sc, int full)
sc 491 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
sc 502 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MODE);
sc 505 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG,
sc 507 dev/pci/hifn7751.c hifn_reset_puc(sc);
sc 510 dev/pci/hifn7751.c bzero(sc->sc_dma, sizeof(*sc->sc_dma));
sc 513 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
sc 516 dev/pci/hifn7751.c hifn_puc_wait(sc);
sc 518 dev/pci/hifn7751.c hifn_set_retry(sc);
sc 520 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_IS_7811) {
sc 522 dev/pci/hifn7751.c if (READ_REG_1(sc, HIFN_1_7811_MIPSRST) &
sc 608 dev/pci/hifn7751.c hifn_enable_crypto(struct hifn_softc *sc, pcireg_t pciid)
sc 628 dev/pci/hifn7751.c ramcfg = READ_REG_0(sc, HIFN_0_PUCNFG);
sc 629 dev/pci/hifn7751.c dmacfg = READ_REG_1(sc, HIFN_1_DMA_CNFG);
sc 635 dev/pci/hifn7751.c WRITE_REG_0(sc, HIFN_0_PUCNFG, ramcfg | HIFN_PUCNFG_CHIPID);
sc 637 dev/pci/hifn7751.c encl = READ_REG_0(sc, HIFN_0_PUSTAT) & HIFN_PUSTAT_CHIPENA;
sc 657 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_UNLOCK |
sc 660 dev/pci/hifn7751.c addr = READ_REG_1(sc, HIFN_1_UNLOCK_SECRET1);
sc 662 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_UNLOCK_SECRET2, 0);
sc 667 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_UNLOCK_SECRET2, addr);
sc 672 dev/pci/hifn7751.c WRITE_REG_0(sc, HIFN_0_PUCNFG, ramcfg | HIFN_PUCNFG_CHIPID);
sc 673 dev/pci/hifn7751.c encl = READ_REG_0(sc, HIFN_0_PUSTAT) & HIFN_PUSTAT_CHIPENA;
sc 683 dev/pci/hifn7751.c WRITE_REG_0(sc, HIFN_0_PUCNFG, ramcfg);
sc 684 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, dmacfg);
sc 701 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_HAS_RNG)
sc 703 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_HAS_AES)
sc 705 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_HAS_PUBLIC)
sc 717 dev/pci/hifn7751.c hifn_init_pci_registers(struct hifn_softc *sc)
sc 720 dev/pci/hifn7751.c WRITE_REG_0(sc, HIFN_0_PUCTRL, HIFN_PUCTRL_DMAENA);
sc 721 dev/pci/hifn7751.c WRITE_REG_0(sc, HIFN_0_FIFOCNFG, HIFN_FIFOCNFG_THRESHOLD);
sc 722 dev/pci/hifn7751.c WRITE_REG_0(sc, HIFN_0_PUIER, HIFN_PUIER_DSTOVER);
sc 725 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CRAR, sc->sc_dmamap->dm_segs[0].ds_addr +
sc 727 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_SRAR, sc->sc_dmamap->dm_segs[0].ds_addr +
sc 729 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_DRAR, sc->sc_dmamap->dm_segs[0].ds_addr +
sc 731 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_RRAR, sc->sc_dmamap->dm_segs[0].ds_addr +
sc 737 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR,
sc 749 dev/pci/hifn7751.c ((sc->sc_flags & HIFN_HAS_PUBLIC) ?
sc 751 dev/pci/hifn7751.c ((sc->sc_flags & HIFN_IS_7811) ?
sc 754 dev/pci/hifn7751.c sc->sc_d_busy = sc->sc_r_busy = sc->sc_s_busy = sc->sc_c_busy = 0;
sc 755 dev/pci/hifn7751.c sc->sc_dmaier |= HIFN_DMAIER_R_DONE | HIFN_DMAIER_C_ABORT |
sc 759 dev/pci/hifn7751.c ((sc->sc_flags & HIFN_IS_7811) ?
sc 761 dev/pci/hifn7751.c sc->sc_dmaier &= ~HIFN_DMAIER_C_WAIT;
sc 762 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier);
sc 763 dev/pci/hifn7751.c CLR_LED(sc, HIFN_MIPSRST_LED0 | HIFN_MIPSRST_LED1 | HIFN_MIPSRST_LED2);
sc 765 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_IS_7956) {
sc 766 dev/pci/hifn7751.c WRITE_REG_0(sc, HIFN_0_PUCNFG, HIFN_PUCNFG_COMPSING |
sc 769 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_PLL, HIFN_PLL_7956);
sc 771 dev/pci/hifn7751.c WRITE_REG_0(sc, HIFN_0_PUCNFG, HIFN_PUCNFG_COMPSING |
sc 774 dev/pci/hifn7751.c (sc->sc_drammodel ? HIFN_PUCNFG_DRAM : HIFN_PUCNFG_SRAM));
sc 777 dev/pci/hifn7751.c WRITE_REG_0(sc, HIFN_0_PUISR, HIFN_PUISR_DSTOVER);
sc 778 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CNFG, HIFN_DMACNFG_MSTRESET |
sc 792 dev/pci/hifn7751.c hifn_sessions(struct hifn_softc *sc)
sc 797 dev/pci/hifn7751.c pucnfg = READ_REG_0(sc, HIFN_0_PUCNFG);
sc 807 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_IS_7956)
sc 808 dev/pci/hifn7751.c sc->sc_maxses = 32768 / ctxsize;
sc 810 dev/pci/hifn7751.c sc->sc_maxses = 1 +
sc 811 dev/pci/hifn7751.c ((sc->sc_ramsize - 32768) / ctxsize);
sc 814 dev/pci/hifn7751.c sc->sc_maxses = sc->sc_ramsize / 16384;
sc 816 dev/pci/hifn7751.c if (sc->sc_maxses > 2048)
sc 817 dev/pci/hifn7751.c sc->sc_maxses = 2048;
sc 825 dev/pci/hifn7751.c hifn_ramtype(struct hifn_softc *sc)
sc 832 dev/pci/hifn7751.c if (hifn_writeramaddr(sc, 0, data))
sc 834 dev/pci/hifn7751.c if (hifn_readramaddr(sc, 0, data))
sc 837 dev/pci/hifn7751.c sc->sc_drammodel = 1;
sc 843 dev/pci/hifn7751.c if (hifn_writeramaddr(sc, 0, data))
sc 845 dev/pci/hifn7751.c if (hifn_readramaddr(sc, 0, data))
sc 848 dev/pci/hifn7751.c sc->sc_drammodel = 1;
sc 860 dev/pci/hifn7751.c hifn_sramsize(struct hifn_softc *sc)
sc 873 dev/pci/hifn7751.c hifn_writeramaddr(sc, a, data);
sc 879 dev/pci/hifn7751.c if (hifn_readramaddr(sc, a, data) < 0)
sc 883 dev/pci/hifn7751.c sc->sc_ramsize = a + HIFN_SRAM_STEP_SIZE;
sc 895 dev/pci/hifn7751.c hifn_dramsize(struct hifn_softc *sc)
sc 899 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_IS_7956) {
sc 903 dev/pci/hifn7751.c sc->sc_ramsize = 32768;
sc 905 dev/pci/hifn7751.c cnfg = READ_REG_0(sc, HIFN_0_PUCNFG) &
sc 907 dev/pci/hifn7751.c sc->sc_ramsize = 1 << ((cnfg >> 13) + 18);
sc 913 dev/pci/hifn7751.c hifn_alloc_slot(struct hifn_softc *sc, int *cmdp, int *srcp,
sc 916 dev/pci/hifn7751.c struct hifn_dma *dma = sc->sc_dma;
sc 922 dev/pci/hifn7751.c HIFN_CMDR_SYNC(sc, HIFN_D_CMD_RSIZE,
sc 932 dev/pci/hifn7751.c HIFN_SRCR_SYNC(sc, HIFN_D_SRC_RSIZE,
sc 942 dev/pci/hifn7751.c HIFN_DSTR_SYNC(sc, HIFN_D_DST_RSIZE,
sc 952 dev/pci/hifn7751.c HIFN_RESR_SYNC(sc, HIFN_D_RES_RSIZE,
sc 960 dev/pci/hifn7751.c hifn_writeramaddr(struct hifn_softc *sc, int addr, u_int8_t *data)
sc 962 dev/pci/hifn7751.c struct hifn_dma *dma = sc->sc_dma;
sc 972 dev/pci/hifn7751.c hifn_alloc_slot(sc, &cmdi, &srci, &dsti, &resi);
sc 974 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR,
sc 983 dev/pci/hifn7751.c dma->srcr[srci].p = htole32(sc->sc_dmamap->dm_segs[0].ds_addr
sc 985 dev/pci/hifn7751.c dma->dstr[dsti].p = htole32(sc->sc_dmamap->dm_segs[0].ds_addr
sc 993 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
sc 994 dev/pci/hifn7751.c 0, sc->sc_dmamap->dm_mapsize,
sc 999 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
sc 1000 dev/pci/hifn7751.c 0, sc->sc_dmamap->dm_mapsize,
sc 1004 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
sc 1005 dev/pci/hifn7751.c 0, sc->sc_dmamap->dm_mapsize,
sc 1011 dev/pci/hifn7751.c sc->sc_dv.dv_xname, resi, addr);
sc 1017 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR,
sc 1025 dev/pci/hifn7751.c hifn_readramaddr(struct hifn_softc *sc, int addr, u_int8_t *data)
sc 1027 dev/pci/hifn7751.c struct hifn_dma *dma = sc->sc_dma;
sc 1037 dev/pci/hifn7751.c hifn_alloc_slot(sc, &cmdi, &srci, &dsti, &resi);
sc 1039 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR,
sc 1046 dev/pci/hifn7751.c dma->srcr[srci].p = htole32(sc->sc_dmamap->dm_segs[0].ds_addr +
sc 1049 dev/pci/hifn7751.c dma->dstr[dsti].p = htole32(sc->sc_dmamap->dm_segs[0].ds_addr +
sc 1057 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
sc 1058 dev/pci/hifn7751.c 0, sc->sc_dmamap->dm_mapsize,
sc 1063 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
sc 1064 dev/pci/hifn7751.c 0, sc->sc_dmamap->dm_mapsize,
sc 1068 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
sc 1069 dev/pci/hifn7751.c 0, sc->sc_dmamap->dm_mapsize,
sc 1075 dev/pci/hifn7751.c sc->sc_dv.dv_xname, resi, addr);
sc 1082 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR,
sc 1093 dev/pci/hifn7751.c hifn_init_dma(struct hifn_softc *sc)
sc 1095 dev/pci/hifn7751.c struct hifn_dma *dma = sc->sc_dma;
sc 1098 dev/pci/hifn7751.c hifn_set_retry(sc);
sc 1102 dev/pci/hifn7751.c dma->cmdr[i].p = htole32(sc->sc_dmamap->dm_segs[0].ds_addr +
sc 1105 dev/pci/hifn7751.c dma->resr[i].p = htole32(sc->sc_dmamap->dm_segs[0].ds_addr +
sc 1109 dev/pci/hifn7751.c htole32(sc->sc_dmamap->dm_segs[0].ds_addr +
sc 1112 dev/pci/hifn7751.c htole32(sc->sc_dmamap->dm_segs[0].ds_addr +
sc 1115 dev/pci/hifn7751.c htole32(sc->sc_dmamap->dm_segs[0].ds_addr +
sc 1118 dev/pci/hifn7751.c htole32(sc->sc_dmamap->dm_segs[0].ds_addr +
sc 1273 dev/pci/hifn7751.c hifn_dmamap_load_dst(struct hifn_softc *sc, struct hifn_command *cmd)
sc 1275 dev/pci/hifn7751.c struct hifn_dma *dma = sc->sc_dma;
sc 1285 dev/pci/hifn7751.c HIFN_DSTR_SYNC(sc, idx,
sc 1292 dev/pci/hifn7751.c HIFN_DSTR_SYNC(sc, idx,
sc 1303 dev/pci/hifn7751.c p = sc->sc_dmamap->dm_segs[0].ds_addr +
sc 1313 dev/pci/hifn7751.c HIFN_DSTR_SYNC(sc, idx,
sc 1320 dev/pci/hifn7751.c HIFN_DSTR_SYNC(sc, idx,
sc 1328 dev/pci/hifn7751.c HIFN_DSTR_SYNC(sc, idx, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
sc 1334 dev/pci/hifn7751.c HIFN_DSTR_SYNC(sc, idx,
sc 1345 dev/pci/hifn7751.c hifn_dmamap_load_src(struct hifn_softc *sc, struct hifn_command *cmd)
sc 1347 dev/pci/hifn7751.c struct hifn_dma *dma = sc->sc_dma;
sc 1360 dev/pci/hifn7751.c HIFN_SRCR_SYNC(sc, idx,
sc 1366 dev/pci/hifn7751.c HIFN_SRCR_SYNC(sc, HIFN_D_SRC_RSIZE,
sc 1377 dev/pci/hifn7751.c hifn_crypto(struct hifn_softc *sc, struct hifn_command *cmd,
sc 1380 dev/pci/hifn7751.c struct hifn_dma *dma = sc->sc_dma;
sc 1384 dev/pci/hifn7751.c if (bus_dmamap_create(sc->sc_dmat, HIFN_MAX_DMALEN, MAX_SCATTER,
sc 1389 dev/pci/hifn7751.c if (bus_dmamap_load_mbuf(sc->sc_dmat, cmd->src_map,
sc 1395 dev/pci/hifn7751.c if (bus_dmamap_load_uio(sc->sc_dmat, cmd->src_map,
sc 1470 dev/pci/hifn7751.c if (bus_dmamap_create(sc->sc_dmat,
sc 1477 dev/pci/hifn7751.c if (bus_dmamap_load_mbuf(sc->sc_dmat, cmd->dst_map,
sc 1483 dev/pci/hifn7751.c if (bus_dmamap_load_uio(sc->sc_dmat, cmd->dst_map,
sc 1493 dev/pci/hifn7751.c sc->sc_dv.dv_xname,
sc 1494 dev/pci/hifn7751.c READ_REG_1(sc, HIFN_1_DMA_CSR), READ_REG_1(sc, HIFN_1_DMA_IER),
sc 1500 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
sc 1504 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
sc 1506 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->dst_map,
sc 1533 dev/pci/hifn7751.c HIFN_CMDR_SYNC(sc, HIFN_D_CMD_RSIZE,
sc 1538 dev/pci/hifn7751.c HIFN_CMD_SYNC(sc, cmdi, BUS_DMASYNC_PREWRITE);
sc 1543 dev/pci/hifn7751.c HIFN_CMDR_SYNC(sc, cmdi,
sc 1546 dev/pci/hifn7751.c if (sc->sc_c_busy == 0) {
sc 1547 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_C_CTRL_ENA);
sc 1548 dev/pci/hifn7751.c sc->sc_c_busy = 1;
sc 1549 dev/pci/hifn7751.c SET_LED(sc, HIFN_MIPSRST_LED0);
sc 1558 dev/pci/hifn7751.c sc->sc_dmaier |= HIFN_DMAIER_C_WAIT;
sc 1559 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier);
sc 1564 dev/pci/hifn7751.c hifn_dmamap_load_src(sc, cmd);
sc 1565 dev/pci/hifn7751.c if (sc->sc_s_busy == 0) {
sc 1566 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA);
sc 1567 dev/pci/hifn7751.c sc->sc_s_busy = 1;
sc 1568 dev/pci/hifn7751.c SET_LED(sc, HIFN_MIPSRST_LED1);
sc 1582 dev/pci/hifn7751.c HIFN_RESR_SYNC(sc, HIFN_D_RES_RSIZE,
sc 1587 dev/pci/hifn7751.c HIFN_RES_SYNC(sc, resi, BUS_DMASYNC_PREREAD);
sc 1590 dev/pci/hifn7751.c HIFN_RESR_SYNC(sc, resi,
sc 1593 dev/pci/hifn7751.c if (sc->sc_r_busy == 0) {
sc 1594 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA);
sc 1595 dev/pci/hifn7751.c sc->sc_r_busy = 1;
sc 1596 dev/pci/hifn7751.c SET_LED(sc, HIFN_MIPSRST_LED2);
sc 1602 dev/pci/hifn7751.c hifn_dmamap_load_dst(sc, cmd);
sc 1604 dev/pci/hifn7751.c if (sc->sc_d_busy == 0) {
sc 1605 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_ENA);
sc 1606 dev/pci/hifn7751.c sc->sc_d_busy = 1;
sc 1611 dev/pci/hifn7751.c sc->sc_dv.dv_xname,
sc 1612 dev/pci/hifn7751.c READ_REG_1(sc, HIFN_1_DMA_CSR), READ_REG_1(sc, HIFN_1_DMA_IER));
sc 1615 dev/pci/hifn7751.c sc->sc_active = 5;
sc 1622 dev/pci/hifn7751.c bus_dmamap_unload(sc->sc_dmat, cmd->dst_map);
sc 1625 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, cmd->dst_map);
sc 1630 dev/pci/hifn7751.c bus_dmamap_unload(sc->sc_dmat, cmd->src_map);
sc 1632 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, cmd->src_map);
sc 1639 dev/pci/hifn7751.c struct hifn_softc *sc = vsc;
sc 1643 dev/pci/hifn7751.c if (sc->sc_active == 0) {
sc 1644 dev/pci/hifn7751.c struct hifn_dma *dma = sc->sc_dma;
sc 1647 dev/pci/hifn7751.c if (dma->cmdu == 0 && sc->sc_c_busy) {
sc 1648 dev/pci/hifn7751.c sc->sc_c_busy = 0;
sc 1650 dev/pci/hifn7751.c CLR_LED(sc, HIFN_MIPSRST_LED0);
sc 1652 dev/pci/hifn7751.c if (dma->srcu == 0 && sc->sc_s_busy) {
sc 1653 dev/pci/hifn7751.c sc->sc_s_busy = 0;
sc 1655 dev/pci/hifn7751.c CLR_LED(sc, HIFN_MIPSRST_LED1);
sc 1657 dev/pci/hifn7751.c if (dma->dstu == 0 && sc->sc_d_busy) {
sc 1658 dev/pci/hifn7751.c sc->sc_d_busy = 0;
sc 1661 dev/pci/hifn7751.c if (dma->resu == 0 && sc->sc_r_busy) {
sc 1662 dev/pci/hifn7751.c sc->sc_r_busy = 0;
sc 1664 dev/pci/hifn7751.c CLR_LED(sc, HIFN_MIPSRST_LED2);
sc 1667 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, r);
sc 1670 dev/pci/hifn7751.c sc->sc_active--;
sc 1672 dev/pci/hifn7751.c timeout_add(&sc->sc_tickto, hz);
sc 1678 dev/pci/hifn7751.c struct hifn_softc *sc = arg;
sc 1679 dev/pci/hifn7751.c struct hifn_dma *dma = sc->sc_dma;
sc 1683 dev/pci/hifn7751.c dmacsr = READ_REG_1(sc, HIFN_1_DMA_CSR);
sc 1687 dev/pci/hifn7751.c sc->sc_dv.dv_xname,
sc 1688 dev/pci/hifn7751.c dmacsr, READ_REG_1(sc, HIFN_1_DMA_IER),
sc 1693 dev/pci/hifn7751.c if ((dmacsr & sc->sc_dmaier) == 0)
sc 1696 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, dmacsr & sc->sc_dmaier);
sc 1699 dev/pci/hifn7751.c WRITE_REG_0(sc, HIFN_0_PUISR, READ_REG_0(sc, HIFN_0_PUISR));
sc 1701 dev/pci/hifn7751.c if ((sc->sc_flags & HIFN_HAS_PUBLIC) &&
sc 1703 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_PUB_STATUS,
sc 1704 dev/pci/hifn7751.c READ_REG_1(sc, HIFN_1_PUB_STATUS) | HIFN_PUBSTS_DONE);
sc 1708 dev/pci/hifn7751.c printf("%s: overrun %x\n", sc->sc_dv.dv_xname, dmacsr);
sc 1710 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_IS_7811) {
sc 1712 dev/pci/hifn7751.c printf("%s: illegal read\n", sc->sc_dv.dv_xname);
sc 1714 dev/pci/hifn7751.c printf("%s: illegal write\n", sc->sc_dv.dv_xname);
sc 1720 dev/pci/hifn7751.c printf("%s: abort, resetting.\n", sc->sc_dv.dv_xname);
sc 1722 dev/pci/hifn7751.c hifn_abort(sc);
sc 1732 dev/pci/hifn7751.c sc->sc_dmaier &= ~HIFN_DMAIER_C_WAIT;
sc 1733 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier);
sc 1739 dev/pci/hifn7751.c HIFN_RESR_SYNC(sc, i,
sc 1742 dev/pci/hifn7751.c HIFN_RESR_SYNC(sc, i,
sc 1750 dev/pci/hifn7751.c HIFN_RES_SYNC(sc, i, BUS_DMASYNC_POSTREAD);
sc 1753 dev/pci/hifn7751.c (*cmd->cmd_callback)(sc, cmd, dma->result_bufs[i]);
sc 1766 dev/pci/hifn7751.c HIFN_SRCR_SYNC(sc, i,
sc 1769 dev/pci/hifn7751.c HIFN_SRCR_SYNC(sc, i,
sc 1782 dev/pci/hifn7751.c HIFN_CMDR_SYNC(sc, i,
sc 1785 dev/pci/hifn7751.c HIFN_CMDR_SYNC(sc, i,
sc 1791 dev/pci/hifn7751.c HIFN_CMD_SYNC(sc, i, BUS_DMASYNC_POSTWRITE);
sc 1810 dev/pci/hifn7751.c struct hifn_softc *sc = NULL;
sc 1818 dev/pci/hifn7751.c sc = hifn_cd.cd_devs[i];
sc 1819 dev/pci/hifn7751.c if (sc == NULL)
sc 1821 dev/pci/hifn7751.c if (sc->sc_cid == (*sidp))
sc 1824 dev/pci/hifn7751.c if (sc == NULL)
sc 1827 dev/pci/hifn7751.c if (sc->sc_sessions == NULL) {
sc 1828 dev/pci/hifn7751.c ses = sc->sc_sessions = (struct hifn_session *)malloc(
sc 1833 dev/pci/hifn7751.c sc->sc_nsessions = 1;
sc 1835 dev/pci/hifn7751.c for (sesn = 0; sesn < sc->sc_nsessions; sesn++) {
sc 1836 dev/pci/hifn7751.c if (!sc->sc_sessions[sesn].hs_used) {
sc 1837 dev/pci/hifn7751.c ses = &sc->sc_sessions[sesn];
sc 1843 dev/pci/hifn7751.c sesn = sc->sc_nsessions;
sc 1848 dev/pci/hifn7751.c bcopy(sc->sc_sessions, ses, sesn * sizeof(*ses));
sc 1849 dev/pci/hifn7751.c bzero(sc->sc_sessions, sesn * sizeof(*ses));
sc 1850 dev/pci/hifn7751.c free(sc->sc_sessions, M_DEVBUF);
sc 1851 dev/pci/hifn7751.c sc->sc_sessions = ses;
sc 1852 dev/pci/hifn7751.c ses = &sc->sc_sessions[sesn];
sc 1853 dev/pci/hifn7751.c sc->sc_nsessions++;
sc 1899 dev/pci/hifn7751.c *sidp = HIFN_SID(sc->sc_dv.dv_unit, sesn);
sc 1913 dev/pci/hifn7751.c struct hifn_softc *sc;
sc 1921 dev/pci/hifn7751.c sc = hifn_cd.cd_devs[card];
sc 1923 dev/pci/hifn7751.c if (session >= sc->sc_nsessions)
sc 1926 dev/pci/hifn7751.c bzero(&sc->sc_sessions[session], sizeof(sc->sc_sessions[session]));
sc 1935 dev/pci/hifn7751.c struct hifn_softc *sc;
sc 1954 dev/pci/hifn7751.c sc = hifn_cd.cd_devs[card];
sc 1956 dev/pci/hifn7751.c if (session >= sc->sc_nsessions) {
sc 2003 dev/pci/hifn7751.c return (hifn_compression(sc, crp, cmd));
sc 2074 dev/pci/hifn7751.c bcopy(sc->sc_sessions[session].hs_iv,
sc 2166 dev/pci/hifn7751.c cmd->softc = sc;
sc 2168 dev/pci/hifn7751.c err = hifn_crypto(sc, cmd, crp);
sc 2185 dev/pci/hifn7751.c hifn_abort(struct hifn_softc *sc)
sc 2187 dev/pci/hifn7751.c struct hifn_dma *dma = sc->sc_dma;
sc 2200 dev/pci/hifn7751.c (*cmd->cmd_callback)(sc, cmd, dma->result_bufs[i]);
sc 2203 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
sc 2207 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
sc 2210 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->dst_map,
sc 2227 dev/pci/hifn7751.c bus_dmamap_unload(sc->sc_dmat, cmd->dst_map);
sc 2228 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, cmd->dst_map);
sc 2232 dev/pci/hifn7751.c bus_dmamap_unload(sc->sc_dmat, cmd->src_map);
sc 2233 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, cmd->src_map);
sc 2246 dev/pci/hifn7751.c hifn_reset_board(sc, 1);
sc 2247 dev/pci/hifn7751.c hifn_init_dma(sc);
sc 2248 dev/pci/hifn7751.c hifn_init_pci_registers(sc);
sc 2252 dev/pci/hifn7751.c hifn_callback(struct hifn_softc *sc, struct hifn_command *cmd,
sc 2255 dev/pci/hifn7751.c struct hifn_dma *dma = sc->sc_dma;
sc 2262 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
sc 2266 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
sc 2268 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->dst_map,
sc 2302 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
sc 2306 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
sc 2374 dev/pci/hifn7751.c bus_dmamap_unload(sc->sc_dmat, cmd->dst_map);
sc 2375 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, cmd->dst_map);
sc 2377 dev/pci/hifn7751.c bus_dmamap_unload(sc->sc_dmat, cmd->src_map);
sc 2378 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, cmd->src_map);
sc 2384 dev/pci/hifn7751.c hifn_compression(struct hifn_softc *sc, struct cryptop *crp,
sc 2408 dev/pci/hifn7751.c if (bus_dmamap_create(sc->sc_dmat, HIFN_MAX_DMALEN, MAX_SCATTER,
sc 2414 dev/pci/hifn7751.c if (bus_dmamap_create(sc->sc_dmat, HIFN_MAX_DMALEN, MAX_SCATTER,
sc 2423 dev/pci/hifn7751.c if (bus_dmamap_load_mbuf(sc->sc_dmat, cmd->src_map,
sc 2446 dev/pci/hifn7751.c if (bus_dmamap_load_mbuf(sc->sc_dmat, cmd->dst_map,
sc 2452 dev/pci/hifn7751.c if (bus_dmamap_load_uio(sc->sc_dmat, cmd->src_map,
sc 2457 dev/pci/hifn7751.c if (bus_dmamap_load_uio(sc->sc_dmat, cmd->dst_map,
sc 2465 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
sc 2469 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
sc 2471 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->dst_map,
sc 2482 dev/pci/hifn7751.c cmd->softc = sc;
sc 2485 dev/pci/hifn7751.c err = hifn_compress_enter(sc, cmd);
sc 2495 dev/pci/hifn7751.c bus_dmamap_unload(sc->sc_dmat, cmd->dst_map);
sc 2496 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, cmd->dst_map);
sc 2500 dev/pci/hifn7751.c bus_dmamap_unload(sc->sc_dmat, cmd->src_map);
sc 2501 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, cmd->src_map);
sc 2517 dev/pci/hifn7751.c hifn_compress_enter(struct hifn_softc *sc, struct hifn_command *cmd)
sc 2519 dev/pci/hifn7751.c struct hifn_dma *dma = sc->sc_dma;
sc 2535 dev/pci/hifn7751.c HIFN_CMDR_SYNC(sc, HIFN_D_CMD_RSIZE,
sc 2540 dev/pci/hifn7751.c HIFN_CMD_SYNC(sc, cmdi, BUS_DMASYNC_PREWRITE);
sc 2545 dev/pci/hifn7751.c HIFN_CMDR_SYNC(sc, cmdi,
sc 2548 dev/pci/hifn7751.c if (sc->sc_c_busy == 0) {
sc 2549 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_C_CTRL_ENA);
sc 2550 dev/pci/hifn7751.c sc->sc_c_busy = 1;
sc 2551 dev/pci/hifn7751.c SET_LED(sc, HIFN_MIPSRST_LED0);
sc 2560 dev/pci/hifn7751.c sc->sc_dmaier |= HIFN_DMAIER_C_WAIT;
sc 2561 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_IER, sc->sc_dmaier);
sc 2566 dev/pci/hifn7751.c hifn_dmamap_load_src(sc, cmd);
sc 2567 dev/pci/hifn7751.c if (sc->sc_s_busy == 0) {
sc 2568 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA);
sc 2569 dev/pci/hifn7751.c sc->sc_s_busy = 1;
sc 2570 dev/pci/hifn7751.c SET_LED(sc, HIFN_MIPSRST_LED1);
sc 2581 dev/pci/hifn7751.c HIFN_RESR_SYNC(sc, HIFN_D_RES_RSIZE,
sc 2586 dev/pci/hifn7751.c HIFN_RES_SYNC(sc, resi, BUS_DMASYNC_PREREAD);
sc 2589 dev/pci/hifn7751.c HIFN_RESR_SYNC(sc, resi,
sc 2592 dev/pci/hifn7751.c if (sc->sc_r_busy == 0) {
sc 2593 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA);
sc 2594 dev/pci/hifn7751.c sc->sc_r_busy = 1;
sc 2595 dev/pci/hifn7751.c SET_LED(sc, HIFN_MIPSRST_LED2);
sc 2601 dev/pci/hifn7751.c hifn_dmamap_load_dst(sc, cmd);
sc 2603 dev/pci/hifn7751.c if (sc->sc_d_busy == 0) {
sc 2604 dev/pci/hifn7751.c WRITE_REG_1(sc, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_ENA);
sc 2605 dev/pci/hifn7751.c sc->sc_d_busy = 1;
sc 2607 dev/pci/hifn7751.c sc->sc_active = 5;
sc 2613 dev/pci/hifn7751.c hifn_callback_comp(struct hifn_softc *sc, struct hifn_command *cmd,
sc 2618 dev/pci/hifn7751.c struct hifn_dma *dma = sc->sc_dma;
sc 2624 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
sc 2626 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->dst_map,
sc 2630 dev/pci/hifn7751.c bus_dmamap_unload(sc->sc_dmat, cmd->dst_map);
sc 2636 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
sc 2640 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
sc 2677 dev/pci/hifn7751.c if (bus_dmamap_load_mbuf(sc->sc_dmat, cmd->dst_map,
sc 2683 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->src_map,
sc 2685 dev/pci/hifn7751.c bus_dmamap_sync(sc->sc_dmat, cmd->dst_map,
sc 2689 dev/pci/hifn7751.c err = hifn_compress_enter(sc, cmd);
sc 2701 dev/pci/hifn7751.c bus_dmamap_unload(sc->sc_dmat, cmd->src_map);
sc 2702 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, cmd->src_map);
sc 2703 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, cmd->dst_map);
sc 2727 dev/pci/hifn7751.c bus_dmamap_unload(sc->sc_dmat, cmd->src_map);
sc 2728 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, cmd->dst_map);
sc 2732 dev/pci/hifn7751.c bus_dmamap_unload(sc->sc_dmat, cmd->src_map);
sc 2733 dev/pci/hifn7751.c bus_dmamap_destroy(sc->sc_dmat, cmd->src_map);
sc 2793 dev/pci/hifn7751.c hifn_write_4(struct hifn_softc *sc, int reggrp, bus_size_t reg,
sc 2801 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_NO_BURSTWRITE) {
sc 2802 dev/pci/hifn7751.c if (sc->sc_waw_lastgroup == reggrp &&
sc 2803 dev/pci/hifn7751.c sc->sc_waw_lastreg == reg - 4) {
sc 2804 dev/pci/hifn7751.c bus_space_read_4(sc->sc_st1, sc->sc_sh1, HIFN_1_REVID);
sc 2806 dev/pci/hifn7751.c sc->sc_waw_lastgroup = reggrp;
sc 2807 dev/pci/hifn7751.c sc->sc_waw_lastreg = reg;
sc 2810 dev/pci/hifn7751.c bus_space_write_4(sc->sc_st0, sc->sc_sh0, reg, val);
sc 2812 dev/pci/hifn7751.c bus_space_write_4(sc->sc_st1, sc->sc_sh1, reg, val);
sc 2817 dev/pci/hifn7751.c hifn_read_4(struct hifn_softc *sc, int reggrp, bus_size_t reg)
sc 2819 dev/pci/hifn7751.c if (sc->sc_flags & HIFN_NO_BURSTWRITE) {
sc 2820 dev/pci/hifn7751.c sc->sc_waw_lastgroup = -1;
sc 2821 dev/pci/hifn7751.c sc->sc_waw_lastreg = 1;
sc 2824 dev/pci/hifn7751.c return (bus_space_read_4(sc->sc_st0, sc->sc_sh0, reg));
sc 2825 dev/pci/hifn7751.c return (bus_space_read_4(sc->sc_st1, sc->sc_sh1, reg));
sc 110 dev/pci/hifn7751var.h #define HIFN_RING_SYNC(sc, r, i, f) \
sc 111 dev/pci/hifn7751var.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, \
sc 114 dev/pci/hifn7751var.h #define HIFN_CMDR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), cmdr, (i), (f))
sc 115 dev/pci/hifn7751var.h #define HIFN_RESR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), resr, (i), (f))
sc 116 dev/pci/hifn7751var.h #define HIFN_SRCR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), srcr, (i), (f))
sc 117 dev/pci/hifn7751var.h #define HIFN_DSTR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), dstr, (i), (f))
sc 119 dev/pci/hifn7751var.h #define HIFN_CMD_SYNC(sc, i, f) \
sc 120 dev/pci/hifn7751var.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, \
sc 124 dev/pci/hifn7751var.h #define HIFN_RES_SYNC(sc, i, f) \
sc 125 dev/pci/hifn7751var.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, \
sc 169 dev/pci/hifn7751var.h #define WRITE_REG_0(sc,reg,val) hifn_write_4((sc), 0, (reg), (val))
sc 170 dev/pci/hifn7751var.h #define WRITE_REG_1(sc,reg,val) hifn_write_4((sc), 1, (reg), (val))
sc 171 dev/pci/hifn7751var.h #define READ_REG_0(sc,reg) hifn_read_4((sc), 0, (reg))
sc 172 dev/pci/hifn7751var.h #define READ_REG_1(sc,reg) hifn_read_4((sc), 1, (reg))
sc 174 dev/pci/hifn7751var.h #define SET_LED(sc,v) \
sc 175 dev/pci/hifn7751var.h if (sc->sc_flags & HIFN_HAS_LEDS) \
sc 176 dev/pci/hifn7751var.h WRITE_REG_1(sc, HIFN_1_7811_MIPSRST, \
sc 177 dev/pci/hifn7751var.h READ_REG_1(sc, HIFN_1_7811_MIPSRST) | (v))
sc 178 dev/pci/hifn7751var.h #define CLR_LED(sc,v) \
sc 179 dev/pci/hifn7751var.h if (sc->sc_flags & HIFN_HAS_LEDS) \
sc 180 dev/pci/hifn7751var.h WRITE_REG_1(sc, HIFN_1_7811_MIPSRST, \
sc 181 dev/pci/hifn7751var.h READ_REG_1(sc, HIFN_1_7811_MIPSRST) & ~(v))
sc 108 dev/pci/i82365_pci.c struct pcic_softc *sc = (void *) self;
sc 119 dev/pci/i82365_pci.c &sc->iot, &sc->ioh, NULL, &size, 0)) {
sc 137 dev/pci/i82365_pci.c bus_space_unmap(sc->iot, sc->ioh, size);
sc 141 dev/pci/i82365_pci.c sc->membase = 0xd0000;
sc 142 dev/pci/i82365_pci.c sc->subregionmask = (1 << (0x10000 / PCIC_MEM_PAGESIZE)) - 1;
sc 146 dev/pci/i82365_pci.c sc->iobase = 0x400;
sc 147 dev/pci/i82365_pci.c sc->iosize = 0xbff;
sc 151 dev/pci/i82365_pci.c sc->pct = (pcmcia_chipset_tag_t) & pcic_pci_functions;
sc 153 dev/pci/i82365_pci.c sc->memt = memt;
sc 154 dev/pci/i82365_pci.c sc->memh = memh;
sc 157 dev/pci/i82365_pci.c pcic_attach(sc);
sc 158 dev/pci/i82365_pci.c pcic_attach_sockets(sc);
sc 166 dev/pci/i82365_pci.c pcic_write(&sc->handle[0], PCIC_CIRRUS_EXTENDED_INDEX,
sc 168 dev/pci/i82365_pci.c if ((pcic_read(&sc->handle[0], PCIC_CIRRUS_EXTENDED_DATA) &
sc 171 dev/pci/i82365_pci.c sc->dev.dv_xname);
sc 177 dev/pci/i82365_pci.c irq = pcic_intr_find(sc, IST_EDGE);
sc 181 dev/pci/i82365_pci.c sc->ih = pcic_pci_machdep_pcic_intr_establish(sc, pcic_intr);
sc 182 dev/pci/i82365_pci.c if (sc->ih == NULL) {
sc 183 dev/pci/i82365_pci.c printf("%s: couldnt map interrupt\n", sc->dev.dv_xname);
sc 185 dev/pci/i82365_pci.c bus_space_unmap(sc->iot, sc->ioh, size);
sc 189 dev/pci/i82365_pci.c sc->irq = irq;
sc 192 dev/pci/i82365_pci.c printf("%s: irq %d, ", sc->dev.dv_xname, irq);
sc 196 dev/pci/i82365_pci.c h = &sc->handle[i];
sc 199 dev/pci/i82365_pci.c (sc->irq << PCIC_CSC_INTR_IRQ_SHIFT) |
sc 205 dev/pci/i82365_pci.c printf("%s: no irq, ", sc->dev.dv_xname);
sc 208 dev/pci/i82365_pci.c if (sc->poll_established == 0) {
sc 209 dev/pci/i82365_pci.c timeout_set(&sc->poll_timeout, pcic_poll_intr, sc);
sc 210 dev/pci/i82365_pci.c timeout_add(&sc->poll_timeout, hz / 2);
sc 211 dev/pci/i82365_pci.c sc->poll_established = 1;
sc 113 dev/pci/ichiic.c struct ichiic_softc *sc = (struct ichiic_softc *)self;
sc 132 dev/pci/ichiic.c &sc->sc_iot, &sc->sc_ioh, NULL, &iosize, 0)) {
sc 137 dev/pci/ichiic.c sc->sc_poll = 1;
sc 145 dev/pci/ichiic.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO,
sc 146 dev/pci/ichiic.c ichiic_intr, sc, sc->sc_dev.dv_xname);
sc 147 dev/pci/ichiic.c if (sc->sc_ih != NULL) {
sc 149 dev/pci/ichiic.c sc->sc_poll = 0;
sc 152 dev/pci/ichiic.c if (sc->sc_poll)
sc 159 dev/pci/ichiic.c rw_init(&sc->sc_i2c_lock, "iiclk");
sc 160 dev/pci/ichiic.c sc->sc_i2c_tag.ic_cookie = sc;
sc 161 dev/pci/ichiic.c sc->sc_i2c_tag.ic_acquire_bus = ichiic_i2c_acquire_bus;
sc 162 dev/pci/ichiic.c sc->sc_i2c_tag.ic_release_bus = ichiic_i2c_release_bus;
sc 163 dev/pci/ichiic.c sc->sc_i2c_tag.ic_exec = ichiic_i2c_exec;
sc 167 dev/pci/ichiic.c iba.iba_tag = &sc->sc_i2c_tag;
sc 176 dev/pci/ichiic.c struct ichiic_softc *sc = cookie;
sc 178 dev/pci/ichiic.c if (cold || sc->sc_poll || (flags & I2C_F_POLL))
sc 181 dev/pci/ichiic.c return (rw_enter(&sc->sc_i2c_lock, RW_WRITE | RW_INTR));
sc 187 dev/pci/ichiic.c struct ichiic_softc *sc = cookie;
sc 189 dev/pci/ichiic.c if (cold || sc->sc_poll || (flags & I2C_F_POLL))
sc 192 dev/pci/ichiic.c rw_exit(&sc->sc_i2c_lock);
sc 199 dev/pci/ichiic.c struct ichiic_softc *sc = cookie;
sc 205 dev/pci/ichiic.c "flags 0x%02x\n", sc->sc_dev.dv_xname, op, addr, cmdlen,
sc 210 dev/pci/ichiic.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ICH_SMB_HS);
sc 215 dev/pci/ichiic.c DPRINTF(("%s: exec: st 0x%b\n", sc->sc_dev.dv_xname, st,
sc 220 dev/pci/ichiic.c if (cold || sc->sc_poll)
sc 227 dev/pci/ichiic.c sc->sc_i2c_xfer.op = op;
sc 228 dev/pci/ichiic.c sc->sc_i2c_xfer.buf = buf;
sc 229 dev/pci/ichiic.c sc->sc_i2c_xfer.len = len;
sc 230 dev/pci/ichiic.c sc->sc_i2c_xfer.flags = flags;
sc 231 dev/pci/ichiic.c sc->sc_i2c_xfer.error = 0;
sc 234 dev/pci/ichiic.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ICH_SMB_TXSLVA,
sc 241 dev/pci/ichiic.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ICH_SMB_HCMD, b[0]);
sc 247 dev/pci/ichiic.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 250 dev/pci/ichiic.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 267 dev/pci/ichiic.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ICH_SMB_HC, ctl);
sc 273 dev/pci/ichiic.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 281 dev/pci/ichiic.c ichiic_intr(sc);
sc 284 dev/pci/ichiic.c if (tsleep(sc, PRIBIO, "iicexec", ICHIIC_TIMEOUT * hz))
sc 288 dev/pci/ichiic.c if (sc->sc_i2c_xfer.error)
sc 299 dev/pci/ichiic.c sc->sc_dev.dv_xname, op, addr, cmdlen, len, flags,
sc 301 dev/pci/ichiic.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ICH_SMB_HC,
sc 304 dev/pci/ichiic.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ICH_SMB_HS);
sc 307 dev/pci/ichiic.c sc->sc_dev.dv_xname, st, ICH_SMB_HS_BITS);
sc 308 dev/pci/ichiic.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ICH_SMB_HS, st);
sc 315 dev/pci/ichiic.c struct ichiic_softc *sc = arg;
sc 321 dev/pci/ichiic.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ICH_SMB_HS);
sc 328 dev/pci/ichiic.c DPRINTF(("%s: intr st 0x%b\n", sc->sc_dev.dv_xname, st,
sc 332 dev/pci/ichiic.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, ICH_SMB_HS, st);
sc 336 dev/pci/ichiic.c sc->sc_i2c_xfer.error = 1;
sc 341 dev/pci/ichiic.c if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op))
sc 345 dev/pci/ichiic.c b = sc->sc_i2c_xfer.buf;
sc 346 dev/pci/ichiic.c len = sc->sc_i2c_xfer.len;
sc 348 dev/pci/ichiic.c b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 351 dev/pci/ichiic.c b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 356 dev/pci/ichiic.c if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0)
sc 357 dev/pci/ichiic.c wakeup(sc);
sc 74 dev/pci/ichwdt.c ichwdt_unlock_write(struct ichwdt_softc *sc, int reg, u_int32_t val)
sc 77 dev/pci/ichwdt.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, ICH_WDT_RELOAD, 0x80);
sc 78 dev/pci/ichwdt.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, ICH_WDT_RELOAD, 0x86);
sc 81 dev/pci/ichwdt.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, val);
sc 94 dev/pci/ichwdt.c struct ichwdt_softc *sc = (struct ichwdt_softc *)self;
sc 98 dev/pci/ichwdt.c sc->sc_pc = pa->pa_pc;
sc 99 dev/pci/ichwdt.c sc->sc_tag = pa->pa_tag;
sc 102 dev/pci/ichwdt.c sc->sc_iot = pa->pa_iot;
sc 104 dev/pci/ichwdt.c &sc->sc_iot, &sc->sc_ioh, NULL, NULL, 0)) {
sc 110 dev/pci/ichwdt.c reg = pci_conf_read(sc->sc_pc, sc->sc_tag, ICH_WDT_CONF);
sc 114 dev/pci/ichwdt.c sc->sc_divisor = (reg & ICH_WDT_CONF_PRE ? 32 : 32768);
sc 120 dev/pci/ichwdt.c pci_conf_write(sc->sc_pc, sc->sc_tag, ICH_WDT_CONF, reg);
sc 123 dev/pci/ichwdt.c reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, ICH_WDT_RELOAD);
sc 128 dev/pci/ichwdt.c ichwdt_unlock_write(sc, ICH_WDT_RELOAD,
sc 133 dev/pci/ichwdt.c pci_conf_write(sc->sc_pc, sc->sc_tag, ICH_WDT_LOCK, 0);
sc 134 dev/pci/ichwdt.c sc->sc_period = 0;
sc 139 dev/pci/ichwdt.c wdog_register(sc, ichwdt_cb);
sc 145 dev/pci/ichwdt.c struct ichwdt_softc *sc = arg;
sc 149 dev/pci/ichwdt.c if (sc->sc_period != 0) {
sc 151 dev/pci/ichwdt.c ichwdt_unlock_write(sc, ICH_WDT_RELOAD,
sc 153 dev/pci/ichwdt.c pci_conf_write(sc->sc_pc, sc->sc_tag, ICH_WDT_LOCK, 0);
sc 155 dev/pci/ichwdt.c sc->sc_dev.dv_xname,
sc 156 dev/pci/ichwdt.c pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 164 dev/pci/ichwdt.c if (sc->sc_period != period) {
sc 166 dev/pci/ichwdt.c ticks = (period * 33000000) / sc->sc_divisor;
sc 167 dev/pci/ichwdt.c ichwdt_unlock_write(sc, ICH_WDT_PRE1, ticks);
sc 168 dev/pci/ichwdt.c ichwdt_unlock_write(sc, ICH_WDT_PRE2, 2);
sc 170 dev/pci/ichwdt.c sc->sc_dev.dv_xname, period, ticks));
sc 172 dev/pci/ichwdt.c if (sc->sc_period == 0) {
sc 174 dev/pci/ichwdt.c pci_conf_write(sc->sc_pc, sc->sc_tag, ICH_WDT_LOCK,
sc 177 dev/pci/ichwdt.c sc->sc_dev.dv_xname,
sc 178 dev/pci/ichwdt.c pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 182 dev/pci/ichwdt.c ichwdt_unlock_write(sc, ICH_WDT_RELOAD,
sc 184 dev/pci/ichwdt.c DPRINTF(("%s: reloaded\n", sc->sc_dev.dv_xname));
sc 187 dev/pci/ichwdt.c sc->sc_period = period;
sc 106 dev/pci/if_acx_pci.c struct acx_softc *sc = &psc->sc_acx;
sc 112 dev/pci/if_acx_pci.c sc->sc_dmat = pa->pa_dmat;
sc 129 dev/pci/if_acx_pci.c PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_mem1_bt,
sc 130 dev/pci/if_acx_pci.c &sc->sc_mem1_bh, NULL, &psc->sc_mapsize1, 0);
sc 137 dev/pci/if_acx_pci.c PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_mem2_bt,
sc 138 dev/pci/if_acx_pci.c &sc->sc_mem2_bh, NULL, &psc->sc_mapsize2, 0);
sc 151 dev/pci/if_acx_pci.c acx_intr, sc, sc->sc_dev.dv_xname);
sc 162 dev/pci/if_acx_pci.c acx111_set_param(sc);
sc 164 dev/pci/if_acx_pci.c acx100_set_param(sc);
sc 166 dev/pci/if_acx_pci.c acx_attach(sc);
sc 173 dev/pci/if_acx_pci.c struct acx_softc *sc = &psc->sc_acx;
sc 175 dev/pci/if_acx_pci.c acx_detach(sc);
sc 111 dev/pci/if_an_pci.c struct an_softc *sc = (struct an_softc *)self;
sc 125 dev/pci/if_an_pci.c sc->sc_iot = iot;
sc 126 dev/pci/if_an_pci.c sc->sc_ioh = ioh;
sc 130 dev/pci/if_an_pci.c printf("\n%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
sc 134 dev/pci/if_an_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, an_intr, sc,
sc 135 dev/pci/if_an_pci.c sc->sc_dev.dv_xname);
sc 136 dev/pci/if_an_pci.c if (sc->sc_ih == NULL) {
sc 138 dev/pci/if_an_pci.c sc->sc_dev.dv_xname);
sc 146 dev/pci/if_an_pci.c sc->sc_enabled = 1;
sc 148 dev/pci/if_an_pci.c an_attach(sc);
sc 79 dev/pci/if_art.c struct art_softc *sc = (struct art_softc *)self;
sc 85 dev/pci/if_art.c if (ebus_attach_device(&sc->art_ebus, psc, ma->ma_base,
sc 92 dev/pci/if_art.c sc->art_port = ma->ma_port;
sc 93 dev/pci/if_art.c sc->art_slot = ma->ma_slot;
sc 94 dev/pci/if_art.c sc->art_gnum = ma->ma_gnum;
sc 95 dev/pci/if_art.c sc->art_type = ma->ma_flags & 0x03;
sc 97 dev/pci/if_art.c sc->art_channel = musycc_channel_create(self->dv_xname, 1);
sc 98 dev/pci/if_art.c if (sc->art_channel == NULL) {
sc 103 dev/pci/if_art.c if (musycc_channel_attach(psc, sc->art_channel, self, sc->art_gnum) ==
sc 109 dev/pci/if_art.c ifmedia_init(&sc->art_ifm, 0, art_ifm_change, art_ifm_status);
sc 110 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 112 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 114 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 116 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 118 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 121 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 123 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 125 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 127 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 129 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 133 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 135 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 137 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 139 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 141 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 145 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 148 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 151 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 154 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 157 dev/pci/if_art.c ifmedia_add(&sc->art_ifm,
sc 163 dev/pci/if_art.c if (bt8370_reset(sc) != 0)
sc 167 dev/pci/if_art.c timeout_set(&sc->art_onesec, art_onesec, sc);
sc 169 dev/pci/if_art.c ifmedia_set(&sc->art_ifm, IFM_TDM|IFM_TDM_E1_G704_CRC4);
sc 170 dev/pci/if_art.c sc->art_media = sc->art_ifm.ifm_media;
sc 172 dev/pci/if_art.c bt8370_set_frame_mode(sc, sc->art_type, IFM_TDM_E1_G704_CRC4, 0);
sc 173 dev/pci/if_art.c musycc_attach_sppp(sc->art_channel, art_ioctl);
sc 176 dev/pci/if_art.c sc->art_linkstatehook = hook_establish(
sc 177 dev/pci/if_art.c sc->art_channel->cc_ifp->if_linkstatehooks, 0, art_linkstate, sc);
sc 180 dev/pci/if_art.c timeout_add(&sc->art_onesec, hz);
sc 124 dev/pci/if_ath_pci.c struct ath_softc *sc = &psc->sc_sc;
sc 148 dev/pci/if_ath_pci.c sc->sc_64bit = 1;
sc 154 dev/pci/if_ath_pci.c sc->sc_st = iot;
sc 155 dev/pci/if_ath_pci.c sc->sc_sh = ioh;
sc 157 dev/pci/if_ath_pci.c sc->sc_invalid = 1;
sc 168 dev/pci/if_ath_pci.c psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ath_intr, sc,
sc 169 dev/pci/if_ath_pci.c sc->sc_dev.dv_xname);
sc 177 dev/pci/if_ath_pci.c sc->sc_dmat = pa->pa_dmat;
sc 185 dev/pci/if_ath_pci.c if (ath_attach(PCI_PRODUCT(pa->pa_id), sc) == 0)
sc 117 dev/pci/if_atw_pci.c atw_pci_enable(struct atw_softc *sc)
sc 119 dev/pci/if_atw_pci.c struct atw_pci_softc *psc = (void *)sc;
sc 123 dev/pci/if_atw_pci.c IPL_NET, atw_intr, sc, sc->sc_dev.dv_xname);
sc 126 dev/pci/if_atw_pci.c sc->sc_dev.dv_xname);
sc 134 dev/pci/if_atw_pci.c atw_pci_disable(struct atw_softc *sc)
sc 136 dev/pci/if_atw_pci.c struct atw_pci_softc *psc = (void *)sc;
sc 147 dev/pci/if_atw_pci.c struct atw_softc *sc = &psc->psc_atw;
sc 164 dev/pci/if_atw_pci.c sc->sc_flags |= ATWF_ENABLED;
sc 169 dev/pci/if_atw_pci.c sc->sc_rev = PCI_REVISION(pa->pa_class);
sc 187 dev/pci/if_atw_pci.c reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname);
sc 217 dev/pci/if_atw_pci.c sc->sc_st = memt;
sc 218 dev/pci/if_atw_pci.c sc->sc_sh = memh;
sc 220 dev/pci/if_atw_pci.c sc->sc_st = iot;
sc 221 dev/pci/if_atw_pci.c sc->sc_sh = ioh;
sc 227 dev/pci/if_atw_pci.c sc->sc_dmat = pa->pa_dmat;
sc 232 dev/pci/if_atw_pci.c sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
sc 239 dev/pci/if_atw_pci.c sc->sc_flags |= ATWF_MRL;
sc 241 dev/pci/if_atw_pci.c sc->sc_flags |= ATWF_MRM;
sc 243 dev/pci/if_atw_pci.c sc->sc_flags |= ATWF_MWI;
sc 254 dev/pci/if_atw_pci.c atw_intr, sc, sc->sc_dev.dv_xname);
sc 265 dev/pci/if_atw_pci.c sc->sc_enable = atw_pci_enable;
sc 266 dev/pci/if_atw_pci.c sc->sc_disable = atw_pci_disable;
sc 271 dev/pci/if_atw_pci.c atw_attach(sc);
sc 149 dev/pci/if_bce.c #define BCE_INIT_RXDESC(sc, x) \
sc 151 dev/pci/if_bce.c struct bce_dma_slot *__bced = &sc->bce_rx_ring[x]; \
sc 153 dev/pci/if_bce.c *mtod(sc->bce_cdata.bce_rx_chain[x], u_int32_t *) = 0; \
sc 155 dev/pci/if_bce.c htole32(sc->bce_cdata.bce_rx_map[x]->dm_segs[0].ds_addr \
sc 161 dev/pci/if_bce.c bus_dmamap_sync(sc->bce_dmatag, sc->bce_ring_map, \
sc 227 dev/pci/if_bce.c struct bce_softc *sc = (struct bce_softc *) self;
sc 244 dev/pci/if_bce.c sc->bce_pa = *pa;
sc 245 dev/pci/if_bce.c sc->bce_dmatag = pa->pa_dmat;
sc 254 dev/pci/if_bce.c if (pci_mapreg_map(pa, BCE_PCI_BAR0, memtype, 0, &sc->bce_btag,
sc 255 dev/pci/if_bce.c &sc->bce_bhandle, &memaddr, &memsize, 0) == 0)
sc 259 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 272 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 277 dev/pci/if_bce.c sc->bce_dev.dv_xname, pmode);
sc 283 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 288 dev/pci/if_bce.c sc->bce_intrhand = pci_intr_establish(pc, ih, IPL_NET, bce_intr, sc,
sc 291 dev/pci/if_bce.c if (sc->bce_intrhand == NULL) {
sc 293 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 301 dev/pci/if_bce.c bce_reset(sc);
sc 312 dev/pci/if_bce.c if ((error = bus_dmamem_alloc(sc->bce_dmatag,
sc 316 dev/pci/if_bce.c "error = %d\n", sc->bce_dev.dv_xname, error);
sc 320 dev/pci/if_bce.c if ((error = bus_dmamem_map(sc->bce_dmatag, &seg, rseg,
sc 323 dev/pci/if_bce.c sc->bce_dev.dv_xname, error);
sc 324 dev/pci/if_bce.c bus_dmamem_free(sc->bce_dmatag, &seg, rseg);
sc 328 dev/pci/if_bce.c if ((error = bus_dmamap_create(sc->bce_dmatag,
sc 330 dev/pci/if_bce.c &sc->bce_ring_map))) {
sc 332 dev/pci/if_bce.c sc->bce_dev.dv_xname, error);
sc 333 dev/pci/if_bce.c bus_dmamem_unmap(sc->bce_dmatag, kva, 2 * PAGE_SIZE);
sc 334 dev/pci/if_bce.c bus_dmamem_free(sc->bce_dmatag, &seg, rseg);
sc 338 dev/pci/if_bce.c if (bus_dmamap_load(sc->bce_dmatag, sc->bce_ring_map, kva,
sc 340 dev/pci/if_bce.c bus_dmamap_destroy(sc->bce_dmatag, sc->bce_ring_map);
sc 341 dev/pci/if_bce.c bus_dmamem_unmap(sc->bce_dmatag, kva, 2 * PAGE_SIZE);
sc 342 dev/pci/if_bce.c bus_dmamem_free(sc->bce_dmatag, &seg, rseg);
sc 346 dev/pci/if_bce.c sc->bce_rx_ring = (struct bce_dma_slot *) kva;
sc 347 dev/pci/if_bce.c sc->bce_tx_ring = (struct bce_dma_slot *) (kva + PAGE_SIZE);
sc 351 dev/pci/if_bce.c if ((error = bus_dmamap_create(sc->bce_dmatag, MCLBYTES,
sc 352 dev/pci/if_bce.c BCE_NTXFRAGS, MCLBYTES, 0, 0, &sc->bce_cdata.bce_tx_map[i])) != 0) {
sc 354 dev/pci/if_bce.c sc->bce_dev.dv_xname, error);
sc 356 dev/pci/if_bce.c sc->bce_cdata.bce_tx_chain[i] = NULL;
sc 361 dev/pci/if_bce.c if ((error = bus_dmamap_create(sc->bce_dmatag, MCLBYTES, 1,
sc 362 dev/pci/if_bce.c MCLBYTES, 0, 0, &sc->bce_cdata.bce_rx_map[i])) != 0) {
sc 364 dev/pci/if_bce.c sc->bce_dev.dv_xname, error);
sc 366 dev/pci/if_bce.c sc->bce_cdata.bce_rx_chain[i] = NULL;
sc 370 dev/pci/if_bce.c ifp = &sc->bce_ac.ac_if;
sc 371 dev/pci/if_bce.c strlcpy(ifp->if_xname, sc->bce_dev.dv_xname, IF_NAMESIZE);
sc 372 dev/pci/if_bce.c ifp->if_softc = sc;
sc 383 dev/pci/if_bce.c sc->bce_ac.ac_enaddr[0] =
sc 384 dev/pci/if_bce.c bus_space_read_1(sc->bce_btag, sc->bce_bhandle, BCE_ENET0);
sc 385 dev/pci/if_bce.c sc->bce_ac.ac_enaddr[1] =
sc 386 dev/pci/if_bce.c bus_space_read_1(sc->bce_btag, sc->bce_bhandle, BCE_ENET1);
sc 387 dev/pci/if_bce.c sc->bce_ac.ac_enaddr[2] =
sc 388 dev/pci/if_bce.c bus_space_read_1(sc->bce_btag, sc->bce_bhandle, BCE_ENET2);
sc 389 dev/pci/if_bce.c sc->bce_ac.ac_enaddr[3] =
sc 390 dev/pci/if_bce.c bus_space_read_1(sc->bce_btag, sc->bce_bhandle, BCE_ENET3);
sc 391 dev/pci/if_bce.c sc->bce_ac.ac_enaddr[4] =
sc 392 dev/pci/if_bce.c bus_space_read_1(sc->bce_btag, sc->bce_bhandle, BCE_ENET4);
sc 393 dev/pci/if_bce.c sc->bce_ac.ac_enaddr[5] =
sc 394 dev/pci/if_bce.c bus_space_read_1(sc->bce_btag, sc->bce_bhandle, BCE_ENET5);
sc 396 dev/pci/if_bce.c ether_sprintf(sc->bce_ac.ac_enaddr));
sc 400 dev/pci/if_bce.c sc->bce_mii.mii_ifp = ifp;
sc 401 dev/pci/if_bce.c sc->bce_mii.mii_readreg = bce_mii_read;
sc 402 dev/pci/if_bce.c sc->bce_mii.mii_writereg = bce_mii_write;
sc 403 dev/pci/if_bce.c sc->bce_mii.mii_statchg = bce_statchg;
sc 404 dev/pci/if_bce.c ifmedia_init(&sc->bce_mii.mii_media, 0, bce_mediachange,
sc 406 dev/pci/if_bce.c mii_attach(&sc->bce_dev, &sc->bce_mii, 0xffffffff, MII_PHY_ANY,
sc 408 dev/pci/if_bce.c if (LIST_FIRST(&sc->bce_mii.mii_phys) == NULL) {
sc 409 dev/pci/if_bce.c ifmedia_add(&sc->bce_mii.mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
sc 410 dev/pci/if_bce.c ifmedia_set(&sc->bce_mii.mii_media, IFM_ETHER | IFM_NONE);
sc 412 dev/pci/if_bce.c ifmedia_set(&sc->bce_mii.mii_media, IFM_ETHER | IFM_AUTO);
sc 414 dev/pci/if_bce.c sc->bce_phy = bus_space_read_1(sc->bce_btag, sc->bce_bhandle,
sc 420 dev/pci/if_bce.c bce_mii_write((struct device *) sc, 1, 26, /* MAGIC */
sc 421 dev/pci/if_bce.c bce_mii_read((struct device *) sc, 1, 26) & 0x7fff); /* MAGIC */
sc 423 dev/pci/if_bce.c bce_mii_write((struct device *) sc, 1, 27, /* MAGIC */
sc 424 dev/pci/if_bce.c bce_mii_read((struct device *) sc, 1, 27) | (1 << 6)); /* MAGIC */
sc 430 dev/pci/if_bce.c timeout_set(&sc->bce_timeout, bce_tick, sc);
sc 437 dev/pci/if_bce.c struct bce_softc *sc = ifp->if_softc;
sc 444 dev/pci/if_bce.c if ((error = ether_ioctl(ifp, &sc->bce_ac, cmd, data)) > 0) {
sc 457 dev/pci/if_bce.c arp_ifinit(&sc->bce_ac, ifa);
sc 484 dev/pci/if_bce.c ether_addmulti(ifr, &sc->bce_ac) :
sc 485 dev/pci/if_bce.c ether_delmulti(ifr, &sc->bce_ac);
sc 499 dev/pci/if_bce.c error = ifmedia_ioctl(ifp, ifr, &sc->bce_mii.mii_media, cmd);
sc 519 dev/pci/if_bce.c struct bce_softc *sc = ifp->if_softc;
sc 535 dev/pci/if_bce.c if (sc->bce_txsnext >= sc->bce_txin)
sc 536 dev/pci/if_bce.c txsfree = BCE_NTXDESC - 1 + sc->bce_txin - sc->bce_txsnext;
sc 538 dev/pci/if_bce.c txsfree = sc->bce_txin - sc->bce_txsnext - 1;
sc 554 dev/pci/if_bce.c dmamap = sc->bce_cdata.bce_tx_map[sc->bce_txsnext];
sc 563 dev/pci/if_bce.c error = bus_dmamap_load_mbuf(sc->bce_dmatag, dmamap, m0,
sc 567 dev/pci/if_bce.c "dropping...\n", sc->bce_dev.dv_xname);
sc 575 dev/pci/if_bce.c sc->bce_dev.dv_xname, error);
sc 581 dev/pci/if_bce.c bus_dmamap_unload(sc->bce_dmatag, dmamap);
sc 590 dev/pci/if_bce.c sc->bce_cdata.bce_tx_chain[sc->bce_txsnext] = m0;
sc 593 dev/pci/if_bce.c bus_dmamap_sync(sc->bce_dmatag, dmamap, 0, dmamap->dm_mapsize,
sc 597 dev/pci/if_bce.c txstart = sc->bce_txsnext;
sc 606 dev/pci/if_bce.c if (sc->bce_txsnext == BCE_NTXDESC - 1)
sc 609 dev/pci/if_bce.c sc->bce_tx_ring[sc->bce_txsnext].ctrl = htole32(ctrl);
sc 610 dev/pci/if_bce.c sc->bce_tx_ring[sc->bce_txsnext].addr =
sc 612 dev/pci/if_bce.c if (sc->bce_txsnext + 1 > BCE_NTXDESC - 1)
sc 613 dev/pci/if_bce.c sc->bce_txsnext = 0;
sc 615 dev/pci/if_bce.c sc->bce_txsnext++;
sc 619 dev/pci/if_bce.c bus_dmamap_sync(sc->bce_dmatag, sc->bce_ring_map,
sc 625 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_DPTR,
sc 626 dev/pci/if_bce.c sc->bce_txsnext * sizeof(struct bce_dma_slot));
sc 650 dev/pci/if_bce.c struct bce_softc *sc = ifp->if_softc;
sc 652 dev/pci/if_bce.c printf("%s: device timeout\n", sc->bce_dev.dv_xname);
sc 664 dev/pci/if_bce.c struct bce_softc *sc;
sc 670 dev/pci/if_bce.c sc = xsc;
sc 671 dev/pci/if_bce.c ifp = &sc->bce_ac.ac_if;
sc 675 dev/pci/if_bce.c intstatus = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 679 dev/pci/if_bce.c intstatus &= sc->bce_intmask;
sc 686 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_INT_STS,
sc 691 dev/pci/if_bce.c bce_rxintr(sc);
sc 694 dev/pci/if_bce.c bce_txintr(sc);
sc 699 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 702 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 707 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 710 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 713 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 716 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 719 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 735 dev/pci/if_bce.c bce_rxintr(struct bce_softc *sc)
sc 737 dev/pci/if_bce.c struct ifnet *ifp = &sc->bce_ac.ac_if;
sc 745 dev/pci/if_bce.c curr = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_RXSTATUS)
sc 752 dev/pci/if_bce.c for (i = sc->bce_rxin; i != curr;
sc 755 dev/pci/if_bce.c bus_dmamap_sync(sc->bce_dmatag, sc->bce_cdata.bce_rx_map[i], 0,
sc 756 dev/pci/if_bce.c sc->bce_cdata.bce_rx_map[i]->dm_mapsize,
sc 763 dev/pci/if_bce.c pph = mtod(sc->bce_cdata.bce_rx_chain[i], struct rx_pph *);
sc 777 dev/pci/if_bce.c sc->bce_cdata.bce_rx_chain[i]->m_data +=
sc 803 dev/pci/if_bce.c mtod(sc->bce_cdata.bce_rx_chain[i], caddr_t), len);
sc 804 dev/pci/if_bce.c sc->bce_cdata.bce_rx_chain[i]->m_data -=
sc 807 dev/pci/if_bce.c m = sc->bce_cdata.bce_rx_chain[i];
sc 808 dev/pci/if_bce.c if (bce_add_rxbuf(sc, i) != 0) {
sc 812 dev/pci/if_bce.c sc->bce_cdata.bce_rx_chain[i]->m_data -=
sc 814 dev/pci/if_bce.c bus_dmamap_sync(sc->bce_dmatag,
sc 815 dev/pci/if_bce.c sc->bce_cdata.bce_rx_map[i], 0,
sc 816 dev/pci/if_bce.c sc->bce_cdata.bce_rx_map[i]->dm_mapsize,
sc 839 dev/pci/if_bce.c curr = (bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 845 dev/pci/if_bce.c sc->bce_rxin = curr;
sc 850 dev/pci/if_bce.c bce_txintr(struct bce_softc *sc)
sc 852 dev/pci/if_bce.c struct ifnet *ifp = &sc->bce_ac.ac_if;
sc 862 dev/pci/if_bce.c curr = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_TXSTATUS) &
sc 867 dev/pci/if_bce.c for (i = sc->bce_txin; i != curr;
sc 870 dev/pci/if_bce.c if (sc->bce_cdata.bce_tx_chain[i] == NULL)
sc 872 dev/pci/if_bce.c bus_dmamap_sync(sc->bce_dmatag, sc->bce_cdata.bce_tx_map[i], 0,
sc 873 dev/pci/if_bce.c sc->bce_cdata.bce_tx_map[i]->dm_mapsize,
sc 875 dev/pci/if_bce.c bus_dmamap_unload(sc->bce_dmatag, sc->bce_cdata.bce_tx_map[i]);
sc 876 dev/pci/if_bce.c m_freem(sc->bce_cdata.bce_tx_chain[i]);
sc 877 dev/pci/if_bce.c sc->bce_cdata.bce_tx_chain[i] = NULL;
sc 880 dev/pci/if_bce.c sc->bce_txin = curr;
sc 886 dev/pci/if_bce.c if (sc->bce_txsnext == sc->bce_txin)
sc 894 dev/pci/if_bce.c struct bce_softc *sc = ifp->if_softc;
sc 907 dev/pci/if_bce.c reg_win = pci_conf_read(sc->bce_pa.pa_pc, sc->bce_pa.pa_tag,
sc 911 dev/pci/if_bce.c pci_conf_write(sc->bce_pa.pa_pc, sc->bce_pa.pa_tag, BCE_REG_WIN,
sc 915 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_SBINTVEC,
sc 916 dev/pci/if_bce.c bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_SBINTVEC) |
sc 920 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_SPCI_TR2,
sc 921 dev/pci/if_bce.c bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_SPCI_TR2) |
sc 925 dev/pci/if_bce.c pci_conf_write(sc->bce_pa.pa_pc, sc->bce_pa.pa_tag, BCE_REG_WIN,
sc 929 dev/pci/if_bce.c bce_reset(sc);
sc 932 dev/pci/if_bce.c memset(sc->bce_tx_ring, 0, BCE_NTXDESC * sizeof(struct bce_dma_slot));
sc 933 dev/pci/if_bce.c sc->bce_txsnext = 0;
sc 934 dev/pci/if_bce.c sc->bce_txin = 0;
sc 937 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_MACCTL,
sc 938 dev/pci/if_bce.c bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_MACCTL) |
sc 942 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_MACCTL,
sc 943 dev/pci/if_bce.c bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_MACCTL) &
sc 947 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMAI_CTL, 1 << 24); /* MAGIC */
sc 953 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_RX_MAX,
sc 955 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_TX_MAX,
sc 959 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_TX_WATER, 56);
sc 962 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_TXCTL, XC_XE);
sc 963 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_TXADDR,
sc 964 dev/pci/if_bce.c sc->bce_ring_map->dm_segs[0].ds_addr + PAGE_SIZE + 0x40000000); /* MAGIC */
sc 970 dev/pci/if_bce.c sc->bce_rxin = 0;
sc 973 dev/pci/if_bce.c memset(sc->bce_rx_ring, 0, BCE_NRXDESC * sizeof(struct bce_dma_slot));
sc 975 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_RXCTL,
sc 977 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_RXADDR,
sc 978 dev/pci/if_bce.c sc->bce_ring_map->dm_segs[0].ds_addr + 0x40000000); /* MAGIC */
sc 982 dev/pci/if_bce.c if (sc->bce_cdata.bce_rx_chain[i] == NULL) {
sc 983 dev/pci/if_bce.c if ((error = bce_add_rxbuf(sc, i)) != 0) {
sc 985 dev/pci/if_bce.c "mbuf, error = %d\n", sc->bce_dev.dv_xname,
sc 987 dev/pci/if_bce.c bce_rxdrain(sc);
sc 991 dev/pci/if_bce.c BCE_INIT_RXDESC(sc, i);
sc 995 dev/pci/if_bce.c sc->bce_intmask =
sc 997 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_INT_MASK,
sc 998 dev/pci/if_bce.c sc->bce_intmask);
sc 1001 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_RXDPTR,
sc 1005 dev/pci/if_bce.c mii_mediachg(&sc->bce_mii);
sc 1008 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_ENET_CTL,
sc 1009 dev/pci/if_bce.c bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 1013 dev/pci/if_bce.c timeout_add(&sc->bce_timeout, hz);
sc 1024 dev/pci/if_bce.c bce_add_mac(struct bce_softc *sc, u_int8_t *mac, unsigned long idx)
sc 1029 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_FILT_LOW,
sc 1031 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_FILT_HI,
sc 1033 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_FILT_CTL,
sc 1037 dev/pci/if_bce.c rval = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 1045 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 1051 dev/pci/if_bce.c bce_add_rxbuf(struct bce_softc *sc, int idx)
sc 1065 dev/pci/if_bce.c if (sc->bce_cdata.bce_rx_chain[idx] != NULL)
sc 1066 dev/pci/if_bce.c bus_dmamap_unload(sc->bce_dmatag,
sc 1067 dev/pci/if_bce.c sc->bce_cdata.bce_rx_map[idx]);
sc 1069 dev/pci/if_bce.c sc->bce_cdata.bce_rx_chain[idx] = m;
sc 1071 dev/pci/if_bce.c error = bus_dmamap_load(sc->bce_dmatag, sc->bce_cdata.bce_rx_map[idx],
sc 1077 dev/pci/if_bce.c bus_dmamap_sync(sc->bce_dmatag, sc->bce_cdata.bce_rx_map[idx], 0,
sc 1078 dev/pci/if_bce.c sc->bce_cdata.bce_rx_map[idx]->dm_mapsize, BUS_DMASYNC_PREREAD);
sc 1080 dev/pci/if_bce.c BCE_INIT_RXDESC(sc, idx);
sc 1088 dev/pci/if_bce.c bce_rxdrain(struct bce_softc *sc)
sc 1093 dev/pci/if_bce.c if (sc->bce_cdata.bce_rx_chain[i] != NULL) {
sc 1094 dev/pci/if_bce.c bus_dmamap_unload(sc->bce_dmatag,
sc 1095 dev/pci/if_bce.c sc->bce_cdata.bce_rx_map[i]);
sc 1096 dev/pci/if_bce.c m_freem(sc->bce_cdata.bce_rx_chain[i]);
sc 1097 dev/pci/if_bce.c sc->bce_cdata.bce_rx_chain[i] = NULL;
sc 1106 dev/pci/if_bce.c struct bce_softc *sc = ifp->if_softc;
sc 1111 dev/pci/if_bce.c timeout_del(&sc->bce_timeout);
sc 1118 dev/pci/if_bce.c mii_down(&sc->bce_mii);
sc 1121 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_INT_MASK, 0);
sc 1122 dev/pci/if_bce.c sc->bce_intmask = 0;
sc 1126 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_ENET_CTL, EC_ED);
sc 1128 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 1136 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_RXCTL, 0);
sc 1137 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_TXCTL, 0);
sc 1142 dev/pci/if_bce.c if (sc->bce_cdata.bce_tx_chain[i] != NULL) {
sc 1143 dev/pci/if_bce.c bus_dmamap_unload(sc->bce_dmatag,
sc 1144 dev/pci/if_bce.c sc->bce_cdata.bce_tx_map[i]);
sc 1145 dev/pci/if_bce.c m_freem(sc->bce_cdata.bce_tx_chain[i]);
sc 1146 dev/pci/if_bce.c sc->bce_cdata.bce_tx_chain[i] = NULL;
sc 1152 dev/pci/if_bce.c bce_rxdrain(sc);
sc 1157 dev/pci/if_bce.c bce_reset(struct bce_softc *sc)
sc 1164 dev/pci/if_bce.c sbval = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 1167 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMAI_CTL,
sc 1171 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_ENET_CTL,
sc 1174 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 1182 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 1185 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_TXCTL, 0);
sc 1186 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_DMA_RXSTATUS);
sc 1190 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag,
sc 1191 dev/pci/if_bce.c sc->bce_bhandle, BCE_DMA_RXSTATUS);
sc 1198 dev/pci/if_bce.c " error\n", sc->bce_dev.dv_xname);
sc 1200 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle,
sc 1204 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_ENET_CTL,
sc 1207 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 1215 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 1222 dev/pci/if_bce.c reg_win = pci_conf_read(sc->bce_pa.pa_pc, sc->bce_pa.pa_tag,
sc 1225 dev/pci/if_bce.c pci_conf_write(sc->bce_pa.pa_pc, sc->bce_pa.pa_tag,
sc 1229 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_SBINTVEC,
sc 1230 dev/pci/if_bce.c bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 1235 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_SPCI_TR2,
sc 1236 dev/pci/if_bce.c bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 1241 dev/pci/if_bce.c pci_conf_write(sc->bce_pa.pa_pc, sc->bce_pa.pa_tag, BCE_REG_WIN,
sc 1249 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle,
sc 1252 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 1260 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 1263 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 1271 dev/pci/if_bce.c sc->bce_dev.dv_xname);
sc 1273 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle,
sc 1276 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 1279 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle,
sc 1284 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_SBTMSTATELOW,
sc 1286 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_SBTMSTATELOW);
sc 1290 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_SBTMSTATEHI);
sc 1292 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_SBTMSTATEHI,
sc 1294 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_SBIMSTATE);
sc 1296 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_SBIMSTATE,
sc 1300 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_SBTMSTATELOW,
sc 1302 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_SBTMSTATELOW);
sc 1306 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_SBTMSTATELOW,
sc 1308 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_SBTMSTATELOW);
sc 1312 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_MI_CTL, 0x8d); /* MAGIC */
sc 1315 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_DEVCTL);
sc 1318 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_ENET_CTL, EC_EP);
sc 1320 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DEVCTL,
sc 1330 dev/pci/if_bce.c struct bce_softc *sc = ifp->if_softc;
sc 1334 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_RX_CTL,
sc 1335 dev/pci/if_bce.c bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_RX_CTL)
sc 1341 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_RX_CTL,
sc 1342 dev/pci/if_bce.c bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 1347 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle,
sc 1348 dev/pci/if_bce.c BCE_RX_CTL, bus_space_read_4(sc->bce_btag,
sc 1349 dev/pci/if_bce.c sc->bce_bhandle, BCE_RX_CTL) & ~ERC_DB);
sc 1351 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle,
sc 1352 dev/pci/if_bce.c BCE_RX_CTL, bus_space_read_4(sc->bce_btag,
sc 1353 dev/pci/if_bce.c sc->bce_bhandle, BCE_RX_CTL) | ERC_DB);
sc 1356 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_FILT_CTL,
sc 1360 dev/pci/if_bce.c bce_add_mac(sc, sc->bce_ac.ac_enaddr, 0);
sc 1363 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_RX_CTL,
sc 1364 dev/pci/if_bce.c bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_RX_CTL) |
sc 1369 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_FILT_CTL,
sc 1370 dev/pci/if_bce.c bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 1379 dev/pci/if_bce.c struct bce_softc *sc = (struct bce_softc *) self;
sc 1384 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_MI_STS, BCE_MIINTR);
sc 1387 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_MI_COMM,
sc 1392 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_MI_STS);
sc 1397 dev/pci/if_bce.c val = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_MI_COMM);
sc 1400 dev/pci/if_bce.c "0x%08x\n", sc->bce_dev.dv_xname, phy, reg, val);
sc 1410 dev/pci/if_bce.c struct bce_softc *sc = (struct bce_softc *) self;
sc 1415 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_MI_STS,
sc 1419 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_MI_COMM,
sc 1426 dev/pci/if_bce.c rval = bus_space_read_4(sc->bce_btag, sc->bce_bhandle,
sc 1432 dev/pci/if_bce.c rval = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_MI_COMM);
sc 1435 dev/pci/if_bce.c "= 0x%08x\n", sc->bce_dev.dv_xname, phy, reg, val);
sc 1443 dev/pci/if_bce.c struct bce_softc *sc = (struct bce_softc *) self;
sc 1447 dev/pci/if_bce.c reg = bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_TX_CTL);
sc 1448 dev/pci/if_bce.c if (sc->bce_mii.mii_media_active & IFM_FDX && !(reg & EXC_FD))
sc 1449 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_TX_CTL,
sc 1451 dev/pci/if_bce.c else if (!(sc->bce_mii.mii_media_active & IFM_FDX) && reg & EXC_FD)
sc 1452 dev/pci/if_bce.c bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_TX_CTL,
sc 1459 dev/pci/if_bce.c bce_mii_write((struct device *) sc, 1, 26, /* MAGIC */
sc 1460 dev/pci/if_bce.c bce_mii_read((struct device *) sc, 1, 26) & 0x7fff); /* MAGIC */
sc 1462 dev/pci/if_bce.c bce_mii_write((struct device *) sc, 1, 26, /* MAGIC */
sc 1463 dev/pci/if_bce.c bce_mii_read((struct device *) sc, 1, 27) | (1 << 6)); /* MAGIC */
sc 1470 dev/pci/if_bce.c struct bce_softc *sc = ifp->if_softc;
sc 1473 dev/pci/if_bce.c mii_mediachg(&sc->bce_mii);
sc 1481 dev/pci/if_bce.c struct bce_softc *sc = ifp->if_softc;
sc 1483 dev/pci/if_bce.c mii_pollstat(&sc->bce_mii);
sc 1484 dev/pci/if_bce.c ifmr->ifm_active = sc->bce_mii.mii_media_active;
sc 1485 dev/pci/if_bce.c ifmr->ifm_status = sc->bce_mii.mii_media_status;
sc 1492 dev/pci/if_bce.c struct bce_softc *sc = v;
sc 1495 dev/pci/if_bce.c mii_tick(&sc->bce_mii);
sc 1497 dev/pci/if_bce.c timeout_add(&sc->bce_timeout, hz);
sc 274 dev/pci/if_bge.c #define BGE_IS_5705_OR_BEYOND(sc) \
sc 275 dev/pci/if_bge.c (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5705 || \
sc 276 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5750 || \
sc 277 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714_A0 || \
sc 278 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5780 || \
sc 279 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714 || \
sc 280 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5752 || \
sc 281 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 || \
sc 282 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5787 || \
sc 283 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906)
sc 285 dev/pci/if_bge.c #define BGE_IS_575X_PLUS(sc) \
sc 286 dev/pci/if_bge.c (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5750 || \
sc 287 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714_A0 || \
sc 288 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5780 || \
sc 289 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714 || \
sc 290 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5752 || \
sc 291 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 || \
sc 292 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5787 || \
sc 293 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906)
sc 295 dev/pci/if_bge.c #define BGE_IS_5714_FAMILY(sc) \
sc 296 dev/pci/if_bge.c (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714_A0 || \
sc 297 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5780 || \
sc 298 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5714)
sc 300 dev/pci/if_bge.c #define BGE_IS_JUMBO_CAPABLE(sc) \
sc 301 dev/pci/if_bge.c (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700 || \
sc 302 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5701 || \
sc 303 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5703 || \
sc 304 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5704)
sc 391 dev/pci/if_bge.c bge_readmem_ind(struct bge_softc *sc, int off)
sc 393 dev/pci/if_bge.c struct pci_attach_args *pa = &(sc->bge_pa);
sc 400 dev/pci/if_bge.c bge_writemem_ind(struct bge_softc *sc, int off, int val)
sc 402 dev/pci/if_bge.c struct pci_attach_args *pa = &(sc->bge_pa);
sc 409 dev/pci/if_bge.c bge_writereg_ind(struct bge_softc *sc, int off, int val)
sc 411 dev/pci/if_bge.c struct pci_attach_args *pa = &(sc->bge_pa);
sc 424 dev/pci/if_bge.c bge_eeprom_getbyte(struct bge_softc *sc, int addr, u_int8_t *dest)
sc 433 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM);
sc 436 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_EE_ADDR,
sc 441 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_EE_ADDR, BGE_EE_READCMD | addr);
sc 446 dev/pci/if_bge.c if (CSR_READ_4(sc, BGE_EE_ADDR) & BGE_EEADDR_DONE)
sc 451 dev/pci/if_bge.c printf("%s: eeprom read timed out\n", sc->bge_dev.dv_xname);
sc 456 dev/pci/if_bge.c byte = CSR_READ_4(sc, BGE_EE_DATA);
sc 467 dev/pci/if_bge.c bge_read_eeprom(struct bge_softc *sc, caddr_t dest, int off, int cnt)
sc 473 dev/pci/if_bge.c err = bge_eeprom_getbyte(sc, off + i, &byte);
sc 485 dev/pci/if_bge.c struct bge_softc *sc = (struct bge_softc *)dev;
sc 502 dev/pci/if_bge.c autopoll = CSR_READ_4(sc, BGE_MI_MODE);
sc 504 dev/pci/if_bge.c BGE_CLRBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL);
sc 508 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MI_COMM, BGE_MICMD_READ|BGE_MICOMM_BUSY|
sc 513 dev/pci/if_bge.c val = CSR_READ_4(sc, BGE_MI_COMM);
sc 520 dev/pci/if_bge.c printf("%s: PHY read timed out\n", sc->bge_dev.dv_xname);
sc 525 dev/pci/if_bge.c val = CSR_READ_4(sc, BGE_MI_COMM);
sc 529 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL);
sc 542 dev/pci/if_bge.c struct bge_softc *sc = (struct bge_softc *)dev;
sc 547 dev/pci/if_bge.c autopoll = CSR_READ_4(sc, BGE_MI_MODE);
sc 550 dev/pci/if_bge.c BGE_CLRBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL);
sc 554 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MI_COMM, BGE_MICMD_WRITE|BGE_MICOMM_BUSY|
sc 559 dev/pci/if_bge.c if (!(CSR_READ_4(sc, BGE_MI_COMM) & BGE_MICOMM_BUSY))
sc 565 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL);
sc 570 dev/pci/if_bge.c printf("%s: PHY read timed out\n", sc->bge_dev.dv_xname);
sc 577 dev/pci/if_bge.c struct bge_softc *sc = (struct bge_softc *)dev;
sc 578 dev/pci/if_bge.c struct mii_data *mii = &sc->bge_mii;
sc 584 dev/pci/if_bge.c (mii->mii_media_active & IFM_ETH_FMASK) != sc->bge_flowflags) {
sc 585 dev/pci/if_bge.c sc->bge_flowflags = mii->mii_media_active & IFM_ETH_FMASK;
sc 589 dev/pci/if_bge.c BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_PORTMODE);
sc 591 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_MAC_MODE, BGE_PORTMODE_GMII);
sc 593 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_MAC_MODE, BGE_PORTMODE_MII);
sc 596 dev/pci/if_bge.c BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_HALF_DUPLEX);
sc 598 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_MAC_MODE, BGE_MACMODE_HALF_DUPLEX);
sc 603 dev/pci/if_bge.c if (sc->bge_flowflags & IFM_ETH_RXPAUSE)
sc 604 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_RX_MODE, BGE_RXMODE_FLOWCTL_ENABLE);
sc 606 dev/pci/if_bge.c BGE_CLRBIT(sc, BGE_RX_MODE, BGE_RXMODE_FLOWCTL_ENABLE);
sc 608 dev/pci/if_bge.c if (sc->bge_flowflags & IFM_ETH_TXPAUSE)
sc 609 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_TX_MODE, BGE_TXMODE_FLOWCTL_ENABLE);
sc 611 dev/pci/if_bge.c BGE_CLRBIT(sc, BGE_TX_MODE, BGE_TXMODE_FLOWCTL_ENABLE);
sc 619 dev/pci/if_bge.c bge_alloc_jumbo_mem(struct bge_softc *sc)
sc 629 dev/pci/if_bge.c if (bus_dmamem_alloc(sc->bge_dmatag, BGE_JMEM, PAGE_SIZE, 0,
sc 631 dev/pci/if_bge.c printf("%s: can't alloc rx buffers\n", sc->bge_dev.dv_xname);
sc 636 dev/pci/if_bge.c if (bus_dmamem_map(sc->bge_dmatag, &seg, rseg, BGE_JMEM, &kva,
sc 639 dev/pci/if_bge.c sc->bge_dev.dv_xname, BGE_JMEM);
sc 645 dev/pci/if_bge.c if (bus_dmamap_create(sc->bge_dmatag, BGE_JMEM, 1, BGE_JMEM, 0,
sc 646 dev/pci/if_bge.c BUS_DMA_NOWAIT, &sc->bge_cdata.bge_rx_jumbo_map)) {
sc 647 dev/pci/if_bge.c printf("%s: can't create dma map\n", sc->bge_dev.dv_xname);
sc 653 dev/pci/if_bge.c if (bus_dmamap_load(sc->bge_dmatag, sc->bge_cdata.bge_rx_jumbo_map,
sc 655 dev/pci/if_bge.c printf("%s: can't load dma map\n", sc->bge_dev.dv_xname);
sc 661 dev/pci/if_bge.c sc->bge_cdata.bge_jumbo_buf = (caddr_t)kva;
sc 662 dev/pci/if_bge.c DPRINTFN(1,("bge_jumbo_buf = 0x%08X\n", sc->bge_cdata.bge_jumbo_buf));
sc 664 dev/pci/if_bge.c SLIST_INIT(&sc->bge_jfree_listhead);
sc 665 dev/pci/if_bge.c SLIST_INIT(&sc->bge_jinuse_listhead);
sc 671 dev/pci/if_bge.c ptr = sc->bge_cdata.bge_jumbo_buf;
sc 673 dev/pci/if_bge.c sc->bge_cdata.bge_jslots[i] = ptr;
sc 679 dev/pci/if_bge.c sc->bge_dev.dv_xname);
sc 684 dev/pci/if_bge.c SLIST_INSERT_HEAD(&sc->bge_jfree_listhead,
sc 691 dev/pci/if_bge.c bus_dmamap_unload(sc->bge_dmatag,
sc 692 dev/pci/if_bge.c sc->bge_cdata.bge_rx_jumbo_map);
sc 694 dev/pci/if_bge.c bus_dmamap_destroy(sc->bge_dmatag,
sc 695 dev/pci/if_bge.c sc->bge_cdata.bge_rx_jumbo_map);
sc 697 dev/pci/if_bge.c bus_dmamem_unmap(sc->bge_dmatag, kva, BGE_JMEM);
sc 699 dev/pci/if_bge.c bus_dmamem_free(sc->bge_dmatag, &seg, rseg);
sc 713 dev/pci/if_bge.c bge_jalloc(struct bge_softc *sc)
sc 717 dev/pci/if_bge.c entry = SLIST_FIRST(&sc->bge_jfree_listhead);
sc 722 dev/pci/if_bge.c SLIST_REMOVE_HEAD(&sc->bge_jfree_listhead, jpool_entries);
sc 723 dev/pci/if_bge.c SLIST_INSERT_HEAD(&sc->bge_jinuse_listhead, entry, jpool_entries);
sc 724 dev/pci/if_bge.c return (sc->bge_cdata.bge_jslots[entry->slot]);
sc 734 dev/pci/if_bge.c struct bge_softc *sc;
sc 738 dev/pci/if_bge.c sc = (struct bge_softc *)arg;
sc 740 dev/pci/if_bge.c if (sc == NULL)
sc 746 dev/pci/if_bge.c - (vaddr_t)sc->bge_cdata.bge_jumbo_buf) / BGE_JLEN;
sc 751 dev/pci/if_bge.c entry = SLIST_FIRST(&sc->bge_jinuse_listhead);
sc 755 dev/pci/if_bge.c SLIST_REMOVE_HEAD(&sc->bge_jinuse_listhead, jpool_entries);
sc 756 dev/pci/if_bge.c SLIST_INSERT_HEAD(&sc->bge_jfree_listhead, entry, jpool_entries);
sc 764 dev/pci/if_bge.c bge_newbuf_std(struct bge_softc *sc, int i, struct mbuf *m,
sc 772 dev/pci/if_bge.c error = bus_dmamap_create(sc->bge_dmatag, MCLBYTES, 1,
sc 778 dev/pci/if_bge.c sc->bge_cdata.bge_rx_std_map[i] = dmamap;
sc 802 dev/pci/if_bge.c if (!(sc->bge_flags & BGE_RX_ALIGNBUG))
sc 805 dev/pci/if_bge.c error = bus_dmamap_load_mbuf(sc->bge_dmatag, dmamap, m_new,
sc 810 dev/pci/if_bge.c sc->bge_cdata.bge_rx_std_chain[i] = NULL;
sc 815 dev/pci/if_bge.c sc->bge_cdata.bge_rx_std_chain[i] = m_new;
sc 816 dev/pci/if_bge.c r = &sc->bge_rdata->bge_rx_std_ring[i];
sc 822 dev/pci/if_bge.c bus_dmamap_sync(sc->bge_dmatag, sc->bge_ring_map,
sc 836 dev/pci/if_bge.c bge_newbuf_jumbo(struct bge_softc *sc, int i, struct mbuf *m)
sc 850 dev/pci/if_bge.c buf = bge_jalloc(sc);
sc 858 dev/pci/if_bge.c MEXTADD(m_new, buf, BGE_JUMBO_FRAMELEN, 0, bge_jfree, sc);
sc 870 dev/pci/if_bge.c if (!(sc->bge_flags & BGE_RX_ALIGNBUG))
sc 873 dev/pci/if_bge.c r = &sc->bge_rdata->bge_rx_jumbo_ring[i];
sc 874 dev/pci/if_bge.c sc->bge_cdata.bge_rx_jumbo_chain[i] = m_new;
sc 875 dev/pci/if_bge.c BGE_HOSTADDR(r->bge_addr, BGE_JUMBO_DMA_ADDR(sc, m_new));
sc 880 dev/pci/if_bge.c bus_dmamap_sync(sc->bge_dmatag, sc->bge_ring_map,
sc 896 dev/pci/if_bge.c bge_init_rx_ring_std(struct bge_softc *sc)
sc 900 dev/pci/if_bge.c if (sc->bge_flags & BGE_RXRING_VALID)
sc 904 dev/pci/if_bge.c if (bge_newbuf_std(sc, i, NULL, 0) == ENOBUFS)
sc 908 dev/pci/if_bge.c sc->bge_std = i - 1;
sc 909 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_RX_STD_PROD_LO, sc->bge_std);
sc 911 dev/pci/if_bge.c sc->bge_flags |= BGE_RXRING_VALID;
sc 917 dev/pci/if_bge.c bge_free_rx_ring_std(struct bge_softc *sc)
sc 921 dev/pci/if_bge.c if (!(sc->bge_flags & BGE_RXRING_VALID))
sc 925 dev/pci/if_bge.c if (sc->bge_cdata.bge_rx_std_chain[i] != NULL) {
sc 926 dev/pci/if_bge.c m_freem(sc->bge_cdata.bge_rx_std_chain[i]);
sc 927 dev/pci/if_bge.c sc->bge_cdata.bge_rx_std_chain[i] = NULL;
sc 928 dev/pci/if_bge.c bus_dmamap_destroy(sc->bge_dmatag,
sc 929 dev/pci/if_bge.c sc->bge_cdata.bge_rx_std_map[i]);
sc 931 dev/pci/if_bge.c bzero((char *)&sc->bge_rdata->bge_rx_std_ring[i],
sc 935 dev/pci/if_bge.c sc->bge_flags &= ~BGE_RXRING_VALID;
sc 939 dev/pci/if_bge.c bge_init_rx_ring_jumbo(struct bge_softc *sc)
sc 944 dev/pci/if_bge.c if (sc->bge_flags & BGE_JUMBO_RXRING_VALID)
sc 948 dev/pci/if_bge.c if (bge_newbuf_jumbo(sc, i, NULL) == ENOBUFS)
sc 952 dev/pci/if_bge.c sc->bge_jumbo = i - 1;
sc 953 dev/pci/if_bge.c sc->bge_flags |= BGE_JUMBO_RXRING_VALID;
sc 955 dev/pci/if_bge.c rcb = &sc->bge_rdata->bge_info.bge_jumbo_rx_rcb;
sc 957 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags);
sc 959 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_RX_JUMBO_PROD_LO, sc->bge_jumbo);
sc 965 dev/pci/if_bge.c bge_free_rx_ring_jumbo(struct bge_softc *sc)
sc 969 dev/pci/if_bge.c if (!(sc->bge_flags & BGE_JUMBO_RXRING_VALID))
sc 973 dev/pci/if_bge.c if (sc->bge_cdata.bge_rx_jumbo_chain[i] != NULL) {
sc 974 dev/pci/if_bge.c m_freem(sc->bge_cdata.bge_rx_jumbo_chain[i]);
sc 975 dev/pci/if_bge.c sc->bge_cdata.bge_rx_jumbo_chain[i] = NULL;
sc 977 dev/pci/if_bge.c bzero((char *)&sc->bge_rdata->bge_rx_jumbo_ring[i],
sc 981 dev/pci/if_bge.c sc->bge_flags &= ~BGE_JUMBO_RXRING_VALID;
sc 985 dev/pci/if_bge.c bge_free_tx_ring(struct bge_softc *sc)
sc 990 dev/pci/if_bge.c if (!(sc->bge_flags & BGE_TXRING_VALID))
sc 994 dev/pci/if_bge.c if (sc->bge_cdata.bge_tx_chain[i] != NULL) {
sc 995 dev/pci/if_bge.c m_freem(sc->bge_cdata.bge_tx_chain[i]);
sc 996 dev/pci/if_bge.c sc->bge_cdata.bge_tx_chain[i] = NULL;
sc 997 dev/pci/if_bge.c SLIST_INSERT_HEAD(&sc->txdma_list, sc->txdma[i],
sc 999 dev/pci/if_bge.c sc->txdma[i] = 0;
sc 1001 dev/pci/if_bge.c bzero((char *)&sc->bge_rdata->bge_tx_ring[i],
sc 1005 dev/pci/if_bge.c while ((dma = SLIST_FIRST(&sc->txdma_list))) {
sc 1006 dev/pci/if_bge.c SLIST_REMOVE_HEAD(&sc->txdma_list, link);
sc 1007 dev/pci/if_bge.c bus_dmamap_destroy(sc->bge_dmatag, dma->dmamap);
sc 1011 dev/pci/if_bge.c sc->bge_flags &= ~BGE_TXRING_VALID;
sc 1015 dev/pci/if_bge.c bge_init_tx_ring(struct bge_softc *sc)
sc 1021 dev/pci/if_bge.c if (sc->bge_flags & BGE_TXRING_VALID)
sc 1024 dev/pci/if_bge.c sc->bge_txcnt = 0;
sc 1025 dev/pci/if_bge.c sc->bge_tx_saved_considx = 0;
sc 1028 dev/pci/if_bge.c sc->bge_tx_prodidx = 0;
sc 1029 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_TX_HOST_PROD0_LO, sc->bge_tx_prodidx);
sc 1030 dev/pci/if_bge.c if (BGE_CHIPREV(sc->bge_chipid) == BGE_CHIPREV_5700_BX)
sc 1031 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_TX_HOST_PROD0_LO, sc->bge_tx_prodidx);
sc 1034 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_TX_NIC_PROD0_LO, 0);
sc 1035 dev/pci/if_bge.c if (BGE_CHIPREV(sc->bge_chipid) == BGE_CHIPREV_5700_BX)
sc 1036 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_TX_NIC_PROD0_LO, 0);
sc 1038 dev/pci/if_bge.c SLIST_INIT(&sc->txdma_list);
sc 1040 dev/pci/if_bge.c if (bus_dmamap_create(sc->bge_dmatag, BGE_JLEN,
sc 1049 dev/pci/if_bge.c sc->bge_dev.dv_xname);
sc 1050 dev/pci/if_bge.c bus_dmamap_destroy(sc->bge_dmatag, dmamap);
sc 1054 dev/pci/if_bge.c SLIST_INSERT_HEAD(&sc->txdma_list, dma, link);
sc 1057 dev/pci/if_bge.c sc->bge_flags |= BGE_TXRING_VALID;
sc 1063 dev/pci/if_bge.c bge_iff(struct bge_softc *sc)
sc 1065 dev/pci/if_bge.c struct arpcom *ac = &sc->arpcom;
sc 1073 dev/pci/if_bge.c rxmode = CSR_READ_4(sc, BGE_RX_MODE) & ~BGE_RXMODE_RX_PROMISC;
sc 1091 dev/pci/if_bge.c bus_space_write_raw_region_4(sc->bge_btag, sc->bge_bhandle, BGE_MAR0,
sc 1094 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_MODE, rxmode);
sc 1101 dev/pci/if_bge.c bge_chipinit(struct bge_softc *sc)
sc 1103 dev/pci/if_bge.c struct pci_attach_args *pa = &(sc->bge_pa);
sc 1112 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MAC_MODE, 0);
sc 1127 dev/pci/if_bge.c if (sc->bge_flags & BGE_PCIE) {
sc 1150 dev/pci/if_bge.c } else if (sc->bge_flags & BGE_PCIX) {
sc 1152 dev/pci/if_bge.c if (BGE_IS_5714_FAMILY(sc)) {
sc 1156 dev/pci/if_bge.c if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5780)
sc 1161 dev/pci/if_bge.c } else if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5704)
sc 1179 dev/pci/if_bge.c if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5703 ||
sc 1180 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5704) {
sc 1183 dev/pci/if_bge.c tmp = CSR_READ_4(sc, BGE_PCI_CLKCTL) & 0x1f;
sc 1195 dev/pci/if_bge.c if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5703 ||
sc 1196 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5704 ||
sc 1197 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5705)
sc 1206 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_DMA_SWAP_OPTIONS|
sc 1210 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_DMA_SWAP_OPTIONS|
sc 1233 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MISC_CFG, 65 << 1/*BGE_32BITTIME_66MHZ*/);
sc 1237 dev/pci/if_bge.c bge_blockinit(struct bge_softc *sc)
sc 1251 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_PCI_MEMWIN_BASEADDR, 0);
sc 1254 dev/pci/if_bge.c if (!(BGE_IS_5705_OR_BEYOND(sc))) {
sc 1255 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_BASEADDR,
sc 1258 dev/pci/if_bge.c if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5704)
sc 1259 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_LEN, 0x10000);
sc 1261 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_LEN, 0x18000);
sc 1264 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_BASEADDR,
sc 1266 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_LEN, 0x2000);
sc 1271 dev/pci/if_bge.c if (!(BGE_IS_5705_OR_BEYOND(sc))) {
sc 1272 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x50);
sc 1273 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x20);
sc 1274 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x60);
sc 1276 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
sc 1277 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x10);
sc 1278 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x60);
sc 1282 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_LOWAT, 5);
sc 1283 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_HIWAT, 10);
sc 1286 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_BMAN_MODE,
sc 1291 dev/pci/if_bge.c if (CSR_READ_4(sc, BGE_BMAN_MODE) & BGE_BMANMODE_ENABLE)
sc 1298 dev/pci/if_bge.c sc->bge_dev.dv_xname);
sc 1303 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_FTQ_RESET, 0xFFFFFFFF);
sc 1304 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_FTQ_RESET, 0);
sc 1308 dev/pci/if_bge.c if (CSR_READ_4(sc, BGE_FTQ_RESET) == 0)
sc 1315 dev/pci/if_bge.c sc->bge_dev.dv_xname);
sc 1320 dev/pci/if_bge.c rcb = &sc->bge_rdata->bge_info.bge_std_rx_rcb;
sc 1321 dev/pci/if_bge.c BGE_HOSTADDR(rcb->bge_hostaddr, BGE_RING_DMA_ADDR(sc, bge_rx_std_ring));
sc 1322 dev/pci/if_bge.c if (BGE_IS_5705_OR_BEYOND(sc))
sc 1328 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_HI, rcb->bge_hostaddr.bge_addr_hi);
sc 1329 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_LO, rcb->bge_hostaddr.bge_addr_lo);
sc 1330 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_STD_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags);
sc 1331 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_STD_RCB_NICADDR, rcb->bge_nicaddr);
sc 1340 dev/pci/if_bge.c if (BGE_IS_JUMBO_CAPABLE(sc)) {
sc 1341 dev/pci/if_bge.c rcb = &sc->bge_rdata->bge_info.bge_jumbo_rx_rcb;
sc 1343 dev/pci/if_bge.c BGE_RING_DMA_ADDR(sc, bge_rx_jumbo_ring));
sc 1349 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_HI,
sc 1351 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_LO,
sc 1353 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS,
sc 1355 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_NICADDR,
sc 1359 dev/pci/if_bge.c rcb = &sc->bge_rdata->bge_info.bge_mini_rx_rcb;
sc 1362 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_MINI_RCB_MAXLEN_FLAGS,
sc 1365 dev/pci/if_bge.c bus_dmamap_sync(sc->bge_dmatag, sc->bge_ring_map,
sc 1383 dev/pci/if_bge.c if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5750 ||
sc 1384 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5752 ||
sc 1385 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 ||
sc 1386 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5787)
sc 1389 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, i);
sc 1390 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RBDI_JUMBO_REPL_THRESH, BGE_JUMBO_RX_RING_CNT / 8);
sc 1399 dev/pci/if_bge.c RCB_WRITE_4(sc, rcb_addr, bge_maxlen_flags,
sc 1401 dev/pci/if_bge.c RCB_WRITE_4(sc, rcb_addr, bge_nicaddr, 0);
sc 1407 dev/pci/if_bge.c BGE_HOSTADDR(taddr, BGE_RING_DMA_ADDR(sc, bge_tx_ring));
sc 1408 dev/pci/if_bge.c RCB_WRITE_4(sc, rcb_addr, bge_hostaddr.bge_addr_hi, taddr.bge_addr_hi);
sc 1409 dev/pci/if_bge.c RCB_WRITE_4(sc, rcb_addr, bge_hostaddr.bge_addr_lo, taddr.bge_addr_lo);
sc 1410 dev/pci/if_bge.c RCB_WRITE_4(sc, rcb_addr, bge_nicaddr,
sc 1412 dev/pci/if_bge.c if (!(BGE_IS_5705_OR_BEYOND(sc)))
sc 1413 dev/pci/if_bge.c RCB_WRITE_4(sc, rcb_addr, bge_maxlen_flags,
sc 1419 dev/pci/if_bge.c RCB_WRITE_4(sc, rcb_addr, bge_hostaddr.bge_addr_hi, 0);
sc 1420 dev/pci/if_bge.c RCB_WRITE_4(sc, rcb_addr, bge_hostaddr.bge_addr_lo, 0);
sc 1421 dev/pci/if_bge.c RCB_WRITE_4(sc, rcb_addr, bge_maxlen_flags,
sc 1422 dev/pci/if_bge.c BGE_RCB_MAXLEN_FLAGS(sc->bge_return_ring_cnt,
sc 1424 dev/pci/if_bge.c RCB_WRITE_4(sc, rcb_addr, bge_nicaddr, 0);
sc 1425 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_RX_CONS0_LO +
sc 1431 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_RX_STD_PROD_LO, 0);
sc 1432 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_RX_JUMBO_PROD_LO, 0);
sc 1433 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_RX_MINI_PROD_LO, 0);
sc 1442 dev/pci/if_bge.c BGE_HOSTADDR(taddr, BGE_RING_DMA_ADDR(sc, bge_rx_return_ring));
sc 1443 dev/pci/if_bge.c RCB_WRITE_4(sc, rcb_addr, bge_hostaddr.bge_addr_hi, taddr.bge_addr_hi);
sc 1444 dev/pci/if_bge.c RCB_WRITE_4(sc, rcb_addr, bge_hostaddr.bge_addr_lo, taddr.bge_addr_lo);
sc 1445 dev/pci/if_bge.c RCB_WRITE_4(sc, rcb_addr, bge_nicaddr, 0x00000000);
sc 1446 dev/pci/if_bge.c RCB_WRITE_4(sc, rcb_addr, bge_maxlen_flags,
sc 1447 dev/pci/if_bge.c BGE_RCB_MAXLEN_FLAGS(sc->bge_return_ring_cnt, 0));
sc 1450 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_TX_RANDOM_BACKOFF,
sc 1451 dev/pci/if_bge.c sc->arpcom.ac_enaddr[0] + sc->arpcom.ac_enaddr[1] +
sc 1452 dev/pci/if_bge.c sc->arpcom.ac_enaddr[2] + sc->arpcom.ac_enaddr[3] +
sc 1453 dev/pci/if_bge.c sc->arpcom.ac_enaddr[4] + sc->arpcom.ac_enaddr[5] +
sc 1457 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_TX_LENGTHS, 0x2620);
sc 1463 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_RULES_CFG, 0x08);
sc 1469 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RXLP_CFG, 0x181);
sc 1472 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RXLP_STATS_ENABLE_MASK, 0x007FFFFF);
sc 1473 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RXLP_STATS_CTL, 0x1);
sc 1476 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_MODE, 0x00000000);
sc 1480 dev/pci/if_bge.c if (!(CSR_READ_4(sc, BGE_HCC_MODE) & BGE_HCCMODE_ENABLE))
sc 1487 dev/pci/if_bge.c sc->bge_dev.dv_xname);
sc 1492 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS, sc->bge_rx_coal_ticks);
sc 1493 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS, sc->bge_tx_coal_ticks);
sc 1494 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS, sc->bge_rx_max_coal_bds);
sc 1495 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS, sc->bge_tx_max_coal_bds);
sc 1496 dev/pci/if_bge.c if (!(BGE_IS_5705_OR_BEYOND(sc))) {
sc 1497 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS_INT, 0);
sc 1498 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS_INT, 0);
sc 1500 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS_INT, 0);
sc 1501 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS_INT, 0);
sc 1504 dev/pci/if_bge.c if (!(BGE_IS_5705_OR_BEYOND(sc))) {
sc 1505 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_HI, 0);
sc 1506 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_LO,
sc 1507 dev/pci/if_bge.c BGE_RING_DMA_ADDR(sc, bge_info.bge_stats));
sc 1509 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_STATS_BASEADDR, BGE_STATS_BLOCK);
sc 1510 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_BASEADDR, BGE_STATUS_BLOCK);
sc 1511 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_STATS_TICKS, sc->bge_stat_ticks);
sc 1515 dev/pci/if_bge.c BGE_HOSTADDR(taddr, BGE_RING_DMA_ADDR(sc, bge_status_block));
sc 1516 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_ADDR_HI, taddr.bge_addr_hi);
sc 1517 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_ADDR_LO, taddr.bge_addr_lo);
sc 1519 dev/pci/if_bge.c sc->bge_rdata->bge_status_block.bge_idx[0].bge_rx_prod_idx = 0;
sc 1520 dev/pci/if_bge.c sc->bge_rdata->bge_status_block.bge_idx[0].bge_tx_cons_idx = 0;
sc 1523 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_HCC_MODE, BGE_HCCMODE_ENABLE);
sc 1526 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RBDC_MODE,
sc 1530 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RXLP_MODE, BGE_RXLPMODE_ENABLE);
sc 1533 dev/pci/if_bge.c if (!(BGE_IS_5705_OR_BEYOND(sc)))
sc 1534 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RXLS_MODE, BGE_RXLSMODE_ENABLE);
sc 1537 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MAC_MODE, BGE_MACMODE_TXDMA_ENB|
sc 1541 dev/pci/if_bge.c (sc->bge_flags & BGE_TBI ? BGE_PORTMODE_TBI : BGE_PORTMODE_MII));
sc 1544 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_INTR_ONATTN);
sc 1548 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_MISCIO_OUT0|
sc 1550 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_MISCIO_OUTEN0|
sc 1555 dev/pci/if_bge.c if (!(BGE_IS_5705_OR_BEYOND(sc)))
sc 1556 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE);
sc 1561 dev/pci/if_bge.c if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 ||
sc 1562 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5787)
sc 1566 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_WDMA_MODE, val);
sc 1575 dev/pci/if_bge.c if (sc->bge_flags & BGE_PCIE && 0)
sc 1578 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RDMA_MODE, dma_read_modebits);
sc 1582 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RDC_MODE, BGE_RDCMODE_ENABLE);
sc 1585 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RBDI_MODE, BGE_RBDIMODE_ENABLE);
sc 1588 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RDBDI_MODE, BGE_RDBDIMODE_ENABLE);
sc 1591 dev/pci/if_bge.c if (!(BGE_IS_5705_OR_BEYOND(sc)))
sc 1592 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBCF_MODE, BGE_MBCFMODE_ENABLE);
sc 1595 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_SBDC_MODE, BGE_SBDCMODE_ENABLE);
sc 1598 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_SDC_MODE, BGE_SDCMODE_ENABLE);
sc 1601 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE);
sc 1604 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_SBDI_MODE, BGE_SBDIMODE_ENABLE);
sc 1607 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_SRS_MODE, BGE_SRSMODE_ENABLE);
sc 1609 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_SDI_STATS_ENABLE_MASK, 0x007FFFFF);
sc 1610 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_SDI_STATS_CTL,
sc 1614 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED|
sc 1619 dev/pci/if_bge.c if (sc->bge_flags & BGE_TBI) {
sc 1620 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MI_STS, BGE_MISTS_LINK);
sc 1622 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL|10<<16);
sc 1623 dev/pci/if_bge.c if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700 &&
sc 1624 dev/pci/if_bge.c sc->bge_chipid != BGE_CHIPID_BCM5700_B2)
sc 1625 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
sc 1636 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED|
sc 1641 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_MAC_EVT_ENB, BGE_EVTENB_LINK_CHANGED);
sc 1682 dev/pci/if_bge.c struct bge_softc *sc = (struct bge_softc *)self;
sc 1701 dev/pci/if_bge.c sc->bge_pa = *pa;
sc 1716 dev/pci/if_bge.c memtype, 0, &sc->bge_btag, &sc->bge_bhandle,
sc 1750 dev/pci/if_bge.c sc->bge_chipid =
sc 1755 dev/pci/if_bge.c br = bge_lookup_rev(sc->bge_chipid);
sc 1757 dev/pci/if_bge.c printf("unknown ASIC (0x%04x)", sc->bge_chipid >> 16);
sc 1759 dev/pci/if_bge.c printf("%s (0x%04x)", br->br_name, sc->bge_chipid >> 16);
sc 1766 dev/pci/if_bge.c sc->bge_flags |= BGE_PCIE;
sc 1773 dev/pci/if_bge.c sc->bge_flags |= BGE_PCIX;
sc 1782 dev/pci/if_bge.c sc->bge_flags |= BGE_NO_EEPROM;
sc 1794 dev/pci/if_bge.c if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5701 &&
sc 1795 dev/pci/if_bge.c sc->bge_flags & BGE_PCIX)
sc 1796 dev/pci/if_bge.c sc->bge_flags |= BGE_RX_ALIGNBUG;
sc 1798 dev/pci/if_bge.c if (BGE_IS_JUMBO_CAPABLE(sc))
sc 1799 dev/pci/if_bge.c sc->bge_flags |= BGE_JUMBO_CAP;
sc 1801 dev/pci/if_bge.c if ((BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700 ||
sc 1802 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5701) &&
sc 1804 dev/pci/if_bge.c sc->bge_flags |= BGE_NO_3LED;
sc 1806 dev/pci/if_bge.c misccfg = CSR_READ_4(sc, BGE_MISC_CFG);
sc 1809 dev/pci/if_bge.c if ((BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5703 &&
sc 1811 dev/pci/if_bge.c (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5705 &&
sc 1820 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906)
sc 1821 dev/pci/if_bge.c sc->bge_flags |= BGE_10_100_ONLY;
sc 1823 dev/pci/if_bge.c if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700 ||
sc 1824 dev/pci/if_bge.c (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5705 &&
sc 1825 dev/pci/if_bge.c (sc->bge_chipid != BGE_CHIPID_BCM5705_A0 &&
sc 1826 dev/pci/if_bge.c sc->bge_chipid != BGE_CHIPID_BCM5705_A1)) ||
sc 1827 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906)
sc 1828 dev/pci/if_bge.c sc->bge_flags |= BGE_NO_ETH_WIRE_SPEED;
sc 1830 dev/pci/if_bge.c if (BGE_CHIPREV(sc->bge_chipid) == BGE_CHIPREV_5703_AX ||
sc 1831 dev/pci/if_bge.c BGE_CHIPREV(sc->bge_chipid) == BGE_CHIPREV_5704_AX)
sc 1832 dev/pci/if_bge.c sc->bge_flags |= BGE_PHY_ADC_BUG;
sc 1833 dev/pci/if_bge.c if (sc->bge_chipid == BGE_CHIPID_BCM5704_A0)
sc 1834 dev/pci/if_bge.c sc->bge_flags |= BGE_PHY_5704_A0_BUG;
sc 1836 dev/pci/if_bge.c if (BGE_IS_5705_OR_BEYOND(sc)) {
sc 1837 dev/pci/if_bge.c if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 ||
sc 1838 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5787) {
sc 1841 dev/pci/if_bge.c sc->bge_flags |= BGE_PHY_JITTER_BUG;
sc 1843 dev/pci/if_bge.c sc->bge_flags |= BGE_PHY_ADJUST_TRIM;
sc 1844 dev/pci/if_bge.c } else if (BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5906)
sc 1845 dev/pci/if_bge.c sc->bge_flags |= BGE_PHY_BER_BUG;
sc 1850 dev/pci/if_bge.c bge_reset(sc);
sc 1852 dev/pci/if_bge.c bge_chipinit(sc);
sc 1857 dev/pci/if_bge.c sc->arpcom.ac_enaddr, ETHER_ADDR_LEN) == ETHER_ADDR_LEN)
sc 1866 dev/pci/if_bge.c mac_addr = bge_readmem_ind(sc, 0x0c14);
sc 1868 dev/pci/if_bge.c sc->arpcom.ac_enaddr[0] = (u_char)(mac_addr >> 8);
sc 1869 dev/pci/if_bge.c sc->arpcom.ac_enaddr[1] = (u_char)mac_addr;
sc 1870 dev/pci/if_bge.c mac_addr = bge_readmem_ind(sc, 0x0c18);
sc 1871 dev/pci/if_bge.c sc->arpcom.ac_enaddr[2] = (u_char)(mac_addr >> 24);
sc 1872 dev/pci/if_bge.c sc->arpcom.ac_enaddr[3] = (u_char)(mac_addr >> 16);
sc 1873 dev/pci/if_bge.c sc->arpcom.ac_enaddr[4] = (u_char)(mac_addr >> 8);
sc 1874 dev/pci/if_bge.c sc->arpcom.ac_enaddr[5] = (u_char)mac_addr;
sc 1878 dev/pci/if_bge.c if (!gotenaddr && (!(sc->bge_flags & BGE_NO_EEPROM))) {
sc 1879 dev/pci/if_bge.c if (bge_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr,
sc 1888 dev/pci/if_bge.c myetheraddr(sc->arpcom.ac_enaddr);
sc 1899 dev/pci/if_bge.c sc->bge_dmatag = pa->pa_dmat;
sc 1901 dev/pci/if_bge.c if (bus_dmamem_alloc(sc->bge_dmatag, sizeof(struct bge_ring_data),
sc 1907 dev/pci/if_bge.c if (bus_dmamem_map(sc->bge_dmatag, &seg, rseg,
sc 1915 dev/pci/if_bge.c if (bus_dmamap_create(sc->bge_dmatag, sizeof(struct bge_ring_data), 1,
sc 1917 dev/pci/if_bge.c BUS_DMA_NOWAIT, &sc->bge_ring_map)) {
sc 1922 dev/pci/if_bge.c if (bus_dmamap_load(sc->bge_dmatag, sc->bge_ring_map, kva,
sc 1929 dev/pci/if_bge.c sc->bge_rdata = (struct bge_ring_data *)kva;
sc 1931 dev/pci/if_bge.c bzero(sc->bge_rdata, sizeof(struct bge_ring_data));
sc 1936 dev/pci/if_bge.c if (BGE_IS_JUMBO_CAPABLE(sc)) {
sc 1937 dev/pci/if_bge.c if (bge_alloc_jumbo_mem(sc)) {
sc 1944 dev/pci/if_bge.c sc->bge_stat_ticks = BGE_TICKS_PER_SEC;
sc 1945 dev/pci/if_bge.c sc->bge_rx_coal_ticks = 150;
sc 1946 dev/pci/if_bge.c sc->bge_rx_max_coal_bds = 64;
sc 1947 dev/pci/if_bge.c sc->bge_tx_coal_ticks = 300;
sc 1948 dev/pci/if_bge.c sc->bge_tx_max_coal_bds = 400;
sc 1951 dev/pci/if_bge.c if (BGE_IS_5705_OR_BEYOND(sc))
sc 1952 dev/pci/if_bge.c sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
sc 1954 dev/pci/if_bge.c sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT;
sc 1957 dev/pci/if_bge.c ifp = &sc->arpcom.ac_if;
sc 1958 dev/pci/if_bge.c ifp->if_softc = sc;
sc 1967 dev/pci/if_bge.c bcopy(sc->bge_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 1975 dev/pci/if_bge.c if (BGE_IS_JUMBO_CAPABLE(sc))
sc 1982 dev/pci/if_bge.c sc->bge_mii.mii_ifp = ifp;
sc 1983 dev/pci/if_bge.c sc->bge_mii.mii_readreg = bge_miibus_readreg;
sc 1984 dev/pci/if_bge.c sc->bge_mii.mii_writereg = bge_miibus_writereg;
sc 1985 dev/pci/if_bge.c sc->bge_mii.mii_statchg = bge_miibus_statchg;
sc 1995 dev/pci/if_bge.c if (bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_SIG) == BGE_MAGIC_NUMBER)
sc 1996 dev/pci/if_bge.c hwcfg = bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_NICCFG);
sc 1997 dev/pci/if_bge.c else if (!(sc->bge_flags & BGE_NO_EEPROM)) {
sc 1998 dev/pci/if_bge.c if (bge_read_eeprom(sc, (caddr_t)&hwcfg, BGE_EE_HWCFG_OFFSET,
sc 2007 dev/pci/if_bge.c sc->bge_flags |= BGE_TBI;
sc 2011 dev/pci/if_bge.c sc->bge_flags |= BGE_TBI;
sc 2015 dev/pci/if_bge.c sc->bge_intrhand = pci_intr_establish(pc, ih, IPL_NET, bge_intr, sc,
sc 2016 dev/pci/if_bge.c sc->bge_dev.dv_xname);
sc 2017 dev/pci/if_bge.c if (sc->bge_intrhand == NULL) {
sc 2029 dev/pci/if_bge.c ether_sprintf(sc->arpcom.ac_enaddr));
sc 2031 dev/pci/if_bge.c if (sc->bge_flags & BGE_TBI) {
sc 2032 dev/pci/if_bge.c ifmedia_init(&sc->bge_ifmedia, IFM_IMASK, bge_ifmedia_upd,
sc 2034 dev/pci/if_bge.c ifmedia_add(&sc->bge_ifmedia, IFM_ETHER|IFM_1000_SX, 0, NULL);
sc 2035 dev/pci/if_bge.c ifmedia_add(&sc->bge_ifmedia, IFM_ETHER|IFM_1000_SX|IFM_FDX,
sc 2037 dev/pci/if_bge.c ifmedia_add(&sc->bge_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
sc 2038 dev/pci/if_bge.c ifmedia_set(&sc->bge_ifmedia, IFM_ETHER|IFM_AUTO);
sc 2039 dev/pci/if_bge.c sc->bge_ifmedia.ifm_media = sc->bge_ifmedia.ifm_cur->ifm_media;
sc 2044 dev/pci/if_bge.c ifmedia_init(&sc->bge_mii.mii_media, 0, bge_ifmedia_upd,
sc 2046 dev/pci/if_bge.c mii_attach(&sc->bge_dev, &sc->bge_mii, 0xffffffff,
sc 2049 dev/pci/if_bge.c if (LIST_FIRST(&sc->bge_mii.mii_phys) == NULL) {
sc 2050 dev/pci/if_bge.c printf("%s: no PHY found!\n", sc->bge_dev.dv_xname);
sc 2051 dev/pci/if_bge.c ifmedia_add(&sc->bge_mii.mii_media,
sc 2053 dev/pci/if_bge.c ifmedia_set(&sc->bge_mii.mii_media,
sc 2056 dev/pci/if_bge.c ifmedia_set(&sc->bge_mii.mii_media,
sc 2066 dev/pci/if_bge.c sc->sc_shutdownhook = shutdownhook_establish(bge_shutdown, sc);
sc 2067 dev/pci/if_bge.c sc->sc_powerhook = powerhook_establish(bge_power, sc);
sc 2069 dev/pci/if_bge.c timeout_set(&sc->bge_timeout, bge_tick, sc);
sc 2073 dev/pci/if_bge.c bus_dmamap_unload(sc->bge_dmatag, sc->bge_ring_map);
sc 2076 dev/pci/if_bge.c bus_dmamap_destroy(sc->bge_dmatag, sc->bge_ring_map);
sc 2079 dev/pci/if_bge.c bus_dmamem_unmap(sc->bge_dmatag, kva,
sc 2083 dev/pci/if_bge.c bus_dmamem_free(sc->bge_dmatag, &seg, rseg);
sc 2086 dev/pci/if_bge.c bus_space_unmap(sc->bge_btag, sc->bge_bhandle, size);
sc 2090 dev/pci/if_bge.c bge_reset(struct bge_softc *sc)
sc 2092 dev/pci/if_bge.c struct pci_attach_args *pa = &sc->bge_pa;
sc 2107 dev/pci/if_bge.c if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5752 ||
sc 2108 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5755 ||
sc 2109 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5787)
sc 2110 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_FASTBOOT_PC, 0);
sc 2114 dev/pci/if_bge.c if (sc->bge_flags & BGE_PCIE) {
sc 2115 dev/pci/if_bge.c if (CSR_READ_4(sc, 0x7e2c) == 0x60) {
sc 2117 dev/pci/if_bge.c CSR_WRITE_4(sc, 0x7e2c, 0x20);
sc 2119 dev/pci/if_bge.c if (sc->bge_chipid != BGE_CHIPID_BCM5750_A0) {
sc 2124 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MISC_CFG, (1<<29));
sc 2133 dev/pci/if_bge.c if (BGE_IS_5705_OR_BEYOND(sc))
sc 2137 dev/pci/if_bge.c bge_writereg_ind(sc, BGE_MISC_CFG, reset);
sc 2141 dev/pci/if_bge.c if (sc->bge_flags & BGE_PCIE) {
sc 2142 dev/pci/if_bge.c if (sc->bge_chipid == BGE_CHIPID_BCM5750_A0) {
sc 2164 dev/pci/if_bge.c bge_writereg_ind(sc, BGE_MISC_CFG, (65 << 1));
sc 2167 dev/pci/if_bge.c if (BGE_IS_5714_FAMILY(sc)) {
sc 2170 dev/pci/if_bge.c val = CSR_READ_4(sc, BGE_MARB_MODE);
sc 2171 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE | val);
sc 2173 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE);
sc 2179 dev/pci/if_bge.c bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM, BGE_MAGIC_NUMBER);
sc 2188 dev/pci/if_bge.c val = bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM);
sc 2194 dev/pci/if_bge.c if (i >= BGE_TIMEOUT && (!(sc->bge_flags & BGE_NO_EEPROM)))
sc 2196 dev/pci/if_bge.c sc->bge_dev.dv_xname);
sc 2217 dev/pci/if_bge.c sc->bge_dev.dv_xname));
sc 2221 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_DMA_SWAP_OPTIONS);
sc 2223 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MAC_MODE, 0);
sc 2230 dev/pci/if_bge.c if (sc->bge_flags & BGE_TBI &&
sc 2231 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5704) {
sc 2234 dev/pci/if_bge.c serdescfg = CSR_READ_4(sc, BGE_SERDES_CFG);
sc 2236 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_SERDES_CFG, serdescfg);
sc 2239 dev/pci/if_bge.c if (sc->bge_flags & BGE_PCIE &&
sc 2240 dev/pci/if_bge.c sc->bge_chipid != BGE_CHIPID_BCM5750_A0) {
sc 2244 dev/pci/if_bge.c v = CSR_READ_4(sc, 0x7c00);
sc 2245 dev/pci/if_bge.c CSR_WRITE_4(sc, 0x7c00, v | (1<<25));
sc 2260 dev/pci/if_bge.c bge_rxeof(struct bge_softc *sc)
sc 2270 dev/pci/if_bge.c if (sc->bge_rx_saved_considx ==
sc 2271 dev/pci/if_bge.c sc->bge_rdata->bge_status_block.bge_idx[0].bge_rx_prod_idx)
sc 2274 dev/pci/if_bge.c ifp = &sc->arpcom.ac_if;
sc 2276 dev/pci/if_bge.c bus_dmamap_sync(sc->bge_dmatag, sc->bge_ring_map,
sc 2282 dev/pci/if_bge.c tosync = sc->bge_rdata->bge_status_block.bge_idx[0].bge_rx_prod_idx -
sc 2283 dev/pci/if_bge.c sc->bge_rx_saved_considx;
sc 2285 dev/pci/if_bge.c toff = offset + (sc->bge_rx_saved_considx * sizeof (struct bge_rx_bd));
sc 2288 dev/pci/if_bge.c tlen = (sc->bge_return_ring_cnt - sc->bge_rx_saved_considx) *
sc 2290 dev/pci/if_bge.c bus_dmamap_sync(sc->bge_dmatag, sc->bge_ring_map,
sc 2295 dev/pci/if_bge.c bus_dmamap_sync(sc->bge_dmatag, sc->bge_ring_map,
sc 2299 dev/pci/if_bge.c while(sc->bge_rx_saved_considx !=
sc 2300 dev/pci/if_bge.c sc->bge_rdata->bge_status_block.bge_idx[0].bge_rx_prod_idx) {
sc 2308 dev/pci/if_bge.c cur_rx = &sc->bge_rdata->
sc 2309 dev/pci/if_bge.c bge_rx_return_ring[sc->bge_rx_saved_considx];
sc 2312 dev/pci/if_bge.c BGE_INC(sc->bge_rx_saved_considx, sc->bge_return_ring_cnt);
sc 2315 dev/pci/if_bge.c BGE_INC(sc->bge_jumbo, BGE_JUMBO_RX_RING_CNT);
sc 2316 dev/pci/if_bge.c m = sc->bge_cdata.bge_rx_jumbo_chain[rxidx];
sc 2317 dev/pci/if_bge.c sc->bge_cdata.bge_rx_jumbo_chain[rxidx] = NULL;
sc 2321 dev/pci/if_bge.c bge_newbuf_jumbo(sc, sc->bge_jumbo, m);
sc 2324 dev/pci/if_bge.c if (bge_newbuf_jumbo(sc, sc->bge_jumbo, NULL)
sc 2330 dev/pci/if_bge.c bge_newbuf_jumbo(sc, sc->bge_jumbo, m);
sc 2339 dev/pci/if_bge.c BGE_INC(sc->bge_std, BGE_STD_RX_RING_CNT);
sc 2340 dev/pci/if_bge.c m = sc->bge_cdata.bge_rx_std_chain[rxidx];
sc 2341 dev/pci/if_bge.c sc->bge_cdata.bge_rx_std_chain[rxidx] = NULL;
sc 2343 dev/pci/if_bge.c dmamap = sc->bge_cdata.bge_rx_std_map[rxidx];
sc 2344 dev/pci/if_bge.c sc->bge_cdata.bge_rx_std_map[rxidx] = 0;
sc 2345 dev/pci/if_bge.c bus_dmamap_unload(sc->bge_dmatag, dmamap);
sc 2348 dev/pci/if_bge.c bge_newbuf_std(sc, sc->bge_std, m, dmamap);
sc 2351 dev/pci/if_bge.c if (bge_newbuf_std(sc, sc->bge_std,
sc 2354 dev/pci/if_bge.c bge_newbuf_std(sc, sc->bge_std, m, dmamap);
sc 2365 dev/pci/if_bge.c if (sc->bge_flags & BGE_RX_ALIGNBUG) {
sc 2400 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_RX_CONS0_LO, sc->bge_rx_saved_considx);
sc 2402 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_RX_STD_PROD_LO, sc->bge_std);
sc 2404 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_RX_JUMBO_PROD_LO, sc->bge_jumbo);
sc 2408 dev/pci/if_bge.c bge_txeof(struct bge_softc *sc)
sc 2419 dev/pci/if_bge.c if (sc->bge_tx_saved_considx ==
sc 2420 dev/pci/if_bge.c sc->bge_rdata->bge_status_block.bge_idx[0].bge_tx_cons_idx)
sc 2423 dev/pci/if_bge.c ifp = &sc->arpcom.ac_if;
sc 2425 dev/pci/if_bge.c bus_dmamap_sync(sc->bge_dmatag, sc->bge_ring_map,
sc 2431 dev/pci/if_bge.c tosync = sc->bge_rdata->bge_status_block.bge_idx[0].bge_tx_cons_idx -
sc 2432 dev/pci/if_bge.c sc->bge_tx_saved_considx;
sc 2434 dev/pci/if_bge.c toff = offset + (sc->bge_tx_saved_considx * sizeof (struct bge_tx_bd));
sc 2437 dev/pci/if_bge.c tlen = (BGE_TX_RING_CNT - sc->bge_tx_saved_considx) *
sc 2439 dev/pci/if_bge.c bus_dmamap_sync(sc->bge_dmatag, sc->bge_ring_map,
sc 2444 dev/pci/if_bge.c bus_dmamap_sync(sc->bge_dmatag, sc->bge_ring_map,
sc 2452 dev/pci/if_bge.c while (sc->bge_tx_saved_considx !=
sc 2453 dev/pci/if_bge.c sc->bge_rdata->bge_status_block.bge_idx[0].bge_tx_cons_idx) {
sc 2456 dev/pci/if_bge.c idx = sc->bge_tx_saved_considx;
sc 2457 dev/pci/if_bge.c cur_tx = &sc->bge_rdata->bge_tx_ring[idx];
sc 2460 dev/pci/if_bge.c m = sc->bge_cdata.bge_tx_chain[idx];
sc 2462 dev/pci/if_bge.c sc->bge_cdata.bge_tx_chain[idx] = NULL;
sc 2463 dev/pci/if_bge.c dma = sc->txdma[idx];
sc 2464 dev/pci/if_bge.c bus_dmamap_sync(sc->bge_dmatag, dma->dmamap, 0,
sc 2466 dev/pci/if_bge.c bus_dmamap_unload(sc->bge_dmatag, dma->dmamap);
sc 2467 dev/pci/if_bge.c SLIST_INSERT_HEAD(&sc->txdma_list, dma, link);
sc 2468 dev/pci/if_bge.c sc->txdma[idx] = NULL;
sc 2472 dev/pci/if_bge.c sc->bge_txcnt--;
sc 2473 dev/pci/if_bge.c BGE_INC(sc->bge_tx_saved_considx, BGE_TX_RING_CNT);
sc 2484 dev/pci/if_bge.c struct bge_softc *sc;
sc 2488 dev/pci/if_bge.c sc = xsc;
sc 2489 dev/pci/if_bge.c ifp = &sc->arpcom.ac_if;
sc 2498 dev/pci/if_bge.c statusword = sc->bge_rdata->bge_status_block.bge_status;
sc 2501 dev/pci/if_bge.c (!(CSR_READ_4(sc, BGE_PCI_PCISTATE) & BGE_PCISTATE_INTR_NOT_ACTIVE))) {
sc 2504 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 1);
sc 2507 dev/pci/if_bge.c sc->bge_rdata->bge_status_block.bge_status = 0;
sc 2509 dev/pci/if_bge.c if ((BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700 &&
sc 2510 dev/pci/if_bge.c sc->bge_chipid != BGE_CHIPID_BCM5700_B2) ||
sc 2512 dev/pci/if_bge.c sc->bge_link_evt)
sc 2513 dev/pci/if_bge.c bge_link_upd(sc);
sc 2517 dev/pci/if_bge.c bge_rxeof(sc);
sc 2520 dev/pci/if_bge.c bge_txeof(sc);
sc 2524 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 0);
sc 2537 dev/pci/if_bge.c struct bge_softc *sc = xsc;
sc 2538 dev/pci/if_bge.c struct mii_data *mii = &sc->bge_mii;
sc 2543 dev/pci/if_bge.c if (BGE_IS_5705_OR_BEYOND(sc))
sc 2544 dev/pci/if_bge.c bge_stats_update_regs(sc);
sc 2546 dev/pci/if_bge.c bge_stats_update(sc);
sc 2548 dev/pci/if_bge.c if (sc->bge_flags & BGE_TBI) {
sc 2554 dev/pci/if_bge.c sc->bge_link_evt++;
sc 2555 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_INTR_SET);
sc 2559 dev/pci/if_bge.c timeout_add(&sc->bge_timeout, hz);
sc 2565 dev/pci/if_bge.c bge_stats_update_regs(struct bge_softc *sc)
sc 2573 dev/pci/if_bge.c ifp = &sc->arpcom.ac_if;
sc 2577 dev/pci/if_bge.c *s = CSR_READ_4(sc, BGE_RX_STATS + i);
sc 2585 dev/pci/if_bge.c ifp->if_collisions += cnt >= sc->bge_tx_collisions ?
sc 2586 dev/pci/if_bge.c cnt - sc->bge_tx_collisions : cnt;
sc 2587 dev/pci/if_bge.c sc->bge_tx_collisions = cnt;
sc 2591 dev/pci/if_bge.c bge_stats_update(struct bge_softc *sc)
sc 2593 dev/pci/if_bge.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 2597 dev/pci/if_bge.c #define READ_STAT(sc, stats, stat) \
sc 2598 dev/pci/if_bge.c CSR_READ_4(sc, stats + offsetof(struct bge_stats, stat))
sc 2600 dev/pci/if_bge.c cnt = READ_STAT(sc, stats,
sc 2602 dev/pci/if_bge.c cnt += READ_STAT(sc, stats,
sc 2604 dev/pci/if_bge.c cnt += READ_STAT(sc, stats,
sc 2606 dev/pci/if_bge.c cnt += READ_STAT(sc, stats,
sc 2608 dev/pci/if_bge.c ifp->if_collisions += cnt >= sc->bge_tx_collisions ?
sc 2609 dev/pci/if_bge.c cnt - sc->bge_tx_collisions : cnt;
sc 2610 dev/pci/if_bge.c sc->bge_tx_collisions = cnt;
sc 2612 dev/pci/if_bge.c cnt = READ_STAT(sc, stats, ifInDiscards.bge_addr_lo);
sc 2613 dev/pci/if_bge.c ifp->if_ierrors += cnt >= sc->bge_rx_discards ?
sc 2614 dev/pci/if_bge.c cnt - sc->bge_rx_discards : cnt;
sc 2615 dev/pci/if_bge.c sc->bge_rx_discards = cnt;
sc 2617 dev/pci/if_bge.c cnt = READ_STAT(sc, stats, txstats.ifOutDiscards.bge_addr_lo);
sc 2618 dev/pci/if_bge.c ifp->if_oerrors += cnt >= sc->bge_tx_discards ?
sc 2619 dev/pci/if_bge.c cnt - sc->bge_tx_discards : cnt;
sc 2620 dev/pci/if_bge.c sc->bge_tx_discards = cnt;
sc 2729 dev/pci/if_bge.c bge_encap(struct bge_softc *sc, struct mbuf *m_head, u_int32_t *txidx)
sc 2762 dev/pci/if_bge.c if (!(BGE_CHIPREV(sc->bge_chipid) == BGE_CHIPREV_5700_BX))
sc 2774 dev/pci/if_bge.c dma = SLIST_FIRST(&sc->txdma_list);
sc 2784 dev/pci/if_bge.c if (bus_dmamap_load_mbuf(sc->bge_dmatag, dmamap, m_head,
sc 2792 dev/pci/if_bge.c if (dmamap->dm_nsegs > (BGE_TX_RING_CNT - sc->bge_txcnt - 16))
sc 2796 dev/pci/if_bge.c f = &sc->bge_rdata->bge_tx_ring[frag];
sc 2797 dev/pci/if_bge.c if (sc->bge_cdata.bge_tx_chain[frag] != NULL)
sc 2817 dev/pci/if_bge.c bus_dmamap_sync(sc->bge_dmatag, dmamap, 0, dmamap->dm_mapsize,
sc 2820 dev/pci/if_bge.c if (frag == sc->bge_tx_saved_considx)
sc 2823 dev/pci/if_bge.c sc->bge_rdata->bge_tx_ring[cur].bge_flags |= BGE_TXBDFLAG_END;
sc 2824 dev/pci/if_bge.c sc->bge_cdata.bge_tx_chain[cur] = m_head;
sc 2825 dev/pci/if_bge.c SLIST_REMOVE_HEAD(&sc->txdma_list, link);
sc 2826 dev/pci/if_bge.c sc->txdma[cur] = dma;
sc 2827 dev/pci/if_bge.c sc->bge_txcnt += dmamap->dm_nsegs;
sc 2834 dev/pci/if_bge.c bus_dmamap_unload(sc->bge_dmatag, dmamap);
sc 2846 dev/pci/if_bge.c struct bge_softc *sc;
sc 2851 dev/pci/if_bge.c sc = ifp->if_softc;
sc 2853 dev/pci/if_bge.c if (!sc->bge_link || IFQ_IS_EMPTY(&ifp->if_snd))
sc 2856 dev/pci/if_bge.c prodidx = sc->bge_tx_prodidx;
sc 2858 dev/pci/if_bge.c while (sc->bge_cdata.bge_tx_chain[prodidx] == NULL) {
sc 2868 dev/pci/if_bge.c if (bge_encap(sc, m_head, &prodidx)) {
sc 2890 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_TX_HOST_PROD0_LO, prodidx);
sc 2891 dev/pci/if_bge.c if (BGE_CHIPREV(sc->bge_chipid) == BGE_CHIPREV_5700_BX)
sc 2892 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_TX_HOST_PROD0_LO, prodidx);
sc 2894 dev/pci/if_bge.c sc->bge_tx_prodidx = prodidx;
sc 2905 dev/pci/if_bge.c struct bge_softc *sc = xsc;
sc 2912 dev/pci/if_bge.c ifp = &sc->arpcom.ac_if;
sc 2915 dev/pci/if_bge.c bge_stop(sc);
sc 2916 dev/pci/if_bge.c bge_reset(sc);
sc 2917 dev/pci/if_bge.c bge_chipinit(sc);
sc 2923 dev/pci/if_bge.c if (bge_blockinit(sc)) {
sc 2924 dev/pci/if_bge.c printf("%s: initialization failure\n", sc->bge_dev.dv_xname);
sc 2929 dev/pci/if_bge.c ifp = &sc->arpcom.ac_if;
sc 2932 dev/pci/if_bge.c if (BGE_IS_JUMBO_CAPABLE(sc))
sc 2933 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_MTU,
sc 2936 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_MTU,
sc 2940 dev/pci/if_bge.c m = (u_int16_t *)&sc->arpcom.ac_enaddr[0];
sc 2941 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MAC_ADDR1_LO, htons(m[0]));
sc 2942 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MAC_ADDR1_HI, (htons(m[1]) << 16) | htons(m[2]));
sc 2945 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_RX_MODE, BGE_RXMODE_RX_KEEP_VLAN_DIAG);
sc 2948 dev/pci/if_bge.c bge_iff(sc);
sc 2951 dev/pci/if_bge.c bge_init_rx_ring_std(sc);
sc 2958 dev/pci/if_bge.c if (sc->bge_chipid == BGE_CHIPID_BCM5705_A0) {
sc 2962 dev/pci/if_bge.c v = bge_readmem_ind(sc, BGE_STD_RX_RINGS + 8);
sc 2968 dev/pci/if_bge.c sc->bge_dev.dv_xname);
sc 2972 dev/pci/if_bge.c if (BGE_IS_JUMBO_CAPABLE(sc))
sc 2973 dev/pci/if_bge.c bge_init_rx_ring_jumbo(sc);
sc 2976 dev/pci/if_bge.c sc->bge_rx_saved_considx = 0;
sc 2979 dev/pci/if_bge.c bge_init_tx_ring(sc);
sc 2982 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_TX_MODE, BGE_TXMODE_ENABLE);
sc 2985 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_RX_MODE, BGE_RXMODE_ENABLE);
sc 2987 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MAX_RX_FRAME_LOWAT, 2);
sc 2990 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP);
sc 2993 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_CLEAR_INTA);
sc 2994 dev/pci/if_bge.c BGE_CLRBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_MASK_PCI_INTR);
sc 2995 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 0);
sc 3004 dev/pci/if_bge.c timeout_add(&sc->bge_timeout, hz);
sc 3013 dev/pci/if_bge.c struct bge_softc *sc = ifp->if_softc;
sc 3014 dev/pci/if_bge.c struct mii_data *mii = &sc->bge_mii;
sc 3015 dev/pci/if_bge.c struct ifmedia *ifm = &sc->bge_ifmedia;
sc 3018 dev/pci/if_bge.c if (sc->bge_flags & BGE_TBI) {
sc 3028 dev/pci/if_bge.c if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5704) {
sc 3030 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_TX_TBI_AUTONEG, 0);
sc 3031 dev/pci/if_bge.c sgdig = CSR_READ_4(sc, BGE_SGDIG_CFG);
sc 3035 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_SGDIG_CFG,
sc 3038 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_SGDIG_CFG, sgdig);
sc 3043 dev/pci/if_bge.c BGE_CLRBIT(sc, BGE_MAC_MODE,
sc 3046 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_MAC_MODE,
sc 3057 dev/pci/if_bge.c sc->bge_link_evt++;
sc 3074 dev/pci/if_bge.c struct bge_softc *sc = ifp->if_softc;
sc 3075 dev/pci/if_bge.c struct mii_data *mii = &sc->bge_mii;
sc 3077 dev/pci/if_bge.c if (sc->bge_flags & BGE_TBI) {
sc 3080 dev/pci/if_bge.c if (CSR_READ_4(sc, BGE_MAC_STS) &
sc 3088 dev/pci/if_bge.c if (CSR_READ_4(sc, BGE_MAC_MODE) & BGE_MACMODE_HALF_DUPLEX)
sc 3098 dev/pci/if_bge.c sc->bge_flowflags;
sc 3104 dev/pci/if_bge.c struct bge_softc *sc = ifp->if_softc;
sc 3112 dev/pci/if_bge.c if ((error = ether_ioctl(ifp, &sc->arpcom, command, data)) > 0) {
sc 3121 dev/pci/if_bge.c bge_init(sc);
sc 3124 dev/pci/if_bge.c arp_ifinit(&sc->arpcom, ifa);
sc 3136 dev/pci/if_bge.c bge_iff(sc);
sc 3138 dev/pci/if_bge.c bge_init(sc);
sc 3141 dev/pci/if_bge.c bge_stop(sc);
sc 3143 dev/pci/if_bge.c sc->bge_if_flags = ifp->if_flags;
sc 3148 dev/pci/if_bge.c ? ether_addmulti(ifr, &sc->arpcom)
sc 3149 dev/pci/if_bge.c : ether_delmulti(ifr, &sc->arpcom);
sc 3153 dev/pci/if_bge.c bge_iff(sc);
sc 3159 dev/pci/if_bge.c if (sc->bge_flags & BGE_TBI) {
sc 3161 dev/pci/if_bge.c sc->bge_flowflags = 0;
sc 3175 dev/pci/if_bge.c sc->bge_flowflags = ifr->ifr_media & IFM_ETH_FMASK;
sc 3179 dev/pci/if_bge.c if (sc->bge_flags & BGE_TBI) {
sc 3180 dev/pci/if_bge.c error = ifmedia_ioctl(ifp, ifr, &sc->bge_ifmedia,
sc 3183 dev/pci/if_bge.c mii = &sc->bge_mii;
sc 3201 dev/pci/if_bge.c struct bge_softc *sc;
sc 3203 dev/pci/if_bge.c sc = ifp->if_softc;
sc 3205 dev/pci/if_bge.c printf("%s: watchdog timeout -- resetting\n", sc->bge_dev.dv_xname);
sc 3207 dev/pci/if_bge.c bge_init(sc);
sc 3213 dev/pci/if_bge.c bge_stop_block(struct bge_softc *sc, bus_size_t reg, u_int32_t bit)
sc 3217 dev/pci/if_bge.c BGE_CLRBIT(sc, reg, bit);
sc 3220 dev/pci/if_bge.c if ((CSR_READ_4(sc, reg) & bit) == 0)
sc 3226 dev/pci/if_bge.c sc->bge_dev.dv_xname, (u_long) reg, bit));
sc 3234 dev/pci/if_bge.c bge_stop(struct bge_softc *sc)
sc 3236 dev/pci/if_bge.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 3241 dev/pci/if_bge.c timeout_del(&sc->bge_timeout);
sc 3248 dev/pci/if_bge.c bge_stop_block(sc, BGE_RX_MODE, BGE_RXMODE_ENABLE);
sc 3249 dev/pci/if_bge.c bge_stop_block(sc, BGE_RBDI_MODE, BGE_RBDIMODE_ENABLE);
sc 3250 dev/pci/if_bge.c bge_stop_block(sc, BGE_RXLP_MODE, BGE_RXLPMODE_ENABLE);
sc 3251 dev/pci/if_bge.c if (!(BGE_IS_5705_OR_BEYOND(sc)))
sc 3252 dev/pci/if_bge.c bge_stop_block(sc, BGE_RXLS_MODE, BGE_RXLSMODE_ENABLE);
sc 3253 dev/pci/if_bge.c bge_stop_block(sc, BGE_RDBDI_MODE, BGE_RBDIMODE_ENABLE);
sc 3254 dev/pci/if_bge.c bge_stop_block(sc, BGE_RDC_MODE, BGE_RDCMODE_ENABLE);
sc 3255 dev/pci/if_bge.c bge_stop_block(sc, BGE_RBDC_MODE, BGE_RBDCMODE_ENABLE);
sc 3260 dev/pci/if_bge.c bge_stop_block(sc, BGE_SRS_MODE, BGE_SRSMODE_ENABLE);
sc 3261 dev/pci/if_bge.c bge_stop_block(sc, BGE_SBDI_MODE, BGE_SBDIMODE_ENABLE);
sc 3262 dev/pci/if_bge.c bge_stop_block(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE);
sc 3263 dev/pci/if_bge.c bge_stop_block(sc, BGE_RDMA_MODE, BGE_RDMAMODE_ENABLE);
sc 3264 dev/pci/if_bge.c bge_stop_block(sc, BGE_SDC_MODE, BGE_SDCMODE_ENABLE);
sc 3265 dev/pci/if_bge.c if (!(BGE_IS_5705_OR_BEYOND(sc)))
sc 3266 dev/pci/if_bge.c bge_stop_block(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE);
sc 3267 dev/pci/if_bge.c bge_stop_block(sc, BGE_SBDC_MODE, BGE_SBDCMODE_ENABLE);
sc 3273 dev/pci/if_bge.c bge_stop_block(sc, BGE_HCC_MODE, BGE_HCCMODE_ENABLE);
sc 3274 dev/pci/if_bge.c bge_stop_block(sc, BGE_WDMA_MODE, BGE_WDMAMODE_ENABLE);
sc 3275 dev/pci/if_bge.c if (!(BGE_IS_5705_OR_BEYOND(sc)))
sc 3276 dev/pci/if_bge.c bge_stop_block(sc, BGE_MBCF_MODE, BGE_MBCFMODE_ENABLE);
sc 3278 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_FTQ_RESET, 0xFFFFFFFF);
sc 3279 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_FTQ_RESET, 0);
sc 3281 dev/pci/if_bge.c if (!(BGE_IS_5705_OR_BEYOND(sc))) {
sc 3282 dev/pci/if_bge.c bge_stop_block(sc, BGE_BMAN_MODE, BGE_BMANMODE_ENABLE);
sc 3283 dev/pci/if_bge.c bge_stop_block(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE);
sc 3287 dev/pci/if_bge.c BGE_SETBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_MASK_PCI_INTR);
sc 3288 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 1);
sc 3293 dev/pci/if_bge.c BGE_CLRBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP);
sc 3296 dev/pci/if_bge.c bge_free_rx_ring_std(sc);
sc 3299 dev/pci/if_bge.c if (BGE_IS_JUMBO_CAPABLE(sc))
sc 3300 dev/pci/if_bge.c bge_free_rx_ring_jumbo(sc);
sc 3303 dev/pci/if_bge.c bge_free_tx_ring(sc);
sc 3310 dev/pci/if_bge.c if (!(sc->bge_flags & BGE_TBI)) {
sc 3311 dev/pci/if_bge.c mii = &sc->bge_mii;
sc 3322 dev/pci/if_bge.c sc->bge_tx_saved_considx = BGE_TXCONS_UNSET;
sc 3330 dev/pci/if_bge.c sc->bge_link = 0;
sc 3340 dev/pci/if_bge.c struct bge_softc *sc = (struct bge_softc *)xsc;
sc 3342 dev/pci/if_bge.c bge_stop(sc);
sc 3343 dev/pci/if_bge.c bge_reset(sc);
sc 3347 dev/pci/if_bge.c bge_link_upd(struct bge_softc *sc)
sc 3349 dev/pci/if_bge.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 3350 dev/pci/if_bge.c struct mii_data *mii = &sc->bge_mii;
sc 3354 dev/pci/if_bge.c sc->bge_link_evt = 0;
sc 3371 dev/pci/if_bge.c if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700 &&
sc 3372 dev/pci/if_bge.c sc->bge_chipid != BGE_CHIPID_BCM5700_B2) {
sc 3373 dev/pci/if_bge.c status = CSR_READ_4(sc, BGE_MAC_STS);
sc 3375 dev/pci/if_bge.c timeout_del(&sc->bge_timeout);
sc 3376 dev/pci/if_bge.c bge_tick(sc);
sc 3378 dev/pci/if_bge.c if (!sc->bge_link &&
sc 3381 dev/pci/if_bge.c sc->bge_link++;
sc 3382 dev/pci/if_bge.c } else if (sc->bge_link &&
sc 3385 dev/pci/if_bge.c sc->bge_link = 0;
sc 3389 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
sc 3391 dev/pci/if_bge.c bge_miibus_readreg(&sc->bge_dev, 1, BRGPHY_MII_ISR);
sc 3392 dev/pci/if_bge.c bge_miibus_writereg(&sc->bge_dev, 1, BRGPHY_MII_IMR,
sc 3398 dev/pci/if_bge.c if (sc->bge_flags & BGE_TBI) {
sc 3399 dev/pci/if_bge.c status = CSR_READ_4(sc, BGE_MAC_STS);
sc 3401 dev/pci/if_bge.c if (!sc->bge_link) {
sc 3402 dev/pci/if_bge.c sc->bge_link++;
sc 3403 dev/pci/if_bge.c if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5704)
sc 3404 dev/pci/if_bge.c BGE_CLRBIT(sc, BGE_MAC_MODE,
sc 3406 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MAC_STS, 0xFFFFFFFF);
sc 3407 dev/pci/if_bge.c status = CSR_READ_4(sc, BGE_MAC_MODE);
sc 3414 dev/pci/if_bge.c } else if (sc->bge_link) {
sc 3415 dev/pci/if_bge.c sc->bge_link = 0;
sc 3420 dev/pci/if_bge.c } else if (CSR_READ_4(sc, BGE_MI_MODE) & BGE_MIMODE_AUTOPOLL) {
sc 3426 dev/pci/if_bge.c link = (CSR_READ_4(sc, BGE_MI_STS) & BGE_MISTS_LINK) ? 1 : 0;
sc 3428 dev/pci/if_bge.c if (link != sc->bge_link ||
sc 3429 dev/pci/if_bge.c BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700) {
sc 3430 dev/pci/if_bge.c timeout_del(&sc->bge_timeout);
sc 3431 dev/pci/if_bge.c bge_tick(sc);
sc 3433 dev/pci/if_bge.c if (!sc->bge_link &&
sc 3436 dev/pci/if_bge.c sc->bge_link++;
sc 3437 dev/pci/if_bge.c else if (sc->bge_link &&
sc 3440 dev/pci/if_bge.c sc->bge_link = 0;
sc 3445 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED|
sc 3453 dev/pci/if_bge.c struct bge_softc *sc = (struct bge_softc *)xsc;
sc 3457 dev/pci/if_bge.c ifp = &sc->arpcom.ac_if;
sc 1816 dev/pci/if_bgereg.h val = CSR_READ_4(sc, BGE_MEMWIN_START + (x & 0xFFFF)); \
sc 1823 dev/pci/if_bgereg.h CSR_WRITE_4(sc, BGE_MEMWIN_START + (x & 0xFFFF), val); \
sc 1855 dev/pci/if_bgereg.h #define RCB_WRITE_4(sc, rcb, offset, val) \
sc 1856 dev/pci/if_bgereg.h bus_space_write_4(sc->bge_btag, sc->bge_bhandle, \
sc 1859 dev/pci/if_bgereg.h #define RCB_WRITE_2(sc, rcb, offset, val) \
sc 1860 dev/pci/if_bgereg.h bus_space_write_2(sc->bge_btag, sc->bge_bhandle, \
sc 2239 dev/pci/if_bgereg.h #define CSR_WRITE_4(sc, reg, val) \
sc 2240 dev/pci/if_bgereg.h bus_space_write_4(sc->bge_btag, sc->bge_bhandle, reg, val)
sc 2242 dev/pci/if_bgereg.h #define CSR_READ_4(sc, reg) \
sc 2243 dev/pci/if_bgereg.h bus_space_read_4(sc->bge_btag, sc->bge_bhandle, reg)
sc 2245 dev/pci/if_bgereg.h #define BGE_SETBIT(sc, reg, x) \
sc 2246 dev/pci/if_bgereg.h CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) | (x)))
sc 2247 dev/pci/if_bgereg.h #define BGE_CLRBIT(sc, reg, x) \
sc 2248 dev/pci/if_bgereg.h CSR_WRITE_4(sc, reg, (CSR_READ_4(sc, reg) & ~(x)))
sc 2289 dev/pci/if_bgereg.h #define BGE_RING_DMA_ADDR(sc, offset) \
sc 2290 dev/pci/if_bgereg.h ((sc)->bge_ring_map->dm_segs[0].ds_addr + \
sc 2324 dev/pci/if_bgereg.h #define BGE_JUMBO_DMA_ADDR(sc, m) \
sc 2325 dev/pci/if_bgereg.h ((sc)->bge_cdata.bge_rx_jumbo_map->dm_segs[0].ds_addr + \
sc 2326 dev/pci/if_bgereg.h (mtod((m), char *) - (char *)(sc)->bge_cdata.bge_jumbo_buf))
sc 295 dev/pci/if_bnx.c int bnx_read_firmware(struct bnx_softc *sc);
sc 387 dev/pci/if_bnx.c void bnx_mgmt_init(struct bnx_softc *sc);
sc 440 dev/pci/if_bnx.c bnx_read_firmware(struct bnx_softc *sc)
sc 619 dev/pci/if_bnx.c struct bnx_softc *sc = (struct bnx_softc *)self;
sc 626 dev/pci/if_bnx.c sc->bnx_pa = *pa;
sc 636 dev/pci/if_bnx.c memtype, 0, &sc->bnx_btag, &sc->bnx_bhandle,
sc 637 dev/pci/if_bnx.c NULL, &sc->bnx_size, 0) == 0)
sc 644 dev/pci/if_bnx.c if (pci_intr_map(pa, &sc->bnx_ih)) {
sc 648 dev/pci/if_bnx.c intrstr = pci_intr_string(pc, sc->bnx_ih);
sc 661 dev/pci/if_bnx.c sc->bnx_chipid = REG_RD(sc, BNX_MISC_ID);
sc 664 dev/pci/if_bnx.c switch(BNX_CHIP_ID(sc)) {
sc 675 dev/pci/if_bnx.c if (BNX_CHIP_BOND_ID(sc) & BNX_CHIP_BOND_ID_SERDES_BIT) {
sc 685 dev/pci/if_bnx.c val = REG_RD_IND(sc, BNX_SHM_HDR_SIGNATURE);
sc 687 dev/pci/if_bnx.c sc->bnx_shmem_base = REG_RD_IND(sc, BNX_SHM_HDR_ADDR_0);
sc 689 dev/pci/if_bnx.c sc->bnx_shmem_base = HOST_VIEW_SHMEM_BASE;
sc 691 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "bnx_shmem_base = 0x%08X\n", sc->bnx_shmem_base);
sc 694 dev/pci/if_bnx.c sc->bnx_flags = 0;
sc 695 dev/pci/if_bnx.c sc->bnx_phy_flags = 0;
sc 698 dev/pci/if_bnx.c val = REG_RD(sc, BNX_PCICFG_MISC_STATUS);
sc 702 dev/pci/if_bnx.c sc->bnx_flags |= BNX_PCIX_FLAG;
sc 704 dev/pci/if_bnx.c clkreg = REG_RD(sc, BNX_PCICFG_PCI_CLOCK_CONTROL_BITS);
sc 709 dev/pci/if_bnx.c sc->bus_speed_mhz = 133;
sc 713 dev/pci/if_bnx.c sc->bus_speed_mhz = 100;
sc 718 dev/pci/if_bnx.c sc->bus_speed_mhz = 66;
sc 723 dev/pci/if_bnx.c sc->bus_speed_mhz = 50;
sc 729 dev/pci/if_bnx.c sc->bus_speed_mhz = 33;
sc 733 dev/pci/if_bnx.c sc->bus_speed_mhz = 66;
sc 735 dev/pci/if_bnx.c sc->bus_speed_mhz = 33;
sc 738 dev/pci/if_bnx.c sc->bnx_flags |= BNX_PCI_32BIT_FLAG;
sc 743 dev/pci/if_bnx.c sc->bnx_intrhand = pci_intr_establish(pc, sc->bnx_ih, IPL_NET,
sc 744 dev/pci/if_bnx.c bnx_intr, sc, sc->bnx_dev.dv_xname);
sc 745 dev/pci/if_bnx.c if (sc->bnx_intrhand == NULL) {
sc 747 dev/pci/if_bnx.c sc->bnx_dev.dv_xname);
sc 751 dev/pci/if_bnx.c mountroothook_establish(bnx_attachhook, sc);
sc 755 dev/pci/if_bnx.c bnx_release_resources(sc);
sc 756 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 762 dev/pci/if_bnx.c struct bnx_softc *sc = xsc;
sc 763 dev/pci/if_bnx.c struct pci_attach_args *pa = &sc->bnx_pa;
sc 768 dev/pci/if_bnx.c if ((error = bnx_read_firmware(sc)) != 0) {
sc 770 dev/pci/if_bnx.c sc->bnx_dev.dv_xname, error);
sc 775 dev/pci/if_bnx.c if (bnx_reset(sc, BNX_DRV_MSG_CODE_RESET))
sc 779 dev/pci/if_bnx.c if (bnx_chipinit(sc)) {
sc 781 dev/pci/if_bnx.c sc->bnx_dev.dv_xname);
sc 786 dev/pci/if_bnx.c if (bnx_nvram_test(sc)) {
sc 788 dev/pci/if_bnx.c sc->bnx_dev.dv_xname);
sc 793 dev/pci/if_bnx.c bnx_get_mac_addr(sc);
sc 806 dev/pci/if_bnx.c sc->bnx_tx_quick_cons_trip_int = 1;
sc 807 dev/pci/if_bnx.c sc->bnx_tx_quick_cons_trip = 1;
sc 808 dev/pci/if_bnx.c sc->bnx_tx_ticks_int = 0;
sc 809 dev/pci/if_bnx.c sc->bnx_tx_ticks = 0;
sc 811 dev/pci/if_bnx.c sc->bnx_rx_quick_cons_trip_int = 1;
sc 812 dev/pci/if_bnx.c sc->bnx_rx_quick_cons_trip = 1;
sc 813 dev/pci/if_bnx.c sc->bnx_rx_ticks_int = 0;
sc 814 dev/pci/if_bnx.c sc->bnx_rx_ticks = 0;
sc 816 dev/pci/if_bnx.c sc->bnx_tx_quick_cons_trip_int = 20;
sc 817 dev/pci/if_bnx.c sc->bnx_tx_quick_cons_trip = 20;
sc 818 dev/pci/if_bnx.c sc->bnx_tx_ticks_int = 80;
sc 819 dev/pci/if_bnx.c sc->bnx_tx_ticks = 80;
sc 821 dev/pci/if_bnx.c sc->bnx_rx_quick_cons_trip_int = 6;
sc 822 dev/pci/if_bnx.c sc->bnx_rx_quick_cons_trip = 6;
sc 823 dev/pci/if_bnx.c sc->bnx_rx_ticks_int = 18;
sc 824 dev/pci/if_bnx.c sc->bnx_rx_ticks = 18;
sc 828 dev/pci/if_bnx.c sc->bnx_stats_ticks = 1000000 & 0xffff00;
sc 836 dev/pci/if_bnx.c sc->bnx_phy_addr = 1;
sc 838 dev/pci/if_bnx.c if (BNX_CHIP_BOND_ID(sc) & BNX_CHIP_BOND_ID_SERDES_BIT) {
sc 839 dev/pci/if_bnx.c sc->bnx_phy_flags |= BNX_PHY_SERDES_FLAG;
sc 840 dev/pci/if_bnx.c sc->bnx_flags |= BNX_NO_WOL_FLAG;
sc 841 dev/pci/if_bnx.c if (BNX_CHIP_NUM(sc) == BNX_CHIP_NUM_5708) {
sc 842 dev/pci/if_bnx.c sc->bnx_phy_addr = 2;
sc 843 dev/pci/if_bnx.c val = REG_RD_IND(sc, sc->bnx_shmem_base +
sc 846 dev/pci/if_bnx.c sc->bnx_phy_flags |= BNX_PHY_2_5G_CAPABLE_FLAG;
sc 850 dev/pci/if_bnx.c if (sc->bnx_phy_flags & BNX_PHY_SERDES_FLAG) {
sc 856 dev/pci/if_bnx.c sc->bnx_dmatag = pa->pa_dmat;
sc 857 dev/pci/if_bnx.c if (bnx_dma_alloc(sc)) {
sc 859 dev/pci/if_bnx.c sc->bnx_dev.dv_xname);
sc 864 dev/pci/if_bnx.c ifp = &sc->arpcom.ac_if;
sc 865 dev/pci/if_bnx.c ifp->if_softc = sc;
sc 870 dev/pci/if_bnx.c if (sc->bnx_phy_flags & BNX_PHY_2_5G_CAPABLE_FLAG)
sc 876 dev/pci/if_bnx.c bcopy(sc->eaddr, sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 877 dev/pci/if_bnx.c bcopy(sc->bnx_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 889 dev/pci/if_bnx.c sc->mbuf_alloc_size = BNX_MAX_MRU;
sc 891 dev/pci/if_bnx.c printf("%s: address %s\n", sc->bnx_dev.dv_xname,
sc 892 dev/pci/if_bnx.c ether_sprintf(sc->arpcom.ac_enaddr));
sc 894 dev/pci/if_bnx.c sc->bnx_mii.mii_ifp = ifp;
sc 895 dev/pci/if_bnx.c sc->bnx_mii.mii_readreg = bnx_miibus_read_reg;
sc 896 dev/pci/if_bnx.c sc->bnx_mii.mii_writereg = bnx_miibus_write_reg;
sc 897 dev/pci/if_bnx.c sc->bnx_mii.mii_statchg = bnx_miibus_statchg;
sc 900 dev/pci/if_bnx.c ifmedia_init(&sc->bnx_mii.mii_media, 0, bnx_ifmedia_upd,
sc 902 dev/pci/if_bnx.c mii_attach(&sc->bnx_dev, &sc->bnx_mii, 0xffffffff,
sc 905 dev/pci/if_bnx.c if (LIST_FIRST(&sc->bnx_mii.mii_phys) == NULL) {
sc 906 dev/pci/if_bnx.c printf("%s: no PHY found!\n", sc->bnx_dev.dv_xname);
sc 907 dev/pci/if_bnx.c ifmedia_add(&sc->bnx_mii.mii_media,
sc 909 dev/pci/if_bnx.c ifmedia_set(&sc->bnx_mii.mii_media,
sc 912 dev/pci/if_bnx.c ifmedia_set(&sc->bnx_mii.mii_media,
sc 920 dev/pci/if_bnx.c timeout_set(&sc->bnx_timeout, bnx_tick, sc);
sc 923 dev/pci/if_bnx.c DBRUN(BNX_INFO, bnx_dump_driver_state(sc));
sc 926 dev/pci/if_bnx.c bnx_mgmt_init(sc);
sc 929 dev/pci/if_bnx.c sc->bnx_flags |= BNX_ACTIVE_FLAG;
sc 934 dev/pci/if_bnx.c bnx_release_resources(sc);
sc 937 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 952 dev/pci/if_bnx.c struct bnx_softc *sc;
sc 953 dev/pci/if_bnx.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 955 dev/pci/if_bnx.c sc = device_get_softc(dev);
sc 957 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
sc 960 dev/pci/if_bnx.c bnx_stop(sc);
sc 961 dev/pci/if_bnx.c bnx_reset(sc, BNX_DRV_MSG_CODE_RESET);
sc 966 dev/pci/if_bnx.c if (sc->bnx_phy_flags & BNX_PHY_SERDES_FLAG) {
sc 967 dev/pci/if_bnx.c ifmedia_removeall(&sc->bnx_ifmedia);
sc 970 dev/pci/if_bnx.c device_delete_child(dev, sc->bnx_mii);
sc 974 dev/pci/if_bnx.c bnx_release_resources(sc);
sc 976 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 993 dev/pci/if_bnx.c struct bnx_softc *sc = (struct bnx_softc *)xsc;
sc 995 dev/pci/if_bnx.c bnx_stop(sc);
sc 996 dev/pci/if_bnx.c bnx_reset(sc, BNX_DRV_MSG_CODE_RESET);
sc 1010 dev/pci/if_bnx.c bnx_reg_rd_ind(struct bnx_softc *sc, u_int32_t offset)
sc 1012 dev/pci/if_bnx.c struct pci_attach_args *pa = &(sc->bnx_pa);
sc 1021 dev/pci/if_bnx.c DBPRINT(sc, BNX_EXCESSIVE, "%s(); offset = 0x%08X, "
sc 1041 dev/pci/if_bnx.c bnx_reg_wr_ind(struct bnx_softc *sc, u_int32_t offset, u_int32_t val)
sc 1043 dev/pci/if_bnx.c struct pci_attach_args *pa = &(sc->bnx_pa);
sc 1045 dev/pci/if_bnx.c DBPRINT(sc, BNX_EXCESSIVE, "%s(); offset = 0x%08X, val = 0x%08X\n",
sc 1063 dev/pci/if_bnx.c bnx_ctx_wr(struct bnx_softc *sc, u_int32_t cid_addr, u_int32_t offset,
sc 1067 dev/pci/if_bnx.c DBPRINT(sc, BNX_EXCESSIVE, "%s(); cid_addr = 0x%08X, offset = 0x%08X, "
sc 1071 dev/pci/if_bnx.c REG_WR(sc, BNX_CTX_DATA_ADR, offset);
sc 1072 dev/pci/if_bnx.c REG_WR(sc, BNX_CTX_DATA, val);
sc 1086 dev/pci/if_bnx.c struct bnx_softc *sc = (struct bnx_softc *)dev;
sc 1091 dev/pci/if_bnx.c if (phy != sc->bnx_phy_addr) {
sc 1092 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE,
sc 1097 dev/pci/if_bnx.c if (sc->bnx_phy_flags & BNX_PHY_INT_MODE_AUTO_POLLING_FLAG) {
sc 1098 dev/pci/if_bnx.c val = REG_RD(sc, BNX_EMAC_MDIO_MODE);
sc 1101 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_MDIO_MODE, val);
sc 1102 dev/pci/if_bnx.c REG_RD(sc, BNX_EMAC_MDIO_MODE);
sc 1110 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_MDIO_COMM, val);
sc 1115 dev/pci/if_bnx.c val = REG_RD(sc, BNX_EMAC_MDIO_COMM);
sc 1119 dev/pci/if_bnx.c val = REG_RD(sc, BNX_EMAC_MDIO_COMM);
sc 1127 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Error: PHY read timeout! phy = %d, "
sc 1131 dev/pci/if_bnx.c val = REG_RD(sc, BNX_EMAC_MDIO_COMM);
sc 1133 dev/pci/if_bnx.c DBPRINT(sc, BNX_EXCESSIVE,
sc 1137 dev/pci/if_bnx.c if (sc->bnx_phy_flags & BNX_PHY_INT_MODE_AUTO_POLLING_FLAG) {
sc 1138 dev/pci/if_bnx.c val = REG_RD(sc, BNX_EMAC_MDIO_MODE);
sc 1141 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_MDIO_MODE, val);
sc 1142 dev/pci/if_bnx.c REG_RD(sc, BNX_EMAC_MDIO_MODE);
sc 1161 dev/pci/if_bnx.c struct bnx_softc *sc = (struct bnx_softc *)dev;
sc 1166 dev/pci/if_bnx.c if (phy != sc->bnx_phy_addr) {
sc 1167 dev/pci/if_bnx.c DBPRINT(sc, BNX_WARN, "Invalid PHY address %d for PHY write!\n",
sc 1172 dev/pci/if_bnx.c DBPRINT(sc, BNX_EXCESSIVE, "%s(): phy = %d, reg = 0x%04X, "
sc 1176 dev/pci/if_bnx.c if (sc->bnx_phy_flags & BNX_PHY_INT_MODE_AUTO_POLLING_FLAG) {
sc 1177 dev/pci/if_bnx.c val1 = REG_RD(sc, BNX_EMAC_MDIO_MODE);
sc 1180 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_MDIO_MODE, val1);
sc 1181 dev/pci/if_bnx.c REG_RD(sc, BNX_EMAC_MDIO_MODE);
sc 1189 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_MDIO_COMM, val1);
sc 1194 dev/pci/if_bnx.c val1 = REG_RD(sc, BNX_EMAC_MDIO_COMM);
sc 1202 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): PHY write timeout!\n", __FILE__,
sc 1206 dev/pci/if_bnx.c if (sc->bnx_phy_flags & BNX_PHY_INT_MODE_AUTO_POLLING_FLAG) {
sc 1207 dev/pci/if_bnx.c val1 = REG_RD(sc, BNX_EMAC_MDIO_MODE);
sc 1210 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_MDIO_MODE, val1);
sc 1211 dev/pci/if_bnx.c REG_RD(sc, BNX_EMAC_MDIO_MODE);
sc 1229 dev/pci/if_bnx.c struct bnx_softc *sc = (struct bnx_softc *)dev;
sc 1230 dev/pci/if_bnx.c struct mii_data *mii = &sc->bnx_mii;
sc 1232 dev/pci/if_bnx.c BNX_CLRBIT(sc, BNX_EMAC_MODE, BNX_EMAC_MODE_PORT);
sc 1236 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "Setting GMII interface.\n");
sc 1237 dev/pci/if_bnx.c BNX_SETBIT(sc, BNX_EMAC_MODE, BNX_EMAC_MODE_PORT_GMII);
sc 1239 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "Setting MII interface.\n");
sc 1240 dev/pci/if_bnx.c BNX_SETBIT(sc, BNX_EMAC_MODE, BNX_EMAC_MODE_PORT_MII);
sc 1247 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "Setting Full-Duplex interface.\n");
sc 1248 dev/pci/if_bnx.c BNX_CLRBIT(sc, BNX_EMAC_MODE, BNX_EMAC_MODE_HALF_DUPLEX);
sc 1250 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "Setting Half-Duplex interface.\n");
sc 1251 dev/pci/if_bnx.c BNX_SETBIT(sc, BNX_EMAC_MODE, BNX_EMAC_MODE_HALF_DUPLEX);
sc 1266 dev/pci/if_bnx.c bnx_acquire_nvram_lock(struct bnx_softc *sc)
sc 1271 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE, "Acquiring NVRAM lock.\n");
sc 1274 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_SW_ARB, BNX_NVM_SW_ARB_ARB_REQ_SET2);
sc 1276 dev/pci/if_bnx.c val = REG_RD(sc, BNX_NVM_SW_ARB);
sc 1284 dev/pci/if_bnx.c DBPRINT(sc, BNX_WARN, "Timeout acquiring NVRAM lock!\n");
sc 1302 dev/pci/if_bnx.c bnx_release_nvram_lock(struct bnx_softc *sc)
sc 1307 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE, "Releasing NVRAM lock.\n");
sc 1310 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_SW_ARB, BNX_NVM_SW_ARB_ARB_REQ_CLR2);
sc 1313 dev/pci/if_bnx.c val = REG_RD(sc, BNX_NVM_SW_ARB);
sc 1321 dev/pci/if_bnx.c DBPRINT(sc, BNX_WARN, "Timeout reeasing NVRAM lock!\n");
sc 1338 dev/pci/if_bnx.c bnx_enable_nvram_write(struct bnx_softc *sc)
sc 1342 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE, "Enabling NVRAM write.\n");
sc 1344 dev/pci/if_bnx.c val = REG_RD(sc, BNX_MISC_CFG);
sc 1345 dev/pci/if_bnx.c REG_WR(sc, BNX_MISC_CFG, val | BNX_MISC_CFG_NVM_WR_EN_PCI);
sc 1347 dev/pci/if_bnx.c if (!sc->bnx_flash_info->buffered) {
sc 1350 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_COMMAND, BNX_NVM_COMMAND_DONE);
sc 1351 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_COMMAND,
sc 1357 dev/pci/if_bnx.c val = REG_RD(sc, BNX_NVM_COMMAND);
sc 1363 dev/pci/if_bnx.c DBPRINT(sc, BNX_WARN, "Timeout writing NVRAM!\n");
sc 1381 dev/pci/if_bnx.c bnx_disable_nvram_write(struct bnx_softc *sc)
sc 1385 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE, "Disabling NVRAM write.\n");
sc 1387 dev/pci/if_bnx.c val = REG_RD(sc, BNX_MISC_CFG);
sc 1388 dev/pci/if_bnx.c REG_WR(sc, BNX_MISC_CFG, val & ~BNX_MISC_CFG_NVM_WR_EN);
sc 1402 dev/pci/if_bnx.c bnx_enable_nvram_access(struct bnx_softc *sc)
sc 1406 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE, "Enabling NVRAM access.\n");
sc 1408 dev/pci/if_bnx.c val = REG_RD(sc, BNX_NVM_ACCESS_ENABLE);
sc 1410 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_ACCESS_ENABLE,
sc 1423 dev/pci/if_bnx.c bnx_disable_nvram_access(struct bnx_softc *sc)
sc 1427 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE, "Disabling NVRAM access.\n");
sc 1429 dev/pci/if_bnx.c val = REG_RD(sc, BNX_NVM_ACCESS_ENABLE);
sc 1432 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_ACCESS_ENABLE,
sc 1447 dev/pci/if_bnx.c bnx_nvram_erase_page(struct bnx_softc *sc, u_int32_t offset)
sc 1453 dev/pci/if_bnx.c if (sc->bnx_flash_info->buffered)
sc 1456 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE, "Erasing NVRAM page.\n");
sc 1466 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_COMMAND, BNX_NVM_COMMAND_DONE);
sc 1467 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_ADDR, offset & BNX_NVM_ADDR_NVM_ADDR_VALUE);
sc 1468 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_COMMAND, cmd);
sc 1476 dev/pci/if_bnx.c val = REG_RD(sc, BNX_NVM_COMMAND);
sc 1482 dev/pci/if_bnx.c DBPRINT(sc, BNX_WARN, "Timeout erasing NVRAM.\n");
sc 1500 dev/pci/if_bnx.c bnx_nvram_read_dword(struct bnx_softc *sc, u_int32_t offset,
sc 1510 dev/pci/if_bnx.c if (sc->bnx_flash_info->buffered)
sc 1511 dev/pci/if_bnx.c offset = ((offset / sc->bnx_flash_info->page_size) <<
sc 1512 dev/pci/if_bnx.c sc->bnx_flash_info->page_bits) +
sc 1513 dev/pci/if_bnx.c (offset % sc->bnx_flash_info->page_size);
sc 1519 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_COMMAND, BNX_NVM_COMMAND_DONE);
sc 1520 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_ADDR, offset & BNX_NVM_ADDR_NVM_ADDR_VALUE);
sc 1521 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_COMMAND, cmd);
sc 1529 dev/pci/if_bnx.c val = REG_RD(sc, BNX_NVM_COMMAND);
sc 1531 dev/pci/if_bnx.c val = REG_RD(sc, BNX_NVM_READ);
sc 1541 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Timeout error reading NVRAM at "
sc 1561 dev/pci/if_bnx.c bnx_nvram_write_dword(struct bnx_softc *sc, u_int32_t offset, u_int8_t *val,
sc 1571 dev/pci/if_bnx.c if (sc->bnx_flash_info->buffered)
sc 1572 dev/pci/if_bnx.c offset = ((offset / sc->bnx_flash_info->page_size) <<
sc 1573 dev/pci/if_bnx.c sc->bnx_flash_info->page_bits) +
sc 1574 dev/pci/if_bnx.c (offset % sc->bnx_flash_info->page_size);
sc 1580 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_COMMAND, BNX_NVM_COMMAND_DONE);
sc 1583 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_WRITE, val32);
sc 1584 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_ADDR, offset & BNX_NVM_ADDR_NVM_ADDR_VALUE);
sc 1585 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_COMMAND, cmd);
sc 1591 dev/pci/if_bnx.c if (REG_RD(sc, BNX_NVM_COMMAND) & BNX_NVM_COMMAND_DONE)
sc 1595 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Timeout error writing NVRAM at "
sc 1614 dev/pci/if_bnx.c bnx_init_nvram(struct bnx_softc *sc)
sc 1620 dev/pci/if_bnx.c DBPRINT(sc,BNX_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
sc 1623 dev/pci/if_bnx.c val = REG_RD(sc, BNX_NVM_CFG1);
sc 1639 dev/pci/if_bnx.c DBPRINT(sc,BNX_INFO_LOAD,
sc 1646 dev/pci/if_bnx.c sc->bnx_flash_info = flash;
sc 1654 dev/pci/if_bnx.c DBPRINT(sc,BNX_INFO_LOAD,
sc 1668 dev/pci/if_bnx.c sc->bnx_flash_info = flash;
sc 1671 dev/pci/if_bnx.c if ((rc = bnx_acquire_nvram_lock(sc)) != 0)
sc 1675 dev/pci/if_bnx.c bnx_enable_nvram_access(sc);
sc 1676 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_CFG1, flash->config1);
sc 1677 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_CFG2, flash->config2);
sc 1678 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_CFG3, flash->config3);
sc 1679 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_WRITE1, flash->write1);
sc 1680 dev/pci/if_bnx.c bnx_disable_nvram_access(sc);
sc 1681 dev/pci/if_bnx.c bnx_release_nvram_lock(sc);
sc 1690 dev/pci/if_bnx.c sc->bnx_flash_info = NULL;
sc 1691 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Unknown Flash NVRAM found!\n",
sc 1697 dev/pci/if_bnx.c val = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_SHARED_HW_CFG_CONFIG2);
sc 1700 dev/pci/if_bnx.c sc->bnx_flash_size = val;
sc 1702 dev/pci/if_bnx.c sc->bnx_flash_size = sc->bnx_flash_info->total_size;
sc 1704 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO_LOAD, "bnx_init_nvram() flash->total_size = "
sc 1705 dev/pci/if_bnx.c "0x%08X\n", sc->bnx_flash_info->total_size);
sc 1707 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 1722 dev/pci/if_bnx.c bnx_nvram_read(struct bnx_softc *sc, u_int32_t offset, u_int8_t *ret_buf,
sc 1732 dev/pci/if_bnx.c if ((rc = bnx_acquire_nvram_lock(sc)) != 0)
sc 1736 dev/pci/if_bnx.c bnx_enable_nvram_access(sc);
sc 1758 dev/pci/if_bnx.c rc = bnx_nvram_read_dword(sc, offset32, buf, cmd_flags);
sc 1784 dev/pci/if_bnx.c rc = bnx_nvram_read_dword(sc, offset32, buf, cmd_flags);
sc 1796 dev/pci/if_bnx.c rc = bnx_nvram_read_dword(sc, offset32, ret_buf, cmd_flags);
sc 1804 dev/pci/if_bnx.c rc = bnx_nvram_read_dword(sc, offset32, ret_buf, 0);
sc 1816 dev/pci/if_bnx.c rc = bnx_nvram_read_dword(sc, offset32, buf, cmd_flags);
sc 1822 dev/pci/if_bnx.c bnx_disable_nvram_access(sc);
sc 1823 dev/pci/if_bnx.c bnx_release_nvram_lock(sc);
sc 1840 dev/pci/if_bnx.c bnx_nvram_write(struct bnx_softc *sc, u_int32_t offset, u_int8_t *data_buf,
sc 1856 dev/pci/if_bnx.c if ((rc = bnx_nvram_read(sc, offset32, start, 4)))
sc 1864 dev/pci/if_bnx.c if ((rc = bnx_nvram_read(sc, offset32 + len32 - 4,
sc 1894 dev/pci/if_bnx.c page_start -= (page_start % sc->bnx_flash_info->page_size);
sc 1896 dev/pci/if_bnx.c page_end = page_start + sc->bnx_flash_info->page_size;
sc 1904 dev/pci/if_bnx.c if ((rc = bnx_acquire_nvram_lock(sc)) != 0)
sc 1908 dev/pci/if_bnx.c bnx_enable_nvram_access(sc);
sc 1911 dev/pci/if_bnx.c if (sc->bnx_flash_info->buffered == 0) {
sc 1916 dev/pci/if_bnx.c for (j = 0; j < sc->bnx_flash_info->page_size; j += 4) {
sc 1917 dev/pci/if_bnx.c if (j == (sc->bnx_flash_info->page_size - 4))
sc 1920 dev/pci/if_bnx.c rc = bnx_nvram_read_dword(sc,
sc 1933 dev/pci/if_bnx.c if ((rc = bnx_enable_nvram_write(sc)) != 0)
sc 1937 dev/pci/if_bnx.c if ((rc = bnx_nvram_erase_page(sc, page_start)) != 0)
sc 1941 dev/pci/if_bnx.c bnx_enable_nvram_write(sc);
sc 1946 dev/pci/if_bnx.c if (sc->bnx_flash_info->buffered == 0) {
sc 1950 dev/pci/if_bnx.c rc = bnx_nvram_write_dword(sc, addr,
sc 1963 dev/pci/if_bnx.c ((sc->bnx_flash_info->buffered) &&
sc 1969 dev/pci/if_bnx.c rc = bnx_nvram_write_dword(sc, addr, buf, cmd_flags);
sc 1980 dev/pci/if_bnx.c if (sc->bnx_flash_info->buffered == 0) {
sc 1987 dev/pci/if_bnx.c rc = bnx_nvram_write_dword(sc, addr,
sc 1998 dev/pci/if_bnx.c bnx_disable_nvram_write(sc);
sc 2001 dev/pci/if_bnx.c bnx_disable_nvram_access(sc);
sc 2002 dev/pci/if_bnx.c bnx_release_nvram_lock(sc);
sc 2026 dev/pci/if_bnx.c bnx_nvram_test(struct bnx_softc *sc)
sc 2037 dev/pci/if_bnx.c if ((rc = bnx_nvram_read(sc, 0, data, 4)) != 0)
sc 2043 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Invalid NVRAM magic value! "
sc 2053 dev/pci/if_bnx.c if ((rc = bnx_nvram_read(sc, 0x100, data, BNX_NVRAM_SIZE)) != 0)
sc 2059 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Invalid Manufacturing Information "
sc 2067 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Invalid Feature Configuration "
sc 2087 dev/pci/if_bnx.c bnx_dma_free(struct bnx_softc *sc)
sc 2091 dev/pci/if_bnx.c DBPRINT(sc,BNX_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
sc 2094 dev/pci/if_bnx.c if (sc->status_block != NULL && sc->status_map != NULL) {
sc 2095 dev/pci/if_bnx.c bus_dmamap_unload(sc->bnx_dmatag, sc->status_map);
sc 2096 dev/pci/if_bnx.c bus_dmamem_unmap(sc->bnx_dmatag, (caddr_t)sc->status_block,
sc 2098 dev/pci/if_bnx.c bus_dmamem_free(sc->bnx_dmatag, &sc->status_seg,
sc 2099 dev/pci/if_bnx.c sc->status_rseg);
sc 2100 dev/pci/if_bnx.c bus_dmamap_destroy(sc->bnx_dmatag, sc->status_map);
sc 2101 dev/pci/if_bnx.c sc->status_block = NULL;
sc 2102 dev/pci/if_bnx.c sc->status_map = NULL;
sc 2106 dev/pci/if_bnx.c if (sc->stats_block != NULL && sc->stats_map != NULL) {
sc 2107 dev/pci/if_bnx.c bus_dmamap_unload(sc->bnx_dmatag, sc->stats_map);
sc 2108 dev/pci/if_bnx.c bus_dmamem_unmap(sc->bnx_dmatag, (caddr_t)sc->stats_block,
sc 2110 dev/pci/if_bnx.c bus_dmamem_free(sc->bnx_dmatag, &sc->stats_seg,
sc 2111 dev/pci/if_bnx.c sc->stats_rseg);
sc 2112 dev/pci/if_bnx.c bus_dmamap_destroy(sc->bnx_dmatag, sc->stats_map);
sc 2113 dev/pci/if_bnx.c sc->stats_block = NULL;
sc 2114 dev/pci/if_bnx.c sc->stats_map = NULL;
sc 2119 dev/pci/if_bnx.c if (sc->tx_bd_chain[i] != NULL &&
sc 2120 dev/pci/if_bnx.c sc->tx_bd_chain_map[i] != NULL) {
sc 2121 dev/pci/if_bnx.c bus_dmamap_unload(sc->bnx_dmatag,
sc 2122 dev/pci/if_bnx.c sc->tx_bd_chain_map[i]);
sc 2123 dev/pci/if_bnx.c bus_dmamem_unmap(sc->bnx_dmatag,
sc 2124 dev/pci/if_bnx.c (caddr_t)sc->tx_bd_chain[i], BNX_TX_CHAIN_PAGE_SZ);
sc 2125 dev/pci/if_bnx.c bus_dmamem_free(sc->bnx_dmatag, &sc->tx_bd_chain_seg[i],
sc 2126 dev/pci/if_bnx.c sc->tx_bd_chain_rseg[i]);
sc 2127 dev/pci/if_bnx.c bus_dmamap_destroy(sc->bnx_dmatag,
sc 2128 dev/pci/if_bnx.c sc->tx_bd_chain_map[i]);
sc 2129 dev/pci/if_bnx.c sc->tx_bd_chain[i] = NULL;
sc 2130 dev/pci/if_bnx.c sc->tx_bd_chain_map[i] = NULL;
sc 2136 dev/pci/if_bnx.c if (sc->tx_mbuf_map[i] != NULL) {
sc 2137 dev/pci/if_bnx.c bus_dmamap_unload(sc->bnx_dmatag, sc->tx_mbuf_map[i]);
sc 2138 dev/pci/if_bnx.c bus_dmamap_destroy(sc->bnx_dmatag, sc->tx_mbuf_map[i]);
sc 2144 dev/pci/if_bnx.c if (sc->rx_bd_chain[i] != NULL &&
sc 2145 dev/pci/if_bnx.c sc->rx_bd_chain_map[i] != NULL) {
sc 2146 dev/pci/if_bnx.c bus_dmamap_unload(sc->bnx_dmatag,
sc 2147 dev/pci/if_bnx.c sc->rx_bd_chain_map[i]);
sc 2148 dev/pci/if_bnx.c bus_dmamem_unmap(sc->bnx_dmatag,
sc 2149 dev/pci/if_bnx.c (caddr_t)sc->rx_bd_chain[i], BNX_RX_CHAIN_PAGE_SZ);
sc 2150 dev/pci/if_bnx.c bus_dmamem_free(sc->bnx_dmatag, &sc->rx_bd_chain_seg[i],
sc 2151 dev/pci/if_bnx.c sc->rx_bd_chain_rseg[i]);
sc 2153 dev/pci/if_bnx.c bus_dmamap_destroy(sc->bnx_dmatag,
sc 2154 dev/pci/if_bnx.c sc->rx_bd_chain_map[i]);
sc 2155 dev/pci/if_bnx.c sc->rx_bd_chain[i] = NULL;
sc 2156 dev/pci/if_bnx.c sc->rx_bd_chain_map[i] = NULL;
sc 2162 dev/pci/if_bnx.c if (sc->rx_mbuf_map[i] != NULL) {
sc 2163 dev/pci/if_bnx.c bus_dmamap_unload(sc->bnx_dmatag, sc->rx_mbuf_map[i]);
sc 2164 dev/pci/if_bnx.c bus_dmamap_destroy(sc->bnx_dmatag, sc->rx_mbuf_map[i]);
sc 2168 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 2181 dev/pci/if_bnx.c bnx_dma_alloc(struct bnx_softc *sc)
sc 2185 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
sc 2191 dev/pci/if_bnx.c if (bus_dmamap_create(sc->bnx_dmatag, BNX_STATUS_BLK_SZ, 1,
sc 2192 dev/pci/if_bnx.c BNX_STATUS_BLK_SZ, 0, BUS_DMA_NOWAIT, &sc->status_map)) {
sc 2198 dev/pci/if_bnx.c if (bus_dmamem_alloc(sc->bnx_dmatag, BNX_STATUS_BLK_SZ,
sc 2199 dev/pci/if_bnx.c BNX_DMA_ALIGN, BNX_DMA_BOUNDARY, &sc->status_seg, 1,
sc 2200 dev/pci/if_bnx.c &sc->status_rseg, BUS_DMA_NOWAIT)) {
sc 2206 dev/pci/if_bnx.c if (bus_dmamem_map(sc->bnx_dmatag, &sc->status_seg, sc->status_rseg,
sc 2207 dev/pci/if_bnx.c BNX_STATUS_BLK_SZ, (caddr_t *)&sc->status_block, BUS_DMA_NOWAIT)) {
sc 2213 dev/pci/if_bnx.c if (bus_dmamap_load(sc->bnx_dmatag, sc->status_map,
sc 2214 dev/pci/if_bnx.c sc->status_block, BNX_STATUS_BLK_SZ, NULL, BUS_DMA_NOWAIT)) {
sc 2220 dev/pci/if_bnx.c sc->status_block_paddr = sc->status_map->dm_segs[0].ds_addr;
sc 2221 dev/pci/if_bnx.c bzero(sc->status_block, BNX_STATUS_BLK_SZ);
sc 2224 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "status_block_paddr = 0x%08X\n",
sc 2225 dev/pci/if_bnx.c (u_int32_t) sc->status_block_paddr);
sc 2231 dev/pci/if_bnx.c if (bus_dmamap_create(sc->bnx_dmatag, BNX_STATS_BLK_SZ, 1,
sc 2232 dev/pci/if_bnx.c BNX_STATS_BLK_SZ, 0, BUS_DMA_NOWAIT, &sc->stats_map)) {
sc 2238 dev/pci/if_bnx.c if (bus_dmamem_alloc(sc->bnx_dmatag, BNX_STATS_BLK_SZ,
sc 2239 dev/pci/if_bnx.c BNX_DMA_ALIGN, BNX_DMA_BOUNDARY, &sc->stats_seg, 1,
sc 2240 dev/pci/if_bnx.c &sc->stats_rseg, BUS_DMA_NOWAIT)) {
sc 2246 dev/pci/if_bnx.c if (bus_dmamem_map(sc->bnx_dmatag, &sc->stats_seg, sc->stats_rseg,
sc 2247 dev/pci/if_bnx.c BNX_STATS_BLK_SZ, (caddr_t *)&sc->stats_block, BUS_DMA_NOWAIT)) {
sc 2253 dev/pci/if_bnx.c if (bus_dmamap_load(sc->bnx_dmatag, sc->stats_map,
sc 2254 dev/pci/if_bnx.c sc->stats_block, BNX_STATS_BLK_SZ, NULL, BUS_DMA_NOWAIT)) {
sc 2260 dev/pci/if_bnx.c sc->stats_block_paddr = sc->stats_map->dm_segs[0].ds_addr;
sc 2261 dev/pci/if_bnx.c bzero(sc->stats_block, BNX_STATS_BLK_SZ);
sc 2264 dev/pci/if_bnx.c DBPRINT(sc,BNX_INFO, "stats_block_paddr = 0x%08X\n",
sc 2265 dev/pci/if_bnx.c (u_int32_t) sc->stats_block_paddr);
sc 2272 dev/pci/if_bnx.c if (bus_dmamap_create(sc->bnx_dmatag, BNX_TX_CHAIN_PAGE_SZ, 1,
sc 2274 dev/pci/if_bnx.c &sc->tx_bd_chain_map[i])) {
sc 2280 dev/pci/if_bnx.c if (bus_dmamem_alloc(sc->bnx_dmatag, BNX_TX_CHAIN_PAGE_SZ,
sc 2281 dev/pci/if_bnx.c BCM_PAGE_SIZE, BNX_DMA_BOUNDARY, &sc->tx_bd_chain_seg[i], 1,
sc 2282 dev/pci/if_bnx.c &sc->tx_bd_chain_rseg[i], BUS_DMA_NOWAIT)) {
sc 2289 dev/pci/if_bnx.c if (bus_dmamem_map(sc->bnx_dmatag, &sc->tx_bd_chain_seg[i],
sc 2290 dev/pci/if_bnx.c sc->tx_bd_chain_rseg[i], BNX_TX_CHAIN_PAGE_SZ,
sc 2291 dev/pci/if_bnx.c (caddr_t *)&sc->tx_bd_chain[i], BUS_DMA_NOWAIT)) {
sc 2297 dev/pci/if_bnx.c if (bus_dmamap_load(sc->bnx_dmatag, sc->tx_bd_chain_map[i],
sc 2298 dev/pci/if_bnx.c (caddr_t)sc->tx_bd_chain[i], BNX_TX_CHAIN_PAGE_SZ, NULL,
sc 2305 dev/pci/if_bnx.c sc->tx_bd_chain_paddr[i] =
sc 2306 dev/pci/if_bnx.c sc->tx_bd_chain_map[i]->dm_segs[0].ds_addr;
sc 2309 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "tx_bd_chain_paddr[%d] = 0x%08X\n",
sc 2310 dev/pci/if_bnx.c i, (u_int32_t) sc->tx_bd_chain_paddr[i]);
sc 2317 dev/pci/if_bnx.c if (bus_dmamap_create(sc->bnx_dmatag,
sc 2321 dev/pci/if_bnx.c &sc->tx_mbuf_map[i])) {
sc 2333 dev/pci/if_bnx.c if (bus_dmamap_create(sc->bnx_dmatag, BNX_RX_CHAIN_PAGE_SZ, 1,
sc 2335 dev/pci/if_bnx.c &sc->rx_bd_chain_map[i])) {
sc 2341 dev/pci/if_bnx.c if (bus_dmamem_alloc(sc->bnx_dmatag, BNX_RX_CHAIN_PAGE_SZ,
sc 2342 dev/pci/if_bnx.c BCM_PAGE_SIZE, BNX_DMA_BOUNDARY, &sc->rx_bd_chain_seg[i], 1,
sc 2343 dev/pci/if_bnx.c &sc->rx_bd_chain_rseg[i], BUS_DMA_NOWAIT)) {
sc 2350 dev/pci/if_bnx.c if (bus_dmamem_map(sc->bnx_dmatag, &sc->rx_bd_chain_seg[i],
sc 2351 dev/pci/if_bnx.c sc->rx_bd_chain_rseg[i], BNX_RX_CHAIN_PAGE_SZ,
sc 2352 dev/pci/if_bnx.c (caddr_t *)&sc->rx_bd_chain[i], BUS_DMA_NOWAIT)) {
sc 2358 dev/pci/if_bnx.c if (bus_dmamap_load(sc->bnx_dmatag, sc->rx_bd_chain_map[i],
sc 2359 dev/pci/if_bnx.c (caddr_t)sc->rx_bd_chain[i], BNX_RX_CHAIN_PAGE_SZ, NULL,
sc 2366 dev/pci/if_bnx.c bzero(sc->rx_bd_chain[i], BNX_RX_CHAIN_PAGE_SZ);
sc 2367 dev/pci/if_bnx.c sc->rx_bd_chain_paddr[i] =
sc 2368 dev/pci/if_bnx.c sc->rx_bd_chain_map[i]->dm_segs[0].ds_addr;
sc 2371 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "rx_bd_chain_paddr[%d] = 0x%08X\n",
sc 2372 dev/pci/if_bnx.c i, (u_int32_t) sc->rx_bd_chain_paddr[i]);
sc 2379 dev/pci/if_bnx.c if (bus_dmamap_create(sc->bnx_dmatag, BNX_MAX_MRU,
sc 2381 dev/pci/if_bnx.c &sc->rx_mbuf_map[i])) {
sc 2389 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 2404 dev/pci/if_bnx.c bnx_release_resources(struct bnx_softc *sc)
sc 2406 dev/pci/if_bnx.c struct pci_attach_args *pa = &(sc->bnx_pa);
sc 2408 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
sc 2410 dev/pci/if_bnx.c bnx_dma_free(sc);
sc 2412 dev/pci/if_bnx.c if (sc->bnx_intrhand != NULL)
sc 2413 dev/pci/if_bnx.c pci_intr_disestablish(pa->pa_pc, sc->bnx_intrhand);
sc 2415 dev/pci/if_bnx.c if (sc->bnx_size)
sc 2416 dev/pci/if_bnx.c bus_space_unmap(sc->bnx_btag, sc->bnx_bhandle, sc->bnx_size);
sc 2418 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 2431 dev/pci/if_bnx.c bnx_fw_sync(struct bnx_softc *sc, u_int32_t msg_data)
sc 2437 dev/pci/if_bnx.c if (sc->bnx_fw_timed_out) {
sc 2443 dev/pci/if_bnx.c sc->bnx_fw_wr_seq++;
sc 2444 dev/pci/if_bnx.c msg_data |= sc->bnx_fw_wr_seq;
sc 2446 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE, "bnx_fw_sync(): msg_data = 0x%08X\n",
sc 2450 dev/pci/if_bnx.c REG_WR_IND(sc, sc->bnx_shmem_base + BNX_DRV_MB, msg_data);
sc 2455 dev/pci/if_bnx.c val = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_FW_MB);
sc 2464 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Firmware synchronization timeout! "
sc 2470 dev/pci/if_bnx.c REG_WR_IND(sc, sc->bnx_shmem_base + BNX_DRV_MB, msg_data);
sc 2472 dev/pci/if_bnx.c sc->bnx_fw_timed_out = 1;
sc 2487 dev/pci/if_bnx.c bnx_load_rv2p_fw(struct bnx_softc *sc, u_int32_t *rv2p_code,
sc 2494 dev/pci/if_bnx.c REG_WR(sc, BNX_RV2P_INSTR_HIGH, *rv2p_code);
sc 2496 dev/pci/if_bnx.c REG_WR(sc, BNX_RV2P_INSTR_LOW, *rv2p_code);
sc 2501 dev/pci/if_bnx.c REG_WR(sc, BNX_RV2P_PROC1_ADDR_CMD, val);
sc 2505 dev/pci/if_bnx.c REG_WR(sc, BNX_RV2P_PROC2_ADDR_CMD, val);
sc 2511 dev/pci/if_bnx.c REG_WR(sc, BNX_RV2P_COMMAND, BNX_RV2P_COMMAND_PROC1_RESET);
sc 2513 dev/pci/if_bnx.c REG_WR(sc, BNX_RV2P_COMMAND, BNX_RV2P_COMMAND_PROC2_RESET);
sc 2526 dev/pci/if_bnx.c bnx_load_cpu_fw(struct bnx_softc *sc, struct cpu_reg *cpu_reg,
sc 2533 dev/pci/if_bnx.c val = REG_RD_IND(sc, cpu_reg->mode);
sc 2535 dev/pci/if_bnx.c REG_WR_IND(sc, cpu_reg->mode, val);
sc 2536 dev/pci/if_bnx.c REG_WR_IND(sc, cpu_reg->state, cpu_reg->state_value_clear);
sc 2544 dev/pci/if_bnx.c REG_WR_IND(sc, offset, fw->text[j]);
sc 2553 dev/pci/if_bnx.c REG_WR_IND(sc, offset, fw->data[j]);
sc 2562 dev/pci/if_bnx.c REG_WR_IND(sc, offset, fw->sbss[j]);
sc 2571 dev/pci/if_bnx.c REG_WR_IND(sc, offset, fw->bss[j]);
sc 2581 dev/pci/if_bnx.c REG_WR_IND(sc, offset, fw->rodata[j]);
sc 2585 dev/pci/if_bnx.c REG_WR_IND(sc, cpu_reg->inst, 0);
sc 2586 dev/pci/if_bnx.c REG_WR_IND(sc, cpu_reg->pc, fw->start_addr);
sc 2589 dev/pci/if_bnx.c val = REG_RD_IND(sc, cpu_reg->mode);
sc 2591 dev/pci/if_bnx.c REG_WR_IND(sc, cpu_reg->state, cpu_reg->state_value_clear);
sc 2592 dev/pci/if_bnx.c REG_WR_IND(sc, cpu_reg->mode, val);
sc 2604 dev/pci/if_bnx.c bnx_init_cpus(struct bnx_softc *sc)
sc 2610 dev/pci/if_bnx.c bnx_load_rv2p_fw(sc, bnx_rv2p_proc1, bnx_rv2p_proc1len,
sc 2612 dev/pci/if_bnx.c bnx_load_rv2p_fw(sc, bnx_rv2p_proc2, bnx_rv2p_proc2len,
sc 2659 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO_RESET, "Loading RX firmware.\n");
sc 2660 dev/pci/if_bnx.c bnx_load_cpu_fw(sc, &cpu_reg, &fw);
sc 2706 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO_RESET, "Loading TX firmware.\n");
sc 2707 dev/pci/if_bnx.c bnx_load_cpu_fw(sc, &cpu_reg, &fw);
sc 2753 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO_RESET, "Loading TPAT firmware.\n");
sc 2754 dev/pci/if_bnx.c bnx_load_cpu_fw(sc, &cpu_reg, &fw);
sc 2800 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO_RESET, "Loading COM firmware.\n");
sc 2801 dev/pci/if_bnx.c bnx_load_cpu_fw(sc, &cpu_reg, &fw);
sc 2813 dev/pci/if_bnx.c bnx_init_context(struct bnx_softc *sc)
sc 2826 dev/pci/if_bnx.c REG_WR(sc, BNX_CTX_VIRT_ADDR, 0x00);
sc 2827 dev/pci/if_bnx.c REG_WR(sc, BNX_CTX_PAGE_TBL, pcid_addr);
sc 2831 dev/pci/if_bnx.c CTX_WR(sc, 0x00, offset, 0);
sc 2833 dev/pci/if_bnx.c REG_WR(sc, BNX_CTX_VIRT_ADDR, vcid_addr);
sc 2834 dev/pci/if_bnx.c REG_WR(sc, BNX_CTX_PAGE_TBL, pcid_addr);
sc 2845 dev/pci/if_bnx.c bnx_get_mac_addr(struct bnx_softc *sc)
sc 2858 dev/pci/if_bnx.c mac_hi = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_PORT_HW_CFG_MAC_UPPER);
sc 2859 dev/pci/if_bnx.c mac_lo = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_PORT_HW_CFG_MAC_LOWER);
sc 2862 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Invalid Ethernet address!\n",
sc 2865 dev/pci/if_bnx.c sc->eaddr[0] = (u_char)(mac_hi >> 8);
sc 2866 dev/pci/if_bnx.c sc->eaddr[1] = (u_char)(mac_hi >> 0);
sc 2867 dev/pci/if_bnx.c sc->eaddr[2] = (u_char)(mac_lo >> 24);
sc 2868 dev/pci/if_bnx.c sc->eaddr[3] = (u_char)(mac_lo >> 16);
sc 2869 dev/pci/if_bnx.c sc->eaddr[4] = (u_char)(mac_lo >> 8);
sc 2870 dev/pci/if_bnx.c sc->eaddr[5] = (u_char)(mac_lo >> 0);
sc 2873 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "Permanent Ethernet address = "
sc 2874 dev/pci/if_bnx.c "%6D\n", sc->eaddr, ":");
sc 2884 dev/pci/if_bnx.c bnx_set_mac_addr(struct bnx_softc *sc)
sc 2887 dev/pci/if_bnx.c u_int8_t *mac_addr = sc->eaddr;
sc 2889 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "Setting Ethernet address = "
sc 2890 dev/pci/if_bnx.c "%6D\n", sc->eaddr, ":");
sc 2894 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_MAC_MATCH0, val);
sc 2899 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_MAC_MATCH1, val);
sc 2909 dev/pci/if_bnx.c bnx_stop(struct bnx_softc *sc)
sc 2911 dev/pci/if_bnx.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 2914 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
sc 2916 dev/pci/if_bnx.c mii = &sc->bnx_mii;
sc 2918 dev/pci/if_bnx.c timeout_del(&sc->bnx_timeout);
sc 2923 dev/pci/if_bnx.c REG_WR(sc, BNX_MISC_ENABLE_CLR_BITS, 0x5ffffff);
sc 2924 dev/pci/if_bnx.c REG_RD(sc, BNX_MISC_ENABLE_CLR_BITS);
sc 2927 dev/pci/if_bnx.c bnx_disable_intr(sc);
sc 2930 dev/pci/if_bnx.c bnx_reset(sc, BNX_DRV_MSG_CODE_SUSPEND_NO_WOL);
sc 2933 dev/pci/if_bnx.c bnx_free_rx_chain(sc);
sc 2936 dev/pci/if_bnx.c bnx_free_tx_chain(sc);
sc 2940 dev/pci/if_bnx.c sc->bnx_link = 0;
sc 2942 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 2944 dev/pci/if_bnx.c bnx_mgmt_init(sc);
sc 2948 dev/pci/if_bnx.c bnx_reset(struct bnx_softc *sc, u_int32_t reset_code)
sc 2953 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
sc 2956 dev/pci/if_bnx.c REG_WR(sc, BNX_MISC_ENABLE_CLR_BITS,
sc 2961 dev/pci/if_bnx.c val = REG_RD(sc, BNX_MISC_ENABLE_CLR_BITS);
sc 2965 dev/pci/if_bnx.c sc->bnx_fw_timed_out = 0;
sc 2968 dev/pci/if_bnx.c rc = bnx_fw_sync(sc, BNX_DRV_MSG_DATA_WAIT0 | reset_code);
sc 2973 dev/pci/if_bnx.c REG_WR_IND(sc, sc->bnx_shmem_base + BNX_DRV_RESET_SIGNATURE,
sc 2977 dev/pci/if_bnx.c val = REG_RD(sc, BNX_MISC_ID);
sc 2983 dev/pci/if_bnx.c REG_WR(sc, BNX_PCICFG_MISC_CONFIG, val);
sc 2987 dev/pci/if_bnx.c val = REG_RD(sc, BNX_PCICFG_MISC_CONFIG);
sc 2998 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Reset failed!\n", __FILE__, __LINE__);
sc 3004 dev/pci/if_bnx.c val = REG_RD(sc, BNX_PCI_SWAP_DIAG0);
sc 3006 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Byte swap is incorrect!\n",
sc 3013 dev/pci/if_bnx.c sc->bnx_fw_timed_out = 0;
sc 3016 dev/pci/if_bnx.c rc = bnx_fw_sync(sc, BNX_DRV_MSG_DATA_WAIT1 | reset_code);
sc 3018 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Firmware did not complete "
sc 3022 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 3028 dev/pci/if_bnx.c bnx_chipinit(struct bnx_softc *sc)
sc 3030 dev/pci/if_bnx.c struct pci_attach_args *pa = &(sc->bnx_pa);
sc 3034 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
sc 3037 dev/pci/if_bnx.c REG_WR(sc, BNX_PCICFG_INT_ACK_CMD, BNX_PCICFG_INT_ACK_CMD_MASK_INT);
sc 3052 dev/pci/if_bnx.c if ((sc->bnx_flags & BNX_PCIX_FLAG) && (sc->bus_speed_mhz == 133))
sc 3060 dev/pci/if_bnx.c if ((BNX_CHIP_NUM(sc) == BNX_CHIP_NUM_5706) &&
sc 3061 dev/pci/if_bnx.c (BNX_CHIP_ID(sc) != BNX_CHIP_ID_5706_A0) &&
sc 3062 dev/pci/if_bnx.c !(sc->bnx_flags & BNX_PCIX_FLAG))
sc 3065 dev/pci/if_bnx.c REG_WR(sc, BNX_DMA_CONFIG, val);
sc 3068 dev/pci/if_bnx.c if (sc->bnx_flags & BNX_PCIX_FLAG) {
sc 3077 dev/pci/if_bnx.c REG_WR(sc, BNX_MISC_ENABLE_SET_BITS,
sc 3083 dev/pci/if_bnx.c bnx_init_context(sc);
sc 3086 dev/pci/if_bnx.c bnx_init_cpus(sc);
sc 3089 dev/pci/if_bnx.c if (bnx_init_nvram(sc)) {
sc 3095 dev/pci/if_bnx.c val = REG_RD(sc, BNX_MQ_CONFIG);
sc 3098 dev/pci/if_bnx.c REG_WR(sc, BNX_MQ_CONFIG, val);
sc 3101 dev/pci/if_bnx.c REG_WR(sc, BNX_MQ_KNL_BYP_WIND_START, val);
sc 3102 dev/pci/if_bnx.c REG_WR(sc, BNX_MQ_KNL_WIND_END, val);
sc 3105 dev/pci/if_bnx.c REG_WR(sc, BNX_RV2P_CONFIG, val);
sc 3108 dev/pci/if_bnx.c val = REG_RD(sc, BNX_TBDR_CONFIG);
sc 3111 dev/pci/if_bnx.c REG_WR(sc, BNX_TBDR_CONFIG, val);
sc 3114 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 3126 dev/pci/if_bnx.c bnx_blockinit(struct bnx_softc *sc)
sc 3131 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
sc 3134 dev/pci/if_bnx.c bnx_set_mac_addr(sc);
sc 3137 dev/pci/if_bnx.c val = sc->eaddr[0] + (sc->eaddr[1] << 8) + (sc->eaddr[2] << 16) +
sc 3138 dev/pci/if_bnx.c (sc->eaddr[3]) + (sc->eaddr[4] << 8) + (sc->eaddr[5] << 16);
sc 3139 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_BACKOFF_SEED, val);
sc 3141 dev/pci/if_bnx.c sc->last_status_idx = 0;
sc 3142 dev/pci/if_bnx.c sc->rx_mode = BNX_EMAC_RX_MODE_SORT_MODE;
sc 3145 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_ATTENTION_ENA, BNX_EMAC_ATTENTION_ENA_LINK);
sc 3148 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_STATUS_ADDR_L, (u_int32_t)(sc->status_block_paddr));
sc 3149 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_STATUS_ADDR_H,
sc 3150 dev/pci/if_bnx.c (u_int32_t)((u_int64_t)sc->status_block_paddr >> 32));
sc 3153 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_STATISTICS_ADDR_L,
sc 3154 dev/pci/if_bnx.c (u_int32_t)(sc->stats_block_paddr));
sc 3155 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_STATISTICS_ADDR_H,
sc 3156 dev/pci/if_bnx.c (u_int32_t)((u_int64_t)sc->stats_block_paddr >> 32));
sc 3159 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_TX_QUICK_CONS_TRIP, (sc->bnx_tx_quick_cons_trip_int
sc 3160 dev/pci/if_bnx.c << 16) | sc->bnx_tx_quick_cons_trip);
sc 3161 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_RX_QUICK_CONS_TRIP, (sc->bnx_rx_quick_cons_trip_int
sc 3162 dev/pci/if_bnx.c << 16) | sc->bnx_rx_quick_cons_trip);
sc 3163 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_COMP_PROD_TRIP, (sc->bnx_comp_prod_trip_int << 16) |
sc 3164 dev/pci/if_bnx.c sc->bnx_comp_prod_trip);
sc 3165 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_TX_TICKS, (sc->bnx_tx_ticks_int << 16) |
sc 3166 dev/pci/if_bnx.c sc->bnx_tx_ticks);
sc 3167 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_RX_TICKS, (sc->bnx_rx_ticks_int << 16) |
sc 3168 dev/pci/if_bnx.c sc->bnx_rx_ticks);
sc 3169 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_COM_TICKS, (sc->bnx_com_ticks_int << 16) |
sc 3170 dev/pci/if_bnx.c sc->bnx_com_ticks);
sc 3171 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_CMD_TICKS, (sc->bnx_cmd_ticks_int << 16) |
sc 3172 dev/pci/if_bnx.c sc->bnx_cmd_ticks);
sc 3173 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_STATS_TICKS, (sc->bnx_stats_ticks & 0xffff00));
sc 3174 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_STAT_COLLECT_TICKS, 0xbb8); /* 3ms */
sc 3175 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_CONFIG,
sc 3180 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_COMMAND, BNX_HC_COMMAND_CLR_STAT_NOW);
sc 3183 dev/pci/if_bnx.c reg = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_DEV_INFO_SIGNATURE);
sc 3186 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Simulating bootcode failure.\n",
sc 3191 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Bootcode not running! Found: 0x%08X, "
sc 3200 dev/pci/if_bnx.c reg = REG_RD_IND(sc, sc->bnx_shmem_base + BNX_PORT_FEATURE);
sc 3203 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "Management F/W Enabled.\n");
sc 3204 dev/pci/if_bnx.c sc->bnx_flags |= BNX_MFW_ENABLE_FLAG;
sc 3207 dev/pci/if_bnx.c sc->bnx_fw_ver = REG_RD_IND(sc, sc->bnx_shmem_base +
sc 3210 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "bootcode rev = 0x%08X\n", sc->bnx_fw_ver);
sc 3213 dev/pci/if_bnx.c rc = bnx_fw_sync(sc, BNX_DRV_MSG_DATA_WAIT2 | BNX_DRV_MSG_CODE_RESET);
sc 3216 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_ATTN_BITS_ENABLE, STATUS_ATTN_BITS_LINK_STATE);
sc 3219 dev/pci/if_bnx.c REG_WR(sc, BNX_MISC_ENABLE_SET_BITS, 0x5ffffff);
sc 3220 dev/pci/if_bnx.c REG_RD(sc, BNX_MISC_ENABLE_SET_BITS);
sc 3224 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 3240 dev/pci/if_bnx.c bnx_get_buf(struct bnx_softc *sc, struct mbuf *m, u_int16_t *prod,
sc 3253 dev/pci/if_bnx.c DBPRINT(sc, (BNX_VERBOSE_RESET | BNX_VERBOSE_RECV), "Entering %s()\n",
sc 3261 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RECV, "%s(enter): prod = 0x%04X, chain_prod = "
sc 3267 dev/pci/if_bnx.c BNX_PRINTF(sc, "Simulating mbuf allocation failure.\n");
sc 3269 dev/pci/if_bnx.c sc->mbuf_alloc_failed++;
sc 3276 dev/pci/if_bnx.c DBPRINT(sc, BNX_WARN,
sc 3280 dev/pci/if_bnx.c DBRUNIF(1, sc->mbuf_alloc_failed++);
sc 3286 dev/pci/if_bnx.c DBRUNIF(1, sc->rx_mbuf_alloc++);
sc 3289 dev/pci/if_bnx.c DBPRINT(sc, BNX_WARN,
sc 3295 dev/pci/if_bnx.c DBRUNIF(1, sc->rx_mbuf_alloc--);
sc 3296 dev/pci/if_bnx.c DBRUNIF(1, sc->mbuf_alloc_failed++);
sc 3302 dev/pci/if_bnx.c m_new->m_len = m_new->m_pkthdr.len = sc->mbuf_alloc_size;
sc 3305 dev/pci/if_bnx.c m_new->m_len = m_new->m_pkthdr.len = sc->mbuf_alloc_size;
sc 3310 dev/pci/if_bnx.c map = sc->rx_mbuf_map[*chain_prod];
sc 3312 dev/pci/if_bnx.c if (bus_dmamap_load_mbuf(sc->bnx_dmatag, map, m_new, BUS_DMA_NOWAIT)) {
sc 3313 dev/pci/if_bnx.c BNX_PRINTF(sc, "%s(%d): Error mapping mbuf into RX chain!\n",
sc 3318 dev/pci/if_bnx.c DBRUNIF(1, sc->rx_mbuf_alloc--);
sc 3325 dev/pci/if_bnx.c DBRUNIF((sc->free_rx_bd > USABLE_RX_BD),
sc 3327 dev/pci/if_bnx.c sc->free_rx_bd, (u_int16_t) USABLE_RX_BD));
sc 3329 dev/pci/if_bnx.c DBRUNIF((sc->free_rx_bd < sc->rx_low_watermark),
sc 3330 dev/pci/if_bnx.c sc->rx_low_watermark = sc->free_rx_bd);
sc 3333 dev/pci/if_bnx.c rxbd = &sc->rx_bd_chain[RX_PAGE(*chain_prod)][RX_IDX(*chain_prod)];
sc 3348 dev/pci/if_bnx.c &sc->rx_bd_chain[RX_PAGE(*chain_prod)][RX_IDX(*chain_prod)];
sc 3366 dev/pci/if_bnx.c sc->rx_mbuf_ptr[*chain_prod] = m_new;
sc 3367 dev/pci/if_bnx.c sc->rx_mbuf_map[first_chain_prod] = sc->rx_mbuf_map[*chain_prod];
sc 3368 dev/pci/if_bnx.c sc->rx_mbuf_map[*chain_prod] = map;
sc 3369 dev/pci/if_bnx.c sc->free_rx_bd -= map->dm_nsegs;
sc 3371 dev/pci/if_bnx.c DBRUN(BNX_VERBOSE_RECV, bnx_dump_rx_mbuf_chain(sc, debug_chain_prod,
sc 3374 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RECV, "%s(exit): prod = 0x%04X, chain_prod "
sc 3379 dev/pci/if_bnx.c DBPRINT(sc, (BNX_VERBOSE_RESET | BNX_VERBOSE_RECV), "Exiting %s()\n",
sc 3392 dev/pci/if_bnx.c bnx_init_tx_chain(struct bnx_softc *sc)
sc 3398 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
sc 3401 dev/pci/if_bnx.c sc->tx_prod = 0;
sc 3402 dev/pci/if_bnx.c sc->tx_cons = 0;
sc 3403 dev/pci/if_bnx.c sc->tx_prod_bseq = 0;
sc 3404 dev/pci/if_bnx.c sc->used_tx_bd = 0;
sc 3405 dev/pci/if_bnx.c DBRUNIF(1, sc->tx_hi_watermark = USABLE_TX_BD);
sc 3421 dev/pci/if_bnx.c txbd = &sc->tx_bd_chain[i][USABLE_TX_BD_PER_PAGE];
sc 3429 dev/pci/if_bnx.c addr = (u_int32_t)(sc->tx_bd_chain_paddr[j]);
sc 3431 dev/pci/if_bnx.c addr = (u_int32_t)((u_int64_t)sc->tx_bd_chain_paddr[j] >> 32);
sc 3440 dev/pci/if_bnx.c CTX_WR(sc, GET_CID_ADDR(TX_CID), BNX_L2CTX_TYPE, val);
sc 3443 dev/pci/if_bnx.c CTX_WR(sc, GET_CID_ADDR(TX_CID), BNX_L2CTX_CMD_TYPE, val);
sc 3446 dev/pci/if_bnx.c val = (u_int32_t)((u_int64_t)sc->tx_bd_chain_paddr[0] >> 32);
sc 3447 dev/pci/if_bnx.c CTX_WR(sc, GET_CID_ADDR(TX_CID), BNX_L2CTX_TBDR_BHADDR_HI, val);
sc 3448 dev/pci/if_bnx.c val = (u_int32_t)(sc->tx_bd_chain_paddr[0]);
sc 3449 dev/pci/if_bnx.c CTX_WR(sc, GET_CID_ADDR(TX_CID), BNX_L2CTX_TBDR_BHADDR_LO, val);
sc 3451 dev/pci/if_bnx.c DBRUN(BNX_VERBOSE_SEND, bnx_dump_tx_chain(sc, 0, TOTAL_TX_BD));
sc 3453 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 3465 dev/pci/if_bnx.c bnx_free_tx_chain(struct bnx_softc *sc)
sc 3469 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
sc 3473 dev/pci/if_bnx.c if (sc->tx_mbuf_ptr[i] != NULL) {
sc 3474 dev/pci/if_bnx.c if (sc->tx_mbuf_map != NULL)
sc 3475 dev/pci/if_bnx.c bus_dmamap_sync(sc->bnx_dmatag,
sc 3476 dev/pci/if_bnx.c sc->tx_mbuf_map[i], 0,
sc 3477 dev/pci/if_bnx.c sc->tx_mbuf_map[i]->dm_mapsize,
sc 3479 dev/pci/if_bnx.c m_freem(sc->tx_mbuf_ptr[i]);
sc 3480 dev/pci/if_bnx.c sc->tx_mbuf_ptr[i] = NULL;
sc 3481 dev/pci/if_bnx.c DBRUNIF(1, sc->tx_mbuf_alloc--);
sc 3487 dev/pci/if_bnx.c bzero((char *)sc->tx_bd_chain[i], BNX_TX_CHAIN_PAGE_SZ);
sc 3490 dev/pci/if_bnx.c DBRUNIF((sc->tx_mbuf_alloc),
sc 3492 dev/pci/if_bnx.c sc->tx_mbuf_alloc));
sc 3494 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 3504 dev/pci/if_bnx.c bnx_init_rx_chain(struct bnx_softc *sc)
sc 3511 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
sc 3514 dev/pci/if_bnx.c sc->rx_prod = 0;
sc 3515 dev/pci/if_bnx.c sc->rx_cons = 0;
sc 3516 dev/pci/if_bnx.c sc->rx_prod_bseq = 0;
sc 3517 dev/pci/if_bnx.c sc->free_rx_bd = BNX_RX_SLACK_SPACE;
sc 3518 dev/pci/if_bnx.c DBRUNIF(1, sc->rx_low_watermark = USABLE_RX_BD);
sc 3524 dev/pci/if_bnx.c rxbd = &sc->rx_bd_chain[i][USABLE_RX_BD_PER_PAGE];
sc 3533 dev/pci/if_bnx.c addr = (u_int32_t)((u_int64_t)sc->rx_bd_chain_paddr[j] >> 32);
sc 3535 dev/pci/if_bnx.c addr = (u_int32_t)(sc->rx_bd_chain_paddr[j]);
sc 3543 dev/pci/if_bnx.c CTX_WR(sc, GET_CID_ADDR(RX_CID), BNX_L2CTX_CTX_TYPE, val);
sc 3546 dev/pci/if_bnx.c val = (u_int32_t)((u_int64_t)sc->rx_bd_chain_paddr[0] >> 32);
sc 3547 dev/pci/if_bnx.c CTX_WR(sc, GET_CID_ADDR(RX_CID), BNX_L2CTX_NX_BDHADDR_HI, val);
sc 3548 dev/pci/if_bnx.c val = (u_int32_t)(sc->rx_bd_chain_paddr[0]);
sc 3549 dev/pci/if_bnx.c CTX_WR(sc, GET_CID_ADDR(RX_CID), BNX_L2CTX_NX_BDHADDR_LO, val);
sc 3555 dev/pci/if_bnx.c if (bnx_get_buf(sc, NULL, &prod, &chain_prod, &prod_bseq)) {
sc 3556 dev/pci/if_bnx.c BNX_PRINTF(sc, "Error filling RX chain: rx_bd[0x%04X]!\n",
sc 3565 dev/pci/if_bnx.c sc->rx_prod = prod;
sc 3566 dev/pci/if_bnx.c sc->rx_prod_bseq = prod_bseq;
sc 3569 dev/pci/if_bnx.c bus_dmamap_sync(sc->bnx_dmatag, sc->rx_bd_chain_map[i], 0,
sc 3570 dev/pci/if_bnx.c sc->rx_bd_chain_map[i]->dm_mapsize,
sc 3574 dev/pci/if_bnx.c REG_WR16(sc, MB_RX_CID_ADDR + BNX_L2CTX_HOST_BDIDX, sc->rx_prod);
sc 3575 dev/pci/if_bnx.c REG_WR(sc, MB_RX_CID_ADDR + BNX_L2CTX_HOST_BSEQ, sc->rx_prod_bseq);
sc 3577 dev/pci/if_bnx.c DBRUN(BNX_VERBOSE_RECV, bnx_dump_rx_chain(sc, 0, TOTAL_RX_BD));
sc 3579 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 3591 dev/pci/if_bnx.c bnx_free_rx_chain(struct bnx_softc *sc)
sc 3595 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
sc 3599 dev/pci/if_bnx.c if (sc->rx_mbuf_ptr[i] != NULL) {
sc 3600 dev/pci/if_bnx.c if (sc->rx_mbuf_map[i] != NULL)
sc 3601 dev/pci/if_bnx.c bus_dmamap_sync(sc->bnx_dmatag,
sc 3602 dev/pci/if_bnx.c sc->rx_mbuf_map[i], 0,
sc 3603 dev/pci/if_bnx.c sc->rx_mbuf_map[i]->dm_mapsize,
sc 3605 dev/pci/if_bnx.c m_freem(sc->rx_mbuf_ptr[i]);
sc 3606 dev/pci/if_bnx.c sc->rx_mbuf_ptr[i] = NULL;
sc 3607 dev/pci/if_bnx.c DBRUNIF(1, sc->rx_mbuf_alloc--);
sc 3613 dev/pci/if_bnx.c bzero((char *)sc->rx_bd_chain[i], BNX_RX_CHAIN_PAGE_SZ);
sc 3616 dev/pci/if_bnx.c DBRUNIF((sc->rx_mbuf_alloc),
sc 3618 dev/pci/if_bnx.c sc->rx_mbuf_alloc));
sc 3620 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 3632 dev/pci/if_bnx.c struct bnx_softc *sc;
sc 3637 dev/pci/if_bnx.c sc = ifp->if_softc;
sc 3638 dev/pci/if_bnx.c ifm = &sc->bnx_ifmedia;
sc 3642 dev/pci/if_bnx.c mii = &sc->bnx_mii;
sc 3643 dev/pci/if_bnx.c sc->bnx_link = 0;
sc 3663 dev/pci/if_bnx.c struct bnx_softc *sc;
sc 3667 dev/pci/if_bnx.c sc = ifp->if_softc;
sc 3671 dev/pci/if_bnx.c mii = &sc->bnx_mii;
sc 3689 dev/pci/if_bnx.c bnx_phy_intr(struct bnx_softc *sc)
sc 3693 dev/pci/if_bnx.c new_link_state = sc->status_block->status_attn_bits &
sc 3695 dev/pci/if_bnx.c old_link_state = sc->status_block->status_attn_bits_ack &
sc 3700 dev/pci/if_bnx.c DBRUN(BNX_VERBOSE_INTR, bnx_dump_status_block(sc));
sc 3702 dev/pci/if_bnx.c sc->bnx_link = 0;
sc 3703 dev/pci/if_bnx.c timeout_del(&sc->bnx_timeout);
sc 3704 dev/pci/if_bnx.c bnx_tick(sc);
sc 3708 dev/pci/if_bnx.c REG_WR(sc, BNX_PCICFG_STATUS_BIT_SET_CMD,
sc 3710 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "Link is now UP.\n");
sc 3712 dev/pci/if_bnx.c REG_WR(sc, BNX_PCICFG_STATUS_BIT_CLEAR_CMD,
sc 3714 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "Link is now DOWN.\n");
sc 3719 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_STATUS, BNX_EMAC_STATUS_LINK_CHANGE);
sc 3729 dev/pci/if_bnx.c bnx_rx_intr(struct bnx_softc *sc)
sc 3731 dev/pci/if_bnx.c struct status_block *sblk = sc->status_block;
sc 3732 dev/pci/if_bnx.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 3739 dev/pci/if_bnx.c DBRUNIF(1, sc->rx_interrupts++);
sc 3743 dev/pci/if_bnx.c bus_dmamap_sync(sc->bnx_dmatag,
sc 3744 dev/pci/if_bnx.c sc->rx_bd_chain_map[i], 0,
sc 3745 dev/pci/if_bnx.c sc->rx_bd_chain_map[i]->dm_mapsize,
sc 3749 dev/pci/if_bnx.c hw_cons = sc->hw_rx_cons = sblk->status_rx_quick_consumer_index0;
sc 3754 dev/pci/if_bnx.c sw_cons = sc->rx_cons;
sc 3755 dev/pci/if_bnx.c sw_prod = sc->rx_prod;
sc 3756 dev/pci/if_bnx.c sw_prod_bseq = sc->rx_prod_bseq;
sc 3758 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO_RECV, "%s(enter): sw_prod = 0x%04X, "
sc 3763 dev/pci/if_bnx.c bus_space_barrier(sc->bnx_btag, sc->bnx_bhandle, 0, 0,
sc 3766 dev/pci/if_bnx.c DBRUNIF((sc->free_rx_bd < sc->rx_low_watermark),
sc 3767 dev/pci/if_bnx.c sc->rx_low_watermark = sc->free_rx_bd);
sc 3786 dev/pci/if_bnx.c rxbd = &sc->rx_bd_chain[RX_PAGE(sw_chain_cons)][RX_IDX(sw_chain_cons)];
sc 3787 dev/pci/if_bnx.c sc->free_rx_bd++;
sc 3790 dev/pci/if_bnx.c bnx_dump_rxbd(sc, sw_chain_cons, rxbd));
sc 3793 dev/pci/if_bnx.c if (sc->rx_mbuf_ptr[sw_chain_cons] != NULL) {
sc 3798 dev/pci/if_bnx.c bnx_breakpoint(sc));
sc 3807 dev/pci/if_bnx.c bus_dmamap_sync(sc->bnx_dmatag,
sc 3808 dev/pci/if_bnx.c sc->rx_mbuf_map[sw_chain_cons], 0,
sc 3809 dev/pci/if_bnx.c sc->rx_mbuf_map[sw_chain_cons]->dm_mapsize,
sc 3811 dev/pci/if_bnx.c bus_dmamap_unload(sc->bnx_dmatag,
sc 3812 dev/pci/if_bnx.c sc->rx_mbuf_map[sw_chain_cons]);
sc 3815 dev/pci/if_bnx.c m = sc->rx_mbuf_ptr[sw_chain_cons];
sc 3816 dev/pci/if_bnx.c sc->rx_mbuf_ptr[sw_chain_cons] = NULL;
sc 3843 dev/pci/if_bnx.c bnx_dump_mbuf(sc, m);
sc 3844 dev/pci/if_bnx.c bnx_breakpoint(sc));
sc 3855 dev/pci/if_bnx.c DBRUNIF(1, sc->l2fhdr_status_errors++);
sc 3858 dev/pci/if_bnx.c if (bnx_get_buf(sc, m, &sw_prod,
sc 3860 dev/pci/if_bnx.c DBRUNIF(1, bnx_breakpoint(sc));
sc 3862 dev/pci/if_bnx.c sc->bnx_dev.dv_xname);
sc 3873 dev/pci/if_bnx.c if (bnx_get_buf(sc, NULL, &sw_prod, &sw_chain_prod,
sc 3875 dev/pci/if_bnx.c DBRUN(BNX_WARN, BNX_PRINTF(sc, "Failed to allocate "
sc 3881 dev/pci/if_bnx.c if (bnx_get_buf(sc, m, &sw_prod,
sc 3883 dev/pci/if_bnx.c DBRUNIF(1, bnx_breakpoint(sc));
sc 3885 dev/pci/if_bnx.c "failure!", sc->bnx_dev.dv_xname);
sc 3918 dev/pci/if_bnx.c DBPRINT(sc, BNX_WARN_SEND,
sc 3937 dev/pci/if_bnx.c DBPRINT(sc, BNX_WARN_SEND,
sc 3950 dev/pci/if_bnx.c !(sc->rx_mode & BNX_EMAC_RX_MODE_KEEP_VLAN_TAG)) {
sc 3954 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_SEND,
sc 3989 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RECV,
sc 3992 dev/pci/if_bnx.c DBRUNIF(1, sc->rx_mbuf_alloc--);
sc 4002 dev/pci/if_bnx.c hw_cons = sc->hw_rx_cons =
sc 4012 dev/pci/if_bnx.c bus_space_barrier(sc->bnx_btag, sc->bnx_bhandle, 0, 0,
sc 4017 dev/pci/if_bnx.c bus_dmamap_sync(sc->bnx_dmatag,
sc 4018 dev/pci/if_bnx.c sc->rx_bd_chain_map[i], 0,
sc 4019 dev/pci/if_bnx.c sc->rx_bd_chain_map[i]->dm_mapsize,
sc 4022 dev/pci/if_bnx.c sc->rx_cons = sw_cons;
sc 4023 dev/pci/if_bnx.c sc->rx_prod = sw_prod;
sc 4024 dev/pci/if_bnx.c sc->rx_prod_bseq = sw_prod_bseq;
sc 4026 dev/pci/if_bnx.c REG_WR16(sc, MB_RX_CID_ADDR + BNX_L2CTX_HOST_BDIDX, sc->rx_prod);
sc 4027 dev/pci/if_bnx.c REG_WR(sc, MB_RX_CID_ADDR + BNX_L2CTX_HOST_BSEQ, sc->rx_prod_bseq);
sc 4029 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO_RECV, "%s(exit): rx_prod = 0x%04X, "
sc 4031 dev/pci/if_bnx.c __FUNCTION__, sc->rx_prod, sc->rx_cons, sc->rx_prod_bseq);
sc 4041 dev/pci/if_bnx.c bnx_tx_intr(struct bnx_softc *sc)
sc 4043 dev/pci/if_bnx.c struct status_block *sblk = sc->status_block;
sc 4044 dev/pci/if_bnx.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 4047 dev/pci/if_bnx.c DBRUNIF(1, sc->tx_interrupts++);
sc 4050 dev/pci/if_bnx.c hw_tx_cons = sc->hw_tx_cons = sblk->status_tx_quick_consumer_index0;
sc 4056 dev/pci/if_bnx.c sw_tx_cons = sc->tx_cons;
sc 4059 dev/pci/if_bnx.c bus_space_barrier(sc->bnx_btag, sc->bnx_bhandle, 0, 0,
sc 4069 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO_SEND, "%s(): hw_tx_cons = 0x%04X, "
sc 4076 dev/pci/if_bnx.c bnx_breakpoint(sc));
sc 4078 dev/pci/if_bnx.c DBRUNIF(1, txbd = &sc->tx_bd_chain
sc 4084 dev/pci/if_bnx.c bnx_breakpoint(sc));
sc 4087 dev/pci/if_bnx.c bnx_dump_txbd(sc, sw_tx_chain_cons, txbd));
sc 4094 dev/pci/if_bnx.c if (sc->tx_mbuf_ptr[sw_tx_chain_cons] != NULL) {
sc 4099 dev/pci/if_bnx.c bnx_breakpoint(sc));
sc 4107 dev/pci/if_bnx.c bus_dmamap_unload(sc->bnx_dmatag,
sc 4108 dev/pci/if_bnx.c sc->tx_mbuf_map[sw_tx_chain_cons]);
sc 4111 dev/pci/if_bnx.c m_freem(sc->tx_mbuf_ptr[sw_tx_chain_cons]);
sc 4112 dev/pci/if_bnx.c sc->tx_mbuf_ptr[sw_tx_chain_cons] = NULL;
sc 4113 dev/pci/if_bnx.c DBRUNIF(1, sc->tx_mbuf_alloc--);
sc 4118 dev/pci/if_bnx.c sc->used_tx_bd--;
sc 4122 dev/pci/if_bnx.c hw_tx_cons = sc->hw_tx_cons =
sc 4131 dev/pci/if_bnx.c bus_space_barrier(sc->bnx_btag, sc->bnx_bhandle, 0, 0,
sc 4139 dev/pci/if_bnx.c if ((sc->used_tx_bd + BNX_TX_SLACK_SPACE) < USABLE_TX_BD) {
sc 4142 dev/pci/if_bnx.c "tx_bd = %d\n", sc->used_tx_bd));
sc 4146 dev/pci/if_bnx.c sc->tx_cons = sw_tx_cons;
sc 4156 dev/pci/if_bnx.c bnx_disable_intr(struct bnx_softc *sc)
sc 4158 dev/pci/if_bnx.c REG_WR(sc, BNX_PCICFG_INT_ACK_CMD, BNX_PCICFG_INT_ACK_CMD_MASK_INT);
sc 4159 dev/pci/if_bnx.c REG_RD(sc, BNX_PCICFG_INT_ACK_CMD);
sc 4169 dev/pci/if_bnx.c bnx_enable_intr(struct bnx_softc *sc)
sc 4173 dev/pci/if_bnx.c REG_WR(sc, BNX_PCICFG_INT_ACK_CMD, BNX_PCICFG_INT_ACK_CMD_INDEX_VALID |
sc 4174 dev/pci/if_bnx.c BNX_PCICFG_INT_ACK_CMD_MASK_INT | sc->last_status_idx);
sc 4176 dev/pci/if_bnx.c REG_WR(sc, BNX_PCICFG_INT_ACK_CMD, BNX_PCICFG_INT_ACK_CMD_INDEX_VALID |
sc 4177 dev/pci/if_bnx.c sc->last_status_idx);
sc 4179 dev/pci/if_bnx.c val = REG_RD(sc, BNX_HC_COMMAND);
sc 4180 dev/pci/if_bnx.c REG_WR(sc, BNX_HC_COMMAND, val | BNX_HC_COMMAND_COAL_NOW);
sc 4192 dev/pci/if_bnx.c struct bnx_softc *sc = (struct bnx_softc *)xsc;
sc 4193 dev/pci/if_bnx.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 4197 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Entering %s()\n", __FUNCTION__);
sc 4201 dev/pci/if_bnx.c bnx_stop(sc);
sc 4203 dev/pci/if_bnx.c if (bnx_reset(sc, BNX_DRV_MSG_CODE_RESET)) {
sc 4204 dev/pci/if_bnx.c BNX_PRINTF(sc, "Controller reset failed!\n");
sc 4208 dev/pci/if_bnx.c if (bnx_chipinit(sc)) {
sc 4209 dev/pci/if_bnx.c BNX_PRINTF(sc, "Controller initialization failed!\n");
sc 4213 dev/pci/if_bnx.c if (bnx_blockinit(sc)) {
sc 4214 dev/pci/if_bnx.c BNX_PRINTF(sc, "Block initialization failed!\n");
sc 4219 dev/pci/if_bnx.c bcopy(sc->arpcom.ac_enaddr, sc->eaddr, ETHER_ADDR_LEN);
sc 4220 dev/pci/if_bnx.c bnx_set_mac_addr(sc);
sc 4225 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "%s(): setting MRU = %d\n",
sc 4232 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_RX_MTU_SIZE, ether_mtu |
sc 4236 dev/pci/if_bnx.c sc->max_frame_size = sizeof(struct l2_fhdr) + 2 + ether_mtu + 8;
sc 4238 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "%s(): mclbytes = %d, mbuf_alloc_size = %d, "
sc 4240 dev/pci/if_bnx.c sc->mbuf_alloc_size, sc->max_frame_size);
sc 4243 dev/pci/if_bnx.c bnx_set_rx_mode(sc);
sc 4246 dev/pci/if_bnx.c bnx_init_rx_chain(sc);
sc 4249 dev/pci/if_bnx.c bnx_init_tx_chain(sc);
sc 4252 dev/pci/if_bnx.c bnx_enable_intr(sc);
sc 4259 dev/pci/if_bnx.c timeout_add(&sc->bnx_timeout, hz);
sc 4262 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 4270 dev/pci/if_bnx.c bnx_mgmt_init(struct bnx_softc *sc)
sc 4272 dev/pci/if_bnx.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 4280 dev/pci/if_bnx.c bnx_init_cpus(sc);
sc 4283 dev/pci/if_bnx.c REG_WR(sc, BNX_RV2P_CONFIG, val);
sc 4286 dev/pci/if_bnx.c REG_WR(sc, BNX_MISC_ENABLE_SET_BITS,
sc 4290 dev/pci/if_bnx.c REG_RD(sc, BNX_MISC_ENABLE_SET_BITS);
sc 4296 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_RESET, "Exiting %s()\n", __FUNCTION__);
sc 4307 dev/pci/if_bnx.c bnx_tx_encap(struct bnx_softc *sc, struct mbuf **m_head)
sc 4341 dev/pci/if_bnx.c prod = sc->tx_prod;
sc 4343 dev/pci/if_bnx.c map = sc->tx_mbuf_map[chain_prod];
sc 4346 dev/pci/if_bnx.c error = bus_dmamap_load_mbuf(sc->bnx_dmatag, map, m0, BUS_DMA_NOWAIT);
sc 4349 dev/pci/if_bnx.c sc->bnx_dev.dv_xname);
sc 4361 dev/pci/if_bnx.c if (map->dm_nsegs > (USABLE_TX_BD - sc->used_tx_bd - BNX_TX_SLACK_SPACE)) {
sc 4362 dev/pci/if_bnx.c bus_dmamap_unload(sc->bnx_dmatag, map);
sc 4367 dev/pci/if_bnx.c prod_bseq = sc->tx_prod_bseq;
sc 4372 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO_SEND,
sc 4385 dev/pci/if_bnx.c txbd = &sc->tx_bd_chain[TX_PAGE(chain_prod)][TX_IDX(chain_prod)];
sc 4403 dev/pci/if_bnx.c DBRUN(BNX_INFO_SEND, bnx_dump_tx_chain(sc, debug_prod, nseg));
sc 4405 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO_SEND,
sc 4419 dev/pci/if_bnx.c sc->tx_mbuf_ptr[chain_prod] = m0;
sc 4420 dev/pci/if_bnx.c sc->used_tx_bd += map->dm_nsegs;
sc 4422 dev/pci/if_bnx.c DBRUNIF((sc->used_tx_bd > sc->tx_hi_watermark),
sc 4423 dev/pci/if_bnx.c sc->tx_hi_watermark = sc->used_tx_bd);
sc 4425 dev/pci/if_bnx.c DBRUNIF(1, sc->tx_mbuf_alloc++);
sc 4427 dev/pci/if_bnx.c DBRUN(BNX_VERBOSE_SEND, bnx_dump_tx_mbuf_chain(sc, chain_prod,
sc 4431 dev/pci/if_bnx.c sc->tx_prod = prod;
sc 4432 dev/pci/if_bnx.c sc->tx_prod_bseq = prod_bseq;
sc 4446 dev/pci/if_bnx.c struct bnx_softc *sc = ifp->if_softc;
sc 4452 dev/pci/if_bnx.c if (!sc->bnx_link || IFQ_IS_EMPTY(&ifp->if_snd)) {
sc 4453 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO_SEND,
sc 4459 dev/pci/if_bnx.c tx_prod = sc->tx_prod;
sc 4462 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO_SEND, "%s(): Start: tx_prod = 0x%04X, "
sc 4464 dev/pci/if_bnx.c __FUNCTION__, tx_prod, tx_chain_prod, sc->tx_prod_bseq);
sc 4470 dev/pci/if_bnx.c while (sc->used_tx_bd < USABLE_TX_BD - BNX_TX_SLACK_SPACE) {
sc 4481 dev/pci/if_bnx.c if (bnx_tx_encap(sc, &m_head)) {
sc 4483 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO_SEND, "TX chain is closed for "
sc 4485 dev/pci/if_bnx.c sc->used_tx_bd);
sc 4501 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE_SEND,
sc 4507 dev/pci/if_bnx.c tx_chain_prod = TX_CHAIN_IDX(sc->tx_prod);
sc 4509 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO_SEND, "%s(): End: tx_prod = 0x%04X, tx_chain_prod "
sc 4511 dev/pci/if_bnx.c tx_chain_prod, sc->tx_prod_bseq);
sc 4514 dev/pci/if_bnx.c REG_WR16(sc, MB_TX_CID_ADDR + BNX_L2CTX_TX_HOST_BIDX, sc->tx_prod);
sc 4515 dev/pci/if_bnx.c REG_WR(sc, MB_TX_CID_ADDR + BNX_L2CTX_TX_HOST_BSEQ, sc->tx_prod_bseq);
sc 4533 dev/pci/if_bnx.c struct bnx_softc *sc = ifp->if_softc;
sc 4541 dev/pci/if_bnx.c if ((error = ether_ioctl(ifp, &sc->arpcom, command, data)) > 0) {
sc 4550 dev/pci/if_bnx.c bnx_init(sc);
sc 4553 dev/pci/if_bnx.c arp_ifinit(&sc->arpcom, ifa);
sc 4567 dev/pci/if_bnx.c ((ifp->if_flags ^ sc->bnx_if_flags) &
sc 4569 dev/pci/if_bnx.c bnx_set_rx_mode(sc);
sc 4572 dev/pci/if_bnx.c bnx_init(sc);
sc 4576 dev/pci/if_bnx.c bnx_stop(sc);
sc 4578 dev/pci/if_bnx.c sc->bnx_if_flags = ifp->if_flags;
sc 4584 dev/pci/if_bnx.c ? ether_addmulti(ifr, &sc->arpcom)
sc 4585 dev/pci/if_bnx.c : ether_delmulti(ifr, &sc->arpcom);
sc 4589 dev/pci/if_bnx.c bnx_set_rx_mode(sc);
sc 4596 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE, "bnx_phy_flags = 0x%08X\n",
sc 4597 dev/pci/if_bnx.c sc->bnx_phy_flags);
sc 4599 dev/pci/if_bnx.c if (sc->bnx_phy_flags & BNX_PHY_SERDES_FLAG)
sc 4601 dev/pci/if_bnx.c &sc->bnx_ifmedia, command);
sc 4603 dev/pci/if_bnx.c mii = &sc->bnx_mii;
sc 4628 dev/pci/if_bnx.c struct bnx_softc *sc = ifp->if_softc;
sc 4630 dev/pci/if_bnx.c DBRUN(BNX_WARN_SEND, bnx_dump_driver_state(sc);
sc 4631 dev/pci/if_bnx.c bnx_dump_status_block(sc));
sc 4638 dev/pci/if_bnx.c bnx_init(sc);
sc 4657 dev/pci/if_bnx.c struct bnx_softc *sc;
sc 4661 dev/pci/if_bnx.c sc = xsc;
sc 4662 dev/pci/if_bnx.c if ((sc->bnx_flags & BNX_ACTIVE_FLAG) == 0)
sc 4665 dev/pci/if_bnx.c ifp = &sc->arpcom.ac_if;
sc 4667 dev/pci/if_bnx.c DBRUNIF(1, sc->interrupts_generated++);
sc 4669 dev/pci/if_bnx.c bus_dmamap_sync(sc->bnx_dmatag, sc->status_map, 0,
sc 4670 dev/pci/if_bnx.c sc->status_map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
sc 4678 dev/pci/if_bnx.c if ((sc->status_block->status_idx == sc->last_status_idx) &&
sc 4679 dev/pci/if_bnx.c (REG_RD(sc, BNX_PCICFG_MISC_STATUS) &
sc 4684 dev/pci/if_bnx.c REG_WR(sc, BNX_PCICFG_INT_ACK_CMD,
sc 4690 dev/pci/if_bnx.c status_attn_bits = sc->status_block->status_attn_bits;
sc 4699 dev/pci/if_bnx.c (sc->status_block->status_attn_bits_ack &
sc 4701 dev/pci/if_bnx.c bnx_phy_intr(sc);
sc 4705 dev/pci/if_bnx.c (sc->status_block->status_attn_bits_ack &
sc 4707 dev/pci/if_bnx.c DBRUN(1, sc->unexpected_attentions++);
sc 4709 dev/pci/if_bnx.c BNX_PRINTF(sc, "Fatal attention detected: 0x%08X\n",
sc 4710 dev/pci/if_bnx.c sc->status_block->status_attn_bits);
sc 4714 dev/pci/if_bnx.c bnx_breakpoint(sc));
sc 4716 dev/pci/if_bnx.c bnx_init(sc);
sc 4721 dev/pci/if_bnx.c if (sc->status_block->status_rx_quick_consumer_index0 !=
sc 4722 dev/pci/if_bnx.c sc->hw_rx_cons)
sc 4723 dev/pci/if_bnx.c bnx_rx_intr(sc);
sc 4726 dev/pci/if_bnx.c if (sc->status_block->status_tx_quick_consumer_index0 !=
sc 4727 dev/pci/if_bnx.c sc->hw_tx_cons)
sc 4728 dev/pci/if_bnx.c bnx_tx_intr(sc);
sc 4733 dev/pci/if_bnx.c sc->last_status_idx = sc->status_block->status_idx;
sc 4738 dev/pci/if_bnx.c bus_space_barrier(sc->bnx_btag, sc->bnx_bhandle, 0, 0,
sc 4742 dev/pci/if_bnx.c if ((sc->status_block->status_rx_quick_consumer_index0 ==
sc 4743 dev/pci/if_bnx.c sc->hw_rx_cons) &&
sc 4744 dev/pci/if_bnx.c (sc->status_block->status_tx_quick_consumer_index0 ==
sc 4745 dev/pci/if_bnx.c sc->hw_tx_cons))
sc 4749 dev/pci/if_bnx.c bus_dmamap_sync(sc->bnx_dmatag, sc->status_map, 0,
sc 4750 dev/pci/if_bnx.c sc->status_map->dm_mapsize, BUS_DMASYNC_PREWRITE);
sc 4753 dev/pci/if_bnx.c REG_WR(sc, BNX_PCICFG_INT_ACK_CMD,
sc 4754 dev/pci/if_bnx.c BNX_PCICFG_INT_ACK_CMD_INDEX_VALID | sc->last_status_idx |
sc 4756 dev/pci/if_bnx.c REG_WR(sc, BNX_PCICFG_INT_ACK_CMD,
sc 4757 dev/pci/if_bnx.c BNX_PCICFG_INT_ACK_CMD_INDEX_VALID | sc->last_status_idx);
sc 4773 dev/pci/if_bnx.c bnx_set_rx_mode(struct bnx_softc *sc)
sc 4775 dev/pci/if_bnx.c struct arpcom *ac = &sc->arpcom;
sc 4784 dev/pci/if_bnx.c rx_mode = sc->rx_mode & ~(BNX_EMAC_RX_MODE_PROMISCUOUS |
sc 4792 dev/pci/if_bnx.c if (!(sc->bnx_flags & BNX_MFW_ENABLE_FLAG))
sc 4800 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "Enabling promiscuous mode.\n");
sc 4807 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "Enabling all multicast mode.\n");
sc 4811 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_MULTICAST_HASH0 + (i * 4),
sc 4816 dev/pci/if_bnx.c DBPRINT(sc, BNX_INFO, "Enabling selective multicast mode.\n");
sc 4832 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_MULTICAST_HASH0 + (i * 4),
sc 4839 dev/pci/if_bnx.c if (rx_mode != sc->rx_mode) {
sc 4840 dev/pci/if_bnx.c DBPRINT(sc, BNX_VERBOSE, "Enabling new receive mode: 0x%08X\n",
sc 4843 dev/pci/if_bnx.c sc->rx_mode = rx_mode;
sc 4844 dev/pci/if_bnx.c REG_WR(sc, BNX_EMAC_RX_MODE, rx_mode);
sc 4848 dev/pci/if_bnx.c REG_WR(sc, BNX_RPM_SORT_USER0, 0x0);
sc 4849 dev/pci/if_bnx.c REG_WR(sc, BNX_RPM_SORT_USER0, sort_mode);
sc 4850 dev/pci/if_bnx.c REG_WR(sc, BNX_RPM_SORT_USER0, sort_mode | BNX_RPM_SORT_USER0_ENA);
sc 4861 dev/pci/if_bnx.c bnx_stats_update(struct bnx_softc *sc)
sc 4863 dev/pci/if_bnx.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 4866 dev/pci/if_bnx.c DBPRINT(sc, BNX_EXCESSIVE, "Entering %s()\n", __FUNCTION__);
sc 4868 dev/pci/if_bnx.c stats = (struct statistics_block *)sc->stats_block;
sc 4892 dev/pci/if_bnx.c if (!(BNX_CHIP_NUM(sc) == BNX_CHIP_NUM_5706) &&
sc 4893 dev/pci/if_bnx.c !(BNX_CHIP_ID(sc) == BNX_CHIP_ID_5708_A0))
sc 4900 dev/pci/if_bnx.c sc->stat_IfHCInOctets = ((u_int64_t)stats->stat_IfHCInOctets_hi << 32) +
sc 4903 dev/pci/if_bnx.c sc->stat_IfHCInBadOctets =
sc 4907 dev/pci/if_bnx.c sc->stat_IfHCOutOctets =
sc 4911 dev/pci/if_bnx.c sc->stat_IfHCOutBadOctets =
sc 4915 dev/pci/if_bnx.c sc->stat_IfHCInUcastPkts =
sc 4919 dev/pci/if_bnx.c sc->stat_IfHCInMulticastPkts =
sc 4923 dev/pci/if_bnx.c sc->stat_IfHCInBroadcastPkts =
sc 4927 dev/pci/if_bnx.c sc->stat_IfHCOutUcastPkts =
sc 4931 dev/pci/if_bnx.c sc->stat_IfHCOutMulticastPkts =
sc 4935 dev/pci/if_bnx.c sc->stat_IfHCOutBroadcastPkts =
sc 4939 dev/pci/if_bnx.c sc->stat_emac_tx_stat_dot3statsinternalmactransmiterrors =
sc 4942 dev/pci/if_bnx.c sc->stat_Dot3StatsCarrierSenseErrors =
sc 4945 dev/pci/if_bnx.c sc->stat_Dot3StatsFCSErrors = stats->stat_Dot3StatsFCSErrors;
sc 4947 dev/pci/if_bnx.c sc->stat_Dot3StatsAlignmentErrors =
sc 4950 dev/pci/if_bnx.c sc->stat_Dot3StatsSingleCollisionFrames =
sc 4953 dev/pci/if_bnx.c sc->stat_Dot3StatsMultipleCollisionFrames =
sc 4956 dev/pci/if_bnx.c sc->stat_Dot3StatsDeferredTransmissions =
sc 4959 dev/pci/if_bnx.c sc->stat_Dot3StatsExcessiveCollisions =
sc 4962 dev/pci/if_bnx.c sc->stat_Dot3StatsLateCollisions = stats->stat_Dot3StatsLateCollisions;
sc 4964 dev/pci/if_bnx.c sc->stat_EtherStatsCollisions = stats->stat_EtherStatsCollisions;
sc 4966 dev/pci/if_bnx.c sc->stat_EtherStatsFragments = stats->stat_EtherStatsFragments;
sc 4968 dev/pci/if_bnx.c sc->stat_EtherStatsJabbers = stats->stat_EtherStatsJabbers;
sc 4970 dev/pci/if_bnx.c sc->stat_EtherStatsUndersizePkts = stats->stat_EtherStatsUndersizePkts;
sc 4972 dev/pci/if_bnx.c sc->stat_EtherStatsOverrsizePkts = stats->stat_EtherStatsOverrsizePkts;
sc 4974 dev/pci/if_bnx.c sc->stat_EtherStatsPktsRx64Octets =
sc 4977 dev/pci/if_bnx.c sc->stat_EtherStatsPktsRx65Octetsto127Octets =
sc 4980 dev/pci/if_bnx.c sc->stat_EtherStatsPktsRx128Octetsto255Octets =
sc 4983 dev/pci/if_bnx.c sc->stat_EtherStatsPktsRx256Octetsto511Octets =
sc 4986 dev/pci/if_bnx.c sc->stat_EtherStatsPktsRx512Octetsto1023Octets =
sc 4989 dev/pci/if_bnx.c sc->stat_EtherStatsPktsRx1024Octetsto1522Octets =
sc 4992 dev/pci/if_bnx.c sc->stat_EtherStatsPktsRx1523Octetsto9022Octets =
sc 4995 dev/pci/if_bnx.c sc->stat_EtherStatsPktsTx64Octets =
sc 4998 dev/pci/if_bnx.c sc->stat_EtherStatsPktsTx65Octetsto127Octets =
sc 5001 dev/pci/if_bnx.c sc->stat_EtherStatsPktsTx128Octetsto255Octets =
sc 5004 dev/pci/if_bnx.c sc->stat_EtherStatsPktsTx256Octetsto511Octets =
sc 5007 dev/pci/if_bnx.c sc->stat_EtherStatsPktsTx512Octetsto1023Octets =
sc 5010 dev/pci/if_bnx.c sc->stat_EtherStatsPktsTx1024Octetsto1522Octets =
sc 5013 dev/pci/if_bnx.c sc->stat_EtherStatsPktsTx1523Octetsto9022Octets =
sc 5016 dev/pci/if_bnx.c sc->stat_XonPauseFramesReceived = stats->stat_XonPauseFramesReceived;
sc 5018 dev/pci/if_bnx.c sc->stat_XoffPauseFramesReceived = stats->stat_XoffPauseFramesReceived;
sc 5020 dev/pci/if_bnx.c sc->stat_OutXonSent = stats->stat_OutXonSent;
sc 5022 dev/pci/if_bnx.c sc->stat_OutXoffSent = stats->stat_OutXoffSent;
sc 5024 dev/pci/if_bnx.c sc->stat_FlowControlDone = stats->stat_FlowControlDone;
sc 5026 dev/pci/if_bnx.c sc->stat_MacControlFramesReceived =
sc 5029 dev/pci/if_bnx.c sc->stat_XoffStateEntered = stats->stat_XoffStateEntered;
sc 5031 dev/pci/if_bnx.c sc->stat_IfInFramesL2FilterDiscards =
sc 5034 dev/pci/if_bnx.c sc->stat_IfInRuleCheckerDiscards = stats->stat_IfInRuleCheckerDiscards;
sc 5036 dev/pci/if_bnx.c sc->stat_IfInFTQDiscards = stats->stat_IfInFTQDiscards;
sc 5038 dev/pci/if_bnx.c sc->stat_IfInMBUFDiscards = stats->stat_IfInMBUFDiscards;
sc 5040 dev/pci/if_bnx.c sc->stat_IfInRuleCheckerP4Hit = stats->stat_IfInRuleCheckerP4Hit;
sc 5042 dev/pci/if_bnx.c sc->stat_CatchupInRuleCheckerDiscards =
sc 5045 dev/pci/if_bnx.c sc->stat_CatchupInFTQDiscards = stats->stat_CatchupInFTQDiscards;
sc 5047 dev/pci/if_bnx.c sc->stat_CatchupInMBUFDiscards = stats->stat_CatchupInMBUFDiscards;
sc 5049 dev/pci/if_bnx.c sc->stat_CatchupInRuleCheckerP4Hit =
sc 5052 dev/pci/if_bnx.c DBPRINT(sc, BNX_EXCESSIVE, "Exiting %s()\n", __FUNCTION__);
sc 5058 dev/pci/if_bnx.c struct bnx_softc *sc = xsc;
sc 5059 dev/pci/if_bnx.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 5067 dev/pci/if_bnx.c msg = (u_int32_t)++sc->bnx_fw_drv_pulse_wr_seq;
sc 5069 dev/pci/if_bnx.c REG_WR_IND(sc, sc->bnx_shmem_base + BNX_DRV_PULSE_MB, msg);
sc 5072 dev/pci/if_bnx.c bnx_stats_update(sc);
sc 5075 dev/pci/if_bnx.c timeout_add(&sc->bnx_timeout, hz);
sc 5078 dev/pci/if_bnx.c if (sc->bnx_link)
sc 5083 dev/pci/if_bnx.c mii = &sc->bnx_mii;
sc 5087 dev/pci/if_bnx.c if (!sc->bnx_link && mii->mii_media_status & IFM_ACTIVE &&
sc 5089 dev/pci/if_bnx.c sc->bnx_link++;
sc 5111 dev/pci/if_bnx.c bnx_dump_mbuf(struct bnx_softc *sc, struct mbuf *m)
sc 5146 dev/pci/if_bnx.c bnx_dump_tx_mbuf_chain(struct bnx_softc *sc, int chain_prod, int count)
sc 5151 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5157 dev/pci/if_bnx.c m = sc->tx_mbuf_ptr[chain_prod];
sc 5158 dev/pci/if_bnx.c BNX_PRINTF(sc, "txmbuf[%d]\n", chain_prod);
sc 5159 dev/pci/if_bnx.c bnx_dump_mbuf(sc, m);
sc 5163 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5172 dev/pci/if_bnx.c bnx_dump_rx_mbuf_chain(struct bnx_softc *sc, int chain_prod, int count)
sc 5177 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5183 dev/pci/if_bnx.c m = sc->rx_mbuf_ptr[chain_prod];
sc 5184 dev/pci/if_bnx.c BNX_PRINTF(sc, "rxmbuf[0x%04X]\n", chain_prod);
sc 5185 dev/pci/if_bnx.c bnx_dump_mbuf(sc, m);
sc 5190 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5196 dev/pci/if_bnx.c bnx_dump_txbd(struct bnx_softc *sc, int idx, struct tx_bd *txbd)
sc 5200 dev/pci/if_bnx.c BNX_PRINTF(sc, "tx_bd[0x%04X]: Invalid tx_bd index!\n", idx);
sc 5203 dev/pci/if_bnx.c BNX_PRINTF(sc, "tx_bd[0x%04X]: haddr = 0x%08X:%08X, chain "
sc 5208 dev/pci/if_bnx.c BNX_PRINTF(sc, "tx_bd[0x%04X]: haddr = 0x%08X:%08X, nbytes = "
sc 5216 dev/pci/if_bnx.c bnx_dump_rxbd(struct bnx_softc *sc, int idx, struct rx_bd *rxbd)
sc 5220 dev/pci/if_bnx.c BNX_PRINTF(sc, "rx_bd[0x%04X]: Invalid rx_bd index!\n", idx);
sc 5223 dev/pci/if_bnx.c BNX_PRINTF(sc, "rx_bd[0x%04X]: haddr = 0x%08X:%08X, chain page "
sc 5228 dev/pci/if_bnx.c BNX_PRINTF(sc, "rx_bd[0x%04X]: haddr = 0x%08X:%08X, nbytes = "
sc 5235 dev/pci/if_bnx.c bnx_dump_l2fhdr(struct bnx_softc *sc, int idx, struct l2_fhdr *l2fhdr)
sc 5237 dev/pci/if_bnx.c BNX_PRINTF(sc, "l2_fhdr[0x%04X]: status = 0x%08X, "
sc 5249 dev/pci/if_bnx.c bnx_dump_tx_chain(struct bnx_softc *sc, int tx_prod, int count)
sc 5255 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5260 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5264 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5268 dev/pci/if_bnx.c BNX_PRINTF(sc, "total tx_bd = 0x%08X\n", (u_int32_t)TOTAL_TX_BD);
sc 5270 dev/pci/if_bnx.c BNX_PRINTF(sc, ""
sc 5277 dev/pci/if_bnx.c txbd = &sc->tx_bd_chain[TX_PAGE(tx_prod)][TX_IDX(tx_prod)];
sc 5278 dev/pci/if_bnx.c bnx_dump_txbd(sc, tx_prod, txbd);
sc 5282 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5292 dev/pci/if_bnx.c bnx_dump_rx_chain(struct bnx_softc *sc, int rx_prod, int count)
sc 5298 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5303 dev/pci/if_bnx.c BNX_PRINTF(sc, "----- RX_BD Chain -----\n");
sc 5305 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5309 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5313 dev/pci/if_bnx.c BNX_PRINTF(sc, "total rx_bd = 0x%08X\n", (u_int32_t)TOTAL_RX_BD);
sc 5315 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5322 dev/pci/if_bnx.c rxbd = &sc->rx_bd_chain[RX_PAGE(rx_prod)][RX_IDX(rx_prod)];
sc 5323 dev/pci/if_bnx.c bnx_dump_rxbd(sc, rx_prod, rxbd);
sc 5327 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5337 dev/pci/if_bnx.c bnx_dump_status_block(struct bnx_softc *sc)
sc 5341 dev/pci/if_bnx.c sblk = sc->status_block;
sc 5343 dev/pci/if_bnx.c BNX_PRINTF(sc, "----------------------------- Status Block "
sc 5346 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5351 dev/pci/if_bnx.c BNX_PRINTF(sc, "rx_cons0 = 0x%08X, tx_cons0 = 0x%08X\n",
sc 5355 dev/pci/if_bnx.c BNX_PRINTF(sc, "status_idx = 0x%04X\n", sblk->status_idx);
sc 5360 dev/pci/if_bnx.c BNX_PRINTF(sc, "rx_cons1 = 0x%08X, tx_cons1 = 0x%08X\n",
sc 5366 dev/pci/if_bnx.c BNX_PRINTF(sc, "rx_cons2 = 0x%08X, tx_cons2 = 0x%08X\n",
sc 5372 dev/pci/if_bnx.c BNX_PRINTF(sc, "rx_cons3 = 0x%08X, tx_cons3 = 0x%08X\n",
sc 5378 dev/pci/if_bnx.c BNX_PRINTF(sc, "rx_cons4 = 0x%08X, rx_cons5 = 0x%08X\n",
sc 5384 dev/pci/if_bnx.c BNX_PRINTF(sc, "rx_cons6 = 0x%08X, rx_cons7 = 0x%08X\n",
sc 5390 dev/pci/if_bnx.c BNX_PRINTF(sc, "rx_cons8 = 0x%08X, rx_cons9 = 0x%08X\n",
sc 5396 dev/pci/if_bnx.c BNX_PRINTF(sc, "rx_cons10 = 0x%08X, rx_cons11 = 0x%08X\n",
sc 5402 dev/pci/if_bnx.c BNX_PRINTF(sc, "rx_cons12 = 0x%08X, rx_cons13 = 0x%08X\n",
sc 5408 dev/pci/if_bnx.c BNX_PRINTF(sc, "rx_cons14 = 0x%08X, rx_cons15 = 0x%08X\n",
sc 5414 dev/pci/if_bnx.c BNX_PRINTF(sc, "com_prod = 0x%08X, cmd_cons = 0x%08X\n",
sc 5418 dev/pci/if_bnx.c BNX_PRINTF(sc, "-------------------------------------------"
sc 5426 dev/pci/if_bnx.c bnx_dump_stats_block(struct bnx_softc *sc)
sc 5430 dev/pci/if_bnx.c sblk = sc->stats_block;
sc 5432 dev/pci/if_bnx.c BNX_PRINTF(sc, ""
sc 5437 dev/pci/if_bnx.c BNX_PRINTF(sc, "IfHcInOctets = 0x%08X:%08X, "
sc 5442 dev/pci/if_bnx.c BNX_PRINTF(sc, "IfHcOutOctets = 0x%08X:%08X, "
sc 5447 dev/pci/if_bnx.c BNX_PRINTF(sc, "IfHcInUcastPkts = 0x%08X:%08X, "
sc 5453 dev/pci/if_bnx.c BNX_PRINTF(sc, "IfHcInBroadcastPkts = 0x%08X:%08X, "
sc 5460 dev/pci/if_bnx.c BNX_PRINTF(sc, "IfHcOutMulticastPkts = 0x%08X:%08X, "
sc 5468 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : "
sc 5473 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : Dot3StatsCarrierSenseErrors\n",
sc 5477 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : Dot3StatsFCSErrors\n",
sc 5481 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : Dot3StatsAlignmentErrors\n",
sc 5485 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : Dot3StatsSingleCollisionFrames\n",
sc 5489 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : Dot3StatsMultipleCollisionFrames\n",
sc 5493 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : Dot3StatsDeferredTransmissions\n",
sc 5497 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : Dot3StatsExcessiveCollisions\n",
sc 5501 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : Dot3StatsLateCollisions\n",
sc 5505 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : EtherStatsCollisions\n",
sc 5509 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : EtherStatsFragments\n",
sc 5513 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : EtherStatsJabbers\n",
sc 5517 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : EtherStatsUndersizePkts\n",
sc 5521 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : EtherStatsOverrsizePkts\n",
sc 5525 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : EtherStatsPktsRx64Octets\n",
sc 5529 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : EtherStatsPktsRx65Octetsto127Octets\n",
sc 5533 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : "
sc 5538 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : "
sc 5543 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : "
sc 5548 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : "
sc 5553 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : "
sc 5558 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : EtherStatsPktsTx64Octets\n",
sc 5562 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : EtherStatsPktsTx65Octetsto127Octets\n",
sc 5566 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : "
sc 5571 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : "
sc 5576 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : "
sc 5581 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : "
sc 5586 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : "
sc 5591 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : XonPauseFramesReceived\n",
sc 5595 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : XoffPauseFramesReceived\n",
sc 5599 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : OutXonSent\n",
sc 5603 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : OutXoffSent\n",
sc 5607 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : FlowControlDone\n",
sc 5611 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : MacControlFramesReceived\n",
sc 5615 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : XoffStateEntered\n",
sc 5619 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : IfInFramesL2FilterDiscards\n",
sc 5623 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : IfInRuleCheckerDiscards\n",
sc 5627 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : IfInFTQDiscards\n",
sc 5631 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : IfInMBUFDiscards\n",
sc 5635 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : IfInRuleCheckerP4Hit\n",
sc 5639 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : CatchupInRuleCheckerDiscards\n",
sc 5643 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : CatchupInFTQDiscards\n",
sc 5647 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : CatchupInMBUFDiscards\n",
sc 5651 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : CatchupInRuleCheckerP4Hit\n",
sc 5654 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5661 dev/pci/if_bnx.c bnx_dump_driver_state(struct bnx_softc *sc)
sc 5663 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5668 dev/pci/if_bnx.c BNX_PRINTF(sc, "%p - (sc) driver softc structure virtual "
sc 5669 dev/pci/if_bnx.c "address\n", sc);
sc 5671 dev/pci/if_bnx.c BNX_PRINTF(sc, "%p - (sc->status_block) status block virtual address\n",
sc 5672 dev/pci/if_bnx.c sc->status_block);
sc 5674 dev/pci/if_bnx.c BNX_PRINTF(sc, "%p - (sc->stats_block) statistics block virtual "
sc 5675 dev/pci/if_bnx.c "address\n", sc->stats_block);
sc 5677 dev/pci/if_bnx.c BNX_PRINTF(sc, "%p - (sc->tx_bd_chain) tx_bd chain virtual "
sc 5678 dev/pci/if_bnx.c "adddress\n", sc->tx_bd_chain);
sc 5680 dev/pci/if_bnx.c BNX_PRINTF(sc, "%p - (sc->rx_bd_chain) rx_bd chain virtual address\n",
sc 5681 dev/pci/if_bnx.c sc->rx_bd_chain);
sc 5683 dev/pci/if_bnx.c BNX_PRINTF(sc, "%p - (sc->tx_mbuf_ptr) tx mbuf chain virtual address\n",
sc 5684 dev/pci/if_bnx.c sc->tx_mbuf_ptr);
sc 5686 dev/pci/if_bnx.c BNX_PRINTF(sc, "%p - (sc->rx_mbuf_ptr) rx mbuf chain virtual address\n",
sc 5687 dev/pci/if_bnx.c sc->rx_mbuf_ptr);
sc 5689 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5691 dev/pci/if_bnx.c sc->interrupts_generated);
sc 5693 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5695 dev/pci/if_bnx.c sc->rx_interrupts);
sc 5697 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5699 dev/pci/if_bnx.c sc->tx_interrupts);
sc 5701 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5703 dev/pci/if_bnx.c sc->last_status_idx);
sc 5705 dev/pci/if_bnx.c BNX_PRINTF(sc, " 0x%08X - (sc->tx_prod) tx producer index\n",
sc 5706 dev/pci/if_bnx.c sc->tx_prod);
sc 5708 dev/pci/if_bnx.c BNX_PRINTF(sc, " 0x%08X - (sc->tx_cons) tx consumer index\n",
sc 5709 dev/pci/if_bnx.c sc->tx_cons);
sc 5711 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5713 dev/pci/if_bnx.c sc->tx_prod_bseq);
sc 5715 dev/pci/if_bnx.c BNX_PRINTF(sc, " 0x%08X - (sc->rx_prod) rx producer index\n",
sc 5716 dev/pci/if_bnx.c sc->rx_prod);
sc 5718 dev/pci/if_bnx.c BNX_PRINTF(sc, " 0x%08X - (sc->rx_cons) rx consumer index\n",
sc 5719 dev/pci/if_bnx.c sc->rx_cons);
sc 5721 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5723 dev/pci/if_bnx.c sc->rx_prod_bseq);
sc 5725 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5727 dev/pci/if_bnx.c sc->rx_mbuf_alloc);
sc 5729 dev/pci/if_bnx.c BNX_PRINTF(sc, " 0x%08X - (sc->free_rx_bd) free rx_bd's\n",
sc 5730 dev/pci/if_bnx.c sc->free_rx_bd);
sc 5732 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5734 dev/pci/if_bnx.c sc->rx_low_watermark, (u_int32_t) USABLE_RX_BD);
sc 5736 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5738 dev/pci/if_bnx.c sc->tx_mbuf_alloc);
sc 5740 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5742 dev/pci/if_bnx.c sc->rx_mbuf_alloc);
sc 5744 dev/pci/if_bnx.c BNX_PRINTF(sc, " 0x%08X - (sc->used_tx_bd) used tx_bd's\n",
sc 5745 dev/pci/if_bnx.c sc->used_tx_bd);
sc 5747 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X/%08X - (sc->tx_hi_watermark) tx hi watermark\n",
sc 5748 dev/pci/if_bnx.c sc->tx_hi_watermark, (u_int32_t) USABLE_TX_BD);
sc 5750 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5752 dev/pci/if_bnx.c sc->mbuf_alloc_failed);
sc 5754 dev/pci/if_bnx.c BNX_PRINTF(sc, "-------------------------------------------"
sc 5759 dev/pci/if_bnx.c bnx_dump_hw_state(struct bnx_softc *sc)
sc 5764 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5769 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : bootcode version\n", sc->bnx_fw_ver);
sc 5771 dev/pci/if_bnx.c val1 = REG_RD(sc, BNX_MISC_ENABLE_STATUS_BITS);
sc 5772 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : (0x%04X) misc_enable_status_bits\n",
sc 5775 dev/pci/if_bnx.c val1 = REG_RD(sc, BNX_DMA_STATUS);
sc 5776 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : (0x%04X) dma_status\n", val1, BNX_DMA_STATUS);
sc 5778 dev/pci/if_bnx.c val1 = REG_RD(sc, BNX_CTX_STATUS);
sc 5779 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : (0x%04X) ctx_status\n", val1, BNX_CTX_STATUS);
sc 5781 dev/pci/if_bnx.c val1 = REG_RD(sc, BNX_EMAC_STATUS);
sc 5782 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : (0x%04X) emac_status\n", val1,
sc 5785 dev/pci/if_bnx.c val1 = REG_RD(sc, BNX_RPM_STATUS);
sc 5786 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : (0x%04X) rpm_status\n", val1, BNX_RPM_STATUS);
sc 5788 dev/pci/if_bnx.c val1 = REG_RD(sc, BNX_TBDR_STATUS);
sc 5789 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : (0x%04X) tbdr_status\n", val1,
sc 5792 dev/pci/if_bnx.c val1 = REG_RD(sc, BNX_TDMA_STATUS);
sc 5793 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : (0x%04X) tdma_status\n", val1,
sc 5796 dev/pci/if_bnx.c val1 = REG_RD(sc, BNX_HC_STATUS);
sc 5797 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%08X : (0x%04X) hc_status\n", val1, BNX_HC_STATUS);
sc 5799 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5804 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5810 dev/pci/if_bnx.c BNX_PRINTF(sc, "0x%04X: 0x%08X 0x%08X 0x%08X 0x%08X\n",
sc 5811 dev/pci/if_bnx.c i, REG_RD(sc, i), REG_RD(sc, i + 0x4),
sc 5812 dev/pci/if_bnx.c REG_RD(sc, i + 0x8), REG_RD(sc, i + 0xC));
sc 5814 dev/pci/if_bnx.c BNX_PRINTF(sc,
sc 5821 dev/pci/if_bnx.c bnx_breakpoint(struct bnx_softc *sc)
sc 5825 dev/pci/if_bnx.c bnx_dump_txbd(sc, 0, NULL);
sc 5826 dev/pci/if_bnx.c bnx_dump_rxbd(sc, 0, NULL);
sc 5827 dev/pci/if_bnx.c bnx_dump_tx_mbuf_chain(sc, 0, USABLE_TX_BD);
sc 5828 dev/pci/if_bnx.c bnx_dump_rx_mbuf_chain(sc, 0, USABLE_RX_BD);
sc 5829 dev/pci/if_bnx.c bnx_dump_l2fhdr(sc, 0, NULL);
sc 5830 dev/pci/if_bnx.c bnx_dump_tx_chain(sc, 0, USABLE_TX_BD);
sc 5831 dev/pci/if_bnx.c bnx_dump_rx_chain(sc, 0, USABLE_RX_BD);
sc 5832 dev/pci/if_bnx.c bnx_dump_status_block(sc);
sc 5833 dev/pci/if_bnx.c bnx_dump_stats_block(sc);
sc 5834 dev/pci/if_bnx.c bnx_dump_driver_state(sc);
sc 5835 dev/pci/if_bnx.c bnx_dump_hw_state(sc);
sc 5838 dev/pci/if_bnx.c bnx_dump_driver_state(sc);
sc 5840 dev/pci/if_bnx.c bnx_dump_status_block(sc);
sc 145 dev/pci/if_bnxreg.h #define DBPRINT(sc, level, format, args...) \
sc 147 dev/pci/if_bnxreg.h printf("%s: " format, sc->bnx_dev.dv_xname, ## args); \
sc 220 dev/pci/if_bnxreg.h #define BNX_CHIP_NUM(sc) (((sc)->bnx_chipid) & 0xffff0000)
sc 224 dev/pci/if_bnxreg.h #define BNX_CHIP_REV(sc) (((sc)->bnx_chipid) & 0x0000f000)
sc 229 dev/pci/if_bnxreg.h #define BNX_CHIP_METAL(sc) (((sc)->bnx_chipid) & 0x00000ff0)
sc 230 dev/pci/if_bnxreg.h #define BNX_CHIP_BOND(bp) (((sc)->bnx_chipid) & 0x0000000f)
sc 232 dev/pci/if_bnxreg.h #define BNX_CHIP_ID(sc) (((sc)->bnx_chipid) & 0xfffffff0)
sc 240 dev/pci/if_bnxreg.h #define BNX_CHIP_BOND_ID(sc) (((sc)->bnx_chipid) & 0xf)
sc 661 dev/pci/if_bnxreg.h #define BNX_PRINTF(sc, fmt, args...) printf("%s: " fmt, sc->bnx_dev.dv_xname, ##args)
sc 663 dev/pci/if_bnxreg.h #define REG_WR(sc, reg, val) bus_space_write_4(sc->bnx_btag, sc->bnx_bhandle, reg, val)
sc 664 dev/pci/if_bnxreg.h #define REG_WR16(sc, reg, val) bus_space_write_2(sc->bnx_btag, sc->bnx_bhandle, reg, val)
sc 665 dev/pci/if_bnxreg.h #define REG_RD(sc, reg) bus_space_read_4(sc->bnx_btag, sc->bnx_bhandle, reg)
sc 666 dev/pci/if_bnxreg.h #define REG_RD_IND(sc, offset) bnx_reg_rd_ind(sc, offset)
sc 667 dev/pci/if_bnxreg.h #define REG_WR_IND(sc, offset, val) bnx_reg_wr_ind(sc, offset, val)
sc 668 dev/pci/if_bnxreg.h #define CTX_WR(sc, cid_addr, offset, val) bnx_ctx_wr(sc, cid_addr, offset, val)
sc 669 dev/pci/if_bnxreg.h #define BNX_SETBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) | (x)))
sc 670 dev/pci/if_bnxreg.h #define BNX_CLRBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) & ~(x)))
sc 140 dev/pci/if_cas.c #define DPRINTF(sc, x) if ((sc)->sc_arpcom.ac_if.if_flags & IFF_DEBUG) \
sc 143 dev/pci/if_cas.c #define DPRINTF(sc, x) /* nothing */
sc 177 dev/pci/if_cas.c cas_pci_enaddr(struct cas_softc *sc, struct pci_attach_args *pa)
sc 273 dev/pci/if_cas.c bcopy(desc, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 297 dev/pci/if_cas.c struct cas_softc *sc = (void *)self;
sc 307 dev/pci/if_cas.c sc->sc_dmatag = pa->pa_dmat;
sc 311 dev/pci/if_cas.c &sc->sc_memt, &sc->sc_memh, NULL, &size, 0) != 0) {
sc 316 dev/pci/if_cas.c if (cas_pci_enaddr(sc, pa) == 0)
sc 322 dev/pci/if_cas.c sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0)
sc 323 dev/pci/if_cas.c myetheraddr(sc->sc_arpcom.ac_enaddr);
sc 329 dev/pci/if_cas.c pci_ether_hw_addr(pa->pa_pc, sc->sc_arpcom.ac_enaddr);
sc 334 dev/pci/if_cas.c sc->sc_burst = 16; /* XXX */
sc 338 dev/pci/if_cas.c bus_space_unmap(sc->sc_memt, sc->sc_memh, size);
sc 342 dev/pci/if_cas.c sc->sc_ih = pci_intr_establish(pa->pa_pc,
sc 343 dev/pci/if_cas.c ih, IPL_NET, cas_intr, sc, self->dv_xname);
sc 344 dev/pci/if_cas.c if (sc->sc_ih == NULL) {
sc 349 dev/pci/if_cas.c bus_space_unmap(sc->sc_memt, sc->sc_memh, size);
sc 358 dev/pci/if_cas.c cas_config(sc);
sc 367 dev/pci/if_cas.c cas_config(struct cas_softc *sc)
sc 369 dev/pci/if_cas.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 370 dev/pci/if_cas.c struct mii_data *mii = &sc->sc_mii;
sc 375 dev/pci/if_cas.c ifp->if_softc = sc;
sc 376 dev/pci/if_cas.c cas_reset(sc);
sc 382 dev/pci/if_cas.c if ((error = bus_dmamem_alloc(sc->sc_dmatag,
sc 383 dev/pci/if_cas.c sizeof(struct cas_control_data), CAS_PAGE_SIZE, 0, &sc->sc_cdseg,
sc 384 dev/pci/if_cas.c 1, &sc->sc_cdnseg, 0)) != 0) {
sc 386 dev/pci/if_cas.c sc->sc_dev.dv_xname, error);
sc 391 dev/pci/if_cas.c if ((error = bus_dmamem_map(sc->sc_dmatag, &sc->sc_cdseg, sc->sc_cdnseg,
sc 392 dev/pci/if_cas.c sizeof(struct cas_control_data), (caddr_t *)&sc->sc_control_data,
sc 395 dev/pci/if_cas.c sc->sc_dev.dv_xname, error);
sc 399 dev/pci/if_cas.c if ((error = bus_dmamap_create(sc->sc_dmatag,
sc 401 dev/pci/if_cas.c sizeof(struct cas_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
sc 403 dev/pci/if_cas.c "error = %d\n", sc->sc_dev.dv_xname, error);
sc 407 dev/pci/if_cas.c if ((error = bus_dmamap_load(sc->sc_dmatag, sc->sc_cddmamap,
sc 408 dev/pci/if_cas.c sc->sc_control_data, sizeof(struct cas_control_data), NULL,
sc 411 dev/pci/if_cas.c sc->sc_dev.dv_xname, error);
sc 423 dev/pci/if_cas.c if ((error = bus_dmamem_alloc(sc->sc_dmatag, CAS_PAGE_SIZE,
sc 426 dev/pci/if_cas.c "error = %d\n", sc->sc_dev.dv_xname, i, error);
sc 429 dev/pci/if_cas.c sc->sc_rxsoft[i].rxs_dmaseg = seg;
sc 431 dev/pci/if_cas.c if ((error = bus_dmamem_map(sc->sc_dmatag, &seg, rseg,
sc 434 dev/pci/if_cas.c "error = %d\n", sc->sc_dev.dv_xname, i, error);
sc 437 dev/pci/if_cas.c sc->sc_rxsoft[i].rxs_kva = kva;
sc 439 dev/pci/if_cas.c if ((error = bus_dmamap_create(sc->sc_dmatag, CAS_PAGE_SIZE, 1,
sc 440 dev/pci/if_cas.c CAS_PAGE_SIZE, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) {
sc 442 dev/pci/if_cas.c "error = %d\n", sc->sc_dev.dv_xname, i, error);
sc 446 dev/pci/if_cas.c if ((error = bus_dmamap_load(sc->sc_dmatag,
sc 447 dev/pci/if_cas.c sc->sc_rxsoft[i].rxs_dmamap, kva, CAS_PAGE_SIZE, NULL,
sc 450 dev/pci/if_cas.c "error = %d\n", sc->sc_dev.dv_xname, i, error);
sc 459 dev/pci/if_cas.c if ((error = bus_dmamap_create(sc->sc_dmatag, MCLBYTES,
sc 461 dev/pci/if_cas.c &sc->sc_txd[i].sd_map)) != 0) {
sc 463 dev/pci/if_cas.c "error = %d\n", sc->sc_dev.dv_xname, i, error);
sc 466 dev/pci/if_cas.c sc->sc_txd[i].sd_mbuf = NULL;
sc 476 dev/pci/if_cas.c printf(", address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 479 dev/pci/if_cas.c sc->sc_rxfifosize = 16 * 1024;
sc 482 dev/pci/if_cas.c strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, sizeof ifp->if_xname);
sc 483 dev/pci/if_cas.c ifp->if_softc = sc;
sc 502 dev/pci/if_cas.c bus_space_write_4(sc->sc_memt, sc->sc_memh, CAS_MII_DATAPATH_MODE, 0);
sc 504 dev/pci/if_cas.c cas_mifinit(sc);
sc 506 dev/pci/if_cas.c if (sc->sc_mif_config & CAS_MIF_CONFIG_MDI1) {
sc 507 dev/pci/if_cas.c sc->sc_mif_config |= CAS_MIF_CONFIG_PHY_SEL;
sc 508 dev/pci/if_cas.c bus_space_write_4(sc->sc_memt, sc->sc_memh,
sc 509 dev/pci/if_cas.c CAS_MIF_CONFIG, sc->sc_mif_config);
sc 512 dev/pci/if_cas.c mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY,
sc 517 dev/pci/if_cas.c sc->sc_mif_config & (CAS_MIF_CONFIG_MDI0|CAS_MIF_CONFIG_MDI1)) {
sc 522 dev/pci/if_cas.c bus_space_write_4(sc->sc_memt, sc->sc_memh,
sc 525 dev/pci/if_cas.c bus_space_write_4(sc->sc_memt, sc->sc_memh,
sc 529 dev/pci/if_cas.c bus_space_write_4(sc->sc_memt, sc->sc_memh,
sc 535 dev/pci/if_cas.c mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY,
sc 542 dev/pci/if_cas.c ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_MANUAL, 0, NULL);
sc 543 dev/pci/if_cas.c ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_MANUAL);
sc 561 dev/pci/if_cas.c sc->sc_dev.dv_xname,
sc 567 dev/pci/if_cas.c sc->sc_phys[child->mii_inst] = child->mii_phy;
sc 574 dev/pci/if_cas.c ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_AUTO);
sc 581 dev/pci/if_cas.c sc->sc_sh = shutdownhook_establish(cas_shutdown, sc);
sc 582 dev/pci/if_cas.c if (sc->sc_sh == NULL)
sc 585 dev/pci/if_cas.c timeout_set(&sc->sc_tick_ch, cas_tick, sc);
sc 594 dev/pci/if_cas.c if (sc->sc_txd[i].sd_map != NULL)
sc 595 dev/pci/if_cas.c bus_dmamap_destroy(sc->sc_dmatag,
sc 596 dev/pci/if_cas.c sc->sc_txd[i].sd_map);
sc 600 dev/pci/if_cas.c if (sc->sc_rxsoft[i].rxs_dmamap != NULL)
sc 601 dev/pci/if_cas.c bus_dmamap_destroy(sc->sc_dmatag,
sc 602 dev/pci/if_cas.c sc->sc_rxsoft[i].rxs_dmamap);
sc 604 dev/pci/if_cas.c bus_dmamap_unload(sc->sc_dmatag, sc->sc_cddmamap);
sc 606 dev/pci/if_cas.c bus_dmamap_destroy(sc->sc_dmatag, sc->sc_cddmamap);
sc 608 dev/pci/if_cas.c bus_dmamem_unmap(sc->sc_dmatag, (caddr_t)sc->sc_control_data,
sc 611 dev/pci/if_cas.c bus_dmamem_free(sc->sc_dmatag, &sc->sc_cdseg, sc->sc_cdnseg);
sc 620 dev/pci/if_cas.c struct cas_softc *sc = arg;
sc 621 dev/pci/if_cas.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 622 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 623 dev/pci/if_cas.c bus_space_handle_t mac = sc->sc_memh;
sc 640 dev/pci/if_cas.c mii_tick(&sc->sc_mii);
sc 643 dev/pci/if_cas.c timeout_add(&sc->sc_tick_ch, hz);
sc 647 dev/pci/if_cas.c cas_bitwait(struct cas_softc *sc, bus_space_handle_t h, int r,
sc 654 dev/pci/if_cas.c reg = bus_space_read_4(sc->sc_memt, h, r);
sc 663 dev/pci/if_cas.c cas_reset(struct cas_softc *sc)
sc 665 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 666 dev/pci/if_cas.c bus_space_handle_t h = sc->sc_memh;
sc 670 dev/pci/if_cas.c DPRINTF(sc, ("%s: cas_reset\n", sc->sc_dev.dv_xname));
sc 671 dev/pci/if_cas.c cas_reset_rx(sc);
sc 672 dev/pci/if_cas.c cas_reset_tx(sc);
sc 676 dev/pci/if_cas.c if (!cas_bitwait(sc, h, CAS_RESET, CAS_RESET_RX | CAS_RESET_TX, 0))
sc 677 dev/pci/if_cas.c printf("%s: cannot reset device\n", sc->sc_dev.dv_xname);
sc 688 dev/pci/if_cas.c cas_rxdrain(struct cas_softc *sc)
sc 699 dev/pci/if_cas.c struct cas_softc *sc = (struct cas_softc *)ifp->if_softc;
sc 703 dev/pci/if_cas.c DPRINTF(sc, ("%s: cas_stop\n", sc->sc_dev.dv_xname));
sc 705 dev/pci/if_cas.c timeout_del(&sc->sc_tick_ch);
sc 713 dev/pci/if_cas.c mii_down(&sc->sc_mii);
sc 715 dev/pci/if_cas.c cas_reset_rx(sc);
sc 716 dev/pci/if_cas.c cas_reset_tx(sc);
sc 722 dev/pci/if_cas.c sd = &sc->sc_txd[i];
sc 724 dev/pci/if_cas.c bus_dmamap_sync(sc->sc_dmatag, sd->sd_map, 0,
sc 726 dev/pci/if_cas.c bus_dmamap_unload(sc->sc_dmatag, sd->sd_map);
sc 731 dev/pci/if_cas.c sc->sc_tx_cnt = sc->sc_tx_prod = sc->sc_tx_cons = 0;
sc 734 dev/pci/if_cas.c cas_rxdrain(sc);
sc 742 dev/pci/if_cas.c cas_reset_rx(struct cas_softc *sc)
sc 744 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 745 dev/pci/if_cas.c bus_space_handle_t h = sc->sc_memh;
sc 751 dev/pci/if_cas.c cas_disable_rx(sc);
sc 754 dev/pci/if_cas.c if (!cas_bitwait(sc, h, CAS_RX_CONFIG, 1, 0))
sc 755 dev/pci/if_cas.c printf("%s: cannot disable rx dma\n", sc->sc_dev.dv_xname);
sc 762 dev/pci/if_cas.c if (!cas_bitwait(sc, h, CAS_RESET, CAS_RESET_RX, 0)) {
sc 763 dev/pci/if_cas.c printf("%s: cannot reset receiver\n", sc->sc_dev.dv_xname);
sc 774 dev/pci/if_cas.c cas_reset_tx(struct cas_softc *sc)
sc 776 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 777 dev/pci/if_cas.c bus_space_handle_t h = sc->sc_memh;
sc 783 dev/pci/if_cas.c cas_disable_tx(sc);
sc 786 dev/pci/if_cas.c if (!cas_bitwait(sc, h, CAS_TX_CONFIG, 1, 0))
sc 787 dev/pci/if_cas.c printf("%s: cannot disable tx dma\n", sc->sc_dev.dv_xname);
sc 794 dev/pci/if_cas.c if (!cas_bitwait(sc, h, CAS_RESET, CAS_RESET_TX, 0)) {
sc 796 dev/pci/if_cas.c sc->sc_dev.dv_xname);
sc 806 dev/pci/if_cas.c cas_disable_rx(struct cas_softc *sc)
sc 808 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 809 dev/pci/if_cas.c bus_space_handle_t h = sc->sc_memh;
sc 818 dev/pci/if_cas.c return (cas_bitwait(sc, h, CAS_MAC_RX_CONFIG, CAS_MAC_RX_ENABLE, 0));
sc 825 dev/pci/if_cas.c cas_disable_tx(struct cas_softc *sc)
sc 827 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 828 dev/pci/if_cas.c bus_space_handle_t h = sc->sc_memh;
sc 837 dev/pci/if_cas.c return (cas_bitwait(sc, h, CAS_MAC_TX_CONFIG, CAS_MAC_TX_ENABLE, 0));
sc 844 dev/pci/if_cas.c cas_meminit(struct cas_softc *sc)
sc 855 dev/pci/if_cas.c sc->sc_txdescs[i].cd_flags = 0;
sc 856 dev/pci/if_cas.c sc->sc_txdescs[i].cd_addr = 0;
sc 858 dev/pci/if_cas.c CAS_CDTXSYNC(sc, 0, CAS_NTXDESC,
sc 866 dev/pci/if_cas.c CAS_INIT_RXDESC(sc, i, i);
sc 867 dev/pci/if_cas.c sc->sc_rxdptr = 0;
sc 868 dev/pci/if_cas.c sc->sc_rxptr = 0;
sc 874 dev/pci/if_cas.c sc->sc_rxcomps[i].cc_word[0] = 0;
sc 875 dev/pci/if_cas.c sc->sc_rxcomps[i].cc_word[1] = 0;
sc 876 dev/pci/if_cas.c sc->sc_rxcomps[i].cc_word[2] = 0;
sc 877 dev/pci/if_cas.c sc->sc_rxcomps[i].cc_word[3] = CAS_DMA_WRITE(CAS_RC3_OWN);
sc 878 dev/pci/if_cas.c CAS_CDRXCSYNC(sc, i,
sc 934 dev/pci/if_cas.c struct cas_softc *sc = (struct cas_softc *)ifp->if_softc;
sc 935 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 936 dev/pci/if_cas.c bus_space_handle_t h = sc->sc_memh;
sc 943 dev/pci/if_cas.c DPRINTF(sc, ("%s: cas_init: calling stop\n", sc->sc_dev.dv_xname));
sc 953 dev/pci/if_cas.c cas_reset(sc);
sc 954 dev/pci/if_cas.c DPRINTF(sc, ("%s: cas_init: restarting\n", sc->sc_dev.dv_xname));
sc 957 dev/pci/if_cas.c cas_mifinit(sc);
sc 960 dev/pci/if_cas.c cas_meminit(sc);
sc 963 dev/pci/if_cas.c cas_init_regs(sc);
sc 969 dev/pci/if_cas.c cas_setladrf(sc);
sc 972 dev/pci/if_cas.c KASSERT((CAS_CDTXADDR(sc, 0) & 0x1fff) == 0);
sc 974 dev/pci/if_cas.c (((uint64_t)CAS_CDTXADDR(sc,0)) >> 32));
sc 975 dev/pci/if_cas.c bus_space_write_4(t, h, CAS_TX_RING_PTR_LO, CAS_CDTXADDR(sc, 0));
sc 977 dev/pci/if_cas.c KASSERT((CAS_CDRXADDR(sc, 0) & 0x1fff) == 0);
sc 979 dev/pci/if_cas.c (((uint64_t)CAS_CDRXADDR(sc,0)) >> 32));
sc 980 dev/pci/if_cas.c bus_space_write_4(t, h, CAS_RX_DRING_PTR_LO, CAS_CDRXADDR(sc, 0));
sc 982 dev/pci/if_cas.c KASSERT((CAS_CDRXCADDR(sc, 0) & 0x1fff) == 0);
sc 984 dev/pci/if_cas.c (((uint64_t)CAS_CDRXCADDR(sc,0)) >> 32));
sc 985 dev/pci/if_cas.c bus_space_write_4(t, h, CAS_RX_CRING_PTR_LO, CAS_CDRXCADDR(sc, 0));
sc 1026 dev/pci/if_cas.c (3 * sc->sc_rxfifosize / 256) |
sc 1027 dev/pci/if_cas.c ( (sc->sc_rxfifosize / 256) << 12));
sc 1031 dev/pci/if_cas.c mii_mediachg(&sc->sc_mii);
sc 1044 dev/pci/if_cas.c timeout_add(&sc->sc_tick_ch, hz);
sc 1055 dev/pci/if_cas.c cas_init_regs(struct cas_softc *sc)
sc 1057 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 1058 dev/pci/if_cas.c bus_space_handle_t h = sc->sc_memh;
sc 1062 dev/pci/if_cas.c sc->sc_inited = 0;
sc 1063 dev/pci/if_cas.c if (!sc->sc_inited) {
sc 1081 dev/pci/if_cas.c ((sc->sc_arpcom.ac_enaddr[5]<<8)|sc->sc_arpcom.ac_enaddr[4])&0x3ff);
sc 1104 dev/pci/if_cas.c sc->sc_inited = 1;
sc 1127 dev/pci/if_cas.c (sc->sc_arpcom.ac_enaddr[4]<<8) | sc->sc_arpcom.ac_enaddr[5]);
sc 1129 dev/pci/if_cas.c (sc->sc_arpcom.ac_enaddr[2]<<8) | sc->sc_arpcom.ac_enaddr[3]);
sc 1131 dev/pci/if_cas.c (sc->sc_arpcom.ac_enaddr[0]<<8) | sc->sc_arpcom.ac_enaddr[1]);
sc 1138 dev/pci/if_cas.c cas_rint(struct cas_softc *sc)
sc 1140 dev/pci/if_cas.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1141 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 1142 dev/pci/if_cas.c bus_space_handle_t h = sc->sc_memh;
sc 1150 dev/pci/if_cas.c for (i = sc->sc_rxptr;; i = CAS_NEXTRX(i + skip)) {
sc 1151 dev/pci/if_cas.c CAS_CDRXCSYNC(sc, i,
sc 1154 dev/pci/if_cas.c word[0] = CAS_DMA_READ(sc->sc_rxcomps[i].cc_word[0]);
sc 1155 dev/pci/if_cas.c word[1] = CAS_DMA_READ(sc->sc_rxcomps[i].cc_word[1]);
sc 1156 dev/pci/if_cas.c word[2] = CAS_DMA_READ(sc->sc_rxcomps[i].cc_word[2]);
sc 1157 dev/pci/if_cas.c word[3] = CAS_DMA_READ(sc->sc_rxcomps[i].cc_word[3]);
sc 1167 dev/pci/if_cas.c rxs = &sc->sc_rxsoft[idx];
sc 1169 dev/pci/if_cas.c DPRINTF(sc, ("hdr at idx %d, off %d, len %d\n",
sc 1172 dev/pci/if_cas.c bus_dmamap_sync(sc->sc_dmatag, rxs->rxs_dmamap, 0,
sc 1179 dev/pci/if_cas.c cas_add_rxbuf(sc, idx);
sc 1203 dev/pci/if_cas.c rxs = &sc->sc_rxsoft[idx];
sc 1205 dev/pci/if_cas.c DPRINTF(sc, ("data at idx %d, off %d, len %d\n",
sc 1208 dev/pci/if_cas.c bus_dmamap_sync(sc->sc_dmatag, rxs->rxs_dmamap, 0,
sc 1216 dev/pci/if_cas.c cas_add_rxbuf(sc, idx);
sc 1242 dev/pci/if_cas.c while (sc->sc_rxptr != i) {
sc 1243 dev/pci/if_cas.c sc->sc_rxcomps[sc->sc_rxptr].cc_word[0] = 0;
sc 1244 dev/pci/if_cas.c sc->sc_rxcomps[sc->sc_rxptr].cc_word[1] = 0;
sc 1245 dev/pci/if_cas.c sc->sc_rxcomps[sc->sc_rxptr].cc_word[2] = 0;
sc 1246 dev/pci/if_cas.c sc->sc_rxcomps[sc->sc_rxptr].cc_word[3] =
sc 1248 dev/pci/if_cas.c CAS_CDRXCSYNC(sc, sc->sc_rxptr,
sc 1251 dev/pci/if_cas.c sc->sc_rxptr = CAS_NEXTRX(sc->sc_rxptr);
sc 1254 dev/pci/if_cas.c bus_space_write_4(t, h, CAS_RX_COMP_TAIL, sc->sc_rxptr);
sc 1256 dev/pci/if_cas.c DPRINTF(sc, ("cas_rint: done sc->rxptr %d, complete %d\n",
sc 1257 dev/pci/if_cas.c sc->sc_rxptr, bus_space_read_4(t, h, CAS_RX_COMPLETION)));
sc 1268 dev/pci/if_cas.c cas_add_rxbuf(struct cas_softc *sc, int idx)
sc 1270 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 1271 dev/pci/if_cas.c bus_space_handle_t h = sc->sc_memh;
sc 1273 dev/pci/if_cas.c CAS_INIT_RXDESC(sc, sc->sc_rxdptr, idx);
sc 1275 dev/pci/if_cas.c if ((sc->sc_rxdptr % 4) == 0)
sc 1276 dev/pci/if_cas.c bus_space_write_4(t, h, CAS_RX_KICK, sc->sc_rxdptr);
sc 1278 dev/pci/if_cas.c sc->sc_rxdptr++;
sc 1283 dev/pci/if_cas.c cas_eint(struct cas_softc *sc, u_int status)
sc 1287 dev/pci/if_cas.c printf("%s: link status changed\n", sc->sc_dev.dv_xname);
sc 1292 dev/pci/if_cas.c printf("%s: status=%b\n", sc->sc_dev.dv_xname, status, CAS_INTR_BITS);
sc 1297 dev/pci/if_cas.c cas_pint(struct cas_softc *sc)
sc 1299 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 1300 dev/pci/if_cas.c bus_space_handle_t seb = sc->sc_memh;
sc 1307 dev/pci/if_cas.c printf("%s: link status changed\n", sc->sc_dev.dv_xname);
sc 1315 dev/pci/if_cas.c struct cas_softc *sc = (struct cas_softc *)v;
sc 1316 dev/pci/if_cas.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1317 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 1318 dev/pci/if_cas.c bus_space_handle_t seb = sc->sc_memh;
sc 1323 dev/pci/if_cas.c DPRINTF(sc, ("%s: cas_intr: cplt %xstatus %b\n",
sc 1324 dev/pci/if_cas.c sc->sc_dev.dv_xname, (status>>19), status, CAS_INTR_BITS));
sc 1327 dev/pci/if_cas.c r |= cas_pint(sc);
sc 1331 dev/pci/if_cas.c r |= cas_eint(sc, status);
sc 1334 dev/pci/if_cas.c r |= cas_tint(sc, status);
sc 1337 dev/pci/if_cas.c r |= cas_rint(sc);
sc 1345 dev/pci/if_cas.c sc->sc_dev.dv_xname, txstat);
sc 1355 dev/pci/if_cas.c sc->sc_dev.dv_xname, rxstat);
sc 1368 dev/pci/if_cas.c sc->sc_dev.dv_xname, rxstat);
sc 1378 dev/pci/if_cas.c struct cas_softc *sc = ifp->if_softc;
sc 1380 dev/pci/if_cas.c DPRINTF(sc, ("cas_watchdog: CAS_RX_CONFIG %x CAS_MAC_RX_STATUS %x "
sc 1382 dev/pci/if_cas.c bus_space_read_4(sc->sc_memt, sc->sc_memh, CAS_RX_CONFIG),
sc 1383 dev/pci/if_cas.c bus_space_read_4(sc->sc_memt, sc->sc_memh, CAS_MAC_RX_STATUS),
sc 1384 dev/pci/if_cas.c bus_space_read_4(sc->sc_memt, sc->sc_memh, CAS_MAC_RX_CONFIG)));
sc 1386 dev/pci/if_cas.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1397 dev/pci/if_cas.c cas_mifinit(struct cas_softc *sc)
sc 1399 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 1400 dev/pci/if_cas.c bus_space_handle_t mif = sc->sc_memh;
sc 1403 dev/pci/if_cas.c sc->sc_mif_config = bus_space_read_4(t, mif, CAS_MIF_CONFIG);
sc 1404 dev/pci/if_cas.c sc->sc_mif_config &= ~CAS_MIF_CONFIG_BB_ENA;
sc 1405 dev/pci/if_cas.c bus_space_write_4(t, mif, CAS_MIF_CONFIG, sc->sc_mif_config);
sc 1425 dev/pci/if_cas.c struct cas_softc *sc = (void *)self;
sc 1426 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 1427 dev/pci/if_cas.c bus_space_handle_t mif = sc->sc_memh;
sc 1432 dev/pci/if_cas.c if (sc->sc_debug)
sc 1448 dev/pci/if_cas.c printf("%s: mii_read timeout\n", sc->sc_dev.dv_xname);
sc 1455 dev/pci/if_cas.c struct cas_softc *sc = (void *)self;
sc 1456 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 1457 dev/pci/if_cas.c bus_space_handle_t mif = sc->sc_memh;
sc 1462 dev/pci/if_cas.c if (sc->sc_debug)
sc 1491 dev/pci/if_cas.c printf("%s: mii_write timeout\n", sc->sc_dev.dv_xname);
sc 1497 dev/pci/if_cas.c struct cas_softc *sc = (void *)dev;
sc 1499 dev/pci/if_cas.c int instance = IFM_INST(sc->sc_mii.mii_media.ifm_cur->ifm_media);
sc 1501 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 1502 dev/pci/if_cas.c bus_space_handle_t mac = sc->sc_memh;
sc 1506 dev/pci/if_cas.c if (sc->sc_debug)
sc 1508 dev/pci/if_cas.c sc->sc_phys[instance]);
sc 1516 dev/pci/if_cas.c if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0) {
sc 1526 dev/pci/if_cas.c if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0)
sc 1533 dev/pci/if_cas.c switch (IFM_SUBTYPE(sc->sc_mii.mii_media_active)) {
sc 1547 dev/pci/if_cas.c struct cas_softc *sc = (void *)self;
sc 1548 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 1549 dev/pci/if_cas.c bus_space_handle_t pcs = sc->sc_memh;
sc 1552 dev/pci/if_cas.c if (sc->sc_debug)
sc 1584 dev/pci/if_cas.c struct cas_softc *sc = (void *)self;
sc 1585 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 1586 dev/pci/if_cas.c bus_space_handle_t pcs = sc->sc_memh;
sc 1589 dev/pci/if_cas.c if (sc->sc_debug)
sc 1627 dev/pci/if_cas.c struct cas_softc *sc = ifp->if_softc;
sc 1628 dev/pci/if_cas.c struct mii_data *mii = &sc->sc_mii;
sc 1636 dev/pci/if_cas.c return (mii_mediachg(&sc->sc_mii));
sc 1642 dev/pci/if_cas.c struct cas_softc *sc = ifp->if_softc;
sc 1644 dev/pci/if_cas.c mii_pollstat(&sc->sc_mii);
sc 1645 dev/pci/if_cas.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 1646 dev/pci/if_cas.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 1655 dev/pci/if_cas.c struct cas_softc *sc = ifp->if_softc;
sc 1662 dev/pci/if_cas.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 1675 dev/pci/if_cas.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 1682 dev/pci/if_cas.c ((ifp->if_flags ^ sc->sc_if_flags) &
sc 1684 dev/pci/if_cas.c cas_setladrf(sc);
sc 1693 dev/pci/if_cas.c sc->sc_if_flags = ifp->if_flags;
sc 1696 dev/pci/if_cas.c sc->sc_debug = (ifp->if_flags & IFF_DEBUG) != 0 ? 1 : 0;
sc 1711 dev/pci/if_cas.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 1712 dev/pci/if_cas.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 1720 dev/pci/if_cas.c cas_setladrf(sc);
sc 1727 dev/pci/if_cas.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
sc 1743 dev/pci/if_cas.c struct cas_softc *sc = (struct cas_softc *)arg;
sc 1744 dev/pci/if_cas.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1753 dev/pci/if_cas.c cas_setladrf(struct cas_softc *sc)
sc 1755 dev/pci/if_cas.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1758 dev/pci/if_cas.c struct arpcom *ac = &sc->sc_arpcom;
sc 1759 dev/pci/if_cas.c bus_space_tag_t t = sc->sc_memt;
sc 1760 dev/pci/if_cas.c bus_space_handle_t h = sc->sc_memh;
sc 1839 dev/pci/if_cas.c cas_encap(struct cas_softc *sc, struct mbuf *mhead, u_int32_t *bixp)
sc 1846 dev/pci/if_cas.c map = sc->sc_txd[cur].sd_map;
sc 1848 dev/pci/if_cas.c if (bus_dmamap_load_mbuf(sc->sc_dmatag, map, mhead,
sc 1853 dev/pci/if_cas.c if ((sc->sc_tx_cnt + map->dm_nsegs) > (CAS_NTXDESC - 2)) {
sc 1854 dev/pci/if_cas.c bus_dmamap_unload(sc->sc_dmatag, map);
sc 1858 dev/pci/if_cas.c bus_dmamap_sync(sc->sc_dmatag, map, 0, map->dm_mapsize,
sc 1862 dev/pci/if_cas.c sc->sc_txdescs[frag].cd_addr =
sc 1867 dev/pci/if_cas.c sc->sc_txdescs[frag].cd_flags = CAS_DMA_WRITE(flags);
sc 1868 dev/pci/if_cas.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_cddmamap,
sc 1876 dev/pci/if_cas.c sc->sc_tx_cnt += map->dm_nsegs;
sc 1877 dev/pci/if_cas.c sc->sc_txd[*bixp].sd_map = sc->sc_txd[cur].sd_map;
sc 1878 dev/pci/if_cas.c sc->sc_txd[cur].sd_map = map;
sc 1879 dev/pci/if_cas.c sc->sc_txd[cur].sd_mbuf = mhead;
sc 1881 dev/pci/if_cas.c bus_space_write_4(sc->sc_memt, sc->sc_memh, CAS_TX_KICK, frag);
sc 1894 dev/pci/if_cas.c cas_tint(struct cas_softc *sc, u_int32_t status)
sc 1896 dev/pci/if_cas.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1901 dev/pci/if_cas.c cons = sc->sc_tx_cons;
sc 1903 dev/pci/if_cas.c sd = &sc->sc_txd[cons];
sc 1905 dev/pci/if_cas.c bus_dmamap_sync(sc->sc_dmatag, sd->sd_map, 0,
sc 1907 dev/pci/if_cas.c bus_dmamap_unload(sc->sc_dmatag, sd->sd_map);
sc 1911 dev/pci/if_cas.c sc->sc_tx_cnt--;
sc 1916 dev/pci/if_cas.c sc->sc_tx_cons = cons;
sc 1920 dev/pci/if_cas.c if (sc->sc_tx_cnt == 0)
sc 1929 dev/pci/if_cas.c struct cas_softc *sc = ifp->if_softc;
sc 1936 dev/pci/if_cas.c bix = sc->sc_tx_prod;
sc 1937 dev/pci/if_cas.c while (sc->sc_txd[bix].sd_mbuf == NULL) {
sc 1955 dev/pci/if_cas.c if (cas_encap(sc, m, &bix)) {
sc 1964 dev/pci/if_cas.c sc->sc_tx_prod = bix;
sc 180 dev/pci/if_casvar.h #define CAS_CURRENT_MEDIA(sc) \
sc 181 dev/pci/if_casvar.h (IFM_SUBTYPE((sc)->sc_mii.mii_media.ifm_cur->ifm_media) != IFM_AUTO ? \
sc 182 dev/pci/if_casvar.h (sc)->sc_mii.mii_media.ifm_cur : (sc)->sc_nway_active)
sc 188 dev/pci/if_casvar.h #define CAS_MEDIA_NEEDSRESET(sc, newbits) \
sc 189 dev/pci/if_casvar.h (((sc)->sc_opmode & OPMODE_MEDIA_BITS) != \
sc 192 dev/pci/if_casvar.h #define CAS_CDTXADDR(sc, x) ((sc)->sc_cddma + CAS_CDTXOFF((x)))
sc 193 dev/pci/if_casvar.h #define CAS_CDRXADDR(sc, x) ((sc)->sc_cddma + CAS_CDRXOFF((x)))
sc 194 dev/pci/if_casvar.h #define CAS_CDRXCADDR(sc, x) ((sc)->sc_cddma + CAS_CDRXCOFF((x)))
sc 196 dev/pci/if_casvar.h #define CAS_CDTXSYNC(sc, x, n, ops) \
sc 205 dev/pci/if_casvar.h bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap, \
sc 213 dev/pci/if_casvar.h bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap, \
sc 217 dev/pci/if_casvar.h #define CAS_CDRXSYNC(sc, x, ops) \
sc 218 dev/pci/if_casvar.h bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap, \
sc 221 dev/pci/if_casvar.h #define CAS_CDRXCSYNC(sc, x, ops) \
sc 222 dev/pci/if_casvar.h bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap, \
sc 225 dev/pci/if_casvar.h #define CAS_INIT_RXDESC(sc, d, s) \
sc 227 dev/pci/if_casvar.h struct cas_rxsoft *__rxs = &sc->sc_rxsoft[(s)]; \
sc 228 dev/pci/if_casvar.h struct cas_desc *__rxd = &sc->sc_rxdescs[(d)]; \
sc 234 dev/pci/if_casvar.h CAS_CDRXSYNC((sc), (d), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
sc 350 dev/pci/if_che.c struct cheg_softc *sc = (struct cheg_softc *)self;
sc 362 dev/pci/if_che.c sc->sc_dmat = pa->pa_dmat;
sc 365 dev/pci/if_che.c if (pci_mapreg_map(pa, CHE_PCI_BAR, memtype, 0, &sc->sc_memt,
sc 366 dev/pci/if_che.c &sc->sc_memh, NULL, &sc->sc_mems, 0) != 0) {
sc 376 dev/pci/if_che.c sc->sc_rev = che_read(sc, CHE_REG_PL_REV);
sc 379 dev/pci/if_che.c che_reset(sc);
sc 381 dev/pci/if_che.c if (che_read_flash_multi4(sc, FW_VERS_ADDR, &vers, 1) != 0) {
sc 386 dev/pci/if_che.c if (che_get_vpd(sc, pa, &vpd, sizeof(vpd)/sizeof(u_int32_t)) != 0) {
sc 392 dev/pci/if_che.c pci_intr_string(pa->pa_pc, caa.caa_ih), sc->sc_rev,
sc 396 dev/pci/if_che.c sc->sc_product = PCI_PRODUCT(pa->pa_id);
sc 397 dev/pci/if_che.c sc->sc_cclk = che_conv_num(vpd.cclk_data, sizeof(vpd.cclk_data));
sc 398 dev/pci/if_che.c sc->sc_mdc = che_conv_num(vpd.mdc_data, sizeof(vpd.mdc_data));
sc 400 dev/pci/if_che.c che_hw_init(sc);
sc 421 dev/pci/if_che.c bus_space_unmap(sc->sc_memt, sc->sc_memh, sc->sc_mems);
sc 422 dev/pci/if_che.c sc->sc_mems = 0;
sc 448 dev/pci/if_che.c struct che_softc *sc = (struct che_softc *)self;
sc 452 dev/pci/if_che.c sc->sc_cheg = gsc;
sc 454 dev/pci/if_che.c sc->sc_port = caa->caa_port;
sc 455 dev/pci/if_che.c bcopy(caa->caa_lladdr, sc->sc_ac.ac_enaddr, ETHER_ADDR_LEN);
sc 457 dev/pci/if_che.c printf(": address %s\n", ether_sprintf(sc->sc_ac.ac_enaddr));
sc 459 dev/pci/if_che.c ifp = &sc->sc_ac.ac_if;
sc 460 dev/pci/if_che.c ifp->if_softc = sc;
sc 466 dev/pci/if_che.c strlcpy(ifp->if_xname, DEVNAME(sc), IFNAMSIZ);
sc 470 dev/pci/if_che.c ifmedia_init(&sc->sc_mii.mii_media, 0,
sc 473 dev/pci/if_che.c sc->sc_mii.mii_ifp = ifp;
sc 474 dev/pci/if_che.c sc->sc_mii.mii_readreg = che_miibus_ind_readreg;
sc 475 dev/pci/if_che.c sc->sc_mii.mii_writereg = che_miibus_ind_writereg;
sc 476 dev/pci/if_che.c sc->sc_mii.mii_statchg = che_miibus_statchg;
sc 478 dev/pci/if_che.c mii_attach(self, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
sc 481 dev/pci/if_che.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 482 dev/pci/if_che.c printf("%s: no PHY found!\n", sc->sc_dev.dv_xname);
sc 483 dev/pci/if_che.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_MANUAL,
sc 485 dev/pci/if_che.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_MANUAL);
sc 487 dev/pci/if_che.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 496 dev/pci/if_che.c che_write_flash_reg(struct cheg_softc *sc, size_t bcnt, int cont, u_int32_t v)
sc 498 dev/pci/if_che.c if (che_read(sc, CHE_REG_SF_OP) & CHE_SF_F_BUSY)
sc 501 dev/pci/if_che.c che_write(sc, CHE_REG_SF_DATA, v);
sc 502 dev/pci/if_che.c che_write(sc, CHE_REG_SF_OP, CHE_SF_CONT(cont) |
sc 505 dev/pci/if_che.c return (che_waitfor(sc, CHE_REG_SF_OP, CHE_SF_F_BUSY, 5));
sc 509 dev/pci/if_che.c che_read_flash_reg(struct cheg_softc *sc, size_t bcnt, int cont, u_int32_t *vp)
sc 511 dev/pci/if_che.c if (che_read(sc, CHE_REG_SF_OP) & CHE_SF_F_BUSY)
sc 514 dev/pci/if_che.c che_write(sc, CHE_REG_SF_OP, CHE_SF_CONT(cont) |
sc 517 dev/pci/if_che.c if (che_waitfor(sc, CHE_REG_SF_OP, CHE_SF_F_BUSY, 5))
sc 520 dev/pci/if_che.c *vp = che_read(sc, CHE_REG_SF_DATA);
sc 525 dev/pci/if_che.c che_read_flash_multi4(struct cheg_softc *sc, u_int addr, u_int32_t *datap,
sc 531 dev/pci/if_che.c panic("%s: che_read_flash_multi4 bad params\n", DEVNAME(sc));
sc 535 dev/pci/if_che.c if ((rv = che_write_flash_reg(sc, 4, 1, addr)))
sc 537 dev/pci/if_che.c if ((rv = che_read_flash_reg(sc, 1, 1, datap)))
sc 541 dev/pci/if_che.c if ((rv = che_read_flash_reg(sc, 4, count > 1, datap)))
sc 550 dev/pci/if_che.c che_read_eeprom(struct cheg_softc *sc, struct pci_attach_args *pa,
sc 559 dev/pci/if_che.c DEVNAME(sc), addr);
sc 574 dev/pci/if_che.c DEVNAME(sc), addr);
sc 583 dev/pci/if_che.c che_get_vpd(struct cheg_softc *sc, struct pci_attach_args *pa,
sc 594 dev/pci/if_che.c if (che_read_eeprom(sc, pa, CHE_PCI_VPD_BASE, &dw0))
sc 601 dev/pci/if_che.c if (che_read_eeprom(sc, pa, addr + i * 4, &dw[i]))
sc 651 dev/pci/if_che.c che_reset(struct cheg_softc *sc)
sc 653 dev/pci/if_che.c che_write(sc, CHE_REG_PL_RST, CHE_RST_F_CRSTWRM |
sc 681 dev/pci/if_che.c struct che_softc *sc = ifp->if_softc;
sc 683 dev/pci/if_che.c mii_mediachg(&sc->sc_mii);
sc 690 dev/pci/if_che.c struct che_softc *sc = ifp->if_softc;
sc 692 dev/pci/if_che.c mii_pollstat(&sc->sc_mii);
sc 693 dev/pci/if_che.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 694 dev/pci/if_che.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 700 dev/pci/if_che.c struct che_softc *sc = (struct che_softc *)dev;
sc 703 dev/pci/if_che.c che_write(sc->sc_cheg, CHE_REG_MI1_ADDR, addr);
sc 704 dev/pci/if_che.c che_write(sc->sc_cheg, CHE_REG_MI1_OP, CHE_MI1_OP(2));
sc 706 dev/pci/if_che.c if (che_waitfor(sc->sc_cheg, CHE_REG_MI1_OP, CHE_MI1_F_BUSY, 20))
sc 709 dev/pci/if_che.c return ((int)che_read(sc->sc_cheg, CHE_REG_MI1_DATA));
sc 715 dev/pci/if_che.c struct che_softc *sc = (struct che_softc *)dev;
sc 718 dev/pci/if_che.c che_write(sc->sc_cheg, CHE_REG_MI1_ADDR, addr);
sc 719 dev/pci/if_che.c che_write(sc->sc_cheg, CHE_REG_MI1_DATA, val);
sc 720 dev/pci/if_che.c che_write(sc->sc_cheg, CHE_REG_MI1_OP, CHE_MI1_OP(1));
sc 721 dev/pci/if_che.c che_waitfor(sc->sc_cheg, CHE_REG_MI1_OP, CHE_MI1_F_BUSY, 20);
sc 727 dev/pci/if_che.c struct che_softc *sc = (struct che_softc *)dev;
sc 729 dev/pci/if_che.c che_write(sc->sc_cheg, CHE_REG_MI1_ADDR, CHE_MI1_PHYADDR(phy));
sc 730 dev/pci/if_che.c che_write(sc->sc_cheg, CHE_REG_MI1_DATA, reg);
sc 731 dev/pci/if_che.c che_write(sc->sc_cheg, CHE_REG_MI1_OP, CHE_MI1_OP(0));
sc 733 dev/pci/if_che.c if (che_waitfor(sc->sc_cheg, CHE_REG_MI1_OP, CHE_MI1_F_BUSY, 20))
sc 736 dev/pci/if_che.c che_write(sc->sc_cheg, CHE_REG_MI1_OP, CHE_MI1_OP(3));
sc 738 dev/pci/if_che.c if (che_waitfor(sc->sc_cheg, CHE_REG_MI1_OP, CHE_MI1_F_BUSY, 20))
sc 741 dev/pci/if_che.c return ((int)che_read(sc->sc_cheg, CHE_REG_MI1_DATA));
sc 747 dev/pci/if_che.c struct che_softc *sc = (struct che_softc *)dev;
sc 749 dev/pci/if_che.c che_write(sc->sc_cheg, CHE_REG_MI1_ADDR, CHE_MI1_PHYADDR(phy));
sc 750 dev/pci/if_che.c che_write(sc->sc_cheg, CHE_REG_MI1_DATA, reg);
sc 751 dev/pci/if_che.c che_write(sc->sc_cheg, CHE_REG_MI1_OP, CHE_MI1_OP(0));
sc 753 dev/pci/if_che.c if (che_waitfor(sc->sc_cheg, CHE_REG_MI1_OP, CHE_MI1_F_BUSY, 20))
sc 756 dev/pci/if_che.c che_write(sc->sc_cheg, CHE_REG_MI1_DATA, val);
sc 757 dev/pci/if_che.c che_write(sc->sc_cheg, CHE_REG_MI1_OP, CHE_MI1_OP(1));
sc 759 dev/pci/if_che.c che_waitfor(sc->sc_cheg, CHE_REG_MI1_OP, CHE_MI1_F_BUSY, 20);
sc 765 dev/pci/if_che.c struct che_softc *sc = (struct che_softc *)dev;
sc 768 dev/pci/if_che.c printf("%s: che_miibus_statchg\n", DEVNAME(sc));
sc 772 dev/pci/if_che.c che_read(struct cheg_softc *sc, bus_size_t r)
sc 774 dev/pci/if_che.c bus_space_barrier(sc->sc_memt, sc->sc_memh, r, 4,
sc 776 dev/pci/if_che.c return (bus_space_read_4(sc->sc_memt, sc->sc_memh, r));
sc 780 dev/pci/if_che.c che_write(struct cheg_softc *sc, bus_size_t r, u_int32_t v)
sc 782 dev/pci/if_che.c bus_space_write_4(sc->sc_memt, sc->sc_memh, r, v);
sc 783 dev/pci/if_che.c bus_space_barrier(sc->sc_memt, sc->sc_memh, r, 4,
sc 788 dev/pci/if_che.c che_waitfor(struct cheg_softc *sc, bus_size_t r, u_int32_t mask, int tries)
sc 794 dev/pci/if_che.c v = che_read(sc, r);
sc 803 dev/pci/if_che.c che_hw_init(struct cheg_softc *sc)
sc 811 dev/pci/if_che.c CHE_MI1_CLKDIV(sc->sc_cclk / (2 * sc->sc_mdc) - 1);
sc 813 dev/pci/if_che.c i2c_reg = CHE_I2C_CLKDIV(sc->sc_cclk / 80 - 1); /* 80KHz */
sc 817 dev/pci/if_che.c switch (sc->sc_product) {
sc 858 dev/pci/if_che.c if (sc->sc_rev == 0)
sc 862 dev/pci/if_che.c che_write(sc, CHE_REG_MI1_CFG, mi1_reg);
sc 863 dev/pci/if_che.c che_write(sc, CHE_REG_I2C_CFG, i2c_reg);
sc 864 dev/pci/if_che.c che_write(sc, CHE_REG_T3DBG_GPIO_EN, gpio_reg);
sc 866 dev/pci/if_che.c che_write(sc, CHE_REG_XGM_PORT_CFG, port_reg);
sc 867 dev/pci/if_che.c (void)che_read(sc, CHE_REG_XGM_PORT_CFG);
sc 871 dev/pci/if_che.c che_write(sc, CHE_REG_XGM_PORT_CFG, port_reg);
sc 872 dev/pci/if_che.c (void)che_read(sc, CHE_REG_XGM_PORT_CFG);
sc 873 dev/pci/if_che.c che_write(sc, CHE_XGM_REG(CHE_REG_XGM_PORT_CFG, 1), port_reg);
sc 874 dev/pci/if_che.c (void)che_read(sc, CHE_REG_XGM_PORT_CFG);
sc 162 dev/pci/if_dc_pci.c struct dc_softc *sc = (struct dc_softc *)self;
sc 184 dev/pci/if_dc_pci.c "-- setting to D0\n", sc->sc_dev.dv_xname,
sc 208 dev/pci/if_dc_pci.c struct dc_softc *sc = (struct dc_softc *)self;
sc 216 dev/pci/if_dc_pci.c sc->sc_dmat = pa->pa_dmat;
sc 223 dev/pci/if_dc_pci.c sc->dc_csid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
sc 231 dev/pci/if_dc_pci.c &sc->dc_btag, &sc->dc_bhandle, NULL, &size, 0)) {
sc 238 dev/pci/if_dc_pci.c &sc->dc_btag, &sc->dc_bhandle, NULL, &size, 0)) {
sc 250 dev/pci/if_dc_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, dc_intr, sc,
sc 252 dev/pci/if_dc_pci.c if (sc->sc_ih == NULL) {
sc 262 dev/pci/if_dc_pci.c sc->dc_revision = revision = PCI_REVISION(pa->pa_class);
sc 267 dev/pci/if_dc_pci.c dc_eeprom_width(sc);
sc 274 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_21143;
sc 275 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
sc 276 dev/pci/if_dc_pci.c sc->dc_flags |= DC_REDUCED_MII_POLL;
sc 277 dev/pci/if_dc_pci.c dc_read_srom(sc, sc->dc_romwidth);
sc 283 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_21145;
sc 284 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
sc 285 dev/pci/if_dc_pci.c sc->dc_flags |= DC_REDUCED_MII_POLL;
sc 286 dev/pci/if_dc_pci.c dc_read_srom(sc, sc->dc_romwidth);
sc 294 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_DM9102;
sc 295 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_COALESCE|DC_TX_INTR_ALWAYS;
sc 296 dev/pci/if_dc_pci.c sc->dc_flags |= DC_REDUCED_MII_POLL|DC_TX_STORENFWD;
sc 297 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_ALIGN;
sc 298 dev/pci/if_dc_pci.c sc->dc_pmode = DC_PMODE_MII;
sc 312 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_AL981;
sc 313 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_USE_TX_INTR;
sc 314 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_ADMTEK_WAR;
sc 315 dev/pci/if_dc_pci.c sc->dc_pmode = DC_PMODE_MII;
sc 316 dev/pci/if_dc_pci.c dc_read_srom(sc, sc->dc_romwidth);
sc 324 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_AN983;
sc 325 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_USE_TX_INTR;
sc 326 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_ADMTEK_WAR;
sc 327 dev/pci/if_dc_pci.c sc->dc_flags |= DC_64BIT_HASH;
sc 328 dev/pci/if_dc_pci.c sc->dc_pmode = DC_PMODE_MII;
sc 336 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_AN983;
sc 337 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_USE_TX_INTR;
sc 338 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_ADMTEK_WAR;
sc 339 dev/pci/if_dc_pci.c sc->dc_flags |= DC_64BIT_HASH;
sc 340 dev/pci/if_dc_pci.c sc->dc_pmode = DC_PMODE_MII;
sc 346 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_98713;
sc 349 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_98713A;
sc 350 dev/pci/if_dc_pci.c sc->dc_flags |= DC_21143_NWAY;
sc 352 dev/pci/if_dc_pci.c sc->dc_flags |= DC_REDUCED_MII_POLL;
sc 353 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
sc 360 dev/pci/if_dc_pci.c sc->dc_flags |= DC_128BIT_HASH;
sc 361 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_987x5;
sc 362 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
sc 363 dev/pci/if_dc_pci.c sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
sc 367 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_987x5;
sc 368 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
sc 369 dev/pci/if_dc_pci.c sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
sc 376 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_98713;
sc 377 dev/pci/if_dc_pci.c sc->dc_flags |= DC_REDUCED_MII_POLL;
sc 380 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_98713A;
sc 381 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
sc 387 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_PNICII;
sc 388 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
sc 389 dev/pci/if_dc_pci.c sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
sc 390 dev/pci/if_dc_pci.c sc->dc_flags |= DC_128BIT_HASH;
sc 394 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_PNIC;
sc 395 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_STORENFWD|DC_TX_INTR_ALWAYS;
sc 396 dev/pci/if_dc_pci.c sc->dc_flags |= DC_PNIC_RX_BUG_WAR;
sc 397 dev/pci/if_dc_pci.c sc->dc_pnic_rx_buf = malloc(ETHER_MAX_DIX_LEN * 5, M_DEVBUF,
sc 399 dev/pci/if_dc_pci.c if (sc->dc_pnic_rx_buf == NULL)
sc 402 dev/pci/if_dc_pci.c sc->dc_pmode = DC_PMODE_SYM;
sc 408 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_ASIX;
sc 409 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_INTR_FIRSTFRAG;
sc 410 dev/pci/if_dc_pci.c sc->dc_flags |= DC_REDUCED_MII_POLL;
sc 411 dev/pci/if_dc_pci.c sc->dc_pmode = DC_PMODE_MII;
sc 417 dev/pci/if_dc_pci.c sc->dc_type = DC_TYPE_CONEXANT;
sc 418 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TX_INTR_ALWAYS;
sc 419 dev/pci/if_dc_pci.c sc->dc_flags |= DC_REDUCED_MII_POLL;
sc 420 dev/pci/if_dc_pci.c sc->dc_pmode = DC_PMODE_MII;
sc 421 dev/pci/if_dc_pci.c dc_read_srom(sc, sc->dc_romwidth);
sc 433 dev/pci/if_dc_pci.c if (DC_IS_DAVICOM(sc))
sc 434 dev/pci/if_dc_pci.c sc->dc_cachesize = 0;
sc 436 dev/pci/if_dc_pci.c sc->dc_cachesize = pci_conf_read(pc, pa->pa_tag,
sc 440 dev/pci/if_dc_pci.c dc_reset(sc);
sc 443 dev/pci/if_dc_pci.c if (DC_IS_INTEL(sc)) {
sc 461 dev/pci/if_dc_pci.c if (DC_IS_INTEL(sc)) {
sc 463 dev/pci/if_dc_pci.c sc->dc_flags |= DC_TULIP_LEDS;
sc 473 dev/pci/if_dc_pci.c if (DC_IS_INTEL(sc))
sc 474 dev/pci/if_dc_pci.c dc_parse_21143_srom(sc);
sc 475 dev/pci/if_dc_pci.c else if (DC_IS_MACRONIX(sc) || DC_IS_PNICII(sc)) {
sc 476 dev/pci/if_dc_pci.c if (sc->dc_type == DC_TYPE_98713)
sc 477 dev/pci/if_dc_pci.c sc->dc_pmode = DC_PMODE_MII;
sc 479 dev/pci/if_dc_pci.c sc->dc_pmode = DC_PMODE_SYM;
sc 480 dev/pci/if_dc_pci.c } else if (!sc->dc_pmode)
sc 481 dev/pci/if_dc_pci.c sc->dc_pmode = DC_PMODE_MII;
sc 488 dev/pci/if_dc_pci.c sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0)
sc 489 dev/pci/if_dc_pci.c myetheraddr(sc->sc_arpcom.ac_enaddr);
sc 490 dev/pci/if_dc_pci.c if (sc->sc_arpcom.ac_enaddr[0] == 0x00 &&
sc 491 dev/pci/if_dc_pci.c sc->sc_arpcom.ac_enaddr[1] == 0x03 &&
sc 492 dev/pci/if_dc_pci.c sc->sc_arpcom.ac_enaddr[2] == 0xcc)
sc 493 dev/pci/if_dc_pci.c sc->dc_flags |= DC_MOMENCO_BOTCH;
sc 494 dev/pci/if_dc_pci.c sc->sc_hasmac = 1;
sc 499 dev/pci/if_dc_pci.c sc->dc_srm_media = 0;
sc 502 dev/pci/if_dc_pci.c if (DC_IS_INTEL(sc)) {
sc 507 dev/pci/if_dc_pci.c sc->dc_srm_media = IFM_10_T;
sc 510 dev/pci/if_dc_pci.c sc->dc_srm_media = IFM_10_T | IFM_FDX;
sc 513 dev/pci/if_dc_pci.c sc->dc_srm_media = IFM_100_TX;
sc 516 dev/pci/if_dc_pci.c sc->dc_srm_media = IFM_100_TX | IFM_FDX;
sc 519 dev/pci/if_dc_pci.c if (sc->dc_srm_media)
sc 520 dev/pci/if_dc_pci.c sc->dc_srm_media |= IFM_ACTIVE | IFM_ETHER;
sc 523 dev/pci/if_dc_pci.c dc_attach(sc);
sc 528 dev/pci/if_dc_pci.c pci_intr_disestablish(pc, sc->sc_ih);
sc 531 dev/pci/if_dc_pci.c bus_space_unmap(sc->dc_btag, sc->dc_bhandle, size);
sc 95 dev/pci/if_de.c #define EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); tulip_delay_300ns(sc); } while (0)
sc 96 dev/pci/if_de.c #define MII_EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); tulip_delay_300ns(sc); } while (0)
sc 120 dev/pci/if_de.c #define PCI_GETBUSDEVINFO(sc) do { \
sc 121 dev/pci/if_de.c (sc)->tulip_pci_busno = parent; \
sc 122 dev/pci/if_de.c (sc)->tulip_pci_devno = pa->pa_device; \
sc 144 dev/pci/if_de.c void tulip_timeout(tulip_softc_t * const sc);
sc 145 dev/pci/if_de.c int tulip_txprobe(tulip_softc_t * const sc);
sc 146 dev/pci/if_de.c void tulip_media_set(tulip_softc_t * const sc, tulip_media_t media);
sc 147 dev/pci/if_de.c void tulip_linkup(tulip_softc_t * const sc, tulip_media_t media);
sc 148 dev/pci/if_de.c void tulip_media_print(tulip_softc_t * const sc);
sc 149 dev/pci/if_de.c tulip_link_status_t tulip_media_link_monitor(tulip_softc_t * const sc);
sc 150 dev/pci/if_de.c void tulip_media_poll(tulip_softc_t * const sc, tulip_mediapoll_event_t event);
sc 151 dev/pci/if_de.c void tulip_media_select(tulip_softc_t * const sc);
sc 153 dev/pci/if_de.c void tulip_21040_mediainfo_init(tulip_softc_t * const sc, tulip_media_t media);
sc 154 dev/pci/if_de.c void tulip_21040_media_probe(tulip_softc_t * const sc);
sc 155 dev/pci/if_de.c void tulip_21040_10baset_only_media_probe(tulip_softc_t * const sc);
sc 156 dev/pci/if_de.c void tulip_21040_10baset_only_media_select(tulip_softc_t * const sc);
sc 157 dev/pci/if_de.c void tulip_21040_auibnc_only_media_probe(tulip_softc_t * const sc);
sc 158 dev/pci/if_de.c void tulip_21040_auibnc_only_media_select(tulip_softc_t * const sc);
sc 160 dev/pci/if_de.c void tulip_21041_mediainfo_init(tulip_softc_t * const sc);
sc 161 dev/pci/if_de.c void tulip_21041_media_noprobe(tulip_softc_t * const sc);
sc 162 dev/pci/if_de.c void tulip_21041_media_probe(tulip_softc_t * const sc);
sc 163 dev/pci/if_de.c void tulip_21041_media_poll(tulip_softc_t * const sc, const tulip_mediapoll_event_t event);
sc 165 dev/pci/if_de.c tulip_media_t tulip_mii_phy_readspecific(tulip_softc_t * const sc);
sc 166 dev/pci/if_de.c unsigned tulip_mii_get_phyaddr(tulip_softc_t * const sc, unsigned offset);
sc 167 dev/pci/if_de.c int tulip_mii_map_abilities(tulip_softc_t * const sc, unsigned abilities);
sc 168 dev/pci/if_de.c void tulip_mii_autonegotiate(tulip_softc_t * const sc, const unsigned phyaddr);
sc 170 dev/pci/if_de.c void tulip_2114x_media_preset(tulip_softc_t * const sc);
sc 172 dev/pci/if_de.c void tulip_null_media_poll(tulip_softc_t * const sc, tulip_mediapoll_event_t event);
sc 174 dev/pci/if_de.c void tulip_21140_mediainit(tulip_softc_t * const sc, tulip_media_info_t * const mip,
sc 176 dev/pci/if_de.c void tulip_21140_evalboard_media_probe(tulip_softc_t * const sc);
sc 177 dev/pci/if_de.c void tulip_21140_accton_media_probe(tulip_softc_t * const sc);
sc 178 dev/pci/if_de.c void tulip_21140_smc9332_media_probe(tulip_softc_t * const sc);
sc 179 dev/pci/if_de.c void tulip_21140_cogent_em100_media_probe(tulip_softc_t * const sc);
sc 180 dev/pci/if_de.c void tulip_21140_znyx_zx34x_media_probe(tulip_softc_t * const sc);
sc 182 dev/pci/if_de.c void tulip_2114x_media_probe(tulip_softc_t * const sc);
sc 184 dev/pci/if_de.c void tulip_delay_300ns(tulip_softc_t * const sc);
sc 185 dev/pci/if_de.c void tulip_srom_idle(tulip_softc_t * const sc);
sc 186 dev/pci/if_de.c void tulip_srom_read(tulip_softc_t * const sc);
sc 187 dev/pci/if_de.c void tulip_mii_writebits(tulip_softc_t * const sc, unsigned data, unsigned bits);
sc 188 dev/pci/if_de.c void tulip_mii_turnaround(tulip_softc_t * const sc, unsigned cmd);
sc 189 dev/pci/if_de.c unsigned tulip_mii_readbits(tulip_softc_t * const sc);
sc 190 dev/pci/if_de.c unsigned tulip_mii_readreg(tulip_softc_t * const sc, unsigned devaddr, unsigned regno);
sc 191 dev/pci/if_de.c void tulip_mii_writereg(tulip_softc_t * const sc, unsigned devaddr, unsigned regno,
sc 194 dev/pci/if_de.c void tulip_identify_dec_nic(tulip_softc_t * const sc);
sc 195 dev/pci/if_de.c void tulip_identify_znyx_nic(tulip_softc_t * const sc);
sc 196 dev/pci/if_de.c void tulip_identify_smc_nic(tulip_softc_t * const sc);
sc 197 dev/pci/if_de.c void tulip_identify_cogent_nic(tulip_softc_t * const sc);
sc 198 dev/pci/if_de.c void tulip_identify_accton_nic(tulip_softc_t * const sc);
sc 199 dev/pci/if_de.c void tulip_identify_asante_nic(tulip_softc_t * const sc);
sc 200 dev/pci/if_de.c void tulip_identify_compex_nic(tulip_softc_t * const sc);
sc 202 dev/pci/if_de.c int tulip_srom_decode(tulip_softc_t * const sc);
sc 203 dev/pci/if_de.c int tulip_read_macaddr(tulip_softc_t * const sc);
sc 204 dev/pci/if_de.c void tulip_ifmedia_add(tulip_softc_t * const sc);
sc 207 dev/pci/if_de.c void tulip_addr_filter(tulip_softc_t * const sc);
sc 208 dev/pci/if_de.c void tulip_reset(tulip_softc_t * const sc);
sc 209 dev/pci/if_de.c void tulip_init(tulip_softc_t * const sc);
sc 210 dev/pci/if_de.c void tulip_rx_intr(tulip_softc_t * const sc);
sc 211 dev/pci/if_de.c int tulip_tx_intr(tulip_softc_t * const sc);
sc 212 dev/pci/if_de.c void tulip_print_abnormal_interrupt(tulip_softc_t * const sc, u_int32_t csr);
sc 213 dev/pci/if_de.c void tulip_intr_handler(tulip_softc_t * const sc, int *progress_p);
sc 217 dev/pci/if_de.c struct mbuf *tulip_txput(tulip_softc_t * const sc, struct mbuf *m);
sc 218 dev/pci/if_de.c void tulip_txput_setup(tulip_softc_t * const sc);
sc 223 dev/pci/if_de.c int tulip_busdma_allocmem(tulip_softc_t * const sc, size_t size,
sc 225 dev/pci/if_de.c int tulip_busdma_init(tulip_softc_t * const sc);
sc 226 dev/pci/if_de.c void tulip_initcsrs(tulip_softc_t * const sc, bus_addr_t csr_base, size_t csr_size);
sc 227 dev/pci/if_de.c void tulip_initring(tulip_softc_t * const sc, tulip_ringinfo_t * const ri,
sc 235 dev/pci/if_de.c tulip_softc_t * const sc = arg;
sc 242 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_TIMEOUTPENDING;
sc 243 dev/pci/if_de.c sc->tulip_probe_timeout -= 1000 / TULIP_HZ;
sc 244 dev/pci/if_de.c (sc->tulip_boardsw->bd_media_poll)(sc, TULIP_MEDIAPOLL_TIMER);
sc 251 dev/pci/if_de.c tulip_timeout(tulip_softc_t * const sc)
sc 253 dev/pci/if_de.c if (sc->tulip_flags & TULIP_TIMEOUTPENDING)
sc 255 dev/pci/if_de.c sc->tulip_flags |= TULIP_TIMEOUTPENDING;
sc 256 dev/pci/if_de.c timeout_add(&sc->tulip_stmo, (hz + TULIP_HZ / 2) / TULIP_HZ);
sc 260 dev/pci/if_de.c tulip_txprobe(tulip_softc_t * const sc)
sc 277 dev/pci/if_de.c bcopy(sc->tulip_enaddr, mtod(m, struct ether_header *)->ether_dhost,
sc 279 dev/pci/if_de.c bcopy(sc->tulip_enaddr, mtod(m, struct ether_header *)->ether_shost,
sc 289 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_TXRUN;
sc 290 dev/pci/if_de.c sc->tulip_intrmask |= TULIP_STS_TXINTR;
sc 291 dev/pci/if_de.c sc->tulip_flags |= TULIP_TXPROBE_ACTIVE;
sc 292 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode);
sc 293 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask);
sc 294 dev/pci/if_de.c if ((m = tulip_txput(sc, m)) != NULL)
sc 296 dev/pci/if_de.c sc->tulip_probe.probe_txprobes++;
sc 301 dev/pci/if_de.c tulip_media_set(tulip_softc_t * const sc, tulip_media_t media)
sc 303 dev/pci/if_de.c const tulip_media_info_t *mi = sc->tulip_mediums[media];
sc 310 dev/pci/if_de.c if (mi->mi_type == TULIP_MEDIAINFO_SIA || (sc->tulip_features & TULIP_HAVE_SIANWAY))
sc 311 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_connectivity, TULIP_SIACONN_RESET);
sc 315 dev/pci/if_de.c if (sc->tulip_flags & TULIP_FULLDUPLEX) {
sc 317 dev/pci/if_de.c if (TULIP_CSR_READ(sc, csr_command) & (TULIP_CMD_RXRUN|TULIP_CMD_TXRUN))
sc 319 dev/pci/if_de.c if ((TULIP_CSR_READ(sc, csr_command) & TULIP_CMD_FULLDUPLEX) == 0)
sc 323 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_FULLDUPLEX;
sc 324 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode & ~(TULIP_CMD_RXRUN|TULIP_CMD_TXRUN));
sc 332 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_RXACT;
sc 334 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_tx_rx, mi->mi_sia_tx_rx);
sc 335 dev/pci/if_de.c if (sc->tulip_features & TULIP_HAVE_SIAGP) {
sc 336 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_general, mi->mi_sia_gp_control|mi->mi_sia_general|TULIP_SIAGEN_WATCHDOG);
sc 338 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_general, mi->mi_sia_gp_data|mi->mi_sia_general|TULIP_SIAGEN_WATCHDOG);
sc 340 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_general, mi->mi_sia_general|TULIP_SIAGEN_WATCHDOG);
sc 341 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_connectivity, mi->mi_sia_connectivity);
sc 347 dev/pci/if_de.c if (((mi->mi_cmdmode ^ TULIP_CSR_READ(sc, csr_command)) & TULIP_GPR_CMDBITS) != 0) {
sc 348 dev/pci/if_de.c sc->tulip_cmdmode &= ~TULIP_GPR_CMDBITS;
sc 349 dev/pci/if_de.c sc->tulip_cmdmode |= mi->mi_cmdmode;
sc 350 dev/pci/if_de.c tulip_reset(sc);
sc 352 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET|sc->tulip_gpinit);
sc 354 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, (u_int8_t) mi->mi_gpdata);
sc 360 dev/pci/if_de.c if (((mi->mi_cmdmode ^ TULIP_CSR_READ(sc, csr_command)) & TULIP_GPR_CMDBITS) != 0) {
sc 361 dev/pci/if_de.c sc->tulip_cmdmode &= ~TULIP_GPR_CMDBITS;
sc 362 dev/pci/if_de.c sc->tulip_cmdmode |= mi->mi_cmdmode;
sc 363 dev/pci/if_de.c tulip_reset(sc);
sc 365 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_general, mi->mi_gpcontrol);
sc 366 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_general, mi->mi_gpdata);
sc 368 dev/pci/if_de.c && sc->tulip_probe_state != TULIP_PROBE_INACTIVE) {
sc 370 dev/pci/if_de.c if (sc->tulip_features & TULIP_HAVE_SIAGP) {
sc 372 dev/pci/if_de.c dp = &sc->tulip_rombuf[mi->mi_reset_offset];
sc 375 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_general, (dp[0] + 256 * dp[1]) << 16);
sc 377 dev/pci/if_de.c sc->tulip_phyaddr = mi->mi_phyaddr;
sc 378 dev/pci/if_de.c dp = &sc->tulip_rombuf[mi->mi_gpr_offset];
sc 381 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_general, (dp[0] + 256 * dp[1]) << 16);
sc 386 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, sc->tulip_rombuf[mi->mi_reset_offset + idx]);
sc 388 dev/pci/if_de.c sc->tulip_phyaddr = mi->mi_phyaddr;
sc 391 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, sc->tulip_rombuf[mi->mi_gpr_offset + idx]);
sc 395 dev/pci/if_de.c if (sc->tulip_features & TULIP_HAVE_SIANWAY) {
sc 397 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_general, 1);
sc 398 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_tx_rx, 0);
sc 399 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_status, 0);
sc 402 dev/pci/if_de.c if (sc->tulip_flags & TULIP_TRYNWAY)
sc 403 dev/pci/if_de.c tulip_mii_autonegotiate(sc, sc->tulip_phyaddr);
sc 404 dev/pci/if_de.c else if ((sc->tulip_flags & TULIP_DIDNWAY) == 0) {
sc 405 dev/pci/if_de.c u_int32_t data = tulip_mii_readreg(sc, sc->tulip_phyaddr, PHYREG_CONTROL);
sc 407 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_DIDNWAY;
sc 412 dev/pci/if_de.c tulip_mii_writereg(sc, sc->tulip_phyaddr, PHYREG_CONTROL, data);
sc 418 dev/pci/if_de.c tulip_linkup(tulip_softc_t * const sc, tulip_media_t media)
sc 420 dev/pci/if_de.c if ((sc->tulip_flags & TULIP_LINKUP) == 0)
sc 421 dev/pci/if_de.c sc->tulip_flags |= TULIP_PRINTLINKUP;
sc 422 dev/pci/if_de.c sc->tulip_flags |= TULIP_LINKUP;
sc 423 dev/pci/if_de.c sc->tulip_if.if_flags &= ~IFF_OACTIVE;
sc 424 dev/pci/if_de.c if (sc->tulip_media != media) {
sc 426 dev/pci/if_de.c sc->tulip_dbg.dbg_last_media = sc->tulip_media;
sc 428 dev/pci/if_de.c sc->tulip_media = media;
sc 429 dev/pci/if_de.c sc->tulip_flags |= TULIP_PRINTMEDIA;
sc 430 dev/pci/if_de.c if (TULIP_IS_MEDIA_FD(sc->tulip_media))
sc 431 dev/pci/if_de.c sc->tulip_flags |= TULIP_FULLDUPLEX;
sc 432 dev/pci/if_de.c else if (sc->tulip_chipid != TULIP_21041 || (sc->tulip_flags & TULIP_DIDNWAY) == 0)
sc 433 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_FULLDUPLEX;
sc 441 dev/pci/if_de.c sc->tulip_probe_timeout = 3000;
sc 442 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_INACTIVE;
sc 443 dev/pci/if_de.c sc->tulip_flags &= ~(TULIP_TXPROBE_ACTIVE|TULIP_TRYNWAY);
sc 444 dev/pci/if_de.c if (sc->tulip_flags & TULIP_INRESET)
sc 445 dev/pci/if_de.c tulip_media_set(sc, sc->tulip_media);
sc 446 dev/pci/if_de.c else if (sc->tulip_probe_media != sc->tulip_media) {
sc 450 dev/pci/if_de.c tulip_reset(sc);
sc 452 dev/pci/if_de.c tulip_init(sc);
sc 456 dev/pci/if_de.c tulip_media_print(tulip_softc_t * const sc)
sc 458 dev/pci/if_de.c if ((sc->tulip_flags & TULIP_LINKUP) == 0)
sc 460 dev/pci/if_de.c if (sc->tulip_flags & TULIP_PRINTMEDIA) {
sc 464 dev/pci/if_de.c tulip_mediums[sc->tulip_media]);
sc 466 dev/pci/if_de.c sc->tulip_flags &= ~(TULIP_PRINTMEDIA|TULIP_PRINTLINKUP);
sc 467 dev/pci/if_de.c } else if (sc->tulip_flags & TULIP_PRINTLINKUP) {
sc 471 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_PRINTLINKUP;
sc 476 dev/pci/if_de.c tulip_media_link_monitor(tulip_softc_t * const sc)
sc 478 dev/pci/if_de.c const tulip_media_info_t * const mi = sc->tulip_mediums[sc->tulip_media];
sc 484 dev/pci/if_de.c tulip_mediums[sc->tulip_media],__LINE__);
sc 493 dev/pci/if_de.c if ((sc->tulip_flags & (TULIP_RXACT|TULIP_LINKUP)) == (TULIP_RXACT|TULIP_LINKUP)) {
sc 494 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_RXACT;
sc 495 dev/pci/if_de.c sc->tulip_probe_timeout = 3000;
sc 499 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_RXACT;
sc 505 dev/pci/if_de.c status = tulip_mii_readreg(sc, sc->tulip_phyaddr, PHYREG_STATUS)
sc 506 dev/pci/if_de.c | tulip_mii_readreg(sc, sc->tulip_phyaddr, PHYREG_STATUS);
sc 513 dev/pci/if_de.c u_int32_t abilities = tulip_mii_readreg(sc, sc->tulip_phyaddr, PHYREG_AUTONEG_ABILITIES);
sc 515 dev/pci/if_de.c if (abilities != sc->tulip_abilities) {
sc 518 dev/pci/if_de.c TULIP_PRINTF_ARGS, sc->tulip_phyaddr,
sc 519 dev/pci/if_de.c sc->tulip_abilities, abilities);
sc 521 dev/pci/if_de.c if (tulip_mii_map_abilities(sc, abilities)) {
sc 522 dev/pci/if_de.c tulip_linkup(sc, sc->tulip_probe_media);
sc 529 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_INACTIVE;
sc 530 dev/pci/if_de.c if (sc->tulip_flags & TULIP_DIDNWAY)
sc 548 dev/pci/if_de.c if ((TULIP_CSR_READ(sc, csr_gp) & mi->mi_actmask) == mi->mi_actdata)
sc 554 dev/pci/if_de.c if (!TULIP_IS_MEDIA_TP(sc->tulip_media))
sc 556 dev/pci/if_de.c if ((TULIP_CSR_READ(sc, csr_sia_status) & TULIP_SIASTS_LINKFAIL) == 0)
sc 559 dev/pci/if_de.c if (sc->tulip_probe_timeout <= 0)
sc 560 dev/pci/if_de.c printf(TULIP_PRINTF_FMT ": sia status = 0x%08x\n", TULIP_PRINTF_ARGS, TULIP_CSR_READ(sc, csr_sia_status));
sc 567 dev/pci/if_de.c if (sc->tulip_flags & TULIP_LINKUP) {
sc 569 dev/pci/if_de.c sc->tulip_probe_timeout = 3000;
sc 570 dev/pci/if_de.c if (sc->tulip_probe_timeout > 0)
sc 573 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_LINKUP;
sc 576 dev/pci/if_de.c sc->tulip_dbg.dbg_link_downed++;
sc 582 dev/pci/if_de.c tulip_media_poll(tulip_softc_t * const sc, tulip_mediapoll_event_t event)
sc 585 dev/pci/if_de.c sc->tulip_dbg.dbg_events[event]++;
sc 587 dev/pci/if_de.c if (sc->tulip_probe_state == TULIP_PROBE_INACTIVE
sc 589 dev/pci/if_de.c switch (tulip_media_link_monitor(sc)) {
sc 601 dev/pci/if_de.c tulip_timeout(sc);
sc 614 dev/pci/if_de.c if (sc->tulip_probe_state == TULIP_PROBE_INACTIVE) {
sc 615 dev/pci/if_de.c if (TULIP_DO_AUTOSENSE(sc)) {
sc 617 dev/pci/if_de.c sc->tulip_dbg.dbg_link_failures++;
sc 619 dev/pci/if_de.c sc->tulip_media = TULIP_MEDIA_UNKNOWN;
sc 620 dev/pci/if_de.c if (sc->tulip_if.if_flags & IFF_UP)
sc 621 dev/pci/if_de.c tulip_reset(sc); /* restart probe */
sc 626 dev/pci/if_de.c sc->tulip_dbg.dbg_link_pollintrs++;
sc 631 dev/pci/if_de.c sc->tulip_if.if_flags |= IFF_OACTIVE;
sc 632 dev/pci/if_de.c if (sc->tulip_probe_state != TULIP_PROBE_INACTIVE)
sc 634 dev/pci/if_de.c sc->tulip_probe_mediamask = 0;
sc 635 dev/pci/if_de.c sc->tulip_probe_passes = 0;
sc 637 dev/pci/if_de.c sc->tulip_dbg.dbg_media_probes++;
sc 642 dev/pci/if_de.c sc->tulip_cmdmode &= ~(TULIP_CMD_RXRUN|TULIP_CMD_FULLDUPLEX);
sc 643 dev/pci/if_de.c sc->tulip_flags |= TULIP_TRYNWAY|TULIP_PROBE1STPASS;
sc 644 dev/pci/if_de.c sc->tulip_flags &= ~(TULIP_DIDNWAY|TULIP_PRINTMEDIA|TULIP_PRINTLINKUP);
sc 648 dev/pci/if_de.c sc->tulip_probe_media = tulip_srom_conninfo[sc->tulip_connidx].sc_media;
sc 649 dev/pci/if_de.c if (sc->tulip_probe_media != TULIP_MEDIA_UNKNOWN) {
sc 650 dev/pci/if_de.c tulip_linkup(sc, sc->tulip_probe_media);
sc 651 dev/pci/if_de.c tulip_timeout(sc);
sc 655 dev/pci/if_de.c if (sc->tulip_features & TULIP_HAVE_GPR) {
sc 656 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_GPRTEST;
sc 657 dev/pci/if_de.c sc->tulip_probe_timeout = 2000;
sc 659 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_MAX;
sc 660 dev/pci/if_de.c sc->tulip_probe_timeout = 0;
sc 661 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_MEDIATEST;
sc 669 dev/pci/if_de.c && sc->tulip_probe_state != TULIP_PROBE_MEDIATEST) {
sc 670 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_TXPROBE_ACTIVE;
sc 680 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_10BASET;
sc 683 dev/pci/if_de.c sc->tulip_dbg.dbg_txprobes_ok[sc->tulip_probe_media]++;
sc 686 dev/pci/if_de.c tulip_linkup(sc, sc->tulip_probe_media);
sc 687 dev/pci/if_de.c tulip_timeout(sc);
sc 691 dev/pci/if_de.c if (sc->tulip_probe_state == TULIP_PROBE_GPRTEST) {
sc 696 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_MEDIATEST;
sc 697 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_MAX;
sc 698 dev/pci/if_de.c sc->tulip_probe_timeout = 0;
sc 699 dev/pci/if_de.c tulip_timeout(sc);
sc 703 dev/pci/if_de.c if (sc->tulip_probe_state != TULIP_PROBE_MEDIATEST
sc 704 dev/pci/if_de.c && (sc->tulip_features & TULIP_HAVE_MII)) {
sc 705 dev/pci/if_de.c tulip_media_t old_media = sc->tulip_probe_media;
sc 706 dev/pci/if_de.c tulip_mii_autonegotiate(sc, sc->tulip_phyaddr);
sc 707 dev/pci/if_de.c switch (sc->tulip_probe_state) {
sc 713 dev/pci/if_de.c sc->tulip_probe_mediamask |= sc->tulip_mediums[sc->tulip_probe_media]->mi_mediamask;
sc 714 dev/pci/if_de.c sc->tulip_probe_timeout = 0;
sc 724 dev/pci/if_de.c sc->tulip_probe_timeout = 0;
sc 725 dev/pci/if_de.c if (sc->tulip_probe_mediamask & TULIP_BIT(sc->tulip_probe_media)) {
sc 726 dev/pci/if_de.c sc->tulip_probe_media = old_media;
sc 729 dev/pci/if_de.c tulip_linkup(sc, sc->tulip_probe_media);
sc 730 dev/pci/if_de.c tulip_timeout(sc);
sc 744 dev/pci/if_de.c sc->tulip_dbg.dbg_txprobes_failed[sc->tulip_probe_media]++;
sc 746 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_TXPROBE_ACTIVE;
sc 753 dev/pci/if_de.c if (/* event == TULIP_MEDIAPOLL_TXPROBE_FAILED || */ sc->tulip_probe_timeout <= 0) {
sc 755 dev/pci/if_de.c if (sc->tulip_probe_media == TULIP_MEDIA_UNKNOWN) {
sc 758 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_MAX;
sc 766 dev/pci/if_de.c sc->tulip_probe_media -= 1;
sc 767 dev/pci/if_de.c if (sc->tulip_probe_media == TULIP_MEDIA_UNKNOWN) {
sc 768 dev/pci/if_de.c if (++sc->tulip_probe_passes == 3) {
sc 769 dev/pci/if_de.c if ((sc->tulip_if.if_flags & IFF_UP) == 0) {
sc 770 dev/pci/if_de.c sc->tulip_if.if_flags &= ~IFF_RUNNING;
sc 771 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_INACTIVE;
sc 775 dev/pci/if_de.c sc->tulip_flags ^= TULIP_TRYNWAY; /* XXX */
sc 776 dev/pci/if_de.c sc->tulip_probe_mediamask = 0;
sc 777 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_MAX - 1;
sc 779 dev/pci/if_de.c } while (sc->tulip_mediums[sc->tulip_probe_media] == NULL
sc 780 dev/pci/if_de.c || (sc->tulip_probe_mediamask & TULIP_BIT(sc->tulip_probe_media))
sc 781 dev/pci/if_de.c || TULIP_IS_MEDIA_FD(sc->tulip_probe_media));
sc 786 dev/pci/if_de.c tulip_mediums[sc->tulip_probe_media]);
sc 788 dev/pci/if_de.c sc->tulip_probe_timeout = TULIP_IS_MEDIA_TP(sc->tulip_probe_media) ? 2500 : 1000;
sc 789 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_MEDIATEST;
sc 790 dev/pci/if_de.c sc->tulip_probe.probe_txprobes = 0;
sc 791 dev/pci/if_de.c tulip_reset(sc);
sc 792 dev/pci/if_de.c tulip_media_set(sc, sc->tulip_probe_media);
sc 793 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_TXPROBE_ACTIVE;
sc 795 dev/pci/if_de.c tulip_timeout(sc);
sc 802 dev/pci/if_de.c switch (sc->tulip_mediums[sc->tulip_probe_media]->mi_type) {
sc 804 dev/pci/if_de.c if (sc->tulip_probe_media != tulip_mii_phy_readspecific(sc))
sc 809 dev/pci/if_de.c if (TULIP_IS_MEDIA_TP(sc->tulip_probe_media)) {
sc 810 dev/pci/if_de.c if (TULIP_CSR_READ(sc, csr_sia_status) & TULIP_SIASTS_LINKFAIL)
sc 812 dev/pci/if_de.c tulip_linkup(sc, sc->tulip_probe_media);
sc 827 dev/pci/if_de.c tulip_txprobe(sc);
sc 831 dev/pci/if_de.c tulip_media_select(tulip_softc_t * const sc)
sc 833 dev/pci/if_de.c if (sc->tulip_features & TULIP_HAVE_GPR) {
sc 834 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET|sc->tulip_gpinit);
sc 836 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, sc->tulip_gpdata);
sc 841 dev/pci/if_de.c if (sc->tulip_features & TULIP_HAVE_NOMEDIA)
sc 844 dev/pci/if_de.c if (sc->tulip_media == TULIP_MEDIA_UNKNOWN) {
sc 845 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask);
sc 846 dev/pci/if_de.c (*sc->tulip_boardsw->bd_media_poll)(sc, TULIP_MEDIAPOLL_START);
sc 848 dev/pci/if_de.c tulip_media_set(sc, sc->tulip_media);
sc 852 dev/pci/if_de.c tulip_21040_mediainfo_init(tulip_softc_t * const sc, tulip_media_t media)
sc 854 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_CAPTREFFCT|TULIP_CMD_THRSHLD160
sc 856 dev/pci/if_de.c sc->tulip_if.if_baudrate = 10000000;
sc 859 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, &sc->tulip_mediainfo[0], 21040, 10BASET);
sc 860 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, &sc->tulip_mediainfo[1], 21040, 10BASET_FD);
sc 861 dev/pci/if_de.c sc->tulip_intrmask |= TULIP_STS_LINKPASS|TULIP_STS_LINKFAIL;
sc 865 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, &sc->tulip_mediainfo[2], 21040, AUIBNC);
sc 868 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, &sc->tulip_mediainfo[3], 21040, EXTSIA);
sc 872 dev/pci/if_de.c tulip_21040_media_probe(tulip_softc_t * const sc)
sc 874 dev/pci/if_de.c tulip_21040_mediainfo_init(sc, TULIP_MEDIA_UNKNOWN);
sc 878 dev/pci/if_de.c tulip_21040_10baset_only_media_probe(tulip_softc_t * const sc)
sc 880 dev/pci/if_de.c tulip_21040_mediainfo_init(sc, TULIP_MEDIA_10BASET);
sc 881 dev/pci/if_de.c tulip_media_set(sc, TULIP_MEDIA_10BASET);
sc 882 dev/pci/if_de.c sc->tulip_media = TULIP_MEDIA_10BASET;
sc 886 dev/pci/if_de.c tulip_21040_10baset_only_media_select(tulip_softc_t * const sc)
sc 888 dev/pci/if_de.c sc->tulip_flags |= TULIP_LINKUP;
sc 889 dev/pci/if_de.c if (sc->tulip_media == TULIP_MEDIA_10BASET_FD) {
sc 890 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_FULLDUPLEX;
sc 891 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_SQETEST;
sc 893 dev/pci/if_de.c sc->tulip_cmdmode &= ~TULIP_CMD_FULLDUPLEX;
sc 894 dev/pci/if_de.c sc->tulip_flags |= TULIP_SQETEST;
sc 896 dev/pci/if_de.c tulip_media_set(sc, sc->tulip_media);
sc 900 dev/pci/if_de.c tulip_21040_auibnc_only_media_probe(tulip_softc_t * const sc)
sc 902 dev/pci/if_de.c tulip_21040_mediainfo_init(sc, TULIP_MEDIA_AUIBNC);
sc 903 dev/pci/if_de.c sc->tulip_flags |= TULIP_SQETEST|TULIP_LINKUP;
sc 904 dev/pci/if_de.c tulip_media_set(sc, TULIP_MEDIA_AUIBNC);
sc 905 dev/pci/if_de.c sc->tulip_media = TULIP_MEDIA_AUIBNC;
sc 909 dev/pci/if_de.c tulip_21040_auibnc_only_media_select(tulip_softc_t * const sc)
sc 911 dev/pci/if_de.c tulip_media_set(sc, TULIP_MEDIA_AUIBNC);
sc 912 dev/pci/if_de.c sc->tulip_cmdmode &= ~TULIP_CMD_FULLDUPLEX;
sc 937 dev/pci/if_de.c tulip_21041_mediainfo_init(tulip_softc_t * const sc)
sc 939 dev/pci/if_de.c tulip_media_info_t * const mi = sc->tulip_mediainfo;
sc 941 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, &mi[0], 21041, 10BASET);
sc 942 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, &mi[1], 21041, 10BASET_FD);
sc 943 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, &mi[2], 21041, AUI);
sc 944 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, &mi[3], 21041, BNC);
sc 948 dev/pci/if_de.c tulip_21041_media_noprobe(tulip_softc_t * const sc)
sc 950 dev/pci/if_de.c sc->tulip_if.if_baudrate = 10000000;
sc 951 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_CAPTREFFCT|TULIP_CMD_ENHCAPTEFFCT
sc 953 dev/pci/if_de.c sc->tulip_intrmask |= TULIP_STS_LINKPASS|TULIP_STS_LINKFAIL;
sc 957 dev/pci/if_de.c tulip_21041_media_probe(tulip_softc_t * const sc)
sc 959 dev/pci/if_de.c sc->tulip_if.if_baudrate = 10000000;
sc 960 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_CAPTREFFCT|TULIP_CMD_ENHCAPTEFFCT
sc 962 dev/pci/if_de.c sc->tulip_intrmask |= TULIP_STS_LINKPASS|TULIP_STS_LINKFAIL;
sc 963 dev/pci/if_de.c tulip_21041_mediainfo_init(sc);
sc 967 dev/pci/if_de.c tulip_21041_media_poll(tulip_softc_t * const sc, const tulip_mediapoll_event_t event)
sc 972 dev/pci/if_de.c sc->tulip_dbg.dbg_events[event]++;
sc 976 dev/pci/if_de.c if (sc->tulip_probe_state != TULIP_PROBE_INACTIVE
sc 977 dev/pci/if_de.c || !TULIP_DO_AUTOSENSE(sc))
sc 979 dev/pci/if_de.c sc->tulip_media = TULIP_MEDIA_UNKNOWN;
sc 980 dev/pci/if_de.c tulip_reset(sc); /* start probe */
sc 989 dev/pci/if_de.c sc->tulip_if.if_flags |= IFF_OACTIVE;
sc 990 dev/pci/if_de.c sc->tulip_cmdmode &= ~(TULIP_CMD_FULLDUPLEX|TULIP_CMD_RXRUN);
sc 991 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode);
sc 992 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_MEDIATEST;
sc 993 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_10BASET;
sc 994 dev/pci/if_de.c sc->tulip_probe_timeout = TULIP_21041_PROBE_10BASET_TIMEOUT;
sc 995 dev/pci/if_de.c tulip_media_set(sc, TULIP_MEDIA_10BASET);
sc 996 dev/pci/if_de.c tulip_timeout(sc);
sc 1000 dev/pci/if_de.c if (sc->tulip_probe_state == TULIP_PROBE_INACTIVE)
sc 1005 dev/pci/if_de.c sc->tulip_dbg.dbg_txprobes_ok[sc->tulip_probe_media]++;
sc 1007 dev/pci/if_de.c tulip_linkup(sc, sc->tulip_probe_media);
sc 1011 dev/pci/if_de.c sia_status = TULIP_CSR_READ(sc, csr_sia_status);
sc 1012 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_status, sia_status);
sc 1014 dev/pci/if_de.c if (sc->tulip_revinfo >= 0x20) {
sc 1016 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_10BASET_FD;
sc 1022 dev/pci/if_de.c tulip_linkup(sc, sc->tulip_probe_media);
sc 1031 dev/pci/if_de.c if (sc->tulip_probe_media == TULIP_MEDIA_10BASET) {
sc 1034 dev/pci/if_de.c if (sc->tulip_probe_timeout > 0
sc 1036 dev/pci/if_de.c tulip_timeout(sc);
sc 1039 dev/pci/if_de.c sc->tulip_probe_timeout = TULIP_21041_PROBE_AUIBNC_TIMEOUT;
sc 1040 dev/pci/if_de.c sc->tulip_flags |= TULIP_WANTRXACT;
sc 1042 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_BNC;
sc 1044 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_AUI;
sc 1045 dev/pci/if_de.c tulip_media_set(sc, sc->tulip_probe_media);
sc 1046 dev/pci/if_de.c tulip_timeout(sc);
sc 1054 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_TXPROBE_ACTIVE;
sc 1061 dev/pci/if_de.c if (sc->tulip_flags & TULIP_RXACT) {
sc 1062 dev/pci/if_de.c tulip_linkup(sc, sc->tulip_probe_media);
sc 1068 dev/pci/if_de.c if ((sc->tulip_flags & TULIP_TXPROBE_ACTIVE) == 0
sc 1069 dev/pci/if_de.c && ((sc->tulip_flags & TULIP_WANTRXACT) == 0
sc 1071 dev/pci/if_de.c sc->tulip_probe_timeout = TULIP_21041_PROBE_AUIBNC_TIMEOUT;
sc 1072 dev/pci/if_de.c tulip_txprobe(sc);
sc 1073 dev/pci/if_de.c tulip_timeout(sc);
sc 1081 dev/pci/if_de.c if (sc->tulip_probe_timeout <= 0) {
sc 1082 dev/pci/if_de.c if (sc->tulip_flags & TULIP_WANTRXACT) {
sc 1083 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_WANTRXACT;
sc 1084 dev/pci/if_de.c sc->tulip_probe_timeout = TULIP_21041_PROBE_AUIBNC_TIMEOUT;
sc 1086 dev/pci/if_de.c if ((sc->tulip_if.if_flags & IFF_UP) == 0) {
sc 1087 dev/pci/if_de.c sc->tulip_if.if_flags &= ~IFF_RUNNING;
sc 1088 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_INACTIVE;
sc 1098 dev/pci/if_de.c sc->tulip_probe_timeout = TULIP_21041_PROBE_AUIBNC_TIMEOUT;
sc 1099 dev/pci/if_de.c if (sc->tulip_probe_media == TULIP_MEDIA_AUI)
sc 1100 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_BNC;
sc 1102 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_AUI;
sc 1103 dev/pci/if_de.c tulip_media_set(sc, sc->tulip_probe_media);
sc 1104 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_TXPROBE_ACTIVE;
sc 1105 dev/pci/if_de.c tulip_timeout(sc);
sc 1180 dev/pci/if_de.c tulip_mii_phy_readspecific(tulip_softc_t * const sc)
sc 1200 dev/pci/if_de.c data = tulip_mii_readreg(sc, sc->tulip_phyaddr, PHYREG_STATUS)
sc 1201 dev/pci/if_de.c | tulip_mii_readreg(sc, sc->tulip_phyaddr, PHYREG_STATUS);
sc 1205 dev/pci/if_de.c id = (tulip_mii_readreg(sc, sc->tulip_phyaddr, PHYREG_IDLOW) << 16) |
sc 1206 dev/pci/if_de.c tulip_mii_readreg(sc, sc->tulip_phyaddr, PHYREG_IDHIGH);
sc 1216 dev/pci/if_de.c data = tulip_mii_readreg(sc, sc->tulip_phyaddr, pm->pm_regno);
sc 1222 dev/pci/if_de.c data = tulip_mii_readreg(sc, sc->tulip_phyaddr, pm->pm_regno);
sc 1228 dev/pci/if_de.c data = tulip_mii_readreg(sc, sc->tulip_phyaddr, pm->pm_regno);
sc 1234 dev/pci/if_de.c data = tulip_mii_readreg(sc, sc->tulip_phyaddr, pm->pm_regno);
sc 1241 dev/pci/if_de.c tulip_mii_get_phyaddr(tulip_softc_t * const sc, unsigned offset)
sc 1246 dev/pci/if_de.c unsigned status = tulip_mii_readreg(sc, phyaddr, PHYREG_STATUS);
sc 1254 dev/pci/if_de.c unsigned status = tulip_mii_readreg(sc, 0, PHYREG_STATUS);
sc 1263 dev/pci/if_de.c tulip_mii_map_abilities(tulip_softc_t * const sc, unsigned abilities)
sc 1265 dev/pci/if_de.c sc->tulip_abilities = abilities;
sc 1267 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_100BASETX_FD;
sc 1269 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_100BASET4;
sc 1271 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_100BASETX;
sc 1273 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_10BASET_FD;
sc 1275 dev/pci/if_de.c sc->tulip_probe_media = TULIP_MEDIA_10BASET;
sc 1277 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_MEDIATEST;
sc 1280 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_INACTIVE;
sc 1285 dev/pci/if_de.c tulip_mii_autonegotiate(tulip_softc_t * const sc, const unsigned phyaddr)
sc 1287 dev/pci/if_de.c switch (sc->tulip_probe_state) {
sc 1290 dev/pci/if_de.c sc->tulip_flags |= TULIP_DIDNWAY;
sc 1291 dev/pci/if_de.c tulip_mii_writereg(sc, phyaddr, PHYREG_CONTROL, PHYCTL_RESET);
sc 1292 dev/pci/if_de.c sc->tulip_probe_timeout = 3000;
sc 1293 dev/pci/if_de.c sc->tulip_intrmask |= TULIP_STS_ABNRMLINTR|TULIP_STS_NORMALINTR;
sc 1294 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_PHYRESET;
sc 1299 dev/pci/if_de.c u_int32_t data = tulip_mii_readreg(sc, phyaddr, PHYREG_CONTROL);
sc 1301 dev/pci/if_de.c if (sc->tulip_probe_timeout > 0) {
sc 1302 dev/pci/if_de.c tulip_timeout(sc);
sc 1309 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_TXPROBE_ACTIVE;
sc 1310 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_FAILED;
sc 1311 dev/pci/if_de.c sc->tulip_if.if_flags &= ~(IFF_UP|IFF_RUNNING);
sc 1314 dev/pci/if_de.c status = tulip_mii_readreg(sc, phyaddr, PHYREG_STATUS)
sc 1315 dev/pci/if_de.c | tulip_mii_readreg(sc, phyaddr, PHYREG_STATUS);
sc 1321 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_DIDNWAY;
sc 1322 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_MEDIATEST;
sc 1325 dev/pci/if_de.c if (tulip_mii_readreg(sc, phyaddr, PHYREG_AUTONEG_ADVERTISEMENT) != ((status >> 6) | 0x01))
sc 1326 dev/pci/if_de.c tulip_mii_writereg(sc, phyaddr, PHYREG_AUTONEG_ADVERTISEMENT, (status >> 6) | 0x01);
sc 1327 dev/pci/if_de.c tulip_mii_writereg(sc, phyaddr, PHYREG_CONTROL, data|PHYCTL_AUTONEG_RESTART|PHYCTL_AUTONEG_ENABLE);
sc 1328 dev/pci/if_de.c data = tulip_mii_readreg(sc, phyaddr, PHYREG_CONTROL);
sc 1336 dev/pci/if_de.c tulip_mii_readreg(sc, phyaddr, PHYREG_AUTONEG_ADVERTISEMENT));
sc 1337 dev/pci/if_de.c sc->tulip_dbg.dbg_nway_starts++;
sc 1339 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_PHYAUTONEG;
sc 1340 dev/pci/if_de.c sc->tulip_probe_timeout = 3000;
sc 1344 dev/pci/if_de.c u_int32_t status = tulip_mii_readreg(sc, phyaddr, PHYREG_STATUS)
sc 1345 dev/pci/if_de.c | tulip_mii_readreg(sc, phyaddr, PHYREG_STATUS);
sc 1348 dev/pci/if_de.c if (sc->tulip_probe_timeout > 0) {
sc 1349 dev/pci/if_de.c tulip_timeout(sc);
sc 1355 dev/pci/if_de.c tulip_mii_readreg(sc, phyaddr, PHYREG_CONTROL));
sc 1357 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_DIDNWAY;
sc 1358 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_MEDIATEST;
sc 1361 dev/pci/if_de.c data = tulip_mii_readreg(sc, phyaddr, PHYREG_AUTONEG_ABILITIES)
sc 1362 dev/pci/if_de.c | tulip_mii_readreg(sc, phyaddr, PHYREG_AUTONEG_ABILITIES);
sc 1368 dev/pci/if_de.c if (!tulip_mii_map_abilities(sc, data))
sc 1369 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_DIDNWAY;
sc 1381 dev/pci/if_de.c TULIP_PRINTF_ARGS, phyaddr, sc->tulip_probe_state);
sc 1382 dev/pci/if_de.c sc->tulip_dbg.dbg_nway_failures++;
sc 1387 dev/pci/if_de.c tulip_2114x_media_preset(tulip_softc_t * const sc)
sc 1390 dev/pci/if_de.c tulip_media_t media = sc->tulip_media;
sc 1392 dev/pci/if_de.c if (sc->tulip_probe_state == TULIP_PROBE_INACTIVE)
sc 1393 dev/pci/if_de.c media = sc->tulip_media;
sc 1395 dev/pci/if_de.c media = sc->tulip_probe_media;
sc 1397 dev/pci/if_de.c sc->tulip_cmdmode &= ~(TULIP_CMD_PORTSELECT|TULIP_CMD_NOHEARTBEAT
sc 1399 dev/pci/if_de.c sc->tulip_flags &= ~(TULIP_SQETEST|TULIP_FULLDUPLEX);
sc 1402 dev/pci/if_de.c if (media < TULIP_MEDIA_MAX && sc->tulip_mediums[media] != NULL) {
sc 1404 dev/pci/if_de.c mi = sc->tulip_mediums[media];
sc 1406 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_PORTSELECT;
sc 1409 dev/pci/if_de.c sc->tulip_cmdmode &= ~TULIP_GPR_CMDBITS;
sc 1410 dev/pci/if_de.c sc->tulip_cmdmode |= mi->mi_cmdmode;
sc 1412 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_connectivity, TULIP_SIACONN_RESET);
sc 1424 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_TXTHRSHLDCTL;
sc 1425 dev/pci/if_de.c sc->tulip_if.if_baudrate = 10000000;
sc 1426 dev/pci/if_de.c sc->tulip_flags |= TULIP_SQETEST;
sc 1430 dev/pci/if_de.c sc->tulip_flags |= TULIP_FULLDUPLEX;
sc 1431 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_TXTHRSHLDCTL|TULIP_CMD_FULLDUPLEX;
sc 1432 dev/pci/if_de.c sc->tulip_if.if_baudrate = 10000000;
sc 1438 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_PORTSELECT;
sc 1439 dev/pci/if_de.c sc->tulip_if.if_baudrate = 100000000;
sc 1442 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_NOHEARTBEAT;
sc 1448 dev/pci/if_de.c sc->tulip_flags |= TULIP_FULLDUPLEX;
sc 1449 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_PORTSELECT|TULIP_CMD_FULLDUPLEX;
sc 1450 dev/pci/if_de.c sc->tulip_if.if_baudrate = 100000000;
sc 1453 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_NOHEARTBEAT;
sc 1461 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode);
sc 1470 dev/pci/if_de.c tulip_null_media_poll(tulip_softc_t * const sc, tulip_mediapoll_event_t event)
sc 1473 dev/pci/if_de.c sc->tulip_dbg.dbg_events[event]++;
sc 1482 dev/pci/if_de.c tulip_21140_mediainit(tulip_softc_t * const sc, tulip_media_info_t * const mip,
sc 1485 dev/pci/if_de.c sc->tulip_mediums[media] = mip;
sc 1492 dev/pci/if_de.c tulip_21140_evalboard_media_probe(tulip_softc_t * const sc)
sc 1494 dev/pci/if_de.c tulip_media_info_t *mip = sc->tulip_mediainfo;
sc 1496 dev/pci/if_de.c sc->tulip_gpinit = TULIP_GP_EB_PINS;
sc 1497 dev/pci/if_de.c sc->tulip_gpdata = TULIP_GP_EB_INIT;
sc 1498 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_EB_PINS);
sc 1499 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_EB_INIT);
sc 1500 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command,
sc 1501 dev/pci/if_de.c TULIP_CSR_READ(sc, csr_command) | TULIP_CMD_PORTSELECT |
sc 1503 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command,
sc 1504 dev/pci/if_de.c TULIP_CSR_READ(sc, csr_command) & ~TULIP_CMD_TXTHRSHLDCTL);
sc 1506 dev/pci/if_de.c if ((TULIP_CSR_READ(sc, csr_gp) & TULIP_GP_EB_OK100) != 0)
sc 1507 dev/pci/if_de.c sc->tulip_media = TULIP_MEDIA_10BASET;
sc 1509 dev/pci/if_de.c sc->tulip_media = TULIP_MEDIA_100BASETX;
sc 1510 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET,
sc 1513 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET_FD,
sc 1516 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX,
sc 1520 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX_FD,
sc 1535 dev/pci/if_de.c tulip_21140_accton_media_probe(tulip_softc_t * const sc)
sc 1537 dev/pci/if_de.c tulip_media_info_t *mip = sc->tulip_mediainfo;
sc 1540 dev/pci/if_de.c sc->tulip_gpinit = TULIP_GP_EB_PINS;
sc 1541 dev/pci/if_de.c sc->tulip_gpdata = TULIP_GP_EB_INIT;
sc 1542 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_EB_PINS);
sc 1543 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_EB_INIT);
sc 1544 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command,
sc 1545 dev/pci/if_de.c TULIP_CSR_READ(sc, csr_command) | TULIP_CMD_PORTSELECT |
sc 1547 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command,
sc 1548 dev/pci/if_de.c TULIP_CSR_READ(sc, csr_command) & ~TULIP_CMD_TXTHRSHLDCTL);
sc 1550 dev/pci/if_de.c gpdata = TULIP_CSR_READ(sc, csr_gp);
sc 1552 dev/pci/if_de.c sc->tulip_media = TULIP_MEDIA_10BASET;
sc 1555 dev/pci/if_de.c sc->tulip_media = TULIP_MEDIA_BNC;
sc 1557 dev/pci/if_de.c sc->tulip_media = TULIP_MEDIA_100BASETX;
sc 1559 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_BNC,
sc 1562 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET,
sc 1565 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET_FD,
sc 1568 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX,
sc 1572 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX_FD,
sc 1587 dev/pci/if_de.c tulip_21140_smc9332_media_probe(tulip_softc_t * const sc)
sc 1589 dev/pci/if_de.c tulip_media_info_t *mip = sc->tulip_mediainfo;
sc 1592 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command, TULIP_CMD_PORTSELECT|TULIP_CMD_MUSTBEONE);
sc 1593 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
sc 1597 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command, TULIP_CMD_PORTSELECT |
sc 1599 dev/pci/if_de.c sc->tulip_gpinit = TULIP_GP_SMC_9332_PINS;
sc 1600 dev/pci/if_de.c sc->tulip_gpdata = TULIP_GP_SMC_9332_INIT;
sc 1601 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_SMC_9332_PINS|TULIP_GP_PINSET);
sc 1602 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_SMC_9332_INIT);
sc 1605 dev/pci/if_de.c u_int32_t csr = TULIP_CSR_READ(sc, csr_gp);
sc 1615 dev/pci/if_de.c sc->tulip_media = cnt > 100 ? TULIP_MEDIA_100BASETX : TULIP_MEDIA_10BASET;
sc 1616 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX,
sc 1620 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX_FD,
sc 1624 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET,
sc 1627 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET_FD,
sc 1641 dev/pci/if_de.c tulip_21140_cogent_em100_media_probe(tulip_softc_t * const sc)
sc 1643 dev/pci/if_de.c tulip_media_info_t *mip = sc->tulip_mediainfo;
sc 1644 dev/pci/if_de.c u_int32_t cmdmode = TULIP_CSR_READ(sc, csr_command);
sc 1646 dev/pci/if_de.c sc->tulip_gpinit = TULIP_GP_EM100_PINS;
sc 1647 dev/pci/if_de.c sc->tulip_gpdata = TULIP_GP_EM100_INIT;
sc 1648 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_EM100_PINS);
sc 1649 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_EM100_INIT);
sc 1653 dev/pci/if_de.c if (sc->tulip_rombuf[32] == TULIP_COGENT_EM100FX_ID) {
sc 1654 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command, cmdmode);
sc 1655 dev/pci/if_de.c sc->tulip_media = TULIP_MEDIA_100BASEFX;
sc 1657 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASEFX,
sc 1660 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASEFX_FD,
sc 1665 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command, cmdmode|TULIP_CMD_SCRAMBLER);
sc 1666 dev/pci/if_de.c sc->tulip_media = TULIP_MEDIA_100BASETX;
sc 1667 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX,
sc 1671 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX_FD,
sc 1687 dev/pci/if_de.c tulip_21140_znyx_zx34x_media_probe(tulip_softc_t * const sc)
sc 1689 dev/pci/if_de.c tulip_media_info_t *mip = sc->tulip_mediainfo;
sc 1692 dev/pci/if_de.c sc->tulip_gpinit = TULIP_GP_ZX34X_PINS;
sc 1693 dev/pci/if_de.c sc->tulip_gpdata = TULIP_GP_ZX34X_INIT;
sc 1694 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_ZX34X_PINS);
sc 1695 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_ZX34X_INIT);
sc 1696 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command,
sc 1697 dev/pci/if_de.c TULIP_CSR_READ(sc, csr_command) | TULIP_CMD_PORTSELECT |
sc 1699 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command,
sc 1700 dev/pci/if_de.c TULIP_CSR_READ(sc, csr_command) & ~TULIP_CMD_TXTHRSHLDCTL);
sc 1704 dev/pci/if_de.c u_int32_t csr = TULIP_CSR_READ(sc, csr_gp);
sc 1717 dev/pci/if_de.c sc->tulip_media = cnt100 > 100 ? TULIP_MEDIA_100BASETX : TULIP_MEDIA_10BASET;
sc 1718 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET,
sc 1721 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_10BASET_FD,
sc 1724 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX,
sc 1728 dev/pci/if_de.c tulip_21140_mediainit(sc, mip++, TULIP_MEDIA_100BASETX_FD,
sc 1743 dev/pci/if_de.c tulip_2114x_media_probe(tulip_softc_t * const sc)
sc 1745 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_MUSTBEONE
sc 1765 dev/pci/if_de.c tulip_delay_300ns(tulip_softc_t * const sc)
sc 1769 dev/pci/if_de.c (void) TULIP_CSR_READ(sc, csr_busmode);
sc 1773 dev/pci/if_de.c tulip_srom_idle(tulip_softc_t * const sc)
sc 1795 dev/pci/if_de.c tulip_srom_read(tulip_softc_t * const sc)
sc 1803 dev/pci/if_de.c tulip_srom_idle(sc);
sc 1829 dev/pci/if_de.c data |= TULIP_CSR_READ(sc, csr_srom_mii) & SROMDIN ? 1 : 0;
sc 1832 dev/pci/if_de.c sc->tulip_rombuf[idx*2] = data & 0xFF;
sc 1833 dev/pci/if_de.c sc->tulip_rombuf[idx*2+1] = data >> 8;
sc 1837 dev/pci/if_de.c tulip_srom_idle(sc);
sc 1841 dev/pci/if_de.c tulip_mii_writebits(tulip_softc_t * const sc, unsigned data, unsigned bits)
sc 1844 dev/pci/if_de.c unsigned csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK);
sc 1860 dev/pci/if_de.c tulip_mii_turnaround(tulip_softc_t * const sc, unsigned cmd)
sc 1862 dev/pci/if_de.c unsigned csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK);
sc 1876 dev/pci/if_de.c tulip_mii_readbits(tulip_softc_t * const sc)
sc 1879 dev/pci/if_de.c unsigned csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK);
sc 1885 dev/pci/if_de.c if (TULIP_CSR_READ(sc, csr_srom_mii) & MII_DIN)
sc 1895 dev/pci/if_de.c tulip_mii_readreg(tulip_softc_t * const sc, unsigned devaddr, unsigned regno)
sc 1897 dev/pci/if_de.c unsigned csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK);
sc 1901 dev/pci/if_de.c tulip_mii_writebits(sc, MII_PREAMBLE, 32);
sc 1902 dev/pci/if_de.c tulip_mii_writebits(sc, MII_RDCMD, 8);
sc 1903 dev/pci/if_de.c tulip_mii_writebits(sc, devaddr, 5);
sc 1904 dev/pci/if_de.c tulip_mii_writebits(sc, regno, 5);
sc 1905 dev/pci/if_de.c tulip_mii_turnaround(sc, MII_RDCMD);
sc 1907 dev/pci/if_de.c data = tulip_mii_readbits(sc);
sc 1909 dev/pci/if_de.c sc->tulip_dbg.dbg_phyregs[regno][0] = data;
sc 1910 dev/pci/if_de.c sc->tulip_dbg.dbg_phyregs[regno][1]++;
sc 1916 dev/pci/if_de.c tulip_mii_writereg(tulip_softc_t * const sc, unsigned devaddr,
sc 1921 dev/pci/if_de.c csr = TULIP_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK);
sc 1923 dev/pci/if_de.c tulip_mii_writebits(sc, MII_PREAMBLE, 32);
sc 1924 dev/pci/if_de.c tulip_mii_writebits(sc, MII_WRCMD, 8);
sc 1925 dev/pci/if_de.c tulip_mii_writebits(sc, devaddr, 5);
sc 1926 dev/pci/if_de.c tulip_mii_writebits(sc, regno, 5);
sc 1927 dev/pci/if_de.c tulip_mii_turnaround(sc, MII_WRCMD);
sc 1928 dev/pci/if_de.c tulip_mii_writebits(sc, data, 16);
sc 1930 dev/pci/if_de.c sc->tulip_dbg.dbg_phyregs[regno][2] = data;
sc 1931 dev/pci/if_de.c sc->tulip_dbg.dbg_phyregs[regno][3]++;
sc 1936 dev/pci/if_de.c tulip_identify_dec_nic(tulip_softc_t * const sc)
sc 1938 dev/pci/if_de.c strlcpy(sc->tulip_boardid, "DEC ", sizeof(sc->tulip_boardid));
sc 1940 dev/pci/if_de.c if (sc->tulip_chipid <= TULIP_DE425)
sc 1942 dev/pci/if_de.c if (bcmp(sc->tulip_rombuf + 29, "DE500", 5) == 0
sc 1943 dev/pci/if_de.c || bcmp(sc->tulip_rombuf + 29, "DE450", 5) == 0) {
sc 1944 dev/pci/if_de.c bcopy(sc->tulip_rombuf + 29, &sc->tulip_boardid[D0], 8);
sc 1945 dev/pci/if_de.c sc->tulip_boardid[D0+8] = ' ';
sc 1951 dev/pci/if_de.c tulip_identify_znyx_nic(tulip_softc_t * const sc)
sc 1954 dev/pci/if_de.c strlcpy(sc->tulip_boardid, "ZNYX ZX3XX ", sizeof(sc->tulip_boardid));
sc 1955 dev/pci/if_de.c if (sc->tulip_chipid == TULIP_21140 || sc->tulip_chipid == TULIP_21140A) {
sc 1957 dev/pci/if_de.c sc->tulip_boardid[8] = '4';
sc 1958 dev/pci/if_de.c znyx_ptr = sc->tulip_rombuf[124] + 256 * sc->tulip_rombuf[125];
sc 1960 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21140_znyx_zx34x_boardsw;
sc 1965 dev/pci/if_de.c if (sc->tulip_rombuf[znyx_ptr] == 0x4A
sc 1966 dev/pci/if_de.c && sc->tulip_rombuf[znyx_ptr + 1] == 0x52
sc 1967 dev/pci/if_de.c && sc->tulip_rombuf[znyx_ptr + 2] == 0x01) {
sc 1968 dev/pci/if_de.c id = sc->tulip_rombuf[znyx_ptr + 5] + 256 * sc->tulip_rombuf[znyx_ptr + 4];
sc 1970 dev/pci/if_de.c sc->tulip_boardid[9] = '2';
sc 1972 dev/pci/if_de.c sc->tulip_boardid[10] = 'B';
sc 1973 dev/pci/if_de.c sc->tulip_boardid[11] = ' ';
sc 1975 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21140_znyx_zx34x_boardsw;
sc 1977 dev/pci/if_de.c sc->tulip_boardid[10] = '4';
sc 1978 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21140_znyx_zx34x_boardsw;
sc 1980 dev/pci/if_de.c sc->tulip_boardid[9] = (sc->tulip_rombuf[19] > 1) ? '8' : '5';
sc 1982 dev/pci/if_de.c sc->tulip_boardid[9] = '6';
sc 1984 dev/pci/if_de.c sc->tulip_boardid[8] = '5';
sc 1985 dev/pci/if_de.c sc->tulip_boardid[9] = '1';
sc 1992 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21140_znyx_zx34x_boardsw;
sc 1996 dev/pci/if_de.c sc->tulip_boardid[8] = '1';
sc 1997 dev/pci/if_de.c if (sc->tulip_chipid == TULIP_21041) {
sc 1998 dev/pci/if_de.c sc->tulip_boardid[10] = '1';
sc 2001 dev/pci/if_de.c if (sc->tulip_rombuf[32] == 0x4A && sc->tulip_rombuf[33] == 0x52) {
sc 2002 dev/pci/if_de.c id = sc->tulip_rombuf[37] + 256 * sc->tulip_rombuf[36];
sc 2004 dev/pci/if_de.c sc->tulip_boardid[9] = '2';
sc 2005 dev/pci/if_de.c sc->tulip_boardid[10] = 'T';
sc 2006 dev/pci/if_de.c sc->tulip_boardid[11] = ' ';
sc 2007 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21040_10baset_only_boardsw;
sc 2009 dev/pci/if_de.c sc->tulip_boardid[9] = '4';
sc 2010 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21040_10baset_only_boardsw;
sc 2011 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_SHAREDINTR|TULIP_HAVE_BASEROM;
sc 2013 dev/pci/if_de.c sc->tulip_boardid[9] = '4';
sc 2014 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21040_10baset_only_boardsw;
sc 2015 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_BASEROM;
sc 2017 dev/pci/if_de.c sc->tulip_boardid[9] = '5';
sc 2018 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_SHAREDINTR|TULIP_HAVE_BASEROM;
sc 2020 dev/pci/if_de.c sc->tulip_boardid[9] = '5';
sc 2021 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_BASEROM;
sc 2026 dev/pci/if_de.c if ((sc->tulip_enaddr[3] & ~3) == 0xF0 && (sc->tulip_enaddr[5] & 3) == 0) {
sc 2027 dev/pci/if_de.c sc->tulip_boardid[9] = '4';
sc 2028 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21040_10baset_only_boardsw;
sc 2029 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_SHAREDINTR|TULIP_HAVE_BASEROM;
sc 2030 dev/pci/if_de.c } else if ((sc->tulip_enaddr[3] & ~3) == 0xF4 && (sc->tulip_enaddr[5] & 1) == 0) {
sc 2031 dev/pci/if_de.c sc->tulip_boardid[9] = '5';
sc 2032 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21040_boardsw;
sc 2033 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_SHAREDINTR|TULIP_HAVE_BASEROM;
sc 2034 dev/pci/if_de.c } else if ((sc->tulip_enaddr[3] & ~3) == 0xEC) {
sc 2035 dev/pci/if_de.c sc->tulip_boardid[9] = '2';
sc 2036 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21040_boardsw;
sc 2042 dev/pci/if_de.c tulip_identify_smc_nic(tulip_softc_t * const sc)
sc 2048 dev/pci/if_de.c strlcpy(sc->tulip_boardid, "SMC ", sizeof(sc->tulip_boardid));
sc 2049 dev/pci/if_de.c if (sc->tulip_chipid == TULIP_21041)
sc 2051 dev/pci/if_de.c if (sc->tulip_chipid != TULIP_21040) {
sc 2052 dev/pci/if_de.c if (sc->tulip_boardsw != &tulip_2114x_isv_boardsw) {
sc 2053 dev/pci/if_de.c strlcat(sc->tulip_boardid, "9332DST ", sizeof(sc->tulip_boardid));
sc 2054 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21140_smc9332_boardsw;
sc 2055 dev/pci/if_de.c } else if (sc->tulip_features & (TULIP_HAVE_BASEROM|TULIP_HAVE_SLAVEDROM))
sc 2056 dev/pci/if_de.c strlcat(sc->tulip_boardid, "9334BDT ", sizeof(sc->tulip_boardid));
sc 2058 dev/pci/if_de.c strlcat(sc->tulip_boardid, "9332BDT ", sizeof(sc->tulip_boardid));
sc 2061 dev/pci/if_de.c id1 = sc->tulip_rombuf[0x60] | (sc->tulip_rombuf[0x61] << 8);
sc 2062 dev/pci/if_de.c id2 = sc->tulip_rombuf[0x62] | (sc->tulip_rombuf[0x63] << 8);
sc 2063 dev/pci/if_de.c ei = sc->tulip_rombuf[0x66] | (sc->tulip_rombuf[0x67] << 8);
sc 2065 dev/pci/if_de.c strlcat(sc->tulip_boardid, "8432", sizeof(sc->tulip_boardid));
sc 2066 dev/pci/if_de.c cp = &sc->tulip_boardid[8];
sc 2074 dev/pci/if_de.c sc->tulip_boardid[7] = '4';
sc 2083 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21040_10baset_only_boardsw;
sc 2085 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21040_auibnc_only_boardsw;
sc 2089 dev/pci/if_de.c tulip_identify_cogent_nic(tulip_softc_t * const sc)
sc 2091 dev/pci/if_de.c strlcpy(sc->tulip_boardid, "Cogent ", sizeof(sc->tulip_boardid));
sc 2092 dev/pci/if_de.c if (sc->tulip_chipid == TULIP_21140 || sc->tulip_chipid == TULIP_21140A) {
sc 2093 dev/pci/if_de.c if (sc->tulip_rombuf[32] == TULIP_COGENT_EM100TX_ID) {
sc 2094 dev/pci/if_de.c strlcat(sc->tulip_boardid, "EM100TX ", sizeof(sc->tulip_boardid));
sc 2095 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21140_cogent_em100_boardsw;
sc 2097 dev/pci/if_de.c } else if (sc->tulip_rombuf[32] == TULIP_COGENT_EM110TX_ID) {
sc 2098 dev/pci/if_de.c strlcat(sc->tulip_boardid, "EM110TX ", sizeof(sc->tulip_boardid));
sc 2099 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21140_cogent_em100_boardsw;
sc 2101 dev/pci/if_de.c } else if (sc->tulip_rombuf[32] == TULIP_COGENT_EM100FX_ID) {
sc 2102 dev/pci/if_de.c strlcat(sc->tulip_boardid, "EM100FX ", sizeof(sc->tulip_boardid));
sc 2103 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21140_cogent_em100_boardsw;
sc 2109 dev/pci/if_de.c if (*(u_int32_t *) sc->tulip_rombuf == 0x24001109U
sc 2110 dev/pci/if_de.c && (sc->tulip_features & TULIP_HAVE_BASEROM)) {
sc 2115 dev/pci/if_de.c strlcat(sc->tulip_boardid, "EM440TX ", sizeof(sc->tulip_boardid));
sc 2116 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_SHAREDINTR;
sc 2118 dev/pci/if_de.c } else if (sc->tulip_chipid == TULIP_21040)
sc 2119 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_SHAREDINTR|TULIP_HAVE_BASEROM;
sc 2123 dev/pci/if_de.c tulip_identify_accton_nic(tulip_softc_t * const sc)
sc 2125 dev/pci/if_de.c strlcpy(sc->tulip_boardid, "ACCTON ", sizeof(sc->tulip_boardid));
sc 2126 dev/pci/if_de.c switch (sc->tulip_chipid) {
sc 2128 dev/pci/if_de.c strlcat(sc->tulip_boardid, "EN1207 ", sizeof(sc->tulip_boardid));
sc 2129 dev/pci/if_de.c if (sc->tulip_boardsw != &tulip_2114x_isv_boardsw)
sc 2130 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21140_accton_boardsw;
sc 2133 dev/pci/if_de.c strlcat(sc->tulip_boardid, "EN1207TX ", sizeof(sc->tulip_boardid));
sc 2134 dev/pci/if_de.c if (sc->tulip_boardsw != &tulip_2114x_isv_boardsw)
sc 2135 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21140_eb_boardsw;
sc 2138 dev/pci/if_de.c strlcat(sc->tulip_boardid, "EN1203 ", sizeof(sc->tulip_boardid));
sc 2139 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21040_boardsw;
sc 2142 dev/pci/if_de.c strlcat(sc->tulip_boardid, "EN1203 ", sizeof(sc->tulip_boardid));
sc 2143 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21041_boardsw;
sc 2146 dev/pci/if_de.c sc->tulip_boardsw = &tulip_2114x_isv_boardsw;
sc 2152 dev/pci/if_de.c tulip_identify_asante_nic(tulip_softc_t * const sc)
sc 2154 dev/pci/if_de.c strlcpy(sc->tulip_boardid, "Asante ", sizeof(sc->tulip_boardid));
sc 2155 dev/pci/if_de.c if ((sc->tulip_chipid == TULIP_21140 || sc->tulip_chipid == TULIP_21140A)
sc 2156 dev/pci/if_de.c && sc->tulip_boardsw != &tulip_2114x_isv_boardsw) {
sc 2157 dev/pci/if_de.c tulip_media_info_t *mi = sc->tulip_mediainfo;
sc 2165 dev/pci/if_de.c sc->tulip_gpinit = TULIP_GP_ASANTE_PINS;
sc 2166 dev/pci/if_de.c sc->tulip_gpdata = 0;
sc 2168 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_ASANTE_PINS|TULIP_GP_PINSET);
sc 2169 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, TULIP_GP_ASANTE_PHYRESET);
sc 2171 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, 0);
sc 2182 dev/pci/if_de.c mi->mi_phyaddr = tulip_mii_get_phyaddr(sc, 0);
sc 2191 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_MII;
sc 2196 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASETX_FD);
sc 2197 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASETX);
sc 2198 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASET4);
sc 2199 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 10BASET_FD);
sc 2200 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 10BASET);
sc 2201 dev/pci/if_de.c mi->mi_phyid = (tulip_mii_readreg(sc, mi->mi_phyaddr, PHYREG_IDLOW) << 16) |
sc 2202 dev/pci/if_de.c tulip_mii_readreg(sc, mi->mi_phyaddr, PHYREG_IDHIGH);
sc 2204 dev/pci/if_de.c sc->tulip_boardsw = &tulip_2114x_isv_boardsw;
sc 2209 dev/pci/if_de.c tulip_identify_compex_nic(tulip_softc_t * const sc)
sc 2211 dev/pci/if_de.c strlcpy(sc->tulip_boardid, "COMPEX ", sizeof(sc->tulip_boardid));
sc 2212 dev/pci/if_de.c if (sc->tulip_chipid == TULIP_21140A) {
sc 2216 dev/pci/if_de.c strlcat(sc->tulip_boardid, "400TX/PCI ", sizeof(sc->tulip_boardid));
sc 2221 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_SHAREDINTR;
sc 2222 dev/pci/if_de.c for (root_unit = sc->tulip_unit - 1; root_unit >= 0; root_unit--) {
sc 2230 dev/pci/if_de.c && root_sc->tulip_chipid == sc->tulip_chipid
sc 2231 dev/pci/if_de.c && root_sc->tulip_pci_busno == sc->tulip_pci_busno) {
sc 2232 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_SLAVEDINTR;
sc 2233 dev/pci/if_de.c sc->tulip_slaves = root_sc->tulip_slaves;
sc 2234 dev/pci/if_de.c root_sc->tulip_slaves = sc;
sc 2235 dev/pci/if_de.c } else if(sc->tulip_features & TULIP_HAVE_SLAVEDINTR)
sc 2236 dev/pci/if_de.c printf("\nCannot find master device for de%d interrupts", sc->tulip_unit);
sc 2238 dev/pci/if_de.c strlcat(sc->tulip_boardid, "unknown ", sizeof(sc->tulip_boardid));
sc 2244 dev/pci/if_de.c tulip_srom_decode(tulip_softc_t * const sc)
sc 2248 dev/pci/if_de.c const tulip_srom_header_t *shp = (tulip_srom_header_t *) &sc->tulip_rombuf[0];
sc 2251 dev/pci/if_de.c tulip_media_info_t *mi = sc->tulip_mediainfo;
sc 2258 dev/pci/if_de.c if (saip->sai_device == sc->tulip_pci_devno)
sc 2270 dev/pci/if_de.c bcopy((caddr_t) shp->sh_ieee802_address, (caddr_t) sc->tulip_enaddr,
sc 2277 dev/pci/if_de.c sc->tulip_enaddr[5] += idx1;
sc 2281 dev/pci/if_de.c dp = sc->tulip_rombuf + leaf_offset;
sc 2283 dev/pci/if_de.c sc->tulip_conntype = (tulip_srom_connection_t) (dp[0] + dp[1] * 256); dp += 2;
sc 2286 dev/pci/if_de.c if (tulip_srom_conninfo[idx2].sc_type == sc->tulip_conntype
sc 2290 dev/pci/if_de.c sc->tulip_connidx = idx2;
sc 2292 dev/pci/if_de.c if (sc->tulip_chipid == TULIP_21041) {
sc 2306 dev/pci/if_de.c sc->tulip_mediums[media] = mi;
sc 2314 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21041, BNC);
sc 2319 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21041, AUI);
sc 2324 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21041, 10BASET);
sc 2329 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21041, 10BASET_FD);
sc 2345 dev/pci/if_de.c if (sc->tulip_features & TULIP_HAVE_GPR)
sc 2346 dev/pci/if_de.c sc->tulip_gpinit = *dp++;
sc 2370 dev/pci/if_de.c sc->tulip_mediums[media] = mi;
sc 2373 dev/pci/if_de.c sc->tulip_gpdata = mi->mi_gpdata;
sc 2391 dev/pci/if_de.c mi->mi_gpr_offset = dp - sc->tulip_rombuf;
sc 2394 dev/pci/if_de.c mi->mi_reset_offset = dp - sc->tulip_rombuf;
sc 2401 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, sc->tulip_gpinit|TULIP_GP_PINSET);
sc 2404 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, sc->tulip_rombuf[mi->mi_reset_offset + idx3]);
sc 2406 dev/pci/if_de.c sc->tulip_phyaddr = mi->mi_phyaddr;
sc 2409 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, sc->tulip_rombuf[mi->mi_gpr_offset + idx3]);
sc 2416 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_gp, 0);
sc 2421 dev/pci/if_de.c mi->mi_phyaddr = tulip_mii_get_phyaddr(sc, phyno);
sc 2430 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_MII;
sc 2435 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASETX_FD);
sc 2436 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASETX);
sc 2437 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASET4);
sc 2438 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 10BASET_FD);
sc 2439 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 10BASET);
sc 2440 dev/pci/if_de.c mi->mi_phyid = (tulip_mii_readreg(sc, mi->mi_phyaddr, PHYREG_IDLOW) << 16) |
sc 2441 dev/pci/if_de.c tulip_mii_readreg(sc, mi->mi_phyaddr, PHYREG_IDHIGH);
sc 2456 dev/pci/if_de.c sc->tulip_mediums[media] = mi;
sc 2465 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21142, BNC);
sc 2469 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21142, AUI);
sc 2473 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21142, 10BASET);
sc 2474 dev/pci/if_de.c sc->tulip_intrmask |= TULIP_STS_LINKPASS|TULIP_STS_LINKFAIL;
sc 2478 dev/pci/if_de.c TULIP_MEDIAINFO_SIA_INIT(sc, mi, 21142, 10BASET_FD);
sc 2479 dev/pci/if_de.c sc->tulip_intrmask |= TULIP_STS_LINKPASS|TULIP_STS_LINKFAIL;
sc 2498 dev/pci/if_de.c mi->mi_gpr_offset = dp - sc->tulip_rombuf;
sc 2501 dev/pci/if_de.c mi->mi_reset_offset = dp - sc->tulip_rombuf;
sc 2504 dev/pci/if_de.c dp0 = &sc->tulip_rombuf[mi->mi_reset_offset];
sc 2507 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_general, (dp0[0] + 256 * dp0[1]) << 16);
sc 2509 dev/pci/if_de.c sc->tulip_phyaddr = mi->mi_phyaddr;
sc 2510 dev/pci/if_de.c dp0 = &sc->tulip_rombuf[mi->mi_gpr_offset];
sc 2513 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_general, (dp0[0] + 256 * dp0[1]) << 16);
sc 2517 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_general, 0);
sc 2522 dev/pci/if_de.c mi->mi_phyaddr = tulip_mii_get_phyaddr(sc, phyno);
sc 2531 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_MII;
sc 2537 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASETX_FD);
sc 2538 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASETX);
sc 2539 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 100BASET4);
sc 2540 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 10BASET_FD);
sc 2541 dev/pci/if_de.c TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, 10BASET);
sc 2542 dev/pci/if_de.c mi->mi_phyid = (tulip_mii_readreg(sc, mi->mi_phyaddr, PHYREG_IDLOW) << 16) |
sc 2543 dev/pci/if_de.c tulip_mii_readreg(sc, mi->mi_phyaddr, PHYREG_IDHIGH);
sc 2558 dev/pci/if_de.c sc->tulip_mediums[media] = mi;
sc 2571 dev/pci/if_de.c sc->tulip_intrmask |= TULIP_STS_LINKPASS|TULIP_STS_LINKFAIL;
sc 2581 dev/pci/if_de.c return (mi - sc->tulip_mediainfo);
sc 2585 dev/pci/if_de.c void (*vendor_identify_nic)(tulip_softc_t * const sc);
sc 2606 dev/pci/if_de.c tulip_read_macaddr(tulip_softc_t * const sc)
sc 2613 dev/pci/if_de.c sc->tulip_connidx = TULIP_SROM_LASTCONNIDX;
sc 2615 dev/pci/if_de.c if (sc->tulip_chipid == TULIP_21040) {
sc 2616 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_enetrom, 1);
sc 2617 dev/pci/if_de.c for (idx = 0; idx < sizeof(sc->tulip_rombuf); idx++) {
sc 2619 dev/pci/if_de.c while (((csr = TULIP_CSR_READ(sc, csr_enetrom)) & 0x80000000L) && cnt < 10000)
sc 2621 dev/pci/if_de.c sc->tulip_rombuf[idx] = csr & 0xFF;
sc 2623 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21040_boardsw;
sc 2625 dev/pci/if_de.c if (sc->tulip_chipid == TULIP_21041) {
sc 2629 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21041_boardsw;
sc 2638 dev/pci/if_de.c sc->tulip_boardsw = &tulip_21140_eb_boardsw;
sc 2640 dev/pci/if_de.c tulip_srom_read(sc);
sc 2641 dev/pci/if_de.c if (tulip_srom_crcok(sc->tulip_rombuf)) {
sc 2646 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_ISVSROM|TULIP_HAVE_OKSROM;
sc 2647 dev/pci/if_de.c } else if (sc->tulip_rombuf[126] == 0xff && sc->tulip_rombuf[127] == 0xFF) {
sc 2654 dev/pci/if_de.c if (sc->tulip_rombuf[idx] != 0)
sc 2657 dev/pci/if_de.c if (idx == 18 && sc->tulip_rombuf[18] == 1 && sc->tulip_rombuf[19] != 0)
sc 2658 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_ISVSROM;
sc 2659 dev/pci/if_de.c } else if (sc->tulip_chipid >= TULIP_21142) {
sc 2660 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_ISVSROM;
sc 2661 dev/pci/if_de.c sc->tulip_boardsw = &tulip_2114x_isv_boardsw;
sc 2663 dev/pci/if_de.c if ((sc->tulip_features & TULIP_HAVE_ISVSROM) && tulip_srom_decode(sc)) {
sc 2664 dev/pci/if_de.c if (sc->tulip_chipid != TULIP_21041)
sc 2665 dev/pci/if_de.c sc->tulip_boardsw = &tulip_2114x_isv_boardsw;
sc 2671 dev/pci/if_de.c if (sc->tulip_rombuf[19] > 1)
sc 2672 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_BASEROM;
sc 2673 dev/pci/if_de.c if (sc->tulip_boardsw == NULL)
sc 2679 dev/pci/if_de.c if (bcmp(&sc->tulip_rombuf[0], &sc->tulip_rombuf[16], 8) != 0) {
sc 2688 dev/pci/if_de.c if (sc->tulip_rombuf[idx] != 0xFF)
sc 2695 dev/pci/if_de.c if ((sc->tulip_rombuf[0] & 3) != 0)
sc 2697 dev/pci/if_de.c if (sc->tulip_rombuf[0] == 0 && sc->tulip_rombuf[1] == 0
sc 2698 dev/pci/if_de.c && sc->tulip_rombuf[2] == 0)
sc 2700 dev/pci/if_de.c bcopy(sc->tulip_rombuf, sc->tulip_enaddr, ETHER_ADDR_LEN);
sc 2701 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_OKROM;
sc 2714 dev/pci/if_de.c for (idx = 0; idx < sizeof(sc->tulip_rombuf); idx++) {
sc 2715 dev/pci/if_de.c if (sc->tulip_rombuf[idx] != 0 && sc->tulip_rombuf[idx] != 0xFF)
sc 2718 dev/pci/if_de.c if (idx == sizeof(sc->tulip_rombuf)) {
sc 2721 dev/pci/if_de.c for (root_unit = sc->tulip_unit - 1; root_unit >= 0; root_unit--) {
sc 2728 dev/pci/if_de.c && root_sc->tulip_chipid == sc->tulip_chipid
sc 2729 dev/pci/if_de.c && root_sc->tulip_pci_busno == sc->tulip_pci_busno) {
sc 2730 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_SLAVEDROM;
sc 2731 dev/pci/if_de.c sc->tulip_boardsw = root_sc->tulip_boardsw;
sc 2732 dev/pci/if_de.c strlcpy(sc->tulip_boardid, root_sc->tulip_boardid,
sc 2733 dev/pci/if_de.c sizeof(sc->tulip_boardid));
sc 2734 dev/pci/if_de.c if (sc->tulip_boardsw->bd_type == TULIP_21140_ISV) {
sc 2735 dev/pci/if_de.c bcopy(root_sc->tulip_rombuf, sc->tulip_rombuf,
sc 2736 dev/pci/if_de.c sizeof(sc->tulip_rombuf));
sc 2737 dev/pci/if_de.c if (!tulip_srom_decode(sc))
sc 2740 dev/pci/if_de.c bcopy(root_sc->tulip_enaddr, sc->tulip_enaddr,
sc 2742 dev/pci/if_de.c sc->tulip_enaddr[5] += sc->tulip_unit - root_sc->tulip_unit;
sc 2752 dev/pci/if_de.c sc->tulip_slaves = root_sc->tulip_slaves;
sc 2753 dev/pci/if_de.c root_sc->tulip_slaves = sc;
sc 2754 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_SLAVEDINTR;
sc 2765 dev/pci/if_de.c if (bcmp(&sc->tulip_rombuf[24], testpat, 8) != 0)
sc 2768 dev/pci/if_de.c tmpbuf[0] = sc->tulip_rombuf[15]; tmpbuf[1] = sc->tulip_rombuf[14];
sc 2769 dev/pci/if_de.c tmpbuf[2] = sc->tulip_rombuf[13]; tmpbuf[3] = sc->tulip_rombuf[12];
sc 2770 dev/pci/if_de.c tmpbuf[4] = sc->tulip_rombuf[11]; tmpbuf[5] = sc->tulip_rombuf[10];
sc 2771 dev/pci/if_de.c tmpbuf[6] = sc->tulip_rombuf[9]; tmpbuf[7] = sc->tulip_rombuf[8];
sc 2772 dev/pci/if_de.c if (bcmp(&sc->tulip_rombuf[0], tmpbuf, 8) != 0)
sc 2775 dev/pci/if_de.c bcopy(sc->tulip_rombuf, sc->tulip_enaddr, ETHER_ADDR_LEN);
sc 2777 dev/pci/if_de.c cksum = *(u_int16_t *) &sc->tulip_enaddr[0];
sc 2780 dev/pci/if_de.c cksum += *(u_int16_t *) &sc->tulip_enaddr[2];
sc 2784 dev/pci/if_de.c cksum += *(u_int16_t *) &sc->tulip_enaddr[4];
sc 2787 dev/pci/if_de.c rom_cksum = *(u_int16_t *) &sc->tulip_rombuf[6];
sc 2797 dev/pci/if_de.c if (bcmp((caddr_t) sc->tulip_enaddr,
sc 2799 dev/pci/if_de.c (*tulip_vendors[idx].vendor_identify_nic)(sc);
sc 2804 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_OKROM;
sc 2809 dev/pci/if_de.c tulip_ifmedia_add(tulip_softc_t * const sc)
sc 2815 dev/pci/if_de.c if (sc->tulip_mediums[media] != NULL) {
sc 2816 dev/pci/if_de.c ifmedia_add(&sc->tulip_ifmedia, tulip_media_to_ifmedia[media],
sc 2822 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_NOMEDIA;
sc 2823 dev/pci/if_de.c ifmedia_add(&sc->tulip_ifmedia, IFM_ETHER | IFM_NONE, 0, 0);
sc 2824 dev/pci/if_de.c ifmedia_set(&sc->tulip_ifmedia, IFM_ETHER | IFM_NONE);
sc 2825 dev/pci/if_de.c } else if (sc->tulip_media == TULIP_MEDIA_UNKNOWN) {
sc 2826 dev/pci/if_de.c ifmedia_add(&sc->tulip_ifmedia, IFM_ETHER | IFM_AUTO, 0, 0);
sc 2827 dev/pci/if_de.c ifmedia_set(&sc->tulip_ifmedia, IFM_ETHER | IFM_AUTO);
sc 2829 dev/pci/if_de.c ifmedia_set(&sc->tulip_ifmedia, tulip_media_to_ifmedia[sc->tulip_media]);
sc 2830 dev/pci/if_de.c sc->tulip_flags |= TULIP_PRINTMEDIA;
sc 2831 dev/pci/if_de.c tulip_linkup(sc, sc->tulip_media);
sc 2838 dev/pci/if_de.c tulip_softc_t * const sc = TULIP_IFP_TO_SOFTC(ifp);
sc 2840 dev/pci/if_de.c sc->tulip_flags |= TULIP_NEEDRESET;
sc 2841 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_INACTIVE;
sc 2842 dev/pci/if_de.c sc->tulip_media = TULIP_MEDIA_UNKNOWN;
sc 2843 dev/pci/if_de.c if (IFM_SUBTYPE(sc->tulip_ifmedia.ifm_media) != IFM_AUTO) {
sc 2846 dev/pci/if_de.c if (sc->tulip_mediums[media] != NULL
sc 2847 dev/pci/if_de.c && sc->tulip_ifmedia.ifm_media == tulip_media_to_ifmedia[media]) {
sc 2848 dev/pci/if_de.c sc->tulip_flags |= TULIP_PRINTMEDIA;
sc 2849 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_DIDNWAY;
sc 2850 dev/pci/if_de.c tulip_linkup(sc, media);
sc 2855 dev/pci/if_de.c sc->tulip_flags &= ~(TULIP_TXPROBE_ACTIVE|TULIP_WANTRXACT);
sc 2856 dev/pci/if_de.c tulip_reset(sc);
sc 2857 dev/pci/if_de.c tulip_init(sc);
sc 2867 dev/pci/if_de.c tulip_softc_t *sc = TULIP_IFP_TO_SOFTC(ifp);
sc 2869 dev/pci/if_de.c if (sc->tulip_media == TULIP_MEDIA_UNKNOWN)
sc 2873 dev/pci/if_de.c if (sc->tulip_flags & TULIP_LINKUP)
sc 2876 dev/pci/if_de.c req->ifm_active = tulip_media_to_ifmedia[sc->tulip_media];
sc 2880 dev/pci/if_de.c tulip_addr_filter(tulip_softc_t * const sc)
sc 2885 dev/pci/if_de.c sc->tulip_flags &= ~(TULIP_WANTHASHPERFECT|TULIP_WANTHASHONLY|TULIP_ALLMULTI);
sc 2886 dev/pci/if_de.c sc->tulip_flags |= TULIP_WANTSETUP|TULIP_WANTTXSTART;
sc 2887 dev/pci/if_de.c sc->tulip_cmdmode &= ~TULIP_CMD_RXRUN;
sc 2888 dev/pci/if_de.c sc->tulip_intrmask &= ~TULIP_STS_RXSTOPPED;
sc 2889 dev/pci/if_de.c sc->tulip_if.if_flags &= ~IFF_ALLMULTI;
sc 2890 dev/pci/if_de.c sc->tulip_if.if_start = tulip_ifstart; /* so the setup packet gets queued */
sc 2891 dev/pci/if_de.c if (sc->tulip_multicnt > 14) {
sc 2892 dev/pci/if_de.c u_int32_t *sp = sc->tulip_setupdata;
sc 2901 dev/pci/if_de.c if (sc->tulip_features & TULIP_HAVE_BROKEN_HASH)
sc 2902 dev/pci/if_de.c sc->tulip_flags |= TULIP_WANTHASHONLY;
sc 2904 dev/pci/if_de.c sc->tulip_flags |= TULIP_WANTHASHPERFECT;
sc 2910 dev/pci/if_de.c bzero(sc->tulip_setupdata, sizeof(sc->tulip_setupdata));
sc 2911 dev/pci/if_de.c ETHER_FIRST_MULTI(step, &sc->tulip_ac, enm);
sc 2921 dev/pci/if_de.c sc->tulip_flags |= TULIP_ALLMULTI;
sc 2922 dev/pci/if_de.c sc->tulip_flags &= ~(TULIP_WANTHASHONLY|TULIP_WANTHASHPERFECT);
sc 2931 dev/pci/if_de.c if ((sc->tulip_flags & TULIP_ALLMULTI) == 0) {
sc 2938 dev/pci/if_de.c if (sc->tulip_flags & TULIP_WANTHASHONLY) {
sc 2939 dev/pci/if_de.c hash = tulip_mchash(sc->tulip_enaddr);
sc 2947 dev/pci/if_de.c sp[39] = ((u_int16_t *) sc->tulip_enaddr)[0] << 16;
sc 2948 dev/pci/if_de.c sp[40] = ((u_int16_t *) sc->tulip_enaddr)[1] << 16;
sc 2949 dev/pci/if_de.c sp[41] = ((u_int16_t *) sc->tulip_enaddr)[2] << 16;
sc 2951 dev/pci/if_de.c sp[39] = ((u_int16_t *) sc->tulip_enaddr)[0];
sc 2952 dev/pci/if_de.c sp[40] = ((u_int16_t *) sc->tulip_enaddr)[1];
sc 2953 dev/pci/if_de.c sp[41] = ((u_int16_t *) sc->tulip_enaddr)[2];
sc 2958 dev/pci/if_de.c if ((sc->tulip_flags & (TULIP_WANTHASHPERFECT|TULIP_WANTHASHONLY)) == 0) {
sc 2959 dev/pci/if_de.c u_int32_t *sp = sc->tulip_setupdata;
sc 2961 dev/pci/if_de.c if ((sc->tulip_flags & TULIP_ALLMULTI) == 0) {
sc 2965 dev/pci/if_de.c ETHER_FIRST_MULTI(step, &sc->tulip_ac, enm);
sc 2978 dev/pci/if_de.c sc->tulip_flags |= TULIP_ALLMULTI;
sc 3002 dev/pci/if_de.c *sp++ = ((u_int16_t *) sc->tulip_enaddr)[0] << 16;
sc 3003 dev/pci/if_de.c *sp++ = ((u_int16_t *) sc->tulip_enaddr)[1] << 16;
sc 3004 dev/pci/if_de.c *sp++ = ((u_int16_t *) sc->tulip_enaddr)[2] << 16;
sc 3006 dev/pci/if_de.c *sp++ = ((u_int16_t *) sc->tulip_enaddr)[0];
sc 3007 dev/pci/if_de.c *sp++ = ((u_int16_t *) sc->tulip_enaddr)[1];
sc 3008 dev/pci/if_de.c *sp++ = ((u_int16_t *) sc->tulip_enaddr)[2];
sc 3012 dev/pci/if_de.c if (sc->tulip_flags & TULIP_ALLMULTI)
sc 3013 dev/pci/if_de.c sc->tulip_if.if_flags |= IFF_ALLMULTI;
sc 3017 dev/pci/if_de.c tulip_reset(tulip_softc_t * const sc)
sc 3021 dev/pci/if_de.c u_int32_t inreset = (sc->tulip_flags & TULIP_INRESET);
sc 3030 dev/pci/if_de.c if ((sc->tulip_flags & TULIP_DEVICEPROBE) == 0
sc 3031 dev/pci/if_de.c && sc->tulip_boardsw->bd_media_preset != NULL)
sc 3032 dev/pci/if_de.c (*sc->tulip_boardsw->bd_media_preset)(sc);
sc 3034 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
sc 3040 dev/pci/if_de.c sc->tulip_flags |= TULIP_INRESET;
sc 3041 dev/pci/if_de.c sc->tulip_flags &= ~(TULIP_NEEDRESET|TULIP_RXBUFSLOW);
sc 3042 dev/pci/if_de.c sc->tulip_if.if_flags &= ~IFF_OACTIVE;
sc 3043 dev/pci/if_de.c sc->tulip_if.if_start = tulip_ifstart;
sc 3046 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_txlist, sc->tulip_txdescmap->dm_segs[0].ds_addr);
sc 3047 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_rxlist, sc->tulip_rxdescmap->dm_segs[0].ds_addr);
sc 3048 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_busmode,
sc 3049 dev/pci/if_de.c (1 << (TULIP_BURSTSIZE(sc->tulip_unit) + 8))
sc 3055 dev/pci/if_de.c sc->tulip_txtimer = 0;
sc 3056 dev/pci/if_de.c sc->tulip_txq.ifq_maxlen = TULIP_TXDESCS;
sc 3063 dev/pci/if_de.c IF_DEQUEUE(&sc->tulip_txq, m);
sc 3067 dev/pci/if_de.c bus_dmamap_unload(sc->tulip_dmatag, map);
sc 3068 dev/pci/if_de.c sc->tulip_txmaps[sc->tulip_txmaps_free++] = map;
sc 3072 dev/pci/if_de.c ri = &sc->tulip_txinfo;
sc 3077 dev/pci/if_de.c bus_dmamap_sync(sc->tulip_dmatag, sc->tulip_txdescmap,
sc 3078 dev/pci/if_de.c 0, sc->tulip_txdescmap->dm_mapsize,
sc 3087 dev/pci/if_de.c ri = &sc->tulip_rxinfo;
sc 3095 dev/pci/if_de.c bus_dmamap_sync(sc->tulip_dmatag, sc->tulip_rxdescmap,
sc 3096 dev/pci/if_de.c 0, sc->tulip_rxdescmap->dm_mapsize,
sc 3101 dev/pci/if_de.c IF_DEQUEUE(&sc->tulip_rxq, m);
sc 3105 dev/pci/if_de.c bus_dmamap_unload(sc->tulip_dmatag, map);
sc 3106 dev/pci/if_de.c sc->tulip_rxmaps[sc->tulip_rxmaps_free++] = map;
sc 3118 dev/pci/if_de.c sc->tulip_intrmask |= TULIP_STS_NORMALINTR|TULIP_STS_RXINTR|TULIP_STS_TXINTR
sc 3123 dev/pci/if_de.c if ((sc->tulip_flags & TULIP_DEVICEPROBE) == 0)
sc 3124 dev/pci/if_de.c (*sc->tulip_boardsw->bd_media_select)(sc);
sc 3126 dev/pci/if_de.c if ((sc->tulip_flags & TULIP_NEEDRESET) == TULIP_NEEDRESET)
sc 3130 dev/pci/if_de.c tulip_media_print(sc);
sc 3131 dev/pci/if_de.c if (sc->tulip_features & TULIP_HAVE_DUALSENSE)
sc 3132 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_sia_status, TULIP_CSR_READ(sc, csr_sia_status));
sc 3134 dev/pci/if_de.c sc->tulip_flags &= ~(TULIP_DOINGSETUP|TULIP_WANTSETUP|TULIP_INRESET
sc 3136 dev/pci/if_de.c tulip_addr_filter(sc);
sc 3140 dev/pci/if_de.c tulip_init(tulip_softc_t * const sc)
sc 3142 dev/pci/if_de.c if (sc->tulip_if.if_flags & IFF_UP) {
sc 3143 dev/pci/if_de.c if ((sc->tulip_if.if_flags & IFF_RUNNING) == 0) {
sc 3145 dev/pci/if_de.c tulip_reset(sc);
sc 3147 dev/pci/if_de.c sc->tulip_if.if_flags |= IFF_RUNNING;
sc 3148 dev/pci/if_de.c if (sc->tulip_if.if_flags & IFF_PROMISC) {
sc 3149 dev/pci/if_de.c sc->tulip_flags |= TULIP_PROMISC;
sc 3150 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_PROMISCUOUS;
sc 3151 dev/pci/if_de.c sc->tulip_intrmask |= TULIP_STS_TXINTR;
sc 3153 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_PROMISC;
sc 3154 dev/pci/if_de.c sc->tulip_cmdmode &= ~TULIP_CMD_PROMISCUOUS;
sc 3155 dev/pci/if_de.c if (sc->tulip_flags & TULIP_ALLMULTI)
sc 3156 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_ALLMULTI;
sc 3158 dev/pci/if_de.c sc->tulip_cmdmode &= ~TULIP_CMD_ALLMULTI;
sc 3160 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_TXRUN;
sc 3161 dev/pci/if_de.c if ((sc->tulip_flags & (TULIP_TXPROBE_ACTIVE|TULIP_WANTSETUP)) == 0) {
sc 3162 dev/pci/if_de.c tulip_rx_intr(sc);
sc 3163 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_RXRUN;
sc 3164 dev/pci/if_de.c sc->tulip_intrmask |= TULIP_STS_RXSTOPPED;
sc 3166 dev/pci/if_de.c sc->tulip_if.if_flags |= IFF_OACTIVE;
sc 3167 dev/pci/if_de.c sc->tulip_cmdmode &= ~TULIP_CMD_RXRUN;
sc 3168 dev/pci/if_de.c sc->tulip_intrmask &= ~TULIP_STS_RXSTOPPED;
sc 3170 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask);
sc 3171 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode);
sc 3172 dev/pci/if_de.c if ((sc->tulip_flags & (TULIP_WANTSETUP|TULIP_TXPROBE_ACTIVE)) == TULIP_WANTSETUP)
sc 3173 dev/pci/if_de.c tulip_txput_setup(sc);
sc 3175 dev/pci/if_de.c sc->tulip_if.if_flags &= ~IFF_RUNNING;
sc 3176 dev/pci/if_de.c tulip_reset(sc);
sc 3181 dev/pci/if_de.c tulip_rx_intr(tulip_softc_t * const sc)
sc 3184 dev/pci/if_de.c tulip_ringinfo_t * const ri = &sc->tulip_rxinfo;
sc 3185 dev/pci/if_de.c struct ifnet * const ifp = &sc->tulip_if;
sc 3200 dev/pci/if_de.c if (fillok && sc->tulip_rxq.ifq_len < TULIP_RXQ_TARGET)
sc 3218 dev/pci/if_de.c TULIP_RXDESC_POSTSYNC(sc, eop, sizeof(*eop));
sc 3220 dev/pci/if_de.c IF_DEQUEUE(&sc->tulip_rxq, ms);
sc 3236 dev/pci/if_de.c TULIP_RXDESC_POSTSYNC(sc, eop, sizeof(*eop));
sc 3239 dev/pci/if_de.c sc->tulip_dbg.dbg_rxintrs++;
sc 3240 dev/pci/if_de.c sc->tulip_dbg.dbg_rxpktsperintr[cnt]++;
sc 3259 dev/pci/if_de.c IF_DEQUEUE(&sc->tulip_rxq, ms);
sc 3262 dev/pci/if_de.c TULIP_RXMAP_POSTSYNC(sc, map);
sc 3263 dev/pci/if_de.c bus_dmamap_unload(sc->tulip_dmatag, map);
sc 3264 dev/pci/if_de.c sc->tulip_rxmaps[sc->tulip_rxmaps_free++] = map;
sc 3270 dev/pci/if_de.c IF_DEQUEUE(&sc->tulip_rxq, me->m_next);
sc 3279 dev/pci/if_de.c if ((sc->tulip_flags & TULIP_RXIGNORE) == 0
sc 3284 dev/pci/if_de.c bus_dmamap_sync(sc->tulip_dmatag, map, 0, me->m_len,
sc 3286 dev/pci/if_de.c bus_dmamap_unload(sc->tulip_dmatag, map);
sc 3287 dev/pci/if_de.c sc->tulip_rxmaps[sc->tulip_rxmaps_free++] = map;
sc 3293 dev/pci/if_de.c if (sc->tulip_bpf != NULL) {
sc 3295 dev/pci/if_de.c bpf_tap(sc->tulip_if.if_bpf, mtod(ms, caddr_t),
sc 3298 dev/pci/if_de.c bpf_mtap(sc->tulip_if.if_bpf, ms, BPF_DIRECTION_IN);
sc 3301 dev/pci/if_de.c sc->tulip_flags |= TULIP_RXACT;
sc 3306 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsInternalMacReceiveErrors++;
sc 3311 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsFrameTooLongs++;
sc 3316 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsAlignmentErrors++;
sc 3319 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsFCSErrors++;
sc 3323 dev/pci/if_de.c if (error != NULL && (sc->tulip_flags & TULIP_NOMESSAGES) == 0) {
sc 3328 dev/pci/if_de.c sc->tulip_flags |= TULIP_NOMESSAGES;
sc 3334 dev/pci/if_de.c bus_dmamap_unload(sc->tulip_dmatag, map);
sc 3335 dev/pci/if_de.c sc->tulip_rxmaps[sc->tulip_rxmaps_free++] = map;
sc 3403 dev/pci/if_de.c sc->tulip_flags |= TULIP_RXBUFSLOW;
sc 3405 dev/pci/if_de.c sc->tulip_dbg.dbg_rxlowbufs++;
sc 3416 dev/pci/if_de.c if (sc->tulip_rxmaps_free > 0)
sc 3417 dev/pci/if_de.c map = sc->tulip_rxmaps[--sc->tulip_rxmaps_free];
sc 3420 dev/pci/if_de.c sc->tulip_flags |= TULIP_RXBUFSLOW;
sc 3422 dev/pci/if_de.c sc->tulip_dbg.dbg_rxlowbufs++;
sc 3427 dev/pci/if_de.c error = bus_dmamap_load(sc->tulip_dmatag, map, mtod(ms, void *),
sc 3443 dev/pci/if_de.c TULIP_RXDESC_POSTSYNC(sc, nextout, sizeof(*nextout));
sc 3445 dev/pci/if_de.c TULIP_RXDESC_POSTSYNC(sc, nextout, sizeof(u_int32_t));
sc 3450 dev/pci/if_de.c IF_ENQUEUE(&sc->tulip_rxq, ms);
sc 3453 dev/pci/if_de.c if (sc->tulip_rxq.ifq_len >= TULIP_RXQ_TARGET)
sc 3454 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_RXBUFSLOW;
sc 3459 dev/pci/if_de.c sc->tulip_dbg.dbg_rxintrs++;
sc 3460 dev/pci/if_de.c sc->tulip_dbg.dbg_rxpktsperintr[cnt]++;
sc 3466 dev/pci/if_de.c tulip_tx_intr(tulip_softc_t * const sc)
sc 3469 dev/pci/if_de.c tulip_ringinfo_t * const ri = &sc->tulip_txinfo;
sc 3477 dev/pci/if_de.c TULIP_TXDESC_POSTSYNC(sc, ri->ri_nextin, sizeof(*ri->ri_nextin));
sc 3493 dev/pci/if_de.c TULIP_TXMAP_POSTSYNC(sc, sc->tulip_setupmap);
sc 3494 dev/pci/if_de.c sc->tulip_flags &= ~(TULIP_DOINGSETUP|TULIP_HASHONLY);
sc 3496 dev/pci/if_de.c sc->tulip_flags |= TULIP_HASHONLY;
sc 3497 dev/pci/if_de.c if ((sc->tulip_flags & (TULIP_WANTSETUP|TULIP_TXPROBE_ACTIVE)) == 0) {
sc 3498 dev/pci/if_de.c tulip_rx_intr(sc);
sc 3499 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_RXRUN;
sc 3500 dev/pci/if_de.c sc->tulip_intrmask |= TULIP_STS_RXSTOPPED;
sc 3501 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_status, TULIP_STS_RXSTOPPED);
sc 3502 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask);
sc 3503 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode);
sc 3507 dev/pci/if_de.c IF_DEQUEUE(&sc->tulip_txq, m);
sc 3510 dev/pci/if_de.c TULIP_TXMAP_POSTSYNC(sc, map);
sc 3511 dev/pci/if_de.c sc->tulip_txmaps[sc->tulip_txmaps_free++] = map;
sc 3513 dev/pci/if_de.c if (sc->tulip_bpf != NULL)
sc 3514 dev/pci/if_de.c bpf_mtap(sc->tulip_if.if_bpf, m, BPF_DIRECTION_OUT);
sc 3518 dev/pci/if_de.c if (sc->tulip_flags & TULIP_TXPROBE_ACTIVE) {
sc 3523 dev/pci/if_de.c sc->tulip_dbg.dbg_txprobe_nocarr++;
sc 3525 dev/pci/if_de.c sc->tulip_dbg.dbg_txprobe_exccoll++;
sc 3529 dev/pci/if_de.c (*sc->tulip_boardsw->bd_media_poll)(sc, event);
sc 3537 dev/pci/if_de.c sc->tulip_if.if_oerrors++;
sc 3539 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsExcessiveCollisions++;
sc 3541 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsLateCollisions++;
sc 3543 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsCarrierSenseErrors++;
sc 3545 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsInternalMacTransmitErrors++;
sc 3547 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsInternalTransmitUnderflows++;
sc 3549 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsInternalTransmitBabbles++;
sc 3554 dev/pci/if_de.c sc->tulip_if.if_collisions += collisions;
sc 3556 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsSingleCollisionFrames++;
sc 3558 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsMultipleCollisionFrames++;
sc 3560 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsDeferredTransmissions++;
sc 3567 dev/pci/if_de.c if (d_status & TULIP_DSTS_TxNOHRTBT & sc->tulip_flags)
sc 3568 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsSQETestErrors++;
sc 3577 dev/pci/if_de.c if ((sc->tulip_flags & TULIP_TXPROBE_ACTIVE) == 0)
sc 3578 dev/pci/if_de.c sc->tulip_if.if_flags &= ~IFF_OACTIVE;
sc 3584 dev/pci/if_de.c if (ri->ri_free == ri->ri_max || (sc->tulip_flags & TULIP_TXPROBE_ACTIVE))
sc 3585 dev/pci/if_de.c sc->tulip_txtimer = 0;
sc 3587 dev/pci/if_de.c sc->tulip_txtimer = TULIP_TXTIMER;
sc 3588 dev/pci/if_de.c sc->tulip_if.if_opackets += xmits;
sc 3594 dev/pci/if_de.c tulip_print_abnormal_interrupt(tulip_softc_t * const sc, u_int32_t csr)
sc 3607 dev/pci/if_de.c if (mask == TULIP_STS_TXUNDERFLOW && (sc->tulip_flags & TULIP_NEWTXTHRESH)) {
sc 3608 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_NEWTXTHRESH;
sc 3609 dev/pci/if_de.c if (sc->tulip_cmdmode & TULIP_CMD_STOREFWD)
sc 3613 dev/pci/if_de.c &thrsh[9 * ((sc->tulip_cmdmode & TULIP_CMD_THRESHOLDCTL) >> 14)]);
sc 3624 dev/pci/if_de.c tulip_intr_handler(tulip_softc_t * const sc, int *progress_p)
sc 3629 dev/pci/if_de.c while ((csr = TULIP_CSR_READ(sc, csr_status)) & sc->tulip_intrmask) {
sc 3631 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_status, csr);
sc 3634 dev/pci/if_de.c sc->tulip_last_system_error = (csr & TULIP_STS_ERRORMASK) >> TULIP_STS_ERR_SHIFT;
sc 3635 dev/pci/if_de.c if (sc->tulip_flags & TULIP_NOMESSAGES)
sc 3636 dev/pci/if_de.c sc->tulip_flags |= TULIP_SYSTEMERROR;
sc 3641 dev/pci/if_de.c tulip_system_errors[sc->tulip_last_system_error]);
sc 3644 dev/pci/if_de.c sc->tulip_flags |= TULIP_NEEDRESET;
sc 3645 dev/pci/if_de.c sc->tulip_system_errors++;
sc 3648 dev/pci/if_de.c if (csr & (TULIP_STS_LINKPASS|TULIP_STS_LINKFAIL) & sc->tulip_intrmask) {
sc 3650 dev/pci/if_de.c sc->tulip_dbg.dbg_link_intrs++;
sc 3652 dev/pci/if_de.c if (sc->tulip_boardsw->bd_media_poll != NULL) {
sc 3653 dev/pci/if_de.c (*sc->tulip_boardsw->bd_media_poll)(sc, csr & TULIP_STS_LINKFAIL
sc 3658 dev/pci/if_de.c tulip_media_print(sc);
sc 3661 dev/pci/if_de.c u_int32_t misses = TULIP_CSR_READ(sc, csr_missed_frames);
sc 3663 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsMissedFrames += misses & 0xFFFF;
sc 3668 dev/pci/if_de.c if ((misses & 0x0FFE0000) && (sc->tulip_features & TULIP_HAVE_RXBADOVRFLW)) {
sc 3669 dev/pci/if_de.c sc->tulip_dot3stats.dot3StatsInternalMacReceiveErrors++;
sc 3674 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode & ~TULIP_CMD_RXRUN);
sc 3675 dev/pci/if_de.c while ((TULIP_CSR_READ(sc, csr_status) & TULIP_STS_RXSTOPPED) == 0)
sc 3677 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_status, TULIP_STS_RXSTOPPED);
sc 3678 dev/pci/if_de.c sc->tulip_flags |= TULIP_RXIGNORE;
sc 3680 dev/pci/if_de.c tulip_rx_intr(sc);
sc 3681 dev/pci/if_de.c if (sc->tulip_flags & TULIP_RXIGNORE) {
sc 3685 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_RXIGNORE;
sc 3686 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode);
sc 3690 dev/pci/if_de.c u_int32_t tmp = csr & sc->tulip_intrmask
sc 3696 dev/pci/if_de.c if ((sc->tulip_cmdmode & TULIP_CMD_THRESHOLDCTL) != TULIP_CMD_THRSHLD160) {
sc 3697 dev/pci/if_de.c sc->tulip_cmdmode += TULIP_CMD_THRSHLD96;
sc 3698 dev/pci/if_de.c sc->tulip_flags |= TULIP_NEWTXTHRESH;
sc 3699 dev/pci/if_de.c } else if (sc->tulip_features & TULIP_HAVE_STOREFWD) {
sc 3700 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_STOREFWD;
sc 3701 dev/pci/if_de.c sc->tulip_flags |= TULIP_NEWTXTHRESH;
sc 3704 dev/pci/if_de.c if (sc->tulip_flags & TULIP_NOMESSAGES)
sc 3705 dev/pci/if_de.c sc->tulip_statusbits |= tmp;
sc 3707 dev/pci/if_de.c tulip_print_abnormal_interrupt(sc, tmp);
sc 3708 dev/pci/if_de.c sc->tulip_flags |= TULIP_NOMESSAGES;
sc 3710 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_command, sc->tulip_cmdmode);
sc 3712 dev/pci/if_de.c if (sc->tulip_flags & (TULIP_WANTTXSTART|TULIP_TXPROBE_ACTIVE|TULIP_DOINGSETUP|TULIP_PROMISC)) {
sc 3713 dev/pci/if_de.c tulip_tx_intr(sc);
sc 3714 dev/pci/if_de.c if ((sc->tulip_flags & TULIP_TXPROBE_ACTIVE) == 0)
sc 3715 dev/pci/if_de.c tulip_ifstart(&sc->tulip_if);
sc 3718 dev/pci/if_de.c if (sc->tulip_flags & TULIP_NEEDRESET) {
sc 3719 dev/pci/if_de.c tulip_reset(sc);
sc 3720 dev/pci/if_de.c tulip_init(sc);
sc 3728 dev/pci/if_de.c tulip_softc_t * sc = arg;
sc 3731 dev/pci/if_de.c for (; sc != NULL; sc = sc->tulip_slaves) {
sc 3733 dev/pci/if_de.c sc->tulip_dbg.dbg_intrs++;
sc 3735 dev/pci/if_de.c tulip_intr_handler(sc, &progress);
sc 3743 dev/pci/if_de.c tulip_softc_t * sc = (tulip_softc_t *) arg;
sc 3747 dev/pci/if_de.c sc->tulip_dbg.dbg_intrs++;
sc 3749 dev/pci/if_de.c tulip_intr_handler(sc, &progress);
sc 3809 dev/pci/if_de.c tulip_txput(tulip_softc_t * const sc, struct mbuf *m)
sc 3812 dev/pci/if_de.c tulip_ringinfo_t * const ri = &sc->tulip_txinfo;
sc 3818 dev/pci/if_de.c struct ifnet *ifp = &sc->tulip_if;
sc 3823 dev/pci/if_de.c if ((sc->tulip_cmdmode & TULIP_CMD_TXRUN) == 0) {
sc 3826 dev/pci/if_de.c (sc->tulip_flags & TULIP_TXPROBE_ACTIVE) ? "(probe)" : "");
sc 3827 dev/pci/if_de.c sc->tulip_flags |= TULIP_WANTTXSTART;
sc 3828 dev/pci/if_de.c sc->tulip_dbg.dbg_txput_finishes[0]++;
sc 3858 dev/pci/if_de.c if (sc->tulip_txmaps_free == 0) {
sc 3860 dev/pci/if_de.c sc->tulip_dbg.dbg_no_txmaps++;
sc 3862 dev/pci/if_de.c freedescs += tulip_tx_intr(sc);
sc 3864 dev/pci/if_de.c if (sc->tulip_txmaps_free > 0)
sc 3865 dev/pci/if_de.c map = sc->tulip_txmaps[sc->tulip_txmaps_free-1];
sc 3867 dev/pci/if_de.c sc->tulip_flags |= TULIP_WANTTXSTART;
sc 3869 dev/pci/if_de.c sc->tulip_dbg.dbg_txput_finishes[1]++;
sc 3873 dev/pci/if_de.c error = bus_dmamap_load_mbuf(sc->tulip_dmatag, map, m, BUS_DMA_NOWAIT);
sc 3904 dev/pci/if_de.c sc->tulip_dbg.dbg_txput_finishes[2]++;
sc 3908 dev/pci/if_de.c error = bus_dmamap_load_mbuf(sc->tulip_dmatag, map, m, BUS_DMA_NOWAIT);
sc 3914 dev/pci/if_de.c sc->tulip_dbg.dbg_txput_finishes[3]++;
sc 3923 dev/pci/if_de.c && (freedescs += tulip_tx_intr(sc)) <= 0) {
sc 3930 dev/pci/if_de.c sc->tulip_flags |= TULIP_WANTTXSTART;
sc 3932 dev/pci/if_de.c sc->tulip_dbg.dbg_txput_finishes[4]++;
sc 3934 dev/pci/if_de.c bus_dmamap_unload(sc->tulip_dmatag, map);
sc 3960 dev/pci/if_de.c TULIP_TXMAP_PRESYNC(sc, map);
sc 3963 dev/pci/if_de.c --sc->tulip_txmaps_free; /* commit to using the dmamap */
sc 3969 dev/pci/if_de.c if (!compressed && (sc->tulip_flags & TULIP_TXPROBE_ACTIVE) == 0) {
sc 3977 dev/pci/if_de.c IF_ENQUEUE(&sc->tulip_txq, m);
sc 3986 dev/pci/if_de.c TULIP_TXDESC_PRESYNC(sc, nextout, sizeof(u_int32_t));
sc 4001 dev/pci/if_de.c TULIP_TXDESC_PRESYNC(sc, ri->ri_nextout,
sc 4003 dev/pci/if_de.c TULIP_TXDESC_PRESYNC(sc, ri->ri_first,
sc 4006 dev/pci/if_de.c TULIP_TXDESC_PRESYNC(sc, ri->ri_nextout,
sc 4010 dev/pci/if_de.c TULIP_TXDESC_PRESYNC(sc, ri->ri_nextout, sizeof(u_int32_t));
sc 4020 dev/pci/if_de.c if (sc->tulip_flags & TULIP_TXPROBE_ACTIVE) {
sc 4021 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_txpoll, 1);
sc 4022 dev/pci/if_de.c sc->tulip_if.if_flags |= IFF_OACTIVE;
sc 4023 dev/pci/if_de.c sc->tulip_if.if_start = tulip_ifstart;
sc 4031 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_WANTTXSTART;
sc 4032 dev/pci/if_de.c if (sc->tulip_txtimer == 0)
sc 4033 dev/pci/if_de.c sc->tulip_txtimer = TULIP_TXTIMER;
sc 4035 dev/pci/if_de.c sc->tulip_dbg.dbg_txput_finishes[5]++;
sc 4049 dev/pci/if_de.c sc->tulip_dbg.dbg_txput_finishes[6]++;
sc 4051 dev/pci/if_de.c if (sc->tulip_flags & (TULIP_WANTTXSTART|TULIP_DOINGSETUP)) {
sc 4052 dev/pci/if_de.c sc->tulip_if.if_flags |= IFF_OACTIVE;
sc 4053 dev/pci/if_de.c sc->tulip_if.if_start = tulip_ifstart;
sc 4054 dev/pci/if_de.c if ((sc->tulip_intrmask & TULIP_STS_TXINTR) == 0) {
sc 4055 dev/pci/if_de.c sc->tulip_intrmask |= TULIP_STS_TXINTR;
sc 4056 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask);
sc 4058 dev/pci/if_de.c } else if ((sc->tulip_flags & TULIP_PROMISC) == 0) {
sc 4059 dev/pci/if_de.c if (sc->tulip_intrmask & TULIP_STS_TXINTR) {
sc 4060 dev/pci/if_de.c sc->tulip_intrmask &= ~TULIP_STS_TXINTR;
sc 4061 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask);
sc 4064 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_txpoll, 1);
sc 4070 dev/pci/if_de.c tulip_txput_setup(tulip_softc_t * const sc)
sc 4072 dev/pci/if_de.c tulip_ringinfo_t * const ri = &sc->tulip_txinfo;
sc 4080 dev/pci/if_de.c if ((sc->tulip_cmdmode & TULIP_CMD_TXRUN) == 0) {
sc 4083 dev/pci/if_de.c sc->tulip_flags |= TULIP_WANTTXSTART;
sc 4084 dev/pci/if_de.c sc->tulip_if.if_start = tulip_ifstart;
sc 4092 dev/pci/if_de.c tulip_tx_intr(sc);
sc 4093 dev/pci/if_de.c if ((sc->tulip_flags & TULIP_DOINGSETUP) || ri->ri_free == 1) {
sc 4094 dev/pci/if_de.c sc->tulip_flags |= TULIP_WANTTXSTART;
sc 4095 dev/pci/if_de.c sc->tulip_if.if_start = tulip_ifstart;
sc 4098 dev/pci/if_de.c bcopy(sc->tulip_setupdata, sc->tulip_setupbuf,
sc 4099 dev/pci/if_de.c sizeof(sc->tulip_setupbuf));
sc 4104 dev/pci/if_de.c sc->tulip_flags ^= TULIP_WANTSETUP|TULIP_DOINGSETUP;
sc 4110 dev/pci/if_de.c if (sc->tulip_flags & TULIP_WANTHASHPERFECT)
sc 4112 dev/pci/if_de.c else if (sc->tulip_flags & TULIP_WANTHASHONLY)
sc 4117 dev/pci/if_de.c nextout->d_length1 = sc->tulip_setupmap->dm_segs[0].ds_len;
sc 4118 dev/pci/if_de.c nextout->d_addr1 = sc->tulip_setupmap->dm_segs[0].ds_addr;
sc 4119 dev/pci/if_de.c if (sc->tulip_setupmap->dm_nsegs == 2) {
sc 4120 dev/pci/if_de.c nextout->d_length2 = sc->tulip_setupmap->dm_segs[1].ds_len;
sc 4121 dev/pci/if_de.c nextout->d_addr2 = sc->tulip_setupmap->dm_segs[1].ds_addr;
sc 4123 dev/pci/if_de.c TULIP_TXMAP_PRESYNC(sc, sc->tulip_setupmap);
sc 4124 dev/pci/if_de.c TULIP_TXDESC_PRESYNC(sc, nextout, sizeof(*nextout));
sc 4138 dev/pci/if_de.c TULIP_TXDESC_PRESYNC(sc, ri->ri_nextout, sizeof(u_int32_t));
sc 4143 dev/pci/if_de.c TULIP_TXDESC_PRESYNC(sc, nextout, sizeof(u_int32_t));
sc 4144 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_txpoll, 1);
sc 4145 dev/pci/if_de.c if ((sc->tulip_intrmask & TULIP_STS_TXINTR) == 0) {
sc 4146 dev/pci/if_de.c sc->tulip_intrmask |= TULIP_STS_TXINTR;
sc 4147 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_intr, sc->tulip_intrmask);
sc 4158 dev/pci/if_de.c tulip_softc_t * const sc = TULIP_IFP_TO_SOFTC(ifp);
sc 4166 dev/pci/if_de.c if ((error = ether_ioctl(ifp, &sc->tulip_ac, cmd, data)) > 0) {
sc 4174 dev/pci/if_de.c tulip_init(sc);
sc 4178 dev/pci/if_de.c arp_ifinit(&sc->tulip_ac, ifa);
sc 4191 dev/pci/if_de.c tulip_init(sc);
sc 4197 dev/pci/if_de.c error = ifmedia_ioctl(ifp, ifr, &sc->tulip_ifmedia, cmd);
sc 4207 dev/pci/if_de.c error = ether_addmulti(ifr, &sc->tulip_ac);
sc 4209 dev/pci/if_de.c error = ether_delmulti(ifr, &sc->tulip_ac);
sc 4213 dev/pci/if_de.c tulip_addr_filter(sc); /* reset multicast filtering */
sc 4214 dev/pci/if_de.c tulip_init(sc);
sc 4255 dev/pci/if_de.c tulip_softc_t * const sc = TULIP_IFP_TO_SOFTC(ifp);
sc 4257 dev/pci/if_de.c if (sc->tulip_if.if_flags & IFF_RUNNING) {
sc 4259 dev/pci/if_de.c if ((sc->tulip_flags & (TULIP_WANTSETUP|TULIP_TXPROBE_ACTIVE)) == TULIP_WANTSETUP)
sc 4260 dev/pci/if_de.c tulip_txput_setup(sc);
sc 4262 dev/pci/if_de.c while (!IFQ_IS_EMPTY(&sc->tulip_if.if_snd)) {
sc 4264 dev/pci/if_de.c IFQ_POLL(&sc->tulip_if.if_snd, m);
sc 4267 dev/pci/if_de.c if ((m0 = tulip_txput(sc, m)) != NULL) {
sc 4277 dev/pci/if_de.c if (IFQ_IS_EMPTY(&sc->tulip_if.if_snd))
sc 4279 dev/pci/if_de.c sc->tulip_if.if_start = tulip_ifstart_one;
sc 4289 dev/pci/if_de.c tulip_softc_t * const sc = TULIP_IFP_TO_SOFTC(ifp);
sc 4291 dev/pci/if_de.c if ((sc->tulip_if.if_flags & IFF_RUNNING)
sc 4292 dev/pci/if_de.c && !IFQ_IS_EMPTY(&sc->tulip_if.if_snd)) {
sc 4294 dev/pci/if_de.c IFQ_POLL(&sc->tulip_if.if_snd, m);
sc 4295 dev/pci/if_de.c if (m != NULL && (m0 = tulip_txput(sc, m)) != NULL)
sc 4307 dev/pci/if_de.c tulip_softc_t * const sc = TULIP_IFP_TO_SOFTC(ifp);
sc 4310 dev/pci/if_de.c u_int32_t rxintrs = sc->tulip_dbg.dbg_rxintrs - sc->tulip_dbg.dbg_last_rxintrs;
sc 4311 dev/pci/if_de.c if (rxintrs > sc->tulip_dbg.dbg_high_rxintrs_hz)
sc 4312 dev/pci/if_de.c sc->tulip_dbg.dbg_high_rxintrs_hz = rxintrs;
sc 4313 dev/pci/if_de.c sc->tulip_dbg.dbg_last_rxintrs = sc->tulip_dbg.dbg_rxintrs;
sc 4316 dev/pci/if_de.c sc->tulip_if.if_timer = 1;
sc 4321 dev/pci/if_de.c if (sc->tulip_flags & (TULIP_SYSTEMERROR|TULIP_RXBUFSLOW|TULIP_NOMESSAGES)) {
sc 4325 dev/pci/if_de.c if (sc->tulip_flags & TULIP_RXBUFSLOW)
sc 4326 dev/pci/if_de.c tulip_rx_intr(sc);
sc 4329 dev/pci/if_de.c if (sc->tulip_flags & TULIP_SYSTEMERROR) {
sc 4331 dev/pci/if_de.c TULIP_PRINTF_ARGS, sc->tulip_system_errors,
sc 4332 dev/pci/if_de.c tulip_system_errors[sc->tulip_last_system_error]);
sc 4335 dev/pci/if_de.c if (sc->tulip_statusbits) {
sc 4336 dev/pci/if_de.c tulip_print_abnormal_interrupt(sc, sc->tulip_statusbits);
sc 4337 dev/pci/if_de.c sc->tulip_statusbits = 0;
sc 4340 dev/pci/if_de.c sc->tulip_flags &= ~(TULIP_NOMESSAGES|TULIP_SYSTEMERROR);
sc 4343 dev/pci/if_de.c if (sc->tulip_txtimer)
sc 4344 dev/pci/if_de.c tulip_tx_intr(sc);
sc 4345 dev/pci/if_de.c if (sc->tulip_txtimer && --sc->tulip_txtimer == 0) {
sc 4347 dev/pci/if_de.c if (TULIP_DO_AUTOSENSE(sc)) {
sc 4348 dev/pci/if_de.c sc->tulip_media = TULIP_MEDIA_UNKNOWN;
sc 4349 dev/pci/if_de.c sc->tulip_probe_state = TULIP_PROBE_INACTIVE;
sc 4350 dev/pci/if_de.c sc->tulip_flags &= ~(TULIP_WANTRXACT|TULIP_LINKUP);
sc 4352 dev/pci/if_de.c tulip_reset(sc);
sc 4353 dev/pci/if_de.c tulip_init(sc);
sc 4357 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_intr_cycles);
sc 4358 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_ifstart_cycles);
sc 4359 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_ifioctl_cycles);
sc 4360 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_ifwatchdog_cycles);
sc 4361 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_timeout_cycles);
sc 4362 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_ifstart_one_cycles);
sc 4363 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_txput_cycles);
sc 4364 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_txintr_cycles);
sc 4365 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_rxintr_cycles);
sc 4366 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_rxget_cycles);
sc 4367 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_intr);
sc 4368 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_ifstart);
sc 4369 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_ifioctl);
sc 4370 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_ifwatchdog);
sc 4371 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_timeout);
sc 4372 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_ifstart_one);
sc 4373 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_txput);
sc 4374 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_txintr);
sc 4375 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_rxintr);
sc 4376 dev/pci/if_de.c TULIP_PERFMERGE(sc, perf_rxget);
sc 4387 dev/pci/if_de.c tulip_busdma_allocmem(tulip_softc_t * const sc, size_t size,
sc 4392 dev/pci/if_de.c error = bus_dmamem_alloc(sc->tulip_dmatag, size, 1, PAGE_SIZE,
sc 4397 dev/pci/if_de.c error = bus_dmamem_map(sc->tulip_dmatag, segs, nsegs, size,
sc 4401 dev/pci/if_de.c error = bus_dmamap_create(sc->tulip_dmatag, size, 1, size, 0,
sc 4404 dev/pci/if_de.c error = bus_dmamap_load(sc->tulip_dmatag, map, desc,
sc 4407 dev/pci/if_de.c bus_dmamap_destroy(sc->tulip_dmatag, map);
sc 4412 dev/pci/if_de.c bus_dmamem_unmap(sc->tulip_dmatag, desc, size);
sc 4415 dev/pci/if_de.c bus_dmamem_free(sc->tulip_dmatag, segs, nsegs);
sc 4423 dev/pci/if_de.c tulip_busdma_init(tulip_softc_t * const sc)
sc 4430 dev/pci/if_de.c error = bus_dmamap_create(sc->tulip_dmatag, sizeof(sc->tulip_setupbuf), 2,
sc 4431 dev/pci/if_de.c sizeof(sc->tulip_setupbuf), 0, BUS_DMA_NOWAIT,
sc 4432 dev/pci/if_de.c &sc->tulip_setupmap);
sc 4434 dev/pci/if_de.c error = bus_dmamap_load(sc->tulip_dmatag, sc->tulip_setupmap,
sc 4435 dev/pci/if_de.c sc->tulip_setupbuf, sizeof(sc->tulip_setupbuf),
sc 4438 dev/pci/if_de.c bus_dmamap_destroy(sc->tulip_dmatag, sc->tulip_setupmap);
sc 4444 dev/pci/if_de.c error = tulip_busdma_allocmem(sc, sizeof(tulip_desc_t) * TULIP_TXDESCS,
sc 4445 dev/pci/if_de.c &sc->tulip_txdescmap,
sc 4446 dev/pci/if_de.c &sc->tulip_txdescs);
sc 4453 dev/pci/if_de.c while (error == 0 && sc->tulip_txmaps_free < TULIP_TXDESCS) {
sc 4455 dev/pci/if_de.c if ((error = TULIP_TXMAP_CREATE(sc, &map)) == 0)
sc 4456 dev/pci/if_de.c sc->tulip_txmaps[sc->tulip_txmaps_free++] = map;
sc 4459 dev/pci/if_de.c while (sc->tulip_txmaps_free > 0)
sc 4460 dev/pci/if_de.c bus_dmamap_destroy(sc->tulip_dmatag,
sc 4461 dev/pci/if_de.c sc->tulip_txmaps[--sc->tulip_txmaps_free]);
sc 4469 dev/pci/if_de.c error = tulip_busdma_allocmem(sc, sizeof(tulip_desc_t) * TULIP_RXDESCS,
sc 4470 dev/pci/if_de.c &sc->tulip_rxdescmap,
sc 4471 dev/pci/if_de.c &sc->tulip_rxdescs);
sc 4478 dev/pci/if_de.c while (error == 0 && sc->tulip_rxmaps_free < TULIP_RXDESCS) {
sc 4480 dev/pci/if_de.c if ((error = TULIP_RXMAP_CREATE(sc, &map)) == 0)
sc 4481 dev/pci/if_de.c sc->tulip_rxmaps[sc->tulip_rxmaps_free++] = map;
sc 4484 dev/pci/if_de.c while (sc->tulip_rxmaps_free > 0)
sc 4485 dev/pci/if_de.c bus_dmamap_destroy(sc->tulip_dmatag,
sc 4486 dev/pci/if_de.c sc->tulip_rxmaps[--sc->tulip_rxmaps_free]);
sc 4493 dev/pci/if_de.c tulip_initcsrs(tulip_softc_t * const sc, bus_addr_t csr_base, size_t csr_size)
sc 4495 dev/pci/if_de.c sc->tulip_csrs.csr_busmode = csr_base + 0 * csr_size;
sc 4496 dev/pci/if_de.c sc->tulip_csrs.csr_txpoll = csr_base + 1 * csr_size;
sc 4497 dev/pci/if_de.c sc->tulip_csrs.csr_rxpoll = csr_base + 2 * csr_size;
sc 4498 dev/pci/if_de.c sc->tulip_csrs.csr_rxlist = csr_base + 3 * csr_size;
sc 4499 dev/pci/if_de.c sc->tulip_csrs.csr_txlist = csr_base + 4 * csr_size;
sc 4500 dev/pci/if_de.c sc->tulip_csrs.csr_status = csr_base + 5 * csr_size;
sc 4501 dev/pci/if_de.c sc->tulip_csrs.csr_command = csr_base + 6 * csr_size;
sc 4502 dev/pci/if_de.c sc->tulip_csrs.csr_intr = csr_base + 7 * csr_size;
sc 4503 dev/pci/if_de.c sc->tulip_csrs.csr_missed_frames = csr_base + 8 * csr_size;
sc 4504 dev/pci/if_de.c sc->tulip_csrs.csr_9 = csr_base + 9 * csr_size;
sc 4505 dev/pci/if_de.c sc->tulip_csrs.csr_10 = csr_base + 10 * csr_size;
sc 4506 dev/pci/if_de.c sc->tulip_csrs.csr_11 = csr_base + 11 * csr_size;
sc 4507 dev/pci/if_de.c sc->tulip_csrs.csr_12 = csr_base + 12 * csr_size;
sc 4508 dev/pci/if_de.c sc->tulip_csrs.csr_13 = csr_base + 13 * csr_size;
sc 4509 dev/pci/if_de.c sc->tulip_csrs.csr_14 = csr_base + 14 * csr_size;
sc 4510 dev/pci/if_de.c sc->tulip_csrs.csr_15 = csr_base + 15 * csr_size;
sc 4514 dev/pci/if_de.c tulip_initring(tulip_softc_t * const sc, tulip_ringinfo_t * const ri,
sc 4543 dev/pci/if_de.c tulip_softc_t * const sc = arg;
sc 4544 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
sc 4553 dev/pci/if_de.c tulip_softc_t * const sc = (tulip_softc_t *) self;
sc 4555 dev/pci/if_de.c struct ifnet * const ifp = &sc->tulip_if;
sc 4556 dev/pci/if_de.c const int unit = sc->tulip_dev.dv_unit;
sc 4598 dev/pci/if_de.c PCI_GETBUSDEVINFO(sc);
sc 4599 dev/pci/if_de.c sc->tulip_chipid = chipid;
sc 4600 dev/pci/if_de.c sc->tulip_flags |= TULIP_DEVICEPROBE;
sc 4602 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_GPR|TULIP_HAVE_STOREFWD;
sc 4604 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_RXBADOVRFLW;
sc 4606 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_BROKEN_HASH;
sc 4608 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_POWERMGMT;
sc 4610 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_DUALSENSE;
sc 4612 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_SIANWAY;
sc 4614 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_SIAGP|TULIP_HAVE_RXBADOVRFLW|TULIP_HAVE_STOREFWD;
sc 4616 dev/pci/if_de.c sc->tulip_features |= TULIP_HAVE_SIA100;
sc 4619 dev/pci/if_de.c if (sc->tulip_features & TULIP_HAVE_POWERMGMT
sc 4626 dev/pci/if_de.c if (sc->tulip_features & TULIP_HAVE_STOREFWD)
sc 4627 dev/pci/if_de.c sc->tulip_cmdmode |= TULIP_CMD_STOREFWD;
sc 4629 dev/pci/if_de.c bcopy(self->dv_xname, sc->tulip_if.if_xname, IFNAMSIZ);
sc 4630 dev/pci/if_de.c sc->tulip_if.if_softc = sc;
sc 4631 dev/pci/if_de.c sc->tulip_pc = pa->pa_pc;
sc 4632 dev/pci/if_de.c sc->tulip_dmatag = pa->pa_dmat;
sc 4633 dev/pci/if_de.c sc->tulip_revinfo = revinfo;
sc 4635 dev/pci/if_de.c timeout_set(&sc->tulip_stmo, tulip_timeout_callback, sc);
sc 4650 dev/pci/if_de.c sc->tulip_bustag = memt;
sc 4651 dev/pci/if_de.c sc->tulip_bushandle = memh;
sc 4653 dev/pci/if_de.c sc->tulip_bustag = iot;
sc 4654 dev/pci/if_de.c sc->tulip_bushandle = ioh;
sc 4661 dev/pci/if_de.c tulip_initcsrs(sc, csr_base + csroffset, csrsize);
sc 4663 dev/pci/if_de.c if ((retval = tulip_busdma_init(sc)) != 0) {
sc 4668 dev/pci/if_de.c tulip_initring(sc, &sc->tulip_rxinfo, sc->tulip_rxdescs, TULIP_RXDESCS);
sc 4669 dev/pci/if_de.c tulip_initring(sc, &sc->tulip_txinfo, sc->tulip_txdescs, TULIP_TXDESCS);
sc 4674 dev/pci/if_de.c TULIP_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
sc 4679 dev/pci/if_de.c if ((retval = tulip_read_macaddr(sc)) < 0) {
sc 4680 dev/pci/if_de.c printf(", %s%s pass %d.%d", sc->tulip_boardid,
sc 4681 dev/pci/if_de.c tulip_chipdescs[sc->tulip_chipid],
sc 4682 dev/pci/if_de.c (sc->tulip_revinfo & 0xF0) >> 4, sc->tulip_revinfo & 0x0F);
sc 4685 dev/pci/if_de.c printf("%02x", sc->tulip_rombuf[idx]);
sc 4690 dev/pci/if_de.c if (sc->tulip_features & TULIP_HAVE_SHAREDINTR)
sc 4693 dev/pci/if_de.c if ((sc->tulip_features & TULIP_HAVE_SLAVEDINTR) == 0) {
sc 4703 dev/pci/if_de.c sc->tulip_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_NET,
sc 4704 dev/pci/if_de.c intr_rtn, sc, self->dv_xname);
sc 4705 dev/pci/if_de.c if (sc->tulip_ih == NULL) {
sc 4714 dev/pci/if_de.c sc->tulip_boardid,
sc 4715 dev/pci/if_de.c tulip_chipdescs[sc->tulip_chipid],
sc 4716 dev/pci/if_de.c (sc->tulip_revinfo & 0xF0) >> 4,
sc 4717 dev/pci/if_de.c sc->tulip_revinfo & 0x0F,
sc 4718 dev/pci/if_de.c (sc->tulip_features & (TULIP_HAVE_ISVSROM|TULIP_HAVE_OKSROM))
sc 4720 dev/pci/if_de.c intrstr, ether_sprintf(sc->tulip_enaddr));
sc 4723 dev/pci/if_de.c sc->tulip_ats = shutdownhook_establish(tulip_shutdown, sc);
sc 4724 dev/pci/if_de.c if (sc->tulip_ats == NULL)
sc 4726 dev/pci/if_de.c sc->tulip_xname);
sc 4734 dev/pci/if_de.c (*sc->tulip_boardsw->bd_media_probe)(sc);
sc 4735 dev/pci/if_de.c ifmedia_init(&sc->tulip_ifmedia, 0,
sc 4737 dev/pci/if_de.c sc->tulip_flags &= ~TULIP_DEVICEPROBE;
sc 4738 dev/pci/if_de.c tulip_ifmedia_add(sc);
sc 4740 dev/pci/if_de.c tulip_reset(sc);
sc 30 dev/pci/if_devar.h #define TULIP_CSR_READ(sc, csr) \
sc 31 dev/pci/if_devar.h bus_space_read_4((sc)->tulip_bustag, (sc)->tulip_bushandle, (sc)->tulip_csrs.csr)
sc 32 dev/pci/if_devar.h #define TULIP_CSR_WRITE(sc, csr, val) \
sc 33 dev/pci/if_devar.h bus_space_write_4((sc)->tulip_bustag, (sc)->tulip_bushandle, (sc)->tulip_csrs.csr, (val))
sc 35 dev/pci/if_devar.h #define TULIP_CSR_READBYTE(sc, csr) \
sc 36 dev/pci/if_devar.h bus_space_read_1((sc)->tulip_bustag, (sc)->tulip_bushandle, (sc)->tulip_csrs.csr)
sc 37 dev/pci/if_devar.h #define TULIP_CSR_WRITEBYTE(sc, csr, val) \
sc 38 dev/pci/if_devar.h bus_space_write_1((sc)->tulip_bustag, (sc)->tulip_bushandle, (sc)->tulip_csrs.csr, (val))
sc 272 dev/pci/if_devar.h #define TULIP_MEDIAINFO_SIA_INIT(sc, mi, chipid, media) do { \
sc 274 dev/pci/if_devar.h sc->tulip_mediums[TULIP_MEDIA_ ## media] = (mi); \
sc 280 dev/pci/if_devar.h #define TULIP_MEDIAINFO_ADD_CAPABILITY(sc, mi, media) do { \
sc 281 dev/pci/if_devar.h if ((sc)->tulip_mediums[TULIP_MEDIA_ ## media] == NULL \
sc 283 dev/pci/if_devar.h (sc)->tulip_mediums[TULIP_MEDIA_ ## media] = (mi); \
sc 339 dev/pci/if_devar.h void (*bd_media_probe)(tulip_softc_t * const sc);
sc 340 dev/pci/if_devar.h void (*bd_media_select)(tulip_softc_t * const sc);
sc 341 dev/pci/if_devar.h void (*bd_media_poll)(tulip_softc_t * const sc, tulip_mediapoll_event_t event);
sc 342 dev/pci/if_devar.h void (*bd_media_preset)(tulip_softc_t * const sc);
sc 615 dev/pci/if_devar.h #define TULIP_DO_AUTOSENSE(sc) (IFM_SUBTYPE((sc)->tulip_ifmedia.ifm_media) == IFM_AUTO)
sc 756 dev/pci/if_devar.h #define TULIP_RXDESC_PRESYNC(sc, di, s) \
sc 757 dev/pci/if_devar.h bus_dmamap_sync((sc)->tulip_dmatag, (sc)->tulip_rxdescmap, \
sc 758 dev/pci/if_devar.h (caddr_t) di - (caddr_t) (sc)->tulip_rxdescs, \
sc 760 dev/pci/if_devar.h #define TULIP_RXDESC_POSTSYNC(sc, di, s) \
sc 761 dev/pci/if_devar.h bus_dmamap_sync((sc)->tulip_dmatag, (sc)->tulip_rxdescmap, \
sc 762 dev/pci/if_devar.h (caddr_t) di - (caddr_t) (sc)->tulip_rxdescs, \
sc 764 dev/pci/if_devar.h #define TULIP_RXMAP_PRESYNC(sc, map) \
sc 765 dev/pci/if_devar.h bus_dmamap_sync((sc)->tulip_dmatag, (map), 0, (map)->dm_mapsize, \
sc 767 dev/pci/if_devar.h #define TULIP_RXMAP_POSTSYNC(sc, map) \
sc 768 dev/pci/if_devar.h bus_dmamap_sync((sc)->tulip_dmatag, (map), 0, (map)->dm_mapsize, \
sc 770 dev/pci/if_devar.h #define TULIP_RXMAP_CREATE(sc, mapp) \
sc 771 dev/pci/if_devar.h bus_dmamap_create((sc)->tulip_dmatag, TULIP_RX_BUFLEN, 2, \
sc 775 dev/pci/if_devar.h #define TULIP_TXDESC_PRESYNC(sc, di, s) \
sc 776 dev/pci/if_devar.h bus_dmamap_sync((sc)->tulip_dmatag, (sc)->tulip_txdescmap, \
sc 777 dev/pci/if_devar.h (caddr_t) di - (caddr_t) (sc)->tulip_txdescs, \
sc 779 dev/pci/if_devar.h #define TULIP_TXDESC_POSTSYNC(sc, di, s) \
sc 780 dev/pci/if_devar.h bus_dmamap_sync((sc)->tulip_dmatag, (sc)->tulip_txdescmap, \
sc 781 dev/pci/if_devar.h (caddr_t) di - (caddr_t) (sc)->tulip_txdescs, \
sc 783 dev/pci/if_devar.h #define TULIP_TXMAP_PRESYNC(sc, map) \
sc 784 dev/pci/if_devar.h bus_dmamap_sync((sc)->tulip_dmatag, (map), 0, (map)->dm_mapsize, \
sc 786 dev/pci/if_devar.h #define TULIP_TXMAP_POSTSYNC(sc, map) \
sc 787 dev/pci/if_devar.h bus_dmamap_sync((sc)->tulip_dmatag, (map), 0, (map)->dm_mapsize, \
sc 789 dev/pci/if_devar.h #define TULIP_TXMAP_CREATE(sc, mapp) \
sc 790 dev/pci/if_devar.h bus_dmamap_create((sc)->tulip_dmatag, TULIP_DATA_PER_DESC, \
sc 802 dev/pci/if_devar.h #define TULIP_PRINTF_ARGS sc->tulip_xname, sc->tulip_unit
sc 816 dev/pci/if_devar.h #define TULIP_PERFMERGE(sc, member) \
sc 817 dev/pci/if_devar.h do { (sc)->tulip_perfstats[TULIP_PERF_TOTAL].member \
sc 818 dev/pci/if_devar.h += (sc)->tulip_perfstats[TULIP_PERF_CURRENT].member; \
sc 819 dev/pci/if_devar.h (sc)->tulip_perfstats[TULIP_PERF_PREVIOUS].member \
sc 820 dev/pci/if_devar.h = (sc)->tulip_perfstats[TULIP_PERF_CURRENT].member; \
sc 821 dev/pci/if_devar.h (sc)->tulip_perfstats[TULIP_PERF_CURRENT].member = 0; } while (0)
sc 824 dev/pci/if_devar.h (sc)->tulip_curperfstats.perf_ ## name ## _cycles += TULIP_PERFDIFF(perfstart_ ## name, TULIP_PERFREAD()); \
sc 825 dev/pci/if_devar.h (sc)->tulip_curperfstats.perf_ ## name++; \
sc 227 dev/pci/if_em.c struct em_softc *sc;
sc 232 dev/pci/if_em.c sc = (struct em_softc *)self;
sc 233 dev/pci/if_em.c sc->osdep.em_pa = *pa;
sc 235 dev/pci/if_em.c timeout_set(&sc->timer_handle, em_local_timer, sc);
sc 236 dev/pci/if_em.c timeout_set(&sc->tx_fifo_timer_handle, em_82547_move_tail, sc);
sc 239 dev/pci/if_em.c em_identify_hardware(sc);
sc 242 dev/pci/if_em.c sc->num_tx_desc = EM_MIN_TXD;
sc 243 dev/pci/if_em.c sc->num_rx_desc = EM_MIN_RXD;
sc 244 dev/pci/if_em.c sc->tx_int_delay = EM_TIDV;
sc 245 dev/pci/if_em.c sc->tx_abs_int_delay = EM_TADV;
sc 246 dev/pci/if_em.c sc->rx_int_delay = EM_RDTR;
sc 247 dev/pci/if_em.c sc->rx_abs_int_delay = EM_RADV;
sc 248 dev/pci/if_em.c sc->hw.autoneg = DO_AUTO_NEG;
sc 249 dev/pci/if_em.c sc->hw.wait_autoneg_complete = WAIT_FOR_AUTO_NEG_DEFAULT;
sc 250 dev/pci/if_em.c sc->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT;
sc 251 dev/pci/if_em.c sc->hw.tbi_compatibility_en = TRUE;
sc 252 dev/pci/if_em.c sc->rx_buffer_len = EM_RXBUFFER_2048;
sc 254 dev/pci/if_em.c sc->hw.phy_init_script = 1;
sc 255 dev/pci/if_em.c sc->hw.phy_reset_disable = FALSE;
sc 258 dev/pci/if_em.c sc->hw.master_slave = em_ms_hw_default;
sc 260 dev/pci/if_em.c sc->hw.master_slave = EM_MASTER_SLAVE;
sc 267 dev/pci/if_em.c sc->hw.report_tx_early = 1;
sc 269 dev/pci/if_em.c if (em_allocate_pci_resources(sc)) {
sc 271 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 276 dev/pci/if_em.c em_init_eeprom_params(&sc->hw);
sc 282 dev/pci/if_em.c switch (sc->hw.mac_type) {
sc 291 dev/pci/if_em.c em_read_eeprom(&sc->hw, EEPROM_INIT_3GIO_3,
sc 294 dev/pci/if_em.c sc->hw.max_frame_size = ETHER_MAX_LEN;
sc 302 dev/pci/if_em.c sc->hw.max_frame_size = 9234;
sc 306 dev/pci/if_em.c sc->hw.max_frame_size = ETHER_MAX_LEN;
sc 309 dev/pci/if_em.c sc->hw.max_frame_size =
sc 313 dev/pci/if_em.c sc->hw.min_frame_size =
sc 316 dev/pci/if_em.c if (sc->hw.mac_type >= em_82544)
sc 317 dev/pci/if_em.c tsize = EM_ROUNDUP(sc->num_tx_desc * sizeof(struct em_tx_desc),
sc 320 dev/pci/if_em.c tsize = EM_ROUNDUP(sc->num_tx_desc * sizeof(struct em_tx_desc),
sc 325 dev/pci/if_em.c if (em_dma_malloc(sc, tsize, &sc->txdma, BUS_DMA_NOWAIT)) {
sc 327 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 330 dev/pci/if_em.c sc->tx_desc_base = (struct em_tx_desc *)sc->txdma.dma_vaddr;
sc 332 dev/pci/if_em.c rsize = EM_ROUNDUP(sc->num_rx_desc * sizeof(struct em_rx_desc),
sc 337 dev/pci/if_em.c if (em_dma_malloc(sc, rsize, &sc->rxdma, BUS_DMA_NOWAIT)) {
sc 339 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 342 dev/pci/if_em.c sc->rx_desc_base = (struct em_rx_desc *) sc->rxdma.dma_vaddr;
sc 345 dev/pci/if_em.c if (em_hardware_init(sc)) {
sc 347 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 352 dev/pci/if_em.c if (em_read_mac_addr(&sc->hw) < 0) {
sc 354 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 358 dev/pci/if_em.c if (!em_is_valid_ether_addr(sc->hw.mac_addr)) {
sc 359 dev/pci/if_em.c printf("%s: Invalid mac address\n", sc->sc_dv.dv_xname);
sc 363 dev/pci/if_em.c bcopy(sc->hw.mac_addr, sc->interface_data.ac_enaddr,
sc 367 dev/pci/if_em.c em_setup_interface(sc);
sc 370 dev/pci/if_em.c em_clear_hw_cntrs(&sc->hw);
sc 371 dev/pci/if_em.c em_update_stats_counters(sc);
sc 372 dev/pci/if_em.c sc->hw.get_link_status = 1;
sc 373 dev/pci/if_em.c em_update_link_status(sc);
sc 375 dev/pci/if_em.c printf(", address %s\n", ether_sprintf(sc->interface_data.ac_enaddr));
sc 378 dev/pci/if_em.c if (em_check_phy_reset_block(&sc->hw))
sc 380 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 383 dev/pci/if_em.c em_get_bus_info(&sc->hw);
sc 384 dev/pci/if_em.c if (sc->hw.bus_type == em_bus_type_pcix &&
sc 385 dev/pci/if_em.c sc->hw.mac_type == em_82544)
sc 386 dev/pci/if_em.c sc->pcix_82544 = TRUE;
sc 388 dev/pci/if_em.c sc->pcix_82544 = FALSE;
sc 390 dev/pci/if_em.c sc->sc_powerhook = powerhook_establish(em_power, sc);
sc 391 dev/pci/if_em.c sc->sc_shutdownhook = shutdownhook_establish(em_shutdown, sc);
sc 396 dev/pci/if_em.c em_dma_free(sc, &sc->rxdma);
sc 398 dev/pci/if_em.c em_dma_free(sc, &sc->txdma);
sc 401 dev/pci/if_em.c em_free_pci_resources(sc);
sc 407 dev/pci/if_em.c struct em_softc *sc = (struct em_softc *)arg;
sc 411 dev/pci/if_em.c ifp = &sc->interface_data.ac_if;
sc 413 dev/pci/if_em.c em_init(sc);
sc 426 dev/pci/if_em.c struct em_softc *sc = arg;
sc 428 dev/pci/if_em.c em_stop(sc);
sc 445 dev/pci/if_em.c struct em_softc *sc = ifp->if_softc;
sc 450 dev/pci/if_em.c if (!sc->link_active)
sc 459 dev/pci/if_em.c if (em_encap(sc, m_head)) {
sc 492 dev/pci/if_em.c struct em_softc *sc = ifp->if_softc;
sc 497 dev/pci/if_em.c if ((error = ether_ioctl(ifp, &sc->interface_data, command, data)) > 0) {
sc 508 dev/pci/if_em.c em_init(sc);
sc 512 dev/pci/if_em.c arp_ifinit(&sc->interface_data, ifa);
sc 531 dev/pci/if_em.c ((ifp->if_flags ^ sc->if_flags) &
sc 533 dev/pci/if_em.c em_set_promisc(sc);
sc 536 dev/pci/if_em.c em_init(sc);
sc 540 dev/pci/if_em.c em_stop(sc);
sc 542 dev/pci/if_em.c sc->if_flags = ifp->if_flags;
sc 548 dev/pci/if_em.c ? ether_addmulti(ifr, &sc->interface_data)
sc 549 dev/pci/if_em.c : ether_delmulti(ifr, &sc->interface_data);
sc 553 dev/pci/if_em.c em_disable_intr(sc);
sc 554 dev/pci/if_em.c em_set_multi(sc);
sc 555 dev/pci/if_em.c if (sc->hw.mac_type == em_82542_rev2_0)
sc 556 dev/pci/if_em.c em_initialize_receive_unit(sc);
sc 557 dev/pci/if_em.c em_enable_intr(sc);
sc 564 dev/pci/if_em.c if (em_check_phy_reset_block(&sc->hw)) {
sc 566 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 571 dev/pci/if_em.c error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
sc 592 dev/pci/if_em.c struct em_softc *sc = ifp->if_softc;
sc 597 dev/pci/if_em.c if (E1000_READ_REG(&sc->hw, STATUS) & E1000_STATUS_TXOFF) {
sc 602 dev/pci/if_em.c printf("%s: watchdog timeout -- resetting\n", sc->sc_dv.dv_xname);
sc 604 dev/pci/if_em.c em_init(sc);
sc 606 dev/pci/if_em.c sc->watchdog_events++;
sc 622 dev/pci/if_em.c struct em_softc *sc = arg;
sc 623 dev/pci/if_em.c struct ifnet *ifp = &sc->interface_data.ac_if;
sc 631 dev/pci/if_em.c em_stop(sc);
sc 634 dev/pci/if_em.c if (sc->hw.mac_type >= em_82544)
sc 635 dev/pci/if_em.c sc->num_tx_desc = EM_MAX_TXD;
sc 637 dev/pci/if_em.c sc->num_tx_desc = EM_MAX_TXD_82543;
sc 638 dev/pci/if_em.c sc->num_rx_desc = EM_MAX_RXD;
sc 640 dev/pci/if_em.c sc->num_tx_desc = EM_MIN_TXD;
sc 641 dev/pci/if_em.c sc->num_rx_desc = EM_MIN_RXD;
sc 643 dev/pci/if_em.c IFQ_SET_MAXLEN(&ifp->if_snd, sc->num_tx_desc - 1);
sc 656 dev/pci/if_em.c switch (sc->hw.mac_type) {
sc 659 dev/pci/if_em.c if (sc->hw.max_frame_size > EM_RXBUFFER_8192)
sc 663 dev/pci/if_em.c sc->tx_fifo_head = 0;
sc 664 dev/pci/if_em.c sc->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
sc 665 dev/pci/if_em.c sc->tx_fifo_size = (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
sc 681 dev/pci/if_em.c if (sc->hw.max_frame_size > EM_RXBUFFER_8192)
sc 687 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, PBA, pba);
sc 690 dev/pci/if_em.c bcopy(sc->interface_data.ac_enaddr, sc->hw.mac_addr,
sc 694 dev/pci/if_em.c if (em_hardware_init(sc)) {
sc 696 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 700 dev/pci/if_em.c em_update_link_status(sc);
sc 703 dev/pci/if_em.c if (em_setup_transmit_structures(sc)) {
sc 705 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 706 dev/pci/if_em.c em_stop(sc);
sc 710 dev/pci/if_em.c em_initialize_transmit_unit(sc);
sc 713 dev/pci/if_em.c em_set_multi(sc);
sc 716 dev/pci/if_em.c if (em_setup_receive_structures(sc)) {
sc 718 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 719 dev/pci/if_em.c em_stop(sc);
sc 723 dev/pci/if_em.c em_initialize_receive_unit(sc);
sc 726 dev/pci/if_em.c em_set_promisc(sc);
sc 731 dev/pci/if_em.c timeout_add(&sc->timer_handle, hz);
sc 732 dev/pci/if_em.c em_clear_hw_cntrs(&sc->hw);
sc 733 dev/pci/if_em.c em_enable_intr(sc);
sc 736 dev/pci/if_em.c sc->hw.phy_reset_disable = TRUE;
sc 749 dev/pci/if_em.c struct em_softc *sc = arg;
sc 754 dev/pci/if_em.c ifp = &sc->interface_data.ac_if;
sc 757 dev/pci/if_em.c test_icr = reg_icr = E1000_READ_REG(&sc->hw, ICR);
sc 758 dev/pci/if_em.c if (sc->hw.mac_type >= em_82571)
sc 766 dev/pci/if_em.c em_rxeof(sc, -1);
sc 767 dev/pci/if_em.c em_txeof(sc);
sc 772 dev/pci/if_em.c timeout_del(&sc->timer_handle);
sc 773 dev/pci/if_em.c sc->hw.get_link_status = 1;
sc 774 dev/pci/if_em.c em_check_for_link(&sc->hw);
sc 775 dev/pci/if_em.c em_update_link_status(sc);
sc 776 dev/pci/if_em.c timeout_add(&sc->timer_handle, hz);
sc 780 dev/pci/if_em.c sc->rx_overruns++;
sc 800 dev/pci/if_em.c struct em_softc *sc = ifp->if_softc;
sc 806 dev/pci/if_em.c em_check_for_link(&sc->hw);
sc 807 dev/pci/if_em.c em_update_link_status(sc);
sc 812 dev/pci/if_em.c if (!sc->link_active) {
sc 819 dev/pci/if_em.c if (sc->hw.media_type == em_media_type_fiber ||
sc 820 dev/pci/if_em.c sc->hw.media_type == em_media_type_internal_serdes) {
sc 821 dev/pci/if_em.c if (sc->hw.mac_type == em_82545)
sc 825 dev/pci/if_em.c switch (sc->link_speed) {
sc 837 dev/pci/if_em.c if (sc->link_duplex == FULL_DUPLEX)
sc 843 dev/pci/if_em.c em_read_phy_reg(&sc->hw, PHY_AUTONEG_ADV, &ar);
sc 844 dev/pci/if_em.c em_read_phy_reg(&sc->hw, PHY_LP_ABILITY, &lpar);
sc 858 dev/pci/if_em.c em_read_phy_reg(&sc->hw, PHY_1000T_STATUS, &gsr);
sc 876 dev/pci/if_em.c struct em_softc *sc = ifp->if_softc;
sc 877 dev/pci/if_em.c struct ifmedia *ifm = &sc->media;
sc 886 dev/pci/if_em.c sc->hw.autoneg = DO_AUTO_NEG;
sc 887 dev/pci/if_em.c sc->hw.autoneg_advertised = AUTONEG_ADV_DEFAULT;
sc 892 dev/pci/if_em.c sc->hw.autoneg = DO_AUTO_NEG;
sc 893 dev/pci/if_em.c sc->hw.autoneg_advertised = ADVERTISE_1000_FULL;
sc 896 dev/pci/if_em.c sc->hw.autoneg = FALSE;
sc 897 dev/pci/if_em.c sc->hw.autoneg_advertised = 0;
sc 899 dev/pci/if_em.c sc->hw.forced_speed_duplex = em_100_full;
sc 901 dev/pci/if_em.c sc->hw.forced_speed_duplex = em_100_half;
sc 904 dev/pci/if_em.c sc->hw.autoneg = FALSE;
sc 905 dev/pci/if_em.c sc->hw.autoneg_advertised = 0;
sc 907 dev/pci/if_em.c sc->hw.forced_speed_duplex = em_10_full;
sc 909 dev/pci/if_em.c sc->hw.forced_speed_duplex = em_10_half;
sc 912 dev/pci/if_em.c printf("%s: Unsupported media type\n", sc->sc_dv.dv_xname);
sc 919 dev/pci/if_em.c sc->hw.phy_reset_disable = FALSE;
sc 921 dev/pci/if_em.c em_init(sc);
sc 933 dev/pci/if_em.c em_encap(struct em_softc *sc, struct mbuf *m_head)
sc 952 dev/pci/if_em.c if (sc->num_tx_desc_avail <= EM_TX_CLEANUP_THRESHOLD) {
sc 953 dev/pci/if_em.c em_txeof(sc);
sc 955 dev/pci/if_em.c if (sc->num_tx_desc_avail <= EM_TX_OP_THRESHOLD) {
sc 956 dev/pci/if_em.c sc->no_tx_desc_avail1++;
sc 969 dev/pci/if_em.c first = sc->next_avail_tx_desc;
sc 970 dev/pci/if_em.c tx_buffer = &sc->tx_buffer_area[first];
sc 974 dev/pci/if_em.c error = bus_dmamap_load_mbuf(sc->txtag, map, m_head, BUS_DMA_NOWAIT);
sc 976 dev/pci/if_em.c sc->no_tx_dma_setup++;
sc 981 dev/pci/if_em.c if (map->dm_nsegs > sc->num_tx_desc_avail - 2)
sc 985 dev/pci/if_em.c if (sc->hw.mac_type >= em_82543)
sc 986 dev/pci/if_em.c em_transmit_checksum_setup(sc, m_head, &txd_upper, &txd_lower);
sc 993 dev/pci/if_em.c i = sc->next_avail_tx_desc;
sc 994 dev/pci/if_em.c if (sc->pcix_82544)
sc 999 dev/pci/if_em.c if (sc->pcix_82544) {
sc 1008 dev/pci/if_em.c if (txd_used == sc->num_tx_desc_avail) {
sc 1009 dev/pci/if_em.c sc->next_avail_tx_desc = txd_saved;
sc 1012 dev/pci/if_em.c tx_buffer = &sc->tx_buffer_area[i];
sc 1013 dev/pci/if_em.c current_tx_desc = &sc->tx_desc_base[i];
sc 1017 dev/pci/if_em.c (sc->txd_cmd | txd_lower |
sc 1021 dev/pci/if_em.c if (++i == sc->num_tx_desc)
sc 1029 dev/pci/if_em.c tx_buffer = &sc->tx_buffer_area[i];
sc 1030 dev/pci/if_em.c current_tx_desc = &sc->tx_desc_base[i];
sc 1034 dev/pci/if_em.c sc->txd_cmd | txd_lower | map->dm_segs[j].ds_len);
sc 1037 dev/pci/if_em.c if (++i == sc->num_tx_desc)
sc 1045 dev/pci/if_em.c sc->next_avail_tx_desc = i;
sc 1046 dev/pci/if_em.c if (sc->pcix_82544)
sc 1047 dev/pci/if_em.c sc->num_tx_desc_avail -= txd_used;
sc 1049 dev/pci/if_em.c sc->num_tx_desc_avail -= map->dm_nsegs;
sc 1054 dev/pci/if_em.c bus_dmamap_sync(sc->txtag, map, 0, map->dm_mapsize,
sc 1069 dev/pci/if_em.c tx_buffer = &sc->tx_buffer_area[first];
sc 1077 dev/pci/if_em.c bus_dmamap_sync(sc->txdma.dma_tag, sc->txdma.dma_map, 0,
sc 1078 dev/pci/if_em.c sc->txdma.dma_map->dm_mapsize,
sc 1080 dev/pci/if_em.c if (sc->hw.mac_type == em_82547 &&
sc 1081 dev/pci/if_em.c sc->link_duplex == HALF_DUPLEX) {
sc 1082 dev/pci/if_em.c em_82547_move_tail_locked(sc);
sc 1084 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TDT, i);
sc 1085 dev/pci/if_em.c if (sc->hw.mac_type == em_82547)
sc 1086 dev/pci/if_em.c em_82547_update_fifo_head(sc, m_head->m_pkthdr.len);
sc 1092 dev/pci/if_em.c sc->no_tx_desc_avail2++;
sc 1093 dev/pci/if_em.c bus_dmamap_unload(sc->txtag, map);
sc 1106 dev/pci/if_em.c em_82547_move_tail_locked(struct em_softc *sc)
sc 1114 dev/pci/if_em.c hw_tdt = E1000_READ_REG(&sc->hw, TDT);
sc 1115 dev/pci/if_em.c sw_tdt = sc->next_avail_tx_desc;
sc 1118 dev/pci/if_em.c tx_desc = &sc->tx_desc_base[hw_tdt];
sc 1121 dev/pci/if_em.c if (++hw_tdt == sc->num_tx_desc)
sc 1125 dev/pci/if_em.c if (em_82547_fifo_workaround(sc, length)) {
sc 1126 dev/pci/if_em.c sc->tx_fifo_wrk_cnt++;
sc 1127 dev/pci/if_em.c timeout_add(&sc->tx_fifo_timer_handle, 1);
sc 1130 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TDT, hw_tdt);
sc 1131 dev/pci/if_em.c em_82547_update_fifo_head(sc, length);
sc 1140 dev/pci/if_em.c struct em_softc *sc = arg;
sc 1144 dev/pci/if_em.c em_82547_move_tail_locked(sc);
sc 1149 dev/pci/if_em.c em_82547_fifo_workaround(struct em_softc *sc, int len)
sc 1155 dev/pci/if_em.c if (sc->link_duplex == HALF_DUPLEX) {
sc 1156 dev/pci/if_em.c fifo_space = sc->tx_fifo_size - sc->tx_fifo_head;
sc 1159 dev/pci/if_em.c if (em_82547_tx_fifo_reset(sc))
sc 1170 dev/pci/if_em.c em_82547_update_fifo_head(struct em_softc *sc, int len)
sc 1175 dev/pci/if_em.c sc->tx_fifo_head += fifo_pkt_len;
sc 1176 dev/pci/if_em.c if (sc->tx_fifo_head >= sc->tx_fifo_size)
sc 1177 dev/pci/if_em.c sc->tx_fifo_head -= sc->tx_fifo_size;
sc 1181 dev/pci/if_em.c em_82547_tx_fifo_reset(struct em_softc *sc)
sc 1185 dev/pci/if_em.c if ((E1000_READ_REG(&sc->hw, TDT) ==
sc 1186 dev/pci/if_em.c E1000_READ_REG(&sc->hw, TDH)) &&
sc 1187 dev/pci/if_em.c (E1000_READ_REG(&sc->hw, TDFT) ==
sc 1188 dev/pci/if_em.c E1000_READ_REG(&sc->hw, TDFH)) &&
sc 1189 dev/pci/if_em.c (E1000_READ_REG(&sc->hw, TDFTS) ==
sc 1190 dev/pci/if_em.c E1000_READ_REG(&sc->hw, TDFHS)) &&
sc 1191 dev/pci/if_em.c (E1000_READ_REG(&sc->hw, TDFPC) == 0)) {
sc 1194 dev/pci/if_em.c tctl = E1000_READ_REG(&sc->hw, TCTL);
sc 1195 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TCTL, tctl & ~E1000_TCTL_EN);
sc 1198 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TDFT, sc->tx_head_addr);
sc 1199 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TDFH, sc->tx_head_addr);
sc 1200 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TDFTS, sc->tx_head_addr);
sc 1201 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TDFHS, sc->tx_head_addr);
sc 1204 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TCTL, tctl);
sc 1205 dev/pci/if_em.c E1000_WRITE_FLUSH(&sc->hw);
sc 1207 dev/pci/if_em.c sc->tx_fifo_head = 0;
sc 1208 dev/pci/if_em.c sc->tx_fifo_reset_cnt++;
sc 1216 dev/pci/if_em.c em_set_promisc(struct em_softc *sc)
sc 1219 dev/pci/if_em.c struct ifnet *ifp = &sc->interface_data.ac_if;
sc 1221 dev/pci/if_em.c reg_rctl = E1000_READ_REG(&sc->hw, RCTL);
sc 1231 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RCTL, reg_rctl);
sc 1242 dev/pci/if_em.c em_set_multi(struct em_softc *sc)
sc 1247 dev/pci/if_em.c struct ifnet *ifp = &sc->interface_data.ac_if;
sc 1248 dev/pci/if_em.c struct arpcom *ac = &sc->interface_data;
sc 1254 dev/pci/if_em.c if (sc->hw.mac_type == em_82542_rev2_0) {
sc 1255 dev/pci/if_em.c reg_rctl = E1000_READ_REG(&sc->hw, RCTL);
sc 1256 dev/pci/if_em.c if (sc->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
sc 1257 dev/pci/if_em.c em_pci_clear_mwi(&sc->hw);
sc 1259 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RCTL, reg_rctl);
sc 1277 dev/pci/if_em.c reg_rctl = E1000_READ_REG(&sc->hw, RCTL);
sc 1279 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RCTL, reg_rctl);
sc 1281 dev/pci/if_em.c em_mc_addr_list_update(&sc->hw, mta, mcnt, 0, 1);
sc 1283 dev/pci/if_em.c if (sc->hw.mac_type == em_82542_rev2_0) {
sc 1284 dev/pci/if_em.c reg_rctl = E1000_READ_REG(&sc->hw, RCTL);
sc 1286 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RCTL, reg_rctl);
sc 1288 dev/pci/if_em.c if (sc->hw.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
sc 1289 dev/pci/if_em.c em_pci_set_mwi(&sc->hw);
sc 1304 dev/pci/if_em.c struct em_softc *sc = arg;
sc 1307 dev/pci/if_em.c ifp = &sc->interface_data.ac_if;
sc 1311 dev/pci/if_em.c em_check_for_link(&sc->hw);
sc 1312 dev/pci/if_em.c em_update_link_status(sc);
sc 1313 dev/pci/if_em.c em_update_stats_counters(sc);
sc 1315 dev/pci/if_em.c em_print_hw_stats(sc);
sc 1316 dev/pci/if_em.c em_smartspeed(sc);
sc 1318 dev/pci/if_em.c timeout_add(&sc->timer_handle, hz);
sc 1324 dev/pci/if_em.c em_update_link_status(struct em_softc *sc)
sc 1326 dev/pci/if_em.c struct ifnet *ifp = &sc->interface_data.ac_if;
sc 1328 dev/pci/if_em.c if (E1000_READ_REG(&sc->hw, STATUS) & E1000_STATUS_LU) {
sc 1329 dev/pci/if_em.c if (sc->link_active == 0) {
sc 1330 dev/pci/if_em.c em_get_speed_and_duplex(&sc->hw,
sc 1331 dev/pci/if_em.c &sc->link_speed,
sc 1332 dev/pci/if_em.c &sc->link_duplex);
sc 1334 dev/pci/if_em.c if ((sc->link_speed == SPEED_1000) &&
sc 1335 dev/pci/if_em.c ((sc->hw.mac_type == em_82571) ||
sc 1336 dev/pci/if_em.c (sc->hw.mac_type == em_82572))) {
sc 1339 dev/pci/if_em.c tarc0 = E1000_READ_REG(&sc->hw, TARC0);
sc 1341 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TARC0, tarc0);
sc 1343 dev/pci/if_em.c sc->link_active = 1;
sc 1344 dev/pci/if_em.c sc->smartspeed = 0;
sc 1345 dev/pci/if_em.c ifp->if_baudrate = sc->link_speed * 1000000;
sc 1346 dev/pci/if_em.c if (sc->link_duplex == FULL_DUPLEX)
sc 1348 dev/pci/if_em.c else if (sc->link_duplex == HALF_DUPLEX)
sc 1355 dev/pci/if_em.c if (sc->link_active == 1) {
sc 1356 dev/pci/if_em.c ifp->if_baudrate = sc->link_speed = 0;
sc 1357 dev/pci/if_em.c sc->link_duplex = 0;
sc 1358 dev/pci/if_em.c sc->link_active = 0;
sc 1376 dev/pci/if_em.c struct em_softc *sc = arg;
sc 1377 dev/pci/if_em.c ifp = &sc->interface_data.ac_if;
sc 1380 dev/pci/if_em.c em_disable_intr(sc);
sc 1381 dev/pci/if_em.c em_reset_hw(&sc->hw);
sc 1382 dev/pci/if_em.c timeout_del(&sc->timer_handle);
sc 1383 dev/pci/if_em.c timeout_del(&sc->tx_fifo_timer_handle);
sc 1388 dev/pci/if_em.c em_free_transmit_structures(sc);
sc 1389 dev/pci/if_em.c em_free_receive_structures(sc);
sc 1398 dev/pci/if_em.c em_identify_hardware(struct em_softc *sc)
sc 1401 dev/pci/if_em.c struct pci_attach_args *pa = &sc->osdep.em_pa;
sc 1404 dev/pci/if_em.c sc->hw.pci_cmd_word = pci_conf_read(pa->pa_pc, pa->pa_tag,
sc 1408 dev/pci/if_em.c sc->hw.vendor_id = PCI_VENDOR(pa->pa_id);
sc 1409 dev/pci/if_em.c sc->hw.device_id = PCI_PRODUCT(pa->pa_id);
sc 1412 dev/pci/if_em.c sc->hw.revision_id = PCI_REVISION(reg);
sc 1415 dev/pci/if_em.c sc->hw.subsystem_vendor_id = PCI_VENDOR(reg);
sc 1416 dev/pci/if_em.c sc->hw.subsystem_id = PCI_PRODUCT(reg);
sc 1419 dev/pci/if_em.c if (em_set_mac_type(&sc->hw))
sc 1420 dev/pci/if_em.c printf("%s: Unknown MAC Type\n", sc->sc_dv.dv_xname);
sc 1422 dev/pci/if_em.c if (sc->hw.mac_type == em_82541 ||
sc 1423 dev/pci/if_em.c sc->hw.mac_type == em_82541_rev_2 ||
sc 1424 dev/pci/if_em.c sc->hw.mac_type == em_82547 ||
sc 1425 dev/pci/if_em.c sc->hw.mac_type == em_82547_rev_2)
sc 1426 dev/pci/if_em.c sc->hw.phy_init_script = TRUE;
sc 1430 dev/pci/if_em.c em_allocate_pci_resources(struct em_softc *sc)
sc 1435 dev/pci/if_em.c struct pci_attach_args *pa = &sc->osdep.em_pa;
sc 1444 dev/pci/if_em.c &sc->osdep.mem_bus_space_tag, &sc->osdep.mem_bus_space_handle,
sc 1445 dev/pci/if_em.c &sc->osdep.em_membase, &sc->osdep.em_memsize, 0)) {
sc 1450 dev/pci/if_em.c if (sc->hw.mac_type > em_82543) {
sc 1455 dev/pci/if_em.c sc->io_rid = rid;
sc 1465 dev/pci/if_em.c &sc->osdep.io_bus_space_tag, &sc->osdep.io_bus_space_handle,
sc 1466 dev/pci/if_em.c &sc->osdep.em_iobase, &sc->osdep.em_iosize, 0)) {
sc 1471 dev/pci/if_em.c sc->hw.io_base = 0;
sc 1475 dev/pci/if_em.c if (sc->hw.mac_type == em_ich8lan) {
sc 1483 dev/pci/if_em.c &sc->osdep.flash_bus_space_tag, &sc->osdep.flash_bus_space_handle,
sc 1484 dev/pci/if_em.c &sc->osdep.em_flashbase, &sc->osdep.em_flashsize, 0)) {
sc 1495 dev/pci/if_em.c sc->hw.back = &sc->osdep;
sc 1498 dev/pci/if_em.c sc->sc_intrhand = pci_intr_establish(pc, ih, IPL_NET, em_intr, sc,
sc 1499 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 1500 dev/pci/if_em.c if (sc->sc_intrhand == NULL) {
sc 1513 dev/pci/if_em.c em_free_pci_resources(struct em_softc *sc)
sc 1515 dev/pci/if_em.c struct pci_attach_args *pa = &sc->osdep.em_pa;
sc 1518 dev/pci/if_em.c if (sc->sc_intrhand)
sc 1519 dev/pci/if_em.c pci_intr_disestablish(pc, sc->sc_intrhand);
sc 1520 dev/pci/if_em.c sc->sc_intrhand = 0;
sc 1522 dev/pci/if_em.c if (sc->osdep.em_flashbase)
sc 1523 dev/pci/if_em.c bus_space_unmap(sc->osdep.flash_bus_space_tag, sc->osdep.flash_bus_space_handle,
sc 1524 dev/pci/if_em.c sc->osdep.em_flashsize);
sc 1525 dev/pci/if_em.c sc->osdep.em_flashbase = 0;
sc 1527 dev/pci/if_em.c if (sc->osdep.em_iobase)
sc 1528 dev/pci/if_em.c bus_space_unmap(sc->osdep.io_bus_space_tag, sc->osdep.io_bus_space_handle,
sc 1529 dev/pci/if_em.c sc->osdep.em_iosize);
sc 1530 dev/pci/if_em.c sc->osdep.em_iobase = 0;
sc 1532 dev/pci/if_em.c if (sc->osdep.em_membase)
sc 1533 dev/pci/if_em.c bus_space_unmap(sc->osdep.mem_bus_space_tag, sc->osdep.mem_bus_space_handle,
sc 1534 dev/pci/if_em.c sc->osdep.em_memsize);
sc 1535 dev/pci/if_em.c sc->osdep.em_membase = 0;
sc 1547 dev/pci/if_em.c em_hardware_init(struct em_softc *sc)
sc 1553 dev/pci/if_em.c em_reset_hw(&sc->hw);
sc 1556 dev/pci/if_em.c sc->tx_fifo_head = 0;
sc 1559 dev/pci/if_em.c if (em_validate_eeprom_checksum(&sc->hw) < 0) {
sc 1565 dev/pci/if_em.c if (em_validate_eeprom_checksum(&sc->hw) < 0) {
sc 1567 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 1572 dev/pci/if_em.c if (em_read_part_num(&sc->hw, &(sc->part_num)) < 0) {
sc 1574 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 1580 dev/pci/if_em.c (sc->hw.mac_type == em_82571 ||
sc 1581 dev/pci/if_em.c sc->hw.mac_type == em_82572)) {
sc 1585 dev/pci/if_em.c em_read_phy_reg(&sc->hw, IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
sc 1587 dev/pci/if_em.c em_write_phy_reg(&sc->hw, IGP02E1000_PHY_POWER_MGMT, phy_tmp);
sc 1604 dev/pci/if_em.c rx_buffer_size = ((E1000_READ_REG(&sc->hw, PBA) & 0xffff) << 10 );
sc 1606 dev/pci/if_em.c sc->hw.fc_high_water = rx_buffer_size -
sc 1607 dev/pci/if_em.c EM_ROUNDUP(sc->hw.max_frame_size, 1024);
sc 1608 dev/pci/if_em.c sc->hw.fc_low_water = sc->hw.fc_high_water - 1500;
sc 1609 dev/pci/if_em.c if (sc->hw.mac_type == em_80003es2lan)
sc 1610 dev/pci/if_em.c sc->hw.fc_pause_time = 0xFFFF;
sc 1612 dev/pci/if_em.c sc->hw.fc_pause_time = 1000;
sc 1613 dev/pci/if_em.c sc->hw.fc_send_xon = TRUE;
sc 1614 dev/pci/if_em.c sc->hw.fc = E1000_FC_FULL;
sc 1616 dev/pci/if_em.c if (em_init_hw(&sc->hw) < 0) {
sc 1618 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 1622 dev/pci/if_em.c em_check_for_link(&sc->hw);
sc 1633 dev/pci/if_em.c em_setup_interface(struct em_softc *sc)
sc 1640 dev/pci/if_em.c ifp = &sc->interface_data.ac_if;
sc 1641 dev/pci/if_em.c strlcpy(ifp->if_xname, sc->sc_dv.dv_xname, IFNAMSIZ);
sc 1642 dev/pci/if_em.c ifp->if_softc = sc;
sc 1648 dev/pci/if_em.c sc->hw.max_frame_size - ETHER_HDR_LEN - ETHER_CRC_LEN;
sc 1649 dev/pci/if_em.c IFQ_SET_MAXLEN(&ifp->if_snd, sc->num_tx_desc - 1);
sc 1655 dev/pci/if_em.c if (sc->hw.mac_type >= em_82543)
sc 1663 dev/pci/if_em.c ifmedia_init(&sc->media, IFM_IMASK, em_media_change,
sc 1665 dev/pci/if_em.c if (sc->hw.media_type == em_media_type_fiber ||
sc 1666 dev/pci/if_em.c sc->hw.media_type == em_media_type_internal_serdes) {
sc 1667 dev/pci/if_em.c if (sc->hw.mac_type == em_82545)
sc 1669 dev/pci/if_em.c ifmedia_add(&sc->media, IFM_ETHER | fiber_type | IFM_FDX,
sc 1671 dev/pci/if_em.c ifmedia_add(&sc->media, IFM_ETHER | fiber_type,
sc 1674 dev/pci/if_em.c ifmedia_add(&sc->media, IFM_ETHER | IFM_10_T, 0, NULL);
sc 1675 dev/pci/if_em.c ifmedia_add(&sc->media, IFM_ETHER | IFM_10_T | IFM_FDX,
sc 1677 dev/pci/if_em.c ifmedia_add(&sc->media, IFM_ETHER | IFM_100_TX,
sc 1679 dev/pci/if_em.c ifmedia_add(&sc->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
sc 1681 dev/pci/if_em.c if (sc->hw.phy_type != em_phy_ife) {
sc 1682 dev/pci/if_em.c ifmedia_add(&sc->media, IFM_ETHER | IFM_1000_T | IFM_FDX,
sc 1684 dev/pci/if_em.c ifmedia_add(&sc->media, IFM_ETHER | IFM_1000_T, 0, NULL);
sc 1687 dev/pci/if_em.c ifmedia_add(&sc->media, IFM_ETHER | IFM_AUTO, 0, NULL);
sc 1688 dev/pci/if_em.c ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO);
sc 1701 dev/pci/if_em.c em_smartspeed(struct em_softc *sc)
sc 1705 dev/pci/if_em.c if (sc->link_active || (sc->hw.phy_type != em_phy_igp) ||
sc 1706 dev/pci/if_em.c !sc->hw.autoneg || !(sc->hw.autoneg_advertised & ADVERTISE_1000_FULL))
sc 1709 dev/pci/if_em.c if (sc->smartspeed == 0) {
sc 1712 dev/pci/if_em.c em_read_phy_reg(&sc->hw, PHY_1000T_STATUS, &phy_tmp);
sc 1715 dev/pci/if_em.c em_read_phy_reg(&sc->hw, PHY_1000T_STATUS, &phy_tmp);
sc 1717 dev/pci/if_em.c em_read_phy_reg(&sc->hw, PHY_1000T_CTRL,
sc 1721 dev/pci/if_em.c em_write_phy_reg(&sc->hw,
sc 1723 dev/pci/if_em.c sc->smartspeed++;
sc 1724 dev/pci/if_em.c if (sc->hw.autoneg &&
sc 1725 dev/pci/if_em.c !em_phy_setup_autoneg(&sc->hw) &&
sc 1726 dev/pci/if_em.c !em_read_phy_reg(&sc->hw, PHY_CTRL,
sc 1730 dev/pci/if_em.c em_write_phy_reg(&sc->hw,
sc 1736 dev/pci/if_em.c } else if (sc->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
sc 1738 dev/pci/if_em.c em_read_phy_reg(&sc->hw, PHY_1000T_CTRL, &phy_tmp);
sc 1740 dev/pci/if_em.c em_write_phy_reg(&sc->hw, PHY_1000T_CTRL, phy_tmp);
sc 1741 dev/pci/if_em.c if (sc->hw.autoneg &&
sc 1742 dev/pci/if_em.c !em_phy_setup_autoneg(&sc->hw) &&
sc 1743 dev/pci/if_em.c !em_read_phy_reg(&sc->hw, PHY_CTRL, &phy_tmp)) {
sc 1746 dev/pci/if_em.c em_write_phy_reg(&sc->hw, PHY_CTRL, phy_tmp);
sc 1750 dev/pci/if_em.c if (sc->smartspeed++ == EM_SMARTSPEED_MAX)
sc 1751 dev/pci/if_em.c sc->smartspeed = 0;
sc 1758 dev/pci/if_em.c em_dma_malloc(struct em_softc *sc, bus_size_t size,
sc 1763 dev/pci/if_em.c dma->dma_tag = sc->osdep.em_pa.pa_dmat;
sc 1768 dev/pci/if_em.c "error %u\n", sc->sc_dv.dv_xname, r);
sc 1776 dev/pci/if_em.c "size %lu, error %d\n", sc->sc_dv.dv_xname,
sc 1785 dev/pci/if_em.c "size %lu, error %d\n", sc->sc_dv.dv_xname,
sc 1790 dev/pci/if_em.c r = bus_dmamap_load(sc->osdep.em_pa.pa_dmat, dma->dma_map,
sc 1797 dev/pci/if_em.c "error %u\n", sc->sc_dv.dv_xname, r);
sc 1818 dev/pci/if_em.c em_dma_free(struct em_softc *sc, struct em_dma_alloc *dma)
sc 1842 dev/pci/if_em.c em_allocate_transmit_structures(struct em_softc *sc)
sc 1844 dev/pci/if_em.c if (!(sc->tx_buffer_area =
sc 1846 dev/pci/if_em.c sc->num_tx_desc, M_DEVBUF,
sc 1849 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 1853 dev/pci/if_em.c bzero(sc->tx_buffer_area,
sc 1854 dev/pci/if_em.c sizeof(struct em_buffer) * sc->num_tx_desc);
sc 1865 dev/pci/if_em.c em_setup_transmit_structures(struct em_softc *sc)
sc 1870 dev/pci/if_em.c if ((error = em_allocate_transmit_structures(sc)) != 0)
sc 1873 dev/pci/if_em.c bzero((void *) sc->tx_desc_base,
sc 1874 dev/pci/if_em.c (sizeof(struct em_tx_desc)) * sc->num_tx_desc);
sc 1876 dev/pci/if_em.c sc->txtag = sc->osdep.em_pa.pa_dmat;
sc 1878 dev/pci/if_em.c tx_buffer = sc->tx_buffer_area;
sc 1879 dev/pci/if_em.c for (i = 0; i < sc->num_tx_desc; i++) {
sc 1880 dev/pci/if_em.c error = bus_dmamap_create(sc->txtag, MAX_JUMBO_FRAME_SIZE,
sc 1885 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 1891 dev/pci/if_em.c sc->next_avail_tx_desc = 0;
sc 1892 dev/pci/if_em.c sc->next_tx_to_clean = 0;
sc 1895 dev/pci/if_em.c sc->num_tx_desc_avail = sc->num_tx_desc;
sc 1898 dev/pci/if_em.c sc->active_checksum_context = OFFLOAD_NONE;
sc 1899 dev/pci/if_em.c bus_dmamap_sync(sc->txdma.dma_tag, sc->txdma.dma_map, 0,
sc 1900 dev/pci/if_em.c sc->txdma.dma_size, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
sc 1905 dev/pci/if_em.c em_free_transmit_structures(sc);
sc 1915 dev/pci/if_em.c em_initialize_transmit_unit(struct em_softc *sc)
sc 1923 dev/pci/if_em.c bus_addr = sc->txdma.dma_map->dm_segs[0].ds_addr;
sc 1924 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TDLEN,
sc 1925 dev/pci/if_em.c sc->num_tx_desc *
sc 1927 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TDBAH, (u_int32_t)(bus_addr >> 32));
sc 1928 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TDBAL, (u_int32_t)bus_addr);
sc 1931 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TDT, 0);
sc 1932 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TDH, 0);
sc 1935 dev/pci/if_em.c E1000_READ_REG(&sc->hw, TDBAL),
sc 1936 dev/pci/if_em.c E1000_READ_REG(&sc->hw, TDLEN));
sc 1939 dev/pci/if_em.c switch (sc->hw.mac_type) {
sc 1951 dev/pci/if_em.c if (sc->hw.media_type == em_media_type_fiber ||
sc 1952 dev/pci/if_em.c sc->hw.media_type == em_media_type_internal_serdes)
sc 1960 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TIPG, reg_tipg);
sc 1961 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TIDV, sc->tx_int_delay);
sc 1962 dev/pci/if_em.c if (sc->hw.mac_type >= em_82540)
sc 1963 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TADV, sc->tx_abs_int_delay);
sc 1968 dev/pci/if_em.c if (sc->hw.mac_type >= em_82571)
sc 1970 dev/pci/if_em.c if (sc->link_duplex == FULL_DUPLEX)
sc 1975 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, TCTL, reg_tctl);
sc 1978 dev/pci/if_em.c sc->txd_cmd = E1000_TXD_CMD_IFCS;
sc 1980 dev/pci/if_em.c if (sc->tx_int_delay > 0)
sc 1981 dev/pci/if_em.c sc->txd_cmd |= E1000_TXD_CMD_IDE;
sc 1990 dev/pci/if_em.c em_free_transmit_structures(struct em_softc *sc)
sc 1997 dev/pci/if_em.c if (sc->tx_buffer_area != NULL) {
sc 1998 dev/pci/if_em.c tx_buffer = sc->tx_buffer_area;
sc 1999 dev/pci/if_em.c for (i = 0; i < sc->num_tx_desc; i++, tx_buffer++) {
sc 2002 dev/pci/if_em.c bus_dmamap_sync(sc->txtag, tx_buffer->map,
sc 2005 dev/pci/if_em.c bus_dmamap_unload(sc->txtag,
sc 2013 dev/pci/if_em.c bus_dmamap_destroy(sc->txtag,
sc 2019 dev/pci/if_em.c if (sc->tx_buffer_area != NULL) {
sc 2020 dev/pci/if_em.c free(sc->tx_buffer_area, M_DEVBUF);
sc 2021 dev/pci/if_em.c sc->tx_buffer_area = NULL;
sc 2023 dev/pci/if_em.c if (sc->txtag != NULL)
sc 2024 dev/pci/if_em.c sc->txtag = NULL;
sc 2036 dev/pci/if_em.c em_transmit_checksum_setup(struct em_softc *sc, struct mbuf *mp,
sc 2047 dev/pci/if_em.c if (sc->active_checksum_context == OFFLOAD_TCP_IP)
sc 2050 dev/pci/if_em.c sc->active_checksum_context = OFFLOAD_TCP_IP;
sc 2054 dev/pci/if_em.c if (sc->active_checksum_context == OFFLOAD_UDP_IP)
sc 2057 dev/pci/if_em.c sc->active_checksum_context = OFFLOAD_UDP_IP;
sc 2072 dev/pci/if_em.c curr_txd = sc->next_avail_tx_desc;
sc 2073 dev/pci/if_em.c tx_buffer = &sc->tx_buffer_area[curr_txd];
sc 2074 dev/pci/if_em.c TXD = (struct em_context_desc *) &sc->tx_desc_base[curr_txd];
sc 2086 dev/pci/if_em.c if (sc->active_checksum_context == OFFLOAD_TCP_IP) {
sc 2090 dev/pci/if_em.c } else if (sc->active_checksum_context == OFFLOAD_UDP_IP) {
sc 2097 dev/pci/if_em.c TXD->cmd_and_length = htole32(sc->txd_cmd | E1000_TXD_CMD_DEXT);
sc 2102 dev/pci/if_em.c if (++curr_txd == sc->num_tx_desc)
sc 2105 dev/pci/if_em.c sc->num_tx_desc_avail--;
sc 2106 dev/pci/if_em.c sc->next_avail_tx_desc = curr_txd;
sc 2118 dev/pci/if_em.c em_txeof(struct em_softc *sc)
sc 2123 dev/pci/if_em.c struct ifnet *ifp = &sc->interface_data.ac_if;
sc 2125 dev/pci/if_em.c if (sc->num_tx_desc_avail == sc->num_tx_desc)
sc 2128 dev/pci/if_em.c num_avail = sc->num_tx_desc_avail;
sc 2129 dev/pci/if_em.c first = sc->next_tx_to_clean;
sc 2130 dev/pci/if_em.c tx_desc = &sc->tx_desc_base[first];
sc 2131 dev/pci/if_em.c tx_buffer = &sc->tx_buffer_area[first];
sc 2133 dev/pci/if_em.c eop_desc = &sc->tx_desc_base[last];
sc 2141 dev/pci/if_em.c if (++last == sc->num_tx_desc)
sc 2145 dev/pci/if_em.c bus_dmamap_sync(sc->txdma.dma_tag, sc->txdma.dma_map, 0,
sc 2146 dev/pci/if_em.c sc->txdma.dma_map->dm_mapsize, BUS_DMASYNC_POSTREAD);
sc 2157 dev/pci/if_em.c bus_dmamap_sync(sc->txtag,
sc 2161 dev/pci/if_em.c bus_dmamap_unload(sc->txtag,
sc 2169 dev/pci/if_em.c if (++first == sc->num_tx_desc)
sc 2172 dev/pci/if_em.c tx_buffer = &sc->tx_buffer_area[first];
sc 2173 dev/pci/if_em.c tx_desc = &sc->tx_desc_base[first];
sc 2178 dev/pci/if_em.c eop_desc = &sc->tx_desc_base[last];
sc 2180 dev/pci/if_em.c if (++last == sc->num_tx_desc)
sc 2186 dev/pci/if_em.c bus_dmamap_sync(sc->txdma.dma_tag, sc->txdma.dma_map, 0,
sc 2187 dev/pci/if_em.c sc->txdma.dma_map->dm_mapsize,
sc 2190 dev/pci/if_em.c sc->next_tx_to_clean = first;
sc 2201 dev/pci/if_em.c if (num_avail == sc->num_tx_desc)
sc 2204 dev/pci/if_em.c else if (num_avail != sc->num_tx_desc_avail)
sc 2207 dev/pci/if_em.c sc->num_tx_desc_avail = num_avail;
sc 2216 dev/pci/if_em.c em_get_buf(struct em_softc *sc, int i)
sc 2225 dev/pci/if_em.c sc->mbuf_alloc_failed++;
sc 2231 dev/pci/if_em.c sc->mbuf_cluster_failed++;
sc 2236 dev/pci/if_em.c if (sc->hw.max_frame_size <= (MCLBYTES - ETHER_ALIGN))
sc 2243 dev/pci/if_em.c error = bus_dmamap_load_mbuf(sc->rxtag, sc->rx_sparemap,
sc 2250 dev/pci/if_em.c rx_buffer = &sc->rx_buffer_area[i];
sc 2252 dev/pci/if_em.c bus_dmamap_unload(sc->rxtag, rx_buffer->map);
sc 2255 dev/pci/if_em.c rx_buffer->map = sc->rx_sparemap;
sc 2256 dev/pci/if_em.c sc->rx_sparemap = map;
sc 2258 dev/pci/if_em.c bus_dmamap_sync(sc->rxtag, rx_buffer->map, 0,
sc 2263 dev/pci/if_em.c sc->rx_desc_base[i].buffer_addr = htole64(rx_buffer->map->dm_segs[0].ds_addr);
sc 2277 dev/pci/if_em.c em_allocate_receive_structures(struct em_softc *sc)
sc 2282 dev/pci/if_em.c if (!(sc->rx_buffer_area =
sc 2284 dev/pci/if_em.c sc->num_rx_desc, M_DEVBUF,
sc 2287 dev/pci/if_em.c sc->sc_dv.dv_xname);
sc 2291 dev/pci/if_em.c bzero(sc->rx_buffer_area,
sc 2292 dev/pci/if_em.c sizeof(struct em_buffer) * sc->num_rx_desc);
sc 2294 dev/pci/if_em.c sc->rxtag = sc->osdep.em_pa.pa_dmat;
sc 2296 dev/pci/if_em.c error = bus_dmamap_create(sc->rxtag, MCLBYTES, 1, MCLBYTES,
sc 2297 dev/pci/if_em.c 0, BUS_DMA_NOWAIT, &sc->rx_sparemap);
sc 2301 dev/pci/if_em.c sc->sc_dv.dv_xname, error);
sc 2305 dev/pci/if_em.c rx_buffer = sc->rx_buffer_area;
sc 2306 dev/pci/if_em.c for (i = 0; i < sc->num_rx_desc; i++, rx_buffer++) {
sc 2307 dev/pci/if_em.c error = bus_dmamap_create(sc->rxtag, MCLBYTES, 1,
sc 2313 dev/pci/if_em.c sc->sc_dv.dv_xname, error);
sc 2318 dev/pci/if_em.c for (i = 0; i < sc->num_rx_desc; i++) {
sc 2319 dev/pci/if_em.c error = em_get_buf(sc, i);
sc 2323 dev/pci/if_em.c bus_dmamap_sync(sc->rxdma.dma_tag, sc->rxdma.dma_map, 0,
sc 2324 dev/pci/if_em.c sc->rxdma.dma_map->dm_mapsize,
sc 2330 dev/pci/if_em.c em_free_receive_structures(sc);
sc 2340 dev/pci/if_em.c em_setup_receive_structures(struct em_softc *sc)
sc 2342 dev/pci/if_em.c bzero((void *) sc->rx_desc_base,
sc 2343 dev/pci/if_em.c (sizeof(struct em_rx_desc)) * sc->num_rx_desc);
sc 2345 dev/pci/if_em.c if (em_allocate_receive_structures(sc))
sc 2349 dev/pci/if_em.c sc->next_rx_desc_to_check = 0;
sc 2359 dev/pci/if_em.c em_initialize_receive_unit(struct em_softc *sc)
sc 2367 dev/pci/if_em.c ifp = &sc->interface_data.ac_if;
sc 2370 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RCTL, 0);
sc 2373 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RDTR,
sc 2374 dev/pci/if_em.c sc->rx_int_delay | E1000_RDT_FPDB);
sc 2376 dev/pci/if_em.c if (sc->hw.mac_type >= em_82540) {
sc 2377 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RADV, sc->rx_abs_int_delay);
sc 2381 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, ITR, DEFAULT_ITR);
sc 2385 dev/pci/if_em.c bus_addr = sc->rxdma.dma_map->dm_segs[0].ds_addr;
sc 2386 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RDLEN, sc->num_rx_desc *
sc 2388 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RDBAH, (u_int32_t)(bus_addr >> 32));
sc 2389 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RDBAL, (u_int32_t)bus_addr);
sc 2394 dev/pci/if_em.c (sc->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
sc 2396 dev/pci/if_em.c if (sc->hw.tbi_compatibility_on == TRUE)
sc 2399 dev/pci/if_em.c switch (sc->rx_buffer_len) {
sc 2415 dev/pci/if_em.c if (sc->hw.max_frame_size != ETHER_MAX_LEN)
sc 2419 dev/pci/if_em.c if (sc->hw.mac_type >= em_82543) {
sc 2420 dev/pci/if_em.c reg_rxcsum = E1000_READ_REG(&sc->hw, RXCSUM);
sc 2422 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RXCSUM, reg_rxcsum);
sc 2426 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RCTL, reg_rctl);
sc 2429 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RDH, 0);
sc 2430 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RDT, sc->num_rx_desc - 1);
sc 2439 dev/pci/if_em.c em_free_receive_structures(struct em_softc *sc)
sc 2446 dev/pci/if_em.c if (sc->rx_sparemap) {
sc 2447 dev/pci/if_em.c bus_dmamap_destroy(sc->rxtag, sc->rx_sparemap);
sc 2448 dev/pci/if_em.c sc->rx_sparemap = NULL;
sc 2450 dev/pci/if_em.c if (sc->rx_buffer_area != NULL) {
sc 2451 dev/pci/if_em.c rx_buffer = sc->rx_buffer_area;
sc 2452 dev/pci/if_em.c for (i = 0; i < sc->num_rx_desc; i++, rx_buffer++) {
sc 2455 dev/pci/if_em.c bus_dmamap_sync(sc->rxtag, rx_buffer->map,
sc 2458 dev/pci/if_em.c bus_dmamap_unload(sc->rxtag,
sc 2466 dev/pci/if_em.c bus_dmamap_destroy(sc->rxtag,
sc 2472 dev/pci/if_em.c if (sc->rx_buffer_area != NULL) {
sc 2473 dev/pci/if_em.c free(sc->rx_buffer_area, M_DEVBUF);
sc 2474 dev/pci/if_em.c sc->rx_buffer_area = NULL;
sc 2476 dev/pci/if_em.c if (sc->rxtag != NULL)
sc 2477 dev/pci/if_em.c sc->rxtag = NULL;
sc 2491 dev/pci/if_em.c em_rxeof(struct em_softc *sc, int count)
sc 2504 dev/pci/if_em.c ifp = &sc->interface_data.ac_if;
sc 2505 dev/pci/if_em.c i = sc->next_rx_desc_to_check;
sc 2506 dev/pci/if_em.c current_desc = &sc->rx_desc_base[i];
sc 2507 dev/pci/if_em.c bus_dmamap_sync(sc->rxdma.dma_tag, sc->rxdma.dma_map, 0,
sc 2508 dev/pci/if_em.c sc->rxdma.dma_map->dm_mapsize, BUS_DMASYNC_POSTREAD);
sc 2518 dev/pci/if_em.c mp = sc->rx_buffer_area[i].m_head;
sc 2523 dev/pci/if_em.c bus_dmamap_sync(sc->rxtag, sc->rx_buffer_area[i].map,
sc 2524 dev/pci/if_em.c 0, sc->rx_buffer_area[i].map->dm_mapsize,
sc 2548 dev/pci/if_em.c if (sc->fmp != NULL)
sc 2549 dev/pci/if_em.c pkt_len += sc->fmp->m_pkthdr.len;
sc 2552 dev/pci/if_em.c if (TBI_ACCEPT(&sc->hw, status, current_desc->errors,
sc 2554 dev/pci/if_em.c em_tbi_adjust_stats(&sc->hw,
sc 2555 dev/pci/if_em.c &sc->stats,
sc 2557 dev/pci/if_em.c sc->hw.mac_addr);
sc 2565 dev/pci/if_em.c if (em_get_buf(sc, i) != 0) {
sc 2566 dev/pci/if_em.c sc->dropped_pkts++;
sc 2580 dev/pci/if_em.c if (sc->hw.max_frame_size > (MCLBYTES - ETHER_ALIGN)) {
sc 2584 dev/pci/if_em.c if (prev_len_adj > sc->align_buf_len)
sc 2585 dev/pci/if_em.c prev_len_adj -= sc->align_buf_len;
sc 2603 dev/pci/if_em.c if (!sc->align_buf_len)
sc 2607 dev/pci/if_em.c if (sc->align_buf_len) {
sc 2608 dev/pci/if_em.c mp->m_len += sc->align_buf_len;
sc 2609 dev/pci/if_em.c bcopy(&sc->align_buf,
sc 2611 dev/pci/if_em.c sc->align_buf_len);
sc 2616 dev/pci/if_em.c &sc->align_buf,
sc 2618 dev/pci/if_em.c sc->align_buf_len = tmp_align_buf_len;
sc 2622 dev/pci/if_em.c if (sc->fmp == NULL) {
sc 2624 dev/pci/if_em.c sc->fmp = mp; /* Store the first mbuf */
sc 2625 dev/pci/if_em.c sc->lmp = mp;
sc 2634 dev/pci/if_em.c sc->lmp->m_len -= prev_len_adj;
sc 2635 dev/pci/if_em.c sc->fmp->m_pkthdr.len -= prev_len_adj;
sc 2637 dev/pci/if_em.c sc->lmp->m_next = mp;
sc 2638 dev/pci/if_em.c sc->lmp = sc->lmp->m_next;
sc 2639 dev/pci/if_em.c sc->fmp->m_pkthdr.len += mp->m_len;
sc 2643 dev/pci/if_em.c sc->fmp->m_pkthdr.rcvif = ifp;
sc 2645 dev/pci/if_em.c em_receive_checksum(sc, current_desc,
sc 2646 dev/pci/if_em.c sc->fmp);
sc 2647 dev/pci/if_em.c m = sc->fmp;
sc 2648 dev/pci/if_em.c sc->fmp = NULL;
sc 2649 dev/pci/if_em.c sc->lmp = NULL;
sc 2652 dev/pci/if_em.c sc->dropped_pkts++;
sc 2655 dev/pci/if_em.c mp = sc->rx_buffer_area[i].m_head;
sc 2659 dev/pci/if_em.c if (sc->hw.max_frame_size <= (MCLBYTES - ETHER_ALIGN))
sc 2661 dev/pci/if_em.c if (sc->fmp != NULL) {
sc 2662 dev/pci/if_em.c m_freem(sc->fmp);
sc 2663 dev/pci/if_em.c sc->fmp = NULL;
sc 2664 dev/pci/if_em.c sc->lmp = NULL;
sc 2671 dev/pci/if_em.c bus_dmamap_sync(sc->rxdma.dma_tag, sc->rxdma.dma_map, 0,
sc 2672 dev/pci/if_em.c sc->rxdma.dma_map->dm_mapsize,
sc 2676 dev/pci/if_em.c if (++i == sc->num_rx_desc)
sc 2679 dev/pci/if_em.c sc->next_rx_desc_to_check = i;
sc 2692 dev/pci/if_em.c i = sc->next_rx_desc_to_check;
sc 2694 dev/pci/if_em.c current_desc = &sc->rx_desc_base[i];
sc 2696 dev/pci/if_em.c sc->next_rx_desc_to_check = i;
sc 2700 dev/pci/if_em.c i = sc->num_rx_desc - 1;
sc 2701 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, RDT, i);
sc 2712 dev/pci/if_em.c em_receive_checksum(struct em_softc *sc, struct em_rx_desc *rx_desc,
sc 2716 dev/pci/if_em.c if ((sc->hw.mac_type < em_82543) ||
sc 2742 dev/pci/if_em.c em_enable_intr(struct em_softc *sc)
sc 2744 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, IMS, (IMS_ENABLE_MASK));
sc 2748 dev/pci/if_em.c em_disable_intr(struct em_softc *sc)
sc 2759 dev/pci/if_em.c if (sc->hw.mac_type == em_82542_rev2_0)
sc 2760 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, IMC, (0xffffffff & ~E1000_IMC_RXSEQ));
sc 2762 dev/pci/if_em.c E1000_WRITE_REG(&sc->hw, IMC, 0xffffffff);
sc 2893 dev/pci/if_em.c em_update_stats_counters(struct em_softc *sc)
sc 2897 dev/pci/if_em.c if (sc->hw.media_type == em_media_type_copper ||
sc 2898 dev/pci/if_em.c (E1000_READ_REG(&sc->hw, STATUS) & E1000_STATUS_LU)) {
sc 2899 dev/pci/if_em.c sc->stats.symerrs += E1000_READ_REG(&sc->hw, SYMERRS);
sc 2900 dev/pci/if_em.c sc->stats.sec += E1000_READ_REG(&sc->hw, SEC);
sc 2902 dev/pci/if_em.c sc->stats.crcerrs += E1000_READ_REG(&sc->hw, CRCERRS);
sc 2903 dev/pci/if_em.c sc->stats.mpc += E1000_READ_REG(&sc->hw, MPC);
sc 2904 dev/pci/if_em.c sc->stats.scc += E1000_READ_REG(&sc->hw, SCC);
sc 2905 dev/pci/if_em.c sc->stats.ecol += E1000_READ_REG(&sc->hw, ECOL);
sc 2907 dev/pci/if_em.c sc->stats.mcc += E1000_READ_REG(&sc->hw, MCC);
sc 2908 dev/pci/if_em.c sc->stats.latecol += E1000_READ_REG(&sc->hw, LATECOL);
sc 2909 dev/pci/if_em.c sc->stats.colc += E1000_READ_REG(&sc->hw, COLC);
sc 2910 dev/pci/if_em.c sc->stats.dc += E1000_READ_REG(&sc->hw, DC);
sc 2911 dev/pci/if_em.c sc->stats.rlec += E1000_READ_REG(&sc->hw, RLEC);
sc 2912 dev/pci/if_em.c sc->stats.xonrxc += E1000_READ_REG(&sc->hw, XONRXC);
sc 2913 dev/pci/if_em.c sc->stats.xontxc += E1000_READ_REG(&sc->hw, XONTXC);
sc 2914 dev/pci/if_em.c sc->stats.xoffrxc += E1000_READ_REG(&sc->hw, XOFFRXC);
sc 2915 dev/pci/if_em.c sc->stats.xofftxc += E1000_READ_REG(&sc->hw, XOFFTXC);
sc 2916 dev/pci/if_em.c sc->stats.fcruc += E1000_READ_REG(&sc->hw, FCRUC);
sc 2917 dev/pci/if_em.c sc->stats.prc64 += E1000_READ_REG(&sc->hw, PRC64);
sc 2918 dev/pci/if_em.c sc->stats.prc127 += E1000_READ_REG(&sc->hw, PRC127);
sc 2919 dev/pci/if_em.c sc->stats.prc255 += E1000_READ_REG(&sc->hw, PRC255);
sc 2920 dev/pci/if_em.c sc->stats.prc511 += E1000_READ_REG(&sc->hw, PRC511);
sc 2921 dev/pci/if_em.c sc->stats.prc1023 += E1000_READ_REG(&sc->hw, PRC1023);
sc 2922 dev/pci/if_em.c sc->stats.prc1522 += E1000_READ_REG(&sc->hw, PRC1522);
sc 2923 dev/pci/if_em.c sc->stats.gprc += E1000_READ_REG(&sc->hw, GPRC);
sc 2924 dev/pci/if_em.c sc->stats.bprc += E1000_READ_REG(&sc->hw, BPRC);
sc 2925 dev/pci/if_em.c sc->stats.mprc += E1000_READ_REG(&sc->hw, MPRC);
sc 2926 dev/pci/if_em.c sc->stats.gptc += E1000_READ_REG(&sc->hw, GPTC);
sc 2931 dev/pci/if_em.c sc->stats.gorcl += E1000_READ_REG(&sc->hw, GORCL);
sc 2932 dev/pci/if_em.c sc->stats.gorch += E1000_READ_REG(&sc->hw, GORCH);
sc 2933 dev/pci/if_em.c sc->stats.gotcl += E1000_READ_REG(&sc->hw, GOTCL);
sc 2934 dev/pci/if_em.c sc->stats.gotch += E1000_READ_REG(&sc->hw, GOTCH);
sc 2936 dev/pci/if_em.c sc->stats.rnbc += E1000_READ_REG(&sc->hw, RNBC);
sc 2937 dev/pci/if_em.c sc->stats.ruc += E1000_READ_REG(&sc->hw, RUC);
sc 2938 dev/pci/if_em.c sc->stats.rfc += E1000_READ_REG(&sc->hw, RFC);
sc 2939 dev/pci/if_em.c sc->stats.roc += E1000_READ_REG(&sc->hw, ROC);
sc 2940 dev/pci/if_em.c sc->stats.rjc += E1000_READ_REG(&sc->hw, RJC);
sc 2942 dev/pci/if_em.c sc->stats.torl += E1000_READ_REG(&sc->hw, TORL);
sc 2943 dev/pci/if_em.c sc->stats.torh += E1000_READ_REG(&sc->hw, TORH);
sc 2944 dev/pci/if_em.c sc->stats.totl += E1000_READ_REG(&sc->hw, TOTL);
sc 2945 dev/pci/if_em.c sc->stats.toth += E1000_READ_REG(&sc->hw, TOTH);
sc 2947 dev/pci/if_em.c sc->stats.tpr += E1000_READ_REG(&sc->hw, TPR);
sc 2948 dev/pci/if_em.c sc->stats.tpt += E1000_READ_REG(&sc->hw, TPT);
sc 2949 dev/pci/if_em.c sc->stats.ptc64 += E1000_READ_REG(&sc->hw, PTC64);
sc 2950 dev/pci/if_em.c sc->stats.ptc127 += E1000_READ_REG(&sc->hw, PTC127);
sc 2951 dev/pci/if_em.c sc->stats.ptc255 += E1000_READ_REG(&sc->hw, PTC255);
sc 2952 dev/pci/if_em.c sc->stats.ptc511 += E1000_READ_REG(&sc->hw, PTC511);
sc 2953 dev/pci/if_em.c sc->stats.ptc1023 += E1000_READ_REG(&sc->hw, PTC1023);
sc 2954 dev/pci/if_em.c sc->stats.ptc1522 += E1000_READ_REG(&sc->hw, PTC1522);
sc 2955 dev/pci/if_em.c sc->stats.mptc += E1000_READ_REG(&sc->hw, MPTC);
sc 2956 dev/pci/if_em.c sc->stats.bptc += E1000_READ_REG(&sc->hw, BPTC);
sc 2958 dev/pci/if_em.c if (sc->hw.mac_type >= em_82543) {
sc 2959 dev/pci/if_em.c sc->stats.algnerrc +=
sc 2960 dev/pci/if_em.c E1000_READ_REG(&sc->hw, ALGNERRC);
sc 2961 dev/pci/if_em.c sc->stats.rxerrc +=
sc 2962 dev/pci/if_em.c E1000_READ_REG(&sc->hw, RXERRC);
sc 2963 dev/pci/if_em.c sc->stats.tncrs +=
sc 2964 dev/pci/if_em.c E1000_READ_REG(&sc->hw, TNCRS);
sc 2965 dev/pci/if_em.c sc->stats.cexterr +=
sc 2966 dev/pci/if_em.c E1000_READ_REG(&sc->hw, CEXTERR);
sc 2967 dev/pci/if_em.c sc->stats.tsctc +=
sc 2968 dev/pci/if_em.c E1000_READ_REG(&sc->hw, TSCTC);
sc 2969 dev/pci/if_em.c sc->stats.tsctfc +=
sc 2970 dev/pci/if_em.c E1000_READ_REG(&sc->hw, TSCTFC);
sc 2972 dev/pci/if_em.c ifp = &sc->interface_data.ac_if;
sc 2975 dev/pci/if_em.c ifp->if_collisions = sc->stats.colc;
sc 2979 dev/pci/if_em.c sc->dropped_pkts +
sc 2980 dev/pci/if_em.c sc->stats.rxerrc +
sc 2981 dev/pci/if_em.c sc->stats.crcerrs +
sc 2982 dev/pci/if_em.c sc->stats.algnerrc +
sc 2983 dev/pci/if_em.c sc->stats.ruc + sc->stats.roc +
sc 2984 dev/pci/if_em.c sc->stats.mpc + sc->stats.cexterr +
sc 2985 dev/pci/if_em.c sc->rx_overruns;
sc 2988 dev/pci/if_em.c ifp->if_oerrors = sc->stats.ecol + sc->stats.latecol +
sc 2989 dev/pci/if_em.c sc->watchdog_events;
sc 3000 dev/pci/if_em.c em_print_hw_stats(struct em_softc *sc)
sc 3002 dev/pci/if_em.c const char * const unit = sc->sc_dv.dv_xname;
sc 3005 dev/pci/if_em.c (long long)sc->stats.ecol);
sc 3007 dev/pci/if_em.c (long long)sc->stats.symerrs);
sc 3009 dev/pci/if_em.c (long long)sc->stats.sec);
sc 3011 dev/pci/if_em.c (long long)sc->stats.dc);
sc 3014 dev/pci/if_em.c (long long)sc->stats.mpc);
sc 3016 dev/pci/if_em.c (long long)sc->stats.rnbc);
sc 3019 dev/pci/if_em.c ((long long)sc->stats.roc +
sc 3020 dev/pci/if_em.c (long long)sc->stats.ruc));
sc 3022 dev/pci/if_em.c (long long)sc->stats.rxerrc);
sc 3024 dev/pci/if_em.c (long long)sc->stats.crcerrs);
sc 3026 dev/pci/if_em.c (long long)sc->stats.algnerrc);
sc 3028 dev/pci/if_em.c (long long)sc->stats.cexterr);
sc 3031 dev/pci/if_em.c sc->rx_overruns);
sc 3033 dev/pci/if_em.c sc->watchdog_events);
sc 3036 dev/pci/if_em.c (long long)sc->stats.xonrxc);
sc 3038 dev/pci/if_em.c (long long)sc->stats.xontxc);
sc 3040 dev/pci/if_em.c (long long)sc->stats.xoffrxc);
sc 3042 dev/pci/if_em.c (long long)sc->stats.xofftxc);
sc 3045 dev/pci/if_em.c (long long)sc->stats.gprc);
sc 3047 dev/pci/if_em.c (long long)sc->stats.gptc);
sc 195 dev/pci/if_em.h #define EM_TX_CLEANUP_THRESHOLD (sc->num_tx_desc / 8)
sc 196 dev/pci/if_em.h #define EM_TX_OP_THRESHOLD (sc->num_tx_desc / 32)
sc 2511 dev/pci/if_em_hw.h #define TBI_ACCEPT(sc, status, errors, length, last_byte) \
sc 2512 dev/pci/if_em_hw.h ((sc)->tbi_compatibility_on && \
sc 2516 dev/pci/if_em_hw.h (((length) > ((sc)->min_frame_size - VLAN_TAG_SIZE)) && \
sc 2517 dev/pci/if_em_hw.h ((length) <= ((sc)->max_frame_size + 1))) : \
sc 2518 dev/pci/if_em_hw.h (((length) > (sc)->min_frame_size) && \
sc 2519 dev/pci/if_em_hw.h ((length) <= ((sc)->max_frame_size + VLAN_TAG_SIZE + 1)))))
sc 136 dev/pci/if_en_pci.c struct en_softc *sc = (struct en_softc *) v;
sc 139 dev/pci/if_en_pci.c bus_space_write_4(sc->en_memt, sc->en_base, ADP_PCIREG, ADP_PCIREG_RESET);
sc 141 dev/pci/if_en_pci.c dummy = bus_space_read_4(sc->en_memt, sc->en_base, ADP_PCIREG);
sc 142 dev/pci/if_en_pci.c bus_space_write_4(sc->en_memt, sc->en_base, ADP_PCIREG,
sc 144 dev/pci/if_en_pci.c dummy = bus_space_read_4(sc->en_memt, sc->en_base, ADP_PCIREG);
sc 191 dev/pci/if_en_pci.c struct en_softc *sc = (void *)self;
sc 198 dev/pci/if_en_pci.c sc->is_adaptec = (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ADP) ? 1 : 0;
sc 210 dev/pci/if_en_pci.c scp->sc_ih = pci_intr_establish(scp->en_pc, ih, IPL_NET, en_intr, sc,
sc 211 dev/pci/if_en_pci.c sc->sc_dev.dv_xname);
sc 219 dev/pci/if_en_pci.c sc->ipl = 1; /* XXX */
sc 226 dev/pci/if_en_pci.c &sc->en_memt, &sc->en_base, NULL, &sc->en_obmemsz, 0);
sc 240 dev/pci/if_en_pci.c if (sc->is_adaptec) {
sc 241 dev/pci/if_en_pci.c sc->en_busreset = adp_busreset;
sc 242 dev/pci/if_en_pci.c adp_busreset(sc);
sc 247 dev/pci/if_en_pci.c if (!sc->is_adaptec) {
sc 248 dev/pci/if_en_pci.c sc->en_busreset = NULL;
sc 258 dev/pci/if_en_pci.c en_attach(sc);
sc 113 dev/pci/if_ep_pci.c struct ep_softc *sc = (void *)self;
sc 122 dev/pci/if_ep_pci.c &sc->sc_iot, &sc->sc_ioh, NULL, &iosize, 0)) {
sc 127 dev/pci/if_ep_pci.c sc->bustype = EP_BUS_PCI;
sc 135 dev/pci/if_ep_pci.c epconfig(sc, EP_CHIPSET_VORTEX, NULL);
sc 140 dev/pci/if_ep_pci.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
sc 144 dev/pci/if_ep_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, epintr,
sc 145 dev/pci/if_ep_pci.c sc, sc->sc_dev.dv_xname);
sc 146 dev/pci/if_ep_pci.c if (sc->sc_ih == NULL) {
sc 151 dev/pci/if_ep_pci.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
sc 153 dev/pci/if_epic_pci.c struct epic_softc *sc = &psc->sc_epic;
sc 201 dev/pci/if_epic_pci.c sc->sc_st = memt;
sc 202 dev/pci/if_epic_pci.c sc->sc_sh = memh;
sc 204 dev/pci/if_epic_pci.c sc->sc_st = iot;
sc 205 dev/pci/if_epic_pci.c sc->sc_sh = ioh;
sc 211 dev/pci/if_epic_pci.c sc->sc_dmat = pa->pa_dmat;
sc 221 dev/pci/if_epic_pci.c psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, epic_intr, sc,
sc 233 dev/pci/if_epic_pci.c sc->sc_hwflags = esp->flags;
sc 238 dev/pci/if_epic_pci.c epic_attach(sc, intrstr);
sc 81 dev/pci/if_fpa.c pdq_softc_t *sc = (pdq_softc_t *)arg;
sc 82 dev/pci/if_fpa.c (void) pdq_interrupt(sc->sc_pdq);
sc 106 dev/pci/if_fpa.c pdq_softc_t *sc = (pdq_softc_t *)self;
sc 121 dev/pci/if_fpa.c bcopy(sc->sc_dev.dv_xname, sc->sc_if.if_xname, IFNAMSIZ);
sc 122 dev/pci/if_fpa.c sc->sc_if.if_flags = 0;
sc 123 dev/pci/if_fpa.c sc->sc_if.if_softc = sc;
sc 131 dev/pci/if_fpa.c &sc->sc_csrtag, &sc->sc_csrhandle, NULL, &csrsize, 0)) {
sc 137 dev/pci/if_fpa.c &sc->sc_csrtag, &sc->sc_csrhandle, NULL, &csrsize, 0)) {
sc 145 dev/pci/if_fpa.c bus_space_unmap(sc->sc_csrtag, sc->sc_csrhandle, csrsize);
sc 149 dev/pci/if_fpa.c sc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_NET,
sc 150 dev/pci/if_fpa.c pdq_pci_ifintr, sc, self->dv_xname);
sc 151 dev/pci/if_fpa.c if (sc->sc_ih == NULL) {
sc 156 dev/pci/if_fpa.c bus_space_unmap(sc->sc_csrtag, sc->sc_csrhandle, csrsize);
sc 162 dev/pci/if_fpa.c sc->sc_pdq = pdq_initialize(sc->sc_csrtag, sc->sc_csrhandle,
sc 163 dev/pci/if_fpa.c sc->sc_if.if_xname, 0, (void *) sc, PDQ_DEFPA);
sc 164 dev/pci/if_fpa.c if (sc->sc_pdq == NULL) {
sc 166 dev/pci/if_fpa.c bus_space_unmap(sc->sc_csrtag, sc->sc_csrhandle, csrsize);
sc 170 dev/pci/if_fpa.c bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes,
sc 171 dev/pci/if_fpa.c sc->sc_arpcom.ac_enaddr, 6);
sc 172 dev/pci/if_fpa.c pdq_ifattach(sc, NULL);
sc 174 dev/pci/if_fpa.c sc->sc_ats = shutdownhook_establish((void (*)(void *)) pdq_hwreset,
sc 175 dev/pci/if_fpa.c sc->sc_pdq);
sc 176 dev/pci/if_fpa.c if (sc->sc_ats == NULL)
sc 147 dev/pci/if_fxp_pci.c struct fxp_softc *sc = (struct fxp_softc *)self;
sc 156 dev/pci/if_fxp_pci.c &sc->sc_st, &sc->sc_sh, NULL, &iosize, 0)) {
sc 160 dev/pci/if_fxp_pci.c sc->sc_dmat = pa->pa_dmat;
sc 162 dev/pci/if_fxp_pci.c sc->sc_revision = PCI_REVISION(pa->pa_class);
sc 169 dev/pci/if_fxp_pci.c bus_space_unmap(sc->sc_st, sc->sc_sh, iosize);
sc 174 dev/pci/if_fxp_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc,
sc 176 dev/pci/if_fxp_pci.c if (sc->sc_ih == NULL) {
sc 181 dev/pci/if_fxp_pci.c bus_space_unmap(sc->sc_st, sc->sc_sh, iosize);
sc 191 dev/pci/if_fxp_pci.c if (sc->sc_revision >= FXP_REV_82558_A4)
sc 193 dev/pci/if_fxp_pci.c if (sc->sc_revision >= FXP_REV_82559_A0)
sc 195 dev/pci/if_fxp_pci.c if (sc->sc_revision >= FXP_REV_82559S_A)
sc 197 dev/pci/if_fxp_pci.c if (sc->sc_revision >= FXP_REV_82550)
sc 199 dev/pci/if_fxp_pci.c if (sc->sc_revision >= FXP_REV_82551_E)
sc 227 dev/pci/if_fxp_pci.c (sc->sc_revision >= 8 && sc->sc_revision <= 16))))
sc 228 dev/pci/if_fxp_pci.c sc->sc_flags |= FXPF_DISABLE_STANDBY;
sc 233 dev/pci/if_fxp_pci.c if (sc->sc_revision >= FXP_REV_82558_A4)
sc 241 dev/pci/if_fxp_pci.c sc->sc_flags |= FXPF_MWI_ENABLE;
sc 245 dev/pci/if_fxp_pci.c if (fxp_attach(sc, intrstr)) {
sc 247 dev/pci/if_fxp_pci.c pci_intr_disestablish(pc, sc->sc_ih);
sc 248 dev/pci/if_fxp_pci.c bus_space_unmap(sc->sc_st, sc->sc_sh, iosize);
sc 135 dev/pci/if_gem_pci.c gem_pci_enaddr(struct gem_softc *sc, struct pci_attach_args *pa)
sc 189 dev/pci/if_gem_pci.c bcopy(buf + 6, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 208 dev/pci/if_gem_pci.c struct gem_softc *sc = &gsc->gsc_gem;
sc 220 dev/pci/if_gem_pci.c sc->sc_bustag = pa->pa_memt;
sc 223 dev/pci/if_gem_pci.c sc->sc_bustag = pa->pa_iot;
sc 226 dev/pci/if_gem_pci.c sc->sc_dmatag = pa->pa_dmat;
sc 228 dev/pci/if_gem_pci.c sc->sc_pci = 1; /* XXXXX should all be done in bus_dma. */
sc 231 dev/pci/if_gem_pci.c sc->sc_variant = GEM_SUN_GEM;
sc 233 dev/pci/if_gem_pci.c sc->sc_variant = GEM_SUN_ERI;
sc 235 dev/pci/if_gem_pci.c sc->sc_variant = GEM_APPLE_GMAC;
sc 237 dev/pci/if_gem_pci.c sc->sc_variant = GEM_APPLE_GMAC;
sc 239 dev/pci/if_gem_pci.c sc->sc_variant = GEM_APPLE_GMAC;
sc 241 dev/pci/if_gem_pci.c sc->sc_variant = GEM_APPLE_GMAC;
sc 243 dev/pci/if_gem_pci.c sc->sc_variant = GEM_APPLE_GMAC;
sc 245 dev/pci/if_gem_pci.c sc->sc_variant = GEM_APPLE_K2_GMAC;
sc 254 dev/pci/if_gem_pci.c sc->sc_bustag = gsc->gsc_memt;
sc 255 dev/pci/if_gem_pci.c sc->sc_h1 = gsc->gsc_memh;
sc 257 dev/pci/if_gem_pci.c if (bus_space_subregion(sc->sc_bustag, sc->sc_h1,
sc 258 dev/pci/if_gem_pci.c GEM_PCI_BANK2_OFFSET, GEM_PCI_BANK2_SIZE, &sc->sc_h2)) {
sc 264 dev/pci/if_gem_pci.c if (gem_pci_enaddr(sc, pa) == 0)
sc 270 dev/pci/if_gem_pci.c sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0)
sc 271 dev/pci/if_gem_pci.c myetheraddr(sc->sc_arpcom.ac_enaddr);
sc 277 dev/pci/if_gem_pci.c pci_ether_hw_addr(pa->pa_pc, sc->sc_arpcom.ac_enaddr);
sc 282 dev/pci/if_gem_pci.c sc->sc_burst = 16; /* XXX */
sc 291 dev/pci/if_gem_pci.c ih, IPL_NET, gem_intr, sc, self->dv_xname);
sc 306 dev/pci/if_gem_pci.c gem_config(sc);
sc 120 dev/pci/if_hme_pci.c hme_pci_enaddr(struct hme_softc *sc, struct pci_attach_args *hpa)
sc 185 dev/pci/if_hme_pci.c bcopy(buf + 6, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 186 dev/pci/if_hme_pci.c sc->sc_arpcom.ac_enaddr[5] += hpa->pa_device;
sc 203 dev/pci/if_hme_pci.c struct hme_softc *sc = &hsc->hsc_hme;
sc 224 dev/pci/if_hme_pci.c sc->sc_bustag = pa->pa_memt;
sc 228 dev/pci/if_hme_pci.c sc->sc_bustag = pa->pa_iot;
sc 233 dev/pci/if_hme_pci.c sc->sc_dmatag = pa->pa_dmat;
sc 235 dev/pci/if_hme_pci.c sc->sc_pci = 1; /* XXXXX should all be done in bus_dma. */
sc 253 dev/pci/if_hme_pci.c sc->sc_seb = hsc->hsc_memh;
sc 254 dev/pci/if_hme_pci.c bus_space_subregion(sc->sc_bustag, hsc->hsc_memh, 0x2000, 0x2000,
sc 255 dev/pci/if_hme_pci.c &sc->sc_etx);
sc 256 dev/pci/if_hme_pci.c bus_space_subregion(sc->sc_bustag, hsc->hsc_memh, 0x4000, 0x2000,
sc 257 dev/pci/if_hme_pci.c &sc->sc_erx);
sc 258 dev/pci/if_hme_pci.c bus_space_subregion(sc->sc_bustag, hsc->hsc_memh, 0x6000, 0x1000,
sc 259 dev/pci/if_hme_pci.c &sc->sc_mac);
sc 260 dev/pci/if_hme_pci.c bus_space_subregion(sc->sc_bustag, hsc->hsc_memh, 0x7000, 0x1000,
sc 261 dev/pci/if_hme_pci.c &sc->sc_mif);
sc 263 dev/pci/if_hme_pci.c if (hme_pci_enaddr(sc, pa) == 0)
sc 269 dev/pci/if_hme_pci.c sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0)
sc 270 dev/pci/if_hme_pci.c myetheraddr(sc->sc_arpcom.ac_enaddr);
sc 276 dev/pci/if_hme_pci.c pci_ether_hw_addr(pa->pa_pc, sc->sc_arpcom.ac_enaddr);
sc 281 dev/pci/if_hme_pci.c sc->sc_burst = 16; /* XXX */
sc 290 dev/pci/if_hme_pci.c hme_intr, sc, self->dv_xname);
sc 305 dev/pci/if_hme_pci.c hme_config(sc);
sc 119 dev/pci/if_ipw.c MEM_READ_1(struct ipw_softc *sc, uint32_t addr)
sc 121 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
sc 122 dev/pci/if_ipw.c return CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA);
sc 126 dev/pci/if_ipw.c MEM_READ_4(struct ipw_softc *sc, uint32_t addr)
sc 128 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, addr);
sc 129 dev/pci/if_ipw.c return CSR_READ_4(sc, IPW_CSR_INDIRECT_DATA);
sc 163 dev/pci/if_ipw.c struct ipw_softc *sc = (struct ipw_softc *)self;
sc 164 dev/pci/if_ipw.c struct ieee80211com *ic = &sc->sc_ic;
sc 176 dev/pci/if_ipw.c sc->sc_pct = pa->pa_pc;
sc 177 dev/pci/if_ipw.c sc->sc_pcitag = pa->pa_tag,
sc 180 dev/pci/if_ipw.c data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
sc 182 dev/pci/if_ipw.c pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0x40, data);
sc 186 dev/pci/if_ipw.c PCI_MAPREG_MEM_TYPE_32BIT, 0, &memt, &memh, &base, &sc->sc_sz, 0);
sc 192 dev/pci/if_ipw.c sc->sc_st = memt;
sc 193 dev/pci/if_ipw.c sc->sc_sh = memh;
sc 194 dev/pci/if_ipw.c sc->sc_dmat = pa->pa_dmat;
sc 197 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
sc 204 dev/pci/if_ipw.c intrstr = pci_intr_string(sc->sc_pct, ih);
sc 205 dev/pci/if_ipw.c sc->sc_ih = pci_intr_establish(sc->sc_pct, ih, IPL_NET, ipw_intr, sc,
sc 206 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 207 dev/pci/if_ipw.c if (sc->sc_ih == NULL) {
sc 216 dev/pci/if_ipw.c if (ipw_reset(sc) != 0) {
sc 221 dev/pci/if_ipw.c if (ipw_dma_alloc(sc) != 0) {
sc 240 dev/pci/if_ipw.c val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 0);
sc 243 dev/pci/if_ipw.c val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 1);
sc 246 dev/pci/if_ipw.c val = ipw_read_prom_word(sc, IPW_EEPROM_MAC + 2);
sc 265 dev/pci/if_ipw.c ifp->if_softc = sc;
sc 272 dev/pci/if_ipw.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 277 dev/pci/if_ipw.c sc->sc_newstate = ic->ic_newstate;
sc 281 dev/pci/if_ipw.c sc->powerhook = powerhook_establish(ipw_power, sc);
sc 284 dev/pci/if_ipw.c bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
sc 287 dev/pci/if_ipw.c sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
sc 288 dev/pci/if_ipw.c sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
sc 289 dev/pci/if_ipw.c sc->sc_rxtap.wr_ihdr.it_present = htole32(IPW_RX_RADIOTAP_PRESENT);
sc 291 dev/pci/if_ipw.c sc->sc_txtap_len = sizeof sc->sc_txtapu;
sc 292 dev/pci/if_ipw.c sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
sc 293 dev/pci/if_ipw.c sc->sc_txtap.wt_ihdr.it_present = htole32(IPW_TX_RADIOTAP_PRESENT);
sc 300 dev/pci/if_ipw.c struct ipw_softc *sc = arg;
sc 308 dev/pci/if_ipw.c data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
sc 310 dev/pci/if_ipw.c pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0x40, data);
sc 312 dev/pci/if_ipw.c ifp = &sc->sc_ic.ic_if;
sc 321 dev/pci/if_ipw.c ipw_dma_alloc(struct ipw_softc *sc)
sc 331 dev/pci/if_ipw.c error = bus_dmamap_create(sc->sc_dmat, IPW_TBD_SZ, 1, IPW_TBD_SZ, 0,
sc 332 dev/pci/if_ipw.c BUS_DMA_NOWAIT, &sc->tbd_map);
sc 335 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 339 dev/pci/if_ipw.c error = bus_dmamem_alloc(sc->sc_dmat, IPW_TBD_SZ, PAGE_SIZE, 0,
sc 340 dev/pci/if_ipw.c &sc->tbd_seg, 1, &nsegs, BUS_DMA_NOWAIT);
sc 343 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 347 dev/pci/if_ipw.c error = bus_dmamem_map(sc->sc_dmat, &sc->tbd_seg, nsegs, IPW_TBD_SZ,
sc 348 dev/pci/if_ipw.c (caddr_t *)&sc->tbd_list, BUS_DMA_NOWAIT);
sc 351 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 355 dev/pci/if_ipw.c error = bus_dmamap_load(sc->sc_dmat, sc->tbd_map, sc->tbd_list,
sc 359 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 366 dev/pci/if_ipw.c error = bus_dmamap_create(sc->sc_dmat, IPW_RBD_SZ, 1, IPW_RBD_SZ, 0,
sc 367 dev/pci/if_ipw.c BUS_DMA_NOWAIT, &sc->rbd_map);
sc 370 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 374 dev/pci/if_ipw.c error = bus_dmamem_alloc(sc->sc_dmat, IPW_RBD_SZ, PAGE_SIZE, 0,
sc 375 dev/pci/if_ipw.c &sc->rbd_seg, 1, &nsegs, BUS_DMA_NOWAIT);
sc 378 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 382 dev/pci/if_ipw.c error = bus_dmamem_map(sc->sc_dmat, &sc->rbd_seg, nsegs, IPW_RBD_SZ,
sc 383 dev/pci/if_ipw.c (caddr_t *)&sc->rbd_list, BUS_DMA_NOWAIT);
sc 386 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 390 dev/pci/if_ipw.c error = bus_dmamap_load(sc->sc_dmat, sc->rbd_map, sc->rbd_list,
sc 394 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 401 dev/pci/if_ipw.c error = bus_dmamap_create(sc->sc_dmat, IPW_STATUS_SZ, 1, IPW_STATUS_SZ,
sc 402 dev/pci/if_ipw.c 0, BUS_DMA_NOWAIT, &sc->status_map);
sc 405 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 409 dev/pci/if_ipw.c error = bus_dmamem_alloc(sc->sc_dmat, IPW_STATUS_SZ, PAGE_SIZE, 0,
sc 410 dev/pci/if_ipw.c &sc->status_seg, 1, &nsegs, BUS_DMA_NOWAIT);
sc 413 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 417 dev/pci/if_ipw.c error = bus_dmamem_map(sc->sc_dmat, &sc->status_seg, nsegs,
sc 418 dev/pci/if_ipw.c IPW_STATUS_SZ, (caddr_t *)&sc->status_list, BUS_DMA_NOWAIT);
sc 421 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 425 dev/pci/if_ipw.c error = bus_dmamap_load(sc->sc_dmat, sc->status_map, sc->status_list,
sc 429 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 436 dev/pci/if_ipw.c error = bus_dmamap_create(sc->sc_dmat, sizeof (struct ipw_cmd), 1,
sc 437 dev/pci/if_ipw.c sizeof (struct ipw_cmd), 0, BUS_DMA_NOWAIT, &sc->cmd_map);
sc 440 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 447 dev/pci/if_ipw.c SLIST_INIT(&sc->free_shdr);
sc 449 dev/pci/if_ipw.c shdr = &sc->shdr_list[i];
sc 450 dev/pci/if_ipw.c error = bus_dmamap_create(sc->sc_dmat, sizeof (struct ipw_hdr),
sc 454 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 457 dev/pci/if_ipw.c SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next);
sc 463 dev/pci/if_ipw.c SLIST_INIT(&sc->free_sbuf);
sc 465 dev/pci/if_ipw.c sbuf = &sc->tx_sbuf_list[i];
sc 466 dev/pci/if_ipw.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, IPW_MAX_NSEG,
sc 470 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 473 dev/pci/if_ipw.c SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next);
sc 480 dev/pci/if_ipw.c sbd = &sc->stbd_list[i];
sc 481 dev/pci/if_ipw.c sbd->bd = &sc->tbd_list[i];
sc 489 dev/pci/if_ipw.c sbd = &sc->srbd_list[i];
sc 490 dev/pci/if_ipw.c sbuf = &sc->rx_sbuf_list[i];
sc 491 dev/pci/if_ipw.c sbd->bd = &sc->rbd_list[i];
sc 496 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 505 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 510 dev/pci/if_ipw.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
sc 514 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 518 dev/pci/if_ipw.c error = bus_dmamap_load(sc->sc_dmat, sbuf->map,
sc 522 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 532 dev/pci/if_ipw.c bus_dmamap_sync(sc->sc_dmat, sc->rbd_map, 0, IPW_RBD_SZ,
sc 537 dev/pci/if_ipw.c fail: ipw_release(sc);
sc 542 dev/pci/if_ipw.c ipw_release(struct ipw_softc *sc)
sc 547 dev/pci/if_ipw.c if (sc->tbd_map != NULL) {
sc 548 dev/pci/if_ipw.c if (sc->tbd_list != NULL) {
sc 549 dev/pci/if_ipw.c bus_dmamap_unload(sc->sc_dmat, sc->tbd_map);
sc 550 dev/pci/if_ipw.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->tbd_list,
sc 552 dev/pci/if_ipw.c bus_dmamem_free(sc->sc_dmat, &sc->tbd_seg, 1);
sc 554 dev/pci/if_ipw.c bus_dmamap_destroy(sc->sc_dmat, sc->tbd_map);
sc 557 dev/pci/if_ipw.c if (sc->rbd_map != NULL) {
sc 558 dev/pci/if_ipw.c if (sc->rbd_list != NULL) {
sc 559 dev/pci/if_ipw.c bus_dmamap_unload(sc->sc_dmat, sc->rbd_map);
sc 560 dev/pci/if_ipw.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->rbd_list,
sc 562 dev/pci/if_ipw.c bus_dmamem_free(sc->sc_dmat, &sc->rbd_seg, 1);
sc 564 dev/pci/if_ipw.c bus_dmamap_destroy(sc->sc_dmat, sc->rbd_map);
sc 567 dev/pci/if_ipw.c if (sc->status_map != NULL) {
sc 568 dev/pci/if_ipw.c if (sc->status_list != NULL) {
sc 569 dev/pci/if_ipw.c bus_dmamap_unload(sc->sc_dmat, sc->status_map);
sc 570 dev/pci/if_ipw.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->status_list,
sc 572 dev/pci/if_ipw.c bus_dmamem_free(sc->sc_dmat, &sc->status_seg, 1);
sc 574 dev/pci/if_ipw.c bus_dmamap_destroy(sc->sc_dmat, sc->status_map);
sc 577 dev/pci/if_ipw.c if (sc->cmd_map != NULL)
sc 578 dev/pci/if_ipw.c bus_dmamap_destroy(sc->sc_dmat, sc->cmd_map);
sc 581 dev/pci/if_ipw.c bus_dmamap_destroy(sc->sc_dmat, sc->shdr_list[i].map);
sc 584 dev/pci/if_ipw.c bus_dmamap_destroy(sc->sc_dmat, sc->tx_sbuf_list[i].map);
sc 587 dev/pci/if_ipw.c sbuf = &sc->rx_sbuf_list[i];
sc 590 dev/pci/if_ipw.c bus_dmamap_unload(sc->sc_dmat, sbuf->map);
sc 593 dev/pci/if_ipw.c bus_dmamap_destroy(sc->sc_dmat, sbuf->map);
sc 617 dev/pci/if_ipw.c struct ipw_softc *sc = ifp->if_softc;
sc 618 dev/pci/if_ipw.c struct ieee80211com *ic = &sc->sc_ic;
sc 637 dev/pci/if_ipw.c val = ipw_read_table1(sc, IPW_INFO_CURRENT_TX_RATE);
sc 669 dev/pci/if_ipw.c struct ipw_softc *sc = ic->ic_softc;
sc 679 dev/pci/if_ipw.c ipw_read_table2(sc, IPW_INFO_CURRENT_BSSID, macaddr, &len);
sc 705 dev/pci/if_ipw.c ipw_read_prom_word(struct ipw_softc *sc, uint8_t addr)
sc 712 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, 0);
sc 713 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
sc 714 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
sc 715 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
sc 718 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D);
sc 719 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C);
sc 722 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D);
sc 723 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_D | IPW_EEPROM_C);
sc 724 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
sc 725 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
sc 729 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S |
sc 731 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S |
sc 735 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
sc 740 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S | IPW_EEPROM_C);
sc 741 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
sc 742 dev/pci/if_ipw.c tmp = MEM_READ_4(sc, IPW_MEM_EEPROM_CTL);
sc 746 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, 0);
sc 749 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_S);
sc 750 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, 0);
sc 751 dev/pci/if_ipw.c IPW_EEPROM_CTL(sc, IPW_EEPROM_C);
sc 757 dev/pci/if_ipw.c ipw_command_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
sc 761 dev/pci/if_ipw.c bus_dmamap_sync(sc->sc_dmat, sbuf->map, 0, sizeof (struct ipw_cmd),
sc 770 dev/pci/if_ipw.c wakeup(sc);
sc 774 dev/pci/if_ipw.c ipw_newstate_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
sc 776 dev/pci/if_ipw.c struct ieee80211com *ic = &sc->sc_ic;
sc 780 dev/pci/if_ipw.c bus_dmamap_sync(sc->sc_dmat, sbuf->map, 0, sizeof state,
sc 816 dev/pci/if_ipw.c ipw_data_intr(struct ipw_softc *sc, struct ipw_status *status,
sc 819 dev/pci/if_ipw.c struct ieee80211com *ic = &sc->sc_ic;
sc 847 dev/pci/if_ipw.c bus_dmamap_sync(sc->sc_dmat, sbuf->map, 0, letoh32(status->len),
sc 849 dev/pci/if_ipw.c bus_dmamap_unload(sc->sc_dmat, sbuf->map);
sc 851 dev/pci/if_ipw.c error = bus_dmamap_load(sc->sc_dmat, sbuf->map, mtod(mnew, void *),
sc 857 dev/pci/if_ipw.c error = bus_dmamap_load(sc->sc_dmat, sbuf->map,
sc 862 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 877 dev/pci/if_ipw.c if (sc->sc_drvbpf != NULL) {
sc 879 dev/pci/if_ipw.c struct ipw_rx_radiotap_header *tap = &sc->sc_rxtap;
sc 887 dev/pci/if_ipw.c mb.m_len = sc->sc_rxtap_len;
sc 892 dev/pci/if_ipw.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
sc 907 dev/pci/if_ipw.c ipw_notification_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
sc 913 dev/pci/if_ipw.c ipw_rx_intr(struct ipw_softc *sc)
sc 920 dev/pci/if_ipw.c r = CSR_READ_4(sc, IPW_CSR_RX_READ_INDEX);
sc 922 dev/pci/if_ipw.c for (i = (sc->rxcur + 1) % IPW_NRBD; i != r; i = (i + 1) % IPW_NRBD) {
sc 924 dev/pci/if_ipw.c bus_dmamap_sync(sc->sc_dmat, sc->rbd_map,
sc 928 dev/pci/if_ipw.c bus_dmamap_sync(sc->sc_dmat, sc->status_map,
sc 932 dev/pci/if_ipw.c status = &sc->status_list[i];
sc 933 dev/pci/if_ipw.c sbd = &sc->srbd_list[i];
sc 938 dev/pci/if_ipw.c ipw_command_intr(sc, sbuf);
sc 942 dev/pci/if_ipw.c ipw_newstate_intr(sc, sbuf);
sc 947 dev/pci/if_ipw.c ipw_data_intr(sc, status, sbd, sbuf);
sc 951 dev/pci/if_ipw.c ipw_notification_intr(sc, sbuf);
sc 956 dev/pci/if_ipw.c sc->sc_dev.dv_xname, letoh16(status->code));
sc 960 dev/pci/if_ipw.c bus_dmamap_sync(sc->sc_dmat, sc->rbd_map,
sc 966 dev/pci/if_ipw.c sc->rxcur = (r == 0) ? IPW_NRBD - 1 : r - 1;
sc 967 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_RX_WRITE_INDEX, sc->rxcur);
sc 971 dev/pci/if_ipw.c ipw_release_sbd(struct ipw_softc *sc, struct ipw_soft_bd *sbd)
sc 973 dev/pci/if_ipw.c struct ieee80211com *ic = &sc->sc_ic;
sc 979 dev/pci/if_ipw.c bus_dmamap_unload(sc->sc_dmat, sc->cmd_map);
sc 984 dev/pci/if_ipw.c bus_dmamap_unload(sc->sc_dmat, shdr->map);
sc 985 dev/pci/if_ipw.c SLIST_INSERT_HEAD(&sc->free_shdr, shdr, next);
sc 990 dev/pci/if_ipw.c bus_dmamap_unload(sc->sc_dmat, sbuf->map);
sc 991 dev/pci/if_ipw.c SLIST_INSERT_HEAD(&sc->free_sbuf, sbuf, next);
sc 999 dev/pci/if_ipw.c sc->sc_tx_timer = 0;
sc 1006 dev/pci/if_ipw.c ipw_tx_intr(struct ipw_softc *sc)
sc 1008 dev/pci/if_ipw.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1012 dev/pci/if_ipw.c r = CSR_READ_4(sc, IPW_CSR_TX_READ_INDEX);
sc 1014 dev/pci/if_ipw.c for (i = (sc->txold + 1) % IPW_NTBD; i != r; i = (i + 1) % IPW_NTBD) {
sc 1015 dev/pci/if_ipw.c sbd = &sc->stbd_list[i];
sc 1020 dev/pci/if_ipw.c ipw_release_sbd(sc, sbd);
sc 1021 dev/pci/if_ipw.c sc->txfree++;
sc 1025 dev/pci/if_ipw.c sc->txold = (r == 0) ? IPW_NTBD - 1 : r - 1;
sc 1035 dev/pci/if_ipw.c struct ipw_softc *sc = arg;
sc 1036 dev/pci/if_ipw.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1039 dev/pci/if_ipw.c if ((r = CSR_READ_4(sc, IPW_CSR_INTR)) == 0 || r == 0xffffffff)
sc 1043 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
sc 1048 dev/pci/if_ipw.c printf("%s: fatal firmware error\n", sc->sc_dev.dv_xname);
sc 1055 dev/pci/if_ipw.c wakeup(sc);
sc 1058 dev/pci/if_ipw.c ipw_rx_intr(sc);
sc 1061 dev/pci/if_ipw.c ipw_tx_intr(sc);
sc 1064 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_INTR, r);
sc 1067 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
sc 1073 dev/pci/if_ipw.c ipw_cmd(struct ipw_softc *sc, uint32_t type, void *data, uint32_t len)
sc 1078 dev/pci/if_ipw.c sbd = &sc->stbd_list[sc->txcur];
sc 1080 dev/pci/if_ipw.c error = bus_dmamap_load(sc->sc_dmat, sc->cmd_map, &sc->cmd,
sc 1084 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 1088 dev/pci/if_ipw.c sc->cmd.type = htole32(type);
sc 1089 dev/pci/if_ipw.c sc->cmd.subtype = htole32(0);
sc 1090 dev/pci/if_ipw.c sc->cmd.len = htole32(len);
sc 1091 dev/pci/if_ipw.c sc->cmd.seq = htole32(0);
sc 1093 dev/pci/if_ipw.c bcopy(data, sc->cmd.data, len);
sc 1096 dev/pci/if_ipw.c sbd->bd->physaddr = htole32(sc->cmd_map->dm_segs[0].ds_addr);
sc 1102 dev/pci/if_ipw.c bus_dmamap_sync(sc->sc_dmat, sc->cmd_map, 0, sizeof (struct ipw_cmd),
sc 1105 dev/pci/if_ipw.c bus_dmamap_sync(sc->sc_dmat, sc->tbd_map,
sc 1106 dev/pci/if_ipw.c sc->txcur * sizeof (struct ipw_bd), sizeof (struct ipw_bd),
sc 1109 dev/pci/if_ipw.c sc->txcur = (sc->txcur + 1) % IPW_NTBD;
sc 1110 dev/pci/if_ipw.c sc->txfree--;
sc 1111 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, sc->txcur);
sc 1116 dev/pci/if_ipw.c return tsleep(sc, 0, "ipwcmd", hz);
sc 1122 dev/pci/if_ipw.c struct ipw_softc *sc = ifp->if_softc;
sc 1123 dev/pci/if_ipw.c struct ieee80211com *ic = &sc->sc_ic;
sc 1143 dev/pci/if_ipw.c if (sc->sc_drvbpf != NULL) {
sc 1145 dev/pci/if_ipw.c struct ipw_tx_radiotap_header *tap = &sc->sc_txtap;
sc 1152 dev/pci/if_ipw.c mb.m_len = sc->sc_txtap_len;
sc 1157 dev/pci/if_ipw.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 1161 dev/pci/if_ipw.c shdr = SLIST_FIRST(&sc->free_shdr);
sc 1162 dev/pci/if_ipw.c sbuf = SLIST_FIRST(&sc->free_sbuf);
sc 1180 dev/pci/if_ipw.c error = bus_dmamap_load_mbuf(sc->sc_dmat, sbuf->map, m, BUS_DMA_NOWAIT);
sc 1183 dev/pci/if_ipw.c sc->sc_dev.dv_xname, error);
sc 1211 dev/pci/if_ipw.c error = bus_dmamap_load_mbuf(sc->sc_dmat, sbuf->map, m,
sc 1215 dev/pci/if_ipw.c sc->sc_dev.dv_xname, error);
sc 1221 dev/pci/if_ipw.c error = bus_dmamap_load(sc->sc_dmat, shdr->map, &shdr->hdr,
sc 1225 dev/pci/if_ipw.c sc->sc_dev.dv_xname, error);
sc 1226 dev/pci/if_ipw.c bus_dmamap_unload(sc->sc_dmat, sbuf->map);
sc 1231 dev/pci/if_ipw.c SLIST_REMOVE_HEAD(&sc->free_sbuf, next);
sc 1232 dev/pci/if_ipw.c SLIST_REMOVE_HEAD(&sc->free_shdr, next);
sc 1234 dev/pci/if_ipw.c sbd = &sc->stbd_list[sc->txcur];
sc 1248 dev/pci/if_ipw.c bus_dmamap_sync(sc->sc_dmat, sc->tbd_map,
sc 1249 dev/pci/if_ipw.c sc->txcur * sizeof (struct ipw_bd),
sc 1252 dev/pci/if_ipw.c sc->txcur = (sc->txcur + 1) % IPW_NTBD;
sc 1253 dev/pci/if_ipw.c sc->txfree--;
sc 1259 dev/pci/if_ipw.c sbd = &sc->stbd_list[sc->txcur];
sc 1276 dev/pci/if_ipw.c bus_dmamap_sync(sc->sc_dmat, sc->tbd_map,
sc 1277 dev/pci/if_ipw.c sc->txcur * sizeof (struct ipw_bd),
sc 1280 dev/pci/if_ipw.c sc->txcur = (sc->txcur + 1) % IPW_NTBD;
sc 1281 dev/pci/if_ipw.c sc->txfree--;
sc 1284 dev/pci/if_ipw.c bus_dmamap_sync(sc->sc_dmat, sbuf->map, 0, sbuf->map->dm_mapsize,
sc 1286 dev/pci/if_ipw.c bus_dmamap_sync(sc->sc_dmat, shdr->map, 0, sizeof (struct ipw_hdr),
sc 1290 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, sc->txcur);
sc 1298 dev/pci/if_ipw.c struct ipw_softc *sc = ifp->if_softc;
sc 1299 dev/pci/if_ipw.c struct ieee80211com *ic = &sc->sc_ic;
sc 1311 dev/pci/if_ipw.c if (sc->txfree < 1 + IPW_MAX_NSEG) {
sc 1338 dev/pci/if_ipw.c sc->sc_tx_timer = 5;
sc 1346 dev/pci/if_ipw.c struct ipw_softc *sc = ifp->if_softc;
sc 1350 dev/pci/if_ipw.c if (sc->sc_tx_timer > 0) {
sc 1351 dev/pci/if_ipw.c if (--sc->sc_tx_timer == 0) {
sc 1352 dev/pci/if_ipw.c printf("%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1367 dev/pci/if_ipw.c struct ipw_softc *sc = ifp->if_softc;
sc 1368 dev/pci/if_ipw.c struct ieee80211com *ic = &sc->sc_ic;
sc 1412 dev/pci/if_ipw.c (CSR_READ_4(sc, IPW_CSR_IO) & IPW_IO_RADIO_DISABLED) ?
sc 1413 dev/pci/if_ipw.c IEEE80211_TXPOWER_MIN : sc->sc_ic.ic_txpower;
sc 1432 dev/pci/if_ipw.c ipw_read_table1(struct ipw_softc *sc, uint32_t off)
sc 1434 dev/pci/if_ipw.c return MEM_READ_4(sc, MEM_READ_4(sc, sc->table1_base + off));
sc 1438 dev/pci/if_ipw.c ipw_write_table1(struct ipw_softc *sc, uint32_t off, uint32_t info)
sc 1440 dev/pci/if_ipw.c MEM_WRITE_4(sc, MEM_READ_4(sc, sc->table1_base + off), info);
sc 1444 dev/pci/if_ipw.c ipw_read_table2(struct ipw_softc *sc, uint32_t off, void *buf, uint32_t *len)
sc 1451 dev/pci/if_ipw.c addr = MEM_READ_4(sc, sc->table2_base + off);
sc 1452 dev/pci/if_ipw.c info = MEM_READ_4(sc, sc->table2_base + off + 4);
sc 1464 dev/pci/if_ipw.c ipw_read_mem_1(sc, addr, buf, total);
sc 1470 dev/pci/if_ipw.c ipw_stop_master(struct ipw_softc *sc)
sc 1475 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, 0);
sc 1477 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_STOP_MASTER);
sc 1479 dev/pci/if_ipw.c if (CSR_READ_4(sc, IPW_CSR_RST) & IPW_RST_MASTER_DISABLED)
sc 1485 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 1487 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) |
sc 1490 dev/pci/if_ipw.c sc->flags &= ~IPW_FLAG_FW_INITED;
sc 1494 dev/pci/if_ipw.c ipw_reset(struct ipw_softc *sc)
sc 1498 dev/pci/if_ipw.c ipw_stop_master(sc);
sc 1501 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
sc 1506 dev/pci/if_ipw.c if (CSR_READ_4(sc, IPW_CSR_CTL) & IPW_CTL_CLOCK_READY)
sc 1513 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_RST, CSR_READ_4(sc, IPW_CSR_RST) |
sc 1518 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
sc 1525 dev/pci/if_ipw.c ipw_load_ucode(struct ipw_softc *sc, u_char *uc, int size)
sc 1529 dev/pci/if_ipw.c MEM_WRITE_4(sc, 0x3000e0, 0x80000000);
sc 1530 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_RST, 0);
sc 1532 dev/pci/if_ipw.c MEM_WRITE_2(sc, 0x220000, 0x0703);
sc 1533 dev/pci/if_ipw.c MEM_WRITE_2(sc, 0x220000, 0x0707);
sc 1535 dev/pci/if_ipw.c MEM_WRITE_1(sc, 0x210014, 0x72);
sc 1536 dev/pci/if_ipw.c MEM_WRITE_1(sc, 0x210014, 0x72);
sc 1538 dev/pci/if_ipw.c MEM_WRITE_1(sc, 0x210000, 0x40);
sc 1539 dev/pci/if_ipw.c MEM_WRITE_1(sc, 0x210000, 0x00);
sc 1540 dev/pci/if_ipw.c MEM_WRITE_1(sc, 0x210000, 0x40);
sc 1542 dev/pci/if_ipw.c MEM_WRITE_MULTI_1(sc, 0x210010, uc, size);
sc 1544 dev/pci/if_ipw.c MEM_WRITE_1(sc, 0x210000, 0x00);
sc 1545 dev/pci/if_ipw.c MEM_WRITE_1(sc, 0x210000, 0x00);
sc 1546 dev/pci/if_ipw.c MEM_WRITE_1(sc, 0x210000, 0x80);
sc 1548 dev/pci/if_ipw.c MEM_WRITE_2(sc, 0x220000, 0x0703);
sc 1549 dev/pci/if_ipw.c MEM_WRITE_2(sc, 0x220000, 0x0707);
sc 1551 dev/pci/if_ipw.c MEM_WRITE_1(sc, 0x210014, 0x72);
sc 1552 dev/pci/if_ipw.c MEM_WRITE_1(sc, 0x210014, 0x72);
sc 1554 dev/pci/if_ipw.c MEM_WRITE_1(sc, 0x210000, 0x00);
sc 1555 dev/pci/if_ipw.c MEM_WRITE_1(sc, 0x210000, 0x80);
sc 1558 dev/pci/if_ipw.c if (MEM_READ_1(sc, 0x210000) & 1)
sc 1564 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 1568 dev/pci/if_ipw.c MEM_WRITE_4(sc, 0x3000e0, 0);
sc 1577 dev/pci/if_ipw.c ipw_load_firmware(struct ipw_softc *sc, u_char *fw, int size)
sc 1596 dev/pci/if_ipw.c ipw_write_mem_1(sc, dst, p, len);
sc 1600 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_IO, IPW_IO_GPIO1_ENABLE | IPW_IO_GPIO3_MASK |
sc 1604 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_INTR_MASK, IPW_INTR_MASK);
sc 1607 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_RST, 0);
sc 1608 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_CTL, CSR_READ_4(sc, IPW_CSR_CTL) |
sc 1612 dev/pci/if_ipw.c if ((error = tsleep(sc, 0, "ipwinit", hz)) != 0) {
sc 1614 dev/pci/if_ipw.c "complete\n", sc->sc_dev.dv_xname);
sc 1618 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_IO, CSR_READ_4(sc, IPW_CSR_IO) |
sc 1625 dev/pci/if_ipw.c ipw_read_firmware(struct ipw_softc *sc, struct ipw_firmware *fw)
sc 1633 dev/pci/if_ipw.c switch (sc->sc_ic.ic_opmode) {
sc 1680 dev/pci/if_ipw.c ipw_config(struct ipw_softc *sc)
sc 1682 dev/pci/if_ipw.c struct ieee80211com *ic = &sc->sc_ic;
sc 1708 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_MODE, &data, sizeof data);
sc 1716 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_CHANNEL, &data, sizeof data);
sc 1723 dev/pci/if_ipw.c return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0);
sc 1728 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_MAC_ADDRESS, ic->ic_myaddr,
sc 1742 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_CONFIGURATION, &config, sizeof config);
sc 1748 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_BASIC_TX_RATES, &data, sizeof data);
sc 1754 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_TX_RATES, &data, sizeof data);
sc 1760 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_POWER_MODE, &data, sizeof data);
sc 1767 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_TX_POWER_INDEX, &data,
sc 1775 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_RTS_THRESHOLD, &data, sizeof data);
sc 1781 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_FRAG_THRESHOLD, &data, sizeof data);
sc 1792 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_ESSID, ic->ic_des_essid,
sc 1799 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_MANDATORY_BSSID, NULL, 0);
sc 1806 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_DESIRED_BSSID,
sc 1816 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_SECURITY_INFORMATION, &security,
sc 1833 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY, &wepkey,
sc 1841 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_WEP_KEY_INDEX, &data,
sc 1849 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_WEP_FLAGS, &data, sizeof data);
sc 1857 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_BEACON_INTERVAL, &data,
sc 1866 dev/pci/if_ipw.c error = ipw_cmd(sc, IPW_CMD_SET_SCAN_OPTIONS, &options, sizeof options);
sc 1872 dev/pci/if_ipw.c return ipw_cmd(sc, IPW_CMD_ENABLE, NULL, 0);
sc 1878 dev/pci/if_ipw.c struct ipw_softc *sc = ifp->if_softc;
sc 1884 dev/pci/if_ipw.c if ((error = ipw_reset(sc)) != 0) {
sc 1885 dev/pci/if_ipw.c printf("%s: could not reset adapter\n", sc->sc_dev.dv_xname);
sc 1889 dev/pci/if_ipw.c if ((error = ipw_read_firmware(sc, &fw)) != NULL) {
sc 1890 dev/pci/if_ipw.c printf("%s: could not read firmware\n", sc->sc_dev.dv_xname);
sc 1894 dev/pci/if_ipw.c if ((error = ipw_load_ucode(sc, fw.ucode, fw.ucode_size)) != 0) {
sc 1895 dev/pci/if_ipw.c printf("%s: could not load microcode\n", sc->sc_dev.dv_xname);
sc 1899 dev/pci/if_ipw.c ipw_stop_master(sc);
sc 1904 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_TX_BD_BASE, sc->tbd_map->dm_segs[0].ds_addr);
sc 1905 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_TX_BD_SIZE, IPW_NTBD);
sc 1906 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_TX_READ_INDEX, 0);
sc 1907 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_TX_WRITE_INDEX, 0);
sc 1908 dev/pci/if_ipw.c sc->txold = IPW_NTBD - 1; /* latest bd index ack by firmware */
sc 1909 dev/pci/if_ipw.c sc->txcur = 0; /* bd index to write to */
sc 1910 dev/pci/if_ipw.c sc->txfree = IPW_NTBD - 2;
sc 1912 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_RX_BD_BASE, sc->rbd_map->dm_segs[0].ds_addr);
sc 1913 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_RX_BD_SIZE, IPW_NRBD);
sc 1914 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_RX_READ_INDEX, 0);
sc 1915 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_RX_WRITE_INDEX, IPW_NRBD - 1);
sc 1916 dev/pci/if_ipw.c sc->rxcur = IPW_NRBD - 1; /* latest bd index I've read */
sc 1918 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_RX_STATUS_BASE,
sc 1919 dev/pci/if_ipw.c sc->status_map->dm_segs[0].ds_addr);
sc 1921 dev/pci/if_ipw.c if ((error = ipw_load_firmware(sc, fw.main, fw.main_size)) != 0) {
sc 1922 dev/pci/if_ipw.c printf("%s: could not load firmware\n", sc->sc_dev.dv_xname);
sc 1926 dev/pci/if_ipw.c sc->flags |= IPW_FLAG_FW_INITED;
sc 1929 dev/pci/if_ipw.c sc->table1_base = CSR_READ_4(sc, IPW_CSR_TABLE1_BASE);
sc 1930 dev/pci/if_ipw.c sc->table2_base = CSR_READ_4(sc, IPW_CSR_TABLE2_BASE);
sc 1932 dev/pci/if_ipw.c ipw_write_table1(sc, IPW_INFO_LOCK, 0);
sc 1934 dev/pci/if_ipw.c if ((error = ipw_config(sc)) != 0) {
sc 1936 dev/pci/if_ipw.c sc->sc_dev.dv_xname);
sc 1954 dev/pci/if_ipw.c struct ipw_softc *sc = ifp->if_softc;
sc 1955 dev/pci/if_ipw.c struct ieee80211com *ic = &sc->sc_ic;
sc 1958 dev/pci/if_ipw.c ipw_stop_master(sc);
sc 1959 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_RST, IPW_RST_SW_RESET);
sc 1968 dev/pci/if_ipw.c ipw_release_sbd(sc, &sc->stbd_list[i]);
sc 1974 dev/pci/if_ipw.c ipw_read_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap,
sc 1978 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
sc 1979 dev/pci/if_ipw.c *datap = CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3));
sc 1984 dev/pci/if_ipw.c ipw_write_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap,
sc 1988 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
sc 1989 dev/pci/if_ipw.c CSR_WRITE_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3), *datap);
sc 276 dev/pci/if_ipwreg.h #define CSR_READ_1(sc, reg) \
sc 277 dev/pci/if_ipwreg.h bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
sc 279 dev/pci/if_ipwreg.h #define CSR_READ_2(sc, reg) \
sc 280 dev/pci/if_ipwreg.h bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
sc 282 dev/pci/if_ipwreg.h #define CSR_READ_4(sc, reg) \
sc 283 dev/pci/if_ipwreg.h bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
sc 285 dev/pci/if_ipwreg.h #define CSR_WRITE_1(sc, reg, val) \
sc 286 dev/pci/if_ipwreg.h bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sc 288 dev/pci/if_ipwreg.h #define CSR_WRITE_2(sc, reg, val) \
sc 289 dev/pci/if_ipwreg.h bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sc 291 dev/pci/if_ipwreg.h #define CSR_WRITE_4(sc, reg, val) \
sc 292 dev/pci/if_ipwreg.h bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sc 294 dev/pci/if_ipwreg.h #define CSR_WRITE_MULTI_1(sc, reg, buf, len) \
sc 295 dev/pci/if_ipwreg.h bus_space_write_multi_1((sc)->sc_st, (sc)->sc_sh, (reg), \
sc 301 dev/pci/if_ipwreg.h #define MEM_WRITE_1(sc, addr, val) do { \
sc 302 dev/pci/if_ipwreg.h CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
sc 303 dev/pci/if_ipwreg.h CSR_WRITE_1((sc), IPW_CSR_INDIRECT_DATA, (val)); \
sc 306 dev/pci/if_ipwreg.h #define MEM_WRITE_2(sc, addr, val) do { \
sc 307 dev/pci/if_ipwreg.h CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
sc 308 dev/pci/if_ipwreg.h CSR_WRITE_2((sc), IPW_CSR_INDIRECT_DATA, (val)); \
sc 311 dev/pci/if_ipwreg.h #define MEM_WRITE_4(sc, addr, val) do { \
sc 312 dev/pci/if_ipwreg.h CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
sc 313 dev/pci/if_ipwreg.h CSR_WRITE_4((sc), IPW_CSR_INDIRECT_DATA, (val)); \
sc 316 dev/pci/if_ipwreg.h #define MEM_WRITE_MULTI_1(sc, addr, buf, len) do { \
sc 317 dev/pci/if_ipwreg.h CSR_WRITE_4((sc), IPW_CSR_INDIRECT_ADDR, (addr)); \
sc 318 dev/pci/if_ipwreg.h CSR_WRITE_MULTI_1((sc), IPW_CSR_INDIRECT_DATA, (buf), (len)); \
sc 324 dev/pci/if_ipwreg.h #define IPW_EEPROM_CTL(sc, val) do { \
sc 325 dev/pci/if_ipwreg.h MEM_WRITE_4((sc), IPW_MEM_EEPROM_CTL, (val)); \
sc 130 dev/pci/if_iwi.c MEM_READ_1(struct iwi_softc *sc, uint32_t addr)
sc 132 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_INDIRECT_ADDR, addr);
sc 133 dev/pci/if_iwi.c return CSR_READ_1(sc, IWI_CSR_INDIRECT_DATA);
sc 137 dev/pci/if_iwi.c MEM_READ_4(struct iwi_softc *sc, uint32_t addr)
sc 139 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_INDIRECT_ADDR, addr);
sc 140 dev/pci/if_iwi.c return CSR_READ_4(sc, IWI_CSR_INDIRECT_DATA);
sc 169 dev/pci/if_iwi.c struct iwi_softc *sc = (struct iwi_softc *)self;
sc 170 dev/pci/if_iwi.c struct ieee80211com *ic = &sc->sc_ic;
sc 181 dev/pci/if_iwi.c sc->sc_pct = pa->pa_pc;
sc 182 dev/pci/if_iwi.c sc->sc_pcitag = pa->pa_tag;
sc 185 dev/pci/if_iwi.c data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
sc 187 dev/pci/if_iwi.c pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0x40, data);
sc 191 dev/pci/if_iwi.c PCI_MAPREG_MEM_TYPE_32BIT, 0, &memt, &memh, NULL, &sc->sc_sz, 0);
sc 197 dev/pci/if_iwi.c sc->sc_st = memt;
sc 198 dev/pci/if_iwi.c sc->sc_sh = memh;
sc 199 dev/pci/if_iwi.c sc->sc_dmat = pa->pa_dmat;
sc 206 dev/pci/if_iwi.c intrstr = pci_intr_string(sc->sc_pct, ih);
sc 207 dev/pci/if_iwi.c sc->sc_ih = pci_intr_establish(sc->sc_pct, ih, IPL_NET, iwi_intr, sc,
sc 208 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 209 dev/pci/if_iwi.c if (sc->sc_ih == NULL) {
sc 218 dev/pci/if_iwi.c if (iwi_reset(sc) != 0) {
sc 226 dev/pci/if_iwi.c error = iwi_alloc_cmd_ring(sc, &sc->cmdq);
sc 232 dev/pci/if_iwi.c error = iwi_alloc_tx_ring(sc, &sc->txq[0], IWI_CSR_TX1_RIDX,
sc 239 dev/pci/if_iwi.c error = iwi_alloc_tx_ring(sc, &sc->txq[1], IWI_CSR_TX2_RIDX,
sc 246 dev/pci/if_iwi.c error = iwi_alloc_tx_ring(sc, &sc->txq[2], IWI_CSR_TX3_RIDX,
sc 253 dev/pci/if_iwi.c error = iwi_alloc_tx_ring(sc, &sc->txq[3], IWI_CSR_TX4_RIDX,
sc 260 dev/pci/if_iwi.c error = iwi_alloc_rx_ring(sc, &sc->rxq);
sc 281 dev/pci/if_iwi.c val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 0);
sc 284 dev/pci/if_iwi.c val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 1);
sc 287 dev/pci/if_iwi.c val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 2);
sc 326 dev/pci/if_iwi.c ifp->if_softc = sc;
sc 333 dev/pci/if_iwi.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 338 dev/pci/if_iwi.c sc->sc_newstate = ic->ic_newstate;
sc 342 dev/pci/if_iwi.c sc->powerhook = powerhook_establish(iwi_power, sc);
sc 345 dev/pci/if_iwi.c bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
sc 348 dev/pci/if_iwi.c sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
sc 349 dev/pci/if_iwi.c sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
sc 350 dev/pci/if_iwi.c sc->sc_rxtap.wr_ihdr.it_present = htole32(IWI_RX_RADIOTAP_PRESENT);
sc 352 dev/pci/if_iwi.c sc->sc_txtap_len = sizeof sc->sc_txtapu;
sc 353 dev/pci/if_iwi.c sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
sc 354 dev/pci/if_iwi.c sc->sc_txtap.wt_ihdr.it_present = htole32(IWI_TX_RADIOTAP_PRESENT);
sc 359 dev/pci/if_iwi.c fail5: iwi_free_tx_ring(sc, &sc->txq[3]);
sc 360 dev/pci/if_iwi.c fail4: iwi_free_tx_ring(sc, &sc->txq[2]);
sc 361 dev/pci/if_iwi.c fail3: iwi_free_tx_ring(sc, &sc->txq[1]);
sc 362 dev/pci/if_iwi.c fail2: iwi_free_tx_ring(sc, &sc->txq[0]);
sc 363 dev/pci/if_iwi.c fail1: iwi_free_cmd_ring(sc, &sc->cmdq);
sc 369 dev/pci/if_iwi.c struct iwi_softc *sc = arg;
sc 377 dev/pci/if_iwi.c data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
sc 379 dev/pci/if_iwi.c pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0x40, data);
sc 381 dev/pci/if_iwi.c ifp = &sc->sc_ic.ic_if;
sc 390 dev/pci/if_iwi.c iwi_alloc_cmd_ring(struct iwi_softc *sc, struct iwi_cmd_ring *ring)
sc 397 dev/pci/if_iwi.c error = bus_dmamap_create(sc->sc_dmat,
sc 403 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 407 dev/pci/if_iwi.c error = bus_dmamem_alloc(sc->sc_dmat,
sc 412 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 416 dev/pci/if_iwi.c error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
sc 421 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 425 dev/pci/if_iwi.c error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
sc 430 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 437 dev/pci/if_iwi.c fail: iwi_free_cmd_ring(sc, ring);
sc 442 dev/pci/if_iwi.c iwi_reset_cmd_ring(struct iwi_softc *sc, struct iwi_cmd_ring *ring)
sc 449 dev/pci/if_iwi.c iwi_free_cmd_ring(struct iwi_softc *sc, struct iwi_cmd_ring *ring)
sc 453 dev/pci/if_iwi.c bus_dmamap_unload(sc->sc_dmat, ring->map);
sc 454 dev/pci/if_iwi.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,
sc 456 dev/pci/if_iwi.c bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
sc 458 dev/pci/if_iwi.c bus_dmamap_destroy(sc->sc_dmat, ring->map);
sc 463 dev/pci/if_iwi.c iwi_alloc_tx_ring(struct iwi_softc *sc, struct iwi_tx_ring *ring,
sc 474 dev/pci/if_iwi.c error = bus_dmamap_create(sc->sc_dmat,
sc 480 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 484 dev/pci/if_iwi.c error = bus_dmamem_alloc(sc->sc_dmat,
sc 489 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 493 dev/pci/if_iwi.c error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
sc 498 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 502 dev/pci/if_iwi.c error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
sc 507 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 516 dev/pci/if_iwi.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 520 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 527 dev/pci/if_iwi.c fail: iwi_free_tx_ring(sc, ring);
sc 532 dev/pci/if_iwi.c iwi_reset_tx_ring(struct iwi_softc *sc, struct iwi_tx_ring *ring)
sc 541 dev/pci/if_iwi.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 552 dev/pci/if_iwi.c iwi_free_tx_ring(struct iwi_softc *sc, struct iwi_tx_ring *ring)
sc 559 dev/pci/if_iwi.c bus_dmamap_unload(sc->sc_dmat, ring->map);
sc 560 dev/pci/if_iwi.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,
sc 562 dev/pci/if_iwi.c bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
sc 564 dev/pci/if_iwi.c bus_dmamap_destroy(sc->sc_dmat, ring->map);
sc 571 dev/pci/if_iwi.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 574 dev/pci/if_iwi.c bus_dmamap_destroy(sc->sc_dmat, data->map);
sc 579 dev/pci/if_iwi.c iwi_alloc_rx_ring(struct iwi_softc *sc, struct iwi_rx_ring *ring)
sc 587 dev/pci/if_iwi.c data = &sc->rxq.data[i];
sc 589 dev/pci/if_iwi.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
sc 593 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 600 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 610 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 615 dev/pci/if_iwi.c error = bus_dmamap_load(sc->sc_dmat, data->map,
sc 619 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 628 dev/pci/if_iwi.c fail: iwi_free_rx_ring(sc, ring);
sc 633 dev/pci/if_iwi.c iwi_reset_rx_ring(struct iwi_softc *sc, struct iwi_rx_ring *ring)
sc 639 dev/pci/if_iwi.c iwi_free_rx_ring(struct iwi_softc *sc, struct iwi_rx_ring *ring)
sc 645 dev/pci/if_iwi.c data = &sc->rxq.data[i];
sc 648 dev/pci/if_iwi.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 651 dev/pci/if_iwi.c bus_dmamap_destroy(sc->sc_dmat, data->map);
sc 673 dev/pci/if_iwi.c struct iwi_softc *sc = ifp->if_softc;
sc 674 dev/pci/if_iwi.c struct ieee80211com *ic = &sc->sc_ic;
sc 684 dev/pci/if_iwi.c val = CSR_READ_4(sc, IWI_CSR_CURRENT_TX_RATE);
sc 710 dev/pci/if_iwi.c iwi_find_txnode(struct iwi_softc *sc, const uint8_t *macaddr)
sc 715 dev/pci/if_iwi.c for (i = 0; i < sc->nsta; i++)
sc 716 dev/pci/if_iwi.c if (IEEE80211_ADDR_EQ(sc->sta[i], macaddr))
sc 723 dev/pci/if_iwi.c IEEE80211_ADDR_COPY(sc->sta[i], macaddr);
sc 724 dev/pci/if_iwi.c sc->nsta = i;
sc 730 dev/pci/if_iwi.c CSR_WRITE_REGION_1(sc, IWI_CSR_NODE_BASE + i * sizeof node,
sc 739 dev/pci/if_iwi.c struct iwi_softc *sc = ic->ic_softc;
sc 747 dev/pci/if_iwi.c iwi_scan(sc);
sc 751 dev/pci/if_iwi.c iwi_auth_and_assoc(sc);
sc 756 dev/pci/if_iwi.c sc->nsta = 0; /* flush IBSS nodes */
sc 759 dev/pci/if_iwi.c iwi_set_chan(sc, ic->ic_ibss_chan);
sc 762 dev/pci/if_iwi.c tmp = MEM_READ_4(sc, IWI_MEM_EVENT_CTL) & IWI_LED_MASK;
sc 763 dev/pci/if_iwi.c MEM_WRITE_4(sc, IWI_MEM_EVENT_CTL, tmp | IWI_LED_ASSOC);
sc 771 dev/pci/if_iwi.c tmp = MEM_READ_4(sc, IWI_MEM_EVENT_CTL) & IWI_LED_MASK;
sc 772 dev/pci/if_iwi.c MEM_WRITE_4(sc, IWI_MEM_EVENT_CTL, tmp & ~IWI_LED_ASSOC);
sc 788 dev/pci/if_iwi.c iwi_read_prom_word(struct iwi_softc *sc, uint8_t addr)
sc 795 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, 0);
sc 796 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S);
sc 797 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S | IWI_EEPROM_C);
sc 798 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S);
sc 801 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S | IWI_EEPROM_D);
sc 802 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S | IWI_EEPROM_D | IWI_EEPROM_C);
sc 805 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S | IWI_EEPROM_D);
sc 806 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S | IWI_EEPROM_D | IWI_EEPROM_C);
sc 807 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S);
sc 808 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S | IWI_EEPROM_C);
sc 812 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S |
sc 814 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S |
sc 818 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S);
sc 823 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S | IWI_EEPROM_C);
sc 824 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S);
sc 825 dev/pci/if_iwi.c tmp = MEM_READ_4(sc, IWI_MEM_EEPROM_CTL);
sc 829 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, 0);
sc 832 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_S);
sc 833 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, 0);
sc 834 dev/pci/if_iwi.c IWI_EEPROM_CTL(sc, IWI_EEPROM_C);
sc 865 dev/pci/if_iwi.c iwi_frame_intr(struct iwi_softc *sc, struct iwi_rx_data *data,
sc 868 dev/pci/if_iwi.c struct ieee80211com *ic = &sc->sc_ic;
sc 880 dev/pci/if_iwi.c DPRINTF(("%s: bad frame length\n", sc->sc_dev.dv_xname));
sc 904 dev/pci/if_iwi.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 906 dev/pci/if_iwi.c error = bus_dmamap_load(sc->sc_dmat, data->map, mtod(mnew, void *),
sc 912 dev/pci/if_iwi.c error = bus_dmamap_load(sc->sc_dmat, data->map,
sc 917 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 925 dev/pci/if_iwi.c CSR_WRITE_4(sc, data->reg, data->map->dm_segs[0].ds_addr);
sc 951 dev/pci/if_iwi.c if (sc->sc_drvbpf != NULL) {
sc 953 dev/pci/if_iwi.c struct iwi_rx_radiotap_header *tap = &sc->sc_rxtap;
sc 967 dev/pci/if_iwi.c mb.m_len = sc->sc_rxtap_len;
sc 972 dev/pci/if_iwi.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
sc 986 dev/pci/if_iwi.c iwi_notification_intr(struct iwi_softc *sc, struct iwi_rx_data *data,
sc 989 dev/pci/if_iwi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1015 dev/pci/if_iwi.c iwi_set_chan(sc, ic->ic_ibss_chan);
sc 1035 dev/pci/if_iwi.c sc->sc_dev.dv_xname, auth->state);
sc 1062 dev/pci/if_iwi.c sc->sc_dev.dv_xname, assoc->state);
sc 1074 dev/pci/if_iwi.c sc->sc_dev.dv_xname, letoh32(beacon->count)));
sc 1093 dev/pci/if_iwi.c iwi_rx_intr(struct iwi_softc *sc)
sc 1099 dev/pci/if_iwi.c hw = CSR_READ_4(sc, IWI_CSR_RX_RIDX);
sc 1101 dev/pci/if_iwi.c for (; sc->rxq.cur != hw;) {
sc 1102 dev/pci/if_iwi.c data = &sc->rxq.data[sc->rxq.cur];
sc 1104 dev/pci/if_iwi.c bus_dmamap_sync(sc->sc_dmat, data->map, 0, MCLBYTES,
sc 1111 dev/pci/if_iwi.c iwi_frame_intr(sc, data,
sc 1116 dev/pci/if_iwi.c iwi_notification_intr(sc, data,
sc 1122 dev/pci/if_iwi.c sc->sc_dev.dv_xname, hdr->type);
sc 1125 dev/pci/if_iwi.c sc->rxq.cur = (sc->rxq.cur + 1) % IWI_RX_RING_COUNT;
sc 1130 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_RX_WIDX, hw);
sc 1134 dev/pci/if_iwi.c iwi_tx_intr(struct iwi_softc *sc, struct iwi_tx_ring *txq)
sc 1136 dev/pci/if_iwi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1141 dev/pci/if_iwi.c hw = CSR_READ_4(sc, txq->csr_ridx);
sc 1146 dev/pci/if_iwi.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 1158 dev/pci/if_iwi.c sc->sc_tx_timer = 0;
sc 1166 dev/pci/if_iwi.c struct iwi_softc *sc = arg;
sc 1167 dev/pci/if_iwi.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1170 dev/pci/if_iwi.c if ((r = CSR_READ_4(sc, IWI_CSR_INTR)) == 0 || r == 0xffffffff)
sc 1174 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, 0);
sc 1177 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_INTR, r);
sc 1180 dev/pci/if_iwi.c printf("%s: fatal firmware error\n", sc->sc_dev.dv_xname);
sc 1187 dev/pci/if_iwi.c wakeup(sc);
sc 1198 dev/pci/if_iwi.c sc->cmdq.next = (sc->cmdq.next + 1) % IWI_CMD_RING_COUNT;
sc 1199 dev/pci/if_iwi.c if (--sc->cmdq.queued > 0)
sc 1200 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_CMD_WIDX, sc->cmdq.next);
sc 1202 dev/pci/if_iwi.c wakeup(sc);
sc 1206 dev/pci/if_iwi.c iwi_tx_intr(sc, &sc->txq[0]);
sc 1209 dev/pci/if_iwi.c iwi_tx_intr(sc, &sc->txq[1]);
sc 1212 dev/pci/if_iwi.c iwi_tx_intr(sc, &sc->txq[2]);
sc 1215 dev/pci/if_iwi.c iwi_tx_intr(sc, &sc->txq[3]);
sc 1218 dev/pci/if_iwi.c iwi_rx_intr(sc);
sc 1221 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, IWI_INTR_MASK);
sc 1227 dev/pci/if_iwi.c iwi_cmd(struct iwi_softc *sc, uint8_t type, void *data, uint8_t len, int async)
sc 1231 dev/pci/if_iwi.c desc = &sc->cmdq.desc[sc->cmdq.cur];
sc 1238 dev/pci/if_iwi.c bus_dmamap_sync(sc->sc_dmat, sc->cmdq.map,
sc 1239 dev/pci/if_iwi.c sc->cmdq.cur * sizeof (struct iwi_cmd_desc),
sc 1242 dev/pci/if_iwi.c DPRINTFN(2, ("sending command idx=%u type=%u len=%u\n", sc->cmdq.cur,
sc 1245 dev/pci/if_iwi.c sc->cmdq.cur = (sc->cmdq.cur + 1) % IWI_CMD_RING_COUNT;
sc 1248 dev/pci/if_iwi.c if (++sc->cmdq.queued == 1) {
sc 1249 dev/pci/if_iwi.c sc->cmdq.next = sc->cmdq.cur;
sc 1250 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_CMD_WIDX, sc->cmdq.next);
sc 1253 dev/pci/if_iwi.c return async ? 0 : tsleep(sc, 0, "iwicmd", hz);
sc 1259 dev/pci/if_iwi.c struct iwi_softc *sc = ifp->if_softc;
sc 1260 dev/pci/if_iwi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1263 dev/pci/if_iwi.c struct iwi_tx_ring *txq = &sc->txq[0];
sc 1268 dev/pci/if_iwi.c if (sc->sc_drvbpf != NULL) {
sc 1270 dev/pci/if_iwi.c struct iwi_tx_radiotap_header *tap = &sc->sc_txtap;
sc 1277 dev/pci/if_iwi.c mb.m_len = sc->sc_txtap_len;
sc 1282 dev/pci/if_iwi.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 1294 dev/pci/if_iwi.c station = iwi_find_txnode(sc, desc->wh.i_addr1);
sc 1303 dev/pci/if_iwi.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
sc 1307 dev/pci/if_iwi.c sc->sc_dev.dv_xname, error);
sc 1335 dev/pci/if_iwi.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
sc 1339 dev/pci/if_iwi.c sc->sc_dev.dv_xname, error);
sc 1380 dev/pci/if_iwi.c bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
sc 1382 dev/pci/if_iwi.c bus_dmamap_sync(sc->sc_dmat, txq->map,
sc 1391 dev/pci/if_iwi.c CSR_WRITE_4(sc, txq->csr_widx, txq->cur);
sc 1399 dev/pci/if_iwi.c struct iwi_softc *sc = ifp->if_softc;
sc 1400 dev/pci/if_iwi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1412 dev/pci/if_iwi.c if (sc->txq[0].queued >= IWI_TX_RING_COUNT - 8) {
sc 1439 dev/pci/if_iwi.c sc->sc_tx_timer = 5;
sc 1447 dev/pci/if_iwi.c struct iwi_softc *sc = ifp->if_softc;
sc 1451 dev/pci/if_iwi.c if (sc->sc_tx_timer > 0) {
sc 1452 dev/pci/if_iwi.c if (--sc->sc_tx_timer == 0) {
sc 1453 dev/pci/if_iwi.c printf("%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1468 dev/pci/if_iwi.c struct iwi_softc *sc = ifp->if_softc;
sc 1469 dev/pci/if_iwi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1513 dev/pci/if_iwi.c (CSR_READ_4(sc, IWI_CSR_IO) & IWI_IO_RADIO_ENABLED) ?
sc 1514 dev/pci/if_iwi.c sc->sc_ic.ic_txpower : IEEE80211_TXPOWER_MIN;
sc 1533 dev/pci/if_iwi.c iwi_stop_master(struct iwi_softc *sc)
sc 1538 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, 0);
sc 1540 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_RST, IWI_RST_STOP_MASTER);
sc 1542 dev/pci/if_iwi.c if (CSR_READ_4(sc, IWI_CSR_RST) & IWI_RST_MASTER_DISABLED)
sc 1548 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 1551 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) |
sc 1554 dev/pci/if_iwi.c sc->flags &= ~IWI_FLAG_FW_INITED;
sc 1558 dev/pci/if_iwi.c iwi_reset(struct iwi_softc *sc)
sc 1562 dev/pci/if_iwi.c iwi_stop_master(sc);
sc 1565 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_CTL, CSR_READ_4(sc, IWI_CSR_CTL) |
sc 1568 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_READ_INT, IWI_READ_INT_INIT_HOST);
sc 1572 dev/pci/if_iwi.c if (CSR_READ_4(sc, IWI_CSR_CTL) & IWI_CTL_CLOCK_READY)
sc 1578 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 1582 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) |
sc 1587 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_CTL, CSR_READ_4(sc, IWI_CSR_CTL) |
sc 1591 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_AUTOINC_ADDR, 0);
sc 1593 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, 0);
sc 1599 dev/pci/if_iwi.c iwi_load_ucode(struct iwi_softc *sc, const char *data, int size)
sc 1604 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) |
sc 1607 dev/pci/if_iwi.c if (CSR_READ_4(sc, IWI_CSR_RST) & IWI_RST_MASTER_DISABLED)
sc 1613 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 1617 dev/pci/if_iwi.c MEM_WRITE_4(sc, 0x3000e0, 0x80000000);
sc 1620 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) &
sc 1624 dev/pci/if_iwi.c MEM_WRITE_4(sc, 0x3000e0, 0);
sc 1626 dev/pci/if_iwi.c MEM_WRITE_4(sc, IWI_MEM_EVENT_CTL, 1);
sc 1628 dev/pci/if_iwi.c MEM_WRITE_4(sc, IWI_MEM_EVENT_CTL, 0);
sc 1630 dev/pci/if_iwi.c MEM_WRITE_1(sc, 0x200000, 0x00);
sc 1631 dev/pci/if_iwi.c MEM_WRITE_1(sc, 0x200000, 0x40);
sc 1636 dev/pci/if_iwi.c MEM_WRITE_2(sc, 0x200010, htole16(*w));
sc 1638 dev/pci/if_iwi.c MEM_WRITE_1(sc, 0x200000, 0x00);
sc 1639 dev/pci/if_iwi.c MEM_WRITE_1(sc, 0x200000, 0x80);
sc 1643 dev/pci/if_iwi.c if (MEM_READ_1(sc, 0x200000) & 1)
sc 1649 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 1655 dev/pci/if_iwi.c MEM_READ_4(sc, 0x200004);
sc 1657 dev/pci/if_iwi.c MEM_WRITE_1(sc, 0x200000, 0x00);
sc 1666 dev/pci/if_iwi.c iwi_load_firmware(struct iwi_softc *sc, const char *data, int size)
sc 1676 dev/pci/if_iwi.c error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 1680 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 1684 dev/pci/if_iwi.c error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1,
sc 1688 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 1692 dev/pci/if_iwi.c error = bus_dmamem_map(sc->sc_dmat, &seg, nsegs, size, &virtaddr,
sc 1696 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 1700 dev/pci/if_iwi.c error = bus_dmamap_load(sc->sc_dmat, map, virtaddr, size, NULL,
sc 1704 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 1712 dev/pci/if_iwi.c bus_dmamap_sync(sc->sc_dmat, map, 0, size, BUS_DMASYNC_PREWRITE);
sc 1715 dev/pci/if_iwi.c MEM_WRITE_4(sc, 0x3000a0, 0x27000);
sc 1725 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_AUTOINC_ADDR, 0x27000);
sc 1739 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, ctl);
sc 1740 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, src);
sc 1741 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, dst);
sc 1742 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, sum);
sc 1751 dev/pci/if_iwi.c sentinel = CSR_READ_4(sc, IWI_CSR_AUTOINC_ADDR);
sc 1752 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, 0);
sc 1754 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) &
sc 1758 dev/pci/if_iwi.c MEM_WRITE_4(sc, 0x3000a4, 0x540100);
sc 1762 dev/pci/if_iwi.c if (MEM_READ_4(sc, 0x3000d0) >= sentinel)
sc 1767 dev/pci/if_iwi.c printf("%s: timeout processing cb\n", sc->sc_dev.dv_xname);
sc 1773 dev/pci/if_iwi.c MEM_WRITE_4(sc, 0x3000a4, 0x540c00);
sc 1776 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, IWI_INTR_MASK);
sc 1779 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_RST, 0);
sc 1781 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_CTL, CSR_READ_4(sc, IWI_CSR_CTL) |
sc 1785 dev/pci/if_iwi.c if ((error = tsleep(sc, 0, "iwiinit", hz)) != 0) {
sc 1787 dev/pci/if_iwi.c "complete\n", sc->sc_dev.dv_xname);
sc 1791 dev/pci/if_iwi.c fail5: bus_dmamap_sync(sc->sc_dmat, map, 0, size, BUS_DMASYNC_POSTWRITE);
sc 1792 dev/pci/if_iwi.c bus_dmamap_unload(sc->sc_dmat, map);
sc 1793 dev/pci/if_iwi.c fail4: bus_dmamem_unmap(sc->sc_dmat, virtaddr, size);
sc 1794 dev/pci/if_iwi.c fail3: bus_dmamem_free(sc->sc_dmat, &seg, 1);
sc 1795 dev/pci/if_iwi.c fail2: bus_dmamap_destroy(sc->sc_dmat, map);
sc 1800 dev/pci/if_iwi.c iwi_config(struct iwi_softc *sc)
sc 1802 dev/pci/if_iwi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1814 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_MAC_ADDRESS, ic->ic_myaddr,
sc 1825 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_CONFIG, &config, sizeof config, 0);
sc 1831 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_POWER_MODE, &data, sizeof data, 0);
sc 1837 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_RTS_THRESHOLD, &data, sizeof data, 0);
sc 1843 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_FRAG_THRESHOLD, &data, sizeof data, 0);
sc 1862 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_TX_POWER, &power, sizeof power, 0);
sc 1868 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_TX_POWER, &power, sizeof power, 0);
sc 1885 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_TX_POWER, &power, sizeof power,
sc 1897 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_RATES, &rs, sizeof rs, 0);
sc 1907 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_RATES, &rs, sizeof rs, 0);
sc 1921 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_ESSID, ic->ic_des_essid,
sc 1929 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_IV, &data, sizeof data, 0);
sc 1943 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_WEP_KEY, &wepkey,
sc 1952 dev/pci/if_iwi.c return iwi_cmd(sc, IWI_CMD_ENABLE, NULL, 0, 0);
sc 1956 dev/pci/if_iwi.c iwi_set_chan(struct iwi_softc *sc, struct ieee80211_channel *chan)
sc 1958 dev/pci/if_iwi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1969 dev/pci/if_iwi.c return iwi_cmd(sc, IWI_CMD_SCAN, &scan, sizeof scan, 1);
sc 1973 dev/pci/if_iwi.c iwi_scan(struct iwi_softc *sc)
sc 1975 dev/pci/if_iwi.c struct ieee80211com *ic = &sc->sc_ic;
sc 2011 dev/pci/if_iwi.c return iwi_cmd(sc, IWI_CMD_SCAN, &scan, sizeof scan, 1);
sc 2015 dev/pci/if_iwi.c iwi_auth_and_assoc(struct iwi_softc *sc)
sc 2017 dev/pci/if_iwi.c struct ieee80211com *ic = &sc->sc_ic;
sc 2035 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_CONFIG, &config, sizeof config, 1);
sc 2046 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_ESSID, ni->ni_essid, ni->ni_esslen, 1);
sc 2059 dev/pci/if_iwi.c sc->sc_dev.dv_xname, ni->ni_rates.rs_nrates,
sc 2067 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_RATES, &rs, sizeof rs, 1);
sc 2073 dev/pci/if_iwi.c error = iwi_cmd(sc, IWI_CMD_SET_SENSITIVITY, &data, sizeof data, 1);
sc 2116 dev/pci/if_iwi.c return iwi_cmd(sc, IWI_CMD_ASSOCIATE, &assoc, sizeof assoc, 1);
sc 2122 dev/pci/if_iwi.c struct iwi_softc *sc = ifp->if_softc;
sc 2123 dev/pci/if_iwi.c struct ieee80211com *ic = &sc->sc_ic;
sc 2132 dev/pci/if_iwi.c if ((error = iwi_reset(sc)) != 0) {
sc 2133 dev/pci/if_iwi.c printf("%s: could not reset adapter\n", sc->sc_dev.dv_xname);
sc 2137 dev/pci/if_iwi.c switch (sc->sc_ic.ic_opmode) {
sc 2155 dev/pci/if_iwi.c sc->sc_dev.dv_xname, name);
sc 2161 dev/pci/if_iwi.c sc->sc_dev.dv_xname, size);
sc 2171 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 2179 dev/pci/if_iwi.c sc->sc_dev.dv_xname, size);
sc 2185 dev/pci/if_iwi.c if ((error = iwi_load_firmware(sc, fw, letoh32(hdr->bootsz))) != 0) {
sc 2187 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 2193 dev/pci/if_iwi.c if ((error = iwi_load_ucode(sc, fw, letoh32(hdr->ucodesz))) != 0) {
sc 2194 dev/pci/if_iwi.c printf("%s: could not load microcode\n", sc->sc_dev.dv_xname);
sc 2198 dev/pci/if_iwi.c iwi_stop_master(sc);
sc 2200 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_CMD_BASE, sc->cmdq.map->dm_segs[0].ds_addr);
sc 2201 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_CMD_SIZE, IWI_CMD_RING_COUNT);
sc 2202 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_CMD_WIDX, sc->cmdq.cur);
sc 2204 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_TX1_BASE, sc->txq[0].map->dm_segs[0].ds_addr);
sc 2205 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_TX1_SIZE, IWI_TX_RING_COUNT);
sc 2206 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_TX1_WIDX, sc->txq[0].cur);
sc 2208 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_TX2_BASE, sc->txq[1].map->dm_segs[0].ds_addr);
sc 2209 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_TX2_SIZE, IWI_TX_RING_COUNT);
sc 2210 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_TX2_WIDX, sc->txq[1].cur);
sc 2212 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_TX3_BASE, sc->txq[2].map->dm_segs[0].ds_addr);
sc 2213 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_TX3_SIZE, IWI_TX_RING_COUNT);
sc 2214 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_TX3_WIDX, sc->txq[2].cur);
sc 2216 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_TX4_BASE, sc->txq[3].map->dm_segs[0].ds_addr);
sc 2217 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_TX4_SIZE, IWI_TX_RING_COUNT);
sc 2218 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_TX4_WIDX, sc->txq[3].cur);
sc 2221 dev/pci/if_iwi.c struct iwi_rx_data *data = &sc->rxq.data[i];
sc 2222 dev/pci/if_iwi.c CSR_WRITE_4(sc, data->reg, data->map->dm_segs[0].ds_addr);
sc 2225 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_RX_WIDX, IWI_RX_RING_COUNT - 1);
sc 2229 dev/pci/if_iwi.c if ((error = iwi_load_firmware(sc, fw, letoh32(hdr->mainsz))) != 0) {
sc 2231 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 2236 dev/pci/if_iwi.c sc->flags |= IWI_FLAG_FW_INITED;
sc 2238 dev/pci/if_iwi.c if ((error = iwi_config(sc)) != 0) {
sc 2240 dev/pci/if_iwi.c sc->sc_dev.dv_xname);
sc 2262 dev/pci/if_iwi.c struct iwi_softc *sc = ifp->if_softc;
sc 2263 dev/pci/if_iwi.c struct ieee80211com *ic = &sc->sc_ic;
sc 2266 dev/pci/if_iwi.c sc->sc_tx_timer = 0;
sc 2272 dev/pci/if_iwi.c iwi_stop_master(sc);
sc 2274 dev/pci/if_iwi.c CSR_WRITE_4(sc, IWI_CSR_RST, IWI_RST_SW_RESET);
sc 2277 dev/pci/if_iwi.c iwi_reset_cmd_ring(sc, &sc->cmdq);
sc 2279 dev/pci/if_iwi.c iwi_reset_tx_ring(sc, &sc->txq[i]);
sc 2280 dev/pci/if_iwi.c iwi_reset_rx_ring(sc, &sc->rxq);
sc 425 dev/pci/if_iwireg.h #define CSR_READ_1(sc, reg) \
sc 426 dev/pci/if_iwireg.h bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
sc 428 dev/pci/if_iwireg.h #define CSR_READ_2(sc, reg) \
sc 429 dev/pci/if_iwireg.h bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
sc 431 dev/pci/if_iwireg.h #define CSR_READ_4(sc, reg) \
sc 432 dev/pci/if_iwireg.h bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
sc 434 dev/pci/if_iwireg.h #define CSR_READ_REGION_4(sc, offset, datap, count) \
sc 435 dev/pci/if_iwireg.h bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
sc 438 dev/pci/if_iwireg.h #define CSR_WRITE_1(sc, reg, val) \
sc 439 dev/pci/if_iwireg.h bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sc 441 dev/pci/if_iwireg.h #define CSR_WRITE_2(sc, reg, val) \
sc 442 dev/pci/if_iwireg.h bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sc 444 dev/pci/if_iwireg.h #define CSR_WRITE_4(sc, reg, val) \
sc 445 dev/pci/if_iwireg.h bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sc 447 dev/pci/if_iwireg.h #define CSR_WRITE_REGION_1(sc, offset, datap, count) \
sc 448 dev/pci/if_iwireg.h bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \
sc 453 dev/pci/if_iwireg.h #define MEM_WRITE_1(sc, addr, val) do { \
sc 454 dev/pci/if_iwireg.h CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
sc 455 dev/pci/if_iwireg.h CSR_WRITE_1((sc), IWI_CSR_INDIRECT_DATA, (val)); \
sc 458 dev/pci/if_iwireg.h #define MEM_WRITE_2(sc, addr, val) do { \
sc 459 dev/pci/if_iwireg.h CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
sc 460 dev/pci/if_iwireg.h CSR_WRITE_2((sc), IWI_CSR_INDIRECT_DATA, (val)); \
sc 463 dev/pci/if_iwireg.h #define MEM_WRITE_4(sc, addr, val) do { \
sc 464 dev/pci/if_iwireg.h CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
sc 465 dev/pci/if_iwireg.h CSR_WRITE_4((sc), IWI_CSR_INDIRECT_DATA, (val)); \
sc 468 dev/pci/if_iwireg.h #define MEM_WRITE_MULTI_1(sc, addr, buf, len) do { \
sc 469 dev/pci/if_iwireg.h CSR_WRITE_4((sc), IWI_CSR_INDIRECT_ADDR, (addr)); \
sc 470 dev/pci/if_iwireg.h CSR_WRITE_MULTI_1((sc), IWI_CSR_INDIRECT_DATA, (buf), (len)); \
sc 476 dev/pci/if_iwireg.h #define IWI_EEPROM_CTL(sc, val) do { \
sc 477 dev/pci/if_iwireg.h MEM_WRITE_4((sc), IWI_MEM_EEPROM_CTL, (val)); \
sc 166 dev/pci/if_ixgb.c struct ixgb_softc *sc;
sc 171 dev/pci/if_ixgb.c sc = (struct ixgb_softc *)self;
sc 172 dev/pci/if_ixgb.c sc->osdep.ixgb_pa = *pa;
sc 174 dev/pci/if_ixgb.c timeout_set(&sc->timer_handle, ixgb_local_timer, sc);
sc 177 dev/pci/if_ixgb.c ixgb_identify_hardware(sc);
sc 180 dev/pci/if_ixgb.c sc->num_tx_desc = IXGB_MAX_TXD;
sc 181 dev/pci/if_ixgb.c sc->num_rx_desc = IXGB_MAX_RXD;
sc 182 dev/pci/if_ixgb.c sc->tx_int_delay = TIDV;
sc 183 dev/pci/if_ixgb.c sc->rx_int_delay = RDTR;
sc 184 dev/pci/if_ixgb.c sc->rx_buffer_len = IXGB_RXBUFFER_2048;
sc 190 dev/pci/if_ixgb.c sc->hw.fc.high_water = FCRTH;
sc 191 dev/pci/if_ixgb.c sc->hw.fc.low_water = FCRTL;
sc 192 dev/pci/if_ixgb.c sc->hw.fc.pause_time = FCPAUSE;
sc 193 dev/pci/if_ixgb.c sc->hw.fc.send_xon = TRUE;
sc 194 dev/pci/if_ixgb.c sc->hw.fc.type = FLOW_CONTROL;
sc 197 dev/pci/if_ixgb.c sc->hw.max_frame_size = IXGB_MAX_JUMBO_FRAME_SIZE;
sc 199 dev/pci/if_ixgb.c if (ixgb_allocate_pci_resources(sc)) {
sc 201 dev/pci/if_ixgb.c sc->sc_dv.dv_xname);
sc 205 dev/pci/if_ixgb.c tsize = IXGB_ROUNDUP(sc->num_tx_desc * sizeof(struct ixgb_tx_desc),
sc 210 dev/pci/if_ixgb.c if (ixgb_dma_malloc(sc, tsize, &sc->txdma, BUS_DMA_NOWAIT)) {
sc 212 dev/pci/if_ixgb.c sc->sc_dv.dv_xname);
sc 215 dev/pci/if_ixgb.c sc->tx_desc_base = (struct ixgb_tx_desc *) sc->txdma.dma_vaddr;
sc 217 dev/pci/if_ixgb.c rsize = IXGB_ROUNDUP(sc->num_rx_desc * sizeof(struct ixgb_rx_desc),
sc 222 dev/pci/if_ixgb.c if (ixgb_dma_malloc(sc, rsize, &sc->rxdma, BUS_DMA_NOWAIT)) {
sc 224 dev/pci/if_ixgb.c sc->sc_dv.dv_xname);
sc 227 dev/pci/if_ixgb.c sc->rx_desc_base = (struct ixgb_rx_desc *) sc->rxdma.dma_vaddr;
sc 230 dev/pci/if_ixgb.c if (ixgb_hardware_init(sc)) {
sc 232 dev/pci/if_ixgb.c sc->sc_dv.dv_xname);
sc 237 dev/pci/if_ixgb.c ixgb_setup_interface(sc);
sc 240 dev/pci/if_ixgb.c ixgb_clear_hw_cntrs(&sc->hw);
sc 241 dev/pci/if_ixgb.c ixgb_update_stats_counters(sc);
sc 242 dev/pci/if_ixgb.c ixgb_update_link_status(sc);
sc 244 dev/pci/if_ixgb.c printf(", address %s\n", ether_sprintf(sc->interface_data.ac_enaddr));
sc 247 dev/pci/if_ixgb.c sc->sc_powerhook = powerhook_establish(ixgb_power, sc);
sc 248 dev/pci/if_ixgb.c sc->sc_shutdownhook = shutdownhook_establish(ixgb_shutdown, sc);
sc 252 dev/pci/if_ixgb.c ixgb_dma_free(sc, &sc->rxdma);
sc 254 dev/pci/if_ixgb.c ixgb_dma_free(sc, &sc->txdma);
sc 257 dev/pci/if_ixgb.c ixgb_free_pci_resources(sc);
sc 263 dev/pci/if_ixgb.c struct ixgb_softc *sc = (struct ixgb_softc *)arg;
sc 267 dev/pci/if_ixgb.c ifp = &sc->interface_data.ac_if;
sc 269 dev/pci/if_ixgb.c ixgb_init(sc);
sc 282 dev/pci/if_ixgb.c struct ixgb_softc *sc = arg;
sc 284 dev/pci/if_ixgb.c ixgb_stop(sc);
sc 301 dev/pci/if_ixgb.c struct ixgb_softc *sc = ifp->if_softc;
sc 306 dev/pci/if_ixgb.c if (!sc->link_active)
sc 315 dev/pci/if_ixgb.c if (ixgb_encap(sc, m_head)) {
sc 348 dev/pci/if_ixgb.c struct ixgb_softc *sc = ifp->if_softc;
sc 352 dev/pci/if_ixgb.c if ((error = ether_ioctl(ifp, &sc->interface_data, command, data)) > 0) {
sc 363 dev/pci/if_ixgb.c ixgb_init(sc);
sc 366 dev/pci/if_ixgb.c arp_ifinit(&sc->interface_data, ifa);
sc 385 dev/pci/if_ixgb.c ((ifp->if_flags ^ sc->if_flags) &
sc 387 dev/pci/if_ixgb.c ixgb_set_promisc(sc);
sc 390 dev/pci/if_ixgb.c ixgb_init(sc);
sc 394 dev/pci/if_ixgb.c ixgb_stop(sc);
sc 396 dev/pci/if_ixgb.c sc->if_flags = ifp->if_flags;
sc 402 dev/pci/if_ixgb.c ? ether_addmulti(ifr, &sc->interface_data)
sc 403 dev/pci/if_ixgb.c : ether_delmulti(ifr, &sc->interface_data);
sc 407 dev/pci/if_ixgb.c ixgb_disable_intr(sc);
sc 408 dev/pci/if_ixgb.c ixgb_set_multi(sc);
sc 409 dev/pci/if_ixgb.c ixgb_enable_intr(sc);
sc 417 dev/pci/if_ixgb.c error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
sc 438 dev/pci/if_ixgb.c struct ixgb_softc *sc = ifp->if_softc;
sc 444 dev/pci/if_ixgb.c if (IXGB_READ_REG(&sc->hw, STATUS) & IXGB_STATUS_TXOFF) {
sc 449 dev/pci/if_ixgb.c printf("%s: watchdog timeout -- resetting\n", sc->sc_dv.dv_xname);
sc 451 dev/pci/if_ixgb.c ixgb_init(sc);
sc 453 dev/pci/if_ixgb.c sc->watchdog_events++;
sc 469 dev/pci/if_ixgb.c struct ixgb_softc *sc = arg;
sc 470 dev/pci/if_ixgb.c struct ifnet *ifp = &sc->interface_data.ac_if;
sc 478 dev/pci/if_ixgb.c ixgb_stop(sc);
sc 481 dev/pci/if_ixgb.c bcopy(sc->interface_data.ac_enaddr, sc->hw.curr_mac_addr,
sc 485 dev/pci/if_ixgb.c if (ixgb_hardware_init(sc)) {
sc 487 dev/pci/if_ixgb.c sc->sc_dv.dv_xname);
sc 493 dev/pci/if_ixgb.c if (ixgb_setup_transmit_structures(sc)) {
sc 495 dev/pci/if_ixgb.c sc->sc_dv.dv_xname);
sc 496 dev/pci/if_ixgb.c ixgb_stop(sc);
sc 500 dev/pci/if_ixgb.c ixgb_initialize_transmit_unit(sc);
sc 503 dev/pci/if_ixgb.c ixgb_set_multi(sc);
sc 506 dev/pci/if_ixgb.c if (ixgb_setup_receive_structures(sc)) {
sc 508 dev/pci/if_ixgb.c sc->sc_dv.dv_xname);
sc 509 dev/pci/if_ixgb.c ixgb_stop(sc);
sc 513 dev/pci/if_ixgb.c ixgb_initialize_receive_unit(sc);
sc 516 dev/pci/if_ixgb.c ixgb_set_promisc(sc);
sc 522 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, MFRMS,
sc 523 dev/pci/if_ixgb.c sc->hw.max_frame_size << IXGB_MFRMS_SHIFT);
sc 524 dev/pci/if_ixgb.c temp_reg = IXGB_READ_REG(&sc->hw, CTRL0);
sc 526 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, CTRL0, temp_reg);
sc 528 dev/pci/if_ixgb.c timeout_add(&sc->timer_handle, hz);
sc 529 dev/pci/if_ixgb.c ixgb_clear_hw_cntrs(&sc->hw);
sc 530 dev/pci/if_ixgb.c ixgb_enable_intr(sc);
sc 544 dev/pci/if_ixgb.c struct ixgb_softc *sc = arg;
sc 550 dev/pci/if_ixgb.c ifp = &sc->interface_data.ac_if;
sc 553 dev/pci/if_ixgb.c reg_icr = IXGB_READ_REG(&sc->hw, ICR);
sc 563 dev/pci/if_ixgb.c ixgb_rxeof(sc, -1);
sc 564 dev/pci/if_ixgb.c ixgb_txeof(sc);
sc 569 dev/pci/if_ixgb.c timeout_del(&sc->timer_handle);
sc 570 dev/pci/if_ixgb.c ixgb_check_for_link(&sc->hw);
sc 571 dev/pci/if_ixgb.c ixgb_update_link_status(sc);
sc 572 dev/pci/if_ixgb.c timeout_add(&sc->timer_handle, hz);
sc 575 dev/pci/if_ixgb.c if (rxdmt0 && sc->raidc) {
sc 576 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, IMC, IXGB_INT_RXDMT0);
sc 577 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, IMS, IXGB_INT_RXDMT0);
sc 599 dev/pci/if_ixgb.c struct ixgb_softc *sc = ifp->if_softc;
sc 603 dev/pci/if_ixgb.c ixgb_check_for_link(&sc->hw);
sc 604 dev/pci/if_ixgb.c ixgb_update_link_status(sc);
sc 609 dev/pci/if_ixgb.c if (!sc->hw.link_up) {
sc 615 dev/pci/if_ixgb.c if ((sc->hw.phy_type == ixgb_phy_type_g6104) ||
sc 616 dev/pci/if_ixgb.c (sc->hw.phy_type == ixgb_phy_type_txn17401))
sc 635 dev/pci/if_ixgb.c struct ixgb_softc *sc = ifp->if_softc;
sc 636 dev/pci/if_ixgb.c struct ifmedia *ifm = &sc->media;
sc 654 dev/pci/if_ixgb.c ixgb_encap(struct ixgb_softc *sc, struct mbuf *m_head)
sc 667 dev/pci/if_ixgb.c if (sc->num_tx_desc_avail <= IXGB_TX_CLEANUP_THRESHOLD) {
sc 668 dev/pci/if_ixgb.c ixgb_txeof(sc);
sc 670 dev/pci/if_ixgb.c if (sc->num_tx_desc_avail <= IXGB_TX_CLEANUP_THRESHOLD) {
sc 671 dev/pci/if_ixgb.c sc->no_tx_desc_avail1++;
sc 679 dev/pci/if_ixgb.c tx_buffer = &sc->tx_buffer_area[sc->next_avail_tx_desc];
sc 682 dev/pci/if_ixgb.c error = bus_dmamap_load_mbuf(sc->txtag, map,
sc 685 dev/pci/if_ixgb.c sc->no_tx_dma_setup++;
sc 690 dev/pci/if_ixgb.c if (map->dm_nsegs > sc->num_tx_desc_avail)
sc 694 dev/pci/if_ixgb.c ixgb_transmit_checksum_setup(sc, m_head, &txd_popts);
sc 699 dev/pci/if_ixgb.c i = sc->next_avail_tx_desc;
sc 701 dev/pci/if_ixgb.c tx_buffer = &sc->tx_buffer_area[i];
sc 702 dev/pci/if_ixgb.c current_tx_desc = &sc->tx_desc_base[i];
sc 705 dev/pci/if_ixgb.c current_tx_desc->cmd_type_len = htole32((sc->txd_cmd | map->dm_segs[j].ds_len));
sc 707 dev/pci/if_ixgb.c if (++i == sc->num_tx_desc)
sc 713 dev/pci/if_ixgb.c sc->num_tx_desc_avail -= map->dm_nsegs;
sc 714 dev/pci/if_ixgb.c sc->next_avail_tx_desc = i;
sc 717 dev/pci/if_ixgb.c bus_dmamap_sync(sc->txtag, map, 0, map->dm_mapsize,
sc 729 dev/pci/if_ixgb.c bus_dmamap_sync(sc->txdma.dma_tag, sc->txdma.dma_map, 0,
sc 730 dev/pci/if_ixgb.c sc->txdma.dma_map->dm_mapsize,
sc 732 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, TDT, i);
sc 737 dev/pci/if_ixgb.c sc->no_tx_desc_avail2++;
sc 738 dev/pci/if_ixgb.c bus_dmamap_unload(sc->txtag, map);
sc 743 dev/pci/if_ixgb.c ixgb_set_promisc(struct ixgb_softc *sc)
sc 747 dev/pci/if_ixgb.c struct ifnet *ifp = &sc->interface_data.ac_if;
sc 749 dev/pci/if_ixgb.c reg_rctl = IXGB_READ_REG(&sc->hw, RCTL);
sc 759 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, RCTL, reg_rctl);
sc 770 dev/pci/if_ixgb.c ixgb_set_multi(struct ixgb_softc *sc)
sc 775 dev/pci/if_ixgb.c struct ifnet *ifp = &sc->interface_data.ac_if;
sc 776 dev/pci/if_ixgb.c struct arpcom *ac = &sc->interface_data;
sc 797 dev/pci/if_ixgb.c reg_rctl = IXGB_READ_REG(&sc->hw, RCTL);
sc 799 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, RCTL, reg_rctl);
sc 801 dev/pci/if_ixgb.c ixgb_mc_addr_list_update(&sc->hw, mta, mcnt, 0);
sc 816 dev/pci/if_ixgb.c struct ixgb_softc *sc = arg;
sc 819 dev/pci/if_ixgb.c ifp = &sc->interface_data.ac_if;
sc 823 dev/pci/if_ixgb.c ixgb_check_for_link(&sc->hw);
sc 824 dev/pci/if_ixgb.c ixgb_update_link_status(sc);
sc 825 dev/pci/if_ixgb.c ixgb_update_stats_counters(sc);
sc 827 dev/pci/if_ixgb.c ixgb_print_hw_stats(sc);
sc 829 dev/pci/if_ixgb.c timeout_add(&sc->timer_handle, hz);
sc 835 dev/pci/if_ixgb.c ixgb_update_link_status(struct ixgb_softc *sc)
sc 837 dev/pci/if_ixgb.c struct ifnet *ifp = &sc->interface_data.ac_if;
sc 839 dev/pci/if_ixgb.c if (sc->hw.link_up) {
sc 840 dev/pci/if_ixgb.c if (!sc->link_active) {
sc 842 dev/pci/if_ixgb.c sc->link_active = 1;
sc 847 dev/pci/if_ixgb.c if (sc->link_active) {
sc 849 dev/pci/if_ixgb.c sc->link_active = 0;
sc 867 dev/pci/if_ixgb.c struct ixgb_softc *sc = arg;
sc 868 dev/pci/if_ixgb.c ifp = &sc->interface_data.ac_if;
sc 871 dev/pci/if_ixgb.c ixgb_disable_intr(sc);
sc 872 dev/pci/if_ixgb.c sc->hw.adapter_stopped = FALSE;
sc 873 dev/pci/if_ixgb.c ixgb_adapter_stop(&sc->hw);
sc 874 dev/pci/if_ixgb.c timeout_del(&sc->timer_handle);
sc 879 dev/pci/if_ixgb.c ixgb_free_transmit_structures(sc);
sc 880 dev/pci/if_ixgb.c ixgb_free_receive_structures(sc);
sc 890 dev/pci/if_ixgb.c ixgb_identify_hardware(struct ixgb_softc *sc)
sc 893 dev/pci/if_ixgb.c struct pci_attach_args *pa = &sc->osdep.ixgb_pa;
sc 896 dev/pci/if_ixgb.c sc->hw.pci_cmd_word = pci_conf_read(pa->pa_pc, pa->pa_tag,
sc 900 dev/pci/if_ixgb.c sc->hw.vendor_id = PCI_VENDOR(pa->pa_id);
sc 901 dev/pci/if_ixgb.c sc->hw.device_id = PCI_PRODUCT(pa->pa_id);
sc 904 dev/pci/if_ixgb.c sc->hw.revision_id = PCI_REVISION(reg);
sc 907 dev/pci/if_ixgb.c sc->hw.subsystem_vendor_id = PCI_VENDOR(reg);
sc 908 dev/pci/if_ixgb.c sc->hw.subsystem_id = PCI_PRODUCT(reg);
sc 911 dev/pci/if_ixgb.c switch (sc->hw.device_id) {
sc 916 dev/pci/if_ixgb.c sc->hw.mac_type = ixgb_82597;
sc 919 dev/pci/if_ixgb.c INIT_DEBUGOUT1("Unknown device if 0x%x", sc->hw.device_id);
sc 921 dev/pci/if_ixgb.c sc->sc_dv.dv_xname, sc->hw.device_id);
sc 926 dev/pci/if_ixgb.c ixgb_allocate_pci_resources(struct ixgb_softc *sc)
sc 932 dev/pci/if_ixgb.c struct pci_attach_args *pa = &sc->osdep.ixgb_pa;
sc 941 dev/pci/if_ixgb.c &sc->osdep.mem_bus_space_tag, &sc->osdep.mem_bus_space_handle,
sc 942 dev/pci/if_ixgb.c &sc->osdep.ixgb_membase, &sc->osdep.ixgb_memsize, 0)) {
sc 952 dev/pci/if_ixgb.c sc->hw.back = &sc->osdep;
sc 955 dev/pci/if_ixgb.c sc->sc_intrhand = pci_intr_establish(pc, ih, IPL_NET, ixgb_intr, sc,
sc 956 dev/pci/if_ixgb.c sc->sc_dv.dv_xname);
sc 957 dev/pci/if_ixgb.c if (sc->sc_intrhand == NULL) {
sc 970 dev/pci/if_ixgb.c ixgb_free_pci_resources(struct ixgb_softc *sc)
sc 972 dev/pci/if_ixgb.c struct pci_attach_args *pa = &sc->osdep.ixgb_pa;
sc 975 dev/pci/if_ixgb.c if (sc->sc_intrhand)
sc 976 dev/pci/if_ixgb.c pci_intr_disestablish(pc, sc->sc_intrhand);
sc 977 dev/pci/if_ixgb.c sc->sc_intrhand = 0;
sc 979 dev/pci/if_ixgb.c if (sc->osdep.ixgb_membase)
sc 980 dev/pci/if_ixgb.c bus_space_unmap(sc->osdep.mem_bus_space_tag, sc->osdep.mem_bus_space_handle,
sc 981 dev/pci/if_ixgb.c sc->osdep.ixgb_memsize);
sc 982 dev/pci/if_ixgb.c sc->osdep.ixgb_membase = 0;
sc 994 dev/pci/if_ixgb.c ixgb_hardware_init(struct ixgb_softc *sc)
sc 997 dev/pci/if_ixgb.c sc->hw.adapter_stopped = FALSE;
sc 998 dev/pci/if_ixgb.c ixgb_adapter_stop(&sc->hw);
sc 1001 dev/pci/if_ixgb.c if (!ixgb_validate_eeprom_checksum(&sc->hw)) {
sc 1003 dev/pci/if_ixgb.c sc->sc_dv.dv_xname);
sc 1006 dev/pci/if_ixgb.c if (!ixgb_init_hw(&sc->hw)) {
sc 1008 dev/pci/if_ixgb.c sc->sc_dv.dv_xname);
sc 1011 dev/pci/if_ixgb.c bcopy(sc->hw.curr_mac_addr, sc->interface_data.ac_enaddr,
sc 1023 dev/pci/if_ixgb.c ixgb_setup_interface(struct ixgb_softc *sc)
sc 1028 dev/pci/if_ixgb.c ifp = &sc->interface_data.ac_if;
sc 1029 dev/pci/if_ixgb.c strlcpy(ifp->if_xname, sc->sc_dv.dv_xname, IFNAMSIZ);
sc 1031 dev/pci/if_ixgb.c ifp->if_softc = sc;
sc 1038 dev/pci/if_ixgb.c IFQ_SET_MAXLEN(&ifp->if_snd, sc->num_tx_desc - 1);
sc 1051 dev/pci/if_ixgb.c ifmedia_init(&sc->media, IFM_IMASK, ixgb_media_change,
sc 1053 dev/pci/if_ixgb.c if ((sc->hw.phy_type == ixgb_phy_type_g6104) ||
sc 1054 dev/pci/if_ixgb.c (sc->hw.phy_type == ixgb_phy_type_txn17401)) {
sc 1055 dev/pci/if_ixgb.c ifmedia_add(&sc->media, IFM_ETHER | IFM_10G_LR |
sc 1058 dev/pci/if_ixgb.c ifmedia_add(&sc->media, IFM_ETHER | IFM_10G_SR |
sc 1061 dev/pci/if_ixgb.c ifmedia_add(&sc->media, IFM_ETHER | IFM_AUTO, 0, NULL);
sc 1062 dev/pci/if_ixgb.c ifmedia_set(&sc->media, IFM_ETHER | IFM_AUTO);
sc 1072 dev/pci/if_ixgb.c ixgb_dma_malloc(struct ixgb_softc *sc, bus_size_t size,
sc 1077 dev/pci/if_ixgb.c dma->dma_tag = sc->osdep.ixgb_pa.pa_dmat;
sc 1082 dev/pci/if_ixgb.c "error %u\n", sc->sc_dv.dv_xname, r);
sc 1090 dev/pci/if_ixgb.c "size %lu, error %d\n", sc->sc_dv.dv_xname,
sc 1099 dev/pci/if_ixgb.c "size %lu, error %d\n", sc->sc_dv.dv_xname,
sc 1104 dev/pci/if_ixgb.c r = bus_dmamap_load(sc->osdep.ixgb_pa.pa_dmat, dma->dma_map,
sc 1111 dev/pci/if_ixgb.c "error %u\n", sc->sc_dv.dv_xname, r);
sc 1132 dev/pci/if_ixgb.c ixgb_dma_free(struct ixgb_softc *sc, struct ixgb_dma_alloc *dma)
sc 1155 dev/pci/if_ixgb.c ixgb_allocate_transmit_structures(struct ixgb_softc *sc)
sc 1157 dev/pci/if_ixgb.c if (!(sc->tx_buffer_area =
sc 1159 dev/pci/if_ixgb.c sc->num_tx_desc, M_DEVBUF,
sc 1162 dev/pci/if_ixgb.c sc->sc_dv.dv_xname);
sc 1165 dev/pci/if_ixgb.c bzero(sc->tx_buffer_area,
sc 1166 dev/pci/if_ixgb.c sizeof(struct ixgb_buffer) * sc->num_tx_desc);
sc 1177 dev/pci/if_ixgb.c ixgb_setup_transmit_structures(struct ixgb_softc *sc)
sc 1182 dev/pci/if_ixgb.c if ((error = ixgb_allocate_transmit_structures(sc)) != 0)
sc 1185 dev/pci/if_ixgb.c bzero((void *)sc->tx_desc_base,
sc 1186 dev/pci/if_ixgb.c (sizeof(struct ixgb_tx_desc)) * sc->num_tx_desc);
sc 1188 dev/pci/if_ixgb.c sc->txtag = sc->osdep.ixgb_pa.pa_dmat;
sc 1190 dev/pci/if_ixgb.c tx_buffer = sc->tx_buffer_area;
sc 1191 dev/pci/if_ixgb.c for (i = 0; i < sc->num_tx_desc; i++) {
sc 1192 dev/pci/if_ixgb.c error = bus_dmamap_create(sc->txtag, IXGB_MAX_JUMBO_FRAME_SIZE,
sc 1197 dev/pci/if_ixgb.c sc->sc_dv.dv_xname);
sc 1203 dev/pci/if_ixgb.c sc->next_avail_tx_desc = 0;
sc 1204 dev/pci/if_ixgb.c sc->oldest_used_tx_desc = 0;
sc 1207 dev/pci/if_ixgb.c sc->num_tx_desc_avail = sc->num_tx_desc;
sc 1210 dev/pci/if_ixgb.c sc->active_checksum_context = OFFLOAD_NONE;
sc 1211 dev/pci/if_ixgb.c bus_dmamap_sync(sc->txdma.dma_tag, sc->txdma.dma_map, 0,
sc 1212 dev/pci/if_ixgb.c sc->txdma.dma_size, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
sc 1217 dev/pci/if_ixgb.c ixgb_free_transmit_structures(sc);
sc 1227 dev/pci/if_ixgb.c ixgb_initialize_transmit_unit(struct ixgb_softc *sc)
sc 1233 dev/pci/if_ixgb.c bus_addr = sc->txdma.dma_map->dm_segs[0].ds_addr;
sc 1234 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, TDBAL, (u_int32_t)bus_addr);
sc 1235 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, TDBAH, (u_int32_t)(bus_addr >> 32));
sc 1236 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, TDLEN,
sc 1237 dev/pci/if_ixgb.c sc->num_tx_desc *
sc 1241 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, TDH, 0);
sc 1242 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, TDT, 0);
sc 1245 dev/pci/if_ixgb.c IXGB_READ_REG(&sc->hw, TDBAL),
sc 1246 dev/pci/if_ixgb.c IXGB_READ_REG(&sc->hw, TDLEN));
sc 1248 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, TIDV, sc->tx_int_delay);
sc 1251 dev/pci/if_ixgb.c reg_tctl = IXGB_READ_REG(&sc->hw, TCTL);
sc 1253 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, TCTL, reg_tctl);
sc 1256 dev/pci/if_ixgb.c sc->txd_cmd = IXGB_TX_DESC_TYPE | IXGB_TX_DESC_CMD_RS;
sc 1258 dev/pci/if_ixgb.c if (sc->tx_int_delay > 0)
sc 1259 dev/pci/if_ixgb.c sc->txd_cmd |= IXGB_TX_DESC_CMD_IDE;
sc 1268 dev/pci/if_ixgb.c ixgb_free_transmit_structures(struct ixgb_softc *sc)
sc 1275 dev/pci/if_ixgb.c if (sc->tx_buffer_area != NULL) {
sc 1276 dev/pci/if_ixgb.c tx_buffer = sc->tx_buffer_area;
sc 1277 dev/pci/if_ixgb.c for (i = 0; i < sc->num_tx_desc; i++, tx_buffer++) {
sc 1280 dev/pci/if_ixgb.c bus_dmamap_sync(sc->txtag, tx_buffer->map,
sc 1283 dev/pci/if_ixgb.c bus_dmamap_unload(sc->txtag,
sc 1292 dev/pci/if_ixgb.c bus_dmamap_destroy(sc->txtag,
sc 1298 dev/pci/if_ixgb.c if (sc->tx_buffer_area != NULL) {
sc 1299 dev/pci/if_ixgb.c free(sc->tx_buffer_area, M_DEVBUF);
sc 1300 dev/pci/if_ixgb.c sc->tx_buffer_area = NULL;
sc 1302 dev/pci/if_ixgb.c if (sc->txtag != NULL) {
sc 1303 dev/pci/if_ixgb.c sc->txtag = NULL;
sc 1315 dev/pci/if_ixgb.c ixgb_transmit_checksum_setup(struct ixgb_softc *sc,
sc 1327 dev/pci/if_ixgb.c if (sc->active_checksum_context == OFFLOAD_TCP_IP)
sc 1330 dev/pci/if_ixgb.c sc->active_checksum_context = OFFLOAD_TCP_IP;
sc 1334 dev/pci/if_ixgb.c if (sc->active_checksum_context == OFFLOAD_UDP_IP)
sc 1337 dev/pci/if_ixgb.c sc->active_checksum_context = OFFLOAD_UDP_IP;
sc 1351 dev/pci/if_ixgb.c curr_txd = sc->next_avail_tx_desc;
sc 1352 dev/pci/if_ixgb.c tx_buffer = &sc->tx_buffer_area[curr_txd];
sc 1353 dev/pci/if_ixgb.c TXD = (struct ixgb_context_desc *) & sc->tx_desc_base[curr_txd];
sc 1360 dev/pci/if_ixgb.c if (sc->active_checksum_context == OFFLOAD_TCP_IP) {
sc 1364 dev/pci/if_ixgb.c } else if (sc->active_checksum_context == OFFLOAD_UDP_IP) {
sc 1374 dev/pci/if_ixgb.c if (++curr_txd == sc->num_tx_desc)
sc 1377 dev/pci/if_ixgb.c sc->num_tx_desc_avail--;
sc 1378 dev/pci/if_ixgb.c sc->next_avail_tx_desc = curr_txd;
sc 1389 dev/pci/if_ixgb.c ixgb_txeof(struct ixgb_softc *sc)
sc 1394 dev/pci/if_ixgb.c struct ifnet *ifp = &sc->interface_data.ac_if;
sc 1396 dev/pci/if_ixgb.c if (sc->num_tx_desc_avail == sc->num_tx_desc)
sc 1399 dev/pci/if_ixgb.c num_avail = sc->num_tx_desc_avail;
sc 1400 dev/pci/if_ixgb.c i = sc->oldest_used_tx_desc;
sc 1402 dev/pci/if_ixgb.c tx_buffer = &sc->tx_buffer_area[i];
sc 1403 dev/pci/if_ixgb.c tx_desc = &sc->tx_desc_base[i];
sc 1405 dev/pci/if_ixgb.c bus_dmamap_sync(sc->txdma.dma_tag, sc->txdma.dma_map, 0,
sc 1406 dev/pci/if_ixgb.c sc->txdma.dma_map->dm_mapsize, BUS_DMASYNC_POSTREAD);
sc 1416 dev/pci/if_ixgb.c bus_dmamap_sync(sc->txtag, tx_buffer->map,
sc 1419 dev/pci/if_ixgb.c bus_dmamap_unload(sc->txtag, tx_buffer->map);
sc 1425 dev/pci/if_ixgb.c if (++i == sc->num_tx_desc)
sc 1428 dev/pci/if_ixgb.c tx_buffer = &sc->tx_buffer_area[i];
sc 1429 dev/pci/if_ixgb.c tx_desc = &sc->tx_desc_base[i];
sc 1431 dev/pci/if_ixgb.c bus_dmamap_sync(sc->txdma.dma_tag, sc->txdma.dma_map, 0,
sc 1432 dev/pci/if_ixgb.c sc->txdma.dma_map->dm_mapsize,
sc 1435 dev/pci/if_ixgb.c sc->oldest_used_tx_desc = i;
sc 1446 dev/pci/if_ixgb.c if (num_avail == sc->num_tx_desc)
sc 1449 dev/pci/if_ixgb.c else if (num_avail != sc->num_tx_desc_avail)
sc 1452 dev/pci/if_ixgb.c sc->num_tx_desc_avail = num_avail;
sc 1462 dev/pci/if_ixgb.c ixgb_get_buf(struct ixgb_softc *sc, int i,
sc 1470 dev/pci/if_ixgb.c ifp = &sc->interface_data.ac_if;
sc 1475 dev/pci/if_ixgb.c sc->mbuf_alloc_failed++;
sc 1481 dev/pci/if_ixgb.c sc->mbuf_cluster_failed++;
sc 1491 dev/pci/if_ixgb.c if (sc->hw.max_frame_size <= (MCLBYTES - ETHER_ALIGN))
sc 1494 dev/pci/if_ixgb.c rx_buffer = &sc->rx_buffer_area[i];
sc 1500 dev/pci/if_ixgb.c error = bus_dmamap_load_mbuf(sc->rxtag, rx_buffer->map,
sc 1507 dev/pci/if_ixgb.c sc->rx_desc_base[i].buff_addr = htole64(rx_buffer->map->dm_segs[0].ds_addr);
sc 1508 dev/pci/if_ixgb.c bus_dmamap_sync(sc->rxtag, rx_buffer->map, 0,
sc 1523 dev/pci/if_ixgb.c ixgb_allocate_receive_structures(struct ixgb_softc *sc)
sc 1528 dev/pci/if_ixgb.c if (!(sc->rx_buffer_area =
sc 1530 dev/pci/if_ixgb.c sc->num_rx_desc, M_DEVBUF,
sc 1533 dev/pci/if_ixgb.c sc->sc_dv.dv_xname);
sc 1537 dev/pci/if_ixgb.c bzero(sc->rx_buffer_area,
sc 1538 dev/pci/if_ixgb.c sizeof(struct ixgb_buffer) * sc->num_rx_desc);
sc 1540 dev/pci/if_ixgb.c sc->rxtag = sc->osdep.ixgb_pa.pa_dmat;
sc 1542 dev/pci/if_ixgb.c rx_buffer = sc->rx_buffer_area;
sc 1543 dev/pci/if_ixgb.c for (i = 0; i < sc->num_rx_desc; i++, rx_buffer++) {
sc 1544 dev/pci/if_ixgb.c error = bus_dmamap_create(sc->rxtag, MCLBYTES, 1,
sc 1550 dev/pci/if_ixgb.c sc->sc_dv.dv_xname, error);
sc 1555 dev/pci/if_ixgb.c for (i = 0; i < sc->num_rx_desc; i++) {
sc 1556 dev/pci/if_ixgb.c error = ixgb_get_buf(sc, i, NULL);
sc 1560 dev/pci/if_ixgb.c bus_dmamap_sync(sc->rxdma.dma_tag, sc->rxdma.dma_map, 0,
sc 1561 dev/pci/if_ixgb.c sc->rxdma.dma_map->dm_mapsize,
sc 1567 dev/pci/if_ixgb.c ixgb_free_receive_structures(sc);
sc 1577 dev/pci/if_ixgb.c ixgb_setup_receive_structures(struct ixgb_softc *sc)
sc 1579 dev/pci/if_ixgb.c bzero((void *)sc->rx_desc_base,
sc 1580 dev/pci/if_ixgb.c (sizeof(struct ixgb_rx_desc)) * sc->num_rx_desc);
sc 1582 dev/pci/if_ixgb.c if (ixgb_allocate_receive_structures(sc))
sc 1586 dev/pci/if_ixgb.c sc->next_rx_desc_to_check = 0;
sc 1587 dev/pci/if_ixgb.c sc->next_rx_desc_to_use = 0;
sc 1597 dev/pci/if_ixgb.c ixgb_initialize_receive_unit(struct ixgb_softc *sc)
sc 1605 dev/pci/if_ixgb.c ifp = &sc->interface_data.ac_if;
sc 1611 dev/pci/if_ixgb.c reg_rctl = IXGB_READ_REG(&sc->hw, RCTL);
sc 1612 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, RCTL, reg_rctl & ~IXGB_RCTL_RXEN);
sc 1615 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, RDTR,
sc 1616 dev/pci/if_ixgb.c sc->rx_int_delay);
sc 1619 dev/pci/if_ixgb.c bus_addr = sc->rxdma.dma_map->dm_segs[0].ds_addr;
sc 1620 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, RDBAL, (u_int32_t)bus_addr);
sc 1621 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, RDBAH, (u_int32_t)(bus_addr >> 32));
sc 1622 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, RDLEN, sc->num_rx_desc *
sc 1626 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, RDH, 0);
sc 1628 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, RDT, sc->num_rx_desc - 1);
sc 1633 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, RXDCTL, reg_rxdctl);
sc 1635 dev/pci/if_ixgb.c sc->raidc = 1;
sc 1636 dev/pci/if_ixgb.c if (sc->raidc) {
sc 1641 dev/pci/if_ixgb.c poll_threshold = ((sc->num_rx_desc - 1) >> 3);
sc 1646 dev/pci/if_ixgb.c (sc->rx_int_delay << IXGB_RAIDC_DELAY_SHIFT) |
sc 1648 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, RAIDC, raidc);
sc 1652 dev/pci/if_ixgb.c reg_rxcsum = IXGB_READ_REG(&sc->hw, RXCSUM);
sc 1654 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, RXCSUM, reg_rxcsum);
sc 1657 dev/pci/if_ixgb.c reg_rctl = IXGB_READ_REG(&sc->hw, RCTL);
sc 1661 dev/pci/if_ixgb.c (sc->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
sc 1663 dev/pci/if_ixgb.c switch (sc->rx_buffer_len) {
sc 1682 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, RCTL, reg_rctl);
sc 1691 dev/pci/if_ixgb.c ixgb_free_receive_structures(struct ixgb_softc *sc)
sc 1698 dev/pci/if_ixgb.c if (sc->rx_buffer_area != NULL) {
sc 1699 dev/pci/if_ixgb.c rx_buffer = sc->rx_buffer_area;
sc 1700 dev/pci/if_ixgb.c for (i = 0; i < sc->num_rx_desc; i++, rx_buffer++) {
sc 1703 dev/pci/if_ixgb.c bus_dmamap_sync(sc->rxtag, rx_buffer->map,
sc 1706 dev/pci/if_ixgb.c bus_dmamap_unload(sc->rxtag,
sc 1714 dev/pci/if_ixgb.c bus_dmamap_destroy(sc->rxtag,
sc 1720 dev/pci/if_ixgb.c if (sc->rx_buffer_area != NULL) {
sc 1721 dev/pci/if_ixgb.c free(sc->rx_buffer_area, M_DEVBUF);
sc 1722 dev/pci/if_ixgb.c sc->rx_buffer_area = NULL;
sc 1724 dev/pci/if_ixgb.c if (sc->rxtag != NULL)
sc 1725 dev/pci/if_ixgb.c sc->rxtag = NULL;
sc 1739 dev/pci/if_ixgb.c ixgb_rxeof(struct ixgb_softc *sc, int count)
sc 1753 dev/pci/if_ixgb.c ifp = &sc->interface_data.ac_if;
sc 1754 dev/pci/if_ixgb.c i = sc->next_rx_desc_to_check;
sc 1755 dev/pci/if_ixgb.c next_to_use = sc->next_rx_desc_to_use;
sc 1756 dev/pci/if_ixgb.c eop_desc = sc->next_rx_desc_to_check;
sc 1757 dev/pci/if_ixgb.c current_desc = &sc->rx_desc_base[i];
sc 1758 dev/pci/if_ixgb.c bus_dmamap_sync(sc->rxdma.dma_tag, sc->rxdma.dma_map, 0,
sc 1759 dev/pci/if_ixgb.c sc->rxdma.dma_map->dm_mapsize, BUS_DMASYNC_POSTREAD);
sc 1768 dev/pci/if_ixgb.c mp = sc->rx_buffer_area[i].m_head;
sc 1769 dev/pci/if_ixgb.c bus_dmamap_sync(sc->rxtag, sc->rx_buffer_area[i].map,
sc 1770 dev/pci/if_ixgb.c 0, sc->rx_buffer_area[i].map->dm_mapsize,
sc 1772 dev/pci/if_ixgb.c bus_dmamap_unload(sc->rxtag, sc->rx_buffer_area[i].map);
sc 1792 dev/pci/if_ixgb.c if (sc->fmp == NULL) {
sc 1794 dev/pci/if_ixgb.c sc->fmp = mp; /* Store the first mbuf */
sc 1795 dev/pci/if_ixgb.c sc->lmp = mp;
sc 1799 dev/pci/if_ixgb.c sc->lmp->m_next = mp;
sc 1800 dev/pci/if_ixgb.c sc->lmp = sc->lmp->m_next;
sc 1801 dev/pci/if_ixgb.c sc->fmp->m_pkthdr.len += len;
sc 1806 dev/pci/if_ixgb.c sc->fmp->m_pkthdr.rcvif = ifp;
sc 1815 dev/pci/if_ixgb.c bpf_mtap(ifp->if_bpf, sc->fmp,
sc 1819 dev/pci/if_ixgb.c ixgb_receive_checksum(sc, current_desc,
sc 1820 dev/pci/if_ixgb.c sc->fmp);
sc 1821 dev/pci/if_ixgb.c ether_input_mbuf(ifp, sc->fmp);
sc 1822 dev/pci/if_ixgb.c sc->fmp = NULL;
sc 1823 dev/pci/if_ixgb.c sc->lmp = NULL;
sc 1825 dev/pci/if_ixgb.c sc->rx_buffer_area[i].m_head = NULL;
sc 1827 dev/pci/if_ixgb.c sc->dropped_pkts++;
sc 1828 dev/pci/if_ixgb.c if (sc->fmp != NULL)
sc 1829 dev/pci/if_ixgb.c m_freem(sc->fmp);
sc 1830 dev/pci/if_ixgb.c sc->fmp = NULL;
sc 1831 dev/pci/if_ixgb.c sc->lmp = NULL;
sc 1836 dev/pci/if_ixgb.c bus_dmamap_sync(sc->rxdma.dma_tag, sc->rxdma.dma_map, 0,
sc 1837 dev/pci/if_ixgb.c sc->rxdma.dma_map->dm_mapsize,
sc 1841 dev/pci/if_ixgb.c if (++i == sc->num_rx_desc) {
sc 1843 dev/pci/if_ixgb.c current_desc = sc->rx_desc_base;
sc 1847 dev/pci/if_ixgb.c sc->next_rx_desc_to_check = i;
sc 1850 dev/pci/if_ixgb.c i = (sc->num_rx_desc - 1);
sc 1865 dev/pci/if_ixgb.c if (++eop_desc == sc->num_rx_desc)
sc 1871 dev/pci/if_ixgb.c current_desc = &sc->rx_desc_base[next_to_use];
sc 1875 dev/pci/if_ixgb.c mp = sc->rx_buffer_area[next_to_use].m_head;
sc 1876 dev/pci/if_ixgb.c ixgb_get_buf(sc, next_to_use, mp);
sc 1878 dev/pci/if_ixgb.c if (ixgb_get_buf(sc, next_to_use, NULL) == ENOBUFS)
sc 1882 dev/pci/if_ixgb.c if (++next_to_use == sc->num_rx_desc)
sc 1885 dev/pci/if_ixgb.c sc->next_rx_desc_to_use = next_to_use;
sc 1887 dev/pci/if_ixgb.c next_to_use = (sc->num_rx_desc - 1);
sc 1889 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, RDT, next_to_use);
sc 1900 dev/pci/if_ixgb.c ixgb_receive_checksum(struct ixgb_softc *sc,
sc 1929 dev/pci/if_ixgb.c ixgb_enable_intr(struct ixgb_softc *sc)
sc 1931 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, IMS, (IXGB_INT_RXT0 | IXGB_INT_TXDW |
sc 1936 dev/pci/if_ixgb.c ixgb_disable_intr(struct ixgb_softc *sc)
sc 1938 dev/pci/if_ixgb.c IXGB_WRITE_REG(&sc->hw, IMC, ~0);
sc 1958 dev/pci/if_ixgb.c ixgb_update_stats_counters(struct ixgb_softc *sc)
sc 1962 dev/pci/if_ixgb.c sc->stats.crcerrs += IXGB_READ_REG(&sc->hw, CRCERRS);
sc 1963 dev/pci/if_ixgb.c sc->stats.gprcl += IXGB_READ_REG(&sc->hw, GPRCL);
sc 1964 dev/pci/if_ixgb.c sc->stats.gprch += IXGB_READ_REG(&sc->hw, GPRCH);
sc 1965 dev/pci/if_ixgb.c sc->stats.gorcl += IXGB_READ_REG(&sc->hw, GORCL);
sc 1966 dev/pci/if_ixgb.c sc->stats.gorch += IXGB_READ_REG(&sc->hw, GORCH);
sc 1967 dev/pci/if_ixgb.c sc->stats.bprcl += IXGB_READ_REG(&sc->hw, BPRCL);
sc 1968 dev/pci/if_ixgb.c sc->stats.bprch += IXGB_READ_REG(&sc->hw, BPRCH);
sc 1969 dev/pci/if_ixgb.c sc->stats.mprcl += IXGB_READ_REG(&sc->hw, MPRCL);
sc 1970 dev/pci/if_ixgb.c sc->stats.mprch += IXGB_READ_REG(&sc->hw, MPRCH);
sc 1971 dev/pci/if_ixgb.c sc->stats.roc += IXGB_READ_REG(&sc->hw, ROC);
sc 1973 dev/pci/if_ixgb.c sc->stats.mpc += IXGB_READ_REG(&sc->hw, MPC);
sc 1974 dev/pci/if_ixgb.c sc->stats.dc += IXGB_READ_REG(&sc->hw, DC);
sc 1975 dev/pci/if_ixgb.c sc->stats.rlec += IXGB_READ_REG(&sc->hw, RLEC);
sc 1976 dev/pci/if_ixgb.c sc->stats.xonrxc += IXGB_READ_REG(&sc->hw, XONRXC);
sc 1977 dev/pci/if_ixgb.c sc->stats.xontxc += IXGB_READ_REG(&sc->hw, XONTXC);
sc 1978 dev/pci/if_ixgb.c sc->stats.xoffrxc += IXGB_READ_REG(&sc->hw, XOFFRXC);
sc 1979 dev/pci/if_ixgb.c sc->stats.xofftxc += IXGB_READ_REG(&sc->hw, XOFFTXC);
sc 1980 dev/pci/if_ixgb.c sc->stats.gptcl += IXGB_READ_REG(&sc->hw, GPTCL);
sc 1981 dev/pci/if_ixgb.c sc->stats.gptch += IXGB_READ_REG(&sc->hw, GPTCH);
sc 1982 dev/pci/if_ixgb.c sc->stats.gotcl += IXGB_READ_REG(&sc->hw, GOTCL);
sc 1983 dev/pci/if_ixgb.c sc->stats.gotch += IXGB_READ_REG(&sc->hw, GOTCH);
sc 1984 dev/pci/if_ixgb.c sc->stats.ruc += IXGB_READ_REG(&sc->hw, RUC);
sc 1985 dev/pci/if_ixgb.c sc->stats.rfc += IXGB_READ_REG(&sc->hw, RFC);
sc 1986 dev/pci/if_ixgb.c sc->stats.rjc += IXGB_READ_REG(&sc->hw, RJC);
sc 1987 dev/pci/if_ixgb.c sc->stats.torl += IXGB_READ_REG(&sc->hw, TORL);
sc 1988 dev/pci/if_ixgb.c sc->stats.torh += IXGB_READ_REG(&sc->hw, TORH);
sc 1989 dev/pci/if_ixgb.c sc->stats.totl += IXGB_READ_REG(&sc->hw, TOTL);
sc 1990 dev/pci/if_ixgb.c sc->stats.toth += IXGB_READ_REG(&sc->hw, TOTH);
sc 1991 dev/pci/if_ixgb.c sc->stats.tprl += IXGB_READ_REG(&sc->hw, TPRL);
sc 1992 dev/pci/if_ixgb.c sc->stats.tprh += IXGB_READ_REG(&sc->hw, TPRH);
sc 1993 dev/pci/if_ixgb.c sc->stats.tptl += IXGB_READ_REG(&sc->hw, TPTL);
sc 1994 dev/pci/if_ixgb.c sc->stats.tpth += IXGB_READ_REG(&sc->hw, TPTH);
sc 1995 dev/pci/if_ixgb.c sc->stats.plt64c += IXGB_READ_REG(&sc->hw, PLT64C);
sc 1996 dev/pci/if_ixgb.c sc->stats.mptcl += IXGB_READ_REG(&sc->hw, MPTCL);
sc 1997 dev/pci/if_ixgb.c sc->stats.mptch += IXGB_READ_REG(&sc->hw, MPTCH);
sc 1998 dev/pci/if_ixgb.c sc->stats.bptcl += IXGB_READ_REG(&sc->hw, BPTCL);
sc 1999 dev/pci/if_ixgb.c sc->stats.bptch += IXGB_READ_REG(&sc->hw, BPTCH);
sc 2001 dev/pci/if_ixgb.c sc->stats.uprcl += IXGB_READ_REG(&sc->hw, UPRCL);
sc 2002 dev/pci/if_ixgb.c sc->stats.uprch += IXGB_READ_REG(&sc->hw, UPRCH);
sc 2003 dev/pci/if_ixgb.c sc->stats.vprcl += IXGB_READ_REG(&sc->hw, VPRCL);
sc 2004 dev/pci/if_ixgb.c sc->stats.vprch += IXGB_READ_REG(&sc->hw, VPRCH);
sc 2005 dev/pci/if_ixgb.c sc->stats.jprcl += IXGB_READ_REG(&sc->hw, JPRCL);
sc 2006 dev/pci/if_ixgb.c sc->stats.jprch += IXGB_READ_REG(&sc->hw, JPRCH);
sc 2007 dev/pci/if_ixgb.c sc->stats.rnbc += IXGB_READ_REG(&sc->hw, RNBC);
sc 2008 dev/pci/if_ixgb.c sc->stats.icbc += IXGB_READ_REG(&sc->hw, ICBC);
sc 2009 dev/pci/if_ixgb.c sc->stats.ecbc += IXGB_READ_REG(&sc->hw, ECBC);
sc 2010 dev/pci/if_ixgb.c sc->stats.uptcl += IXGB_READ_REG(&sc->hw, UPTCL);
sc 2011 dev/pci/if_ixgb.c sc->stats.uptch += IXGB_READ_REG(&sc->hw, UPTCH);
sc 2012 dev/pci/if_ixgb.c sc->stats.vptcl += IXGB_READ_REG(&sc->hw, VPTCL);
sc 2013 dev/pci/if_ixgb.c sc->stats.vptch += IXGB_READ_REG(&sc->hw, VPTCH);
sc 2014 dev/pci/if_ixgb.c sc->stats.jptcl += IXGB_READ_REG(&sc->hw, JPTCL);
sc 2015 dev/pci/if_ixgb.c sc->stats.jptch += IXGB_READ_REG(&sc->hw, JPTCH);
sc 2016 dev/pci/if_ixgb.c sc->stats.tsctc += IXGB_READ_REG(&sc->hw, TSCTC);
sc 2017 dev/pci/if_ixgb.c sc->stats.tsctfc += IXGB_READ_REG(&sc->hw, TSCTFC);
sc 2018 dev/pci/if_ixgb.c sc->stats.ibic += IXGB_READ_REG(&sc->hw, IBIC);
sc 2019 dev/pci/if_ixgb.c sc->stats.lfc += IXGB_READ_REG(&sc->hw, LFC);
sc 2020 dev/pci/if_ixgb.c sc->stats.pfrc += IXGB_READ_REG(&sc->hw, PFRC);
sc 2021 dev/pci/if_ixgb.c sc->stats.pftc += IXGB_READ_REG(&sc->hw, PFTC);
sc 2022 dev/pci/if_ixgb.c sc->stats.mcfrc += IXGB_READ_REG(&sc->hw, MCFRC);
sc 2024 dev/pci/if_ixgb.c ifp = &sc->interface_data.ac_if;
sc 2031 dev/pci/if_ixgb.c sc->dropped_pkts +
sc 2032 dev/pci/if_ixgb.c sc->stats.crcerrs +
sc 2033 dev/pci/if_ixgb.c sc->stats.rnbc +
sc 2034 dev/pci/if_ixgb.c sc->stats.mpc +
sc 2035 dev/pci/if_ixgb.c sc->stats.rlec;
sc 2039 dev/pci/if_ixgb.c sc->watchdog_events;
sc 2050 dev/pci/if_ixgb.c ixgb_print_hw_stats(struct ixgb_softc *sc)
sc 2055 dev/pci/if_ixgb.c const char * const unit = sc->sc_dv.dv_xname;
sc 2057 dev/pci/if_ixgb.c bus_speed = sc->hw.bus.speed;
sc 2058 dev/pci/if_ixgb.c bus_type = sc->hw.bus.type;
sc 2076 dev/pci/if_ixgb.c sc->no_tx_desc_avail1);
sc 2078 dev/pci/if_ixgb.c sc->no_tx_desc_avail2);
sc 2080 dev/pci/if_ixgb.c sc->mbuf_alloc_failed);
sc 2082 dev/pci/if_ixgb.c sc->mbuf_cluster_failed);
sc 2085 dev/pci/if_ixgb.c (long long)sc->stats.dc);
sc 2087 dev/pci/if_ixgb.c (long long)sc->stats.mpc);
sc 2089 dev/pci/if_ixgb.c (long long)sc->stats.rnbc);
sc 2091 dev/pci/if_ixgb.c (long long)sc->stats.rlec);
sc 2093 dev/pci/if_ixgb.c (long long)sc->stats.crcerrs);
sc 2095 dev/pci/if_ixgb.c sc->dropped_pkts);
sc 2098 dev/pci/if_ixgb.c (long long)sc->stats.xonrxc);
sc 2100 dev/pci/if_ixgb.c (long long)sc->stats.xontxc);
sc 2102 dev/pci/if_ixgb.c (long long)sc->stats.xoffrxc);
sc 2104 dev/pci/if_ixgb.c (long long)sc->stats.xofftxc);
sc 2107 dev/pci/if_ixgb.c (long long)sc->stats.gprcl);
sc 2109 dev/pci/if_ixgb.c (long long)sc->stats.gptcl);
sc 2112 dev/pci/if_ixgb.c (long long)sc->stats.jprcl);
sc 2114 dev/pci/if_ixgb.c (long long)sc->stats.jptcl);
sc 134 dev/pci/if_ixgb.h #define IXGB_TX_CLEANUP_THRESHOLD (sc->num_tx_desc / 8)
sc 174 dev/pci/if_lge.c #define LGE_SETBIT(sc, reg, x) \
sc 175 dev/pci/if_lge.c CSR_WRITE_4(sc, reg, \
sc 176 dev/pci/if_lge.c CSR_READ_4(sc, reg) | (x))
sc 178 dev/pci/if_lge.c #define LGE_CLRBIT(sc, reg, x) \
sc 179 dev/pci/if_lge.c CSR_WRITE_4(sc, reg, \
sc 180 dev/pci/if_lge.c CSR_READ_4(sc, reg) & ~(x))
sc 183 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MEAR, CSR_READ_4(sc, LGE_MEAR) | x)
sc 186 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MEAR, CSR_READ_4(sc, LGE_MEAR) & ~x)
sc 192 dev/pci/if_lge.c lge_eeprom_getword(struct lge_softc *sc, int addr, u_int16_t *dest)
sc 197 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_EECTL, LGE_EECTL_CMD_READ|
sc 201 dev/pci/if_lge.c if (!(CSR_READ_4(sc, LGE_EECTL) & LGE_EECTL_CMD_READ))
sc 205 dev/pci/if_lge.c printf("%s: EEPROM read timed out\n", sc->sc_dv.dv_xname);
sc 209 dev/pci/if_lge.c val = CSR_READ_4(sc, LGE_EEDATA);
sc 221 dev/pci/if_lge.c lge_read_eeprom(struct lge_softc *sc, caddr_t dest, int off,
sc 228 dev/pci/if_lge.c lge_eeprom_getword(sc, off + i, &word);
sc 240 dev/pci/if_lge.c struct lge_softc *sc = (struct lge_softc *)dev;
sc 248 dev/pci/if_lge.c if (sc->lge_pcs == 0 && phy == 0)
sc 251 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_GMIICTL, (phy << 8) | reg | LGE_GMIICMD_READ);
sc 254 dev/pci/if_lge.c if (!(CSR_READ_4(sc, LGE_GMIICTL) & LGE_GMIICTL_CMDBUSY))
sc 258 dev/pci/if_lge.c printf("%s: PHY read timed out\n", sc->sc_dv.dv_xname);
sc 262 dev/pci/if_lge.c return (CSR_READ_4(sc, LGE_GMIICTL) >> 16);
sc 268 dev/pci/if_lge.c struct lge_softc *sc = (struct lge_softc *)dev;
sc 271 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_GMIICTL,
sc 275 dev/pci/if_lge.c if (!(CSR_READ_4(sc, LGE_GMIICTL) & LGE_GMIICTL_CMDBUSY))
sc 279 dev/pci/if_lge.c printf("%s: PHY write timed out\n", sc->sc_dv.dv_xname);
sc 286 dev/pci/if_lge.c struct lge_softc *sc = (struct lge_softc *)dev;
sc 287 dev/pci/if_lge.c struct mii_data *mii = &sc->lge_mii;
sc 289 dev/pci/if_lge.c LGE_CLRBIT(sc, LGE_GMIIMODE, LGE_GMIIMODE_SPEED);
sc 293 dev/pci/if_lge.c LGE_SETBIT(sc, LGE_GMIIMODE, LGE_SPEED_1000);
sc 296 dev/pci/if_lge.c LGE_SETBIT(sc, LGE_GMIIMODE, LGE_SPEED_100);
sc 299 dev/pci/if_lge.c LGE_SETBIT(sc, LGE_GMIIMODE, LGE_SPEED_10);
sc 307 dev/pci/if_lge.c LGE_SETBIT(sc, LGE_GMIIMODE, LGE_SPEED_1000);
sc 312 dev/pci/if_lge.c LGE_SETBIT(sc, LGE_GMIIMODE, LGE_GMIIMODE_FDX);
sc 314 dev/pci/if_lge.c LGE_CLRBIT(sc, LGE_GMIIMODE, LGE_GMIIMODE_FDX);
sc 319 dev/pci/if_lge.c lge_setmulti(struct lge_softc *sc)
sc 321 dev/pci/if_lge.c struct arpcom *ac = &sc->arpcom;
sc 328 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_MCAST);
sc 332 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MAR0, 0xFFFFFFFF);
sc 333 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MAR1, 0xFFFFFFFF);
sc 338 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MAR0, 0);
sc 339 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MAR1, 0);
sc 357 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MAR0, hashes[0]);
sc 358 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MAR1, hashes[1]);
sc 362 dev/pci/if_lge.c lge_reset(struct lge_softc *sc)
sc 366 dev/pci/if_lge.c LGE_SETBIT(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL0|LGE_MODE1_SOFTRST);
sc 369 dev/pci/if_lge.c if (!(CSR_READ_4(sc, LGE_MODE1) & LGE_MODE1_SOFTRST))
sc 374 dev/pci/if_lge.c printf("%s: reset never completed\n", sc->sc_dv.dv_xname);
sc 398 dev/pci/if_lge.c struct lge_softc *sc = (struct lge_softc *)self;
sc 432 dev/pci/if_lge.c "-- setting to D0\n", sc->sc_dv.dv_xname,
sc 453 dev/pci/if_lge.c &sc->lge_btag, &sc->lge_bhandle, NULL, &size, 0)) {
sc 463 dev/pci/if_lge.c memtype, 0, &sc->lge_btag, &sc->lge_bhandle,
sc 481 dev/pci/if_lge.c sc->lge_intrhand = pci_intr_establish(pc, ih, IPL_NET, lge_intr, sc,
sc 482 dev/pci/if_lge.c sc->sc_dv.dv_xname);
sc 483 dev/pci/if_lge.c if (sc->lge_intrhand == NULL) {
sc 494 dev/pci/if_lge.c lge_reset(sc);
sc 500 dev/pci/if_lge.c lge_read_eeprom(sc, (caddr_t)&eaddr[0], LGE_EE_NODEADDR_0, 1, 0);
sc 501 dev/pci/if_lge.c lge_read_eeprom(sc, (caddr_t)&eaddr[2], LGE_EE_NODEADDR_1, 1, 0);
sc 502 dev/pci/if_lge.c lge_read_eeprom(sc, (caddr_t)&eaddr[4], LGE_EE_NODEADDR_2, 1, 0);
sc 509 dev/pci/if_lge.c bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 511 dev/pci/if_lge.c sc->sc_dmatag = pa->pa_dmat;
sc 513 dev/pci/if_lge.c if (bus_dmamem_alloc(sc->sc_dmatag, sizeof(struct lge_list_data),
sc 515 dev/pci/if_lge.c printf("%s: can't alloc rx buffers\n", sc->sc_dv.dv_xname);
sc 519 dev/pci/if_lge.c if (bus_dmamem_map(sc->sc_dmatag, &seg, rseg,
sc 523 dev/pci/if_lge.c sc->sc_dv.dv_xname, sizeof(struct lge_list_data));
sc 527 dev/pci/if_lge.c if (bus_dmamap_create(sc->sc_dmatag, sizeof(struct lge_list_data), 1,
sc 530 dev/pci/if_lge.c printf("%s: can't create dma map\n", sc->sc_dv.dv_xname);
sc 534 dev/pci/if_lge.c if (bus_dmamap_load(sc->sc_dmatag, dmamap, kva,
sc 541 dev/pci/if_lge.c sc->lge_ldata = (struct lge_list_data *)kva;
sc 542 dev/pci/if_lge.c bzero(sc->lge_ldata, sizeof(struct lge_list_data));
sc 546 dev/pci/if_lge.c if (lge_alloc_jumbo_mem(sc)) {
sc 548 dev/pci/if_lge.c sc->sc_dv.dv_xname);
sc 552 dev/pci/if_lge.c ifp = &sc->arpcom.ac_if;
sc 553 dev/pci/if_lge.c ifp->if_softc = sc;
sc 563 dev/pci/if_lge.c bcopy(sc->sc_dv.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 567 dev/pci/if_lge.c if (CSR_READ_4(sc, LGE_GMIIMODE) & LGE_GMIIMODE_PCSENH)
sc 568 dev/pci/if_lge.c sc->lge_pcs = 1;
sc 570 dev/pci/if_lge.c sc->lge_pcs = 0;
sc 576 dev/pci/if_lge.c sc->lge_mii.mii_ifp = ifp;
sc 577 dev/pci/if_lge.c sc->lge_mii.mii_readreg = lge_miibus_readreg;
sc 578 dev/pci/if_lge.c sc->lge_mii.mii_writereg = lge_miibus_writereg;
sc 579 dev/pci/if_lge.c sc->lge_mii.mii_statchg = lge_miibus_statchg;
sc 580 dev/pci/if_lge.c ifmedia_init(&sc->lge_mii.mii_media, 0, lge_ifmedia_upd,
sc 582 dev/pci/if_lge.c mii_attach(&sc->sc_dv, &sc->lge_mii, 0xffffffff, MII_PHY_ANY,
sc 585 dev/pci/if_lge.c if (LIST_FIRST(&sc->lge_mii.mii_phys) == NULL) {
sc 586 dev/pci/if_lge.c printf("%s: no PHY found!\n", sc->sc_dv.dv_xname);
sc 587 dev/pci/if_lge.c ifmedia_add(&sc->lge_mii.mii_media, IFM_ETHER|IFM_MANUAL,
sc 589 dev/pci/if_lge.c ifmedia_set(&sc->lge_mii.mii_media, IFM_ETHER|IFM_MANUAL);
sc 592 dev/pci/if_lge.c ifmedia_set(&sc->lge_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 603 dev/pci/if_lge.c timeout_set(&sc->lge_timeout, lge_tick, sc);
sc 604 dev/pci/if_lge.c timeout_add(&sc->lge_timeout, hz);
sc 608 dev/pci/if_lge.c bus_dmamap_destroy(sc->sc_dmatag, dmamap);
sc 611 dev/pci/if_lge.c bus_dmamem_unmap(sc->sc_dmatag, kva,
sc 615 dev/pci/if_lge.c bus_dmamem_free(sc->sc_dmatag, &seg, rseg);
sc 618 dev/pci/if_lge.c pci_intr_disestablish(pc, sc->lge_intrhand);
sc 621 dev/pci/if_lge.c bus_space_unmap(sc->lge_btag, sc->lge_bhandle, size);
sc 628 dev/pci/if_lge.c lge_list_tx_init(struct lge_softc *sc)
sc 634 dev/pci/if_lge.c cd = &sc->lge_cdata;
sc 635 dev/pci/if_lge.c ld = sc->lge_ldata;
sc 653 dev/pci/if_lge.c lge_list_rx_init(struct lge_softc *sc)
sc 659 dev/pci/if_lge.c ld = sc->lge_ldata;
sc 660 dev/pci/if_lge.c cd = &sc->lge_cdata;
sc 664 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_RXDESC_ADDR_HI, 0);
sc 667 dev/pci/if_lge.c if (CSR_READ_1(sc, LGE_RXCMDFREE_8BIT) == 0)
sc 669 dev/pci/if_lge.c if (lge_newbuf(sc, &ld->lge_rx_list[i], NULL) == ENOBUFS)
sc 674 dev/pci/if_lge.c CSR_READ_4(sc, LGE_ISR);
sc 683 dev/pci/if_lge.c lge_newbuf(struct lge_softc *sc, struct lge_rx_desc *c, struct mbuf *m)
sc 695 dev/pci/if_lge.c buf = lge_jalloc(sc);
sc 703 dev/pci/if_lge.c MEXTADD(m_new, buf, LGE_JLEN, 0, lge_jfree, sc);
sc 740 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_RXDESC_ADDR_LO, VTOPHYS(c));
sc 741 dev/pci/if_lge.c LGE_INC(sc->lge_cdata.lge_rx_prod, LGE_RX_LIST_CNT);
sc 747 dev/pci/if_lge.c lge_alloc_jumbo_mem(struct lge_softc *sc)
sc 758 dev/pci/if_lge.c if (bus_dmamem_alloc(sc->sc_dmatag, LGE_JMEM, PAGE_SIZE, 0,
sc 760 dev/pci/if_lge.c printf("%s: can't alloc rx buffers\n", sc->sc_dv.dv_xname);
sc 765 dev/pci/if_lge.c if (bus_dmamem_map(sc->sc_dmatag, &seg, rseg, LGE_JMEM, &kva,
sc 768 dev/pci/if_lge.c sc->sc_dv.dv_xname, LGE_JMEM);
sc 774 dev/pci/if_lge.c if (bus_dmamap_create(sc->sc_dmatag, LGE_JMEM, 1,
sc 776 dev/pci/if_lge.c printf("%s: can't create dma map\n", sc->sc_dv.dv_xname);
sc 782 dev/pci/if_lge.c if (bus_dmamap_load(sc->sc_dmatag, dmamap, kva, LGE_JMEM,
sc 784 dev/pci/if_lge.c printf("%s: can't load dma map\n", sc->sc_dv.dv_xname);
sc 790 dev/pci/if_lge.c sc->lge_cdata.lge_jumbo_buf = (caddr_t)kva;
sc 791 dev/pci/if_lge.c DPRINTFN(1,("lge_jumbo_buf = 0x%08X\n", sc->lge_cdata.lge_jumbo_buf));
sc 794 dev/pci/if_lge.c LIST_INIT(&sc->lge_jfree_listhead);
sc 795 dev/pci/if_lge.c LIST_INIT(&sc->lge_jinuse_listhead);
sc 801 dev/pci/if_lge.c ptr = sc->lge_cdata.lge_jumbo_buf;
sc 803 dev/pci/if_lge.c sc->lge_cdata.lge_jslots[i] = ptr;
sc 808 dev/pci/if_lge.c sc->lge_cdata.lge_jumbo_buf = NULL;
sc 810 dev/pci/if_lge.c sc->sc_dv.dv_xname);
sc 815 dev/pci/if_lge.c LIST_INSERT_HEAD(&sc->lge_jfree_listhead,
sc 822 dev/pci/if_lge.c bus_dmamap_unload(sc->sc_dmatag, dmamap);
sc 824 dev/pci/if_lge.c bus_dmamap_destroy(sc->sc_dmatag, dmamap);
sc 826 dev/pci/if_lge.c bus_dmamem_unmap(sc->sc_dmatag, kva, LGE_JMEM);
sc 828 dev/pci/if_lge.c bus_dmamem_free(sc->sc_dmatag, &seg, rseg);
sc 842 dev/pci/if_lge.c lge_jalloc(struct lge_softc *sc)
sc 846 dev/pci/if_lge.c entry = LIST_FIRST(&sc->lge_jfree_listhead);
sc 852 dev/pci/if_lge.c LIST_INSERT_HEAD(&sc->lge_jinuse_listhead, entry, jpool_entries);
sc 853 dev/pci/if_lge.c return (sc->lge_cdata.lge_jslots[entry->slot]);
sc 862 dev/pci/if_lge.c struct lge_softc *sc;
sc 867 dev/pci/if_lge.c sc = (struct lge_softc *)arg;
sc 869 dev/pci/if_lge.c if (sc == NULL)
sc 873 dev/pci/if_lge.c i = ((vaddr_t)buf - (vaddr_t)sc->lge_cdata.lge_jumbo_buf) / LGE_JLEN;
sc 878 dev/pci/if_lge.c entry = LIST_FIRST(&sc->lge_jinuse_listhead);
sc 883 dev/pci/if_lge.c LIST_INSERT_HEAD(&sc->lge_jfree_listhead, entry, jpool_entries);
sc 891 dev/pci/if_lge.c lge_rxeof(struct lge_softc *sc, int cnt)
sc 899 dev/pci/if_lge.c ifp = &sc->arpcom.ac_if;
sc 903 dev/pci/if_lge.c i = sc->lge_cdata.lge_rx_cons;
sc 909 dev/pci/if_lge.c cur_rx = &sc->lge_ldata->lge_rx_list[i];
sc 926 dev/pci/if_lge.c lge_newbuf(sc, &LGE_RXTAIL(sc), m);
sc 930 dev/pci/if_lge.c if (lge_newbuf(sc, &LGE_RXTAIL(sc), NULL) == ENOBUFS) {
sc 933 dev/pci/if_lge.c lge_newbuf(sc, &LGE_RXTAIL(sc), m);
sc 971 dev/pci/if_lge.c sc->lge_cdata.lge_rx_cons = i;
sc 980 dev/pci/if_lge.c lge_txeof(struct lge_softc *sc)
sc 986 dev/pci/if_lge.c ifp = &sc->arpcom.ac_if;
sc 995 dev/pci/if_lge.c idx = sc->lge_cdata.lge_tx_cons;
sc 996 dev/pci/if_lge.c txdone = CSR_READ_1(sc, LGE_TXDMADONE_8BIT);
sc 998 dev/pci/if_lge.c while (idx != sc->lge_cdata.lge_tx_prod && txdone) {
sc 999 dev/pci/if_lge.c cur_tx = &sc->lge_ldata->lge_tx_list[idx];
sc 1013 dev/pci/if_lge.c sc->lge_cdata.lge_tx_cons = idx;
sc 1022 dev/pci/if_lge.c struct lge_softc *sc = xsc;
sc 1023 dev/pci/if_lge.c struct mii_data *mii = &sc->lge_mii;
sc 1024 dev/pci/if_lge.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 1029 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_STATSIDX, LGE_STATS_SINGLE_COLL_PKTS);
sc 1030 dev/pci/if_lge.c ifp->if_collisions += CSR_READ_4(sc, LGE_STATSVAL);
sc 1031 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_STATSIDX, LGE_STATS_MULTI_COLL_PKTS);
sc 1032 dev/pci/if_lge.c ifp->if_collisions += CSR_READ_4(sc, LGE_STATSVAL);
sc 1034 dev/pci/if_lge.c if (!sc->lge_link) {
sc 1038 dev/pci/if_lge.c sc->lge_link++;
sc 1044 dev/pci/if_lge.c timeout_add(&sc->lge_timeout, hz);
sc 1052 dev/pci/if_lge.c struct lge_softc *sc;
sc 1057 dev/pci/if_lge.c sc = arg;
sc 1058 dev/pci/if_lge.c ifp = &sc->arpcom.ac_if;
sc 1062 dev/pci/if_lge.c lge_stop(sc);
sc 1072 dev/pci/if_lge.c status = CSR_READ_4(sc, LGE_ISR);
sc 1080 dev/pci/if_lge.c lge_txeof(sc);
sc 1083 dev/pci/if_lge.c lge_rxeof(sc, LGE_RX_DMACNT(status));
sc 1086 dev/pci/if_lge.c lge_init(sc);
sc 1089 dev/pci/if_lge.c sc->lge_link = 0;
sc 1090 dev/pci/if_lge.c timeout_del(&sc->lge_timeout);
sc 1091 dev/pci/if_lge.c lge_tick(sc);
sc 1096 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_IMR, LGE_IMR_SETRST_CTL0|LGE_IMR_INTR_ENB);
sc 1109 dev/pci/if_lge.c lge_encap(struct lge_softc *sc, struct mbuf *m_head, u_int32_t *txidx)
sc 1122 dev/pci/if_lge.c cur_tx = &sc->lge_ldata->lge_tx_list[*txidx];
sc 1144 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_TXDESC_ADDR_LO, VTOPHYS(cur_tx));
sc 1159 dev/pci/if_lge.c struct lge_softc *sc;
sc 1164 dev/pci/if_lge.c sc = ifp->if_softc;
sc 1166 dev/pci/if_lge.c if (!sc->lge_link)
sc 1169 dev/pci/if_lge.c idx = sc->lge_cdata.lge_tx_prod;
sc 1174 dev/pci/if_lge.c while(sc->lge_ldata->lge_tx_list[idx].lge_mbuf == NULL) {
sc 1175 dev/pci/if_lge.c if (CSR_READ_1(sc, LGE_TXCMDFREE_8BIT) == 0)
sc 1182 dev/pci/if_lge.c if (lge_encap(sc, m_head, &idx)) {
sc 1203 dev/pci/if_lge.c sc->lge_cdata.lge_tx_prod = idx;
sc 1214 dev/pci/if_lge.c struct lge_softc *sc = xsc;
sc 1215 dev/pci/if_lge.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 1223 dev/pci/if_lge.c lge_stop(sc);
sc 1224 dev/pci/if_lge.c lge_reset(sc);
sc 1227 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_PAR0, *(u_int32_t *)(&sc->arpcom.ac_enaddr[0]));
sc 1228 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_PAR1, *(u_int32_t *)(&sc->arpcom.ac_enaddr[4]));
sc 1231 dev/pci/if_lge.c if (lge_list_rx_init(sc) == ENOBUFS) {
sc 1233 dev/pci/if_lge.c "memory for rx buffers\n", sc->sc_dv.dv_xname);
sc 1234 dev/pci/if_lge.c lge_stop(sc);
sc 1242 dev/pci/if_lge.c lge_list_tx_init(sc);
sc 1245 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_UCAST|
sc 1252 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1,
sc 1255 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_PROMISC);
sc 1262 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1,
sc 1265 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_BCAST);
sc 1269 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RMVPAD);
sc 1272 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_ERRPKTS);
sc 1275 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_GIANTS);
sc 1278 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_TX_FLOWCTL);
sc 1279 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_FLOWCTL);
sc 1282 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_CRC);
sc 1285 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_MPACK_ENB);
sc 1288 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_VLAN_RX|LGE_MODE1_VLAN_TX|
sc 1292 dev/pci/if_lge.c CSR_WRITE_2(sc, LGE_RXFIFO_HIWAT, 0x3FFF);
sc 1293 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_IMR, LGE_IMR_SETRST_CTL1|LGE_IMR_RXFIFO_WAT);
sc 1298 dev/pci/if_lge.c lge_setmulti(sc);
sc 1304 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE2, LGE_MODE2_RX_IPCSUM|
sc 1312 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL0|LGE_MODE1_GMIIPOLL);
sc 1315 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_RXDESC_ADDR_HI, 0);
sc 1316 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_RX_ENB);
sc 1318 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_TXDESC_ADDR_HI, 0);
sc 1319 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_SETRST_CTL1|LGE_MODE1_TX_ENB);
sc 1324 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_IMR, LGE_IMR_SETRST_CTL0|
sc 1334 dev/pci/if_lge.c timeout_add(&sc->lge_timeout, hz);
sc 1343 dev/pci/if_lge.c struct lge_softc *sc = ifp->if_softc;
sc 1344 dev/pci/if_lge.c struct mii_data *mii = &sc->lge_mii;
sc 1346 dev/pci/if_lge.c sc->lge_link = 0;
sc 1363 dev/pci/if_lge.c struct lge_softc *sc = ifp->if_softc;
sc 1364 dev/pci/if_lge.c struct mii_data *mii = &sc->lge_mii;
sc 1374 dev/pci/if_lge.c struct lge_softc *sc = ifp->if_softc;
sc 1386 dev/pci/if_lge.c lge_init(sc);
sc 1389 dev/pci/if_lge.c arp_ifinit(&sc->arpcom, ifa);
sc 1402 dev/pci/if_lge.c !(sc->lge_if_flags & IFF_PROMISC)) {
sc 1403 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1,
sc 1406 dev/pci/if_lge.c lge_setmulti(sc);
sc 1409 dev/pci/if_lge.c sc->lge_if_flags & IFF_PROMISC) {
sc 1410 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1,
sc 1412 dev/pci/if_lge.c lge_setmulti(sc);
sc 1414 dev/pci/if_lge.c (ifp->if_flags ^ sc->lge_if_flags) & IFF_ALLMULTI) {
sc 1415 dev/pci/if_lge.c lge_setmulti(sc);
sc 1418 dev/pci/if_lge.c lge_init(sc);
sc 1422 dev/pci/if_lge.c lge_stop(sc);
sc 1424 dev/pci/if_lge.c sc->lge_if_flags = ifp->if_flags;
sc 1429 dev/pci/if_lge.c ? ether_addmulti(ifr, &sc->arpcom)
sc 1430 dev/pci/if_lge.c : ether_delmulti(ifr, &sc->arpcom);
sc 1434 dev/pci/if_lge.c lge_setmulti(sc);
sc 1440 dev/pci/if_lge.c mii = &sc->lge_mii;
sc 1456 dev/pci/if_lge.c struct lge_softc *sc;
sc 1458 dev/pci/if_lge.c sc = ifp->if_softc;
sc 1461 dev/pci/if_lge.c printf("%s: watchdog timeout\n", sc->sc_dv.dv_xname);
sc 1463 dev/pci/if_lge.c lge_stop(sc);
sc 1464 dev/pci/if_lge.c lge_reset(sc);
sc 1465 dev/pci/if_lge.c lge_init(sc);
sc 1476 dev/pci/if_lge.c lge_stop(struct lge_softc *sc)
sc 1481 dev/pci/if_lge.c ifp = &sc->arpcom.ac_if;
sc 1483 dev/pci/if_lge.c timeout_del(&sc->lge_timeout);
sc 1487 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_IMR, LGE_IMR_INTR_ENB);
sc 1490 dev/pci/if_lge.c CSR_WRITE_4(sc, LGE_MODE1, LGE_MODE1_RX_ENB|LGE_MODE1_TX_ENB);
sc 1491 dev/pci/if_lge.c sc->lge_link = 0;
sc 1497 dev/pci/if_lge.c if (sc->lge_ldata->lge_rx_list[i].lge_mbuf != NULL) {
sc 1498 dev/pci/if_lge.c m_freem(sc->lge_ldata->lge_rx_list[i].lge_mbuf);
sc 1499 dev/pci/if_lge.c sc->lge_ldata->lge_rx_list[i].lge_mbuf = NULL;
sc 1502 dev/pci/if_lge.c bzero((char *)&sc->lge_ldata->lge_rx_list,
sc 1503 dev/pci/if_lge.c sizeof(sc->lge_ldata->lge_rx_list));
sc 1509 dev/pci/if_lge.c if (sc->lge_ldata->lge_tx_list[i].lge_mbuf != NULL) {
sc 1510 dev/pci/if_lge.c m_freem(sc->lge_ldata->lge_tx_list[i].lge_mbuf);
sc 1511 dev/pci/if_lge.c sc->lge_ldata->lge_tx_list[i].lge_mbuf = NULL;
sc 1515 dev/pci/if_lge.c bzero((char *)&sc->lge_ldata->lge_tx_list,
sc 1516 dev/pci/if_lge.c sizeof(sc->lge_ldata->lge_tx_list));
sc 1526 dev/pci/if_lge.c struct lge_softc *sc = (struct lge_softc *)xsc;
sc 1528 dev/pci/if_lge.c lge_reset(sc);
sc 1529 dev/pci/if_lge.c lge_stop(sc);
sc 537 dev/pci/if_lgereg.h #define CSR_WRITE_4(sc, reg, val) \
sc 538 dev/pci/if_lgereg.h bus_space_write_4(sc->lge_btag, sc->lge_bhandle, reg, val)
sc 540 dev/pci/if_lgereg.h #define CSR_READ_2(sc, reg) \
sc 541 dev/pci/if_lgereg.h bus_space_read_2(sc->lge_btag, sc->lge_bhandle, reg)
sc 543 dev/pci/if_lgereg.h #define CSR_WRITE_2(sc, reg, val) \
sc 544 dev/pci/if_lgereg.h bus_space_write_2(sc->lge_btag, sc->lge_bhandle, reg, val)
sc 546 dev/pci/if_lgereg.h #define CSR_READ_4(sc, reg) \
sc 547 dev/pci/if_lgereg.h bus_space_read_4(sc->lge_btag, sc->lge_bhandle, reg)
sc 549 dev/pci/if_lgereg.h #define CSR_WRITE_1(sc, reg, val) \
sc 550 dev/pci/if_lgereg.h bus_space_write_1(sc->lge_btag, sc->lge_bhandle, reg, val)
sc 552 dev/pci/if_lgereg.h #define CSR_READ_1(sc, reg) \
sc 553 dev/pci/if_lgereg.h bus_space_read_1(sc->lge_btag, sc->lge_bhandle, reg)
sc 124 dev/pci/if_lmc.c static struct mbuf *lmc_txput(lmc_softc_t * const sc, struct mbuf *m);
sc 125 dev/pci/if_lmc.c static void lmc_rx_intr(lmc_softc_t * const sc);
sc 128 dev/pci/if_lmc.c static void lmc_ifup(lmc_softc_t * const sc);
sc 129 dev/pci/if_lmc.c static void lmc_ifdown(lmc_softc_t * const sc);
sc 135 dev/pci/if_lmc.c lmc_delay_300ns(lmc_softc_t * const sc)
sc 139 dev/pci/if_lmc.c (void)LMC_CSR_READ(sc, csr_busmode);
sc 144 dev/pci/if_lmc.c LMC_CSR_WRITE(sc, csr_srom_mii, csr); \
sc 145 dev/pci/if_lmc.c lmc_delay_300ns(sc); \
sc 149 dev/pci/if_lmc.c lmc_srom_idle(lmc_softc_t * const sc)
sc 172 dev/pci/if_lmc.c lmc_srom_read(lmc_softc_t * const sc)
sc 180 dev/pci/if_lmc.c lmc_srom_idle(sc);
sc 208 dev/pci/if_lmc.c data |= LMC_CSR_READ(sc, csr_srom_mii) & SROMDIN ? 1 : 0;
sc 211 dev/pci/if_lmc.c sc->lmc_rombuf[idx*2] = data & 0xFF;
sc 212 dev/pci/if_lmc.c sc->lmc_rombuf[idx*2+1] = data >> 8;
sc 216 dev/pci/if_lmc.c lmc_srom_idle(sc);
sc 219 dev/pci/if_lmc.c #define MII_EMIT do { LMC_CSR_WRITE(sc, csr_srom_mii, csr); lmc_delay_300ns(sc); } while (0)
sc 222 dev/pci/if_lmc.c lmc_mii_writebits(lmc_softc_t * const sc, unsigned data, unsigned bits)
sc 225 dev/pci/if_lmc.c unsigned csr = LMC_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK);
sc 242 dev/pci/if_lmc.c lmc_mii_turnaround(lmc_softc_t * const sc, u_int32_t cmd)
sc 246 dev/pci/if_lmc.c csr = LMC_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK);
sc 260 dev/pci/if_lmc.c lmc_mii_readbits(lmc_softc_t * const sc)
sc 263 dev/pci/if_lmc.c u_int32_t csr = LMC_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK);
sc 269 dev/pci/if_lmc.c if (LMC_CSR_READ(sc, csr_srom_mii) & MII_DIN)
sc 279 dev/pci/if_lmc.c lmc_mii_readreg(lmc_softc_t * const sc, u_int32_t devaddr, u_int32_t regno)
sc 281 dev/pci/if_lmc.c u_int32_t csr = LMC_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK);
sc 285 dev/pci/if_lmc.c lmc_mii_writebits(sc, MII_PREAMBLE, 32);
sc 286 dev/pci/if_lmc.c lmc_mii_writebits(sc, MII_RDCMD, 8);
sc 287 dev/pci/if_lmc.c lmc_mii_writebits(sc, devaddr, 5);
sc 288 dev/pci/if_lmc.c lmc_mii_writebits(sc, regno, 5);
sc 289 dev/pci/if_lmc.c lmc_mii_turnaround(sc, MII_RDCMD);
sc 291 dev/pci/if_lmc.c data = lmc_mii_readbits(sc);
sc 296 dev/pci/if_lmc.c lmc_mii_writereg(lmc_softc_t * const sc, u_int32_t devaddr,
sc 301 dev/pci/if_lmc.c csr = LMC_CSR_READ(sc, csr_srom_mii) & (MII_RD|MII_DOUT|MII_CLK);
sc 303 dev/pci/if_lmc.c lmc_mii_writebits(sc, MII_PREAMBLE, 32);
sc 304 dev/pci/if_lmc.c lmc_mii_writebits(sc, MII_WRCMD, 8);
sc 305 dev/pci/if_lmc.c lmc_mii_writebits(sc, devaddr, 5);
sc 306 dev/pci/if_lmc.c lmc_mii_writebits(sc, regno, 5);
sc 307 dev/pci/if_lmc.c lmc_mii_turnaround(sc, MII_WRCMD);
sc 308 dev/pci/if_lmc.c lmc_mii_writebits(sc, data, 16);
sc 312 dev/pci/if_lmc.c lmc_read_macaddr(lmc_softc_t * const sc)
sc 314 dev/pci/if_lmc.c lmc_srom_read(sc);
sc 316 dev/pci/if_lmc.c bcopy(sc->lmc_rombuf + 20, sc->lmc_enaddr, 6);
sc 328 dev/pci/if_lmc.c lmc_softc_t * const sc = LMC_IFP_TO_SOFTC(ifp);
sc 340 dev/pci/if_lmc.c LMC_CSR_WRITE (sc, csr_15, 0x00000011);
sc 341 dev/pci/if_lmc.c sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
sc 342 dev/pci/if_lmc.c LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
sc 345 dev/pci/if_lmc.c ticks = LMC_CSR_READ (sc, csr_gp_timer);
sc 350 dev/pci/if_lmc.c if (sc->tx_clockState != 0)
sc 352 dev/pci/if_lmc.c sc->tx_clockState = 0;
sc 353 dev/pci/if_lmc.c if (sc->lmc_cardtype == LMC_CARDTYPE_SSI)
sc 354 dev/pci/if_lmc.c lmc_led_on (sc, LMC_MII16_LED3); /* ON red */
sc 357 dev/pci/if_lmc.c if (sc->tx_clockState == 0)
sc 359 dev/pci/if_lmc.c sc->tx_clockState = 1;
sc 360 dev/pci/if_lmc.c if (sc->lmc_cardtype == LMC_CARDTYPE_SSI)
sc 361 dev/pci/if_lmc.c lmc_led_off (sc, LMC_MII16_LED3); /* OFF red */
sc 365 dev/pci/if_lmc.c link_status = sc->lmc_media->get_link_status(sc);
sc 366 dev/pci/if_lmc.c ostatus = ((sc->lmc_flags & LMC_MODEMOK) == LMC_MODEMOK);
sc 375 dev/pci/if_lmc.c sc->lmc_flags &= ~LMC_MODEMOK;
sc 376 dev/pci/if_lmc.c if (sc->lmc_cardtype == LMC_CARDTYPE_DS3 ||
sc 377 dev/pci/if_lmc.c sc->lmc_cardtype == LMC_CARDTYPE_T1)
sc 378 dev/pci/if_lmc.c lmc_led_on (sc, LMC_DS3_LED3 | LMC_DS3_LED2);
sc 381 dev/pci/if_lmc.c lmc_led_off (sc, LMC_MII16_LED1);
sc 382 dev/pci/if_lmc.c lmc_led_on (sc, LMC_MII16_LED0);
sc 383 dev/pci/if_lmc.c if (sc->lmc_timing == LMC_CTL_CLOCK_SOURCE_EXT)
sc 384 dev/pci/if_lmc.c lmc_led_on (sc, LMC_MII16_LED3);
sc 396 dev/pci/if_lmc.c if (sc->lmc_flags & LMC_IFUP)
sc 397 dev/pci/if_lmc.c lmc_ifup(sc);
sc 398 dev/pci/if_lmc.c sc->lmc_flags |= LMC_MODEMOK;
sc 399 dev/pci/if_lmc.c if (sc->lmc_cardtype == LMC_CARDTYPE_DS3 ||
sc 400 dev/pci/if_lmc.c sc->lmc_cardtype == LMC_CARDTYPE_T1)
sc 402 dev/pci/if_lmc.c sc->lmc_miireg16 |= LMC_DS3_LED3;
sc 403 dev/pci/if_lmc.c lmc_led_off (sc, LMC_DS3_LED3);
sc 405 dev/pci/if_lmc.c lmc_led_on (sc, LMC_DS3_LED2);
sc 407 dev/pci/if_lmc.c lmc_led_on (sc, LMC_MII16_LED0 | LMC_MII16_LED1
sc 409 dev/pci/if_lmc.c if (sc->lmc_timing != LMC_CTL_CLOCK_SOURCE_EXT)
sc 410 dev/pci/if_lmc.c lmc_led_off (sc, LMC_MII16_LED3);
sc 417 dev/pci/if_lmc.c sc->lmc_media->watchdog(sc);
sc 422 dev/pci/if_lmc.c ticks = LMC_CSR_READ(sc, csr_gp_timer);
sc 423 dev/pci/if_lmc.c LMC_CSR_WRITE(sc, csr_gp_timer, 0xffffffffUL);
sc 424 dev/pci/if_lmc.c sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
sc 434 dev/pci/if_lmc.c lmc_ifup(lmc_softc_t * const sc)
sc 436 dev/pci/if_lmc.c sc->lmc_if.if_timer = 0;
sc 438 dev/pci/if_lmc.c lmc_dec_reset(sc);
sc 439 dev/pci/if_lmc.c lmc_reset(sc);
sc 441 dev/pci/if_lmc.c sc->lmc_media->set_link_status(sc, LMC_LINK_UP);
sc 442 dev/pci/if_lmc.c sc->lmc_media->set_status(sc, NULL);
sc 444 dev/pci/if_lmc.c sc->lmc_flags |= LMC_IFUP;
sc 449 dev/pci/if_lmc.c if (sc->lmc_cardtype == LMC_CARDTYPE_DS3 ||
sc 450 dev/pci/if_lmc.c sc->lmc_cardtype == LMC_CARDTYPE_T1)
sc 451 dev/pci/if_lmc.c lmc_led_on (sc, LMC_MII16_LED2);
sc 453 dev/pci/if_lmc.c lmc_led_on (sc, LMC_MII16_LED0 | LMC_MII16_LED2);
sc 458 dev/pci/if_lmc.c sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
sc 468 dev/pci/if_lmc.c LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
sc 470 dev/pci/if_lmc.c sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
sc 471 dev/pci/if_lmc.c sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
sc 472 dev/pci/if_lmc.c LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
sc 474 dev/pci/if_lmc.c sc->lmc_if.if_timer = 1;
sc 482 dev/pci/if_lmc.c lmc_ifdown(lmc_softc_t * const sc)
sc 484 dev/pci/if_lmc.c sc->lmc_if.if_timer = 0;
sc 485 dev/pci/if_lmc.c sc->lmc_flags &= ~LMC_IFUP;
sc 487 dev/pci/if_lmc.c sc->lmc_media->set_link_status(sc, LMC_LINK_DOWN);
sc 488 dev/pci/if_lmc.c lmc_led_off(sc, LMC_MII16_LED_ALL);
sc 490 dev/pci/if_lmc.c lmc_dec_reset(sc);
sc 491 dev/pci/if_lmc.c lmc_reset(sc);
sc 492 dev/pci/if_lmc.c sc->lmc_media->set_status(sc, NULL);
sc 496 dev/pci/if_lmc.c lmc_rx_intr(lmc_softc_t * const sc)
sc 498 dev/pci/if_lmc.c lmc_ringinfo_t * const ri = &sc->lmc_rxinfo;
sc 499 dev/pci/if_lmc.c struct ifnet * const ifp = &sc->lmc_if;
sc 503 dev/pci/if_lmc.c sc->lmc_rxtick++;
sc 513 dev/pci/if_lmc.c if (fillok && sc->lmc_rxq.ifq_len < LMC_RXQ_TARGET)
sc 527 dev/pci/if_lmc.c LMC_RXDESC_POSTSYNC(sc, eop, sizeof(*eop));
sc 532 dev/pci/if_lmc.c IF_DEQUEUE(&sc->lmc_rxq, ms);
sc 550 dev/pci/if_lmc.c LMC_RXDESC_POSTSYNC(sc, eop, sizeof(*eop));
sc 573 dev/pci/if_lmc.c IF_DEQUEUE(&sc->lmc_rxq, ms);
sc 576 dev/pci/if_lmc.c LMC_RXMAP_POSTSYNC(sc, map);
sc 577 dev/pci/if_lmc.c bus_dmamap_unload(sc->lmc_dmatag, map);
sc 578 dev/pci/if_lmc.c sc->lmc_rxmaps[sc->lmc_rxmaps_free++] = map;
sc 584 dev/pci/if_lmc.c IF_DEQUEUE(&sc->lmc_rxq, me->m_next);
sc 593 dev/pci/if_lmc.c if (sc->ictl.crc_length == 16)
sc 598 dev/pci/if_lmc.c if ((sc->lmc_flags & LMC_RXIGNORE) == 0
sc 601 dev/pci/if_lmc.c || (total_len <= sc->lmc_if.if_mtu + PPP_HEADER_LEN
sc 607 dev/pci/if_lmc.c bus_dmamap_sync(sc->lmc_dmatag, map, 0, me->m_len,
sc 609 dev/pci/if_lmc.c bus_dmamap_unload(sc->lmc_dmatag, map);
sc 610 dev/pci/if_lmc.c sc->lmc_rxmaps[sc->lmc_rxmaps_free++] = map;
sc 617 dev/pci/if_lmc.c if (sc->lmc_bpf != NULL) {
sc 619 dev/pci/if_lmc.c LMC_BPF_TAP(sc, mtod(ms, caddr_t),
sc 622 dev/pci/if_lmc.c LMC_BPF_MTAP(sc, ms, BPF_DIRECTION_IN);
sc 625 dev/pci/if_lmc.c sc->lmc_flags |= LMC_RXACT;
sc 630 dev/pci/if_lmc.c sc->lmc_dot3stats.dot3StatsInternalMacReceiveErrors++;
sc 633 dev/pci/if_lmc.c bus_dmamap_unload(sc->lmc_dmatag, map);
sc 634 dev/pci/if_lmc.c sc->lmc_rxmaps[sc->lmc_rxmaps_free++] = map;
sc 682 dev/pci/if_lmc.c sc->lmc_flags |= LMC_RXBUFSLOW;
sc 693 dev/pci/if_lmc.c if (sc->lmc_rxmaps_free > 0) {
sc 694 dev/pci/if_lmc.c map = sc->lmc_rxmaps[--sc->lmc_rxmaps_free];
sc 697 dev/pci/if_lmc.c sc->lmc_flags |= LMC_RXBUFSLOW;
sc 699 dev/pci/if_lmc.c sc->lmc_dbg.dbg_rxlowbufs++;
sc 704 dev/pci/if_lmc.c error = bus_dmamap_load(sc->lmc_dmatag, map,
sc 733 dev/pci/if_lmc.c LMC_RXDESC_POSTSYNC(sc, nextout, sizeof(*nextout));
sc 735 dev/pci/if_lmc.c LMC_RXDESC_POSTSYNC(sc, nextout, sizeof(u_int32_t));
sc 740 dev/pci/if_lmc.c IF_ENQUEUE(&sc->lmc_rxq, ms);
sc 743 dev/pci/if_lmc.c if (sc->lmc_rxq.ifq_len >= LMC_RXQ_TARGET)
sc 744 dev/pci/if_lmc.c sc->lmc_flags &= ~LMC_RXBUFSLOW;
sc 749 dev/pci/if_lmc.c lmc_tx_intr(lmc_softc_t * const sc)
sc 751 dev/pci/if_lmc.c lmc_ringinfo_t * const ri = &sc->lmc_txinfo;
sc 757 dev/pci/if_lmc.c sc->lmc_txtick++;
sc 762 dev/pci/if_lmc.c LMC_TXDESC_POSTSYNC(sc, ri->ri_nextin, sizeof(*ri->ri_nextin));
sc 769 dev/pci/if_lmc.c IF_DEQUEUE(&sc->lmc_txq, m);
sc 772 dev/pci/if_lmc.c LMC_TXMAP_POSTSYNC(sc, map);
sc 773 dev/pci/if_lmc.c sc->lmc_txmaps[sc->lmc_txmaps_free++] = map;
sc 775 dev/pci/if_lmc.c if (sc->lmc_bpf != NULL)
sc 776 dev/pci/if_lmc.c LMC_BPF_MTAP(sc, m, BPF_DIRECTION_OUT);
sc 786 dev/pci/if_lmc.c sc->lmc_if.if_oerrors++;
sc 788 dev/pci/if_lmc.c sc->lmc_dot3stats.dot3StatsInternalTransmitUnderflows++;
sc 792 dev/pci/if_lmc.c sc->lmc_dot3stats.dot3StatsDeferredTransmissions++;
sc 802 dev/pci/if_lmc.c sc->lmc_if.if_flags &= ~IFF_OACTIVE;
sc 808 dev/pci/if_lmc.c sc->lmc_if.if_opackets += xmits;
sc 814 dev/pci/if_lmc.c lmc_print_abnormal_interrupt (lmc_softc_t * const sc, u_int32_t csr)
sc 831 dev/pci/if_lmc.c lmc_intr_handler(lmc_softc_t * const sc, int *progress_p)
sc 835 dev/pci/if_lmc.c while ((csr = LMC_CSR_READ(sc, csr_status)) & sc->lmc_intrmask) {
sc 838 dev/pci/if_lmc.c LMC_CSR_WRITE(sc, csr_status, csr);
sc 841 dev/pci/if_lmc.c sc->lmc_last_system_error = (csr & TULIP_STS_ERRORMASK) >> TULIP_STS_ERR_SHIFT;
sc 842 dev/pci/if_lmc.c if (sc->lmc_flags & LMC_NOMESSAGES) {
sc 843 dev/pci/if_lmc.c sc->lmc_flags |= LMC_SYSTEMERROR;
sc 847 dev/pci/if_lmc.c lmc_system_errors[sc->lmc_last_system_error]);
sc 849 dev/pci/if_lmc.c sc->lmc_flags |= LMC_NEEDRESET;
sc 850 dev/pci/if_lmc.c sc->lmc_system_errors++;
sc 854 dev/pci/if_lmc.c u_int32_t misses = LMC_CSR_READ(sc, csr_missed_frames);
sc 856 dev/pci/if_lmc.c sc->lmc_dot3stats.dot3StatsMissedFrames += misses & 0xFFFF;
sc 861 dev/pci/if_lmc.c if ((misses & 0x0FFE0000) && (sc->lmc_features & LMC_HAVE_RXBADOVRFLW)) {
sc 862 dev/pci/if_lmc.c sc->lmc_dot3stats.dot3StatsInternalMacReceiveErrors++;
sc 867 dev/pci/if_lmc.c LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode & ~TULIP_CMD_RXRUN);
sc 868 dev/pci/if_lmc.c while ((LMC_CSR_READ(sc, csr_status) & TULIP_STS_RXSTOPPED) == 0)
sc 870 dev/pci/if_lmc.c LMC_CSR_WRITE(sc, csr_status, TULIP_STS_RXSTOPPED);
sc 871 dev/pci/if_lmc.c sc->lmc_flags |= LMC_RXIGNORE;
sc 873 dev/pci/if_lmc.c lmc_rx_intr(sc);
sc 874 dev/pci/if_lmc.c if (sc->lmc_flags & LMC_RXIGNORE) {
sc 878 dev/pci/if_lmc.c sc->lmc_flags &= ~LMC_RXIGNORE;
sc 879 dev/pci/if_lmc.c LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
sc 883 dev/pci/if_lmc.c u_int32_t tmp = csr & sc->lmc_intrmask
sc 886 dev/pci/if_lmc.c if ((sc->lmc_cmdmode & TULIP_CMD_THRESHOLDCTL) != TULIP_CMD_THRSHLD160) {
sc 887 dev/pci/if_lmc.c sc->lmc_cmdmode += TULIP_CMD_THRSHLD96;
sc 888 dev/pci/if_lmc.c sc->lmc_flags |= LMC_NEWTXTHRESH;
sc 889 dev/pci/if_lmc.c } else if (sc->lmc_features & LMC_HAVE_STOREFWD) {
sc 890 dev/pci/if_lmc.c sc->lmc_cmdmode |= TULIP_CMD_STOREFWD;
sc 891 dev/pci/if_lmc.c sc->lmc_flags |= LMC_NEWTXTHRESH;
sc 894 dev/pci/if_lmc.c if (sc->lmc_flags & LMC_NOMESSAGES) {
sc 895 dev/pci/if_lmc.c sc->lmc_statusbits |= tmp;
sc 897 dev/pci/if_lmc.c lmc_print_abnormal_interrupt(sc, tmp);
sc 898 dev/pci/if_lmc.c sc->lmc_flags |= LMC_NOMESSAGES;
sc 900 dev/pci/if_lmc.c LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
sc 904 dev/pci/if_lmc.c lmc_tx_intr(sc);
sc 906 dev/pci/if_lmc.c if (sc->lmc_flags & LMC_WANTTXSTART)
sc 907 dev/pci/if_lmc.c lmc_ifstart(&sc->lmc_if);
sc 914 dev/pci/if_lmc.c lmc_softc_t * sc = (lmc_softc_t *) arg;
sc 917 dev/pci/if_lmc.c lmc_intr_handler(sc, &progress);
sc 985 dev/pci/if_lmc.c lmc_txput(lmc_softc_t * const sc, struct mbuf *m)
sc 987 dev/pci/if_lmc.c lmc_ringinfo_t * const ri = &sc->lmc_txinfo;
sc 995 dev/pci/if_lmc.c if ((sc->lmc_cmdmode & TULIP_CMD_TXRUN) == 0) {
sc 998 dev/pci/if_lmc.c sc->lmc_flags |= LMC_WANTTXSTART;
sc 1027 dev/pci/if_lmc.c if (sc->lmc_txmaps_free == 0) {
sc 1029 dev/pci/if_lmc.c sc->lmc_dbg.dbg_no_txmaps++;
sc 1031 dev/pci/if_lmc.c free += lmc_tx_intr(sc);
sc 1033 dev/pci/if_lmc.c if (sc->lmc_txmaps_free > 0) {
sc 1034 dev/pci/if_lmc.c map = sc->lmc_txmaps[sc->lmc_txmaps_free-1];
sc 1036 dev/pci/if_lmc.c sc->lmc_flags |= LMC_WANTTXSTART;
sc 1038 dev/pci/if_lmc.c sc->lmc_dbg.dbg_txput_finishes[1]++;
sc 1042 dev/pci/if_lmc.c error = bus_dmamap_load_mbuf(sc->lmc_dmatag, map, m, BUS_DMA_NOWAIT);
sc 1053 dev/pci/if_lmc.c sc->lmc_dbg.dbg_txput_finishes[2]++;
sc 1057 dev/pci/if_lmc.c error = bus_dmamap_load_mbuf(sc->lmc_dmatag, map, m,
sc 1064 dev/pci/if_lmc.c sc->lmc_dbg.dbg_txput_finishes[3]++;
sc 1073 dev/pci/if_lmc.c && (free += lmc_tx_intr(sc)) <= 0) {
sc 1080 dev/pci/if_lmc.c sc->lmc_flags |= LMC_WANTTXSTART;
sc 1082 dev/pci/if_lmc.c sc->lmc_dbg.dbg_txput_finishes[4]++;
sc 1084 dev/pci/if_lmc.c bus_dmamap_unload(sc->lmc_dmatag, map);
sc 1094 dev/pci/if_lmc.c if (sc->ictl.crc_length == 16)
sc 1113 dev/pci/if_lmc.c if (sc->ictl.crc_length == 16)
sc 1123 dev/pci/if_lmc.c LMC_TXMAP_PRESYNC(sc, map);
sc 1126 dev/pci/if_lmc.c --sc->lmc_txmaps_free; /* commit to using the dmamap */
sc 1132 dev/pci/if_lmc.c IF_ENQUEUE(&sc->lmc_txq, m);
sc 1141 dev/pci/if_lmc.c LMC_TXDESC_PRESYNC(sc, nextout, sizeof(u_int32_t));
sc 1164 dev/pci/if_lmc.c LMC_TXDESC_PRESYNC(sc, ri->ri_nextout,
sc 1166 dev/pci/if_lmc.c LMC_TXDESC_PRESYNC(sc, ri->ri_first,
sc 1169 dev/pci/if_lmc.c LMC_TXDESC_PRESYNC(sc, ri->ri_nextout,
sc 1173 dev/pci/if_lmc.c LMC_TXDESC_PRESYNC(sc, ri->ri_nextout, sizeof(u_int32_t));
sc 1175 dev/pci/if_lmc.c LMC_CSR_WRITE(sc, csr_txpoll, 1);
sc 1186 dev/pci/if_lmc.c sc->lmc_flags &= ~LMC_WANTTXSTART;
sc 1187 dev/pci/if_lmc.c sc->lmc_if.if_start = lmc_ifstart_one;
sc 1199 dev/pci/if_lmc.c if (sc->lmc_flags & LMC_WANTTXSTART) {
sc 1200 dev/pci/if_lmc.c sc->lmc_if.if_flags |= IFF_OACTIVE;
sc 1201 dev/pci/if_lmc.c sc->lmc_if.if_start = lmc_ifstart;
sc 1214 dev/pci/if_lmc.c lmc_softc_t * const sc = LMC_IFP_TO_SOFTC(ifp);
sc 1227 dev/pci/if_lmc.c error = copyout(&sc->ictl, ifr->ifr_data, sizeof(lmc_ctl_t));
sc 1241 dev/pci/if_lmc.c sc->lmc_media->set_status(sc, &ctl);
sc 1271 dev/pci/if_lmc.c old_state = sc->lmc_flags & LMC_IFUP;
sc 1274 dev/pci/if_lmc.c lmc_ifup(sc);
sc 1276 dev/pci/if_lmc.c lmc_ifdown(sc);
sc 1291 dev/pci/if_lmc.c lmc_softc_t * const sc = LMC_IFP_TO_SOFTC(ifp);
sc 1294 dev/pci/if_lmc.c if (sc->lmc_flags & LMC_IFUP) {
sc 1299 dev/pci/if_lmc.c if ((m = lmc_txput(sc, m)) != NULL)
sc 1307 dev/pci/if_lmc.c LMC_CSR_WRITE(sc, csr_txpoll, 1);
sc 1314 dev/pci/if_lmc.c lmc_softc_t * const sc = LMC_IFP_TO_SOFTC(ifp);
sc 1317 dev/pci/if_lmc.c if ((sc->lmc_flags & LMC_IFUP) && (sppp_isempty(ifp) == 0)) {
sc 1319 dev/pci/if_lmc.c if ((m = lmc_txput(sc, m)) != NULL)
sc 1326 dev/pci/if_lmc.c LMC_CSR_WRITE(sc, csr_txpoll, 1);
sc 1335 dev/pci/if_lmc.c lmc_attach(lmc_softc_t * const sc)
sc 1337 dev/pci/if_lmc.c struct ifnet * const ifp = &sc->lmc_if;
sc 1351 dev/pci/if_lmc.c sppp_attach((struct ifnet *)&sc->lmc_sppp);
sc 1352 dev/pci/if_lmc.c sc->lmc_sppp.pp_flags = PP_CISCO | PP_KEEPALIVE;
sc 1353 dev/pci/if_lmc.c sc->lmc_sppp.pp_framebytes = 3;
sc 1356 dev/pci/if_lmc.c LMC_BPF_ATTACH(sc);
sc 1362 dev/pci/if_lmc.c sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
sc 1366 dev/pci/if_lmc.c if (sc->lmc_cardtype == LMC_CARDTYPE_DS3 ||
sc 1367 dev/pci/if_lmc.c sc->lmc_cardtype == LMC_CARDTYPE_T1)
sc 1368 dev/pci/if_lmc.c lmc_led_on (sc, LMC_MII16_LED2);
sc 1370 dev/pci/if_lmc.c lmc_led_on (sc, LMC_MII16_LED0 | LMC_MII16_LED2);
sc 1374 dev/pci/if_lmc.c lmc_initring(lmc_softc_t * const sc, lmc_ringinfo_t * const ri,
sc 107 dev/pci/if_lmc_common.c lmc_gpio_mkinput(lmc_softc_t * const sc, u_int32_t bits)
sc 109 dev/pci/if_lmc_common.c sc->lmc_gpio_io &= ~bits;
sc 110 dev/pci/if_lmc_common.c LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
sc 114 dev/pci/if_lmc_common.c lmc_gpio_mkoutput(lmc_softc_t * const sc, u_int32_t bits)
sc 116 dev/pci/if_lmc_common.c sc->lmc_gpio_io |= bits;
sc 117 dev/pci/if_lmc_common.c LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
sc 121 dev/pci/if_lmc_common.c lmc_led_on(lmc_softc_t * const sc, u_int32_t led)
sc 123 dev/pci/if_lmc_common.c sc->lmc_miireg16 &= ~led;
sc 124 dev/pci/if_lmc_common.c lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
sc 128 dev/pci/if_lmc_common.c lmc_led_off(lmc_softc_t * const sc, u_int32_t led)
sc 130 dev/pci/if_lmc_common.c sc->lmc_miireg16 |= led;
sc 131 dev/pci/if_lmc_common.c lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
sc 135 dev/pci/if_lmc_common.c lmc_reset(lmc_softc_t * const sc)
sc 137 dev/pci/if_lmc_common.c sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
sc 138 dev/pci/if_lmc_common.c lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
sc 140 dev/pci/if_lmc_common.c sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
sc 141 dev/pci/if_lmc_common.c lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
sc 146 dev/pci/if_lmc_common.c lmc_gpio_mkoutput(sc, LMC_GEP_DP | LMC_GEP_RESET);
sc 153 dev/pci/if_lmc_common.c sc->lmc_gpio &= ~(LMC_GEP_DP | LMC_GEP_RESET);
sc 154 dev/pci/if_lmc_common.c LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
sc 164 dev/pci/if_lmc_common.c lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
sc 169 dev/pci/if_lmc_common.c while ((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0);
sc 174 dev/pci/if_lmc_common.c sc->lmc_media->init(sc);
sc 178 dev/pci/if_lmc_common.c lmc_dec_reset(lmc_softc_t * const sc)
sc 189 dev/pci/if_lmc_common.c sc->lmc_intrmask = 0;
sc 190 dev/pci/if_lmc_common.c LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
sc 196 dev/pci/if_lmc_common.c sc->lmc_flags &= ~(LMC_IFUP | LMC_MODEMOK);
sc 207 dev/pci/if_lmc_common.c LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
sc 209 dev/pci/if_lmc_common.c sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
sc 225 dev/pci/if_lmc_common.c sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
sc 233 dev/pci/if_lmc_common.c sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
sc 239 dev/pci/if_lmc_common.c LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
sc 244 dev/pci/if_lmc_common.c val = LMC_CSR_READ(sc, csr_sia_general);
sc 246 dev/pci/if_lmc_common.c LMC_CSR_WRITE(sc, csr_sia_general, val);
sc 251 dev/pci/if_lmc_common.c sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
sc 252 dev/pci/if_lmc_common.c lmc_led_on(sc, LMC_MII16_LED0);
sc 258 dev/pci/if_lmc_common.c LMC_CSR_WRITE(sc, csr_txlist, sc->lmc_txdescmap->dm_segs[0].ds_addr);
sc 259 dev/pci/if_lmc_common.c LMC_CSR_WRITE(sc, csr_rxlist, sc->lmc_rxdescmap->dm_segs[0].ds_addr);
sc 260 dev/pci/if_lmc_common.c LMC_CSR_WRITE(sc, csr_busmode,
sc 261 dev/pci/if_lmc_common.c (1 << (LMC_BURSTSIZE(sc->lmc_unit) + 8))
sc 265 dev/pci/if_lmc_common.c sc->lmc_txq.ifq_maxlen = LMC_TXDESCS;
sc 274 dev/pci/if_lmc_common.c IF_DEQUEUE(&sc->lmc_txq, m);
sc 278 dev/pci/if_lmc_common.c bus_dmamap_unload(sc->lmc_dmatag, map);
sc 279 dev/pci/if_lmc_common.c sc->lmc_txmaps[sc->lmc_txmaps_free++] = map;
sc 286 dev/pci/if_lmc_common.c ri = &sc->lmc_txinfo;
sc 291 dev/pci/if_lmc_common.c bus_dmamap_sync(sc->lmc_dmatag, sc->lmc_txdescmap,
sc 292 dev/pci/if_lmc_common.c 0, sc->lmc_txdescmap->dm_mapsize,
sc 301 dev/pci/if_lmc_common.c ri = &sc->lmc_rxinfo;
sc 311 dev/pci/if_lmc_common.c bus_dmamap_sync(sc->lmc_dmatag, sc->lmc_rxdescmap,
sc 312 dev/pci/if_lmc_common.c 0, sc->lmc_rxdescmap->dm_mapsize,
sc 317 dev/pci/if_lmc_common.c IF_DEQUEUE(&sc->lmc_rxq, m);
sc 321 dev/pci/if_lmc_common.c bus_dmamap_unload(sc->lmc_dmatag, map);
sc 322 dev/pci/if_lmc_common.c sc->lmc_rxmaps[sc->lmc_rxmaps_free++] = map;
sc 329 dev/pci/if_lmc_common.c lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base,
sc 332 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_busmode = csr_base + 0 * csr_size;
sc 333 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_txpoll = csr_base + 1 * csr_size;
sc 334 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_rxpoll = csr_base + 2 * csr_size;
sc 335 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_rxlist = csr_base + 3 * csr_size;
sc 336 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_txlist = csr_base + 4 * csr_size;
sc 337 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_status = csr_base + 5 * csr_size;
sc 338 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_command = csr_base + 6 * csr_size;
sc 339 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_intr = csr_base + 7 * csr_size;
sc 340 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_missed_frames = csr_base + 8 * csr_size;
sc 341 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_9 = csr_base + 9 * csr_size;
sc 342 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_10 = csr_base + 10 * csr_size;
sc 343 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_11 = csr_base + 11 * csr_size;
sc 344 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_12 = csr_base + 12 * csr_size;
sc 345 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_13 = csr_base + 13 * csr_size;
sc 346 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_14 = csr_base + 14 * csr_size;
sc 347 dev/pci/if_lmc_common.c sc->lmc_csrs.csr_15 = csr_base + 15 * csr_size;
sc 200 dev/pci/if_lmc_media.c lmc_dummy_set_1(lmc_softc_t * const sc, int a)
sc 205 dev/pci/if_lmc_media.c lmc_dummy_set2_1(lmc_softc_t * const sc, lmc_ctl_t *a)
sc 214 dev/pci/if_lmc_media.c lmc_hssi_init(lmc_softc_t * const sc)
sc 216 dev/pci/if_lmc_media.c sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5200;
sc 218 dev/pci/if_lmc_media.c lmc_gpio_mkoutput(sc, LMC_GEP_HSSI_CLOCK);
sc 222 dev/pci/if_lmc_media.c lmc_hssi_default(lmc_softc_t * const sc)
sc 224 dev/pci/if_lmc_media.c sc->lmc_miireg16 = LMC_MII16_LED_ALL;
sc 226 dev/pci/if_lmc_media.c sc->lmc_media->set_link_status(sc, LMC_LINK_DOWN);
sc 227 dev/pci/if_lmc_media.c sc->lmc_media->set_clock_source(sc, LMC_CTL_CLOCK_SOURCE_EXT);
sc 228 dev/pci/if_lmc_media.c sc->lmc_media->set_crc_length(sc, LMC_CTL_CRC_LENGTH_16);
sc 236 dev/pci/if_lmc_media.c lmc_hssi_set_status(lmc_softc_t * const sc, lmc_ctl_t *ctl)
sc 239 dev/pci/if_lmc_media.c sc->lmc_media->set_clock_source(sc, sc->ictl.clock_source);
sc 240 dev/pci/if_lmc_media.c lmc_set_protocol(sc, NULL);
sc 248 dev/pci/if_lmc_media.c if (ctl->clock_source && !sc->ictl.clock_source) {
sc 249 dev/pci/if_lmc_media.c sc->lmc_media->set_clock_source(sc, LMC_CTL_CLOCK_SOURCE_INT);
sc 250 dev/pci/if_lmc_media.c sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
sc 251 dev/pci/if_lmc_media.c } else if (!ctl->clock_source && sc->ictl.clock_source) {
sc 252 dev/pci/if_lmc_media.c sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
sc 253 dev/pci/if_lmc_media.c sc->lmc_media->set_clock_source(sc, LMC_CTL_CLOCK_SOURCE_EXT);
sc 256 dev/pci/if_lmc_media.c lmc_set_protocol(sc, ctl);
sc 263 dev/pci/if_lmc_media.c lmc_hssi_set_clock(lmc_softc_t * const sc, int ie)
sc 266 dev/pci/if_lmc_media.c sc->lmc_gpio |= LMC_GEP_HSSI_CLOCK;
sc 267 dev/pci/if_lmc_media.c LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
sc 268 dev/pci/if_lmc_media.c sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
sc 272 dev/pci/if_lmc_media.c sc->lmc_gpio &= ~(LMC_GEP_HSSI_CLOCK);
sc 273 dev/pci/if_lmc_media.c LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
sc 274 dev/pci/if_lmc_media.c sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
sc 285 dev/pci/if_lmc_media.c lmc_hssi_get_link_status(lmc_softc_t * const sc)
sc 289 dev/pci/if_lmc_media.c link_status = lmc_mii_readreg(sc, 0, 16);
sc 298 dev/pci/if_lmc_media.c lmc_hssi_set_link_status(lmc_softc_t * const sc, int state)
sc 301 dev/pci/if_lmc_media.c sc->lmc_miireg16 |= LMC_MII16_HSSI_TA;
sc 303 dev/pci/if_lmc_media.c sc->lmc_miireg16 &= ~LMC_MII16_HSSI_TA;
sc 305 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
sc 312 dev/pci/if_lmc_media.c lmc_hssi_set_crc_length(lmc_softc_t * const sc, int state)
sc 316 dev/pci/if_lmc_media.c sc->lmc_miireg16 |= LMC_MII16_HSSI_CRC;
sc 317 dev/pci/if_lmc_media.c sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
sc 320 dev/pci/if_lmc_media.c sc->lmc_miireg16 &= ~LMC_MII16_HSSI_CRC;
sc 321 dev/pci/if_lmc_media.c sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
sc 324 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
sc 328 dev/pci/if_lmc_media.c lmc_hssi_watchdog (lmc_softc_t * const sc)
sc 334 dev/pci/if_lmc_media.c lmc_ds3_watchdog (lmc_softc_t * const sc)
sc 336 dev/pci/if_lmc_media.c sc->lmc_miireg16 = lmc_mii_readreg (sc, 0, 16);
sc 337 dev/pci/if_lmc_media.c if (sc->lmc_miireg16 & 0x0018)
sc 339 dev/pci/if_lmc_media.c printf("%s: AIS Received\n", sc->lmc_xname);
sc 340 dev/pci/if_lmc_media.c lmc_led_on (sc, LMC_DS3_LED1 | LMC_DS3_LED2);
sc 352 dev/pci/if_lmc_media.c lmc_ds3_set_100ft(lmc_softc_t * const sc, int ie)
sc 355 dev/pci/if_lmc_media.c sc->lmc_miireg16 &= ~LMC_MII16_DS3_ZERO;
sc 356 dev/pci/if_lmc_media.c sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_GT_100FT;
sc 358 dev/pci/if_lmc_media.c sc->lmc_miireg16 |= LMC_MII16_DS3_ZERO;
sc 359 dev/pci/if_lmc_media.c sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_LT_100FT;
sc 361 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
sc 365 dev/pci/if_lmc_media.c lmc_ds3_default(lmc_softc_t * const sc)
sc 367 dev/pci/if_lmc_media.c sc->lmc_miireg16 = LMC_MII16_LED_ALL;
sc 369 dev/pci/if_lmc_media.c sc->lmc_media->set_link_status(sc, LMC_LINK_DOWN);
sc 370 dev/pci/if_lmc_media.c sc->lmc_media->set_cable_length(sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
sc 371 dev/pci/if_lmc_media.c sc->lmc_media->set_scrambler(sc, LMC_CTL_OFF);
sc 372 dev/pci/if_lmc_media.c sc->lmc_media->set_crc_length(sc, LMC_CTL_CRC_LENGTH_16);
sc 380 dev/pci/if_lmc_media.c lmc_ds3_set_status(lmc_softc_t * const sc, lmc_ctl_t *ctl)
sc 383 dev/pci/if_lmc_media.c sc->lmc_media->set_cable_length(sc, sc->ictl.cable_length);
sc 384 dev/pci/if_lmc_media.c sc->lmc_media->set_scrambler(sc, sc->ictl.scrambler_onoff);
sc 385 dev/pci/if_lmc_media.c lmc_set_protocol(sc, NULL);
sc 393 dev/pci/if_lmc_media.c if (ctl->cable_length && !sc->ictl.cable_length)
sc 394 dev/pci/if_lmc_media.c lmc_ds3_set_100ft(sc, LMC_CTL_CABLE_LENGTH_GT_100FT);
sc 395 dev/pci/if_lmc_media.c else if (!ctl->cable_length && sc->ictl.cable_length)
sc 396 dev/pci/if_lmc_media.c lmc_ds3_set_100ft(sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
sc 401 dev/pci/if_lmc_media.c if (ctl->scrambler_onoff && !sc->ictl.scrambler_onoff)
sc 402 dev/pci/if_lmc_media.c lmc_ds3_set_scram(sc, LMC_CTL_ON);
sc 403 dev/pci/if_lmc_media.c else if (!ctl->scrambler_onoff && sc->ictl.scrambler_onoff)
sc 404 dev/pci/if_lmc_media.c lmc_ds3_set_scram(sc, LMC_CTL_OFF);
sc 406 dev/pci/if_lmc_media.c lmc_set_protocol(sc, ctl);
sc 410 dev/pci/if_lmc_media.c lmc_ds3_init(lmc_softc_t * const sc)
sc 414 dev/pci/if_lmc_media.c sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5245;
sc 418 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 17, i);
sc 419 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 18, 0);
sc 423 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 17, 1);
sc 424 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 18, 0x05); /* ser, xtx */
sc 426 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 17, 5);
sc 427 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 18, 0x80); /* emode */
sc 429 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 17, 14);
sc 430 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 18, 0x30); /* rcgen, tcgen */
sc 434 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 17, i);
sc 435 dev/pci/if_lmc_media.c lmc_mii_readreg(sc, 0, 18);
sc 443 dev/pci/if_lmc_media.c lmc_ds3_set_scram(lmc_softc_t * const sc, int ie)
sc 446 dev/pci/if_lmc_media.c sc->lmc_miireg16 |= LMC_MII16_DS3_SCRAM;
sc 447 dev/pci/if_lmc_media.c sc->ictl.scrambler_onoff = LMC_CTL_ON;
sc 449 dev/pci/if_lmc_media.c sc->lmc_miireg16 &= ~LMC_MII16_DS3_SCRAM;
sc 450 dev/pci/if_lmc_media.c sc->ictl.scrambler_onoff = LMC_CTL_OFF;
sc 452 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
sc 460 dev/pci/if_lmc_media.c lmc_ds3_get_link_status(lmc_softc_t * const sc)
sc 464 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 17, 7);
sc 465 dev/pci/if_lmc_media.c link_status = lmc_mii_readreg(sc, 0, 18);
sc 477 dev/pci/if_lmc_media.c lmc_ds3_set_crc_length(lmc_softc_t * const sc, int state)
sc 481 dev/pci/if_lmc_media.c sc->lmc_miireg16 |= LMC_MII16_DS3_CRC;
sc 482 dev/pci/if_lmc_media.c sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
sc 485 dev/pci/if_lmc_media.c sc->lmc_miireg16 &= ~LMC_MII16_DS3_CRC;
sc 486 dev/pci/if_lmc_media.c sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
sc 489 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
sc 498 dev/pci/if_lmc_media.c lmc_ssi_init(lmc_softc_t * const sc)
sc 503 dev/pci/if_lmc_media.c sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1000;
sc 505 dev/pci/if_lmc_media.c mii17 = lmc_mii_readreg(sc, 0, 17);
sc 508 dev/pci/if_lmc_media.c sc->ictl.cable_type = cable;
sc 510 dev/pci/if_lmc_media.c lmc_gpio_mkoutput(sc, LMC_GEP_SSI_TXCLOCK);
sc 514 dev/pci/if_lmc_media.c lmc_ssi_default(lmc_softc_t * const sc)
sc 516 dev/pci/if_lmc_media.c sc->lmc_miireg16 = LMC_MII16_LED_ALL;
sc 521 dev/pci/if_lmc_media.c lmc_gpio_mkoutput(sc, LMC_GEP_SSI_TXCLOCK);
sc 523 dev/pci/if_lmc_media.c sc->lmc_media->set_link_status(sc, LMC_LINK_DOWN);
sc 524 dev/pci/if_lmc_media.c sc->lmc_media->set_clock_source(sc, LMC_CTL_CLOCK_SOURCE_EXT);
sc 525 dev/pci/if_lmc_media.c sc->lmc_media->set_speed(sc, NULL);
sc 526 dev/pci/if_lmc_media.c sc->lmc_media->set_crc_length(sc, LMC_CTL_CRC_LENGTH_16);
sc 534 dev/pci/if_lmc_media.c lmc_ssi_set_status(lmc_softc_t * const sc, lmc_ctl_t *ctl)
sc 537 dev/pci/if_lmc_media.c sc->lmc_media->set_clock_source(sc, sc->ictl.clock_source);
sc 538 dev/pci/if_lmc_media.c sc->lmc_media->set_speed(sc, &sc->ictl);
sc 539 dev/pci/if_lmc_media.c lmc_set_protocol(sc, NULL);
sc 548 dev/pci/if_lmc_media.c && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_EXT) {
sc 549 dev/pci/if_lmc_media.c sc->lmc_media->set_clock_source(sc, LMC_CTL_CLOCK_SOURCE_INT);
sc 550 dev/pci/if_lmc_media.c sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
sc 552 dev/pci/if_lmc_media.c && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_INT) {
sc 553 dev/pci/if_lmc_media.c sc->lmc_media->set_clock_source(sc, LMC_CTL_CLOCK_SOURCE_EXT);
sc 554 dev/pci/if_lmc_media.c sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
sc 557 dev/pci/if_lmc_media.c if (ctl->clock_rate != sc->ictl.clock_rate)
sc 558 dev/pci/if_lmc_media.c sc->lmc_media->set_speed(sc, ctl);
sc 560 dev/pci/if_lmc_media.c lmc_set_protocol(sc, ctl);
sc 567 dev/pci/if_lmc_media.c lmc_ssi_set_clock(lmc_softc_t * const sc, int ie)
sc 570 dev/pci/if_lmc_media.c sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
sc 571 dev/pci/if_lmc_media.c LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
sc 572 dev/pci/if_lmc_media.c sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
sc 576 dev/pci/if_lmc_media.c sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
sc 577 dev/pci/if_lmc_media.c LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
sc 578 dev/pci/if_lmc_media.c sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
sc 585 dev/pci/if_lmc_media.c lmc_ssi_set_speed(lmc_softc_t * const sc, lmc_ctl_t *ctl)
sc 587 dev/pci/if_lmc_media.c lmc_ctl_t *ictl = &sc->ictl;
sc 606 dev/pci/if_lmc_media.c write_av9110(sc, av->n, av->m, av->v, av->x, av->r);
sc 618 dev/pci/if_lmc_media.c write_av9110(sc, av->n, av->m, av->v, av->x, av->r);
sc 626 dev/pci/if_lmc_media.c lmc_ssi_get_link_status(lmc_softc_t * const sc)
sc 641 dev/pci/if_lmc_media.c link_status = LMC_CSR_READ(sc, csr_gp_timer);
sc 647 dev/pci/if_lmc_media.c link_status = lmc_mii_readreg(sc, 0, 16);
sc 660 dev/pci/if_lmc_media.c lmc_ssi_set_link_status(lmc_softc_t * const sc, int state)
sc 663 dev/pci/if_lmc_media.c sc->lmc_miireg16 |= (LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
sc 667 dev/pci/if_lmc_media.c sc->lmc_miireg16 &= ~(LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
sc 672 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
sc 680 dev/pci/if_lmc_media.c lmc_ssi_set_crc_length(lmc_softc_t * const sc, int state)
sc 684 dev/pci/if_lmc_media.c sc->lmc_miireg16 |= LMC_MII16_SSI_CRC;
sc 685 dev/pci/if_lmc_media.c sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
sc 686 dev/pci/if_lmc_media.c sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
sc 690 dev/pci/if_lmc_media.c sc->lmc_miireg16 &= ~LMC_MII16_SSI_CRC;
sc 691 dev/pci/if_lmc_media.c sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
sc 692 dev/pci/if_lmc_media.c sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
sc 695 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
sc 702 dev/pci/if_lmc_media.c write_av9110_bit(lmc_softc_t *sc, int c)
sc 707 dev/pci/if_lmc_media.c sc->lmc_gpio &= ~(LMC_GEP_SERIALCLK);
sc 709 dev/pci/if_lmc_media.c sc->lmc_gpio |= LMC_GEP_SERIAL;
sc 711 dev/pci/if_lmc_media.c sc->lmc_gpio &= ~(LMC_GEP_SERIAL);
sc 712 dev/pci/if_lmc_media.c LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
sc 717 dev/pci/if_lmc_media.c sc->lmc_gpio |= LMC_GEP_SERIALCLK;
sc 718 dev/pci/if_lmc_media.c LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
sc 723 dev/pci/if_lmc_media.c sc->lmc_gpio &= ~(LMC_GEP_SERIALCLK);
sc 724 dev/pci/if_lmc_media.c LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
sc 728 dev/pci/if_lmc_media.c write_av9110(lmc_softc_t *sc, u_int32_t n, u_int32_t m, u_int32_t v,
sc 735 dev/pci/if_lmc_media.c LMC_PRINTF_ARGS, sc->ictl.clock_rate,
sc 739 dev/pci/if_lmc_media.c sc->lmc_gpio |= LMC_GEP_SSI_GENERATOR;
sc 740 dev/pci/if_lmc_media.c sc->lmc_gpio &= ~(LMC_GEP_SERIAL | LMC_GEP_SERIALCLK);
sc 741 dev/pci/if_lmc_media.c LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
sc 747 dev/pci/if_lmc_media.c lmc_gpio_mkoutput(sc, (LMC_GEP_SERIAL | LMC_GEP_SERIALCLK
sc 750 dev/pci/if_lmc_media.c sc->lmc_gpio &= ~(LMC_GEP_SSI_GENERATOR);
sc 751 dev/pci/if_lmc_media.c LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
sc 757 dev/pci/if_lmc_media.c write_av9110_bit(sc, n >> i);
sc 759 dev/pci/if_lmc_media.c write_av9110_bit(sc, m >> i);
sc 761 dev/pci/if_lmc_media.c write_av9110_bit(sc, v >> i);
sc 763 dev/pci/if_lmc_media.c write_av9110_bit(sc, x >> i);
sc 765 dev/pci/if_lmc_media.c write_av9110_bit(sc, r >> i);
sc 767 dev/pci/if_lmc_media.c write_av9110_bit(sc, 0x17 >> i);
sc 772 dev/pci/if_lmc_media.c lmc_gpio_mkinput(sc,
sc 778 dev/pci/if_lmc_media.c lmc_ssi_watchdog (lmc_softc_t * const sc)
sc 786 dev/pci/if_lmc_media.c mii17 = lmc_mii_readreg (sc, 0, 17);
sc 789 dev/pci/if_lmc_media.c lmc_led_off (sc, LMC_MII16_LED2);
sc 792 dev/pci/if_lmc_media.c lmc_led_on (sc, LMC_MII16_LED2);
sc 805 dev/pci/if_lmc_media.c static void lmc_t1_write(lmc_softc_t * const sc, int a, int d)
sc 807 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 17, a);
sc 808 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 18, d);
sc 811 dev/pci/if_lmc_media.c static int lmc_t1_read(lmc_softc_t * const sc, int a)
sc 813 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 17, a);
sc 814 dev/pci/if_lmc_media.c return lmc_mii_readreg(sc, 0, 18);
sc 818 dev/pci/if_lmc_media.c lmc_t1_init(lmc_softc_t * const sc)
sc 823 dev/pci/if_lmc_media.c sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1200;
sc 824 dev/pci/if_lmc_media.c mii16 = lmc_mii_readreg(sc, 0, 16);
sc 827 dev/pci/if_lmc_media.c lmc_mii_writereg (sc, 0, 16, mii16);
sc 828 dev/pci/if_lmc_media.c sc->lmc_miireg16 = mii16;
sc 832 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 16, mii16 | LMC_MII16_T1_RST);
sc 833 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 16, mii16);
sc 838 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 16, mii16);
sc 841 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x01, 0x1B); /* CR0 - primary control */
sc 842 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x02, 0x42); /* JAT_CR - jitter atten config */
sc 843 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x14, 0x00); /* LOOP - loopback config */
sc 844 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x15, 0x00); /* DL3_TS - xtrnl datalink timeslot */
sc 845 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x18, 0xFF); /* PIO - programmable I/O */
sc 846 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x19, 0x30); /* POE - programmable OE */
sc 847 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x1A, 0x0F); /* CMUX - clock input mux */
sc 848 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x20, 0x41); /* LIU_CR - RX LIU config */
sc 849 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x22, 0x76); /* RLIU_CR - RX LIU config */
sc 850 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x40, 0x03); /* RCR0 - RX config */
sc 851 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x45, 0x00); /* RALM - RX alarm config */
sc 852 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x46, 0x05); /* LATCH - RX alarm/err/cntr latch */
sc 853 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x68, 0x40); /* TLIU_CR - TX LIU config */
sc 854 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x70, 0x0D); /* TCR0 - TX framer config */
sc 855 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x71, 0x05); /* TCR1 - TX config */
sc 856 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x72, 0x0B); /* TFRM - TX frame format */
sc 857 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x73, 0x00); /* TERROR - TX error insert */
sc 858 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x74, 0x00); /* TMAN - TX manual Sa/FEBE config */
sc 859 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x75, 0x00); /* TALM - TX alarm signal config */
sc 860 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x76, 0x00); /* TPATT - TX test pattern config */
sc 861 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x77, 0x00); /* TLB - TX inband loopback confg */
sc 862 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x90, 0x05); /* CLAD_CR - clock rate adapter confg */
sc 863 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x91, 0x05); /* CSEL - clad freq sel */
sc 864 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0xA6, 0x00); /* DL1_CTL - DL1 control */
sc 865 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0xB1, 0x00); /* DL2_CTL - DL2 control */
sc 866 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0xD0, 0x47); /* SBI_CR - sys bus iface config */
sc 867 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0xD1, 0x70); /* RSB_CR - RX sys bus config */
sc 868 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0xD4, 0x30); /* TSB_CR - TX sys bus config */
sc 871 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x0E0+i, 0x00); /*SBCn sysbus perchannel ctl */
sc 872 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x100+i, 0x00); /* TPCn - TX per-channel ctl */
sc 873 dev/pci/if_lmc_media.c lmc_t1_write(sc, 0x180+i, 0x00); /* RPCn - RX per-channel ctl */
sc 876 dev/pci/if_lmc_media.c { lmc_t1_write(sc, 0x0E0+i, 0x0D);
sc 881 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 16, mii16);
sc 882 dev/pci/if_lmc_media.c sc->lmc_miireg16 = mii16;
sc 885 dev/pci/if_lmc_media.c static void lmc_t1_default(lmc_softc_t * const sc)
sc 887 dev/pci/if_lmc_media.c sc->lmc_miireg16 = LMC_MII16_LED_ALL;
sc 888 dev/pci/if_lmc_media.c sc->lmc_media->set_link_status(sc, LMC_LINK_DOWN);
sc 889 dev/pci/if_lmc_media.c sc->lmc_media->set_circuit_type(sc, LMC_CTL_CIRCUIT_TYPE_T1);
sc 890 dev/pci/if_lmc_media.c sc->lmc_media->set_crc_length(sc, LMC_CTL_CRC_LENGTH_16);
sc 899 dev/pci/if_lmc_media.c lmc_t1_set_status(lmc_softc_t * const sc, lmc_ctl_t *ctl){
sc 901 dev/pci/if_lmc_media.c sc->lmc_media->set_circuit_type(sc, sc->ictl.circuit_type);
sc 902 dev/pci/if_lmc_media.c lmc_set_protocol(sc, NULL);
sc 912 dev/pci/if_lmc_media.c && sc->ictl.circuit_type == LMC_CTL_CIRCUIT_TYPE_E1)
sc 913 dev/pci/if_lmc_media.c sc->lmc_media->set_circuit_type(sc,LMC_CTL_CIRCUIT_TYPE_E1 );
sc 915 dev/pci/if_lmc_media.c && sc->ictl.circuit_type == LMC_CTL_CIRCUIT_TYPE_T1)
sc 916 dev/pci/if_lmc_media.c sc->lmc_media->set_circuit_type(sc, LMC_CTL_CIRCUIT_TYPE_T1);
sc 917 dev/pci/if_lmc_media.c lmc_set_protocol(sc, ctl);
sc 926 dev/pci/if_lmc_media.c lmc_t1_get_link_status(lmc_softc_t * const sc){
sc 928 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 17, T1FRAMER_ALARM1_STATUS );
sc 929 dev/pci/if_lmc_media.c link_status = lmc_mii_readreg(sc, 0, 18);
sc 942 dev/pci/if_lmc_media.c if( (sc->t1_alarm1_status & T1F_RAIS) != (link_status & T1F_RAIS) )
sc 946 dev/pci/if_lmc_media.c printf("%s: link status: RAIS turn ON Blue %x\n", sc->lmc_xname, link_status); /* DEBUG */
sc 947 dev/pci/if_lmc_media.c lmc_led_on(sc, LMC_DS3_LED1);
sc 951 dev/pci/if_lmc_media.c printf("%s: link status: RAIS turn OFF Blue %x\n", sc->lmc_xname, link_status ); /* DEBUG */
sc 952 dev/pci/if_lmc_media.c lmc_led_off(sc, LMC_DS3_LED1);
sc 960 dev/pci/if_lmc_media.c if( (sc->t1_alarm1_status & T1F_RMYEL) !=
sc 966 dev/pci/if_lmc_media.c printf("%s: link status: RYEL turn OFF Yellow %x\n", sc->lmc_xname, link_status); /* DEBUG */
sc 967 dev/pci/if_lmc_media.c lmc_led_off(sc, LMC_DS3_LED0);
sc 973 dev/pci/if_lmc_media.c printf("%s: link status: RYEL turn ON Yellow %x\n", sc->lmc_xname, link_status); /* DEBUG */
sc 974 dev/pci/if_lmc_media.c lmc_led_on(sc, LMC_DS3_LED0);
sc 979 dev/pci/if_lmc_media.c sc->t1_alarm1_status = link_status;
sc 981 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 17, T1FRAMER_ALARM2_STATUS );
sc 982 dev/pci/if_lmc_media.c sc->t1_alarm2_status = lmc_mii_readreg(sc, 0, 18);
sc 996 dev/pci/if_lmc_media.c lmc_t1_set_circuit_type(lmc_softc_t * const sc, int ie)
sc 1000 dev/pci/if_lmc_media.c sc->lmc_miireg16 |= LMC_MII16_T1_Z;
sc 1001 dev/pci/if_lmc_media.c sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_T1;
sc 1002 dev/pci/if_lmc_media.c } else { sc->lmc_miireg16 &= ~LMC_MII16_T1_Z;
sc 1003 dev/pci/if_lmc_media.c sc->ictl.scrambler_onoff = LMC_CTL_CIRCUIT_TYPE_E1;
sc 1005 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
sc 1011 dev/pci/if_lmc_media.c lmc_t1_set_crc_length(lmc_softc_t * const sc, int state)
sc 1015 dev/pci/if_lmc_media.c sc->lmc_miireg16 |= LMC_MII16_T1_CRC;
sc 1016 dev/pci/if_lmc_media.c sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
sc 1017 dev/pci/if_lmc_media.c sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
sc 1021 dev/pci/if_lmc_media.c sc->lmc_miireg16 &= ~LMC_MII16_T1_CRC;
sc 1022 dev/pci/if_lmc_media.c sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
sc 1023 dev/pci/if_lmc_media.c sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
sc 1027 dev/pci/if_lmc_media.c lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
sc 1034 dev/pci/if_lmc_media.c lmc_t1_set_clock (lmc_softc_t * const sc, int ie)
sc 1037 dev/pci/if_lmc_media.c sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
sc 1038 dev/pci/if_lmc_media.c LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
sc 1039 dev/pci/if_lmc_media.c sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
sc 1043 dev/pci/if_lmc_media.c sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
sc 1044 dev/pci/if_lmc_media.c LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
sc 1045 dev/pci/if_lmc_media.c sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
sc 1051 dev/pci/if_lmc_media.c lmc_t1_watchdog(lmc_softc_t * const sc)
sc 1056 dev/pci/if_lmc_media.c t1stat = lmc_t1_read (sc, 0x47);
sc 1059 dev/pci/if_lmc_media.c if (sc->lmc_blue != 1)
sc 1060 dev/pci/if_lmc_media.c printf ("%s: AIS Received\n", sc->lmc_xname);
sc 1061 dev/pci/if_lmc_media.c lmc_led_on (sc, LMC_DS3_LED1 | LMC_DS3_LED2);
sc 1062 dev/pci/if_lmc_media.c sc->lmc_blue = 1;
sc 1064 dev/pci/if_lmc_media.c if (sc->lmc_blue == 1)
sc 1065 dev/pci/if_lmc_media.c printf ("%s: AIS ok\n", sc->lmc_xname);
sc 1066 dev/pci/if_lmc_media.c lmc_led_off (sc, LMC_DS3_LED1);
sc 1067 dev/pci/if_lmc_media.c lmc_led_on (sc, LMC_DS3_LED2);
sc 1068 dev/pci/if_lmc_media.c sc->lmc_blue = 0;
sc 1074 dev/pci/if_lmc_media.c if (sc->lmc_red != 1)
sc 1075 dev/pci/if_lmc_media.c printf ("%s: Red Alarm\n", sc->lmc_xname);
sc 1076 dev/pci/if_lmc_media.c lmc_led_on (sc, LMC_DS3_LED2 | LMC_DS3_LED3);
sc 1077 dev/pci/if_lmc_media.c sc->lmc_red = 1;
sc 1079 dev/pci/if_lmc_media.c if (sc->lmc_red == 1)
sc 1080 dev/pci/if_lmc_media.c printf ("%s: Red Alarm ok\n", sc->lmc_xname);
sc 1081 dev/pci/if_lmc_media.c lmc_led_off (sc, LMC_DS3_LED3);
sc 1082 dev/pci/if_lmc_media.c lmc_led_on (sc, LMC_DS3_LED2);
sc 1083 dev/pci/if_lmc_media.c sc->lmc_red = 0;
sc 1090 dev/pci/if_lmc_media.c if (sc->lmc_yel != 1) {
sc 1091 dev/pci/if_lmc_media.c printf ("%s: Receive Yellow Alarm\n", sc->lmc_xname);
sc 1093 dev/pci/if_lmc_media.c lmc_led_on (sc, LMC_DS3_LED0 | LMC_DS3_LED2);
sc 1094 dev/pci/if_lmc_media.c sc->lmc_yel = 1;
sc 1097 dev/pci/if_lmc_media.c if (sc->lmc_yel == 1)
sc 1098 dev/pci/if_lmc_media.c printf ("%s: Yellow Alarm ok\n", sc->lmc_xname);
sc 1099 dev/pci/if_lmc_media.c lmc_led_off (sc, LMC_DS3_LED0);
sc 1100 dev/pci/if_lmc_media.c lmc_led_on (sc, LMC_DS3_LED2);
sc 1101 dev/pci/if_lmc_media.c sc->lmc_yel = 0;
sc 1107 dev/pci/if_lmc_media.c lmc_set_protocol(lmc_softc_t * const sc, lmc_ctl_t *ctl)
sc 1110 dev/pci/if_lmc_media.c sc->ictl.keepalive_onoff = LMC_CTL_ON;
sc 1115 dev/pci/if_lmc_media.c if (ctl->keepalive_onoff != sc->ictl.keepalive_onoff) {
sc 1120 dev/pci/if_lmc_media.c sc->ictl.keepalive_onoff = LMC_CTL_ON;
sc 1121 dev/pci/if_lmc_media.c sc->lmc_sppp.pp_flags = PP_CISCO | PP_KEEPALIVE;
sc 1126 dev/pci/if_lmc_media.c sc->ictl.keepalive_onoff = LMC_CTL_OFF;
sc 1127 dev/pci/if_lmc_media.c sc->lmc_sppp.pp_flags = PP_CISCO;
sc 107 dev/pci/if_lmc_obsd.c static int lmc_busdma_init(lmc_softc_t * const sc);
sc 108 dev/pci/if_lmc_obsd.c static int lmc_busdma_allocmem(lmc_softc_t * const sc, size_t size,
sc 171 dev/pci/if_lmc_obsd.c lmc_softc_t * const sc = (lmc_softc_t *) self;
sc 186 dev/pci/if_lmc_obsd.c sc->lmc_media = &lmc_hssi_media;
sc 190 dev/pci/if_lmc_obsd.c sc->lmc_media = &lmc_hssi_media;
sc 194 dev/pci/if_lmc_obsd.c sc->lmc_media = &lmc_ds3_media;
sc 198 dev/pci/if_lmc_obsd.c sc->lmc_media = &lmc_ssi_media;
sc 202 dev/pci/if_lmc_obsd.c sc->lmc_media = &lmc_t1_media;
sc 206 dev/pci/if_lmc_obsd.c sc->lmc_pci_busno = parent;
sc 207 dev/pci/if_lmc_obsd.c sc->lmc_pci_devno = pa->pa_device;
sc 209 dev/pci/if_lmc_obsd.c sc->lmc_chipid = LMC_21140A;
sc 210 dev/pci/if_lmc_obsd.c sc->lmc_features |= LMC_HAVE_STOREFWD;
sc 211 dev/pci/if_lmc_obsd.c if (sc->lmc_chipid == LMC_21140A && revinfo <= 0x22)
sc 212 dev/pci/if_lmc_obsd.c sc->lmc_features |= LMC_HAVE_RXBADOVRFLW;
sc 220 dev/pci/if_lmc_obsd.c bcopy(self->dv_xname, sc->lmc_if.if_xname, IFNAMSIZ);
sc 221 dev/pci/if_lmc_obsd.c sc->lmc_if.if_softc = sc;
sc 222 dev/pci/if_lmc_obsd.c sc->lmc_pc = pa->pa_pc;
sc 224 dev/pci/if_lmc_obsd.c sc->lmc_revinfo = revinfo;
sc 225 dev/pci/if_lmc_obsd.c sc->lmc_if.if_softc = sc;
sc 240 dev/pci/if_lmc_obsd.c sc->lmc_bustag = memt;
sc 241 dev/pci/if_lmc_obsd.c sc->lmc_bushandle = memh;
sc 243 dev/pci/if_lmc_obsd.c sc->lmc_bustag = iot;
sc 244 dev/pci/if_lmc_obsd.c sc->lmc_bushandle = ioh;
sc 247 dev/pci/if_lmc_obsd.c sc->lmc_dev.dv_xname);
sc 252 dev/pci/if_lmc_obsd.c sc->lmc_dmatag = pa->pa_dmat;
sc 253 dev/pci/if_lmc_obsd.c if ((lmc_busdma_init(sc)) != 0) {
sc 258 dev/pci/if_lmc_obsd.c lmc_initcsrs(sc, csr_base + csroffset, csrsize);
sc 259 dev/pci/if_lmc_obsd.c lmc_initring(sc, &sc->lmc_rxinfo, sc->lmc_rxdescs,
sc 261 dev/pci/if_lmc_obsd.c lmc_initring(sc, &sc->lmc_txinfo, sc->lmc_txdescs,
sc 264 dev/pci/if_lmc_obsd.c lmc_gpio_mkinput(sc, 0xff);
sc 265 dev/pci/if_lmc_obsd.c sc->lmc_gpio = 0; /* drive no signals yet */
sc 267 dev/pci/if_lmc_obsd.c sc->lmc_media->defaults(sc);
sc 269 dev/pci/if_lmc_obsd.c sc->lmc_media->set_link_status(sc, LMC_LINK_DOWN); /* down */
sc 274 dev/pci/if_lmc_obsd.c LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
sc 283 dev/pci/if_lmc_obsd.c lmc_read_macaddr(sc);
sc 287 dev/pci/if_lmc_obsd.c sc->lmc_dev.dv_xname);
sc 292 dev/pci/if_lmc_obsd.c sc->lmc_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_NET,
sc 293 dev/pci/if_lmc_obsd.c intr_rtn, sc, self->dv_xname);
sc 295 dev/pci/if_lmc_obsd.c if (sc->lmc_ih == NULL) {
sc 297 dev/pci/if_lmc_obsd.c sc->lmc_dev.dv_xname);
sc 305 dev/pci/if_lmc_obsd.c sc->lmc_dev.dv_xname,
sc 306 dev/pci/if_lmc_obsd.c (sc->lmc_revinfo & 0xF0) >> 4, sc->lmc_revinfo & 0x0F,
sc 307 dev/pci/if_lmc_obsd.c LMC_EADDR_ARGS(sc->lmc_enaddr), intrstr);
sc 309 dev/pci/if_lmc_obsd.c sc->lmc_ats = shutdownhook_establish(lmc_shutdown, sc);
sc 310 dev/pci/if_lmc_obsd.c if (sc->lmc_ats == NULL)
sc 312 dev/pci/if_lmc_obsd.c sc->lmc_xname);
sc 315 dev/pci/if_lmc_obsd.c lmc_dec_reset(sc);
sc 316 dev/pci/if_lmc_obsd.c lmc_reset(sc);
sc 317 dev/pci/if_lmc_obsd.c lmc_attach(sc);
sc 324 dev/pci/if_lmc_obsd.c lmc_softc_t * const sc = arg;
sc 325 dev/pci/if_lmc_obsd.c LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
sc 328 dev/pci/if_lmc_obsd.c sc->lmc_miireg16 = 0; /* deassert ready, and all others too */
sc 329 dev/pci/if_lmc_obsd.c lmc_led_on(sc, LMC_MII16_LED_ALL);
sc 334 dev/pci/if_lmc_obsd.c lmc_softc_t * const sc,
sc 341 dev/pci/if_lmc_obsd.c error = bus_dmamem_alloc(sc->lmc_dmatag, size, 1, NBPG,
sc 346 dev/pci/if_lmc_obsd.c error = bus_dmamem_map(sc->lmc_dmatag, segs, nsegs, size,
sc 350 dev/pci/if_lmc_obsd.c error = bus_dmamap_create(sc->lmc_dmatag, size, 1, size, 0,
sc 353 dev/pci/if_lmc_obsd.c error = bus_dmamap_load(sc->lmc_dmatag, map, desc,
sc 356 dev/pci/if_lmc_obsd.c bus_dmamap_destroy(sc->lmc_dmatag, map);
sc 361 dev/pci/if_lmc_obsd.c bus_dmamem_unmap(sc->lmc_dmatag, desc, size);
sc 364 dev/pci/if_lmc_obsd.c bus_dmamem_free(sc->lmc_dmatag, segs, nsegs);
sc 373 dev/pci/if_lmc_obsd.c lmc_softc_t * const sc)
sc 381 dev/pci/if_lmc_obsd.c error = lmc_busdma_allocmem(sc, sizeof(lmc_desc_t) * LMC_TXDESCS,
sc 382 dev/pci/if_lmc_obsd.c &sc->lmc_txdescmap,
sc 383 dev/pci/if_lmc_obsd.c &sc->lmc_txdescs);
sc 390 dev/pci/if_lmc_obsd.c while (error == 0 && sc->lmc_txmaps_free < LMC_TXDESCS) {
sc 392 dev/pci/if_lmc_obsd.c if ((error = LMC_TXMAP_CREATE(sc, &map)) == 0)
sc 393 dev/pci/if_lmc_obsd.c sc->lmc_txmaps[sc->lmc_txmaps_free++] = map;
sc 396 dev/pci/if_lmc_obsd.c while (sc->lmc_txmaps_free > 0)
sc 397 dev/pci/if_lmc_obsd.c bus_dmamap_destroy(sc->lmc_dmatag,
sc 398 dev/pci/if_lmc_obsd.c sc->lmc_txmaps[--sc->lmc_txmaps_free]);
sc 406 dev/pci/if_lmc_obsd.c error = lmc_busdma_allocmem(sc, sizeof(lmc_desc_t) * LMC_RXDESCS,
sc 407 dev/pci/if_lmc_obsd.c &sc->lmc_rxdescmap,
sc 408 dev/pci/if_lmc_obsd.c &sc->lmc_rxdescs);
sc 415 dev/pci/if_lmc_obsd.c while (error == 0 && sc->lmc_rxmaps_free < LMC_RXDESCS) {
sc 417 dev/pci/if_lmc_obsd.c if ((error = LMC_RXMAP_CREATE(sc, &map)) == 0)
sc 418 dev/pci/if_lmc_obsd.c sc->lmc_rxmaps[sc->lmc_rxmaps_free++] = map;
sc 421 dev/pci/if_lmc_obsd.c while (sc->lmc_rxmaps_free > 0)
sc 422 dev/pci/if_lmc_obsd.c bus_dmamap_destroy(sc->lmc_dmatag,
sc 423 dev/pci/if_lmc_obsd.c sc->lmc_rxmaps[--sc->lmc_rxmaps_free]);
sc 280 dev/pci/if_lmcioctl.h u_int32_t lmc_mii_readreg(lmc_softc_t * const sc, u_int32_t devaddr,
sc 282 dev/pci/if_lmcioctl.h void lmc_mii_writereg(lmc_softc_t * const sc, u_int32_t devaddr,
sc 284 dev/pci/if_lmcioctl.h void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base,
sc 286 dev/pci/if_lmcioctl.h void lmc_dec_reset(lmc_softc_t * const sc);
sc 287 dev/pci/if_lmcioctl.h void lmc_reset(lmc_softc_t * const sc);
sc 288 dev/pci/if_lmcioctl.h void lmc_led_on(lmc_softc_t * const sc, u_int32_t led);
sc 289 dev/pci/if_lmcioctl.h void lmc_led_off(lmc_softc_t * const sc, u_int32_t led);
sc 290 dev/pci/if_lmcioctl.h void lmc_gpio_mkinput(lmc_softc_t * const sc, u_int32_t bits);
sc 291 dev/pci/if_lmcioctl.h void lmc_gpio_mkoutput(lmc_softc_t * const sc, u_int32_t bits);
sc 293 dev/pci/if_lmcioctl.h int lmc_read_macaddr(lmc_softc_t * const sc);
sc 294 dev/pci/if_lmcioctl.h void lmc_attach(lmc_softc_t * const sc);
sc 295 dev/pci/if_lmcioctl.h void lmc_initring(lmc_softc_t * const sc, lmc_ringinfo_t * const ri,
sc 140 dev/pci/if_lmcvar.h #define LMC_CSR_READ(sc, csr) \
sc 141 dev/pci/if_lmcvar.h bus_space_read_4((sc)->lmc_bustag, (sc)->lmc_bushandle, (sc)->lmc_csrs.csr)
sc 142 dev/pci/if_lmcvar.h #define LMC_CSR_WRITE(sc, csr, val) \
sc 143 dev/pci/if_lmcvar.h bus_space_write_4((sc)->lmc_bustag, (sc)->lmc_bushandle, (sc)->lmc_csrs.csr, (val))
sc 145 dev/pci/if_lmcvar.h #define LMC_CSR_READBYTE(sc, csr) \
sc 146 dev/pci/if_lmcvar.h bus_space_read_1((sc)->lmc_bustag, (sc)->lmc_bushandle, (sc)->lmc_csrs.csr)
sc 147 dev/pci/if_lmcvar.h #define LMC_CSR_WRITEBYTE(sc, csr, val) \
sc 148 dev/pci/if_lmcvar.h bus_space_write_1((sc)->lmc_bustag, (sc)->lmc_bushandle, (sc)->lmc_csrs.csr, (val))
sc 455 dev/pci/if_lmcvar.h #define LMC_RXDESC_PRESYNC(sc, di, s) \
sc 456 dev/pci/if_lmcvar.h bus_dmamap_sync((sc)->lmc_dmatag, (sc)->lmc_rxdescmap, \
sc 457 dev/pci/if_lmcvar.h (caddr_t) di - (caddr_t) (sc)->lmc_rxdescs, \
sc 459 dev/pci/if_lmcvar.h #define LMC_RXDESC_POSTSYNC(sc, di, s) \
sc 460 dev/pci/if_lmcvar.h bus_dmamap_sync((sc)->lmc_dmatag, (sc)->lmc_rxdescmap, \
sc 461 dev/pci/if_lmcvar.h (caddr_t) di - (caddr_t) (sc)->lmc_rxdescs, \
sc 463 dev/pci/if_lmcvar.h #define LMC_RXMAP_PRESYNC(sc, map) \
sc 464 dev/pci/if_lmcvar.h bus_dmamap_sync((sc)->lmc_dmatag, (map), 0, (map)->dm_mapsize, \
sc 466 dev/pci/if_lmcvar.h #define LMC_RXMAP_POSTSYNC(sc, map) \
sc 467 dev/pci/if_lmcvar.h bus_dmamap_sync((sc)->lmc_dmatag, (map), 0, (map)->dm_mapsize, \
sc 469 dev/pci/if_lmcvar.h #define LMC_RXMAP_CREATE(sc, mapp) \
sc 470 dev/pci/if_lmcvar.h bus_dmamap_create((sc)->lmc_dmatag, LMC_RX_BUFLEN, 2, \
sc 474 dev/pci/if_lmcvar.h #define LMC_TXDESC_PRESYNC(sc, di, s) \
sc 475 dev/pci/if_lmcvar.h bus_dmamap_sync((sc)->lmc_dmatag, (sc)->lmc_txdescmap, \
sc 476 dev/pci/if_lmcvar.h (caddr_t) di - (caddr_t) (sc)->lmc_txdescs, \
sc 478 dev/pci/if_lmcvar.h #define LMC_TXDESC_POSTSYNC(sc, di, s) \
sc 479 dev/pci/if_lmcvar.h bus_dmamap_sync((sc)->lmc_dmatag, (sc)->lmc_txdescmap, \
sc 480 dev/pci/if_lmcvar.h (caddr_t) di - (caddr_t) (sc)->lmc_txdescs, \
sc 482 dev/pci/if_lmcvar.h #define LMC_TXMAP_PRESYNC(sc, map) \
sc 483 dev/pci/if_lmcvar.h bus_dmamap_sync((sc)->lmc_dmatag, (map), 0, (map)->dm_mapsize, \
sc 485 dev/pci/if_lmcvar.h #define LMC_TXMAP_POSTSYNC(sc, map) \
sc 486 dev/pci/if_lmcvar.h bus_dmamap_sync((sc)->lmc_dmatag, (map), 0, (map)->dm_mapsize, \
sc 488 dev/pci/if_lmcvar.h #define LMC_TXMAP_CREATE(sc, mapp) \
sc 489 dev/pci/if_lmcvar.h bus_dmamap_create((sc)->lmc_dmatag, LMC_DATA_PER_DESC, \
sc 507 dev/pci/if_lmcvar.h #define LMC_PRINTF_ARGS sc->lmc_xname
sc 513 dev/pci/if_lmcvar.h #define LMC_PRINTF_ARGS sc->lmc_name, sc->lmc_unit
sc 547 dev/pci/if_lmcvar.h #define LMC_BPF_MTAP(sc, m, d) bpf_mtap((sc)->lmc_bpf, m, d)
sc 548 dev/pci/if_lmcvar.h #define LMC_BPF_TAP(sc, p, l, d) bpf_tap((sc)->lmc_bpf, p, l, d)
sc 549 dev/pci/if_lmcvar.h #define LMC_BPF_ATTACH(sc) bpfattach(&(sc)->lmc_bpf, &(sc)->lmc_sppp.pp_if, DLT_PPP, PPP_HEADER_LEN)
sc 95 dev/pci/if_malo_pci.c struct malo_softc *sc = &psc->sc_malo;
sc 100 dev/pci/if_malo_pci.c sc->sc_dmat = pa->pa_dmat;
sc 106 dev/pci/if_malo_pci.c &sc->sc_mem1_bt, &sc->sc_mem1_bh, NULL, &psc->sc_mapsize1, 0);
sc 115 dev/pci/if_malo_pci.c &sc->sc_mem2_bt, &sc->sc_mem2_bh, NULL, &psc->sc_mapsize2, 0);
sc 129 dev/pci/if_malo_pci.c psc->sc_ih = pci_intr_establish(psc->sc_pc, ih, IPL_NET, malo_intr, sc,
sc 130 dev/pci/if_malo_pci.c sc->sc_dev.dv_xname);
sc 140 dev/pci/if_malo_pci.c malo_attach(sc);
sc 147 dev/pci/if_malo_pci.c struct malo_softc *sc = &psc->sc_malo;
sc 149 dev/pci/if_malo_pci.c malo_detach(sc);
sc 221 dev/pci/if_msk.c sk_win_read_4(struct sk_softc *sc, u_int32_t reg)
sc 223 dev/pci/if_msk.c return CSR_READ_4(sc, reg);
sc 227 dev/pci/if_msk.c sk_win_read_2(struct sk_softc *sc, u_int32_t reg)
sc 229 dev/pci/if_msk.c return CSR_READ_2(sc, reg);
sc 233 dev/pci/if_msk.c sk_win_read_1(struct sk_softc *sc, u_int32_t reg)
sc 235 dev/pci/if_msk.c return CSR_READ_1(sc, reg);
sc 239 dev/pci/if_msk.c sk_win_write_4(struct sk_softc *sc, u_int32_t reg, u_int32_t x)
sc 241 dev/pci/if_msk.c CSR_WRITE_4(sc, reg, x);
sc 245 dev/pci/if_msk.c sk_win_write_2(struct sk_softc *sc, u_int32_t reg, u_int16_t x)
sc 247 dev/pci/if_msk.c CSR_WRITE_2(sc, reg, x);
sc 251 dev/pci/if_msk.c sk_win_write_1(struct sk_softc *sc, u_int32_t reg, u_int8_t x)
sc 253 dev/pci/if_msk.c CSR_WRITE_1(sc, reg, x);
sc 463 dev/pci/if_msk.c struct sk_softc *sc = sc_if->sk_softc;
sc 482 dev/pci/if_msk.c if (bus_dmamap_create(sc->sc_dmatag, SK_JLEN, SK_NTXSEG,
sc 488 dev/pci/if_msk.c bus_dmamap_destroy(sc->sc_dmatag, dmamap);
sc 566 dev/pci/if_msk.c struct sk_softc *sc = sc_if->sk_softc;
sc 575 dev/pci/if_msk.c if (bus_dmamem_alloc(sc->sc_dmatag, MSK_JMEM, PAGE_SIZE, 0,
sc 582 dev/pci/if_msk.c if (bus_dmamem_map(sc->sc_dmatag, &seg, rseg, MSK_JMEM, &kva,
sc 590 dev/pci/if_msk.c if (bus_dmamap_create(sc->sc_dmatag, MSK_JMEM, 1, MSK_JMEM, 0,
sc 598 dev/pci/if_msk.c if (bus_dmamap_load(sc->sc_dmatag, sc_if->sk_cdata.sk_rx_jumbo_map,
sc 636 dev/pci/if_msk.c bus_dmamap_unload(sc->sc_dmatag,
sc 639 dev/pci/if_msk.c bus_dmamap_destroy(sc->sc_dmatag,
sc 642 dev/pci/if_msk.c bus_dmamem_unmap(sc->sc_dmatag, kva, MSK_JMEM);
sc 644 dev/pci/if_msk.c bus_dmamem_free(sc->sc_dmatag, &seg, rseg);
sc 679 dev/pci/if_msk.c struct sk_if_softc *sc;
sc 683 dev/pci/if_msk.c sc = (struct sk_if_softc *)arg;
sc 685 dev/pci/if_msk.c if (sc == NULL)
sc 690 dev/pci/if_msk.c - (vaddr_t)sc->sk_cdata.sk_jumbo_buf) / SK_JLEN;
sc 695 dev/pci/if_msk.c entry = LIST_FIRST(&sc->sk_jinuse_listhead);
sc 700 dev/pci/if_msk.c LIST_INSERT_HEAD(&sc->sk_jfree_listhead, entry, jpool_entries);
sc 823 dev/pci/if_msk.c mskc_reset(struct sk_softc *sc)
sc 830 dev/pci/if_msk.c CSR_WRITE_1(sc, SK_CSR, SK_CSR_SW_RESET);
sc 831 dev/pci/if_msk.c CSR_WRITE_1(sc, SK_CSR, SK_CSR_MASTER_RESET);
sc 834 dev/pci/if_msk.c CSR_WRITE_1(sc, SK_CSR, SK_CSR_SW_UNRESET);
sc 836 dev/pci/if_msk.c CSR_WRITE_1(sc, SK_CSR, SK_CSR_MASTER_UNRESET);
sc 838 dev/pci/if_msk.c sk_win_write_1(sc, SK_TESTCTL1, 2);
sc 840 dev/pci/if_msk.c reg1 = sk_win_read_4(sc, SK_Y2_PCI_REG(SK_PCI_OURREG1));
sc 841 dev/pci/if_msk.c if (sc->sk_type == SK_YUKON_XL && sc->sk_rev > SK_YUKON_XL_REV_A1)
sc 845 dev/pci/if_msk.c sk_win_write_4(sc, SK_Y2_PCI_REG(SK_PCI_OURREG1), reg1);
sc 847 dev/pci/if_msk.c if (sc->sk_type == SK_YUKON_XL && sc->sk_rev > SK_YUKON_XL_REV_A1)
sc 848 dev/pci/if_msk.c sk_win_write_1(sc, SK_Y2_CLKGATE,
sc 855 dev/pci/if_msk.c sk_win_write_1(sc, SK_Y2_CLKGATE, 0);
sc 857 dev/pci/if_msk.c CSR_WRITE_2(sc, SK_LINK_CTRL, SK_LINK_RESET_SET);
sc 858 dev/pci/if_msk.c CSR_WRITE_2(sc, SK_LINK_CTRL + SK_WIN_LEN, SK_LINK_RESET_SET);
sc 860 dev/pci/if_msk.c CSR_WRITE_2(sc, SK_LINK_CTRL, SK_LINK_RESET_CLEAR);
sc 861 dev/pci/if_msk.c CSR_WRITE_2(sc, SK_LINK_CTRL + SK_WIN_LEN, SK_LINK_RESET_CLEAR);
sc 863 dev/pci/if_msk.c sk_win_write_1(sc, SK_TESTCTL1, 1);
sc 865 dev/pci/if_msk.c DPRINTFN(2, ("mskc_reset: sk_csr=%x\n", CSR_READ_1(sc, SK_CSR)));
sc 867 dev/pci/if_msk.c CSR_READ_2(sc, SK_LINK_CTRL)));
sc 870 dev/pci/if_msk.c CSR_WRITE_1(sc, SK_Y2_ASF_CSR, SK_Y2_ASF_RESET);
sc 871 dev/pci/if_msk.c CSR_WRITE_2(sc, SK_CSR, SK_CSR_ASF_OFF);
sc 874 dev/pci/if_msk.c CSR_WRITE_4(sc, SK_I2CHWIRQ, 1);
sc 877 dev/pci/if_msk.c CSR_WRITE_1(sc, SK_TIMERCTL, SK_IMCTL_STOP);
sc 878 dev/pci/if_msk.c CSR_WRITE_1(sc, SK_TIMERCTL, SK_IMCTL_IRQ_CLEAR);
sc 881 dev/pci/if_msk.c CSR_WRITE_4(sc, SK_DPT_TIMER_CTRL, SK_DPT_TCTL_STOP);
sc 884 dev/pci/if_msk.c CSR_WRITE_1(sc, SK_TSTAMP_CTL, SK_TSTAMP_STOP);
sc 885 dev/pci/if_msk.c CSR_WRITE_1(sc, SK_TSTAMP_CTL, SK_TSTAMP_IRQ_CLEAR);
sc 888 dev/pci/if_msk.c sk_win_write_1(sc, SK_RAMCTL, SK_RAMCTL_UNRESET);
sc 890 dev/pci/if_msk.c sk_win_write_1(sc, reg, 36);
sc 891 dev/pci/if_msk.c sk_win_write_1(sc, SK_RAMCTL + (SK_WIN_LEN / 2), SK_RAMCTL_UNRESET);
sc 893 dev/pci/if_msk.c sk_win_write_1(sc, reg + (SK_WIN_LEN / 2), 36);
sc 904 dev/pci/if_msk.c switch (sc->sk_type) {
sc 915 dev/pci/if_msk.c bzero((char *)sc->sk_status_ring,
sc 917 dev/pci/if_msk.c sc->sk_status_idx = 0;
sc 919 dev/pci/if_msk.c sk_win_write_4(sc, SK_STAT_BMU_CSR, SK_STAT_BMU_RESET);
sc 920 dev/pci/if_msk.c sk_win_write_4(sc, SK_STAT_BMU_CSR, SK_STAT_BMU_UNRESET);
sc 922 dev/pci/if_msk.c sk_win_write_2(sc, SK_STAT_BMU_LIDX, MSK_STATUS_RING_CNT - 1);
sc 923 dev/pci/if_msk.c sk_win_write_4(sc, SK_STAT_BMU_ADDRLO,
sc 924 dev/pci/if_msk.c sc->sk_status_map->dm_segs[0].ds_addr);
sc 925 dev/pci/if_msk.c sk_win_write_4(sc, SK_STAT_BMU_ADDRHI,
sc 926 dev/pci/if_msk.c (u_int64_t)sc->sk_status_map->dm_segs[0].ds_addr >> 32);
sc 927 dev/pci/if_msk.c sk_win_write_2(sc, SK_STAT_BMU_TX_THRESH, 10);
sc 928 dev/pci/if_msk.c sk_win_write_1(sc, SK_STAT_BMU_FIFOWM, 16);
sc 929 dev/pci/if_msk.c sk_win_write_1(sc, SK_STAT_BMU_FIFOIWM, 16);
sc 932 dev/pci/if_msk.c sk_win_write_4(sc, SK_Y2_LEV_TIMERINIT, SK_IM_USECS(100));
sc 933 dev/pci/if_msk.c sk_win_write_4(sc, 0x0ec0, SK_IM_USECS(1000));
sc 935 dev/pci/if_msk.c sk_win_write_4(sc, 0x0ed0, SK_IM_USECS(20));
sc 937 dev/pci/if_msk.c sk_win_write_4(sc, SK_Y2_ISR_ITIMERINIT, SK_IM_USECS(4));
sc 940 dev/pci/if_msk.c sk_win_write_4(sc, SK_STAT_BMU_CSR, SK_STAT_BMU_ON);
sc 942 dev/pci/if_msk.c sk_win_write_1(sc, SK_Y2_LEV_ITIMERCTL, SK_IMCTL_START);
sc 943 dev/pci/if_msk.c sk_win_write_1(sc, SK_Y2_TX_ITIMERCTL, SK_IMCTL_START);
sc 944 dev/pci/if_msk.c sk_win_write_1(sc, SK_Y2_ISR_ITIMERCTL, SK_IMCTL_START);
sc 987 dev/pci/if_msk.c struct sk_softc *sc = (struct sk_softc *)parent;
sc 997 dev/pci/if_msk.c sc_if->sk_softc = sc;
sc 998 dev/pci/if_msk.c sc->sk_if[sa->skc_port] = sc_if;
sc 1013 dev/pci/if_msk.c sk_win_read_1(sc, SK_MAC0_0 + (sa->skc_port * 8) + i);
sc 1025 dev/pci/if_msk.c chunk = (2 * (sc->sk_ramsize / sizeof(u_int64_t)) / 3) & ~0xff;
sc 1028 dev/pci/if_msk.c chunk = (sc->sk_ramsize / sizeof(u_int64_t)) - chunk;
sc 1038 dev/pci/if_msk.c if (bus_dmamem_alloc(sc->sc_dmatag, sizeof(struct msk_ring_data),
sc 1043 dev/pci/if_msk.c if (bus_dmamem_map(sc->sc_dmatag, &seg, rseg,
sc 1049 dev/pci/if_msk.c if (bus_dmamap_create(sc->sc_dmatag, sizeof(struct msk_ring_data), 1,
sc 1055 dev/pci/if_msk.c if (bus_dmamap_load(sc->sc_dmatag, sc_if->sk_ring_map, kva,
sc 1076 dev/pci/if_msk.c if (sc->sk_type != SK_YUKON_FE)
sc 1101 dev/pci/if_msk.c if (sc->sk_fibertype)
sc 1121 dev/pci/if_msk.c shutdownhook_establish(mskc_shutdown, sc);
sc 1127 dev/pci/if_msk.c bus_dmamap_destroy(sc->sc_dmatag, sc_if->sk_ring_map);
sc 1129 dev/pci/if_msk.c bus_dmamem_unmap(sc->sc_dmatag, kva, sizeof(struct msk_ring_data));
sc 1131 dev/pci/if_msk.c bus_dmamem_free(sc->sc_dmatag, &seg, rseg);
sc 1133 dev/pci/if_msk.c sc->sk_if[sa->skc_port] = NULL;
sc 1156 dev/pci/if_msk.c struct sk_softc *sc = (struct sk_softc *)self;
sc 1189 dev/pci/if_msk.c "-- setting to D0\n", sc->sk_dev.dv_xname,
sc 1211 dev/pci/if_msk.c memtype, 0, &sc->sk_btag, &sc->sk_bhandle,
sc 1219 dev/pci/if_msk.c sc->sc_dmatag = pa->pa_dmat;
sc 1221 dev/pci/if_msk.c sc->sk_type = sk_win_read_1(sc, SK_CHIPVER);
sc 1222 dev/pci/if_msk.c sc->sk_rev = (sk_win_read_1(sc, SK_CONFIG) >> 4);
sc 1225 dev/pci/if_msk.c if (!(SK_IS_YUKON2(sc))) {
sc 1226 dev/pci/if_msk.c printf(": unknown chip type: %d\n", sc->sk_type);
sc 1238 dev/pci/if_msk.c sc->sk_intrhand = pci_intr_establish(pc, ih, IPL_NET, msk_intr, sc,
sc 1240 dev/pci/if_msk.c if (sc->sk_intrhand == NULL) {
sc 1248 dev/pci/if_msk.c if (bus_dmamem_alloc(sc->sc_dmatag,
sc 1255 dev/pci/if_msk.c if (bus_dmamem_map(sc->sc_dmatag, &seg, rseg,
sc 1262 dev/pci/if_msk.c if (bus_dmamap_create(sc->sc_dmatag,
sc 1265 dev/pci/if_msk.c BUS_DMA_NOWAIT, &sc->sk_status_map)) {
sc 1269 dev/pci/if_msk.c if (bus_dmamap_load(sc->sc_dmatag, sc->sk_status_map, kva,
sc 1275 dev/pci/if_msk.c sc->sk_status_ring = (struct msk_status_desc *)kva;
sc 1276 dev/pci/if_msk.c bzero(sc->sk_status_ring,
sc 1280 dev/pci/if_msk.c mskc_reset(sc);
sc 1282 dev/pci/if_msk.c sc->sk_ramsize = sk_win_read_1(sc, SK_EPROM0) * 4096;
sc 1283 dev/pci/if_msk.c DPRINTFN(2, ("mskc_attach: ramsize=%dK\n", sc->sk_ramsize / 1024));
sc 1285 dev/pci/if_msk.c pmd = sk_win_read_1(sc, SK_PMDTYPE);
sc 1287 dev/pci/if_msk.c sc->sk_fibertype = 1;
sc 1289 dev/pci/if_msk.c switch (sc->sk_type) {
sc 1291 dev/pci/if_msk.c sc->sk_name = "Yukon-2 XL";
sc 1294 dev/pci/if_msk.c sc->sk_name = "Yukon-2 EC Ultra";
sc 1297 dev/pci/if_msk.c sc->sk_name = "Yukon-2 Extreme";
sc 1300 dev/pci/if_msk.c sc->sk_name = "Yukon-2 EC";
sc 1303 dev/pci/if_msk.c sc->sk_name = "Yukon-2 FE";
sc 1306 dev/pci/if_msk.c sc->sk_name = "Yukon (Unknown)";
sc 1309 dev/pci/if_msk.c if (sc->sk_type == SK_YUKON_XL) {
sc 1310 dev/pci/if_msk.c switch (sc->sk_rev) {
sc 1328 dev/pci/if_msk.c if (sc->sk_type == SK_YUKON_EC) {
sc 1329 dev/pci/if_msk.c switch (sc->sk_rev) {
sc 1344 dev/pci/if_msk.c if (sc->sk_type == SK_YUKON_EC_U) {
sc 1345 dev/pci/if_msk.c switch (sc->sk_rev) {
sc 1358 dev/pci/if_msk.c printf(", %s", sc->sk_name);
sc 1361 dev/pci/if_msk.c printf(" (0x%x): %s\n", sc->sk_rev, intrstr);
sc 1363 dev/pci/if_msk.c sc->sk_macs = 1;
sc 1365 dev/pci/if_msk.c hw = sk_win_read_1(sc, SK_Y2_HWRES);
sc 1367 dev/pci/if_msk.c if ((sk_win_read_1(sc, SK_Y2_CLKGATE) &
sc 1369 dev/pci/if_msk.c sc->sk_macs++;
sc 1373 dev/pci/if_msk.c skca.skc_type = sc->sk_type;
sc 1374 dev/pci/if_msk.c skca.skc_rev = sc->sk_rev;
sc 1375 dev/pci/if_msk.c (void)config_found(&sc->sk_dev, &skca, mskcprint);
sc 1377 dev/pci/if_msk.c if (sc->sk_macs > 1) {
sc 1379 dev/pci/if_msk.c skca.skc_type = sc->sk_type;
sc 1380 dev/pci/if_msk.c skca.skc_rev = sc->sk_rev;
sc 1381 dev/pci/if_msk.c (void)config_found(&sc->sk_dev, &skca, mskcprint);
sc 1385 dev/pci/if_msk.c CSR_WRITE_2(sc, SK_LED, SK_LED_GREEN_ON);
sc 1390 dev/pci/if_msk.c bus_dmamap_destroy(sc->sc_dmatag, sc->sk_status_map);
sc 1392 dev/pci/if_msk.c bus_dmamem_unmap(sc->sc_dmatag, kva,
sc 1395 dev/pci/if_msk.c bus_dmamem_free(sc->sc_dmatag, &seg, rseg);
sc 1397 dev/pci/if_msk.c pci_intr_disestablish(pc, sc->sk_intrhand);
sc 1399 dev/pci/if_msk.c bus_space_unmap(sc->sk_btag, sc->sk_bhandle, size);
sc 1405 dev/pci/if_msk.c struct sk_softc *sc = sc_if->sk_softc;
sc 1433 dev/pci/if_msk.c if (bus_dmamap_load_mbuf(sc->sc_dmatag, txmap, m_head,
sc 1441 dev/pci/if_msk.c bus_dmamap_unload(sc->sc_dmatag, txmap);
sc 1448 dev/pci/if_msk.c bus_dmamap_sync(sc->sc_dmatag, txmap, 0, txmap->dm_mapsize,
sc 1576 dev/pci/if_msk.c struct sk_softc *sc = v;
sc 1581 dev/pci/if_msk.c CSR_WRITE_2(sc, SK_LED, SK_LED_GREEN_OFF);
sc 1587 dev/pci/if_msk.c mskc_reset(sc);
sc 1591 dev/pci/if_msk.c msk_rxvalid(struct sk_softc *sc, u_int32_t stat, u_int32_t len)
sc 1606 dev/pci/if_msk.c struct sk_softc *sc = sc_if->sk_softc;
sc 1633 dev/pci/if_msk.c msk_rxvalid(sc, rxstat, total_len) == 0) {
sc 1675 dev/pci/if_msk.c struct sk_softc *sc = sc_if->sk_softc;
sc 1693 dev/pci/if_msk.c while (idx != sk_win_read_2(sc, reg)) {
sc 1711 dev/pci/if_msk.c bus_dmamap_sync(sc->sc_dmatag, entry->dmamap, 0,
sc 1714 dev/pci/if_msk.c bus_dmamap_unload(sc->sc_dmatag, entry->dmamap);
sc 1766 dev/pci/if_msk.c struct sk_softc *sc = xsc;
sc 1767 dev/pci/if_msk.c struct sk_if_softc *sc_if0 = sc->sk_if[SK_PORT_A];
sc 1768 dev/pci/if_msk.c struct sk_if_softc *sc_if1 = sc->sk_if[SK_PORT_B];
sc 1774 dev/pci/if_msk.c status = CSR_READ_4(sc, SK_Y2_ISSR2);
sc 1776 dev/pci/if_msk.c CSR_WRITE_4(sc, SK_Y2_ICR, 2);
sc 1780 dev/pci/if_msk.c status = CSR_READ_4(sc, SK_ISR);
sc 1797 dev/pci/if_msk.c MSK_CDSTSYNC(sc, sc->sk_status_idx,
sc 1799 dev/pci/if_msk.c cur_st = &sc->sk_status_ring[sc->sk_status_idx];
sc 1805 dev/pci/if_msk.c msk_rxeof(sc->sk_if[cur_st->sk_link],
sc 1808 dev/pci/if_msk.c SK_IF_WRITE_2(sc->sk_if[cur_st->sk_link], 0,
sc 1810 dev/pci/if_msk.c sc->sk_if[cur_st->sk_link]->sk_cdata.sk_rx_prod);
sc 1822 dev/pci/if_msk.c SK_INC(sc->sk_status_idx, MSK_STATUS_RING_CNT);
sc 1824 dev/pci/if_msk.c MSK_CDSTSYNC(sc, sc->sk_status_idx,
sc 1826 dev/pci/if_msk.c cur_st = &sc->sk_status_ring[sc->sk_status_idx];
sc 1830 dev/pci/if_msk.c CSR_WRITE_4(sc, SK_STAT_BMU_CSR, SK_STAT_BMU_IRQ_CLEAR);
sc 1834 dev/pci/if_msk.c CSR_WRITE_4(sc, SK_Y2_ICR, 2);
sc 1849 dev/pci/if_msk.c struct sk_softc *sc;
sc 1852 dev/pci/if_msk.c sc = sc_if->sk_softc;
sc 1898 dev/pci/if_msk.c if (sc->sk_type != SK_YUKON_FE)
sc 1964 dev/pci/if_msk.c struct sk_softc *sc = sc_if->sk_softc;
sc 2061 dev/pci/if_msk.c sc->sk_intrmask |= SK_Y2_INTRS1;
sc 2063 dev/pci/if_msk.c sc->sk_intrmask |= SK_Y2_INTRS2;
sc 2064 dev/pci/if_msk.c sc->sk_intrmask |= SK_Y2_IMR_BMU;
sc 2065 dev/pci/if_msk.c CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sc 2078 dev/pci/if_msk.c struct sk_softc *sc = sc_if->sk_softc;
sc 2112 dev/pci/if_msk.c sc->sk_intrmask &= ~SK_Y2_INTRS1;
sc 2114 dev/pci/if_msk.c sc->sk_intrmask &= ~SK_Y2_INTRS2;
sc 2115 dev/pci/if_msk.c CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sc 2140 dev/pci/if_msk.c bus_dmamap_destroy(sc->sc_dmatag, dma->dmamap);
sc 138 dev/pci/if_mskvar.h #define MSK_TX_RING_ADDR(sc, i) \
sc 139 dev/pci/if_mskvar.h ((sc)->sk_ring_map->dm_segs[0].ds_addr + \
sc 142 dev/pci/if_mskvar.h #define MSK_RX_RING_ADDR(sc, i) \
sc 143 dev/pci/if_mskvar.h ((sc)->sk_ring_map->dm_segs[0].ds_addr + \
sc 151 dev/pci/if_mskvar.h #define MSK_CDTXSYNC(sc, x, n, ops) \
sc 160 dev/pci/if_mskvar.h bus_dmamap_sync((sc)->sk_softc->sc_dmatag, \
sc 161 dev/pci/if_mskvar.h (sc)->sk_ring_map, MSK_CDTXOFF(__x), \
sc 169 dev/pci/if_mskvar.h bus_dmamap_sync((sc)->sk_softc->sc_dmatag, (sc)->sk_ring_map, \
sc 173 dev/pci/if_mskvar.h #define MSK_CDRXSYNC(sc, x, ops) \
sc 175 dev/pci/if_mskvar.h bus_dmamap_sync((sc)->sk_softc->sc_dmatag, (sc)->sk_ring_map, \
sc 179 dev/pci/if_mskvar.h #define MSK_CDSTSYNC(sc, x, ops) \
sc 181 dev/pci/if_mskvar.h bus_dmamap_sync((sc)->sc_dmatag, (sc)->sk_status_map, \
sc 81 dev/pci/if_mtd_pci.c struct mtd_softc *sc = (void *)self;
sc 88 dev/pci/if_mtd_pci.c sc->sc_devid = PCI_PRODUCT(pa->pa_id);
sc 90 dev/pci/if_mtd_pci.c if (sc->sc_devid == PCI_PRODUCT_MYSON_MTD800 &&
sc 100 dev/pci/if_mtd_pci.c &sc->sc_bust, &sc->sc_bush, NULL, &iosize, 0)) {
sc 106 dev/pci/if_mtd_pci.c &sc->sc_bust, &sc->sc_bush, NULL, &iosize, 0)) {
sc 117 dev/pci/if_mtd_pci.c bus_space_unmap(sc->sc_bust, sc->sc_bush, iosize);
sc 122 dev/pci/if_mtd_pci.c if (pci_intr_establish(pa->pa_pc, ih, IPL_NET, mtd_intr, sc,
sc 128 dev/pci/if_mtd_pci.c bus_space_unmap(sc->sc_bust, sc->sc_bush, iosize);
sc 133 dev/pci/if_mtd_pci.c sc->sc_dmat = pa->pa_dmat;
sc 134 dev/pci/if_mtd_pci.c mtd_attach(sc);
sc 150 dev/pci/if_myx.c int myx_query(struct myx_softc *sc);
sc 203 dev/pci/if_myx.c struct myx_softc *sc = (struct myx_softc *)self;
sc 210 dev/pci/if_myx.c sc->sc_pc = pa->pa_pc;
sc 211 dev/pci/if_myx.c sc->sc_tag = pa->pa_tag;
sc 212 dev/pci/if_myx.c sc->sc_dmat = pa->pa_dmat;
sc 213 dev/pci/if_myx.c sc->sc_function = pa->pa_function;
sc 215 dev/pci/if_myx.c memtype = pci_mapreg_type(sc->sc_pc, sc->sc_tag, MYXBAR0);
sc 226 dev/pci/if_myx.c if (pci_mapreg_map(pa, MYXBAR0, memtype, 0, &sc->sc_memt,
sc 227 dev/pci/if_myx.c &sc->sc_memh, NULL, &sc->sc_mems, 0) != 0) {
sc 233 dev/pci/if_myx.c if (myx_query(sc) != 0)
sc 239 dev/pci/if_myx.c if (myx_dmamem_alloc(sc, &sc->sc_cmddma, MYXALIGN_CMD,
sc 245 dev/pci/if_myx.c if (myx_dmamem_alloc(sc, &sc->sc_paddma,
sc 251 dev/pci/if_myx.c if (myx_dmamem_alloc(sc, &sc->sc_stsdma,
sc 256 dev/pci/if_myx.c sc->sc_sts = (struct myx_status *)sc->sc_stsdma.mxm_kva;
sc 266 dev/pci/if_myx.c sc->sc_irqh = pci_intr_establish(pa->pa_pc, ih, IPL_NET,
sc 267 dev/pci/if_myx.c myx_intr, sc, DEVNAME(sc));
sc 268 dev/pci/if_myx.c if (sc->sc_irqh == NULL) {
sc 273 dev/pci/if_myx.c ether_sprintf(sc->sc_ac.ac_enaddr));
sc 275 dev/pci/if_myx.c ifp = &sc->sc_ac.ac_if;
sc 276 dev/pci/if_myx.c ifp->if_softc = sc;
sc 281 dev/pci/if_myx.c strlcpy(ifp->if_xname, DEVNAME(sc), IFNAMSIZ);
sc 293 dev/pci/if_myx.c ifmedia_init(&sc->sc_media, 0,
sc 295 dev/pci/if_myx.c ifmedia_add(&sc->sc_media, IFM_ETHER|sc->sc_phy, 0, NULL);
sc 296 dev/pci/if_myx.c ifmedia_set(&sc->sc_media, IFM_ETHER|sc->sc_phy);
sc 301 dev/pci/if_myx.c timeout_set(&sc->sc_tick, myx_tick, sc);
sc 302 dev/pci/if_myx.c timeout_add(&sc->sc_tick, hz);
sc 304 dev/pci/if_myx.c mountroothook_establish(myx_attachhook, sc);
sc 309 dev/pci/if_myx.c myx_dmamem_free(sc, &sc->sc_stsdma);
sc 311 dev/pci/if_myx.c myx_dmamem_free(sc, &sc->sc_paddma);
sc 313 dev/pci/if_myx.c myx_dmamem_free(sc, &sc->sc_cmddma);
sc 315 dev/pci/if_myx.c bus_space_unmap(sc->sc_memt, sc->sc_memh, sc->sc_mems);
sc 316 dev/pci/if_myx.c sc->sc_mems = 0;
sc 344 dev/pci/if_myx.c myx_query(struct myx_softc *sc)
sc 349 dev/pci/if_myx.c myx_read(sc, MYX_EEPROM, eeprom, MYX_EEPROM_SIZE);
sc 358 dev/pci/if_myx.c sc->sc_ac.ac_enaddr, maxlen);
sc 369 dev/pci/if_myx.c myx_loadfirmware(struct myx_softc *sc, u_int8_t *fw, size_t fwlen,
sc 378 dev/pci/if_myx.c DEVNAME(sc), __func__,
sc 387 dev/pci/if_myx.c DEVNAME(sc), betoh32(fwhdr->fw_type),
sc 399 dev/pci/if_myx.c myx_rawwrite(sc, i + MYX_FW, fw + i, min(256, fwlen - i));
sc 410 dev/pci/if_myx.c struct myx_softc *sc = (struct myx_softc *)arg;
sc 419 dev/pci/if_myx.c myx_read(sc, MYX_HEADER_POS, (u_int8_t *)&fwhdroff, sizeof(fwhdroff));
sc 426 dev/pci/if_myx.c myx_rawread(sc, MYX_HEADER_POS, fw, fwlen);
sc 428 dev/pci/if_myx.c if (myx_loadfirmware(sc, fw, fwlen, fwhdroff, 0) == 0)
sc 436 dev/pci/if_myx.c printf("%s: could not load firmware\n", DEVNAME(sc));
sc 440 dev/pci/if_myx.c printf("%s: invalid firmware image size\n", DEVNAME(sc));
sc 447 dev/pci/if_myx.c printf("%s: invalid firmware image\n", DEVNAME(sc));
sc 451 dev/pci/if_myx.c if (myx_loadfirmware(sc, fw, fwlen, fwhdroff, 1) != 0) {
sc 459 dev/pci/if_myx.c if (myx_boot(sc, fwlen, &bc) != 0) {
sc 460 dev/pci/if_myx.c printf("%s: failed to bootstrap the device\n", DEVNAME(sc));
sc 463 dev/pci/if_myx.c if (myx_reset(sc) != 0)
sc 466 dev/pci/if_myx.c sc->sc_active = 1;
sc 475 dev/pci/if_myx.c myx_read(struct myx_softc *sc, bus_size_t off, u_int8_t *ptr, bus_size_t len)
sc 477 dev/pci/if_myx.c bus_space_barrier(sc->sc_memt, sc->sc_memh, off, len,
sc 479 dev/pci/if_myx.c bus_space_read_region_4(sc->sc_memt, sc->sc_memh, off, ptr, len / 4);
sc 483 dev/pci/if_myx.c myx_rawread(struct myx_softc *sc, bus_size_t off, u_int8_t *ptr,
sc 486 dev/pci/if_myx.c bus_space_barrier(sc->sc_memt, sc->sc_memh, off, len,
sc 488 dev/pci/if_myx.c bus_space_read_raw_region_4(sc->sc_memt, sc->sc_memh, off, ptr, len);
sc 492 dev/pci/if_myx.c myx_write(struct myx_softc *sc, bus_size_t off, u_int8_t *ptr, bus_size_t len)
sc 494 dev/pci/if_myx.c bus_space_write_region_4(sc->sc_memt, sc->sc_memh, off, ptr, len / 4);
sc 495 dev/pci/if_myx.c bus_space_barrier(sc->sc_memt, sc->sc_memh, off, len,
sc 500 dev/pci/if_myx.c myx_rawwrite(struct myx_softc *sc, bus_size_t off, u_int8_t *ptr,
sc 503 dev/pci/if_myx.c bus_space_write_raw_region_4(sc->sc_memt, sc->sc_memh, off, ptr, len);
sc 504 dev/pci/if_myx.c bus_space_barrier(sc->sc_memt, sc->sc_memh, off, len,
sc 509 dev/pci/if_myx.c myx_dmamem_alloc(struct myx_softc *sc, struct myx_dmamem *mxm,
sc 514 dev/pci/if_myx.c if (bus_dmamap_create(sc->sc_dmat, mxm->mxm_size, 1,
sc 518 dev/pci/if_myx.c if (bus_dmamem_alloc(sc->sc_dmat, mxm->mxm_size,
sc 522 dev/pci/if_myx.c if (bus_dmamem_map(sc->sc_dmat, &mxm->mxm_seg, mxm->mxm_nsegs,
sc 525 dev/pci/if_myx.c if (bus_dmamap_load(sc->sc_dmat, mxm->mxm_map, mxm->mxm_kva,
sc 534 dev/pci/if_myx.c bus_dmamem_unmap(sc->sc_dmat, mxm->mxm_kva, mxm->mxm_size);
sc 536 dev/pci/if_myx.c bus_dmamem_free(sc->sc_dmat, &mxm->mxm_seg, 1);
sc 538 dev/pci/if_myx.c bus_dmamap_destroy(sc->sc_dmat, mxm->mxm_map);
sc 543 dev/pci/if_myx.c myx_dmamem_free(struct myx_softc *sc, struct myx_dmamem *mxm)
sc 545 dev/pci/if_myx.c bus_dmamap_unload(sc->sc_dmat, mxm->mxm_map);
sc 546 dev/pci/if_myx.c bus_dmamem_unmap(sc->sc_dmat, mxm->mxm_kva, mxm->mxm_size);
sc 547 dev/pci/if_myx.c bus_dmamem_free(sc->sc_dmat, &mxm->mxm_seg, 1);
sc 548 dev/pci/if_myx.c bus_dmamap_destroy(sc->sc_dmat, mxm->mxm_map);
sc 552 dev/pci/if_myx.c myx_cmd(struct myx_softc *sc, u_int32_t cmd, struct myx_cmd *mc, u_int32_t *r)
sc 554 dev/pci/if_myx.c bus_dmamap_t map = sc->sc_cmddma.mxm_map;
sc 601 dev/pci/if_myx.c mr = (struct myx_response *)sc->sc_cmddma.mxm_kva;
sc 605 dev/pci/if_myx.c myx_write(sc, MYX_CMD, (u_int8_t *)mc, sizeof(struct myx_cmd));
sc 608 dev/pci/if_myx.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 619 dev/pci/if_myx.c "result 0x%x, data 0x%x (%u)\n", DEVNAME(sc), __func__,
sc 631 dev/pci/if_myx.c myx_boot(struct myx_softc *sc, u_int32_t length, struct myx_bootcmd *bc)
sc 633 dev/pci/if_myx.c bus_dmamap_t map = sc->sc_cmddma.mxm_map;
sc 645 dev/pci/if_myx.c status = (u_int32_t *)sc->sc_cmddma.mxm_kva;
sc 649 dev/pci/if_myx.c myx_write(sc, MYX_BOOT, (u_int8_t *)bc, sizeof(struct myx_bootcmd));
sc 652 dev/pci/if_myx.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 660 dev/pci/if_myx.c DEVNAME(sc), __func__, i, betoh32(*status));
sc 669 dev/pci/if_myx.c myx_rdma(struct myx_softc *sc, u_int do_enable)
sc 672 dev/pci/if_myx.c bus_dmamap_t map = sc->sc_cmddma.mxm_map;
sc 673 dev/pci/if_myx.c bus_dmamap_t pad = sc->sc_paddma.mxm_map;
sc 688 dev/pci/if_myx.c status = (u_int32_t *)sc->sc_cmddma.mxm_kva;
sc 692 dev/pci/if_myx.c myx_write(sc, MYX_RDMA, (u_int8_t *)&rc, sizeof(struct myx_rdmacmd));
sc 695 dev/pci/if_myx.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 703 dev/pci/if_myx.c DEVNAME(sc), __func__,
sc 713 dev/pci/if_myx.c myx_reset(struct myx_softc *sc)
sc 717 dev/pci/if_myx.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 720 dev/pci/if_myx.c if (myx_cmd(sc, MYXCMD_RESET, &mc, NULL) != 0) {
sc 721 dev/pci/if_myx.c printf("%s: failed to reset the device\n", DEVNAME(sc));
sc 725 dev/pci/if_myx.c if (myx_rdma(sc, MYXRDMA_ON) != 0) {
sc 726 dev/pci/if_myx.c printf("%s: failed to enable dummy RDMA\n", DEVNAME(sc));
sc 730 dev/pci/if_myx.c if (myx_cmd(sc, MYXCMD_GET_INTRCOALDELAYOFF, &mc,
sc 731 dev/pci/if_myx.c &sc->sc_irqcoaloff) != 0) {
sc 732 dev/pci/if_myx.c printf("%s: failed to get IRQ coal offset\n", DEVNAME(sc));
sc 736 dev/pci/if_myx.c myx_write(sc, sc->sc_irqcoaloff, (u_int8_t *)&data, sizeof(data));
sc 738 dev/pci/if_myx.c if (myx_cmd(sc, MYXCMD_GET_INTRACKOFF, &mc,
sc 739 dev/pci/if_myx.c &sc->sc_irqclaimoff) != 0) {
sc 740 dev/pci/if_myx.c printf("%s: failed to get IRQ ack offset\n", DEVNAME(sc));
sc 744 dev/pci/if_myx.c if (myx_cmd(sc, MYXCMD_GET_INTRDEASSERTOFF, &mc,
sc 745 dev/pci/if_myx.c &sc->sc_irqdeassertoff) != 0) {
sc 746 dev/pci/if_myx.c printf("%s: failed to get IRQ deassert offset\n", DEVNAME(sc));
sc 750 dev/pci/if_myx.c if (myx_cmd(sc, MYXCMD_UNSET_PROMISC, &mc, NULL) != 0) {
sc 751 dev/pci/if_myx.c printf("%s: failed to disable promisc mode\n", DEVNAME(sc));
sc 755 dev/pci/if_myx.c if (myx_cmd(sc, MYXCMD_FC_DEFAULT, &mc, NULL) != 0) {
sc 756 dev/pci/if_myx.c printf("%s: failed to configure flow control\n", DEVNAME(sc));
sc 760 dev/pci/if_myx.c if (myx_setlladdr(sc, LLADDR(ifp->if_sadl)) != 0)
sc 776 dev/pci/if_myx.c struct myx_softc *sc = (struct myx_softc *)ifp->if_softc;
sc 778 dev/pci/if_myx.c imr->ifm_active = IFM_ETHER|sc->sc_phy;
sc 780 dev/pci/if_myx.c myx_link_state(sc);
sc 787 dev/pci/if_myx.c if (sc->sc_hwflags & MYXFLAG_FLOW_CONTROL)
sc 792 dev/pci/if_myx.c myx_link_state(struct myx_softc *sc)
sc 794 dev/pci/if_myx.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 797 dev/pci/if_myx.c if (sc->sc_sts == NULL)
sc 799 dev/pci/if_myx.c if (sc->sc_sts->ms_linkstate == MYXSTS_LINKUP)
sc 816 dev/pci/if_myx.c struct myx_softc *sc = (struct myx_softc *)arg;
sc 818 dev/pci/if_myx.c if (!sc->sc_active)
sc 821 dev/pci/if_myx.c myx_link_state(sc);
sc 822 dev/pci/if_myx.c timeout_add(&sc->sc_tick, hz);
sc 828 dev/pci/if_myx.c struct myx_softc *sc = (struct myx_softc *)ifp->if_softc;
sc 834 dev/pci/if_myx.c if ((error = ether_ioctl(ifp, &sc->sc_ac, cmd, data)) > 0) {
sc 844 dev/pci/if_myx.c arp_ifinit(&sc->sc_ac, ifa);
sc 850 dev/pci/if_myx.c myx_iff(sc);
sc 867 dev/pci/if_myx.c error = ether_addmulti(ifr, &sc->sc_ac);
sc 871 dev/pci/if_myx.c error = ether_delmulti(ifr, &sc->sc_ac);
sc 876 dev/pci/if_myx.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
sc 886 dev/pci/if_myx.c myx_iff(sc);
sc 896 dev/pci/if_myx.c myx_iff(struct myx_softc *sc)
sc 905 dev/pci/if_myx.c struct myx_softc *sc = (struct myx_softc *)ifp->if_softc;
sc 908 dev/pci/if_myx.c if (myx_reset(sc) != 0)
sc 911 dev/pci/if_myx.c if (myx_init_rings(sc) != 0)
sc 914 dev/pci/if_myx.c if (myx_cmd(sc, MYXCMD_SET_IFUP, &mc, NULL) != 0) {
sc 915 dev/pci/if_myx.c printf("%s: failed to start the device\n", DEVNAME(sc));
sc 916 dev/pci/if_myx.c myx_free_rings(sc);
sc 932 dev/pci/if_myx.c struct myx_softc *sc = (struct myx_softc *)ifp->if_softc;
sc 936 dev/pci/if_myx.c (void)myx_cmd(sc, MYXCMD_SET_IFDOWN, &mc, NULL);
sc 937 dev/pci/if_myx.c myx_free_rings(sc);
sc 943 dev/pci/if_myx.c myx_setlladdr(struct myx_softc *sc, u_int8_t *addr)
sc 950 dev/pci/if_myx.c if (myx_cmd(sc, MYXCMD_SET_LLADDR, &mc, NULL) != 0) {
sc 951 dev/pci/if_myx.c printf("%s: failed to set the lladdr\n", DEVNAME(sc));
sc 960 dev/pci/if_myx.c struct myx_softc *sc = (struct myx_softc *)arg;
sc 962 dev/pci/if_myx.c struct myx_status *sts = sc->sc_sts;
sc 963 dev/pci/if_myx.c bus_dmamap_t map = sc->sc_stsdma.mxm_map;
sc 965 dev/pci/if_myx.c if (!sc->sc_active)
sc 968 dev/pci/if_myx.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 980 dev/pci/if_myx.c myx_write(sc, sc->sc_irqdeassertoff, (u_int8_t *)&data, sizeof(data));
sc 983 dev/pci/if_myx.c DEVNAME(sc), __func__, valid);
sc 987 dev/pci/if_myx.c DPRINTF(MYXDBG_INTR, "%s(%s): %s: %u, 0x%x\n", DEVNAME(sc), __func__,\
sc 1013 dev/pci/if_myx.c myx_write(sc, sc->sc_irqclaimoff, (u_int8_t *)&data,
sc 1015 dev/pci/if_myx.c myx_write(sc, sc->sc_irqclaimoff + sizeof(u_int32_t),
sc 1022 dev/pci/if_myx.c myx_init_rings(struct myx_softc *sc)
sc 1025 dev/pci/if_myx.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 1033 dev/pci/if_myx.c if (!(myx_cmd(sc, MYXCMD_GET_RXRINGSZ, &mc,
sc 1034 dev/pci/if_myx.c &sc->sc_rxringsize) == 0 && sc->sc_rxringsize &&
sc 1035 dev/pci/if_myx.c myx_cmd(sc, MYXCMD_GET_RXSMALLRINGOFF, &mc,
sc 1036 dev/pci/if_myx.c &sc->sc_rxsmallringoff) == 0 && sc->sc_rxsmallringoff &&
sc 1037 dev/pci/if_myx.c myx_cmd(sc, MYXCMD_GET_RXBIGRINGOFF, &mc,
sc 1038 dev/pci/if_myx.c &sc->sc_rxbigringoff) == 0 && sc->sc_rxbigringoff &&
sc 1039 dev/pci/if_myx.c myx_cmd(sc, MYXCMD_GET_TXRINGSZ, &mc,
sc 1040 dev/pci/if_myx.c &sc->sc_txringsize) == 0 && sc->sc_txringsize &&
sc 1041 dev/pci/if_myx.c myx_cmd(sc, MYXCMD_GET_TXRINGOFF, &mc,
sc 1042 dev/pci/if_myx.c &sc->sc_txringoff) == 0 && sc->sc_txringoff)) {
sc 1044 dev/pci/if_myx.c DEVNAME(sc));
sc 1047 dev/pci/if_myx.c sc->sc_rxndesc = sc->sc_rxringsize / sizeof(struct myx_rxbufdesc);
sc 1048 dev/pci/if_myx.c sc->sc_txndesc = sc->sc_txringsize / sizeof(struct myx_txdesc);
sc 1049 dev/pci/if_myx.c sc->sc_rxdescsize = sc->sc_rxndesc * 2 * sizeof(struct myx_rxdesc);
sc 1050 dev/pci/if_myx.c sc->sc_rxbufsize = sc->sc_rxndesc * sizeof(struct myx_buf);
sc 1051 dev/pci/if_myx.c sc->sc_rxbufdescsize = sc->sc_rxndesc * sizeof(struct myx_rxbufdesc);
sc 1052 dev/pci/if_myx.c IFQ_SET_MAXLEN(&ifp->if_snd, sc->sc_txndesc - 1);
sc 1056 dev/pci/if_myx.c "Tx ring ndesc %u size %u offset 0x%x\n", DEVNAME(sc), __func__,
sc 1057 dev/pci/if_myx.c sc->sc_rxndesc, sc->sc_rxdescsize, sc->sc_rxringsize,
sc 1058 dev/pci/if_myx.c sc->sc_txndesc, sc->sc_txringsize, sc->sc_txringoff);
sc 1063 dev/pci/if_myx.c if (myx_dmamem_alloc(sc, &sc->sc_rxdma,
sc 1064 dev/pci/if_myx.c sc->sc_rxdescsize, MYXALIGN_DATA, "rxring") != 0) {
sc 1068 dev/pci/if_myx.c sc->sc_rxdesc = (struct myx_rxdesc *)sc->sc_rxdma.mxm_kva;
sc 1071 dev/pci/if_myx.c mc.mc_data0 = htobe32(sc->sc_rxdescsize);
sc 1072 dev/pci/if_myx.c if (myx_cmd(sc, MYXCMD_SET_INTRQSZ, &mc, NULL) != 0) {
sc 1073 dev/pci/if_myx.c printf("%s: failed to set Rx DMA size\n", DEVNAME(sc));
sc 1077 dev/pci/if_myx.c map = sc->sc_rxdma.mxm_map;
sc 1080 dev/pci/if_myx.c if (myx_cmd(sc, MYXCMD_SET_INTRQDMA, &mc, NULL) != 0) {
sc 1081 dev/pci/if_myx.c printf("%s: failed to set Rx DMA address\n", DEVNAME(sc));
sc 1092 dev/pci/if_myx.c if (myx_cmd(sc, MYXCMD_SET_MTU, &mc, NULL) != 0) {
sc 1094 dev/pci/if_myx.c DEVNAME(sc), ifp->if_mtu + ETHER_HDR_LEN + 4);
sc 1102 dev/pci/if_myx.c sc->sc_rxbuf[MYX_RXSMALL] = (struct myx_buf *)
sc 1103 dev/pci/if_myx.c malloc(sc->sc_rxbufsize, M_DEVBUF, M_WAITOK);
sc 1104 dev/pci/if_myx.c sc->sc_rxbufdesc[MYX_RXSMALL] = (struct myx_rxbufdesc *)
sc 1105 dev/pci/if_myx.c malloc(sc->sc_rxbufdescsize, M_DEVBUF, M_WAITOK);
sc 1106 dev/pci/if_myx.c sc->sc_rxbuf[MYX_RXBIG] = (struct myx_buf *)
sc 1107 dev/pci/if_myx.c malloc(sc->sc_rxbufsize, M_DEVBUF, M_WAITOK);
sc 1108 dev/pci/if_myx.c sc->sc_rxbufdesc[MYX_RXBIG] = (struct myx_rxbufdesc *)
sc 1109 dev/pci/if_myx.c malloc(sc->sc_rxbufdescsize, M_DEVBUF, M_WAITOK);
sc 1110 dev/pci/if_myx.c if (sc->sc_rxbuf[MYX_RXSMALL] == NULL ||
sc 1111 dev/pci/if_myx.c sc->sc_rxbufdesc[MYX_RXSMALL] == NULL ||
sc 1112 dev/pci/if_myx.c sc->sc_rxbuf[MYX_RXBIG] == NULL ||
sc 1113 dev/pci/if_myx.c sc->sc_rxbufdesc[MYX_RXBIG] == NULL) {
sc 1114 dev/pci/if_myx.c printf("%s: failed to allocate rx buffers\n", DEVNAME(sc));
sc 1118 dev/pci/if_myx.c for (i = 0; i < sc->sc_rxndesc; i++) {
sc 1122 dev/pci/if_myx.c mb = sc->sc_rxbuf[MYX_RXSMALL] + i;
sc 1123 dev/pci/if_myx.c rxb = sc->sc_rxbufdesc[MYX_RXSMALL] + i;
sc 1125 dev/pci/if_myx.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 1128 dev/pci/if_myx.c DEVNAME(sc), i);
sc 1133 dev/pci/if_myx.c mb->mb_m = myx_getbuf(sc, map, 1);
sc 1135 dev/pci/if_myx.c bus_dmamap_destroy(sc->sc_dmat, map);
sc 1139 dev/pci/if_myx.c bus_dmamap_sync(sc->sc_dmat, map, 0,
sc 1147 dev/pci/if_myx.c data = sc->sc_rxsmallringoff + i * sizeof(*rxb);
sc 1148 dev/pci/if_myx.c myx_write(sc, data, (u_int8_t *)rxb, sizeof(*rxb));
sc 1153 dev/pci/if_myx.c mb = sc->sc_rxbuf[MYX_RXBIG] + i;
sc 1154 dev/pci/if_myx.c rxb = sc->sc_rxbufdesc[MYX_RXBIG] + i;
sc 1156 dev/pci/if_myx.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 1159 dev/pci/if_myx.c DEVNAME(sc), i);
sc 1164 dev/pci/if_myx.c mb->mb_m = myx_getbuf(sc, map, 1);
sc 1166 dev/pci/if_myx.c bus_dmamap_destroy(sc->sc_dmat, map);
sc 1170 dev/pci/if_myx.c bus_dmamap_sync(sc->sc_dmat, map, 0,
sc 1178 dev/pci/if_myx.c data = sc->sc_rxbigringoff + i * sizeof(*rxb);
sc 1179 dev/pci/if_myx.c myx_write(sc, data, (u_int8_t *)rxb, sizeof(*rxb));
sc 1184 dev/pci/if_myx.c if (myx_cmd(sc, MYXCMD_SET_SMALLBUFSZ, &mc, NULL) != 0) {
sc 1185 dev/pci/if_myx.c printf("%s: failed to set small buf size\n", DEVNAME(sc));
sc 1191 dev/pci/if_myx.c if (myx_cmd(sc, MYXCMD_SET_BIGBUFSZ, &mc, NULL) != 0) {
sc 1192 dev/pci/if_myx.c printf("%s: failed to set big buf size\n", DEVNAME(sc));
sc 1199 dev/pci/if_myx.c map = sc->sc_stsdma.mxm_map;
sc 1205 dev/pci/if_myx.c if (myx_cmd(sc, MYXCMD_SET_STATSDMA, &mc, NULL) != 0) {
sc 1206 dev/pci/if_myx.c printf("%s: failed to set status DMA offset\n", DEVNAME(sc));
sc 1210 dev/pci/if_myx.c bus_dmamap_sync(sc->sc_dmat, map, 0,
sc 1215 dev/pci/if_myx.c myx_free_rings(sc);
sc 1220 dev/pci/if_myx.c myx_free_rings(struct myx_softc *sc)
sc 1222 dev/pci/if_myx.c if (sc->sc_rxbuf[MYX_RXSMALL] != NULL) {
sc 1223 dev/pci/if_myx.c free(sc->sc_rxbuf[MYX_RXSMALL], M_DEVBUF);
sc 1224 dev/pci/if_myx.c sc->sc_rxbuf[MYX_RXSMALL] = NULL;
sc 1226 dev/pci/if_myx.c if (sc->sc_rxbufdesc[MYX_RXSMALL] != NULL) {
sc 1227 dev/pci/if_myx.c free(sc->sc_rxbufdesc[MYX_RXSMALL], M_DEVBUF);
sc 1228 dev/pci/if_myx.c sc->sc_rxbufdesc[MYX_RXSMALL] = NULL;
sc 1230 dev/pci/if_myx.c if (sc->sc_rxbuf[MYX_RXBIG] != NULL) {
sc 1231 dev/pci/if_myx.c free(sc->sc_rxbuf[MYX_RXBIG], M_DEVBUF);
sc 1232 dev/pci/if_myx.c sc->sc_rxbuf[MYX_RXBIG] = NULL;
sc 1234 dev/pci/if_myx.c if (sc->sc_rxbufdesc[MYX_RXBIG] != NULL) {
sc 1235 dev/pci/if_myx.c free(sc->sc_rxbufdesc[MYX_RXBIG], M_DEVBUF);
sc 1236 dev/pci/if_myx.c sc->sc_rxbufdesc[MYX_RXBIG] = NULL;
sc 1238 dev/pci/if_myx.c if (sc->sc_rxdesc != NULL) {
sc 1239 dev/pci/if_myx.c myx_dmamem_free(sc, &sc->sc_rxdma);
sc 1240 dev/pci/if_myx.c sc->sc_rxdesc = NULL;
sc 1242 dev/pci/if_myx.c if (sc->sc_sts != NULL) {
sc 1243 dev/pci/if_myx.c myx_dmamem_free(sc, &sc->sc_stsdma);
sc 1244 dev/pci/if_myx.c sc->sc_sts = NULL;
sc 1250 dev/pci/if_myx.c myx_getbuf(struct myx_softc *sc, bus_dmamap_t map, int wait)
sc 1263 dev/pci/if_myx.c if (bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
sc 1265 dev/pci/if_myx.c printf("%s: could not load mbuf dma map\n", DEVNAME(sc));
sc 1271 dev/pci/if_myx.c printf("%s: unable to allocate mbuf\n", DEVNAME(sc));
sc 166 dev/pci/if_nfe.c struct nfe_softc *sc = (struct nfe_softc *)self;
sc 179 dev/pci/if_nfe.c if (pci_mapreg_map(pa, NFE_PCI_BA, memtype, 0, &sc->sc_memt,
sc 180 dev/pci/if_nfe.c &sc->sc_memh, NULL, &memsize, 0) == 0)
sc 194 dev/pci/if_nfe.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, nfe_intr, sc,
sc 195 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 196 dev/pci/if_nfe.c if (sc->sc_ih == NULL) {
sc 205 dev/pci/if_nfe.c sc->sc_dmat = pa->pa_dmat;
sc 207 dev/pci/if_nfe.c nfe_get_macaddr(sc, sc->sc_arpcom.ac_enaddr);
sc 208 dev/pci/if_nfe.c printf(", address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 210 dev/pci/if_nfe.c sc->sc_flags = 0;
sc 217 dev/pci/if_nfe.c sc->sc_flags |= NFE_JUMBO_SUP | NFE_HW_CSUM;
sc 229 dev/pci/if_nfe.c sc->sc_flags |= NFE_40BIT_ADDR;
sc 235 dev/pci/if_nfe.c sc->sc_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR | NFE_HW_CSUM;
sc 241 dev/pci/if_nfe.c sc->sc_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR;
sc 245 dev/pci/if_nfe.c sc->sc_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR | NFE_HW_CSUM |
sc 251 dev/pci/if_nfe.c if (sc->sc_flags & NFE_JUMBO_SUP)
sc 252 dev/pci/if_nfe.c sc->sc_flags |= NFE_USE_JUMBO;
sc 257 dev/pci/if_nfe.c if (nfe_alloc_tx_ring(sc, &sc->txq) != 0) {
sc 259 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 263 dev/pci/if_nfe.c if (nfe_alloc_rx_ring(sc, &sc->rxq) != 0) {
sc 265 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 266 dev/pci/if_nfe.c nfe_free_tx_ring(sc, &sc->txq);
sc 270 dev/pci/if_nfe.c ifp = &sc->sc_arpcom.ac_if;
sc 271 dev/pci/if_nfe.c ifp->if_softc = sc;
sc 280 dev/pci/if_nfe.c strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 284 dev/pci/if_nfe.c if (sc->sc_flags & NFE_USE_JUMBO)
sc 288 dev/pci/if_nfe.c if (sc->sc_flags & NFE_HW_VLAN)
sc 291 dev/pci/if_nfe.c if (sc->sc_flags & NFE_HW_CSUM) {
sc 296 dev/pci/if_nfe.c sc->sc_mii.mii_ifp = ifp;
sc 297 dev/pci/if_nfe.c sc->sc_mii.mii_readreg = nfe_miibus_readreg;
sc 298 dev/pci/if_nfe.c sc->sc_mii.mii_writereg = nfe_miibus_writereg;
sc 299 dev/pci/if_nfe.c sc->sc_mii.mii_statchg = nfe_miibus_statchg;
sc 301 dev/pci/if_nfe.c ifmedia_init(&sc->sc_mii.mii_media, 0, nfe_ifmedia_upd,
sc 303 dev/pci/if_nfe.c mii_attach(self, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
sc 305 dev/pci/if_nfe.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 306 dev/pci/if_nfe.c printf("%s: no PHY found!\n", sc->sc_dev.dv_xname);
sc 307 dev/pci/if_nfe.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER | IFM_MANUAL,
sc 309 dev/pci/if_nfe.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_MANUAL);
sc 311 dev/pci/if_nfe.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO);
sc 316 dev/pci/if_nfe.c timeout_set(&sc->sc_tick_ch, nfe_tick, sc);
sc 318 dev/pci/if_nfe.c sc->sc_powerhook = powerhook_establish(nfe_power, sc);
sc 324 dev/pci/if_nfe.c struct nfe_softc *sc = arg;
sc 328 dev/pci/if_nfe.c ifp = &sc->sc_arpcom.ac_if;
sc 340 dev/pci/if_nfe.c struct nfe_softc *sc = (struct nfe_softc *)dev;
sc 341 dev/pci/if_nfe.c struct mii_data *mii = &sc->sc_mii;
sc 344 dev/pci/if_nfe.c phy = NFE_READ(sc, NFE_PHY_IFACE);
sc 347 dev/pci/if_nfe.c seed = NFE_READ(sc, NFE_RNDSEED);
sc 372 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_RNDSEED, seed); /* XXX: gigabit NICs only? */
sc 374 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_PHY_IFACE, phy);
sc 375 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_MISC1, misc);
sc 376 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_LINKSPEED, link);
sc 382 dev/pci/if_nfe.c struct nfe_softc *sc = (struct nfe_softc *)dev;
sc 386 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_PHY_STATUS, 0xf);
sc 388 dev/pci/if_nfe.c if (NFE_READ(sc, NFE_PHY_CTL) & NFE_PHY_BUSY) {
sc 389 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_PHY_CTL, NFE_PHY_BUSY);
sc 393 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_PHY_CTL, (phy << NFE_PHYADD_SHIFT) | reg);
sc 397 dev/pci/if_nfe.c if (!(NFE_READ(sc, NFE_PHY_CTL) & NFE_PHY_BUSY))
sc 402 dev/pci/if_nfe.c sc->sc_dev.dv_xname));
sc 406 dev/pci/if_nfe.c if (NFE_READ(sc, NFE_PHY_STATUS) & NFE_PHY_ERROR) {
sc 408 dev/pci/if_nfe.c sc->sc_dev.dv_xname));
sc 412 dev/pci/if_nfe.c val = NFE_READ(sc, NFE_PHY_DATA);
sc 414 dev/pci/if_nfe.c sc->mii_phyaddr = phy;
sc 417 dev/pci/if_nfe.c sc->sc_dev.dv_xname, phy, reg, val));
sc 425 dev/pci/if_nfe.c struct nfe_softc *sc = (struct nfe_softc *)dev;
sc 429 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_PHY_STATUS, 0xf);
sc 431 dev/pci/if_nfe.c if (NFE_READ(sc, NFE_PHY_CTL) & NFE_PHY_BUSY) {
sc 432 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_PHY_CTL, NFE_PHY_BUSY);
sc 436 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_PHY_DATA, val);
sc 438 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_PHY_CTL, ctl);
sc 442 dev/pci/if_nfe.c if (!(NFE_READ(sc, NFE_PHY_CTL) & NFE_PHY_BUSY))
sc 454 dev/pci/if_nfe.c struct nfe_softc *sc = arg;
sc 455 dev/pci/if_nfe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 458 dev/pci/if_nfe.c if ((r = NFE_READ(sc, NFE_IRQ_STATUS)) == 0)
sc 460 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_IRQ_STATUS, r);
sc 465 dev/pci/if_nfe.c NFE_READ(sc, NFE_PHY_STATUS);
sc 466 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_PHY_STATUS, 0xf);
sc 467 dev/pci/if_nfe.c DPRINTF(("%s: link state changed\n", sc->sc_dev.dv_xname));
sc 472 dev/pci/if_nfe.c nfe_rxeof(sc);
sc 475 dev/pci/if_nfe.c nfe_txeof(sc);
sc 484 dev/pci/if_nfe.c struct nfe_softc *sc = ifp->if_softc;
sc 491 dev/pci/if_nfe.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 503 dev/pci/if_nfe.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 520 dev/pci/if_nfe.c ((ifp->if_flags ^ sc->sc_if_flags) &
sc 522 dev/pci/if_nfe.c nfe_setmulti(sc);
sc 531 dev/pci/if_nfe.c sc->sc_if_flags = ifp->if_flags;
sc 536 dev/pci/if_nfe.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 537 dev/pci/if_nfe.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 541 dev/pci/if_nfe.c nfe_setmulti(sc);
sc 547 dev/pci/if_nfe.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
sc 559 dev/pci/if_nfe.c nfe_txdesc32_sync(struct nfe_softc *sc, struct nfe_desc32 *desc32, int ops)
sc 561 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
sc 562 dev/pci/if_nfe.c (caddr_t)desc32 - (caddr_t)sc->txq.desc32,
sc 567 dev/pci/if_nfe.c nfe_txdesc64_sync(struct nfe_softc *sc, struct nfe_desc64 *desc64, int ops)
sc 569 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
sc 570 dev/pci/if_nfe.c (caddr_t)desc64 - (caddr_t)sc->txq.desc64,
sc 575 dev/pci/if_nfe.c nfe_txdesc32_rsync(struct nfe_softc *sc, int start, int end, int ops)
sc 578 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
sc 579 dev/pci/if_nfe.c (caddr_t)&sc->txq.desc32[start] - (caddr_t)sc->txq.desc32,
sc 580 dev/pci/if_nfe.c (caddr_t)&sc->txq.desc32[end] -
sc 581 dev/pci/if_nfe.c (caddr_t)&sc->txq.desc32[start], ops);
sc 585 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
sc 586 dev/pci/if_nfe.c (caddr_t)&sc->txq.desc32[start] - (caddr_t)sc->txq.desc32,
sc 587 dev/pci/if_nfe.c (caddr_t)&sc->txq.desc32[NFE_TX_RING_COUNT] -
sc 588 dev/pci/if_nfe.c (caddr_t)&sc->txq.desc32[start], ops);
sc 591 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 0,
sc 592 dev/pci/if_nfe.c (caddr_t)&sc->txq.desc32[end] - (caddr_t)sc->txq.desc32, ops);
sc 596 dev/pci/if_nfe.c nfe_txdesc64_rsync(struct nfe_softc *sc, int start, int end, int ops)
sc 599 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
sc 600 dev/pci/if_nfe.c (caddr_t)&sc->txq.desc64[start] - (caddr_t)sc->txq.desc64,
sc 601 dev/pci/if_nfe.c (caddr_t)&sc->txq.desc64[end] -
sc 602 dev/pci/if_nfe.c (caddr_t)&sc->txq.desc64[start], ops);
sc 606 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
sc 607 dev/pci/if_nfe.c (caddr_t)&sc->txq.desc64[start] - (caddr_t)sc->txq.desc64,
sc 608 dev/pci/if_nfe.c (caddr_t)&sc->txq.desc64[NFE_TX_RING_COUNT] -
sc 609 dev/pci/if_nfe.c (caddr_t)&sc->txq.desc64[start], ops);
sc 612 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 0,
sc 613 dev/pci/if_nfe.c (caddr_t)&sc->txq.desc64[end] - (caddr_t)sc->txq.desc64, ops);
sc 617 dev/pci/if_nfe.c nfe_rxdesc32_sync(struct nfe_softc *sc, struct nfe_desc32 *desc32, int ops)
sc 619 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
sc 620 dev/pci/if_nfe.c (caddr_t)desc32 - (caddr_t)sc->rxq.desc32,
sc 625 dev/pci/if_nfe.c nfe_rxdesc64_sync(struct nfe_softc *sc, struct nfe_desc64 *desc64, int ops)
sc 627 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
sc 628 dev/pci/if_nfe.c (caddr_t)desc64 - (caddr_t)sc->rxq.desc64,
sc 633 dev/pci/if_nfe.c nfe_rxeof(struct nfe_softc *sc)
sc 635 dev/pci/if_nfe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 646 dev/pci/if_nfe.c data = &sc->rxq.data[sc->rxq.cur];
sc 648 dev/pci/if_nfe.c if (sc->sc_flags & NFE_40BIT_ADDR) {
sc 649 dev/pci/if_nfe.c desc64 = &sc->rxq.desc64[sc->rxq.cur];
sc 650 dev/pci/if_nfe.c nfe_rxdesc64_sync(sc, desc64, BUS_DMASYNC_POSTREAD);
sc 655 dev/pci/if_nfe.c desc32 = &sc->rxq.desc32[sc->rxq.cur];
sc 656 dev/pci/if_nfe.c nfe_rxdesc32_sync(sc, desc32, BUS_DMASYNC_POSTREAD);
sc 665 dev/pci/if_nfe.c if ((sc->sc_flags & (NFE_JUMBO_SUP | NFE_40BIT_ADDR)) == 0) {
sc 701 dev/pci/if_nfe.c if (sc->sc_flags & NFE_USE_JUMBO) {
sc 702 dev/pci/if_nfe.c if ((jbuf = nfe_jalloc(sc)) == NULL) {
sc 707 dev/pci/if_nfe.c MEXTADD(mnew, jbuf->buf, NFE_JBYTES, 0, nfe_jfree, sc);
sc 709 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, sc->rxq.jmap,
sc 710 dev/pci/if_nfe.c mtod(data->m, caddr_t) - sc->rxq.jpool, NFE_JBYTES,
sc 722 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 724 dev/pci/if_nfe.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 726 dev/pci/if_nfe.c error = bus_dmamap_load(sc->sc_dmat, data->map,
sc 733 dev/pci/if_nfe.c error = bus_dmamap_load(sc->sc_dmat, data->map,
sc 739 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 758 dev/pci/if_nfe.c if ((sc->sc_flags & NFE_HW_CSUM) &&
sc 775 dev/pci/if_nfe.c if (sc->sc_flags & NFE_40BIT_ADDR) {
sc 784 dev/pci/if_nfe.c skip: if (sc->sc_flags & NFE_40BIT_ADDR) {
sc 785 dev/pci/if_nfe.c desc64->length = htole16(sc->rxq.bufsz);
sc 788 dev/pci/if_nfe.c nfe_rxdesc64_sync(sc, desc64, BUS_DMASYNC_PREWRITE);
sc 790 dev/pci/if_nfe.c desc32->length = htole16(sc->rxq.bufsz);
sc 793 dev/pci/if_nfe.c nfe_rxdesc32_sync(sc, desc32, BUS_DMASYNC_PREWRITE);
sc 796 dev/pci/if_nfe.c sc->rxq.cur = (sc->rxq.cur + 1) % NFE_RX_RING_COUNT;
sc 801 dev/pci/if_nfe.c nfe_txeof(struct nfe_softc *sc)
sc 803 dev/pci/if_nfe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 809 dev/pci/if_nfe.c while (sc->txq.next != sc->txq.cur) {
sc 810 dev/pci/if_nfe.c if (sc->sc_flags & NFE_40BIT_ADDR) {
sc 811 dev/pci/if_nfe.c desc64 = &sc->txq.desc64[sc->txq.next];
sc 812 dev/pci/if_nfe.c nfe_txdesc64_sync(sc, desc64, BUS_DMASYNC_POSTREAD);
sc 816 dev/pci/if_nfe.c desc32 = &sc->txq.desc32[sc->txq.next];
sc 817 dev/pci/if_nfe.c nfe_txdesc32_sync(sc, desc32, BUS_DMASYNC_POSTREAD);
sc 825 dev/pci/if_nfe.c data = &sc->txq.data[sc->txq.next];
sc 827 dev/pci/if_nfe.c if ((sc->sc_flags & (NFE_JUMBO_SUP | NFE_40BIT_ADDR)) == 0) {
sc 833 dev/pci/if_nfe.c sc->sc_dev.dv_xname, flags, NFE_V1_TXERR);
sc 843 dev/pci/if_nfe.c sc->sc_dev.dv_xname, flags, NFE_V2_TXERR);
sc 851 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 856 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, data->active, 0,
sc 858 dev/pci/if_nfe.c bus_dmamap_unload(sc->sc_dmat, data->active);
sc 864 dev/pci/if_nfe.c skip: sc->txq.queued--;
sc 865 dev/pci/if_nfe.c sc->txq.next = (sc->txq.next + 1) % NFE_TX_RING_COUNT;
sc 875 dev/pci/if_nfe.c nfe_encap(struct nfe_softc *sc, struct mbuf *m0)
sc 885 dev/pci/if_nfe.c int error, i, first = sc->txq.cur;
sc 887 dev/pci/if_nfe.c map = sc->txq.data[first].map;
sc 889 dev/pci/if_nfe.c error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m0, BUS_DMA_NOWAIT);
sc 892 dev/pci/if_nfe.c sc->sc_dev.dv_xname, error);
sc 896 dev/pci/if_nfe.c if (sc->txq.queued + map->dm_nsegs >= NFE_TX_RING_COUNT - 1) {
sc 897 dev/pci/if_nfe.c bus_dmamap_unload(sc->sc_dmat, map);
sc 915 dev/pci/if_nfe.c data = &sc->txq.data[sc->txq.cur];
sc 917 dev/pci/if_nfe.c if (sc->sc_flags & NFE_40BIT_ADDR) {
sc 918 dev/pci/if_nfe.c desc64 = &sc->txq.desc64[sc->txq.cur];
sc 931 dev/pci/if_nfe.c desc32 = &sc->txq.desc32[sc->txq.cur];
sc 954 dev/pci/if_nfe.c sc->txq.queued++;
sc 955 dev/pci/if_nfe.c sc->txq.cur = (sc->txq.cur + 1) % NFE_TX_RING_COUNT;
sc 959 dev/pci/if_nfe.c if (sc->sc_flags & NFE_40BIT_ADDR) {
sc 965 dev/pci/if_nfe.c sc->txq.desc64[first].flags |= htole16(NFE_TX_VALID);
sc 968 dev/pci/if_nfe.c if (sc->sc_flags & NFE_JUMBO_SUP)
sc 975 dev/pci/if_nfe.c sc->txq.desc32[first].flags |= htole16(NFE_TX_VALID);
sc 981 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 990 dev/pci/if_nfe.c struct nfe_softc *sc = ifp->if_softc;
sc 991 dev/pci/if_nfe.c int old = sc->txq.cur;
sc 999 dev/pci/if_nfe.c if (nfe_encap(sc, m0) != 0) {
sc 1012 dev/pci/if_nfe.c if (sc->txq.cur == old) /* nothing sent */
sc 1015 dev/pci/if_nfe.c if (sc->sc_flags & NFE_40BIT_ADDR)
sc 1016 dev/pci/if_nfe.c nfe_txdesc64_rsync(sc, old, sc->txq.cur, BUS_DMASYNC_PREWRITE);
sc 1018 dev/pci/if_nfe.c nfe_txdesc32_rsync(sc, old, sc->txq.cur, BUS_DMASYNC_PREWRITE);
sc 1021 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_KICKTX | sc->rxtxctl);
sc 1032 dev/pci/if_nfe.c struct nfe_softc *sc = ifp->if_softc;
sc 1034 dev/pci/if_nfe.c printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
sc 1044 dev/pci/if_nfe.c struct nfe_softc *sc = ifp->if_softc;
sc 1049 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_TX_UNK, 0);
sc 1050 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_STATUS, 0);
sc 1052 dev/pci/if_nfe.c sc->rxtxctl = NFE_RXTX_BIT2;
sc 1053 dev/pci/if_nfe.c if (sc->sc_flags & NFE_40BIT_ADDR)
sc 1054 dev/pci/if_nfe.c sc->rxtxctl |= NFE_RXTX_V3MAGIC;
sc 1055 dev/pci/if_nfe.c else if (sc->sc_flags & NFE_JUMBO_SUP)
sc 1056 dev/pci/if_nfe.c sc->rxtxctl |= NFE_RXTX_V2MAGIC;
sc 1057 dev/pci/if_nfe.c if (sc->sc_flags & NFE_HW_CSUM)
sc 1058 dev/pci/if_nfe.c sc->rxtxctl |= NFE_RXTX_RXCSUM;
sc 1065 dev/pci/if_nfe.c if (sc->sc_flags & NFE_HW_VLAN)
sc 1066 dev/pci/if_nfe.c sc->rxtxctl |= NFE_RXTX_VTAG_INSERT;
sc 1068 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_RESET | sc->rxtxctl);
sc 1070 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_RXTX_CTL, sc->rxtxctl);
sc 1073 dev/pci/if_nfe.c if (sc->sc_flags & NFE_HW_VLAN)
sc 1074 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_VTAG_CTL, NFE_VTAG_ENABLE);
sc 1077 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_SETUP_R6, 0);
sc 1080 dev/pci/if_nfe.c nfe_set_macaddr(sc, sc->sc_arpcom.ac_enaddr);
sc 1084 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_RX_RING_ADDR_HI, sc->rxq.physaddr >> 32);
sc 1086 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_RX_RING_ADDR_LO, sc->rxq.physaddr & 0xffffffff);
sc 1088 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_TX_RING_ADDR_HI, sc->txq.physaddr >> 32);
sc 1090 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_TX_RING_ADDR_LO, sc->txq.physaddr & 0xffffffff);
sc 1092 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_RING_SIZE,
sc 1096 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_RXBUFSZ, sc->rxq.bufsz);
sc 1099 dev/pci/if_nfe.c tmp = NFE_READ(sc, NFE_PWR_STATE);
sc 1100 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_PWR_STATE, tmp | NFE_PWR_WAKEUP);
sc 1102 dev/pci/if_nfe.c tmp = NFE_READ(sc, NFE_PWR_STATE);
sc 1103 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_PWR_STATE, tmp | NFE_PWR_VALID);
sc 1107 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_IMTIMER, NFE_IM_DEFAULT);
sc 1110 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_IMTIMER, 970);
sc 1113 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_SETUP_R1, NFE_R1_MAGIC);
sc 1114 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_SETUP_R2, NFE_R2_MAGIC);
sc 1115 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_SETUP_R6, NFE_R6_MAGIC);
sc 1118 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_STATUS, sc->mii_phyaddr << 24 | NFE_STATUS_MAGIC);
sc 1120 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_SETUP_R4, NFE_R4_MAGIC);
sc 1121 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_WOL_CTL, NFE_WOL_ENABLE);
sc 1123 dev/pci/if_nfe.c sc->rxtxctl &= ~NFE_RXTX_BIT2;
sc 1124 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_RXTX_CTL, sc->rxtxctl);
sc 1126 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_RXTX_CTL, NFE_RXTX_BIT1 | sc->rxtxctl);
sc 1129 dev/pci/if_nfe.c nfe_setmulti(sc);
sc 1134 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_RX_CTL, NFE_RX_START);
sc 1137 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_TX_CTL, NFE_TX_START);
sc 1139 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_PHY_STATUS, 0xf);
sc 1142 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_IRQ_MASK, NFE_IRQ_WANTED);
sc 1144 dev/pci/if_nfe.c timeout_add(&sc->sc_tick_ch, hz);
sc 1155 dev/pci/if_nfe.c struct nfe_softc *sc = ifp->if_softc;
sc 1157 dev/pci/if_nfe.c timeout_del(&sc->sc_tick_ch);
sc 1162 dev/pci/if_nfe.c mii_down(&sc->sc_mii);
sc 1165 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_TX_CTL, 0);
sc 1168 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_RX_CTL, 0);
sc 1171 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_IRQ_MASK, 0);
sc 1174 dev/pci/if_nfe.c nfe_reset_tx_ring(sc, &sc->txq);
sc 1175 dev/pci/if_nfe.c nfe_reset_rx_ring(sc, &sc->rxq);
sc 1179 dev/pci/if_nfe.c nfe_alloc_rx_ring(struct nfe_softc *sc, struct nfe_rx_ring *ring)
sc 1189 dev/pci/if_nfe.c if (sc->sc_flags & NFE_40BIT_ADDR) {
sc 1200 dev/pci/if_nfe.c error = bus_dmamap_create(sc->sc_dmat, NFE_RX_RING_COUNT * descsize, 1,
sc 1204 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1208 dev/pci/if_nfe.c error = bus_dmamem_alloc(sc->sc_dmat, NFE_RX_RING_COUNT * descsize,
sc 1212 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1216 dev/pci/if_nfe.c error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
sc 1220 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1224 dev/pci/if_nfe.c error = bus_dmamap_load(sc->sc_dmat, ring->map, *desc,
sc 1228 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1235 dev/pci/if_nfe.c if (sc->sc_flags & NFE_USE_JUMBO) {
sc 1237 dev/pci/if_nfe.c if ((error = nfe_jpool_alloc(sc)) != 0) {
sc 1239 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1248 dev/pci/if_nfe.c data = &sc->rxq.data[i];
sc 1253 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1258 dev/pci/if_nfe.c if (sc->sc_flags & NFE_USE_JUMBO) {
sc 1259 dev/pci/if_nfe.c if ((jbuf = nfe_jalloc(sc)) == NULL) {
sc 1261 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1265 dev/pci/if_nfe.c sc);
sc 1269 dev/pci/if_nfe.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 1273 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1279 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1284 dev/pci/if_nfe.c error = bus_dmamap_load(sc->sc_dmat, data->map,
sc 1289 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1295 dev/pci/if_nfe.c if (sc->sc_flags & NFE_40BIT_ADDR) {
sc 1296 dev/pci/if_nfe.c desc64 = &sc->rxq.desc64[i];
sc 1301 dev/pci/if_nfe.c desc64->length = htole16(sc->rxq.bufsz);
sc 1304 dev/pci/if_nfe.c desc32 = &sc->rxq.desc32[i];
sc 1306 dev/pci/if_nfe.c desc32->length = htole16(sc->rxq.bufsz);
sc 1311 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
sc 1316 dev/pci/if_nfe.c fail: nfe_free_rx_ring(sc, ring);
sc 1321 dev/pci/if_nfe.c nfe_reset_rx_ring(struct nfe_softc *sc, struct nfe_rx_ring *ring)
sc 1326 dev/pci/if_nfe.c if (sc->sc_flags & NFE_40BIT_ADDR) {
sc 1335 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
sc 1342 dev/pci/if_nfe.c nfe_free_rx_ring(struct nfe_softc *sc, struct nfe_rx_ring *ring)
sc 1348 dev/pci/if_nfe.c if (sc->sc_flags & NFE_40BIT_ADDR) {
sc 1357 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
sc 1359 dev/pci/if_nfe.c bus_dmamap_unload(sc->sc_dmat, ring->map);
sc 1360 dev/pci/if_nfe.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)desc,
sc 1362 dev/pci/if_nfe.c bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
sc 1369 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, data->map, 0,
sc 1371 dev/pci/if_nfe.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 1372 dev/pci/if_nfe.c bus_dmamap_destroy(sc->sc_dmat, data->map);
sc 1380 dev/pci/if_nfe.c nfe_jalloc(struct nfe_softc *sc)
sc 1384 dev/pci/if_nfe.c jbuf = SLIST_FIRST(&sc->rxq.jfreelist);
sc 1387 dev/pci/if_nfe.c SLIST_REMOVE_HEAD(&sc->rxq.jfreelist, jnext);
sc 1399 dev/pci/if_nfe.c struct nfe_softc *sc = arg;
sc 1404 dev/pci/if_nfe.c i = (buf - sc->rxq.jpool) / NFE_JBYTES;
sc 1407 dev/pci/if_nfe.c sc->sc_dev.dv_xname, buf);
sc 1410 dev/pci/if_nfe.c jbuf = &sc->rxq.jbuf[i];
sc 1413 dev/pci/if_nfe.c SLIST_INSERT_HEAD(&sc->rxq.jfreelist, jbuf, jnext);
sc 1417 dev/pci/if_nfe.c nfe_jpool_alloc(struct nfe_softc *sc)
sc 1419 dev/pci/if_nfe.c struct nfe_rx_ring *ring = &sc->rxq;
sc 1428 dev/pci/if_nfe.c error = bus_dmamap_create(sc->sc_dmat, NFE_JPOOL_SIZE, 1,
sc 1432 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1436 dev/pci/if_nfe.c error = bus_dmamem_alloc(sc->sc_dmat, NFE_JPOOL_SIZE, PAGE_SIZE, 0,
sc 1440 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1444 dev/pci/if_nfe.c error = bus_dmamem_map(sc->sc_dmat, &ring->jseg, nsegs, NFE_JPOOL_SIZE,
sc 1448 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1452 dev/pci/if_nfe.c error = bus_dmamap_load(sc->sc_dmat, ring->jmap, ring->jpool,
sc 1456 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1479 dev/pci/if_nfe.c fail: nfe_jpool_free(sc);
sc 1484 dev/pci/if_nfe.c nfe_jpool_free(struct nfe_softc *sc)
sc 1486 dev/pci/if_nfe.c struct nfe_rx_ring *ring = &sc->rxq;
sc 1489 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, ring->jmap, 0,
sc 1491 dev/pci/if_nfe.c bus_dmamap_unload(sc->sc_dmat, ring->jmap);
sc 1492 dev/pci/if_nfe.c bus_dmamap_destroy(sc->sc_dmat, ring->jmap);
sc 1495 dev/pci/if_nfe.c bus_dmamem_unmap(sc->sc_dmat, ring->jpool, NFE_JPOOL_SIZE);
sc 1496 dev/pci/if_nfe.c bus_dmamem_free(sc->sc_dmat, &ring->jseg, 1);
sc 1501 dev/pci/if_nfe.c nfe_alloc_tx_ring(struct nfe_softc *sc, struct nfe_tx_ring *ring)
sc 1507 dev/pci/if_nfe.c if (sc->sc_flags & NFE_40BIT_ADDR) {
sc 1518 dev/pci/if_nfe.c error = bus_dmamap_create(sc->sc_dmat, NFE_TX_RING_COUNT * descsize, 1,
sc 1523 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1527 dev/pci/if_nfe.c error = bus_dmamem_alloc(sc->sc_dmat, NFE_TX_RING_COUNT * descsize,
sc 1531 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1535 dev/pci/if_nfe.c error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
sc 1539 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1543 dev/pci/if_nfe.c error = bus_dmamap_load(sc->sc_dmat, ring->map, *desc,
sc 1547 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1555 dev/pci/if_nfe.c error = bus_dmamap_create(sc->sc_dmat, NFE_JBYTES,
sc 1560 dev/pci/if_nfe.c sc->sc_dev.dv_xname);
sc 1567 dev/pci/if_nfe.c fail: nfe_free_tx_ring(sc, ring);
sc 1572 dev/pci/if_nfe.c nfe_reset_tx_ring(struct nfe_softc *sc, struct nfe_tx_ring *ring)
sc 1578 dev/pci/if_nfe.c if (sc->sc_flags & NFE_40BIT_ADDR)
sc 1586 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, data->active, 0,
sc 1588 dev/pci/if_nfe.c bus_dmamap_unload(sc->sc_dmat, data->active);
sc 1594 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
sc 1602 dev/pci/if_nfe.c nfe_free_tx_ring(struct nfe_softc *sc, struct nfe_tx_ring *ring)
sc 1608 dev/pci/if_nfe.c if (sc->sc_flags & NFE_40BIT_ADDR) {
sc 1617 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
sc 1619 dev/pci/if_nfe.c bus_dmamap_unload(sc->sc_dmat, ring->map);
sc 1620 dev/pci/if_nfe.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)desc,
sc 1622 dev/pci/if_nfe.c bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
sc 1629 dev/pci/if_nfe.c bus_dmamap_sync(sc->sc_dmat, data->active, 0,
sc 1631 dev/pci/if_nfe.c bus_dmamap_unload(sc->sc_dmat, data->active);
sc 1641 dev/pci/if_nfe.c bus_dmamap_destroy(sc->sc_dmat, data->map);
sc 1648 dev/pci/if_nfe.c struct nfe_softc *sc = ifp->if_softc;
sc 1649 dev/pci/if_nfe.c struct mii_data *mii = &sc->sc_mii;
sc 1662 dev/pci/if_nfe.c struct nfe_softc *sc = ifp->if_softc;
sc 1663 dev/pci/if_nfe.c struct mii_data *mii = &sc->sc_mii;
sc 1671 dev/pci/if_nfe.c nfe_setmulti(struct nfe_softc *sc)
sc 1673 dev/pci/if_nfe.c struct arpcom *ac = &sc->sc_arpcom;
sc 1710 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_MULTIADDR_HI,
sc 1712 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_MULTIADDR_LO,
sc 1714 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_MULTIMASK_HI,
sc 1716 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_MULTIMASK_LO,
sc 1720 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_RXFILTER, filter);
sc 1724 dev/pci/if_nfe.c nfe_get_macaddr(struct nfe_softc *sc, uint8_t *addr)
sc 1728 dev/pci/if_nfe.c tmp = NFE_READ(sc, NFE_MACADDR_LO);
sc 1732 dev/pci/if_nfe.c tmp = NFE_READ(sc, NFE_MACADDR_HI);
sc 1740 dev/pci/if_nfe.c nfe_set_macaddr(struct nfe_softc *sc, const uint8_t *addr)
sc 1742 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_MACADDR_LO,
sc 1744 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_MACADDR_HI,
sc 1751 dev/pci/if_nfe.c struct nfe_softc *sc = arg;
sc 1755 dev/pci/if_nfe.c mii_tick(&sc->sc_mii);
sc 1758 dev/pci/if_nfe.c timeout_add(&sc->sc_tick_ch, hz);
sc 188 dev/pci/if_nfereg.h #define NFE_READ(sc, reg) \
sc 189 dev/pci/if_nfereg.h bus_space_read_4((sc)->sc_memt, (sc)->sc_memh, (reg))
sc 191 dev/pci/if_nfereg.h #define NFE_WRITE(sc, reg, val) \
sc 192 dev/pci/if_nfereg.h bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, (reg), (val))
sc 200 dev/pci/if_nge.c #define NGE_SETBIT(sc, reg, x) \
sc 201 dev/pci/if_nge.c CSR_WRITE_4(sc, reg, \
sc 202 dev/pci/if_nge.c CSR_READ_4(sc, reg) | (x))
sc 204 dev/pci/if_nge.c #define NGE_CLRBIT(sc, reg, x) \
sc 205 dev/pci/if_nge.c CSR_WRITE_4(sc, reg, \
sc 206 dev/pci/if_nge.c CSR_READ_4(sc, reg) & ~(x))
sc 209 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_MEAR, CSR_READ_4(sc, NGE_MEAR) | (x))
sc 212 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_MEAR, CSR_READ_4(sc, NGE_MEAR) & ~(x))
sc 215 dev/pci/if_nge.c nge_delay(sc)
sc 216 dev/pci/if_nge.c struct nge_softc *sc;
sc 221 dev/pci/if_nge.c CSR_READ_4(sc, NGE_CSR);
sc 225 dev/pci/if_nge.c nge_eeprom_idle(sc)
sc 226 dev/pci/if_nge.c struct nge_softc *sc;
sc 231 dev/pci/if_nge.c nge_delay(sc);
sc 233 dev/pci/if_nge.c nge_delay(sc);
sc 237 dev/pci/if_nge.c nge_delay(sc);
sc 239 dev/pci/if_nge.c nge_delay(sc);
sc 243 dev/pci/if_nge.c nge_delay(sc);
sc 245 dev/pci/if_nge.c nge_delay(sc);
sc 246 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_MEAR, 0x00000000);
sc 253 dev/pci/if_nge.c nge_eeprom_putbyte(sc, addr)
sc 254 dev/pci/if_nge.c struct nge_softc *sc;
sc 270 dev/pci/if_nge.c nge_delay(sc);
sc 272 dev/pci/if_nge.c nge_delay(sc);
sc 274 dev/pci/if_nge.c nge_delay(sc);
sc 282 dev/pci/if_nge.c nge_eeprom_getword(sc, addr, dest)
sc 283 dev/pci/if_nge.c struct nge_softc *sc;
sc 291 dev/pci/if_nge.c nge_eeprom_idle(sc);
sc 294 dev/pci/if_nge.c nge_delay(sc);
sc 296 dev/pci/if_nge.c nge_delay(sc);
sc 298 dev/pci/if_nge.c nge_delay(sc);
sc 303 dev/pci/if_nge.c nge_eeprom_putbyte(sc, addr);
sc 310 dev/pci/if_nge.c nge_delay(sc);
sc 311 dev/pci/if_nge.c if (CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_EE_DOUT)
sc 313 dev/pci/if_nge.c nge_delay(sc);
sc 315 dev/pci/if_nge.c nge_delay(sc);
sc 319 dev/pci/if_nge.c nge_eeprom_idle(sc);
sc 328 dev/pci/if_nge.c nge_read_eeprom(sc, dest, off, cnt, swap)
sc 329 dev/pci/if_nge.c struct nge_softc *sc;
sc 339 dev/pci/if_nge.c nge_eeprom_getword(sc, off + i, &word);
sc 352 dev/pci/if_nge.c nge_mii_sync(sc)
sc 353 dev/pci/if_nge.c struct nge_softc *sc;
sc 371 dev/pci/if_nge.c nge_mii_send(sc, bits, cnt)
sc 372 dev/pci/if_nge.c struct nge_softc *sc;
sc 397 dev/pci/if_nge.c nge_mii_readreg(sc, frame)
sc 398 dev/pci/if_nge.c struct nge_softc *sc;
sc 413 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_MEAR, 0);
sc 420 dev/pci/if_nge.c nge_mii_sync(sc);
sc 425 dev/pci/if_nge.c nge_mii_send(sc, frame->mii_stdelim, 2);
sc 426 dev/pci/if_nge.c nge_mii_send(sc, frame->mii_opcode, 2);
sc 427 dev/pci/if_nge.c nge_mii_send(sc, frame->mii_phyaddr, 5);
sc 428 dev/pci/if_nge.c nge_mii_send(sc, frame->mii_regaddr, 5);
sc 441 dev/pci/if_nge.c ack = CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_MII_DATA;
sc 463 dev/pci/if_nge.c if (CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_MII_DATA)
sc 489 dev/pci/if_nge.c nge_mii_writereg(sc, frame)
sc 490 dev/pci/if_nge.c struct nge_softc *sc;
sc 509 dev/pci/if_nge.c nge_mii_sync(sc);
sc 511 dev/pci/if_nge.c nge_mii_send(sc, frame->mii_stdelim, 2);
sc 512 dev/pci/if_nge.c nge_mii_send(sc, frame->mii_opcode, 2);
sc 513 dev/pci/if_nge.c nge_mii_send(sc, frame->mii_phyaddr, 5);
sc 514 dev/pci/if_nge.c nge_mii_send(sc, frame->mii_regaddr, 5);
sc 515 dev/pci/if_nge.c nge_mii_send(sc, frame->mii_turnaround, 2);
sc 516 dev/pci/if_nge.c nge_mii_send(sc, frame->mii_data, 16);
sc 539 dev/pci/if_nge.c struct nge_softc *sc = (struct nge_softc *)dev;
sc 542 dev/pci/if_nge.c DPRINTFN(9, ("%s: nge_miibus_readreg\n", sc->sc_dv.dv_xname));
sc 548 dev/pci/if_nge.c nge_mii_readreg(sc, &frame);
sc 558 dev/pci/if_nge.c struct nge_softc *sc = (struct nge_softc *)dev;
sc 562 dev/pci/if_nge.c DPRINTFN(9, ("%s: nge_miibus_writereg\n", sc->sc_dv.dv_xname));
sc 569 dev/pci/if_nge.c nge_mii_writereg(sc, &frame);
sc 576 dev/pci/if_nge.c struct nge_softc *sc = (struct nge_softc *)dev;
sc 577 dev/pci/if_nge.c struct mii_data *mii = &sc->nge_mii;
sc 580 dev/pci/if_nge.c txcfg = CSR_READ_4(sc, NGE_TX_CFG);
sc 581 dev/pci/if_nge.c rxcfg = CSR_READ_4(sc, NGE_RX_CFG);
sc 584 dev/pci/if_nge.c sc->sc_dv.dv_xname, txcfg, rxcfg));
sc 596 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_TX_CFG, txcfg);
sc 597 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RX_CFG, rxcfg);
sc 601 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_CFG, NGE_CFG_MODE_1000);
sc 603 dev/pci/if_nge.c NGE_CLRBIT(sc, NGE_CFG, NGE_CFG_MODE_1000);
sc 607 dev/pci/if_nge.c nge_setmulti(sc)
sc 608 dev/pci/if_nge.c struct nge_softc *sc;
sc 610 dev/pci/if_nge.c struct arpcom *ac = &sc->arpcom;
sc 619 dev/pci/if_nge.c NGE_CLRBIT(sc, NGE_RXFILT_CTL,
sc 621 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ALLMULTI);
sc 631 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_MCHASH);
sc 632 dev/pci/if_nge.c NGE_CLRBIT(sc, NGE_RXFILT_CTL,
sc 635 dev/pci/if_nge.c filtsave = CSR_READ_4(sc, NGE_RXFILT_CTL);
sc 639 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_MCAST_LO + i);
sc 640 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RXFILT_DATA, 0);
sc 659 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RXFILT_CTL,
sc 661 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_RXFILT_DATA, (1 << bit));
sc 665 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RXFILT_CTL, filtsave);
sc 669 dev/pci/if_nge.c nge_reset(sc)
sc 670 dev/pci/if_nge.c struct nge_softc *sc;
sc 674 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RESET);
sc 677 dev/pci/if_nge.c if (!(CSR_READ_4(sc, NGE_CSR) & NGE_CSR_RESET))
sc 682 dev/pci/if_nge.c printf("%s: reset never completed\n", sc->sc_dv.dv_xname);
sc 691 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_CLKRUN, NGE_CLKRUN_PMESTS);
sc 692 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_CLKRUN, 0);
sc 723 dev/pci/if_nge.c struct nge_softc *sc = (struct nge_softc *)self;
sc 743 dev/pci/if_nge.c DPRINTFN(5, ("%s: preparing for conf read\n", sc->sc_dv.dv_xname));
sc 757 dev/pci/if_nge.c "-- setting to D0\n", sc->sc_dv.dv_xname,
sc 773 dev/pci/if_nge.c DPRINTFN(5, ("%s: map control/status regs\n", sc->sc_dv.dv_xname));
sc 776 dev/pci/if_nge.c DPRINTFN(5, ("%s: pci_mapreg_map\n", sc->sc_dv.dv_xname));
sc 778 dev/pci/if_nge.c &sc->nge_btag, &sc->nge_bhandle, NULL, &size, 0)) {
sc 783 dev/pci/if_nge.c DPRINTFN(5, ("%s: pci_mapreg_map\n", sc->sc_dv.dv_xname));
sc 789 dev/pci/if_nge.c memtype, 0, &sc->nge_btag, &sc->nge_bhandle,
sc 799 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_IER, 0);
sc 801 dev/pci/if_nge.c DPRINTFN(5, ("%s: pci_intr_map\n", sc->sc_dv.dv_xname));
sc 807 dev/pci/if_nge.c DPRINTFN(5, ("%s: pci_intr_string\n", sc->sc_dv.dv_xname));
sc 809 dev/pci/if_nge.c DPRINTFN(5, ("%s: pci_intr_establish\n", sc->sc_dv.dv_xname));
sc 810 dev/pci/if_nge.c sc->nge_intrhand = pci_intr_establish(pc, ih, IPL_NET, nge_intr, sc,
sc 811 dev/pci/if_nge.c sc->sc_dv.dv_xname);
sc 812 dev/pci/if_nge.c if (sc->nge_intrhand == NULL) {
sc 822 dev/pci/if_nge.c DPRINTFN(5, ("%s: nge_reset\n", sc->sc_dv.dv_xname));
sc 823 dev/pci/if_nge.c nge_reset(sc);
sc 828 dev/pci/if_nge.c DPRINTFN(5, ("%s: nge_read_eeprom\n", sc->sc_dv.dv_xname));
sc 829 dev/pci/if_nge.c nge_read_eeprom(sc, (caddr_t)&eaddr[4], NGE_EE_NODEADDR, 1, 0);
sc 830 dev/pci/if_nge.c nge_read_eeprom(sc, (caddr_t)&eaddr[2], NGE_EE_NODEADDR + 1, 1, 0);
sc 831 dev/pci/if_nge.c nge_read_eeprom(sc, (caddr_t)&eaddr[0], NGE_EE_NODEADDR + 2, 1, 0);
sc 838 dev/pci/if_nge.c bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 840 dev/pci/if_nge.c sc->sc_dmatag = pa->pa_dmat;
sc 841 dev/pci/if_nge.c DPRINTFN(5, ("%s: bus_dmamem_alloc\n", sc->sc_dv.dv_xname));
sc 842 dev/pci/if_nge.c if (bus_dmamem_alloc(sc->sc_dmatag, sizeof(struct nge_list_data),
sc 844 dev/pci/if_nge.c printf("%s: can't alloc rx buffers\n", sc->sc_dv.dv_xname);
sc 847 dev/pci/if_nge.c DPRINTFN(5, ("%s: bus_dmamem_map\n", sc->sc_dv.dv_xname));
sc 848 dev/pci/if_nge.c if (bus_dmamem_map(sc->sc_dmatag, &seg, rseg,
sc 852 dev/pci/if_nge.c sc->sc_dv.dv_xname, sizeof(struct nge_list_data));
sc 855 dev/pci/if_nge.c DPRINTFN(5, ("%s: bus_dmamem_create\n", sc->sc_dv.dv_xname));
sc 856 dev/pci/if_nge.c if (bus_dmamap_create(sc->sc_dmatag, sizeof(struct nge_list_data), 1,
sc 859 dev/pci/if_nge.c printf("%s: can't create dma map\n", sc->sc_dv.dv_xname);
sc 862 dev/pci/if_nge.c DPRINTFN(5, ("%s: bus_dmamem_load\n", sc->sc_dv.dv_xname));
sc 863 dev/pci/if_nge.c if (bus_dmamap_load(sc->sc_dmatag, dmamap, kva,
sc 869 dev/pci/if_nge.c DPRINTFN(5, ("%s: bzero\n", sc->sc_dv.dv_xname));
sc 870 dev/pci/if_nge.c sc->nge_ldata = (struct nge_list_data *)kva;
sc 871 dev/pci/if_nge.c bzero(sc->nge_ldata, sizeof(struct nge_list_data));
sc 874 dev/pci/if_nge.c DPRINTFN(5, ("%s: nge_alloc_jumbo_mem\n", sc->sc_dv.dv_xname));
sc 875 dev/pci/if_nge.c if (nge_alloc_jumbo_mem(sc)) {
sc 877 dev/pci/if_nge.c sc->sc_dv.dv_xname);
sc 881 dev/pci/if_nge.c ifp = &sc->arpcom.ac_if;
sc 882 dev/pci/if_nge.c ifp->if_softc = sc;
sc 891 dev/pci/if_nge.c DPRINTFN(5, ("%s: bcopy\n", sc->sc_dv.dv_xname));
sc 892 dev/pci/if_nge.c bcopy(sc->sc_dv.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 903 dev/pci/if_nge.c DPRINTFN(5, ("%s: mii setup\n", sc->sc_dv.dv_xname));
sc 904 dev/pci/if_nge.c if (CSR_READ_4(sc, NGE_CFG) & NGE_CFG_TBI_EN) {
sc 905 dev/pci/if_nge.c DPRINTFN(5, ("%s: TBI mode\n", sc->sc_dv.dv_xname));
sc 906 dev/pci/if_nge.c sc->nge_tbi = 1;
sc 908 dev/pci/if_nge.c ifmedia_init(&sc->nge_ifmedia, 0, nge_ifmedia_tbi_upd,
sc 911 dev/pci/if_nge.c ifmedia_add(&sc->nge_ifmedia, IFM_ETHER|IFM_NONE, 0, NULL),
sc 912 dev/pci/if_nge.c ifmedia_add(&sc->nge_ifmedia, IFM_ETHER|IFM_1000_SX, 0, NULL);
sc 913 dev/pci/if_nge.c ifmedia_add(&sc->nge_ifmedia, IFM_ETHER|IFM_1000_SX|IFM_FDX,
sc 915 dev/pci/if_nge.c ifmedia_add(&sc->nge_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
sc 917 dev/pci/if_nge.c ifmedia_set(&sc->nge_ifmedia, IFM_ETHER|IFM_AUTO);
sc 919 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
sc 925 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_CFG, NGE_CFG_MODE_1000);
sc 927 dev/pci/if_nge.c sc->nge_mii.mii_ifp = ifp;
sc 928 dev/pci/if_nge.c sc->nge_mii.mii_readreg = nge_miibus_readreg;
sc 929 dev/pci/if_nge.c sc->nge_mii.mii_writereg = nge_miibus_writereg;
sc 930 dev/pci/if_nge.c sc->nge_mii.mii_statchg = nge_miibus_statchg;
sc 932 dev/pci/if_nge.c ifmedia_init(&sc->nge_mii.mii_media, 0, nge_ifmedia_mii_upd,
sc 934 dev/pci/if_nge.c mii_attach(&sc->sc_dv, &sc->nge_mii, 0xffffffff, MII_PHY_ANY,
sc 937 dev/pci/if_nge.c if (LIST_FIRST(&sc->nge_mii.mii_phys) == NULL) {
sc 939 dev/pci/if_nge.c printf("%s: no PHY found!\n", sc->sc_dv.dv_xname);
sc 940 dev/pci/if_nge.c ifmedia_add(&sc->nge_mii.mii_media,
sc 942 dev/pci/if_nge.c ifmedia_set(&sc->nge_mii.mii_media,
sc 946 dev/pci/if_nge.c ifmedia_set(&sc->nge_mii.mii_media,
sc 953 dev/pci/if_nge.c DPRINTFN(5, ("%s: if_attach\n", sc->sc_dv.dv_xname));
sc 955 dev/pci/if_nge.c DPRINTFN(5, ("%s: ether_ifattach\n", sc->sc_dv.dv_xname));
sc 957 dev/pci/if_nge.c DPRINTFN(5, ("%s: timeout_set\n", sc->sc_dv.dv_xname));
sc 958 dev/pci/if_nge.c timeout_set(&sc->nge_timeout, nge_tick, sc);
sc 959 dev/pci/if_nge.c timeout_add(&sc->nge_timeout, hz);
sc 963 dev/pci/if_nge.c bus_dmamap_destroy(sc->sc_dmatag, dmamap);
sc 966 dev/pci/if_nge.c bus_dmamem_unmap(sc->sc_dmatag, kva,
sc 970 dev/pci/if_nge.c bus_dmamem_free(sc->sc_dmatag, &seg, rseg);
sc 973 dev/pci/if_nge.c pci_intr_disestablish(pc, sc->nge_intrhand);
sc 976 dev/pci/if_nge.c bus_space_unmap(sc->nge_btag, sc->nge_bhandle, size);
sc 983 dev/pci/if_nge.c nge_list_tx_init(sc)
sc 984 dev/pci/if_nge.c struct nge_softc *sc;
sc 990 dev/pci/if_nge.c cd = &sc->nge_cdata;
sc 991 dev/pci/if_nge.c ld = sc->nge_ldata;
sc 1022 dev/pci/if_nge.c nge_list_rx_init(sc)
sc 1023 dev/pci/if_nge.c struct nge_softc *sc;
sc 1029 dev/pci/if_nge.c ld = sc->nge_ldata;
sc 1030 dev/pci/if_nge.c cd = &sc->nge_cdata;
sc 1033 dev/pci/if_nge.c if (nge_newbuf(sc, &ld->nge_rx_list[i], NULL) == ENOBUFS)
sc 1057 dev/pci/if_nge.c nge_newbuf(sc, c, m)
sc 1058 dev/pci/if_nge.c struct nge_softc *sc;
sc 1072 dev/pci/if_nge.c buf = nge_jalloc(sc);
sc 1080 dev/pci/if_nge.c MEXTADD(m_new, buf, NGE_MCLBYTES, 0, nge_jfree, sc);
sc 1096 dev/pci/if_nge.c DPRINTFN(7,("%s: c->nge_ptr=%#x\n", sc->sc_dv.dv_xname,
sc 1105 dev/pci/if_nge.c nge_alloc_jumbo_mem(sc)
sc 1106 dev/pci/if_nge.c struct nge_softc *sc;
sc 1116 dev/pci/if_nge.c if (bus_dmamem_alloc(sc->sc_dmatag, NGE_JMEM, PAGE_SIZE, 0,
sc 1118 dev/pci/if_nge.c printf("%s: can't alloc rx buffers\n", sc->sc_dv.dv_xname);
sc 1123 dev/pci/if_nge.c if (bus_dmamem_map(sc->sc_dmatag, &seg, rseg, NGE_JMEM, &kva,
sc 1126 dev/pci/if_nge.c sc->sc_dv.dv_xname, NGE_JMEM);
sc 1132 dev/pci/if_nge.c if (bus_dmamap_create(sc->sc_dmatag, NGE_JMEM, 1,
sc 1134 dev/pci/if_nge.c printf("%s: can't create dma map\n", sc->sc_dv.dv_xname);
sc 1140 dev/pci/if_nge.c if (bus_dmamap_load(sc->sc_dmatag, dmamap, kva, NGE_JMEM,
sc 1142 dev/pci/if_nge.c printf("%s: can't load dma map\n", sc->sc_dv.dv_xname);
sc 1148 dev/pci/if_nge.c sc->nge_cdata.nge_jumbo_buf = (caddr_t)kva;
sc 1150 dev/pci/if_nge.c sc->sc_dv.dv_xname , sc->nge_cdata.nge_jumbo_buf,
sc 1153 dev/pci/if_nge.c LIST_INIT(&sc->nge_jfree_listhead);
sc 1154 dev/pci/if_nge.c LIST_INIT(&sc->nge_jinuse_listhead);
sc 1164 dev/pci/if_nge.c ptr = sc->nge_cdata.nge_jumbo_buf;
sc 1166 dev/pci/if_nge.c sc->nge_cdata.nge_jslots[i].nge_buf = ptr;
sc 1167 dev/pci/if_nge.c sc->nge_cdata.nge_jslots[i].nge_inuse = 0;
sc 1172 dev/pci/if_nge.c sc->nge_cdata.nge_jumbo_buf = NULL;
sc 1174 dev/pci/if_nge.c sc->sc_dv.dv_xname);
sc 1179 dev/pci/if_nge.c LIST_INSERT_HEAD(&sc->nge_jfree_listhead, entry,
sc 1186 dev/pci/if_nge.c bus_dmamap_unload(sc->sc_dmatag, dmamap);
sc 1188 dev/pci/if_nge.c bus_dmamap_destroy(sc->sc_dmatag, dmamap);
sc 1190 dev/pci/if_nge.c bus_dmamem_unmap(sc->sc_dmatag, kva, NGE_JMEM);
sc 1192 dev/pci/if_nge.c bus_dmamem_free(sc->sc_dmatag, &seg, rseg);
sc 1206 dev/pci/if_nge.c nge_jalloc(sc)
sc 1207 dev/pci/if_nge.c struct nge_softc *sc;
sc 1211 dev/pci/if_nge.c entry = LIST_FIRST(&sc->nge_jfree_listhead);
sc 1217 dev/pci/if_nge.c LIST_INSERT_HEAD(&sc->nge_jinuse_listhead, entry, jpool_entries);
sc 1218 dev/pci/if_nge.c sc->nge_cdata.nge_jslots[entry->slot].nge_inuse = 1;
sc 1219 dev/pci/if_nge.c return(sc->nge_cdata.nge_jslots[entry->slot].nge_buf);
sc 1231 dev/pci/if_nge.c struct nge_softc *sc;
sc 1236 dev/pci/if_nge.c sc = (struct nge_softc *)arg;
sc 1238 dev/pci/if_nge.c if (sc == NULL)
sc 1243 dev/pci/if_nge.c i = ((vaddr_t)buf - (vaddr_t)sc->nge_cdata.nge_jumbo_buf)
sc 1248 dev/pci/if_nge.c else if (sc->nge_cdata.nge_jslots[i].nge_inuse == 0)
sc 1251 dev/pci/if_nge.c sc->nge_cdata.nge_jslots[i].nge_inuse--;
sc 1252 dev/pci/if_nge.c if(sc->nge_cdata.nge_jslots[i].nge_inuse == 0) {
sc 1253 dev/pci/if_nge.c entry = LIST_FIRST(&sc->nge_jinuse_listhead);
sc 1258 dev/pci/if_nge.c LIST_INSERT_HEAD(&sc->nge_jfree_listhead,
sc 1269 dev/pci/if_nge.c nge_rxeof(sc)
sc 1270 dev/pci/if_nge.c struct nge_softc *sc;
sc 1278 dev/pci/if_nge.c ifp = &sc->arpcom.ac_if;
sc 1279 dev/pci/if_nge.c i = sc->nge_cdata.nge_rx_prod;
sc 1281 dev/pci/if_nge.c while(NGE_OWNDESC(&sc->nge_ldata->nge_rx_list[i])) {
sc 1285 dev/pci/if_nge.c cur_rx = &sc->nge_ldata->nge_rx_list[i];
sc 1301 dev/pci/if_nge.c nge_newbuf(sc, cur_rx, m);
sc 1319 dev/pci/if_nge.c if (nge_newbuf(sc, cur_rx, NULL) == ENOBUFS) {
sc 1323 dev/pci/if_nge.c nge_newbuf(sc, cur_rx, m);
sc 1362 dev/pci/if_nge.c sc->nge_cdata.nge_rx_prod = i;
sc 1371 dev/pci/if_nge.c nge_txeof(sc)
sc 1372 dev/pci/if_nge.c struct nge_softc *sc;
sc 1378 dev/pci/if_nge.c ifp = &sc->arpcom.ac_if;
sc 1384 dev/pci/if_nge.c idx = sc->nge_cdata.nge_tx_cons;
sc 1385 dev/pci/if_nge.c while (idx != sc->nge_cdata.nge_tx_prod) {
sc 1386 dev/pci/if_nge.c cur_tx = &sc->nge_ldata->nge_tx_list[idx];
sc 1392 dev/pci/if_nge.c sc->nge_cdata.nge_tx_cnt--;
sc 1415 dev/pci/if_nge.c sc->nge_cdata.nge_tx_cnt--;
sc 1419 dev/pci/if_nge.c sc->nge_cdata.nge_tx_cons = idx;
sc 1421 dev/pci/if_nge.c if (idx == sc->nge_cdata.nge_tx_prod)
sc 1429 dev/pci/if_nge.c struct nge_softc *sc = xsc;
sc 1430 dev/pci/if_nge.c struct mii_data *mii = &sc->nge_mii;
sc 1431 dev/pci/if_nge.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 1436 dev/pci/if_nge.c DPRINTFN(10, ("%s: nge_tick: link=%d\n", sc->sc_dv.dv_xname,
sc 1437 dev/pci/if_nge.c sc->nge_link));
sc 1439 dev/pci/if_nge.c timeout_add(&sc->nge_timeout, hz);
sc 1440 dev/pci/if_nge.c if (sc->nge_link) {
sc 1445 dev/pci/if_nge.c if (sc->nge_tbi) {
sc 1446 dev/pci/if_nge.c if (IFM_SUBTYPE(sc->nge_ifmedia.ifm_cur->ifm_media)
sc 1450 dev/pci/if_nge.c bmsr = CSR_READ_4(sc, NGE_TBI_BMSR);
sc 1452 dev/pci/if_nge.c sc->sc_dv.dv_xname, bmsr));
sc 1455 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_TBI_BMCR, 0);
sc 1461 dev/pci/if_nge.c anlpar = CSR_READ_4(sc, NGE_TBI_ANLPAR);
sc 1462 dev/pci/if_nge.c txcfg = CSR_READ_4(sc, NGE_TX_CFG);
sc 1463 dev/pci/if_nge.c rxcfg = CSR_READ_4(sc, NGE_RX_CFG);
sc 1466 dev/pci/if_nge.c "rxcfg=%#x\n", sc->sc_dv.dv_xname, anlpar,
sc 1479 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_TX_CFG, txcfg);
sc 1480 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RX_CFG, rxcfg);
sc 1483 dev/pci/if_nge.c DPRINTF(("%s: gigabit link up\n", sc->sc_dv.dv_xname));
sc 1484 dev/pci/if_nge.c sc->nge_link++;
sc 1491 dev/pci/if_nge.c sc->nge_link++;
sc 1494 dev/pci/if_nge.c sc->sc_dv.dv_xname));
sc 1508 dev/pci/if_nge.c struct nge_softc *sc;
sc 1513 dev/pci/if_nge.c sc = arg;
sc 1514 dev/pci/if_nge.c ifp = &sc->arpcom.ac_if;
sc 1518 dev/pci/if_nge.c nge_stop(sc);
sc 1523 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_IER, 0);
sc 1526 dev/pci/if_nge.c if(sc->nge_tbi)
sc 1527 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
sc 1532 dev/pci/if_nge.c status = CSR_READ_4(sc, NGE_ISR);
sc 1543 dev/pci/if_nge.c nge_txeof(sc);
sc 1551 dev/pci/if_nge.c nge_rxeof(sc);
sc 1554 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE);
sc 1557 dev/pci/if_nge.c nge_reset(sc);
sc 1559 dev/pci/if_nge.c nge_init(sc);
sc 1569 dev/pci/if_nge.c sc->nge_link = 0;
sc 1570 dev/pci/if_nge.c nge_tick(sc);
sc 1576 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_IER, 1);
sc 1582 dev/pci/if_nge.c if(sc->nge_tbi)
sc 1583 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
sc 1594 dev/pci/if_nge.c nge_encap(sc, m_head, txidx)
sc 1595 dev/pci/if_nge.c struct nge_softc *sc;
sc 1621 dev/pci/if_nge.c (sc->nge_cdata.nge_tx_cnt + cnt)) < 2)
sc 1623 dev/pci/if_nge.c f = &sc->nge_ldata->nge_tx_list[frag];
sc 1627 dev/pci/if_nge.c sc->sc_dv.dv_xname, f->nge_ptr));
sc 1639 dev/pci/if_nge.c sc->nge_ldata->nge_tx_list[*txidx].nge_extsts = 0;
sc 1643 dev/pci/if_nge.c sc->nge_ldata->nge_tx_list[cur].nge_extsts |=
sc 1648 dev/pci/if_nge.c sc->nge_ldata->nge_tx_list[cur].nge_mbuf = m_head;
sc 1649 dev/pci/if_nge.c sc->nge_ldata->nge_tx_list[cur].nge_ctl &= ~NGE_CMDSTS_MORE;
sc 1650 dev/pci/if_nge.c sc->nge_ldata->nge_tx_list[*txidx].nge_ctl |= NGE_CMDSTS_OWN;
sc 1651 dev/pci/if_nge.c sc->nge_cdata.nge_tx_cnt += cnt;
sc 1668 dev/pci/if_nge.c struct nge_softc *sc;
sc 1673 dev/pci/if_nge.c sc = ifp->if_softc;
sc 1675 dev/pci/if_nge.c if (!sc->nge_link)
sc 1678 dev/pci/if_nge.c idx = sc->nge_cdata.nge_tx_prod;
sc 1683 dev/pci/if_nge.c while(sc->nge_ldata->nge_tx_list[idx].nge_mbuf == NULL) {
sc 1688 dev/pci/if_nge.c if (nge_encap(sc, m_head, &idx)) {
sc 1710 dev/pci/if_nge.c sc->nge_cdata.nge_tx_prod = idx;
sc 1711 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_CSR, NGE_CSR_TX_ENABLE);
sc 1723 dev/pci/if_nge.c struct nge_softc *sc = xsc;
sc 1724 dev/pci/if_nge.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 1737 dev/pci/if_nge.c nge_stop(sc);
sc 1739 dev/pci/if_nge.c mii = sc->nge_tbi ? NULL: &sc->nge_mii;
sc 1742 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR0);
sc 1743 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RXFILT_DATA,
sc 1744 dev/pci/if_nge.c ((u_int16_t *)sc->arpcom.ac_enaddr)[0]);
sc 1745 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR1);
sc 1746 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RXFILT_DATA,
sc 1747 dev/pci/if_nge.c ((u_int16_t *)sc->arpcom.ac_enaddr)[1]);
sc 1748 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR2);
sc 1749 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RXFILT_DATA,
sc 1750 dev/pci/if_nge.c ((u_int16_t *)sc->arpcom.ac_enaddr)[2]);
sc 1753 dev/pci/if_nge.c if (nge_list_rx_init(sc) == ENOBUFS) {
sc 1755 dev/pci/if_nge.c "memory for rx buffers\n", sc->sc_dv.dv_xname);
sc 1756 dev/pci/if_nge.c nge_stop(sc);
sc 1764 dev/pci/if_nge.c nge_list_tx_init(sc);
sc 1772 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ARP);
sc 1773 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_PERFECT);
sc 1777 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ALLPHYS);
sc 1779 dev/pci/if_nge.c NGE_CLRBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ALLPHYS);
sc 1785 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_BROAD);
sc 1787 dev/pci/if_nge.c NGE_CLRBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_BROAD);
sc 1792 dev/pci/if_nge.c nge_setmulti(sc);
sc 1795 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ENABLE);
sc 1800 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RX_LISTPTR,
sc 1801 dev/pci/if_nge.c VTOPHYS(&sc->nge_ldata->nge_rx_list[0]));
sc 1802 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_TX_LISTPTR,
sc 1803 dev/pci/if_nge.c VTOPHYS(&sc->nge_ldata->nge_tx_list[0]));
sc 1806 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RX_CFG, NGE_RXCFG);
sc 1812 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_VLAN_IP_RXCTL, NGE_VIPRXCTL_IPCSUM_ENB);
sc 1815 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_TX_CFG, NGE_TXCFG);
sc 1824 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_VLAN_IP_TXCTL, NGE_VIPTXCTL_TAG_PER_PKT);
sc 1828 dev/pci/if_nge.c if (sc->nge_tbi)
sc 1829 dev/pci/if_nge.c media = sc->nge_ifmedia.ifm_cur->ifm_media;
sc 1833 dev/pci/if_nge.c txcfg = CSR_READ_4(sc, NGE_TX_CFG);
sc 1834 dev/pci/if_nge.c rxcfg = CSR_READ_4(sc, NGE_RX_CFG);
sc 1837 dev/pci/if_nge.c sc->sc_dv.dv_xname, txcfg, rxcfg));
sc 1849 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_TX_CFG, txcfg);
sc 1850 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RX_CFG, rxcfg);
sc 1852 dev/pci/if_nge.c nge_tick(sc);
sc 1860 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_CFG, NGE_CFG_PHYINTR_SPD|NGE_CFG_PHYINTR_LNK|
sc 1863 dev/pci/if_nge.c DPRINTFN(1, ("%s: nge_init: config=%#x\n", sc->sc_dv.dv_xname,
sc 1864 dev/pci/if_nge.c CSR_READ_4(sc, NGE_CFG)));
sc 1872 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_IHR, 0x01);
sc 1877 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_IMR, NGE_INTRS);
sc 1878 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_IER, 1);
sc 1881 dev/pci/if_nge.c NGE_CLRBIT(sc, NGE_CSR, NGE_CSR_TX_DISABLE|NGE_CSR_RX_DISABLE);
sc 1882 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE);
sc 1884 dev/pci/if_nge.c if (sc->nge_tbi)
sc 1902 dev/pci/if_nge.c struct nge_softc *sc = ifp->if_softc;
sc 1903 dev/pci/if_nge.c struct mii_data *mii = &sc->nge_mii;
sc 1905 dev/pci/if_nge.c DPRINTFN(2, ("%s: nge_ifmedia_mii_upd\n", sc->sc_dv.dv_xname));
sc 1907 dev/pci/if_nge.c sc->nge_link = 0;
sc 1927 dev/pci/if_nge.c struct nge_softc *sc = ifp->if_softc;
sc 1928 dev/pci/if_nge.c struct mii_data *mii = &sc->nge_mii;
sc 1930 dev/pci/if_nge.c DPRINTFN(2, ("%s: nge_ifmedia_mii_sts\n", sc->sc_dv.dv_xname));
sc 1944 dev/pci/if_nge.c struct nge_softc *sc = ifp->if_softc;
sc 1946 dev/pci/if_nge.c DPRINTFN(2, ("%s: nge_ifmedia_tbi_upd\n", sc->sc_dv.dv_xname));
sc 1948 dev/pci/if_nge.c sc->nge_link = 0;
sc 1950 dev/pci/if_nge.c if (IFM_SUBTYPE(sc->nge_ifmedia.ifm_cur->ifm_media)
sc 1953 dev/pci/if_nge.c anar = CSR_READ_4(sc, NGE_TBI_ANAR);
sc 1955 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_TBI_ANAR, anar);
sc 1957 dev/pci/if_nge.c bmcr = CSR_READ_4(sc, NGE_TBI_BMCR);
sc 1959 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_TBI_BMCR, bmcr);
sc 1962 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_TBI_BMCR, bmcr);
sc 1965 dev/pci/if_nge.c txcfg = CSR_READ_4(sc, NGE_TX_CFG);
sc 1966 dev/pci/if_nge.c rxcfg = CSR_READ_4(sc, NGE_RX_CFG);
sc 1968 dev/pci/if_nge.c if ((sc->nge_ifmedia.ifm_cur->ifm_media & IFM_GMASK)
sc 1978 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_TX_CFG, txcfg);
sc 1979 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RX_CFG, rxcfg);
sc 1982 dev/pci/if_nge.c NGE_CLRBIT(sc, NGE_GPIO, NGE_GPIO_GP3_OUT);
sc 1995 dev/pci/if_nge.c struct nge_softc *sc = ifp->if_softc;
sc 1998 dev/pci/if_nge.c bmcr = CSR_READ_4(sc, NGE_TBI_BMCR);
sc 2000 dev/pci/if_nge.c if (IFM_SUBTYPE(sc->nge_ifmedia.ifm_cur->ifm_media) == IFM_AUTO) {
sc 2001 dev/pci/if_nge.c u_int32_t bmsr = CSR_READ_4(sc, NGE_TBI_BMSR);
sc 2003 dev/pci/if_nge.c sc->sc_dv.dv_xname, bmsr, bmcr));
sc 2012 dev/pci/if_nge.c sc->sc_dv.dv_xname, bmcr));
sc 2021 dev/pci/if_nge.c if (IFM_SUBTYPE(sc->nge_ifmedia.ifm_cur->ifm_media) == IFM_AUTO) {
sc 2022 dev/pci/if_nge.c u_int32_t anlpar = CSR_READ_4(sc, NGE_TBI_ANLPAR);
sc 2024 dev/pci/if_nge.c sc->sc_dv.dv_xname, anlpar));
sc 2034 dev/pci/if_nge.c } else if ((sc->nge_ifmedia.ifm_cur->ifm_media & IFM_GMASK) == IFM_FDX)
sc 2047 dev/pci/if_nge.c struct nge_softc *sc = ifp->if_softc;
sc 2055 dev/pci/if_nge.c if ((error = ether_ioctl(ifp, &sc->arpcom, command, data)) > 0) {
sc 2072 dev/pci/if_nge.c nge_init(sc);
sc 2073 dev/pci/if_nge.c arp_ifinit(&sc->arpcom, ifa);
sc 2077 dev/pci/if_nge.c nge_init(sc);
sc 2085 dev/pci/if_nge.c !(sc->nge_if_flags & IFF_PROMISC)) {
sc 2086 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_RXFILT_CTL,
sc 2091 dev/pci/if_nge.c sc->nge_if_flags & IFF_PROMISC) {
sc 2092 dev/pci/if_nge.c NGE_CLRBIT(sc, NGE_RXFILT_CTL,
sc 2095 dev/pci/if_nge.c NGE_CLRBIT(sc, NGE_RXFILT_CTL,
sc 2099 dev/pci/if_nge.c nge_init(sc);
sc 2103 dev/pci/if_nge.c nge_stop(sc);
sc 2105 dev/pci/if_nge.c sc->nge_if_flags = ifp->if_flags;
sc 2111 dev/pci/if_nge.c ? ether_addmulti(ifr, &sc->arpcom)
sc 2112 dev/pci/if_nge.c : ether_delmulti(ifr, &sc->arpcom);
sc 2116 dev/pci/if_nge.c nge_setmulti(sc);
sc 2122 dev/pci/if_nge.c if (sc->nge_tbi) {
sc 2123 dev/pci/if_nge.c error = ifmedia_ioctl(ifp, ifr, &sc->nge_ifmedia,
sc 2126 dev/pci/if_nge.c mii = &sc->nge_mii;
sc 2145 dev/pci/if_nge.c struct nge_softc *sc;
sc 2147 dev/pci/if_nge.c sc = ifp->if_softc;
sc 2150 dev/pci/if_nge.c printf("%s: watchdog timeout\n", sc->sc_dv.dv_xname);
sc 2152 dev/pci/if_nge.c nge_stop(sc);
sc 2153 dev/pci/if_nge.c nge_reset(sc);
sc 2155 dev/pci/if_nge.c nge_init(sc);
sc 2166 dev/pci/if_nge.c nge_stop(sc)
sc 2167 dev/pci/if_nge.c struct nge_softc *sc;
sc 2173 dev/pci/if_nge.c ifp = &sc->arpcom.ac_if;
sc 2175 dev/pci/if_nge.c if (sc->nge_tbi) {
sc 2178 dev/pci/if_nge.c mii = &sc->nge_mii;
sc 2181 dev/pci/if_nge.c timeout_del(&sc->nge_timeout);
sc 2185 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_IER, 0);
sc 2186 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_IMR, 0);
sc 2187 dev/pci/if_nge.c NGE_SETBIT(sc, NGE_CSR, NGE_CSR_TX_DISABLE|NGE_CSR_RX_DISABLE);
sc 2189 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_TX_LISTPTR, 0);
sc 2190 dev/pci/if_nge.c CSR_WRITE_4(sc, NGE_RX_LISTPTR, 0);
sc 2192 dev/pci/if_nge.c if (!sc->nge_tbi)
sc 2195 dev/pci/if_nge.c sc->nge_link = 0;
sc 2201 dev/pci/if_nge.c if (sc->nge_ldata->nge_rx_list[i].nge_mbuf != NULL) {
sc 2202 dev/pci/if_nge.c m_freem(sc->nge_ldata->nge_rx_list[i].nge_mbuf);
sc 2203 dev/pci/if_nge.c sc->nge_ldata->nge_rx_list[i].nge_mbuf = NULL;
sc 2206 dev/pci/if_nge.c bzero((char *)&sc->nge_ldata->nge_rx_list,
sc 2207 dev/pci/if_nge.c sizeof(sc->nge_ldata->nge_rx_list));
sc 2213 dev/pci/if_nge.c if (sc->nge_ldata->nge_tx_list[i].nge_mbuf != NULL) {
sc 2214 dev/pci/if_nge.c m_freem(sc->nge_ldata->nge_tx_list[i].nge_mbuf);
sc 2215 dev/pci/if_nge.c sc->nge_ldata->nge_tx_list[i].nge_mbuf = NULL;
sc 2219 dev/pci/if_nge.c bzero((char *)&sc->nge_ldata->nge_tx_list,
sc 2220 dev/pci/if_nge.c sizeof(sc->nge_ldata->nge_tx_list));
sc 2231 dev/pci/if_nge.c struct nge_softc *sc = (struct nge_softc *)xsc;
sc 2233 dev/pci/if_nge.c nge_reset(sc);
sc 2234 dev/pci/if_nge.c nge_stop(sc);
sc 674 dev/pci/if_ngereg.h #define CSR_WRITE_4(sc, reg, val) \
sc 675 dev/pci/if_ngereg.h bus_space_write_4(sc->nge_btag, sc->nge_bhandle, reg, val)
sc 677 dev/pci/if_ngereg.h #define CSR_READ_4(sc, reg) \
sc 678 dev/pci/if_ngereg.h bus_space_read_4(sc->nge_btag, sc->nge_bhandle, reg)
sc 845 dev/pci/if_nxe.c struct nxe_softc *sc = (struct nxe_softc *)self;
sc 850 dev/pci/if_nxe.c sc->sc_dmat = pa->pa_dmat;
sc 851 dev/pci/if_nxe.c sc->sc_function = pa->pa_function;
sc 852 dev/pci/if_nxe.c sc->sc_window = -1;
sc 854 dev/pci/if_nxe.c rw_init(&sc->sc_lock, NULL);
sc 856 dev/pci/if_nxe.c if (nxe_pci_map(sc, pa) != 0) {
sc 861 dev/pci/if_nxe.c nxe_crb_set(sc, 1);
sc 863 dev/pci/if_nxe.c if (nxe_board_info(sc) != 0) {
sc 868 dev/pci/if_nxe.c if (nxe_user_info(sc) != 0) {
sc 873 dev/pci/if_nxe.c if (nxe_init(sc) != 0) {
sc 882 dev/pci/if_nxe.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_NET,
sc 883 dev/pci/if_nxe.c nxe_intr, sc, DEVNAME(sc));
sc 884 dev/pci/if_nxe.c if (sc->sc_ih == NULL) {
sc 889 dev/pci/if_nxe.c ifp = &sc->sc_ac.ac_if;
sc 890 dev/pci/if_nxe.c ifp->if_softc = sc;
sc 897 dev/pci/if_nxe.c strlcpy(ifp->if_xname, DEVNAME(sc), IFNAMSIZ);
sc 901 dev/pci/if_nxe.c ifmedia_init(&sc->sc_media, 0, nxe_media_change, nxe_media_status);
sc 902 dev/pci/if_nxe.c ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_AUTO, 0, NULL);
sc 903 dev/pci/if_nxe.c ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_AUTO);
sc 910 dev/pci/if_nxe.c sc->sc_fw_major, sc->sc_fw_minor, sc->sc_fw_build,
sc 911 dev/pci/if_nxe.c ether_sprintf(sc->sc_ac.ac_enaddr));
sc 915 dev/pci/if_nxe.c nxe_uninit(sc);
sc 917 dev/pci/if_nxe.c nxe_pci_unmap(sc);
sc 921 dev/pci/if_nxe.c nxe_pci_map(struct nxe_softc *sc, struct pci_attach_args *pa)
sc 926 dev/pci/if_nxe.c if (pci_mapreg_map(pa, NXE_PCI_BAR_MEM, memtype, 0, &sc->sc_memt,
sc 927 dev/pci/if_nxe.c &sc->sc_memh, NULL, &sc->sc_mems, 0) != 0) {
sc 931 dev/pci/if_nxe.c if (sc->sc_mems != NXE_PCI_BAR_MEM_128MB) {
sc 937 dev/pci/if_nxe.c if (bus_space_subregion(sc->sc_memt, sc->sc_memh, NXE_MAP_CRB,
sc 938 dev/pci/if_nxe.c sc->sc_mems - NXE_MAP_CRB, &sc->sc_crbh) != 0) {
sc 944 dev/pci/if_nxe.c if (pci_mapreg_map(pa, NXE_PCI_BAR_DOORBELL, memtype, 0, &sc->sc_dbt,
sc 945 dev/pci/if_nxe.c &sc->sc_dbh, NULL, &sc->sc_dbs, 0) != 0) {
sc 951 dev/pci/if_nxe.c mountroothook_establish(nxe_mountroot, sc);
sc 955 dev/pci/if_nxe.c bus_space_unmap(sc->sc_memt, sc->sc_memh, sc->sc_mems);
sc 956 dev/pci/if_nxe.c sc->sc_mems = 0;
sc 961 dev/pci/if_nxe.c nxe_pci_unmap(struct nxe_softc *sc)
sc 963 dev/pci/if_nxe.c bus_space_unmap(sc->sc_dbt, sc->sc_dbh, sc->sc_dbs);
sc 964 dev/pci/if_nxe.c sc->sc_dbs = 0;
sc 966 dev/pci/if_nxe.c bus_space_unmap(sc->sc_memt, sc->sc_memh, sc->sc_mems);
sc 967 dev/pci/if_nxe.c sc->sc_mems = 0;
sc 979 dev/pci/if_nxe.c struct nxe_softc *sc = ifp->if_softc;
sc 985 dev/pci/if_nxe.c rw_enter_write(&sc->sc_lock);
sc 988 dev/pci/if_nxe.c error = ether_ioctl(ifp, &sc->sc_ac, cmd, addr);
sc 992 dev/pci/if_nxe.c timeout_del(&sc->sc_tick);
sc 1000 dev/pci/if_nxe.c arp_ifinit(&sc->sc_ac, ifa);
sc 1008 dev/pci/if_nxe.c nxe_up(sc);
sc 1011 dev/pci/if_nxe.c nxe_down(sc);
sc 1017 dev/pci/if_nxe.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
sc 1027 dev/pci/if_nxe.c nxe_crb_set(sc, 0);
sc 1028 dev/pci/if_nxe.c nxe_iff(sc);
sc 1029 dev/pci/if_nxe.c nxe_crb_set(sc, 1);
sc 1034 dev/pci/if_nxe.c nxe_tick(sc);
sc 1038 dev/pci/if_nxe.c rw_exit_write(&sc->sc_lock);
sc 1043 dev/pci/if_nxe.c nxe_up(struct nxe_softc *sc)
sc 1045 dev/pci/if_nxe.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 1057 dev/pci/if_nxe.c if (nxe_up_fw(sc) != 0)
sc 1061 dev/pci/if_nxe.c sc->sc_tx_pkts = nxe_pkt_alloc(sc, 128, NXE_TXD_MAX_SEGS);
sc 1062 dev/pci/if_nxe.c if (sc->sc_tx_pkts == NULL)
sc 1064 dev/pci/if_nxe.c sc->sc_rx_pkts = nxe_pkt_alloc(sc, 128, NXE_RXD_MAX_SEGS);
sc 1065 dev/pci/if_nxe.c if (sc->sc_rx_pkts == NULL)
sc 1069 dev/pci/if_nxe.c sc->sc_ctx = nxe_dmamem_alloc(sc, sizeof(*dmamem), PAGE_SIZE);
sc 1070 dev/pci/if_nxe.c if (sc->sc_ctx == NULL)
sc 1073 dev/pci/if_nxe.c dmamem = NXE_DMA_KVA(sc->sc_ctx);
sc 1074 dev/pci/if_nxe.c dva = NXE_DMA_DVA(sc->sc_ctx);
sc 1078 dev/pci/if_nxe.c ctx->ctx_id = htole32(sc->sc_function);
sc 1080 dev/pci/if_nxe.c sc->sc_cmd_consumer = &dmamem->cmd_consumer;
sc 1083 dev/pci/if_nxe.c sc->sc_cmd_ring = nxe_ring_alloc(sc,
sc 1085 dev/pci/if_nxe.c if (sc->sc_cmd_ring == NULL)
sc 1089 dev/pci/if_nxe.c htole64(NXE_DMA_DVA(sc->sc_cmd_ring->nr_dmamem));
sc 1090 dev/pci/if_nxe.c ctx->ctx_cmd_ring.r_size = htole64(sc->sc_cmd_ring->nr_nentries);
sc 1093 dev/pci/if_nxe.c sc->sc_status_ring = nxe_ring_alloc(sc,
sc 1095 dev/pci/if_nxe.c if (sc->sc_status_ring == NULL)
sc 1099 dev/pci/if_nxe.c htole64(NXE_DMA_DVA(sc->sc_status_ring->nr_dmamem));
sc 1100 dev/pci/if_nxe.c ctx->ctx_status_ring_size = htole64(sc->sc_status_ring->nr_nentries);
sc 1105 dev/pci/if_nxe.c nr = nxe_ring_alloc(sc, sizeof(struct nxe_rx_desc),
sc 1113 dev/pci/if_nxe.c sc->sc_rx_rings[i] = nr;
sc 1114 dev/pci/if_nxe.c nxe_ring_sync(sc, sc->sc_rx_rings[i], BUS_DMASYNC_PREWRITE);
sc 1118 dev/pci/if_nxe.c nxe_ring_sync(sc, sc->sc_status_ring, BUS_DMASYNC_PREREAD);
sc 1119 dev/pci/if_nxe.c nxe_ring_sync(sc, sc->sc_cmd_ring, BUS_DMASYNC_PREWRITE);
sc 1120 dev/pci/if_nxe.c bus_dmamap_sync(sc->sc_dmat, NXE_DMA_MAP(sc->sc_ctx),
sc 1121 dev/pci/if_nxe.c 0, NXE_DMA_LEN(sc->sc_ctx),
sc 1124 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_CONTEXT_ADDR_LO(sc->sc_function),
sc 1126 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_CONTEXT_ADDR_HI(sc->sc_function),
sc 1128 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_CONTEXT(sc->sc_port),
sc 1129 dev/pci/if_nxe.c NXE_1_SW_CONTEXT_SIG(sc->sc_port));
sc 1131 dev/pci/if_nxe.c nxe_crb_set(sc, 0);
sc 1132 dev/pci/if_nxe.c nxe_lladdr(sc);
sc 1133 dev/pci/if_nxe.c nxe_iff(sc);
sc 1134 dev/pci/if_nxe.c nxe_crb_set(sc, 1);
sc 1146 dev/pci/if_nxe.c nxe_ring_sync(sc, sc->sc_rx_rings[i], BUS_DMASYNC_POSTWRITE);
sc 1147 dev/pci/if_nxe.c nxe_ring_free(sc, sc->sc_rx_rings[i]);
sc 1150 dev/pci/if_nxe.c nxe_ring_free(sc, sc->sc_status_ring);
sc 1152 dev/pci/if_nxe.c nxe_ring_free(sc, sc->sc_cmd_ring);
sc 1154 dev/pci/if_nxe.c nxe_dmamem_free(sc, sc->sc_ctx);
sc 1156 dev/pci/if_nxe.c nxe_pkt_free(sc, sc->sc_rx_pkts);
sc 1158 dev/pci/if_nxe.c nxe_pkt_free(sc, sc->sc_tx_pkts);
sc 1162 dev/pci/if_nxe.c nxe_up_fw(struct nxe_softc *sc)
sc 1166 dev/pci/if_nxe.c r = nxe_crb_read(sc, NXE_1_SW_CMDPEG_STATE);
sc 1173 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_NIC_CAP_HOST, NXE_1_SW_NIC_CAP_HOST_DEF);
sc 1174 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_MPORT_MODE, NXE_1_SW_MPORT_MODE_MULTI);
sc 1175 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_CMDPEG_STATE, NXE_1_SW_CMDPEG_STATE_ACK);
sc 1178 dev/pci/if_nxe.c if (!nxe_crb_wait(sc, NXE_1_SW_STATUS_STATE(sc->sc_function),
sc 1186 dev/pci/if_nxe.c nxe_lladdr(struct nxe_softc *sc)
sc 1188 dev/pci/if_nxe.c u_int8_t *lladdr = sc->sc_ac.ac_enaddr;
sc 1190 dev/pci/if_nxe.c DASSERT(sc->sc_window == 0);
sc 1192 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_0_XG_MAC_LO(sc->sc_port),
sc 1194 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_0_XG_MAC_HI(sc->sc_port),
sc 1200 dev/pci/if_nxe.c nxe_iff(struct nxe_softc *sc)
sc 1202 dev/pci/if_nxe.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 1205 dev/pci/if_nxe.c DASSERT(sc->sc_window == 0);
sc 1208 dev/pci/if_nxe.c if (sc->sc_ac.ac_multirangecnt > 0 || sc->sc_ac.ac_multicnt > 0) {
sc 1216 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_0_XG_CFG0(sc->sc_port),
sc 1218 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_0_XG_CFG1(sc->sc_port), cfg1);
sc 1222 dev/pci/if_nxe.c nxe_down(struct nxe_softc *sc)
sc 1224 dev/pci/if_nxe.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 1231 dev/pci/if_nxe.c bus_dmamap_sync(sc->sc_dmat, NXE_DMA_MAP(sc->sc_ctx),
sc 1232 dev/pci/if_nxe.c 0, NXE_DMA_LEN(sc->sc_ctx),
sc 1234 dev/pci/if_nxe.c nxe_ring_sync(sc, sc->sc_cmd_ring, BUS_DMASYNC_POSTWRITE);
sc 1235 dev/pci/if_nxe.c nxe_ring_sync(sc, sc->sc_status_ring, BUS_DMASYNC_POSTREAD);
sc 1238 dev/pci/if_nxe.c nxe_ring_sync(sc, sc->sc_rx_rings[i], BUS_DMASYNC_POSTWRITE);
sc 1239 dev/pci/if_nxe.c nxe_ring_free(sc, sc->sc_rx_rings[i]);
sc 1241 dev/pci/if_nxe.c nxe_ring_free(sc, sc->sc_status_ring);
sc 1242 dev/pci/if_nxe.c nxe_ring_free(sc, sc->sc_cmd_ring);
sc 1243 dev/pci/if_nxe.c nxe_dmamem_free(sc, sc->sc_ctx);
sc 1244 dev/pci/if_nxe.c nxe_pkt_free(sc, sc->sc_rx_pkts);
sc 1245 dev/pci/if_nxe.c nxe_pkt_free(sc, sc->sc_tx_pkts);
sc 1251 dev/pci/if_nxe.c struct nxe_softc *sc = ifp->if_softc;
sc 1252 dev/pci/if_nxe.c struct nxe_ring *nr = sc->sc_cmd_ring;
sc 1270 dev/pci/if_nxe.c nxe_ring_sync(sc, nr, BUS_DMASYNC_POSTWRITE);
sc 1271 dev/pci/if_nxe.c txd = nxe_ring_cur(sc, nr);
sc 1279 dev/pci/if_nxe.c pkt = nxe_pkt_get(sc->sc_tx_pkts);
sc 1288 dev/pci/if_nxe.c m = nxe_load_pkt(sc, dmap, m);
sc 1290 dev/pci/if_nxe.c nxe_pkt_put(sc->sc_tx_pkts, pkt);
sc 1306 dev/pci/if_nxe.c txd->tx_port = sc->sc_port;
sc 1328 dev/pci/if_nxe.c DEVNAME(sc));
sc 1334 dev/pci/if_nxe.c txd = nxe_ring_next(sc, nr);
sc 1338 dev/pci/if_nxe.c bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize,
sc 1344 dev/pci/if_nxe.c nxe_ring_sync(sc, nr, BUS_DMASYNC_PREWRITE);
sc 1345 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_CMD_PRODUCER(sc->sc_function), nr->nr_slot);
sc 1375 dev/pci/if_nxe.c nxe_load_pkt(struct nxe_softc *sc, bus_dmamap_t dmap, struct mbuf *m)
sc 1377 dev/pci/if_nxe.c switch (bus_dmamap_load_mbuf(sc->sc_dmat, dmap, m, BUS_DMA_NOWAIT)) {
sc 1386 dev/pci/if_nxe.c if (bus_dmamap_load_mbuf(sc->sc_dmat, dmap, m,
sc 1417 dev/pci/if_nxe.c struct nxe_softc *sc = ifp->if_softc;
sc 1422 dev/pci/if_nxe.c nxe_link_state(sc);
sc 1428 dev/pci/if_nxe.c nxe_link_state(struct nxe_softc *sc)
sc 1430 dev/pci/if_nxe.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 1434 dev/pci/if_nxe.c DASSERT(sc->sc_window == 1);
sc 1436 dev/pci/if_nxe.c r = nxe_crb_read(sc, NXE_1_SW_XG_STATE);
sc 1437 dev/pci/if_nxe.c if (NXE_1_SW_XG_STATE_PORT(r, sc->sc_function) & NXE_1_SW_XG_STATE_UP)
sc 1447 dev/pci/if_nxe.c nxe_board_info(struct nxe_softc *sc)
sc 1459 dev/pci/if_nxe.c if (nxe_rom_read_region(sc, NXE_FLASH_BRDCFG, ni,
sc 1477 dev/pci/if_nxe.c sc->sc_board = &nxe_boards[i];
sc 1481 dev/pci/if_nxe.c if (sc->sc_board == NULL) {
sc 1493 dev/pci/if_nxe.c nxe_user_info(struct nxe_softc *sc)
sc 1505 dev/pci/if_nxe.c if (nxe_rom_read_region(sc, NXE_FLASH_USER, nu,
sc 1511 dev/pci/if_nxe.c sc->sc_fw_major = nu->nu_imageinfo.nim_img_ver_major;
sc 1512 dev/pci/if_nxe.c sc->sc_fw_minor = nu->nu_imageinfo.nim_img_ver_minor;
sc 1513 dev/pci/if_nxe.c sc->sc_fw_build = letoh16(nu->nu_imageinfo.nim_img_ver_build);
sc 1515 dev/pci/if_nxe.c if (sc->sc_fw_major > NXE_VERSION_MAJOR ||
sc 1516 dev/pci/if_nxe.c sc->sc_fw_major < NXE_VERSION_MAJOR ||
sc 1517 dev/pci/if_nxe.c sc->sc_fw_minor > NXE_VERSION_MINOR ||
sc 1518 dev/pci/if_nxe.c sc->sc_fw_minor < NXE_VERSION_MINOR) {
sc 1520 dev/pci/if_nxe.c sc->sc_fw_major, sc->sc_fw_minor, sc->sc_fw_build);
sc 1524 dev/pci/if_nxe.c lladdr = swap64(nu->nu_lladdr[sc->sc_function][0]);
sc 1526 dev/pci/if_nxe.c bcopy(la->lladdr, sc->sc_ac.ac_enaddr, ETHER_ADDR_LEN);
sc 1535 dev/pci/if_nxe.c nxe_init(struct nxe_softc *sc)
sc 1541 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_CMD_PRODUCER(sc->sc_function), 0);
sc 1542 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_CMD_CONSUMER(sc->sc_function), 0);
sc 1543 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_CMD_ADDR_HI, 0);
sc 1544 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_CMD_ADDR_LO, 0);
sc 1550 dev/pci/if_nxe.c if (sc->sc_function == 0) {
sc 1552 dev/pci/if_nxe.c sc->sc_dummy_dma = nxe_dmamem_alloc(sc,
sc 1554 dev/pci/if_nxe.c if (sc->sc_dummy_dma == NULL) {
sc 1559 dev/pci/if_nxe.c bus_dmamap_sync(sc->sc_dmat, NXE_DMA_MAP(sc->sc_dummy_dma),
sc 1560 dev/pci/if_nxe.c 0, NXE_DMA_LEN(sc->sc_dummy_dma), BUS_DMASYNC_PREREAD);
sc 1562 dev/pci/if_nxe.c dva = NXE_DMA_DVA(sc->sc_dummy_dma);
sc 1563 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_DUMMY_ADDR_HI, dva >> 32);
sc 1564 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_DUMMY_ADDR_LO, dva);
sc 1566 dev/pci/if_nxe.c r = nxe_crb_read(sc, NXE_1_SW_BOOTLD_CONFIG);
sc 1568 dev/pci/if_nxe.c r = nxe_crb_read(sc, NXE_1_ROMUSB_SW_RESET);
sc 1575 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_BOOTLD_CONFIG, 0);
sc 1579 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_DRIVER_VER, NXE_VERSION);
sc 1580 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_GLB_PEGTUNE, NXE_1_GLB_PEGTUNE_DONE);
sc 1591 dev/pci/if_nxe.c bus_dmamap_sync(sc->sc_dmat, NXE_DMA_MAP(sc->sc_dummy_dma),
sc 1592 dev/pci/if_nxe.c 0, NXE_DMA_LEN(sc->sc_dummy_dma), BUS_DMASYNC_POSTREAD);
sc 1593 dev/pci/if_nxe.c nxe_dmamem_free(sc, sc->sc_dummy_dma);
sc 1598 dev/pci/if_nxe.c nxe_uninit(struct nxe_softc *sc)
sc 1600 dev/pci/if_nxe.c if (sc->sc_function == 0) {
sc 1601 dev/pci/if_nxe.c bus_dmamap_sync(sc->sc_dmat, NXE_DMA_MAP(sc->sc_dummy_dma),
sc 1602 dev/pci/if_nxe.c 0, NXE_DMA_LEN(sc->sc_dummy_dma), BUS_DMASYNC_POSTREAD);
sc 1603 dev/pci/if_nxe.c nxe_dmamem_free(sc, sc->sc_dummy_dma);
sc 1610 dev/pci/if_nxe.c struct nxe_softc *sc = arg;
sc 1612 dev/pci/if_nxe.c DASSERT(sc->sc_window == 1);
sc 1614 dev/pci/if_nxe.c if (!nxe_crb_wait(sc, NXE_1_SW_CMDPEG_STATE, 0xffffffff,
sc 1617 dev/pci/if_nxe.c DEVNAME(sc), nxe_crb_read(sc, NXE_1_SW_CMDPEG_STATE));
sc 1621 dev/pci/if_nxe.c sc->sc_port = nxe_crb_read(sc, NXE_1_SW_V2P(sc->sc_function));
sc 1622 dev/pci/if_nxe.c if (sc->sc_port == 0x55555555)
sc 1623 dev/pci/if_nxe.c sc->sc_port = sc->sc_function;
sc 1625 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_NIC_CAP_HOST, NXE_1_SW_NIC_CAP_HOST_DEF);
sc 1626 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_MPORT_MODE, NXE_1_SW_MPORT_MODE_MULTI);
sc 1627 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_CMDPEG_STATE, NXE_1_SW_CMDPEG_STATE_ACK);
sc 1629 dev/pci/if_nxe.c sc->sc_sensor.type = SENSOR_TEMP;
sc 1630 dev/pci/if_nxe.c strlcpy(sc->sc_sensor_dev.xname, DEVNAME(sc),
sc 1631 dev/pci/if_nxe.c sizeof(sc->sc_sensor_dev.xname));
sc 1632 dev/pci/if_nxe.c sensor_attach(&sc->sc_sensor_dev, &sc->sc_sensor);
sc 1633 dev/pci/if_nxe.c sensordev_install(&sc->sc_sensor_dev);
sc 1635 dev/pci/if_nxe.c timeout_set(&sc->sc_tick, nxe_tick, sc);
sc 1636 dev/pci/if_nxe.c nxe_tick(sc);
sc 1642 dev/pci/if_nxe.c struct nxe_softc *sc = xsc;
sc 1648 dev/pci/if_nxe.c window = nxe_crb_set(sc, 1);
sc 1649 dev/pci/if_nxe.c temp = nxe_crb_read(sc, NXE_1_SW_TEMP);
sc 1650 dev/pci/if_nxe.c nxe_link_state(sc);
sc 1651 dev/pci/if_nxe.c nxe_crb_set(sc, window);
sc 1654 dev/pci/if_nxe.c sc->sc_sensor.value = NXE_1_SW_TEMP_VAL(temp) * 1000000 + 273150000;
sc 1655 dev/pci/if_nxe.c sc->sc_sensor.flags = 0;
sc 1659 dev/pci/if_nxe.c sc->sc_sensor.status = SENSOR_S_UNSPEC;
sc 1662 dev/pci/if_nxe.c sc->sc_sensor.status = SENSOR_S_OK;
sc 1665 dev/pci/if_nxe.c sc->sc_sensor.status = SENSOR_S_WARN;
sc 1669 dev/pci/if_nxe.c sc->sc_sensor.status = SENSOR_S_CRIT;
sc 1672 dev/pci/if_nxe.c sc->sc_sensor.flags = SENSOR_FUNKNOWN;
sc 1676 dev/pci/if_nxe.c timeout_add(&sc->sc_tick, hz * 5);
sc 1681 dev/pci/if_nxe.c nxe_ring_alloc(struct nxe_softc *sc, size_t desclen, u_int nentries)
sc 1687 dev/pci/if_nxe.c nr->nr_dmamem = nxe_dmamem_alloc(sc, desclen * nentries, PAGE_SIZE);
sc 1702 dev/pci/if_nxe.c nxe_ring_sync(struct nxe_softc *sc, struct nxe_ring *nr, int flags)
sc 1704 dev/pci/if_nxe.c bus_dmamap_sync(sc->sc_dmat, NXE_DMA_MAP(nr->nr_dmamem),
sc 1709 dev/pci/if_nxe.c nxe_ring_free(struct nxe_softc *sc, struct nxe_ring *nr)
sc 1711 dev/pci/if_nxe.c nxe_dmamem_free(sc, nr->nr_dmamem);
sc 1736 dev/pci/if_nxe.c nxe_ring_cur(struct nxe_softc *sc, struct nxe_ring *nr)
sc 1742 dev/pci/if_nxe.c nxe_ring_next(struct nxe_softc *sc, struct nxe_ring *nr)
sc 1756 dev/pci/if_nxe.c nxe_pkt_alloc(struct nxe_softc *sc, u_int npkts, int nsegs)
sc 1775 dev/pci/if_nxe.c if (bus_dmamap_create(sc->sc_dmat, NXE_MAX_PKTLEN, nsegs,
sc 1778 dev/pci/if_nxe.c nxe_pkt_free(sc, npl);
sc 1789 dev/pci/if_nxe.c nxe_pkt_free(struct nxe_softc *sc, struct nxe_pkt_list *npl)
sc 1794 dev/pci/if_nxe.c bus_dmamap_destroy(sc->sc_dmat, pkt->pkt_dmap);
sc 1829 dev/pci/if_nxe.c nxe_dmamem_alloc(struct nxe_softc *sc, bus_size_t size, bus_size_t align)
sc 1838 dev/pci/if_nxe.c if (bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 1842 dev/pci/if_nxe.c if (bus_dmamem_alloc(sc->sc_dmat, size, align, 0, &ndm->ndm_seg, 1,
sc 1846 dev/pci/if_nxe.c if (bus_dmamem_map(sc->sc_dmat, &ndm->ndm_seg, nsegs, size,
sc 1850 dev/pci/if_nxe.c if (bus_dmamap_load(sc->sc_dmat, ndm->ndm_map, ndm->ndm_kva, size,
sc 1859 dev/pci/if_nxe.c bus_dmamem_unmap(sc->sc_dmat, ndm->ndm_kva, size);
sc 1861 dev/pci/if_nxe.c bus_dmamem_free(sc->sc_dmat, &ndm->ndm_seg, 1);
sc 1863 dev/pci/if_nxe.c bus_dmamap_destroy(sc->sc_dmat, ndm->ndm_map);
sc 1871 dev/pci/if_nxe.c nxe_dmamem_free(struct nxe_softc *sc, struct nxe_dmamem *ndm)
sc 1873 dev/pci/if_nxe.c bus_dmamem_unmap(sc->sc_dmat, ndm->ndm_kva, ndm->ndm_size);
sc 1874 dev/pci/if_nxe.c bus_dmamem_free(sc->sc_dmat, &ndm->ndm_seg, 1);
sc 1875 dev/pci/if_nxe.c bus_dmamap_destroy(sc->sc_dmat, ndm->ndm_map);
sc 1880 dev/pci/if_nxe.c nxe_read(struct nxe_softc *sc, bus_size_t r)
sc 1882 dev/pci/if_nxe.c bus_space_barrier(sc->sc_memt, sc->sc_memh, r, 4,
sc 1884 dev/pci/if_nxe.c return (bus_space_read_4(sc->sc_memt, sc->sc_memh, r));
sc 1888 dev/pci/if_nxe.c nxe_write(struct nxe_softc *sc, bus_size_t r, u_int32_t v)
sc 1890 dev/pci/if_nxe.c bus_space_write_4(sc->sc_memt, sc->sc_memh, r, v);
sc 1891 dev/pci/if_nxe.c bus_space_barrier(sc->sc_memt, sc->sc_memh, r, 4,
sc 1896 dev/pci/if_nxe.c nxe_wait(struct nxe_softc *sc, bus_size_t r, u_int32_t m, u_int32_t v,
sc 1899 dev/pci/if_nxe.c while ((nxe_read(sc, r) & m) != v) {
sc 1911 dev/pci/if_nxe.c nxe_crb_set(struct nxe_softc *sc, int window)
sc 1913 dev/pci/if_nxe.c int oldwindow = sc->sc_window;
sc 1915 dev/pci/if_nxe.c if (sc->sc_window != window) {
sc 1916 dev/pci/if_nxe.c sc->sc_window = window;
sc 1918 dev/pci/if_nxe.c nxe_write(sc, NXE_WIN_CRB(sc->sc_function),
sc 1926 dev/pci/if_nxe.c nxe_crb_read(struct nxe_softc *sc, bus_size_t r)
sc 1928 dev/pci/if_nxe.c bus_space_barrier(sc->sc_memt, sc->sc_crbh, r, 4,
sc 1930 dev/pci/if_nxe.c return (bus_space_read_4(sc->sc_memt, sc->sc_crbh, r));
sc 1934 dev/pci/if_nxe.c nxe_crb_write(struct nxe_softc *sc, bus_size_t r, u_int32_t v)
sc 1936 dev/pci/if_nxe.c bus_space_write_4(sc->sc_memt, sc->sc_crbh, r, v);
sc 1937 dev/pci/if_nxe.c bus_space_barrier(sc->sc_memt, sc->sc_crbh, r, 4,
sc 1942 dev/pci/if_nxe.c nxe_crb_wait(struct nxe_softc *sc, bus_size_t r, u_int32_t m, u_int32_t v,
sc 1945 dev/pci/if_nxe.c while ((nxe_crb_read(sc, r) & m) != v) {
sc 1957 dev/pci/if_nxe.c nxe_rom_lock(struct nxe_softc *sc)
sc 1959 dev/pci/if_nxe.c if (!nxe_wait(sc, NXE_SEM_ROM_LOCK, 0xffffffff,
sc 1962 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_SW_ROM_LOCK_ID, NXE_1_SW_ROM_LOCK_ID);
sc 1968 dev/pci/if_nxe.c nxe_rom_unlock(struct nxe_softc *sc)
sc 1970 dev/pci/if_nxe.c nxe_read(sc, NXE_SEM_ROM_UNLOCK);
sc 1974 dev/pci/if_nxe.c nxe_rom_read(struct nxe_softc *sc, u_int32_t r, u_int32_t *v)
sc 1978 dev/pci/if_nxe.c DASSERT(sc->sc_window == 1);
sc 1980 dev/pci/if_nxe.c if (nxe_rom_lock(sc) != 0)
sc 1984 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_ROM_ADDR, r);
sc 1987 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_ROM_ABYTE_CNT, 3);
sc 1989 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_ROM_DBYTE_CNT, 0);
sc 1992 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_ROM_OPCODE, NXE_1_ROM_OPCODE_READ);
sc 1993 dev/pci/if_nxe.c if (!nxe_crb_wait(sc, NXE_1_ROMUSB_STATUS, NXE_1_ROMUSB_STATUS_DONE,
sc 1998 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_ROM_ABYTE_CNT, 0);
sc 2000 dev/pci/if_nxe.c nxe_crb_write(sc, NXE_1_ROM_DBYTE_CNT, 0);
sc 2002 dev/pci/if_nxe.c *v = nxe_crb_read(sc, NXE_1_ROM_RDATA);
sc 2006 dev/pci/if_nxe.c nxe_rom_unlock(sc);
sc 2011 dev/pci/if_nxe.c nxe_rom_read_region(struct nxe_softc *sc, u_int32_t r, void *buf,
sc 2024 dev/pci/if_nxe.c if (nxe_rom_read(sc, r, &databuf[i]) != 0)
sc 343 dev/pci/if_pcn.c #define PCN_CDTXADDR(sc, x) ((sc)->sc_cddma + PCN_CDTXOFF((x)))
sc 344 dev/pci/if_pcn.c #define PCN_CDRXADDR(sc, x) ((sc)->sc_cddma + PCN_CDRXOFF((x)))
sc 345 dev/pci/if_pcn.c #define PCN_CDINITADDR(sc) ((sc)->sc_cddma + PCN_CDINITOFF)
sc 347 dev/pci/if_pcn.c #define PCN_CDTXSYNC(sc, x, n, ops) \
sc 356 dev/pci/if_pcn.c bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 364 dev/pci/if_pcn.c bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 368 dev/pci/if_pcn.c #define PCN_CDRXSYNC(sc, x, ops) \
sc 369 dev/pci/if_pcn.c bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 372 dev/pci/if_pcn.c #define PCN_CDINITSYNC(sc, ops) \
sc 373 dev/pci/if_pcn.c bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 376 dev/pci/if_pcn.c #define PCN_INIT_RXDESC(sc, x) \
sc 378 dev/pci/if_pcn.c struct pcn_rxsoft *__rxs = &(sc)->sc_rxsoft[(x)]; \
sc 379 dev/pci/if_pcn.c struct lermd *__rmd = &(sc)->sc_rxdescs[(x)]; \
sc 389 dev/pci/if_pcn.c if ((sc)->sc_swstyle == LE_B20_SSTYLE_PCNETPCI3) { \
sc 400 dev/pci/if_pcn.c PCN_CDRXSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);\
sc 505 dev/pci/if_pcn.c pcn_csr_read(struct pcn_softc *sc, int reg)
sc 508 dev/pci/if_pcn.c bus_space_write_4(sc->sc_st, sc->sc_sh, PCN32_RAP, reg);
sc 509 dev/pci/if_pcn.c return (bus_space_read_4(sc->sc_st, sc->sc_sh, PCN32_RDP));
sc 513 dev/pci/if_pcn.c pcn_csr_write(struct pcn_softc *sc, int reg, uint32_t val)
sc 516 dev/pci/if_pcn.c bus_space_write_4(sc->sc_st, sc->sc_sh, PCN32_RAP, reg);
sc 517 dev/pci/if_pcn.c bus_space_write_4(sc->sc_st, sc->sc_sh, PCN32_RDP, val);
sc 521 dev/pci/if_pcn.c pcn_bcr_read(struct pcn_softc *sc, int reg)
sc 524 dev/pci/if_pcn.c bus_space_write_4(sc->sc_st, sc->sc_sh, PCN32_RAP, reg);
sc 525 dev/pci/if_pcn.c return (bus_space_read_4(sc->sc_st, sc->sc_sh, PCN32_BDP));
sc 529 dev/pci/if_pcn.c pcn_bcr_write(struct pcn_softc *sc, int reg, uint32_t val)
sc 532 dev/pci/if_pcn.c bus_space_write_4(sc->sc_st, sc->sc_sh, PCN32_RAP, reg);
sc 533 dev/pci/if_pcn.c bus_space_write_4(sc->sc_st, sc->sc_sh, PCN32_BDP, val);
sc 576 dev/pci/if_pcn.c struct pcn_softc *sc = (struct pcn_softc *) self;
sc 578 dev/pci/if_pcn.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 592 dev/pci/if_pcn.c timeout_set(&sc->sc_tick_timeout, pcn_tick, sc);
sc 604 dev/pci/if_pcn.c sc->sc_st = memt;
sc 605 dev/pci/if_pcn.c sc->sc_sh = memh;
sc 607 dev/pci/if_pcn.c sc->sc_st = iot;
sc 608 dev/pci/if_pcn.c sc->sc_sh = ioh;
sc 614 dev/pci/if_pcn.c sc->sc_dmat = pa->pa_dmat;
sc 640 dev/pci/if_pcn.c pcn_reset(sc);
sc 648 dev/pci/if_pcn.c enaddr[i] = bus_space_read_1(sc->sc_st, sc->sc_sh,
sc 659 dev/pci/if_pcn.c val = pcn_csr_read(sc, LE_CSR12 + i);
sc 670 dev/pci/if_pcn.c chipid = pcn_csr_read(sc, LE_CSR88);
sc 671 dev/pci/if_pcn.c sc->sc_variant = pcn_lookup_variant(CHIPID_PARTID(chipid));
sc 681 dev/pci/if_pcn.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, pcn_intr, sc,
sc 683 dev/pci/if_pcn.c if (sc->sc_ih == NULL) {
sc 695 dev/pci/if_pcn.c if ((error = bus_dmamem_alloc(sc->sc_dmat,
sc 703 dev/pci/if_pcn.c if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
sc 704 dev/pci/if_pcn.c sizeof(struct pcn_control_data), (caddr_t *)&sc->sc_control_data,
sc 711 dev/pci/if_pcn.c if ((error = bus_dmamap_create(sc->sc_dmat,
sc 713 dev/pci/if_pcn.c sizeof(struct pcn_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
sc 719 dev/pci/if_pcn.c if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
sc 720 dev/pci/if_pcn.c sc->sc_control_data, sizeof(struct pcn_control_data), NULL,
sc 729 dev/pci/if_pcn.c if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 731 dev/pci/if_pcn.c &sc->sc_txsoft[i].txs_dmamap)) != 0) {
sc 740 dev/pci/if_pcn.c if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 741 dev/pci/if_pcn.c MCLBYTES, 0, 0, &sc->sc_rxsoft[i].rxs_dmamap)) != 0) {
sc 746 dev/pci/if_pcn.c sc->sc_rxsoft[i].rxs_mbuf = NULL;
sc 749 dev/pci/if_pcn.c printf(", %s, rev %d: %s, address %s\n", sc->sc_variant->pcv_desc,
sc 753 dev/pci/if_pcn.c (*sc->sc_variant->pcv_mediainit)(sc);
sc 758 dev/pci/if_pcn.c switch (sc->sc_variant->pcv_chipid) {
sc 761 dev/pci/if_pcn.c sc->sc_rcvfw_desc = pcn_79c970_rcvfw;
sc 762 dev/pci/if_pcn.c sc->sc_xmtsp_desc = pcn_79c970_xmtsp;
sc 763 dev/pci/if_pcn.c sc->sc_xmtfw_desc = pcn_79c970_xmtfw;
sc 767 dev/pci/if_pcn.c sc->sc_rcvfw_desc = pcn_79c971_rcvfw;
sc 778 dev/pci/if_pcn.c reg = pcn_bcr_read(sc, LE_BCR25) & 0x00ff;
sc 780 dev/pci/if_pcn.c sc->sc_xmtsp_desc = pcn_79c971_xmtsp_sram;
sc 782 dev/pci/if_pcn.c sc->sc_xmtsp_desc = pcn_79c971_xmtsp;
sc 783 dev/pci/if_pcn.c sc->sc_xmtfw_desc = pcn_79c971_xmtfw;
sc 793 dev/pci/if_pcn.c sc->sc_rcvfw = 1; /* minimum for full-duplex */
sc 794 dev/pci/if_pcn.c sc->sc_xmtsp = 1;
sc 795 dev/pci/if_pcn.c sc->sc_xmtfw = 0;
sc 797 dev/pci/if_pcn.c ifp = &sc->sc_arpcom.ac_if;
sc 798 dev/pci/if_pcn.c bcopy(enaddr, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 799 dev/pci/if_pcn.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 800 dev/pci/if_pcn.c ifp->if_softc = sc;
sc 813 dev/pci/if_pcn.c sc->sc_sdhook = shutdownhook_establish(pcn_shutdown, sc);
sc 814 dev/pci/if_pcn.c if (sc->sc_sdhook == NULL)
sc 816 dev/pci/if_pcn.c sc->sc_dev.dv_xname);
sc 825 dev/pci/if_pcn.c if (sc->sc_rxsoft[i].rxs_dmamap != NULL)
sc 826 dev/pci/if_pcn.c bus_dmamap_destroy(sc->sc_dmat,
sc 827 dev/pci/if_pcn.c sc->sc_rxsoft[i].rxs_dmamap);
sc 831 dev/pci/if_pcn.c if (sc->sc_txsoft[i].txs_dmamap != NULL)
sc 832 dev/pci/if_pcn.c bus_dmamap_destroy(sc->sc_dmat,
sc 833 dev/pci/if_pcn.c sc->sc_txsoft[i].txs_dmamap);
sc 835 dev/pci/if_pcn.c bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
sc 837 dev/pci/if_pcn.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
sc 839 dev/pci/if_pcn.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
sc 842 dev/pci/if_pcn.c bus_dmamem_free(sc->sc_dmat, &seg, rseg);
sc 853 dev/pci/if_pcn.c struct pcn_softc *sc = arg;
sc 855 dev/pci/if_pcn.c pcn_stop(&sc->sc_arpcom.ac_if, 1);
sc 856 dev/pci/if_pcn.c pcn_reset(sc);
sc 867 dev/pci/if_pcn.c struct pcn_softc *sc = ifp->if_softc;
sc 880 dev/pci/if_pcn.c ofree = sc->sc_txfree;
sc 895 dev/pci/if_pcn.c if (sc->sc_txsfree == 0)
sc 898 dev/pci/if_pcn.c txs = &sc->sc_txsoft[sc->sc_txsnext];
sc 907 dev/pci/if_pcn.c if (bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
sc 921 dev/pci/if_pcn.c error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
sc 933 dev/pci/if_pcn.c if (dmamap->dm_nsegs > (sc->sc_txfree - 1)) {
sc 945 dev/pci/if_pcn.c bus_dmamap_unload(sc->sc_dmat, dmamap);
sc 962 dev/pci/if_pcn.c bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
sc 968 dev/pci/if_pcn.c if (sc->sc_swstyle == LE_B20_SSTYLE_PCNETPCI3) {
sc 969 dev/pci/if_pcn.c for (nexttx = sc->sc_txnext, seg = 0;
sc 978 dev/pci/if_pcn.c sc->sc_txdescs[nexttx].tmd0 = 0;
sc 979 dev/pci/if_pcn.c sc->sc_txdescs[nexttx].tmd2 =
sc 981 dev/pci/if_pcn.c sc->sc_txdescs[nexttx].tmd1 =
sc 983 dev/pci/if_pcn.c (nexttx == sc->sc_txnext ? 0 : LE_T1_OWN) |
sc 989 dev/pci/if_pcn.c for (nexttx = sc->sc_txnext, seg = 0;
sc 998 dev/pci/if_pcn.c sc->sc_txdescs[nexttx].tmd0 =
sc 1000 dev/pci/if_pcn.c sc->sc_txdescs[nexttx].tmd2 = 0;
sc 1001 dev/pci/if_pcn.c sc->sc_txdescs[nexttx].tmd1 =
sc 1003 dev/pci/if_pcn.c (nexttx == sc->sc_txnext ? 0 : LE_T1_OWN) |
sc 1012 dev/pci/if_pcn.c if ((sc->sc_txsnext & PCN_TXINTR_MASK) == 0)
sc 1013 dev/pci/if_pcn.c sc->sc_txdescs[lasttx].tmd1 |= htole32(LE_T1_LTINT);
sc 1016 dev/pci/if_pcn.c sc->sc_txdescs[lasttx].tmd1 |= htole32(LE_T1_ENP);
sc 1017 dev/pci/if_pcn.c sc->sc_txdescs[sc->sc_txnext].tmd1 |=
sc 1021 dev/pci/if_pcn.c PCN_CDTXSYNC(sc, sc->sc_txnext, dmamap->dm_nsegs,
sc 1025 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR0, LE_C0_INEA|LE_C0_TDMD);
sc 1033 dev/pci/if_pcn.c txs->txs_firstdesc = sc->sc_txnext;
sc 1037 dev/pci/if_pcn.c sc->sc_txfree -= dmamap->dm_nsegs;
sc 1038 dev/pci/if_pcn.c sc->sc_txnext = nexttx;
sc 1040 dev/pci/if_pcn.c sc->sc_txsfree--;
sc 1041 dev/pci/if_pcn.c sc->sc_txsnext = PCN_NEXTTXS(sc->sc_txsnext);
sc 1050 dev/pci/if_pcn.c if (sc->sc_txsfree == 0 || sc->sc_txfree == 0) {
sc 1055 dev/pci/if_pcn.c if (sc->sc_txfree != ofree) {
sc 1069 dev/pci/if_pcn.c struct pcn_softc *sc = ifp->if_softc;
sc 1075 dev/pci/if_pcn.c pcn_txintr(sc);
sc 1077 dev/pci/if_pcn.c if (sc->sc_txfree != PCN_NTXDESC) {
sc 1079 dev/pci/if_pcn.c sc->sc_dev.dv_xname, sc->sc_txfree, sc->sc_txsfree);
sc 1098 dev/pci/if_pcn.c struct pcn_softc *sc = ifp->if_softc;
sc 1105 dev/pci/if_pcn.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 1121 dev/pci/if_pcn.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 1153 dev/pci/if_pcn.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 1154 dev/pci/if_pcn.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 1170 dev/pci/if_pcn.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
sc 1192 dev/pci/if_pcn.c struct pcn_softc *sc = arg;
sc 1193 dev/pci/if_pcn.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1198 dev/pci/if_pcn.c csr0 = pcn_csr_read(sc, LE_CSR0);
sc 1203 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR0, csr0 &
sc 1210 dev/pci/if_pcn.c wantinit = pcn_rxintr(sc);
sc 1213 dev/pci/if_pcn.c pcn_txintr(sc);
sc 1222 dev/pci/if_pcn.c sc->sc_dev.dv_xname);
sc 1230 dev/pci/if_pcn.c sc->sc_dev.dv_xname);
sc 1237 dev/pci/if_pcn.c sc->sc_dev.dv_xname);
sc 1260 dev/pci/if_pcn.c pcn_spnd(struct pcn_softc *sc)
sc 1264 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR5, sc->sc_csr5 | LE_C5_SPND);
sc 1267 dev/pci/if_pcn.c if (pcn_csr_read(sc, LE_CSR5) & LE_C5_SPND)
sc 1273 dev/pci/if_pcn.c sc->sc_dev.dv_xname);
sc 1282 dev/pci/if_pcn.c pcn_txintr(struct pcn_softc *sc)
sc 1284 dev/pci/if_pcn.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1295 dev/pci/if_pcn.c for (i = sc->sc_txsdirty; sc->sc_txsfree != PCN_TXQUEUELEN;
sc 1296 dev/pci/if_pcn.c i = PCN_NEXTTXS(i), sc->sc_txsfree++) {
sc 1297 dev/pci/if_pcn.c txs = &sc->sc_txsoft[i];
sc 1299 dev/pci/if_pcn.c PCN_CDTXSYNC(sc, txs->txs_firstdesc, txs->txs_dmamap->dm_nsegs,
sc 1302 dev/pci/if_pcn.c tmd1 = letoh32(sc->sc_txdescs[txs->txs_lastdesc].tmd1);
sc 1312 dev/pci/if_pcn.c tmd = letoh32(sc->sc_txdescs[j].tmd1);
sc 1315 dev/pci/if_pcn.c if (sc->sc_swstyle == LE_B20_SSTYLE_PCNETPCI3)
sc 1316 dev/pci/if_pcn.c tmd2 = letoh32(sc->sc_txdescs[j].tmd0);
sc 1318 dev/pci/if_pcn.c tmd2 = letoh32(sc->sc_txdescs[j].tmd2);
sc 1320 dev/pci/if_pcn.c if (sc->sc_xmtsp < LE_C80_XMTSP_MAX) {
sc 1321 dev/pci/if_pcn.c sc->sc_xmtsp++;
sc 1325 dev/pci/if_pcn.c sc->sc_dev.dv_xname,
sc 1326 dev/pci/if_pcn.c sc->sc_xmtsp_desc[
sc 1327 dev/pci/if_pcn.c sc->sc_xmtsp]);
sc 1328 dev/pci/if_pcn.c pcn_spnd(sc);
sc 1329 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR80,
sc 1330 dev/pci/if_pcn.c LE_C80_RCVFW(sc->sc_rcvfw) |
sc 1331 dev/pci/if_pcn.c LE_C80_XMTSP(sc->sc_xmtsp) |
sc 1332 dev/pci/if_pcn.c LE_C80_XMTFW(sc->sc_xmtfw));
sc 1333 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR5,
sc 1334 dev/pci/if_pcn.c sc->sc_csr5);
sc 1338 dev/pci/if_pcn.c sc->sc_dev.dv_xname);
sc 1342 dev/pci/if_pcn.c sc->sc_dev.dv_xname);
sc 1361 dev/pci/if_pcn.c sc->sc_txfree += txs->txs_dmamap->dm_nsegs;
sc 1362 dev/pci/if_pcn.c bus_dmamap_sync(sc->sc_dmat, txs->txs_dmamap,
sc 1364 dev/pci/if_pcn.c bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
sc 1370 dev/pci/if_pcn.c sc->sc_txsdirty = i;
sc 1376 dev/pci/if_pcn.c if (sc->sc_txsfree == PCN_TXQUEUELEN)
sc 1386 dev/pci/if_pcn.c pcn_rxintr(struct pcn_softc *sc)
sc 1388 dev/pci/if_pcn.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1394 dev/pci/if_pcn.c for (i = sc->sc_rxptr;; i = PCN_NEXTRX(i)) {
sc 1395 dev/pci/if_pcn.c rxs = &sc->sc_rxsoft[i];
sc 1397 dev/pci/if_pcn.c PCN_CDRXSYNC(sc, i, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
sc 1399 dev/pci/if_pcn.c rmd1 = letoh32(sc->sc_rxdescs[i].rmd1);
sc 1416 dev/pci/if_pcn.c sc->sc_dev.dv_xname);
sc 1434 dev/pci/if_pcn.c sc->sc_dev.dv_xname);
sc 1439 dev/pci/if_pcn.c sc->sc_dev.dv_xname, str);
sc 1445 dev/pci/if_pcn.c PCN_INIT_RXDESC(sc, i);
sc 1450 dev/pci/if_pcn.c bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
sc 1456 dev/pci/if_pcn.c if (sc->sc_swstyle == LE_B20_SSTYLE_PCNETPCI3)
sc 1457 dev/pci/if_pcn.c len = letoh32(sc->sc_rxdescs[i].rmd0) & LE_R1_BCNT_MASK;
sc 1459 dev/pci/if_pcn.c len = letoh32(sc->sc_rxdescs[i].rmd2) & LE_R1_BCNT_MASK;
sc 1485 dev/pci/if_pcn.c PCN_INIT_RXDESC(sc, i);
sc 1486 dev/pci/if_pcn.c bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
sc 1491 dev/pci/if_pcn.c if (pcn_add_rxbuf(sc, i) != 0) {
sc 1494 dev/pci/if_pcn.c PCN_INIT_RXDESC(sc, i);
sc 1495 dev/pci/if_pcn.c bus_dmamap_sync(sc->sc_dmat,
sc 1518 dev/pci/if_pcn.c sc->sc_rxptr = i;
sc 1530 dev/pci/if_pcn.c struct pcn_softc *sc = arg;
sc 1534 dev/pci/if_pcn.c mii_tick(&sc->sc_mii);
sc 1537 dev/pci/if_pcn.c timeout_add(&sc->sc_tick_timeout, hz);
sc 1546 dev/pci/if_pcn.c pcn_reset(struct pcn_softc *sc)
sc 1559 dev/pci/if_pcn.c (void) bus_space_read_2(sc->sc_st, sc->sc_sh, PCN16_RESET);
sc 1560 dev/pci/if_pcn.c (void) bus_space_read_4(sc->sc_st, sc->sc_sh, PCN32_RESET);
sc 1570 dev/pci/if_pcn.c bus_space_write_4(sc->sc_st, sc->sc_sh, PCN32_RDP, 0);
sc 1581 dev/pci/if_pcn.c struct pcn_softc *sc = ifp->if_softc;
sc 1591 dev/pci/if_pcn.c pcn_reset(sc);
sc 1602 dev/pci/if_pcn.c if (sc->sc_variant->pcv_chipid == PARTID_Am79c970)
sc 1603 dev/pci/if_pcn.c sc->sc_swstyle = LE_B20_SSTYLE_PCNETPCI2;
sc 1605 dev/pci/if_pcn.c sc->sc_swstyle = LE_B20_SSTYLE_PCNETPCI3;
sc 1606 dev/pci/if_pcn.c pcn_bcr_write(sc, LE_BCR20, sc->sc_swstyle);
sc 1609 dev/pci/if_pcn.c memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs));
sc 1610 dev/pci/if_pcn.c PCN_CDTXSYNC(sc, 0, PCN_NTXDESC,
sc 1612 dev/pci/if_pcn.c sc->sc_txfree = PCN_NTXDESC;
sc 1613 dev/pci/if_pcn.c sc->sc_txnext = 0;
sc 1617 dev/pci/if_pcn.c sc->sc_txsoft[i].txs_mbuf = NULL;
sc 1618 dev/pci/if_pcn.c sc->sc_txsfree = PCN_TXQUEUELEN;
sc 1619 dev/pci/if_pcn.c sc->sc_txsnext = 0;
sc 1620 dev/pci/if_pcn.c sc->sc_txsdirty = 0;
sc 1627 dev/pci/if_pcn.c rxs = &sc->sc_rxsoft[i];
sc 1629 dev/pci/if_pcn.c if ((error = pcn_add_rxbuf(sc, i)) != 0) {
sc 1632 dev/pci/if_pcn.c sc->sc_dev.dv_xname, i, error);
sc 1637 dev/pci/if_pcn.c pcn_rxdrain(sc);
sc 1641 dev/pci/if_pcn.c PCN_INIT_RXDESC(sc, i);
sc 1643 dev/pci/if_pcn.c sc->sc_rxptr = 0;
sc 1646 dev/pci/if_pcn.c sc->sc_mode = 0;
sc 1648 dev/pci/if_pcn.c sc->sc_mode |= LE_C15_PROM;
sc 1650 dev/pci/if_pcn.c sc->sc_mode |= LE_C15_DRCVBC;
sc 1657 dev/pci/if_pcn.c if (sc->sc_flags & PCN_F_HAS_MII) {
sc 1658 dev/pci/if_pcn.c pcn_bcr_write(sc, LE_BCR2,
sc 1659 dev/pci/if_pcn.c pcn_bcr_read(sc, LE_BCR2) & ~LE_B2_ASEL);
sc 1660 dev/pci/if_pcn.c sc->sc_mode |= LE_C15_PORTSEL(PORTSEL_MII);
sc 1666 dev/pci/if_pcn.c pcn_bcr_write(sc, LE_BCR32,
sc 1667 dev/pci/if_pcn.c pcn_bcr_read(sc, LE_BCR32) | LE_B32_DANAS);
sc 1675 dev/pci/if_pcn.c sc->sc_initblock.init_rdra = htole32(PCN_CDRXADDR(sc, 0));
sc 1676 dev/pci/if_pcn.c sc->sc_initblock.init_tdra = htole32(PCN_CDTXADDR(sc, 0));
sc 1677 dev/pci/if_pcn.c sc->sc_initblock.init_mode = htole32(sc->sc_mode |
sc 1682 dev/pci/if_pcn.c sc->sc_initblock.init_padr[0] = htole32(enaddr[0] |
sc 1684 dev/pci/if_pcn.c sc->sc_initblock.init_padr[1] = htole32(enaddr[4] |
sc 1688 dev/pci/if_pcn.c pcn_set_filter(sc);
sc 1691 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR3, LE_C3_MISSM|LE_C3_IDONM|LE_C3_DXSUFLO);
sc 1694 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR4, LE_C4_DMAPLUS|LE_C4_APAD_XMT|
sc 1698 dev/pci/if_pcn.c sc->sc_csr5 = LE_C5_LTINTEN|LE_C5_SINTE;
sc 1699 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR5, sc->sc_csr5);
sc 1706 dev/pci/if_pcn.c switch (sc->sc_variant->pcv_chipid) {
sc 1713 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR7, LE_C7_FASTSPNDE);
sc 1728 dev/pci/if_pcn.c reg = pcn_bcr_read(sc, LE_BCR18);
sc 1729 dev/pci/if_pcn.c switch (sc->sc_variant->pcv_chipid) {
sc 1741 dev/pci/if_pcn.c pcn_bcr_write(sc, LE_BCR18, reg);
sc 1746 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR80, LE_C80_RCVFW(sc->sc_rcvfw) |
sc 1747 dev/pci/if_pcn.c LE_C80_XMTSP(sc->sc_xmtsp) | LE_C80_XMTFW(sc->sc_xmtfw));
sc 1753 dev/pci/if_pcn.c PCN_CDINITSYNC(sc, BUS_DMASYNC_PREWRITE);
sc 1754 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR1, PCN_CDINITADDR(sc) & 0xffff);
sc 1755 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR2, (PCN_CDINITADDR(sc) >> 16) & 0xffff);
sc 1756 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR0, LE_C0_INIT);
sc 1759 dev/pci/if_pcn.c if (pcn_csr_read(sc, LE_CSR0) & LE_C0_IDON)
sc 1763 dev/pci/if_pcn.c PCN_CDINITSYNC(sc, BUS_DMASYNC_POSTWRITE);
sc 1766 dev/pci/if_pcn.c sc->sc_dev.dv_xname);
sc 1772 dev/pci/if_pcn.c (void) (*sc->sc_mii.mii_media.ifm_change)(ifp);
sc 1775 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR0, LE_C0_INEA|LE_C0_STRT|LE_C0_IDON);
sc 1777 dev/pci/if_pcn.c if (sc->sc_flags & PCN_F_HAS_MII) {
sc 1779 dev/pci/if_pcn.c timeout_add(&sc->sc_tick_timeout, hz);
sc 1788 dev/pci/if_pcn.c printf("%s: interface not running\n", sc->sc_dev.dv_xname);
sc 1798 dev/pci/if_pcn.c pcn_rxdrain(struct pcn_softc *sc)
sc 1804 dev/pci/if_pcn.c rxs = &sc->sc_rxsoft[i];
sc 1806 dev/pci/if_pcn.c bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
sc 1821 dev/pci/if_pcn.c struct pcn_softc *sc = ifp->if_softc;
sc 1825 dev/pci/if_pcn.c if (sc->sc_flags & PCN_F_HAS_MII) {
sc 1827 dev/pci/if_pcn.c timeout_del(&sc->sc_tick_timeout);
sc 1830 dev/pci/if_pcn.c mii_down(&sc->sc_mii);
sc 1838 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR0, LE_C0_STOP);
sc 1842 dev/pci/if_pcn.c txs = &sc->sc_txsoft[i];
sc 1844 dev/pci/if_pcn.c bus_dmamap_unload(sc->sc_dmat, txs->txs_dmamap);
sc 1851 dev/pci/if_pcn.c pcn_rxdrain(sc);
sc 1860 dev/pci/if_pcn.c pcn_add_rxbuf(struct pcn_softc *sc, int idx)
sc 1862 dev/pci/if_pcn.c struct pcn_rxsoft *rxs = &sc->sc_rxsoft[idx];
sc 1877 dev/pci/if_pcn.c bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
sc 1881 dev/pci/if_pcn.c error = bus_dmamap_load(sc->sc_dmat, rxs->rxs_dmamap,
sc 1886 dev/pci/if_pcn.c sc->sc_dev.dv_xname, idx, error);
sc 1890 dev/pci/if_pcn.c bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
sc 1893 dev/pci/if_pcn.c PCN_INIT_RXDESC(sc, idx);
sc 1904 dev/pci/if_pcn.c pcn_set_filter(struct pcn_softc *sc)
sc 1906 dev/pci/if_pcn.c struct arpcom *ac = &sc->sc_arpcom;
sc 1907 dev/pci/if_pcn.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1923 dev/pci/if_pcn.c sc->sc_initblock.init_ladrf[0] =
sc 1924 dev/pci/if_pcn.c sc->sc_initblock.init_ladrf[1] =
sc 1925 dev/pci/if_pcn.c sc->sc_initblock.init_ladrf[2] =
sc 1926 dev/pci/if_pcn.c sc->sc_initblock.init_ladrf[3] = 0;
sc 1948 dev/pci/if_pcn.c sc->sc_initblock.init_ladrf[crc >> 4] |=
sc 1959 dev/pci/if_pcn.c sc->sc_initblock.init_ladrf[0] =
sc 1960 dev/pci/if_pcn.c sc->sc_initblock.init_ladrf[1] =
sc 1961 dev/pci/if_pcn.c sc->sc_initblock.init_ladrf[2] =
sc 1962 dev/pci/if_pcn.c sc->sc_initblock.init_ladrf[3] = 0xffff;
sc 1971 dev/pci/if_pcn.c pcn_79c970_mediainit(struct pcn_softc *sc)
sc 1973 dev/pci/if_pcn.c ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, pcn_79c970_mediachange,
sc 1976 dev/pci/if_pcn.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5,
sc 1978 dev/pci/if_pcn.c if (sc->sc_variant->pcv_chipid == PARTID_Am79c970A)
sc 1979 dev/pci/if_pcn.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_5|IFM_FDX,
sc 1982 dev/pci/if_pcn.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T,
sc 1984 dev/pci/if_pcn.c if (sc->sc_variant->pcv_chipid == PARTID_Am79c970A)
sc 1985 dev/pci/if_pcn.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T|IFM_FDX,
sc 1988 dev/pci/if_pcn.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO,
sc 1990 dev/pci/if_pcn.c if (sc->sc_variant->pcv_chipid == PARTID_Am79c970A)
sc 1991 dev/pci/if_pcn.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO|IFM_FDX,
sc 1994 dev/pci/if_pcn.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 2005 dev/pci/if_pcn.c struct pcn_softc *sc = ifp->if_softc;
sc 2012 dev/pci/if_pcn.c ifmr->ifm_active = sc->sc_mii.mii_media.ifm_media;
sc 2023 dev/pci/if_pcn.c struct pcn_softc *sc = ifp->if_softc;
sc 2026 dev/pci/if_pcn.c if (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_media) == IFM_AUTO) {
sc 2030 dev/pci/if_pcn.c reg = pcn_bcr_read(sc, LE_BCR2);
sc 2032 dev/pci/if_pcn.c pcn_bcr_write(sc, LE_BCR2, reg);
sc 2037 dev/pci/if_pcn.c reg = pcn_bcr_read(sc, LE_BCR2);
sc 2039 dev/pci/if_pcn.c pcn_bcr_write(sc, LE_BCR2, reg);
sc 2041 dev/pci/if_pcn.c reg = pcn_csr_read(sc, LE_CSR15);
sc 2043 dev/pci/if_pcn.c LE_C15_PORTSEL(sc->sc_mii.mii_media.ifm_cur->ifm_data);
sc 2044 dev/pci/if_pcn.c pcn_csr_write(sc, LE_CSR15, reg);
sc 2047 dev/pci/if_pcn.c if ((sc->sc_mii.mii_media.ifm_media & IFM_FDX) != 0) {
sc 2049 dev/pci/if_pcn.c if (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_media) == IFM_10_5)
sc 2051 dev/pci/if_pcn.c pcn_bcr_write(sc, LE_BCR9, reg);
sc 2053 dev/pci/if_pcn.c pcn_bcr_write(sc, LE_BCR9, 0);
sc 2064 dev/pci/if_pcn.c pcn_79c971_mediainit(struct pcn_softc *sc)
sc 2066 dev/pci/if_pcn.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 2069 dev/pci/if_pcn.c sc->sc_flags |= PCN_F_HAS_MII;
sc 2083 dev/pci/if_pcn.c sc->sc_mii.mii_ifp = ifp;
sc 2084 dev/pci/if_pcn.c sc->sc_mii.mii_readreg = pcn_mii_readreg;
sc 2085 dev/pci/if_pcn.c sc->sc_mii.mii_writereg = pcn_mii_writereg;
sc 2086 dev/pci/if_pcn.c sc->sc_mii.mii_statchg = pcn_mii_statchg;
sc 2087 dev/pci/if_pcn.c ifmedia_init(&sc->sc_mii.mii_media, 0, pcn_79c971_mediachange,
sc 2090 dev/pci/if_pcn.c mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
sc 2092 dev/pci/if_pcn.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 2093 dev/pci/if_pcn.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
sc 2094 dev/pci/if_pcn.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
sc 2096 dev/pci/if_pcn.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 2107 dev/pci/if_pcn.c struct pcn_softc *sc = ifp->if_softc;
sc 2109 dev/pci/if_pcn.c mii_pollstat(&sc->sc_mii);
sc 2110 dev/pci/if_pcn.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 2111 dev/pci/if_pcn.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 2122 dev/pci/if_pcn.c struct pcn_softc *sc = ifp->if_softc;
sc 2125 dev/pci/if_pcn.c mii_mediachg(&sc->sc_mii);
sc 2137 dev/pci/if_pcn.c struct pcn_softc *sc = (void *) self;
sc 2140 dev/pci/if_pcn.c pcn_bcr_write(sc, LE_BCR33, reg | (phy << PHYAD_SHIFT));
sc 2141 dev/pci/if_pcn.c rv = pcn_bcr_read(sc, LE_BCR34) & LE_B34_MIIMD;
sc 2156 dev/pci/if_pcn.c struct pcn_softc *sc = (void *) self;
sc 2158 dev/pci/if_pcn.c pcn_bcr_write(sc, LE_BCR33, reg | (phy << PHYAD_SHIFT));
sc 2159 dev/pci/if_pcn.c pcn_bcr_write(sc, LE_BCR34, val);
sc 2170 dev/pci/if_pcn.c struct pcn_softc *sc = (void *) self;
sc 2172 dev/pci/if_pcn.c if ((sc->sc_mii.mii_media_active & IFM_FDX) != 0)
sc 2173 dev/pci/if_pcn.c pcn_bcr_write(sc, LE_BCR9, LE_B9_FDEN);
sc 2175 dev/pci/if_pcn.c pcn_bcr_write(sc, LE_BCR9, 0);
sc 91 dev/pci/if_pgt_pci.c struct pgt_softc *sc = &psc->sc_pgt;
sc 97 dev/pci/if_pgt_pci.c sc->sc_dmat = pa->pa_dmat;
sc 102 dev/pci/if_pgt_pci.c sc->sc_flags |= SC_ISL3877;
sc 107 dev/pci/if_pgt_pci.c &sc->sc_iotag, &sc->sc_iohandle, NULL, &psc->sc_mapsize, 0);
sc 120 dev/pci/if_pgt_pci.c bus_space_write_4(sc->sc_iotag, sc->sc_iohandle, PGT_REG_INT_EN, 0);
sc 121 dev/pci/if_pgt_pci.c (void)bus_space_read_4(sc->sc_iotag, sc->sc_iohandle, PGT_REG_INT_EN);
sc 126 dev/pci/if_pgt_pci.c psc->sc_ih = pci_intr_establish(psc->sc_pc, ih, IPL_NET, pgt_intr, sc,
sc 127 dev/pci/if_pgt_pci.c sc->sc_dev.dv_xname);
sc 138 dev/pci/if_pgt_pci.c mountroothook_establish(pgt_attach, sc);
sc 140 dev/pci/if_pgt_pci.c pgt_attach(sc);
sc 147 dev/pci/if_pgt_pci.c struct pgt_softc *sc = &psc->sc_pgt;
sc 149 dev/pci/if_pgt_pci.c pgt_detach(sc);
sc 117 dev/pci/if_ral_pci.c struct rt2560_softc *sc = &psc->sc_sc;
sc 126 dev/pci/if_ral_pci.c sc->sc_dmat = pa->pa_dmat;
sc 131 dev/pci/if_ral_pci.c PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_st, &sc->sc_sh, NULL,
sc 145 dev/pci/if_ral_pci.c psc->sc_opns->intr, sc, sc->sc_dev.dv_xname);
sc 155 dev/pci/if_ral_pci.c (*psc->sc_opns->attach)(sc, PCI_PRODUCT(pa->pa_id));
sc 162 dev/pci/if_ral_pci.c struct rt2560_softc *sc = &psc->sc_sc;
sc 164 dev/pci/if_ral_pci.c (*psc->sc_opns->detach)(sc);
sc 126 dev/pci/if_re_pci.c struct rl_softc *sc = &psc->sc_rl;
sc 165 dev/pci/if_re_pci.c &sc->rl_btag, &sc->rl_bhandle, NULL, &iosize, 0)) {
sc 167 dev/pci/if_re_pci.c &sc->rl_btag, &sc->rl_bhandle, NULL, &iosize, 0)) {
sc 179 dev/pci/if_re_pci.c psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, re_intr, sc,
sc 180 dev/pci/if_re_pci.c sc->sc_dev.dv_xname);
sc 188 dev/pci/if_re_pci.c sc->sc_dmat = pa->pa_dmat;
sc 189 dev/pci/if_re_pci.c sc->sc_flags |= RL_ENABLED;
sc 193 dev/pci/if_re_pci.c sc->rl_type = RL_8139CPLUS;
sc 195 dev/pci/if_re_pci.c sc->rl_type = RL_8169;
sc 198 dev/pci/if_re_pci.c sc->rl_type = RL_8139CPLUS;
sc 200 dev/pci/if_re_pci.c sc->rl_type = RL_8169;
sc 203 dev/pci/if_re_pci.c re_attach(sc, intrstr);
sc 123 dev/pci/if_rl_pci.c struct rl_softc *sc = (struct rl_softc *)self;
sc 136 dev/pci/if_rl_pci.c &sc->rl_btag, &sc->rl_bhandle, NULL, &size, 0)) {
sc 142 dev/pci/if_rl_pci.c &sc->rl_btag, &sc->rl_bhandle, NULL, &size, 0)){
sc 153 dev/pci/if_rl_pci.c bus_space_unmap(sc->rl_btag, sc->rl_bhandle, size);
sc 158 dev/pci/if_rl_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, rl_intr, sc,
sc 160 dev/pci/if_rl_pci.c if (sc->sc_ih == NULL) {
sc 165 dev/pci/if_rl_pci.c bus_space_unmap(sc->rl_btag, sc->rl_bhandle, size);
sc 170 dev/pci/if_rl_pci.c sc->sc_dmat = pa->pa_dmat;
sc 172 dev/pci/if_rl_pci.c rl_attach(sc);
sc 125 dev/pci/if_rtw_pci.c rtw_pci_enable(struct rtw_softc *sc)
sc 127 dev/pci/if_rtw_pci.c struct rtw_pci_softc *psc = (void *)sc;
sc 131 dev/pci/if_rtw_pci.c IPL_NET, rtw_intr, sc, sc->sc_dev.dv_xname);
sc 134 dev/pci/if_rtw_pci.c sc->sc_dev.dv_xname);
sc 142 dev/pci/if_rtw_pci.c rtw_pci_disable(struct rtw_softc *sc)
sc 144 dev/pci/if_rtw_pci.c struct rtw_pci_softc *psc = (void *)sc;
sc 155 dev/pci/if_rtw_pci.c struct rtw_softc *sc = &psc->psc_rtw;
sc 156 dev/pci/if_rtw_pci.c struct rtw_regs *regs = &sc->sc_regs;
sc 173 dev/pci/if_rtw_pci.c sc->sc_flags |= RTW_F_ENABLED;
sc 178 dev/pci/if_rtw_pci.c sc->sc_rev = PCI_REVISION(pa->pa_class);
sc 236 dev/pci/if_rtw_pci.c sc->sc_dmat = pa->pa_dmat;
sc 247 dev/pci/if_rtw_pci.c rtw_intr, sc, sc->sc_dev.dv_xname);
sc 258 dev/pci/if_rtw_pci.c sc->sc_enable = rtw_pci_enable;
sc 259 dev/pci/if_rtw_pci.c sc->sc_disable = rtw_pci_disable;
sc 264 dev/pci/if_rtw_pci.c rtw_attach(sc);
sc 306 dev/pci/if_san_xilinx.c xilinx_softc_t *sc;
sc 346 dev/pci/if_san_xilinx.c sc = malloc(sizeof(xilinx_softc_t), M_DEVBUF, M_NOWAIT);
sc 347 dev/pci/if_san_xilinx.c if (sc == NULL)
sc 350 dev/pci/if_san_xilinx.c memset(sc, 0, sizeof(xilinx_softc_t));
sc 351 dev/pci/if_san_xilinx.c ifp = (struct ifnet *)&sc->common.ifp;
sc 352 dev/pci/if_san_xilinx.c ifp->if_softc = sc;
sc 353 dev/pci/if_san_xilinx.c sc->common.card = card;
sc 355 dev/pci/if_san_xilinx.c free(sc, M_DEVBUF);
sc 359 dev/pci/if_san_xilinx.c strlcpy(sc->if_name, ifp->if_xname, IFNAMSIZ);
sc 360 dev/pci/if_san_xilinx.c sc->first_time_slot = -1;
sc 361 dev/pci/if_san_xilinx.c sc->time_slot_map = 0;
sc 362 dev/pci/if_san_xilinx.c sdla_getcfg(card->hw, SDLA_DMATAG, &sc->dmatag);
sc 364 dev/pci/if_san_xilinx.c IFQ_SET_MAXLEN(&sc->wp_tx_pending_list, MAX_TX_BUF);
sc 365 dev/pci/if_san_xilinx.c sc->wp_tx_pending_list.ifq_len = 0;
sc 366 dev/pci/if_san_xilinx.c IFQ_SET_MAXLEN(&sc->wp_tx_complete_list, MAX_TX_BUF);
sc 367 dev/pci/if_san_xilinx.c sc->wp_tx_complete_list.ifq_len = 0;
sc 369 dev/pci/if_san_xilinx.c aft_alloc_rx_buffers(sc);
sc 373 dev/pci/if_san_xilinx.c ifmedia_init(&sc->common.ifm, 0, wan_ifmedia_upd, wan_ifmedia_sts);
sc 376 dev/pci/if_san_xilinx.c ifmedia_add(&sc->common.ifm, IFM_TDM|IFM_TDM_T1, 0, NULL);
sc 377 dev/pci/if_san_xilinx.c ifmedia_add(&sc->common.ifm, IFM_TDM|IFM_TDM_T1_AMI, 0, NULL);
sc 378 dev/pci/if_san_xilinx.c ifmedia_add(&sc->common.ifm, IFM_TDM|IFM_TDM_E1, 0, NULL);
sc 379 dev/pci/if_san_xilinx.c ifmedia_add(&sc->common.ifm, IFM_TDM|IFM_TDM_E1_AMI, 0, NULL);
sc 381 dev/pci/if_san_xilinx.c ifmedia_add(&sc->common.ifm,
sc 383 dev/pci/if_san_xilinx.c ifmedia_add(&sc->common.ifm,
sc 385 dev/pci/if_san_xilinx.c ifmedia_add(&sc->common.ifm,
sc 387 dev/pci/if_san_xilinx.c ifmedia_add(&sc->common.ifm,
sc 390 dev/pci/if_san_xilinx.c ifmedia_set(&sc->common.ifm, IFM_TDM|IFM_TDM_T1);
sc 397 dev/pci/if_san_xilinx.c return (sc);
sc 403 dev/pci/if_san_xilinx.c xilinx_softc_t *sc = ifp->if_softc;
sc 405 dev/pci/if_san_xilinx.c IF_PURGE(&sc->wp_tx_pending_list);
sc 407 dev/pci/if_san_xilinx.c if (sc->tx_dma_addr && sc->tx_dma_len) {
sc 408 dev/pci/if_san_xilinx.c sc->tx_dma_addr = 0;
sc 409 dev/pci/if_san_xilinx.c sc->tx_dma_len = 0;
sc 412 dev/pci/if_san_xilinx.c if (sc->tx_dma_mbuf) {
sc 414 dev/pci/if_san_xilinx.c bus_dmamap_unload(sc->dmatag, sc->tx_dmamap);
sc 415 dev/pci/if_san_xilinx.c m_freem(sc->tx_dma_mbuf);
sc 416 dev/pci/if_san_xilinx.c sc->tx_dma_mbuf = NULL;
sc 420 dev/pci/if_san_xilinx.c bus_dmamap_destroy(sc->dmatag, sc->tx_dmamap);
sc 422 dev/pci/if_san_xilinx.c if (sc->rx_dma_buf) {
sc 423 dev/pci/if_san_xilinx.c SIMPLEQ_INSERT_TAIL(&sc->wp_rx_free_list,
sc 424 dev/pci/if_san_xilinx.c sc->rx_dma_buf, entry);
sc 425 dev/pci/if_san_xilinx.c sc->rx_dma_buf = NULL;
sc 428 dev/pci/if_san_xilinx.c aft_release_rx_buffers(sc);
sc 432 dev/pci/if_san_xilinx.c free(sc, M_DEVBUF);
sc 472 dev/pci/if_san_xilinx.c xilinx_softc_t *sc = ifp->if_softc;
sc 477 dev/pci/if_san_xilinx.c WAN_ASSERT(sc == NULL);
sc 478 dev/pci/if_san_xilinx.c WAN_ASSERT(sc->common.card == NULL);
sc 479 dev/pci/if_san_xilinx.c card = (sdla_t *)sc->common.card;
sc 484 dev/pci/if_san_xilinx.c sc->time_slot_map = card->fe_te.te_cfg.active_ch;
sc 485 dev/pci/if_san_xilinx.c sc->dma_mtu = xilinx_valid_mtu(ifp->if_mtu+100);
sc 487 dev/pci/if_san_xilinx.c if (!sc->dma_mtu) {
sc 489 dev/pci/if_san_xilinx.c card->devname, sc->if_name, ifp->if_mtu);
sc 495 dev/pci/if_san_xilinx.c card->devname, card->u.xilinx.dma_per_ch, sc->dma_mtu);
sc 497 dev/pci/if_san_xilinx.c if (aft_alloc_rx_dma_buff(sc, card->u.xilinx.dma_per_ch) == 0)
sc 500 dev/pci/if_san_xilinx.c if (bus_dmamap_create(sc->dmatag, sc->dma_mtu, 1, sc->dma_mtu,
sc 501 dev/pci/if_san_xilinx.c 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &sc->tx_dmamap)) {
sc 503 dev/pci/if_san_xilinx.c sc->if_name);
sc 513 dev/pci/if_san_xilinx.c err = xilinx_dev_configure(card, sc);
sc 524 dev/pci/if_san_xilinx.c sc->router_start_time = tv.tv_sec;
sc 526 dev/pci/if_san_xilinx.c xilinx_init_tx_dma_descr(card, sc);
sc 527 dev/pci/if_san_xilinx.c xilinx_dev_enable(card, sc);
sc 529 dev/pci/if_san_xilinx.c sc->ignore_modem = 0x0F;
sc 539 dev/pci/if_san_xilinx.c xilinx_softc_t *sc = ifp->if_softc;
sc 540 dev/pci/if_san_xilinx.c sdla_t *card = (sdla_t *)sc->common.card;
sc 547 dev/pci/if_san_xilinx.c xilinx_dev_close(card, sc);
sc 566 dev/pci/if_san_xilinx.c if (sc->tx_dma_addr && sc->tx_dma_len) {
sc 567 dev/pci/if_san_xilinx.c sc->tx_dma_addr = 0;
sc 568 dev/pci/if_san_xilinx.c sc->tx_dma_len = 0;
sc 571 dev/pci/if_san_xilinx.c if (sc->tx_dma_mbuf) {
sc 572 dev/pci/if_san_xilinx.c bus_dmamap_unload(sc->dmatag, sc->tx_dmamap);
sc 573 dev/pci/if_san_xilinx.c m_freem(sc->tx_dma_mbuf);
sc 574 dev/pci/if_san_xilinx.c sc->tx_dma_mbuf = NULL;
sc 577 dev/pci/if_san_xilinx.c bus_dmamap_destroy(sc->dmatag, sc->tx_dmamap);
sc 582 dev/pci/if_san_xilinx.c if (sc->rx_dma_buf) {
sc 583 dev/pci/if_san_xilinx.c aft_reload_rx_dma_buff(sc, sc->rx_dma_buf);
sc 584 dev/pci/if_san_xilinx.c sc->rx_dma_buf = NULL;
sc 587 dev/pci/if_san_xilinx.c while ((buf = SIMPLEQ_FIRST(&sc->wp_rx_free_list)) != NULL) {
sc 588 dev/pci/if_san_xilinx.c SIMPLEQ_REMOVE_HEAD(&sc->wp_rx_free_list, entry);
sc 589 dev/pci/if_san_xilinx.c aft_release_rx_dma_buff(sc, buf);
sc 592 dev/pci/if_san_xilinx.c while ((buf = SIMPLEQ_FIRST(&sc->wp_rx_complete_list)) != NULL) {
sc 593 dev/pci/if_san_xilinx.c SIMPLEQ_REMOVE_HEAD(&sc->wp_rx_complete_list, entry);
sc 594 dev/pci/if_san_xilinx.c aft_release_rx_dma_buff(sc, buf);
sc 601 dev/pci/if_san_xilinx.c xilinx_dev_unconfigure(card, sc);
sc 605 dev/pci/if_san_xilinx.c sc->ignore_modem = 0x00;
sc 613 dev/pci/if_san_xilinx.c xilinx_softc_t *sc = ifp->if_softc;
sc 614 dev/pci/if_san_xilinx.c sdla_t *card = (sdla_t *)sc->common.card;
sc 634 dev/pci/if_san_xilinx.c if (IF_QFULL(&sc->wp_tx_pending_list)) {
sc 644 dev/pci/if_san_xilinx.c err = xilinx_dma_tx(card, sc);
sc 645 dev/pci/if_san_xilinx.c if (!err && !IF_QFULL(&sc->wp_tx_pending_list))
sc 663 dev/pci/if_san_xilinx.c IF_ENQUEUE(&sc->wp_tx_pending_list, m);
sc 664 dev/pci/if_san_xilinx.c xilinx_dma_tx(card, sc);
sc 674 dev/pci/if_san_xilinx.c xilinx_softc_t *sc = (xilinx_softc_t *)ifp->if_softc;
sc 680 dev/pci/if_san_xilinx.c if (!sc)
sc 683 dev/pci/if_san_xilinx.c card = (sdla_t *)sc->common.card;
sc 691 dev/pci/if_san_xilinx.c if (IF_QFULL(&sc->udp_queue))
sc 711 dev/pci/if_san_xilinx.c IF_ENQUEUE(&sc->udp_queue, m);
sc 713 dev/pci/if_san_xilinx.c process_udp_mgmt_pkt(card, ifp, sc, 1);
sc 721 dev/pci/if_san_xilinx.c IF_DEQUEUE(&sc->udp_queue, m);
sc 747 dev/pci/if_san_xilinx.c xilinx_softc_t* sc, int local_dev )
sc 755 dev/pci/if_san_xilinx.c IF_POLL(&sc->udp_queue, m);
sc 760 dev/pci/if_san_xilinx.c trace_info=&sc->trace_info;
sc 892 dev/pci/if_san_xilinx.c sc->router_up_time = tv.tv_sec;
sc 893 dev/pci/if_san_xilinx.c sc->router_up_time -= sc->router_start_time;
sc 895 dev/pci/if_san_xilinx.c sc->router_up_time;
sc 1188 dev/pci/if_san_xilinx.c xilinx_dev_configure(sdla_t *card, xilinx_softc_t *sc)
sc 1193 dev/pci/if_san_xilinx.c sc->logic_ch_num=-1;
sc 1200 dev/pci/if_san_xilinx.c sc->if_name, sc->time_slot_map, sc->time_slot_map << 1);
sc 1201 dev/pci/if_san_xilinx.c sc->time_slot_map = sc->time_slot_map << 1;
sc 1202 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->time_slot_map, 0);
sc 1209 dev/pci/if_san_xilinx.c if (sc->time_slot_map == 0) {
sc 1211 dev/pci/if_san_xilinx.c card->devname, sc->time_slot_map);
sc 1217 dev/pci/if_san_xilinx.c sc->if_name, sc->time_slot_map);
sc 1229 dev/pci/if_san_xilinx.c if (bit_test((u_int8_t *)&sc->time_slot_map, i)) {
sc 1231 dev/pci/if_san_xilinx.c if (sc->first_time_slot == -1) {
sc 1236 dev/pci/if_san_xilinx.c sc->first_time_slot = i;
sc 1241 dev/pci/if_san_xilinx.c card->devname, sc->if_name,
sc 1250 dev/pci/if_san_xilinx.c card->devname, sc->if_name, (i+1));
sc 1256 dev/pci/if_san_xilinx.c ++sc->num_of_time_slots;
sc 1262 dev/pci/if_san_xilinx.c sc->logic_ch_num = request_xilinx_logical_channel_num(card,
sc 1263 dev/pci/if_san_xilinx.c sc, &free_logic_ch);
sc 1264 dev/pci/if_san_xilinx.c if (sc->logic_ch_num == -1)
sc 1270 dev/pci/if_san_xilinx.c if (bit_test((u_int8_t *)&sc->time_slot_map, i)) {
sc 1286 dev/pci/if_san_xilinx.c reg = sc->logic_ch_num & CONTROL_RAM_DATA_MASK;
sc 1289 dev/pci/if_san_xilinx.c reg |= (sc->fifo_size_code & HDLC_FIFO_SIZE_MASK) <<
sc 1296 dev/pci/if_san_xilinx.c reg |= (sc->fifo_base_addr & HDLC_FIFO_BASE_ADDR_MASK)
sc 1301 dev/pci/if_san_xilinx.c "ch %ld Reg=0x%X\n", i, sc->logic_ch_num, reg);
sc 1357 dev/pci/if_san_xilinx.c sc->if_name, free_logic_ch);
sc 1381 dev/pci/if_san_xilinx.c xilinx_write_ctrl_hdlc(card, sc->first_time_slot,
sc 1393 dev/pci/if_san_xilinx.c (reg | (sc->logic_ch_num & HDLC_LOGIC_CH_BIT_MASK)));
sc 1404 dev/pci/if_san_xilinx.c xilinx_write_ctrl_hdlc(card, sc->first_time_slot,
sc 1411 dev/pci/if_san_xilinx.c xilinx_dev_unconfigure(sdla_t *card, xilinx_softc_t *sc)
sc 1421 dev/pci/if_san_xilinx.c if (sc->logic_ch_num != -1) {
sc 1428 dev/pci/if_san_xilinx.c (reg | (sc->logic_ch_num & HDLC_LOGIC_CH_BIT_MASK)));
sc 1431 dev/pci/if_san_xilinx.c xilinx_write_ctrl_hdlc(card, sc->first_time_slot,
sc 1435 dev/pci/if_san_xilinx.c if (bit_test((u_int8_t *)&sc->time_slot_map, i)) {
sc 1467 dev/pci/if_san_xilinx.c free_xilinx_logical_channel_num(card, sc->logic_ch_num);
sc 1469 dev/pci/if_san_xilinx.c if (bit_test((u_int8_t *)&sc->time_slot_map, i))
sc 1470 dev/pci/if_san_xilinx.c --sc->num_of_time_slots;
sc 1472 dev/pci/if_san_xilinx.c free_fifo_baddr_and_size(card, sc);
sc 1475 dev/pci/if_san_xilinx.c sc->logic_ch_num = -1;
sc 1478 dev/pci/if_san_xilinx.c if (bit_test((u_int8_t *)&sc->time_slot_map, i))
sc 1487 dev/pci/if_san_xilinx.c xilinx_init_rx_dev_fifo(sdla_t *card, xilinx_softc_t *sc, unsigned char wait)
sc 1495 dev/pci/if_san_xilinx.c dma_descr = (unsigned long)(sc->logic_ch_num << 4) +
sc 1503 dev/pci/if_san_xilinx.c sc->if_name, dma_descr, reg, __FUNCTION__);
sc 1523 dev/pci/if_san_xilinx.c sc->if_name, i * FIFO_RESET_TIMEOUT_US);
sc 1526 dev/pci/if_san_xilinx.c "successful %u us\n", card->devname, sc->if_name,
sc 1536 dev/pci/if_san_xilinx.c xilinx_init_tx_dev_fifo(sdla_t *card, xilinx_softc_t *sc, unsigned char wait)
sc 1544 dev/pci/if_san_xilinx.c dma_descr = (unsigned long)(sc->logic_ch_num << 4) +
sc 1552 dev/pci/if_san_xilinx.c sc->if_name, dma_descr, reg, __FUNCTION__);
sc 1570 dev/pci/if_san_xilinx.c "timedout %u us\n", card->devname, sc->if_name,
sc 1574 dev/pci/if_san_xilinx.c "successful %u us\n", card->devname, sc->if_name,
sc 1585 dev/pci/if_san_xilinx.c xilinx_dev_enable(sdla_t *card, xilinx_softc_t *sc)
sc 1590 dev/pci/if_san_xilinx.c log(LOG_INFO, "%s: Enabling Global Inter Mask !\n", sc->if_name);
sc 1594 dev/pci/if_san_xilinx.c bit_set((u_int8_t *)®, sc->logic_ch_num);
sc 1598 dev/pci/if_san_xilinx.c bit_set((u_int8_t *)&card->u.xilinx.active_ch_map, sc->logic_ch_num);
sc 1602 dev/pci/if_san_xilinx.c xilinx_dev_close(sdla_t *card, xilinx_softc_t *sc)
sc 1614 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)®, sc->logic_ch_num);
sc 1615 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&card->u.xilinx.active_ch_map, sc->logic_ch_num);
sc 1635 dev/pci/if_san_xilinx.c (reg | (sc->logic_ch_num & HDLC_LOGIC_CH_BIT_MASK)));
sc 1639 dev/pci/if_san_xilinx.c xilinx_write_ctrl_hdlc(card, sc->first_time_slot,
sc 1644 dev/pci/if_san_xilinx.c dma_descr=(sc->logic_ch_num<<4) + XILINX_RxDMA_DESCRIPTOR_HI;
sc 1646 dev/pci/if_san_xilinx.c dma_descr=(sc->logic_ch_num<<4) + XILINX_TxDMA_DESCRIPTOR_HI;
sc 1653 dev/pci/if_san_xilinx.c xilinx_dma_rx(sdla_t *card, xilinx_softc_t *sc)
sc 1662 dev/pci/if_san_xilinx.c dma_descr=(sc->logic_ch_num<<4) + XILINX_RxDMA_DESCRIPTOR_HI;
sc 1672 dev/pci/if_san_xilinx.c if (sc->rx_dma_buf) {
sc 1674 dev/pci/if_san_xilinx.c sc->if_name);
sc 1678 dev/pci/if_san_xilinx.c sc->rx_dma_buf = SIMPLEQ_FIRST(&sc->wp_rx_free_list);
sc 1680 dev/pci/if_san_xilinx.c if (sc->rx_dma_buf == NULL) {
sc 1681 dev/pci/if_san_xilinx.c if (aft_alloc_rx_dma_buff(sc, 1) == 0) {
sc 1683 dev/pci/if_san_xilinx.c sc->if_name);
sc 1686 dev/pci/if_san_xilinx.c sc->rx_dma_buf = SIMPLEQ_FIRST(&sc->wp_rx_free_list);
sc 1689 dev/pci/if_san_xilinx.c SIMPLEQ_REMOVE_HEAD(&sc->wp_rx_free_list, entry);
sc 1691 dev/pci/if_san_xilinx.c bus_dmamap_sync(sc->dmatag, sc->rx_dma_buf->dma_map, 0, sc->dma_mtu,
sc 1694 dev/pci/if_san_xilinx.c rx_el = &sc->rx_dma_buf->rx_el;
sc 1697 dev/pci/if_san_xilinx.c bus_addr = sc->rx_dma_buf->dma_map->dm_segs[0].ds_addr;
sc 1709 dev/pci/if_san_xilinx.c dma_descr = (sc->logic_ch_num<<4) + XILINX_RxDMA_DESCRIPTOR_LO;
sc 1718 dev/pci/if_san_xilinx.c dma_descr=(unsigned long)(sc->logic_ch_num << 4) +
sc 1723 dev/pci/if_san_xilinx.c reg |= (sc->dma_mtu >> 2) & RxDMA_HI_DMA_DATA_LENGTH_MASK;
sc 1726 dev/pci/if_san_xilinx.c reg |= (sc->fifo_size_code & DMA_FIFO_SIZE_MASK) <<
sc 1732 dev/pci/if_san_xilinx.c reg |= (sc->fifo_base_addr&DMA_FIFO_BASE_ADDR_MASK) <<
sc 1739 dev/pci/if_san_xilinx.c "(%s)\n", sc->if_name, reg, bus_addr, dma_descr, __FUNCTION__);
sc 1744 dev/pci/if_san_xilinx.c bit_set((u_int8_t *)&sc->rx_dma, 0);
sc 1751 dev/pci/if_san_xilinx.c xilinx_dma_tx(sdla_t *card, xilinx_softc_t *sc)
sc 1763 dev/pci/if_san_xilinx.c if (bit_test((u_int8_t *)&sc->dma_status, TX_BUSY)) {
sc 1766 dev/pci/if_san_xilinx.c sc->if_name, __FUNCTION__, __LINE__);
sc 1770 dev/pci/if_san_xilinx.c bit_set((u_int8_t *)&sc->dma_status, TX_BUSY);
sc 1777 dev/pci/if_san_xilinx.c if (sc->tx_dma_addr && sc->tx_dma_len) {
sc 1779 dev/pci/if_san_xilinx.c sc->if_name, __FUNCTION__);
sc 1781 dev/pci/if_san_xilinx.c sc->tx_dma_addr = 0;
sc 1782 dev/pci/if_san_xilinx.c sc->tx_dma_len = 0;
sc 1788 dev/pci/if_san_xilinx.c if (sc->tx_dma_mbuf) {
sc 1789 dev/pci/if_san_xilinx.c bus_dmamap_unload(sc->dmatag, sc->tx_dmamap);
sc 1790 dev/pci/if_san_xilinx.c m_freem(sc->tx_dma_mbuf);
sc 1791 dev/pci/if_san_xilinx.c sc->tx_dma_mbuf = NULL;
sc 1797 dev/pci/if_san_xilinx.c dma_descr = (sc->logic_ch_num << 4) + XILINX_TxDMA_DESCRIPTOR_HI;
sc 1801 dev/pci/if_san_xilinx.c sc->if_name, sc->logic_ch_num, dma_descr, __FUNCTION__, __LINE__);
sc 1809 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
sc 1813 dev/pci/if_san_xilinx.c IF_DEQUEUE(&sc->wp_tx_pending_list, m);
sc 1816 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
sc 1826 dev/pci/if_san_xilinx.c sc->if_name, len, MAX_XILINX_TX_DMA_SIZE);
sc 1828 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
sc 1835 dev/pci/if_san_xilinx.c sc->if_name);
sc 1837 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
sc 1841 dev/pci/if_san_xilinx.c if (bus_dmamap_load(sc->dmatag, sc->tx_dmamap,
sc 1844 dev/pci/if_san_xilinx.c sc->if_name);
sc 1846 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
sc 1850 dev/pci/if_san_xilinx.c sc->tx_dma_addr = sc->tx_dmamap->dm_segs[0].ds_addr;
sc 1851 dev/pci/if_san_xilinx.c sc->tx_dma_len = len;
sc 1853 dev/pci/if_san_xilinx.c if (sc->tx_dma_addr & 0x03) {
sc 1857 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
sc 1861 dev/pci/if_san_xilinx.c sc->tx_dma_mbuf = m;
sc 1867 dev/pci/if_san_xilinx.c dma_descr = (sc->logic_ch_num << 4) + XILINX_TxDMA_DESCRIPTOR_LO;
sc 1871 dev/pci/if_san_xilinx.c reg = sc->tx_dma_addr;
sc 1873 dev/pci/if_san_xilinx.c bus_dmamap_sync(sc->dmatag, sc->tx_dmamap, 0, len,
sc 1887 dev/pci/if_san_xilinx.c sc->if_name, reg, sc->tx_dma_addr, dma_descr, __FUNCTION__);
sc 1892 dev/pci/if_san_xilinx.c dma_descr = (sc->logic_ch_num << 4) + XILINX_TxDMA_DESCRIPTOR_HI;
sc 1898 dev/pci/if_san_xilinx.c reg |= (sc->fifo_size_code & DMA_FIFO_SIZE_MASK) <<
sc 1904 dev/pci/if_san_xilinx.c reg |= (sc->fifo_base_addr & DMA_FIFO_BASE_ADDR_MASK) <<
sc 1918 dev/pci/if_san_xilinx.c sc->if_name, reg, dma_descr, __FUNCTION__);
sc 1928 dev/pci/if_san_xilinx.c xilinx_dma_tx_complete(sdla_t *card, xilinx_softc_t *sc)
sc 1939 dev/pci/if_san_xilinx.c dma_descr = (sc->logic_ch_num << 4) + XILINX_TxDMA_DESCRIPTOR_HI;
sc 1942 dev/pci/if_san_xilinx.c if (sc->tx_dma_mbuf == NULL) {
sc 1946 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
sc 1950 dev/pci/if_san_xilinx.c bus_dmamap_sync(sc->dmatag, sc->tx_dmamap, 0, sc->tx_dma_len,
sc 1953 dev/pci/if_san_xilinx.c sc->tx_dma_addr = 0;
sc 1954 dev/pci/if_san_xilinx.c sc->tx_dma_len = 0;
sc 1965 dev/pci/if_san_xilinx.c card->devname, sc->if_name, reg);
sc 1967 dev/pci/if_san_xilinx.c if (++sc->pci_retry < 3) {
sc 1973 dev/pci/if_san_xilinx.c sc->if_name, reg, dma_descr, __FUNCTION__);
sc 1980 dev/pci/if_san_xilinx.c sc->pci_retry = 0;
sc 1981 dev/pci/if_san_xilinx.c sc->tx_dma_mbuf->m_pkthdr.csum_flags = reg;
sc 1982 dev/pci/if_san_xilinx.c IF_ENQUEUE(&sc->wp_tx_complete_list, sc->tx_dma_mbuf);
sc 1983 dev/pci/if_san_xilinx.c sc->tx_dma_mbuf = NULL;
sc 1985 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
sc 1987 dev/pci/if_san_xilinx.c xilinx_process_packet(sc);
sc 1991 dev/pci/if_san_xilinx.c xilinx_tx_post_complete(sdla_t *card, xilinx_softc_t *sc, struct mbuf *m)
sc 1996 dev/pci/if_san_xilinx.c WAN_ASSERT1(sc == NULL);
sc 1997 dev/pci/if_san_xilinx.c ifp = (struct ifnet *)&sc->common.ifp;
sc 2004 dev/pci/if_san_xilinx.c card->devname, sc->if_name, reg);
sc 2011 dev/pci/if_san_xilinx.c card->devname, sc->if_name);
sc 2015 dev/pci/if_san_xilinx.c "not equal 0 \n", card->devname, sc->if_name);
sc 2023 dev/pci/if_san_xilinx.c card->devname, sc->if_name);
sc 2028 dev/pci/if_san_xilinx.c card->devname, sc->if_name);
sc 2033 dev/pci/if_san_xilinx.c card->devname, sc->if_name);
sc 2039 dev/pci/if_san_xilinx.c card->devname, sc->if_name);
sc 2051 dev/pci/if_san_xilinx.c bit_set((u_int8_t *)&sc->idle_start, 0);
sc 2055 dev/pci/if_san_xilinx.c if (!xilinx_dma_tx(card, sc)) {
sc 2067 dev/pci/if_san_xilinx.c xilinx_dma_rx_complete(sdla_t *card, xilinx_softc_t *sc)
sc 2073 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->rx_dma, 0);
sc 2075 dev/pci/if_san_xilinx.c if (sc->rx_dma_buf == NULL) {
sc 2077 dev/pci/if_san_xilinx.c "%s: Critical Error: rx_dma_mbuf\n", sc->if_name);
sc 2081 dev/pci/if_san_xilinx.c rx_el = &sc->rx_dma_buf->rx_el;
sc 2084 dev/pci/if_san_xilinx.c dma_descr=(sc->logic_ch_num << 4) + XILINX_RxDMA_DESCRIPTOR_LO;
sc 2088 dev/pci/if_san_xilinx.c dma_descr = (sc->logic_ch_num << 4) + XILINX_RxDMA_DESCRIPTOR_HI;
sc 2091 dev/pci/if_san_xilinx.c rx_el->pkt_error = sc->pkt_error;
sc 2092 dev/pci/if_san_xilinx.c sc->pkt_error = 0;
sc 2096 dev/pci/if_san_xilinx.c sc->if_name, rx_el->reg, rx_el->align, rx_el->dma_addr,
sc 2100 dev/pci/if_san_xilinx.c buf = sc->rx_dma_buf;
sc 2101 dev/pci/if_san_xilinx.c sc->rx_dma_buf = NULL;
sc 2103 dev/pci/if_san_xilinx.c xilinx_dma_rx(card, sc);
sc 2105 dev/pci/if_san_xilinx.c SIMPLEQ_INSERT_TAIL(&sc->wp_rx_complete_list, buf, entry);
sc 2107 dev/pci/if_san_xilinx.c xilinx_process_packet(sc);
sc 2114 dev/pci/if_san_xilinx.c xilinx_rx_post_complete(sdla_t *card, xilinx_softc_t *sc,
sc 2122 dev/pci/if_san_xilinx.c WAN_ASSERT1(sc == NULL);
sc 2123 dev/pci/if_san_xilinx.c ifp = (struct ifnet *)&sc->common.ifp; /*m->m_pkthdr.rcvif;*/
sc 2127 dev/pci/if_san_xilinx.c sc->if_name, rx_el->reg, rx_el->align, rx_el->dma_addr,
sc 2232 dev/pci/if_san_xilinx.c len = (((sc->dma_mtu >> 2) - len) << 2) -
sc 2242 dev/pci/if_san_xilinx.c if (++sc->rx_fifo_err_cnt >= WP_MAX_FIFO_FRAMES) {
sc 2243 dev/pci/if_san_xilinx.c sc->rx_fifo_err_cnt = 0;
sc 2247 dev/pci/if_san_xilinx.c if (sc->rx_fifo_err_cnt) {
sc 2248 dev/pci/if_san_xilinx.c if (++sc->rx_fifo_err_cnt >= WP_MAX_FIFO_FRAMES) {
sc 2249 dev/pci/if_san_xilinx.c sc->rx_fifo_err_cnt = 0;
sc 2255 dev/pci/if_san_xilinx.c bus_dmamap_sync(sc->dmatag, sc->rx_dma_buf->dma_map, 0, len,
sc 2273 dev/pci/if_san_xilinx.c sc->if_name);
sc 2281 dev/pci/if_san_xilinx.c aft_reload_rx_dma_buff(sc, buf);
sc 2288 dev/pci/if_san_xilinx.c request_xilinx_logical_channel_num(sdla_t *card, xilinx_softc_t *sc,
sc 2300 dev/pci/if_san_xilinx.c sc->if_name, card->u.xilinx.num_of_time_slots,
sc 2304 dev/pci/if_san_xilinx.c err = request_fifo_baddr_and_size(card, sc);
sc 2334 dev/pci/if_san_xilinx.c card->u.xilinx.dev_to_ch_map[(unsigned char)logic_ch] = (void *)sc;
sc 2385 dev/pci/if_san_xilinx.c aft_alloc_rx_buffers(xilinx_softc_t *sc)
sc 2389 dev/pci/if_san_xilinx.c SIMPLEQ_INIT(&sc->wp_rx_free_list);
sc 2390 dev/pci/if_san_xilinx.c SIMPLEQ_INIT(&sc->wp_rx_complete_list);
sc 2398 dev/pci/if_san_xilinx.c sc->wp_rx_buffers = buf;
sc 2399 dev/pci/if_san_xilinx.c sc->wp_rx_buffer_last = buf;
sc 2405 dev/pci/if_san_xilinx.c aft_release_rx_buffers(xilinx_softc_t *sc)
sc 2409 dev/pci/if_san_xilinx.c if (sc->wp_rx_buffers == NULL)
sc 2412 dev/pci/if_san_xilinx.c while ((buf = SIMPLEQ_FIRST(&sc->wp_rx_free_list)) != NULL) {
sc 2413 dev/pci/if_san_xilinx.c SIMPLEQ_REMOVE_HEAD(&sc->wp_rx_free_list, entry);
sc 2414 dev/pci/if_san_xilinx.c aft_release_rx_dma_buff(sc, buf);
sc 2417 dev/pci/if_san_xilinx.c while ((buf = SIMPLEQ_FIRST(&sc->wp_rx_complete_list)) != NULL) {
sc 2418 dev/pci/if_san_xilinx.c SIMPLEQ_REMOVE_HEAD(&sc->wp_rx_complete_list, entry);
sc 2419 dev/pci/if_san_xilinx.c aft_release_rx_dma_buff(sc, buf);
sc 2422 dev/pci/if_san_xilinx.c free(sc->wp_rx_buffers, M_DEVBUF);
sc 2424 dev/pci/if_san_xilinx.c sc->wp_rx_buffers = NULL;
sc 2425 dev/pci/if_san_xilinx.c sc->wp_rx_buffer_last = NULL;
sc 2430 dev/pci/if_san_xilinx.c aft_alloc_rx_dma_buff(xilinx_softc_t *sc, int num)
sc 2435 dev/pci/if_san_xilinx.c ebuf = sc->wp_rx_buffers + MAX_RX_BUF;
sc 2436 dev/pci/if_san_xilinx.c buf = sc->wp_rx_buffer_last;
sc 2444 dev/pci/if_san_xilinx.c buf = sc->wp_rx_buffers;
sc 2450 dev/pci/if_san_xilinx.c sc->wp_rx_buffer_last = buf;
sc 2452 dev/pci/if_san_xilinx.c buf->mbuf = wan_mbuf_alloc(sc->dma_mtu);
sc 2456 dev/pci/if_san_xilinx.c if (bus_dmamap_create(sc->dmatag, sc->dma_mtu, 1, sc->dma_mtu,
sc 2463 dev/pci/if_san_xilinx.c if (bus_dmamap_load(sc->dmatag, buf->dma_map,
sc 2464 dev/pci/if_san_xilinx.c mtod(buf->mbuf, void *), sc->dma_mtu, NULL,
sc 2466 dev/pci/if_san_xilinx.c aft_release_rx_dma_buff(sc, buf);
sc 2470 dev/pci/if_san_xilinx.c SIMPLEQ_INSERT_TAIL(&sc->wp_rx_free_list, buf, entry);
sc 2477 dev/pci/if_san_xilinx.c aft_reload_rx_dma_buff(xilinx_softc_t *sc, struct xilinx_rx_buffer *buf)
sc 2479 dev/pci/if_san_xilinx.c bus_dmamap_unload(sc->dmatag, buf->dma_map);
sc 2481 dev/pci/if_san_xilinx.c buf->mbuf = wan_mbuf_alloc(sc->dma_mtu);
sc 2483 dev/pci/if_san_xilinx.c bus_dmamap_destroy(sc->dmatag, buf->dma_map);
sc 2487 dev/pci/if_san_xilinx.c if (bus_dmamap_load(sc->dmatag, buf->dma_map, mtod(buf->mbuf, void *),
sc 2488 dev/pci/if_san_xilinx.c sc->dma_mtu, NULL, BUS_DMA_NOWAIT | BUS_DMA_READ)) {
sc 2489 dev/pci/if_san_xilinx.c aft_release_rx_dma_buff(sc, buf);
sc 2493 dev/pci/if_san_xilinx.c SIMPLEQ_INSERT_TAIL(&sc->wp_rx_free_list, buf, entry);
sc 2497 dev/pci/if_san_xilinx.c aft_release_rx_dma_buff(xilinx_softc_t *sc, struct xilinx_rx_buffer *buf)
sc 2499 dev/pci/if_san_xilinx.c bus_dmamap_destroy(sc->dmatag, buf->dma_map);
sc 2518 dev/pci/if_san_xilinx.c xilinx_process_packet(xilinx_softc_t *sc)
sc 2524 dev/pci/if_san_xilinx.c WAN_ASSERT1(sc == NULL);
sc 2527 dev/pci/if_san_xilinx.c buf = SIMPLEQ_FIRST(&sc->wp_rx_complete_list);
sc 2531 dev/pci/if_san_xilinx.c SIMPLEQ_REMOVE_HEAD(&sc->wp_rx_complete_list, entry);
sc 2536 dev/pci/if_san_xilinx.c xilinx_rx_post_complete(sc->common.card, sc, buf, &new_m,
sc 2539 dev/pci/if_san_xilinx.c ifp = (struct ifnet *)&sc->common.ifp;
sc 2549 dev/pci/if_san_xilinx.c IF_DEQUEUE(&sc->wp_tx_complete_list, m);
sc 2552 dev/pci/if_san_xilinx.c xilinx_tx_post_complete(sc->common.card, sc, m);
sc 2565 dev/pci/if_san_xilinx.c xilinx_softc_t *sc;
sc 2591 dev/pci/if_san_xilinx.c sc = (xilinx_softc_t *)
sc 2593 dev/pci/if_san_xilinx.c if (!sc) {
sc 2599 dev/pci/if_san_xilinx.c ifp = (struct ifnet *)&sc->common.ifp;
sc 2605 dev/pci/if_san_xilinx.c sc->common.state,
sc 2606 dev/pci/if_san_xilinx.c sc->ignore_modem);
sc 2621 dev/pci/if_san_xilinx.c card->devname, sc->if_name,
sc 2622 dev/pci/if_san_xilinx.c sc->logic_ch_num, i);
sc 2624 dev/pci/if_san_xilinx.c xilinx_tx_fifo_under_recover(card, sc);
sc 2637 dev/pci/if_san_xilinx.c sc = (xilinx_softc_t *)
sc 2639 dev/pci/if_san_xilinx.c if (!sc)
sc 2642 dev/pci/if_san_xilinx.c ifp = (struct ifnet *)&sc->common.ifp;
sc 2648 dev/pci/if_san_xilinx.c sc->common.state,
sc 2649 dev/pci/if_san_xilinx.c sc->ignore_modem);
sc 2664 dev/pci/if_san_xilinx.c card->devname, sc->if_name,
sc 2665 dev/pci/if_san_xilinx.c sc->logic_ch_num, i,
sc 2666 dev/pci/if_san_xilinx.c sc->rx_dma);
sc 2673 dev/pci/if_san_xilinx.c dma_descr = (sc->logic_ch_num << 4) +
sc 2677 dev/pci/if_san_xilinx.c sc->if_name, reg);
sc 2681 dev/pci/if_san_xilinx.c bit_set((u_int8_t *)&sc->pkt_error,
sc 2715 dev/pci/if_san_xilinx.c xilinx_softc_t *sc;
sc 2793 dev/pci/if_san_xilinx.c sc = (xilinx_softc_t *)
sc 2795 dev/pci/if_san_xilinx.c if (!sc) {
sc 2802 dev/pci/if_san_xilinx.c xilinx_dma_rx_complete(card, sc);
sc 2820 dev/pci/if_san_xilinx.c sc = (xilinx_softc_t *)
sc 2822 dev/pci/if_san_xilinx.c if (!sc) {
sc 2829 dev/pci/if_san_xilinx.c xilinx_dma_tx_complete(card, sc);
sc 3037 dev/pci/if_san_xilinx.c xilinx_softc_t *sc;
sc 3042 dev/pci/if_san_xilinx.c sc = ifp->if_softc;
sc 3050 dev/pci/if_san_xilinx.c sc->if_name, __FUNCTION__);
sc 3052 dev/pci/if_san_xilinx.c xilinx_init_rx_dev_fifo(card, sc, WP_NO_WAIT);
sc 3053 dev/pci/if_san_xilinx.c xilinx_init_tx_dev_fifo(card, sc, WP_NO_WAIT);
sc 3066 dev/pci/if_san_xilinx.c xilinx_softc_t *sc;
sc 3071 dev/pci/if_san_xilinx.c sc = ifp->if_softc;
sc 3080 dev/pci/if_san_xilinx.c sc->if_name, __FUNCTION__);
sc 3083 dev/pci/if_san_xilinx.c xilinx_init_rx_dev_fifo(card, sc, WP_WAIT);
sc 3084 dev/pci/if_san_xilinx.c xilinx_init_tx_dev_fifo(card, sc, WP_WAIT);
sc 3088 dev/pci/if_san_xilinx.c card->devname, sc->if_name);
sc 3090 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->idle_start, 0);
sc 3097 dev/pci/if_san_xilinx.c xilinx_softc_t *sc;
sc 3102 dev/pci/if_san_xilinx.c sc = ifp->if_softc;
sc 3111 dev/pci/if_san_xilinx.c sc->if_name, __FUNCTION__);
sc 3114 dev/pci/if_san_xilinx.c if (sc->rx_dma_buf) {
sc 3115 dev/pci/if_san_xilinx.c aft_reload_rx_dma_buff(sc, sc->rx_dma_buf);
sc 3116 dev/pci/if_san_xilinx.c sc->rx_dma_buf = NULL;
sc 3119 dev/pci/if_san_xilinx.c xilinx_dma_rx(card, sc);
sc 3121 dev/pci/if_san_xilinx.c if (sc->tx_dma_addr && sc->tx_dma_len) {
sc 3122 dev/pci/if_san_xilinx.c sc->tx_dma_addr = 0;
sc 3123 dev/pci/if_san_xilinx.c sc->tx_dma_len = 0;
sc 3126 dev/pci/if_san_xilinx.c if (sc->tx_dma_mbuf) {
sc 3127 dev/pci/if_san_xilinx.c bus_dmamap_unload(sc->dmatag, sc->tx_dmamap);
sc 3128 dev/pci/if_san_xilinx.c m_freem(sc->tx_dma_mbuf);
sc 3129 dev/pci/if_san_xilinx.c sc->tx_dma_mbuf = NULL;
sc 3132 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
sc 3133 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->idle_start, 0);
sc 3137 dev/pci/if_san_xilinx.c card->devname, sc->if_name);
sc 3179 dev/pci/if_san_xilinx.c xilinx_init_tx_dma_descr(sdla_t *card, xilinx_softc_t *sc)
sc 3184 dev/pci/if_san_xilinx.c dma_descr = (sc->logic_ch_num << 4) + XILINX_TxDMA_DESCRIPTOR_HI;
sc 3191 dev/pci/if_san_xilinx.c xilinx_tx_fifo_under_recover(sdla_t *card, xilinx_softc_t *sc)
sc 3193 dev/pci/if_san_xilinx.c struct ifnet *ifp = (struct ifnet *)&sc->common.ifp;
sc 3199 dev/pci/if_san_xilinx.c card->devname, sc->if_name);
sc 3203 dev/pci/if_san_xilinx.c dma_descr = (sc->logic_ch_num << 4) + XILINX_TxDMA_DESCRIPTOR_HI;
sc 3207 dev/pci/if_san_xilinx.c xilinx_init_tx_dev_fifo(card, sc, WP_WAIT);
sc 3208 dev/pci/if_san_xilinx.c if (sc->tx_dma_addr && sc->tx_dma_len) {
sc 3209 dev/pci/if_san_xilinx.c sc->tx_dma_addr = 0;
sc 3210 dev/pci/if_san_xilinx.c sc->tx_dma_len = 0;
sc 3214 dev/pci/if_san_xilinx.c if (sc->tx_dma_mbuf) {
sc 3215 dev/pci/if_san_xilinx.c IF_PREPEND(&sc->wp_tx_pending_list,
sc 3216 dev/pci/if_san_xilinx.c (struct mbuf *)sc->tx_dma_mbuf);
sc 3217 dev/pci/if_san_xilinx.c sc->tx_dma_mbuf = NULL;
sc 3228 dev/pci/if_san_xilinx.c card->devname, sc->if_name);
sc 3232 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->dma_status, TX_BUSY);
sc 3233 dev/pci/if_san_xilinx.c if (!xilinx_dma_tx(card, sc)) {
sc 3284 dev/pci/if_san_xilinx.c xilinx_softc_t *sc = ifp->if_softc;
sc 3286 dev/pci/if_san_xilinx.c if (sc == NULL)
sc 3291 dev/pci/if_san_xilinx.c log(LOG_INFO, "%s: Setting idle_start to 0\n", sc->if_name);
sc 3293 dev/pci/if_san_xilinx.c bit_clear((u_int8_t *)&sc->idle_start, 0);
sc 3294 dev/pci/if_san_xilinx.c sc->common.ifp.pp_up(&sc->common.ifp);
sc 3296 dev/pci/if_san_xilinx.c sc->common.ifp.pp_down(&sc->common.ifp);
sc 3306 dev/pci/if_san_xilinx.c request_fifo_baddr_and_size(sdla_t *card, xilinx_softc_t *sc)
sc 3317 dev/pci/if_san_xilinx.c if (sc->num_of_time_slots == NUM_OF_T1_CHANNELS)
sc 3319 dev/pci/if_san_xilinx.c else if (sc->num_of_time_slots == 1)
sc 3321 dev/pci/if_san_xilinx.c else if (sc->num_of_time_slots == 2 ||
sc 3322 dev/pci/if_san_xilinx.c sc->num_of_time_slots == 3)
sc 3324 dev/pci/if_san_xilinx.c else if (sc->num_of_time_slots >= 4 &&
sc 3325 dev/pci/if_san_xilinx.c sc->num_of_time_slots <= 7)
sc 3327 dev/pci/if_san_xilinx.c else if (sc->num_of_time_slots >= 8 &&
sc 3328 dev/pci/if_san_xilinx.c sc->num_of_time_slots <= 15)
sc 3330 dev/pci/if_san_xilinx.c else if (sc->num_of_time_slots >= 16 &&
sc 3331 dev/pci/if_san_xilinx.c sc->num_of_time_slots <= 23)
sc 3335 dev/pci/if_san_xilinx.c card->devname, sc->num_of_time_slots);
sc 3339 dev/pci/if_san_xilinx.c if (sc->num_of_time_slots == (NUM_OF_E1_CHANNELS-1))
sc 3341 dev/pci/if_san_xilinx.c else if (sc->num_of_time_slots == 1)
sc 3343 dev/pci/if_san_xilinx.c else if (sc->num_of_time_slots == 2 ||
sc 3344 dev/pci/if_san_xilinx.c sc->num_of_time_slots == 3)
sc 3346 dev/pci/if_san_xilinx.c else if (sc->num_of_time_slots >= 4 &&
sc 3347 dev/pci/if_san_xilinx.c sc->num_of_time_slots <= 7)
sc 3349 dev/pci/if_san_xilinx.c else if (sc->num_of_time_slots >= 8 &&
sc 3350 dev/pci/if_san_xilinx.c sc->num_of_time_slots <= 15)
sc 3352 dev/pci/if_san_xilinx.c else if (sc->num_of_time_slots >= 16 &&
sc 3353 dev/pci/if_san_xilinx.c sc->num_of_time_slots <= 31)
sc 3358 dev/pci/if_san_xilinx.c card->devname, sc->if_name, sc->num_of_time_slots);
sc 3365 dev/pci/if_san_xilinx.c card->devname, sc->if_name, req_fifo_size, sc->num_of_time_slots);
sc 3368 dev/pci/if_san_xilinx.c &sc->fifo_base_addr);
sc 3370 dev/pci/if_san_xilinx.c if (fifo_size == 0 || sc->fifo_base_addr == 31) {
sc 3372 dev/pci/if_san_xilinx.c "or addr %d\n", card->devname, sc->if_name, fifo_size,
sc 3373 dev/pci/if_san_xilinx.c sc->fifo_base_addr);
sc 3379 dev/pci/if_san_xilinx.c card->devname, sc->if_name, req_fifo_size, sc->num_of_time_slots,
sc 3385 dev/pci/if_san_xilinx.c sc->fifo_size_code = fifo_code_vector[i];
sc 3392 dev/pci/if_san_xilinx.c "fifo %d got %d\n", card->devname, sc->if_name,
sc 3397 dev/pci/if_san_xilinx.c card->devname, sc->if_name, fifo_size, sc->num_of_time_slots,
sc 3398 dev/pci/if_san_xilinx.c sc->fifo_size_code, sc->fifo_base_addr);
sc 3400 dev/pci/if_san_xilinx.c sc->fifo_size = fifo_size;
sc 3443 dev/pci/if_san_xilinx.c free_fifo_baddr_and_size(sdla_t *card, xilinx_softc_t *sc)
sc 3448 dev/pci/if_san_xilinx.c for (i = 0; i < sc->fifo_size; i++)
sc 3453 dev/pci/if_san_xilinx.c reg << sc->fifo_base_addr, card->u.xilinx.fifo_addr_map);
sc 3455 dev/pci/if_san_xilinx.c card->u.xilinx.fifo_addr_map &= ~(reg << sc->fifo_base_addr);
sc 3462 dev/pci/if_san_xilinx.c sc->fifo_size = 0;
sc 3463 dev/pci/if_san_xilinx.c sc->fifo_base_addr = 0;
sc 109 dev/pci/if_sf_pci.c struct sf_softc *sc = &psc->sc_starfire;
sc 125 dev/pci/if_sf_pci.c reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname);
sc 133 dev/pci/if_sf_pci.c sc->sc_dev.dv_xname);
sc 162 dev/pci/if_sf_pci.c sc->sc_st = memt;
sc 163 dev/pci/if_sf_pci.c sc->sc_sh = memh;
sc 164 dev/pci/if_sf_pci.c sc->sc_iomapped = 0;
sc 166 dev/pci/if_sf_pci.c sc->sc_st = iot;
sc 167 dev/pci/if_sf_pci.c sc->sc_sh = ioh;
sc 168 dev/pci/if_sf_pci.c sc->sc_iomapped = 1;
sc 171 dev/pci/if_sf_pci.c sc->sc_dev.dv_xname);
sc 175 dev/pci/if_sf_pci.c sc->sc_dmat = pa->pa_dmat;
sc 186 dev/pci/if_sf_pci.c printf("%s: unable to map interrupt\n", sc->sc_dev.dv_xname);
sc 190 dev/pci/if_sf_pci.c psc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_NET, sf_intr, sc,
sc 194 dev/pci/if_sf_pci.c sc->sc_dev.dv_xname);
sc 204 dev/pci/if_sf_pci.c sf_attach(sc);
sc 160 dev/pci/if_sis.c #define SIS_SETBIT(sc, reg, x) \
sc 161 dev/pci/if_sis.c CSR_WRITE_4(sc, reg, \
sc 162 dev/pci/if_sis.c CSR_READ_4(sc, reg) | (x))
sc 164 dev/pci/if_sis.c #define SIS_CLRBIT(sc, reg, x) \
sc 165 dev/pci/if_sis.c CSR_WRITE_4(sc, reg, \
sc 166 dev/pci/if_sis.c CSR_READ_4(sc, reg) & ~(x))
sc 169 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_EECTL, CSR_READ_4(sc, SIS_EECTL) | x)
sc 172 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_EECTL, CSR_READ_4(sc, SIS_EECTL) & ~x)
sc 196 dev/pci/if_sis.c sis_delay(struct sis_softc *sc)
sc 201 dev/pci/if_sis.c CSR_READ_4(sc, SIS_CSR);
sc 205 dev/pci/if_sis.c sis_eeprom_idle(struct sis_softc *sc)
sc 210 dev/pci/if_sis.c sis_delay(sc);
sc 212 dev/pci/if_sis.c sis_delay(sc);
sc 216 dev/pci/if_sis.c sis_delay(sc);
sc 218 dev/pci/if_sis.c sis_delay(sc);
sc 222 dev/pci/if_sis.c sis_delay(sc);
sc 224 dev/pci/if_sis.c sis_delay(sc);
sc 225 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_EECTL, 0x00000000);
sc 232 dev/pci/if_sis.c sis_eeprom_putbyte(struct sis_softc *sc, int addr)
sc 246 dev/pci/if_sis.c sis_delay(sc);
sc 248 dev/pci/if_sis.c sis_delay(sc);
sc 250 dev/pci/if_sis.c sis_delay(sc);
sc 258 dev/pci/if_sis.c sis_eeprom_getword(struct sis_softc *sc, int addr, u_int16_t *dest)
sc 264 dev/pci/if_sis.c sis_eeprom_idle(sc);
sc 267 dev/pci/if_sis.c sis_delay(sc);
sc 269 dev/pci/if_sis.c sis_delay(sc);
sc 271 dev/pci/if_sis.c sis_delay(sc);
sc 276 dev/pci/if_sis.c sis_eeprom_putbyte(sc, addr);
sc 283 dev/pci/if_sis.c sis_delay(sc);
sc 284 dev/pci/if_sis.c if (CSR_READ_4(sc, SIS_EECTL) & SIS_EECTL_DOUT)
sc 286 dev/pci/if_sis.c sis_delay(sc);
sc 288 dev/pci/if_sis.c sis_delay(sc);
sc 292 dev/pci/if_sis.c sis_eeprom_idle(sc);
sc 301 dev/pci/if_sis.c sis_read_eeprom(struct sis_softc *sc, caddr_t dest,
sc 308 dev/pci/if_sis.c sis_eeprom_getword(sc, off + i, &word);
sc 319 dev/pci/if_sis.c sis_read_cmos(struct sis_softc *sc, struct pci_attach_args *pa,
sc 345 dev/pci/if_sis.c sis_read_mac(struct sis_softc *sc, struct pci_attach_args *pa)
sc 347 dev/pci/if_sis.c u_int16_t *enaddr = (u_int16_t *) &sc->arpcom.ac_enaddr;
sc 349 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_CSR, SIS_CSR_RELOAD);
sc 350 dev/pci/if_sis.c SIS_CLRBIT(sc, SIS_CSR, SIS_CSR_RELOAD);
sc 352 dev/pci/if_sis.c SIS_CLRBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ENABLE);
sc 354 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR0);
sc 355 dev/pci/if_sis.c enaddr[0] = CSR_READ_4(sc, SIS_RXFILT_DATA) & 0xffff;
sc 356 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR1);
sc 357 dev/pci/if_sis.c enaddr[1] = CSR_READ_4(sc, SIS_RXFILT_DATA) & 0xffff;
sc 358 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR2);
sc 359 dev/pci/if_sis.c enaddr[2] = CSR_READ_4(sc, SIS_RXFILT_DATA) & 0xffff;
sc 361 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ENABLE);
sc 365 dev/pci/if_sis.c sis_read96x_mac(struct sis_softc *sc)
sc 372 dev/pci/if_sis.c if ((CSR_READ_4(sc, SIS_EECTL) & SIS96x_EECTL_GNT)) {
sc 373 dev/pci/if_sis.c sis_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr,
sc 387 dev/pci/if_sis.c sis_mii_sync(struct sis_softc *sc)
sc 405 dev/pci/if_sis.c sis_mii_send(struct sis_softc *sc, u_int32_t bits, int cnt)
sc 427 dev/pci/if_sis.c sis_mii_readreg(struct sis_softc *sc, struct sis_mii_frame *frame)
sc 446 dev/pci/if_sis.c sis_mii_sync(sc);
sc 451 dev/pci/if_sis.c sis_mii_send(sc, frame->mii_stdelim, 2);
sc 452 dev/pci/if_sis.c sis_mii_send(sc, frame->mii_opcode, 2);
sc 453 dev/pci/if_sis.c sis_mii_send(sc, frame->mii_phyaddr, 5);
sc 454 dev/pci/if_sis.c sis_mii_send(sc, frame->mii_regaddr, 5);
sc 468 dev/pci/if_sis.c ack = CSR_READ_4(sc, SIS_EECTL) & SIS_MII_DATA;
sc 490 dev/pci/if_sis.c if (CSR_READ_4(sc, SIS_EECTL) & SIS_MII_DATA)
sc 516 dev/pci/if_sis.c sis_mii_writereg(struct sis_softc *sc, struct sis_mii_frame *frame)
sc 534 dev/pci/if_sis.c sis_mii_sync(sc);
sc 536 dev/pci/if_sis.c sis_mii_send(sc, frame->mii_stdelim, 2);
sc 537 dev/pci/if_sis.c sis_mii_send(sc, frame->mii_opcode, 2);
sc 538 dev/pci/if_sis.c sis_mii_send(sc, frame->mii_phyaddr, 5);
sc 539 dev/pci/if_sis.c sis_mii_send(sc, frame->mii_regaddr, 5);
sc 540 dev/pci/if_sis.c sis_mii_send(sc, frame->mii_turnaround, 2);
sc 541 dev/pci/if_sis.c sis_mii_send(sc, frame->mii_data, 16);
sc 562 dev/pci/if_sis.c struct sis_softc *sc = (struct sis_softc *)self;
sc 565 dev/pci/if_sis.c if (sc->sis_type == SIS_TYPE_83815) {
sc 578 dev/pci/if_sis.c if (!CSR_READ_4(sc, NS_BMSR))
sc 580 dev/pci/if_sis.c return CSR_READ_4(sc, NS_BMCR + (reg * 4));
sc 588 dev/pci/if_sis.c if (sc->sis_type == SIS_TYPE_900 &&
sc 589 dev/pci/if_sis.c sc->sis_rev < SIS_REV_635) {
sc 595 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_PHYCTL,
sc 597 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_PHYCTL, SIS_PHYCTL_ACCESS);
sc 600 dev/pci/if_sis.c if (!(CSR_READ_4(sc, SIS_PHYCTL) & SIS_PHYCTL_ACCESS))
sc 606 dev/pci/if_sis.c sc->sc_dev.dv_xname);
sc 610 dev/pci/if_sis.c val = (CSR_READ_4(sc, SIS_PHYCTL) >> 16) & 0xFFFF;
sc 621 dev/pci/if_sis.c sis_mii_readreg(sc, &frame);
sc 630 dev/pci/if_sis.c struct sis_softc *sc = (struct sis_softc *)self;
sc 633 dev/pci/if_sis.c if (sc->sis_type == SIS_TYPE_83815) {
sc 636 dev/pci/if_sis.c CSR_WRITE_4(sc, NS_BMCR + (reg * 4), data);
sc 645 dev/pci/if_sis.c if (sc->sis_type == SIS_TYPE_900 &&
sc 646 dev/pci/if_sis.c sc->sis_rev < SIS_REV_635) {
sc 652 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_PHYCTL, (data << 16) | (phy << 11) |
sc 654 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_PHYCTL, SIS_PHYCTL_ACCESS);
sc 657 dev/pci/if_sis.c if (!(CSR_READ_4(sc, SIS_PHYCTL) & SIS_PHYCTL_ACCESS))
sc 663 dev/pci/if_sis.c sc->sc_dev.dv_xname);
sc 670 dev/pci/if_sis.c sis_mii_writereg(sc, &frame);
sc 677 dev/pci/if_sis.c struct sis_softc *sc = (struct sis_softc *)self;
sc 679 dev/pci/if_sis.c sis_init(sc);
sc 683 dev/pci/if_sis.c sis_mchash(struct sis_softc *sc, const uint8_t *addr)
sc 696 dev/pci/if_sis.c if (sc->sis_type == SIS_TYPE_83815)
sc 698 dev/pci/if_sis.c else if (sc->sis_rev >= SIS_REV_635 ||
sc 699 dev/pci/if_sis.c sc->sis_rev == SIS_REV_900B)
sc 706 dev/pci/if_sis.c sis_setmulti(struct sis_softc *sc)
sc 708 dev/pci/if_sis.c if (sc->sis_type == SIS_TYPE_83815)
sc 709 dev/pci/if_sis.c sis_setmulti_ns(sc);
sc 711 dev/pci/if_sis.c sis_setmulti_sis(sc);
sc 715 dev/pci/if_sis.c sis_setmulti_ns(struct sis_softc *sc)
sc 718 dev/pci/if_sis.c struct arpcom *ac = &sc->arpcom;
sc 724 dev/pci/if_sis.c ifp = &sc->arpcom.ac_if;
sc 728 dev/pci/if_sis.c SIS_CLRBIT(sc, SIS_RXFILT_CTL, NS_RXFILTCTL_MCHASH);
sc 729 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ALLMULTI);
sc 746 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_RXFILT_CTL, NS_RXFILTCTL_MCHASH);
sc 747 dev/pci/if_sis.c SIS_CLRBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ALLMULTI);
sc 749 dev/pci/if_sis.c filtsave = CSR_READ_4(sc, SIS_RXFILT_CTL);
sc 753 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_FMEM_LO + (i*2));
sc 754 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_DATA, 0);
sc 759 dev/pci/if_sis.c h = sis_mchash(sc, enm->enm_addrlo);
sc 762 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_FMEM_LO + index);
sc 765 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_RXFILT_DATA, (1 << bit));
sc 769 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_CTL, filtsave);
sc 773 dev/pci/if_sis.c sis_setmulti_sis(struct sis_softc *sc)
sc 776 dev/pci/if_sis.c struct arpcom *ac = &sc->arpcom;
sc 782 dev/pci/if_sis.c ifp = &sc->arpcom.ac_if;
sc 785 dev/pci/if_sis.c if (sc->sis_rev >= SIS_REV_635 ||
sc 786 dev/pci/if_sis.c sc->sis_rev == SIS_REV_900B)
sc 791 dev/pci/if_sis.c ctl = CSR_READ_4(sc, SIS_RXFILT_CTL) & SIS_RXFILTCTL_ENABLE;
sc 814 dev/pci/if_sis.c h = sis_mchash(sc, enm->enm_addrlo);
sc 827 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_CTL, (4 + i) << 16);
sc 828 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_DATA, hashes[i]);
sc 831 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_CTL, ctl);
sc 835 dev/pci/if_sis.c sis_setpromisc(struct sis_softc *sc)
sc 837 dev/pci/if_sis.c struct ifnet *ifp = ifp = &sc->arpcom.ac_if;
sc 841 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ALLPHYS);
sc 843 dev/pci/if_sis.c SIS_CLRBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ALLPHYS);
sc 847 dev/pci/if_sis.c sis_reset(struct sis_softc *sc)
sc 851 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_CSR, SIS_CSR_RESET);
sc 854 dev/pci/if_sis.c if (!(CSR_READ_4(sc, SIS_CSR) & SIS_CSR_RESET))
sc 859 dev/pci/if_sis.c printf("%s: reset never completed\n", sc->sc_dev.dv_xname);
sc 868 dev/pci/if_sis.c if (sc->sis_type == SIS_TYPE_83815) {
sc 869 dev/pci/if_sis.c CSR_WRITE_4(sc, NS_CLKRUN, NS_CLKRUN_PMESTS);
sc 870 dev/pci/if_sis.c CSR_WRITE_4(sc, NS_CLKRUN, 0);
sc 895 dev/pci/if_sis.c struct sis_softc *sc = (struct sis_softc *)self;
sc 902 dev/pci/if_sis.c sc->sis_stopped = 1;
sc 921 dev/pci/if_sis.c sc->sc_dev.dv_xname, command & SIS_PSTATE_MASK);
sc 938 dev/pci/if_sis.c &sc->sis_btag, &sc->sis_bhandle, NULL, &size, 0)) {
sc 944 dev/pci/if_sis.c &sc->sis_btag, &sc->sis_bhandle, NULL, &size, 0)) {
sc 956 dev/pci/if_sis.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, sis_intr, sc,
sc 958 dev/pci/if_sis.c if (sc->sc_ih == NULL) {
sc 968 dev/pci/if_sis.c sc->sis_type = SIS_TYPE_900;
sc 971 dev/pci/if_sis.c sc->sis_type = SIS_TYPE_7016;
sc 974 dev/pci/if_sis.c sc->sis_type = SIS_TYPE_83815;
sc 979 dev/pci/if_sis.c sc->sis_rev = PCI_REVISION(pa->pa_class);
sc 982 dev/pci/if_sis.c sis_reset(sc);
sc 984 dev/pci/if_sis.c if (sc->sis_type == SIS_TYPE_900 &&
sc 985 dev/pci/if_sis.c (sc->sis_rev == SIS_REV_635 ||
sc 986 dev/pci/if_sis.c sc->sis_rev == SIS_REV_900B)) {
sc 996 dev/pci/if_sis.c sc->sis_srr = CSR_READ_4(sc, NS_SRR);
sc 998 dev/pci/if_sis.c if (sc->sis_srr == NS_SRR_15C)
sc 1000 dev/pci/if_sis.c else if (sc->sis_srr == NS_SRR_15D)
sc 1002 dev/pci/if_sis.c else if (sc->sis_srr == NS_SRR_16A)
sc 1005 dev/pci/if_sis.c printf(", srr %x", sc->sis_srr);
sc 1022 dev/pci/if_sis.c sis_read_eeprom(sc, (caddr_t)&tmp, NS_EE_NODEADDR,4,0);
sc 1037 dev/pci/if_sis.c bcopy((char *)&tmp[1], sc->arpcom.ac_enaddr,
sc 1059 dev/pci/if_sis.c if (sc->sis_rev == SIS_REV_630S ||
sc 1060 dev/pci/if_sis.c sc->sis_rev == SIS_REV_630E)
sc 1061 dev/pci/if_sis.c sis_read_cmos(sc, pa, (caddr_t)&sc->arpcom.ac_enaddr,
sc 1065 dev/pci/if_sis.c if (sc->sis_rev == SIS_REV_96x)
sc 1066 dev/pci/if_sis.c sis_read96x_mac(sc);
sc 1067 dev/pci/if_sis.c else if (sc->sis_rev == SIS_REV_635 ||
sc 1068 dev/pci/if_sis.c sc->sis_rev == SIS_REV_630ET ||
sc 1069 dev/pci/if_sis.c sc->sis_rev == SIS_REV_630EA1)
sc 1070 dev/pci/if_sis.c sis_read_mac(sc, pa);
sc 1072 dev/pci/if_sis.c sis_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr,
sc 1078 dev/pci/if_sis.c ether_sprintf(sc->arpcom.ac_enaddr));
sc 1080 dev/pci/if_sis.c sc->sc_dmat = pa->pa_dmat;
sc 1082 dev/pci/if_sis.c if (bus_dmamem_alloc(sc->sc_dmat, sizeof(struct sis_list_data),
sc 1083 dev/pci/if_sis.c PAGE_SIZE, 0, sc->sc_listseg, 1, &sc->sc_listnseg,
sc 1088 dev/pci/if_sis.c if (bus_dmamem_map(sc->sc_dmat, sc->sc_listseg, sc->sc_listnseg,
sc 1089 dev/pci/if_sis.c sizeof(struct sis_list_data), &sc->sc_listkva,
sc 1094 dev/pci/if_sis.c if (bus_dmamap_create(sc->sc_dmat, sizeof(struct sis_list_data), 1,
sc 1096 dev/pci/if_sis.c &sc->sc_listmap) != 0) {
sc 1100 dev/pci/if_sis.c if (bus_dmamap_load(sc->sc_dmat, sc->sc_listmap, sc->sc_listkva,
sc 1105 dev/pci/if_sis.c sc->sis_ldata = (struct sis_list_data *)sc->sc_listkva;
sc 1106 dev/pci/if_sis.c bzero(sc->sis_ldata, sizeof(struct sis_list_data));
sc 1109 dev/pci/if_sis.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0,
sc 1110 dev/pci/if_sis.c BUS_DMA_NOWAIT, &sc->sis_ldata->sis_rx_list[i].map) != 0) {
sc 1115 dev/pci/if_sis.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 0,
sc 1116 dev/pci/if_sis.c BUS_DMA_NOWAIT, &sc->sc_rx_sparemap) != 0) {
sc 1122 dev/pci/if_sis.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 1124 dev/pci/if_sis.c &sc->sis_ldata->sis_tx_list[i].map) != 0) {
sc 1129 dev/pci/if_sis.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, SIS_TX_LIST_CNT - 3,
sc 1130 dev/pci/if_sis.c MCLBYTES, 0, BUS_DMA_NOWAIT, &sc->sc_tx_sparemap) != 0) {
sc 1135 dev/pci/if_sis.c timeout_set(&sc->sis_timeout, sis_tick, sc);
sc 1137 dev/pci/if_sis.c ifp = &sc->arpcom.ac_if;
sc 1138 dev/pci/if_sis.c ifp->if_softc = sc;
sc 1146 dev/pci/if_sis.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 1150 dev/pci/if_sis.c sc->sc_mii.mii_ifp = ifp;
sc 1151 dev/pci/if_sis.c sc->sc_mii.mii_readreg = sis_miibus_readreg;
sc 1152 dev/pci/if_sis.c sc->sc_mii.mii_writereg = sis_miibus_writereg;
sc 1153 dev/pci/if_sis.c sc->sc_mii.mii_statchg = sis_miibus_statchg;
sc 1154 dev/pci/if_sis.c ifmedia_init(&sc->sc_mii.mii_media, 0, sis_ifmedia_upd,sis_ifmedia_sts);
sc 1155 dev/pci/if_sis.c mii_attach(self, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY,
sc 1157 dev/pci/if_sis.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 1158 dev/pci/if_sis.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
sc 1159 dev/pci/if_sis.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
sc 1161 dev/pci/if_sis.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 1169 dev/pci/if_sis.c shutdownhook_establish(sis_shutdown, sc);
sc 1173 dev/pci/if_sis.c pci_intr_disestablish(pc, sc->sc_ih);
sc 1176 dev/pci/if_sis.c bus_space_unmap(sc->sis_btag, sc->sis_bhandle, size);
sc 1185 dev/pci/if_sis.c sis_ring_init(struct sis_softc *sc)
sc 1191 dev/pci/if_sis.c cd = &sc->sis_cdata;
sc 1192 dev/pci/if_sis.c ld = sc->sis_ldata;
sc 1200 dev/pci/if_sis.c ld->sis_tx_list[i].sis_next = sc->sc_listmap->dm_segs[0].ds_addr +
sc 1209 dev/pci/if_sis.c if (sc->arpcom.ac_if.if_flags & IFF_UP)
sc 1210 dev/pci/if_sis.c sc->sc_rxbufs = SIS_RX_LIST_CNT_MAX;
sc 1212 dev/pci/if_sis.c sc->sc_rxbufs = SIS_RX_LIST_CNT_MIN;
sc 1214 dev/pci/if_sis.c for (i = 0; i < sc->sc_rxbufs; i++) {
sc 1215 dev/pci/if_sis.c error = sis_newbuf(sc, &ld->sis_rx_list[i], NULL);
sc 1218 dev/pci/if_sis.c if (i == (sc->sc_rxbufs - 1))
sc 1223 dev/pci/if_sis.c ld->sis_rx_list[i].sis_next = sc->sc_listmap->dm_segs[0].ds_addr +
sc 1236 dev/pci/if_sis.c sis_newbuf(struct sis_softc *sc, struct sis_desc *c, struct mbuf *m)
sc 1261 dev/pci/if_sis.c if (bus_dmamap_load(sc->sc_dmat, sc->sc_rx_sparemap,
sc 1263 dev/pci/if_sis.c printf("%s: rx load failed\n", sc->sc_dev.dv_xname);
sc 1268 dev/pci/if_sis.c c->map = sc->sc_rx_sparemap;
sc 1269 dev/pci/if_sis.c sc->sc_rx_sparemap = map;
sc 1271 dev/pci/if_sis.c bus_dmamap_sync(sc->sc_dmat, c->map, 0, c->map->dm_mapsize,
sc 1280 dev/pci/if_sis.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 1281 dev/pci/if_sis.c ((caddr_t)c - sc->sc_listkva), sizeof(struct sis_desc),
sc 1292 dev/pci/if_sis.c sis_rxeof(struct sis_softc *sc)
sc 1300 dev/pci/if_sis.c ifp = &sc->arpcom.ac_if;
sc 1302 dev/pci/if_sis.c for(cur_rx = sc->sis_cdata.sis_rx_pdsc; SIS_OWNDESC(cur_rx);
sc 1305 dev/pci/if_sis.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 1306 dev/pci/if_sis.c ((caddr_t)cur_rx - sc->sc_listkva),
sc 1325 dev/pci/if_sis.c sis_newbuf(sc, cur_rx, m);
sc 1330 dev/pci/if_sis.c bus_dmamap_sync(sc->sc_dmat, cur_rx->map, 0,
sc 1342 dev/pci/if_sis.c if (sis_newbuf(sc, cur_rx, NULL) == 0) {
sc 1351 dev/pci/if_sis.c sis_newbuf(sc, cur_rx, m);
sc 1371 dev/pci/if_sis.c sc->sis_cdata.sis_rx_pdsc = cur_rx;
sc 1375 dev/pci/if_sis.c sis_rxeoc(struct sis_softc *sc)
sc 1377 dev/pci/if_sis.c sis_rxeof(sc);
sc 1378 dev/pci/if_sis.c sis_init(sc);
sc 1387 dev/pci/if_sis.c sis_txeof(struct sis_softc *sc)
sc 1392 dev/pci/if_sis.c ifp = &sc->arpcom.ac_if;
sc 1398 dev/pci/if_sis.c for (idx = sc->sis_cdata.sis_tx_cons; sc->sis_cdata.sis_tx_cnt > 0;
sc 1399 dev/pci/if_sis.c sc->sis_cdata.sis_tx_cnt--, SIS_INC(idx, SIS_TX_LIST_CNT)) {
sc 1400 dev/pci/if_sis.c struct sis_desc *cur_tx = &sc->sis_ldata->sis_tx_list[idx];
sc 1402 dev/pci/if_sis.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 1403 dev/pci/if_sis.c ((caddr_t)cur_tx - sc->sc_listkva),
sc 1428 dev/pci/if_sis.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 1430 dev/pci/if_sis.c bus_dmamap_unload(sc->sc_dmat, map);
sc 1438 dev/pci/if_sis.c if (idx != sc->sis_cdata.sis_tx_cons) {
sc 1440 dev/pci/if_sis.c sc->sis_cdata.sis_tx_cons = idx;
sc 1444 dev/pci/if_sis.c ifp->if_timer = (sc->sis_cdata.sis_tx_cnt == 0) ? 0 : 5;
sc 1450 dev/pci/if_sis.c struct sis_softc *sc = (struct sis_softc *)xsc;
sc 1457 dev/pci/if_sis.c ifp = &sc->arpcom.ac_if;
sc 1459 dev/pci/if_sis.c mii = &sc->sc_mii;
sc 1462 dev/pci/if_sis.c if (!sc->sis_link && mii->mii_media_status & IFM_ACTIVE &&
sc 1464 dev/pci/if_sis.c sc->sis_link++;
sc 1468 dev/pci/if_sis.c timeout_add(&sc->sis_timeout, hz);
sc 1476 dev/pci/if_sis.c struct sis_softc *sc;
sc 1481 dev/pci/if_sis.c sc = arg;
sc 1482 dev/pci/if_sis.c ifp = &sc->arpcom.ac_if;
sc 1484 dev/pci/if_sis.c if (sc->sis_stopped) /* Most likely shared interrupt */
sc 1488 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_IER, 0);
sc 1492 dev/pci/if_sis.c status = CSR_READ_4(sc, SIS_ISR);
sc 1502 dev/pci/if_sis.c sis_txeof(sc);
sc 1507 dev/pci/if_sis.c sis_rxeof(sc);
sc 1510 dev/pci/if_sis.c sis_rxeoc(sc);
sc 1514 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_CSR, SIS_CSR_RX_ENABLE);
sc 1518 dev/pci/if_sis.c sis_reset(sc);
sc 1519 dev/pci/if_sis.c sis_init(sc);
sc 1524 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_IER, 1);
sc 1530 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_CSR, SIS_CSR_RX_ENABLE);
sc 1543 dev/pci/if_sis.c sis_encap(struct sis_softc *sc, struct mbuf *m_head, u_int32_t *txidx)
sc 1549 dev/pci/if_sis.c map = sc->sc_tx_sparemap;
sc 1550 dev/pci/if_sis.c if (bus_dmamap_load_mbuf(sc->sc_dmat, map,
sc 1562 dev/pci/if_sis.c if ((SIS_TX_LIST_CNT - (sc->sis_cdata.sis_tx_cnt + i)) < 2)
sc 1564 dev/pci/if_sis.c f = &sc->sis_ldata->sis_tx_list[frag];
sc 1573 dev/pci/if_sis.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 1576 dev/pci/if_sis.c sc->sis_ldata->sis_tx_list[cur].sis_mbuf = m_head;
sc 1577 dev/pci/if_sis.c sc->sis_ldata->sis_tx_list[cur].sis_ctl &= ~SIS_CMDSTS_MORE;
sc 1578 dev/pci/if_sis.c sc->sis_ldata->sis_tx_list[*txidx].sis_ctl |= SIS_CMDSTS_OWN;
sc 1579 dev/pci/if_sis.c sc->sis_cdata.sis_tx_cnt += i;
sc 1582 dev/pci/if_sis.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 1600 dev/pci/if_sis.c struct sis_softc *sc;
sc 1604 dev/pci/if_sis.c sc = ifp->if_softc;
sc 1606 dev/pci/if_sis.c if (!sc->sis_link)
sc 1609 dev/pci/if_sis.c idx = sc->sis_cdata.sis_tx_prod;
sc 1614 dev/pci/if_sis.c while(sc->sis_ldata->sis_tx_list[idx].sis_mbuf == NULL) {
sc 1619 dev/pci/if_sis.c if (sis_encap(sc, m_head, &idx)) {
sc 1641 dev/pci/if_sis.c sc->sis_cdata.sis_tx_prod = idx;
sc 1642 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_CSR, SIS_CSR_TX_ENABLE);
sc 1654 dev/pci/if_sis.c struct sis_softc *sc = (struct sis_softc *)xsc;
sc 1655 dev/pci/if_sis.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 1664 dev/pci/if_sis.c sis_stop(sc);
sc 1668 dev/pci/if_sis.c if (sc->sis_type == SIS_TYPE_83815 && sc->sis_srr == NS_SRR_16A)
sc 1669 dev/pci/if_sis.c CSR_WRITE_4(sc, NS_IHR, NS_IHR_VALUE);
sc 1672 dev/pci/if_sis.c mii = &sc->sc_mii;
sc 1675 dev/pci/if_sis.c if (sc->sis_type == SIS_TYPE_83815) {
sc 1676 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_PAR0);
sc 1677 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_DATA,
sc 1678 dev/pci/if_sis.c ((u_int16_t *)sc->arpcom.ac_enaddr)[0]);
sc 1679 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_PAR1);
sc 1680 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_DATA,
sc 1681 dev/pci/if_sis.c ((u_int16_t *)sc->arpcom.ac_enaddr)[1]);
sc 1682 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_CTL, NS_FILTADDR_PAR2);
sc 1683 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_DATA,
sc 1684 dev/pci/if_sis.c ((u_int16_t *)sc->arpcom.ac_enaddr)[2]);
sc 1686 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR0);
sc 1687 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_DATA,
sc 1688 dev/pci/if_sis.c ((u_int16_t *)sc->arpcom.ac_enaddr)[0]);
sc 1689 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR1);
sc 1690 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_DATA,
sc 1691 dev/pci/if_sis.c ((u_int16_t *)sc->arpcom.ac_enaddr)[1]);
sc 1692 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_CTL, SIS_FILTADDR_PAR2);
sc 1693 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RXFILT_DATA,
sc 1694 dev/pci/if_sis.c ((u_int16_t *)sc->arpcom.ac_enaddr)[2]);
sc 1698 dev/pci/if_sis.c if (sis_ring_init(sc) != 0) {
sc 1700 dev/pci/if_sis.c sc->sc_dev.dv_xname);
sc 1701 dev/pci/if_sis.c sis_stop(sc);
sc 1713 dev/pci/if_sis.c if (sc->sis_type == SIS_TYPE_83815 && sc->sis_srr <= NS_SRR_15D) {
sc 1714 dev/pci/if_sis.c CSR_WRITE_4(sc, NS_PHY_PAGE, 0x0001);
sc 1715 dev/pci/if_sis.c CSR_WRITE_4(sc, NS_PHY_CR, 0x189C);
sc 1716 dev/pci/if_sis.c if (sc->sis_srr == NS_SRR_15C) {
sc 1718 dev/pci/if_sis.c CSR_WRITE_4(sc, NS_PHY_TDATA, 0x0000);
sc 1720 dev/pci/if_sis.c CSR_WRITE_4(sc, NS_PHY_DSPCFG, 0x5040);
sc 1722 dev/pci/if_sis.c CSR_WRITE_4(sc, NS_PHY_SDCFG, 0x008C);
sc 1724 dev/pci/if_sis.c CSR_WRITE_4(sc, NS_PHY_PAGE, 0);
sc 1733 dev/pci/if_sis.c if (sc->sis_type == SIS_TYPE_83815) {
sc 1734 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_RXFILT_CTL, NS_RXFILTCTL_ARP);
sc 1735 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_RXFILT_CTL, NS_RXFILTCTL_PERFECT);
sc 1742 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_BROAD);
sc 1744 dev/pci/if_sis.c SIS_CLRBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_BROAD);
sc 1747 dev/pci/if_sis.c sis_setpromisc(sc);
sc 1752 dev/pci/if_sis.c sis_setmulti(sc);
sc 1755 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_RXFILT_CTL, SIS_RXFILTCTL_ENABLE);
sc 1760 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RX_LISTPTR, sc->sc_listmap->dm_segs[0].ds_addr +
sc 1762 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_TX_LISTPTR, sc->sc_listmap->dm_segs[0].ds_addr +
sc 1769 dev/pci/if_sis.c if (CSR_READ_4(sc, SIS_CFG) & SIS_CFG_EDB_MASTER_EN)
sc 1770 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RX_CFG, SIS_RXCFG64);
sc 1772 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RX_CFG, SIS_RXCFG256);
sc 1775 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_RX_CFG, SIS_RXCFG_RX_JABBER);
sc 1779 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_TX_CFG, SIS_TXCFG_10);
sc 1781 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_TX_CFG, SIS_TXCFG_100);
sc 1785 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_TX_CFG,
sc 1787 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_RX_CFG, SIS_RXCFG_RX_TXPKTS);
sc 1789 dev/pci/if_sis.c SIS_CLRBIT(sc, SIS_TX_CFG,
sc 1791 dev/pci/if_sis.c SIS_CLRBIT(sc, SIS_RX_CFG, SIS_RXCFG_RX_TXPKTS);
sc 1794 dev/pci/if_sis.c if (sc->sis_type == SIS_TYPE_83815 && sc->sis_srr >= NS_SRR_16A) {
sc 1799 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_TX_CFG, SIS_TXCFG_MPII03D);
sc 1802 dev/pci/if_sis.c if (sc->sis_type == SIS_TYPE_83815 && sc->sis_srr < NS_SRR_16A &&
sc 1809 dev/pci/if_sis.c CSR_WRITE_4(sc, NS_PHY_PAGE, 0x0001);
sc 1810 dev/pci/if_sis.c reg = CSR_READ_4(sc, NS_PHY_DSPCFG) & 0xfff;
sc 1811 dev/pci/if_sis.c CSR_WRITE_4(sc, NS_PHY_DSPCFG, reg | 0x1000);
sc 1813 dev/pci/if_sis.c reg = CSR_READ_4(sc, NS_PHY_TDATA) & 0xff;
sc 1817 dev/pci/if_sis.c sc->sc_dev.dv_xname, reg);
sc 1819 dev/pci/if_sis.c CSR_WRITE_4(sc, NS_PHY_TDATA, 0x00e8);
sc 1820 dev/pci/if_sis.c reg = CSR_READ_4(sc, NS_PHY_DSPCFG);
sc 1821 dev/pci/if_sis.c SIS_SETBIT(sc, NS_PHY_DSPCFG, reg | 0x20);
sc 1823 dev/pci/if_sis.c CSR_WRITE_4(sc, NS_PHY_PAGE, 0);
sc 1829 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_IMR, SIS_INTRS);
sc 1830 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_IER, 1);
sc 1833 dev/pci/if_sis.c SIS_CLRBIT(sc, SIS_CSR, SIS_CSR_TX_DISABLE|SIS_CSR_RX_DISABLE);
sc 1834 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_CSR, SIS_CSR_RX_ENABLE);
sc 1840 dev/pci/if_sis.c sc->sis_stopped = 0;
sc 1846 dev/pci/if_sis.c timeout_add(&sc->sis_timeout, hz);
sc 1855 dev/pci/if_sis.c struct sis_softc *sc;
sc 1858 dev/pci/if_sis.c sc = ifp->if_softc;
sc 1860 dev/pci/if_sis.c mii = &sc->sc_mii;
sc 1861 dev/pci/if_sis.c sc->sis_link = 0;
sc 1878 dev/pci/if_sis.c struct sis_softc *sc;
sc 1881 dev/pci/if_sis.c sc = ifp->if_softc;
sc 1883 dev/pci/if_sis.c mii = &sc->sc_mii;
sc 1892 dev/pci/if_sis.c struct sis_softc *sc = ifp->if_softc;
sc 1900 dev/pci/if_sis.c if ((error = ether_ioctl(ifp, &sc->arpcom, command, data)) > 0) {
sc 1909 dev/pci/if_sis.c sis_init(sc);
sc 1912 dev/pci/if_sis.c arp_ifinit(&sc->arpcom, ifa);
sc 1918 dev/pci/if_sis.c (ifp->if_flags ^ sc->sc_if_flags) &
sc 1920 dev/pci/if_sis.c sis_setpromisc(sc);
sc 1921 dev/pci/if_sis.c sis_setmulti(sc);
sc 1923 dev/pci/if_sis.c (ifp->if_flags ^ sc->sc_if_flags) &
sc 1925 dev/pci/if_sis.c sis_setmulti(sc);
sc 1928 dev/pci/if_sis.c sis_init(sc);
sc 1932 dev/pci/if_sis.c sis_stop(sc);
sc 1934 dev/pci/if_sis.c sc->sc_if_flags = ifp->if_flags;
sc 1945 dev/pci/if_sis.c ether_addmulti(ifr, &sc->arpcom) :
sc 1946 dev/pci/if_sis.c ether_delmulti(ifr, &sc->arpcom);
sc 1954 dev/pci/if_sis.c sis_setmulti(sc);
sc 1960 dev/pci/if_sis.c mii = &sc->sc_mii;
sc 1976 dev/pci/if_sis.c struct sis_softc *sc;
sc 1979 dev/pci/if_sis.c sc = ifp->if_softc;
sc 1981 dev/pci/if_sis.c if (sc->sis_stopped)
sc 1985 dev/pci/if_sis.c printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
sc 1988 dev/pci/if_sis.c sis_stop(sc);
sc 1989 dev/pci/if_sis.c sis_reset(sc);
sc 1990 dev/pci/if_sis.c sis_init(sc);
sc 2003 dev/pci/if_sis.c sis_stop(struct sis_softc *sc)
sc 2008 dev/pci/if_sis.c if (sc->sis_stopped)
sc 2011 dev/pci/if_sis.c ifp = &sc->arpcom.ac_if;
sc 2014 dev/pci/if_sis.c timeout_del(&sc->sis_timeout);
sc 2017 dev/pci/if_sis.c sc->sis_stopped = 1;
sc 2019 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_IER, 0);
sc 2020 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_IMR, 0);
sc 2021 dev/pci/if_sis.c CSR_READ_4(sc, SIS_ISR); /* clear any interrupts already pending */
sc 2022 dev/pci/if_sis.c SIS_SETBIT(sc, SIS_CSR, SIS_CSR_TX_DISABLE|SIS_CSR_RX_DISABLE);
sc 2024 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_TX_LISTPTR, 0);
sc 2025 dev/pci/if_sis.c CSR_WRITE_4(sc, SIS_RX_LISTPTR, 0);
sc 2027 dev/pci/if_sis.c sc->sis_link = 0;
sc 2033 dev/pci/if_sis.c if (sc->sis_ldata->sis_rx_list[i].map->dm_nsegs != 0) {
sc 2034 dev/pci/if_sis.c bus_dmamap_t map = sc->sis_ldata->sis_rx_list[i].map;
sc 2036 dev/pci/if_sis.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 2038 dev/pci/if_sis.c bus_dmamap_unload(sc->sc_dmat, map);
sc 2040 dev/pci/if_sis.c if (sc->sis_ldata->sis_rx_list[i].sis_mbuf != NULL) {
sc 2041 dev/pci/if_sis.c m_freem(sc->sis_ldata->sis_rx_list[i].sis_mbuf);
sc 2042 dev/pci/if_sis.c sc->sis_ldata->sis_rx_list[i].sis_mbuf = NULL;
sc 2044 dev/pci/if_sis.c bzero((char *)&sc->sis_ldata->sis_rx_list[i],
sc 2052 dev/pci/if_sis.c if (sc->sis_ldata->sis_tx_list[i].map->dm_nsegs != 0) {
sc 2053 dev/pci/if_sis.c bus_dmamap_t map = sc->sis_ldata->sis_tx_list[i].map;
sc 2055 dev/pci/if_sis.c bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
sc 2057 dev/pci/if_sis.c bus_dmamap_unload(sc->sc_dmat, map);
sc 2059 dev/pci/if_sis.c if (sc->sis_ldata->sis_tx_list[i].sis_mbuf != NULL) {
sc 2060 dev/pci/if_sis.c m_freem(sc->sis_ldata->sis_tx_list[i].sis_mbuf);
sc 2061 dev/pci/if_sis.c sc->sis_ldata->sis_tx_list[i].sis_mbuf = NULL;
sc 2063 dev/pci/if_sis.c bzero((char *)&sc->sis_ldata->sis_tx_list[i],
sc 2075 dev/pci/if_sis.c struct sis_softc *sc = (struct sis_softc *)v;
sc 2077 dev/pci/if_sis.c sis_stop(sc);
sc 470 dev/pci/if_sisreg.h #define CSR_WRITE_4(sc, reg, val) \
sc 471 dev/pci/if_sisreg.h bus_space_write_4(sc->sis_btag, sc->sis_bhandle, reg, val)
sc 473 dev/pci/if_sisreg.h #define CSR_READ_4(sc, reg) \
sc 474 dev/pci/if_sisreg.h bus_space_read_4(sc->sis_btag, sc->sis_bhandle, reg)
sc 212 dev/pci/if_sk.c sk_win_read_4(struct sk_softc *sc, u_int32_t reg)
sc 214 dev/pci/if_sk.c return CSR_READ_4(sc, reg);
sc 218 dev/pci/if_sk.c sk_win_read_2(struct sk_softc *sc, u_int32_t reg)
sc 220 dev/pci/if_sk.c return CSR_READ_2(sc, reg);
sc 224 dev/pci/if_sk.c sk_win_read_1(struct sk_softc *sc, u_int32_t reg)
sc 226 dev/pci/if_sk.c return CSR_READ_1(sc, reg);
sc 230 dev/pci/if_sk.c sk_win_write_4(struct sk_softc *sc, u_int32_t reg, u_int32_t x)
sc 232 dev/pci/if_sk.c CSR_WRITE_4(sc, reg, x);
sc 236 dev/pci/if_sk.c sk_win_write_2(struct sk_softc *sc, u_int32_t reg, u_int16_t x)
sc 238 dev/pci/if_sk.c CSR_WRITE_2(sc, reg, x);
sc 242 dev/pci/if_sk.c sk_win_write_1(struct sk_softc *sc, u_int32_t reg, u_int8_t x)
sc 244 dev/pci/if_sk.c CSR_WRITE_1(sc, reg, x);
sc 432 dev/pci/if_sk.c struct sk_softc *sc = sc_if->sk_softc;
sc 442 dev/pci/if_sk.c switch(sc->sk_type) {
sc 480 dev/pci/if_sk.c if (SK_IS_GENESIS(sc) && i < XM_RXFILT_MAX) {
sc 485 dev/pci/if_sk.c switch(sc->sk_type) {
sc 506 dev/pci/if_sk.c switch(sc->sk_type) {
sc 527 dev/pci/if_sk.c struct sk_softc *sc = sc_if->sk_softc;
sc 530 dev/pci/if_sk.c switch(sc->sk_type) {
sc 592 dev/pci/if_sk.c struct sk_softc *sc = sc_if->sk_softc;
sc 612 dev/pci/if_sk.c if (bus_dmamap_create(sc->sc_dmatag, SK_JLEN, SK_NTXSEG,
sc 618 dev/pci/if_sk.c bus_dmamap_destroy(sc->sc_dmatag, dmamap);
sc 694 dev/pci/if_sk.c struct sk_softc *sc = sc_if->sk_softc;
sc 703 dev/pci/if_sk.c if (bus_dmamem_alloc(sc->sc_dmatag, SK_JMEM, PAGE_SIZE, 0,
sc 710 dev/pci/if_sk.c if (bus_dmamem_map(sc->sc_dmatag, &seg, rseg, SK_JMEM, &kva,
sc 718 dev/pci/if_sk.c if (bus_dmamap_create(sc->sc_dmatag, SK_JMEM, 1, SK_JMEM, 0,
sc 726 dev/pci/if_sk.c if (bus_dmamap_load(sc->sc_dmatag, sc_if->sk_cdata.sk_rx_jumbo_map,
sc 764 dev/pci/if_sk.c bus_dmamap_unload(sc->sc_dmatag,
sc 767 dev/pci/if_sk.c bus_dmamap_destroy(sc->sc_dmatag,
sc 770 dev/pci/if_sk.c bus_dmamem_unmap(sc->sc_dmatag, kva, SK_JMEM);
sc 772 dev/pci/if_sk.c bus_dmamem_free(sc->sc_dmatag, &seg, rseg);
sc 807 dev/pci/if_sk.c struct sk_if_softc *sc;
sc 811 dev/pci/if_sk.c sc = (struct sk_if_softc *)arg;
sc 813 dev/pci/if_sk.c if (sc == NULL)
sc 818 dev/pci/if_sk.c - (vaddr_t)sc->sk_cdata.sk_jumbo_buf) / SK_JLEN;
sc 823 dev/pci/if_sk.c entry = LIST_FIRST(&sc->sk_jinuse_listhead);
sc 828 dev/pci/if_sk.c LIST_INSERT_HEAD(&sc->sk_jfree_listhead, entry, jpool_entries);
sc 962 dev/pci/if_sk.c sk_reset(struct sk_softc *sc)
sc 968 dev/pci/if_sk.c CSR_WRITE_2(sc, SK_CSR, SK_CSR_SW_RESET);
sc 969 dev/pci/if_sk.c CSR_WRITE_2(sc, SK_CSR, SK_CSR_MASTER_RESET);
sc 970 dev/pci/if_sk.c if (SK_IS_YUKON(sc))
sc 971 dev/pci/if_sk.c CSR_WRITE_2(sc, SK_LINK_CTRL, SK_LINK_RESET_SET);
sc 974 dev/pci/if_sk.c CSR_WRITE_2(sc, SK_CSR, SK_CSR_SW_UNRESET);
sc 976 dev/pci/if_sk.c CSR_WRITE_2(sc, SK_CSR, SK_CSR_MASTER_UNRESET);
sc 977 dev/pci/if_sk.c if (SK_IS_YUKON(sc))
sc 978 dev/pci/if_sk.c CSR_WRITE_2(sc, SK_LINK_CTRL, SK_LINK_RESET_CLEAR);
sc 980 dev/pci/if_sk.c DPRINTFN(2, ("sk_reset: sk_csr=%x\n", CSR_READ_2(sc, SK_CSR)));
sc 982 dev/pci/if_sk.c CSR_READ_2(sc, SK_LINK_CTRL)));
sc 984 dev/pci/if_sk.c if (SK_IS_GENESIS(sc)) {
sc 986 dev/pci/if_sk.c sk_win_write_2(sc, SK_PKTARB_CTL, SK_PKTARBCTL_UNRESET);
sc 987 dev/pci/if_sk.c sk_win_write_2(sc, SK_RXPA1_TINIT, SK_PKTARB_TIMEOUT);
sc 988 dev/pci/if_sk.c sk_win_write_2(sc, SK_TXPA1_TINIT, SK_PKTARB_TIMEOUT);
sc 989 dev/pci/if_sk.c sk_win_write_2(sc, SK_RXPA2_TINIT, SK_PKTARB_TIMEOUT);
sc 990 dev/pci/if_sk.c sk_win_write_2(sc, SK_TXPA2_TINIT, SK_PKTARB_TIMEOUT);
sc 994 dev/pci/if_sk.c sk_win_write_4(sc, SK_RAMCTL, SK_RAMCTL_UNRESET);
sc 1005 dev/pci/if_sk.c switch (sc->sk_type) {
sc 1012 dev/pci/if_sk.c sk_win_write_4(sc, SK_IMTIMERINIT, SK_IM_USECS(100));
sc 1013 dev/pci/if_sk.c sk_win_write_4(sc, SK_IMMR, SK_ISR_TX1_S_EOF|SK_ISR_TX2_S_EOF|
sc 1015 dev/pci/if_sk.c sk_win_write_1(sc, SK_IMTIMERCTL, SK_IMCTL_START);
sc 1045 dev/pci/if_sk.c struct sk_softc *sc = (struct sk_softc *)parent;
sc 1053 dev/pci/if_sk.c sc_if->sk_softc = sc;
sc 1054 dev/pci/if_sk.c sc->sk_if[sa->skc_port] = sc_if;
sc 1074 dev/pci/if_sk.c sk_win_read_1(sc, SK_MAC0_0 + (sa->skc_port * 8) + i);
sc 1087 dev/pci/if_sk.c if (sk_win_read_1(sc, SK_CONFIG) & SK_CONFIG_SINGLEMAC) {
sc 1090 dev/pci/if_sk.c chunk = sc->sk_ramsize / 2;
sc 1091 dev/pci/if_sk.c val = sc->sk_rboff / sizeof(u_int64_t);
sc 1101 dev/pci/if_sk.c chunk = sc->sk_ramsize / 4;
sc 1102 dev/pci/if_sk.c val = (sc->sk_rboff + (chunk * 2 * sc_if->sk_port)) /
sc 1118 dev/pci/if_sk.c sc_if->sk_phytype = sk_win_read_1(sc, SK_EPROM1) & 0xF;
sc 1121 dev/pci/if_sk.c if (SK_IS_GENESIS(sc)) {
sc 1131 dev/pci/if_sk.c sc->sk_dev.dv_xname, sc_if->sk_phytype);
sc 1136 dev/pci/if_sk.c if (SK_IS_YUKON(sc)) {
sc 1138 dev/pci/if_sk.c sc->sk_pmd != 'L' && sc->sk_pmd != 'S')) {
sc 1142 dev/pci/if_sk.c sc->sk_coppertype = 1;
sc 1147 dev/pci/if_sk.c if (!(sc->sk_coppertype))
sc 1152 dev/pci/if_sk.c if (bus_dmamem_alloc(sc->sc_dmatag, sizeof(struct sk_ring_data),
sc 1157 dev/pci/if_sk.c if (bus_dmamem_map(sc->sc_dmatag, &seg, rseg,
sc 1163 dev/pci/if_sk.c if (bus_dmamap_create(sc->sc_dmatag, sizeof(struct sk_ring_data), 1,
sc 1169 dev/pci/if_sk.c if (bus_dmamap_load(sc->sc_dmatag, sc_if->sk_ring_map, kva,
sc 1200 dev/pci/if_sk.c switch (sc->sk_type) {
sc 1210 dev/pci/if_sk.c printf(": unknown device type %d\n", sc->sk_type);
sc 1218 dev/pci/if_sk.c if (SK_IS_GENESIS(sc)) {
sc 1230 dev/pci/if_sk.c if (SK_IS_GENESIS(sc)) {
sc 1245 dev/pci/if_sk.c if (SK_IS_GENESIS(sc)) {
sc 1257 dev/pci/if_sk.c shutdownhook_establish(skc_shutdown, sc);
sc 1263 dev/pci/if_sk.c bus_dmamap_destroy(sc->sc_dmatag, sc_if->sk_ring_map);
sc 1265 dev/pci/if_sk.c bus_dmamem_unmap(sc->sc_dmatag, kva, sizeof(struct sk_ring_data));
sc 1267 dev/pci/if_sk.c bus_dmamem_free(sc->sc_dmatag, &seg, rseg);
sc 1269 dev/pci/if_sk.c sc->sk_if[sa->skc_port] = NULL;
sc 1292 dev/pci/if_sk.c struct sk_softc *sc = (struct sk_softc *)self;
sc 1322 dev/pci/if_sk.c "-- setting to D0\n", sc->sk_dev.dv_xname,
sc 1344 dev/pci/if_sk.c memtype, 0, &sc->sk_btag, &sc->sk_bhandle,
sc 1352 dev/pci/if_sk.c sc->sc_dmatag = pa->pa_dmat;
sc 1354 dev/pci/if_sk.c sc->sk_type = sk_win_read_1(sc, SK_CHIPVER);
sc 1355 dev/pci/if_sk.c sc->sk_rev = (sk_win_read_1(sc, SK_CONFIG) >> 4);
sc 1358 dev/pci/if_sk.c if (! SK_IS_GENESIS(sc) && ! SK_IS_YUKON(sc)) {
sc 1359 dev/pci/if_sk.c printf(": unknown chip type: %d\n", sc->sk_type);
sc 1371 dev/pci/if_sk.c sc->sk_intrhand = pci_intr_establish(pc, ih, IPL_NET, sk_intr, sc,
sc 1373 dev/pci/if_sk.c if (sc->sk_intrhand == NULL) {
sc 1382 dev/pci/if_sk.c sk_reset(sc);
sc 1384 dev/pci/if_sk.c skrs = sk_win_read_1(sc, SK_EPROM0);
sc 1385 dev/pci/if_sk.c if (SK_IS_GENESIS(sc)) {
sc 1389 dev/pci/if_sk.c sc->sk_ramsize = 0x80000;
sc 1390 dev/pci/if_sk.c sc->sk_rboff = SK_RBOFF_0;
sc 1393 dev/pci/if_sk.c sc->sk_ramsize = 0x100000;
sc 1394 dev/pci/if_sk.c sc->sk_rboff = SK_RBOFF_80000;
sc 1397 dev/pci/if_sk.c sc->sk_ramsize = 0x100000;
sc 1398 dev/pci/if_sk.c sc->sk_rboff = SK_RBOFF_0;
sc 1401 dev/pci/if_sk.c sc->sk_ramsize = 0x200000;
sc 1402 dev/pci/if_sk.c sc->sk_rboff = SK_RBOFF_0;
sc 1411 dev/pci/if_sk.c sc->sk_ramsize = 0x20000;
sc 1413 dev/pci/if_sk.c sc->sk_ramsize = skrs * (1<<12);
sc 1414 dev/pci/if_sk.c sc->sk_rboff = SK_RBOFF_0;
sc 1418 dev/pci/if_sk.c sc->sk_ramsize, sc->sk_ramsize / 1024,
sc 1419 dev/pci/if_sk.c sc->sk_rboff));
sc 1422 dev/pci/if_sk.c sc->sk_pmd = sk_win_read_1(sc, SK_PMDTYPE);
sc 1424 dev/pci/if_sk.c if (sc->sk_pmd == 'T' || sc->sk_pmd == '1')
sc 1425 dev/pci/if_sk.c sc->sk_coppertype = 1;
sc 1427 dev/pci/if_sk.c sc->sk_coppertype = 0;
sc 1429 dev/pci/if_sk.c switch (sc->sk_type) {
sc 1431 dev/pci/if_sk.c sc->sk_name = "GEnesis";
sc 1434 dev/pci/if_sk.c sc->sk_name = "Yukon";
sc 1437 dev/pci/if_sk.c sc->sk_name = "Yukon Lite";
sc 1440 dev/pci/if_sk.c sc->sk_name = "Yukon LP";
sc 1443 dev/pci/if_sk.c sc->sk_name = "Yukon (Unknown)";
sc 1447 dev/pci/if_sk.c if (sc->sk_type == SK_YUKON || sc->sk_type == SK_YUKON_LP) {
sc 1451 dev/pci/if_sk.c flashaddr = sk_win_read_4(sc, SK_EP_ADDR);
sc 1454 dev/pci/if_sk.c sk_win_write_1(sc, SK_EP_ADDR+3, 0xff);
sc 1455 dev/pci/if_sk.c testbyte = sk_win_read_1(sc, SK_EP_ADDR+3);
sc 1459 dev/pci/if_sk.c sc->sk_type = SK_YUKON_LITE;
sc 1460 dev/pci/if_sk.c sc->sk_rev = SK_YUKON_LITE_REV_A0;
sc 1462 dev/pci/if_sk.c sk_win_write_4(sc, SK_EP_ADDR, flashaddr);
sc 1466 dev/pci/if_sk.c if (sc->sk_type == SK_YUKON_LITE) {
sc 1467 dev/pci/if_sk.c switch (sc->sk_rev) {
sc 1483 dev/pci/if_sk.c printf(", %s", sc->sk_name);
sc 1486 dev/pci/if_sk.c printf(" (0x%x): %s\n", sc->sk_rev, intrstr);
sc 1488 dev/pci/if_sk.c sc->sk_macs = 1;
sc 1490 dev/pci/if_sk.c if (!(sk_win_read_1(sc, SK_CONFIG) & SK_CONFIG_SINGLEMAC))
sc 1491 dev/pci/if_sk.c sc->sk_macs++;
sc 1494 dev/pci/if_sk.c skca.skc_type = sc->sk_type;
sc 1495 dev/pci/if_sk.c skca.skc_rev = sc->sk_rev;
sc 1496 dev/pci/if_sk.c (void)config_found(&sc->sk_dev, &skca, skcprint);
sc 1498 dev/pci/if_sk.c if (sc->sk_macs > 1) {
sc 1500 dev/pci/if_sk.c skca.skc_type = sc->sk_type;
sc 1501 dev/pci/if_sk.c skca.skc_rev = sc->sk_rev;
sc 1502 dev/pci/if_sk.c (void)config_found(&sc->sk_dev, &skca, skcprint);
sc 1506 dev/pci/if_sk.c CSR_WRITE_2(sc, SK_LED, SK_LED_GREEN_ON);
sc 1511 dev/pci/if_sk.c pci_intr_disestablish(pc, sc->sk_intrhand);
sc 1513 dev/pci/if_sk.c bus_space_unmap(sc->sk_btag, sc->sk_bhandle, size);
sc 1519 dev/pci/if_sk.c struct sk_softc *sc = sc_if->sk_softc;
sc 1547 dev/pci/if_sk.c if (bus_dmamap_load_mbuf(sc->sc_dmatag, txmap, m_head,
sc 1555 dev/pci/if_sk.c bus_dmamap_unload(sc->sc_dmatag, txmap);
sc 1562 dev/pci/if_sk.c bus_dmamap_sync(sc->sc_dmatag, txmap, 0, txmap->dm_mapsize,
sc 1619 dev/pci/if_sk.c struct sk_softc *sc = sc_if->sk_softc;
sc 1660 dev/pci/if_sk.c CSR_WRITE_4(sc, sc_if->sk_tx_bmu, SK_TXBMU_TX_START);
sc 1690 dev/pci/if_sk.c struct sk_softc *sc = v;
sc 1695 dev/pci/if_sk.c CSR_WRITE_2(sc, SK_LED, SK_LED_GREEN_OFF);
sc 1701 dev/pci/if_sk.c sk_reset(sc);
sc 1705 dev/pci/if_sk.c sk_rxvalid(struct sk_softc *sc, u_int32_t stat, u_int32_t len)
sc 1707 dev/pci/if_sk.c if (sc->sk_type == SK_GENESIS) {
sc 1726 dev/pci/if_sk.c struct sk_softc *sc = sc_if->sk_softc;
sc 1777 dev/pci/if_sk.c sk_rxvalid(sc, rxstat, total_len) == 0) {
sc 1911 dev/pci/if_sk.c struct sk_softc *sc = sc_if->sk_softc;
sc 1946 dev/pci/if_sk.c bus_dmamap_sync(sc->sc_dmatag, entry->dmamap, 0,
sc 1949 dev/pci/if_sk.c bus_dmamap_unload(sc->sc_dmatag, entry->dmamap);
sc 2117 dev/pci/if_sk.c struct sk_softc *sc = xsc;
sc 2118 dev/pci/if_sk.c struct sk_if_softc *sc_if0 = sc->sk_if[SK_PORT_A];
sc 2119 dev/pci/if_sk.c struct sk_if_softc *sc_if1 = sc->sk_if[SK_PORT_B];
sc 2124 dev/pci/if_sk.c status = CSR_READ_4(sc, SK_ISSR);
sc 2133 dev/pci/if_sk.c for (; (status &= sc->sk_intrmask) != 0;) {
sc 2139 dev/pci/if_sk.c CSR_WRITE_4(sc, SK_BMU_RX_CSR0,
sc 2144 dev/pci/if_sk.c CSR_WRITE_4(sc, SK_BMU_RX_CSR1,
sc 2151 dev/pci/if_sk.c CSR_WRITE_4(sc, SK_BMU_TXS_CSR0,
sc 2156 dev/pci/if_sk.c CSR_WRITE_4(sc, SK_BMU_TXS_CSR1,
sc 2163 dev/pci/if_sk.c if (SK_IS_GENESIS(sc))
sc 2171 dev/pci/if_sk.c if (SK_IS_GENESIS(sc))
sc 2187 dev/pci/if_sk.c status = CSR_READ_4(sc, SK_ISSR);
sc 2190 dev/pci/if_sk.c CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sc 2203 dev/pci/if_sk.c struct sk_softc *sc = sc_if->sk_softc;
sc 2233 dev/pci/if_sk.c val = sk_win_read_4(sc, SK_GPIO);
sc 2238 dev/pci/if_sk.c sk_win_write_4(sc, SK_GPIO, val);
sc 2328 dev/pci/if_sk.c sk_win_write_1(sc, SK_RCINIT_RX1, SK_RCINIT_XMAC_B2);
sc 2329 dev/pci/if_sk.c sk_win_write_1(sc, SK_RCINIT_TX1, SK_RCINIT_XMAC_B2);
sc 2330 dev/pci/if_sk.c sk_win_write_1(sc, SK_RCINIT_RX2, SK_RCINIT_XMAC_B2);
sc 2331 dev/pci/if_sk.c sk_win_write_1(sc, SK_RCINIT_TX2, SK_RCINIT_XMAC_B2);
sc 2332 dev/pci/if_sk.c sk_win_write_1(sc, SK_MINIT_RX1, SK_MINIT_XMAC_B2);
sc 2333 dev/pci/if_sk.c sk_win_write_1(sc, SK_MINIT_TX1, SK_MINIT_XMAC_B2);
sc 2334 dev/pci/if_sk.c sk_win_write_1(sc, SK_MINIT_RX2, SK_MINIT_XMAC_B2);
sc 2335 dev/pci/if_sk.c sk_win_write_1(sc, SK_MINIT_TX2, SK_MINIT_XMAC_B2);
sc 2336 dev/pci/if_sk.c sk_win_write_1(sc, SK_RECOVERY_CTL, SK_RECOVERY_XMAC_B2);
sc 2339 dev/pci/if_sk.c sk_win_write_1(sc, SK_RCINIT_RX1, SK_RCINIT_XMAC_C1);
sc 2340 dev/pci/if_sk.c sk_win_write_1(sc, SK_RCINIT_TX1, SK_RCINIT_XMAC_C1);
sc 2341 dev/pci/if_sk.c sk_win_write_1(sc, SK_RCINIT_RX2, SK_RCINIT_XMAC_C1);
sc 2342 dev/pci/if_sk.c sk_win_write_1(sc, SK_RCINIT_TX2, SK_RCINIT_XMAC_C1);
sc 2343 dev/pci/if_sk.c sk_win_write_1(sc, SK_MINIT_RX1, SK_MINIT_XMAC_C1);
sc 2344 dev/pci/if_sk.c sk_win_write_1(sc, SK_MINIT_TX1, SK_MINIT_XMAC_C1);
sc 2345 dev/pci/if_sk.c sk_win_write_1(sc, SK_MINIT_RX2, SK_MINIT_XMAC_C1);
sc 2346 dev/pci/if_sk.c sk_win_write_1(sc, SK_MINIT_TX2, SK_MINIT_XMAC_C1);
sc 2347 dev/pci/if_sk.c sk_win_write_1(sc, SK_RECOVERY_CTL, SK_RECOVERY_XMAC_B2);
sc 2352 dev/pci/if_sk.c sk_win_write_2(sc, SK_MACARB_CTL,
sc 2362 dev/pci/if_sk.c struct sk_softc *sc;
sc 2365 dev/pci/if_sk.c sc = sc_if->sk_softc;
sc 2370 dev/pci/if_sk.c if (sc->sk_type == SK_YUKON_LITE &&
sc 2371 dev/pci/if_sk.c sc->sk_rev >= SK_YUKON_LITE_REV_A3) {
sc 2377 dev/pci/if_sk.c v = sk_win_read_4(sc, SK_GPIO);
sc 2379 dev/pci/if_sk.c sk_win_write_4(sc, SK_GPIO, v);
sc 2391 dev/pci/if_sk.c if (sc->sk_type == SK_YUKON_LITE &&
sc 2392 dev/pci/if_sk.c sc->sk_rev >= SK_YUKON_LITE_REV_A3) {
sc 2396 dev/pci/if_sk.c v = sk_win_read_4(sc, SK_GPIO);
sc 2399 dev/pci/if_sk.c sk_win_write_4(sc, SK_GPIO, v);
sc 2405 dev/pci/if_sk.c if (sc->sk_coppertype)
sc 2492 dev/pci/if_sk.c if (sc->sk_type == SK_YUKON_LITE && sc->sk_rev == SK_YUKON_LITE_REV_A0)
sc 2519 dev/pci/if_sk.c struct sk_softc *sc = sc_if->sk_softc;
sc 2531 dev/pci/if_sk.c if (SK_IS_GENESIS(sc)) {
sc 2568 dev/pci/if_sk.c switch (sc->sk_type) {
sc 2580 dev/pci/if_sk.c if (SK_IS_GENESIS(sc)) {
sc 2640 dev/pci/if_sk.c CSR_READ_4(sc, SK_ISSR);
sc 2642 dev/pci/if_sk.c sc->sk_intrmask |= SK_INTRS1;
sc 2644 dev/pci/if_sk.c sc->sk_intrmask |= SK_INTRS2;
sc 2646 dev/pci/if_sk.c sc->sk_intrmask |= SK_ISR_EXTERNAL_REG;
sc 2648 dev/pci/if_sk.c CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sc 2653 dev/pci/if_sk.c if (SK_IS_GENESIS(sc)) {
sc 2660 dev/pci/if_sk.c if (SK_IS_YUKON(sc)) {
sc 2669 dev/pci/if_sk.c CSR_WRITE_4(sc, sc_if->sk_tx_bmu, SK_TXBMU_TX_START);
sc 2674 dev/pci/if_sk.c if (SK_IS_YUKON(sc))
sc 2683 dev/pci/if_sk.c struct sk_softc *sc = sc_if->sk_softc;
sc 2698 dev/pci/if_sk.c CSR_WRITE_4(sc, sc_if->sk_tx_bmu, SK_TXBMU_TX_STOP);
sc 2700 dev/pci/if_sk.c val = CSR_READ_4(sc, sc_if->sk_tx_bmu);
sc 2724 dev/pci/if_sk.c val = sk_win_read_4(sc, SK_GPIO);
sc 2732 dev/pci/if_sk.c sk_win_write_4(sc, SK_GPIO, val);
sc 2737 dev/pci/if_sk.c switch (sc->sk_type) {
sc 2762 dev/pci/if_sk.c sc->sk_intrmask &= ~SK_INTRS1;
sc 2764 dev/pci/if_sk.c sc->sk_intrmask &= ~SK_INTRS2;
sc 2765 dev/pci/if_sk.c CSR_WRITE_4(sc, SK_IMR, sc->sk_intrmask);
sc 2790 dev/pci/if_sk.c bus_dmamap_destroy(sc->sc_dmatag, dma->dmamap);
sc 354 dev/pci/if_skreg.h #define SK_IS_GENESIS(sc) \
sc 355 dev/pci/if_skreg.h ((sc)->sk_type == SK_GENESIS)
sc 356 dev/pci/if_skreg.h #define SK_IS_YUKON(sc) \
sc 357 dev/pci/if_skreg.h ((sc)->sk_type >= SK_YUKON && (sc)->sk_type <= SK_YUKON_LP)
sc 358 dev/pci/if_skreg.h #define SK_IS_YUKON2(sc) \
sc 359 dev/pci/if_skreg.h ((sc)->sk_type >= SK_YUKON_XL && (sc)->sk_type <= SK_YUKON_FE)
sc 1356 dev/pci/if_skreg.h #define SK_XMAC_REG(sc, reg) (((reg) * 2) + SK_XMAC1_BASE + \
sc 1357 dev/pci/if_skreg.h (((sc)->sk_port) * (SK_XMAC2_BASE - SK_XMAC1_BASE)))
sc 1360 dev/pci/if_skreg.h #define SK_XM_READ_4(sc, reg) \
sc 1361 dev/pci/if_skreg.h ((sk_win_read_2(sc->sk_softc, \
sc 1362 dev/pci/if_skreg.h SK_XMAC_REG(sc, reg)) & 0xFFFF) | \
sc 1363 dev/pci/if_skreg.h ((sk_win_read_2(sc->sk_softc, \
sc 1364 dev/pci/if_skreg.h SK_XMAC_REG(sc, reg + 2)) & 0xFFFF) << 16))
sc 1366 dev/pci/if_skreg.h #define SK_XM_WRITE_4(sc, reg, val) \
sc 1367 dev/pci/if_skreg.h sk_win_write_2(sc->sk_softc, SK_XMAC_REG(sc, reg), \
sc 1369 dev/pci/if_skreg.h sk_win_write_2(sc->sk_softc, SK_XMAC_REG(sc, reg + 2), \
sc 1372 dev/pci/if_skreg.h #define SK_XM_READ_4(sc, reg) \
sc 1373 dev/pci/if_skreg.h sk_win_read_4(sc->sk_softc, SK_XMAC_REG(sc, reg))
sc 1375 dev/pci/if_skreg.h #define SK_XM_WRITE_4(sc, reg, val) \
sc 1376 dev/pci/if_skreg.h sk_win_write_4(sc->sk_softc, SK_XMAC_REG(sc, reg), (val))
sc 1379 dev/pci/if_skreg.h #define SK_XM_READ_2(sc, reg) \
sc 1380 dev/pci/if_skreg.h sk_win_read_2(sc->sk_softc, SK_XMAC_REG(sc, reg))
sc 1382 dev/pci/if_skreg.h #define SK_XM_WRITE_2(sc, reg, val) \
sc 1383 dev/pci/if_skreg.h sk_win_write_2(sc->sk_softc, SK_XMAC_REG(sc, reg), val)
sc 1385 dev/pci/if_skreg.h #define SK_XM_SETBIT_4(sc, reg, x) \
sc 1386 dev/pci/if_skreg.h SK_XM_WRITE_4(sc, reg, (SK_XM_READ_4(sc, reg)) | (x))
sc 1388 dev/pci/if_skreg.h #define SK_XM_CLRBIT_4(sc, reg, x) \
sc 1389 dev/pci/if_skreg.h SK_XM_WRITE_4(sc, reg, (SK_XM_READ_4(sc, reg)) & ~(x))
sc 1391 dev/pci/if_skreg.h #define SK_XM_SETBIT_2(sc, reg, x) \
sc 1392 dev/pci/if_skreg.h SK_XM_WRITE_2(sc, reg, (SK_XM_READ_2(sc, reg)) | (x))
sc 1394 dev/pci/if_skreg.h #define SK_XM_CLRBIT_2(sc, reg, x) \
sc 1395 dev/pci/if_skreg.h SK_XM_WRITE_2(sc, reg, (SK_XM_READ_2(sc, reg)) & ~(x))
sc 1398 dev/pci/if_skreg.h #define SK_YU_REG(sc, reg) \
sc 1400 dev/pci/if_skreg.h (((sc)->sk_port) * (SK_MARV2_BASE - SK_MARV1_BASE)))
sc 1402 dev/pci/if_skreg.h #define SK_YU_READ_4(sc, reg) \
sc 1403 dev/pci/if_skreg.h sk_win_read_4((sc)->sk_softc, SK_YU_REG((sc), (reg)))
sc 1405 dev/pci/if_skreg.h #define SK_YU_READ_2(sc, reg) \
sc 1406 dev/pci/if_skreg.h sk_win_read_2((sc)->sk_softc, SK_YU_REG((sc), (reg)))
sc 1408 dev/pci/if_skreg.h #define SK_YU_WRITE_4(sc, reg, val) \
sc 1409 dev/pci/if_skreg.h sk_win_write_4((sc)->sk_softc, SK_YU_REG((sc), (reg)), (val))
sc 1411 dev/pci/if_skreg.h #define SK_YU_WRITE_2(sc, reg, val) \
sc 1412 dev/pci/if_skreg.h sk_win_write_2((sc)->sk_softc, SK_YU_REG((sc), (reg)), (val))
sc 1414 dev/pci/if_skreg.h #define SK_YU_SETBIT_4(sc, reg, x) \
sc 1415 dev/pci/if_skreg.h SK_YU_WRITE_4(sc, reg, (SK_YU_READ_4(sc, reg)) | (x))
sc 1417 dev/pci/if_skreg.h #define SK_YU_CLRBIT_4(sc, reg, x) \
sc 1418 dev/pci/if_skreg.h SK_YU_WRITE_4(sc, reg, (SK_YU_READ_4(sc, reg)) & ~(x))
sc 1420 dev/pci/if_skreg.h #define SK_YU_SETBIT_2(sc, reg, x) \
sc 1421 dev/pci/if_skreg.h SK_YU_WRITE_2(sc, reg, (SK_YU_READ_2(sc, reg)) | (x))
sc 1423 dev/pci/if_skreg.h #define SK_YU_CLRBIT_2(sc, reg, x) \
sc 1424 dev/pci/if_skreg.h SK_YU_WRITE_2(sc, reg, (SK_YU_READ_2(sc, reg)) & ~(x))
sc 1472 dev/pci/if_skreg.h #define CSR_WRITE_4(sc, reg, val) \
sc 1473 dev/pci/if_skreg.h bus_space_write_4((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val))
sc 1474 dev/pci/if_skreg.h #define CSR_WRITE_2(sc, reg, val) \
sc 1475 dev/pci/if_skreg.h bus_space_write_2((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val))
sc 1476 dev/pci/if_skreg.h #define CSR_WRITE_1(sc, reg, val) \
sc 1477 dev/pci/if_skreg.h bus_space_write_1((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val))
sc 1479 dev/pci/if_skreg.h #define CSR_READ_4(sc, reg) \
sc 1480 dev/pci/if_skreg.h bus_space_read_4((sc)->sk_btag, (sc)->sk_bhandle, (reg))
sc 1481 dev/pci/if_skreg.h #define CSR_READ_2(sc, reg) \
sc 1482 dev/pci/if_skreg.h bus_space_read_2((sc)->sk_btag, (sc)->sk_bhandle, (reg))
sc 1483 dev/pci/if_skreg.h #define CSR_READ_1(sc, reg) \
sc 1484 dev/pci/if_skreg.h bus_space_read_1((sc)->sk_btag, (sc)->sk_bhandle, (reg))
sc 139 dev/pci/if_skvar.h #define SK_TX_RING_ADDR(sc, i) \
sc 140 dev/pci/if_skvar.h ((sc)->sk_ring_map->dm_segs[0].ds_addr + \
sc 143 dev/pci/if_skvar.h #define SK_RX_RING_ADDR(sc, i) \
sc 144 dev/pci/if_skvar.h ((sc)->sk_ring_map->dm_segs[0].ds_addr + \
sc 151 dev/pci/if_skvar.h #define SK_CDTXSYNC(sc, x, n, ops) \
sc 160 dev/pci/if_skvar.h bus_dmamap_sync((sc)->sk_softc->sc_dmatag, \
sc 161 dev/pci/if_skvar.h (sc)->sk_ring_map, SK_CDTXOFF(__x), \
sc 169 dev/pci/if_skvar.h bus_dmamap_sync((sc)->sk_softc->sc_dmatag, (sc)->sk_ring_map, \
sc 173 dev/pci/if_skvar.h #define SK_CDRXSYNC(sc, x, ops) \
sc 175 dev/pci/if_skvar.h bus_dmamap_sync((sc)->sk_softc->sc_dmatag, (sc)->sk_ring_map, \
sc 123 dev/pci/if_ste.c #define STE_SETBIT4(sc, reg, x) \
sc 124 dev/pci/if_ste.c CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | x)
sc 126 dev/pci/if_ste.c #define STE_CLRBIT4(sc, reg, x) \
sc 127 dev/pci/if_ste.c CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~x)
sc 129 dev/pci/if_ste.c #define STE_SETBIT2(sc, reg, x) \
sc 130 dev/pci/if_ste.c CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | x)
sc 132 dev/pci/if_ste.c #define STE_CLRBIT2(sc, reg, x) \
sc 133 dev/pci/if_ste.c CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~x)
sc 135 dev/pci/if_ste.c #define STE_SETBIT1(sc, reg, x) \
sc 136 dev/pci/if_ste.c CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) | x)
sc 138 dev/pci/if_ste.c #define STE_CLRBIT1(sc, reg, x) \
sc 139 dev/pci/if_ste.c CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) & ~x)
sc 142 dev/pci/if_ste.c #define MII_SET(x) STE_SETBIT1(sc, STE_PHYCTL, x)
sc 143 dev/pci/if_ste.c #define MII_CLR(x) STE_CLRBIT1(sc, STE_PHYCTL, x)
sc 157 dev/pci/if_ste.c ste_mii_sync(struct ste_softc *sc)
sc 177 dev/pci/if_ste.c ste_mii_send(struct ste_softc *sc, u_int32_t bits, int cnt)
sc 200 dev/pci/if_ste.c ste_mii_readreg(struct ste_softc *sc, struct ste_mii_frame *frame)
sc 214 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_PHYCTL, 0);
sc 220 dev/pci/if_ste.c ste_mii_sync(sc);
sc 225 dev/pci/if_ste.c ste_mii_send(sc, frame->mii_stdelim, 2);
sc 226 dev/pci/if_ste.c ste_mii_send(sc, frame->mii_opcode, 2);
sc 227 dev/pci/if_ste.c ste_mii_send(sc, frame->mii_phyaddr, 5);
sc 228 dev/pci/if_ste.c ste_mii_send(sc, frame->mii_regaddr, 5);
sc 242 dev/pci/if_ste.c ack = CSR_READ_2(sc, STE_PHYCTL) & STE_PHYCTL_MDATA;
sc 264 dev/pci/if_ste.c if (CSR_READ_2(sc, STE_PHYCTL) & STE_PHYCTL_MDATA)
sc 290 dev/pci/if_ste.c ste_mii_writereg(struct ste_softc *sc, struct ste_mii_frame *frame)
sc 308 dev/pci/if_ste.c ste_mii_sync(sc);
sc 310 dev/pci/if_ste.c ste_mii_send(sc, frame->mii_stdelim, 2);
sc 311 dev/pci/if_ste.c ste_mii_send(sc, frame->mii_opcode, 2);
sc 312 dev/pci/if_ste.c ste_mii_send(sc, frame->mii_phyaddr, 5);
sc 313 dev/pci/if_ste.c ste_mii_send(sc, frame->mii_regaddr, 5);
sc 314 dev/pci/if_ste.c ste_mii_send(sc, frame->mii_turnaround, 2);
sc 315 dev/pci/if_ste.c ste_mii_send(sc, frame->mii_data, 16);
sc 336 dev/pci/if_ste.c struct ste_softc *sc = (struct ste_softc *)self;
sc 339 dev/pci/if_ste.c if (sc->ste_one_phy && phy != 0)
sc 346 dev/pci/if_ste.c ste_mii_readreg(sc, &frame);
sc 354 dev/pci/if_ste.c struct ste_softc *sc = (struct ste_softc *)self;
sc 363 dev/pci/if_ste.c ste_mii_writereg(sc, &frame);
sc 371 dev/pci/if_ste.c struct ste_softc *sc = (struct ste_softc *)self;
sc 375 dev/pci/if_ste.c mii = &sc->sc_mii;
sc 377 dev/pci/if_ste.c fcur = CSR_READ_2(sc, STE_MACCTL0) & STE_MACCTL0_FULLDUPLEX;
sc 383 dev/pci/if_ste.c STE_SETBIT4(sc, STE_DMACTL,
sc 385 dev/pci/if_ste.c ste_wait(sc);
sc 388 dev/pci/if_ste.c STE_SETBIT2(sc, STE_MACCTL0, STE_MACCTL0_FULLDUPLEX);
sc 390 dev/pci/if_ste.c STE_CLRBIT2(sc, STE_MACCTL0, STE_MACCTL0_FULLDUPLEX);
sc 392 dev/pci/if_ste.c STE_SETBIT4(sc, STE_DMACTL,
sc 401 dev/pci/if_ste.c struct ste_softc *sc;
sc 404 dev/pci/if_ste.c sc = ifp->if_softc;
sc 405 dev/pci/if_ste.c mii = &sc->sc_mii;
sc 406 dev/pci/if_ste.c sc->ste_link = 0;
sc 420 dev/pci/if_ste.c struct ste_softc *sc;
sc 423 dev/pci/if_ste.c sc = ifp->if_softc;
sc 424 dev/pci/if_ste.c mii = &sc->sc_mii;
sc 434 dev/pci/if_ste.c ste_wait(struct ste_softc *sc)
sc 439 dev/pci/if_ste.c if (!(CSR_READ_4(sc, STE_DMACTL) & STE_DMACTL_DMA_HALTINPROG))
sc 444 dev/pci/if_ste.c printf("%s: command never completed!\n", sc->sc_dev.dv_xname);
sc 454 dev/pci/if_ste.c ste_eeprom_wait(struct ste_softc *sc)
sc 461 dev/pci/if_ste.c if (CSR_READ_2(sc, STE_EEPROM_CTL) & STE_EECTL_BUSY)
sc 469 dev/pci/if_ste.c sc->sc_dev.dv_xname);
sc 481 dev/pci/if_ste.c ste_read_eeprom(struct ste_softc *sc, caddr_t dest, int off, int cnt, int swap)
sc 486 dev/pci/if_ste.c if (ste_eeprom_wait(sc))
sc 490 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_EEPROM_CTL, STE_EEOPCODE_READ | (off + i));
sc 491 dev/pci/if_ste.c err = ste_eeprom_wait(sc);
sc 494 dev/pci/if_ste.c word = CSR_READ_2(sc, STE_EEPROM_DATA);
sc 506 dev/pci/if_ste.c ste_setmulti(struct ste_softc *sc)
sc 509 dev/pci/if_ste.c struct arpcom *ac = &sc->arpcom;
sc 515 dev/pci/if_ste.c ifp = &sc->arpcom.ac_if;
sc 518 dev/pci/if_ste.c STE_SETBIT1(sc, STE_RX_MODE, STE_RXMODE_ALLMULTI);
sc 519 dev/pci/if_ste.c STE_CLRBIT1(sc, STE_RX_MODE, STE_RXMODE_MULTIHASH);
sc 524 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_MAR0, 0);
sc 525 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_MAR1, 0);
sc 526 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_MAR2, 0);
sc 527 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_MAR3, 0);
sc 544 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_MAR0, hashes[0] & 0xFFFF);
sc 545 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_MAR1, (hashes[0] >> 16) & 0xFFFF);
sc 546 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_MAR2, hashes[1] & 0xFFFF);
sc 547 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_MAR3, (hashes[1] >> 16) & 0xFFFF);
sc 548 dev/pci/if_ste.c STE_CLRBIT1(sc, STE_RX_MODE, STE_RXMODE_ALLMULTI);
sc 549 dev/pci/if_ste.c STE_SETBIT1(sc, STE_RX_MODE, STE_RXMODE_MULTIHASH);
sc 557 dev/pci/if_ste.c struct ste_softc *sc;
sc 562 dev/pci/if_ste.c sc = xsc;
sc 563 dev/pci/if_ste.c ifp = &sc->arpcom.ac_if;
sc 566 dev/pci/if_ste.c if (!(CSR_READ_2(sc, STE_ISR) & STE_ISR_INTLATCH))
sc 570 dev/pci/if_ste.c status = CSR_READ_2(sc, STE_ISR_ACK);
sc 578 dev/pci/if_ste.c ste_rxeoc(sc);
sc 579 dev/pci/if_ste.c ste_rxeof(sc);
sc 583 dev/pci/if_ste.c ste_txeof(sc);
sc 586 dev/pci/if_ste.c ste_txeoc(sc);
sc 589 dev/pci/if_ste.c timeout_del(&sc->sc_stats_tmo);
sc 590 dev/pci/if_ste.c ste_stats_update(sc);
sc 594 dev/pci/if_ste.c mii_pollstat(&sc->sc_mii);
sc 597 dev/pci/if_ste.c ste_reset(sc);
sc 598 dev/pci/if_ste.c ste_init(sc);
sc 603 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_IMR, STE_INTRS);
sc 612 dev/pci/if_ste.c ste_rxeoc(struct ste_softc *sc)
sc 616 dev/pci/if_ste.c if (sc->ste_cdata.ste_rx_head->ste_ptr->ste_status == 0) {
sc 617 dev/pci/if_ste.c cur_rx = sc->ste_cdata.ste_rx_head;
sc 621 dev/pci/if_ste.c if (cur_rx == sc->ste_cdata.ste_rx_head)
sc 624 dev/pci/if_ste.c if (sc->ste_cdata.ste_rx_head->ste_ptr->ste_status == 0) {
sc 626 dev/pci/if_ste.c sc->ste_cdata.ste_rx_head = cur_rx;
sc 636 dev/pci/if_ste.c ste_rxeof(struct ste_softc *sc)
sc 644 dev/pci/if_ste.c ifp = &sc->arpcom.ac_if;
sc 646 dev/pci/if_ste.c while((rxstat = sc->ste_cdata.ste_rx_head->ste_ptr->ste_status)
sc 651 dev/pci/if_ste.c cur_rx = sc->ste_cdata.ste_rx_head;
sc 652 dev/pci/if_ste.c sc->ste_cdata.ste_rx_head = cur_rx->ste_next;
sc 673 dev/pci/if_ste.c sc->sc_dev.dv_xname);
sc 690 dev/pci/if_ste.c if (ste_newbuf(sc, cur_rx, NULL) == ENOBUFS) {
sc 717 dev/pci/if_ste.c ste_txeoc(struct ste_softc *sc)
sc 722 dev/pci/if_ste.c ifp = &sc->arpcom.ac_if;
sc 724 dev/pci/if_ste.c while ((txstat = CSR_READ_1(sc, STE_TX_STATUS)) &
sc 731 dev/pci/if_ste.c sc->sc_dev.dv_xname, txstat);
sc 733 dev/pci/if_ste.c ste_reset(sc);
sc 734 dev/pci/if_ste.c ste_init(sc);
sc 737 dev/pci/if_ste.c sc->ste_tx_thresh < ETHER_MAX_DIX_LEN) {
sc 738 dev/pci/if_ste.c sc->ste_tx_thresh += STE_MIN_FRAMELEN;
sc 741 dev/pci/if_ste.c sc->sc_dev.dv_xname, sc->ste_tx_thresh);
sc 743 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_TX_STARTTHRESH, sc->ste_tx_thresh);
sc 744 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_TX_RECLAIM_THRESH,
sc 747 dev/pci/if_ste.c ste_init(sc);
sc 748 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_TX_STATUS, txstat);
sc 755 dev/pci/if_ste.c ste_txeof(struct ste_softc *sc)
sc 761 dev/pci/if_ste.c ifp = &sc->arpcom.ac_if;
sc 763 dev/pci/if_ste.c idx = sc->ste_cdata.ste_tx_cons;
sc 764 dev/pci/if_ste.c while(idx != sc->ste_cdata.ste_tx_prod) {
sc 765 dev/pci/if_ste.c cur_tx = &sc->ste_cdata.ste_tx_chain[idx];
sc 778 dev/pci/if_ste.c sc->ste_cdata.ste_tx_cons = idx;
sc 779 dev/pci/if_ste.c if (idx == sc->ste_cdata.ste_tx_prod)
sc 788 dev/pci/if_ste.c struct ste_softc *sc;
sc 795 dev/pci/if_ste.c sc = xsc;
sc 796 dev/pci/if_ste.c ifp = &sc->arpcom.ac_if;
sc 797 dev/pci/if_ste.c mii = &sc->sc_mii;
sc 799 dev/pci/if_ste.c ifp->if_collisions += CSR_READ_1(sc, STE_LATE_COLLS)
sc 800 dev/pci/if_ste.c + CSR_READ_1(sc, STE_MULTI_COLLS)
sc 801 dev/pci/if_ste.c + CSR_READ_1(sc, STE_SINGLE_COLLS);
sc 803 dev/pci/if_ste.c if (!sc->ste_link) {
sc 807 dev/pci/if_ste.c sc->ste_link++;
sc 812 dev/pci/if_ste.c ste_miibus_statchg((struct device *)sc);
sc 818 dev/pci/if_ste.c timeout_add(&sc->sc_stats_tmo, hz);
sc 850 dev/pci/if_ste.c struct ste_softc *sc = (struct ste_softc *)self;
sc 874 dev/pci/if_ste.c sc->sc_dev.dv_xname, command & STE_PSTATE_MASK);
sc 893 dev/pci/if_ste.c sc->ste_one_phy = 1;
sc 902 dev/pci/if_ste.c &sc->ste_btag, &sc->ste_bhandle, NULL, &size, 0)) {
sc 909 dev/pci/if_ste.c &sc->ste_btag, &sc->ste_bhandle, NULL, &size, 0)) {
sc 921 dev/pci/if_ste.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ste_intr, sc,
sc 923 dev/pci/if_ste.c if (sc->sc_ih == NULL) {
sc 933 dev/pci/if_ste.c ste_reset(sc);
sc 938 dev/pci/if_ste.c if (ste_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr,
sc 944 dev/pci/if_ste.c printf(", address %s\n", ether_sprintf(sc->arpcom.ac_enaddr));
sc 946 dev/pci/if_ste.c sc->ste_ldata_ptr = malloc(sizeof(struct ste_list_data) + 8,
sc 948 dev/pci/if_ste.c if (sc->ste_ldata_ptr == NULL) {
sc 953 dev/pci/if_ste.c sc->ste_ldata = (struct ste_list_data *)sc->ste_ldata_ptr;
sc 954 dev/pci/if_ste.c bzero(sc->ste_ldata, sizeof(struct ste_list_data));
sc 956 dev/pci/if_ste.c ifp = &sc->arpcom.ac_if;
sc 957 dev/pci/if_ste.c ifp->if_softc = sc;
sc 965 dev/pci/if_ste.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 968 dev/pci/if_ste.c sc->ste_tx_thresh = STE_TXSTART_THRESH;
sc 970 dev/pci/if_ste.c sc->sc_mii.mii_ifp = ifp;
sc 971 dev/pci/if_ste.c sc->sc_mii.mii_readreg = ste_miibus_readreg;
sc 972 dev/pci/if_ste.c sc->sc_mii.mii_writereg = ste_miibus_writereg;
sc 973 dev/pci/if_ste.c sc->sc_mii.mii_statchg = ste_miibus_statchg;
sc 974 dev/pci/if_ste.c ifmedia_init(&sc->sc_mii.mii_media, 0, ste_ifmedia_upd,ste_ifmedia_sts);
sc 975 dev/pci/if_ste.c mii_attach(self, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY,
sc 977 dev/pci/if_ste.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 978 dev/pci/if_ste.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
sc 979 dev/pci/if_ste.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
sc 981 dev/pci/if_ste.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 989 dev/pci/if_ste.c shutdownhook_establish(ste_shutdown, sc);
sc 993 dev/pci/if_ste.c pci_intr_disestablish(pc, sc->sc_ih);
sc 996 dev/pci/if_ste.c bus_space_unmap(sc->ste_btag, sc->ste_bhandle, size);
sc 1000 dev/pci/if_ste.c ste_newbuf(struct ste_softc *sc, struct ste_chain_onefrag *c, struct mbuf *m)
sc 1031 dev/pci/if_ste.c ste_init_rx_list(struct ste_softc *sc)
sc 1037 dev/pci/if_ste.c cd = &sc->ste_cdata;
sc 1038 dev/pci/if_ste.c ld = sc->ste_ldata;
sc 1042 dev/pci/if_ste.c if (ste_newbuf(sc, &cd->ste_rx_chain[i], NULL) == ENOBUFS)
sc 1064 dev/pci/if_ste.c ste_init_tx_list(struct ste_softc *sc)
sc 1070 dev/pci/if_ste.c cd = &sc->ste_cdata;
sc 1071 dev/pci/if_ste.c ld = sc->ste_ldata;
sc 1095 dev/pci/if_ste.c struct ste_softc *sc = (struct ste_softc *)xsc;
sc 1096 dev/pci/if_ste.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 1102 dev/pci/if_ste.c ste_stop(sc);
sc 1104 dev/pci/if_ste.c mii = &sc->sc_mii;
sc 1108 dev/pci/if_ste.c CSR_WRITE_1(sc, STE_PAR0 + i, sc->arpcom.ac_enaddr[i]);
sc 1112 dev/pci/if_ste.c if (ste_init_rx_list(sc) == ENOBUFS) {
sc 1114 dev/pci/if_ste.c "memory for RX buffers\n", sc->sc_dev.dv_xname);
sc 1115 dev/pci/if_ste.c ste_stop(sc);
sc 1121 dev/pci/if_ste.c CSR_WRITE_1(sc, STE_RX_DMAPOLL_PERIOD, 64);
sc 1124 dev/pci/if_ste.c ste_init_tx_list(sc);
sc 1127 dev/pci/if_ste.c CSR_WRITE_1(sc, STE_TX_DMABURST_THRESH, ETHER_MAX_DIX_LEN >> 8);
sc 1130 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_TX_STARTTHRESH, sc->ste_tx_thresh);
sc 1133 dev/pci/if_ste.c CSR_WRITE_1(sc, STE_TX_RECLAIM_THRESH, (ETHER_MAX_DIX_LEN >> 4));
sc 1136 dev/pci/if_ste.c CSR_WRITE_1(sc, STE_RX_MODE, STE_RXMODE_UNICAST);
sc 1140 dev/pci/if_ste.c STE_SETBIT1(sc, STE_RX_MODE, STE_RXMODE_PROMISC);
sc 1142 dev/pci/if_ste.c STE_CLRBIT1(sc, STE_RX_MODE, STE_RXMODE_PROMISC);
sc 1147 dev/pci/if_ste.c STE_SETBIT1(sc, STE_RX_MODE, STE_RXMODE_BROADCAST);
sc 1149 dev/pci/if_ste.c STE_CLRBIT1(sc, STE_RX_MODE, STE_RXMODE_BROADCAST);
sc 1152 dev/pci/if_ste.c ste_setmulti(sc);
sc 1155 dev/pci/if_ste.c STE_SETBIT4(sc, STE_DMACTL, STE_DMACTL_RXDMA_STALL);
sc 1156 dev/pci/if_ste.c ste_wait(sc);
sc 1157 dev/pci/if_ste.c CSR_WRITE_4(sc, STE_RX_DMALIST_PTR,
sc 1158 dev/pci/if_ste.c vtophys((vaddr_t)&sc->ste_ldata->ste_rx_list[0]));
sc 1159 dev/pci/if_ste.c STE_SETBIT4(sc, STE_DMACTL, STE_DMACTL_RXDMA_UNSTALL);
sc 1160 dev/pci/if_ste.c STE_SETBIT4(sc, STE_DMACTL, STE_DMACTL_RXDMA_UNSTALL);
sc 1163 dev/pci/if_ste.c CSR_WRITE_1(sc, STE_TX_DMAPOLL_PERIOD, 0);
sc 1166 dev/pci/if_ste.c STE_SETBIT4(sc, STE_DMACTL, STE_DMACTL_TXDMA_STALL);
sc 1167 dev/pci/if_ste.c ste_wait(sc);
sc 1168 dev/pci/if_ste.c CSR_WRITE_4(sc, STE_TX_DMALIST_PTR, 0);
sc 1169 dev/pci/if_ste.c STE_SETBIT4(sc, STE_DMACTL, STE_DMACTL_TXDMA_UNSTALL);
sc 1170 dev/pci/if_ste.c STE_SETBIT4(sc, STE_DMACTL, STE_DMACTL_TXDMA_UNSTALL);
sc 1171 dev/pci/if_ste.c ste_wait(sc);
sc 1172 dev/pci/if_ste.c sc->ste_tx_prev=NULL;
sc 1175 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_MACCTL0, 0);
sc 1176 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_MACCTL1, 0);
sc 1177 dev/pci/if_ste.c STE_SETBIT2(sc, STE_MACCTL1, STE_MACCTL1_TX_ENABLE);
sc 1178 dev/pci/if_ste.c STE_SETBIT2(sc, STE_MACCTL1, STE_MACCTL1_RX_ENABLE);
sc 1181 dev/pci/if_ste.c STE_SETBIT2(sc, STE_MACCTL1, STE_MACCTL1_STATS_ENABLE);
sc 1184 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_ISR, 0xFFFF);
sc 1185 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_IMR, STE_INTRS);
sc 1188 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_MAX_FRAMELEN,
sc 1198 dev/pci/if_ste.c timeout_set(&sc->sc_stats_tmo, ste_stats_update, sc);
sc 1199 dev/pci/if_ste.c timeout_add(&sc->sc_stats_tmo, hz);
sc 1205 dev/pci/if_ste.c ste_stop(struct ste_softc *sc)
sc 1210 dev/pci/if_ste.c ifp = &sc->arpcom.ac_if;
sc 1212 dev/pci/if_ste.c timeout_del(&sc->sc_stats_tmo);
sc 1216 dev/pci/if_ste.c CSR_WRITE_2(sc, STE_IMR, 0);
sc 1217 dev/pci/if_ste.c STE_SETBIT2(sc, STE_MACCTL1, STE_MACCTL1_TX_DISABLE);
sc 1218 dev/pci/if_ste.c STE_SETBIT2(sc, STE_MACCTL1, STE_MACCTL1_RX_DISABLE);
sc 1219 dev/pci/if_ste.c STE_SETBIT2(sc, STE_MACCTL1, STE_MACCTL1_STATS_DISABLE);
sc 1220 dev/pci/if_ste.c STE_SETBIT2(sc, STE_DMACTL, STE_DMACTL_TXDMA_STALL);
sc 1221 dev/pci/if_ste.c STE_SETBIT2(sc, STE_DMACTL, STE_DMACTL_RXDMA_STALL);
sc 1222 dev/pci/if_ste.c ste_wait(sc);
sc 1227 dev/pci/if_ste.c ste_reset(sc);
sc 1229 dev/pci/if_ste.c sc->ste_link = 0;
sc 1232 dev/pci/if_ste.c if (sc->ste_cdata.ste_rx_chain[i].ste_mbuf != NULL) {
sc 1233 dev/pci/if_ste.c m_freem(sc->ste_cdata.ste_rx_chain[i].ste_mbuf);
sc 1234 dev/pci/if_ste.c sc->ste_cdata.ste_rx_chain[i].ste_mbuf = NULL;
sc 1239 dev/pci/if_ste.c if (sc->ste_cdata.ste_tx_chain[i].ste_mbuf != NULL) {
sc 1240 dev/pci/if_ste.c m_freem(sc->ste_cdata.ste_tx_chain[i].ste_mbuf);
sc 1241 dev/pci/if_ste.c sc->ste_cdata.ste_tx_chain[i].ste_mbuf = NULL;
sc 1245 dev/pci/if_ste.c bzero(sc->ste_ldata, sizeof(struct ste_list_data));
sc 1251 dev/pci/if_ste.c ste_reset(struct ste_softc *sc)
sc 1255 dev/pci/if_ste.c STE_SETBIT4(sc, STE_ASICCTL,
sc 1265 dev/pci/if_ste.c if (!(CSR_READ_4(sc, STE_ASICCTL) & STE_ASICCTL_RESET_BUSY))
sc 1271 dev/pci/if_ste.c sc->sc_dev.dv_xname);
sc 1277 dev/pci/if_ste.c struct ste_softc *sc = ifp->if_softc;
sc 1285 dev/pci/if_ste.c if ((error = ether_ioctl(ifp, &sc->arpcom, command, data)) > 0) {
sc 1295 dev/pci/if_ste.c ste_init(sc);
sc 1296 dev/pci/if_ste.c arp_ifinit(&sc->arpcom, ifa);
sc 1299 dev/pci/if_ste.c ste_init(sc);
sc 1307 dev/pci/if_ste.c !(sc->ste_if_flags & IFF_PROMISC)) {
sc 1308 dev/pci/if_ste.c STE_SETBIT1(sc, STE_RX_MODE,
sc 1312 dev/pci/if_ste.c sc->ste_if_flags & IFF_PROMISC) {
sc 1313 dev/pci/if_ste.c STE_CLRBIT1(sc, STE_RX_MODE,
sc 1317 dev/pci/if_ste.c (ifp->if_flags ^ sc->ste_if_flags) & IFF_ALLMULTI)
sc 1318 dev/pci/if_ste.c ste_setmulti(sc);
sc 1320 dev/pci/if_ste.c sc->ste_tx_thresh = STE_TXSTART_THRESH;
sc 1321 dev/pci/if_ste.c ste_init(sc);
sc 1325 dev/pci/if_ste.c ste_stop(sc);
sc 1327 dev/pci/if_ste.c sc->ste_if_flags = ifp->if_flags;
sc 1333 dev/pci/if_ste.c ether_addmulti(ifr, &sc->arpcom) :
sc 1334 dev/pci/if_ste.c ether_delmulti(ifr, &sc->arpcom);
sc 1342 dev/pci/if_ste.c ste_setmulti(sc);
sc 1348 dev/pci/if_ste.c mii = &sc->sc_mii;
sc 1362 dev/pci/if_ste.c ste_encap(struct ste_softc *sc, struct ste_chain *c, struct mbuf *m_head)
sc 1423 dev/pci/if_ste.c struct ste_softc *sc;
sc 1428 dev/pci/if_ste.c sc = ifp->if_softc;
sc 1430 dev/pci/if_ste.c if (!sc->ste_link)
sc 1436 dev/pci/if_ste.c idx = sc->ste_cdata.ste_tx_prod;
sc 1438 dev/pci/if_ste.c while(sc->ste_cdata.ste_tx_chain[idx].ste_mbuf == NULL) {
sc 1444 dev/pci/if_ste.c sc->ste_cdata.ste_tx_cons) {
sc 1453 dev/pci/if_ste.c cur_tx = &sc->ste_cdata.ste_tx_chain[idx];
sc 1455 dev/pci/if_ste.c if (ste_encap(sc, cur_tx, m_head) != 0)
sc 1460 dev/pci/if_ste.c if (sc->ste_tx_prev == NULL) {
sc 1463 dev/pci/if_ste.c STE_SETBIT4(sc, STE_DMACTL, STE_DMACTL_TXDMA_STALL);
sc 1464 dev/pci/if_ste.c ste_wait(sc);
sc 1466 dev/pci/if_ste.c CSR_WRITE_4(sc, STE_TX_DMALIST_PTR,
sc 1467 dev/pci/if_ste.c vtophys((vaddr_t)&sc->ste_ldata->ste_tx_list[0]));
sc 1470 dev/pci/if_ste.c CSR_WRITE_1(sc, STE_TX_DMAPOLL_PERIOD, 64);
sc 1472 dev/pci/if_ste.c STE_SETBIT4(sc, STE_DMACTL, STE_DMACTL_TXDMA_UNSTALL);
sc 1473 dev/pci/if_ste.c ste_wait(sc);
sc 1476 dev/pci/if_ste.c sc->ste_tx_prev->ste_ptr->ste_next
sc 1480 dev/pci/if_ste.c sc->ste_tx_prev = cur_tx;
sc 1495 dev/pci/if_ste.c sc->ste_cdata.ste_tx_prod = idx;
sc 1503 dev/pci/if_ste.c struct ste_softc *sc;
sc 1505 dev/pci/if_ste.c sc = ifp->if_softc;
sc 1508 dev/pci/if_ste.c printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
sc 1510 dev/pci/if_ste.c ste_txeoc(sc);
sc 1511 dev/pci/if_ste.c ste_txeof(sc);
sc 1512 dev/pci/if_ste.c ste_rxeoc(sc);
sc 1513 dev/pci/if_ste.c ste_rxeof(sc);
sc 1514 dev/pci/if_ste.c ste_reset(sc);
sc 1515 dev/pci/if_ste.c ste_init(sc);
sc 1526 dev/pci/if_ste.c struct ste_softc *sc = (struct ste_softc *)v;
sc 1528 dev/pci/if_ste.c ste_stop(sc);
sc 451 dev/pci/if_stereg.h #define CSR_WRITE_4(sc, reg, val) \
sc 452 dev/pci/if_stereg.h bus_space_write_4(sc->ste_btag, sc->ste_bhandle, reg, val)
sc 453 dev/pci/if_stereg.h #define CSR_WRITE_2(sc, reg, val) \
sc 454 dev/pci/if_stereg.h bus_space_write_2(sc->ste_btag, sc->ste_bhandle, reg, val)
sc 455 dev/pci/if_stereg.h #define CSR_WRITE_1(sc, reg, val) \
sc 456 dev/pci/if_stereg.h bus_space_write_1(sc->ste_btag, sc->ste_bhandle, reg, val)
sc 458 dev/pci/if_stereg.h #define CSR_READ_4(sc, reg) \
sc 459 dev/pci/if_stereg.h bus_space_read_4(sc->ste_btag, sc->ste_bhandle, reg)
sc 460 dev/pci/if_stereg.h #define CSR_READ_2(sc, reg) \
sc 461 dev/pci/if_stereg.h bus_space_read_2(sc->ste_btag, sc->ste_bhandle, reg)
sc 462 dev/pci/if_stereg.h #define CSR_READ_1(sc, reg) \
sc 463 dev/pci/if_stereg.h bus_space_read_1(sc->ste_btag, sc->ste_bhandle, reg)
sc 180 dev/pci/if_stge.c struct stge_softc *sc = (struct stge_softc *) self;
sc 182 dev/pci/if_stge.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 195 dev/pci/if_stge.c timeout_set(&sc->sc_timeout, stge_tick, sc);
sc 197 dev/pci/if_stge.c sc->sc_rev = PCI_REVISION(pa->pa_class);
sc 210 dev/pci/if_stge.c sc->sc_st = memt;
sc 211 dev/pci/if_stge.c sc->sc_sh = memh;
sc 213 dev/pci/if_stge.c sc->sc_st = iot;
sc 214 dev/pci/if_stge.c sc->sc_sh = ioh;
sc 220 dev/pci/if_stge.c sc->sc_dmat = pa->pa_dmat;
sc 249 dev/pci/if_stge.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, stge_intr, sc,
sc 250 dev/pci/if_stge.c sc->sc_dev.dv_xname);
sc 251 dev/pci/if_stge.c if (sc->sc_ih == NULL) {
sc 264 dev/pci/if_stge.c if ((error = bus_dmamem_alloc(sc->sc_dmat,
sc 268 dev/pci/if_stge.c sc->sc_dev.dv_xname, error);
sc 272 dev/pci/if_stge.c if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
sc 273 dev/pci/if_stge.c sizeof(struct stge_control_data), (caddr_t *)&sc->sc_control_data,
sc 276 dev/pci/if_stge.c sc->sc_dev.dv_xname, error);
sc 280 dev/pci/if_stge.c if ((error = bus_dmamap_create(sc->sc_dmat,
sc 282 dev/pci/if_stge.c sizeof(struct stge_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
sc 284 dev/pci/if_stge.c "error = %d\n", sc->sc_dev.dv_xname, error);
sc 288 dev/pci/if_stge.c if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
sc 289 dev/pci/if_stge.c sc->sc_control_data, sizeof(struct stge_control_data), NULL,
sc 292 dev/pci/if_stge.c sc->sc_dev.dv_xname, error);
sc 303 dev/pci/if_stge.c if ((error = bus_dmamap_create(sc->sc_dmat,
sc 305 dev/pci/if_stge.c &sc->sc_txsoft[i].ds_dmamap)) != 0) {
sc 307 dev/pci/if_stge.c "error = %d\n", sc->sc_dev.dv_xname, i, error);
sc 316 dev/pci/if_stge.c if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 317 dev/pci/if_stge.c MCLBYTES, 0, 0, &sc->sc_rxsoft[i].ds_dmamap)) != 0) {
sc 319 dev/pci/if_stge.c "error = %d\n", sc->sc_dev.dv_xname, i, error);
sc 322 dev/pci/if_stge.c sc->sc_rxsoft[i].ds_mbuf = NULL;
sc 329 dev/pci/if_stge.c if (CSR_READ_4(sc, STGE_AsicCtrl) & AC_PhyMedia)
sc 330 dev/pci/if_stge.c sc->sc_usefiber = 1;
sc 332 dev/pci/if_stge.c sc->sc_usefiber = 0;
sc 337 dev/pci/if_stge.c stge_reset(sc);
sc 347 dev/pci/if_stge.c sc->sc_arpcom.ac_enaddr[0] = CSR_READ_2(sc,
sc 349 dev/pci/if_stge.c sc->sc_arpcom.ac_enaddr[1] = CSR_READ_2(sc,
sc 351 dev/pci/if_stge.c sc->sc_arpcom.ac_enaddr[2] = CSR_READ_2(sc,
sc 353 dev/pci/if_stge.c sc->sc_arpcom.ac_enaddr[3] = CSR_READ_2(sc,
sc 355 dev/pci/if_stge.c sc->sc_arpcom.ac_enaddr[4] = CSR_READ_2(sc,
sc 357 dev/pci/if_stge.c sc->sc_arpcom.ac_enaddr[5] = CSR_READ_2(sc,
sc 359 dev/pci/if_stge.c sc->sc_stge1023 = 0;
sc 363 dev/pci/if_stge.c stge_read_eeprom(sc, STGE_EEPROM_StationAddress0 + i,
sc 367 dev/pci/if_stge.c (void)memcpy(sc->sc_arpcom.ac_enaddr, myaddr,
sc 368 dev/pci/if_stge.c sizeof(sc->sc_arpcom.ac_enaddr));
sc 369 dev/pci/if_stge.c sc->sc_stge1023 = 1;
sc 372 dev/pci/if_stge.c printf(", address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 377 dev/pci/if_stge.c sc->sc_PhyCtrl = CSR_READ_1(sc, STGE_PhyCtrl) &
sc 383 dev/pci/if_stge.c sc->sc_mii.mii_ifp = ifp;
sc 384 dev/pci/if_stge.c sc->sc_mii.mii_readreg = stge_mii_readreg;
sc 385 dev/pci/if_stge.c sc->sc_mii.mii_writereg = stge_mii_writereg;
sc 386 dev/pci/if_stge.c sc->sc_mii.mii_statchg = stge_mii_statchg;
sc 387 dev/pci/if_stge.c ifmedia_init(&sc->sc_mii.mii_media, 0, stge_mediachange,
sc 389 dev/pci/if_stge.c mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
sc 391 dev/pci/if_stge.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 392 dev/pci/if_stge.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
sc 393 dev/pci/if_stge.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
sc 395 dev/pci/if_stge.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 397 dev/pci/if_stge.c ifp = &sc->sc_arpcom.ac_if;
sc 398 dev/pci/if_stge.c strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, sizeof ifp->if_xname);
sc 399 dev/pci/if_stge.c ifp->if_softc = sc;
sc 418 dev/pci/if_stge.c sc->sc_txthresh = 0x0fff;
sc 423 dev/pci/if_stge.c sc->sc_DMACtrl = 0;
sc 426 dev/pci/if_stge.c sc->sc_DMACtrl |= DMAC_MWIDisable;
sc 433 dev/pci/if_stge.c sc->sc_arpcom.ac_if.if_capabilities |= IFCAP_CSUM_IPv4 |
sc 446 dev/pci/if_stge.c sc->sc_sdhook = shutdownhook_establish(stge_shutdown, sc);
sc 447 dev/pci/if_stge.c if (sc->sc_sdhook == NULL)
sc 449 dev/pci/if_stge.c sc->sc_dev.dv_xname);
sc 458 dev/pci/if_stge.c if (sc->sc_rxsoft[i].ds_dmamap != NULL)
sc 459 dev/pci/if_stge.c bus_dmamap_destroy(sc->sc_dmat,
sc 460 dev/pci/if_stge.c sc->sc_rxsoft[i].ds_dmamap);
sc 464 dev/pci/if_stge.c if (sc->sc_txsoft[i].ds_dmamap != NULL)
sc 465 dev/pci/if_stge.c bus_dmamap_destroy(sc->sc_dmat,
sc 466 dev/pci/if_stge.c sc->sc_txsoft[i].ds_dmamap);
sc 468 dev/pci/if_stge.c bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
sc 470 dev/pci/if_stge.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
sc 472 dev/pci/if_stge.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_control_data,
sc 475 dev/pci/if_stge.c bus_dmamem_free(sc->sc_dmat, &seg, rseg);
sc 477 dev/pci/if_stge.c bus_space_unmap(sc->sc_st, sc->sc_sh, iosize);
sc 489 dev/pci/if_stge.c struct stge_softc *sc = arg;
sc 491 dev/pci/if_stge.c stge_stop(&sc->sc_arpcom.ac_if, 1);
sc 495 dev/pci/if_stge.c stge_dma_wait(struct stge_softc *sc)
sc 501 dev/pci/if_stge.c if ((CSR_READ_4(sc, STGE_DMACtrl) & DMAC_TxDMAInProg) == 0)
sc 506 dev/pci/if_stge.c printf("%s: DMA wait timed out\n", sc->sc_dev.dv_xname);
sc 517 dev/pci/if_stge.c struct stge_softc *sc = ifp->if_softc;
sc 532 dev/pci/if_stge.c opending = sc->sc_txpending;
sc 533 dev/pci/if_stge.c firsttx = STGE_NEXTTX(sc->sc_txlast);
sc 552 dev/pci/if_stge.c if (sc->sc_txpending == (STGE_NTXDESC - 1))
sc 558 dev/pci/if_stge.c nexttx = STGE_NEXTTX(sc->sc_txlast);
sc 559 dev/pci/if_stge.c tfd = &sc->sc_txdescs[nexttx];
sc 560 dev/pci/if_stge.c ds = &sc->sc_txsoft[nexttx];
sc 572 dev/pci/if_stge.c error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, m0,
sc 578 dev/pci/if_stge.c sc->sc_dev.dv_xname, dmamap->dm_nsegs);
sc 596 dev/pci/if_stge.c bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
sc 631 dev/pci/if_stge.c STGE_CDTXSYNC(sc, nexttx,
sc 637 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_DMACtrl,
sc 638 dev/pci/if_stge.c sc->sc_DMACtrl | DMAC_TxDMAPollNow);
sc 646 dev/pci/if_stge.c sc->sc_txpending++;
sc 647 dev/pci/if_stge.c sc->sc_txlast = nexttx;
sc 658 dev/pci/if_stge.c if (sc->sc_txpending == (STGE_NTXDESC - 1)) {
sc 663 dev/pci/if_stge.c if (sc->sc_txpending != opending) {
sc 669 dev/pci/if_stge.c sc->sc_txdirty = firsttx;
sc 684 dev/pci/if_stge.c struct stge_softc *sc = ifp->if_softc;
sc 689 dev/pci/if_stge.c stge_txintr(sc);
sc 690 dev/pci/if_stge.c if (sc->sc_txpending != 0) {
sc 691 dev/pci/if_stge.c printf("%s: device timeout\n", sc->sc_dev.dv_xname);
sc 709 dev/pci/if_stge.c struct stge_softc *sc = ifp->if_softc;
sc 716 dev/pci/if_stge.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 732 dev/pci/if_stge.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 746 dev/pci/if_stge.c (ifp->if_flags ^ sc->stge_if_flags) &
sc 748 dev/pci/if_stge.c stge_set_filter(sc);
sc 757 dev/pci/if_stge.c sc->stge_if_flags = ifp->if_flags;
sc 763 dev/pci/if_stge.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 764 dev/pci/if_stge.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 772 dev/pci/if_stge.c stge_set_filter(sc);
sc 779 dev/pci/if_stge.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
sc 801 dev/pci/if_stge.c struct stge_softc *sc = arg;
sc 802 dev/pci/if_stge.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 807 dev/pci/if_stge.c if ((CSR_READ_2(sc, STGE_IntStatus) & IS_InterruptStatus) == 0)
sc 811 dev/pci/if_stge.c isr = CSR_READ_2(sc, STGE_IntStatusAck);
sc 812 dev/pci/if_stge.c if ((isr & sc->sc_IntEnable) == 0)
sc 818 dev/pci/if_stge.c sc->sc_dev.dv_xname);
sc 825 dev/pci/if_stge.c stge_rxintr(sc);
sc 828 dev/pci/if_stge.c sc->sc_dev.dv_xname);
sc 839 dev/pci/if_stge.c stge_txintr(sc);
sc 843 dev/pci/if_stge.c stge_stats_update(sc);
sc 848 dev/pci/if_stge.c txstat = CSR_READ_4(sc, STGE_TxStatus);
sc 852 dev/pci/if_stge.c sc->sc_txthresh++;
sc 853 dev/pci/if_stge.c if (sc->sc_txthresh > 0x0fff)
sc 854 dev/pci/if_stge.c sc->sc_txthresh = 0x0fff;
sc 857 dev/pci/if_stge.c sc->sc_dev.dv_xname,
sc 858 dev/pci/if_stge.c sc->sc_txthresh << 5);
sc 862 dev/pci/if_stge.c sc->sc_dev.dv_xname);
sc 872 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_IntEnable, sc->sc_IntEnable);
sc 886 dev/pci/if_stge.c stge_txintr(struct stge_softc *sc)
sc 888 dev/pci/if_stge.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 899 dev/pci/if_stge.c for (i = sc->sc_txdirty; sc->sc_txpending != 0;
sc 900 dev/pci/if_stge.c i = STGE_NEXTTX(i), sc->sc_txpending--) {
sc 901 dev/pci/if_stge.c ds = &sc->sc_txsoft[i];
sc 903 dev/pci/if_stge.c STGE_CDTXSYNC(sc, i,
sc 906 dev/pci/if_stge.c control = letoh64(sc->sc_txdescs[i].tfd_control);
sc 910 dev/pci/if_stge.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap,
sc 912 dev/pci/if_stge.c bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
sc 918 dev/pci/if_stge.c sc->sc_txdirty = i;
sc 924 dev/pci/if_stge.c if (sc->sc_txpending == 0)
sc 934 dev/pci/if_stge.c stge_rxintr(struct stge_softc *sc)
sc 936 dev/pci/if_stge.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 942 dev/pci/if_stge.c for (i = sc->sc_rxptr;; i = STGE_NEXTRX(i)) {
sc 943 dev/pci/if_stge.c ds = &sc->sc_rxsoft[i];
sc 945 dev/pci/if_stge.c STGE_CDRXSYNC(sc, i,
sc 948 dev/pci/if_stge.c status = letoh64(sc->sc_rxdescs[i].rfd_status);
sc 953 dev/pci/if_stge.c if (__predict_false(sc->sc_rxdiscard)) {
sc 954 dev/pci/if_stge.c STGE_INIT_RXDESC(sc, i);
sc 957 dev/pci/if_stge.c sc->sc_rxdiscard = 0;
sc 962 dev/pci/if_stge.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
sc 970 dev/pci/if_stge.c if (stge_add_rxbuf(sc, i) != 0) {
sc 976 dev/pci/if_stge.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
sc 978 dev/pci/if_stge.c STGE_INIT_RXDESC(sc, i);
sc 980 dev/pci/if_stge.c sc->sc_rxdiscard = 1;
sc 981 dev/pci/if_stge.c if (sc->sc_rxhead != NULL)
sc 982 dev/pci/if_stge.c m_freem(sc->sc_rxhead);
sc 983 dev/pci/if_stge.c STGE_RXCHAIN_RESET(sc);
sc 989 dev/pci/if_stge.c KASSERT(sc->sc_rxhead == NULL);
sc 990 dev/pci/if_stge.c KASSERT(sc->sc_rxtailp == &sc->sc_rxhead);
sc 994 dev/pci/if_stge.c STGE_RXCHAIN_LINK(sc, m);
sc 1001 dev/pci/if_stge.c sc->sc_rxlen += m->m_len;
sc 1008 dev/pci/if_stge.c *sc->sc_rxtailp = NULL;
sc 1009 dev/pci/if_stge.c m = sc->sc_rxhead;
sc 1010 dev/pci/if_stge.c tailm = sc->sc_rxtail;
sc 1012 dev/pci/if_stge.c STGE_RXCHAIN_RESET(sc);
sc 1032 dev/pci/if_stge.c tailm->m_len = len - sc->sc_rxlen;
sc 1087 dev/pci/if_stge.c sc->sc_rxptr = i;
sc 1098 dev/pci/if_stge.c struct stge_softc *sc = arg;
sc 1102 dev/pci/if_stge.c mii_tick(&sc->sc_mii);
sc 1103 dev/pci/if_stge.c stge_stats_update(sc);
sc 1106 dev/pci/if_stge.c timeout_add(&sc->sc_timeout, hz);
sc 1115 dev/pci/if_stge.c stge_stats_update(struct stge_softc *sc)
sc 1117 dev/pci/if_stge.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1119 dev/pci/if_stge.c (void) CSR_READ_4(sc, STGE_OctetRcvOk);
sc 1122 dev/pci/if_stge.c CSR_READ_4(sc, STGE_FramesRcvdOk);
sc 1125 dev/pci/if_stge.c (u_int) CSR_READ_2(sc, STGE_FramesLostRxErrors);
sc 1127 dev/pci/if_stge.c (void) CSR_READ_4(sc, STGE_OctetXmtdOk);
sc 1130 dev/pci/if_stge.c CSR_READ_4(sc, STGE_FramesXmtdOk);
sc 1133 dev/pci/if_stge.c CSR_READ_4(sc, STGE_LateCollisions) +
sc 1134 dev/pci/if_stge.c CSR_READ_4(sc, STGE_MultiColFrames) +
sc 1135 dev/pci/if_stge.c CSR_READ_4(sc, STGE_SingleColFrames);
sc 1138 dev/pci/if_stge.c (u_int) CSR_READ_2(sc, STGE_FramesAbortXSColls) +
sc 1139 dev/pci/if_stge.c (u_int) CSR_READ_2(sc, STGE_FramesWEXDeferal);
sc 1148 dev/pci/if_stge.c stge_reset(struct stge_softc *sc)
sc 1153 dev/pci/if_stge.c ac = CSR_READ_4(sc, STGE_AsicCtrl);
sc 1160 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_AsicCtrl,
sc 1163 dev/pci/if_stge.c (sc->sc_usefiber ? AC_RstOut : 0));
sc 1169 dev/pci/if_stge.c if ((CSR_READ_4(sc, STGE_AsicCtrl) & AC_ResetBusy) == 0)
sc 1174 dev/pci/if_stge.c printf("%s: reset failed to complete\n", sc->sc_dev.dv_xname);
sc 1187 dev/pci/if_stge.c struct stge_softc *sc = ifp->if_softc;
sc 1199 dev/pci/if_stge.c stge_reset(sc);
sc 1204 dev/pci/if_stge.c memset(sc->sc_txdescs, 0, sizeof(sc->sc_txdescs));
sc 1206 dev/pci/if_stge.c sc->sc_txdescs[i].tfd_next = htole64(
sc 1207 dev/pci/if_stge.c STGE_CDTXADDR(sc, STGE_NEXTTX(i)));
sc 1208 dev/pci/if_stge.c sc->sc_txdescs[i].tfd_control = htole64(TFD_TFDDone);
sc 1210 dev/pci/if_stge.c sc->sc_txpending = 0;
sc 1211 dev/pci/if_stge.c sc->sc_txdirty = 0;
sc 1212 dev/pci/if_stge.c sc->sc_txlast = STGE_NTXDESC - 1;
sc 1219 dev/pci/if_stge.c ds = &sc->sc_rxsoft[i];
sc 1221 dev/pci/if_stge.c if ((error = stge_add_rxbuf(sc, i)) != 0) {
sc 1224 dev/pci/if_stge.c sc->sc_dev.dv_xname, i, error);
sc 1229 dev/pci/if_stge.c stge_rxdrain(sc);
sc 1233 dev/pci/if_stge.c STGE_INIT_RXDESC(sc, i);
sc 1235 dev/pci/if_stge.c sc->sc_rxptr = 0;
sc 1236 dev/pci/if_stge.c sc->sc_rxdiscard = 0;
sc 1237 dev/pci/if_stge.c STGE_RXCHAIN_RESET(sc);
sc 1241 dev/pci/if_stge.c CSR_WRITE_1(sc, STGE_StationAddress0 + i,
sc 1242 dev/pci/if_stge.c sc->sc_arpcom.ac_enaddr[i]);
sc 1248 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_RMONStatisticsMask, 0xffffffff);
sc 1249 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_StatisticsMask,
sc 1256 dev/pci/if_stge.c stge_set_filter(sc);
sc 1261 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_TFDListPtrHi, 0); /* NOTE: 32-bit DMA */
sc 1262 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_TFDListPtrLo,
sc 1263 dev/pci/if_stge.c STGE_CDTXADDR(sc, sc->sc_txdirty));
sc 1265 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_RFDListPtrHi, 0); /* NOTE: 32-bit DMA */
sc 1266 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_RFDListPtrLo,
sc 1267 dev/pci/if_stge.c STGE_CDRXADDR(sc, sc->sc_rxptr));
sc 1274 dev/pci/if_stge.c CSR_WRITE_1(sc, STGE_TxDMAPollPeriod, 127);
sc 1277 dev/pci/if_stge.c CSR_WRITE_1(sc, STGE_RxDMAPollPeriod, 64);
sc 1280 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_TxStartThresh, sc->sc_txthresh);
sc 1283 dev/pci/if_stge.c CSR_WRITE_1(sc, STGE_RxDMABurstThresh, 0x30);
sc 1284 dev/pci/if_stge.c CSR_WRITE_1(sc, STGE_RxDMAUrgentThresh, 0x30);
sc 1287 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_RxEarlyThresh, 0x7ff);
sc 1290 dev/pci/if_stge.c CSR_WRITE_1(sc, STGE_TxDMABurstThresh, 0x30);
sc 1291 dev/pci/if_stge.c CSR_WRITE_1(sc, STGE_TxDMAUrgentThresh, 0x04);
sc 1300 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_RxDMAIntCtrl,
sc 1306 dev/pci/if_stge.c sc->sc_IntEnable = IS_HostError | IS_TxComplete | IS_UpdateStats |
sc 1308 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_IntStatus, 0xffff);
sc 1309 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_IntEnable, sc->sc_IntEnable);
sc 1315 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_DMACtrl, sc->sc_DMACtrl |
sc 1323 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_FlowOnTresh, 29696 / 16);
sc 1324 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_FlowOffThresh, 0);
sc 1330 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_MaxFrameSize, STGE_JUMBO_FRAMELEN);
sc 1332 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_MaxFrameSize, ETHER_MAX_LEN);
sc 1342 dev/pci/if_stge.c sc->sc_MACCtrl = MC_IFSSelect(0);
sc 1343 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_MACCtrl, sc->sc_MACCtrl);
sc 1344 dev/pci/if_stge.c sc->sc_MACCtrl |= MC_StatisticsEnable | MC_TxEnable | MC_RxEnable;
sc 1346 dev/pci/if_stge.c if (sc->sc_rev >= 6) { /* >= B.2 */
sc 1348 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_DebugCtrl,
sc 1349 dev/pci/if_stge.c CSR_READ_2(sc, STGE_DebugCtrl) | 0x0200);
sc 1352 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_DebugCtrl,
sc 1353 dev/pci/if_stge.c CSR_READ_2(sc, STGE_DebugCtrl) | 0x0010);
sc 1355 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_DebugCtrl,
sc 1356 dev/pci/if_stge.c CSR_READ_2(sc, STGE_DebugCtrl) | 0x0020);
sc 1362 dev/pci/if_stge.c mii_mediachg(&sc->sc_mii);
sc 1367 dev/pci/if_stge.c timeout_add(&sc->sc_timeout, hz);
sc 1377 dev/pci/if_stge.c printf("%s: interface not running\n", sc->sc_dev.dv_xname);
sc 1387 dev/pci/if_stge.c stge_rxdrain(struct stge_softc *sc)
sc 1393 dev/pci/if_stge.c ds = &sc->sc_rxsoft[i];
sc 1395 dev/pci/if_stge.c bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
sc 1411 dev/pci/if_stge.c struct stge_softc *sc = ifp->if_softc;
sc 1418 dev/pci/if_stge.c timeout_del(&sc->sc_timeout);
sc 1427 dev/pci/if_stge.c mii_down(&sc->sc_mii);
sc 1432 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_IntEnable, 0);
sc 1437 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_MACCtrl,
sc 1443 dev/pci/if_stge.c stge_dma_wait(sc);
sc 1444 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_TFDListPtrHi, 0);
sc 1445 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_TFDListPtrLo, 0);
sc 1446 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_RFDListPtrHi, 0);
sc 1447 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_RFDListPtrLo, 0);
sc 1453 dev/pci/if_stge.c ds = &sc->sc_txsoft[i];
sc 1455 dev/pci/if_stge.c bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
sc 1462 dev/pci/if_stge.c stge_rxdrain(sc);
sc 1466 dev/pci/if_stge.c stge_eeprom_wait(struct stge_softc *sc)
sc 1472 dev/pci/if_stge.c if ((CSR_READ_2(sc, STGE_EepromCtrl) & EC_EepromBusy) == 0)
sc 1484 dev/pci/if_stge.c stge_read_eeprom(struct stge_softc *sc, int offset, uint16_t *data)
sc 1487 dev/pci/if_stge.c if (stge_eeprom_wait(sc))
sc 1489 dev/pci/if_stge.c sc->sc_dev.dv_xname);
sc 1491 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_EepromCtrl,
sc 1493 dev/pci/if_stge.c if (stge_eeprom_wait(sc))
sc 1495 dev/pci/if_stge.c sc->sc_dev.dv_xname);
sc 1496 dev/pci/if_stge.c *data = CSR_READ_2(sc, STGE_EepromData);
sc 1505 dev/pci/if_stge.c stge_add_rxbuf(struct stge_softc *sc, int idx)
sc 1507 dev/pci/if_stge.c struct stge_descsoft *ds = &sc->sc_rxsoft[idx];
sc 1525 dev/pci/if_stge.c bus_dmamap_unload(sc->sc_dmat, ds->ds_dmamap);
sc 1529 dev/pci/if_stge.c error = bus_dmamap_load(sc->sc_dmat, ds->ds_dmamap,
sc 1533 dev/pci/if_stge.c sc->sc_dev.dv_xname, idx, error);
sc 1537 dev/pci/if_stge.c bus_dmamap_sync(sc->sc_dmat, ds->ds_dmamap, 0,
sc 1540 dev/pci/if_stge.c STGE_INIT_RXDESC(sc, idx);
sc 1551 dev/pci/if_stge.c stge_set_filter(struct stge_softc *sc)
sc 1553 dev/pci/if_stge.c struct arpcom *ac = &sc->sc_arpcom;
sc 1554 dev/pci/if_stge.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1560 dev/pci/if_stge.c sc->sc_ReceiveMode = RM_ReceiveUnicast;
sc 1562 dev/pci/if_stge.c sc->sc_ReceiveMode |= RM_ReceiveBroadcast;
sc 1565 dev/pci/if_stge.c if (sc->sc_stge1023)
sc 1569 dev/pci/if_stge.c sc->sc_ReceiveMode |= RM_ReceiveAllFrames;
sc 1611 dev/pci/if_stge.c sc->sc_ReceiveMode |= RM_ReceiveMulticastHash;
sc 1618 dev/pci/if_stge.c sc->sc_ReceiveMode |= RM_ReceiveMulticast;
sc 1625 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_HashTable0, mchash[0]);
sc 1626 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_HashTable1, mchash[1]);
sc 1629 dev/pci/if_stge.c CSR_WRITE_2(sc, STGE_ReceiveMode, sc->sc_ReceiveMode);
sc 1664 dev/pci/if_stge.c struct stge_softc *sc = (struct stge_softc *) self;
sc 1666 dev/pci/if_stge.c if (sc->sc_mii.mii_media_active & IFM_FDX)
sc 1667 dev/pci/if_stge.c sc->sc_MACCtrl |= MC_DuplexSelect;
sc 1669 dev/pci/if_stge.c sc->sc_MACCtrl &= ~MC_DuplexSelect;
sc 1673 dev/pci/if_stge.c CSR_WRITE_4(sc, STGE_MACCtrl, sc->sc_MACCtrl);
sc 1684 dev/pci/if_stge.c struct stge_softc *sc = (void *) self;
sc 1686 dev/pci/if_stge.c return (CSR_READ_1(sc, STGE_PhyCtrl));
sc 1697 dev/pci/if_stge.c struct stge_softc *sc = (void *) self;
sc 1699 dev/pci/if_stge.c CSR_WRITE_1(sc, STGE_PhyCtrl, val | sc->sc_PhyCtrl);
sc 1710 dev/pci/if_stge.c struct stge_softc *sc = ifp->if_softc;
sc 1712 dev/pci/if_stge.c mii_pollstat(&sc->sc_mii);
sc 1713 dev/pci/if_stge.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 1714 dev/pci/if_stge.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 1725 dev/pci/if_stge.c struct stge_softc *sc = ifp->if_softc;
sc 1728 dev/pci/if_stge.c mii_mediachg(&sc->sc_mii);
sc 585 dev/pci/if_stgereg.h #define STGE_RXCHAIN_RESET(sc) \
sc 587 dev/pci/if_stgereg.h (sc)->sc_rxtailp = &(sc)->sc_rxhead; \
sc 588 dev/pci/if_stgereg.h *(sc)->sc_rxtailp = NULL; \
sc 589 dev/pci/if_stgereg.h (sc)->sc_rxlen = 0; \
sc 592 dev/pci/if_stgereg.h #define STGE_RXCHAIN_LINK(sc, m) \
sc 594 dev/pci/if_stgereg.h *(sc)->sc_rxtailp = (sc)->sc_rxtail = (m); \
sc 595 dev/pci/if_stgereg.h (sc)->sc_rxtailp = &(m)->m_next; \
sc 598 dev/pci/if_stgereg.h #define STGE_CDTXADDR(sc, x) ((sc)->sc_cddma + STGE_CDTXOFF((x)))
sc 599 dev/pci/if_stgereg.h #define STGE_CDRXADDR(sc, x) ((sc)->sc_cddma + STGE_CDRXOFF((x)))
sc 601 dev/pci/if_stgereg.h #define STGE_CDTXSYNC(sc, x, ops) \
sc 602 dev/pci/if_stgereg.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 605 dev/pci/if_stgereg.h #define STGE_CDRXSYNC(sc, x, ops) \
sc 606 dev/pci/if_stgereg.h bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \
sc 609 dev/pci/if_stgereg.h #define STGE_INIT_RXDESC(sc, x) \
sc 611 dev/pci/if_stgereg.h struct stge_descsoft *__ds = &(sc)->sc_rxsoft[(x)]; \
sc 612 dev/pci/if_stgereg.h struct stge_rfd *__rfd = &(sc)->sc_rxdescs[(x)]; \
sc 623 dev/pci/if_stgereg.h htole64((uint64_t)STGE_CDRXADDR((sc), STGE_NEXTRX((x)))); \
sc 625 dev/pci/if_stgereg.h STGE_CDRXSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
sc 596 dev/pci/if_tht.c void tht_txf(struct tht_softc *sc);
sc 684 dev/pci/if_tht.c struct thtc_softc *sc = (struct thtc_softc *)self;
sc 694 dev/pci/if_tht.c sc->sc_dmat = pa->pa_dmat;
sc 697 dev/pci/if_tht.c if (pci_mapreg_map(pa, THT_PCI_BAR, memtype, 0, &sc->sc_memt,
sc 698 dev/pci/if_tht.c &sc->sc_memh, NULL, &sc->sc_mems, 0) != 0) {
sc 719 dev/pci/if_tht.c bus_space_unmap(sc->sc_memt, sc->sc_memh, sc->sc_mems);
sc 720 dev/pci/if_tht.c sc->sc_mems = 0;
sc 746 dev/pci/if_tht.c struct tht_softc *sc = (struct tht_softc *)self;
sc 750 dev/pci/if_tht.c sc->sc_thtc = csc;
sc 751 dev/pci/if_tht.c sc->sc_port = taa->taa_port;
sc 752 dev/pci/if_tht.c sc->sc_imr = THT_IMR_DOWN(sc->sc_port);
sc 753 dev/pci/if_tht.c rw_init(&sc->sc_lock, "thtioc");
sc 756 dev/pci/if_tht.c THT_PORT_REGION(sc->sc_port), THT_PORT_SIZE,
sc 757 dev/pci/if_tht.c &sc->sc_memh) != 0) {
sc 762 dev/pci/if_tht.c if (tht_sw_reset(sc) != 0) {
sc 768 dev/pci/if_tht.c sc->sc_ih = pci_intr_establish(taa->taa_pa->pa_pc, taa->taa_ih,
sc 769 dev/pci/if_tht.c IPL_NET, tht_intr, sc, DEVNAME(sc));
sc 770 dev/pci/if_tht.c if (sc->sc_ih == NULL) {
sc 776 dev/pci/if_tht.c tht_lladdr_read(sc);
sc 777 dev/pci/if_tht.c bcopy(sc->sc_lladdr, sc->sc_ac.ac_enaddr, ETHER_ADDR_LEN);
sc 779 dev/pci/if_tht.c ifp = &sc->sc_ac.ac_if;
sc 780 dev/pci/if_tht.c ifp->if_softc = sc;
sc 788 dev/pci/if_tht.c strlcpy(ifp->if_xname, DEVNAME(sc), IFNAMSIZ);
sc 792 dev/pci/if_tht.c ifmedia_init(&sc->sc_media, 0, tht_media_change, tht_media_status);
sc 793 dev/pci/if_tht.c ifmedia_add(&sc->sc_media, IFM_ETHER|IFM_AUTO, 0, NULL);
sc 794 dev/pci/if_tht.c ifmedia_set(&sc->sc_media, IFM_ETHER|IFM_AUTO);
sc 799 dev/pci/if_tht.c printf(": address %s\n", ether_sprintf(sc->sc_ac.ac_enaddr));
sc 801 dev/pci/if_tht.c mountroothook_establish(tht_mountroot, sc);
sc 807 dev/pci/if_tht.c struct tht_softc *sc = arg;
sc 809 dev/pci/if_tht.c if (tht_fifo_alloc(sc, &sc->sc_txt, &tht_txt_desc) != 0)
sc 812 dev/pci/if_tht.c if (tht_fw_load(sc) != 0)
sc 813 dev/pci/if_tht.c printf("%s: firmware load failed\n", DEVNAME(sc));
sc 815 dev/pci/if_tht.c tht_sw_reset(sc);
sc 817 dev/pci/if_tht.c tht_fifo_free(sc, &sc->sc_txt);
sc 819 dev/pci/if_tht.c tht_link_state(sc);
sc 820 dev/pci/if_tht.c tht_write(sc, THT_REG_IMR, sc->sc_imr);
sc 826 dev/pci/if_tht.c struct tht_softc *sc = arg;
sc 830 dev/pci/if_tht.c isr = tht_read(sc, THT_REG_ISR);
sc 832 dev/pci/if_tht.c tht_write(sc, THT_REG_IMR, sc->sc_imr);
sc 836 dev/pci/if_tht.c DPRINTF(THT_D_INTR, "%s: isr: 0x%b\n", DEVNAME(sc), isr, THT_FMT_ISR);
sc 839 dev/pci/if_tht.c tht_link_state(sc);
sc 841 dev/pci/if_tht.c ifp = &sc->sc_ac.ac_if;
sc 844 dev/pci/if_tht.c tht_rxd(sc);
sc 847 dev/pci/if_tht.c tht_rxf_fill(sc, 0);
sc 850 dev/pci/if_tht.c tht_txf(sc);
sc 855 dev/pci/if_tht.c tht_write(sc, THT_REG_IMR, sc->sc_imr);
sc 862 dev/pci/if_tht.c struct tht_softc *sc = ifp->if_softc;
sc 868 dev/pci/if_tht.c rw_enter_write(&sc->sc_lock);
sc 871 dev/pci/if_tht.c error = ether_ioctl(ifp, &sc->sc_ac, cmd, addr);
sc 881 dev/pci/if_tht.c arp_ifinit(&sc->sc_ac, ifa);
sc 889 dev/pci/if_tht.c tht_iff(sc);
sc 891 dev/pci/if_tht.c tht_up(sc);
sc 894 dev/pci/if_tht.c tht_down(sc);
sc 906 dev/pci/if_tht.c error = ether_addmulti(ifr, &sc->sc_ac);
sc 909 dev/pci/if_tht.c error = ether_delmulti(ifr, &sc->sc_ac);
sc 914 dev/pci/if_tht.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
sc 924 dev/pci/if_tht.c tht_iff(sc);
sc 930 dev/pci/if_tht.c rw_exit_write(&sc->sc_lock);
sc 936 dev/pci/if_tht.c tht_up(struct tht_softc *sc)
sc 938 dev/pci/if_tht.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 941 dev/pci/if_tht.c printf("%s: interface is already up\n", DEVNAME(sc));
sc 945 dev/pci/if_tht.c if (tht_pkt_alloc(sc, &sc->sc_tx_list, 128, THT_TXT_SGL_LEN) != 0)
sc 947 dev/pci/if_tht.c if (tht_pkt_alloc(sc, &sc->sc_rx_list, 128, THT_RXF_SGL_LEN) != 0)
sc 950 dev/pci/if_tht.c if (tht_fifo_alloc(sc, &sc->sc_txt, &tht_txt_desc) != 0)
sc 952 dev/pci/if_tht.c if (tht_fifo_alloc(sc, &sc->sc_rxf, &tht_rxf_desc) != 0)
sc 954 dev/pci/if_tht.c if (tht_fifo_alloc(sc, &sc->sc_rxd, &tht_rxd_desc) != 0)
sc 956 dev/pci/if_tht.c if (tht_fifo_alloc(sc, &sc->sc_txf, &tht_txf_desc) != 0)
sc 959 dev/pci/if_tht.c tht_write(sc, THT_REG_10G_FRM_LEN, MCLBYTES - ETHER_ALIGN);
sc 960 dev/pci/if_tht.c tht_write(sc, THT_REG_10G_PAUSE, 0x96);
sc 961 dev/pci/if_tht.c tht_write(sc, THT_REG_10G_RX_SEC, THT_REG_10G_SEC_AVAIL(0x10) |
sc 963 dev/pci/if_tht.c tht_write(sc, THT_REG_10G_TX_SEC, THT_REG_10G_SEC_AVAIL(0x10) |
sc 965 dev/pci/if_tht.c tht_write(sc, THT_REG_10G_RFIFO_AEF, THT_REG_10G_FIFO_AE(0x0) |
sc 967 dev/pci/if_tht.c tht_write(sc, THT_REG_10G_TFIFO_AEF, THT_REG_10G_FIFO_AE(0x0) |
sc 969 dev/pci/if_tht.c tht_write(sc, THT_REG_10G_CTL, THT_REG_10G_CTL_TX_EN |
sc 973 dev/pci/if_tht.c tht_write(sc, THT_REG_VGLB, 0);
sc 975 dev/pci/if_tht.c tht_write(sc, THT_REG_RX_MAX_FRAME, MCLBYTES - ETHER_ALIGN);
sc 977 dev/pci/if_tht.c tht_write(sc, THT_REG_RDINTCM(0), THT_REG_RDINTCM_PKT_TH(12) |
sc 980 dev/pci/if_tht.c tht_write(sc, THT_REG_TDINTCM(0), THT_REG_TDINTCM_PKT_TH(12) |
sc 983 dev/pci/if_tht.c bcopy(sc->sc_ac.ac_enaddr, sc->sc_lladdr, ETHER_ADDR_LEN);
sc 984 dev/pci/if_tht.c tht_lladdr_write(sc);
sc 987 dev/pci/if_tht.c tht_rxf_fill(sc, 1);
sc 989 dev/pci/if_tht.c tht_iff(sc);
sc 995 dev/pci/if_tht.c sc->sc_imr = THT_IMR_UP(sc->sc_port);
sc 996 dev/pci/if_tht.c tht_write(sc, THT_REG_IMR, sc->sc_imr);
sc 1001 dev/pci/if_tht.c tht_fifo_free(sc, &sc->sc_rxd);
sc 1003 dev/pci/if_tht.c tht_fifo_free(sc, &sc->sc_rxf);
sc 1005 dev/pci/if_tht.c tht_fifo_free(sc, &sc->sc_txt);
sc 1007 dev/pci/if_tht.c tht_sw_reset(sc);
sc 1010 dev/pci/if_tht.c tht_pkt_free(sc, &sc->sc_rx_list);
sc 1012 dev/pci/if_tht.c tht_pkt_free(sc, &sc->sc_tx_list);
sc 1016 dev/pci/if_tht.c tht_iff(struct tht_softc *sc)
sc 1018 dev/pci/if_tht.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 1030 dev/pci/if_tht.c tht_write(sc, THT_REG_RX_MAC_MCST0(i), 0);
sc 1031 dev/pci/if_tht.c tht_write(sc, THT_REG_RX_MAC_MCST1(i), 0);
sc 1037 dev/pci/if_tht.c else if (sc->sc_ac.ac_multirangecnt > 0) {
sc 1041 dev/pci/if_tht.c ETHER_FIRST_MULTI(step, &sc->sc_ac, enm);
sc 1049 dev/pci/if_tht.c tht_write(sc, THT_REG_RX_MAC_MCST0(i),
sc 1054 dev/pci/if_tht.c tht_write(sc, THT_REG_RX_MAC_MCST1(i),
sc 1073 dev/pci/if_tht.c tht_write_region(sc, THT_REG_RX_MCST_HASH, imf, sizeof(imf));
sc 1074 dev/pci/if_tht.c tht_write(sc, THT_REG_RX_FLT, rxf);
sc 1078 dev/pci/if_tht.c tht_down(struct tht_softc *sc)
sc 1080 dev/pci/if_tht.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 1083 dev/pci/if_tht.c printf("%s: interface is already down\n", DEVNAME(sc));
sc 1089 dev/pci/if_tht.c while (tht_fifo_writable(sc, &sc->sc_txt) < sc->sc_txt.tf_len &&
sc 1090 dev/pci/if_tht.c tht_fifo_readable(sc, &sc->sc_txf) > 0)
sc 1091 dev/pci/if_tht.c tsleep(sc, 0, "thtdown", hz);
sc 1093 dev/pci/if_tht.c sc->sc_imr = THT_IMR_DOWN(sc->sc_port);
sc 1094 dev/pci/if_tht.c tht_write(sc, THT_REG_IMR, sc->sc_imr);
sc 1096 dev/pci/if_tht.c tht_sw_reset(sc);
sc 1098 dev/pci/if_tht.c tht_fifo_free(sc, &sc->sc_txf);
sc 1099 dev/pci/if_tht.c tht_fifo_free(sc, &sc->sc_rxd);
sc 1100 dev/pci/if_tht.c tht_fifo_free(sc, &sc->sc_rxf);
sc 1101 dev/pci/if_tht.c tht_fifo_free(sc, &sc->sc_txt);
sc 1104 dev/pci/if_tht.c tht_rxf_drain(sc);
sc 1106 dev/pci/if_tht.c tht_pkt_free(sc, &sc->sc_rx_list);
sc 1107 dev/pci/if_tht.c tht_pkt_free(sc, &sc->sc_tx_list);
sc 1113 dev/pci/if_tht.c struct tht_softc *sc = ifp->if_softc;
sc 1127 dev/pci/if_tht.c if (tht_fifo_writable(sc, &sc->sc_txt) <= THT_FIFO_DESC_LEN)
sc 1132 dev/pci/if_tht.c tht_fifo_pre(sc, &sc->sc_txt);
sc 1139 dev/pci/if_tht.c pkt = tht_pkt_get(&sc->sc_tx_list);
sc 1146 dev/pci/if_tht.c if (tht_load_pkt(sc, pkt, m) != 0) {
sc 1148 dev/pci/if_tht.c tht_pkt_put(&sc->sc_tx_list, pkt);
sc 1169 dev/pci/if_tht.c DEVNAME(sc), pkt->tp_id, flags, pkt->tp_m->m_pkthdr.len);
sc 1171 dev/pci/if_tht.c tht_fifo_write(sc, &sc->sc_txt, &txt, sizeof(txt));
sc 1172 dev/pci/if_tht.c tht_fifo_write_dmap(sc, &sc->sc_txt, pkt->tp_dmap);
sc 1173 dev/pci/if_tht.c tht_fifo_write_pad(sc, &sc->sc_txt, bc);
sc 1175 dev/pci/if_tht.c bus_dmamap_sync(sc->sc_thtc->sc_dmat, pkt->tp_dmap, 0,
sc 1180 dev/pci/if_tht.c } while (sc->sc_txt.tf_ready > THT_FIFO_DESC_LEN);
sc 1182 dev/pci/if_tht.c tht_fifo_post(sc, &sc->sc_txt);
sc 1186 dev/pci/if_tht.c tht_load_pkt(struct tht_softc *sc, struct tht_pkt *pkt, struct mbuf *m)
sc 1188 dev/pci/if_tht.c bus_dma_tag_t dmat = sc->sc_thtc->sc_dmat;
sc 1227 dev/pci/if_tht.c tht_txf(struct tht_softc *sc)
sc 1229 dev/pci/if_tht.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 1230 dev/pci/if_tht.c bus_dma_tag_t dmat = sc->sc_thtc->sc_dmat;
sc 1235 dev/pci/if_tht.c if (tht_fifo_readable(sc, &sc->sc_txf) < sizeof(txf))
sc 1238 dev/pci/if_tht.c tht_fifo_pre(sc, &sc->sc_txf);
sc 1241 dev/pci/if_tht.c tht_fifo_read(sc, &sc->sc_txf, &txf, sizeof(txf));
sc 1243 dev/pci/if_tht.c DPRINTF(THT_D_TX, "%s: txf uid 0x%llx\n", DEVNAME(sc), txf.uid);
sc 1245 dev/pci/if_tht.c pkt = &sc->sc_tx_list.tpl_pkts[txf.uid];
sc 1254 dev/pci/if_tht.c tht_pkt_put(&sc->sc_tx_list, pkt);
sc 1256 dev/pci/if_tht.c } while (sc->sc_txf.tf_ready >= sizeof(txf));
sc 1260 dev/pci/if_tht.c tht_fifo_post(sc, &sc->sc_txf);
sc 1264 dev/pci/if_tht.c tht_rxf_fill(struct tht_softc *sc, int wait)
sc 1266 dev/pci/if_tht.c bus_dma_tag_t dmat = sc->sc_thtc->sc_dmat;
sc 1273 dev/pci/if_tht.c if (tht_fifo_writable(sc, &sc->sc_rxf) <= THT_FIFO_DESC_LEN)
sc 1276 dev/pci/if_tht.c tht_fifo_pre(sc, &sc->sc_rxf);
sc 1279 dev/pci/if_tht.c if ((pkt = tht_pkt_get(&sc->sc_rx_list)) == NULL)
sc 1306 dev/pci/if_tht.c tht_fifo_write(sc, &sc->sc_rxf, &rxf, sizeof(rxf));
sc 1307 dev/pci/if_tht.c tht_fifo_write_dmap(sc, &sc->sc_rxf, dmap);
sc 1308 dev/pci/if_tht.c tht_fifo_write_pad(sc, &sc->sc_rxf, bc);
sc 1313 dev/pci/if_tht.c if (sc->sc_rxf.tf_ready <= THT_FIFO_DESC_LEN)
sc 1320 dev/pci/if_tht.c tht_pkt_put(&sc->sc_rx_list, pkt);
sc 1322 dev/pci/if_tht.c tht_fifo_post(sc, &sc->sc_rxf);
sc 1326 dev/pci/if_tht.c tht_rxf_drain(struct tht_softc *sc)
sc 1328 dev/pci/if_tht.c bus_dma_tag_t dmat = sc->sc_thtc->sc_dmat;
sc 1332 dev/pci/if_tht.c while ((pkt = tht_pkt_used(&sc->sc_rx_list)) != NULL) {
sc 1341 dev/pci/if_tht.c tht_pkt_put(&sc->sc_rx_list, pkt);
sc 1346 dev/pci/if_tht.c tht_rxd(struct tht_softc *sc)
sc 1348 dev/pci/if_tht.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 1349 dev/pci/if_tht.c bus_dma_tag_t dmat = sc->sc_thtc->sc_dmat;
sc 1357 dev/pci/if_tht.c if (tht_fifo_readable(sc, &sc->sc_rxd) < sizeof(rxd))
sc 1360 dev/pci/if_tht.c tht_fifo_pre(sc, &sc->sc_rxd);
sc 1363 dev/pci/if_tht.c tht_fifo_read(sc, &sc->sc_rxd, &rxd, sizeof(rxd));
sc 1368 dev/pci/if_tht.c pkt = &sc->sc_rx_list.tpl_pkts[rxd.uid];
sc 1396 dev/pci/if_tht.c tht_pkt_put(&sc->sc_rx_list, pkt);
sc 1401 dev/pci/if_tht.c tht_fifo_read(sc, &sc->sc_rxd, &pad, sizeof(pad));
sc 1407 dev/pci/if_tht.c } while (sc->sc_rxd.tf_ready >= sizeof(rxd));
sc 1409 dev/pci/if_tht.c tht_fifo_post(sc, &sc->sc_rxd);
sc 1412 dev/pci/if_tht.c tht_rxf_fill(sc, 0);
sc 1431 dev/pci/if_tht.c struct tht_softc *sc = ifp->if_softc;
sc 1436 dev/pci/if_tht.c tht_link_state(sc);
sc 1443 dev/pci/if_tht.c tht_fifo_alloc(struct tht_softc *sc, struct tht_fifo *tf,
sc 1449 dev/pci/if_tht.c tf->tf_mem = tht_dmamem_alloc(sc, tf->tf_len, THT_FIFO_ALIGN);
sc 1456 dev/pci/if_tht.c bus_dmamap_sync(sc->sc_thtc->sc_dmat, THT_DMA_MAP(tf->tf_mem),
sc 1460 dev/pci/if_tht.c tht_write(sc, tfd->tfd_cfg0, (u_int32_t)dva | tfd->tfd_size);
sc 1461 dev/pci/if_tht.c tht_write(sc, tfd->tfd_cfg1, (u_int32_t)(dva >> 32));
sc 1467 dev/pci/if_tht.c tht_fifo_free(struct tht_softc *sc, struct tht_fifo *tf)
sc 1469 dev/pci/if_tht.c bus_dmamap_sync(sc->sc_thtc->sc_dmat, THT_DMA_MAP(tf->tf_mem),
sc 1471 dev/pci/if_tht.c tht_dmamem_free(sc, tf->tf_mem);
sc 1475 dev/pci/if_tht.c tht_fifo_readable(struct tht_softc *sc, struct tht_fifo *tf)
sc 1477 dev/pci/if_tht.c tf->tf_wptr = tht_read(sc, tf->tf_desc->tfd_wptr);
sc 1484 dev/pci/if_tht.c DEVNAME(sc), tf->tf_wptr, tf->tf_rptr, tf->tf_ready);
sc 1490 dev/pci/if_tht.c tht_fifo_writable(struct tht_softc *sc, struct tht_fifo *tf)
sc 1492 dev/pci/if_tht.c tf->tf_rptr = tht_read(sc, tf->tf_desc->tfd_rptr);
sc 1499 dev/pci/if_tht.c DEVNAME(sc), tf->tf_wptr, tf->tf_rptr, tf->tf_ready);
sc 1505 dev/pci/if_tht.c tht_fifo_pre(struct tht_softc *sc, struct tht_fifo *tf)
sc 1507 dev/pci/if_tht.c bus_dmamap_sync(sc->sc_thtc->sc_dmat, THT_DMA_MAP(tf->tf_mem),
sc 1512 dev/pci/if_tht.c tht_fifo_read(struct tht_softc *sc, struct tht_fifo *tf,
sc 1536 dev/pci/if_tht.c DEVNAME(sc), tf->tf_wptr, tf->tf_rptr, tf->tf_ready);
sc 1540 dev/pci/if_tht.c tht_fifo_write(struct tht_softc *sc, struct tht_fifo *tf,
sc 1565 dev/pci/if_tht.c DEVNAME(sc), tf->tf_wptr, tf->tf_rptr, tf->tf_ready);
sc 1569 dev/pci/if_tht.c tht_fifo_write_dmap(struct tht_softc *sc, struct tht_fifo *tf,
sc 1583 dev/pci/if_tht.c tht_fifo_write(sc, tf, &pbd, sizeof(pbd));
sc 1588 dev/pci/if_tht.c tht_fifo_write_pad(struct tht_softc *sc, struct tht_fifo *tf, int bc)
sc 1594 dev/pci/if_tht.c tht_fifo_write(sc, tf, (void *)&pad, sizeof(pad));
sc 1598 dev/pci/if_tht.c tht_fifo_post(struct tht_softc *sc, struct tht_fifo *tf)
sc 1600 dev/pci/if_tht.c bus_dmamap_sync(sc->sc_thtc->sc_dmat, THT_DMA_MAP(tf->tf_mem),
sc 1603 dev/pci/if_tht.c tht_write(sc, tf->tf_desc->tfd_wptr, tf->tf_wptr);
sc 1605 dev/pci/if_tht.c tht_write(sc, tf->tf_desc->tfd_rptr, tf->tf_rptr);
sc 1607 dev/pci/if_tht.c DPRINTF(THT_D_FIFO, "%s: fifo post wptr: %d rptr: %d\n", DEVNAME(sc),
sc 1616 dev/pci/if_tht.c tht_lladdr_read(struct tht_softc *sc)
sc 1621 dev/pci/if_tht.c sc->sc_lladdr[i] = betoh16(tht_read(sc, tht_mac_regs[i]));
sc 1625 dev/pci/if_tht.c tht_lladdr_write(struct tht_softc *sc)
sc 1630 dev/pci/if_tht.c tht_write(sc, tht_mac_regs[i], htobe16(sc->sc_lladdr[i]));
sc 1636 dev/pci/if_tht.c tht_sw_reset(struct tht_softc *sc)
sc 1643 dev/pci/if_tht.c tht_clr(sc, THT_REG_RX_FLT, THT_REG_RX_FLT_OSEN);
sc 1646 dev/pci/if_tht.c tht_swrst_set(sc, THT_REG_DIS_PRT);
sc 1649 dev/pci/if_tht.c tht_swrst_set(sc, THT_REG_DIS_QU_0);
sc 1650 dev/pci/if_tht.c tht_swrst_set(sc, THT_REG_DIS_QU_1);
sc 1653 dev/pci/if_tht.c if (!tht_wait_set(sc, THT_REG_RST_PRT, THT_REG_RST_PRT_ACTIVE, 1000))
sc 1657 dev/pci/if_tht.c tht_write(sc, THT_REG_IMR, 0x0); /* 5.a */
sc 1658 dev/pci/if_tht.c tht_read(sc, THT_REG_ISR); /* 5.b */
sc 1660 dev/pci/if_tht.c tht_write(sc, THT_REG_RDINTCM(i), 0x0); /* 5.c/5.d */
sc 1661 dev/pci/if_tht.c tht_write(sc, THT_REG_TDINTCM(i), 0x0); /* 5.e */
sc 1665 dev/pci/if_tht.c tht_swrst_set(sc, THT_REG_RST_QU_0);
sc 1666 dev/pci/if_tht.c tht_swrst_set(sc, THT_REG_RST_QU_1);
sc 1669 dev/pci/if_tht.c tht_swrst_set(sc, THT_REG_RST_PRT);
sc 1673 dev/pci/if_tht.c tht_write(sc, THT_REG_TXT_RPTR(i), 0);
sc 1674 dev/pci/if_tht.c tht_write(sc, THT_REG_RXF_RPTR(i), 0);
sc 1675 dev/pci/if_tht.c tht_write(sc, THT_REG_RXD_RPTR(i), 0);
sc 1676 dev/pci/if_tht.c tht_write(sc, THT_REG_TXF_RPTR(i), 0);
sc 1678 dev/pci/if_tht.c tht_write(sc, THT_REG_TXT_WPTR(i), 0);
sc 1679 dev/pci/if_tht.c tht_write(sc, THT_REG_RXF_WPTR(i), 0);
sc 1680 dev/pci/if_tht.c tht_write(sc, THT_REG_RXD_WPTR(i), 0);
sc 1681 dev/pci/if_tht.c tht_write(sc, THT_REG_TXF_WPTR(i), 0);
sc 1685 dev/pci/if_tht.c tht_swrst_clr(sc, THT_REG_DIS_PRT);
sc 1688 dev/pci/if_tht.c tht_swrst_clr(sc, THT_REG_DIS_QU_0);
sc 1689 dev/pci/if_tht.c tht_swrst_clr(sc, THT_REG_DIS_QU_1);
sc 1692 dev/pci/if_tht.c tht_swrst_clr(sc, THT_REG_RST_QU_0);
sc 1693 dev/pci/if_tht.c tht_swrst_clr(sc, THT_REG_RST_QU_1);
sc 1696 dev/pci/if_tht.c tht_swrst_clr(sc, THT_REG_RST_PRT);
sc 1699 dev/pci/if_tht.c tht_set(sc, THT_REG_RX_FLT, THT_REG_RX_FLT_OSEN);
sc 1705 dev/pci/if_tht.c tht_fw_load(struct tht_softc *sc)
sc 1721 dev/pci/if_tht.c while (tht_fifo_writable(sc, &sc->sc_txt) <= THT_FIFO_GAP) {
sc 1722 dev/pci/if_tht.c if (tsleep(sc, PCATCH, "thtfw", 1) == EINTR)
sc 1726 dev/pci/if_tht.c wrlen = MIN(sc->sc_txt.tf_ready - THT_FIFO_GAP, fwlen);
sc 1727 dev/pci/if_tht.c tht_fifo_pre(sc, &sc->sc_txt);
sc 1728 dev/pci/if_tht.c tht_fifo_write(sc, &sc->sc_txt, buf, wrlen);
sc 1729 dev/pci/if_tht.c tht_fifo_post(sc, &sc->sc_txt);
sc 1738 dev/pci/if_tht.c if (tht_read(sc, THT_REG_INIT_STATUS) != 0) {
sc 1743 dev/pci/if_tht.c if (tsleep(sc, PCATCH, "thtinit", 1) == EINTR)
sc 1748 dev/pci/if_tht.c tht_write(sc, THT_REG_INIT_SEMAPHORE, 0x1);
sc 1764 dev/pci/if_tht.c tht_link_state(struct tht_softc *sc)
sc 1766 dev/pci/if_tht.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 1769 dev/pci/if_tht.c if (tht_read(sc, THT_REG_MAC_LNK_STAT) & THT_REG_MAC_LNK_STAT_LINK)
sc 1779 dev/pci/if_tht.c tht_read(struct tht_softc *sc, bus_size_t r)
sc 1781 dev/pci/if_tht.c bus_space_barrier(sc->sc_thtc->sc_memt, sc->sc_memh, r, 4,
sc 1783 dev/pci/if_tht.c return (bus_space_read_4(sc->sc_thtc->sc_memt, sc->sc_memh, r));
sc 1787 dev/pci/if_tht.c tht_write(struct tht_softc *sc, bus_size_t r, u_int32_t v)
sc 1789 dev/pci/if_tht.c bus_space_write_4(sc->sc_thtc->sc_memt, sc->sc_memh, r, v);
sc 1790 dev/pci/if_tht.c bus_space_barrier(sc->sc_thtc->sc_memt, sc->sc_memh, r, 4,
sc 1795 dev/pci/if_tht.c tht_write_region(struct tht_softc *sc, bus_size_t r, void *buf, size_t len)
sc 1797 dev/pci/if_tht.c bus_space_write_raw_region_4(sc->sc_thtc->sc_memt, sc->sc_memh, r,
sc 1799 dev/pci/if_tht.c bus_space_barrier(sc->sc_thtc->sc_memt, sc->sc_memh, r, len,
sc 1804 dev/pci/if_tht.c tht_wait_eq(struct tht_softc *sc, bus_size_t r, u_int32_t m, u_int32_t v,
sc 1807 dev/pci/if_tht.c while ((tht_read(sc, r) & m) != v) {
sc 1819 dev/pci/if_tht.c tht_wait_ne(struct tht_softc *sc, bus_size_t r, u_int32_t m, u_int32_t v,
sc 1822 dev/pci/if_tht.c while ((tht_read(sc, r) & m) == v) {
sc 1834 dev/pci/if_tht.c tht_dmamem_alloc(struct tht_softc *sc, bus_size_t size, bus_size_t align)
sc 1836 dev/pci/if_tht.c bus_dma_tag_t dmat = sc->sc_thtc->sc_dmat;
sc 1877 dev/pci/if_tht.c tht_dmamem_free(struct tht_softc *sc, struct tht_dmamem *tdm)
sc 1879 dev/pci/if_tht.c bus_dma_tag_t dmat = sc->sc_thtc->sc_dmat;
sc 1889 dev/pci/if_tht.c tht_pkt_alloc(struct tht_softc *sc, struct tht_pkt_list *tpl, int npkts,
sc 1892 dev/pci/if_tht.c bus_dma_tag_t dmat = sc->sc_thtc->sc_dmat;
sc 1909 dev/pci/if_tht.c tht_pkt_free(sc, tpl);
sc 1920 dev/pci/if_tht.c tht_pkt_free(struct tht_softc *sc, struct tht_pkt_list *tpl)
sc 1922 dev/pci/if_tht.c bus_dma_tag_t dmat = sc->sc_thtc->sc_dmat;
sc 205 dev/pci/if_ti.c ti_eeprom_putbyte(struct ti_softc *sc, int byte)
sc 212 dev/pci/if_ti.c TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN);
sc 219 dev/pci/if_ti.c TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT);
sc 221 dev/pci/if_ti.c TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT);
sc 223 dev/pci/if_ti.c TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
sc 225 dev/pci/if_ti.c TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
sc 231 dev/pci/if_ti.c TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN);
sc 236 dev/pci/if_ti.c TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
sc 237 dev/pci/if_ti.c ack = CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN;
sc 238 dev/pci/if_ti.c TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
sc 249 dev/pci/if_ti.c ti_eeprom_getbyte(struct ti_softc *sc, int addr, u_int8_t *dest)
sc 259 dev/pci/if_ti.c if (ti_eeprom_putbyte(sc, EEPROM_CTL_WRITE)) {
sc 261 dev/pci/if_ti.c sc->sc_dv.dv_xname, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
sc 268 dev/pci/if_ti.c if (ti_eeprom_putbyte(sc, (addr >> 8) & 0xFF)) {
sc 270 dev/pci/if_ti.c sc->sc_dv.dv_xname, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
sc 276 dev/pci/if_ti.c if (ti_eeprom_putbyte(sc, addr & 0xFF)) {
sc 278 dev/pci/if_ti.c sc->sc_dv.dv_xname, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
sc 287 dev/pci/if_ti.c if (ti_eeprom_putbyte(sc, EEPROM_CTL_READ)) {
sc 289 dev/pci/if_ti.c sc->sc_dv.dv_xname, CSR_READ_4(sc, TI_MISC_LOCAL_CTL));
sc 296 dev/pci/if_ti.c TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN);
sc 298 dev/pci/if_ti.c TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
sc 300 dev/pci/if_ti.c if (CSR_READ_4(sc, TI_MISC_LOCAL_CTL) & TI_MLC_EE_DIN)
sc 302 dev/pci/if_ti.c TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK);
sc 321 dev/pci/if_ti.c ti_read_eeprom(struct ti_softc *sc, caddr_t dest, int off, int cnt)
sc 327 dev/pci/if_ti.c err = ti_eeprom_getbyte(sc, off + i, &byte);
sc 341 dev/pci/if_ti.c ti_mem_read(struct ti_softc *sc, u_int32_t addr, u_int32_t len, void *buf)
sc 355 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1)));
sc 356 dev/pci/if_ti.c bus_space_read_region_4(sc->ti_btag, sc->ti_bhandle,
sc 370 dev/pci/if_ti.c ti_mem_write(struct ti_softc *sc, u_int32_t addr, u_int32_t len,
sc 385 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1)));
sc 386 dev/pci/if_ti.c bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle,
sc 400 dev/pci/if_ti.c ti_mem_set(struct ti_softc *sc, u_int32_t addr, u_int32_t len)
sc 412 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_WINBASE, (segptr & ~(TI_WINLEN - 1)));
sc 413 dev/pci/if_ti.c bus_space_set_region_4(sc->ti_btag, sc->ti_bhandle,
sc 426 dev/pci/if_ti.c ti_loadfw(struct ti_softc *sc)
sc 434 dev/pci/if_ti.c switch(sc->ti_hwrev) {
sc 443 dev/pci/if_ti.c sc->sc_dv.dv_xname);
sc 455 dev/pci/if_ti.c "%d.%d.%d, got %d.%d.%d\n", sc->sc_dv.dv_xname,
sc 462 dev/pci/if_ti.c ti_mem_write(sc, tf->FwTextAddr, tf->FwTextLen,
sc 464 dev/pci/if_ti.c ti_mem_write(sc, tf->FwRodataAddr, tf->FwRodataLen,
sc 466 dev/pci/if_ti.c ti_mem_write(sc, tf->FwDataAddr, tf->FwDataLen,
sc 468 dev/pci/if_ti.c ti_mem_set(sc, tf->FwBssAddr, tf->FwBssLen);
sc 469 dev/pci/if_ti.c ti_mem_set(sc, tf->FwSbssAddr, tf->FwSbssLen);
sc 470 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_CPU_PROGRAM_COUNTER, tf->FwStartAddr);
sc 478 dev/pci/if_ti.c ti_cmd(struct ti_softc *sc, struct ti_cmd_desc *cmd)
sc 482 dev/pci/if_ti.c index = sc->ti_cmd_saved_prodidx;
sc 483 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(u_int32_t *)(cmd));
sc 485 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, index);
sc 486 dev/pci/if_ti.c sc->ti_cmd_saved_prodidx = index;
sc 494 dev/pci/if_ti.c ti_cmd_ext(struct ti_softc *sc, struct ti_cmd_desc *cmd, caddr_t arg,
sc 500 dev/pci/if_ti.c index = sc->ti_cmd_saved_prodidx;
sc 501 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4), *(u_int32_t *)(cmd));
sc 504 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_CMDRING + (index * 4),
sc 508 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, index);
sc 509 dev/pci/if_ti.c sc->ti_cmd_saved_prodidx = index;
sc 516 dev/pci/if_ti.c ti_handle_events(struct ti_softc *sc)
sc 520 dev/pci/if_ti.c if (sc->ti_rdata->ti_event_ring == NULL)
sc 523 dev/pci/if_ti.c while (sc->ti_ev_saved_considx != sc->ti_ev_prodidx.ti_idx) {
sc 524 dev/pci/if_ti.c e = &sc->ti_rdata->ti_event_ring[sc->ti_ev_saved_considx];
sc 527 dev/pci/if_ti.c sc->ti_linkstat = TI_EVENT_CODE(e);
sc 532 dev/pci/if_ti.c sc->sc_dv.dv_xname);
sc 535 dev/pci/if_ti.c sc->sc_dv.dv_xname);
sc 538 dev/pci/if_ti.c sc->sc_dv.dv_xname);
sc 541 dev/pci/if_ti.c ti_init2(sc);
sc 544 dev/pci/if_ti.c ti_stats_update(sc);
sc 551 dev/pci/if_ti.c printf("%s: unknown event: %d\n", sc->sc_dv.dv_xname,
sc 556 dev/pci/if_ti.c TI_INC(sc->ti_ev_saved_considx, TI_EVENT_RING_CNT);
sc 557 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, sc->ti_ev_saved_considx);
sc 585 dev/pci/if_ti.c ti_alloc_jumbo_mem(struct ti_softc *sc)
sc 595 dev/pci/if_ti.c if (bus_dmamem_alloc(sc->sc_dmatag, TI_JMEM, PAGE_SIZE, 0,
sc 597 dev/pci/if_ti.c printf("%s: can't alloc rx buffers\n", sc->sc_dv.dv_xname);
sc 602 dev/pci/if_ti.c if (bus_dmamem_map(sc->sc_dmatag, &seg, rseg, TI_JMEM, &kva,
sc 605 dev/pci/if_ti.c sc->sc_dv.dv_xname, TI_JMEM);
sc 611 dev/pci/if_ti.c if (bus_dmamap_create(sc->sc_dmatag, TI_JMEM, 1, TI_JMEM, 0,
sc 612 dev/pci/if_ti.c BUS_DMA_NOWAIT, &sc->ti_cdata.ti_rx_jumbo_map)) {
sc 613 dev/pci/if_ti.c printf("%s: can't create dma map\n", sc->sc_dv.dv_xname);
sc 619 dev/pci/if_ti.c if (bus_dmamap_load(sc->sc_dmatag, sc->ti_cdata.ti_rx_jumbo_map, kva,
sc 621 dev/pci/if_ti.c printf("%s: can't load dma map\n", sc->sc_dv.dv_xname);
sc 627 dev/pci/if_ti.c sc->ti_cdata.ti_jumbo_buf = (caddr_t)kva;
sc 629 dev/pci/if_ti.c SLIST_INIT(&sc->ti_jfree_listhead);
sc 630 dev/pci/if_ti.c SLIST_INIT(&sc->ti_jinuse_listhead);
sc 636 dev/pci/if_ti.c ptr = sc->ti_cdata.ti_jumbo_buf;
sc 638 dev/pci/if_ti.c sc->ti_cdata.ti_jslots[i].ti_buf = ptr;
sc 639 dev/pci/if_ti.c sc->ti_cdata.ti_jslots[i].ti_inuse = 0;
sc 644 dev/pci/if_ti.c sc->ti_cdata.ti_jumbo_buf = NULL;
sc 646 dev/pci/if_ti.c sc->sc_dv.dv_xname);
sc 651 dev/pci/if_ti.c SLIST_INSERT_HEAD(&sc->ti_jfree_listhead, entry, jpool_entries);
sc 657 dev/pci/if_ti.c bus_dmamap_unload(sc->sc_dmatag,
sc 658 dev/pci/if_ti.c sc->ti_cdata.ti_rx_jumbo_map);
sc 660 dev/pci/if_ti.c bus_dmamap_destroy(sc->sc_dmatag,
sc 661 dev/pci/if_ti.c sc->ti_cdata.ti_rx_jumbo_map);
sc 663 dev/pci/if_ti.c bus_dmamem_unmap(sc->sc_dmatag, kva, TI_JMEM);
sc 665 dev/pci/if_ti.c bus_dmamem_free(sc->sc_dmatag, &seg, rseg);
sc 679 dev/pci/if_ti.c ti_jalloc(struct ti_softc *sc)
sc 683 dev/pci/if_ti.c entry = SLIST_FIRST(&sc->ti_jfree_listhead);
sc 688 dev/pci/if_ti.c SLIST_REMOVE_HEAD(&sc->ti_jfree_listhead, jpool_entries);
sc 689 dev/pci/if_ti.c SLIST_INSERT_HEAD(&sc->ti_jinuse_listhead, entry, jpool_entries);
sc 690 dev/pci/if_ti.c sc->ti_cdata.ti_jslots[entry->slot].ti_inuse = 1;
sc 691 dev/pci/if_ti.c return (sc->ti_cdata.ti_jslots[entry->slot].ti_buf);
sc 700 dev/pci/if_ti.c struct ti_softc *sc;
sc 705 dev/pci/if_ti.c sc = (struct ti_softc *)arg;
sc 707 dev/pci/if_ti.c if (sc == NULL)
sc 711 dev/pci/if_ti.c i = ((vaddr_t)buf - (vaddr_t)sc->ti_cdata.ti_jumbo_buf) / TI_JLEN;
sc 715 dev/pci/if_ti.c else if (sc->ti_cdata.ti_jslots[i].ti_inuse == 0)
sc 718 dev/pci/if_ti.c sc->ti_cdata.ti_jslots[i].ti_inuse--;
sc 719 dev/pci/if_ti.c if(sc->ti_cdata.ti_jslots[i].ti_inuse == 0) {
sc 720 dev/pci/if_ti.c entry = SLIST_FIRST(&sc->ti_jinuse_listhead);
sc 724 dev/pci/if_ti.c SLIST_REMOVE_HEAD(&sc->ti_jinuse_listhead, jpool_entries);
sc 725 dev/pci/if_ti.c SLIST_INSERT_HEAD(&sc->ti_jfree_listhead,
sc 734 dev/pci/if_ti.c ti_newbuf_std(struct ti_softc *sc, int i, struct mbuf *m,
sc 743 dev/pci/if_ti.c if (bus_dmamap_create(sc->sc_dmatag, MCLBYTES, 1, MCLBYTES,
sc 746 dev/pci/if_ti.c sc->sc_dv.dv_xname);
sc 750 dev/pci/if_ti.c bus_dmamap_unload(sc->sc_dmatag, dmamap);
sc 752 dev/pci/if_ti.c sc->ti_cdata.ti_rx_std_map[i] = dmamap;
sc 768 dev/pci/if_ti.c if (bus_dmamap_load_mbuf(sc->sc_dmatag, dmamap, m_new,
sc 784 dev/pci/if_ti.c sc->ti_cdata.ti_rx_std_chain[i] = m_new;
sc 785 dev/pci/if_ti.c r = &sc->ti_rdata->ti_rx_std_ring[i];
sc 795 dev/pci/if_ti.c panic("%s: overwritten!!!", sc->sc_dv.dv_xname);
sc 805 dev/pci/if_ti.c ti_newbuf_mini(struct ti_softc *sc, int i, struct mbuf *m,
sc 814 dev/pci/if_ti.c if (bus_dmamap_create(sc->sc_dmatag, MHLEN, 1, MHLEN,
sc 817 dev/pci/if_ti.c sc->sc_dv.dv_xname);
sc 821 dev/pci/if_ti.c bus_dmamap_unload(sc->sc_dmatag, dmamap);
sc 823 dev/pci/if_ti.c sc->ti_cdata.ti_rx_mini_map[i] = dmamap;
sc 832 dev/pci/if_ti.c if (bus_dmamap_load_mbuf(sc->sc_dmatag, dmamap, m_new,
sc 847 dev/pci/if_ti.c r = &sc->ti_rdata->ti_rx_mini_ring[i];
sc 848 dev/pci/if_ti.c sc->ti_cdata.ti_rx_mini_chain[i] = m_new;
sc 863 dev/pci/if_ti.c ti_newbuf_jumbo(struct ti_softc *sc, int i, struct mbuf *m)
sc 877 dev/pci/if_ti.c buf = ti_jalloc(sc);
sc 885 dev/pci/if_ti.c MEXTADD(m_new, buf, TI_JUMBO_FRAMELEN, 0, ti_jfree, sc);
sc 899 dev/pci/if_ti.c r = &sc->ti_rdata->ti_rx_jumbo_ring[i];
sc 900 dev/pci/if_ti.c sc->ti_cdata.ti_rx_jumbo_chain[i] = m_new;
sc 901 dev/pci/if_ti.c TI_HOSTADDR(r->ti_addr) = TI_JUMBO_DMA_ADDR(sc, m_new);
sc 917 dev/pci/if_ti.c ti_init_rx_ring_std(struct ti_softc *sc)
sc 923 dev/pci/if_ti.c if (ti_newbuf_std(sc, i, NULL, 0) == ENOBUFS)
sc 927 dev/pci/if_ti.c TI_UPDATE_STDPROD(sc, i - 1);
sc 928 dev/pci/if_ti.c sc->ti_std = i - 1;
sc 934 dev/pci/if_ti.c ti_free_rx_ring_std(struct ti_softc *sc)
sc 939 dev/pci/if_ti.c if (sc->ti_cdata.ti_rx_std_chain[i] != NULL) {
sc 940 dev/pci/if_ti.c m_freem(sc->ti_cdata.ti_rx_std_chain[i]);
sc 941 dev/pci/if_ti.c sc->ti_cdata.ti_rx_std_chain[i] = NULL;
sc 942 dev/pci/if_ti.c bus_dmamap_destroy(sc->sc_dmatag,
sc 943 dev/pci/if_ti.c sc->ti_cdata.ti_rx_std_map[i]);
sc 944 dev/pci/if_ti.c sc->ti_cdata.ti_rx_std_map[i] = 0;
sc 946 dev/pci/if_ti.c bzero((char *)&sc->ti_rdata->ti_rx_std_ring[i],
sc 952 dev/pci/if_ti.c ti_init_rx_ring_jumbo(struct ti_softc *sc)
sc 958 dev/pci/if_ti.c if (ti_newbuf_jumbo(sc, i, NULL) == ENOBUFS)
sc 962 dev/pci/if_ti.c TI_UPDATE_JUMBOPROD(sc, i - 1);
sc 963 dev/pci/if_ti.c sc->ti_jumbo = i - 1;
sc 969 dev/pci/if_ti.c ti_free_rx_ring_jumbo(struct ti_softc *sc)
sc 974 dev/pci/if_ti.c if (sc->ti_cdata.ti_rx_jumbo_chain[i] != NULL) {
sc 975 dev/pci/if_ti.c m_freem(sc->ti_cdata.ti_rx_jumbo_chain[i]);
sc 976 dev/pci/if_ti.c sc->ti_cdata.ti_rx_jumbo_chain[i] = NULL;
sc 978 dev/pci/if_ti.c bzero((char *)&sc->ti_rdata->ti_rx_jumbo_ring[i],
sc 984 dev/pci/if_ti.c ti_init_rx_ring_mini(struct ti_softc *sc)
sc 989 dev/pci/if_ti.c if (ti_newbuf_mini(sc, i, NULL, 0) == ENOBUFS)
sc 993 dev/pci/if_ti.c TI_UPDATE_MINIPROD(sc, i - 1);
sc 994 dev/pci/if_ti.c sc->ti_mini = i - 1;
sc 1000 dev/pci/if_ti.c ti_free_rx_ring_mini(struct ti_softc *sc)
sc 1005 dev/pci/if_ti.c if (sc->ti_cdata.ti_rx_mini_chain[i] != NULL) {
sc 1006 dev/pci/if_ti.c m_freem(sc->ti_cdata.ti_rx_mini_chain[i]);
sc 1007 dev/pci/if_ti.c sc->ti_cdata.ti_rx_mini_chain[i] = NULL;
sc 1008 dev/pci/if_ti.c bus_dmamap_destroy(sc->sc_dmatag,
sc 1009 dev/pci/if_ti.c sc->ti_cdata.ti_rx_mini_map[i]);
sc 1010 dev/pci/if_ti.c sc->ti_cdata.ti_rx_mini_map[i] = 0;
sc 1012 dev/pci/if_ti.c bzero((char *)&sc->ti_rdata->ti_rx_mini_ring[i],
sc 1018 dev/pci/if_ti.c ti_free_tx_ring(struct ti_softc *sc)
sc 1023 dev/pci/if_ti.c if (sc->ti_rdata->ti_tx_ring == NULL)
sc 1027 dev/pci/if_ti.c if (sc->ti_cdata.ti_tx_chain[i] != NULL) {
sc 1028 dev/pci/if_ti.c m_freem(sc->ti_cdata.ti_tx_chain[i]);
sc 1029 dev/pci/if_ti.c sc->ti_cdata.ti_tx_chain[i] = NULL;
sc 1030 dev/pci/if_ti.c SLIST_INSERT_HEAD(&sc->ti_tx_map_listhead,
sc 1031 dev/pci/if_ti.c sc->ti_cdata.ti_tx_map[i], link);
sc 1032 dev/pci/if_ti.c sc->ti_cdata.ti_tx_map[i] = 0;
sc 1034 dev/pci/if_ti.c bzero((char *)&sc->ti_rdata->ti_tx_ring[i],
sc 1038 dev/pci/if_ti.c while ((entry = SLIST_FIRST(&sc->ti_tx_map_listhead))) {
sc 1039 dev/pci/if_ti.c SLIST_REMOVE_HEAD(&sc->ti_tx_map_listhead, link);
sc 1040 dev/pci/if_ti.c bus_dmamap_destroy(sc->sc_dmatag, entry->dmamap);
sc 1046 dev/pci/if_ti.c ti_init_tx_ring(struct ti_softc *sc)
sc 1052 dev/pci/if_ti.c sc->ti_txcnt = 0;
sc 1053 dev/pci/if_ti.c sc->ti_tx_saved_considx = 0;
sc 1054 dev/pci/if_ti.c sc->ti_tx_saved_prodidx = 0;
sc 1055 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, 0);
sc 1057 dev/pci/if_ti.c SLIST_INIT(&sc->ti_tx_map_listhead);
sc 1059 dev/pci/if_ti.c if (bus_dmamap_create(sc->sc_dmatag, TI_JUMBO_FRAMELEN,
sc 1065 dev/pci/if_ti.c bus_dmamap_destroy(sc->sc_dmatag, dmamap);
sc 1069 dev/pci/if_ti.c SLIST_INSERT_HEAD(&sc->ti_tx_map_listhead, entry, link);
sc 1081 dev/pci/if_ti.c ti_add_mcast(struct ti_softc *sc, struct ether_addr *addr)
sc 1089 dev/pci/if_ti.c switch(sc->ti_hwrev) {
sc 1091 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0]));
sc 1092 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2]));
sc 1101 dev/pci/if_ti.c printf("%s: unknown hwrev\n", sc->sc_dv.dv_xname);
sc 1107 dev/pci/if_ti.c ti_del_mcast(struct ti_softc *sc, struct ether_addr *addr)
sc 1115 dev/pci/if_ti.c switch(sc->ti_hwrev) {
sc 1117 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_MAR0, htons(m[0]));
sc 1118 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_MAR1, (htons(m[1]) << 16) | htons(m[2]));
sc 1127 dev/pci/if_ti.c printf("%s: unknown hwrev\n", sc->sc_dv.dv_xname);
sc 1147 dev/pci/if_ti.c ti_setmulti(struct ti_softc *sc)
sc 1150 dev/pci/if_ti.c struct arpcom *ac = &sc->arpcom;
sc 1157 dev/pci/if_ti.c ifp = &sc->arpcom.ac_if;
sc 1168 dev/pci/if_ti.c intrs = CSR_READ_4(sc, TI_MB_HOSTINTR);
sc 1169 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1);
sc 1172 dev/pci/if_ti.c while (SLIST_FIRST(&sc->ti_mc_listhead) != NULL) {
sc 1173 dev/pci/if_ti.c mc = SLIST_FIRST(&sc->ti_mc_listhead);
sc 1174 dev/pci/if_ti.c ti_del_mcast(sc, &mc->mc_addr);
sc 1175 dev/pci/if_ti.c SLIST_REMOVE_HEAD(&sc->ti_mc_listhead, mc_entries);
sc 1184 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MB_HOSTINTR, intrs);
sc 1193 dev/pci/if_ti.c SLIST_INSERT_HEAD(&sc->ti_mc_listhead, mc, mc_entries);
sc 1194 dev/pci/if_ti.c ti_add_mcast(sc, &mc->mc_addr);
sc 1199 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MB_HOSTINTR, intrs);
sc 1209 dev/pci/if_ti.c ti_64bitslot_war(struct ti_softc *sc)
sc 1211 dev/pci/if_ti.c if (!(CSR_READ_4(sc, TI_PCI_STATE) & TI_PCISTATE_32BIT_BUS)) {
sc 1212 dev/pci/if_ti.c CSR_WRITE_4(sc, 0x600, 0);
sc 1213 dev/pci/if_ti.c CSR_WRITE_4(sc, 0x604, 0);
sc 1214 dev/pci/if_ti.c CSR_WRITE_4(sc, 0x600, 0x5555AAAA);
sc 1215 dev/pci/if_ti.c if (CSR_READ_4(sc, 0x604) == 0x5555AAAA) {
sc 1216 dev/pci/if_ti.c if (sc->ti_hwrev == TI_HWREV_TIGON)
sc 1219 dev/pci/if_ti.c TI_SETBIT(sc, TI_PCI_STATE,
sc 1234 dev/pci/if_ti.c ti_chipinit(struct ti_softc *sc)
sc 1241 dev/pci/if_ti.c sc->ti_linkstat = TI_EV_CODE_LINK_DOWN;
sc 1244 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MISC_HOST_CTL,
sc 1248 dev/pci/if_ti.c if (CSR_READ_4(sc, TI_CPU_STATE) & TI_CPUSTATE_ROMFAIL) {
sc 1250 dev/pci/if_ti.c sc->sc_dv.dv_xname);
sc 1255 dev/pci/if_ti.c TI_SETBIT(sc, TI_CPU_STATE, TI_CPUSTATE_HALT);
sc 1258 dev/pci/if_ti.c chip_rev = CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_CHIP_REV_MASK;
sc 1261 dev/pci/if_ti.c sc->ti_hwrev = TI_HWREV_TIGON;
sc 1264 dev/pci/if_ti.c sc->ti_hwrev = TI_HWREV_TIGON_II;
sc 1269 dev/pci/if_ti.c chip_rev, sc->sc_dv.dv_xname);
sc 1274 dev/pci/if_ti.c if (sc->ti_hwrev == TI_HWREV_TIGON_II) {
sc 1275 dev/pci/if_ti.c TI_SETBIT(sc, TI_CPU_CTL_B, TI_CPUSTATE_HALT);
sc 1276 dev/pci/if_ti.c TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_SRAM_BANK_512K);
sc 1277 dev/pci/if_ti.c TI_SETBIT(sc, TI_MISC_CONF, TI_MCR_SRAM_SYNCHRONOUS);
sc 1281 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_PCI_STATE, TI_PCI_READ_CMD|TI_PCI_WRITE_CMD);
sc 1282 dev/pci/if_ti.c if (sc->ti_hwrev == TI_HWREV_TIGON_II)
sc 1283 dev/pci/if_ti.c TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_USE_MEM_RD_MULT);
sc 1286 dev/pci/if_ti.c TI_CLRBIT(sc, TI_PCI_STATE, (TI_PCISTATE_WRITE_MAXDMA|
sc 1290 dev/pci/if_ti.c cacheline = CSR_READ_4(sc, TI_PCI_BIST) & 0xFF;
sc 1298 dev/pci/if_ti.c if (CSR_READ_4(sc, TI_PCI_CMDSTAT) & PCI_COMMAND_INVALIDATE_ENABLE) {
sc 1309 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_PCI_CMDSTAT, CSR_READ_4(sc,
sc 1323 dev/pci/if_ti.c TI_SETBIT(sc, TI_PCI_STATE, pci_writemax|TI_PCI_READMAX_1024);
sc 1325 dev/pci/if_ti.c TI_SETBIT(sc, TI_PCI_STATE, pci_writemax);
sc 1329 dev/pci/if_ti.c TI_SETBIT(sc, TI_PCI_STATE, TI_PCISTATE_MINDMA);
sc 1332 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_OPMODE, TI_DMA_SWAP_OPTIONS |
sc 1337 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_DMA_WRITECFG, TI_DMA_STATE_THRESH_8W);
sc 1338 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_DMA_READCFG, TI_DMA_STATE_THRESH_8W);
sc 1340 dev/pci/if_ti.c if (ti_64bitslot_war(sc)) {
sc 1342 dev/pci/if_ti.c "but we aren't", sc->sc_dv.dv_xname);
sc 1354 dev/pci/if_ti.c ti_gibinit(struct ti_softc *sc)
sc 1360 dev/pci/if_ti.c ifp = &sc->arpcom.ac_if;
sc 1363 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1);
sc 1371 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_GENINFO_HI, 0);
sc 1372 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_GENINFO_LO,
sc 1373 dev/pci/if_ti.c TI_RING_DMA_ADDR(sc, ti_info) & 0xffffffff);
sc 1376 dev/pci/if_ti.c ti_loadfw(sc);
sc 1381 dev/pci/if_ti.c rcb = &sc->ti_rdata->ti_info.ti_ev_rcb;
sc 1383 dev/pci/if_ti.c TI_HOSTADDR(rcb->ti_hostaddr) = TI_RING_DMA_ADDR(sc, ti_event_ring);
sc 1385 dev/pci/if_ti.c TI_HOSTADDR(sc->ti_rdata->ti_info.ti_ev_prodidx_ptr) =
sc 1386 dev/pci/if_ti.c TI_RING_DMA_ADDR(sc, ti_ev_prodidx_r);
sc 1387 dev/pci/if_ti.c sc->ti_ev_prodidx.ti_idx = 0;
sc 1388 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_EVENTCONS_IDX, 0);
sc 1389 dev/pci/if_ti.c sc->ti_ev_saved_considx = 0;
sc 1392 dev/pci/if_ti.c rcb = &sc->ti_rdata->ti_info.ti_cmd_rcb;
sc 1398 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_CMDRING + (i * 4), 0);
sc 1400 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_CMDCONS_IDX, 0);
sc 1401 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MB_CMDPROD_IDX, 0);
sc 1402 dev/pci/if_ti.c sc->ti_cmd_saved_prodidx = 0;
sc 1409 dev/pci/if_ti.c TI_HOSTADDR(sc->ti_rdata->ti_info.ti_refresh_stats_ptr) =
sc 1410 dev/pci/if_ti.c TI_RING_DMA_ADDR(sc, ti_info.ti_stats);
sc 1413 dev/pci/if_ti.c rcb = &sc->ti_rdata->ti_info.ti_std_rx_rcb;
sc 1415 dev/pci/if_ti.c TI_RING_DMA_ADDR(sc, ti_rx_std_ring);
sc 1421 dev/pci/if_ti.c rcb = &sc->ti_rdata->ti_info.ti_jumbo_rx_rcb;
sc 1422 dev/pci/if_ti.c TI_HOSTADDR(rcb->ti_hostaddr) = TI_RING_DMA_ADDR(sc, ti_rx_jumbo_ring);
sc 1432 dev/pci/if_ti.c rcb = &sc->ti_rdata->ti_info.ti_mini_rx_rcb;
sc 1433 dev/pci/if_ti.c TI_HOSTADDR(rcb->ti_hostaddr) = TI_RING_DMA_ADDR(sc, ti_rx_mini_ring);
sc 1435 dev/pci/if_ti.c if (sc->ti_hwrev == TI_HWREV_TIGON)
sc 1444 dev/pci/if_ti.c rcb = &sc->ti_rdata->ti_info.ti_return_rcb;
sc 1445 dev/pci/if_ti.c TI_HOSTADDR(rcb->ti_hostaddr) = TI_RING_DMA_ADDR(sc,ti_rx_return_ring);
sc 1448 dev/pci/if_ti.c TI_HOSTADDR(sc->ti_rdata->ti_info.ti_return_prodidx_ptr) =
sc 1449 dev/pci/if_ti.c TI_RING_DMA_ADDR(sc, ti_return_prodidx_r);
sc 1460 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_WINBASE, TI_TX_RING_BASE);
sc 1461 dev/pci/if_ti.c bzero((char *)sc->ti_rdata->ti_tx_ring,
sc 1463 dev/pci/if_ti.c rcb = &sc->ti_rdata->ti_info.ti_tx_rcb;
sc 1464 dev/pci/if_ti.c if (sc->ti_hwrev == TI_HWREV_TIGON)
sc 1474 dev/pci/if_ti.c if (sc->ti_hwrev == TI_HWREV_TIGON)
sc 1478 dev/pci/if_ti.c TI_RING_DMA_ADDR(sc, ti_tx_ring);
sc 1479 dev/pci/if_ti.c TI_HOSTADDR(sc->ti_rdata->ti_info.ti_tx_considx_ptr) =
sc 1480 dev/pci/if_ti.c TI_RING_DMA_ADDR(sc, ti_tx_considx_r);
sc 1482 dev/pci/if_ti.c TI_RING_DMASYNC(sc, ti_info, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
sc 1485 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_RX_COAL_TICKS, (sc->ti_rx_coal_ticks / 10));
sc 1486 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_TX_COAL_TICKS, sc->ti_tx_coal_ticks);
sc 1487 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_STAT_TICKS, sc->ti_stat_ticks);
sc 1488 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_RX_MAX_COAL_BD, sc->ti_rx_max_coal_bds);
sc 1489 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_TX_MAX_COAL_BD, sc->ti_tx_max_coal_bds);
sc 1490 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_TX_BUFFER_RATIO, sc->ti_tx_buf_ratio);
sc 1493 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_MASK_INTRS, 0);
sc 1494 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0);
sc 1497 dev/pci/if_ti.c TI_CLRBIT(sc, TI_CPU_STATE, (TI_CPUSTATE_HALT|TI_CPUSTATE_STEP));
sc 1516 dev/pci/if_ti.c struct ti_softc *sc = (struct ti_softc *)self;
sc 1533 dev/pci/if_ti.c &sc->ti_btag, &sc->ti_bhandle, NULL, &size, 0)) {
sc 1543 dev/pci/if_ti.c sc->ti_intrhand = pci_intr_establish(pc, ih, IPL_NET, ti_intr, sc,
sc 1545 dev/pci/if_ti.c if (sc->ti_intrhand == NULL) {
sc 1553 dev/pci/if_ti.c if (ti_chipinit(sc)) {
sc 1554 dev/pci/if_ti.c printf("%s: chip initialization failed\n", sc->sc_dv.dv_xname);
sc 1559 dev/pci/if_ti.c ti_mem_set(sc, 0x2000, 0x100000 - 0x2000);
sc 1562 dev/pci/if_ti.c if (ti_chipinit(sc)) {
sc 1563 dev/pci/if_ti.c printf("%s: chip initialization failed\n", sc->sc_dv.dv_xname);
sc 1574 dev/pci/if_ti.c if (ti_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr,
sc 1577 dev/pci/if_ti.c sc->sc_dv.dv_xname);
sc 1578 dev/pci/if_ti.c free(sc, M_DEVBUF);
sc 1586 dev/pci/if_ti.c ether_sprintf(sc->arpcom.ac_enaddr));
sc 1589 dev/pci/if_ti.c sc->sc_dmatag = pa->pa_dmat;
sc 1590 dev/pci/if_ti.c if (bus_dmamem_alloc(sc->sc_dmatag, sizeof(struct ti_ring_data),
sc 1592 dev/pci/if_ti.c printf("%s: can't alloc rx buffers\n", sc->sc_dv.dv_xname);
sc 1595 dev/pci/if_ti.c if (bus_dmamem_map(sc->sc_dmatag, &seg, rseg,
sc 1598 dev/pci/if_ti.c sc->sc_dv.dv_xname, sizeof(struct ti_ring_data));
sc 1601 dev/pci/if_ti.c if (bus_dmamap_create(sc->sc_dmatag, sizeof(struct ti_ring_data), 1,
sc 1603 dev/pci/if_ti.c &sc->ti_ring_map)) {
sc 1604 dev/pci/if_ti.c printf("%s: can't create dma map\n", sc->sc_dv.dv_xname);
sc 1607 dev/pci/if_ti.c if (bus_dmamap_load(sc->sc_dmatag, sc->ti_ring_map, kva,
sc 1611 dev/pci/if_ti.c sc->ti_rdata = (struct ti_ring_data *)kva;
sc 1612 dev/pci/if_ti.c bzero(sc->ti_rdata, sizeof(struct ti_ring_data));
sc 1615 dev/pci/if_ti.c if (ti_alloc_jumbo_mem(sc)) {
sc 1617 dev/pci/if_ti.c sc->sc_dv.dv_xname);
sc 1630 dev/pci/if_ti.c sc->ti_copper = 1;
sc 1634 dev/pci/if_ti.c sc->ti_copper = 1;
sc 1637 dev/pci/if_ti.c sc->ti_stat_ticks = 2 * TI_TICKS_PER_SEC;
sc 1638 dev/pci/if_ti.c sc->ti_rx_coal_ticks = TI_TICKS_PER_SEC / 5000;
sc 1639 dev/pci/if_ti.c sc->ti_tx_coal_ticks = TI_TICKS_PER_SEC / 500;
sc 1640 dev/pci/if_ti.c sc->ti_rx_max_coal_bds = 64;
sc 1641 dev/pci/if_ti.c sc->ti_tx_max_coal_bds = 128;
sc 1642 dev/pci/if_ti.c sc->ti_tx_buf_ratio = 21;
sc 1645 dev/pci/if_ti.c ifp = &sc->arpcom.ac_if;
sc 1646 dev/pci/if_ti.c ifp->if_softc = sc;
sc 1654 dev/pci/if_ti.c bcopy(sc->sc_dv.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 1663 dev/pci/if_ti.c ifmedia_init(&sc->ifmedia, IFM_IMASK, ti_ifmedia_upd, ti_ifmedia_sts);
sc 1664 dev/pci/if_ti.c if (sc->ti_copper) {
sc 1673 dev/pci/if_ti.c ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL);
sc 1674 dev/pci/if_ti.c ifmedia_add(&sc->ifmedia,
sc 1676 dev/pci/if_ti.c ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL);
sc 1677 dev/pci/if_ti.c ifmedia_add(&sc->ifmedia,
sc 1679 dev/pci/if_ti.c ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_1000_T, 0, NULL);
sc 1680 dev/pci/if_ti.c ifmedia_add(&sc->ifmedia,
sc 1684 dev/pci/if_ti.c ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_1000_SX, 0, NULL);
sc 1685 dev/pci/if_ti.c ifmedia_add(&sc->ifmedia,
sc 1688 dev/pci/if_ti.c ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
sc 1689 dev/pci/if_ti.c ifmedia_set(&sc->ifmedia, IFM_ETHER|IFM_AUTO);
sc 1697 dev/pci/if_ti.c shutdownhook_establish(ti_shutdown, sc);
sc 1701 dev/pci/if_ti.c bus_dmamap_destroy(sc->sc_dmatag, sc->ti_ring_map);
sc 1704 dev/pci/if_ti.c bus_dmamem_unmap(sc->sc_dmatag, kva,
sc 1708 dev/pci/if_ti.c bus_dmamem_free(sc->sc_dmatag, &seg, rseg);
sc 1711 dev/pci/if_ti.c pci_intr_disestablish(pc, sc->ti_intrhand);
sc 1714 dev/pci/if_ti.c bus_space_unmap(sc->ti_btag, sc->ti_bhandle, size);
sc 1729 dev/pci/if_ti.c ti_rxeof(struct ti_softc *sc)
sc 1734 dev/pci/if_ti.c ifp = &sc->arpcom.ac_if;
sc 1736 dev/pci/if_ti.c while(sc->ti_rx_saved_considx != sc->ti_return_prodidx.ti_idx) {
sc 1744 dev/pci/if_ti.c &sc->ti_rdata->ti_rx_return_ring[sc->ti_rx_saved_considx];
sc 1746 dev/pci/if_ti.c TI_INC(sc->ti_rx_saved_considx, TI_RETURN_RING_CNT);
sc 1749 dev/pci/if_ti.c TI_INC(sc->ti_jumbo, TI_JUMBO_RX_RING_CNT);
sc 1750 dev/pci/if_ti.c m = sc->ti_cdata.ti_rx_jumbo_chain[rxidx];
sc 1751 dev/pci/if_ti.c sc->ti_cdata.ti_rx_jumbo_chain[rxidx] = NULL;
sc 1754 dev/pci/if_ti.c ti_newbuf_jumbo(sc, sc->ti_jumbo, m);
sc 1757 dev/pci/if_ti.c if (ti_newbuf_jumbo(sc, sc->ti_jumbo, NULL)
sc 1762 dev/pci/if_ti.c ti_newbuf_jumbo(sc, sc->ti_jumbo, m);
sc 1771 dev/pci/if_ti.c TI_INC(sc->ti_mini, TI_MINI_RX_RING_CNT);
sc 1772 dev/pci/if_ti.c m = sc->ti_cdata.ti_rx_mini_chain[rxidx];
sc 1773 dev/pci/if_ti.c sc->ti_cdata.ti_rx_mini_chain[rxidx] = NULL;
sc 1774 dev/pci/if_ti.c dmamap = sc->ti_cdata.ti_rx_mini_map[rxidx];
sc 1775 dev/pci/if_ti.c sc->ti_cdata.ti_rx_mini_map[rxidx] = 0;
sc 1778 dev/pci/if_ti.c ti_newbuf_mini(sc, sc->ti_mini, m, dmamap);
sc 1781 dev/pci/if_ti.c if (ti_newbuf_mini(sc, sc->ti_mini, NULL, dmamap)
sc 1784 dev/pci/if_ti.c ti_newbuf_mini(sc, sc->ti_mini, m, dmamap);
sc 1788 dev/pci/if_ti.c TI_INC(sc->ti_std, TI_STD_RX_RING_CNT);
sc 1789 dev/pci/if_ti.c m = sc->ti_cdata.ti_rx_std_chain[rxidx];
sc 1790 dev/pci/if_ti.c sc->ti_cdata.ti_rx_std_chain[rxidx] = NULL;
sc 1791 dev/pci/if_ti.c dmamap = sc->ti_cdata.ti_rx_std_map[rxidx];
sc 1792 dev/pci/if_ti.c sc->ti_cdata.ti_rx_std_map[rxidx] = 0;
sc 1795 dev/pci/if_ti.c ti_newbuf_std(sc, sc->ti_std, m, dmamap);
sc 1798 dev/pci/if_ti.c if (ti_newbuf_std(sc, sc->ti_std, NULL, dmamap)
sc 1801 dev/pci/if_ti.c ti_newbuf_std(sc, sc->ti_std, m, dmamap);
sc 1807 dev/pci/if_ti.c panic("%s: couldn't get mbuf", sc->sc_dv.dv_xname);
sc 1830 dev/pci/if_ti.c if (sc->ti_hwrev == TI_HWREV_TIGON)
sc 1831 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX,
sc 1832 dev/pci/if_ti.c sc->ti_rx_saved_considx);
sc 1834 dev/pci/if_ti.c TI_UPDATE_STDPROD(sc, sc->ti_std);
sc 1835 dev/pci/if_ti.c TI_UPDATE_MINIPROD(sc, sc->ti_mini);
sc 1836 dev/pci/if_ti.c TI_UPDATE_JUMBOPROD(sc, sc->ti_jumbo);
sc 1840 dev/pci/if_ti.c ti_txeof_tigon1(struct ti_softc *sc)
sc 1846 dev/pci/if_ti.c ifp = &sc->arpcom.ac_if;
sc 1852 dev/pci/if_ti.c while (sc->ti_tx_saved_considx != sc->ti_tx_considx.ti_idx) {
sc 1856 dev/pci/if_ti.c idx = sc->ti_tx_saved_considx;
sc 1857 dev/pci/if_ti.c ti_mem_read(sc, TI_TX_RING_BASE + idx * sizeof(txdesc),
sc 1863 dev/pci/if_ti.c if (sc->ti_cdata.ti_tx_chain[idx] != NULL) {
sc 1864 dev/pci/if_ti.c m_freem(sc->ti_cdata.ti_tx_chain[idx]);
sc 1865 dev/pci/if_ti.c sc->ti_cdata.ti_tx_chain[idx] = NULL;
sc 1867 dev/pci/if_ti.c entry = sc->ti_cdata.ti_tx_map[idx];
sc 1868 dev/pci/if_ti.c bus_dmamap_sync(sc->sc_dmatag, entry->dmamap, 0,
sc 1871 dev/pci/if_ti.c bus_dmamap_unload(sc->sc_dmatag, entry->dmamap);
sc 1872 dev/pci/if_ti.c SLIST_INSERT_HEAD(&sc->ti_tx_map_listhead, entry,
sc 1874 dev/pci/if_ti.c sc->ti_cdata.ti_tx_map[idx] = NULL;
sc 1877 dev/pci/if_ti.c sc->ti_txcnt--;
sc 1878 dev/pci/if_ti.c TI_INC(sc->ti_tx_saved_considx, TI_TX_RING_CNT);
sc 1889 dev/pci/if_ti.c ti_txeof_tigon2(struct ti_softc *sc)
sc 1895 dev/pci/if_ti.c ifp = &sc->arpcom.ac_if;
sc 1901 dev/pci/if_ti.c while (sc->ti_tx_saved_considx != sc->ti_tx_considx.ti_idx) {
sc 1904 dev/pci/if_ti.c idx = sc->ti_tx_saved_considx;
sc 1905 dev/pci/if_ti.c cur_tx = &sc->ti_rdata->ti_tx_ring[idx];
sc 1909 dev/pci/if_ti.c if (sc->ti_cdata.ti_tx_chain[idx] != NULL) {
sc 1910 dev/pci/if_ti.c m_freem(sc->ti_cdata.ti_tx_chain[idx]);
sc 1911 dev/pci/if_ti.c sc->ti_cdata.ti_tx_chain[idx] = NULL;
sc 1913 dev/pci/if_ti.c entry = sc->ti_cdata.ti_tx_map[idx];
sc 1914 dev/pci/if_ti.c bus_dmamap_sync(sc->sc_dmatag, entry->dmamap, 0,
sc 1917 dev/pci/if_ti.c bus_dmamap_unload(sc->sc_dmatag, entry->dmamap);
sc 1918 dev/pci/if_ti.c SLIST_INSERT_HEAD(&sc->ti_tx_map_listhead, entry,
sc 1920 dev/pci/if_ti.c sc->ti_cdata.ti_tx_map[idx] = NULL;
sc 1923 dev/pci/if_ti.c sc->ti_txcnt--;
sc 1924 dev/pci/if_ti.c TI_INC(sc->ti_tx_saved_considx, TI_TX_RING_CNT);
sc 1935 dev/pci/if_ti.c struct ti_softc *sc;
sc 1938 dev/pci/if_ti.c sc = xsc;
sc 1939 dev/pci/if_ti.c ifp = &sc->arpcom.ac_if;
sc 1943 dev/pci/if_ti.c if (!(CSR_READ_4(sc, TI_MISC_HOST_CTL) & TI_MHC_INTSTATE))
sc 1947 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1);
sc 1951 dev/pci/if_ti.c ti_rxeof(sc);
sc 1954 dev/pci/if_ti.c if (sc->ti_hwrev == TI_HWREV_TIGON)
sc 1955 dev/pci/if_ti.c ti_txeof_tigon1(sc);
sc 1957 dev/pci/if_ti.c ti_txeof_tigon2(sc);
sc 1960 dev/pci/if_ti.c ti_handle_events(sc);
sc 1963 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0);
sc 1972 dev/pci/if_ti.c ti_stats_update(struct ti_softc *sc)
sc 1975 dev/pci/if_ti.c struct ti_stats *stats = &sc->ti_rdata->ti_info.ti_stats;
sc 1977 dev/pci/if_ti.c ifp = &sc->arpcom.ac_if;
sc 1979 dev/pci/if_ti.c TI_RING_DMASYNC(sc, ti_info.ti_stats, BUS_DMASYNC_POSTREAD);
sc 1987 dev/pci/if_ti.c TI_RING_DMASYNC(sc, ti_info.ti_stats, BUS_DMASYNC_PREREAD);
sc 1995 dev/pci/if_ti.c ti_encap_tigon1(struct ti_softc *sc, struct mbuf *m_head, u_int32_t *txidx)
sc 2010 dev/pci/if_ti.c entry = SLIST_FIRST(&sc->ti_tx_map_listhead);
sc 2022 dev/pci/if_ti.c if (bus_dmamap_load_mbuf(sc->sc_dmatag, txmap, m_head,
sc 2027 dev/pci/if_ti.c if (sc->ti_cdata.ti_tx_chain[frag] != NULL)
sc 2043 dev/pci/if_ti.c ti_mem_write(sc, TI_TX_RING_BASE + frag * sizeof(txdesc),
sc 2050 dev/pci/if_ti.c if ((TI_TX_RING_CNT - (sc->ti_txcnt + cnt)) < 16)
sc 2057 dev/pci/if_ti.c if (frag == sc->ti_tx_saved_considx)
sc 2061 dev/pci/if_ti.c ti_mem_write(sc, TI_TX_RING_BASE + cur * sizeof(txdesc),
sc 2064 dev/pci/if_ti.c bus_dmamap_sync(sc->sc_dmatag, txmap, 0, txmap->dm_mapsize,
sc 2067 dev/pci/if_ti.c sc->ti_cdata.ti_tx_chain[cur] = m_head;
sc 2068 dev/pci/if_ti.c SLIST_REMOVE_HEAD(&sc->ti_tx_map_listhead, link);
sc 2069 dev/pci/if_ti.c sc->ti_cdata.ti_tx_map[cur] = entry;
sc 2070 dev/pci/if_ti.c sc->ti_txcnt += cnt;
sc 2082 dev/pci/if_ti.c ti_encap_tigon2(struct ti_softc *sc, struct mbuf *m_head, u_int32_t *txidx)
sc 2097 dev/pci/if_ti.c entry = SLIST_FIRST(&sc->ti_tx_map_listhead);
sc 2109 dev/pci/if_ti.c if (bus_dmamap_load_mbuf(sc->sc_dmatag, txmap, m_head,
sc 2114 dev/pci/if_ti.c f = &sc->ti_rdata->ti_tx_ring[frag];
sc 2116 dev/pci/if_ti.c if (sc->ti_cdata.ti_tx_chain[frag] != NULL)
sc 2134 dev/pci/if_ti.c if ((TI_TX_RING_CNT - (sc->ti_txcnt + cnt)) < 16)
sc 2141 dev/pci/if_ti.c if (frag == sc->ti_tx_saved_considx)
sc 2144 dev/pci/if_ti.c sc->ti_rdata->ti_tx_ring[cur].ti_flags |= TI_BDFLAG_END;
sc 2146 dev/pci/if_ti.c bus_dmamap_sync(sc->sc_dmatag, txmap, 0, txmap->dm_mapsize,
sc 2149 dev/pci/if_ti.c TI_RING_DMASYNC(sc, ti_tx_ring[cur], BUS_DMASYNC_POSTREAD);
sc 2151 dev/pci/if_ti.c sc->ti_cdata.ti_tx_chain[cur] = m_head;
sc 2152 dev/pci/if_ti.c SLIST_REMOVE_HEAD(&sc->ti_tx_map_listhead, link);
sc 2153 dev/pci/if_ti.c sc->ti_cdata.ti_tx_map[cur] = entry;
sc 2154 dev/pci/if_ti.c sc->ti_txcnt += cnt;
sc 2168 dev/pci/if_ti.c struct ti_softc *sc;
sc 2173 dev/pci/if_ti.c sc = ifp->if_softc;
sc 2175 dev/pci/if_ti.c prodidx = sc->ti_tx_saved_prodidx;
sc 2177 dev/pci/if_ti.c while(sc->ti_cdata.ti_tx_chain[prodidx] == NULL) {
sc 2187 dev/pci/if_ti.c if (sc->ti_hwrev == TI_HWREV_TIGON)
sc 2188 dev/pci/if_ti.c error = ti_encap_tigon1(sc, m_head, &prodidx);
sc 2190 dev/pci/if_ti.c error = ti_encap_tigon2(sc, m_head, &prodidx);
sc 2214 dev/pci/if_ti.c sc->ti_tx_saved_prodidx = prodidx;
sc 2215 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MB_SENDPROD_IDX, prodidx);
sc 2226 dev/pci/if_ti.c struct ti_softc *sc = xsc;
sc 2232 dev/pci/if_ti.c ti_stop(sc);
sc 2235 dev/pci/if_ti.c if (ti_gibinit(sc)) {
sc 2236 dev/pci/if_ti.c printf("%s: initialization failure\n", sc->sc_dv.dv_xname);
sc 2245 dev/pci/if_ti.c ti_init2(struct ti_softc *sc)
sc 2253 dev/pci/if_ti.c ifp = &sc->arpcom.ac_if;
sc 2256 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_IFINDEX, sc->sc_dv.dv_unit);
sc 2257 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_IFMTU,
sc 2262 dev/pci/if_ti.c m = (u_int16_t *)&sc->arpcom.ac_enaddr[0];
sc 2263 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_PAR0, htons(m[0]));
sc 2264 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_PAR1, (htons(m[1]) << 16) | htons(m[2]));
sc 2275 dev/pci/if_ti.c ti_setmulti(sc);
sc 2281 dev/pci/if_ti.c if (sc->ti_hwrev == TI_HWREV_TIGON) {
sc 2286 dev/pci/if_ti.c if (ti_init_rx_ring_std(sc) == ENOBUFS)
sc 2290 dev/pci/if_ti.c ti_init_rx_ring_jumbo(sc);
sc 2296 dev/pci/if_ti.c if (sc->ti_hwrev == TI_HWREV_TIGON_II)
sc 2297 dev/pci/if_ti.c ti_init_rx_ring_mini(sc);
sc 2299 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_RXRETURNCONS_IDX, 0);
sc 2300 dev/pci/if_ti.c sc->ti_rx_saved_considx = 0;
sc 2303 dev/pci/if_ti.c ti_init_tx_ring(sc);
sc 2309 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MB_HOSTINTR, 0);
sc 2320 dev/pci/if_ti.c ifm = &sc->ifmedia;
sc 2333 dev/pci/if_ti.c struct ti_softc *sc;
sc 2337 dev/pci/if_ti.c sc = ifp->if_softc;
sc 2338 dev/pci/if_ti.c ifm = &sc->ifmedia;
sc 2345 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB|
sc 2348 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_100MB|TI_LNK_10MB|
sc 2356 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_GLINK, TI_GLNK_PREF|TI_GLNK_1000MB|
sc 2358 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_LINK, 0);
sc 2360 dev/pci/if_ti.c TI_SETBIT(sc, TI_GCR_GLINK, TI_GLNK_FULL_DUPLEX);
sc 2369 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_GLINK, 0);
sc 2370 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_GCR_LINK, TI_LNK_ENB|TI_LNK_PREF);
sc 2373 dev/pci/if_ti.c TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_100MB);
sc 2375 dev/pci/if_ti.c TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_10MB);
sc 2378 dev/pci/if_ti.c TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_FULL_DUPLEX);
sc 2380 dev/pci/if_ti.c TI_SETBIT(sc, TI_GCR_LINK, TI_LNK_HALF_DUPLEX);
sc 2396 dev/pci/if_ti.c struct ti_softc *sc;
sc 2399 dev/pci/if_ti.c sc = ifp->if_softc;
sc 2404 dev/pci/if_ti.c if (sc->ti_linkstat == TI_EV_CODE_LINK_DOWN) {
sc 2411 dev/pci/if_ti.c if (sc->ti_linkstat == TI_EV_CODE_GIG_LINK_UP) {
sc 2412 dev/pci/if_ti.c media = CSR_READ_4(sc, TI_GCR_GLINK_STAT);
sc 2413 dev/pci/if_ti.c if (sc->ti_copper)
sc 2421 dev/pci/if_ti.c } else if (sc->ti_linkstat == TI_EV_CODE_LINK_UP) {
sc 2422 dev/pci/if_ti.c media = CSR_READ_4(sc, TI_GCR_LINK_STAT);
sc 2423 dev/pci/if_ti.c if (sc->ti_copper) {
sc 2444 dev/pci/if_ti.c struct ti_softc *sc = ifp->if_softc;
sc 2452 dev/pci/if_ti.c if ((error = ether_ioctl(ifp, &sc->arpcom, command, data)) > 0) {
sc 2461 dev/pci/if_ti.c ti_init(sc);
sc 2464 dev/pci/if_ti.c arp_ifinit(&sc->arpcom, ifa);
sc 2485 dev/pci/if_ti.c !(sc->ti_if_flags & IFF_PROMISC)) {
sc 2490 dev/pci/if_ti.c sc->ti_if_flags & IFF_PROMISC) {
sc 2495 dev/pci/if_ti.c ti_init(sc);
sc 2499 dev/pci/if_ti.c ti_stop(sc);
sc 2501 dev/pci/if_ti.c sc->ti_if_flags = ifp->if_flags;
sc 2506 dev/pci/if_ti.c ether_addmulti(ifr, &sc->arpcom) :
sc 2507 dev/pci/if_ti.c ether_delmulti(ifr, &sc->arpcom);
sc 2511 dev/pci/if_ti.c ti_setmulti(sc);
sc 2517 dev/pci/if_ti.c error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, command);
sc 2531 dev/pci/if_ti.c struct ti_softc *sc;
sc 2533 dev/pci/if_ti.c sc = ifp->if_softc;
sc 2535 dev/pci/if_ti.c printf("%s: watchdog timeout -- resetting\n", sc->sc_dv.dv_xname);
sc 2536 dev/pci/if_ti.c ti_stop(sc);
sc 2537 dev/pci/if_ti.c ti_init(sc);
sc 2547 dev/pci/if_ti.c ti_stop(struct ti_softc *sc)
sc 2552 dev/pci/if_ti.c ifp = &sc->arpcom.ac_if;
sc 2557 dev/pci/if_ti.c CSR_WRITE_4(sc, TI_MB_HOSTINTR, 1);
sc 2564 dev/pci/if_ti.c ti_chipinit(sc);
sc 2565 dev/pci/if_ti.c ti_mem_set(sc, 0x2000, 0x100000 - 0x2000);
sc 2566 dev/pci/if_ti.c ti_chipinit(sc);
sc 2569 dev/pci/if_ti.c ti_free_rx_ring_std(sc);
sc 2572 dev/pci/if_ti.c ti_free_rx_ring_jumbo(sc);
sc 2575 dev/pci/if_ti.c ti_free_rx_ring_mini(sc);
sc 2578 dev/pci/if_ti.c ti_free_tx_ring(sc);
sc 2580 dev/pci/if_ti.c sc->ti_ev_prodidx.ti_idx = 0;
sc 2581 dev/pci/if_ti.c sc->ti_return_prodidx.ti_idx = 0;
sc 2582 dev/pci/if_ti.c sc->ti_tx_considx.ti_idx = 0;
sc 2583 dev/pci/if_ti.c sc->ti_tx_saved_considx = TI_TXCONS_UNSET;
sc 2593 dev/pci/if_ti.c struct ti_softc *sc;
sc 2595 dev/pci/if_ti.c sc = xsc;
sc 2597 dev/pci/if_ti.c ti_chipinit(sc);
sc 908 dev/pci/if_tireg.h ti_cmd(sc, &cmd);
sc 912 dev/pci/if_tireg.h ti_cmd_ext(sc, &cmd, v, w);
sc 975 dev/pci/if_tireg.h #define CSR_WRITE_4(sc, reg, val) \
sc 976 dev/pci/if_tireg.h bus_space_write_4(sc->ti_btag, sc->ti_bhandle, (reg), (val))
sc 978 dev/pci/if_tireg.h #define CSR_READ_4(sc, reg) \
sc 979 dev/pci/if_tireg.h bus_space_read_4(sc->ti_btag, sc->ti_bhandle, (reg))
sc 981 dev/pci/if_tireg.h #define TI_SETBIT(sc, reg, x) \
sc 982 dev/pci/if_tireg.h CSR_WRITE_4(sc, (reg), (CSR_READ_4(sc, (reg)) | (x)))
sc 983 dev/pci/if_tireg.h #define TI_CLRBIT(sc, reg, x) \
sc 984 dev/pci/if_tireg.h CSR_WRITE_4(sc, (reg), (CSR_READ_4(sc, (reg)) & ~(x)))
sc 1035 dev/pci/if_tireg.h #define TI_RING_DMA_ADDR(sc, offset) \
sc 1036 dev/pci/if_tireg.h ((sc)->ti_ring_map->dm_segs[0].ds_addr + \
sc 1039 dev/pci/if_tireg.h #define TI_RING_DMASYNC(sc, offset, op) \
sc 1040 dev/pci/if_tireg.h bus_dmamap_sync((sc)->sc_dmatag, (sc)->ti_ring_map, \
sc 1083 dev/pci/if_tireg.h #define TI_JUMBO_DMA_ADDR(sc, m) \
sc 1084 dev/pci/if_tireg.h ((sc)->ti_cdata.ti_rx_jumbo_map->dm_segs[0].ds_addr + \
sc 1085 dev/pci/if_tireg.h (mtod((m), char *) - (char *)(sc)->ti_cdata.ti_jumbo_buf))
sc 1158 dev/pci/if_tireg.h TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock pin high */\
sc 1159 dev/pci/if_tireg.h TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Set DATA bit to 1 */ \
sc 1160 dev/pci/if_tireg.h TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Enable xmit to write bit */\
sc 1161 dev/pci/if_tireg.h TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Pull DATA bit to 0 again */\
sc 1162 dev/pci/if_tireg.h TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock low again */
sc 1169 dev/pci/if_tireg.h TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Disable xmit */ \
sc 1170 dev/pci/if_tireg.h TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Pull DATA to 0 */ \
sc 1171 dev/pci/if_tireg.h TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock high */ \
sc 1172 dev/pci/if_tireg.h TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Enable xmit */ \
sc 1173 dev/pci/if_tireg.h TI_SETBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_DOUT); /* Toggle DATA to 1 */ \
sc 1174 dev/pci/if_tireg.h TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_TXEN); /* Disable xmit. */ \
sc 1175 dev/pci/if_tireg.h TI_CLRBIT(sc, TI_MISC_LOCAL_CTL, TI_MLC_EE_CLK); /* Pull clock low again */
sc 306 dev/pci/if_tl.c u_int8_t tl_dio_read8(sc, reg)
sc 307 dev/pci/if_tl.c struct tl_softc *sc;
sc 310 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
sc 311 dev/pci/if_tl.c return(CSR_READ_1(sc, TL_DIO_DATA + (reg & 3)));
sc 314 dev/pci/if_tl.c u_int16_t tl_dio_read16(sc, reg)
sc 315 dev/pci/if_tl.c struct tl_softc *sc;
sc 318 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
sc 319 dev/pci/if_tl.c return(CSR_READ_2(sc, TL_DIO_DATA + (reg & 3)));
sc 322 dev/pci/if_tl.c u_int32_t tl_dio_read32(sc, reg)
sc 323 dev/pci/if_tl.c struct tl_softc *sc;
sc 326 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
sc 327 dev/pci/if_tl.c return(CSR_READ_4(sc, TL_DIO_DATA + (reg & 3)));
sc 330 dev/pci/if_tl.c void tl_dio_write8(sc, reg, val)
sc 331 dev/pci/if_tl.c struct tl_softc *sc;
sc 335 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
sc 336 dev/pci/if_tl.c CSR_WRITE_1(sc, TL_DIO_DATA + (reg & 3), val);
sc 340 dev/pci/if_tl.c void tl_dio_write16(sc, reg, val)
sc 341 dev/pci/if_tl.c struct tl_softc *sc;
sc 345 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
sc 346 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_DIO_DATA + (reg & 3), val);
sc 350 dev/pci/if_tl.c void tl_dio_write32(sc, reg, val)
sc 351 dev/pci/if_tl.c struct tl_softc *sc;
sc 355 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
sc 356 dev/pci/if_tl.c CSR_WRITE_4(sc, TL_DIO_DATA + (reg & 3), val);
sc 360 dev/pci/if_tl.c void tl_dio_setbit(sc, reg, bit)
sc 361 dev/pci/if_tl.c struct tl_softc *sc;
sc 367 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
sc 368 dev/pci/if_tl.c f = CSR_READ_1(sc, TL_DIO_DATA + (reg & 3));
sc 370 dev/pci/if_tl.c CSR_WRITE_1(sc, TL_DIO_DATA + (reg & 3), f);
sc 375 dev/pci/if_tl.c void tl_dio_clrbit(sc, reg, bit)
sc 376 dev/pci/if_tl.c struct tl_softc *sc;
sc 382 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
sc 383 dev/pci/if_tl.c f = CSR_READ_1(sc, TL_DIO_DATA + (reg & 3));
sc 385 dev/pci/if_tl.c CSR_WRITE_1(sc, TL_DIO_DATA + (reg & 3), f);
sc 390 dev/pci/if_tl.c void tl_dio_setbit16(sc, reg, bit)
sc 391 dev/pci/if_tl.c struct tl_softc *sc;
sc 397 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
sc 398 dev/pci/if_tl.c f = CSR_READ_2(sc, TL_DIO_DATA + (reg & 3));
sc 400 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_DIO_DATA + (reg & 3), f);
sc 405 dev/pci/if_tl.c void tl_dio_clrbit16(sc, reg, bit)
sc 406 dev/pci/if_tl.c struct tl_softc *sc;
sc 412 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_DIO_ADDR, reg);
sc 413 dev/pci/if_tl.c f = CSR_READ_2(sc, TL_DIO_DATA + (reg & 3));
sc 415 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_DIO_DATA + (reg & 3), f);
sc 423 dev/pci/if_tl.c u_int8_t tl_eeprom_putbyte(sc, byte)
sc 424 dev/pci/if_tl.c struct tl_softc *sc;
sc 432 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_ETXEN);
sc 439 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_EDATA);
sc 441 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_EDATA);
sc 444 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_ECLOK);
sc 446 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_ECLOK);
sc 452 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_ETXEN);
sc 457 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_ECLOK);
sc 458 dev/pci/if_tl.c ack = tl_dio_read8(sc, TL_NETSIO) & TL_SIO_EDATA;
sc 459 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_ECLOK);
sc 467 dev/pci/if_tl.c u_int8_t tl_eeprom_getbyte(sc, addr, dest)
sc 468 dev/pci/if_tl.c struct tl_softc *sc;
sc 475 dev/pci/if_tl.c tl_dio_write8(sc, TL_NETSIO, 0);
sc 482 dev/pci/if_tl.c if (tl_eeprom_putbyte(sc, EEPROM_CTL_WRITE)) {
sc 484 dev/pci/if_tl.c sc->sc_dev.dv_xname, tl_dio_read8(sc, TL_NETSIO));
sc 491 dev/pci/if_tl.c if (tl_eeprom_putbyte(sc, addr)) {
sc 493 dev/pci/if_tl.c sc->sc_dev.dv_xname, tl_dio_read8(sc, TL_NETSIO));
sc 502 dev/pci/if_tl.c if (tl_eeprom_putbyte(sc, EEPROM_CTL_READ)) {
sc 504 dev/pci/if_tl.c sc->sc_dev.dv_xname, tl_dio_read8(sc, TL_NETSIO));
sc 511 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_ETXEN);
sc 513 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_ECLOK);
sc 515 dev/pci/if_tl.c if (tl_dio_read8(sc, TL_NETSIO) & TL_SIO_EDATA)
sc 517 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_ECLOK);
sc 535 dev/pci/if_tl.c int tl_read_eeprom(sc, dest, off, cnt)
sc 536 dev/pci/if_tl.c struct tl_softc *sc;
sc 545 dev/pci/if_tl.c err = tl_eeprom_getbyte(sc, off + i, &byte);
sc 554 dev/pci/if_tl.c void tl_mii_sync(sc)
sc 555 dev/pci/if_tl.c struct tl_softc *sc;
sc 559 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MTXEN);
sc 562 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 563 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 569 dev/pci/if_tl.c void tl_mii_send(sc, bits, cnt)
sc 570 dev/pci/if_tl.c struct tl_softc *sc;
sc 577 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 579 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MDATA);
sc 581 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MDATA);
sc 583 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 587 dev/pci/if_tl.c int tl_mii_readreg(sc, frame)
sc 588 dev/pci/if_tl.c struct tl_softc *sc;
sc 597 dev/pci/if_tl.c tl_mii_sync(sc);
sc 610 dev/pci/if_tl.c minten = tl_dio_read8(sc, TL_NETSIO) & TL_SIO_MINTEN;
sc 612 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MINTEN);
sc 618 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MTXEN);
sc 623 dev/pci/if_tl.c tl_mii_send(sc, frame->mii_stdelim, 2);
sc 624 dev/pci/if_tl.c tl_mii_send(sc, frame->mii_opcode, 2);
sc 625 dev/pci/if_tl.c tl_mii_send(sc, frame->mii_phyaddr, 5);
sc 626 dev/pci/if_tl.c tl_mii_send(sc, frame->mii_regaddr, 5);
sc 631 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MTXEN);
sc 634 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 635 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 638 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 639 dev/pci/if_tl.c ack = tl_dio_read8(sc, TL_NETSIO) & TL_SIO_MDATA;
sc 642 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 650 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 651 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 657 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 659 dev/pci/if_tl.c if (tl_dio_read8(sc, TL_NETSIO) & TL_SIO_MDATA)
sc 662 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 667 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 668 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 672 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MINTEN);
sc 682 dev/pci/if_tl.c int tl_mii_writereg(sc, frame)
sc 683 dev/pci/if_tl.c struct tl_softc *sc;
sc 690 dev/pci/if_tl.c tl_mii_sync(sc);
sc 704 dev/pci/if_tl.c minten = tl_dio_read8(sc, TL_NETSIO) & TL_SIO_MINTEN;
sc 706 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MINTEN);
sc 712 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MTXEN);
sc 714 dev/pci/if_tl.c tl_mii_send(sc, frame->mii_stdelim, 2);
sc 715 dev/pci/if_tl.c tl_mii_send(sc, frame->mii_opcode, 2);
sc 716 dev/pci/if_tl.c tl_mii_send(sc, frame->mii_phyaddr, 5);
sc 717 dev/pci/if_tl.c tl_mii_send(sc, frame->mii_regaddr, 5);
sc 718 dev/pci/if_tl.c tl_mii_send(sc, frame->mii_turnaround, 2);
sc 719 dev/pci/if_tl.c tl_mii_send(sc, frame->mii_data, 16);
sc 721 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 722 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MCLK);
sc 727 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_MTXEN);
sc 731 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_MINTEN);
sc 742 dev/pci/if_tl.c struct tl_softc *sc = (struct tl_softc *)dev;
sc 749 dev/pci/if_tl.c tl_mii_readreg(sc, &frame);
sc 758 dev/pci/if_tl.c struct tl_softc *sc = (struct tl_softc *)dev;
sc 767 dev/pci/if_tl.c tl_mii_writereg(sc, &frame);
sc 773 dev/pci/if_tl.c struct tl_softc *sc = (struct tl_softc *)dev;
sc 775 dev/pci/if_tl.c if ((sc->sc_mii.mii_media_active & IFM_GMASK) == IFM_FDX) {
sc 776 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETCMD, TL_CMD_DUPLEX);
sc 778 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETCMD, TL_CMD_DUPLEX);
sc 785 dev/pci/if_tl.c void tl_setmode(sc, media)
sc 786 dev/pci/if_tl.c struct tl_softc *sc;
sc 790 dev/pci/if_tl.c tl_dio_setbit(sc, TL_ACOMMIT, TL_AC_MTXD1);
sc 792 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_ACOMMIT, TL_AC_MTXD1);
sc 794 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_ACOMMIT, TL_AC_MTXD3);
sc 795 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETCMD, TL_CMD_DUPLEX);
sc 797 dev/pci/if_tl.c tl_dio_setbit(sc, TL_ACOMMIT, TL_AC_MTXD3);
sc 798 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETCMD, TL_CMD_DUPLEX);
sc 831 dev/pci/if_tl.c void tl_setfilt(sc, addr, slot)
sc 832 dev/pci/if_tl.c struct tl_softc *sc;
sc 842 dev/pci/if_tl.c tl_dio_write8(sc, regaddr + i, *(addr + i));
sc 863 dev/pci/if_tl.c void tl_setmulti(sc)
sc 864 dev/pci/if_tl.c struct tl_softc *sc;
sc 869 dev/pci/if_tl.c struct arpcom *ac = &sc->arpcom;
sc 872 dev/pci/if_tl.c ifp = &sc->arpcom.ac_if;
sc 874 dev/pci/if_tl.c tl_dio_write32(sc, TL_HASH1, 0);
sc 875 dev/pci/if_tl.c tl_dio_write32(sc, TL_HASH2, 0);
sc 906 dev/pci/if_tl.c tl_dio_write32(sc, TL_HASH1, hashes[0]);
sc 907 dev/pci/if_tl.c tl_dio_write32(sc, TL_HASH2, hashes[1]);
sc 921 dev/pci/if_tl.c struct tl_softc *sc = (struct tl_softc *)dev;
sc 931 dev/pci/if_tl.c tl_mii_sync(sc);
sc 938 dev/pci/if_tl.c void tl_softreset(sc, internal)
sc 939 dev/pci/if_tl.c struct tl_softc *sc;
sc 945 dev/pci/if_tl.c CMD_SET(sc, TL_CMD_ADRST);
sc 947 dev/pci/if_tl.c CMD_SET(sc, TL_CMD_INTSOFF);
sc 951 dev/pci/if_tl.c dummy = tl_dio_read32(sc, TL_TXGOODFRAMES);
sc 955 dev/pci/if_tl.c tl_dio_write32(sc, TL_AREG0_B5, 0x00000000);
sc 961 dev/pci/if_tl.c tl_dio_setbit16(sc, TL_NETCONFIG, TL_CFG_ONECHAN|TL_CFG_ONEFRAG);
sc 962 dev/pci/if_tl.c if (internal && !sc->tl_bitrate) {
sc 963 dev/pci/if_tl.c tl_dio_setbit16(sc, TL_NETCONFIG, TL_CFG_PHYEN);
sc 965 dev/pci/if_tl.c tl_dio_clrbit16(sc, TL_NETCONFIG, TL_CFG_PHYEN);
sc 969 dev/pci/if_tl.c if (sc->tl_bitrate)
sc 970 dev/pci/if_tl.c tl_dio_setbit16(sc, TL_NETCONFIG, TL_CFG_BITRATE);
sc 977 dev/pci/if_tl.c cmd = CSR_READ_4(sc, TL_HOSTCMD);
sc 980 dev/pci/if_tl.c CMD_PUT(sc, cmd | (TL_CMD_LDTHR | TX_THR));
sc 981 dev/pci/if_tl.c CMD_PUT(sc, cmd | (TL_CMD_LDTMR | 0x00000003));
sc 984 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETSIO, TL_SIO_NMRST);
sc 987 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETCMD, TL_CMD_NRESET|TL_CMD_NWRAP);
sc 998 dev/pci/if_tl.c int tl_list_tx_init(sc)
sc 999 dev/pci/if_tl.c struct tl_softc *sc;
sc 1005 dev/pci/if_tl.c cd = &sc->tl_cdata;
sc 1006 dev/pci/if_tl.c ld = sc->tl_ldata;
sc 1017 dev/pci/if_tl.c sc->tl_txeoc = 1;
sc 1025 dev/pci/if_tl.c int tl_list_rx_init(sc)
sc 1026 dev/pci/if_tl.c struct tl_softc *sc;
sc 1032 dev/pci/if_tl.c cd = &sc->tl_cdata;
sc 1033 dev/pci/if_tl.c ld = sc->tl_ldata;
sc 1038 dev/pci/if_tl.c if (tl_newbuf(sc, &cd->tl_rx_chain[i]) == ENOBUFS)
sc 1056 dev/pci/if_tl.c int tl_newbuf(sc, c)
sc 1057 dev/pci/if_tl.c struct tl_softc *sc;
sc 1114 dev/pci/if_tl.c struct tl_softc *sc;
sc 1121 dev/pci/if_tl.c sc = xsc;
sc 1122 dev/pci/if_tl.c ifp = &sc->arpcom.ac_if;
sc 1124 dev/pci/if_tl.c while(sc->tl_cdata.tl_rx_head != NULL) {
sc 1125 dev/pci/if_tl.c cur_rx = sc->tl_cdata.tl_rx_head;
sc 1129 dev/pci/if_tl.c sc->tl_cdata.tl_rx_head = cur_rx->tl_next;
sc 1133 dev/pci/if_tl.c if (tl_newbuf(sc, cur_rx) == ENOBUFS) {
sc 1141 dev/pci/if_tl.c sc->tl_cdata.tl_rx_tail->tl_ptr->tlist_fptr =
sc 1143 dev/pci/if_tl.c sc->tl_cdata.tl_rx_tail->tl_next = cur_rx;
sc 1144 dev/pci/if_tl.c sc->tl_cdata.tl_rx_tail = cur_rx;
sc 1156 dev/pci/if_tl.c if (!bcmp(eh->ether_shost, sc->arpcom.ac_enaddr,
sc 1194 dev/pci/if_tl.c struct tl_softc *sc;
sc 1198 dev/pci/if_tl.c sc = xsc;
sc 1199 dev/pci/if_tl.c cd = &sc->tl_cdata;
sc 1203 dev/pci/if_tl.c CMD_PUT(sc, TL_CMD_ACK | r | (type & ~(0x00100000)));
sc 1207 dev/pci/if_tl.c CSR_WRITE_4(sc, TL_CH_PARM, VTOPHYS(sc->tl_cdata.tl_rx_head->tl_ptr));
sc 1216 dev/pci/if_tl.c struct tl_softc *sc;
sc 1220 dev/pci/if_tl.c sc = xsc;
sc 1226 dev/pci/if_tl.c while (sc->tl_cdata.tl_tx_head != NULL) {
sc 1227 dev/pci/if_tl.c cur_tx = sc->tl_cdata.tl_tx_head;
sc 1230 dev/pci/if_tl.c sc->tl_cdata.tl_tx_head = cur_tx->tl_next;
sc 1236 dev/pci/if_tl.c cur_tx->tl_next = sc->tl_cdata.tl_tx_free;
sc 1237 dev/pci/if_tl.c sc->tl_cdata.tl_tx_free = cur_tx;
sc 1268 dev/pci/if_tl.c struct tl_softc *sc;
sc 1272 dev/pci/if_tl.c sc = xsc;
sc 1273 dev/pci/if_tl.c ifp = &sc->arpcom.ac_if;
sc 1278 dev/pci/if_tl.c if (sc->tl_cdata.tl_tx_head == NULL) {
sc 1280 dev/pci/if_tl.c sc->tl_cdata.tl_tx_tail = NULL;
sc 1281 dev/pci/if_tl.c sc->tl_txeoc = 1;
sc 1283 dev/pci/if_tl.c sc->tl_txeoc = 0;
sc 1285 dev/pci/if_tl.c CMD_PUT(sc, TL_CMD_ACK | 0x00000001 | type);
sc 1287 dev/pci/if_tl.c CSR_WRITE_4(sc, TL_CH_PARM,
sc 1288 dev/pci/if_tl.c VTOPHYS(sc->tl_cdata.tl_tx_head->tl_ptr));
sc 1290 dev/pci/if_tl.c cmd = CSR_READ_4(sc, TL_HOSTCMD);
sc 1293 dev/pci/if_tl.c CMD_PUT(sc, cmd);
sc 1304 dev/pci/if_tl.c struct tl_softc *sc;
sc 1306 dev/pci/if_tl.c sc = xsc;
sc 1309 dev/pci/if_tl.c printf("%s: adapter check: %x\n", sc->sc_dev.dv_xname,
sc 1310 dev/pci/if_tl.c (unsigned int)CSR_READ_4(sc, TL_CH_PARM));
sc 1312 dev/pci/if_tl.c tl_softreset(sc, 1);
sc 1313 dev/pci/if_tl.c tl_stop(sc);
sc 1314 dev/pci/if_tl.c tl_init(sc);
sc 1315 dev/pci/if_tl.c CMD_SET(sc, TL_CMD_INTSON);
sc 1324 dev/pci/if_tl.c struct tl_softc *sc;
sc 1327 dev/pci/if_tl.c sc = xsc;
sc 1329 dev/pci/if_tl.c netsts = tl_dio_read16(sc, TL_NETSTS);
sc 1330 dev/pci/if_tl.c tl_dio_write16(sc, TL_NETSTS, netsts);
sc 1332 dev/pci/if_tl.c printf("%s: network status: %x\n", sc->sc_dev.dv_xname, netsts);
sc 1340 dev/pci/if_tl.c struct tl_softc *sc;
sc 1347 dev/pci/if_tl.c sc = xsc;
sc 1350 dev/pci/if_tl.c ints = CSR_READ_2(sc, TL_HOST_INT);
sc 1351 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_HOST_INT, ints);
sc 1356 dev/pci/if_tl.c ifp = &sc->arpcom.ac_if;
sc 1361 dev/pci/if_tl.c CMD_PUT(sc, type);
sc 1365 dev/pci/if_tl.c r = tl_intvec_txeof((void *)sc, type);
sc 1368 dev/pci/if_tl.c r = tl_intvec_txeoc((void *)sc, type);
sc 1371 dev/pci/if_tl.c tl_stats_update(sc);
sc 1375 dev/pci/if_tl.c r = tl_intvec_rxeof((void *)sc, type);
sc 1378 dev/pci/if_tl.c printf("%s: got a dummy interrupt\n", sc->sc_dev.dv_xname);
sc 1383 dev/pci/if_tl.c r = tl_intvec_adchk((void *)sc, type);
sc 1385 dev/pci/if_tl.c r = tl_intvec_netsts((void *)sc, type);
sc 1388 dev/pci/if_tl.c r = tl_intvec_rxeoc((void *)sc, type);
sc 1391 dev/pci/if_tl.c printf("%s: bogus interrupt type\n", sc->sc_dev.dv_xname);
sc 1397 dev/pci/if_tl.c CMD_PUT(sc, TL_CMD_ACK | r | type);
sc 1409 dev/pci/if_tl.c struct tl_softc *sc;
sc 1419 dev/pci/if_tl.c sc = xsc;
sc 1420 dev/pci/if_tl.c ifp = &sc->arpcom.ac_if;
sc 1424 dev/pci/if_tl.c CSR_WRITE_2(sc, TL_DIO_ADDR, TL_TXGOODFRAMES|TL_DIO_ADDR_INC);
sc 1425 dev/pci/if_tl.c *p++ = CSR_READ_4(sc, TL_DIO_DATA);
sc 1426 dev/pci/if_tl.c *p++ = CSR_READ_4(sc, TL_DIO_DATA);
sc 1427 dev/pci/if_tl.c *p++ = CSR_READ_4(sc, TL_DIO_DATA);
sc 1428 dev/pci/if_tl.c *p++ = CSR_READ_4(sc, TL_DIO_DATA);
sc 1429 dev/pci/if_tl.c *p++ = CSR_READ_4(sc, TL_DIO_DATA);
sc 1441 dev/pci/if_tl.c tx_thresh = tl_dio_read8(sc, TL_ACOMMIT) & TL_AC_TXTHRESH;
sc 1445 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_ACOMMIT, TL_AC_TXTHRESH);
sc 1446 dev/pci/if_tl.c tl_dio_setbit(sc, TL_ACOMMIT, tx_thresh << 4);
sc 1450 dev/pci/if_tl.c timeout_add(&sc->tl_stats_tmo, hz);
sc 1452 dev/pci/if_tl.c if (!sc->tl_bitrate)
sc 1453 dev/pci/if_tl.c mii_tick(&sc->sc_mii);
sc 1463 dev/pci/if_tl.c int tl_encap(sc, c, m_head)
sc 1464 dev/pci/if_tl.c struct tl_softc *sc;
sc 1534 dev/pci/if_tl.c f->tlist_dadr = VTOPHYS(&sc->tl_ldata->tl_pad);
sc 1557 dev/pci/if_tl.c struct tl_softc *sc;
sc 1562 dev/pci/if_tl.c sc = ifp->if_softc;
sc 1568 dev/pci/if_tl.c if (sc->tl_cdata.tl_tx_free == NULL) {
sc 1573 dev/pci/if_tl.c start_tx = sc->tl_cdata.tl_tx_free;
sc 1575 dev/pci/if_tl.c while(sc->tl_cdata.tl_tx_free != NULL) {
sc 1581 dev/pci/if_tl.c cur_tx = sc->tl_cdata.tl_tx_free;
sc 1582 dev/pci/if_tl.c sc->tl_cdata.tl_tx_free = cur_tx->tl_next;
sc 1587 dev/pci/if_tl.c tl_encap(sc, cur_tx, m_head);
sc 1620 dev/pci/if_tl.c if (sc->tl_cdata.tl_tx_head == NULL) {
sc 1621 dev/pci/if_tl.c sc->tl_cdata.tl_tx_head = start_tx;
sc 1622 dev/pci/if_tl.c sc->tl_cdata.tl_tx_tail = cur_tx;
sc 1624 dev/pci/if_tl.c if (sc->tl_txeoc) {
sc 1625 dev/pci/if_tl.c sc->tl_txeoc = 0;
sc 1626 dev/pci/if_tl.c CSR_WRITE_4(sc, TL_CH_PARM, VTOPHYS(start_tx->tl_ptr));
sc 1627 dev/pci/if_tl.c cmd = CSR_READ_4(sc, TL_HOSTCMD);
sc 1630 dev/pci/if_tl.c CMD_PUT(sc, cmd);
sc 1633 dev/pci/if_tl.c sc->tl_cdata.tl_tx_tail->tl_next = start_tx;
sc 1634 dev/pci/if_tl.c sc->tl_cdata.tl_tx_tail = cur_tx;
sc 1648 dev/pci/if_tl.c struct tl_softc *sc = xsc;
sc 1649 dev/pci/if_tl.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 1657 dev/pci/if_tl.c tl_stop(sc);
sc 1660 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_ACOMMIT, TL_AC_TXTHRESH);
sc 1661 dev/pci/if_tl.c tl_dio_setbit(sc, TL_ACOMMIT, TL_AC_TXTHRESH_16LONG);
sc 1664 dev/pci/if_tl.c tl_dio_write8(sc, TL_BSIZEREG, TL_RXBURST_16LONG|TL_TXBURST_16LONG);
sc 1670 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETCMD, TL_CMD_CAF);
sc 1672 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETCMD, TL_CMD_CAF);
sc 1678 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETCMD, TL_CMD_NOBRX);
sc 1680 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETCMD, TL_CMD_NOBRX);
sc 1682 dev/pci/if_tl.c tl_dio_write16(sc, TL_MAXRX, MCLBYTES);
sc 1685 dev/pci/if_tl.c tl_setfilt(sc, (caddr_t)&sc->arpcom.ac_enaddr, 0);
sc 1688 dev/pci/if_tl.c tl_setmulti(sc);
sc 1691 dev/pci/if_tl.c if (tl_list_rx_init(sc) == ENOBUFS) {
sc 1693 dev/pci/if_tl.c sc->sc_dev.dv_xname);
sc 1694 dev/pci/if_tl.c tl_stop(sc);
sc 1700 dev/pci/if_tl.c tl_list_tx_init(sc);
sc 1703 dev/pci/if_tl.c CMD_SET(sc, TL_CMD_INTSON);
sc 1706 dev/pci/if_tl.c CMD_SET(sc, TL_CMD_RT);
sc 1707 dev/pci/if_tl.c CSR_WRITE_4(sc, TL_CH_PARM, VTOPHYS(&sc->tl_ldata->tl_rx_list[0]));
sc 1709 dev/pci/if_tl.c if (!sc->tl_bitrate) {
sc 1710 dev/pci/if_tl.c mii_mediachg(&sc->sc_mii);
sc 1716 dev/pci/if_tl.c CMD_SET(sc, TL_CMD_GO|TL_CMD_NES|TL_CMD_RT);
sc 1721 dev/pci/if_tl.c timeout_set(&sc->tl_stats_tmo, tl_stats_update, sc);
sc 1722 dev/pci/if_tl.c timeout_add(&sc->tl_stats_tmo, hz);
sc 1723 dev/pci/if_tl.c timeout_set(&sc->tl_wait_tmo, tl_wait_up, sc);
sc 1724 dev/pci/if_tl.c timeout_add(&sc->tl_wait_tmo, 2 * hz);
sc 1736 dev/pci/if_tl.c struct tl_softc *sc = ifp->if_softc;
sc 1738 dev/pci/if_tl.c if (sc->tl_bitrate)
sc 1739 dev/pci/if_tl.c tl_setmode(sc, sc->ifmedia.ifm_media);
sc 1741 dev/pci/if_tl.c mii_mediachg(&sc->sc_mii);
sc 1753 dev/pci/if_tl.c struct tl_softc *sc;
sc 1756 dev/pci/if_tl.c sc = ifp->if_softc;
sc 1757 dev/pci/if_tl.c mii = &sc->sc_mii;
sc 1760 dev/pci/if_tl.c if (sc->tl_bitrate) {
sc 1761 dev/pci/if_tl.c if (tl_dio_read8(sc, TL_ACOMMIT) & TL_AC_MTXD1)
sc 1765 dev/pci/if_tl.c if (tl_dio_read8(sc, TL_ACOMMIT) & TL_AC_MTXD3)
sc 1784 dev/pci/if_tl.c struct tl_softc *sc = ifp->if_softc;
sc 1791 dev/pci/if_tl.c if ((error = ether_ioctl(ifp, &sc->arpcom, command, data)) > 0) {
sc 1802 dev/pci/if_tl.c tl_init(sc);
sc 1803 dev/pci/if_tl.c arp_ifinit(&sc->arpcom, ifa);
sc 1807 dev/pci/if_tl.c tl_init(sc);
sc 1815 dev/pci/if_tl.c !(sc->tl_if_flags & IFF_PROMISC)) {
sc 1816 dev/pci/if_tl.c tl_dio_setbit(sc, TL_NETCMD, TL_CMD_CAF);
sc 1817 dev/pci/if_tl.c tl_setmulti(sc);
sc 1820 dev/pci/if_tl.c sc->tl_if_flags & IFF_PROMISC) {
sc 1821 dev/pci/if_tl.c tl_dio_clrbit(sc, TL_NETCMD, TL_CMD_CAF);
sc 1822 dev/pci/if_tl.c tl_setmulti(sc);
sc 1824 dev/pci/if_tl.c tl_init(sc);
sc 1827 dev/pci/if_tl.c tl_stop(sc);
sc 1830 dev/pci/if_tl.c sc->tl_if_flags = ifp->if_flags;
sc 1836 dev/pci/if_tl.c ether_addmulti(ifr, &sc->arpcom) :
sc 1837 dev/pci/if_tl.c ether_delmulti(ifr, &sc->arpcom);
sc 1844 dev/pci/if_tl.c tl_setmulti(sc);
sc 1850 dev/pci/if_tl.c if (sc->tl_bitrate)
sc 1851 dev/pci/if_tl.c error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, command);
sc 1854 dev/pci/if_tl.c &sc->sc_mii.mii_media, command);
sc 1869 dev/pci/if_tl.c struct tl_softc *sc;
sc 1871 dev/pci/if_tl.c sc = ifp->if_softc;
sc 1873 dev/pci/if_tl.c printf("%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1877 dev/pci/if_tl.c tl_softreset(sc, 1);
sc 1878 dev/pci/if_tl.c tl_init(sc);
sc 1887 dev/pci/if_tl.c void tl_stop(sc)
sc 1888 dev/pci/if_tl.c struct tl_softc *sc;
sc 1893 dev/pci/if_tl.c ifp = &sc->arpcom.ac_if;
sc 1896 dev/pci/if_tl.c timeout_del(&sc->tl_stats_tmo);
sc 1897 dev/pci/if_tl.c timeout_del(&sc->tl_wait_tmo);
sc 1900 dev/pci/if_tl.c CMD_CLR(sc, TL_CMD_RT);
sc 1901 dev/pci/if_tl.c CMD_SET(sc, TL_CMD_STOP);
sc 1902 dev/pci/if_tl.c CSR_WRITE_4(sc, TL_CH_PARM, 0);
sc 1905 dev/pci/if_tl.c CMD_SET(sc, TL_CMD_RT);
sc 1906 dev/pci/if_tl.c CMD_SET(sc, TL_CMD_STOP);
sc 1907 dev/pci/if_tl.c CSR_WRITE_4(sc, TL_CH_PARM, 0);
sc 1912 dev/pci/if_tl.c CMD_SET(sc, TL_CMD_INTSOFF);
sc 1917 dev/pci/if_tl.c CSR_WRITE_4(sc, TL_CH_PARM, 0);
sc 1923 dev/pci/if_tl.c if (sc->tl_cdata.tl_rx_chain[i].tl_mbuf != NULL) {
sc 1924 dev/pci/if_tl.c m_freem(sc->tl_cdata.tl_rx_chain[i].tl_mbuf);
sc 1925 dev/pci/if_tl.c sc->tl_cdata.tl_rx_chain[i].tl_mbuf = NULL;
sc 1928 dev/pci/if_tl.c bzero((char *)&sc->tl_ldata->tl_rx_list,
sc 1929 dev/pci/if_tl.c sizeof(sc->tl_ldata->tl_rx_list));
sc 1935 dev/pci/if_tl.c if (sc->tl_cdata.tl_tx_chain[i].tl_mbuf != NULL) {
sc 1936 dev/pci/if_tl.c m_freem(sc->tl_cdata.tl_tx_chain[i].tl_mbuf);
sc 1937 dev/pci/if_tl.c sc->tl_cdata.tl_tx_chain[i].tl_mbuf = NULL;
sc 1940 dev/pci/if_tl.c bzero((char *)&sc->tl_ldata->tl_tx_list,
sc 1941 dev/pci/if_tl.c sizeof(sc->tl_ldata->tl_tx_list));
sc 1997 dev/pci/if_tl.c struct tl_softc *sc = (struct tl_softc *)self;
sc 2002 dev/pci/if_tl.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 2016 dev/pci/if_tl.c &sc->tl_btag, &sc->tl_bhandle, NULL, &iosize, 0)) {
sc 2018 dev/pci/if_tl.c &sc->tl_btag, &sc->tl_bhandle, NULL, &iosize, 0)) {
sc 2025 dev/pci/if_tl.c &sc->tl_btag, &sc->tl_bhandle, NULL, &iosize, 0)){
sc 2027 dev/pci/if_tl.c &sc->tl_btag, &sc->tl_bhandle, NULL, &iosize, 0)){
sc 2046 dev/pci/if_tl.c bus_space_unmap(sc->tl_btag, sc->tl_bhandle, iosize);
sc 2050 dev/pci/if_tl.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, tl_intr, sc,
sc 2052 dev/pci/if_tl.c if (sc->sc_ih == NULL) {
sc 2057 dev/pci/if_tl.c bus_space_unmap(sc->tl_btag, sc->tl_bhandle, iosize);
sc 2062 dev/pci/if_tl.c sc->sc_dmat = pa->pa_dmat;
sc 2063 dev/pci/if_tl.c if (bus_dmamem_alloc(sc->sc_dmat, sizeof(struct tl_list_data),
sc 2065 dev/pci/if_tl.c printf("%s: can't alloc list\n", sc->sc_dev.dv_xname);
sc 2066 dev/pci/if_tl.c bus_space_unmap(sc->tl_btag, sc->tl_bhandle, iosize);
sc 2069 dev/pci/if_tl.c if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, sizeof(struct tl_list_data),
sc 2072 dev/pci/if_tl.c sc->sc_dev.dv_xname, sizeof(struct tl_list_data));
sc 2073 dev/pci/if_tl.c bus_dmamem_free(sc->sc_dmat, &seg, rseg);
sc 2076 dev/pci/if_tl.c if (bus_dmamap_create(sc->sc_dmat, sizeof(struct tl_list_data), 1,
sc 2078 dev/pci/if_tl.c printf("%s: can't create dma map\n", sc->sc_dev.dv_xname);
sc 2079 dev/pci/if_tl.c bus_dmamem_unmap(sc->sc_dmat, kva, sizeof(struct tl_list_data));
sc 2080 dev/pci/if_tl.c bus_dmamem_free(sc->sc_dmat, &seg, rseg);
sc 2081 dev/pci/if_tl.c bus_space_unmap(sc->tl_btag, sc->tl_bhandle, iosize);
sc 2084 dev/pci/if_tl.c if (bus_dmamap_load(sc->sc_dmat, dmamap, kva,
sc 2086 dev/pci/if_tl.c printf("%s: can't load dma map\n", sc->sc_dev.dv_xname);
sc 2087 dev/pci/if_tl.c bus_dmamap_destroy(sc->sc_dmat, dmamap);
sc 2088 dev/pci/if_tl.c bus_dmamem_unmap(sc->sc_dmat, kva, sizeof(struct tl_list_data));
sc 2089 dev/pci/if_tl.c bus_dmamem_free(sc->sc_dmat, &seg, rseg);
sc 2090 dev/pci/if_tl.c bus_space_unmap(sc->tl_btag, sc->tl_bhandle, iosize);
sc 2093 dev/pci/if_tl.c sc->tl_ldata = (struct tl_list_data *)kva;
sc 2094 dev/pci/if_tl.c bzero(sc->tl_ldata, sizeof(struct tl_list_data));
sc 2096 dev/pci/if_tl.c for (sc->tl_product = tl_prods; sc->tl_product->tp_vend;
sc 2097 dev/pci/if_tl.c sc->tl_product++) {
sc 2098 dev/pci/if_tl.c if (sc->tl_product->tp_vend == PCI_VENDOR(pa->pa_id) &&
sc 2099 dev/pci/if_tl.c sc->tl_product->tp_prod == PCI_PRODUCT(pa->pa_id))
sc 2105 dev/pci/if_tl.c sc->tl_eeaddr = TL_EEPROM_EADDR;
sc 2107 dev/pci/if_tl.c sc->tl_eeaddr = TL_EEPROM_EADDR_OC;
sc 2112 dev/pci/if_tl.c tl_softreset(sc, 1);
sc 2115 dev/pci/if_tl.c tl_softreset(sc, 1);
sc 2120 dev/pci/if_tl.c if (tl_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr,
sc 2121 dev/pci/if_tl.c sc->tl_eeaddr, ETHER_ADDR_LEN)) {
sc 2123 dev/pci/if_tl.c sc->sc_dev.dv_xname);
sc 2124 dev/pci/if_tl.c bus_space_unmap(sc->tl_btag, sc->tl_bhandle, iosize);
sc 2132 dev/pci/if_tl.c p = (u_int16_t *)&sc->arpcom.ac_enaddr[i];
sc 2137 dev/pci/if_tl.c printf(" address %s\n", ether_sprintf(sc->arpcom.ac_enaddr));
sc 2139 dev/pci/if_tl.c ifp = &sc->arpcom.ac_if;
sc 2140 dev/pci/if_tl.c ifp->if_softc = sc;
sc 2148 dev/pci/if_tl.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 2153 dev/pci/if_tl.c tl_softreset(sc, 1);
sc 2156 dev/pci/if_tl.c tl_softreset(sc, 1);
sc 2163 dev/pci/if_tl.c sc->sc_mii.mii_ifp = ifp;
sc 2164 dev/pci/if_tl.c sc->sc_mii.mii_readreg = tl_miibus_readreg;
sc 2165 dev/pci/if_tl.c sc->sc_mii.mii_writereg = tl_miibus_writereg;
sc 2166 dev/pci/if_tl.c sc->sc_mii.mii_statchg = tl_miibus_statchg;
sc 2167 dev/pci/if_tl.c ifmedia_init(&sc->sc_mii.mii_media, 0, tl_ifmedia_upd, tl_ifmedia_sts);
sc 2168 dev/pci/if_tl.c mii_attach(self, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY,
sc 2170 dev/pci/if_tl.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 2172 dev/pci/if_tl.c sc->tl_bitrate = 1;
sc 2173 dev/pci/if_tl.c ifmedia_init(&sc->ifmedia, 0, tl_ifmedia_upd, tl_ifmedia_sts);
sc 2174 dev/pci/if_tl.c ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL);
sc 2175 dev/pci/if_tl.c ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);
sc 2176 dev/pci/if_tl.c ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
sc 2177 dev/pci/if_tl.c ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_5, 0, NULL);
sc 2178 dev/pci/if_tl.c ifmedia_set(&sc->ifmedia, IFM_ETHER|IFM_10_T);
sc 2180 dev/pci/if_tl.c tl_softreset(sc, 1);
sc 2181 dev/pci/if_tl.c ifm = &sc->ifmedia;
sc 2185 dev/pci/if_tl.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 2193 dev/pci/if_tl.c shutdownhook_establish(tl_shutdown, sc);
sc 2200 dev/pci/if_tl.c struct tl_softc *sc = xsc;
sc 2201 dev/pci/if_tl.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 2211 dev/pci/if_tl.c struct tl_softc *sc = xsc;
sc 2213 dev/pci/if_tl.c tl_stop(sc);
sc 501 dev/pci/if_tlreg.h #define CSR_WRITE_4(sc, reg, val) \
sc 502 dev/pci/if_tlreg.h bus_space_write_4(sc->tl_btag, sc->tl_bhandle, reg, val)
sc 503 dev/pci/if_tlreg.h #define CSR_WRITE_2(sc, reg, val) \
sc 504 dev/pci/if_tlreg.h bus_space_write_2(sc->tl_btag, sc->tl_bhandle, reg, val)
sc 505 dev/pci/if_tlreg.h #define CSR_WRITE_1(sc, reg, val) \
sc 506 dev/pci/if_tlreg.h bus_space_write_1(sc->tl_btag, sc->tl_bhandle, reg, val)
sc 508 dev/pci/if_tlreg.h #define CSR_READ_4(sc, reg) \
sc 509 dev/pci/if_tlreg.h bus_space_read_4(sc->tl_btag, sc->tl_bhandle, reg)
sc 510 dev/pci/if_tlreg.h #define CSR_READ_2(sc, reg) \
sc 511 dev/pci/if_tlreg.h bus_space_read_2(sc->tl_btag, sc->tl_bhandle, reg)
sc 512 dev/pci/if_tlreg.h #define CSR_READ_1(sc, reg) \
sc 513 dev/pci/if_tlreg.h bus_space_read_1(sc->tl_btag, sc->tl_bhandle, reg)
sc 515 dev/pci/if_tlreg.h #define CMD_PUT(sc, x) CSR_WRITE_4(sc, TL_HOSTCMD, x)
sc 516 dev/pci/if_tlreg.h #define CMD_SET(sc, x) \
sc 517 dev/pci/if_tlreg.h CSR_WRITE_4(sc, TL_HOSTCMD, CSR_READ_4(sc, TL_HOSTCMD) | (x))
sc 518 dev/pci/if_tlreg.h #define CMD_CLR(sc, x) \
sc 519 dev/pci/if_tlreg.h CSR_WRITE_4(sc, TL_HOSTCMD, CSR_READ_4(sc, TL_HOSTCMD) & ~(x))
sc 573 dev/pci/if_tlreg.h tl_dio_setbit(sc, TL_NETSIO, TL_SIO_ECLOK); /* Pull clock pin high */\
sc 574 dev/pci/if_tlreg.h tl_dio_setbit(sc, TL_NETSIO, TL_SIO_EDATA); /* Set DATA bit to 1 */ \
sc 575 dev/pci/if_tlreg.h tl_dio_setbit(sc, TL_NETSIO, TL_SIO_ETXEN); /* Enable xmit to write bit */\
sc 576 dev/pci/if_tlreg.h tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_EDATA); /* Pull DATA bit to 0 again */\
sc 577 dev/pci/if_tlreg.h tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_ECLOK); /* Pull clock low again */
sc 584 dev/pci/if_tlreg.h tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_ETXEN); /* Disable xmit */ \
sc 585 dev/pci/if_tlreg.h tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_EDATA); /* Pull DATA to 0 */ \
sc 586 dev/pci/if_tlreg.h tl_dio_setbit(sc, TL_NETSIO, TL_SIO_ECLOK); /* Pull clock high */ \
sc 587 dev/pci/if_tlreg.h tl_dio_setbit(sc, TL_NETSIO, TL_SIO_ETXEN); /* Enable xmit */ \
sc 588 dev/pci/if_tlreg.h tl_dio_setbit(sc, TL_NETSIO, TL_SIO_EDATA); /* Toggle DATA to 1 */ \
sc 589 dev/pci/if_tlreg.h tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_ETXEN); /* Disable xmit. */ \
sc 590 dev/pci/if_tlreg.h tl_dio_clrbit(sc, TL_NETSIO, TL_SIO_ECLOK); /* Pull clock low again */
sc 163 dev/pci/if_txp.c struct txp_softc *sc = vsc;
sc 164 dev/pci/if_txp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 170 dev/pci/if_txp.c printf("%s: ", sc->sc_dev.dv_xname);
sc 172 dev/pci/if_txp.c if (txp_chip_init(sc)) {
sc 178 dev/pci/if_txp.c if (txp_download_fw(sc)) {
sc 183 dev/pci/if_txp.c if (txp_alloc_rings(sc)) {
sc 188 dev/pci/if_txp.c if (txp_command(sc, TXP_CMD_MAX_PKT_SIZE_WRITE, TXP_MAX_PKTLEN, 0, 0,
sc 194 dev/pci/if_txp.c if (txp_command(sc, TXP_CMD_STATION_ADDRESS_READ, 0, 0, 0,
sc 200 dev/pci/if_txp.c txp_set_filter(sc);
sc 203 dev/pci/if_txp.c sc->sc_arpcom.ac_enaddr[0] = ((u_int8_t *)&p1)[1];
sc 204 dev/pci/if_txp.c sc->sc_arpcom.ac_enaddr[1] = ((u_int8_t *)&p1)[0];
sc 206 dev/pci/if_txp.c sc->sc_arpcom.ac_enaddr[2] = ((u_int8_t *)&p2)[3];
sc 207 dev/pci/if_txp.c sc->sc_arpcom.ac_enaddr[3] = ((u_int8_t *)&p2)[2];
sc 208 dev/pci/if_txp.c sc->sc_arpcom.ac_enaddr[4] = ((u_int8_t *)&p2)[1];
sc 209 dev/pci/if_txp.c sc->sc_arpcom.ac_enaddr[5] = ((u_int8_t *)&p2)[0];
sc 211 dev/pci/if_txp.c printf("address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 212 dev/pci/if_txp.c sc->sc_cold = 0;
sc 214 dev/pci/if_txp.c ifmedia_init(&sc->sc_ifmedia, 0, txp_ifmedia_upd, txp_ifmedia_sts);
sc 215 dev/pci/if_txp.c ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T, 0, NULL);
sc 216 dev/pci/if_txp.c ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);
sc 217 dev/pci/if_txp.c ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
sc 218 dev/pci/if_txp.c ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL);
sc 219 dev/pci/if_txp.c ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL);
sc 220 dev/pci/if_txp.c ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL);
sc 221 dev/pci/if_txp.c ifmedia_add(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
sc 223 dev/pci/if_txp.c sc->sc_xcvr = TXP_XCVR_AUTO;
sc 224 dev/pci/if_txp.c txp_command(sc, TXP_CMD_XCVR_SELECT, TXP_XCVR_AUTO, 0, 0,
sc 226 dev/pci/if_txp.c ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO);
sc 228 dev/pci/if_txp.c ifp->if_softc = sc;
sc 237 dev/pci/if_txp.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 239 dev/pci/if_txp.c txp_capabilities(sc);
sc 241 dev/pci/if_txp.c timeout_set(&sc->sc_tick, txp_tick, sc);
sc 249 dev/pci/if_txp.c shutdownhook_establish(txp_shutdown, sc);
sc 258 dev/pci/if_txp.c struct txp_softc *sc = (struct txp_softc *)self;
sc 265 dev/pci/if_txp.c sc->sc_cold = 1;
sc 268 dev/pci/if_txp.c &sc->sc_bt, &sc->sc_bh, NULL, &iosize, 0)) {
sc 273 dev/pci/if_txp.c sc->sc_dmat = pa->pa_dmat;
sc 284 dev/pci/if_txp.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, txp_intr, sc,
sc 286 dev/pci/if_txp.c if (sc->sc_ih == NULL) {
sc 296 dev/pci/if_txp.c mountroothook_establish(txp_attachhook, sc);
sc 298 dev/pci/if_txp.c txp_attachhook(sc);
sc 303 dev/pci/if_txp.c txp_chip_init(sc)
sc 304 dev/pci/if_txp.c struct txp_softc *sc;
sc 307 dev/pci/if_txp.c WRITE_REG(sc, TXP_IER, 0);
sc 308 dev/pci/if_txp.c WRITE_REG(sc, TXP_IMR,
sc 314 dev/pci/if_txp.c WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
sc 320 dev/pci/if_txp.c if (txp_reset_adapter(sc))
sc 324 dev/pci/if_txp.c WRITE_REG(sc, TXP_IER, 0);
sc 325 dev/pci/if_txp.c WRITE_REG(sc, TXP_IMR,
sc 331 dev/pci/if_txp.c WRITE_REG(sc, TXP_ISR, TXP_INT_RESERVED | TXP_INT_LATCH |
sc 341 dev/pci/if_txp.c txp_reset_adapter(sc)
sc 342 dev/pci/if_txp.c struct txp_softc *sc;
sc 347 dev/pci/if_txp.c WRITE_REG(sc, TXP_SRR, TXP_SRR_ALL);
sc 349 dev/pci/if_txp.c WRITE_REG(sc, TXP_SRR, 0);
sc 353 dev/pci/if_txp.c r = READ_REG(sc, TXP_A2H_0);
sc 360 dev/pci/if_txp.c printf("%s: reset hung\n", TXP_DEVNAME(sc));
sc 368 dev/pci/if_txp.c txp_download_fw(sc)
sc 369 dev/pci/if_txp.c struct txp_softc *sc;
sc 378 dev/pci/if_txp.c ier = READ_REG(sc, TXP_IER);
sc 379 dev/pci/if_txp.c WRITE_REG(sc, TXP_IER, ier | TXP_INT_A2H_0);
sc 381 dev/pci/if_txp.c imr = READ_REG(sc, TXP_IMR);
sc 382 dev/pci/if_txp.c WRITE_REG(sc, TXP_IMR, imr | TXP_INT_A2H_0);
sc 385 dev/pci/if_txp.c r = READ_REG(sc, TXP_A2H_0);
sc 396 dev/pci/if_txp.c WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
sc 412 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_1, letoh32(fileheader->addr));
sc 413 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_RUNTIME_IMAGE);
sc 415 dev/pci/if_txp.c if (txp_download_fw_wait(sc)) {
sc 424 dev/pci/if_txp.c if (txp_download_fw_section(sc, secthead, sect, buf, buflen))
sc 431 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_DOWNLOAD_COMPLETE);
sc 434 dev/pci/if_txp.c r = READ_REG(sc, TXP_A2H_0);
sc 444 dev/pci/if_txp.c WRITE_REG(sc, TXP_IER, ier);
sc 445 dev/pci/if_txp.c WRITE_REG(sc, TXP_IMR, imr);
sc 456 dev/pci/if_txp.c txp_download_fw_wait(sc)
sc 457 dev/pci/if_txp.c struct txp_softc *sc;
sc 462 dev/pci/if_txp.c r = READ_REG(sc, TXP_ISR);
sc 473 dev/pci/if_txp.c WRITE_REG(sc, TXP_ISR, TXP_INT_A2H_0);
sc 475 dev/pci/if_txp.c r = READ_REG(sc, TXP_A2H_0);
sc 484 dev/pci/if_txp.c txp_download_fw_section(sc, sect, sectnum, buf, buflen)
sc 485 dev/pci/if_txp.c struct txp_softc *sc;
sc 515 dev/pci/if_txp.c if (txp_dma_malloc(sc, letoh32(sect->nbytes), &dma, 0)) {
sc 539 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, dma.dma_map, 0,
sc 542 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_1, letoh32(sect->nbytes));
sc 543 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_2, letoh16(sect->cksum));
sc 544 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_3, letoh32(sect->addr));
sc 545 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_4, dma.dma_paddr >> 32);
sc 546 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_5, dma.dma_paddr & 0xffffffff);
sc 547 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_SEGMENT_AVAILABLE);
sc 549 dev/pci/if_txp.c if (txp_download_fw_wait(sc)) {
sc 551 dev/pci/if_txp.c sc->sc_dev.dv_xname, sectnum);
sc 555 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, dma.dma_map, 0,
sc 559 dev/pci/if_txp.c txp_dma_free(sc, &dma);
sc 568 dev/pci/if_txp.c struct txp_softc *sc = vsc;
sc 569 dev/pci/if_txp.c struct txp_hostvar *hv = sc->sc_hostvar;
sc 574 dev/pci/if_txp.c WRITE_REG(sc, TXP_IMR, TXP_INT_RESERVED | TXP_INT_SELF |
sc 580 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sc->sc_host_dma.dma_map, 0,
sc 583 dev/pci/if_txp.c isr = READ_REG(sc, TXP_ISR);
sc 586 dev/pci/if_txp.c WRITE_REG(sc, TXP_ISR, isr);
sc 588 dev/pci/if_txp.c if ((*sc->sc_rxhir.r_roff) != (*sc->sc_rxhir.r_woff))
sc 589 dev/pci/if_txp.c txp_rx_reclaim(sc, &sc->sc_rxhir, &sc->sc_rxhiring_dma);
sc 590 dev/pci/if_txp.c if ((*sc->sc_rxlor.r_roff) != (*sc->sc_rxlor.r_woff))
sc 591 dev/pci/if_txp.c txp_rx_reclaim(sc, &sc->sc_rxlor, &sc->sc_rxloring_dma);
sc 594 dev/pci/if_txp.c txp_rxbuf_reclaim(sc);
sc 596 dev/pci/if_txp.c if (sc->sc_txhir.r_cnt && (sc->sc_txhir.r_cons !=
sc 597 dev/pci/if_txp.c TXP_OFFSET2IDX(letoh32(*(sc->sc_txhir.r_off)))))
sc 598 dev/pci/if_txp.c txp_tx_reclaim(sc, &sc->sc_txhir, &sc->sc_txhiring_dma);
sc 600 dev/pci/if_txp.c if (sc->sc_txlor.r_cnt && (sc->sc_txlor.r_cons !=
sc 601 dev/pci/if_txp.c TXP_OFFSET2IDX(letoh32(*(sc->sc_txlor.r_off)))))
sc 602 dev/pci/if_txp.c txp_tx_reclaim(sc, &sc->sc_txlor, &sc->sc_txloring_dma);
sc 604 dev/pci/if_txp.c isr = READ_REG(sc, TXP_ISR);
sc 607 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sc->sc_host_dma.dma_map, 0,
sc 611 dev/pci/if_txp.c WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
sc 613 dev/pci/if_txp.c txp_start(&sc->sc_arpcom.ac_if);
sc 619 dev/pci/if_txp.c txp_rx_reclaim(sc, r, dma)
sc 620 dev/pci/if_txp.c struct txp_softc *sc;
sc 624 dev/pci/if_txp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 638 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, dma->dma_map,
sc 643 dev/pci/if_txp.c printf("%s: error 0x%x\n", sc->sc_dev.dv_xname,
sc 652 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sd->sd_map, 0,
sc 654 dev/pci/if_txp.c bus_dmamap_unload(sc->sc_dmat, sd->sd_map);
sc 655 dev/pci/if_txp.c bus_dmamap_destroy(sc->sc_dmat, sd->sd_map);
sc 745 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, dma->dma_map,
sc 765 dev/pci/if_txp.c txp_rxbuf_reclaim(sc)
sc 766 dev/pci/if_txp.c struct txp_softc *sc;
sc 768 dev/pci/if_txp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 769 dev/pci/if_txp.c struct txp_hostvar *hv = sc->sc_hostvar;
sc 780 dev/pci/if_txp.c rbd = sc->sc_rxbufs + i;
sc 799 dev/pci/if_txp.c if (bus_dmamap_create(sc->sc_dmat, TXP_MAX_PKTLEN, 1,
sc 802 dev/pci/if_txp.c if (bus_dmamap_load_mbuf(sc->sc_dmat, sd->sd_map, sd->sd_mbuf,
sc 804 dev/pci/if_txp.c bus_dmamap_destroy(sc->sc_dmat, sd->sd_map);
sc 808 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rxbufring_dma.dma_map,
sc 820 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sd->sd_map, 0,
sc 823 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rxbufring_dma.dma_map,
sc 831 dev/pci/if_txp.c rbd = sc->sc_rxbufs;
sc 847 dev/pci/if_txp.c txp_tx_reclaim(sc, r, dma)
sc 848 dev/pci/if_txp.c struct txp_softc *sc;
sc 852 dev/pci/if_txp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 856 dev/pci/if_txp.c struct txp_swdesc *sd = sc->sc_txd + cons;
sc 863 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, dma->dma_map,
sc 870 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sd->sd_map, 0,
sc 872 dev/pci/if_txp.c bus_dmamap_unload(sc->sc_dmat, sd->sd_map);
sc 886 dev/pci/if_txp.c sd = sc->sc_txd;
sc 905 dev/pci/if_txp.c struct txp_softc *sc = (struct txp_softc *)vsc;
sc 908 dev/pci/if_txp.c WRITE_REG(sc, TXP_IMR,
sc 913 dev/pci/if_txp.c txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0);
sc 914 dev/pci/if_txp.c txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 0);
sc 915 dev/pci/if_txp.c txp_command(sc, TXP_CMD_HALT, 0, 0, 0, NULL, NULL, NULL, 0);
sc 919 dev/pci/if_txp.c txp_alloc_rings(sc)
sc 920 dev/pci/if_txp.c struct txp_softc *sc;
sc 922 dev/pci/if_txp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 929 dev/pci/if_txp.c if (txp_dma_malloc(sc, sizeof(struct txp_boot_record), &sc->sc_boot_dma,
sc 934 dev/pci/if_txp.c boot = (struct txp_boot_record *)sc->sc_boot_dma.dma_vaddr;
sc 936 dev/pci/if_txp.c sc->sc_boot = boot;
sc 939 dev/pci/if_txp.c if (txp_dma_malloc(sc, sizeof(struct txp_hostvar), &sc->sc_host_dma,
sc 944 dev/pci/if_txp.c bzero(sc->sc_host_dma.dma_vaddr, sizeof(struct txp_hostvar));
sc 945 dev/pci/if_txp.c boot->br_hostvar_lo = htole32(sc->sc_host_dma.dma_paddr & 0xffffffff);
sc 946 dev/pci/if_txp.c boot->br_hostvar_hi = htole32(sc->sc_host_dma.dma_paddr >> 32);
sc 947 dev/pci/if_txp.c sc->sc_hostvar = (struct txp_hostvar *)sc->sc_host_dma.dma_vaddr;
sc 950 dev/pci/if_txp.c if (txp_dma_malloc(sc, sizeof(struct txp_tx_desc) * TX_ENTRIES,
sc 951 dev/pci/if_txp.c &sc->sc_txhiring_dma, BUS_DMA_COHERENT)) {
sc 955 dev/pci/if_txp.c bzero(sc->sc_txhiring_dma.dma_vaddr, sizeof(struct txp_tx_desc) * TX_ENTRIES);
sc 956 dev/pci/if_txp.c boot->br_txhipri_lo = htole32(sc->sc_txhiring_dma.dma_paddr & 0xffffffff);
sc 957 dev/pci/if_txp.c boot->br_txhipri_hi = htole32(sc->sc_txhiring_dma.dma_paddr >> 32);
sc 959 dev/pci/if_txp.c sc->sc_txhir.r_reg = TXP_H2A_1;
sc 960 dev/pci/if_txp.c sc->sc_txhir.r_desc = (struct txp_tx_desc *)sc->sc_txhiring_dma.dma_vaddr;
sc 961 dev/pci/if_txp.c sc->sc_txhir.r_cons = sc->sc_txhir.r_prod = sc->sc_txhir.r_cnt = 0;
sc 962 dev/pci/if_txp.c sc->sc_txhir.r_off = &sc->sc_hostvar->hv_tx_hi_desc_read_idx;
sc 964 dev/pci/if_txp.c if (bus_dmamap_create(sc->sc_dmat, TXP_MAX_PKTLEN,
sc 966 dev/pci/if_txp.c BUS_DMA_NOWAIT, &sc->sc_txd[i].sd_map) != 0) {
sc 968 dev/pci/if_txp.c bus_dmamap_destroy(sc->sc_dmat,
sc 969 dev/pci/if_txp.c sc->sc_txd[j].sd_map);
sc 970 dev/pci/if_txp.c sc->sc_txd[j].sd_map = NULL;
sc 977 dev/pci/if_txp.c if (txp_dma_malloc(sc, sizeof(struct txp_tx_desc) * TX_ENTRIES,
sc 978 dev/pci/if_txp.c &sc->sc_txloring_dma, BUS_DMA_COHERENT)) {
sc 982 dev/pci/if_txp.c bzero(sc->sc_txloring_dma.dma_vaddr, sizeof(struct txp_tx_desc) * TX_ENTRIES);
sc 983 dev/pci/if_txp.c boot->br_txlopri_lo = htole32(sc->sc_txloring_dma.dma_paddr & 0xffffffff);
sc 984 dev/pci/if_txp.c boot->br_txlopri_hi = htole32(sc->sc_txloring_dma.dma_paddr >> 32);
sc 986 dev/pci/if_txp.c sc->sc_txlor.r_reg = TXP_H2A_3;
sc 987 dev/pci/if_txp.c sc->sc_txlor.r_desc = (struct txp_tx_desc *)sc->sc_txloring_dma.dma_vaddr;
sc 988 dev/pci/if_txp.c sc->sc_txlor.r_cons = sc->sc_txlor.r_prod = sc->sc_txlor.r_cnt = 0;
sc 989 dev/pci/if_txp.c sc->sc_txlor.r_off = &sc->sc_hostvar->hv_tx_lo_desc_read_idx;
sc 992 dev/pci/if_txp.c if (txp_dma_malloc(sc, sizeof(struct txp_rx_desc) * RX_ENTRIES,
sc 993 dev/pci/if_txp.c &sc->sc_rxhiring_dma, BUS_DMA_COHERENT)) {
sc 997 dev/pci/if_txp.c bzero(sc->sc_rxhiring_dma.dma_vaddr, sizeof(struct txp_rx_desc) * RX_ENTRIES);
sc 998 dev/pci/if_txp.c boot->br_rxhipri_lo = htole32(sc->sc_rxhiring_dma.dma_paddr & 0xffffffff);
sc 999 dev/pci/if_txp.c boot->br_rxhipri_hi = htole32(sc->sc_rxhiring_dma.dma_paddr >> 32);
sc 1001 dev/pci/if_txp.c sc->sc_rxhir.r_desc =
sc 1002 dev/pci/if_txp.c (struct txp_rx_desc *)sc->sc_rxhiring_dma.dma_vaddr;
sc 1003 dev/pci/if_txp.c sc->sc_rxhir.r_roff = &sc->sc_hostvar->hv_rx_hi_read_idx;
sc 1004 dev/pci/if_txp.c sc->sc_rxhir.r_woff = &sc->sc_hostvar->hv_rx_hi_write_idx;
sc 1005 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rxhiring_dma.dma_map,
sc 1006 dev/pci/if_txp.c 0, sc->sc_rxhiring_dma.dma_map->dm_mapsize, BUS_DMASYNC_PREREAD);
sc 1009 dev/pci/if_txp.c if (txp_dma_malloc(sc, sizeof(struct txp_rx_desc) * RX_ENTRIES,
sc 1010 dev/pci/if_txp.c &sc->sc_rxloring_dma, BUS_DMA_COHERENT)) {
sc 1014 dev/pci/if_txp.c bzero(sc->sc_rxloring_dma.dma_vaddr, sizeof(struct txp_rx_desc) * RX_ENTRIES);
sc 1015 dev/pci/if_txp.c boot->br_rxlopri_lo = htole32(sc->sc_rxloring_dma.dma_paddr & 0xffffffff);
sc 1016 dev/pci/if_txp.c boot->br_rxlopri_hi = htole32(sc->sc_rxloring_dma.dma_paddr >> 32);
sc 1018 dev/pci/if_txp.c sc->sc_rxlor.r_desc =
sc 1019 dev/pci/if_txp.c (struct txp_rx_desc *)sc->sc_rxloring_dma.dma_vaddr;
sc 1020 dev/pci/if_txp.c sc->sc_rxlor.r_roff = &sc->sc_hostvar->hv_rx_lo_read_idx;
sc 1021 dev/pci/if_txp.c sc->sc_rxlor.r_woff = &sc->sc_hostvar->hv_rx_lo_write_idx;
sc 1022 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rxloring_dma.dma_map,
sc 1023 dev/pci/if_txp.c 0, sc->sc_rxloring_dma.dma_map->dm_mapsize, BUS_DMASYNC_PREREAD);
sc 1026 dev/pci/if_txp.c if (txp_dma_malloc(sc, sizeof(struct txp_cmd_desc) * CMD_ENTRIES,
sc 1027 dev/pci/if_txp.c &sc->sc_cmdring_dma, BUS_DMA_COHERENT)) {
sc 1031 dev/pci/if_txp.c bzero(sc->sc_cmdring_dma.dma_vaddr, sizeof(struct txp_cmd_desc) * CMD_ENTRIES);
sc 1032 dev/pci/if_txp.c boot->br_cmd_lo = htole32(sc->sc_cmdring_dma.dma_paddr & 0xffffffff);
sc 1033 dev/pci/if_txp.c boot->br_cmd_hi = htole32(sc->sc_cmdring_dma.dma_paddr >> 32);
sc 1035 dev/pci/if_txp.c sc->sc_cmdring.base = (struct txp_cmd_desc *)sc->sc_cmdring_dma.dma_vaddr;
sc 1036 dev/pci/if_txp.c sc->sc_cmdring.size = CMD_ENTRIES * sizeof(struct txp_cmd_desc);
sc 1037 dev/pci/if_txp.c sc->sc_cmdring.lastwrite = 0;
sc 1040 dev/pci/if_txp.c if (txp_dma_malloc(sc, sizeof(struct txp_rsp_desc) * RSP_ENTRIES,
sc 1041 dev/pci/if_txp.c &sc->sc_rspring_dma, BUS_DMA_COHERENT)) {
sc 1045 dev/pci/if_txp.c bzero(sc->sc_rspring_dma.dma_vaddr, sizeof(struct txp_rsp_desc) * RSP_ENTRIES);
sc 1046 dev/pci/if_txp.c boot->br_resp_lo = htole32(sc->sc_rspring_dma.dma_paddr & 0xffffffff);
sc 1047 dev/pci/if_txp.c boot->br_resp_hi = htole32(sc->sc_rspring_dma.dma_paddr >> 32);
sc 1049 dev/pci/if_txp.c sc->sc_rspring.base = (struct txp_rsp_desc *)sc->sc_rspring_dma.dma_vaddr;
sc 1050 dev/pci/if_txp.c sc->sc_rspring.size = RSP_ENTRIES * sizeof(struct txp_rsp_desc);
sc 1051 dev/pci/if_txp.c sc->sc_rspring.lastwrite = 0;
sc 1054 dev/pci/if_txp.c if (txp_dma_malloc(sc, sizeof(struct txp_rxbuf_desc) * RXBUF_ENTRIES,
sc 1055 dev/pci/if_txp.c &sc->sc_rxbufring_dma, BUS_DMA_COHERENT)) {
sc 1059 dev/pci/if_txp.c bzero(sc->sc_rxbufring_dma.dma_vaddr, sizeof(struct txp_rxbuf_desc) * RXBUF_ENTRIES);
sc 1060 dev/pci/if_txp.c boot->br_rxbuf_lo = htole32(sc->sc_rxbufring_dma.dma_paddr & 0xffffffff);
sc 1061 dev/pci/if_txp.c boot->br_rxbuf_hi = htole32(sc->sc_rxbufring_dma.dma_paddr >> 32);
sc 1063 dev/pci/if_txp.c sc->sc_rxbufs = (struct txp_rxbuf_desc *)sc->sc_rxbufring_dma.dma_vaddr;
sc 1069 dev/pci/if_txp.c bcopy(&sd, (u_long *)&sc->sc_rxbufs[i].rb_vaddrlo, sizeof(sd));
sc 1087 dev/pci/if_txp.c if (bus_dmamap_create(sc->sc_dmat, TXP_MAX_PKTLEN, 1,
sc 1091 dev/pci/if_txp.c if (bus_dmamap_load_mbuf(sc->sc_dmat, sd->sd_map, sd->sd_mbuf,
sc 1093 dev/pci/if_txp.c bus_dmamap_destroy(sc->sc_dmat, sd->sd_map);
sc 1096 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sd->sd_map, 0,
sc 1099 dev/pci/if_txp.c sc->sc_rxbufs[i].rb_paddrlo =
sc 1101 dev/pci/if_txp.c sc->sc_rxbufs[i].rb_paddrhi =
sc 1104 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rxbufring_dma.dma_map,
sc 1105 dev/pci/if_txp.c 0, sc->sc_rxbufring_dma.dma_map->dm_mapsize,
sc 1107 dev/pci/if_txp.c sc->sc_hostvar->hv_rx_buf_write_idx = htole32((RXBUF_ENTRIES - 1) *
sc 1111 dev/pci/if_txp.c if (txp_dma_malloc(sc, sizeof(u_int32_t), &sc->sc_zero_dma,
sc 1116 dev/pci/if_txp.c bzero(sc->sc_zero_dma.dma_vaddr, sizeof(u_int32_t));
sc 1117 dev/pci/if_txp.c boot->br_zero_lo = htole32(sc->sc_zero_dma.dma_paddr & 0xffffffff);
sc 1118 dev/pci/if_txp.c boot->br_zero_hi = htole32(sc->sc_zero_dma.dma_paddr >> 32);
sc 1122 dev/pci/if_txp.c r = READ_REG(sc, TXP_A2H_0);
sc 1131 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_2, sc->sc_boot_dma.dma_paddr >> 32);
sc 1132 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_1, sc->sc_boot_dma.dma_paddr & 0xffffffff);
sc 1133 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_REGISTER_BOOT_RECORD);
sc 1137 dev/pci/if_txp.c r = READ_REG(sc, TXP_A2H_0);
sc 1148 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_1, TXP_BOOTCMD_NULL);
sc 1149 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_2, TXP_BOOTCMD_NULL);
sc 1150 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_3, TXP_BOOTCMD_NULL);
sc 1151 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_0, TXP_BOOTCMD_NULL);
sc 1156 dev/pci/if_txp.c txp_dma_free(sc, &sc->sc_zero_dma);
sc 1159 dev/pci/if_txp.c bcopy((u_long *)&sc->sc_rxbufs[i].rb_vaddrlo, &sd, sizeof(sd));
sc 1163 dev/pci/if_txp.c txp_dma_free(sc, &sc->sc_rxbufring_dma);
sc 1165 dev/pci/if_txp.c txp_dma_free(sc, &sc->sc_rspring_dma);
sc 1167 dev/pci/if_txp.c txp_dma_free(sc, &sc->sc_cmdring_dma);
sc 1169 dev/pci/if_txp.c txp_dma_free(sc, &sc->sc_rxloring_dma);
sc 1171 dev/pci/if_txp.c txp_dma_free(sc, &sc->sc_rxhiring_dma);
sc 1173 dev/pci/if_txp.c txp_dma_free(sc, &sc->sc_txloring_dma);
sc 1175 dev/pci/if_txp.c txp_dma_free(sc, &sc->sc_txhiring_dma);
sc 1177 dev/pci/if_txp.c txp_dma_free(sc, &sc->sc_host_dma);
sc 1179 dev/pci/if_txp.c txp_dma_free(sc, &sc->sc_boot_dma);
sc 1184 dev/pci/if_txp.c txp_dma_malloc(sc, size, dma, mapflags)
sc 1185 dev/pci/if_txp.c struct txp_softc *sc;
sc 1192 dev/pci/if_txp.c if ((r = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0,
sc 1196 dev/pci/if_txp.c if ((r = bus_dmamem_map(sc->sc_dmat, &dma->dma_seg, dma->dma_nseg,
sc 1200 dev/pci/if_txp.c if ((r = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 1204 dev/pci/if_txp.c if ((r = bus_dmamap_load(sc->sc_dmat, dma->dma_map, dma->dma_vaddr,
sc 1212 dev/pci/if_txp.c bus_dmamap_destroy(sc->sc_dmat, dma->dma_map);
sc 1214 dev/pci/if_txp.c bus_dmamem_unmap(sc->sc_dmat, dma->dma_vaddr, size);
sc 1216 dev/pci/if_txp.c bus_dmamem_free(sc->sc_dmat, &dma->dma_seg, dma->dma_nseg);
sc 1222 dev/pci/if_txp.c txp_dma_free(sc, dma)
sc 1223 dev/pci/if_txp.c struct txp_softc *sc;
sc 1226 dev/pci/if_txp.c bus_dmamap_unload(sc->sc_dmat, dma->dma_map);
sc 1227 dev/pci/if_txp.c bus_dmamem_unmap(sc->sc_dmat, dma->dma_vaddr, dma->dma_map->dm_mapsize);
sc 1228 dev/pci/if_txp.c bus_dmamem_free(sc->sc_dmat, &dma->dma_seg, dma->dma_nseg);
sc 1229 dev/pci/if_txp.c bus_dmamap_destroy(sc->sc_dmat, dma->dma_map);
sc 1238 dev/pci/if_txp.c struct txp_softc *sc = ifp->if_softc;
sc 1245 dev/pci/if_txp.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, command, data)) > 0) {
sc 1256 dev/pci/if_txp.c txp_init(sc);
sc 1257 dev/pci/if_txp.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 1261 dev/pci/if_txp.c txp_init(sc);
sc 1267 dev/pci/if_txp.c txp_init(sc);
sc 1270 dev/pci/if_txp.c txp_stop(sc);
sc 1276 dev/pci/if_txp.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 1277 dev/pci/if_txp.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 1285 dev/pci/if_txp.c txp_set_filter(sc);
sc 1291 dev/pci/if_txp.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, command);
sc 1304 dev/pci/if_txp.c txp_init(sc)
sc 1305 dev/pci/if_txp.c struct txp_softc *sc;
sc 1307 dev/pci/if_txp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1310 dev/pci/if_txp.c txp_stop(sc);
sc 1314 dev/pci/if_txp.c txp_set_filter(sc);
sc 1316 dev/pci/if_txp.c txp_command(sc, TXP_CMD_TX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1);
sc 1317 dev/pci/if_txp.c txp_command(sc, TXP_CMD_RX_ENABLE, 0, 0, 0, NULL, NULL, NULL, 1);
sc 1319 dev/pci/if_txp.c WRITE_REG(sc, TXP_IER, TXP_INT_RESERVED | TXP_INT_SELF |
sc 1324 dev/pci/if_txp.c WRITE_REG(sc, TXP_IMR, TXP_INT_A2H_3);
sc 1330 dev/pci/if_txp.c if (!timeout_pending(&sc->sc_tick))
sc 1331 dev/pci/if_txp.c timeout_add(&sc->sc_tick, hz);
sc 1340 dev/pci/if_txp.c struct txp_softc *sc = vsc;
sc 1341 dev/pci/if_txp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1347 dev/pci/if_txp.c txp_rxbuf_reclaim(sc);
sc 1349 dev/pci/if_txp.c if (txp_command2(sc, TXP_CMD_READ_STATISTICS, 0, 0, 0, NULL, 0,
sc 1354 dev/pci/if_txp.c if (txp_command(sc, TXP_CMD_CLEAR_STATISTICS, 0, 0, 0,
sc 1373 dev/pci/if_txp.c timeout_add(&sc->sc_tick, hz);
sc 1380 dev/pci/if_txp.c struct txp_softc *sc = ifp->if_softc;
sc 1381 dev/pci/if_txp.c struct txp_tx_ring *r = &sc->sc_txhir;
sc 1407 dev/pci/if_txp.c sd = sc->sc_txd + prod;
sc 1410 dev/pci/if_txp.c if (bus_dmamap_load_mbuf(sc->sc_dmat, sd->sd_map, m,
sc 1427 dev/pci/if_txp.c if (bus_dmamap_load_mbuf(sc->sc_dmat, sd->sd_map, m,
sc 1471 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sd->sd_map, 0,
sc 1477 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sd->sd_map,
sc 1495 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat,
sc 1496 dev/pci/if_txp.c sc->sc_txhiring_dma.dma_map,
sc 1523 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sc->sc_txhiring_dma.dma_map,
sc 1545 dev/pci/if_txp.c WRITE_REG(sc, r->r_reg, TXP_IDX2OFFSET(prod));
sc 1553 dev/pci/if_txp.c bus_dmamap_unload(sc->sc_dmat, sd->sd_map);
sc 1564 dev/pci/if_txp.c txp_command(sc, id, in1, in2, in3, out1, out2, out3, wait)
sc 1565 dev/pci/if_txp.c struct txp_softc *sc;
sc 1572 dev/pci/if_txp.c if (txp_command2(sc, id, in1, in2, in3, NULL, 0, &rsp, wait))
sc 1589 dev/pci/if_txp.c txp_command2(sc, id, in1, in2, in3, in_extp, in_extn, rspp, wait)
sc 1590 dev/pci/if_txp.c struct txp_softc *sc;
sc 1598 dev/pci/if_txp.c struct txp_hostvar *hv = sc->sc_hostvar;
sc 1604 dev/pci/if_txp.c if (txp_cmd_desc_numfree(sc) < (in_extn + 1)) {
sc 1605 dev/pci/if_txp.c printf("%s: no free cmd descriptors\n", TXP_DEVNAME(sc));
sc 1609 dev/pci/if_txp.c idx = sc->sc_cmdring.lastwrite;
sc 1610 dev/pci/if_txp.c cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
sc 1614 dev/pci/if_txp.c seq = sc->sc_seq++;
sc 1624 dev/pci/if_txp.c if (idx == sc->sc_cmdring.size)
sc 1628 dev/pci/if_txp.c ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
sc 1632 dev/pci/if_txp.c if (idx == sc->sc_cmdring.size)
sc 1636 dev/pci/if_txp.c sc->sc_cmdring.lastwrite = idx;
sc 1638 dev/pci/if_txp.c WRITE_REG(sc, TXP_H2A_2, sc->sc_cmdring.lastwrite);
sc 1639 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sc->sc_host_dma.dma_map, 0,
sc 1646 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sc->sc_host_dma.dma_map, 0,
sc 1651 dev/pci/if_txp.c if (txp_response(sc, idx, id, seq, rspp))
sc 1656 dev/pci/if_txp.c bus_dmamap_sync(sc->sc_dmat, sc->sc_host_dma.dma_map, 0,
sc 1661 dev/pci/if_txp.c printf("%s: 0x%x command failed\n", TXP_DEVNAME(sc), id);
sc 1669 dev/pci/if_txp.c txp_response(sc, ridx, id, seq, rspp)
sc 1670 dev/pci/if_txp.c struct txp_softc *sc;
sc 1676 dev/pci/if_txp.c struct txp_hostvar *hv = sc->sc_hostvar;
sc 1680 dev/pci/if_txp.c rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx);
sc 1688 dev/pci/if_txp.c txp_rsp_fixup(sc, rsp, *rspp);
sc 1694 dev/pci/if_txp.c TXP_DEVNAME(sc), letoh16(rsp->rsp_id));
sc 1695 dev/pci/if_txp.c txp_rsp_fixup(sc, rsp, NULL);
sc 1705 dev/pci/if_txp.c printf("%s: hello\n", TXP_DEVNAME(sc));
sc 1708 dev/pci/if_txp.c printf("%s: unknown id(0x%x)\n", TXP_DEVNAME(sc),
sc 1712 dev/pci/if_txp.c txp_rsp_fixup(sc, rsp, NULL);
sc 1721 dev/pci/if_txp.c txp_rsp_fixup(sc, rsp, dst)
sc 1722 dev/pci/if_txp.c struct txp_softc *sc;
sc 1726 dev/pci/if_txp.c struct txp_hostvar *hv = sc->sc_hostvar;
sc 1735 dev/pci/if_txp.c if (ridx == sc->sc_rspring.size) {
sc 1736 dev/pci/if_txp.c src = sc->sc_rspring.base;
sc 1740 dev/pci/if_txp.c sc->sc_rspring.lastwrite = ridx;
sc 1748 dev/pci/if_txp.c txp_cmd_desc_numfree(sc)
sc 1749 dev/pci/if_txp.c struct txp_softc *sc;
sc 1751 dev/pci/if_txp.c struct txp_hostvar *hv = sc->sc_hostvar;
sc 1752 dev/pci/if_txp.c struct txp_boot_record *br = sc->sc_boot;
sc 1755 dev/pci/if_txp.c widx = sc->sc_cmdring.lastwrite;
sc 1773 dev/pci/if_txp.c txp_stop(sc)
sc 1774 dev/pci/if_txp.c struct txp_softc *sc;
sc 1776 dev/pci/if_txp.c txp_command(sc, TXP_CMD_TX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1);
sc 1777 dev/pci/if_txp.c txp_command(sc, TXP_CMD_RX_DISABLE, 0, 0, 0, NULL, NULL, NULL, 1);
sc 1779 dev/pci/if_txp.c if (timeout_pending(&sc->sc_tick))
sc 1780 dev/pci/if_txp.c timeout_del(&sc->sc_tick);
sc 1793 dev/pci/if_txp.c struct txp_softc *sc = ifp->if_softc;
sc 1794 dev/pci/if_txp.c struct ifmedia *ifm = &sc->sc_ifmedia;
sc 1816 dev/pci/if_txp.c if (sc->sc_xcvr == new_xcvr)
sc 1819 dev/pci/if_txp.c txp_command(sc, TXP_CMD_XCVR_SELECT, new_xcvr, 0, 0,
sc 1821 dev/pci/if_txp.c sc->sc_xcvr = new_xcvr;
sc 1831 dev/pci/if_txp.c struct txp_softc *sc = ifp->if_softc;
sc 1832 dev/pci/if_txp.c struct ifmedia *ifm = &sc->sc_ifmedia;
sc 1838 dev/pci/if_txp.c if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0,
sc 1841 dev/pci/if_txp.c if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMSR, 0,
sc 1845 dev/pci/if_txp.c if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_BMCR, 0,
sc 1849 dev/pci/if_txp.c if (txp_command(sc, TXP_CMD_PHY_MGMT_READ, 0, MII_ANLPAR, 0,
sc 1939 dev/pci/if_txp.c txp_set_filter(sc)
sc 1940 dev/pci/if_txp.c struct txp_softc *sc;
sc 1942 dev/pci/if_txp.c struct arpcom *ac = &sc->sc_arpcom;
sc 1943 dev/pci/if_txp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1992 dev/pci/if_txp.c txp_command(sc, TXP_CMD_MCAST_HASH_MASK_WRITE,
sc 1998 dev/pci/if_txp.c txp_command(sc, TXP_CMD_RX_FILTER_WRITE, filter, 0, 0,
sc 2003 dev/pci/if_txp.c txp_capabilities(sc)
sc 2004 dev/pci/if_txp.c struct txp_softc *sc;
sc 2006 dev/pci/if_txp.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 2010 dev/pci/if_txp.c if (txp_command2(sc, TXP_CMD_OFFLOAD_READ, 0, 0, 0, NULL, 0, &rsp, 1))
sc 2017 dev/pci/if_txp.c sc->sc_tx_capability = ext->ext_1 & OFFLOAD_MASK;
sc 2018 dev/pci/if_txp.c sc->sc_rx_capability = ext->ext_2 & OFFLOAD_MASK;
sc 2024 dev/pci/if_txp.c sc->sc_tx_capability |= OFFLOAD_VLAN;
sc 2032 dev/pci/if_txp.c sc->sc_tx_capability |= OFFLOAD_IPSEC;
sc 2033 dev/pci/if_txp.c sc->sc_rx_capability |= OFFLOAD_IPSEC;
sc 2039 dev/pci/if_txp.c sc->sc_tx_capability |= OFFLOAD_IPCKSUM;
sc 2040 dev/pci/if_txp.c sc->sc_rx_capability |= OFFLOAD_IPCKSUM;
sc 2045 dev/pci/if_txp.c sc->sc_rx_capability |= OFFLOAD_TCPCKSUM;
sc 2047 dev/pci/if_txp.c sc->sc_tx_capability |= OFFLOAD_TCPCKSUM;
sc 2053 dev/pci/if_txp.c sc->sc_rx_capability |= OFFLOAD_UDPCKSUM;
sc 2055 dev/pci/if_txp.c sc->sc_tx_capability |= OFFLOAD_UDPCKSUM;
sc 2060 dev/pci/if_txp.c if (txp_command(sc, TXP_CMD_OFFLOAD_WRITE, 0,
sc 2061 dev/pci/if_txp.c sc->sc_tx_capability, sc->sc_rx_capability, NULL, NULL, NULL, 1))
sc 592 dev/pci/if_txpreg.h #define TXP_DEVNAME(sc) ((sc)->sc_cold ? "" : (sc)->sc_dev.dv_xname)
sc 611 dev/pci/if_txpreg.h #define WRITE_REG(sc,reg,val) \
sc 612 dev/pci/if_txpreg.h bus_space_write_4((sc)->sc_bt, (sc)->sc_bh, reg, val)
sc 613 dev/pci/if_txpreg.h #define READ_REG(sc,reg) \
sc 614 dev/pci/if_txpreg.h bus_space_read_4((sc)->sc_bt, (sc)->sc_bh, reg)
sc 190 dev/pci/if_vge.c vge_eeprom_getword(struct vge_softc *sc, int addr, u_int16_t *dest)
sc 200 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_CHIPCFG2, VGE_CHIPCFG2_EELOAD);
sc 201 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_EECSR, VGE_EECSR_EMBP/*|VGE_EECSR_ECS*/);
sc 204 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_EEADDR, addr);
sc 207 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_EECMD, VGE_EECMD_ERD);
sc 211 dev/pci/if_vge.c if (CSR_READ_1(sc, VGE_EECMD) & VGE_EECMD_EDONE)
sc 216 dev/pci/if_vge.c printf("%s: EEPROM read timed out\n", sc->vge_dev.dv_xname);
sc 222 dev/pci/if_vge.c word = CSR_READ_2(sc, VGE_EERDDAT);
sc 225 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_EECSR, VGE_EECSR_EMBP/*|VGE_EECSR_ECS*/);
sc 226 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_CHIPCFG2, VGE_CHIPCFG2_EELOAD);
sc 236 dev/pci/if_vge.c vge_read_eeprom(struct vge_softc *sc, caddr_t dest, int off, int cnt,
sc 244 dev/pci/if_vge.c vge_eeprom_getword(sc, off + i, &word);
sc 253 dev/pci/if_vge.c dest[i] = CSR_READ_1(sc, VGE_PAR0 + i);
sc 258 dev/pci/if_vge.c vge_miipoll_stop(struct vge_softc *sc)
sc 262 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_MIICMD, 0);
sc 266 dev/pci/if_vge.c if (CSR_READ_1(sc, VGE_MIISTS) & VGE_MIISTS_IIDL)
sc 271 dev/pci/if_vge.c printf("%s: failed to idle MII autopoll\n", sc->vge_dev.dv_xname);
sc 275 dev/pci/if_vge.c vge_miipoll_start(struct vge_softc *sc)
sc 281 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_MIICMD, 0);
sc 282 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_MIIADDR, VGE_MIIADDR_SWMPL);
sc 286 dev/pci/if_vge.c if (CSR_READ_1(sc, VGE_MIISTS) & VGE_MIISTS_IIDL)
sc 291 dev/pci/if_vge.c printf("%s: failed to idle MII autopoll\n", sc->vge_dev.dv_xname);
sc 297 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_MIICMD, VGE_MIICMD_MAUTO);
sc 303 dev/pci/if_vge.c if ((CSR_READ_1(sc, VGE_MIISTS) & VGE_MIISTS_IIDL) == 0)
sc 308 dev/pci/if_vge.c printf("%s: failed to start MII autopoll\n", sc->vge_dev.dv_xname);
sc 314 dev/pci/if_vge.c struct vge_softc *sc = (struct vge_softc *)dev;
sc 318 dev/pci/if_vge.c if (phy != (CSR_READ_1(sc, VGE_MIICFG) & 0x1F))
sc 323 dev/pci/if_vge.c vge_miipoll_stop(sc);
sc 326 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_MIIADDR, reg);
sc 329 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_MIICMD, VGE_MIICMD_RCMD);
sc 334 dev/pci/if_vge.c if ((CSR_READ_1(sc, VGE_MIICMD) & VGE_MIICMD_RCMD) == 0)
sc 339 dev/pci/if_vge.c printf("%s: MII read timed out\n", sc->vge_dev.dv_xname);
sc 341 dev/pci/if_vge.c rval = CSR_READ_2(sc, VGE_MIIDATA);
sc 343 dev/pci/if_vge.c vge_miipoll_start(sc);
sc 352 dev/pci/if_vge.c struct vge_softc *sc = (struct vge_softc *)dev;
sc 355 dev/pci/if_vge.c if (phy != (CSR_READ_1(sc, VGE_MIICFG) & 0x1F))
sc 359 dev/pci/if_vge.c vge_miipoll_stop(sc);
sc 362 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_MIIADDR, reg);
sc 365 dev/pci/if_vge.c CSR_WRITE_2(sc, VGE_MIIDATA, data);
sc 368 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_MIICMD, VGE_MIICMD_WCMD);
sc 373 dev/pci/if_vge.c if ((CSR_READ_1(sc, VGE_MIICMD) & VGE_MIICMD_WCMD) == 0)
sc 378 dev/pci/if_vge.c printf("%s: MII write timed out\n", sc->vge_dev.dv_xname);
sc 381 dev/pci/if_vge.c vge_miipoll_start(sc);
sc 386 dev/pci/if_vge.c vge_cam_clear(struct vge_softc *sc)
sc 396 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_CAMCTL, VGE_CAMCTL_PAGESEL);
sc 397 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_CAMCTL, VGE_PAGESEL_CAMMASK);
sc 398 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CAMADDR, VGE_CAMADDR_ENABLE);
sc 400 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CAM0 + i, 0);
sc 404 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CAMADDR, VGE_CAMADDR_ENABLE|VGE_CAMADDR_AVSEL|0);
sc 406 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CAM0 + i, 0);
sc 408 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CAMADDR, 0);
sc 409 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_CAMCTL, VGE_CAMCTL_PAGESEL);
sc 410 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_CAMCTL, VGE_PAGESEL_MAR);
sc 412 dev/pci/if_vge.c sc->vge_camidx = 0;
sc 416 dev/pci/if_vge.c vge_cam_set(struct vge_softc *sc, uint8_t *addr)
sc 420 dev/pci/if_vge.c if (sc->vge_camidx == VGE_CAM_MAXADDRS)
sc 424 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_CAMCTL, VGE_CAMCTL_PAGESEL);
sc 425 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_CAMCTL, VGE_PAGESEL_CAMDATA);
sc 428 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CAMADDR, VGE_CAMADDR_ENABLE|sc->vge_camidx);
sc 432 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CAM0 + i, addr[i]);
sc 435 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_CAMCTL, VGE_CAMCTL_WRITE);
sc 440 dev/pci/if_vge.c if ((CSR_READ_1(sc, VGE_CAMCTL) & VGE_CAMCTL_WRITE) == 0)
sc 445 dev/pci/if_vge.c printf("%s: setting CAM filter failed\n", sc->vge_dev.dv_xname);
sc 451 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_CAMCTL, VGE_CAMCTL_PAGESEL);
sc 452 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_CAMCTL, VGE_PAGESEL_CAMMASK);
sc 455 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_CAM0 + (sc->vge_camidx/8),
sc 456 dev/pci/if_vge.c 1<<(sc->vge_camidx & 7));
sc 458 dev/pci/if_vge.c sc->vge_camidx++;
sc 462 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CAMADDR, 0);
sc 463 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_CAMCTL, VGE_CAMCTL_PAGESEL);
sc 464 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_CAMCTL, VGE_PAGESEL_MAR);
sc 475 dev/pci/if_vge.c vge_setmulti(struct vge_softc *sc)
sc 477 dev/pci/if_vge.c struct arpcom *ac = &sc->arpcom;
sc 485 dev/pci/if_vge.c vge_cam_clear(sc);
sc 486 dev/pci/if_vge.c CSR_WRITE_4(sc, VGE_MAR0, 0);
sc 487 dev/pci/if_vge.c CSR_WRITE_4(sc, VGE_MAR1, 0);
sc 496 dev/pci/if_vge.c CSR_WRITE_4(sc, VGE_MAR0, 0xFFFFFFFF);
sc 497 dev/pci/if_vge.c CSR_WRITE_4(sc, VGE_MAR1, 0xFFFFFFFF);
sc 508 dev/pci/if_vge.c error = vge_cam_set(sc, enm->enm_addrlo);
sc 517 dev/pci/if_vge.c vge_cam_clear(sc);
sc 528 dev/pci/if_vge.c CSR_WRITE_4(sc, VGE_MAR0, hashes[0]);
sc 529 dev/pci/if_vge.c CSR_WRITE_4(sc, VGE_MAR1, hashes[1]);
sc 534 dev/pci/if_vge.c vge_reset(struct vge_softc *sc)
sc 538 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CRS1, VGE_CR1_SOFTRESET);
sc 542 dev/pci/if_vge.c if ((CSR_READ_1(sc, VGE_CRS1) & VGE_CR1_SOFTRESET) == 0)
sc 547 dev/pci/if_vge.c printf("%s: soft reset timed out", sc->vge_dev.dv_xname);
sc 548 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CRS3, VGE_CR3_STOP_FORCE);
sc 554 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_EECSR, VGE_EECSR_RELOAD);
sc 558 dev/pci/if_vge.c if ((CSR_READ_1(sc, VGE_EECSR) & VGE_EECSR_RELOAD) == 0)
sc 563 dev/pci/if_vge.c printf("%s: EEPROM reload timed out\n", sc->vge_dev.dv_xname);
sc 567 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_CHIPCFG0, VGE_CHIPCFG0_PACPI);
sc 585 dev/pci/if_vge.c vge_allocmem(struct vge_softc *sc)
sc 594 dev/pci/if_vge.c error = bus_dmamap_create(sc->sc_dmat, VGE_TX_LIST_SZ, 1,
sc 596 dev/pci/if_vge.c &sc->vge_ldata.vge_tx_list_map);
sc 599 dev/pci/if_vge.c error = bus_dmamem_alloc(sc->sc_dmat, VGE_TX_LIST_SZ,
sc 601 dev/pci/if_vge.c &sc->vge_ldata.vge_tx_listseg, 1, &rseg, BUS_DMA_NOWAIT);
sc 603 dev/pci/if_vge.c printf("%s: can't alloc TX list\n", sc->vge_dev.dv_xname);
sc 608 dev/pci/if_vge.c error = bus_dmamem_map(sc->sc_dmat, &sc->vge_ldata.vge_tx_listseg,
sc 610 dev/pci/if_vge.c (caddr_t *)&sc->vge_ldata.vge_tx_list, BUS_DMA_NOWAIT);
sc 611 dev/pci/if_vge.c memset(sc->vge_ldata.vge_tx_list, 0, VGE_TX_LIST_SZ);
sc 614 dev/pci/if_vge.c sc->vge_dev.dv_xname);
sc 615 dev/pci/if_vge.c bus_dmamem_free(sc->sc_dmat, &sc->vge_ldata.vge_tx_listseg, rseg);
sc 619 dev/pci/if_vge.c error = bus_dmamap_load(sc->sc_dmat, sc->vge_ldata.vge_tx_list_map,
sc 620 dev/pci/if_vge.c sc->vge_ldata.vge_tx_list, VGE_TX_LIST_SZ, NULL, BUS_DMA_NOWAIT);
sc 622 dev/pci/if_vge.c printf("%s: can't load TX dma map\n", sc->vge_dev.dv_xname);
sc 623 dev/pci/if_vge.c bus_dmamap_destroy(sc->sc_dmat, sc->vge_ldata.vge_tx_list_map);
sc 624 dev/pci/if_vge.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->vge_ldata.vge_tx_list,
sc 626 dev/pci/if_vge.c bus_dmamem_free(sc->sc_dmat, &sc->vge_ldata.vge_tx_listseg, rseg);
sc 633 dev/pci/if_vge.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES * nseg, nseg,
sc 635 dev/pci/if_vge.c &sc->vge_ldata.vge_tx_dmamap[i]);
sc 638 dev/pci/if_vge.c sc->vge_dev.dv_xname);
sc 645 dev/pci/if_vge.c error = bus_dmamap_create(sc->sc_dmat, VGE_RX_LIST_SZ, 1,
sc 647 dev/pci/if_vge.c &sc->vge_ldata.vge_rx_list_map);
sc 650 dev/pci/if_vge.c error = bus_dmamem_alloc(sc->sc_dmat, VGE_RX_LIST_SZ, VGE_RING_ALIGN,
sc 651 dev/pci/if_vge.c 0, &sc->vge_ldata.vge_rx_listseg, 1, &rseg, BUS_DMA_NOWAIT);
sc 653 dev/pci/if_vge.c printf("%s: can't alloc RX list\n", sc->vge_dev.dv_xname);
sc 659 dev/pci/if_vge.c error = bus_dmamem_map(sc->sc_dmat, &sc->vge_ldata.vge_rx_listseg,
sc 661 dev/pci/if_vge.c (caddr_t *)&sc->vge_ldata.vge_rx_list, BUS_DMA_NOWAIT);
sc 662 dev/pci/if_vge.c memset(sc->vge_ldata.vge_rx_list, 0, VGE_RX_LIST_SZ);
sc 665 dev/pci/if_vge.c sc->vge_dev.dv_xname);
sc 666 dev/pci/if_vge.c bus_dmamem_free(sc->sc_dmat, &sc->vge_ldata.vge_rx_listseg, rseg);
sc 669 dev/pci/if_vge.c error = bus_dmamap_load(sc->sc_dmat, sc->vge_ldata.vge_rx_list_map,
sc 670 dev/pci/if_vge.c sc->vge_ldata.vge_rx_list, VGE_RX_LIST_SZ, NULL, BUS_DMA_NOWAIT);
sc 672 dev/pci/if_vge.c printf("%s: can't load RX dma map\n", sc->vge_dev.dv_xname);
sc 673 dev/pci/if_vge.c bus_dmamap_destroy(sc->sc_dmat, sc->vge_ldata.vge_rx_list_map);
sc 674 dev/pci/if_vge.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->vge_ldata.vge_rx_list,
sc 676 dev/pci/if_vge.c bus_dmamem_free(sc->sc_dmat, &sc->vge_ldata.vge_rx_listseg, rseg);
sc 683 dev/pci/if_vge.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES * nseg, nseg,
sc 685 dev/pci/if_vge.c &sc->vge_ldata.vge_rx_dmamap[i]);
sc 688 dev/pci/if_vge.c sc->vge_dev.dv_xname);
sc 705 dev/pci/if_vge.c struct vge_softc *sc = (struct vge_softc *)self;
sc 718 dev/pci/if_vge.c &sc->vge_btag, &sc->vge_bhandle, NULL, &iosize, 0)) {
sc 720 dev/pci/if_vge.c &sc->vge_btag, &sc->vge_bhandle, NULL, &iosize, 0)) {
sc 732 dev/pci/if_vge.c sc->vge_intrhand = pci_intr_establish(pc, ih, IPL_NET, vge_intr, sc,
sc 733 dev/pci/if_vge.c sc->vge_dev.dv_xname);
sc 734 dev/pci/if_vge.c if (sc->vge_intrhand == NULL) {
sc 742 dev/pci/if_vge.c sc->sc_dmat = pa->pa_dmat;
sc 745 dev/pci/if_vge.c vge_reset(sc);
sc 750 dev/pci/if_vge.c vge_read_eeprom(sc, (caddr_t)as, VGE_EE_EADDR, 3, 0);
sc 756 dev/pci/if_vge.c bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 759 dev/pci/if_vge.c ether_sprintf(sc->arpcom.ac_enaddr));
sc 761 dev/pci/if_vge.c error = vge_allocmem(sc);
sc 766 dev/pci/if_vge.c ifp = &sc->arpcom.ac_if;
sc 767 dev/pci/if_vge.c ifp->if_softc = sc;
sc 788 dev/pci/if_vge.c strlcpy(ifp->if_xname, sc->vge_dev.dv_xname, IFNAMSIZ);
sc 791 dev/pci/if_vge.c sc->sc_mii.mii_ifp = ifp;
sc 792 dev/pci/if_vge.c sc->sc_mii.mii_readreg = vge_miibus_readreg;
sc 793 dev/pci/if_vge.c sc->sc_mii.mii_writereg = vge_miibus_writereg;
sc 794 dev/pci/if_vge.c sc->sc_mii.mii_statchg = vge_miibus_statchg;
sc 795 dev/pci/if_vge.c ifmedia_init(&sc->sc_mii.mii_media, 0,
sc 797 dev/pci/if_vge.c mii_attach(self, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
sc 799 dev/pci/if_vge.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 800 dev/pci/if_vge.c printf("%s: no PHY found!\n", sc->vge_dev.dv_xname);
sc 801 dev/pci/if_vge.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_MANUAL,
sc 803 dev/pci/if_vge.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_MANUAL);
sc 805 dev/pci/if_vge.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 807 dev/pci/if_vge.c timeout_set(&sc->timer_handle, vge_tick, sc);
sc 817 dev/pci/if_vge.c vge_newbuf(struct vge_softc *sc, int idx, struct mbuf *m)
sc 821 dev/pci/if_vge.c bus_dmamap_t rxmap = sc->vge_ldata.vge_rx_dmamap[idx];
sc 843 dev/pci/if_vge.c if (bus_dmamap_load_mbuf(sc->sc_dmat, rxmap, m_new, BUS_DMA_NOWAIT))
sc 850 dev/pci/if_vge.c r = &sc->vge_ldata.vge_rx_list[idx];
sc 854 dev/pci/if_vge.c sc->vge_dev.dv_xname);
sc 872 dev/pci/if_vge.c sc->vge_rx_consumed++;
sc 873 dev/pci/if_vge.c if (sc->vge_rx_consumed == VGE_RXCHUNK) {
sc 874 dev/pci/if_vge.c for (i = idx; i != idx - sc->vge_rx_consumed; i--)
sc 875 dev/pci/if_vge.c sc->vge_ldata.vge_rx_list[i].vge_sts |=
sc 877 dev/pci/if_vge.c sc->vge_rx_consumed = 0;
sc 880 dev/pci/if_vge.c sc->vge_ldata.vge_rx_mbuf[idx] = m_new;
sc 882 dev/pci/if_vge.c bus_dmamap_sync(sc->sc_dmat, rxmap, 0,
sc 894 dev/pci/if_vge.c vge_tx_list_init(struct vge_softc *sc)
sc 896 dev/pci/if_vge.c bzero ((char *)sc->vge_ldata.vge_tx_list, VGE_TX_LIST_SZ);
sc 897 dev/pci/if_vge.c bzero ((char *)&sc->vge_ldata.vge_tx_mbuf,
sc 900 dev/pci/if_vge.c bus_dmamap_sync(sc->sc_dmat,
sc 901 dev/pci/if_vge.c sc->vge_ldata.vge_tx_list_map, 0,
sc 902 dev/pci/if_vge.c sc->vge_ldata.vge_tx_list_map->dm_mapsize,
sc 904 dev/pci/if_vge.c sc->vge_ldata.vge_tx_prodidx = 0;
sc 905 dev/pci/if_vge.c sc->vge_ldata.vge_tx_considx = 0;
sc 906 dev/pci/if_vge.c sc->vge_ldata.vge_tx_free = VGE_TX_DESC_CNT;
sc 914 dev/pci/if_vge.c vge_rx_list_init(struct vge_softc *sc)
sc 918 dev/pci/if_vge.c bzero ((char *)sc->vge_ldata.vge_rx_list, VGE_RX_LIST_SZ);
sc 919 dev/pci/if_vge.c bzero ((char *)&sc->vge_ldata.vge_rx_mbuf,
sc 922 dev/pci/if_vge.c sc->vge_rx_consumed = 0;
sc 925 dev/pci/if_vge.c if (vge_newbuf(sc, i, NULL) == ENOBUFS)
sc 931 dev/pci/if_vge.c bus_dmamap_sync(sc->sc_dmat,
sc 932 dev/pci/if_vge.c sc->vge_ldata.vge_rx_list_map,
sc 933 dev/pci/if_vge.c 0, sc->vge_ldata.vge_rx_list_map->dm_mapsize,
sc 936 dev/pci/if_vge.c sc->vge_ldata.vge_rx_prodidx = 0;
sc 937 dev/pci/if_vge.c sc->vge_rx_consumed = 0;
sc 938 dev/pci/if_vge.c sc->vge_head = sc->vge_tail = NULL;
sc 948 dev/pci/if_vge.c vge_rxeof(struct vge_softc *sc)
sc 957 dev/pci/if_vge.c ifp = &sc->arpcom.ac_if;
sc 958 dev/pci/if_vge.c i = sc->vge_ldata.vge_rx_prodidx;
sc 962 dev/pci/if_vge.c bus_dmamap_sync(sc->sc_dmat,
sc 963 dev/pci/if_vge.c sc->vge_ldata.vge_rx_list_map,
sc 964 dev/pci/if_vge.c 0, sc->vge_ldata.vge_rx_list_map->dm_mapsize,
sc 967 dev/pci/if_vge.c while (!VGE_OWN(&sc->vge_ldata.vge_rx_list[i])) {
sc 970 dev/pci/if_vge.c cur_rx = &sc->vge_ldata.vge_rx_list[i];
sc 971 dev/pci/if_vge.c m = sc->vge_ldata.vge_rx_mbuf[i];
sc 978 dev/pci/if_vge.c bus_dmamap_sync(sc->sc_dmat,
sc 979 dev/pci/if_vge.c sc->vge_ldata.vge_rx_dmamap[i],
sc 980 dev/pci/if_vge.c 0, sc->vge_ldata.vge_rx_dmamap[i]->dm_mapsize,
sc 982 dev/pci/if_vge.c bus_dmamap_unload(sc->sc_dmat,
sc 983 dev/pci/if_vge.c sc->vge_ldata.vge_rx_dmamap[i]);
sc 994 dev/pci/if_vge.c if (sc->vge_head == NULL)
sc 995 dev/pci/if_vge.c sc->vge_head = sc->vge_tail = m;
sc 998 dev/pci/if_vge.c sc->vge_tail->m_next = m;
sc 999 dev/pci/if_vge.c sc->vge_tail = m;
sc 1001 dev/pci/if_vge.c vge_newbuf(sc, i, NULL);
sc 1022 dev/pci/if_vge.c if (sc->vge_head != NULL) {
sc 1023 dev/pci/if_vge.c m_freem(sc->vge_head);
sc 1024 dev/pci/if_vge.c sc->vge_head = sc->vge_tail = NULL;
sc 1026 dev/pci/if_vge.c vge_newbuf(sc, i, m);
sc 1036 dev/pci/if_vge.c if (vge_newbuf(sc, i, NULL) == ENOBUFS) {
sc 1037 dev/pci/if_vge.c if (sc->vge_head != NULL) {
sc 1038 dev/pci/if_vge.c m_freem(sc->vge_head);
sc 1039 dev/pci/if_vge.c sc->vge_head = sc->vge_tail = NULL;
sc 1045 dev/pci/if_vge.c vge_newbuf(sc, i, m);
sc 1059 dev/pci/if_vge.c if (sc->vge_head != NULL) {
sc 1068 dev/pci/if_vge.c sc->vge_tail->m_len -=
sc 1074 dev/pci/if_vge.c sc->vge_tail->m_next = m;
sc 1076 dev/pci/if_vge.c m = sc->vge_head;
sc 1077 dev/pci/if_vge.c sc->vge_head = sc->vge_tail = NULL;
sc 1115 dev/pci/if_vge.c bus_dmamap_sync(sc->sc_dmat,
sc 1116 dev/pci/if_vge.c sc->vge_ldata.vge_rx_list_map,
sc 1117 dev/pci/if_vge.c 0, sc->vge_ldata.vge_rx_list_map->dm_mapsize,
sc 1120 dev/pci/if_vge.c sc->vge_ldata.vge_rx_prodidx = i;
sc 1121 dev/pci/if_vge.c CSR_WRITE_2(sc, VGE_RXDESC_RESIDUECNT, lim);
sc 1125 dev/pci/if_vge.c vge_txeof(struct vge_softc *sc)
sc 1131 dev/pci/if_vge.c ifp = &sc->arpcom.ac_if;
sc 1132 dev/pci/if_vge.c idx = sc->vge_ldata.vge_tx_considx;
sc 1136 dev/pci/if_vge.c bus_dmamap_sync(sc->sc_dmat,
sc 1137 dev/pci/if_vge.c sc->vge_ldata.vge_tx_list_map,
sc 1138 dev/pci/if_vge.c 0, sc->vge_ldata.vge_tx_list_map->dm_mapsize,
sc 1142 dev/pci/if_vge.c while (idx != sc->vge_ldata.vge_tx_prodidx) {
sc 1143 dev/pci/if_vge.c txstat = letoh32(sc->vge_ldata.vge_tx_list[idx].vge_sts);
sc 1147 dev/pci/if_vge.c m_freem(sc->vge_ldata.vge_tx_mbuf[idx]);
sc 1148 dev/pci/if_vge.c sc->vge_ldata.vge_tx_mbuf[idx] = NULL;
sc 1149 dev/pci/if_vge.c bus_dmamap_unload(sc->sc_dmat,
sc 1150 dev/pci/if_vge.c sc->vge_ldata.vge_tx_dmamap[idx]);
sc 1158 dev/pci/if_vge.c sc->vge_ldata.vge_tx_free++;
sc 1164 dev/pci/if_vge.c if (idx != sc->vge_ldata.vge_tx_considx) {
sc 1165 dev/pci/if_vge.c sc->vge_ldata.vge_tx_considx = idx;
sc 1176 dev/pci/if_vge.c if (sc->vge_ldata.vge_tx_free != VGE_TX_DESC_CNT)
sc 1177 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CRS1, VGE_CR1_TIMER0_ENABLE);
sc 1183 dev/pci/if_vge.c struct vge_softc *sc = xsc;
sc 1184 dev/pci/if_vge.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 1185 dev/pci/if_vge.c struct mii_data *mii = &sc->sc_mii;
sc 1192 dev/pci/if_vge.c if (sc->vge_link) {
sc 1194 dev/pci/if_vge.c sc->vge_link = 0;
sc 1201 dev/pci/if_vge.c sc->vge_link = 1;
sc 1213 dev/pci/if_vge.c timeout_add(&sc->timer_handle, hz);
sc 1220 dev/pci/if_vge.c struct vge_softc *sc = arg;
sc 1225 dev/pci/if_vge.c ifp = &sc->arpcom.ac_if;
sc 1231 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CRC3, VGE_CR3_INT_GMSK);
sc 1234 dev/pci/if_vge.c status = CSR_READ_4(sc, VGE_ISR);
sc 1242 dev/pci/if_vge.c CSR_WRITE_4(sc, VGE_ISR, status);
sc 1251 dev/pci/if_vge.c vge_rxeof(sc);
sc 1255 dev/pci/if_vge.c vge_rxeof(sc);
sc 1256 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_RXQCSRS, VGE_RXQCSR_RUN);
sc 1257 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_RXQCSRS, VGE_RXQCSR_WAK);
sc 1261 dev/pci/if_vge.c vge_txeof(sc);
sc 1269 dev/pci/if_vge.c timeout_del(&sc->timer_handle);
sc 1270 dev/pci/if_vge.c vge_tick(sc);
sc 1275 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CRS3, VGE_CR3_INT_GMSK);
sc 1288 dev/pci/if_vge.c vge_encap(struct vge_softc *sc, struct mbuf *m_head, int idx)
sc 1290 dev/pci/if_vge.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 1314 dev/pci/if_vge.c txmap = sc->vge_ldata.vge_tx_dmamap[idx];
sc 1316 dev/pci/if_vge.c error = bus_dmamap_load_mbuf(sc->sc_dmat, txmap,
sc 1320 dev/pci/if_vge.c sc->vge_dev.dv_xname, error);
sc 1324 dev/pci/if_vge.c d = &sc->vge_ldata.vge_tx_list[idx];
sc 1378 dev/pci/if_vge.c bus_dmamap_sync(sc->sc_dmat, txmap, 0, txmap->dm_mapsize,
sc 1387 dev/pci/if_vge.c sc->vge_ldata.vge_tx_dmamap[idx] = txmap;
sc 1388 dev/pci/if_vge.c sc->vge_ldata.vge_tx_mbuf[idx] = m_head;
sc 1389 dev/pci/if_vge.c sc->vge_ldata.vge_tx_free--;
sc 1390 dev/pci/if_vge.c sc->vge_ldata.vge_tx_list[idx].vge_sts |= htole32(VGE_TDSTS_OWN);
sc 1397 dev/pci/if_vge.c sc->vge_ldata.vge_tx_list[idx].vge_ctl |=
sc 1416 dev/pci/if_vge.c struct vge_softc *sc;
sc 1420 dev/pci/if_vge.c sc = ifp->if_softc;
sc 1422 dev/pci/if_vge.c if (!sc->vge_link || ifp->if_flags & IFF_OACTIVE)
sc 1428 dev/pci/if_vge.c idx = sc->vge_ldata.vge_tx_prodidx;
sc 1434 dev/pci/if_vge.c while (sc->vge_ldata.vge_tx_mbuf[idx] == NULL) {
sc 1448 dev/pci/if_vge.c if (vge_encap(sc, m_head, idx)) {
sc 1453 dev/pci/if_vge.c sc->vge_ldata.vge_tx_list[pidx].vge_frag[0].vge_buflen |=
sc 1460 dev/pci/if_vge.c if (idx == sc->vge_ldata.vge_tx_prodidx) {
sc 1466 dev/pci/if_vge.c bus_dmamap_sync(sc->sc_dmat,
sc 1467 dev/pci/if_vge.c sc->vge_ldata.vge_tx_list_map,
sc 1468 dev/pci/if_vge.c 0, sc->vge_ldata.vge_tx_list_map->dm_mapsize,
sc 1472 dev/pci/if_vge.c CSR_WRITE_2(sc, VGE_TXQCSRS, VGE_TXQCSR_WAK0);
sc 1474 dev/pci/if_vge.c sc->vge_ldata.vge_tx_prodidx = idx;
sc 1485 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CRS1, VGE_CR1_TIMER0_ENABLE);
sc 1496 dev/pci/if_vge.c struct vge_softc *sc = ifp->if_softc;
sc 1502 dev/pci/if_vge.c vge_stop(sc);
sc 1503 dev/pci/if_vge.c vge_reset(sc);
sc 1506 dev/pci/if_vge.c if (vge_rx_list_init(sc) == ENOBUFS) {
sc 1508 dev/pci/if_vge.c sc->vge_dev.dv_xname);
sc 1509 dev/pci/if_vge.c vge_stop(sc);
sc 1513 dev/pci/if_vge.c if (vge_tx_list_init(sc) == ENOBUFS) {
sc 1515 dev/pci/if_vge.c sc->vge_dev.dv_xname);
sc 1516 dev/pci/if_vge.c vge_stop(sc);
sc 1522 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_PAR0 + i, sc->arpcom.ac_enaddr[i]);
sc 1528 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_RXCFG, VGE_RXCFG_FIFO_THR|VGE_RXCFG_VTAGOPT);
sc 1529 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_RXCFG, VGE_RXFIFOTHR_128BYTES|VGE_VTAG_OPT2);
sc 1532 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_DMACFG0, VGE_DMACFG0_BURSTLEN);
sc 1533 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_DMACFG0, VGE_DMABURST_128);
sc 1535 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_TXCFG, VGE_TXCFG_ARB_PRIO|VGE_TXCFG_NONBLK);
sc 1538 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_CHIPCFG1, VGE_CHIPCFG1_CRANDOM|
sc 1540 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_CHIPCFG1, VGE_CHIPCFG1_OFSET);
sc 1543 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_DIAGCTL, VGE_DIAGCTL_LPSEL_DIS);
sc 1550 dev/pci/if_vge.c CSR_WRITE_4(sc, VGE_TXDESC_ADDR_LO0,
sc 1551 dev/pci/if_vge.c VGE_ADDR_LO(sc->vge_ldata.vge_tx_listseg.ds_addr));
sc 1552 dev/pci/if_vge.c CSR_WRITE_2(sc, VGE_TXDESCNUM, VGE_TX_DESC_CNT - 1);
sc 1554 dev/pci/if_vge.c CSR_WRITE_4(sc, VGE_RXDESC_ADDR_LO,
sc 1555 dev/pci/if_vge.c VGE_ADDR_LO(sc->vge_ldata.vge_rx_listseg.ds_addr));
sc 1556 dev/pci/if_vge.c CSR_WRITE_2(sc, VGE_RXDESCNUM, VGE_RX_DESC_CNT - 1);
sc 1557 dev/pci/if_vge.c CSR_WRITE_2(sc, VGE_RXDESC_RESIDUECNT, VGE_RX_DESC_CNT);
sc 1560 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_RXQCSRS, VGE_RXQCSR_RUN);
sc 1561 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_RXQCSRS, VGE_RXQCSR_WAK);
sc 1564 dev/pci/if_vge.c CSR_WRITE_2(sc, VGE_TXQCSRS, VGE_TXQCSR_RUN0);
sc 1567 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_RXCTL, VGE_RXCTL_RX_UCAST|VGE_RXCTL_RX_GIANT);
sc 1571 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_RXCTL, VGE_RXCTL_RX_PROMISC);
sc 1576 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_RXCTL, VGE_RXCTL_RX_BCAST);
sc 1581 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_RXCTL, VGE_RXCTL_RX_MCAST);
sc 1585 dev/pci/if_vge.c vge_cam_clear(sc);
sc 1588 dev/pci/if_vge.c vge_setmulti(sc);
sc 1592 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CRS2, 0x8B);
sc 1597 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CRC0, VGE_CR0_STOP);
sc 1598 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CRS1, VGE_CR1_NOPOLL);
sc 1599 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CRS0,
sc 1606 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_DIAGCTL, VGE_DIAGCTL_TIMER0_RES);
sc 1607 dev/pci/if_vge.c CSR_WRITE_2(sc, VGE_SSTIMER, 400);
sc 1618 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_INTCTL1, VGE_INTCTL_TXINTSUP_DISABLE);
sc 1620 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_CAMCTL, VGE_CAMCTL_PAGESEL);
sc 1621 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_CAMCTL, VGE_PAGESEL_INTHLDOFF);
sc 1622 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_INTHOLDOFF, 10); /* ~200 usecs */
sc 1625 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CRS3, VGE_CR3_INT_HOLDOFF);
sc 1626 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_INTCTL1, VGE_INTCTL_SC_RELOAD);
sc 1629 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_CAMCTL, VGE_CAMCTL_PAGESEL);
sc 1630 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_CAMCTL, VGE_PAGESEL_RXSUPPTHR);
sc 1631 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_RXSUPPTHR, 64); /* interrupt after 64 packets */
sc 1634 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_CAMCTL, VGE_CAMCTL_PAGESEL);
sc 1635 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_CAMCTL, VGE_PAGESEL_MAR);
sc 1641 dev/pci/if_vge.c CSR_WRITE_4(sc, VGE_IMR, VGE_INTRS);
sc 1642 dev/pci/if_vge.c CSR_WRITE_4(sc, VGE_ISR, 0);
sc 1643 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CRS3, VGE_CR3_INT_GMSK);
sc 1646 dev/pci/if_vge.c mii_mediachg(&sc->sc_mii);
sc 1651 dev/pci/if_vge.c sc->vge_if_flags = 0;
sc 1652 dev/pci/if_vge.c sc->vge_link = 0;
sc 1654 dev/pci/if_vge.c if (!timeout_pending(&sc->timer_handle))
sc 1655 dev/pci/if_vge.c timeout_add(&sc->timer_handle, hz);
sc 1666 dev/pci/if_vge.c struct vge_softc *sc = ifp->if_softc;
sc 1668 dev/pci/if_vge.c return (mii_mediachg(&sc->sc_mii));
sc 1677 dev/pci/if_vge.c struct vge_softc *sc = ifp->if_softc;
sc 1679 dev/pci/if_vge.c mii_pollstat(&sc->sc_mii);
sc 1680 dev/pci/if_vge.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 1681 dev/pci/if_vge.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 1687 dev/pci/if_vge.c struct vge_softc *sc = (struct vge_softc *)dev;
sc 1691 dev/pci/if_vge.c mii = &sc->sc_mii;
sc 1707 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_DIAGCTL, VGE_DIAGCTL_MACFORCE);
sc 1708 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_DIAGCTL, VGE_DIAGCTL_FDXFORCE);
sc 1711 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_DIAGCTL, VGE_DIAGCTL_MACFORCE);
sc 1712 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_DIAGCTL, VGE_DIAGCTL_FDXFORCE);
sc 1716 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_DIAGCTL, VGE_DIAGCTL_MACFORCE);
sc 1718 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_DIAGCTL, VGE_DIAGCTL_FDXFORCE);
sc 1720 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_DIAGCTL, VGE_DIAGCTL_FDXFORCE);
sc 1725 dev/pci/if_vge.c sc->vge_dev.dv_xname, IFM_SUBTYPE(ife->ifm_media));
sc 1733 dev/pci/if_vge.c struct vge_softc *sc = ifp->if_softc;
sc 1740 dev/pci/if_vge.c if ((error = ether_ioctl(ifp, &sc->arpcom, command, data)) > 0) {
sc 1752 dev/pci/if_vge.c arp_ifinit(&sc->arpcom, ifa);
sc 1770 dev/pci/if_vge.c !(sc->vge_if_flags & IFF_PROMISC)) {
sc 1771 dev/pci/if_vge.c CSR_SETBIT_1(sc, VGE_RXCTL,
sc 1773 dev/pci/if_vge.c vge_setmulti(sc);
sc 1776 dev/pci/if_vge.c sc->vge_if_flags & IFF_PROMISC) {
sc 1777 dev/pci/if_vge.c CSR_CLRBIT_1(sc, VGE_RXCTL,
sc 1779 dev/pci/if_vge.c vge_setmulti(sc);
sc 1784 dev/pci/if_vge.c vge_stop(sc);
sc 1786 dev/pci/if_vge.c sc->vge_if_flags = ifp->if_flags;
sc 1791 dev/pci/if_vge.c ether_addmulti(ifr, &sc->arpcom) :
sc 1792 dev/pci/if_vge.c ether_delmulti(ifr, &sc->arpcom);
sc 1796 dev/pci/if_vge.c vge_setmulti(sc);
sc 1802 dev/pci/if_vge.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, command);
sc 1816 dev/pci/if_vge.c struct vge_softc *sc = ifp->if_softc;
sc 1820 dev/pci/if_vge.c printf("%s: watchdog timeout\n", sc->vge_dev.dv_xname);
sc 1823 dev/pci/if_vge.c vge_txeof(sc);
sc 1824 dev/pci/if_vge.c vge_rxeof(sc);
sc 1836 dev/pci/if_vge.c vge_stop(struct vge_softc *sc)
sc 1841 dev/pci/if_vge.c ifp = &sc->arpcom.ac_if;
sc 1843 dev/pci/if_vge.c if (timeout_pending(&sc->timer_handle))
sc 1844 dev/pci/if_vge.c timeout_del(&sc->timer_handle);
sc 1848 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CRC3, VGE_CR3_INT_GMSK);
sc 1849 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_CRS0, VGE_CR0_STOP);
sc 1850 dev/pci/if_vge.c CSR_WRITE_4(sc, VGE_ISR, 0xFFFFFFFF);
sc 1851 dev/pci/if_vge.c CSR_WRITE_2(sc, VGE_TXQCSRC, 0xFFFF);
sc 1852 dev/pci/if_vge.c CSR_WRITE_1(sc, VGE_RXQCSRC, 0xFF);
sc 1853 dev/pci/if_vge.c CSR_WRITE_4(sc, VGE_RXDESC_ADDR_LO, 0);
sc 1855 dev/pci/if_vge.c if (sc->vge_head != NULL) {
sc 1856 dev/pci/if_vge.c m_freem(sc->vge_head);
sc 1857 dev/pci/if_vge.c sc->vge_head = sc->vge_tail = NULL;
sc 1862 dev/pci/if_vge.c if (sc->vge_ldata.vge_tx_mbuf[i] != NULL) {
sc 1863 dev/pci/if_vge.c bus_dmamap_unload(sc->sc_dmat,
sc 1864 dev/pci/if_vge.c sc->vge_ldata.vge_tx_dmamap[i]);
sc 1865 dev/pci/if_vge.c m_freem(sc->vge_ldata.vge_tx_mbuf[i]);
sc 1866 dev/pci/if_vge.c sc->vge_ldata.vge_tx_mbuf[i] = NULL;
sc 1872 dev/pci/if_vge.c if (sc->vge_ldata.vge_rx_mbuf[i] != NULL) {
sc 1873 dev/pci/if_vge.c bus_dmamap_unload(sc->sc_dmat,
sc 1874 dev/pci/if_vge.c sc->vge_ldata.vge_rx_dmamap[i]);
sc 1875 dev/pci/if_vge.c m_freem(sc->vge_ldata.vge_rx_mbuf[i]);
sc 1876 dev/pci/if_vge.c sc->vge_ldata.vge_rx_mbuf[i] = NULL;
sc 98 dev/pci/if_vgevar.h #define CSR_WRITE_4(sc, reg, val) \
sc 99 dev/pci/if_vgevar.h bus_space_write_4(sc->vge_btag, sc->vge_bhandle, reg, val)
sc 100 dev/pci/if_vgevar.h #define CSR_WRITE_2(sc, reg, val) \
sc 101 dev/pci/if_vgevar.h bus_space_write_2(sc->vge_btag, sc->vge_bhandle, reg, val)
sc 102 dev/pci/if_vgevar.h #define CSR_WRITE_1(sc, reg, val) \
sc 103 dev/pci/if_vgevar.h bus_space_write_1(sc->vge_btag, sc->vge_bhandle, reg, val)
sc 105 dev/pci/if_vgevar.h #define CSR_READ_4(sc, reg) \
sc 106 dev/pci/if_vgevar.h bus_space_read_4(sc->vge_btag, sc->vge_bhandle, reg)
sc 107 dev/pci/if_vgevar.h #define CSR_READ_2(sc, reg) \
sc 108 dev/pci/if_vgevar.h bus_space_read_2(sc->vge_btag, sc->vge_bhandle, reg)
sc 109 dev/pci/if_vgevar.h #define CSR_READ_1(sc, reg) \
sc 110 dev/pci/if_vgevar.h bus_space_read_1(sc->vge_btag, sc->vge_bhandle, reg)
sc 112 dev/pci/if_vgevar.h #define CSR_SETBIT_1(sc, reg, x) \
sc 113 dev/pci/if_vgevar.h CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) | (x))
sc 114 dev/pci/if_vgevar.h #define CSR_SETBIT_2(sc, reg, x) \
sc 115 dev/pci/if_vgevar.h CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x))
sc 116 dev/pci/if_vgevar.h #define CSR_SETBIT_4(sc, reg, x) \
sc 117 dev/pci/if_vgevar.h CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) | (x))
sc 119 dev/pci/if_vgevar.h #define CSR_CLRBIT_1(sc, reg, x) \
sc 120 dev/pci/if_vgevar.h CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) & ~(x))
sc 121 dev/pci/if_vgevar.h #define CSR_CLRBIT_2(sc, reg, x) \
sc 122 dev/pci/if_vgevar.h CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x))
sc 123 dev/pci/if_vgevar.h #define CSR_CLRBIT_4(sc, reg, x) \
sc 124 dev/pci/if_vgevar.h CSR_WRITE_4(sc, reg, CSR_READ_4(sc, reg) & ~(x))
sc 310 dev/pci/if_vic.c int vic_init_data(struct vic_softc *sc);
sc 311 dev/pci/if_vic.c int vic_uninit_data(struct vic_softc *sc);
sc 356 dev/pci/if_vic.c struct vic_softc *sc = (struct vic_softc *)self;
sc 360 dev/pci/if_vic.c if (vic_map_pci(sc, pa) != 0) {
sc 365 dev/pci/if_vic.c if (vic_query(sc) != 0) {
sc 370 dev/pci/if_vic.c if (vic_alloc_data(sc) != 0) {
sc 375 dev/pci/if_vic.c timeout_set(&sc->sc_tick, vic_tick, sc);
sc 377 dev/pci/if_vic.c bcopy(sc->sc_lladdr, sc->sc_ac.ac_enaddr, ETHER_ADDR_LEN);
sc 379 dev/pci/if_vic.c ifp = &sc->sc_ac.ac_if;
sc 380 dev/pci/if_vic.c ifp->if_softc = sc;
sc 386 dev/pci/if_vic.c strlcpy(ifp->if_xname, DEVNAME(sc), IFNAMSIZ);
sc 387 dev/pci/if_vic.c IFQ_SET_MAXLEN(&ifp->if_snd, sc->sc_ntxbuf - 1);
sc 394 dev/pci/if_vic.c if (sc->sc_cap & VIC_CMD_HWCAP_VLAN)
sc 396 dev/pci/if_vic.c if (sc->sc_cap & VIC_CMD_HWCAP_CSUM)
sc 401 dev/pci/if_vic.c ifmedia_init(&sc->sc_media, 0, vic_media_change, vic_media_status);
sc 402 dev/pci/if_vic.c ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_AUTO, 0, NULL);
sc 403 dev/pci/if_vic.c ifmedia_set(&sc->sc_media, IFM_ETHER | IFM_AUTO);
sc 412 dev/pci/if_vic.c vic_map_pci(struct vic_softc *sc, struct pci_attach_args *pa)
sc 418 dev/pci/if_vic.c sc->sc_pc = pa->pa_pc;
sc 419 dev/pci/if_vic.c sc->sc_tag = pa->pa_tag;
sc 420 dev/pci/if_vic.c sc->sc_dmat = pa->pa_dmat;
sc 422 dev/pci/if_vic.c memtype = pci_mapreg_type(sc->sc_pc, sc->sc_tag, VIC_PCI_BAR);
sc 423 dev/pci/if_vic.c if (pci_mapreg_map(pa, VIC_PCI_BAR, memtype, 0, &sc->sc_iot,
sc 424 dev/pci/if_vic.c &sc->sc_ioh, NULL, &sc->sc_ios, 0) != 0) {
sc 435 dev/pci/if_vic.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_NET,
sc 436 dev/pci/if_vic.c vic_intr, sc, DEVNAME(sc));
sc 437 dev/pci/if_vic.c if (sc->sc_ih == NULL) {
sc 448 dev/pci/if_vic.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 449 dev/pci/if_vic.c sc->sc_ios = 0;
sc 454 dev/pci/if_vic.c vic_query(struct vic_softc *sc)
sc 458 dev/pci/if_vic.c major = vic_read(sc, VIC_VERSION_MAJOR);
sc 459 dev/pci/if_vic.c minor = vic_read(sc, VIC_VERSION_MINOR);
sc 464 dev/pci/if_vic.c printf("%s: magic mismatch\n", DEVNAME(sc));
sc 469 dev/pci/if_vic.c printf("%s: unsupported version (%X)\n", DEVNAME(sc),
sc 474 dev/pci/if_vic.c sc->sc_nrxbuf = vic_read_cmd(sc, VIC_CMD_NUM_Rx_BUF);
sc 475 dev/pci/if_vic.c sc->sc_ntxbuf = vic_read_cmd(sc, VIC_CMD_NUM_Tx_BUF);
sc 476 dev/pci/if_vic.c sc->sc_feature = vic_read_cmd(sc, VIC_CMD_FEATURE);
sc 477 dev/pci/if_vic.c sc->sc_cap = vic_read_cmd(sc, VIC_CMD_HWCAP);
sc 479 dev/pci/if_vic.c vic_getlladdr(sc);
sc 481 dev/pci/if_vic.c printf("%s: VMXnet %04X, address %s\n", DEVNAME(sc),
sc 482 dev/pci/if_vic.c major & ~VIC_VERSION_MAJOR_M, ether_sprintf(sc->sc_lladdr));
sc 485 dev/pci/if_vic.c printf("%s: feature 0x%8x, cap 0x%8x, rx/txbuf %d/%d\n", DEVNAME(sc),
sc 486 dev/pci/if_vic.c sc->sc_feature, sc->sc_cap, sc->sc_nrxbuf, sc->sc_ntxbuf);
sc 489 dev/pci/if_vic.c if (sc->sc_nrxbuf > VIC_NBUF_MAX || sc->sc_nrxbuf == 0)
sc 490 dev/pci/if_vic.c sc->sc_nrxbuf = VIC_NBUF;
sc 491 dev/pci/if_vic.c if (sc->sc_ntxbuf > VIC_NBUF_MAX || sc->sc_ntxbuf == 0)
sc 492 dev/pci/if_vic.c sc->sc_ntxbuf = VIC_NBUF;
sc 498 dev/pci/if_vic.c vic_alloc_data(struct vic_softc *sc)
sc 505 dev/pci/if_vic.c sc->sc_rxbuf = malloc(sizeof(struct vic_rxbuf) * sc->sc_nrxbuf,
sc 507 dev/pci/if_vic.c if (sc->sc_rxbuf == NULL) {
sc 508 dev/pci/if_vic.c printf("%s: unable to allocate rxbuf\n", DEVNAME(sc));
sc 512 dev/pci/if_vic.c sc->sc_txbuf = malloc(sizeof(struct vic_txbuf) * sc->sc_ntxbuf,
sc 514 dev/pci/if_vic.c if (sc->sc_txbuf == NULL) {
sc 515 dev/pci/if_vic.c printf("%s: unable to allocate txbuf\n", DEVNAME(sc));
sc 519 dev/pci/if_vic.c sc->sc_dma_size = sizeof(struct vic_data) +
sc 520 dev/pci/if_vic.c (sc->sc_nrxbuf + VIC_QUEUE2_SIZE) * sizeof(struct vic_rxdesc) +
sc 521 dev/pci/if_vic.c sc->sc_ntxbuf * sizeof(struct vic_txdesc);
sc 523 dev/pci/if_vic.c if (vic_alloc_dmamem(sc) != 0) {
sc 524 dev/pci/if_vic.c printf("%s: unable to allocate dma region\n", DEVNAME(sc));
sc 527 dev/pci/if_vic.c kva = VIC_DMA_KVA(sc);
sc 530 dev/pci/if_vic.c sc->sc_data = VIC_DMA_KVA(sc);
sc 532 dev/pci/if_vic.c sc->sc_data->vd_magic = VIC_MAGIC;
sc 533 dev/pci/if_vic.c sc->sc_data->vd_length = sc->sc_dma_size;
sc 538 dev/pci/if_vic.c sc->sc_rxq = (struct vic_rxdesc *)&kva[offset];
sc 540 dev/pci/if_vic.c sc->sc_data->vd_rx_offset = offset;
sc 541 dev/pci/if_vic.c sc->sc_data->vd_rx_length = sc->sc_nrxbuf;
sc 543 dev/pci/if_vic.c offset += sizeof(struct vic_rxdesc) * sc->sc_nrxbuf;
sc 546 dev/pci/if_vic.c sc->sc_rxq2 = (struct vic_rxdesc *)&kva[offset];
sc 548 dev/pci/if_vic.c sc->sc_data->vd_rx_offset2 = offset;
sc 549 dev/pci/if_vic.c sc->sc_data->vd_rx_length2 = VIC_QUEUE2_SIZE;
sc 552 dev/pci/if_vic.c rxd = &sc->sc_rxq2[i];
sc 563 dev/pci/if_vic.c sc->sc_txq = (struct vic_txdesc *)&kva[offset];
sc 565 dev/pci/if_vic.c sc->sc_data->vd_tx_offset = offset;
sc 566 dev/pci/if_vic.c sc->sc_data->vd_tx_length = sc->sc_ntxbuf;
sc 570 dev/pci/if_vic.c free(sc->sc_txbuf, M_DEVBUF);
sc 572 dev/pci/if_vic.c free(sc->sc_rxbuf, M_DEVBUF);
sc 578 dev/pci/if_vic.c vic_init_data(struct vic_softc *sc)
sc 586 dev/pci/if_vic.c for (i = 0; i < sc->sc_nrxbuf; i++) {
sc 587 dev/pci/if_vic.c rxb = &sc->sc_rxbuf[i];
sc 588 dev/pci/if_vic.c rxd = &sc->sc_rxq[i];
sc 590 dev/pci/if_vic.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 593 dev/pci/if_vic.c DEVNAME(sc), i);
sc 597 dev/pci/if_vic.c rxb->rxb_m = vic_alloc_mbuf(sc, rxb->rxb_dmamap);
sc 600 dev/pci/if_vic.c bus_dmamap_destroy(sc->sc_dmat, rxb->rxb_dmamap);
sc 604 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, rxb->rxb_dmamap, 0,
sc 613 dev/pci/if_vic.c for (i = 0; i < sc->sc_ntxbuf; i++) {
sc 614 dev/pci/if_vic.c txb = &sc->sc_txbuf[i];
sc 615 dev/pci/if_vic.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 616 dev/pci/if_vic.c (sc->sc_cap & VIC_CMD_HWCAP_SG) ? VIC_SG_MAX : 1,
sc 619 dev/pci/if_vic.c DEVNAME(sc), i);
sc 629 dev/pci/if_vic.c txb = &sc->sc_txbuf[i];
sc 630 dev/pci/if_vic.c bus_dmamap_destroy(sc->sc_dmat, txb->txb_dmamap);
sc 633 dev/pci/if_vic.c i = sc->sc_nrxbuf;
sc 636 dev/pci/if_vic.c rxb = &sc->sc_rxbuf[i];
sc 637 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, rxb->rxb_dmamap, 0,
sc 639 dev/pci/if_vic.c bus_dmamap_unload(sc->sc_dmat, rxb->rxb_dmamap);
sc 640 dev/pci/if_vic.c bus_dmamap_destroy(sc->sc_dmat, rxb->rxb_dmamap);
sc 647 dev/pci/if_vic.c vic_uninit_data(struct vic_softc *sc)
sc 655 dev/pci/if_vic.c for (i = 0; i < sc->sc_nrxbuf; i++) {
sc 656 dev/pci/if_vic.c rxb = &sc->sc_rxbuf[i];
sc 657 dev/pci/if_vic.c rxd = &sc->sc_rxq[i];
sc 659 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, rxb->rxb_dmamap, 0,
sc 661 dev/pci/if_vic.c bus_dmamap_unload(sc->sc_dmat, rxb->rxb_dmamap);
sc 662 dev/pci/if_vic.c bus_dmamap_destroy(sc->sc_dmat, rxb->rxb_dmamap);
sc 668 dev/pci/if_vic.c for (i = 0; i < sc->sc_ntxbuf; i++) {
sc 669 dev/pci/if_vic.c txb = &sc->sc_txbuf[i];
sc 670 dev/pci/if_vic.c bus_dmamap_destroy(sc->sc_dmat, txb->txb_dmamap);
sc 677 dev/pci/if_vic.c vic_link_state(struct vic_softc *sc)
sc 679 dev/pci/if_vic.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 683 dev/pci/if_vic.c status = vic_read(sc, VIC_STATUS);
sc 695 dev/pci/if_vic.c struct vic_softc *sc = (struct vic_softc *)self;
sc 697 dev/pci/if_vic.c vic_stop(&sc->sc_ac.ac_if);
sc 703 dev/pci/if_vic.c struct vic_softc *sc = (struct vic_softc *)arg;
sc 705 dev/pci/if_vic.c vic_rx_proc(sc);
sc 706 dev/pci/if_vic.c vic_tx_proc(sc);
sc 708 dev/pci/if_vic.c vic_write(sc, VIC_CMD, VIC_CMD_INTR_ACK);
sc 714 dev/pci/if_vic.c vic_rx_proc(struct vic_softc *sc)
sc 716 dev/pci/if_vic.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 725 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dma_map, 0, sc->sc_dma_size,
sc 729 dev/pci/if_vic.c idx = sc->sc_data->vd_rx_nextidx;
sc 730 dev/pci/if_vic.c if (idx >= sc->sc_data->vd_rx_length) {
sc 734 dev/pci/if_vic.c sc->sc_dev.dv_xname);
sc 738 dev/pci/if_vic.c rxd = &sc->sc_rxq[idx];
sc 742 dev/pci/if_vic.c rxb = &sc->sc_rxbuf[idx];
sc 752 dev/pci/if_vic.c printf("%s: rxb %d has no mbuf\n", DEVNAME(sc), idx);
sc 756 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, rxb->rxb_dmamap, 0,
sc 758 dev/pci/if_vic.c bus_dmamap_unload(sc->sc_dmat, rxb->rxb_dmamap);
sc 766 dev/pci/if_vic.c rxb->rxb_m = vic_alloc_mbuf(sc, rxb->rxb_dmamap);
sc 769 dev/pci/if_vic.c printf("%s: mbuf alloc failed\n", DEVNAME(sc));
sc 772 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, rxb->rxb_dmamap, 0,
sc 791 dev/pci/if_vic.c VIC_INC(sc->sc_data->vd_rx_nextidx, sc->sc_data->vd_rx_length);
sc 794 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dma_map, 0, sc->sc_dma_size,
sc 799 dev/pci/if_vic.c vic_tx_proc(struct vic_softc *sc)
sc 801 dev/pci/if_vic.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 806 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dma_map, 0, sc->sc_dma_size,
sc 809 dev/pci/if_vic.c while (sc->sc_txpending > 0) {
sc 810 dev/pci/if_vic.c idx = sc->sc_data->vd_tx_curidx;
sc 811 dev/pci/if_vic.c if (idx >= sc->sc_data->vd_tx_length) {
sc 816 dev/pci/if_vic.c txd = &sc->sc_txq[idx];
sc 820 dev/pci/if_vic.c txb = &sc->sc_txbuf[idx];
sc 822 dev/pci/if_vic.c printf("%s: tx ring is corrupt\n", DEVNAME(sc));
sc 827 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, txb->txb_dmamap, 0,
sc 829 dev/pci/if_vic.c bus_dmamap_unload(sc->sc_dmat, txb->txb_dmamap);
sc 835 dev/pci/if_vic.c sc->sc_txpending--;
sc 836 dev/pci/if_vic.c sc->sc_data->vd_tx_stopped = 0;
sc 838 dev/pci/if_vic.c VIC_INC(sc->sc_data->vd_tx_curidx, sc->sc_data->vd_tx_length);
sc 841 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dma_map, 0, sc->sc_dma_size,
sc 848 dev/pci/if_vic.c vic_iff(struct vic_softc *sc)
sc 850 dev/pci/if_vic.c struct arpcom *ac = &sc->sc_ac;
sc 851 dev/pci/if_vic.c struct ifnet *ifp = &sc->sc_ac.ac_if;
sc 855 dev/pci/if_vic.c u_int16_t *mcastfil = (u_int16_t *)sc->sc_data->vd_mcastfil;
sc 858 dev/pci/if_vic.c bzero(&sc->sc_data->vd_mcastfil, sizeof(sc->sc_data->vd_mcastfil));
sc 882 dev/pci/if_vic.c memset(&sc->sc_data->vd_mcastfil, 0xff,
sc 883 dev/pci/if_vic.c sizeof(sc->sc_data->vd_mcastfil));
sc 886 dev/pci/if_vic.c vic_write(sc, VIC_CMD, VIC_CMD_MCASTFIL);
sc 893 dev/pci/if_vic.c sc->sc_data->vd_iff = flags;
sc 894 dev/pci/if_vic.c vic_write(sc, VIC_CMD, VIC_CMD_IFF);
sc 898 dev/pci/if_vic.c vic_getlladdr(struct vic_softc *sc)
sc 903 dev/pci/if_vic.c reg = (sc->sc_cap & VIC_CMD_HWCAP_VPROM) ? VIC_VPROM : VIC_LLADDR;
sc 905 dev/pci/if_vic.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, reg, ETHER_ADDR_LEN,
sc 907 dev/pci/if_vic.c bus_space_read_region_1(sc->sc_iot, sc->sc_ioh, reg, sc->sc_lladdr,
sc 912 dev/pci/if_vic.c vic_setlladdr(sc);
sc 916 dev/pci/if_vic.c vic_setlladdr(struct vic_softc *sc)
sc 918 dev/pci/if_vic.c bus_space_write_region_1(sc->sc_iot, sc->sc_ioh, VIC_LLADDR,
sc 919 dev/pci/if_vic.c sc->sc_lladdr, ETHER_ADDR_LEN);
sc 920 dev/pci/if_vic.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, VIC_LLADDR, ETHER_ADDR_LEN,
sc 934 dev/pci/if_vic.c struct vic_softc *sc = (struct vic_softc *)ifp->if_softc;
sc 939 dev/pci/if_vic.c vic_link_state(sc);
sc 949 dev/pci/if_vic.c struct vic_softc *sc;
sc 967 dev/pci/if_vic.c sc = (struct vic_softc *)ifp->if_softc;
sc 969 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dma_map, 0, sc->sc_dma_size,
sc 973 dev/pci/if_vic.c if (VIC_TXURN(sc)) {
sc 982 dev/pci/if_vic.c idx = sc->sc_data->vd_tx_nextidx;
sc 983 dev/pci/if_vic.c if (idx >= sc->sc_data->vd_tx_length) {
sc 984 dev/pci/if_vic.c printf("%s: tx idx is corrupt\n", DEVNAME(sc));
sc 989 dev/pci/if_vic.c txd = &sc->sc_txq[idx];
sc 990 dev/pci/if_vic.c txb = &sc->sc_txbuf[idx];
sc 993 dev/pci/if_vic.c printf("%s: tx ring is corrupt\n", DEVNAME(sc));
sc 994 dev/pci/if_vic.c sc->sc_data->vd_tx_stopped = 1;
sc 1004 dev/pci/if_vic.c if (vic_load_txb(sc, txb, m) != 0) {
sc 1027 dev/pci/if_vic.c if (VIC_TXURN_WARN(sc)) {
sc 1031 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, dmap, 0, dmap->dm_mapsize,
sc 1035 dev/pci/if_vic.c sc->sc_txpending++;
sc 1037 dev/pci/if_vic.c VIC_INC(sc->sc_data->vd_tx_nextidx, sc->sc_data->vd_tx_length);
sc 1042 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dma_map, 0, sc->sc_dma_size,
sc 1046 dev/pci/if_vic.c vic_read(sc, VIC_Tx_ADDR);
sc 1050 dev/pci/if_vic.c vic_load_txb(struct vic_softc *sc, struct vic_txbuf *txb, struct mbuf *m)
sc 1056 dev/pci/if_vic.c error = bus_dmamap_load_mbuf(sc->sc_dmat, dmap, m, BUS_DMA_NOWAIT);
sc 1075 dev/pci/if_vic.c error = bus_dmamap_load_mbuf(sc->sc_dmat, dmap, m0,
sc 1079 dev/pci/if_vic.c printf("%s: tx dmamap load error %d\n", DEVNAME(sc),
sc 1088 dev/pci/if_vic.c printf("%s: tx dmamap load error %d\n", DEVNAME(sc), error);
sc 1099 dev/pci/if_vic.c struct vic_softc *sc = (struct vic_softc *)ifp->if_softc;
sc 1101 dev/pci/if_vic.c if (sc->sc_txpending && sc->sc_txtimeout > 0) {
sc 1102 dev/pci/if_vic.c if (--sc->sc_txtimeout == 0) {
sc 1103 dev/pci/if_vic.c printf("%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1119 dev/pci/if_vic.c struct vic_softc *sc = (struct vic_softc *)ifp->if_softc;
sc 1126 dev/pci/if_vic.c if ((error = ether_ioctl(ifp, &sc->sc_ac, cmd, data)) > 0) {
sc 1137 dev/pci/if_vic.c arp_ifinit(&sc->sc_ac, ifa);
sc 1143 dev/pci/if_vic.c vic_iff(sc);
sc 1163 dev/pci/if_vic.c ether_addmulti(ifr, &sc->sc_ac) :
sc 1164 dev/pci/if_vic.c ether_delmulti(ifr, &sc->sc_ac);
sc 1168 dev/pci/if_vic.c vic_iff(sc);
sc 1175 dev/pci/if_vic.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
sc 1198 dev/pci/if_vic.c struct vic_softc *sc = (struct vic_softc *)ifp->if_softc;
sc 1201 dev/pci/if_vic.c if (vic_init_data(sc) != 0)
sc 1204 dev/pci/if_vic.c sc->sc_data->vd_tx_curidx = 0;
sc 1205 dev/pci/if_vic.c sc->sc_data->vd_tx_nextidx = 0;
sc 1206 dev/pci/if_vic.c sc->sc_data->vd_tx_stopped = sc->sc_data->vd_tx_queued = 0;
sc 1208 dev/pci/if_vic.c sc->sc_data->vd_rx_nextidx = 0;
sc 1209 dev/pci/if_vic.c sc->sc_data->vd_rx_nextidx2 = 0;
sc 1211 dev/pci/if_vic.c sc->sc_data->vd_rx_saved_nextidx = 0;
sc 1212 dev/pci/if_vic.c sc->sc_data->vd_rx_saved_nextidx2 = 0;
sc 1213 dev/pci/if_vic.c sc->sc_data->vd_tx_saved_nextidx = 0;
sc 1215 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dma_map, 0, sc->sc_dma_size,
sc 1220 dev/pci/if_vic.c vic_write(sc, VIC_DATA_ADDR, VIC_DMA_DVA(sc));
sc 1221 dev/pci/if_vic.c vic_write(sc, VIC_DATA_LENGTH, sc->sc_dma_size);
sc 1226 dev/pci/if_vic.c vic_iff(sc);
sc 1227 dev/pci/if_vic.c vic_write(sc, VIC_CMD, VIC_CMD_INTR_ENABLE);
sc 1231 dev/pci/if_vic.c timeout_add(&sc->sc_tick, hz);
sc 1237 dev/pci/if_vic.c struct vic_softc *sc = (struct vic_softc *)ifp->if_softc;
sc 1242 dev/pci/if_vic.c timeout_del(&sc->sc_tick);
sc 1246 dev/pci/if_vic.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dma_map, 0, sc->sc_dma_size,
sc 1250 dev/pci/if_vic.c while (sc->sc_txpending > 0) {
sc 1256 dev/pci/if_vic.c sc->sc_data->vd_tx_stopped = 1;
sc 1258 dev/pci/if_vic.c vic_write(sc, VIC_CMD, VIC_CMD_INTR_DISABLE);
sc 1260 dev/pci/if_vic.c vic_iff(sc);
sc 1261 dev/pci/if_vic.c vic_write(sc, VIC_DATA_ADDR, 0);
sc 1263 dev/pci/if_vic.c vic_uninit_data(sc);
sc 1269 dev/pci/if_vic.c vic_alloc_mbuf(struct vic_softc *sc, bus_dmamap_t map)
sc 1284 dev/pci/if_vic.c if (bus_dmamap_load_mbuf(sc->sc_dmat, map, m, BUS_DMA_NOWAIT) != 0) {
sc 1285 dev/pci/if_vic.c printf("%s: could not load mbuf DMA map", DEVNAME(sc));
sc 1296 dev/pci/if_vic.c struct vic_softc *sc = (struct vic_softc *)arg;
sc 1298 dev/pci/if_vic.c vic_link_state(sc);
sc 1300 dev/pci/if_vic.c timeout_add(&sc->sc_tick, hz);
sc 1304 dev/pci/if_vic.c vic_read(struct vic_softc *sc, bus_size_t r)
sc 1306 dev/pci/if_vic.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
sc 1308 dev/pci/if_vic.c return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, r));
sc 1312 dev/pci/if_vic.c vic_write(struct vic_softc *sc, bus_size_t r, u_int32_t v)
sc 1314 dev/pci/if_vic.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v);
sc 1315 dev/pci/if_vic.c bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4,
sc 1320 dev/pci/if_vic.c vic_read_cmd(struct vic_softc *sc, u_int32_t cmd)
sc 1322 dev/pci/if_vic.c vic_write(sc, VIC_CMD, cmd);
sc 1323 dev/pci/if_vic.c return (vic_read(sc, VIC_CMD));
sc 1327 dev/pci/if_vic.c vic_alloc_dmamem(struct vic_softc *sc)
sc 1331 dev/pci/if_vic.c if (bus_dmamap_create(sc->sc_dmat, sc->sc_dma_size, 1,
sc 1332 dev/pci/if_vic.c sc->sc_dma_size, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
sc 1333 dev/pci/if_vic.c &sc->sc_dma_map) != 0)
sc 1336 dev/pci/if_vic.c if (bus_dmamem_alloc(sc->sc_dmat, sc->sc_dma_size, 16, 0,
sc 1337 dev/pci/if_vic.c &sc->sc_dma_seg, 1, &nsegs, BUS_DMA_NOWAIT) != 0)
sc 1340 dev/pci/if_vic.c if (bus_dmamem_map(sc->sc_dmat, &sc->sc_dma_seg, nsegs,
sc 1341 dev/pci/if_vic.c sc->sc_dma_size, &sc->sc_dma_kva, BUS_DMA_NOWAIT) != 0)
sc 1344 dev/pci/if_vic.c if (bus_dmamap_load(sc->sc_dmat, sc->sc_dma_map, sc->sc_dma_kva,
sc 1345 dev/pci/if_vic.c sc->sc_dma_size, NULL, BUS_DMA_NOWAIT) != 0)
sc 1348 dev/pci/if_vic.c bzero(sc->sc_dma_kva, sc->sc_dma_size);
sc 1353 dev/pci/if_vic.c bus_dmamem_unmap(sc->sc_dmat, sc->sc_dma_kva, sc->sc_dma_size);
sc 1355 dev/pci/if_vic.c bus_dmamem_free(sc->sc_dmat, &sc->sc_dma_seg, 1);
sc 1357 dev/pci/if_vic.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_dma_map);
sc 1363 dev/pci/if_vic.c vic_free_dmamem(struct vic_softc *sc)
sc 1365 dev/pci/if_vic.c bus_dmamap_unload(sc->sc_dmat, sc->sc_dma_map);
sc 1366 dev/pci/if_vic.c bus_dmamem_unmap(sc->sc_dmat, sc->sc_dma_kva, sc->sc_dma_size);
sc 1367 dev/pci/if_vic.c bus_dmamem_free(sc->sc_dmat, &sc->sc_dma_seg, 1);
sc 1368 dev/pci/if_vic.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_dma_map);
sc 154 dev/pci/if_vr.c #define VR_SETBIT(sc, reg, x) \
sc 155 dev/pci/if_vr.c CSR_WRITE_1(sc, reg, \
sc 156 dev/pci/if_vr.c CSR_READ_1(sc, reg) | (x))
sc 158 dev/pci/if_vr.c #define VR_CLRBIT(sc, reg, x) \
sc 159 dev/pci/if_vr.c CSR_WRITE_1(sc, reg, \
sc 160 dev/pci/if_vr.c CSR_READ_1(sc, reg) & ~(x))
sc 162 dev/pci/if_vr.c #define VR_SETBIT16(sc, reg, x) \
sc 163 dev/pci/if_vr.c CSR_WRITE_2(sc, reg, \
sc 164 dev/pci/if_vr.c CSR_READ_2(sc, reg) | (x))
sc 166 dev/pci/if_vr.c #define VR_CLRBIT16(sc, reg, x) \
sc 167 dev/pci/if_vr.c CSR_WRITE_2(sc, reg, \
sc 168 dev/pci/if_vr.c CSR_READ_2(sc, reg) & ~(x))
sc 170 dev/pci/if_vr.c #define VR_SETBIT32(sc, reg, x) \
sc 171 dev/pci/if_vr.c CSR_WRITE_4(sc, reg, \
sc 172 dev/pci/if_vr.c CSR_READ_4(sc, reg) | (x))
sc 174 dev/pci/if_vr.c #define VR_CLRBIT32(sc, reg, x) \
sc 175 dev/pci/if_vr.c CSR_WRITE_4(sc, reg, \
sc 176 dev/pci/if_vr.c CSR_READ_4(sc, reg) & ~(x))
sc 179 dev/pci/if_vr.c CSR_WRITE_1(sc, VR_MIICMD, \
sc 180 dev/pci/if_vr.c CSR_READ_1(sc, VR_MIICMD) | (x))
sc 183 dev/pci/if_vr.c CSR_WRITE_1(sc, VR_MIICMD, \
sc 184 dev/pci/if_vr.c CSR_READ_1(sc, VR_MIICMD) & ~(x))
sc 191 dev/pci/if_vr.c vr_mii_sync(struct vr_softc *sc)
sc 209 dev/pci/if_vr.c vr_mii_send(struct vr_softc *sc, u_int32_t bits, int cnt)
sc 233 dev/pci/if_vr.c vr_mii_readreg(struct vr_softc *sc, struct vr_mii_frame *frame)
sc 248 dev/pci/if_vr.c CSR_WRITE_1(sc, VR_MIICMD, 0);
sc 249 dev/pci/if_vr.c VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM);
sc 256 dev/pci/if_vr.c vr_mii_sync(sc);
sc 261 dev/pci/if_vr.c vr_mii_send(sc, frame->mii_stdelim, 2);
sc 262 dev/pci/if_vr.c vr_mii_send(sc, frame->mii_opcode, 2);
sc 263 dev/pci/if_vr.c vr_mii_send(sc, frame->mii_phyaddr, 5);
sc 264 dev/pci/if_vr.c vr_mii_send(sc, frame->mii_regaddr, 5);
sc 278 dev/pci/if_vr.c ack = CSR_READ_4(sc, VR_MIICMD) & VR_MIICMD_DATAOUT;
sc 300 dev/pci/if_vr.c if (CSR_READ_4(sc, VR_MIICMD) & VR_MIICMD_DATAOUT)
sc 328 dev/pci/if_vr.c CSR_WRITE_1(sc, VR_PHYADDR, (CSR_READ_1(sc, VR_PHYADDR)& 0xe0)|
sc 332 dev/pci/if_vr.c CSR_WRITE_1(sc, VR_MIIADDR, frame->mii_regaddr);
sc 333 dev/pci/if_vr.c VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_READ_ENB);
sc 336 dev/pci/if_vr.c if ((CSR_READ_1(sc, VR_MIICMD) & VR_MIICMD_READ_ENB) == 0)
sc 341 dev/pci/if_vr.c frame->mii_data = CSR_READ_2(sc, VR_MIIDATA);
sc 354 dev/pci/if_vr.c vr_mii_writereg(struct vr_softc *sc, struct vr_mii_frame *frame)
sc 361 dev/pci/if_vr.c CSR_WRITE_1(sc, VR_MIICMD, 0);
sc 362 dev/pci/if_vr.c VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM);
sc 377 dev/pci/if_vr.c vr_mii_sync(sc);
sc 379 dev/pci/if_vr.c vr_mii_send(sc, frame->mii_stdelim, 2);
sc 380 dev/pci/if_vr.c vr_mii_send(sc, frame->mii_opcode, 2);
sc 381 dev/pci/if_vr.c vr_mii_send(sc, frame->mii_phyaddr, 5);
sc 382 dev/pci/if_vr.c vr_mii_send(sc, frame->mii_regaddr, 5);
sc 383 dev/pci/if_vr.c vr_mii_send(sc, frame->mii_turnaround, 2);
sc 384 dev/pci/if_vr.c vr_mii_send(sc, frame->mii_data, 16);
sc 408 dev/pci/if_vr.c CSR_WRITE_1(sc, VR_PHYADDR, (CSR_READ_1(sc, VR_PHYADDR)& 0xe0)|
sc 412 dev/pci/if_vr.c CSR_WRITE_1(sc, VR_MIIADDR, frame->mii_regaddr);
sc 413 dev/pci/if_vr.c CSR_WRITE_2(sc, VR_MIIDATA, frame->mii_data);
sc 415 dev/pci/if_vr.c VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_WRITE_ENB);
sc 418 dev/pci/if_vr.c if ((CSR_READ_1(sc, VR_MIICMD) & VR_MIICMD_WRITE_ENB) == 0)
sc 432 dev/pci/if_vr.c struct vr_softc *sc = (struct vr_softc *)dev;
sc 435 dev/pci/if_vr.c switch (sc->vr_revid) {
sc 448 dev/pci/if_vr.c vr_mii_readreg(sc, &frame);
sc 456 dev/pci/if_vr.c struct vr_softc *sc = (struct vr_softc *)dev;
sc 459 dev/pci/if_vr.c switch (sc->vr_revid) {
sc 474 dev/pci/if_vr.c vr_mii_writereg(sc, &frame);
sc 480 dev/pci/if_vr.c struct vr_softc *sc = (struct vr_softc *)dev;
sc 482 dev/pci/if_vr.c vr_setcfg(sc, sc->sc_mii.mii_media_active);
sc 489 dev/pci/if_vr.c vr_setmulti(struct vr_softc *sc)
sc 494 dev/pci/if_vr.c struct arpcom *ac = &sc->arpcom;
sc 500 dev/pci/if_vr.c ifp = &sc->arpcom.ac_if;
sc 502 dev/pci/if_vr.c rxfilt = CSR_READ_1(sc, VR_RXCFG);
sc 507 dev/pci/if_vr.c CSR_WRITE_1(sc, VR_RXCFG, rxfilt);
sc 508 dev/pci/if_vr.c CSR_WRITE_4(sc, VR_MAR0, 0xFFFFFFFF);
sc 509 dev/pci/if_vr.c CSR_WRITE_4(sc, VR_MAR1, 0xFFFFFFFF);
sc 514 dev/pci/if_vr.c CSR_WRITE_4(sc, VR_MAR0, 0);
sc 515 dev/pci/if_vr.c CSR_WRITE_4(sc, VR_MAR1, 0);
sc 539 dev/pci/if_vr.c CSR_WRITE_4(sc, VR_MAR0, hashes[0]);
sc 540 dev/pci/if_vr.c CSR_WRITE_4(sc, VR_MAR1, hashes[1]);
sc 541 dev/pci/if_vr.c CSR_WRITE_1(sc, VR_RXCFG, rxfilt);
sc 550 dev/pci/if_vr.c vr_setcfg(struct vr_softc *sc, int media)
sc 554 dev/pci/if_vr.c if (CSR_READ_2(sc, VR_COMMAND) & (VR_CMD_TX_ON|VR_CMD_RX_ON)) {
sc 556 dev/pci/if_vr.c VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_TX_ON|VR_CMD_RX_ON));
sc 560 dev/pci/if_vr.c VR_SETBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX);
sc 562 dev/pci/if_vr.c VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_FULLDUPLEX);
sc 565 dev/pci/if_vr.c VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON|VR_CMD_RX_ON);
sc 569 dev/pci/if_vr.c vr_reset(struct vr_softc *sc)
sc 573 dev/pci/if_vr.c VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RESET);
sc 577 dev/pci/if_vr.c if (!(CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RESET))
sc 581 dev/pci/if_vr.c if (sc->vr_revid < REV_ID_VT3065_A)
sc 583 dev/pci/if_vr.c sc->sc_dev.dv_xname);
sc 588 dev/pci/if_vr.c sc->sc_dev.dv_xname);
sc 590 dev/pci/if_vr.c VR_SETBIT(sc, VR_MISC_CR1, VR_MISCCR1_FORSRST);
sc 617 dev/pci/if_vr.c struct vr_softc *sc = (struct vr_softc *)self;
sc 622 dev/pci/if_vr.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 667 dev/pci/if_vr.c &sc->vr_btag, &sc->vr_bhandle, NULL, &size, 0)) {
sc 673 dev/pci/if_vr.c &sc->vr_btag, &sc->vr_bhandle, NULL, &size, 0)) {
sc 685 dev/pci/if_vr.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, vr_intr, sc,
sc 687 dev/pci/if_vr.c if (sc->sc_ih == NULL) {
sc 696 dev/pci/if_vr.c sc->vr_revid = PCI_REVISION(pa->pa_class);
sc 703 dev/pci/if_vr.c VR_CLRBIT(sc, VR_STICKHW, (VR_STICKHW_DS0|VR_STICKHW_DS1));
sc 706 dev/pci/if_vr.c vr_reset(sc);
sc 715 dev/pci/if_vr.c VR_CLRBIT(sc, VR_MIICMD, VR_MIICMD_AUTOPOLL);
sc 724 dev/pci/if_vr.c VR_SETBIT(sc, VR_EECSR, VR_EECSR_LOAD);
sc 727 dev/pci/if_vr.c sc->arpcom.ac_enaddr[i] = CSR_READ_1(sc, VR_PAR0 + i);
sc 732 dev/pci/if_vr.c printf(", address %s\n", ether_sprintf(sc->arpcom.ac_enaddr));
sc 734 dev/pci/if_vr.c sc->sc_dmat = pa->pa_dmat;
sc 735 dev/pci/if_vr.c if (bus_dmamem_alloc(sc->sc_dmat, sizeof(struct vr_list_data),
sc 736 dev/pci/if_vr.c PAGE_SIZE, 0, &sc->sc_listseg, 1, &rseg, BUS_DMA_NOWAIT)) {
sc 740 dev/pci/if_vr.c if (bus_dmamem_map(sc->sc_dmat, &sc->sc_listseg, rseg,
sc 746 dev/pci/if_vr.c if (bus_dmamap_create(sc->sc_dmat, sizeof(struct vr_list_data), 1,
sc 747 dev/pci/if_vr.c sizeof(struct vr_list_data), 0, BUS_DMA_NOWAIT, &sc->sc_listmap)) {
sc 751 dev/pci/if_vr.c if (bus_dmamap_load(sc->sc_dmat, sc->sc_listmap, kva,
sc 756 dev/pci/if_vr.c sc->vr_ldata = (struct vr_list_data *)kva;
sc 757 dev/pci/if_vr.c bzero(sc->vr_ldata, sizeof(struct vr_list_data));
sc 759 dev/pci/if_vr.c ifp = &sc->arpcom.ac_if;
sc 760 dev/pci/if_vr.c ifp->if_softc = sc;
sc 767 dev/pci/if_vr.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 772 dev/pci/if_vr.c sc->sc_mii.mii_ifp = ifp;
sc 773 dev/pci/if_vr.c sc->sc_mii.mii_readreg = vr_miibus_readreg;
sc 774 dev/pci/if_vr.c sc->sc_mii.mii_writereg = vr_miibus_writereg;
sc 775 dev/pci/if_vr.c sc->sc_mii.mii_statchg = vr_miibus_statchg;
sc 776 dev/pci/if_vr.c ifmedia_init(&sc->sc_mii.mii_media, 0, vr_ifmedia_upd, vr_ifmedia_sts);
sc 777 dev/pci/if_vr.c mii_attach(self, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY,
sc 779 dev/pci/if_vr.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 780 dev/pci/if_vr.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
sc 781 dev/pci/if_vr.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
sc 783 dev/pci/if_vr.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 784 dev/pci/if_vr.c timeout_set(&sc->sc_to, vr_tick, sc);
sc 792 dev/pci/if_vr.c shutdownhook_establish(vr_shutdown, sc);
sc 796 dev/pci/if_vr.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_listmap);
sc 799 dev/pci/if_vr.c bus_dmamem_unmap(sc->sc_dmat, kva, sizeof(struct vr_list_data));
sc 802 dev/pci/if_vr.c bus_dmamem_free(sc->sc_dmat, &sc->sc_listseg, rseg);
sc 805 dev/pci/if_vr.c pci_intr_disestablish(pc, sc->sc_ih);
sc 808 dev/pci/if_vr.c bus_space_unmap(sc->vr_btag, sc->vr_bhandle, size);
sc 815 dev/pci/if_vr.c vr_list_tx_init(struct vr_softc *sc)
sc 821 dev/pci/if_vr.c cd = &sc->vr_cdata;
sc 822 dev/pci/if_vr.c ld = sc->vr_ldata;
sc 826 dev/pci/if_vr.c sc->sc_listmap->dm_segs[0].ds_addr +
sc 829 dev/pci/if_vr.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
sc 853 dev/pci/if_vr.c vr_list_rx_init(struct vr_softc *sc)
sc 860 dev/pci/if_vr.c cd = &sc->vr_cdata;
sc 861 dev/pci/if_vr.c ld = sc->vr_ldata;
sc 867 dev/pci/if_vr.c sc->sc_listmap->dm_segs[0].ds_addr +
sc 874 dev/pci/if_vr.c if (bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
sc 879 dev/pci/if_vr.c if (bus_dmamap_load(sc->sc_dmat, cd->vr_rx_chain[i].vr_map,
sc 882 dev/pci/if_vr.c bus_dmamap_sync(sc->sc_dmat, cd->vr_rx_chain[i].vr_map,
sc 896 dev/pci/if_vr.c htole32(sc->sc_listmap->dm_segs[0].ds_addr +
sc 902 dev/pci/if_vr.c htole32(sc->sc_listmap->dm_segs[0].ds_addr +
sc 909 dev/pci/if_vr.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap, 0,
sc 910 dev/pci/if_vr.c sc->sc_listmap->dm_mapsize,
sc 921 dev/pci/if_vr.c vr_rxeof(struct vr_softc *sc)
sc 929 dev/pci/if_vr.c ifp = &sc->arpcom.ac_if;
sc 933 dev/pci/if_vr.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 934 dev/pci/if_vr.c 0, sc->sc_listmap->dm_mapsize,
sc 936 dev/pci/if_vr.c rxstat = letoh32(sc->vr_cdata.vr_rx_head->vr_ptr->vr_status);
sc 941 dev/pci/if_vr.c cur_rx = sc->vr_cdata.vr_rx_head;
sc 942 dev/pci/if_vr.c sc->vr_cdata.vr_rx_head = cur_rx->vr_nextdesc;
sc 954 dev/pci/if_vr.c sc->sc_dev.dv_xname, rxstat & 0x000000ff);
sc 978 dev/pci/if_vr.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 979 dev/pci/if_vr.c 0, sc->sc_listmap->dm_mapsize,
sc 996 dev/pci/if_vr.c bus_dmamap_sync(sc->sc_dmat, cur_rx->vr_map, 0,
sc 1001 dev/pci/if_vr.c bus_dmamap_sync(sc->sc_dmat, cur_rx->vr_map, 0,
sc 1011 dev/pci/if_vr.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap, 0,
sc 1012 dev/pci/if_vr.c sc->sc_listmap->dm_mapsize,
sc 1034 dev/pci/if_vr.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap,
sc 1035 dev/pci/if_vr.c 0, sc->sc_listmap->dm_mapsize,
sc 1040 dev/pci/if_vr.c vr_rxeoc(struct vr_softc *sc)
sc 1045 dev/pci/if_vr.c ifp = &sc->arpcom.ac_if;
sc 1049 dev/pci/if_vr.c VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);
sc 1053 dev/pci/if_vr.c i && (CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RX_ON);
sc 1058 dev/pci/if_vr.c printf("%s: rx shutdown error!\n", sc->sc_dev.dv_xname);
sc 1059 dev/pci/if_vr.c sc->vr_flags |= VR_F_RESTART;
sc 1063 dev/pci/if_vr.c vr_rxeof(sc);
sc 1065 dev/pci/if_vr.c CSR_WRITE_4(sc, VR_RXADDR, sc->vr_cdata.vr_rx_head->vr_paddr);
sc 1066 dev/pci/if_vr.c VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);
sc 1067 dev/pci/if_vr.c VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_GO);
sc 1076 dev/pci/if_vr.c vr_txeof(struct vr_softc *sc)
sc 1081 dev/pci/if_vr.c ifp = &sc->arpcom.ac_if;
sc 1087 dev/pci/if_vr.c cur_tx = sc->vr_cdata.vr_tx_cons;
sc 1097 dev/pci/if_vr.c i && (CSR_READ_2(sc, VR_COMMAND) & VR_CMD_TX_ON);
sc 1102 dev/pci/if_vr.c sc->sc_dev.dv_xname);
sc 1103 dev/pci/if_vr.c sc->vr_flags |= VR_F_RESTART;
sc 1107 dev/pci/if_vr.c CSR_WRITE_4(sc, VR_TXADDR, cur_tx->vr_paddr);
sc 1126 dev/pci/if_vr.c bus_dmamap_unload(sc->sc_dmat, cur_tx->vr_map);
sc 1135 dev/pci/if_vr.c sc->vr_cdata.vr_tx_cons = cur_tx;
sc 1143 dev/pci/if_vr.c struct vr_softc *sc = xsc;
sc 1147 dev/pci/if_vr.c if (sc->vr_flags & VR_F_RESTART) {
sc 1148 dev/pci/if_vr.c printf("%s: restarting\n", sc->sc_dev.dv_xname);
sc 1149 dev/pci/if_vr.c vr_stop(sc);
sc 1150 dev/pci/if_vr.c vr_reset(sc);
sc 1151 dev/pci/if_vr.c vr_init(sc);
sc 1152 dev/pci/if_vr.c sc->vr_flags &= ~VR_F_RESTART;
sc 1155 dev/pci/if_vr.c mii_tick(&sc->sc_mii);
sc 1156 dev/pci/if_vr.c timeout_add(&sc->sc_to, hz);
sc 1163 dev/pci/if_vr.c struct vr_softc *sc;
sc 1168 dev/pci/if_vr.c sc = arg;
sc 1169 dev/pci/if_vr.c ifp = &sc->arpcom.ac_if;
sc 1173 dev/pci/if_vr.c vr_stop(sc);
sc 1178 dev/pci/if_vr.c CSR_WRITE_2(sc, VR_IMR, 0x0000);
sc 1182 dev/pci/if_vr.c status = CSR_READ_2(sc, VR_ISR);
sc 1184 dev/pci/if_vr.c CSR_WRITE_2(sc, VR_ISR, status);
sc 1192 dev/pci/if_vr.c vr_rxeof(sc);
sc 1196 dev/pci/if_vr.c printf("%s: rx packet lost\n", sc->sc_dev.dv_xname);
sc 1205 dev/pci/if_vr.c sc->sc_dev.dv_xname, status);
sc 1212 dev/pci/if_vr.c vr_rxeoc(sc);
sc 1219 dev/pci/if_vr.c sc->sc_dev.dv_xname);
sc 1222 dev/pci/if_vr.c sc->sc_dev.dv_xname);
sc 1224 dev/pci/if_vr.c vr_reset(sc);
sc 1225 dev/pci/if_vr.c vr_init(sc);
sc 1231 dev/pci/if_vr.c vr_txeof(sc);
sc 1238 dev/pci/if_vr.c sc->sc_dev.dv_xname);
sc 1241 dev/pci/if_vr.c sc->sc_dev.dv_xname);
sc 1244 dev/pci/if_vr.c if (sc->vr_cdata.vr_tx_cons->vr_mbuf != NULL) {
sc 1245 dev/pci/if_vr.c VR_SETBIT16(sc, VR_COMMAND,
sc 1247 dev/pci/if_vr.c VR_SETBIT16(sc, VR_COMMAND,
sc 1255 dev/pci/if_vr.c CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
sc 1268 dev/pci/if_vr.c vr_encap(struct vr_softc *sc, struct vr_chain *c, struct mbuf *m_head)
sc 1299 dev/pci/if_vr.c if (bus_dmamap_load_mbuf(sc->sc_dmat, c->vr_map, m_new,
sc 1304 dev/pci/if_vr.c bus_dmamap_sync(sc->sc_dmat, c->vr_map, 0, c->vr_map->dm_mapsize,
sc 1333 dev/pci/if_vr.c struct vr_softc *sc;
sc 1340 dev/pci/if_vr.c sc = ifp->if_softc;
sc 1342 dev/pci/if_vr.c cur_tx = sc->vr_cdata.vr_tx_prod;
sc 1349 dev/pci/if_vr.c if (vr_encap(sc, cur_tx, m_head)) {
sc 1371 dev/pci/if_vr.c if (cur_tx != sc->vr_cdata.vr_tx_prod || cur_tx->vr_mbuf != NULL) {
sc 1372 dev/pci/if_vr.c sc->vr_cdata.vr_tx_prod = cur_tx;
sc 1374 dev/pci/if_vr.c bus_dmamap_sync(sc->sc_dmat, sc->sc_listmap, 0,
sc 1375 dev/pci/if_vr.c sc->sc_listmap->dm_mapsize,
sc 1379 dev/pci/if_vr.c VR_SETBIT16(sc, VR_COMMAND, /*VR_CMD_TX_ON|*/VR_CMD_TX_GO);
sc 1392 dev/pci/if_vr.c struct vr_softc *sc = xsc;
sc 1393 dev/pci/if_vr.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 1394 dev/pci/if_vr.c struct mii_data *mii = &sc->sc_mii;
sc 1402 dev/pci/if_vr.c vr_stop(sc);
sc 1403 dev/pci/if_vr.c vr_reset(sc);
sc 1409 dev/pci/if_vr.c CSR_WRITE_1(sc, VR_PAR0 + i, sc->arpcom.ac_enaddr[i]);
sc 1412 dev/pci/if_vr.c VR_CLRBIT(sc, VR_BCR0, VR_BCR0_DMA_LENGTH);
sc 1413 dev/pci/if_vr.c VR_SETBIT(sc, VR_BCR0, VR_BCR0_DMA_STORENFWD);
sc 1419 dev/pci/if_vr.c VR_CLRBIT(sc, VR_BCR0, VR_BCR0_RX_THRESH);
sc 1420 dev/pci/if_vr.c VR_SETBIT(sc, VR_BCR0, VR_BCR0_RXTHRESH128BYTES);
sc 1422 dev/pci/if_vr.c VR_CLRBIT(sc, VR_BCR1, VR_BCR1_TX_THRESH);
sc 1423 dev/pci/if_vr.c VR_SETBIT(sc, VR_BCR1, VR_BCR1_TXTHRESHSTORENFWD);
sc 1425 dev/pci/if_vr.c VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_THRESH);
sc 1426 dev/pci/if_vr.c VR_SETBIT(sc, VR_RXCFG, VR_RXTHRESH_128BYTES);
sc 1428 dev/pci/if_vr.c VR_CLRBIT(sc, VR_TXCFG, VR_TXCFG_TX_THRESH);
sc 1429 dev/pci/if_vr.c VR_SETBIT(sc, VR_TXCFG, VR_TXTHRESH_STORENFWD);
sc 1432 dev/pci/if_vr.c if (vr_list_rx_init(sc) == ENOBUFS) {
sc 1434 dev/pci/if_vr.c sc->sc_dev.dv_xname);
sc 1435 dev/pci/if_vr.c vr_stop(sc);
sc 1443 dev/pci/if_vr.c if (vr_list_tx_init(sc) == ENOBUFS) {
sc 1445 dev/pci/if_vr.c sc->sc_dev.dv_xname);
sc 1446 dev/pci/if_vr.c vr_stop(sc);
sc 1453 dev/pci/if_vr.c VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC);
sc 1455 dev/pci/if_vr.c VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_PROMISC);
sc 1459 dev/pci/if_vr.c VR_SETBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD);
sc 1461 dev/pci/if_vr.c VR_CLRBIT(sc, VR_RXCFG, VR_RXCFG_RX_BROAD);
sc 1466 dev/pci/if_vr.c vr_setmulti(sc);
sc 1471 dev/pci/if_vr.c CSR_WRITE_4(sc, VR_RXADDR, sc->vr_cdata.vr_rx_head->vr_paddr);
sc 1474 dev/pci/if_vr.c CSR_WRITE_2(sc, VR_COMMAND, VR_CMD_TX_NOPOLL|VR_CMD_START|
sc 1478 dev/pci/if_vr.c CSR_WRITE_4(sc, VR_TXADDR, sc->sc_listmap->dm_segs[0].ds_addr +
sc 1484 dev/pci/if_vr.c CSR_WRITE_2(sc, VR_ISR, 0xFFFF);
sc 1485 dev/pci/if_vr.c CSR_WRITE_2(sc, VR_IMR, VR_INTRS);
sc 1493 dev/pci/if_vr.c if (!timeout_pending(&sc->sc_to))
sc 1494 dev/pci/if_vr.c timeout_add(&sc->sc_to, hz);
sc 1505 dev/pci/if_vr.c struct vr_softc *sc = ifp->if_softc;
sc 1508 dev/pci/if_vr.c vr_init(sc);
sc 1519 dev/pci/if_vr.c struct vr_softc *sc = ifp->if_softc;
sc 1520 dev/pci/if_vr.c struct mii_data *mii = &sc->sc_mii;
sc 1530 dev/pci/if_vr.c struct vr_softc *sc = ifp->if_softc;
sc 1537 dev/pci/if_vr.c if ((error = ether_ioctl(ifp, &sc->arpcom, command, data)) > 0) {
sc 1546 dev/pci/if_vr.c vr_init(sc);
sc 1549 dev/pci/if_vr.c arp_ifinit(&sc->arpcom, ifa);
sc 1556 dev/pci/if_vr.c !(sc->sc_if_flags & IFF_PROMISC)) {
sc 1557 dev/pci/if_vr.c VR_SETBIT(sc, VR_RXCFG,
sc 1559 dev/pci/if_vr.c vr_setmulti(sc);
sc 1562 dev/pci/if_vr.c sc->sc_if_flags & IFF_PROMISC) {
sc 1563 dev/pci/if_vr.c VR_CLRBIT(sc, VR_RXCFG,
sc 1565 dev/pci/if_vr.c vr_setmulti(sc);
sc 1567 dev/pci/if_vr.c (ifp->if_flags ^ sc->sc_if_flags) & IFF_ALLMULTI) {
sc 1568 dev/pci/if_vr.c vr_setmulti(sc);
sc 1571 dev/pci/if_vr.c vr_init(sc);
sc 1575 dev/pci/if_vr.c vr_stop(sc);
sc 1577 dev/pci/if_vr.c sc->sc_if_flags = ifp->if_flags;
sc 1582 dev/pci/if_vr.c ether_addmulti(ifr, &sc->arpcom) :
sc 1583 dev/pci/if_vr.c ether_delmulti(ifr, &sc->arpcom);
sc 1591 dev/pci/if_vr.c vr_setmulti(sc);
sc 1597 dev/pci/if_vr.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, command);
sc 1612 dev/pci/if_vr.c struct vr_softc *sc;
sc 1614 dev/pci/if_vr.c sc = ifp->if_softc;
sc 1617 dev/pci/if_vr.c printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
sc 1619 dev/pci/if_vr.c vr_stop(sc);
sc 1620 dev/pci/if_vr.c vr_reset(sc);
sc 1621 dev/pci/if_vr.c vr_init(sc);
sc 1632 dev/pci/if_vr.c vr_stop(struct vr_softc *sc)
sc 1638 dev/pci/if_vr.c ifp = &sc->arpcom.ac_if;
sc 1641 dev/pci/if_vr.c if (timeout_pending(&sc->sc_to))
sc 1642 dev/pci/if_vr.c timeout_del(&sc->sc_to);
sc 1646 dev/pci/if_vr.c VR_SETBIT16(sc, VR_COMMAND, VR_CMD_STOP);
sc 1647 dev/pci/if_vr.c VR_CLRBIT16(sc, VR_COMMAND, (VR_CMD_RX_ON|VR_CMD_TX_ON));
sc 1648 dev/pci/if_vr.c CSR_WRITE_2(sc, VR_IMR, 0x0000);
sc 1649 dev/pci/if_vr.c CSR_WRITE_4(sc, VR_TXADDR, 0x00000000);
sc 1650 dev/pci/if_vr.c CSR_WRITE_4(sc, VR_RXADDR, 0x00000000);
sc 1657 dev/pci/if_vr.c if (sc->vr_cdata.vr_rx_chain[i].vr_buf != NULL) {
sc 1658 dev/pci/if_vr.c free(sc->vr_cdata.vr_rx_chain[i].vr_buf, M_DEVBUF);
sc 1659 dev/pci/if_vr.c sc->vr_cdata.vr_rx_chain[i].vr_buf = NULL;
sc 1662 dev/pci/if_vr.c map = sc->vr_cdata.vr_rx_chain[i].vr_map;
sc 1665 dev/pci/if_vr.c bus_dmamap_unload(sc->sc_dmat, map);
sc 1666 dev/pci/if_vr.c bus_dmamap_destroy(sc->sc_dmat, map);
sc 1667 dev/pci/if_vr.c sc->vr_cdata.vr_rx_chain[i].vr_map = NULL;
sc 1670 dev/pci/if_vr.c bzero((char *)&sc->vr_ldata->vr_rx_list,
sc 1671 dev/pci/if_vr.c sizeof(sc->vr_ldata->vr_rx_list));
sc 1679 dev/pci/if_vr.c if (sc->vr_cdata.vr_tx_chain[i].vr_mbuf != NULL) {
sc 1680 dev/pci/if_vr.c m_freem(sc->vr_cdata.vr_tx_chain[i].vr_mbuf);
sc 1681 dev/pci/if_vr.c sc->vr_cdata.vr_tx_chain[i].vr_mbuf = NULL;
sc 1683 dev/pci/if_vr.c map = sc->vr_cdata.vr_tx_chain[i].vr_map;
sc 1686 dev/pci/if_vr.c bus_dmamap_unload(sc->sc_dmat, map);
sc 1687 dev/pci/if_vr.c bus_dmamap_destroy(sc->sc_dmat, map);
sc 1688 dev/pci/if_vr.c sc->vr_cdata.vr_tx_chain[i].vr_map = NULL;
sc 1692 dev/pci/if_vr.c bzero((char *)&sc->vr_ldata->vr_tx_list,
sc 1693 dev/pci/if_vr.c sizeof(sc->vr_ldata->vr_tx_list));
sc 1703 dev/pci/if_vr.c struct vr_softc *sc = (struct vr_softc *)arg;
sc 1705 dev/pci/if_vr.c vr_stop(sc);
sc 482 dev/pci/if_vrreg.h #define CSR_WRITE_4(sc, reg, val) \
sc 483 dev/pci/if_vrreg.h bus_space_write_4(sc->vr_btag, sc->vr_bhandle, reg, val)
sc 484 dev/pci/if_vrreg.h #define CSR_WRITE_2(sc, reg, val) \
sc 485 dev/pci/if_vrreg.h bus_space_write_2(sc->vr_btag, sc->vr_bhandle, reg, val)
sc 486 dev/pci/if_vrreg.h #define CSR_WRITE_1(sc, reg, val) \
sc 487 dev/pci/if_vrreg.h bus_space_write_1(sc->vr_btag, sc->vr_bhandle, reg, val)
sc 489 dev/pci/if_vrreg.h #define CSR_READ_4(sc, reg) \
sc 490 dev/pci/if_vrreg.h bus_space_read_4(sc->vr_btag, sc->vr_bhandle, reg)
sc 491 dev/pci/if_vrreg.h #define CSR_READ_2(sc, reg) \
sc 492 dev/pci/if_vrreg.h bus_space_read_2(sc->vr_btag, sc->vr_bhandle, reg)
sc 493 dev/pci/if_vrreg.h #define CSR_READ_1(sc, reg) \
sc 494 dev/pci/if_vrreg.h bus_space_read_1(sc->vr_btag, sc->vr_bhandle, reg)
sc 178 dev/pci/if_wb.c #define WB_SETBIT(sc, reg, x) \
sc 179 dev/pci/if_wb.c CSR_WRITE_4(sc, reg, \
sc 180 dev/pci/if_wb.c CSR_READ_4(sc, reg) | x)
sc 182 dev/pci/if_wb.c #define WB_CLRBIT(sc, reg, x) \
sc 183 dev/pci/if_wb.c CSR_WRITE_4(sc, reg, \
sc 184 dev/pci/if_wb.c CSR_READ_4(sc, reg) & ~x)
sc 187 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_SIO, \
sc 188 dev/pci/if_wb.c CSR_READ_4(sc, WB_SIO) | x)
sc 191 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_SIO, \
sc 192 dev/pci/if_wb.c CSR_READ_4(sc, WB_SIO) & ~x)
sc 197 dev/pci/if_wb.c void wb_eeprom_putbyte(sc, addr)
sc 198 dev/pci/if_wb.c struct wb_softc *sc;
sc 227 dev/pci/if_wb.c void wb_eeprom_getword(sc, addr, dest)
sc 228 dev/pci/if_wb.c struct wb_softc *sc;
sc 236 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_SIO, WB_SIO_EESEL|WB_SIO_EE_CS);
sc 241 dev/pci/if_wb.c wb_eeprom_putbyte(sc, addr);
sc 243 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_SIO, WB_SIO_EESEL|WB_SIO_EE_CS);
sc 251 dev/pci/if_wb.c if (CSR_READ_4(sc, WB_SIO) & WB_SIO_EE_DATAOUT)
sc 258 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_SIO, 0);
sc 268 dev/pci/if_wb.c void wb_read_eeprom(sc, dest, off, cnt, swap)
sc 269 dev/pci/if_wb.c struct wb_softc *sc;
sc 279 dev/pci/if_wb.c wb_eeprom_getword(sc, off + i, &word);
sc 293 dev/pci/if_wb.c void wb_mii_sync(sc)
sc 294 dev/pci/if_wb.c struct wb_softc *sc;
sc 313 dev/pci/if_wb.c void wb_mii_send(sc, bits, cnt)
sc 314 dev/pci/if_wb.c struct wb_softc *sc;
sc 338 dev/pci/if_wb.c int wb_mii_readreg(sc, frame)
sc 339 dev/pci/if_wb.c struct wb_softc *sc;
sc 355 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_SIO, 0);
sc 362 dev/pci/if_wb.c wb_mii_sync(sc);
sc 367 dev/pci/if_wb.c wb_mii_send(sc, frame->mii_stdelim, 2);
sc 368 dev/pci/if_wb.c wb_mii_send(sc, frame->mii_opcode, 2);
sc 369 dev/pci/if_wb.c wb_mii_send(sc, frame->mii_phyaddr, 5);
sc 370 dev/pci/if_wb.c wb_mii_send(sc, frame->mii_regaddr, 5);
sc 383 dev/pci/if_wb.c ack = CSR_READ_4(sc, WB_SIO) & WB_SIO_MII_DATAOUT;
sc 409 dev/pci/if_wb.c if (CSR_READ_4(sc, WB_SIO) & WB_SIO_MII_DATAOUT)
sc 434 dev/pci/if_wb.c int wb_mii_writereg(sc, frame)
sc 435 dev/pci/if_wb.c struct wb_softc *sc;
sc 455 dev/pci/if_wb.c wb_mii_sync(sc);
sc 457 dev/pci/if_wb.c wb_mii_send(sc, frame->mii_stdelim, 2);
sc 458 dev/pci/if_wb.c wb_mii_send(sc, frame->mii_opcode, 2);
sc 459 dev/pci/if_wb.c wb_mii_send(sc, frame->mii_phyaddr, 5);
sc 460 dev/pci/if_wb.c wb_mii_send(sc, frame->mii_regaddr, 5);
sc 461 dev/pci/if_wb.c wb_mii_send(sc, frame->mii_turnaround, 2);
sc 462 dev/pci/if_wb.c wb_mii_send(sc, frame->mii_data, 16);
sc 485 dev/pci/if_wb.c struct wb_softc *sc = (struct wb_softc *)dev;
sc 492 dev/pci/if_wb.c wb_mii_readreg(sc, &frame);
sc 502 dev/pci/if_wb.c struct wb_softc *sc = (struct wb_softc *)dev;
sc 511 dev/pci/if_wb.c wb_mii_writereg(sc, &frame);
sc 520 dev/pci/if_wb.c struct wb_softc *sc = (struct wb_softc *)dev;
sc 522 dev/pci/if_wb.c wb_setcfg(sc, sc->sc_mii.mii_media_active);
sc 528 dev/pci/if_wb.c void wb_setmulti(sc)
sc 529 dev/pci/if_wb.c struct wb_softc *sc;
sc 534 dev/pci/if_wb.c struct arpcom *ac = &sc->arpcom;
sc 540 dev/pci/if_wb.c ifp = &sc->arpcom.ac_if;
sc 542 dev/pci/if_wb.c rxfilt = CSR_READ_4(sc, WB_NETCFG);
sc 547 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_NETCFG, rxfilt);
sc 548 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_MAR0, 0xFFFFFFFF);
sc 549 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_MAR1, 0xFFFFFFFF);
sc 554 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_MAR0, 0);
sc 555 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_MAR1, 0);
sc 578 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_MAR0, hashes[0]);
sc 579 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_MAR1, hashes[1]);
sc 580 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_NETCFG, rxfilt);
sc 591 dev/pci/if_wb.c wb_setcfg(sc, media)
sc 592 dev/pci/if_wb.c struct wb_softc *sc;
sc 597 dev/pci/if_wb.c if (CSR_READ_4(sc, WB_NETCFG) & (WB_NETCFG_TX_ON|WB_NETCFG_RX_ON)) {
sc 599 dev/pci/if_wb.c WB_CLRBIT(sc, WB_NETCFG, (WB_NETCFG_TX_ON|WB_NETCFG_RX_ON));
sc 603 dev/pci/if_wb.c if ((CSR_READ_4(sc, WB_ISR) & WB_ISR_TX_IDLE) &&
sc 604 dev/pci/if_wb.c (CSR_READ_4(sc, WB_ISR) & WB_ISR_RX_IDLE))
sc 610 dev/pci/if_wb.c "rx to idle state\n", sc->sc_dev.dv_xname);
sc 614 dev/pci/if_wb.c WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_100MBPS);
sc 616 dev/pci/if_wb.c WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_100MBPS);
sc 619 dev/pci/if_wb.c WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_FULLDUPLEX);
sc 621 dev/pci/if_wb.c WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_FULLDUPLEX);
sc 624 dev/pci/if_wb.c WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON|WB_NETCFG_RX_ON);
sc 630 dev/pci/if_wb.c wb_reset(sc)
sc 631 dev/pci/if_wb.c struct wb_softc *sc;
sc 634 dev/pci/if_wb.c struct mii_data *mii = &sc->sc_mii;
sc 636 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_NETCFG, 0);
sc 637 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_BUSCTL, 0);
sc 638 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_TXADDR, 0);
sc 639 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_RXADDR, 0);
sc 641 dev/pci/if_wb.c WB_SETBIT(sc, WB_BUSCTL, WB_BUSCTL_RESET);
sc 642 dev/pci/if_wb.c WB_SETBIT(sc, WB_BUSCTL, WB_BUSCTL_RESET);
sc 646 dev/pci/if_wb.c if (!(CSR_READ_4(sc, WB_BUSCTL) & WB_BUSCTL_RESET))
sc 650 dev/pci/if_wb.c printf("%s: reset never completed!\n", sc->sc_dev.dv_xname);
sc 663 dev/pci/if_wb.c wb_fixmedia(sc)
sc 664 dev/pci/if_wb.c struct wb_softc *sc;
sc 666 dev/pci/if_wb.c struct mii_data *mii = &sc->sc_mii;
sc 712 dev/pci/if_wb.c struct wb_softc *sc = (struct wb_softc *)self;
sc 717 dev/pci/if_wb.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 743 dev/pci/if_wb.c "-- setting to D0\n", sc->sc_dev.dv_xname,
sc 762 dev/pci/if_wb.c &sc->wb_btag, &sc->wb_bhandle, NULL, &size, 0)) {
sc 768 dev/pci/if_wb.c &sc->wb_btag, &sc->wb_bhandle, NULL, &size, 0)){
sc 780 dev/pci/if_wb.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, wb_intr, sc,
sc 782 dev/pci/if_wb.c if (sc->sc_ih == NULL) {
sc 791 dev/pci/if_wb.c sc->wb_cachesize = pci_conf_read(pc, pa->pa_tag, WB_PCI_CACHELEN)&0xff;
sc 794 dev/pci/if_wb.c wb_reset(sc);
sc 799 dev/pci/if_wb.c wb_read_eeprom(sc, (caddr_t)&sc->arpcom.ac_enaddr, 0, 3, 0);
sc 800 dev/pci/if_wb.c printf(", address %s\n", ether_sprintf(sc->arpcom.ac_enaddr));
sc 823 dev/pci/if_wb.c sc->wb_ldata = (struct wb_list_data *)kva;
sc 824 dev/pci/if_wb.c bzero(sc->wb_ldata, sizeof(struct wb_list_data));
sc 826 dev/pci/if_wb.c ifp->if_softc = sc;
sc 835 dev/pci/if_wb.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 840 dev/pci/if_wb.c wb_stop(sc);
sc 842 dev/pci/if_wb.c ifmedia_init(&sc->sc_mii.mii_media, 0, wb_ifmedia_upd, wb_ifmedia_sts);
sc 843 dev/pci/if_wb.c sc->sc_mii.mii_ifp = ifp;
sc 844 dev/pci/if_wb.c sc->sc_mii.mii_readreg = wb_miibus_readreg;
sc 845 dev/pci/if_wb.c sc->sc_mii.mii_writereg = wb_miibus_writereg;
sc 846 dev/pci/if_wb.c sc->sc_mii.mii_statchg = wb_miibus_statchg;
sc 847 dev/pci/if_wb.c mii_attach(self, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY,
sc 849 dev/pci/if_wb.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
sc 850 dev/pci/if_wb.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE,0,NULL);
sc 851 dev/pci/if_wb.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
sc 853 dev/pci/if_wb.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
sc 861 dev/pci/if_wb.c shutdownhook_establish(wb_shutdown, sc);
sc 875 dev/pci/if_wb.c pci_intr_disestablish(pc, sc->sc_ih);
sc 878 dev/pci/if_wb.c bus_space_unmap(sc->wb_btag, sc->wb_bhandle, size);
sc 884 dev/pci/if_wb.c int wb_list_tx_init(sc)
sc 885 dev/pci/if_wb.c struct wb_softc *sc;
sc 891 dev/pci/if_wb.c cd = &sc->wb_cdata;
sc 892 dev/pci/if_wb.c ld = sc->wb_ldata;
sc 917 dev/pci/if_wb.c int wb_list_rx_init(sc)
sc 918 dev/pci/if_wb.c struct wb_softc *sc;
sc 924 dev/pci/if_wb.c cd = &sc->wb_cdata;
sc 925 dev/pci/if_wb.c ld = sc->wb_ldata;
sc 931 dev/pci/if_wb.c if (wb_newbuf(sc, &cd->wb_rx_chain[i], NULL) == ENOBUFS)
sc 962 dev/pci/if_wb.c wb_newbuf(sc, c, m)
sc 963 dev/pci/if_wb.c struct wb_softc *sc;
sc 1000 dev/pci/if_wb.c void wb_rxeof(sc)
sc 1001 dev/pci/if_wb.c struct wb_softc *sc;
sc 1009 dev/pci/if_wb.c ifp = &sc->arpcom.ac_if;
sc 1011 dev/pci/if_wb.c while(!((rxstat = sc->wb_cdata.wb_rx_head->wb_ptr->wb_status) &
sc 1015 dev/pci/if_wb.c cur_rx = sc->wb_cdata.wb_rx_head;
sc 1016 dev/pci/if_wb.c sc->wb_cdata.wb_rx_head = cur_rx->wb_nextdesc;
sc 1026 dev/pci/if_wb.c wb_newbuf(sc, cur_rx, m);
sc 1028 dev/pci/if_wb.c "bug, forcing reset\n", sc->sc_dev.dv_xname);
sc 1029 dev/pci/if_wb.c wb_fixmedia(sc);
sc 1030 dev/pci/if_wb.c wb_reset(sc);
sc 1031 dev/pci/if_wb.c wb_init(sc);
sc 1037 dev/pci/if_wb.c wb_newbuf(sc, cur_rx, m);
sc 1055 dev/pci/if_wb.c wb_newbuf(sc, cur_rx, m);
sc 1079 dev/pci/if_wb.c void wb_rxeoc(sc)
sc 1080 dev/pci/if_wb.c struct wb_softc *sc;
sc 1082 dev/pci/if_wb.c wb_rxeof(sc);
sc 1084 dev/pci/if_wb.c WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_RX_ON);
sc 1085 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_RXADDR, VTOPHYS(&sc->wb_ldata->wb_rx_list[0]));
sc 1086 dev/pci/if_wb.c WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_RX_ON);
sc 1087 dev/pci/if_wb.c if (CSR_READ_4(sc, WB_ISR) & WB_RXSTATE_SUSPEND)
sc 1088 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_RXSTART, 0xFFFFFFFF);
sc 1097 dev/pci/if_wb.c void wb_txeof(sc)
sc 1098 dev/pci/if_wb.c struct wb_softc *sc;
sc 1103 dev/pci/if_wb.c ifp = &sc->arpcom.ac_if;
sc 1108 dev/pci/if_wb.c if (sc->wb_cdata.wb_tx_head == NULL)
sc 1115 dev/pci/if_wb.c while(sc->wb_cdata.wb_tx_head->wb_mbuf != NULL) {
sc 1118 dev/pci/if_wb.c cur_tx = sc->wb_cdata.wb_tx_head;
sc 1138 dev/pci/if_wb.c if (sc->wb_cdata.wb_tx_head == sc->wb_cdata.wb_tx_tail) {
sc 1139 dev/pci/if_wb.c sc->wb_cdata.wb_tx_head = NULL;
sc 1140 dev/pci/if_wb.c sc->wb_cdata.wb_tx_tail = NULL;
sc 1144 dev/pci/if_wb.c sc->wb_cdata.wb_tx_head = cur_tx->wb_nextdesc;
sc 1153 dev/pci/if_wb.c void wb_txeoc(sc)
sc 1154 dev/pci/if_wb.c struct wb_softc *sc;
sc 1158 dev/pci/if_wb.c ifp = &sc->arpcom.ac_if;
sc 1162 dev/pci/if_wb.c if (sc->wb_cdata.wb_tx_head == NULL) {
sc 1164 dev/pci/if_wb.c sc->wb_cdata.wb_tx_tail = NULL;
sc 1166 dev/pci/if_wb.c if (WB_TXOWN(sc->wb_cdata.wb_tx_head) == WB_UNSENT) {
sc 1167 dev/pci/if_wb.c WB_TXOWN(sc->wb_cdata.wb_tx_head) = WB_TXSTAT_OWN;
sc 1169 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_TXSTART, 0xFFFFFFFF);
sc 1179 dev/pci/if_wb.c struct wb_softc *sc;
sc 1184 dev/pci/if_wb.c sc = arg;
sc 1185 dev/pci/if_wb.c ifp = &sc->arpcom.ac_if;
sc 1191 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_IMR, 0x00000000);
sc 1195 dev/pci/if_wb.c status = CSR_READ_4(sc, WB_ISR);
sc 1197 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_ISR, status);
sc 1206 dev/pci/if_wb.c wb_reset(sc);
sc 1208 dev/pci/if_wb.c wb_fixmedia(sc);
sc 1209 dev/pci/if_wb.c wb_init(sc);
sc 1214 dev/pci/if_wb.c wb_rxeof(sc);
sc 1217 dev/pci/if_wb.c wb_rxeoc(sc);
sc 1220 dev/pci/if_wb.c wb_txeof(sc);
sc 1223 dev/pci/if_wb.c wb_txeoc(sc);
sc 1226 dev/pci/if_wb.c wb_txeof(sc);
sc 1227 dev/pci/if_wb.c if (sc->wb_cdata.wb_tx_head != NULL) {
sc 1228 dev/pci/if_wb.c WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON);
sc 1229 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_TXSTART, 0xFFFFFFFF);
sc 1235 dev/pci/if_wb.c wb_txeof(sc);
sc 1236 dev/pci/if_wb.c WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON);
sc 1238 dev/pci/if_wb.c sc->wb_txthresh += WB_TXTHRESH_CHUNK;
sc 1239 dev/pci/if_wb.c WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_TX_THRESH);
sc 1240 dev/pci/if_wb.c WB_SETBIT(sc, WB_NETCFG, WB_TXTHRESH(sc->wb_txthresh));
sc 1241 dev/pci/if_wb.c WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON);
sc 1245 dev/pci/if_wb.c wb_reset(sc);
sc 1246 dev/pci/if_wb.c wb_init(sc);
sc 1252 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_IMR, WB_INTRS);
sc 1265 dev/pci/if_wb.c struct wb_softc *sc = xsc;
sc 1269 dev/pci/if_wb.c mii_tick(&sc->sc_mii);
sc 1271 dev/pci/if_wb.c timeout_add(&sc->wb_tick_tmo, hz);
sc 1278 dev/pci/if_wb.c int wb_encap(sc, c, m_head)
sc 1279 dev/pci/if_wb.c struct wb_softc *sc;
sc 1351 dev/pci/if_wb.c f->wb_data = VTOPHYS(&sc->wb_cdata.wb_pad);
sc 1375 dev/pci/if_wb.c struct wb_softc *sc;
sc 1379 dev/pci/if_wb.c sc = ifp->if_softc;
sc 1385 dev/pci/if_wb.c if (sc->wb_cdata.wb_tx_free->wb_mbuf != NULL) {
sc 1390 dev/pci/if_wb.c start_tx = sc->wb_cdata.wb_tx_free;
sc 1392 dev/pci/if_wb.c while(sc->wb_cdata.wb_tx_free->wb_mbuf == NULL) {
sc 1398 dev/pci/if_wb.c cur_tx = sc->wb_cdata.wb_tx_free;
sc 1399 dev/pci/if_wb.c sc->wb_cdata.wb_tx_free = cur_tx->wb_nextdesc;
sc 1402 dev/pci/if_wb.c wb_encap(sc, cur_tx, m_head);
sc 1433 dev/pci/if_wb.c sc->wb_cdata.wb_tx_tail = cur_tx;
sc 1435 dev/pci/if_wb.c if (sc->wb_cdata.wb_tx_head == NULL) {
sc 1436 dev/pci/if_wb.c sc->wb_cdata.wb_tx_head = start_tx;
sc 1438 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_TXSTART, 0xFFFFFFFF);
sc 1466 dev/pci/if_wb.c struct wb_softc *sc = xsc;
sc 1467 dev/pci/if_wb.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 1475 dev/pci/if_wb.c wb_stop(sc);
sc 1476 dev/pci/if_wb.c wb_reset(sc);
sc 1478 dev/pci/if_wb.c sc->wb_txthresh = WB_TXTHRESH_INIT;
sc 1484 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_BUSCTL, WB_BUSCTL_CONFIG);
sc 1485 dev/pci/if_wb.c WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_TX_THRESH);
sc 1486 dev/pci/if_wb.c WB_SETBIT(sc, WB_NETCFG, WB_TXTHRESH(sc->wb_txthresh));
sc 1489 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_BUSCTL, WB_BUSCTL_MUSTBEONE|WB_BUSCTL_ARBITRATION);
sc 1490 dev/pci/if_wb.c WB_SETBIT(sc, WB_BUSCTL, WB_BURSTLEN_16LONG);
sc 1491 dev/pci/if_wb.c switch(sc->wb_cachesize) {
sc 1493 dev/pci/if_wb.c WB_SETBIT(sc, WB_BUSCTL, WB_CACHEALIGN_32LONG);
sc 1496 dev/pci/if_wb.c WB_SETBIT(sc, WB_BUSCTL, WB_CACHEALIGN_16LONG);
sc 1499 dev/pci/if_wb.c WB_SETBIT(sc, WB_BUSCTL, WB_CACHEALIGN_8LONG);
sc 1503 dev/pci/if_wb.c WB_SETBIT(sc, WB_BUSCTL, WB_CACHEALIGN_NONE);
sc 1508 dev/pci/if_wb.c WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_TX_EARLY_ON);
sc 1512 dev/pci/if_wb.c CSR_WRITE_1(sc, WB_NODE0 + i, sc->arpcom.ac_enaddr[i]);
sc 1516 dev/pci/if_wb.c if (wb_list_rx_init(sc) == ENOBUFS) {
sc 1518 dev/pci/if_wb.c "memory for rx buffers\n", sc->sc_dev.dv_xname);
sc 1519 dev/pci/if_wb.c wb_stop(sc);
sc 1525 dev/pci/if_wb.c wb_list_tx_init(sc);
sc 1529 dev/pci/if_wb.c WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_RX_ALLPHYS);
sc 1531 dev/pci/if_wb.c WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_RX_ALLPHYS);
sc 1538 dev/pci/if_wb.c WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_RX_BROAD);
sc 1540 dev/pci/if_wb.c WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_RX_BROAD);
sc 1546 dev/pci/if_wb.c wb_setmulti(sc);
sc 1551 dev/pci/if_wb.c WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_RX_ON);
sc 1552 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_RXADDR, VTOPHYS(&sc->wb_ldata->wb_rx_list[0]));
sc 1557 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_IMR, WB_INTRS);
sc 1558 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_ISR, 0xFFFFFFFF);
sc 1561 dev/pci/if_wb.c WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_RX_ON);
sc 1562 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_RXSTART, 0xFFFFFFFF);
sc 1564 dev/pci/if_wb.c WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON);
sc 1565 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_TXADDR, VTOPHYS(&sc->wb_ldata->wb_tx_list[0]));
sc 1566 dev/pci/if_wb.c WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON);
sc 1573 dev/pci/if_wb.c timeout_set(&sc->wb_tick_tmo, wb_tick, sc);
sc 1574 dev/pci/if_wb.c timeout_add(&sc->wb_tick_tmo, hz);
sc 1586 dev/pci/if_wb.c struct wb_softc *sc = ifp->if_softc;
sc 1589 dev/pci/if_wb.c wb_init(sc);
sc 1602 dev/pci/if_wb.c struct wb_softc *sc = ifp->if_softc;
sc 1603 dev/pci/if_wb.c struct mii_data *mii = &sc->sc_mii;
sc 1615 dev/pci/if_wb.c struct wb_softc *sc = ifp->if_softc;
sc 1622 dev/pci/if_wb.c if ((error = ether_ioctl(ifp, &sc->arpcom, command, data)) > 0) {
sc 1633 dev/pci/if_wb.c wb_init(sc);
sc 1634 dev/pci/if_wb.c arp_ifinit(&sc->arpcom, ifa);
sc 1638 dev/pci/if_wb.c wb_init(sc);
sc 1643 dev/pci/if_wb.c wb_init(sc);
sc 1646 dev/pci/if_wb.c wb_stop(sc);
sc 1653 dev/pci/if_wb.c ether_addmulti(ifr, &sc->arpcom) :
sc 1654 dev/pci/if_wb.c ether_delmulti(ifr, &sc->arpcom);
sc 1662 dev/pci/if_wb.c wb_setmulti(sc);
sc 1668 dev/pci/if_wb.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, command);
sc 1683 dev/pci/if_wb.c struct wb_softc *sc;
sc 1685 dev/pci/if_wb.c sc = ifp->if_softc;
sc 1688 dev/pci/if_wb.c printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
sc 1691 dev/pci/if_wb.c if (!(wb_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT))
sc 1693 dev/pci/if_wb.c sc->sc_dev.dv_xname);
sc 1695 dev/pci/if_wb.c wb_stop(sc);
sc 1696 dev/pci/if_wb.c wb_reset(sc);
sc 1697 dev/pci/if_wb.c wb_init(sc);
sc 1709 dev/pci/if_wb.c void wb_stop(sc)
sc 1710 dev/pci/if_wb.c struct wb_softc *sc;
sc 1715 dev/pci/if_wb.c ifp = &sc->arpcom.ac_if;
sc 1718 dev/pci/if_wb.c timeout_del(&sc->wb_tick_tmo);
sc 1722 dev/pci/if_wb.c WB_CLRBIT(sc, WB_NETCFG, (WB_NETCFG_RX_ON|WB_NETCFG_TX_ON));
sc 1723 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_IMR, 0x00000000);
sc 1724 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_TXADDR, 0x00000000);
sc 1725 dev/pci/if_wb.c CSR_WRITE_4(sc, WB_RXADDR, 0x00000000);
sc 1731 dev/pci/if_wb.c if (sc->wb_cdata.wb_rx_chain[i].wb_mbuf != NULL) {
sc 1732 dev/pci/if_wb.c m_freem(sc->wb_cdata.wb_rx_chain[i].wb_mbuf);
sc 1733 dev/pci/if_wb.c sc->wb_cdata.wb_rx_chain[i].wb_mbuf = NULL;
sc 1736 dev/pci/if_wb.c bzero((char *)&sc->wb_ldata->wb_rx_list,
sc 1737 dev/pci/if_wb.c sizeof(sc->wb_ldata->wb_rx_list));
sc 1743 dev/pci/if_wb.c if (sc->wb_cdata.wb_tx_chain[i].wb_mbuf != NULL) {
sc 1744 dev/pci/if_wb.c m_freem(sc->wb_cdata.wb_tx_chain[i].wb_mbuf);
sc 1745 dev/pci/if_wb.c sc->wb_cdata.wb_tx_chain[i].wb_mbuf = NULL;
sc 1749 dev/pci/if_wb.c bzero((char *)&sc->wb_ldata->wb_tx_list,
sc 1750 dev/pci/if_wb.c sizeof(sc->wb_ldata->wb_tx_list));
sc 1760 dev/pci/if_wb.c struct wb_softc *sc = (struct wb_softc *)arg;
sc 1762 dev/pci/if_wb.c wb_stop(sc);
sc 385 dev/pci/if_wbreg.h #define CSR_WRITE_4(sc, reg, val) \
sc 386 dev/pci/if_wbreg.h bus_space_write_4(sc->wb_btag, sc->wb_bhandle, reg, val)
sc 387 dev/pci/if_wbreg.h #define CSR_WRITE_2(sc, reg, val) \
sc 388 dev/pci/if_wbreg.h bus_space_write_2(sc->wb_btag, sc->wb_bhandle, reg, val)
sc 389 dev/pci/if_wbreg.h #define CSR_WRITE_1(sc, reg, val) \
sc 390 dev/pci/if_wbreg.h bus_space_write_1(sc->wb_btag, sc->wb_bhandle, reg, val)
sc 392 dev/pci/if_wbreg.h #define CSR_READ_4(sc, reg) \
sc 393 dev/pci/if_wbreg.h bus_space_read_4(sc->wb_btag, sc->wb_bhandle, reg)
sc 394 dev/pci/if_wbreg.h #define CSR_READ_2(sc, reg) \
sc 395 dev/pci/if_wbreg.h bus_space_read_2(sc->wb_btag, sc->wb_bhandle, reg)
sc 396 dev/pci/if_wbreg.h #define CSR_READ_1(sc, reg) \
sc 397 dev/pci/if_wbreg.h bus_space_read_1(sc->wb_btag, sc->wb_bhandle, reg)
sc 79 dev/pci/if_wi_pci.c int wi_pci_acex_attach(struct pci_attach_args *pa, struct wi_softc *sc);
sc 80 dev/pci/if_wi_pci.c int wi_pci_plx_attach(struct pci_attach_args *pa, struct wi_softc *sc);
sc 81 dev/pci/if_wi_pci.c int wi_pci_tmd_attach(struct pci_attach_args *pa, struct wi_softc *sc);
sc 82 dev/pci/if_wi_pci.c int wi_pci_native_attach(struct pci_attach_args *pa, struct wi_softc *sc);
sc 83 dev/pci/if_wi_pci.c int wi_pci_common_attach(struct pci_attach_args *pa, struct wi_softc *sc);
sc 99 dev/pci/if_wi_pci.c int (*pp_attach)(struct pci_attach_args *pa, struct wi_softc *sc);
sc 146 dev/pci/if_wi_pci.c struct wi_softc *sc = (struct wi_softc *)self;
sc 151 dev/pci/if_wi_pci.c if (pp->pp_attach(pa, sc) != 0)
sc 154 dev/pci/if_wi_pci.c wi_attach(sc, &wi_func_io);
sc 156 dev/pci/if_wi_pci.c psc->sc_powerhook = powerhook_establish(wi_pci_power, sc);
sc 162 dev/pci/if_wi_pci.c struct wi_softc *sc = (struct wi_softc *)arg;
sc 165 dev/pci/if_wi_pci.c if (sc->sc_ic.ic_if.if_flags & IFF_UP)
sc 166 dev/pci/if_wi_pci.c wi_init(sc);
sc 187 dev/pci/if_wi_pci.c wi_pci_acex_attach(struct pci_attach_args *pa, struct wi_softc *sc)
sc 207 dev/pci/if_wi_pci.c sc->wi_ltag = localt;
sc 208 dev/pci/if_wi_pci.c sc->wi_lhandle = localh;
sc 217 dev/pci/if_wi_pci.c sc->wi_btag = iot;
sc 218 dev/pci/if_wi_pci.c sc->wi_bhandle = ioh;
sc 256 dev/pci/if_wi_pci.c if (wi_pci_common_attach(pa, sc) != 0) {
sc 268 dev/pci/if_wi_pci.c sc->wi_cor_offset = WI_ACEX_COR_OFFSET;
sc 294 dev/pci/if_wi_pci.c wi_pci_plx_attach(struct pci_attach_args *pa, struct wi_softc *sc)
sc 308 dev/pci/if_wi_pci.c sc->wi_ltag = memt;
sc 309 dev/pci/if_wi_pci.c sc->wi_lhandle = memh;
sc 317 dev/pci/if_wi_pci.c sc->wi_btag = iot;
sc 318 dev/pci/if_wi_pci.c sc->wi_bhandle = ioh;
sc 335 dev/pci/if_wi_pci.c if (wi_pci_common_attach(pa, sc) != 0) {
sc 356 dev/pci/if_wi_pci.c WI_PRT_ARG(sc));
sc 357 dev/pci/if_wi_pci.c pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
sc 383 dev/pci/if_wi_pci.c sc->wi_cor_offset = WI_PLX_COR_OFFSET;
sc 391 dev/pci/if_wi_pci.c CSR_WRITE_2(sc, WI_SW0, WI_DRVR_MAGIC);
sc 393 dev/pci/if_wi_pci.c if (CSR_READ_2(sc, WI_SW0) != WI_DRVR_MAGIC) {
sc 395 dev/pci/if_wi_pci.c WI_PRT_ARG(sc));
sc 396 dev/pci/if_wi_pci.c pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
sc 408 dev/pci/if_wi_pci.c wi_pci_plx_print_cis(sc);
sc 427 dev/pci/if_wi_pci.c wi_pci_tmd_attach(struct pci_attach_args *pa, struct wi_softc *sc)
sc 439 dev/pci/if_wi_pci.c sc->wi_ltag = localt;
sc 440 dev/pci/if_wi_pci.c sc->wi_lhandle = localh;
sc 448 dev/pci/if_wi_pci.c sc->wi_btag = iot;
sc 449 dev/pci/if_wi_pci.c sc->wi_bhandle = ioh;
sc 451 dev/pci/if_wi_pci.c if (wi_pci_common_attach(pa, sc) != 0) {
sc 462 dev/pci/if_wi_pci.c sc->wi_cor_offset = 0;
sc 468 dev/pci/if_wi_pci.c wi_pci_native_attach(struct pci_attach_args *pa, struct wi_softc *sc)
sc 479 dev/pci/if_wi_pci.c sc->wi_ltag = iot;
sc 480 dev/pci/if_wi_pci.c sc->wi_lhandle = ioh;
sc 481 dev/pci/if_wi_pci.c sc->wi_btag = iot;
sc 482 dev/pci/if_wi_pci.c sc->wi_bhandle = ioh;
sc 483 dev/pci/if_wi_pci.c sc->sc_pci = 1;
sc 485 dev/pci/if_wi_pci.c if (wi_pci_common_attach(pa, sc) != 0) {
sc 495 dev/pci/if_wi_pci.c sc->wi_cor_offset = WI_PCI_COR_OFFSET;
sc 501 dev/pci/if_wi_pci.c wi_pci_common_attach(struct pci_attach_args *pa, struct wi_softc *sc)
sc 508 dev/pci/if_wi_pci.c CSR_WRITE_2(sc, WI_INT_EN, 0);
sc 509 dev/pci/if_wi_pci.c CSR_WRITE_2(sc, WI_EVENT_ACK, 0xFFFF);
sc 517 dev/pci/if_wi_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, wi_intr, sc,
sc 518 dev/pci/if_wi_pci.c sc->sc_dev.dv_xname);
sc 519 dev/pci/if_wi_pci.c if (sc->sc_ih == NULL) {
sc 532 dev/pci/if_wi_pci.c wi_pci_plx_print_cis(struct wi_softc *sc)
sc 544 dev/pci/if_wi_pci.c value = bus_space_read_1(sc->wi_ltag, sc->wi_lhandle, i * 2);
sc 552 dev/pci/if_wi_pci.c cisbuf[i] = bus_space_read_1(sc->wi_ltag,
sc 553 dev/pci/if_wi_pci.c sc->wi_lhandle, (CIS_MFG_NAME_OFFSET + i) * 2);
sc 558 dev/pci/if_wi_pci.c printf("\n%s: \"%s, %s, %s\"", WI_PRT_ARG(sc),
sc 173 dev/pci/if_wpi.c struct wpi_softc *sc = (struct wpi_softc *)self;
sc 174 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 184 dev/pci/if_wpi.c sc->sc_pct = pa->pa_pc;
sc 185 dev/pci/if_wpi.c sc->sc_pcitag = pa->pa_tag;
sc 188 dev/pci/if_wpi.c data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
sc 190 dev/pci/if_wpi.c pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0x40, data);
sc 194 dev/pci/if_wpi.c PCI_MAPREG_MEM_TYPE_32BIT, 0, &memt, &memh, NULL, &sc->sc_sz, 0);
sc 200 dev/pci/if_wpi.c sc->sc_st = memt;
sc 201 dev/pci/if_wpi.c sc->sc_sh = memh;
sc 202 dev/pci/if_wpi.c sc->sc_dmat = pa->pa_dmat;
sc 209 dev/pci/if_wpi.c intrstr = pci_intr_string(sc->sc_pct, ih);
sc 210 dev/pci/if_wpi.c sc->sc_ih = pci_intr_establish(sc->sc_pct, ih, IPL_NET, wpi_intr, sc,
sc 211 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 212 dev/pci/if_wpi.c if (sc->sc_ih == NULL) {
sc 224 dev/pci/if_wpi.c if ((error = wpi_reset(sc)) != 0) {
sc 232 dev/pci/if_wpi.c if ((error = wpi_alloc_fwmem(sc)) != 0) {
sc 240 dev/pci/if_wpi.c if ((error = wpi_alloc_shared(sc)) != 0) {
sc 245 dev/pci/if_wpi.c if ((error = wpi_alloc_rpool(sc)) != 0) {
sc 251 dev/pci/if_wpi.c error = wpi_alloc_tx_ring(sc, &sc->txq[ac], WPI_TX_RING_COUNT,
sc 259 dev/pci/if_wpi.c error = wpi_alloc_tx_ring(sc, &sc->cmdq, WPI_CMD_RING_COUNT, 4);
sc 265 dev/pci/if_wpi.c error = wpi_alloc_rx_ring(sc, &sc->rxq);
sc 284 dev/pci/if_wpi.c wpi_read_eeprom(sc);
sc 294 dev/pci/if_wpi.c ifp->if_softc = sc;
sc 301 dev/pci/if_wpi.c memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 309 dev/pci/if_wpi.c sc->sc_newstate = ic->ic_newstate;
sc 313 dev/pci/if_wpi.c sc->amrr.amrr_min_success_threshold = 1;
sc 314 dev/pci/if_wpi.c sc->amrr.amrr_max_success_threshold = 15;
sc 317 dev/pci/if_wpi.c strlcpy(sc->sensordev.xname, sc->sc_dev.dv_xname,
sc 318 dev/pci/if_wpi.c sizeof sc->sensordev.xname);
sc 319 dev/pci/if_wpi.c strlcpy(sc->sensor.desc, "temperature 0 - 285",
sc 320 dev/pci/if_wpi.c sizeof sc->sensor.desc);
sc 321 dev/pci/if_wpi.c sc->sensor.type = SENSOR_INTEGER; /* not in muK! */
sc 323 dev/pci/if_wpi.c sc->sensor.value = 0;
sc 324 dev/pci/if_wpi.c sc->sensor.flags = SENSOR_FINVALID;
sc 325 dev/pci/if_wpi.c sensor_attach(&sc->sensordev, &sc->sensor);
sc 326 dev/pci/if_wpi.c sensordev_install(&sc->sensordev);
sc 328 dev/pci/if_wpi.c timeout_set(&sc->calib_to, wpi_calib_timeout, sc);
sc 330 dev/pci/if_wpi.c sc->powerhook = powerhook_establish(wpi_power, sc);
sc 333 dev/pci/if_wpi.c bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
sc 336 dev/pci/if_wpi.c sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
sc 337 dev/pci/if_wpi.c sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
sc 338 dev/pci/if_wpi.c sc->sc_rxtap.wr_ihdr.it_present = htole32(WPI_RX_RADIOTAP_PRESENT);
sc 340 dev/pci/if_wpi.c sc->sc_txtap_len = sizeof sc->sc_txtapu;
sc 341 dev/pci/if_wpi.c sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
sc 342 dev/pci/if_wpi.c sc->sc_txtap.wt_ihdr.it_present = htole32(WPI_TX_RADIOTAP_PRESENT);
sc 348 dev/pci/if_wpi.c fail4: wpi_free_tx_ring(sc, &sc->cmdq);
sc 350 dev/pci/if_wpi.c wpi_free_tx_ring(sc, &sc->txq[ac]);
sc 351 dev/pci/if_wpi.c wpi_free_rpool(sc);
sc 352 dev/pci/if_wpi.c fail2: wpi_free_shared(sc);
sc 353 dev/pci/if_wpi.c fail1: wpi_free_fwmem(sc);
sc 359 dev/pci/if_wpi.c struct wpi_softc *sc = arg;
sc 368 dev/pci/if_wpi.c data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
sc 370 dev/pci/if_wpi.c pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0x40, data);
sc 373 dev/pci/if_wpi.c ifp = &sc->sc_ic.ic_if;
sc 439 dev/pci/if_wpi.c wpi_alloc_shared(struct wpi_softc *sc)
sc 442 dev/pci/if_wpi.c return wpi_dma_contig_alloc(sc->sc_dmat, &sc->shared_dma,
sc 443 dev/pci/if_wpi.c (void **)&sc->shared, sizeof (struct wpi_shared), PAGE_SIZE,
sc 448 dev/pci/if_wpi.c wpi_free_shared(struct wpi_softc *sc)
sc 450 dev/pci/if_wpi.c wpi_dma_contig_free(&sc->shared_dma);
sc 457 dev/pci/if_wpi.c wpi_alloc_fwmem(struct wpi_softc *sc)
sc 460 dev/pci/if_wpi.c return wpi_dma_contig_alloc(sc->sc_dmat, &sc->fw_dma, NULL,
sc 466 dev/pci/if_wpi.c wpi_free_fwmem(struct wpi_softc *sc)
sc 468 dev/pci/if_wpi.c wpi_dma_contig_free(&sc->fw_dma);
sc 472 dev/pci/if_wpi.c wpi_alloc_rbuf(struct wpi_softc *sc)
sc 476 dev/pci/if_wpi.c rbuf = SLIST_FIRST(&sc->rxq.freelist);
sc 479 dev/pci/if_wpi.c SLIST_REMOVE_HEAD(&sc->rxq.freelist, next);
sc 491 dev/pci/if_wpi.c struct wpi_softc *sc = rbuf->sc;
sc 494 dev/pci/if_wpi.c SLIST_INSERT_HEAD(&sc->rxq.freelist, rbuf, next);
sc 498 dev/pci/if_wpi.c wpi_alloc_rpool(struct wpi_softc *sc)
sc 500 dev/pci/if_wpi.c struct wpi_rx_ring *ring = &sc->rxq;
sc 504 dev/pci/if_wpi.c error = wpi_dma_contig_alloc(sc->sc_dmat, &ring->buf_dma, NULL,
sc 508 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 517 dev/pci/if_wpi.c rbuf->sc = sc; /* backpointer for callbacks */
sc 527 dev/pci/if_wpi.c wpi_free_rpool(struct wpi_softc *sc)
sc 529 dev/pci/if_wpi.c wpi_dma_contig_free(&sc->rxq.buf_dma);
sc 533 dev/pci/if_wpi.c wpi_alloc_rx_ring(struct wpi_softc *sc, struct wpi_rx_ring *ring)
sc 539 dev/pci/if_wpi.c error = wpi_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma,
sc 544 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 558 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 562 dev/pci/if_wpi.c if ((rbuf = wpi_alloc_rbuf(sc)) == NULL) {
sc 566 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 579 dev/pci/if_wpi.c fail: wpi_free_rx_ring(sc, ring);
sc 584 dev/pci/if_wpi.c wpi_reset_rx_ring(struct wpi_softc *sc, struct wpi_rx_ring *ring)
sc 588 dev/pci/if_wpi.c wpi_mem_lock(sc);
sc 590 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_RX_CONFIG, 0);
sc 592 dev/pci/if_wpi.c if (WPI_READ(sc, WPI_RX_STATUS) & WPI_RX_IDLE)
sc 598 dev/pci/if_wpi.c printf("%s: timeout resetting Rx ring\n", sc->sc_dev.dv_xname);
sc 600 dev/pci/if_wpi.c wpi_mem_unlock(sc);
sc 606 dev/pci/if_wpi.c wpi_free_rx_ring(struct wpi_softc *sc, struct wpi_rx_ring *ring)
sc 619 dev/pci/if_wpi.c wpi_alloc_tx_ring(struct wpi_softc *sc, struct wpi_tx_ring *ring, int count,
sc 629 dev/pci/if_wpi.c error = wpi_dma_contig_alloc(sc->sc_dmat, &ring->desc_dma,
sc 634 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 639 dev/pci/if_wpi.c sc->shared->txbase[qid] = htole32(ring->desc_dma.paddr);
sc 641 dev/pci/if_wpi.c error = wpi_dma_contig_alloc(sc->sc_dmat, &ring->cmd_dma,
sc 646 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 654 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 663 dev/pci/if_wpi.c error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
sc 668 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 675 dev/pci/if_wpi.c fail: wpi_free_tx_ring(sc, ring);
sc 680 dev/pci/if_wpi.c wpi_reset_tx_ring(struct wpi_softc *sc, struct wpi_tx_ring *ring)
sc 684 dev/pci/if_wpi.c wpi_mem_lock(sc);
sc 686 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_TX_CONFIG(ring->qid), 0);
sc 688 dev/pci/if_wpi.c if (WPI_READ(sc, WPI_TX_STATUS) & WPI_TX_IDLE(ring->qid))
sc 695 dev/pci/if_wpi.c sc->sc_dev.dv_xname, ring->qid);
sc 698 dev/pci/if_wpi.c wpi_mem_unlock(sc);
sc 704 dev/pci/if_wpi.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 715 dev/pci/if_wpi.c wpi_free_tx_ring(struct wpi_softc *sc, struct wpi_tx_ring *ring)
sc 727 dev/pci/if_wpi.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 749 dev/pci/if_wpi.c struct wpi_softc *sc = ic->ic_if.if_softc;
sc 752 dev/pci/if_wpi.c ieee80211_amrr_node_init(&sc->amrr, &((struct wpi_node *)ni)->amn);
sc 780 dev/pci/if_wpi.c struct wpi_softc *sc = ifp->if_softc;
sc 784 dev/pci/if_wpi.c timeout_del(&sc->calib_to);
sc 792 dev/pci/if_wpi.c wpi_set_led(sc, WPI_LED_LINK, 20, 2);
sc 794 dev/pci/if_wpi.c if ((error = wpi_scan(sc, IEEE80211_CHAN_G)) != 0) {
sc 796 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 808 dev/pci/if_wpi.c sc->config.associd = 0;
sc 809 dev/pci/if_wpi.c sc->config.filter &= ~htole32(WPI_FILTER_BSS);
sc 811 dev/pci/if_wpi.c if ((error = wpi_auth(sc)) != 0) {
sc 813 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 821 dev/pci/if_wpi.c wpi_set_led(sc, WPI_LED_LINK, 5, 5);
sc 826 dev/pci/if_wpi.c wpi_enable_tsf(sc, ni);
sc 829 dev/pci/if_wpi.c sc->config.associd = htole16(ni->ni_associd & ~0xc000);
sc 831 dev/pci/if_wpi.c sc->config.flags &= ~htole32(WPI_CONFIG_SHPREAMBLE |
sc 834 dev/pci/if_wpi.c sc->config.flags |= htole32(WPI_CONFIG_SHSLOT);
sc 836 dev/pci/if_wpi.c sc->config.flags |= htole32(WPI_CONFIG_SHPREAMBLE);
sc 837 dev/pci/if_wpi.c sc->config.filter |= htole32(WPI_FILTER_BSS);
sc 839 dev/pci/if_wpi.c DPRINTF(("config chan %d flags %x\n", sc->config.chan,
sc 840 dev/pci/if_wpi.c sc->config.flags));
sc 841 dev/pci/if_wpi.c error = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->config,
sc 845 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 850 dev/pci/if_wpi.c if ((error = wpi_set_txpower(sc, ni->ni_chan, 1)) != 0) {
sc 852 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 862 dev/pci/if_wpi.c sc->calib_cnt = 0;
sc 863 dev/pci/if_wpi.c timeout_add(&sc->calib_to, hz / 2);
sc 866 dev/pci/if_wpi.c wpi_set_led(sc, WPI_LED_LINK, 0, 1);
sc 873 dev/pci/if_wpi.c return sc->sc_newstate(ic, nstate, arg);
sc 880 dev/pci/if_wpi.c wpi_mem_lock(struct wpi_softc *sc)
sc 885 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_GPIO_CTL);
sc 886 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_GPIO_CTL, tmp | WPI_GPIO_MAC);
sc 890 dev/pci/if_wpi.c if ((WPI_READ(sc, WPI_GPIO_CTL) &
sc 896 dev/pci/if_wpi.c printf("%s: could not lock memory\n", sc->sc_dev.dv_xname);
sc 903 dev/pci/if_wpi.c wpi_mem_unlock(struct wpi_softc *sc)
sc 905 dev/pci/if_wpi.c uint32_t tmp = WPI_READ(sc, WPI_GPIO_CTL);
sc 906 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_GPIO_CTL, tmp & ~WPI_GPIO_MAC);
sc 910 dev/pci/if_wpi.c wpi_mem_read(struct wpi_softc *sc, uint16_t addr)
sc 912 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_READ_MEM_ADDR, WPI_MEM_4 | addr);
sc 913 dev/pci/if_wpi.c return WPI_READ(sc, WPI_READ_MEM_DATA);
sc 917 dev/pci/if_wpi.c wpi_mem_write(struct wpi_softc *sc, uint16_t addr, uint32_t data)
sc 919 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_WRITE_MEM_ADDR, WPI_MEM_4 | addr);
sc 920 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_WRITE_MEM_DATA, data);
sc 924 dev/pci/if_wpi.c wpi_mem_write_region_4(struct wpi_softc *sc, uint16_t addr,
sc 928 dev/pci/if_wpi.c wpi_mem_write(sc, addr, *data);
sc 936 dev/pci/if_wpi.c wpi_read_prom_data(struct wpi_softc *sc, uint32_t addr, void *data, int len)
sc 942 dev/pci/if_wpi.c wpi_mem_lock(sc);
sc 944 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_EEPROM_CTL, addr << 2);
sc 947 dev/pci/if_wpi.c if ((val = WPI_READ(sc, WPI_EEPROM_CTL)) &
sc 954 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 961 dev/pci/if_wpi.c wpi_mem_unlock(sc);
sc 971 dev/pci/if_wpi.c wpi_load_microcode(struct wpi_softc *sc, const uint8_t *ucode, int size)
sc 977 dev/pci/if_wpi.c wpi_mem_lock(sc);
sc 980 dev/pci/if_wpi.c wpi_mem_write_region_4(sc, WPI_MEM_UCODE_BASE,
sc 983 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_UCODE_SRC, 0);
sc 984 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_UCODE_DST, WPI_FW_TEXT);
sc 985 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_UCODE_SIZE, size);
sc 988 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_UCODE_CTL, WPI_UC_RUN);
sc 992 dev/pci/if_wpi.c if (!(wpi_mem_read(sc, WPI_MEM_UCODE_CTL) & WPI_UC_RUN))
sc 997 dev/pci/if_wpi.c wpi_mem_unlock(sc);
sc 999 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 1002 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_UCODE_CTL, WPI_UC_ENABLE);
sc 1004 dev/pci/if_wpi.c wpi_mem_unlock(sc);
sc 1010 dev/pci/if_wpi.c wpi_load_firmware(struct wpi_softc *sc)
sc 1012 dev/pci/if_wpi.c struct wpi_dma_info *dma = &sc->fw_dma;
sc 1025 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 1032 dev/pci/if_wpi.c sc->sc_dev.dv_xname, size);
sc 1050 dev/pci/if_wpi.c printf("%s: invalid firmware header\n", sc->sc_dev.dv_xname);
sc 1059 dev/pci/if_wpi.c sc->sc_dev.dv_xname, size);
sc 1076 dev/pci/if_wpi.c wpi_mem_lock(sc);
sc 1077 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_DATA_BASE, dma->paddr);
sc 1078 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_DATA_SIZE, init_datasz);
sc 1079 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_TEXT_BASE,
sc 1081 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_TEXT_SIZE, init_textsz);
sc 1082 dev/pci/if_wpi.c wpi_mem_unlock(sc);
sc 1085 dev/pci/if_wpi.c if ((error = wpi_load_microcode(sc, boot_text, boot_textsz)) != 0) {
sc 1087 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 1092 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_RESET, 0);
sc 1095 dev/pci/if_wpi.c if ((error = tsleep(sc, PCATCH, "wpiinit", hz)) != 0) {
sc 1098 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 1107 dev/pci/if_wpi.c wpi_mem_lock(sc);
sc 1108 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_DATA_BASE, dma->paddr);
sc 1109 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_DATA_SIZE, main_datasz);
sc 1110 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_TEXT_BASE,
sc 1112 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_TEXT_SIZE, WPI_FW_UPDATED | main_textsz);
sc 1113 dev/pci/if_wpi.c wpi_mem_unlock(sc);
sc 1116 dev/pci/if_wpi.c if ((error = tsleep(sc, PCATCH, "wpiinit", hz)) != 0) {
sc 1119 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 1129 dev/pci/if_wpi.c struct wpi_softc *sc = arg;
sc 1130 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1137 dev/pci/if_wpi.c wpi_iter_func(sc, ic->ic_bss);
sc 1139 dev/pci/if_wpi.c ieee80211_iterate_nodes(ic, wpi_iter_func, sc);
sc 1144 dev/pci/if_wpi.c temp = (int)WPI_READ(sc, WPI_TEMPERATURE);
sc 1145 dev/pci/if_wpi.c sc->sensor.value = temp + 260;
sc 1148 dev/pci/if_wpi.c if (++sc->calib_cnt >= 120) {
sc 1149 dev/pci/if_wpi.c wpi_power_calibration(sc, temp);
sc 1150 dev/pci/if_wpi.c sc->calib_cnt = 0;
sc 1153 dev/pci/if_wpi.c timeout_add(&sc->calib_to, hz / 2);
sc 1159 dev/pci/if_wpi.c struct wpi_softc *sc = arg;
sc 1162 dev/pci/if_wpi.c ieee80211_amrr_choose(&sc->amrr, ni, &wn->amn);
sc 1170 dev/pci/if_wpi.c wpi_power_calibration(struct wpi_softc *sc, int temp)
sc 1179 dev/pci/if_wpi.c DPRINTF(("temperature %d->%d\n", sc->temp, temp));
sc 1182 dev/pci/if_wpi.c if (abs(temp - sc->temp) <= 6)
sc 1185 dev/pci/if_wpi.c sc->temp = temp;
sc 1187 dev/pci/if_wpi.c if (wpi_set_txpower(sc, sc->sc_ic.ic_bss->ni_chan, 1) != 0) {
sc 1190 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 1195 dev/pci/if_wpi.c wpi_rx_intr(struct wpi_softc *sc, struct wpi_rx_desc *desc,
sc 1198 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1200 dev/pci/if_wpi.c struct wpi_rx_ring *ring = &sc->rxq;
sc 1213 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 1242 dev/pci/if_wpi.c if ((rbuf = wpi_alloc_rbuf(sc)) == NULL) {
sc 1262 dev/pci/if_wpi.c if (sc->sc_drvbpf != NULL) {
sc 1264 dev/pci/if_wpi.c struct wpi_rx_radiotap_header *tap = &sc->sc_rxtap;
sc 1297 dev/pci/if_wpi.c mb.m_len = sc->sc_rxtap_len;
sc 1302 dev/pci/if_wpi.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
sc 1318 dev/pci/if_wpi.c wpi_tx_intr(struct wpi_softc *sc, struct wpi_rx_desc *desc)
sc 1320 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1322 dev/pci/if_wpi.c struct wpi_tx_ring *ring = &sc->txq[desc->qid & 0x3];
sc 1348 dev/pci/if_wpi.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 1356 dev/pci/if_wpi.c sc->sc_tx_timer = 0;
sc 1362 dev/pci/if_wpi.c wpi_cmd_intr(struct wpi_softc *sc, struct wpi_rx_desc *desc)
sc 1364 dev/pci/if_wpi.c struct wpi_tx_ring *ring = &sc->cmdq;
sc 1374 dev/pci/if_wpi.c bus_dmamap_unload(sc->sc_dmat, data->map);
sc 1383 dev/pci/if_wpi.c wpi_notif_intr(struct wpi_softc *sc)
sc 1385 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1389 dev/pci/if_wpi.c hw = letoh32(sc->shared->next);
sc 1390 dev/pci/if_wpi.c while (sc->rxq.cur != hw) {
sc 1391 dev/pci/if_wpi.c struct wpi_rx_data *data = &sc->rxq.data[sc->rxq.cur];
sc 1399 dev/pci/if_wpi.c wpi_cmd_intr(sc, desc);
sc 1404 dev/pci/if_wpi.c wpi_rx_intr(sc, desc, data);
sc 1409 dev/pci/if_wpi.c wpi_tx_intr(sc, desc);
sc 1424 dev/pci/if_wpi.c "failed\n", sc->sc_dev.dv_xname);
sc 1438 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 1471 dev/pci/if_wpi.c if (wpi_scan(sc, IEEE80211_CHAN_A) == 0)
sc 1479 dev/pci/if_wpi.c sc->rxq.cur = (sc->rxq.cur + 1) % WPI_RX_RING_COUNT;
sc 1484 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_RX_WIDX, hw & ~7);
sc 1490 dev/pci/if_wpi.c struct wpi_softc *sc = arg;
sc 1491 dev/pci/if_wpi.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1494 dev/pci/if_wpi.c r = WPI_READ(sc, WPI_INTR);
sc 1501 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_MASK, 0);
sc 1503 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_INTR, r);
sc 1507 dev/pci/if_wpi.c printf("%s: fatal firmware error\n", sc->sc_dev.dv_xname);
sc 1514 dev/pci/if_wpi.c wpi_notif_intr(sc);
sc 1517 dev/pci/if_wpi.c wakeup(sc);
sc 1521 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_MASK, WPI_INTR_MASK);
sc 1556 dev/pci/if_wpi.c wpi_tx_data(struct wpi_softc *sc, struct mbuf *m0, struct ieee80211_node *ni,
sc 1559 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1560 dev/pci/if_wpi.c struct wpi_tx_ring *ring = &sc->txq[ac];
sc 1588 dev/pci/if_wpi.c if (sc->sc_drvbpf != NULL) {
sc 1590 dev/pci/if_wpi.c struct wpi_tx_radiotap_header *tap = &sc->sc_txtap;
sc 1601 dev/pci/if_wpi.c mb.m_len = sc->sc_txtap_len;
sc 1606 dev/pci/if_wpi.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 1693 dev/pci/if_wpi.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
sc 1697 dev/pci/if_wpi.c sc->sc_dev.dv_xname, error);
sc 1724 dev/pci/if_wpi.c error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
sc 1728 dev/pci/if_wpi.c sc->sc_dev.dv_xname, error);
sc 1757 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur);
sc 1765 dev/pci/if_wpi.c struct wpi_softc *sc = ifp->if_softc;
sc 1766 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1781 dev/pci/if_wpi.c if (sc->txq[0].queued >= sc->txq[0].count - 8) {
sc 1793 dev/pci/if_wpi.c if (wpi_tx_data(sc, m0, ni, 0) != 0)
sc 1802 dev/pci/if_wpi.c if (sc->txq[0].queued >= sc->txq[0].count - 8) {
sc 1819 dev/pci/if_wpi.c if (wpi_tx_data(sc, m0, ni, 0) != 0) {
sc 1827 dev/pci/if_wpi.c sc->sc_tx_timer = 5;
sc 1835 dev/pci/if_wpi.c struct wpi_softc *sc = ifp->if_softc;
sc 1839 dev/pci/if_wpi.c if (sc->sc_tx_timer > 0) {
sc 1840 dev/pci/if_wpi.c if (--sc->sc_tx_timer == 0) {
sc 1841 dev/pci/if_wpi.c printf("%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1856 dev/pci/if_wpi.c struct wpi_softc *sc = ifp->if_softc;
sc 1857 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1910 dev/pci/if_wpi.c wpi_read_eeprom(struct wpi_softc *sc)
sc 1912 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1916 dev/pci/if_wpi.c wpi_read_prom_data(sc, WPI_EEPROM_CAPABILITIES, &sc->cap, 1);
sc 1917 dev/pci/if_wpi.c wpi_read_prom_data(sc, WPI_EEPROM_REVISION, &sc->rev, 2);
sc 1918 dev/pci/if_wpi.c wpi_read_prom_data(sc, WPI_EEPROM_TYPE, &sc->type, 1);
sc 1920 dev/pci/if_wpi.c DPRINTF(("cap=%x rev=%x type=%x\n", sc->cap, letoh16(sc->rev),
sc 1921 dev/pci/if_wpi.c sc->type));
sc 1924 dev/pci/if_wpi.c wpi_read_prom_data(sc, WPI_EEPROM_DOMAIN, domain, 4);
sc 1928 dev/pci/if_wpi.c wpi_read_prom_data(sc, WPI_EEPROM_MAC, ic->ic_myaddr, 6);
sc 1933 dev/pci/if_wpi.c wpi_read_eeprom_channels(sc, i);
sc 1937 dev/pci/if_wpi.c wpi_read_eeprom_group(sc, i);
sc 1941 dev/pci/if_wpi.c wpi_read_eeprom_channels(struct wpi_softc *sc, int n)
sc 1943 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 1948 dev/pci/if_wpi.c wpi_read_prom_data(sc, band->addr, channels,
sc 1986 dev/pci/if_wpi.c sc->maxpwr[chan] = channels[i].maxpwr;
sc 1989 dev/pci/if_wpi.c chan, channels[i].flags, sc->maxpwr[chan]));
sc 1994 dev/pci/if_wpi.c wpi_read_eeprom_group(struct wpi_softc *sc, int n)
sc 1996 dev/pci/if_wpi.c struct wpi_power_group *group = &sc->groups[n];
sc 2000 dev/pci/if_wpi.c wpi_read_prom_data(sc, WPI_EEPROM_POWER_GRP + n * 32, &rgroup,
sc 2025 dev/pci/if_wpi.c wpi_cmd(struct wpi_softc *sc, int code, const void *buf, int size, int async)
sc 2027 dev/pci/if_wpi.c struct wpi_tx_ring *ring = &sc->cmdq;
sc 2049 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur);
sc 2058 dev/pci/if_wpi.c wpi_mrr_setup(struct wpi_softc *sc)
sc 2060 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 2090 dev/pci/if_wpi.c error = wpi_cmd(sc, WPI_CMD_MRR_SETUP, &mrr, sizeof mrr, 0);
sc 2093 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 2099 dev/pci/if_wpi.c error = wpi_cmd(sc, WPI_CMD_MRR_SETUP, &mrr, sizeof mrr, 0);
sc 2102 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 2110 dev/pci/if_wpi.c wpi_set_led(struct wpi_softc *sc, uint8_t which, uint8_t off, uint8_t on)
sc 2119 dev/pci/if_wpi.c (void)wpi_cmd(sc, WPI_CMD_SET_LED, &led, sizeof led, 1);
sc 2123 dev/pci/if_wpi.c wpi_enable_tsf(struct wpi_softc *sc, struct ieee80211_node *ni)
sc 2141 dev/pci/if_wpi.c if (wpi_cmd(sc, WPI_CMD_TSF, &tsf, sizeof tsf, 1) != 0)
sc 2142 dev/pci/if_wpi.c printf("%s: could not enable TSF\n", sc->sc_dev.dv_xname);
sc 2149 dev/pci/if_wpi.c wpi_set_txpower(struct wpi_softc *sc, struct ieee80211_channel *c, int async)
sc 2151 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 2162 dev/pci/if_wpi.c for (group = &sc->groups[1]; group < &sc->groups[4]; group++)
sc 2166 dev/pci/if_wpi.c group = &sc->groups[0];
sc 2175 dev/pci/if_wpi.c int idx = wpi_get_power_index(sc, group, c,
sc 2191 dev/pci/if_wpi.c return wpi_cmd(sc, WPI_CMD_TXPOWER, &txpower, sizeof txpower, async);
sc 2200 dev/pci/if_wpi.c wpi_get_power_index(struct wpi_softc *sc, struct wpi_power_group *group,
sc 2211 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 2236 dev/pci/if_wpi.c pwr = min(pwr, sc->maxpwr[chan]);
sc 2251 dev/pci/if_wpi.c idx -= (sc->temp - group->temp) * 11 / 100;
sc 2274 dev/pci/if_wpi.c wpi_setup_beacon(struct wpi_softc *sc, struct ieee80211_node *ni)
sc 2276 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 2277 dev/pci/if_wpi.c struct wpi_tx_ring *ring = &sc->cmdq;
sc 2291 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 2317 dev/pci/if_wpi.c error = bus_dmamap_load(sc->sc_dmat, data->map, mtod(m0, void *),
sc 2320 dev/pci/if_wpi.c printf("%s: could not map beacon\n", sc->sc_dev.dv_xname);
sc 2337 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur);
sc 2344 dev/pci/if_wpi.c wpi_auth(struct wpi_softc *sc)
sc 2346 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 2352 dev/pci/if_wpi.c IEEE80211_ADDR_COPY(sc->config.bssid, ni->ni_bssid);
sc 2353 dev/pci/if_wpi.c sc->config.chan = ieee80211_chan2ieee(ic, ni->ni_chan);
sc 2355 dev/pci/if_wpi.c sc->config.flags |= htole32(WPI_CONFIG_AUTO |
sc 2360 dev/pci/if_wpi.c sc->config.cck_mask = 0;
sc 2361 dev/pci/if_wpi.c sc->config.ofdm_mask = 0x15;
sc 2364 dev/pci/if_wpi.c sc->config.cck_mask = 0x03;
sc 2365 dev/pci/if_wpi.c sc->config.ofdm_mask = 0;
sc 2368 dev/pci/if_wpi.c sc->config.cck_mask = 0x0f;
sc 2369 dev/pci/if_wpi.c sc->config.ofdm_mask = 0x15;
sc 2372 dev/pci/if_wpi.c sc->config.flags |= htole32(WPI_CONFIG_SHSLOT);
sc 2374 dev/pci/if_wpi.c sc->config.flags |= htole32(WPI_CONFIG_SHPREAMBLE);
sc 2375 dev/pci/if_wpi.c DPRINTF(("config chan %d flags %x cck %x ofdm %x\n", sc->config.chan,
sc 2376 dev/pci/if_wpi.c sc->config.flags, sc->config.cck_mask, sc->config.ofdm_mask));
sc 2377 dev/pci/if_wpi.c error = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->config,
sc 2380 dev/pci/if_wpi.c printf("%s: could not configure\n", sc->sc_dev.dv_xname);
sc 2385 dev/pci/if_wpi.c if ((error = wpi_set_txpower(sc, ni->ni_chan, 1)) != 0) {
sc 2386 dev/pci/if_wpi.c printf("%s: could not set Tx power\n", sc->sc_dev.dv_xname);
sc 2398 dev/pci/if_wpi.c error = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof node, 1);
sc 2400 dev/pci/if_wpi.c printf("%s: could not add BSS node\n", sc->sc_dev.dv_xname);
sc 2412 dev/pci/if_wpi.c wpi_scan(struct wpi_softc *sc, uint16_t flags)
sc 2414 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 2415 dev/pci/if_wpi.c struct wpi_tx_ring *ring = &sc->cmdq;
sc 2434 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 2442 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 2545 dev/pci/if_wpi.c error = bus_dmamap_load(sc->sc_dmat, data->map, cmd, pktlen, NULL,
sc 2549 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 2561 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_TX_WIDX, ring->qid << 8 | ring->cur);
sc 2567 dev/pci/if_wpi.c wpi_config(struct wpi_softc *sc)
sc 2569 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 2579 dev/pci/if_wpi.c error = wpi_cmd(sc, WPI_CMD_SET_POWER_MODE, &power, sizeof power, 0);
sc 2581 dev/pci/if_wpi.c printf("%s: could not set power mode\n", sc->sc_dev.dv_xname);
sc 2590 dev/pci/if_wpi.c error = wpi_cmd(sc, WPI_CMD_BLUETOOTH, &bluetooth, sizeof bluetooth,
sc 2594 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 2599 dev/pci/if_wpi.c memset(&sc->config, 0, sizeof (struct wpi_config));
sc 2601 dev/pci/if_wpi.c IEEE80211_ADDR_COPY(sc->config.myaddr, ic->ic_myaddr);
sc 2603 dev/pci/if_wpi.c sc->config.chan = ieee80211_chan2ieee(ic, ic->ic_ibss_chan);
sc 2604 dev/pci/if_wpi.c sc->config.flags = htole32(WPI_CONFIG_TSF);
sc 2606 dev/pci/if_wpi.c sc->config.flags |= htole32(WPI_CONFIG_AUTO |
sc 2609 dev/pci/if_wpi.c sc->config.filter = 0;
sc 2612 dev/pci/if_wpi.c sc->config.mode = WPI_MODE_STA;
sc 2613 dev/pci/if_wpi.c sc->config.filter |= htole32(WPI_FILTER_MULTICAST);
sc 2617 dev/pci/if_wpi.c sc->config.mode = WPI_MODE_IBSS;
sc 2620 dev/pci/if_wpi.c sc->config.mode = WPI_MODE_HOSTAP;
sc 2623 dev/pci/if_wpi.c sc->config.mode = WPI_MODE_MONITOR;
sc 2624 dev/pci/if_wpi.c sc->config.filter |= htole32(WPI_FILTER_MULTICAST |
sc 2628 dev/pci/if_wpi.c sc->config.cck_mask = 0x0f; /* not yet negotiated */
sc 2629 dev/pci/if_wpi.c sc->config.ofdm_mask = 0xff; /* not yet negotiated */
sc 2630 dev/pci/if_wpi.c error = wpi_cmd(sc, WPI_CMD_CONFIGURE, &sc->config,
sc 2633 dev/pci/if_wpi.c printf("%s: configure command failed\n", sc->sc_dev.dv_xname);
sc 2638 dev/pci/if_wpi.c if ((error = wpi_set_txpower(sc, ic->ic_ibss_chan, 0)) != 0) {
sc 2639 dev/pci/if_wpi.c printf("%s: could not set Tx power\n", sc->sc_dev.dv_xname);
sc 2650 dev/pci/if_wpi.c error = wpi_cmd(sc, WPI_CMD_ADD_NODE, &node, sizeof node, 0);
sc 2653 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 2657 dev/pci/if_wpi.c if ((error = wpi_mrr_setup(sc)) != 0) {
sc 2658 dev/pci/if_wpi.c printf("%s: could not setup MRR\n", sc->sc_dev.dv_xname);
sc 2666 dev/pci/if_wpi.c wpi_stop_master(struct wpi_softc *sc)
sc 2671 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_RESET);
sc 2672 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_RESET, tmp | WPI_STOP_MASTER);
sc 2674 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_GPIO_CTL);
sc 2679 dev/pci/if_wpi.c if (WPI_READ(sc, WPI_RESET) & WPI_MASTER_DISABLED)
sc 2685 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 2690 dev/pci/if_wpi.c wpi_power_up(struct wpi_softc *sc)
sc 2695 dev/pci/if_wpi.c wpi_mem_lock(sc);
sc 2696 dev/pci/if_wpi.c tmp = wpi_mem_read(sc, WPI_MEM_POWER);
sc 2697 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_POWER, tmp & ~0x03000000);
sc 2698 dev/pci/if_wpi.c wpi_mem_unlock(sc);
sc 2701 dev/pci/if_wpi.c if (WPI_READ(sc, WPI_GPIO_STATUS) & WPI_POWERED)
sc 2707 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 2714 dev/pci/if_wpi.c wpi_reset(struct wpi_softc *sc)
sc 2720 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_INTR, 0xffffffff);
sc 2722 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_PLL_CTL);
sc 2723 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_PLL_CTL, tmp | WPI_PLL_INIT);
sc 2725 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_CHICKEN);
sc 2726 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_CHICKEN, tmp | WPI_CHICKEN_RXNOLOS);
sc 2728 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_GPIO_CTL);
sc 2729 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_GPIO_CTL, tmp | WPI_GPIO_INIT);
sc 2733 dev/pci/if_wpi.c if (WPI_READ(sc, WPI_GPIO_CTL) & WPI_GPIO_CLOCK)
sc 2739 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 2744 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_EEPROM_STATUS);
sc 2746 dev/pci/if_wpi.c printf("%s: EEPROM not found\n", sc->sc_dev.dv_xname);
sc 2749 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_EEPROM_STATUS, tmp & ~WPI_EEPROM_LOCKED);
sc 2755 dev/pci/if_wpi.c wpi_hw_config(struct wpi_softc *sc)
sc 2760 dev/pci/if_wpi.c hw = WPI_READ(sc, WPI_HWCONFIG);
sc 2762 dev/pci/if_wpi.c rev = pci_conf_read(sc->sc_pct, sc->sc_pcitag, PCI_CLASS_REG);
sc 2769 dev/pci/if_wpi.c if (sc->cap == 0x80)
sc 2773 dev/pci/if_wpi.c if ((letoh16(sc->rev) & 0xf0) == 0xd0)
sc 2776 dev/pci/if_wpi.c if (sc->type > 1)
sc 2780 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_HWCONFIG, hw);
sc 2786 dev/pci/if_wpi.c struct wpi_softc *sc = ifp->if_softc;
sc 2787 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 2791 dev/pci/if_wpi.c (void)wpi_reset(sc);
sc 2793 dev/pci/if_wpi.c wpi_mem_lock(sc);
sc 2794 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_CLOCK1, 0xa00);
sc 2796 dev/pci/if_wpi.c tmp = wpi_mem_read(sc, WPI_MEM_PCIDEV);
sc 2797 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_PCIDEV, tmp | 0x800);
sc 2798 dev/pci/if_wpi.c wpi_mem_unlock(sc);
sc 2800 dev/pci/if_wpi.c (void)wpi_power_up(sc);
sc 2801 dev/pci/if_wpi.c wpi_hw_config(sc);
sc 2804 dev/pci/if_wpi.c wpi_mem_lock(sc);
sc 2805 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_RX_BASE, sc->rxq.desc_dma.paddr);
sc 2806 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_RX_RIDX_PTR, sc->shared_dma.paddr +
sc 2808 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_RX_WIDX, (WPI_RX_RING_COUNT - 1) & ~7);
sc 2809 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_RX_CONFIG, 0xa9601010);
sc 2810 dev/pci/if_wpi.c wpi_mem_unlock(sc);
sc 2813 dev/pci/if_wpi.c wpi_mem_lock(sc);
sc 2814 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_MODE, 2); /* bypass mode */
sc 2815 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_RA, 1); /* enable RA0 */
sc 2816 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_TXCFG, 0x3f); /* enable all 6 Tx rings */
sc 2817 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_BYPASS1, 0x10000);
sc 2818 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_BYPASS2, 0x30002);
sc 2819 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_MAGIC4, 4);
sc 2820 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_MAGIC5, 5);
sc 2822 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_TX_BASE_PTR, sc->shared_dma.paddr);
sc 2823 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_MSG_CONFIG, 0xffff05a5);
sc 2826 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_TX_CTL(qid), 0);
sc 2827 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_TX_BASE(qid), 0);
sc 2828 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_TX_CONFIG(qid), 0x80200008);
sc 2830 dev/pci/if_wpi.c wpi_mem_unlock(sc);
sc 2833 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_UCODE_CLR, WPI_RADIO_OFF);
sc 2834 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_UCODE_CLR, WPI_DISABLE_CMD);
sc 2837 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_INTR, 0xffffffff);
sc 2839 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_MASK, WPI_INTR_MASK);
sc 2842 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_UCODE_CLR, WPI_RADIO_OFF);
sc 2843 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_UCODE_CLR, WPI_RADIO_OFF);
sc 2845 dev/pci/if_wpi.c if ((error = wpi_load_firmware(sc)) != 0) {
sc 2846 dev/pci/if_wpi.c printf("%s: could not load firmware\n", sc->sc_dev.dv_xname);
sc 2852 dev/pci/if_wpi.c if ((sc->temp = (int)WPI_READ(sc, WPI_TEMPERATURE)) != 0)
sc 2858 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 2862 dev/pci/if_wpi.c DPRINTF(("temperature %d\n", sc->temp));
sc 2863 dev/pci/if_wpi.c sc->sensor.value = sc->temp + 260;
sc 2864 dev/pci/if_wpi.c sc->sensor.flags &= ~SENSOR_FINVALID;
sc 2866 dev/pci/if_wpi.c if ((error = wpi_config(sc)) != 0) {
sc 2868 dev/pci/if_wpi.c sc->sc_dev.dv_xname);
sc 2889 dev/pci/if_wpi.c struct wpi_softc *sc = ifp->if_softc;
sc 2890 dev/pci/if_wpi.c struct ieee80211com *ic = &sc->sc_ic;
sc 2894 dev/pci/if_wpi.c ifp->if_timer = sc->sc_tx_timer = 0;
sc 2900 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_MASK, 0);
sc 2901 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_INTR, WPI_INTR_MASK);
sc 2902 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_INTR_STATUS, 0xff);
sc 2903 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_INTR_STATUS, 0x00070000);
sc 2905 dev/pci/if_wpi.c wpi_mem_lock(sc);
sc 2906 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_MODE, 0);
sc 2907 dev/pci/if_wpi.c wpi_mem_unlock(sc);
sc 2911 dev/pci/if_wpi.c wpi_reset_tx_ring(sc, &sc->txq[ac]);
sc 2912 dev/pci/if_wpi.c wpi_reset_tx_ring(sc, &sc->cmdq);
sc 2915 dev/pci/if_wpi.c wpi_reset_rx_ring(sc, &sc->rxq);
sc 2918 dev/pci/if_wpi.c sc->sensor.value = 0;
sc 2919 dev/pci/if_wpi.c sc->sensor.flags |= SENSOR_FINVALID;
sc 2921 dev/pci/if_wpi.c wpi_mem_lock(sc);
sc 2922 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_CLOCK2, 0x200);
sc 2923 dev/pci/if_wpi.c wpi_mem_unlock(sc);
sc 2927 dev/pci/if_wpi.c wpi_stop_master(sc);
sc 2929 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_RESET);
sc 2930 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_RESET, tmp | WPI_SW_RESET);
sc 719 dev/pci/if_wpireg.h #define WPI_READ(sc, reg) \
sc 720 dev/pci/if_wpireg.h bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
sc 722 dev/pci/if_wpireg.h #define WPI_WRITE(sc, reg, val) \
sc 723 dev/pci/if_wpireg.h bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
sc 725 dev/pci/if_wpireg.h #define WPI_WRITE_REGION_4(sc, offset, datap, count) \
sc 726 dev/pci/if_wpireg.h bus_space_write_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
sc 88 dev/pci/if_wpivar.h struct wpi_softc *sc;
sc 242 dev/pci/if_xge.c #define PIF_WCSR(csr, val) pif_wcsr(sc, csr, val)
sc 243 dev/pci/if_xge.c #define PIF_RCSR(csr) pif_rcsr(sc, csr)
sc 244 dev/pci/if_xge.c #define TXP_WCSR(csr, val) txp_wcsr(sc, csr, val)
sc 245 dev/pci/if_xge.c #define PIF_WKEY(csr, val) pif_wkey(sc, csr, val)
sc 248 dev/pci/if_xge.c pif_wcsr(struct xge_softc *sc, bus_size_t csr, uint64_t val)
sc 255 dev/pci/if_xge.c bus_space_write_4(sc->sc_st, sc->sc_sh, csr, lval);
sc 256 dev/pci/if_xge.c bus_space_write_4(sc->sc_st, sc->sc_sh, csr+4, hval);
sc 260 dev/pci/if_xge.c pif_rcsr(struct xge_softc *sc, bus_size_t csr)
sc 264 dev/pci/if_xge.c val = bus_space_read_4(sc->sc_st, sc->sc_sh, csr);
sc 265 dev/pci/if_xge.c val2 = bus_space_read_4(sc->sc_st, sc->sc_sh, csr+4);
sc 271 dev/pci/if_xge.c txp_wcsr(struct xge_softc *sc, bus_size_t csr, uint64_t val)
sc 278 dev/pci/if_xge.c bus_space_write_4(sc->sc_txt, sc->sc_txh, csr, lval);
sc 279 dev/pci/if_xge.c bus_space_write_4(sc->sc_txt, sc->sc_txh, csr+4, hval);
sc 284 dev/pci/if_xge.c pif_wkey(struct xge_softc *sc, bus_size_t csr, uint64_t val)
sc 291 dev/pci/if_xge.c if (sc->xge_type == XGE_TYPE_XENA)
sc 294 dev/pci/if_xge.c bus_space_write_4(sc->sc_st, sc->sc_sh, csr, lval);
sc 296 dev/pci/if_xge.c if (sc->xge_type == XGE_TYPE_XENA)
sc 299 dev/pci/if_xge.c bus_space_write_4(sc->sc_st, sc->sc_sh, csr+4, hval);
sc 310 dev/pci/if_xge.c #define XNAME sc->sc_dev.dv_xname
sc 313 dev/pci/if_xge.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rxmap, \
sc 316 dev/pci/if_xge.c #define XGE_RXD(desc) &sc->sc_rxd_4k[desc/NDESC_BUFMODE]-> \
sc 342 dev/pci/if_xge.c struct xge_softc *sc;
sc 352 dev/pci/if_xge.c sc = (struct xge_softc *)self;
sc 354 dev/pci/if_xge.c sc->sc_dmat = pa->pa_dmat;
sc 357 dev/pci/if_xge.c sc->xge_type = XGE_TYPE_XENA;
sc 359 dev/pci/if_xge.c sc->xge_type = XGE_TYPE_HERC;
sc 364 dev/pci/if_xge.c &sc->sc_st, &sc->sc_sh, 0, 0, 0)) {
sc 371 dev/pci/if_xge.c &sc->sc_txt, &sc->sc_txh, 0, 0, 0)) {
sc 376 dev/pci/if_xge.c if (sc->xge_type == XGE_TYPE_XENA) {
sc 379 dev/pci/if_xge.c sc->sc_pciregs[i/4] = pci_conf_read(pa->pa_pc, pa->pa_tag, i);
sc 399 dev/pci/if_xge.c if (sc->xge_type == XGE_TYPE_XENA) {
sc 416 dev/pci/if_xge.c pci_conf_write(pa->pa_pc, pa->pa_tag, i, sc->sc_pciregs[i/4]);
sc 442 dev/pci/if_xge.c if (sc->xge_type == XGE_TYPE_HERC) {
sc 458 dev/pci/if_xge.c if (sc->xge_type == XGE_TYPE_HERC){
sc 473 dev/pci/if_xge.c if (sc->xge_type == XGE_TYPE_XENA)
sc 474 dev/pci/if_xge.c xge_setup_xgxs_xena(sc);
sc 475 dev/pci/if_xge.c else if(sc->xge_type == XGE_TYPE_HERC)
sc 476 dev/pci/if_xge.c xge_setup_xgxs_herc(sc);
sc 491 dev/pci/if_xge.c if (xge_alloc_txmem(sc)) {
sc 515 dev/pci/if_xge.c if (bus_dmamap_create(sc->sc_dmat, XGE_MAX_FRAMELEN,
sc 516 dev/pci/if_xge.c NTXFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, &sc->sc_txm[i])) {
sc 522 dev/pci/if_xge.c sc->sc_lasttx = NTXDESCS-1;
sc 529 dev/pci/if_xge.c if (xge_alloc_rxmem(sc)) {
sc 536 dev/pci/if_xge.c if (bus_dmamap_create(sc->sc_dmat, XGE_MAX_FRAMELEN,
sc 537 dev/pci/if_xge.c NRXFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, &sc->sc_rxm[i])) {
sc 545 dev/pci/if_xge.c if (xge_add_rxbuf(sc, i))
sc 559 dev/pci/if_xge.c PIF_WCSR(PRC_RXD0_0, (uint64_t)sc->sc_rxmap->dm_segs[0].ds_addr);
sc 578 dev/pci/if_xge.c if (sc->xge_type == XGE_TYPE_XENA) {
sc 626 dev/pci/if_xge.c ifmedia_init(&sc->xena_media, IFM_IMASK, xge_xgmii_mediachange,
sc 628 dev/pci/if_xge.c ifmedia_add(&sc->xena_media, IFM_ETHER|IFM_10G_SR, 0, NULL);
sc 629 dev/pci/if_xge.c ifmedia_set(&sc->xena_media, IFM_ETHER|IFM_10G_SR);
sc 631 dev/pci/if_xge.c ifp = &sc->sc_arpcom.ac_if;
sc 633 dev/pci/if_xge.c memcpy(sc->sc_arpcom.ac_enaddr, enaddr, ETHER_ADDR_LEN);
sc 635 dev/pci/if_xge.c ifp->if_softc = sc;
sc 658 dev/pci/if_xge.c sc->sc_shutdownhook = shutdownhook_establish(xge_shutdown, sc);
sc 668 dev/pci/if_xge.c if ((sc->sc_ih =
sc 669 dev/pci/if_xge.c pci_intr_establish(pc, ih, IPL_NET, xge_intr, sc, XNAME)) == NULL) {
sc 680 dev/pci/if_xge.c struct xge_softc *sc = ifp->if_softc;
sc 698 dev/pci/if_xge.c xge_enable(struct xge_softc *sc)
sc 719 dev/pci/if_xge.c struct xge_softc *sc = ifp->if_softc;
sc 769 dev/pci/if_xge.c xge_enable(sc);
sc 783 dev/pci/if_xge.c xge_setpromisc(sc);
sc 785 dev/pci/if_xge.c xge_setmulti(sc);
sc 799 dev/pci/if_xge.c struct xge_softc *sc = ifp->if_softc;
sc 815 dev/pci/if_xge.c struct xge_softc *sc = (struct xge_softc *)pv;
sc 816 dev/pci/if_xge.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 824 dev/pci/if_xge.c struct xge_softc *sc = pv;
sc 826 dev/pci/if_xge.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 848 dev/pci/if_xge.c xge_enable(sc); /* Only if link restored */
sc 856 dev/pci/if_xge.c lasttx = sc->sc_lasttx;
sc 857 dev/pci/if_xge.c while ((i = NEXTTX(sc->sc_lasttx)) != sc->sc_nexttx) {
sc 858 dev/pci/if_xge.c txd = sc->sc_txd[i];
sc 859 dev/pci/if_xge.c dmp = sc->sc_txm[i];
sc 861 dev/pci/if_xge.c bus_dmamap_sync(sc->sc_dmat, dmp, 0,
sc 866 dev/pci/if_xge.c bus_dmamap_sync(sc->sc_dmat, dmp, 0,
sc 870 dev/pci/if_xge.c bus_dmamap_unload(sc->sc_dmat, dmp);
sc 871 dev/pci/if_xge.c m_freem(sc->sc_txb[i]);
sc 873 dev/pci/if_xge.c sc->sc_lasttx = i;
sc 876 dev/pci/if_xge.c if (sc->sc_lasttx != lasttx)
sc 890 dev/pci/if_xge.c XGE_RXSYNC(sc->sc_nextrx,
sc 893 dev/pci/if_xge.c rxd = XGE_RXD(sc->sc_nextrx);
sc 895 dev/pci/if_xge.c XGE_RXSYNC(sc->sc_nextrx, BUS_DMASYNC_PREREAD);
sc 900 dev/pci/if_xge.c m = sc->sc_rxb[sc->sc_nextrx];
sc 920 dev/pci/if_xge.c if (xge_add_rxbuf(sc, sc->sc_nextrx)) {
sc 928 dev/pci/if_xge.c XGE_RXSYNC(sc->sc_nextrx,
sc 950 dev/pci/if_xge.c if (++sc->sc_nextrx == NRXREAL)
sc 951 dev/pci/if_xge.c sc->sc_nextrx = 0;
sc 960 dev/pci/if_xge.c struct xge_softc *sc = ifp->if_softc;
sc 967 dev/pci/if_xge.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 979 dev/pci/if_xge.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 991 dev/pci/if_xge.c (ifp->if_flags ^ sc->xge_if_flags) &
sc 993 dev/pci/if_xge.c xge_setpromisc(sc);
sc 1002 dev/pci/if_xge.c sc->xge_if_flags = ifp->if_flags;
sc 1007 dev/pci/if_xge.c ? ether_addmulti(ifr, &sc->sc_arpcom)
sc 1008 dev/pci/if_xge.c : ether_delmulti(ifr, &sc->sc_arpcom);
sc 1012 dev/pci/if_xge.c xge_setmulti(sc);
sc 1018 dev/pci/if_xge.c error = ifmedia_ioctl(ifp, ifr, &sc->xena_media, cmd);
sc 1030 dev/pci/if_xge.c xge_setmulti(struct xge_softc *sc)
sc 1032 dev/pci/if_xge.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1033 dev/pci/if_xge.c struct arpcom *ac = &sc->sc_arpcom;
sc 1084 dev/pci/if_xge.c xge_setpromisc(struct xge_softc *sc)
sc 1086 dev/pci/if_xge.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1102 dev/pci/if_xge.c struct xge_softc *sc = ifp->if_softc;
sc 1121 dev/pci/if_xge.c if (sc->sc_nexttx == sc->sc_lasttx)
sc 1124 dev/pci/if_xge.c nexttx = sc->sc_nexttx;
sc 1125 dev/pci/if_xge.c dmp = sc->sc_txm[nexttx];
sc 1127 dev/pci/if_xge.c if ((error = bus_dmamap_load_mbuf(sc->sc_dmat, dmp, m,
sc 1135 dev/pci/if_xge.c bus_dmamap_sync(sc->sc_dmat, dmp, 0, dmp->dm_mapsize,
sc 1138 dev/pci/if_xge.c txd = sc->sc_txd[nexttx];
sc 1139 dev/pci/if_xge.c sc->sc_txb[nexttx] = m;
sc 1148 dev/pci/if_xge.c ntxd = txd - sc->sc_txd[nexttx] - 1;
sc 1149 dev/pci/if_xge.c txd = sc->sc_txd[nexttx];
sc 1172 dev/pci/if_xge.c bus_dmamap_sync(sc->sc_dmat, dmp, 0, dmp->dm_mapsize,
sc 1175 dev/pci/if_xge.c par = sc->sc_txdp[nexttx];
sc 1185 dev/pci/if_xge.c sc->sc_nexttx = NEXTTX(nexttx);
sc 1194 dev/pci/if_xge.c xge_alloc_txmem(struct xge_softc *sc)
sc 1204 dev/pci/if_xge.c if (bus_dmamem_alloc(sc->sc_dmat, TXMAPSZ, PAGE_SIZE, 0,
sc 1208 dev/pci/if_xge.c if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, TXMAPSZ, &kva,
sc 1213 dev/pci/if_xge.c if (bus_dmamap_create(sc->sc_dmat, TXMAPSZ, 1, TXMAPSZ, 0,
sc 1214 dev/pci/if_xge.c BUS_DMA_NOWAIT, &sc->sc_txmap))
sc 1217 dev/pci/if_xge.c if (bus_dmamap_load(sc->sc_dmat, sc->sc_txmap,
sc 1225 dev/pci/if_xge.c sc->sc_txd[i] = txp;
sc 1226 dev/pci/if_xge.c sc->sc_txdp[i] = txdp;
sc 1235 dev/pci/if_xge.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_txmap);
sc 1237 dev/pci/if_xge.c bus_dmamem_unmap(sc->sc_dmat, kva, TXMAPSZ);
sc 1239 dev/pci/if_xge.c bus_dmamem_free(sc->sc_dmat, &seg, rseg);
sc 1249 dev/pci/if_xge.c xge_alloc_rxmem(struct xge_softc *sc)
sc 1264 dev/pci/if_xge.c if (bus_dmamem_alloc(sc->sc_dmat, RXMAPSZ, PAGE_SIZE, 0,
sc 1268 dev/pci/if_xge.c if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, RXMAPSZ, &kva,
sc 1273 dev/pci/if_xge.c if (bus_dmamap_create(sc->sc_dmat, RXMAPSZ, 1, RXMAPSZ, 0,
sc 1274 dev/pci/if_xge.c BUS_DMA_NOWAIT, &sc->sc_rxmap))
sc 1277 dev/pci/if_xge.c if (bus_dmamap_load(sc->sc_dmat, sc->sc_rxmap,
sc 1283 dev/pci/if_xge.c sc->sc_rxd_4k[i] = rxpp;
sc 1284 dev/pci/if_xge.c rxpp->r4_next = (uint64_t)sc->sc_rxmap->dm_segs[0].ds_addr +
sc 1287 dev/pci/if_xge.c sc->sc_rxd_4k[NRXPAGES-1]->r4_next =
sc 1288 dev/pci/if_xge.c (uint64_t)sc->sc_rxmap->dm_segs[0].ds_addr;
sc 1294 dev/pci/if_xge.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_rxmap);
sc 1296 dev/pci/if_xge.c bus_dmamem_unmap(sc->sc_dmat, kva, RXMAPSZ);
sc 1298 dev/pci/if_xge.c bus_dmamem_free(sc->sc_dmat, &seg, rseg);
sc 1307 dev/pci/if_xge.c xge_add_rxbuf(struct xge_softc *sc, int id)
sc 1319 dev/pci/if_xge.c rxd = &sc->sc_rxd_4k[page]->r4_rxd[desc];
sc 1365 dev/pci/if_xge.c if (sc->sc_rxb[id])
sc 1366 dev/pci/if_xge.c bus_dmamap_unload(sc->sc_dmat, sc->sc_rxm[id]);
sc 1367 dev/pci/if_xge.c sc->sc_rxb[id] = m[0];
sc 1369 dev/pci/if_xge.c error = bus_dmamap_load_mbuf(sc->sc_dmat, sc->sc_rxm[id], m[0],
sc 1373 dev/pci/if_xge.c bus_dmamap_sync(sc->sc_dmat, sc->sc_rxm[id], 0,
sc 1374 dev/pci/if_xge.c sc->sc_rxm[id]->dm_mapsize, BUS_DMASYNC_PREREAD);
sc 1378 dev/pci/if_xge.c rxd->rxd_buf0 = (uint64_t)sc->sc_rxm[id]->dm_segs[0].ds_addr;
sc 1384 dev/pci/if_xge.c rxd->rxd_buf0 = (uint64_t)sc->sc_rxm[id]->dm_segs[0].ds_addr;
sc 1385 dev/pci/if_xge.c rxd->rxd_buf1 = (uint64_t)sc->sc_rxm[id]->dm_segs[1].ds_addr;
sc 1386 dev/pci/if_xge.c rxd->rxd_buf2 = (uint64_t)sc->sc_rxm[id]->dm_segs[2].ds_addr;
sc 1387 dev/pci/if_xge.c rxd->rxd_buf3 = (uint64_t)sc->sc_rxm[id]->dm_segs[3].ds_addr;
sc 1388 dev/pci/if_xge.c rxd->rxd_buf4 = (uint64_t)sc->sc_rxm[id]->dm_segs[4].ds_addr;
sc 1400 dev/pci/if_xge.c xge_setup_xgxs_xena(struct xge_softc *sc)
sc 1488 dev/pci/if_xge.c xge_setup_xgxs_herc(struct xge_softc *sc)
sc 135 dev/pci/if_xl_pci.c struct xl_softc *sc = (struct xl_softc *)self;
sc 143 dev/pci/if_xl_pci.c sc->sc_dmat = pa->pa_dmat;
sc 145 dev/pci/if_xl_pci.c sc->xl_flags = 0;
sc 150 dev/pci/if_xl_pci.c sc->xl_flags |= XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_8BITROM;
sc 153 dev/pci/if_xl_pci.c sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK |
sc 155 dev/pci/if_xl_pci.c sc->xl_flags |= XL_FLAG_INVERT_LED_PWR|XL_FLAG_INVERT_MII_PWR;
sc 156 dev/pci/if_xl_pci.c sc->xl_flags |= XL_FLAG_8BITROM;
sc 159 dev/pci/if_xl_pci.c sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK |
sc 161 dev/pci/if_xl_pci.c sc->xl_flags |= XL_FLAG_INVERT_LED_PWR|XL_FLAG_INVERT_MII_PWR;
sc 165 dev/pci/if_xl_pci.c sc->xl_flags |= XL_FLAG_PHYOK;
sc 168 dev/pci/if_xl_pci.c sc->xl_flags |= XL_FLAG_NO_MMIO;
sc 207 dev/pci/if_xl_pci.c sc->sc_dev.dv_xname, command & XL_PSTATE_MASK);
sc 223 dev/pci/if_xl_pci.c &sc->xl_btag, &sc->xl_bhandle, NULL, &iosize, 0)) {
sc 229 dev/pci/if_xl_pci.c &sc->xl_btag, &sc->xl_bhandle, NULL, &iosize, 0)) {
sc 235 dev/pci/if_xl_pci.c if (sc->xl_flags & XL_FLAG_FUNCREG) {
sc 237 dev/pci/if_xl_pci.c &sc->xl_funct, &sc->xl_funch, NULL, &funsize, 0)) {
sc 239 dev/pci/if_xl_pci.c bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize);
sc 242 dev/pci/if_xl_pci.c sc->intr_ack = xl_pci_intr_ack;
sc 250 dev/pci/if_xl_pci.c bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize);
sc 251 dev/pci/if_xl_pci.c if (sc->xl_flags & XL_FLAG_FUNCREG)
sc 252 dev/pci/if_xl_pci.c bus_space_unmap(sc->xl_funct, sc->xl_funch, funsize);
sc 257 dev/pci/if_xl_pci.c sc->xl_intrhand = pci_intr_establish(pc, ih, IPL_NET, xl_intr, sc,
sc 259 dev/pci/if_xl_pci.c if (sc->xl_intrhand == NULL) {
sc 263 dev/pci/if_xl_pci.c bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize);
sc 264 dev/pci/if_xl_pci.c if (sc->xl_flags & XL_FLAG_FUNCREG)
sc 265 dev/pci/if_xl_pci.c bus_space_unmap(sc->xl_funct, sc->xl_funch, funsize);
sc 270 dev/pci/if_xl_pci.c xl_attach(sc);
sc 275 dev/pci/if_xl_pci.c xl_pci_intr_ack(struct xl_softc *sc)
sc 277 dev/pci/if_xl_pci.c bus_space_write_4(sc->xl_funct, sc->xl_funch, XL_PCI_INTR,
sc 88 dev/pci/iha_pci.c struct iha_softc *sc = (void *)self;
sc 101 dev/pci/iha_pci.c printf("%s: unable to map registers\n", sc->sc_dev.dv_xname);
sc 105 dev/pci/iha_pci.c sc->sc_iot = iot;
sc 106 dev/pci/iha_pci.c sc->sc_ioh = ioh;
sc 107 dev/pci/iha_pci.c sc->sc_dmat = pa->pa_dmat;
sc 110 dev/pci/iha_pci.c printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
sc 115 dev/pci/iha_pci.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, iha_intr, sc,
sc 116 dev/pci/iha_pci.c sc->sc_dev.dv_xname);
sc 118 dev/pci/iha_pci.c if (sc->sc_ih == NULL) {
sc 127 dev/pci/iha_pci.c if (iha_init_tulip(sc) == 0) {
sc 129 dev/pci/iha_pci.c saa.saa_sc_link = &sc->sc_link;
sc 130 dev/pci/iha_pci.c config_found(&sc->sc_dev, &saa, scsiprint);
sc 99 dev/pci/iop_pci.c struct iop_softc *sc;
sc 106 dev/pci/iop_pci.c sc = (struct iop_softc *)self;
sc 126 dev/pci/iop_pci.c if (pci_mapreg_map(pa, i, PCI_MAPREG_TYPE_MEM, 0, &sc->sc_iot,
sc 127 dev/pci/iop_pci.c &sc->sc_ioh, NULL, NULL, 0x40000)) {
sc 128 dev/pci/iop_pci.c printf("%s: can't map register window\n", sc->sc_dv.dv_xname);
sc 132 dev/pci/iop_pci.c sc->sc_dmat = pa->pa_dmat;
sc 133 dev/pci/iop_pci.c sc->sc_bus_memt = pa->pa_memt;
sc 134 dev/pci/iop_pci.c sc->sc_bus_iot = pa->pa_iot;
sc 142 dev/pci/iop_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, iop_intr, sc,
sc 143 dev/pci/iop_pci.c sc->sc_dv.dv_xname);
sc 144 dev/pci/iop_pci.c if (sc->sc_ih == NULL) {
sc 153 dev/pci/iop_pci.c iop_init(sc, intrstr);
sc 349 dev/pci/ips.c struct ips_softc *sc = (struct ips_softc *)self;
sc 360 dev/pci/ips.c sc->sc_dmat = pa->pa_dmat;
sc 365 dev/pci/ips.c sc->sc_chip = &ips_chips[IPS_CHIP_COPPERHEAD];
sc 369 dev/pci/ips.c sc->sc_chip = &ips_chips[IPS_CHIP_MORPHEUS];
sc 377 dev/pci/ips.c maptype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, sc->sc_chip->ic_bar);
sc 378 dev/pci/ips.c if (pci_mapreg_map(pa, sc->sc_chip->ic_bar, maptype, 0, &sc->sc_iot,
sc 379 dev/pci/ips.c &sc->sc_ioh, NULL, &iosize, 0)) {
sc 385 dev/pci/ips.c ips_init(sc);
sc 388 dev/pci/ips.c if (ips_dmamem_alloc(&sc->sc_cmdm, sc->sc_dmat,
sc 395 dev/pci/ips.c sc->sc_nccbs = 1;
sc 396 dev/pci/ips.c sc->sc_ccb = &ccb0;
sc 398 dev/pci/ips.c ccb0.c_cmdva = sc->sc_cmdm.dm_vaddr;
sc 399 dev/pci/ips.c ccb0.c_cmdpa = sc->sc_cmdm.dm_paddr;
sc 400 dev/pci/ips.c if (bus_dmamap_create(sc->sc_dmat, IPS_MAXFER, IPS_MAXSGS,
sc 406 dev/pci/ips.c TAILQ_INIT(&sc->sc_ccbq_free);
sc 407 dev/pci/ips.c TAILQ_INIT(&sc->sc_ccbq_run);
sc 408 dev/pci/ips.c TAILQ_INSERT_TAIL(&sc->sc_ccbq_free, &ccb0, c_link);
sc 411 dev/pci/ips.c if (ips_getadapterinfo(sc, &ai)) {
sc 413 dev/pci/ips.c bus_dmamap_destroy(sc->sc_dmat, ccb0.c_dmam);
sc 418 dev/pci/ips.c if (ips_getdriveinfo(sc, &sc->sc_di)) {
sc 420 dev/pci/ips.c bus_dmamap_destroy(sc->sc_dmat, ccb0.c_dmam);
sc 423 dev/pci/ips.c sc->sc_nunits = sc->sc_di.drivecnt;
sc 425 dev/pci/ips.c bus_dmamap_destroy(sc->sc_dmat, ccb0.c_dmam);
sc 428 dev/pci/ips.c sc->sc_nccbs = ai.cmdcnt;
sc 429 dev/pci/ips.c if ((sc->sc_ccb = ips_ccb_alloc(sc, sc->sc_nccbs)) == NULL) {
sc 433 dev/pci/ips.c TAILQ_INIT(&sc->sc_ccbq_free);
sc 434 dev/pci/ips.c TAILQ_INIT(&sc->sc_ccbq_run);
sc 435 dev/pci/ips.c for (i = 0; i < sc->sc_nccbs; i++)
sc 436 dev/pci/ips.c TAILQ_INSERT_TAIL(&sc->sc_ccbq_free,
sc 437 dev/pci/ips.c &sc->sc_ccb[i], c_link);
sc 445 dev/pci/ips.c if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, ips_intr, sc,
sc 446 dev/pci/ips.c sc->sc_dev.dv_xname) == NULL) {
sc 456 dev/pci/ips.c printf("%s", sc->sc_dev.dv_xname);
sc 457 dev/pci/ips.c printf(": %s", sc->sc_chip->ic_name);
sc 466 dev/pci/ips.c printf(", %d CCBs, %d units", sc->sc_nccbs, sc->sc_nunits);
sc 470 dev/pci/ips.c if (sc->sc_nunits > 0)
sc 471 dev/pci/ips.c sc->sc_scsi_link.openings = sc->sc_nccbs / sc->sc_nunits;
sc 472 dev/pci/ips.c sc->sc_scsi_link.adapter_target = sc->sc_nunits;
sc 473 dev/pci/ips.c sc->sc_scsi_link.adapter_buswidth = sc->sc_nunits;
sc 474 dev/pci/ips.c sc->sc_scsi_link.device = &ips_scsi_device;
sc 475 dev/pci/ips.c sc->sc_scsi_link.adapter = &ips_scsi_adapter;
sc 476 dev/pci/ips.c sc->sc_scsi_link.adapter_softc = sc;
sc 479 dev/pci/ips.c saa.saa_sc_link = &sc->sc_scsi_link;
sc 483 dev/pci/ips.c ips_intren(sc);
sc 487 dev/pci/ips.c ips_ccb_free(sc, sc->sc_ccb, sc->sc_nccbs);
sc 489 dev/pci/ips.c ips_dmamem_free(&sc->sc_cmdm);
sc 491 dev/pci/ips.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
sc 498 dev/pci/ips.c struct ips_softc *sc = link->adapter_softc;
sc 509 dev/pci/ips.c if (target >= sc->sc_nunits || link->lun != 0) {
sc 511 dev/pci/ips.c "target %d, lun %d\n", sc->sc_dev.dv_xname,
sc 521 dev/pci/ips.c drive = &sc->sc_di.drive[target];
sc 544 dev/pci/ips.c "blkno %u, blkcnt %u\n", sc->sc_dev.dv_xname,
sc 561 dev/pci/ips.c if ((error = ips_cmd(sc, cmd, target, blkno, xs->data,
sc 606 dev/pci/ips.c if (ips_flush(sc))
sc 615 dev/pci/ips.c sc->sc_dev.dv_xname, xs->cmd->opcode));
sc 625 dev/pci/ips.c ips_cmd(struct ips_softc *sc, int code, int drive, u_int32_t lba, void *data,
sc 634 dev/pci/ips.c "size %lu, flags 0x%02x\n", sc->sc_dev.dv_xname, code, drive, lba,
sc 638 dev/pci/ips.c if ((ccb = ips_ccb_get(sc)) == NULL) {
sc 639 dev/pci/ips.c DPRINTF(IPS_D_ERR, ("%s: no free CCB\n", sc->sc_dev.dv_xname));
sc 656 dev/pci/ips.c if (bus_dmamap_load(sc->sc_dmat, ccb->c_dmam, data, size,
sc 659 dev/pci/ips.c sc->sc_dev.dv_xname);
sc 662 dev/pci/ips.c bus_dmamap_sync(sc->sc_dmat, ccb->c_dmam, 0,
sc 669 dev/pci/ips.c sc->sc_dev.dv_xname);
sc 693 dev/pci/ips.c DPRINTF(IPS_D_XFER, ("%s: run command 0x%02x\n", sc->sc_dev.dv_xname,
sc 696 dev/pci/ips.c TAILQ_INSERT_TAIL(&sc->sc_ccbq_run, ccb, c_link);
sc 697 dev/pci/ips.c ips_exec(sc, ccb);
sc 701 dev/pci/ips.c error = ips_poll(sc, ccb);
sc 707 dev/pci/ips.c ips_poll(struct ips_softc *sc, struct ips_ccb *c)
sc 715 dev/pci/ips.c if ((status = ips_status(sc)) == 0xffffffff)
sc 718 dev/pci/ips.c if (id >= sc->sc_nccbs) {
sc 720 dev/pci/ips.c "0x%02x\n", sc->sc_dev.dv_xname, id));
sc 726 dev/pci/ips.c printf("%s: poll timeout\n", sc->sc_dev.dv_xname);
sc 729 dev/pci/ips.c ccb = &sc->sc_ccb[id];
sc 732 dev/pci/ips.c ips_done(sc, ccb);
sc 739 dev/pci/ips.c ips_done(struct ips_softc *sc, struct ips_ccb *ccb)
sc 746 dev/pci/ips.c printf("%s: command 0x%02x not run\n", sc->sc_dev.dv_xname,
sc 756 dev/pci/ips.c bus_dmamap_sync(sc->sc_dmat, ccb->c_dmam, 0,
sc 759 dev/pci/ips.c bus_dmamap_unload(sc->sc_dmat, ccb->c_dmam);
sc 763 dev/pci/ips.c printf("%s: ", sc->sc_dev.dv_xname);
sc 773 dev/pci/ips.c TAILQ_REMOVE(&sc->sc_ccbq_run, ccb, c_link);
sc 774 dev/pci/ips.c ips_ccb_put(sc, ccb);
sc 789 dev/pci/ips.c struct ips_softc *sc = arg;
sc 794 dev/pci/ips.c if (!ips_isintr(sc))
sc 798 dev/pci/ips.c while ((status = ips_status(sc)) != 0xffffffff) {
sc 800 dev/pci/ips.c sc->sc_dev.dv_xname, status));
sc 803 dev/pci/ips.c if (id >= sc->sc_nccbs) {
sc 805 dev/pci/ips.c sc->sc_dev.dv_xname, id));
sc 808 dev/pci/ips.c ccb = &sc->sc_ccb[id];
sc 811 dev/pci/ips.c ips_done(sc, ccb);
sc 818 dev/pci/ips.c ips_getadapterinfo(struct ips_softc *sc, struct ips_adapterinfo *ai)
sc 820 dev/pci/ips.c return (ips_cmd(sc, IPS_CMD_GETADAPTERINFO, 0, 0, ai, sizeof(*ai),
sc 825 dev/pci/ips.c ips_getdriveinfo(struct ips_softc *sc, struct ips_driveinfo *di)
sc 827 dev/pci/ips.c return (ips_cmd(sc, IPS_CMD_GETDRIVEINFO, 0, 0, di, sizeof(*di),
sc 832 dev/pci/ips.c ips_flush(struct ips_softc *sc)
sc 834 dev/pci/ips.c return (ips_cmd(sc, IPS_CMD_FLUSH, 0, 0, NULL, 0, IPS_CCB_POLL, NULL));
sc 838 dev/pci/ips.c ips_copperhead_exec(struct ips_softc *sc, struct ips_ccb *ccb)
sc 844 dev/pci/ips.c reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IPS_REG_CCC);
sc 849 dev/pci/ips.c printf("%s: semaphore timeout\n", sc->sc_dev.dv_xname);
sc 853 dev/pci/ips.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, IPS_REG_CCSA, ccb->c_cmdpa);
sc 854 dev/pci/ips.c bus_space_write_2(sc->sc_iot, sc->sc_ioh, IPS_REG_CCC,
sc 859 dev/pci/ips.c ips_copperhead_init(struct ips_softc *sc)
sc 865 dev/pci/ips.c ips_copperhead_intren(struct ips_softc *sc)
sc 867 dev/pci/ips.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, IPS_REG_HIS, IPS_REG_HIS_EN);
sc 871 dev/pci/ips.c ips_copperhead_isintr(struct ips_softc *sc)
sc 875 dev/pci/ips.c reg = bus_space_read_1(sc->sc_iot, sc->sc_ioh, IPS_REG_HIS);
sc 876 dev/pci/ips.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, IPS_REG_HIS, reg);
sc 884 dev/pci/ips.c ips_copperhead_reset(struct ips_softc *sc)
sc 891 dev/pci/ips.c ips_copperhead_status(struct ips_softc *sc)
sc 898 dev/pci/ips.c ips_morpheus_exec(struct ips_softc *sc, struct ips_ccb *ccb)
sc 900 dev/pci/ips.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, IPS_REG_IQP, ccb->c_cmdpa);
sc 904 dev/pci/ips.c ips_morpheus_init(struct ips_softc *sc)
sc 910 dev/pci/ips.c ips_morpheus_intren(struct ips_softc *sc)
sc 914 dev/pci/ips.c reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IPS_REG_OIM);
sc 916 dev/pci/ips.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, IPS_REG_OIM, reg);
sc 920 dev/pci/ips.c ips_morpheus_isintr(struct ips_softc *sc)
sc 924 dev/pci/ips.c reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IPS_REG_OIS);
sc 925 dev/pci/ips.c DPRINTF(IPS_D_XFER, ("%s: isintr 0x%08x\n", sc->sc_dev.dv_xname, reg));
sc 931 dev/pci/ips.c ips_morpheus_reset(struct ips_softc *sc)
sc 938 dev/pci/ips.c ips_morpheus_status(struct ips_softc *sc)
sc 942 dev/pci/ips.c reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IPS_REG_OQP);
sc 943 dev/pci/ips.c DPRINTF(IPS_D_XFER, ("%s: status 0x%08x\n", sc->sc_dev.dv_xname, reg));
sc 949 dev/pci/ips.c ips_ccb_alloc(struct ips_softc *sc, int n)
sc 960 dev/pci/ips.c ccb[i].c_cmdva = (char *)sc->sc_cmdm.dm_vaddr +
sc 962 dev/pci/ips.c ccb[i].c_cmdpa = sc->sc_cmdm.dm_paddr + i * IPS_MAXCMDSZ;
sc 963 dev/pci/ips.c if (bus_dmamap_create(sc->sc_dmat, IPS_MAXFER, IPS_MAXSGS,
sc 972 dev/pci/ips.c bus_dmamap_destroy(sc->sc_dmat, ccb[i - 1].c_dmam);
sc 978 dev/pci/ips.c ips_ccb_free(struct ips_softc *sc, struct ips_ccb *ccb, int n)
sc 983 dev/pci/ips.c bus_dmamap_destroy(sc->sc_dmat, ccb[i - 1].c_dmam);
sc 988 dev/pci/ips.c ips_ccb_get(struct ips_softc *sc)
sc 992 dev/pci/ips.c if ((ccb = TAILQ_FIRST(&sc->sc_ccbq_free)) != NULL)
sc 993 dev/pci/ips.c TAILQ_REMOVE(&sc->sc_ccbq_free, ccb, c_link);
sc 999 dev/pci/ips.c ips_ccb_put(struct ips_softc *sc, struct ips_ccb *ccb)
sc 1003 dev/pci/ips.c TAILQ_INSERT_TAIL(&sc->sc_ccbq_free, ccb, c_link);
sc 86 dev/pci/ises.c #define READ_REG(sc,r) \
sc 87 dev/pci/ises.c bus_space_read_4((sc)->sc_memt, (sc)->sc_memh,r)
sc 89 dev/pci/ises.c #define WRITE_REG(sc,reg,val) \
sc 90 dev/pci/ises.c bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, reg, val)
sc 157 dev/pci/ises.c struct ises_softc *sc = (struct ises_softc *)self;
sc 167 dev/pci/ises.c SIMPLEQ_INIT(&sc->sc_queue);
sc 168 dev/pci/ises.c SIMPLEQ_INIT(&sc->sc_qchip);
sc 169 dev/pci/ises.c SIMPLEQ_INIT(&sc->sc_cmdq);
sc 174 dev/pci/ises.c PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_memt,
sc 175 dev/pci/ises.c &sc->sc_memh, NULL, &memsize, 0)) {
sc 189 dev/pci/ises.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ises_intr, sc,
sc 191 dev/pci/ises.c if (sc->sc_ih == NULL) {
sc 200 dev/pci/ises.c sc->sc_dmat = pa->pa_dmat;
sc 201 dev/pci/ises.c error = bus_dmamap_create(sc->sc_dmat, 1 << PGSHIFT, 1, 1 << PGSHIFT,
sc 202 dev/pci/ises.c 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &sc->sc_dmamap);
sc 210 dev/pci/ises.c if (bus_dmamem_alloc(sc->sc_dmat, ISES_B_DATASIZE, 1, 0, &seg, 1,
sc 217 dev/pci/ises.c if (bus_dmamem_map(sc->sc_dmat, &seg, nsegs, ISES_B_DATASIZE,
sc 218 dev/pci/ises.c &sc->sc_dma_data, 0)) {
sc 228 dev/pci/ises.c sc->sc_cid = crypto_get_driverid(0);
sc 230 dev/pci/ises.c if (sc->sc_cid < 0)
sc 239 dev/pci/ises.c sc->sc_initstate = 0;
sc 240 dev/pci/ises.c startuphook_establish(ises_initstate, sc);
sc 243 dev/pci/ises.c ises_debug_init(sc);
sc 250 dev/pci/ises.c bus_dmamem_unmap(sc->sc_dmat, (caddr_t)&sc->sc_dma_data,
sc 251 dev/pci/ises.c sizeof sc->sc_dma_data);
sc 254 dev/pci/ises.c bus_dmamem_free(sc->sc_dmat, &seg, nsegs);
sc 257 dev/pci/ises.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_dmamap);
sc 260 dev/pci/ises.c pci_intr_disestablish(pc, sc->sc_ih);
sc 263 dev/pci/ises.c bus_space_unmap(sc->sc_memt, sc->sc_memh, memsize);
sc 279 dev/pci/ises.c struct ises_softc *sc = v;
sc 280 dev/pci/ises.c char *dv = sc->sc_dv.dv_xname;
sc 287 dev/pci/ises.c p = ISES_STAT_IDP_STATE(READ_REG(sc, ISES_A_STAT));
sc 289 dev/pci/ises.c sc->sc_initstate, p, ises_idp_state[p]));
sc 291 dev/pci/ises.c switch (sc->sc_initstate) {
sc 294 dev/pci/ises.c timeout_set(&sc->sc_timeout, ises_initstate, sc);
sc 295 dev/pci/ises.c sc->sc_initstate++;
sc 300 dev/pci/ises.c stat = READ_REG(sc, ISES_BO_STAT);
sc 303 dev/pci/ises.c WRITE_REG(sc, ISES_BO_STAT, stat);
sc 311 dev/pci/ises.c WRITE_REG(sc, ISES_BO_STAT, stat);
sc 312 dev/pci/ises.c sc->sc_initstate--; /* Rerun state 1. */
sc 317 dev/pci/ises.c sc->sc_initstate++;
sc 328 dev/pci/ises.c WRITE_REG(sc, ISES_B_BDATAOUT, 0L);
sc 331 dev/pci/ises.c WRITE_REG(sc, ISES_BO_STAT, stat);
sc 333 dev/pci/ises.c WRITE_REG(sc, ISES_BO_STAT, stat);
sc 339 dev/pci/ises.c stat = READ_REG(sc, ISES_BO_STAT);
sc 341 dev/pci/ises.c WRITE_REG(sc, ISES_BO_STAT, stat);
sc 344 dev/pci/ises.c if (READ_REG(sc, ISES_A_STAT) & ISES_STAT_HW_DA) {
sc 347 dev/pci/ises.c sc->sc_initstate += 3; /* Next step --> 7 */
sc 355 dev/pci/ises.c p = ISES_STAT_IDP_STATE(READ_REG(sc, ISES_A_STAT));
sc 359 dev/pci/ises.c sc->sc_initstate += 2; /* Next step --> 6 */
sc 368 dev/pci/ises.c stat = READ_REG(sc, ISES_BO_STAT);
sc 370 dev/pci/ises.c WRITE_REG(sc, ISES_BO_STAT, stat);
sc 376 dev/pci/ises.c stat = READ_REG(sc, ISES_BO_STAT);
sc 378 dev/pci/ises.c WRITE_REG(sc, ISES_BO_STAT, stat);
sc 384 dev/pci/ises.c stat = READ_REG(sc, ISES_BO_STAT);
sc 386 dev/pci/ises.c WRITE_REG(sc, ISES_BO_STAT, stat);
sc 396 dev/pci/ises.c p = ISES_STAT_IDP_STATE(READ_REG(sc, ISES_A_STAT));
sc 397 dev/pci/ises.c if (READ_REG(sc, ISES_A_IQF) < 4 || p != ISES_IDP_WFPL) {
sc 400 dev/pci/ises.c sc->sc_initstate -= 5; /* Next step --> 2 */
sc 411 dev/pci/ises.c WRITE_REG(sc, ISES_A_IQD, ISES_BF_IDPLEN);
sc 415 dev/pci/ises.c WRITE_REG(sc, ISES_A_IQD, ises_bf_fw[p]);
sc 416 dev/pci/ises.c if (READ_REG(sc, ISES_A_IQF) < 4)
sc 421 dev/pci/ises.c WRITE_REG(sc, ISES_A_IQD, ISES_BF_IDPCRC);
sc 428 dev/pci/ises.c if (READ_REG(sc, ISES_A_STAT) & ISES_STAT_HW_DA) {
sc 437 dev/pci/ises.c if (ises_assert_cmd_mode(sc) < 0)
sc 445 dev/pci/ises.c stat = ises_get_fwversion(sc);
sc 465 dev/pci/ises.c stat = READ_REG(sc, ISES_A_STAT);
sc 470 dev/pci/ises.c timeout_del(&sc->sc_timeout);
sc 471 dev/pci/ises.c ises_hrng_init(sc);
sc 474 dev/pci/ises.c sc->sc_intrmask = ISES_STAT_BCHU_OAF | ISES_STAT_BCHU_ERR |
sc 484 dev/pci/ises.c WRITE_REG(sc, ISES_A_INTE, sc->sc_intrmask);
sc 498 dev/pci/ises.c crypto_register(sc->sc_cid, algs,
sc 504 dev/pci/ises.c sc->sc_initstate);
sc 509 dev/pci/ises.c sc->sc_initstate++;
sc 510 dev/pci/ises.c timeout_add(&sc->sc_timeout, ticks);
sc 515 dev/pci/ises.c timeout_del(&sc->sc_timeout);
sc 521 dev/pci/ises.c ises_queue_cmd(struct ises_softc *sc, u_int32_t cmd, u_int32_t *data,
sc 532 dev/pci/ises.c DPRINTF(("%s: queueing cmd 0x%x len %d\n", sc->sc_dv.dv_xname,
sc 538 dev/pci/ises.c if (len > READ_REG(sc, ISES_A_IQF)) {
sc 553 dev/pci/ises.c cq->cmd_session = sc->sc_cursession;
sc 554 dev/pci/ises.c SIMPLEQ_INSERT_TAIL(&sc->sc_cmdq, cq, cmd_next);
sc 556 dev/pci/ises.c WRITE_REG(sc, ISES_A_IQD, cmd);
sc 562 dev/pci/ises.c WRITE_REG(sc, ISES_A_IQD, *(data + p));
sc 565 dev/pci/ises.c WRITE_REG(sc, ISES_A_IQD, *(data + p));
sc 568 dev/pci/ises.c WRITE_REG(sc, ISES_A_IQS, 0);
sc 576 dev/pci/ises.c ises_process_oqueue(struct ises_softc *sc)
sc 579 dev/pci/ises.c char *dv = sc->sc_dv.dv_xname;
sc 586 dev/pci/ises.c r = READ_REG(sc, ISES_A_OQS);
sc 591 dev/pci/ises.c while ((oqs = READ_REG(sc, ISES_A_OQS)) > 0) {
sc 593 dev/pci/ises.c r = READ_REG(sc, ISES_A_OQD);
sc 599 dev/pci/ises.c if (!SIMPLEQ_EMPTY(&sc->sc_cmdq)) {
sc 600 dev/pci/ises.c cq = SIMPLEQ_FIRST(&sc->sc_cmdq);
sc 601 dev/pci/ises.c SIMPLEQ_REMOVE_HEAD(&sc->sc_cmdq, cmd_next);
sc 614 dev/pci/ises.c sc->sc_switching = 0;
sc 616 dev/pci/ises.c (void)ises_assert_cmd_mode(sc);
sc 621 dev/pci/ises.c cq->cmd_cb(sc, cq);
sc 641 dev/pci/ises.c d = READ_REG(sc, ISES_A_OQD);
sc 650 dev/pci/ises.c sc->sc_lnau1_rlen = len;
sc 651 dev/pci/ises.c bzero(sc->sc_lnau1_r, 2048 / 8);
sc 654 dev/pci/ises.c sc->sc_lnau1_r[len] =
sc 655 dev/pci/ises.c READ_REG(sc, ISES_A_OQD);
sc 663 dev/pci/ises.c sc->sc_lnau2_rlen = len;
sc 664 dev/pci/ises.c bzero(sc->sc_lnau1_r, 2048 / 8);
sc 667 dev/pci/ises.c sc->sc_lnau2_r[len] =
sc 668 dev/pci/ises.c READ_REG(sc, ISES_A_OQD);
sc 673 dev/pci/ises.c ses = &sc->sc_sessions[cq->cmd_session];
sc 674 dev/pci/ises.c ses->omr = READ_REG(sc, ISES_A_OQD);
sc 678 dev/pci/ises.c ises_debug_parse_omr(sc);
sc 686 dev/pci/ises.c ses = &sc->sc_sessions[cq->cmd_session];
sc 691 dev/pci/ises.c READ_REG(sc, ISES_A_OQD);
sc 693 dev/pci/ises.c sc->sc_switching = 0;
sc 694 dev/pci/ises.c ises_feed (sc);
sc 708 dev/pci/ises.c len -= cq->cmd_cb(sc, cq);
sc 717 dev/pci/ises.c d = READ_REG(sc, ISES_A_OQD);
sc 718 dev/pci/ises.c WRITE_REG(sc, ISES_A_OQS, 0);
sc 727 dev/pci/ises.c struct ises_softc *sc = arg;
sc 729 dev/pci/ises.c char *dv = sc->sc_dv.dv_xname;
sc 731 dev/pci/ises.c dma_status = READ_REG(sc, ISES_DMA_STATUS);
sc 734 dev/pci/ises.c if ((sc->sc_dma_mask & ISES_DMA_STATUS_R_RUN) != 0 &&
sc 738 dev/pci/ises.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0,
sc 739 dev/pci/ises.c sc->sc_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
sc 743 dev/pci/ises.c WRITE_REG(sc, ISES_DMA_RESET, 0);
sc 745 dev/pci/ises.c if ((sc->sc_dma_mask & ISES_DMA_STATUS_W_RUN) != 0 &&
sc 749 dev/pci/ises.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0,
sc 750 dev/pci/ises.c sc->sc_dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
sc 752 dev/pci/ises.c WRITE_REG(sc, ISES_DMA_RESET, 0);
sc 753 dev/pci/ises.c ises_feed(sc);
sc 757 dev/pci/ises.c WRITE_REG(sc, ISES_DMA_RESET, 0);
sc 760 dev/pci/ises.c ints = READ_REG(sc, ISES_A_INTS);
sc 761 dev/pci/ises.c if (!(ints & sc->sc_intrmask)) {
sc 767 dev/pci/ises.c WRITE_REG(sc, ISES_A_INTS, ints);
sc 771 dev/pci/ises.c if (READ_REG(sc, ISES_A_STAT) &
sc 773 dev/pci/ises.c ises_feed(sc);
sc 778 dev/pci/ises.c ises_process_oqueue(sc);
sc 784 dev/pci/ises.c ises_queue_cmd(sc, cmd, NULL, NULL);
sc 791 dev/pci/ises.c ises_queue_cmd(sc, cmd, NULL, NULL);
sc 796 dev/pci/ises.c sc->sc_lnau1_rlen = -1;
sc 801 dev/pci/ises.c sc->sc_lnau2_rlen = -1;
sc 807 dev/pci/ises.c ises_read_dma (sc);
sc 829 dev/pci/ises.c ises_feed(struct ises_softc *sc)
sc 832 dev/pci/ises.c bus_dma_segment_t *ds = &sc->sc_dmamap->dm_segs[0];
sc 836 dev/pci/ises.c char *dv = sc->sc_dv.dv_xname;
sc 839 dev/pci/ises.c DPRINTF(("%s:ises_feed: called (sc = %p)\n", dv, sc));
sc 844 dev/pci/ises.c if (SIMPLEQ_EMPTY(&sc->sc_queue) ||
sc 845 dev/pci/ises.c (READ_REG(sc, ISES_A_STAT) & ISES_STAT_BCHU_IFF)) {
sc 851 dev/pci/ises.c q = SIMPLEQ_FIRST(&sc->sc_queue);
sc 855 dev/pci/ises.c if (sc->sc_switching != 0) {
sc 861 dev/pci/ises.c if (sc->sc_cursession != q->q_sesn) {
sc 864 dev/pci/ises.c if (ises_bchu_switch_session (sc, &q->q_session, q->q_sesn))
sc 865 dev/pci/ises.c sc->sc_cursession = q->q_sesn;
sc 875 dev/pci/ises.c SIMPLEQ_REMOVE_HEAD(&sc->sc_queue, q_next);
sc 876 dev/pci/ises.c SIMPLEQ_INSERT_TAIL(&sc->sc_qchip, q, q_next);
sc 877 dev/pci/ises.c --sc->sc_nqueue;
sc 881 dev/pci/ises.c bus_dmamap_load_mbuf(sc->sc_dmat, sc->sc_dmamap,
sc 884 dev/pci/ises.c bus_dmamap_load_uio(sc->sc_dmat, sc->sc_dmamap, q->q_src.uio,
sc 889 dev/pci/ises.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0,
sc 890 dev/pci/ises.c sc->sc_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
sc 895 dev/pci/ises.c sc->sc_dma_mask |= ISES_DMA_STATUS_W_RUN;
sc 897 dev/pci/ises.c WRITE_REG(sc, ISES_DMA_WRITE_START, ds->ds_addr);
sc 898 dev/pci/ises.c WRITE_REG(sc, ISES_DMA_WRITE_COUNT, ISES_DMA_WCOUNT(ds->ds_len));
sc 900 dev/pci/ises.c dma_status = READ_REG(sc, ISES_DMA_STATUS);
sc 902 dev/pci/ises.c WRITE_REG(sc, ISES_DMA_CTRL, dma_status);
sc 917 dev/pci/ises.c struct ises_softc *sc = NULL;
sc 931 dev/pci/ises.c sc = ises_cd.cd_devs[i];
sc 932 dev/pci/ises.c if (sc == NULL || sc->sc_cid == (*sidp))
sc 935 dev/pci/ises.c if (sc == NULL)
sc 938 dev/pci/ises.c dv = sc->sc_dv.dv_xname;
sc 967 dev/pci/ises.c if (sc->sc_sessions == NULL) {
sc 968 dev/pci/ises.c ses = sc->sc_sessions = (struct ises_session *)
sc 974 dev/pci/ises.c sc->sc_cursession = -1;
sc 976 dev/pci/ises.c sc->sc_nsessions = 1;
sc 979 dev/pci/ises.c for (sesn = 0; sesn < sc->sc_nsessions; sesn++)
sc 980 dev/pci/ises.c if (sc->sc_sessions[sesn].omr == 0) {
sc 981 dev/pci/ises.c ses = &sc->sc_sessions[sesn];
sc 982 dev/pci/ises.c sc->sc_cursession = sesn;
sc 987 dev/pci/ises.c i = sc->sc_nsessions * sizeof(struct ises_session);
sc 996 dev/pci/ises.c bcopy(sc->sc_sessions, ses, i);
sc 997 dev/pci/ises.c bzero(sc->sc_sessions, i);
sc 998 dev/pci/ises.c free(sc->sc_sessions, M_DEVBUF);
sc 999 dev/pci/ises.c sc->sc_sessions = ses;
sc 1000 dev/pci/ises.c ses = &sc->sc_sessions[sc->sc_nsessions];
sc 1001 dev/pci/ises.c sc->sc_cursession = sc->sc_nsessions;
sc 1002 dev/pci/ises.c sc->sc_nsessions++;
sc 1007 dev/pci/ises.c sc->sc_nsessions, sc->sc_cursession));
sc 1105 dev/pci/ises.c *sidp = ISES_SID(sc->sc_dv.dv_unit, sesn);
sc 1113 dev/pci/ises.c struct ises_softc *sc;
sc 1121 dev/pci/ises.c sc = ises_cd.cd_devs[card];
sc 1125 dev/pci/ises.c sc->sc_dv.dv_xname, sesn));
sc 1127 dev/pci/ises.c if (sc->sc_cursession == sesn)
sc 1128 dev/pci/ises.c sc->sc_cursession = -1;
sc 1130 dev/pci/ises.c bzero(&sc->sc_sessions[sesn], sizeof(sc->sc_sessions[sesn]));
sc 1139 dev/pci/ises.c struct ises_softc *sc;
sc 1160 dev/pci/ises.c sc = ises_cd.cd_devs[card];
sc 1162 dev/pci/ises.c dv = sc->sc_dv.dv_xname;
sc 1168 dev/pci/ises.c if (sc->sc_nqueue == ISES_MAX_NQUEUE) {
sc 1180 dev/pci/ises.c ses = &sc->sc_sessions[q->q_sesn];
sc 1184 dev/pci/ises.c q->q_sc = sc;
sc 1434 dev/pci/ises.c SIMPLEQ_INSERT_TAIL(&sc->sc_queue, q, q_next);
sc 1435 dev/pci/ises.c sc->sc_nqueue++;
sc 1437 dev/pci/ises.c ises_feed(sc);
sc 1466 dev/pci/ises.c struct ises_softc *sc = q->q_sc;
sc 1477 dev/pci/ises.c sccr = (u_int8_t *)&sc->sc_sessions[q->q_sesn].sccr;
sc 1507 dev/pci/ises.c sc->sc_dv.dv_xname));
sc 1513 dev/pci/ises.c ises_hrng_init(struct ises_softc *sc)
sc 1525 dev/pci/ises.c if (ises_queue_cmd(sc, cmd, &r, NULL))
sc 1529 dev/pci/ises.c for (i = 1000; i && READ_REG(sc, ISES_A_OQS) == 0; i--)
sc 1532 dev/pci/ises.c if (!READ_REG(sc, ISES_A_OQS))
sc 1537 dev/pci/ises.c (void)READ_REG(sc, ISES_A_OQD);
sc 1540 dev/pci/ises.c WRITE_REG(sc, ISES_A_OQS, 0);
sc 1562 dev/pci/ises.c ises_queue_cmd(sc, cmd, &r, NULL);
sc 1564 dev/pci/ises.c while (READ_REG(sc, ISES_A_OQS) == 0) ; /* Wait for response */
sc 1566 dev/pci/ises.c (void)READ_REG(sc, ISES_A_OQD); /* read response */
sc 1568 dev/pci/ises.c (void)READ_REG(sc, ISES_A_OQD); /* read data */
sc 1569 dev/pci/ises.c WRITE_REG(sc, ISES_A_OQS, 0); /* ACK resp */
sc 1580 dev/pci/ises.c timeout_set(&sc->sc_timeout, ises_hrng, sc);
sc 1582 dev/pci/ises.c ises_hrng(sc); /* Call first update */
sc 1594 dev/pci/ises.c struct ises_softc *sc = v;
sc 1598 dev/pci/ises.c timeout_add(&sc->sc_timeout, hz / ISESRNGIPS);
sc 1600 dev/pci/ises.c if (ises_assert_cmd_mode(sc) != 0)
sc 1606 dev/pci/ises.c ises_queue_cmd(sc, cmd, &n, NULL);
sc 1610 dev/pci/ises.c ises_get_fwversion(struct ises_softc *sc)
sc 1616 dev/pci/ises.c WRITE_REG(sc, ISES_A_IQD, r);
sc 1617 dev/pci/ises.c WRITE_REG(sc, ISES_A_IQS, 0);
sc 1619 dev/pci/ises.c for (i = 100; i > 0 && READ_REG(sc, ISES_A_OQS) == 0; i--)
sc 1625 dev/pci/ises.c r = READ_REG(sc, ISES_A_OQD);
sc 1632 dev/pci/ises.c (void)READ_REG(sc, ISES_A_OQD);
sc 1637 dev/pci/ises.c r = READ_REG(sc, ISES_A_OQD); /* read version */
sc 1638 dev/pci/ises.c (void)READ_REG(sc, ISES_A_OQD); /* Discard 64bit "chip-id" */
sc 1639 dev/pci/ises.c (void)READ_REG(sc, ISES_A_OQD);
sc 1641 dev/pci/ises.c WRITE_REG(sc, ISES_A_OQS, 0); /* Ack the response */
sc 1653 dev/pci/ises.c ises_assert_cmd_mode(struct ises_softc *sc)
sc 1655 dev/pci/ises.c switch (ISES_STAT_SW_MODE(READ_REG(sc, ISES_A_STAT))) {
sc 1658 dev/pci/ises.c if (ISES_STAT_SW_MODE(READ_REG(sc, ISES_A_STAT)) == 0)
sc 1660 dev/pci/ises.c return (ises_assert_cmd_mode(sc));
sc 1664 dev/pci/ises.c bus_space_write_2(sc->sc_memt, sc->sc_memh, ISES_A_CTRL,
sc 1667 dev/pci/ises.c return ((ISES_STAT_SW_MODE(READ_REG(sc, ISES_A_STAT)) == 0) ?
sc 1670 dev/pci/ises.c bus_space_write_2(sc->sc_memt, sc->sc_memh, ISES_A_CTRL,
sc 1673 dev/pci/ises.c return ((ISES_STAT_SW_MODE(READ_REG(sc, ISES_A_STAT)) == 0) ?
sc 1681 dev/pci/ises.c ises_bchu_switch_session (struct ises_softc *sc, struct ises_session *ss,
sc 1690 dev/pci/ises.c if ((8 * 2 + sizeof (*ss) / 2) > READ_REG(sc, ISES_A_IQF))
sc 1694 dev/pci/ises.c sc->sc_switching = new_session + 1;
sc 1698 dev/pci/ises.c ises_queue_cmd(sc, cmd, &ss->kr[4], NULL);
sc 1700 dev/pci/ises.c ises_queue_cmd(sc, cmd, &ss->kr[2], NULL);
sc 1702 dev/pci/ises.c ises_queue_cmd(sc, cmd, &ss->kr[0], NULL);
sc 1706 dev/pci/ises.c ises_queue_cmd(sc, cmd, &ss->omr, NULL);
sc 1710 dev/pci/ises.c ises_queue_cmd(sc, cmd, &ss->sccr[0], NULL);
sc 1714 dev/pci/ises.c ises_queue_cmd(sc, cmd, &ss->cvr[0], NULL);
sc 1718 dev/pci/ises.c ises_queue_cmd(sc, cmd, &ss->dbcr[0], NULL);
sc 1722 dev/pci/ises.c ises_queue_cmd(sc, cmd, &ss->hmlr[0], ises_bchu_switch_final);
sc 1728 dev/pci/ises.c ises_bchu_switch_final (struct ises_softc *sc, struct ises_cmd *cmd)
sc 1733 dev/pci/ises.c sc->sc_dv.dv_xname));
sc 1735 dev/pci/ises.c sc->sc_cursession = sc->sc_switching - 1;
sc 1736 dev/pci/ises.c sc->sc_switching = 0;
sc 1739 dev/pci/ises.c ises_feed(sc);
sc 1746 dev/pci/ises.c ises_read_dma (struct ises_softc *sc)
sc 1748 dev/pci/ises.c bus_dma_segment_t *ds = &sc->sc_dmamap->dm_segs[0];
sc 1751 dev/pci/ises.c bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0,
sc 1752 dev/pci/ises.c sc->sc_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
sc 1754 dev/pci/ises.c WRITE_REG(sc, ISES_DMA_READ_START, ds->ds_addr);
sc 1755 dev/pci/ises.c WRITE_REG(sc, ISES_DMA_READ_START, ISES_DMA_RCOUNT(ds->ds_len));
sc 1757 dev/pci/ises.c dma_status = READ_REG(sc, ISES_DMA_STATUS);
sc 1759 dev/pci/ises.c WRITE_REG(sc, ISES_DMA_CTRL, dma_status);
sc 1768 dev/pci/ises.c ises_debug_init (struct ises_softc *sc)
sc 1770 dev/pci/ises.c ises_sc = sc;
sc 1772 dev/pci/ises.c timeout_set (&ises_db_timeout, ises_debug_loop, sc);
sc 1786 dev/pci/ises.c ises_debug_simple_cmd (struct ises_softc *sc, u_int32_t code, u_int32_t d)
sc 1792 dev/pci/ises.c ises_queue_cmd(sc, cmd, &d, NULL);
sc 1798 dev/pci/ises.c struct ises_softc *sc = (struct ises_softc *)v;
sc 1804 dev/pci/ises.c printf ("ises0: ises_db = %d sc = %p\n", ises_db, sc);
sc 1808 dev/pci/ises.c stat = READ_REG(sc, ISES_A_OQS);
sc 1809 dev/pci/ises.c cmd = READ_REG(sc, ISES_A_IQS);
sc 1812 dev/pci/ises.c cmd, stat, READ_REG(sc, ISES_A_IQF),
sc 1813 dev/pci/ises.c READ_REG(sc, ISES_A_OQF));
sc 1825 dev/pci/ises.c ises_debug_simple_cmd(sc, ISES_CMD_LRESET_1, 0);
sc 1828 dev/pci/ises.c ises_debug_simple_cmd(sc, ISES_CMD_LW_A_1, 141);
sc 1829 dev/pci/ises.c ises_debug_simple_cmd(sc, ISES_CMD_LW_B_1, 5623);
sc 1830 dev/pci/ises.c ises_debug_simple_cmd(sc, ISES_CMD_LW_N_1, 117);
sc 1833 dev/pci/ises.c ises_debug_simple_cmd(sc, ISES_CMD_LMULMOD_1, 0);
sc 1837 dev/pci/ises.c ises_debug_simple_cmd(sc, ISES_CMD_LUPLOAD_1, 0);
sc 1841 dev/pci/ises.c printf ("LNAU_1 R length = %d\n", sc->sc_lnau1_rlen);
sc 1842 dev/pci/ises.c for (i = 0; i < sc->sc_lnau1_rlen; i++)
sc 1843 dev/pci/ises.c printf ("W%02d-[%08x]-(%u)\t%s", i, sc->sc_lnau1_r[i],
sc 1844 dev/pci/ises.c sc->sc_lnau1_r[i], (i%4)==3 ? "\n" : "");
sc 1865 dev/pci/ises.c ises_bchu_switch_session(sc, &ses, 0);
sc 1871 dev/pci/ises.c ises_queue_cmd(sc, cmd, (u_int32_t *)&ses, NULL);
sc 1877 dev/pci/ises.c timeout_del(&sc->sc_timeout);
sc 1881 dev/pci/ises.c if (!timeout_pending(&sc->sc_timeout))
sc 1882 dev/pci/ises.c timeout_add(&sc->sc_timeout, hz);
sc 1887 dev/pci/ises.c WRITE_REG(sc, ISES_BO_STAT, stat);
sc 1889 dev/pci/ises.c WRITE_REG(sc, ISES_BO_STAT, stat);
sc 1893 dev/pci/ises.c if (timeout_pending(&sc->sc_timeout))
sc 1894 dev/pci/ises.c timeout_del(&sc->sc_timeout);
sc 1895 dev/pci/ises.c timeout_set(&sc->sc_timeout, ises_initstate, sc);
sc 1896 dev/pci/ises.c sc->sc_initstate = 0;
sc 1897 dev/pci/ises.c ises_initstate(sc);
sc 1907 dev/pci/ises.c struct ises_softc *sc = ises_sc;
sc 1913 dev/pci/ises.c stat = READ_REG(sc, ISES_BO_STAT);
sc 1932 dev/pci/ises.c stat = READ_REG(sc, ISES_A_STAT);
sc 2000 dev/pci/ises.c READ_REG(sc, ISES_A_OQS), READ_REG(sc, ISES_A_IQS),
sc 2001 dev/pci/ises.c READ_REG(sc, ISES_A_OQF), READ_REG(sc, ISES_A_IQF));
sc 2006 dev/pci/ises.c READ_REG(sc, ISES_B_STAT));
sc 2011 dev/pci/ises.c READ_REG(sc, ISES_DMA_READ_START),
sc 2012 dev/pci/ises.c READ_REG(sc, ISES_DMA_READ_COUNT) >> 16);
sc 2015 dev/pci/ises.c READ_REG(sc, ISES_DMA_WRITE_START),
sc 2016 dev/pci/ises.c READ_REG(sc, ISES_DMA_WRITE_COUNT) & 0x00ff);
sc 2018 dev/pci/ises.c stat = READ_REG(sc, ISES_DMA_STATUS);
sc 2053 dev/pci/ises.c ises_queue_cmd(sc, cmd, NULL, NULL);
sc 2057 dev/pci/ises.c ises_debug_parse_omr (struct ises_softc *sc)
sc 2059 dev/pci/ises.c u_int32_t omr = sc->sc_sessions[sc->sc_cursession].omr;
sc 103 dev/pci/lofn.c struct lofn_softc *sc = (struct lofn_softc *)self;
sc 112 dev/pci/lofn.c &sc->sc_st, &sc->sc_sh, NULL, &iosize, 0)) {
sc 117 dev/pci/lofn.c sc->sc_dmat = pa->pa_dmat;
sc 124 dev/pci/lofn.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, lofn_intr, sc,
sc 126 dev/pci/lofn.c if (sc->sc_ih == NULL) {
sc 134 dev/pci/lofn.c WRITE_REG_0(sc, LOFN_REL_RNC, LOFN_RNG_SCALAR);
sc 137 dev/pci/lofn.c WRITE_REG_0(sc, LOFN_REL_CFG2,
sc 138 dev/pci/lofn.c READ_REG_0(sc, LOFN_REL_CFG2) | LOFN_CFG2_RNGENA);
sc 139 dev/pci/lofn.c sc->sc_ier |= LOFN_IER_RDY;
sc 140 dev/pci/lofn.c WRITE_REG(sc, LOFN_REL_IER, sc->sc_ier);
sc 143 dev/pci/lofn.c WRITE_REG_0(sc, LOFN_REL_CFG2,
sc 144 dev/pci/lofn.c READ_REG_0(sc, LOFN_REL_CFG2) | LOFN_CFG2_PRCENA);
sc 146 dev/pci/lofn.c SIMPLEQ_INIT(&sc->sc_queue);
sc 148 dev/pci/lofn.c sc->sc_cid = crypto_get_driverid(0);
sc 149 dev/pci/lofn.c if (sc->sc_cid < 0) {
sc 157 dev/pci/lofn.c crypto_kregister(sc->sc_cid, algs, lofn_kprocess);
sc 164 dev/pci/lofn.c bus_space_unmap(sc->sc_st, sc->sc_sh, iosize);
sc 171 dev/pci/lofn.c struct lofn_softc *sc = vsc;
sc 176 dev/pci/lofn.c sr = READ_REG_0(sc, LOFN_REL_SR);
sc 178 dev/pci/lofn.c if (sc->sc_ier & LOFN_IER_RDY) {
sc 182 dev/pci/lofn.c sc->sc_dv.dv_xname);
sc 183 dev/pci/lofn.c WRITE_REG_0(sc, LOFN_REL_CFG2,
sc 184 dev/pci/lofn.c READ_REG_0(sc, LOFN_REL_CFG2) &
sc 186 dev/pci/lofn.c sc->sc_ier &= ~LOFN_IER_RDY;
sc 187 dev/pci/lofn.c WRITE_REG_0(sc, LOFN_REL_IER, sc->sc_ier);
sc 191 dev/pci/lofn.c bus_space_read_region_4(sc->sc_st, sc->sc_sh,
sc 192 dev/pci/lofn.c LOFN_REL_RNG, sc->sc_rngbuf, LOFN_RNGBUF_SIZE);
sc 194 dev/pci/lofn.c add_true_randomness(sc->sc_rngbuf[i]);
sc 198 dev/pci/lofn.c if (sc->sc_ier & LOFN_IER_DONE) {
sc 200 dev/pci/lofn.c if (sr & LOFN_SR_DONE && sc->sc_current != NULL) {
sc 201 dev/pci/lofn.c q = sc->sc_current;
sc 202 dev/pci/lofn.c sc->sc_current = NULL;
sc 203 dev/pci/lofn.c q->q_finish(sc, q);
sc 205 dev/pci/lofn.c lofn_feed(sc);
sc 213 dev/pci/lofn.c lofn_read_reg(sc, ridx, rp)
sc 214 dev/pci/lofn.c struct lofn_softc *sc;
sc 219 dev/pci/lofn.c bus_space_read_region_4(sc->sc_st, sc->sc_sh,
sc 222 dev/pci/lofn.c bus_space_read_region_4(sc->sc_st, sc->sc_sh,
sc 228 dev/pci/lofn.c lofn_write_reg(sc, ridx, rp)
sc 229 dev/pci/lofn.c struct lofn_softc *sc;
sc 234 dev/pci/lofn.c bus_space_write_region_4(sc->sc_st, sc->sc_sh,
sc 237 dev/pci/lofn.c bus_space_write_region_4(sc->sc_st, sc->sc_sh,
sc 243 dev/pci/lofn.c lofn_zero_reg(sc, ridx)
sc 244 dev/pci/lofn.c struct lofn_softc *sc;
sc 247 dev/pci/lofn.c lofn_write_reg(sc, ridx, &sc->sc_zero);
sc 251 dev/pci/lofn.c lofn_dump_reg(sc, ridx)
sc 252 dev/pci/lofn.c struct lofn_softc *sc;
sc 258 dev/pci/lofn.c READ_REG(sc, LOFN_LENADDR(LOFN_WIN_2, ridx)) & LOFN_LENMASK);
sc 261 dev/pci/lofn.c printf("%08X", READ_REG(sc, LOFN_REGADDR(LOFN_WIN_3, ridx, i)));
sc 270 dev/pci/lofn.c struct lofn_softc *sc;
sc 274 dev/pci/lofn.c sc = lofn_cd.cd_devs[i];
sc 275 dev/pci/lofn.c if (sc == NULL)
sc 277 dev/pci/lofn.c if (sc->sc_cid == krp->krp_hid)
sc 278 dev/pci/lofn.c return (sc);
sc 287 dev/pci/lofn.c struct lofn_softc *sc;
sc 293 dev/pci/lofn.c if ((sc = lofn_kfind(krp)) == NULL) {
sc 312 dev/pci/lofn.c SIMPLEQ_INSERT_TAIL(&sc->sc_queue, q, q_next);
sc 313 dev/pci/lofn.c lofn_feed(sc);
sc 318 dev/pci/lofn.c sc->sc_dv.dv_xname, krp->krp_op);
sc 327 dev/pci/lofn.c lofn_modexp_start(sc, q)
sc 328 dev/pci/lofn.c struct lofn_softc *sc;
sc 342 dev/pci/lofn.c lofn_zero_reg(sc, 0);
sc 343 dev/pci/lofn.c lofn_zero_reg(sc, 1);
sc 344 dev/pci/lofn.c lofn_zero_reg(sc, 2);
sc 345 dev/pci/lofn.c lofn_zero_reg(sc, 3);
sc 358 dev/pci/lofn.c bzero(&sc->sc_tmp, sizeof(sc->sc_tmp));
sc 359 dev/pci/lofn.c bcopy(krp->krp_param[LOFN_MODEXP_PAR_N].crp_p, &sc->sc_tmp,
sc 361 dev/pci/lofn.c lofn_write_reg(sc, 2, &sc->sc_tmp);
sc 364 dev/pci/lofn.c WRITE_REG(sc, LOFN_LENADDR(LOFN_WIN_2, 2), 1024);
sc 366 dev/pci/lofn.c WRITE_REG(sc, LOFN_REL_INSTR + ip,
sc 370 dev/pci/lofn.c WRITE_REG(sc, LOFN_REL_INSTR + ip,
sc 382 dev/pci/lofn.c bzero(&sc->sc_tmp, sizeof(sc->sc_tmp));
sc 383 dev/pci/lofn.c bcopy(krp->krp_param[LOFN_MODEXP_PAR_M].crp_p, &sc->sc_tmp,
sc 385 dev/pci/lofn.c lofn_write_reg(sc, 0, &sc->sc_tmp);
sc 388 dev/pci/lofn.c WRITE_REG(sc, LOFN_LENADDR(LOFN_WIN_2, 0), 1024);
sc 390 dev/pci/lofn.c WRITE_REG(sc, LOFN_REL_INSTR + ip,
sc 394 dev/pci/lofn.c WRITE_REG(sc, LOFN_REL_INSTR + ip,
sc 410 dev/pci/lofn.c bzero(&sc->sc_tmp, sizeof(sc->sc_tmp));
sc 411 dev/pci/lofn.c bcopy(krp->krp_param[LOFN_MODEXP_PAR_E].crp_p, &sc->sc_tmp,
sc 413 dev/pci/lofn.c lofn_write_reg(sc, 1, &sc->sc_tmp);
sc 416 dev/pci/lofn.c WRITE_REG(sc, LOFN_LENADDR(LOFN_WIN_2, 1), 1024);
sc 418 dev/pci/lofn.c WRITE_REG(sc, LOFN_REL_INSTR + ip,
sc 422 dev/pci/lofn.c WRITE_REG(sc, LOFN_REL_INSTR + ip,
sc 428 dev/pci/lofn.c WRITE_REG(sc, LOFN_REL_INSTR + ip,
sc 432 dev/pci/lofn.c WRITE_REG(sc, LOFN_REL_INSTR + ip,
sc 436 dev/pci/lofn.c WRITE_REG(sc, LOFN_REL_INSTR + ip,
sc 440 dev/pci/lofn.c WRITE_REG(sc, LOFN_REL_INSTR + ip,
sc 446 dev/pci/lofn.c WRITE_REG(sc, LOFN_REL_CR, 0);
sc 451 dev/pci/lofn.c bzero(&sc->sc_tmp, sizeof(sc->sc_tmp));
sc 452 dev/pci/lofn.c lofn_zero_reg(sc, 0);
sc 453 dev/pci/lofn.c lofn_zero_reg(sc, 1);
sc 454 dev/pci/lofn.c lofn_zero_reg(sc, 2);
sc 455 dev/pci/lofn.c lofn_zero_reg(sc, 3);
sc 462 dev/pci/lofn.c lofn_modexp_finish(sc, q)
sc 463 dev/pci/lofn.c struct lofn_softc *sc;
sc 469 dev/pci/lofn.c lofn_read_reg(sc, 3, &sc->sc_tmp);
sc 471 dev/pci/lofn.c reglen = ((READ_REG(sc, LOFN_LENADDR(LOFN_WIN_2, 3)) & LOFN_LENMASK) +
sc 476 dev/pci/lofn.c bcopy(sc->sc_tmp.b, krp->krp_param[krp->krp_iparams].crp_p,
sc 479 dev/pci/lofn.c bcopy(sc->sc_tmp.b, krp->krp_param[krp->krp_iparams].crp_p,
sc 484 dev/pci/lofn.c bzero(&sc->sc_tmp, sizeof(sc->sc_tmp));
sc 485 dev/pci/lofn.c lofn_zero_reg(sc, 0);
sc 486 dev/pci/lofn.c lofn_zero_reg(sc, 1);
sc 487 dev/pci/lofn.c lofn_zero_reg(sc, 2);
sc 488 dev/pci/lofn.c lofn_zero_reg(sc, 3);
sc 517 dev/pci/lofn.c lofn_feed(sc)
sc 518 dev/pci/lofn.c struct lofn_softc *sc;
sc 523 dev/pci/lofn.c if (SIMPLEQ_EMPTY(&sc->sc_queue) &&
sc 524 dev/pci/lofn.c sc->sc_current == NULL) {
sc 525 dev/pci/lofn.c sc->sc_ier &= ~LOFN_IER_DONE;
sc 526 dev/pci/lofn.c WRITE_REG(sc, LOFN_REL_IER, sc->sc_ier);
sc 531 dev/pci/lofn.c if (sc->sc_current != NULL)
sc 534 dev/pci/lofn.c while (!SIMPLEQ_EMPTY(&sc->sc_queue)) {
sc 535 dev/pci/lofn.c q = SIMPLEQ_FIRST(&sc->sc_queue);
sc 536 dev/pci/lofn.c if (q->q_start(sc, q) == 0) {
sc 537 dev/pci/lofn.c sc->sc_current = q;
sc 538 dev/pci/lofn.c SIMPLEQ_REMOVE_HEAD(&sc->sc_queue, q_next);
sc 539 dev/pci/lofn.c sc->sc_ier |= LOFN_IER_DONE;
sc 540 dev/pci/lofn.c WRITE_REG(sc, LOFN_REL_IER, sc->sc_ier);
sc 543 dev/pci/lofn.c SIMPLEQ_REMOVE_HEAD(&sc->sc_queue, q_next);
sc 57 dev/pci/lofnvar.h #define READ_REG(sc,r) \
sc 58 dev/pci/lofnvar.h bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (r))
sc 59 dev/pci/lofnvar.h #define READ_REG_0(sc,r) READ_REG((sc), (r) | LOFN_WIN_0)
sc 60 dev/pci/lofnvar.h #define READ_REG_1(sc,r) READ_REG((sc), (r) | LOFN_WIN_1)
sc 61 dev/pci/lofnvar.h #define READ_REG_2(sc,r) READ_REG((sc), (r) | LOFN_WIN_2)
sc 62 dev/pci/lofnvar.h #define READ_REG_3(sc,r) READ_REG((sc), (r) | LOFN_WIN_3)
sc 64 dev/pci/lofnvar.h #define WRITE_REG(sc,r,v) \
sc 65 dev/pci/lofnvar.h bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (r), (v))
sc 66 dev/pci/lofnvar.h #define WRITE_REG_0(sc,r,v) WRITE_REG((sc), (r) | LOFN_WIN_0, (v))
sc 67 dev/pci/lofnvar.h #define WRITE_REG_1(sc,r,v) WRITE_REG((sc), (r) | LOFN_WIN_1, (v))
sc 68 dev/pci/lofnvar.h #define WRITE_REG_2(sc,r,v) WRITE_REG((sc), (r) | LOFN_WIN_2, (v))
sc 69 dev/pci/lofnvar.h #define WRITE_REG_3(sc,r,v) WRITE_REG((sc), (r) | LOFN_WIN_3, (v))
sc 420 dev/pci/maestro.c struct maestro_softc *sc;
sc 634 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)self;
sc 644 dev/pci/maestro.c sc->sc_audev = &maestro_audev;
sc 645 dev/pci/maestro.c sc->flags = maestro_get_flags(pa);
sc 647 dev/pci/maestro.c sc->pc = pa->pa_pc;
sc 648 dev/pci/maestro.c sc->pt = pa->pa_tag;
sc 649 dev/pci/maestro.c sc->dmat = pa->pa_dmat;
sc 657 dev/pci/maestro.c sc->ih = pci_intr_establish(pc, ih, IPL_AUDIO, maestro_intr, sc,
sc 658 dev/pci/maestro.c sc->dev.dv_xname);
sc 659 dev/pci/maestro.c if (sc->ih == NULL) {
sc 668 dev/pci/maestro.c maestro_power(sc, PPMI_D0);
sc 673 dev/pci/maestro.c 0, &sc->iot, &sc->ioh, NULL, NULL, 0)) != 0) {
sc 679 dev/pci/maestro.c sc->dmasize = MAESTRO_BUFSIZ * 16;
sc 680 dev/pci/maestro.c if ((error = bus_dmamem_alloc(sc->dmat, sc->dmasize, NBPG, 0,
sc 681 dev/pci/maestro.c &sc->dmaseg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) {
sc 686 dev/pci/maestro.c if ((error = bus_dmamem_map(sc->dmat, &sc->dmaseg, 1,
sc 687 dev/pci/maestro.c sc->dmasize, &sc->dmabase, BUS_DMA_NOWAIT |
sc 693 dev/pci/maestro.c if ((error = bus_dmamap_create(sc->dmat, sc->dmasize, 1,
sc 694 dev/pci/maestro.c sc->dmasize, 0, BUS_DMA_NOWAIT, &sc->dmamap)) != 0) {
sc 699 dev/pci/maestro.c if ((error = bus_dmamap_load(sc->dmat, sc->dmamap,
sc 700 dev/pci/maestro.c sc->dmabase, sc->dmasize, NULL, BUS_DMA_NOWAIT)) != 0) {
sc 710 dev/pci/maestro.c if ((sc->dmapool = salloc_new(sc->dmabase+16, sc->dmasize-16,
sc 716 dev/pci/maestro.c sc->physaddr = sc->dmamap->dm_segs[0].ds_addr;
sc 721 dev/pci/maestro.c maestro_init(sc);
sc 722 dev/pci/maestro.c maestro_read_codec(sc, 0, &cdata);
sc 725 dev/pci/maestro.c sc->dev.dv_xname);
sc 727 dev/pci/maestro.c maestro_write_codec(sc, 0x2a, 0x0001);
sc 728 dev/pci/maestro.c maestro_write_codec(sc, 0x2C, 0x0000);
sc 729 dev/pci/maestro.c maestro_write_codec(sc, 0x2C, 0xFFFF);
sc 730 dev/pci/maestro.c maestro_write_codec(sc, 0x10, 0x9F1F);
sc 731 dev/pci/maestro.c maestro_write_codec(sc, 0x12, 0x0808);
sc 732 dev/pci/maestro.c maestro_write_codec(sc, 0x14, 0x9F1F);
sc 733 dev/pci/maestro.c maestro_write_codec(sc, 0x16, 0x9F1F);
sc 734 dev/pci/maestro.c maestro_write_codec(sc, 0x18, 0x0404);
sc 735 dev/pci/maestro.c maestro_write_codec(sc, 0x1A, 0x0000);
sc 736 dev/pci/maestro.c maestro_write_codec(sc, 0x1C, 0x0000);
sc 737 dev/pci/maestro.c maestro_write_codec(sc, 0x02, 0x0404);
sc 738 dev/pci/maestro.c maestro_write_codec(sc, 0x04, 0x0808);
sc 739 dev/pci/maestro.c maestro_write_codec(sc, 0x0C, 0x801F);
sc 740 dev/pci/maestro.c maestro_write_codec(sc, 0x0E, 0x801F);
sc 742 dev/pci/maestro.c sc->codec_if = NULL;
sc 745 dev/pci/maestro.c sc->host_if.arg = sc;
sc 746 dev/pci/maestro.c sc->host_if.attach = maestro_attach_codec;
sc 747 dev/pci/maestro.c sc->host_if.read = maestro_read_codec;
sc 748 dev/pci/maestro.c sc->host_if.write = maestro_write_codec;
sc 749 dev/pci/maestro.c sc->host_if.reset = maestro_reset_codec;
sc 750 dev/pci/maestro.c if (ac97_attach(&sc->host_if) != 0) {
sc 751 dev/pci/maestro.c printf("%s: couldn't attach codec\n", sc->dev.dv_xname);
sc 756 dev/pci/maestro.c sc->play.mode = MAESTRO_PLAY;
sc 757 dev/pci/maestro.c sc->play.sc = sc;
sc 758 dev/pci/maestro.c sc->play.num = 0;
sc 759 dev/pci/maestro.c sc->record.sc = sc;
sc 760 dev/pci/maestro.c sc->record.num = 2;
sc 761 dev/pci/maestro.c sc->record.mode = 0;
sc 764 dev/pci/maestro.c audio_attach_mi(&maestro_hw_if, sc, &sc->dev);
sc 767 dev/pci/maestro.c sc->suspend = PWR_RESUME;
sc 768 dev/pci/maestro.c sc->powerhook = powerhook_establish(maestro_powerhook, sc);
sc 774 dev/pci/maestro.c maestro_power(sc, PPMI_D3);
sc 775 dev/pci/maestro.c if (sc->ih)
sc 776 dev/pci/maestro.c pci_intr_disestablish(pc, sc->ih);
sc 777 dev/pci/maestro.c printf("%s: disabled\n", sc->dev.dv_xname);
sc 778 dev/pci/maestro.c if (sc->dmapool)
sc 779 dev/pci/maestro.c salloc_destroy(sc->dmapool);
sc 781 dev/pci/maestro.c bus_dmamap_destroy(sc->dmat, sc->dmamap);
sc 783 dev/pci/maestro.c bus_dmamem_unmap(sc->dmat, sc->dmabase, sc->dmasize);
sc 785 dev/pci/maestro.c bus_dmamem_free(sc->dmat, &sc->dmaseg, 1);
sc 789 dev/pci/maestro.c maestro_init(sc)
sc 790 dev/pci/maestro.c struct maestro_softc *sc;
sc 796 dev/pci/maestro.c data = pci_conf_read(sc->pc, sc->pt, CONF_LEGACY);
sc 798 dev/pci/maestro.c pci_conf_write(sc->pc, sc->pt, CONF_LEGACY, data);
sc 804 dev/pci/maestro.c data = pci_conf_read(sc->pc, sc->pt, CONF_MAESTRO);
sc 807 dev/pci/maestro.c pci_conf_write(sc->pc, sc->pt, CONF_MAESTRO, data);
sc 809 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_HOSTINT_CTRL,
sc 812 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_HOSTINT_CTRL, 0);
sc 816 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_HOSTINT_CTRL,
sc 822 dev/pci/maestro.c wp_reg_write(sc, WPREG_WAVE_ROMRAM,
sc 824 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_WAVCACHE_CTRL,
sc 828 dev/pci/maestro.c wc_reg_write(sc, reg,
sc 829 dev/pci/maestro.c sc->physaddr >> WAVCACHE_BASEADDR_SHIFT);
sc 832 dev/pci/maestro.c maestro_initcodec(sc);
sc 833 dev/pci/maestro.c bus_space_write_4(sc->iot, sc->ioh, PORT_RINGBUS_CTRL,
sc 836 dev/pci/maestro.c wp_reg_write(sc, WPREG_BASE, 0x8500); /* Parallel I/O */
sc 837 dev/pci/maestro.c ringbus_setdest(sc, RINGBUS_SRC_ADC,
sc 839 dev/pci/maestro.c ringbus_setdest(sc, RINGBUS_SRC_DSOUND,
sc 843 dev/pci/maestro.c bus_space_write_1(sc->iot, sc->ioh, PORT_ASSP_CTRL_B, 0x00);
sc 844 dev/pci/maestro.c bus_space_write_1(sc->iot, sc->ioh, PORT_ASSP_CTRL_A, 0x03);
sc 845 dev/pci/maestro.c bus_space_write_1(sc->iot, sc->ioh, PORT_ASSP_CTRL_C, 0x00);
sc 852 dev/pci/maestro.c bus_space_write_1(sc->iot, sc->ioh, PORT_HWVOL_MASTER, MIDDLE_VOLUME);
sc 854 dev/pci/maestro.c if (sc->flags & MAESTRO_FLAG_SETUPGPIO) {
sc 857 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh,
sc 859 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_GPIO_DIR,
sc 860 dev/pci/maestro.c bus_space_read_2(sc->iot, sc->ioh, PORT_GPIO_DIR) | 0x600);
sc 861 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh,
sc 885 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)arg;
sc 887 dev/pci/maestro.c return (salloc_alloc(sc->dmapool, size));
sc 895 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)self;
sc 897 dev/pci/maestro.c salloc_free(sc->dmapool, ptr);
sc 906 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)self;
sc 910 dev/pci/maestro.c return bus_dmamem_mmap(sc->dmat, &sc->dmaseg, 1,
sc 928 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)self;
sc 930 dev/pci/maestro.c *retp = *sc->sc_audev;
sc 1040 dev/pci/maestro.c maestro_update_timer(sc)
sc 1041 dev/pci/maestro.c struct maestro_softc *sc;
sc 1046 dev/pci/maestro.c if (sc->play.mode & MAESTRO_RUNNING)
sc 1047 dev/pci/maestro.c freq = maestro_calc_timer_freq(&sc->play);
sc 1048 dev/pci/maestro.c if (sc->record.mode & MAESTRO_RUNNING) {
sc 1049 dev/pci/maestro.c n = maestro_calc_timer_freq(&sc->record);
sc 1054 dev/pci/maestro.c wp_settimer(sc, freq);
sc 1055 dev/pci/maestro.c wp_starttimer(sc);
sc 1057 dev/pci/maestro.c wp_stoptimer(sc);
sc 1067 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)hdl;
sc 1073 dev/pci/maestro.c if (sc->play.mode & MAESTRO_RUNNING)
sc 1087 dev/pci/maestro.c sc->play.mode = MAESTRO_PLAY;
sc 1089 dev/pci/maestro.c sc->play.mode |= MAESTRO_STEREO;
sc 1098 dev/pci/maestro.c sc->play.mode |= MAESTRO_8BIT;
sc 1101 dev/pci/maestro.c sc->play.mode |= MAESTRO_UNSIGNED;
sc 1112 dev/pci/maestro.c maestro_set_speed(&sc->play, &play->sample_rate);
sc 1121 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)hdl;
sc 1122 dev/pci/maestro.c DPRINTF(("%s: open(%d)\n", sc->dev.dv_xname, flags));
sc 1129 dev/pci/maestro.c sc->play.mode = MAESTRO_PLAY;
sc 1130 dev/pci/maestro.c sc->record.mode = 0;
sc 1142 dev/pci/maestro.c struct maestro_softc *sc UNUSED = (struct maestro_softc *)hdl;
sc 1151 dev/pci/maestro.c wp_apu_write(ch->sc, ch->num, APUREG_APUTYPE,
sc 1154 dev/pci/maestro.c wp_apu_write(ch->sc, ch->num+1, APUREG_APUTYPE,
sc 1159 dev/pci/maestro.c wp_apu_write(ch->sc, ch->num+2, APUREG_APUTYPE,
sc 1162 dev/pci/maestro.c wp_apu_write(ch->sc, ch->num+3, APUREG_APUTYPE,
sc 1171 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)hdl;
sc 1172 dev/pci/maestro.c maestro_channel_stop(&sc->record);
sc 1173 dev/pci/maestro.c sc->record.mode &= ~MAESTRO_RUNNING;
sc 1174 dev/pci/maestro.c maestro_update_timer(sc);
sc 1182 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)hdl;
sc 1184 dev/pci/maestro.c maestro_channel_stop(&sc->play);
sc 1185 dev/pci/maestro.c sc->play.mode &= ~MAESTRO_RUNNING;
sc 1186 dev/pci/maestro.c maestro_update_timer(sc);
sc 1199 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)hdl;
sc 1201 dev/pci/maestro.c sc->record.mode |= MAESTRO_RUNNING;
sc 1202 dev/pci/maestro.c sc->record.blocksize = blksize;
sc 1204 dev/pci/maestro.c maestro_channel_start(&sc->record);
sc 1206 dev/pci/maestro.c sc->record.threshold = sc->record.start;
sc 1207 dev/pci/maestro.c maestro_update_timer(sc);
sc 1215 dev/pci/maestro.c struct maestro_softc *sc = ch->sc;
sc 1218 dev/pci/maestro.c wcreg_t wcreg = (sc->physaddr - 16) & WAVCACHE_CHCTL_ADDRTAG_MASK;
sc 1238 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_WAVESPACE, ch->wpwa & 0xff00);
sc 1239 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_CURPTR, ch->current);
sc 1240 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_ENDPTR, ch->end);
sc 1241 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_LOOPLEN, ch->end - ch->start);
sc 1242 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_AMPLITUDE, 0xe800);
sc 1243 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_POSITION, 0x8f00
sc 1246 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_FREQ_LOBYTE, APU_plus6dB
sc 1248 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_FREQ_HIWORD, ch->dv >> 8);
sc 1249 dev/pci/maestro.c wc_ctrl_write(sc, n, wcreg);
sc 1250 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_APUTYPE,
sc 1255 dev/pci/maestro.c wp_apu_write(sc, n+1, APUREG_WAVESPACE, ch->wpwa & 0xff00);
sc 1256 dev/pci/maestro.c wp_apu_write(sc, n+1, APUREG_CURPTR, ch->current);
sc 1257 dev/pci/maestro.c wp_apu_write(sc, n+1, APUREG_ENDPTR, ch->end);
sc 1258 dev/pci/maestro.c wp_apu_write(sc, n+1, APUREG_LOOPLEN, ch->end - ch->start);
sc 1259 dev/pci/maestro.c wp_apu_write(sc, n+1, APUREG_AMPLITUDE, 0xe800);
sc 1260 dev/pci/maestro.c wp_apu_write(sc, n+1, APUREG_POSITION, 0x8f00
sc 1263 dev/pci/maestro.c wp_apu_write(sc, n+1, APUREG_FREQ_LOBYTE, APU_plus6dB
sc 1265 dev/pci/maestro.c wp_apu_write(sc, n+1, APUREG_FREQ_HIWORD, ch->dv >> 8);
sc 1267 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_WAVESPACE,
sc 1270 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_WAVESPACE,
sc 1272 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_CURPTR, ch->current);
sc 1273 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_ENDPTR, ch->end);
sc 1274 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_LOOPLEN, ch->end - ch->start);
sc 1275 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_AMPLITUDE, 0xe800);
sc 1276 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_POSITION, 0x8f00
sc 1279 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_FREQ_LOBYTE, APU_plus6dB
sc 1281 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_FREQ_HIWORD, ch->dv >> 8);
sc 1282 dev/pci/maestro.c wc_ctrl_write(sc, n, wcreg);
sc 1283 dev/pci/maestro.c wc_ctrl_write(sc, n+1, wcreg);
sc 1284 dev/pci/maestro.c wp_apu_write(sc, n, APUREG_APUTYPE,
sc 1286 dev/pci/maestro.c wp_apu_write(sc, n+1, APUREG_APUTYPE,
sc 1300 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)hdl;
sc 1302 dev/pci/maestro.c u_int offset = ((caddr_t)start - sc->dmabase) >> 1;
sc 1304 dev/pci/maestro.c sc->play.mode |= MAESTRO_RUNNING;
sc 1305 dev/pci/maestro.c sc->play.wpwa = APU_USE_SYSMEM | (offset >> 8);
sc 1310 dev/pci/maestro.c sc->play.intr = intr;
sc 1311 dev/pci/maestro.c sc->play.intr_arg = arg;
sc 1312 dev/pci/maestro.c sc->play.blocksize = blksize;
sc 1313 dev/pci/maestro.c sc->play.end = offset+size;
sc 1314 dev/pci/maestro.c sc->play.start = offset;
sc 1315 dev/pci/maestro.c sc->play.current = sc->play.start;
sc 1316 dev/pci/maestro.c if ((sc->play.mode & (MAESTRO_STEREO | MAESTRO_8BIT)) == MAESTRO_STEREO) {
sc 1317 dev/pci/maestro.c sc->play.wpwa >>= 1;
sc 1318 dev/pci/maestro.c sc->play.start >>= 1;
sc 1319 dev/pci/maestro.c sc->play.end >>= 1;
sc 1320 dev/pci/maestro.c sc->play.blocksize >>= 1;
sc 1322 dev/pci/maestro.c maestro_channel_start(&sc->play);
sc 1324 dev/pci/maestro.c sc->play.threshold = sc->play.start;
sc 1325 dev/pci/maestro.c maestro_update_timer(sc);
sc 1340 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)self;
sc 1345 dev/pci/maestro.c if ((bus_space_read_1(sc->iot, sc->ioh, PORT_CODEC_STAT)
sc 1352 dev/pci/maestro.c sc->dev.dv_xname);
sc 1355 dev/pci/maestro.c bus_space_write_1(sc->iot, sc->ioh, PORT_CODEC_CMD,
sc 1361 dev/pci/maestro.c if ((bus_space_read_1(sc->iot, sc->ioh, PORT_CODEC_STAT)
sc 1369 dev/pci/maestro.c sc->dev.dv_xname);
sc 1371 dev/pci/maestro.c *datap = bus_space_read_2(sc->iot, sc->ioh, PORT_CODEC_REG);
sc 1381 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)self;
sc 1386 dev/pci/maestro.c if ((bus_space_read_1(sc->iot, sc->ioh, PORT_CODEC_STAT)
sc 1394 dev/pci/maestro.c sc->dev.dv_xname);
sc 1398 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_CODEC_REG, data);
sc 1399 dev/pci/maestro.c bus_space_write_1(sc->iot, sc->ioh, PORT_CODEC_CMD,
sc 1410 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)self;
sc 1412 dev/pci/maestro.c sc->codec_if = cif;
sc 1426 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)self;
sc 1429 dev/pci/maestro.c if (bus_space_read_4(sc->iot, sc->ioh, PORT_RINGBUS_CTRL)
sc 1431 dev/pci/maestro.c bus_space_write_4(sc->iot, sc->ioh, PORT_RINGBUS_CTRL, 0);
sc 1435 dev/pci/maestro.c bus_space_write_4(sc->iot, sc->ioh,
sc 1438 dev/pci/maestro.c bus_space_write_4(sc->iot, sc->ioh,
sc 1442 dev/pci/maestro.c maestro_read_codec(sc, 0, &data);
sc 1443 dev/pci/maestro.c if ((bus_space_read_1(sc->iot, sc->ioh, PORT_CODEC_STAT)
sc 1445 dev/pci/maestro.c bus_space_write_4(sc->iot, sc->ioh,
sc 1450 dev/pci/maestro.c printf("%s: resetting codec\n", sc->dev.dv_xname);
sc 1452 dev/pci/maestro.c data = bus_space_read_2(sc->iot, sc->ioh, PORT_GPIO_DIR);
sc 1453 dev/pci/maestro.c if (pci_conf_read(sc->pc, sc->pt, 0x58) & 1)
sc 1456 dev/pci/maestro.c ~bus_space_read_2(sc->iot, sc->ioh, PORT_GPIO_DATA);
sc 1457 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh,
sc 1459 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh,
sc 1461 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh,
sc 1464 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh,
sc 1467 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh,
sc 1470 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh,
sc 1473 dev/pci/maestro.c bus_space_write_4(sc->iot, sc->ioh,
sc 1479 dev/pci/maestro.c if ((bus_space_read_1(sc->iot, sc->ioh, PORT_CODEC_STAT) &
sc 1481 dev/pci/maestro.c printf("%s: codec failure\n", sc->dev.dv_xname);
sc 1494 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)self;
sc 1499 dev/pci/maestro.c sc->suspend = why;
sc 1500 dev/pci/maestro.c if (sc->record.mode & MAESTRO_RUNNING) {
sc 1501 dev/pci/maestro.c sc->record.current = wp_apu_read(sc, sc->record.num, APUREG_CURPTR);
sc 1502 dev/pci/maestro.c maestro_channel_stop(&sc->record);
sc 1504 dev/pci/maestro.c if (sc->play.mode & MAESTRO_RUNNING) {
sc 1505 dev/pci/maestro.c sc->play.current = wp_apu_read(sc, sc->play.num, APUREG_CURPTR);
sc 1506 dev/pci/maestro.c maestro_channel_stop(&sc->play);
sc 1509 dev/pci/maestro.c wp_stoptimer(sc);
sc 1512 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_HOSTINT_CTRL, 0);
sc 1513 dev/pci/maestro.c maestro_write_codec(sc, AC97_REG_POWER, 0xdf00);
sc 1515 dev/pci/maestro.c bus_space_write_4(sc->iot, sc->ioh, PORT_RINGBUS_CTRL, 0);
sc 1517 dev/pci/maestro.c maestro_power(sc, PPMI_D3);
sc 1521 dev/pci/maestro.c if (sc->suspend == PWR_RESUME) {
sc 1523 dev/pci/maestro.c sc->dev.dv_xname);
sc 1524 dev/pci/maestro.c sc->suspend = why;
sc 1527 dev/pci/maestro.c sc->suspend = why;
sc 1528 dev/pci/maestro.c maestro_power(sc, PPMI_D0);
sc 1530 dev/pci/maestro.c maestro_init(sc);
sc 1532 dev/pci/maestro.c if (sc->codec_if)
sc 1533 dev/pci/maestro.c sc->codec_if->vtbl->restore_ports(sc->codec_if);
sc 1534 dev/pci/maestro.c if (sc->play.mode & MAESTRO_RUNNING)
sc 1535 dev/pci/maestro.c maestro_channel_start(&sc->play);
sc 1536 dev/pci/maestro.c if (sc->record.mode & MAESTRO_RUNNING)
sc 1537 dev/pci/maestro.c maestro_channel_start(&sc->record);
sc 1538 dev/pci/maestro.c maestro_update_timer(sc);
sc 1543 dev/pci/maestro.c maestro_power(sc, status)
sc 1544 dev/pci/maestro.c struct maestro_softc *sc;
sc 1550 dev/pci/maestro.c data = pci_conf_read(sc->pc, sc->pt, CONF_PM_PTR);
sc 1551 dev/pci/maestro.c data = pci_conf_read(sc->pc, sc->pt, data);
sc 1553 dev/pci/maestro.c pci_conf_write(sc->pc, sc->pt, data + PM_CTRL, status);
sc 1565 dev/pci/maestro.c pos = wp_apu_read(ch->sc, ch->num, APUREG_CURPTR);
sc 1594 dev/pci/maestro.c cp = wp_apu_read(ch->sc, ch->num, APUREG_CURPTR);
sc 1595 dev/pci/maestro.c diff = wp_apu_read(ch->sc, ch->num+1, APUREG_CURPTR) - cp;
sc 1598 dev/pci/maestro.c bus_space_write_2(ch->sc->iot, ch->sc->ioh,
sc 1609 dev/pci/maestro.c struct maestro_softc *sc = (struct maestro_softc *)arg;
sc 1612 dev/pci/maestro.c status = bus_space_read_1(sc->iot, sc->ioh, PORT_HOSTINT_STAT);
sc 1617 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_INT_STAT, 1);
sc 1618 dev/pci/maestro.c bus_space_write_1(sc->iot, sc->ioh, PORT_HOSTINT_STAT, status);
sc 1621 dev/pci/maestro.c if (status & HOSTINT_STAT_HWVOL && sc->codec_if != NULL) {
sc 1625 dev/pci/maestro.c n = bus_space_read_1(sc->iot, sc->ioh, PORT_HWVOL_MASTER);
sc 1630 dev/pci/maestro.c sc->codec_if->vtbl->get_portnum_by_name(sc->codec_if,
sc 1632 dev/pci/maestro.c sc->codec_if->vtbl->mixer_get_port(sc->codec_if, &hwvol);
sc 1638 dev/pci/maestro.c sc->codec_if->vtbl->get_portnum_by_name(
sc 1639 dev/pci/maestro.c sc->codec_if, AudioCoutputs, AudioNmaster,
sc 1641 dev/pci/maestro.c sc->codec_if->vtbl->mixer_get_port(sc->codec_if, &hwvol);
sc 1653 dev/pci/maestro.c sc->codec_if->vtbl->mixer_set_port(sc->codec_if, &hwvol);
sc 1655 dev/pci/maestro.c bus_space_write_1(sc->iot, sc->ioh, PORT_HWVOL_MASTER,
sc 1659 dev/pci/maestro.c if (sc->play.mode & MAESTRO_RUNNING) {
sc 1660 dev/pci/maestro.c maestro_channel_advance_dma(&sc->play);
sc 1661 dev/pci/maestro.c if (sc->play.mode & MAESTRO_STEREO)
sc 1662 dev/pci/maestro.c maestro_channel_suppress_jitter(&sc->play);
sc 1665 dev/pci/maestro.c if (sc->record.mode & MAESTRO_RUNNING)
sc 1666 dev/pci/maestro.c maestro_channel_advance_dma(&sc->record);
sc 1678 dev/pci/maestro.c ringbus_setdest(struct maestro_softc *sc, int src, int dest)
sc 1682 dev/pci/maestro.c data = bus_space_read_4(sc->iot, sc->ioh, PORT_RINGBUS_CTRL);
sc 1685 dev/pci/maestro.c bus_space_write_4(sc->iot, sc->ioh, PORT_RINGBUS_CTRL, data);
sc 1691 dev/pci/maestro.c wp_reg_read(struct maestro_softc *sc, int reg)
sc 1693 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_DSP_INDEX, reg);
sc 1694 dev/pci/maestro.c return bus_space_read_2(sc->iot, sc->ioh, PORT_DSP_DATA);
sc 1698 dev/pci/maestro.c wp_reg_write(struct maestro_softc *sc, int reg, wpreg_t data)
sc 1700 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_DSP_INDEX, reg);
sc 1701 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_DSP_DATA, data);
sc 1705 dev/pci/maestro.c apu_setindex(struct maestro_softc *sc, int reg)
sc 1709 dev/pci/maestro.c wp_reg_write(sc, WPREG_CRAM_PTR, reg);
sc 1712 dev/pci/maestro.c if (bus_space_read_2(sc->iot, sc->ioh,
sc 1715 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_DSP_DATA, reg);
sc 1718 dev/pci/maestro.c printf("%s: apu_setindex() timeout\n", sc->dev.dv_xname);
sc 1722 dev/pci/maestro.c wp_apu_read(struct maestro_softc *sc, int ch, int reg)
sc 1726 dev/pci/maestro.c apu_setindex(sc, ((unsigned)ch << 4) + reg);
sc 1727 dev/pci/maestro.c ret = wp_reg_read(sc, WPREG_DATA_PORT);
sc 1732 dev/pci/maestro.c wp_apu_write(struct maestro_softc *sc, int ch, int reg, wpreg_t data)
sc 1736 dev/pci/maestro.c apu_setindex(sc, ((unsigned)ch << 4) + reg);
sc 1737 dev/pci/maestro.c wp_reg_write(sc, WPREG_DATA_PORT, data);
sc 1739 dev/pci/maestro.c if (bus_space_read_2(sc->iot, sc->ioh, PORT_DSP_DATA) == data)
sc 1741 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_DSP_DATA, data);
sc 1744 dev/pci/maestro.c printf("%s: wp_apu_write() timeout\n", sc->dev.dv_xname);
sc 1748 dev/pci/maestro.c wp_settimer(struct maestro_softc *sc, u_int freq)
sc 1765 dev/pci/maestro.c wp_reg_write(sc, WPREG_TIMER_ENABLE, 0);
sc 1766 dev/pci/maestro.c wp_reg_write(sc, WPREG_TIMER_FREQ,
sc 1768 dev/pci/maestro.c wp_reg_write(sc, WPREG_TIMER_ENABLE, 1);
sc 1772 dev/pci/maestro.c wp_starttimer(struct maestro_softc *sc)
sc 1774 dev/pci/maestro.c wp_reg_write(sc, WPREG_TIMER_START, 1);
sc 1778 dev/pci/maestro.c wp_stoptimer(struct maestro_softc *sc)
sc 1780 dev/pci/maestro.c wp_reg_write(sc, WPREG_TIMER_START, 0);
sc 1781 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_INT_STAT, 1);
sc 1787 dev/pci/maestro.c wc_reg_read(struct maestro_softc *sc, int reg)
sc 1789 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_WAVCACHE_INDEX, reg);
sc 1790 dev/pci/maestro.c return bus_space_read_2(sc->iot, sc->ioh, PORT_WAVCACHE_DATA);
sc 1794 dev/pci/maestro.c wc_reg_write(struct maestro_softc *sc, int reg, wcreg_t data)
sc 1796 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_WAVCACHE_INDEX, reg);
sc 1797 dev/pci/maestro.c bus_space_write_2(sc->iot, sc->ioh, PORT_WAVCACHE_DATA, data);
sc 1801 dev/pci/maestro.c wc_ctrl_read(struct maestro_softc *sc, int ch)
sc 1803 dev/pci/maestro.c return wc_reg_read(sc, ch << 3);
sc 1807 dev/pci/maestro.c wc_ctrl_write(struct maestro_softc *sc, int ch, wcreg_t data)
sc 1809 dev/pci/maestro.c wc_reg_write(sc, ch << 3, data);
sc 137 dev/pci/mbg.c struct mbg_softc *sc = (struct mbg_softc *)self;
sc 146 dev/pci/mbg.c if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0, &sc->sc_iot,
sc 147 dev/pci/mbg.c &sc->sc_ioh, NULL, &iosize, 0)) {
sc 155 dev/pci/mbg.c strlcpy(sc->sc_timedelta.desc, desc, sizeof(sc->sc_timedelta.desc));
sc 159 dev/pci/mbg.c sc->sc_read = mbg_read_amcc_s5933;
sc 164 dev/pci/mbg.c sc->sc_read = mbg_read_asic;
sc 171 dev/pci/mbg.c if (sc->sc_read(sc, MBG_GET_FW_ID_1, fw_id, MBG_FIFO_LEN, NULL) ||
sc 172 dev/pci/mbg.c sc->sc_read(sc, MBG_GET_FW_ID_2, &fw_id[MBG_FIFO_LEN], MBG_FIFO_LEN,
sc 180 dev/pci/mbg.c if (sc->sc_read(sc, MBG_GET_TIME, (char *)&tframe,
sc 183 dev/pci/mbg.c sc->sc_status = 0;
sc 191 dev/pci/mbg.c sc->sc_status = tframe.status;
sc 194 dev/pci/mbg.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 195 dev/pci/mbg.c sizeof(sc->sc_sensordev.xname));
sc 197 dev/pci/mbg.c sc->sc_timedelta.type = SENSOR_TIMEDELTA;
sc 198 dev/pci/mbg.c sc->sc_timedelta.status = SENSOR_S_UNKNOWN;
sc 199 dev/pci/mbg.c sc->sc_timedelta.value = 0LL;
sc 200 dev/pci/mbg.c sc->sc_timedelta.flags = 0;
sc 201 dev/pci/mbg.c sensor_attach(&sc->sc_sensordev, &sc->sc_timedelta);
sc 203 dev/pci/mbg.c sc->sc_signal.type = SENSOR_PERCENT;
sc 204 dev/pci/mbg.c sc->sc_signal.status = SENSOR_S_UNKNOWN;
sc 205 dev/pci/mbg.c sc->sc_signal.value = 0LL;
sc 206 dev/pci/mbg.c sc->sc_signal.flags = 0;
sc 207 dev/pci/mbg.c strlcpy(sc->sc_signal.desc, "Signal strength",
sc 208 dev/pci/mbg.c sizeof(sc->sc_signal.desc));
sc 209 dev/pci/mbg.c sensor_attach(&sc->sc_sensordev, &sc->sc_signal);
sc 211 dev/pci/mbg.c sensor_task_register(sc, mbg_task, 10);
sc 212 dev/pci/mbg.c sensordev_install(&sc->sc_sensordev);
sc 218 dev/pci/mbg.c struct mbg_softc *sc = (struct mbg_softc *)arg;
sc 225 dev/pci/mbg.c if (sc->sc_read(sc, MBG_GET_TIME, (char *)&tframe, sizeof(tframe),
sc 227 dev/pci/mbg.c log(LOG_ERR, "%s: error reading time\n", sc->sc_dev.dv_xname);
sc 232 dev/pci/mbg.c sc->sc_dev.dv_xname);
sc 243 dev/pci/mbg.c sc->sc_timedelta.value = (int64_t)((tstamp.tv_sec - trecv) * 100
sc 245 dev/pci/mbg.c sc->sc_timedelta.status = SENSOR_S_OK;
sc 246 dev/pci/mbg.c sc->sc_timedelta.tv.tv_sec = tstamp.tv_sec;
sc 247 dev/pci/mbg.c sc->sc_timedelta.tv.tv_usec = tstamp.tv_nsec / 1000;
sc 255 dev/pci/mbg.c sc->sc_signal.value = signal * 100000 / MBG_SIG_MAX;
sc 256 dev/pci/mbg.c sc->sc_signal.status = SENSOR_S_OK;
sc 257 dev/pci/mbg.c sc->sc_signal.tv.tv_sec = sc->sc_timedelta.tv.tv_sec;
sc 258 dev/pci/mbg.c sc->sc_signal.tv.tv_usec = sc->sc_timedelta.tv.tv_usec;
sc 260 dev/pci/mbg.c if (tframe.status != sc->sc_status) {
sc 263 dev/pci/mbg.c sc->sc_dev.dv_xname);
sc 266 dev/pci/mbg.c sc->sc_dev.dv_xname);
sc 267 dev/pci/mbg.c sc->sc_status = tframe.status;
sc 276 dev/pci/mbg.c mbg_read_amcc_s5933(struct mbg_softc *sc, int cmd, char *buf, size_t len,
sc 284 dev/pci/mbg.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMCC_MCSR + 3, 0x0c);
sc 287 dev/pci/mbg.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMCC_INTCSR + 3, 0x3c);
sc 292 dev/pci/mbg.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, AMCC_OMB1, cmd);
sc 302 dev/pci/mbg.c status = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 311 dev/pci/mbg.c if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, AMCC_MCSR)
sc 313 dev/pci/mbg.c printf("%s: FIFO error\n", sc->sc_dev.dv_xname);
sc 316 dev/pci/mbg.c buf[n] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 327 dev/pci/mbg.c mbg_read_asic(struct mbg_softc *sc, int cmd, char *buf, size_t len,
sc 342 dev/pci/mbg.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, ASIC_DATA, cmd);
sc 345 dev/pci/mbg.c bus_space_write_4(sc->sc_iot, sc->sc_ioh, ASIC_DATA, cmd);
sc 355 dev/pci/mbg.c status = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ASIC_STATUS);
sc 364 dev/pci/mbg.c data = bus_space_read_4(sc->sc_iot, sc->sc_ioh, port);
sc 371 dev/pci/mbg.c data = bus_space_read_4(sc->sc_iot, sc->sc_ioh, port);
sc 104 dev/pci/mfi_pci.c struct mfi_softc *sc = (struct mfi_softc *)self;
sc 123 dev/pci/mfi_pci.c &sc->sc_iot, &sc->sc_ioh, NULL, &size, MFI_PCI_MEMSIZE)) {
sc 128 dev/pci/mfi_pci.c sc->sc_dmat = pa->pa_dmat;
sc 132 dev/pci/mfi_pci.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
sc 136 dev/pci/mfi_pci.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, mfi_intr, sc,
sc 137 dev/pci/mfi_pci.c sc->sc_dev.dv_xname);
sc 138 dev/pci/mfi_pci.c if (!sc->sc_ih) {
sc 143 dev/pci/mfi_pci.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
sc 149 dev/pci/mfi_pci.c if (mfi_attach(sc)) {
sc 150 dev/pci/mfi_pci.c printf("%s: can't attach", DEVNAME(sc));
sc 151 dev/pci/mfi_pci.c pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
sc 152 dev/pci/mfi_pci.c sc->sc_ih = NULL;
sc 153 dev/pci/mfi_pci.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
sc 93 dev/pci/mpi_pci.c struct mpi_softc *sc = &psc->psc_mpi;
sc 103 dev/pci/mpi_pci.c sc->sc_dmat = pa->pa_dmat;
sc 104 dev/pci/mpi_pci.c sc->sc_ios = 0;
sc 117 dev/pci/mpi_pci.c if (pci_mapreg_map(pa, r, memtype, 0, &sc->sc_iot, &sc->sc_ioh,
sc 118 dev/pci/mpi_pci.c NULL, &sc->sc_ios, 0) != 0) {
sc 133 dev/pci/mpi_pci.c mpi_intr, sc, sc->sc_dev.dv_xname);
sc 144 dev/pci/mpi_pci.c sc->sc_flags |= MPI_F_SPI;
sc 146 dev/pci/mpi_pci.c if (mpi_attach(sc) != 0) {
sc 157 dev/pci/mpi_pci.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 158 dev/pci/mpi_pci.c sc->sc_ios = 0;
sc 165 dev/pci/mpi_pci.c struct mpi_softc *sc = &psc->psc_mpi;
sc 167 dev/pci/mpi_pci.c mpi_detach(sc);
sc 173 dev/pci/mpi_pci.c if (sc->sc_ios != 0) {
sc 174 dev/pci/mpi_pci.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios);
sc 175 dev/pci/mpi_pci.c sc->sc_ios = 0;
sc 92 dev/pci/musycc.c musycc_attach_common(struct musycc_softc *sc, u_int32_t portmap, u_int32_t mode)
sc 97 dev/pci/musycc.c if (musycc_alloc_groupdesc(sc) == -1) {
sc 102 dev/pci/musycc.c if (musycc_alloc_intqueue(sc) == -1) {
sc 104 dev/pci/musycc.c musycc_free_groupdesc(sc);
sc 113 dev/pci/musycc.c sc->mc_global_conf = (portmap & MUSYCC_CONF_PORTMAP) |
sc 119 dev/pci/musycc.c sc->mc_groups = (struct musycc_group *)malloc(sc->mc_ngroups *
sc 121 dev/pci/musycc.c if (sc->mc_groups == NULL) {
sc 123 dev/pci/musycc.c musycc_free_groupdesc(sc);
sc 124 dev/pci/musycc.c musycc_free_intqueue(sc);
sc 127 dev/pci/musycc.c bzero(sc->mc_groups, sc->mc_ngroups * sizeof(struct musycc_group));
sc 129 dev/pci/musycc.c for (i = 0; i < sc->mc_ngroups; i++) {
sc 130 dev/pci/musycc.c mg = &sc->mc_groups[i];
sc 131 dev/pci/musycc.c mg->mg_hdlc = sc;
sc 134 dev/pci/musycc.c mg->mg_dmat = sc->mc_dmat;
sc 139 dev/pci/musycc.c musycc_free_group(&sc->mc_groups[j]);
sc 140 dev/pci/musycc.c musycc_free_groupdesc(sc);
sc 141 dev/pci/musycc.c musycc_free_intqueue(sc);
sc 146 dev/pci/musycc.c (sc->mc_groupkva + MUSYCC_GROUPBASE(i));
sc 152 dev/pci/musycc.c bus_dmamap_sync(sc->mc_dmat, sc->mc_cfgmap,
sc 155 dev/pci/musycc.c bus_space_write_4(sc->mc_st, sc->mc_sh, MUSYCC_GROUPBASE(i),
sc 156 dev/pci/musycc.c sc->mc_cfgmap->dm_segs[0].ds_addr + MUSYCC_GROUPBASE(i));
sc 160 dev/pci/musycc.c bus_space_write_4(sc->mc_st, sc->mc_sh, MUSYCC_DACB_PTR, 0);
sc 162 dev/pci/musycc.c bus_space_write_4(sc->mc_st, sc->mc_sh, MUSYCC_GLOBALCONF,
sc 163 dev/pci/musycc.c sc->mc_global_conf);
sc 165 dev/pci/musycc.c bus_space_write_4(sc->mc_st, sc->mc_sh, MUSYCC_INTQPTR,
sc 166 dev/pci/musycc.c sc->mc_intrqptr);
sc 171 dev/pci/musycc.c bus_space_write_4(sc->mc_st, sc->mc_sh, MUSYCC_INTQLEN,
sc 175 dev/pci/musycc.c for (i = 0; i < sc->mc_ngroups; i++) {
sc 176 dev/pci/musycc.c mg = &sc->mc_groups[i];
sc 186 dev/pci/musycc.c musycc_alloc_groupdesc(struct musycc_softc *sc)
sc 193 dev/pci/musycc.c if (bus_dmamem_alloc(sc->mc_dmat, sc->mc_ngroups * 2048,
sc 194 dev/pci/musycc.c 2048, 0, sc->mc_cfgseg, 1, &sc->mc_cfgnseg, BUS_DMA_NOWAIT)) {
sc 197 dev/pci/musycc.c if (bus_dmamem_map(sc->mc_dmat, sc->mc_cfgseg, sc->mc_cfgnseg,
sc 198 dev/pci/musycc.c sc->mc_ngroups * 2048, &sc->mc_groupkva, BUS_DMA_NOWAIT)) {
sc 199 dev/pci/musycc.c bus_dmamem_free(sc->mc_dmat, sc->mc_cfgseg, sc->mc_cfgnseg);
sc 203 dev/pci/musycc.c if (bus_dmamap_create(sc->mc_dmat, sc->mc_ngroups * 2048,
sc 204 dev/pci/musycc.c 1, sc->mc_ngroups * 2048, 0, BUS_DMA_NOWAIT, &sc->mc_cfgmap)) {
sc 205 dev/pci/musycc.c bus_dmamem_unmap(sc->mc_dmat, sc->mc_groupkva,
sc 206 dev/pci/musycc.c sc->mc_ngroups * 2048);
sc 207 dev/pci/musycc.c bus_dmamem_free(sc->mc_dmat, sc->mc_cfgseg, sc->mc_cfgnseg);
sc 210 dev/pci/musycc.c if (bus_dmamap_load(sc->mc_dmat, sc->mc_cfgmap, sc->mc_groupkva,
sc 211 dev/pci/musycc.c sc->mc_ngroups * 2048, NULL, BUS_DMA_NOWAIT)) {
sc 212 dev/pci/musycc.c musycc_free_groupdesc(sc);
sc 220 dev/pci/musycc.c musycc_alloc_intqueue(struct musycc_softc *sc)
sc 225 dev/pci/musycc.c if (bus_dmamem_alloc(sc->mc_dmat, sizeof(struct musycc_intdesc), 4, 0,
sc 226 dev/pci/musycc.c sc->mc_intrseg, 1, &sc->mc_intrnseg, BUS_DMA_NOWAIT)) {
sc 229 dev/pci/musycc.c if (bus_dmamem_map(sc->mc_dmat, sc->mc_intrseg, sc->mc_intrnseg,
sc 230 dev/pci/musycc.c sizeof(struct musycc_intdesc), (caddr_t *)&sc->mc_intrd,
sc 232 dev/pci/musycc.c bus_dmamem_free(sc->mc_dmat, sc->mc_intrseg, sc->mc_intrnseg);
sc 237 dev/pci/musycc.c if (bus_dmamap_create(sc->mc_dmat, sizeof(struct musycc_intdesc),
sc 239 dev/pci/musycc.c &sc->mc_intrmap)) {
sc 240 dev/pci/musycc.c bus_dmamem_unmap(sc->mc_dmat, (caddr_t)sc->mc_intrd,
sc 242 dev/pci/musycc.c bus_dmamem_free(sc->mc_dmat, sc->mc_intrseg, sc->mc_intrnseg);
sc 245 dev/pci/musycc.c if (bus_dmamap_load(sc->mc_dmat, sc->mc_intrmap, sc->mc_intrd,
sc 247 dev/pci/musycc.c musycc_free_intqueue(sc);
sc 252 dev/pci/musycc.c sc->mc_intrqptr = sc->mc_intrmap->dm_segs[0].ds_addr +
sc 329 dev/pci/musycc.c musycc_free_groupdesc(struct musycc_softc *sc)
sc 331 dev/pci/musycc.c bus_dmamap_destroy(sc->mc_dmat, sc->mc_cfgmap);
sc 332 dev/pci/musycc.c bus_dmamem_unmap(sc->mc_dmat, sc->mc_groupkva,
sc 333 dev/pci/musycc.c sc->mc_ngroups * 2048);
sc 334 dev/pci/musycc.c bus_dmamem_free(sc->mc_dmat, sc->mc_cfgseg, sc->mc_cfgnseg);
sc 338 dev/pci/musycc.c musycc_free_intqueue(struct musycc_softc *sc)
sc 340 dev/pci/musycc.c bus_dmamap_destroy(sc->mc_dmat, sc->mc_intrmap);
sc 341 dev/pci/musycc.c bus_dmamem_unmap(sc->mc_dmat, (caddr_t)sc->mc_intrd,
sc 343 dev/pci/musycc.c bus_dmamem_free(sc->mc_dmat, sc->mc_intrseg, sc->mc_intrnseg);
sc 1550 dev/pci/musycc.c struct musycc_softc *sc = arg;
sc 1552 dev/pci/musycc.c printf("%s: interrupt\n", sc->mc_dev.dv_xname);
sc 1601 dev/pci/musycc.c struct musycc_softc *sc = cc->cc_group->mg_hdlc->mc_other;
sc 1607 dev/pci/musycc.c sc->mc_ledstate |= value;
sc 1609 dev/pci/musycc.c sc->mc_ledstate &= ~value;
sc 1611 dev/pci/musycc.c bus_space_write_1(sc->mc_st, sc->mc_sh, sc->mc_ledbase,
sc 1612 dev/pci/musycc.c sc->mc_ledstate);
sc 1613 dev/pci/musycc.c bus_space_barrier(sc->mc_st, sc->mc_sh, sc->mc_ledbase, 1,
sc 76 dev/pci/musycc_obsd.c struct musycc_softc *sc = (struct musycc_softc *)self;
sc 84 dev/pci/musycc_obsd.c &sc->mc_st, &sc->mc_sh, NULL, &sc->mc_iosize, 0)) {
sc 88 dev/pci/musycc_obsd.c sc->mc_dmat = pa->pa_dmat;
sc 92 dev/pci/musycc_obsd.c sc->mc_ngroups = 8;
sc 93 dev/pci/musycc_obsd.c sc->mc_nports = 8;
sc 96 dev/pci/musycc_obsd.c sc->mc_ngroups = 4;
sc 97 dev/pci/musycc_obsd.c sc->mc_nports = 4;
sc 100 dev/pci/musycc_obsd.c sc->mc_ngroups = 2;
sc 101 dev/pci/musycc_obsd.c sc->mc_nports = 2;
sc 104 dev/pci/musycc_obsd.c sc->mc_ngroups = 1;
sc 105 dev/pci/musycc_obsd.c sc->mc_nports = 1;
sc 110 dev/pci/musycc_obsd.c return (musycc_ebus_attach(parent, sc, pa));
sc 112 dev/pci/musycc_obsd.c sc->bus = parent->dv_unit;
sc 113 dev/pci/musycc_obsd.c sc->device = pa->pa_device;
sc 114 dev/pci/musycc_obsd.c SLIST_INSERT_HEAD(&msc_list, sc, list);
sc 121 dev/pci/musycc_obsd.c bus_space_unmap(sc->mc_st, sc->mc_sh, sc->mc_iosize);
sc 126 dev/pci/musycc_obsd.c sc->mc_ih = pci_intr_establish(pc, ih, IPL_NET, musycc_intr, sc,
sc 128 dev/pci/musycc_obsd.c if (sc->mc_ih == NULL) {
sc 133 dev/pci/musycc_obsd.c bus_space_unmap(sc->mc_st, sc->mc_sh, sc->mc_iosize);
sc 140 dev/pci/musycc_obsd.c bus_space_write_4(sc->mc_st, sc->mc_sh, MUSYCC_SERREQ(0),
sc 142 dev/pci/musycc_obsd.c bus_space_barrier(sc->mc_st, sc->mc_sh, MUSYCC_SERREQ(0),
sc 150 dev/pci/musycc_obsd.c sc->mc_global_conf = MUSYCC_CONF_MPUSEL | MUSYCC_CONF_ECKEN |
sc 155 dev/pci/musycc_obsd.c bus_space_write_4(sc->mc_st, sc->mc_sh, MUSYCC_DACB_PTR, 0);
sc 157 dev/pci/musycc_obsd.c bus_space_write_4(sc->mc_st, sc->mc_sh, MUSYCC_GLOBALCONF,
sc 158 dev/pci/musycc_obsd.c sc->mc_global_conf);
sc 169 dev/pci/musycc_obsd.c struct musycc_softc *sc;
sc 181 dev/pci/musycc_obsd.c SLIST_FOREACH(sc, &msc_list, list)
sc 182 dev/pci/musycc_obsd.c if (sc->bus == parent->dv_unit && sc->device == pa->pa_device)
sc 184 dev/pci/musycc_obsd.c if (sc == NULL) {
sc 190 dev/pci/musycc_obsd.c esc->mc_other = sc;
sc 191 dev/pci/musycc_obsd.c sc->mc_other = esc;
sc 217 dev/pci/musycc_obsd.c if (ebus_attach_device(&rom, sc, 0, 0x400) != 0) {
sc 232 dev/pci/musycc_obsd.c if (musycc_attach_common(sc, baseconf.portmap, baseconf.portmode))
sc 246 dev/pci/musycc_obsd.c printf("%s: bad rom\n", sc->mc_dev.dv_xname);
sc 261 dev/pci/musycc_obsd.c (void)config_found(&sc->mc_dev, &ma, musycc_ebus_print);
sc 267 dev/pci/musycc_obsd.c pci_intr_disestablish(pc, sc->mc_ih);
sc 270 dev/pci/musycc_obsd.c bus_space_unmap(sc->mc_st, sc->mc_sh, sc->mc_iosize);
sc 169 dev/pci/neo.c static int nm_waitcd(struct neo_softc *sc);
sc 170 dev/pci/neo.c static int nm_loadcoeff(struct neo_softc *sc, int dir, int num);
sc 198 dev/pci/neo.c int neo_attach_codec(void *sc, struct ac97_codec_if *);
sc 199 dev/pci/neo.c int neo_read_codec(void *sc, u_int8_t a, u_int16_t *d);
sc 200 dev/pci/neo.c int neo_write_codec(void *sc, u_int8_t a, u_int16_t d);
sc 201 dev/pci/neo.c void neo_reset_codec(void *sc);
sc 202 dev/pci/neo.c enum ac97_host_flags neo_flags_codec(void *sc);
sc 208 dev/pci/neo.c void neo_set_mixer(struct neo_softc *sc, int a, int d);
sc 290 dev/pci/neo.c nm_rd(struct neo_softc *sc, int regno, int size)
sc 292 dev/pci/neo.c bus_space_tag_t st = sc->regiot;
sc 293 dev/pci/neo.c bus_space_handle_t sh = sc->regioh;
sc 308 dev/pci/neo.c nm_wr(struct neo_softc *sc, int regno, u_int32_t data, int size)
sc 310 dev/pci/neo.c bus_space_tag_t st = sc->regiot;
sc 311 dev/pci/neo.c bus_space_handle_t sh = sc->regioh;
sc 327 dev/pci/neo.c nm_rdbuf(struct neo_softc *sc, int regno, int size)
sc 329 dev/pci/neo.c bus_space_tag_t st = sc->bufiot;
sc 330 dev/pci/neo.c bus_space_handle_t sh = sc->bufioh;
sc 345 dev/pci/neo.c nm_wrbuf(struct neo_softc *sc, int regno, u_int32_t data, int size)
sc 347 dev/pci/neo.c bus_space_tag_t st = sc->bufiot;
sc 348 dev/pci/neo.c bus_space_handle_t sh = sc->bufioh;
sc 365 dev/pci/neo.c nm_waitcd(struct neo_softc *sc)
sc 371 dev/pci/neo.c if (nm_rd(sc, sc->ac97_status, 2) & sc->ac97_busy)
sc 383 dev/pci/neo.c nm_ackint(struct neo_softc *sc, u_int32_t num)
sc 385 dev/pci/neo.c if (sc->type == NM256AV_PCI_ID)
sc 386 dev/pci/neo.c nm_wr(sc, NM_INT_REG, num << 1, 2);
sc 387 dev/pci/neo.c else if (sc->type == NM256ZX_PCI_ID)
sc 388 dev/pci/neo.c nm_wr(sc, NM_INT_REG, num, 4);
sc 392 dev/pci/neo.c nm_loadcoeff(struct neo_softc *sc, int dir, int num)
sc 416 dev/pci/neo.c nm_wrbuf(sc, sc->cbuf + i, nf->coefficients[ofs + i], 1);
sc 417 dev/pci/neo.c nm_wr(sc, addr, sc->cbuf, 4);
sc 420 dev/pci/neo.c nm_wr(sc, addr + 4, sc->cbuf + sz, 4);
sc 425 dev/pci/neo.c nmchan_getptr(sc, mode)
sc 426 dev/pci/neo.c struct neo_softc *sc;
sc 430 dev/pci/neo.c return (nm_rd(sc, NM_PBUFFER_CURRP, 4) - sc->pbuf);
sc 432 dev/pci/neo.c return (nm_rd(sc, NM_RBUFFER_CURRP, 4) - sc->rbuf);
sc 440 dev/pci/neo.c struct neo_softc *sc = (struct neo_softc *)p;
sc 444 dev/pci/neo.c status = nm_rd(sc, NM_INT_REG, sc->irsz);
sc 446 dev/pci/neo.c if (status & sc->playint) {
sc 447 dev/pci/neo.c status &= ~sc->playint;
sc 449 dev/pci/neo.c sc->pwmark += sc->pblksize;
sc 450 dev/pci/neo.c sc->pwmark %= sc->pbufsize;
sc 452 dev/pci/neo.c nm_wr(sc, NM_PBUFFER_WMARK, sc->pbuf + sc->pwmark, 4);
sc 454 dev/pci/neo.c nm_ackint(sc, sc->playint);
sc 456 dev/pci/neo.c if (sc->pintr)
sc 457 dev/pci/neo.c (*sc->pintr)(sc->parg);
sc 461 dev/pci/neo.c if (status & sc->recint) {
sc 462 dev/pci/neo.c status &= ~sc->recint;
sc 464 dev/pci/neo.c sc->rwmark += sc->rblksize;
sc 465 dev/pci/neo.c sc->rwmark %= sc->rbufsize;
sc 467 dev/pci/neo.c nm_ackint(sc, sc->recint);
sc 468 dev/pci/neo.c if (sc->rintr)
sc 469 dev/pci/neo.c (*sc->rintr)(sc->rarg);
sc 473 dev/pci/neo.c if (status & sc->misc1int) {
sc 474 dev/pci/neo.c status &= ~sc->misc1int;
sc 475 dev/pci/neo.c nm_ackint(sc, sc->misc1int);
sc 476 dev/pci/neo.c x = nm_rd(sc, 0x400, 1);
sc 477 dev/pci/neo.c nm_wr(sc, 0x400, x | 2, 1);
sc 478 dev/pci/neo.c printf("%s: misc int 1\n", sc->dev.dv_xname);
sc 481 dev/pci/neo.c if (status & sc->misc2int) {
sc 482 dev/pci/neo.c status &= ~sc->misc2int;
sc 483 dev/pci/neo.c nm_ackint(sc, sc->misc2int);
sc 484 dev/pci/neo.c x = nm_rd(sc, 0x400, 1);
sc 485 dev/pci/neo.c nm_wr(sc, 0x400, x & ~2, 1);
sc 486 dev/pci/neo.c printf("%s: misc int 2\n", sc->dev.dv_xname);
sc 490 dev/pci/neo.c status &= ~sc->misc2int;
sc 491 dev/pci/neo.c nm_ackint(sc, sc->misc2int);
sc 492 dev/pci/neo.c printf("%s: unknown int\n", sc->dev.dv_xname);
sc 506 dev/pci/neo.c nm_init(struct neo_softc *sc)
sc 510 dev/pci/neo.c if (sc->type == NM256AV_PCI_ID) {
sc 511 dev/pci/neo.c sc->ac97_base = NM_MIXER_OFFSET;
sc 512 dev/pci/neo.c sc->ac97_status = NM_MIXER_STATUS_OFFSET;
sc 513 dev/pci/neo.c sc->ac97_busy = NM_MIXER_READY_MASK;
sc 515 dev/pci/neo.c sc->buftop = 2560 * 1024;
sc 517 dev/pci/neo.c sc->irsz = 2;
sc 518 dev/pci/neo.c sc->playint = NM_PLAYBACK_INT;
sc 519 dev/pci/neo.c sc->recint = NM_RECORD_INT;
sc 520 dev/pci/neo.c sc->misc1int = NM_MISC_INT_1;
sc 521 dev/pci/neo.c sc->misc2int = NM_MISC_INT_2;
sc 522 dev/pci/neo.c } else if (sc->type == NM256ZX_PCI_ID) {
sc 523 dev/pci/neo.c sc->ac97_base = NM_MIXER_OFFSET;
sc 524 dev/pci/neo.c sc->ac97_status = NM2_MIXER_STATUS_OFFSET;
sc 525 dev/pci/neo.c sc->ac97_busy = NM2_MIXER_READY_MASK;
sc 527 dev/pci/neo.c sc->buftop = (nm_rd(sc, 0xa0b, 2)? 6144 : 4096) * 1024;
sc 529 dev/pci/neo.c sc->irsz = 4;
sc 530 dev/pci/neo.c sc->playint = NM2_PLAYBACK_INT;
sc 531 dev/pci/neo.c sc->recint = NM2_RECORD_INT;
sc 532 dev/pci/neo.c sc->misc1int = NM2_MISC_INT_1;
sc 533 dev/pci/neo.c sc->misc2int = NM2_MISC_INT_2;
sc 535 dev/pci/neo.c sc->badintr = 0;
sc 536 dev/pci/neo.c ofs = sc->buftop - 0x0400;
sc 537 dev/pci/neo.c sc->buftop -= 0x1400;
sc 539 dev/pci/neo.c if ((nm_rdbuf(sc, ofs, 4) & NM_SIG_MASK) == NM_SIGNATURE) {
sc 540 dev/pci/neo.c i = nm_rdbuf(sc, ofs + 4, 4);
sc 542 dev/pci/neo.c sc->buftop = i;
sc 545 dev/pci/neo.c sc->cbuf = sc->buftop - NM_MAX_COEFFICIENT;
sc 546 dev/pci/neo.c sc->rbuf = sc->cbuf - NM_BUFFSIZE;
sc 547 dev/pci/neo.c sc->pbuf = sc->rbuf - NM_BUFFSIZE;
sc 548 dev/pci/neo.c sc->acbuf = sc->pbuf - (NM_TOTAL_COEFF_COUNT * 4);
sc 550 dev/pci/neo.c nm_wr(sc, 0, 0x11, 1);
sc 551 dev/pci/neo.c nm_wr(sc, NM_RECORD_ENABLE_REG, 0, 1);
sc 552 dev/pci/neo.c nm_wr(sc, 0x214, 0, 2);
sc 564 dev/pci/neo.c struct neo_softc *sc = (struct neo_softc *)self;
sc 571 dev/pci/neo.c sc->type = pa->pa_id;
sc 575 dev/pci/neo.c &sc->bufiot, &sc->bufioh, NULL, NULL, 0)) {
sc 576 dev/pci/neo.c printf("\n%s: can't map i/o space\n", sc->dev.dv_xname);
sc 582 dev/pci/neo.c &sc->regiot, &sc->regioh, NULL, NULL, 0)) {
sc 583 dev/pci/neo.c printf("\n%s: can't map i/o space\n", sc->dev.dv_xname);
sc 589 dev/pci/neo.c printf("\n%s: couldn't map interrupt\n", sc->dev.dv_xname);
sc 593 dev/pci/neo.c sc->ih = pci_intr_establish(pc, ih, IPL_AUDIO, neo_intr, sc,
sc 594 dev/pci/neo.c sc->dev.dv_xname);
sc 596 dev/pci/neo.c if (sc->ih == NULL) {
sc 598 dev/pci/neo.c sc->dev.dv_xname);
sc 606 dev/pci/neo.c if ((error = nm_init(sc)) != 0)
sc 609 dev/pci/neo.c sc->host_if.arg = sc;
sc 611 dev/pci/neo.c sc->host_if.attach = neo_attach_codec;
sc 612 dev/pci/neo.c sc->host_if.read = neo_read_codec;
sc 613 dev/pci/neo.c sc->host_if.write = neo_write_codec;
sc 614 dev/pci/neo.c sc->host_if.reset = neo_reset_codec;
sc 615 dev/pci/neo.c sc->host_if.flags = neo_flags_codec;
sc 617 dev/pci/neo.c if ((error = ac97_attach(&sc->host_if)) != 0)
sc 620 dev/pci/neo.c sc->powerhook = powerhook_establish(neo_power, sc);
sc 622 dev/pci/neo.c audio_attach_mi(&neo_hw_if, sc, &sc->dev);
sc 630 dev/pci/neo.c struct neo_softc *sc = (struct neo_softc *)addr;
sc 633 dev/pci/neo.c nm_init(sc);
sc 634 dev/pci/neo.c (sc->codec_if->vtbl->restore_ports)(sc->codec_if);
sc 682 dev/pci/neo.c struct neo_softc *sc = sc_;
sc 684 dev/pci/neo.c if (!nm_waitcd(sc)) {
sc 685 dev/pci/neo.c *d = nm_rd(sc, sc->ac97_base + a, 2);
sc 700 dev/pci/neo.c struct neo_softc *sc = sc_;
sc 703 dev/pci/neo.c if (!nm_waitcd(sc)) {
sc 705 dev/pci/neo.c nm_wr(sc, sc->ac97_base + a, d, 2);
sc 706 dev/pci/neo.c if (!nm_waitcd(sc)) {
sc 722 dev/pci/neo.c struct neo_softc *sc = sc_;
sc 724 dev/pci/neo.c sc->codec_if = codec_if;
sc 729 dev/pci/neo.c neo_reset_codec(sc)
sc 730 dev/pci/neo.c void *sc;
sc 732 dev/pci/neo.c nm_wr(sc, 0x6c0, 0x01, 1);
sc 733 dev/pci/neo.c nm_wr(sc, 0x6cc, 0x87, 1);
sc 734 dev/pci/neo.c nm_wr(sc, 0x6cc, 0x80, 1);
sc 735 dev/pci/neo.c nm_wr(sc, 0x6cc, 0x00, 1);
sc 742 dev/pci/neo.c neo_flags_codec(sc)
sc 743 dev/pci/neo.c void *sc;
sc 763 dev/pci/neo.c struct neo_softc *sc = addr;
sc 765 dev/pci/neo.c neo_halt_output(sc);
sc 766 dev/pci/neo.c neo_halt_input(sc);
sc 768 dev/pci/neo.c sc->pintr = 0;
sc 769 dev/pci/neo.c sc->rintr = 0;
sc 838 dev/pci/neo.c struct neo_softc *sc = addr;
sc 860 dev/pci/neo.c nm_loadcoeff(sc, mode, x);
sc 869 dev/pci/neo.c nm_wr(sc, base + NM_RATE_REG_OFFSET, x, 1);
sc 936 dev/pci/neo.c struct neo_softc *sc = addr;
sc 939 dev/pci/neo.c sc->pintr = intr;
sc 940 dev/pci/neo.c sc->parg = arg;
sc 946 dev/pci/neo.c sc->pbufsize = ((char *)end - (char *)start);
sc 947 dev/pci/neo.c sc->pblksize = blksize;
sc 948 dev/pci/neo.c sc->pwmark = blksize;
sc 950 dev/pci/neo.c nm_wr(sc, NM_PBUFFER_START, sc->pbuf, 4);
sc 951 dev/pci/neo.c nm_wr(sc, NM_PBUFFER_END, sc->pbuf + sc->pbufsize - ssz, 4);
sc 952 dev/pci/neo.c nm_wr(sc, NM_PBUFFER_CURRP, sc->pbuf, 4);
sc 953 dev/pci/neo.c nm_wr(sc, NM_PBUFFER_WMARK, sc->pbuf + sc->pwmark, 4);
sc 954 dev/pci/neo.c nm_wr(sc, NM_PLAYBACK_ENABLE_REG, NM_PLAYBACK_FREERUN |
sc 956 dev/pci/neo.c nm_wr(sc, NM_AUDIO_MUTE_REG, 0, 2);
sc 972 dev/pci/neo.c struct neo_softc *sc = addr;
sc 975 dev/pci/neo.c sc->rintr = intr;
sc 976 dev/pci/neo.c sc->rarg = arg;
sc 982 dev/pci/neo.c sc->rbufsize = ((char *)end - (char *)start);
sc 983 dev/pci/neo.c sc->rblksize = blksize;
sc 984 dev/pci/neo.c sc->rwmark = blksize;
sc 986 dev/pci/neo.c nm_wr(sc, NM_RBUFFER_START, sc->rbuf, 4);
sc 987 dev/pci/neo.c nm_wr(sc, NM_RBUFFER_END, sc->rbuf + sc->rbufsize, 4);
sc 988 dev/pci/neo.c nm_wr(sc, NM_RBUFFER_CURRP, sc->rbuf, 4);
sc 989 dev/pci/neo.c nm_wr(sc, NM_RBUFFER_WMARK, sc->rbuf + sc->rwmark, 4);
sc 990 dev/pci/neo.c nm_wr(sc, NM_RECORD_ENABLE_REG, NM_RECORD_FREERUN |
sc 1000 dev/pci/neo.c struct neo_softc *sc = (struct neo_softc *)addr;
sc 1002 dev/pci/neo.c nm_wr(sc, NM_PLAYBACK_ENABLE_REG, 0, 1);
sc 1003 dev/pci/neo.c nm_wr(sc, NM_AUDIO_MUTE_REG, NM_AUDIO_MUTE_BOTH, 2);
sc 1005 dev/pci/neo.c sc->pintr = 0;
sc 1014 dev/pci/neo.c struct neo_softc *sc = (struct neo_softc *)addr;
sc 1016 dev/pci/neo.c nm_wr(sc, NM_RECORD_ENABLE_REG, 0, 1);
sc 1018 dev/pci/neo.c sc->rintr = 0;
sc 1037 dev/pci/neo.c struct neo_softc *sc = addr;
sc 1039 dev/pci/neo.c return ((sc->codec_if->vtbl->mixer_set_port)(sc->codec_if, cp));
sc 1047 dev/pci/neo.c struct neo_softc *sc = addr;
sc 1049 dev/pci/neo.c return ((sc->codec_if->vtbl->mixer_get_port)(sc->codec_if, cp));
sc 1057 dev/pci/neo.c struct neo_softc *sc = addr;
sc 1059 dev/pci/neo.c return ((sc->codec_if->vtbl->query_devinfo)(sc->codec_if, dip));
sc 1069 dev/pci/neo.c struct neo_softc *sc = addr;
sc 1074 dev/pci/neo.c rv = (char *)sc->bufioh + sc->pbuf;
sc 1077 dev/pci/neo.c rv = (char *)sc->bufioh + sc->rbuf;
sc 138 dev/pci/noct.c struct noct_softc *sc = (struct noct_softc *)self;
sc 146 dev/pci/noct.c &sc->sc_st, &sc->sc_sh, NULL, &iosize, 0)) {
sc 152 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_BRDG_ENDIAN, 0);
sc 153 dev/pci/noct.c sc->sc_rar_last = 0xffffffff;
sc 154 dev/pci/noct.c sc->sc_waw_last = 0xffffffff;
sc 155 dev/pci/noct.c sc->sc_dmat = pa->pa_dmat;
sc 157 dev/pci/noct.c sc->sc_cid = crypto_get_driverid(0);
sc 158 dev/pci/noct.c if (sc->sc_cid < 0) {
sc 168 dev/pci/noct.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, noct_intr, sc,
sc 170 dev/pci/noct.c if (sc->sc_ih == NULL) {
sc 178 dev/pci/noct.c if (noct_ram_size(sc))
sc 183 dev/pci/noct.c noct_rng_init(sc);
sc 184 dev/pci/noct.c noct_pkh_init(sc);
sc 185 dev/pci/noct.c noct_ea_init(sc);
sc 187 dev/pci/noct.c printf(", %uMB, %s\n", sc->sc_ramsize, intrstr);
sc 193 dev/pci/noct.c bus_space_unmap(sc->sc_st, sc->sc_sh, iosize);
sc 200 dev/pci/noct.c struct noct_softc *sc = vsc;
sc 204 dev/pci/noct.c reg = NOCT_READ_4(sc, NOCT_BRDG_STAT);
sc 208 dev/pci/noct.c noct_rng_intr(sc);
sc 213 dev/pci/noct.c noct_pkh_intr(sc);
sc 218 dev/pci/noct.c noct_ea_intr(sc);
sc 225 dev/pci/noct.c noct_ram_size(sc)
sc 226 dev/pci/noct.c struct noct_softc *sc;
sc 230 dev/pci/noct.c noct_ram_write(sc, 0x000000, 64);
sc 231 dev/pci/noct.c noct_ram_write(sc, 0x400000, 32);
sc 232 dev/pci/noct.c t = noct_ram_read(sc, 0x000000);
sc 233 dev/pci/noct.c noct_ram_write(sc, 0x000000, 128);
sc 234 dev/pci/noct.c noct_ram_write(sc, 0x800000, t);
sc 235 dev/pci/noct.c t = noct_ram_read(sc, 0x000000);
sc 242 dev/pci/noct.c sc->sc_ramsize = t;
sc 247 dev/pci/noct.c noct_ram_write(sc, adr, dat)
sc 248 dev/pci/noct.c struct noct_softc *sc;
sc 256 dev/pci/noct.c reg = NOCT_READ_4(sc, NOCT_EA_CTX_ADDR);
sc 261 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_CTX_ADDR, adr);
sc 262 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_CTX_DAT_1, (dat >> 32) & 0xffffffff);
sc 263 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_CTX_DAT_0, (dat >> 0) & 0xffffffff);
sc 266 dev/pci/noct.c reg = NOCT_READ_4(sc, NOCT_EA_CTX_ADDR);
sc 273 dev/pci/noct.c noct_ram_read(sc, adr)
sc 274 dev/pci/noct.c struct noct_softc *sc;
sc 282 dev/pci/noct.c reg = NOCT_READ_4(sc, NOCT_EA_CTX_ADDR);
sc 287 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_CTX_ADDR, adr | EACTXADDR_READPEND);
sc 290 dev/pci/noct.c reg = NOCT_READ_4(sc, NOCT_EA_CTX_ADDR);
sc 295 dev/pci/noct.c dat = NOCT_READ_4(sc, NOCT_EA_CTX_DAT_1);
sc 297 dev/pci/noct.c dat |= NOCT_READ_4(sc, NOCT_EA_CTX_DAT_0);
sc 302 dev/pci/noct.c noct_pkh_disable(sc)
sc 303 dev/pci/noct.c struct noct_softc *sc;
sc 308 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_BRDG_CTL,
sc 309 dev/pci/noct.c NOCT_READ_4(sc, NOCT_BRDG_CTL) & ~(BRDGCTL_PKIRQ_ENA));
sc 312 dev/pci/noct.c r = NOCT_READ_4(sc, NOCT_PKH_IER);
sc 319 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_PKH_IER, r);
sc 322 dev/pci/noct.c r = NOCT_READ_4(sc, NOCT_PKH_CSR);
sc 324 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_PKH_CSR, r);
sc 326 dev/pci/noct.c r = NOCT_READ_4(sc, NOCT_PKH_CSR);
sc 338 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_PKH_CSR, r);
sc 342 dev/pci/noct.c noct_pkh_enable(sc)
sc 343 dev/pci/noct.c struct noct_softc *sc;
sc 347 dev/pci/noct.c sc->sc_pkhwp = 0;
sc 348 dev/pci/noct.c sc->sc_pkhrp = 0;
sc 350 dev/pci/noct.c adr = sc->sc_pkhmap->dm_segs[0].ds_addr;
sc 351 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_PKH_Q_BASE_HI, (adr >> 32) & 0xffffffff);
sc 352 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_PKH_Q_LEN, NOCT_PKH_QLEN);
sc 353 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_PKH_Q_BASE_LO, (adr >> 0) & 0xffffffff);
sc 355 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_PKH_IER,
sc 363 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_PKH_CSR,
sc 364 dev/pci/noct.c NOCT_READ_4(sc, NOCT_PKH_CSR) | PKHCSR_PKH_ENA);
sc 366 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_BRDG_CTL,
sc 367 dev/pci/noct.c NOCT_READ_4(sc, NOCT_BRDG_CTL) | BRDGCTL_PKIRQ_ENA);
sc 371 dev/pci/noct.c noct_pkh_init(sc)
sc 372 dev/pci/noct.c struct noct_softc *sc;
sc 377 dev/pci/noct.c sc->sc_pkh_bn = extent_create("noctbn", 0, 255, M_DEVBUF,
sc 379 dev/pci/noct.c if (sc->sc_pkh_bn == NULL) {
sc 380 dev/pci/noct.c printf("%s: failed pkh bn extent\n", sc->sc_dv.dv_xname);
sc 384 dev/pci/noct.c if (bus_dmamem_alloc(sc->sc_dmat, NOCT_PKH_BUFSIZE,
sc 386 dev/pci/noct.c printf("%s: failed pkh buf alloc\n", sc->sc_dv.dv_xname);
sc 389 dev/pci/noct.c if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, NOCT_PKH_BUFSIZE,
sc 390 dev/pci/noct.c (caddr_t *)&sc->sc_pkhcmd, BUS_DMA_NOWAIT)) {
sc 391 dev/pci/noct.c printf("%s: failed pkh buf map\n", sc->sc_dv.dv_xname);
sc 394 dev/pci/noct.c if (bus_dmamap_create(sc->sc_dmat, NOCT_PKH_BUFSIZE, rseg,
sc 395 dev/pci/noct.c NOCT_PKH_BUFSIZE, 0, BUS_DMA_NOWAIT, &sc->sc_pkhmap)) {
sc 396 dev/pci/noct.c printf("%s: failed pkh map create\n", sc->sc_dv.dv_xname);
sc 399 dev/pci/noct.c if (bus_dmamap_load_raw(sc->sc_dmat, sc->sc_pkhmap,
sc 401 dev/pci/noct.c printf("%s: failed pkh buf load\n", sc->sc_dv.dv_xname);
sc 408 dev/pci/noct.c if (bus_dmamem_alloc(sc->sc_dmat, NOCT_BN_CACHE_SIZE, PAGE_SIZE, 0,
sc 410 dev/pci/noct.c printf("%s: failed bnc buf alloc\n", sc->sc_dv.dv_xname);
sc 413 dev/pci/noct.c if (bus_dmamem_map(sc->sc_dmat, &bnseg, bnrseg, NOCT_BN_CACHE_SIZE,
sc 414 dev/pci/noct.c (caddr_t *)&sc->sc_bncache, BUS_DMA_NOWAIT)) {
sc 415 dev/pci/noct.c printf("%s: failed bnc buf map\n", sc->sc_dv.dv_xname);
sc 418 dev/pci/noct.c if (bus_dmamap_create(sc->sc_dmat, NOCT_BN_CACHE_SIZE, bnrseg,
sc 419 dev/pci/noct.c NOCT_BN_CACHE_SIZE, 0, BUS_DMA_NOWAIT, &sc->sc_bnmap)) {
sc 420 dev/pci/noct.c printf("%s: failed bnc map create\n", sc->sc_dv.dv_xname);
sc 423 dev/pci/noct.c if (bus_dmamap_load_raw(sc->sc_dmat, sc->sc_bnmap,
sc 425 dev/pci/noct.c printf("%s: failed bnc buf load\n", sc->sc_dv.dv_xname);
sc 429 dev/pci/noct.c noct_pkh_disable(sc);
sc 430 dev/pci/noct.c noct_pkh_enable(sc);
sc 437 dev/pci/noct.c crypto_kregister(sc->sc_cid, CRK_MOD_EXP, 0, noct_kprocess);
sc 444 dev/pci/noct.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_bnmap);
sc 446 dev/pci/noct.c bus_dmamem_unmap(sc->sc_dmat,
sc 447 dev/pci/noct.c (caddr_t)sc->sc_pkhcmd, NOCT_PKH_BUFSIZE);
sc 449 dev/pci/noct.c bus_dmamem_free(sc->sc_dmat, &bnseg, bnrseg);
sc 451 dev/pci/noct.c bus_dmamap_unload(sc->sc_dmat, sc->sc_pkhmap);
sc 453 dev/pci/noct.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_pkhmap);
sc 455 dev/pci/noct.c bus_dmamem_unmap(sc->sc_dmat,
sc 456 dev/pci/noct.c (caddr_t)sc->sc_pkhcmd, NOCT_PKH_BUFSIZE);
sc 458 dev/pci/noct.c bus_dmamem_free(sc->sc_dmat, &seg, rseg);
sc 460 dev/pci/noct.c if (sc->sc_pkh_bn != NULL) {
sc 461 dev/pci/noct.c extent_destroy(sc->sc_pkh_bn);
sc 462 dev/pci/noct.c sc->sc_pkh_bn = NULL;
sc 464 dev/pci/noct.c sc->sc_pkhcmd = NULL;
sc 465 dev/pci/noct.c sc->sc_pkhmap = NULL;
sc 469 dev/pci/noct.c noct_pkh_intr(sc)
sc 470 dev/pci/noct.c struct noct_softc *sc;
sc 475 dev/pci/noct.c csr = NOCT_READ_4(sc, NOCT_PKH_CSR);
sc 476 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_PKH_CSR, csr |
sc 484 dev/pci/noct.c rp = (NOCT_READ_4(sc, NOCT_PKH_Q_PTR) & PKHQPTR_READ_M) >>
sc 487 dev/pci/noct.c while (sc->sc_pkhrp != rp) {
sc 488 dev/pci/noct.c if (sc->sc_pkh_bnsw[sc->sc_pkhrp].bn_callback != NULL)
sc 489 dev/pci/noct.c (*sc->sc_pkh_bnsw[sc->sc_pkhrp].bn_callback)(sc,
sc 490 dev/pci/noct.c sc->sc_pkhrp, 0);
sc 491 dev/pci/noct.c if (++sc->sc_pkhrp == NOCT_PKH_ENTRIES)
sc 492 dev/pci/noct.c sc->sc_pkhrp = 0;
sc 494 dev/pci/noct.c sc->sc_pkhrp = rp;
sc 501 dev/pci/noct.c printf("%s:%x: sks write error\n", sc->sc_dv.dv_xname, rp);
sc 503 dev/pci/noct.c printf("%s:%x: sks offset error\n", sc->sc_dv.dv_xname, rp);
sc 505 dev/pci/noct.c printf("%s:%x: pkh invalid length\n", sc->sc_dv.dv_xname, rp);
sc 507 dev/pci/noct.c printf("%s:%x: pkh bad opcode\n", sc->sc_dv.dv_xname, rp);
sc 509 dev/pci/noct.c printf("%s:%x: pkh base qbase\n", sc->sc_dv.dv_xname, rp);
sc 511 dev/pci/noct.c printf("%s:%x: pkh load error\n", sc->sc_dv.dv_xname, rp);
sc 513 dev/pci/noct.c printf("%s:%x: pkh store error\n", sc->sc_dv.dv_xname, rp);
sc 515 dev/pci/noct.c printf("%s:%x: pkh command error\n", sc->sc_dv.dv_xname, rp);
sc 517 dev/pci/noct.c printf("%s:%x: pkh illegal access\n", sc->sc_dv.dv_xname, rp);
sc 519 dev/pci/noct.c printf("%s:%x: pke reserved error\n", sc->sc_dv.dv_xname, rp);
sc 521 dev/pci/noct.c printf("%s:%x: pke watchdog\n", sc->sc_dv.dv_xname, rp);
sc 523 dev/pci/noct.c printf("%s:%x: pke not prime\n", sc->sc_dv.dv_xname, rp);
sc 525 dev/pci/noct.c printf("%s:%x: pke bad 'b'\n", sc->sc_dv.dv_xname, rp);
sc 527 dev/pci/noct.c printf("%s:%x: pke bad 'a'\n", sc->sc_dv.dv_xname, rp);
sc 529 dev/pci/noct.c printf("%s:%x: pke bad 'm'\n", sc->sc_dv.dv_xname, rp);
sc 531 dev/pci/noct.c printf("%s:%x: pke bad 'r'\n", sc->sc_dv.dv_xname, rp);
sc 533 dev/pci/noct.c printf("%s:%x: pke bad opcode\n", sc->sc_dv.dv_xname, rp);
sc 537 dev/pci/noct.c noct_rng_disable(sc)
sc 538 dev/pci/noct.c struct noct_softc *sc;
sc 544 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_BRDG_CTL,
sc 545 dev/pci/noct.c NOCT_READ_4(sc, NOCT_BRDG_CTL) & ~(BRDGCTL_RNIRQ_ENA));
sc 548 dev/pci/noct.c r = NOCT_READ_4(sc, NOCT_RNG_CSR);
sc 551 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_RNG_CSR, r);
sc 554 dev/pci/noct.c r = NOCT_READ_4(sc, NOCT_RNG_CSR);
sc 557 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_RNG_CSR, r);
sc 560 dev/pci/noct.c r = NOCT_READ_4(sc, NOCT_RNG_CSR);
sc 566 dev/pci/noct.c csr = NOCT_READ_8(sc, NOCT_RNG_CTL);
sc 568 dev/pci/noct.c NOCT_WRITE_8(sc, NOCT_RNG_CTL, csr);
sc 572 dev/pci/noct.c noct_rng_enable(sc)
sc 573 dev/pci/noct.c struct noct_softc *sc;
sc 578 dev/pci/noct.c adr = sc->sc_rngmap->dm_segs[0].ds_addr;
sc 579 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_RNG_Q_BASE_HI, (adr >> 32) & 0xffffffff);
sc 580 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_RNG_Q_LEN, NOCT_RNG_QLEN);
sc 581 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_RNG_Q_BASE_LO, (adr >> 0 ) & 0xffffffff);
sc 583 dev/pci/noct.c NOCT_WRITE_8(sc, NOCT_RNG_CTL,
sc 595 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_RNG_CSR, r);
sc 598 dev/pci/noct.c r = NOCT_READ_4(sc, NOCT_BRDG_CTL);
sc 600 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_BRDG_CTL, r);
sc 604 dev/pci/noct.c noct_rng_init(sc)
sc 605 dev/pci/noct.c struct noct_softc *sc;
sc 610 dev/pci/noct.c if (bus_dmamem_alloc(sc->sc_dmat, NOCT_RNG_BUFSIZE,
sc 612 dev/pci/noct.c printf("%s: failed rng buf alloc\n", sc->sc_dv.dv_xname);
sc 615 dev/pci/noct.c if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, NOCT_RNG_BUFSIZE,
sc 616 dev/pci/noct.c (caddr_t *)&sc->sc_rngbuf, BUS_DMA_NOWAIT)) {
sc 617 dev/pci/noct.c printf("%s: failed rng buf map\n", sc->sc_dv.dv_xname);
sc 620 dev/pci/noct.c if (bus_dmamap_create(sc->sc_dmat, NOCT_RNG_BUFSIZE, rseg,
sc 621 dev/pci/noct.c NOCT_RNG_BUFSIZE, 0, BUS_DMA_NOWAIT, &sc->sc_rngmap)) {
sc 622 dev/pci/noct.c printf("%s: failed rng map create\n", sc->sc_dv.dv_xname);
sc 625 dev/pci/noct.c if (bus_dmamap_load_raw(sc->sc_dmat, sc->sc_rngmap,
sc 627 dev/pci/noct.c printf("%s: failed rng buf load\n", sc->sc_dv.dv_xname);
sc 631 dev/pci/noct.c noct_rng_disable(sc);
sc 632 dev/pci/noct.c noct_rng_enable(sc);
sc 637 dev/pci/noct.c sc->sc_rngtick = hz/100;
sc 639 dev/pci/noct.c sc->sc_rngtick = 1;
sc 640 dev/pci/noct.c timeout_set(&sc->sc_rngto, noct_rng_tick, sc);
sc 641 dev/pci/noct.c timeout_add(&sc->sc_rngto, sc->sc_rngtick);
sc 646 dev/pci/noct.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_rngmap);
sc 648 dev/pci/noct.c bus_dmamem_unmap(sc->sc_dmat,
sc 649 dev/pci/noct.c (caddr_t)sc->sc_rngbuf, NOCT_RNG_BUFSIZE);
sc 651 dev/pci/noct.c bus_dmamem_free(sc->sc_dmat, &seg, rseg);
sc 653 dev/pci/noct.c sc->sc_rngbuf = NULL;
sc 654 dev/pci/noct.c sc->sc_rngmap = NULL;
sc 658 dev/pci/noct.c noct_rng_intr(sc)
sc 659 dev/pci/noct.c struct noct_softc *sc;
sc 664 dev/pci/noct.c csr = NOCT_READ_4(sc, NOCT_RNG_CSR);
sc 665 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_RNG_CSR, csr);
sc 671 dev/pci/noct.c ctl = NOCT_READ_4(sc, NOCT_RNG_CTL);
sc 672 dev/pci/noct.c printf("%s: rng bad key(s)", sc->sc_dv.dv_xname);
sc 681 dev/pci/noct.c printf("%s: rng bus error\n", sc->sc_dv.dv_xname);
sc 685 dev/pci/noct.c printf("%s: rng duplicate block\n", sc->sc_dv.dv_xname);
sc 689 dev/pci/noct.c printf("%s: rng invalid access\n", sc->sc_dv.dv_xname);
sc 693 dev/pci/noct.c noct_rng_disable(sc);
sc 700 dev/pci/noct.c struct noct_softc *sc = vsc;
sc 705 dev/pci/noct.c reg = NOCT_READ_4(sc, NOCT_RNG_Q_PTR);
sc 710 dev/pci/noct.c val = sc->sc_rngbuf[rd];
sc 719 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_RNG_Q_PTR, rd);
sc 720 dev/pci/noct.c timeout_add(&sc->sc_rngto, sc->sc_rngtick);
sc 724 dev/pci/noct.c noct_ea_nfree(sc)
sc 725 dev/pci/noct.c struct noct_softc *sc;
sc 727 dev/pci/noct.c if (sc->sc_eawp == sc->sc_earp)
sc 729 dev/pci/noct.c if (sc->sc_eawp < sc->sc_earp)
sc 730 dev/pci/noct.c return (sc->sc_earp - sc->sc_eawp - 1);
sc 731 dev/pci/noct.c return (sc->sc_earp + NOCT_EA_ENTRIES - sc->sc_eawp - 1);
sc 735 dev/pci/noct.c noct_ea_disable(sc)
sc 736 dev/pci/noct.c struct noct_softc *sc;
sc 741 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_BRDG_CTL,
sc 742 dev/pci/noct.c NOCT_READ_4(sc, NOCT_BRDG_CTL) & ~(BRDGCTL_EAIRQ_ENA));
sc 745 dev/pci/noct.c r = NOCT_READ_4(sc, NOCT_EA_IER);
sc 750 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_IER, r);
sc 753 dev/pci/noct.c r = NOCT_READ_4(sc, NOCT_EA_CSR);
sc 755 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_CSR, r);
sc 757 dev/pci/noct.c r = NOCT_READ_4(sc, NOCT_EA_CSR);
sc 763 dev/pci/noct.c r = NOCT_READ_4(sc, NOCT_EA_CSR);
sc 768 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_CSR, r);
sc 772 dev/pci/noct.c noct_ea_enable(sc)
sc 773 dev/pci/noct.c struct noct_softc *sc;
sc 777 dev/pci/noct.c sc->sc_eawp = 0;
sc 778 dev/pci/noct.c sc->sc_earp = 0;
sc 780 dev/pci/noct.c adr = sc->sc_eamap->dm_segs[0].ds_addr;
sc 781 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_Q_BASE_HI, (adr >> 32) & 0xffffffff);
sc 782 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_Q_LEN, NOCT_EA_QLEN);
sc 783 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_Q_BASE_LO, (adr >> 0) & 0xffffffff);
sc 785 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_IER,
sc 791 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_CSR,
sc 792 dev/pci/noct.c NOCT_READ_4(sc, NOCT_EA_CSR) | EACSR_ENABLE);
sc 794 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_BRDG_CTL,
sc 795 dev/pci/noct.c NOCT_READ_4(sc, NOCT_BRDG_CTL) | BRDGCTL_EAIRQ_ENA);
sc 799 dev/pci/noct.c noct_ea_init(sc)
sc 800 dev/pci/noct.c struct noct_softc *sc;
sc 805 dev/pci/noct.c if (bus_dmamem_alloc(sc->sc_dmat, NOCT_EA_BUFSIZE,
sc 807 dev/pci/noct.c printf("%s: failed ea buf alloc\n", sc->sc_dv.dv_xname);
sc 810 dev/pci/noct.c if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, NOCT_EA_BUFSIZE,
sc 811 dev/pci/noct.c (caddr_t *)&sc->sc_eacmd, BUS_DMA_NOWAIT)) {
sc 812 dev/pci/noct.c printf("%s: failed ea buf map\n", sc->sc_dv.dv_xname);
sc 815 dev/pci/noct.c if (bus_dmamap_create(sc->sc_dmat, NOCT_EA_BUFSIZE, rseg,
sc 816 dev/pci/noct.c NOCT_EA_BUFSIZE, 0, BUS_DMA_NOWAIT, &sc->sc_eamap)) {
sc 817 dev/pci/noct.c printf("%s: failed ea map create\n", sc->sc_dv.dv_xname);
sc 820 dev/pci/noct.c if (bus_dmamap_load_raw(sc->sc_dmat, sc->sc_eamap,
sc 822 dev/pci/noct.c printf("%s: failed ea buf load\n", sc->sc_dv.dv_xname);
sc 826 dev/pci/noct.c noct_ea_disable(sc);
sc 827 dev/pci/noct.c noct_ea_enable(sc);
sc 829 dev/pci/noct.c SIMPLEQ_INIT(&sc->sc_inq);
sc 830 dev/pci/noct.c SIMPLEQ_INIT(&sc->sc_chipq);
sc 831 dev/pci/noct.c SIMPLEQ_INIT(&sc->sc_outq);
sc 840 dev/pci/noct.c crypto_register(sc->sc_cid, algs,
sc 844 dev/pci/noct.c kthread_create_deferred(noct_ea_create_thread, sc);
sc 849 dev/pci/noct.c bus_dmamap_destroy(sc->sc_dmat, sc->sc_eamap);
sc 851 dev/pci/noct.c bus_dmamem_unmap(sc->sc_dmat,
sc 852 dev/pci/noct.c (caddr_t)sc->sc_eacmd, NOCT_EA_BUFSIZE);
sc 854 dev/pci/noct.c bus_dmamem_free(sc->sc_dmat, &seg, rseg);
sc 856 dev/pci/noct.c sc->sc_eacmd = NULL;
sc 857 dev/pci/noct.c sc->sc_eamap = NULL;
sc 864 dev/pci/noct.c struct noct_softc *sc = vsc;
sc 866 dev/pci/noct.c if (kthread_create(noct_ea_thread, sc, NULL,
sc 867 dev/pci/noct.c "%s", sc->sc_dv.dv_xname))
sc 868 dev/pci/noct.c panic("%s: unable to create ea thread", sc->sc_dv.dv_xname);
sc 875 dev/pci/noct.c struct noct_softc *sc = vsc;
sc 883 dev/pci/noct.c tsleep(&sc->sc_eawp, PWAIT, "noctea", 0);
sc 887 dev/pci/noct.c while (!SIMPLEQ_EMPTY(&sc->sc_outq)) {
sc 888 dev/pci/noct.c q = SIMPLEQ_FIRST(&sc->sc_outq);
sc 889 dev/pci/noct.c SIMPLEQ_REMOVE_HEAD(&sc->sc_outq, q_next);
sc 906 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, q->q_dmamap,
sc 931 dev/pci/noct.c bus_dmamap_unload(sc->sc_dmat, q->q_dmamap);
sc 932 dev/pci/noct.c bus_dmamap_destroy(sc->sc_dmat, q->q_dmamap);
sc 933 dev/pci/noct.c bus_dmamem_unmap(sc->sc_dmat, q->q_buf, crd->crd_len);
sc 934 dev/pci/noct.c bus_dmamem_free(sc->sc_dmat, &q->q_dmaseg, rseg);
sc 944 dev/pci/noct.c while (!SIMPLEQ_EMPTY(&sc->sc_inq)) {
sc 945 dev/pci/noct.c q = SIMPLEQ_FIRST(&sc->sc_inq);
sc 946 dev/pci/noct.c SIMPLEQ_REMOVE_HEAD(&sc->sc_inq, q_next);
sc 949 dev/pci/noct.c noct_ea_start(sc, q);
sc 957 dev/pci/noct.c noct_ea_start(sc, q)
sc 958 dev/pci/noct.c struct noct_softc *sc;
sc 977 dev/pci/noct.c noct_ea_start_hash(sc, q, crp, crd);
sc 981 dev/pci/noct.c noct_ea_start_des(sc, q, crp, crd);
sc 999 dev/pci/noct.c noct_ea_start_hash(sc, q, crp, crd)
sc 1000 dev/pci/noct.c struct noct_softc *sc;
sc 1014 dev/pci/noct.c if ((err = bus_dmamem_alloc(sc->sc_dmat, crd->crd_len, PAGE_SIZE, 0,
sc 1018 dev/pci/noct.c if ((err = bus_dmamem_map(sc->sc_dmat, &q->q_dmaseg, rseg,
sc 1022 dev/pci/noct.c if ((err = bus_dmamap_create(sc->sc_dmat, crd->crd_len, 1,
sc 1026 dev/pci/noct.c if ((err = bus_dmamap_load_raw(sc->sc_dmat, q->q_dmamap, &q->q_dmaseg,
sc 1041 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, q->q_dmamap, 0, q->q_dmamap->dm_mapsize,
sc 1045 dev/pci/noct.c if (noct_ea_nfree(sc) < 1) {
sc 1049 dev/pci/noct.c wp = sc->sc_eawp;
sc 1050 dev/pci/noct.c if (++sc->sc_eawp == NOCT_EA_ENTRIES)
sc 1051 dev/pci/noct.c sc->sc_eawp = 0;
sc 1053 dev/pci/noct.c sc->sc_eacmd[wp].buf[i] = 0;
sc 1054 dev/pci/noct.c sc->sc_eacmd[wp].buf[0] = EA_0_SI;
sc 1057 dev/pci/noct.c sc->sc_eacmd[wp].buf[1] = htole32(EA_OP_MD5);
sc 1060 dev/pci/noct.c sc->sc_eacmd[wp].buf[1] = htole32(EA_OP_SHA1);
sc 1065 dev/pci/noct.c sc->sc_eacmd[wp].buf[1] |= htole32(crd->crd_len);
sc 1067 dev/pci/noct.c sc->sc_eacmd[wp].buf[2] = htole32(adr >> 32);
sc 1068 dev/pci/noct.c sc->sc_eacmd[wp].buf[3] = htole32(adr & 0xffffffff);
sc 1071 dev/pci/noct.c adr = sc->sc_eamap->dm_segs[0].ds_addr +
sc 1074 dev/pci/noct.c sc->sc_eacmd[wp].buf[4] = htole32(adr >> 32);
sc 1075 dev/pci/noct.c sc->sc_eacmd[wp].buf[5] = htole32(adr & 0xffffffff);
sc 1077 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, sc->sc_eamap,
sc 1083 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_Q_PTR, wp);
sc 1084 dev/pci/noct.c sc->sc_eawp = wp;
sc 1086 dev/pci/noct.c SIMPLEQ_INSERT_TAIL(&sc->sc_chipq, q, q_next);
sc 1092 dev/pci/noct.c bus_dmamap_unload(sc->sc_dmat, q->q_dmamap);
sc 1094 dev/pci/noct.c bus_dmamap_destroy(sc->sc_dmat, q->q_dmamap);
sc 1096 dev/pci/noct.c bus_dmamem_unmap(sc->sc_dmat, q->q_buf, crd->crd_len);
sc 1098 dev/pci/noct.c bus_dmamem_free(sc->sc_dmat, &q->q_dmaseg, rseg);
sc 1108 dev/pci/noct.c noct_ea_start_des(sc, q, crp, crd)
sc 1109 dev/pci/noct.c struct noct_softc *sc;
sc 1163 dev/pci/noct.c if ((err = bus_dmamem_alloc(sc->sc_dmat, crd->crd_len, PAGE_SIZE, 0,
sc 1167 dev/pci/noct.c if ((err = bus_dmamem_map(sc->sc_dmat, &q->q_dmaseg, rseg,
sc 1171 dev/pci/noct.c if ((err = bus_dmamap_create(sc->sc_dmat, crd->crd_len, 1,
sc 1175 dev/pci/noct.c if ((err = bus_dmamap_load_raw(sc->sc_dmat, q->q_dmamap, &q->q_dmaseg,
sc 1190 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, q->q_dmamap, 0, q->q_dmamap->dm_mapsize,
sc 1194 dev/pci/noct.c if (noct_ea_nfree(sc) < 1) {
sc 1198 dev/pci/noct.c wp = sc->sc_eawp;
sc 1199 dev/pci/noct.c if (++sc->sc_eawp == NOCT_EA_ENTRIES)
sc 1200 dev/pci/noct.c sc->sc_eawp = 0;
sc 1203 dev/pci/noct.c sc->sc_eacmd[wp].buf[i] = 0;
sc 1205 dev/pci/noct.c sc->sc_eacmd[wp].buf[0] = EA_0_SI;
sc 1208 dev/pci/noct.c sc->sc_eacmd[wp].buf[1] = htole32(EA_OP_3DESCBCE);
sc 1210 dev/pci/noct.c sc->sc_eacmd[wp].buf[1] = htole32(EA_OP_3DESCBCD);
sc 1213 dev/pci/noct.c sc->sc_eacmd[wp].buf[1] |= htole32(crd->crd_len);
sc 1215 dev/pci/noct.c sc->sc_eacmd[wp].buf[2] = htole32(adr >> 32);
sc 1216 dev/pci/noct.c sc->sc_eacmd[wp].buf[3] = htole32(adr & 0xffffffff);
sc 1219 dev/pci/noct.c sc->sc_eacmd[wp].buf[4] = htole32(adr >> 32);
sc 1220 dev/pci/noct.c sc->sc_eacmd[wp].buf[5] = htole32(adr & 0xffffffff);
sc 1223 dev/pci/noct.c pb = (volatile u_int8_t *)&sc->sc_eacmd[wp].buf[20];
sc 1226 dev/pci/noct.c SWAP32(sc->sc_eacmd[wp].buf[20]);
sc 1227 dev/pci/noct.c SWAP32(sc->sc_eacmd[wp].buf[21]);
sc 1228 dev/pci/noct.c pb = (volatile u_int8_t *)&sc->sc_eacmd[wp].buf[24];
sc 1231 dev/pci/noct.c SWAP32(sc->sc_eacmd[wp].buf[24]);
sc 1232 dev/pci/noct.c SWAP32(sc->sc_eacmd[wp].buf[25]);
sc 1233 dev/pci/noct.c SWAP32(sc->sc_eacmd[wp].buf[26]);
sc 1234 dev/pci/noct.c SWAP32(sc->sc_eacmd[wp].buf[27]);
sc 1235 dev/pci/noct.c SWAP32(sc->sc_eacmd[wp].buf[28]);
sc 1236 dev/pci/noct.c SWAP32(sc->sc_eacmd[wp].buf[29]);
sc 1238 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, sc->sc_eamap,
sc 1244 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_Q_PTR, wp);
sc 1245 dev/pci/noct.c sc->sc_eawp = wp;
sc 1247 dev/pci/noct.c SIMPLEQ_INSERT_TAIL(&sc->sc_chipq, q, q_next);
sc 1253 dev/pci/noct.c bus_dmamap_unload(sc->sc_dmat, q->q_dmamap);
sc 1255 dev/pci/noct.c bus_dmamap_destroy(sc->sc_dmat, q->q_dmamap);
sc 1257 dev/pci/noct.c bus_dmamem_unmap(sc->sc_dmat, q->q_buf, crd->crd_len);
sc 1259 dev/pci/noct.c bus_dmamem_free(sc->sc_dmat, &q->q_dmaseg, rseg);
sc 1269 dev/pci/noct.c noct_ea_intr(sc)
sc 1270 dev/pci/noct.c struct noct_softc *sc;
sc 1275 dev/pci/noct.c csr = NOCT_READ_4(sc, NOCT_EA_CSR);
sc 1276 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_EA_CSR, csr |
sc 1282 dev/pci/noct.c rp = (NOCT_READ_4(sc, NOCT_EA_Q_PTR) & EAQPTR_READ_M) >>
sc 1284 dev/pci/noct.c while (sc->sc_earp != rp) {
sc 1285 dev/pci/noct.c if (SIMPLEQ_EMPTY(&sc->sc_chipq))
sc 1286 dev/pci/noct.c panic("%s: empty chipq", sc->sc_dv.dv_xname);
sc 1287 dev/pci/noct.c q = SIMPLEQ_FIRST(&sc->sc_chipq);
sc 1288 dev/pci/noct.c SIMPLEQ_REMOVE_HEAD(&sc->sc_chipq, q_next);
sc 1289 dev/pci/noct.c SIMPLEQ_INSERT_TAIL(&sc->sc_outq, q, q_next);
sc 1291 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, sc->sc_eamap,
sc 1292 dev/pci/noct.c (sc->sc_earp * sizeof(struct noct_ea_cmd)),
sc 1295 dev/pci/noct.c bcopy((u_int8_t *)&sc->sc_eacmd[sc->sc_earp].buf[6],
sc 1298 dev/pci/noct.c NOCT_WAKEUP(sc);
sc 1299 dev/pci/noct.c if (++sc->sc_earp == NOCT_EA_ENTRIES)
sc 1300 dev/pci/noct.c sc->sc_earp = 0;
sc 1302 dev/pci/noct.c sc->sc_earp = rp;
sc 1305 dev/pci/noct.c printf("%s: ea bad queue alignment\n", sc->sc_dv.dv_xname);
sc 1307 dev/pci/noct.c printf("%s: ea bad opcode\n", sc->sc_dv.dv_xname);
sc 1309 dev/pci/noct.c printf("%s: ea command read error\n", sc->sc_dv.dv_xname);
sc 1311 dev/pci/noct.c printf("%s: ea command write error\n", sc->sc_dv.dv_xname);
sc 1313 dev/pci/noct.c printf("%s: ea data read error\n", sc->sc_dv.dv_xname);
sc 1315 dev/pci/noct.c printf("%s: ea data write error\n", sc->sc_dv.dv_xname);
sc 1317 dev/pci/noct.c printf("%s: ea bad internal len\n", sc->sc_dv.dv_xname);
sc 1319 dev/pci/noct.c printf("%s: ea bad external len\n", sc->sc_dv.dv_xname);
sc 1321 dev/pci/noct.c printf("%s: ea bad des block\n", sc->sc_dv.dv_xname);
sc 1323 dev/pci/noct.c printf("%s: ea bad des key\n", sc->sc_dv.dv_xname);
sc 1325 dev/pci/noct.c printf("%s: ea illegal access\n", sc->sc_dv.dv_xname);
sc 1329 dev/pci/noct.c noct_write_8(sc, reg, val)
sc 1330 dev/pci/noct.c struct noct_softc *sc;
sc 1334 dev/pci/noct.c NOCT_WRITE_4(sc, reg, (val >> 32) & 0xffffffff);
sc 1335 dev/pci/noct.c NOCT_WRITE_4(sc, reg + 4, (val >> 0) & 0xffffffff);
sc 1339 dev/pci/noct.c noct_read_8(sc, reg)
sc 1340 dev/pci/noct.c struct noct_softc *sc;
sc 1345 dev/pci/noct.c ret = NOCT_READ_4(sc, reg);
sc 1347 dev/pci/noct.c ret |= NOCT_READ_4(sc, reg + 4);
sc 1357 dev/pci/noct.c noct_read_4(sc, off)
sc 1358 dev/pci/noct.c struct noct_softc *sc;
sc 1361 dev/pci/noct.c if (sc->sc_rar_last == off - 4 ||
sc 1362 dev/pci/noct.c sc->sc_rar_last == off + 4) {
sc 1363 dev/pci/noct.c bus_space_write_4(sc->sc_st, sc->sc_sh, NOCT_BRDG_TEST, 0);
sc 1364 dev/pci/noct.c sc->sc_rar_last = off;
sc 1365 dev/pci/noct.c sc->sc_waw_last = 0xffffffff;
sc 1367 dev/pci/noct.c return (bus_space_read_4(sc->sc_st, sc->sc_sh, off));
sc 1371 dev/pci/noct.c noct_write_4(sc, off, val)
sc 1372 dev/pci/noct.c struct noct_softc *sc;
sc 1376 dev/pci/noct.c if (sc->sc_waw_last == off - 4 ||
sc 1377 dev/pci/noct.c sc->sc_waw_last == off + 4) {
sc 1378 dev/pci/noct.c bus_space_read_4(sc->sc_st, sc->sc_sh, NOCT_BRDG_TEST);
sc 1379 dev/pci/noct.c sc->sc_waw_last = off;
sc 1380 dev/pci/noct.c sc->sc_rar_last = 0xffffffff;
sc 1382 dev/pci/noct.c bus_space_write_4(sc->sc_st, sc->sc_sh, off, val);
sc 1389 dev/pci/noct.c struct noct_softc *sc;
sc 1393 dev/pci/noct.c sc = noct_cd.cd_devs[i];
sc 1394 dev/pci/noct.c if (sc == NULL)
sc 1396 dev/pci/noct.c if (sc->sc_cid == krp->krp_hid)
sc 1397 dev/pci/noct.c return (sc);
sc 1406 dev/pci/noct.c struct noct_softc *sc;
sc 1410 dev/pci/noct.c if ((sc = noct_kfind(krp)) == NULL) {
sc 1418 dev/pci/noct.c noct_kprocess_modexp(sc, krp);
sc 1422 dev/pci/noct.c sc->sc_dv.dv_xname, krp->krp_op);
sc 1431 dev/pci/noct.c noct_pkh_nfree(sc)
sc 1432 dev/pci/noct.c struct noct_softc *sc;
sc 1434 dev/pci/noct.c if (sc->sc_pkhwp == sc->sc_pkhrp)
sc 1436 dev/pci/noct.c if (sc->sc_pkhwp < sc->sc_pkhrp)
sc 1437 dev/pci/noct.c return (sc->sc_pkhrp - sc->sc_pkhwp - 1);
sc 1438 dev/pci/noct.c return (sc->sc_pkhrp + NOCT_PKH_ENTRIES - sc->sc_pkhwp - 1);
sc 1442 dev/pci/noct.c noct_kprocess_modexp(sc, krp)
sc 1443 dev/pci/noct.c struct noct_softc *sc;
sc 1453 dev/pci/noct.c if (noct_pkh_nfree(sc) < 7) {
sc 1460 dev/pci/noct.c midx = wp = sc->sc_pkhwp;
sc 1466 dev/pci/noct.c sc->sc_pkh_bnsw[midx].bn_siz = (bits + 127) / 128;
sc 1467 dev/pci/noct.c if (extent_alloc(sc->sc_pkh_bn, sc->sc_pkh_bnsw[midx].bn_siz,
sc 1469 dev/pci/noct.c &sc->sc_pkh_bnsw[midx].bn_off)) {
sc 1473 dev/pci/noct.c cmd = &sc->sc_pkhcmd[midx];
sc 1475 dev/pci/noct.c cmd->cache.r = htole32(sc->sc_pkh_bnsw[midx].bn_off);
sc 1476 dev/pci/noct.c adr = sc->sc_bnmap->dm_segs[0].ds_addr +
sc 1477 dev/pci/noct.c (sc->sc_pkh_bnsw[midx].bn_off * 16);
sc 1480 dev/pci/noct.c cmd->cache.len = htole32(sc->sc_pkh_bnsw[midx].bn_siz);
sc 1482 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, sc->sc_pkhmap,
sc 1486 dev/pci/noct.c sc->sc_bncache[(sc->sc_pkh_bnsw[midx].bn_off * 16) + i] = 0;
sc 1488 dev/pci/noct.c sc->sc_bncache[(sc->sc_pkh_bnsw[midx].bn_off * 16) +
sc 1490 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, sc->sc_bnmap,
sc 1491 dev/pci/noct.c sc->sc_pkh_bnsw[midx].bn_off * 16, digits * 16,
sc 1498 dev/pci/noct.c sc->sc_pkh_bnsw[rmodidx].bn_siz = sc->sc_pkh_bnsw[midx].bn_siz;
sc 1499 dev/pci/noct.c if (extent_alloc(sc->sc_pkh_bn, sc->sc_pkh_bnsw[rmodidx].bn_siz,
sc 1501 dev/pci/noct.c &sc->sc_pkh_bnsw[rmodidx].bn_off)) {
sc 1505 dev/pci/noct.c cmd = &sc->sc_pkhcmd[rmodidx];
sc 1507 dev/pci/noct.c cmd->arith.r = htole32(sc->sc_pkh_bnsw[rmodidx].bn_off);
sc 1508 dev/pci/noct.c cmd->arith.m = htole32(sc->sc_pkh_bnsw[midx].bn_off |
sc 1509 dev/pci/noct.c (sc->sc_pkh_bnsw[midx].bn_siz << 16));
sc 1512 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, sc->sc_pkhmap,
sc 1519 dev/pci/noct.c aidx = wp = sc->sc_pkhwp;
sc 1525 dev/pci/noct.c sc->sc_pkh_bnsw[aidx].bn_siz = (bits + 127) / 128;
sc 1526 dev/pci/noct.c if (extent_alloc(sc->sc_pkh_bn, sc->sc_pkh_bnsw[aidx].bn_siz,
sc 1528 dev/pci/noct.c &sc->sc_pkh_bnsw[aidx].bn_off)) {
sc 1532 dev/pci/noct.c cmd = &sc->sc_pkhcmd[aidx];
sc 1534 dev/pci/noct.c cmd->cache.r = htole32(sc->sc_pkh_bnsw[aidx].bn_off);
sc 1535 dev/pci/noct.c adr = sc->sc_bnmap->dm_segs[0].ds_addr +
sc 1536 dev/pci/noct.c (sc->sc_pkh_bnsw[aidx].bn_off * 16);
sc 1539 dev/pci/noct.c cmd->cache.len = htole32(sc->sc_pkh_bnsw[aidx].bn_siz);
sc 1541 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, sc->sc_pkhmap,
sc 1545 dev/pci/noct.c sc->sc_bncache[(sc->sc_pkh_bnsw[aidx].bn_off * 16) + i] = 0;
sc 1547 dev/pci/noct.c sc->sc_bncache[(sc->sc_pkh_bnsw[aidx].bn_off * 16) +
sc 1549 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, sc->sc_bnmap,
sc 1550 dev/pci/noct.c sc->sc_pkh_bnsw[aidx].bn_off * 16, digits * 16,
sc 1557 dev/pci/noct.c sc->sc_pkh_bnsw[mmulidx].bn_siz = 0;
sc 1558 dev/pci/noct.c sc->sc_pkh_bnsw[mmulidx].bn_off = 0;
sc 1559 dev/pci/noct.c cmd = &sc->sc_pkhcmd[mmulidx];
sc 1561 dev/pci/noct.c cmd->arith.r = htole32(sc->sc_pkh_bnsw[aidx].bn_off);
sc 1562 dev/pci/noct.c cmd->arith.m = htole32(sc->sc_pkh_bnsw[midx].bn_off |
sc 1563 dev/pci/noct.c (sc->sc_pkh_bnsw[midx].bn_siz << 16));
sc 1564 dev/pci/noct.c cmd->arith.a = htole32(sc->sc_pkh_bnsw[aidx].bn_off |
sc 1565 dev/pci/noct.c (sc->sc_pkh_bnsw[aidx].bn_siz << 16));
sc 1566 dev/pci/noct.c cmd->arith.b = htole32(sc->sc_pkh_bnsw[rmodidx].bn_off |
sc 1567 dev/pci/noct.c (sc->sc_pkh_bnsw[rmodidx].bn_siz << 16));
sc 1569 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, sc->sc_pkhmap,
sc 1576 dev/pci/noct.c bidx = wp = sc->sc_pkhwp;
sc 1582 dev/pci/noct.c sc->sc_pkh_bnsw[bidx].bn_siz = (bits + 127) / 128;
sc 1583 dev/pci/noct.c if (extent_alloc(sc->sc_pkh_bn, sc->sc_pkh_bnsw[bidx].bn_siz,
sc 1585 dev/pci/noct.c &sc->sc_pkh_bnsw[bidx].bn_off)) {
sc 1589 dev/pci/noct.c cmd = &sc->sc_pkhcmd[bidx];
sc 1591 dev/pci/noct.c cmd->cache.r = htole32(sc->sc_pkh_bnsw[bidx].bn_off);
sc 1592 dev/pci/noct.c adr = sc->sc_bnmap->dm_segs[0].ds_addr +
sc 1593 dev/pci/noct.c (sc->sc_pkh_bnsw[bidx].bn_off * 16);
sc 1596 dev/pci/noct.c cmd->cache.len = htole32(sc->sc_pkh_bnsw[bidx].bn_siz);
sc 1598 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, sc->sc_pkhmap,
sc 1602 dev/pci/noct.c sc->sc_bncache[(sc->sc_pkh_bnsw[bidx].bn_off * 16) + i] = 0;
sc 1604 dev/pci/noct.c sc->sc_bncache[(sc->sc_pkh_bnsw[bidx].bn_off * 16) +
sc 1606 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, sc->sc_bnmap,
sc 1607 dev/pci/noct.c sc->sc_pkh_bnsw[bidx].bn_off * 16, digits * 16,
sc 1612 dev/pci/noct.c NOCT_WRITE_4(sc, NOCT_PKH_Q_PTR, wp);
sc 1613 dev/pci/noct.c sc->sc_pkhwp = wp;
sc 1620 dev/pci/noct.c extent_free(sc->sc_pkh_bn, sc->sc_pkh_bnsw[aidx].bn_off,
sc 1621 dev/pci/noct.c sc->sc_pkh_bnsw[aidx].bn_siz, EX_NOWAIT);
sc 1623 dev/pci/noct.c extent_free(sc->sc_pkh_bn, sc->sc_pkh_bnsw[rmodidx].bn_off,
sc 1624 dev/pci/noct.c sc->sc_pkh_bnsw[rmodidx].bn_siz, EX_NOWAIT);
sc 1626 dev/pci/noct.c extent_free(sc->sc_pkh_bn, sc->sc_pkh_bnsw[midx].bn_off,
sc 1627 dev/pci/noct.c sc->sc_pkh_bnsw[midx].bn_siz, EX_NOWAIT);
sc 1636 dev/pci/noct.c noct_pkh_freedesc(sc, idx)
sc 1637 dev/pci/noct.c struct noct_softc *sc;
sc 1640 dev/pci/noct.c if (sc->sc_pkh_bnsw[idx].bn_callback != NULL)
sc 1641 dev/pci/noct.c (*sc->sc_pkh_bnsw[idx].bn_callback)(sc, idx, 0);
sc 1670 dev/pci/noct.c noct_kload(sc, cr, wp)
sc 1671 dev/pci/noct.c struct noct_softc *sc;
sc 1684 dev/pci/noct.c if (wpnext == sc->sc_pkhrp)
sc 1693 dev/pci/noct.c if (extent_alloc(sc->sc_pkh_bn, digits, EX_NOALIGN, 0, EX_NOBOUNDARY,
sc 1697 dev/pci/noct.c cmd = &sc->sc_pkhcmd[wp];
sc 1700 dev/pci/noct.c adr = sc->sc_bnmap->dm_segs[0].ds_addr + (off * 16);
sc 1705 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, sc->sc_pkhmap,
sc 1710 dev/pci/noct.c sc->sc_bncache[(off * 16) + i] = 0;
sc 1712 dev/pci/noct.c sc->sc_bncache[(off * 16) + (digits * 16) - 1 - i] =
sc 1714 dev/pci/noct.c bus_dmamap_sync(sc->sc_dmat, sc->sc_bnmap, off * 16, digits * 16,
sc 1717 dev/pci/noct.c sc->sc_pkh_bnsw[wp].bn_off = off;
sc 1718 dev/pci/noct.c sc->sc_pkh_bnsw[wp].bn_siz = digits;
sc 1719 dev/pci/noct.c sc->sc_pkh_bnsw[wp].bn_callback = noct_kload_cb;
sc 1724 dev/pci/noct.c noct_kload_cb(sc, wp, err)
sc 1725 dev/pci/noct.c struct noct_softc *sc;
sc 1729 dev/pci/noct.c struct noct_bnc_sw *sw = &sc->sc_pkh_bnsw[wp];
sc 1731 dev/pci/noct.c extent_free(sc->sc_pkh_bn, sw->bn_off, sw->bn_siz, EX_NOWAIT);
sc 1732 dev/pci/noct.c bzero(&sc->sc_bncache[sw->bn_off * 16], sw->bn_siz * 16);
sc 1736 dev/pci/noct.c noct_modmul_cb(sc, wp, err)
sc 1737 dev/pci/noct.c struct noct_softc *sc;
sc 1741 dev/pci/noct.c struct noct_bnc_sw *sw = &sc->sc_pkh_bnsw[wp];
sc 1750 dev/pci/noct.c krp->krp_param[3].crp_p[j] = sc->sc_bncache[i];
sc 1755 dev/pci/noct.c extent_free(sc->sc_pkh_bn, sw->bn_off, sw->bn_siz, EX_NOWAIT);
sc 1756 dev/pci/noct.c bzero(&sc->sc_bncache[sw->bn_off * 16], sw->bn_siz * 16);
sc 1801 dev/pci/noct.c struct noct_softc *sc;
sc 1805 dev/pci/noct.c sc = noct_cd.cd_devs[i];
sc 1806 dev/pci/noct.c if (sc == NULL || sc->sc_cid == (*sidp))
sc 1809 dev/pci/noct.c if (sc == NULL)
sc 1838 dev/pci/noct.c *sidp = NOCT_SID(sc->sc_dv.dv_unit, 0);
sc 1859 dev/pci/noct.c struct noct_softc *sc;
sc 1869 dev/pci/noct.c sc = noct_cd.cd_devs[card];
sc 1880 dev/pci/noct.c SIMPLEQ_INSERT_TAIL(&sc->sc_inq, q, q_next);
sc 1882 dev/pci/noct.c NOCT_WAKEUP(sc);
sc 100 dev/pci/noctvar.h #define NOCT_READ_4(sc,r) noct_read_4((sc), (r))
sc 101 dev/pci/noctvar.h #define NOCT_WRITE_4(sc,r,v) noct_write_4((sc), (r), (v))
sc 102 dev/pci/noctvar.h #define NOCT_READ_8(sc,r) noct_read_8((sc), (r))
sc 103 dev/pci/noctvar.h #define NOCT_WRITE_8(sc,r,v) noct_write_8((sc), (r), (v))
sc 109 dev/pci/noctvar.h #define NOCT_WAKEUP(sc) wakeup(&(sc)->sc_eawp)
sc 110 dev/pci/noctvar.h #define NOCT_SLEEP(sc) tsleep(&(sc)->sc_eawp, PWAIT, "noctea", 0)
sc 108 dev/pci/nofn.c struct nofn_softc *sc = (struct nofn_softc *)self;
sc 115 dev/pci/nofn.c sc->sc_dmat = pa->pa_dmat;
sc 118 dev/pci/nofn.c &sc->sc_st, &sc->sc_sh, NULL, &bar0size, 0)) {
sc 125 dev/pci/nofn.c bus_space_unmap(sc->sc_st, sc->sc_sh, bar0size);
sc 130 dev/pci/nofn.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, nofn_intr, sc,
sc 132 dev/pci/nofn.c if (sc->sc_ih == NULL) {
sc 140 dev/pci/nofn.c sc->sc_revid = REG_READ_4(sc, NOFN_REVID);
sc 142 dev/pci/nofn.c switch (sc->sc_revid) {
sc 148 dev/pci/nofn.c &sc->sc_pk_t, &sc->sc_pk_h, NULL, &bar3size, 0)) {
sc 152 dev/pci/nofn.c nofn_rng_enable(sc);
sc 153 dev/pci/nofn.c nofn_pk_enable(sc);
sc 159 dev/pci/nofn.c printf(": unknown revid %x\n", sc->sc_revid);
sc 164 dev/pci/nofn.c if (sc->sc_flags & NOFN_FLAGS_PK)
sc 166 dev/pci/nofn.c if (sc->sc_flags & NOFN_FLAGS_RNG)
sc 170 dev/pci/nofn.c REG_WRITE_4(sc, NOFN_PCI_INT_MASK, sc->sc_intrmask);
sc 176 dev/pci/nofn.c bus_space_unmap(sc->sc_pk_t, sc->sc_pk_h, bar3size);
sc 178 dev/pci/nofn.c bus_space_unmap(sc->sc_st, sc->sc_sh, bar0size);
sc 185 dev/pci/nofn.c struct nofn_softc *sc = vsc;
sc 189 dev/pci/nofn.c stat = REG_READ_4(sc, NOFN_PCI_INT_STAT) & sc->sc_intrmask;
sc 192 dev/pci/nofn.c r |= nofn_rng_intr(sc);
sc 199 dev/pci/nofn.c sr = PK_READ_4(sc, NOFN_PK_SR);
sc 200 dev/pci/nofn.c if (sr & PK_SR_DONE && sc->sc_pk_current != NULL) {
sc 201 dev/pci/nofn.c q = sc->sc_pk_current;
sc 202 dev/pci/nofn.c sc->sc_pk_current = NULL;
sc 203 dev/pci/nofn.c q->q_finish(sc, q);
sc 205 dev/pci/nofn.c nofn_pk_feed(sc);
sc 213 dev/pci/nofn.c nofn_rng_read(sc)
sc 214 dev/pci/nofn.c struct nofn_softc *sc;
sc 220 dev/pci/nofn.c reg = PK_READ_4(sc, NOFN_PK_SR);
sc 224 dev/pci/nofn.c sc->sc_dev.dv_xname);
sc 225 dev/pci/nofn.c nofn_rng_disable(sc);
sc 233 dev/pci/nofn.c bus_space_read_region_4(sc->sc_pk_t, sc->sc_pk_h,
sc 235 dev/pci/nofn.c if (sc->sc_rngskip > 0)
sc 236 dev/pci/nofn.c sc->sc_rngskip -= 8;
sc 246 dev/pci/nofn.c nofn_rng_intr(sc)
sc 247 dev/pci/nofn.c struct nofn_softc *sc;
sc 251 dev/pci/nofn.c r = nofn_rng_read(sc);
sc 261 dev/pci/nofn.c struct nofn_softc *sc = vsc;
sc 265 dev/pci/nofn.c r = nofn_rng_read(sc);
sc 267 dev/pci/nofn.c timeout_add(&sc->sc_rngto, sc->sc_rngtick);
sc 272 dev/pci/nofn.c nofn_rng_disable(sc)
sc 273 dev/pci/nofn.c struct nofn_softc *sc;
sc 278 dev/pci/nofn.c r = PK_READ_4(sc, NOFN_PK_CFG2);
sc 280 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_CFG2, r);
sc 282 dev/pci/nofn.c switch (sc->sc_revid) {
sc 284 dev/pci/nofn.c if (timeout_pending(&sc->sc_rngto))
sc 285 dev/pci/nofn.c timeout_del(&sc->sc_rngto);
sc 291 dev/pci/nofn.c r = PK_READ_4(sc, NOFN_PK_IER);
sc 293 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_IER, r);
sc 295 dev/pci/nofn.c sc->sc_intrmask &= ~PCIINTMASK_RNGRDY;
sc 296 dev/pci/nofn.c REG_WRITE_4(sc, NOFN_PCI_INT_MASK, sc->sc_intrmask);
sc 300 dev/pci/nofn.c sc->sc_dev.dv_xname, sc->sc_revid);
sc 304 dev/pci/nofn.c sc->sc_flags &= ~NOFN_FLAGS_RNG;
sc 308 dev/pci/nofn.c nofn_rng_enable(sc)
sc 309 dev/pci/nofn.c struct nofn_softc *sc;
sc 314 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_RNC, PK_RNC_SCALER);
sc 317 dev/pci/nofn.c r = PK_READ_4(sc, NOFN_PK_CFG2);
sc 320 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_CFG2, r);
sc 323 dev/pci/nofn.c switch (sc->sc_revid) {
sc 325 dev/pci/nofn.c timeout_set(&sc->sc_rngto, nofn_rng_tick, sc);
sc 327 dev/pci/nofn.c sc->sc_rngtick = 1;
sc 329 dev/pci/nofn.c sc->sc_rngtick = hz / 100;
sc 330 dev/pci/nofn.c timeout_add(&sc->sc_rngto, sc->sc_rngtick);
sc 336 dev/pci/nofn.c r = PK_READ_4(sc, NOFN_PK_IER);
sc 339 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_IER, r);
sc 340 dev/pci/nofn.c sc->sc_intrmask |= PCIINTMASK_RNGRDY;
sc 344 dev/pci/nofn.c sc->sc_dev.dv_xname, sc->sc_revid);
sc 348 dev/pci/nofn.c sc->sc_flags |= NOFN_FLAGS_RNG;
sc 352 dev/pci/nofn.c nofn_pk_enable(sc)
sc 353 dev/pci/nofn.c struct nofn_softc *sc;
sc 358 dev/pci/nofn.c if ((sc->sc_cid = crypto_get_driverid(0)) < 0) {
sc 363 dev/pci/nofn.c SIMPLEQ_INIT(&sc->sc_pk_queue);
sc 364 dev/pci/nofn.c sc->sc_pk_current = NULL;
sc 368 dev/pci/nofn.c crypto_kregister(sc->sc_cid, algs, nofn_pk_process);
sc 371 dev/pci/nofn.c r = PK_READ_4(sc, NOFN_PK_CFG2);
sc 374 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_CFG2, r);
sc 376 dev/pci/nofn.c sc->sc_intrmask |= PCIINTMASK_PK;
sc 377 dev/pci/nofn.c sc->sc_flags |= NOFN_FLAGS_PK;
sc 381 dev/pci/nofn.c nofn_pk_feed(sc)
sc 382 dev/pci/nofn.c struct nofn_softc *sc;
sc 388 dev/pci/nofn.c if (SIMPLEQ_EMPTY(&sc->sc_pk_queue) &&
sc 389 dev/pci/nofn.c sc->sc_pk_current == NULL) {
sc 390 dev/pci/nofn.c r = PK_READ_4(sc, NOFN_PK_IER);
sc 392 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_IER, r);
sc 397 dev/pci/nofn.c if (sc->sc_pk_current != NULL)
sc 400 dev/pci/nofn.c while (!SIMPLEQ_EMPTY(&sc->sc_pk_queue)) {
sc 401 dev/pci/nofn.c q = SIMPLEQ_FIRST(&sc->sc_pk_queue);
sc 402 dev/pci/nofn.c if (q->q_start(sc, q) == 0) {
sc 403 dev/pci/nofn.c sc->sc_pk_current = q;
sc 404 dev/pci/nofn.c SIMPLEQ_REMOVE_HEAD(&sc->sc_pk_queue, q_next);
sc 406 dev/pci/nofn.c r = PK_READ_4(sc, NOFN_PK_IER);
sc 409 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_IER, r);
sc 412 dev/pci/nofn.c SIMPLEQ_REMOVE_HEAD(&sc->sc_pk_queue, q_next);
sc 422 dev/pci/nofn.c struct nofn_softc *sc;
sc 428 dev/pci/nofn.c if ((sc = nofn_pk_find(krp)) == NULL) {
sc 447 dev/pci/nofn.c SIMPLEQ_INSERT_TAIL(&sc->sc_pk_queue, q, q_next);
sc 448 dev/pci/nofn.c nofn_pk_feed(sc);
sc 453 dev/pci/nofn.c sc->sc_dev.dv_xname, krp->krp_op);
sc 465 dev/pci/nofn.c struct nofn_softc *sc;
sc 469 dev/pci/nofn.c sc = nofn_cd.cd_devs[i];
sc 470 dev/pci/nofn.c if (sc == NULL)
sc 472 dev/pci/nofn.c if (sc->sc_cid == krp->krp_hid)
sc 473 dev/pci/nofn.c return (sc);
sc 479 dev/pci/nofn.c nofn_pk_read_reg(sc, ridx, rp)
sc 480 dev/pci/nofn.c struct nofn_softc *sc;
sc 485 dev/pci/nofn.c bus_space_read_region_4(sc->sc_pk_t, sc->sc_pk_h,
sc 488 dev/pci/nofn.c bus_space_read_region_4(sc->sc_pk_t, sc->sc_pk_h,
sc 494 dev/pci/nofn.c nofn_pk_write_reg(sc, ridx, rp)
sc 495 dev/pci/nofn.c struct nofn_softc *sc;
sc 500 dev/pci/nofn.c bus_space_write_region_4(sc->sc_pk_t, sc->sc_pk_h,
sc 503 dev/pci/nofn.c bus_space_write_region_4(sc->sc_pk_t, sc->sc_pk_h,
sc 509 dev/pci/nofn.c nofn_pk_zero_reg(sc, ridx)
sc 510 dev/pci/nofn.c struct nofn_softc *sc;
sc 513 dev/pci/nofn.c nofn_pk_write_reg(sc, ridx, &sc->sc_pk_zero);
sc 517 dev/pci/nofn.c nofn_modexp_start(sc, q)
sc 518 dev/pci/nofn.c struct nofn_softc *sc;
sc 532 dev/pci/nofn.c nofn_pk_zero_reg(sc, 0);
sc 533 dev/pci/nofn.c nofn_pk_zero_reg(sc, 1);
sc 534 dev/pci/nofn.c nofn_pk_zero_reg(sc, 2);
sc 535 dev/pci/nofn.c nofn_pk_zero_reg(sc, 3);
sc 548 dev/pci/nofn.c bzero(&sc->sc_pk_tmp, sizeof(sc->sc_pk_tmp));
sc 549 dev/pci/nofn.c bcopy(krp->krp_param[NOFN_MODEXP_PAR_N].crp_p, &sc->sc_pk_tmp,
sc 551 dev/pci/nofn.c nofn_pk_write_reg(sc, 2, &sc->sc_pk_tmp);
sc 554 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_LENADDR(2), 1024);
sc 556 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_INSTR_BEGIN + ip,
sc 560 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_INSTR_BEGIN + ip,
sc 572 dev/pci/nofn.c bzero(&sc->sc_pk_tmp, sizeof(sc->sc_pk_tmp));
sc 573 dev/pci/nofn.c bcopy(krp->krp_param[NOFN_MODEXP_PAR_M].crp_p, &sc->sc_pk_tmp,
sc 575 dev/pci/nofn.c nofn_pk_write_reg(sc, 0, &sc->sc_pk_tmp);
sc 578 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_LENADDR(0), 1024);
sc 580 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_INSTR_BEGIN + ip,
sc 584 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_INSTR_BEGIN + ip,
sc 600 dev/pci/nofn.c bzero(&sc->sc_pk_tmp, sizeof(sc->sc_pk_tmp));
sc 601 dev/pci/nofn.c bcopy(krp->krp_param[NOFN_MODEXP_PAR_E].crp_p, &sc->sc_pk_tmp,
sc 603 dev/pci/nofn.c nofn_pk_write_reg(sc, 1, &sc->sc_pk_tmp);
sc 606 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_LENADDR(1), 1024);
sc 608 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_INSTR_BEGIN + ip,
sc 612 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_INSTR_BEGIN + ip,
sc 618 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_INSTR_BEGIN + ip,
sc 622 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_INSTR_BEGIN + ip,
sc 626 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_INSTR_BEGIN + ip,
sc 630 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_INSTR_BEGIN + ip,
sc 636 dev/pci/nofn.c PK_WRITE_4(sc, NOFN_PK_CR, 0 << PK_CR_OFFSET_S);
sc 641 dev/pci/nofn.c bzero(&sc->sc_pk_tmp, sizeof(sc->sc_pk_tmp));
sc 642 dev/pci/nofn.c nofn_pk_zero_reg(sc, 0);
sc 643 dev/pci/nofn.c nofn_pk_zero_reg(sc, 1);
sc 644 dev/pci/nofn.c nofn_pk_zero_reg(sc, 2);
sc 645 dev/pci/nofn.c nofn_pk_zero_reg(sc, 3);
sc 652 dev/pci/nofn.c nofn_modexp_finish(sc, q)
sc 653 dev/pci/nofn.c struct nofn_softc *sc;
sc 659 dev/pci/nofn.c nofn_pk_read_reg(sc, 3, &sc->sc_pk_tmp);
sc 661 dev/pci/nofn.c reglen = ((PK_READ_4(sc, NOFN_PK_LENADDR(3)) & NOFN_PK_LENMASK) + 7)
sc 666 dev/pci/nofn.c bcopy(sc->sc_pk_tmp.b, krp->krp_param[krp->krp_iparams].crp_p,
sc 669 dev/pci/nofn.c bcopy(sc->sc_pk_tmp.b, krp->krp_param[krp->krp_iparams].crp_p,
sc 674 dev/pci/nofn.c bzero(&sc->sc_pk_tmp, sizeof(sc->sc_pk_tmp));
sc 675 dev/pci/nofn.c nofn_pk_zero_reg(sc, 0);
sc 676 dev/pci/nofn.c nofn_pk_zero_reg(sc, 1);
sc 677 dev/pci/nofn.c nofn_pk_zero_reg(sc, 2);
sc 678 dev/pci/nofn.c nofn_pk_zero_reg(sc, 3);
sc 62 dev/pci/nofnvar.h #define REG_WRITE_4(sc,r,v) \
sc 63 dev/pci/nofnvar.h bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (r), (v))
sc 64 dev/pci/nofnvar.h #define REG_READ_4(sc,r) \
sc 65 dev/pci/nofnvar.h bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (r))
sc 67 dev/pci/nofnvar.h #define PK_WRITE_4(sc,r,v) \
sc 68 dev/pci/nofnvar.h bus_space_write_4((sc)->sc_pk_t, (sc)->sc_pk_h, (r), (v))
sc 69 dev/pci/nofnvar.h #define PK_READ_4(sc,r) \
sc 70 dev/pci/nofnvar.h bus_space_read_4((sc)->sc_pk_t, (sc)->sc_pk_h, (r))
sc 114 dev/pci/nviic.c #define DEVNAME(s) ((sc)->sc_dev.dv_xname)
sc 139 dev/pci/nviic.c struct nviic_softc *sc = (struct nviic_softc *)self;
sc 147 dev/pci/nviic.c sc->sc_iot = pa->pa_iot;
sc 167 dev/pci/nviic.c nc = &sc->sc_nc[i];
sc 171 dev/pci/nviic.c bus_space_map(sc->sc_iot, NVI_SMBASE(reg), NVI_SMBASE_SIZE,
sc 174 dev/pci/nviic.c DEVNAME(sc), i);
sc 178 dev/pci/nviic.c nc->nc_sc = sc;
sc 220 dev/pci/nviic.c struct nviic_softc *sc = nc->nc_sc;
sc 228 dev/pci/nviic.c DEVNAME(sc), op, addr, cmdlen, len, flags);
sc 278 dev/pci/nviic.c DPRINTF("%s: timeout\n", DEVNAME(sc));
sc 298 dev/pci/nviic.c struct nviic_softc *sc = nc->nc_sc;
sc 300 dev/pci/nviic.c bus_space_barrier(sc->sc_iot, nc->nc_ioh, r, 1,
sc 302 dev/pci/nviic.c return (bus_space_read_1(sc->sc_iot, nc->nc_ioh, r));
sc 308 dev/pci/nviic.c struct nviic_softc *sc = nc->nc_sc;
sc 310 dev/pci/nviic.c bus_space_write_1(sc->sc_iot, nc->nc_ioh, r, v);
sc 311 dev/pci/nviic.c bus_space_barrier(sc->sc_iot, nc->nc_ioh, r, 1,
sc 73 dev/pci/ohci_pci.c ohci_softc_t sc;
sc 99 dev/pci/ohci_pci.c struct ohci_pci_softc *sc = (struct ohci_pci_softc *)self;
sc 106 dev/pci/ohci_pci.c char *devname = sc->sc.sc_bus.bdev.dv_xname;
sc 110 dev/pci/ohci_pci.c &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size, 0)) {
sc 116 dev/pci/ohci_pci.c sc->sc.sc_intre = bus_space_read_4(sc->sc.iot, sc->sc.ioh,
sc 120 dev/pci/ohci_pci.c bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
sc 123 dev/pci/ohci_pci.c sc->sc_pc = pc;
sc 124 dev/pci/ohci_pci.c sc->sc.sc_bus.dmatag = pa->pa_dmat;
sc 126 dev/pci/ohci_pci.c bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
sc 128 dev/pci/ohci_pci.c bus_space_write_4(sc->sc.iot, sc->sc.ioh,
sc 135 dev/pci/ohci_pci.c bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc 141 dev/pci/ohci_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ohci_intr, sc, devname);
sc 142 dev/pci/ohci_pci.c if (sc->sc_ih == NULL) {
sc 147 dev/pci/ohci_pci.c bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc 155 dev/pci/ohci_pci.c sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
sc 157 dev/pci/ohci_pci.c strlcpy(sc->sc.sc_vendor, vendor, sizeof (sc->sc.sc_vendor));
sc 159 dev/pci/ohci_pci.c snprintf(sc->sc.sc_vendor, sizeof (sc->sc.sc_vendor),
sc 163 dev/pci/ohci_pci.c if (ohci_checkrev(&sc->sc) != USBD_NORMAL_COMPLETION ||
sc 164 dev/pci/ohci_pci.c ohci_handover(&sc->sc) != USBD_NORMAL_COMPLETION) {
sc 165 dev/pci/ohci_pci.c bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc 171 dev/pci/ohci_pci.c sc->sc.sc_dying = 1;
sc 183 dev/pci/ohci_pci.c struct ohci_pci_softc *sc = (struct ohci_pci_softc *)self;
sc 189 dev/pci/ohci_pci.c sc->sc.sc_dying = 0;
sc 191 dev/pci/ohci_pci.c r = ohci_init(&sc->sc);
sc 194 dev/pci/ohci_pci.c sc->sc.sc_bus.bdev.dv_xname, r);
sc 195 dev/pci/ohci_pci.c bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc 200 dev/pci/ohci_pci.c sc->sc.sc_powerhook = powerhook_establish(ohci_power, &sc->sc);
sc 201 dev/pci/ohci_pci.c if (sc->sc.sc_powerhook == NULL)
sc 203 dev/pci/ohci_pci.c sc->sc.sc_bus.bdev.dv_xname);
sc 208 dev/pci/ohci_pci.c sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
sc 215 dev/pci/ohci_pci.c struct ohci_pci_softc *sc = (struct ohci_pci_softc *)self;
sc 218 dev/pci/ohci_pci.c rv = ohci_detach(&sc->sc, flags);
sc 222 dev/pci/ohci_pci.c if (sc->sc.sc_powerhook != NULL)
sc 223 dev/pci/ohci_pci.c powerhook_disestablish(sc->sc.sc_powerhook);
sc 225 dev/pci/ohci_pci.c if (sc->sc_ih != NULL) {
sc 226 dev/pci/ohci_pci.c pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
sc 227 dev/pci/ohci_pci.c sc->sc_ih = NULL;
sc 229 dev/pci/ohci_pci.c if (sc->sc.sc_size) {
sc 230 dev/pci/ohci_pci.c bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc 231 dev/pci/ohci_pci.c sc->sc.sc_size = 0;
sc 95 dev/pci/opl_cmpci.c struct opl_softc *sc = (struct opl_softc *)self;
sc 97 dev/pci/opl_cmpci.c sc->ioh = ssc->sc_ioh;
sc 98 dev/pci/opl_cmpci.c sc->iot = ssc->sc_iot;
sc 99 dev/pci/opl_cmpci.c sc->offs = CMPCI_REG_FM_BASE;
sc 100 dev/pci/opl_cmpci.c strlcpy(sc->syn.name, "CMPCI ", sizeof sc->syn.name);
sc 102 dev/pci/opl_cmpci.c opl_attach(sc);
sc 100 dev/pci/opl_eso.c struct opl_softc *sc = (struct opl_softc *)self;
sc 102 dev/pci/opl_eso.c sc->ioh = esc->sc_sb_ioh;
sc 103 dev/pci/opl_eso.c sc->iot = esc->sc_sb_iot;
sc 104 dev/pci/opl_eso.c sc->offs = 0;
sc 105 dev/pci/opl_eso.c strlcpy(sc->syn.name, "ESO ", sizeof sc->syn.name);
sc 109 dev/pci/opl_eso.c opl_attach(sc);
sc 102 dev/pci/opl_yds.c struct opl_softc *sc = (struct opl_softc *)self;
sc 104 dev/pci/opl_yds.c sc->ioh = ssc->sc_opl_ioh;
sc 105 dev/pci/opl_yds.c sc->iot = ssc->sc_opl_iot;
sc 106 dev/pci/opl_yds.c sc->offs = 0;
sc 107 dev/pci/opl_yds.c strlcpy(sc->syn.name, "DS-1 integrated ", sizeof sc->syn.name);
sc 109 dev/pci/opl_yds.c opl_attach(sc);
sc 118 dev/pci/pccbb.c int pccbb_cardenable(struct pccbb_softc * sc, int function);
sc 120 dev/pci/pccbb.c int (*ih) (void *), void *sc, const char *);
sc 124 dev/pci/pccbb.c int (*ih) (void *), void *sc, const char *);
sc 345 dev/pci/pccbb.c struct pccbb_softc *sc = arg;
sc 348 dev/pci/pccbb.c DPRINTF(("%s: shutdown\n", sc->sc_dev.dv_xname));
sc 351 dev/pci/pccbb.c pccbb_power((cardbus_chipset_tag_t)sc, CARDBUS_VCC_0V | CARDBUS_VPP_0V);
sc 353 dev/pci/pccbb.c bus_space_write_4(sc->sc_base_memt, sc->sc_base_memh, CB_SOCKET_MASK,
sc 356 dev/pci/pccbb.c command = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);
sc 360 dev/pci/pccbb.c pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG, command);
sc 369 dev/pci/pccbb.c struct pccbb_softc *sc = (void *)self;
sc 382 dev/pci/pccbb.c sc->sc_chipset = cb_chipset(pa->pa_id, &flags);
sc 388 dev/pci/pccbb.c TAILQ_INIT(&sc->sc_memwindow);
sc 389 dev/pci/pccbb.c TAILQ_INIT(&sc->sc_iowindow);
sc 391 dev/pci/pccbb.c sc->sc_rbus_iot = rbus_pccbb_parent_io(self, pa);
sc 392 dev/pci/pccbb.c sc->sc_rbus_memt = rbus_pccbb_parent_mem(self, pa);
sc 394 dev/pci/pccbb.c sc->sc_flags &= ~CBB_MEMHMAPPED;
sc 407 dev/pci/pccbb.c &sc->sc_base_memt, &sc->sc_base_memh, &sockbase, NULL, 0))
sc 410 dev/pci/pccbb.c sc->sc_dev.dv_xname, sock_base);
sc 416 dev/pci/pccbb.c PCI_MAPREG_TYPE_IO, 0, &sc->sc_base_memt,
sc 417 dev/pci/pccbb.c &sc->sc_base_memh, &sockbase, NULL, 0)) {
sc 419 dev/pci/pccbb.c " 0x%lx: io mode\n", sc->sc_dev.dv_xname,
sc 424 dev/pci/pccbb.c sc->sc_flags |= CBB_MEMHMAPPED;
sc 427 dev/pci/pccbb.c sc->sc_dev.dv_xname, sockbase));
sc 428 dev/pci/pccbb.c sc->sc_flags |= CBB_MEMHMAPPED;
sc 432 dev/pci/pccbb.c sc->sc_mem_start = 0; /* XXX */
sc 433 dev/pci/pccbb.c sc->sc_mem_end = 0xffffffff; /* XXX */
sc 458 dev/pci/pccbb.c sc->sc_pc = pc;
sc 459 dev/pci/pccbb.c sc->sc_iot = pa->pa_iot;
sc 460 dev/pci/pccbb.c sc->sc_memt = pa->pa_memt;
sc 461 dev/pci/pccbb.c sc->sc_dmat = pa->pa_dmat;
sc 462 dev/pci/pccbb.c sc->sc_tag = pa->pa_tag;
sc 463 dev/pci/pccbb.c sc->sc_function = pa->pa_function;
sc 464 dev/pci/pccbb.c sc->sc_sockbase = sock_base;
sc 465 dev/pci/pccbb.c sc->sc_busnum = busreg;
sc 466 dev/pci/pccbb.c sc->sc_intrtag = pa->pa_intrtag;
sc 467 dev/pci/pccbb.c sc->sc_intrpin = pa->pa_intrpin;
sc 469 dev/pci/pccbb.c sc->sc_pcmcia_flags = flags; /* set PCMCIA facility */
sc 478 dev/pci/pccbb.c sc->sc_intrline = pci_intr_line(ih);
sc 484 dev/pci/pccbb.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, pccbbintr, sc,
sc 485 dev/pci/pccbb.c sc->sc_dev.dv_xname);
sc 487 dev/pci/pccbb.c if (sc->sc_ih == NULL) {
sc 497 dev/pci/pccbb.c shutdownhook_establish(pccbb_shutdown, sc);
sc 500 dev/pci/pccbb.c switch (sc->sc_chipset) {
sc 523 dev/pci/pccbb.c timeout_set(&sc->sc_ins_tmo, pci113x_insert, sc);
sc 543 dev/pci/pccbb.c struct pccbb_softc *sc = (void *)self;
sc 544 dev/pci/pccbb.c pci_chipset_tag_t pc = sc->sc_pc;
sc 554 dev/pci/pccbb.c if (!(sc->sc_flags & CBB_MEMHMAPPED)) {
sc 556 dev/pci/pccbb.c if (rbus_space_alloc(sc->sc_rbus_memt, 0, 0x1000, 0x0fff,
sc 557 dev/pci/pccbb.c (sc->sc_chipset == CB_RX5C47X
sc 558 dev/pci/pccbb.c || sc->sc_chipset == CB_TI113X) ? 0x10000 : 0x1000,
sc 559 dev/pci/pccbb.c 0, &sockbase, &sc->sc_base_memh)) {
sc 562 dev/pci/pccbb.c sc->sc_base_memt = sc->sc_memt;
sc 563 dev/pci/pccbb.c pci_conf_write(pc, sc->sc_tag, PCI_SOCKBASE, sockbase);
sc 565 dev/pci/pccbb.c sc->sc_dev.dv_xname, sockbase, pci_conf_read(pc, sc->sc_tag,
sc 567 dev/pci/pccbb.c sc->sc_flags |= CBB_MEMHMAPPED;
sc 571 dev/pci/pccbb.c pccbb_chipinit(sc);
sc 573 dev/pci/pccbb.c base_memt = sc->sc_base_memt; /* socket regs memory tag */
sc 574 dev/pci/pccbb.c base_memh = sc->sc_base_memh; /* socket regs memory handle */
sc 577 dev/pci/pccbb.c sc->sc_pil = NULL;
sc 578 dev/pci/pccbb.c sc->sc_pil_intr_enable = 1;
sc 580 dev/pci/pccbb.c powerhook_establish(pccbb_powerhook, sc);
sc 586 dev/pci/pccbb.c sc->sc_flags |= CBB_CARDEXIST;
sc 593 dev/pci/pccbb.c if (!(sc->sc_pcmcia_flags & PCCBB_PCMCIA_16BITONLY)) {
sc 594 dev/pci/pccbb.c pcireg_t busreg = pci_conf_read(pc, sc->sc_tag, PCI_BUSNUM);
sc 595 dev/pci/pccbb.c pcireg_t bhlc = pci_conf_read(pc, sc->sc_tag, PCI_BHLC_REG);
sc 599 dev/pci/pccbb.c cba.cba_iot = sc->sc_iot;
sc 600 dev/pci/pccbb.c cba.cba_memt = sc->sc_memt;
sc 601 dev/pci/pccbb.c cba.cba_dmat = sc->sc_dmat;
sc 603 dev/pci/pccbb.c cba.cba_cc = (void *)sc;
sc 605 dev/pci/pccbb.c cba.cba_intrline = sc->sc_intrline;
sc 607 dev/pci/pccbb.c cba.cba_rbus_iot = sc->sc_rbus_iot;
sc 608 dev/pci/pccbb.c cba.cba_rbus_memt = sc->sc_rbus_memt;
sc 615 dev/pci/pccbb.c sc->sc_dev.dv_xname, cba.cba_cacheline, cba.cba_lattimer);
sc 616 dev/pci/pccbb.c printf("%s: bhlc 0x%x lscp 0x%x\n", sc->sc_dev.dv_xname, bhlc,
sc 620 dev/pci/pccbb.c cb_show_regs(sc->sc_pc, sc->sc_tag, sc->sc_base_memt,
sc 621 dev/pci/pccbb.c sc->sc_base_memh);
sc 625 dev/pci/pccbb.c pccbb_pcmcia_attach_setup(sc, &paa);
sc 627 dev/pci/pccbb.c if (!(sc->sc_pcmcia_flags & PCCBB_PCMCIA_16BITONLY)) {
sc 631 dev/pci/pccbb.c caa.caa_ph = &sc->sc_pcmcia_h;
sc 635 dev/pci/pccbb.c sc->sc_csc = csc;
sc 638 dev/pci/pccbb.c sc->sc_ints_on = 1;
sc 661 dev/pci/pccbb.c pccbb_chipinit(sc)
sc 662 dev/pci/pccbb.c struct pccbb_softc *sc;
sc 664 dev/pci/pccbb.c pci_chipset_tag_t pc = sc->sc_pc;
sc 665 dev/pci/pccbb.c pcitag_t tag = sc->sc_tag;
sc 709 dev/pci/pccbb.c switch (sc->sc_chipset) {
sc 768 dev/pci/pccbb.c sc->sc_dev.dv_xname, reg));
sc 779 dev/pci/pccbb.c sc->sc_dev.dv_xname, reg));
sc 789 dev/pci/pccbb.c bus_space_write_1(sc->sc_base_memt, sc->sc_base_memh,
sc 790 dev/pci/pccbb.c 0x800 + 0x3e, bus_space_read_1(sc->sc_base_memt,
sc 791 dev/pci/pccbb.c sc->sc_base_memh, 0x800 + 0x3e) | 0x03);
sc 809 dev/pci/pccbb.c sc->sc_dev.dv_xname, reg));
sc 830 dev/pci/pccbb.c bus_space_write_1(sc->sc_base_memt, sc->sc_base_memh,
sc 832 dev/pci/pccbb.c bus_space_read_1(sc->sc_base_memt, sc->sc_base_memh,
sc 836 dev/pci/pccbb.c pccbb_power((cardbus_chipset_tag_t)sc, CARDBUS_VCC_0V | CARDBUS_VPP_0V);
sc 849 dev/pci/pccbb.c pccbb_pcmcia_attach_setup(sc, paa)
sc 850 dev/pci/pccbb.c struct pccbb_softc *sc;
sc 853 dev/pci/pccbb.c struct pcic_handle *ph = &sc->sc_pcmcia_h;
sc 857 dev/pci/pccbb.c ph->ph_parent = (struct device *)sc;
sc 858 dev/pci/pccbb.c ph->sock = sc->sc_function;
sc 861 dev/pci/pccbb.c ph->ih_irq = sc->sc_intrline;
sc 862 dev/pci/pccbb.c ph->ph_bus_t = sc->sc_base_memt;
sc 863 dev/pci/pccbb.c ph->ph_bus_h = sc->sc_base_memh;
sc 866 dev/pci/pccbb.c sc->sc_pct = &pccbb_pcmcia_funcs;
sc 880 dev/pci/pccbb.c if (sc->sc_chipset == CB_TI113X) {
sc 889 dev/pci/pccbb.c paa->pct = sc->sc_pct;
sc 941 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)arg;
sc 943 dev/pci/pccbb.c bus_space_tag_t memt = sc->sc_base_memt;
sc 944 dev/pci/pccbb.c bus_space_handle_t memh = sc->sc_base_memh;
sc 945 dev/pci/pccbb.c struct pcic_handle *ph = &sc->sc_pcmcia_h;
sc 947 dev/pci/pccbb.c if (!sc->sc_ints_on)
sc 956 dev/pci/pccbb.c if (sc->sc_pil_intr_enable) {
sc 957 dev/pci/pccbb.c return pccbbintr_function(sc);
sc 967 dev/pci/pccbb.c if (sc->sc_flags & CBB_CARDEXIST) {
sc 968 dev/pci/pccbb.c DPRINTF(("%s: 0x%08x", sc->sc_dev.dv_xname,
sc 971 dev/pci/pccbb.c sc->sc_flags &= ~CBB_CARDEXIST;
sc 972 dev/pci/pccbb.c if (sc->sc_csc->sc_status &
sc 976 dev/pci/pccbb.c &sc->sc_pcmcia_h;
sc 983 dev/pci/pccbb.c cardslot_event_throw(sc->sc_csc,
sc 985 dev/pci/pccbb.c } else if (sc->sc_csc->sc_status &
sc 988 dev/pci/pccbb.c cardslot_event_throw(sc->sc_csc,
sc 998 dev/pci/pccbb.c (sc->sc_flags & CBB_CARDEXIST) == 0) {
sc 999 dev/pci/pccbb.c if (sc->sc_flags & CBB_INSERTING) {
sc 1000 dev/pci/pccbb.c timeout_del(&sc->sc_ins_tmo);
sc 1002 dev/pci/pccbb.c timeout_add(&sc->sc_ins_tmo, hz / 10);
sc 1003 dev/pci/pccbb.c sc->sc_flags |= CBB_INSERTING;
sc 1017 dev/pci/pccbb.c pccbbintr_function(sc)
sc 1018 dev/pci/pccbb.c struct pccbb_softc *sc;
sc 1024 dev/pci/pccbb.c for (pil = sc->sc_pil; pil != NULL; pil = pil->pil_next) {
sc 1078 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)arg;
sc 1081 dev/pci/pccbb.c sockevent = bus_space_read_4(sc->sc_base_memt, sc->sc_base_memh,
sc 1083 dev/pci/pccbb.c sockstate = bus_space_read_4(sc->sc_base_memt, sc->sc_base_memh,
sc 1087 dev/pci/pccbb.c DPRINTF(("%s: 0x%08x", sc->sc_dev.dv_xname, sockevent));
sc 1089 dev/pci/pccbb.c sc->sc_flags |= CBB_CARDEXIST;
sc 1094 dev/pci/pccbb.c cardslot_event_throw(sc->sc_csc,
sc 1099 dev/pci/pccbb.c cardslot_event_throw(sc->sc_csc,
sc 1105 dev/pci/pccbb.c timeout_add(&sc->sc_ins_tmo, hz / 10);
sc 1143 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)ct;
sc 1147 dev/pci/pccbb.c if (2 == pccbb_detect_card(sc)) {
sc 1149 dev/pci/pccbb.c int status = cb_detect_voltage(sc);
sc 1168 dev/pci/pccbb.c return cb_reset(sc);
sc 1176 dev/pci/pccbb.c return pccbb_cardenable(sc, command);
sc 1193 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)ct;
sc 1196 dev/pci/pccbb.c bus_space_tag_t memt = sc->sc_base_memt;
sc 1197 dev/pci/pccbb.c bus_space_handle_t memh = sc->sc_base_memh;
sc 1225 dev/pci/pccbb.c sc->sc_dev.dv_xname);
sc 1234 dev/pci/pccbb.c sc->sc_dev.dv_xname);
sc 1270 dev/pci/pccbb.c sc->sc_dev.dv_xname, sock_ctrl, status);
sc 1337 dev/pci/pccbb.c struct pccbb_softc *sc = psc->cpc_parent;
sc 1357 dev/pci/pccbb.c bus_space_read_4(sc->sc_base_memt, sc->sc_base_memh,
sc 1385 dev/pci/pccbb.c pccbb_detect_card(sc)
sc 1386 dev/pci/pccbb.c struct pccbb_softc *sc;
sc 1388 dev/pci/pccbb.c bus_space_handle_t base_memh = sc->sc_base_memh;
sc 1389 dev/pci/pccbb.c bus_space_tag_t base_memt = sc->sc_base_memt;
sc 1425 dev/pci/pccbb.c cb_reset(sc)
sc 1426 dev/pci/pccbb.c struct pccbb_softc *sc;
sc 1433 dev/pci/pccbb.c (sc->sc_chipset == CB_RX5C47X ? 400 * 1000 : 40 * 1000);
sc 1434 dev/pci/pccbb.c u_int32_t bcr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR);
sc 1438 dev/pci/pccbb.c pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR, bcr);
sc 1441 dev/pci/pccbb.c if (CBB_CARDEXIST & sc->sc_flags) { /* A card exists. Reset it! */
sc 1444 dev/pci/pccbb.c pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR, bcr);
sc 1456 dev/pci/pccbb.c cb_detect_voltage(sc)
sc 1457 dev/pci/pccbb.c struct pccbb_softc *sc;
sc 1460 dev/pci/pccbb.c bus_space_tag_t iot = sc->sc_base_memt;
sc 1461 dev/pci/pccbb.c bus_space_handle_t ioh = sc->sc_base_memh;
sc 1496 dev/pci/pccbb.c pccbb_cardenable(sc, function)
sc 1497 dev/pci/pccbb.c struct pccbb_softc *sc;
sc 1501 dev/pci/pccbb.c pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);
sc 1527 dev/pci/pccbb.c pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG, command);
sc 1554 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)ct;
sc 1556 dev/pci/pccbb.c return pccbb_intr_establish(sc, irq, level, func, arg, name);
sc 1571 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)ct;
sc 1573 dev/pci/pccbb.c pccbb_intr_disestablish(sc, ih);
sc 1592 dev/pci/pccbb.c pccbb_intr_establish(sc, irq, level, func, arg, name)
sc 1593 dev/pci/pccbb.c struct pccbb_softc *sc;
sc 1602 dev/pci/pccbb.c DPRINTF(("pccbb_intr_establish start. %p\n", sc->sc_pil));
sc 1604 dev/pci/pccbb.c if (sc->sc_pil == NULL) {
sc 1606 dev/pci/pccbb.c reg = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR);
sc 1608 dev/pci/pccbb.c pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR, reg);
sc 1610 dev/pci/pccbb.c switch (sc->sc_chipset) {
sc 1612 dev/pci/pccbb.c reg = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_CBCTRL);
sc 1615 dev/pci/pccbb.c pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_CBCTRL, reg);
sc 1631 dev/pci/pccbb.c evcount_attach(&newpil->pil_count, name, &sc->sc_intrline,
sc 1635 dev/pci/pccbb.c if (sc->sc_pil == NULL) {
sc 1636 dev/pci/pccbb.c sc->sc_pil = newpil;
sc 1638 dev/pci/pccbb.c for (pil = sc->sc_pil; pil->pil_next != NULL;
sc 1643 dev/pci/pccbb.c DPRINTF(("pccbb_intr_establish add pil. %p\n", sc->sc_pil));
sc 1655 dev/pci/pccbb.c pccbb_intr_disestablish(sc, ih)
sc 1656 dev/pci/pccbb.c struct pccbb_softc *sc;
sc 1662 dev/pci/pccbb.c DPRINTF(("pccbb_intr_disestablish start. %p\n", sc->sc_pil));
sc 1664 dev/pci/pccbb.c pil_prev = &sc->sc_pil;
sc 1666 dev/pci/pccbb.c for (pil = sc->sc_pil; pil != NULL; pil = pil->pil_next) {
sc 1677 dev/pci/pccbb.c if (sc->sc_pil == NULL) {
sc 1683 dev/pci/pccbb.c reg = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR);
sc 1685 dev/pci/pccbb.c pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR, reg);
sc 1687 dev/pci/pccbb.c switch (sc->sc_chipset) {
sc 1689 dev/pci/pccbb.c reg = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_CBCTRL);
sc 1692 dev/pci/pccbb.c pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_CBCTRL, reg);
sc 1752 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)cc;
sc 1754 dev/pci/pccbb.c return pci_make_tag(sc->sc_pc, busno, devno, function);
sc 1776 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)cc;
sc 1778 dev/pci/pccbb.c return pci_conf_read(sc->sc_pc, tag, offset);
sc 1794 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)cc;
sc 1796 dev/pci/pccbb.c pci_conf_write(sc->sc_pc, tag, reg, val);
sc 1901 dev/pci/pccbb.c struct pccbb_softc *sc =
sc 1903 dev/pci/pccbb.c rbus_tag_t rb = sc->sc_rbus_iot;
sc 2136 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)ph->ph_parent;
sc 2149 dev/pci/pccbb.c bus_space_read_4(sc->sc_base_memt, sc->sc_base_memh,
sc 2169 dev/pci/pccbb.c pccbb_power(sc, CARDBUS_VCC_0V | CARDBUS_VPP_0V);
sc 2186 dev/pci/pccbb.c pccbb_power(sc, voltage);
sc 2250 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)ph->ph_parent;
sc 2266 dev/pci/pccbb.c pccbb_power(sc, CARDBUS_VCC_0V | CARDBUS_VPP_0V);
sc 2284 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)ph->ph_parent;
sc 2287 dev/pci/pccbb.c return pccbb_detect_card(sc) == 1 ? 1 : 0;
sc 2316 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)ph->ph_parent;
sc 2333 dev/pci/pccbb.c if (!(sc->sc_pcmcia_flags & PCCBB_PCMCIA_MEM_32)) {
sc 2339 dev/pci/pccbb.c rb = sc->sc_rbus_memt;
sc 2350 dev/pci/pccbb.c pcmhp->memt = sc->sc_memt;
sc 2375 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)ph->ph_parent;
sc 2377 dev/pci/pccbb.c rbus_space_free(sc->sc_rbus_memt, pcmhp->memh, pcmhp->realsize, NULL);
sc 2608 dev/pci/pccbb.c struct pccbb_softc *sc = ph->sc;
sc 2628 dev/pci/pccbb.c bus_space_read_4(sc->sc_base_memt, sc->sc_base_memh,
sc 2669 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)ph->ph_parent;
sc 2676 dev/pci/pccbb.c sc->sc_dev.dv_xname));
sc 2685 dev/pci/pccbb.c return pccbb_intr_establish(sc, -1, ipl, func, arg, xname);
sc 2700 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)ph->ph_parent;
sc 2702 dev/pci/pccbb.c pccbb_intr_disestablish(sc, ih);
sc 2739 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)ct;
sc 2749 dev/pci/pccbb.c if (rb->rb_bt == sc->sc_memt) {
sc 2753 dev/pci/pccbb.c } else if (rb->rb_bt == sc->sc_iot) {
sc 2772 dev/pci/pccbb.c printf("%s: <rbus> no bus space\n", sc->sc_dev.dv_xname);
sc 2776 dev/pci/pccbb.c pccbb_open_win(sc, rb->rb_bt, *addrp, size, *bshp, 0);
sc 2795 dev/pci/pccbb.c struct pccbb_softc *sc = (struct pccbb_softc *)ct;
sc 2798 dev/pci/pccbb.c pccbb_close_win(sc, bt, bsh, size);
sc 2800 dev/pci/pccbb.c if (bt == sc->sc_memt) {
sc 2801 dev/pci/pccbb.c } else if (bt == sc->sc_iot) {
sc 2811 dev/pci/pccbb.c pccbb_open_win(sc, bst, addr, size, bsh, flags)
sc 2812 dev/pci/pccbb.c struct pccbb_softc *sc;
sc 2822 dev/pci/pccbb.c head = &sc->sc_iowindow;
sc 2824 dev/pci/pccbb.c if (sc->sc_memt == bst) {
sc 2825 dev/pci/pccbb.c head = &sc->sc_memwindow;
sc 2828 dev/pci/pccbb.c sc->sc_iot, sc->sc_memt, bst));
sc 2833 dev/pci/pccbb.c sc->sc_dev.dv_xname,
sc 2834 dev/pci/pccbb.c (head == &sc->sc_memwindow) ? "mem" : "io");
sc 2836 dev/pci/pccbb.c pccbb_winset(align, sc, bst);
sc 2842 dev/pci/pccbb.c pccbb_close_win(sc, bst, bsh, size)
sc 2843 dev/pci/pccbb.c struct pccbb_softc *sc;
sc 2851 dev/pci/pccbb.c head = &sc->sc_iowindow;
sc 2853 dev/pci/pccbb.c if (sc->sc_memt == bst) {
sc 2854 dev/pci/pccbb.c head = &sc->sc_memwindow;
sc 2860 dev/pci/pccbb.c sc->sc_dev.dv_xname,
sc 2861 dev/pci/pccbb.c (head == &sc->sc_memwindow) ? "mem" : "io");
sc 2863 dev/pci/pccbb.c pccbb_winset(align, sc, bst);
sc 2930 dev/pci/pccbb.c pccbb_winset(align, sc, bst)
sc 2932 dev/pci/pccbb.c struct pccbb_softc *sc;
sc 2950 dev/pci/pccbb.c chainp = TAILQ_FIRST(&sc->sc_iowindow);
sc 2952 dev/pci/pccbb.c if (sc->sc_memt == bst) {
sc 2953 dev/pci/pccbb.c chainp = TAILQ_FIRST(&sc->sc_memwindow);
sc 3022 dev/pci/pccbb.c sc->sc_dev.dv_xname);
sc 3029 dev/pci/pccbb.c pc = sc->sc_pc;
sc 3030 dev/pci/pccbb.c tag = sc->sc_tag;
sc 3041 dev/pci/pccbb.c if (bst == sc->sc_memt) {
sc 3058 dev/pci/pccbb.c struct pccbb_softc *sc = arg;
sc 3060 dev/pci/pccbb.c bus_space_tag_t base_memt = sc->sc_base_memt; /* socket regs memory */
sc 3061 dev/pci/pccbb.c bus_space_handle_t base_memh = sc->sc_base_memh;
sc 3063 dev/pci/pccbb.c DPRINTF(("%s: power: why %d\n", sc->sc_dev.dv_xname, why));
sc 3067 dev/pci/pccbb.c sc->sc_dev.dv_xname, why));
sc 3068 dev/pci/pccbb.c if (sc->sc_pil_intr_enable) {
sc 3069 dev/pci/pccbb.c (void)pccbbintr_function(sc);
sc 3071 dev/pci/pccbb.c sc->sc_pil_intr_enable = 0;
sc 3078 dev/pci/pccbb.c if (pci_conf_read (sc->sc_pc, sc->sc_tag, PCI_SOCKBASE) == 0)
sc 3080 dev/pci/pccbb.c pci_conf_write (sc->sc_pc, sc->sc_tag,
sc 3081 dev/pci/pccbb.c PCI_SOCKBASE, sc->sc_sockbase);
sc 3082 dev/pci/pccbb.c if (pci_conf_read (sc->sc_pc, sc->sc_tag, PCI_BUSNUM) == 0)
sc 3084 dev/pci/pccbb.c pci_conf_write (sc->sc_pc, sc->sc_tag,
sc 3085 dev/pci/pccbb.c PCI_BUSNUM, sc->sc_busnum);
sc 3100 dev/pci/pccbb.c (void)pccbbintr(sc);
sc 3102 dev/pci/pccbb.c sc->sc_pil_intr_enable = 1;
sc 3104 dev/pci/pccbb.c sc->sc_dev.dv_xname));
sc 142 dev/pci/pci.c struct pci_softc *sc = (struct pci_softc *)self;
sc 148 dev/pci/pci.c LIST_INIT(&sc->sc_devs);
sc 149 dev/pci/pci.c sc->sc_powerhook = powerhook_establish(pcipower, sc);
sc 151 dev/pci/pci.c sc->sc_iot = pba->pba_iot;
sc 152 dev/pci/pci.c sc->sc_memt = pba->pba_memt;
sc 153 dev/pci/pci.c sc->sc_dmat = pba->pba_dmat;
sc 154 dev/pci/pci.c sc->sc_pc = pba->pba_pc;
sc 155 dev/pci/pci.c sc->sc_domain = pba->pba_domain;
sc 156 dev/pci/pci.c sc->sc_bus = pba->pba_bus;
sc 157 dev/pci/pci.c sc->sc_bridgetag = pba->pba_bridgetag;
sc 158 dev/pci/pci.c sc->sc_bridgeih = pba->pba_bridgeih;
sc 159 dev/pci/pci.c sc->sc_maxndevs = pci_bus_maxdevs(pba->pba_pc, pba->pba_bus);
sc 160 dev/pci/pci.c sc->sc_intrswiz = pba->pba_intrswiz;
sc 161 dev/pci/pci.c sc->sc_intrtag = pba->pba_intrtag;
sc 162 dev/pci/pci.c pci_enumerate_bus(sc, NULL, NULL);
sc 169 dev/pci/pci.c struct pci_softc *sc = (struct pci_softc *)arg;
sc 174 dev/pci/pci.c LIST_FOREACH(pd, &sc->sc_devs, pd_next) {
sc 177 dev/pci/pci.c pd->pd_map[i] = pci_conf_read(sc->sc_pc,
sc 179 dev/pci/pci.c pd->pd_csr = pci_conf_read(sc->sc_pc, pd->pd_tag,
sc 181 dev/pci/pci.c pd->pd_bhlc = pci_conf_read(sc->sc_pc, pd->pd_tag,
sc 183 dev/pci/pci.c pd->pd_int = pci_conf_read(sc->sc_pc, pd->pd_tag,
sc 187 dev/pci/pci.c pci_conf_write(sc->sc_pc, pd->pd_tag,
sc 190 dev/pci/pci.c reg = pci_conf_read(sc->sc_pc, pd->pd_tag,
sc 192 dev/pci/pci.c pci_conf_write(sc->sc_pc, pd->pd_tag,
sc 195 dev/pci/pci.c pci_conf_write(sc->sc_pc, pd->pd_tag, PCI_BHLC_REG,
sc 197 dev/pci/pci.c pci_conf_write(sc->sc_pc, pd->pd_tag, PCI_INTERRUPT_REG,
sc 241 dev/pci/pci.c pci_probe_device(struct pci_softc *sc, pcitag_t tag,
sc 244 dev/pci/pci.c pci_chipset_tag_t pc = sc->sc_pc;
sc 268 dev/pci/pci.c pa.pa_iot = sc->sc_iot;
sc 269 dev/pci/pci.c pa.pa_memt = sc->sc_memt;
sc 270 dev/pci/pci.c pa.pa_dmat = sc->sc_dmat;
sc 272 dev/pci/pci.c pa.pa_domain = sc->sc_domain;
sc 279 dev/pci/pci.c pa.pa_bridgetag = sc->sc_bridgetag;
sc 280 dev/pci/pci.c pa.pa_bridgeih = sc->sc_bridgeih;
sc 297 dev/pci/pci.c if (sc->sc_bridgetag == NULL) {
sc 301 dev/pci/pci.c pa.pa_intrswiz = sc->sc_intrswiz + device;
sc 302 dev/pci/pci.c pa.pa_intrtag = sc->sc_intrtag;
sc 328 dev/pci/pci.c if ((dev = config_found_sm(&sc->sc_dev, &pa, pciprint,
sc 344 dev/pci/pci.c LIST_INSERT_HEAD(&sc->sc_devs, pd, pd_next);
sc 419 dev/pci/pci.c pci_enumerate_bus(struct pci_softc *sc,
sc 422 dev/pci/pci.c pci_chipset_tag_t pc = sc->sc_pc;
sc 428 dev/pci/pci.c for (device = 0; device < sc->sc_maxndevs; device++) {
sc 429 dev/pci/pci.c tag = pci_make_tag(pc, sc->sc_bus, device, 0);
sc 456 dev/pci/pci.c tag = pci_make_tag(pc, sc->sc_bus, device, function);
sc 457 dev/pci/pci.c ret = pci_probe_device(sc, tag, match, pap);
sc 1250 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)self;
sc 1253 dev/pci/pciide.c sc->sc_pp = pciide_lookup_product(pa->pa_id);
sc 1254 dev/pci/pciide.c if (sc->sc_pp == NULL)
sc 1255 dev/pci/pciide.c sc->sc_pp = &default_product_desc;
sc 1256 dev/pci/pciide.c sc->sc_rev = PCI_REVISION(pa->pa_class);
sc 1258 dev/pci/pciide.c sc->sc_pc = pa->pa_pc;
sc 1259 dev/pci/pciide.c sc->sc_tag = pa->pa_tag;
sc 1262 dev/pci/pciide.c sc->sc_dma_maxsegsz = IDEDMA_BYTE_COUNT_MAX;
sc 1263 dev/pci/pciide.c sc->sc_dma_boundary = IDEDMA_BYTE_COUNT_ALIGN;
sc 1265 dev/pci/pciide.c sc->sc_dmacmd_read = pciide_dmacmd_read;
sc 1266 dev/pci/pciide.c sc->sc_dmacmd_write = pciide_dmacmd_write;
sc 1267 dev/pci/pciide.c sc->sc_dmactl_read = pciide_dmactl_read;
sc 1268 dev/pci/pciide.c sc->sc_dmactl_write = pciide_dmactl_write;
sc 1269 dev/pci/pciide.c sc->sc_dmatbl_write = pciide_dmatbl_write;
sc 1271 dev/pci/pciide.c WDCDEBUG_PRINT((" sc_pc=%p, sc_tag=%p, pa_class=0x%x\n", sc->sc_pc,
sc 1272 dev/pci/pciide.c sc->sc_tag, pa->pa_class), DEBUG_PROBE);
sc 1274 dev/pci/pciide.c sc->sc_pp->chip_map(sc, pa);
sc 1277 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG)),
sc 1285 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 1293 dev/pci/pciide.c csr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);
sc 1294 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG,
sc 1302 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 1311 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 1324 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 1332 dev/pci/pciide.c if (sc->sc_pci_ih == NULL) {
sc 1335 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 1339 dev/pci/pciide.c sc->sc_pci_ih = pci_intr_establish(pa->pa_pc,
sc 1340 dev/pci/pciide.c intrhandle, IPL_BIO, pci_intr, sc,
sc 1341 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 1342 dev/pci/pciide.c if (sc->sc_pci_ih != NULL) {
sc 1344 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 1348 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 1355 dev/pci/pciide.c cp->ih = sc->sc_pci_ih;
sc 1360 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name,
sc 1366 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 1373 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name,
sc 1379 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 1391 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 1400 dev/pci/pciide.c pciide_mapreg_dma(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 1426 dev/pci/pciide.c sc->sc_dma_ok = (pci_mapreg_info(pa->pa_pc, pa->pa_tag,
sc 1429 dev/pci/pciide.c if (sc->sc_dma_ok == 0) {
sc 1433 dev/pci/pciide.c if ((sc->sc_pp->ide_flags & IDE_16BIT_IOSPACE)
sc 1435 dev/pci/pciide.c sc->sc_dma_ok = 0;
sc 1442 dev/pci/pciide.c sc->sc_dma_ok = (pci_mapreg_map(pa,
sc 1444 dev/pci/pciide.c &sc->sc_dma_iot, &sc->sc_dma_ioh, NULL, NULL, 0) == 0);
sc 1445 dev/pci/pciide.c sc->sc_dmat = pa->pa_dmat;
sc 1446 dev/pci/pciide.c if (sc->sc_dma_ok == 0) {
sc 1449 dev/pci/pciide.c sc->sc_wdcdev.dma_arg = sc;
sc 1450 dev/pci/pciide.c sc->sc_wdcdev.dma_init = pciide_dma_init;
sc 1451 dev/pci/pciide.c sc->sc_wdcdev.dma_start = pciide_dma_start;
sc 1452 dev/pci/pciide.c sc->sc_wdcdev.dma_finish = pciide_dma_finish;
sc 1457 dev/pci/pciide.c sc->sc_dma_ok = 0;
sc 1466 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 1475 dev/pci/pciide.c status = PCIIDE_DMACTL_READ(sc, chan);
sc 1511 dev/pci/pciide.c struct pciide_softc *sc = arg;
sc 1517 dev/pci/pciide.c for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
sc 1518 dev/pci/pciide.c cp = &sc->pciide_channels[i];
sc 1540 dev/pci/pciide.c pciide_dmacmd_read(struct pciide_softc *sc, int chan)
sc 1542 dev/pci/pciide.c return (bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 1547 dev/pci/pciide.c pciide_dmacmd_write(struct pciide_softc *sc, int chan, u_int8_t val)
sc 1549 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 1554 dev/pci/pciide.c pciide_dmactl_read(struct pciide_softc *sc, int chan)
sc 1556 dev/pci/pciide.c return (bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 1561 dev/pci/pciide.c pciide_dmactl_write(struct pciide_softc *sc, int chan, u_int8_t val)
sc 1563 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 1568 dev/pci/pciide.c pciide_dmatbl_write(struct pciide_softc *sc, int chan, u_int32_t val)
sc 1570 dev/pci/pciide.c bus_space_write_4(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 1578 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 1589 dev/pci/pciide.c sc->sc_dma_ok == 0) {
sc 1593 dev/pci/pciide.c if (pciide_dma_table_setup(sc, cp->wdc_channel.channel, drive)
sc 1603 dev/pci/pciide.c pciide_dma_table_setup(struct pciide_softc *sc, int channel, int drive)
sc 1610 dev/pci/pciide.c &sc->pciide_channels[channel].dma_maps[drive];
sc 1617 dev/pci/pciide.c if ((error = bus_dmamem_alloc(sc->sc_dmat, dma_table_size,
sc 1621 dev/pci/pciide.c "drive %d, error=%d\n", sc->sc_wdcdev.sc_dev.dv_xname,
sc 1626 dev/pci/pciide.c if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
sc 1631 dev/pci/pciide.c "drive %d, error=%d\n", sc->sc_wdcdev.sc_dev.dv_xname,
sc 1641 dev/pci/pciide.c if ((error = bus_dmamap_create(sc->sc_dmat, dma_table_size,
sc 1645 dev/pci/pciide.c "drive %d, error=%d\n", sc->sc_wdcdev.sc_dev.dv_xname,
sc 1649 dev/pci/pciide.c if ((error = bus_dmamap_load(sc->sc_dmat,
sc 1654 dev/pci/pciide.c "drive %d, error=%d\n", sc->sc_wdcdev.sc_dev.dv_xname,
sc 1661 dev/pci/pciide.c if ((error = bus_dmamap_create(sc->sc_dmat, IDEDMA_BYTE_COUNT_MAX,
sc 1662 dev/pci/pciide.c NIDEDMA_TABLES, sc->sc_dma_maxsegsz, sc->sc_dma_boundary,
sc 1666 dev/pci/pciide.c "drive %d, error=%d\n", sc->sc_wdcdev.sc_dev.dv_xname,
sc 1677 dev/pci/pciide.c struct pciide_softc *sc = v;
sc 1679 dev/pci/pciide.c struct pciide_channel *cp = &sc->pciide_channels[channel];
sc 1681 dev/pci/pciide.c &sc->pciide_channels[channel].dma_maps[drive];
sc 1686 dev/pci/pciide.c error = bus_dmamap_load(sc->sc_dmat,
sc 1691 dev/pci/pciide.c "drive %d, error=%d\n", sc->sc_wdcdev.sc_dev.dv_xname,
sc 1696 dev/pci/pciide.c bus_dmamap_sync(sc->sc_dmat, dma_maps->dmamap_xfer, 0,
sc 1729 dev/pci/pciide.c bus_dmamap_sync(sc->sc_dmat, dma_maps->dmamap_table, 0,
sc 1743 dev/pci/pciide.c PCIIDE_DMACTL_WRITE(sc, channel, PCIIDE_DMACTL_READ(sc, channel));
sc 1745 dev/pci/pciide.c PCIIDE_DMATBL_WRITE(sc, channel,
sc 1748 dev/pci/pciide.c PCIIDE_DMACMD_WRITE(sc, channel,
sc 1758 dev/pci/pciide.c struct pciide_softc *sc = v;
sc 1761 dev/pci/pciide.c PCIIDE_DMACMD_WRITE(sc, channel, PCIIDE_DMACMD_READ(sc, channel) |
sc 1764 dev/pci/pciide.c sc->pciide_channels[channel].dma_in_progress = 1;
sc 1770 dev/pci/pciide.c struct pciide_softc *sc = v;
sc 1771 dev/pci/pciide.c struct pciide_channel *cp = &sc->pciide_channels[channel];
sc 1775 dev/pci/pciide.c &sc->pciide_channels[channel].dma_maps[drive];
sc 1777 dev/pci/pciide.c status = PCIIDE_DMACTL_READ(sc, channel);
sc 1787 dev/pci/pciide.c PCIIDE_DMACMD_WRITE(sc, channel,
sc 1792 dev/pci/pciide.c bus_dmamap_sync(sc->sc_dmat, dma_maps->dmamap_xfer, 0,
sc 1796 dev/pci/pciide.c bus_dmamap_unload(sc->sc_dmat, dma_maps->dmamap_xfer);
sc 1799 dev/pci/pciide.c PCIIDE_DMACTL_WRITE(sc, channel, status);
sc 1803 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, channel, drive, status);
sc 1809 dev/pci/pciide.c "status=0x%x\n", sc->sc_wdcdev.sc_dev.dv_xname, channel,
sc 1820 dev/pci/pciide.c sc->pciide_channels[channel].dma_in_progress = 0;
sc 1828 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 1832 dev/pci/pciide.c PCIIDE_DMACTL_WRITE(sc, chan, PCIIDE_DMACTL_READ(sc, chan));
sc 1837 dev/pci/pciide.c pciide_chansetup(struct pciide_softc *sc, int channel, pcireg_t interface)
sc 1839 dev/pci/pciide.c struct pciide_channel *cp = &sc->pciide_channels[channel];
sc 1840 dev/pci/pciide.c sc->wdc_chanarray[channel] = &cp->wdc_channel;
sc 1843 dev/pci/pciide.c cp->wdc_channel.wdc = &sc->sc_wdcdev;
sc 1849 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 1885 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 1891 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 1906 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 1913 dev/pci/pciide.c cp->ih = pciide_machdep_compat_intr_establish(&sc->sc_wdcdev.sc_dev,
sc 1917 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 1961 dev/pci/pciide.c default_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 1974 dev/pci/pciide.c if (sc->sc_pp == &default_product_desc &&
sc 1975 dev/pci/pciide.c (sc->sc_wdcdev.sc_dev.dv_cfdata->cf_flags &
sc 1978 dev/pci/pciide.c sc->sc_dma_ok = 0;
sc 1980 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 1981 dev/pci/pciide.c if (sc->sc_dma_ok != 0)
sc 1986 dev/pci/pciide.c sc->sc_dma_ok = 0;
sc 1988 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 1989 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
sc 1990 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 1992 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 0;
sc 1993 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 0;
sc 1994 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 1995 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 1996 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16;
sc 1998 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 2000 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 2001 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 2002 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 2031 dev/pci/pciide.c csr = pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 2033 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG,
sc 2037 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag,
sc 2042 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name,
sc 2062 dev/pci/pciide.c if (sc->sc_dma_ok == 0)
sc 2066 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 2068 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 2076 dev/pci/pciide.c if (pciide_dma_table_setup(sc, channel, drive) != 0) {
sc 2080 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 2085 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 2091 dev/pci/pciide.c PCIIDE_DMACTL_WRITE(sc, channel, idedma_ctl);
sc 2097 dev/pci/pciide.c sata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 2112 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 2115 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 2116 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA |
sc 2118 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 2120 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 2121 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 2122 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 2124 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 2125 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 2126 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 2128 dev/pci/pciide.c sc->sc_wdcdev.set_modes = sata_setup_channel;
sc 2130 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 2131 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 2132 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 2147 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 2175 dev/pci/pciide.c PCIIDE_DMACTL_WRITE(sc, chp->channel, idedma_ctl);
sc 2181 dev/pci/pciide.c piix_timing_debug(struct pciide_softc *sc)
sc 2184 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_IDETIM)),
sc 2186 dev/pci/pciide.c if (sc->sc_pp->ide_product != PCI_PRODUCT_INTEL_82371FB_IDE &&
sc 2187 dev/pci/pciide.c sc->sc_pp->ide_product != PCI_PRODUCT_INTEL_82371FB_ISA) {
sc 2189 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_SIDETIM)),
sc 2191 dev/pci/pciide.c if (sc->sc_wdcdev.cap & WDC_CAPABILITY_UDMA) {
sc 2193 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_UDMAREG)),
sc 2196 dev/pci/pciide.c if (sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_6300ESB_IDE ||
sc 2197 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_6321ESB_IDE ||
sc 2198 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801AA_IDE ||
sc 2199 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801AB_IDE ||
sc 2200 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801BAM_IDE ||
sc 2201 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801BA_IDE ||
sc 2202 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801CAM_IDE ||
sc 2203 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801CA_IDE ||
sc 2204 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801DB_IDE ||
sc 2205 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801DBL_IDE ||
sc 2206 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801DBM_IDE ||
sc 2207 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801EB_IDE ||
sc 2208 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801FB_IDE ||
sc 2209 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801GB_IDE ||
sc 2210 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801HBM_IDE ||
sc 2211 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82372FB_IDE) {
sc 2213 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_CONFIG)),
sc 2221 dev/pci/pciide.c piix_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 2231 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 2232 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 2234 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 2235 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
sc 2236 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 2237 dev/pci/pciide.c switch (sc->sc_pp->ide_product) {
sc 2257 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
sc 2261 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 2262 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 2263 dev/pci/pciide.c switch (sc->sc_pp->ide_product) {
sc 2266 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 4;
sc 2281 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 5;
sc 2284 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 2;
sc 2288 dev/pci/pciide.c if (sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82371FB_IDE ||
sc 2289 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82371FB_ISA) {
sc 2290 dev/pci/pciide.c sc->sc_wdcdev.set_modes = piix_setup_channel;
sc 2292 dev/pci/pciide.c sc->sc_wdcdev.set_modes = piix3_4_setup_channel;
sc 2294 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 2295 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 2297 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 2299 dev/pci/pciide.c piix_timing_debug(sc);
sc 2301 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 2302 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 2305 dev/pci/pciide.c if (pciide_chansetup(sc, channel, 0) == 0)
sc 2307 dev/pci/pciide.c idetim = pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_IDETIM);
sc 2311 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 2324 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, PIIX_IDETIM,
sc 2329 dev/pci/pciide.c sc->sc_wdcdev.set_modes(&cp->wdc_channel);
sc 2335 dev/pci/pciide.c piix_timing_debug(sc);
sc 2339 dev/pci/pciide.c piixsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 2348 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 2350 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 2351 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA |
sc 2353 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 2354 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 2355 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 2357 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 2359 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 2360 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 2361 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 2363 dev/pci/pciide.c sc->sc_wdcdev.set_modes = sata_setup_channel;
sc 2365 dev/pci/pciide.c switch(sc->sc_pp->ide_product) {
sc 2388 dev/pci/pciide.c reg = pciide_pci_read(sc->sc_pc, sc->sc_tag, ICH5_SATA_MAP);
sc 2400 dev/pci/pciide.c reg = pciide_pci_read(sc->sc_pc, sc->sc_tag, ICH5_SATA_MAP) &
sc 2420 dev/pci/pciide.c reg = pciide_pci_read(sc->sc_pc, sc->sc_tag,
sc 2428 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 2430 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 2431 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 2432 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 2442 dev/pci/pciide.c sc->sc_wdcdev.set_modes(&cp->wdc_channel);
sc 2455 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 2458 dev/pci/pciide.c oidetim = pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_IDETIM);
sc 2549 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 2553 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, PIIX_IDETIM, idetim);
sc 2563 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 2567 dev/pci/pciide.c oidetim = pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_IDETIM);
sc 2568 dev/pci/pciide.c sidetim = pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_SIDETIM);
sc 2569 dev/pci/pciide.c udmareg = pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_UDMAREG);
sc 2570 dev/pci/pciide.c ideconf = pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_CONFIG);
sc 2596 dev/pci/pciide.c if (sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_6300ESB_IDE ||
sc 2597 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_6321ESB_IDE ||
sc 2598 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801AA_IDE ||
sc 2599 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801AB_IDE ||
sc 2600 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801BAM_IDE ||
sc 2601 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801BA_IDE ||
sc 2602 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801CAM_IDE ||
sc 2603 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801CA_IDE ||
sc 2604 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801DB_IDE ||
sc 2605 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801DBL_IDE ||
sc 2606 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801DBM_IDE ||
sc 2607 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801EB_IDE ||
sc 2608 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801FB_IDE ||
sc 2609 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801GB_IDE ||
sc 2610 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801HBM_IDE ||
sc 2611 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82372FB_IDE) {
sc 2614 dev/pci/pciide.c if (sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_6300ESB_IDE ||
sc 2615 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_6321ESB_IDE ||
sc 2616 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801BAM_IDE ||
sc 2617 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801BA_IDE||
sc 2618 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801CAM_IDE||
sc 2619 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801CA_IDE ||
sc 2620 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801DB_IDE ||
sc 2621 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801DBL_IDE ||
sc 2622 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801DBM_IDE ||
sc 2623 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801EB_IDE ||
sc 2624 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801FB_IDE ||
sc 2625 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801GB_IDE ||
sc 2626 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801HBM_IDE) {
sc 2644 dev/pci/pciide.c if (sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82801AA_IDE ||
sc 2645 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_INTEL_82372FB_IDE) {
sc 2692 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 2696 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, PIIX_IDETIM, idetim);
sc 2697 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, PIIX_SIDETIM, sidetim);
sc 2698 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, PIIX_UDMAREG, udmareg);
sc 2699 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, PIIX_CONFIG, ideconf);
sc 2789 dev/pci/pciide.c amd756_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 2798 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 2799 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 2801 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 2802 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
sc 2803 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 2804 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 2806 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 2807 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 2808 dev/pci/pciide.c switch (sc->sc_pp->ide_product) {
sc 2810 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 2814 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 5;
sc 2817 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 4;
sc 2820 dev/pci/pciide.c sc->sc_wdcdev.set_modes = amd756_setup_channel;
sc 2821 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 2822 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 2823 dev/pci/pciide.c chanenable = pci_conf_read(sc->sc_pc, sc->sc_tag, AMD756_CHANSTATUS_EN);
sc 2825 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 2827 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 2828 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 2829 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 2834 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 2854 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, AMD756_CHANSTATUS_EN,
sc 2867 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 2870 dev/pci/pciide.c int product = sc->sc_pp->ide_product;
sc 2871 dev/pci/pciide.c int rev = sc->sc_rev;
sc 2875 dev/pci/pciide.c datatim_reg = pci_conf_read(sc->sc_pc, sc->sc_tag, AMD756_DATATIM);
sc 2876 dev/pci/pciide.c udmatim_reg = pci_conf_read(sc->sc_pc, sc->sc_tag, AMD756_UDMA);
sc 2879 dev/pci/pciide.c chanenable = pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 2906 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 2930 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 2962 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 2967 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, AMD756_DATATIM, datatim_reg);
sc 2968 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, AMD756_UDMA, udmatim_reg);
sc 2972 dev/pci/pciide.c apollo_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 2995 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 3002 dev/pci/pciide.c id = pci_conf_read(sc->sc_pc, tag, PCI_ID_REG);
sc 3003 dev/pci/pciide.c class = pci_conf_read(sc->sc_pc, tag, PCI_CLASS_REG);
sc 3012 dev/pci/pciide.c id = pci_conf_read(sc->sc_pc, tag, PCI_ID_REG);
sc 3013 dev/pci/pciide.c class = pci_conf_read(sc->sc_pc, tag, PCI_CLASS_REG);
sc 3020 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 2;
sc 3023 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 0;
sc 3029 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 4;
sc 3032 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 2;
sc 3039 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 5;
sc 3042 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 4;
sc 3048 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 5;
sc 3054 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 3058 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 0;
sc 3063 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 3064 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 3066 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 3067 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
sc 3068 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 3069 dev/pci/pciide.c if (sc->sc_wdcdev.UDMA_cap > 0)
sc 3070 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
sc 3072 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 3073 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 3074 dev/pci/pciide.c sc->sc_wdcdev.set_modes = apollo_setup_channel;
sc 3075 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 3076 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 3078 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 3082 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, APO_IDECONF),
sc 3083 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, APO_CTLMISC),
sc 3084 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, APO_DATATIM),
sc 3085 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, APO_UDMA)),
sc 3088 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 3089 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 3090 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 3093 dev/pci/pciide.c ideconf = pci_conf_read(sc->sc_pc, sc->sc_tag, APO_IDECONF);
sc 3096 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 3110 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, APO_IDECONF,
sc 3116 dev/pci/pciide.c apollo_setup_channel(&sc->pciide_channels[channel].wdc_channel);
sc 3122 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, APO_DATATIM),
sc 3123 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, APO_UDMA)), DEBUG_PROBE);
sc 3134 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 3137 dev/pci/pciide.c datatim_reg = pci_conf_read(sc->sc_pc, sc->sc_tag, APO_DATATIM);
sc 3138 dev/pci/pciide.c udmatim_reg = pci_conf_read(sc->sc_pc, sc->sc_tag, APO_UDMA);
sc 3180 dev/pci/pciide.c if (sc->sc_wdcdev.UDMA_cap == 6) {
sc 3183 dev/pci/pciide.c } else if (sc->sc_wdcdev.UDMA_cap == 5) {
sc 3187 dev/pci/pciide.c } else if (sc->sc_wdcdev.UDMA_cap == 4) {
sc 3227 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 3232 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, APO_DATATIM, datatim_reg);
sc 3233 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, APO_UDMA, udmatim_reg);
sc 3237 dev/pci/pciide.c cmd_channel_map(struct pci_attach_args *pa, struct pciide_softc *sc,
sc 3240 dev/pci/pciide.c struct pciide_channel *cp = &sc->pciide_channels[channel];
sc 3242 dev/pci/pciide.c u_int8_t ctrl = pciide_pci_read(sc->sc_pc, sc->sc_tag, CMD_CTRL);
sc 3261 dev/pci/pciide.c sc->wdc_chanarray[channel] = &cp->wdc_channel;
sc 3264 dev/pci/pciide.c cp->wdc_channel.wdc = &sc->sc_wdcdev;
sc 3269 dev/pci/pciide.c switch (sc->sc_pp->ide_product) {
sc 3280 dev/pci/pciide.c sc->pciide_channels[0].wdc_channel.ch_queue;
sc 3288 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 3299 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 3324 dev/pci/pciide.c struct pciide_softc *sc = arg;
sc 3331 dev/pci/pciide.c priirq = pciide_pci_read(sc->sc_pc, sc->sc_tag, CMD_CONF);
sc 3332 dev/pci/pciide.c secirq = pciide_pci_read(sc->sc_pc, sc->sc_tag, CMD_ARTTIM23);
sc 3333 dev/pci/pciide.c for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
sc 3334 dev/pci/pciide.c cp = &sc->pciide_channels[i];
sc 3345 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, i);
sc 3355 dev/pci/pciide.c cmd_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 3361 dev/pci/pciide.c sc->sc_dma_ok = 0;
sc 3363 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 3364 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 3365 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16;
sc 3367 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 3369 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 3370 dev/pci/pciide.c cmd_channel_map(pa, sc, channel);
sc 3375 dev/pci/pciide.c cmd0643_9_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 3379 dev/pci/pciide.c int rev = sc->sc_rev;
sc 3398 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 3399 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 3401 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 3402 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
sc 3403 dev/pci/pciide.c switch (sc->sc_pp->ide_product) {
sc 3405 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
sc 3406 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 5;
sc 3407 dev/pci/pciide.c sc->sc_wdcdev.irqack = cmd646_9_irqack;
sc 3410 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
sc 3411 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 4;
sc 3412 dev/pci/pciide.c sc->sc_wdcdev.irqack = cmd646_9_irqack;
sc 3416 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
sc 3417 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 2;
sc 3425 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
sc 3426 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 2;
sc 3429 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag,
sc 3431 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag,
sc 3434 dev/pci/pciide.c sc->sc_wdcdev.irqack = cmd646_9_irqack;
sc 3437 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 3441 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 3442 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 3443 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 3444 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 3445 dev/pci/pciide.c sc->sc_wdcdev.set_modes = cmd0643_9_setup_channel;
sc 3447 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 3450 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, 0x54),
sc 3451 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, 0x58)),
sc 3453 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 3454 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 3455 dev/pci/pciide.c cmd_channel_map(pa, sc, channel);
sc 3464 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, CMD_DMA_MODE, CMD_DMA_MULTIPLE);
sc 3466 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, 0x54),
sc 3467 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, 0x58)),
sc 3479 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 3496 dev/pci/pciide.c udma_reg = pciide_pci_read(sc->sc_pc,
sc 3497 dev/pci/pciide.c sc->sc_tag, CMD_UDMATIM(chp->channel));
sc 3499 dev/pci/pciide.c (pciide_pci_read(sc->sc_pc, sc->sc_tag,
sc 3505 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 3511 dev/pci/pciide.c else if (sc->sc_wdcdev.UDMA_cap > 2)
sc 3519 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag,
sc 3528 dev/pci/pciide.c if (sc->sc_wdcdev.cap & WDC_CAPABILITY_UDMA) {
sc 3529 dev/pci/pciide.c udma_reg = pciide_pci_read(sc->sc_pc,
sc 3530 dev/pci/pciide.c sc->sc_tag,
sc 3533 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag,
sc 3545 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag,
sc 3550 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 3572 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 3575 dev/pci/pciide.c priirq = pciide_pci_read(sc->sc_pc, sc->sc_tag, CMD_CONF);
sc 3576 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, CMD_CONF, priirq);
sc 3578 dev/pci/pciide.c secirq = pciide_pci_read(sc->sc_pc, sc->sc_tag, CMD_ARTTIM23);
sc 3579 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, CMD_ARTTIM23, secirq);
sc 3585 dev/pci/pciide.c cmd680_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 3591 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 3592 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 3594 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 3596 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 3597 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
sc 3598 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
sc 3599 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 3600 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 3603 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 3604 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 3605 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 3606 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 3607 dev/pci/pciide.c sc->sc_wdcdev.set_modes = cmd680_setup_channel;
sc 3609 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, 0x80, 0x00);
sc 3610 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, 0x84, 0x00);
sc 3611 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, 0x8a,
sc 3612 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, 0x8a) | 0x01);
sc 3613 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 3614 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 3615 dev/pci/pciide.c cmd680_channel_map(pa, sc, channel);
sc 3623 dev/pci/pciide.c cmd680_channel_map(struct pci_attach_args *pa, struct pciide_softc *sc,
sc 3626 dev/pci/pciide.c struct pciide_channel *cp = &sc->pciide_channels[channel];
sc 3642 dev/pci/pciide.c sc->wdc_chanarray[channel] = &cp->wdc_channel;
sc 3645 dev/pci/pciide.c cp->wdc_channel.wdc = &sc->sc_wdcdev;
sc 3652 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 3659 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, reg + i, init_val[i]);
sc 3662 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name,
sc 3683 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 3684 dev/pci/pciide.c pci_chipset_tag_t pc = sc->sc_pc;
sc 3685 dev/pci/pciide.c pcitag_t pa = sc->sc_tag;
sc 3746 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 3764 dev/pci/pciide.c sii_fixup_cacheline(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 3781 dev/pci/pciide.c reg40 = ba5_read_4(sc, 0x40);
sc 3782 dev/pci/pciide.c reg44 = ba5_read_4(sc, 0x44);
sc 3784 dev/pci/pciide.c ba5_write_4(sc, 0x40, (reg40 & ~0x07) | cls);
sc 3786 dev/pci/pciide.c ba5_write_4(sc, 0x44, (reg44 & ~0x07) | cls);
sc 3790 dev/pci/pciide.c sii3112_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 3796 dev/pci/pciide.c struct pciide_satalink *sl = sc->sc_cookie;
sc 3799 dev/pci/pciide.c sc->sc_cookie = malloc(sizeof(struct pciide_satalink), M_DEVBUF,
sc 3801 dev/pci/pciide.c sl = sc->sc_cookie;
sc 3837 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 3846 dev/pci/pciide.c if (sc->sc_rev <= 0x01) {
sc 3847 dev/pci/pciide.c sc->sc_dma_maxsegsz = 8192;
sc 3848 dev/pci/pciide.c sc->sc_dma_boundary = 8192;
sc 3851 dev/pci/pciide.c sii_fixup_cacheline(sc, pa);
sc 3853 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32;
sc 3854 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 3855 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 3856 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
sc 3857 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 3858 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 3859 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 3860 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 3862 dev/pci/pciide.c sc->sc_wdcdev.set_modes = sii3112_setup_channel;
sc 3865 dev/pci/pciide.c sc->sc_wdcdev.drv_probe = sii3112_drv_probe;
sc 3867 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 3868 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 3882 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 3883 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 3884 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 3890 dev/pci/pciide.c sc->sc_wdcdev.set_modes(&cp->wdc_channel);
sc 3901 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 3934 dev/pci/pciide.c PCIIDE_DMACTL_WRITE(sc, chp->channel, idedma_ctl);
sc 3936 dev/pci/pciide.c BA5_WRITE_4(sc, chp->channel, ba5_IDE_DTM, dtm);
sc 3944 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 3974 dev/pci/pciide.c BA5_WRITE_4(sc, chp->channel, ba5_SControl, scontrol);
sc 3977 dev/pci/pciide.c BA5_WRITE_4(sc, chp->channel, ba5_SControl, scontrol);
sc 3980 dev/pci/pciide.c sstatus = BA5_READ_4(sc, chp->channel, ba5_SStatus);
sc 3983 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel, sstatus,
sc 3984 dev/pci/pciide.c BA5_READ_4(sc, chp->channel, ba5_SControl));
sc 3994 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
sc 3999 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
sc 4033 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel,
sc 4048 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
sc 4062 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel, sstatus);
sc 4067 dev/pci/pciide.c sii3114_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 4074 dev/pci/pciide.c struct pciide_satalink *sl = sc->sc_cookie;
sc 4077 dev/pci/pciide.c sc->sc_cookie = malloc(sizeof(struct pciide_satalink), M_DEVBUF,
sc 4079 dev/pci/pciide.c sl = sc->sc_cookie;
sc 4126 dev/pci/pciide.c BA5_WRITE_4(sc, 2, ba5_IDEDMA_CMD, IDEDMA_CMD_INT_STEER);
sc 4129 dev/pci/pciide.c sii3114_mapreg_dma(sc, pa);
sc 4132 dev/pci/pciide.c sii_fixup_cacheline(sc, pa);
sc 4134 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32;
sc 4135 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 4136 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 4137 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
sc 4138 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 4139 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 4140 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 4141 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 4143 dev/pci/pciide.c sc->sc_wdcdev.set_modes = sii3112_setup_channel;
sc 4146 dev/pci/pciide.c sc->sc_wdcdev.drv_probe = sii3112_drv_probe;
sc 4148 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 4149 dev/pci/pciide.c sc->sc_wdcdev.nchannels = 4;
sc 4154 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 4158 dev/pci/pciide.c sc->sc_pci_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO,
sc 4160 dev/pci/pciide.c pciide_pci_intr, sc,
sc 4161 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 4162 dev/pci/pciide.c if (sc->sc_pci_ih != NULL) {
sc 4164 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 4168 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 4175 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 4176 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 4177 dev/pci/pciide.c if (sii3114_chansetup(sc, channel) == 0)
sc 4182 dev/pci/pciide.c sc->sc_wdcdev.set_modes(&cp->wdc_channel);
sc 4187 dev/pci/pciide.c sii3114_mapreg_dma(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 4192 dev/pci/pciide.c struct pciide_satalink *sl = sc->sc_cookie;
sc 4194 dev/pci/pciide.c sc->sc_wdcdev.dma_arg = sc;
sc 4195 dev/pci/pciide.c sc->sc_wdcdev.dma_init = pciide_dma_init;
sc 4196 dev/pci/pciide.c sc->sc_wdcdev.dma_start = pciide_dma_start;
sc 4197 dev/pci/pciide.c sc->sc_wdcdev.dma_finish = pciide_dma_finish;
sc 4204 dev/pci/pciide.c sc->sc_dma_iot = sl->ba5_st;
sc 4206 dev/pci/pciide.c pc = &sc->pciide_channels[chan];
sc 4215 dev/pci/pciide.c sc->sc_dma_ok = 0;
sc 4226 dev/pci/pciide.c sc->sc_dmacmd_read = sii3114_dmacmd_read;
sc 4227 dev/pci/pciide.c sc->sc_dmacmd_write = sii3114_dmacmd_write;
sc 4228 dev/pci/pciide.c sc->sc_dmactl_read = sii3114_dmactl_read;
sc 4229 dev/pci/pciide.c sc->sc_dmactl_write = sii3114_dmactl_write;
sc 4230 dev/pci/pciide.c sc->sc_dmatbl_write = sii3114_dmatbl_write;
sc 4233 dev/pci/pciide.c sc->sc_dmat = pa->pa_dmat;
sc 4234 dev/pci/pciide.c sc->sc_dma_ok = 1;
sc 4238 dev/pci/pciide.c sii3114_chansetup(struct pciide_softc *sc, int channel)
sc 4246 dev/pci/pciide.c struct pciide_channel *cp = &sc->pciide_channels[channel];
sc 4248 dev/pci/pciide.c sc->wdc_chanarray[channel] = &cp->wdc_channel;
sc 4259 dev/pci/pciide.c cp->wdc_channel.wdc = &sc->sc_wdcdev;
sc 4265 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 4275 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 4276 dev/pci/pciide.c struct pciide_satalink *sl = sc->sc_cookie;
sc 4282 dev/pci/pciide.c cp->ih = sc->sc_pci_ih;
sc 4289 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 4298 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 4310 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 4329 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 4330 dev/pci/pciide.c struct pciide_satalink *sl = sc->sc_cookie;
sc 4344 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 4345 dev/pci/pciide.c struct pciide_satalink *sl = sc->sc_cookie;
sc 4357 dev/pci/pciide.c sii3114_dmacmd_read(struct pciide_softc *sc, int chan)
sc 4359 dev/pci/pciide.c struct pciide_satalink *sl = sc->sc_cookie;
sc 4361 dev/pci/pciide.c return (bus_space_read_1(sc->sc_dma_iot,
sc 4366 dev/pci/pciide.c sii3114_dmacmd_write(struct pciide_softc *sc, int chan, u_int8_t val)
sc 4368 dev/pci/pciide.c struct pciide_satalink *sl = sc->sc_cookie;
sc 4370 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot,
sc 4375 dev/pci/pciide.c sii3114_dmactl_read(struct pciide_softc *sc, int chan)
sc 4377 dev/pci/pciide.c struct pciide_satalink *sl = sc->sc_cookie;
sc 4379 dev/pci/pciide.c return (bus_space_read_1(sc->sc_dma_iot,
sc 4384 dev/pci/pciide.c sii3114_dmactl_write(struct pciide_softc *sc, int chan, u_int8_t val)
sc 4386 dev/pci/pciide.c struct pciide_satalink *sl = sc->sc_cookie;
sc 4388 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot,
sc 4393 dev/pci/pciide.c sii3114_dmatbl_write(struct pciide_softc *sc, int chan, u_int32_t val)
sc 4395 dev/pci/pciide.c struct pciide_satalink *sl = sc->sc_cookie;
sc 4397 dev/pci/pciide.c bus_space_write_4(sc->sc_dma_iot,
sc 4402 dev/pci/pciide.c cy693_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 4410 dev/pci/pciide.c sc->sc_cookie = malloc(sizeof(struct pciide_cy), M_DEVBUF, M_NOWAIT);
sc 4411 dev/pci/pciide.c cy = sc->sc_cookie;
sc 4430 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 4433 dev/pci/pciide.c sc->sc_dma_ok = 0;
sc 4439 dev/pci/pciide.c sc->sc_dma_ok = 0;
sc 4442 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 4444 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 4445 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
sc 4446 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 4448 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 4449 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 4450 dev/pci/pciide.c sc->sc_wdcdev.set_modes = cy693_setup_channel;
sc 4452 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 4453 dev/pci/pciide.c sc->sc_wdcdev.nchannels = 1;
sc 4456 dev/pci/pciide.c cp = &sc->pciide_channels[0];
sc 4457 dev/pci/pciide.c sc->wdc_chanarray[0] = &cp->wdc_channel;
sc 4460 dev/pci/pciide.c cp->wdc_channel.wdc = &sc->sc_wdcdev;
sc 4487 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag,
sc 4497 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, CY_CMD_CTRL)), DEBUG_PROBE);
sc 4500 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, CY_CMD_CTRL)), DEBUG_PROBE);
sc 4511 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 4513 dev/pci/pciide.c struct pciide_cy *cy = sc->sc_cookie;
sc 4541 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, CY_CMD_CTRL, cy_cmd_ctrl);
sc 4559 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 4654 dev/pci/pciide.c sis_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 4658 dev/pci/pciide.c u_int8_t sis_ctr0 = pciide_pci_read(sc->sc_pc, sc->sc_tag, SIS_CTRL0);
sc 4660 dev/pci/pciide.c int rev = sc->sc_rev;
sc 4667 dev/pci/pciide.c sc->sc_cookie = malloc(sizeof(struct pciide_sis), M_DEVBUF, M_NOWAIT);
sc 4668 dev/pci/pciide.c sis = sc->sc_cookie;
sc 4673 dev/pci/pciide.c br_pa.pa_id = pci_conf_read(sc->sc_pc, br_tag, PCI_ID_REG);
sc 4674 dev/pci/pciide.c br_pa.pa_class = pci_conf_read(sc->sc_pc, br_tag, PCI_CLASS_REG);
sc 4680 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, SIS_REG_57,
sc 4681 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag,
sc 4683 dev/pci/pciide.c if (sc->sc_pp->ide_product == SIS_PRODUCT_5518) {
sc 4685 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap =
sc 4691 dev/pci/pciide.c br_pa.pa_id = pci_conf_read(sc->sc_pc,
sc 4693 dev/pci/pciide.c br_pa.pa_class = pci_conf_read(sc->sc_pc,
sc 4702 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap =
sc 4706 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap =
sc 4712 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap =
sc 4719 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 2;
sc 4722 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 0;
sc 4728 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 4730 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 4732 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 4733 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
sc 4734 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 4736 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
sc 4739 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 4740 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 4742 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 4743 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 4748 dev/pci/pciide.c sc->sc_wdcdev.set_modes = sis_setup_channel;
sc 4749 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, SIS_MISC,
sc 4750 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, SIS_MISC) |
sc 4755 dev/pci/pciide.c sc->sc_wdcdev.set_modes = sis_setup_channel;
sc 4756 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, SIS_REG_49,
sc 4757 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, SIS_REG_49) | 0x01);
sc 4760 dev/pci/pciide.c sc->sc_wdcdev.set_modes = sis96x_setup_channel;
sc 4761 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, SIS_REG_50,
sc 4762 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, SIS_REG_50) & 0xf7);
sc 4763 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, SIS_REG_52,
sc 4764 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, SIS_REG_52) & 0xf7);
sc 4768 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 4770 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 4771 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 4772 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 4777 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 4794 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, SIS_CTRL0,
sc 4801 dev/pci/pciide.c sc->sc_wdcdev.set_modes(&cp->wdc_channel);
sc 4814 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 4823 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, SIS_REG_57),
sc 4833 dev/pci/pciide.c if (pciide_pci_read(sc->sc_pc, sc->sc_tag,
sc 4860 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, regtim, sis_tim);
sc 4864 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 4878 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 4879 dev/pci/pciide.c struct pciide_sis *sis = sc->sc_cookie;
sc 4883 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, SIS_TIM(chp->channel))),
sc 4903 dev/pci/pciide.c if (pciide_pci_read(sc->sc_pc, sc->sc_tag,
sc 4966 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, SIS_TIM(chp->channel), sis_tim);
sc 4969 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 4976 dev/pci/pciide.c natsemi_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 4984 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 4985 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16;
sc 4987 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 4988 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
sc 4989 dev/pci/pciide.c sc->sc_wdcdev.irqack = natsemi_irqack;
sc 4992 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, NATSEMI_CCBT, 0xb7);
sc 4998 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, NATSEMI_CTRL2,
sc 4999 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, NATSEMI_CTRL2) |
sc 5002 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 5003 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 5004 dev/pci/pciide.c sc->sc_wdcdev.set_modes = natsemi_setup_channel;
sc 5005 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 5006 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 5008 dev/pci/pciide.c interface = PCI_INTERFACE(pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 5011 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 5014 dev/pci/pciide.c ctl = pciide_pci_read(sc->sc_pc, sc->sc_tag, NATSEMI_CTRL1);
sc 5019 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, NATSEMI_CTRL1, ctl);
sc 5021 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 5022 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 5023 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 5047 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 5079 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag,
sc 5081 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag,
sc 5086 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5091 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, NATSEMI_CTRL2,
sc 5092 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, NATSEMI_CTRL2) &
sc 5099 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5101 dev/pci/pciide.c bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5109 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 5113 dev/pci/pciide.c clr = bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5115 dev/pci/pciide.c clr |= bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5118 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5125 dev/pci/pciide.c struct pciide_softc *sc = arg;
sc 5132 dev/pci/pciide.c msk = pciide_pci_read(sc->sc_pc, sc->sc_tag, NATSEMI_CTRL2);
sc 5133 dev/pci/pciide.c for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
sc 5134 dev/pci/pciide.c cp = &sc->pciide_channels[i];
sc 5160 dev/pci/pciide.c ns_scx200_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 5168 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 5170 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 5172 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 5173 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
sc 5174 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 5175 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 5177 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 5178 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 5179 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 2;
sc 5181 dev/pci/pciide.c sc->sc_wdcdev.set_modes = ns_scx200_setup_channel;
sc 5182 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 5183 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 5195 dev/pci/pciide.c if (sc->sc_pp->ide_product == PCI_PRODUCT_NS_SCx200_IDE) {
sc 5196 dev/pci/pciide.c sc->sc_dma_maxsegsz = IDEDMA_BYTE_COUNT_MAX - PAGE_SIZE;
sc 5197 dev/pci/pciide.c sc->sc_dma_boundary = IDEDMA_BYTE_COUNT_MAX - PAGE_SIZE;
sc 5204 dev/pci/pciide.c sc->sc_wdcdev.quirks = WDC_QUIRK_NOSHORTDMA;
sc 5206 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 5208 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 5209 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 5210 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 5221 dev/pci/pciide.c sc->sc_wdcdev.set_modes(&cp->wdc_channel);
sc 5232 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 5242 dev/pci/pciide.c pioformat = (pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 5255 dev/pci/pciide.c piotim = pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 5257 dev/pci/pciide.c dmatim = pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 5260 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, channel, drive,
sc 5296 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, channel, drive,
sc 5299 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag,
sc 5301 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag,
sc 5307 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5315 dev/pci/pciide.c acer_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 5321 dev/pci/pciide.c int rev = sc->sc_rev;
sc 5324 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 5325 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 5328 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 5329 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
sc 5331 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA;
sc 5333 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 5;
sc 5335 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 4;
sc 5337 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 2;
sc 5339 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 5340 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 5343 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 5344 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 5345 dev/pci/pciide.c sc->sc_wdcdev.set_modes = acer_setup_channel;
sc 5346 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 5347 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 5349 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, ACER_CDRC,
sc 5350 dev/pci/pciide.c (pciide_pci_read(sc->sc_pc, sc->sc_tag, ACER_CDRC) |
sc 5354 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, ACER_CCAR3,
sc 5355 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, ACER_CCAR3) | ACER_CCAR3_PI);
sc 5356 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, ACER_CCAR1,
sc 5357 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, ACER_CCAR1) &
sc 5359 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, ACER_CCAR2,
sc 5360 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, ACER_CCAR2) &
sc 5362 dev/pci/pciide.c cr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_CLASS_REG);
sc 5364 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_CLASS_REG, cr);
sc 5366 dev/pci/pciide.c interface = PCI_INTERFACE(pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 5369 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 5373 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, ACER_0x4B,
sc 5374 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, ACER_0x4B)
sc 5377 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 5378 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 5379 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 5383 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 5397 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag,
sc 5416 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 5419 dev/pci/pciide.c acer_fifo_udma = pci_conf_read(sc->sc_pc, sc->sc_tag, ACER_FTH_UDMA);
sc 5427 dev/pci/pciide.c if (pciide_pci_read(sc->sc_pc, sc->sc_tag, ACER_0x4A) &
sc 5430 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel),
sc 5446 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag,
sc 5471 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag,
sc 5473 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag,
sc 5491 dev/pci/pciide.c pio: pciide_pci_write(sc->sc_pc, sc->sc_tag,
sc 5497 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, ACER_FTH_UDMA, acer_fifo_udma);
sc 5500 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5509 dev/pci/pciide.c struct pciide_softc *sc = arg;
sc 5516 dev/pci/pciide.c chids = pciide_pci_read(sc->sc_pc, sc->sc_tag, ACER_CHIDS);
sc 5517 dev/pci/pciide.c for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
sc 5518 dev/pci/pciide.c cp = &sc->pciide_channels[i];
sc 5527 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, i);
sc 5536 dev/pci/pciide.c hpt_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 5543 dev/pci/pciide.c revision = sc->sc_rev;
sc 5554 dev/pci/pciide.c if ((sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT366 &&
sc 5557 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT372A ||
sc 5558 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT302 ||
sc 5559 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT371 ||
sc 5560 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT374)
sc 5565 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 5567 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 5569 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 5570 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
sc 5571 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 5572 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 5574 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 5575 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 5577 dev/pci/pciide.c sc->sc_wdcdev.set_modes = hpt_setup_channel;
sc 5578 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 5579 dev/pci/pciide.c if (sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT366 &&
sc 5581 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 4;
sc 5593 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, pa->pa_function);
sc 5596 dev/pci/pciide.c sc->sc_wdcdev.nchannels = 1;
sc 5598 dev/pci/pciide.c sc->sc_wdcdev.nchannels = 2;
sc 5599 dev/pci/pciide.c if (sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT372A ||
sc 5600 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT302 ||
sc 5601 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT371 ||
sc 5602 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT374)
sc 5603 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 5604 dev/pci/pciide.c else if (sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT366) {
sc 5606 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 5608 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 5;
sc 5611 dev/pci/pciide.c for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
sc 5612 dev/pci/pciide.c cp = &sc->pciide_channels[i];
sc 5613 dev/pci/pciide.c if (sc->sc_wdcdev.nchannels > 1) {
sc 5615 dev/pci/pciide.c if((pciide_pci_read(sc->sc_pc, sc->sc_tag,
sc 5618 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 5622 dev/pci/pciide.c if (pciide_chansetup(sc, i, interface) == 0)
sc 5638 dev/pci/pciide.c if ((sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT366 &&
sc 5641 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT372A ||
sc 5642 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT302 ||
sc 5643 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT371 ||
sc 5644 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT374) {
sc 5648 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, HPT370_CTRL2(0),
sc 5649 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, HPT370_CTRL2(0)) &
sc 5651 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, HPT370_CTRL2(1),
sc 5652 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, HPT370_CTRL2(1)) &
sc 5659 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, HPT_CSEL,
sc 5660 dev/pci/pciide.c pciide_pci_read(sc->sc_pc, sc->sc_tag, HPT_CSEL) &
sc 5664 dev/pci/pciide.c if (sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT372A ||
sc 5665 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT302 ||
sc 5666 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT371 ||
sc 5667 dev/pci/pciide.c sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT374 ||
sc 5668 dev/pci/pciide.c (sc->sc_pp->ide_product == PCI_PRODUCT_TRIONES_HPT366 &&
sc 5670 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, HPT_SC2,
sc 5671 dev/pci/pciide.c (pciide_pci_read(sc->sc_pc, sc->sc_tag, HPT_SC2) &
sc 5686 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 5687 dev/pci/pciide.c int revision = sc->sc_rev;
sc 5690 dev/pci/pciide.c cable = pciide_pci_read(sc->sc_pc, sc->sc_tag, HPT_CSEL);
sc 5697 dev/pci/pciide.c switch (sc->sc_pp->ide_product) {
sc 5728 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 5738 dev/pci/pciide.c before = pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 5749 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 5771 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag,
sc 5774 dev/pci/pciide.c "(BIOS 0x%08x)\n", sc->sc_wdcdev.sc_dev.dv_xname,
sc 5780 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5789 dev/pci/pciide.c struct pciide_softc *sc = arg;
sc 5795 dev/pci/pciide.c for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
sc 5796 dev/pci/pciide.c dmastat = bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5801 dev/pci/pciide.c cp = &sc->pciide_channels[i];
sc 5806 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, i);
sc 5807 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5816 dev/pci/pciide.c #define PDC_IS_262(sc) \
sc 5817 dev/pci/pciide.c ((sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20262 || \
sc 5818 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20265 || \
sc 5819 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20267)
sc 5820 dev/pci/pciide.c #define PDC_IS_265(sc) \
sc 5821 dev/pci/pciide.c ((sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20265 || \
sc 5822 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20267 || \
sc 5823 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20268 || \
sc 5824 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20268R || \
sc 5825 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20269 || \
sc 5826 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20271 || \
sc 5827 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20275 || \
sc 5828 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20276 || \
sc 5829 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20277)
sc 5830 dev/pci/pciide.c #define PDC_IS_268(sc) \
sc 5831 dev/pci/pciide.c ((sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20268 || \
sc 5832 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20268R || \
sc 5833 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20269 || \
sc 5834 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20271 || \
sc 5835 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20275 || \
sc 5836 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20276 || \
sc 5837 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20277)
sc 5838 dev/pci/pciide.c #define PDC_IS_269(sc) \
sc 5839 dev/pci/pciide.c ((sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20269 || \
sc 5840 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20271 || \
sc 5841 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20275 || \
sc 5842 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20276 || \
sc 5843 dev/pci/pciide.c (sc)->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20277)
sc 5849 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 5852 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5854 dev/pci/pciide.c return (bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5863 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 5866 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5868 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5873 dev/pci/pciide.c pdc202xx_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 5880 dev/pci/pciide.c if (!PDC_IS_268(sc)) {
sc 5881 dev/pci/pciide.c st = pci_conf_read(sc->sc_pc, sc->sc_tag, PDC2xx_STATE);
sc 5887 dev/pci/pciide.c if (!PDC_IS_268(sc))
sc 5895 dev/pci/pciide.c if (PDC_IS_268(sc) || (st & PDC2xx_STATE_NATIVE))
sc 5899 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 5901 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 5903 dev/pci/pciide.c if (sc->sc_pp->ide_product == PCI_PRODUCT_PROMISE_PDC20246 ||
sc 5904 dev/pci/pciide.c PDC_IS_262(sc))
sc 5905 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_NO_ATAPI_DMA;
sc 5906 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 5907 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
sc 5908 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 5909 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 5911 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 5912 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 5913 dev/pci/pciide.c if (PDC_IS_269(sc))
sc 5914 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 5915 dev/pci/pciide.c else if (PDC_IS_265(sc))
sc 5916 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 5;
sc 5917 dev/pci/pciide.c else if (PDC_IS_262(sc))
sc 5918 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 4;
sc 5920 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 2;
sc 5921 dev/pci/pciide.c sc->sc_wdcdev.set_modes = PDC_IS_268(sc) ?
sc 5923 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 5924 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 5926 dev/pci/pciide.c if (PDC_IS_262(sc)) {
sc 5927 dev/pci/pciide.c sc->sc_wdcdev.dma_start = pdc20262_dma_start;
sc 5928 dev/pci/pciide.c sc->sc_wdcdev.dma_finish = pdc20262_dma_finish;
sc 5931 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 5932 dev/pci/pciide.c if (!PDC_IS_268(sc)) {
sc 5940 dev/pci/pciide.c channel < sc->sc_wdcdev.nchannels;
sc 5944 dev/pci/pciide.c channel, pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 5947 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag,
sc 5951 dev/pci/pciide.c channel, pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 5953 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag,
sc 5958 dev/pci/pciide.c if (PDC_IS_262(sc)) {
sc 5968 dev/pci/pciide.c bus_space_read_4(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5971 dev/pci/pciide.c bus_space_write_4(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 5977 dev/pci/pciide.c bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh, PDC2xx_PM);
sc 5980 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh, PDC2xx_PM,
sc 5983 dev/pci/pciide.c bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh, PDC2xx_SM);
sc 5985 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh, PDC2xx_SM,
sc 5989 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 5990 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 5991 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 5993 dev/pci/pciide.c if (!PDC_IS_268(sc) && (st & (PDC_IS_262(sc) ?
sc 5996 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 6002 dev/pci/pciide.c if (PDC_IS_265(sc))
sc 6012 dev/pci/pciide.c if (!PDC_IS_268(sc) && pciide_chan_candisable(cp)) {
sc 6013 dev/pci/pciide.c st &= ~(PDC_IS_262(sc) ?
sc 6017 dev/pci/pciide.c if (PDC_IS_268(sc))
sc 6022 dev/pci/pciide.c if (!PDC_IS_268(sc)) {
sc 6025 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, PDC2xx_STATE, st);
sc 6038 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 6046 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 6047 dev/pci/pciide.c bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh, PDC262_U66)),
sc 6051 dev/pci/pciide.c if (PDC_IS_262(sc)) {
sc 6052 dev/pci/pciide.c scr = bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 6054 dev/pci/pciide.c st = pci_conf_read(sc->sc_pc, sc->sc_tag, PDC2xx_STATE);
sc 6062 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, channel),
sc 6087 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 6090 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, channel,
sc 6091 dev/pci/pciide.c bus_space_read_4(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 6104 dev/pci/pciide.c bus_space_write_4(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 6146 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 6148 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag,
sc 6153 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 6166 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 6189 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 6200 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 6209 dev/pci/pciide.c struct pciide_softc *sc = arg;
sc 6216 dev/pci/pciide.c scr = bus_space_read_4(sc->sc_dma_iot, sc->sc_dma_ioh, PDC2xx_SCR);
sc 6217 dev/pci/pciide.c for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
sc 6218 dev/pci/pciide.c cp = &sc->pciide_channels[i];
sc 6227 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, i, scr);
sc 6238 dev/pci/pciide.c struct pciide_softc *sc = arg;
sc 6245 dev/pci/pciide.c for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
sc 6246 dev/pci/pciide.c cp = &sc->pciide_channels[i];
sc 6257 dev/pci/pciide.c if (cp->hw_ok && PDC_IS_268(sc)) {
sc 6269 dev/pci/pciide.c dmastat = bus_space_read_1(sc->sc_dma_iot,
sc 6270 dev/pci/pciide.c sc->sc_dma_ioh, IDEDMA_CTL(i));
sc 6277 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, i);
sc 6287 dev/pci/pciide.c struct pciide_softc *sc = v;
sc 6289 dev/pci/pciide.c &sc->pciide_channels[channel].dma_maps[drive];
sc 6294 dev/pci/pciide.c clock = bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 6296 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 6301 dev/pci/pciide.c bus_space_write_4(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 6311 dev/pci/pciide.c struct pciide_softc *sc = v;
sc 6313 dev/pci/pciide.c &sc->pciide_channels[channel].dma_maps[drive];
sc 6317 dev/pci/pciide.c clock = bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 6319 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 6321 dev/pci/pciide.c bus_space_write_4(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 6329 dev/pci/pciide.c pdcsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 6340 dev/pci/pciide.c sc->sc_cookie = malloc(sizeof(struct pciide_pdcsata), M_DEVBUF,
sc 6342 dev/pci/pciide.c ps = sc->sc_cookie;
sc 6355 dev/pci/pciide.c switch (sc->sc_pp->ide_product) {
sc 6365 dev/pci/pciide.c sc->sc_pci_ih = pci_intr_establish(pa->pa_pc,
sc 6366 dev/pci/pciide.c intrhandle, IPL_BIO, pdc203xx_pci_intr, sc,
sc 6367 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 6380 dev/pci/pciide.c sc->sc_pci_ih = pci_intr_establish(pa->pa_pc,
sc 6381 dev/pci/pciide.c intrhandle, IPL_BIO, pdc205xx_pci_intr, sc,
sc 6382 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 6386 dev/pci/pciide.c if (sc->sc_pci_ih == NULL) {
sc 6394 dev/pci/pciide.c sc->sc_dma_ok = (pci_mapreg_map(pa, PCIIDE_REG_BUS_MASTER_DMA,
sc 6395 dev/pci/pciide.c PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_dma_iot,
sc 6396 dev/pci/pciide.c &sc->sc_dma_ioh, NULL, &dmasize, 0) == 0);
sc 6397 dev/pci/pciide.c if (!sc->sc_dma_ok) {
sc 6399 dev/pci/pciide.c pci_intr_disestablish(pa->pa_pc, sc->sc_pci_ih);
sc 6403 dev/pci/pciide.c sc->sc_dmat = pa->pa_dmat;
sc 6409 dev/pci/pciide.c bus_space_unmap(sc->sc_dma_iot, sc->sc_dma_ioh, dmasize);
sc 6410 dev/pci/pciide.c pci_intr_disestablish(pa->pa_pc, sc->sc_pci_ih);
sc 6416 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16;
sc 6417 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
sc 6418 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 6419 dev/pci/pciide.c sc->sc_wdcdev.irqack = pdc203xx_irqack;
sc 6420 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 6421 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 6422 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 6423 dev/pci/pciide.c sc->sc_wdcdev.set_modes = pdc203xx_setup_channel;
sc 6424 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 6426 dev/pci/pciide.c switch (sc->sc_pp->ide_product) {
sc 6437 dev/pci/pciide.c sc->sc_wdcdev.nchannels =
sc 6449 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PDC40718_NCHANNELS;
sc 6451 dev/pci/pciide.c sc->sc_wdcdev.reset = pdc205xx_do_reset;
sc 6452 dev/pci/pciide.c sc->sc_wdcdev.drv_probe = pdc205xx_drv_probe;
sc 6460 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PDC20575_NCHANNELS;
sc 6462 dev/pci/pciide.c sc->sc_wdcdev.reset = pdc205xx_do_reset;
sc 6463 dev/pci/pciide.c sc->sc_wdcdev.drv_probe = pdc205xx_drv_probe;
sc 6468 dev/pci/pciide.c sc->sc_wdcdev.dma_arg = sc;
sc 6469 dev/pci/pciide.c sc->sc_wdcdev.dma_init = pciide_dma_init;
sc 6470 dev/pci/pciide.c sc->sc_wdcdev.dma_start = pdc203xx_dma_start;
sc 6471 dev/pci/pciide.c sc->sc_wdcdev.dma_finish = pdc203xx_dma_finish;
sc 6473 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels;
sc 6475 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 6476 dev/pci/pciide.c sc->wdc_chanarray[channel] = &cp->wdc_channel;
sc 6478 dev/pci/pciide.c cp->ih = sc->sc_pci_ih;
sc 6481 dev/pci/pciide.c cp->wdc_channel.wdc = &sc->sc_wdcdev;
sc 6487 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, channel);
sc 6499 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 6509 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 6535 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, channel);
sc 6543 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, channel);
sc 6548 dev/pci/pciide.c bus_space_write_4(sc->sc_dma_iot,
sc 6550 dev/pci/pciide.c (bus_space_read_4(sc->sc_dma_iot,
sc 6560 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 6589 dev/pci/pciide.c struct pciide_softc *sc = arg;
sc 6592 dev/pci/pciide.c struct pciide_pdcsata *ps = sc->sc_cookie;
sc 6599 dev/pci/pciide.c for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
sc 6600 dev/pci/pciide.c cp = &sc->pciide_channels[i];
sc 6606 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 6619 dev/pci/pciide.c struct pciide_softc *sc = arg;
sc 6622 dev/pci/pciide.c struct pciide_pdcsata *ps = sc->sc_cookie;
sc 6633 dev/pci/pciide.c for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
sc 6634 dev/pci/pciide.c cp = &sc->pciide_channels[i];
sc 6640 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 6653 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 6654 dev/pci/pciide.c struct pciide_pdcsata *ps = sc->sc_cookie;
sc 6657 dev/pci/pciide.c bus_space_write_4(sc->sc_dma_iot,
sc 6659 dev/pci/pciide.c (bus_space_read_4(sc->sc_dma_iot,
sc 6669 dev/pci/pciide.c struct pciide_softc *sc = v;
sc 6670 dev/pci/pciide.c struct pciide_channel *cp = &sc->pciide_channels[channel];
sc 6672 dev/pci/pciide.c struct pciide_pdcsata *ps = sc->sc_cookie;
sc 6675 dev/pci/pciide.c bus_space_write_4(sc->sc_dma_iot,
sc 6680 dev/pci/pciide.c bus_space_write_4(sc->sc_dma_iot,
sc 6682 dev/pci/pciide.c (bus_space_read_4(sc->sc_dma_iot,
sc 6690 dev/pci/pciide.c struct pciide_softc *sc = v;
sc 6691 dev/pci/pciide.c struct pciide_channel *cp = &sc->pciide_channels[channel];
sc 6693 dev/pci/pciide.c struct pciide_pdcsata *ps = sc->sc_cookie;
sc 6696 dev/pci/pciide.c bus_space_write_4(sc->sc_dma_iot,
sc 6698 dev/pci/pciide.c (bus_space_read_4(sc->sc_dma_iot,
sc 6703 dev/pci/pciide.c bus_dmamap_sync(sc->sc_dmat, dma_maps->dmamap_xfer, 0,
sc 6707 dev/pci/pciide.c bus_dmamap_unload(sc->sc_dmat, dma_maps->dmamap_xfer);
sc 6716 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 6717 dev/pci/pciide.c struct pciide_pdcsata *ps = sc->sc_cookie;
sc 6734 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 6735 dev/pci/pciide.c struct pciide_pdcsata *ps = sc->sc_cookie;
sc 6750 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 6751 dev/pci/pciide.c struct pciide_pdcsata *ps = sc->sc_cookie;
sc 6770 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 6771 dev/pci/pciide.c struct pciide_pdcsata *ps = sc->sc_cookie;
sc 6804 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
sc 6809 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
sc 6823 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel,
sc 6838 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
sc 6853 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel, sstatus);
sc 6913 dev/pci/pciide.c opti_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 6930 dev/pci/pciide.c if (sc->sc_rev <= 0x12) {
sc 6932 dev/pci/pciide.c sc->sc_dma_ok = 0;
sc 6933 dev/pci/pciide.c sc->sc_wdcdev.cap = 0;
sc 6935 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA32;
sc 6936 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 6939 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_MODE;
sc 6940 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 6941 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 6942 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
sc 6943 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 6944 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 6946 dev/pci/pciide.c sc->sc_wdcdev.set_modes = opti_setup_channel;
sc 6948 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 6949 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 6951 dev/pci/pciide.c init_ctrl = pciide_pci_read(sc->sc_pc, sc->sc_tag,
sc 6956 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 6958 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 6959 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 6960 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 6965 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 6986 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 7069 dev/pci/pciide.c rv = pciide_pci_read(sc->sc_pc, sc->sc_tag, OPTI_REG_ENH_MODE);
sc 7072 dev/pci/pciide.c pciide_pci_write(sc->sc_pc, sc->sc_tag, OPTI_REG_ENH_MODE, rv);
sc 7083 dev/pci/pciide.c serverworks_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 7092 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 7094 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 7097 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 7098 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
sc 7099 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 7100 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 7102 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 7103 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 7104 dev/pci/pciide.c switch (sc->sc_pp->ide_product) {
sc 7106 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 2;
sc 7109 dev/pci/pciide.c if (sc->sc_rev < 0x92)
sc 7110 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 4;
sc 7112 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 5;
sc 7115 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 4;
sc 7118 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 5;
sc 7122 dev/pci/pciide.c sc->sc_wdcdev.set_modes = serverworks_setup_channel;
sc 7123 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 7124 dev/pci/pciide.c sc->sc_wdcdev.nchannels =
sc 7125 dev/pci/pciide.c (sc->sc_pp->ide_product == PCI_PRODUCT_RCC_CSB6_IDE ? 1 : 2);
sc 7127 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 7128 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 7129 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 7151 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 7162 dev/pci/pciide.c pio_time = pci_conf_read(sc->sc_pc, sc->sc_tag, 0x40);
sc 7163 dev/pci/pciide.c dma_time = pci_conf_read(sc->sc_pc, sc->sc_tag, 0x44);
sc 7164 dev/pci/pciide.c pio_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, 0x48);
sc 7165 dev/pci/pciide.c udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, 0x54);
sc 7188 dev/pci/pciide.c if (sc->sc_rev <= 0x92 && drvp->UDMA_mode > 2 &&
sc 7189 dev/pci/pciide.c (PCI_PRODUCT(pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 7194 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 7214 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, 0x40, pio_time);
sc 7215 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, 0x44, dma_time);
sc 7216 dev/pci/pciide.c if (sc->sc_pp->ide_product != PCI_PRODUCT_RCC_OSB4_IDE)
sc 7217 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, 0x48, pio_mode);
sc 7218 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, 0x54, udma_mode);
sc 7222 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 7231 dev/pci/pciide.c struct pciide_softc *sc = arg;
sc 7237 dev/pci/pciide.c for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
sc 7238 dev/pci/pciide.c dmastat = bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 7243 dev/pci/pciide.c cp = &sc->pciide_channels[i];
sc 7248 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, i);
sc 7249 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 7258 dev/pci/pciide.c svwsata_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 7267 dev/pci/pciide.c sc->sc_cookie = malloc(sizeof(struct pciide_svwsata), M_DEVBUF,
sc 7269 dev/pci/pciide.c ss = sc->sc_cookie;
sc 7273 dev/pci/pciide.c if (pci_conf_read(sc->sc_pc, sc->sc_tag,
sc 7287 dev/pci/pciide.c svwsata_mapreg_dma(sc, pa);
sc 7290 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 7291 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_UDMA |
sc 7293 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 7295 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 7296 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 7297 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 7299 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 7300 dev/pci/pciide.c sc->sc_wdcdev.nchannels = 4;
sc 7301 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 7303 dev/pci/pciide.c sc->sc_wdcdev.set_modes = sata_setup_channel;
sc 7306 dev/pci/pciide.c sc->sc_wdcdev.drv_probe = svwsata_drv_probe;
sc 7311 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 7315 dev/pci/pciide.c sc->sc_pci_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO,
sc 7316 dev/pci/pciide.c pciide_pci_intr, sc, sc->sc_wdcdev.sc_dev.dv_xname);
sc 7317 dev/pci/pciide.c if (sc->sc_pci_ih != NULL) {
sc 7319 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 7323 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 7330 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 7331 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 7332 dev/pci/pciide.c if (pciide_chansetup(sc, channel, 0) == 0)
sc 7340 dev/pci/pciide.c svwsata_mapreg_dma(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 7342 dev/pci/pciide.c struct pciide_svwsata *ss = sc->sc_cookie;
sc 7344 dev/pci/pciide.c sc->sc_wdcdev.dma_arg = sc;
sc 7345 dev/pci/pciide.c sc->sc_wdcdev.dma_init = pciide_dma_init;
sc 7346 dev/pci/pciide.c sc->sc_wdcdev.dma_start = pciide_dma_start;
sc 7347 dev/pci/pciide.c sc->sc_wdcdev.dma_finish = pciide_dma_finish;
sc 7350 dev/pci/pciide.c sc->sc_dma_iot = ss->ba5_st;
sc 7351 dev/pci/pciide.c sc->sc_dma_ioh = ss->ba5_sh;
sc 7353 dev/pci/pciide.c sc->sc_dmacmd_read = svwsata_dmacmd_read;
sc 7354 dev/pci/pciide.c sc->sc_dmacmd_write = svwsata_dmacmd_write;
sc 7355 dev/pci/pciide.c sc->sc_dmactl_read = svwsata_dmactl_read;
sc 7356 dev/pci/pciide.c sc->sc_dmactl_write = svwsata_dmactl_write;
sc 7357 dev/pci/pciide.c sc->sc_dmatbl_write = svwsata_dmatbl_write;
sc 7360 dev/pci/pciide.c sc->sc_dmat = pa->pa_dmat;
sc 7361 dev/pci/pciide.c sc->sc_dma_ok = 1;
sc 7365 dev/pci/pciide.c svwsata_dmacmd_read(struct pciide_softc *sc, int chan)
sc 7367 dev/pci/pciide.c return (bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 7372 dev/pci/pciide.c svwsata_dmacmd_write(struct pciide_softc *sc, int chan, u_int8_t val)
sc 7374 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 7379 dev/pci/pciide.c svwsata_dmactl_read(struct pciide_softc *sc, int chan)
sc 7381 dev/pci/pciide.c return (bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 7386 dev/pci/pciide.c svwsata_dmactl_write(struct pciide_softc *sc, int chan, u_int8_t val)
sc 7388 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 7393 dev/pci/pciide.c svwsata_dmatbl_write(struct pciide_softc *sc, int chan, u_int32_t val)
sc 7395 dev/pci/pciide.c bus_space_write_4(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 7402 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 7404 dev/pci/pciide.c struct pciide_svwsata *ss = sc->sc_cookie;
sc 7407 dev/pci/pciide.c cp->ih = sc->sc_pci_ih;
sc 7413 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 7420 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 7432 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 7433 dev/pci/pciide.c struct pciide_svwsata *ss = sc->sc_cookie;
sc 7469 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel, sstatus,
sc 7481 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
sc 7486 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
sc 7520 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel,
sc 7535 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
sc 7549 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel, sstatus);
sc 7589 dev/pci/pciide.c #define ACARD_IS_850(sc) \
sc 7590 dev/pci/pciide.c ((sc)->sc_pp->ide_product == PCI_PRODUCT_ACARD_ATP850U)
sc 7593 dev/pci/pciide.c acard_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 7612 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 7614 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 7617 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 7618 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
sc 7619 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 7620 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 7622 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 7623 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 7624 dev/pci/pciide.c switch (sc->sc_pp->ide_product) {
sc 7626 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 2;
sc 7630 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 4;
sc 7634 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 7638 dev/pci/pciide.c sc->sc_wdcdev.set_modes = acard_setup_channel;
sc 7639 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 7640 dev/pci/pciide.c sc->sc_wdcdev.nchannels = 2;
sc 7642 dev/pci/pciide.c for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
sc 7643 dev/pci/pciide.c cp = &sc->pciide_channels[i];
sc 7644 dev/pci/pciide.c if (pciide_chansetup(sc, i, interface) == 0)
sc 7660 dev/pci/pciide.c if (!ACARD_IS_850(sc)) {
sc 7662 dev/pci/pciide.c reg = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL);
sc 7664 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL, reg);
sc 7673 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 7682 dev/pci/pciide.c if (ACARD_IS_850(sc)) {
sc 7684 dev/pci/pciide.c udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP850_UDMA);
sc 7687 dev/pci/pciide.c idetime = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_IDETIME);
sc 7689 dev/pci/pciide.c udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_UDMA);
sc 7705 dev/pci/pciide.c if (ACARD_IS_850(sc)) {
sc 7723 dev/pci/pciide.c if (ACARD_IS_850(sc)) {
sc 7736 dev/pci/pciide.c if (ACARD_IS_850(sc)) {
sc 7745 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL,
sc 7746 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL)
sc 7753 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 7758 dev/pci/pciide.c if (ACARD_IS_850(sc)) {
sc 7759 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag,
sc 7761 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, ATP850_UDMA, udma_mode);
sc 7763 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, ATP860_IDETIME, idetime);
sc 7764 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, ATP860_UDMA, udma_mode);
sc 7769 dev/pci/pciide.c nforce_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 7777 dev/pci/pciide.c conf = pci_conf_read(sc->sc_pc, sc->sc_tag, NFORCE_CONF);
sc 7779 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, conf), DEBUG_PROBE);
sc 7782 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 7784 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 7786 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 7787 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
sc 7788 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 7789 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 7791 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 7792 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 7793 dev/pci/pciide.c switch (sc->sc_pp->ide_product) {
sc 7795 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 5;
sc 7798 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 7800 dev/pci/pciide.c sc->sc_wdcdev.set_modes = nforce_setup_channel;
sc 7801 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 7802 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 7804 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 7806 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 7807 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 7809 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 7814 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 7834 dev/pci/pciide.c sc->sc_wdcdev.set_modes(&cp->wdc_channel);
sc 7837 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, conf), DEBUG_PROBE);
sc 7838 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, NFORCE_CONF, conf);
sc 7848 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 7852 dev/pci/pciide.c conf = pci_conf_read(sc->sc_pc, sc->sc_tag, NFORCE_CONF);
sc 7853 dev/pci/pciide.c piodmatim = pci_conf_read(sc->sc_pc, sc->sc_tag, NFORCE_PIODMATIM);
sc 7854 dev/pci/pciide.c piotim = pci_conf_read(sc->sc_pc, sc->sc_tag, NFORCE_PIOTIM);
sc 7855 dev/pci/pciide.c udmatim = pci_conf_read(sc->sc_pc, sc->sc_tag, NFORCE_UDMATIM);
sc 7857 dev/pci/pciide.c "piotim=0x%x, udmatim=0x%x\n", sc->sc_wdcdev.sc_dev.dv_xname,
sc 7919 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 7924 dev/pci/pciide.c "piotim=0x%x, udmatim=0x%x\n", sc->sc_wdcdev.sc_dev.dv_xname,
sc 7926 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, NFORCE_PIODMATIM, piodmatim);
sc 7927 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, NFORCE_UDMATIM, udmatim);
sc 7935 dev/pci/pciide.c struct pciide_softc *sc = arg;
sc 7942 dev/pci/pciide.c for (i = 0; i < sc->sc_wdcdev.nchannels; i++) {
sc 7943 dev/pci/pciide.c cp = &sc->pciide_channels[i];
sc 7950 dev/pci/pciide.c dmastat = bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 7958 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, i);
sc 7966 dev/pci/pciide.c artisea_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 7975 dev/pci/pciide.c if (sc->sc_rev == 0) {
sc 7977 dev/pci/pciide.c sc->sc_dma_ok = 0;
sc 7980 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 7987 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 7989 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 7990 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 7991 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
sc 7992 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 7993 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 7994 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 7995 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 7997 dev/pci/pciide.c sc->sc_wdcdev.set_modes = sata_setup_channel;
sc 7999 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 8000 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 8004 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 8005 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 8006 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 8018 dev/pci/pciide.c ite_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 8032 dev/pci/pciide.c cfg = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_CFG);
sc 8033 dev/pci/pciide.c modectl = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_MODE);
sc 8035 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cfg & IT_CFG_MASK,
sc 8039 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 8041 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 8043 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 8044 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
sc 8045 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 8046 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 8048 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 8049 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 8050 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 8052 dev/pci/pciide.c sc->sc_wdcdev.set_modes = ite_setup_channel;
sc 8053 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 8054 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 8056 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 8063 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, IT_MODE, modectl);
sc 8065 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 8066 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 8068 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 8072 dev/pci/pciide.c sc->sc_wdcdev.set_modes(&cp->wdc_channel);
sc 8076 dev/pci/pciide.c cfg = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_CFG);
sc 8077 dev/pci/pciide.c modectl = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_MODE);
sc 8079 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cfg & IT_CFG_MASK,
sc 8090 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 8095 dev/pci/pciide.c cfg = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_CFG);
sc 8096 dev/pci/pciide.c modectl = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_MODE);
sc 8097 dev/pci/pciide.c tim = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_TIM(channel));
sc 8098 dev/pci/pciide.c WDCDEBUG_PRINT(("%s:%d: tim=0x%x\n", sc->sc_wdcdev.sc_dev.dv_xname,
sc 8128 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname,
sc 8172 dev/pci/pciide.c WDCDEBUG_PRINT(("%s: tim=0x%x\n", sc->sc_wdcdev.sc_dev.dv_xname,
sc 8175 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, IT_CFG, cfg);
sc 8176 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, IT_MODE, modectl);
sc 8177 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, IT_TIM(channel), tim);
sc 8181 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 8189 dev/pci/pciide.c ixp_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 8197 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 8199 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 8201 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 8202 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
sc 8203 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 8204 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 8206 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 8207 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 8208 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 8210 dev/pci/pciide.c sc->sc_wdcdev.set_modes = ixp_setup_channel;
sc 8211 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 8212 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 8214 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 8216 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 8217 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 8218 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 8229 dev/pci/pciide.c sc->sc_wdcdev.set_modes(&cp->wdc_channel);
sc 8240 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 8244 dev/pci/pciide.c pio_timing = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_PIO_TIMING);
sc 8245 dev/pci/pciide.c pio = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_PIO_CTL);
sc 8246 dev/pci/pciide.c mdma_timing = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_MDMA_TIMING);
sc 8247 dev/pci/pciide.c udma = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_UDMA_CTL);
sc 8305 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_UDMA_CTL, udma);
sc 8306 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_MDMA_TIMING, mdma_timing);
sc 8307 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_PIO_CTL, pio);
sc 8308 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_PIO_TIMING, pio_timing);
sc 8312 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 8320 dev/pci/pciide.c jmicron_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
sc 8328 dev/pci/pciide.c conf = pci_conf_read(sc->sc_pc, sc->sc_tag, JMICRON_CONF);
sc 8330 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, conf), DEBUG_PROBE);
sc 8333 dev/pci/pciide.c pciide_mapreg_dma(sc, pa);
sc 8335 dev/pci/pciide.c sc->sc_wdcdev.cap = WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32 |
sc 8337 dev/pci/pciide.c if (sc->sc_dma_ok) {
sc 8338 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
sc 8339 dev/pci/pciide.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_IRQACK;
sc 8340 dev/pci/pciide.c sc->sc_wdcdev.irqack = pciide_irqack;
sc 8342 dev/pci/pciide.c sc->sc_wdcdev.PIO_cap = 4;
sc 8343 dev/pci/pciide.c sc->sc_wdcdev.DMA_cap = 2;
sc 8344 dev/pci/pciide.c sc->sc_wdcdev.UDMA_cap = 6;
sc 8345 dev/pci/pciide.c sc->sc_wdcdev.set_modes = jmicron_setup_channel;
sc 8346 dev/pci/pciide.c sc->sc_wdcdev.channels = sc->wdc_chanarray;
sc 8347 dev/pci/pciide.c sc->sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
sc 8349 dev/pci/pciide.c pciide_print_channels(sc->sc_wdcdev.nchannels, interface);
sc 8351 dev/pci/pciide.c for (channel = 0; channel < sc->sc_wdcdev.nchannels; channel++) {
sc 8352 dev/pci/pciide.c cp = &sc->pciide_channels[channel];
sc 8354 dev/pci/pciide.c if (pciide_chansetup(sc, channel, interface) == 0)
sc 8360 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
sc 8381 dev/pci/pciide.c sc->sc_wdcdev.set_modes(&cp->wdc_channel);
sc 8384 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, conf), DEBUG_PROBE);
sc 8385 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, NFORCE_CONF, conf);
sc 8395 dev/pci/pciide.c struct pciide_softc *sc = (struct pciide_softc *)cp->wdc_channel.wdc;
sc 8399 dev/pci/pciide.c conf = pci_conf_read(sc->sc_pc, sc->sc_tag, JMICRON_CONF);
sc 8456 dev/pci/pciide.c bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
sc 151 dev/pci/pciide_pdc202xx_reg.h #define SSTATUS_READ(sc,channel) \
sc 341 dev/pci/pciide_sii3112_reg.h ba5_read_4_ind(struct pciide_softc *sc, pcireg_t reg)
sc 347 dev/pci/pciide_sii3112_reg.h pci_conf_write(sc->sc_pc, sc->sc_tag, SII3112_BA5_IND_ADDR, reg);
sc 348 dev/pci/pciide_sii3112_reg.h rv = pci_conf_read(sc->sc_pc, sc->sc_tag, SII3112_BA5_IND_DATA);
sc 355 dev/pci/pciide_sii3112_reg.h ba5_read_4(struct pciide_softc *sc, bus_size_t reg)
sc 357 dev/pci/pciide_sii3112_reg.h struct pciide_satalink *sl = sc->sc_cookie;
sc 362 dev/pci/pciide_sii3112_reg.h return (ba5_read_4_ind(sc, reg));
sc 365 dev/pci/pciide_sii3112_reg.h #define BA5_READ_4(sc, chan, reg) \
sc 366 dev/pci/pciide_sii3112_reg.h ba5_read_4((sc), satalink_ba5_regmap[(chan)].reg)
sc 369 dev/pci/pciide_sii3112_reg.h ba5_write_4_ind(struct pciide_softc *sc, pcireg_t reg, uint32_t val)
sc 374 dev/pci/pciide_sii3112_reg.h pci_conf_write(sc->sc_pc, sc->sc_tag, SII3112_BA5_IND_ADDR, reg);
sc 375 dev/pci/pciide_sii3112_reg.h pci_conf_write(sc->sc_pc, sc->sc_tag, SII3112_BA5_IND_DATA, val);
sc 380 dev/pci/pciide_sii3112_reg.h ba5_write_4(struct pciide_softc *sc, bus_size_t reg, uint32_t val)
sc 382 dev/pci/pciide_sii3112_reg.h struct pciide_satalink *sl = sc->sc_cookie;
sc 387 dev/pci/pciide_sii3112_reg.h ba5_write_4_ind(sc, reg, val);
sc 390 dev/pci/pciide_sii3112_reg.h #define BA5_WRITE_4(sc, chan, reg, val) \
sc 391 dev/pci/pciide_sii3112_reg.h ba5_write_4((sc), satalink_ba5_regmap[(chan)].reg, (val))
sc 114 dev/pci/pciidevar.h #define PCIIDE_DMACMD_READ(sc, chan) \
sc 115 dev/pci/pciidevar.h (sc)->sc_dmacmd_read((sc), (chan))
sc 116 dev/pci/pciidevar.h #define PCIIDE_DMACMD_WRITE(sc, chan, val) \
sc 117 dev/pci/pciidevar.h (sc)->sc_dmacmd_write((sc), (chan), (val))
sc 118 dev/pci/pciidevar.h #define PCIIDE_DMACTL_READ(sc, chan) \
sc 119 dev/pci/pciidevar.h (sc)->sc_dmactl_read((sc), (chan))
sc 120 dev/pci/pciidevar.h #define PCIIDE_DMACTL_WRITE(sc, chan, val) \
sc 121 dev/pci/pciidevar.h (sc)->sc_dmactl_write((sc), (chan), (val))
sc 122 dev/pci/pciidevar.h #define PCIIDE_DMATBL_WRITE(sc, chan, val) \
sc 123 dev/pci/pciidevar.h (sc)->sc_dmatbl_write((sc), (chan), (val))
sc 93 dev/pci/pcscp.c #define READ_DMAREG(sc, reg) \
sc 94 dev/pci/pcscp.c bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
sc 95 dev/pci/pcscp.c #define WRITE_DMAREG(sc, reg, var) \
sc 96 dev/pci/pcscp.c bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (var))
sc 98 dev/pci/pcscp.c #define PCSCP_READ_REG(sc, reg) \
sc 99 dev/pci/pcscp.c bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg) << 2)
sc 100 dev/pci/pcscp.c #define PCSCP_WRITE_REG(sc, reg, val) \
sc 101 dev/pci/pcscp.c bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg) << 2, (val))
sc 172 dev/pci/pcscp.c struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
sc 182 dev/pci/pcscp.c printf("%s: unable to map registers\n", sc->sc_dev.dv_xname);
sc 186 dev/pci/pcscp.c sc->sc_glue = &pcscp_glue;
sc 208 dev/pci/pcscp.c sc->sc_id = 7;
sc 209 dev/pci/pcscp.c sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB;
sc 210 dev/pci/pcscp.c sc->sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_FE;
sc 211 dev/pci/pcscp.c sc->sc_cfg3 = NCRAMDCFG3_IDM | NCRAMDCFG3_FCLK;
sc 212 dev/pci/pcscp.c sc->sc_cfg4 = NCRAMDCFG4_GE12NS | NCRAMDCFG4_RADE;
sc 213 dev/pci/pcscp.c sc->sc_rev = NCR_VARIANT_AM53C974;
sc 214 dev/pci/pcscp.c sc->sc_features = NCR_F_FASTSCSI;
sc 215 dev/pci/pcscp.c sc->sc_cfg3_fscsi = NCRAMDCFG3_FSCSI;
sc 216 dev/pci/pcscp.c sc->sc_freq = 40; /* MHz */
sc 234 dev/pci/pcscp.c sc->sc_minsync = 1000 / sc->sc_freq;
sc 237 dev/pci/pcscp.c sc->sc_maxxfer = 16 * 1024 * 1024;
sc 249 dev/pci/pcscp.c printf("%s: can't create dma maps\n", sc->sc_dev.dv_xname);
sc 261 dev/pci/pcscp.c "error = %d\n", sc->sc_dev.dv_xname, error);
sc 268 dev/pci/pcscp.c sc->sc_dev.dv_xname, error);
sc 275 dev/pci/pcscp.c sc->sc_dev.dv_xname, error);
sc 282 dev/pci/pcscp.c sc->sc_dev.dv_xname, error);
sc 294 dev/pci/pcscp.c ncr53c9x_intr, esc, sc->sc_dev.dv_xname);
sc 306 dev/pci/pcscp.c printf("%s", sc->sc_dev.dv_xname);
sc 308 dev/pci/pcscp.c ncr53c9x_attach(sc, &pcscp_adapter, NULL);
sc 311 dev/pci/pcscp.c sc->sc_features |= NCR_F_DMASELECT;
sc 333 dev/pci/pcscp.c pcscp_read_reg(struct ncr53c9x_softc *sc, int reg)
sc 335 dev/pci/pcscp.c struct pcscp_softc *esc = (struct pcscp_softc *)sc;
sc 341 dev/pci/pcscp.c pcscp_write_reg(struct ncr53c9x_softc *sc, int reg, u_char v)
sc 343 dev/pci/pcscp.c struct pcscp_softc *esc = (struct pcscp_softc *)sc;
sc 349 dev/pci/pcscp.c pcscp_dma_isintr(struct ncr53c9x_softc *sc)
sc 351 dev/pci/pcscp.c struct pcscp_softc *esc = (struct pcscp_softc *)sc;
sc 357 dev/pci/pcscp.c pcscp_dma_reset(struct ncr53c9x_softc *sc)
sc 359 dev/pci/pcscp.c struct pcscp_softc *esc = (struct pcscp_softc *)sc;
sc 367 dev/pci/pcscp.c pcscp_dma_intr(struct ncr53c9x_softc *sc)
sc 369 dev/pci/pcscp.c struct pcscp_softc *esc = (struct pcscp_softc *)sc;
sc 384 dev/pci/pcscp.c sc->sc_dev.dv_xname);
sc 391 dev/pci/pcscp.c printf("%s: dma_intr: DMA aborted.\n", sc->sc_dev.dv_xname);
sc 430 dev/pci/pcscp.c if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
sc 495 dev/pci/pcscp.c sc->sc_dev.dv_xname, trans, esc->sc_dmasize);
sc 513 dev/pci/pcscp.c pcscp_dma_setup(struct ncr53c9x_softc *sc, caddr_t *addr, size_t *len,
sc 516 dev/pci/pcscp.c struct pcscp_softc *esc = (struct pcscp_softc *)sc;
sc 543 dev/pci/pcscp.c ((sc->sc_nexus->xs->flags & SCSI_NOSLEEP) ?
sc 545 dev/pci/pcscp.c ((sc->sc_nexus->xs->flags & SCSI_DATA_IN) ?
sc 549 dev/pci/pcscp.c sc->sc_dev.dv_xname, error);
sc 577 dev/pci/pcscp.c pcscp_dma_go(struct ncr53c9x_softc *sc)
sc 579 dev/pci/pcscp.c struct pcscp_softc *esc = (struct pcscp_softc *)sc;
sc 613 dev/pci/pcscp.c pcscp_dma_stop(struct ncr53c9x_softc *sc)
sc 615 dev/pci/pcscp.c struct pcscp_softc *esc = (struct pcscp_softc *)sc;
sc 627 dev/pci/pcscp.c pcscp_dma_isactive(struct ncr53c9x_softc *sc)
sc 629 dev/pci/pcscp.c struct pcscp_softc *esc = (struct pcscp_softc *)sc;
sc 112 dev/pci/piixpm.c struct piixpm_softc *sc = (struct piixpm_softc *)self;
sc 129 dev/pci/piixpm.c sc->sc_iot = pa->pa_iot;
sc 132 dev/pci/piixpm.c bus_space_map(sc->sc_iot, PCI_MAPREG_IO_ADDR(base),
sc 133 dev/pci/piixpm.c PIIX_SMB_SIZE, 0, &sc->sc_ioh)) {
sc 138 dev/pci/piixpm.c sc->sc_poll = 1;
sc 147 dev/pci/piixpm.c sc->sc_ih = pci_intr_establish(pa->pa_pc,
sc 148 dev/pci/piixpm.c ih, IPL_BIO, piixpm_intr, sc,
sc 149 dev/pci/piixpm.c sc->sc_dev.dv_xname);
sc 150 dev/pci/piixpm.c if (sc->sc_ih != NULL) {
sc 152 dev/pci/piixpm.c sc->sc_poll = 0;
sc 156 dev/pci/piixpm.c if (sc->sc_poll)
sc 163 dev/pci/piixpm.c rw_init(&sc->sc_i2c_lock, "iiclk");
sc 164 dev/pci/piixpm.c sc->sc_i2c_tag.ic_cookie = sc;
sc 165 dev/pci/piixpm.c sc->sc_i2c_tag.ic_acquire_bus = piixpm_i2c_acquire_bus;
sc 166 dev/pci/piixpm.c sc->sc_i2c_tag.ic_release_bus = piixpm_i2c_release_bus;
sc 167 dev/pci/piixpm.c sc->sc_i2c_tag.ic_exec = piixpm_i2c_exec;
sc 171 dev/pci/piixpm.c iba.iba_tag = &sc->sc_i2c_tag;
sc 180 dev/pci/piixpm.c struct piixpm_softc *sc = cookie;
sc 182 dev/pci/piixpm.c if (cold || sc->sc_poll || (flags & I2C_F_POLL))
sc 185 dev/pci/piixpm.c return (rw_enter(&sc->sc_i2c_lock, RW_WRITE | RW_INTR));
sc 191 dev/pci/piixpm.c struct piixpm_softc *sc = cookie;
sc 193 dev/pci/piixpm.c if (cold || sc->sc_poll || (flags & I2C_F_POLL))
sc 196 dev/pci/piixpm.c rw_exit(&sc->sc_i2c_lock);
sc 203 dev/pci/piixpm.c struct piixpm_softc *sc = cookie;
sc 209 dev/pci/piixpm.c "flags 0x%02x\n", sc->sc_dev.dv_xname, op, addr, cmdlen,
sc 214 dev/pci/piixpm.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, PIIX_SMB_HS);
sc 219 dev/pci/piixpm.c DPRINTF(("%s: exec: st 0x%b\n", sc->sc_dev.dv_xname, st,
sc 224 dev/pci/piixpm.c if (cold || sc->sc_poll)
sc 231 dev/pci/piixpm.c sc->sc_i2c_xfer.op = op;
sc 232 dev/pci/piixpm.c sc->sc_i2c_xfer.buf = buf;
sc 233 dev/pci/piixpm.c sc->sc_i2c_xfer.len = len;
sc 234 dev/pci/piixpm.c sc->sc_i2c_xfer.flags = flags;
sc 235 dev/pci/piixpm.c sc->sc_i2c_xfer.error = 0;
sc 238 dev/pci/piixpm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, PIIX_SMB_TXSLVA,
sc 245 dev/pci/piixpm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, PIIX_SMB_HCMD, b[0]);
sc 251 dev/pci/piixpm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 254 dev/pci/piixpm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 271 dev/pci/piixpm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, PIIX_SMB_HC, ctl);
sc 277 dev/pci/piixpm.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 285 dev/pci/piixpm.c piixpm_intr(sc);
sc 288 dev/pci/piixpm.c if (tsleep(sc, PRIBIO, "iicexec", PIIXPM_TIMEOUT * hz))
sc 292 dev/pci/piixpm.c if (sc->sc_i2c_xfer.error)
sc 303 dev/pci/piixpm.c sc->sc_dev.dv_xname, op, addr, cmdlen, len, flags,
sc 305 dev/pci/piixpm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, PIIX_SMB_HC,
sc 308 dev/pci/piixpm.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, PIIX_SMB_HS);
sc 311 dev/pci/piixpm.c sc->sc_dev.dv_xname, st, PIIX_SMB_HS_BITS);
sc 312 dev/pci/piixpm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, PIIX_SMB_HS, st);
sc 319 dev/pci/piixpm.c struct piixpm_softc *sc = arg;
sc 325 dev/pci/piixpm.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, PIIX_SMB_HS);
sc 332 dev/pci/piixpm.c DPRINTF(("%s: intr st 0x%b\n", sc->sc_dev.dv_xname, st,
sc 336 dev/pci/piixpm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, PIIX_SMB_HS, st);
sc 341 dev/pci/piixpm.c sc->sc_i2c_xfer.error = 1;
sc 346 dev/pci/piixpm.c if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op))
sc 350 dev/pci/piixpm.c b = sc->sc_i2c_xfer.buf;
sc 351 dev/pci/piixpm.c len = sc->sc_i2c_xfer.len;
sc 353 dev/pci/piixpm.c b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 356 dev/pci/piixpm.c b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 361 dev/pci/piixpm.c if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0)
sc 362 dev/pci/piixpm.c wakeup(sc);
sc 90 dev/pci/ppb.c struct ppb_softc *sc = (void *) self;
sc 99 dev/pci/ppb.c sc->sc_pc = pc;
sc 100 dev/pci/ppb.c sc->sc_tag = pa->pa_tag;
sc 113 dev/pci/ppb.c pci_intr_map(pa, &sc->sc_ih[pin - PCI_INTERRUPT_PIN_A]);
sc 144 dev/pci/ppb.c pba.pba_bridgeih = sc->sc_ih;
sc 145 dev/pci/ppb.c pba.pba_bridgetag = &sc->sc_tag;
sc 121 dev/pci/puc.c struct puc_pci_softc *sc = paa->puc;
sc 123 dev/pci/puc.c return (pci_intr_string(sc->pc, sc->ih));
sc 130 dev/pci/puc.c struct puc_pci_softc *sc = paa->puc;
sc 132 dev/pci/puc.c return (pci_intr_establish(sc->pc, sc->ih, type, func, arg, name));
sc 139 dev/pci/puc.c struct puc_softc *sc = &psc->sc_psc;
sc 146 dev/pci/puc.c sc->sc_desc = puc_find_description(PCI_VENDOR(pa->pa_id),
sc 148 dev/pci/puc.c if (sc->sc_desc == NULL) {
sc 159 dev/pci/puc.c sc->sc_dev.dv_xname);
sc 161 dev/pci/puc.c sc->sc_dev.dv_xname);
sc 163 dev/pci/puc.c sc->sc_dev.dv_xname);
sc 168 dev/pci/puc.c puc_print_ports(sc->sc_desc);
sc 187 dev/pci/puc.c sc->sc_bar_mappings[i].mapped = 0;
sc 192 dev/pci/puc.c sc->sc_bar_mappings[i].mapped = (pci_mapreg_map(pa, bar, type,
sc 193 dev/pci/puc.c 0, &sc->sc_bar_mappings[i].t, &sc->sc_bar_mappings[i].h,
sc 194 dev/pci/puc.c &sc->sc_bar_mappings[i].a, &sc->sc_bar_mappings[i].s, 0)
sc 196 dev/pci/puc.c sc->sc_bar_mappings[i].type = type;
sc 197 dev/pci/puc.c if (sc->sc_bar_mappings[i].mapped)
sc 201 dev/pci/puc.c sc->sc_dev.dv_xname, (long)bar);
sc 207 dev/pci/puc.c printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
sc 211 dev/pci/puc.c paa.puc = sc;
sc 224 dev/pci/puc.c puc_common_attach(sc, &paa);
sc 228 dev/pci/puc.c puc_common_attach(struct puc_softc *sc, struct puc_attach_args *paa)
sc 249 dev/pci/puc.c for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
sc 251 dev/pci/puc.c if (sc->sc_desc->ports[i].type != PUC_PORT_TYPE_COM &&
sc 252 dev/pci/puc.c sc->sc_desc->ports[i].type != PUC_PORT_TYPE_LPT)
sc 255 dev/pci/puc.c bar = PUC_PORT_BAR_INDEX(sc->sc_desc->ports[i].bar);
sc 256 dev/pci/puc.c if (!sc->sc_bar_mappings[bar].mapped) {
sc 258 dev/pci/puc.c sc->sc_dev.dv_xname,
sc 259 dev/pci/puc.c puc_port_type_name(sc->sc_desc->ports[i].type),
sc 260 dev/pci/puc.c sc->sc_desc->ports[i].bar);
sc 266 dev/pci/puc.c paa->type = sc->sc_desc->ports[i].type;
sc 267 dev/pci/puc.c paa->flags = sc->sc_desc->ports[i].flags;
sc 268 dev/pci/puc.c paa->a = sc->sc_bar_mappings[bar].a;
sc 269 dev/pci/puc.c paa->t = sc->sc_bar_mappings[bar].t;
sc 271 dev/pci/puc.c if (bus_space_subregion(sc->sc_bar_mappings[bar].t,
sc 272 dev/pci/puc.c sc->sc_bar_mappings[bar].h, sc->sc_desc->ports[i].offset,
sc 273 dev/pci/puc.c sc->sc_bar_mappings[bar].s - sc->sc_desc->ports[i].offset,
sc 276 dev/pci/puc.c sc->sc_dev.dv_xname, i);
sc 283 dev/pci/puc.c "(0x%lx, 0x%lx)\n", sc->sc_dev.dv_xname, paa->port,
sc 289 dev/pci/puc.c sc->sc_ports[i].dev = config_found_sm(&sc->sc_dev, paa,
sc 125 dev/pci/safe.c void safe_dump_ring(struct safe_softc *sc, const char *tag);
sc 130 dev/pci/safe.c #define READ_REG(sc,r) \
sc 131 dev/pci/safe.c bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (r))
sc 133 dev/pci/safe.c #define WRITE_REG(sc,reg,val) \
sc 134 dev/pci/safe.c bus_space_write_4((sc)->sc_st, (sc)->sc_sh, reg, val)
sc 156 dev/pci/safe.c struct safe_softc *sc = (struct safe_softc *)self;
sc 167 dev/pci/safe.c SIMPLEQ_INIT(&sc->sc_pkq);
sc 168 dev/pci/safe.c sc->sc_dmat = pa->pa_dmat;
sc 174 dev/pci/safe.c &sc->sc_st, &sc->sc_sh, NULL, &iosize, 0)) {
sc 184 dev/pci/safe.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_NET, safe_intr, sc,
sc 186 dev/pci/safe.c if (sc->sc_ih == NULL) {
sc 194 dev/pci/safe.c sc->sc_cid = crypto_get_driverid(0);
sc 195 dev/pci/safe.c if (sc->sc_cid < 0) {
sc 200 dev/pci/safe.c sc->sc_chiprev = READ_REG(sc, SAFE_DEVINFO) &
sc 206 dev/pci/safe.c if (safe_dma_malloc(sc,
sc 208 dev/pci/safe.c &sc->sc_ringalloc, 0)) {
sc 215 dev/pci/safe.c sc->sc_ring = (struct safe_ringentry *) sc->sc_ringalloc.dma_vaddr;
sc 216 dev/pci/safe.c sc->sc_ringtop = sc->sc_ring + SAFE_MAX_NQUEUE;
sc 217 dev/pci/safe.c sc->sc_front = sc->sc_ring;
sc 218 dev/pci/safe.c sc->sc_back = sc->sc_ring;
sc 219 dev/pci/safe.c raddr = sc->sc_ringalloc.dma_paddr;
sc 220 dev/pci/safe.c bzero(sc->sc_ring, SAFE_MAX_NQUEUE * sizeof(struct safe_ringentry));
sc 222 dev/pci/safe.c struct safe_ringentry *re = &sc->sc_ring[i];
sc 235 dev/pci/safe.c if (safe_dma_malloc(sc, SAFE_TOTAL_SPART * sizeof (struct safe_pdesc),
sc 236 dev/pci/safe.c &sc->sc_spalloc, 0)) {
sc 238 dev/pci/safe.c safe_dma_free(sc, &sc->sc_ringalloc);
sc 241 dev/pci/safe.c sc->sc_spring = (struct safe_pdesc *) sc->sc_spalloc.dma_vaddr;
sc 242 dev/pci/safe.c sc->sc_springtop = sc->sc_spring + SAFE_TOTAL_SPART;
sc 243 dev/pci/safe.c sc->sc_spfree = sc->sc_spring;
sc 244 dev/pci/safe.c bzero(sc->sc_spring, SAFE_TOTAL_SPART * sizeof(struct safe_pdesc));
sc 246 dev/pci/safe.c if (safe_dma_malloc(sc, SAFE_TOTAL_DPART * sizeof (struct safe_pdesc),
sc 247 dev/pci/safe.c &sc->sc_dpalloc, 0)) {
sc 250 dev/pci/safe.c safe_dma_free(sc, &sc->sc_spalloc);
sc 251 dev/pci/safe.c safe_dma_free(sc, &sc->sc_ringalloc);
sc 254 dev/pci/safe.c sc->sc_dpring = (struct safe_pdesc *) sc->sc_dpalloc.dma_vaddr;
sc 255 dev/pci/safe.c sc->sc_dpringtop = sc->sc_dpring + SAFE_TOTAL_DPART;
sc 256 dev/pci/safe.c sc->sc_dpfree = sc->sc_dpring;
sc 257 dev/pci/safe.c bzero(sc->sc_dpring, SAFE_TOTAL_DPART * sizeof(struct safe_pdesc));
sc 261 dev/pci/safe.c devinfo = READ_REG(sc, SAFE_DEVINFO);
sc 269 dev/pci/safe.c crypto_kregister(sc->sc_cid, algs, safe_kprocess);
sc 270 dev/pci/safe.c timeout_set(&sc->sc_pkto, safe_kpoll, sc);
sc 291 dev/pci/safe.c crypto_register(sc->sc_cid, algs, safe_newsession,
sc 297 dev/pci/safe.c safe_reset_board(sc); /* reset h/w */
sc 298 dev/pci/safe.c safe_init_pciregs(sc); /* init pci settings */
sc 299 dev/pci/safe.c safe_init_board(sc); /* init h/w */
sc 302 dev/pci/safe.c safe_rng_init(sc);
sc 304 dev/pci/safe.c timeout_set(&sc->sc_rngto, safe_rng, sc);
sc 305 dev/pci/safe.c timeout_add(&sc->sc_rngto, hz * safe_rnginterval);
sc 312 dev/pci/safe.c pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
sc 316 dev/pci/safe.c bus_space_unmap(sc->sc_st, sc->sc_sh, iosize);
sc 325 dev/pci/safe.c struct safe_softc *sc;
sc 347 dev/pci/safe.c sc = safe_cd.cd_devs[card];
sc 349 dev/pci/safe.c if (SAFE_SESSION(crp->crp_sid) >= sc->sc_nsessions) {
sc 355 dev/pci/safe.c if (sc->sc_front == sc->sc_back && sc->sc_nqchip != 0) {
sc 360 dev/pci/safe.c re = sc->sc_front;
sc 383 dev/pci/safe.c ses = &sc->sc_sessions[re->re_sesn];
sc 630 dev/pci/safe.c if (bus_dmamap_create(sc->sc_dmat, SAFE_MAX_DMA, SAFE_MAX_PART,
sc 638 dev/pci/safe.c if (bus_dmamap_load_mbuf(sc->sc_dmat, re->re_src_map,
sc 640 dev/pci/safe.c bus_dmamap_destroy(sc->sc_dmat, re->re_src_map);
sc 647 dev/pci/safe.c if (bus_dmamap_load_uio(sc->sc_dmat, re->re_src_map,
sc 649 dev/pci/safe.c bus_dmamap_destroy(sc->sc_dmat, re->re_src_map);
sc 662 dev/pci/safe.c re->re_desc.d_src = sc->sc_spalloc.dma_paddr +
sc 663 dev/pci/safe.c ((caddr_t) sc->sc_spfree - (caddr_t) sc->sc_spring);
sc 666 dev/pci/safe.c pd = sc->sc_spfree;
sc 667 dev/pci/safe.c if (++(sc->sc_spfree) == sc->sc_springtop)
sc 668 dev/pci/safe.c sc->sc_spfree = sc->sc_spring;
sc 705 dev/pci/safe.c if (bus_dmamap_create(sc->sc_dmat,
sc 714 dev/pci/safe.c if (bus_dmamap_load_uio(sc->sc_dmat,
sc 717 dev/pci/safe.c bus_dmamap_destroy(sc->sc_dmat,
sc 761 dev/pci/safe.c if (bus_dmamap_create(sc->sc_dmat,
sc 770 dev/pci/safe.c if (bus_dmamap_load_mbuf(sc->sc_dmat,
sc 773 dev/pci/safe.c bus_dmamap_destroy(sc->sc_dmat,
sc 806 dev/pci/safe.c err = sc->sc_nqchip ? ERESTART : ENOMEM;
sc 816 dev/pci/safe.c err = sc->sc_nqchip ?
sc 832 dev/pci/safe.c err = sc->sc_nqchip ?
sc 844 dev/pci/safe.c err = sc->sc_nqchip ?
sc 856 dev/pci/safe.c if (bus_dmamap_create(sc->sc_dmat,
sc 865 dev/pci/safe.c if (bus_dmamap_load_mbuf(sc->sc_dmat,
sc 868 dev/pci/safe.c bus_dmamap_destroy(sc->sc_dmat,
sc 900 dev/pci/safe.c re->re_desc.d_dst = sc->sc_dpalloc.dma_paddr +
sc 901 dev/pci/safe.c ((caddr_t) sc->sc_dpfree - (caddr_t) sc->sc_dpring);
sc 903 dev/pci/safe.c pd = sc->sc_dpfree;
sc 908 dev/pci/safe.c if (++(sc->sc_dpfree) == sc->sc_dpringtop)
sc 909 dev/pci/safe.c sc->sc_dpfree = sc->sc_dpring;
sc 952 dev/pci/safe.c if (++(sc->sc_front) == sc->sc_ringtop)
sc 953 dev/pci/safe.c sc->sc_front = sc->sc_ring;
sc 956 dev/pci/safe.c safe_feed(sc, re);
sc 965 dev/pci/safe.c bus_dmamap_unload(sc->sc_dmat, re->re_dst_map);
sc 966 dev/pci/safe.c bus_dmamap_destroy(sc->sc_dmat, re->re_dst_map);
sc 969 dev/pci/safe.c bus_dmamap_unload(sc->sc_dmat, re->re_src_map);
sc 970 dev/pci/safe.c bus_dmamap_destroy(sc->sc_dmat, re->re_src_map);
sc 983 dev/pci/safe.c safe_reset_board(struct safe_softc *sc)
sc 991 dev/pci/safe.c v = READ_REG(sc, SAFE_PE_DMACFG) &
sc 994 dev/pci/safe.c WRITE_REG(sc, SAFE_PE_DMACFG, v
sc 998 dev/pci/safe.c WRITE_REG(sc, SAFE_PE_DMACFG, v);
sc 1005 dev/pci/safe.c safe_init_board(struct safe_softc *sc)
sc 1009 dev/pci/safe.c v = READ_REG(sc, SAFE_PE_DMACFG);
sc 1018 dev/pci/safe.c WRITE_REG(sc, SAFE_PE_DMACFG, v);
sc 1020 dev/pci/safe.c WRITE_REG(sc, SAFE_CRYPTO_CTRL, SAFE_CRYPTO_CTRL_PKEY |
sc 1024 dev/pci/safe.c WRITE_REG(sc, SAFE_ENDIAN, SAFE_ENDIAN_TGT_PASS|SAFE_ENDIAN_DMA_PASS);
sc 1026 dev/pci/safe.c WRITE_REG(sc, SAFE_ENDIAN, SAFE_ENDIAN_TGT_PASS|SAFE_ENDIAN_DMA_SWAB);
sc 1029 dev/pci/safe.c if (sc->sc_chiprev == SAFE_REV(1,0)) {
sc 1037 dev/pci/safe.c WRITE_REG(sc, SAFE_DMA_CFG, 256);
sc 1039 dev/pci/safe.c sc->sc_dev.dv_xname,
sc 1040 dev/pci/safe.c (READ_REG(sc, SAFE_DMA_CFG)>>2) & 0xff,
sc 1041 dev/pci/safe.c SAFE_REV_MAJ(sc->sc_chiprev),
sc 1042 dev/pci/safe.c SAFE_REV_MIN(sc->sc_chiprev));
sc 1046 dev/pci/safe.c WRITE_REG(sc, SAFE_PE_PDRBASE, sc->sc_ringalloc.dma_paddr);
sc 1047 dev/pci/safe.c WRITE_REG(sc, SAFE_PE_RDRBASE, sc->sc_ringalloc.dma_paddr);
sc 1054 dev/pci/safe.c WRITE_REG(sc, SAFE_PE_RINGCFG,
sc 1056 dev/pci/safe.c WRITE_REG(sc, SAFE_PE_RINGPOLL, 0); /* disable polling */
sc 1058 dev/pci/safe.c WRITE_REG(sc, SAFE_PE_GRNGBASE, sc->sc_spalloc.dma_paddr);
sc 1059 dev/pci/safe.c WRITE_REG(sc, SAFE_PE_SRNGBASE, sc->sc_dpalloc.dma_paddr);
sc 1060 dev/pci/safe.c WRITE_REG(sc, SAFE_PE_PARTSIZE,
sc 1067 dev/pci/safe.c WRITE_REG(sc, SAFE_PE_PARTCFG, SAFE_MAX_DSIZE);
sc 1069 dev/pci/safe.c WRITE_REG(sc, SAFE_HI_CLR, SAFE_INT_PE_CDONE | SAFE_INT_PE_DDONE |
sc 1073 dev/pci/safe.c WRITE_REG(sc, SAFE_PE_DMACFG, v | SAFE_PE_DMACFG_PEMODE);
sc 1080 dev/pci/safe.c WRITE_REG(sc, SAFE_HI_CFG, SAFE_HI_CFG_LEVEL);
sc 1082 dev/pci/safe.c WRITE_REG(sc, SAFE_HI_MASK, SAFE_INT_PE_DDONE | SAFE_INT_PE_ERROR);
sc 1084 dev/pci/safe.c WRITE_REG(sc, SAFE_HI_DESC_CNT, 1);
sc 1092 dev/pci/safe.c safe_init_pciregs(struct safe_softc *sc)
sc 1097 dev/pci/safe.c safe_dma_malloc(struct safe_softc *sc, bus_size_t size,
sc 1102 dev/pci/safe.c if ((r = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0,
sc 1106 dev/pci/safe.c if ((r = bus_dmamem_map(sc->sc_dmat, &dma->dma_seg, dma->dma_nseg,
sc 1110 dev/pci/safe.c if ((r = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 1114 dev/pci/safe.c if ((r = bus_dmamap_load(sc->sc_dmat, dma->dma_map, dma->dma_vaddr,
sc 1123 dev/pci/safe.c bus_dmamap_destroy(sc->sc_dmat, dma->dma_map);
sc 1125 dev/pci/safe.c bus_dmamem_unmap(sc->sc_dmat, dma->dma_vaddr, size);
sc 1127 dev/pci/safe.c bus_dmamem_free(sc->sc_dmat, &dma->dma_seg, dma->dma_nseg);
sc 1134 dev/pci/safe.c safe_dma_free(struct safe_softc *sc, struct safe_dma_alloc *dma)
sc 1136 dev/pci/safe.c bus_dmamap_unload(sc->sc_dmat, dma->dma_map);
sc 1137 dev/pci/safe.c bus_dmamem_unmap(sc->sc_dmat, dma->dma_vaddr, dma->dma_size);
sc 1138 dev/pci/safe.c bus_dmamem_free(sc->sc_dmat, &dma->dma_seg, dma->dma_nseg);
sc 1139 dev/pci/safe.c bus_dmamap_destroy(sc->sc_dmat, dma->dma_map);
sc 1146 dev/pci/safe.c safe_rng_init(struct safe_softc *sc)
sc 1151 dev/pci/safe.c WRITE_REG(sc, SAFE_RNG_CTRL, 0);
sc 1153 dev/pci/safe.c WRITE_REG(sc, SAFE_RNG_CNFG, 0x834); /* magic from SafeNet */
sc 1154 dev/pci/safe.c WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0);
sc 1170 dev/pci/safe.c w = READ_REG(sc, SAFE_RNG_OUT);
sc 1172 dev/pci/safe.c v = READ_REG(sc, SAFE_RNG_OUT);
sc 1183 dev/pci/safe.c v = READ_REG(sc, SAFE_RNG_OUT);
sc 1191 dev/pci/safe.c safe_rng_read(struct safe_softc *sc)
sc 1196 dev/pci/safe.c while (READ_REG(sc, SAFE_RNG_STAT) != 0 && ++i < SAFE_RNG_MAXWAIT)
sc 1198 dev/pci/safe.c return (READ_REG(sc, SAFE_RNG_OUT));
sc 1204 dev/pci/safe.c struct safe_softc *sc = arg;
sc 1218 dev/pci/safe.c buf[i] = safe_rng_read(sc);
sc 1224 dev/pci/safe.c if (READ_REG(sc, SAFE_RNG_ALM_CNT) > safe_rngmaxalarm) {
sc 1228 dev/pci/safe.c READ_REG(sc, SAFE_RNG_ALM_CNT), safe_rngmaxalarm));
sc 1230 dev/pci/safe.c WRITE_REG(sc, SAFE_RNG_CTRL,
sc 1231 dev/pci/safe.c READ_REG(sc, SAFE_RNG_CTRL) | SAFE_RNG_CTRL_SHORTEN);
sc 1234 dev/pci/safe.c w = READ_REG(sc, SAFE_RNG_CNFG);
sc 1237 dev/pci/safe.c WRITE_REG(sc, SAFE_RNG_CNFG, w);
sc 1239 dev/pci/safe.c WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0);
sc 1241 dev/pci/safe.c (void) safe_rng_read(sc);
sc 1244 dev/pci/safe.c if (READ_REG(sc, SAFE_RNG_ALM_CNT) == 0) {
sc 1245 dev/pci/safe.c WRITE_REG(sc, SAFE_RNG_CTRL,
sc 1246 dev/pci/safe.c READ_REG(sc, SAFE_RNG_CTRL) &
sc 1252 dev/pci/safe.c WRITE_REG(sc, SAFE_RNG_CTRL,
sc 1253 dev/pci/safe.c READ_REG(sc, SAFE_RNG_CTRL) & ~SAFE_RNG_CTRL_SHORTEN);
sc 1255 dev/pci/safe.c WRITE_REG(sc, SAFE_RNG_ALM_CNT, 0);
sc 1260 dev/pci/safe.c timeout_add(&sc->sc_rngto, hz * safe_rnginterval);
sc 1272 dev/pci/safe.c struct safe_softc *sc = NULL;
sc 1281 dev/pci/safe.c sc = safe_cd.cd_devs[i];
sc 1282 dev/pci/safe.c if (sc == NULL || sc->sc_cid == (*sidp))
sc 1285 dev/pci/safe.c if (sc == NULL)
sc 1324 dev/pci/safe.c if (sc->sc_sessions == NULL) {
sc 1325 dev/pci/safe.c ses = sc->sc_sessions = (struct safe_session *)malloc(
sc 1330 dev/pci/safe.c sc->sc_nsessions = 1;
sc 1332 dev/pci/safe.c for (sesn = 0; sesn < sc->sc_nsessions; sesn++) {
sc 1333 dev/pci/safe.c if (sc->sc_sessions[sesn].ses_used == 0) {
sc 1334 dev/pci/safe.c ses = &sc->sc_sessions[sesn];
sc 1340 dev/pci/safe.c sesn = sc->sc_nsessions;
sc 1345 dev/pci/safe.c bcopy(sc->sc_sessions, ses, sesn *
sc 1347 dev/pci/safe.c bzero(sc->sc_sessions, sesn *
sc 1349 dev/pci/safe.c free(sc->sc_sessions, M_DEVBUF);
sc 1350 dev/pci/safe.c sc->sc_sessions = ses;
sc 1351 dev/pci/safe.c ses = &sc->sc_sessions[sesn];
sc 1352 dev/pci/safe.c sc->sc_nsessions++;
sc 1426 dev/pci/safe.c *sidp = SAFE_SID(sc->sc_dev.dv_unit, sesn);
sc 1436 dev/pci/safe.c struct safe_softc *sc;
sc 1443 dev/pci/safe.c sc = safe_cd.cd_devs[card];
sc 1445 dev/pci/safe.c if (sc == NULL)
sc 1449 dev/pci/safe.c if (session < sc->sc_nsessions) {
sc 1450 dev/pci/safe.c bzero(&sc->sc_sessions[session], sizeof(sc->sc_sessions[session]));
sc 1482 dev/pci/safe.c safe_cleanchip(struct safe_softc *sc)
sc 1485 dev/pci/safe.c if (sc->sc_nqchip != 0) {
sc 1486 dev/pci/safe.c struct safe_ringentry *re = sc->sc_back;
sc 1488 dev/pci/safe.c while (re != sc->sc_front) {
sc 1490 dev/pci/safe.c safe_free_entry(sc, re);
sc 1491 dev/pci/safe.c if (++re == sc->sc_ringtop)
sc 1492 dev/pci/safe.c re = sc->sc_ring;
sc 1494 dev/pci/safe.c sc->sc_back = re;
sc 1495 dev/pci/safe.c sc->sc_nqchip = 0;
sc 1504 dev/pci/safe.c safe_free_entry(struct safe_softc *sc, struct safe_ringentry *re)
sc 1527 dev/pci/safe.c safe_feed(struct safe_softc *sc, struct safe_ringentry *re)
sc 1529 dev/pci/safe.c bus_dmamap_sync(sc->sc_dmat, re->re_src_map,
sc 1532 dev/pci/safe.c bus_dmamap_sync(sc->sc_dmat, re->re_dst_map, 0,
sc 1535 dev/pci/safe.c safe_dma_sync(sc, &sc->sc_ringalloc,
sc 1537 dev/pci/safe.c safe_dma_sync(sc, &sc->sc_spalloc, BUS_DMASYNC_PREWRITE);
sc 1538 dev/pci/safe.c safe_dma_sync(sc, &sc->sc_dpalloc, BUS_DMASYNC_PREWRITE);
sc 1542 dev/pci/safe.c safe_dump_ringstate(sc, __func__);
sc 1543 dev/pci/safe.c safe_dump_request(sc, __func__, re);
sc 1546 dev/pci/safe.c sc->sc_nqchip++;
sc 1547 dev/pci/safe.c if (sc->sc_nqchip > safestats.st_maxqchip)
sc 1548 dev/pci/safe.c safestats.st_maxqchip = sc->sc_nqchip;
sc 1550 dev/pci/safe.c WRITE_REG(sc, SAFE_HI_RD_DESCR, 0);
sc 1635 dev/pci/safe.c safe_callback(struct safe_softc *sc, struct safe_ringentry *re)
sc 1644 dev/pci/safe.c safe_dma_sync(sc, &sc->sc_ringalloc,
sc 1648 dev/pci/safe.c sc->sc_dev.dv_xname, re->re_desc.d_csr,
sc 1654 dev/pci/safe.c bus_dmamap_sync(sc->sc_dmat, re->re_dst_map, 0,
sc 1656 dev/pci/safe.c bus_dmamap_unload(sc->sc_dmat, re->re_dst_map);
sc 1657 dev/pci/safe.c bus_dmamap_destroy(sc->sc_dmat, re->re_dst_map);
sc 1659 dev/pci/safe.c bus_dmamap_sync(sc->sc_dmat, re->re_src_map, 0,
sc 1661 dev/pci/safe.c bus_dmamap_unload(sc->sc_dmat, re->re_src_map);
sc 1662 dev/pci/safe.c bus_dmamap_destroy(sc->sc_dmat, re->re_src_map);
sc 1689 dev/pci/safe.c (caddr_t) sc->sc_sessions[re->re_sesn].ses_iv);
sc 1694 dev/pci/safe.c (caddr_t)sc->sc_sessions[re->re_sesn].ses_iv);
sc 1736 dev/pci/safe.c struct safe_softc *sc = arg;
sc 1739 dev/pci/safe.c stat = READ_REG(sc, SAFE_HM_STAT);
sc 1743 dev/pci/safe.c WRITE_REG(sc, SAFE_HI_CLR, stat); /* IACK */
sc 1750 dev/pci/safe.c while (sc->sc_back != sc->sc_front) {
sc 1751 dev/pci/safe.c struct safe_ringentry *re = sc->sc_back;
sc 1754 dev/pci/safe.c safe_dump_ringstate(sc, __func__);
sc 1755 dev/pci/safe.c safe_dump_request(sc, __func__, re);
sc 1770 dev/pci/safe.c sc->sc_nqchip--;
sc 1771 dev/pci/safe.c safe_callback(sc, re);
sc 1773 dev/pci/safe.c if (++(sc->sc_back) == sc->sc_ringtop)
sc 1774 dev/pci/safe.c sc->sc_back = sc->sc_ring;
sc 1784 dev/pci/safe.c struct safe_softc *sc;
sc 1788 dev/pci/safe.c sc = safe_cd.cd_devs[i];
sc 1789 dev/pci/safe.c if (sc == NULL)
sc 1791 dev/pci/safe.c if (sc->sc_cid == krp->krp_hid)
sc 1792 dev/pci/safe.c return (sc);
sc 1800 dev/pci/safe.c struct safe_softc *sc;
sc 1804 dev/pci/safe.c if ((sc = safe_kfind(krp)) == NULL) {
sc 1822 dev/pci/safe.c SIMPLEQ_INSERT_TAIL(&sc->sc_pkq, q, pkq_next);
sc 1823 dev/pci/safe.c safe_kfeed(sc);
sc 1837 dev/pci/safe.c safe_kstart(struct safe_softc *sc)
sc 1839 dev/pci/safe.c struct cryptkop *krp = sc->sc_pkq_cur->pkq_krp;
sc 1894 dev/pci/safe.c WRITE_REG(sc, SAFE_PK_A_LEN, (exp_bits + 31) / 32);
sc 1895 dev/pci/safe.c WRITE_REG(sc, SAFE_PK_B_LEN, (mod_bits + 31) / 32);
sc 1909 dev/pci/safe.c sc->sc_pk_reslen = b_off - a_off;
sc 1910 dev/pci/safe.c sc->sc_pk_resoff = d_off;
sc 1913 dev/pci/safe.c safe_kload_reg(sc, a_off, b_off - a_off,
sc 1915 dev/pci/safe.c WRITE_REG(sc, SAFE_PK_A_ADDR, a_off >> 2);
sc 1916 dev/pci/safe.c safe_kload_reg(sc, b_off, b_off - a_off,
sc 1918 dev/pci/safe.c WRITE_REG(sc, SAFE_PK_B_ADDR, b_off >> 2);
sc 1919 dev/pci/safe.c safe_kload_reg(sc, c_off, b_off - a_off,
sc 1921 dev/pci/safe.c WRITE_REG(sc, SAFE_PK_C_ADDR, c_off >> 2);
sc 1922 dev/pci/safe.c WRITE_REG(sc, SAFE_PK_D_ADDR, d_off >> 2);
sc 1924 dev/pci/safe.c WRITE_REG(sc, SAFE_PK_FUNC, op | SAFE_PK_FUNC_RUN);
sc 1961 dev/pci/safe.c safe_kfeed(struct safe_softc *sc)
sc 1963 dev/pci/safe.c if (SIMPLEQ_EMPTY(&sc->sc_pkq) && sc->sc_pkq_cur == NULL)
sc 1965 dev/pci/safe.c if (sc->sc_pkq_cur != NULL)
sc 1967 dev/pci/safe.c while (!SIMPLEQ_EMPTY(&sc->sc_pkq)) {
sc 1968 dev/pci/safe.c struct safe_pkq *q = SIMPLEQ_FIRST(&sc->sc_pkq);
sc 1970 dev/pci/safe.c sc->sc_pkq_cur = q;
sc 1971 dev/pci/safe.c SIMPLEQ_REMOVE_HEAD(&sc->sc_pkq, pkq_next);
sc 1972 dev/pci/safe.c if (safe_kstart(sc) != 0) {
sc 1975 dev/pci/safe.c sc->sc_pkq_cur = NULL;
sc 1978 dev/pci/safe.c timeout_add(&sc->sc_pkto, 1);
sc 1987 dev/pci/safe.c struct safe_softc *sc = vsc;
sc 1994 dev/pci/safe.c if (sc->sc_pkq_cur == NULL)
sc 1996 dev/pci/safe.c if (READ_REG(sc, SAFE_PK_FUNC) & SAFE_PK_FUNC_RUN) {
sc 1998 dev/pci/safe.c timeout_add(&sc->sc_pkto, 1);
sc 2002 dev/pci/safe.c q = sc->sc_pkq_cur;
sc 2006 dev/pci/safe.c for (i = 0; i < sc->sc_pk_reslen >> 2; i++)
sc 2007 dev/pci/safe.c buf[i] = letoh32(READ_REG(sc, SAFE_PK_RAM_START +
sc 2008 dev/pci/safe.c sc->sc_pk_resoff + (i << 2)));
sc 2010 dev/pci/safe.c res->crp_nbits = sc->sc_pk_reslen * 8;
sc 2014 dev/pci/safe.c WRITE_REG(sc, i, 0);
sc 2018 dev/pci/safe.c sc->sc_pkq_cur = NULL;
sc 2020 dev/pci/safe.c safe_kfeed(sc);
sc 2026 dev/pci/safe.c safe_kload_reg(struct safe_softc *sc, u_int32_t off, u_int32_t len,
sc 2035 dev/pci/safe.c WRITE_REG(sc, SAFE_PK_RAM_START + off + (i << 2),
sc 2042 dev/pci/safe.c safe_dump_dmastatus(struct safe_softc *sc, const char *tag)
sc 2045 dev/pci/safe.c READ_REG(sc, SAFE_DMA_ENDIAN), READ_REG(sc, SAFE_DMA_SRCADDR),
sc 2046 dev/pci/safe.c READ_REG(sc, SAFE_DMA_DSTADDR), READ_REG(sc, SAFE_DMA_STAT));
sc 2050 dev/pci/safe.c safe_dump_intrstate(struct safe_softc *sc, const char *tag)
sc 2053 dev/pci/safe.c tag, READ_REG(sc, SAFE_HI_CFG), READ_REG(sc, SAFE_HI_MASK),
sc 2054 dev/pci/safe.c READ_REG(sc, SAFE_HI_DESC_CNT), READ_REG(sc, SAFE_HU_STAT),
sc 2055 dev/pci/safe.c READ_REG(sc, SAFE_HM_STAT));
sc 2059 dev/pci/safe.c safe_dump_ringstate(struct safe_softc *sc, const char *tag)
sc 2061 dev/pci/safe.c u_int32_t estat = READ_REG(sc, SAFE_PE_ERNGSTAT);
sc 2066 dev/pci/safe.c sc->sc_back - sc->sc_ring, sc->sc_front - sc->sc_ring);
sc 2070 dev/pci/safe.c safe_dump_request(struct safe_softc *sc, const char* tag, struct safe_ringentry *re)
sc 2074 dev/pci/safe.c ix = re - sc->sc_ring;
sc 2079 dev/pci/safe.c ix = (re->re_desc.d_src - sc->sc_spalloc.dma_paddr) /
sc 2083 dev/pci/safe.c &sc->sc_spring[ix],
sc 2084 dev/pci/safe.c (caddr_t)sc->sc_spring[ix].pd_addr);
sc 2091 dev/pci/safe.c ix = (re->re_desc.d_dst - sc->sc_dpalloc.dma_paddr) /
sc 2095 dev/pci/safe.c &sc->sc_dpring[ix],
sc 2096 dev/pci/safe.c (caddr_t) sc->sc_dpring[ix].pd_addr);
sc 2126 dev/pci/safe.c safe_dump_ring(struct safe_softc *sc, const char *tag)
sc 2129 dev/pci/safe.c safe_dump_intrstate(sc, tag);
sc 2130 dev/pci/safe.c safe_dump_dmastatus(sc, tag);
sc 2131 dev/pci/safe.c safe_dump_ringstate(sc, tag);
sc 2132 dev/pci/safe.c if (sc->sc_nqchip) {
sc 2133 dev/pci/safe.c struct safe_ringentry *re = sc->sc_back;
sc 2135 dev/pci/safe.c safe_dump_request(sc, tag, re);
sc 2136 dev/pci/safe.c if (++re == sc->sc_ringtop)
sc 2137 dev/pci/safe.c re = sc->sc_ring;
sc 2138 dev/pci/safe.c } while (re != sc->sc_front);
sc 43 dev/pci/sdhc_pci.c struct sdhc_softc sc;
sc 70 dev/pci/sdhc_pci.c struct sdhc_pci_softc *sc = (struct sdhc_pci_softc *)self;
sc 94 dev/pci/sdhc_pci.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_SDMMC,
sc 95 dev/pci/sdhc_pci.c sdhc_intr, sc, sc->sc.sc_dev.dv_xname);
sc 96 dev/pci/sdhc_pci.c if (sc->sc_ih == NULL) {
sc 113 dev/pci/sdhc_pci.c MALLOC(sc->sc.sc_host, struct sdhc_host **,
sc 129 dev/pci/sdhc_pci.c sc->sc.sc_dev.dv_xname, reg);
sc 133 dev/pci/sdhc_pci.c if (sdhc_host_found(&sc->sc, iot, ioh, size, usedma) != 0)
sc 136 dev/pci/sdhc_pci.c sc->sc.sc_dev.dv_xname, reg);
sc 142 dev/pci/sdhc_pci.c (void)powerhook_establish(sdhc_power, &sc->sc);
sc 143 dev/pci/sdhc_pci.c (void)shutdownhook_establish(sdhc_shutdown, &sc->sc);
sc 98 dev/pci/sili_pci.c struct sili_softc *sc = &psc->psc_sili;
sc 110 dev/pci/sili_pci.c sc->sc_dmat = pa->pa_dmat;
sc 111 dev/pci/sili_pci.c sc->sc_ios_global = 0;
sc 112 dev/pci/sili_pci.c sc->sc_ios_port = 0;
sc 113 dev/pci/sili_pci.c sc->sc_nports = sd->sd_nports;
sc 118 dev/pci/sili_pci.c &sc->sc_iot_global, &sc->sc_ioh_global,
sc 119 dev/pci/sili_pci.c NULL, &sc->sc_ios_global, 0) != 0) {
sc 127 dev/pci/sili_pci.c &sc->sc_iot_port, &sc->sc_ioh_port,
sc 128 dev/pci/sili_pci.c NULL, &sc->sc_ios_port, 0) != 0) {
sc 140 dev/pci/sili_pci.c sili_intr, sc, sc->sc_dev.dv_xname);
sc 149 dev/pci/sili_pci.c if (sili_attach(sc) != 0) {
sc 160 dev/pci/sili_pci.c bus_space_unmap(sc->sc_iot_port, sc->sc_ioh_port, sc->sc_ios_port);
sc 161 dev/pci/sili_pci.c sc->sc_ios_port = 0;
sc 163 dev/pci/sili_pci.c bus_space_unmap(sc->sc_iot_global, sc->sc_ioh_global,
sc 164 dev/pci/sili_pci.c sc->sc_ios_global);
sc 165 dev/pci/sili_pci.c sc->sc_ios_global = 0;
sc 172 dev/pci/sili_pci.c struct sili_softc *sc = &psc->psc_sili;
sc 175 dev/pci/sili_pci.c rv = sili_detach(sc, flags);
sc 183 dev/pci/sili_pci.c if (sc->sc_ios_port != 0) {
sc 184 dev/pci/sili_pci.c bus_space_unmap(sc->sc_iot_port, sc->sc_ioh_port,
sc 185 dev/pci/sili_pci.c sc->sc_ios_port);
sc 186 dev/pci/sili_pci.c sc->sc_ios_port = 0;
sc 188 dev/pci/sili_pci.c if (sc->sc_ios_global != 0) {
sc 189 dev/pci/sili_pci.c bus_space_unmap(sc->sc_iot_global, sc->sc_ioh_global,
sc 190 dev/pci/sili_pci.c sc->sc_ios_global);
sc 191 dev/pci/sili_pci.c sc->sc_ios_global = 0;
sc 79 dev/pci/siop_pci.c struct siop_pci_softc *sc = (struct siop_pci_softc *)self;
sc 81 dev/pci/siop_pci.c if (siop_pci_attach_common(&sc->siop_pci, &sc->siop.sc_c,
sc 85 dev/pci/siop_pci.c siop_attach(&sc->siop);
sc 325 dev/pci/siop_pci_common.c siop_pci_reset(struct siop_common_softc *sc)
sc 329 dev/pci/siop_pci_common.c dmode = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DMODE);
sc 330 dev/pci/siop_pci_common.c if (sc->features & SF_PCI_RL)
sc 332 dev/pci/siop_pci_common.c if (sc->features & SF_PCI_RM)
sc 334 dev/pci/siop_pci_common.c if (sc->features & SF_PCI_BOF)
sc 336 dev/pci/siop_pci_common.c if (sc->features & SF_PCI_CLS)
sc 337 dev/pci/siop_pci_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL,
sc 338 dev/pci/siop_pci_common.c bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL) |
sc 340 dev/pci/siop_pci_common.c if (sc->features & SF_PCI_WRI)
sc 341 dev/pci/siop_pci_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
sc 342 dev/pci/siop_pci_common.c bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) |
sc 344 dev/pci/siop_pci_common.c if (sc->maxburst) {
sc 345 dev/pci/siop_pci_common.c int ctest5 = bus_space_read_1(sc->sc_rt, sc->sc_rh,
sc 347 dev/pci/siop_pci_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4,
sc 348 dev/pci/siop_pci_common.c bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4) &
sc 351 dev/pci/siop_pci_common.c dmode |= ((sc->maxburst - 1) << DMODE_BL_SHIFT) & DMODE_BL_MASK;
sc 353 dev/pci/siop_pci_common.c ctest5 |= (sc->maxburst - 1) & CTEST5_BBCK;
sc 354 dev/pci/siop_pci_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5, ctest5);
sc 356 dev/pci/siop_pci_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4,
sc 357 dev/pci/siop_pci_common.c bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4) |
sc 360 dev/pci/siop_pci_common.c bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DMODE, dmode);
sc 72 dev/pci/sli_pci.c struct sli_softc *sc = &psc->psc_sli;
sc 80 dev/pci/sli_pci.c sc->sc_dmat = pa->pa_dmat;
sc 81 dev/pci/sli_pci.c sc->sc_ios_slim = 0;
sc 82 dev/pci/sli_pci.c sc->sc_ios_reg = 0;
sc 87 dev/pci/sli_pci.c &sc->sc_iot_slim, &sc->sc_ioh_slim, NULL,
sc 88 dev/pci/sli_pci.c &sc->sc_ios_slim, 0) != 0) {
sc 96 dev/pci/sli_pci.c &sc->sc_iot_reg, &sc->sc_ioh_reg, NULL,
sc 97 dev/pci/sli_pci.c &sc->sc_ios_reg, 0) != 0) {
sc 108 dev/pci/sli_pci.c if (sli_attach(sc) != 0) {
sc 114 dev/pci/sli_pci.c sli_intr, sc, DEVNAME(sc));
sc 123 dev/pci/sli_pci.c sli_detach(sc, DETACH_FORCE|DETACH_QUIET);
sc 125 dev/pci/sli_pci.c bus_space_unmap(sc->sc_iot_reg, sc->sc_ioh_reg, sc->sc_ios_reg);
sc 126 dev/pci/sli_pci.c sc->sc_ios_reg = 0;
sc 128 dev/pci/sli_pci.c bus_space_unmap(sc->sc_iot_slim, sc->sc_ioh_slim, sc->sc_ios_slim);
sc 129 dev/pci/sli_pci.c sc->sc_ios_slim = 0;
sc 136 dev/pci/sli_pci.c struct sli_softc *sc = &psc->psc_sli;
sc 139 dev/pci/sli_pci.c rv = sli_detach(sc, flags);
sc 101 dev/pci/sti_pci.c struct sti_softc *sc = &spc->sc_base;
sc 116 dev/pci/sti_pci.c sc->sc_flags |= STI_ROM_ENABLED;
sc 125 dev/pci/sti_pci.c sti_pci_disable_rom(sc);
sc 128 dev/pci/sti_pci.c sc->sc_dev.dv_xname, rc);
sc 138 dev/pci/sti_pci.c sti_pci_enable_rom(sc);
sc 145 dev/pci/sti_pci.c sti_pci_disable_rom(sc);
sc 149 dev/pci/sti_pci.c sc->sc_dev.dv_xname, tmp);
sc 161 dev/pci/sti_pci.c sti_pci_disable_rom(sc);
sc 164 dev/pci/sti_pci.c sc->sc_dev.dv_xname, tmp);
sc 175 dev/pci/sti_pci.c sti_pci_disable_rom(sc);
sc 178 dev/pci/sti_pci.c sti_pci_enable_rom(sc);
sc 192 dev/pci/sti_pci.c sti_pci_disable_rom(sc);
sc 196 dev/pci/sti_pci.c sc->sc_dev.dv_xname, tmp);
sc 208 dev/pci/sti_pci.c sti_pci_disable_rom(sc);
sc 243 dev/pci/sti_pci.c " architecture\n", sc->sc_dev.dv_xname);
sc 253 dev/pci/sti_pci.c sti_pci_enable_rom(sc);
sc 257 dev/pci/sti_pci.c rc = sti_readbar(sc, pa, i,
sc 272 dev/pci/sti_pci.c sti_pci_disable_rom(sc);
sc 281 dev/pci/sti_pci.c stiromsize, 0, &sc->romh);
sc 284 dev/pci/sti_pci.c sc->sc_dev.dv_xname, rc);
sc 287 dev/pci/sti_pci.c sc->memt = pa->pa_memt;
sc 294 dev/pci/sti_pci.c sti_pci_disable_rom(sc);
sc 303 dev/pci/sti_pci.c sti_readbar(struct sti_softc *sc, struct pci_attach_args *pa, u_int region,
sc 312 dev/pci/sti_pci.c sc->bases[region] = 0;
sc 318 dev/pci/sti_pci.c sti_pci_disable_rom(sc);
sc 320 dev/pci/sti_pci.c sc->sc_dev.dv_xname, bar, region);
sc 321 dev/pci/sti_pci.c sti_pci_enable_rom(sc);
sc 334 dev/pci/sti_pci.c sti_pci_disable_rom(sc);
sc 336 dev/pci/sti_pci.c sc->sc_dev.dv_xname, bar, region);
sc 337 dev/pci/sti_pci.c sti_pci_enable_rom(sc);
sc 341 dev/pci/sti_pci.c sc->bases[region] = addr;
sc 349 dev/pci/sti_pci.c sti_pci_enable_rom(struct sti_softc *sc)
sc 351 dev/pci/sti_pci.c struct sti_pci_softc *spc = (struct sti_pci_softc *)sc;
sc 354 dev/pci/sti_pci.c if (!ISSET(sc->sc_flags, STI_ROM_ENABLED)) {
sc 358 dev/pci/sti_pci.c SET(sc->sc_flags, STI_ROM_ENABLED);
sc 366 dev/pci/sti_pci.c sti_pci_disable_rom(struct sti_softc *sc)
sc 368 dev/pci/sti_pci.c struct sti_pci_softc *spc = (struct sti_pci_softc *)sc;
sc 371 dev/pci/sti_pci.c if (ISSET(sc->sc_flags, STI_ROM_ENABLED)) {
sc 376 dev/pci/sti_pci.c CLR(sc->sc_flags, STI_ROM_ENABLED);
sc 160 dev/pci/sv.c void sv_dumpregs(struct sv_softc *sc);
sc 199 dev/pci/sv.c sv_write (sc, reg, val)
sc 200 dev/pci/sv.c struct sv_softc *sc;
sc 204 dev/pci/sv.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, reg, val);
sc 208 dev/pci/sv.c sv_read (sc, reg)
sc 209 dev/pci/sv.c struct sv_softc *sc;
sc 213 dev/pci/sv.c return (bus_space_read_1(sc->sc_iot, sc->sc_ioh, reg));
sc 217 dev/pci/sv.c sv_read_indirect (sc, reg)
sc 218 dev/pci/sv.c struct sv_softc *sc;
sc 223 dev/pci/sv.c if (sc->sc_trd > 0)
sc 227 dev/pci/sv.c sv_write (sc, SV_CODEC_IADDR, iaddr);
sc 229 dev/pci/sv.c return (sv_read(sc, SV_CODEC_IDATA));
sc 233 dev/pci/sv.c sv_write_indirect (sc, reg, val)
sc 234 dev/pci/sv.c struct sv_softc *sc;
sc 248 dev/pci/sv.c if (sc->sc_trd > 0)
sc 252 dev/pci/sv.c sv_write (sc, SV_CODEC_IADDR, iaddr);
sc 253 dev/pci/sv.c sv_write (sc, SV_CODEC_IDATA, val);
sc 276 dev/pci/sv.c struct sv_softc *sc = (struct sv_softc *)self;
sc 285 dev/pci/sv.c sc->sc_pci_chipset_tag = pc;
sc 286 dev/pci/sv.c sc->sc_pci_tag = pa->pa_tag;
sc 290 dev/pci/sv.c &sc->sc_iot, &sc->sc_ioh, NULL, &iosize, 0)) {
sc 295 dev/pci/sv.c sc->sc_dmatag = pa->pa_dmat;
sc 304 dev/pci/sv.c if (bus_space_map(sc->sc_iot, dmaio, iosize, 0, &sc->sc_dmaa_ioh)) {
sc 316 dev/pci/sv.c sc->sc_dma_configured |= SV_DMAA_CONFIGURED;
sc 324 dev/pci/sv.c if (bus_space_map(sc->sc_iot, dmaio, iosize, 0, &sc->sc_dmac_ioh)) {
sc 335 dev/pci/sv.c sc->sc_dma_configured |= SV_DMAC_CONFIGURED;
sc 340 dev/pci/sv.c sv_write_indirect(sc, SV_ANALOG_POWER_DOWN_CONTROL, 0);
sc 341 dev/pci/sv.c sv_write_indirect(sc, SV_DIGITAL_POWER_DOWN_CONTROL, 0);
sc 344 dev/pci/sv.c reg = sv_read(sc, SV_CODEC_CONTROL);
sc 346 dev/pci/sv.c sv_write(sc, SV_CODEC_CONTROL, reg);
sc 349 dev/pci/sv.c reg = sv_read(sc, SV_CODEC_CONTROL);
sc 354 dev/pci/sv.c sv_write(sc, SV_CODEC_CONTROL, reg);
sc 358 dev/pci/sv.c sv_write(sc, SV_CODEC_CONTROL, reg);
sc 360 dev/pci/sv.c DPRINTF (("reg: %x\n", sv_read(sc, SV_CODEC_CONTROL)));
sc 363 dev/pci/sv.c reg = sv_read(sc, SV_CODEC_INTMASK);
sc 366 dev/pci/sv.c sv_write(sc, SV_CODEC_INTMASK, reg);
sc 368 dev/pci/sv.c sv_read(sc, SV_CODEC_STATUS);
sc 370 dev/pci/sv.c sc->sc_trd = 0;
sc 371 dev/pci/sv.c sc->sc_enable = 0;
sc 379 dev/pci/sv.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, sv_intr, sc,
sc 380 dev/pci/sv.c sc->sc_dev.dv_xname);
sc 381 dev/pci/sv.c if (sc->sc_ih == NULL) {
sc 390 dev/pci/sv.c sv_init_mixer(sc);
sc 392 dev/pci/sv.c audio_attach_mi(&sv_hw_if, sc, &sc->sc_dev);
sc 397 dev/pci/sv.c sv_dumpregs(sc)
sc 398 dev/pci/sv.c struct sv_softc *sc;
sc 404 dev/pci/sv.c printf ("%02x = %x\n", idx, pci_conf_read(sc->sc_pci_chipset_tag,
sc 405 dev/pci/sv.c sc->sc_pci_tag, idx));
sc 410 dev/pci/sv.c printf ("REG %02x = %02x\n", idx, sv_read(sc, idx));
sc 414 dev/pci/sv.c printf ("IREG %02x = %02x\n", idx, sv_read_indirect(sc, idx));
sc 419 dev/pci/sv.c bus_space_read_1(sc->sc_iot, sc->sc_dmaa_ioh, idx));
sc 430 dev/pci/sv.c struct sv_softc *sc = p;
sc 433 dev/pci/sv.c intr = sv_read(sc, SV_CODEC_STATUS);
sc 439 dev/pci/sv.c if (sc->sc_pintr)
sc 440 dev/pci/sv.c sc->sc_pintr(sc->sc_parg);
sc 444 dev/pci/sv.c if (sc->sc_rintr)
sc 445 dev/pci/sv.c sc->sc_rintr(sc->sc_rarg);
sc 452 dev/pci/sv.c sv_allocmem(sc, size, align, p)
sc 453 dev/pci/sv.c struct sv_softc *sc;
sc 461 dev/pci/sv.c error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0,
sc 467 dev/pci/sv.c error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size,
sc 472 dev/pci/sv.c error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size,
sc 477 dev/pci/sv.c error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL,
sc 484 dev/pci/sv.c bus_dmamap_destroy(sc->sc_dmatag, p->map);
sc 486 dev/pci/sv.c bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
sc 488 dev/pci/sv.c bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
sc 493 dev/pci/sv.c sv_freemem(sc, p)
sc 494 dev/pci/sv.c struct sv_softc *sc;
sc 497 dev/pci/sv.c bus_dmamap_unload(sc->sc_dmatag, p->map);
sc 498 dev/pci/sv.c bus_dmamap_destroy(sc->sc_dmatag, p->map);
sc 499 dev/pci/sv.c bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
sc 500 dev/pci/sv.c bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
sc 510 dev/pci/sv.c struct sv_softc *sc = addr;
sc 515 dev/pci/sv.c if (!(sc->sc_dma_configured & SV_DMAA_CONFIGURED)) {
sc 521 dev/pci/sv.c if (sc->sc_dma_configured & SV_DMAA_TRIED_CONFIGURE)
sc 525 dev/pci/sv.c if (!bus_space_map(sc->sc_iot, dmaio, iosize, 0,
sc 526 dev/pci/sv.c &sc->sc_dmaa_ioh)) {
sc 531 dev/pci/sv.c sc->sc_dma_configured |= SV_DMAA_TRIED_CONFIGURE;
sc 535 dev/pci/sv.c pci_conf_write(sc->sc_pci_chipset_tag, sc->sc_pci_tag,
sc 540 dev/pci/sv.c sc->sc_dma_configured |= SV_DMAA_CONFIGURED;
sc 544 dev/pci/sv.c if (!(sc->sc_dma_configured & SV_DMAC_CONFIGURED)) {
sc 550 dev/pci/sv.c if (sc->sc_dma_configured & SV_DMAC_TRIED_CONFIGURE)
sc 554 dev/pci/sv.c if (!bus_space_map(sc->sc_iot, dmaio, iosize, 0,
sc 555 dev/pci/sv.c &sc->sc_dmac_ioh)) {
sc 560 dev/pci/sv.c sc->sc_dma_configured |= SV_DMAC_TRIED_CONFIGURE;
sc 564 dev/pci/sv.c pci_conf_write(sc->sc_pci_chipset_tag, sc->sc_pci_tag,
sc 568 dev/pci/sv.c sc->sc_dma_configured |= SV_DMAC_CONFIGURED;
sc 574 dev/pci/sv.c reg = sv_read(sc, SV_CODEC_INTMASK);
sc 577 dev/pci/sv.c sv_write(sc, SV_CODEC_INTMASK, reg);
sc 580 dev/pci/sv.c sc->sc_pintr = 0;
sc 581 dev/pci/sv.c sc->sc_rintr = 0;
sc 593 dev/pci/sv.c struct sv_softc *sc = addr;
sc 595 dev/pci/sv.c sv_halt_in_dma(sc);
sc 596 dev/pci/sv.c sv_halt_out_dma(sc);
sc 598 dev/pci/sv.c sc->sc_pintr = 0;
sc 599 dev/pci/sv.c sc->sc_rintr = 0;
sc 667 dev/pci/sv.c struct sv_softc *sc = addr;
sc 722 dev/pci/sv.c reg = sv_read_indirect(sc, SV_DMA_DATA_FORMAT);
sc 726 dev/pci/sv.c sv_write_indirect(sc, SV_DMA_DATA_FORMAT, reg);
sc 730 dev/pci/sv.c sv_write_indirect(sc, SV_PCM_SAMPLE_RATE_0, (val & 0xff));
sc 731 dev/pci/sv.c sv_write_indirect(sc, SV_PCM_SAMPLE_RATE_1, (val >> 8));
sc 787 dev/pci/sv.c sv_write_indirect(sc, SV_ADC_PLL_M, best_m);
sc 788 dev/pci/sv.c sv_write_indirect(sc, SV_ADC_PLL_N, best_n | (a << SV_PLL_R_SHIFT));
sc 807 dev/pci/sv.c struct sv_softc *sc = addr;
sc 813 dev/pci/sv.c for (p = sc->sc_dmas; p && KERNADDR(p) != buf; p = p->next)
sc 822 dev/pci/sv.c bus_space_write_4(sc->sc_iot, sc->sc_dmac_ioh, SV_DMA_ADDR0,
sc 824 dev/pci/sv.c bus_space_write_4(sc->sc_iot, sc->sc_dmac_ioh, SV_DMA_COUNT0,
sc 826 dev/pci/sv.c bus_space_write_1(sc->sc_iot, sc->sc_dmac_ioh, SV_DMA_MODE,
sc 838 dev/pci/sv.c struct sv_softc *sc = addr;
sc 843 dev/pci/sv.c for (p = sc->sc_dmas; p && KERNADDR(p) != buf; p = p->next)
sc 852 dev/pci/sv.c bus_space_write_4(sc->sc_iot, sc->sc_dmaa_ioh, SV_DMA_ADDR0,
sc 854 dev/pci/sv.c bus_space_write_4(sc->sc_iot, sc->sc_dmaa_ioh, SV_DMA_COUNT0,
sc 856 dev/pci/sv.c bus_space_write_1(sc->sc_iot, sc->sc_dmaa_ioh, SV_DMA_MODE,
sc 870 dev/pci/sv.c struct sv_softc *sc = addr;
sc 877 dev/pci/sv.c sc->sc_pintr = intr;
sc 878 dev/pci/sv.c sc->sc_parg = arg;
sc 879 dev/pci/sv.c if (!(sc->sc_enable & SV_PLAY_ENABLE)) {
sc 882 dev/pci/sv.c sv_write_indirect(sc, SV_DMAA_COUNT1, dma_count >> 8);
sc 883 dev/pci/sv.c sv_write_indirect(sc, SV_DMAA_COUNT0, (dma_count & 0xFF));
sc 885 dev/pci/sv.c mode = sv_read_indirect(sc, SV_PLAY_RECORD_ENABLE);
sc 887 dev/pci/sv.c sv_write_indirect(sc, SV_PLAY_RECORD_ENABLE, mode);
sc 888 dev/pci/sv.c sc->sc_enable |= SV_PLAY_ENABLE;
sc 901 dev/pci/sv.c struct sv_softc *sc = addr;
sc 906 dev/pci/sv.c sc->sc_rintr = intr;
sc 907 dev/pci/sv.c sc->sc_rarg = arg;
sc 908 dev/pci/sv.c if (!(sc->sc_enable & SV_RECORD_ENABLE)) {
sc 911 dev/pci/sv.c sv_write_indirect(sc, SV_DMAC_COUNT1, dma_count >> 8);
sc 912 dev/pci/sv.c sv_write_indirect(sc, SV_DMAC_COUNT0, (dma_count & 0xFF));
sc 914 dev/pci/sv.c mode = sv_read_indirect(sc, SV_PLAY_RECORD_ENABLE);
sc 916 dev/pci/sv.c sv_write_indirect(sc, SV_PLAY_RECORD_ENABLE, mode);
sc 917 dev/pci/sv.c sc->sc_enable |= SV_RECORD_ENABLE;
sc 926 dev/pci/sv.c struct sv_softc *sc = addr;
sc 930 dev/pci/sv.c mode = sv_read_indirect(sc, SV_PLAY_RECORD_ENABLE);
sc 932 dev/pci/sv.c sc->sc_enable &= ~SV_PLAY_ENABLE;
sc 933 dev/pci/sv.c sv_write_indirect(sc, SV_PLAY_RECORD_ENABLE, mode);
sc 942 dev/pci/sv.c struct sv_softc *sc = addr;
sc 946 dev/pci/sv.c mode = sv_read_indirect(sc, SV_PLAY_RECORD_ENABLE);
sc 948 dev/pci/sv.c sc->sc_enable &= ~SV_RECORD_ENABLE;
sc 949 dev/pci/sv.c sv_write_indirect(sc, SV_PLAY_RECORD_ENABLE, mode);
sc 1142 dev/pci/sv.c struct sv_softc *sc = addr;
sc 1156 dev/pci/sv.c reg = sv_read_indirect(sc, ports[idx].l_port);
sc 1161 dev/pci/sv.c sv_write_indirect(sc, ports[idx].l_port, reg);
sc 1164 dev/pci/sv.c reg = sv_read_indirect(sc, ports[idx].r_port);
sc 1169 dev/pci/sv.c sv_write_indirect(sc, ports[idx].r_port, reg);
sc 1193 dev/pci/sv.c sc->sc_trd = 1;
sc 1195 dev/pci/sv.c reg = sv_read_indirect(sc, ports[idx].l_port);
sc 1199 dev/pci/sv.c sv_write_indirect(sc, ports[idx].l_port, reg);
sc 1202 dev/pci/sv.c reg = sv_read_indirect(sc, ports[idx].r_port);
sc 1208 dev/pci/sv.c sv_write_indirect(sc, ports[idx].r_port, reg);
sc 1211 dev/pci/sv.c sc->sc_trd = 0;
sc 1212 dev/pci/sv.c sv_read_indirect(sc, ports[idx].l_port);
sc 1232 dev/pci/sv.c reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL);
sc 1235 dev/pci/sv.c sv_write_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL, reg);
sc 1237 dev/pci/sv.c reg = sv_read_indirect(sc, SV_RIGHT_ADC_INPUT_CONTROL);
sc 1240 dev/pci/sv.c sv_write_indirect(sc, SV_RIGHT_ADC_INPUT_CONTROL, reg);
sc 1256 dev/pci/sv.c reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL);
sc 1259 dev/pci/sv.c sv_write_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL, reg);
sc 1261 dev/pci/sv.c reg = sv_read_indirect(sc, SV_RIGHT_ADC_INPUT_CONTROL);
sc 1264 dev/pci/sv.c sv_write_indirect(sc, SV_RIGHT_ADC_INPUT_CONTROL, reg);
sc 1274 dev/pci/sv.c reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL);
sc 1281 dev/pci/sv.c sv_write_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL, reg);
sc 1288 dev/pci/sv.c reg = sv_read_indirect(sc, SV_SRS_SPACE_CONTROL);
sc 1295 dev/pci/sv.c sv_write_indirect(sc, SV_SRS_SPACE_CONTROL, reg);
sc 1307 dev/pci/sv.c struct sv_softc *sc = addr;
sc 1321 dev/pci/sv.c reg = sv_read_indirect(sc, ports[idx].l_port);
sc 1337 dev/pci/sv.c reg = sv_read_indirect(sc, ports[idx].l_port);
sc 1345 dev/pci/sv.c reg = sv_read_indirect(sc, ports[idx].r_port);
sc 1362 dev/pci/sv.c reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL);
sc 1374 dev/pci/sv.c reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL) & SV_REC_GAIN_MASK;
sc 1384 dev/pci/sv.c reg = sv_read_indirect(sc, SV_LEFT_ADC_INPUT_CONTROL);
sc 1394 dev/pci/sv.c reg = sv_read_indirect(sc, SV_SRS_SPACE_CONTROL);
sc 1405 dev/pci/sv.c sv_init_mixer(sc)
sc 1406 dev/pci/sv.c struct sv_softc *sc;
sc 1415 dev/pci/sv.c sv_mixer_set_port(sc, &cp);
sc 1422 dev/pci/sv.c sv_mixer_set_port(sc, &cp);
sc 1436 dev/pci/sv.c struct sv_softc *sc = addr;
sc 1443 dev/pci/sv.c error = sv_allocmem(sc, size, 16, p);
sc 1448 dev/pci/sv.c p->next = sc->sc_dmas;
sc 1449 dev/pci/sv.c sc->sc_dmas = p;
sc 1459 dev/pci/sv.c struct sv_softc *sc = addr;
sc 1462 dev/pci/sv.c for (p = &sc->sc_dmas; *p; p = &(*p)->next) {
sc 1464 dev/pci/sv.c sv_freemem(sc, *p);
sc 1479 dev/pci/sv.c struct sv_softc *sc = addr;
sc 1482 dev/pci/sv.c for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next)
sc 1486 dev/pci/sv.c return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs,
sc 415 dev/pci/tga.c struct tga_softc *sc = (struct tga_softc *)self;
sc 428 dev/pci/tga.c sc->sc_dc = &tga_console_dc;
sc 429 dev/pci/tga.c sc->nscreens = 1;
sc 431 dev/pci/tga.c sc->sc_dc = (struct tga_devconfig *)
sc 433 dev/pci/tga.c if (sc->sc_dc == NULL)
sc 435 dev/pci/tga.c bzero(sc->sc_dc, sizeof(struct tga_devconfig));
sc 437 dev/pci/tga.c sc->sc_dc);
sc 439 dev/pci/tga.c if (sc->sc_dc->dc_vaddr == NULL) {
sc 451 dev/pci/tga.c sc->sc_intr = pci_intr_establish(pa->pa_pc, intrh, IPL_TTY, tga_intr,
sc 452 dev/pci/tga.c sc->sc_dc, sc->sc_dev.dv_xname);
sc 453 dev/pci/tga.c if (sc->sc_intr == NULL) {
sc 488 dev/pci/tga.c sc->sc_dc->dc_ramdac_funcs = sc->sc_dc->dc_tgaconf->ramdac_funcs();
sc 489 dev/pci/tga.c if (!sc->sc_dc->dc_tga2) {
sc 493 dev/pci/tga.c (sc->sc_dc->dc_tgaconf->ramdac_funcs == bt485_funcs)
sc 495 dev/pci/tga.c if (sc->sc_dc->dc_tgaconf->ramdac_funcs == bt485_funcs)
sc 496 dev/pci/tga.c sc->sc_dc->dc_ramdac_cookie =
sc 497 dev/pci/tga.c sc->sc_dc->dc_ramdac_funcs->ramdac_register(sc->sc_dc,
sc 500 dev/pci/tga.c sc->sc_dc->dc_ramdac_cookie =
sc 501 dev/pci/tga.c sc->sc_dc->dc_ramdac_funcs->ramdac_register(sc->sc_dc,
sc 505 dev/pci/tga.c sc->sc_dc->dc_ramdac_cookie =
sc 506 dev/pci/tga.c sc->sc_dc->dc_ramdac_funcs->ramdac_register(sc->sc_dc,
sc 510 dev/pci/tga.c if (sc->sc_dc->dc_tgaconf->ramdac_funcs != bt485_funcs)
sc 511 dev/pci/tga.c (*sc->sc_dc->dc_ramdac_funcs->ramdac_set_dotclock)
sc 512 dev/pci/tga.c (sc->sc_dc->dc_ramdac_cookie,
sc 513 dev/pci/tga.c tga_getdotclock(sc->sc_dc));
sc 516 dev/pci/tga.c sc->sc_dc->dc_ramdac_cookie);
sc 522 dev/pci/tga.c (*sc->sc_dc->dc_ramdac_funcs->ramdac_init)(sc->sc_dc->dc_ramdac_cookie);
sc 523 dev/pci/tga.c TGAWREG(sc->sc_dc, TGA_REG_SISR, 0x00000001); /* XXX */
sc 525 dev/pci/tga.c if (sc->sc_dc->dc_tgaconf == NULL) {
sc 529 dev/pci/tga.c printf("board type %s\n", sc->sc_dc->dc_tgaconf->tgac_name);
sc 530 dev/pci/tga.c printf("%s: %d x %d, %dbpp, %s RAMDAC\n", sc->sc_dev.dv_xname,
sc 531 dev/pci/tga.c sc->sc_dc->dc_wid, sc->sc_dc->dc_ht,
sc 532 dev/pci/tga.c sc->sc_dc->dc_tgaconf->tgac_phys_depth,
sc 533 dev/pci/tga.c sc->sc_dc->dc_ramdac_funcs->ramdac_name);
sc 536 dev/pci/tga.c printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
sc 542 dev/pci/tga.c aa.accesscookie = sc;
sc 558 dev/pci/tga.c struct tga_softc *sc = (struct tga_softc *)d;
sc 559 dev/pci/tga.c sc->sc_dc->dc_intrenabled = 1;
sc 571 dev/pci/tga.c struct tga_softc *sc = v;
sc 572 dev/pci/tga.c struct tga_devconfig *dc = sc->sc_dc;
sc 582 dev/pci/tga.c sc->sc_mode = *(u_int *)data;
sc 583 dev/pci/tga.c switch (sc->sc_mode) {
sc 597 dev/pci/tga.c wsd_fbip->height = sc->sc_dc->dc_ht;
sc 598 dev/pci/tga.c wsd_fbip->width = sc->sc_dc->dc_wid;
sc 599 dev/pci/tga.c wsd_fbip->depth = sc->sc_dc->dc_tgaconf->tgac_phys_depth;
sc 605 dev/pci/tga.c *(u_int *)data = sc->sc_dc->dc_rowbytes;
sc 712 dev/pci/tga.c struct tga_softc *sc = v;
sc 713 dev/pci/tga.c struct tga_devconfig *dc = sc->sc_dc;
sc 718 dev/pci/tga.c if (sc->sc_mode == WSDISPLAYIO_MODE_DUMBFB) {
sc 725 dev/pci/tga.c return atop(sc->sc_dc->dc_paddr + offset);
sc 739 dev/pci/tga.c struct tga_softc *sc = v;
sc 742 dev/pci/tga.c if (sc->nscreens > 0)
sc 745 dev/pci/tga.c *cookiep = &sc->sc_dc->dc_rinfo; /* one and only for now */
sc 748 dev/pci/tga.c sc->sc_dc->dc_rinfo.ri_ops.alloc_attr(&sc->sc_dc->dc_rinfo,
sc 751 dev/pci/tga.c sc->nscreens++;
sc 760 dev/pci/tga.c struct tga_softc *sc = v;
sc 762 dev/pci/tga.c if (sc->sc_dc == &tga_console_dc)
sc 765 dev/pci/tga.c sc->nscreens--;
sc 835 dev/pci/tga.c struct tga_softc *sc = v;
sc 838 dev/pci/tga.c tga_unblank(sc->sc_dc);
sc 840 dev/pci/tga.c tga_blank(sc->sc_dc);
sc 106 dev/pci/trm_pci.c struct trm_softc *sc = (void *)self;
sc 111 dev/pci/trm_pci.c unit = sc->sc_device.dv_unit;
sc 121 dev/pci/trm_pci.c printf("%s: unable to map registers\n", sc->sc_device.dv_xname);
sc 128 dev/pci/trm_pci.c sc->sc_iotag = iot;
sc 129 dev/pci/trm_pci.c sc->sc_iohandle = ioh;
sc 130 dev/pci/trm_pci.c sc->sc_dmatag = pa->pa_dmat;
sc 132 dev/pci/trm_pci.c if (trm_init(sc, unit) != 0) {
sc 133 dev/pci/trm_pci.c printf("%s: trm_init failed", sc->sc_device.dv_xname);
sc 141 dev/pci/trm_pci.c printf("%s: couldn't map interrupt\n", sc->sc_device.dv_xname);
sc 146 dev/pci/trm_pci.c if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, trm_Interrupt, sc,
sc 147 dev/pci/trm_pci.c sc->sc_device.dv_xname) == NULL) {
sc 148 dev/pci/trm_pci.c printf("\n%s: couldn't establish interrupt", sc->sc_device.dv_xname);
sc 157 dev/pci/trm_pci.c saa.saa_sc_link = &sc->sc_link;
sc 160 dev/pci/trm_pci.c config_found(&sc->sc_device, &saa, scsiprint);
sc 76 dev/pci/twe_pci.c struct twe_softc *sc = (struct twe_softc *)self;
sc 83 dev/pci/twe_pci.c &sc->iot, &sc->ioh, NULL, &size, 0)) {
sc 87 dev/pci/twe_pci.c sc->dmat = pa->pa_dmat;
sc 91 dev/pci/twe_pci.c bus_space_unmap(sc->iot, sc->ioh, size);
sc 95 dev/pci/twe_pci.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, twe_intr, sc,
sc 96 dev/pci/twe_pci.c sc->sc_dev.dv_xname);
sc 97 dev/pci/twe_pci.c if (!sc->sc_ih) {
sc 102 dev/pci/twe_pci.c bus_space_unmap(sc->iot, sc->ioh, size);
sc 106 dev/pci/twe_pci.c printf(": %s\n%s", intrstr, sc->sc_dev.dv_xname);
sc 108 dev/pci/twe_pci.c if (twe_attach(sc)) {
sc 109 dev/pci/twe_pci.c pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
sc 110 dev/pci/twe_pci.c sc->sc_ih = NULL;
sc 111 dev/pci/twe_pci.c bus_space_unmap(sc->iot, sc->ioh, size);
sc 114 dev/pci/ubsec.c #define READ_REG(sc,r) \
sc 115 dev/pci/ubsec.c bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (r))
sc 117 dev/pci/ubsec.c #define WRITE_REG(sc,reg,val) \
sc 118 dev/pci/ubsec.c bus_space_write_4((sc)->sc_st, (sc)->sc_sh, reg, val)
sc 150 dev/pci/ubsec.c struct ubsec_softc *sc = (struct ubsec_softc *)self;
sc 161 dev/pci/ubsec.c SIMPLEQ_INIT(&sc->sc_queue);
sc 162 dev/pci/ubsec.c SIMPLEQ_INIT(&sc->sc_qchip);
sc 163 dev/pci/ubsec.c SIMPLEQ_INIT(&sc->sc_queue2);
sc 164 dev/pci/ubsec.c SIMPLEQ_INIT(&sc->sc_qchip2);
sc 165 dev/pci/ubsec.c SIMPLEQ_INIT(&sc->sc_q2free);
sc 167 dev/pci/ubsec.c sc->sc_statmask = BS_STAT_MCR1_DONE | BS_STAT_DMAERR;
sc 171 dev/pci/ubsec.c sc->sc_flags |= UBS_FLAGS_KEY | UBS_FLAGS_RNG;
sc 176 dev/pci/ubsec.c sc->sc_flags |= UBS_FLAGS_KEY | UBS_FLAGS_RNG;
sc 182 dev/pci/ubsec.c sc->sc_flags |= UBS_FLAGS_KEY | UBS_FLAGS_RNG |
sc 190 dev/pci/ubsec.c sc->sc_statmask |= BS_STAT_MCR1_ALLEMPTY |
sc 192 dev/pci/ubsec.c sc->sc_flags |= UBS_FLAGS_KEY | UBS_FLAGS_RNG |
sc 197 dev/pci/ubsec.c &sc->sc_st, &sc->sc_sh, NULL, &iosize, 0)) {
sc 201 dev/pci/ubsec.c sc->sc_dmat = pa->pa_dmat;
sc 205 dev/pci/ubsec.c bus_space_unmap(sc->sc_st, sc->sc_sh, iosize);
sc 209 dev/pci/ubsec.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ubsec_intr, sc,
sc 211 dev/pci/ubsec.c if (sc->sc_ih == NULL) {
sc 216 dev/pci/ubsec.c bus_space_unmap(sc->sc_st, sc->sc_sh, iosize);
sc 220 dev/pci/ubsec.c sc->sc_cid = crypto_get_driverid(0);
sc 221 dev/pci/ubsec.c if (sc->sc_cid < 0) {
sc 222 dev/pci/ubsec.c pci_intr_disestablish(pc, sc->sc_ih);
sc 223 dev/pci/ubsec.c bus_space_unmap(sc->sc_st, sc->sc_sh, iosize);
sc 227 dev/pci/ubsec.c SIMPLEQ_INIT(&sc->sc_freequeue);
sc 228 dev/pci/ubsec.c dmap = sc->sc_dmaa;
sc 239 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, sizeof(struct ubsec_dmachunk),
sc 248 dev/pci/ubsec.c sc->sc_queuea[i] = q;
sc 250 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_freequeue, q, q_next);
sc 258 dev/pci/ubsec.c crypto_register(sc->sc_cid, algs, ubsec_newsession,
sc 264 dev/pci/ubsec.c ubsec_reset_board(sc);
sc 274 dev/pci/ubsec.c ubsec_init_board(sc);
sc 279 dev/pci/ubsec.c if (sc->sc_flags & UBS_FLAGS_RNG) {
sc 280 dev/pci/ubsec.c sc->sc_statmask |= BS_STAT_MCR2_DONE;
sc 282 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, sizeof(struct ubsec_mcr),
sc 283 dev/pci/ubsec.c &sc->sc_rng.rng_q.q_mcr, 0))
sc 286 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, sizeof(struct ubsec_ctx_rngbypass),
sc 287 dev/pci/ubsec.c &sc->sc_rng.rng_q.q_ctx, 0)) {
sc 288 dev/pci/ubsec.c ubsec_dma_free(sc, &sc->sc_rng.rng_q.q_mcr);
sc 292 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, sizeof(u_int32_t) *
sc 293 dev/pci/ubsec.c UBSEC_RNG_BUFSIZ, &sc->sc_rng.rng_buf, 0)) {
sc 294 dev/pci/ubsec.c ubsec_dma_free(sc, &sc->sc_rng.rng_q.q_ctx);
sc 295 dev/pci/ubsec.c ubsec_dma_free(sc, &sc->sc_rng.rng_q.q_mcr);
sc 299 dev/pci/ubsec.c timeout_set(&sc->sc_rngto, ubsec_rng, sc);
sc 301 dev/pci/ubsec.c sc->sc_rnghz = hz / 100;
sc 303 dev/pci/ubsec.c sc->sc_rnghz = 1;
sc 304 dev/pci/ubsec.c timeout_add(&sc->sc_rngto, sc->sc_rnghz);
sc 311 dev/pci/ubsec.c if (sc->sc_flags & UBS_FLAGS_KEY) {
sc 312 dev/pci/ubsec.c sc->sc_statmask |= BS_STAT_MCR2_DONE;
sc 320 dev/pci/ubsec.c crypto_kregister(sc->sc_cid, kalgs, ubsec_kprocess);
sc 333 dev/pci/ubsec.c struct ubsec_softc *sc = arg;
sc 339 dev/pci/ubsec.c stat = READ_REG(sc, BS_STAT);
sc 341 dev/pci/ubsec.c stat &= sc->sc_statmask;
sc 345 dev/pci/ubsec.c WRITE_REG(sc, BS_STAT, stat); /* IACK */
sc 351 dev/pci/ubsec.c while (!SIMPLEQ_EMPTY(&sc->sc_qchip)) {
sc 352 dev/pci/ubsec.c q = SIMPLEQ_FIRST(&sc->sc_qchip);
sc 358 dev/pci/ubsec.c SIMPLEQ_REMOVE_HEAD(&sc->sc_qchip, q_next);
sc 368 dev/pci/ubsec.c ubsec_callback(sc, q->q_stacked_mcr[i]);
sc 372 dev/pci/ubsec.c ubsec_callback(sc, q);
sc 380 dev/pci/ubsec.c ubsec_feed(sc);
sc 386 dev/pci/ubsec.c if ((sc->sc_flags & (UBS_FLAGS_KEY|UBS_FLAGS_RNG)) &&
sc 391 dev/pci/ubsec.c while (!SIMPLEQ_EMPTY(&sc->sc_qchip2)) {
sc 392 dev/pci/ubsec.c q2 = SIMPLEQ_FIRST(&sc->sc_qchip2);
sc 394 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, q2->q_mcr.dma_map,
sc 400 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat,
sc 406 dev/pci/ubsec.c SIMPLEQ_REMOVE_HEAD(&sc->sc_qchip2, q_next);
sc 407 dev/pci/ubsec.c ubsec_callback2(sc, q2);
sc 413 dev/pci/ubsec.c ubsec_feed2(sc);
sc 422 dev/pci/ubsec.c volatile u_int32_t a = READ_REG(sc, BS_ERR);
sc 424 dev/pci/ubsec.c printf("%s: dmaerr %s@%08x\n", sc->sc_dv.dv_xname,
sc 428 dev/pci/ubsec.c ubsec_totalreset(sc);
sc 429 dev/pci/ubsec.c ubsec_feed(sc);
sc 440 dev/pci/ubsec.c ubsec_feed(struct ubsec_softc *sc)
sc 450 dev/pci/ubsec.c npkts = sc->sc_nqueue;
sc 456 dev/pci/ubsec.c if ((stat = READ_REG(sc, BS_STAT)) & (BS_STAT_MCR1_FULL | BS_STAT_DMAERR)) {
sc 458 dev/pci/ubsec.c ubsec_totalreset(sc);
sc 470 dev/pci/ubsec.c printf("%s: new max aggregate %d\n", sc->sc_dv.dv_xname, max);
sc 474 dev/pci/ubsec.c q = SIMPLEQ_FIRST(&sc->sc_queue);
sc 475 dev/pci/ubsec.c SIMPLEQ_REMOVE_HEAD(&sc->sc_queue, q_next);
sc 476 dev/pci/ubsec.c --sc->sc_nqueue;
sc 478 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, q->q_src_map,
sc 481 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, q->q_dst_map,
sc 487 dev/pci/ubsec.c q2 = SIMPLEQ_FIRST(&sc->sc_queue);
sc 488 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, q2->q_src_map,
sc 491 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, q2->q_dst_map,
sc 493 dev/pci/ubsec.c SIMPLEQ_REMOVE_HEAD(&sc->sc_queue, q_next);
sc 494 dev/pci/ubsec.c --sc->sc_nqueue;
sc 502 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_qchip, q, q_next);
sc 503 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, q->q_dma->d_alloc.dma_map,
sc 506 dev/pci/ubsec.c WRITE_REG(sc, BS_MCR1, q->q_dma->d_alloc.dma_paddr +
sc 511 dev/pci/ubsec.c while (!SIMPLEQ_EMPTY(&sc->sc_queue)) {
sc 512 dev/pci/ubsec.c if ((stat = READ_REG(sc, BS_STAT)) &
sc 515 dev/pci/ubsec.c ubsec_totalreset(sc);
sc 521 dev/pci/ubsec.c q = SIMPLEQ_FIRST(&sc->sc_queue);
sc 523 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, q->q_src_map,
sc 526 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, q->q_dst_map,
sc 528 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, q->q_dma->d_alloc.dma_map,
sc 532 dev/pci/ubsec.c WRITE_REG(sc, BS_MCR1, q->q_dma->d_alloc.dma_paddr +
sc 538 dev/pci/ubsec.c SIMPLEQ_REMOVE_HEAD(&sc->sc_queue, q_next);
sc 539 dev/pci/ubsec.c --sc->sc_nqueue;
sc 540 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_qchip, q, q_next);
sc 553 dev/pci/ubsec.c struct ubsec_softc *sc = NULL;
sc 563 dev/pci/ubsec.c sc = ubsec_cd.cd_devs[i];
sc 564 dev/pci/ubsec.c if (sc == NULL || sc->sc_cid == (*sidp))
sc 567 dev/pci/ubsec.c if (sc == NULL)
sc 587 dev/pci/ubsec.c if (sc->sc_sessions == NULL) {
sc 588 dev/pci/ubsec.c ses = sc->sc_sessions = (struct ubsec_session *)malloc(
sc 593 dev/pci/ubsec.c sc->sc_nsessions = 1;
sc 595 dev/pci/ubsec.c for (sesn = 0; sesn < sc->sc_nsessions; sesn++) {
sc 596 dev/pci/ubsec.c if (sc->sc_sessions[sesn].ses_used == 0) {
sc 597 dev/pci/ubsec.c ses = &sc->sc_sessions[sesn];
sc 603 dev/pci/ubsec.c sesn = sc->sc_nsessions;
sc 608 dev/pci/ubsec.c bcopy(sc->sc_sessions, ses, sesn *
sc 610 dev/pci/ubsec.c bzero(sc->sc_sessions, sesn *
sc 612 dev/pci/ubsec.c free(sc->sc_sessions, M_DEVBUF);
sc 613 dev/pci/ubsec.c sc->sc_sessions = ses;
sc 614 dev/pci/ubsec.c ses = &sc->sc_sessions[sesn];
sc 615 dev/pci/ubsec.c sc->sc_nsessions++;
sc 688 dev/pci/ubsec.c *sidp = UBSEC_SID(sc->sc_dv.dv_unit, sesn);
sc 698 dev/pci/ubsec.c struct ubsec_softc *sc;
sc 705 dev/pci/ubsec.c sc = ubsec_cd.cd_devs[card];
sc 707 dev/pci/ubsec.c bzero(&sc->sc_sessions[session], sizeof(sc->sc_sessions[session]));
sc 716 dev/pci/ubsec.c struct ubsec_softc *sc;
sc 735 dev/pci/ubsec.c sc = ubsec_cd.cd_devs[card];
sc 739 dev/pci/ubsec.c if (SIMPLEQ_EMPTY(&sc->sc_freequeue)) {
sc 746 dev/pci/ubsec.c q = SIMPLEQ_FIRST(&sc->sc_freequeue);
sc 747 dev/pci/ubsec.c SIMPLEQ_REMOVE_HEAD(&sc->sc_freequeue, q_next);
sc 756 dev/pci/ubsec.c ses = &sc->sc_sessions[q->q_sesn];
sc 920 dev/pci/ubsec.c if (bus_dmamap_create(sc->sc_dmat, 0xfff0, UBS_MAX_SCATTER,
sc 926 dev/pci/ubsec.c if (bus_dmamap_load_mbuf(sc->sc_dmat, q->q_src_map,
sc 928 dev/pci/ubsec.c bus_dmamap_destroy(sc->sc_dmat, q->q_src_map);
sc 934 dev/pci/ubsec.c if (bus_dmamap_load_uio(sc->sc_dmat, q->q_src_map,
sc 936 dev/pci/ubsec.c bus_dmamap_destroy(sc->sc_dmat, q->q_src_map);
sc 1012 dev/pci/ubsec.c if (bus_dmamap_create(sc->sc_dmat, 0xfff0,
sc 1018 dev/pci/ubsec.c if (bus_dmamap_load_uio(sc->sc_dmat, q->q_dst_map,
sc 1020 dev/pci/ubsec.c bus_dmamap_destroy(sc->sc_dmat, q->q_dst_map);
sc 1078 dev/pci/ubsec.c if (bus_dmamap_create(sc->sc_dmat, 0xfff0,
sc 1084 dev/pci/ubsec.c if (bus_dmamap_load_mbuf(sc->sc_dmat,
sc 1087 dev/pci/ubsec.c bus_dmamap_destroy(sc->sc_dmat,
sc 1155 dev/pci/ubsec.c if (sc->sc_flags & UBS_FLAGS_LONGCTX) {
sc 1180 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_queue, q, q_next);
sc 1181 dev/pci/ubsec.c sc->sc_nqueue++;
sc 1184 dev/pci/ubsec.c ubsec_feed(sc);
sc 1194 dev/pci/ubsec.c bus_dmamap_unload(sc->sc_dmat, q->q_dst_map);
sc 1195 dev/pci/ubsec.c bus_dmamap_destroy(sc->sc_dmat, q->q_dst_map);
sc 1198 dev/pci/ubsec.c bus_dmamap_unload(sc->sc_dmat, q->q_src_map);
sc 1199 dev/pci/ubsec.c bus_dmamap_destroy(sc->sc_dmat, q->q_src_map);
sc 1203 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_freequeue, q, q_next);
sc 1217 dev/pci/ubsec.c ubsec_callback(struct ubsec_softc *sc, struct ubsec_q *q)
sc 1226 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, dmap->d_alloc.dma_map, 0,
sc 1230 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, q->q_dst_map,
sc 1232 dev/pci/ubsec.c bus_dmamap_unload(sc->sc_dmat, q->q_dst_map);
sc 1233 dev/pci/ubsec.c bus_dmamap_destroy(sc->sc_dmat, q->q_dst_map);
sc 1235 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, q->q_src_map,
sc 1237 dev/pci/ubsec.c bus_dmamap_unload(sc->sc_dmat, q->q_src_map);
sc 1238 dev/pci/ubsec.c bus_dmamap_destroy(sc->sc_dmat, q->q_src_map);
sc 1254 dev/pci/ubsec.c (caddr_t)sc->sc_sessions[q->q_sesn].ses_iv);
sc 1258 dev/pci/ubsec.c (caddr_t)sc->sc_sessions[q->q_sesn].ses_iv);
sc 1277 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_freequeue, q, q_next);
sc 1322 dev/pci/ubsec.c ubsec_feed2(struct ubsec_softc *sc)
sc 1326 dev/pci/ubsec.c while (!SIMPLEQ_EMPTY(&sc->sc_queue2)) {
sc 1327 dev/pci/ubsec.c if (READ_REG(sc, BS_STAT) & BS_STAT_MCR2_FULL)
sc 1329 dev/pci/ubsec.c q = SIMPLEQ_FIRST(&sc->sc_queue2);
sc 1331 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, q->q_mcr.dma_map, 0,
sc 1334 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, q->q_ctx.dma_map, 0,
sc 1338 dev/pci/ubsec.c WRITE_REG(sc, BS_MCR2, q->q_mcr.dma_paddr);
sc 1339 dev/pci/ubsec.c SIMPLEQ_REMOVE_HEAD(&sc->sc_queue2, q_next);
sc 1340 dev/pci/ubsec.c --sc->sc_nqueue2;
sc 1341 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_qchip2, q, q_next);
sc 1349 dev/pci/ubsec.c ubsec_callback2(struct ubsec_softc *sc, struct ubsec_q2 *q)
sc 1355 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, q->q_ctx.dma_map, 0,
sc 1366 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, rng->rng_buf.dma_map, 0,
sc 1372 dev/pci/ubsec.c timeout_add(&sc->sc_rngto, sc->sc_rnghz);
sc 1384 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, me->me_M.dma_map,
sc 1386 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, me->me_E.dma_map,
sc 1388 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, me->me_C.dma_map,
sc 1390 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, me->me_epb.dma_map,
sc 1396 dev/pci/ubsec.c if (sc->sc_flags & UBS_FLAGS_HWNORM) {
sc 1418 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_q2free, &me->me_q, q_next);
sc 1426 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, rp->rpr_msgin.dma_map, 0,
sc 1428 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, rp->rpr_msgout.dma_map, 0,
sc 1442 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_q2free, &rp->rpr_q, q_next);
sc 1446 dev/pci/ubsec.c printf("%s: unknown ctx op: %x\n", sc->sc_dv.dv_xname,
sc 1456 dev/pci/ubsec.c struct ubsec_softc *sc = vsc;
sc 1457 dev/pci/ubsec.c struct ubsec_q2_rng *rng = &sc->sc_rng;
sc 1467 dev/pci/ubsec.c sc->sc_nqueue2++;
sc 1468 dev/pci/ubsec.c if (sc->sc_nqueue2 >= UBS_MAX_NQUEUE)
sc 1489 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, rng->rng_buf.dma_map, 0,
sc 1492 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_queue2, &rng->rng_q, q_next);
sc 1494 dev/pci/ubsec.c ubsec_feed2(sc);
sc 1503 dev/pci/ubsec.c sc->sc_nqueue2--;
sc 1505 dev/pci/ubsec.c timeout_add(&sc->sc_rngto, sc->sc_rnghz);
sc 1510 dev/pci/ubsec.c ubsec_dma_malloc(struct ubsec_softc *sc, bus_size_t size,
sc 1515 dev/pci/ubsec.c if ((r = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0,
sc 1519 dev/pci/ubsec.c if ((r = bus_dmamem_map(sc->sc_dmat, &dma->dma_seg, dma->dma_nseg,
sc 1523 dev/pci/ubsec.c if ((r = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
sc 1527 dev/pci/ubsec.c if ((r = bus_dmamap_load(sc->sc_dmat, dma->dma_map, dma->dma_vaddr,
sc 1536 dev/pci/ubsec.c bus_dmamap_destroy(sc->sc_dmat, dma->dma_map);
sc 1538 dev/pci/ubsec.c bus_dmamem_unmap(sc->sc_dmat, dma->dma_vaddr, size);
sc 1540 dev/pci/ubsec.c bus_dmamem_free(sc->sc_dmat, &dma->dma_seg, dma->dma_nseg);
sc 1547 dev/pci/ubsec.c ubsec_dma_free(struct ubsec_softc *sc, struct ubsec_dma_alloc *dma)
sc 1549 dev/pci/ubsec.c bus_dmamap_unload(sc->sc_dmat, dma->dma_map);
sc 1550 dev/pci/ubsec.c bus_dmamem_unmap(sc->sc_dmat, dma->dma_vaddr, dma->dma_size);
sc 1551 dev/pci/ubsec.c bus_dmamem_free(sc->sc_dmat, &dma->dma_seg, dma->dma_nseg);
sc 1552 dev/pci/ubsec.c bus_dmamap_destroy(sc->sc_dmat, dma->dma_map);
sc 1560 dev/pci/ubsec.c ubsec_reset_board(struct ubsec_softc *sc)
sc 1564 dev/pci/ubsec.c ctrl = READ_REG(sc, BS_CTRL);
sc 1566 dev/pci/ubsec.c WRITE_REG(sc, BS_CTRL, ctrl);
sc 1578 dev/pci/ubsec.c ubsec_init_board(struct ubsec_softc *sc)
sc 1582 dev/pci/ubsec.c ctrl = READ_REG(sc, BS_CTRL);
sc 1586 dev/pci/ubsec.c if (sc->sc_flags & UBS_FLAGS_KEY)
sc 1591 dev/pci/ubsec.c if (sc->sc_flags & UBS_FLAGS_HWNORM)
sc 1594 dev/pci/ubsec.c WRITE_REG(sc, BS_CTRL, ctrl);
sc 1622 dev/pci/ubsec.c ubsec_cleanchip(struct ubsec_softc *sc)
sc 1626 dev/pci/ubsec.c while (!SIMPLEQ_EMPTY(&sc->sc_qchip)) {
sc 1627 dev/pci/ubsec.c q = SIMPLEQ_FIRST(&sc->sc_qchip);
sc 1628 dev/pci/ubsec.c SIMPLEQ_REMOVE_HEAD(&sc->sc_qchip, q_next);
sc 1629 dev/pci/ubsec.c ubsec_free_q(sc, q);
sc 1638 dev/pci/ubsec.c ubsec_free_q(struct ubsec_softc *sc, struct ubsec_q *q)
sc 1656 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_freequeue, q2, q_next);
sc 1673 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_freequeue, q, q_next);
sc 1685 dev/pci/ubsec.c ubsec_totalreset(struct ubsec_softc *sc)
sc 1687 dev/pci/ubsec.c ubsec_reset_board(sc);
sc 1688 dev/pci/ubsec.c ubsec_init_board(sc);
sc 1689 dev/pci/ubsec.c ubsec_cleanchip(sc);
sc 1710 dev/pci/ubsec.c struct ubsec_softc *sc;
sc 1714 dev/pci/ubsec.c sc = ubsec_cd.cd_devs[i];
sc 1715 dev/pci/ubsec.c if (sc == NULL)
sc 1717 dev/pci/ubsec.c if (sc->sc_cid == krp->krp_hid)
sc 1718 dev/pci/ubsec.c return (sc);
sc 1724 dev/pci/ubsec.c ubsec_kfree(struct ubsec_softc *sc, struct ubsec_q2 *q)
sc 1730 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_q.q_mcr);
sc 1731 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_q.q_ctx);
sc 1732 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_M);
sc 1733 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_E);
sc 1734 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_C);
sc 1735 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_epb);
sc 1742 dev/pci/ubsec.c ubsec_dma_free(sc, &rp->rpr_q.q_mcr);
sc 1743 dev/pci/ubsec.c ubsec_dma_free(sc, &rp->rpr_q.q_ctx);
sc 1744 dev/pci/ubsec.c ubsec_dma_free(sc, &rp->rpr_msgin);
sc 1745 dev/pci/ubsec.c ubsec_dma_free(sc, &rp->rpr_msgout);
sc 1750 dev/pci/ubsec.c printf("%s: invalid kfree 0x%x\n", sc->sc_dv.dv_xname,
sc 1759 dev/pci/ubsec.c struct ubsec_softc *sc;
sc 1764 dev/pci/ubsec.c if ((sc = ubsec_kfind(krp)) == NULL)
sc 1767 dev/pci/ubsec.c while (!SIMPLEQ_EMPTY(&sc->sc_q2free)) {
sc 1770 dev/pci/ubsec.c q = SIMPLEQ_FIRST(&sc->sc_q2free);
sc 1771 dev/pci/ubsec.c SIMPLEQ_REMOVE_HEAD(&sc->sc_q2free, q_next);
sc 1772 dev/pci/ubsec.c ubsec_kfree(sc, q);
sc 1777 dev/pci/ubsec.c if (sc->sc_flags & UBS_FLAGS_HWNORM)
sc 1778 dev/pci/ubsec.c r = ubsec_kprocess_modexp_hw(sc, krp);
sc 1780 dev/pci/ubsec.c r = ubsec_kprocess_modexp_sw(sc, krp);
sc 1783 dev/pci/ubsec.c r = ubsec_kprocess_rsapriv(sc, krp);
sc 1787 dev/pci/ubsec.c sc->sc_dv.dv_xname, krp->krp_op);
sc 1799 dev/pci/ubsec.c ubsec_kprocess_modexp_sw(struct ubsec_softc *sc, struct cryptkop *krp)
sc 1824 dev/pci/ubsec.c else if (sc->sc_flags & UBS_FLAGS_BIGKEY && nbits <= 1536)
sc 1826 dev/pci/ubsec.c else if (sc->sc_flags & UBS_FLAGS_BIGKEY && nbits <= 2048)
sc 1845 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, sizeof(struct ubsec_mcr),
sc 1852 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, sizeof(struct ubsec_ctx_modexp),
sc 1863 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, normbits / 8, &me->me_M, 0)) {
sc 1871 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, normbits / 8, &me->me_C, 0)) {
sc 1882 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, normbits / 8, &me->me_E, 0)) {
sc 1890 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, sizeof(struct ubsec_pktbuf),
sc 1923 dev/pci/ubsec.c sc->sc_dv.dv_xname, letoh32(mcr->mcr_opktbuf.pb_addr));
sc 1926 dev/pci/ubsec.c sc->sc_dv.dv_xname, letoh32(mcr->mcr_opktbuf.pb_len));
sc 1948 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, me->me_M.dma_map,
sc 1950 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, me->me_E.dma_map,
sc 1952 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, me->me_C.dma_map,
sc 1954 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, me->me_epb.dma_map,
sc 1959 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_queue2, &me->me_q, q_next);
sc 1960 dev/pci/ubsec.c ubsec_feed2(sc);
sc 1968 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_q.q_mcr);
sc 1971 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_q.q_ctx);
sc 1975 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_M);
sc 1979 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_E);
sc 1983 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_C);
sc 1986 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_epb);
sc 1998 dev/pci/ubsec.c ubsec_kprocess_modexp_hw(struct ubsec_softc *sc, struct cryptkop *krp)
sc 2023 dev/pci/ubsec.c else if (sc->sc_flags & UBS_FLAGS_BIGKEY && nbits <= 1536)
sc 2025 dev/pci/ubsec.c else if (sc->sc_flags & UBS_FLAGS_BIGKEY && nbits <= 2048)
sc 2045 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, sizeof(struct ubsec_mcr),
sc 2052 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, sizeof(struct ubsec_ctx_modexp),
sc 2063 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, normbits / 8, &me->me_M, 0)) {
sc 2071 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, normbits / 8, &me->me_C, 0)) {
sc 2082 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, normbits / 8, &me->me_E, 0)) {
sc 2090 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, sizeof(struct ubsec_pktbuf),
sc 2123 dev/pci/ubsec.c sc->sc_dv.dv_xname, letoh32(mcr->mcr_opktbuf.pb_addr));
sc 2126 dev/pci/ubsec.c sc->sc_dv.dv_xname, letoh32(mcr->mcr_opktbuf.pb_len));
sc 2147 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, me->me_M.dma_map,
sc 2149 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, me->me_E.dma_map,
sc 2151 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, me->me_C.dma_map,
sc 2153 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, me->me_epb.dma_map,
sc 2158 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_queue2, &me->me_q, q_next);
sc 2159 dev/pci/ubsec.c ubsec_feed2(sc);
sc 2167 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_q.q_mcr);
sc 2170 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_q.q_ctx);
sc 2174 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_M);
sc 2178 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_E);
sc 2182 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_C);
sc 2185 dev/pci/ubsec.c ubsec_dma_free(sc, &me->me_epb);
sc 2194 dev/pci/ubsec.c ubsec_kprocess_rsapriv(struct ubsec_softc *sc, struct cryptkop *krp)
sc 2213 dev/pci/ubsec.c else if (sc->sc_flags & UBS_FLAGS_BIGKEY && padlen <= 768)
sc 2215 dev/pci/ubsec.c else if (sc->sc_flags & UBS_FLAGS_BIGKEY && padlen <= 1024)
sc 2244 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, sizeof(struct ubsec_mcr),
sc 2251 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, sizeof(struct ubsec_ctx_rsapriv),
sc 2292 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, (msglen + 7) / 8, &rp->rpr_msgin, 0)) {
sc 2307 dev/pci/ubsec.c if (ubsec_dma_malloc(sc, (msglen + 7) / 8, &rp->rpr_msgout, 0)) {
sc 2328 dev/pci/ubsec.c sc->sc_dv.dv_xname, rp->rpr_msgin.dma_paddr,
sc 2333 dev/pci/ubsec.c sc->sc_dv.dv_xname, rp->rpr_msgout.dma_paddr,
sc 2347 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, rp->rpr_msgin.dma_map,
sc 2349 dev/pci/ubsec.c bus_dmamap_sync(sc->sc_dmat, rp->rpr_msgout.dma_map,
sc 2354 dev/pci/ubsec.c SIMPLEQ_INSERT_TAIL(&sc->sc_queue2, &rp->rpr_q, q_next);
sc 2355 dev/pci/ubsec.c ubsec_feed2(sc);
sc 2362 dev/pci/ubsec.c ubsec_dma_free(sc, &rp->rpr_q.q_mcr);
sc 2365 dev/pci/ubsec.c ubsec_dma_free(sc, &rp->rpr_msgin);
sc 2369 dev/pci/ubsec.c ubsec_dma_free(sc, &rp->rpr_msgout);
sc 66 dev/pci/uhci_pci.c uhci_softc_t sc;
sc 93 dev/pci/uhci_pci.c struct uhci_pci_softc *sc = (struct uhci_pci_softc *)self;
sc 100 dev/pci/uhci_pci.c char *devname = sc->sc.sc_bus.bdev.dv_xname;
sc 112 dev/pci/uhci_pci.c &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size, 0)) {
sc 120 dev/pci/uhci_pci.c bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
sc 122 dev/pci/uhci_pci.c sc->sc_pc = pc;
sc 123 dev/pci/uhci_pci.c sc->sc_tag = tag;
sc 124 dev/pci/uhci_pci.c sc->sc.sc_bus.dmatag = pa->pa_dmat;
sc 132 dev/pci/uhci_pci.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, uhci_intr, sc,
sc 134 dev/pci/uhci_pci.c if (sc->sc_ih == NULL) {
sc 148 dev/pci/uhci_pci.c sc->sc.sc_bus.usbrev = USBREV_PRE_1_0;
sc 151 dev/pci/uhci_pci.c sc->sc.sc_bus.usbrev = USBREV_1_0;
sc 154 dev/pci/uhci_pci.c sc->sc.sc_bus.usbrev = USBREV_1_1;
sc 157 dev/pci/uhci_pci.c sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
sc 161 dev/pci/uhci_pci.c uhci_run(&sc->sc, 0); /* stop the controller */
sc 163 dev/pci/uhci_pci.c bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
sc 165 dev/pci/uhci_pci.c bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
sc 169 dev/pci/uhci_pci.c sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
sc 171 dev/pci/uhci_pci.c strlcpy(sc->sc.sc_vendor, vendor, sizeof (sc->sc.sc_vendor));
sc 173 dev/pci/uhci_pci.c snprintf(sc->sc.sc_vendor, sizeof (sc->sc.sc_vendor),
sc 179 dev/pci/uhci_pci.c sc->sc.sc_dying = 1;
sc 186 dev/pci/uhci_pci.c bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc 193 dev/pci/uhci_pci.c struct uhci_pci_softc *sc = (struct uhci_pci_softc *)self;
sc 194 dev/pci/uhci_pci.c char *devname = sc->sc.sc_bus.bdev.dv_xname;
sc 200 dev/pci/uhci_pci.c sc->sc.sc_dying = 0;
sc 201 dev/pci/uhci_pci.c r = uhci_init(&sc->sc);
sc 209 dev/pci/uhci_pci.c sc->sc.sc_child = config_found((void *)sc, &sc->sc.sc_bus,
sc 215 dev/pci/uhci_pci.c bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc 222 dev/pci/uhci_pci.c struct uhci_pci_softc *sc = (struct uhci_pci_softc *)self;
sc 225 dev/pci/uhci_pci.c rv = uhci_detach(&sc->sc, flags);
sc 228 dev/pci/uhci_pci.c if (sc->sc_ih != NULL) {
sc 229 dev/pci/uhci_pci.c pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
sc 230 dev/pci/uhci_pci.c sc->sc_ih = NULL;
sc 232 dev/pci/uhci_pci.c if (sc->sc.sc_size) {
sc 233 dev/pci/uhci_pci.c bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
sc 234 dev/pci/uhci_pci.c sc->sc.sc_size = 0;
sc 156 dev/pci/vga_pci.c struct vga_pci_softc *sc = (struct vga_pci_softc *)self;
sc 171 dev/pci/vga_pci.c sc->sc_textmode = vesafb_get_mode(sc);
sc 188 dev/pci/vga_pci.c struct vga_pci_softc *sc = (struct vga_pci_softc *)vc->vc_softc;
sc 190 dev/pci/vga_pci.c if (sc->sc_mode == WSDISPLAYIO_MODE_DUMBFB) {
sc 193 dev/pci/vga_pci.c return atop(sc->sc_base + off);
sc 216 dev/pci/vga_pci.c struct vga_pci_softc *sc = (struct vga_pci_softc *)vc->vc_softc;
sc 229 dev/pci/vga_pci.c vesafb_set_mode(sc, sc->sc_textmode);
sc 230 dev/pci/vga_pci.c sc->sc_mode = mode;
sc 233 dev/pci/vga_pci.c if (sc->sc_gfxmode == -1)
sc 235 dev/pci/vga_pci.c vesafb_set_mode(sc, sc->sc_gfxmode);
sc 236 dev/pci/vga_pci.c sc->sc_mode = mode;
sc 243 dev/pci/vga_pci.c if (sc->sc_gfxmode == -1)
sc 246 dev/pci/vga_pci.c wdf->height = sc->sc_height;
sc 247 dev/pci/vga_pci.c wdf->width = sc->sc_width;
sc 248 dev/pci/vga_pci.c wdf->depth = sc->sc_depth;
sc 253 dev/pci/vga_pci.c if (sc->sc_gfxmode == -1)
sc 255 dev/pci/vga_pci.c *(u_int *)addr = sc->sc_linebytes;
sc 262 dev/pci/vga_pci.c if (sc->sc_depth == 8)
sc 263 dev/pci/vga_pci.c error = vesafb_getcmap(sc,
sc 268 dev/pci/vga_pci.c if (sc->sc_depth == 8)
sc 269 dev/pci/vga_pci.c error = vesafb_putcmap(sc,
sc 274 dev/pci/vga_pci.c *(int *)addr = vesafb_get_supported_depth(sc);
sc 279 dev/pci/vga_pci.c sc->sc_gfxmode = vesafb_find_mode(sc, gfxmode->width,
sc 281 dev/pci/vga_pci.c if (sc->sc_gfxmode == -1)
sc 224 dev/pci/viaenv.c viaenv_refresh_sensor_data(struct viaenv_softc *sc)
sc 230 dev/pci/viaenv.c v = bus_space_read_1(sc->sc_iot, sc->sc_ioh, VIAENV_TIRQ);
sc 231 dev/pci/viaenv.c v2 = bus_space_read_1(sc->sc_iot, sc->sc_ioh, VIAENV_TSENS1);
sc 233 dev/pci/viaenv.c sc->sc_data[0].value = val_to_uK((v2 << 2) | (v >> 6));
sc 235 dev/pci/viaenv.c v = bus_space_read_1(sc->sc_iot, sc->sc_ioh, VIAENV_TLOW);
sc 236 dev/pci/viaenv.c v2 = bus_space_read_1(sc->sc_iot, sc->sc_ioh, VIAENV_TSENS2);
sc 238 dev/pci/viaenv.c sc->sc_data[1].value = val_to_uK((v2 << 2) | ((v >> 4) & 0x3));
sc 240 dev/pci/viaenv.c v2 = bus_space_read_1(sc->sc_iot, sc->sc_ioh, VIAENV_TSENS3);
sc 242 dev/pci/viaenv.c sc->sc_data[2].value = val_to_uK((v2 << 2) | (v >> 6));
sc 244 dev/pci/viaenv.c v = bus_space_read_1(sc->sc_iot, sc->sc_ioh, VIAENV_FANCONF);
sc 246 dev/pci/viaenv.c sc->sc_fan_div[0] = 1 << ((v >> 4) & 0x3);
sc 247 dev/pci/viaenv.c sc->sc_fan_div[1] = 1 << ((v >> 6) & 0x3);
sc 251 dev/pci/viaenv.c v = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 254 dev/pci/viaenv.c sc->sc_fan_div[i - 3]));
sc 255 dev/pci/viaenv.c sc->sc_data[i].value = val_to_rpm(v, sc->sc_fan_div[i - 3]);
sc 260 dev/pci/viaenv.c v = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 263 dev/pci/viaenv.c sc->sc_data[i].value = val_to_uV(v, i - 5);
sc 270 dev/pci/viaenv.c struct viaenv_softc *sc = (struct viaenv_softc *) self;
sc 281 dev/pci/viaenv.c sc->sc_iot = pa->pa_iot;
sc 282 dev/pci/viaenv.c if (bus_space_map(sc->sc_iot, iobase & 0xff80, 128, 0, &sc->sc_ioh)) {
sc 288 dev/pci/viaenv.c sc->sc_data[i].type = SENSOR_TEMP;
sc 292 dev/pci/viaenv.c sc->sc_data[i].type = SENSOR_FANRPM;
sc 296 dev/pci/viaenv.c sc->sc_data[i].type = SENSOR_VOLTS_DC;
sc 298 dev/pci/viaenv.c strlcpy(sc->sc_data[5].desc, "VSENS1",
sc 299 dev/pci/viaenv.c sizeof(sc->sc_data[5].desc)); /* CPU core (2V) */
sc 300 dev/pci/viaenv.c strlcpy(sc->sc_data[6].desc, "VSENS2",
sc 301 dev/pci/viaenv.c sizeof(sc->sc_data[6].desc)); /* NB core? (2.5V) */
sc 302 dev/pci/viaenv.c strlcpy(sc->sc_data[7].desc, "Vcore",
sc 303 dev/pci/viaenv.c sizeof(sc->sc_data[7].desc)); /* Vcore (3.3V) */
sc 304 dev/pci/viaenv.c strlcpy(sc->sc_data[8].desc, "VSENS3",
sc 305 dev/pci/viaenv.c sizeof(sc->sc_data[8].desc)); /* VSENS3 (5V) */
sc 306 dev/pci/viaenv.c strlcpy(sc->sc_data[9].desc, "VSENS4",
sc 307 dev/pci/viaenv.c sizeof(sc->sc_data[9].desc)); /* VSENS4 (12V) */
sc 310 dev/pci/viaenv.c viaenv_refresh_sensor_data(sc);
sc 313 dev/pci/viaenv.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 314 dev/pci/viaenv.c sizeof(sc->sc_sensordev.xname));
sc 316 dev/pci/viaenv.c sensor_attach(&sc->sc_sensordev, &sc->sc_data[i]);
sc 317 dev/pci/viaenv.c sensordev_install(&sc->sc_sensordev);
sc 320 dev/pci/viaenv.c timeout_set(&viaenv_timeout, viaenv_refresh, sc);
sc 334 dev/pci/viaenv.c if (bus_space_map(sc->sc_iot, PCI_MAPREG_IO_ADDR(iobase),
sc 335 dev/pci/viaenv.c VIAENV_PMSIZE, 0, &sc->sc_pm_ioh)) {
sc 345 dev/pci/viaenv.c viaenv_timecounter.tc_priv = sc;
sc 360 dev/pci/viaenv.c struct viaenv_softc *sc = (struct viaenv_softc *)arg;
sc 362 dev/pci/viaenv.c viaenv_refresh_sensor_data(sc);
sc 370 dev/pci/viaenv.c struct viaenv_softc *sc = tc->tc_priv;
sc 373 dev/pci/viaenv.c u2 = bus_space_read_4(sc->sc_iot, sc->sc_pm_ioh, VIAENV_PM_TMR);
sc 374 dev/pci/viaenv.c u3 = bus_space_read_4(sc->sc_iot, sc->sc_pm_ioh, VIAENV_PM_TMR);
sc 378 dev/pci/viaenv.c u3 = bus_space_read_4(sc->sc_iot, sc->sc_pm_ioh,
sc 147 dev/pci/viapm.c struct viapm_softc *sc = (struct viapm_softc *)self;
sc 157 dev/pci/viapm.c sc->sc_iot = pa->pa_iot;
sc 160 dev/pci/viapm.c bus_space_map(sc->sc_iot, iobase & 0xfffe,
sc 161 dev/pci/viapm.c VIAPM_SMB_SIZE, 0, &sc->sc_ioh)) {
sc 180 dev/pci/viapm.c sc->sc_poll = 1;
sc 189 dev/pci/viapm.c sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO,
sc 190 dev/pci/viapm.c viapm_intr, sc, sc->sc_dev.dv_xname);
sc 191 dev/pci/viapm.c if (sc->sc_ih == NULL) {
sc 200 dev/pci/viapm.c sc->sc_poll = 1;
sc 206 dev/pci/viapm.c rw_init(&sc->sc_i2c_lock, "iiclk");
sc 207 dev/pci/viapm.c sc->sc_i2c_tag.ic_cookie = sc;
sc 208 dev/pci/viapm.c sc->sc_i2c_tag.ic_acquire_bus = viapm_i2c_acquire_bus;
sc 209 dev/pci/viapm.c sc->sc_i2c_tag.ic_release_bus = viapm_i2c_release_bus;
sc 210 dev/pci/viapm.c sc->sc_i2c_tag.ic_exec = viapm_i2c_exec;
sc 214 dev/pci/viapm.c iba.iba_tag = &sc->sc_i2c_tag;
sc 220 dev/pci/viapm.c bus_space_unmap(sc->sc_iot, sc->sc_ioh, VIAPM_SMB_SIZE);
sc 226 dev/pci/viapm.c struct viapm_softc *sc = cookie;
sc 228 dev/pci/viapm.c if (cold || sc->sc_poll || (flags & I2C_F_POLL))
sc 231 dev/pci/viapm.c return (rw_enter(&sc->sc_i2c_lock, RW_WRITE | RW_INTR));
sc 237 dev/pci/viapm.c struct viapm_softc *sc = cookie;
sc 239 dev/pci/viapm.c if (cold || sc->sc_poll || (flags & I2C_F_POLL))
sc 242 dev/pci/viapm.c rw_exit(&sc->sc_i2c_lock);
sc 249 dev/pci/viapm.c struct viapm_softc *sc = cookie;
sc 255 dev/pci/viapm.c "flags 0x%x, status 0x%b\n", sc->sc_dev.dv_xname, op, addr,
sc 256 dev/pci/viapm.c cmdlen, len, flags, bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 260 dev/pci/viapm.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, VIAPM_SMB_HS);
sc 261 dev/pci/viapm.c DPRINTF(("%s: exec: st 0x%b\n", sc->sc_dev.dv_xname, st,
sc 266 dev/pci/viapm.c if (cold || sc->sc_poll)
sc 273 dev/pci/viapm.c sc->sc_i2c_xfer.op = op;
sc 274 dev/pci/viapm.c sc->sc_i2c_xfer.buf = buf;
sc 275 dev/pci/viapm.c sc->sc_i2c_xfer.len = len;
sc 276 dev/pci/viapm.c sc->sc_i2c_xfer.flags = flags;
sc 277 dev/pci/viapm.c sc->sc_i2c_xfer.error = 0;
sc 280 dev/pci/viapm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, VIAPM_SMB_TXSLVA,
sc 287 dev/pci/viapm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 294 dev/pci/viapm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 297 dev/pci/viapm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 314 dev/pci/viapm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, VIAPM_SMB_HC, ctl);
sc 320 dev/pci/viapm.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 328 dev/pci/viapm.c viapm_intr(sc);
sc 331 dev/pci/viapm.c if (tsleep(sc, PRIBIO, "iicexec", VIAPM_TIMEOUT * hz))
sc 335 dev/pci/viapm.c if (sc->sc_i2c_xfer.error)
sc 344 dev/pci/viapm.c printf("%s: timeout, status 0x%b\n", sc->sc_dev.dv_xname, st,
sc 346 dev/pci/viapm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, VIAPM_SMB_HC,
sc 349 dev/pci/viapm.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, VIAPM_SMB_HS);
sc 352 dev/pci/viapm.c sc->sc_dev.dv_xname, st, VIAPM_SMB_HS_BITS);
sc 353 dev/pci/viapm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, VIAPM_SMB_HS, st);
sc 360 dev/pci/viapm.c struct viapm_softc *sc = arg;
sc 366 dev/pci/viapm.c st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, VIAPM_SMB_HS);
sc 373 dev/pci/viapm.c DPRINTF(("%s: intr st 0x%b\n", sc->sc_dev.dv_xname, st,
sc 377 dev/pci/viapm.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, VIAPM_SMB_HS, st);
sc 382 dev/pci/viapm.c sc->sc_i2c_xfer.error = 1;
sc 387 dev/pci/viapm.c if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op))
sc 391 dev/pci/viapm.c b = sc->sc_i2c_xfer.buf;
sc 392 dev/pci/viapm.c len = sc->sc_i2c_xfer.len;
sc 394 dev/pci/viapm.c b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 397 dev/pci/viapm.c b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 402 dev/pci/viapm.c if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0)
sc 403 dev/pci/viapm.c wakeup(sc);
sc 104 dev/pci/yds.c #define YWRITE1(sc, r, x) bus_space_write_1((sc)->memt, (sc)->memh, (r), (x))
sc 105 dev/pci/yds.c #define YWRITE2(sc, r, x) bus_space_write_2((sc)->memt, (sc)->memh, (r), (x))
sc 106 dev/pci/yds.c #define YWRITE4(sc, r, x) bus_space_write_4((sc)->memt, (sc)->memh, (r), (x))
sc 107 dev/pci/yds.c #define YREAD1(sc, r) bus_space_read_1((sc)->memt, (sc)->memh, (r))
sc 108 dev/pci/yds.c #define YREAD2(sc, r) bus_space_read_2((sc)->memt, (sc)->memh, (r))
sc 109 dev/pci/yds.c #define YREAD4(sc, r) bus_space_read_4((sc)->memt, (sc)->memh, (r))
sc 112 dev/pci/yds.c u_int16_t YREAD2(struct yds_softc *sc,bus_size_t r);
sc 113 dev/pci/yds.c u_int32_t YREAD4(struct yds_softc *sc,bus_size_t r);
sc 114 dev/pci/yds.c void YWRITE1(struct yds_softc *sc,bus_size_t r,u_int8_t x);
sc 115 dev/pci/yds.c void YWRITE2(struct yds_softc *sc,bus_size_t r,u_int16_t x);
sc 116 dev/pci/yds.c void YWRITE4(struct yds_softc *sc,bus_size_t r,u_int32_t x);
sc 118 dev/pci/yds.c u_int16_t YREAD2(struct yds_softc *sc,bus_size_t r)
sc 121 dev/pci/yds.c return bus_space_read_2(sc->memt,sc->memh,r);
sc 123 dev/pci/yds.c u_int32_t YREAD4(struct yds_softc *sc,bus_size_t r)
sc 126 dev/pci/yds.c return bus_space_read_4(sc->memt,sc->memh,r);
sc 128 dev/pci/yds.c void YWRITE1(struct yds_softc *sc,bus_size_t r,u_int8_t x)
sc 131 dev/pci/yds.c bus_space_write_1(sc->memt,sc->memh,r,x);
sc 133 dev/pci/yds.c void YWRITE2(struct yds_softc *sc,bus_size_t r,u_int16_t x)
sc 136 dev/pci/yds.c bus_space_write_2(sc->memt,sc->memh,r,x);
sc 138 dev/pci/yds.c void YWRITE4(struct yds_softc *sc,bus_size_t r,u_int32_t x)
sc 141 dev/pci/yds.c bus_space_write_4(sc->memt,sc->memh,r,x);
sc 145 dev/pci/yds.c #define YWRITEREGION4(sc, r, x, c) \
sc 146 dev/pci/yds.c bus_space_write_region_4((sc)->memt, (sc)->memh, (r), (x), (c) / 4)
sc 178 dev/pci/yds.c int yds_attach_codec(void *sc, struct ac97_codec_if *);
sc 179 dev/pci/yds.c int yds_read_codec(void *sc, u_int8_t a, u_int16_t *d);
sc 180 dev/pci/yds.c int yds_write_codec(void *sc, u_int8_t a, u_int16_t d);
sc 181 dev/pci/yds.c void yds_reset_codec(void *sc);
sc 198 dev/pci/yds.c int yds_init(void *sc);
sc 203 dev/pci/yds.c #define YDS_DUMP_PLAY_SLOT(n,sc,bank) \
sc 204 dev/pci/yds.c if (ydsdebug > (n)) yds_dump_play_slot(sc, bank)
sc 206 dev/pci/yds.c #define YDS_DUMP_PLAY_SLOT(n,sc,bank)
sc 276 dev/pci/yds.c yds_dump_play_slot(sc, bank)
sc 277 dev/pci/yds.c struct yds_softc *sc;
sc 286 dev/pci/yds.c printf("pbankp[%d] = %p,", i*2, sc->pbankp[i*2]);
sc 287 dev/pci/yds.c printf("pbankp[%d] = %p\n", i*2+1, sc->pbankp[i*2+1]);
sc 290 dev/pci/yds.c p = (u_int32_t*)sc->ptbl;
sc 296 dev/pci/yds.c num = *(u_int32_t*)sc->ptbl;
sc 301 dev/pci/yds.c p = (u_int32_t *)sc->pbankp[i];
sc 303 dev/pci/yds.c dma = yds_find_dma(sc,(void *)p);
sc 349 dev/pci/yds.c yds_download_mcode(sc)
sc 350 dev/pci/yds.c struct yds_softc *sc;
sc 365 dev/pci/yds.c if (sc->sc_flags & YDS_CAP_MCODE_1) {
sc 368 dev/pci/yds.c } else if (sc->sc_flags & YDS_CAP_MCODE_1E) {
sc 378 dev/pci/yds.c sc->sc_dev.dv_xname);
sc 383 dev/pci/yds.c if (yds_disable_dsp(sc)) {
sc 389 dev/pci/yds.c YWRITE4(sc, YDS_MODE, YDS_MODE_RESET);
sc 390 dev/pci/yds.c YWRITE4(sc, YDS_MODE, 0);
sc 392 dev/pci/yds.c YWRITE4(sc, YDS_MAPOF_REC, 0);
sc 393 dev/pci/yds.c YWRITE4(sc, YDS_MAPOF_EFFECT, 0);
sc 394 dev/pci/yds.c YWRITE4(sc, YDS_PLAY_CTRLBASE, 0);
sc 395 dev/pci/yds.c YWRITE4(sc, YDS_REC_CTRLBASE, 0);
sc 396 dev/pci/yds.c YWRITE4(sc, YDS_EFFECT_CTRLBASE, 0);
sc 397 dev/pci/yds.c YWRITE4(sc, YDS_WORK_BASE, 0);
sc 399 dev/pci/yds.c ctrl = YREAD2(sc, YDS_GLOBAL_CONTROL);
sc 400 dev/pci/yds.c YWRITE2(sc, YDS_GLOBAL_CONTROL, ctrl & ~0x0007);
sc 404 dev/pci/yds.c YWRITEREGION4(sc, YDS_DSP_INSTRAM, (u_int32_t *)&yf->data[0],
sc 409 dev/pci/yds.c YWRITEREGION4(sc, YDS_CTRL_INSTRAM, p, size);
sc 411 dev/pci/yds.c yds_enable_dsp(sc);
sc 419 dev/pci/yds.c yds_allocate_slots(sc)
sc 420 dev/pci/yds.c struct yds_softc *sc;
sc 431 dev/pci/yds.c pcs = YREAD4(sc, YDS_PLAY_CTRLSIZE) * sizeof(u_int32_t);
sc 432 dev/pci/yds.c rcs = YREAD4(sc, YDS_REC_CTRLSIZE) * sizeof(u_int32_t);
sc 433 dev/pci/yds.c ecs = YREAD4(sc, YDS_EFFECT_CTRLSIZE) * sizeof(u_int32_t);
sc 435 dev/pci/yds.c YWRITE4(sc, YDS_WORK_SIZE, ws / sizeof(u_int32_t));
sc 444 dev/pci/yds.c sc->sc_dev.dv_xname, (unsigned int)pcs,
sc 449 dev/pci/yds.c sc->sc_dev.dv_xname, (unsigned int)rcs,
sc 458 dev/pci/yds.c p = &sc->sc_ctrldata;
sc 459 dev/pci/yds.c i = yds_allocmem(sc, memsize, 16, p);
sc 462 dev/pci/yds.c sc->sc_dev.dv_xname, i);
sc 470 dev/pci/yds.c mp, (void *) sc->sc_ctrldata.map->dm_segs[0].ds_addr));
sc 477 dev/pci/yds.c YWRITE4(sc, YDS_WORK_BASE, da + cb);
sc 481 dev/pci/yds.c sc->ptbl = (u_int32_t *)(va + cb);
sc 482 dev/pci/yds.c sc->ptbloff = cb;
sc 483 dev/pci/yds.c YWRITE4(sc, YDS_PLAY_CTRLBASE, da + cb);
sc 487 dev/pci/yds.c sc->rbank = (struct rec_slot_ctrl_bank *)(va + cb);
sc 488 dev/pci/yds.c YWRITE4(sc, YDS_REC_CTRLBASE, da + cb);
sc 489 dev/pci/yds.c sc->rbankoff = cb;
sc 494 dev/pci/yds.c YWRITE4(sc, YDS_EFFECT_CTRLBASE, da + cb);
sc 499 dev/pci/yds.c sc->pbankoff = da + cb;
sc 501 dev/pci/yds.c sc->pbankp[i*2] = (struct play_slot_ctrl_bank *)(va + cb);
sc 502 dev/pci/yds.c *(sc->ptbl + i+1) = da + cb;
sc 505 dev/pci/yds.c sc->pbankp[i*2+1] = (struct play_slot_ctrl_bank *)(va + cb);
sc 509 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag, p->map,
sc 510 dev/pci/yds.c sc->ptbloff, (N_PLAY_SLOT_CTRL+1) * sizeof(u_int32_t),
sc 517 dev/pci/yds.c yds_enable_dsp(sc)
sc 518 dev/pci/yds.c struct yds_softc *sc;
sc 520 dev/pci/yds.c YWRITE4(sc, YDS_CONFIG, YDS_DSP_SETUP);
sc 524 dev/pci/yds.c yds_disable_dsp(sc)
sc 525 dev/pci/yds.c struct yds_softc *sc;
sc 530 dev/pci/yds.c data = YREAD4(sc, YDS_CONFIG);
sc 532 dev/pci/yds.c YWRITE4(sc, YDS_CONFIG, YDS_DSP_DISABLE);
sc 535 dev/pci/yds.c if ((YREAD4(sc, YDS_STATUS) & YDS_STAT_WORK) == 0)
sc 574 dev/pci/yds.c yds_configure_legacy (sc)
sc 575 dev/pci/yds.c struct yds_softc *sc;
sc 576 dev/pci/yds.c #define FLEXIBLE (sc->sc_flags & YDS_CAP_LEGACY_FLEXIBLE)
sc 577 dev/pci/yds.c #define SELECTABLE (sc->sc_flags & YDS_CAP_LEGACY_SELECTABLE)
sc 588 dev/pci/yds.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY);
sc 592 dev/pci/yds.c if (sc->sc_flags & YDS_CAP_LEGACY_SMOD_DISABLE)
sc 595 dev/pci/yds.c pci_conf_write(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY, reg);
sc 603 dev/pci/yds.c pci_conf_write(sc->sc_pc, sc->sc_pcitag,
sc 607 dev/pci/yds.c pci_conf_write(sc->sc_pc, sc->sc_pcitag,
sc 609 dev/pci/yds.c if (bus_space_map(sc->sc_opl_iot,
sc 610 dev/pci/yds.c opl_addrs[i], 4, 0, &sc->sc_opl_ioh) == 0) {
sc 615 dev/pci/yds.c dev = config_found(&sc->sc_dev, &aa, audioprint);
sc 617 dev/pci/yds.c bus_space_unmap(sc->sc_opl_iot,
sc 618 dev/pci/yds.c sc->sc_opl_ioh, 4);
sc 628 dev/pci/yds.c pci_conf_write(sc->sc_pc, sc->sc_pcitag,
sc 632 dev/pci/yds.c YWRITE4(sc, YDS_LEGACY_OUT_VOLUME, 0x3fff3fff);
sc 633 dev/pci/yds.c YWRITE4(sc, YDS_LEGACY_REC_VOLUME, 0x3fff3fff);
sc 640 dev/pci/yds.c pci_conf_write(sc->sc_pc, sc->sc_pcitag,
sc 643 dev/pci/yds.c pci_conf_write(sc->sc_pc, sc->sc_pcitag,
sc 645 dev/pci/yds.c if (bus_space_map(sc->sc_mpu_iot,
sc 646 dev/pci/yds.c mpu_addrs[i], 2, 0, &sc->sc_mpu_ioh) == 0) {
sc 651 dev/pci/yds.c dev = config_found(&sc->sc_dev, &aa, audioprint);
sc 653 dev/pci/yds.c bus_space_unmap(sc->sc_mpu_iot,
sc 654 dev/pci/yds.c sc->sc_mpu_ioh, 2);
sc 664 dev/pci/yds.c pci_conf_write(sc->sc_pc, sc->sc_pcitag,
sc 667 dev/pci/yds.c sc->sc_mpu = dev;
sc 678 dev/pci/yds.c struct yds_softc *sc = (struct yds_softc *)self;
sc 689 dev/pci/yds.c &sc->memt, &sc->memh, NULL, &size, 0)) {
sc 690 dev/pci/yds.c printf("%s: can't map memory space\n", sc->sc_dev.dv_xname);
sc 696 dev/pci/yds.c printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
sc 697 dev/pci/yds.c bus_space_unmap(sc->memt, sc->memh, size);
sc 701 dev/pci/yds.c sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, yds_intr, sc,
sc 703 dev/pci/yds.c if (sc->sc_ih == NULL) {
sc 705 dev/pci/yds.c sc->sc_dev.dv_xname);
sc 709 dev/pci/yds.c bus_space_unmap(sc->memt, sc->memh, size);
sc 714 dev/pci/yds.c sc->sc_dmatag = pa->pa_dmat;
sc 715 dev/pci/yds.c sc->sc_pc = pc;
sc 716 dev/pci/yds.c sc->sc_pcitag = pa->pa_tag;
sc 717 dev/pci/yds.c sc->sc_id = pa->pa_id;
sc 718 dev/pci/yds.c sc->sc_revision = PCI_REVISION(pa->pa_class);
sc 719 dev/pci/yds.c sc->sc_flags = yds_get_dstype(sc->sc_id);
sc 720 dev/pci/yds.c if (sc->sc_dev.dv_cfdata->cf_flags & YDS_CAP_LEGACY_SMOD_DISABLE)
sc 721 dev/pci/yds.c sc->sc_flags |= YDS_CAP_LEGACY_SMOD_DISABLE;
sc 724 dev/pci/yds.c printf("%s: chip has %b\n", sc->sc_dev.dv_xname,
sc 725 dev/pci/yds.c YDS_CAP_BITS, sc->sc_flags);
sc 735 dev/pci/yds.c YWRITE2(sc, i, 0);
sc 737 dev/pci/yds.c sc->sc_legacy_iot = pa->pa_iot;
sc 738 dev/pci/yds.c mountroothook_establish(yds_attachhook, sc);
sc 744 dev/pci/yds.c struct yds_softc *sc = xsc;
sc 750 dev/pci/yds.c if (yds_init(sc) == -1)
sc 768 dev/pci/yds.c codec = &sc->sc_codec[i];
sc 769 dev/pci/yds.c memcpy(&codec->sc_dev, &sc->sc_dev, sizeof(codec->sc_dev));
sc 770 dev/pci/yds.c codec->sc = sc;
sc 782 dev/pci/yds.c sc->sc_dev.dv_xname, r);
sc 790 dev/pci/yds.c ctl.dev = yds_get_portnum_by_name(sc, AudioCoutputs,
sc 792 dev/pci/yds.c yds_mixer_set_port(sc, &ctl);
sc 793 dev/pci/yds.c ctl.dev = yds_get_portnum_by_name(sc, AudioCinputs,
sc 795 dev/pci/yds.c yds_mixer_set_port(sc, &ctl);
sc 796 dev/pci/yds.c ctl.dev = yds_get_portnum_by_name(sc, AudioCinputs,
sc 798 dev/pci/yds.c yds_mixer_set_port(sc, &ctl);
sc 799 dev/pci/yds.c ctl.dev = yds_get_portnum_by_name(sc, AudioCrecord,
sc 801 dev/pci/yds.c yds_mixer_set_port(sc, &ctl);
sc 803 dev/pci/yds.c ctl.dev = yds_get_portnum_by_name(sc, AudioCrecord,
sc 807 dev/pci/yds.c yds_mixer_set_port(sc, &ctl);
sc 815 dev/pci/yds.c ctl.dev = sc->sc_codec[0].codec_if->vtbl->get_portnum_by_name(
sc 816 dev/pci/yds.c sc->sc_codec[0].codec_if, AudioCoutputs, AudioNmaster, NULL);
sc 817 dev/pci/yds.c yds_mixer_set_port(sc, &ctl);
sc 819 dev/pci/yds.c audio_attach_mi(&yds_hw_if, sc, &sc->sc_dev);
sc 822 dev/pci/yds.c sc->suspend = PWR_RESUME;
sc 823 dev/pci/yds.c sc->powerhook = powerhook_establish(yds_powerhook, sc);
sc 825 dev/pci/yds.c yds_configure_legacy(sc);
sc 833 dev/pci/yds.c struct yds_codec_softc *sc = sc_;
sc 835 dev/pci/yds.c sc->codec_if = codec_if;
sc 840 dev/pci/yds.c yds_ready_codec(sc)
sc 841 dev/pci/yds.c struct yds_codec_softc *sc;
sc 846 dev/pci/yds.c if ((YREAD2(sc->sc, sc->status_addr) & AC97_BUSY) == 0)
sc 860 dev/pci/yds.c struct yds_codec_softc *sc = sc_;
sc 862 dev/pci/yds.c YWRITE2(sc->sc, AC97_CMD_ADDR, AC97_CMD_READ | AC97_ID(sc->id) | reg);
sc 864 dev/pci/yds.c if (yds_ready_codec(sc)) {
sc 866 dev/pci/yds.c sc->sc->sc_dev.dv_xname);
sc 870 dev/pci/yds.c if (PCI_PRODUCT(sc->sc->sc_id) == PCI_PRODUCT_YAMAHA_YMF744 &&
sc 871 dev/pci/yds.c sc->sc->sc_revision < 2) {
sc 875 dev/pci/yds.c YREAD2(sc->sc, sc->status_data);
sc 877 dev/pci/yds.c *data = YREAD2(sc->sc, sc->status_data);
sc 888 dev/pci/yds.c struct yds_codec_softc *sc = sc_;
sc 890 dev/pci/yds.c YWRITE2(sc->sc, AC97_CMD_ADDR, AC97_CMD_WRITE | AC97_ID(sc->id) | reg);
sc 891 dev/pci/yds.c YWRITE2(sc->sc, AC97_CMD_DATA, data);
sc 893 dev/pci/yds.c if (yds_ready_codec(sc)) {
sc 895 dev/pci/yds.c sc->sc->sc_dev.dv_xname);
sc 910 dev/pci/yds.c struct yds_softc *sc = codec->sc;
sc 914 dev/pci/yds.c reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL);
sc 916 dev/pci/yds.c pci_conf_write(sc->sc_pc, sc->sc_pcitag,
sc 918 dev/pci/yds.c pci_conf_write(sc->sc_pc, sc->sc_pcitag,
sc 920 dev/pci/yds.c pci_conf_write(sc->sc_pc, sc->sc_pcitag,
sc 932 dev/pci/yds.c struct yds_softc *sc = p;
sc 935 dev/pci/yds.c status = YREAD4(sc, YDS_STATUS);
sc 939 dev/pci/yds.c if (sc->sc_mpu)
sc 940 dev/pci/yds.c return mpu_intr(sc->sc_mpu);
sc 946 dev/pci/yds.c YWRITE4(sc, YDS_STATUS, YDS_STAT_TINT);
sc 951 dev/pci/yds.c int nbank = (YREAD4(sc, YDS_CONTROL_SELECT) == 0);
sc 954 dev/pci/yds.c YWRITE4(sc, YDS_STATUS, YDS_STAT_INT);
sc 957 dev/pci/yds.c YWRITE4(sc, YDS_MODE, YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV2);
sc 959 dev/pci/yds.c if (sc->sc_play.intr) {
sc 963 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
sc 964 dev/pci/yds.c sc->pbankoff,
sc 966 dev/pci/yds.c (*sc->ptbl)*
sc 970 dev/pci/yds.c dma = sc->pbankp[nbank]->pgstart * sc->sc_play.factor;
sc 971 dev/pci/yds.c cpu = sc->sc_play.offset;
sc 972 dev/pci/yds.c blk = sc->sc_play.blksize;
sc 973 dev/pci/yds.c len = sc->sc_play.length;
sc 979 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag,
sc 980 dev/pci/yds.c sc->sc_play.dma->map,
sc 983 dev/pci/yds.c sc->sc_play.intr(sc->sc_play.intr_arg);
sc 984 dev/pci/yds.c sc->sc_play.offset += blk;
sc 985 dev/pci/yds.c if (sc->sc_play.offset >= len) {
sc 986 dev/pci/yds.c sc->sc_play.offset -= len;
sc 988 dev/pci/yds.c if (sc->sc_play.offset != 0)
sc 993 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag,
sc 994 dev/pci/yds.c sc->sc_play.dma->map,
sc 999 dev/pci/yds.c if (sc->sc_rec.intr) {
sc 1003 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
sc 1004 dev/pci/yds.c sc->rbankoff,
sc 1010 dev/pci/yds.c dma = sc->rbank[YDS_INPUT_SLOT*2 + nbank].pgstartadr;
sc 1011 dev/pci/yds.c cpu = sc->sc_rec.offset;
sc 1012 dev/pci/yds.c blk = sc->sc_rec.blksize;
sc 1013 dev/pci/yds.c len = sc->sc_rec.length;
sc 1019 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag,
sc 1020 dev/pci/yds.c sc->sc_rec.dma->map,
sc 1023 dev/pci/yds.c sc->sc_rec.intr(sc->sc_rec.intr_arg);
sc 1024 dev/pci/yds.c sc->sc_rec.offset += blk;
sc 1025 dev/pci/yds.c if (sc->sc_rec.offset >= len) {
sc 1026 dev/pci/yds.c sc->sc_rec.offset -= len;
sc 1028 dev/pci/yds.c if (sc->sc_rec.offset != 0)
sc 1033 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag,
sc 1034 dev/pci/yds.c sc->sc_rec.dma->map,
sc 1045 dev/pci/yds.c yds_allocmem(sc, size, align, p)
sc 1046 dev/pci/yds.c struct yds_softc *sc;
sc 1054 dev/pci/yds.c error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0,
sc 1060 dev/pci/yds.c error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size,
sc 1065 dev/pci/yds.c error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size,
sc 1070 dev/pci/yds.c error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL,
sc 1077 dev/pci/yds.c bus_dmamap_destroy(sc->sc_dmatag, p->map);
sc 1079 dev/pci/yds.c bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
sc 1081 dev/pci/yds.c bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
sc 1086 dev/pci/yds.c yds_freemem(sc, p)
sc 1087 dev/pci/yds.c struct yds_softc *sc;
sc 1090 dev/pci/yds.c bus_dmamap_unload(sc->sc_dmatag, p->map);
sc 1091 dev/pci/yds.c bus_dmamap_destroy(sc->sc_dmatag, p->map);
sc 1092 dev/pci/yds.c bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size);
sc 1093 dev/pci/yds.c bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs);
sc 1102 dev/pci/yds.c struct yds_softc *sc = addr;
sc 1106 dev/pci/yds.c YWRITE4(sc, YDS_CONTROL_SELECT, 0);
sc 1109 dev/pci/yds.c mode = YREAD4(sc, YDS_MODE);
sc 1112 dev/pci/yds.c YWRITE4(sc, YDS_MODE, mode);
sc 1124 dev/pci/yds.c struct yds_softc *sc = addr;
sc 1126 dev/pci/yds.c yds_halt_output(sc);
sc 1127 dev/pci/yds.c yds_halt_input(sc);
sc 1128 dev/pci/yds.c yds_halt(sc);
sc 1339 dev/pci/yds.c #define P44 (sc->sc_flags & YDS_CAP_HAS_P44)
sc 1341 dev/pci/yds.c struct yds_softc *sc = addr;
sc 1351 dev/pci/yds.c if (sc->sc_play.intr)
sc 1355 dev/pci/yds.c sc->sc_play.intr = intr;
sc 1356 dev/pci/yds.c sc->sc_play.intr_arg = arg;
sc 1357 dev/pci/yds.c sc->sc_play.offset = 0;
sc 1358 dev/pci/yds.c sc->sc_play.blksize = blksize;
sc 1363 dev/pci/yds.c p = yds_find_dma(sc, start);
sc 1368 dev/pci/yds.c sc->sc_play.dma = p;
sc 1373 dev/pci/yds.c if ((ctrlsize = YREAD4(sc, YDS_PLAY_CTRLSIZE)) !=
sc 1376 dev/pci/yds.c sc->sc_dev.dv_xname, ctrlsize,
sc 1394 dev/pci/yds.c sc->sc_play.length = l;
sc 1396 dev/pci/yds.c *sc->ptbl = channels; /* Num of play */
sc 1398 dev/pci/yds.c sc->sc_play.factor = 1;
sc 1400 dev/pci/yds.c sc->sc_play.factor *= 2;
sc 1402 dev/pci/yds.c sc->sc_play.factor *= 2;
sc 1403 dev/pci/yds.c l /= sc->sc_play.factor;
sc 1405 dev/pci/yds.c psb = sc->pbankp[0];
sc 1424 dev/pci/yds.c psb = sc->pbankp[i*2];
sc 1427 dev/pci/yds.c *psb = *(sc->pbankp[0]);
sc 1443 dev/pci/yds.c *(sc->pbankp[i*2+1]) = *psb;
sc 1446 dev/pci/yds.c YDS_DUMP_PLAY_SLOT(5, sc, 0);
sc 1447 dev/pci/yds.c YDS_DUMP_PLAY_SLOT(5, sc, 1);
sc 1450 dev/pci/yds.c YWRITE4(sc, YDS_P44_OUT_VOLUME, 0x3fff3fff);
sc 1452 dev/pci/yds.c YWRITE4(sc, YDS_DAC_OUT_VOLUME, 0x3fff3fff);
sc 1456 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
sc 1457 dev/pci/yds.c sc->ptbloff,
sc 1462 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag, p->map, 0, blksize,
sc 1465 dev/pci/yds.c YWRITE4(sc, YDS_MODE,
sc 1466 dev/pci/yds.c YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV | YDS_MODE_ACTV2);
sc 1481 dev/pci/yds.c struct yds_softc *sc = addr;
sc 1489 dev/pci/yds.c if (sc->sc_rec.intr)
sc 1492 dev/pci/yds.c sc->sc_rec.intr = intr;
sc 1493 dev/pci/yds.c sc->sc_rec.intr_arg = arg;
sc 1494 dev/pci/yds.c sc->sc_rec.offset = 0;
sc 1495 dev/pci/yds.c sc->sc_rec.blksize = blksize;
sc 1503 dev/pci/yds.c p = yds_find_dma(sc, start);
sc 1508 dev/pci/yds.c sc->sc_rec.dma = p;
sc 1512 dev/pci/yds.c sc->sc_rec.length = l;
sc 1514 dev/pci/yds.c sc->sc_rec.factor = 1;
sc 1516 dev/pci/yds.c sc->sc_rec.factor *= 2;
sc 1518 dev/pci/yds.c sc->sc_rec.factor *= 2;
sc 1520 dev/pci/yds.c rsb = &sc->rbank[0];
sc 1525 dev/pci/yds.c sc->rbank[1] = *rsb;
sc 1526 dev/pci/yds.c sc->rbank[2] = *rsb;
sc 1527 dev/pci/yds.c sc->rbank[3] = *rsb;
sc 1529 dev/pci/yds.c YWRITE4(sc, YDS_ADC_IN_VOLUME, 0x3fff3fff);
sc 1530 dev/pci/yds.c YWRITE4(sc, YDS_REC_IN_VOLUME, 0x3fff3fff);
sc 1536 dev/pci/yds.c YWRITE4(sc, YDS_DAC_REC_VOLUME, 0x3fff3fff);
sc 1537 dev/pci/yds.c YWRITE4(sc, YDS_P44_REC_VOLUME, 0x3fff3fff);
sc 1538 dev/pci/yds.c YWRITE4(sc, YDS_MAPOF_REC, YDS_RECSLOT_VALID);
sc 1539 dev/pci/yds.c YWRITE4(sc, YDS_REC_SAMPLE_RATE, srate);
sc 1540 dev/pci/yds.c YWRITE4(sc, YDS_REC_FORMAT, format);
sc 1542 dev/pci/yds.c YWRITE4(sc, YDS_MAPOF_REC, YDS_ADCSLOT_VALID);
sc 1543 dev/pci/yds.c YWRITE4(sc, YDS_ADC_SAMPLE_RATE, srate);
sc 1544 dev/pci/yds.c YWRITE4(sc, YDS_ADC_FORMAT, format);
sc 1548 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
sc 1549 dev/pci/yds.c sc->rbankoff,
sc 1555 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag, p->map, 0, blksize,
sc 1558 dev/pci/yds.c YWRITE4(sc, YDS_MODE,
sc 1559 dev/pci/yds.c YREAD4(sc, YDS_MODE) | YDS_MODE_ACTV | YDS_MODE_ACTV2);
sc 1565 dev/pci/yds.c yds_halt(sc)
sc 1566 dev/pci/yds.c struct yds_softc *sc;
sc 1571 dev/pci/yds.c mode = YREAD4(sc, YDS_MODE);
sc 1572 dev/pci/yds.c YWRITE4(sc, YDS_MODE, mode & ~(YDS_MODE_ACTV|YDS_MODE_ACTV2));
sc 1575 dev/pci/yds.c YWRITE4(sc, YDS_P44_OUT_VOLUME, 0);
sc 1576 dev/pci/yds.c YWRITE4(sc, YDS_DAC_OUT_VOLUME, 0);
sc 1577 dev/pci/yds.c YWRITE4(sc, YDS_ADC_IN_VOLUME, 0);
sc 1578 dev/pci/yds.c YWRITE4(sc, YDS_REC_IN_VOLUME, 0);
sc 1579 dev/pci/yds.c YWRITE4(sc, YDS_DAC_REC_VOLUME, 0);
sc 1580 dev/pci/yds.c YWRITE4(sc, YDS_P44_REC_VOLUME, 0);
sc 1589 dev/pci/yds.c struct yds_softc *sc = addr;
sc 1592 dev/pci/yds.c if (sc->sc_play.intr) {
sc 1593 dev/pci/yds.c sc->sc_play.intr = 0;
sc 1595 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
sc 1596 dev/pci/yds.c sc->pbankoff,
sc 1598 dev/pci/yds.c (*sc->ptbl)*N_PLAY_SLOT_CTRL_BANK,
sc 1601 dev/pci/yds.c sc->pbankp[0]->status =
sc 1602 dev/pci/yds.c sc->pbankp[1]->status =
sc 1603 dev/pci/yds.c sc->pbankp[2]->status =
sc 1604 dev/pci/yds.c sc->pbankp[3]->status = 1;
sc 1606 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_play.dma->map,
sc 1607 dev/pci/yds.c 0, sc->sc_play.length, BUS_DMASYNC_POSTWRITE);
sc 1617 dev/pci/yds.c struct yds_softc *sc = addr;
sc 1620 dev/pci/yds.c if (sc->sc_rec.intr) {
sc 1622 dev/pci/yds.c YWRITE4(sc, YDS_MAPOF_REC, 0);
sc 1623 dev/pci/yds.c sc->sc_rec.intr = 0;
sc 1625 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_ctrldata.map,
sc 1626 dev/pci/yds.c sc->rbankoff,
sc 1631 dev/pci/yds.c bus_dmamap_sync(sc->sc_dmatag, sc->sc_rec.dma->map,
sc 1632 dev/pci/yds.c 0, sc->sc_rec.length, BUS_DMASYNC_POSTREAD);
sc 1634 dev/pci/yds.c sc->sc_rec.intr = NULL;
sc 1654 dev/pci/yds.c struct yds_softc *sc = addr;
sc 1656 dev/pci/yds.c return (sc->sc_codec[0].codec_if->vtbl->mixer_set_port(
sc 1657 dev/pci/yds.c sc->sc_codec[0].codec_if, cp));
sc 1665 dev/pci/yds.c struct yds_softc *sc = addr;
sc 1667 dev/pci/yds.c return (sc->sc_codec[0].codec_if->vtbl->mixer_get_port(
sc 1668 dev/pci/yds.c sc->sc_codec[0].codec_if, cp));
sc 1676 dev/pci/yds.c struct yds_softc *sc = addr;
sc 1678 dev/pci/yds.c return (sc->sc_codec[0].codec_if->vtbl->query_devinfo(
sc 1679 dev/pci/yds.c sc->sc_codec[0].codec_if, dip));
sc 1683 dev/pci/yds.c yds_get_portnum_by_name(sc, class, device, qualifier)
sc 1684 dev/pci/yds.c struct yds_softc *sc;
sc 1687 dev/pci/yds.c return (sc->sc_codec[0].codec_if->vtbl->get_portnum_by_name(
sc 1688 dev/pci/yds.c sc->sc_codec[0].codec_if, class, device, qualifier));
sc 1698 dev/pci/yds.c struct yds_softc *sc = addr;
sc 1705 dev/pci/yds.c error = yds_allocmem(sc, size, 16, p);
sc 1710 dev/pci/yds.c p->next = sc->sc_dmas;
sc 1711 dev/pci/yds.c sc->sc_dmas = p;
sc 1721 dev/pci/yds.c struct yds_softc *sc = addr;
sc 1724 dev/pci/yds.c for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) {
sc 1726 dev/pci/yds.c yds_freemem(sc, p);
sc 1735 dev/pci/yds.c yds_find_dma(sc, addr)
sc 1736 dev/pci/yds.c struct yds_softc *sc;
sc 1741 dev/pci/yds.c for (p = sc->sc_dmas; p && KERNADDR(p) != addr; p = p->next)
sc 1768 dev/pci/yds.c struct yds_softc *sc = addr;
sc 1773 dev/pci/yds.c p = yds_find_dma(sc, mem);
sc 1776 dev/pci/yds.c return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs,
sc 1793 dev/pci/yds.c struct yds_softc *sc = (struct yds_softc *)self;
sc 1798 dev/pci/yds.c sc->suspend = why;
sc 1803 dev/pci/yds.c if (sc->suspend == PWR_RESUME) {
sc 1805 dev/pci/yds.c sc->sc_dev.dv_xname);
sc 1806 dev/pci/yds.c sc->suspend = why;
sc 1809 dev/pci/yds.c sc->suspend = why;
sc 1810 dev/pci/yds.c yds_init(sc);
sc 1811 dev/pci/yds.c (sc->sc_codec[0].codec_if->vtbl->restore_ports)(sc->sc_codec[0].codec_if);
sc 1819 dev/pci/yds.c struct yds_softc *sc = sc_;
sc 1822 dev/pci/yds.c pci_chipset_tag_t pc = sc->sc_pc;
sc 1829 dev/pci/yds.c if (yds_download_mcode(sc)) {
sc 1830 dev/pci/yds.c printf("%s: download microcode failed\n", sc->sc_dev.dv_xname);
sc 1834 dev/pci/yds.c if (yds_allocate_slots(sc)) {
sc 1835 dev/pci/yds.c printf("%s: could not allocate slots\n", sc->sc_dev.dv_xname);
sc 1840 dev/pci/yds.c reg = pci_conf_read(pc, sc->sc_pcitag, YDS_PCI_DSCTRL);
sc 1841 dev/pci/yds.c pci_conf_write(pc, sc->sc_pcitag, YDS_PCI_DSCTRL, reg | YDS_DSCTRL_WRST);
sc 1848 dev/pci/yds.c reg = pci_conf_read(pc, sc->sc_pcitag, YDS_PCI_DSCTRL);
sc 1849 dev/pci/yds.c pci_conf_write(pc, sc->sc_pcitag, YDS_PCI_DSCTRL,
sc 1855 dev/pci/yds.c if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0)
sc 1860 dev/pci/yds.c printf("%s: no AC97 available\n", sc->sc_dev.dv_xname);
sc 1867 dev/pci/yds.c if ((YREAD2(sc, YDS_ACTIVITY) & YDS_ACTIVITY_DOCKA) == 0)
sc 1870 dev/pci/yds.c YWRITE2(sc, YDS_GPIO_OCTRL,
sc 1871 dev/pci/yds.c YREAD2(sc, YDS_GPIO_OCTRL) & ~YDS_GPIO_GPO2);
sc 1872 dev/pci/yds.c YWRITE2(sc, YDS_GPIO_FUNCE,
sc 1873 dev/pci/yds.c (YREAD2(sc, YDS_GPIO_FUNCE)&(~YDS_GPIO_GPC2))|YDS_GPIO_GPE2);
sc 1876 dev/pci/yds.c if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY) == 0)
sc 1883 dev/pci/yds.c YWRITE2(sc, AC97_CMD_ADDR,
sc 1887 dev/pci/yds.c if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY)
sc 1899 dev/pci/yds.c pci_conf_write(pc, sc->sc_pcitag, YDS_PCI_DSCTRL,
sc 1902 dev/pci/yds.c pci_conf_write(pc, sc->sc_pcitag, YDS_PCI_DSCTRL,
sc 1906 dev/pci/yds.c if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0)
sc 334 dev/pci/ydsreg.h struct yds_softc *sc;
sc 344 dev/pckbc/pckbd.c struct pckbd_softc *sc = (void *)self;
sc 355 dev/pckbc/pckbd.c sc->id = &pckbd_consdata;
sc 361 dev/pckbc/pckbd.c (void) pckbc_poll_cmd(sc->id->t_kbctag, sc->id->t_kbcslot,
sc 363 dev/pckbc/pckbd.c sc->sc_enabled = 1;
sc 365 dev/pckbc/pckbd.c sc->id = malloc(sizeof(struct pckbd_internal),
sc 367 dev/pckbc/pckbd.c (void) pckbd_init(sc->id, pa->pa_tag, pa->pa_slot, 0);
sc 371 dev/pckbc/pckbd.c (void) pckbc_poll_cmd(sc->id->t_kbctag, sc->id->t_kbcslot,
sc 373 dev/pckbc/pckbd.c sc->sc_enabled = 0;
sc 376 dev/pckbc/pckbd.c sc->id->t_sc = sc;
sc 378 dev/pckbc/pckbd.c pckbc_set_inputhandler(sc->id->t_kbctag, sc->id->t_kbcslot,
sc 379 dev/pckbc/pckbd.c pckbd_input, sc, sc->sc_dev.dv_xname);
sc 386 dev/pckbc/pckbd.c a.accesscookie = sc;
sc 392 dev/pckbc/pckbd.c sc->sc_wskbddev = config_found(self, &a, wskbddevprint);
sc 400 dev/pckbc/pckbd.c struct pckbd_softc *sc = v;
sc 405 dev/pckbc/pckbd.c if (sc->sc_enabled)
sc 408 dev/pckbc/pckbd.c pckbc_slot_enable(sc->id->t_kbctag, sc->id->t_kbcslot, 1);
sc 411 dev/pckbc/pckbd.c res = pckbc_poll_cmd(sc->id->t_kbctag, sc->id->t_kbcslot,
sc 418 dev/pckbc/pckbd.c res = pckbd_set_xtscancode(sc->id->t_kbctag,
sc 419 dev/pckbc/pckbd.c sc->id->t_kbcslot);
sc 423 dev/pckbc/pckbd.c sc->sc_enabled = 1;
sc 425 dev/pckbc/pckbd.c if (sc->id->t_isconsole)
sc 429 dev/pckbc/pckbd.c res = pckbc_enqueue_cmd(sc->id->t_kbctag, sc->id->t_kbcslot,
sc 436 dev/pckbc/pckbd.c pckbc_slot_enable(sc->id->t_kbctag, sc->id->t_kbcslot, 0);
sc 438 dev/pckbc/pckbd.c sc->sc_enabled = 0;
sc 549 dev/pckbc/pckbd.c struct pckbd_softc *sc = v;
sc 554 dev/pckbc/pckbd.c sc->sc_ledstate = cmd[1];
sc 556 dev/pckbc/pckbd.c (void) pckbc_enqueue_cmd(sc->id->t_kbctag, sc->id->t_kbcslot,
sc 569 dev/pckbc/pckbd.c struct pckbd_softc *sc = vsc;
sc 573 dev/pckbc/pckbd.c if (sc->rawkbd) {
sc 575 dev/pckbc/pckbd.c wskbd_rawinput(sc->sc_wskbddev, &d, 1);
sc 579 dev/pckbc/pckbd.c if (pckbd_decode(sc->id, data, &type, &key))
sc 580 dev/pckbc/pckbd.c wskbd_input(sc->sc_wskbddev, type, key);
sc 591 dev/pckbc/pckbd.c struct pckbd_softc *sc = v;
sc 602 dev/pckbc/pckbd.c sc->sc_ledstate = cmd[1];
sc 603 dev/pckbc/pckbd.c res = pckbc_enqueue_cmd(sc->id->t_kbctag, sc->id->t_kbcslot,
sc 608 dev/pckbc/pckbd.c *(int *)data = pckbd_led_decode(sc->sc_ledstate);
sc 621 dev/pckbc/pckbd.c sc->rawkbd = (*(int *)data == WSKBD_RAW);
sc 119 dev/pckbc/pms.c struct pms_softc *sc = (void *)self;
sc 125 dev/pckbc/pms.c sc->sc_kbctag = pa->pa_tag;
sc 126 dev/pckbc/pms.c sc->sc_kbcslot = pa->pa_slot;
sc 143 dev/pckbc/pms.c sc->inputstate = 0;
sc 144 dev/pckbc/pms.c sc->oldbuttons = 0;
sc 146 dev/pckbc/pms.c pckbc_set_inputhandler(sc->sc_kbctag, sc->sc_kbcslot,
sc 147 dev/pckbc/pms.c pmsinput, sc, sc->sc_dev.dv_xname);
sc 150 dev/pckbc/pms.c a.accesscookie = sc;
sc 158 dev/pckbc/pms.c sc->sc_wsmousedev = config_found(self, &a, wsmousedevprint);
sc 165 dev/pckbc/pms.c pckbc_slot_enable(sc->sc_kbctag, sc->sc_kbcslot, 0);
sc 172 dev/pckbc/pms.c struct pms_softc *sc = v;
sc 176 dev/pckbc/pms.c if (sc->sc_enabled)
sc 179 dev/pckbc/pms.c sc->sc_enabled = 1;
sc 180 dev/pckbc/pms.c sc->inputstate = 0;
sc 181 dev/pckbc/pms.c sc->oldbuttons = 0;
sc 183 dev/pckbc/pms.c pckbc_slot_enable(sc->sc_kbctag, sc->sc_kbcslot, 1);
sc 186 dev/pckbc/pms.c res = pckbc_enqueue_cmd(sc->sc_kbctag, sc->sc_kbcslot, cmd, 1, 0, 1, 0);
sc 195 dev/pckbc/pms.c res = pckbc_enqueue_cmd(sc->sc_kbctag, sc->sc_kbcslot, scmd,
sc 201 dev/pckbc/pms.c res = pckbc_enqueue_cmd(sc->sc_kbctag, sc->sc_kbcslot, scmd,
sc 208 dev/pckbc/pms.c res = pckbc_enqueue_cmd(sc->sc_kbctag, sc->sc_kbcslot, scmd,
sc 222 dev/pckbc/pms.c struct pms_softc *sc = v;
sc 227 dev/pckbc/pms.c res = pckbc_enqueue_cmd(sc->sc_kbctag, sc->sc_kbcslot, cmd, 1, 0, 1, 0);
sc 231 dev/pckbc/pms.c pckbc_slot_enable(sc->sc_kbctag, sc->sc_kbcslot, 0);
sc 233 dev/pckbc/pms.c sc->sc_enabled = 0;
sc 244 dev/pckbc/pms.c struct pms_softc *sc = v;
sc 263 dev/pckbc/pms.c i = pckbc_enqueue_cmd(sc->sc_kbctag, sc->sc_kbcslot, kbcmd,
sc 285 dev/pckbc/pms.c struct pms_softc *sc = vsc;
sc 289 dev/pckbc/pms.c if (!sc->sc_enabled) {
sc 294 dev/pckbc/pms.c switch (sc->inputstate) {
sc 298 dev/pckbc/pms.c sc->buttons = ((data & PS2LBUTMASK) ? 0x1 : 0) |
sc 301 dev/pckbc/pms.c ++sc->inputstate;
sc 306 dev/pckbc/pms.c sc->dx = data;
sc 308 dev/pckbc/pms.c sc->dx = (sc->dx == -128) ? -127 : sc->dx;
sc 309 dev/pckbc/pms.c ++sc->inputstate;
sc 315 dev/pckbc/pms.c sc->inputstate = 0;
sc 317 dev/pckbc/pms.c changed = (sc->buttons ^ sc->oldbuttons);
sc 318 dev/pckbc/pms.c sc->oldbuttons = sc->buttons;
sc 320 dev/pckbc/pms.c if (sc->dx || dy || changed)
sc 321 dev/pckbc/pms.c wsmouse_input(sc->sc_wsmousedev,
sc 322 dev/pckbc/pms.c sc->buttons, sc->dx, dy, 0, 0,
sc 155 dev/pckbc/pms_intelli.c struct pmsi_softc *sc = (void *)self;
sc 161 dev/pckbc/pms_intelli.c sc->sc_kbctag = pa->pa_tag;
sc 162 dev/pckbc/pms_intelli.c sc->sc_kbcslot = pa->pa_slot;
sc 187 dev/pckbc/pms_intelli.c sc->inputstate = 0;
sc 188 dev/pckbc/pms_intelli.c sc->oldbuttons = 0;
sc 190 dev/pckbc/pms_intelli.c pckbc_set_inputhandler(sc->sc_kbctag, sc->sc_kbcslot,
sc 191 dev/pckbc/pms_intelli.c pmsiinput, sc, sc->sc_dev.dv_xname);
sc 194 dev/pckbc/pms_intelli.c a.accesscookie = sc;
sc 202 dev/pckbc/pms_intelli.c sc->sc_wsmousedev = config_found(self, &a, wsmousedevprint);
sc 209 dev/pckbc/pms_intelli.c pckbc_slot_enable(sc->sc_kbctag, sc->sc_kbcslot, 0);
sc 216 dev/pckbc/pms_intelli.c struct pmsi_softc *sc = v;
sc 220 dev/pckbc/pms_intelli.c if (sc->sc_enabled)
sc 223 dev/pckbc/pms_intelli.c sc->sc_enabled = 1;
sc 224 dev/pckbc/pms_intelli.c sc->inputstate = 0;
sc 225 dev/pckbc/pms_intelli.c sc->oldbuttons = 0;
sc 227 dev/pckbc/pms_intelli.c pckbc_slot_enable(sc->sc_kbctag, sc->sc_kbcslot, 1);
sc 230 dev/pckbc/pms_intelli.c res = pckbc_enqueue_cmd(sc->sc_kbctag, sc->sc_kbcslot, cmd, 1, 0, 1, 0);
sc 241 dev/pckbc/pms_intelli.c struct pmsi_softc *sc = v;
sc 246 dev/pckbc/pms_intelli.c res = pckbc_enqueue_cmd(sc->sc_kbctag, sc->sc_kbcslot, cmd, 1, 0, 1, 0);
sc 250 dev/pckbc/pms_intelli.c pckbc_slot_enable(sc->sc_kbctag, sc->sc_kbcslot, 0);
sc 252 dev/pckbc/pms_intelli.c sc->sc_enabled = 0;
sc 263 dev/pckbc/pms_intelli.c struct pmsi_softc *sc = v;
sc 282 dev/pckbc/pms_intelli.c i = pckbc_enqueue_cmd(sc->sc_kbctag, sc->sc_kbcslot, kbcmd,
sc 304 dev/pckbc/pms_intelli.c struct pmsi_softc *sc = vsc;
sc 308 dev/pckbc/pms_intelli.c if (!sc->sc_enabled) {
sc 313 dev/pckbc/pms_intelli.c switch (sc->inputstate) {
sc 317 dev/pckbc/pms_intelli.c sc->buttons = ((data & PS2LBUTMASK) ? 0x1 : 0) |
sc 320 dev/pckbc/pms_intelli.c ++sc->inputstate;
sc 325 dev/pckbc/pms_intelli.c sc->dx = data;
sc 327 dev/pckbc/pms_intelli.c sc->dx = (sc->dx == -128) ? -127 : sc->dx;
sc 328 dev/pckbc/pms_intelli.c ++sc->inputstate;
sc 332 dev/pckbc/pms_intelli.c sc->dy = data;
sc 333 dev/pckbc/pms_intelli.c sc->dy = (sc->dy == -128) ? -127 : sc->dy;
sc 334 dev/pckbc/pms_intelli.c ++sc->inputstate;
sc 340 dev/pckbc/pms_intelli.c sc->inputstate = 0;
sc 342 dev/pckbc/pms_intelli.c changed = (sc->buttons ^ sc->oldbuttons);
sc 343 dev/pckbc/pms_intelli.c sc->oldbuttons = sc->buttons;
sc 345 dev/pckbc/pms_intelli.c if (sc->dx || sc->dy || dz || changed)
sc 346 dev/pckbc/pms_intelli.c wsmouse_input(sc->sc_wsmousedev,
sc 347 dev/pckbc/pms_intelli.c sc->buttons, sc->dx, sc->dy, dz, 0,
sc 107 dev/pcmcia/aic_pcmcia.c struct aic_softc *sc = &psc->sc_aic;
sc 139 dev/pcmcia/aic_pcmcia.c sc->sc_iot = psc->sc_pcioh.iot;
sc 140 dev/pcmcia/aic_pcmcia.c sc->sc_ioh = psc->sc_pcioh.ioh;
sc 159 dev/pcmcia/aic_pcmcia.c if (!aic_find(sc->sc_iot, sc->sc_ioh)) {
sc 166 dev/pcmcia/aic_pcmcia.c aicintr, sc, sc->sc_dev.dv_xname);
sc 172 dev/pcmcia/aic_pcmcia.c aicattach(sc);
sc 181 dev/pcmcia/aic_pcmcia.c struct aic_pcmcia_softc *sc= (void *)self;
sc 189 dev/pcmcia/aic_pcmcia.c pcmcia_io_unmap(sc->sc_pf, sc->sc_io_window);
sc 190 dev/pcmcia/aic_pcmcia.c pcmcia_io_free(sc->sc_pf, &sc->sc_pcioh);
sc 167 dev/pcmcia/cfxga.c #define cfxga_read_1(sc, addr) \
sc 168 dev/pcmcia/cfxga.c bus_space_read_1((sc)->sc_pmemh.memt, (sc)->sc_pmemh.memh, \
sc 169 dev/pcmcia/cfxga.c (sc)->sc_offset + (addr))
sc 170 dev/pcmcia/cfxga.c #define cfxga_read_2(sc, addr) \
sc 171 dev/pcmcia/cfxga.c bus_space_read_2((sc)->sc_pmemh.memt, (sc)->sc_pmemh.memh, \
sc 172 dev/pcmcia/cfxga.c (sc)->sc_offset + (addr))
sc 173 dev/pcmcia/cfxga.c #define cfxga_write_1(sc, addr, val) \
sc 174 dev/pcmcia/cfxga.c bus_space_write_1((sc)->sc_pmemh.memt, (sc)->sc_pmemh.memh, \
sc 175 dev/pcmcia/cfxga.c (sc)->sc_offset + (addr), (val))
sc 176 dev/pcmcia/cfxga.c #define cfxga_write_2(sc, addr, val) \
sc 177 dev/pcmcia/cfxga.c bus_space_write_2((sc)->sc_pmemh.memt, (sc)->sc_pmemh.memh, \
sc 178 dev/pcmcia/cfxga.c (sc)->sc_offset + (addr), (val))
sc 180 dev/pcmcia/cfxga.c #define cfxga_stop_memory_blt(sc) \
sc 181 dev/pcmcia/cfxga.c (void)cfxga_read_2(sc, CFREG_BITBLT_DATA)
sc 319 dev/pcmcia/cfxga.c struct cfxga_softc *sc = (void *)dev;
sc 323 dev/pcmcia/cfxga.c if (pcmcia_function_enable(sc->sc_pf) != 0) {
sc 325 dev/pcmcia/cfxga.c sc->sc_dev.dv_xname);
sc 327 dev/pcmcia/cfxga.c cfxga_reset_and_repaint(sc);
sc 331 dev/pcmcia/cfxga.c pcmcia_function_disable(sc->sc_pf);
sc 340 dev/pcmcia/cfxga.c struct cfxga_softc *sc = (void *)self;
sc 347 dev/pcmcia/cfxga.c LIST_INIT(&sc->sc_scr);
sc 348 dev/pcmcia/cfxga.c sc->sc_nscreens = 0;
sc 349 dev/pcmcia/cfxga.c sc->sc_pf = pf;
sc 361 dev/pcmcia/cfxga.c if (pcmcia_mem_alloc(pf, CFXGA_MEM_RANGE, &sc->sc_pmemh) != 0) {
sc 367 dev/pcmcia/cfxga.c &sc->sc_pmemh, &sc->sc_offset, &sc->sc_memwin) != 0) {
sc 369 dev/pcmcia/cfxga.c pcmcia_mem_free(pf, &sc->sc_pmemh);
sc 373 dev/pcmcia/cfxga.c SET(sc->sc_state, CS_MAPPED);
sc 377 dev/pcmcia/cfxga.c sc->sc_mode = WSDISPLAYIO_MODE_EMUL;
sc 385 dev/pcmcia/cfxga.c for (wsd = sc->sc_wsd, i = 0; i < CFXGA_NMODES; wsd++, i++) {
sc 387 dev/pcmcia/cfxga.c wsd->textops = &sc->sc_ops;
sc 388 dev/pcmcia/cfxga.c sc->sc_scrlist[i] = wsd;
sc 390 dev/pcmcia/cfxga.c sc->sc_wsl.nscreens = CFXGA_NMODES;
sc 391 dev/pcmcia/cfxga.c sc->sc_wsl.screens = (const struct wsscreen_descr **)sc->sc_scrlist;
sc 394 dev/pcmcia/cfxga.c waa.scrdata = &sc->sc_wsl;
sc 396 dev/pcmcia/cfxga.c waa.accesscookie = sc;
sc 399 dev/pcmcia/cfxga.c if ((sc->sc_wsdisplay =
sc 402 dev/pcmcia/cfxga.c if (sc->sc_active != NULL)
sc 403 dev/pcmcia/cfxga.c cfxga_clear_screen(sc->sc_active);
sc 405 dev/pcmcia/cfxga.c cfxga_burner(sc, 0, 0);
sc 412 dev/pcmcia/cfxga.c struct cfxga_softc *sc = (void *)dev;
sc 417 dev/pcmcia/cfxga.c if (sc->sc_wsdisplay != NULL) {
sc 418 dev/pcmcia/cfxga.c config_detach(sc->sc_wsdisplay, DETACH_FORCE);
sc 422 dev/pcmcia/cfxga.c if (ISSET(sc->sc_state, CS_MAPPED)) {
sc 423 dev/pcmcia/cfxga.c pcmcia_mem_unmap(sc->sc_pf, sc->sc_memwin);
sc 424 dev/pcmcia/cfxga.c pcmcia_mem_free(sc->sc_pf, &sc->sc_pmemh);
sc 439 dev/pcmcia/cfxga.c struct cfxga_softc *sc = v;
sc 449 dev/pcmcia/cfxga.c mode = type - sc->sc_wsd;
sc 532 dev/pcmcia/cfxga.c bcopy(&ri->ri_ops, &sc->sc_ops, sizeof(sc->sc_ops));
sc 538 dev/pcmcia/cfxga.c scr->scr_sc = sc;
sc 539 dev/pcmcia/cfxga.c LIST_INSERT_HEAD(&sc->sc_scr, scr, scr_link);
sc 540 dev/pcmcia/cfxga.c sc->sc_nscreens++;
sc 553 dev/pcmcia/cfxga.c struct cfxga_softc *sc = (void *)v;
sc 556 dev/pcmcia/cfxga.c mode = cfxga_read_1(sc, CFREG_MODE) & LCD_MODE_SWIVEL_BIT_0;
sc 559 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_MODE, mode | MODE_CRT);
sc 561 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_MODE, mode | MODE_NO_DISPLAY);
sc 567 dev/pcmcia/cfxga.c struct cfxga_softc *sc = v;
sc 572 dev/pcmcia/cfxga.c sc->sc_nscreens--;
sc 574 dev/pcmcia/cfxga.c if (scr == sc->sc_active) {
sc 575 dev/pcmcia/cfxga.c sc->sc_active = NULL;
sc 576 dev/pcmcia/cfxga.c cfxga_burner(sc, 0, 0);
sc 586 dev/pcmcia/cfxga.c struct cfxga_softc *sc = v;
sc 598 dev/pcmcia/cfxga.c scr = sc->sc_active;
sc 613 dev/pcmcia/cfxga.c if (mode == sc->sc_mode)
sc 617 dev/pcmcia/cfxga.c cfxga_reset_and_repaint(sc);
sc 624 dev/pcmcia/cfxga.c sc->sc_mode = mode;
sc 658 dev/pcmcia/cfxga.c struct cfxga_softc *sc = v;
sc 662 dev/pcmcia/cfxga.c old = sc->sc_active;
sc 666 dev/pcmcia/cfxga.c sc->sc_active = scr;
sc 667 dev/pcmcia/cfxga.c cfxga_reset_and_repaint(sc); /* will turn video on if scr != NULL */
sc 677 dev/pcmcia/cfxga.c cfxga_reset_video(struct cfxga_softc *sc)
sc 679 dev/pcmcia/cfxga.c struct cfxga_screen *scr = sc->sc_active;
sc 691 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_REV, 0x80 | (CM_REGSEL << 8));
sc 694 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_REV, 0 | (CM_MEMSEL << 8));
sc 697 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_CONTROL, 0);
sc 698 dev/pcmcia/cfxga.c cfxga_stop_memory_blt(sc);
sc 699 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_MODE, 0); /* disable all displays */
sc 705 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_MEMCLK, MEMCLK_SRC_CLK3);
sc 707 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_LCD_PCLK, LCD_PCLK_SRC_CLKI | LCD_PCLK_DIV_1);
sc 708 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_MPLUG_CLK,
sc 711 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_CRTTV_PCLK, CRT_PCLK_SRC_CLKI | CRT_PCLK_DIV_1);
sc 712 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_WSTATE, WSTATE_MCLK);
sc 715 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_MEMCNF,
sc 718 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_DRAM_TIMING, DRAM_TIMING_50MHZ);
sc 730 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_CRT_HWIDTH, (640 / 8) - 1);
sc 732 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_CRT_HNDISP, 23 | (2 << 8));
sc 733 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_CRT_HPULSE, 4);
sc 734 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_CRT_VHEIGHT, 480 - 1);
sc 736 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_CRT_VNDISP, 39 | (8 << 8));
sc 737 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_CRT_VPULSE, 2);
sc 740 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_CRT_HWIDTH, (800 / 8) - 1);
sc 742 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_CRT_HNDISP, 27 | (2 << 8));
sc 743 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_CRT_HPULSE, 4);
sc 744 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_CRT_VHEIGHT, 600 - 1);
sc 746 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_CRT_VNDISP, 25 | (8 << 8));
sc 747 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_CRT_VPULSE, 2);
sc 750 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_CRT_MODE,
sc 752 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_CRT_START_LOW, 0);
sc 753 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_CRT_START_HIGH, 0);
sc 754 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_CRT_MEMORY, ri->ri_width * ri->ri_depth / 16);
sc 755 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_CRT_PANNING, 0);
sc 756 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_CRT_FIFO_THRESHOLD_HIGH, 0);
sc 757 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_CRT_FIFO_THRESHOLD_LOW, 0);
sc 758 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_CRT_CURSOR_CONTROL, CURSOR_INACTIVE);
sc 767 dev/pcmcia/cfxga.c while ((cfxga_read_1(sc, CFREG_CRT_VNDISP) &
sc 771 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_LUT_MODE, LUT_CRT);
sc 772 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_LUT_ADDRESS, 0); /* autoincrements */
sc 775 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_LUT_DATA, *cmap++ & 0xf0);
sc 779 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_TV_CONTROL,
sc 782 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_POWER_CONF, POWERSAVE_MBO);
sc 783 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_WATCHDOG, 0);
sc 785 dev/pcmcia/cfxga.c cfxga_write_1(sc, CFREG_MODE, MODE_CRT);
sc 790 dev/pcmcia/cfxga.c cfxga_reset_and_repaint(struct cfxga_softc *sc)
sc 792 dev/pcmcia/cfxga.c cfxga_reset_video(sc);
sc 794 dev/pcmcia/cfxga.c if (sc->sc_active != NULL)
sc 795 dev/pcmcia/cfxga.c cfxga_repaint_screen(sc->sc_active);
sc 797 dev/pcmcia/cfxga.c cfxga_burner(sc, 0, 0);
sc 804 dev/pcmcia/cfxga.c cfxga_wait(struct cfxga_softc *sc, u_int mask, u_int result)
sc 809 dev/pcmcia/cfxga.c if ((cfxga_read_1(sc, CFREG_BITBLT_CONTROL) & mask) == result)
sc 822 dev/pcmcia/cfxga.c cfxga_synchronize(struct cfxga_softc *sc)
sc 825 dev/pcmcia/cfxga.c if (cfxga_wait(sc, BITBLT_ACTIVE, 0) == 0) {
sc 827 dev/pcmcia/cfxga.c if (ISSET(sc->sc_state, CS_RESET))
sc 830 dev/pcmcia/cfxga.c DPRINTF(("%s: resetting...\n", sc->sc_dev.dv_xname));
sc 831 dev/pcmcia/cfxga.c SET(sc->sc_state, CS_RESET);
sc 832 dev/pcmcia/cfxga.c cfxga_reset_and_repaint(sc);
sc 833 dev/pcmcia/cfxga.c CLR(sc->sc_state, CS_RESET);
sc 836 dev/pcmcia/cfxga.c cfxga_stop_memory_blt(sc);
sc 846 dev/pcmcia/cfxga.c struct cfxga_softc *sc = scr->scr_sc;
sc 861 dev/pcmcia/cfxga.c if ((rc = cfxga_synchronize(sc)) != 0)
sc 864 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_COLOR_EXPANSION,
sc 866 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_SRC_LOW, font->fontwidth <= 8 ? 0 : 1);
sc 867 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_SRC_HIGH, 0);
sc 868 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_DST_LOW, pos);
sc 869 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_DST_HIGH, pos >> 16);
sc 870 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_OFFSET,
sc 872 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_WIDTH, font->fontwidth - 1);
sc 873 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_HEIGHT, font->fontheight - 1);
sc 874 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_FG, ri->ri_devcmap[fg]);
sc 875 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_BG, ri->ri_devcmap[bg]);
sc 876 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_CONTROL, BITBLT_ACTIVE |
sc 879 dev/pcmcia/cfxga.c if (cfxga_wait(sc, BITBLT_ACTIVE, BITBLT_ACTIVE) == 0)
sc 889 dev/pcmcia/cfxga.c sts = cfxga_read_1(sc, CFREG_BITBLT_CONTROL);
sc 900 dev/pcmcia/cfxga.c if (cfxga_wait(sc, BITBLT_FIFO_FULL, 0) == 0)
sc 914 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_DATA, chunk);
sc 923 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_CONTROL, 0);
sc 924 dev/pcmcia/cfxga.c cfxga_stop_memory_blt(sc);
sc 976 dev/pcmcia/cfxga.c struct cfxga_softc *sc = scr->scr_sc;
sc 984 dev/pcmcia/cfxga.c if ((rc = cfxga_synchronize(sc)) != 0)
sc 987 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_ROP, 0 | (OP_SOLID_FILL << 8));
sc 988 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_SRC_LOW, pos);
sc 989 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_SRC_HIGH, pos >> 16);
sc 990 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_DST_LOW, pos);
sc 991 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_DST_HIGH, pos >> 16);
sc 992 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_OFFSET,
sc 994 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_WIDTH, cx - 1);
sc 995 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_HEIGHT, cy - 1);
sc 996 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_FG, (u_int16_t)srccolor);
sc 997 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_CONTROL, BITBLT_ACTIVE |
sc 1010 dev/pcmcia/cfxga.c struct cfxga_softc *sc = scr->scr_sc;
sc 1025 dev/pcmcia/cfxga.c if ((rc = cfxga_synchronize(sc)) != 0)
sc 1028 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_ROP, opcode);
sc 1029 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_SRC_LOW, srcpos);
sc 1030 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_SRC_HIGH, srcpos >> 16);
sc 1031 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_DST_LOW, dstpos);
sc 1032 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_DST_HIGH, dstpos >> 16);
sc 1033 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_OFFSET,
sc 1035 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_WIDTH, cx - 1);
sc 1036 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_HEIGHT, cy - 1);
sc 1037 dev/pcmcia/cfxga.c cfxga_write_2(sc, CFREG_BITBLT_CONTROL, BITBLT_ACTIVE |
sc 235 dev/pcmcia/com_pcmcia.c struct com_pcmcia_softc *sc = (void *) dev;
sc 241 dev/pcmcia/com_pcmcia.c pcmcia_function_enable(sc->sc_pf);
sc 242 dev/pcmcia/com_pcmcia.c sc->sc_ih = pcmcia_intr_establish(sc->sc_pf, IPL_TTY,
sc 243 dev/pcmcia/com_pcmcia.c comintr, sc, sc->sc_com.sc_dev.dv_xname);
sc 247 dev/pcmcia/com_pcmcia.c pcmcia_intr_disestablish(sc->sc_pf, sc->sc_ih);
sc 248 dev/pcmcia/com_pcmcia.c pcmcia_function_disable(sc->sc_pf);
sc 261 dev/pcmcia/com_pcmcia.c struct com_softc *sc = &psc->sc_com;
sc 301 dev/pcmcia/com_pcmcia.c sc->sc_iot = psc->sc_pcioh.iot;
sc 302 dev/pcmcia/com_pcmcia.c sc->sc_ioh = psc->sc_pcioh.ioh;
sc 306 dev/pcmcia/com_pcmcia.c if (com_pcmcia_enable1(sc))
sc 309 dev/pcmcia/com_pcmcia.c sc->enabled = 1;
sc 323 dev/pcmcia/com_pcmcia.c sc->sc_iobase = -1;
sc 324 dev/pcmcia/com_pcmcia.c sc->enable = com_pcmcia_enable;
sc 325 dev/pcmcia/com_pcmcia.c sc->disable = com_pcmcia_disable;
sc 326 dev/pcmcia/com_pcmcia.c sc->sc_frequency = COM_FREQ;
sc 328 dev/pcmcia/com_pcmcia.c sc->sc_hwflags = 0;
sc 329 dev/pcmcia/com_pcmcia.c sc->sc_swflags = 0;
sc 331 dev/pcmcia/com_pcmcia.c if (psc->sc_pf->sc->card.manufacturer == PCMCIA_VENDOR_AUDIOVOX &&
sc 332 dev/pcmcia/com_pcmcia.c psc->sc_pf->sc->card.product == PCMCIA_PRODUCT_AUDIOVOX_RTM8000)
sc 333 dev/pcmcia/com_pcmcia.c sc->sc_fifolen = 16;
sc 335 dev/pcmcia/com_pcmcia.c com_attach_subr(sc);
sc 338 dev/pcmcia/com_pcmcia.c psc->sc_ih = pcmcia_intr_establish(pa->pf, IPL_TTY, comintr, sc,
sc 339 dev/pcmcia/com_pcmcia.c sc->sc_dev.dv_xname);
sc 345 dev/pcmcia/com_pcmcia.c sc->enabled = 0;
sc 347 dev/pcmcia/com_pcmcia.c com_pcmcia_disable1(sc);
sc 371 dev/pcmcia/com_pcmcia.c com_pcmcia_enable(sc)
sc 372 dev/pcmcia/com_pcmcia.c struct com_softc *sc;
sc 374 dev/pcmcia/com_pcmcia.c struct com_pcmcia_softc *psc = (struct com_pcmcia_softc *) sc;
sc 378 dev/pcmcia/com_pcmcia.c psc->sc_ih = pcmcia_intr_establish(pf, IPL_TTY, comintr, sc,
sc 379 dev/pcmcia/com_pcmcia.c sc->sc_dev.dv_xname);
sc 382 dev/pcmcia/com_pcmcia.c sc->sc_dev.dv_xname);
sc 385 dev/pcmcia/com_pcmcia.c return com_pcmcia_enable1(sc);
sc 389 dev/pcmcia/com_pcmcia.c com_pcmcia_enable1(sc)
sc 390 dev/pcmcia/com_pcmcia.c struct com_softc *sc;
sc 392 dev/pcmcia/com_pcmcia.c struct com_pcmcia_softc *psc = (struct com_pcmcia_softc *) sc;
sc 399 dev/pcmcia/com_pcmcia.c if ((psc->sc_pf->sc->card.product == PCMCIA_PRODUCT_3COM_3C562) ||
sc 400 dev/pcmcia/com_pcmcia.c (psc->sc_pf->sc->card.product == PCMCIA_PRODUCT_3COM_3CXEM556) ||
sc 401 dev/pcmcia/com_pcmcia.c (psc->sc_pf->sc->card.product == PCMCIA_PRODUCT_3COM_3CXEM556B)) {
sc 417 dev/pcmcia/com_pcmcia.c com_pcmcia_disable(sc)
sc 418 dev/pcmcia/com_pcmcia.c struct com_softc *sc;
sc 420 dev/pcmcia/com_pcmcia.c struct com_pcmcia_softc *psc = (struct com_pcmcia_softc *) sc;
sc 423 dev/pcmcia/com_pcmcia.c com_pcmcia_disable1(sc);
sc 427 dev/pcmcia/com_pcmcia.c com_pcmcia_disable1(sc)
sc 428 dev/pcmcia/com_pcmcia.c struct com_softc *sc;
sc 430 dev/pcmcia/com_pcmcia.c struct com_pcmcia_softc *psc = (struct com_pcmcia_softc *) sc;
sc 161 dev/pcmcia/esp_pcmcia.c struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
sc 205 dev/pcmcia/esp_pcmcia.c ncr53c9x_intr, &esc->sc_ncr53c9x, sc->sc_dev.dv_xname);
sc 218 dev/pcmcia/esp_pcmcia.c ncr53c9x_attach(sc, &esp_pcmcia_adapter, NULL);
sc 239 dev/pcmcia/esp_pcmcia.c struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
sc 245 dev/pcmcia/esp_pcmcia.c sc->sc_glue = &esp_pcmcia_glue;
sc 251 dev/pcmcia/esp_pcmcia.c sc->sc_rev = NCR_VARIANT_ESP406;
sc 252 dev/pcmcia/esp_pcmcia.c sc->sc_id = 7;
sc 253 dev/pcmcia/esp_pcmcia.c sc->sc_freq = 40;
sc 255 dev/pcmcia/esp_pcmcia.c sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB | NCRCFG1_SLOW;
sc 257 dev/pcmcia/esp_pcmcia.c sc->sc_cfg2 = NCRCFG2_SCSI2;
sc 259 dev/pcmcia/esp_pcmcia.c sc->sc_cfg3 = NCRESPCFG3_CDB | NCRESPCFG3_FCLK | NCRESPCFG3_IDM |
sc 261 dev/pcmcia/esp_pcmcia.c sc->sc_cfg4 = NCRCFG4_ACTNEG;
sc 263 dev/pcmcia/esp_pcmcia.c sc->sc_cfg5 = NCRCFG5_CRS1 | NCRCFG5_AADDR | NCRCFG5_PTRINC;
sc 264 dev/pcmcia/esp_pcmcia.c sc->sc_minsync = 0;
sc 265 dev/pcmcia/esp_pcmcia.c sc->sc_maxxfer = 64 * 1024;
sc 267 dev/pcmcia/esp_pcmcia.c bus_space_write_1(iot, ioh, NCR_CFG5, sc->sc_cfg5);
sc 273 dev/pcmcia/esp_pcmcia.c bus_space_write_1(iot, ioh, NCR_CFG4, sc->sc_cfg4);
sc 369 dev/pcmcia/esp_pcmcia.c esp_pcmcia_read_reg(sc, reg)
sc 370 dev/pcmcia/esp_pcmcia.c struct ncr53c9x_softc *sc;
sc 373 dev/pcmcia/esp_pcmcia.c struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc;
sc 381 dev/pcmcia/esp_pcmcia.c esp_pcmcia_write_reg(sc, reg, val)
sc 382 dev/pcmcia/esp_pcmcia.c struct ncr53c9x_softc *sc;
sc 386 dev/pcmcia/esp_pcmcia.c struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc;
sc 395 dev/pcmcia/esp_pcmcia.c esp_pcmcia_dma_isintr(sc)
sc 396 dev/pcmcia/esp_pcmcia.c struct ncr53c9x_softc *sc;
sc 399 dev/pcmcia/esp_pcmcia.c return NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT;
sc 403 dev/pcmcia/esp_pcmcia.c esp_pcmcia_dma_reset(sc)
sc 404 dev/pcmcia/esp_pcmcia.c struct ncr53c9x_softc *sc;
sc 406 dev/pcmcia/esp_pcmcia.c struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc;
sc 413 dev/pcmcia/esp_pcmcia.c esp_pcmcia_dma_intr(sc)
sc 414 dev/pcmcia/esp_pcmcia.c struct ncr53c9x_softc *sc;
sc 416 dev/pcmcia/esp_pcmcia.c struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc;
sc 422 dev/pcmcia/esp_pcmcia.c printf("%s: dma_intr--inactive DMA\n", sc->sc_dev.dv_xname);
sc 426 dev/pcmcia/esp_pcmcia.c if ((sc->sc_espintr & NCRINTR_BS) == 0) {
sc 434 dev/pcmcia/esp_pcmcia.c sc->sc_dev.dv_xname);
sc 438 dev/pcmcia/esp_pcmcia.c espphase = sc->sc_phase;
sc 439 dev/pcmcia/esp_pcmcia.c espstat = (u_int) sc->sc_espstat;
sc 440 dev/pcmcia/esp_pcmcia.c espintr = (u_int) sc->sc_espintr;
sc 443 dev/pcmcia/esp_pcmcia.c *p++ = NCR_READ_REG(sc, NCR_FIFO);
sc 446 dev/pcmcia/esp_pcmcia.c NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS);
sc 452 dev/pcmcia/esp_pcmcia.c NCR_WRITE_REG(sc, NCR_FIFO, *p++);
sc 454 dev/pcmcia/esp_pcmcia.c NCR_WRITE_REG(sc, NCR_CMD, NCRCMD_TRANS);
sc 460 dev/pcmcia/esp_pcmcia.c while (!(NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT));
sc 461 dev/pcmcia/esp_pcmcia.c espstat = NCR_READ_REG(sc, NCR_STAT);
sc 462 dev/pcmcia/esp_pcmcia.c espintr = NCR_READ_REG(sc, NCR_INTR);
sc 468 dev/pcmcia/esp_pcmcia.c sc->sc_phase = espphase;
sc 469 dev/pcmcia/esp_pcmcia.c sc->sc_espstat = (u_char) espstat;
sc 470 dev/pcmcia/esp_pcmcia.c sc->sc_espintr = (u_char) espintr;
sc 476 dev/pcmcia/esp_pcmcia.c sc->sc_espstat |= esc->sc_tc;
sc 481 dev/pcmcia/esp_pcmcia.c esp_pcmcia_dma_setup(sc, addr, len, datain, dmasize)
sc 482 dev/pcmcia/esp_pcmcia.c struct ncr53c9x_softc *sc;
sc 488 dev/pcmcia/esp_pcmcia.c struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc;
sc 500 dev/pcmcia/esp_pcmcia.c esp_pcmcia_dma_go(sc)
sc 501 dev/pcmcia/esp_pcmcia.c struct ncr53c9x_softc *sc;
sc 503 dev/pcmcia/esp_pcmcia.c struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc;
sc 509 dev/pcmcia/esp_pcmcia.c esp_pcmcia_dma_stop(sc)
sc 510 dev/pcmcia/esp_pcmcia.c struct ncr53c9x_softc *sc;
sc 515 dev/pcmcia/esp_pcmcia.c esp_pcmcia_dma_isactive(sc)
sc 516 dev/pcmcia/esp_pcmcia.c struct ncr53c9x_softc *sc;
sc 518 dev/pcmcia/esp_pcmcia.c struct esp_pcmcia_softc *esc = (struct esp_pcmcia_softc *)sc;
sc 152 dev/pcmcia/gpr.c struct gpr_softc *sc = (void *)self;
sc 162 dev/pcmcia/gpr.c &sc->sc_pioh))
sc 178 dev/pcmcia/gpr.c sc->sc_pioh.size, &sc->sc_pioh, &sc->sc_iowin)) {
sc 186 dev/pcmcia/gpr.c if (pcmcia_mem_alloc(pa->pf, GPR400_MEM_LEN, &sc->sc_pmemh)) {
sc 192 dev/pcmcia/gpr.c GPR400_MEM_LEN, &sc->sc_pmemh, &sc->sc_offset, &sc->sc_memwin)) {
sc 197 dev/pcmcia/gpr.c sc->sc_pf = pa->pf;
sc 198 dev/pcmcia/gpr.c sc->sc_iot = sc->sc_pioh.iot;
sc 199 dev/pcmcia/gpr.c sc->sc_ioh = sc->sc_pioh.ioh;
sc 200 dev/pcmcia/gpr.c sc->sc_memt = sc->sc_pmemh.memt;
sc 201 dev/pcmcia/gpr.c sc->sc_memh = sc->sc_pmemh.memh;
sc 203 dev/pcmcia/gpr.c printf(" port 0x%lx/%d", sc->sc_pioh.addr, sc->sc_pioh.size);
sc 205 dev/pcmcia/gpr.c sc->sc_ih = pcmcia_intr_establish(pa->pf, IPL_TTY, gpr_intr, sc,
sc 206 dev/pcmcia/gpr.c sc->sc_dev.dv_xname);
sc 207 dev/pcmcia/gpr.c intrstr = pcmcia_intr_string(sc->sc_pf, sc->sc_ih);
sc 209 dev/pcmcia/gpr.c if (sc->sc_ih != NULL)
sc 212 dev/pcmcia/gpr.c pcmcia_mem_unmap(pa->pf, sc->sc_memwin);
sc 214 dev/pcmcia/gpr.c pcmcia_mem_free(pa->pf, &sc->sc_pmemh);
sc 216 dev/pcmcia/gpr.c pcmcia_io_unmap(pa->pf, sc->sc_iowin);
sc 220 dev/pcmcia/gpr.c pcmcia_io_free(pa->pf, &sc->sc_pioh);
sc 228 dev/pcmcia/gpr.c struct gpr_softc *sc = (struct gpr_softc *)dev;
sc 230 dev/pcmcia/gpr.c pcmcia_io_unmap(sc->sc_pf, sc->sc_iowin);
sc 231 dev/pcmcia/gpr.c pcmcia_io_free(sc->sc_pf, &sc->sc_pioh);
sc 232 dev/pcmcia/gpr.c pcmcia_mem_unmap(sc->sc_pf, sc->sc_memwin);
sc 233 dev/pcmcia/gpr.c pcmcia_mem_free(sc->sc_pf, &sc->sc_pmemh);
sc 241 dev/pcmcia/gpr.c struct gpr_softc *sc = (struct gpr_softc *)dev;
sc 245 dev/pcmcia/gpr.c pcmcia_function_enable(sc->sc_pf);
sc 246 dev/pcmcia/gpr.c sc->sc_ih = pcmcia_intr_establish(sc->sc_pf, IPL_TTY,
sc 247 dev/pcmcia/gpr.c gpr_intr, sc, sc->sc_dev.dv_xname);
sc 251 dev/pcmcia/gpr.c pcmcia_intr_disestablish(sc->sc_pf, sc->sc_ih);
sc 252 dev/pcmcia/gpr.c pcmcia_function_disable(sc->sc_pf);
sc 263 dev/pcmcia/gpr.c struct gpr_softc *sc;
sc 268 dev/pcmcia/gpr.c (sc = gpr_cd.cd_devs[unit]) == NULL)
sc 271 dev/pcmcia/gpr.c return (tlvput(sc, GPR400_SELECT, "\x02", 1));
sc 278 dev/pcmcia/gpr.c struct gpr_softc *sc = gpr_cd.cd_devs[unit];
sc 282 dev/pcmcia/gpr.c (void)tlvput(sc, GPR400_CLOSE, (u_int8_t *)0, 0);
sc 291 dev/pcmcia/gpr.c struct gpr_softc *sc = gpr_cd.cd_devs[unit];
sc 302 dev/pcmcia/gpr.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, GPR400_HAP_CTRL,
sc 305 dev/pcmcia/gpr.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, GPR400_HAP_CTRL, 0);
sc 306 dev/pcmcia/gpr.c tsleep(sc, PWAIT, "gpreset", hz / 40);
sc 310 dev/pcmcia/gpr.c error = tlvput(sc, GPR400_SELECT, "\x02", 1);
sc 322 dev/pcmcia/gpr.c error = tlvput(sc, GPR400_POWER, mode, 1);
sc 327 dev/pcmcia/gpr.c error = tlvput(sc, GPR400_CLOSE, (u_int8_t *)0, 0);
sc 334 dev/pcmcia/gpr.c bus_space_read_region_1(sc->sc_memt, sc->sc_memh,
sc 335 dev/pcmcia/gpr.c sc->sc_offset, &r, sizeof(struct gpr400_ram));
sc 355 dev/pcmcia/gpr.c struct gpr_softc *sc = arg;
sc 361 dev/pcmcia/gpr.c val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, GPR400_HAP_CTRL);
sc 362 dev/pcmcia/gpr.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, GPR400_HAP_CTRL,
sc 365 dev/pcmcia/gpr.c wakeup(sc);
sc 371 dev/pcmcia/gpr.c tlvput(struct gpr_softc *sc, int cmd, u_int8_t *data, int len)
sc 393 dev/pcmcia/gpr.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, 0x02, cmd);
sc 394 dev/pcmcia/gpr.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, 0x03, n);
sc 397 dev/pcmcia/gpr.c bus_space_write_region_1(sc->sc_iot, sc->sc_ioh,
sc 405 dev/pcmcia/gpr.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, GPR400_HAP_CTRL,
sc 408 dev/pcmcia/gpr.c tsleep(sc, PCATCH, "tlvput", 0);
sc 413 dev/pcmcia/gpr.c ret = bus_space_read_1(sc->sc_iot, sc->sc_ioh, 0x04);
sc 102 dev/pcmcia/if_an_pcmcia.c struct an_softc *sc = (struct an_softc *)self;
sc 131 dev/pcmcia/if_an_pcmcia.c sc->sc_iot = psc->sc_pcioh.iot;
sc 132 dev/pcmcia/if_an_pcmcia.c sc->sc_ioh = psc->sc_pcioh.ioh;
sc 133 dev/pcmcia/if_an_pcmcia.c sc->sc_enabled = 1;
sc 135 dev/pcmcia/if_an_pcmcia.c sc->sc_ih = pcmcia_intr_establish(psc->sc_pf, IPL_NET, an_intr, sc,
sc 136 dev/pcmcia/if_an_pcmcia.c sc->sc_dev.dv_xname);
sc 137 dev/pcmcia/if_an_pcmcia.c intrstr = pcmcia_intr_string(psc->sc_pf, sc->sc_ih);
sc 142 dev/pcmcia/if_an_pcmcia.c error = an_attach(sc);
sc 149 dev/pcmcia/if_an_pcmcia.c sc->sc_enabled = 0;
sc 176 dev/pcmcia/if_an_pcmcia.c struct an_softc *sc = &psc->sc_an;
sc 177 dev/pcmcia/if_an_pcmcia.c struct ieee80211com *ic = &sc->sc_ic;
sc 185 dev/pcmcia/if_an_pcmcia.c sc->sc_ih = pcmcia_intr_establish(psc->sc_pf, IPL_NET,
sc 186 dev/pcmcia/if_an_pcmcia.c an_intr, sc, sc->sc_dev.dv_xname);
sc 194 dev/pcmcia/if_an_pcmcia.c pcmcia_intr_disestablish(psc->sc_pf, sc->sc_ih);
sc 182 dev/pcmcia/if_awi_pcmcia.c awi_pcmcia_enable(sc)
sc 183 dev/pcmcia/if_awi_pcmcia.c struct awi_softc *sc;
sc 185 dev/pcmcia/if_awi_pcmcia.c struct awi_pcmcia_softc *psc = (struct awi_pcmcia_softc *)sc;
sc 189 dev/pcmcia/if_awi_pcmcia.c sc->sc_ih = pcmcia_intr_establish(pf, IPL_NET, awi_intr,
sc 190 dev/pcmcia/if_awi_pcmcia.c sc, sc->sc_dev.dv_xname);
sc 191 dev/pcmcia/if_awi_pcmcia.c if (sc->sc_ih == NULL) {
sc 193 dev/pcmcia/if_awi_pcmcia.c sc->sc_dev.dv_xname);
sc 198 dev/pcmcia/if_awi_pcmcia.c pcmcia_intr_disestablish(pf, sc->sc_ih);
sc 207 dev/pcmcia/if_awi_pcmcia.c awi_pcmcia_disable(sc)
sc 208 dev/pcmcia/if_awi_pcmcia.c struct awi_softc *sc;
sc 210 dev/pcmcia/if_awi_pcmcia.c struct awi_pcmcia_softc *psc = (struct awi_pcmcia_softc *)sc;
sc 213 dev/pcmcia/if_awi_pcmcia.c pcmcia_intr_disestablish (pf, sc->sc_ih);
sc 237 dev/pcmcia/if_awi_pcmcia.c struct awi_softc *sc = &psc->sc_awi;
sc 260 dev/pcmcia/if_awi_pcmcia.c sc->sc_chip.sc_bustype = AM79C930_BUS_PCMCIA;
sc 261 dev/pcmcia/if_awi_pcmcia.c sc->sc_chip.sc_iot = psc->sc_pcioh.iot;
sc 262 dev/pcmcia/if_awi_pcmcia.c sc->sc_chip.sc_ioh = psc->sc_pcioh.ioh;
sc 263 dev/pcmcia/if_awi_pcmcia.c am79c930_chip_init(&sc->sc_chip, 0);
sc 267 dev/pcmcia/if_awi_pcmcia.c awi_read_bytes(sc, AWI_BANNER, version, AWI_BANNER_LEN);
sc 294 dev/pcmcia/if_awi_pcmcia.c struct awi_softc *sc = &psc->sc_awi;
sc 326 dev/pcmcia/if_awi_pcmcia.c sc->sc_enabled = 1;
sc 334 dev/pcmcia/if_awi_pcmcia.c sc->sc_dev.dv_xname);
sc 339 dev/pcmcia/if_awi_pcmcia.c sc->sc_dev.dv_xname);
sc 342 dev/pcmcia/if_awi_pcmcia.c sc->sc_chip.sc_memt = psc->sc_memh.memt;
sc 343 dev/pcmcia/if_awi_pcmcia.c sc->sc_chip.sc_memh = psc->sc_memh.memh;
sc 344 dev/pcmcia/if_awi_pcmcia.c am79c930_chip_init(&sc->sc_chip, 1);
sc 348 dev/pcmcia/if_awi_pcmcia.c sc->sc_enable = awi_pcmcia_enable;
sc 349 dev/pcmcia/if_awi_pcmcia.c sc->sc_disable = awi_pcmcia_disable;
sc 352 dev/pcmcia/if_awi_pcmcia.c sc->sc_ih = pcmcia_intr_establish(psc->sc_pf, IPL_NET,
sc 353 dev/pcmcia/if_awi_pcmcia.c awi_intr, sc, sc->sc_dev.dv_xname);
sc 354 dev/pcmcia/if_awi_pcmcia.c intrstr = pcmcia_intr_string(psc->sc_pf, sc->sc_ih);
sc 355 dev/pcmcia/if_awi_pcmcia.c if (sc->sc_ih == NULL) {
sc 361 dev/pcmcia/if_awi_pcmcia.c sc->sc_ifp = &sc->sc_arpcom.ac_if;
sc 362 dev/pcmcia/if_awi_pcmcia.c sc->sc_cansleep = 1;
sc 364 dev/pcmcia/if_awi_pcmcia.c if (awi_attach(sc) != 0) {
sc 366 dev/pcmcia/if_awi_pcmcia.c sc->sc_dev.dv_xname);
sc 371 dev/pcmcia/if_awi_pcmcia.c sc->sc_enabled = 0;
sc 373 dev/pcmcia/if_awi_pcmcia.c awi_pcmcia_disable(sc);
sc 377 dev/pcmcia/if_awi_pcmcia.c pcmcia_intr_disestablish(psc->sc_pf, sc->sc_ih);
sc 437 dev/pcmcia/if_awi_pcmcia.c struct awi_softc *sc = &psc->sc_awi;
sc 439 dev/pcmcia/if_awi_pcmcia.c awi_power(sc, why);
sc 143 dev/pcmcia/if_cnw.c int cnw_enable(struct cnw_softc *sc);
sc 144 dev/pcmcia/if_cnw.c void cnw_disable(struct cnw_softc *sc);
sc 145 dev/pcmcia/if_cnw.c void cnw_config(struct cnw_softc *sc, u_int8_t *);
sc 166 dev/pcmcia/if_cnw.c wait_WOC(sc, line)
sc 167 dev/pcmcia/if_cnw.c struct cnw_softc *sc;
sc 173 dev/pcmcia/if_cnw.c asr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CNW_REG_ASR);
sc 179 dev/pcmcia/if_cnw.c printf("%s: wedged at line %d\n", sc->sc_dev.dv_xname, line);
sc 182 dev/pcmcia/if_cnw.c #define WAIT_WOC(sc) wait_WOC(sc, __LINE__)
sc 189 dev/pcmcia/if_cnw.c read16(sc, offset)
sc 190 dev/pcmcia/if_cnw.c struct cnw_softc *sc;
sc 200 dev/pcmcia/if_cnw.c lo = bus_space_read_1(sc->sc_memt, sc->sc_memh,
sc 201 dev/pcmcia/if_cnw.c sc->sc_memoff + offset);
sc 202 dev/pcmcia/if_cnw.c hi = bus_space_read_1(sc->sc_memt, sc->sc_memh,
sc 203 dev/pcmcia/if_cnw.c sc->sc_memoff + offset + 1);
sc 212 dev/pcmcia/if_cnw.c cnw_cmd(sc, cmd, count, arg1, arg2)
sc 213 dev/pcmcia/if_cnw.c struct cnw_softc *sc;
sc 216 dev/pcmcia/if_cnw.c int ptr = sc->sc_memoff + CNW_EREG_CB;
sc 218 dev/pcmcia/if_cnw.c if (wait_WOC(sc, 0)) {
sc 220 dev/pcmcia/if_cnw.c sc->sc_dev.dv_xname, cmd);
sc 229 dev/pcmcia/if_cnw.c bus_space_write_1(sc->sc_memt, sc->sc_memh, ptr, cmd);
sc 231 dev/pcmcia/if_cnw.c bus_space_write_1(sc->sc_memt, sc->sc_memh, ptr + 1, arg1);
sc 233 dev/pcmcia/if_cnw.c bus_space_write_1(sc->sc_memt, sc->sc_memh,
sc 236 dev/pcmcia/if_cnw.c bus_space_write_1(sc->sc_memt, sc->sc_memh,
sc 240 dev/pcmcia/if_cnw.c #define CNW_CMD0(sc, cmd) \
sc 241 dev/pcmcia/if_cnw.c do { cnw_cmd(sc, cmd, 0, 0, 0); } while (0)
sc 242 dev/pcmcia/if_cnw.c #define CNW_CMD1(sc, cmd, arg1) \
sc 243 dev/pcmcia/if_cnw.c do { cnw_cmd(sc, cmd, 1, arg1 , 0); } while (0)
sc 244 dev/pcmcia/if_cnw.c #define CNW_CMD2(sc, cmd, arg1, arg2) \
sc 245 dev/pcmcia/if_cnw.c do { cnw_cmd(sc, cmd, 2, arg1, arg2); } while (0)
sc 253 dev/pcmcia/if_cnw.c cnw_reset(sc)
sc 254 dev/pcmcia/if_cnw.c struct cnw_softc *sc;
sc 257 dev/pcmcia/if_cnw.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 258 dev/pcmcia/if_cnw.c printf("%s: resetting\n", sc->sc_dev.dv_xname);
sc 260 dev/pcmcia/if_cnw.c wait_WOC(sc, 0);
sc 261 dev/pcmcia/if_cnw.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, CNW_REG_PMR, CNW_PMR_RESET);
sc 262 dev/pcmcia/if_cnw.c bus_space_write_1(sc->sc_memt, sc->sc_memh,
sc 263 dev/pcmcia/if_cnw.c sc->sc_memoff + CNW_EREG_ASCC, CNW_ASR_WOC);
sc 264 dev/pcmcia/if_cnw.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, CNW_REG_PMR, 0);
sc 272 dev/pcmcia/if_cnw.c cnw_init(sc)
sc 273 dev/pcmcia/if_cnw.c struct cnw_softc *sc;
sc 276 dev/pcmcia/if_cnw.c cnw_reset(sc);
sc 279 dev/pcmcia/if_cnw.c CNW_CMD0(sc, CNW_CMD_NOP);
sc 282 dev/pcmcia/if_cnw.c CNW_CMD1(sc, CNW_CMD_SRC, CNW_RXCONF_RXENA | CNW_RXCONF_BCAST);
sc 285 dev/pcmcia/if_cnw.c CNW_CMD1(sc, CNW_CMD_STC, CNW_TXCONF_TXENA);
sc 288 dev/pcmcia/if_cnw.c CNW_CMD2(sc, CNW_CMD_SMD, sc->sc_domain, sc->sc_domain >> 8);
sc 291 dev/pcmcia/if_cnw.c CNW_CMD2(sc, CNW_CMD_SSK, sc->sc_skey, sc->sc_skey >> 8);
sc 294 dev/pcmcia/if_cnw.c WAIT_WOC(sc);
sc 295 dev/pcmcia/if_cnw.c bus_space_write_1(sc->sc_iot, sc->sc_ioh,
sc 299 dev/pcmcia/if_cnw.c CNW_CMD0(sc, CNW_CMD_ER);
sc 302 dev/pcmcia/if_cnw.c WAIT_WOC(sc);
sc 303 dev/pcmcia/if_cnw.c bus_space_write_1(sc->sc_iot, sc->sc_ioh, CNW_REG_COR,
sc 312 dev/pcmcia/if_cnw.c cnw_enable(sc)
sc 313 dev/pcmcia/if_cnw.c struct cnw_softc *sc;
sc 315 dev/pcmcia/if_cnw.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 317 dev/pcmcia/if_cnw.c sc->sc_ih = pcmcia_intr_establish(sc->sc_pf, IPL_NET,
sc 318 dev/pcmcia/if_cnw.c cnw_intr, sc, sc->sc_dev.dv_xname);
sc 319 dev/pcmcia/if_cnw.c if (sc->sc_ih == NULL) {
sc 321 dev/pcmcia/if_cnw.c sc->sc_dev.dv_xname);
sc 324 dev/pcmcia/if_cnw.c if (pcmcia_function_enable(sc->sc_pf) != 0) {
sc 325 dev/pcmcia/if_cnw.c printf("%s: couldn't enable card\n", sc->sc_dev.dv_xname);
sc 328 dev/pcmcia/if_cnw.c cnw_init(sc);
sc 338 dev/pcmcia/if_cnw.c cnw_disable(sc)
sc 339 dev/pcmcia/if_cnw.c struct cnw_softc *sc;
sc 341 dev/pcmcia/if_cnw.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 343 dev/pcmcia/if_cnw.c pcmcia_intr_disestablish(sc->sc_pf, sc->sc_ih);
sc 344 dev/pcmcia/if_cnw.c pcmcia_function_disable(sc->sc_pf);
sc 378 dev/pcmcia/if_cnw.c struct cnw_softc *sc = (void *) self;
sc 380 dev/pcmcia/if_cnw.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 384 dev/pcmcia/if_cnw.c sc->sc_pf = pa->pf;
sc 385 dev/pcmcia/if_cnw.c pcmcia_function_init(sc->sc_pf, SIMPLEQ_FIRST(&sc->sc_pf->cfe_head));
sc 386 dev/pcmcia/if_cnw.c if (pcmcia_function_enable(sc->sc_pf)) {
sc 392 dev/pcmcia/if_cnw.c if (pcmcia_io_alloc(sc->sc_pf, 0, CNW_IO_SIZE, CNW_IO_SIZE,
sc 393 dev/pcmcia/if_cnw.c &sc->sc_pcioh) != 0) {
sc 397 dev/pcmcia/if_cnw.c if (pcmcia_io_map(sc->sc_pf, PCMCIA_WIDTH_IO16, 0,
sc 398 dev/pcmcia/if_cnw.c CNW_IO_SIZE, &sc->sc_pcioh, &sc->sc_iowin) != 0) {
sc 402 dev/pcmcia/if_cnw.c sc->sc_iot = sc->sc_pcioh.iot;
sc 403 dev/pcmcia/if_cnw.c sc->sc_ioh = sc->sc_pcioh.ioh;
sc 404 dev/pcmcia/if_cnw.c if (pcmcia_mem_alloc(sc->sc_pf, CNW_MEM_SIZE, &sc->sc_pcmemh) != 0) {
sc 408 dev/pcmcia/if_cnw.c if (pcmcia_mem_map(sc->sc_pf, PCMCIA_MEM_COMMON, CNW_MEM_ADDR,
sc 409 dev/pcmcia/if_cnw.c CNW_MEM_SIZE, &sc->sc_pcmemh, &sc->sc_memoff,
sc 410 dev/pcmcia/if_cnw.c &sc->sc_memwin) != 0) {
sc 414 dev/pcmcia/if_cnw.c sc->sc_memt = sc->sc_pcmemh.memt;
sc 415 dev/pcmcia/if_cnw.c sc->sc_memh = sc->sc_pcmemh.memh;
sc 418 dev/pcmcia/if_cnw.c sc->sc_domain = cnw_domain;
sc 419 dev/pcmcia/if_cnw.c sc->sc_skey = cnw_skey;
sc 422 dev/pcmcia/if_cnw.c cnw_reset(sc);
sc 424 dev/pcmcia/if_cnw.c sc->sc_arpcom.ac_enaddr[i] = bus_space_read_1(sc->sc_memt,
sc 425 dev/pcmcia/if_cnw.c sc->sc_memh, sc->sc_memoff + CNW_EREG_PA + i);
sc 426 dev/pcmcia/if_cnw.c printf("%s: address %s\n", sc->sc_dev.dv_xname,
sc 427 dev/pcmcia/if_cnw.c ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 430 dev/pcmcia/if_cnw.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 431 dev/pcmcia/if_cnw.c ifp->if_softc = sc;
sc 443 dev/pcmcia/if_cnw.c pcmcia_function_disable(sc->sc_pf);
sc 453 dev/pcmcia/if_cnw.c struct cnw_softc *sc = ifp->if_softc;
sc 458 dev/pcmcia/if_cnw.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 464 dev/pcmcia/if_cnw.c WAIT_WOC(sc);
sc 465 dev/pcmcia/if_cnw.c asr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CNW_REG_ASR);
sc 468 dev/pcmcia/if_cnw.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 483 dev/pcmcia/if_cnw.c cnw_transmit(sc, m0);
sc 494 dev/pcmcia/if_cnw.c cnw_transmit(sc, m0)
sc 495 dev/pcmcia/if_cnw.c struct cnw_softc *sc;
sc 503 dev/pcmcia/if_cnw.c buffer = read16(sc, CNW_EREG_TDP);
sc 504 dev/pcmcia/if_cnw.c bufsize = read16(sc, CNW_EREG_TDP + 2);
sc 505 dev/pcmcia/if_cnw.c bufoffset = read16(sc, CNW_EREG_TDP + 4);
sc 507 dev/pcmcia/if_cnw.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 509 dev/pcmcia/if_cnw.c sc->sc_dev.dv_xname, buffer, bufsize, bufoffset);
sc 513 dev/pcmcia/if_cnw.c bufptr = sc->sc_memoff + buffer + bufoffset;
sc 522 dev/pcmcia/if_cnw.c buffer = read16(sc, buffer);
sc 523 dev/pcmcia/if_cnw.c bufptr = sc->sc_memoff + buffer + bufoffset;
sc 526 dev/pcmcia/if_cnw.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 528 dev/pcmcia/if_cnw.c sc->sc_dev.dv_xname, buffer);
sc 532 dev/pcmcia/if_cnw.c bus_space_write_region_1(sc->sc_memt, sc->sc_memh,
sc 544 dev/pcmcia/if_cnw.c CNW_CMD2(sc, CNW_CMD_TL, len, len >> 8);
sc 552 dev/pcmcia/if_cnw.c cnw_read(sc)
sc 553 dev/pcmcia/if_cnw.c struct cnw_softc *sc;
sc 559 dev/pcmcia/if_cnw.c WAIT_WOC(sc);
sc 560 dev/pcmcia/if_cnw.c totbytes = read16(sc, CNW_EREG_RDP);
sc 562 dev/pcmcia/if_cnw.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 563 dev/pcmcia/if_cnw.c printf("%s: recv %d bytes\n", sc->sc_dev.dv_xname, totbytes);
sc 572 dev/pcmcia/if_cnw.c m->m_pkthdr.rcvif = &sc->sc_arpcom.ac_if;
sc 608 dev/pcmcia/if_cnw.c buffer = read16(sc, buffer);
sc 609 dev/pcmcia/if_cnw.c bufbytes = read16(sc, buffer + 2);
sc 610 dev/pcmcia/if_cnw.c bufptr = sc->sc_memoff + buffer +
sc 611 dev/pcmcia/if_cnw.c read16(sc, buffer + 4);
sc 613 dev/pcmcia/if_cnw.c if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
sc 615 dev/pcmcia/if_cnw.c sc->sc_dev.dv_xname, bufbytes,
sc 617 dev/pcmcia/if_cnw.c sc->sc_memoff);
sc 621 dev/pcmcia/if_cnw.c bus_space_read_region_1(sc->sc_memt, sc->sc_memh,
sc 640 dev/pcmcia/if_cnw.c cnw_recv(sc)
sc 641 dev/pcmcia/if_cnw.c struct cnw_softc *sc;
sc 644 dev/pcmcia/if_cnw.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 649 dev/pcmcia/if_cnw.c WAIT_WOC(sc);
sc 650 dev/pcmcia/if_cnw.c rser = bus_space_read_1(sc->sc_memt, sc->sc_memh,
sc 651 dev/pcmcia/if_cnw.c sc->sc_memoff + CNW_EREG_RSER);
sc 656 dev/pcmcia/if_cnw.c m = cnw_read(sc);
sc 659 dev/pcmcia/if_cnw.c CNW_CMD0(sc, CNW_CMD_SRP);
sc 680 dev/pcmcia/if_cnw.c bcmp(sc->sc_arpcom.ac_enaddr, eh->ether_dhost,
sc 698 dev/pcmcia/if_cnw.c struct cnw_softc *sc = arg;
sc 699 dev/pcmcia/if_cnw.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 702 dev/pcmcia/if_cnw.c if (!(sc->sc_arpcom.ac_if.if_flags & IFF_RUNNING))
sc 708 dev/pcmcia/if_cnw.c WAIT_WOC(sc);
sc 709 dev/pcmcia/if_cnw.c if (!(bus_space_read_1(sc->sc_iot, sc->sc_ioh,
sc 713 dev/pcmcia/if_cnw.c sc->sc_dev.dv_xname);
sc 717 dev/pcmcia/if_cnw.c status = bus_space_read_1(sc->sc_iot, sc->sc_ioh, CNW_REG_ASR);
sc 721 dev/pcmcia/if_cnw.c cnw_recv(sc);
sc 731 dev/pcmcia/if_cnw.c rser = bus_space_read_1(sc->sc_memt, sc->sc_memh,
sc 732 dev/pcmcia/if_cnw.c sc->sc_memoff + CNW_EREG_RSER);
sc 734 dev/pcmcia/if_cnw.c WAIT_WOC(sc);
sc 735 dev/pcmcia/if_cnw.c bus_space_write_1(sc->sc_memt, sc->sc_memh,
sc 736 dev/pcmcia/if_cnw.c sc->sc_memoff + CNW_EREG_RSERW,
sc 740 dev/pcmcia/if_cnw.c WAIT_WOC(sc);
sc 741 dev/pcmcia/if_cnw.c bus_space_write_1(sc->sc_memt, sc->sc_memh,
sc 742 dev/pcmcia/if_cnw.c sc->sc_memoff + CNW_EREG_ASCC, CNW_ASR_RXERR);
sc 747 dev/pcmcia/if_cnw.c tser = bus_space_read_1(sc->sc_memt, sc->sc_memh,
sc 750 dev/pcmcia/if_cnw.c WAIT_WOC(sc);
sc 751 dev/pcmcia/if_cnw.c bus_space_write_1(sc->sc_memt, sc->sc_memh,
sc 752 dev/pcmcia/if_cnw.c sc->sc_memoff + CNW_EREG_TSERW,
sc 757 dev/pcmcia/if_cnw.c WAIT_WOC(sc);
sc 758 dev/pcmcia/if_cnw.c bus_space_write_1(sc->sc_memt, sc->sc_memh,
sc 759 dev/pcmcia/if_cnw.c sc->sc_memoff + CNW_EREG_TSERW,
sc 764 dev/pcmcia/if_cnw.c cnw_start(&sc->sc_arpcom.ac_if);
sc 780 dev/pcmcia/if_cnw.c struct cnw_softc *sc = ifp->if_softc;
sc 790 dev/pcmcia/if_cnw.c (error = cnw_enable(sc)) != 0)
sc 796 dev/pcmcia/if_cnw.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 808 dev/pcmcia/if_cnw.c cnw_disable(sc);
sc 814 dev/pcmcia/if_cnw.c error = cnw_enable(sc);
sc 836 dev/pcmcia/if_cnw.c struct cnw_softc *sc = ifp->if_softc;
sc 838 dev/pcmcia/if_cnw.c printf("%s: device timeout; card reset\n", sc->sc_dev.dv_xname);
sc 840 dev/pcmcia/if_cnw.c cnw_init(sc);
sc 849 dev/pcmcia/if_cnw.c struct cnw_softc *sc = (struct cnw_softc *)dev;
sc 850 dev/pcmcia/if_cnw.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 853 dev/pcmcia/if_cnw.c pcmcia_io_unmap(sc->sc_pf, sc->sc_iowin);
sc 854 dev/pcmcia/if_cnw.c pcmcia_io_free(sc->sc_pf, &sc->sc_pcioh);
sc 855 dev/pcmcia/if_cnw.c pcmcia_mem_unmap(sc->sc_pf, sc->sc_memwin);
sc 856 dev/pcmcia/if_cnw.c pcmcia_mem_free(sc->sc_pf, &sc->sc_pcmemh);
sc 869 dev/pcmcia/if_cnw.c struct cnw_softc *sc = (struct cnw_softc *)dev;
sc 870 dev/pcmcia/if_cnw.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 876 dev/pcmcia/if_cnw.c pcmcia_function_enable(sc->sc_pf);
sc 877 dev/pcmcia/if_cnw.c sc->sc_ih = pcmcia_intr_establish(sc->sc_pf, IPL_NET,
sc 878 dev/pcmcia/if_cnw.c cnw_intr, sc, sc->sc_dev.dv_xname);
sc 879 dev/pcmcia/if_cnw.c cnw_init(sc);
sc 885 dev/pcmcia/if_cnw.c pcmcia_intr_disestablish(sc->sc_pf, sc->sc_ih);
sc 886 dev/pcmcia/if_cnw.c pcmcia_function_disable(sc->sc_pf);
sc 204 dev/pcmcia/if_ep_pcmcia.c ep_pcmcia_enable(sc)
sc 205 dev/pcmcia/if_ep_pcmcia.c struct ep_softc *sc;
sc 207 dev/pcmcia/if_ep_pcmcia.c struct ep_pcmcia_softc *psc = (struct ep_pcmcia_softc *) sc;
sc 211 dev/pcmcia/if_ep_pcmcia.c sc->sc_ih = pcmcia_intr_establish(pf, IPL_NET, epintr,
sc 212 dev/pcmcia/if_ep_pcmcia.c sc, sc->sc_dev.dv_xname);
sc 213 dev/pcmcia/if_ep_pcmcia.c if (sc->sc_ih == NULL) {
sc 215 dev/pcmcia/if_ep_pcmcia.c sc->sc_dev.dv_xname);
sc 219 dev/pcmcia/if_ep_pcmcia.c return (ep_pcmcia_enable1(sc));
sc 224 dev/pcmcia/if_ep_pcmcia.c ep_pcmcia_enable1(sc)
sc 225 dev/pcmcia/if_ep_pcmcia.c struct ep_softc *sc;
sc 227 dev/pcmcia/if_ep_pcmcia.c struct ep_pcmcia_softc *psc = (struct ep_pcmcia_softc *) sc;
sc 234 dev/pcmcia/if_ep_pcmcia.c if ((psc->sc_pf->sc->card.product == PCMCIA_PRODUCT_3COM_3C562) ||
sc 235 dev/pcmcia/if_ep_pcmcia.c (psc->sc_pf->sc->card.product == PCMCIA_PRODUCT_3COM_3CXEM556) ||
sc 236 dev/pcmcia/if_ep_pcmcia.c (psc->sc_pf->sc->card.product == PCMCIA_PRODUCT_3COM_3CXEM556B)) {
sc 254 dev/pcmcia/if_ep_pcmcia.c ep_pcmcia_disable(sc)
sc 255 dev/pcmcia/if_ep_pcmcia.c struct ep_softc *sc;
sc 257 dev/pcmcia/if_ep_pcmcia.c struct ep_pcmcia_softc *psc = (struct ep_pcmcia_softc *) sc;
sc 259 dev/pcmcia/if_ep_pcmcia.c pcmcia_intr_disestablish(psc->sc_pf, sc->sc_ih);
sc 260 dev/pcmcia/if_ep_pcmcia.c ep_pcmcia_disable1(sc);
sc 264 dev/pcmcia/if_ep_pcmcia.c ep_pcmcia_disable1(sc)
sc 265 dev/pcmcia/if_ep_pcmcia.c struct ep_softc *sc;
sc 267 dev/pcmcia/if_ep_pcmcia.c struct ep_pcmcia_softc *psc = (struct ep_pcmcia_softc *) sc;
sc 279 dev/pcmcia/if_ep_pcmcia.c struct ep_softc *sc = &psc->sc_ep;
sc 293 dev/pcmcia/if_ep_pcmcia.c if (ep_pcmcia_enable1(sc))
sc 297 dev/pcmcia/if_ep_pcmcia.c sc->enabled = 1;
sc 309 dev/pcmcia/if_ep_pcmcia.c bus_addr_t maxaddr = (pa->pf->sc->iobase + pa->pf->sc->iosize);
sc 311 dev/pcmcia/if_ep_pcmcia.c for (i = pa->pf->sc->iobase; i < maxaddr; i += 0x10) {
sc 332 dev/pcmcia/if_ep_pcmcia.c sc->sc_iot = psc->sc_pcioh.iot;
sc 333 dev/pcmcia/if_ep_pcmcia.c sc->sc_ioh = psc->sc_pcioh.ioh;
sc 362 dev/pcmcia/if_ep_pcmcia.c sc->bustype = EP_BUS_PCMCIA;
sc 368 dev/pcmcia/if_ep_pcmcia.c sc->ep_flags = epp->epp_flags;
sc 371 dev/pcmcia/if_ep_pcmcia.c sc->enable = ep_pcmcia_enable;
sc 372 dev/pcmcia/if_ep_pcmcia.c sc->disable = ep_pcmcia_disable;
sc 376 dev/pcmcia/if_ep_pcmcia.c sc->sc_ih = pcmcia_intr_establish(pa->pf, IPL_NET, epintr, sc,
sc 377 dev/pcmcia/if_ep_pcmcia.c sc->sc_dev.dv_xname);
sc 378 dev/pcmcia/if_ep_pcmcia.c intrstr = pcmcia_intr_string(psc->sc_pf, sc->sc_ih);
sc 384 dev/pcmcia/if_ep_pcmcia.c epconfig(sc, epp->epp_chipset, enaddr);
sc 387 dev/pcmcia/if_ep_pcmcia.c sc->enabled = 0;
sc 389 dev/pcmcia/if_ep_pcmcia.c ep_pcmcia_disable1(sc);
sc 415 dev/pcmcia/if_ep_pcmcia.c struct ep_pcmcia_softc *sc = (struct ep_pcmcia_softc *)dev;
sc 416 dev/pcmcia/if_ep_pcmcia.c struct ep_softc *esc = &sc->sc_ep;
sc 423 dev/pcmcia/if_ep_pcmcia.c pcmcia_function_enable(sc->sc_pf);
sc 424 dev/pcmcia/if_ep_pcmcia.c sc->sc_ep.sc_ih = pcmcia_intr_establish(sc->sc_pf, IPL_NET,
sc 425 dev/pcmcia/if_ep_pcmcia.c epintr, sc, esc->sc_dev.dv_xname);
sc 433 dev/pcmcia/if_ep_pcmcia.c pcmcia_intr_disestablish(sc->sc_pf, sc->sc_ep.sc_ih);
sc 434 dev/pcmcia/if_ep_pcmcia.c pcmcia_function_disable(sc->sc_pf);
sc 156 dev/pcmcia/if_malo.c struct malo_softc *sc = &psc->sc_malo;
sc 187 dev/pcmcia/if_malo.c sc->sc_iot = psc->sc_pcioh.iot;
sc 188 dev/pcmcia/if_malo.c sc->sc_ioh = psc->sc_pcioh.ioh;
sc 193 dev/pcmcia/if_malo.c psc->sc_ih = pcmcia_intr_establish(psc->sc_pf, IPL_NET, cmalo_intr, sc,
sc 194 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 208 dev/pcmcia/if_malo.c mountroothook_establish(cmalo_attach, sc);
sc 210 dev/pcmcia/if_malo.c cmalo_attach(sc);
sc 217 dev/pcmcia/if_malo.c struct malo_softc *sc = &psc->sc_malo;
sc 219 dev/pcmcia/if_malo.c cmalo_detach(sc);
sc 231 dev/pcmcia/if_malo.c struct malo_softc *sc = &psc->sc_malo;
sc 232 dev/pcmcia/if_malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 241 dev/pcmcia/if_malo.c cmalo_intr, sc, sc->sc_dev.dv_xname);
sc 247 dev/pcmcia/if_malo.c cmalo_stop(sc);
sc 264 dev/pcmcia/if_malo.c struct malo_softc *sc = arg;
sc 265 dev/pcmcia/if_malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 266 dev/pcmcia/if_malo.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 270 dev/pcmcia/if_malo.c cmalo_intr_mask(sc, 0);
sc 273 dev/pcmcia/if_malo.c if (cmalo_fw_load_helper(sc) != 0)
sc 275 dev/pcmcia/if_malo.c if (cmalo_fw_load_main(sc) != 0)
sc 277 dev/pcmcia/if_malo.c sc->sc_flags |= MALO_FW_LOADED;
sc 280 dev/pcmcia/if_malo.c sc->sc_cmd = malloc(MALO_CMD_BUFFER_SIZE, M_DEVBUF, M_NOWAIT);
sc 283 dev/pcmcia/if_malo.c sc->sc_data = malloc(MCLBYTES, M_DEVBUF, M_NOWAIT);
sc 286 dev/pcmcia/if_malo.c cmalo_intr_mask(sc, 1);
sc 289 dev/pcmcia/if_malo.c sc->sc_cmd_ctxsave = 1;
sc 292 dev/pcmcia/if_malo.c cmalo_cmd_get_hwspec(sc);
sc 295 dev/pcmcia/if_malo.c ifp->if_softc = sc;
sc 301 dev/pcmcia/if_malo.c strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 323 dev/pcmcia/if_malo.c sc->sc_newstate = ic->ic_newstate;
sc 329 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, ether_sprintf(ic->ic_myaddr));
sc 332 dev/pcmcia/if_malo.c sc->sc_flags |= MALO_DEVICE_ATTACHED;
sc 338 dev/pcmcia/if_malo.c struct malo_softc *sc = ifp->if_softc;
sc 339 dev/pcmcia/if_malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 363 dev/pcmcia/if_malo.c cmalo_stop(sc);
sc 376 dev/pcmcia/if_malo.c cmalo_cmd_set_scan(sc);
sc 385 dev/pcmcia/if_malo.c for (na->na_nodes = i = j = 0; i < sc->sc_net_num &&
sc 391 dev/pcmcia/if_malo.c sc->sc_net[i].bssid);
sc 393 dev/pcmcia/if_malo.c sc->sc_net[i].bssid);
sc 394 dev/pcmcia/if_malo.c nr->nr_channel = sc->sc_net[i].channel;
sc 396 dev/pcmcia/if_malo.c nr->nr_rssi = sc->sc_net[i].rssi;
sc 398 dev/pcmcia/if_malo.c nr->nr_nwid_len = strlen(sc->sc_net[i].ssid);
sc 399 dev/pcmcia/if_malo.c bcopy(sc->sc_net[i].ssid, nr->nr_nwid,
sc 401 dev/pcmcia/if_malo.c nr->nr_intval = sc->sc_net[i].beaconintvl;
sc 402 dev/pcmcia/if_malo.c nr->nr_capinfo = sc->sc_net[i].capinfo;
sc 433 dev/pcmcia/if_malo.c cmalo_fw_load_helper(struct malo_softc *sc)
sc 442 dev/pcmcia/if_malo.c val8 = MALO_READ_1(sc, MALO_REG_SCRATCH);
sc 449 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 456 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, name, error);
sc 469 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, bsize, offset);
sc 470 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_CMD_WRITE_LEN, bsize);
sc 473 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_CMD_WRITE, htole16(uc[i]));
sc 474 dev/pcmcia/if_malo.c MALO_WRITE_1(sc, MALO_REG_HOST_STATUS, MALO_VAL_CMD_DL_OVER);
sc 475 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_CARD_INTR_CAUSE,
sc 480 dev/pcmcia/if_malo.c if (MALO_READ_1(sc, MALO_REG_CARD_STATUS) ==
sc 487 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 495 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_CMD_WRITE_LEN, 0);
sc 496 dev/pcmcia/if_malo.c MALO_WRITE_1(sc, MALO_REG_HOST_STATUS, MALO_VAL_CMD_DL_OVER);
sc 497 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_CARD_INTR_CAUSE, MALO_VAL_CMD_DL_OVER);
sc 498 dev/pcmcia/if_malo.c DPRINTF(1, "%s: helper FW downloaded\n", sc->sc_dev.dv_xname);
sc 504 dev/pcmcia/if_malo.c cmalo_fw_load_main(struct malo_softc *sc)
sc 515 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, name, error);
sc 521 dev/pcmcia/if_malo.c if (MALO_READ_1(sc, MALO_REG_RBAL) == MALO_FW_HELPER_LOADED)
sc 526 dev/pcmcia/if_malo.c printf("%s: helper FW not loaded!\n", sc->sc_dev.dv_xname);
sc 530 dev/pcmcia/if_malo.c DPRINTF(1, "%s: helper FW loaded successfully\n", sc->sc_dev.dv_xname);
sc 534 dev/pcmcia/if_malo.c val16 = MALO_READ_2(sc, MALO_REG_RBAL);
sc 543 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 556 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, bsize, offset);
sc 557 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_CMD_WRITE_LEN, bsize);
sc 560 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_CMD_WRITE, htole16(uc[i]));
sc 561 dev/pcmcia/if_malo.c MALO_WRITE_1(sc, MALO_REG_HOST_STATUS, MALO_VAL_CMD_DL_OVER);
sc 562 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_CARD_INTR_CAUSE,
sc 567 dev/pcmcia/if_malo.c if (MALO_READ_1(sc, MALO_REG_CARD_STATUS) ==
sc 573 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 580 dev/pcmcia/if_malo.c DPRINTF(1, "%s: main FW downloaded\n", sc->sc_dev.dv_xname);
sc 584 dev/pcmcia/if_malo.c if (MALO_READ_1(sc, MALO_REG_SCRATCH) ==
sc 590 dev/pcmcia/if_malo.c printf("%s: main FW not loaded!\n", sc->sc_dev.dv_xname);
sc 594 dev/pcmcia/if_malo.c DPRINTF(1, "%s: main FW loaded successfully\n", sc->sc_dev.dv_xname);
sc 602 dev/pcmcia/if_malo.c struct malo_softc *sc = ifp->if_softc;
sc 603 dev/pcmcia/if_malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 606 dev/pcmcia/if_malo.c if (!(sc->sc_flags & MALO_FW_LOADED)) {
sc 608 dev/pcmcia/if_malo.c cmalo_intr_mask(sc, 0);
sc 611 dev/pcmcia/if_malo.c if (cmalo_fw_load_helper(sc) != 0)
sc 613 dev/pcmcia/if_malo.c if (cmalo_fw_load_main(sc) != 0)
sc 615 dev/pcmcia/if_malo.c sc->sc_flags |= MALO_FW_LOADED;
sc 618 dev/pcmcia/if_malo.c cmalo_intr_mask(sc, 1);
sc 622 dev/pcmcia/if_malo.c sc->sc_flags &= ~MALO_ASSOC_FAILED;
sc 626 dev/pcmcia/if_malo.c sc->sc_curchan = ieee80211_chan2ieee(ic, ic->ic_bss->ni_chan);
sc 628 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, sc->sc_curchan);
sc 631 dev/pcmcia/if_malo.c if (cmalo_cmd_set_macctrl(sc) != 0)
sc 633 dev/pcmcia/if_malo.c if (cmalo_cmd_set_txpower(sc, 15) != 0)
sc 635 dev/pcmcia/if_malo.c if (cmalo_cmd_set_antenna(sc, 1) != 0)
sc 637 dev/pcmcia/if_malo.c if (cmalo_cmd_set_antenna(sc, 2) != 0)
sc 639 dev/pcmcia/if_malo.c if (cmalo_cmd_set_radio(sc, 1) != 0)
sc 641 dev/pcmcia/if_malo.c if (cmalo_cmd_set_channel(sc, sc->sc_curchan) != 0)
sc 643 dev/pcmcia/if_malo.c if (cmalo_cmd_set_rate(sc) != 0)
sc 645 dev/pcmcia/if_malo.c if (cmalo_cmd_set_snmp(sc, MALO_OID_RTSTRESH) != 0)
sc 647 dev/pcmcia/if_malo.c if (cmalo_cmd_set_snmp(sc, MALO_OID_SHORTRETRY) != 0)
sc 649 dev/pcmcia/if_malo.c if (cmalo_cmd_set_snmp(sc, MALO_OID_FRAGTRESH) != 0)
sc 651 dev/pcmcia/if_malo.c if (sc->sc_ic.ic_flags & IEEE80211_F_WEPON) {
sc 652 dev/pcmcia/if_malo.c if (cmalo_wep(sc) != 0)
sc 663 dev/pcmcia/if_malo.c if (sc->sc_flags & MALO_ASSOC_FAILED)
sc 669 dev/pcmcia/if_malo.c sc->sc_cmd_ctxsave = 0;
sc 675 dev/pcmcia/if_malo.c cmalo_stop(struct malo_softc *sc)
sc 677 dev/pcmcia/if_malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 687 dev/pcmcia/if_malo.c cmalo_cmd_set_reset(sc);
sc 688 dev/pcmcia/if_malo.c sc->sc_flags &= ~MALO_FW_LOADED;
sc 690 dev/pcmcia/if_malo.c DPRINTF(1, "%s: device down\n", sc->sc_dev.dv_xname);
sc 710 dev/pcmcia/if_malo.c struct malo_softc *sc = ic->ic_if.if_softc;
sc 721 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 725 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 726 dev/pcmcia/if_malo.c cmalo_cmd_set_scan(sc);
sc 727 dev/pcmcia/if_malo.c if (!sc->sc_net_num) {
sc 730 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 733 dev/pcmcia/if_malo.c cmalo_select_network(sc);
sc 734 dev/pcmcia/if_malo.c cmalo_cmd_set_auth(sc);
sc 735 dev/pcmcia/if_malo.c cmalo_cmd_set_assoc(sc);
sc 739 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 743 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 747 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 748 dev/pcmcia/if_malo.c cmalo_reflect_network(sc);
sc 755 dev/pcmcia/if_malo.c return (sc->sc_newstate(ic, nstate, arg));
sc 761 dev/pcmcia/if_malo.c struct malo_softc *sc = arg;
sc 762 dev/pcmcia/if_malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 765 dev/pcmcia/if_malo.c if (!(sc->sc_flags & MALO_DEVICE_ATTACHED))
sc 770 dev/pcmcia/if_malo.c if (sc->sc_cmd != NULL)
sc 771 dev/pcmcia/if_malo.c free(sc->sc_cmd, M_DEVBUF);
sc 774 dev/pcmcia/if_malo.c if (sc->sc_data != NULL)
sc 775 dev/pcmcia/if_malo.c free(sc->sc_data, M_DEVBUF);
sc 785 dev/pcmcia/if_malo.c struct malo_softc *sc = arg;
sc 789 dev/pcmcia/if_malo.c intr = MALO_READ_2(sc, MALO_REG_HOST_INTR_CAUSE);
sc 800 dev/pcmcia/if_malo.c cmalo_intr_mask(sc, 0);
sc 803 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_HOST_INTR_CAUSE,
sc 807 dev/pcmcia/if_malo.c cmalo_intr_mask(sc, 1);
sc 810 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, intr);
sc 814 dev/pcmcia/if_malo.c cmalo_tx_done(sc);
sc 817 dev/pcmcia/if_malo.c cmalo_rx(sc);
sc 820 dev/pcmcia/if_malo.c wakeup(sc);
sc 821 dev/pcmcia/if_malo.c if (!sc->sc_cmd_ctxsave)
sc 822 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 826 dev/pcmcia/if_malo.c cmalo_event(sc);
sc 832 dev/pcmcia/if_malo.c cmalo_intr_mask(struct malo_softc *sc, int enable)
sc 836 dev/pcmcia/if_malo.c val16 = MALO_READ_2(sc, MALO_REG_HOST_INTR_MASK);
sc 839 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, val16);
sc 842 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_HOST_INTR_MASK,
sc 845 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_HOST_INTR_MASK,
sc 848 dev/pcmcia/if_malo.c val16 = MALO_READ_2(sc, MALO_REG_HOST_INTR_MASK);
sc 854 dev/pcmcia/if_malo.c cmalo_rx(struct malo_softc *sc)
sc 856 dev/pcmcia/if_malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 867 dev/pcmcia/if_malo.c psize = MALO_READ_2(sc, MALO_REG_DATA_READ_LEN);
sc 869 dev/pcmcia/if_malo.c MALO_READ_MULTI_2(sc, MALO_REG_DATA_READ, sc->sc_data,
sc 871 dev/pcmcia/if_malo.c data = (uint8_t *)sc->sc_data;
sc 872 dev/pcmcia/if_malo.c data[psize - 1] = MALO_READ_1(sc, MALO_REG_DATA_READ);
sc 874 dev/pcmcia/if_malo.c MALO_READ_MULTI_2(sc, MALO_REG_DATA_READ, sc->sc_data, psize);
sc 875 dev/pcmcia/if_malo.c MALO_WRITE_1(sc, MALO_REG_HOST_STATUS, MALO_VAL_RX_DL_OVER);
sc 876 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_CARD_INTR_CAUSE, MALO_VAL_RX_DL_OVER);
sc 879 dev/pcmcia/if_malo.c rxdesc = (struct malo_rx_desc *)sc->sc_data;
sc 892 dev/pcmcia/if_malo.c data = sc->sc_data + rxdesc->pkgoffset;
sc 898 dev/pcmcia/if_malo.c m = m_devget(sc->sc_data + rxdesc->pkgoffset - ETHER_ALIGN,
sc 917 dev/pcmcia/if_malo.c struct malo_softc *sc = ifp->if_softc;
sc 935 dev/pcmcia/if_malo.c if (cmalo_tx(sc, m) != 0)
sc 949 dev/pcmcia/if_malo.c cmalo_tx(struct malo_softc *sc, struct mbuf *m)
sc 951 dev/pcmcia/if_malo.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 952 dev/pcmcia/if_malo.c struct malo_tx_desc *txdesc = sc->sc_data;
sc 958 dev/pcmcia/if_malo.c bzero(sc->sc_data, sizeof(*txdesc));
sc 968 dev/pcmcia/if_malo.c m_copydata(m, 0, m->m_pkthdr.len, sc->sc_data + sizeof(*txdesc));
sc 972 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_DATA_WRITE_LEN, psize);
sc 974 dev/pcmcia/if_malo.c MALO_WRITE_MULTI_2(sc, MALO_REG_DATA_WRITE, sc->sc_data,
sc 976 dev/pcmcia/if_malo.c data = (uint8_t *)sc->sc_data;
sc 977 dev/pcmcia/if_malo.c MALO_WRITE_1(sc, MALO_REG_DATA_WRITE, data[psize - 1]);
sc 979 dev/pcmcia/if_malo.c MALO_WRITE_MULTI_2(sc, MALO_REG_DATA_WRITE, sc->sc_data, psize);
sc 980 dev/pcmcia/if_malo.c MALO_WRITE_1(sc, MALO_REG_HOST_STATUS, MALO_VAL_TX_DL_OVER);
sc 981 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_CARD_INTR_CAUSE, MALO_VAL_TX_DL_OVER);
sc 987 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, txdesc->status, letoh16(txdesc->pkglen),
sc 994 dev/pcmcia/if_malo.c cmalo_tx_done(struct malo_softc *sc)
sc 996 dev/pcmcia/if_malo.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1000 dev/pcmcia/if_malo.c DPRINTF(2, "%s: TX done\n", sc->sc_dev.dv_xname);
sc 1009 dev/pcmcia/if_malo.c cmalo_event(struct malo_softc *sc)
sc 1014 dev/pcmcia/if_malo.c event = MALO_READ_2(sc, MALO_REG_CARD_STATUS);
sc 1021 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, event);
sc 1023 dev/pcmcia/if_malo.c cmalo_cmd_set_assoc(sc);
sc 1027 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, event);
sc 1029 dev/pcmcia/if_malo.c cmalo_cmd_set_assoc(sc);
sc 1033 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, event);
sc 1038 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_CARD_INTR_CAUSE, MALO_VAL_HOST_INTR_EVENT);
sc 1042 dev/pcmcia/if_malo.c cmalo_select_network(struct malo_softc *sc)
sc 1044 dev/pcmcia/if_malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1048 dev/pcmcia/if_malo.c sc->sc_net_cur = 0;
sc 1052 dev/pcmcia/if_malo.c for (i = 0; i < sc->sc_net_num; i++) {
sc 1053 dev/pcmcia/if_malo.c if (!strcmp(ic->ic_des_essid, sc->sc_net[i].ssid)) {
sc 1054 dev/pcmcia/if_malo.c sc->sc_net_cur = i;
sc 1056 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, ic->ic_des_essid);
sc 1062 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, ic->ic_des_essid);
sc 1066 dev/pcmcia/if_malo.c best_rssi = sc->sc_net[0].rssi;
sc 1067 dev/pcmcia/if_malo.c for (i = 0; i < sc->sc_net_num; i++) {
sc 1068 dev/pcmcia/if_malo.c if (best_rssi < sc->sc_net[i].rssi) {
sc 1069 dev/pcmcia/if_malo.c best_rssi = sc->sc_net[i].rssi;
sc 1070 dev/pcmcia/if_malo.c sc->sc_net_cur = i;
sc 1074 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, sc->sc_net[sc->sc_net_cur].ssid);
sc 1078 dev/pcmcia/if_malo.c cmalo_reflect_network(struct malo_softc *sc)
sc 1080 dev/pcmcia/if_malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1087 dev/pcmcia/if_malo.c sc->sc_net[sc->sc_net_cur].bssid);
sc 1090 dev/pcmcia/if_malo.c ic->ic_bss->ni_esslen = strlen(sc->sc_net[sc->sc_net_cur].ssid);
sc 1091 dev/pcmcia/if_malo.c bcopy(sc->sc_net[sc->sc_net_cur].ssid, ic->ic_bss->ni_essid,
sc 1095 dev/pcmcia/if_malo.c chan = sc->sc_net[sc->sc_net_cur].channel;
sc 1100 dev/pcmcia/if_malo.c cmalo_wep(struct malo_softc *sc)
sc 1102 dev/pcmcia/if_malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1112 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, i);
sc 1114 dev/pcmcia/if_malo.c cmalo_cmd_set_wep(sc, i, key);
sc 1140 dev/pcmcia/if_malo.c cmalo_cmd_get_hwspec(struct malo_softc *sc)
sc 1142 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1146 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1159 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1163 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1169 dev/pcmcia/if_malo.c cmalo_cmd_rsp_hwspec(struct malo_softc *sc)
sc 1171 dev/pcmcia/if_malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1172 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1186 dev/pcmcia/if_malo.c cmalo_cmd_set_reset(struct malo_softc *sc)
sc 1188 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1191 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1200 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 1) != 0)
sc 1207 dev/pcmcia/if_malo.c cmalo_cmd_set_scan(struct malo_softc *sc)
sc 1209 dev/pcmcia/if_malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1210 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1219 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1230 dev/pcmcia/if_malo.c body_ssid = sc->sc_cmd + psize;
sc 1235 dev/pcmcia/if_malo.c body_chanlist = sc->sc_cmd + psize;
sc 1247 dev/pcmcia/if_malo.c body_rates = sc->sc_cmd + psize;
sc 1255 dev/pcmcia/if_malo.c body_numprobes = sc->sc_cmd + psize;
sc 1264 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1268 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1274 dev/pcmcia/if_malo.c cmalo_cmd_rsp_scan(struct malo_softc *sc)
sc 1276 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1282 dev/pcmcia/if_malo.c bzero(sc->sc_net, sizeof(sc->sc_net));
sc 1290 dev/pcmcia/if_malo.c sc->sc_net_num = body->numofset;
sc 1294 dev/pcmcia/if_malo.c set = (struct malo_cmd_body_rsp_scan_set *)(sc->sc_cmd + psize);
sc 1306 dev/pcmcia/if_malo.c bcopy(set->bssid, sc->sc_net[i].bssid, sizeof(set->bssid));
sc 1307 dev/pcmcia/if_malo.c bcopy(set->timestamp, sc->sc_net[i].timestamp,
sc 1309 dev/pcmcia/if_malo.c sc->sc_net[i].rssi = set->rssi;
sc 1310 dev/pcmcia/if_malo.c sc->sc_net[i].beaconintvl = set->beaconintvl;
sc 1311 dev/pcmcia/if_malo.c sc->sc_net[i].capinfo = set->capinfo;
sc 1312 dev/pcmcia/if_malo.c cmalo_parse_elements(sc, (set + 1),
sc 1322 dev/pcmcia/if_malo.c cmalo_parse_elements(struct malo_softc *sc, void *buf, int size, int pos)
sc 1338 dev/pcmcia/if_malo.c bcopy(buf + i, sc->sc_net[pos].ssid, len);
sc 1339 dev/pcmcia/if_malo.c DPRINTF(2, "ssid=%s\n", sc->sc_net[pos].ssid);
sc 1342 dev/pcmcia/if_malo.c bcopy(buf + i, sc->sc_net[pos].rates, len);
sc 1346 dev/pcmcia/if_malo.c sc->sc_net[pos].channel = *(uint8_t *)(buf + i);
sc 1347 dev/pcmcia/if_malo.c DPRINTF(2, "chnl=%d\n", sc->sc_net[pos].channel);
sc 1361 dev/pcmcia/if_malo.c cmalo_cmd_set_auth(struct malo_softc *sc)
sc 1363 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1367 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1376 dev/pcmcia/if_malo.c bcopy(sc->sc_net[sc->sc_net_cur].bssid, body->peermac, ETHER_ADDR_LEN);
sc 1380 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1384 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1390 dev/pcmcia/if_malo.c cmalo_cmd_set_wep(struct malo_softc *sc, uint16_t index,
sc 1393 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1397 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1439 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1443 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1449 dev/pcmcia/if_malo.c cmalo_cmd_set_snmp(struct malo_softc *sc, uint16_t oid)
sc 1451 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1455 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1492 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1496 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1502 dev/pcmcia/if_malo.c cmalo_cmd_set_radio(struct malo_softc *sc, uint16_t control)
sc 1504 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1508 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1525 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1529 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1535 dev/pcmcia/if_malo.c cmalo_cmd_set_channel(struct malo_softc *sc, uint16_t channel)
sc 1537 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1541 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1554 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1558 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1565 dev/pcmcia/if_malo.c cmalo_cmd_set_txpower(struct malo_softc *sc, int16_t txpower)
sc 1567 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1571 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1584 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1588 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1594 dev/pcmcia/if_malo.c cmalo_cmd_set_antenna(struct malo_softc *sc, uint16_t action)
sc 1596 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1600 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1620 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1624 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1630 dev/pcmcia/if_malo.c cmalo_cmd_set_macctrl(struct malo_softc *sc)
sc 1632 dev/pcmcia/if_malo.c struct ieee80211com *ic = &sc->sc_ic;
sc 1633 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1637 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1652 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1656 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1662 dev/pcmcia/if_malo.c cmalo_cmd_set_assoc(struct malo_softc *sc)
sc 1664 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1673 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1681 dev/pcmcia/if_malo.c bcopy(sc->sc_net[sc->sc_net_cur].bssid, body->peermac, ETHER_ADDR_LEN);
sc 1682 dev/pcmcia/if_malo.c body->capinfo = htole16(sc->sc_net[sc->sc_net_cur].capinfo);
sc 1685 dev/pcmcia/if_malo.c body_ssid = sc->sc_cmd + psize;
sc 1687 dev/pcmcia/if_malo.c body_ssid->size = htole16(strlen(sc->sc_net[sc->sc_net_cur].ssid));
sc 1688 dev/pcmcia/if_malo.c bcopy(sc->sc_net[sc->sc_net_cur].ssid, body_ssid->data,
sc 1692 dev/pcmcia/if_malo.c body_phy = sc->sc_cmd + psize;
sc 1695 dev/pcmcia/if_malo.c bcopy(&sc->sc_net[sc->sc_net_cur].channel, body_phy->data, 1);
sc 1698 dev/pcmcia/if_malo.c body_cf = sc->sc_cmd + psize;
sc 1703 dev/pcmcia/if_malo.c body_rates = sc->sc_cmd + psize;
sc 1705 dev/pcmcia/if_malo.c body_rates->size = htole16(strlen(sc->sc_net[sc->sc_net_cur].rates));
sc 1706 dev/pcmcia/if_malo.c bcopy(sc->sc_net[sc->sc_net_cur].rates, body_rates->data,
sc 1711 dev/pcmcia/if_malo.c body_passeid = sc->sc_cmd + psize;
sc 1720 dev/pcmcia/if_malo.c if (!sc->sc_cmd_ctxsave) {
sc 1721 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 1) != 0)
sc 1725 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1729 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1735 dev/pcmcia/if_malo.c cmalo_cmd_rsp_assoc(struct malo_softc *sc)
sc 1737 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1744 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, body->status);
sc 1745 dev/pcmcia/if_malo.c sc->sc_flags |= MALO_ASSOC_FAILED;
sc 1748 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, body->status);
sc 1754 dev/pcmcia/if_malo.c cmalo_cmd_set_80211d(struct malo_softc *sc)
sc 1756 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1762 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1772 dev/pcmcia/if_malo.c body_80211d = sc->sc_cmd + psize;
sc 1788 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1792 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1798 dev/pcmcia/if_malo.c cmalo_cmd_set_bgscan_config(struct malo_softc *sc)
sc 1800 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1804 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1821 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1825 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1831 dev/pcmcia/if_malo.c cmalo_cmd_set_bgscan_query(struct malo_softc *sc)
sc 1833 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1837 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1849 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1853 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1859 dev/pcmcia/if_malo.c cmalo_cmd_set_rate(struct malo_softc *sc)
sc 1861 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1865 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1879 dev/pcmcia/if_malo.c if (cmalo_cmd_request(sc, psize, 0) != 0)
sc 1883 dev/pcmcia/if_malo.c cmalo_cmd_response(sc);
sc 1889 dev/pcmcia/if_malo.c cmalo_cmd_request(struct malo_softc *sc, uint16_t psize, int no_response)
sc 1893 dev/pcmcia/if_malo.c cmalo_hexdump(sc->sc_cmd, psize);
sc 1896 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_CMD_WRITE_LEN, psize);
sc 1898 dev/pcmcia/if_malo.c MALO_WRITE_MULTI_2(sc, MALO_REG_CMD_WRITE, sc->sc_cmd,
sc 1900 dev/pcmcia/if_malo.c cmd = (uint8_t *)sc->sc_cmd;
sc 1901 dev/pcmcia/if_malo.c MALO_WRITE_1(sc, MALO_REG_CMD_WRITE, cmd[psize - 1]);
sc 1903 dev/pcmcia/if_malo.c MALO_WRITE_MULTI_2(sc, MALO_REG_CMD_WRITE, sc->sc_cmd, psize);
sc 1904 dev/pcmcia/if_malo.c MALO_WRITE_1(sc, MALO_REG_HOST_STATUS, MALO_VAL_CMD_DL_OVER);
sc 1905 dev/pcmcia/if_malo.c MALO_WRITE_2(sc, MALO_REG_CARD_INTR_CAUSE, MALO_VAL_CMD_DL_OVER);
sc 1912 dev/pcmcia/if_malo.c if (tsleep(sc, 0, "malocmd", 500)) {
sc 1914 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 1922 dev/pcmcia/if_malo.c cmalo_cmd_response(struct malo_softc *sc)
sc 1924 dev/pcmcia/if_malo.c struct malo_cmd_header *hdr = sc->sc_cmd;
sc 1931 dev/pcmcia/if_malo.c bzero(sc->sc_cmd, MALO_CMD_BUFFER_SIZE);
sc 1934 dev/pcmcia/if_malo.c psize = MALO_READ_2(sc, MALO_REG_CMD_READ_LEN);
sc 1936 dev/pcmcia/if_malo.c MALO_READ_MULTI_2(sc, MALO_REG_CMD_READ, sc->sc_cmd,
sc 1938 dev/pcmcia/if_malo.c cmd = (uint8_t *)sc->sc_cmd;
sc 1939 dev/pcmcia/if_malo.c cmd[psize - 1] = MALO_READ_1(sc, MALO_REG_CMD_READ);
sc 1941 dev/pcmcia/if_malo.c MALO_READ_MULTI_2(sc, MALO_REG_CMD_READ, sc->sc_cmd, psize);
sc 1943 dev/pcmcia/if_malo.c cmalo_hexdump(sc->sc_cmd, psize);
sc 1959 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, hdr->cmd);
sc 1973 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 1974 dev/pcmcia/if_malo.c cmalo_cmd_rsp_hwspec(sc);
sc 1981 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 1982 dev/pcmcia/if_malo.c cmalo_cmd_rsp_scan(sc);
sc 1987 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 1992 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 1997 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 2002 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 2007 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 2012 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 2017 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 2022 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 2027 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 2028 dev/pcmcia/if_malo.c cmalo_cmd_rsp_assoc(sc);
sc 2033 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 2038 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 2043 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 2048 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname);
sc 2052 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, hdr->cmd);
sc 20 dev/pcmcia/if_malovar.h #define MALO_READ_1(sc, reg) \
sc 21 dev/pcmcia/if_malovar.h bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (reg))
sc 22 dev/pcmcia/if_malovar.h #define MALO_READ_2(sc, reg) \
sc 23 dev/pcmcia/if_malovar.h bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (reg))
sc 24 dev/pcmcia/if_malovar.h #define MALO_READ_MULTI_2(sc, reg, off, size) \
sc 25 dev/pcmcia/if_malovar.h bus_space_read_raw_multi_2((sc)->sc_iot, (sc)->sc_ioh, (reg), (off), \
sc 27 dev/pcmcia/if_malovar.h #define MALO_WRITE_1(sc, reg, val) \
sc 28 dev/pcmcia/if_malovar.h bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
sc 29 dev/pcmcia/if_malovar.h #define MALO_WRITE_2(sc, reg, val) \
sc 30 dev/pcmcia/if_malovar.h bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
sc 31 dev/pcmcia/if_malovar.h #define MALO_WRITE_MULTI_2(sc, reg, off, size) \
sc 32 dev/pcmcia/if_malovar.h bus_space_write_raw_multi_2((sc)->sc_iot, (sc)->sc_ioh, (reg), (off), \
sc 853 dev/pcmcia/if_ne_pcmcia.c struct ne_pcmcia_softc *sc = (struct ne_pcmcia_softc *)dev;
sc 854 dev/pcmcia/if_ne_pcmcia.c struct dp8390_softc *esc = &sc->sc_ne2000.sc_dp8390;
sc 861 dev/pcmcia/if_ne_pcmcia.c pcmcia_function_enable(sc->sc_pf);
sc 862 dev/pcmcia/if_ne_pcmcia.c sc->sc_ih = pcmcia_intr_establish(sc->sc_pf, IPL_NET,
sc 863 dev/pcmcia/if_ne_pcmcia.c dp8390_intr, sc, esc->sc_dev.dv_xname);
sc 871 dev/pcmcia/if_ne_pcmcia.c if (sc->sc_ih != NULL) {
sc 872 dev/pcmcia/if_ne_pcmcia.c pcmcia_intr_disestablish(sc->sc_pf, sc->sc_ih);
sc 873 dev/pcmcia/if_ne_pcmcia.c sc->sc_ih = NULL;
sc 875 dev/pcmcia/if_ne_pcmcia.c pcmcia_function_disable(sc->sc_pf);
sc 355 dev/pcmcia/if_ray.c #define ray_read_region(sc,off,p,c) \
sc 356 dev/pcmcia/if_ray.c bus_space_read_region_1((sc)->sc_memt, (sc)->sc_memh, (off), (p), (c))
sc 357 dev/pcmcia/if_ray.c #define ray_write_region(sc,off,p,c) \
sc 358 dev/pcmcia/if_ray.c bus_space_write_region_1((sc)->sc_memt, (sc)->sc_memh, (off), (p), (c))
sc 406 dev/pcmcia/if_ray.c #define REG_WRITE(sc, off, val) \
sc 407 dev/pcmcia/if_ray.c bus_space_write_1((sc)->sc_ccrt, (sc)->sc_ccrh, \
sc 408 dev/pcmcia/if_ray.c ((sc)->sc_ccroff + (off)), (val))
sc 410 dev/pcmcia/if_ray.c #define REG_READ(sc, off) \
sc 411 dev/pcmcia/if_ray.c bus_space_read_1((sc)->sc_ccrt, (sc)->sc_ccrh, \
sc 412 dev/pcmcia/if_ray.c ((sc)->sc_ccroff + (off)))
sc 414 dev/pcmcia/if_ray.c #define SRAM_READ_1(sc, off) \
sc 415 dev/pcmcia/if_ray.c ((u_int8_t)bus_space_read_1((sc)->sc_memt, (sc)->sc_memh, (off)))
sc 417 dev/pcmcia/if_ray.c #define SRAM_READ_FIELD_1(sc, off, s, f) \
sc 418 dev/pcmcia/if_ray.c SRAM_READ_1(sc, (off) + offsetof(struct s, f))
sc 420 dev/pcmcia/if_ray.c #define SRAM_READ_FIELD_2(sc, off, s, f) \
sc 421 dev/pcmcia/if_ray.c ((((u_int16_t)SRAM_READ_1(sc, (off) + offsetof(struct s, f)) << 8) \
sc 422 dev/pcmcia/if_ray.c |(SRAM_READ_1(sc, (off) + 1 + offsetof(struct s, f)))))
sc 424 dev/pcmcia/if_ray.c #define SRAM_READ_FIELD_N(sc, off, s, f, p, n) \
sc 425 dev/pcmcia/if_ray.c ray_read_region(sc, (off) + offsetof(struct s, f), (p), (n))
sc 427 dev/pcmcia/if_ray.c #define SRAM_WRITE_1(sc, off, val) \
sc 428 dev/pcmcia/if_ray.c bus_space_write_1((sc)->sc_memt, (sc)->sc_memh, (off), (val))
sc 430 dev/pcmcia/if_ray.c #define SRAM_WRITE_FIELD_1(sc, off, s, f, v) \
sc 431 dev/pcmcia/if_ray.c SRAM_WRITE_1(sc, (off) + offsetof(struct s, f), (v))
sc 433 dev/pcmcia/if_ray.c #define SRAM_WRITE_FIELD_2(sc, off, s, f, v) do { \
sc 434 dev/pcmcia/if_ray.c SRAM_WRITE_1(sc, (off) + offsetof(struct s, f), (((v) >> 8 ) & 0xff)); \
sc 435 dev/pcmcia/if_ray.c SRAM_WRITE_1(sc, (off) + 1 + offsetof(struct s, f), ((v) & 0xff)); \
sc 438 dev/pcmcia/if_ray.c #define SRAM_WRITE_FIELD_N(sc, off, s, f, p, n) \
sc 439 dev/pcmcia/if_ray.c ray_write_region(sc, (off) + offsetof(struct s, f), (p), (n))
sc 450 dev/pcmcia/if_ray.c #define RAY_ECF_READY(sc) (!(REG_READ(sc, RAY_ECFIR) & RAY_ECSIR_IRQ))
sc 451 dev/pcmcia/if_ray.c #define RAY_ECF_START_CMD(sc) REG_WRITE(sc, RAY_ECFIR, RAY_ECSIR_IRQ)
sc 517 dev/pcmcia/if_ray.c struct ray_softc *sc;
sc 522 dev/pcmcia/if_ray.c sc = (struct ray_softc *)self;
sc 523 dev/pcmcia/if_ray.c sc->sc_pf = pa->pf;
sc 524 dev/pcmcia/if_ray.c ifp = &sc->sc_if;
sc 525 dev/pcmcia/if_ray.c sc->sc_window = -1;
sc 530 dev/pcmcia/if_ray.c pcmcia_function_init(sc->sc_pf, SIMPLEQ_FIRST(&sc->sc_pf->cfe_head));
sc 531 dev/pcmcia/if_ray.c if (pcmcia_function_enable(sc->sc_pf)) {
sc 539 dev/pcmcia/if_ray.c if (pcmcia_mem_alloc(sc->sc_pf, RAY_SRAM_MEM_SIZE, &sc->sc_mem)) {
sc 544 dev/pcmcia/if_ray.c if (pcmcia_mem_map(sc->sc_pf, PCMCIA_WIDTH_MEM8|PCMCIA_MEM_COMMON,
sc 545 dev/pcmcia/if_ray.c RAY_SRAM_MEM_BASE, RAY_SRAM_MEM_SIZE, &sc->sc_mem, &memoff,
sc 546 dev/pcmcia/if_ray.c &sc->sc_window)) {
sc 548 dev/pcmcia/if_ray.c pcmcia_mem_free(sc->sc_pf, &sc->sc_mem);
sc 553 dev/pcmcia/if_ray.c ep = &sc->sc_ecf_startup;
sc 554 dev/pcmcia/if_ray.c ray_read_region(sc, RAY_ECF_TO_HOST_BASE, ep,
sc 555 dev/pcmcia/if_ray.c sizeof(sc->sc_ecf_startup));
sc 560 dev/pcmcia/if_ray.c sc->sc_ecf_startup.e_status);
sc 565 dev/pcmcia/if_ray.c if (sc->sc_version != SC_BUILD_4 && sc->sc_version != SC_BUILD_5) {
sc 572 dev/pcmcia/if_ray.c REG_WRITE(sc, RAY_HCSIR, 0);
sc 577 dev/pcmcia/if_ray.c memset(&sc->sc_dnwid, 0, sizeof(sc->sc_dnwid));
sc 578 dev/pcmcia/if_ray.c sc->sc_dnwid.i_len = strlen(RAY_DEF_NWID);
sc 579 dev/pcmcia/if_ray.c if (sc->sc_dnwid.i_len > IEEE80211_NWID_LEN)
sc 580 dev/pcmcia/if_ray.c sc->sc_dnwid.i_len = IEEE80211_NWID_LEN;
sc 581 dev/pcmcia/if_ray.c if (sc->sc_dnwid.i_len > 0)
sc 582 dev/pcmcia/if_ray.c memcpy(sc->sc_dnwid.i_nwid, RAY_DEF_NWID, sc->sc_dnwid.i_len);
sc 583 dev/pcmcia/if_ray.c memcpy(&sc->sc_cnwid, &sc->sc_dnwid, sizeof(sc->sc_cnwid));
sc 584 dev/pcmcia/if_ray.c sc->sc_omode = sc->sc_mode = RAY_MODE_DEFAULT;
sc 585 dev/pcmcia/if_ray.c sc->sc_countrycode = sc->sc_dcountrycode =
sc 587 dev/pcmcia/if_ray.c sc->sc_flags &= ~RAY_FLAGS_RESUMEINIT;
sc 589 dev/pcmcia/if_ray.c timeout_set(&sc->sc_check_ccs_ch, ray_check_ccs, sc);
sc 590 dev/pcmcia/if_ray.c timeout_set(&sc->sc_check_scheduled_ch, ray_check_scheduled, sc);
sc 591 dev/pcmcia/if_ray.c timeout_set(&sc->sc_reset_resetloop_ch, ray_reset_resetloop, sc);
sc 592 dev/pcmcia/if_ray.c timeout_set(&sc->sc_disable_ch, (void (*)(void *))ray_disable, sc);
sc 593 dev/pcmcia/if_ray.c timeout_set(&sc->sc_start_join_timo_ch, ray_start_join_timo, sc);
sc 599 dev/pcmcia/if_ray.c printf("%s: firmware version %d, ", sc->sc_dev.dv_xname,
sc 600 dev/pcmcia/if_ray.c sc->sc_version);
sc 602 dev/pcmcia/if_ray.c if (sc->sc_version != SC_BUILD_4)
sc 610 dev/pcmcia/if_ray.c memcpy(ifp->if_xname, sc->sc_xname, IFNAMSIZ);
sc 611 dev/pcmcia/if_ray.c ifp->if_softc = sc;
sc 618 dev/pcmcia/if_ray.c memcpy(&sc->sc_ec.ac_enaddr, ep->e_station_addr, ETHER_ADDR_LEN);
sc 625 dev/pcmcia/if_ray.c ifmedia_init(&sc->sc_media, 0, ray_media_change, ray_media_status);
sc 626 dev/pcmcia/if_ray.c ifmedia_add(&sc->sc_media, IFM_ADHOC, 0, 0);
sc 627 dev/pcmcia/if_ray.c ifmedia_add(&sc->sc_media, IFM_INFRA, 0, 0);
sc 628 dev/pcmcia/if_ray.c if (sc->sc_mode == SC_MODE_ADHOC)
sc 629 dev/pcmcia/if_ray.c ifmedia_set(&sc->sc_media, IFM_ADHOC);
sc 631 dev/pcmcia/if_ray.c ifmedia_set(&sc->sc_media, IFM_INFRA);
sc 634 dev/pcmcia/if_ray.c pcmcia_function_disable(sc->sc_pf);
sc 636 dev/pcmcia/if_ray.c sc->sc_sdhook = shutdownhook_establish(ray_shutdown, sc);
sc 637 dev/pcmcia/if_ray.c sc->sc_pwrhook = powerhook_establish(ray_power, sc);
sc 640 dev/pcmcia/if_ray.c sc->sc_flags |= RAY_FLAGS_ATTACHED;
sc 644 dev/pcmcia/if_ray.c pcmcia_function_disable(sc->sc_pf);
sc 647 dev/pcmcia/if_ray.c if (sc->sc_window != -1) {
sc 648 dev/pcmcia/if_ray.c pcmcia_mem_unmap(sc->sc_pf, sc->sc_window);
sc 649 dev/pcmcia/if_ray.c pcmcia_mem_free(sc->sc_pf, &sc->sc_mem);
sc 656 dev/pcmcia/if_ray.c struct ray_softc *sc = (struct ray_softc *)dev;
sc 657 dev/pcmcia/if_ray.c struct ifnet *ifp = &sc->sc_if;
sc 660 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: activate\n", sc->sc_xname));
sc 665 dev/pcmcia/if_ray.c pcmcia_function_enable(sc->sc_pf);
sc 666 dev/pcmcia/if_ray.c printf("%s:", sc->sc_dev.dv_xname);
sc 667 dev/pcmcia/if_ray.c ray_enable(sc);
sc 673 dev/pcmcia/if_ray.c ray_disable(sc);
sc 674 dev/pcmcia/if_ray.c if (sc->sc_ih) {
sc 675 dev/pcmcia/if_ray.c pcmcia_intr_disestablish(sc->sc_pf, sc->sc_ih);
sc 676 dev/pcmcia/if_ray.c sc->sc_ih = NULL;
sc 678 dev/pcmcia/if_ray.c pcmcia_function_disable(sc->sc_pf);
sc 688 dev/pcmcia/if_ray.c struct ray_softc *sc;
sc 691 dev/pcmcia/if_ray.c sc = (struct ray_softc *)self;
sc 692 dev/pcmcia/if_ray.c ifp = &sc->sc_if;
sc 693 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: detach\n", sc->sc_xname));
sc 696 dev/pcmcia/if_ray.c if ((sc->sc_flags & RAY_FLAGS_ATTACHED) == 0)
sc 700 dev/pcmcia/if_ray.c ray_disable(sc);
sc 703 dev/pcmcia/if_ray.c if (sc->sc_window != -1) {
sc 704 dev/pcmcia/if_ray.c pcmcia_mem_unmap(sc->sc_pf, sc->sc_window);
sc 705 dev/pcmcia/if_ray.c pcmcia_mem_free(sc->sc_pf, &sc->sc_mem);
sc 708 dev/pcmcia/if_ray.c ifmedia_delete_instance(&sc->sc_media, IFM_INST_ANY);
sc 712 dev/pcmcia/if_ray.c if (sc->sc_pwrhook != NULL)
sc 713 dev/pcmcia/if_ray.c powerhook_disestablish(sc->sc_pwrhook);
sc 714 dev/pcmcia/if_ray.c if (sc->sc_sdhook != NULL)
sc 715 dev/pcmcia/if_ray.c shutdownhook_disestablish(sc->sc_sdhook);
sc 724 dev/pcmcia/if_ray.c ray_enable(struct ray_softc *sc)
sc 728 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: enable\n", sc->sc_xname));
sc 730 dev/pcmcia/if_ray.c if ((error = ray_init(sc)) == 0) {
sc 731 dev/pcmcia/if_ray.c sc->sc_ih = pcmcia_intr_establish(sc->sc_pf, IPL_NET,
sc 732 dev/pcmcia/if_ray.c ray_intr, sc, sc->sc_dev.dv_xname);
sc 733 dev/pcmcia/if_ray.c if (sc->sc_ih == NULL) {
sc 734 dev/pcmcia/if_ray.c ray_stop(sc);
sc 745 dev/pcmcia/if_ray.c ray_disable(struct ray_softc *sc)
sc 747 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: disable\n", sc->sc_xname));
sc 749 dev/pcmcia/if_ray.c if ((sc->sc_if.if_flags & IFF_RUNNING))
sc 750 dev/pcmcia/if_ray.c ray_stop(sc);
sc 752 dev/pcmcia/if_ray.c sc->sc_resetloop = 0;
sc 753 dev/pcmcia/if_ray.c sc->sc_rxoverflow = 0;
sc 754 dev/pcmcia/if_ray.c sc->sc_rxcksum = 0;
sc 755 dev/pcmcia/if_ray.c sc->sc_rxhcksum = 0;
sc 756 dev/pcmcia/if_ray.c sc->sc_rxnoise = 0;
sc 758 dev/pcmcia/if_ray.c if (sc->sc_ih)
sc 759 dev/pcmcia/if_ray.c pcmcia_intr_disestablish(sc->sc_pf, sc->sc_ih);
sc 760 dev/pcmcia/if_ray.c sc->sc_ih = NULL;
sc 767 dev/pcmcia/if_ray.c ray_init(struct ray_softc *sc)
sc 773 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: init\n", sc->sc_xname));
sc 775 dev/pcmcia/if_ray.c if ((sc->sc_if.if_flags & IFF_RUNNING))
sc 776 dev/pcmcia/if_ray.c ray_stop(sc);
sc 778 dev/pcmcia/if_ray.c if (pcmcia_function_enable(sc->sc_pf))
sc 781 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: init post-enable\n", sc->sc_xname));
sc 784 dev/pcmcia/if_ray.c memset(sc->sc_ccsinuse, 0, sizeof(sc->sc_ccsinuse));
sc 785 dev/pcmcia/if_ray.c sc->sc_havenet = 0;
sc 786 dev/pcmcia/if_ray.c memset(sc->sc_bssid, 0, sizeof(sc->sc_bssid));
sc 787 dev/pcmcia/if_ray.c sc->sc_deftxrate = 0;
sc 788 dev/pcmcia/if_ray.c sc->sc_encrypt = 0;
sc 789 dev/pcmcia/if_ray.c sc->sc_txpad = 0;
sc 790 dev/pcmcia/if_ray.c sc->sc_promisc = 0;
sc 791 dev/pcmcia/if_ray.c sc->sc_scheduled = 0;
sc 792 dev/pcmcia/if_ray.c sc->sc_running = 0;
sc 793 dev/pcmcia/if_ray.c sc->sc_txfree = RAY_CCS_NTX;
sc 794 dev/pcmcia/if_ray.c sc->sc_checkcounters = 0;
sc 795 dev/pcmcia/if_ray.c sc->sc_flags &= RAY_FLAGS_RESUMEINIT;
sc 796 dev/pcmcia/if_ray.c sc->sc_authstate = RAY_AUTH_UNAUTH;
sc 799 dev/pcmcia/if_ray.c ep = &sc->sc_ecf_startup;
sc 800 dev/pcmcia/if_ray.c ray_read_region(sc, RAY_ECF_TO_HOST_BASE, ep,
sc 801 dev/pcmcia/if_ray.c sizeof(sc->sc_ecf_startup));
sc 805 dev/pcmcia/if_ray.c pcmcia_function_disable(sc->sc_pf);
sc 807 dev/pcmcia/if_ray.c sc->sc_xname, sc->sc_ecf_startup.e_status);
sc 812 dev/pcmcia/if_ray.c if (sc->sc_version == SC_BUILD_4 && sc->sc_tibsize == 0x55)
sc 813 dev/pcmcia/if_ray.c sc->sc_tibsize = 32;
sc 814 dev/pcmcia/if_ray.c sc->sc_txpad = sc->sc_tibsize;
sc 819 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd, c_status,
sc 823 dev/pcmcia/if_ray.c REG_WRITE(sc, RAY_HCSIR, 0);
sc 826 dev/pcmcia/if_ray.c sc->sc_if.if_flags |= IFF_RUNNING | IFF_OACTIVE;
sc 829 dev/pcmcia/if_ray.c sc->sc_promisc = !!(sc->sc_if.if_flags & (IFF_PROMISC|IFF_ALLMULTI));
sc 832 dev/pcmcia/if_ray.c ray_download_params(sc);
sc 841 dev/pcmcia/if_ray.c ray_stop(struct ray_softc *sc)
sc 843 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: stop\n", sc->sc_xname));
sc 845 dev/pcmcia/if_ray.c callout_stop(&sc->sc_check_ccs_ch);
sc 846 dev/pcmcia/if_ray.c sc->sc_timocheck = 0;
sc 848 dev/pcmcia/if_ray.c callout_stop(&sc->sc_check_scheduled_ch);
sc 849 dev/pcmcia/if_ray.c sc->sc_timoneed = 0;
sc 851 dev/pcmcia/if_ray.c if (sc->sc_repreq) {
sc 852 dev/pcmcia/if_ray.c sc->sc_repreq->r_failcause = RAY_FAILCAUSE_EDEVSTOP;
sc 855 dev/pcmcia/if_ray.c if (sc->sc_updreq) {
sc 856 dev/pcmcia/if_ray.c sc->sc_repreq->r_failcause = RAY_FAILCAUSE_EDEVSTOP;
sc 860 dev/pcmcia/if_ray.c sc->sc_if.if_flags &= ~IFF_RUNNING;
sc 861 dev/pcmcia/if_ray.c pcmcia_function_disable(sc->sc_pf);
sc 868 dev/pcmcia/if_ray.c ray_reset(struct ray_softc *sc)
sc 870 dev/pcmcia/if_ray.c if (++sc->sc_resetloop >= RAY_MAX_RESETS) {
sc 871 dev/pcmcia/if_ray.c if (sc->sc_resetloop == RAY_MAX_RESETS) {
sc 873 dev/pcmcia/if_ray.c sc->sc_xname);
sc 874 dev/pcmcia/if_ray.c callout_stop(&sc->sc_reset_resetloop_ch);
sc 875 dev/pcmcia/if_ray.c callout_reset(&sc->sc_disable_ch, 1,
sc 876 dev/pcmcia/if_ray.c (void (*)(void *))ray_disable, sc);
sc 880 dev/pcmcia/if_ray.c sc->sc_xname, RAY_MAX_RESETS - sc->sc_resetloop);
sc 881 dev/pcmcia/if_ray.c callout_stop(&sc->sc_reset_resetloop_ch);
sc 882 dev/pcmcia/if_ray.c ray_init(sc);
sc 883 dev/pcmcia/if_ray.c callout_reset(&sc->sc_reset_resetloop_ch, RAY_RESET_TIMEOUT,
sc 884 dev/pcmcia/if_ray.c ray_reset_resetloop, sc);
sc 897 dev/pcmcia/if_ray.c struct ray_softc *sc;
sc 899 dev/pcmcia/if_ray.c sc = arg;
sc 900 dev/pcmcia/if_ray.c sc->sc_resetloop = 0;
sc 907 dev/pcmcia/if_ray.c struct ray_softc *sc;
sc 910 dev/pcmcia/if_ray.c sc = arg;
sc 913 dev/pcmcia/if_ray.c if ((sc->sc_flags & RAY_FLAGS_RESUMEINIT))
sc 914 dev/pcmcia/if_ray.c ray_init(sc);
sc 917 dev/pcmcia/if_ray.c if ((sc->sc_if.if_flags & IFF_RUNNING)) {
sc 918 dev/pcmcia/if_ray.c ray_stop(sc);
sc 919 dev/pcmcia/if_ray.c sc->sc_flags |= RAY_FLAGS_RESUMEINIT;
sc 932 dev/pcmcia/if_ray.c struct ray_softc *sc;
sc 934 dev/pcmcia/if_ray.c sc = arg;
sc 935 dev/pcmcia/if_ray.c ray_disable(sc);
sc 943 dev/pcmcia/if_ray.c struct ray_softc *sc;
sc 948 dev/pcmcia/if_ray.c sc = ifp->if_softc;
sc 958 dev/pcmcia/if_ray.c if ((error = ether_ioctl(ifp, &sc->sc_ec, cmd, data)) > 0) {
sc 967 dev/pcmcia/if_ray.c if ((error = ray_enable(sc)))
sc 974 dev/pcmcia/if_ray.c arp_ifinit(&sc->sc_ec, ifa);
sc 985 dev/pcmcia/if_ray.c if ((error = ray_enable(sc)))
sc 988 dev/pcmcia/if_ray.c ray_update_promisc(sc);
sc 990 dev/pcmcia/if_ray.c ray_disable(sc);
sc 997 dev/pcmcia/if_ray.c error = ether_addmulti(ifr, &sc->sc_ec);
sc 1001 dev/pcmcia/if_ray.c error = ether_delmulti(ifr, &sc->sc_ec);
sc 1005 dev/pcmcia/if_ray.c ray_update_mcast(sc);
sc 1014 dev/pcmcia/if_ray.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
sc 1032 dev/pcmcia/if_ray.c error = ray_user_update_params(sc, &pr);
sc 1040 dev/pcmcia/if_ray.c error = ray_user_report_params(sc, &pr);
sc 1062 dev/pcmcia/if_ray.c if (!memcmp(&sc->sc_dnwid, &nwid, sizeof(nwid)))
sc 1064 dev/pcmcia/if_ray.c memcpy(&sc->sc_dnwid, &nwid, sizeof(nwid));
sc 1066 dev/pcmcia/if_ray.c ray_start_join_net(sc);
sc 1070 dev/pcmcia/if_ray.c error = copyout(&sc->sc_cnwid, ifr->ifr_data,
sc 1071 dev/pcmcia/if_ray.c sizeof(sc->sc_cnwid));
sc 1074 dev/pcmcia/if_ray.c error = copyout(sc->sc_siglevs, ifr->ifr_data,
sc 1075 dev/pcmcia/if_ray.c sizeof sc->sc_siglevs);
sc 1097 dev/pcmcia/if_ray.c struct ray_softc *sc;
sc 1099 dev/pcmcia/if_ray.c sc = ifp->if_softc;
sc 1100 dev/pcmcia/if_ray.c ray_intr_start(sc);
sc 1106 dev/pcmcia/if_ray.c struct ray_softc *sc;
sc 1108 dev/pcmcia/if_ray.c sc = ifp->if_softc;
sc 1110 dev/pcmcia/if_ray.c sc->sc_media.ifm_cur->ifm_media));
sc 1111 dev/pcmcia/if_ray.c if (sc->sc_media.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC)
sc 1112 dev/pcmcia/if_ray.c sc->sc_mode = SC_MODE_ADHOC;
sc 1114 dev/pcmcia/if_ray.c sc->sc_mode = SC_MODE_INFRA;
sc 1115 dev/pcmcia/if_ray.c if (sc->sc_mode != sc->sc_omode)
sc 1116 dev/pcmcia/if_ray.c ray_start_join_net(sc);
sc 1123 dev/pcmcia/if_ray.c struct ray_softc *sc;
sc 1125 dev/pcmcia/if_ray.c sc = ifp->if_softc;
sc 1130 dev/pcmcia/if_ray.c if (sc->sc_havenet)
sc 1133 dev/pcmcia/if_ray.c if (sc->sc_mode == SC_MODE_ADHOC)
sc 1144 dev/pcmcia/if_ray.c ray_intr_start(struct ray_softc *sc)
sc 1156 dev/pcmcia/if_ray.c ifp = &sc->sc_if;
sc 1159 dev/pcmcia/if_ray.c ifp->if_xname, sc->sc_txfree, ifp->if_snd.ifq_len,
sc 1162 dev/pcmcia/if_ray.c ray_cmd_cancel(sc, SCP_IFSTART);
sc 1164 dev/pcmcia/if_ray.c if ((ifp->if_flags & IFF_RUNNING) == 0 || !sc->sc_havenet) {
sc 1177 dev/pcmcia/if_ray.c if (!RAY_ECF_READY(sc)) {
sc 1178 dev/pcmcia/if_ray.c ray_cmd_schedule(sc, SCP_IFSTART);
sc 1183 dev/pcmcia/if_ray.c if (sc->sc_authstate == RAY_AUTH_NEEDED) {
sc 1185 dev/pcmcia/if_ray.c sc->sc_authstate= RAY_AUTH_WAITING;
sc 1186 dev/pcmcia/if_ray.c ray_send_auth(sc,sc->sc_authid,OPEN_AUTH_REQUEST);
sc 1194 dev/pcmcia/if_ray.c i = ray_find_free_tx_ccs(sc, hinti);
sc 1261 dev/pcmcia/if_ray.c if (sc->sc_mode == SC_MODE_ADHOC) {
sc 1265 dev/pcmcia/if_ray.c memcpy(iframe->i_addr3, sc->sc_bssid, ETHER_ADDR_LEN);
sc 1268 dev/pcmcia/if_ray.c memcpy(iframe->i_addr1, sc->sc_bssid,ETHER_ADDR_LEN);
sc 1285 dev/pcmcia/if_ray.c bufp = ray_fill_in_tx_ccs(sc, pktlen, i, previ);
sc 1302 dev/pcmcia/if_ray.c ray_write_region(sc, bufp, d, len);
sc 1308 dev/pcmcia/if_ray.c ray_write_region(sc, bufp, d, tmplen);
sc 1311 dev/pcmcia/if_ray.c ray_write_region(sc, bufp, d, len);
sc 1333 dev/pcmcia/if_ray.c ray_dump_mbuf(sc, m0);
sc 1342 dev/pcmcia/if_ray.c if (!RAY_ECF_READY(sc)) {
sc 1349 dev/pcmcia/if_ray.c printf("%s: dropping tx packets device busy\n", sc->sc_xname);
sc 1350 dev/pcmcia/if_ray.c ray_free_ccs_chain(sc, firsti);
sc 1356 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: ray_start issueing %d \n", sc->sc_xname, firsti));
sc 1357 dev/pcmcia/if_ray.c SRAM_WRITE_1(sc, RAY_SCB_CCSI, firsti);
sc 1358 dev/pcmcia/if_ray.c RAY_ECF_START_CMD(sc);
sc 1360 dev/pcmcia/if_ray.c RAY_DPRINTF_XMIT(("%s: sent packet: len %lu\n", sc->sc_xname,
sc 1370 dev/pcmcia/if_ray.c ray_recv(struct ray_softc *sc, bus_size_t ccs)
sc 1388 dev/pcmcia/if_ray.c hexdump((caddr_t)sc->sc_memh + RAY_RCS_BASE, 0x400,
sc 1394 dev/pcmcia/if_ray.c ifp = &sc->sc_if;
sc 1407 dev/pcmcia/if_ray.c pktlen = SRAM_READ_FIELD_2(sc, ccs, ray_cmd_rx, c_pktlen);
sc 1409 dev/pcmcia/if_ray.c siglev = SRAM_READ_FIELD_1(sc, ccs, ray_cmd_rx, c_siglev);
sc 1411 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: recv pktlen %lu nofrag %d\n", sc->sc_xname,
sc 1413 dev/pcmcia/if_ray.c RAY_DPRINTF_XMIT(("%s: received packet: len %lu\n", sc->sc_xname,
sc 1417 dev/pcmcia/if_ray.c sc->sc_xname));
sc 1423 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: MGETHDR FAILED\n", sc->sc_xname));
sc 1431 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: MCLGET FAILED\n", sc->sc_xname));
sc 1444 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: recv ccs index %d\n", sc->sc_xname, first));
sc 1450 dev/pcmcia/if_ray.c bufp = SRAM_READ_FIELD_2(sc, ccs, ray_cmd_rx, c_bufp);
sc 1451 dev/pcmcia/if_ray.c len = SRAM_READ_FIELD_2(sc, ccs, ray_cmd_rx, c_len);
sc 1458 dev/pcmcia/if_ray.c ni = SRAM_READ_FIELD_1(sc, ccs, ray_cmd_rx, c_nextfrag);
sc 1460 dev/pcmcia/if_ray.c sc->sc_xname, i, (u_long)len, bufp, ni));
sc 1463 dev/pcmcia/if_ray.c sc->sc_xname, (u_long)(len + lenread),
sc 1479 dev/pcmcia/if_ray.c ray_read_region(sc, bufp, d, len);
sc 1482 dev/pcmcia/if_ray.c ray_read_region(sc, bufp, d, (tmp = RAY_RX_END - bufp));
sc 1483 dev/pcmcia/if_ray.c ray_read_region(sc, RAY_RX_BASE, d + tmp, ebufp - RAY_RX_END);
sc 1490 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: recv frag count %d\n", sc->sc_xname, frag));
sc 1496 dev/pcmcia/if_ray.c ni = SRAM_READ_FIELD_1(sc, ccs, ray_cmd_rx, c_nextfrag);
sc 1497 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd, c_status,
sc 1505 dev/pcmcia/if_ray.c sc->sc_xname, (u_long)pktlen, (u_long)lenread));
sc 1508 dev/pcmcia/if_ray.c ray_dump_mbuf(sc, m);
sc 1516 dev/pcmcia/if_ray.c sc->sc_xname, fc0));
sc 1525 dev/pcmcia/if_ray.c ray_recv_auth(sc,frame);
sc 1528 dev/pcmcia/if_ray.c sc->sc_authstate= RAY_AUTH_UNAUTH;
sc 1531 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: mgt packet not supported\n",sc->sc_xname));
sc 1542 dev/pcmcia/if_ray.c sc->sc_xname, frame->i_fc[0], frame->i_fc[1]));
sc 1555 dev/pcmcia/if_ray.c sc->sc_xname, (u_long)pktlen));
sc 1568 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: pkt not snap 0\n", sc->sc_xname));
sc 1583 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: pkt ap2ap\n", sc->sc_xname));
sc 1587 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: pkt type unknown\n", sc->sc_xname));
sc 1593 dev/pcmcia/if_ray.c ray_update_siglev(sc, src, siglev);
sc 1623 dev/pcmcia/if_ray.c ray_recv_auth(struct ray_softc *sc, struct ieee80211_frame *frame)
sc 1629 dev/pcmcia/if_ray.c if (sc->sc_mode == SC_MODE_ADHOC) {
sc 1630 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: recv auth. packet dump:\n",sc->sc_xname));
sc 1637 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: Sending authentication response.\n",sc->sc_xname));
sc 1638 dev/pcmcia/if_ray.c if (!ray_send_auth(sc,frame->i_addr2,OPEN_AUTH_RESPONSE)) {
sc 1639 dev/pcmcia/if_ray.c sc->sc_authstate= RAY_AUTH_NEEDED;
sc 1640 dev/pcmcia/if_ray.c memcpy(sc->sc_authid, frame->i_addr2, ETHER_ADDR_LEN);
sc 1644 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: Authenticated!\n",sc->sc_xname));
sc 1645 dev/pcmcia/if_ray.c sc->sc_authstate= RAY_AUTH_AUTH;
sc 1656 dev/pcmcia/if_ray.c ray_send_auth(struct ray_softc *sc, u_int8_t *dest, u_int8_t auth_type)
sc 1662 dev/pcmcia/if_ray.c ccsindex= ray_find_free_tx_ccs(sc,RAY_CCS_TX_FIRST);
sc 1667 dev/pcmcia/if_ray.c bufp= ray_fill_in_tx_ccs(sc,sizeof(packet),ccsindex,RAY_CCS_LINK_NULL);
sc 1672 dev/pcmcia/if_ray.c memcpy(frame->i_addr2,sc->sc_ecf_startup.e_station_addr,ETHER_ADDR_LEN);
sc 1673 dev/pcmcia/if_ray.c memcpy(frame->i_addr3,sc->sc_bssid,ETHER_ADDR_LEN);
sc 1677 dev/pcmcia/if_ray.c ray_write_region(sc,bufp,packet,sizeof(packet));
sc 1679 dev/pcmcia/if_ray.c SRAM_WRITE_1(sc, RAY_SCB_CCSI, ccsindex);
sc 1680 dev/pcmcia/if_ray.c RAY_ECF_START_CMD(sc);
sc 1682 dev/pcmcia/if_ray.c RAY_DPRINTF_XMIT(("%s: sent auth packet: len %lu\n", sc->sc_xname,
sc 1696 dev/pcmcia/if_ray.c ray_find_free_tx_ccs(struct ray_softc *sc, u_int hint)
sc 1701 dev/pcmcia/if_ray.c stat = SRAM_READ_FIELD_1(sc, RAY_GET_CCS(i), ray_cmd, c_status);
sc 1710 dev/pcmcia/if_ray.c stat = SRAM_READ_FIELD_1(sc, RAY_GET_CCS(i), ray_cmd, c_status);
sc 1722 dev/pcmcia/if_ray.c ray_fill_in_tx_ccs(struct ray_softc *sc, size_t pktlen, u_int i, u_int pi)
sc 1728 dev/pcmcia/if_ray.c bufp += sc->sc_txpad;
sc 1730 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_tx, c_status, RAY_CCS_STATUS_BUSY);
sc 1731 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_tx, c_cmd, RAY_CMD_TX_REQ);
sc 1732 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_tx, c_link, RAY_CCS_LINK_NULL);
sc 1733 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_2(sc, ccs, ray_cmd_tx, c_bufp, bufp);
sc 1734 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_2(sc, ccs, ray_cmd_tx, c_len, pktlen);
sc 1735 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_tx, c_tx_rate, sc->sc_deftxrate);
sc 1736 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_tx, c_apm_mode, 0);
sc 1737 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_tx, c_antenna, 0);
sc 1741 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, RAY_GET_CCS(pi), ray_cmd_tx, c_link, i);
sc 1744 dev/pcmcia/if_ray.c sc->sc_xname, bufp, i, pi));
sc 1754 dev/pcmcia/if_ray.c ray_update_params_done(struct ray_softc *sc, bus_size_t ccs, u_int stat)
sc 1761 dev/pcmcia/if_ray.c sc->sc_xname, stat));
sc 1765 dev/pcmcia/if_ray.c printf("%s: failed to update a promisc\n", sc->sc_xname);
sc 1770 dev/pcmcia/if_ray.c if (sc->sc_running & SCP_UPD_PROMISC) {
sc 1771 dev/pcmcia/if_ray.c ray_cmd_done(sc, SCP_UPD_PROMISC);
sc 1772 dev/pcmcia/if_ray.c sc->sc_promisc = SRAM_READ_1(sc, RAY_HOST_TO_ECF_BASE);
sc 1773 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: new promisc value %d\n", sc->sc_xname,
sc 1774 dev/pcmcia/if_ray.c sc->sc_promisc));
sc 1775 dev/pcmcia/if_ray.c } else if (sc->sc_updreq) {
sc 1776 dev/pcmcia/if_ray.c ray_cmd_done(sc, SCP_UPD_UPDATEPARAMS);
sc 1778 dev/pcmcia/if_ray.c sc->sc_updreq->r_failcause =
sc 1779 dev/pcmcia/if_ray.c SRAM_READ_FIELD_1(sc, ccs, ray_cmd_update, c_failcause);
sc 1780 dev/pcmcia/if_ray.c sc->sc_updreq = 0;
sc 1794 dev/pcmcia/if_ray.c struct ray_softc *sc;
sc 1799 dev/pcmcia/if_ray.c sc = arg;
sc 1802 dev/pcmcia/if_ray.c sc->sc_xname, sc->sc_scheduled, sc->sc_running, RAY_ECF_READY(sc)));
sc 1804 dev/pcmcia/if_ray.c if (sc->sc_timoneed) {
sc 1805 dev/pcmcia/if_ray.c callout_stop(&sc->sc_check_scheduled_ch);
sc 1806 dev/pcmcia/if_ray.c sc->sc_timoneed = 0;
sc 1810 dev/pcmcia/if_ray.c if (sc->sc_running & SCP_UPDATESUBCMD)
sc 1811 dev/pcmcia/if_ray.c sc->sc_scheduled &= ~SCP_UPDATESUBCMD;
sc 1815 dev/pcmcia/if_ray.c if ((sc->sc_scheduled & ~SCP_UPD_MASK) == 0)
sc 1817 dev/pcmcia/if_ray.c if (!RAY_ECF_READY(sc))
sc 1819 dev/pcmcia/if_ray.c if (sc->sc_scheduled & mask)
sc 1820 dev/pcmcia/if_ray.c (*ray_cmdtab[i])(sc);
sc 1825 dev/pcmcia/if_ray.c sc->sc_xname, sc->sc_scheduled, sc->sc_running, RAY_ECF_READY(sc)));
sc 1827 dev/pcmcia/if_ray.c if (sc->sc_scheduled & ~SCP_UPD_MASK)
sc 1828 dev/pcmcia/if_ray.c ray_set_pending(sc, sc->sc_scheduled);
sc 1844 dev/pcmcia/if_ray.c struct ray_softc *sc;
sc 1850 dev/pcmcia/if_ray.c sc = arg;
sc 1852 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: ray_check_ccs\n", sc->sc_xname));
sc 1854 dev/pcmcia/if_ray.c sc->sc_timocheck = 0;
sc 1856 dev/pcmcia/if_ray.c if (!sc->sc_ccsinuse[i])
sc 1859 dev/pcmcia/if_ray.c cmd = SRAM_READ_FIELD_1(sc, ccs, ray_cmd, c_cmd);
sc 1864 dev/pcmcia/if_ray.c stat = SRAM_READ_FIELD_1(sc, ccs, ray_cmd, c_status);
sc 1866 dev/pcmcia/if_ray.c "cmd 0x%x stat %d\n", sc->sc_xname, i,
sc 1877 dev/pcmcia/if_ray.c if ((fp = ray_ccs_done(sc, ccs)))
sc 1878 dev/pcmcia/if_ray.c (*fp)(sc);
sc 1880 dev/pcmcia/if_ray.c if (sc->sc_ccsinuse[i] == 1) {
sc 1882 dev/pcmcia/if_ray.c sc->sc_ccsinuse[i] = 2;
sc 1883 dev/pcmcia/if_ray.c if (!sc->sc_timocheck) {
sc 1884 dev/pcmcia/if_ray.c callout_reset(&sc->sc_check_ccs_ch, 1,
sc 1885 dev/pcmcia/if_ray.c ray_check_ccs, sc);
sc 1886 dev/pcmcia/if_ray.c sc->sc_timocheck = 1;
sc 1888 dev/pcmcia/if_ray.c } else if ((fp = ray_ccs_done(sc, ccs)))
sc 1889 dev/pcmcia/if_ray.c (*fp)(sc);
sc 1891 dev/pcmcia/if_ray.c callout_reset(&sc->sc_check_ccs_ch, RAY_CHECK_CCS_TIMEOUT,
sc 1892 dev/pcmcia/if_ray.c ray_check_ccs, sc);
sc 1893 dev/pcmcia/if_ray.c sc->sc_timocheck = 1;
sc 1907 dev/pcmcia/if_ray.c ray_update_error_counters(struct ray_softc *sc)
sc 1913 dev/pcmcia/if_ray.c if (SRAM_READ_FIELD_1(sc, csc, ray_csc, csc_mrxo_own)) {
sc 1914 dev/pcmcia/if_ray.c sc->sc_rxoverflow +=
sc 1915 dev/pcmcia/if_ray.c SRAM_READ_FIELD_2(sc, csc, ray_csc, csc_mrx_overflow);
sc 1916 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, csc, ray_csc, csc_mrxo_own, 0);
sc 1918 dev/pcmcia/if_ray.c if (SRAM_READ_FIELD_1(sc, csc, ray_csc, csc_mrxc_own)) {
sc 1919 dev/pcmcia/if_ray.c sc->sc_rxcksum +=
sc 1920 dev/pcmcia/if_ray.c SRAM_READ_FIELD_2(sc, csc, ray_csc, csc_mrx_overflow);
sc 1921 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, csc, ray_csc, csc_mrxc_own, 0);
sc 1923 dev/pcmcia/if_ray.c if (SRAM_READ_FIELD_1(sc, csc, ray_csc, csc_rxhc_own)) {
sc 1924 dev/pcmcia/if_ray.c sc->sc_rxhcksum +=
sc 1925 dev/pcmcia/if_ray.c SRAM_READ_FIELD_2(sc, csc, ray_csc, csc_rx_hcksum);
sc 1926 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, csc, ray_csc, csc_rxhc_own, 0);
sc 1928 dev/pcmcia/if_ray.c sc->sc_rxnoise = SRAM_READ_FIELD_1(sc, csc, ray_csc, csc_rx_noise);
sc 1935 dev/pcmcia/if_ray.c ray_ccs_done(struct ray_softc *sc, bus_size_t ccs)
sc 1941 dev/pcmcia/if_ray.c ifp = &sc->sc_if;
sc 1942 dev/pcmcia/if_ray.c cmd = SRAM_READ_FIELD_1(sc, ccs, ray_cmd, c_cmd);
sc 1943 dev/pcmcia/if_ray.c stat = SRAM_READ_FIELD_1(sc, ccs, ray_cmd, c_status);
sc 1946 dev/pcmcia/if_ray.c sc->sc_xname, RAY_GET_INDEX(ccs), cmd, stat));
sc 1955 dev/pcmcia/if_ray.c ray_cmd_done(sc, SCP_UPD_STARTUP);
sc 1958 dev/pcmcia/if_ray.c sc->sc_if.if_flags &= ~IFF_OACTIVE;
sc 1960 dev/pcmcia/if_ray.c sc->sc_omode = sc->sc_mode;
sc 1961 dev/pcmcia/if_ray.c memcpy(&sc->sc_cnwid, &sc->sc_dnwid, sizeof(sc->sc_cnwid));
sc 1966 dev/pcmcia/if_ray.c rcmd = ray_update_params_done(sc, ccs, stat);
sc 1970 dev/pcmcia/if_ray.c ray_cmd_done(sc, SCP_REPORTPARAMS);
sc 1971 dev/pcmcia/if_ray.c if (!sc->sc_repreq)
sc 1973 dev/pcmcia/if_ray.c sc->sc_repreq->r_failcause =
sc 1974 dev/pcmcia/if_ray.c SRAM_READ_FIELD_1(sc, ccs, ray_cmd_report, c_failcause);
sc 1975 dev/pcmcia/if_ray.c sc->sc_repreq->r_len =
sc 1976 dev/pcmcia/if_ray.c SRAM_READ_FIELD_1(sc, ccs, ray_cmd_report, c_len);
sc 1977 dev/pcmcia/if_ray.c ray_read_region(sc, RAY_ECF_TO_HOST_BASE, sc->sc_repreq->r_data,
sc 1978 dev/pcmcia/if_ray.c sc->sc_repreq->r_len);
sc 1979 dev/pcmcia/if_ray.c sc->sc_repreq = 0;
sc 1983 dev/pcmcia/if_ray.c ray_cmd_done(sc, SCP_UPD_MCAST);
sc 1989 dev/pcmcia/if_ray.c rcmd = ray_start_join_net_done(sc, cmd, ccs, stat);
sc 1992 dev/pcmcia/if_ray.c if (sc->sc_if.if_flags & IFF_OACTIVE) {
sc 1993 dev/pcmcia/if_ray.c sc->sc_if.if_flags &= ~IFF_OACTIVE;
sc 1998 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd, c_status,
sc 2002 dev/pcmcia/if_ray.c ray_cmd_done(sc, SCP_STARTASSOC);
sc 2006 dev/pcmcia/if_ray.c sc->sc_havenet = 1;
sc 2018 dev/pcmcia/if_ray.c sc->sc_if.if_xname, cmd);
sc 2021 dev/pcmcia/if_ray.c ray_free_ccs(sc, ccs);
sc 2027 dev/pcmcia/if_ray.c ray_check_scheduled(sc);
sc 2036 dev/pcmcia/if_ray.c ray_rccs_intr(struct ray_softc *sc, bus_size_t ccs)
sc 2041 dev/pcmcia/if_ray.c cmd = SRAM_READ_FIELD_1(sc, ccs, ray_cmd, c_cmd);
sc 2042 dev/pcmcia/if_ray.c stat = SRAM_READ_FIELD_1(sc, ccs, ray_cmd, c_status);
sc 2045 dev/pcmcia/if_ray.c sc->sc_xname, RAY_GET_INDEX(ccs), cmd, stat));
sc 2053 dev/pcmcia/if_ray.c ray_recv(sc, ccs);
sc 2056 dev/pcmcia/if_ray.c if (sc->sc_mode == SC_MODE_ADHOC)
sc 2059 dev/pcmcia/if_ray.c SRAM_READ_FIELD_N(sc, ccs, ray_cmd_net, c_bss_id,
sc 2060 dev/pcmcia/if_ray.c sc->sc_bssid, sizeof(sc->sc_bssid));
sc 2065 dev/pcmcia/if_ray.c sc->sc_havenet = 0;
sc 2070 dev/pcmcia/if_ray.c ray_update_error_counters(sc);
sc 2073 dev/pcmcia/if_ray.c if (sc->sc_version == SC_BUILD_4 && cmd == 0x55
sc 2078 dev/pcmcia/if_ray.c sc->sc_if.if_xname, cmd);
sc 2082 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd, c_status, RAY_CCS_STATUS_FREE);
sc 2093 dev/pcmcia/if_ray.c struct ray_softc *sc;
sc 2097 dev/pcmcia/if_ray.c sc = arg;
sc 2099 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: ray_intr\n", sc->sc_xname));
sc 2101 dev/pcmcia/if_ray.c if ((++sc->sc_checkcounters % 32) == 0)
sc 2102 dev/pcmcia/if_ray.c ray_update_error_counters(sc);
sc 2106 dev/pcmcia/if_ray.c if (!REG_READ(sc, RAY_HCSIR))
sc 2110 dev/pcmcia/if_ray.c i = SRAM_READ_1(sc, RAY_SCB_RCCSI);
sc 2112 dev/pcmcia/if_ray.c rcmd = ray_ccs_done(sc, RAY_GET_CCS(i));
sc 2114 dev/pcmcia/if_ray.c rcmd = ray_rccs_intr(sc, RAY_GET_CCS(i));
sc 2116 dev/pcmcia/if_ray.c printf("%s: intr: bad cmd index %d\n", sc->sc_xname, i);
sc 2120 dev/pcmcia/if_ray.c (*rcmd)(sc);
sc 2123 dev/pcmcia/if_ray.c REG_WRITE(sc, RAY_HCSIR, 0);
sc 2125 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: interrupt handled %d\n", sc->sc_xname, count));
sc 2139 dev/pcmcia/if_ray.c ray_free_ccs_chain(struct ray_softc *sc, u_int ni)
sc 2144 dev/pcmcia/if_ray.c ni = SRAM_READ_FIELD_1(sc, RAY_GET_CCS(i), ray_cmd, c_link);
sc 2145 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, RAY_GET_CCS(i), ray_cmd, c_status,
sc 2155 dev/pcmcia/if_ray.c ray_free_ccs(struct ray_softc *sc, bus_size_t ccs)
sc 2159 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: free_ccs idx %ld\n", sc->sc_xname,
sc 2162 dev/pcmcia/if_ray.c stat = SRAM_READ_FIELD_1(sc, ccs, ray_cmd, c_status);
sc 2163 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd, c_status, RAY_CCS_STATUS_FREE);
sc 2165 dev/pcmcia/if_ray.c sc->sc_ccsinuse[RAY_GET_INDEX(ccs)] = 0;
sc 2181 dev/pcmcia/if_ray.c ray_alloc_ccs(struct ray_softc *sc, bus_size_t *ccsp, u_int cmd, u_int track)
sc 2186 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: alloc_ccs cmd %d\n", sc->sc_xname, cmd));
sc 2189 dev/pcmcia/if_ray.c if (track && !RAY_ECF_READY(sc)) {
sc 2190 dev/pcmcia/if_ray.c ray_cmd_schedule(sc, track);
sc 2197 dev/pcmcia/if_ray.c (void)SRAM_READ_FIELD_1(sc, RAY_GET_CCS(i), ray_cmd, c_status);
sc 2198 dev/pcmcia/if_ray.c if (!sc->sc_ccsinuse[i])
sc 2203 dev/pcmcia/if_ray.c ray_cmd_schedule(sc, track);
sc 2206 dev/pcmcia/if_ray.c sc->sc_ccsinuse[i] = 1;
sc 2208 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd, c_status, RAY_CCS_STATUS_BUSY);
sc 2209 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd, c_cmd, cmd);
sc 2210 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd, c_link, RAY_CCS_LINK_NULL);
sc 2223 dev/pcmcia/if_ray.c ray_set_pending(struct ray_softc *sc, u_int cmdf)
sc 2225 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: ray_set_pending 0x%x\n", sc->sc_xname, cmdf));
sc 2227 dev/pcmcia/if_ray.c sc->sc_scheduled |= cmdf;
sc 2228 dev/pcmcia/if_ray.c if (!sc->sc_timoneed) {
sc 2229 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: ray_set_pending new timo\n", sc->sc_xname));
sc 2230 dev/pcmcia/if_ray.c callout_reset(&sc->sc_check_scheduled_ch,
sc 2231 dev/pcmcia/if_ray.c RAY_CHECK_SCHED_TIMEOUT, ray_check_scheduled, sc);
sc 2232 dev/pcmcia/if_ray.c sc->sc_timoneed = 1;
sc 2240 dev/pcmcia/if_ray.c ray_cmd_schedule(struct ray_softc *sc, int cmdf)
sc 2244 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: ray_cmd_schedule 0x%x\n", sc->sc_xname, cmdf));
sc 2248 dev/pcmcia/if_ray.c ray_set_pending(sc, track);
sc 2249 dev/pcmcia/if_ray.c else if (ray_cmd_is_running(sc, SCP_UPDATESUBCMD)) {
sc 2251 dev/pcmcia/if_ray.c sc->sc_scheduled |= cmdf;
sc 2253 dev/pcmcia/if_ray.c ray_set_pending(sc, cmdf | SCP_UPDATESUBCMD);
sc 2260 dev/pcmcia/if_ray.c ray_cmd_is_scheduled(struct ray_softc *sc, int cmdf)
sc 2262 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: ray_cmd_is_scheduled 0x%x\n", sc->sc_xname, cmdf));
sc 2264 dev/pcmcia/if_ray.c return ((sc->sc_scheduled & cmdf) ? 1 : 0);
sc 2271 dev/pcmcia/if_ray.c ray_cmd_cancel(struct ray_softc *sc, int cmdf)
sc 2273 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: ray_cmd_cancel 0x%x\n", sc->sc_xname, cmdf));
sc 2275 dev/pcmcia/if_ray.c sc->sc_scheduled &= ~cmdf;
sc 2276 dev/pcmcia/if_ray.c if ((cmdf & SCP_UPD_MASK) && (sc->sc_scheduled & SCP_UPD_MASK) == 0)
sc 2277 dev/pcmcia/if_ray.c sc->sc_scheduled &= ~SCP_UPDATESUBCMD;
sc 2280 dev/pcmcia/if_ray.c if (sc->sc_scheduled == 0 && sc->sc_timoneed) {
sc 2281 dev/pcmcia/if_ray.c callout_stop(&sc->sc_check_scheduled_ch);
sc 2282 dev/pcmcia/if_ray.c sc->sc_timoneed = 0;
sc 2290 dev/pcmcia/if_ray.c ray_cmd_ran(struct ray_softc *sc, int cmdf)
sc 2292 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: ray_cmd_ran 0x%x\n", sc->sc_xname, cmdf));
sc 2295 dev/pcmcia/if_ray.c sc->sc_running |= cmdf | SCP_UPDATESUBCMD;
sc 2297 dev/pcmcia/if_ray.c sc->sc_running |= cmdf;
sc 2299 dev/pcmcia/if_ray.c if ((cmdf & SCP_TIMOCHECK_CMD_MASK) && !sc->sc_timocheck) {
sc 2300 dev/pcmcia/if_ray.c callout_reset(&sc->sc_check_ccs_ch, RAY_CHECK_CCS_TIMEOUT,
sc 2301 dev/pcmcia/if_ray.c ray_check_ccs, sc);
sc 2302 dev/pcmcia/if_ray.c sc->sc_timocheck = 1;
sc 2310 dev/pcmcia/if_ray.c ray_cmd_is_running(struct ray_softc *sc, int cmdf)
sc 2312 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: ray_cmd_is_running 0x%x\n", sc->sc_xname, cmdf));
sc 2314 dev/pcmcia/if_ray.c return ((sc->sc_running & cmdf) ? 1 : 0);
sc 2321 dev/pcmcia/if_ray.c ray_cmd_done(struct ray_softc *sc, int cmdf)
sc 2323 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: ray_cmd_done 0x%x\n", sc->sc_xname, cmdf));
sc 2325 dev/pcmcia/if_ray.c sc->sc_running &= ~cmdf;
sc 2327 dev/pcmcia/if_ray.c sc->sc_running &= ~SCP_UPDATESUBCMD;
sc 2328 dev/pcmcia/if_ray.c if (sc->sc_scheduled & SCP_UPD_MASK)
sc 2329 dev/pcmcia/if_ray.c ray_cmd_schedule(sc, sc->sc_scheduled & SCP_UPD_MASK);
sc 2331 dev/pcmcia/if_ray.c if ((sc->sc_running & SCP_TIMOCHECK_CMD_MASK) == 0 && sc->sc_timocheck){
sc 2332 dev/pcmcia/if_ray.c callout_stop(&sc->sc_check_ccs_ch);
sc 2333 dev/pcmcia/if_ray.c sc->sc_timocheck = 0;
sc 2342 dev/pcmcia/if_ray.c ray_issue_cmd(struct ray_softc *sc, bus_size_t ccs, u_int track)
sc 2346 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: ray_cmd_issue 0x%x\n", sc->sc_xname, track));
sc 2354 dev/pcmcia/if_ray.c while (!RAY_ECF_READY(sc))
sc 2356 dev/pcmcia/if_ray.c ray_free_ccs(sc, ccs);
sc 2358 dev/pcmcia/if_ray.c ray_cmd_schedule(sc, track);
sc 2362 dev/pcmcia/if_ray.c SRAM_WRITE_1(sc, RAY_SCB_CCSI, RAY_GET_INDEX(ccs));
sc 2363 dev/pcmcia/if_ray.c RAY_ECF_START_CMD(sc);
sc 2364 dev/pcmcia/if_ray.c ray_cmd_ran(sc, track);
sc 2373 dev/pcmcia/if_ray.c ray_simple_cmd(struct ray_softc *sc, u_int cmd, u_int track)
sc 2377 dev/pcmcia/if_ray.c return (ray_alloc_ccs(sc, &ccs, cmd, track) &&
sc 2378 dev/pcmcia/if_ray.c ray_issue_cmd(sc, ccs, track));
sc 2389 dev/pcmcia/if_ray.c ray_update_subcmd(struct ray_softc *sc)
sc 2393 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: ray_update_subcmd\n", sc->sc_xname));
sc 2395 dev/pcmcia/if_ray.c ray_cmd_cancel(sc, SCP_UPDATESUBCMD);
sc 2396 dev/pcmcia/if_ray.c if ((sc->sc_if.if_flags & IFF_RUNNING) == 0)
sc 2400 dev/pcmcia/if_ray.c if ((sc->sc_scheduled & SCP_UPD_MASK) == 0)
sc 2403 dev/pcmcia/if_ray.c if (ray_cmd_is_running(sc, SCP_UPDATESUBCMD))
sc 2405 dev/pcmcia/if_ray.c if (!RAY_ECF_READY(sc))
sc 2412 dev/pcmcia/if_ray.c if (sc->sc_scheduled & ((submask - 1) & SCP_UPD_MASK))
sc 2414 dev/pcmcia/if_ray.c if (sc->sc_scheduled & submask)
sc 2415 dev/pcmcia/if_ray.c (*ray_subcmdtab[i])(sc);
sc 2423 dev/pcmcia/if_ray.c ray_report_params(struct ray_softc *sc)
sc 2427 dev/pcmcia/if_ray.c ray_cmd_cancel(sc, SCP_REPORTPARAMS);
sc 2429 dev/pcmcia/if_ray.c if (!sc->sc_repreq)
sc 2433 dev/pcmcia/if_ray.c if ((sc->sc_if.if_flags & IFF_RUNNING) == 0)
sc 2435 dev/pcmcia/if_ray.c else if (ray_cmd_is_running(sc, SCP_REPORTPARAMS)) {
sc 2436 dev/pcmcia/if_ray.c ray_cmd_schedule(sc, SCP_REPORTPARAMS);
sc 2438 dev/pcmcia/if_ray.c } else if (!ray_alloc_ccs(sc, &ccs, RAY_CMD_REPORT_PARAMS,
sc 2442 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_report, c_paramid,
sc 2443 dev/pcmcia/if_ray.c sc->sc_repreq->r_paramid);
sc 2444 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_report, c_nparam, 1);
sc 2445 dev/pcmcia/if_ray.c (void)ray_issue_cmd(sc, ccs, SCP_REPORTPARAMS);
sc 2452 dev/pcmcia/if_ray.c ray_start_assoc(struct ray_softc *sc)
sc 2454 dev/pcmcia/if_ray.c ray_cmd_cancel(sc, SCP_STARTASSOC);
sc 2455 dev/pcmcia/if_ray.c if ((sc->sc_if.if_flags & IFF_RUNNING) == 0)
sc 2457 dev/pcmcia/if_ray.c else if (ray_cmd_is_running(sc, SCP_STARTASSOC))
sc 2459 dev/pcmcia/if_ray.c (void)ray_simple_cmd(sc, RAY_CMD_START_ASSOC, SCP_STARTASSOC);
sc 2472 dev/pcmcia/if_ray.c ray_download_params(struct ray_softc *sc)
sc 2479 dev/pcmcia/if_ray.c RAY_DPRINTF(("%s: init_startup_params\n", sc->sc_xname));
sc 2481 dev/pcmcia/if_ray.c ray_cmd_cancel(sc, SCP_UPD_STARTUP);
sc 2486 dev/pcmcia/if_ray.c sp = &sc->sc_startup;
sc 2487 dev/pcmcia/if_ray.c sp4 = &sc->sc_startup_4;
sc 2488 dev/pcmcia/if_ray.c sp5 = &sc->sc_startup_5;
sc 2490 dev/pcmcia/if_ray.c if (sc->sc_version == SC_BUILD_4)
sc 2495 dev/pcmcia/if_ray.c memcpy(sp->sp_ssid, sc->sc_dnwid.i_nwid, sizeof(sp->sp_ssid));
sc 2497 dev/pcmcia/if_ray.c memcpy(sp->sp_mac_addr, sc->sc_ecf_startup.e_station_addr,
sc 2500 dev/pcmcia/if_ray.c if (sc->sc_version == SC_BUILD_4) {
sc 2541 dev/pcmcia/if_ray.c if (sc->sc_version == SC_BUILD_4)
sc 2548 dev/pcmcia/if_ray.c if (sc->sc_version == SC_BUILD_4) {
sc 2556 dev/pcmcia/if_ray.c if (sc->sc_version == SC_BUILD_4) {
sc 2573 dev/pcmcia/if_ray.c sp->sp_promisc = sc->sc_promisc;
sc 2575 dev/pcmcia/if_ray.c if (sc->sc_version == SC_BUILD_4) {
sc 2606 dev/pcmcia/if_ray.c sp->sp_country_code = sc->sc_dcountrycode;
sc 2608 dev/pcmcia/if_ray.c if (sc->sc_version == SC_BUILD_4) {
sc 2644 dev/pcmcia/if_ray.c if (!RAY_ECF_READY(sc))
sc 2649 dev/pcmcia/if_ray.c ray_write_region(sc, off, sp, sizeof(sc->sc_startup));
sc 2650 dev/pcmcia/if_ray.c off += sizeof(sc->sc_startup);
sc 2651 dev/pcmcia/if_ray.c if (sc->sc_version == SC_BUILD_4)
sc 2652 dev/pcmcia/if_ray.c ray_write_region(sc, off, sp4, sizeof(*sp4));
sc 2654 dev/pcmcia/if_ray.c ray_write_region(sc, off, sp5, sizeof(*sp5));
sc 2655 dev/pcmcia/if_ray.c if (!ray_simple_cmd(sc, RAY_CMD_START_PARAMS, SCP_UPD_STARTUP))
sc 2663 dev/pcmcia/if_ray.c ray_start_join_net(struct ray_softc *sc)
sc 2669 dev/pcmcia/if_ray.c ray_cmd_cancel(sc, SCP_UPD_STARTJOIN);
sc 2670 dev/pcmcia/if_ray.c if ((sc->sc_if.if_flags & IFF_RUNNING) == 0)
sc 2674 dev/pcmcia/if_ray.c if (ray_cmd_is_running(sc, SCP_UPDATESUBCMD)) {
sc 2675 dev/pcmcia/if_ray.c ray_cmd_schedule(sc, SCP_UPD_STARTJOIN);
sc 2679 dev/pcmcia/if_ray.c if (sc->sc_mode == SC_MODE_ADHOC)
sc 2684 dev/pcmcia/if_ray.c if (!ray_alloc_ccs(sc, &ccs, cmd, SCP_UPD_STARTJOIN))
sc 2686 dev/pcmcia/if_ray.c sc->sc_startccs = ccs;
sc 2687 dev/pcmcia/if_ray.c sc->sc_startcmd = cmd;
sc 2688 dev/pcmcia/if_ray.c if (!memcmp(&sc->sc_cnwid, &sc->sc_dnwid, sizeof(sc->sc_cnwid))
sc 2689 dev/pcmcia/if_ray.c && sc->sc_omode == sc->sc_mode)
sc 2690 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_net, c_upd_param, 0);
sc 2692 dev/pcmcia/if_ray.c sc->sc_havenet = 0;
sc 2694 dev/pcmcia/if_ray.c np.p_net_type = sc->sc_mode;
sc 2695 dev/pcmcia/if_ray.c memcpy(np.p_ssid, sc->sc_dnwid.i_nwid, sizeof(np.p_ssid));
sc 2696 dev/pcmcia/if_ray.c ray_write_region(sc, RAY_HOST_TO_ECF_BASE, &np, sizeof(np));
sc 2697 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_net, c_upd_param, 1);
sc 2699 dev/pcmcia/if_ray.c if (ray_issue_cmd(sc, ccs, SCP_UPD_STARTJOIN))
sc 2700 dev/pcmcia/if_ray.c callout_reset(&sc->sc_start_join_timo_ch, RAY_START_TIMEOUT,
sc 2701 dev/pcmcia/if_ray.c ray_start_join_timo, sc);
sc 2707 dev/pcmcia/if_ray.c struct ray_softc *sc;
sc 2710 dev/pcmcia/if_ray.c sc = arg;
sc 2711 dev/pcmcia/if_ray.c stat = SRAM_READ_FIELD_1(sc, sc->sc_startccs, ray_cmd, c_status);
sc 2712 dev/pcmcia/if_ray.c ray_start_join_net_done(sc, sc->sc_startcmd, sc->sc_startccs, stat);
sc 2724 dev/pcmcia/if_ray.c ray_start_join_net_done(struct ray_softc *sc, u_int cmd, bus_size_t ccs, u_int stat)
sc 2729 dev/pcmcia/if_ray.c callout_stop(&sc->sc_start_join_timo_ch);
sc 2730 dev/pcmcia/if_ray.c ray_cmd_done(sc, SCP_UPD_STARTJOIN);
sc 2734 dev/pcmcia/if_ray.c sc->sc_havenet = 0;
sc 2739 dev/pcmcia/if_ray.c callout_reset(&sc->sc_start_join_timo_ch, RAY_START_TIMEOUT,
sc 2740 dev/pcmcia/if_ray.c ray_start_join_timo, sc);
sc 2743 dev/pcmcia/if_ray.c if (!RAY_ECF_READY(sc))
sc 2747 dev/pcmcia/if_ray.c if (!memcmp(&sc->sc_cnwid, &sc->sc_dnwid, sizeof(sc->sc_cnwid))
sc 2748 dev/pcmcia/if_ray.c && sc->sc_omode == sc->sc_mode)
sc 2749 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc,ccs, ray_cmd_net, c_upd_param, 0);
sc 2752 dev/pcmcia/if_ray.c np.p_net_type = sc->sc_mode;
sc 2753 dev/pcmcia/if_ray.c memcpy(np.p_ssid, sc->sc_dnwid.i_nwid,
sc 2755 dev/pcmcia/if_ray.c ray_write_region(sc, RAY_HOST_TO_ECF_BASE, &np,
sc 2757 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc,ccs, ray_cmd_net, c_upd_param, 1);
sc 2760 dev/pcmcia/if_ray.c if (sc->sc_mode == SC_MODE_ADHOC)
sc 2764 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_net, c_cmd,
sc 2766 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_net, c_status,
sc 2770 dev/pcmcia/if_ray.c SRAM_WRITE_1(sc, RAY_SCB_CCSI, RAY_GET_INDEX(ccs));
sc 2771 dev/pcmcia/if_ray.c RAY_ECF_START_CMD(sc);
sc 2772 dev/pcmcia/if_ray.c ray_cmd_ran(sc, SCP_UPD_STARTJOIN);
sc 2776 dev/pcmcia/if_ray.c SRAM_READ_FIELD_N(sc, ccs, ray_cmd_net, c_bss_id, sc->sc_bssid,
sc 2777 dev/pcmcia/if_ray.c sizeof(sc->sc_bssid));
sc 2779 dev/pcmcia/if_ray.c sc->sc_deftxrate = SRAM_READ_FIELD_1(sc, ccs, ray_cmd_net,c_def_txrate);
sc 2780 dev/pcmcia/if_ray.c sc->sc_encrypt = SRAM_READ_FIELD_1(sc, ccs, ray_cmd_net, c_encrypt);
sc 2783 dev/pcmcia/if_ray.c if (sc->sc_deftxrate == 0x55)
sc 2784 dev/pcmcia/if_ray.c sc->sc_deftxrate = RAY_PID_BASIC_RATE_1500K;
sc 2785 dev/pcmcia/if_ray.c if (sc->sc_encrypt == 0x55)
sc 2786 dev/pcmcia/if_ray.c sc->sc_encrypt = 0;
sc 2788 dev/pcmcia/if_ray.c if (SRAM_READ_FIELD_1(sc, ccs, ray_cmd_net, c_upd_param)) {
sc 2789 dev/pcmcia/if_ray.c ray_read_region(sc, RAY_HOST_TO_ECF_BASE, &np, sizeof(np));
sc 2795 dev/pcmcia/if_ray.c sc->sc_cnwid.i_len = i;
sc 2796 dev/pcmcia/if_ray.c memcpy(sc->sc_cnwid.i_nwid, np.p_ssid, sizeof(sc->sc_cnwid));
sc 2797 dev/pcmcia/if_ray.c sc->sc_omode = sc->sc_mode;
sc 2798 dev/pcmcia/if_ray.c if (np.p_net_type != sc->sc_mode)
sc 2802 dev/pcmcia/if_ray.c sc->sc_xname, sc->sc_cnwid.i_nwid, ether_sprintf(sc->sc_bssid),
sc 2803 dev/pcmcia/if_ray.c SRAM_READ_FIELD_1(sc, ccs, ray_cmd_net, c_inited)));
sc 2806 dev/pcmcia/if_ray.c ray_cmd_schedule(sc, SCP_UPD_MCAST|SCP_UPD_PROMISC);
sc 2810 dev/pcmcia/if_ray.c sc->sc_havenet = 1;
sc 2819 dev/pcmcia/if_ray.c ray_update_promisc(struct ray_softc *sc)
sc 2824 dev/pcmcia/if_ray.c ray_cmd_cancel(sc, SCP_UPD_PROMISC);
sc 2827 dev/pcmcia/if_ray.c promisc = !!(sc->sc_if.if_flags & (IFF_PROMISC | IFF_ALLMULTI));
sc 2828 dev/pcmcia/if_ray.c if ((sc->sc_if.if_flags & IFF_RUNNING) == 0)
sc 2830 dev/pcmcia/if_ray.c else if (ray_cmd_is_running(sc, SCP_UPDATESUBCMD)) {
sc 2831 dev/pcmcia/if_ray.c ray_cmd_schedule(sc, SCP_UPD_PROMISC);
sc 2833 dev/pcmcia/if_ray.c } else if (promisc == sc->sc_promisc)
sc 2835 dev/pcmcia/if_ray.c else if (!ray_alloc_ccs(sc,&ccs,RAY_CMD_UPDATE_PARAMS, SCP_UPD_PROMISC))
sc 2837 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_update, c_paramid, RAY_PID_PROMISC);
sc 2838 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_update, c_nparam, 1);
sc 2839 dev/pcmcia/if_ray.c SRAM_WRITE_1(sc, RAY_HOST_TO_ECF_BASE, promisc);
sc 2840 dev/pcmcia/if_ray.c (void)ray_issue_cmd(sc, ccs, SCP_UPD_PROMISC);
sc 2847 dev/pcmcia/if_ray.c ray_update_params(struct ray_softc *sc)
sc 2851 dev/pcmcia/if_ray.c ray_cmd_cancel(sc, SCP_UPD_UPDATEPARAMS);
sc 2852 dev/pcmcia/if_ray.c if (!sc->sc_updreq) {
sc 2858 dev/pcmcia/if_ray.c if ((sc->sc_if.if_flags & IFF_RUNNING) == 0)
sc 2860 dev/pcmcia/if_ray.c else if (ray_cmd_is_running(sc, SCP_UPDATESUBCMD)) {
sc 2861 dev/pcmcia/if_ray.c ray_cmd_schedule(sc, SCP_UPD_UPDATEPARAMS);
sc 2863 dev/pcmcia/if_ray.c } else if (!ray_alloc_ccs(sc, &ccs, RAY_CMD_UPDATE_PARAMS,
sc 2867 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_update, c_paramid,
sc 2868 dev/pcmcia/if_ray.c sc->sc_updreq->r_paramid);
sc 2869 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_update, c_nparam, 1);
sc 2870 dev/pcmcia/if_ray.c ray_write_region(sc, RAY_HOST_TO_ECF_BASE, sc->sc_updreq->r_data,
sc 2871 dev/pcmcia/if_ray.c sc->sc_updreq->r_len);
sc 2873 dev/pcmcia/if_ray.c (void)ray_issue_cmd(sc, ccs, SCP_UPD_UPDATEPARAMS);
sc 2880 dev/pcmcia/if_ray.c ray_update_mcast(struct ray_softc *sc)
sc 2889 dev/pcmcia/if_ray.c ec = &sc->sc_ec;
sc 2890 dev/pcmcia/if_ray.c ray_cmd_cancel(sc, SCP_UPD_MCAST);
sc 2893 dev/pcmcia/if_ray.c if ((count = sc->sc_ec.ec_multicnt) < 17) {
sc 2908 dev/pcmcia/if_ray.c sc->sc_if.if_flags |= IFF_ALLMULTI;
sc 2909 dev/pcmcia/if_ray.c ray_update_promisc(sc);
sc 2911 dev/pcmcia/if_ray.c } else if (sc->sc_if.if_flags & IFF_ALLMULTI) {
sc 2912 dev/pcmcia/if_ray.c sc->sc_if.if_flags &= ~IFF_ALLMULTI;
sc 2913 dev/pcmcia/if_ray.c ray_update_promisc(sc);
sc 2916 dev/pcmcia/if_ray.c if ((sc->sc_if.if_flags & IFF_RUNNING) == 0)
sc 2918 dev/pcmcia/if_ray.c else if (ray_cmd_is_running(sc, SCP_UPDATESUBCMD)) {
sc 2919 dev/pcmcia/if_ray.c ray_cmd_schedule(sc, SCP_UPD_MCAST);
sc 2921 dev/pcmcia/if_ray.c } else if (!ray_alloc_ccs(sc,&ccs, RAY_CMD_UPDATE_MCAST, SCP_UPD_MCAST))
sc 2923 dev/pcmcia/if_ray.c SRAM_WRITE_FIELD_1(sc, ccs, ray_cmd_update_mcast, c_nmcast, count);
sc 2927 dev/pcmcia/if_ray.c ray_write_region(sc, bufp, enm->enm_addrlo, ETHER_ADDR_LEN);
sc 2931 dev/pcmcia/if_ray.c (void)ray_issue_cmd(sc, ccs, SCP_UPD_MCAST);
sc 2944 dev/pcmcia/if_ray.c ray_user_update_params(struct ray_softc *sc, struct ray_param_req *pr)
sc 2948 dev/pcmcia/if_ray.c if ((sc->sc_if.if_flags & IFF_RUNNING) == 0) {
sc 2955 dev/pcmcia/if_ray.c while (ray_cmd_is_running(sc, SCP_UPD_UPDATEPARAMS) ||
sc 2956 dev/pcmcia/if_ray.c ray_cmd_is_scheduled(sc, SCP_UPD_UPDATEPARAMS)) {
sc 2960 dev/pcmcia/if_ray.c if ((sc->sc_if.if_flags & IFF_RUNNING) == 0) {
sc 2967 dev/pcmcia/if_ray.c sc->sc_updreq = pr;
sc 2968 dev/pcmcia/if_ray.c ray_cmd_schedule(sc, SCP_UPD_UPDATEPARAMS);
sc 2969 dev/pcmcia/if_ray.c ray_check_scheduled(sc);
sc 2984 dev/pcmcia/if_ray.c ray_user_report_params(struct ray_softc *sc, struct ray_param_req *pr)
sc 2988 dev/pcmcia/if_ray.c if ((sc->sc_if.if_flags & IFF_RUNNING) == 0) {
sc 2995 dev/pcmcia/if_ray.c while (ray_cmd_is_running(sc, SCP_REPORTPARAMS)
sc 2996 dev/pcmcia/if_ray.c || ray_cmd_is_scheduled(sc, SCP_REPORTPARAMS)) {
sc 3000 dev/pcmcia/if_ray.c if ((sc->sc_if.if_flags & IFF_RUNNING) == 0) {
sc 3007 dev/pcmcia/if_ray.c sc->sc_repreq = pr;
sc 3008 dev/pcmcia/if_ray.c ray_cmd_schedule(sc, SCP_REPORTPARAMS);
sc 3009 dev/pcmcia/if_ray.c ray_check_scheduled(sc);
sc 3026 dev/pcmcia/if_ray.c ray_read_region(struct ray_softc *sc, bus_size_t off, void *vp, size_t c)
sc 3038 dev/pcmcia/if_ray.c bus_space_read_region_4(sc->sc_memt, sc->sc_memh, off,
sc 3047 dev/pcmcia/if_ray.c *p = bus_space_read_1(sc->sc_memt,sc->sc_memh, off);
sc 3050 dev/pcmcia/if_ray.c *p = bus_space_read_1(sc->sc_memt,sc->sc_memh, off);
sc 3053 dev/pcmcia/if_ray.c *p = bus_space_read_1(sc->sc_memt,sc->sc_memh, off);
sc 3058 dev/pcmcia/if_ray.c bus_space_read_region_2(sc->sc_memt, sc->sc_memh, off,
sc 3062 dev/pcmcia/if_ray.c *(p + c) = bus_space_read_1(sc->sc_memt, sc->sc_memh,
sc 3068 dev/pcmcia/if_ray.c bus_space_read_region_1(sc->sc_memt, sc->sc_memh, off, p, c);
sc 3072 dev/pcmcia/if_ray.c bus_space_read_region_1(sc->sc_memt, sc->sc_memh, off, vp, c);
sc 3084 dev/pcmcia/if_ray.c ray_write_region(struct ray_softc *sc, bus_size_t off, void *vp, size_t c)
sc 3095 dev/pcmcia/if_ray.c bus_space_write_region_4(sc->sc_memt, sc->sc_memh, off,
sc 3104 dev/pcmcia/if_ray.c bus_space_write_1(sc->sc_memt,sc->sc_memh, off, *p);
sc 3107 dev/pcmcia/if_ray.c bus_space_write_1(sc->sc_memt,sc->sc_memh, off, *p);
sc 3110 dev/pcmcia/if_ray.c bus_space_write_1(sc->sc_memt,sc->sc_memh, off, *p);
sc 3115 dev/pcmcia/if_ray.c bus_space_write_region_2(sc->sc_memt, sc->sc_memh, off,
sc 3119 dev/pcmcia/if_ray.c bus_space_write_1(sc->sc_memt, sc->sc_memh,
sc 3125 dev/pcmcia/if_ray.c bus_space_write_region_1(sc->sc_memt, sc->sc_memh, off, p, c);
sc 3129 dev/pcmcia/if_ray.c bus_space_write_region_1(sc->sc_memt, sc->sc_memh, off, vp, c);
sc 3217 dev/pcmcia/if_ray.c ray_dump_mbuf(struct ray_softc *sc, struct mbuf *m)
sc 3222 dev/pcmcia/if_ray.c printf("%s: pkt dump:", sc->sc_xname);
sc 3243 dev/pcmcia/if_ray.c ray_update_siglev(struct ray_softc *sc, u_int8_t *src, u_int8_t siglev)
sc 3251 dev/pcmcia/if_ray.c sl = &sc->sc_siglevs[i];
sc 3260 dev/pcmcia/if_ray.c sl = &sc->sc_siglevs[i];
sc 3266 dev/pcmcia/if_ray.c sl = &sc->sc_siglevs[mini];
sc 137 dev/pcmcia/if_rln_pcmcia.c struct rln_softc *sc = &psc->psc_rln;
sc 148 dev/pcmcia/if_rln_pcmcia.c sc->sc_width = 16;
sc 150 dev/pcmcia/if_rln_pcmcia.c sc->sc_width = 8;
sc 152 dev/pcmcia/if_rln_pcmcia.c sc->sc_width = 0;
sc 165 dev/pcmcia/if_rln_pcmcia.c if (sc->sc_width == 0)
sc 178 dev/pcmcia/if_rln_pcmcia.c sc->sc_iot = psc->psc_pcioh.iot;
sc 179 dev/pcmcia/if_rln_pcmcia.c sc->sc_ioh = psc->psc_pcioh.ioh;
sc 182 dev/pcmcia/if_rln_pcmcia.c if (pcmcia_io_map(psc->psc_pf, ((sc->sc_width == 8) ? PCMCIA_WIDTH_IO8 :
sc 183 dev/pcmcia/if_rln_pcmcia.c (sc->sc_width == 16) ? PCMCIA_WIDTH_IO16 : PCMCIA_WIDTH_AUTO),
sc 197 dev/pcmcia/if_rln_pcmcia.c sc->enable = rln_pcmcia_enable;
sc 198 dev/pcmcia/if_rln_pcmcia.c sc->disable = rln_pcmcia_disable;
sc 204 dev/pcmcia/if_rln_pcmcia.c sc->sc_cardtype = 0;
sc 207 dev/pcmcia/if_rln_pcmcia.c sc->sc_cardtype |= RLN_CTYPE_ONE_PIECE;
sc 210 dev/pcmcia/if_rln_pcmcia.c sc->sc_cardtype &= ~RLN_CTYPE_ONE_PIECE;
sc 215 dev/pcmcia/if_rln_pcmcia.c sc->sc_dev.dv_xname, psc->psc_pf->ccr_base);
sc 220 dev/pcmcia/if_rln_pcmcia.c sc->sc_irq = 15;
sc 228 dev/pcmcia/if_rln_pcmcia.c rlnintr_pcmcia, sc, sc->sc_dev.dv_xname);
sc 232 dev/pcmcia/if_rln_pcmcia.c sc->sc_ih = NULL;
sc 239 dev/pcmcia/if_rln_pcmcia.c rln_reset(sc);
sc 240 dev/pcmcia/if_rln_pcmcia.c rlnconfig(sc);
sc 250 dev/pcmcia/if_rln_pcmcia.c struct rln_softc *sc = (struct rln_softc *)dev;
sc 251 dev/pcmcia/if_rln_pcmcia.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 269 dev/pcmcia/if_rln_pcmcia.c struct rln_softc *sc = (struct rln_softc *)dev;
sc 270 dev/pcmcia/if_rln_pcmcia.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 278 dev/pcmcia/if_rln_pcmcia.c rlnintr_pcmcia, psc, sc->sc_dev.dv_xname);
sc 279 dev/pcmcia/if_rln_pcmcia.c rlninit(sc);
sc 285 dev/pcmcia/if_rln_pcmcia.c rlnstop(sc);
sc 299 dev/pcmcia/if_rln_pcmcia.c struct rln_softc *sc = (struct rln_softc *)arg;
sc 300 dev/pcmcia/if_rln_pcmcia.c struct rln_pcmcia_softc *psc = (struct rln_pcmcia_softc *)sc;
sc 309 dev/pcmcia/if_rln_pcmcia.c ret = rlnintr(sc);
sc 152 dev/pcmcia/if_sm_pcmcia.c struct smc91cxx_softc *sc = &psc->sc_smc;
sc 177 dev/pcmcia/if_sm_pcmcia.c sc->sc_bst = psc->sc_pcioh.iot;
sc 178 dev/pcmcia/if_sm_pcmcia.c sc->sc_bsh = psc->sc_pcioh.ioh;
sc 181 dev/pcmcia/if_sm_pcmcia.c sc->sc_enable = sm_pcmcia_enable;
sc 182 dev/pcmcia/if_sm_pcmcia.c sc->sc_disable = sm_pcmcia_disable;
sc 184 dev/pcmcia/if_sm_pcmcia.c sc->sc_enabled = 1;
sc 210 dev/pcmcia/if_sm_pcmcia.c cisstr = pa->pf->sc->card.cis1_info[3];
sc 213 dev/pcmcia/if_sm_pcmcia.c cisstr = pa->pf->sc->card.cis1_info[2];
sc 224 dev/pcmcia/if_sm_pcmcia.c smc91cxx_intr, sc, sc->sc_dev.dv_xname);
sc 230 dev/pcmcia/if_sm_pcmcia.c smc91cxx_attach(sc, enaddr);
sc 260 dev/pcmcia/if_sm_pcmcia.c struct sm_pcmcia_softc *sc = (struct sm_pcmcia_softc *)dev;
sc 261 dev/pcmcia/if_sm_pcmcia.c struct ifnet *ifp = &sc->sc_smc.sc_arpcom.ac_if;
sc 267 dev/pcmcia/if_sm_pcmcia.c pcmcia_function_enable(sc->sc_pf);
sc 268 dev/pcmcia/if_sm_pcmcia.c sc->sc_ih = pcmcia_intr_establish(sc->sc_pf, IPL_NET,
sc 269 dev/pcmcia/if_sm_pcmcia.c smc91cxx_intr, sc, sc->sc_smc.sc_dev.dv_xname);
sc 270 dev/pcmcia/if_sm_pcmcia.c smc91cxx_init(&sc->sc_smc);
sc 276 dev/pcmcia/if_sm_pcmcia.c smc91cxx_stop(&sc->sc_smc);
sc 277 dev/pcmcia/if_sm_pcmcia.c pcmcia_intr_disestablish(sc->sc_pf, sc->sc_ih);
sc 278 dev/pcmcia/if_sm_pcmcia.c pcmcia_function_disable(sc->sc_pf);
sc 364 dev/pcmcia/if_sm_pcmcia.c sm_pcmcia_enable(sc)
sc 365 dev/pcmcia/if_sm_pcmcia.c struct smc91cxx_softc *sc;
sc 367 dev/pcmcia/if_sm_pcmcia.c struct sm_pcmcia_softc *psc = (struct sm_pcmcia_softc *)sc;
sc 371 dev/pcmcia/if_sm_pcmcia.c sc, sc->sc_dev.dv_xname);
sc 374 dev/pcmcia/if_sm_pcmcia.c sc->sc_dev.dv_xname);
sc 382 dev/pcmcia/if_sm_pcmcia.c sm_pcmcia_disable(sc)
sc 383 dev/pcmcia/if_sm_pcmcia.c struct smc91cxx_softc *sc;
sc 385 dev/pcmcia/if_sm_pcmcia.c struct sm_pcmcia_softc *psc = (struct sm_pcmcia_softc *)sc;
sc 377 dev/pcmcia/if_wi_pcmcia.c struct wi_softc *sc = &psc->sc_wi;
sc 410 dev/pcmcia/if_wi_pcmcia.c sc->wi_ltag = sc->wi_btag = psc->sc_pcioh.iot;
sc 411 dev/pcmcia/if_wi_pcmcia.c sc->wi_lhandle = sc->wi_bhandle = psc->sc_pcioh.ioh;
sc 412 dev/pcmcia/if_wi_pcmcia.c sc->wi_cor_offset = WI_COR_OFFSET;
sc 413 dev/pcmcia/if_wi_pcmcia.c sc->wi_flags |= WI_FLAGS_BUS_PCMCIA;
sc 416 dev/pcmcia/if_wi_pcmcia.c CSR_WRITE_2(sc, WI_INT_EN, 0);
sc 417 dev/pcmcia/if_wi_pcmcia.c CSR_WRITE_2(sc, WI_EVENT_ACK, 0xffff);
sc 420 dev/pcmcia/if_wi_pcmcia.c sc->sc_ih = pcmcia_intr_establish(pa->pf, IPL_NET, wi_intr, psc,
sc 421 dev/pcmcia/if_wi_pcmcia.c sc->sc_dev.dv_xname);
sc 422 dev/pcmcia/if_wi_pcmcia.c if (sc->sc_ih == NULL) {
sc 424 dev/pcmcia/if_wi_pcmcia.c sc->sc_dev.dv_xname);
sc 428 dev/pcmcia/if_wi_pcmcia.c intrstr = pcmcia_intr_string(psc->sc_pf, sc->sc_ih);
sc 430 dev/pcmcia/if_wi_pcmcia.c if (wi_attach(sc, &wi_func_io) == 0)
sc 434 dev/pcmcia/if_wi_pcmcia.c pcmcia_intr_disestablish(psc->sc_pf, sc->sc_ih);
sc 435 dev/pcmcia/if_wi_pcmcia.c sc->sc_ih = NULL;
sc 450 dev/pcmcia/if_wi_pcmcia.c struct wi_softc *sc = &psc->sc_wi;
sc 451 dev/pcmcia/if_wi_pcmcia.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 453 dev/pcmcia/if_wi_pcmcia.c if (!(sc->wi_flags & WI_FLAGS_ATTACHED))
sc 456 dev/pcmcia/if_wi_pcmcia.c wi_detach(sc);
sc 458 dev/pcmcia/if_wi_pcmcia.c sc->wi_flags = 0;
sc 473 dev/pcmcia/if_wi_pcmcia.c struct wi_softc *sc = &psc->sc_wi;
sc 474 dev/pcmcia/if_wi_pcmcia.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 481 dev/pcmcia/if_wi_pcmcia.c sc->sc_ih = pcmcia_intr_establish(psc->sc_pf, IPL_NET,
sc 482 dev/pcmcia/if_wi_pcmcia.c wi_intr, sc, sc->sc_dev.dv_xname);
sc 483 dev/pcmcia/if_wi_pcmcia.c wi_cor_reset(sc);
sc 484 dev/pcmcia/if_wi_pcmcia.c wi_init(sc);
sc 490 dev/pcmcia/if_wi_pcmcia.c wi_stop(sc);
sc 491 dev/pcmcia/if_wi_pcmcia.c sc->wi_flags &= ~WI_FLAGS_INITIALIZED;
sc 492 dev/pcmcia/if_wi_pcmcia.c if (sc->sc_ih != NULL)
sc 493 dev/pcmcia/if_wi_pcmcia.c pcmcia_intr_disestablish(psc->sc_pf, sc->sc_ih);
sc 223 dev/pcmcia/if_xe.c struct xe_softc *sc = &psc->sc_xe;
sc 239 dev/pcmcia/if_xe.c sc->sc_flags = xe_pcmcia_interpret_manfid(parent);
sc 241 dev/pcmcia/if_xe.c if (sc->sc_flags & XEF_UNSUPPORTED) {
sc 292 dev/pcmcia/if_xe.c sc->sc_bst = psc->sc_pcioh.iot;
sc 293 dev/pcmcia/if_xe.c sc->sc_bsh = psc->sc_pcioh.ioh;
sc 294 dev/pcmcia/if_xe.c sc->sc_offset = 0;
sc 306 dev/pcmcia/if_xe.c &sc->sc_offset, &psc->sc_mem_window)) {
sc 311 dev/pcmcia/if_xe.c sc->sc_bst = psc->sc_pcmh.memt;
sc 312 dev/pcmcia/if_xe.c sc->sc_bsh = psc->sc_pcmh.memh;
sc 316 dev/pcmcia/if_xe.c sc->sc_flags = xe_pcmcia_interpret_manfid(parent);
sc 323 dev/pcmcia/if_xe.c if (sc->sc_flags & XEF_DINGO) {
sc 359 dev/pcmcia/if_xe.c ifp = &sc->sc_arpcom.ac_if;
sc 361 dev/pcmcia/if_xe.c bcopy(enaddr, sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 367 dev/pcmcia/if_xe.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 368 dev/pcmcia/if_xe.c ifp->if_softc = sc;
sc 377 dev/pcmcia/if_xe.c sc->sc_ih = pcmcia_intr_establish(pa->pf, IPL_NET, xe_intr, sc,
sc 378 dev/pcmcia/if_xe.c sc->sc_dev.dv_xname);
sc 379 dev/pcmcia/if_xe.c if (sc->sc_ih == NULL) {
sc 383 dev/pcmcia/if_xe.c intrstr = pcmcia_intr_string(psc->sc_pf, sc->sc_ih);
sc 385 dev/pcmcia/if_xe.c ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 388 dev/pcmcia/if_xe.c xe_full_reset(sc);
sc 391 dev/pcmcia/if_xe.c sc->sc_mii.mii_ifp = ifp;
sc 392 dev/pcmcia/if_xe.c sc->sc_mii.mii_readreg = xe_mdi_read;
sc 393 dev/pcmcia/if_xe.c sc->sc_mii.mii_writereg = xe_mdi_write;
sc 394 dev/pcmcia/if_xe.c sc->sc_mii.mii_statchg = xe_statchg;
sc 395 dev/pcmcia/if_xe.c ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, xe_mediachange,
sc 398 dev/pcmcia/if_xe.c ("bmsr %x\n", xe_mdi_read(&sc->sc_dev, 0, 1)));
sc 399 dev/pcmcia/if_xe.c mii_attach(self, &sc->sc_mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY,
sc 401 dev/pcmcia/if_xe.c if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL)
sc 402 dev/pcmcia/if_xe.c ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO, 0,
sc 404 dev/pcmcia/if_xe.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO);
sc 418 dev/pcmcia/if_xe.c if (sc->sc_flags & XEF_DINGO) {
sc 419 dev/pcmcia/if_xe.c xe_full_reset(sc);
sc 420 dev/pcmcia/if_xe.c xe_init(sc);
sc 421 dev/pcmcia/if_xe.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_AUTO);
sc 422 dev/pcmcia/if_xe.c ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER | IFM_NONE);
sc 423 dev/pcmcia/if_xe.c xe_stop(sc);
sc 448 dev/pcmcia/if_xe.c struct xe_softc *sc = &psc->sc_xe;
sc 449 dev/pcmcia/if_xe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 452 dev/pcmcia/if_xe.c mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
sc 453 dev/pcmcia/if_xe.c ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
sc 469 dev/pcmcia/if_xe.c struct xe_pcmcia_softc *sc = (struct xe_pcmcia_softc *)dev;
sc 470 dev/pcmcia/if_xe.c struct ifnet *ifp = &sc->sc_xe.sc_arpcom.ac_if;
sc 476 dev/pcmcia/if_xe.c pcmcia_function_enable(sc->sc_pf);
sc 477 dev/pcmcia/if_xe.c sc->sc_xe.sc_ih = pcmcia_intr_establish(sc->sc_pf, IPL_NET,
sc 478 dev/pcmcia/if_xe.c xe_intr, sc, sc->sc_xe.sc_dev.dv_xname);
sc 479 dev/pcmcia/if_xe.c xe_init(&sc->sc_xe);
sc 485 dev/pcmcia/if_xe.c xe_stop(&sc->sc_xe);
sc 486 dev/pcmcia/if_xe.c pcmcia_intr_disestablish(sc->sc_pf, sc->sc_xe.sc_ih);
sc 487 dev/pcmcia/if_xe.c pcmcia_function_disable(sc->sc_pf);
sc 637 dev/pcmcia/if_xe.c struct xe_softc *sc = arg;
sc 638 dev/pcmcia/if_xe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 644 dev/pcmcia/if_xe.c if (sc->sc_flags & XEF_MOHAWK) {
sc 646 dev/pcmcia/if_xe.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR,
sc 651 dev/pcmcia/if_xe.c bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + PR);
sc 653 dev/pcmcia/if_xe.c PAGE(sc, 0);
sc 654 dev/pcmcia/if_xe.c esr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + ESR);
sc 655 dev/pcmcia/if_xe.c isr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + ISR0);
sc 656 dev/pcmcia/if_xe.c rsr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RSR);
sc 660 dev/pcmcia/if_xe.c printf("%s: interrupt for dead card\n", sc->sc_dev.dv_xname);
sc 664 dev/pcmcia/if_xe.c PAGE(sc, 40);
sc 666 dev/pcmcia/if_xe.c bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RXST0);
sc 668 dev/pcmcia/if_xe.c bus_space_read_2(sc->sc_bst, sc->sc_bsh, sc->sc_offset + TXST0);
sc 675 dev/pcmcia/if_xe.c PAGE(sc, 0);
sc 684 dev/pcmcia/if_xe.c sc->sc_dev.dv_xname));
sc 687 dev/pcmcia/if_xe.c bus_space_write_2(sc->sc_bst, sc->sc_bsh,
sc 688 dev/pcmcia/if_xe.c sc->sc_offset + DO0, DO_SKIP_RX_PKT);
sc 690 dev/pcmcia/if_xe.c tempint = xe_get(sc);
sc 693 dev/pcmcia/if_xe.c esr = bus_space_read_1(sc->sc_bst, sc->sc_bsh,
sc 694 dev/pcmcia/if_xe.c sc->sc_offset + ESR);
sc 695 dev/pcmcia/if_xe.c rsr = bus_space_read_1(sc->sc_bst, sc->sc_bsh,
sc 696 dev/pcmcia/if_xe.c sc->sc_offset + RSR);
sc 703 dev/pcmcia/if_xe.c ("%s: packet too long\n", sc->sc_dev.dv_xname));
sc 710 dev/pcmcia/if_xe.c ("%s: CRC error detected\n", sc->sc_dev.dv_xname));
sc 717 dev/pcmcia/if_xe.c ("%s: alignment error detected\n", sc->sc_dev.dv_xname));
sc 722 dev/pcmcia/if_xe.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR,
sc 734 dev/pcmcia/if_xe.c ("%s: excessive collisions\n", sc->sc_dev.dv_xname));
sc 735 dev/pcmcia/if_xe.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR,
sc 745 dev/pcmcia/if_xe.c PAGE(sc, savedpage);
sc 746 dev/pcmcia/if_xe.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR,
sc 753 dev/pcmcia/if_xe.c xe_get(sc)
sc 754 dev/pcmcia/if_xe.c struct xe_softc *sc;
sc 758 dev/pcmcia/if_xe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 762 dev/pcmcia/if_xe.c PAGE(sc, 0);
sc 763 dev/pcmcia/if_xe.c rsr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RSR);
sc 766 dev/pcmcia/if_xe.c bus_space_read_2(sc->sc_bst, sc->sc_bsh, sc->sc_offset + RBC0) &
sc 816 dev/pcmcia/if_xe.c bus_space_read_raw_multi_2(sc->sc_bst, sc->sc_bsh,
sc 817 dev/pcmcia/if_xe.c sc->sc_offset + EDP, data, len);
sc 819 dev/pcmcia/if_xe.c *data = bus_space_read_1(sc->sc_bst, sc->sc_bsh,
sc 820 dev/pcmcia/if_xe.c sc->sc_offset + EDP);
sc 828 dev/pcmcia/if_xe.c bus_space_write_2(sc->sc_bst, sc->sc_bsh, sc->sc_offset + DO0,
sc 853 dev/pcmcia/if_xe.c xe_mdi_idle(sc)
sc 854 dev/pcmcia/if_xe.c struct xe_softc *sc;
sc 856 dev/pcmcia/if_xe.c bus_space_tag_t bst = sc->sc_bst;
sc 857 dev/pcmcia/if_xe.c bus_space_handle_t bsh = sc->sc_bsh;
sc 858 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
sc 872 dev/pcmcia/if_xe.c xe_mdi_pulse(sc, data)
sc 873 dev/pcmcia/if_xe.c struct xe_softc *sc;
sc 876 dev/pcmcia/if_xe.c bus_space_tag_t bst = sc->sc_bst;
sc 877 dev/pcmcia/if_xe.c bus_space_handle_t bsh = sc->sc_bsh;
sc 878 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
sc 891 dev/pcmcia/if_xe.c static INLINE int xe_mdi_probe(struct xe_softc *sc);
sc 893 dev/pcmcia/if_xe.c xe_mdi_probe(sc)
sc 894 dev/pcmcia/if_xe.c struct xe_softc *sc;
sc 896 dev/pcmcia/if_xe.c bus_space_tag_t bst = sc->sc_bst;
sc 897 dev/pcmcia/if_xe.c bus_space_handle_t bsh = sc->sc_bsh;
sc 898 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
sc 916 dev/pcmcia/if_xe.c xe_mdi_pulse_bits(sc, data, len)
sc 917 dev/pcmcia/if_xe.c struct xe_softc *sc;
sc 924 dev/pcmcia/if_xe.c xe_mdi_pulse(sc, data & mask);
sc 934 dev/pcmcia/if_xe.c struct xe_softc *sc = (struct xe_softc *)self;
sc 939 dev/pcmcia/if_xe.c PAGE(sc, 2);
sc 941 dev/pcmcia/if_xe.c xe_mdi_pulse(sc, 1);
sc 942 dev/pcmcia/if_xe.c xe_mdi_pulse_bits(sc, 0x06, 4); /* Start + Read opcode */
sc 943 dev/pcmcia/if_xe.c xe_mdi_pulse_bits(sc, phy, 5); /* PHY address */
sc 944 dev/pcmcia/if_xe.c xe_mdi_pulse_bits(sc, reg, 5); /* PHY register */
sc 945 dev/pcmcia/if_xe.c xe_mdi_idle(sc); /* Turn around. */
sc 946 dev/pcmcia/if_xe.c xe_mdi_probe(sc); /* Drop initial zero bit. */
sc 949 dev/pcmcia/if_xe.c if (xe_mdi_probe(sc))
sc 951 dev/pcmcia/if_xe.c xe_mdi_idle(sc);
sc 966 dev/pcmcia/if_xe.c struct xe_softc *sc = (struct xe_softc *)self;
sc 969 dev/pcmcia/if_xe.c PAGE(sc, 2);
sc 971 dev/pcmcia/if_xe.c xe_mdi_pulse(sc, 1);
sc 972 dev/pcmcia/if_xe.c xe_mdi_pulse_bits(sc, 0x05, 4); /* Start + Write opcode */
sc 973 dev/pcmcia/if_xe.c xe_mdi_pulse_bits(sc, phy, 5); /* PHY address */
sc 974 dev/pcmcia/if_xe.c xe_mdi_pulse_bits(sc, reg, 5); /* PHY register */
sc 975 dev/pcmcia/if_xe.c xe_mdi_pulse_bits(sc, 0x02, 2); /* Turn around. */
sc 976 dev/pcmcia/if_xe.c xe_mdi_pulse_bits(sc, value, 16); /* Write the data */
sc 977 dev/pcmcia/if_xe.c xe_mdi_idle(sc); /* Idle away. */
sc 1010 dev/pcmcia/if_xe.c struct xe_softc *sc = ifp->if_softc;
sc 1012 dev/pcmcia/if_xe.c mii_pollstat(&sc->sc_mii);
sc 1013 dev/pcmcia/if_xe.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 1014 dev/pcmcia/if_xe.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 1018 dev/pcmcia/if_xe.c xe_reset(sc)
sc 1019 dev/pcmcia/if_xe.c struct xe_softc *sc;
sc 1024 dev/pcmcia/if_xe.c xe_stop(sc);
sc 1025 dev/pcmcia/if_xe.c xe_full_reset(sc);
sc 1026 dev/pcmcia/if_xe.c xe_init(sc);
sc 1034 dev/pcmcia/if_xe.c struct xe_softc *sc = ifp->if_softc;
sc 1036 dev/pcmcia/if_xe.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1037 dev/pcmcia/if_xe.c ++sc->sc_arpcom.ac_if.if_oerrors;
sc 1039 dev/pcmcia/if_xe.c xe_reset(sc);
sc 1043 dev/pcmcia/if_xe.c xe_stop(sc)
sc 1044 dev/pcmcia/if_xe.c register struct xe_softc *sc;
sc 1047 dev/pcmcia/if_xe.c PAGE(sc, 0);
sc 1048 dev/pcmcia/if_xe.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + CR, 0);
sc 1050 dev/pcmcia/if_xe.c PAGE(sc, 1);
sc 1051 dev/pcmcia/if_xe.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + IMR0, 0);
sc 1054 dev/pcmcia/if_xe.c PAGE(sc, 4);
sc 1055 dev/pcmcia/if_xe.c bus_space_write_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + GP1, 0);
sc 1059 dev/pcmcia/if_xe.c sc->sc_arpcom.ac_if.if_timer = 0;
sc 1063 dev/pcmcia/if_xe.c xe_init(sc)
sc 1064 dev/pcmcia/if_xe.c struct xe_softc *sc;
sc 1066 dev/pcmcia/if_xe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1073 dev/pcmcia/if_xe.c xe_set_address(sc);
sc 1076 dev/pcmcia/if_xe.c mii_mediachg(&sc->sc_mii);
sc 1091 dev/pcmcia/if_xe.c struct xe_softc *sc = ifp->if_softc;
sc 1092 dev/pcmcia/if_xe.c bus_space_tag_t bst = sc->sc_bst;
sc 1093 dev/pcmcia/if_xe.c bus_space_handle_t bsh = sc->sc_bsh;
sc 1094 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
sc 1118 dev/pcmcia/if_xe.c PAGE(sc, 0);
sc 1123 dev/pcmcia/if_xe.c sc->sc_dev.dv_xname, len + pad + 2, space));
sc 1152 dev/pcmcia/if_xe.c if (sc->sc_flags & XEF_MOHAWK)
sc 1174 dev/pcmcia/if_xe.c struct xe_softc *sc = ifp->if_softc;
sc 1183 dev/pcmcia/if_xe.c xe_init(sc);
sc 1184 dev/pcmcia/if_xe.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 1189 dev/pcmcia/if_xe.c xe_init(sc);
sc 1207 dev/pcmcia/if_xe.c struct xe_softc *sc = ifp->if_softc;
sc 1219 dev/pcmcia/if_xe.c sc->sc_all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0;
sc 1221 dev/pcmcia/if_xe.c PAGE(sc, 0x42);
sc 1224 dev/pcmcia/if_xe.c bus_space_write_1(sc->sc_bst, sc->sc_bsh,
sc 1225 dev/pcmcia/if_xe.c sc->sc_offset + SWC1,
sc 1228 dev/pcmcia/if_xe.c bus_space_write_1(sc->sc_bst, sc->sc_bsh,
sc 1229 dev/pcmcia/if_xe.c sc->sc_offset + SWC1, 0);
sc 1238 dev/pcmcia/if_xe.c xe_init(sc);
sc 1241 dev/pcmcia/if_xe.c xe_stop(sc);
sc 1247 dev/pcmcia/if_xe.c sc->sc_all_mcasts = (ifp->if_flags & IFF_ALLMULTI) ? 1 : 0;
sc 1249 dev/pcmcia/if_xe.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 1250 dev/pcmcia/if_xe.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 1257 dev/pcmcia/if_xe.c if (!sc->sc_all_mcasts &&
sc 1259 dev/pcmcia/if_xe.c xe_set_address(sc);
sc 1265 dev/pcmcia/if_xe.c if (sc->sc_all_mcasts)
sc 1266 dev/pcmcia/if_xe.c xe_init(sc);
sc 1274 dev/pcmcia/if_xe.c ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, command);
sc 1285 dev/pcmcia/if_xe.c xe_set_address(sc)
sc 1286 dev/pcmcia/if_xe.c struct xe_softc *sc;
sc 1288 dev/pcmcia/if_xe.c bus_space_tag_t bst = sc->sc_bst;
sc 1289 dev/pcmcia/if_xe.c bus_space_handle_t bsh = sc->sc_bsh;
sc 1290 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
sc 1291 dev/pcmcia/if_xe.c struct arpcom *arp = &sc->sc_arpcom;
sc 1294 dev/pcmcia/if_xe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1297 dev/pcmcia/if_xe.c PAGE(sc, 0x50);
sc 1300 dev/pcmcia/if_xe.c sc->sc_arpcom.ac_enaddr[(sc->sc_flags & XEF_MOHAWK) ?
sc 1306 dev/pcmcia/if_xe.c PAGE(sc, 0x42);
sc 1307 dev/pcmcia/if_xe.c bus_space_write_1(sc->sc_bst, sc->sc_bsh,
sc 1308 dev/pcmcia/if_xe.c sc->sc_offset + SWC1,
sc 1326 dev/pcmcia/if_xe.c sc->sc_all_mcasts=1;
sc 1333 dev/pcmcia/if_xe.c (sc->sc_flags & XEF_MOHAWK) ? 5 - i : i]);
sc 1338 dev/pcmcia/if_xe.c PAGE(sc, page);
sc 1346 dev/pcmcia/if_xe.c xe_cycle_power(sc)
sc 1347 dev/pcmcia/if_xe.c struct xe_softc *sc;
sc 1349 dev/pcmcia/if_xe.c bus_space_tag_t bst = sc->sc_bst;
sc 1350 dev/pcmcia/if_xe.c bus_space_handle_t bsh = sc->sc_bsh;
sc 1351 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
sc 1353 dev/pcmcia/if_xe.c PAGE(sc, 4);
sc 1357 dev/pcmcia/if_xe.c if (sc->sc_flags & XEF_MOHAWK)
sc 1366 dev/pcmcia/if_xe.c xe_full_reset(sc)
sc 1367 dev/pcmcia/if_xe.c struct xe_softc *sc;
sc 1369 dev/pcmcia/if_xe.c bus_space_tag_t bst = sc->sc_bst;
sc 1370 dev/pcmcia/if_xe.c bus_space_handle_t bsh = sc->sc_bsh;
sc 1371 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
sc 1374 dev/pcmcia/if_xe.c xe_cycle_power(sc);
sc 1379 dev/pcmcia/if_xe.c if (sc->sc_flags & XEF_MOHAWK) {
sc 1380 dev/pcmcia/if_xe.c PAGE(sc, 4);
sc 1391 dev/pcmcia/if_xe.c sc->sc_rev = bus_space_read_1(bst, bsh, offset + BV) &
sc 1392 dev/pcmcia/if_xe.c ((sc->sc_flags & XEF_MOHAWK) ? 0x70 : 0x30) >> 4;
sc 1395 dev/pcmcia/if_xe.c if (!(sc->sc_flags & XEF_MOHAWK)) {
sc 1396 dev/pcmcia/if_xe.c PAGE(sc, 4);
sc 1406 dev/pcmcia/if_xe.c PAGE(sc, 1);
sc 1413 dev/pcmcia/if_xe.c if (!(sc->sc_flags & XEF_DINGO))
sc 1421 dev/pcmcia/if_xe.c if (!(sc->sc_flags & XEF_DINGO)) {
sc 1422 dev/pcmcia/if_xe.c PAGE(sc, 0x42);
sc 1427 dev/pcmcia/if_xe.c if (sc->sc_rev != 1) {
sc 1428 dev/pcmcia/if_xe.c PAGE(sc, 2);
sc 1433 dev/pcmcia/if_xe.c xe_set_address(sc);
sc 1439 dev/pcmcia/if_xe.c PAGE(sc, 0);
sc 1443 dev/pcmcia/if_xe.c PAGE(sc, 0x40);
sc 1449 dev/pcmcia/if_xe.c if (!(sc->sc_flags & XEF_DINGO))
sc 1457 dev/pcmcia/if_xe.c if (LIST_FIRST(&sc->sc_mii.mii_phys)) {
sc 1458 dev/pcmcia/if_xe.c PAGE(sc, 2);
sc 1463 dev/pcmcia/if_xe.c PAGE(sc, 0);
sc 1466 dev/pcmcia/if_xe.c PAGE(sc, 0x42);
sc 1474 dev/pcmcia/if_xe.c PAGE(sc, 2);
sc 1479 dev/pcmcia/if_xe.c if (sc->sc_flags & XEF_DINGO)
sc 1484 dev/pcmcia/if_xe.c PAGE(sc, 0x40);
sc 1489 dev/pcmcia/if_xe.c PAGE(sc, 1);
sc 1491 dev/pcmcia/if_xe.c if (!(sc->sc_flags & XEF_DINGO))
sc 1497 dev/pcmcia/if_xe.c PAGE(sc, 0);
sc 1501 dev/pcmcia/if_xe.c if ((sc->sc_flags & (XEF_DINGO | XEF_MODEM)) == XEF_MODEM) {
sc 1513 dev/pcmcia/if_xe.c PAGE(sc, 0);
sc 1518 dev/pcmcia/if_xe.c xe_reg_dump(sc)
sc 1519 dev/pcmcia/if_xe.c struct xe_softc *sc;
sc 1522 dev/pcmcia/if_xe.c bus_space_tag_t bst = sc->sc_bst;
sc 1523 dev/pcmcia/if_xe.c bus_space_handle_t bsh = sc->sc_bsh;
sc 1524 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
sc 1526 dev/pcmcia/if_xe.c printf("%x: Common registers: ", sc->sc_dev.dv_xname);
sc 1533 dev/pcmcia/if_xe.c printf("%s: Register page %2.2x: ", sc->sc_dev.dv_xname, page);
sc 1534 dev/pcmcia/if_xe.c PAGE(sc, page);
sc 1546 dev/pcmcia/if_xe.c printf("%s: Register page %2.2x: ", sc->sc_dev.dv_xname, page);
sc 1547 dev/pcmcia/if_xe.c PAGE(sc, page);
sc 279 dev/pcmcia/if_xereg.h #define PAGE(sc, page) \
sc 280 dev/pcmcia/if_xereg.h bus_space_write_1((sc->sc_bst), (sc->sc_bsh), (sc->sc_offset) + PR, (page))
sc 121 dev/pcmcia/pcmcia.c struct pcmcia_softc *sc = (struct pcmcia_softc *) self;
sc 125 dev/pcmcia/pcmcia.c sc->pct = paa->pct;
sc 126 dev/pcmcia/pcmcia.c sc->pch = paa->pch;
sc 127 dev/pcmcia/pcmcia.c sc->iobase = paa->iobase;
sc 128 dev/pcmcia/pcmcia.c sc->iosize = paa->iosize;
sc 130 dev/pcmcia/pcmcia.c sc->ih = NULL;
sc 131 dev/pcmcia/pcmcia.c powerhook_establish(pcmcia_power, sc);
sc 139 dev/pcmcia/pcmcia.c struct pcmcia_softc *sc = (struct pcmcia_softc *) arg;
sc 147 dev/pcmcia/pcmcia.c for (pf = SIMPLEQ_FIRST(&sc->card.pf_head); pf != NULL;
sc 165 dev/pcmcia/pcmcia.c struct pcmcia_softc *sc = (struct pcmcia_softc *) dev;
sc 173 dev/pcmcia/pcmcia.c SIMPLEQ_FIRST(&sc->card.pf_head) = NULL;
sc 175 dev/pcmcia/pcmcia.c pcmcia_chip_socket_enable(sc->pct, sc->pch);
sc 177 dev/pcmcia/pcmcia.c pcmcia_read_cis(sc);
sc 179 dev/pcmcia/pcmcia.c pcmcia_chip_socket_disable(sc->pct, sc->pch);
sc 181 dev/pcmcia/pcmcia.c pcmcia_check_cis_quirks(sc);
sc 187 dev/pcmcia/pcmcia.c if (sc->card.error)
sc 191 dev/pcmcia/pcmcia.c if (SIMPLEQ_EMPTY(&sc->card.pf_head))
sc 196 dev/pcmcia/pcmcia.c pcmcia_print_cis(sc);
sc 202 dev/pcmcia/pcmcia.c if (SIMPLEQ_FIRST(&sc->card.pf_head) == NULL) {
sc 211 dev/pcmcia/pcmcia.c SIMPLEQ_INSERT_TAIL(&sc->card.pf_head, pf, pf_list);
sc 216 dev/pcmcia/pcmcia.c for (pf = SIMPLEQ_FIRST(&sc->card.pf_head); pf != NULL;
sc 218 dev/pcmcia/pcmcia.c pf->sc = sc;
sc 225 dev/pcmcia/pcmcia.c for (pf = SIMPLEQ_FIRST(&sc->card.pf_head); pf != NULL;
sc 227 dev/pcmcia/pcmcia.c paa.manufacturer = sc->card.manufacturer;
sc 228 dev/pcmcia/pcmcia.c paa.product = sc->card.product;
sc 229 dev/pcmcia/pcmcia.c paa.card = &sc->card;
sc 232 dev/pcmcia/pcmcia.c pf->child = config_found_sm(&sc->dev, &paa, pcmcia_print,
sc 240 dev/pcmcia/pcmcia.c sc->dev.dv_xname, pf->number,
sc 261 dev/pcmcia/pcmcia.c struct pcmcia_softc *sc = (struct pcmcia_softc *) dev;
sc 269 dev/pcmcia/pcmcia.c for (pf = SIMPLEQ_FIRST(&sc->card.pf_head); pf != NULL;
sc 276 dev/pcmcia/pcmcia.c sc->dev.dv_xname, pf->child->dv_xname, pf->number));
sc 279 dev/pcmcia/pcmcia.c sc->dev.dv_xname, error, pf->child->dv_xname,
sc 290 dev/pcmcia/pcmcia.c struct pcmcia_softc *sc = (struct pcmcia_softc *) dev;
sc 298 dev/pcmcia/pcmcia.c for (pf = SIMPLEQ_FIRST(&sc->card.pf_head); pf != NULL;
sc 305 dev/pcmcia/pcmcia.c sc->dev.dv_xname, pf->child->dv_xname, pf->number));
sc 332 dev/pcmcia/pcmcia.c struct pcmcia_softc *sc = pa->pf->sc;
sc 333 dev/pcmcia/pcmcia.c struct pcmcia_card *card = &sc->card;
sc 377 dev/pcmcia/pcmcia.c struct pcmcia_softc *sc = (struct pcmcia_softc *)dev;
sc 385 dev/pcmcia/pcmcia.c pf = SIMPLEQ_FIRST(&sc->card.pf_head);
sc 439 dev/pcmcia/pcmcia.c if (pf->sc->sc_enabled_count++ == 0)
sc 440 dev/pcmcia/pcmcia.c pcmcia_chip_socket_enable(pf->sc->pct, pf->sc->pch);
sc 441 dev/pcmcia/pcmcia.c DPRINTF(("%s: ++enabled_count = %d\n", pf->sc->dev.dv_xname,
sc 442 dev/pcmcia/pcmcia.c pf->sc->sc_enabled_count));
sc 460 dev/pcmcia/pcmcia.c SIMPLEQ_FOREACH(tmp, &pf->sc->card.pf_head, pf_list) {
sc 496 dev/pcmcia/pcmcia.c if (pcmcia_mfc(pf->sc)) {
sc 517 dev/pcmcia/pcmcia.c if (pcmcia_mfc(pf->sc)) {
sc 531 dev/pcmcia/pcmcia.c SIMPLEQ_FOREACH(tmp, &pf->sc->card.pf_head, pf_list) {
sc 534 dev/pcmcia/pcmcia.c tmp->sc->dev.dv_xname, tmp->number,
sc 560 dev/pcmcia/pcmcia.c if (--pf->sc->sc_enabled_count == 0)
sc 561 dev/pcmcia/pcmcia.c pcmcia_chip_socket_disable(pf->sc->pct, pf->sc->pch);
sc 562 dev/pcmcia/pcmcia.c DPRINTF(("%s: --enabled_count = %d\n", pf->sc->dev.dv_xname,
sc 563 dev/pcmcia/pcmcia.c pf->sc->sc_enabled_count));
sc 597 dev/pcmcia/pcmcia.c SIMPLEQ_FOREACH(tmp, &pf->sc->card.pf_head, pf_list) {
sc 616 dev/pcmcia/pcmcia.c if (--pf->sc->sc_enabled_count == 0)
sc 617 dev/pcmcia/pcmcia.c pcmcia_chip_socket_disable(pf->sc->pct, pf->sc->pch);
sc 618 dev/pcmcia/pcmcia.c DPRINTF(("%s: --enabled_count = %d\n", pf->sc->dev.dv_xname,
sc 619 dev/pcmcia/pcmcia.c pf->sc->sc_enabled_count));
sc 633 dev/pcmcia/pcmcia.c if (pcmcia_chip_io_map(pf->sc->pct, pf->sc->pch,
sc 643 dev/pcmcia/pcmcia.c if (pcmcia_mfc(pf->sc) &&
sc 689 dev/pcmcia/pcmcia.c if (pcmcia_mfc(pf->sc)) {
sc 695 dev/pcmcia/pcmcia.c SIMPLEQ_FOREACH(pf2, &pf->sc->card.pf_head, pf_list) {
sc 698 dev/pcmcia/pcmcia.c pf->sc->dev.dv_xname, pf2->number,
sc 716 dev/pcmcia/pcmcia.c if (pf->sc->ih != NULL)
sc 727 dev/pcmcia/pcmcia.c pf->sc->ih = pcmcia_chip_intr_establish(pf->sc->pct,
sc 728 dev/pcmcia/pcmcia.c pf->sc->pch, pf, ipl, pcmcia_card_intr, pf->sc,
sc 733 dev/pcmcia/pcmcia.c if (pf->sc->ih == NULL)
sc 740 dev/pcmcia/pcmcia.c pcmcia_chip_intr_disestablish(pf->sc->pct, pf->sc->pch,
sc 741 dev/pcmcia/pcmcia.c pf->sc->ih);
sc 748 dev/pcmcia/pcmcia.c pf->sc->ih = pcmcia_chip_intr_establish(pf->sc->pct,
sc 749 dev/pcmcia/pcmcia.c pf->sc->pch, pf, ipl, pcmcia_card_intr, pf->sc,
sc 764 dev/pcmcia/pcmcia.c ret = pf->sc->ih;
sc 776 dev/pcmcia/pcmcia.c ret = pcmcia_chip_intr_establish(pf->sc->pct, pf->sc->pch,
sc 791 dev/pcmcia/pcmcia.c if (pcmcia_mfc(pf->sc)) {
sc 798 dev/pcmcia/pcmcia.c SIMPLEQ_FOREACH(pf2, &pf->sc->card.pf_head, pf_list) {
sc 822 dev/pcmcia/pcmcia.c if (pf->sc->ih == NULL)
sc 825 dev/pcmcia/pcmcia.c pcmcia_chip_intr_disestablish(pf->sc->pct, pf->sc->pch,
sc 826 dev/pcmcia/pcmcia.c pf->sc->ih);
sc 835 dev/pcmcia/pcmcia.c pf->sc->ih = NULL;
sc 838 dev/pcmcia/pcmcia.c if (pf->sc->ih == NULL)
sc 843 dev/pcmcia/pcmcia.c pcmcia_chip_intr_disestablish(pf->sc->pct, pf->sc->pch,
sc 844 dev/pcmcia/pcmcia.c pf->sc->ih);
sc 845 dev/pcmcia/pcmcia.c pf->sc->ih = pcmcia_chip_intr_establish(pf->sc->pct,
sc 846 dev/pcmcia/pcmcia.c pf->sc->pch, pf, hiipl, pcmcia_card_intr, pf->sc,
sc 863 dev/pcmcia/pcmcia.c pcmcia_chip_intr_disestablish(pf->sc->pct, pf->sc->pch, ih);
sc 871 dev/pcmcia/pcmcia.c return pcmcia_chip_intr_string(pf->sc->pct, pf->sc->pch, ih);
sc 878 dev/pcmcia/pcmcia.c struct pcmcia_softc *sc = arg;
sc 884 dev/pcmcia/pcmcia.c for (pf = SIMPLEQ_FIRST(&sc->card.pf_head); pf != NULL;
sc 888 dev/pcmcia/pcmcia.c sc->dev.dv_xname, pf->pf_flags, pf->number,
sc 63 dev/pcmcia/pcmcia_cis.c pcmcia_read_cis(sc)
sc 64 dev/pcmcia/pcmcia_cis.c struct pcmcia_softc *sc;
sc 70 dev/pcmcia/pcmcia_cis.c state.card = &sc->card;
sc 85 dev/pcmcia/pcmcia_cis.c if (pcmcia_scan_cis((struct device *)sc, pcmcia_parse_cis_tuple,
sc 96 dev/pcmcia/pcmcia_cis.c struct pcmcia_softc *sc = (struct pcmcia_softc *) dev;
sc 115 dev/pcmcia/pcmcia_cis.c pct = sc->pct;
sc 116 dev/pcmcia/pcmcia_cis.c pch = sc->pch;
sc 123 dev/pcmcia/pcmcia_cis.c sc->dev.dv_xname);
sc 134 dev/pcmcia/pcmcia_cis.c sc->dev.dv_xname);
sc 152 dev/pcmcia/pcmcia_cis.c DPRINTF(("%s: CIS tuple chain:\n", sc->dev.dv_xname));
sc 263 dev/pcmcia/pcmcia_cis.c sc->dev.dv_xname);
sc 484 dev/pcmcia/pcmcia_cis.c pcmcia_print_cis(sc)
sc 485 dev/pcmcia/pcmcia_cis.c struct pcmcia_softc *sc;
sc 487 dev/pcmcia/pcmcia_cis.c struct pcmcia_card *card = &sc->card;
sc 492 dev/pcmcia/pcmcia_cis.c printf("%s: CIS version ", sc->dev.dv_xname);
sc 505 dev/pcmcia/pcmcia_cis.c printf("%s: CIS info: ", sc->dev.dv_xname);
sc 516 dev/pcmcia/pcmcia_cis.c sc->dev.dv_xname, card->manufacturer, card->product);
sc 519 dev/pcmcia/pcmcia_cis.c printf("%s: function %d: ", sc->dev.dv_xname, pf->number);
sc 570 dev/pcmcia/pcmcia_cis.c sc->dev.dv_xname, pf->number, cfe->number);
sc 645 dev/pcmcia/pcmcia_cis.c sc->dev.dv_xname, card->error);
sc 211 dev/pcmcia/pcmcia_cis_quirks.c void pcmcia_check_cis_quirks(sc)
sc 212 dev/pcmcia/pcmcia_cis_quirks.c struct pcmcia_softc *sc;
sc 225 dev/pcmcia/pcmcia_cis_quirks.c if ((sc->card.manufacturer == pcmcia_cis_quirks[i].manufacturer) &&
sc 226 dev/pcmcia/pcmcia_cis_quirks.c (sc->card.product == pcmcia_cis_quirks[i].product) &&
sc 227 dev/pcmcia/pcmcia_cis_quirks.c (((sc->card.manufacturer != PCMCIA_VENDOR_INVALID) &&
sc 228 dev/pcmcia/pcmcia_cis_quirks.c (sc->card.product != PCMCIA_PRODUCT_INVALID)) ||
sc 229 dev/pcmcia/pcmcia_cis_quirks.c ((sc->card.manufacturer == PCMCIA_VENDOR_INVALID) &&
sc 230 dev/pcmcia/pcmcia_cis_quirks.c (sc->card.product == PCMCIA_PRODUCT_INVALID) &&
sc 231 dev/pcmcia/pcmcia_cis_quirks.c sc->card.cis1_info[0] &&
sc 232 dev/pcmcia/pcmcia_cis_quirks.c (strcmp(sc->card.cis1_info[0],
sc 234 dev/pcmcia/pcmcia_cis_quirks.c sc->card.cis1_info[1] &&
sc 235 dev/pcmcia/pcmcia_cis_quirks.c (strcmp(sc->card.cis1_info[1],
sc 239 dev/pcmcia/pcmcia_cis_quirks.c printf("%s: using CIS quirks for ", sc->dev.dv_xname);
sc 241 dev/pcmcia/pcmcia_cis_quirks.c if (sc->card.cis1_info[j] == NULL)
sc 245 dev/pcmcia/pcmcia_cis_quirks.c printf("%s", sc->card.cis1_info[j]);
sc 250 dev/pcmcia/pcmcia_cis_quirks.c for (pf = SIMPLEQ_FIRST(&sc->card.pf_head); pf != NULL;
sc 261 dev/pcmcia/pcmcia_cis_quirks.c SIMPLEQ_INIT(&sc->card.pf_head);
sc 285 dev/pcmcia/pcmcia_cis_quirks.c SIMPLEQ_INSERT_TAIL(&sc->card.pf_head, pf, pf_list);
sc 119 dev/pcmcia/pcmciavar.h struct pcmcia_softc *sc;
sc 241 dev/pcmcia/pcmciavar.h #define pcmcia_mfc(sc) (SIMPLEQ_FIRST(&(sc)->card.pf_head) && \
sc 242 dev/pcmcia/pcmciavar.h SIMPLEQ_NEXT(SIMPLEQ_FIRST(&(sc)->card.pf_head), pf_list))
sc 250 dev/pcmcia/pcmciavar.h (pcmcia_chip_io_alloc((pf)->sc->pct, pf->sc->pch, (start), \
sc 257 dev/pcmcia/pcmciavar.h (pcmcia_chip_io_unmap((pf)->sc->pct, (pf)->sc->pch, (window)))
sc 260 dev/pcmcia/pcmciavar.h (pcmcia_chip_io_free((pf)->sc->pct, (pf)->sc->pch, (pciop)))
sc 263 dev/pcmcia/pcmciavar.h (pcmcia_chip_mem_alloc((pf)->sc->pct, (pf)->sc->pch, (size), (pcmhp)))
sc 266 dev/pcmcia/pcmciavar.h (pcmcia_chip_mem_free((pf)->sc->pct, (pf)->sc->pch, (pcmhp)))
sc 269 dev/pcmcia/pcmciavar.h (pcmcia_chip_mem_map((pf)->sc->pct, (pf)->sc->pch, (kind), \
sc 273 dev/pcmcia/pcmciavar.h (pcmcia_chip_mem_unmap((pf)->sc->pct, (pf)->sc->pch, (window)))
sc 189 dev/pcmcia/wdc_pcmcia.c if (pcmcia_scan_cis((struct device *)pf->sc,
sc 231 dev/pcmcia/wdc_pcmcia.c struct pcmcia_softc *sc;
sc 238 dev/pcmcia/wdc_pcmcia.c sc = pa->pf->sc;
sc 240 dev/pcmcia/wdc_pcmcia.c pcmcia_chip_socket_enable(sc->pct, sc->pch);
sc 242 dev/pcmcia/wdc_pcmcia.c pcmcia_chip_socket_disable(sc->pct, sc->pch);
sc 257 dev/pcmcia/wdc_pcmcia.c struct wdc_pcmcia_softc *sc = (void *)self;
sc 264 dev/pcmcia/wdc_pcmcia.c sc->sc_pf = pa->pf;
sc 274 dev/pcmcia/wdc_pcmcia.c &sc->sc_pioh))
sc 279 dev/pcmcia/wdc_pcmcia.c cfe->iospace[1].length, 0, &sc->sc_auxpioh))
sc 282 dev/pcmcia/wdc_pcmcia.c sc->sc_auxpioh.iot = sc->sc_pioh.iot;
sc 283 dev/pcmcia/wdc_pcmcia.c if (!bus_space_subregion(sc->sc_pioh.iot,
sc 284 dev/pcmcia/wdc_pcmcia.c sc->sc_pioh.ioh, WDC_PCMCIA_AUXREG_OFFSET,
sc 285 dev/pcmcia/wdc_pcmcia.c WDC_PCMCIA_AUXREG_NPORTS, &sc->sc_auxpioh.ioh))
sc 288 dev/pcmcia/wdc_pcmcia.c pcmcia_io_free(pa->pf, &sc->sc_pioh);
sc 318 dev/pcmcia/wdc_pcmcia.c sc->sc_pioh.size, &sc->sc_pioh, &sc->sc_iowindow)) {
sc 329 dev/pcmcia/wdc_pcmcia.c sc->sc_auxiowindow = -1;
sc 331 dev/pcmcia/wdc_pcmcia.c sc->sc_auxpioh.size, &sc->sc_auxpioh, &sc->sc_auxiowindow)) {
sc 337 dev/pcmcia/wdc_pcmcia.c sc->sc_pioh.addr, (u_long)sc->sc_pioh.size);
sc 338 dev/pcmcia/wdc_pcmcia.c if (cfe->num_iospace > 1 && sc->sc_auxpioh.size > 0)
sc 340 dev/pcmcia/wdc_pcmcia.c sc->sc_auxpioh.addr, (u_long)sc->sc_auxpioh.size);
sc 342 dev/pcmcia/wdc_pcmcia.c sc->wdc_channel.cmd_iot = sc->sc_pioh.iot;
sc 343 dev/pcmcia/wdc_pcmcia.c sc->wdc_channel.cmd_ioh = sc->sc_pioh.ioh;
sc 344 dev/pcmcia/wdc_pcmcia.c sc->wdc_channel.ctl_iot = sc->sc_auxpioh.iot;
sc 345 dev/pcmcia/wdc_pcmcia.c sc->wdc_channel.ctl_ioh = sc->sc_auxpioh.ioh;
sc 346 dev/pcmcia/wdc_pcmcia.c sc->wdc_channel.data32iot = sc->wdc_channel.cmd_iot;
sc 347 dev/pcmcia/wdc_pcmcia.c sc->wdc_channel.data32ioh = sc->wdc_channel.cmd_ioh;
sc 348 dev/pcmcia/wdc_pcmcia.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32;
sc 349 dev/pcmcia/wdc_pcmcia.c sc->sc_wdcdev.PIO_cap = 0;
sc 350 dev/pcmcia/wdc_pcmcia.c sc->wdc_chanptr = &sc->wdc_channel;
sc 351 dev/pcmcia/wdc_pcmcia.c sc->sc_wdcdev.channels = &sc->wdc_chanptr;
sc 352 dev/pcmcia/wdc_pcmcia.c sc->sc_wdcdev.nchannels = 1;
sc 353 dev/pcmcia/wdc_pcmcia.c sc->wdc_channel.channel = 0;
sc 354 dev/pcmcia/wdc_pcmcia.c sc->wdc_channel.wdc = &sc->sc_wdcdev;
sc 355 dev/pcmcia/wdc_pcmcia.c sc->wdc_channel.ch_queue = malloc(sizeof(struct channel_queue),
sc 357 dev/pcmcia/wdc_pcmcia.c if (sc->wdc_channel.ch_queue == NULL) {
sc 362 dev/pcmcia/wdc_pcmcia.c sc->sc_wdcdev.cap |= WDC_CAPABILITY_NO_EXTRA_RESETS;
sc 366 dev/pcmcia/wdc_pcmcia.c sc->sc_wdcdev.sc_atapi_adapter.scsipi_enable = wdc_pcmcia_enable;
sc 375 dev/pcmcia/wdc_pcmcia.c sc->sc_ih = pcmcia_intr_establish(sc->sc_pf, IPL_BIO, wdcintr,
sc 376 dev/pcmcia/wdc_pcmcia.c &sc->wdc_channel, sc->sc_wdcdev.sc_dev.dv_xname);
sc 377 dev/pcmcia/wdc_pcmcia.c intrstr = pcmcia_intr_string(sc->sc_pf, sc->sc_ih);
sc 384 dev/pcmcia/wdc_pcmcia.c sc->sc_flags |= WDC_PCMCIA_ATTACH;
sc 385 dev/pcmcia/wdc_pcmcia.c wdcattach(&sc->wdc_channel);
sc 386 dev/pcmcia/wdc_pcmcia.c wdc_print_current_modes(&sc->wdc_channel);
sc 387 dev/pcmcia/wdc_pcmcia.c sc->sc_flags &= ~WDC_PCMCIA_ATTACH;
sc 392 dev/pcmcia/wdc_pcmcia.c if (sc->sc_auxiowindow != -1)
sc 393 dev/pcmcia/wdc_pcmcia.c pcmcia_io_unmap(sc->sc_pf, sc->sc_auxiowindow);
sc 397 dev/pcmcia/wdc_pcmcia.c pcmcia_io_unmap(sc->sc_pf, sc->sc_iowindow);
sc 401 dev/pcmcia/wdc_pcmcia.c pcmcia_function_disable(sc->sc_pf);
sc 405 dev/pcmcia/wdc_pcmcia.c pcmcia_io_free(sc->sc_pf, &sc->sc_pioh);
sc 407 dev/pcmcia/wdc_pcmcia.c pcmcia_io_free(sc->sc_pf, &sc->sc_auxpioh);
sc 410 dev/pcmcia/wdc_pcmcia.c sc->sc_iowindow = -1;
sc 418 dev/pcmcia/wdc_pcmcia.c struct wdc_pcmcia_softc *sc = (struct wdc_pcmcia_softc *)self;
sc 421 dev/pcmcia/wdc_pcmcia.c if (sc->sc_iowindow == -1)
sc 425 dev/pcmcia/wdc_pcmcia.c if ((error = wdcdetach(&sc->wdc_channel, flags)) != 0)
sc 428 dev/pcmcia/wdc_pcmcia.c if (sc->wdc_channel.ch_queue != NULL)
sc 429 dev/pcmcia/wdc_pcmcia.c free(sc->wdc_channel.ch_queue, M_DEVBUF);
sc 432 dev/pcmcia/wdc_pcmcia.c pcmcia_io_unmap(sc->sc_pf, sc->sc_iowindow);
sc 433 dev/pcmcia/wdc_pcmcia.c pcmcia_io_free(sc->sc_pf, &sc->sc_pioh);
sc 434 dev/pcmcia/wdc_pcmcia.c if (sc->sc_auxiowindow != -1) {
sc 435 dev/pcmcia/wdc_pcmcia.c pcmcia_io_unmap(sc->sc_pf, sc->sc_auxiowindow);
sc 436 dev/pcmcia/wdc_pcmcia.c pcmcia_io_free(sc->sc_pf, &sc->sc_auxpioh);
sc 447 dev/pcmcia/wdc_pcmcia.c struct wdc_pcmcia_softc *sc = (struct wdc_pcmcia_softc *)self;
sc 453 dev/pcmcia/wdc_pcmcia.c if (pcmcia_function_enable(sc->sc_pf)) {
sc 455 dev/pcmcia/wdc_pcmcia.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 460 dev/pcmcia/wdc_pcmcia.c sc->sc_ih = pcmcia_intr_establish(sc->sc_pf, IPL_BIO,
sc 461 dev/pcmcia/wdc_pcmcia.c wdcintr, &sc->wdc_channel, sc->sc_wdcdev.sc_dev.dv_xname);
sc 462 dev/pcmcia/wdc_pcmcia.c if (sc->sc_ih == NULL) {
sc 465 dev/pcmcia/wdc_pcmcia.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 466 dev/pcmcia/wdc_pcmcia.c pcmcia_function_disable(sc->sc_pf);
sc 471 dev/pcmcia/wdc_pcmcia.c wdcreset(&sc->wdc_channel, VERBOSE);
sc 476 dev/pcmcia/wdc_pcmcia.c pcmcia_intr_disestablish(sc->sc_pf, sc->sc_ih);
sc 477 dev/pcmcia/wdc_pcmcia.c pcmcia_function_disable(sc->sc_pf);
sc 491 dev/pcmcia/wdc_pcmcia.c struct wdc_pcmcia_softc *sc = arg;
sc 494 dev/pcmcia/wdc_pcmcia.c if ((sc->sc_flags & WDC_PCMCIA_ATTACH) == 0) {
sc 495 dev/pcmcia/wdc_pcmcia.c if (pcmcia_function_enable(sc->sc_pf)) {
sc 497 dev/pcmcia/wdc_pcmcia.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 501 dev/pcmcia/wdc_pcmcia.c sc->sc_ih = pcmcia_intr_establish(sc->sc_pf, IPL_BIO,
sc 502 dev/pcmcia/wdc_pcmcia.c wdcintr, &sc->wdc_channel, sc->sc_dev.dv_xname);
sc 503 dev/pcmcia/wdc_pcmcia.c if (sc->sc_ih == NULL) {
sc 506 dev/pcmcia/wdc_pcmcia.c sc->sc_wdcdev.sc_dev.dv_xname);
sc 507 dev/pcmcia/wdc_pcmcia.c pcmcia_function_disable(sc->sc_pf);
sc 511 dev/pcmcia/wdc_pcmcia.c wdcreset(&sc->wdc_channel, VERBOSE);
sc 514 dev/pcmcia/wdc_pcmcia.c if ((sc->sc_flags & WDC_PCMCIA_ATTACH) == 0)
sc 515 dev/pcmcia/wdc_pcmcia.c pcmcia_intr_disestablish(sc->sc_pf, sc->sc_ih);
sc 516 dev/pcmcia/wdc_pcmcia.c pcmcia_function_disable(sc->sc_pf);
sc 100 dev/puc/com_puc.c struct com_softc *sc = (void *)self;
sc 106 dev/puc/com_puc.c sc->sc_ih = pa->intr_establish(pa, IPL_TTY, comintr, sc,
sc 107 dev/puc/com_puc.c sc->sc_dev.dv_xname);
sc 108 dev/puc/com_puc.c if (sc->sc_ih == NULL) {
sc 117 dev/puc/com_puc.c sc->sc_iot = pa->t;
sc 118 dev/puc/com_puc.c sc->sc_ioh = pa->h;
sc 119 dev/puc/com_puc.c sc->sc_iobase = pa->a;
sc 120 dev/puc/com_puc.c sc->sc_frequency = COM_FREQ;
sc 123 dev/puc/com_puc.c sc->sc_frequency = pa->flags & PUC_COM_CLOCKMASK;
sc 125 dev/puc/com_puc.c sc->sc_uarttype = pa->hwtype;
sc 127 dev/puc/com_puc.c sc->sc_hwflags = 0;
sc 128 dev/puc/com_puc.c sc->sc_swflags = 0;
sc 130 dev/puc/com_puc.c com_attach_subr(sc);
sc 81 dev/puc/lpt_puc.c struct lpt_softc *sc = (void *)self;
sc 85 dev/puc/lpt_puc.c sc->sc_iot = aa->t;
sc 86 dev/puc/lpt_puc.c sc->sc_ioh = aa->h;
sc 89 dev/puc/lpt_puc.c sc->sc_ih = aa->intr_establish(aa, IPL_TTY, lptintr, sc,
sc 90 dev/puc/lpt_puc.c sc->sc_dev.dv_xname);
sc 91 dev/puc/lpt_puc.c if (sc->sc_ih == NULL) {
sc 100 dev/puc/lpt_puc.c sc->sc_state = 0;
sc 102 dev/puc/lpt_puc.c lpt_attach_common(sc);
sc 71 dev/radio.c struct radio_softc *sc = (void *) self;
sc 75 dev/radio.c sc->hw_if = sa->hwif;
sc 76 dev/radio.c sc->hw_hdl = sa->hdl;
sc 77 dev/radio.c sc->sc_dev = parent;
sc 84 dev/radio.c struct radio_softc *sc;
sc 88 dev/radio.c (sc = radio_cd.cd_devs[unit]) == NULL ||
sc 89 dev/radio.c sc->hw_if == NULL)
sc 92 dev/radio.c if (sc->hw_if->open != NULL)
sc 93 dev/radio.c return (sc->hw_if->open(sc->hw_hdl, flags, fmt, p));
sc 101 dev/radio.c struct radio_softc *sc;
sc 103 dev/radio.c sc = radio_cd.cd_devs[RADIOUNIT(dev)];
sc 105 dev/radio.c if (sc->hw_if->close != NULL)
sc 106 dev/radio.c return (sc->hw_if->close(sc->hw_hdl, flags, fmt, p));
sc 114 dev/radio.c struct radio_softc *sc;
sc 119 dev/radio.c (sc = radio_cd.cd_devs[unit]) == NULL || sc->hw_if == NULL)
sc 125 dev/radio.c if (sc->hw_if->get_info)
sc 126 dev/radio.c error = (sc->hw_if->get_info)(sc->hw_hdl,
sc 132 dev/radio.c if (sc->hw_if->set_info)
sc 133 dev/radio.c error = (sc->hw_if->set_info)(sc->hw_hdl,
sc 139 dev/radio.c if (sc->hw_if->search)
sc 140 dev/radio.c error = (sc->hw_if->search)(sc->hw_hdl,
sc 195 dev/radio.c struct radio_softc *sc = (struct radio_softc *)self;
sc 202 dev/radio.c sc->sc_dying = 1;
sc 127 dev/ramdisk.c struct rd_softc *sc;
sc 150 dev/ramdisk.c sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK);
sc 151 dev/ramdisk.c bzero((caddr_t)sc, sizeof(*sc));
sc 152 dev/ramdisk.c if (snprintf(sc->sc_dev.dv_xname, sizeof(sc->sc_dev.dv_xname),
sc 153 dev/ramdisk.c "rd%d", i) >= sizeof(sc->sc_dev.dv_xname)) {
sc 155 dev/ramdisk.c free(sc, M_DEVBUF);
sc 158 dev/ramdisk.c ramdisk_devs[i] = sc;
sc 159 dev/ramdisk.c sc->sc_dev.dv_unit = i;
sc 160 dev/ramdisk.c rd_attach(NULL, &sc->sc_dev, NULL);
sc 169 dev/ramdisk.c struct rd_softc *sc = (struct rd_softc *)self;
sc 178 dev/ramdisk.c rd_attach_hook(sc->sc_dev.dv_unit, &sc->sc_rd);
sc 184 dev/ramdisk.c sc->sc_dkdev.dk_driver = &rddkdriver;
sc 185 dev/ramdisk.c sc->sc_dkdev.dk_name = sc->sc_dev.dv_xname;
sc 186 dev/ramdisk.c disk_attach(&sc->sc_dkdev);
sc 196 dev/ramdisk.c int rd_server_loop(struct rd_softc *sc);
sc 197 dev/ramdisk.c int rd_ioctl_server(struct rd_softc *sc,
sc 200 dev/ramdisk.c int rd_ioctl_kalloc(struct rd_softc *sc,
sc 225 dev/ramdisk.c struct rd_softc *sc;
sc 231 dev/ramdisk.c sc = ramdisk_devs[unit];
sc 232 dev/ramdisk.c if (sc == NULL)
sc 235 dev/ramdisk.c if (sc->sc_type == RD_UNCONFIGURED)
sc 238 dev/ramdisk.c rdgetdisklabel(dev, sc, sc->sc_dkdev.dk_label, 0);
sc 240 dev/ramdisk.c if (part >= sc->sc_dkdev.dk_label->d_npartitions)
sc 243 dev/ramdisk.c return DL_GETPSIZE(&sc->sc_dkdev.dk_label->d_partitions[part]) *
sc 244 dev/ramdisk.c (sc->sc_dkdev.dk_label->d_secsize / DEV_BSIZE);
sc 254 dev/ramdisk.c struct rd_softc *sc;
sc 259 dev/ramdisk.c sc = ramdisk_devs[unit];
sc 260 dev/ramdisk.c if (sc == NULL)
sc 272 dev/ramdisk.c rd_open_hook(unit, &sc->sc_rd);
sc 279 dev/ramdisk.c if (sc->sc_type == RD_UNCONFIGURED)
sc 322 dev/ramdisk.c struct rd_softc *sc;
sc 328 dev/ramdisk.c sc = ramdisk_devs[unit];
sc 331 dev/ramdisk.c if (sc == NULL || bp->b_blkno < 0 ||
sc 332 dev/ramdisk.c (bp->b_bcount % sc->sc_dkdev.dk_label->d_secsize) != 0) {
sc 340 dev/ramdisk.c bounds_check_with_label(bp, sc->sc_dkdev.dk_label, 1) <= 0)
sc 343 dev/ramdisk.c switch (sc->sc_type) {
sc 347 dev/ramdisk.c bp->b_actf = sc->sc_buflist;
sc 348 dev/ramdisk.c sc->sc_buflist = bp;
sc 351 dev/ramdisk.c wakeup((caddr_t)sc);
sc 364 dev/ramdisk.c if (xfer > (sc->sc_size - off))
sc 365 dev/ramdisk.c xfer = (sc->sc_size - off);
sc 366 dev/ramdisk.c addr = sc->sc_addr + off;
sc 397 dev/ramdisk.c struct rd_softc *sc;
sc 402 dev/ramdisk.c sc = ramdisk_devs[unit];
sc 407 dev/ramdisk.c if (sc->sc_type == RD_UNCONFIGURED)
sc 410 dev/ramdisk.c rdgetdisklabel(dev, sc, lp, 0);
sc 411 dev/ramdisk.c bcopy(lp, sc->sc_dkdev.dk_label, sizeof(*lp));
sc 416 dev/ramdisk.c if (sc->sc_type == RD_UNCONFIGURED)
sc 418 dev/ramdisk.c rdgetdisklabel(dev, sc, (struct disklabel *)data, 1);
sc 422 dev/ramdisk.c if (sc->sc_type == RD_UNCONFIGURED) {
sc 425 dev/ramdisk.c *(struct disklabel *)data = *(sc->sc_dkdev.dk_label);
sc 429 dev/ramdisk.c ((struct partinfo *)data)->disklab = sc->sc_dkdev.dk_label;
sc 431 dev/ramdisk.c &sc->sc_dkdev.dk_label->d_partitions[DISKPART(dev)];
sc 436 dev/ramdisk.c if (sc->sc_type == RD_UNCONFIGURED) {
sc 442 dev/ramdisk.c error = setdisklabel(sc->sc_dkdev.dk_label,
sc 447 dev/ramdisk.c rdstrategy, sc->sc_dkdev.dk_label);
sc 453 dev/ramdisk.c if (sc->sc_type == RD_UNCONFIGURED) {
sc 465 dev/ramdisk.c *urd = sc->sc_rd;
sc 474 dev/ramdisk.c if (sc->sc_type != RD_UNCONFIGURED) {
sc 479 dev/ramdisk.c return rd_ioctl_kalloc(sc, urd, proc);
sc 482 dev/ramdisk.c return rd_ioctl_server(sc, urd, proc);
sc 493 dev/ramdisk.c rdgetdisklabel(dev_t dev, struct rd_softc *sc, struct disklabel *lp,
sc 500 dev/ramdisk.c lp->d_nsectors = sc->sc_size >> DEV_BSHIFT;
sc 531 dev/ramdisk.c rd_ioctl_kalloc(sc, urd, proc)
sc 532 dev/ramdisk.c struct rd_softc *sc;
sc 546 dev/ramdisk.c sc->sc_addr = (caddr_t)addr; /* kernel space */
sc 547 dev/ramdisk.c sc->sc_size = (size_t)size;
sc 548 dev/ramdisk.c sc->sc_type = RD_KMEM_ALLOCATED;
sc 559 dev/ramdisk.c rd_ioctl_server(sc, urd, proc)
sc 560 dev/ramdisk.c struct rd_softc *sc;
sc 574 dev/ramdisk.c sc->sc_addr = urd->rd_addr; /* user space */
sc 575 dev/ramdisk.c sc->sc_size = urd->rd_size;
sc 576 dev/ramdisk.c sc->sc_type = RD_UMEM_SERVER;
sc 579 dev/ramdisk.c error = rd_server_loop(sc);
sc 582 dev/ramdisk.c sc->sc_type = RD_UNCONFIGURED;
sc 583 dev/ramdisk.c sc->sc_addr = 0;
sc 584 dev/ramdisk.c sc->sc_size = 0;
sc 592 dev/ramdisk.c rd_server_loop(sc)
sc 593 dev/ramdisk.c struct rd_softc *sc;
sc 604 dev/ramdisk.c while (sc->sc_buflist == NULL) {
sc 605 dev/ramdisk.c error = tsleep((caddr_t)sc, rd_sleep_pri, "rd_idle", 0);
sc 611 dev/ramdisk.c bp = sc->sc_buflist;
sc 612 dev/ramdisk.c sc->sc_buflist = bp->b_actf;
sc 619 dev/ramdisk.c if (off >= sc->sc_size) {
sc 626 dev/ramdisk.c if (xfer > (sc->sc_size - off))
sc 627 dev/ramdisk.c xfer = (sc->sc_size - off);
sc 628 dev/ramdisk.c addr = sc->sc_addr + off;
sc 159 dev/sbus/agten.c struct agten_softc *sc = (struct agten_softc *)self;
sc 177 dev/sbus/agten.c sc->sc_bustag = bt;
sc 178 dev/sbus/agten.c sc->sc_paddr = sbus_bus_addr(bt, sa->sa_slot, sa->sa_offset);
sc 180 dev/sbus/agten.c sc->sc_physoffset =
sc 183 dev/sbus/agten.c if (sbus_bus_map(bt, sa->sa_slot, sa->sa_offset + sc->sc_physoffset,
sc 189 dev/sbus/agten.c sc->sc_i128_fb = bus_space_vaddr(bt, bh);
sc 196 dev/sbus/agten.c sc->sc_p9100 = bus_space_vaddr(bt, bh);
sc 207 dev/sbus/agten.c sc->sc_sunfb.sf_depth = 32;
sc 209 dev/sbus/agten.c sc->sc_sunfb.sf_depth = getpropint(node, "ffb_depth", 8);
sc 211 dev/sbus/agten.c sc->sc_sunfb.sf_width = getpropint(node, "ffb_width", 1152);
sc 212 dev/sbus/agten.c sc->sc_sunfb.sf_height = getpropint(node, "ffb_height", 900);
sc 213 dev/sbus/agten.c sc->sc_sunfb.sf_linebytes =
sc 214 dev/sbus/agten.c roundup(sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_depth) *
sc 215 dev/sbus/agten.c sc->sc_sunfb.sf_depth / 8;
sc 216 dev/sbus/agten.c sc->sc_sunfb.sf_fbsize =
sc 217 dev/sbus/agten.c sc->sc_sunfb.sf_height * sc->sc_sunfb.sf_linebytes;
sc 220 dev/sbus/agten.c sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height,
sc 221 dev/sbus/agten.c sc->sc_sunfb.sf_depth);
sc 223 dev/sbus/agten.c sc->sc_sunfb.sf_ro.ri_bits = (void *)sc->sc_i128_fb;
sc 225 dev/sbus/agten.c sc->sc_sunfb.sf_ro.ri_hw = sc;
sc 226 dev/sbus/agten.c fbwscons_init(&sc->sc_sunfb, isconsole ? 0 : RI_CLEAR);
sc 227 dev/sbus/agten.c fbwscons_setcolormap(&sc->sc_sunfb, agten_setcolor);
sc 230 dev/sbus/agten.c fbwscons_console_init(&sc->sc_sunfb, -1);
sc 233 dev/sbus/agten.c fbwscons_attach(&sc->sc_sunfb, &agten_accessops, isconsole);
sc 244 dev/sbus/agten.c struct agten_softc *sc = dev;
sc 255 dev/sbus/agten.c wdf->height = sc->sc_sunfb.sf_height;
sc 256 dev/sbus/agten.c wdf->width = sc->sc_sunfb.sf_width;
sc 257 dev/sbus/agten.c wdf->depth = sc->sc_sunfb.sf_depth;
sc 258 dev/sbus/agten.c wdf->cmsize = (sc->sc_sunfb.sf_depth == 8) ? 256 : 0;
sc 261 dev/sbus/agten.c *(u_int *)data = sc->sc_sunfb.sf_linebytes;
sc 265 dev/sbus/agten.c if (sc->sc_sunfb.sf_depth == 8) {
sc 267 dev/sbus/agten.c error = agten_getcmap(&sc->sc_cmap, cm);
sc 273 dev/sbus/agten.c if (sc->sc_sunfb.sf_depth == 8) {
sc 275 dev/sbus/agten.c error = agten_putcmap(&sc->sc_cmap, cm);
sc 278 dev/sbus/agten.c agten_loadcmap(sc, 0, 256);
sc 308 dev/sbus/agten.c struct agten_softc *sc = v;
sc 314 dev/sbus/agten.c if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {
sc 315 dev/sbus/agten.c return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr,
sc 316 dev/sbus/agten.c sc->sc_physoffset + offset, prot, BUS_SPACE_MAP_LINEAR));
sc 328 dev/sbus/agten.c struct agten_softc *sc = v;
sc 330 dev/sbus/agten.c sc->sc_cmap.cm_red[index] = r;
sc 331 dev/sbus/agten.c sc->sc_cmap.cm_green[index] = g;
sc 332 dev/sbus/agten.c sc->sc_cmap.cm_blue[index] = b;
sc 334 dev/sbus/agten.c agten_loadcmap(sc, index, 1);
sc 345 dev/sbus/agten.c struct agten_softc *sc = v;
sc 347 dev/sbus/agten.c if (sc->sc_nscreens > 0)
sc 350 dev/sbus/agten.c *cookiep = &sc->sc_sunfb.sf_ro;
sc 353 dev/sbus/agten.c sc->sc_sunfb.sf_ro.ri_ops.alloc_attr(&sc->sc_sunfb.sf_ro,
sc 355 dev/sbus/agten.c sc->sc_nscreens++;
sc 364 dev/sbus/agten.c struct agten_softc *sc = v;
sc 366 dev/sbus/agten.c sc->sc_nscreens--;
sc 419 dev/sbus/agten.c ibm561_write(struct agten_softc *sc, u_int32_t reg, u_int32_t value)
sc 425 dev/sbus/agten.c *(volatile u_int32_t *)(sc->sc_p9100 + P9100_RAMDAC_REGISTER(reg)) =
sc 430 dev/sbus/agten.c agten_loadcmap(struct agten_softc *sc, u_int start, u_int ncolors)
sc 435 dev/sbus/agten.c ibm561_write(sc, IBM561_ADDR_LOW,
sc 437 dev/sbus/agten.c ibm561_write(sc, IBM561_ADDR_HIGH,
sc 440 dev/sbus/agten.c red = sc->sc_cmap.cm_red;
sc 441 dev/sbus/agten.c green = sc->sc_cmap.cm_green;
sc 442 dev/sbus/agten.c blue = sc->sc_cmap.cm_blue;
sc 444 dev/sbus/agten.c ibm561_write(sc, IBM561_CMD_CMAP, *red++);
sc 445 dev/sbus/agten.c ibm561_write(sc, IBM561_CMD_CMAP, *green++);
sc 446 dev/sbus/agten.c ibm561_write(sc, IBM561_CMD_CMAP, *blue++);
sc 102 dev/sbus/apio.c struct apio_softc *sc = (void *)self;
sc 107 dev/sbus/apio.c sc->sc_bt = sa->sa_bustag;
sc 127 dev/sbus/apio.c 0, 0, &sc->sc_csr_h)) {
sc 134 dev/sbus/apio.c 0, 0, &sc->sc_clk_h)) {
sc 141 dev/sbus/apio.c 0, 0, &sc->sc_lpt_h)) {
sc 149 dev/sbus/apio.c aaa.aaa_iot = sc->sc_bt;
sc 150 dev/sbus/apio.c aaa.aaa_ioh = sc->sc_lpt_h;
sc 151 dev/sbus/apio.c aaa.aaa_clkh = sc->sc_clk_h;
sc 154 dev/sbus/apio.c sc->sc_port = config_found(self, &aaa, apio_print);
sc 185 dev/sbus/apio.c struct apio_softc *sc = (struct apio_softc *)dv;
sc 188 dev/sbus/apio.c csr = bus_space_read_1(sc->sc_bt, sc->sc_csr_h, 0);
sc 191 dev/sbus/apio.c bus_space_write_1(sc->sc_bt, sc->sc_csr_h, 0, csr);
sc 203 dev/sbus/apio.c struct lpt_apio_softc *sc = (struct lpt_apio_softc *)self;
sc 206 dev/sbus/apio.c sc->sc_lpt.sc_state = 0;
sc 207 dev/sbus/apio.c sc->sc_lpt.sc_iot = aaa->aaa_iot;
sc 208 dev/sbus/apio.c sc->sc_lpt.sc_ioh = aaa->aaa_ioh;
sc 209 dev/sbus/apio.c sc->sc_clk_h = aaa->aaa_clkh;
sc 210 dev/sbus/apio.c sc->sc_ih = bus_intr_establish(aaa->aaa_iot, aaa->aaa_pri,
sc 211 dev/sbus/apio.c IPL_TTY, 0, lpt_apio_intr, sc, self->dv_xname);
sc 212 dev/sbus/apio.c if (sc->sc_ih == NULL) {
sc 218 dev/sbus/apio.c lpt_attach_common(&sc->sc_lpt);
sc 224 dev/sbus/apio.c struct lpt_apio_softc *sc = vsc;
sc 227 dev/sbus/apio.c r = lptintr(&sc->sc_lpt);
sc 228 dev/sbus/apio.c bus_space_read_1(sc->sc_lpt.sc_iot, sc->sc_clk_h, 0);
sc 109 dev/sbus/asio.c struct asio_softc *sc = (void *)self;
sc 115 dev/sbus/asio.c sc->sc_bt = sa->sa_bustag;
sc 116 dev/sbus/asio.c sc->sc_nports = 2;
sc 136 dev/sbus/asio.c 0, 0, &sc->sc_csr_h)) {
sc 141 dev/sbus/asio.c for (i = 0; i < sc->sc_nports; i++) {
sc 144 dev/sbus/asio.c 0, 0, &sc->sc_ports[i].ap_bh)) {
sc 150 dev/sbus/asio.c sc->sc_ports[0].ap_inten = ASIO_CSR_SJ_UART0_INTEN;
sc 151 dev/sbus/asio.c sc->sc_ports[1].ap_inten = ASIO_CSR_UART1_INTEN;
sc 155 dev/sbus/asio.c for (i = 0; i < sc->sc_nports; i++) {
sc 158 dev/sbus/asio.c aaa.aaa_iot = sc->sc_bt;
sc 159 dev/sbus/asio.c aaa.aaa_ioh = sc->sc_ports[i].ap_bh;
sc 160 dev/sbus/asio.c aaa.aaa_inten = sc->sc_ports[i].ap_inten;
sc 162 dev/sbus/asio.c sc->sc_ports[i].ap_dev = config_found(self, &aaa, asio_print);
sc 188 dev/sbus/asio.c struct asio_softc *sc = (struct asio_softc *)dv;
sc 191 dev/sbus/asio.c csr = bus_space_read_1(sc->sc_bt, sc->sc_csr_h, 0);
sc 194 dev/sbus/asio.c bus_space_write_1(sc->sc_bt, sc->sc_csr_h, 0, csr);
sc 206 dev/sbus/asio.c struct com_softc *sc = (struct com_softc *)self;
sc 209 dev/sbus/asio.c sc->sc_iot = aaa->aaa_iot;
sc 210 dev/sbus/asio.c sc->sc_ioh = aaa->aaa_ioh;
sc 211 dev/sbus/asio.c sc->sc_iobase = 0; /* XXX WTF is iobase for? It used to be the lower 32 bits of ioh's vaddr... */
sc 212 dev/sbus/asio.c sc->sc_hwflags = 0;
sc 213 dev/sbus/asio.c sc->sc_swflags = 0;
sc 214 dev/sbus/asio.c sc->sc_frequency = BAUD_BASE;
sc 216 dev/sbus/asio.c sc->sc_ih = bus_intr_establish(aaa->aaa_iot, aaa->aaa_pri,
sc 217 dev/sbus/asio.c IPL_TTY, 0, comintr, sc, self->dv_xname);
sc 218 dev/sbus/asio.c if (sc->sc_ih == NULL) {
sc 224 dev/sbus/asio.c com_attach_subr(sc);
sc 217 dev/sbus/be.c struct be_softc *sc = (struct be_softc *)self;
sc 218 dev/sbus/be.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 219 dev/sbus/be.c struct mii_data *mii = &sc->sc_mii;
sc 231 dev/sbus/be.c sc->sc_bustag = sa->sa_bustag;
sc 232 dev/sbus/be.c sc->sc_dmatag = sa->sa_dmatag;
sc 242 dev/sbus/be.c (bus_size_t)sa->sa_reg[0].sbr_size, 0, 0, &sc->sc_cr) != 0) {
sc 249 dev/sbus/be.c (bus_size_t)sa->sa_reg[1].sbr_size, 0, 0, &sc->sc_br) != 0) {
sc 256 dev/sbus/be.c (bus_size_t)sa->sa_reg[2].sbr_size, 0, 0, &sc->sc_tr) != 0) {
sc 261 dev/sbus/be.c sc->sc_qec = qec;
sc 262 dev/sbus/be.c sc->sc_qr = qec->sc_regs;
sc 264 dev/sbus/be.c sc->sc_rev = getpropint(node, "board-version", -1);
sc 265 dev/sbus/be.c printf(" rev %x", sc->sc_rev);
sc 267 dev/sbus/be.c bestop(sc);
sc 269 dev/sbus/be.c sc->sc_channel = getpropint(node, "channel#", -1);
sc 270 dev/sbus/be.c if (sc->sc_channel == -1)
sc 271 dev/sbus/be.c sc->sc_channel = 0;
sc 273 dev/sbus/be.c sc->sc_burst = getpropint(node, "burst-sizes", -1);
sc 274 dev/sbus/be.c if (sc->sc_burst == -1)
sc 275 dev/sbus/be.c sc->sc_burst = qec->sc_burst;
sc 278 dev/sbus/be.c sc->sc_burst &= qec->sc_burst;
sc 282 dev/sbus/be.c IPL_NET, 0, beintr, sc, self->dv_xname) == NULL) {
sc 287 dev/sbus/be.c myetheraddr(sc->sc_arpcom.ac_enaddr);
sc 288 dev/sbus/be.c printf(" address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 295 dev/sbus/be.c sc->sc_rb.rb_ntbuf = QEC_XD_RING_MAXSIZE;
sc 296 dev/sbus/be.c sc->sc_rb.rb_nrbuf = QEC_XD_RING_MAXSIZE;
sc 300 dev/sbus/be.c sc->sc_rb.rb_ntbuf * BE_PKT_BUF_SZ +
sc 301 dev/sbus/be.c sc->sc_rb.rb_nrbuf * BE_PKT_BUF_SZ;
sc 305 dev/sbus/be.c BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
sc 320 dev/sbus/be.c &sc->sc_rb.rb_membase, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
sc 328 dev/sbus/be.c if ((error = bus_dmamap_load(dmatag, sc->sc_dmamap,
sc 329 dev/sbus/be.c sc->sc_rb.rb_membase, size, NULL, BUS_DMA_NOWAIT)) != 0) {
sc 332 dev/sbus/be.c bus_dmamem_unmap(dmatag, sc->sc_rb.rb_membase, size);
sc 336 dev/sbus/be.c sc->sc_rb.rb_dmabase = sc->sc_dmamap->dm_segs[0].ds_addr;
sc 348 dev/sbus/be.c timeout_set(&sc->sc_tick_ch, be_tick, sc);
sc 353 dev/sbus/be.c be_mii_sync(sc);
sc 354 dev/sbus/be.c v = bus_space_read_4(sc->sc_bustag, sc->sc_tr, BE_TRI_MGMTPAL);
sc 360 dev/sbus/be.c mii_attach(&sc->sc_dev, mii, 0xffffffff, BE_PHY_EXTERNAL,
sc 366 dev/sbus/be.c ifmedia_add(&sc->sc_media,
sc 369 dev/sbus/be.c ifmedia_set(&sc->sc_media,
sc 379 dev/sbus/be.c sc->sc_dev.dv_xname,
sc 387 dev/sbus/be.c sc->sc_dev.dv_xname,
sc 391 dev/sbus/be.c sc->sc_phys[instance] = child->mii_phy;
sc 398 dev/sbus/be.c ifmedia_set(&sc->sc_media,
sc 402 dev/sbus/be.c be_pal_gate(sc, BE_PHY_EXTERNAL);
sc 416 dev/sbus/be.c sc->sc_mii_inst = instance;
sc 417 dev/sbus/be.c sc->sc_phys[instance] = BE_PHY_INTERNAL;
sc 420 dev/sbus/be.c ifmedia_add(&sc->sc_media,
sc 422 dev/sbus/be.c ifmedia_add(&sc->sc_media,
sc 425 dev/sbus/be.c ifmedia_add(&sc->sc_media,
sc 431 dev/sbus/be.c be_mii_reset(sc, BE_PHY_INTERNAL);
sc 434 dev/sbus/be.c be_pal_gate(sc, BE_PHY_INTERNAL);
sc 435 dev/sbus/be.c ifmedia_set(&sc->sc_media,
sc 438 dev/sbus/be.c be_mii_writereg((void *)sc,
sc 442 dev/sbus/be.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 443 dev/sbus/be.c ifp->if_softc = sc;
sc 462 dev/sbus/be.c be_put(struct be_softc *sc, int idx, struct mbuf *m)
sc 468 dev/sbus/be.c bp = sc->sc_rb.rb_txbuf + (idx % sc->sc_rb.rb_ntbuf) * BE_PKT_BUF_SZ;
sc 491 dev/sbus/be.c be_get(struct be_softc *sc, int idx, int totlen)
sc 493 dev/sbus/be.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 499 dev/sbus/be.c bp = sc->sc_rb.rb_rxbuf + (idx % sc->sc_rb.rb_nrbuf) * BE_PKT_BUF_SZ;
sc 542 dev/sbus/be.c be_read(struct be_softc *sc, int idx, int len)
sc 544 dev/sbus/be.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 560 dev/sbus/be.c m = be_get(sc, idx, len);
sc 591 dev/sbus/be.c struct be_softc *sc = (struct be_softc *)ifp->if_softc;
sc 592 dev/sbus/be.c struct qec_xd *txd = sc->sc_rb.rb_txd;
sc 595 dev/sbus/be.c unsigned int ntbuf = sc->sc_rb.rb_ntbuf;
sc 600 dev/sbus/be.c bix = sc->sc_rb.rb_tdhead;
sc 619 dev/sbus/be.c len = be_put(sc, bix, m);
sc 626 dev/sbus/be.c bus_space_write_4(sc->sc_bustag, sc->sc_cr, BE_CRI_CTRL,
sc 632 dev/sbus/be.c if (++sc->sc_rb.rb_td_nbusy == ntbuf) {
sc 638 dev/sbus/be.c sc->sc_rb.rb_tdhead = bix;
sc 642 dev/sbus/be.c bestop(struct be_softc *sc)
sc 645 dev/sbus/be.c bus_space_tag_t t = sc->sc_bustag;
sc 646 dev/sbus/be.c bus_space_handle_t br = sc->sc_br;
sc 648 dev/sbus/be.c timeout_del(&sc->sc_tick_ch);
sc 651 dev/sbus/be.c mii_down(&sc->sc_mii);
sc 652 dev/sbus/be.c (void)be_intphy_service(sc, &sc->sc_mii, MII_DOWN);
sc 675 dev/sbus/be.c bereset(struct be_softc *sc)
sc 680 dev/sbus/be.c bestop(sc);
sc 681 dev/sbus/be.c if ((sc->sc_arpcom.ac_if.if_flags & IFF_UP) != 0)
sc 682 dev/sbus/be.c beinit(sc);
sc 689 dev/sbus/be.c struct be_softc *sc = ifp->if_softc;
sc 691 dev/sbus/be.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 692 dev/sbus/be.c ++sc->sc_arpcom.ac_if.if_oerrors;
sc 693 dev/sbus/be.c bereset(sc);
sc 699 dev/sbus/be.c struct be_softc *sc = (struct be_softc *)v;
sc 700 dev/sbus/be.c bus_space_tag_t t = sc->sc_bustag;
sc 705 dev/sbus/be.c whyq = bus_space_read_4(t, sc->sc_qr, QEC_QRI_STAT);
sc 706 dev/sbus/be.c whyc = bus_space_read_4(t, sc->sc_cr, BE_CRI_STAT);
sc 707 dev/sbus/be.c whyb = bus_space_read_4(t, sc->sc_br, BE_BRI_STAT);
sc 710 dev/sbus/be.c r |= beeint(sc, whyb);
sc 713 dev/sbus/be.c r |= beqint(sc, whyc);
sc 716 dev/sbus/be.c r |= betint(sc);
sc 719 dev/sbus/be.c r |= berint(sc);
sc 728 dev/sbus/be.c beqint(struct be_softc *sc, u_int32_t why)
sc 740 dev/sbus/be.c printf("%s: bigmac error\n", sc->sc_dev.dv_xname);
sc 746 dev/sbus/be.c printf("%s: bogus tx descriptor\n", sc->sc_dev.dv_xname);
sc 752 dev/sbus/be.c printf("%s: tx dma error ( ", sc->sc_dev.dv_xname);
sc 765 dev/sbus/be.c printf("%s: out of rx descriptors\n", sc->sc_dev.dv_xname);
sc 771 dev/sbus/be.c printf("%s: rx descriptor too small\n", sc->sc_dev.dv_xname);
sc 777 dev/sbus/be.c printf("%s: rx dma error ( ", sc->sc_dev.dv_xname);
sc 790 dev/sbus/be.c sc->sc_dev.dv_xname, why);
sc 794 dev/sbus/be.c printf("%s: resetting\n", sc->sc_dev.dv_xname);
sc 795 dev/sbus/be.c bereset(sc);
sc 805 dev/sbus/be.c beeint(struct be_softc *sc, u_int32_t why)
sc 812 dev/sbus/be.c printf("%s: receive fifo overrun\n", sc->sc_dev.dv_xname);
sc 817 dev/sbus/be.c printf("%s: transmit fifo underrun\n", sc->sc_dev.dv_xname);
sc 822 dev/sbus/be.c printf("%s: max packet size error\n", sc->sc_dev.dv_xname);
sc 828 dev/sbus/be.c sc->sc_dev.dv_xname, why);
sc 832 dev/sbus/be.c printf("%s: resetting\n", sc->sc_dev.dv_xname);
sc 833 dev/sbus/be.c bereset(sc);
sc 843 dev/sbus/be.c betint(struct be_softc *sc)
sc 845 dev/sbus/be.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 846 dev/sbus/be.c bus_space_tag_t t = sc->sc_bustag;
sc 847 dev/sbus/be.c bus_space_handle_t br = sc->sc_br;
sc 867 dev/sbus/be.c bix = sc->sc_rb.rb_tdtail;
sc 870 dev/sbus/be.c if (sc->sc_rb.rb_td_nbusy <= 0)
sc 873 dev/sbus/be.c txflags = sc->sc_rb.rb_txd[bix].xd_flags;
sc 884 dev/sbus/be.c --sc->sc_rb.rb_td_nbusy;
sc 887 dev/sbus/be.c sc->sc_rb.rb_tdtail = bix;
sc 891 dev/sbus/be.c if (sc->sc_rb.rb_td_nbusy == 0)
sc 901 dev/sbus/be.c berint(struct be_softc *sc)
sc 903 dev/sbus/be.c struct qec_xd *xd = sc->sc_rb.rb_rxd;
sc 905 dev/sbus/be.c unsigned int nrbuf = sc->sc_rb.rb_nrbuf;
sc 907 dev/sbus/be.c bix = sc->sc_rb.rb_rdtail;
sc 918 dev/sbus/be.c be_read(sc, bix, len);
sc 928 dev/sbus/be.c sc->sc_rb.rb_rdtail = bix;
sc 936 dev/sbus/be.c struct be_softc *sc = ifp->if_softc;
sc 943 dev/sbus/be.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 954 dev/sbus/be.c beinit(sc);
sc 955 dev/sbus/be.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 959 dev/sbus/be.c beinit(sc);
sc 971 dev/sbus/be.c bestop(sc);
sc 979 dev/sbus/be.c beinit(sc);
sc 985 dev/sbus/be.c bestop(sc);
sc 986 dev/sbus/be.c beinit(sc);
sc 990 dev/sbus/be.c sc->sc_debug = 1;
sc 992 dev/sbus/be.c sc->sc_debug = 0;
sc 999 dev/sbus/be.c ether_addmulti(ifr, &sc->sc_arpcom):
sc 1000 dev/sbus/be.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 1008 dev/sbus/be.c be_mcreset(sc);
sc 1014 dev/sbus/be.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
sc 1026 dev/sbus/be.c beinit(struct be_softc *sc)
sc 1028 dev/sbus/be.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1029 dev/sbus/be.c bus_space_tag_t t = sc->sc_bustag;
sc 1030 dev/sbus/be.c bus_space_handle_t br = sc->sc_br;
sc 1031 dev/sbus/be.c bus_space_handle_t cr = sc->sc_cr;
sc 1032 dev/sbus/be.c struct qec_softc *qec = sc->sc_qec;
sc 1040 dev/sbus/be.c qec_meminit(&sc->sc_rb, BE_PKT_BUF_SZ);
sc 1042 dev/sbus/be.c bestop(sc);
sc 1044 dev/sbus/be.c ea = sc->sc_arpcom.ac_enaddr;
sc 1059 dev/sbus/be.c be_mcreset(sc);
sc 1087 dev/sbus/be.c bus_space_write_4(t, cr, BE_CRI_RXDS, (u_int32_t)sc->sc_rb.rb_rxddma);
sc 1088 dev/sbus/be.c bus_space_write_4(t, cr, BE_CRI_TXDS, (u_int32_t)sc->sc_rb.rb_txddma);
sc 1090 dev/sbus/be.c qecaddr = sc->sc_channel * qec->sc_msize;
sc 1115 dev/sbus/be.c timeout_add(&sc->sc_tick_ch, hz);
sc 1120 dev/sbus/be.c be_mcreset(struct be_softc *sc)
sc 1122 dev/sbus/be.c struct arpcom *ac = &sc->sc_arpcom;
sc 1123 dev/sbus/be.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1124 dev/sbus/be.c bus_space_tag_t t = sc->sc_bustag;
sc 1125 dev/sbus/be.c bus_space_handle_t br = sc->sc_br;
sc 1206 dev/sbus/be.c be_mii_sync(struct be_softc *sc)
sc 1208 dev/sbus/be.c bus_space_tag_t t = sc->sc_bustag;
sc 1209 dev/sbus/be.c bus_space_handle_t tr = sc->sc_tr;
sc 1224 dev/sbus/be.c be_pal_gate(struct be_softc *sc, int phy)
sc 1226 dev/sbus/be.c bus_space_tag_t t = sc->sc_bustag;
sc 1227 dev/sbus/be.c bus_space_handle_t tr = sc->sc_tr;
sc 1230 dev/sbus/be.c be_mii_sync(sc);
sc 1241 dev/sbus/be.c be_tcvr_read_bit(struct be_softc *sc, int phy)
sc 1243 dev/sbus/be.c bus_space_tag_t t = sc->sc_bustag;
sc 1244 dev/sbus/be.c bus_space_handle_t tr = sc->sc_tr;
sc 1269 dev/sbus/be.c be_tcvr_write_bit(struct be_softc *sc, int phy, int bit)
sc 1271 dev/sbus/be.c bus_space_tag_t t = sc->sc_bustag;
sc 1272 dev/sbus/be.c bus_space_handle_t tr = sc->sc_tr;
sc 1289 dev/sbus/be.c be_mii_sendbits(struct be_softc *sc, int phy, u_int32_t data, int nbits)
sc 1294 dev/sbus/be.c be_tcvr_write_bit(sc, phy, (data & i) != 0);
sc 1300 dev/sbus/be.c struct be_softc *sc = (struct be_softc *)self;
sc 1306 dev/sbus/be.c be_mii_sync(sc);
sc 1307 dev/sbus/be.c be_mii_sendbits(sc, phy, MII_COMMAND_START, 2);
sc 1308 dev/sbus/be.c be_mii_sendbits(sc, phy, MII_COMMAND_READ, 2);
sc 1309 dev/sbus/be.c be_mii_sendbits(sc, phy, phy, 5);
sc 1310 dev/sbus/be.c be_mii_sendbits(sc, phy, reg, 5);
sc 1312 dev/sbus/be.c (void) be_tcvr_read_bit(sc, phy);
sc 1313 dev/sbus/be.c (void) be_tcvr_read_bit(sc, phy);
sc 1316 dev/sbus/be.c val |= (be_tcvr_read_bit(sc, phy) << i);
sc 1318 dev/sbus/be.c (void) be_tcvr_read_bit(sc, phy);
sc 1319 dev/sbus/be.c (void) be_tcvr_read_bit(sc, phy);
sc 1320 dev/sbus/be.c (void) be_tcvr_read_bit(sc, phy);
sc 1328 dev/sbus/be.c struct be_softc *sc = (struct be_softc *)self;
sc 1334 dev/sbus/be.c be_mii_sync(sc);
sc 1335 dev/sbus/be.c be_mii_sendbits(sc, phy, MII_COMMAND_START, 2);
sc 1336 dev/sbus/be.c be_mii_sendbits(sc, phy, MII_COMMAND_WRITE, 2);
sc 1337 dev/sbus/be.c be_mii_sendbits(sc, phy, phy, 5);
sc 1338 dev/sbus/be.c be_mii_sendbits(sc, phy, reg, 5);
sc 1340 dev/sbus/be.c be_tcvr_write_bit(sc, phy, 1);
sc 1341 dev/sbus/be.c be_tcvr_write_bit(sc, phy, 0);
sc 1344 dev/sbus/be.c be_tcvr_write_bit(sc, phy, (val >> i) & 1);
sc 1348 dev/sbus/be.c be_mii_reset(struct be_softc *sc, int phy)
sc 1352 dev/sbus/be.c be_mii_writereg((struct device *)sc, phy, MII_BMCR,
sc 1354 dev/sbus/be.c be_mii_writereg((struct device *)sc, phy, MII_BMCR, BMCR_RESET);
sc 1357 dev/sbus/be.c int bmcr = be_mii_readreg((struct device *)sc, phy, MII_BMCR);
sc 1363 dev/sbus/be.c printf("%s: bmcr reset failed\n", sc->sc_dev.dv_xname);
sc 1373 dev/sbus/be.c struct be_softc *sc = arg;
sc 1376 dev/sbus/be.c mii_tick(&sc->sc_mii);
sc 1377 dev/sbus/be.c (void)be_intphy_service(sc, &sc->sc_mii, MII_TICK);
sc 1379 dev/sbus/be.c timeout_add(&sc->sc_tick_ch, hz);
sc 1386 dev/sbus/be.c struct be_softc *sc = (struct be_softc *)self;
sc 1387 dev/sbus/be.c bus_space_tag_t t = sc->sc_bustag;
sc 1388 dev/sbus/be.c bus_space_handle_t br = sc->sc_br;
sc 1392 dev/sbus/be.c instance = IFM_INST(sc->sc_mii.mii_media.ifm_cur->ifm_media);
sc 1400 dev/sbus/be.c if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0)
sc 1407 dev/sbus/be.c be_pal_gate(sc, sc->sc_phys[instance]);
sc 1416 dev/sbus/be.c struct be_softc *sc = ifp->if_softc;
sc 1418 dev/sbus/be.c mii_pollstat(&sc->sc_mii);
sc 1419 dev/sbus/be.c (void)be_intphy_service(sc, &sc->sc_mii, MII_POLLSTAT);
sc 1421 dev/sbus/be.c ifmr->ifm_status = sc->sc_mii.mii_media_status;
sc 1422 dev/sbus/be.c ifmr->ifm_active = sc->sc_mii.mii_media_active;
sc 1432 dev/sbus/be.c struct be_softc *sc = ifp->if_softc;
sc 1435 dev/sbus/be.c if ((error = mii_mediachg(&sc->sc_mii)) != 0)
sc 1438 dev/sbus/be.c return (be_intphy_service(sc, &sc->sc_mii, MII_MEDIACHG));
sc 1445 dev/sbus/be.c be_intphy_service(struct be_softc *sc, struct mii_data *mii, int cmd)
sc 1456 dev/sbus/be.c if (IFM_INST(ife->ifm_media) != sc->sc_mii_inst)
sc 1467 dev/sbus/be.c if (IFM_INST(ife->ifm_media) != sc->sc_mii_inst) {
sc 1468 dev/sbus/be.c bmcr = be_mii_readreg((void *)sc,
sc 1470 dev/sbus/be.c be_mii_writereg((void *)sc,
sc 1472 dev/sbus/be.c sc->sc_mii_flags &= ~MIIF_HAVELINK;
sc 1473 dev/sbus/be.c sc->sc_intphy_curspeed = 0;
sc 1478 dev/sbus/be.c if ((error = be_mii_reset(sc, BE_PHY_INTERNAL)) != 0)
sc 1481 dev/sbus/be.c bmcr = be_mii_readreg((void *)sc, BE_PHY_INTERNAL, MII_BMCR);
sc 1491 dev/sbus/be.c if ((sc->sc_mii_flags & MIIF_HAVELINK) != 0) {
sc 1493 dev/sbus/be.c bmcr |= sc->sc_intphy_curspeed;
sc 1497 dev/sbus/be.c sc->sc_mii_flags |= MIIF_DOINGAUTO;
sc 1506 dev/sbus/be.c be_mii_writereg((void *)sc, BE_PHY_INTERNAL, MII_BMCR, bmcr);
sc 1513 dev/sbus/be.c if (IFM_INST(ife->ifm_media) != sc->sc_mii_inst)
sc 1531 dev/sbus/be.c bmsr = be_mii_readreg((void *)sc, BE_PHY_INTERNAL, MII_BMSR) |
sc 1532 dev/sbus/be.c be_mii_readreg((void *)sc, BE_PHY_INTERNAL, MII_BMSR);
sc 1536 dev/sbus/be.c bmcr = be_mii_readreg((void *)sc,
sc 1539 dev/sbus/be.c if ((sc->sc_mii_flags & MIIF_DOINGAUTO) != 0) {
sc 1540 dev/sbus/be.c bmcr = be_mii_readreg((void *)sc,
sc 1543 dev/sbus/be.c sc->sc_mii_flags |= MIIF_HAVELINK;
sc 1544 dev/sbus/be.c sc->sc_intphy_curspeed = (bmcr & BMCR_S100);
sc 1545 dev/sbus/be.c sc->sc_mii_flags &= ~MIIF_DOINGAUTO;
sc 1548 dev/sbus/be.c be_mii_writereg((void *)sc,
sc 1552 dev/sbus/be.c sc->sc_dev.dv_xname,
sc 1558 dev/sbus/be.c if ((sc->sc_mii_flags & MIIF_DOINGAUTO) == 0) {
sc 1559 dev/sbus/be.c sc->sc_mii_flags |= MIIF_DOINGAUTO;
sc 1560 dev/sbus/be.c sc->sc_mii_flags &= ~MIIF_HAVELINK;
sc 1561 dev/sbus/be.c sc->sc_intphy_curspeed = 0;
sc 1562 dev/sbus/be.c printf("%s: link down\n", sc->sc_dev.dv_xname);
sc 1566 dev/sbus/be.c if (++sc->sc_mii_ticks < 5)
sc 1569 dev/sbus/be.c sc->sc_mii_ticks = 0;
sc 1570 dev/sbus/be.c bmcr = be_mii_readreg((void *)sc, BE_PHY_INTERNAL, MII_BMCR);
sc 1573 dev/sbus/be.c be_mii_writereg((void *)sc, BE_PHY_INTERNAL, MII_BMCR, bmcr);
sc 1579 dev/sbus/be.c bmcr = be_mii_readreg((void *)sc, BE_PHY_INTERNAL, MII_BMCR);
sc 1580 dev/sbus/be.c be_mii_writereg((void *)sc,
sc 1586 dev/sbus/be.c be_intphy_status(sc);
sc 1589 dev/sbus/be.c if (sc->sc_mii_active != mii->mii_media_active || cmd == MII_MEDIACHG) {
sc 1590 dev/sbus/be.c (*mii->mii_statchg)((struct device *)sc);
sc 1591 dev/sbus/be.c sc->sc_mii_active = mii->mii_media_active;
sc 1600 dev/sbus/be.c be_intphy_status(struct be_softc *sc)
sc 1602 dev/sbus/be.c struct mii_data *mii = &sc->sc_mii;
sc 1612 dev/sbus/be.c bmcr = be_mii_readreg((struct device *)sc, BE_PHY_INTERNAL, MII_BMCR);
sc 1630 dev/sbus/be.c bmsr = be_mii_readreg((struct device *)sc, BE_PHY_INTERNAL, MII_BMSR)|
sc 1631 dev/sbus/be.c be_mii_readreg((struct device *)sc, BE_PHY_INTERNAL, MII_BMSR);
sc 131 dev/sbus/bpp.c struct lsi64854_softc *sc = &dsc->sc_lsi64854;
sc 137 dev/sbus/bpp.c sc->sc_bustag = sa->sa_bustag;
sc 138 dev/sbus/bpp.c sc->sc_dmatag = sa->sa_dmatag;
sc 144 dev/sbus/bpp.c BUS_SPACE_MAP_PROMADDRESS, 0, &sc->sc_regs) != 0) {
sc 149 dev/sbus/bpp.c sa->sa_size, 0, 0, &sc->sc_regs) != 0) {
sc 176 dev/sbus/bpp.c sc->sc_burst = (burst & SBUS_BURST_32) ? 32 :
sc 180 dev/sbus/bpp.c sc->sc_channel = L64854_CHANNEL_PP;
sc 181 dev/sbus/bpp.c if (lsi64854_attach(sc) != 0)
sc 185 dev/sbus/bpp.c sc->sc_intrchain = bppintr;
sc 186 dev/sbus/bpp.c sc->sc_intrchainarg = dsc;
sc 188 dev/sbus/bpp.c bppintr, sc, self->dv_xname);
sc 196 dev/sbus/bpp.c bus_space_handle_t h = sc->sc_regs;
sc 200 dev/sbus/bpp.c hw->hw_hcr = bus_space_read_2(sc->sc_bustag, h, L64854_REG_HCR);
sc 201 dev/sbus/bpp.c hw->hw_ocr = bus_space_read_2(sc->sc_bustag, h, L64854_REG_OCR);
sc 202 dev/sbus/bpp.c hw->hw_tcr = bus_space_read_1(sc->sc_bustag, h, L64854_REG_TCR);
sc 203 dev/sbus/bpp.c hw->hw_or = bus_space_read_1(sc->sc_bustag, h, L64854_REG_OR);
sc 215 dev/sbus/bpp.c bpp_setparams(struct bpp_softc *sc, struct hwstate *hw)
sc 218 dev/sbus/bpp.c bus_space_tag_t t = sc->sc_lsi64854.sc_bustag;
sc 219 dev/sbus/bpp.c bus_space_handle_t h = sc->sc_lsi64854.sc_regs;
sc 239 dev/sbus/bpp.c struct bpp_softc *sc;
sc 246 dev/sbus/bpp.c if ((sc = bpp_cd.cd_devs[unit]) == NULL)
sc 249 dev/sbus/bpp.c lsi = &sc->sc_lsi64854;
sc 253 dev/sbus/bpp.c bpp_setparams(sc, &sc->sc_hwstate);
sc 258 dev/sbus/bpp.c irq |= sc->sc_hwstate.hw_irq;
sc 266 dev/sbus/bpp.c struct bpp_softc *sc = bpp_cd.cd_devs[BPPUNIT(dev)];
sc 267 dev/sbus/bpp.c struct lsi64854_softc *lsi = &sc->sc_lsi64854;
sc 271 dev/sbus/bpp.c irq = sc->sc_hwstate.hw_irq | BPP_ALLIRQ;
sc 275 dev/sbus/bpp.c sc->sc_flags = 0;
sc 282 dev/sbus/bpp.c struct bpp_softc *sc = bpp_cd.cd_devs[BPPUNIT(dev)];
sc 283 dev/sbus/bpp.c struct lsi64854_softc *lsi = &sc->sc_lsi64854;
sc 291 dev/sbus/bpp.c while ((sc->sc_flags & BPP_LOCKED) != 0) {
sc 297 dev/sbus/bpp.c sc->sc_flags |= BPP_WANT;
sc 298 dev/sbus/bpp.c error = tsleep(sc->sc_buf, PZERO | PCATCH, "bppwrite", 0);
sc 304 dev/sbus/bpp.c sc->sc_flags |= BPP_LOCKED;
sc 312 dev/sbus/bpp.c caddr_t bp = sc->sc_buf;
sc 313 dev/sbus/bpp.c size_t len = min(sc->sc_bufsz, uio->uio_resid);
sc 342 dev/sbus/bpp.c error = tsleep(sc, PZERO | PCATCH, "bppdma", 0);
sc 348 dev/sbus/bpp.c if ((error = sc->sc_error) != 0)
sc 362 dev/sbus/bpp.c sc->sc_flags &= ~BPP_LOCKED;
sc 363 dev/sbus/bpp.c if ((sc->sc_flags & BPP_WANT) != 0) {
sc 364 dev/sbus/bpp.c sc->sc_flags &= ~BPP_WANT;
sc 365 dev/sbus/bpp.c wakeup(sc->sc_buf);
sc 388 dev/sbus/bpp.c struct bpp_softc *sc = arg;
sc 389 dev/sbus/bpp.c struct lsi64854_softc *lsi = &sc->sc_lsi64854;
sc 394 dev/sbus/bpp.c sc->sc_error = 1;
sc 406 dev/sbus/bpp.c if ((sc->sc_flags & BPP_LOCKED) != 0)
sc 407 dev/sbus/bpp.c wakeup(sc);
sc 408 dev/sbus/bpp.c else if ((sc->sc_flags & BPP_WANT) != 0) {
sc 409 dev/sbus/bpp.c sc->sc_flags &= ~BPP_WANT;
sc 410 dev/sbus/bpp.c wakeup(sc->sc_buf);
sc 92 dev/sbus/bwtwo.c #define FBC_READ(sc, reg) \
sc 93 dev/sbus/bwtwo.c bus_space_read_1((sc)->sc_bustag, (sc)->sc_ctrl_regs, (reg))
sc 94 dev/sbus/bwtwo.c #define FBC_WRITE(sc, reg, val) \
sc 95 dev/sbus/bwtwo.c bus_space_write_1((sc)->sc_bustag, (sc)->sc_ctrl_regs, (reg), (val))
sc 155 dev/sbus/bwtwo.c struct bwtwo_softc *sc = (struct bwtwo_softc *)self;
sc 161 dev/sbus/bwtwo.c sc->sc_bustag = sa->sa_bustag;
sc 162 dev/sbus/bwtwo.c sc->sc_paddr = sbus_bus_addr(sa->sa_bustag, sa->sa_slot, sa->sa_offset);
sc 164 dev/sbus/bwtwo.c fb_setsize(&sc->sc_sunfb, 1, 1152, 900, node, 0);
sc 176 dev/sbus/bwtwo.c BWTWO_CTRL_SIZE, 0, 0, &sc->sc_ctrl_regs) != 0) {
sc 183 dev/sbus/bwtwo.c sc->sc_sunfb.sf_fbsize, BUS_SPACE_MAP_LINEAR,
sc 184 dev/sbus/bwtwo.c 0, &sc->sc_vid_regs) != 0) {
sc 196 dev/sbus/bwtwo.c bwtwo_burner(sc, 1, 0);
sc 198 dev/sbus/bwtwo.c printf(", %dx%d\n", sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height);
sc 200 dev/sbus/bwtwo.c sc->sc_sunfb.sf_ro.ri_bits = (void *)bus_space_vaddr(sc->sc_bustag,
sc 201 dev/sbus/bwtwo.c sc->sc_vid_regs);
sc 202 dev/sbus/bwtwo.c sc->sc_sunfb.sf_ro.ri_hw = sc;
sc 203 dev/sbus/bwtwo.c fbwscons_init(&sc->sc_sunfb, console ? 0 : RI_CLEAR);
sc 206 dev/sbus/bwtwo.c fbwscons_console_init(&sc->sc_sunfb, -1);
sc 209 dev/sbus/bwtwo.c fbwscons_attach(&sc->sc_sunfb, &bwtwo_accessops, console);
sc 214 dev/sbus/bwtwo.c bus_space_unmap(sa->sa_bustag, sc->sc_ctrl_regs, BWTWO_CTRL_SIZE);
sc 228 dev/sbus/bwtwo.c struct bwtwo_softc *sc = v;
sc 237 dev/sbus/bwtwo.c wdf->height = sc->sc_sunfb.sf_height;
sc 238 dev/sbus/bwtwo.c wdf->width = sc->sc_sunfb.sf_width;
sc 239 dev/sbus/bwtwo.c wdf->depth = sc->sc_sunfb.sf_depth;
sc 243 dev/sbus/bwtwo.c *(u_int *)data = sc->sc_sunfb.sf_linebytes;
sc 274 dev/sbus/bwtwo.c struct bwtwo_softc *sc = v;
sc 276 dev/sbus/bwtwo.c if (sc->sc_nscreens > 0)
sc 279 dev/sbus/bwtwo.c *cookiep = &sc->sc_sunfb.sf_ro;
sc 282 dev/sbus/bwtwo.c sc->sc_sunfb.sf_ro.ri_ops.alloc_attr(&sc->sc_sunfb.sf_ro,
sc 284 dev/sbus/bwtwo.c sc->sc_nscreens++;
sc 293 dev/sbus/bwtwo.c struct bwtwo_softc *sc = v;
sc 295 dev/sbus/bwtwo.c sc->sc_nscreens--;
sc 318 dev/sbus/bwtwo.c struct bwtwo_softc *sc = v;
sc 323 dev/sbus/bwtwo.c if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize)
sc 324 dev/sbus/bwtwo.c return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr,
sc 344 dev/sbus/bwtwo.c struct bwtwo_softc *sc = vsc;
sc 349 dev/sbus/bwtwo.c fbc = FBC_READ(sc, FBC_CTRL);
sc 357 dev/sbus/bwtwo.c FBC_WRITE(sc, FBC_CTRL, fbc);
sc 116 dev/sbus/cgsix.c struct cgsix_softc *sc = (struct cgsix_softc *)self;
sc 123 dev/sbus/cgsix.c sc->sc_bustag = sa->sa_bustag;
sc 124 dev/sbus/cgsix.c sc->sc_paddr = sbus_bus_addr(sa->sa_bustag, sa->sa_slot, sa->sa_offset);
sc 131 dev/sbus/cgsix.c fb_setsize(&sc->sc_sunfb, 8, 1152, 900, node, 0);
sc 138 dev/sbus/cgsix.c CGSIX_BT_SIZE, 0, 0, &sc->sc_bt_regs) != 0) {
sc 145 dev/sbus/cgsix.c CGSIX_FHC_SIZE, 0, 0, &sc->sc_fhc_regs) != 0) {
sc 152 dev/sbus/cgsix.c CGSIX_THC_SIZE, 0, 0, &sc->sc_thc_regs) != 0) {
sc 159 dev/sbus/cgsix.c sc->sc_sunfb.sf_fbsize, BUS_SPACE_MAP_LINEAR,
sc 160 dev/sbus/cgsix.c 0, &sc->sc_vid_regs) != 0) {
sc 167 dev/sbus/cgsix.c CGSIX_TEC_SIZE, 0, 0, &sc->sc_tec_regs) != 0) {
sc 174 dev/sbus/cgsix.c CGSIX_FBC_SIZE, 0, 0, &sc->sc_fbc_regs) != 0) {
sc 179 dev/sbus/cgsix.c if ((sc->sc_ih = bus_intr_establish(sa->sa_bustag, sa->sa_pri,
sc 180 dev/sbus/cgsix.c IPL_TTY, 0, cgsix_intr, sc, self->dv_xname)) == NULL) {
sc 187 dev/sbus/cgsix.c cgsix_hardreset(sc);
sc 196 dev/sbus/cgsix.c fhc = FHC_READ(sc);
sc 198 dev/sbus/cgsix.c cgsix_reset(sc, rev);
sc 200 dev/sbus/cgsix.c cgsix_burner(sc, 1, 0);
sc 202 dev/sbus/cgsix.c sc->sc_sunfb.sf_ro.ri_bits = (void *)bus_space_vaddr(sc->sc_bustag,
sc 203 dev/sbus/cgsix.c sc->sc_vid_regs);
sc 204 dev/sbus/cgsix.c sc->sc_sunfb.sf_ro.ri_hw = sc;
sc 205 dev/sbus/cgsix.c fbwscons_init(&sc->sc_sunfb, console ? 0 : RI_CLEAR);
sc 214 dev/sbus/cgsix.c sc->sc_sunfb.sf_dev.dv_cfdata->cf_flags |= CG6_CFFLAG_NOACCEL;
sc 216 dev/sbus/cgsix.c if ((sc->sc_sunfb.sf_dev.dv_cfdata->cf_flags & CG6_CFFLAG_NOACCEL)
sc 218 dev/sbus/cgsix.c sc->sc_sunfb.sf_ro.ri_ops.copyrows = cgsix_ras_copyrows;
sc 219 dev/sbus/cgsix.c sc->sc_sunfb.sf_ro.ri_ops.copycols = cgsix_ras_copycols;
sc 220 dev/sbus/cgsix.c sc->sc_sunfb.sf_ro.ri_ops.eraserows = cgsix_ras_eraserows;
sc 221 dev/sbus/cgsix.c sc->sc_sunfb.sf_ro.ri_ops.erasecols = cgsix_ras_erasecols;
sc 222 dev/sbus/cgsix.c sc->sc_sunfb.sf_ro.ri_do_cursor = cgsix_ras_do_cursor;
sc 223 dev/sbus/cgsix.c cgsix_ras_init(sc);
sc 226 dev/sbus/cgsix.c printf(", %dx%d, rev %d\n", sc->sc_sunfb.sf_width,
sc 227 dev/sbus/cgsix.c sc->sc_sunfb.sf_height, rev);
sc 229 dev/sbus/cgsix.c fbwscons_setcolormap(&sc->sc_sunfb, cgsix_setcolor);
sc 232 dev/sbus/cgsix.c fbwscons_console_init(&sc->sc_sunfb, -1);
sc 235 dev/sbus/cgsix.c fbwscons_attach(&sc->sc_sunfb, &cgsix_accessops, console);
sc 240 dev/sbus/cgsix.c bus_space_unmap(sa->sa_bustag, sc->sc_tec_regs, CGSIX_TEC_SIZE);
sc 242 dev/sbus/cgsix.c bus_space_unmap(sa->sa_bustag, sc->sc_vid_regs, sc->sc_sunfb.sf_fbsize);
sc 244 dev/sbus/cgsix.c bus_space_unmap(sa->sa_bustag, sc->sc_thc_regs, CGSIX_THC_SIZE);
sc 246 dev/sbus/cgsix.c bus_space_unmap(sa->sa_bustag, sc->sc_fhc_regs, CGSIX_FHC_SIZE);
sc 248 dev/sbus/cgsix.c bus_space_unmap(sa->sa_bustag, sc->sc_bt_regs, CGSIX_BT_SIZE);
sc 257 dev/sbus/cgsix.c struct cgsix_softc *sc = v;
sc 272 dev/sbus/cgsix.c if ((sc->sc_sunfb.sf_dev.dv_cfdata->cf_flags &
sc 274 dev/sbus/cgsix.c if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL &&
sc 276 dev/sbus/cgsix.c cgsix_ras_init(sc);
sc 278 dev/sbus/cgsix.c sc->sc_mode = mode;
sc 282 dev/sbus/cgsix.c wdf->height = sc->sc_sunfb.sf_height;
sc 283 dev/sbus/cgsix.c wdf->width = sc->sc_sunfb.sf_width;
sc 284 dev/sbus/cgsix.c wdf->depth = sc->sc_sunfb.sf_depth;
sc 288 dev/sbus/cgsix.c *(u_int *)data = sc->sc_sunfb.sf_linebytes;
sc 292 dev/sbus/cgsix.c error = cg6_bt_getcmap(&sc->sc_cmap, cm);
sc 298 dev/sbus/cgsix.c error = cg6_bt_putcmap(&sc->sc_cmap, cm);
sc 302 dev/sbus/cgsix.c if (sc->sc_ih != NULL)
sc 303 dev/sbus/cgsix.c cgsix_loadcmap_deferred(sc, cm->index, cm->count);
sc 305 dev/sbus/cgsix.c cgsix_loadcmap_immediate(sc, cm->index, cm->count);
sc 309 dev/sbus/cgsix.c return (cgsix_setcursor(sc, curs));
sc 313 dev/sbus/cgsix.c curs->enable = sc->sc_curs_enabled;
sc 315 dev/sbus/cgsix.c curs->pos.x = sc->sc_curs_pos.x;
sc 316 dev/sbus/cgsix.c curs->pos.y = sc->sc_curs_pos.y;
sc 319 dev/sbus/cgsix.c curs->hot.x = sc->sc_curs_hot.x;
sc 320 dev/sbus/cgsix.c curs->hot.y = sc->sc_curs_hot.y;
sc 325 dev/sbus/cgsix.c r[0] = sc->sc_curs_fg >> 16;
sc 326 dev/sbus/cgsix.c g[0] = sc->sc_curs_fg >> 8;
sc 327 dev/sbus/cgsix.c b[0] = sc->sc_curs_fg >> 0;
sc 328 dev/sbus/cgsix.c r[1] = sc->sc_curs_bg >> 16;
sc 329 dev/sbus/cgsix.c g[1] = sc->sc_curs_bg >> 8;
sc 330 dev/sbus/cgsix.c b[1] = sc->sc_curs_bg >> 0;
sc 344 dev/sbus/cgsix.c curs->size.x = sc->sc_curs_size.x;
sc 345 dev/sbus/cgsix.c curs->size.y = sc->sc_curs_size.y;
sc 346 dev/sbus/cgsix.c l = (sc->sc_curs_size.x * sc->sc_curs_size.y) / NBBY;
sc 347 dev/sbus/cgsix.c error = copyout(sc->sc_curs_image, curs->image, l);
sc 350 dev/sbus/cgsix.c error = copyout(sc->sc_curs_mask, curs->mask, l);
sc 357 dev/sbus/cgsix.c pos->x = sc->sc_curs_pos.x;
sc 358 dev/sbus/cgsix.c pos->y = sc->sc_curs_pos.y;
sc 363 dev/sbus/cgsix.c sc->sc_curs_pos.x = pos->x;
sc 364 dev/sbus/cgsix.c sc->sc_curs_pos.y = pos->y;
sc 365 dev/sbus/cgsix.c cgsix_updatecursor(sc, WSDISPLAY_CURSOR_DOPOS);
sc 383 dev/sbus/cgsix.c cgsix_setcursor(struct cgsix_softc *sc, struct wsdisplay_cursor *curs)
sc 426 dev/sbus/cgsix.c sc->sc_curs_enabled = curs->enable;
sc 428 dev/sbus/cgsix.c sc->sc_curs_pos.x = curs->pos.x;
sc 429 dev/sbus/cgsix.c sc->sc_curs_pos.y = curs->pos.y;
sc 432 dev/sbus/cgsix.c sc->sc_curs_hot.x = curs->hot.x;
sc 433 dev/sbus/cgsix.c sc->sc_curs_hot.y = curs->hot.y;
sc 436 dev/sbus/cgsix.c sc->sc_curs_fg = ((r[0] << 16) | (g[0] << 8) | (b[0] << 0));
sc 437 dev/sbus/cgsix.c sc->sc_curs_bg = ((r[1] << 16) | (g[1] << 8) | (b[1] << 0));
sc 440 dev/sbus/cgsix.c sc->sc_curs_size.x = curs->size.x;
sc 441 dev/sbus/cgsix.c sc->sc_curs_size.y = curs->size.y;
sc 442 dev/sbus/cgsix.c bcopy(image, sc->sc_curs_image, imcount);
sc 443 dev/sbus/cgsix.c bcopy(mask, sc->sc_curs_mask, imcount);
sc 446 dev/sbus/cgsix.c cgsix_updatecursor(sc, curs->which);
sc 453 dev/sbus/cgsix.c cgsix_updatecursor(struct cgsix_softc *sc, u_int which)
sc 456 dev/sbus/cgsix.c BT_WRITE(sc, BT_ADDR, BT_OV1 << 24);
sc 457 dev/sbus/cgsix.c BT_WRITE(sc, BT_OMAP,
sc 458 dev/sbus/cgsix.c ((sc->sc_curs_fg & 0x00ff0000) >> 16) << 24);
sc 459 dev/sbus/cgsix.c BT_WRITE(sc, BT_OMAP,
sc 460 dev/sbus/cgsix.c ((sc->sc_curs_fg & 0x0000ff00) >> 8) << 24);
sc 461 dev/sbus/cgsix.c BT_WRITE(sc, BT_OMAP,
sc 462 dev/sbus/cgsix.c ((sc->sc_curs_fg & 0x000000ff) >> 0) << 24);
sc 464 dev/sbus/cgsix.c BT_WRITE(sc, BT_ADDR, BT_OV3 << 24);
sc 465 dev/sbus/cgsix.c BT_WRITE(sc, BT_OMAP,
sc 466 dev/sbus/cgsix.c ((sc->sc_curs_bg & 0x00ff0000) >> 16) << 24);
sc 467 dev/sbus/cgsix.c BT_WRITE(sc, BT_OMAP,
sc 468 dev/sbus/cgsix.c ((sc->sc_curs_bg & 0x0000ff00) >> 8) << 24);
sc 469 dev/sbus/cgsix.c BT_WRITE(sc, BT_OMAP,
sc 470 dev/sbus/cgsix.c ((sc->sc_curs_bg & 0x000000ff) >> 0) << 24);
sc 476 dev/sbus/cgsix.c x = sc->sc_curs_pos.x + CG6_MAX_CURSOR - sc->sc_curs_hot.x;
sc 477 dev/sbus/cgsix.c y = sc->sc_curs_pos.y + CG6_MAX_CURSOR - sc->sc_curs_hot.y;
sc 478 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_CURSXY,
sc 486 dev/sbus/cgsix.c if (sc->sc_curs_enabled) {
sc 487 dev/sbus/cgsix.c BT_WRITE(sc, BT_ADDR, BT_CR << 24);
sc 488 dev/sbus/cgsix.c c = BT_READ(sc, BT_CTRL);
sc 490 dev/sbus/cgsix.c BT_WRITE(sc, BT_CTRL, c);
sc 492 dev/sbus/cgsix.c BT_WRITE(sc, BT_ADDR, BT_CR << 24);
sc 493 dev/sbus/cgsix.c c = BT_READ(sc, BT_CTRL);
sc 495 dev/sbus/cgsix.c BT_WRITE(sc, BT_CTRL, c);
sc 496 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_CURSXY, THC_CURSOFF);
sc 507 dev/sbus/cgsix.c struct cgsix_softc *sc = v;
sc 509 dev/sbus/cgsix.c if (sc->sc_nscreens > 0)
sc 512 dev/sbus/cgsix.c *cookiep = &sc->sc_sunfb.sf_ro;
sc 515 dev/sbus/cgsix.c sc->sc_sunfb.sf_ro.ri_ops.alloc_attr(&sc->sc_sunfb.sf_ro,
sc 517 dev/sbus/cgsix.c sc->sc_nscreens++;
sc 524 dev/sbus/cgsix.c struct cgsix_softc *sc = v;
sc 526 dev/sbus/cgsix.c sc->sc_nscreens--;
sc 545 dev/sbus/cgsix.c struct cgsix_softc *sc = v;
sc 567 dev/sbus/cgsix.c switch (sc->sc_mode) {
sc 573 dev/sbus/cgsix.c sz = mo->mo_size ? mo->mo_size : sc->sc_sunfb.sf_fbsize;
sc 575 dev/sbus/cgsix.c return (bus_space_mmap(sc->sc_bustag,
sc 576 dev/sbus/cgsix.c sc->sc_paddr, u + mo->mo_physoff,
sc 584 dev/sbus/cgsix.c if (off >= 0 && off < sc->sc_sunfb.sf_fbsize)
sc 585 dev/sbus/cgsix.c return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr,
sc 647 dev/sbus/cgsix.c cgsix_loadcmap_deferred(struct cgsix_softc *sc, u_int start, u_int ncolors)
sc 651 dev/sbus/cgsix.c thcm = THC_READ(sc, CG6_THC_MISC);
sc 654 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_MISC, thcm);
sc 658 dev/sbus/cgsix.c cgsix_loadcmap_immediate(struct cgsix_softc *sc, u_int start, u_int ncolors)
sc 666 dev/sbus/cgsix.c BT_WRITE(sc, BT_ADDR, BT_D4M4(start) << 24);
sc 668 dev/sbus/cgsix.c v = sc->sc_cmap.cm_chip[cstart];
sc 669 dev/sbus/cgsix.c BT_WRITE(sc, BT_CMAP, v << 0);
sc 670 dev/sbus/cgsix.c BT_WRITE(sc, BT_CMAP, v << 8);
sc 671 dev/sbus/cgsix.c BT_WRITE(sc, BT_CMAP, v << 16);
sc 672 dev/sbus/cgsix.c BT_WRITE(sc, BT_CMAP, v << 24);
sc 680 dev/sbus/cgsix.c struct cgsix_softc *sc = v;
sc 681 dev/sbus/cgsix.c union bt_cmap *bcm = &sc->sc_cmap;
sc 686 dev/sbus/cgsix.c cgsix_loadcmap_immediate(sc, index, 1);
sc 690 dev/sbus/cgsix.c cgsix_reset(struct cgsix_softc *sc, u_int32_t fhcrev)
sc 695 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_CURSXY, THC_CURSOFF);
sc 697 dev/sbus/cgsix.c TEC_WRITE(sc, CG6_TEC_MV, 0);
sc 698 dev/sbus/cgsix.c TEC_WRITE(sc, CG6_TEC_CLIP, 0);
sc 699 dev/sbus/cgsix.c TEC_WRITE(sc, CG6_TEC_VDC, 0);
sc 707 dev/sbus/cgsix.c fhc = FHC_READ(sc);
sc 713 dev/sbus/cgsix.c FHC_WRITE(sc, fhc);
sc 717 dev/sbus/cgsix.c BT_WRITE(sc, BT_ADDR, BT_CR << 24);
sc 718 dev/sbus/cgsix.c BT_WRITE(sc, BT_CTRL, BT_READ(sc, BT_CTRL) |
sc 723 dev/sbus/cgsix.c cgsix_hardreset(struct cgsix_softc *sc)
sc 728 dev/sbus/cgsix.c BT_WRITE(sc, BT_ADDR, BT_RMR << 24);
sc 729 dev/sbus/cgsix.c BT_BARRIER(sc, BT_ADDR, BUS_SPACE_BARRIER_WRITE);
sc 730 dev/sbus/cgsix.c BT_WRITE(sc, BT_CTRL, 0xff << 24);
sc 731 dev/sbus/cgsix.c BT_BARRIER(sc, BT_CTRL, BUS_SPACE_BARRIER_WRITE);
sc 734 dev/sbus/cgsix.c BT_WRITE(sc, BT_ADDR, BT_BMR << 24);
sc 735 dev/sbus/cgsix.c BT_BARRIER(sc, BT_ADDR, BUS_SPACE_BARRIER_WRITE);
sc 736 dev/sbus/cgsix.c BT_WRITE(sc, BT_CTRL, 0x00 << 24);
sc 737 dev/sbus/cgsix.c BT_BARRIER(sc, BT_CTRL, BUS_SPACE_BARRIER_WRITE);
sc 743 dev/sbus/cgsix.c BT_WRITE(sc, BT_ADDR, BT_CR << 24);
sc 744 dev/sbus/cgsix.c BT_BARRIER(sc, BT_ADDR, BUS_SPACE_BARRIER_WRITE);
sc 745 dev/sbus/cgsix.c BT_WRITE(sc, BT_CTRL,
sc 747 dev/sbus/cgsix.c BT_BARRIER(sc, BT_CTRL, BUS_SPACE_BARRIER_WRITE);
sc 750 dev/sbus/cgsix.c BT_WRITE(sc, BT_ADDR, BT_CTR << 24);
sc 751 dev/sbus/cgsix.c BT_BARRIER(sc, BT_ADDR, BUS_SPACE_BARRIER_WRITE);
sc 752 dev/sbus/cgsix.c BT_WRITE(sc, BT_CTRL, 0x00 << 24);
sc 753 dev/sbus/cgsix.c BT_BARRIER(sc, BT_CTRL, BUS_SPACE_BARRIER_WRITE);
sc 756 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_MISC, THC_MISC_RESET | THC_MISC_INTR |
sc 758 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_MISC, THC_MISC_INTR | THC_MISC_CYCLS);
sc 760 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_HSYNC1, 0x10009);
sc 761 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_HSYNC2, 0x570000);
sc 762 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_HSYNC3, 0x15005d);
sc 763 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_VSYNC1, 0x10005);
sc 764 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_VSYNC2, 0x2403a8);
sc 765 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_REFRESH, 0x16b);
sc 767 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_MISC, THC_MISC_RESET | THC_MISC_INTR |
sc 769 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_MISC, THC_MISC_INTR | THC_MISC_CYCLS);
sc 772 dev/sbus/cgsix.c fhc = FHC_READ(sc);
sc 780 dev/sbus/cgsix.c FHC_WRITE(sc, fhc);
sc 786 dev/sbus/cgsix.c struct cgsix_softc *sc = vsc;
sc 791 dev/sbus/cgsix.c thcm = THC_READ(sc, CG6_THC_MISC);
sc 799 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_MISC, thcm);
sc 806 dev/sbus/cgsix.c struct cgsix_softc *sc = vsc;
sc 809 dev/sbus/cgsix.c thcm = THC_READ(sc, CG6_THC_MISC);
sc 819 dev/sbus/cgsix.c THC_WRITE(sc, CG6_THC_MISC, thcm);
sc 820 dev/sbus/cgsix.c cgsix_loadcmap_immediate(sc, 0, 256);
sc 825 dev/sbus/cgsix.c cgsix_ras_init(struct cgsix_softc *sc)
sc 829 dev/sbus/cgsix.c CG6_DRAIN(sc);
sc 830 dev/sbus/cgsix.c m = FBC_READ(sc, CG6_FBC_MODE);
sc 833 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_MODE, m);
sc 840 dev/sbus/cgsix.c struct cgsix_softc *sc = ri->ri_hw;
sc 862 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIP, 0);
sc 863 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_S, 0);
sc 864 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_OFFX, 0);
sc 865 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_OFFY, 0);
sc 866 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMINX, 0);
sc 867 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMINY, 0);
sc 868 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMAXX, ri->ri_width - 1);
sc 869 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMAXY, ri->ri_height - 1);
sc 870 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ALU, FBC_ALU_COPY);
sc 871 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_X0, ri->ri_xorigin);
sc 872 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_Y0, ri->ri_yorigin + src);
sc 873 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_X1, ri->ri_xorigin + ri->ri_emuwidth - 1);
sc 874 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_Y1, ri->ri_yorigin + src + n - 1);
sc 875 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_X2, ri->ri_xorigin);
sc 876 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_Y2, ri->ri_yorigin + dst);
sc 877 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_X3, ri->ri_xorigin + ri->ri_emuwidth - 1);
sc 878 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_Y3, ri->ri_yorigin + dst + n - 1);
sc 879 dev/sbus/cgsix.c CG6_BLIT_WAIT(sc);
sc 880 dev/sbus/cgsix.c CG6_DRAIN(sc);
sc 887 dev/sbus/cgsix.c struct cgsix_softc *sc = ri->ri_hw;
sc 912 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIP, 0);
sc 913 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_S, 0);
sc 914 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_OFFX, 0);
sc 915 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_OFFY, 0);
sc 916 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMINX, 0);
sc 917 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMINY, 0);
sc 918 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMAXX, ri->ri_width - 1);
sc 919 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMAXY, ri->ri_height - 1);
sc 920 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ALU, FBC_ALU_COPY);
sc 921 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_X0, ri->ri_xorigin + src);
sc 922 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_Y0, ri->ri_yorigin + row);
sc 923 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_X1, ri->ri_xorigin + src + n - 1);
sc 924 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_Y1,
sc 926 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_X2, ri->ri_xorigin + dst);
sc 927 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_Y2, ri->ri_yorigin + row);
sc 928 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_X3, ri->ri_xorigin + dst + n - 1);
sc 929 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_Y3,
sc 931 dev/sbus/cgsix.c CG6_BLIT_WAIT(sc);
sc 932 dev/sbus/cgsix.c CG6_DRAIN(sc);
sc 939 dev/sbus/cgsix.c struct cgsix_softc *sc = ri->ri_hw;
sc 958 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIP, 0);
sc 959 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_S, 0);
sc 960 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_OFFX, 0);
sc 961 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_OFFY, 0);
sc 962 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMINX, 0);
sc 963 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMINY, 0);
sc 964 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMAXX, ri->ri_width - 1);
sc 965 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMAXY, ri->ri_height - 1);
sc 966 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ALU, FBC_ALU_FILL);
sc 967 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_FG, ri->ri_devcmap[bg]);
sc 968 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTY, ri->ri_yorigin + row);
sc 969 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTX, ri->ri_xorigin + col);
sc 970 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTY,
sc 972 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTX, ri->ri_xorigin + col + n - 1);
sc 973 dev/sbus/cgsix.c CG6_DRAW_WAIT(sc);
sc 974 dev/sbus/cgsix.c CG6_DRAIN(sc);
sc 981 dev/sbus/cgsix.c struct cgsix_softc *sc = ri->ri_hw;
sc 995 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIP, 0);
sc 996 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_S, 0);
sc 997 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_OFFX, 0);
sc 998 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_OFFY, 0);
sc 999 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMINX, 0);
sc 1000 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMINY, 0);
sc 1001 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMAXX, ri->ri_width - 1);
sc 1002 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMAXY, ri->ri_height - 1);
sc 1003 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ALU, FBC_ALU_FILL);
sc 1004 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_FG, ri->ri_devcmap[bg]);
sc 1006 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTY, 0);
sc 1007 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTX, 0);
sc 1008 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTY, ri->ri_height - 1);
sc 1009 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTX, ri->ri_width - 1);
sc 1012 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTY, ri->ri_yorigin + row);
sc 1013 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTX, ri->ri_xorigin);
sc 1014 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTY,
sc 1016 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTX,
sc 1019 dev/sbus/cgsix.c CG6_DRAW_WAIT(sc);
sc 1020 dev/sbus/cgsix.c CG6_DRAIN(sc);
sc 1026 dev/sbus/cgsix.c struct cgsix_softc *sc = ri->ri_hw;
sc 1031 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIP, 0);
sc 1032 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_S, 0);
sc 1033 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_OFFX, 0);
sc 1034 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_OFFY, 0);
sc 1035 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMINX, 0);
sc 1036 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMINY, 0);
sc 1037 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMAXX, ri->ri_width - 1);
sc 1038 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_CLIPMAXY, ri->ri_height - 1);
sc 1039 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ALU, FBC_ALU_FLIP);
sc 1040 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTY, ri->ri_yorigin + row);
sc 1041 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTX, ri->ri_xorigin + col);
sc 1042 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTY,
sc 1044 dev/sbus/cgsix.c FBC_WRITE(sc, CG6_FBC_ARECTX,
sc 1046 dev/sbus/cgsix.c CG6_DRAW_WAIT(sc);
sc 1047 dev/sbus/cgsix.c CG6_DRAIN(sc);
sc 294 dev/sbus/cgsixreg.h #define THC_READ(sc,r) \
sc 295 dev/sbus/cgsixreg.h bus_space_read_4((sc)->sc_bustag, (sc)->sc_thc_regs, (r))
sc 296 dev/sbus/cgsixreg.h #define THC_WRITE(sc,r,v) \
sc 297 dev/sbus/cgsixreg.h bus_space_write_4((sc)->sc_bustag, (sc)->sc_thc_regs, (r), (v))
sc 299 dev/sbus/cgsixreg.h #define TEC_READ(sc,r) \
sc 300 dev/sbus/cgsixreg.h bus_space_read_4((sc)->sc_bustag, (sc)->sc_tec_regs, (r))
sc 301 dev/sbus/cgsixreg.h #define TEC_WRITE(sc,r,v) \
sc 302 dev/sbus/cgsixreg.h bus_space_write_4((sc)->sc_bustag, (sc)->sc_tec_regs, (r), (v))
sc 304 dev/sbus/cgsixreg.h #define FHC_READ(sc) \
sc 305 dev/sbus/cgsixreg.h bus_space_read_4((sc)->sc_bustag, (sc)->sc_fhc_regs, CG6_FHC)
sc 306 dev/sbus/cgsixreg.h #define FHC_WRITE(sc,v) \
sc 307 dev/sbus/cgsixreg.h bus_space_write_4((sc)->sc_bustag, (sc)->sc_fhc_regs, CG6_FHC, (v))
sc 309 dev/sbus/cgsixreg.h #define FBC_READ(sc,r) \
sc 310 dev/sbus/cgsixreg.h bus_space_read_4((sc)->sc_bustag, (sc)->sc_fbc_regs, (r))
sc 311 dev/sbus/cgsixreg.h #define FBC_WRITE(sc,r,v) \
sc 312 dev/sbus/cgsixreg.h bus_space_write_4((sc)->sc_bustag, (sc)->sc_fbc_regs, (r), (v))
sc 314 dev/sbus/cgsixreg.h #define BT_WRITE(sc, reg, val) \
sc 315 dev/sbus/cgsixreg.h bus_space_write_4((sc)->sc_bustag, (sc)->sc_bt_regs, (reg), (val))
sc 316 dev/sbus/cgsixreg.h #define BT_READ(sc, reg) \
sc 317 dev/sbus/cgsixreg.h bus_space_read_4((sc)->sc_bustag, (sc)->sc_bt_regs, (reg))
sc 318 dev/sbus/cgsixreg.h #define BT_BARRIER(sc,reg,flags) \
sc 319 dev/sbus/cgsixreg.h bus_space_barrier((sc)->sc_bustag, (sc)->sc_bt_regs, (reg), \
sc 322 dev/sbus/cgsixreg.h #define CG6_BLIT_WAIT(sc) \
sc 323 dev/sbus/cgsixreg.h while ((FBC_READ(sc, CG6_FBC_BLIT) & \
sc 326 dev/sbus/cgsixreg.h #define CG6_DRAW_WAIT(sc) \
sc 327 dev/sbus/cgsixreg.h while ((FBC_READ(sc, CG6_FBC_DRAW) & \
sc 330 dev/sbus/cgsixreg.h #define CG6_DRAIN(sc) \
sc 331 dev/sbus/cgsixreg.h while (FBC_READ(sc, CG6_FBC_S) & FBC_S_GXINPROGRESS)
sc 75 dev/sbus/cgthree.c #define BT_WRITE(sc, reg, val) \
sc 76 dev/sbus/cgthree.c bus_space_write_4((sc)->sc_bustag, (sc)->sc_ctrl_regs, (reg), (val))
sc 77 dev/sbus/cgthree.c #define BT_READ(sc, reg) \
sc 78 dev/sbus/cgthree.c bus_space_read_4((sc)->sc_bustag, (sc)->sc_ctrl_regs, (reg))
sc 79 dev/sbus/cgthree.c #define BT_BARRIER(sc,reg,flags) \
sc 80 dev/sbus/cgthree.c bus_space_barrier((sc)->sc_bustag, (sc)->sc_ctrl_regs, (reg), \
sc 114 dev/sbus/cgthree.c #define FBC_READ(sc, reg) \
sc 115 dev/sbus/cgthree.c bus_space_read_1((sc)->sc_bustag, (sc)->sc_ctrl_regs, (reg))
sc 116 dev/sbus/cgthree.c #define FBC_WRITE(sc, reg, val) \
sc 117 dev/sbus/cgthree.c bus_space_write_1((sc)->sc_bustag, (sc)->sc_ctrl_regs, (reg), (val))
sc 209 dev/sbus/cgthree.c struct cgthree_softc *sc = (struct cgthree_softc *)self;
sc 215 dev/sbus/cgthree.c sc->sc_bustag = sa->sa_bustag;
sc 216 dev/sbus/cgthree.c sc->sc_paddr = sbus_bus_addr(sa->sa_bustag, sa->sa_slot, sa->sa_offset);
sc 218 dev/sbus/cgthree.c fb_setsize(&sc->sc_sunfb, 8, 1152, 900, node, 0);
sc 230 dev/sbus/cgthree.c CGTHREE_CTRL_SIZE, 0, 0, &sc->sc_ctrl_regs) != 0) {
sc 237 dev/sbus/cgthree.c sc->sc_sunfb.sf_fbsize, BUS_SPACE_MAP_LINEAR,
sc 238 dev/sbus/cgthree.c 0, &sc->sc_vid_regs) != 0) {
sc 250 dev/sbus/cgthree.c cgthree_reset(sc);
sc 251 dev/sbus/cgthree.c cgthree_burner(sc, 1, 0);
sc 253 dev/sbus/cgthree.c sc->sc_sunfb.sf_ro.ri_bits = (void *)bus_space_vaddr(sc->sc_bustag,
sc 254 dev/sbus/cgthree.c sc->sc_vid_regs);
sc 255 dev/sbus/cgthree.c sc->sc_sunfb.sf_ro.ri_hw = sc;
sc 257 dev/sbus/cgthree.c printf(", %dx%d\n", sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height);
sc 271 dev/sbus/cgthree.c fbwscons_init(&sc->sc_sunfb, console &&
sc 272 dev/sbus/cgthree.c (sc->sc_sunfb.sf_width >= 1024) ? 0 : RI_CLEAR);
sc 274 dev/sbus/cgthree.c fbwscons_setcolormap(&sc->sc_sunfb, cgthree_setcolor);
sc 277 dev/sbus/cgthree.c fbwscons_console_init(&sc->sc_sunfb,
sc 278 dev/sbus/cgthree.c sc->sc_sunfb.sf_width >= 1024 ? -1 : 0);
sc 281 dev/sbus/cgthree.c fbwscons_attach(&sc->sc_sunfb, &cgthree_accessops, console);
sc 286 dev/sbus/cgthree.c bus_space_unmap(sa->sa_bustag, sc->sc_ctrl_regs, CGTHREE_CTRL_SIZE);
sc 295 dev/sbus/cgthree.c struct cgthree_softc *sc = v;
sc 305 dev/sbus/cgthree.c sc->sc_mode = *(u_int *)data;
sc 309 dev/sbus/cgthree.c wdf->height = sc->sc_sunfb.sf_height;
sc 310 dev/sbus/cgthree.c wdf->width = sc->sc_sunfb.sf_width;
sc 311 dev/sbus/cgthree.c wdf->depth = sc->sc_sunfb.sf_depth;
sc 315 dev/sbus/cgthree.c *(u_int *)data = sc->sc_sunfb.sf_linebytes;
sc 320 dev/sbus/cgthree.c error = cg3_bt_getcmap(&sc->sc_cmap, cm);
sc 327 dev/sbus/cgthree.c error = cg3_bt_putcmap(&sc->sc_cmap, cm);
sc 330 dev/sbus/cgthree.c cgthree_loadcmap(sc, cm->index, cm->count);
sc 353 dev/sbus/cgthree.c struct cgthree_softc *sc = v;
sc 355 dev/sbus/cgthree.c if (sc->sc_nscreens > 0)
sc 358 dev/sbus/cgthree.c *cookiep = &sc->sc_sunfb.sf_ro;
sc 361 dev/sbus/cgthree.c sc->sc_sunfb.sf_ro.ri_ops.alloc_attr(&sc->sc_sunfb.sf_ro,
sc 363 dev/sbus/cgthree.c sc->sc_nscreens++;
sc 370 dev/sbus/cgthree.c struct cgthree_softc *sc = v;
sc 372 dev/sbus/cgthree.c sc->sc_nscreens--;
sc 388 dev/sbus/cgthree.c struct cgthree_softc *sc = v;
sc 393 dev/sbus/cgthree.c switch (sc->sc_mode) {
sc 401 dev/sbus/cgthree.c if (offset >= sc->sc_sunfb.sf_fbsize)
sc 403 dev/sbus/cgthree.c return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr,
sc 406 dev/sbus/cgthree.c if (offset < sc->sc_sunfb.sf_fbsize)
sc 407 dev/sbus/cgthree.c return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr,
sc 426 dev/sbus/cgthree.c struct cgthree_softc *sc = v;
sc 427 dev/sbus/cgthree.c union bt_cmap *bcm = &sc->sc_cmap;
sc 432 dev/sbus/cgthree.c cgthree_loadcmap(sc, index, 1);
sc 436 dev/sbus/cgthree.c cgthree_loadcmap(struct cgthree_softc *sc, u_int start, u_int ncolors)
sc 443 dev/sbus/cgthree.c BT_WRITE(sc, BT_ADDR, BT_D4M4(start));
sc 445 dev/sbus/cgthree.c BT_WRITE(sc, BT_CMAP, sc->sc_cmap.cm_chip[cstart]);
sc 495 dev/sbus/cgthree.c cgthree_reset(struct cgthree_softc *sc)
sc 500 dev/sbus/cgthree.c sts = FBC_READ(sc, CG3_FBC_STAT);
sc 501 dev/sbus/cgthree.c ctrl = FBC_READ(sc, CG3_FBC_CTRL);
sc 513 dev/sbus/cgthree.c FBC_WRITE(sc, CG3_FBC_VCTRL + j,
sc 518 dev/sbus/cgthree.c FBC_WRITE(sc, CG3_FBC_CTRL, ctrl);
sc 524 dev/sbus/cgthree.c BT_WRITE(sc, BT_ADDR, BT_RMR);
sc 525 dev/sbus/cgthree.c BT_BARRIER(sc, BT_ADDR, BUS_SPACE_BARRIER_WRITE);
sc 526 dev/sbus/cgthree.c BT_WRITE(sc, BT_CTRL, 0xff);
sc 527 dev/sbus/cgthree.c BT_BARRIER(sc, BT_CTRL, BUS_SPACE_BARRIER_WRITE);
sc 530 dev/sbus/cgthree.c BT_WRITE(sc, BT_ADDR, BT_BMR);
sc 531 dev/sbus/cgthree.c BT_BARRIER(sc, BT_ADDR, BUS_SPACE_BARRIER_WRITE);
sc 532 dev/sbus/cgthree.c BT_WRITE(sc, BT_CTRL, 0x00);
sc 533 dev/sbus/cgthree.c BT_BARRIER(sc, BT_CTRL, BUS_SPACE_BARRIER_WRITE);
sc 539 dev/sbus/cgthree.c BT_WRITE(sc, BT_ADDR, BT_CR);
sc 540 dev/sbus/cgthree.c BT_BARRIER(sc, BT_ADDR, BUS_SPACE_BARRIER_WRITE);
sc 541 dev/sbus/cgthree.c BT_WRITE(sc, BT_CTRL,
sc 543 dev/sbus/cgthree.c BT_BARRIER(sc, BT_CTRL, BUS_SPACE_BARRIER_WRITE);
sc 546 dev/sbus/cgthree.c BT_WRITE(sc, BT_ADDR, BT_CTR);
sc 547 dev/sbus/cgthree.c BT_BARRIER(sc, BT_ADDR, BUS_SPACE_BARRIER_WRITE);
sc 548 dev/sbus/cgthree.c BT_WRITE(sc, BT_CTRL, 0x00);
sc 549 dev/sbus/cgthree.c BT_BARRIER(sc, BT_CTRL, BUS_SPACE_BARRIER_WRITE);
sc 555 dev/sbus/cgthree.c struct cgthree_softc *sc = vsc;
sc 560 dev/sbus/cgthree.c fbc = FBC_READ(sc, CG3_FBC_CTRL);
sc 568 dev/sbus/cgthree.c FBC_WRITE(sc, CG3_FBC_CTRL, fbc);
sc 101 dev/sbus/cgtwelve.c static __inline__ void cgtwelve_ramdac_wraddr(struct cgtwelve_softc *sc,
sc 149 dev/sbus/cgtwelve.c struct cgtwelve_softc *sc = (struct cgtwelve_softc *)self;
sc 172 dev/sbus/cgtwelve.c sc->sc_bustag = bt;
sc 183 dev/sbus/cgtwelve.c sc->sc_dpu = bus_space_vaddr(bt, bh);
sc 190 dev/sbus/cgtwelve.c sc->sc_apu = bus_space_vaddr(bt, bh);
sc 197 dev/sbus/cgtwelve.c sc->sc_ramdac = bus_space_vaddr(bt, bh);
sc 203 dev/sbus/cgtwelve.c fb_setsize(&sc->sc_sunfb, 1, CG12_WIDTH, CG12_HEIGHT,
sc 205 dev/sbus/cgtwelve.c sc->sc_sunfb.sf_depth = 1;
sc 206 dev/sbus/cgtwelve.c sc->sc_sunfb.sf_linebytes = sc->sc_sunfb.sf_width / 8;
sc 207 dev/sbus/cgtwelve.c sc->sc_sunfb.sf_fbsize = sc->sc_sunfb.sf_height *
sc 208 dev/sbus/cgtwelve.c sc->sc_sunfb.sf_linebytes;
sc 210 dev/sbus/cgtwelve.c sc->sc_highres = sc->sc_sunfb.sf_width == CG12_WIDTH_HR;
sc 216 dev/sbus/cgtwelve.c (sc->sc_highres ? CG12_OFF_OVERLAY0_HR : CG12_OFF_OVERLAY0),
sc 217 dev/sbus/cgtwelve.c round_page(sc->sc_highres ? CG12_SIZE_OVERLAY_HR :
sc 222 dev/sbus/cgtwelve.c sc->sc_overlay = bus_space_vaddr(bt, bh);
sc 224 dev/sbus/cgtwelve.c (sc->sc_highres ? CG12_OFF_INTEN_HR : CG12_OFF_INTEN),
sc 225 dev/sbus/cgtwelve.c round_page(sc->sc_highres ? CG12_SIZE_COLOR24_HR :
sc 230 dev/sbus/cgtwelve.c sc->sc_inten = bus_space_vaddr(bt, bh);
sc 231 dev/sbus/cgtwelve.c sc->sc_paddr = sbus_bus_addr(bt, sa->sa_slot, sa->sa_offset +
sc 232 dev/sbus/cgtwelve.c (sc->sc_highres ? CG12_OFF_INTEN_HR : CG12_OFF_INTEN));
sc 235 dev/sbus/cgtwelve.c sc->sc_sunfb.sf_depth = 0; /* force action */
sc 236 dev/sbus/cgtwelve.c cgtwelve_reset(sc, 1);
sc 238 dev/sbus/cgtwelve.c sc->sc_sunfb.sf_ro.ri_bits = (void *)sc->sc_overlay;
sc 239 dev/sbus/cgtwelve.c sc->sc_sunfb.sf_ro.ri_hw = sc;
sc 240 dev/sbus/cgtwelve.c fbwscons_init(&sc->sc_sunfb, isconsole ? 0 : RI_CLEAR);
sc 243 dev/sbus/cgtwelve.c fbwscons_console_init(&sc->sc_sunfb, -1);
sc 244 dev/sbus/cgtwelve.c shutdownhook_establish(cgtwelve_prom, sc);
sc 248 dev/sbus/cgtwelve.c sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height);
sc 254 dev/sbus/cgtwelve.c fbwscons_attach(&sc->sc_sunfb, &cgtwelve_accessops, isconsole);
sc 260 dev/sbus/cgtwelve.c struct cgtwelve_softc *sc = dev;
sc 274 dev/sbus/cgtwelve.c wdf->height = sc->sc_sunfb.sf_height;
sc 275 dev/sbus/cgtwelve.c wdf->width = sc->sc_sunfb.sf_width;
sc 283 dev/sbus/cgtwelve.c *(u_int *)data = sc->sc_sunfb.sf_linebytes * 32;
sc 293 dev/sbus/cgtwelve.c cgtwelve_reset(sc, 1);
sc 296 dev/sbus/cgtwelve.c cgtwelve_reset(sc, 32);
sc 315 dev/sbus/cgtwelve.c cgtwelve_reset(struct cgtwelve_softc *sc, int depth)
sc 319 dev/sbus/cgtwelve.c if (sc->sc_sunfb.sf_depth != depth) {
sc 324 dev/sbus/cgtwelve.c sc->sc_apu->hpage = sc->sc_highres ?
sc 326 dev/sbus/cgtwelve.c sc->sc_apu->haccess = CG12_HACCESS_ENABLE;
sc 327 dev/sbus/cgtwelve.c sc->sc_dpu->pln_sl_host = CG12_PLN_SL_ENABLE;
sc 328 dev/sbus/cgtwelve.c sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_ENABLE;
sc 329 dev/sbus/cgtwelve.c sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_ENABLE;
sc 331 dev/sbus/cgtwelve.c memset((void *)sc->sc_overlay, 0xff, sc->sc_highres ?
sc 337 dev/sbus/cgtwelve.c sc->sc_apu->hpage = sc->sc_highres ?
sc 339 dev/sbus/cgtwelve.c sc->sc_apu->haccess = CG12_HACCESS_OVERLAY;
sc 340 dev/sbus/cgtwelve.c sc->sc_dpu->pln_sl_host = CG12_PLN_SL_OVERLAY;
sc 341 dev/sbus/cgtwelve.c sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_OVERLAY;
sc 342 dev/sbus/cgtwelve.c sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_OVERLAY;
sc 349 dev/sbus/cgtwelve.c cgtwelve_ramdac_wraddr(sc, 0);
sc 350 dev/sbus/cgtwelve.c sc->sc_ramdac->color = 0x00000000;
sc 352 dev/sbus/cgtwelve.c sc->sc_ramdac->color = 0x00ffffff;
sc 357 dev/sbus/cgtwelve.c sc->sc_apu->hpage = sc->sc_highres ?
sc 359 dev/sbus/cgtwelve.c sc->sc_apu->haccess = CG12_HACCESS_OVERLAY;
sc 360 dev/sbus/cgtwelve.c sc->sc_dpu->pln_sl_host = CG12_PLN_SL_OVERLAY;
sc 361 dev/sbus/cgtwelve.c sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_OVERLAY;
sc 362 dev/sbus/cgtwelve.c sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_OVERLAY;
sc 371 dev/sbus/cgtwelve.c bzero((void *)sc->sc_overlay, sc->sc_highres ?
sc 377 dev/sbus/cgtwelve.c sc->sc_apu->hpage = sc->sc_highres ?
sc 379 dev/sbus/cgtwelve.c sc->sc_apu->haccess = CG12_HACCESS_ENABLE;
sc 380 dev/sbus/cgtwelve.c sc->sc_dpu->pln_sl_host = CG12_PLN_SL_ENABLE;
sc 381 dev/sbus/cgtwelve.c sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_ENABLE;
sc 382 dev/sbus/cgtwelve.c sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_ENABLE;
sc 384 dev/sbus/cgtwelve.c bzero((void *)sc->sc_overlay, sc->sc_highres ?
sc 390 dev/sbus/cgtwelve.c sc->sc_apu->hpage = sc->sc_highres ?
sc 392 dev/sbus/cgtwelve.c sc->sc_apu->haccess = CG12_HACCESS_24BIT;
sc 393 dev/sbus/cgtwelve.c sc->sc_dpu->pln_sl_host = CG12_PLN_SL_24BIT;
sc 394 dev/sbus/cgtwelve.c sc->sc_dpu->pln_rd_msk_host = CG12_PLN_RD_24BIT;
sc 395 dev/sbus/cgtwelve.c sc->sc_dpu->pln_wr_msk_host = CG12_PLN_WR_24BIT;
sc 397 dev/sbus/cgtwelve.c memset((void *)sc->sc_inten, 0x00ffffff,
sc 398 dev/sbus/cgtwelve.c sc->sc_highres ?
sc 404 dev/sbus/cgtwelve.c cgtwelve_ramdac_wraddr(sc, 0);
sc 406 dev/sbus/cgtwelve.c sc->sc_ramdac->color = c | (c << 8) | (c << 16);
sc 410 dev/sbus/cgtwelve.c sc->sc_sunfb.sf_depth = depth;
sc 420 dev/sbus/cgtwelve.c struct cgtwelve_softc *sc = v;
sc 429 dev/sbus/cgtwelve.c if (offset < sc->sc_sunfb.sf_fbsize * 32) {
sc 430 dev/sbus/cgtwelve.c return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr, offset,
sc 441 dev/sbus/cgtwelve.c struct cgtwelve_softc *sc = v;
sc 443 dev/sbus/cgtwelve.c if (sc->sc_nscreens > 0)
sc 446 dev/sbus/cgtwelve.c *cookiep = &sc->sc_sunfb.sf_ro;
sc 449 dev/sbus/cgtwelve.c sc->sc_sunfb.sf_ro.ri_ops.alloc_attr(&sc->sc_sunfb.sf_ro,
sc 451 dev/sbus/cgtwelve.c sc->sc_nscreens++;
sc 458 dev/sbus/cgtwelve.c struct cgtwelve_softc *sc = v;
sc 460 dev/sbus/cgtwelve.c sc->sc_nscreens--;
sc 475 dev/sbus/cgtwelve.c cgtwelve_ramdac_wraddr(struct cgtwelve_softc *sc, u_int32_t addr)
sc 477 dev/sbus/cgtwelve.c sc->sc_ramdac->addr_lo = (addr & 0xff);
sc 478 dev/sbus/cgtwelve.c sc->sc_ramdac->addr_hi = ((addr >> 8) & 0xff);
sc 488 dev/sbus/cgtwelve.c struct cgtwelve_softc *sc = v;
sc 491 dev/sbus/cgtwelve.c if (sc->sc_sunfb.sf_depth != 1) {
sc 492 dev/sbus/cgtwelve.c cgtwelve_reset(sc, 1);
sc 115 dev/sbus/cs4231.c #define CS_WRITE(sc,r,v) \
sc 116 dev/sbus/cs4231.c bus_space_write_1((sc)->sc_bustag, (sc)->sc_regs, (r) << 2, (v))
sc 117 dev/sbus/cs4231.c #define CS_READ(sc,r) \
sc 118 dev/sbus/cs4231.c bus_space_read_1((sc)->sc_bustag, (sc)->sc_regs, (r) << 2)
sc 120 dev/sbus/cs4231.c #define APC_WRITE(sc,r,v) \
sc 121 dev/sbus/cs4231.c bus_space_write_4(sc->sc_bustag, sc->sc_regs, r, v)
sc 122 dev/sbus/cs4231.c #define APC_READ(sc,r) \
sc 123 dev/sbus/cs4231.c bus_space_read_4(sc->sc_bustag, sc->sc_regs, r)
sc 130 dev/sbus/cs4231.c void cs4231_setup_output(struct cs4231_softc *sc);
sc 212 dev/sbus/cs4231.c struct cs4231_softc *sc = (struct cs4231_softc *)self;
sc 219 dev/sbus/cs4231.c sc->sc_bustag = sa->sa_bustag;
sc 220 dev/sbus/cs4231.c sc->sc_dmatag = sa->sa_dmatag;
sc 234 dev/sbus/cs4231.c cs4231_intr, sc, self->dv_xname) == NULL) {
sc 244 dev/sbus/cs4231.c BUS_SPACE_MAP_LINEAR, 0, &sc->sc_regs) != 0) {
sc 255 dev/sbus/cs4231.c sc->sc_burst = burst & sbusburst;
sc 259 dev/sbus/cs4231.c audio_attach_mi(&cs4231_sa_hw_if, sc, &sc->sc_dev);
sc 262 dev/sbus/cs4231.c sc->sc_out_port = CSPORT_SPEAKER;
sc 263 dev/sbus/cs4231.c sc->sc_in_port = CSPORT_MICROPHONE;
sc 264 dev/sbus/cs4231.c sc->sc_mute[CSPORT_SPEAKER] = 1;
sc 265 dev/sbus/cs4231.c sc->sc_mute[CSPORT_MONITOR] = 1;
sc 266 dev/sbus/cs4231.c sc->sc_volume[CSPORT_SPEAKER].left = 192;
sc 267 dev/sbus/cs4231.c sc->sc_volume[CSPORT_SPEAKER].right = 192;
sc 274 dev/sbus/cs4231.c cs4231_write(struct cs4231_softc *sc, u_int8_t r, u_int8_t v)
sc 276 dev/sbus/cs4231.c CS_WRITE(sc, AD1848_IADDR, r);
sc 277 dev/sbus/cs4231.c CS_WRITE(sc, AD1848_IDATA, v);
sc 284 dev/sbus/cs4231.c cs4231_read(struct cs4231_softc *sc, u_int8_t r)
sc 286 dev/sbus/cs4231.c CS_WRITE(sc, AD1848_IADDR, r);
sc 287 dev/sbus/cs4231.c return (CS_READ(sc, AD1848_IDATA));
sc 291 dev/sbus/cs4231.c cs4231_set_speed(struct cs4231_softc *sc, u_long *argp)
sc 348 dev/sbus/cs4231.c sc->sc_speed_bits = speed_table[selected].bits;
sc 349 dev/sbus/cs4231.c sc->sc_need_commit = 1;
sc 361 dev/sbus/cs4231.c struct cs4231_softc *sc = vsc;
sc 364 dev/sbus/cs4231.c if (sc->sc_open)
sc 366 dev/sbus/cs4231.c sc->sc_open = 1;
sc 368 dev/sbus/cs4231.c sc->sc_capture.cs_intr = NULL;
sc 369 dev/sbus/cs4231.c sc->sc_capture.cs_arg = NULL;
sc 370 dev/sbus/cs4231.c sc->sc_capture.cs_locked = 0;
sc 372 dev/sbus/cs4231.c sc->sc_playback.cs_intr = NULL;
sc 373 dev/sbus/cs4231.c sc->sc_playback.cs_arg = NULL;
sc 374 dev/sbus/cs4231.c sc->sc_playback.cs_locked = 0;
sc 376 dev/sbus/cs4231.c APC_WRITE(sc, APC_CSR, APC_CSR_RESET);
sc 378 dev/sbus/cs4231.c APC_WRITE(sc, APC_CSR, 0);
sc 380 dev/sbus/cs4231.c APC_WRITE(sc, APC_CSR, APC_READ(sc, APC_CSR) | APC_CSR_CODEC_RESET);
sc 384 dev/sbus/cs4231.c APC_WRITE(sc, APC_CSR, APC_READ(sc, APC_CSR) & (~APC_CSR_CODEC_RESET));
sc 387 dev/sbus/cs4231.c tries && CS_READ(sc, AD1848_IADDR) == SP_IN_INIT; tries--)
sc 390 dev/sbus/cs4231.c printf("%s: timeout waiting for reset\n", sc->sc_dev.dv_xname);
sc 393 dev/sbus/cs4231.c cs4231_write(sc, SP_MISC_INFO,
sc 394 dev/sbus/cs4231.c cs4231_read(sc, SP_MISC_INFO) | MODE2);
sc 396 dev/sbus/cs4231.c cs4231_setup_output(sc);
sc 398 dev/sbus/cs4231.c cs4231_write(sc, SP_PIN_CONTROL,
sc 399 dev/sbus/cs4231.c cs4231_read(sc, SP_PIN_CONTROL) | INTERRUPT_ENABLE);
sc 405 dev/sbus/cs4231.c cs4231_setup_output(struct cs4231_softc *sc)
sc 409 dev/sbus/cs4231.c pc = cs4231_read(sc, SP_PIN_CONTROL) | CS_PC_HDPHMUTE | CS_PC_LINEMUTE;
sc 411 dev/sbus/cs4231.c mi = cs4231_read(sc, CS_MONO_IO_CONTROL) | MONO_OUTPUT_MUTE;
sc 413 dev/sbus/cs4231.c lm = cs4231_read(sc, SP_LEFT_OUTPUT_CONTROL);
sc 415 dev/sbus/cs4231.c lm |= ((~(sc->sc_volume[CSPORT_SPEAKER].left >> 2)) &
sc 418 dev/sbus/cs4231.c rm = cs4231_read(sc, SP_RIGHT_OUTPUT_CONTROL);
sc 420 dev/sbus/cs4231.c rm |= ((~(sc->sc_volume[CSPORT_SPEAKER].right >> 2)) &
sc 423 dev/sbus/cs4231.c if (sc->sc_mute[CSPORT_MONITOR]) {
sc 428 dev/sbus/cs4231.c switch (sc->sc_out_port) {
sc 430 dev/sbus/cs4231.c if (sc->sc_mute[CSPORT_SPEAKER])
sc 434 dev/sbus/cs4231.c if (sc->sc_mute[CSPORT_SPEAKER])
sc 438 dev/sbus/cs4231.c if (sc->sc_mute[CSPORT_SPEAKER])
sc 443 dev/sbus/cs4231.c cs4231_write(sc, SP_LEFT_OUTPUT_CONTROL, lm);
sc 444 dev/sbus/cs4231.c cs4231_write(sc, SP_RIGHT_OUTPUT_CONTROL, rm);
sc 445 dev/sbus/cs4231.c cs4231_write(sc, SP_PIN_CONTROL, pc);
sc 446 dev/sbus/cs4231.c cs4231_write(sc, CS_MONO_IO_CONTROL, mi);
sc 449 dev/sbus/cs4231.c switch (sc->sc_in_port) {
sc 464 dev/sbus/cs4231.c lm = cs4231_read(sc, SP_LEFT_INPUT_CONTROL);
sc 465 dev/sbus/cs4231.c rm = cs4231_read(sc, SP_RIGHT_INPUT_CONTROL);
sc 468 dev/sbus/cs4231.c lm |= pc | (sc->sc_adc.left >> 4);
sc 469 dev/sbus/cs4231.c rm |= pc | (sc->sc_adc.right >> 4);
sc 470 dev/sbus/cs4231.c cs4231_write(sc, SP_LEFT_INPUT_CONTROL, lm);
sc 471 dev/sbus/cs4231.c cs4231_write(sc, SP_RIGHT_INPUT_CONTROL, rm);
sc 477 dev/sbus/cs4231.c struct cs4231_softc *sc = vsc;
sc 479 dev/sbus/cs4231.c cs4231_halt_input(sc);
sc 480 dev/sbus/cs4231.c cs4231_halt_output(sc);
sc 481 dev/sbus/cs4231.c cs4231_write(sc, SP_PIN_CONTROL,
sc 482 dev/sbus/cs4231.c cs4231_read(sc, SP_PIN_CONTROL) & (~INTERRUPT_ENABLE));
sc 483 dev/sbus/cs4231.c sc->sc_open = 0;
sc 556 dev/sbus/cs4231.c struct cs4231_softc *sc = (struct cs4231_softc *)vsc;
sc 631 dev/sbus/cs4231.c err = cs4231_set_speed(sc, &p->sample_rate);
sc 638 dev/sbus/cs4231.c sc->sc_format_bits = bits;
sc 639 dev/sbus/cs4231.c sc->sc_channels = p->channels;
sc 640 dev/sbus/cs4231.c sc->sc_precision = p->precision;
sc 641 dev/sbus/cs4231.c sc->sc_need_commit = 1;
sc 654 dev/sbus/cs4231.c struct cs4231_softc *sc = (struct cs4231_softc *)vsc;
sc 658 dev/sbus/cs4231.c if (sc->sc_need_commit == 0)
sc 661 dev/sbus/cs4231.c fs = sc->sc_speed_bits | (sc->sc_format_bits << 5);
sc 662 dev/sbus/cs4231.c if (sc->sc_channels == 2)
sc 667 dev/sbus/cs4231.c r = cs4231_read(sc, SP_INTERFACE_CONFIG) | AUTO_CAL_ENABLE;
sc 668 dev/sbus/cs4231.c CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE);
sc 669 dev/sbus/cs4231.c CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE | SP_INTERFACE_CONFIG);
sc 670 dev/sbus/cs4231.c CS_WRITE(sc, AD1848_IDATA, r);
sc 672 dev/sbus/cs4231.c CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE | SP_CLOCK_DATA_FORMAT);
sc 673 dev/sbus/cs4231.c CS_WRITE(sc, AD1848_IDATA, fs);
sc 674 dev/sbus/cs4231.c CS_READ(sc, AD1848_IDATA);
sc 675 dev/sbus/cs4231.c CS_READ(sc, AD1848_IDATA);
sc 678 dev/sbus/cs4231.c tries && CS_READ(sc, AD1848_IADDR) == SP_IN_INIT; tries--)
sc 681 dev/sbus/cs4231.c printf("%s: timeout committing fspb\n", sc->sc_dev.dv_xname);
sc 683 dev/sbus/cs4231.c CS_WRITE(sc, AD1848_IADDR, MODE_CHANGE_ENABLE | CS_REC_FORMAT);
sc 684 dev/sbus/cs4231.c CS_WRITE(sc, AD1848_IDATA, fs);
sc 685 dev/sbus/cs4231.c CS_READ(sc, AD1848_IDATA);
sc 686 dev/sbus/cs4231.c CS_READ(sc, AD1848_IDATA);
sc 688 dev/sbus/cs4231.c tries && CS_READ(sc, AD1848_IADDR) == SP_IN_INIT; tries--)
sc 691 dev/sbus/cs4231.c printf("%s: timeout committing cdf\n", sc->sc_dev.dv_xname);
sc 693 dev/sbus/cs4231.c CS_WRITE(sc, AD1848_IADDR, 0);
sc 695 dev/sbus/cs4231.c tries && CS_READ(sc, AD1848_IADDR) == SP_IN_INIT; tries--)
sc 698 dev/sbus/cs4231.c printf("%s: timeout waiting for !mce\n", sc->sc_dev.dv_xname);
sc 700 dev/sbus/cs4231.c CS_WRITE(sc, AD1848_IADDR, SP_TEST_AND_INIT);
sc 702 dev/sbus/cs4231.c tries && CS_READ(sc, AD1848_IDATA) & AUTO_CAL_IN_PROG; tries--)
sc 706 dev/sbus/cs4231.c sc->sc_dev.dv_xname);
sc 710 dev/sbus/cs4231.c sc->sc_need_commit = 0;
sc 717 dev/sbus/cs4231.c struct cs4231_softc *sc = (struct cs4231_softc *)vsc;
sc 720 dev/sbus/cs4231.c APC_WRITE(sc, APC_CSR, APC_READ(sc, APC_CSR) &
sc 723 dev/sbus/cs4231.c cs4231_write(sc, SP_INTERFACE_CONFIG,
sc 724 dev/sbus/cs4231.c cs4231_read(sc, SP_INTERFACE_CONFIG) & (~PLAYBACK_ENABLE));
sc 725 dev/sbus/cs4231.c sc->sc_playback.cs_locked = 0;
sc 732 dev/sbus/cs4231.c struct cs4231_softc *sc = (struct cs4231_softc *)vsc;
sc 735 dev/sbus/cs4231.c APC_WRITE(sc, APC_CSR, APC_CSR_CAPTURE_PAUSE);
sc 736 dev/sbus/cs4231.c cs4231_write(sc, SP_INTERFACE_CONFIG,
sc 737 dev/sbus/cs4231.c cs4231_read(sc, SP_INTERFACE_CONFIG) & (~CAPTURE_ENABLE));
sc 738 dev/sbus/cs4231.c sc->sc_capture.cs_locked = 0;
sc 752 dev/sbus/cs4231.c struct cs4231_softc *sc = (struct cs4231_softc *)vsc;
sc 762 dev/sbus/cs4231.c cs4231_write(sc, SP_LEFT_AUX1_CONTROL,
sc 766 dev/sbus/cs4231.c cs4231_write(sc, SP_LEFT_AUX1_CONTROL,
sc 769 dev/sbus/cs4231.c cs4231_write(sc, SP_RIGHT_AUX1_CONTROL,
sc 780 dev/sbus/cs4231.c cs4231_write(sc, CS_LEFT_LINE_CONTROL,
sc 784 dev/sbus/cs4231.c cs4231_write(sc, CS_LEFT_LINE_CONTROL,
sc 787 dev/sbus/cs4231.c cs4231_write(sc, CS_RIGHT_LINE_CONTROL,
sc 799 dev/sbus/cs4231.c cs4231_write(sc, CS_MONO_IO_CONTROL,
sc 811 dev/sbus/cs4231.c cs4231_write(sc, SP_LEFT_AUX2_CONTROL,
sc 815 dev/sbus/cs4231.c cs4231_write(sc, SP_LEFT_AUX2_CONTROL,
sc 818 dev/sbus/cs4231.c cs4231_write(sc, SP_RIGHT_AUX2_CONTROL,
sc 829 dev/sbus/cs4231.c cs4231_write(sc, SP_DIGITAL_MIX,
sc 839 dev/sbus/cs4231.c sc->sc_volume[CSPORT_SPEAKER].left =
sc 841 dev/sbus/cs4231.c sc->sc_volume[CSPORT_SPEAKER].right =
sc 845 dev/sbus/cs4231.c sc->sc_volume[CSPORT_SPEAKER].left =
sc 847 dev/sbus/cs4231.c sc->sc_volume[CSPORT_SPEAKER].right =
sc 853 dev/sbus/cs4231.c cs4231_setup_output(sc);
sc 863 dev/sbus/cs4231.c sc->sc_out_port = cp->un.ord;
sc 864 dev/sbus/cs4231.c cs4231_setup_output(sc);
sc 870 dev/sbus/cs4231.c sc->sc_mute[CSPORT_LINEIN] = cp->un.ord ? 1 : 0;
sc 876 dev/sbus/cs4231.c sc->sc_mute[CSPORT_AUX1] = cp->un.ord ? 1 : 0;
sc 882 dev/sbus/cs4231.c sc->sc_mute[CSPORT_AUX2] = cp->un.ord ? 1 : 0;
sc 888 dev/sbus/cs4231.c sc->sc_mute[CSPORT_MONO] = cp->un.ord ? 1 : 0;
sc 894 dev/sbus/cs4231.c sc->sc_mute[CSPORT_MONITOR] = cp->un.ord ? 1 : 0;
sc 900 dev/sbus/cs4231.c sc->sc_mute[CSPORT_SPEAKER] = cp->un.ord ? 1 : 0;
sc 901 dev/sbus/cs4231.c cs4231_setup_output(sc);
sc 908 dev/sbus/cs4231.c sc->sc_adc.left =
sc 910 dev/sbus/cs4231.c sc->sc_adc.right =
sc 913 dev/sbus/cs4231.c sc->sc_adc.left =
sc 915 dev/sbus/cs4231.c sc->sc_adc.right =
sc 919 dev/sbus/cs4231.c cs4231_setup_output(sc);
sc 929 dev/sbus/cs4231.c sc->sc_in_port = cp->un.ord;
sc 931 dev/sbus/cs4231.c cs4231_setup_output(sc);
sc 942 dev/sbus/cs4231.c struct cs4231_softc *sc = (struct cs4231_softc *)vsc;
sc 953 dev/sbus/cs4231.c cs4231_read(sc, SP_LEFT_AUX1_CONTROL) &
sc 957 dev/sbus/cs4231.c cs4231_read(sc, SP_LEFT_AUX1_CONTROL) &
sc 960 dev/sbus/cs4231.c cs4231_read(sc, SP_RIGHT_AUX1_CONTROL) &
sc 971 dev/sbus/cs4231.c cs4231_read(sc, CS_LEFT_LINE_CONTROL) & AUX_INPUT_ATTEN_BITS;
sc 974 dev/sbus/cs4231.c cs4231_read(sc, CS_LEFT_LINE_CONTROL) & AUX_INPUT_ATTEN_BITS;
sc 976 dev/sbus/cs4231.c cs4231_read(sc, CS_RIGHT_LINE_CONTROL) & AUX_INPUT_ATTEN_BITS;
sc 987 dev/sbus/cs4231.c cs4231_read(sc, CS_MONO_IO_CONTROL) &
sc 999 dev/sbus/cs4231.c cs4231_read(sc, SP_LEFT_AUX2_CONTROL) &
sc 1003 dev/sbus/cs4231.c cs4231_read(sc, SP_LEFT_AUX2_CONTROL) &
sc 1006 dev/sbus/cs4231.c cs4231_read(sc, SP_RIGHT_AUX2_CONTROL) &
sc 1019 dev/sbus/cs4231.c cs4231_read(sc, SP_DIGITAL_MIX) >> 2;
sc 1027 dev/sbus/cs4231.c sc->sc_volume[CSPORT_SPEAKER].left;
sc 1030 dev/sbus/cs4231.c sc->sc_volume[CSPORT_SPEAKER].left;
sc 1032 dev/sbus/cs4231.c sc->sc_volume[CSPORT_SPEAKER].right;
sc 1041 dev/sbus/cs4231.c cp->un.ord = sc->sc_mute[CSPORT_LINEIN] ? 1 : 0;
sc 1047 dev/sbus/cs4231.c cp->un.ord = sc->sc_mute[CSPORT_AUX1] ? 1 : 0;
sc 1053 dev/sbus/cs4231.c cp->un.ord = sc->sc_mute[CSPORT_AUX2] ? 1 : 0;
sc 1059 dev/sbus/cs4231.c cp->un.ord = sc->sc_mute[CSPORT_MONO] ? 1 : 0;
sc 1065 dev/sbus/cs4231.c cp->un.ord = sc->sc_mute[CSPORT_MONITOR] ? 1 : 0;
sc 1071 dev/sbus/cs4231.c cp->un.ord = sc->sc_mute[CSPORT_SPEAKER] ? 1 : 0;
sc 1079 dev/sbus/cs4231.c sc->sc_adc.left;
sc 1082 dev/sbus/cs4231.c sc->sc_adc.left;
sc 1084 dev/sbus/cs4231.c sc->sc_adc.right;
sc 1092 dev/sbus/cs4231.c cp->un.ord = sc->sc_in_port;
sc 1098 dev/sbus/cs4231.c cp->un.ord = sc->sc_out_port;
sc 1316 dev/sbus/cs4231.c struct cs4231_softc *sc = (struct cs4231_softc *)vsc;
sc 1322 dev/sbus/cs4231.c csr = APC_READ(sc, APC_CSR);
sc 1323 dev/sbus/cs4231.c APC_WRITE(sc, APC_CSR, csr);
sc 1326 dev/sbus/cs4231.c printf("%s: error interrupt\n", sc->sc_dev.dv_xname);
sc 1337 dev/sbus/cs4231.c status = CS_READ(sc, AD1848_STATUS);
sc 1339 dev/sbus/cs4231.c reg = cs4231_read(sc, CS_IRQ_STATUS);
sc 1341 dev/sbus/cs4231.c cs4231_write(sc, SP_LOWER_BASE_COUNT, 0xff);
sc 1342 dev/sbus/cs4231.c cs4231_write(sc, SP_UPPER_BASE_COUNT, 0xff);
sc 1345 dev/sbus/cs4231.c cs4231_write(sc, CS_LOWER_REC_CNT, 0xff);
sc 1346 dev/sbus/cs4231.c cs4231_write(sc, CS_UPPER_REC_CNT, 0xff);
sc 1348 dev/sbus/cs4231.c CS_WRITE(sc, AD1848_STATUS, 0);
sc 1358 dev/sbus/cs4231.c struct cs_channel *chan = &sc->sc_playback;
sc 1367 dev/sbus/cs4231.c nextaddr = APC_READ(sc, APC_PNVA) + chan->cs_blksz;
sc 1373 dev/sbus/cs4231.c APC_WRITE(sc, APC_PNVA, nextaddr);
sc 1374 dev/sbus/cs4231.c APC_WRITE(sc, APC_PNC, togo);
sc 1383 dev/sbus/cs4231.c struct cs_channel *chan = &sc->sc_capture;
sc 1393 dev/sbus/cs4231.c nextaddr = APC_READ(sc, APC_CNVA) +
sc 1400 dev/sbus/cs4231.c APC_WRITE(sc, APC_CNVA, nextaddr);
sc 1401 dev/sbus/cs4231.c APC_WRITE(sc, APC_CNC, togo);
sc 1420 dev/sbus/cs4231.c struct cs4231_softc *sc = (struct cs4231_softc *)vsc;
sc 1421 dev/sbus/cs4231.c bus_dma_tag_t dmat = sc->sc_dmatag;
sc 1447 dev/sbus/cs4231.c p->next = sc->sc_dmas;
sc 1448 dev/sbus/cs4231.c sc->sc_dmas = p;
sc 1465 dev/sbus/cs4231.c struct cs4231_softc *sc = vsc;
sc 1466 dev/sbus/cs4231.c bus_dma_tag_t dmat = sc->sc_dmatag;
sc 1469 dev/sbus/cs4231.c for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &(*pp)->next) {
sc 1480 dev/sbus/cs4231.c printf("%s: attempt to free rogue pointer\n", sc->sc_dev.dv_xname);
sc 1487 dev/sbus/cs4231.c struct cs4231_softc *sc = vsc;
sc 1488 dev/sbus/cs4231.c struct cs_channel *chan = &sc->sc_playback;
sc 1495 dev/sbus/cs4231.c sc->sc_dev.dv_xname);
sc 1503 dev/sbus/cs4231.c for (p = sc->sc_dmas; p->addr != start; p = p->next)
sc 1507 dev/sbus/cs4231.c sc->sc_dev.dv_xname, start);
sc 1526 dev/sbus/cs4231.c csr = APC_READ(sc, APC_CSR);
sc 1528 dev/sbus/cs4231.c APC_WRITE(sc, APC_PNVA, (u_long)p->dmamap->dm_segs[0].ds_addr);
sc 1529 dev/sbus/cs4231.c APC_WRITE(sc, APC_PNC, (u_long)n);
sc 1532 dev/sbus/cs4231.c APC_WRITE(sc, APC_CSR,
sc 1533 dev/sbus/cs4231.c APC_READ(sc, APC_CSR) & ~(APC_CSR_PIE | APC_CSR_PPAUSE));
sc 1534 dev/sbus/cs4231.c APC_WRITE(sc, APC_CSR, APC_READ(sc, APC_CSR) |
sc 1537 dev/sbus/cs4231.c cs4231_write(sc, SP_LOWER_BASE_COUNT, 0xff);
sc 1538 dev/sbus/cs4231.c cs4231_write(sc, SP_UPPER_BASE_COUNT, 0xff);
sc 1539 dev/sbus/cs4231.c cs4231_write(sc, SP_INTERFACE_CONFIG,
sc 1540 dev/sbus/cs4231.c cs4231_read(sc, SP_INTERFACE_CONFIG) | PLAYBACK_ENABLE);
sc 1549 dev/sbus/cs4231.c struct cs4231_softc *sc = vsc;
sc 1550 dev/sbus/cs4231.c struct cs_channel *chan = &sc->sc_capture;
sc 1557 dev/sbus/cs4231.c sc->sc_dev.dv_xname);
sc 1564 dev/sbus/cs4231.c for (p = sc->sc_dmas; p->addr != start; p = p->next)
sc 1568 dev/sbus/cs4231.c sc->sc_dev.dv_xname, start);
sc 1586 dev/sbus/cs4231.c APC_WRITE(sc, APC_CNVA, p->dmamap->dm_segs[0].ds_addr);
sc 1587 dev/sbus/cs4231.c APC_WRITE(sc, APC_CNC, (u_long)n);
sc 1589 dev/sbus/cs4231.c csr = APC_READ(sc, APC_CSR);
sc 1594 dev/sbus/cs4231.c APC_WRITE(sc, APC_CSR, csr);
sc 1595 dev/sbus/cs4231.c cs4231_write(sc, CS_LOWER_REC_CNT, 0xff);
sc 1596 dev/sbus/cs4231.c cs4231_write(sc, CS_UPPER_REC_CNT, 0xff);
sc 1597 dev/sbus/cs4231.c cs4231_write(sc, SP_INTERFACE_CONFIG,
sc 1598 dev/sbus/cs4231.c cs4231_read(sc, SP_INTERFACE_CONFIG) | CAPTURE_ENABLE);
sc 1601 dev/sbus/cs4231.c if (APC_READ(sc, APC_CSR) & APC_CSR_CD) {
sc 1610 dev/sbus/cs4231.c nextaddr = APC_READ(sc, APC_CNVA) + chan->cs_blksz;
sc 1616 dev/sbus/cs4231.c APC_WRITE(sc, APC_CNVA, nextaddr);
sc 1617 dev/sbus/cs4231.c APC_WRITE(sc, APC_CNC, togo);
sc 106 dev/sbus/dma_sbus.c static bus_space_tag_t dma_alloc_bustag(struct dma_softc *sc);
sc 129 dev/sbus/dma_sbus.c struct dma_softc *sc = t->cookie;
sc 131 dev/sbus/dma_sbus.c sa->sa_bustag = sc->sc_lsi64854.sc_bustag; /* XXX */
sc 154 dev/sbus/dma_sbus.c struct lsi64854_softc *sc = &dsc->sc_lsi64854;
sc 162 dev/sbus/dma_sbus.c sc->sc_bustag = sa->sa_bustag;
sc 163 dev/sbus/dma_sbus.c sc->sc_dmatag = sa->sa_dmatag;
sc 182 dev/sbus/dma_sbus.c sc->sc_regs = bh;
sc 200 dev/sbus/dma_sbus.c sc->sc_burst = (burst & SBUS_BURST_32) ? 32 :
sc 203 dev/sbus/dma_sbus.c if (sc->sc_dev.dv_cfdata->cf_attach == &ledma_ca) {
sc 214 dev/sbus/dma_sbus.c csr = L64854_GCSR(sc);
sc 223 dev/sbus/dma_sbus.c L64854_SCSR(sc, csr);
sc 225 dev/sbus/dma_sbus.c sc->sc_channel = L64854_CHANNEL_ENET;
sc 227 dev/sbus/dma_sbus.c sc->sc_channel = L64854_CHANNEL_SCSI;
sc 231 dev/sbus/dma_sbus.c if (lsi64854_attach(sc) != 0)
sc 238 dev/sbus/dma_sbus.c sbt, sc->sc_dmatag, node, &sa);
sc 239 dev/sbus/dma_sbus.c (void) config_found(&sc->sc_dev, (void *)&sa, dmaprint_sbus);
sc 255 dev/sbus/dma_sbus.c struct lsi64854_softc *sc = t->cookie;
sc 258 dev/sbus/dma_sbus.c if (sc->sc_channel == L64854_CHANNEL_ENET) {
sc 259 dev/sbus/dma_sbus.c sc->sc_intrchain = handler;
sc 260 dev/sbus/dma_sbus.c sc->sc_intrchainarg = arg;
sc 262 dev/sbus/dma_sbus.c arg = sc;
sc 278 dev/sbus/dma_sbus.c dma_alloc_bustag(struct dma_softc *sc)
sc 287 dev/sbus/dma_sbus.c sbt->cookie = sc;
sc 288 dev/sbus/dma_sbus.c sbt->parent = sc->sc_lsi64854.sc_bustag;
sc 170 dev/sbus/esp_sbus.c struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
sc 178 dev/sbus/esp_sbus.c sc->sc_id = getpropint(sa->sa_node, "initiator-id", 7);
sc 179 dev/sbus/esp_sbus.c sc->sc_freq = getpropint(sa->sa_node, "clock-frequency", -1);
sc 180 dev/sbus/esp_sbus.c if (sc->sc_freq < 0)
sc 181 dev/sbus/esp_sbus.c sc->sc_freq = sa->sa_frequency;
sc 185 dev/sbus/esp_sbus.c self->dv_xname, sc->sc_id, sc->sc_freq);
sc 218 dev/sbus/esp_sbus.c bcopy(sc->sc_dev.dv_xname, lsc->sc_dev.dv_xname,
sc 257 dev/sbus/esp_sbus.c lsc->sc_client = sc;
sc 295 dev/sbus/esp_sbus.c getdevunit("dma", sc->sc_dev.dv_unit - esp_unit_offset);
sc 301 dev/sbus/esp_sbus.c esc->sc_dma->sc_client = sc;
sc 357 dev/sbus/esp_sbus.c struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
sc 367 dev/sbus/esp_sbus.c sc->sc_id = getpropint(sa->sa_node, "initiator-id", 7);
sc 368 dev/sbus/esp_sbus.c sc->sc_freq = getpropint(sa->sa_node, "clock-frequency", -1);
sc 371 dev/sbus/esp_sbus.c esc->sc_dma->sc_client = sc;
sc 415 dev/sbus/esp_sbus.c struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
sc 422 dev/sbus/esp_sbus.c sc->sc_glue = gluep;
sc 425 dev/sbus/esp_sbus.c sc->sc_freq /= 1000000;
sc 438 dev/sbus/esp_sbus.c sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB;
sc 439 dev/sbus/esp_sbus.c sc->sc_cfg2 = NCRCFG2_SCSI2 | NCRCFG2_RPE;
sc 440 dev/sbus/esp_sbus.c sc->sc_cfg3 = NCRCFG3_CDB;
sc 441 dev/sbus/esp_sbus.c NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
sc 443 dev/sbus/esp_sbus.c if ((NCR_READ_REG(sc, NCR_CFG2) & ~NCRCFG2_RSVD) !=
sc 445 dev/sbus/esp_sbus.c sc->sc_rev = NCR_VARIANT_ESP100;
sc 447 dev/sbus/esp_sbus.c sc->sc_cfg2 = NCRCFG2_SCSI2;
sc 448 dev/sbus/esp_sbus.c NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
sc 449 dev/sbus/esp_sbus.c sc->sc_cfg3 = 0;
sc 450 dev/sbus/esp_sbus.c NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
sc 451 dev/sbus/esp_sbus.c sc->sc_cfg3 = (NCRCFG3_CDB | NCRCFG3_FCLK);
sc 452 dev/sbus/esp_sbus.c NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
sc 453 dev/sbus/esp_sbus.c if (NCR_READ_REG(sc, NCR_CFG3) !=
sc 455 dev/sbus/esp_sbus.c sc->sc_rev = NCR_VARIANT_ESP100A;
sc 458 dev/sbus/esp_sbus.c sc->sc_cfg2 |= NCRCFG2_FE;
sc 459 dev/sbus/esp_sbus.c sc->sc_cfg3 = 0;
sc 460 dev/sbus/esp_sbus.c NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
sc 461 dev/sbus/esp_sbus.c sc->sc_rev = NCR_VARIANT_ESP200;
sc 464 dev/sbus/esp_sbus.c uid = NCR_READ_REG(sc, NCR_UID);
sc 466 dev/sbus/esp_sbus.c sc->sc_rev = NCR_VARIANT_FAS366;
sc 471 dev/sbus/esp_sbus.c printf("espattach: revision %d, uid 0x%x\n", sc->sc_rev, uid);
sc 489 dev/sbus/esp_sbus.c sc->sc_minsync = 1000 / sc->sc_freq;
sc 496 dev/sbus/esp_sbus.c switch (sc->sc_rev) {
sc 498 dev/sbus/esp_sbus.c sc->sc_maxxfer = 64 * 1024;
sc 499 dev/sbus/esp_sbus.c sc->sc_minsync = 0; /* No synch on old chip? */
sc 503 dev/sbus/esp_sbus.c sc->sc_maxxfer = 64 * 1024;
sc 505 dev/sbus/esp_sbus.c sc->sc_minsync = ncr53c9x_cpb2stp(sc, 5);
sc 510 dev/sbus/esp_sbus.c sc->sc_maxxfer = 16 * 1024 * 1024;
sc 517 dev/sbus/esp_sbus.c ncr53c9x_intr, sc, sc->sc_dev.dv_xname);
sc 520 dev/sbus/esp_sbus.c if (sc->sc_rev != NCR_VARIANT_FAS366)
sc 521 dev/sbus/esp_sbus.c sc->sc_features |= NCR_F_DMASELECT;
sc 524 dev/sbus/esp_sbus.c ncr53c9x_attach(sc, &esp_switch, &esp_dev);
sc 580 dev/sbus/esp_sbus.c esp_read_reg(struct ncr53c9x_softc *sc, int reg)
sc 582 dev/sbus/esp_sbus.c struct esp_softc *esc = (struct esp_softc *)sc;
sc 595 dev/sbus/esp_sbus.c esp_write_reg(struct ncr53c9x_softc *sc, int reg, u_char v)
sc 597 dev/sbus/esp_sbus.c struct esp_softc *esc = (struct esp_softc *)sc;
sc 608 dev/sbus/esp_sbus.c esp_rdreg1(struct ncr53c9x_softc *sc, int reg)
sc 610 dev/sbus/esp_sbus.c struct esp_softc *esc = (struct esp_softc *)sc;
sc 616 dev/sbus/esp_sbus.c esp_wrreg1(struct ncr53c9x_softc *sc, int reg, u_char v)
sc 618 dev/sbus/esp_sbus.c struct esp_softc *esc = (struct esp_softc *)sc;
sc 624 dev/sbus/esp_sbus.c esp_dma_isintr(struct ncr53c9x_softc *sc)
sc 626 dev/sbus/esp_sbus.c struct esp_softc *esc = (struct esp_softc *)sc;
sc 632 dev/sbus/esp_sbus.c esp_dma_reset(struct ncr53c9x_softc *sc)
sc 634 dev/sbus/esp_sbus.c struct esp_softc *esc = (struct esp_softc *)sc;
sc 640 dev/sbus/esp_sbus.c esp_dma_intr(struct ncr53c9x_softc *sc)
sc 642 dev/sbus/esp_sbus.c struct esp_softc *esc = (struct esp_softc *)sc;
sc 648 dev/sbus/esp_sbus.c esp_dma_setup(struct ncr53c9x_softc *sc, caddr_t *addr, size_t *len,
sc 651 dev/sbus/esp_sbus.c struct esp_softc *esc = (struct esp_softc *)sc;
sc 657 dev/sbus/esp_sbus.c esp_dma_go(struct ncr53c9x_softc *sc)
sc 659 dev/sbus/esp_sbus.c struct esp_softc *esc = (struct esp_softc *)sc;
sc 665 dev/sbus/esp_sbus.c esp_dma_stop(struct ncr53c9x_softc *sc)
sc 667 dev/sbus/esp_sbus.c struct esp_softc *esc = (struct esp_softc *)sc;
sc 676 dev/sbus/esp_sbus.c esp_dma_isactive(struct ncr53c9x_softc *sc)
sc 678 dev/sbus/esp_sbus.c struct esp_softc *esc = (struct esp_softc *)sc;
sc 692 dev/sbus/esp_sbus.c struct ncr53c9x_softc *sc;
sc 698 dev/sbus/esp_sbus.c sc = (struct ncr53c9x_softc *)
sc 700 dev/sbus/esp_sbus.c if (!sc) continue;
sc 703 dev/sbus/esp_sbus.c u, sc->sc_nexus, sc->sc_phase, sc->sc_prevphase,
sc 704 dev/sbus/esp_sbus.c sc->sc_dp, sc->sc_dleft, sc->sc_msgify);
sc 706 dev/sbus/esp_sbus.c sc->sc_msgout, sc->sc_msgpriq, sc->sc_imess[0],
sc 707 dev/sbus/esp_sbus.c sc->sc_imess[1], sc->sc_imess[2], sc->sc_imess[3],
sc 708 dev/sbus/esp_sbus.c sc->sc_imess[0]);
sc 710 dev/sbus/esp_sbus.c TAILQ_FOREACH(ecb, &sc->ready_list, chain) {
sc 720 dev/sbus/esp_sbus.c LIST_FOREACH(li, &sc->sc_tinfo[t].luns, link) {
sc 106 dev/sbus/if_gem_sbus.c struct gem_softc *sc = &gsc->gsc_gem;
sc 111 dev/sbus/if_gem_sbus.c sc->sc_bustag = sa->sa_bustag;
sc 112 dev/sbus/if_gem_sbus.c sc->sc_dmatag = sa->sa_dmatag;
sc 130 dev/sbus/if_gem_sbus.c &sc->sc_h2) != 0) {
sc 137 dev/sbus/if_gem_sbus.c &sc->sc_h1) != 0) {
sc 143 dev/sbus/if_gem_sbus.c sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0)
sc 144 dev/sbus/if_gem_sbus.c myetheraddr(sc->sc_arpcom.ac_enaddr);
sc 149 dev/sbus/if_gem_sbus.c bus_space_write_4(sa->sa_bustag, sc->sc_h2, GEM_SBUS_CONFIG,
sc 155 dev/sbus/if_gem_sbus.c gem_intr, sc, self->dv_xname);
sc 157 dev/sbus/if_gem_sbus.c gem_config(sc);
sc 101 dev/sbus/if_hme_sbus.c struct hme_softc *sc = &hsc->hsc_hme;
sc 110 dev/sbus/if_hme_sbus.c sc->sc_bustag = sa->sa_bustag;
sc 111 dev/sbus/if_hme_sbus.c sc->sc_dmatag = sa->sa_dmatag;
sc 131 dev/sbus/if_hme_sbus.c (bus_size_t)sa->sa_reg[0].sbr_size, 0, 0, &sc->sc_seb) != 0) {
sc 137 dev/sbus/if_hme_sbus.c (bus_size_t)sa->sa_reg[1].sbr_size, 0, 0, &sc->sc_etx) != 0) {
sc 143 dev/sbus/if_hme_sbus.c (bus_size_t)sa->sa_reg[2].sbr_size, 0, 0, &sc->sc_erx) != 0) {
sc 149 dev/sbus/if_hme_sbus.c (bus_size_t)sa->sa_reg[3].sbr_size, 0, 0, &sc->sc_mac) != 0) {
sc 155 dev/sbus/if_hme_sbus.c (bus_size_t)sa->sa_reg[4].sbr_size, 0, 0, &sc->sc_mif) != 0) {
sc 161 dev/sbus/if_hme_sbus.c sc->sc_arpcom.ac_enaddr, ETHER_ADDR_LEN) <= 0)
sc 162 dev/sbus/if_hme_sbus.c myetheraddr(sc->sc_arpcom.ac_enaddr);
sc 182 dev/sbus/if_hme_sbus.c sc->sc_burst = 64;
sc 184 dev/sbus/if_hme_sbus.c sc->sc_burst = 32;
sc 186 dev/sbus/if_hme_sbus.c sc->sc_burst = 16;
sc 188 dev/sbus/if_hme_sbus.c sc->sc_burst = 0;
sc 190 dev/sbus/if_hme_sbus.c sc->sc_pci = 0; /* XXXXX should all be done in bus_dma. */
sc 195 dev/sbus/if_hme_sbus.c hme_intr, sc, self->dv_xname);
sc 197 dev/sbus/if_hme_sbus.c hme_config(sc);
sc 99 dev/sbus/if_le.c le_sbus_wrcsr(struct am7990_softc *sc, u_int16_t port, u_int16_t val)
sc 101 dev/sbus/if_le.c struct le_softc *lesc = (struct le_softc *)sc;
sc 125 dev/sbus/if_le.c le_sbus_rdcsr(struct am7990_softc *sc, u_int16_t port)
sc 127 dev/sbus/if_le.c struct le_softc *lesc = (struct le_softc *)sc;
sc 150 dev/sbus/if_le.c struct am7990_softc *sc = &lesc->sc_am7990;
sc 181 dev/sbus/if_le.c sc->sc_mem = lebuf->sc_buffer;
sc 182 dev/sbus/if_le.c sc->sc_memsize = lebuf->sc_bufsiz;
sc 184 dev/sbus/if_le.c sc->sc_addr = 0;
sc 188 dev/sbus/if_le.c sc->sc_conf3 = getpropint(sa->sa_node,
sc 195 dev/sbus/if_le.c if (sc->sc_mem == 0) {
sc 215 dev/sbus/if_le.c (caddr_t *)&sc->sc_mem,
sc 223 dev/sbus/if_le.c if ((error = bus_dmamap_load(dmatag, lesc->sc_dmamap, sc->sc_mem,
sc 227 dev/sbus/if_le.c bus_dmamem_unmap(dmatag, sc->sc_mem, MEMSIZE);
sc 231 dev/sbus/if_le.c sc->sc_addr = lesc->sc_dmamap->dm_segs[0].ds_addr & 0xffffff;
sc 232 dev/sbus/if_le.c sc->sc_memsize = MEMSIZE;
sc 233 dev/sbus/if_le.c sc->sc_conf3 = LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON;
sc 236 dev/sbus/if_le.c myetheraddr(sc->sc_arpcom.ac_enaddr);
sc 238 dev/sbus/if_le.c sc->sc_copytodesc = am7990_copytobuf_contig;
sc 239 dev/sbus/if_le.c sc->sc_copyfromdesc = am7990_copyfrombuf_contig;
sc 240 dev/sbus/if_le.c sc->sc_copytobuf = am7990_copytobuf_contig;
sc 241 dev/sbus/if_le.c sc->sc_copyfrombuf = am7990_copyfrombuf_contig;
sc 242 dev/sbus/if_le.c sc->sc_zerobuf = am7990_zerobuf_contig;
sc 244 dev/sbus/if_le.c sc->sc_rdcsr = le_sbus_rdcsr;
sc 245 dev/sbus/if_le.c sc->sc_wrcsr = le_sbus_wrcsr;
sc 252 dev/sbus/if_le.c IPL_NET, 0, am7990_intr, sc, self->dv_xname);
sc 101 dev/sbus/if_le_lebuffer.c le_lebuffer_wrcsr(struct am7990_softc *sc, u_int16_t port, u_int16_t val)
sc 103 dev/sbus/if_le_lebuffer.c struct le_softc *lesc = (struct le_softc *)sc;
sc 127 dev/sbus/if_le_lebuffer.c le_lebuffer_rdcsr(struct am7990_softc *sc, u_int16_t port)
sc 129 dev/sbus/if_le_lebuffer.c struct le_softc *lesc = (struct le_softc *)sc;
sc 152 dev/sbus/if_le_lebuffer.c struct am7990_softc *sc = &lesc->sc_am7990;
sc 167 dev/sbus/if_le_lebuffer.c sc->sc_mem = lebuf->sc_buffer;
sc 168 dev/sbus/if_le_lebuffer.c sc->sc_memsize = lebuf->sc_bufsiz;
sc 169 dev/sbus/if_le_lebuffer.c sc->sc_addr = 0; /* Lance view is offset by buffer location */
sc 173 dev/sbus/if_le_lebuffer.c sc->sc_conf3 = getpropint(sa->sa_node, "busmaster-regval",
sc 176 dev/sbus/if_le_lebuffer.c myetheraddr(sc->sc_arpcom.ac_enaddr);
sc 178 dev/sbus/if_le_lebuffer.c sc->sc_copytodesc = am7990_copytobuf_contig;
sc 179 dev/sbus/if_le_lebuffer.c sc->sc_copyfromdesc = am7990_copyfrombuf_contig;
sc 180 dev/sbus/if_le_lebuffer.c sc->sc_copytobuf = am7990_copytobuf_contig;
sc 181 dev/sbus/if_le_lebuffer.c sc->sc_copyfrombuf = am7990_copyfrombuf_contig;
sc 182 dev/sbus/if_le_lebuffer.c sc->sc_zerobuf = am7990_zerobuf_contig;
sc 184 dev/sbus/if_le_lebuffer.c sc->sc_rdcsr = le_lebuffer_rdcsr;
sc 185 dev/sbus/if_le_lebuffer.c sc->sc_wrcsr = le_lebuffer_wrcsr;
sc 192 dev/sbus/if_le_lebuffer.c IPL_NET, 0, am7990_intr, sc, self->dv_xname);
sc 113 dev/sbus/if_le_ledma.c le_ledma_wrcsr(struct am7990_softc *sc, u_int16_t port, u_int16_t val)
sc 115 dev/sbus/if_le_ledma.c struct le_softc *lesc = (struct le_softc *)sc;
sc 139 dev/sbus/if_le_ledma.c le_ledma_rdcsr(struct am7990_softc *sc, u_int16_t port)
sc 141 dev/sbus/if_le_ledma.c struct le_softc *lesc = (struct le_softc *)sc;
sc 150 dev/sbus/if_le_ledma.c le_ledma_setutp(struct am7990_softc *sc)
sc 152 dev/sbus/if_le_ledma.c struct lsi64854_softc *dma = ((struct le_softc *)sc)->sc_dma;
sc 162 dev/sbus/if_le_ledma.c le_ledma_setaui(struct am7990_softc *sc)
sc 164 dev/sbus/if_le_ledma.c struct lsi64854_softc *dma = ((struct le_softc *)sc)->sc_dma;
sc 176 dev/sbus/if_le_ledma.c struct am7990_softc *sc = ifp->if_softc;
sc 177 dev/sbus/if_le_ledma.c struct ifmedia *ifm = &sc->sc_ifmedia;
sc 190 dev/sbus/if_le_ledma.c le_ledma_setutp(sc);
sc 194 dev/sbus/if_le_ledma.c le_ledma_setaui(sc);
sc 210 dev/sbus/if_le_ledma.c struct am7990_softc *sc = ifp->if_softc;
sc 211 dev/sbus/if_le_ledma.c struct lsi64854_softc *dma = ((struct le_softc *)sc)->sc_dma;
sc 223 dev/sbus/if_le_ledma.c le_ledma_hwreset(struct am7990_softc *sc)
sc 225 dev/sbus/if_le_ledma.c struct le_softc *lesc = (struct le_softc *)sc;
sc 254 dev/sbus/if_le_ledma.c le_ledma_hwinit(struct am7990_softc *sc)
sc 261 dev/sbus/if_le_ledma.c switch (IFM_SUBTYPE(sc->sc_ifmedia.ifm_cur->ifm_media)) {
sc 263 dev/sbus/if_le_ledma.c le_ledma_setutp(sc);
sc 267 dev/sbus/if_le_ledma.c le_ledma_setaui(sc);
sc 273 dev/sbus/if_le_ledma.c le_ledma_nocarrier(struct am7990_softc *sc)
sc 275 dev/sbus/if_le_ledma.c struct le_softc *lesc = (struct le_softc *)sc;
sc 283 dev/sbus/if_le_ledma.c switch (IFM_SUBTYPE(sc->sc_ifmedia.ifm_media)) {
sc 287 dev/sbus/if_le_ledma.c ", switching to AUI port\n", sc->sc_dev.dv_xname);
sc 288 dev/sbus/if_le_ledma.c le_ledma_setaui(sc);
sc 291 dev/sbus/if_le_ledma.c switch (IFM_SUBTYPE(sc->sc_ifmedia.ifm_media)) {
sc 295 dev/sbus/if_le_ledma.c ", switching to UTP port\n", sc->sc_dev.dv_xname);
sc 296 dev/sbus/if_le_ledma.c le_ledma_setutp(sc);
sc 317 dev/sbus/if_le_ledma.c struct am7990_softc *sc = &lesc->sc_am7990;
sc 342 dev/sbus/if_le_ledma.c sc->sc_memsize = MEMSIZE;
sc 362 dev/sbus/if_le_ledma.c (caddr_t *)&sc->sc_mem,
sc 371 dev/sbus/if_le_ledma.c if ((error = bus_dmamap_load(dmatag, lesc->sc_dmamap, sc->sc_mem,
sc 376 dev/sbus/if_le_ledma.c bus_dmamem_unmap(dmatag, sc->sc_mem, MEMSIZE);
sc 381 dev/sbus/if_le_ledma.c sc->sc_addr = lesc->sc_laddr & 0xffffff;
sc 382 dev/sbus/if_le_ledma.c sc->sc_conf3 = LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON;
sc 384 dev/sbus/if_le_ledma.c ifmedia_init(&sc->sc_ifmedia, 0, lemediachange, lemediastatus);
sc 385 dev/sbus/if_le_ledma.c ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_10_T, 0, NULL);
sc 386 dev/sbus/if_le_ledma.c ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_10_5, 0, NULL);
sc 387 dev/sbus/if_le_ledma.c ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL);
sc 388 dev/sbus/if_le_ledma.c ifmedia_set(&sc->sc_ifmedia, IFM_ETHER | IFM_AUTO);
sc 389 dev/sbus/if_le_ledma.c sc->sc_hasifmedia = 1;
sc 391 dev/sbus/if_le_ledma.c myetheraddr(sc->sc_arpcom.ac_enaddr);
sc 393 dev/sbus/if_le_ledma.c sc->sc_copytodesc = am7990_copytobuf_contig;
sc 394 dev/sbus/if_le_ledma.c sc->sc_copyfromdesc = am7990_copyfrombuf_contig;
sc 395 dev/sbus/if_le_ledma.c sc->sc_copytobuf = am7990_copytobuf_contig;
sc 396 dev/sbus/if_le_ledma.c sc->sc_copyfrombuf = am7990_copyfrombuf_contig;
sc 397 dev/sbus/if_le_ledma.c sc->sc_zerobuf = am7990_zerobuf_contig;
sc 399 dev/sbus/if_le_ledma.c sc->sc_rdcsr = le_ledma_rdcsr;
sc 400 dev/sbus/if_le_ledma.c sc->sc_wrcsr = le_ledma_wrcsr;
sc 401 dev/sbus/if_le_ledma.c sc->sc_hwinit = le_ledma_hwinit;
sc 402 dev/sbus/if_le_ledma.c sc->sc_nocarrier = le_ledma_nocarrier;
sc 403 dev/sbus/if_le_ledma.c sc->sc_hwreset = le_ledma_hwreset;
sc 408 dev/sbus/if_le_ledma.c am7990_intr, sc, self->dv_xname);
sc 413 dev/sbus/if_le_ledma.c le_ledma_hwreset(sc);
sc 68 dev/sbus/lebuffer.c struct lebuf_softc *sc = t->cookie;
sc 70 dev/sbus/lebuffer.c sa->sa_bustag = sc->sc_bustag; /* XXX */
sc 92 dev/sbus/lebuffer.c struct lebuf_softc *sc = (void *)self;
sc 98 dev/sbus/lebuffer.c sc->sc_bustag = sa->sa_bustag;
sc 99 dev/sbus/lebuffer.c sc->sc_dmatag = sa->sa_dmatag;
sc 113 dev/sbus/lebuffer.c sc->sc_buffer = (void *)bus_space_vaddr(sa->sa_bustag, bh);
sc 114 dev/sbus/lebuffer.c sc->sc_bufsiz = sa->sa_size;
sc 116 dev/sbus/lebuffer.c node = sc->sc_node = sa->sa_node;
sc 125 dev/sbus/lebuffer.c sc->sc_burst = getpropint(node, "burst-sizes", -1);
sc 126 dev/sbus/lebuffer.c if (sc->sc_burst == -1)
sc 128 dev/sbus/lebuffer.c sc->sc_burst = sbusburst;
sc 131 dev/sbus/lebuffer.c sc->sc_burst &= sbusburst;
sc 141 dev/sbus/lebuffer.c printf(": %dK memory\n", sc->sc_bufsiz / 1024);
sc 143 dev/sbus/lebuffer.c sbt->cookie = sc;
sc 144 dev/sbus/lebuffer.c sbt->parent = sc->sc_bustag;
sc 152 dev/sbus/lebuffer.c sbt, sc->sc_dmatag, node, &sa);
sc 153 dev/sbus/lebuffer.c (void)config_found(&sc->sc_dev, (void *)&sa, lebufprint);
sc 296 dev/sbus/magma.c struct magma_softc *sc = (struct magma_softc *)dev;
sc 313 dev/sbus/magma.c sc->sc_bustag = sa->sa_bustag;
sc 326 dev/sbus/magma.c 0, 0, &sc->sc_iohandle) != 0) {
sc 335 dev/sbus/magma.c sc->sc_ih = bus_intr_establish(sa->sa_bustag, sa->sa_pri, IPL_TTY, 0,
sc 336 dev/sbus/magma.c magma_hard, sc, dev->dv_xname);
sc 337 dev/sbus/magma.c if (sc->sc_ih == NULL) {
sc 340 dev/sbus/magma.c bus_space_unmap(sc->sc_bustag, sc->sc_iohandle,
sc 345 dev/sbus/magma.c sc->sc_sih = softintr_establish(IPL_TTY, magma_soft, sc);
sc 346 dev/sbus/magma.c if (sc->sc_sih == NULL) {
sc 348 dev/sbus/magma.c bus_space_unmap(sc->sc_bustag, sc->sc_iohandle,
sc 355 dev/sbus/magma.c sc->ms_board = card;
sc 356 dev/sbus/magma.c sc->ms_ncd1400 = card->mb_ncd1400;
sc 357 dev/sbus/magma.c sc->ms_ncd1190 = card->mb_ncd1190;
sc 360 dev/sbus/magma.c if (bus_space_subregion(sc->sc_bustag, sc->sc_iohandle,
sc 361 dev/sbus/magma.c card->mb_svcackr, 1, &sc->sc_svcackrh)) {
sc 365 dev/sbus/magma.c if (bus_space_subregion(sc->sc_bustag, sc->sc_iohandle,
sc 366 dev/sbus/magma.c card->mb_svcackt, 1, &sc->sc_svcackth)) {
sc 370 dev/sbus/magma.c if (bus_space_subregion(sc->sc_bustag, sc->sc_iohandle,
sc 371 dev/sbus/magma.c card->mb_svcackm, 1, &sc->sc_svcackmh)) {
sc 378 dev/sbus/magma.c struct cd1400 *cd = &sc->ms_cd1400[chip];
sc 382 dev/sbus/magma.c if (bus_space_subregion(sc->sc_bustag, sc->sc_iohandle,
sc 387 dev/sbus/magma.c cd->cd_regt = sc->sc_bustag;
sc 394 dev/sbus/magma.c sc->ms_dev.dv_xname, chip, cd->cd_reg,
sc 427 dev/sbus/magma.c struct cd1190 *cd = &sc->ms_cd1190[chip];
sc 429 dev/sbus/magma.c if (bus_space_subregion(sc->sc_bustag, sc->sc_iohandle,
sc 434 dev/sbus/magma.c cd->cd_regt = sc->sc_bustag;
sc 436 dev/sbus/magma.c sc->ms_dev.dv_xname, chip, cd->cd_reg));
sc 455 dev/sbus/magma.c struct magma_softc *sc = arg;
sc 464 dev/sbus/magma.c for (chip = 0 ; chip < sc->ms_ncd1400 ; chip++)
sc 465 dev/sbus/magma.c status |= CD1400_READ_REG(&sc->ms_cd1400[chip], CD1400_SVRR);
sc 469 dev/sbus/magma.c u_int8_t rivr = bus_space_read_1(sc->sc_bustag, sc->sc_svcackrh, 0);
sc 476 dev/sbus/magma.c mbpp = &sc->ms_mbpp->ms_port[port];
sc 495 dev/sbus/magma.c mtty = &sc->ms_mtty->ms_port[port];
sc 531 dev/sbus/magma.c u_int8_t mivr = bus_space_read_1(sc->sc_bustag, sc->sc_svcackmh, 0);
sc 540 dev/sbus/magma.c mtty = &sc->ms_mtty->ms_port[port];
sc 557 dev/sbus/magma.c u_int8_t tivr = bus_space_read_1(sc->sc_bustag, sc->sc_svcackth, 0);
sc 563 dev/sbus/magma.c mbpp = &sc->ms_mbpp->ms_port[port];
sc 589 dev/sbus/magma.c mtty = &sc->ms_mtty->ms_port[port];
sc 661 dev/sbus/magma.c softintr_schedule(sc->sc_sih);
sc 676 dev/sbus/magma.c struct magma_softc *sc = arg;
sc 677 dev/sbus/magma.c struct mtty_softc *mtty = sc->ms_mtty;
sc 678 dev/sbus/magma.c struct mbpp_softc *mbpp = sc->ms_mbpp;
sc 786 dev/sbus/magma.c struct magma_softc *sc = (struct magma_softc *)parent;
sc 788 dev/sbus/magma.c return (args == mtty_match && sc->ms_board->mb_nser &&
sc 789 dev/sbus/magma.c sc->ms_mtty == NULL);
sc 795 dev/sbus/magma.c struct magma_softc *sc = (struct magma_softc *)parent;
sc 799 dev/sbus/magma.c sc->ms_mtty = ms;
sc 803 dev/sbus/magma.c port < sc->ms_board->mb_nser; port++) {
sc 807 dev/sbus/magma.c mp->mp_cd1400 = &sc->ms_cd1400[chip];
sc 1366 dev/sbus/magma.c struct magma_softc *sc = (struct magma_softc *)parent;
sc 1368 dev/sbus/magma.c return (args == mbpp_match && sc->ms_board->mb_npar &&
sc 1369 dev/sbus/magma.c sc->ms_mbpp == NULL);
sc 1375 dev/sbus/magma.c struct magma_softc *sc = (struct magma_softc *)parent;
sc 1380 dev/sbus/magma.c sc->ms_mbpp = ms;
sc 1383 dev/sbus/magma.c for (port = 0 ; port < sc->ms_board->mb_npar ; port++) {
sc 1386 dev/sbus/magma.c if (sc->ms_ncd1190)
sc 1387 dev/sbus/magma.c mp->mp_cd1190 = &sc->ms_cd1190[port];
sc 1389 dev/sbus/magma.c mp->mp_cd1400 = &sc->ms_cd1400[0];
sc 158 dev/sbus/mgx.c struct mgx_softc *sc = (struct mgx_softc *)self;
sc 179 dev/sbus/mgx.c sc->sc_bustag = bt;
sc 186 dev/sbus/mgx.c sc->sc_vidc = (volatile u_int8_t *)bus_space_vaddr(bt, bh);
sc 189 dev/sbus/mgx.c mgx_burner(sc, 1, 0);
sc 191 dev/sbus/mgx.c fb_setsize(&sc->sc_sunfb, 8, 1152, 900, node, 0);
sc 195 dev/sbus/mgx.c if (fbsize != 0 && sc->sc_sunfb.sf_fbsize > fbsize) {
sc 198 dev/sbus/mgx.c self->dv_xname, sc->sc_sunfb.sf_fbsize, fbsize);
sc 203 dev/sbus/mgx.c sc->sc_paddr = sbus_bus_addr(bt, sa->sa_reg[MGX_REG_VRAM8].sbr_slot,
sc 207 dev/sbus/mgx.c round_page(sc->sc_sunfb.sf_fbsize),
sc 212 dev/sbus/mgx.c sc->sc_sunfb.sf_ro.ri_bits = bus_space_vaddr(bt, bh);
sc 213 dev/sbus/mgx.c sc->sc_sunfb.sf_ro.ri_hw = sc;
sc 215 dev/sbus/mgx.c fbwscons_init(&sc->sc_sunfb, isconsole ? 0 : RI_CLEAR);
sc 217 dev/sbus/mgx.c bzero(sc->sc_cmap, sizeof(sc->sc_cmap));
sc 218 dev/sbus/mgx.c fbwscons_setcolormap(&sc->sc_sunfb, mgx_setcolor);
sc 221 dev/sbus/mgx.c sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height);
sc 224 dev/sbus/mgx.c fbwscons_console_init(&sc->sc_sunfb, -1);
sc 227 dev/sbus/mgx.c fbwscons_attach(&sc->sc_sunfb, &mgx_accessops, isconsole);
sc 237 dev/sbus/mgx.c struct mgx_softc *sc = dev;
sc 248 dev/sbus/mgx.c wdf->height = sc->sc_sunfb.sf_height;
sc 249 dev/sbus/mgx.c wdf->width = sc->sc_sunfb.sf_width;
sc 250 dev/sbus/mgx.c wdf->depth = sc->sc_sunfb.sf_depth;
sc 254 dev/sbus/mgx.c *(u_int *)data = sc->sc_sunfb.sf_linebytes;
sc 259 dev/sbus/mgx.c error = mgx_getcmap(sc->sc_cmap, cm);
sc 265 dev/sbus/mgx.c error = mgx_putcmap(sc->sc_cmap, cm);
sc 268 dev/sbus/mgx.c mgx_loadcmap(sc, cm->index, cm->count);
sc 285 dev/sbus/mgx.c struct mgx_softc *sc = v;
sc 291 dev/sbus/mgx.c if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {
sc 292 dev/sbus/mgx.c return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr,
sc 303 dev/sbus/mgx.c struct mgx_softc *sc = v;
sc 305 dev/sbus/mgx.c if (sc->sc_nscreens > 0)
sc 308 dev/sbus/mgx.c *cookiep = &sc->sc_sunfb.sf_ro;
sc 311 dev/sbus/mgx.c sc->sc_sunfb.sf_ro.ri_ops.alloc_attr(&sc->sc_sunfb.sf_ro,
sc 313 dev/sbus/mgx.c sc->sc_nscreens++;
sc 320 dev/sbus/mgx.c struct mgx_softc *sc = v;
sc 322 dev/sbus/mgx.c sc->sc_nscreens--;
sc 335 dev/sbus/mgx.c struct mgx_softc *sc = v;
sc 337 dev/sbus/mgx.c sc->sc_vidc[CRTC_INDEX] = 1; /* TS mode register */
sc 339 dev/sbus/mgx.c sc->sc_vidc[CRTC_DATA] &= ~CD_DISABLEVIDEO;
sc 341 dev/sbus/mgx.c sc->sc_vidc[CRTC_DATA] |= CD_DISABLEVIDEO;
sc 351 dev/sbus/mgx.c struct mgx_softc *sc = v;
sc 354 dev/sbus/mgx.c sc->sc_cmap[index++] = r;
sc 355 dev/sbus/mgx.c sc->sc_cmap[index++] = g;
sc 356 dev/sbus/mgx.c sc->sc_cmap[index] = b;
sc 358 dev/sbus/mgx.c mgx_loadcmap(sc, index, 1);
sc 362 dev/sbus/mgx.c mgx_loadcmap(struct mgx_softc *sc, int start, int ncolors)
sc 368 dev/sbus/mgx.c sc->sc_vidc[CMAP_WRITE_INDEX] = start;
sc 369 dev/sbus/mgx.c color = sc->sc_cmap + start * 3;
sc 376 dev/sbus/mgx.c color = sc->sc_cmap;
sc 379 dev/sbus/mgx.c sc->sc_vidc[CMAP_DATA] = *color++;
sc 193 dev/sbus/qe.c struct qe_softc *sc = (struct qe_softc *)self;
sc 194 dev/sbus/qe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 203 dev/sbus/qe.c sc->sc_bustag = sa->sa_bustag;
sc 204 dev/sbus/qe.c sc->sc_dmatag = sa->sa_dmatag;
sc 214 dev/sbus/qe.c (bus_size_t)sa->sa_reg[0].sbr_size, 0, 0, &sc->sc_cr) != 0) {
sc 221 dev/sbus/qe.c (bus_size_t)sa->sa_reg[1].sbr_size, 0, 0, &sc->sc_mr) != 0) {
sc 226 dev/sbus/qe.c sc->sc_rev = getpropint(node, "mace-version", -1);
sc 227 dev/sbus/qe.c printf(" rev %x", sc->sc_rev);
sc 229 dev/sbus/qe.c sc->sc_qec = qec;
sc 230 dev/sbus/qe.c sc->sc_qr = qec->sc_regs;
sc 232 dev/sbus/qe.c sc->sc_channel = getpropint(node, "channel#", -1);
sc 233 dev/sbus/qe.c sc->sc_burst = qec->sc_burst;
sc 235 dev/sbus/qe.c qestop(sc);
sc 238 dev/sbus/qe.c if (bus_intr_establish(sa->sa_bustag, 0, IPL_NET, 0, qeintr, sc,
sc 244 dev/sbus/qe.c myetheraddr(sc->sc_arpcom.ac_enaddr);
sc 251 dev/sbus/qe.c sc->sc_rb.rb_ntbuf = QEC_XD_RING_MAXSIZE;
sc 252 dev/sbus/qe.c sc->sc_rb.rb_nrbuf = QEC_XD_RING_MAXSIZE;
sc 257 dev/sbus/qe.c sc->sc_rb.rb_ntbuf * QE_PKT_BUF_SZ +
sc 258 dev/sbus/qe.c sc->sc_rb.rb_nrbuf * QE_PKT_BUF_SZ;
sc 262 dev/sbus/qe.c BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
sc 277 dev/sbus/qe.c &sc->sc_rb.rb_membase,
sc 286 dev/sbus/qe.c if ((error = bus_dmamap_load(dmatag, sc->sc_dmamap,
sc 287 dev/sbus/qe.c sc->sc_rb.rb_membase, size, NULL, BUS_DMA_NOWAIT)) != 0) {
sc 290 dev/sbus/qe.c bus_dmamem_unmap(dmatag, sc->sc_rb.rb_membase, size);
sc 294 dev/sbus/qe.c sc->sc_rb.rb_dmabase = sc->sc_dmamap->dm_segs[0].ds_addr;
sc 297 dev/sbus/qe.c ifmedia_init(&sc->sc_ifmedia, 0, qe_ifmedia_upd, qe_ifmedia_sts);
sc 298 dev/sbus/qe.c ifmedia_add(&sc->sc_ifmedia,
sc 300 dev/sbus/qe.c ifmedia_add(&sc->sc_ifmedia,
sc 302 dev/sbus/qe.c ifmedia_add(&sc->sc_ifmedia,
sc 304 dev/sbus/qe.c ifmedia_set(&sc->sc_ifmedia, IFM_ETHER|IFM_AUTO);
sc 306 dev/sbus/qe.c bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
sc 307 dev/sbus/qe.c ifp->if_softc = sc;
sc 319 dev/sbus/qe.c printf(" address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 329 dev/sbus/qe.c qe_get(sc, idx, totlen)
sc 330 dev/sbus/qe.c struct qe_softc *sc;
sc 333 dev/sbus/qe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 339 dev/sbus/qe.c bp = sc->sc_rb.rb_rxbuf + (idx % sc->sc_rb.rb_nrbuf) * QE_PKT_BUF_SZ;
sc 382 dev/sbus/qe.c qe_put(sc, idx, m)
sc 383 dev/sbus/qe.c struct qe_softc *sc;
sc 391 dev/sbus/qe.c bp = sc->sc_rb.rb_txbuf + (idx % sc->sc_rb.rb_ntbuf) * QE_PKT_BUF_SZ;
sc 411 dev/sbus/qe.c qe_read(sc, idx, len)
sc 412 dev/sbus/qe.c struct qe_softc *sc;
sc 415 dev/sbus/qe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 431 dev/sbus/qe.c m = qe_get(sc, idx, len);
sc 463 dev/sbus/qe.c struct qe_softc *sc = (struct qe_softc *)ifp->if_softc;
sc 464 dev/sbus/qe.c struct qec_xd *txd = sc->sc_rb.rb_txd;
sc 467 dev/sbus/qe.c unsigned int ntbuf = sc->sc_rb.rb_ntbuf;
sc 472 dev/sbus/qe.c bix = sc->sc_rb.rb_tdhead;
sc 493 dev/sbus/qe.c len = qe_put(sc, bix, m);
sc 500 dev/sbus/qe.c bus_space_write_4(sc->sc_bustag, sc->sc_cr, QE_CRI_CTRL,
sc 506 dev/sbus/qe.c if (++sc->sc_rb.rb_td_nbusy == ntbuf) {
sc 512 dev/sbus/qe.c sc->sc_rb.rb_tdhead = bix;
sc 516 dev/sbus/qe.c qestop(sc)
sc 517 dev/sbus/qe.c struct qe_softc *sc;
sc 519 dev/sbus/qe.c bus_space_tag_t t = sc->sc_bustag;
sc 520 dev/sbus/qe.c bus_space_handle_t mr = sc->sc_mr;
sc 521 dev/sbus/qe.c bus_space_handle_t cr = sc->sc_cr;
sc 547 dev/sbus/qe.c qereset(sc)
sc 548 dev/sbus/qe.c struct qe_softc *sc;
sc 553 dev/sbus/qe.c qestop(sc);
sc 554 dev/sbus/qe.c qeinit(sc);
sc 562 dev/sbus/qe.c struct qe_softc *sc = ifp->if_softc;
sc 564 dev/sbus/qe.c log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
sc 567 dev/sbus/qe.c qereset(sc);
sc 577 dev/sbus/qe.c struct qe_softc *sc = (struct qe_softc *)arg;
sc 578 dev/sbus/qe.c bus_space_tag_t t = sc->sc_bustag;
sc 583 dev/sbus/qe.c qecstat = bus_space_read_4(t, sc->sc_qr, QEC_QRI_STAT);
sc 585 dev/sbus/qe.c if (sc->sc_debug) {
sc 586 dev/sbus/qe.c printf("qe%d: intr: qecstat=%x\n", sc->sc_channel, qecstat);
sc 591 dev/sbus/qe.c qecstat = qecstat >> (4 * sc->sc_channel);
sc 595 dev/sbus/qe.c qestat = bus_space_read_4(t, sc->sc_cr, QE_CRI_STAT);
sc 598 dev/sbus/qe.c if (sc->sc_debug) {
sc 600 dev/sbus/qe.c bus_space_tag_t t = sc->sc_bustag;
sc 601 dev/sbus/qe.c bus_space_handle_t mr = sc->sc_mr;
sc 603 dev/sbus/qe.c printf("qe%d: intr: qestat=%b\n", sc->sc_channel,
sc 617 dev/sbus/qe.c if (sc->sc_debug)
sc 618 dev/sbus/qe.c printf("qe%d: eint: qestat=%b\n", sc->sc_channel,
sc 621 dev/sbus/qe.c r |= qe_eint(sc, qestat);
sc 627 dev/sbus/qe.c r |= qe_tint(sc);
sc 630 dev/sbus/qe.c r |= qe_rint(sc);
sc 639 dev/sbus/qe.c qe_tint(sc)
sc 640 dev/sbus/qe.c struct qe_softc *sc;
sc 642 dev/sbus/qe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 645 dev/sbus/qe.c bix = sc->sc_rb.rb_tdtail;
sc 648 dev/sbus/qe.c if (sc->sc_rb.rb_td_nbusy <= 0)
sc 651 dev/sbus/qe.c txflags = sc->sc_rb.rb_txd[bix].xd_flags;
sc 662 dev/sbus/qe.c --sc->sc_rb.rb_td_nbusy;
sc 665 dev/sbus/qe.c if (sc->sc_rb.rb_td_nbusy == 0)
sc 668 dev/sbus/qe.c if (sc->sc_rb.rb_tdtail != bix) {
sc 669 dev/sbus/qe.c sc->sc_rb.rb_tdtail = bix;
sc 683 dev/sbus/qe.c qe_rint(sc)
sc 684 dev/sbus/qe.c struct qe_softc *sc;
sc 686 dev/sbus/qe.c struct qec_xd *xd = sc->sc_rb.rb_rxd;
sc 688 dev/sbus/qe.c unsigned int nrbuf = sc->sc_rb.rb_nrbuf;
sc 693 dev/sbus/qe.c bix = sc->sc_rb.rb_rdtail;
sc 709 dev/sbus/qe.c qe_read(sc, bix, len);
sc 719 dev/sbus/qe.c if (npackets == 0 && sc->sc_debug)
sc 721 dev/sbus/qe.c sc->sc_dev.dv_xname, bix, len);
sc 724 dev/sbus/qe.c sc->sc_rb.rb_rdtail = bix;
sc 733 dev/sbus/qe.c qe_eint(sc, why)
sc 734 dev/sbus/qe.c struct qe_softc *sc;
sc 737 dev/sbus/qe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 741 dev/sbus/qe.c printf("%s: excessive tx defers.\n", sc->sc_dev.dv_xname);
sc 752 dev/sbus/qe.c printf("%s: excessive tx retries\n", sc->sc_dev.dv_xname);
sc 760 dev/sbus/qe.c printf("%s: late tx transmission\n", sc->sc_dev.dv_xname);
sc 767 dev/sbus/qe.c printf("%s: tx fifo underflow\n", sc->sc_dev.dv_xname);
sc 774 dev/sbus/qe.c printf("%s: jabber seen\n", sc->sc_dev.dv_xname);
sc 779 dev/sbus/qe.c printf("%s: babble seen\n", sc->sc_dev.dv_xname);
sc 790 dev/sbus/qe.c printf("%s: tx descriptor is bad\n", sc->sc_dev.dv_xname);
sc 796 dev/sbus/qe.c printf("%s: tx late error\n", sc->sc_dev.dv_xname);
sc 803 dev/sbus/qe.c printf("%s: tx dma parity error\n", sc->sc_dev.dv_xname);
sc 810 dev/sbus/qe.c printf("%s: tx dma sbus error ack\n", sc->sc_dev.dv_xname);
sc 833 dev/sbus/qe.c printf("%s: rx fifo overflow\n", sc->sc_dev.dv_xname);
sc 839 dev/sbus/qe.c printf("%s: rx late collision\n", sc->sc_dev.dv_xname);
sc 856 dev/sbus/qe.c printf("%s: rx packet dropped\n", sc->sc_dev.dv_xname);
sc 862 dev/sbus/qe.c printf("%s: rx buffer too small\n", sc->sc_dev.dv_xname);
sc 869 dev/sbus/qe.c printf("%s: rx late error\n", sc->sc_dev.dv_xname);
sc 876 dev/sbus/qe.c printf("%s: rx dma parity error\n", sc->sc_dev.dv_xname);
sc 883 dev/sbus/qe.c printf("%s: rx dma sbus error ack\n", sc->sc_dev.dv_xname);
sc 891 dev/sbus/qe.c sc->sc_dev.dv_xname, why);
sc 894 dev/sbus/qe.c printf("%s: resetting...\n", sc->sc_dev.dv_xname);
sc 895 dev/sbus/qe.c qereset(sc);
sc 908 dev/sbus/qe.c struct qe_softc *sc = ifp->if_softc;
sc 915 dev/sbus/qe.c if ((error = ether_ioctl(ifp, &sc->sc_arpcom, cmd, data)) > 0) {
sc 926 dev/sbus/qe.c qeinit(sc);
sc 927 dev/sbus/qe.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 931 dev/sbus/qe.c qeinit(sc);
sc 943 dev/sbus/qe.c qestop(sc);
sc 951 dev/sbus/qe.c qeinit(sc);
sc 957 dev/sbus/qe.c qestop(sc);
sc 958 dev/sbus/qe.c qeinit(sc);
sc 961 dev/sbus/qe.c sc->sc_debug = (ifp->if_flags & IFF_DEBUG) != 0 ? 1 : 0;
sc 968 dev/sbus/qe.c ether_addmulti(ifr, &sc->sc_arpcom):
sc 969 dev/sbus/qe.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 977 dev/sbus/qe.c qe_mcreset(sc);
sc 984 dev/sbus/qe.c error = ifmedia_ioctl(ifp, ifr, &sc->sc_ifmedia, cmd);
sc 998 dev/sbus/qe.c qeinit(sc)
sc 999 dev/sbus/qe.c struct qe_softc *sc;
sc 1001 dev/sbus/qe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1002 dev/sbus/qe.c bus_space_tag_t t = sc->sc_bustag;
sc 1003 dev/sbus/qe.c bus_space_handle_t cr = sc->sc_cr;
sc 1004 dev/sbus/qe.c bus_space_handle_t mr = sc->sc_mr;
sc 1005 dev/sbus/qe.c struct qec_softc *qec = sc->sc_qec;
sc 1012 dev/sbus/qe.c qestop(sc);
sc 1017 dev/sbus/qe.c qec_meminit(&sc->sc_rb, QE_PKT_BUF_SZ);
sc 1020 dev/sbus/qe.c bus_space_write_4(t, cr, QE_CRI_RXDS, (u_int32_t)sc->sc_rb.rb_rxddma);
sc 1021 dev/sbus/qe.c bus_space_write_4(t, cr, QE_CRI_TXDS, (u_int32_t)sc->sc_rb.rb_txddma);
sc 1030 dev/sbus/qe.c qecaddr = sc->sc_channel * qec->sc_msize;
sc 1067 dev/sbus/qe.c ea = sc->sc_arpcom.ac_enaddr;
sc 1092 dev/sbus/qe.c qe_mcreset(sc);
sc 1103 dev/sbus/qe.c qe_mcreset(sc)
sc 1104 dev/sbus/qe.c struct qe_softc *sc;
sc 1106 dev/sbus/qe.c struct arpcom *ac = &sc->sc_arpcom;
sc 1107 dev/sbus/qe.c struct ifnet *ifp = &sc->sc_arpcom.ac_if;
sc 1108 dev/sbus/qe.c bus_space_tag_t t = sc->sc_bustag;
sc 1109 dev/sbus/qe.c bus_space_handle_t mr = sc->sc_mr;
sc 1195 dev/sbus/qe.c struct qe_softc *sc = ifp->if_softc;
sc 1199 dev/sbus/qe.c phycc = bus_space_read_1(sc->sc_bustag, sc->sc_mr, QE_MRI_PHYCC);
sc 1216 dev/sbus/qe.c struct qe_softc *sc = ifp->if_softc;
sc 1217 dev/sbus/qe.c int media = sc->sc_ifmedia.ifm_media;
sc 93 dev/sbus/qec.c struct qec_softc *sc = t->cookie;
sc 95 dev/sbus/qec.c sa->sa_bustag = sc->sc_bustag; /* XXX */
sc 122 dev/sbus/qec.c struct qec_softc *sc = (void *)self;
sc 129 dev/sbus/qec.c sc->sc_bustag = sa->sa_bustag;
sc 130 dev/sbus/qec.c sc->sc_dmatag = sa->sa_dmatag;
sc 141 dev/sbus/qec.c 0, 0, &sc->sc_regs) != 0) {
sc 156 dev/sbus/qec.c sc->sc_buffer = (caddr_t)bus_space_vaddr(sc->sc_bustag, bh);
sc 157 dev/sbus/qec.c sc->sc_bufsiz = (bus_size_t)sa->sa_reg[1].sbr_size;
sc 160 dev/sbus/qec.c sc->sc_nchannels = getpropint(node, "#channels", -1);
sc 161 dev/sbus/qec.c if (sc->sc_nchannels == -1) {
sc 173 dev/sbus/qec.c sc->sc_burst = getpropint(node, "burst-sizes", -1);
sc 174 dev/sbus/qec.c if (sc->sc_burst == -1)
sc 176 dev/sbus/qec.c sc->sc_burst = sbusburst;
sc 179 dev/sbus/qec.c sc->sc_burst &= sbusburst;
sc 185 dev/sbus/qec.c &sc->sc_nrange, (void **)&sc->sc_range);
sc 202 dev/sbus/qec.c strlcpy(sbt->name, sc->sc_dev.dv_xname, sizeof(sbt->name));
sc 203 dev/sbus/qec.c sbt->cookie = sc;
sc 204 dev/sbus/qec.c sbt->parent = sc->sc_bustag;
sc 219 dev/sbus/qec.c sc->sc_intr = sa->sa_intr;
sc 221 dev/sbus/qec.c printf(": %dK memory\n", sc->sc_bufsiz / 1024);
sc 223 dev/sbus/qec.c qec_init(sc);
sc 230 dev/sbus/qec.c sbt, sc->sc_dmatag, node, &sa);
sc 231 dev/sbus/qec.c (void)config_found(&sc->sc_dev, (void *)&sa, qecprint);
sc 245 dev/sbus/qec.c struct qec_softc *sc = t->cookie;
sc 265 dev/sbus/qec.c for (i = 0; i < sc->sc_nrange; i++) {
sc 269 dev/sbus/qec.c if (sc->sc_range[i].cspace != slot)
sc 273 dev/sbus/qec.c paddr = sc->sc_range[i].poffset + offset;
sc 274 dev/sbus/qec.c iospace = sc->sc_range[i].pspace;
sc 293 dev/sbus/qec.c struct qec_softc *sc = t->cookie;
sc 300 dev/sbus/qec.c if (sc->sc_intr == NULL) {
sc 302 dev/sbus/qec.c sc->sc_dev.dv_xname);
sc 305 dev/sbus/qec.c pri = sc->sc_intr->sbi_pri;
sc 320 dev/sbus/qec.c qec_init(sc)
sc 321 dev/sbus/qec.c struct qec_softc *sc;
sc 323 dev/sbus/qec.c bus_space_tag_t t = sc->sc_bustag;
sc 324 dev/sbus/qec.c bus_space_handle_t qr = sc->sc_regs;
sc 341 dev/sbus/qec.c v = sc->sc_msize = sc->sc_bufsiz / sc->sc_nchannels;
sc 344 dev/sbus/qec.c v = sc->sc_rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2);
sc 348 dev/sbus/qec.c psize = sc->sc_nchannels == 1 ? QEC_PSIZE_2048 : 0;
sc 351 dev/sbus/qec.c if (sc->sc_burst & SBUS_BURST_64)
sc 353 dev/sbus/qec.c else if (sc->sc_burst & SBUS_BURST_32)
sc 200 dev/sbus/rfx.c struct rfx_softc *sc = (struct rfx_softc *)self;
sc 247 dev/sbus/rfx.c sc->sc_bustag = bt;
sc 248 dev/sbus/rfx.c sc->sc_paddr = sbus_bus_addr(bt, sa->sa_slot, sa->sa_offset);
sc 255 dev/sbus/rfx.c sc->sc_ramdac = (u_int8_t *)bus_space_vaddr(bt, bh);
sc 262 dev/sbus/rfx.c sc->sc_ctrl = (u_int32_t *)bus_space_vaddr(bt, bh);
sc 265 dev/sbus/rfx.c sc->sc_ih.ih_fun = rfx_intr;
sc 266 dev/sbus/rfx.c sc->sc_ih.ih_arg = sc;
sc 267 dev/sbus/rfx.c intr_establish(ca->ca_ra.ra_intr[0].int_pri, &sc->sc_ih, IPL_FB);
sc 278 dev/sbus/rfx.c sc->sc_sunfb.sf_depth = 8;
sc 279 dev/sbus/rfx.c sc->sc_sunfb.sf_width = cf.width;
sc 280 dev/sbus/rfx.c sc->sc_sunfb.sf_height = cf.height;
sc 281 dev/sbus/rfx.c sc->sc_sunfb.sf_linebytes = cf.scanline;
sc 282 dev/sbus/rfx.c sc->sc_sunfb.sf_fbsize = cf.height * cf.scanline;
sc 284 dev/sbus/rfx.c printf(", %dx%d\n", sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height);
sc 287 dev/sbus/rfx.c round_page(sc->sc_sunfb.sf_fbsize), BUS_SPACE_MAP_LINEAR,
sc 292 dev/sbus/rfx.c sc->sc_sunfb.sf_ro.ri_bits = bus_space_vaddr(bt, bh);
sc 293 dev/sbus/rfx.c sc->sc_sunfb.sf_ro.ri_hw = sc;
sc 300 dev/sbus/rfx.c if (rfx_initialize(sc, sa, &cf) != 0)
sc 304 dev/sbus/rfx.c fbwscons_init(&sc->sc_sunfb, isconsole ? 0 : RI_CLEAR);
sc 306 dev/sbus/rfx.c bzero(&sc->sc_cmap, sizeof(sc->sc_cmap));
sc 307 dev/sbus/rfx.c fbwscons_setcolormap(&sc->sc_sunfb, rfx_setcolor);
sc 310 dev/sbus/rfx.c fbwscons_console_init(&sc->sc_sunfb, -1);
sc 314 dev/sbus/rfx.c rfx_burner(sc, 1, 0);
sc 316 dev/sbus/rfx.c fbwscons_attach(&sc->sc_sunfb, &rfx_accessops, isconsole);
sc 326 dev/sbus/rfx.c struct rfx_softc *sc = v;
sc 337 dev/sbus/rfx.c wdf->height = sc->sc_sunfb.sf_height;
sc 338 dev/sbus/rfx.c wdf->width = sc->sc_sunfb.sf_width;
sc 339 dev/sbus/rfx.c wdf->depth = sc->sc_sunfb.sf_depth;
sc 343 dev/sbus/rfx.c *(u_int *)data = sc->sc_sunfb.sf_linebytes;
sc 348 dev/sbus/rfx.c error = rfx_getcmap(&sc->sc_cmap, cm);
sc 354 dev/sbus/rfx.c error = rfx_putcmap(&sc->sc_cmap, cm);
sc 357 dev/sbus/rfx.c rfx_loadcmap(sc, cm->index, cm->count);
sc 374 dev/sbus/rfx.c struct rfx_softc *sc = v;
sc 379 dev/sbus/rfx.c if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {
sc 380 dev/sbus/rfx.c return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr,
sc 391 dev/sbus/rfx.c struct rfx_softc *sc = v;
sc 393 dev/sbus/rfx.c if (sc->sc_nscreens > 0)
sc 396 dev/sbus/rfx.c *cookiep = &sc->sc_sunfb.sf_ro;
sc 399 dev/sbus/rfx.c sc->sc_sunfb.sf_ro.ri_ops.alloc_attr(&sc->sc_sunfb.sf_ro,
sc 401 dev/sbus/rfx.c sc->sc_nscreens++;
sc 408 dev/sbus/rfx.c struct rfx_softc *sc = v;
sc 410 dev/sbus/rfx.c sc->sc_nscreens--;
sc 423 dev/sbus/rfx.c struct rfx_softc *sc = v;
sc 426 dev/sbus/rfx.c sc->sc_ctrl[RFX_VIDCTRL_REG] &= ~RFX_VIDEO_DISABLE;
sc 427 dev/sbus/rfx.c sc->sc_ctrl[RFX_VIDCTRL_REG] |= RFX_VSYNC_ENABLE;
sc 429 dev/sbus/rfx.c sc->sc_ctrl[RFX_VIDCTRL_REG] |= RFX_VIDEO_DISABLE;
sc 431 dev/sbus/rfx.c sc->sc_ctrl[RFX_VIDCTRL_REG] &= ~RFX_VSYNC_ENABLE;
sc 442 dev/sbus/rfx.c struct rfx_softc *sc = v;
sc 444 dev/sbus/rfx.c sc->sc_cmap.red[index] = r;
sc 445 dev/sbus/rfx.c sc->sc_cmap.green[index] = g;
sc 446 dev/sbus/rfx.c sc->sc_cmap.blue[index] = b;
sc 448 dev/sbus/rfx.c rfx_loadcmap(sc, index, 1);
sc 495 dev/sbus/rfx.c rfx_loadcmap(struct rfx_softc *sc, int start, int ncolors)
sc 499 dev/sbus/rfx.c r = sc->sc_cmap.red + start;
sc 500 dev/sbus/rfx.c g = sc->sc_cmap.green + start;
sc 501 dev/sbus/rfx.c b = sc->sc_cmap.blue + start;
sc 504 dev/sbus/rfx.c sc->sc_ramdac[BT463_REG_ADDR_LOW] = start & 0xff;
sc 505 dev/sbus/rfx.c sc->sc_ramdac[BT463_REG_ADDR_HIGH] = (start >> 8) & 0xff;
sc 508 dev/sbus/rfx.c sc->sc_ramdac[BT463_REG_CMAP_DATA] = *r++;
sc 509 dev/sbus/rfx.c sc->sc_ramdac[BT463_REG_CMAP_DATA] = *g++;
sc 510 dev/sbus/rfx.c sc->sc_ramdac[BT463_REG_CMAP_DATA] = *b++;
sc 519 dev/sbus/rfx.c rfx_initialize(struct rfx_softc *sc, struct sbus_attach_args *sa,
sc 533 dev/sbus/rfx.c sc->sc_sunfb.sf_dev.dv_xname);
sc 564 dev/sbus/rfx.c sc->sc_ramdac[offset] = value >> 24;
sc 568 dev/sbus/rfx.c sc->sc_ctrl[offset >> 2] = value;
sc 121 dev/sbus/spif.c #define STC_WRITE(sc,r,v) \
sc 122 dev/sbus/spif.c bus_space_write_1((sc)->sc_bustag, (sc)->sc_stch, (r), (v))
sc 123 dev/sbus/spif.c #define STC_READ(sc,r) \
sc 124 dev/sbus/spif.c bus_space_read_1((sc)->sc_bustag, (sc)->sc_stch, (r))
sc 127 dev/sbus/spif.c #define ISTC_WRITE(sc,r,v) \
sc 128 dev/sbus/spif.c bus_space_write_1((sc)->sc_bustag, (sc)->sc_istch, (r), (v))
sc 129 dev/sbus/spif.c #define ISTC_READ(sc,r) \
sc 130 dev/sbus/spif.c bus_space_read_1((sc)->sc_bustag, (sc)->sc_istch, (r))
sc 133 dev/sbus/spif.c #define PPC_WRITE(sc,r,v) \
sc 134 dev/sbus/spif.c bus_space_write_1((sc)->sc_bustag, (sc)->sc_ppch, (r), (v))
sc 135 dev/sbus/spif.c #define PPC_READ(sc,r) \
sc 136 dev/sbus/spif.c bus_space_read_1((sc)->sc_bustag, (sc)->sc_ppch, (r))
sc 138 dev/sbus/spif.c #define DTR_WRITE(sc,port,v) \
sc 140 dev/sbus/spif.c sc->sc_ttys->sc_port[(port)].sp_dtr = v; \
sc 141 dev/sbus/spif.c bus_space_write_1((sc)->sc_bustag, \
sc 142 dev/sbus/spif.c sc->sc_dtrh, port, (v == 0) ? 1 : 0); \
sc 145 dev/sbus/spif.c #define DTR_READ(sc,port) ((sc)->sc_ttys->sc_port[(port)].sp_dtr)
sc 166 dev/sbus/spif.c struct spif_softc *sc = (struct spif_softc *)self;
sc 179 dev/sbus/spif.c sc->sc_bustag = sa->sa_bustag;
sc 182 dev/sbus/spif.c 0, 0, &sc->sc_regh) != 0) {
sc 187 dev/sbus/spif.c if (bus_space_subregion(sc->sc_bustag, sc->sc_regh,
sc 188 dev/sbus/spif.c DTR_REG_OFFSET, DTR_REG_LEN, &sc->sc_dtrh) != 0) {
sc 193 dev/sbus/spif.c if (bus_space_subregion(sc->sc_bustag, sc->sc_regh,
sc 194 dev/sbus/spif.c STC_REG_OFFSET, STC_REG_LEN, &sc->sc_stch) != 0) {
sc 199 dev/sbus/spif.c if (bus_space_subregion(sc->sc_bustag, sc->sc_regh,
sc 200 dev/sbus/spif.c ISTC_REG_OFFSET, ISTC_REG_LEN, &sc->sc_istch) != 0) {
sc 205 dev/sbus/spif.c if (bus_space_subregion(sc->sc_bustag, sc->sc_regh,
sc 206 dev/sbus/spif.c PPC_REG_OFFSET, PPC_REG_LEN, &sc->sc_ppch) != 0) {
sc 211 dev/sbus/spif.c sc->sc_ppcih = bus_intr_establish(sa->sa_bustag,
sc 212 dev/sbus/spif.c sa->sa_intr[PARALLEL_INTR].sbi_pri, IPL_TTY, 0, spifppcintr, sc,
sc 214 dev/sbus/spif.c if (sc->sc_ppcih == NULL) {
sc 219 dev/sbus/spif.c sc->sc_stcih = bus_intr_establish(sa->sa_bustag,
sc 220 dev/sbus/spif.c sa->sa_intr[SERIAL_INTR].sbi_pri, IPL_TTY, 0, spifstcintr, sc,
sc 222 dev/sbus/spif.c if (sc->sc_stcih == NULL) {
sc 227 dev/sbus/spif.c sc->sc_softih = softintr_establish(IPL_TTY, spifsoftintr, sc);
sc 228 dev/sbus/spif.c if (sc->sc_softih == NULL) {
sc 233 dev/sbus/spif.c sc->sc_node = sa->sa_node;
sc 235 dev/sbus/spif.c sc->sc_rev = getpropint(sc->sc_node, "revlev", 0);
sc 237 dev/sbus/spif.c sc->sc_osc = getpropint(sc->sc_node, "verosc", 0);
sc 238 dev/sbus/spif.c switch (sc->sc_osc) {
sc 240 dev/sbus/spif.c sc->sc_osc = 10000000;
sc 244 dev/sbus/spif.c sc->sc_osc = 9830400;
sc 248 dev/sbus/spif.c sc->sc_nser = 8;
sc 249 dev/sbus/spif.c sc->sc_npar = 1;
sc 251 dev/sbus/spif.c sc->sc_rev2 = STC_READ(sc, STC_GFRCR);
sc 252 dev/sbus/spif.c STC_WRITE(sc, STC_GSVR, 0);
sc 254 dev/sbus/spif.c stty_write_ccr(sc, CD180_CCR_CMD_RESET | CD180_CCR_RESETALL);
sc 255 dev/sbus/spif.c while (STC_READ(sc, STC_GSVR) != 0xff);
sc 256 dev/sbus/spif.c while (STC_READ(sc, STC_GFRCR) != sc->sc_rev2);
sc 258 dev/sbus/spif.c STC_WRITE(sc, STC_PPRH, CD180_PPRH);
sc 259 dev/sbus/spif.c STC_WRITE(sc, STC_PPRL, CD180_PPRL);
sc 260 dev/sbus/spif.c STC_WRITE(sc, STC_MSMR, SPIF_MSMR);
sc 261 dev/sbus/spif.c STC_WRITE(sc, STC_TSMR, SPIF_TSMR);
sc 262 dev/sbus/spif.c STC_WRITE(sc, STC_RSMR, SPIF_RSMR);
sc 263 dev/sbus/spif.c STC_WRITE(sc, STC_GSVR, 0);
sc 264 dev/sbus/spif.c STC_WRITE(sc, STC_GSCR1, 0);
sc 265 dev/sbus/spif.c STC_WRITE(sc, STC_GSCR2, 0);
sc 266 dev/sbus/spif.c STC_WRITE(sc, STC_GSCR3, 0);
sc 269 dev/sbus/spif.c sc->sc_rev, sc->sc_rev2, clockfreq(sc->sc_osc));
sc 277 dev/sbus/spif.c bus_space_unmap(sa->sa_bustag, sc->sc_regh, sa->sa_reg[0].sbr_size);
sc 285 dev/sbus/spif.c struct spif_softc *sc = (struct spif_softc *)parent;
sc 287 dev/sbus/spif.c return (aux == sttymatch && sc->sc_ttys == NULL);
sc 295 dev/sbus/spif.c struct spif_softc *sc = (struct spif_softc *)parent;
sc 299 dev/sbus/spif.c sc->sc_ttys = ssc;
sc 301 dev/sbus/spif.c for (port = 0; port < sc->sc_nser; port++) {
sc 305 dev/sbus/spif.c DTR_WRITE(sc, port, 0);
sc 313 dev/sbus/spif.c sp->sp_sc = sc;
sc 336 dev/sbus/spif.c struct stty_softc *sc;
sc 346 dev/sbus/spif.c sc = stty_cd.cd_devs[card];
sc 348 dev/sbus/spif.c if (sc == NULL || csc == NULL)
sc 351 dev/sbus/spif.c if (port >= sc->sc_nports)
sc 354 dev/sbus/spif.c sp = &sc->sc_port[port];
sc 427 dev/sbus/spif.c struct stty_softc *sc = stty_cd.cd_devs[SPIF_CARD(dev)];
sc 428 dev/sbus/spif.c struct stty_port *sp = &sc->sc_port[SPIF_PORT(dev)];
sc 459 dev/sbus/spif.c struct spif_softc *sc = sp->sp_sc;
sc 476 dev/sbus/spif.c STC_WRITE(sc, STC_CAR, sp->sp_channel);
sc 477 dev/sbus/spif.c STC_WRITE(sc, STC_SRER,
sc 478 dev/sbus/spif.c STC_READ(sc, STC_SRER) | CD180_SRER_TXD);
sc 482 dev/sbus/spif.c STC_WRITE(sc, STC_CAR, sp->sp_channel);
sc 483 dev/sbus/spif.c STC_WRITE(sc, STC_SRER,
sc 484 dev/sbus/spif.c STC_READ(sc, STC_SRER) | CD180_SRER_TXD);
sc 585 dev/sbus/spif.c struct spif_softc *sc = sp->sp_sc;
sc 590 dev/sbus/spif.c stty_compute_baud(t->c_ospeed, sc->sc_osc, &tbprl, &tbprh))
sc 594 dev/sbus/spif.c stty_compute_baud(t->c_ispeed, sc->sc_osc, &rbprl, &rbprh))
sc 603 dev/sbus/spif.c STC_WRITE(sc, STC_CAR, sp->sp_channel);
sc 635 dev/sbus/spif.c STC_WRITE(sc, STC_COR1, opt);
sc 636 dev/sbus/spif.c stty_write_ccr(sc, CD180_CCR_CMD_COR|CD180_CCR_CORCHG1);
sc 641 dev/sbus/spif.c STC_WRITE(sc, STC_COR2, opt);
sc 642 dev/sbus/spif.c stty_write_ccr(sc, CD180_CCR_CMD_COR|CD180_CCR_CORCHG2);
sc 644 dev/sbus/spif.c STC_WRITE(sc, STC_COR3, STTY_RX_FIFO_THRESHOLD);
sc 645 dev/sbus/spif.c stty_write_ccr(sc, CD180_CCR_CMD_COR|CD180_CCR_CORCHG3);
sc 647 dev/sbus/spif.c STC_WRITE(sc, STC_SCHR1, 0x11);
sc 648 dev/sbus/spif.c STC_WRITE(sc, STC_SCHR2, 0x13);
sc 649 dev/sbus/spif.c STC_WRITE(sc, STC_SCHR3, 0x11);
sc 650 dev/sbus/spif.c STC_WRITE(sc, STC_SCHR4, 0x13);
sc 651 dev/sbus/spif.c STC_WRITE(sc, STC_RTPR, 0x12);
sc 653 dev/sbus/spif.c STC_WRITE(sc, STC_MCOR1, CD180_MCOR1_CDZD | STTY_RX_DTR_THRESHOLD);
sc 654 dev/sbus/spif.c STC_WRITE(sc, STC_MCOR2, CD180_MCOR2_CDOD);
sc 655 dev/sbus/spif.c STC_WRITE(sc, STC_MCR, 0);
sc 658 dev/sbus/spif.c STC_WRITE(sc, STC_TBPRH, tbprh);
sc 659 dev/sbus/spif.c STC_WRITE(sc, STC_TBPRL, tbprl);
sc 663 dev/sbus/spif.c STC_WRITE(sc, STC_RBPRH, rbprh);
sc 664 dev/sbus/spif.c STC_WRITE(sc, STC_RBPRL, rbprl);
sc 667 dev/sbus/spif.c stty_write_ccr(sc, CD180_CCR_CMD_CHAN |
sc 670 dev/sbus/spif.c sp->sp_carrier = STC_READ(sc, STC_MSVR) & CD180_MSVR_CD;
sc 682 dev/sbus/spif.c struct stty_softc *sc = stty_cd.cd_devs[SPIF_CARD(dev)];
sc 683 dev/sbus/spif.c struct stty_port *sp = &sc->sc_port[SPIF_PORT(dev)];
sc 695 dev/sbus/spif.c struct stty_softc *sc = stty_cd.cd_devs[SPIF_CARD(dev)];
sc 696 dev/sbus/spif.c struct stty_port *sp = &sc->sc_port[SPIF_PORT(dev)];
sc 706 dev/sbus/spif.c struct stty_softc *sc = stty_cd.cd_devs[SPIF_CARD(dev)];
sc 707 dev/sbus/spif.c struct stty_port *sp = &sc->sc_port[SPIF_PORT(dev)];
sc 717 dev/sbus/spif.c struct stty_softc *sc = stty_cd.cd_devs[SPIF_CARD(tp->t_dev)];
sc 718 dev/sbus/spif.c struct stty_port *sp = &sc->sc_port[SPIF_PORT(tp->t_dev)];
sc 737 dev/sbus/spif.c struct spif_softc *sc = sp->sp_sc;
sc 754 dev/sbus/spif.c STC_WRITE(sc, STC_CAR, sp->sp_channel);
sc 755 dev/sbus/spif.c STC_WRITE(sc, STC_SRER,
sc 756 dev/sbus/spif.c STC_READ(sc, STC_SRER) | CD180_SRER_TXD);
sc 764 dev/sbus/spif.c spifstcintr_rxexception(sc, needsoftp)
sc 765 dev/sbus/spif.c struct spif_softc *sc;
sc 771 dev/sbus/spif.c channel = CD180_GSCR_CHANNEL(STC_READ(sc, STC_GSCR1));
sc 772 dev/sbus/spif.c sp = &sc->sc_ttys->sc_port[channel];
sc 774 dev/sbus/spif.c *ptr++ = STC_READ(sc, STC_RCSR);
sc 775 dev/sbus/spif.c *ptr++ = STC_READ(sc, STC_RDR);
sc 784 dev/sbus/spif.c STC_WRITE(sc, STC_EOSRR, 0);
sc 791 dev/sbus/spif.c spifstcintr_rx(sc, needsoftp)
sc 792 dev/sbus/spif.c struct spif_softc *sc;
sc 799 dev/sbus/spif.c channel = CD180_GSCR_CHANNEL(STC_READ(sc, STC_GSCR1));
sc 800 dev/sbus/spif.c sp = &sc->sc_ttys->sc_port[channel];
sc 802 dev/sbus/spif.c cnt = STC_READ(sc, STC_RDCR);
sc 805 dev/sbus/spif.c rcsr = STC_READ(sc, STC_RCSR);
sc 806 dev/sbus/spif.c *ptr++ = STC_READ(sc, STC_RDR);
sc 817 dev/sbus/spif.c STC_WRITE(sc, STC_EOSRR, 0);
sc 826 dev/sbus/spif.c spifstcintr_tx(sc, needsoftp)
sc 827 dev/sbus/spif.c struct spif_softc *sc;
sc 834 dev/sbus/spif.c channel = CD180_GSCR_CHANNEL(STC_READ(sc, STC_GSCR1));
sc 835 dev/sbus/spif.c sp = &sc->sc_ttys->sc_port[channel];
sc 838 dev/sbus/spif.c STC_WRITE(sc, STC_TDR, 0);
sc 839 dev/sbus/spif.c STC_WRITE(sc, STC_TDR, 0x81);
sc 844 dev/sbus/spif.c STC_WRITE(sc, STC_TDR, 0);
sc 845 dev/sbus/spif.c STC_WRITE(sc, STC_TDR, 0x83);
sc 856 dev/sbus/spif.c STC_WRITE(sc, STC_TDR, ch);
sc 859 dev/sbus/spif.c STC_WRITE(sc, STC_TDR, ch);
sc 866 dev/sbus/spif.c STC_WRITE(sc, STC_SRER, STC_READ(sc, STC_SRER) &
sc 873 dev/sbus/spif.c STC_WRITE(sc, STC_EOSRR, 0);
sc 879 dev/sbus/spif.c spifstcintr_mx(sc, needsoftp)
sc 880 dev/sbus/spif.c struct spif_softc *sc;
sc 886 dev/sbus/spif.c channel = CD180_GSCR_CHANNEL(STC_READ(sc, STC_GSCR1));
sc 887 dev/sbus/spif.c sp = &sc->sc_ttys->sc_port[channel];
sc 888 dev/sbus/spif.c mcr = STC_READ(sc, STC_MCR);
sc 893 dev/sbus/spif.c STC_WRITE(sc, STC_MCR, 0);
sc 894 dev/sbus/spif.c STC_WRITE(sc, STC_EOSRR, 0);
sc 902 dev/sbus/spif.c struct spif_softc *sc = (struct spif_softc *)vsc;
sc 907 dev/sbus/spif.c ar = ISTC_READ(sc, STC_RRAR) & CD180_GSVR_IMASK;
sc 909 dev/sbus/spif.c r |= spifstcintr_rx(sc, &needsoft);
sc 911 dev/sbus/spif.c r |= spifstcintr_rxexception(sc, &needsoft);
sc 915 dev/sbus/spif.c ar = ISTC_READ(sc, STC_TRAR) & CD180_GSVR_IMASK;
sc 917 dev/sbus/spif.c r |= spifstcintr_tx(sc, &needsoft);
sc 921 dev/sbus/spif.c ar = ISTC_READ(sc, STC_MRAR) & CD180_GSVR_IMASK;
sc 923 dev/sbus/spif.c r |= spifstcintr_mx(sc, &needsoft);
sc 927 dev/sbus/spif.c softintr_schedule(sc->sc_softih);
sc 935 dev/sbus/spif.c struct spif_softc *sc = (struct spif_softc *)vsc;
sc 936 dev/sbus/spif.c struct stty_softc *stc = sc->sc_ttys;
sc 975 dev/sbus/spif.c STC_WRITE(sc, STC_CAR, i);
sc 976 dev/sbus/spif.c msvr = STC_READ(sc, STC_MSVR);
sc 1003 dev/sbus/spif.c stty_write_ccr(sc, val)
sc 1004 dev/sbus/spif.c struct spif_softc *sc;
sc 1009 dev/sbus/spif.c while (STC_READ(sc, STC_CCR) && tries--)
sc 1012 dev/sbus/spif.c printf("%s: ccr timeout\n", sc->sc_dev.dv_xname);
sc 1013 dev/sbus/spif.c STC_WRITE(sc, STC_CCR, val);
sc 1043 dev/sbus/spif.c struct spif_softc *sc = (struct spif_softc *)parent;
sc 1045 dev/sbus/spif.c return (aux == sbppmatch && sc->sc_bpps == NULL);
sc 1053 dev/sbus/spif.c struct spif_softc *sc = (struct spif_softc *)parent;
sc 1057 dev/sbus/spif.c sc->sc_bpps = psc;
sc 1059 dev/sbus/spif.c for (port = 0; port < sc->sc_npar; port++) {
sc 205 dev/sbus/stp4020.c stpattach_common(struct stp4020_softc *sc, int clockfreq)
sc 209 dev/sbus/stp4020.c rev = stp4020_rd_sockctl(&sc->sc_socks[0], STP4020_ISR1_IDX) &
sc 213 dev/sbus/stp4020.c sc->sc_pct = (pcmcia_chipset_tag_t)&stp4020_functions;
sc 219 dev/sbus/stp4020.c sc->events = 0;
sc 220 dev/sbus/stp4020.c kthread_create_deferred(stp4020_create_event_thread, sc);
sc 223 dev/sbus/stp4020.c struct stp4020_socket *h = &sc->sc_socks[i];
sc 225 dev/sbus/stp4020.c h->sc = sc;
sc 249 dev/sbus/stp4020.c paa.pct = (pcmcia_chipset_tag_t)h->sc->sc_pct;
sc 254 dev/sbus/stp4020.c h->pcmcia = config_found(&h->sc->sc_dev, &paa, stp4020print);
sc 296 dev/sbus/stp4020.c struct stp4020_softc *sc = arg;
sc 297 dev/sbus/stp4020.c const char *name = sc->sc_dev.dv_xname;
sc 299 dev/sbus/stp4020.c if (kthread_create(stp4020_event_thread, sc, &sc->event_thread,
sc 312 dev/sbus/stp4020.c struct stp4020_softc *sc = arg;
sc 320 dev/sbus/stp4020.c if ((socket = ffs(sc->events)) == 0) {
sc 322 dev/sbus/stp4020.c (void)tsleep(&sc->events, PWAIT, "stp4020_ev", 0);
sc 326 dev/sbus/stp4020.c sc->events &= ~(1 << socket);
sc 337 dev/sbus/stp4020.c h = &sc->sc_socks[socket];
sc 368 dev/sbus/stp4020.c stp4020_queue_event(sc, sock)
sc 369 dev/sbus/stp4020.c struct stp4020_softc *sc;
sc 375 dev/sbus/stp4020.c sc->events |= (1 << sock);
sc 377 dev/sbus/stp4020.c wakeup(&sc->events);
sc 384 dev/sbus/stp4020.c struct stp4020_softc *sc = arg;
sc 394 dev/sbus/stp4020.c h = &sc->sc_socks[i];
sc 427 dev/sbus/stp4020.c stp4020_queue_event(sc, i);
sc 484 dev/sbus/stp4020.c struct stp4020_softc *sc = arg;
sc 494 dev/sbus/stp4020.c h = &sc->sc_socks[i];
sc 774 dev/sbus/stp4020.c h->sc->sc_dev.dv_xname));
sc 780 dev/sbus/stp4020.c h->sc->sc_dev.dv_xname));
sc 49 dev/sbus/stp4020var.h struct stp4020_softc *sc; /* Back link */
sc 201 dev/sbus/tvtwo.c struct tvtwo_softc *sc = (struct tvtwo_softc *)self;
sc 227 dev/sbus/tvtwo.c sc->sc_bustag = bt;
sc 233 dev/sbus/tvtwo.c sc->sc_regs = bus_space_vaddr(bt, bh);
sc 258 dev/sbus/tvtwo.c sc->sc_sunfb.sf_depth = 8;
sc 259 dev/sbus/tvtwo.c sc->sc_sunfb.sf_width = width;
sc 260 dev/sbus/tvtwo.c sc->sc_sunfb.sf_height = height;
sc 261 dev/sbus/tvtwo.c sc->sc_sunfb.sf_linebytes = width >= 1024 ? width : 1024;
sc 262 dev/sbus/tvtwo.c sc->sc_sunfb.sf_fbsize = sc->sc_sunfb.sf_linebytes * height;
sc 265 dev/sbus/tvtwo.c sc->sc_paddr = sbus_bus_addr(bt, sa->sa_slot, sa->sa_offset);
sc 267 dev/sbus/tvtwo.c round_page(sc->sc_sunfb.sf_fbsize), BUS_SPACE_MAP_LINEAR, 0,
sc 272 dev/sbus/tvtwo.c sc->sc_m8 = bus_space_vaddr(bt, bh);
sc 274 dev/sbus/tvtwo.c round_page(4 * sc->sc_sunfb.sf_fbsize), BUS_SPACE_MAP_LINEAR, 0,
sc 279 dev/sbus/tvtwo.c sc->sc_m24 = bus_space_vaddr(bt, bh);
sc 282 dev/sbus/tvtwo.c tvtwo_burner(sc, 1, 0);
sc 284 dev/sbus/tvtwo.c sc->sc_sunfb.sf_ro.ri_hw = sc;
sc 285 dev/sbus/tvtwo.c sc->sc_sunfb.sf_ro.ri_bits = (u_char *)sc->sc_m8;
sc 291 dev/sbus/tvtwo.c fbwscons_init(&sc->sc_sunfb,
sc 293 dev/sbus/tvtwo.c fbwscons_setcolormap(&sc->sc_sunfb, tvtwo_setcolor);
sc 296 dev/sbus/tvtwo.c fbwscons_console_init(&sc->sc_sunfb,
sc 301 dev/sbus/tvtwo.c sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height);
sc 303 dev/sbus/tvtwo.c fbwscons_attach(&sc->sc_sunfb, &tvtwo_accessops, isconsole);
sc 309 dev/sbus/tvtwo.c struct tvtwo_softc *sc = dev;
sc 322 dev/sbus/tvtwo.c wdf->height = sc->sc_sunfb.sf_height;
sc 323 dev/sbus/tvtwo.c wdf->width = sc->sc_sunfb.sf_width;
sc 331 dev/sbus/tvtwo.c *(u_int *)data = sc->sc_sunfb.sf_linebytes * 4;
sc 341 dev/sbus/tvtwo.c tvtwo_reset(sc, 8);
sc 344 dev/sbus/tvtwo.c tvtwo_reset(sc, 32);
sc 371 dev/sbus/tvtwo.c struct tvtwo_softc *sc = v;
sc 377 dev/sbus/tvtwo.c if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize * 4) {
sc 378 dev/sbus/tvtwo.c return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr,
sc 389 dev/sbus/tvtwo.c struct tvtwo_softc *sc = v;
sc 391 dev/sbus/tvtwo.c if (sc->sc_nscreens > 0)
sc 394 dev/sbus/tvtwo.c *cookiep = &sc->sc_sunfb.sf_ro;
sc 397 dev/sbus/tvtwo.c sc->sc_sunfb.sf_ro.ri_ops.alloc_attr(&sc->sc_sunfb.sf_ro,
sc 399 dev/sbus/tvtwo.c sc->sc_nscreens++;
sc 406 dev/sbus/tvtwo.c struct tvtwo_softc *sc = v;
sc 408 dev/sbus/tvtwo.c sc->sc_nscreens--;
sc 421 dev/sbus/tvtwo.c struct tvtwo_softc *sc = v;
sc 432 dev/sbus/tvtwo.c *(volatile u_int32_t *)(sc->sc_regs + PX_REG_DISPKLUDGE) =
sc 437 dev/sbus/tvtwo.c tvtwo_reset(struct tvtwo_softc *sc, u_int depth)
sc 441 dev/sbus/tvtwo.c tvtwo_directcmap(sc);
sc 443 dev/sbus/tvtwo.c fbwscons_setcolormap(&sc->sc_sunfb, tvtwo_setcolor);
sc 452 dev/sbus/tvtwo.c tvtwo_ramdac_wraddr(struct tvtwo_softc *sc, u_int32_t addr)
sc 454 dev/sbus/tvtwo.c volatile u_int32_t *dac = (u_int32_t *)(sc->sc_regs + PX_REG_BT463_RED);
sc 461 dev/sbus/tvtwo.c tvtwo_directcmap(struct tvtwo_softc *sc)
sc 463 dev/sbus/tvtwo.c volatile u_int32_t *dac = (u_int32_t *)(sc->sc_regs + PX_REG_BT463_RED);
sc 466 dev/sbus/tvtwo.c tvtwo_ramdac_wraddr(sc, 0);
sc 477 dev/sbus/tvtwo.c struct tvtwo_softc *sc = v;
sc 478 dev/sbus/tvtwo.c volatile u_int32_t *dac = (u_int32_t *)(sc->sc_regs + PX_REG_BT463_RED);
sc 480 dev/sbus/tvtwo.c tvtwo_ramdac_wraddr(sc, index);
sc 112 dev/sbus/uperf_sbus.c struct uperf_sbus_softc *sc = (struct uperf_sbus_softc *)self;
sc 116 dev/sbus/uperf_sbus.c sc->sc_bus_t = sa->sa_bustag;
sc 117 dev/sbus/uperf_sbus.c sc->sc_usc.usc_cookie = sc;
sc 118 dev/sbus/uperf_sbus.c sc->sc_usc.usc_getcntsrc = uperf_sbus_getcntsrc;
sc 119 dev/sbus/uperf_sbus.c sc->sc_usc.usc_setcntsrc = uperf_sbus_setcntsrc;
sc 120 dev/sbus/uperf_sbus.c sc->sc_usc.usc_clrcnt = uperf_sbus_clrcnt;
sc 121 dev/sbus/uperf_sbus.c sc->sc_usc.usc_getcnt = uperf_sbus_getcnt;
sc 122 dev/sbus/uperf_sbus.c sc->sc_usc.usc_srcs = uperf_sbus_srcs;
sc 129 dev/sbus/uperf_sbus.c if (sbus_bus_map(sc->sc_bus_t, sa->sa_reg[0].sbr_slot,
sc 131 dev/sbus/uperf_sbus.c &sc->sc_bus_h) != 0) {
sc 136 dev/sbus/uperf_sbus.c id = uperf_sbus_read_reg(sc, USC_ID);
sc 151 dev/sbus/uperf_sbus.c uperf_sbus_read_reg(struct uperf_sbus_softc *sc, bus_size_t r)
sc 157 dev/sbus/uperf_sbus.c bus_space_write_1(sc->sc_bus_t, sc->sc_bus_h, USC_ADDR, r);
sc 158 dev/sbus/uperf_sbus.c bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_ADDR, 1,
sc 163 dev/sbus/uperf_sbus.c v = bus_space_read_1(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 0);
sc 164 dev/sbus/uperf_sbus.c bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 0, 1,
sc 168 dev/sbus/uperf_sbus.c v |= bus_space_read_1(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 1);
sc 169 dev/sbus/uperf_sbus.c bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 1, 1,
sc 173 dev/sbus/uperf_sbus.c v |= bus_space_read_1(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 2);
sc 174 dev/sbus/uperf_sbus.c bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 2, 1,
sc 178 dev/sbus/uperf_sbus.c v |= bus_space_read_1(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 3);
sc 179 dev/sbus/uperf_sbus.c bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 3, 1,
sc 190 dev/sbus/uperf_sbus.c uperf_sbus_write_reg(struct uperf_sbus_softc *sc, bus_size_t r, u_int32_t v)
sc 195 dev/sbus/uperf_sbus.c bus_space_write_1(sc->sc_bus_t, sc->sc_bus_h, USC_ADDR, r);
sc 196 dev/sbus/uperf_sbus.c bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_ADDR, 1,
sc 201 dev/sbus/uperf_sbus.c bus_space_write_1(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 0,
sc 203 dev/sbus/uperf_sbus.c bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 0, 1,
sc 206 dev/sbus/uperf_sbus.c bus_space_write_1(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 1,
sc 208 dev/sbus/uperf_sbus.c bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 1, 1,
sc 211 dev/sbus/uperf_sbus.c bus_space_write_1(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 2,
sc 213 dev/sbus/uperf_sbus.c bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 2, 1,
sc 216 dev/sbus/uperf_sbus.c bus_space_write_1(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 3,
sc 218 dev/sbus/uperf_sbus.c bus_space_barrier(sc->sc_bus_t, sc->sc_bus_h, USC_DATA + 3, 1,
sc 226 dev/sbus/uperf_sbus.c struct uperf_sbus_softc *sc = vsc;
sc 234 dev/sbus/uperf_sbus.c oldsrc = uperf_sbus_read_reg(sc, USC_PERFCTRL);
sc 235 dev/sbus/uperf_sbus.c uperf_sbus_write_reg(sc, USC_PERFCTRL, clr | oldsrc);
sc 243 dev/sbus/uperf_sbus.c struct uperf_sbus_softc *sc = vsc;
sc 246 dev/sbus/uperf_sbus.c src = uperf_sbus_read_reg(sc, USC_PERFCTRL);
sc 255 dev/sbus/uperf_sbus.c uperf_sbus_write_reg(sc, USC_PERFCTRL, src);
sc 262 dev/sbus/uperf_sbus.c struct uperf_sbus_softc *sc = vsc;
sc 265 dev/sbus/uperf_sbus.c src = uperf_sbus_read_reg(sc, USC_PERFCTRL);
sc 276 dev/sbus/uperf_sbus.c struct uperf_sbus_softc *sc = vsc;
sc 279 dev/sbus/uperf_sbus.c c0 = uperf_sbus_read_reg(sc, USC_PERF0);
sc 280 dev/sbus/uperf_sbus.c c1 = uperf_sbus_read_reg(sc, USC_PERFSHAD);
sc 248 dev/sbus/vigra.c struct vigra_softc *sc = (struct vigra_softc *)self;
sc 274 dev/sbus/vigra.c sc->sc_g300 = strncmp(nam, "VIGRA,vs11", strlen("VIGRA,vs11"));
sc 276 dev/sbus/vigra.c sc->sc_bustag = bt;
sc 284 dev/sbus/vigra.c sc->sc_regs = bus_space_vaddr(bt, bh);
sc 292 dev/sbus/vigra.c sc->sc_ramdac = bus_space_vaddr(bt, bh);
sc 295 dev/sbus/vigra.c vigra_burner(sc, 1, 0);
sc 297 dev/sbus/vigra.c fb_setsize(&sc->sc_sunfb, 8, 1152, 900, node, 0);
sc 300 dev/sbus/vigra.c round_page(sc->sc_sunfb.sf_fbsize), BUS_SPACE_MAP_LINEAR, 0,
sc 305 dev/sbus/vigra.c sc->sc_sunfb.sf_ro.ri_bits = bus_space_vaddr(bt, bh);
sc 306 dev/sbus/vigra.c sc->sc_sunfb.sf_ro.ri_hw = sc;
sc 307 dev/sbus/vigra.c sc->sc_paddr = sbus_bus_addr(bt, sa->sa_reg[VIGRA_REG_VRAM].sbr_slot,
sc 310 dev/sbus/vigra.c printf(", %dx%d\n", sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height);
sc 312 dev/sbus/vigra.c if ((sc->sc_ih = bus_intr_establish(sa->sa_bustag, sa->sa_pri,
sc 313 dev/sbus/vigra.c IPL_TTY, 0, vigra_intr, sc, self->dv_xname)) == NULL) {
sc 333 dev/sbus/vigra.c fbwscons_init(&sc->sc_sunfb, isconsole && (sc->sc_sunfb.sf_width != 800
sc 334 dev/sbus/vigra.c && sc->sc_sunfb.sf_width != 1280) ? 0 : RI_CLEAR);
sc 335 dev/sbus/vigra.c fbwscons_setcolormap(&sc->sc_sunfb, vigra_setcolor);
sc 338 dev/sbus/vigra.c switch (sc->sc_sunfb.sf_width) {
sc 340 dev/sbus/vigra.c row = sc->sc_sunfb.sf_ro.ri_rows - 1;
sc 351 dev/sbus/vigra.c fbwscons_console_init(&sc->sc_sunfb, row);
sc 354 dev/sbus/vigra.c fbwscons_attach(&sc->sc_sunfb, &vigra_accessops, isconsole);
sc 360 dev/sbus/vigra.c struct vigra_softc *sc = v;
sc 371 dev/sbus/vigra.c wdf->height = sc->sc_sunfb.sf_height;
sc 372 dev/sbus/vigra.c wdf->width = sc->sc_sunfb.sf_width;
sc 373 dev/sbus/vigra.c wdf->depth = sc->sc_sunfb.sf_depth;
sc 377 dev/sbus/vigra.c *(u_int *)data = sc->sc_sunfb.sf_linebytes;
sc 382 dev/sbus/vigra.c error = vigra_getcmap(&sc->sc_cmap, cm, sc->sc_g300);
sc 388 dev/sbus/vigra.c error = vigra_putcmap(&sc->sc_cmap, cm, sc->sc_g300);
sc 392 dev/sbus/vigra.c if (sc->sc_ih != NULL)
sc 393 dev/sbus/vigra.c vigra_loadcmap_deferred(sc, cm->index, cm->count);
sc 395 dev/sbus/vigra.c vigra_loadcmap_immediate(sc, cm->index, cm->count);
sc 418 dev/sbus/vigra.c struct vigra_softc *sc = v;
sc 420 dev/sbus/vigra.c if (sc->sc_nscreens > 0)
sc 423 dev/sbus/vigra.c *cookiep = &sc->sc_sunfb.sf_ro;
sc 426 dev/sbus/vigra.c sc->sc_sunfb.sf_ro.ri_ops.alloc_attr(&sc->sc_sunfb.sf_ro,
sc 428 dev/sbus/vigra.c sc->sc_nscreens++;
sc 435 dev/sbus/vigra.c struct vigra_softc *sc = v;
sc 437 dev/sbus/vigra.c sc->sc_nscreens--;
sc 454 dev/sbus/vigra.c struct vigra_softc *sc = v;
sc 459 dev/sbus/vigra.c if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {
sc 460 dev/sbus/vigra.c return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr,
sc 470 dev/sbus/vigra.c struct vigra_softc *sc = v;
sc 472 dev/sbus/vigra.c if (sc->sc_g300) {
sc 473 dev/sbus/vigra.c sc->sc_cmap.cm_map[index][3] = r;
sc 474 dev/sbus/vigra.c sc->sc_cmap.cm_map[index][2] = g;
sc 475 dev/sbus/vigra.c sc->sc_cmap.cm_map[index][1] = b;
sc 477 dev/sbus/vigra.c sc->sc_cmap.cm_map[index][3] = b;
sc 478 dev/sbus/vigra.c sc->sc_cmap.cm_map[index][2] = g;
sc 479 dev/sbus/vigra.c sc->sc_cmap.cm_map[index][1] = r;
sc 481 dev/sbus/vigra.c sc->sc_cmap.cm_map[index][0] = 0; /* no alpha channel */
sc 483 dev/sbus/vigra.c vigra_loadcmap_immediate(sc, index, 1);
sc 562 dev/sbus/vigra.c vigra_loadcmap_immediate(struct vigra_softc *sc, int start, int ncolors)
sc 564 dev/sbus/vigra.c u_int32_t *colp = &sc->sc_cmap.cm_chip[start];
sc 567 dev/sbus/vigra.c if (sc->sc_g300)
sc 568 dev/sbus/vigra.c lutp = &(sc->sc_ramdac->g300.cmap[start]);
sc 570 dev/sbus/vigra.c lutp = &(sc->sc_ramdac->g335.cmap[start]);
sc 577 dev/sbus/vigra.c vigra_loadcmap_deferred(struct vigra_softc *sc, u_int start, u_int ncolors)
sc 580 dev/sbus/vigra.c sc->sc_regs->imr = 1;
sc 586 dev/sbus/vigra.c struct vigra_softc *sc = v;
sc 589 dev/sbus/vigra.c sc->sc_regs->bcr = 0;
sc 591 dev/sbus/vigra.c sc->sc_regs->bcr = 1;
sc 598 dev/sbus/vigra.c struct vigra_softc *sc = v;
sc 600 dev/sbus/vigra.c if (sc->sc_regs->imr == 0 ||
sc 601 dev/sbus/vigra.c !ISSET(sc->sc_regs->g3sr, STATUS_INTR)) {
sc 607 dev/sbus/vigra.c sc->sc_regs->imr = 0;
sc 609 dev/sbus/vigra.c vigra_loadcmap_immediate(sc, 0, 256);
sc 53 dev/sbus/xbox.c int xbox_fix_range(struct xbox_softc *sc, struct sbus_softc *sbp);
sc 77 dev/sbus/xbox.c struct xbox_softc *sc = (struct xbox_softc *)self;
sc 93 dev/sbus/xbox.c sc->sc_key = getpropint(node, "write0-key", -1);
sc 94 dev/sbus/xbox.c sc->sc_node = node;
sc 108 dev/sbus/xbox.c (sc->sc_key << 24) | XAC_CTL1_OFFSET |
sc 111 dev/sbus/xbox.c (sc->sc_key << 24) | XBC_CTL1_OFFSET |
sc 119 dev/sbus/xbox.c if (xbox_fix_range(sc, (struct sbus_softc *)parent) != 0)
sc 128 dev/sbus/xbox.c (void)config_found(&sc->sc_dev, (void *)&xa, xboxprint);
sc 135 dev/sbus/xbox.c xbox_fix_range(struct xbox_softc *sc, struct sbus_softc *sbp)
sc 139 dev/sbus/xbox.c error = getprop(sc->sc_node, "ranges", sizeof(struct sbus_range),
sc 140 dev/sbus/xbox.c &sc->sc_nrange, (void **)&sc->sc_range);
sc 142 dev/sbus/xbox.c printf("%s: PROM ranges too large\n", sc->sc_dev.dv_xname);
sc 146 dev/sbus/xbox.c for (i = 0; i < sc->sc_nrange; i++) {
sc 148 dev/sbus/xbox.c if (sc->sc_range[i].pspace == sbp->sc_range[j].cspace) {
sc 149 dev/sbus/xbox.c sc->sc_range[i].poffset +=
sc 151 dev/sbus/xbox.c sc->sc_range[i].pspace =
sc 203 dev/sbus/zx.c struct zx_softc *sc = (struct zx_softc *)self;
sc 212 dev/sbus/zx.c ri = &sc->sc_sunfb.sf_ro;
sc 218 dev/sbus/zx.c sc->sc_bustag = bt;
sc 219 dev/sbus/zx.c sc->sc_paddr = sbus_bus_addr(bt, sa->sa_slot, sa->sa_offset);
sc 226 dev/sbus/zx.c sc->sc_zc = (struct zx_command *)bus_space_vaddr(bt, bh);
sc 233 dev/sbus/zx.c sc->sc_zd_ss0 = (struct zx_draw *)bus_space_vaddr(bt, bh);
sc 240 dev/sbus/zx.c sc->sc_zd_ss1 = (struct zx_draw_ss1 *)bus_space_vaddr(bt, bh);
sc 247 dev/sbus/zx.c sc->sc_zx = (struct zx_cross *)bus_space_vaddr(bt, bh);
sc 254 dev/sbus/zx.c sc->sc_zcu = (struct zx_cursor *)bus_space_vaddr(bt, bh);
sc 271 dev/sbus/zx.c sc->sc_sunfb.sf_depth = 8;
sc 272 dev/sbus/zx.c sc->sc_sunfb.sf_width = getpropint(node, "width", 1152);
sc 273 dev/sbus/zx.c sc->sc_sunfb.sf_height = getpropint(node, "height", 900);
sc 274 dev/sbus/zx.c sc->sc_sunfb.sf_linebytes = 1 << ZX_BWIDTH;
sc 275 dev/sbus/zx.c sc->sc_sunfb.sf_fbsize = sc->sc_sunfb.sf_height << ZX_BWIDTH;
sc 277 dev/sbus/zx.c printf(", %dx%d\n", sc->sc_sunfb.sf_width, sc->sc_sunfb.sf_height);
sc 280 dev/sbus/zx.c round_page(sc->sc_sunfb.sf_fbsize), BUS_SPACE_MAP_LINEAR,
sc 286 dev/sbus/zx.c ri->ri_hw = sc;
sc 288 dev/sbus/zx.c fbwscons_init(&sc->sc_sunfb, isconsole ? 0 : RI_CLEAR);
sc 318 dev/sbus/zx.c fbwscons_console_init(&sc->sc_sunfb, 0);
sc 322 dev/sbus/zx.c zx_reset(sc, WSDISPLAYIO_MODE_EMUL);
sc 325 dev/sbus/zx.c zx_burner(sc, 1, 0);
sc 327 dev/sbus/zx.c fbwscons_attach(&sc->sc_sunfb, &zx_accessops, isconsole);
sc 333 dev/sbus/zx.c struct zx_softc *sc = dev;
sc 347 dev/sbus/zx.c wdf->height = sc->sc_sunfb.sf_height;
sc 348 dev/sbus/zx.c wdf->width = sc->sc_sunfb.sf_width;
sc 356 dev/sbus/zx.c *(u_int *)data = sc->sc_sunfb.sf_linebytes;
sc 364 dev/sbus/zx.c zx_reset(sc, *(u_int *)data);
sc 382 dev/sbus/zx.c struct zx_softc *sc = v;
sc 384 dev/sbus/zx.c if (sc->sc_nscreens > 0)
sc 387 dev/sbus/zx.c *cookiep = &sc->sc_sunfb.sf_ro;
sc 390 dev/sbus/zx.c sc->sc_sunfb.sf_ro.ri_ops.alloc_attr(&sc->sc_sunfb.sf_ro,
sc 392 dev/sbus/zx.c sc->sc_nscreens++;
sc 399 dev/sbus/zx.c struct zx_softc *sc = v;
sc 401 dev/sbus/zx.c sc->sc_nscreens--;
sc 418 dev/sbus/zx.c struct zx_softc *sc = v;
sc 424 dev/sbus/zx.c if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {
sc 425 dev/sbus/zx.c return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr,
sc 435 dev/sbus/zx.c struct zx_softc *sc = v;
sc 437 dev/sbus/zx.c sc->sc_cmap.cm_red[index] = r;
sc 438 dev/sbus/zx.c sc->sc_cmap.cm_green[index] = g;
sc 439 dev/sbus/zx.c sc->sc_cmap.cm_blue[index] = b;
sc 443 dev/sbus/zx.c zx_reset(struct zx_softc *sc, u_int mode)
sc 451 dev/sbus/zx.c zd = sc->sc_zd_ss0;
sc 452 dev/sbus/zx.c zc = sc->sc_zc;
sc 456 dev/sbus/zx.c zx_cross_loadwid(sc, ZX_WID_DBL_8, 0, 0x2c0);
sc 457 dev/sbus/zx.c zx_cross_loadwid(sc, ZX_WID_DBL_8, 1, 0x30);
sc 458 dev/sbus/zx.c zx_cross_loadwid(sc, ZX_WID_DBL_8, 2, 0x20);
sc 459 dev/sbus/zx.c zx_cross_loadwid(sc, ZX_WID_DBL_24, 1, 0x30);
sc 461 dev/sbus/zx.c i = sc->sc_zd_ss1->zd_misc;
sc 463 dev/sbus/zx.c SETREG(sc->sc_zd_ss1->zd_misc, i);
sc 474 dev/sbus/zx.c SETREG(zd->zd_vclipmax, (sc->sc_sunfb.sf_width - 1) |
sc 475 dev/sbus/zx.c ((sc->sc_sunfb.sf_height - 1) << 16));
sc 481 dev/sbus/zx.c SETREG(zc->zc_extent, ZX_COORDS(sc->sc_sunfb.sf_width - 1,
sc 482 dev/sbus/zx.c sc->sc_sunfb.sf_height - 1));
sc 493 dev/sbus/zx.c r = sc->sc_cmap.cm_red;
sc 494 dev/sbus/zx.c g = sc->sc_cmap.cm_green;
sc 495 dev/sbus/zx.c b = sc->sc_cmap.cm_blue;
sc 502 dev/sbus/zx.c fbwscons_setcolormap(&sc->sc_sunfb, zx_setcolor);
sc 503 dev/sbus/zx.c zx_putcmap(sc);
sc 510 dev/sbus/zx.c SETREG(zc->zc_extent, ZX_COORDS(sc->sc_sunfb.sf_width - 1,
sc 511 dev/sbus/zx.c sc->sc_sunfb.sf_height - 1));
sc 523 dev/sbus/zx.c zx_cross_wait(struct zx_softc *sc)
sc 528 dev/sbus/zx.c zx = sc->sc_zx;
sc 538 dev/sbus/zx.c sc->sc_sunfb.sf_dev.dv_xname);
sc 544 dev/sbus/zx.c zx_cross_loadwid(struct zx_softc *sc, u_int type, u_int index, u_int value)
sc 549 dev/sbus/zx.c zx = sc->sc_zx;
sc 552 dev/sbus/zx.c if (!zx_cross_wait(sc))
sc 569 dev/sbus/zx.c zx_putcmap(struct zx_softc *sc)
sc 575 dev/sbus/zx.c zx = sc->sc_zx;
sc 578 dev/sbus/zx.c if (!zx_cross_wait(sc))
sc 583 dev/sbus/zx.c r = sc->sc_cmap.cm_red;
sc 584 dev/sbus/zx.c g = sc->sc_cmap.cm_green;
sc 585 dev/sbus/zx.c b = sc->sc_cmap.cm_blue;
sc 600 dev/sbus/zx.c struct zx_softc *sc = v;
sc 604 dev/sbus/zx.c zx = sc->sc_zx;
sc 620 dev/sbus/zx.c struct zx_softc *sc;
sc 625 dev/sbus/zx.c sc = ri->ri_hw;
sc 626 dev/sbus/zx.c zc = sc->sc_zc;
sc 627 dev/sbus/zx.c zd = sc->sc_zd_ss0;
sc 648 dev/sbus/zx.c struct zx_softc *sc;
sc 653 dev/sbus/zx.c sc = ri->ri_hw;
sc 654 dev/sbus/zx.c zc = sc->sc_zc;
sc 655 dev/sbus/zx.c zd = sc->sc_zd_ss0;
sc 705 dev/sbus/zx.c struct zx_softc *sc;
sc 713 dev/sbus/zx.c sc = ri->ri_hw;
sc 714 dev/sbus/zx.c zc = sc->sc_zc;
sc 715 dev/sbus/zx.c zd = sc->sc_zd_ss0;
sc 755 dev/sbus/zx.c struct zx_softc *sc;
sc 787 dev/sbus/zx.c sc = ri->ri_hw;
sc 788 dev/sbus/zx.c zc = sc->sc_zc;
sc 789 dev/sbus/zx.c zd = sc->sc_zd_ss0;
sc 35 dev/sdmmc/sbt.c #define CSR_READ_1(sc, reg) sdmmc_io_read_1((sc)->sc_sf, (reg))
sc 36 dev/sdmmc/sbt.c #define CSR_WRITE_1(sc, reg, val) sdmmc_io_write_1((sc)->sc_sf, (reg), (val))
sc 92 dev/sdmmc/sbt.c #define DEVNAME(sc) ((sc)->sc_dev.dv_xname)
sc 128 dev/sdmmc/sbt.c sf = sa->sf->sc->sc_fn0;
sc 142 dev/sdmmc/sbt.c struct sbt_softc *sc = (struct sbt_softc *)self;
sc 147 dev/sdmmc/sbt.c sc->sc_sf = sa->sf;
sc 149 dev/sdmmc/sbt.c (void)sdmmc_io_function_disable(sc->sc_sf);
sc 150 dev/sdmmc/sbt.c if (sdmmc_io_function_enable(sc->sc_sf)) {
sc 151 dev/sdmmc/sbt.c printf("%s: function not ready\n", DEVNAME(sc));
sc 156 dev/sdmmc/sbt.c printf("%s: SDIO Bluetooth Type-A\n", DEVNAME(sc));
sc 158 dev/sdmmc/sbt.c sc->sc_buf = malloc(SBT_PKT_BUFSIZ, M_DEVBUF,
sc 160 dev/sdmmc/sbt.c if (sc->sc_buf == NULL) {
sc 161 dev/sdmmc/sbt.c printf("%s: can't allocate cmd buffer\n", DEVNAME(sc));
sc 166 dev/sdmmc/sbt.c CSR_WRITE_1(sc, SBT_REG_IENA, ISTAT_INTRD);
sc 169 dev/sdmmc/sbt.c sc->sc_ih = sdmmc_intr_establish(parent, sbt_intr, sc, DEVNAME(sc));
sc 170 dev/sdmmc/sbt.c if (sc->sc_ih == NULL) {
sc 171 dev/sdmmc/sbt.c printf("%s: can't establish interrupt\n", DEVNAME(sc));
sc 174 dev/sdmmc/sbt.c sdmmc_intr_enable(sc->sc_sf);
sc 179 dev/sdmmc/sbt.c sc->sc_unit.hci_softc = self;
sc 180 dev/sdmmc/sbt.c sc->sc_unit.hci_devname = DEVNAME(sc);
sc 181 dev/sdmmc/sbt.c sc->sc_unit.hci_enable = sbt_enable;
sc 182 dev/sdmmc/sbt.c sc->sc_unit.hci_disable = sbt_disable;
sc 183 dev/sdmmc/sbt.c sc->sc_unit.hci_start_cmd = sbt_start_cmd;
sc 184 dev/sdmmc/sbt.c sc->sc_unit.hci_start_acl = sbt_start_acl;
sc 185 dev/sdmmc/sbt.c sc->sc_unit.hci_start_sco = sbt_start_sco;
sc 186 dev/sdmmc/sbt.c sc->sc_unit.hci_ipl = IPL_TTY; /* XXX */
sc 187 dev/sdmmc/sbt.c hci_attach(&sc->sc_unit);
sc 193 dev/sdmmc/sbt.c struct sbt_softc *sc = (struct sbt_softc *)self;
sc 195 dev/sdmmc/sbt.c sc->sc_dying = 1;
sc 196 dev/sdmmc/sbt.c while (sc->sc_thread != NULL)
sc 197 dev/sdmmc/sbt.c tsleep(sc, PWAIT, "dying", 0);
sc 199 dev/sdmmc/sbt.c hci_detach(&sc->sc_unit);
sc 201 dev/sdmmc/sbt.c if (sc->sc_ih != NULL)
sc 202 dev/sdmmc/sbt.c sdmmc_intr_disestablish(sc->sc_ih);
sc 213 dev/sdmmc/sbt.c sbt_write_packet(struct sbt_softc *sc, u_char *buf, size_t len)
sc 222 dev/sdmmc/sbt.c DPRINTF(("%s: sbt_write_cmd: giving up\n", DEVNAME(sc)));
sc 227 dev/sdmmc/sbt.c sdmmc_io_write_1(sc->sc_sf, SBT_REG_WPC, WPC_PCWRT);
sc 234 dev/sdmmc/sbt.c error = sdmmc_io_write_multi_1(sc->sc_sf, SBT_REG_DAT, hdr, 3);
sc 237 dev/sdmmc/sbt.c DEVNAME(sc)));
sc 241 dev/sdmmc/sbt.c error = sdmmc_io_write_multi_1(sc->sc_sf, SBT_REG_DAT, buf, len);
sc 244 dev/sdmmc/sbt.c DEVNAME(sc)));
sc 251 dev/sdmmc/sbt.c sbt_read_packet(struct sbt_softc *sc, u_char *buf, size_t *lenp)
sc 257 dev/sdmmc/sbt.c error = sdmmc_io_read_multi_1(sc->sc_sf, SBT_REG_DAT, hdr, 3);
sc 260 dev/sdmmc/sbt.c DEVNAME(sc)));
sc 266 dev/sdmmc/sbt.c DEVNAME(sc), len, *lenp));
sc 272 dev/sdmmc/sbt.c DEVNAME(sc), len));
sc 273 dev/sdmmc/sbt.c error = sdmmc_io_read_multi_1(sc->sc_sf, SBT_REG_DAT, buf, len);
sc 276 dev/sdmmc/sbt.c DEVNAME(sc)));
sc 282 dev/sdmmc/sbt.c if (sc->sc_rxtry >= SBT_RXTRY_MAX) {
sc 284 dev/sdmmc/sbt.c sc->sc_rxtry = 0;
sc 285 dev/sdmmc/sbt.c CSR_WRITE_1(sc, SBT_REG_RPC, 0);
sc 288 dev/sdmmc/sbt.c sc->sc_rxtry++;
sc 289 dev/sdmmc/sbt.c CSR_WRITE_1(sc, SBT_REG_RPC, RPC_PCRRT);
sc 295 dev/sdmmc/sbt.c CSR_WRITE_1(sc, SBT_REG_RPC, 0);
sc 308 dev/sdmmc/sbt.c struct sbt_softc *sc = arg;
sc 316 dev/sdmmc/sbt.c status = CSR_READ_1(sc, SBT_REG_ISTAT);
sc 317 dev/sdmmc/sbt.c CSR_WRITE_1(sc, SBT_REG_ICLR, status);
sc 323 dev/sdmmc/sbt.c if (sbt_read_packet(sc, sc->sc_buf, &len) != 0 || len == 0) {
sc 324 dev/sdmmc/sbt.c DPRINTF(("%s: sbt_intr: read failed\n", DEVNAME(sc)));
sc 330 dev/sdmmc/sbt.c DPRINTF(("%s: sbt_intr: MGETHDR failed\n", DEVNAME(sc)));
sc 335 dev/sdmmc/sbt.c m_copyback(m, 0, len, sc->sc_buf);
sc 340 dev/sdmmc/sbt.c DPRINTF(("%s: sbt_intr: m_copyback failed\n", DEVNAME(sc)));
sc 347 dev/sdmmc/sbt.c switch (sc->sc_buf[0]) {
sc 350 dev/sdmmc/sbt.c DEVNAME(sc), m->m_pkthdr.len));
sc 351 dev/sdmmc/sbt.c hci_input_acl(&sc->sc_unit, m);
sc 355 dev/sdmmc/sbt.c DEVNAME(sc), m->m_pkthdr.len));
sc 356 dev/sdmmc/sbt.c hci_input_sco(&sc->sc_unit, m);
sc 360 dev/sdmmc/sbt.c DEVNAME(sc), m->m_pkthdr.len));
sc 361 dev/sdmmc/sbt.c hci_input_event(&sc->sc_unit, m);
sc 365 dev/sdmmc/sbt.c DEVNAME(sc), sc->sc_buf[0], m->m_pkthdr.len));
sc 366 dev/sdmmc/sbt.c sc->sc_unit.hci_stats.err_rx++;
sc 371 dev/sdmmc/sbt.c sc->sc_unit.hci_stats.err_rx++;
sc 402 dev/sdmmc/sbt.c if (sc->sc_rxp) {
sc 403 dev/sdmmc/sbt.c m_freem(sc->sc_rxp);
sc 404 dev/sdmmc/sbt.c sc->sc_rxp = NULL;
sc 407 dev/sdmmc/sbt.c if (sc->sc_txp) {
sc 408 dev/sdmmc/sbt.c m_freem(sc->sc_txp);
sc 409 dev/sdmmc/sbt.c sc->sc_txp = NULL;
sc 419 dev/sdmmc/sbt.c struct sbt_softc *sc = (struct sbt_softc *)unit->hci_softc;
sc 426 dev/sdmmc/sbt.c if (sc->sc_dying || IF_IS_EMPTY(q))
sc 443 dev/sdmmc/sbt.c DNPRINTF(1,("%s: xmit %s packet (%d bytes)\n", DEVNAME(sc),
sc 450 dev/sdmmc/sbt.c m_copydata(m, 0, len, sc->sc_buf);
sc 453 dev/sdmmc/sbt.c if (sbt_write_packet(sc, sc->sc_buf, len))
sc 454 dev/sdmmc/sbt.c DPRINTF(("%s: sbt_write_packet failed\n", DEVNAME(sc)));
sc 42 dev/sdmmc/sdhc.c struct sdhc_softc *sc; /* host controller device */
sc 55 dev/sdmmc/sdhc.c #define HDEVNAME(hp) ((hp)->sc->sc_dev.dv_xname)
sc 133 dev/sdmmc/sdhc.c sdhc_host_found(struct sdhc_softc *sc, bus_space_tag_t iot,
sc 145 dev/sdmmc/sdhc.c sc->sc_dev.dv_xname);
sc 157 dev/sdmmc/sdhc.c sc->sc_nhosts++;
sc 160 dev/sdmmc/sdhc.c sc->sc_host[sc->sc_nhosts - 1] = hp;
sc 164 dev/sdmmc/sdhc.c hp->sc = sc;
sc 188 dev/sdmmc/sdhc.c sc->sc_dev.dv_xname);
sc 193 dev/sdmmc/sdhc.c sc->sc_dev.dv_xname, hp->clkbase / 1000);
sc 240 dev/sdmmc/sdhc.c hp->sdmmc = config_found(&sc->sc_dev, &saa, NULL);
sc 250 dev/sdmmc/sdhc.c sc->sc_host[sc->sc_nhosts - 1] = NULL;
sc 251 dev/sdmmc/sdhc.c sc->sc_nhosts--;
sc 261 dev/sdmmc/sdhc.c struct sdhc_softc *sc = arg;
sc 272 dev/sdmmc/sdhc.c for (n = 0; n < sc->sc_nhosts; n++) {
sc 273 dev/sdmmc/sdhc.c hp = sc->sc_host[n];
sc 281 dev/sdmmc/sdhc.c for (n = 0; n < sc->sc_nhosts; n++) {
sc 282 dev/sdmmc/sdhc.c hp = sc->sc_host[n];
sc 297 dev/sdmmc/sdhc.c struct sdhc_softc *sc = arg;
sc 302 dev/sdmmc/sdhc.c for (i = 0; i < sc->sc_nhosts; i++) {
sc 303 dev/sdmmc/sdhc.c hp = sc->sc_host[i];
sc 879 dev/sdmmc/sdhc.c struct sdhc_softc *sc = arg;
sc 884 dev/sdmmc/sdhc.c for (host = 0; host < sc->sc_nhosts; host++) {
sc 885 dev/sdmmc/sdhc.c struct sdhc_host *hp = sc->sc_host[host];
sc 67 dev/sdmmc/sdmmc.c #define DEVNAME(sc) SDMMCDEVNAME(sc)
sc 98 dev/sdmmc/sdmmc.c struct sdmmc_softc *sc = (struct sdmmc_softc *)self;
sc 103 dev/sdmmc/sdmmc.c sc->sct = saa->sct;
sc 104 dev/sdmmc/sdmmc.c sc->sch = saa->sch;
sc 106 dev/sdmmc/sdmmc.c SIMPLEQ_INIT(&sc->sf_head);
sc 107 dev/sdmmc/sdmmc.c TAILQ_INIT(&sc->sc_tskq);
sc 108 dev/sdmmc/sdmmc.c TAILQ_INIT(&sc->sc_intrq);
sc 109 dev/sdmmc/sdmmc.c sdmmc_init_task(&sc->sc_discover_task, sdmmc_discover_task, sc);
sc 110 dev/sdmmc/sdmmc.c sdmmc_init_task(&sc->sc_intr_task, sdmmc_intr_task, sc);
sc 111 dev/sdmmc/sdmmc.c lockinit(&sc->sc_lock, PRIBIO, DEVNAME(sc), 0, LK_CANRECURSE);
sc 115 dev/sdmmc/sdmmc.c printf("%s: unable to register ioctl\n", DEVNAME(sc));
sc 125 dev/sdmmc/sdmmc.c kthread_create_deferred(sdmmc_create_thread, sc);
sc 131 dev/sdmmc/sdmmc.c struct sdmmc_softc *sc = (struct sdmmc_softc *)self;
sc 133 dev/sdmmc/sdmmc.c sc->sc_dying = 1;
sc 134 dev/sdmmc/sdmmc.c while (sc->sc_task_thread != NULL) {
sc 135 dev/sdmmc/sdmmc.c wakeup(&sc->sc_tskq);
sc 136 dev/sdmmc/sdmmc.c tsleep(sc, PWAIT, "mmcdie", 0);
sc 144 dev/sdmmc/sdmmc.c struct sdmmc_softc *sc = arg;
sc 146 dev/sdmmc/sdmmc.c if (kthread_create(sdmmc_task_thread, sc, &sc->sc_task_thread,
sc 147 dev/sdmmc/sdmmc.c "%s", DEVNAME(sc)) != 0)
sc 148 dev/sdmmc/sdmmc.c printf("%s: can't create task thread\n", DEVNAME(sc));
sc 158 dev/sdmmc/sdmmc.c struct sdmmc_softc *sc = arg;
sc 162 dev/sdmmc/sdmmc.c sdmmc_needs_discover(&sc->sc_dev);
sc 165 dev/sdmmc/sdmmc.c while (!sc->sc_dying) {
sc 166 dev/sdmmc/sdmmc.c for (task = TAILQ_FIRST(&sc->sc_tskq); task != NULL;
sc 167 dev/sdmmc/sdmmc.c task = TAILQ_FIRST(&sc->sc_tskq)) {
sc 173 dev/sdmmc/sdmmc.c tsleep(&sc->sc_tskq, PWAIT, "mmctsk", 0);
sc 177 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_CARD_PRESENT))
sc 178 dev/sdmmc/sdmmc.c sdmmc_card_detach(sc, DETACH_FORCE);
sc 180 dev/sdmmc/sdmmc.c sc->sc_task_thread = NULL;
sc 181 dev/sdmmc/sdmmc.c wakeup(sc);
sc 186 dev/sdmmc/sdmmc.c sdmmc_add_task(struct sdmmc_softc *sc, struct sdmmc_task *task)
sc 191 dev/sdmmc/sdmmc.c TAILQ_INSERT_TAIL(&sc->sc_tskq, task, next);
sc 193 dev/sdmmc/sdmmc.c task->sc = sc;
sc 194 dev/sdmmc/sdmmc.c wakeup(&sc->sc_tskq);
sc 201 dev/sdmmc/sdmmc.c struct sdmmc_softc *sc = task->sc;
sc 204 dev/sdmmc/sdmmc.c if (sc == NULL)
sc 208 dev/sdmmc/sdmmc.c task->sc = NULL;
sc 210 dev/sdmmc/sdmmc.c TAILQ_REMOVE(&sc->sc_tskq, task, next);
sc 217 dev/sdmmc/sdmmc.c struct sdmmc_softc *sc = (struct sdmmc_softc *)self;
sc 219 dev/sdmmc/sdmmc.c if (!sdmmc_task_pending(&sc->sc_discover_task))
sc 220 dev/sdmmc/sdmmc.c sdmmc_add_task(sc, &sc->sc_discover_task);
sc 226 dev/sdmmc/sdmmc.c struct sdmmc_softc *sc = arg;
sc 228 dev/sdmmc/sdmmc.c if (sdmmc_chip_card_detect(sc->sct, sc->sch)) {
sc 229 dev/sdmmc/sdmmc.c if (!ISSET(sc->sc_flags, SMF_CARD_PRESENT)) {
sc 230 dev/sdmmc/sdmmc.c SET(sc->sc_flags, SMF_CARD_PRESENT);
sc 231 dev/sdmmc/sdmmc.c sdmmc_card_attach(sc);
sc 234 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_CARD_PRESENT)) {
sc 235 dev/sdmmc/sdmmc.c CLR(sc->sc_flags, SMF_CARD_PRESENT);
sc 236 dev/sdmmc/sdmmc.c sdmmc_card_detach(sc, DETACH_FORCE);
sc 245 dev/sdmmc/sdmmc.c sdmmc_card_attach(struct sdmmc_softc *sc)
sc 247 dev/sdmmc/sdmmc.c DPRINTF(1,("%s: attach card\n", DEVNAME(sc)));
sc 249 dev/sdmmc/sdmmc.c SDMMC_LOCK(sc);
sc 250 dev/sdmmc/sdmmc.c CLR(sc->sc_flags, SMF_CARD_ATTACHED);
sc 255 dev/sdmmc/sdmmc.c if (sdmmc_enable(sc) != 0) {
sc 256 dev/sdmmc/sdmmc.c printf("%s: can't enable card\n", DEVNAME(sc));
sc 264 dev/sdmmc/sdmmc.c if (sdmmc_scan(sc) != 0) {
sc 265 dev/sdmmc/sdmmc.c printf("%s: no functions\n", DEVNAME(sc));
sc 272 dev/sdmmc/sdmmc.c if (sdmmc_init(sc) != 0) {
sc 273 dev/sdmmc/sdmmc.c printf("%s: init failed\n", DEVNAME(sc));
sc 278 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_MEM_MODE))
sc 279 dev/sdmmc/sdmmc.c sdmmc_scsi_attach(sc);
sc 282 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_IO_MODE))
sc 283 dev/sdmmc/sdmmc.c sdmmc_io_attach(sc);
sc 285 dev/sdmmc/sdmmc.c SET(sc->sc_flags, SMF_CARD_ATTACHED);
sc 286 dev/sdmmc/sdmmc.c SDMMC_UNLOCK(sc);
sc 289 dev/sdmmc/sdmmc.c sdmmc_card_detach(sc, DETACH_FORCE);
sc 290 dev/sdmmc/sdmmc.c SDMMC_UNLOCK(sc);
sc 298 dev/sdmmc/sdmmc.c sdmmc_card_detach(struct sdmmc_softc *sc, int flags)
sc 302 dev/sdmmc/sdmmc.c DPRINTF(1,("%s: detach card\n", DEVNAME(sc)));
sc 304 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_CARD_ATTACHED)) {
sc 306 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_IO_MODE))
sc 307 dev/sdmmc/sdmmc.c sdmmc_io_detach(sc);
sc 310 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_MEM_MODE))
sc 311 dev/sdmmc/sdmmc.c sdmmc_scsi_detach(sc);
sc 313 dev/sdmmc/sdmmc.c CLR(sc->sc_flags, SMF_CARD_ATTACHED);
sc 317 dev/sdmmc/sdmmc.c sdmmc_disable(sc);
sc 320 dev/sdmmc/sdmmc.c for (sf = SIMPLEQ_FIRST(&sc->sf_head); sf != NULL; sf = sfnext) {
sc 324 dev/sdmmc/sdmmc.c SIMPLEQ_INIT(&sc->sf_head);
sc 325 dev/sdmmc/sdmmc.c sc->sc_function_count = 0;
sc 326 dev/sdmmc/sdmmc.c sc->sc_fn0 = NULL;
sc 330 dev/sdmmc/sdmmc.c sdmmc_enable(struct sdmmc_softc *sc)
sc 339 dev/sdmmc/sdmmc.c host_ocr = sdmmc_chip_host_ocr(sc->sct, sc->sch);
sc 340 dev/sdmmc/sdmmc.c error = sdmmc_chip_bus_power(sc->sct, sc->sch, host_ocr);
sc 342 dev/sdmmc/sdmmc.c printf("%s: can't supply bus power\n", DEVNAME(sc));
sc 349 dev/sdmmc/sdmmc.c error = sdmmc_chip_bus_clock(sc->sct, sc->sch, SDMMC_SDCLK_400KHZ);
sc 351 dev/sdmmc/sdmmc.c printf("%s: can't supply clock\n", DEVNAME(sc));
sc 359 dev/sdmmc/sdmmc.c if ((error = sdmmc_io_enable(sc)) != 0)
sc 363 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_MEM_MODE) &&
sc 364 dev/sdmmc/sdmmc.c (error = sdmmc_mem_enable(sc)) != 0)
sc 368 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_SD_MODE))
sc 369 dev/sdmmc/sdmmc.c (void)sdmmc_chip_bus_clock(sc->sct, sc->sch,
sc 374 dev/sdmmc/sdmmc.c sdmmc_disable(sc);
sc 379 dev/sdmmc/sdmmc.c sdmmc_disable(struct sdmmc_softc *sc)
sc 384 dev/sdmmc/sdmmc.c (void)sdmmc_select_card(sc, NULL);
sc 387 dev/sdmmc/sdmmc.c (void)sdmmc_chip_bus_clock(sc->sct, sc->sch, SDMMC_SDCLK_OFF);
sc 388 dev/sdmmc/sdmmc.c (void)sdmmc_chip_bus_power(sc->sct, sc->sch, 0);
sc 395 dev/sdmmc/sdmmc.c sdmmc_set_bus_power(struct sdmmc_softc *sc, u_int32_t host_ocr,
sc 401 dev/sdmmc/sdmmc.c DPRINTF(1,("%s: host_ocr=%x ", DEVNAME(sc), host_ocr));
sc 412 dev/sdmmc/sdmmc.c sdmmc_chip_bus_power(sc->sct, sc->sch, host_ocr) != 0)
sc 418 dev/sdmmc/sdmmc.c sdmmc_function_alloc(struct sdmmc_softc *sc)
sc 425 dev/sdmmc/sdmmc.c sf->sc = sc;
sc 444 dev/sdmmc/sdmmc.c sdmmc_scan(struct sdmmc_softc *sc)
sc 447 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_IO_MODE))
sc 448 dev/sdmmc/sdmmc.c sdmmc_io_scan(sc);
sc 451 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_MEM_MODE))
sc 452 dev/sdmmc/sdmmc.c sdmmc_mem_scan(sc);
sc 455 dev/sdmmc/sdmmc.c if (SIMPLEQ_EMPTY(&sc->sf_head)) {
sc 456 dev/sdmmc/sdmmc.c printf("%s: can't identify card\n", DEVNAME(sc));
sc 467 dev/sdmmc/sdmmc.c sdmmc_init(struct sdmmc_softc *sc)
sc 472 dev/sdmmc/sdmmc.c SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) {
sc 473 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_IO_MODE) &&
sc 474 dev/sdmmc/sdmmc.c sdmmc_io_init(sc, sf) != 0)
sc 475 dev/sdmmc/sdmmc.c printf("%s: i/o init failed\n", DEVNAME(sc));
sc 477 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_MEM_MODE) &&
sc 478 dev/sdmmc/sdmmc.c sdmmc_mem_init(sc, sf) != 0)
sc 479 dev/sdmmc/sdmmc.c printf("%s: mem init failed\n", DEVNAME(sc));
sc 483 dev/sdmmc/sdmmc.c SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) {
sc 503 dev/sdmmc/sdmmc.c sdmmc_app_command(struct sdmmc_softc *sc, struct sdmmc_command *cmd)
sc 508 dev/sdmmc/sdmmc.c SDMMC_LOCK(sc);
sc 515 dev/sdmmc/sdmmc.c error = sdmmc_mmc_command(sc, &acmd);
sc 517 dev/sdmmc/sdmmc.c SDMMC_UNLOCK(sc);
sc 523 dev/sdmmc/sdmmc.c SDMMC_UNLOCK(sc);
sc 527 dev/sdmmc/sdmmc.c error = sdmmc_mmc_command(sc, cmd);
sc 528 dev/sdmmc/sdmmc.c SDMMC_UNLOCK(sc);
sc 538 dev/sdmmc/sdmmc.c sdmmc_mmc_command(struct sdmmc_softc *sc, struct sdmmc_command *cmd)
sc 542 dev/sdmmc/sdmmc.c SDMMC_LOCK(sc);
sc 544 dev/sdmmc/sdmmc.c sdmmc_chip_exec_command(sc->sct, sc->sch, cmd);
sc 547 dev/sdmmc/sdmmc.c sdmmc_dump_command(sc, cmd);
sc 553 dev/sdmmc/sdmmc.c SDMMC_UNLOCK(sc);
sc 561 dev/sdmmc/sdmmc.c sdmmc_go_idle_state(struct sdmmc_softc *sc)
sc 569 dev/sdmmc/sdmmc.c (void)sdmmc_mmc_command(sc, &cmd);
sc 576 dev/sdmmc/sdmmc.c sdmmc_set_relative_addr(struct sdmmc_softc *sc,
sc 583 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_SD_MODE)) {
sc 592 dev/sdmmc/sdmmc.c if (sdmmc_mmc_command(sc, &cmd) != 0)
sc 595 dev/sdmmc/sdmmc.c if (ISSET(sc->sc_flags, SMF_SD_MODE))
sc 606 dev/sdmmc/sdmmc.c struct sdmmc_softc *sc = sf->sc;
sc 610 dev/sdmmc/sdmmc.c SDMMC_LOCK(sc);
sc 612 dev/sdmmc/sdmmc.c if (!ISSET(sc->sc_flags, SMF_SD_MODE)) {
sc 613 dev/sdmmc/sdmmc.c SDMMC_UNLOCK(sc);
sc 617 dev/sdmmc/sdmmc.c if ((error = sdmmc_select_card(sc, sf)) != 0) {
sc 618 dev/sdmmc/sdmmc.c SDMMC_UNLOCK(sc);
sc 626 dev/sdmmc/sdmmc.c error = sdmmc_app_command(sc, &cmd);
sc 627 dev/sdmmc/sdmmc.c SDMMC_UNLOCK(sc);
sc 632 dev/sdmmc/sdmmc.c sdmmc_select_card(struct sdmmc_softc *sc, struct sdmmc_function *sf)
sc 637 dev/sdmmc/sdmmc.c if (sc->sc_card == sf || (sf && sc->sc_card &&
sc 638 dev/sdmmc/sdmmc.c sc->sc_card->rca == sf->rca)) {
sc 639 dev/sdmmc/sdmmc.c sc->sc_card = sf;
sc 647 dev/sdmmc/sdmmc.c error = sdmmc_mmc_command(sc, &cmd);
sc 649 dev/sdmmc/sdmmc.c sc->sc_card = sf;
sc 657 dev/sdmmc/sdmmc.c struct sdmmc_softc *sc = (struct sdmmc_softc *)self;
sc 704 dev/sdmmc/sdmmc.c error = sdmmc_mmc_command(sc, &cmd);
sc 706 dev/sdmmc/sdmmc.c error = sdmmc_app_command(sc, &cmd);
sc 731 dev/sdmmc/sdmmc.c sdmmc_dump_command(struct sdmmc_softc *sc, struct sdmmc_command *cmd)
sc 736 dev/sdmmc/sdmmc.c "proc=\"%s\" (error %d)\n", DEVNAME(sc), cmd->c_opcode,
sc 743 dev/sdmmc/sdmmc.c printf("%s: resp=", DEVNAME(sc));
sc 68 dev/sdmmc/sdmmc_cis.c printf("%s: bad CIS ptr %#x\n", SDMMCDEVNAME(sf->sc), reg);
sc 80 dev/sdmmc/sdmmc_cis.c SDMMCDEVNAME(sf->sc), reg, tplcode, tpllen);
sc 88 dev/sdmmc/sdmmc_cis.c SDMMCDEVNAME(sf->sc));
sc 98 dev/sdmmc/sdmmc_cis.c SDMMCDEVNAME(sf->sc));
sc 110 dev/sdmmc/sdmmc_cis.c SDMMCDEVNAME(sf->sc));
sc 139 dev/sdmmc/sdmmc_cis.c SDMMCDEVNAME(sf->sc), tplcode, tpllen));
sc 153 dev/sdmmc/sdmmc_cis.c printf("%s: CIS version %d.%d\n", SDMMCDEVNAME(sf->sc),
sc 156 dev/sdmmc/sdmmc_cis.c printf("%s: CIS info: ", SDMMCDEVNAME(sf->sc));
sc 167 dev/sdmmc/sdmmc_cis.c SDMMCDEVNAME(sf->sc), cis->manufacturer, cis->product);
sc 169 dev/sdmmc/sdmmc_cis.c printf("%s: function %d: ", SDMMCDEVNAME(sf->sc), sf->number);
sc 69 dev/sdmmc/sdmmc_io.c sdmmc_io_enable(struct sdmmc_softc *sc)
sc 75 dev/sdmmc/sdmmc_io.c SET(sc->sc_flags, SMF_SD_MODE|SMF_IO_MODE|SMF_MEM_MODE);
sc 78 dev/sdmmc/sdmmc_io.c sdmmc_io_reset(sc);
sc 86 dev/sdmmc/sdmmc_io.c if (sdmmc_io_send_op_cond(sc, 0, &card_ocr) != 0) {
sc 88 dev/sdmmc/sdmmc_io.c CLR(sc->sc_flags, SMF_IO_MODE);
sc 95 dev/sdmmc/sdmmc_io.c DPRINTF(("%s: no memory present\n", SDMMCDEVNAME(sc)));
sc 96 dev/sdmmc/sdmmc_io.c CLR(sc->sc_flags, SMF_MEM_MODE);
sc 98 dev/sdmmc/sdmmc_io.c sc->sc_function_count = SD_IO_OCR_NUM_FUNCTIONS(card_ocr);
sc 99 dev/sdmmc/sdmmc_io.c if (sc->sc_function_count == 0) {
sc 101 dev/sdmmc/sdmmc_io.c DPRINTF(("%s: no I/O functions\n", SDMMCDEVNAME(sc)));
sc 102 dev/sdmmc/sdmmc_io.c CLR(sc->sc_flags, SMF_IO_MODE);
sc 108 dev/sdmmc/sdmmc_io.c host_ocr = sdmmc_chip_host_ocr(sc->sct, sc->sch);
sc 109 dev/sdmmc/sdmmc_io.c if (sdmmc_set_bus_power(sc, host_ocr, card_ocr) != 0) {
sc 111 dev/sdmmc/sdmmc_io.c SDMMCDEVNAME(sc));
sc 116 dev/sdmmc/sdmmc_io.c sdmmc_io_reset(sc);
sc 119 dev/sdmmc/sdmmc_io.c if (sdmmc_io_send_op_cond(sc, host_ocr, NULL) != 0) {
sc 120 dev/sdmmc/sdmmc_io.c printf("%s: can't send I/O OCR\n", SDMMCDEVNAME(sc));
sc 131 dev/sdmmc/sdmmc_io.c sdmmc_io_scan(struct sdmmc_softc *sc)
sc 136 dev/sdmmc/sdmmc_io.c sf0 = sdmmc_function_alloc(sc);
sc 138 dev/sdmmc/sdmmc_io.c if (sdmmc_set_relative_addr(sc, sf0) != 0) {
sc 139 dev/sdmmc/sdmmc_io.c printf("%s: can't set I/O RCA\n", SDMMCDEVNAME(sc));
sc 143 dev/sdmmc/sdmmc_io.c sc->sc_fn0 = sf0;
sc 144 dev/sdmmc/sdmmc_io.c SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf0, sf_list);
sc 147 dev/sdmmc/sdmmc_io.c if (sdmmc_select_card(sc, sf0) != 0) {
sc 148 dev/sdmmc/sdmmc_io.c printf("%s: can't select I/O RCA %d\n", SDMMCDEVNAME(sc),
sc 154 dev/sdmmc/sdmmc_io.c for (i = 1; i <= sc->sc_function_count; i++) {
sc 155 dev/sdmmc/sdmmc_io.c sf = sdmmc_function_alloc(sc);
sc 159 dev/sdmmc/sdmmc_io.c SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list);
sc 167 dev/sdmmc/sdmmc_io.c sdmmc_io_init(struct sdmmc_softc *sc, struct sdmmc_function *sf)
sc 174 dev/sdmmc/sdmmc_io.c printf("%s: can't read CIS\n", SDMMCDEVNAME(sc));
sc 193 dev/sdmmc/sdmmc_io.c struct sdmmc_softc *sc = sf->sc;
sc 194 dev/sdmmc/sdmmc_io.c struct sdmmc_function *sf0 = sc->sc_fn0;
sc 211 dev/sdmmc/sdmmc_io.c struct sdmmc_softc *sc = sf->sc;
sc 212 dev/sdmmc/sdmmc_io.c struct sdmmc_function *sf0 = sc->sc_fn0;
sc 219 dev/sdmmc/sdmmc_io.c SDMMC_LOCK(sc);
sc 223 dev/sdmmc/sdmmc_io.c SDMMC_UNLOCK(sc);
sc 237 dev/sdmmc/sdmmc_io.c struct sdmmc_softc *sc = sf->sc;
sc 238 dev/sdmmc/sdmmc_io.c struct sdmmc_function *sf0 = sc->sc_fn0;
sc 244 dev/sdmmc/sdmmc_io.c SDMMC_LOCK(sc);
sc 248 dev/sdmmc/sdmmc_io.c SDMMC_UNLOCK(sc);
sc 252 dev/sdmmc/sdmmc_io.c sdmmc_io_attach(struct sdmmc_softc *sc)
sc 257 dev/sdmmc/sdmmc_io.c SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) {
sc 264 dev/sdmmc/sdmmc_io.c sf->child = config_found_sm(&sc->sc_dev, &saa, sdmmc_print,
sc 286 dev/sdmmc/sdmmc_io.c struct sdmmc_cis *cis = &sf->sc->sc_fn0->cis;
sc 324 dev/sdmmc/sdmmc_io.c sdmmc_io_detach(struct sdmmc_softc *sc)
sc 328 dev/sdmmc/sdmmc_io.c SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) {
sc 335 dev/sdmmc/sdmmc_io.c KASSERT(TAILQ_EMPTY(&sc->sc_intrq));
sc 339 dev/sdmmc/sdmmc_io.c sdmmc_io_rw_direct(struct sdmmc_softc *sc, struct sdmmc_function *sf,
sc 345 dev/sdmmc/sdmmc_io.c SDMMC_LOCK(sc);
sc 348 dev/sdmmc/sdmmc_io.c if ((error = sdmmc_select_card(sc, sf)) != 0) {
sc 349 dev/sdmmc/sdmmc_io.c SDMMC_UNLOCK(sc);
sc 365 dev/sdmmc/sdmmc_io.c error = sdmmc_mmc_command(sc, &cmd);
sc 368 dev/sdmmc/sdmmc_io.c SDMMC_UNLOCK(sc);
sc 379 dev/sdmmc/sdmmc_io.c sdmmc_io_rw_extended(struct sdmmc_softc *sc, struct sdmmc_function *sf,
sc 385 dev/sdmmc/sdmmc_io.c SDMMC_LOCK(sc);
sc 389 dev/sdmmc/sdmmc_io.c if ((error = sdmmc_select_card(sc, sf)) != 0) {
sc 390 dev/sdmmc/sdmmc_io.c SDMMC_UNLOCK(sc);
sc 408 dev/sdmmc/sdmmc_io.c cmd.c_blklen = MIN(datalen, sdmmc_chip_host_maxblklen(sc->sct, sc->sch));
sc 413 dev/sdmmc/sdmmc_io.c error = sdmmc_mmc_command(sc, &cmd);
sc 414 dev/sdmmc/sdmmc_io.c SDMMC_UNLOCK(sc);
sc 423 dev/sdmmc/sdmmc_io.c (void)sdmmc_io_rw_direct(sf->sc, sf, reg, (u_char *)&data,
sc 431 dev/sdmmc/sdmmc_io.c (void)sdmmc_io_rw_direct(sf->sc, sf, reg, (u_char *)&data,
sc 440 dev/sdmmc/sdmmc_io.c (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 2,
sc 448 dev/sdmmc/sdmmc_io.c (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 2,
sc 457 dev/sdmmc/sdmmc_io.c (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 4,
sc 465 dev/sdmmc/sdmmc_io.c (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 4,
sc 476 dev/sdmmc/sdmmc_io.c error = sdmmc_io_rw_extended(sf->sc, sf, reg, data,
sc 484 dev/sdmmc/sdmmc_io.c return sdmmc_io_rw_extended(sf->sc, sf, reg, data, datalen,
sc 495 dev/sdmmc/sdmmc_io.c error = sdmmc_io_rw_extended(sf->sc, sf, reg, data,
sc 503 dev/sdmmc/sdmmc_io.c return sdmmc_io_rw_extended(sf->sc, sf, reg, data, datalen,
sc 508 dev/sdmmc/sdmmc_io.c sdmmc_io_xchg(struct sdmmc_softc *sc, struct sdmmc_function *sf,
sc 511 dev/sdmmc/sdmmc_io.c return sdmmc_io_rw_direct(sc, sf, reg, datap,
sc 519 dev/sdmmc/sdmmc_io.c sdmmc_io_reset(struct sdmmc_softc *sc)
sc 522 dev/sdmmc/sdmmc_io.c (void)sdmmc_io_write(sc, NULL, SD_IO_REG_CCCR_CTL, CCCR_CTL_RES);
sc 531 dev/sdmmc/sdmmc_io.c sdmmc_io_send_op_cond(struct sdmmc_softc *sc, u_int32_t ocr, u_int32_t *ocrp)
sc 537 dev/sdmmc/sdmmc_io.c SDMMC_LOCK(sc);
sc 550 dev/sdmmc/sdmmc_io.c error = sdmmc_mmc_command(sc, &cmd);
sc 562 dev/sdmmc/sdmmc_io.c SDMMC_UNLOCK(sc);
sc 573 dev/sdmmc/sdmmc_io.c struct sdmmc_softc *sc = sf->sc;
sc 574 dev/sdmmc/sdmmc_io.c struct sdmmc_function *sf0 = sc->sc_fn0;
sc 577 dev/sdmmc/sdmmc_io.c SDMMC_LOCK(sc);
sc 581 dev/sdmmc/sdmmc_io.c SDMMC_UNLOCK(sc);
sc 587 dev/sdmmc/sdmmc_io.c struct sdmmc_softc *sc = sf->sc;
sc 588 dev/sdmmc/sdmmc_io.c struct sdmmc_function *sf0 = sc->sc_fn0;
sc 591 dev/sdmmc/sdmmc_io.c SDMMC_LOCK(sc);
sc 595 dev/sdmmc/sdmmc_io.c SDMMC_UNLOCK(sc);
sc 607 dev/sdmmc/sdmmc_io.c struct sdmmc_softc *sc = (struct sdmmc_softc *)sdmmc;
sc 611 dev/sdmmc/sdmmc_io.c if (sc->sct->card_intr_mask == NULL)
sc 625 dev/sdmmc/sdmmc_io.c ih->ih_softc = sc;
sc 630 dev/sdmmc/sdmmc_io.c if (TAILQ_EMPTY(&sc->sc_intrq)) {
sc 631 dev/sdmmc/sdmmc_io.c sdmmc_intr_enable(sc->sc_fn0);
sc 632 dev/sdmmc/sdmmc_io.c sdmmc_chip_card_intr_mask(sc->sct, sc->sch, 1);
sc 634 dev/sdmmc/sdmmc_io.c TAILQ_INSERT_TAIL(&sc->sc_intrq, ih, entry);
sc 646 dev/sdmmc/sdmmc_io.c struct sdmmc_softc *sc = ih->ih_softc;
sc 649 dev/sdmmc/sdmmc_io.c if (sc->sct->card_intr_mask == NULL)
sc 653 dev/sdmmc/sdmmc_io.c TAILQ_REMOVE(&sc->sc_intrq, ih, entry);
sc 654 dev/sdmmc/sdmmc_io.c if (TAILQ_EMPTY(&sc->sc_intrq)) {
sc 655 dev/sdmmc/sdmmc_io.c sdmmc_chip_card_intr_mask(sc->sct, sc->sch, 0);
sc 656 dev/sdmmc/sdmmc_io.c sdmmc_intr_disable(sc->sc_fn0);
sc 672 dev/sdmmc/sdmmc_io.c struct sdmmc_softc *sc = (struct sdmmc_softc *)sdmmc;
sc 674 dev/sdmmc/sdmmc_io.c if (sc->sct->card_intr_mask == NULL)
sc 677 dev/sdmmc/sdmmc_io.c if (!sdmmc_task_pending(&sc->sc_intr_task))
sc 678 dev/sdmmc/sdmmc_io.c sdmmc_add_task(sc, &sc->sc_intr_task);
sc 684 dev/sdmmc/sdmmc_io.c struct sdmmc_softc *sc = arg;
sc 689 dev/sdmmc/sdmmc_io.c TAILQ_FOREACH(ih, &sc->sc_intrq, entry) {
sc 697 dev/sdmmc/sdmmc_io.c sdmmc_chip_card_intr_ack(sc->sct, sc->sch);
sc 49 dev/sdmmc/sdmmc_mem.c sdmmc_mem_enable(struct sdmmc_softc *sc)
sc 55 dev/sdmmc/sdmmc_mem.c SET(sc->sc_flags, SMF_SD_MODE|SMF_MEM_MODE);
sc 58 dev/sdmmc/sdmmc_mem.c sdmmc_go_idle_state(sc);
sc 67 dev/sdmmc/sdmmc_mem.c if (sdmmc_mem_send_op_cond(sc, 0, &card_ocr) != 0) {
sc 68 dev/sdmmc/sdmmc_mem.c if (ISSET(sc->sc_flags, SMF_SD_MODE) &&
sc 69 dev/sdmmc/sdmmc_mem.c !ISSET(sc->sc_flags, SMF_IO_MODE)) {
sc 71 dev/sdmmc/sdmmc_mem.c CLR(sc->sc_flags, SMF_SD_MODE);
sc 74 dev/sdmmc/sdmmc_mem.c if (!ISSET(sc->sc_flags, SMF_SD_MODE)) {
sc 76 dev/sdmmc/sdmmc_mem.c SDMMCDEVNAME(sc)));
sc 80 dev/sdmmc/sdmmc_mem.c CLR(sc->sc_flags, SMF_MEM_MODE);
sc 86 dev/sdmmc/sdmmc_mem.c host_ocr = sdmmc_chip_host_ocr(sc->sct, sc->sch);
sc 87 dev/sdmmc/sdmmc_mem.c if (sdmmc_set_bus_power(sc, host_ocr, card_ocr) != 0) {
sc 89 dev/sdmmc/sdmmc_mem.c SDMMCDEVNAME(sc)));
sc 94 dev/sdmmc/sdmmc_mem.c sdmmc_go_idle_state(sc);
sc 97 dev/sdmmc/sdmmc_mem.c if (sdmmc_mem_send_op_cond(sc, host_ocr, NULL) != 0) {
sc 98 dev/sdmmc/sdmmc_mem.c DPRINTF(("%s: can't send memory OCR\n", SDMMCDEVNAME(sc)));
sc 109 dev/sdmmc/sdmmc_mem.c sdmmc_mem_scan(struct sdmmc_softc *sc)
sc 129 dev/sdmmc/sdmmc_mem.c error = sdmmc_mmc_command(sc, &cmd);
sc 134 dev/sdmmc/sdmmc_mem.c DPRINTF(("%s: can't read CID\n", SDMMCDEVNAME(sc)));
sc 140 dev/sdmmc/sdmmc_mem.c if (!ISSET(sc->sc_flags, SMF_SD_MODE))
sc 141 dev/sdmmc/sdmmc_mem.c SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list)
sc 145 dev/sdmmc/sdmmc_mem.c sf = sdmmc_function_alloc(sc);
sc 158 dev/sdmmc/sdmmc_mem.c if (sdmmc_set_relative_addr(sc, sf) != 0) {
sc 159 dev/sdmmc/sdmmc_mem.c printf("%s: can't set mem RCA\n", SDMMCDEVNAME(sc));
sc 166 dev/sdmmc/sdmmc_mem.c if (sdmmc_select_card(sc, sf) != 0) {
sc 168 dev/sdmmc/sdmmc_mem.c SDMMCDEVNAME(sc), sf->rca);
sc 174 dev/sdmmc/sdmmc_mem.c (void)sdmmc_select_card(sc, NULL);
sc 181 dev/sdmmc/sdmmc_mem.c if (sc->sc_fn0 == NULL)
sc 182 dev/sdmmc/sdmmc_mem.c sc->sc_fn0 = sf;
sc 184 dev/sdmmc/sdmmc_mem.c SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list);
sc 191 dev/sdmmc/sdmmc_mem.c SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) {
sc 197 dev/sdmmc/sdmmc_mem.c if (sdmmc_mmc_command(sc, &cmd) != 0) {
sc 202 dev/sdmmc/sdmmc_mem.c if (sdmmc_decode_csd(sc, cmd.c_resp, sf) != 0 ||
sc 203 dev/sdmmc/sdmmc_mem.c sdmmc_decode_cid(sc, sf->raw_cid, sf) != 0) {
sc 209 dev/sdmmc/sdmmc_mem.c printf("%s: CID: ", SDMMCDEVNAME(sc));
sc 216 dev/sdmmc/sdmmc_mem.c sdmmc_decode_csd(struct sdmmc_softc *sc, sdmmc_response resp,
sc 221 dev/sdmmc/sdmmc_mem.c if (ISSET(sc->sc_flags, SMF_SD_MODE)) {
sc 229 dev/sdmmc/sdmmc_mem.c SDMMCDEVNAME(sc), csd->csdver);
sc 240 dev/sdmmc/sdmmc_mem.c SDMMCDEVNAME(sc), csd->csdver);
sc 249 dev/sdmmc/sdmmc_mem.c sdmmc_chip_host_maxblklen(sc->sct, sc->sch));
sc 258 dev/sdmmc/sdmmc_mem.c sdmmc_decode_cid(struct sdmmc_softc *sc, sdmmc_response resp,
sc 263 dev/sdmmc/sdmmc_mem.c if (ISSET(sc->sc_flags, SMF_SD_MODE)) {
sc 290 dev/sdmmc/sdmmc_mem.c SDMMCDEVNAME(sc), sf->csd.mmcver);
sc 311 dev/sdmmc/sdmmc_mem.c sdmmc_mem_init(struct sdmmc_softc *sc, struct sdmmc_function *sf)
sc 315 dev/sdmmc/sdmmc_mem.c SDMMC_LOCK(sc);
sc 316 dev/sdmmc/sdmmc_mem.c if (sdmmc_select_card(sc, sf) != 0 ||
sc 317 dev/sdmmc/sdmmc_mem.c sdmmc_mem_set_blocklen(sc, sf) != 0)
sc 319 dev/sdmmc/sdmmc_mem.c SDMMC_UNLOCK(sc);
sc 327 dev/sdmmc/sdmmc_mem.c sdmmc_mem_send_op_cond(struct sdmmc_softc *sc, u_int32_t ocr,
sc 334 dev/sdmmc/sdmmc_mem.c SDMMC_LOCK(sc);
sc 346 dev/sdmmc/sdmmc_mem.c if (ISSET(sc->sc_flags, SMF_SD_MODE)) {
sc 348 dev/sdmmc/sdmmc_mem.c error = sdmmc_app_command(sc, &cmd);
sc 351 dev/sdmmc/sdmmc_mem.c error = sdmmc_mmc_command(sc, &cmd);
sc 364 dev/sdmmc/sdmmc_mem.c SDMMC_UNLOCK(sc);
sc 373 dev/sdmmc/sdmmc_mem.c sdmmc_mem_set_blocklen(struct sdmmc_softc *sc, struct sdmmc_function *sf)
sc 381 dev/sdmmc/sdmmc_mem.c DPRINTF(("%s: read_bl_len=%d sector_size=%d\n", SDMMCDEVNAME(sc),
sc 384 dev/sdmmc/sdmmc_mem.c return sdmmc_mmc_command(sc, &cmd);
sc 391 dev/sdmmc/sdmmc_mem.c struct sdmmc_softc *sc = sf->sc;
sc 395 dev/sdmmc/sdmmc_mem.c SDMMC_LOCK(sc);
sc 397 dev/sdmmc/sdmmc_mem.c if ((error = sdmmc_select_card(sc, sf)) != 0)
sc 409 dev/sdmmc/sdmmc_mem.c error = sdmmc_mmc_command(sc, &cmd);
sc 420 dev/sdmmc/sdmmc_mem.c error = sdmmc_mmc_command(sc, &cmd);
sc 431 dev/sdmmc/sdmmc_mem.c error = sdmmc_mmc_command(sc, &cmd);
sc 438 dev/sdmmc/sdmmc_mem.c SDMMC_UNLOCK(sc);
sc 446 dev/sdmmc/sdmmc_mem.c struct sdmmc_softc *sc = sf->sc;
sc 450 dev/sdmmc/sdmmc_mem.c SDMMC_LOCK(sc);
sc 452 dev/sdmmc/sdmmc_mem.c if ((error = sdmmc_select_card(sc, sf)) != 0)
sc 464 dev/sdmmc/sdmmc_mem.c error = sdmmc_mmc_command(sc, &cmd);
sc 474 dev/sdmmc/sdmmc_mem.c error = sdmmc_mmc_command(sc, &cmd);
sc 485 dev/sdmmc/sdmmc_mem.c error = sdmmc_mmc_command(sc, &cmd);
sc 492 dev/sdmmc/sdmmc_mem.c SDMMC_UNLOCK(sc);
sc 87 dev/sdmmc/sdmmc_scsi.c #define DEVNAME(sc) SDMMCDEVNAME(sc)
sc 96 dev/sdmmc/sdmmc_scsi.c sdmmc_scsi_attach(struct sdmmc_softc *sc)
sc 116 dev/sdmmc/sdmmc_scsi.c SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) {
sc 125 dev/sdmmc/sdmmc_scsi.c printf("%s: can't allocate ccbs\n", sc->sc_dev.dv_xname);
sc 129 dev/sdmmc/sdmmc_scsi.c sc->sc_scsibus = scbus;
sc 136 dev/sdmmc/sdmmc_scsi.c scbus->sc_link.adapter_softc = sc;
sc 144 dev/sdmmc/sdmmc_scsi.c scbus->sc_child = config_found(&sc->sc_dev, &saa, scsiprint);
sc 146 dev/sdmmc/sdmmc_scsi.c printf("%s: can't attach scsibus\n", sc->sc_dev.dv_xname);
sc 152 dev/sdmmc/sdmmc_scsi.c sc->sc_scsibus = NULL;
sc 160 dev/sdmmc/sdmmc_scsi.c sdmmc_scsi_detach(struct sdmmc_softc *sc)
sc 166 dev/sdmmc/sdmmc_scsi.c scbus = sc->sc_scsibus;
sc 185 dev/sdmmc/sdmmc_scsi.c sc->sc_scsibus = NULL;
sc 292 dev/sdmmc/sdmmc_scsi.c struct sdmmc_softc *sc = link->adapter_softc;
sc 293 dev/sdmmc/sdmmc_scsi.c struct sdmmc_scsi_softc *scbus = sc->sc_scsibus;
sc 305 dev/sdmmc/sdmmc_scsi.c DEVNAME(sc), link->target));
sc 316 dev/sdmmc/sdmmc_scsi.c DEVNAME(sc), link->target, xs->cmd->opcode, curproc ?
sc 362 dev/sdmmc/sdmmc_scsi.c DEVNAME(sc), xs->cmd->opcode));
sc 375 dev/sdmmc/sdmmc_scsi.c DPRINTF(("%s: out of bounds %u-%u >= %u\n", DEVNAME(sc),
sc 384 dev/sdmmc/sdmmc_scsi.c ccb = sdmmc_get_ccb(sc->sc_scsibus, xs->flags);
sc 386 dev/sdmmc/sdmmc_scsi.c printf("%s: out of ccbs\n", DEVNAME(sc));
sc 400 dev/sdmmc/sdmmc_scsi.c return sdmmc_start_xs(sc, ccb);
sc 404 dev/sdmmc/sdmmc_scsi.c sdmmc_start_xs(struct sdmmc_softc *sc, struct sdmmc_ccb *ccb)
sc 406 dev/sdmmc/sdmmc_scsi.c struct sdmmc_scsi_softc *scbus = sc->sc_scsibus;
sc 424 dev/sdmmc/sdmmc_scsi.c sdmmc_add_task(sc, &ccb->ccb_task);
sc 434 dev/sdmmc/sdmmc_scsi.c struct sdmmc_softc *sc = link->adapter_softc;
sc 435 dev/sdmmc/sdmmc_scsi.c struct sdmmc_scsi_softc *scbus = sc->sc_scsibus;
sc 441 dev/sdmmc/sdmmc_scsi.c " complete\n", DEVNAME(sc), link->target, xs->cmd->opcode,
sc 466 dev/sdmmc/sdmmc_scsi.c struct sdmmc_softc *sc = link->adapter_softc;
sc 472 dev/sdmmc/sdmmc_scsi.c " done\n", DEVNAME(sc), link->target, xs->cmd->opcode,
sc 56 dev/sdmmc/sdmmcvar.h struct sdmmc_softc *sc;
sc 64 dev/sdmmc/sdmmcvar.h (xtask)->sc = NULL; \
sc 133 dev/sdmmc/sdmmcvar.h struct sdmmc_softc *sc; /* card slot softc */
sc 153 dev/sdmmc/sdmmcvar.h #define SDMMCDEVNAME(sc) ((sc)->sc_dev.dv_xname)
sc 187 dev/sdmmc/sdmmcvar.h #define SDMMC_LOCK(sc) lockmgr(&(sc)->sc_lock, LK_EXCLUSIVE, NULL)
sc 188 dev/sdmmc/sdmmcvar.h #define SDMMC_UNLOCK(sc) lockmgr(&(sc)->sc_lock, LK_RELEASE, NULL)
sc 164 dev/sequencer.c struct sequencer_softc *sc;
sc 172 dev/sequencer.c sc = &seqdevs[unit];
sc 173 dev/sequencer.c if (sc->isopen)
sc 176 dev/sequencer.c sc->mode = SEQ_OLD;
sc 178 dev/sequencer.c sc->mode = SEQ_NEW;
sc 179 dev/sequencer.c sc->isopen++;
sc 180 dev/sequencer.c sc->flags = flags & (FREAD|FWRITE);
sc 181 dev/sequencer.c sc->rchan = 0;
sc 182 dev/sequencer.c sc->wchan = 0;
sc 183 dev/sequencer.c sc->pbus = 0;
sc 184 dev/sequencer.c sc->async = 0;
sc 185 dev/sequencer.c sc->input_stamp = ~0;
sc 187 dev/sequencer.c sc->nmidi = 0;
sc 190 dev/sequencer.c sc->devs = malloc(nmidi * sizeof(struct midi_dev *),
sc 195 dev/sequencer.c sc->devs[sc->nmidi++] = md;
sc 196 dev/sequencer.c md->seq = sc;
sc 200 dev/sequencer.c sc->timer.timebase = 100;
sc 201 dev/sequencer.c sc->timer.tempo = 60;
sc 202 dev/sequencer.c sc->doingsysex = 0;
sc 203 dev/sequencer.c RECALC_TICK(&sc->timer);
sc 204 dev/sequencer.c sc->timer.last = 0;
sc 205 dev/sequencer.c microtime(&sc->timer.start);
sc 207 dev/sequencer.c SEQ_QINIT(&sc->inq);
sc 208 dev/sequencer.c SEQ_QINIT(&sc->outq);
sc 209 dev/sequencer.c sc->lowat = SEQ_MAXQ / 2;
sc 210 dev/sequencer.c timeout_set(&sc->timo, seq_timeout, sc);
sc 212 dev/sequencer.c seq_reset(sc);
sc 214 dev/sequencer.c DPRINTF(("sequenceropen: mode=%d, nmidi=%d\n", sc->mode, sc->nmidi));
sc 254 dev/sequencer.c seq_drain(struct sequencer_softc *sc)
sc 258 dev/sequencer.c DPRINTFN(3, ("seq_drain: %p, len=%d\n", sc, SEQ_QLEN(&sc->outq)));
sc 259 dev/sequencer.c seq_startoutput(sc);
sc 261 dev/sequencer.c while(!SEQ_QEMPTY(&sc->outq) && !error)
sc 262 dev/sequencer.c error = seq_sleep_timo(&sc->wchan, "seq_dr", 60*hz);
sc 269 dev/sequencer.c struct sequencer_softc *sc = addr;
sc 270 dev/sequencer.c DPRINTFN(4, ("seq_timeout: %p\n", sc));
sc 271 dev/sequencer.c sc->timeout = 0;
sc 272 dev/sequencer.c seq_startoutput(sc);
sc 273 dev/sequencer.c if (SEQ_QLEN(&sc->outq) < sc->lowat) {
sc 274 dev/sequencer.c seq_wakeup(&sc->wchan);
sc 275 dev/sequencer.c selwakeup(&sc->wsel);
sc 276 dev/sequencer.c if (sc->async)
sc 277 dev/sequencer.c psignal(sc->async, SIGIO);
sc 283 dev/sequencer.c seq_startoutput(struct sequencer_softc *sc)
sc 285 dev/sequencer.c struct sequencer_queue *q = &sc->outq;
sc 288 dev/sequencer.c if (sc->timeout)
sc 290 dev/sequencer.c DPRINTFN(4, ("seq_startoutput: %p, len=%d\n", sc, SEQ_QLEN(q)));
sc 291 dev/sequencer.c while(!SEQ_QEMPTY(q) && !sc->timeout) {
sc 293 dev/sequencer.c seq_do_command(sc, &cmd);
sc 300 dev/sequencer.c struct sequencer_softc *sc = &seqdevs[SEQUENCERUNIT(dev)];
sc 303 dev/sequencer.c DPRINTF(("sequencerclose: %p\n", sc));
sc 305 dev/sequencer.c seq_drain(sc);
sc 307 dev/sequencer.c if (sc->timeout) {
sc 308 dev/sequencer.c timeout_del(&sc->timo);
sc 309 dev/sequencer.c sc->timeout = 0;
sc 313 dev/sequencer.c for (n = 0; n < sc->nmidi; n++)
sc 314 dev/sequencer.c midiseq_close(sc->devs[n]);
sc 315 dev/sequencer.c free(sc->devs, M_DEVBUF);
sc 316 dev/sequencer.c sc->isopen = 0;
sc 321 dev/sequencer.c seq_input_event(struct sequencer_softc *sc, seq_event_rec *cmd)
sc 323 dev/sequencer.c struct sequencer_queue *q = &sc->inq;
sc 331 dev/sequencer.c seq_wakeup(&sc->rchan);
sc 332 dev/sequencer.c selwakeup(&sc->rsel);
sc 333 dev/sequencer.c if (sc->async)
sc 334 dev/sequencer.c psignal(sc->async, SIGIO);
sc 341 dev/sequencer.c struct sequencer_softc *sc = addr;
sc 351 dev/sequencer.c SUBTIMEVAL(&now, &sc->timer.start);
sc 353 dev/sequencer.c t /= sc->timer.tick;
sc 354 dev/sequencer.c if (t != sc->input_stamp) {
sc 364 dev/sequencer.c seq_input_event(sc, &ev);
sc 365 dev/sequencer.c sc->input_stamp = t;
sc 367 dev/sequencer.c seq_input_event(sc, iev);
sc 373 dev/sequencer.c struct sequencer_softc *sc = &seqdevs[SEQUENCERUNIT(dev)];
sc 374 dev/sequencer.c struct sequencer_queue *q = &sc->inq;
sc 379 dev/sequencer.c sc, uio->uio_resid, ioflag));
sc 381 dev/sequencer.c if (sc->mode == SEQ_OLD) {
sc 391 dev/sequencer.c error = seq_sleep(&sc->rchan, "seq rd");
sc 408 dev/sequencer.c struct sequencer_softc *sc = &seqdevs[SEQUENCERUNIT(dev)];
sc 409 dev/sequencer.c struct sequencer_queue *q = &sc->outq;
sc 414 dev/sequencer.c DPRINTFN(2, ("sequencerwrite: %p, count=%d\n", sc, uio->uio_resid));
sc 417 dev/sequencer.c size = sc->mode == SEQ_NEW ? sizeof cmdbuf : SEQOLD_CMDSIZE;
sc 422 dev/sequencer.c if (sc->mode == SEQ_OLD)
sc 427 dev/sequencer.c error = seq_do_fullsize(sc, &cmdbuf, uio);
sc 433 dev/sequencer.c seq_startoutput(sc);
sc 437 dev/sequencer.c error = seq_sleep(&sc->wchan, "seq_wr");
sc 444 dev/sequencer.c seq_startoutput(sc);
sc 456 dev/sequencer.c struct sequencer_softc *sc = &seqdevs[SEQUENCERUNIT(dev)];
sc 463 dev/sequencer.c DPRINTFN(2, ("sequencerioctl: %p cmd=0x%08lx\n", sc, cmd));
sc 473 dev/sequencer.c if (sc->async)
sc 475 dev/sequencer.c sc->async = p;
sc 478 dev/sequencer.c sc->async = 0;
sc 482 dev/sequencer.c seq_reset(sc);
sc 486 dev/sequencer.c seq_reset(sc);
sc 491 dev/sequencer.c if (sc->flags == FREAD)
sc 493 dev/sequencer.c seq_drain(sc);
sc 500 dev/sequencer.c if (devno < 0 || devno >= sc->nmidi)
sc 502 dev/sequencer.c md = sc->devs[devno];
sc 512 dev/sequencer.c *(int *)addr = sc->nmidi;
sc 516 dev/sequencer.c *(int *)addr = sc->nmidi;
sc 525 dev/sequencer.c error = seq_do_command(sc, (seq_event_rec *)addr);
sc 534 dev/sequencer.c sc->timer.timebase = t;
sc 536 dev/sequencer.c RECALC_TICK(&sc->timer);
sc 540 dev/sequencer.c error = seq_timer(sc, TMR_START, 0, 0);
sc 544 dev/sequencer.c error = seq_timer(sc, TMR_STOP, 0, 0);
sc 548 dev/sequencer.c error = seq_timer(sc, TMR_CONTINUE, 0, 0);
sc 557 dev/sequencer.c sc->timer.tempo = t;
sc 559 dev/sequencer.c RECALC_TICK(&sc->timer);
sc 576 dev/sequencer.c sc->lowat = t;
sc 580 dev/sequencer.c *(int *)addr = (sc->timer.tempo*sc->timer.timebase + 30) / 60;
sc 588 dev/sequencer.c SUBTIMEVAL(&now, &sc->timer.start);
sc 590 dev/sequencer.c t /= sc->timer.tick;
sc 606 dev/sequencer.c struct sequencer_softc *sc = &seqdevs[SEQUENCERUNIT(dev)];
sc 609 dev/sequencer.c DPRINTF(("sequencerpoll: %p rw=0x%x\n", sc, events));
sc 612 dev/sequencer.c if (!SEQ_QEMPTY(&sc->inq))
sc 616 dev/sequencer.c if (SEQ_QLEN(&sc->outq) < sc->lowat)
sc 621 dev/sequencer.c selrecord(p, &sc->rsel);
sc 623 dev/sequencer.c selrecord(p, &sc->wsel);
sc 629 dev/sequencer.c seq_reset(struct sequencer_softc *sc)
sc 634 dev/sequencer.c for (i = 0; i < sc->nmidi; i++) {
sc 635 dev/sequencer.c md = sc->devs[i];
sc 646 dev/sequencer.c seq_do_command(struct sequencer_softc *sc, seq_event_rec *b)
sc 650 dev/sequencer.c DPRINTFN(4, ("seq_do_command: %p cmd=0x%02x\n", sc, SEQ_CMD(b)));
sc 654 dev/sequencer.c return (seq_do_local(sc, b));
sc 656 dev/sequencer.c return (seq_do_timing(sc, b));
sc 658 dev/sequencer.c return (seq_do_chnvoice(sc, b));
sc 660 dev/sequencer.c return (seq_do_chncommon(sc, b));
sc 662 dev/sequencer.c return (seq_do_sysex(sc, b));
sc 666 dev/sequencer.c if (dev < 0 || dev >= sc->nmidi)
sc 668 dev/sequencer.c return (midiseq_putc(sc->devs[dev], b->arr[1]));
sc 677 dev/sequencer.c seq_do_chnvoice(struct sequencer_softc *sc, seq_event_rec *b)
sc 684 dev/sequencer.c if (dev < 0 || dev >= sc->nmidi)
sc 686 dev/sequencer.c md = sc->devs[dev];
sc 719 dev/sequencer.c seq_do_chncommon(struct sequencer_softc *sc, seq_event_rec *b)
sc 730 dev/sequencer.c if (dev < 0 || dev >= sc->nmidi)
sc 732 dev/sequencer.c md = sc->devs[dev];
sc 766 dev/sequencer.c seq_do_timing(struct sequencer_softc *sc, seq_event_rec *b)
sc 777 dev/sequencer.c return (seq_timer(sc, SEQ_TCMD(b), u.i, b));
sc 781 dev/sequencer.c seq_do_local(struct sequencer_softc *sc, seq_event_rec *b)
sc 787 dev/sequencer.c seq_do_sysex(struct sequencer_softc *sc, seq_event_rec *b)
sc 794 dev/sequencer.c if (dev < 0 || dev >= sc->nmidi)
sc 797 dev/sequencer.c md = sc->devs[dev];
sc 799 dev/sequencer.c if (!sc->doingsysex) {
sc 802 dev/sequencer.c sc->doingsysex = 1;
sc 809 dev/sequencer.c sc->doingsysex = 0;
sc 814 dev/sequencer.c seq_timer(struct sequencer_softc *sc, int cmd, int parm, seq_event_rec *b)
sc 816 dev/sequencer.c struct syn_timer *t = &sc->timer;
sc 848 dev/sequencer.c sc->timeout = 1;
sc 849 dev/sequencer.c timeout_add(&sc->timo, ticks);
sc 880 dev/sequencer.c error = seq_input_event(sc, b);
sc 895 dev/sequencer.c seq_do_fullsize(struct sequencer_softc *sc, seq_event_rec *b, struct uio *uio)
sc 910 dev/sequencer.c return (midiseq_loadpatch(sc->devs[dev], &sysex, uio));
sc 1035 dev/sequencer.c struct midi_softc *sc;
sc 1042 dev/sequencer.c sc = midi_cd.cd_devs[unit];
sc 1043 dev/sequencer.c sc->seqopen = 1;
sc 1045 dev/sequencer.c sc->seq_md = md;
sc 1047 dev/sequencer.c md->msc = sc;
sc 183 dev/softraid.c struct sr_softc *sc = (void *)self;
sc 185 dev/softraid.c DNPRINTF(SR_D_MISC, "\n%s: sr_attach", DEVNAME(sc));
sc 187 dev/softraid.c rw_init(&sc->sc_lock, "sr_lock");
sc 189 dev/softraid.c if (bio_register(&sc->sc_dev, sr_ioctl) != 0)
sc 190 dev/softraid.c printf("%s: controller registration failed", DEVNAME(sc));
sc 192 dev/softraid.c sc->sc_ioctl = sr_ioctl;
sc 196 dev/softraid.c sr_boot_assembly(sc);
sc 442 dev/softraid.c struct sr_softc *sc = link->adapter_softc;
sc 447 dev/softraid.c "flags: %#x\n", DEVNAME(sc), link->scsibus, xs, xs->flags);
sc 449 dev/softraid.c sd = sc->sc_dis[link->scsibus];
sc 452 dev/softraid.c sd = sc->sc_attach_dis;
sc 456 dev/softraid.c DEVNAME(sc), sd);
sc 460 dev/softraid.c DEVNAME(sc));
sc 466 dev/softraid.c DNPRINTF(SR_D_CMD, "%s: sr_scsi_cmd no wu\n", DEVNAME(sc));
sc 479 dev/softraid.c DEVNAME(sc), xs->cmd->opcode);
sc 486 dev/softraid.c DEVNAME(sc));
sc 493 dev/softraid.c DEVNAME(sc));
sc 500 dev/softraid.c DEVNAME(sc));
sc 507 dev/softraid.c DEVNAME(sc));
sc 514 dev/softraid.c DEVNAME(sc));
sc 521 dev/softraid.c DEVNAME(sc));
sc 528 dev/softraid.c DEVNAME(sc), xs->cmd->opcode);
sc 564 dev/softraid.c struct sr_softc *sc = (struct sr_softc *)dev;
sc 567 dev/softraid.c DNPRINTF(SR_D_IOCTL, "%s: sr_ioctl ", DEVNAME(sc));
sc 569 dev/softraid.c rw_enter_write(&sc->sc_lock);
sc 574 dev/softraid.c rv = sr_ioctl_inq(sc, (struct bioc_inq *)addr);
sc 579 dev/softraid.c rv = sr_ioctl_vol(sc, (struct bioc_vol *)addr);
sc 584 dev/softraid.c rv = sr_ioctl_disk(sc, (struct bioc_disk *)addr);
sc 599 dev/softraid.c rv = sr_ioctl_setstate(sc, (struct bioc_setstate *)addr);
sc 604 dev/softraid.c rv = sr_ioctl_createraid(sc, (struct bioc_createraid *)addr, 1);
sc 612 dev/softraid.c rw_exit_write(&sc->sc_lock);
sc 618 dev/softraid.c sr_ioctl_inq(struct sr_softc *sc, struct bioc_inq *bi)
sc 624 dev/softraid.c if (sc->sc_dis[i]) {
sc 626 dev/softraid.c disk += sc->sc_dis[i]->sd_vol.sv_meta.svm_no_chunk;
sc 629 dev/softraid.c strlcpy(bi->bi_dev, sc->sc_dev.dv_xname, sizeof(bi->bi_dev));
sc 637 dev/softraid.c sr_ioctl_vol(struct sr_softc *sc, struct bioc_vol *bv)
sc 644 dev/softraid.c if (sc->sc_dis[i])
sc 649 dev/softraid.c sv = &sc->sc_dis[i]->sd_vol;
sc 666 dev/softraid.c sr_ioctl_disk(struct sr_softc *sc, struct bioc_disk *bd)
sc 673 dev/softraid.c if (sc->sc_dis[i])
sc 679 dev/softraid.c if (id >= sc->sc_dis[i]->sd_vol.sv_meta.svm_no_chunk)
sc 682 dev/softraid.c src = sc->sc_dis[i]->sd_vol.sv_chunks[id];
sc 697 dev/softraid.c sr_ioctl_setstate(struct sr_softc *sc, struct bioc_setstate *bs)
sc 707 dev/softraid.c if (sc->sc_dis[i])
sc 712 dev/softraid.c sd = sc->sc_dis[vol];
sc 750 dev/softraid.c sr_ioctl_createraid(struct sr_softc *sc, struct bioc_createraid *bc, int user)
sc 763 dev/softraid.c DEVNAME(sc), user);
sc 778 dev/softraid.c sd->sd_sc = sc;
sc 783 dev/softraid.c if (sr_open_chunks(sc, cl, dt, no_chunk))
sc 800 dev/softraid.c printf("%s: disk ", DEVNAME(sc));
sc 843 dev/softraid.c sr_create_chunk_meta(sc, cl);
sc 850 dev/softraid.c DEVNAME(sc), vol_size);
sc 869 dev/softraid.c "metadata\n", DEVNAME(sc));
sc 873 dev/softraid.c printf("%s: disk ", DEVNAME(sc));
sc 879 dev/softraid.c DEVNAME(sc));
sc 883 dev/softraid.c printf("%s: disk ", DEVNAME(sc));
sc 889 dev/softraid.c printf("%s: not yet partial bringup\n", DEVNAME(sc));
sc 948 dev/softraid.c sd->sd_link.device_softc = sc;
sc 949 dev/softraid.c sd->sd_link.adapter_softc = sc;
sc 964 dev/softraid.c sc->sc_attach_dis = sd;
sc 966 dev/softraid.c dev2 = config_found(&sc->sc_dev, &saa, scsiprint);
sc 968 dev/softraid.c sc->sc_attach_dis = NULL;
sc 977 dev/softraid.c DEVNAME(sc), dev->dv_xname, sd->sd_link.scsibus);
sc 979 dev/softraid.c sc->sc_dis[sd->sd_link.scsibus] = sd;
sc 981 dev/softraid.c if (sc->sc_dis[i])
sc 998 dev/softraid.c printf("%s: unable to create sensor for %s\n", DEVNAME(sc),
sc 1016 dev/softraid.c sr_open_chunks(struct sr_softc *sc, struct sr_chunk_head *cl, dev_t *dt,
sc 1027 dev/softraid.c DNPRINTF(SR_D_IOCTL, "%s: sr_open_chunks(%d)\n", DEVNAME(sc), no_chunk);
sc 1062 dev/softraid.c DEVNAME(sc), name);
sc 1070 dev/softraid.c DEVNAME(sc), name,
sc 1081 dev/softraid.c DEVNAME(sc), name);
sc 1089 dev/softraid.c DNPRINTF(SR_D_IOCTL, "%s: found %s size %d\n", DEVNAME(sc),
sc 1095 dev/softraid.c printf("%s: invalid device: %s\n", DEVNAME(sc), name ? name : "nodev");
sc 1102 dev/softraid.c struct sr_softc *sc = sd->sd_sc;
sc 1113 dev/softraid.c DNPRINTF(SR_D_META, "%s: sr_read_meta\n", DEVNAME(sc));
sc 1139 dev/softraid.c "metadata %d\n", DEVNAME(sc),
sc 1148 dev/softraid.c if (sr_validate_metadata(sc, ch_entry->src_dev_mm, m)) {
sc 1149 dev/softraid.c printf("%s: invalid metadata\n", DEVNAME(sc));
sc 1171 dev/softraid.c DEVNAME(sc), ch_entry->src_devname);
sc 1185 dev/softraid.c DEVNAME(sc), ch_entry->src_devname,
sc 1193 dev/softraid.c "lower than %d\n", DEVNAME(sc),
sc 1202 dev/softraid.c DEVNAME(sc), ch_entry->src_devname,
sc 1219 dev/softraid.c DEVNAME(sc), ch_entry->src_devname,
sc 1228 dev/softraid.c DEVNAME(sc));
sc 1234 dev/softraid.c DEVNAME(sc), no_chunk);
sc 1245 dev/softraid.c sr_create_chunk_meta(struct sr_softc *sc, struct sr_chunk_head *cl)
sc 1253 dev/softraid.c DNPRINTF(SR_D_IOCTL, "%s: sr_create_chunk_meta\n", DEVNAME(sc));
sc 1286 dev/softraid.c DEVNAME(sc), max_chunk_sz - min_chunk_sz);
sc 1294 dev/softraid.c sr_unwind_chunks(struct sr_softc *sc, struct sr_chunk_head *cl)
sc 1299 dev/softraid.c DNPRINTF(SR_D_IOCTL, "%s: sr_unwind_chunks\n", DEVNAME(sc));
sc 1323 dev/softraid.c struct sr_softc *sc = sd->sd_sc;
sc 1329 dev/softraid.c DEVNAME(sc), sd->sd_vol.sv_meta.svm_devname);
sc 1341 dev/softraid.c struct sr_softc *sc = sd->sd_sc;
sc 1344 dev/softraid.c if (!sd || !sc)
sc 1348 dev/softraid.c DEVNAME(sc), sd->sd_vol.sv_meta.svm_devname);
sc 1366 dev/softraid.c sr_unwind_chunks(sc, &sd->sd_vol.sv_chunk_list);
sc 1787 dev/softraid.c struct sr_softc *sc = sd->sd_sc;
sc 1795 dev/softraid.c DNPRINTF(SR_D_META, "%s: sr_clear_metadata\n", DEVNAME(sc));
sc 1820 dev/softraid.c "metadata %d\n", DEVNAME(sc),
sc 1834 dev/softraid.c struct sr_softc *sc = sd->sd_sc;
sc 1838 dev/softraid.c if (sc->sc_dis[i])
sc 1840 dev/softraid.c &sc->sc_dis[i]->sd_meta->ssd_uuid,
sc 1866 dev/softraid.c struct sr_softc *sc = sd->sd_sc;
sc 1877 dev/softraid.c DEVNAME(sc), sd->sd_vol.sv_meta.svm_devname);
sc 1880 dev/softraid.c printf("%s: no in memory copy of metadata\n", DEVNAME(sc));
sc 1891 dev/softraid.c DEVNAME(sc));
sc 1932 dev/softraid.c sm->ssd_vd_chk = sr_checksum(DEVNAME(sc),
sc 1937 dev/softraid.c sm->ssd_chunk_chk ^= sr_checksum(DEVNAME(sc),
sc 1954 dev/softraid.c sm->ssd_checksum = sr_checksum(DEVNAME(sc),
sc 1958 dev/softraid.c DEVNAME(sc), src->src_meta.scm_devname,
sc 1986 dev/softraid.c "metadata %d\n", DEVNAME(sc),
sc 1992 dev/softraid.c DEVNAME(sc), src->src_meta.scm_devname);
sc 2006 dev/softraid.c sr_boot_assembly(struct sr_softc *sc)
sc 2021 dev/softraid.c DNPRINTF(SR_D_META, "%s: sr_boot_assembly\n", DEVNAME(sc));
sc 2055 dev/softraid.c "\n", DEVNAME(sc));
sc 2064 dev/softraid.c "failed\n", DEVNAME(sc));
sc 2073 dev/softraid.c "failed\n", DEVNAME(sc));
sc 2088 dev/softraid.c DEVNAME(sc), i);
sc 2102 dev/softraid.c DEVNAME(sc));
sc 2109 dev/softraid.c if (!sr_validate_metadata(sc, devr, sm)) {
sc 2126 dev/softraid.c "close failed\n", DEVNAME(sc));
sc 2164 dev/softraid.c "assemble volume\n", DEVNAME(sc));
sc 2173 dev/softraid.c "be volume %d\n", DEVNAME(sc),
sc 2184 dev/softraid.c sr_ioctl_createraid(sc, &bc, 0);
sc 2204 dev/softraid.c sr_validate_metadata(struct sr_softc *sc, dev_t dev, struct sr_metadata *sm)
sc 2213 dev/softraid.c DEVNAME(sc), dev);
sc 2235 dev/softraid.c "expected %d\n", DEVNAME(sc),
sc 2242 dev/softraid.c "expected %d\n", DEVNAME(sc),
sc 2247 dev/softraid.c chk = sr_checksum(DEVNAME(sc), (u_int32_t *)sm, sm->ssd_size);
sc 2254 dev/softraid.c "expected 0x%x\n", DEVNAME(sc),
sc 2262 dev/softraid.c "%d, expected %d\n", DEVNAME(sc),
sc 2269 dev/softraid.c "expected %d\n", DEVNAME(sc),
sc 2275 dev/softraid.c chk = sr_checksum(DEVNAME(sc), (u_int32_t *)mv, sm->ssd_vd_size);
sc 2278 dev/softraid.c "expected 0x%x\n", DEVNAME(sc),
sc 2286 dev/softraid.c "%d, expected %d\n", DEVNAME(sc),
sc 2293 dev/softraid.c "expected %d\n", DEVNAME(sc),
sc 2301 dev/softraid.c chk = sr_checksum(DEVNAME(sc), (u_int32_t *)(mc),
sc 2306 dev/softraid.c "expected 0x%x\n", DEVNAME(sc),
sc 2314 dev/softraid.c printf("%s: roaming device %s -> %s\n", DEVNAME(sc),
sc 2319 dev/softraid.c DEVNAME(sc), devname);
sc 2324 dev/softraid.c DEVNAME(sc), devname);
sc 2334 dev/softraid.c struct sr_softc *sc = sd->sd_sc;
sc 2337 dev/softraid.c DEVNAME(sc), sd->sd_vol.sv_meta.svm_devname);
sc 2348 dev/softraid.c struct sr_softc *sc = sd->sd_sc;
sc 2352 dev/softraid.c DEVNAME(sc), sd->sd_vol.sv_meta.svm_devname);
sc 2354 dev/softraid.c strlcpy(sd->sd_vol.sv_sensordev.xname, DEVNAME(sc),
sc 2364 dev/softraid.c if (sc->sc_sensors_running == 0) {
sc 2365 dev/softraid.c if (sensor_task_register(sc, sr_refresh_sensors, 10) == NULL)
sc 2367 dev/softraid.c sc->sc_sensors_running = 1;
sc 2380 dev/softraid.c struct sr_softc *sc = sd->sd_sc;
sc 2383 dev/softraid.c DEVNAME(sc), sd->sd_vol.sv_meta.svm_devname);
sc 2392 dev/softraid.c struct sr_softc *sc = arg;
sc 2396 dev/softraid.c DNPRINTF(SR_D_STATE, "%s: sr_refresh_sensors\n", DEVNAME(sc));
sc 2400 dev/softraid.c if (!sc->sc_dis[i])
sc 2403 dev/softraid.c sv = &sc->sc_dis[i]->sd_vol;
sc 2436 dev/softraid.c struct sr_softc *sc;
sc 2442 dev/softraid.c sc = softraid_cd.cd_devs[i];
sc 2447 dev/softraid.c if (!sc) {
sc 2454 dev/softraid.c if (!sc->sc_dis[i])
sc 2457 dev/softraid.c sd = sc->sc_dis[i];
sc 2769 dev/softraid.c struct sr_softc *sc = sd->sd_sc;
sc 2773 dev/softraid.c DEVNAME(sc), bp, xs);
sc 2776 dev/softraid.c " b_flags: 0x%0x block: %lld target: %d\n", DEVNAME(sc),
sc 2784 dev/softraid.c DEVNAME(sc), ccb->ccb_buf.b_blkno, ccb->ccb_target);
sc 2791 dev/softraid.c panic("%s: invalid target on wu: %p", DEVNAME(sc), wu);
sc 2799 dev/softraid.c DEVNAME(sc), wu->swu_ios_complete, wu->swu_io_count,
sc 2807 dev/softraid.c DEVNAME(sc), ccb->ccb_buf.b_blkno);
sc 2817 dev/softraid.c "%lld\n", DEVNAME(sc),
sc 2853 dev/softraid.c DEVNAME(sc), wu);
sc 3218 dev/softraid.c struct sr_softc *sc = wu->swu_dis->sd_sc;
sc 3222 dev/softraid.c DEVNAME(sc), bp, wu->swu_xs);
sc 3225 dev/softraid.c " b_flags: 0x%0x\n", DEVNAME(sc), ccb->ccb_buf.b_bcount,
sc 3242 dev/softraid.c struct sr_softc *sc = sd->sd_sc;
sc 3246 dev/softraid.c DEVNAME(sc), crp, xs);
sc 3251 dev/softraid.c printf("%s: i/o error on block %lld\n", DEVNAME(sc),
sc 3259 dev/softraid.c panic("%s: invalid target on wu: %p", DEVNAME(sc), wu);
sc 3267 dev/softraid.c DEVNAME(sc), wu->swu_ios_complete, wu->swu_io_count);
sc 3299 dev/softraid.c DEVNAME(sc), wu);
sc 69 dev/sun/sunkbd.c sunkbd_bell(struct sunkbd_softc *sc, u_int period, u_int pitch, u_int volume)
sc 80 dev/sun/sunkbd.c if (sc->sc_bellactive) {
sc 81 dev/sun/sunkbd.c if (sc->sc_belltimeout == 0)
sc 82 dev/sun/sunkbd.c timeout_del(&sc->sc_bellto);
sc 85 dev/sun/sunkbd.c sunkbd_bellstop(sc);
sc 89 dev/sun/sunkbd.c if (sc->sc_bellactive == 0) {
sc 94 dev/sun/sunkbd.c sc->sc_bellactive = 1;
sc 95 dev/sun/sunkbd.c sc->sc_belltimeout = 1;
sc 96 dev/sun/sunkbd.c (*sc->sc_sendcmd)(sc, &c, 1);
sc 97 dev/sun/sunkbd.c timeout_add(&sc->sc_bellto, ticks);
sc 105 dev/sun/sunkbd.c struct sunkbd_softc *sc = v;
sc 110 dev/sun/sunkbd.c sc->sc_belltimeout = 0;
sc 112 dev/sun/sunkbd.c (*sc->sc_sendcmd)(v, &c, 1);
sc 113 dev/sun/sunkbd.c sc->sc_bellactive = 0;
sc 140 dev/sun/sunkbd.c sunkbd_getleds(struct sunkbd_softc *sc)
sc 142 dev/sun/sunkbd.c return (sc->sc_leds);
sc 148 dev/sun/sunkbd.c struct sunkbd_softc *sc = v;
sc 154 dev/sun/sunkbd.c if (ISTYPE5(sc->sc_layout)) {
sc 161 dev/sun/sunkbd.c sunkbd_setleds(sc, *d_int);
sc 164 dev/sun/sunkbd.c *d_int = sunkbd_getleds(sc);
sc 167 dev/sun/sunkbd.c sunkbd_bell(sc, d_bell->period, d_bell->pitch, d_bell->volume);
sc 175 dev/sun/sunkbd.c sunkbd_raw(struct sunkbd_softc *sc, u_int8_t c)
sc 179 dev/sun/sunkbd.c if (sc->sc_kbdstate == SKBD_STATE_LAYOUT) {
sc 180 dev/sun/sunkbd.c sc->sc_kbdstate = SKBD_STATE_GETKEY;
sc 181 dev/sun/sunkbd.c sc->sc_layout = c;
sc 187 dev/sun/sunkbd.c sc->sc_kbdstate = SKBD_STATE_RESET;
sc 191 dev/sun/sunkbd.c sc->sc_kbdstate = SKBD_STATE_LAYOUT;
sc 195 dev/sun/sunkbd.c sc->sc_kbdstate = SKBD_STATE_GETKEY;
sc 202 dev/sun/sunkbd.c switch (sc->sc_kbdstate) {
sc 204 dev/sun/sunkbd.c sc->sc_kbdstate = SKBD_STATE_GETKEY;
sc 207 dev/sun/sunkbd.c sc->sc_dev.dv_xname, c);
sc 209 dev/sun/sunkbd.c sc->sc_id = c;
sc 217 dev/sun/sunkbd.c sunkbd_setclick(struct sunkbd_softc *sc, int click)
sc 222 dev/sun/sunkbd.c if (sc->sc_id == KB_SUN2)
sc 226 dev/sun/sunkbd.c (*sc->sc_sendcmd)(sc, &c, 1);
sc 233 dev/sun/sunkbd.c struct sunkbd_softc *sc = v;
sc 237 dev/sun/sunkbd.c sc->sc_leds = wled;
sc 250 dev/sun/sunkbd.c (*sc->sc_sendcmd)(sc, cmd, sizeof(cmd));
sc 98 dev/tc/asc.c asc_read_reg(sc, reg)
sc 99 dev/tc/asc.c struct ncr53c9x_softc *sc;
sc 102 dev/tc/asc.c struct asc_softc *asc = (struct asc_softc *)sc;
sc 112 dev/tc/asc.c asc_write_reg(sc, reg, val)
sc 113 dev/tc/asc.c struct ncr53c9x_softc *sc;
sc 117 dev/tc/asc.c struct asc_softc *asc = (struct asc_softc *)sc;
sc 132 dev/tc/asc_tc.c struct ncr53c9x_softc *sc = &asc->asc.sc_ncr53c9x;
sc 137 dev/tc/asc_tc.c sc->sc_glue = &asc_tc_glue;
sc 142 dev/tc/asc_tc.c printf("%s: unable to map device\n", sc->sc_dev.dv_xname);
sc 147 dev/tc/asc_tc.c tc_intr_establish(parent, ta->ta_cookie, IPL_BIO, ncr53c9x_intr, sc);
sc 149 dev/tc/asc_tc.c sc->sc_id = 7;
sc 150 dev/tc/asc_tc.c sc->sc_freq = (ta->ta_busspeed) ? 25000000 : 12500000;
sc 153 dev/tc/asc_tc.c sc->sc_freq /= 1000000;
sc 164 dev/tc/asc_tc.c sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB;
sc 165 dev/tc/asc_tc.c sc->sc_cfg2 = NCRCFG2_SCSI2;
sc 166 dev/tc/asc_tc.c sc->sc_cfg3 = 0;
sc 167 dev/tc/asc_tc.c sc->sc_rev = NCR_VARIANT_NCR53C94;
sc 184 dev/tc/asc_tc.c sc->sc_minsync = (1000 / sc->sc_freq) * 5 / 4;
sc 186 dev/tc/asc_tc.c sc->sc_maxxfer = 64 * 1024;
sc 189 dev/tc/asc_tc.c ncr53c9x_attach(sc, &asc_switch, &asc_dev);
sc 193 dev/tc/asc_tc.c asc_tc_reset(sc)
sc 194 dev/tc/asc_tc.c struct ncr53c9x_softc *sc;
sc 196 dev/tc/asc_tc.c struct asc_tc_softc *asc = (struct asc_tc_softc *)sc;
sc 202 dev/tc/asc_tc.c asc_tc_intr(sc)
sc 203 dev/tc/asc_tc.c struct ncr53c9x_softc *sc;
sc 205 dev/tc/asc_tc.c struct asc_tc_softc *asc = (struct asc_tc_softc *)sc;
sc 210 dev/tc/asc_tc.c (resid = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF)) != 0) {
sc 215 dev/tc/asc_tc.c resid += NCR_READ_REG(sc, NCR_TCL);
sc 216 dev/tc/asc_tc.c resid += NCR_READ_REG(sc, NCR_TCM) << 8;
sc 230 dev/tc/asc_tc.c asc_tc_setup(sc, addr, len, datain, dmasize)
sc 231 dev/tc/asc_tc.c struct ncr53c9x_softc *sc;
sc 237 dev/tc/asc_tc.c struct asc_tc_softc *asc = (struct asc_tc_softc *)sc;
sc 257 dev/tc/asc_tc.c sc->sc_nexus->xs->sc_link->target;
sc 276 dev/tc/asc_tc.c asc_tc_go(sc)
sc 277 dev/tc/asc_tc.c struct ncr53c9x_softc *sc;
sc 280 dev/tc/asc_tc.c struct asc_tc_softc *asc = (struct asc_tc_softc *)sc;
sc 295 dev/tc/asc_tc.c asc_tc_stop(sc)
sc 296 dev/tc/asc_tc.c struct ncr53c9x_softc *sc;
sc 299 dev/tc/asc_tc.c struct asc_tc_softc *asc = (struct asc_tc_softc *)sc;
sc 311 dev/tc/asc_tc.c asc_dma_isintr(sc)
sc 312 dev/tc/asc_tc.c struct ncr53c9x_softc *sc;
sc 314 dev/tc/asc_tc.c return !!(NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT);
sc 318 dev/tc/asc_tc.c asc_dma_isactive(sc)
sc 319 dev/tc/asc_tc.c struct ncr53c9x_softc *sc;
sc 321 dev/tc/asc_tc.c struct asc_tc_softc *asc = (struct asc_tc_softc *)sc;
sc 327 dev/tc/asc_tc.c asc_clear_latched_intr(sc)
sc 328 dev/tc/asc_tc.c struct ncr53c9x_softc *sc;
sc 148 dev/tc/asc_tcds.c struct ncr53c9x_softc *sc = &asc->asc.sc_ncr53c9x;
sc 154 dev/tc/asc_tcds.c sc->sc_glue = &asc_tcds_glue;
sc 172 dev/tc/asc_tcds.c sc->sc_id = tcdsdev->tcdsda_id;
sc 173 dev/tc/asc_tcds.c sc->sc_freq = tcdsdev->tcdsda_freq;
sc 176 dev/tc/asc_tcds.c sc->sc_freq /= 1000000;
sc 178 dev/tc/asc_tcds.c tcds_intr_establish(parent, tcdsdev->tcdsda_chip, ncr53c9x_intr, sc);
sc 189 dev/tc/asc_tcds.c sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB;
sc 190 dev/tc/asc_tcds.c sc->sc_cfg2 = NCRCFG2_SCSI2;
sc 191 dev/tc/asc_tcds.c sc->sc_cfg3 = NCRCFG3_CDB;
sc 192 dev/tc/asc_tcds.c if (sc->sc_freq > 25)
sc 193 dev/tc/asc_tcds.c sc->sc_cfg3 |= NCRF9XCFG3_FCLK;
sc 194 dev/tc/asc_tcds.c sc->sc_rev = tcdsdev->tcdsda_variant;
sc 196 dev/tc/asc_tcds.c sc->sc_features |= NCR_F_FASTSCSI;
sc 197 dev/tc/asc_tcds.c sc->sc_cfg3_fscsi = NCRF9XCFG3_FSCSI;
sc 215 dev/tc/asc_tcds.c sc->sc_minsync = (1000 / sc->sc_freq) * tcdsdev->tcdsda_period / 4;
sc 217 dev/tc/asc_tcds.c sc->sc_maxxfer = 64 * 1024;
sc 220 dev/tc/asc_tcds.c ncr53c9x_attach(sc, &asc_switch, &asc_dev);
sc 224 dev/tc/asc_tcds.c tcds_dma_reset(sc)
sc 225 dev/tc/asc_tcds.c struct ncr53c9x_softc *sc;
sc 227 dev/tc/asc_tcds.c struct asc_tcds_softc *asc = (struct asc_tcds_softc *)sc;
sc 241 dev/tc/asc_tcds.c tcds_dma_setup(sc, addr, len, ispullup, dmasize)
sc 242 dev/tc/asc_tcds.c struct ncr53c9x_softc *sc;
sc 247 dev/tc/asc_tcds.c struct asc_tcds_softc *asc = (struct asc_tcds_softc *)sc;
sc 301 dev/tc/asc_tcds.c tcds_dma_go(sc)
sc 302 dev/tc/asc_tcds.c struct ncr53c9x_softc *sc;
sc 304 dev/tc/asc_tcds.c struct asc_tcds_softc *asc = (struct asc_tcds_softc *)sc;
sc 314 dev/tc/asc_tcds.c tcds_dma_stop(sc)
sc 315 dev/tc/asc_tcds.c struct ncr53c9x_softc *sc;
sc 318 dev/tc/asc_tcds.c struct asc_tcds_softc *asc = (struct asc_tcds_softc *)sc;
sc 334 dev/tc/asc_tcds.c tcds_dma_intr(sc)
sc 335 dev/tc/asc_tcds.c struct ncr53c9x_softc *sc;
sc 337 dev/tc/asc_tcds.c struct asc_tcds_softc *asc = (struct asc_tcds_softc *)sc;
sc 359 dev/tc/asc_tcds.c tcl = NCR_READ_REG(sc, NCR_TCL);
sc 360 dev/tc/asc_tcds.c tcm = NCR_READ_REG(sc, NCR_TCM);
sc 368 dev/tc/asc_tcds.c (resid = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF)) != 0) {
sc 373 dev/tc/asc_tcds.c resid += (tcl = NCR_READ_REG(sc, NCR_TCL));
sc 374 dev/tc/asc_tcds.c resid += (tcm = NCR_READ_REG(sc, NCR_TCM)) << 8;
sc 461 dev/tc/asc_tcds.c tcds_dma_isintr(sc)
sc 462 dev/tc/asc_tcds.c struct ncr53c9x_softc *sc;
sc 464 dev/tc/asc_tcds.c struct asc_tcds_softc *asc = (struct asc_tcds_softc *)sc;
sc 474 dev/tc/asc_tcds.c tcds_dma_isactive(sc)
sc 475 dev/tc/asc_tcds.c struct ncr53c9x_softc *sc;
sc 477 dev/tc/asc_tcds.c struct asc_tcds_softc *asc = (struct asc_tcds_softc *)sc;
sc 483 dev/tc/asc_tcds.c tcds_clear_latched_intr(sc)
sc 484 dev/tc/asc_tcds.c struct ncr53c9x_softc *sc;
sc 486 dev/tc/asc_tcds.c struct asc_tcds_softc *asc = (struct asc_tcds_softc *)sc;
sc 87 dev/tc/if_fta.c pdq_softc_t * const sc = (pdq_softc_t *) self;
sc 94 dev/tc/if_fta.c sc->sc_csrtag = ta->ta_memt;
sc 95 dev/tc/if_fta.c bcopy(sc->sc_dev.dv_xname, sc->sc_if.if_xname, IFNAMSIZ);
sc 96 dev/tc/if_fta.c sc->sc_if.if_flags = 0;
sc 97 dev/tc/if_fta.c sc->sc_if.if_softc = sc;
sc 99 dev/tc/if_fta.c if (bus_space_map(sc->sc_csrtag, ta->ta_addr + PDQ_TC_CSR_OFFSET,
sc 100 dev/tc/if_fta.c PDQ_TC_CSR_SPACE, 0, &sc->sc_csrhandle)) {
sc 101 dev/tc/if_fta.c printf("\n%s: can't map card memory!\n", sc->sc_dev.dv_xname);
sc 106 dev/tc/if_fta.c sc->sc_pdq = pdq_initialize(sc->sc_csrtag, sc->sc_csrhandle,
sc 107 dev/tc/if_fta.c sc->sc_if.if_xname, 0, (void *) sc, PDQ_DEFTA);
sc 108 dev/tc/if_fta.c if (sc->sc_pdq == NULL) {
sc 109 dev/tc/if_fta.c printf("%s: initialization failed\n", sc->sc_dev.dv_xname);
sc 112 dev/tc/if_fta.c bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes,
sc 113 dev/tc/if_fta.c sc->sc_arpcom.ac_enaddr, 6);
sc 114 dev/tc/if_fta.c pdq_ifattach(sc, NULL);
sc 117 dev/tc/if_fta.c (int (*)(void *)) pdq_interrupt, sc->sc_pdq);
sc 119 dev/tc/if_fta.c sc->sc_ats = shutdownhook_establish((void (*)(void *)) pdq_hwreset,
sc 120 dev/tc/if_fta.c sc->sc_pdq);
sc 121 dev/tc/if_fta.c if (sc->sc_ats == NULL)
sc 102 dev/tc/if_le_ioasic.c struct le_ioasic_softc *sc = (void *)self;
sc 104 dev/tc/if_le_ioasic.c struct am7990_softc *le = &sc->sc_am7990;
sc 116 dev/tc/if_le_ioasic.c dmat = sc->sc_dmat = ((struct ioasic_softc *)parent)->sc_dmat;
sc 135 dev/tc/if_le_ioasic.c LE_IOASIC_MEMSIZE, 0, BUS_DMA_NOWAIT, &sc->sc_dmamap)) {
sc 139 dev/tc/if_le_ioasic.c if (bus_dmamap_load(dmat, sc->sc_dmamap,
sc 147 dev/tc/if_le_ioasic.c tca = IOASIC_DMA_ADDR(sc->sc_dmamap->dm_segs[0].ds_addr);
sc 153 dev/tc/if_le_ioasic.c sc->sc_r1 = (struct lereg1 *)
sc 162 dev/tc/if_le_ioasic.c dec_le_common_attach(&sc->sc_am7990,
sc 167 dev/tc/if_le_ioasic.c am7990_intr, sc);
sc 188 dev/tc/if_le_ioasic.c le_ioasic_copytobuf_gap2(struct am7990_softc *sc, void *fromv,
sc 191 dev/tc/if_le_ioasic.c volatile caddr_t buf = sc->sc_mem;
sc 214 dev/tc/if_le_ioasic.c le_ioasic_copyfrombuf_gap2(struct am7990_softc *sc, void *tov,
sc 217 dev/tc/if_le_ioasic.c volatile caddr_t buf = sc->sc_mem;
sc 248 dev/tc/if_le_ioasic.c le_ioasic_copytobuf_gap16(struct am7990_softc *sc, void *fromv,
sc 251 dev/tc/if_le_ioasic.c volatile caddr_t buf = sc->sc_mem;
sc 330 dev/tc/if_le_ioasic.c le_ioasic_copyfrombuf_gap16(struct am7990_softc *sc, void *tov,
sc 333 dev/tc/if_le_ioasic.c volatile caddr_t buf = sc->sc_mem;
sc 404 dev/tc/if_le_ioasic.c le_ioasic_zerobuf_gap16(struct am7990_softc *sc, int boff, int len)
sc 406 dev/tc/if_le_ioasic.c volatile caddr_t buf = sc->sc_mem;
sc 82 dev/tc/if_le_tc.c struct am7990_softc *sc = &lesc->sc_am7990;
sc 91 dev/tc/if_le_tc.c sc->sc_mem = (void *)(d->ta_addr + LE_OFFSET_RAM);
sc 93 dev/tc/if_le_tc.c sc->sc_copytodesc = am7990_copytobuf_contig;
sc 94 dev/tc/if_le_tc.c sc->sc_copyfromdesc = am7990_copyfrombuf_contig;
sc 95 dev/tc/if_le_tc.c sc->sc_copytobuf = am7990_copytobuf_contig;
sc 96 dev/tc/if_le_tc.c sc->sc_copyfrombuf = am7990_copyfrombuf_contig;
sc 97 dev/tc/if_le_tc.c sc->sc_zerobuf = am7990_zerobuf_contig;
sc 108 dev/tc/if_le_tc.c tc_intr_establish(parent, d->ta_cookie, TC_IPL_NET, am7990_intr, sc);
sc 64 dev/tc/ioasic_subr.c ioasic_attach_devs(sc, ioasic_devs, ioasic_ndevs)
sc 65 dev/tc/ioasic_subr.c struct ioasic_softc *sc;
sc 80 dev/tc/ioasic_subr.c idev.iada_addr = sc->sc_base + ioasic_devs[i].iad_offset;
sc 84 dev/tc/ioasic_subr.c config_found(&sc->sc_dv, &idev, ioasicprint);
sc 76 dev/tc/tc.c struct tc_softc *sc = (struct tc_softc *)self;
sc 90 dev/tc/tc.c sc->sc_speed = tba->tba_speed;
sc 91 dev/tc/tc.c sc->sc_nslots = tba->tba_nslots;
sc 92 dev/tc/tc.c sc->sc_slots = tba->tba_slots;
sc 93 dev/tc/tc.c sc->sc_intr_establish = tba->tba_intr_establish;
sc 94 dev/tc/tc.c sc->sc_intr_disestablish = tba->tba_intr_disestablish;
sc 95 dev/tc/tc.c sc->sc_get_dma_tag = tba->tba_get_dma_tag;
sc 104 dev/tc/tc.c if (builtin->tcb_slot > sc->sc_nslots)
sc 111 dev/tc/tc.c tcaddr = sc->sc_slots[builtin->tcb_slot].tcs_addr +
sc 121 dev/tc/tc.c ta.ta_dmat = (*sc->sc_get_dma_tag)(builtin->tcb_slot);
sc 127 dev/tc/tc.c ta.ta_busspeed = sc->sc_speed;
sc 132 dev/tc/tc.c sc->sc_slots[builtin->tcb_slot].tcs_used = 1;
sc 143 dev/tc/tc.c for (i = sc->sc_nslots - 1; i >= 0; i--) {
sc 144 dev/tc/tc.c slot = &sc->sc_slots[i];
sc 163 dev/tc/tc.c ta.ta_dmat = (*sc->sc_get_dma_tag)(i);
sc 270 dev/tc/tc.c struct tc_softc *sc = tc_cd.cd_devs[0];
sc 272 dev/tc/tc.c (*sc->sc_intr_establish)(dev, cookie, level, handler, arg);
sc 280 dev/tc/tc.c struct tc_softc *sc = tc_cd.cd_devs[0];
sc 282 dev/tc/tc.c (*sc->sc_intr_disestablish)(dev, cookie);
sc 164 dev/tc/tcds.c struct tcds_softc *sc = (struct tcds_softc *)self;
sc 181 dev/tc/tcds.c sc->sc_flags = td->td_flags;
sc 183 dev/tc/tcds.c sc->sc_bst = ta->ta_memt;
sc 184 dev/tc/tcds.c sc->sc_dmat = ta->ta_dmat;
sc 189 dev/tc/tcds.c if (bus_space_map(sc->sc_bst, ta->ta_addr,
sc 190 dev/tc/tcds.c (TCDS_SCSI1_OFFSET + 0x100), 0, &sc->sc_bsh)) {
sc 191 dev/tc/tcds.c printf("%s: unable to map device\n", sc->sc_dv.dv_xname);
sc 198 dev/tc/tcds.c if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI0_OFFSET,
sc 200 dev/tc/tcds.c bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI1_OFFSET,
sc 203 dev/tc/tcds.c sc->sc_dv.dv_xname);
sc 207 dev/tc/tcds.c sc->sc_cookie = ta->ta_cookie;
sc 209 dev/tc/tcds.c tc_intr_establish(parent, sc->sc_cookie, TC_IPL_BIO, tcds_intr, sc);
sc 216 dev/tc/tcds.c bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, 0);
sc 223 dev/tc/tcds.c gpi2 = (bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR) &
sc 232 dev/tc/tcds.c slotc = &sc->sc_slots[i];
sc 235 dev/tc/tcds.c evcount_attach(&slotc->sc_count, sc->sc_dv.dv_xname, NULL,
sc 239 dev/tc/tcds.c slotc->sc_bst = sc->sc_bst;
sc 240 dev/tc/tcds.c slotc->sc_bsh = sc->sc_bsh;
sc 246 dev/tc/tcds.c slotc = &sc->sc_slots[0];
sc 259 dev/tc/tcds.c slotc = &sc->sc_slots[1];
sc 273 dev/tc/tcds.c tcds_params(sc, i, &tcdsdev.tcdsda_id,
sc 276 dev/tc/tcds.c tcdsdev.tcdsda_bst = sc->sc_bst;
sc 278 dev/tc/tcds.c tcdsdev.tcdsda_dmat = sc->sc_dmat;
sc 280 dev/tc/tcds.c tcdsdev.tcdsda_sc = &sc->sc_slots[i];
sc 286 dev/tc/tcds.c if ((sc->sc_flags & TCDSF_BASEBOARD && gpi2 == 0) ||
sc 287 dev/tc/tcds.c sc->sc_flags & TCDSF_FASTSCSI) {
sc 294 dev/tc/tcds.c if (sc->sc_flags & TCDSF_BASEBOARD)
sc 307 dev/tc/tcds.c if (sc->sc_flags & TCDSF_BASEBOARD &&
sc 352 dev/tc/tcds.c struct tcds_softc *sc = (struct tcds_softc *)tcds;
sc 354 dev/tc/tcds.c if (sc->sc_slots[slot].sc_intrhand != tcds_intrnull)
sc 357 dev/tc/tcds.c sc->sc_slots[slot].sc_intrhand = func;
sc 358 dev/tc/tcds.c sc->sc_slots[slot].sc_intrarg = arg;
sc 359 dev/tc/tcds.c tcds_scsi_reset(&sc->sc_slots[slot]);
sc 367 dev/tc/tcds.c struct tcds_softc *sc = (struct tcds_softc *)tcds;
sc 369 dev/tc/tcds.c if (sc->sc_slots[slot].sc_intrhand == tcds_intrnull)
sc 373 dev/tc/tcds.c sc->sc_slots[slot].sc_intrhand = tcds_intrnull;
sc 374 dev/tc/tcds.c sc->sc_slots[slot].sc_intrarg = (void *)(u_long)slot;
sc 376 dev/tc/tcds.c tcds_dma_enable(&sc->sc_slots[slot], 0);
sc 377 dev/tc/tcds.c tcds_scsi_enable(&sc->sc_slots[slot], 0);
sc 390 dev/tc/tcds.c tcds_scsi_reset(sc)
sc 391 dev/tc/tcds.c struct tcds_slotconfig *sc;
sc 395 dev/tc/tcds.c tcds_dma_enable(sc, 0);
sc 396 dev/tc/tcds.c tcds_scsi_enable(sc, 0);
sc 398 dev/tc/tcds.c cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
sc 399 dev/tc/tcds.c TCDS_CIR_CLR(cir, sc->sc_resetbits);
sc 400 dev/tc/tcds.c bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
sc 404 dev/tc/tcds.c cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
sc 405 dev/tc/tcds.c TCDS_CIR_SET(cir, sc->sc_resetbits);
sc 406 dev/tc/tcds.c bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
sc 408 dev/tc/tcds.c tcds_scsi_enable(sc, 1);
sc 409 dev/tc/tcds.c tcds_dma_enable(sc, 1);
sc 413 dev/tc/tcds.c tcds_scsi_enable(sc, on)
sc 414 dev/tc/tcds.c struct tcds_slotconfig *sc;
sc 419 dev/tc/tcds.c imer = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER);
sc 422 dev/tc/tcds.c imer |= sc->sc_intrmaskbits;
sc 424 dev/tc/tcds.c imer &= ~sc->sc_intrmaskbits;
sc 426 dev/tc/tcds.c bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, imer);
sc 430 dev/tc/tcds.c tcds_dma_enable(sc, on)
sc 431 dev/tc/tcds.c struct tcds_slotconfig *sc;
sc 436 dev/tc/tcds.c cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
sc 440 dev/tc/tcds.c TCDS_CIR_SET(cir, sc->sc_dmabits);
sc 442 dev/tc/tcds.c TCDS_CIR_CLR(cir, sc->sc_dmabits);
sc 444 dev/tc/tcds.c bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
sc 448 dev/tc/tcds.c tcds_scsi_isintr(sc, clear)
sc 449 dev/tc/tcds.c struct tcds_slotconfig *sc;
sc 454 dev/tc/tcds.c cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
sc 456 dev/tc/tcds.c if ((cir & sc->sc_intrbits) != 0) {
sc 458 dev/tc/tcds.c TCDS_CIR_CLR(cir, sc->sc_intrbits);
sc 459 dev/tc/tcds.c bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR,
sc 468 dev/tc/tcds.c tcds_scsi_iserr(sc)
sc 469 dev/tc/tcds.c struct tcds_slotconfig *sc;
sc 473 dev/tc/tcds.c cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
sc 474 dev/tc/tcds.c return ((cir & sc->sc_errorbits) != 0);
sc 481 dev/tc/tcds.c struct tcds_softc *sc = arg;
sc 488 dev/tc/tcds.c ir = ir0 = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
sc 490 dev/tc/tcds.c bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, ir0);
sc 494 dev/tc/tcds.c if (ir & sc->sc_slots[slot].sc_intrbits) { \
sc 495 dev/tc/tcds.c sc->sc_slots[slot].sc_count.ec_count++; \
sc 496 dev/tc/tcds.c (void)(*sc->sc_slots[slot].sc_intrhand) \
sc 497 dev/tc/tcds.c (sc->sc_slots[slot].sc_intrarg); \
sc 514 dev/tc/tcds.c printf("%s: %s", sc->sc_dv.dv_xname, msg);
sc 543 dev/tc/tcds.c tcds_params(sc, chip, idp, fastp)
sc 544 dev/tc/tcds.c struct tcds_softc *sc;
sc 551 dev/tc/tcds.c if (sc->sc_flags & TCDSF_BASEBOARD) {
sc 564 dev/tc/tcds.c ids = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_EEPROM_IDS);
sc 574 dev/tc/tcds.c sc->sc_dv.dv_xname, id, chip);
sc 580 dev/tc/tcds.c sc->sc_dv.dv_xname, chip);
sc 244 dev/usb/ehci.c #define ehci_add_intr_list(sc, ex) \
sc 245 dev/usb/ehci.c LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
sc 333 dev/usb/ehci.c ehci_init(ehci_softc_t *sc)
sc 342 dev/usb/ehci.c theehci = sc;
sc 346 dev/usb/ehci.c vers = EREAD2(sc, EHCI_HCIVERSION);
sc 347 dev/usb/ehci.c DPRINTF(("%s: EHCI version %x.%x\n", sc->sc_bus.bdev.dv_xname,
sc 351 dev/usb/ehci.c sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
sc 353 dev/usb/ehci.c sparams = EREAD4(sc, EHCI_HCSPARAMS);
sc 355 dev/usb/ehci.c sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
sc 356 dev/usb/ehci.c cparams = EREAD4(sc, EHCI_HCCPARAMS);
sc 361 dev/usb/ehci.c EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
sc 363 dev/usb/ehci.c sc->sc_bus.usbrev = USBREV_2_0;
sc 366 dev/usb/ehci.c DPRINTF(("%s: resetting\n", sc->sc_bus.bdev.dv_xname));
sc 367 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
sc 368 dev/usb/ehci.c usb_delay_ms(&sc->sc_bus, 1);
sc 369 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
sc 371 dev/usb/ehci.c usb_delay_ms(&sc->sc_bus, 1);
sc 372 dev/usb/ehci.c hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
sc 378 dev/usb/ehci.c sc->sc_bus.bdev.dv_xname);
sc 383 dev/usb/ehci.c sc->sc_rand = 96;
sc 386 dev/usb/ehci.c switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
sc 387 dev/usb/ehci.c case 0: sc->sc_flsize = 1024; break;
sc 388 dev/usb/ehci.c case 1: sc->sc_flsize = 512; break;
sc 389 dev/usb/ehci.c case 2: sc->sc_flsize = 256; break;
sc 392 dev/usb/ehci.c err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
sc 393 dev/usb/ehci.c EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
sc 396 dev/usb/ehci.c DPRINTF(("%s: flsize=%d\n", sc->sc_bus.bdev.dv_xname,sc->sc_flsize));
sc 397 dev/usb/ehci.c sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
sc 398 dev/usb/ehci.c EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
sc 401 dev/usb/ehci.c sc->sc_bus.methods = &ehci_bus_methods;
sc 402 dev/usb/ehci.c sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
sc 404 dev/usb/ehci.c sc->sc_powerhook = powerhook_establish(ehci_power, sc);
sc 406 dev/usb/ehci.c sc->sc_eintrs = EHCI_NORMAL_INTRS;
sc 413 dev/usb/ehci.c sqh = ehci_alloc_sqh(sc);
sc 418 dev/usb/ehci.c sc->sc_islots[i].sqh = sqh;
sc 421 dev/usb/ehci.c sqh = sc->sc_islots[i].sqh;
sc 428 dev/usb/ehci.c sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh;
sc 442 dev/usb/ehci.c for (j = i; j < sc->sc_flsize; j += 1 << (EHCI_IPOLLRATES - 1))
sc 443 dev/usb/ehci.c sc->sc_flist[j] = htole32(EHCI_LINK_QH | sc->sc_islots[
sc 448 dev/usb/ehci.c sqh = ehci_alloc_sqh(sc);
sc 472 dev/usb/ehci.c sc->sc_async_head = sqh;
sc 473 dev/usb/ehci.c EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
sc 475 dev/usb/ehci.c timeout_set(&sc->sc_tmo_pcd, NULL, NULL);
sc 476 dev/usb/ehci.c timeout_set(&sc->sc_tmo_intrlist, NULL, NULL);
sc 478 dev/usb/ehci.c rw_init(&sc->sc_doorbell_lock, "ehcidb");
sc 481 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBCMD,
sc 483 dev/usb/ehci.c (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
sc 489 dev/usb/ehci.c EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
sc 492 dev/usb/ehci.c usb_delay_ms(&sc->sc_bus, 1);
sc 493 dev/usb/ehci.c hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
sc 498 dev/usb/ehci.c printf("%s: run timeout\n", sc->sc_bus.bdev.dv_xname);
sc 504 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
sc 510 dev/usb/ehci.c ehci_free_sqh(sc, sc->sc_async_head);
sc 513 dev/usb/ehci.c usb_freemem(&sc->sc_bus, &sc->sc_fldma);
sc 520 dev/usb/ehci.c ehci_softc_t *sc = v;
sc 522 dev/usb/ehci.c if (sc == NULL || sc->sc_dying)
sc 526 dev/usb/ehci.c if (sc->sc_bus.use_polling) {
sc 527 dev/usb/ehci.c u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
sc 530 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
sc 534 dev/usb/ehci.c return (ehci_intr1(sc));
sc 538 dev/usb/ehci.c ehci_intr1(ehci_softc_t *sc)
sc 545 dev/usb/ehci.c if (sc == NULL) {
sc 552 dev/usb/ehci.c intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
sc 556 dev/usb/ehci.c eintrs = intrs & sc->sc_eintrs;
sc 558 dev/usb/ehci.c sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), (u_int)eintrs));
sc 562 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
sc 563 dev/usb/ehci.c sc->sc_bus.intr_context++;
sc 564 dev/usb/ehci.c sc->sc_bus.no_intrs++;
sc 567 dev/usb/ehci.c wakeup(&sc->sc_async_head);
sc 574 dev/usb/ehci.c usb_schedsoftintr(&sc->sc_bus);
sc 579 dev/usb/ehci.c sc->sc_bus.bdev.dv_xname);
sc 583 dev/usb/ehci.c ehci_pcd(sc, sc->sc_intrxfer);
sc 588 dev/usb/ehci.c ehci_pcd_able(sc, 0);
sc 590 dev/usb/ehci.c timeout_del(&sc->sc_tmo_pcd);
sc 591 dev/usb/ehci.c timeout_set(&sc->sc_tmo_pcd, ehci_pcd_enable, sc);
sc 592 dev/usb/ehci.c timeout_add(&sc->sc_tmo_pcd, hz);
sc 596 dev/usb/ehci.c sc->sc_bus.intr_context--;
sc 600 dev/usb/ehci.c sc->sc_eintrs &= ~eintrs;
sc 601 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
sc 603 dev/usb/ehci.c sc->sc_bus.bdev.dv_xname, eintrs);
sc 610 dev/usb/ehci.c ehci_pcd_able(ehci_softc_t *sc, int on)
sc 614 dev/usb/ehci.c sc->sc_eintrs |= EHCI_STS_PCD;
sc 616 dev/usb/ehci.c sc->sc_eintrs &= ~EHCI_STS_PCD;
sc 617 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
sc 623 dev/usb/ehci.c ehci_softc_t *sc = v_sc;
sc 625 dev/usb/ehci.c ehci_pcd_able(sc, 1);
sc 629 dev/usb/ehci.c ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
sc 643 dev/usb/ehci.c m = min(sc->sc_noport, xfer->length * 8 - 1);
sc 647 dev/usb/ehci.c if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
sc 660 dev/usb/ehci.c ehci_softc_t *sc = v;
sc 663 dev/usb/ehci.c DPRINTFN(10,("%s: ehci_softintr (%d)\n", sc->sc_bus.bdev.dv_xname,
sc 664 dev/usb/ehci.c sc->sc_bus.intr_context));
sc 666 dev/usb/ehci.c sc->sc_bus.intr_context++;
sc 674 dev/usb/ehci.c for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
sc 676 dev/usb/ehci.c ehci_check_intr(sc, ex);
sc 680 dev/usb/ehci.c if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) &&
sc 681 dev/usb/ehci.c !LIST_EMPTY(&sc->sc_intrhead)) {
sc 682 dev/usb/ehci.c timeout_del(&sc->sc_tmo_intrlist);
sc 683 dev/usb/ehci.c timeout_set(&sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc);
sc 684 dev/usb/ehci.c timeout_add(&sc->sc_tmo_intrlist, hz);
sc 688 dev/usb/ehci.c if (sc->sc_softwake) {
sc 689 dev/usb/ehci.c sc->sc_softwake = 0;
sc 690 dev/usb/ehci.c wakeup(&sc->sc_softwake);
sc 694 dev/usb/ehci.c sc->sc_bus.intr_context--;
sc 699 dev/usb/ehci.c ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
sc 847 dev/usb/ehci.c ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
sc 854 dev/usb/ehci.c usb_delay_ms(&sc->sc_bus, 1);
sc 855 dev/usb/ehci.c if (sc->sc_dying)
sc 857 dev/usb/ehci.c intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
sc 858 dev/usb/ehci.c sc->sc_eintrs;
sc 862 dev/usb/ehci.c ehci_dump_regs(sc);
sc 865 dev/usb/ehci.c ehci_intr1(sc);
sc 881 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)bus;
sc 885 dev/usb/ehci.c new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
sc 892 dev/usb/ehci.c if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
sc 893 dev/usb/ehci.c ehci_intr1(sc);
sc 897 dev/usb/ehci.c ehci_detach(struct ehci_softc *sc, int flags)
sc 901 dev/usb/ehci.c if (sc->sc_child != NULL)
sc 902 dev/usb/ehci.c rv = config_detach(sc->sc_child, flags);
sc 907 dev/usb/ehci.c timeout_del(&sc->sc_tmo_intrlist);
sc 908 dev/usb/ehci.c timeout_del(&sc->sc_tmo_pcd);
sc 910 dev/usb/ehci.c if (sc->sc_powerhook != NULL)
sc 911 dev/usb/ehci.c powerhook_disestablish(sc->sc_powerhook);
sc 912 dev/usb/ehci.c if (sc->sc_shutdownhook != NULL)
sc 913 dev/usb/ehci.c shutdownhook_disestablish(sc->sc_shutdownhook);
sc 915 dev/usb/ehci.c usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
sc 926 dev/usb/ehci.c struct ehci_softc *sc = (struct ehci_softc *)self;
sc 934 dev/usb/ehci.c if (sc->sc_child != NULL)
sc 935 dev/usb/ehci.c rv = config_deactivate(sc->sc_child);
sc 936 dev/usb/ehci.c sc->sc_dying = 1;
sc 952 dev/usb/ehci.c ehci_softc_t *sc = v;
sc 957 dev/usb/ehci.c DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
sc 959 dev/usb/ehci.c ehci_dump_regs(sc);
sc 966 dev/usb/ehci.c sc->sc_bus.use_polling++;
sc 968 dev/usb/ehci.c for (i = 1; i <= sc->sc_noport; i++) {
sc 969 dev/usb/ehci.c cmd = EOREAD4(sc, EHCI_PORTSC(i));
sc 971 dev/usb/ehci.c EOWRITE4(sc, EHCI_PORTSC(i),
sc 975 dev/usb/ehci.c sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
sc 976 dev/usb/ehci.c cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
sc 977 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBCMD, cmd);
sc 980 dev/usb/ehci.c hcr = EOREAD4(sc, EHCI_USBSTS) &
sc 985 dev/usb/ehci.c usb_delay_ms(&sc->sc_bus, 1);
sc 989 dev/usb/ehci.c sc->sc_bus.bdev.dv_xname);
sc 992 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBCMD, cmd);
sc 995 dev/usb/ehci.c hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
sc 999 dev/usb/ehci.c usb_delay_ms(&sc->sc_bus, 1);
sc 1003 dev/usb/ehci.c sc->sc_bus.bdev.dv_xname);
sc 1005 dev/usb/ehci.c sc->sc_bus.use_polling--;
sc 1009 dev/usb/ehci.c sc->sc_bus.use_polling++;
sc 1012 dev/usb/ehci.c EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
sc 1013 dev/usb/ehci.c EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
sc 1014 dev/usb/ehci.c EOWRITE4(sc, EHCI_ASYNCLISTADDR,
sc 1015 dev/usb/ehci.c sc->sc_async_head->physaddr | EHCI_LINK_QH);
sc 1016 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
sc 1019 dev/usb/ehci.c for (i = 1; i <= sc->sc_noport; i++) {
sc 1020 dev/usb/ehci.c cmd = EOREAD4(sc, EHCI_PORTSC(i));
sc 1022 dev/usb/ehci.c EOWRITE4(sc, EHCI_PORTSC(i),
sc 1029 dev/usb/ehci.c usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
sc 1030 dev/usb/ehci.c for (i = 1; i <= sc->sc_noport; i++) {
sc 1031 dev/usb/ehci.c cmd = EOREAD4(sc, EHCI_PORTSC(i));
sc 1034 dev/usb/ehci.c EOWRITE4(sc, EHCI_PORTSC(i),
sc 1039 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
sc 1042 dev/usb/ehci.c EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
sc 1045 dev/usb/ehci.c hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
sc 1049 dev/usb/ehci.c usb_delay_ms(&sc->sc_bus, 1);
sc 1053 dev/usb/ehci.c sc->sc_bus.bdev.dv_xname);
sc 1055 dev/usb/ehci.c usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
sc 1057 dev/usb/ehci.c sc->sc_bus.use_polling--;
sc 1063 dev/usb/ehci.c DPRINTF(("ehci_power: sc=%p\n", sc));
sc 1065 dev/usb/ehci.c ehci_dump_regs(sc);
sc 1075 dev/usb/ehci.c ehci_softc_t *sc = v;
sc 1078 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBCMD, 0); /* Halt controller */
sc 1079 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
sc 1085 dev/usb/ehci.c struct ehci_softc *sc = (struct ehci_softc *)bus;
sc 1088 dev/usb/ehci.c err = usb_allocmem(&sc->sc_bus, size, 0, dma);
sc 1099 dev/usb/ehci.c struct ehci_softc *sc = (struct ehci_softc *)bus;
sc 1101 dev/usb/ehci.c usb_freemem(&sc->sc_bus, dma);
sc 1107 dev/usb/ehci.c struct ehci_softc *sc = (struct ehci_softc *)bus;
sc 1110 dev/usb/ehci.c xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
sc 1112 dev/usb/ehci.c SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
sc 1137 dev/usb/ehci.c struct ehci_softc *sc = (struct ehci_softc *)bus;
sc 1151 dev/usb/ehci.c SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
sc 1179 dev/usb/ehci.c ehci_dump_regs(ehci_softc_t *sc)
sc 1184 dev/usb/ehci.c EOREAD4(sc, EHCI_USBCMD),
sc 1185 dev/usb/ehci.c EOREAD4(sc, EHCI_USBSTS),
sc 1186 dev/usb/ehci.c EOREAD4(sc, EHCI_USBINTR));
sc 1188 dev/usb/ehci.c EOREAD4(sc, EHCI_FRINDEX),
sc 1189 dev/usb/ehci.c EOREAD4(sc, EHCI_CTRLDSSEGMENT),
sc 1190 dev/usb/ehci.c EOREAD4(sc, EHCI_PERIODICLISTBASE),
sc 1191 dev/usb/ehci.c EOREAD4(sc, EHCI_ASYNCLISTADDR));
sc 1192 dev/usb/ehci.c for (i = 1; i <= sc->sc_noport; i++)
sc 1194 dev/usb/ehci.c EOREAD4(sc, EHCI_PORTSC(i)));
sc 1313 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
sc 1325 dev/usb/ehci.c pipe, addr, ed->bEndpointAddress, sc->sc_addr));
sc 1327 dev/usb/ehci.c if (sc->sc_dying)
sc 1338 dev/usb/ehci.c if (addr == sc->sc_addr) {
sc 1362 dev/usb/ehci.c sc->sc_bus.bdev.dv_xname);
sc 1369 dev/usb/ehci.c sqh = ehci_alloc_sqh(sc);
sc 1399 dev/usb/ehci.c err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
sc 1409 dev/usb/ehci.c ehci_add_qh(sqh, sc->sc_async_head);
sc 1415 dev/usb/ehci.c ehci_add_qh(sqh, sc->sc_async_head);
sc 1423 dev/usb/ehci.c return (ehci_device_setintr(sc, sqh, ival));
sc 1433 dev/usb/ehci.c ehci_free_sqh(sc, sqh);
sc 1469 dev/usb/ehci.c ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
sc 1477 dev/usb/ehci.c ehci_sync_hc(sc);
sc 1510 dev/usb/ehci.c ehci_sync_hc(ehci_softc_t *sc)
sc 1515 dev/usb/ehci.c if (sc->sc_dying) {
sc 1521 dev/usb/ehci.c rw_enter_write(&sc->sc_doorbell_lock);
sc 1525 dev/usb/ehci.c EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) |
sc 1528 dev/usb/ehci.c EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
sc 1530 dev/usb/ehci.c error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz / 2);
sc 1532 dev/usb/ehci.c EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
sc 1536 dev/usb/ehci.c rw_exit_write(&sc->sc_doorbell_lock);
sc 1655 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
sc 1665 dev/usb/ehci.c if (sc->sc_dying)
sc 1697 dev/usb/ehci.c *(u_int8_t *)buf = sc->sc_conf;
sc 1710 dev/usb/ehci.c USETW(ehci_devd.idVendor, sc->sc_id_vendor);
sc 1760 dev/usb/ehci.c totlen = ehci_str(buf, len, sc->sc_vendor);
sc 1796 dev/usb/ehci.c sc->sc_addr = value;
sc 1803 dev/usb/ehci.c sc->sc_conf = value;
sc 1822 dev/usb/ehci.c if (index < 1 || index > sc->sc_noport) {
sc 1827 dev/usb/ehci.c v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
sc 1830 dev/usb/ehci.c EOWRITE4(sc, port, v &~ EHCI_PS_PE);
sc 1833 dev/usb/ehci.c EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
sc 1836 dev/usb/ehci.c EOWRITE4(sc, port, v &~ EHCI_PS_PP);
sc 1845 dev/usb/ehci.c EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
sc 1848 dev/usb/ehci.c EOWRITE4(sc, port, v | EHCI_PS_CSC);
sc 1851 dev/usb/ehci.c EOWRITE4(sc, port, v | EHCI_PS_PEC);
sc 1857 dev/usb/ehci.c EOWRITE4(sc, port, v | EHCI_PS_OCC);
sc 1860 dev/usb/ehci.c sc->sc_isreset = 0;
sc 1874 dev/usb/ehci.c if ((OREAD4(sc, port) >> 16) == 0)
sc 1875 dev/usb/ehci.c ehci_pcd_able(sc, 1);
sc 1888 dev/usb/ehci.c hubd.bNbrPorts = sc->sc_noport;
sc 1889 dev/usb/ehci.c v = EOREAD4(sc, EHCI_HCSPARAMS);
sc 1892 dev/usb/ehci.c EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
sc 1895 dev/usb/ehci.c for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
sc 1913 dev/usb/ehci.c if (index < 1 || index > sc->sc_noport) {
sc 1921 dev/usb/ehci.c v = EOREAD4(sc, EHCI_PORTSC(index));
sc 1935 dev/usb/ehci.c if (sc->sc_isreset) i |= UPS_C_PORT_RESET;
sc 1947 dev/usb/ehci.c if (index < 1 || index > sc->sc_noport) {
sc 1952 dev/usb/ehci.c v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
sc 1955 dev/usb/ehci.c EOWRITE4(sc, port, v | EHCI_PS_PE);
sc 1958 dev/usb/ehci.c EOWRITE4(sc, port, v | EHCI_PS_SUSP);
sc 1965 dev/usb/ehci.c ehci_disown(sc, index, 1);
sc 1970 dev/usb/ehci.c EOWRITE4(sc, port, v | EHCI_PS_PR);
sc 1972 dev/usb/ehci.c usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
sc 1973 dev/usb/ehci.c if (sc->sc_dying) {
sc 1978 dev/usb/ehci.c EOWRITE4(sc, port, v);
sc 1980 dev/usb/ehci.c usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
sc 1981 dev/usb/ehci.c if (sc->sc_dying) {
sc 1985 dev/usb/ehci.c v = EOREAD4(sc, port);
sc 1989 dev/usb/ehci.c sc->sc_bus.bdev.dv_xname);
sc 1994 dev/usb/ehci.c ehci_disown(sc, index, 0);
sc 1997 dev/usb/ehci.c sc->sc_isreset = 1;
sc 2004 dev/usb/ehci.c EOWRITE4(sc, port, v | EHCI_PS_PP);
sc 2013 dev/usb/ehci.c EOWRITE4(sc, port, v | EHCI_PS_PIC);
sc 2040 dev/usb/ehci.c ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
sc 2048 dev/usb/ehci.c v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
sc 2049 dev/usb/ehci.c EOWRITE4(sc, port, v | EHCI_PS_PO);
sc 2090 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
sc 2092 dev/usb/ehci.c if (sc->sc_dying)
sc 2095 dev/usb/ehci.c sc->sc_intrxfer = xfer;
sc 2120 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
sc 2124 dev/usb/ehci.c sc->sc_intrxfer = NULL;
sc 2135 dev/usb/ehci.c ehci_alloc_sqh(ehci_softc_t *sc)
sc 2142 dev/usb/ehci.c if (sc->sc_freeqhs == NULL) {
sc 2144 dev/usb/ehci.c err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
sc 2156 dev/usb/ehci.c sqh->next = sc->sc_freeqhs;
sc 2157 dev/usb/ehci.c sc->sc_freeqhs = sqh;
sc 2160 dev/usb/ehci.c sqh = sc->sc_freeqhs;
sc 2161 dev/usb/ehci.c sc->sc_freeqhs = sqh->next;
sc 2169 dev/usb/ehci.c ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
sc 2171 dev/usb/ehci.c sqh->next = sc->sc_freeqhs;
sc 2172 dev/usb/ehci.c sc->sc_freeqhs = sqh;
sc 2176 dev/usb/ehci.c ehci_alloc_sqtd(ehci_softc_t *sc)
sc 2184 dev/usb/ehci.c if (sc->sc_freeqtds == NULL) {
sc 2186 dev/usb/ehci.c err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
sc 2199 dev/usb/ehci.c sqtd->nextqtd = sc->sc_freeqtds;
sc 2200 dev/usb/ehci.c sc->sc_freeqtds = sqtd;
sc 2206 dev/usb/ehci.c sqtd = sc->sc_freeqtds;
sc 2207 dev/usb/ehci.c sc->sc_freeqtds = sqtd->nextqtd;
sc 2217 dev/usb/ehci.c ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
sc 2222 dev/usb/ehci.c sqtd->nextqtd = sc->sc_freeqtds;
sc 2223 dev/usb/ehci.c sc->sc_freeqtds = sqtd;
sc 2228 dev/usb/ehci.c ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, int alen,
sc 2259 dev/usb/ehci.c cur = ehci_alloc_sqtd(sc);
sc 2304 dev/usb/ehci.c next = ehci_alloc_sqtd(sc);
sc 2368 dev/usb/ehci.c ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
sc 2379 dev/usb/ehci.c ehci_free_sqtd(sc, sqtd);
sc 2393 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
sc 2398 dev/usb/ehci.c ehci_rem_qh(sc, sqh, head);
sc 2402 dev/usb/ehci.c ehci_free_sqh(sc, epipe->sqh);
sc 2420 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
sc 2430 dev/usb/ehci.c if (sc->sc_dying) {
sc 2479 dev/usb/ehci.c ehci_rem_qh(sc, sqh, psqh);
sc 2493 dev/usb/ehci.c ehci_sync_hc(sc);
sc 2505 dev/usb/ehci.c sc->sc_softwake = 1;
sc 2507 dev/usb/ehci.c usb_schedsoftintr(&sc->sc_bus);
sc 2509 dev/usb/ehci.c tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
sc 2616 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
sc 2624 dev/usb/ehci.c if (sc->sc_dying) {
sc 2660 dev/usb/ehci.c ehci_softc_t *sc = arg;
sc 2664 dev/usb/ehci.c usb_schedsoftintr(&sc->sc_bus);
sc 2688 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
sc 2691 dev/usb/ehci.c if (sc->sc_dying)
sc 2706 dev/usb/ehci.c if (sc->sc_bus.use_polling)
sc 2707 dev/usb/ehci.c ehci_waitintr(sc, xfer);
sc 2715 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
sc 2728 dev/usb/ehci.c ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
sc 2746 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
sc 2750 dev/usb/ehci.c ehci_close_pipe(pipe, sc->sc_async_head);
sc 2760 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
sc 2778 dev/usb/ehci.c setup = ehci_alloc_sqtd(sc);
sc 2783 dev/usb/ehci.c stat = ehci_alloc_sqtd(sc);
sc 2807 dev/usb/ehci.c err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
sc 2868 dev/usb/ehci.c if (xfer->timeout && !sc->sc_bus.use_polling) {
sc 2873 dev/usb/ehci.c ehci_add_intr_list(sc, exfer);
sc 2880 dev/usb/ehci.c EOREAD4(sc, EHCI_USBSTS)));
sc 2882 dev/usb/ehci.c ehci_dump_regs(sc);
sc 2883 dev/usb/ehci.c ehci_dump_sqh(sc->sc_async_head);
sc 2892 dev/usb/ehci.c ehci_free_sqtd(sc, stat);
sc 2894 dev/usb/ehci.c ehci_free_sqtd(sc, setup);
sc 2925 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
sc 2935 dev/usb/ehci.c if (sc->sc_dying)
sc 2950 dev/usb/ehci.c err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
sc 2979 dev/usb/ehci.c if (xfer->timeout && !sc->sc_bus.use_polling) {
sc 2984 dev/usb/ehci.c ehci_add_intr_list(sc, exfer);
sc 2993 dev/usb/ehci.c ehci_dump_regs(sc);
sc 2996 dev/usb/ehci.c ehci_dump_sqh(sc->sc_async_head);
sc 3004 dev/usb/ehci.c if (sc->sc_bus.use_polling)
sc 3005 dev/usb/ehci.c ehci_waitintr(sc, xfer);
sc 3024 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
sc 3027 dev/usb/ehci.c ehci_close_pipe(pipe, sc->sc_async_head);
sc 3034 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
sc 3042 dev/usb/ehci.c ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
sc 3051 dev/usb/ehci.c ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
sc 3065 dev/usb/ehci.c sc->sc_rand = (sc->sc_rand + 192) % sc->sc_flsize;
sc 3066 dev/usb/ehci.c islot = EHCI_IQHIDX(lev, sc->sc_rand);
sc 3071 dev/usb/ehci.c isp = &sc->sc_islots[islot];
sc 3100 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
sc 3110 dev/usb/ehci.c if (sc->sc_dying)
sc 3125 dev/usb/ehci.c err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
sc 3153 dev/usb/ehci.c if (xfer->timeout && !sc->sc_bus.use_polling) {
sc 3158 dev/usb/ehci.c ehci_add_intr_list(sc, exfer);
sc 3167 dev/usb/ehci.c ehci_dump_regs(sc);
sc 3174 dev/usb/ehci.c if (sc->sc_bus.use_polling)
sc 3175 dev/usb/ehci.c ehci_waitintr(sc, xfer);
sc 3195 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
sc 3199 dev/usb/ehci.c isp = &sc->sc_islots[epipe->sqh->islot];
sc 3208 dev/usb/ehci.c ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
sc 3219 dev/usb/ehci.c ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
sc 3227 dev/usb/ehci.c err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
sc 3248 dev/usb/ehci.c if (xfer->timeout && !sc->sc_bus.use_polling) {
sc 3259 dev/usb/ehci.c ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
sc 144 dev/usb/ehcivar.h #define EREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (a))
sc 145 dev/usb/ehcivar.h #define EREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (a))
sc 146 dev/usb/ehcivar.h #define EREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (a))
sc 147 dev/usb/ehcivar.h #define EWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (a), (x))
sc 148 dev/usb/ehcivar.h #define EWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (a), (x))
sc 149 dev/usb/ehcivar.h #define EWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (a), (x))
sc 150 dev/usb/ehcivar.h #define EOREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
sc 151 dev/usb/ehcivar.h #define EOREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
sc 152 dev/usb/ehcivar.h #define EOREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
sc 153 dev/usb/ehcivar.h #define EOWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
sc 154 dev/usb/ehcivar.h #define EOWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
sc 155 dev/usb/ehcivar.h #define EOWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
sc 262 dev/usb/if_atu.c usbd_status atu_usb_request(struct atu_softc *sc, u_int8_t type,
sc 265 dev/usb/if_atu.c int atu_send_command(struct atu_softc *sc, u_int8_t *command, int size);
sc 266 dev/usb/if_atu.c int atu_get_cmd_status(struct atu_softc *sc, u_int8_t cmd,
sc 268 dev/usb/if_atu.c int atu_wait_completion(struct atu_softc *sc, u_int8_t cmd,
sc 270 dev/usb/if_atu.c int atu_send_mib(struct atu_softc *sc, u_int8_t type,
sc 272 dev/usb/if_atu.c int atu_get_mib(struct atu_softc *sc, u_int8_t type,
sc 275 dev/usb/if_atu.c int atu_start_ibss(struct atu_softc *sc);
sc 277 dev/usb/if_atu.c int atu_start_scan(struct atu_softc *sc);
sc 278 dev/usb/if_atu.c int atu_switch_radio(struct atu_softc *sc, int state);
sc 279 dev/usb/if_atu.c int atu_initial_config(struct atu_softc *sc);
sc 280 dev/usb/if_atu.c int atu_join(struct atu_softc *sc, struct ieee80211_node *node);
sc 281 dev/usb/if_atu.c int8_t atu_get_dfu_state(struct atu_softc *sc);
sc 282 dev/usb/if_atu.c u_int8_t atu_get_opmode(struct atu_softc *sc, u_int8_t *mode);
sc 285 dev/usb/if_atu.c int atu_get_card_config(struct atu_softc *sc);
sc 290 dev/usb/if_atu.c void atu_xfer_list_free(struct atu_softc *sc, struct atu_chain *ch,
sc 301 dev/usb/if_atu.c atu_usb_request(struct atu_softc *sc, u_int8_t type,
sc 320 dev/usb/if_atu.c "len=%02x\n", sc->atu_dev.dv_xname, request,
sc 324 dev/usb/if_atu.c "len=%02x [%8D]\n", sc->atu_dev.dv_xname,
sc 332 dev/usb/if_atu.c xfer = usbd_alloc_xfer(sc->atu_udev);
sc 333 dev/usb/if_atu.c usbd_setup_default_xfer(xfer, sc->atu_udev, 0, 500000, &req, data,
sc 344 dev/usb/if_atu.c sc->atu_dev.dv_xname, total_len));
sc 346 dev/usb/if_atu.c sc->atu_dev.dv_xname, data, " "));
sc 350 dev/usb/if_atu.c sc->atu_dev.dv_xname, total_len));
sc 362 dev/usb/if_atu.c atu_send_command(struct atu_softc *sc, u_int8_t *command, int size)
sc 364 dev/usb/if_atu.c return atu_usb_request(sc, UT_WRITE_VENDOR_DEVICE, 0x0e, 0x0000,
sc 369 dev/usb/if_atu.c atu_get_cmd_status(struct atu_softc *sc, u_int8_t cmd, u_int8_t *status)
sc 380 dev/usb/if_atu.c return atu_usb_request(sc, UT_READ_VENDOR_INTERFACE, 0x22, cmd,
sc 385 dev/usb/if_atu.c atu_wait_completion(struct atu_softc *sc, u_int8_t cmd, u_int8_t *status)
sc 391 dev/usb/if_atu.c sc->atu_dev.dv_xname, cmd));
sc 394 dev/usb/if_atu.c err = atu_get_cmd_status(sc, cmd, statusreq);
sc 401 dev/usb/if_atu.c sc->atu_dev.dv_xname,
sc 412 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 422 dev/usb/if_atu.c usbd_delay_ms(sc->atu_udev, 25);
sc 427 dev/usb/if_atu.c atu_send_mib(struct atu_softc *sc, u_int8_t type, u_int8_t size,
sc 467 dev/usb/if_atu.c err = atu_usb_request(sc, UT_WRITE_VENDOR_DEVICE, 0x0e, 0x0000,
sc 473 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 474 dev/usb/if_atu.c return atu_wait_completion(sc, CMD_SET_MIB, NULL);
sc 478 dev/usb/if_atu.c atu_get_mib(struct atu_softc *sc, u_int8_t type, u_int8_t size,
sc 483 dev/usb/if_atu.c return atu_usb_request(sc, UT_READ_VENDOR_INTERFACE, 0x033,
sc 489 dev/usb/if_atu.c atu_start_ibss(struct atu_softc *sc)
sc 500 dev/usb/if_atu.c memcpy(Request.SSID, sc->atu_ssid, sc->atu_ssidlen);
sc 501 dev/usb/if_atu.c Request.SSIDSize = sc->atu_ssidlen;
sc 502 dev/usb/if_atu.c if (sc->atu_desired_channel != IEEE80211_CHAN_ANY)
sc 503 dev/usb/if_atu.c Request.Channel = (u_int8_t)sc->atu_desired_channel;
sc 510 dev/usb/if_atu.c err = atu_send_command(sc, (u_int8_t *)&Request, sizeof(Request));
sc 513 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 518 dev/usb/if_atu.c err = atu_wait_completion(sc, CMD_START_IBSS, NULL);
sc 521 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 526 dev/usb/if_atu.c err = atu_get_mib(sc, MIB_MAC_MGMT__CURRENT_BSSID, sc->atu_bssid);
sc 529 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 534 dev/usb/if_atu.c sc->atu_dev.dv_xname, ether_sprintf(sc->atu_bssid)));
sc 540 dev/usb/if_atu.c atu_start_scan(struct atu_softc *sc)
sc 542 dev/usb/if_atu.c struct ieee80211com *ic = &sc->sc_ic;
sc 562 dev/usb/if_atu.c if (sc->atu_desired_channel != IEEE80211_CHAN_ANY)
sc 563 dev/usb/if_atu.c Scan.Channel = (u_int8_t)sc->atu_desired_channel;
sc 565 dev/usb/if_atu.c Scan.Channel = sc->atu_channel;
sc 579 dev/usb/if_atu.c sc->atu_dev.dv_xname, sizeof(Scan)));
sc 580 dev/usb/if_atu.c DPRINTFN(20, ("%s: scan cmd: %52D\n", sc->atu_dev.dv_xname,
sc 586 dev/usb/if_atu.c err = atu_send_command(sc, (u_int8_t *)&Scan, sizeof(Scan));
sc 603 dev/usb/if_atu.c atu_switch_radio(struct atu_softc *sc, int state)
sc 608 dev/usb/if_atu.c if (sc->atu_radio == RadioIntersil) {
sc 619 dev/usb/if_atu.c if (sc->atu_radio_on != state) {
sc 623 dev/usb/if_atu.c err = atu_send_command(sc, (u_int8_t *)&CmdRadio,
sc 628 dev/usb/if_atu.c err = atu_wait_completion(sc, CmdRadio.Cmd, NULL);
sc 633 dev/usb/if_atu.c sc->atu_dev.dv_xname, state ? "on" : "off"));
sc 634 dev/usb/if_atu.c sc->atu_radio_on = state;
sc 640 dev/usb/if_atu.c atu_initial_config(struct atu_softc *sc)
sc 642 dev/usb/if_atu.c struct ieee80211com *ic = &sc->sc_ic;
sc 650 dev/usb/if_atu.c DPRINTFN(10, ("%s: sending mac-addr\n", sc->atu_dev.dv_xname));
sc 651 dev/usb/if_atu.c err = atu_send_mib(sc, MIB_MAC_ADDR__ADDR, ic->ic_myaddr);
sc 654 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 673 dev/usb/if_atu.c if (sc->atu_desired_channel != IEEE80211_CHAN_ANY)
sc 674 dev/usb/if_atu.c cmd.Channel = (u_int8_t)sc->atu_desired_channel;
sc 676 dev/usb/if_atu.c cmd.Channel = sc->atu_channel;
sc 724 dev/usb/if_atu.c err = atu_get_mib(sc, MIB_PHY__REG_DOMAIN, ®_domain);
sc 727 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 730 dev/usb/if_atu.c "adapter\n", sc->atu_dev.dv_xname, reg_domain));
sc 735 dev/usb/if_atu.c DPRINTFN(20, ("%s: configlen=%02x\n", sc->atu_dev.dv_xname,
sc 738 dev/usb/if_atu.c sc->atu_dev.dv_xname, (u_int8_t *)&cmd, " "));
sc 744 dev/usb/if_atu.c err = atu_send_command(sc, (u_int8_t *)&cmd, sizeof(cmd));
sc 747 dev/usb/if_atu.c err = atu_wait_completion(sc, CMD_STARTUP, NULL);
sc 752 dev/usb/if_atu.c err = atu_switch_radio(sc, 1);
sc 757 dev/usb/if_atu.c err = atu_send_mib(sc, MIB_LOCAL__PREAMBLE, NR(PREAMBLE_SHORT));
sc 762 dev/usb/if_atu.c err = atu_send_mib(sc, MIB_MAC__FRAG, NR(2346));
sc 767 dev/usb/if_atu.c err = atu_send_mib(sc, MIB_MAC__RTS, NR(2347));
sc 772 dev/usb/if_atu.c err = atu_send_mib(sc, MIB_LOCAL__AUTO_RATE_FALLBACK, NR(1));
sc 777 dev/usb/if_atu.c err = atu_send_mib(sc, MIB_MAC_MGMT__POWER_MODE,
sc 783 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 788 dev/usb/if_atu.c atu_join(struct atu_softc *sc, struct ieee80211_node *node)
sc 801 dev/usb/if_atu.c sc->atu_dev.dv_xname, ether_sprintf(sc->atu_bssid)));
sc 802 dev/usb/if_atu.c DPRINTFN(15, ("%s: mode=%d\n", sc->atu_dev.dv_xname,
sc 803 dev/usb/if_atu.c sc->atu_mode));
sc 811 dev/usb/if_atu.c join.channel = ieee80211_chan2ieee(&sc->sc_ic, node->ni_chan);
sc 817 dev/usb/if_atu.c sc->atu_dev.dv_xname, ether_sprintf(join.bssid)));
sc 818 dev/usb/if_atu.c err = atu_send_command(sc, (u_int8_t *)&join, sizeof(join));
sc 821 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 824 dev/usb/if_atu.c err = atu_wait_completion(sc, CMD_JOIN, &status);
sc 827 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 832 dev/usb/if_atu.c sc->atu_dev.dv_xname, status));
sc 835 dev/usb/if_atu.c DPRINTFN(10, ("%s: joined BSS\n", sc->atu_dev.dv_xname));
sc 844 dev/usb/if_atu.c atu_get_dfu_state(struct atu_softc *sc)
sc 848 dev/usb/if_atu.c if (atu_usb_request(sc, DFU_GETSTATE, 0, 0, 1, &state))
sc 857 dev/usb/if_atu.c atu_get_opmode(struct atu_softc *sc, u_int8_t *mode)
sc 860 dev/usb/if_atu.c return atu_usb_request(sc, UT_READ_VENDOR_INTERFACE, 0x33, 0x0001,
sc 870 dev/usb/if_atu.c struct atu_softc *sc = arg;
sc 897 dev/usb/if_atu.c if (sc->atu_radio == atu_radfirm[i].atur_type)
sc 901 dev/usb/if_atu.c sc->atu_dev.dv_xname, name));
sc 905 dev/usb/if_atu.c sc->atu_dev.dv_xname, name, err);
sc 910 dev/usb/if_atu.c state = atu_get_dfu_state(sc);
sc 916 dev/usb/if_atu.c err = atu_usb_request(sc, DFU_GETSTATUS, 0, 0 , 6,
sc 920 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 936 dev/usb/if_atu.c sc->atu_dev.dv_xname, block));
sc 938 dev/usb/if_atu.c err = atu_usb_request(sc, DFU_DNLOAD, block++, 0,
sc 942 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 955 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 956 dev/usb/if_atu.c usbd_delay_ms(sc->atu_udev, 100);
sc 960 dev/usb/if_atu.c state = atu_get_dfu_state(sc);
sc 966 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 969 dev/usb/if_atu.c err = atu_usb_request(sc, DFU_GETSTATUS, 0, 0, 6, status);
sc 972 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 976 dev/usb/if_atu.c DPRINTFN(15, ("%s: sending remap\n", sc->atu_dev.dv_xname));
sc 977 dev/usb/if_atu.c err = atu_usb_request(sc, DFU_REMAP, 0, 0, 0, NULL);
sc 978 dev/usb/if_atu.c if ((err) && (!ISSET(sc->atu_quirk, ATU_QUIRK_NO_REMAP))) {
sc 979 dev/usb/if_atu.c DPRINTF(("%s: remap failed!\n", sc->atu_dev.dv_xname));
sc 988 dev/usb/if_atu.c usbd_delay_ms(sc->atu_udev, 56+100);
sc 991 dev/usb/if_atu.c sc->atu_dev.dv_xname);
sc 992 dev/usb/if_atu.c usb_needs_reattach(sc->atu_udev);
sc 998 dev/usb/if_atu.c struct atu_softc *sc = arg;
sc 1005 dev/usb/if_atu.c if (sc->atu_radio == atu_radfirm[i].atur_type)
sc 1009 dev/usb/if_atu.c sc->atu_dev.dv_xname, name));
sc 1013 dev/usb/if_atu.c sc->atu_dev.dv_xname, name, err);
sc 1025 dev/usb/if_atu.c sc->atu_dev.dv_xname, block, block_size));
sc 1026 dev/usb/if_atu.c err = atu_usb_request(sc, UT_WRITE_VENDOR_DEVICE, 0x0e,
sc 1030 dev/usb/if_atu.c "block\n", sc->atu_dev.dv_xname));
sc 1041 dev/usb/if_atu.c err = atu_usb_request(sc, UT_WRITE_VENDOR_DEVICE, 0x0e, 0x0802,
sc 1045 dev/usb/if_atu.c "block\n", sc->atu_dev.dv_xname));
sc 1054 dev/usb/if_atu.c if (sc->atu_quirk & ATU_QUIRK_FW_DELAY)
sc 1055 dev/usb/if_atu.c usbd_delay_ms(sc->atu_udev, 21 + 100);
sc 1058 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1060 dev/usb/if_atu.c atu_complete_attach(sc);
sc 1064 dev/usb/if_atu.c atu_get_card_config(struct atu_softc *sc)
sc 1066 dev/usb/if_atu.c struct ieee80211com *ic = &sc->sc_ic;
sc 1071 dev/usb/if_atu.c switch (sc->atu_radio) {
sc 1078 dev/usb/if_atu.c err = atu_usb_request(sc, UT_READ_VENDOR_INTERFACE, 0x33,
sc 1083 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1091 dev/usb/if_atu.c err = atu_usb_request(sc, UT_READ_VENDOR_INTERFACE, 0x33,
sc 1096 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1133 dev/usb/if_atu.c struct atu_softc *sc = ifp->if_softc;
sc 1137 dev/usb/if_atu.c DPRINTFN(10, ("%s: atu_media_change\n", sc->atu_dev.dv_xname));
sc 1154 dev/usb/if_atu.c struct atu_softc *sc = ifp->if_softc;
sc 1157 dev/usb/if_atu.c DPRINTFN(10, ("%s: atu_media_status\n", sc->atu_dev.dv_xname));
sc 1165 dev/usb/if_atu.c struct atu_softc *sc = (struct atu_softc *)arg;
sc 1166 dev/usb/if_atu.c struct ieee80211com *ic = &sc->sc_ic;
sc 1171 dev/usb/if_atu.c DPRINTFN(10, ("%s: atu_task\n", sc->atu_dev.dv_xname));
sc 1173 dev/usb/if_atu.c if (sc->sc_state != ATU_S_OK)
sc 1176 dev/usb/if_atu.c switch (sc->sc_cmd) {
sc 1179 dev/usb/if_atu.c err = atu_start_scan(sc);
sc 1182 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1186 dev/usb/if_atu.c err = atu_wait_completion(sc, CMD_START_SCAN, NULL);
sc 1189 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1194 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1202 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1206 dev/usb/if_atu.c atu_join(sc, ic->ic_bss);
sc 1214 dev/usb/if_atu.c struct atu_softc *sc = ifp->if_softc;
sc 1217 dev/usb/if_atu.c DPRINTFN(10, ("%s: atu_newstate: %s -> %s\n", sc->atu_dev.dv_xname,
sc 1227 dev/usb/if_atu.c sc->sc_cmd = ATU_C_SCAN;
sc 1228 dev/usb/if_atu.c usb_add_task(sc->atu_udev, &sc->sc_task);
sc 1237 dev/usb/if_atu.c sc->sc_cmd = ATU_C_JOIN;
sc 1238 dev/usb/if_atu.c usb_add_task(sc->atu_udev, &sc->sc_task);
sc 1246 dev/usb/if_atu.c return (*sc->sc_newstate)(ic, nstate, arg);
sc 1256 dev/usb/if_atu.c struct atu_softc *sc = (struct atu_softc *)self;
sc 1264 dev/usb/if_atu.c sc->sc_state = ATU_S_UNCONFIG;
sc 1267 dev/usb/if_atu.c printf("\n%s: %s", sc->atu_dev.dv_xname, devinfop);
sc 1273 dev/usb/if_atu.c sc->atu_dev.dv_xname);
sc 1277 dev/usb/if_atu.c err = usbd_device2interface_handle(dev, ATU_IFACE_IDX, &sc->atu_iface);
sc 1280 dev/usb/if_atu.c sc->atu_dev.dv_xname);
sc 1284 dev/usb/if_atu.c sc->atu_unit = self->dv_unit;
sc 1285 dev/usb/if_atu.c sc->atu_udev = dev;
sc 1296 dev/usb/if_atu.c sc->atu_radio = t->atu_radio;
sc 1297 dev/usb/if_atu.c sc->atu_quirk = t->atu_quirk;
sc 1311 dev/usb/if_atu.c err = atu_get_opmode(sc, &mode);
sc 1312 dev/usb/if_atu.c DPRINTFN(20, ("%s: opmode: %d\n", sc->atu_dev.dv_xname, mode));
sc 1315 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1320 dev/usb/if_atu.c mountroothook_establish(atu_internal_firmware, sc);
sc 1322 dev/usb/if_atu.c atu_internal_firmware(sc);
sc 1331 dev/usb/if_atu.c uaa->iface = sc->atu_iface;
sc 1335 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1339 dev/usb/if_atu.c sc->atu_dev.dv_xname, mode));
sc 1348 dev/usb/if_atu.c if (sc->atu_radio != RadioIntersil) {
sc 1349 dev/usb/if_atu.c err = atu_get_mib(sc, MIB_PHY__CHANNEL, &channel);
sc 1353 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1354 dev/usb/if_atu.c atu_complete_attach(sc);
sc 1360 dev/usb/if_atu.c mountroothook_establish(atu_external_firmware, sc);
sc 1362 dev/usb/if_atu.c atu_external_firmware(sc);
sc 1370 dev/usb/if_atu.c atu_complete_attach(sc);
sc 1375 dev/usb/if_atu.c atu_complete_attach(struct atu_softc *sc)
sc 1377 dev/usb/if_atu.c struct ieee80211com *ic = &sc->sc_ic;
sc 1387 dev/usb/if_atu.c id = usbd_get_interface_descriptor(sc->atu_iface);
sc 1391 dev/usb/if_atu.c ed = usbd_interface2endpoint_descriptor(sc->atu_iface, i);
sc 1393 dev/usb/if_atu.c DPRINTF(("%s: num_endp:%d\n", sc->atu_dev.dv_xname,
sc 1394 dev/usb/if_atu.c sc->atu_iface->idesc->bNumEndpoints));
sc 1396 dev/usb/if_atu.c sc->atu_dev.dv_xname, i));
sc 1401 dev/usb/if_atu.c sc->atu_ed[ATU_ENDPT_RX] = ed->bEndpointAddress;
sc 1404 dev/usb/if_atu.c sc->atu_ed[ATU_ENDPT_TX] = ed->bEndpointAddress;
sc 1409 dev/usb/if_atu.c err = atu_get_card_config(sc);
sc 1412 dev/usb/if_atu.c sc->atu_dev.dv_xname);
sc 1418 dev/usb/if_atu.c err = atu_get_mib(sc, MIB_FW_VERSION, sizeof(fw), 0,
sc 1422 dev/usb/if_atu.c "build:%d\n", sc->atu_dev.dv_xname, fw.major, fw.minor,
sc 1426 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1433 dev/usb/if_atu.c sc->atu_cdata.atu_tx_inuse = 0;
sc 1435 dev/usb/if_atu.c bzero(sc->atu_bssid, ETHER_ADDR_LEN);
sc 1436 dev/usb/if_atu.c sc->atu_channel = ATU_DEFAULT_CHANNEL;
sc 1437 dev/usb/if_atu.c sc->atu_desired_channel = IEEE80211_CHAN_ANY;
sc 1438 dev/usb/if_atu.c sc->atu_mode = INFRASTRUCTURE_MODE;
sc 1440 dev/usb/if_atu.c ic->ic_softc = sc;
sc 1445 dev/usb/if_atu.c ic->ic_max_rssi = atu_radfirm[sc->atu_radio].max_rssi;
sc 1458 dev/usb/if_atu.c ifp->if_softc = sc;
sc 1459 dev/usb/if_atu.c memcpy(ifp->if_xname, sc->atu_dev.dv_xname, IFNAMSIZ);
sc 1471 dev/usb/if_atu.c sc->sc_newstate = ic->ic_newstate;
sc 1477 dev/usb/if_atu.c usb_init_task(&sc->sc_task, atu_task, sc);
sc 1480 dev/usb/if_atu.c bpfattach(&sc->sc_radiobpf, &sc->sc_ic.ic_if, DLT_IEEE802_11_RADIO,
sc 1483 dev/usb/if_atu.c bzero(&sc->sc_rxtapu, sizeof(sc->sc_rxtapu));
sc 1484 dev/usb/if_atu.c sc->sc_rxtap.rr_ihdr.it_len = sizeof(sc->sc_rxtapu);
sc 1485 dev/usb/if_atu.c sc->sc_rxtap.rr_ihdr.it_present = htole32(ATU_RX_RADIOTAP_PRESENT);
sc 1487 dev/usb/if_atu.c bzero(&sc->sc_txtapu, sizeof(sc->sc_txtapu));
sc 1488 dev/usb/if_atu.c sc->sc_txtap.rt_ihdr.it_len = sizeof(sc->sc_txtapu);
sc 1489 dev/usb/if_atu.c sc->sc_txtap.rt_ihdr.it_present = htole32(ATU_TX_RADIOTAP_PRESENT);
sc 1492 dev/usb/if_atu.c sc->sc_state = ATU_S_OK;
sc 1498 dev/usb/if_atu.c struct atu_softc *sc = (struct atu_softc *)self;
sc 1499 dev/usb/if_atu.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1501 dev/usb/if_atu.c DPRINTFN(10, ("%s: atu_detach state=%d\n", sc->atu_dev.dv_xname,
sc 1502 dev/usb/if_atu.c sc->sc_state));
sc 1504 dev/usb/if_atu.c if (sc->sc_state != ATU_S_UNCONFIG) {
sc 1509 dev/usb/if_atu.c if (sc->atu_ep[ATU_ENDPT_TX] != NULL)
sc 1510 dev/usb/if_atu.c usbd_abort_pipe(sc->atu_ep[ATU_ENDPT_TX]);
sc 1511 dev/usb/if_atu.c if (sc->atu_ep[ATU_ENDPT_RX] != NULL)
sc 1512 dev/usb/if_atu.c usbd_abort_pipe(sc->atu_ep[ATU_ENDPT_RX]);
sc 1514 dev/usb/if_atu.c usb_rem_task(sc->atu_udev, &sc->sc_task);
sc 1523 dev/usb/if_atu.c struct atu_softc *sc = (struct atu_softc *)self;
sc 1529 dev/usb/if_atu.c if (sc->sc_state != ATU_S_UNCONFIG)
sc 1530 dev/usb/if_atu.c sc->sc_state = ATU_S_DEAD;
sc 1540 dev/usb/if_atu.c atu_newbuf(struct atu_softc *sc, struct atu_chain *c, struct mbuf *m)
sc 1548 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1555 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1570 dev/usb/if_atu.c atu_rx_list_init(struct atu_softc *sc)
sc 1572 dev/usb/if_atu.c struct atu_cdata *cd = &sc->atu_cdata;
sc 1577 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1581 dev/usb/if_atu.c c->atu_sc = sc;
sc 1584 dev/usb/if_atu.c c->atu_xfer = usbd_alloc_xfer(sc->atu_udev);
sc 1591 dev/usb/if_atu.c if (atu_newbuf(sc, c, NULL) == ENOBUFS) /* XXX free? */
sc 1599 dev/usb/if_atu.c atu_tx_list_init(struct atu_softc *sc)
sc 1601 dev/usb/if_atu.c struct atu_cdata *cd = &sc->atu_cdata;
sc 1606 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1609 dev/usb/if_atu.c sc->atu_cdata.atu_tx_inuse = 0;
sc 1613 dev/usb/if_atu.c c->atu_sc = sc;
sc 1616 dev/usb/if_atu.c c->atu_xfer = usbd_alloc_xfer(sc->atu_udev);
sc 1631 dev/usb/if_atu.c atu_xfer_list_free(struct atu_softc *sc, struct atu_chain *ch,
sc 1659 dev/usb/if_atu.c struct atu_softc *sc = c->atu_sc;
sc 1660 dev/usb/if_atu.c struct ieee80211com *ic = &sc->sc_ic;
sc 1669 dev/usb/if_atu.c DPRINTFN(25, ("%s: atu_rxeof\n", sc->atu_dev.dv_xname));
sc 1671 dev/usb/if_atu.c if (sc->sc_state != ATU_S_OK)
sc 1679 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1686 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1702 dev/usb/if_atu.c if (usbd_ratecheck(&sc->atu_rx_notice)) {
sc 1704 dev/usb/if_atu.c sc->atu_dev.dv_xname, usbd_errstr(status)));
sc 1708 dev/usb/if_atu.c sc->atu_ep[ATU_ENDPT_RX]);
sc 1716 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1735 dev/usb/if_atu.c if (atu_newbuf(sc, c, NULL) == ENOBUFS) {
sc 1741 dev/usb/if_atu.c if (sc->sc_radiobpf != NULL) {
sc 1743 dev/usb/if_atu.c struct atu_rx_radiotap_header *rr = &sc->sc_rxtap;
sc 1754 dev/usb/if_atu.c mb.m_len = sizeof(sc->sc_txtapu);
sc 1759 dev/usb/if_atu.c bpf_mtap(sc->sc_radiobpf, &mb, BPF_DIRECTION_IN);
sc 1778 dev/usb/if_atu.c usbd_setup_xfer(c->atu_xfer, sc->atu_ep[ATU_ENDPT_RX], c, c->atu_buf,
sc 1792 dev/usb/if_atu.c struct atu_softc *sc = c->atu_sc;
sc 1793 dev/usb/if_atu.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1797 dev/usb/if_atu.c DPRINTFN(25, ("%s: atu_txeof status=%d\n", sc->atu_dev.dv_xname,
sc 1809 dev/usb/if_atu.c DPRINTF(("%s: usb error on tx: %s\n", sc->atu_dev.dv_xname,
sc 1812 dev/usb/if_atu.c usbd_clear_endpoint_stall_async(sc->atu_ep[ATU_ENDPT_TX]);
sc 1824 dev/usb/if_atu.c SLIST_INSERT_HEAD(&sc->atu_cdata.atu_tx_free, c, atu_list);
sc 1825 dev/usb/if_atu.c sc->atu_cdata.atu_tx_inuse--;
sc 1826 dev/usb/if_atu.c if (sc->atu_cdata.atu_tx_inuse == 0)
sc 1847 dev/usb/if_atu.c atu_tx_start(struct atu_softc *sc, struct ieee80211_node *ni,
sc 1855 dev/usb/if_atu.c struct ieee80211com *ic = &sc->sc_ic;
sc 1858 dev/usb/if_atu.c DPRINTFN(25, ("%s: atu_tx_start\n", sc->atu_dev.dv_xname));
sc 1861 dev/usb/if_atu.c if (sc->sc_state != ATU_S_OK) {
sc 1867 dev/usb/if_atu.c if (sc->sc_radiobpf != NULL) {
sc 1869 dev/usb/if_atu.c struct atu_tx_radiotap_header *rt = &sc->sc_txtap;
sc 1878 dev/usb/if_atu.c mb.m_len = sizeof(sc->sc_txtapu);
sc 1883 dev/usb/if_atu.c bpf_mtap(sc->sc_radiobpf, &mb, BPF_DIRECTION_OUT);
sc 1908 dev/usb/if_atu.c usbd_setup_xfer(c->atu_xfer, sc->atu_ep[ATU_ENDPT_TX],
sc 1917 dev/usb/if_atu.c sc->atu_dev.dv_xname, err));
sc 1929 dev/usb/if_atu.c struct atu_softc *sc = ifp->if_softc;
sc 1930 dev/usb/if_atu.c struct ieee80211com *ic = &sc->sc_ic;
sc 1931 dev/usb/if_atu.c struct atu_cdata *cd = &sc->atu_cdata;
sc 1938 dev/usb/if_atu.c DPRINTFN(25, ("%s: atu_start: enter\n", sc->atu_dev.dv_xname));
sc 1942 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1948 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1965 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1977 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1980 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 1993 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 2018 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 2036 dev/usb/if_atu.c if (atu_tx_start(sc, ni, c, m)) {
sc 2055 dev/usb/if_atu.c struct atu_softc *sc = ifp->if_softc;
sc 2056 dev/usb/if_atu.c struct ieee80211com *ic = &sc->sc_ic;
sc 2063 dev/usb/if_atu.c DPRINTFN(10, ("%s: atu_init\n", sc->atu_dev.dv_xname));
sc 2071 dev/usb/if_atu.c if (atu_tx_list_init(sc))
sc 2072 dev/usb/if_atu.c printf("%s: tx list init failed\n", sc->atu_dev.dv_xname);
sc 2075 dev/usb/if_atu.c if (atu_rx_list_init(sc))
sc 2076 dev/usb/if_atu.c printf("%s: rx list init failed\n", sc->atu_dev.dv_xname);
sc 2082 dev/usb/if_atu.c err = usbd_open_pipe(sc->atu_iface, sc->atu_ed[ATU_ENDPT_RX],
sc 2083 dev/usb/if_atu.c USBD_EXCLUSIVE_USE, &sc->atu_ep[ATU_ENDPT_RX]);
sc 2086 dev/usb/if_atu.c sc->atu_dev.dv_xname, usbd_errstr(err)));
sc 2091 dev/usb/if_atu.c err = usbd_open_pipe(sc->atu_iface, sc->atu_ed[ATU_ENDPT_TX],
sc 2092 dev/usb/if_atu.c USBD_EXCLUSIVE_USE, &sc->atu_ep[ATU_ENDPT_TX]);
sc 2095 dev/usb/if_atu.c sc->atu_dev.dv_xname, usbd_errstr(err)));
sc 2102 dev/usb/if_atu.c c = &sc->atu_cdata.atu_rx_chain[i];
sc 2104 dev/usb/if_atu.c usbd_setup_xfer(c->atu_xfer, sc->atu_ep[ATU_ENDPT_RX], c,
sc 2111 dev/usb/if_atu.c sc->atu_dev.dv_xname, ether_sprintf(ic->ic_myaddr)));
sc 2114 dev/usb/if_atu.c err = atu_initial_config(sc);
sc 2117 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 2122 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 2141 dev/usb/if_atu.c "ieee80211_net_state", sc->atu_dev.dv_xname));
sc 2150 dev/usb/if_atu.c struct atu_softc *sc = ifp->if_softc;
sc 2157 dev/usb/if_atu.c DPRINTFN(15, ("%s: SIOCSIFADDR\n", sc->atu_dev.dv_xname));
sc 2166 dev/usb/if_atu.c arp_ifinit(&sc->sc_ic.ic_ac, ifa);
sc 2173 dev/usb/if_atu.c DPRINTFN(15, ("%s: SIOCSIFFLAGS\n", sc->atu_dev.dv_xname));
sc 2178 dev/usb/if_atu.c !(sc->atu_if_flags & IFF_PROMISC)) {
sc 2181 dev/usb/if_atu.c sc->atu_rxfilt |= ATU_RXFILT_PROMISC;
sc 2182 dev/usb/if_atu.c atu_setword(sc, ATU_CMD_SET_PKT_FILTER,
sc 2183 dev/usb/if_atu.c sc->atu_rxfilt);
sc 2187 dev/usb/if_atu.c sc->atu_if_flags & IFF_PROMISC) {
sc 2190 dev/usb/if_atu.c sc->atu_rxfilt &= ~ATU_RXFILT_PROMISC;
sc 2191 dev/usb/if_atu.c atu_setword(sc, ATU_CMD_SET_PKT_FILTER,
sc 2192 dev/usb/if_atu.c sc->atu_rxfilt);
sc 2198 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 2200 dev/usb/if_atu.c err = atu_switch_radio(sc, 1);
sc 2204 dev/usb/if_atu.c err = atu_switch_radio(sc, 0);
sc 2206 dev/usb/if_atu.c sc->atu_if_flags = ifp->if_flags;
sc 2211 dev/usb/if_atu.c DPRINTFN(15, ("%s: SIOCADDMULTI\n", sc->atu_dev.dv_xname));
sc 2217 dev/usb/if_atu.c DPRINTFN(15, ("%s: SIOCDELMULTI\n", sc->atu_dev.dv_xname));
sc 2224 dev/usb/if_atu.c sc->atu_dev.dv_xname, command));
sc 2233 dev/usb/if_atu.c sc->atu_dev.dv_xname));
sc 2246 dev/usb/if_atu.c struct atu_softc *sc = ifp->if_softc;
sc 2251 dev/usb/if_atu.c DPRINTF(("%s: atu_watchdog\n", sc->atu_dev.dv_xname));
sc 2258 dev/usb/if_atu.c if (sc->sc_state != ATU_S_OK)
sc 2261 dev/usb/if_atu.c sc = ifp->if_softc;
sc 2264 dev/usb/if_atu.c DPRINTF(("%s: watchdog timeout\n", sc->atu_dev.dv_xname));
sc 2271 dev/usb/if_atu.c c = &sc->atu_cdata.atu_tx_chain[cnt];
sc 2293 dev/usb/if_atu.c struct atu_softc *sc = ifp->if_softc;
sc 2303 dev/usb/if_atu.c if (sc->atu_ep[ATU_ENDPT_RX] != NULL) {
sc 2304 dev/usb/if_atu.c err = usbd_abort_pipe(sc->atu_ep[ATU_ENDPT_RX]);
sc 2307 dev/usb/if_atu.c sc->atu_dev.dv_xname, usbd_errstr(err)));
sc 2309 dev/usb/if_atu.c err = usbd_close_pipe(sc->atu_ep[ATU_ENDPT_RX]);
sc 2312 dev/usb/if_atu.c sc->atu_dev.dv_xname, usbd_errstr(err)));
sc 2314 dev/usb/if_atu.c sc->atu_ep[ATU_ENDPT_RX] = NULL;
sc 2317 dev/usb/if_atu.c if (sc->atu_ep[ATU_ENDPT_TX] != NULL) {
sc 2318 dev/usb/if_atu.c err = usbd_abort_pipe(sc->atu_ep[ATU_ENDPT_TX]);
sc 2321 dev/usb/if_atu.c sc->atu_dev.dv_xname, usbd_errstr(err)));
sc 2323 dev/usb/if_atu.c err = usbd_close_pipe(sc->atu_ep[ATU_ENDPT_TX]);
sc 2326 dev/usb/if_atu.c sc->atu_dev.dv_xname, usbd_errstr(err)));
sc 2328 dev/usb/if_atu.c sc->atu_ep[ATU_ENDPT_TX] = NULL;
sc 2332 dev/usb/if_atu.c cd = &sc->atu_cdata;
sc 2333 dev/usb/if_atu.c atu_xfer_list_free(sc, cd->atu_rx_chain, ATU_RX_LIST_CNT);
sc 2334 dev/usb/if_atu.c atu_xfer_list_free(sc, cd->atu_tx_chain, ATU_TX_LIST_CNT);
sc 2337 dev/usb/if_atu.c atu_switch_radio(sc, 0);
sc 230 dev/usb/if_aue.c void aue_reset_pegasus_II(struct aue_softc *sc);
sc 268 dev/usb/if_aue.c #define AUE_SETBIT(sc, reg, x) \
sc 269 dev/usb/if_aue.c aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) | (x))
sc 271 dev/usb/if_aue.c #define AUE_CLRBIT(sc, reg, x) \
sc 272 dev/usb/if_aue.c aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) & ~(x))
sc 275 dev/usb/if_aue.c aue_csr_read_1(struct aue_softc *sc, int reg)
sc 281 dev/usb/if_aue.c if (sc->aue_dying)
sc 290 dev/usb/if_aue.c err = usbd_do_request(sc->aue_udev, &req, &val);
sc 294 dev/usb/if_aue.c sc->aue_dev.dv_xname, reg, usbd_errstr(err)));
sc 302 dev/usb/if_aue.c aue_csr_read_2(struct aue_softc *sc, int reg)
sc 308 dev/usb/if_aue.c if (sc->aue_dying)
sc 317 dev/usb/if_aue.c err = usbd_do_request(sc->aue_udev, &req, &val);
sc 321 dev/usb/if_aue.c sc->aue_dev.dv_xname, reg, usbd_errstr(err)));
sc 329 dev/usb/if_aue.c aue_csr_write_1(struct aue_softc *sc, int reg, int aval)
sc 335 dev/usb/if_aue.c if (sc->aue_dying)
sc 345 dev/usb/if_aue.c err = usbd_do_request(sc->aue_udev, &req, &val);
sc 349 dev/usb/if_aue.c sc->aue_dev.dv_xname, reg, usbd_errstr(err)));
sc 357 dev/usb/if_aue.c aue_csr_write_2(struct aue_softc *sc, int reg, int aval)
sc 363 dev/usb/if_aue.c if (sc->aue_dying)
sc 373 dev/usb/if_aue.c err = usbd_do_request(sc->aue_udev, &req, &val);
sc 377 dev/usb/if_aue.c sc->aue_dev.dv_xname, reg, usbd_errstr(err)));
sc 388 dev/usb/if_aue.c aue_eeprom_getword(struct aue_softc *sc, int addr)
sc 392 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_EE_REG, addr);
sc 393 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_EE_CTL, AUE_EECTL_READ);
sc 396 dev/usb/if_aue.c if (aue_csr_read_1(sc, AUE_EE_CTL) & AUE_EECTL_DONE)
sc 402 dev/usb/if_aue.c sc->aue_dev.dv_xname);
sc 405 dev/usb/if_aue.c return (aue_csr_read_2(sc, AUE_EE_DATA));
sc 412 dev/usb/if_aue.c aue_read_mac(struct aue_softc *sc, u_char *dest)
sc 418 dev/usb/if_aue.c DPRINTFN(5,("%s: %s: enter\n", sc->aue_dev.dv_xname, __func__));
sc 421 dev/usb/if_aue.c word = aue_eeprom_getword(sc, off + i);
sc 429 dev/usb/if_aue.c aue_lock_mii(struct aue_softc *sc)
sc 431 dev/usb/if_aue.c sc->aue_refcnt++;
sc 432 dev/usb/if_aue.c rw_enter_write(&sc->aue_mii_lock);
sc 436 dev/usb/if_aue.c aue_unlock_mii(struct aue_softc *sc)
sc 438 dev/usb/if_aue.c rw_exit_write(&sc->aue_mii_lock);
sc 439 dev/usb/if_aue.c if (--sc->aue_refcnt < 0)
sc 440 dev/usb/if_aue.c usb_detach_wakeup(&sc->aue_dev);
sc 446 dev/usb/if_aue.c struct aue_softc *sc = (void *)dev;
sc 450 dev/usb/if_aue.c if (sc->aue_dying) {
sc 452 dev/usb/if_aue.c printf("%s: dying\n", sc->aue_dev.dv_xname);
sc 468 dev/usb/if_aue.c if (sc->aue_vendor == USB_VENDOR_ADMTEK &&
sc 469 dev/usb/if_aue.c sc->aue_product == USB_PRODUCT_ADMTEK_PEGASUS) {
sc 475 dev/usb/if_aue.c aue_lock_mii(sc);
sc 476 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
sc 477 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_READ);
sc 480 dev/usb/if_aue.c if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE)
sc 485 dev/usb/if_aue.c printf("%s: MII read timed out\n", sc->aue_dev.dv_xname);
sc 488 dev/usb/if_aue.c val = aue_csr_read_2(sc, AUE_PHY_DATA);
sc 491 dev/usb/if_aue.c sc->aue_dev.dv_xname, __func__, phy, reg, val));
sc 493 dev/usb/if_aue.c aue_unlock_mii(sc);
sc 500 dev/usb/if_aue.c struct aue_softc *sc = (void *)dev;
sc 504 dev/usb/if_aue.c if (sc->aue_vendor == USB_VENDOR_ADMTEK &&
sc 505 dev/usb/if_aue.c sc->aue_product == USB_PRODUCT_ADMTEK_PEGASUS) {
sc 512 dev/usb/if_aue.c sc->aue_dev.dv_xname, __func__, phy, reg, data));
sc 514 dev/usb/if_aue.c aue_lock_mii(sc);
sc 515 dev/usb/if_aue.c aue_csr_write_2(sc, AUE_PHY_DATA, data);
sc 516 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
sc 517 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_WRITE);
sc 520 dev/usb/if_aue.c if (aue_csr_read_1(sc, AUE_PHY_CTL) & AUE_PHYCTL_DONE)
sc 526 dev/usb/if_aue.c sc->aue_dev.dv_xname);
sc 528 dev/usb/if_aue.c aue_unlock_mii(sc);
sc 534 dev/usb/if_aue.c struct aue_softc *sc = (void *)dev;
sc 535 dev/usb/if_aue.c struct mii_data *mii = GET_MII(sc);
sc 537 dev/usb/if_aue.c DPRINTFN(5,("%s: %s: enter\n", sc->aue_dev.dv_xname, __func__));
sc 539 dev/usb/if_aue.c aue_lock_mii(sc);
sc 540 dev/usb/if_aue.c AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB);
sc 543 dev/usb/if_aue.c AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL);
sc 545 dev/usb/if_aue.c AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_SPEEDSEL);
sc 549 dev/usb/if_aue.c AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX);
sc 551 dev/usb/if_aue.c AUE_CLRBIT(sc, AUE_CTL1, AUE_CTL1_DUPLEX);
sc 553 dev/usb/if_aue.c AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_RX_ENB | AUE_CTL0_TX_ENB);
sc 554 dev/usb/if_aue.c aue_unlock_mii(sc);
sc 561 dev/usb/if_aue.c if (!sc->aue_dying && (sc->aue_flags & LSYS)) {
sc 566 dev/usb/if_aue.c DPRINTFN(5,("%s: %s: exit\n", sc->aue_dev.dv_xname, __func__));
sc 589 dev/usb/if_aue.c aue_setmulti(struct aue_softc *sc)
sc 596 dev/usb/if_aue.c DPRINTFN(5,("%s: %s: enter\n", sc->aue_dev.dv_xname, __func__));
sc 598 dev/usb/if_aue.c ifp = GET_IFP(sc);
sc 603 dev/usb/if_aue.c AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI);
sc 607 dev/usb/if_aue.c AUE_CLRBIT(sc, AUE_CTL0, AUE_CTL0_ALLMULTI);
sc 611 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_MAR0 + i, 0);
sc 614 dev/usb/if_aue.c ETHER_FIRST_MULTI(step, &sc->arpcom, enm);
sc 621 dev/usb/if_aue.c AUE_SETBIT(sc, AUE_MAR + (h >> 3), 1 << (h & 0x7));
sc 629 dev/usb/if_aue.c aue_reset_pegasus_II(struct aue_softc *sc)
sc 632 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_REG_1D, 0);
sc 633 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_REG_7B, 2);
sc 635 dev/usb/if_aue.c if ((sc->aue_flags & HAS_HOME_PNA) && mii_mode)
sc 636 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_REG_81, 6);
sc 639 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_REG_81, 2);
sc 643 dev/usb/if_aue.c aue_reset(struct aue_softc *sc)
sc 647 dev/usb/if_aue.c DPRINTFN(2,("%s: %s: enter\n", sc->aue_dev.dv_xname, __func__));
sc 649 dev/usb/if_aue.c AUE_SETBIT(sc, AUE_CTL1, AUE_CTL1_RESETMAC);
sc 652 dev/usb/if_aue.c if (!(aue_csr_read_1(sc, AUE_CTL1) & AUE_CTL1_RESETMAC))
sc 657 dev/usb/if_aue.c printf("%s: reset failed\n", sc->aue_dev.dv_xname);
sc 661 dev/usb/if_aue.c if (sc->aue_mii_mode && (sc->aue_flags & PNA))
sc 662 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_GPIO1, 0x34);
sc 664 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_GPIO1, 0x26);
sc 676 dev/usb/if_aue.c if (sc->aue_flags & LSYS) {
sc 678 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_GPIO0,
sc 681 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_GPIO0,
sc 684 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_GPIO0,
sc 687 dev/usb/if_aue.c if (sc->aue_flags & PII)
sc 688 dev/usb/if_aue.c aue_reset_pegasus_II(sc);
sc 716 dev/usb/if_aue.c struct aue_softc *sc = (struct aue_softc *)self;
sc 730 dev/usb/if_aue.c DPRINTFN(5,(" : aue_attach: sc=%p", sc));
sc 733 dev/usb/if_aue.c printf("\n%s: %s\n", sc->aue_dev.dv_xname, devinfop);
sc 739 dev/usb/if_aue.c sc->aue_dev.dv_xname);
sc 743 dev/usb/if_aue.c usb_init_task(&sc->aue_tick_task, aue_tick_task, sc);
sc 744 dev/usb/if_aue.c usb_init_task(&sc->aue_stop_task, (void (*)(void *))aue_stop, sc);
sc 745 dev/usb/if_aue.c rw_init(&sc->aue_mii_lock, "auemii");
sc 750 dev/usb/if_aue.c sc->aue_dev.dv_xname);
sc 754 dev/usb/if_aue.c sc->aue_flags = aue_lookup(uaa->vendor, uaa->product)->aue_flags;
sc 756 dev/usb/if_aue.c sc->aue_udev = dev;
sc 757 dev/usb/if_aue.c sc->aue_iface = iface;
sc 758 dev/usb/if_aue.c sc->aue_product = uaa->product;
sc 759 dev/usb/if_aue.c sc->aue_vendor = uaa->vendor;
sc 768 dev/usb/if_aue.c sc->aue_dev.dv_xname, i);
sc 773 dev/usb/if_aue.c sc->aue_ed[AUE_ENDPT_RX] = ed->bEndpointAddress;
sc 776 dev/usb/if_aue.c sc->aue_ed[AUE_ENDPT_TX] = ed->bEndpointAddress;
sc 779 dev/usb/if_aue.c sc->aue_ed[AUE_ENDPT_INTR] = ed->bEndpointAddress;
sc 783 dev/usb/if_aue.c if (sc->aue_ed[AUE_ENDPT_RX] == 0 || sc->aue_ed[AUE_ENDPT_TX] == 0 ||
sc 784 dev/usb/if_aue.c sc->aue_ed[AUE_ENDPT_INTR] == 0) {
sc 785 dev/usb/if_aue.c printf("%s: missing endpoint\n", sc->aue_dev.dv_xname);
sc 793 dev/usb/if_aue.c aue_reset(sc);
sc 798 dev/usb/if_aue.c aue_read_mac(sc, eaddr);
sc 803 dev/usb/if_aue.c ifp = GET_IFP(sc);
sc 804 dev/usb/if_aue.c printf("%s: address %s\n", sc->aue_dev.dv_xname,
sc 807 dev/usb/if_aue.c bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 810 dev/usb/if_aue.c ifp->if_softc = sc;
sc 815 dev/usb/if_aue.c strlcpy(ifp->if_xname, sc->aue_dev.dv_xname, IFNAMSIZ);
sc 820 dev/usb/if_aue.c mii = &sc->aue_mii;
sc 838 dev/usb/if_aue.c timeout_set(&sc->aue_stat_ch, NULL, NULL);
sc 840 dev/usb/if_aue.c sc->aue_attached = 1;
sc 841 dev/usb/if_aue.c sc->sc_sdhook = shutdownhook_establish(aue_shutdown, sc);
sc 844 dev/usb/if_aue.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->aue_udev,
sc 845 dev/usb/if_aue.c &sc->aue_dev);
sc 851 dev/usb/if_aue.c struct aue_softc *sc = (struct aue_softc *)self;
sc 852 dev/usb/if_aue.c struct ifnet *ifp = GET_IFP(sc);
sc 855 dev/usb/if_aue.c DPRINTFN(2,("%s: %s: enter\n", sc->aue_dev.dv_xname, __func__));
sc 857 dev/usb/if_aue.c if (!sc->aue_attached) {
sc 862 dev/usb/if_aue.c timeout_del(&sc->aue_stat_ch);
sc 867 dev/usb/if_aue.c usb_rem_task(sc->aue_udev, &sc->aue_tick_task);
sc 868 dev/usb/if_aue.c usb_rem_task(sc->aue_udev, &sc->aue_stop_task);
sc 873 dev/usb/if_aue.c aue_stop(sc);
sc 875 dev/usb/if_aue.c mii_detach(&sc->aue_mii, MII_PHY_ANY, MII_OFFSET_ANY);
sc 876 dev/usb/if_aue.c ifmedia_delete_instance(&sc->aue_mii.mii_media, IFM_INST_ANY);
sc 881 dev/usb/if_aue.c if (sc->aue_ep[AUE_ENDPT_TX] != NULL ||
sc 882 dev/usb/if_aue.c sc->aue_ep[AUE_ENDPT_RX] != NULL ||
sc 883 dev/usb/if_aue.c sc->aue_ep[AUE_ENDPT_INTR] != NULL)
sc 885 dev/usb/if_aue.c sc->aue_dev.dv_xname);
sc 888 dev/usb/if_aue.c sc->aue_attached = 0;
sc 889 dev/usb/if_aue.c if (sc->sc_sdhook != NULL)
sc 890 dev/usb/if_aue.c shutdownhook_disestablish(sc->sc_sdhook);
sc 892 dev/usb/if_aue.c if (--sc->aue_refcnt >= 0) {
sc 894 dev/usb/if_aue.c usb_detach_wait(&sc->aue_dev);
sc 898 dev/usb/if_aue.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->aue_udev,
sc 899 dev/usb/if_aue.c &sc->aue_dev);
sc 907 dev/usb/if_aue.c struct aue_softc *sc = (struct aue_softc *)self;
sc 909 dev/usb/if_aue.c DPRINTFN(2,("%s: %s: enter\n", sc->aue_dev.dv_xname, __func__));
sc 916 dev/usb/if_aue.c sc->aue_dying = 1;
sc 926 dev/usb/if_aue.c aue_newbuf(struct aue_softc *sc, struct aue_chain *c, struct mbuf *m)
sc 930 dev/usb/if_aue.c DPRINTFN(10,("%s: %s: enter\n", sc->aue_dev.dv_xname,__func__));
sc 936 dev/usb/if_aue.c "-- packet dropped!\n", sc->aue_dev.dv_xname);
sc 943 dev/usb/if_aue.c "-- packet dropped!\n", sc->aue_dev.dv_xname);
sc 961 dev/usb/if_aue.c aue_rx_list_init(struct aue_softc *sc)
sc 967 dev/usb/if_aue.c DPRINTFN(5,("%s: %s: enter\n", sc->aue_dev.dv_xname, __func__));
sc 969 dev/usb/if_aue.c cd = &sc->aue_cdata;
sc 972 dev/usb/if_aue.c c->aue_sc = sc;
sc 974 dev/usb/if_aue.c if (aue_newbuf(sc, c, NULL) == ENOBUFS)
sc 977 dev/usb/if_aue.c c->aue_xfer = usbd_alloc_xfer(sc->aue_udev);
sc 990 dev/usb/if_aue.c aue_tx_list_init(struct aue_softc *sc)
sc 996 dev/usb/if_aue.c DPRINTFN(5,("%s: %s: enter\n", sc->aue_dev.dv_xname, __func__));
sc 998 dev/usb/if_aue.c cd = &sc->aue_cdata;
sc 1001 dev/usb/if_aue.c c->aue_sc = sc;
sc 1005 dev/usb/if_aue.c c->aue_xfer = usbd_alloc_xfer(sc->aue_udev);
sc 1020 dev/usb/if_aue.c struct aue_softc *sc = priv;
sc 1021 dev/usb/if_aue.c struct ifnet *ifp = GET_IFP(sc);
sc 1022 dev/usb/if_aue.c struct aue_intrpkt *p = &sc->aue_cdata.aue_ibuf;
sc 1024 dev/usb/if_aue.c DPRINTFN(15,("%s: %s: enter\n", sc->aue_dev.dv_xname,__func__));
sc 1026 dev/usb/if_aue.c if (sc->aue_dying)
sc 1036 dev/usb/if_aue.c sc->aue_intr_errs++;
sc 1037 dev/usb/if_aue.c if (usbd_ratecheck(&sc->aue_rx_notice)) {
sc 1039 dev/usb/if_aue.c sc->aue_dev.dv_xname, sc->aue_intr_errs,
sc 1041 dev/usb/if_aue.c sc->aue_intr_errs = 0;
sc 1044 dev/usb/if_aue.c usbd_clear_endpoint_stall_async(sc->aue_ep[AUE_ENDPT_RX]);
sc 1063 dev/usb/if_aue.c struct aue_softc *sc = c->aue_sc;
sc 1064 dev/usb/if_aue.c struct ifnet *ifp = GET_IFP(sc);
sc 1070 dev/usb/if_aue.c DPRINTFN(10,("%s: %s: enter\n", sc->aue_dev.dv_xname,__func__));
sc 1072 dev/usb/if_aue.c if (sc->aue_dying)
sc 1081 dev/usb/if_aue.c sc->aue_rx_errs++;
sc 1082 dev/usb/if_aue.c if (usbd_ratecheck(&sc->aue_rx_notice)) {
sc 1084 dev/usb/if_aue.c sc->aue_dev.dv_xname, sc->aue_rx_errs,
sc 1086 dev/usb/if_aue.c sc->aue_rx_errs = 0;
sc 1089 dev/usb/if_aue.c usbd_clear_endpoint_stall_async(sc->aue_ep[AUE_ENDPT_RX]);
sc 1122 dev/usb/if_aue.c if (aue_newbuf(sc, c, NULL) == ENOBUFS) {
sc 1138 dev/usb/if_aue.c DPRINTFN(10,("%s: %s: deliver %d\n", sc->aue_dev.dv_xname,
sc 1147 dev/usb/if_aue.c usbd_setup_xfer(xfer, sc->aue_ep[AUE_ENDPT_RX],
sc 1153 dev/usb/if_aue.c DPRINTFN(10,("%s: %s: start rx\n", sc->aue_dev.dv_xname,
sc 1166 dev/usb/if_aue.c struct aue_softc *sc = c->aue_sc;
sc 1167 dev/usb/if_aue.c struct ifnet *ifp = GET_IFP(sc);
sc 1170 dev/usb/if_aue.c if (sc->aue_dying)
sc 1175 dev/usb/if_aue.c DPRINTFN(10,("%s: %s: enter status=%d\n", sc->aue_dev.dv_xname,
sc 1187 dev/usb/if_aue.c printf("%s: usb error on tx: %s\n", sc->aue_dev.dv_xname,
sc 1190 dev/usb/if_aue.c usbd_clear_endpoint_stall_async(sc->aue_ep[AUE_ENDPT_TX]);
sc 1209 dev/usb/if_aue.c struct aue_softc *sc = xsc;
sc 1211 dev/usb/if_aue.c DPRINTFN(15,("%s: %s: enter\n", sc->aue_dev.dv_xname,__func__));
sc 1213 dev/usb/if_aue.c if (sc == NULL)
sc 1216 dev/usb/if_aue.c if (sc->aue_dying)
sc 1220 dev/usb/if_aue.c usb_add_task(sc->aue_udev, &sc->aue_tick_task);
sc 1226 dev/usb/if_aue.c struct aue_softc *sc = xsc;
sc 1231 dev/usb/if_aue.c DPRINTFN(15,("%s: %s: enter\n", sc->aue_dev.dv_xname,__func__));
sc 1233 dev/usb/if_aue.c if (sc->aue_dying)
sc 1236 dev/usb/if_aue.c ifp = GET_IFP(sc);
sc 1237 dev/usb/if_aue.c mii = GET_MII(sc);
sc 1244 dev/usb/if_aue.c if (!sc->aue_link && mii->mii_media_status & IFM_ACTIVE &&
sc 1247 dev/usb/if_aue.c sc->aue_dev.dv_xname,__func__));
sc 1248 dev/usb/if_aue.c sc->aue_link++;
sc 1253 dev/usb/if_aue.c timeout_del(&sc->aue_stat_ch);
sc 1254 dev/usb/if_aue.c timeout_set(&sc->aue_stat_ch, aue_tick, sc);
sc 1255 dev/usb/if_aue.c timeout_add(&sc->aue_stat_ch, hz);
sc 1261 dev/usb/if_aue.c aue_send(struct aue_softc *sc, struct mbuf *m, int idx)
sc 1267 dev/usb/if_aue.c DPRINTFN(10,("%s: %s: enter\n", sc->aue_dev.dv_xname,__func__));
sc 1269 dev/usb/if_aue.c c = &sc->aue_cdata.aue_tx_chain[idx];
sc 1288 dev/usb/if_aue.c usbd_setup_xfer(c->aue_xfer, sc->aue_ep[AUE_ENDPT_TX],
sc 1295 dev/usb/if_aue.c printf("%s: aue_send error=%s\n", sc->aue_dev.dv_xname,
sc 1298 dev/usb/if_aue.c usb_add_task(sc->aue_udev, &sc->aue_stop_task);
sc 1301 dev/usb/if_aue.c DPRINTFN(5,("%s: %s: send %d bytes\n", sc->aue_dev.dv_xname,
sc 1304 dev/usb/if_aue.c sc->aue_cdata.aue_tx_cnt++;
sc 1312 dev/usb/if_aue.c struct aue_softc *sc = ifp->if_softc;
sc 1315 dev/usb/if_aue.c DPRINTFN(5,("%s: %s: enter, link=%d\n", sc->aue_dev.dv_xname,
sc 1316 dev/usb/if_aue.c __func__, sc->aue_link));
sc 1318 dev/usb/if_aue.c if (sc->aue_dying)
sc 1321 dev/usb/if_aue.c if (!sc->aue_link)
sc 1331 dev/usb/if_aue.c if (aue_send(sc, m_head, 0)) {
sc 1358 dev/usb/if_aue.c struct aue_softc *sc = xsc;
sc 1359 dev/usb/if_aue.c struct ifnet *ifp = GET_IFP(sc);
sc 1360 dev/usb/if_aue.c struct mii_data *mii = GET_MII(sc);
sc 1364 dev/usb/if_aue.c DPRINTFN(5,("%s: %s: enter\n", sc->aue_dev.dv_xname, __func__));
sc 1366 dev/usb/if_aue.c if (sc->aue_dying)
sc 1377 dev/usb/if_aue.c aue_reset(sc);
sc 1379 dev/usb/if_aue.c eaddr = sc->arpcom.ac_enaddr;
sc 1381 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_PAR0 + i, eaddr[i]);
sc 1385 dev/usb/if_aue.c AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC);
sc 1387 dev/usb/if_aue.c AUE_CLRBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC);
sc 1390 dev/usb/if_aue.c if (aue_tx_list_init(sc) == ENOBUFS) {
sc 1391 dev/usb/if_aue.c printf("%s: tx list init failed\n", sc->aue_dev.dv_xname);
sc 1397 dev/usb/if_aue.c if (aue_rx_list_init(sc) == ENOBUFS) {
sc 1398 dev/usb/if_aue.c printf("%s: rx list init failed\n", sc->aue_dev.dv_xname);
sc 1404 dev/usb/if_aue.c aue_setmulti(sc);
sc 1407 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_CTL0, AUE_CTL0_RXSTAT_APPEND | AUE_CTL0_RX_ENB);
sc 1408 dev/usb/if_aue.c AUE_SETBIT(sc, AUE_CTL0, AUE_CTL0_TX_ENB);
sc 1409 dev/usb/if_aue.c AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_EP3_CLR);
sc 1413 dev/usb/if_aue.c if (sc->aue_ep[AUE_ENDPT_RX] == NULL) {
sc 1414 dev/usb/if_aue.c if (aue_openpipes(sc)) {
sc 1425 dev/usb/if_aue.c timeout_del(&sc->aue_stat_ch);
sc 1426 dev/usb/if_aue.c timeout_set(&sc->aue_stat_ch, aue_tick, sc);
sc 1427 dev/usb/if_aue.c timeout_add(&sc->aue_stat_ch, hz);
sc 1431 dev/usb/if_aue.c aue_openpipes(struct aue_softc *sc)
sc 1438 dev/usb/if_aue.c err = usbd_open_pipe(sc->aue_iface, sc->aue_ed[AUE_ENDPT_RX],
sc 1439 dev/usb/if_aue.c USBD_EXCLUSIVE_USE, &sc->aue_ep[AUE_ENDPT_RX]);
sc 1442 dev/usb/if_aue.c sc->aue_dev.dv_xname, usbd_errstr(err));
sc 1445 dev/usb/if_aue.c err = usbd_open_pipe(sc->aue_iface, sc->aue_ed[AUE_ENDPT_TX],
sc 1446 dev/usb/if_aue.c USBD_EXCLUSIVE_USE, &sc->aue_ep[AUE_ENDPT_TX]);
sc 1449 dev/usb/if_aue.c sc->aue_dev.dv_xname, usbd_errstr(err));
sc 1452 dev/usb/if_aue.c err = usbd_open_pipe_intr(sc->aue_iface, sc->aue_ed[AUE_ENDPT_INTR],
sc 1453 dev/usb/if_aue.c USBD_EXCLUSIVE_USE, &sc->aue_ep[AUE_ENDPT_INTR], sc,
sc 1454 dev/usb/if_aue.c &sc->aue_cdata.aue_ibuf, AUE_INTR_PKTLEN, aue_intr,
sc 1458 dev/usb/if_aue.c sc->aue_dev.dv_xname, usbd_errstr(err));
sc 1464 dev/usb/if_aue.c c = &sc->aue_cdata.aue_rx_chain[i];
sc 1465 dev/usb/if_aue.c usbd_setup_xfer(c->aue_xfer, sc->aue_ep[AUE_ENDPT_RX],
sc 1470 dev/usb/if_aue.c DPRINTFN(5,("%s: %s: start read\n", sc->aue_dev.dv_xname,
sc 1483 dev/usb/if_aue.c struct aue_softc *sc = ifp->if_softc;
sc 1484 dev/usb/if_aue.c struct mii_data *mii = GET_MII(sc);
sc 1486 dev/usb/if_aue.c DPRINTFN(5,("%s: %s: enter\n", sc->aue_dev.dv_xname, __func__));
sc 1488 dev/usb/if_aue.c if (sc->aue_dying)
sc 1491 dev/usb/if_aue.c sc->aue_link = 0;
sc 1509 dev/usb/if_aue.c struct aue_softc *sc = ifp->if_softc;
sc 1510 dev/usb/if_aue.c struct mii_data *mii = GET_MII(sc);
sc 1512 dev/usb/if_aue.c DPRINTFN(5,("%s: %s: enter\n", sc->aue_dev.dv_xname, __func__));
sc 1522 dev/usb/if_aue.c struct aue_softc *sc = ifp->if_softc;
sc 1528 dev/usb/if_aue.c if (sc->aue_dying)
sc 1536 dev/usb/if_aue.c aue_init(sc);
sc 1541 dev/usb/if_aue.c arp_ifinit(&sc->arpcom, ifa);
sc 1558 dev/usb/if_aue.c !(sc->aue_if_flags & IFF_PROMISC)) {
sc 1559 dev/usb/if_aue.c AUE_SETBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC);
sc 1562 dev/usb/if_aue.c sc->aue_if_flags & IFF_PROMISC) {
sc 1563 dev/usb/if_aue.c AUE_CLRBIT(sc, AUE_CTL2, AUE_CTL2_RX_PROMISC);
sc 1565 dev/usb/if_aue.c aue_init(sc);
sc 1568 dev/usb/if_aue.c aue_stop(sc);
sc 1570 dev/usb/if_aue.c sc->aue_if_flags = ifp->if_flags;
sc 1576 dev/usb/if_aue.c ether_addmulti(ifr, &sc->arpcom) :
sc 1577 dev/usb/if_aue.c ether_delmulti(ifr, &sc->arpcom);
sc 1581 dev/usb/if_aue.c aue_setmulti(sc);
sc 1587 dev/usb/if_aue.c mii = GET_MII(sc);
sc 1603 dev/usb/if_aue.c struct aue_softc *sc = ifp->if_softc;
sc 1608 dev/usb/if_aue.c DPRINTFN(5,("%s: %s: enter\n", sc->aue_dev.dv_xname, __func__));
sc 1611 dev/usb/if_aue.c printf("%s: watchdog timeout\n", sc->aue_dev.dv_xname);
sc 1614 dev/usb/if_aue.c c = &sc->aue_cdata.aue_tx_chain[0];
sc 1630 dev/usb/if_aue.c struct aue_softc *sc = (struct aue_softc *)arg;
sc 1632 dev/usb/if_aue.c aue_reset(sc);
sc 1633 dev/usb/if_aue.c aue_stop(sc);
sc 1641 dev/usb/if_aue.c aue_stop(struct aue_softc *sc)
sc 1647 dev/usb/if_aue.c DPRINTFN(5,("%s: %s: enter\n", sc->aue_dev.dv_xname, __func__));
sc 1649 dev/usb/if_aue.c ifp = GET_IFP(sc);
sc 1653 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_CTL0, 0);
sc 1654 dev/usb/if_aue.c aue_csr_write_1(sc, AUE_CTL1, 0);
sc 1655 dev/usb/if_aue.c aue_reset(sc);
sc 1656 dev/usb/if_aue.c timeout_del(&sc->aue_stat_ch);
sc 1659 dev/usb/if_aue.c if (sc->aue_ep[AUE_ENDPT_RX] != NULL) {
sc 1660 dev/usb/if_aue.c err = usbd_abort_pipe(sc->aue_ep[AUE_ENDPT_RX]);
sc 1663 dev/usb/if_aue.c sc->aue_dev.dv_xname, usbd_errstr(err));
sc 1665 dev/usb/if_aue.c err = usbd_close_pipe(sc->aue_ep[AUE_ENDPT_RX]);
sc 1668 dev/usb/if_aue.c sc->aue_dev.dv_xname, usbd_errstr(err));
sc 1670 dev/usb/if_aue.c sc->aue_ep[AUE_ENDPT_RX] = NULL;
sc 1673 dev/usb/if_aue.c if (sc->aue_ep[AUE_ENDPT_TX] != NULL) {
sc 1674 dev/usb/if_aue.c err = usbd_abort_pipe(sc->aue_ep[AUE_ENDPT_TX]);
sc 1677 dev/usb/if_aue.c sc->aue_dev.dv_xname, usbd_errstr(err));
sc 1679 dev/usb/if_aue.c err = usbd_close_pipe(sc->aue_ep[AUE_ENDPT_TX]);
sc 1682 dev/usb/if_aue.c sc->aue_dev.dv_xname, usbd_errstr(err));
sc 1684 dev/usb/if_aue.c sc->aue_ep[AUE_ENDPT_TX] = NULL;
sc 1687 dev/usb/if_aue.c if (sc->aue_ep[AUE_ENDPT_INTR] != NULL) {
sc 1688 dev/usb/if_aue.c err = usbd_abort_pipe(sc->aue_ep[AUE_ENDPT_INTR]);
sc 1691 dev/usb/if_aue.c sc->aue_dev.dv_xname, usbd_errstr(err));
sc 1693 dev/usb/if_aue.c err = usbd_close_pipe(sc->aue_ep[AUE_ENDPT_INTR]);
sc 1696 dev/usb/if_aue.c sc->aue_dev.dv_xname, usbd_errstr(err));
sc 1698 dev/usb/if_aue.c sc->aue_ep[AUE_ENDPT_INTR] = NULL;
sc 1703 dev/usb/if_aue.c if (sc->aue_cdata.aue_rx_chain[i].aue_mbuf != NULL) {
sc 1704 dev/usb/if_aue.c m_freem(sc->aue_cdata.aue_rx_chain[i].aue_mbuf);
sc 1705 dev/usb/if_aue.c sc->aue_cdata.aue_rx_chain[i].aue_mbuf = NULL;
sc 1707 dev/usb/if_aue.c if (sc->aue_cdata.aue_rx_chain[i].aue_xfer != NULL) {
sc 1708 dev/usb/if_aue.c usbd_free_xfer(sc->aue_cdata.aue_rx_chain[i].aue_xfer);
sc 1709 dev/usb/if_aue.c sc->aue_cdata.aue_rx_chain[i].aue_xfer = NULL;
sc 1715 dev/usb/if_aue.c if (sc->aue_cdata.aue_tx_chain[i].aue_mbuf != NULL) {
sc 1716 dev/usb/if_aue.c m_freem(sc->aue_cdata.aue_tx_chain[i].aue_mbuf);
sc 1717 dev/usb/if_aue.c sc->aue_cdata.aue_tx_chain[i].aue_mbuf = NULL;
sc 1719 dev/usb/if_aue.c if (sc->aue_cdata.aue_tx_chain[i].aue_xfer != NULL) {
sc 1720 dev/usb/if_aue.c usbd_free_xfer(sc->aue_cdata.aue_tx_chain[i].aue_xfer);
sc 1721 dev/usb/if_aue.c sc->aue_cdata.aue_tx_chain[i].aue_xfer = NULL;
sc 1725 dev/usb/if_aue.c sc->aue_link = 0;
sc 232 dev/usb/if_auereg.h #define GET_IFP(sc) (&(sc)->arpcom.ac_if)
sc 233 dev/usb/if_auereg.h #define GET_MII(sc) (&(sc)->aue_mii)
sc 212 dev/usb/if_axe.c void axe_reset(struct axe_softc *sc);
sc 215 dev/usb/if_axe.c void axe_lock_mii(struct axe_softc *sc);
sc 216 dev/usb/if_axe.c void axe_unlock_mii(struct axe_softc *sc);
sc 223 dev/usb/if_axe.c axe_lock_mii(struct axe_softc *sc)
sc 225 dev/usb/if_axe.c sc->axe_refcnt++;
sc 226 dev/usb/if_axe.c rw_enter_write(&sc->axe_mii_lock);
sc 230 dev/usb/if_axe.c axe_unlock_mii(struct axe_softc *sc)
sc 232 dev/usb/if_axe.c rw_exit_write(&sc->axe_mii_lock);
sc 233 dev/usb/if_axe.c if (--sc->axe_refcnt < 0)
sc 234 dev/usb/if_axe.c usb_detach_wakeup(&sc->axe_dev);
sc 238 dev/usb/if_axe.c axe_cmd(struct axe_softc *sc, int cmd, int index, int val, void *buf)
sc 243 dev/usb/if_axe.c if (sc->axe_dying)
sc 255 dev/usb/if_axe.c err = usbd_do_request(sc->axe_udev, &req, buf);
sc 266 dev/usb/if_axe.c struct axe_softc *sc = (void *)dev;
sc 270 dev/usb/if_axe.c if (sc->axe_dying) {
sc 283 dev/usb/if_axe.c if (sc->axe_phyaddrs[0] != AXE_NOPHY && phy != sc->axe_phyaddrs[0])
sc 286 dev/usb/if_axe.c if (sc->axe_phyaddrs[1] != AXE_NOPHY && phy != sc->axe_phyaddrs[1])
sc 289 dev/usb/if_axe.c if (sc->axe_phyaddrs[0] != 0xFF && sc->axe_phyaddrs[0] != phy)
sc 294 dev/usb/if_axe.c axe_lock_mii(sc);
sc 295 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
sc 296 dev/usb/if_axe.c err = axe_cmd(sc, AXE_CMD_MII_READ_REG, reg, phy, val);
sc 297 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
sc 298 dev/usb/if_axe.c axe_unlock_mii(sc);
sc 301 dev/usb/if_axe.c printf("axe%d: read PHY failed\n", sc->axe_unit);
sc 306 dev/usb/if_axe.c sc->axe_phyaddrs[0] = phy;
sc 314 dev/usb/if_axe.c struct axe_softc *sc = (void *)dev;
sc 318 dev/usb/if_axe.c if (sc->axe_dying)
sc 323 dev/usb/if_axe.c axe_lock_mii(sc);
sc 324 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_MII_OPMODE_SW, 0, 0, NULL);
sc 325 dev/usb/if_axe.c err = axe_cmd(sc, AXE_CMD_MII_WRITE_REG, reg, phy, uval);
sc 326 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_MII_OPMODE_HW, 0, 0, NULL);
sc 327 dev/usb/if_axe.c axe_unlock_mii(sc);
sc 330 dev/usb/if_axe.c printf("axe%d: write PHY failed\n", sc->axe_unit);
sc 338 dev/usb/if_axe.c struct axe_softc *sc = (void *)dev;
sc 339 dev/usb/if_axe.c struct mii_data *mii = GET_MII(sc);
sc 347 dev/usb/if_axe.c if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
sc 364 dev/usb/if_axe.c err = axe_cmd(sc, AXE_CMD_WRITE_MEDIA, 0, val, NULL);
sc 366 dev/usb/if_axe.c printf("%s: media change failed\n", sc->axe_dev.dv_xname);
sc 377 dev/usb/if_axe.c struct axe_softc *sc = ifp->if_softc;
sc 378 dev/usb/if_axe.c struct mii_data *mii = GET_MII(sc);
sc 380 dev/usb/if_axe.c sc->axe_link = 0;
sc 397 dev/usb/if_axe.c struct axe_softc *sc = ifp->if_softc;
sc 398 dev/usb/if_axe.c struct mii_data *mii = GET_MII(sc);
sc 406 dev/usb/if_axe.c axe_setmulti(struct axe_softc *sc)
sc 416 dev/usb/if_axe.c if (sc->axe_dying)
sc 419 dev/usb/if_axe.c ifp = GET_IFP(sc);
sc 421 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, urxmode);
sc 427 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
sc 433 dev/usb/if_axe.c ETHER_FIRST_MULTI(step, &sc->arpcom, enm);
sc 445 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_WRITE_MCAST, 0, 0, (void *)&hashtbl);
sc 446 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
sc 451 dev/usb/if_axe.c axe_reset(struct axe_softc *sc)
sc 453 dev/usb/if_axe.c if (sc->axe_dying)
sc 463 dev/usb/if_axe.c axe_ax88178_init(struct axe_softc *sc)
sc 468 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_SROM_WR_ENABLE, 0, 0, NULL);
sc 470 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_SROM_READ, 0, 0x0017, &eeprom);
sc 471 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_SROM_WR_DISABLE, 0, 0, NULL);
sc 488 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x008c, NULL);
sc 489 dev/usb/if_axe.c usbd_delay_ms(sc->axe_udev, 40);
sc 491 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL);
sc 492 dev/usb/if_axe.c usbd_delay_ms(sc->axe_udev, 30);
sc 494 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x001c, NULL);
sc 495 dev/usb/if_axe.c usbd_delay_ms(sc->axe_udev, 300);
sc 497 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x003c, NULL);
sc 498 dev/usb/if_axe.c usbd_delay_ms(sc->axe_udev, 30);
sc 501 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x0004, NULL);
sc 502 dev/usb/if_axe.c usbd_delay_ms(sc->axe_udev, 30);
sc 503 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x000c, NULL);
sc 504 dev/usb/if_axe.c usbd_delay_ms(sc->axe_udev, 30);
sc 508 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
sc 509 dev/usb/if_axe.c usbd_delay_ms(sc->axe_udev, 150);
sc 510 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
sc 512 dev/usb/if_axe.c usbd_delay_ms(sc->axe_udev, 150);
sc 513 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
sc 517 dev/usb/if_axe.c axe_ax88772_init(struct axe_softc *sc)
sc 519 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_WRITE_GPIO, 0, 0x00b0, NULL);
sc 520 dev/usb/if_axe.c usbd_delay_ms(sc->axe_udev, 40);
sc 522 dev/usb/if_axe.c if (sc->axe_phyaddrs[1] == AXE_INTPHY) {
sc 524 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x01, NULL);
sc 525 dev/usb/if_axe.c usbd_delay_ms(sc->axe_udev, 10);
sc 528 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_CLEAR, NULL);
sc 529 dev/usb/if_axe.c usbd_delay_ms(sc->axe_udev, 60);
sc 532 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
sc 534 dev/usb/if_axe.c usbd_delay_ms(sc->axe_udev, 150);
sc 537 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0, AXE_SW_RESET_PRL, NULL);
sc 540 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
sc 544 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_SW_PHY_SELECT, 0, 0x00, NULL);
sc 545 dev/usb/if_axe.c usbd_delay_ms(sc->axe_udev, 10);
sc 548 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_SW_RESET_REG, 0,
sc 552 dev/usb/if_axe.c usbd_delay_ms(sc->axe_udev, 150);
sc 553 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, 0, NULL);
sc 578 dev/usb/if_axe.c struct axe_softc *sc = (struct axe_softc *)self;
sc 587 dev/usb/if_axe.c char *devname = sc->axe_dev.dv_xname;
sc 594 dev/usb/if_axe.c sc->axe_unit = self->dv_unit; /*device_get_unit(self);*/
sc 599 dev/usb/if_axe.c sc->axe_unit);
sc 604 dev/usb/if_axe.c sc->axe_flags = axe_lookup(uaa->vendor, uaa->product)->axe_flags;
sc 606 dev/usb/if_axe.c usb_init_task(&sc->axe_tick_task, axe_tick_task, sc);
sc 607 dev/usb/if_axe.c rw_init(&sc->axe_mii_lock, "axemii");
sc 608 dev/usb/if_axe.c usb_init_task(&sc->axe_stop_task, (void (*)(void *))axe_stop, sc);
sc 610 dev/usb/if_axe.c err = usbd_device2interface_handle(dev, AXE_IFACE_IDX, &sc->axe_iface);
sc 613 dev/usb/if_axe.c sc->axe_unit);
sc 618 dev/usb/if_axe.c sc->axe_udev = dev;
sc 619 dev/usb/if_axe.c sc->axe_product = uaa->product;
sc 620 dev/usb/if_axe.c sc->axe_vendor = uaa->vendor;
sc 622 dev/usb/if_axe.c id = usbd_get_interface_descriptor(sc->axe_iface);
sc 624 dev/usb/if_axe.c printf("%s: %s", sc->axe_dev.dv_xname, devinfop);
sc 628 dev/usb/if_axe.c if (sc->axe_flags & AX178 || sc->axe_flags & AX772)
sc 629 dev/usb/if_axe.c sc->axe_bufsz = (sc->axe_udev->speed == USB_SPEED_HIGH) ?
sc 632 dev/usb/if_axe.c sc->axe_bufsz = AXE_172_BUFSZ;
sc 636 dev/usb/if_axe.c ed = usbd_interface2endpoint_descriptor(sc->axe_iface, i);
sc 643 dev/usb/if_axe.c sc->axe_ed[AXE_ENDPT_RX] = ed->bEndpointAddress;
sc 646 dev/usb/if_axe.c sc->axe_ed[AXE_ENDPT_TX] = ed->bEndpointAddress;
sc 649 dev/usb/if_axe.c sc->axe_ed[AXE_ENDPT_INTR] = ed->bEndpointAddress;
sc 656 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_READ_PHYID, 0, 0, (void *)&sc->axe_phyaddrs);
sc 659 dev/usb/if_axe.c sc->axe_phyaddrs[0], sc->axe_phyaddrs[1]));
sc 661 dev/usb/if_axe.c if (sc->axe_flags & AX178) {
sc 662 dev/usb/if_axe.c axe_ax88178_init(sc);
sc 664 dev/usb/if_axe.c } else if (sc->axe_flags & AX772) {
sc 665 dev/usb/if_axe.c axe_ax88772_init(sc);
sc 673 dev/usb/if_axe.c if (sc->axe_flags & AX178 || sc->axe_flags & AX772)
sc 674 dev/usb/if_axe.c axe_cmd(sc, AXE_178_CMD_READ_NODEID, 0, 0, &eaddr);
sc 676 dev/usb/if_axe.c axe_cmd(sc, AXE_172_CMD_READ_NODEID, 0, 0, &eaddr);
sc 681 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_READ_IPG012, 0, 0, (void *)&sc->axe_ipgs);
sc 687 dev/usb/if_axe.c sc->axe_phyaddrs[0] = sc->axe_phyaddrs[1] = 0xFF;
sc 694 dev/usb/if_axe.c bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 697 dev/usb/if_axe.c ifp = &sc->arpcom.ac_if;
sc 698 dev/usb/if_axe.c ifp->if_softc = sc;
sc 712 dev/usb/if_axe.c mii = &sc->axe_mii;
sc 732 dev/usb/if_axe.c timeout_set(&sc->axe_stat_ch, NULL, NULL);
sc 734 dev/usb/if_axe.c sc->axe_attached = 1;
sc 737 dev/usb/if_axe.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->axe_udev,
sc 738 dev/usb/if_axe.c &sc->axe_dev);
sc 744 dev/usb/if_axe.c struct axe_softc *sc = (struct axe_softc *)self;
sc 746 dev/usb/if_axe.c struct ifnet *ifp = GET_IFP(sc);
sc 748 dev/usb/if_axe.c DPRINTFN(2,("%s: %s: enter\n", sc->axe_dev.dv_xname, __func__));
sc 751 dev/usb/if_axe.c if (!sc->axe_attached)
sc 754 dev/usb/if_axe.c timeout_del(&sc->axe_stat_ch);
sc 756 dev/usb/if_axe.c sc->axe_dying = 1;
sc 760 dev/usb/if_axe.c if (sc->axe_ep[AXE_ENDPT_TX] != NULL)
sc 761 dev/usb/if_axe.c usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_TX]);
sc 762 dev/usb/if_axe.c if (sc->axe_ep[AXE_ENDPT_RX] != NULL)
sc 763 dev/usb/if_axe.c usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_RX]);
sc 764 dev/usb/if_axe.c if (sc->axe_ep[AXE_ENDPT_INTR] != NULL)
sc 765 dev/usb/if_axe.c usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_INTR]);
sc 771 dev/usb/if_axe.c usb_rem_task(sc->axe_udev, &sc->axe_tick_task);
sc 772 dev/usb/if_axe.c usb_rem_task(sc->axe_udev, &sc->axe_stop_task);
sc 776 dev/usb/if_axe.c if (--sc->axe_refcnt >= 0) {
sc 778 dev/usb/if_axe.c usb_detach_wait(&sc->axe_dev);
sc 782 dev/usb/if_axe.c axe_stop(sc);
sc 784 dev/usb/if_axe.c mii_detach(&sc->axe_mii, MII_PHY_ANY, MII_OFFSET_ANY);
sc 785 dev/usb/if_axe.c ifmedia_delete_instance(&sc->axe_mii.mii_media, IFM_INST_ANY);
sc 790 dev/usb/if_axe.c if (sc->axe_ep[AXE_ENDPT_TX] != NULL ||
sc 791 dev/usb/if_axe.c sc->axe_ep[AXE_ENDPT_RX] != NULL ||
sc 792 dev/usb/if_axe.c sc->axe_ep[AXE_ENDPT_INTR] != NULL)
sc 794 dev/usb/if_axe.c sc->axe_dev.dv_xname);
sc 797 dev/usb/if_axe.c sc->axe_attached = 0;
sc 799 dev/usb/if_axe.c if (--sc->axe_refcnt >= 0) {
sc 801 dev/usb/if_axe.c usb_detach_wait(&sc->axe_dev);
sc 805 dev/usb/if_axe.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->axe_udev,
sc 806 dev/usb/if_axe.c &sc->axe_dev);
sc 814 dev/usb/if_axe.c struct axe_softc *sc = (struct axe_softc *)self;
sc 816 dev/usb/if_axe.c DPRINTFN(2,("%s: %s: enter\n", sc->axe_dev.dv_xname, __func__));
sc 823 dev/usb/if_axe.c sc->axe_dying = 1;
sc 851 dev/usb/if_axe.c axe_rx_list_init(struct axe_softc *sc)
sc 857 dev/usb/if_axe.c DPRINTF(("%s: %s: enter\n", sc->axe_dev.dv_xname, __func__));
sc 859 dev/usb/if_axe.c cd = &sc->axe_cdata;
sc 862 dev/usb/if_axe.c c->axe_sc = sc;
sc 866 dev/usb/if_axe.c c->axe_xfer = usbd_alloc_xfer(sc->axe_udev);
sc 870 dev/usb/if_axe.c sc->axe_bufsz);
sc 882 dev/usb/if_axe.c axe_tx_list_init(struct axe_softc *sc)
sc 888 dev/usb/if_axe.c DPRINTF(("%s: %s: enter\n", sc->axe_dev.dv_xname, __func__));
sc 890 dev/usb/if_axe.c cd = &sc->axe_cdata;
sc 893 dev/usb/if_axe.c c->axe_sc = sc;
sc 897 dev/usb/if_axe.c c->axe_xfer = usbd_alloc_xfer(sc->axe_udev);
sc 901 dev/usb/if_axe.c sc->axe_bufsz);
sc 920 dev/usb/if_axe.c struct axe_softc *sc = c->axe_sc;
sc 921 dev/usb/if_axe.c struct ifnet *ifp = GET_IFP(sc);
sc 929 dev/usb/if_axe.c DPRINTFN(10,("%s: %s: enter\n", sc->axe_dev.dv_xname,__func__));
sc 931 dev/usb/if_axe.c if (sc->axe_dying)
sc 940 dev/usb/if_axe.c if (usbd_ratecheck(&sc->axe_rx_notice)) {
sc 942 dev/usb/if_axe.c sc->axe_dev.dv_xname, usbd_errstr(status));
sc 945 dev/usb/if_axe.c usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_RX]);
sc 952 dev/usb/if_axe.c if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
sc 1013 dev/usb/if_axe.c memset(c->axe_buf, 0, sc->axe_bufsz);
sc 1016 dev/usb/if_axe.c usbd_setup_xfer(xfer, sc->axe_ep[AXE_ENDPT_RX],
sc 1017 dev/usb/if_axe.c c, c->axe_buf, sc->axe_bufsz,
sc 1022 dev/usb/if_axe.c DPRINTFN(10,("%s: %s: start rx\n", sc->axe_dev.dv_xname, __func__));
sc 1035 dev/usb/if_axe.c struct axe_softc *sc;
sc 1041 dev/usb/if_axe.c sc = c->axe_sc;
sc 1042 dev/usb/if_axe.c ifp = &sc->arpcom.ac_if;
sc 1044 dev/usb/if_axe.c if (sc->axe_dying)
sc 1055 dev/usb/if_axe.c printf("axe%d: usb error on tx: %s\n", sc->axe_unit,
sc 1058 dev/usb/if_axe.c usbd_clear_endpoint_stall_async(sc->axe_ep[AXE_ENDPT_TX]);
sc 1080 dev/usb/if_axe.c struct axe_softc *sc = xsc;
sc 1082 dev/usb/if_axe.c if (sc == NULL)
sc 1085 dev/usb/if_axe.c DPRINTFN(0xff, ("%s: %s: enter\n", sc->axe_dev.dv_xname,
sc 1088 dev/usb/if_axe.c if (sc->axe_dying)
sc 1092 dev/usb/if_axe.c usb_add_task(sc->axe_udev, &sc->axe_tick_task);
sc 1100 dev/usb/if_axe.c struct axe_softc *sc;
sc 1104 dev/usb/if_axe.c sc = xsc;
sc 1106 dev/usb/if_axe.c if (sc == NULL)
sc 1109 dev/usb/if_axe.c if (sc->axe_dying)
sc 1112 dev/usb/if_axe.c ifp = GET_IFP(sc);
sc 1113 dev/usb/if_axe.c mii = GET_MII(sc);
sc 1120 dev/usb/if_axe.c if (!sc->axe_link && mii->mii_media_status & IFM_ACTIVE &&
sc 1123 dev/usb/if_axe.c sc->axe_dev.dv_xname, __func__));
sc 1124 dev/usb/if_axe.c sc->axe_link++;
sc 1129 dev/usb/if_axe.c timeout_del(&sc->axe_stat_ch);
sc 1130 dev/usb/if_axe.c timeout_set(&sc->axe_stat_ch, axe_tick, sc);
sc 1131 dev/usb/if_axe.c timeout_add(&sc->axe_stat_ch, hz);
sc 1137 dev/usb/if_axe.c axe_encap(struct axe_softc *sc, struct mbuf *m, int idx)
sc 1144 dev/usb/if_axe.c c = &sc->axe_cdata.axe_tx_chain[idx];
sc 1146 dev/usb/if_axe.c if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
sc 1147 dev/usb/if_axe.c boundary = (sc->axe_udev->speed == USB_SPEED_HIGH) ? 512 : 64;
sc 1172 dev/usb/if_axe.c usbd_setup_xfer(c->axe_xfer, sc->axe_ep[AXE_ENDPT_TX],
sc 1179 dev/usb/if_axe.c axe_stop(sc);
sc 1183 dev/usb/if_axe.c sc->axe_cdata.axe_tx_cnt++;
sc 1191 dev/usb/if_axe.c struct axe_softc *sc;
sc 1194 dev/usb/if_axe.c sc = ifp->if_softc;
sc 1196 dev/usb/if_axe.c if (!sc->axe_link)
sc 1206 dev/usb/if_axe.c if (axe_encap(sc, m_head, 0)) {
sc 1234 dev/usb/if_axe.c struct axe_softc *sc = xsc;
sc 1235 dev/usb/if_axe.c struct ifnet *ifp = &sc->arpcom.ac_if;
sc 1246 dev/usb/if_axe.c axe_reset(sc);
sc 1251 dev/usb/if_axe.c if (axe_rx_list_init(sc) == ENOBUFS) {
sc 1252 dev/usb/if_axe.c printf("axe%d: rx list init failed\n", sc->axe_unit);
sc 1258 dev/usb/if_axe.c if (axe_tx_list_init(sc) == ENOBUFS) {
sc 1259 dev/usb/if_axe.c printf("axe%d: tx list init failed\n", sc->axe_unit);
sc 1265 dev/usb/if_axe.c if (sc->axe_flags & AX178 || sc->axe_flags & AX772)
sc 1266 dev/usb/if_axe.c axe_cmd(sc, AXE_178_CMD_WRITE_IPG012, sc->axe_ipgs[2],
sc 1267 dev/usb/if_axe.c (sc->axe_ipgs[1] << 8) | (sc->axe_ipgs[0]), NULL);
sc 1269 dev/usb/if_axe.c axe_cmd(sc, AXE_172_CMD_WRITE_IPG0, 0, sc->axe_ipgs[0], NULL);
sc 1270 dev/usb/if_axe.c axe_cmd(sc, AXE_172_CMD_WRITE_IPG1, 0, sc->axe_ipgs[1], NULL);
sc 1271 dev/usb/if_axe.c axe_cmd(sc, AXE_172_CMD_WRITE_IPG2, 0, sc->axe_ipgs[2], NULL);
sc 1276 dev/usb/if_axe.c if (sc->axe_flags & AX178 || sc->axe_flags & AX772) {
sc 1277 dev/usb/if_axe.c if (sc->axe_udev->speed == USB_SPEED_HIGH) {
sc 1291 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0, rxmode, NULL);
sc 1294 dev/usb/if_axe.c axe_setmulti(sc);
sc 1297 dev/usb/if_axe.c err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_RX],
sc 1298 dev/usb/if_axe.c USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_RX]);
sc 1301 dev/usb/if_axe.c sc->axe_unit, usbd_errstr(err));
sc 1306 dev/usb/if_axe.c err = usbd_open_pipe(sc->axe_iface, sc->axe_ed[AXE_ENDPT_TX],
sc 1307 dev/usb/if_axe.c USBD_EXCLUSIVE_USE, &sc->axe_ep[AXE_ENDPT_TX]);
sc 1310 dev/usb/if_axe.c sc->axe_unit, usbd_errstr(err));
sc 1317 dev/usb/if_axe.c c = &sc->axe_cdata.axe_rx_chain[i];
sc 1318 dev/usb/if_axe.c usbd_setup_xfer(c->axe_xfer, sc->axe_ep[AXE_ENDPT_RX],
sc 1319 dev/usb/if_axe.c c, c->axe_buf, sc->axe_bufsz,
sc 1330 dev/usb/if_axe.c timeout_del(&sc->axe_stat_ch);
sc 1331 dev/usb/if_axe.c timeout_set(&sc->axe_stat_ch, axe_tick, sc);
sc 1332 dev/usb/if_axe.c timeout_add(&sc->axe_stat_ch, hz);
sc 1339 dev/usb/if_axe.c struct axe_softc *sc = ifp->if_softc;
sc 1350 dev/usb/if_axe.c axe_init(sc);
sc 1353 dev/usb/if_axe.c arp_ifinit(&sc->arpcom, ifa);
sc 1368 dev/usb/if_axe.c !(sc->axe_if_flags & IFF_PROMISC)) {
sc 1370 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, rxmode);
sc 1371 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0,
sc 1374 dev/usb/if_axe.c axe_setmulti(sc);
sc 1377 dev/usb/if_axe.c sc->axe_if_flags & IFF_PROMISC) {
sc 1378 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_RXCTL_READ, 0, 0, rxmode);
sc 1379 dev/usb/if_axe.c axe_cmd(sc, AXE_CMD_RXCTL_WRITE, 0,
sc 1381 dev/usb/if_axe.c axe_setmulti(sc);
sc 1383 dev/usb/if_axe.c axe_init(sc);
sc 1386 dev/usb/if_axe.c axe_stop(sc);
sc 1388 dev/usb/if_axe.c sc->axe_if_flags = ifp->if_flags;
sc 1393 dev/usb/if_axe.c ether_addmulti(ifr, &sc->arpcom) :
sc 1394 dev/usb/if_axe.c ether_delmulti(ifr, &sc->arpcom);
sc 1402 dev/usb/if_axe.c axe_setmulti(sc);
sc 1408 dev/usb/if_axe.c mii = GET_MII(sc);
sc 1423 dev/usb/if_axe.c struct axe_softc *sc;
sc 1428 dev/usb/if_axe.c sc = ifp->if_softc;
sc 1431 dev/usb/if_axe.c printf("axe%d: watchdog timeout\n", sc->axe_unit);
sc 1434 dev/usb/if_axe.c c = &sc->axe_cdata.axe_tx_chain[0];
sc 1448 dev/usb/if_axe.c axe_stop(struct axe_softc *sc)
sc 1454 dev/usb/if_axe.c axe_reset(sc);
sc 1456 dev/usb/if_axe.c ifp = &sc->arpcom.ac_if;
sc 1460 dev/usb/if_axe.c timeout_del(&sc->axe_stat_ch);
sc 1463 dev/usb/if_axe.c if (sc->axe_ep[AXE_ENDPT_RX] != NULL) {
sc 1464 dev/usb/if_axe.c err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_RX]);
sc 1467 dev/usb/if_axe.c sc->axe_unit, usbd_errstr(err));
sc 1469 dev/usb/if_axe.c err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_RX]);
sc 1472 dev/usb/if_axe.c sc->axe_unit, usbd_errstr(err));
sc 1474 dev/usb/if_axe.c sc->axe_ep[AXE_ENDPT_RX] = NULL;
sc 1477 dev/usb/if_axe.c if (sc->axe_ep[AXE_ENDPT_TX] != NULL) {
sc 1478 dev/usb/if_axe.c err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_TX]);
sc 1481 dev/usb/if_axe.c sc->axe_unit, usbd_errstr(err));
sc 1483 dev/usb/if_axe.c err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_TX]);
sc 1486 dev/usb/if_axe.c sc->axe_unit, usbd_errstr(err));
sc 1488 dev/usb/if_axe.c sc->axe_ep[AXE_ENDPT_TX] = NULL;
sc 1491 dev/usb/if_axe.c if (sc->axe_ep[AXE_ENDPT_INTR] != NULL) {
sc 1492 dev/usb/if_axe.c err = usbd_abort_pipe(sc->axe_ep[AXE_ENDPT_INTR]);
sc 1495 dev/usb/if_axe.c sc->axe_unit, usbd_errstr(err));
sc 1497 dev/usb/if_axe.c err = usbd_close_pipe(sc->axe_ep[AXE_ENDPT_INTR]);
sc 1500 dev/usb/if_axe.c sc->axe_unit, usbd_errstr(err));
sc 1502 dev/usb/if_axe.c sc->axe_ep[AXE_ENDPT_INTR] = NULL;
sc 1507 dev/usb/if_axe.c if (sc->axe_cdata.axe_rx_chain[i].axe_mbuf != NULL) {
sc 1508 dev/usb/if_axe.c m_freem(sc->axe_cdata.axe_rx_chain[i].axe_mbuf);
sc 1509 dev/usb/if_axe.c sc->axe_cdata.axe_rx_chain[i].axe_mbuf = NULL;
sc 1511 dev/usb/if_axe.c if (sc->axe_cdata.axe_rx_chain[i].axe_xfer != NULL) {
sc 1512 dev/usb/if_axe.c usbd_free_xfer(sc->axe_cdata.axe_rx_chain[i].axe_xfer);
sc 1513 dev/usb/if_axe.c sc->axe_cdata.axe_rx_chain[i].axe_xfer = NULL;
sc 1519 dev/usb/if_axe.c if (sc->axe_cdata.axe_tx_chain[i].axe_mbuf != NULL) {
sc 1520 dev/usb/if_axe.c m_freem(sc->axe_cdata.axe_tx_chain[i].axe_mbuf);
sc 1521 dev/usb/if_axe.c sc->axe_cdata.axe_tx_chain[i].axe_mbuf = NULL;
sc 1523 dev/usb/if_axe.c if (sc->axe_cdata.axe_tx_chain[i].axe_xfer != NULL) {
sc 1524 dev/usb/if_axe.c usbd_free_xfer(sc->axe_cdata.axe_tx_chain[i].axe_xfer);
sc 1525 dev/usb/if_axe.c sc->axe_cdata.axe_tx_chain[i].axe_xfer = NULL;
sc 1529 dev/usb/if_axe.c sc->axe_link = 0;
sc 194 dev/usb/if_axereg.h #define GET_MII(sc) (&(sc)->axe_mii)
sc 196 dev/usb/if_axereg.h #define GET_IFP(sc) (&(sc)->arpcom.ac_if)
sc 159 dev/usb/if_cdce.c struct cdce_softc *sc = (struct cdce_softc *)self;
sc 180 dev/usb/if_cdce.c printf("\n%s: %s\n", sc->cdce_dev.dv_xname, devinfop);
sc 183 dev/usb/if_cdce.c sc->cdce_udev = uaa->device;
sc 184 dev/usb/if_cdce.c sc->cdce_ctl_iface = uaa->iface;
sc 185 dev/usb/if_cdce.c id = usbd_get_interface_descriptor(sc->cdce_ctl_iface);
sc 190 dev/usb/if_cdce.c sc->cdce_flags = t->cdce_flags;
sc 204 dev/usb/if_cdce.c if ((sc->cdce_flags & CDCE_SWAPUNION) == 0 &&
sc 207 dev/usb/if_cdce.c if ((sc->cdce_flags & CDCE_SWAPUNION) &&
sc 213 dev/usb/if_cdce.c printf("%s: ", sc->cdce_dev.dv_xname);
sc 225 dev/usb/if_cdce.c sc->cdce_data_iface = sc->cdce_ctl_iface;
sc 235 dev/usb/if_cdce.c sc->cdce_data_iface = uaa->ifaces[i];
sc 242 dev/usb/if_cdce.c if (sc->cdce_data_iface == NULL) {
sc 243 dev/usb/if_cdce.c printf("%s: no data interface\n", sc->cdce_dev.dv_xname);
sc 247 dev/usb/if_cdce.c id = usbd_get_interface_descriptor(sc->cdce_ctl_iface);
sc 248 dev/usb/if_cdce.c sc->cdce_intr_no = -1;
sc 249 dev/usb/if_cdce.c for (i = 0; i < id->bNumEndpoints && sc->cdce_intr_no == -1; i++) {
sc 250 dev/usb/if_cdce.c ed = usbd_interface2endpoint_descriptor(sc->cdce_ctl_iface, i);
sc 253 dev/usb/if_cdce.c sc->cdce_dev.dv_xname, i);
sc 258 dev/usb/if_cdce.c sc->cdce_intr_no = ed->bEndpointAddress;
sc 259 dev/usb/if_cdce.c sc->cdce_intr_size = sizeof(sc->cdce_intr_buf);
sc 263 dev/usb/if_cdce.c id = usbd_get_interface_descriptor(sc->cdce_data_iface);
sc 264 dev/usb/if_cdce.c cd = usbd_get_config_descriptor(sc->cdce_udev);
sc 268 dev/usb/if_cdce.c if (usbd_set_interface(sc->cdce_data_iface, j)) {
sc 270 dev/usb/if_cdce.c sc->cdce_dev.dv_xname, j);
sc 274 dev/usb/if_cdce.c id = usbd_get_interface_descriptor(sc->cdce_data_iface);
sc 275 dev/usb/if_cdce.c sc->cdce_bulkin_no = sc->cdce_bulkout_no = -1;
sc 277 dev/usb/if_cdce.c ed = usbd_interface2endpoint_descriptor(sc->cdce_data_iface, i);
sc 280 dev/usb/if_cdce.c sc->cdce_dev.dv_xname, i);
sc 285 dev/usb/if_cdce.c sc->cdce_bulkin_no = ed->bEndpointAddress;
sc 288 dev/usb/if_cdce.c sc->cdce_bulkout_no = ed->bEndpointAddress;
sc 294 dev/usb/if_cdce.c sc->cdce_dev.dv_xname, ed->bEndpointAddress,
sc 299 dev/usb/if_cdce.c if ((sc->cdce_bulkin_no != -1) && (sc->cdce_bulkout_no != -1)) {
sc 301 dev/usb/if_cdce.c sc->cdce_intr_no, sc->cdce_bulkin_no, sc->cdce_bulkout_no));
sc 306 dev/usb/if_cdce.c if (sc->cdce_bulkin_no == -1) {
sc 308 dev/usb/if_cdce.c sc->cdce_dev.dv_xname);
sc 311 dev/usb/if_cdce.c if (sc->cdce_bulkout_no == -1 ) {
sc 313 dev/usb/if_cdce.c sc->cdce_dev.dv_xname);
sc 320 dev/usb/if_cdce.c if (!ethd || usbd_get_string_desc(sc->cdce_udev, ethd->iMacAddress, 0,
sc 323 dev/usb/if_cdce.c bcopy(&macaddr_hi, &sc->cdce_arpcom.ac_enaddr[0],
sc 325 dev/usb/if_cdce.c bcopy(&ticks, &sc->cdce_arpcom.ac_enaddr[2], sizeof(u_int32_t));
sc 326 dev/usb/if_cdce.c sc->cdce_arpcom.ac_enaddr[5] = (u_int8_t)(sc->cdce_unit);
sc 340 dev/usb/if_cdce.c sc->cdce_arpcom.ac_enaddr[i / 2] |= c;
sc 344 dev/usb/if_cdce.c printf("%s: address %s\n", sc->cdce_dev.dv_xname,
sc 345 dev/usb/if_cdce.c ether_sprintf(sc->cdce_arpcom.ac_enaddr));
sc 347 dev/usb/if_cdce.c ifp = GET_IFP(sc);
sc 348 dev/usb/if_cdce.c ifp->if_softc = sc;
sc 353 dev/usb/if_cdce.c strlcpy(ifp->if_xname, sc->cdce_dev.dv_xname, IFNAMSIZ);
sc 360 dev/usb/if_cdce.c sc->cdce_attached = 1;
sc 363 dev/usb/if_cdce.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->cdce_udev,
sc 364 dev/usb/if_cdce.c &sc->cdce_dev);
sc 370 dev/usb/if_cdce.c struct cdce_softc *sc = (struct cdce_softc *)self;
sc 371 dev/usb/if_cdce.c struct ifnet *ifp = GET_IFP(sc);
sc 376 dev/usb/if_cdce.c if (!sc->cdce_attached) {
sc 382 dev/usb/if_cdce.c cdce_stop(sc);
sc 388 dev/usb/if_cdce.c sc->cdce_attached = 0;
sc 397 dev/usb/if_cdce.c struct cdce_softc *sc = ifp->if_softc;
sc 400 dev/usb/if_cdce.c if (sc->cdce_dying || (ifp->if_flags & IFF_OACTIVE))
sc 407 dev/usb/if_cdce.c if (cdce_encap(sc, m_head, 0)) {
sc 425 dev/usb/if_cdce.c cdce_encap(struct cdce_softc *sc, struct mbuf *m, int idx)
sc 431 dev/usb/if_cdce.c c = &sc->cdce_cdata.cdce_tx_chain[idx];
sc 434 dev/usb/if_cdce.c if (sc->cdce_flags & CDCE_ZAURUS) {
sc 444 dev/usb/if_cdce.c usbd_setup_xfer(c->cdce_xfer, sc->cdce_bulkout_pipe, c, c->cdce_buf,
sc 449 dev/usb/if_cdce.c cdce_stop(sc);
sc 453 dev/usb/if_cdce.c sc->cdce_cdata.cdce_tx_cnt++;
sc 459 dev/usb/if_cdce.c cdce_stop(struct cdce_softc *sc)
sc 462 dev/usb/if_cdce.c struct ifnet *ifp = GET_IFP(sc);
sc 468 dev/usb/if_cdce.c if (sc->cdce_bulkin_pipe != NULL) {
sc 469 dev/usb/if_cdce.c err = usbd_abort_pipe(sc->cdce_bulkin_pipe);
sc 472 dev/usb/if_cdce.c sc->cdce_dev.dv_xname, usbd_errstr(err));
sc 473 dev/usb/if_cdce.c err = usbd_close_pipe(sc->cdce_bulkin_pipe);
sc 476 dev/usb/if_cdce.c sc->cdce_dev.dv_xname, usbd_errstr(err));
sc 477 dev/usb/if_cdce.c sc->cdce_bulkin_pipe = NULL;
sc 480 dev/usb/if_cdce.c if (sc->cdce_bulkout_pipe != NULL) {
sc 481 dev/usb/if_cdce.c err = usbd_abort_pipe(sc->cdce_bulkout_pipe);
sc 484 dev/usb/if_cdce.c sc->cdce_dev.dv_xname, usbd_errstr(err));
sc 485 dev/usb/if_cdce.c err = usbd_close_pipe(sc->cdce_bulkout_pipe);
sc 488 dev/usb/if_cdce.c sc->cdce_dev.dv_xname, usbd_errstr(err));
sc 489 dev/usb/if_cdce.c sc->cdce_bulkout_pipe = NULL;
sc 492 dev/usb/if_cdce.c if (sc->cdce_intr_pipe != NULL) {
sc 493 dev/usb/if_cdce.c err = usbd_abort_pipe(sc->cdce_intr_pipe);
sc 496 dev/usb/if_cdce.c sc->cdce_dev.dv_xname, usbd_errstr(err));
sc 497 dev/usb/if_cdce.c err = usbd_close_pipe(sc->cdce_intr_pipe);
sc 500 dev/usb/if_cdce.c sc->cdce_dev.dv_xname, usbd_errstr(err));
sc 501 dev/usb/if_cdce.c sc->cdce_intr_pipe = NULL;
sc 505 dev/usb/if_cdce.c if (sc->cdce_cdata.cdce_rx_chain[i].cdce_mbuf != NULL) {
sc 506 dev/usb/if_cdce.c m_freem(sc->cdce_cdata.cdce_rx_chain[i].cdce_mbuf);
sc 507 dev/usb/if_cdce.c sc->cdce_cdata.cdce_rx_chain[i].cdce_mbuf = NULL;
sc 509 dev/usb/if_cdce.c if (sc->cdce_cdata.cdce_rx_chain[i].cdce_xfer != NULL) {
sc 510 dev/usb/if_cdce.c usbd_free_xfer(sc->cdce_cdata.cdce_rx_chain[i].cdce_xfer);
sc 511 dev/usb/if_cdce.c sc->cdce_cdata.cdce_rx_chain[i].cdce_xfer = NULL;
sc 516 dev/usb/if_cdce.c if (sc->cdce_cdata.cdce_tx_chain[i].cdce_mbuf != NULL) {
sc 517 dev/usb/if_cdce.c m_freem(sc->cdce_cdata.cdce_tx_chain[i].cdce_mbuf);
sc 518 dev/usb/if_cdce.c sc->cdce_cdata.cdce_tx_chain[i].cdce_mbuf = NULL;
sc 520 dev/usb/if_cdce.c if (sc->cdce_cdata.cdce_tx_chain[i].cdce_xfer != NULL) {
sc 521 dev/usb/if_cdce.c usbd_free_xfer(sc->cdce_cdata.cdce_tx_chain[i].cdce_xfer);
sc 522 dev/usb/if_cdce.c sc->cdce_cdata.cdce_tx_chain[i].cdce_xfer = NULL;
sc 530 dev/usb/if_cdce.c struct cdce_softc *sc = ifp->if_softc;
sc 535 dev/usb/if_cdce.c if (sc->cdce_dying)
sc 543 dev/usb/if_cdce.c cdce_init(sc);
sc 546 dev/usb/if_cdce.c arp_ifinit(&sc->cdce_arpcom, ifa);
sc 561 dev/usb/if_cdce.c cdce_init(sc);
sc 564 dev/usb/if_cdce.c cdce_stop(sc);
sc 572 dev/usb/if_cdce.c ether_addmulti(ifr, &sc->cdce_arpcom) :
sc 573 dev/usb/if_cdce.c ether_delmulti(ifr, &sc->cdce_arpcom);
sc 592 dev/usb/if_cdce.c struct cdce_softc *sc = ifp->if_softc;
sc 594 dev/usb/if_cdce.c if (sc->cdce_dying)
sc 598 dev/usb/if_cdce.c printf("%s: watchdog timeout\n", sc->cdce_dev.dv_xname);
sc 604 dev/usb/if_cdce.c struct cdce_softc *sc = xsc;
sc 605 dev/usb/if_cdce.c struct ifnet *ifp = GET_IFP(sc);
sc 615 dev/usb/if_cdce.c if (sc->cdce_intr_no != -1 && sc->cdce_intr_pipe == NULL) {
sc 617 dev/usb/if_cdce.c err = usbd_open_pipe_intr(sc->cdce_ctl_iface, sc->cdce_intr_no,
sc 618 dev/usb/if_cdce.c USBD_SHORT_XFER_OK, &sc->cdce_intr_pipe, sc,
sc 619 dev/usb/if_cdce.c &sc->cdce_intr_buf, sc->cdce_intr_size, cdce_intr,
sc 623 dev/usb/if_cdce.c sc->cdce_dev.dv_xname, usbd_errstr(err));
sc 629 dev/usb/if_cdce.c if (cdce_tx_list_init(sc) == ENOBUFS) {
sc 630 dev/usb/if_cdce.c printf("%s: tx list init failed\n", sc->cdce_dev.dv_xname);
sc 635 dev/usb/if_cdce.c if (cdce_rx_list_init(sc) == ENOBUFS) {
sc 636 dev/usb/if_cdce.c printf("%s: rx list init failed\n", sc->cdce_dev.dv_xname);
sc 643 dev/usb/if_cdce.c err = usbd_open_pipe(sc->cdce_data_iface, sc->cdce_bulkin_no,
sc 644 dev/usb/if_cdce.c USBD_EXCLUSIVE_USE, &sc->cdce_bulkin_pipe);
sc 646 dev/usb/if_cdce.c printf("%s: open rx pipe failed: %s\n", sc->cdce_dev.dv_xname,
sc 652 dev/usb/if_cdce.c err = usbd_open_pipe(sc->cdce_data_iface, sc->cdce_bulkout_no,
sc 653 dev/usb/if_cdce.c USBD_EXCLUSIVE_USE, &sc->cdce_bulkout_pipe);
sc 655 dev/usb/if_cdce.c printf("%s: open tx pipe failed: %s\n", sc->cdce_dev.dv_xname,
sc 662 dev/usb/if_cdce.c c = &sc->cdce_cdata.cdce_rx_chain[i];
sc 663 dev/usb/if_cdce.c usbd_setup_xfer(c->cdce_xfer, sc->cdce_bulkin_pipe, c,
sc 676 dev/usb/if_cdce.c cdce_newbuf(struct cdce_softc *sc, struct cdce_chain *c, struct mbuf *m)
sc 684 dev/usb/if_cdce.c "-- packet dropped!\n", sc->cdce_dev.dv_xname);
sc 690 dev/usb/if_cdce.c "-- packet dropped!\n", sc->cdce_dev.dv_xname);
sc 707 dev/usb/if_cdce.c cdce_rx_list_init(struct cdce_softc *sc)
sc 713 dev/usb/if_cdce.c cd = &sc->cdce_cdata;
sc 716 dev/usb/if_cdce.c c->cdce_sc = sc;
sc 718 dev/usb/if_cdce.c if (cdce_newbuf(sc, c, NULL) == ENOBUFS)
sc 721 dev/usb/if_cdce.c c->cdce_xfer = usbd_alloc_xfer(sc->cdce_udev);
sc 734 dev/usb/if_cdce.c cdce_tx_list_init(struct cdce_softc *sc)
sc 740 dev/usb/if_cdce.c cd = &sc->cdce_cdata;
sc 743 dev/usb/if_cdce.c c->cdce_sc = sc;
sc 747 dev/usb/if_cdce.c c->cdce_xfer = usbd_alloc_xfer(sc->cdce_udev);
sc 763 dev/usb/if_cdce.c struct cdce_softc *sc = c->cdce_sc;
sc 764 dev/usb/if_cdce.c struct ifnet *ifp = GET_IFP(sc);
sc 769 dev/usb/if_cdce.c if (sc->cdce_dying || !(ifp->if_flags & IFF_RUNNING))
sc 775 dev/usb/if_cdce.c if (sc->cdce_rxeof_errors == 0)
sc 777 dev/usb/if_cdce.c sc->cdce_dev.dv_xname, usbd_errstr(status));
sc 779 dev/usb/if_cdce.c usbd_clear_endpoint_stall_async(sc->cdce_bulkin_pipe);
sc 780 dev/usb/if_cdce.c DELAY(sc->cdce_rxeof_errors * 10000);
sc 781 dev/usb/if_cdce.c if (sc->cdce_rxeof_errors++ > 10) {
sc 783 dev/usb/if_cdce.c sc->cdce_dev.dv_xname);
sc 784 dev/usb/if_cdce.c sc->cdce_dying = 1;
sc 790 dev/usb/if_cdce.c sc->cdce_rxeof_errors = 0;
sc 793 dev/usb/if_cdce.c if (sc->cdce_flags & CDCE_ZAURUS)
sc 813 dev/usb/if_cdce.c if (cdce_newbuf(sc, c, NULL) == ENOBUFS) {
sc 830 dev/usb/if_cdce.c usbd_setup_xfer(c->cdce_xfer, sc->cdce_bulkin_pipe, c, c->cdce_buf,
sc 840 dev/usb/if_cdce.c struct cdce_softc *sc = c->cdce_sc;
sc 841 dev/usb/if_cdce.c struct ifnet *ifp = GET_IFP(sc);
sc 845 dev/usb/if_cdce.c if (sc->cdce_dying)
sc 859 dev/usb/if_cdce.c printf("%s: usb error on tx: %s\n", sc->cdce_dev.dv_xname,
sc 862 dev/usb/if_cdce.c usbd_clear_endpoint_stall_async(sc->cdce_bulkout_pipe);
sc 888 dev/usb/if_cdce.c struct cdce_softc *sc = (struct cdce_softc *)self;
sc 895 dev/usb/if_cdce.c sc->cdce_dying = 1;
sc 904 dev/usb/if_cdce.c struct cdce_softc *sc = addr;
sc 905 dev/usb/if_cdce.c usb_cdc_notification_t *buf = &sc->cdce_intr_buf;
sc 915 dev/usb/if_cdce.c usbd_clear_endpoint_stall_async(sc->cdce_intr_pipe);
sc 80 dev/usb/if_cdcef.c #define GET_IFP(sc) (&(sc)->sc_arpcom.ac_if)
sc 104 dev/usb/if_cdcef.c int cdcef_encap(struct cdcef_softc *sc, struct mbuf *m, int idx);
sc 127 dev/usb/if_cdcef.c #define DEVNAME(sc) ((sc)->sc_dev.bdev.dv_xname)
sc 142 dev/usb/if_cdcef.c struct cdcef_softc *sc = (struct cdcef_softc *)self;
sc 163 dev/usb/if_cdcef.c sc->sc_dev.methods = &cdcef_methods;
sc 166 dev/usb/if_cdcef.c timeout_set(&sc->start_to, cdcef_start_timeout, sc);
sc 171 dev/usb/if_cdcef.c err = usbf_add_config(dev, &sc->sc_config);
sc 173 dev/usb/if_cdcef.c printf("%s: usbf_add_config failed\n", DEVNAME(sc));
sc 176 dev/usb/if_cdcef.c err = usbf_add_interface(sc->sc_config, UICLASS_CDC,
sc 178 dev/usb/if_cdcef.c &sc->sc_iface);
sc 180 dev/usb/if_cdcef.c printf("%s: usbf_add_interface failed\n", DEVNAME(sc));
sc 184 dev/usb/if_cdcef.c err = usbf_add_endpoint(sc->sc_iface, UE_DIR_IN | 2, UE_BULK,
sc 185 dev/usb/if_cdcef.c 64, 16, &sc->sc_ep_in) ||
sc 186 dev/usb/if_cdcef.c usbf_add_endpoint(sc->sc_iface, UE_DIR_OUT | 1, UE_BULK,
sc 187 dev/usb/if_cdcef.c 64, 16, &sc->sc_ep_out);
sc 189 dev/usb/if_cdcef.c printf("%s: usbf_add_endpoint failed\n", DEVNAME(sc));
sc 198 dev/usb/if_cdcef.c udesc.bSlaveInterface[0] = usbf_interface_number(sc->sc_iface);
sc 199 dev/usb/if_cdcef.c err = usbf_add_config_desc(sc->sc_config,
sc 202 dev/usb/if_cdcef.c printf("%s: usbf_add_config_desc failed\n", DEVNAME(sc));
sc 209 dev/usb/if_cdcef.c err = usbf_end_config(sc->sc_config);
sc 211 dev/usb/if_cdcef.c printf("%s: usbf_end_config failed\n", DEVNAME(sc));
sc 216 dev/usb/if_cdcef.c sc->sc_xfer_in = usbf_alloc_xfer(dev);
sc 217 dev/usb/if_cdcef.c sc->sc_xfer_out = usbf_alloc_xfer(dev);
sc 218 dev/usb/if_cdcef.c sc->sc_buffer_in = usbf_alloc_buffer(sc->sc_xfer_in,
sc 220 dev/usb/if_cdcef.c sc->sc_buffer_out = usbf_alloc_buffer(sc->sc_xfer_out,
sc 222 dev/usb/if_cdcef.c if (sc->sc_buffer_in == NULL || sc->sc_buffer_out == NULL) {
sc 223 dev/usb/if_cdcef.c printf("%s: usbf_alloc_buffer failed\n", DEVNAME(sc));
sc 228 dev/usb/if_cdcef.c err = usbf_open_pipe(sc->sc_iface,
sc 229 dev/usb/if_cdcef.c usbf_endpoint_address(sc->sc_ep_out), &sc->sc_pipe_out) ||
sc 230 dev/usb/if_cdcef.c usbf_open_pipe(sc->sc_iface,
sc 231 dev/usb/if_cdcef.c usbf_endpoint_address(sc->sc_ep_in), &sc->sc_pipe_in);
sc 233 dev/usb/if_cdcef.c printf("%s: usbf_open_pipe failed\n", DEVNAME(sc));
sc 238 dev/usb/if_cdcef.c usbf_setup_xfer(sc->sc_xfer_out, sc->sc_pipe_out, sc,
sc 239 dev/usb/if_cdcef.c sc->sc_buffer_out, CDCEF_BUFSZ, USBD_SHORT_XFER_OK, 0, cdcef_rxeof);
sc 240 dev/usb/if_cdcef.c err = usbf_transfer(sc->sc_xfer_out);
sc 242 dev/usb/if_cdcef.c printf("%s: usbf_transfer failed\n", DEVNAME(sc));
sc 249 dev/usb/if_cdcef.c bcopy(&macaddr_hi, &sc->sc_arpcom.ac_enaddr[0], sizeof(u_int16_t));
sc 250 dev/usb/if_cdcef.c bcopy(&ticks, &sc->sc_arpcom.ac_enaddr[2], sizeof(u_int32_t));
sc 251 dev/usb/if_cdcef.c sc->sc_arpcom.ac_enaddr[5] = (u_int8_t)(sc->sc_unit);
sc 253 dev/usb/if_cdcef.c printf("%s: address %s\n", DEVNAME(sc),
sc 254 dev/usb/if_cdcef.c ether_sprintf(sc->sc_arpcom.ac_enaddr));
sc 256 dev/usb/if_cdcef.c ifp = GET_IFP(sc);
sc 257 dev/usb/if_cdcef.c ifp->if_softc = sc;
sc 262 dev/usb/if_cdcef.c strlcpy(ifp->if_xname, DEVNAME(sc), IFNAMSIZ);
sc 269 dev/usb/if_cdcef.c sc->sc_attached = 1;
sc 284 dev/usb/if_cdcef.c struct cdcef_softc *sc = ifp->if_softc;
sc 295 dev/usb/if_cdcef.c if (sc->sc_listening == 0 || m_head->m_pkthdr.len > CDCEF_BUFSZ) {
sc 305 dev/usb/if_cdcef.c if (cdcef_encap(sc, m_head, 0)) {
sc 326 dev/usb/if_cdcef.c struct cdcef_softc *sc = priv;
sc 327 dev/usb/if_cdcef.c struct ifnet *ifp = GET_IFP(sc);
sc 339 dev/usb/if_cdcef.c if (sc->sc_xmit_mbuf != NULL) {
sc 340 dev/usb/if_cdcef.c m_freem(sc->sc_xmit_mbuf);
sc 341 dev/usb/if_cdcef.c sc->sc_xmit_mbuf = NULL;
sc 350 dev/usb/if_cdcef.c timeout_add(&sc->start_to, 1); /* XXX */
sc 357 dev/usb/if_cdcef.c struct cdcef_softc *sc = v;
sc 358 dev/usb/if_cdcef.c struct ifnet *ifp = GET_IFP(sc);
sc 371 dev/usb/if_cdcef.c struct cdcef_softc *sc = priv;
sc 373 dev/usb/if_cdcef.c struct ifnet *ifp = GET_IFP(sc);
sc 387 dev/usb/if_cdcef.c if (sc->sc_rxeof_errors == 0)
sc 389 dev/usb/if_cdcef.c DEVNAME(sc), usbf_errstr(status));
sc 391 dev/usb/if_cdcef.c if (sc->sc_rxeof_errors++ > 10) {
sc 393 dev/usb/if_cdcef.c DEVNAME(sc));
sc 399 dev/usb/if_cdcef.c sc->sc_rxeof_errors = 0;
sc 402 dev/usb/if_cdcef.c if (sc->sc_listening == 0) {
sc 403 dev/usb/if_cdcef.c sc->sc_listening = 1;
sc 428 dev/usb/if_cdcef.c bcopy(sc->sc_buffer_out, mtod(m, char *), total_len);
sc 446 dev/usb/if_cdcef.c usbf_setup_xfer(xfer, sc->sc_pipe_out, sc, sc->sc_buffer_out,
sc 451 dev/usb/if_cdcef.c printf("%s: usbf_transfer failed\n", DEVNAME(sc));
sc 480 dev/usb/if_cdcef.c struct cdcef_softc *sc = ifp->if_softc;
sc 490 dev/usb/if_cdcef.c cdcef_init(sc);
sc 493 dev/usb/if_cdcef.c arp_ifinit(&sc->sc_arpcom, ifa);
sc 508 dev/usb/if_cdcef.c cdcef_init(sc);
sc 511 dev/usb/if_cdcef.c cdcef_stop(sc);
sc 519 dev/usb/if_cdcef.c ether_addmulti(ifr, &sc->sc_arpcom) :
sc 520 dev/usb/if_cdcef.c ether_delmulti(ifr, &sc->sc_arpcom);
sc 539 dev/usb/if_cdcef.c struct cdcef_softc *sc = ifp->if_softc;
sc 543 dev/usb/if_cdcef.c if (sc->sc_dying)
sc 548 dev/usb/if_cdcef.c printf("%s: watchdog timeout\n", DEVNAME(sc));
sc 555 dev/usb/if_cdcef.c usbf_abort_pipe(sc->sc_pipe_in); /* in is tx pipe */
sc 560 dev/usb/if_cdcef.c cdcef_init(struct cdcef_softc *sc)
sc 563 dev/usb/if_cdcef.c struct ifnet *ifp = GET_IFP(sc);
sc 575 dev/usb/if_cdcef.c cdcef_encap(struct cdcef_softc *sc, struct mbuf *m, int idx)
sc 579 dev/usb/if_cdcef.c m_copydata(m, 0, m->m_pkthdr.len, sc->sc_buffer_in);
sc 582 dev/usb/if_cdcef.c usbf_setup_xfer(sc->sc_xfer_in, sc->sc_pipe_in, sc, sc->sc_buffer_in,
sc 586 dev/usb/if_cdcef.c err = usbf_transfer(sc->sc_xfer_in);
sc 589 dev/usb/if_cdcef.c cdcef_stop(sc);
sc 592 dev/usb/if_cdcef.c sc->sc_xmit_mbuf = m;
sc 599 dev/usb/if_cdcef.c cdcef_stop(struct cdcef_softc *sc)
sc 601 dev/usb/if_cdcef.c struct ifnet *ifp = GET_IFP(sc);
sc 608 dev/usb/if_cdcef.c if (sc->sc_xmit_mbuf != NULL) {
sc 609 dev/usb/if_cdcef.c m_freem(sc->sc_xmit_mbuf);
sc 610 dev/usb/if_cdcef.c sc->sc_xmit_mbuf = NULL;
sc 71 dev/usb/if_cdcereg.h #define GET_IFP(sc) (&(sc)->cdce_arpcom.ac_if)
sc 157 dev/usb/if_cue.c #define CUE_SETBIT(sc, reg, x) \
sc 158 dev/usb/if_cue.c cue_csr_write_1(sc, reg, cue_csr_read_1(sc, reg) | (x))
sc 160 dev/usb/if_cue.c #define CUE_CLRBIT(sc, reg, x) \
sc 161 dev/usb/if_cue.c cue_csr_write_1(sc, reg, cue_csr_read_1(sc, reg) & ~(x))
sc 164 dev/usb/if_cue.c cue_csr_read_1(struct cue_softc *sc, int reg)
sc 170 dev/usb/if_cue.c if (sc->cue_dying)
sc 179 dev/usb/if_cue.c err = usbd_do_request(sc->cue_udev, &req, &val);
sc 183 dev/usb/if_cue.c sc->cue_dev.dv_xname, reg, usbd_errstr(err)));
sc 188 dev/usb/if_cue.c sc->cue_dev.dv_xname, reg, val));
sc 194 dev/usb/if_cue.c cue_csr_read_2(struct cue_softc *sc, int reg)
sc 200 dev/usb/if_cue.c if (sc->cue_dying)
sc 209 dev/usb/if_cue.c err = usbd_do_request(sc->cue_udev, &req, &val);
sc 212 dev/usb/if_cue.c sc->cue_dev.dv_xname, reg, UGETW(val)));
sc 216 dev/usb/if_cue.c sc->cue_dev.dv_xname, reg, usbd_errstr(err)));
sc 224 dev/usb/if_cue.c cue_csr_write_1(struct cue_softc *sc, int reg, int val)
sc 229 dev/usb/if_cue.c if (sc->cue_dying)
sc 233 dev/usb/if_cue.c sc->cue_dev.dv_xname, reg, val));
sc 241 dev/usb/if_cue.c err = usbd_do_request(sc->cue_udev, &req, NULL);
sc 245 dev/usb/if_cue.c sc->cue_dev.dv_xname, reg, usbd_errstr(err)));
sc 250 dev/usb/if_cue.c sc->cue_dev.dv_xname, reg, cue_csr_read_1(sc, reg)));
sc 257 dev/usb/if_cue.c cue_csr_write_2(struct cue_softc *sc, int reg, int aval)
sc 264 dev/usb/if_cue.c if (sc->cue_dying)
sc 268 dev/usb/if_cue.c sc->cue_dev.dv_xname, reg, aval));
sc 277 dev/usb/if_cue.c err = usbd_do_request(sc->cue_udev, &req, NULL);
sc 281 dev/usb/if_cue.c sc->cue_dev.dv_xname, reg, usbd_errstr(err)));
sc 290 dev/usb/if_cue.c cue_mem(struct cue_softc *sc, int cmd, int addr, void *buf, int len)
sc 296 dev/usb/if_cue.c sc->cue_dev.dv_xname, cmd, addr, len));
sc 307 dev/usb/if_cue.c err = usbd_do_request(sc->cue_udev, &req, buf);
sc 311 dev/usb/if_cue.c sc->cue_dev.dv_xname, addr, usbd_errstr(err)));
sc 319 dev/usb/if_cue.c cue_getmac(struct cue_softc *sc, void *buf)
sc 324 dev/usb/if_cue.c DPRINTFN(10,("%s: cue_getmac\n", sc->cue_dev.dv_xname));
sc 332 dev/usb/if_cue.c err = usbd_do_request(sc->cue_udev, &req, buf);
sc 336 dev/usb/if_cue.c sc->cue_dev.dv_xname);
sc 346 dev/usb/if_cue.c cue_setmulti(struct cue_softc *sc)
sc 353 dev/usb/if_cue.c ifp = GET_IFP(sc);
sc 356 dev/usb/if_cue.c sc->cue_dev.dv_xname, ifp->if_flags));
sc 362 dev/usb/if_cue.c sc->cue_mctab[i] = 0xFF;
sc 363 dev/usb/if_cue.c cue_mem(sc, CUE_CMD_WRITESRAM, CUE_MCAST_TABLE_ADDR,
sc 364 dev/usb/if_cue.c &sc->cue_mctab, CUE_MCAST_TABLE_LEN);
sc 370 dev/usb/if_cue.c sc->cue_mctab[i] = 0;
sc 373 dev/usb/if_cue.c ETHER_FIRST_MULTI(step, &sc->arpcom, enm);
sc 381 dev/usb/if_cue.c sc->cue_mctab[h >> 3] |= 1 << (h & 0x7);
sc 394 dev/usb/if_cue.c sc->cue_mctab[h >> 3] |= 1 << (h & 0x7);
sc 397 dev/usb/if_cue.c cue_mem(sc, CUE_CMD_WRITESRAM, CUE_MCAST_TABLE_ADDR,
sc 398 dev/usb/if_cue.c &sc->cue_mctab, CUE_MCAST_TABLE_LEN);
sc 402 dev/usb/if_cue.c cue_reset(struct cue_softc *sc)
sc 407 dev/usb/if_cue.c DPRINTFN(2,("%s: cue_reset\n", sc->cue_dev.dv_xname));
sc 409 dev/usb/if_cue.c if (sc->cue_dying)
sc 418 dev/usb/if_cue.c err = usbd_do_request(sc->cue_udev, &req, NULL);
sc 421 dev/usb/if_cue.c printf("%s: reset failed\n", sc->cue_dev.dv_xname);
sc 424 dev/usb/if_cue.c usbd_delay_ms(sc->cue_udev, 1);
sc 449 dev/usb/if_cue.c struct cue_softc *sc = (struct cue_softc *)self;
sc 462 dev/usb/if_cue.c DPRINTFN(5,(" : cue_attach: sc=%p, dev=%p", sc, dev));
sc 465 dev/usb/if_cue.c printf("\n%s: %s\n", sc->cue_dev.dv_xname, devinfop);
sc 471 dev/usb/if_cue.c sc->cue_dev.dv_xname);
sc 475 dev/usb/if_cue.c sc->cue_udev = dev;
sc 476 dev/usb/if_cue.c sc->cue_product = uaa->product;
sc 477 dev/usb/if_cue.c sc->cue_vendor = uaa->vendor;
sc 479 dev/usb/if_cue.c usb_init_task(&sc->cue_tick_task, cue_tick_task, sc);
sc 480 dev/usb/if_cue.c usb_init_task(&sc->cue_stop_task, (void (*)(void *))cue_stop, sc);
sc 485 dev/usb/if_cue.c sc->cue_dev.dv_xname);
sc 489 dev/usb/if_cue.c sc->cue_iface = iface;
sc 497 dev/usb/if_cue.c sc->cue_dev.dv_xname, i);
sc 502 dev/usb/if_cue.c sc->cue_ed[CUE_ENDPT_RX] = ed->bEndpointAddress;
sc 505 dev/usb/if_cue.c sc->cue_ed[CUE_ENDPT_TX] = ed->bEndpointAddress;
sc 508 dev/usb/if_cue.c sc->cue_ed[CUE_ENDPT_INTR] = ed->bEndpointAddress;
sc 514 dev/usb/if_cue.c cue_reset(sc);
sc 519 dev/usb/if_cue.c cue_getmac(sc, &eaddr);
sc 526 dev/usb/if_cue.c printf("%s: address %s\n", sc->cue_dev.dv_xname,
sc 529 dev/usb/if_cue.c bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 532 dev/usb/if_cue.c ifp = GET_IFP(sc);
sc 533 dev/usb/if_cue.c ifp->if_softc = sc;
sc 538 dev/usb/if_cue.c strlcpy(ifp->if_xname, sc->cue_dev.dv_xname, IFNAMSIZ);
sc 546 dev/usb/if_cue.c timeout_set(&sc->cue_stat_ch, NULL, NULL);
sc 548 dev/usb/if_cue.c sc->cue_attached = 1;
sc 551 dev/usb/if_cue.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->cue_udev,
sc 552 dev/usb/if_cue.c &sc->cue_dev);
sc 558 dev/usb/if_cue.c struct cue_softc *sc = (struct cue_softc *)self;
sc 559 dev/usb/if_cue.c struct ifnet *ifp = GET_IFP(sc);
sc 562 dev/usb/if_cue.c DPRINTFN(2,("%s: %s: enter\n", sc->cue_dev.dv_xname, __func__));
sc 564 dev/usb/if_cue.c timeout_del(&sc->cue_stat_ch);
sc 569 dev/usb/if_cue.c usb_rem_task(sc->cue_udev, &sc->cue_tick_task);
sc 570 dev/usb/if_cue.c usb_rem_task(sc->cue_udev, &sc->cue_stop_task);
sc 572 dev/usb/if_cue.c if (!sc->cue_attached) {
sc 580 dev/usb/if_cue.c cue_stop(sc);
sc 587 dev/usb/if_cue.c if (sc->cue_ep[CUE_ENDPT_TX] != NULL ||
sc 588 dev/usb/if_cue.c sc->cue_ep[CUE_ENDPT_RX] != NULL ||
sc 589 dev/usb/if_cue.c sc->cue_ep[CUE_ENDPT_INTR] != NULL)
sc 591 dev/usb/if_cue.c sc->cue_dev.dv_xname);
sc 594 dev/usb/if_cue.c sc->cue_attached = 0;
sc 597 dev/usb/if_cue.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->cue_udev,
sc 598 dev/usb/if_cue.c &sc->cue_dev);
sc 606 dev/usb/if_cue.c struct cue_softc *sc = (struct cue_softc *)self;
sc 608 dev/usb/if_cue.c DPRINTFN(2,("%s: %s: enter\n", sc->cue_dev.dv_xname, __func__));
sc 615 dev/usb/if_cue.c sc->cue_dying = 1;
sc 625 dev/usb/if_cue.c cue_newbuf(struct cue_softc *sc, struct cue_chain *c, struct mbuf *m)
sc 633 dev/usb/if_cue.c "-- packet dropped!\n", sc->cue_dev.dv_xname);
sc 640 dev/usb/if_cue.c "-- packet dropped!\n", sc->cue_dev.dv_xname);
sc 658 dev/usb/if_cue.c cue_rx_list_init(struct cue_softc *sc)
sc 664 dev/usb/if_cue.c cd = &sc->cue_cdata;
sc 667 dev/usb/if_cue.c c->cue_sc = sc;
sc 669 dev/usb/if_cue.c if (cue_newbuf(sc, c, NULL) == ENOBUFS)
sc 672 dev/usb/if_cue.c c->cue_xfer = usbd_alloc_xfer(sc->cue_udev);
sc 687 dev/usb/if_cue.c cue_tx_list_init(struct cue_softc *sc)
sc 693 dev/usb/if_cue.c cd = &sc->cue_cdata;
sc 696 dev/usb/if_cue.c c->cue_sc = sc;
sc 700 dev/usb/if_cue.c c->cue_xfer = usbd_alloc_xfer(sc->cue_udev);
sc 722 dev/usb/if_cue.c struct cue_softc *sc = c->cue_sc;
sc 723 dev/usb/if_cue.c struct ifnet *ifp = GET_IFP(sc);
sc 729 dev/usb/if_cue.c DPRINTFN(10,("%s: %s: enter status=%d\n", sc->cue_dev.dv_xname,
sc 732 dev/usb/if_cue.c if (sc->cue_dying)
sc 741 dev/usb/if_cue.c sc->cue_rx_errs++;
sc 742 dev/usb/if_cue.c if (usbd_ratecheck(&sc->cue_rx_notice)) {
sc 744 dev/usb/if_cue.c sc->cue_dev.dv_xname, sc->cue_rx_errs,
sc 746 dev/usb/if_cue.c sc->cue_rx_errs = 0;
sc 749 dev/usb/if_cue.c usbd_clear_endpoint_stall_async(sc->cue_ep[CUE_ENDPT_RX]);
sc 777 dev/usb/if_cue.c if (cue_newbuf(sc, c, NULL) == ENOBUFS) {
sc 793 dev/usb/if_cue.c DPRINTFN(10,("%s: %s: deliver %d\n", sc->cue_dev.dv_xname,
sc 801 dev/usb/if_cue.c usbd_setup_xfer(c->cue_xfer, sc->cue_ep[CUE_ENDPT_RX],
sc 806 dev/usb/if_cue.c DPRINTFN(10,("%s: %s: start rx\n", sc->cue_dev.dv_xname,
sc 818 dev/usb/if_cue.c struct cue_softc *sc = c->cue_sc;
sc 819 dev/usb/if_cue.c struct ifnet *ifp = GET_IFP(sc);
sc 822 dev/usb/if_cue.c if (sc->cue_dying)
sc 827 dev/usb/if_cue.c DPRINTFN(10,("%s: %s: enter status=%d\n", sc->cue_dev.dv_xname,
sc 839 dev/usb/if_cue.c printf("%s: usb error on tx: %s\n", sc->cue_dev.dv_xname,
sc 842 dev/usb/if_cue.c usbd_clear_endpoint_stall_async(sc->cue_ep[CUE_ENDPT_TX]);
sc 861 dev/usb/if_cue.c struct cue_softc *sc = xsc;
sc 863 dev/usb/if_cue.c if (sc == NULL)
sc 866 dev/usb/if_cue.c if (sc->cue_dying)
sc 869 dev/usb/if_cue.c DPRINTFN(2,("%s: %s: enter\n", sc->cue_dev.dv_xname, __func__));
sc 872 dev/usb/if_cue.c usb_add_task(sc->cue_udev, &sc->cue_tick_task);
sc 878 dev/usb/if_cue.c struct cue_softc *sc = xsc;
sc 881 dev/usb/if_cue.c if (sc->cue_dying)
sc 884 dev/usb/if_cue.c DPRINTFN(2,("%s: %s: enter\n", sc->cue_dev.dv_xname, __func__));
sc 886 dev/usb/if_cue.c ifp = GET_IFP(sc);
sc 888 dev/usb/if_cue.c ifp->if_collisions += cue_csr_read_2(sc, CUE_TX_SINGLECOLL);
sc 889 dev/usb/if_cue.c ifp->if_collisions += cue_csr_read_2(sc, CUE_TX_MULTICOLL);
sc 890 dev/usb/if_cue.c ifp->if_collisions += cue_csr_read_2(sc, CUE_TX_EXCESSCOLL);
sc 892 dev/usb/if_cue.c if (cue_csr_read_2(sc, CUE_RX_FRAMEERR))
sc 897 dev/usb/if_cue.c cue_send(struct cue_softc *sc, struct mbuf *m, int idx)
sc 903 dev/usb/if_cue.c c = &sc->cue_cdata.cue_tx_chain[idx];
sc 915 dev/usb/if_cue.c sc->cue_dev.dv_xname, __func__, total_len));
sc 922 dev/usb/if_cue.c usbd_setup_xfer(c->cue_xfer, sc->cue_ep[CUE_ENDPT_TX],
sc 928 dev/usb/if_cue.c printf("%s: cue_send error=%s\n", sc->cue_dev.dv_xname,
sc 931 dev/usb/if_cue.c usb_add_task(sc->cue_udev, &sc->cue_stop_task);
sc 935 dev/usb/if_cue.c sc->cue_cdata.cue_tx_cnt++;
sc 943 dev/usb/if_cue.c struct cue_softc *sc = ifp->if_softc;
sc 946 dev/usb/if_cue.c if (sc->cue_dying)
sc 949 dev/usb/if_cue.c DPRINTFN(10,("%s: %s: enter\n", sc->cue_dev.dv_xname,__func__));
sc 958 dev/usb/if_cue.c if (cue_send(sc, m_head, 0)) {
sc 985 dev/usb/if_cue.c struct cue_softc *sc = xsc;
sc 986 dev/usb/if_cue.c struct ifnet *ifp = GET_IFP(sc);
sc 990 dev/usb/if_cue.c if (sc->cue_dying)
sc 993 dev/usb/if_cue.c DPRINTFN(10,("%s: %s: enter\n", sc->cue_dev.dv_xname,__func__));
sc 1004 dev/usb/if_cue.c cue_reset(sc);
sc 1008 dev/usb/if_cue.c cue_csr_write_1(sc, CUE_ADVANCED_OPMODES,
sc 1011 dev/usb/if_cue.c eaddr = sc->arpcom.ac_enaddr;
sc 1014 dev/usb/if_cue.c cue_csr_write_1(sc, CUE_PAR0 - i, eaddr[i]);
sc 1020 dev/usb/if_cue.c cue_csr_write_1(sc, CUE_ETHCTL, ctl);
sc 1023 dev/usb/if_cue.c if (cue_tx_list_init(sc) == ENOBUFS) {
sc 1024 dev/usb/if_cue.c printf("%s: tx list init failed\n", sc->cue_dev.dv_xname);
sc 1030 dev/usb/if_cue.c if (cue_rx_list_init(sc) == ENOBUFS) {
sc 1031 dev/usb/if_cue.c printf("%s: rx list init failed\n", sc->cue_dev.dv_xname);
sc 1037 dev/usb/if_cue.c cue_setmulti(sc);
sc 1043 dev/usb/if_cue.c cue_csr_write_1(sc, CUE_RX_BUFPKTS, CUE_RX_FRAMES);
sc 1044 dev/usb/if_cue.c cue_csr_write_1(sc, CUE_TX_BUFPKTS, CUE_TX_FRAMES);
sc 1047 dev/usb/if_cue.c cue_csr_write_1(sc, CUE_ADVANCED_OPMODES,
sc 1051 dev/usb/if_cue.c cue_csr_write_1(sc, CUE_LEDCTL, CUE_LEDCTL_FOLLOW_LINK);
sc 1053 dev/usb/if_cue.c if (sc->cue_ep[CUE_ENDPT_RX] == NULL) {
sc 1054 dev/usb/if_cue.c if (cue_open_pipes(sc)) {
sc 1065 dev/usb/if_cue.c timeout_del(&sc->cue_stat_ch);
sc 1066 dev/usb/if_cue.c timeout_set(&sc->cue_stat_ch, cue_tick, sc);
sc 1067 dev/usb/if_cue.c timeout_add(&sc->cue_stat_ch, hz);
sc 1071 dev/usb/if_cue.c cue_open_pipes(struct cue_softc *sc)
sc 1078 dev/usb/if_cue.c err = usbd_open_pipe(sc->cue_iface, sc->cue_ed[CUE_ENDPT_RX],
sc 1079 dev/usb/if_cue.c USBD_EXCLUSIVE_USE, &sc->cue_ep[CUE_ENDPT_RX]);
sc 1082 dev/usb/if_cue.c sc->cue_dev.dv_xname, usbd_errstr(err));
sc 1085 dev/usb/if_cue.c err = usbd_open_pipe(sc->cue_iface, sc->cue_ed[CUE_ENDPT_TX],
sc 1086 dev/usb/if_cue.c USBD_EXCLUSIVE_USE, &sc->cue_ep[CUE_ENDPT_TX]);
sc 1089 dev/usb/if_cue.c sc->cue_dev.dv_xname, usbd_errstr(err));
sc 1095 dev/usb/if_cue.c c = &sc->cue_cdata.cue_rx_chain[i];
sc 1096 dev/usb/if_cue.c usbd_setup_xfer(c->cue_xfer, sc->cue_ep[CUE_ENDPT_RX],
sc 1109 dev/usb/if_cue.c struct cue_softc *sc = ifp->if_softc;
sc 1114 dev/usb/if_cue.c if (sc->cue_dying)
sc 1122 dev/usb/if_cue.c cue_init(sc);
sc 1127 dev/usb/if_cue.c arp_ifinit(&sc->arpcom, ifa);
sc 1144 dev/usb/if_cue.c !(sc->cue_if_flags & IFF_PROMISC)) {
sc 1145 dev/usb/if_cue.c CUE_SETBIT(sc, CUE_ETHCTL, CUE_ETHCTL_PROMISC);
sc 1146 dev/usb/if_cue.c cue_setmulti(sc);
sc 1149 dev/usb/if_cue.c sc->cue_if_flags & IFF_PROMISC) {
sc 1150 dev/usb/if_cue.c CUE_CLRBIT(sc, CUE_ETHCTL, CUE_ETHCTL_PROMISC);
sc 1151 dev/usb/if_cue.c cue_setmulti(sc);
sc 1153 dev/usb/if_cue.c cue_init(sc);
sc 1156 dev/usb/if_cue.c cue_stop(sc);
sc 1158 dev/usb/if_cue.c sc->cue_if_flags = ifp->if_flags;
sc 1164 dev/usb/if_cue.c ether_addmulti(ifr, &sc->arpcom) :
sc 1165 dev/usb/if_cue.c ether_delmulti(ifr, &sc->arpcom);
sc 1173 dev/usb/if_cue.c cue_setmulti(sc);
sc 1190 dev/usb/if_cue.c struct cue_softc *sc = ifp->if_softc;
sc 1195 dev/usb/if_cue.c DPRINTFN(5,("%s: %s: enter\n", sc->cue_dev.dv_xname,__func__));
sc 1197 dev/usb/if_cue.c if (sc->cue_dying)
sc 1201 dev/usb/if_cue.c printf("%s: watchdog timeout\n", sc->cue_dev.dv_xname);
sc 1204 dev/usb/if_cue.c c = &sc->cue_cdata.cue_tx_chain[0];
sc 1218 dev/usb/if_cue.c cue_stop(struct cue_softc *sc)
sc 1224 dev/usb/if_cue.c DPRINTFN(10,("%s: %s: enter\n", sc->cue_dev.dv_xname,__func__));
sc 1226 dev/usb/if_cue.c ifp = GET_IFP(sc);
sc 1230 dev/usb/if_cue.c cue_csr_write_1(sc, CUE_ETHCTL, 0);
sc 1231 dev/usb/if_cue.c cue_reset(sc);
sc 1232 dev/usb/if_cue.c timeout_del(&sc->cue_stat_ch);
sc 1235 dev/usb/if_cue.c if (sc->cue_ep[CUE_ENDPT_RX] != NULL) {
sc 1236 dev/usb/if_cue.c err = usbd_abort_pipe(sc->cue_ep[CUE_ENDPT_RX]);
sc 1239 dev/usb/if_cue.c sc->cue_dev.dv_xname, usbd_errstr(err));
sc 1241 dev/usb/if_cue.c err = usbd_close_pipe(sc->cue_ep[CUE_ENDPT_RX]);
sc 1244 dev/usb/if_cue.c sc->cue_dev.dv_xname, usbd_errstr(err));
sc 1246 dev/usb/if_cue.c sc->cue_ep[CUE_ENDPT_RX] = NULL;
sc 1249 dev/usb/if_cue.c if (sc->cue_ep[CUE_ENDPT_TX] != NULL) {
sc 1250 dev/usb/if_cue.c err = usbd_abort_pipe(sc->cue_ep[CUE_ENDPT_TX]);
sc 1253 dev/usb/if_cue.c sc->cue_dev.dv_xname, usbd_errstr(err));
sc 1255 dev/usb/if_cue.c err = usbd_close_pipe(sc->cue_ep[CUE_ENDPT_TX]);
sc 1258 dev/usb/if_cue.c sc->cue_dev.dv_xname, usbd_errstr(err));
sc 1260 dev/usb/if_cue.c sc->cue_ep[CUE_ENDPT_TX] = NULL;
sc 1263 dev/usb/if_cue.c if (sc->cue_ep[CUE_ENDPT_INTR] != NULL) {
sc 1264 dev/usb/if_cue.c err = usbd_abort_pipe(sc->cue_ep[CUE_ENDPT_INTR]);
sc 1267 dev/usb/if_cue.c sc->cue_dev.dv_xname, usbd_errstr(err));
sc 1269 dev/usb/if_cue.c err = usbd_close_pipe(sc->cue_ep[CUE_ENDPT_INTR]);
sc 1272 dev/usb/if_cue.c sc->cue_dev.dv_xname, usbd_errstr(err));
sc 1274 dev/usb/if_cue.c sc->cue_ep[CUE_ENDPT_INTR] = NULL;
sc 1279 dev/usb/if_cue.c if (sc->cue_cdata.cue_rx_chain[i].cue_mbuf != NULL) {
sc 1280 dev/usb/if_cue.c m_freem(sc->cue_cdata.cue_rx_chain[i].cue_mbuf);
sc 1281 dev/usb/if_cue.c sc->cue_cdata.cue_rx_chain[i].cue_mbuf = NULL;
sc 1283 dev/usb/if_cue.c if (sc->cue_cdata.cue_rx_chain[i].cue_xfer != NULL) {
sc 1284 dev/usb/if_cue.c usbd_free_xfer(sc->cue_cdata.cue_rx_chain[i].cue_xfer);
sc 1285 dev/usb/if_cue.c sc->cue_cdata.cue_rx_chain[i].cue_xfer = NULL;
sc 1291 dev/usb/if_cue.c if (sc->cue_cdata.cue_tx_chain[i].cue_mbuf != NULL) {
sc 1292 dev/usb/if_cue.c m_freem(sc->cue_cdata.cue_tx_chain[i].cue_mbuf);
sc 1293 dev/usb/if_cue.c sc->cue_cdata.cue_tx_chain[i].cue_mbuf = NULL;
sc 1295 dev/usb/if_cue.c if (sc->cue_cdata.cue_tx_chain[i].cue_xfer != NULL) {
sc 1296 dev/usb/if_cue.c usbd_free_xfer(sc->cue_cdata.cue_tx_chain[i].cue_xfer);
sc 1297 dev/usb/if_cue.c sc->cue_cdata.cue_tx_chain[i].cue_xfer = NULL;
sc 171 dev/usb/if_cuereg.h #define GET_IFP(sc) (&(sc)->arpcom.ac_if)
sc 197 dev/usb/if_kue.c kue_setword(struct kue_softc *sc, u_int8_t breq, u_int16_t word)
sc 201 dev/usb/if_kue.c DPRINTFN(10,("%s: %s: enter\n", sc->kue_dev.dv_xname,__func__));
sc 209 dev/usb/if_kue.c return (usbd_do_request(sc->kue_udev, &req, NULL));
sc 213 dev/usb/if_kue.c kue_ctl(struct kue_softc *sc, int rw, u_int8_t breq, u_int16_t val,
sc 218 dev/usb/if_kue.c DPRINTFN(10,("%s: %s: enter, len=%d\n", sc->kue_dev.dv_xname,
sc 231 dev/usb/if_kue.c return (usbd_do_request(sc->kue_udev, &req, data));
sc 235 dev/usb/if_kue.c kue_load_fw(struct kue_softc *sc)
sc 243 dev/usb/if_kue.c DPRINTFN(1,("%s: %s: enter\n", sc->kue_dev.dv_xname, __func__));
sc 259 dev/usb/if_kue.c if (usbd_get_device_desc(sc->kue_udev, &dd))
sc 263 dev/usb/if_kue.c sc->kue_dev.dv_xname);
sc 270 dev/usb/if_kue.c sc->kue_dev.dv_xname, "kue", err);
sc 276 dev/usb/if_kue.c sc->kue_dev.dv_xname);
sc 280 dev/usb/if_kue.c sc->kue_dev.dv_xname));
sc 281 dev/usb/if_kue.c err = kue_ctl(sc, KUE_CTL_WRITE, KUE_CMD_SEND_SCAN,
sc 285 dev/usb/if_kue.c sc->kue_dev.dv_xname, usbd_errstr(err));
sc 292 dev/usb/if_kue.c sc->kue_dev.dv_xname));
sc 293 dev/usb/if_kue.c err = kue_ctl(sc, KUE_CTL_WRITE, KUE_CMD_SEND_SCAN,
sc 297 dev/usb/if_kue.c sc->kue_dev.dv_xname, usbd_errstr(err));
sc 304 dev/usb/if_kue.c sc->kue_dev.dv_xname));
sc 305 dev/usb/if_kue.c err = kue_ctl(sc, KUE_CTL_WRITE, KUE_CMD_SEND_SCAN,
sc 310 dev/usb/if_kue.c sc->kue_dev.dv_xname, usbd_errstr(err));
sc 316 dev/usb/if_kue.c usbd_delay_ms(sc->kue_udev, 10);
sc 326 dev/usb/if_kue.c (void)usbd_reload_device_desc(sc->kue_udev);
sc 328 dev/usb/if_kue.c DPRINTFN(1,("%s: %s: done\n", sc->kue_dev.dv_xname, __func__));
sc 331 dev/usb/if_kue.c kue_reset(sc);
sc 337 dev/usb/if_kue.c kue_setmulti(struct kue_softc *sc)
sc 339 dev/usb/if_kue.c struct ifnet *ifp = GET_IFP(sc);
sc 344 dev/usb/if_kue.c DPRINTFN(5,("%s: %s: enter\n", sc->kue_dev.dv_xname, __func__));
sc 349 dev/usb/if_kue.c sc->kue_rxfilt |= KUE_RXFILT_ALLMULTI;
sc 350 dev/usb/if_kue.c sc->kue_rxfilt &= ~KUE_RXFILT_MULTICAST;
sc 351 dev/usb/if_kue.c kue_setword(sc, KUE_CMD_SET_PKT_FILTER, sc->kue_rxfilt);
sc 355 dev/usb/if_kue.c sc->kue_rxfilt &= ~KUE_RXFILT_ALLMULTI;
sc 358 dev/usb/if_kue.c ETHER_FIRST_MULTI(step, &sc->arpcom, enm);
sc 360 dev/usb/if_kue.c if (i == KUE_MCFILTCNT(sc) ||
sc 365 dev/usb/if_kue.c memcpy(KUE_MCFILT(sc, i), enm->enm_addrlo, ETHER_ADDR_LEN);
sc 372 dev/usb/if_kue.c sc->kue_rxfilt |= KUE_RXFILT_MULTICAST;
sc 373 dev/usb/if_kue.c kue_ctl(sc, KUE_CTL_WRITE, KUE_CMD_SET_MCAST_FILTERS,
sc 374 dev/usb/if_kue.c i, sc->kue_mcfilters, i * ETHER_ADDR_LEN);
sc 376 dev/usb/if_kue.c kue_setword(sc, KUE_CMD_SET_PKT_FILTER, sc->kue_rxfilt);
sc 385 dev/usb/if_kue.c kue_reset(struct kue_softc *sc)
sc 387 dev/usb/if_kue.c DPRINTFN(5,("%s: %s: enter\n", sc->kue_dev.dv_xname, __func__));
sc 389 dev/usb/if_kue.c if (usbd_set_config_no(sc->kue_udev, KUE_CONFIG_NO, 1) ||
sc 390 dev/usb/if_kue.c usbd_device2interface_handle(sc->kue_udev, KUE_IFACE_IDX,
sc 391 dev/usb/if_kue.c &sc->kue_iface))
sc 392 dev/usb/if_kue.c printf("%s: reset failed\n", sc->kue_dev.dv_xname);
sc 395 dev/usb/if_kue.c usbd_delay_ms(sc->kue_udev, 10);
sc 418 dev/usb/if_kue.c struct kue_softc *sc = xsc;
sc 421 dev/usb/if_kue.c usbd_device_handle dev = sc->kue_udev;
sc 429 dev/usb/if_kue.c if (kue_load_fw(sc)) {
sc 431 dev/usb/if_kue.c sc->kue_dev.dv_xname);
sc 438 dev/usb/if_kue.c sc->kue_dev.dv_xname);
sc 442 dev/usb/if_kue.c sc->kue_iface = iface;
sc 450 dev/usb/if_kue.c sc->kue_dev.dv_xname, i);
sc 455 dev/usb/if_kue.c sc->kue_ed[KUE_ENDPT_RX] = ed->bEndpointAddress;
sc 458 dev/usb/if_kue.c sc->kue_ed[KUE_ENDPT_TX] = ed->bEndpointAddress;
sc 461 dev/usb/if_kue.c sc->kue_ed[KUE_ENDPT_INTR] = ed->bEndpointAddress;
sc 465 dev/usb/if_kue.c if (sc->kue_ed[KUE_ENDPT_RX] == 0 || sc->kue_ed[KUE_ENDPT_TX] == 0) {
sc 466 dev/usb/if_kue.c printf("%s: missing endpoint\n", sc->kue_dev.dv_xname);
sc 471 dev/usb/if_kue.c err = kue_ctl(sc, KUE_CTL_READ, KUE_CMD_GET_ETHER_DESCRIPTOR,
sc 472 dev/usb/if_kue.c 0, &sc->kue_desc, sizeof(sc->kue_desc));
sc 475 dev/usb/if_kue.c sc->kue_dev.dv_xname);
sc 479 dev/usb/if_kue.c sc->kue_mcfilters = malloc(KUE_MCFILTCNT(sc) * ETHER_ADDR_LEN,
sc 481 dev/usb/if_kue.c if (sc->kue_mcfilters == NULL) {
sc 483 dev/usb/if_kue.c sc->kue_dev.dv_xname);
sc 492 dev/usb/if_kue.c printf("%s: address %s\n", sc->kue_dev.dv_xname,
sc 493 dev/usb/if_kue.c ether_sprintf(sc->kue_desc.kue_macaddr));
sc 495 dev/usb/if_kue.c bcopy(sc->kue_desc.kue_macaddr,
sc 496 dev/usb/if_kue.c (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
sc 499 dev/usb/if_kue.c ifp = GET_IFP(sc);
sc 500 dev/usb/if_kue.c ifp->if_softc = sc;
sc 505 dev/usb/if_kue.c strlcpy(ifp->if_xname, sc->kue_dev.dv_xname, IFNAMSIZ);
sc 513 dev/usb/if_kue.c sc->kue_attached = 1;
sc 525 dev/usb/if_kue.c struct kue_softc *sc = (struct kue_softc *)self;
sc 531 dev/usb/if_kue.c DPRINTFN(5,(" : kue_attach: sc=%p, dev=%p", sc, dev));
sc 534 dev/usb/if_kue.c printf("\n%s: %s\n", sc->kue_dev.dv_xname, devinfop);
sc 540 dev/usb/if_kue.c sc->kue_dev.dv_xname);
sc 544 dev/usb/if_kue.c sc->kue_udev = dev;
sc 545 dev/usb/if_kue.c sc->kue_product = uaa->product;
sc 546 dev/usb/if_kue.c sc->kue_vendor = uaa->vendor;
sc 549 dev/usb/if_kue.c mountroothook_establish(kue_attachhook, sc);
sc 551 dev/usb/if_kue.c kue_attachhook(sc);
sc 553 dev/usb/if_kue.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->kue_udev,
sc 554 dev/usb/if_kue.c &sc->kue_dev);
sc 560 dev/usb/if_kue.c struct kue_softc *sc = (struct kue_softc *)self;
sc 561 dev/usb/if_kue.c struct ifnet *ifp = GET_IFP(sc);
sc 566 dev/usb/if_kue.c if (sc->kue_mcfilters != NULL) {
sc 567 dev/usb/if_kue.c free(sc->kue_mcfilters, M_USBDEV);
sc 568 dev/usb/if_kue.c sc->kue_mcfilters = NULL;
sc 571 dev/usb/if_kue.c if (!sc->kue_attached) {
sc 578 dev/usb/if_kue.c kue_stop(sc);
sc 585 dev/usb/if_kue.c if (sc->kue_ep[KUE_ENDPT_TX] != NULL ||
sc 586 dev/usb/if_kue.c sc->kue_ep[KUE_ENDPT_RX] != NULL ||
sc 587 dev/usb/if_kue.c sc->kue_ep[KUE_ENDPT_INTR] != NULL)
sc 589 dev/usb/if_kue.c sc->kue_dev.dv_xname);
sc 592 dev/usb/if_kue.c sc->kue_attached = 0;
sc 601 dev/usb/if_kue.c struct kue_softc *sc = (struct kue_softc *)self;
sc 603 dev/usb/if_kue.c DPRINTFN(2,("%s: %s: enter\n", sc->kue_dev.dv_xname, __func__));
sc 610 dev/usb/if_kue.c sc->kue_dying = 1;
sc 620 dev/usb/if_kue.c kue_newbuf(struct kue_softc *sc, struct kue_chain *c, struct mbuf *m)
sc 624 dev/usb/if_kue.c DPRINTFN(10,("%s: %s: enter\n", sc->kue_dev.dv_xname,__func__));
sc 630 dev/usb/if_kue.c "-- packet dropped!\n", sc->kue_dev.dv_xname);
sc 637 dev/usb/if_kue.c "-- packet dropped!\n", sc->kue_dev.dv_xname);
sc 654 dev/usb/if_kue.c kue_rx_list_init(struct kue_softc *sc)
sc 660 dev/usb/if_kue.c DPRINTFN(5,("%s: %s: enter\n", sc->kue_dev.dv_xname, __func__));
sc 662 dev/usb/if_kue.c cd = &sc->kue_cdata;
sc 665 dev/usb/if_kue.c c->kue_sc = sc;
sc 667 dev/usb/if_kue.c if (kue_newbuf(sc, c, NULL) == ENOBUFS)
sc 670 dev/usb/if_kue.c c->kue_xfer = usbd_alloc_xfer(sc->kue_udev);
sc 683 dev/usb/if_kue.c kue_tx_list_init(struct kue_softc *sc)
sc 689 dev/usb/if_kue.c DPRINTFN(5,("%s: %s: enter\n", sc->kue_dev.dv_xname, __func__));
sc 691 dev/usb/if_kue.c cd = &sc->kue_cdata;
sc 694 dev/usb/if_kue.c c->kue_sc = sc;
sc 698 dev/usb/if_kue.c c->kue_xfer = usbd_alloc_xfer(sc->kue_udev);
sc 718 dev/usb/if_kue.c struct kue_softc *sc = c->kue_sc;
sc 719 dev/usb/if_kue.c struct ifnet *ifp = GET_IFP(sc);
sc 724 dev/usb/if_kue.c DPRINTFN(10,("%s: %s: enter status=%d\n", sc->kue_dev.dv_xname,
sc 727 dev/usb/if_kue.c if (sc->kue_dying)
sc 736 dev/usb/if_kue.c sc->kue_rx_errs++;
sc 737 dev/usb/if_kue.c if (usbd_ratecheck(&sc->kue_rx_notice)) {
sc 739 dev/usb/if_kue.c sc->kue_dev.dv_xname, sc->kue_rx_errs,
sc 741 dev/usb/if_kue.c sc->kue_rx_errs = 0;
sc 744 dev/usb/if_kue.c usbd_clear_endpoint_stall_async(sc->kue_ep[KUE_ENDPT_RX]);
sc 750 dev/usb/if_kue.c DPRINTFN(10,("%s: %s: total_len=%d len=%d\n", sc->kue_dev.dv_xname,
sc 778 dev/usb/if_kue.c if (kue_newbuf(sc, c, NULL) == ENOBUFS) {
sc 794 dev/usb/if_kue.c DPRINTFN(10,("%s: %s: deliver %d\n", sc->kue_dev.dv_xname,
sc 803 dev/usb/if_kue.c usbd_setup_xfer(c->kue_xfer, sc->kue_ep[KUE_ENDPT_RX],
sc 808 dev/usb/if_kue.c DPRINTFN(10,("%s: %s: start rx\n", sc->kue_dev.dv_xname,
sc 821 dev/usb/if_kue.c struct kue_softc *sc = c->kue_sc;
sc 822 dev/usb/if_kue.c struct ifnet *ifp = GET_IFP(sc);
sc 825 dev/usb/if_kue.c if (sc->kue_dying)
sc 830 dev/usb/if_kue.c DPRINTFN(10,("%s: %s: enter status=%d\n", sc->kue_dev.dv_xname,
sc 842 dev/usb/if_kue.c printf("%s: usb error on tx: %s\n", sc->kue_dev.dv_xname,
sc 845 dev/usb/if_kue.c usbd_clear_endpoint_stall_async(sc->kue_ep[KUE_ENDPT_TX]);
sc 862 dev/usb/if_kue.c kue_send(struct kue_softc *sc, struct mbuf *m, int idx)
sc 868 dev/usb/if_kue.c DPRINTFN(10,("%s: %s: enter\n", sc->kue_dev.dv_xname,__func__));
sc 870 dev/usb/if_kue.c c = &sc->kue_cdata.kue_tx_chain[idx];
sc 887 dev/usb/if_kue.c usbd_setup_xfer(c->kue_xfer, sc->kue_ep[KUE_ENDPT_TX],
sc 894 dev/usb/if_kue.c printf("%s: kue_send error=%s\n", sc->kue_dev.dv_xname,
sc 896 dev/usb/if_kue.c kue_stop(sc);
sc 900 dev/usb/if_kue.c sc->kue_cdata.kue_tx_cnt++;
sc 908 dev/usb/if_kue.c struct kue_softc *sc = ifp->if_softc;
sc 911 dev/usb/if_kue.c DPRINTFN(10,("%s: %s: enter\n", sc->kue_dev.dv_xname,__func__));
sc 913 dev/usb/if_kue.c if (sc->kue_dying)
sc 923 dev/usb/if_kue.c if (kue_send(sc, m_head, 0)) {
sc 950 dev/usb/if_kue.c struct kue_softc *sc = xsc;
sc 951 dev/usb/if_kue.c struct ifnet *ifp = GET_IFP(sc);
sc 955 dev/usb/if_kue.c DPRINTFN(5,("%s: %s: enter\n", sc->kue_dev.dv_xname,__func__));
sc 962 dev/usb/if_kue.c eaddr = sc->arpcom.ac_enaddr;
sc 964 dev/usb/if_kue.c kue_ctl(sc, KUE_CTL_WRITE, KUE_CMD_SET_MAC, 0, eaddr, ETHER_ADDR_LEN);
sc 966 dev/usb/if_kue.c sc->kue_rxfilt = KUE_RXFILT_UNICAST | KUE_RXFILT_BROADCAST;
sc 970 dev/usb/if_kue.c sc->kue_rxfilt |= KUE_RXFILT_PROMISC;
sc 972 dev/usb/if_kue.c kue_setword(sc, KUE_CMD_SET_PKT_FILTER, sc->kue_rxfilt);
sc 980 dev/usb/if_kue.c kue_setword(sc, KUE_CMD_SET_SOFS, 1);
sc 982 dev/usb/if_kue.c kue_setword(sc, KUE_CMD_SET_URB_SIZE, 64);
sc 985 dev/usb/if_kue.c if (kue_tx_list_init(sc) == ENOBUFS) {
sc 986 dev/usb/if_kue.c printf("%s: tx list init failed\n", sc->kue_dev.dv_xname);
sc 992 dev/usb/if_kue.c if (kue_rx_list_init(sc) == ENOBUFS) {
sc 993 dev/usb/if_kue.c printf("%s: rx list init failed\n", sc->kue_dev.dv_xname);
sc 999 dev/usb/if_kue.c kue_setmulti(sc);
sc 1001 dev/usb/if_kue.c if (sc->kue_ep[KUE_ENDPT_RX] == NULL) {
sc 1002 dev/usb/if_kue.c if (kue_open_pipes(sc)) {
sc 1015 dev/usb/if_kue.c kue_open_pipes(struct kue_softc *sc)
sc 1021 dev/usb/if_kue.c DPRINTFN(5,("%s: %s: enter\n", sc->kue_dev.dv_xname,__func__));
sc 1024 dev/usb/if_kue.c err = usbd_open_pipe(sc->kue_iface, sc->kue_ed[KUE_ENDPT_RX],
sc 1025 dev/usb/if_kue.c USBD_EXCLUSIVE_USE, &sc->kue_ep[KUE_ENDPT_RX]);
sc 1028 dev/usb/if_kue.c sc->kue_dev.dv_xname, usbd_errstr(err));
sc 1032 dev/usb/if_kue.c err = usbd_open_pipe(sc->kue_iface, sc->kue_ed[KUE_ENDPT_TX],
sc 1033 dev/usb/if_kue.c USBD_EXCLUSIVE_USE, &sc->kue_ep[KUE_ENDPT_TX]);
sc 1036 dev/usb/if_kue.c sc->kue_dev.dv_xname, usbd_errstr(err));
sc 1042 dev/usb/if_kue.c c = &sc->kue_cdata.kue_rx_chain[i];
sc 1043 dev/usb/if_kue.c usbd_setup_xfer(c->kue_xfer, sc->kue_ep[KUE_ENDPT_RX],
sc 1047 dev/usb/if_kue.c DPRINTFN(5,("%s: %s: start read\n", sc->kue_dev.dv_xname,
sc 1058 dev/usb/if_kue.c struct kue_softc *sc = ifp->if_softc;
sc 1063 dev/usb/if_kue.c DPRINTFN(5,("%s: %s: enter\n", sc->kue_dev.dv_xname,__func__));
sc 1065 dev/usb/if_kue.c if (sc->kue_dying)
sc 1070 dev/usb/if_kue.c printf("%s: no proc!!\n", sc->kue_dev.dv_xname);
sc 1080 dev/usb/if_kue.c kue_init(sc);
sc 1085 dev/usb/if_kue.c arp_ifinit(&sc->arpcom, ifa);
sc 1102 dev/usb/if_kue.c !(sc->kue_if_flags & IFF_PROMISC)) {
sc 1103 dev/usb/if_kue.c sc->kue_rxfilt |= KUE_RXFILT_PROMISC;
sc 1104 dev/usb/if_kue.c kue_setword(sc, KUE_CMD_SET_PKT_FILTER,
sc 1105 dev/usb/if_kue.c sc->kue_rxfilt);
sc 1108 dev/usb/if_kue.c sc->kue_if_flags & IFF_PROMISC) {
sc 1109 dev/usb/if_kue.c sc->kue_rxfilt &= ~KUE_RXFILT_PROMISC;
sc 1110 dev/usb/if_kue.c kue_setword(sc, KUE_CMD_SET_PKT_FILTER,
sc 1111 dev/usb/if_kue.c sc->kue_rxfilt);
sc 1113 dev/usb/if_kue.c kue_init(sc);
sc 1116 dev/usb/if_kue.c kue_stop(sc);
sc 1118 dev/usb/if_kue.c sc->kue_if_flags = ifp->if_flags;
sc 1124 dev/usb/if_kue.c ether_addmulti(ifr, &sc->arpcom) :
sc 1125 dev/usb/if_kue.c ether_delmulti(ifr, &sc->arpcom);
sc 1133 dev/usb/if_kue.c kue_setmulti(sc);
sc 1150 dev/usb/if_kue.c struct kue_softc *sc = ifp->if_softc;
sc 1155 dev/usb/if_kue.c DPRINTFN(5,("%s: %s: enter\n", sc->kue_dev.dv_xname,__func__));
sc 1157 dev/usb/if_kue.c if (sc->kue_dying)
sc 1161 dev/usb/if_kue.c printf("%s: watchdog timeout\n", sc->kue_dev.dv_xname);
sc 1164 dev/usb/if_kue.c c = &sc->kue_cdata.kue_tx_chain[0];
sc 1178 dev/usb/if_kue.c kue_stop(struct kue_softc *sc)
sc 1184 dev/usb/if_kue.c DPRINTFN(5,("%s: %s: enter\n", sc->kue_dev.dv_xname,__func__));
sc 1186 dev/usb/if_kue.c ifp = GET_IFP(sc);
sc 1191 dev/usb/if_kue.c if (sc->kue_ep[KUE_ENDPT_RX] != NULL) {
sc 1192 dev/usb/if_kue.c err = usbd_abort_pipe(sc->kue_ep[KUE_ENDPT_RX]);
sc 1195 dev/usb/if_kue.c sc->kue_dev.dv_xname, usbd_errstr(err));
sc 1197 dev/usb/if_kue.c err = usbd_close_pipe(sc->kue_ep[KUE_ENDPT_RX]);
sc 1200 dev/usb/if_kue.c sc->kue_dev.dv_xname, usbd_errstr(err));
sc 1202 dev/usb/if_kue.c sc->kue_ep[KUE_ENDPT_RX] = NULL;
sc 1205 dev/usb/if_kue.c if (sc->kue_ep[KUE_ENDPT_TX] != NULL) {
sc 1206 dev/usb/if_kue.c err = usbd_abort_pipe(sc->kue_ep[KUE_ENDPT_TX]);
sc 1209 dev/usb/if_kue.c sc->kue_dev.dv_xname, usbd_errstr(err));
sc 1211 dev/usb/if_kue.c err = usbd_close_pipe(sc->kue_ep[KUE_ENDPT_TX]);
sc 1214 dev/usb/if_kue.c sc->kue_dev.dv_xname, usbd_errstr(err));
sc 1216 dev/usb/if_kue.c sc->kue_ep[KUE_ENDPT_TX] = NULL;
sc 1219 dev/usb/if_kue.c if (sc->kue_ep[KUE_ENDPT_INTR] != NULL) {
sc 1220 dev/usb/if_kue.c err = usbd_abort_pipe(sc->kue_ep[KUE_ENDPT_INTR]);
sc 1223 dev/usb/if_kue.c sc->kue_dev.dv_xname, usbd_errstr(err));
sc 1225 dev/usb/if_kue.c err = usbd_close_pipe(sc->kue_ep[KUE_ENDPT_INTR]);
sc 1228 dev/usb/if_kue.c sc->kue_dev.dv_xname, usbd_errstr(err));
sc 1230 dev/usb/if_kue.c sc->kue_ep[KUE_ENDPT_INTR] = NULL;
sc 1235 dev/usb/if_kue.c if (sc->kue_cdata.kue_rx_chain[i].kue_mbuf != NULL) {
sc 1236 dev/usb/if_kue.c m_freem(sc->kue_cdata.kue_rx_chain[i].kue_mbuf);
sc 1237 dev/usb/if_kue.c sc->kue_cdata.kue_rx_chain[i].kue_mbuf = NULL;
sc 1239 dev/usb/if_kue.c if (sc->kue_cdata.kue_rx_chain[i].kue_xfer != NULL) {
sc 1240 dev/usb/if_kue.c usbd_free_xfer(sc->kue_cdata.kue_rx_chain[i].kue_xfer);
sc 1241 dev/usb/if_kue.c sc->kue_cdata.kue_rx_chain[i].kue_xfer = NULL;
sc 1247 dev/usb/if_kue.c if (sc->kue_cdata.kue_tx_chain[i].kue_mbuf != NULL) {
sc 1248 dev/usb/if_kue.c m_freem(sc->kue_cdata.kue_tx_chain[i].kue_mbuf);
sc 1249 dev/usb/if_kue.c sc->kue_cdata.kue_tx_chain[i].kue_mbuf = NULL;
sc 1251 dev/usb/if_kue.c if (sc->kue_cdata.kue_tx_chain[i].kue_xfer != NULL) {
sc 1252 dev/usb/if_kue.c usbd_free_xfer(sc->kue_cdata.kue_tx_chain[i].kue_xfer);
sc 1253 dev/usb/if_kue.c sc->kue_cdata.kue_tx_chain[i].kue_xfer = NULL;
sc 83 dev/usb/if_kuereg.h (char *)&(sc->kue_mcfilters[y * ETHER_ADDR_LEN])
sc 170 dev/usb/if_kuereg.h #define GET_IFP(sc) (&(sc)->arpcom.ac_if)
sc 224 dev/usb/if_ral.c struct ural_softc *sc = (struct ural_softc *)self;
sc 226 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 234 dev/usb/if_ral.c sc->sc_udev = uaa->device;
sc 237 dev/usb/if_ral.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 240 dev/usb/if_ral.c if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) {
sc 242 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 247 dev/usb/if_ral.c error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX,
sc 248 dev/usb/if_ral.c &sc->sc_iface);
sc 251 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 258 dev/usb/if_ral.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 260 dev/usb/if_ral.c sc->sc_rx_no = sc->sc_tx_no = -1;
sc 262 dev/usb/if_ral.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 265 dev/usb/if_ral.c sc->sc_dev.dv_xname, i);
sc 271 dev/usb/if_ral.c sc->sc_rx_no = ed->bEndpointAddress;
sc 274 dev/usb/if_ral.c sc->sc_tx_no = ed->bEndpointAddress;
sc 276 dev/usb/if_ral.c if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) {
sc 277 dev/usb/if_ral.c printf("%s: missing endpoint\n", sc->sc_dev.dv_xname);
sc 281 dev/usb/if_ral.c usb_init_task(&sc->sc_task, ural_task, sc);
sc 282 dev/usb/if_ral.c timeout_set(&sc->scan_to, ural_next_scan, sc);
sc 284 dev/usb/if_ral.c sc->amrr.amrr_min_success_threshold = 1;
sc 285 dev/usb/if_ral.c sc->amrr.amrr_max_success_threshold = 10;
sc 286 dev/usb/if_ral.c timeout_set(&sc->amrr_to, ural_amrr_timeout, sc);
sc 289 dev/usb/if_ral.c sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
sc 292 dev/usb/if_ral.c ural_read_eeprom(sc);
sc 295 dev/usb/if_ral.c sc->sc_dev.dv_xname, sc->macbbp_rev, sc->asic_rev,
sc 296 dev/usb/if_ral.c ural_get_rf(sc->rf_rev), ether_sprintf(ic->ic_myaddr));
sc 325 dev/usb/if_ral.c ifp->if_softc = sc;
sc 332 dev/usb/if_ral.c memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 339 dev/usb/if_ral.c sc->sc_newstate = ic->ic_newstate;
sc 344 dev/usb/if_ral.c bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
sc 347 dev/usb/if_ral.c sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
sc 348 dev/usb/if_ral.c sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
sc 349 dev/usb/if_ral.c sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT);
sc 351 dev/usb/if_ral.c sc->sc_txtap_len = sizeof sc->sc_txtapu;
sc 352 dev/usb/if_ral.c sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
sc 353 dev/usb/if_ral.c sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT);
sc 356 dev/usb/if_ral.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 357 dev/usb/if_ral.c &sc->sc_dev);
sc 363 dev/usb/if_ral.c struct ural_softc *sc = (struct ural_softc *)self;
sc 364 dev/usb/if_ral.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 372 dev/usb/if_ral.c usb_rem_task(sc->sc_udev, &sc->sc_task);
sc 373 dev/usb/if_ral.c timeout_del(&sc->scan_to);
sc 374 dev/usb/if_ral.c timeout_del(&sc->amrr_to);
sc 376 dev/usb/if_ral.c if (sc->amrr_xfer != NULL) {
sc 377 dev/usb/if_ral.c usbd_free_xfer(sc->amrr_xfer);
sc 378 dev/usb/if_ral.c sc->amrr_xfer = NULL;
sc 381 dev/usb/if_ral.c if (sc->sc_rx_pipeh != NULL) {
sc 382 dev/usb/if_ral.c usbd_abort_pipe(sc->sc_rx_pipeh);
sc 383 dev/usb/if_ral.c usbd_close_pipe(sc->sc_rx_pipeh);
sc 386 dev/usb/if_ral.c if (sc->sc_tx_pipeh != NULL) {
sc 387 dev/usb/if_ral.c usbd_abort_pipe(sc->sc_tx_pipeh);
sc 388 dev/usb/if_ral.c usbd_close_pipe(sc->sc_tx_pipeh);
sc 391 dev/usb/if_ral.c ural_free_rx_list(sc);
sc 392 dev/usb/if_ral.c ural_free_tx_list(sc);
sc 396 dev/usb/if_ral.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 397 dev/usb/if_ral.c &sc->sc_dev);
sc 403 dev/usb/if_ral.c ural_alloc_tx_list(struct ural_softc *sc)
sc 407 dev/usb/if_ral.c sc->tx_cur = sc->tx_queued = 0;
sc 410 dev/usb/if_ral.c struct ural_tx_data *data = &sc->tx_data[i];
sc 412 dev/usb/if_ral.c data->sc = sc;
sc 414 dev/usb/if_ral.c data->xfer = usbd_alloc_xfer(sc->sc_udev);
sc 417 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 425 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 433 dev/usb/if_ral.c fail: ural_free_tx_list(sc);
sc 438 dev/usb/if_ral.c ural_free_tx_list(struct ural_softc *sc)
sc 443 dev/usb/if_ral.c struct ural_tx_data *data = &sc->tx_data[i];
sc 458 dev/usb/if_ral.c ural_alloc_rx_list(struct ural_softc *sc)
sc 463 dev/usb/if_ral.c struct ural_rx_data *data = &sc->rx_data[i];
sc 465 dev/usb/if_ral.c data->sc = sc;
sc 467 dev/usb/if_ral.c data->xfer = usbd_alloc_xfer(sc->sc_udev);
sc 470 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 476 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 484 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 491 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 500 dev/usb/if_ral.c fail: ural_free_tx_list(sc);
sc 505 dev/usb/if_ral.c ural_free_rx_list(struct ural_softc *sc)
sc 510 dev/usb/if_ral.c struct ural_rx_data *data = &sc->rx_data[i];
sc 545 dev/usb/if_ral.c struct ural_softc *sc = arg;
sc 546 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 556 dev/usb/if_ral.c struct ural_softc *sc = arg;
sc 557 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 564 dev/usb/if_ral.c switch (sc->sc_state) {
sc 568 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR19, 0);
sc 571 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR20, 0);
sc 576 dev/usb/if_ral.c ural_set_chan(sc, ic->ic_bss->ni_chan);
sc 577 dev/usb/if_ral.c timeout_add(&sc->scan_to, hz / 5);
sc 581 dev/usb/if_ral.c ural_set_chan(sc, ic->ic_bss->ni_chan);
sc 585 dev/usb/if_ral.c ural_set_chan(sc, ic->ic_bss->ni_chan);
sc 589 dev/usb/if_ral.c ural_set_chan(sc, ic->ic_bss->ni_chan);
sc 594 dev/usb/if_ral.c ural_update_slot(sc);
sc 595 dev/usb/if_ral.c ural_set_txpreamble(sc);
sc 596 dev/usb/if_ral.c ural_set_basicrates(sc);
sc 597 dev/usb/if_ral.c ural_set_bssid(sc, ni->ni_bssid);
sc 605 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 609 dev/usb/if_ral.c if (ural_tx_bcn(sc, m, ni) != 0) {
sc 612 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 621 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR20, 1);
sc 624 dev/usb/if_ral.c ural_enable_tsf_sync(sc);
sc 632 dev/usb/if_ral.c ural_amrr_start(sc, ic->ic_bss);
sc 638 dev/usb/if_ral.c sc->sc_newstate(ic, sc->sc_state, sc->sc_arg);
sc 644 dev/usb/if_ral.c struct ural_softc *sc = ic->ic_if.if_softc;
sc 646 dev/usb/if_ral.c usb_rem_task(sc->sc_udev, &sc->sc_task);
sc 647 dev/usb/if_ral.c timeout_del(&sc->scan_to);
sc 648 dev/usb/if_ral.c timeout_del(&sc->amrr_to);
sc 651 dev/usb/if_ral.c sc->sc_state = nstate;
sc 652 dev/usb/if_ral.c sc->sc_arg = arg;
sc 653 dev/usb/if_ral.c usb_add_task(sc->sc_udev, &sc->sc_task);
sc 671 dev/usb/if_ral.c struct ural_softc *sc = data->sc;
sc 672 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 681 dev/usb/if_ral.c sc->sc_dev.dv_xname, usbd_errstr(status));
sc 684 dev/usb/if_ral.c usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh);
sc 695 dev/usb/if_ral.c sc->tx_queued--;
sc 700 dev/usb/if_ral.c sc->sc_tx_timer = 0;
sc 711 dev/usb/if_ral.c struct ural_softc *sc = data->sc;
sc 712 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 725 dev/usb/if_ral.c usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
sc 732 dev/usb/if_ral.c DPRINTF(("%s: xfer too short %d\n", sc->sc_dev.dv_xname,
sc 754 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 761 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 778 dev/usb/if_ral.c if (sc->sc_drvbpf != NULL) {
sc 780 dev/usb/if_ral.c struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
sc 786 dev/usb/if_ral.c tap->wr_antenna = sc->rx_ant;
sc 790 dev/usb/if_ral.c mb.m_len = sc->sc_rxtap_len;
sc 795 dev/usb/if_ral.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
sc 820 dev/usb/if_ral.c usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES,
sc 943 dev/usb/if_ral.c ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
sc 946 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 990 dev/usb/if_ral.c ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
sc 999 dev/usb/if_ral.c xfer = usbd_alloc_xfer(sc->sc_udev);
sc 1012 dev/usb/if_ral.c usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd,
sc 1024 dev/usb/if_ral.c ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP,
sc 1030 dev/usb/if_ral.c usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen,
sc 1040 dev/usb/if_ral.c ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
sc 1042 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 1114 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 1119 dev/usb/if_ral.c data = &sc->tx_data[sc->tx_cur];
sc 1127 dev/usb/if_ral.c ural_setup_tx_desc(sc, desc,
sc 1139 dev/usb/if_ral.c usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
sc 1148 dev/usb/if_ral.c sc->tx_queued++;
sc 1149 dev/usb/if_ral.c sc->tx_cur = (sc->tx_cur + 1) % RAL_TX_LIST_COUNT;
sc 1154 dev/usb/if_ral.c data = &sc->tx_data[sc->tx_cur];
sc 1175 dev/usb/if_ral.c if (sc->sc_drvbpf != NULL) {
sc 1177 dev/usb/if_ral.c struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
sc 1183 dev/usb/if_ral.c tap->wt_antenna = sc->tx_ant;
sc 1186 dev/usb/if_ral.c mb.m_len = sc->sc_txtap_len;
sc 1191 dev/usb/if_ral.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 1196 dev/usb/if_ral.c ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate);
sc 1214 dev/usb/if_ral.c usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, xferlen,
sc 1220 dev/usb/if_ral.c sc->tx_queued++;
sc 1221 dev/usb/if_ral.c sc->tx_cur = (sc->tx_cur + 1) % RAL_TX_LIST_COUNT;
sc 1229 dev/usb/if_ral.c struct ural_softc *sc = ifp->if_softc;
sc 1230 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 1244 dev/usb/if_ral.c if (sc->tx_queued >= RAL_TX_LIST_COUNT - 1) {
sc 1256 dev/usb/if_ral.c if (ural_tx_data(sc, m0, ni) != 0)
sc 1265 dev/usb/if_ral.c if (sc->tx_queued >= RAL_TX_LIST_COUNT - 1) {
sc 1281 dev/usb/if_ral.c if (ural_tx_data(sc, m0, ni) != 0) {
sc 1289 dev/usb/if_ral.c sc->sc_tx_timer = 5;
sc 1297 dev/usb/if_ral.c struct ural_softc *sc = ifp->if_softc;
sc 1301 dev/usb/if_ral.c if (sc->sc_tx_timer > 0) {
sc 1302 dev/usb/if_ral.c if (--sc->sc_tx_timer == 0) {
sc 1303 dev/usb/if_ral.c printf("%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1317 dev/usb/if_ral.c struct ural_softc *sc = ifp->if_softc;
sc 1318 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 1337 dev/usb/if_ral.c ural_update_promisc(sc);
sc 1368 dev/usb/if_ral.c ural_set_chan(sc, ic->ic_ibss_chan);
sc 1390 dev/usb/if_ral.c ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
sc 1401 dev/usb/if_ral.c error = usbd_do_request(sc->sc_udev, &req, buf);
sc 1404 dev/usb/if_ral.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 1409 dev/usb/if_ral.c ural_read(struct ural_softc *sc, uint16_t reg)
sc 1421 dev/usb/if_ral.c error = usbd_do_request(sc->sc_udev, &req, &val);
sc 1424 dev/usb/if_ral.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 1431 dev/usb/if_ral.c ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
sc 1442 dev/usb/if_ral.c error = usbd_do_request(sc->sc_udev, &req, buf);
sc 1445 dev/usb/if_ral.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 1450 dev/usb/if_ral.c ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
sc 1461 dev/usb/if_ral.c error = usbd_do_request(sc->sc_udev, &req, NULL);
sc 1464 dev/usb/if_ral.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 1469 dev/usb/if_ral.c ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
sc 1480 dev/usb/if_ral.c error = usbd_do_request(sc->sc_udev, &req, buf);
sc 1483 dev/usb/if_ral.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 1488 dev/usb/if_ral.c ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
sc 1494 dev/usb/if_ral.c if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
sc 1498 dev/usb/if_ral.c printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname);
sc 1503 dev/usb/if_ral.c ural_write(sc, RAL_PHY_CSR7, tmp);
sc 1507 dev/usb/if_ral.c ural_bbp_read(struct ural_softc *sc, uint8_t reg)
sc 1513 dev/usb/if_ral.c ural_write(sc, RAL_PHY_CSR7, val);
sc 1516 dev/usb/if_ral.c if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
sc 1520 dev/usb/if_ral.c printf("%s: could not read BBP\n", sc->sc_dev.dv_xname);
sc 1523 dev/usb/if_ral.c return ural_read(sc, RAL_PHY_CSR7) & 0xff;
sc 1527 dev/usb/if_ral.c ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
sc 1533 dev/usb/if_ral.c if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
sc 1537 dev/usb/if_ral.c printf("%s: could not write to RF\n", sc->sc_dev.dv_xname);
sc 1542 dev/usb/if_ral.c ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff);
sc 1543 dev/usb/if_ral.c ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
sc 1546 dev/usb/if_ral.c sc->rf_regs[reg] = val;
sc 1552 dev/usb/if_ral.c ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
sc 1554 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 1562 dev/usb/if_ral.c power = min(sc->txpow[chan - 1], 31);
sc 1566 dev/usb/if_ral.c switch (sc->rf_rev) {
sc 1568 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF1, 0x00814);
sc 1569 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
sc 1570 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
sc 1574 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF1, 0x08804);
sc 1575 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
sc 1576 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
sc 1577 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
sc 1581 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF1, 0x0c808);
sc 1582 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
sc 1583 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
sc 1584 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
sc 1588 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF1, 0x08808);
sc 1589 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
sc 1590 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
sc 1591 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
sc 1593 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF1, 0x08808);
sc 1594 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
sc 1595 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
sc 1596 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
sc 1600 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF1, 0x08808);
sc 1601 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
sc 1602 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
sc 1603 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
sc 1607 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
sc 1608 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
sc 1609 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF1, 0x08804);
sc 1611 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
sc 1612 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
sc 1613 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
sc 1620 dev/usb/if_ral.c tmp = ural_bbp_read(sc, 70);
sc 1626 dev/usb/if_ral.c ural_bbp_write(sc, 70, tmp);
sc 1629 dev/usb/if_ral.c ural_read(sc, RAL_STA_CSR0);
sc 1632 dev/usb/if_ral.c ural_disable_rf_tune(sc);
sc 1640 dev/usb/if_ral.c ural_disable_rf_tune(struct ural_softc *sc)
sc 1644 dev/usb/if_ral.c if (sc->rf_rev != RAL_RF_2523) {
sc 1645 dev/usb/if_ral.c tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
sc 1646 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF1, tmp);
sc 1649 dev/usb/if_ral.c tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
sc 1650 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF3, tmp);
sc 1660 dev/usb/if_ral.c ural_enable_tsf_sync(struct ural_softc *sc)
sc 1662 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 1666 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR19, 0);
sc 1669 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR18, tmp);
sc 1674 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR20, tmp);
sc 1682 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR19, tmp);
sc 1688 dev/usb/if_ral.c ural_update_slot(struct ural_softc *sc)
sc 1690 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 1707 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR10, slottime);
sc 1708 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR11, sifs);
sc 1709 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR12, eifs);
sc 1713 dev/usb/if_ral.c ural_set_txpreamble(struct ural_softc *sc)
sc 1717 dev/usb/if_ral.c tmp = ural_read(sc, RAL_TXRX_CSR10);
sc 1720 dev/usb/if_ral.c if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
sc 1723 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR10, tmp);
sc 1727 dev/usb/if_ral.c ural_set_basicrates(struct ural_softc *sc)
sc 1729 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 1734 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR11, 0x3);
sc 1737 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR11, 0xf);
sc 1742 dev/usb/if_ral.c ural_set_bssid(struct ural_softc *sc, const uint8_t *bssid)
sc 1747 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR5, tmp);
sc 1750 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR6, tmp);
sc 1753 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR7, tmp);
sc 1759 dev/usb/if_ral.c ural_set_macaddr(struct ural_softc *sc, const uint8_t *addr)
sc 1764 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR2, tmp);
sc 1767 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR3, tmp);
sc 1770 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR4, tmp);
sc 1777 dev/usb/if_ral.c ural_update_promisc(struct ural_softc *sc)
sc 1779 dev/usb/if_ral.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1782 dev/usb/if_ral.c tmp = ural_read(sc, RAL_TXRX_CSR2);
sc 1788 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR2, tmp);
sc 1810 dev/usb/if_ral.c ural_read_eeprom(struct ural_softc *sc)
sc 1812 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 1816 dev/usb/if_ral.c ural_eeprom_read(sc, RAL_EEPROM_MACBBP, &val, 2);
sc 1817 dev/usb/if_ral.c sc->macbbp_rev = letoh16(val);
sc 1819 dev/usb/if_ral.c ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
sc 1821 dev/usb/if_ral.c sc->rf_rev = (val >> 11) & 0x7;
sc 1822 dev/usb/if_ral.c sc->hw_radio = (val >> 10) & 0x1;
sc 1823 dev/usb/if_ral.c sc->led_mode = (val >> 6) & 0x7;
sc 1824 dev/usb/if_ral.c sc->rx_ant = (val >> 4) & 0x3;
sc 1825 dev/usb/if_ral.c sc->tx_ant = (val >> 2) & 0x3;
sc 1826 dev/usb/if_ral.c sc->nb_ant = val & 0x3;
sc 1829 dev/usb/if_ral.c ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6);
sc 1832 dev/usb/if_ral.c ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
sc 1835 dev/usb/if_ral.c ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
sc 1839 dev/usb/if_ral.c ural_bbp_init(struct ural_softc *sc)
sc 1846 dev/usb/if_ral.c if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
sc 1851 dev/usb/if_ral.c printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname);
sc 1857 dev/usb/if_ral.c ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
sc 1862 dev/usb/if_ral.c if (sc->bbp_prom[i].reg == 0xff)
sc 1864 dev/usb/if_ral.c ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
sc 1873 dev/usb/if_ral.c ural_set_txantenna(struct ural_softc *sc, int antenna)
sc 1878 dev/usb/if_ral.c tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
sc 1887 dev/usb/if_ral.c if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
sc 1888 dev/usb/if_ral.c sc->rf_rev == RAL_RF_5222)
sc 1891 dev/usb/if_ral.c ural_bbp_write(sc, RAL_BBP_TX, tx);
sc 1894 dev/usb/if_ral.c tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
sc 1895 dev/usb/if_ral.c ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
sc 1897 dev/usb/if_ral.c tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
sc 1898 dev/usb/if_ral.c ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
sc 1902 dev/usb/if_ral.c ural_set_rxantenna(struct ural_softc *sc, int antenna)
sc 1906 dev/usb/if_ral.c rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
sc 1915 dev/usb/if_ral.c if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
sc 1918 dev/usb/if_ral.c ural_bbp_write(sc, RAL_BBP_RX, rx);
sc 1925 dev/usb/if_ral.c struct ural_softc *sc = ifp->if_softc;
sc 1926 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 1935 dev/usb/if_ral.c ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
sc 1939 dev/usb/if_ral.c tmp = ural_read(sc, RAL_MAC_CSR17);
sc 1947 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 1953 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
sc 1956 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR11, 0x153);
sc 1958 dev/usb/if_ral.c error = ural_bbp_init(sc);
sc 1964 dev/usb/if_ral.c ural_set_chan(sc, ic->ic_bss->ni_chan);
sc 1967 dev/usb/if_ral.c ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
sc 1970 dev/usb/if_ral.c ural_bbp_write(sc, 17, 0x48);
sc 1972 dev/usb/if_ral.c ural_set_txantenna(sc, 1);
sc 1973 dev/usb/if_ral.c ural_set_rxantenna(sc, 1);
sc 1976 dev/usb/if_ral.c ural_set_macaddr(sc, ic->ic_myaddr);
sc 1983 dev/usb/if_ral.c ural_write_multi(sc, RAL_SEC_CSR0 + i * IEEE80211_KEYBUF_SIZE,
sc 1990 dev/usb/if_ral.c sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev);
sc 1991 dev/usb/if_ral.c if (sc->amrr_xfer == NULL) {
sc 1993 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 2000 dev/usb/if_ral.c error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE,
sc 2001 dev/usb/if_ral.c &sc->sc_tx_pipeh);
sc 2004 dev/usb/if_ral.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 2007 dev/usb/if_ral.c error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE,
sc 2008 dev/usb/if_ral.c &sc->sc_rx_pipeh);
sc 2011 dev/usb/if_ral.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 2018 dev/usb/if_ral.c error = ural_alloc_tx_list(sc);
sc 2021 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 2024 dev/usb/if_ral.c error = ural_alloc_rx_list(sc);
sc 2027 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 2035 dev/usb/if_ral.c struct ural_rx_data *data = &sc->rx_data[i];
sc 2037 dev/usb/if_ral.c usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf,
sc 2042 dev/usb/if_ral.c sc->sc_dev.dv_xname);
sc 2056 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR2, tmp);
sc 2076 dev/usb/if_ral.c struct ural_softc *sc = ifp->if_softc;
sc 2077 dev/usb/if_ral.c struct ieee80211com *ic = &sc->sc_ic;
sc 2079 dev/usb/if_ral.c sc->sc_tx_timer = 0;
sc 2086 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
sc 2089 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
sc 2090 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR1, 0);
sc 2092 dev/usb/if_ral.c if (sc->amrr_xfer != NULL) {
sc 2093 dev/usb/if_ral.c usbd_free_xfer(sc->amrr_xfer);
sc 2094 dev/usb/if_ral.c sc->amrr_xfer = NULL;
sc 2096 dev/usb/if_ral.c if (sc->sc_rx_pipeh != NULL) {
sc 2097 dev/usb/if_ral.c usbd_abort_pipe(sc->sc_rx_pipeh);
sc 2098 dev/usb/if_ral.c usbd_close_pipe(sc->sc_rx_pipeh);
sc 2099 dev/usb/if_ral.c sc->sc_rx_pipeh = NULL;
sc 2101 dev/usb/if_ral.c if (sc->sc_tx_pipeh != NULL) {
sc 2102 dev/usb/if_ral.c usbd_abort_pipe(sc->sc_tx_pipeh);
sc 2103 dev/usb/if_ral.c usbd_close_pipe(sc->sc_tx_pipeh);
sc 2104 dev/usb/if_ral.c sc->sc_tx_pipeh = NULL;
sc 2107 dev/usb/if_ral.c ural_free_rx_list(sc);
sc 2108 dev/usb/if_ral.c ural_free_tx_list(sc);
sc 2119 dev/usb/if_ral.c ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni)
sc 2124 dev/usb/if_ral.c ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
sc 2126 dev/usb/if_ral.c ieee80211_amrr_node_init(&sc->amrr, &sc->amn);
sc 2134 dev/usb/if_ral.c timeout_add(&sc->amrr_to, hz);
sc 2140 dev/usb/if_ral.c struct ural_softc *sc = arg;
sc 2153 dev/usb/if_ral.c USETW(req.wLength, sizeof sc->sta);
sc 2155 dev/usb/if_ral.c usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc,
sc 2156 dev/usb/if_ral.c USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0,
sc 2158 dev/usb/if_ral.c (void)usbd_transfer(sc->amrr_xfer);
sc 2167 dev/usb/if_ral.c struct ural_softc *sc = (struct ural_softc *)priv;
sc 2168 dev/usb/if_ral.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 2172 dev/usb/if_ral.c "automatic rate control\n", sc->sc_dev.dv_xname);
sc 2177 dev/usb/if_ral.c ifp->if_oerrors += letoh16(sc->sta[9]);
sc 2179 dev/usb/if_ral.c sc->amn.amn_retrycnt =
sc 2180 dev/usb/if_ral.c letoh16(sc->sta[7]) + /* TX one-retry ok count */
sc 2181 dev/usb/if_ral.c letoh16(sc->sta[8]) + /* TX more-retry ok count */
sc 2182 dev/usb/if_ral.c letoh16(sc->sta[9]); /* TX retry-fail count */
sc 2184 dev/usb/if_ral.c sc->amn.amn_txcnt =
sc 2185 dev/usb/if_ral.c sc->amn.amn_retrycnt +
sc 2186 dev/usb/if_ral.c letoh16(sc->sta[6]); /* TX no-retry ok count */
sc 2188 dev/usb/if_ral.c ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn);
sc 2190 dev/usb/if_ral.c timeout_add(&sc->amrr_to, hz);
sc 58 dev/usb/if_ralvar.h struct ural_softc *sc;
sc 65 dev/usb/if_ralvar.h struct ural_softc *sc;
sc 242 dev/usb/if_rum.c struct rum_softc *sc = xsc;
sc 250 dev/usb/if_rum.c sc->sc_dev.dv_xname, name, error);
sc 254 dev/usb/if_rum.c if (rum_load_microcode(sc, ucode, size) != 0) {
sc 256 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 265 dev/usb/if_rum.c struct rum_softc *sc = (struct rum_softc *)self;
sc 267 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 276 dev/usb/if_rum.c sc->sc_udev = uaa->device;
sc 279 dev/usb/if_rum.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 282 dev/usb/if_rum.c if (usbd_set_config_no(sc->sc_udev, RT2573_CONFIG_NO, 0) != 0) {
sc 284 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 289 dev/usb/if_rum.c error = usbd_device2interface_handle(sc->sc_udev, RT2573_IFACE_INDEX,
sc 290 dev/usb/if_rum.c &sc->sc_iface);
sc 293 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 300 dev/usb/if_rum.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 302 dev/usb/if_rum.c sc->sc_rx_no = sc->sc_tx_no = -1;
sc 304 dev/usb/if_rum.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 307 dev/usb/if_rum.c sc->sc_dev.dv_xname, i);
sc 313 dev/usb/if_rum.c sc->sc_rx_no = ed->bEndpointAddress;
sc 316 dev/usb/if_rum.c sc->sc_tx_no = ed->bEndpointAddress;
sc 318 dev/usb/if_rum.c if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) {
sc 319 dev/usb/if_rum.c printf("%s: missing endpoint\n", sc->sc_dev.dv_xname);
sc 323 dev/usb/if_rum.c usb_init_task(&sc->sc_task, rum_task, sc);
sc 324 dev/usb/if_rum.c timeout_set(&sc->scan_to, rum_next_scan, sc);
sc 326 dev/usb/if_rum.c sc->amrr.amrr_min_success_threshold = 1;
sc 327 dev/usb/if_rum.c sc->amrr.amrr_max_success_threshold = 10;
sc 328 dev/usb/if_rum.c timeout_set(&sc->amrr_to, rum_amrr_timeout, sc);
sc 332 dev/usb/if_rum.c if ((tmp = rum_read(sc, RT2573_MAC_CSR0)) != 0)
sc 338 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 343 dev/usb/if_rum.c rum_read_eeprom(sc);
sc 346 dev/usb/if_rum.c sc->sc_dev.dv_xname, sc->macbbp_rev, tmp,
sc 347 dev/usb/if_rum.c rum_get_rf(sc->rf_rev), ether_sprintf(ic->ic_myaddr));
sc 350 dev/usb/if_rum.c mountroothook_establish(rum_attachhook, sc);
sc 352 dev/usb/if_rum.c rum_attachhook(sc);
sc 368 dev/usb/if_rum.c if (sc->rf_rev == RT2573_RF_5225 || sc->rf_rev == RT2573_RF_5226) {
sc 409 dev/usb/if_rum.c ifp->if_softc = sc;
sc 416 dev/usb/if_rum.c memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 423 dev/usb/if_rum.c sc->sc_newstate = ic->ic_newstate;
sc 428 dev/usb/if_rum.c bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
sc 431 dev/usb/if_rum.c sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
sc 432 dev/usb/if_rum.c sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
sc 433 dev/usb/if_rum.c sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2573_RX_RADIOTAP_PRESENT);
sc 435 dev/usb/if_rum.c sc->sc_txtap_len = sizeof sc->sc_txtapu;
sc 436 dev/usb/if_rum.c sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
sc 437 dev/usb/if_rum.c sc->sc_txtap.wt_ihdr.it_present = htole32(RT2573_TX_RADIOTAP_PRESENT);
sc 440 dev/usb/if_rum.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 441 dev/usb/if_rum.c &sc->sc_dev);
sc 447 dev/usb/if_rum.c struct rum_softc *sc = (struct rum_softc *)self;
sc 448 dev/usb/if_rum.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 456 dev/usb/if_rum.c usb_rem_task(sc->sc_udev, &sc->sc_task);
sc 457 dev/usb/if_rum.c timeout_del(&sc->scan_to);
sc 458 dev/usb/if_rum.c timeout_del(&sc->amrr_to);
sc 460 dev/usb/if_rum.c if (sc->amrr_xfer != NULL) {
sc 461 dev/usb/if_rum.c usbd_free_xfer(sc->amrr_xfer);
sc 462 dev/usb/if_rum.c sc->amrr_xfer = NULL;
sc 464 dev/usb/if_rum.c if (sc->sc_rx_pipeh != NULL) {
sc 465 dev/usb/if_rum.c usbd_abort_pipe(sc->sc_rx_pipeh);
sc 466 dev/usb/if_rum.c usbd_close_pipe(sc->sc_rx_pipeh);
sc 468 dev/usb/if_rum.c if (sc->sc_tx_pipeh != NULL) {
sc 469 dev/usb/if_rum.c usbd_abort_pipe(sc->sc_tx_pipeh);
sc 470 dev/usb/if_rum.c usbd_close_pipe(sc->sc_tx_pipeh);
sc 473 dev/usb/if_rum.c rum_free_rx_list(sc);
sc 474 dev/usb/if_rum.c rum_free_tx_list(sc);
sc 478 dev/usb/if_rum.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 479 dev/usb/if_rum.c &sc->sc_dev);
sc 485 dev/usb/if_rum.c rum_alloc_tx_list(struct rum_softc *sc)
sc 489 dev/usb/if_rum.c sc->tx_cur = sc->tx_queued = 0;
sc 492 dev/usb/if_rum.c struct rum_tx_data *data = &sc->tx_data[i];
sc 494 dev/usb/if_rum.c data->sc = sc;
sc 496 dev/usb/if_rum.c data->xfer = usbd_alloc_xfer(sc->sc_udev);
sc 499 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 507 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 517 dev/usb/if_rum.c fail: rum_free_tx_list(sc);
sc 522 dev/usb/if_rum.c rum_free_tx_list(struct rum_softc *sc)
sc 527 dev/usb/if_rum.c struct rum_tx_data *data = &sc->tx_data[i];
sc 542 dev/usb/if_rum.c rum_alloc_rx_list(struct rum_softc *sc)
sc 547 dev/usb/if_rum.c struct rum_rx_data *data = &sc->rx_data[i];
sc 549 dev/usb/if_rum.c data->sc = sc;
sc 551 dev/usb/if_rum.c data->xfer = usbd_alloc_xfer(sc->sc_udev);
sc 554 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 560 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 568 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 575 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 584 dev/usb/if_rum.c fail: rum_free_tx_list(sc);
sc 589 dev/usb/if_rum.c rum_free_rx_list(struct rum_softc *sc)
sc 594 dev/usb/if_rum.c struct rum_rx_data *data = &sc->rx_data[i];
sc 629 dev/usb/if_rum.c struct rum_softc *sc = arg;
sc 630 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 640 dev/usb/if_rum.c struct rum_softc *sc = arg;
sc 641 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 648 dev/usb/if_rum.c switch (sc->sc_state) {
sc 652 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR9);
sc 653 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR9, tmp & ~0x00ffffff);
sc 658 dev/usb/if_rum.c rum_set_chan(sc, ic->ic_bss->ni_chan);
sc 659 dev/usb/if_rum.c timeout_add(&sc->scan_to, hz / 5);
sc 663 dev/usb/if_rum.c rum_set_chan(sc, ic->ic_bss->ni_chan);
sc 667 dev/usb/if_rum.c rum_set_chan(sc, ic->ic_bss->ni_chan);
sc 671 dev/usb/if_rum.c rum_set_chan(sc, ic->ic_bss->ni_chan);
sc 676 dev/usb/if_rum.c rum_update_slot(sc);
sc 677 dev/usb/if_rum.c rum_enable_mrr(sc);
sc 678 dev/usb/if_rum.c rum_set_txpreamble(sc);
sc 679 dev/usb/if_rum.c rum_set_basicrates(sc);
sc 680 dev/usb/if_rum.c rum_set_bssid(sc, ni->ni_bssid);
sc 685 dev/usb/if_rum.c rum_prepare_beacon(sc);
sc 688 dev/usb/if_rum.c rum_enable_tsf_sync(sc);
sc 696 dev/usb/if_rum.c rum_amrr_start(sc, ni);
sc 701 dev/usb/if_rum.c sc->sc_newstate(ic, sc->sc_state, sc->sc_arg);
sc 707 dev/usb/if_rum.c struct rum_softc *sc = ic->ic_if.if_softc;
sc 709 dev/usb/if_rum.c usb_rem_task(sc->sc_udev, &sc->sc_task);
sc 710 dev/usb/if_rum.c timeout_del(&sc->scan_to);
sc 711 dev/usb/if_rum.c timeout_del(&sc->amrr_to);
sc 714 dev/usb/if_rum.c sc->sc_state = nstate;
sc 715 dev/usb/if_rum.c sc->sc_arg = arg;
sc 716 dev/usb/if_rum.c usb_add_task(sc->sc_udev, &sc->sc_task);
sc 730 dev/usb/if_rum.c struct rum_softc *sc = data->sc;
sc 731 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 740 dev/usb/if_rum.c sc->sc_dev.dv_xname, usbd_errstr(status));
sc 743 dev/usb/if_rum.c usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh);
sc 754 dev/usb/if_rum.c sc->tx_queued--;
sc 759 dev/usb/if_rum.c sc->sc_tx_timer = 0;
sc 770 dev/usb/if_rum.c struct rum_softc *sc = data->sc;
sc 771 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 784 dev/usb/if_rum.c usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh);
sc 791 dev/usb/if_rum.c DPRINTF(("%s: xfer too short %d\n", sc->sc_dev.dv_xname,
sc 812 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 819 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 836 dev/usb/if_rum.c if (sc->sc_drvbpf != NULL) {
sc 838 dev/usb/if_rum.c struct rum_rx_radiotap_header *tap = &sc->sc_rxtap;
sc 844 dev/usb/if_rum.c tap->wr_antenna = sc->rx_ant;
sc 848 dev/usb/if_rum.c mb.m_len = sc->sc_rxtap_len;
sc 853 dev/usb/if_rum.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
sc 878 dev/usb/if_rum.c usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES,
sc 1001 dev/usb/if_rum.c rum_setup_tx_desc(struct rum_softc *sc, struct rum_tx_desc *desc,
sc 1004 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 1049 dev/usb/if_rum.c rum_tx_data(struct rum_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
sc 1051 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 1113 dev/usb/if_rum.c 2 * sc->sifs;
sc 1116 dev/usb/if_rum.c protrate), ic->ic_flags) + sc->sifs;
sc 1123 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 1128 dev/usb/if_rum.c data = &sc->tx_data[sc->tx_cur];
sc 1136 dev/usb/if_rum.c rum_setup_tx_desc(sc, desc,
sc 1148 dev/usb/if_rum.c usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf,
sc 1157 dev/usb/if_rum.c sc->tx_queued++;
sc 1158 dev/usb/if_rum.c sc->tx_cur = (sc->tx_cur + 1) % RUM_TX_LIST_COUNT;
sc 1163 dev/usb/if_rum.c data = &sc->tx_data[sc->tx_cur];
sc 1172 dev/usb/if_rum.c ic->ic_flags) + sc->sifs;
sc 1183 dev/usb/if_rum.c if (sc->sc_drvbpf != NULL) {
sc 1185 dev/usb/if_rum.c struct rum_tx_radiotap_header *tap = &sc->sc_txtap;
sc 1191 dev/usb/if_rum.c tap->wt_antenna = sc->tx_ant;
sc 1194 dev/usb/if_rum.c mb.m_len = sc->sc_txtap_len;
sc 1199 dev/usb/if_rum.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 1204 dev/usb/if_rum.c rum_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate);
sc 1222 dev/usb/if_rum.c usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, xferlen,
sc 1228 dev/usb/if_rum.c sc->tx_queued++;
sc 1229 dev/usb/if_rum.c sc->tx_cur = (sc->tx_cur + 1) % RUM_TX_LIST_COUNT;
sc 1237 dev/usb/if_rum.c struct rum_softc *sc = ifp->if_softc;
sc 1238 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 1252 dev/usb/if_rum.c if (sc->tx_queued >= RUM_TX_LIST_COUNT - 1) {
sc 1264 dev/usb/if_rum.c if (rum_tx_data(sc, m0, ni) != 0)
sc 1273 dev/usb/if_rum.c if (sc->tx_queued >= RUM_TX_LIST_COUNT - 1) {
sc 1289 dev/usb/if_rum.c if (rum_tx_data(sc, m0, ni) != 0) {
sc 1297 dev/usb/if_rum.c sc->sc_tx_timer = 5;
sc 1305 dev/usb/if_rum.c struct rum_softc *sc = ifp->if_softc;
sc 1309 dev/usb/if_rum.c if (sc->sc_tx_timer > 0) {
sc 1310 dev/usb/if_rum.c if (--sc->sc_tx_timer == 0) {
sc 1311 dev/usb/if_rum.c printf("%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1325 dev/usb/if_rum.c struct rum_softc *sc = ifp->if_softc;
sc 1326 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 1345 dev/usb/if_rum.c rum_update_promisc(sc);
sc 1376 dev/usb/if_rum.c rum_set_chan(sc, ic->ic_ibss_chan);
sc 1398 dev/usb/if_rum.c rum_eeprom_read(struct rum_softc *sc, uint16_t addr, void *buf, int len)
sc 1409 dev/usb/if_rum.c error = usbd_do_request(sc->sc_udev, &req, buf);
sc 1412 dev/usb/if_rum.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 1417 dev/usb/if_rum.c rum_read(struct rum_softc *sc, uint16_t reg)
sc 1421 dev/usb/if_rum.c rum_read_multi(sc, reg, &val, sizeof val);
sc 1427 dev/usb/if_rum.c rum_read_multi(struct rum_softc *sc, uint16_t reg, void *buf, int len)
sc 1438 dev/usb/if_rum.c error = usbd_do_request(sc->sc_udev, &req, buf);
sc 1441 dev/usb/if_rum.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 1446 dev/usb/if_rum.c rum_write(struct rum_softc *sc, uint16_t reg, uint32_t val)
sc 1450 dev/usb/if_rum.c rum_write_multi(sc, reg, &tmp, sizeof tmp);
sc 1454 dev/usb/if_rum.c rum_write_multi(struct rum_softc *sc, uint16_t reg, void *buf, size_t len)
sc 1465 dev/usb/if_rum.c error = usbd_do_request(sc->sc_udev, &req, buf);
sc 1468 dev/usb/if_rum.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 1473 dev/usb/if_rum.c rum_bbp_write(struct rum_softc *sc, uint8_t reg, uint8_t val)
sc 1479 dev/usb/if_rum.c if (!(rum_read(sc, RT2573_PHY_CSR3) & RT2573_BBP_BUSY))
sc 1483 dev/usb/if_rum.c printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname);
sc 1488 dev/usb/if_rum.c rum_write(sc, RT2573_PHY_CSR3, tmp);
sc 1492 dev/usb/if_rum.c rum_bbp_read(struct rum_softc *sc, uint8_t reg)
sc 1498 dev/usb/if_rum.c if (!(rum_read(sc, RT2573_PHY_CSR3) & RT2573_BBP_BUSY))
sc 1502 dev/usb/if_rum.c printf("%s: could not read BBP\n", sc->sc_dev.dv_xname);
sc 1507 dev/usb/if_rum.c rum_write(sc, RT2573_PHY_CSR3, val);
sc 1510 dev/usb/if_rum.c val = rum_read(sc, RT2573_PHY_CSR3);
sc 1516 dev/usb/if_rum.c printf("%s: could not read BBP\n", sc->sc_dev.dv_xname);
sc 1521 dev/usb/if_rum.c rum_rf_write(struct rum_softc *sc, uint8_t reg, uint32_t val)
sc 1527 dev/usb/if_rum.c if (!(rum_read(sc, RT2573_PHY_CSR4) & RT2573_RF_BUSY))
sc 1531 dev/usb/if_rum.c printf("%s: could not write to RF\n", sc->sc_dev.dv_xname);
sc 1537 dev/usb/if_rum.c rum_write(sc, RT2573_PHY_CSR4, tmp);
sc 1540 dev/usb/if_rum.c sc->rf_regs[reg] = val;
sc 1546 dev/usb/if_rum.c rum_select_antenna(struct rum_softc *sc)
sc 1551 dev/usb/if_rum.c bbp4 = rum_bbp_read(sc, 4);
sc 1552 dev/usb/if_rum.c bbp77 = rum_bbp_read(sc, 77);
sc 1557 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR0);
sc 1558 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR0, tmp | RT2573_DISABLE_RX);
sc 1560 dev/usb/if_rum.c rum_bbp_write(sc, 4, bbp4);
sc 1561 dev/usb/if_rum.c rum_bbp_write(sc, 77, bbp77);
sc 1563 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR0, tmp);
sc 1571 dev/usb/if_rum.c rum_enable_mrr(struct rum_softc *sc)
sc 1573 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 1576 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR4);
sc 1583 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR4, tmp);
sc 1587 dev/usb/if_rum.c rum_set_txpreamble(struct rum_softc *sc)
sc 1591 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR4);
sc 1594 dev/usb/if_rum.c if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
sc 1597 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR4, tmp);
sc 1601 dev/usb/if_rum.c rum_set_basicrates(struct rum_softc *sc)
sc 1603 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 1608 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR5, 0x3);
sc 1611 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR5, 0x150);
sc 1614 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR5, 0xf);
sc 1623 dev/usb/if_rum.c rum_select_band(struct rum_softc *sc, struct ieee80211_channel *c)
sc 1635 dev/usb/if_rum.c if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
sc 1636 dev/usb/if_rum.c (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
sc 1640 dev/usb/if_rum.c sc->bbp17 = bbp17;
sc 1641 dev/usb/if_rum.c rum_bbp_write(sc, 17, bbp17);
sc 1642 dev/usb/if_rum.c rum_bbp_write(sc, 96, bbp96);
sc 1643 dev/usb/if_rum.c rum_bbp_write(sc, 104, bbp104);
sc 1645 dev/usb/if_rum.c if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
sc 1646 dev/usb/if_rum.c (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
sc 1647 dev/usb/if_rum.c rum_bbp_write(sc, 75, 0x80);
sc 1648 dev/usb/if_rum.c rum_bbp_write(sc, 86, 0x80);
sc 1649 dev/usb/if_rum.c rum_bbp_write(sc, 88, 0x80);
sc 1652 dev/usb/if_rum.c rum_bbp_write(sc, 35, bbp35);
sc 1653 dev/usb/if_rum.c rum_bbp_write(sc, 97, bbp97);
sc 1654 dev/usb/if_rum.c rum_bbp_write(sc, 98, bbp98);
sc 1656 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_PHY_CSR0);
sc 1662 dev/usb/if_rum.c rum_write(sc, RT2573_PHY_CSR0, tmp);
sc 1665 dev/usb/if_rum.c sc->sifs = IEEE80211_IS_CHAN_5GHZ(c) ? 16 : 10;
sc 1669 dev/usb/if_rum.c rum_set_chan(struct rum_softc *sc, struct ieee80211_channel *c)
sc 1671 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 1682 dev/usb/if_rum.c rfprog = (sc->rf_rev == RT2573_RF_5225 ||
sc 1683 dev/usb/if_rum.c sc->rf_rev == RT2573_RF_2527) ? rum_rf5225 : rum_rf5226;
sc 1688 dev/usb/if_rum.c power = sc->txpow[i];
sc 1701 dev/usb/if_rum.c if (c->ic_flags != sc->sc_curchan->ic_flags) {
sc 1702 dev/usb/if_rum.c rum_select_band(sc, c);
sc 1703 dev/usb/if_rum.c rum_select_antenna(sc);
sc 1705 dev/usb/if_rum.c sc->sc_curchan = c;
sc 1707 dev/usb/if_rum.c rum_rf_write(sc, RT2573_RF1, rfprog[i].r1);
sc 1708 dev/usb/if_rum.c rum_rf_write(sc, RT2573_RF2, rfprog[i].r2);
sc 1709 dev/usb/if_rum.c rum_rf_write(sc, RT2573_RF3, rfprog[i].r3 | power << 7);
sc 1710 dev/usb/if_rum.c rum_rf_write(sc, RT2573_RF4, rfprog[i].r4 | sc->rffreq << 10);
sc 1712 dev/usb/if_rum.c rum_rf_write(sc, RT2573_RF1, rfprog[i].r1);
sc 1713 dev/usb/if_rum.c rum_rf_write(sc, RT2573_RF2, rfprog[i].r2);
sc 1714 dev/usb/if_rum.c rum_rf_write(sc, RT2573_RF3, rfprog[i].r3 | power << 7 | 1);
sc 1715 dev/usb/if_rum.c rum_rf_write(sc, RT2573_RF4, rfprog[i].r4 | sc->rffreq << 10);
sc 1717 dev/usb/if_rum.c rum_rf_write(sc, RT2573_RF1, rfprog[i].r1);
sc 1718 dev/usb/if_rum.c rum_rf_write(sc, RT2573_RF2, rfprog[i].r2);
sc 1719 dev/usb/if_rum.c rum_rf_write(sc, RT2573_RF3, rfprog[i].r3 | power << 7);
sc 1720 dev/usb/if_rum.c rum_rf_write(sc, RT2573_RF4, rfprog[i].r4 | sc->rffreq << 10);
sc 1725 dev/usb/if_rum.c bbp3 = rum_bbp_read(sc, 3);
sc 1728 dev/usb/if_rum.c if (sc->rf_rev == RT2573_RF_5225 || sc->rf_rev == RT2573_RF_2527)
sc 1731 dev/usb/if_rum.c rum_bbp_write(sc, 3, bbp3);
sc 1734 dev/usb/if_rum.c rum_bbp_write(sc, 94, bbp94);
sc 1742 dev/usb/if_rum.c rum_enable_tsf_sync(struct rum_softc *sc)
sc 1744 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 1752 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR10, 1 << 12 | 8);
sc 1755 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR9) & 0xff000000;
sc 1766 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR9, tmp);
sc 1770 dev/usb/if_rum.c rum_update_slot(struct rum_softc *sc)
sc 1772 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 1778 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_MAC_CSR9);
sc 1780 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR9, tmp);
sc 1786 dev/usb/if_rum.c rum_set_bssid(struct rum_softc *sc, const uint8_t *bssid)
sc 1791 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR4, tmp);
sc 1794 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR5, tmp);
sc 1798 dev/usb/if_rum.c rum_set_macaddr(struct rum_softc *sc, const uint8_t *addr)
sc 1803 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR2, tmp);
sc 1806 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR3, tmp);
sc 1810 dev/usb/if_rum.c rum_update_promisc(struct rum_softc *sc)
sc 1812 dev/usb/if_rum.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 1815 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR0);
sc 1821 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR0, tmp);
sc 1840 dev/usb/if_rum.c rum_read_eeprom(struct rum_softc *sc)
sc 1842 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 1849 dev/usb/if_rum.c rum_eeprom_read(sc, RT2573_EEPROM_MACBBP, &val, 2);
sc 1850 dev/usb/if_rum.c sc->macbbp_rev = letoh16(val);
sc 1853 dev/usb/if_rum.c rum_eeprom_read(sc, RT2573_EEPROM_ADDRESS, ic->ic_myaddr, 6);
sc 1855 dev/usb/if_rum.c rum_eeprom_read(sc, RT2573_EEPROM_ANTENNA, &val, 2);
sc 1857 dev/usb/if_rum.c sc->rf_rev = (val >> 11) & 0x1f;
sc 1858 dev/usb/if_rum.c sc->hw_radio = (val >> 10) & 0x1;
sc 1859 dev/usb/if_rum.c sc->rx_ant = (val >> 4) & 0x3;
sc 1860 dev/usb/if_rum.c sc->tx_ant = (val >> 2) & 0x3;
sc 1861 dev/usb/if_rum.c sc->nb_ant = val & 0x3;
sc 1863 dev/usb/if_rum.c DPRINTF(("RF revision=%d\n", sc->rf_rev));
sc 1865 dev/usb/if_rum.c rum_eeprom_read(sc, RT2573_EEPROM_CONFIG2, &val, 2);
sc 1867 dev/usb/if_rum.c sc->ext_5ghz_lna = (val >> 6) & 0x1;
sc 1868 dev/usb/if_rum.c sc->ext_2ghz_lna = (val >> 4) & 0x1;
sc 1871 dev/usb/if_rum.c sc->ext_2ghz_lna, sc->ext_5ghz_lna));
sc 1873 dev/usb/if_rum.c rum_eeprom_read(sc, RT2573_EEPROM_RSSI_2GHZ_OFFSET, &val, 2);
sc 1876 dev/usb/if_rum.c sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
sc 1878 dev/usb/if_rum.c rum_eeprom_read(sc, RT2573_EEPROM_RSSI_5GHZ_OFFSET, &val, 2);
sc 1881 dev/usb/if_rum.c sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
sc 1884 dev/usb/if_rum.c sc->rssi_2ghz_corr, sc->rssi_5ghz_corr));
sc 1886 dev/usb/if_rum.c rum_eeprom_read(sc, RT2573_EEPROM_FREQ_OFFSET, &val, 2);
sc 1889 dev/usb/if_rum.c sc->rffreq = val & 0xff;
sc 1891 dev/usb/if_rum.c DPRINTF(("RF freq=%d\n", sc->rffreq));
sc 1894 dev/usb/if_rum.c rum_eeprom_read(sc, RT2573_EEPROM_TXPOWER, sc->txpow, 14);
sc 1896 dev/usb/if_rum.c memset(sc->txpow + 14, 24, sizeof (sc->txpow) - 14);
sc 1899 dev/usb/if_rum.c DPRINTF(("Channel=%d Tx power=%d\n", i + 1, sc->txpow[i]));
sc 1903 dev/usb/if_rum.c rum_eeprom_read(sc, RT2573_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
sc 1906 dev/usb/if_rum.c if (sc->bbp_prom[i].reg == 0 || sc->bbp_prom[i].reg == 0xff)
sc 1908 dev/usb/if_rum.c DPRINTF(("BBP R%d=%02x\n", sc->bbp_prom[i].reg,
sc 1909 dev/usb/if_rum.c sc->bbp_prom[i].val));
sc 1915 dev/usb/if_rum.c rum_bbp_init(struct rum_softc *sc)
sc 1922 dev/usb/if_rum.c const uint8_t val = rum_bbp_read(sc, 0);
sc 1929 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 1935 dev/usb/if_rum.c rum_bbp_write(sc, rum_def_bbp[i].reg, rum_def_bbp[i].val);
sc 1939 dev/usb/if_rum.c if (sc->bbp_prom[i].reg == 0 || sc->bbp_prom[i].reg == 0xff)
sc 1941 dev/usb/if_rum.c rum_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
sc 1952 dev/usb/if_rum.c struct rum_softc *sc = ifp->if_softc;
sc 1953 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 1962 dev/usb/if_rum.c rum_write(sc, rum_def_mac[i].reg, rum_def_mac[i].val);
sc 1965 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR1, 3);
sc 1966 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR1, 0);
sc 1970 dev/usb/if_rum.c if (rum_read(sc, RT2573_MAC_CSR12) & 8)
sc 1972 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR12, 4); /* force wakeup */
sc 1977 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 1981 dev/usb/if_rum.c if ((error = rum_bbp_init(sc)) != 0)
sc 1985 dev/usb/if_rum.c sc->sc_curchan = ic->ic_bss->ni_chan = ic->ic_ibss_chan;
sc 1986 dev/usb/if_rum.c rum_select_band(sc, sc->sc_curchan);
sc 1987 dev/usb/if_rum.c rum_select_antenna(sc);
sc 1988 dev/usb/if_rum.c rum_set_chan(sc, sc->sc_curchan);
sc 1991 dev/usb/if_rum.c rum_read_multi(sc, RT2573_STA_CSR0, sc->sta, sizeof sc->sta);
sc 1994 dev/usb/if_rum.c rum_set_macaddr(sc, ic->ic_myaddr);
sc 1997 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR1, 4);
sc 2002 dev/usb/if_rum.c sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev);
sc 2003 dev/usb/if_rum.c if (sc->amrr_xfer == NULL) {
sc 2005 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 2012 dev/usb/if_rum.c error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE,
sc 2013 dev/usb/if_rum.c &sc->sc_tx_pipeh);
sc 2016 dev/usb/if_rum.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 2019 dev/usb/if_rum.c error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE,
sc 2020 dev/usb/if_rum.c &sc->sc_rx_pipeh);
sc 2023 dev/usb/if_rum.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 2030 dev/usb/if_rum.c error = rum_alloc_tx_list(sc);
sc 2033 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 2036 dev/usb/if_rum.c error = rum_alloc_rx_list(sc);
sc 2039 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 2047 dev/usb/if_rum.c struct rum_rx_data *data = &sc->rx_data[i];
sc 2049 dev/usb/if_rum.c usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf,
sc 2054 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 2060 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR0) & 0xffff;
sc 2071 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR0, tmp);
sc 2091 dev/usb/if_rum.c struct rum_softc *sc = ifp->if_softc;
sc 2092 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 2095 dev/usb/if_rum.c sc->sc_tx_timer = 0;
sc 2102 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR0);
sc 2103 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR0, tmp | RT2573_DISABLE_RX);
sc 2106 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR1, 3);
sc 2107 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR1, 0);
sc 2109 dev/usb/if_rum.c if (sc->sc_rx_pipeh != NULL) {
sc 2110 dev/usb/if_rum.c usbd_abort_pipe(sc->sc_rx_pipeh);
sc 2111 dev/usb/if_rum.c usbd_close_pipe(sc->sc_rx_pipeh);
sc 2112 dev/usb/if_rum.c sc->sc_rx_pipeh = NULL;
sc 2114 dev/usb/if_rum.c if (sc->sc_tx_pipeh != NULL) {
sc 2115 dev/usb/if_rum.c usbd_abort_pipe(sc->sc_tx_pipeh);
sc 2116 dev/usb/if_rum.c usbd_close_pipe(sc->sc_tx_pipeh);
sc 2117 dev/usb/if_rum.c sc->sc_tx_pipeh = NULL;
sc 2120 dev/usb/if_rum.c rum_free_rx_list(sc);
sc 2121 dev/usb/if_rum.c rum_free_tx_list(sc);
sc 2125 dev/usb/if_rum.c rum_load_microcode(struct rum_softc *sc, const u_char *ucode, size_t size)
sc 2133 dev/usb/if_rum.c rum_write(sc, reg, UGETDW(ucode));
sc 2141 dev/usb/if_rum.c error = usbd_do_request(sc->sc_udev, &req, NULL);
sc 2144 dev/usb/if_rum.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 2150 dev/usb/if_rum.c rum_prepare_beacon(struct rum_softc *sc)
sc 2152 dev/usb/if_rum.c struct ieee80211com *ic = &sc->sc_ic;
sc 2160 dev/usb/if_rum.c sc->sc_dev.dv_xname);
sc 2167 dev/usb/if_rum.c rum_setup_tx_desc(sc, &desc, RT2573_TX_TIMESTAMP, RT2573_TX_HWSEQ,
sc 2171 dev/usb/if_rum.c rum_write_multi(sc, RT2573_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
sc 2174 dev/usb/if_rum.c rum_write_multi(sc, RT2573_HW_BEACON_BASE0 + 24, mtod(m0, uint8_t *),
sc 2190 dev/usb/if_rum.c rum_amrr_start(struct rum_softc *sc, struct ieee80211_node *ni)
sc 2195 dev/usb/if_rum.c rum_read_multi(sc, RT2573_STA_CSR0, sc->sta, sizeof sc->sta);
sc 2197 dev/usb/if_rum.c ieee80211_amrr_node_init(&sc->amrr, &sc->amn);
sc 2205 dev/usb/if_rum.c timeout_add(&sc->amrr_to, hz);
sc 2211 dev/usb/if_rum.c struct rum_softc *sc = arg;
sc 2221 dev/usb/if_rum.c USETW(req.wLength, sizeof sc->sta);
sc 2223 dev/usb/if_rum.c usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc,
sc 2224 dev/usb/if_rum.c USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0,
sc 2226 dev/usb/if_rum.c (void)usbd_transfer(sc->amrr_xfer);
sc 2233 dev/usb/if_rum.c struct rum_softc *sc = (struct rum_softc *)priv;
sc 2234 dev/usb/if_rum.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 2238 dev/usb/if_rum.c "automatic rate control\n", sc->sc_dev.dv_xname);
sc 2243 dev/usb/if_rum.c ifp->if_oerrors += letoh32(sc->sta[5]) >> 16;
sc 2245 dev/usb/if_rum.c sc->amn.amn_retrycnt =
sc 2246 dev/usb/if_rum.c (letoh32(sc->sta[4]) >> 16) + /* TX one-retry ok count */
sc 2247 dev/usb/if_rum.c (letoh32(sc->sta[5]) & 0xffff) + /* TX more-retry ok count */
sc 2248 dev/usb/if_rum.c (letoh32(sc->sta[5]) >> 16); /* TX retry-fail count */
sc 2250 dev/usb/if_rum.c sc->amn.amn_txcnt =
sc 2251 dev/usb/if_rum.c sc->amn.amn_retrycnt +
sc 2252 dev/usb/if_rum.c (letoh32(sc->sta[4]) & 0xffff); /* TX no-retry ok count */
sc 2254 dev/usb/if_rum.c ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn);
sc 2256 dev/usb/if_rum.c timeout_add(&sc->amrr_to, hz);
sc 58 dev/usb/if_rumvar.h struct rum_softc *sc;
sc 65 dev/usb/if_rumvar.h struct rum_softc *sc;
sc 220 dev/usb/if_uath.c struct uath_softc *sc = xsc;
sc 227 dev/usb/if_uath.c sc->sc_dev.dv_xname, error);
sc 231 dev/usb/if_uath.c error = uath_loadfirmware(sc, fw, size);
sc 242 dev/usb/if_uath.c usbd_reset_port(sc->sc_uhub, sc->sc_port, &status);
sc 243 dev/usb/if_uath.c usb_needs_reattach(sc->sc_udev);
sc 246 dev/usb/if_uath.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 253 dev/usb/if_uath.c struct uath_softc *sc = (struct uath_softc *)self;
sc 255 dev/usb/if_uath.c struct ieee80211com *ic = &sc->sc_ic;
sc 261 dev/usb/if_uath.c sc->sc_udev = uaa->device;
sc 262 dev/usb/if_uath.c sc->sc_uhub = uaa->device->myhub;
sc 263 dev/usb/if_uath.c sc->sc_port = uaa->port;
sc 266 dev/usb/if_uath.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 269 dev/usb/if_uath.c sc->sc_flags = uath_lookup(uaa->vendor, uaa->product)->flags;
sc 271 dev/usb/if_uath.c if (usbd_set_config_no(sc->sc_udev, UATH_CONFIG_NO, 0) != 0) {
sc 273 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 278 dev/usb/if_uath.c error = usbd_device2interface_handle(sc->sc_udev, UATH_IFACE_INDEX,
sc 279 dev/usb/if_uath.c &sc->sc_iface);
sc 282 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 290 dev/usb/if_uath.c if (uath_open_pipes(sc) != 0) {
sc 291 dev/usb/if_uath.c printf("%s: could not open pipes\n", sc->sc_dev.dv_xname);
sc 295 dev/usb/if_uath.c if (sc->sc_flags & UATH_FLAG_PRE_FIRMWARE) {
sc 297 dev/usb/if_uath.c mountroothook_establish(uath_attachhook, sc);
sc 299 dev/usb/if_uath.c uath_attachhook(sc);
sc 306 dev/usb/if_uath.c usb_init_task(&sc->sc_task, uath_task, sc);
sc 307 dev/usb/if_uath.c timeout_set(&sc->scan_to, uath_next_scan, sc);
sc 308 dev/usb/if_uath.c timeout_set(&sc->stat_to, uath_stat, sc);
sc 313 dev/usb/if_uath.c if (uath_alloc_tx_cmd_list(sc) != 0) {
sc 315 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 318 dev/usb/if_uath.c if (uath_alloc_rx_cmd_list(sc) != 0) {
sc 320 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 328 dev/usb/if_uath.c struct uath_rx_cmd *cmd = &sc->rx_cmd[i];
sc 330 dev/usb/if_uath.c usbd_setup_xfer(cmd->xfer, sc->cmd_rx_pipe, cmd, cmd->buf,
sc 336 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 344 dev/usb/if_uath.c if (uath_reset(sc) != 0) {
sc 346 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 349 dev/usb/if_uath.c if (uath_query_eeprom(sc) != 0) {
sc 350 dev/usb/if_uath.c printf("%s: could not read EEPROM\n", sc->sc_dev.dv_xname);
sc 355 dev/usb/if_uath.c sc->sc_dev.dv_xname, (sc->sc_flags & UATH_FLAG_ABG) ? '5': '2',
sc 361 dev/usb/if_uath.c if (uath_alloc_tx_data_list(sc) != 0) {
sc 363 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 366 dev/usb/if_uath.c if (uath_alloc_rx_data_list(sc) != 0) {
sc 368 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 396 dev/usb/if_uath.c ifp->if_softc = sc;
sc 403 dev/usb/if_uath.c memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 409 dev/usb/if_uath.c sc->sc_newstate = ic->ic_newstate;
sc 414 dev/usb/if_uath.c bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
sc 417 dev/usb/if_uath.c sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
sc 418 dev/usb/if_uath.c sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
sc 419 dev/usb/if_uath.c sc->sc_rxtap.wr_ihdr.it_present = htole32(UATH_RX_RADIOTAP_PRESENT);
sc 421 dev/usb/if_uath.c sc->sc_txtap_len = sizeof sc->sc_txtapu;
sc 422 dev/usb/if_uath.c sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
sc 423 dev/usb/if_uath.c sc->sc_txtap.wt_ihdr.it_present = htole32(UATH_TX_RADIOTAP_PRESENT);
sc 426 dev/usb/if_uath.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 427 dev/usb/if_uath.c &sc->sc_dev);
sc 431 dev/usb/if_uath.c fail4: uath_free_tx_data_list(sc);
sc 432 dev/usb/if_uath.c fail3: uath_free_rx_cmd_list(sc);
sc 433 dev/usb/if_uath.c fail2: uath_free_tx_cmd_list(sc);
sc 434 dev/usb/if_uath.c fail1: uath_close_pipes(sc);
sc 440 dev/usb/if_uath.c struct uath_softc *sc = (struct uath_softc *)self;
sc 441 dev/usb/if_uath.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 446 dev/usb/if_uath.c if (sc->sc_flags & UATH_FLAG_PRE_FIRMWARE) {
sc 447 dev/usb/if_uath.c uath_close_pipes(sc);
sc 454 dev/usb/if_uath.c usb_rem_task(sc->sc_udev, &sc->sc_task);
sc 455 dev/usb/if_uath.c timeout_del(&sc->scan_to);
sc 456 dev/usb/if_uath.c timeout_del(&sc->stat_to);
sc 461 dev/usb/if_uath.c sc->sc_dying = 1;
sc 462 dev/usb/if_uath.c DPRINTF(("reclaiming %d references\n", sc->sc_refcnt));
sc 463 dev/usb/if_uath.c while (sc->sc_refcnt > 0)
sc 464 dev/usb/if_uath.c (void)tsleep(UATH_COND_NOREF(sc), 0, "uathdet", 0);
sc 468 dev/usb/if_uath.c uath_free_tx_data_list(sc);
sc 469 dev/usb/if_uath.c uath_free_rx_data_list(sc);
sc 470 dev/usb/if_uath.c uath_free_tx_cmd_list(sc);
sc 471 dev/usb/if_uath.c uath_free_rx_cmd_list(sc);
sc 474 dev/usb/if_uath.c uath_close_pipes(sc);
sc 478 dev/usb/if_uath.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 479 dev/usb/if_uath.c &sc->sc_dev);
sc 485 dev/usb/if_uath.c uath_open_pipes(struct uath_softc *sc)
sc 494 dev/usb/if_uath.c error = usbd_open_pipe(sc->sc_iface, 0x01, USBD_EXCLUSIVE_USE,
sc 495 dev/usb/if_uath.c &sc->cmd_tx_pipe);
sc 498 dev/usb/if_uath.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 502 dev/usb/if_uath.c error = usbd_open_pipe(sc->sc_iface, 0x02, USBD_EXCLUSIVE_USE,
sc 503 dev/usb/if_uath.c &sc->data_tx_pipe);
sc 506 dev/usb/if_uath.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 510 dev/usb/if_uath.c error = usbd_open_pipe(sc->sc_iface, 0x81, USBD_EXCLUSIVE_USE,
sc 511 dev/usb/if_uath.c &sc->cmd_rx_pipe);
sc 514 dev/usb/if_uath.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 518 dev/usb/if_uath.c error = usbd_open_pipe(sc->sc_iface, 0x82, USBD_EXCLUSIVE_USE,
sc 519 dev/usb/if_uath.c &sc->data_rx_pipe);
sc 522 dev/usb/if_uath.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 528 dev/usb/if_uath.c fail: uath_close_pipes(sc);
sc 533 dev/usb/if_uath.c uath_close_pipes(struct uath_softc *sc)
sc 537 dev/usb/if_uath.c if (sc->data_tx_pipe != NULL)
sc 538 dev/usb/if_uath.c usbd_close_pipe(sc->data_tx_pipe);
sc 540 dev/usb/if_uath.c if (sc->data_rx_pipe != NULL)
sc 541 dev/usb/if_uath.c usbd_close_pipe(sc->data_rx_pipe);
sc 543 dev/usb/if_uath.c if (sc->cmd_tx_pipe != NULL)
sc 544 dev/usb/if_uath.c usbd_close_pipe(sc->cmd_tx_pipe);
sc 546 dev/usb/if_uath.c if (sc->cmd_rx_pipe != NULL)
sc 547 dev/usb/if_uath.c usbd_close_pipe(sc->cmd_rx_pipe);
sc 551 dev/usb/if_uath.c uath_alloc_tx_data_list(struct uath_softc *sc)
sc 556 dev/usb/if_uath.c struct uath_tx_data *data = &sc->tx_data[i];
sc 558 dev/usb/if_uath.c data->sc = sc; /* backpointer for callbacks */
sc 560 dev/usb/if_uath.c data->xfer = usbd_alloc_xfer(sc->sc_udev);
sc 563 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 570 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 577 dev/usb/if_uath.c fail: uath_free_tx_data_list(sc);
sc 582 dev/usb/if_uath.c uath_free_tx_data_list(struct uath_softc *sc)
sc 587 dev/usb/if_uath.c usbd_abort_pipe(sc->data_tx_pipe);
sc 590 dev/usb/if_uath.c if (sc->tx_data[i].xfer != NULL)
sc 591 dev/usb/if_uath.c usbd_free_xfer(sc->tx_data[i].xfer);
sc 595 dev/usb/if_uath.c uath_alloc_rx_data_list(struct uath_softc *sc)
sc 599 dev/usb/if_uath.c SLIST_INIT(&sc->rx_freelist);
sc 601 dev/usb/if_uath.c struct uath_rx_data *data = &sc->rx_data[i];
sc 603 dev/usb/if_uath.c data->sc = sc; /* backpointer for callbacks */
sc 605 dev/usb/if_uath.c data->xfer = usbd_alloc_xfer(sc->sc_udev);
sc 608 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 612 dev/usb/if_uath.c data->buf = usbd_alloc_buffer(data->xfer, sc->rxbufsz);
sc 615 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 619 dev/usb/if_uath.c SLIST_INSERT_HEAD(&sc->rx_freelist, data, next);
sc 623 dev/usb/if_uath.c fail: uath_free_rx_data_list(sc);
sc 628 dev/usb/if_uath.c uath_free_rx_data_list(struct uath_softc *sc)
sc 633 dev/usb/if_uath.c usbd_abort_pipe(sc->data_rx_pipe);
sc 636 dev/usb/if_uath.c if (sc->rx_data[i].xfer != NULL)
sc 637 dev/usb/if_uath.c usbd_free_xfer(sc->rx_data[i].xfer);
sc 644 dev/usb/if_uath.c struct uath_softc *sc = data->sc;
sc 647 dev/usb/if_uath.c SLIST_INSERT_HEAD(&sc->rx_freelist, data, next);
sc 650 dev/usb/if_uath.c if (--sc->sc_refcnt == 0 && sc->sc_dying)
sc 651 dev/usb/if_uath.c wakeup(UATH_COND_NOREF(sc));
sc 655 dev/usb/if_uath.c uath_alloc_tx_cmd_list(struct uath_softc *sc)
sc 660 dev/usb/if_uath.c struct uath_tx_cmd *cmd = &sc->tx_cmd[i];
sc 662 dev/usb/if_uath.c cmd->sc = sc; /* backpointer for callbacks */
sc 664 dev/usb/if_uath.c cmd->xfer = usbd_alloc_xfer(sc->sc_udev);
sc 667 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 674 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 681 dev/usb/if_uath.c fail: uath_free_tx_cmd_list(sc);
sc 686 dev/usb/if_uath.c uath_free_tx_cmd_list(struct uath_softc *sc)
sc 691 dev/usb/if_uath.c usbd_abort_pipe(sc->cmd_tx_pipe);
sc 694 dev/usb/if_uath.c if (sc->tx_cmd[i].xfer != NULL)
sc 695 dev/usb/if_uath.c usbd_free_xfer(sc->tx_cmd[i].xfer);
sc 699 dev/usb/if_uath.c uath_alloc_rx_cmd_list(struct uath_softc *sc)
sc 704 dev/usb/if_uath.c struct uath_rx_cmd *cmd = &sc->rx_cmd[i];
sc 706 dev/usb/if_uath.c cmd->sc = sc; /* backpointer for callbacks */
sc 708 dev/usb/if_uath.c cmd->xfer = usbd_alloc_xfer(sc->sc_udev);
sc 711 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 718 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 725 dev/usb/if_uath.c fail: uath_free_rx_cmd_list(sc);
sc 730 dev/usb/if_uath.c uath_free_rx_cmd_list(struct uath_softc *sc)
sc 735 dev/usb/if_uath.c usbd_abort_pipe(sc->cmd_rx_pipe);
sc 738 dev/usb/if_uath.c if (sc->rx_cmd[i].xfer != NULL)
sc 739 dev/usb/if_uath.c usbd_free_xfer(sc->rx_cmd[i].xfer);
sc 764 dev/usb/if_uath.c struct uath_softc *sc = arg;
sc 771 dev/usb/if_uath.c error = uath_cmd_write(sc, UATH_CMD_STATS, NULL, 0,
sc 775 dev/usb/if_uath.c sc->sc_dev.dv_xname, error);
sc 786 dev/usb/if_uath.c struct uath_softc *sc = arg;
sc 787 dev/usb/if_uath.c struct ieee80211com *ic = &sc->sc_ic;
sc 797 dev/usb/if_uath.c struct uath_softc *sc = arg;
sc 798 dev/usb/if_uath.c struct ieee80211com *ic = &sc->sc_ic;
sc 803 dev/usb/if_uath.c switch (sc->sc_state) {
sc 807 dev/usb/if_uath.c (void)uath_set_led(sc, UATH_LED_LINK, 0);
sc 808 dev/usb/if_uath.c (void)uath_set_led(sc, UATH_LED_ACTIVITY, 0);
sc 813 dev/usb/if_uath.c if (uath_switch_channel(sc, ic->ic_bss->ni_chan) != 0) {
sc 815 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 818 dev/usb/if_uath.c timeout_add(&sc->scan_to, hz / 4);
sc 828 dev/usb/if_uath.c if (uath_switch_channel(sc, ni->ni_chan) != 0) {
sc 830 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 834 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_24, NULL, 0, 0);
sc 839 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_SET_BSSID, &bssid,
sc 845 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_0B, &cmd0b, sizeof cmd0b, 0);
sc 851 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_0C, &cmd0c, sizeof cmd0c, 0);
sc 853 dev/usb/if_uath.c if (uath_set_rates(sc, &ni->ni_rates) != 0) {
sc 855 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 877 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_SET_XLED, &xled,
sc 889 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_2E, &val, sizeof val, 0);
sc 896 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_SET_BSSID, &bssid,
sc 900 dev/usb/if_uath.c (void)uath_set_led(sc, UATH_LED_LINK, 1);
sc 907 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_SET_XLED, &xled, sizeof xled,
sc 912 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_SET_STATE, &val, sizeof val,
sc 916 dev/usb/if_uath.c timeout_add(&sc->stat_to, hz);
sc 920 dev/usb/if_uath.c sc->sc_newstate(ic, sc->sc_state, sc->sc_arg);
sc 926 dev/usb/if_uath.c struct uath_softc *sc = ic->ic_softc;
sc 928 dev/usb/if_uath.c usb_rem_task(sc->sc_udev, &sc->sc_task);
sc 929 dev/usb/if_uath.c timeout_del(&sc->scan_to);
sc 930 dev/usb/if_uath.c timeout_del(&sc->stat_to);
sc 933 dev/usb/if_uath.c sc->sc_state = nstate;
sc 934 dev/usb/if_uath.c sc->sc_arg = arg;
sc 935 dev/usb/if_uath.c usb_add_task(sc->sc_udev, &sc->sc_task);
sc 960 dev/usb/if_uath.c uath_cmd(struct uath_softc *sc, uint32_t code, const void *idata, int ilen,
sc 969 dev/usb/if_uath.c cmd = &sc->tx_cmd[sc->cmd_idx];
sc 978 dev/usb/if_uath.c hdr->priv = sc->cmd_idx; /* don't care about endianness */
sc 985 dev/usb/if_uath.c code, flags, sc->cmd_idx);
sc 998 dev/usb/if_uath.c usbd_setup_xfer(cmd->xfer, sc->cmd_tx_pipe, cmd, cmd->buf, xferlen,
sc 1005 dev/usb/if_uath.c sc->sc_dev.dv_xname, code, usbd_errstr(error));
sc 1008 dev/usb/if_uath.c sc->cmd_idx = (sc->cmd_idx + 1) % UATH_TX_CMD_LIST_COUNT;
sc 1019 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 1025 dev/usb/if_uath.c uath_cmd_write(struct uath_softc *sc, uint32_t code, const void *data, int len,
sc 1029 dev/usb/if_uath.c return uath_cmd(sc, code, data, len, NULL, flags);
sc 1033 dev/usb/if_uath.c uath_cmd_read(struct uath_softc *sc, uint32_t code, const void *idata,
sc 1037 dev/usb/if_uath.c return uath_cmd(sc, code, idata, ilen, odata, flags);
sc 1041 dev/usb/if_uath.c uath_write_reg(struct uath_softc *sc, uint32_t reg, uint32_t val)
sc 1050 dev/usb/if_uath.c error = uath_cmd_write(sc, UATH_CMD_WRITE_MAC, &write,
sc 1054 dev/usb/if_uath.c sc->sc_dev.dv_xname, reg);
sc 1060 dev/usb/if_uath.c uath_write_multi(struct uath_softc *sc, uint32_t reg, const void *data,
sc 1071 dev/usb/if_uath.c error = uath_cmd_write(sc, UATH_CMD_WRITE_MAC, &write,
sc 1075 dev/usb/if_uath.c sc->sc_dev.dv_xname, len, reg);
sc 1081 dev/usb/if_uath.c uath_read_reg(struct uath_softc *sc, uint32_t reg, uint32_t *val)
sc 1087 dev/usb/if_uath.c error = uath_cmd_read(sc, UATH_CMD_READ_MAC, ®, sizeof reg, &read,
sc 1091 dev/usb/if_uath.c sc->sc_dev.dv_xname, betoh32(reg));
sc 1099 dev/usb/if_uath.c uath_read_eeprom(struct uath_softc *sc, uint32_t reg, void *odata)
sc 1105 dev/usb/if_uath.c error = uath_cmd_read(sc, UATH_CMD_READ_EEPROM, ®, sizeof reg,
sc 1109 dev/usb/if_uath.c sc->sc_dev.dv_xname, betoh32(reg));
sc 1122 dev/usb/if_uath.c struct uath_softc *sc = cmd->sc;
sc 1127 dev/usb/if_uath.c usbd_clear_endpoint_stall_async(sc->cmd_rx_pipe);
sc 1145 dev/usb/if_uath.c struct uath_tx_cmd *txcmd = &sc->tx_cmd[hdr->priv];
sc 1158 dev/usb/if_uath.c wakeup(UATH_COND_INIT(sc));
sc 1168 dev/usb/if_uath.c timeout_add(&sc->stat_to, hz);
sc 1173 dev/usb/if_uath.c usbd_setup_xfer(xfer, sc->cmd_rx_pipe, cmd, cmd->buf, UATH_MAX_RXCMDSZ,
sc 1184 dev/usb/if_uath.c struct uath_softc *sc = data->sc;
sc 1185 dev/usb/if_uath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1200 dev/usb/if_uath.c usbd_clear_endpoint_stall_async(sc->data_rx_pipe);
sc 1219 dev/usb/if_uath.c if (betoh32(desc->len) > sc->rxbufsz) {
sc 1234 dev/usb/if_uath.c ndata = SLIST_FIRST(&sc->rx_freelist);
sc 1237 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 1242 dev/usb/if_uath.c SLIST_REMOVE_HEAD(&sc->rx_freelist, next);
sc 1244 dev/usb/if_uath.c MEXTADD(m, data->buf, sc->rxbufsz, 0, uath_free_rx_data, data);
sc 1272 dev/usb/if_uath.c if (sc->sc_drvbpf != NULL) {
sc 1274 dev/usb/if_uath.c struct uath_rx_radiotap_header *tap = &sc->sc_rxtap;
sc 1282 dev/usb/if_uath.c mb.m_len = sc->sc_rxtap_len;
sc 1287 dev/usb/if_uath.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
sc 1292 dev/usb/if_uath.c sc->sc_refcnt++;
sc 1301 dev/usb/if_uath.c usbd_setup_xfer(data->xfer, sc->data_rx_pipe, data, data->buf,
sc 1302 dev/usb/if_uath.c sc->rxbufsz, USBD_SHORT_XFER_OK | USBD_NO_COPY, USBD_NO_TIMEOUT,
sc 1308 dev/usb/if_uath.c uath_tx_null(struct uath_softc *sc)
sc 1313 dev/usb/if_uath.c data = &sc->tx_data[sc->data_idx];
sc 1324 dev/usb/if_uath.c usbd_setup_xfer(data->xfer, sc->data_tx_pipe, data, data->buf,
sc 1330 dev/usb/if_uath.c sc->data_idx = (sc->data_idx + 1) % UATH_TX_DATA_LIST_COUNT;
sc 1332 dev/usb/if_uath.c return uath_cmd_write(sc, UATH_CMD_0F, NULL, 0, UATH_CMD_FLAG_ASYNC);
sc 1340 dev/usb/if_uath.c struct uath_softc *sc = data->sc;
sc 1341 dev/usb/if_uath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1350 dev/usb/if_uath.c sc->sc_dev.dv_xname, usbd_errstr(status));
sc 1353 dev/usb/if_uath.c usbd_clear_endpoint_stall_async(sc->data_tx_pipe);
sc 1364 dev/usb/if_uath.c sc->tx_queued--;
sc 1367 dev/usb/if_uath.c sc->sc_tx_timer = 0;
sc 1375 dev/usb/if_uath.c uath_tx_data(struct uath_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
sc 1377 dev/usb/if_uath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1383 dev/usb/if_uath.c data = &sc->tx_data[sc->data_idx];
sc 1389 dev/usb/if_uath.c if (sc->sc_drvbpf != NULL) {
sc 1391 dev/usb/if_uath.c struct uath_tx_radiotap_header *tap = &sc->sc_txtap;
sc 1398 dev/usb/if_uath.c mb.m_len = sc->sc_txtap_len;
sc 1403 dev/usb/if_uath.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 1445 dev/usb/if_uath.c desc->priv = sc->data_idx; /* don't care about endianness */
sc 1462 dev/usb/if_uath.c sc->data_idx, paylen, xferlen);
sc 1466 dev/usb/if_uath.c usbd_setup_xfer(data->xfer, sc->data_tx_pipe, data, data->buf, xferlen,
sc 1474 dev/usb/if_uath.c sc->data_idx = (sc->data_idx + 1) % UATH_TX_DATA_LIST_COUNT;
sc 1475 dev/usb/if_uath.c sc->tx_queued++;
sc 1483 dev/usb/if_uath.c struct uath_softc *sc = ifp->if_softc;
sc 1484 dev/usb/if_uath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1498 dev/usb/if_uath.c if (sc->tx_queued >= UATH_TX_DATA_LIST_COUNT) {
sc 1510 dev/usb/if_uath.c if (uath_tx_data(sc, m0, ni) != 0)
sc 1518 dev/usb/if_uath.c if (sc->tx_queued >= UATH_TX_DATA_LIST_COUNT) {
sc 1534 dev/usb/if_uath.c if (uath_tx_data(sc, m0, ni) != 0) {
sc 1542 dev/usb/if_uath.c sc->sc_tx_timer = 5;
sc 1550 dev/usb/if_uath.c struct uath_softc *sc = ifp->if_softc;
sc 1554 dev/usb/if_uath.c if (sc->sc_tx_timer > 0) {
sc 1555 dev/usb/if_uath.c if (--sc->sc_tx_timer == 0) {
sc 1556 dev/usb/if_uath.c printf("%s: device timeout\n", sc->sc_dev.dv_xname);
sc 1570 dev/usb/if_uath.c struct uath_softc *sc = ifp->if_softc;
sc 1571 dev/usb/if_uath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1624 dev/usb/if_uath.c uath_query_eeprom(struct uath_softc *sc)
sc 1630 dev/usb/if_uath.c error = uath_read_eeprom(sc, UATH_EEPROM_MACADDR, sc->sc_ic.ic_myaddr);
sc 1633 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 1638 dev/usb/if_uath.c error = uath_read_eeprom(sc, UATH_EEPROM_RXBUFSZ, &tmp);
sc 1641 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 1644 dev/usb/if_uath.c sc->rxbufsz = betoh32(tmp) & 0xfff;
sc 1645 dev/usb/if_uath.c DPRINTF(("maximum Rx buffer size %d\n", sc->rxbufsz));
sc 1650 dev/usb/if_uath.c uath_reset(struct uath_softc *sc)
sc 1662 dev/usb/if_uath.c error = uath_cmd_write(sc, UATH_CMD_SETUP, &setup, sizeof setup,
sc 1666 dev/usb/if_uath.c error = tsleep(UATH_COND_INIT(sc), PCATCH, "uathinit", 5 * hz);
sc 1676 dev/usb/if_uath.c if ((error = uath_read_reg(sc, reg, &val)) != 0)
sc 1684 dev/usb/if_uath.c uath_reset_tx_queues(struct uath_softc *sc)
sc 1692 dev/usb/if_uath.c error = uath_cmd_write(sc, UATH_CMD_RESET_QUEUE, &qid,
sc 1701 dev/usb/if_uath.c uath_wme_init(struct uath_softc *sc)
sc 1727 dev/usb/if_uath.c error = uath_cmd_write(sc, UATH_CMD_SET_QUEUE, &qinfo,
sc 1736 dev/usb/if_uath.c uath_set_chan(struct uath_softc *sc, struct ieee80211_channel *c)
sc 1748 dev/usb/if_uath.c ieee80211_chan2ieee(&sc->sc_ic, c)));
sc 1749 dev/usb/if_uath.c return uath_cmd_write(sc, UATH_CMD_SET_CHAN, &chan, sizeof chan, 0);
sc 1753 dev/usb/if_uath.c uath_set_key(struct uath_softc *sc, const struct ieee80211_key *k, int index)
sc 1776 dev/usb/if_uath.c return uath_cmd_write(sc, UATH_CMD_CRYPTO, &crypto, sizeof crypto, 0);
sc 1780 dev/usb/if_uath.c uath_set_keys(struct uath_softc *sc)
sc 1782 dev/usb/if_uath.c const struct ieee80211com *ic = &sc->sc_ic;
sc 1788 dev/usb/if_uath.c if (k->k_len > 0 && (error = uath_set_key(sc, k, i)) != 0)
sc 1791 dev/usb/if_uath.c return uath_set_key(sc, &ic->ic_nw_keys[ic->ic_wep_txkey],
sc 1796 dev/usb/if_uath.c uath_set_rates(struct uath_softc *sc, const struct ieee80211_rateset *rs)
sc 1807 dev/usb/if_uath.c return uath_cmd_write(sc, UATH_CMD_SET_RATES, &rates, sizeof rates, 0);
sc 1811 dev/usb/if_uath.c uath_set_rxfilter(struct uath_softc *sc, uint32_t filter, uint32_t flags)
sc 1819 dev/usb/if_uath.c return uath_cmd_write(sc, UATH_CMD_SET_FILTER, &rxfilter,
sc 1824 dev/usb/if_uath.c uath_set_led(struct uath_softc *sc, int which, int on)
sc 1834 dev/usb/if_uath.c return uath_cmd_write(sc, UATH_CMD_SET_LED, &led, sizeof led, 0);
sc 1838 dev/usb/if_uath.c uath_switch_channel(struct uath_softc *sc, struct ieee80211_channel *c)
sc 1844 dev/usb/if_uath.c if ((error = uath_set_chan(sc, c)) != 0) {
sc 1845 dev/usb/if_uath.c printf("%s: could not set channel\n", sc->sc_dev.dv_xname);
sc 1850 dev/usb/if_uath.c if ((error = uath_reset_tx_queues(sc)) != 0) {
sc 1852 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 1857 dev/usb/if_uath.c if ((error = uath_wme_init(sc)) != 0) {
sc 1859 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 1864 dev/usb/if_uath.c error = uath_cmd_write(sc, UATH_CMD_SET_STATE, &val, sizeof val, 0);
sc 1866 dev/usb/if_uath.c printf("%s: could not set state\n", sc->sc_dev.dv_xname);
sc 1870 dev/usb/if_uath.c return uath_tx_null(sc);
sc 1876 dev/usb/if_uath.c struct uath_softc *sc = ifp->if_softc;
sc 1877 dev/usb/if_uath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1883 dev/usb/if_uath.c sc->tx_queued = sc->data_idx = sc->cmd_idx = 0;
sc 1886 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_02, &val, sizeof val, 0);
sc 1890 dev/usb/if_uath.c (void)uath_write_multi(sc, 0x13, ic->ic_myaddr, IEEE80211_ADDR_LEN);
sc 1892 dev/usb/if_uath.c (void)uath_write_reg(sc, 0x02, 0x00000001);
sc 1893 dev/usb/if_uath.c (void)uath_write_reg(sc, 0x0e, 0x0000003f);
sc 1894 dev/usb/if_uath.c (void)uath_write_reg(sc, 0x10, 0x00000001);
sc 1895 dev/usb/if_uath.c (void)uath_write_reg(sc, 0x06, 0x0000001e);
sc 1901 dev/usb/if_uath.c struct uath_rx_data *data = SLIST_FIRST(&sc->rx_freelist);
sc 1903 dev/usb/if_uath.c usbd_setup_xfer(data->xfer, sc->data_rx_pipe, data, data->buf,
sc 1904 dev/usb/if_uath.c sc->rxbufsz, USBD_SHORT_XFER_OK | USBD_NO_COPY,
sc 1909 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 1912 dev/usb/if_uath.c SLIST_REMOVE_HEAD(&sc->rx_freelist, next);
sc 1915 dev/usb/if_uath.c error = uath_cmd_read(sc, UATH_CMD_07, 0, NULL, &val,
sc 1919 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 1926 dev/usb/if_uath.c if ((error = uath_set_chan(sc, ic->ic_bss->ni_chan)) != 0) {
sc 1927 dev/usb/if_uath.c printf("%s: could not set channel\n", sc->sc_dev.dv_xname);
sc 1931 dev/usb/if_uath.c if ((error = uath_wme_init(sc)) != 0) {
sc 1933 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 1938 dev/usb/if_uath.c (void)uath_write_reg(sc, 0x19, 0x00000000);
sc 1939 dev/usb/if_uath.c (void)uath_write_reg(sc, 0x1a, 0x0000003c);
sc 1940 dev/usb/if_uath.c (void)uath_write_reg(sc, 0x1b, 0x0000003c);
sc 1941 dev/usb/if_uath.c (void)uath_write_reg(sc, 0x1c, 0x00000000);
sc 1942 dev/usb/if_uath.c (void)uath_write_reg(sc, 0x1e, 0x00000000);
sc 1943 dev/usb/if_uath.c (void)uath_write_reg(sc, 0x1f, 0x00000003);
sc 1944 dev/usb/if_uath.c (void)uath_write_reg(sc, 0x0c, 0x00000000);
sc 1945 dev/usb/if_uath.c (void)uath_write_reg(sc, 0x0f, 0x00000002);
sc 1946 dev/usb/if_uath.c (void)uath_write_reg(sc, 0x0a, 0x00000007); /* XXX retry? */
sc 1947 dev/usb/if_uath.c (void)uath_write_reg(sc, 0x09, ic->ic_rtsthreshold);
sc 1950 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_27, &val, sizeof val, 0);
sc 1951 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_27, &val, sizeof val, 0);
sc 1952 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_1B, NULL, 0, 0);
sc 1954 dev/usb/if_uath.c if ((error = uath_set_keys(sc)) != 0) {
sc 1956 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 1961 dev/usb/if_uath.c (void)uath_set_rxfilter(sc, 0x0000, 4);
sc 1962 dev/usb/if_uath.c (void)uath_set_rxfilter(sc, 0x0817, 1);
sc 1966 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_31, &cmd31, sizeof cmd31, 0);
sc 1985 dev/usb/if_uath.c struct uath_softc *sc = ifp->if_softc;
sc 1986 dev/usb/if_uath.c struct ieee80211com *ic = &sc->sc_ic;
sc 1992 dev/usb/if_uath.c sc->sc_tx_timer = 0;
sc 1999 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_SET_STATE, &val, sizeof val, 0);
sc 2000 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_RESET, NULL, 0, 0);
sc 2003 dev/usb/if_uath.c (void)uath_cmd_write(sc, UATH_CMD_15, &val, sizeof val, 0);
sc 2006 dev/usb/if_uath.c (void)uath_cmd_read(sc, UATH_CMD_SHUTDOWN, NULL, 0, NULL,
sc 2011 dev/usb/if_uath.c usbd_abort_pipe(sc->data_tx_pipe);
sc 2012 dev/usb/if_uath.c usbd_abort_pipe(sc->data_rx_pipe);
sc 2013 dev/usb/if_uath.c usbd_abort_pipe(sc->cmd_tx_pipe);
sc 2025 dev/usb/if_uath.c uath_loadfirmware(struct uath_softc *sc, const u_char *fw, int len)
sc 2032 dev/usb/if_uath.c if ((ctlxfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) {
sc 2034 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 2041 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 2046 dev/usb/if_uath.c if ((txxfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) {
sc 2048 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 2055 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 2060 dev/usb/if_uath.c if ((rxxfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) {
sc 2062 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 2069 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 2088 dev/usb/if_uath.c usbd_setup_xfer(ctlxfer, sc->cmd_tx_pipe, sc, txblock,
sc 2093 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 2099 dev/usb/if_uath.c usbd_setup_xfer(txxfer, sc->data_tx_pipe, sc, txdata, mlen,
sc 2103 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 2108 dev/usb/if_uath.c usbd_setup_xfer(rxxfer, sc->cmd_rx_pipe, sc, rxblock,
sc 2113 dev/usb/if_uath.c sc->sc_dev.dv_xname);
sc 57 dev/usb/if_uathvar.h struct uath_softc *sc;
sc 64 dev/usb/if_uathvar.h struct uath_softc *sc;
sc 71 dev/usb/if_uathvar.h struct uath_softc *sc;
sc 78 dev/usb/if_uathvar.h struct uath_softc *sc;
sc 94 dev/usb/if_uathvar.h #define UATH_COND_INIT(sc) ((caddr_t)sc + 1)
sc 95 dev/usb/if_uathvar.h #define UATH_COND_NOREF(sc) ((caddr_t)sc + 2)
sc 153 dev/usb/if_udav.c #define UDAV_SETBIT(sc, reg, x) \
sc 154 dev/usb/if_udav.c udav_csr_write1(sc, reg, udav_csr_read1(sc, reg) | (x))
sc 156 dev/usb/if_udav.c #define UDAV_CLRBIT(sc, reg, x) \
sc 157 dev/usb/if_udav.c udav_csr_write1(sc, reg, udav_csr_read1(sc, reg) & ~(x))
sc 190 dev/usb/if_udav.c struct udav_softc *sc = (struct udav_softc *)self;
sc 198 dev/usb/if_udav.c char *devname = sc->sc_dev.dv_xname;
sc 215 dev/usb/if_udav.c usb_init_task(&sc->sc_tick_task, udav_tick_task, sc);
sc 216 dev/usb/if_udav.c rw_init(&sc->sc_mii_lock, "udavmii");
sc 217 dev/usb/if_udav.c usb_init_task(&sc->sc_stop_task, (void (*)(void *)) udav_stop_task, sc);
sc 226 dev/usb/if_udav.c sc->sc_udev = dev;
sc 227 dev/usb/if_udav.c sc->sc_ctl_iface = iface;
sc 228 dev/usb/if_udav.c sc->sc_flags = udav_lookup(uaa->vendor, uaa->product)->udav_flags;
sc 231 dev/usb/if_udav.c id = usbd_get_interface_descriptor(sc->sc_ctl_iface);
sc 234 dev/usb/if_udav.c sc->sc_bulkin_no = sc->sc_bulkout_no = sc->sc_intrin_no = -1;
sc 236 dev/usb/if_udav.c ed = usbd_interface2endpoint_descriptor(sc->sc_ctl_iface, i);
sc 243 dev/usb/if_udav.c sc->sc_bulkin_no = ed->bEndpointAddress; /* RX */
sc 246 dev/usb/if_udav.c sc->sc_bulkout_no = ed->bEndpointAddress; /* TX */
sc 249 dev/usb/if_udav.c sc->sc_intrin_no = ed->bEndpointAddress; /* Status */
sc 252 dev/usb/if_udav.c if (sc->sc_bulkin_no == -1 || sc->sc_bulkout_no == -1 ||
sc 253 dev/usb/if_udav.c sc->sc_intrin_no == -1) {
sc 261 dev/usb/if_udav.c udav_reset(sc);
sc 264 dev/usb/if_udav.c err = udav_csr_read(sc, UDAV_PAR, (void *)eaddr, ETHER_ADDR_LEN);
sc 274 dev/usb/if_udav.c bcopy(eaddr, (char *)&sc->sc_ac.ac_enaddr, ETHER_ADDR_LEN);
sc 277 dev/usb/if_udav.c ifp = GET_IFP(sc);
sc 278 dev/usb/if_udav.c ifp->if_softc = sc;
sc 290 dev/usb/if_udav.c mii = &sc->sc_mii;
sc 309 dev/usb/if_udav.c timeout_set(&sc->sc_stat_ch, NULL, NULL);
sc 310 dev/usb/if_udav.c sc->sc_attached = 1;
sc 313 dev/usb/if_udav.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, dev, &sc->sc_dev);
sc 318 dev/usb/if_udav.c sc->sc_dying = 1;
sc 325 dev/usb/if_udav.c struct udav_softc *sc = (struct udav_softc *)self;
sc 326 dev/usb/if_udav.c struct ifnet *ifp = GET_IFP(sc);
sc 329 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 332 dev/usb/if_udav.c if (!sc->sc_attached)
sc 335 dev/usb/if_udav.c timeout_del(&sc->sc_stat_ch);
sc 338 dev/usb/if_udav.c usb_rem_task(sc->sc_udev, &sc->sc_tick_task);
sc 339 dev/usb/if_udav.c usb_rem_task(sc->sc_udev, &sc->sc_stop_task);
sc 343 dev/usb/if_udav.c if (--sc->sc_refcnt >= 0) {
sc 345 dev/usb/if_udav.c usb_detach_wait(&sc->sc_dev);
sc 348 dev/usb/if_udav.c udav_stop(GET_IFP(sc), 1);
sc 350 dev/usb/if_udav.c mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
sc 351 dev/usb/if_udav.c ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
sc 356 dev/usb/if_udav.c if (sc->sc_pipe_tx != NULL)
sc 358 dev/usb/if_udav.c sc->sc_dev.dv_xname);
sc 359 dev/usb/if_udav.c if (sc->sc_pipe_rx != NULL)
sc 361 dev/usb/if_udav.c sc->sc_dev.dv_xname);
sc 362 dev/usb/if_udav.c if (sc->sc_pipe_intr != NULL)
sc 364 dev/usb/if_udav.c sc->sc_dev.dv_xname);
sc 366 dev/usb/if_udav.c sc->sc_attached = 0;
sc 370 dev/usb/if_udav.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 371 dev/usb/if_udav.c &sc->sc_dev);
sc 379 dev/usb/if_udav.c udav_mem_read(struct udav_softc *sc, int offset, void *buf, int len)
sc 384 dev/usb/if_udav.c if (sc == NULL)
sc 388 dev/usb/if_udav.c ("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 390 dev/usb/if_udav.c if (sc->sc_dying)
sc 402 dev/usb/if_udav.c sc->sc_refcnt++;
sc 403 dev/usb/if_udav.c err = usbd_do_request(sc->sc_udev, &req, buf);
sc 404 dev/usb/if_udav.c if (--sc->sc_refcnt < 0)
sc 405 dev/usb/if_udav.c usb_detach_wakeup(&sc->sc_dev);
sc 408 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, offset, err));
sc 416 dev/usb/if_udav.c udav_mem_write(struct udav_softc *sc, int offset, void *buf, int len)
sc 421 dev/usb/if_udav.c if (sc == NULL)
sc 425 dev/usb/if_udav.c ("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 427 dev/usb/if_udav.c if (sc->sc_dying)
sc 439 dev/usb/if_udav.c sc->sc_refcnt++;
sc 440 dev/usb/if_udav.c err = usbd_do_request(sc->sc_udev, &req, buf);
sc 441 dev/usb/if_udav.c if (--sc->sc_refcnt < 0)
sc 442 dev/usb/if_udav.c usb_detach_wakeup(&sc->sc_dev);
sc 445 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, offset, err));
sc 453 dev/usb/if_udav.c udav_mem_write1(struct udav_softc *sc, int offset, unsigned char ch)
sc 458 dev/usb/if_udav.c if (sc == NULL)
sc 462 dev/usb/if_udav.c ("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 464 dev/usb/if_udav.c if (sc->sc_dying)
sc 475 dev/usb/if_udav.c sc->sc_refcnt++;
sc 476 dev/usb/if_udav.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 477 dev/usb/if_udav.c if (--sc->sc_refcnt < 0)
sc 478 dev/usb/if_udav.c usb_detach_wakeup(&sc->sc_dev);
sc 481 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, offset, err));
sc 490 dev/usb/if_udav.c udav_csr_read(struct udav_softc *sc, int offset, void *buf, int len)
sc 495 dev/usb/if_udav.c if (sc == NULL)
sc 499 dev/usb/if_udav.c ("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 501 dev/usb/if_udav.c if (sc->sc_dying)
sc 513 dev/usb/if_udav.c sc->sc_refcnt++;
sc 514 dev/usb/if_udav.c err = usbd_do_request(sc->sc_udev, &req, buf);
sc 515 dev/usb/if_udav.c if (--sc->sc_refcnt < 0)
sc 516 dev/usb/if_udav.c usb_detach_wakeup(&sc->sc_dev);
sc 519 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, offset, err));
sc 527 dev/usb/if_udav.c udav_csr_write(struct udav_softc *sc, int offset, void *buf, int len)
sc 532 dev/usb/if_udav.c if (sc == NULL)
sc 536 dev/usb/if_udav.c ("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 538 dev/usb/if_udav.c if (sc->sc_dying)
sc 550 dev/usb/if_udav.c sc->sc_refcnt++;
sc 551 dev/usb/if_udav.c err = usbd_do_request(sc->sc_udev, &req, buf);
sc 552 dev/usb/if_udav.c if (--sc->sc_refcnt < 0)
sc 553 dev/usb/if_udav.c usb_detach_wakeup(&sc->sc_dev);
sc 556 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, offset, err));
sc 563 dev/usb/if_udav.c udav_csr_read1(struct udav_softc *sc, int offset)
sc 567 dev/usb/if_udav.c if (sc == NULL)
sc 571 dev/usb/if_udav.c ("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 573 dev/usb/if_udav.c if (sc->sc_dying)
sc 576 dev/usb/if_udav.c return (udav_csr_read(sc, offset, &val, 1) ? 0 : val);
sc 581 dev/usb/if_udav.c udav_csr_write1(struct udav_softc *sc, int offset, unsigned char ch)
sc 586 dev/usb/if_udav.c if (sc == NULL)
sc 590 dev/usb/if_udav.c ("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 592 dev/usb/if_udav.c if (sc->sc_dying)
sc 603 dev/usb/if_udav.c sc->sc_refcnt++;
sc 604 dev/usb/if_udav.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 605 dev/usb/if_udav.c if (--sc->sc_refcnt < 0)
sc 606 dev/usb/if_udav.c usb_detach_wakeup(&sc->sc_dev);
sc 609 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, offset, err));
sc 618 dev/usb/if_udav.c struct udav_softc *sc = ifp->if_softc;
sc 619 dev/usb/if_udav.c struct mii_data *mii = GET_MII(sc);
sc 623 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 625 dev/usb/if_udav.c if (sc->sc_dying)
sc 633 dev/usb/if_udav.c eaddr = sc->sc_ac.ac_enaddr;
sc 634 dev/usb/if_udav.c udav_csr_write(sc, UDAV_PAR, eaddr, ETHER_ADDR_LEN);
sc 638 dev/usb/if_udav.c UDAV_CLRBIT(sc, UDAV_NCR, UDAV_NCR_LBK0 | UDAV_NCR_LBK1);
sc 641 dev/usb/if_udav.c UDAV_SETBIT(sc, UDAV_RCR, UDAV_RCR_DIS_LONG | UDAV_RCR_DIS_CRC);
sc 645 dev/usb/if_udav.c UDAV_SETBIT(sc, UDAV_RCR, UDAV_RCR_ALL|UDAV_RCR_PRMSC);
sc 647 dev/usb/if_udav.c UDAV_CLRBIT(sc, UDAV_RCR, UDAV_RCR_ALL|UDAV_RCR_PRMSC);
sc 650 dev/usb/if_udav.c if (udav_tx_list_init(sc) == ENOBUFS) {
sc 651 dev/usb/if_udav.c printf("%s: tx list init failed\n", sc->sc_dev.dv_xname);
sc 657 dev/usb/if_udav.c if (udav_rx_list_init(sc) == ENOBUFS) {
sc 658 dev/usb/if_udav.c printf("%s: rx list init failed\n", sc->sc_dev.dv_xname);
sc 664 dev/usb/if_udav.c udav_setmulti(sc);
sc 667 dev/usb/if_udav.c UDAV_SETBIT(sc, UDAV_RCR, UDAV_RCR_RXEN);
sc 670 dev/usb/if_udav.c UDAV_SETBIT(sc, UDAV_GPCR, UDAV_GPCR_GEP_CNTL0);
sc 671 dev/usb/if_udav.c UDAV_CLRBIT(sc, UDAV_GPR, UDAV_GPR_GEPIO0);
sc 675 dev/usb/if_udav.c if (sc->sc_pipe_tx == NULL || sc->sc_pipe_rx == NULL) {
sc 676 dev/usb/if_udav.c if (udav_openpipes(sc)) {
sc 687 dev/usb/if_udav.c timeout_del(&sc->sc_stat_ch);
sc 688 dev/usb/if_udav.c timeout_set(&sc->sc_stat_ch, udav_tick, sc);
sc 689 dev/usb/if_udav.c timeout_add(&sc->sc_stat_ch, hz);
sc 695 dev/usb/if_udav.c udav_reset(struct udav_softc *sc)
sc 699 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 701 dev/usb/if_udav.c if (sc->sc_dying)
sc 710 dev/usb/if_udav.c UDAV_CLRBIT(sc, UDAV_NCR, UDAV_NCR_EXT_PHY);
sc 712 dev/usb/if_udav.c if (sc->sc_flags & UDAV_EXT_PHY) {
sc 713 dev/usb/if_udav.c UDAV_SETBIT(sc, UDAV_NCR, UDAV_NCR_EXT_PHY);
sc 715 dev/usb/if_udav.c UDAV_CLRBIT(sc, UDAV_NCR, UDAV_NCR_EXT_PHY);
sc 719 dev/usb/if_udav.c UDAV_SETBIT(sc, UDAV_NCR, UDAV_NCR_RST);
sc 722 dev/usb/if_udav.c if (!(udav_csr_read1(sc, UDAV_NCR) & UDAV_NCR_RST))
sc 732 dev/usb/if_udav.c struct udav_softc *sc = (struct udav_softc *)self;
sc 734 dev/usb/if_udav.c DPRINTF(("%s: %s: enter, act=%d\n", sc->sc_dev.dv_xname,
sc 741 dev/usb/if_udav.c sc->sc_dying = 1;
sc 753 dev/usb/if_udav.c udav_setmulti(struct udav_softc *sc)
sc 761 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 763 dev/usb/if_udav.c if (sc->sc_dying)
sc 766 dev/usb/if_udav.c ifp = GET_IFP(sc);
sc 769 dev/usb/if_udav.c UDAV_SETBIT(sc, UDAV_RCR, UDAV_RCR_ALL|UDAV_RCR_PRMSC);
sc 774 dev/usb/if_udav.c UDAV_SETBIT(sc, UDAV_RCR, UDAV_RCR_ALL);
sc 775 dev/usb/if_udav.c UDAV_CLRBIT(sc, UDAV_RCR, UDAV_RCR_PRMSC);
sc 782 dev/usb/if_udav.c udav_csr_write(sc, UDAV_MAR, hashes, sizeof(hashes));
sc 785 dev/usb/if_udav.c ETHER_FIRST_MULTI(step, &sc->sc_ac, enm);
sc 798 dev/usb/if_udav.c UDAV_CLRBIT(sc, UDAV_RCR, UDAV_RCR_ALL);
sc 801 dev/usb/if_udav.c udav_csr_write(sc, UDAV_MAR, hashes, sizeof(hashes));
sc 805 dev/usb/if_udav.c udav_openpipes(struct udav_softc *sc)
sc 812 dev/usb/if_udav.c if (sc->sc_dying)
sc 815 dev/usb/if_udav.c sc->sc_refcnt++;
sc 818 dev/usb/if_udav.c err = usbd_open_pipe(sc->sc_ctl_iface, sc->sc_bulkin_no,
sc 819 dev/usb/if_udav.c USBD_EXCLUSIVE_USE, &sc->sc_pipe_rx);
sc 822 dev/usb/if_udav.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 828 dev/usb/if_udav.c err = usbd_open_pipe(sc->sc_ctl_iface, sc->sc_bulkout_no,
sc 829 dev/usb/if_udav.c USBD_EXCLUSIVE_USE, &sc->sc_pipe_tx);
sc 832 dev/usb/if_udav.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 840 dev/usb/if_udav.c err = usbd_open_pipe_intr(sc->sc_ctl_iface, sc->sc_intrin_no,
sc 841 dev/usb/if_udav.c USBD_EXCLUSIVE_USE, &sc->sc_pipe_intr, sc,
sc 842 dev/usb/if_udav.c &sc->sc_cdata.udav_ibuf, UDAV_INTR_PKGLEN,
sc 846 dev/usb/if_udav.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 855 dev/usb/if_udav.c c = &sc->sc_cdata.udav_rx_chain[i];
sc 856 dev/usb/if_udav.c usbd_setup_xfer(c->udav_xfer, sc->sc_pipe_rx,
sc 861 dev/usb/if_udav.c DPRINTF(("%s: %s: start read\n", sc->sc_dev.dv_xname,
sc 866 dev/usb/if_udav.c if (--sc->sc_refcnt < 0)
sc 867 dev/usb/if_udav.c usb_detach_wakeup(&sc->sc_dev);
sc 873 dev/usb/if_udav.c udav_newbuf(struct udav_softc *sc, struct udav_chain *c, struct mbuf *m)
sc 877 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 883 dev/usb/if_udav.c "-- packet dropped!\n", sc->sc_dev.dv_xname);
sc 889 dev/usb/if_udav.c "-- packet dropped!\n", sc->sc_dev.dv_xname);
sc 908 dev/usb/if_udav.c udav_rx_list_init(struct udav_softc *sc)
sc 914 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 916 dev/usb/if_udav.c cd = &sc->sc_cdata;
sc 919 dev/usb/if_udav.c c->udav_sc = sc;
sc 921 dev/usb/if_udav.c if (udav_newbuf(sc, c, NULL) == ENOBUFS)
sc 924 dev/usb/if_udav.c c->udav_xfer = usbd_alloc_xfer(sc->sc_udev);
sc 939 dev/usb/if_udav.c udav_tx_list_init(struct udav_softc *sc)
sc 945 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 947 dev/usb/if_udav.c cd = &sc->sc_cdata;
sc 950 dev/usb/if_udav.c c->udav_sc = sc;
sc 954 dev/usb/if_udav.c c->udav_xfer = usbd_alloc_xfer(sc->sc_udev);
sc 971 dev/usb/if_udav.c struct udav_softc *sc = ifp->if_softc;
sc 974 dev/usb/if_udav.c DPRINTF(("%s: %s: enter, link=%d\n", sc->sc_dev.dv_xname,
sc 975 dev/usb/if_udav.c __func__, sc->sc_link));
sc 977 dev/usb/if_udav.c if (sc->sc_dying)
sc 980 dev/usb/if_udav.c if (!sc->sc_link)
sc 990 dev/usb/if_udav.c if (udav_send(sc, m_head, 0)) {
sc 1009 dev/usb/if_udav.c udav_send(struct udav_softc *sc, struct mbuf *m, int idx)
sc 1015 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname,__func__));
sc 1017 dev/usb/if_udav.c c = &sc->sc_cdata.udav_tx_chain[idx];
sc 1035 dev/usb/if_udav.c usbd_setup_xfer(c->udav_xfer, sc->sc_pipe_tx, c, c->udav_buf, total_len,
sc 1040 dev/usb/if_udav.c sc->sc_refcnt++;
sc 1042 dev/usb/if_udav.c if (--sc->sc_refcnt < 0)
sc 1043 dev/usb/if_udav.c usb_detach_wakeup(&sc->sc_dev);
sc 1045 dev/usb/if_udav.c printf("%s: udav_send error=%s\n", sc->sc_dev.dv_xname,
sc 1048 dev/usb/if_udav.c usb_add_task(sc->sc_udev, &sc->sc_stop_task);
sc 1052 dev/usb/if_udav.c DPRINTF(("%s: %s: send %d bytes\n", sc->sc_dev.dv_xname,
sc 1055 dev/usb/if_udav.c sc->sc_cdata.udav_tx_cnt++;
sc 1064 dev/usb/if_udav.c struct udav_softc *sc = c->udav_sc;
sc 1065 dev/usb/if_udav.c struct ifnet *ifp = GET_IFP(sc);
sc 1068 dev/usb/if_udav.c if (sc->sc_dying)
sc 1073 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 1084 dev/usb/if_udav.c printf("%s: usb error on tx: %s\n", sc->sc_dev.dv_xname,
sc 1087 dev/usb/if_udav.c sc->sc_refcnt++;
sc 1088 dev/usb/if_udav.c usbd_clear_endpoint_stall_async(sc->sc_pipe_tx);
sc 1089 dev/usb/if_udav.c if (--sc->sc_refcnt < 0)
sc 1090 dev/usb/if_udav.c usb_detach_wakeup(&sc->sc_dev);
sc 1111 dev/usb/if_udav.c struct udav_softc *sc = c->udav_sc;
sc 1112 dev/usb/if_udav.c struct ifnet *ifp = GET_IFP(sc);
sc 1118 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname,__func__));
sc 1120 dev/usb/if_udav.c if (sc->sc_dying)
sc 1126 dev/usb/if_udav.c sc->sc_rx_errs++;
sc 1127 dev/usb/if_udav.c if (usbd_ratecheck(&sc->sc_rx_notice)) {
sc 1129 dev/usb/if_udav.c sc->sc_dev.dv_xname, sc->sc_rx_errs,
sc 1131 dev/usb/if_udav.c sc->sc_rx_errs = 0;
sc 1134 dev/usb/if_udav.c sc->sc_refcnt++;
sc 1135 dev/usb/if_udav.c usbd_clear_endpoint_stall_async(sc->sc_pipe_rx);
sc 1136 dev/usb/if_udav.c if (--sc->sc_refcnt < 0)
sc 1137 dev/usb/if_udav.c usb_detach_wakeup(&sc->sc_dev);
sc 1171 dev/usb/if_udav.c if (udav_newbuf(sc, c, NULL) == ENOBUFS) {
sc 1181 dev/usb/if_udav.c DPRINTF(("%s: %s: deliver %d\n", sc->sc_dev.dv_xname,
sc 1190 dev/usb/if_udav.c usbd_setup_xfer(xfer, sc->sc_pipe_rx, c, c->udav_buf, UDAV_BUFSZ,
sc 1193 dev/usb/if_udav.c sc->sc_refcnt++;
sc 1195 dev/usb/if_udav.c if (--sc->sc_refcnt < 0)
sc 1196 dev/usb/if_udav.c usb_detach_wakeup(&sc->sc_dev);
sc 1198 dev/usb/if_udav.c DPRINTF(("%s: %s: start rx\n", sc->sc_dev.dv_xname, __func__));
sc 1210 dev/usb/if_udav.c struct udav_softc *sc = ifp->if_softc;
sc 1216 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 1218 dev/usb/if_udav.c if (sc->sc_dying)
sc 1226 dev/usb/if_udav.c mii = GET_MII(sc);
sc 1236 dev/usb/if_udav.c arp_ifinit(&sc->sc_ac, ifa);
sc 1252 dev/usb/if_udav.c UDAV_SETBIT(sc, UDAV_RCR,
sc 1256 dev/usb/if_udav.c UDAV_CLRBIT(sc, UDAV_RCR,
sc 1269 dev/usb/if_udav.c ether_addmulti(ifr, &sc->sc_ac) :
sc 1270 dev/usb/if_udav.c ether_delmulti(ifr, &sc->sc_ac);
sc 1274 dev/usb/if_udav.c udav_setmulti(sc);
sc 1291 dev/usb/if_udav.c struct udav_softc *sc = ifp->if_softc;
sc 1296 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 1299 dev/usb/if_udav.c printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
sc 1302 dev/usb/if_udav.c c = &sc->sc_cdata.udav_tx_chain[0];
sc 1312 dev/usb/if_udav.c udav_stop_task(struct udav_softc *sc)
sc 1314 dev/usb/if_udav.c udav_stop(GET_IFP(sc), 1);
sc 1321 dev/usb/if_udav.c struct udav_softc *sc = ifp->if_softc;
sc 1325 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 1330 dev/usb/if_udav.c udav_reset(sc);
sc 1332 dev/usb/if_udav.c timeout_del(&sc->sc_stat_ch);
sc 1336 dev/usb/if_udav.c if (sc->sc_pipe_rx != NULL) {
sc 1337 dev/usb/if_udav.c err = usbd_abort_pipe(sc->sc_pipe_rx);
sc 1340 dev/usb/if_udav.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1341 dev/usb/if_udav.c err = usbd_close_pipe(sc->sc_pipe_rx);
sc 1344 dev/usb/if_udav.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1345 dev/usb/if_udav.c sc->sc_pipe_rx = NULL;
sc 1349 dev/usb/if_udav.c if (sc->sc_pipe_tx != NULL) {
sc 1350 dev/usb/if_udav.c err = usbd_abort_pipe(sc->sc_pipe_tx);
sc 1353 dev/usb/if_udav.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1354 dev/usb/if_udav.c err = usbd_close_pipe(sc->sc_pipe_tx);
sc 1357 dev/usb/if_udav.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1358 dev/usb/if_udav.c sc->sc_pipe_tx = NULL;
sc 1364 dev/usb/if_udav.c if (sc->sc_pipe_intr != NULL) {
sc 1365 dev/usb/if_udav.c err = usbd_abort_pipe(sc->sc_pipe_intr);
sc 1368 dev/usb/if_udav.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1369 dev/usb/if_udav.c err = usbd_close_pipe(sc->sc_pipe_intr);
sc 1372 dev/usb/if_udav.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1373 dev/usb/if_udav.c sc->sc_pipe_intr = NULL;
sc 1379 dev/usb/if_udav.c if (sc->sc_cdata.udav_rx_chain[i].udav_mbuf != NULL) {
sc 1380 dev/usb/if_udav.c m_freem(sc->sc_cdata.udav_rx_chain[i].udav_mbuf);
sc 1381 dev/usb/if_udav.c sc->sc_cdata.udav_rx_chain[i].udav_mbuf = NULL;
sc 1383 dev/usb/if_udav.c if (sc->sc_cdata.udav_rx_chain[i].udav_xfer != NULL) {
sc 1384 dev/usb/if_udav.c usbd_free_xfer(sc->sc_cdata.udav_rx_chain[i].udav_xfer);
sc 1385 dev/usb/if_udav.c sc->sc_cdata.udav_rx_chain[i].udav_xfer = NULL;
sc 1391 dev/usb/if_udav.c if (sc->sc_cdata.udav_tx_chain[i].udav_mbuf != NULL) {
sc 1392 dev/usb/if_udav.c m_freem(sc->sc_cdata.udav_tx_chain[i].udav_mbuf);
sc 1393 dev/usb/if_udav.c sc->sc_cdata.udav_tx_chain[i].udav_mbuf = NULL;
sc 1395 dev/usb/if_udav.c if (sc->sc_cdata.udav_tx_chain[i].udav_xfer != NULL) {
sc 1396 dev/usb/if_udav.c usbd_free_xfer(sc->sc_cdata.udav_tx_chain[i].udav_xfer);
sc 1397 dev/usb/if_udav.c sc->sc_cdata.udav_tx_chain[i].udav_xfer = NULL;
sc 1401 dev/usb/if_udav.c sc->sc_link = 0;
sc 1408 dev/usb/if_udav.c struct udav_softc *sc = ifp->if_softc;
sc 1409 dev/usb/if_udav.c struct mii_data *mii = GET_MII(sc);
sc 1411 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 1413 dev/usb/if_udav.c if (sc->sc_dying)
sc 1416 dev/usb/if_udav.c sc->sc_link = 0;
sc 1431 dev/usb/if_udav.c struct udav_softc *sc = ifp->if_softc;
sc 1432 dev/usb/if_udav.c struct mii_data *mii = GET_MII(sc);
sc 1434 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 1436 dev/usb/if_udav.c if (sc->sc_dying)
sc 1453 dev/usb/if_udav.c struct udav_softc *sc = xsc;
sc 1455 dev/usb/if_udav.c if (sc == NULL)
sc 1458 dev/usb/if_udav.c DPRINTFN(0xff, ("%s: %s: enter\n", sc->sc_dev.dv_xname,
sc 1461 dev/usb/if_udav.c if (sc->sc_dying)
sc 1465 dev/usb/if_udav.c usb_add_task(sc->sc_udev, &sc->sc_tick_task);
sc 1471 dev/usb/if_udav.c struct udav_softc *sc = xsc;
sc 1476 dev/usb/if_udav.c if (sc == NULL)
sc 1479 dev/usb/if_udav.c DPRINTFN(0xff, ("%s: %s: enter\n", sc->sc_dev.dv_xname,
sc 1482 dev/usb/if_udav.c if (sc->sc_dying)
sc 1485 dev/usb/if_udav.c ifp = GET_IFP(sc);
sc 1486 dev/usb/if_udav.c mii = GET_MII(sc);
sc 1494 dev/usb/if_udav.c if (!sc->sc_link && mii->mii_media_status & IFM_ACTIVE &&
sc 1497 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__));
sc 1498 dev/usb/if_udav.c sc->sc_link++;
sc 1503 dev/usb/if_udav.c timeout_del(&sc->sc_stat_ch);
sc 1504 dev/usb/if_udav.c timeout_set(&sc->sc_stat_ch, udav_tick, sc);
sc 1505 dev/usb/if_udav.c timeout_add(&sc->sc_stat_ch, hz);
sc 1512 dev/usb/if_udav.c udav_lock_mii(struct udav_softc *sc)
sc 1514 dev/usb/if_udav.c DPRINTFN(0xff, ("%s: %s: enter\n", sc->sc_dev.dv_xname,
sc 1517 dev/usb/if_udav.c sc->sc_refcnt++;
sc 1518 dev/usb/if_udav.c rw_enter_write(&sc->sc_mii_lock);
sc 1522 dev/usb/if_udav.c udav_unlock_mii(struct udav_softc *sc)
sc 1524 dev/usb/if_udav.c DPRINTFN(0xff, ("%s: %s: enter\n", sc->sc_dev.dv_xname,
sc 1527 dev/usb/if_udav.c rw_exit_write(&sc->sc_mii_lock);
sc 1528 dev/usb/if_udav.c if (--sc->sc_refcnt < 0)
sc 1529 dev/usb/if_udav.c usb_detach_wakeup(&sc->sc_dev);
sc 1535 dev/usb/if_udav.c struct udav_softc *sc;
sc 1542 dev/usb/if_udav.c sc = (void *)dev;
sc 1545 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, phy, reg));
sc 1547 dev/usb/if_udav.c if (sc->sc_dying) {
sc 1549 dev/usb/if_udav.c printf("%s: %s: dying\n", sc->sc_dev.dv_xname,
sc 1558 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, phy));
sc 1562 dev/usb/if_udav.c udav_lock_mii(sc);
sc 1565 dev/usb/if_udav.c udav_csr_write1(sc, UDAV_EPAR,
sc 1569 dev/usb/if_udav.c udav_csr_write1(sc, UDAV_EPCR, UDAV_EPCR_EPOS | UDAV_EPCR_ERPRR);
sc 1574 dev/usb/if_udav.c UDAV_CLRBIT(sc, UDAV_EPCR, UDAV_EPCR_ERPRR);
sc 1577 dev/usb/if_udav.c udav_csr_read(sc, UDAV_EPDRL, val, 2);
sc 1579 dev/usb/if_udav.c udav_unlock_mii(sc);
sc 1584 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, phy, reg, data16));
sc 1592 dev/usb/if_udav.c struct udav_softc *sc;
sc 1598 dev/usb/if_udav.c sc = (void *)dev;
sc 1601 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, phy, reg, data));
sc 1603 dev/usb/if_udav.c if (sc->sc_dying) {
sc 1605 dev/usb/if_udav.c printf("%s: %s: dying\n", sc->sc_dev.dv_xname,
sc 1614 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, phy));
sc 1618 dev/usb/if_udav.c udav_lock_mii(sc);
sc 1621 dev/usb/if_udav.c udav_csr_write1(sc, UDAV_EPAR,
sc 1627 dev/usb/if_udav.c udav_csr_write(sc, UDAV_EPDRL, val, 2);
sc 1630 dev/usb/if_udav.c udav_csr_write1(sc, UDAV_EPCR, UDAV_EPCR_EPOS | UDAV_EPCR_ERPRW);
sc 1635 dev/usb/if_udav.c UDAV_CLRBIT(sc, UDAV_EPCR, UDAV_EPCR_ERPRW);
sc 1637 dev/usb/if_udav.c udav_unlock_mii(sc);
sc 1646 dev/usb/if_udav.c struct udav_softc *sc;
sc 1651 dev/usb/if_udav.c sc = (void *)dev;
sc 1652 dev/usb/if_udav.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 138 dev/usb/if_udavreg.h #define GET_IFP(sc) (&(sc)->sc_ac.ac_if)
sc 139 dev/usb/if_udavreg.h #define GET_MII(sc) (&(sc)->sc_mii)
sc 237 dev/usb/if_upl.c struct upl_softc *sc = (struct upl_softc *)self;
sc 249 dev/usb/if_upl.c DPRINTFN(5,(" : upl_attach: sc=%p, dev=%p", sc, dev));
sc 252 dev/usb/if_upl.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 258 dev/usb/if_upl.c sc->sc_dev.dv_xname);
sc 262 dev/usb/if_upl.c sc->sc_udev = dev;
sc 263 dev/usb/if_upl.c sc->sc_product = uaa->product;
sc 264 dev/usb/if_upl.c sc->sc_vendor = uaa->vendor;
sc 269 dev/usb/if_upl.c sc->sc_dev.dv_xname);
sc 273 dev/usb/if_upl.c sc->sc_iface = iface;
sc 281 dev/usb/if_upl.c sc->sc_dev.dv_xname, i);
sc 286 dev/usb/if_upl.c sc->sc_ed[UPL_ENDPT_RX] = ed->bEndpointAddress;
sc 289 dev/usb/if_upl.c sc->sc_ed[UPL_ENDPT_TX] = ed->bEndpointAddress;
sc 292 dev/usb/if_upl.c sc->sc_ed[UPL_ENDPT_INTR] = ed->bEndpointAddress;
sc 296 dev/usb/if_upl.c if (sc->sc_ed[UPL_ENDPT_RX] == 0 || sc->sc_ed[UPL_ENDPT_TX] == 0 ||
sc 297 dev/usb/if_upl.c sc->sc_ed[UPL_ENDPT_INTR] == 0) {
sc 298 dev/usb/if_upl.c printf("%s: missing endpoint\n", sc->sc_dev.dv_xname);
sc 305 dev/usb/if_upl.c ifp = &sc->sc_if;
sc 306 dev/usb/if_upl.c ifp->if_softc = sc;
sc 312 dev/usb/if_upl.c strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 325 dev/usb/if_upl.c sc->sc_attached = 1;
sc 328 dev/usb/if_upl.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 329 dev/usb/if_upl.c &sc->sc_dev);
sc 335 dev/usb/if_upl.c struct upl_softc *sc = (struct upl_softc *)self;
sc 336 dev/usb/if_upl.c struct ifnet *ifp = &sc->sc_if;
sc 339 dev/usb/if_upl.c DPRINTFN(2,("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 343 dev/usb/if_upl.c if (!sc->sc_attached) {
sc 350 dev/usb/if_upl.c upl_stop(sc);
sc 355 dev/usb/if_upl.c if (sc->sc_ep[UPL_ENDPT_TX] != NULL ||
sc 356 dev/usb/if_upl.c sc->sc_ep[UPL_ENDPT_RX] != NULL ||
sc 357 dev/usb/if_upl.c sc->sc_ep[UPL_ENDPT_INTR] != NULL)
sc 359 dev/usb/if_upl.c sc->sc_dev.dv_xname);
sc 362 dev/usb/if_upl.c sc->sc_attached = 0;
sc 365 dev/usb/if_upl.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 366 dev/usb/if_upl.c &sc->sc_dev);
sc 374 dev/usb/if_upl.c struct upl_softc *sc = (struct upl_softc *)self;
sc 376 dev/usb/if_upl.c DPRINTFN(2,("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 383 dev/usb/if_upl.c sc->sc_dying = 1;
sc 393 dev/usb/if_upl.c upl_newbuf(struct upl_softc *sc, struct upl_chain *c, struct mbuf *m)
sc 397 dev/usb/if_upl.c DPRINTFN(8,("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 403 dev/usb/if_upl.c "-- packet dropped!\n", sc->sc_dev.dv_xname);
sc 410 dev/usb/if_upl.c "-- packet dropped!\n", sc->sc_dev.dv_xname);
sc 427 dev/usb/if_upl.c upl_rx_list_init(struct upl_softc *sc)
sc 433 dev/usb/if_upl.c DPRINTFN(5,("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 435 dev/usb/if_upl.c cd = &sc->sc_cdata;
sc 438 dev/usb/if_upl.c c->upl_sc = sc;
sc 440 dev/usb/if_upl.c if (upl_newbuf(sc, c, NULL) == ENOBUFS)
sc 443 dev/usb/if_upl.c c->upl_xfer = usbd_alloc_xfer(sc->sc_udev);
sc 458 dev/usb/if_upl.c upl_tx_list_init(struct upl_softc *sc)
sc 464 dev/usb/if_upl.c DPRINTFN(5,("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 466 dev/usb/if_upl.c cd = &sc->sc_cdata;
sc 469 dev/usb/if_upl.c c->upl_sc = sc;
sc 473 dev/usb/if_upl.c c->upl_xfer = usbd_alloc_xfer(sc->sc_udev);
sc 495 dev/usb/if_upl.c struct upl_softc *sc = c->upl_sc;
sc 496 dev/usb/if_upl.c struct ifnet *ifp = &sc->sc_if;
sc 501 dev/usb/if_upl.c if (sc->sc_dying)
sc 510 dev/usb/if_upl.c sc->sc_rx_errs++;
sc 511 dev/usb/if_upl.c if (usbd_ratecheck(&sc->sc_rx_notice)) {
sc 513 dev/usb/if_upl.c sc->sc_dev.dv_xname, sc->sc_rx_errs,
sc 515 dev/usb/if_upl.c sc->sc_rx_errs = 0;
sc 518 dev/usb/if_upl.c usbd_clear_endpoint_stall_async(sc->sc_ep[UPL_ENDPT_RX]);
sc 525 dev/usb/if_upl.c sc->sc_dev.dv_xname, __func__, status, total_len));
sc 538 dev/usb/if_upl.c if (upl_newbuf(sc, c, NULL) == ENOBUFS) {
sc 555 dev/usb/if_upl.c DPRINTFN(10,("%s: %s: deliver %d\n", sc->sc_dev.dv_xname,
sc 566 dev/usb/if_upl.c usbd_setup_xfer(c->upl_xfer, sc->sc_ep[UPL_ENDPT_RX],
sc 571 dev/usb/if_upl.c DPRINTFN(10,("%s: %s: start rx\n", sc->sc_dev.dv_xname,
sc 584 dev/usb/if_upl.c struct upl_softc *sc = c->upl_sc;
sc 585 dev/usb/if_upl.c struct ifnet *ifp = &sc->sc_if;
sc 588 dev/usb/if_upl.c if (sc->sc_dying)
sc 593 dev/usb/if_upl.c DPRINTFN(10,("%s: %s: enter status=%d\n", sc->sc_dev.dv_xname,
sc 605 dev/usb/if_upl.c printf("%s: usb error on tx: %s\n", sc->sc_dev.dv_xname,
sc 608 dev/usb/if_upl.c usbd_clear_endpoint_stall_async(sc->sc_ep[UPL_ENDPT_TX]);
sc 625 dev/usb/if_upl.c upl_send(struct upl_softc *sc, struct mbuf *m, int idx)
sc 631 dev/usb/if_upl.c c = &sc->sc_cdata.upl_tx_chain[idx];
sc 643 dev/usb/if_upl.c sc->sc_dev.dv_xname, __func__, total_len));
sc 645 dev/usb/if_upl.c usbd_setup_xfer(c->upl_xfer, sc->sc_ep[UPL_ENDPT_TX],
sc 652 dev/usb/if_upl.c printf("%s: upl_send error=%s\n", sc->sc_dev.dv_xname,
sc 654 dev/usb/if_upl.c upl_stop(sc);
sc 658 dev/usb/if_upl.c sc->sc_cdata.upl_tx_cnt++;
sc 666 dev/usb/if_upl.c struct upl_softc *sc = ifp->if_softc;
sc 669 dev/usb/if_upl.c if (sc->sc_dying)
sc 672 dev/usb/if_upl.c DPRINTFN(10,("%s: %s: enter\n", sc->sc_dev.dv_xname,__func__));
sc 681 dev/usb/if_upl.c if (upl_send(sc, m_head, 0)) {
sc 708 dev/usb/if_upl.c struct upl_softc *sc = xsc;
sc 709 dev/usb/if_upl.c struct ifnet *ifp = &sc->sc_if;
sc 712 dev/usb/if_upl.c if (sc->sc_dying)
sc 715 dev/usb/if_upl.c DPRINTFN(10,("%s: %s: enter\n", sc->sc_dev.dv_xname,__func__));
sc 723 dev/usb/if_upl.c if (upl_tx_list_init(sc) == ENOBUFS) {
sc 724 dev/usb/if_upl.c printf("%s: tx list init failed\n", sc->sc_dev.dv_xname);
sc 730 dev/usb/if_upl.c if (upl_rx_list_init(sc) == ENOBUFS) {
sc 731 dev/usb/if_upl.c printf("%s: rx list init failed\n", sc->sc_dev.dv_xname);
sc 736 dev/usb/if_upl.c if (sc->sc_ep[UPL_ENDPT_RX] == NULL) {
sc 737 dev/usb/if_upl.c if (upl_openpipes(sc)) {
sc 750 dev/usb/if_upl.c upl_openpipes(struct upl_softc *sc)
sc 757 dev/usb/if_upl.c err = usbd_open_pipe(sc->sc_iface, sc->sc_ed[UPL_ENDPT_RX],
sc 758 dev/usb/if_upl.c USBD_EXCLUSIVE_USE, &sc->sc_ep[UPL_ENDPT_RX]);
sc 761 dev/usb/if_upl.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 764 dev/usb/if_upl.c err = usbd_open_pipe(sc->sc_iface, sc->sc_ed[UPL_ENDPT_TX],
sc 765 dev/usb/if_upl.c USBD_EXCLUSIVE_USE, &sc->sc_ep[UPL_ENDPT_TX]);
sc 768 dev/usb/if_upl.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 771 dev/usb/if_upl.c err = usbd_open_pipe_intr(sc->sc_iface, sc->sc_ed[UPL_ENDPT_INTR],
sc 772 dev/usb/if_upl.c USBD_EXCLUSIVE_USE, &sc->sc_ep[UPL_ENDPT_INTR], sc,
sc 773 dev/usb/if_upl.c &sc->sc_ibuf, UPL_INTR_PKTLEN, upl_intr,
sc 777 dev/usb/if_upl.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 785 dev/usb/if_upl.c c = &sc->sc_cdata.upl_rx_chain[i];
sc 786 dev/usb/if_upl.c usbd_setup_xfer(c->upl_xfer, sc->sc_ep[UPL_ENDPT_RX],
sc 800 dev/usb/if_upl.c struct upl_softc *sc = priv;
sc 801 dev/usb/if_upl.c struct ifnet *ifp = &sc->sc_if;
sc 804 dev/usb/if_upl.c DPRINTFN(15,("%s: %s: enter\n", sc->sc_dev.dv_xname,__func__));
sc 806 dev/usb/if_upl.c if (sc->sc_dying)
sc 816 dev/usb/if_upl.c sc->sc_intr_errs++;
sc 817 dev/usb/if_upl.c if (usbd_ratecheck(&sc->sc_rx_notice)) {
sc 819 dev/usb/if_upl.c sc->sc_dev.dv_xname, sc->sc_rx_errs,
sc 821 dev/usb/if_upl.c sc->sc_intr_errs = 0;
sc 824 dev/usb/if_upl.c usbd_clear_endpoint_stall_async(sc->sc_ep[UPL_ENDPT_RX]);
sc 828 dev/usb/if_upl.c stat = sc->sc_ibuf;
sc 833 dev/usb/if_upl.c DPRINTFN(10,("%s: %s: stat=0x%02x\n", sc->sc_dev.dv_xname,
sc 841 dev/usb/if_upl.c struct upl_softc *sc = ifp->if_softc;
sc 846 dev/usb/if_upl.c if (sc->sc_dying)
sc 850 dev/usb/if_upl.c sc->sc_dev.dv_xname, __func__, command));
sc 857 dev/usb/if_upl.c upl_init(sc);
sc 877 dev/usb/if_upl.c upl_init(sc);
sc 880 dev/usb/if_upl.c upl_stop(sc);
sc 897 dev/usb/if_upl.c struct upl_softc *sc = ifp->if_softc;
sc 899 dev/usb/if_upl.c DPRINTFN(5,("%s: %s: enter\n", sc->sc_dev.dv_xname,__func__));
sc 901 dev/usb/if_upl.c if (sc->sc_dying)
sc 905 dev/usb/if_upl.c printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
sc 907 dev/usb/if_upl.c upl_stop(sc);
sc 908 dev/usb/if_upl.c upl_init(sc);
sc 919 dev/usb/if_upl.c upl_stop(struct upl_softc *sc)
sc 925 dev/usb/if_upl.c DPRINTFN(10,("%s: %s: enter\n", sc->sc_dev.dv_xname,__func__));
sc 927 dev/usb/if_upl.c ifp = &sc->sc_if;
sc 932 dev/usb/if_upl.c if (sc->sc_ep[UPL_ENDPT_RX] != NULL) {
sc 933 dev/usb/if_upl.c err = usbd_abort_pipe(sc->sc_ep[UPL_ENDPT_RX]);
sc 936 dev/usb/if_upl.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 938 dev/usb/if_upl.c err = usbd_close_pipe(sc->sc_ep[UPL_ENDPT_RX]);
sc 941 dev/usb/if_upl.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 943 dev/usb/if_upl.c sc->sc_ep[UPL_ENDPT_RX] = NULL;
sc 946 dev/usb/if_upl.c if (sc->sc_ep[UPL_ENDPT_TX] != NULL) {
sc 947 dev/usb/if_upl.c err = usbd_abort_pipe(sc->sc_ep[UPL_ENDPT_TX]);
sc 950 dev/usb/if_upl.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 952 dev/usb/if_upl.c err = usbd_close_pipe(sc->sc_ep[UPL_ENDPT_TX]);
sc 955 dev/usb/if_upl.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 957 dev/usb/if_upl.c sc->sc_ep[UPL_ENDPT_TX] = NULL;
sc 960 dev/usb/if_upl.c if (sc->sc_ep[UPL_ENDPT_INTR] != NULL) {
sc 961 dev/usb/if_upl.c err = usbd_abort_pipe(sc->sc_ep[UPL_ENDPT_INTR]);
sc 964 dev/usb/if_upl.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 966 dev/usb/if_upl.c err = usbd_close_pipe(sc->sc_ep[UPL_ENDPT_INTR]);
sc 969 dev/usb/if_upl.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 971 dev/usb/if_upl.c sc->sc_ep[UPL_ENDPT_INTR] = NULL;
sc 976 dev/usb/if_upl.c if (sc->sc_cdata.upl_rx_chain[i].upl_mbuf != NULL) {
sc 977 dev/usb/if_upl.c m_freem(sc->sc_cdata.upl_rx_chain[i].upl_mbuf);
sc 978 dev/usb/if_upl.c sc->sc_cdata.upl_rx_chain[i].upl_mbuf = NULL;
sc 980 dev/usb/if_upl.c if (sc->sc_cdata.upl_rx_chain[i].upl_xfer != NULL) {
sc 981 dev/usb/if_upl.c usbd_free_xfer(sc->sc_cdata.upl_rx_chain[i].upl_xfer);
sc 982 dev/usb/if_upl.c sc->sc_cdata.upl_rx_chain[i].upl_xfer = NULL;
sc 988 dev/usb/if_upl.c if (sc->sc_cdata.upl_tx_chain[i].upl_mbuf != NULL) {
sc 989 dev/usb/if_upl.c m_freem(sc->sc_cdata.upl_tx_chain[i].upl_mbuf);
sc 990 dev/usb/if_upl.c sc->sc_cdata.upl_tx_chain[i].upl_mbuf = NULL;
sc 992 dev/usb/if_upl.c if (sc->sc_cdata.upl_tx_chain[i].upl_xfer != NULL) {
sc 993 dev/usb/if_upl.c usbd_free_xfer(sc->sc_cdata.upl_tx_chain[i].upl_xfer);
sc 994 dev/usb/if_upl.c sc->sc_cdata.upl_tx_chain[i].upl_xfer = NULL;
sc 1045 dev/usb/if_upl.c if (sc->sc_flags & SC_DEBUG)
sc 147 dev/usb/if_url.c #define URL_SETBIT(sc, reg, x) \
sc 148 dev/usb/if_url.c url_csr_write_1(sc, reg, url_csr_read_1(sc, reg) | (x))
sc 150 dev/usb/if_url.c #define URL_SETBIT2(sc, reg, x) \
sc 151 dev/usb/if_url.c url_csr_write_2(sc, reg, url_csr_read_2(sc, reg) | (x))
sc 153 dev/usb/if_url.c #define URL_CLRBIT(sc, reg, x) \
sc 154 dev/usb/if_url.c url_csr_write_1(sc, reg, url_csr_read_1(sc, reg) & ~(x))
sc 156 dev/usb/if_url.c #define URL_CLRBIT2(sc, reg, x) \
sc 157 dev/usb/if_url.c url_csr_write_2(sc, reg, url_csr_read_2(sc, reg) & ~(x))
sc 192 dev/usb/if_url.c struct url_softc *sc = (struct url_softc *)self;
sc 200 dev/usb/if_url.c char *devname = sc->sc_dev.dv_xname;
sc 217 dev/usb/if_url.c usb_init_task(&sc->sc_tick_task, url_tick_task, sc);
sc 218 dev/usb/if_url.c rw_init(&sc->sc_mii_lock, "urlmii");
sc 219 dev/usb/if_url.c usb_init_task(&sc->sc_stop_task, (void (*)(void *)) url_stop_task, sc);
sc 229 dev/usb/if_url.c sc->sc_udev = dev;
sc 230 dev/usb/if_url.c sc->sc_ctl_iface = iface;
sc 231 dev/usb/if_url.c sc->sc_flags = url_lookup(uaa->vendor, uaa->product)->url_flags;
sc 234 dev/usb/if_url.c id = usbd_get_interface_descriptor(sc->sc_ctl_iface);
sc 237 dev/usb/if_url.c sc->sc_bulkin_no = sc->sc_bulkout_no = sc->sc_intrin_no = -1;
sc 239 dev/usb/if_url.c ed = usbd_interface2endpoint_descriptor(sc->sc_ctl_iface, i);
sc 246 dev/usb/if_url.c sc->sc_bulkin_no = ed->bEndpointAddress; /* RX */
sc 249 dev/usb/if_url.c sc->sc_bulkout_no = ed->bEndpointAddress; /* TX */
sc 252 dev/usb/if_url.c sc->sc_intrin_no = ed->bEndpointAddress; /* Status */
sc 255 dev/usb/if_url.c if (sc->sc_bulkin_no == -1 || sc->sc_bulkout_no == -1 ||
sc 256 dev/usb/if_url.c sc->sc_intrin_no == -1) {
sc 264 dev/usb/if_url.c url_reset(sc);
sc 267 dev/usb/if_url.c err = url_mem(sc, URL_CMD_READMEM, URL_IDR0, (void *)eaddr,
sc 278 dev/usb/if_url.c bcopy(eaddr, (char *)&sc->sc_ac.ac_enaddr, ETHER_ADDR_LEN);
sc 280 dev/usb/if_url.c ifp = GET_IFP(sc);
sc 281 dev/usb/if_url.c ifp->if_softc = sc;
sc 293 dev/usb/if_url.c mii = &sc->sc_mii;
sc 298 dev/usb/if_url.c if (sc->sc_flags & URL_EXT_PHY) {
sc 318 dev/usb/if_url.c timeout_set(&sc->sc_stat_ch, NULL, NULL);
sc 319 dev/usb/if_url.c sc->sc_attached = 1;
sc 322 dev/usb/if_url.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, dev, &sc->sc_dev);
sc 327 dev/usb/if_url.c sc->sc_dying = 1;
sc 334 dev/usb/if_url.c struct url_softc *sc = (struct url_softc *)self;
sc 335 dev/usb/if_url.c struct ifnet *ifp = GET_IFP(sc);
sc 338 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 341 dev/usb/if_url.c if (!sc->sc_attached)
sc 344 dev/usb/if_url.c timeout_del(&sc->sc_stat_ch);
sc 347 dev/usb/if_url.c usb_rem_task(sc->sc_udev, &sc->sc_tick_task);
sc 348 dev/usb/if_url.c usb_rem_task(sc->sc_udev, &sc->sc_stop_task);
sc 352 dev/usb/if_url.c if (--sc->sc_refcnt >= 0) {
sc 354 dev/usb/if_url.c usb_detach_wait(&sc->sc_dev);
sc 358 dev/usb/if_url.c url_stop(GET_IFP(sc), 1);
sc 360 dev/usb/if_url.c mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
sc 361 dev/usb/if_url.c ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
sc 366 dev/usb/if_url.c if (sc->sc_pipe_tx != NULL)
sc 368 dev/usb/if_url.c sc->sc_dev.dv_xname);
sc 369 dev/usb/if_url.c if (sc->sc_pipe_rx != NULL)
sc 371 dev/usb/if_url.c sc->sc_dev.dv_xname);
sc 372 dev/usb/if_url.c if (sc->sc_pipe_intr != NULL)
sc 374 dev/usb/if_url.c sc->sc_dev.dv_xname);
sc 377 dev/usb/if_url.c sc->sc_attached = 0;
sc 381 dev/usb/if_url.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 382 dev/usb/if_url.c &sc->sc_dev);
sc 389 dev/usb/if_url.c url_mem(struct url_softc *sc, int cmd, int offset, void *buf, int len)
sc 394 dev/usb/if_url.c if (sc == NULL)
sc 398 dev/usb/if_url.c ("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 400 dev/usb/if_url.c if (sc->sc_dying)
sc 412 dev/usb/if_url.c sc->sc_refcnt++;
sc 413 dev/usb/if_url.c err = usbd_do_request(sc->sc_udev, &req, buf);
sc 414 dev/usb/if_url.c if (--sc->sc_refcnt < 0)
sc 415 dev/usb/if_url.c usb_detach_wakeup(&sc->sc_dev);
sc 418 dev/usb/if_url.c sc->sc_dev.dv_xname,
sc 428 dev/usb/if_url.c url_csr_read_1(struct url_softc *sc, int reg)
sc 433 dev/usb/if_url.c ("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 435 dev/usb/if_url.c if (sc->sc_dying)
sc 438 dev/usb/if_url.c return (url_mem(sc, URL_CMD_READMEM, reg, &val, 1) ? 0 : val);
sc 443 dev/usb/if_url.c url_csr_read_2(struct url_softc *sc, int reg)
sc 448 dev/usb/if_url.c ("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 450 dev/usb/if_url.c if (sc->sc_dying)
sc 454 dev/usb/if_url.c return (url_mem(sc, URL_CMD_READMEM, reg, &val, 2) ? 0 : UGETW(val));
sc 459 dev/usb/if_url.c url_csr_write_1(struct url_softc *sc, int reg, int aval)
sc 464 dev/usb/if_url.c ("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 466 dev/usb/if_url.c if (sc->sc_dying)
sc 469 dev/usb/if_url.c return (url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 1) ? -1 : 0);
sc 474 dev/usb/if_url.c url_csr_write_2(struct url_softc *sc, int reg, int aval)
sc 479 dev/usb/if_url.c ("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 483 dev/usb/if_url.c if (sc->sc_dying)
sc 486 dev/usb/if_url.c return (url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 2) ? -1 : 0);
sc 491 dev/usb/if_url.c url_csr_write_4(struct url_softc *sc, int reg, int aval)
sc 496 dev/usb/if_url.c ("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 500 dev/usb/if_url.c if (sc->sc_dying)
sc 503 dev/usb/if_url.c return (url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 4) ? -1 : 0);
sc 509 dev/usb/if_url.c struct url_softc *sc = ifp->if_softc;
sc 510 dev/usb/if_url.c struct mii_data *mii = GET_MII(sc);
sc 514 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 516 dev/usb/if_url.c if (sc->sc_dying)
sc 524 dev/usb/if_url.c eaddr = sc->sc_ac.ac_enaddr;
sc 526 dev/usb/if_url.c url_csr_write_1(sc, URL_IDR0 + i, eaddr[i]);
sc 529 dev/usb/if_url.c URL_CLRBIT(sc, URL_TCR,
sc 535 dev/usb/if_url.c URL_SETBIT2(sc, URL_RCR, URL_RCR_TAIL | URL_RCR_AD);
sc 537 dev/usb/if_url.c URL_SETBIT2(sc, URL_RCR, URL_RCR_AB);
sc 539 dev/usb/if_url.c URL_CLRBIT2(sc, URL_RCR, URL_RCR_AB);
sc 543 dev/usb/if_url.c URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
sc 545 dev/usb/if_url.c URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
sc 549 dev/usb/if_url.c if (url_tx_list_init(sc) == ENOBUFS) {
sc 550 dev/usb/if_url.c printf("%s: tx list init failed\n", sc->sc_dev.dv_xname);
sc 556 dev/usb/if_url.c if (url_rx_list_init(sc) == ENOBUFS) {
sc 557 dev/usb/if_url.c printf("%s: rx list init failed\n", sc->sc_dev.dv_xname);
sc 563 dev/usb/if_url.c url_setmulti(sc);
sc 566 dev/usb/if_url.c URL_SETBIT(sc, URL_CR, URL_CR_TE | URL_CR_RE);
sc 570 dev/usb/if_url.c if (sc->sc_pipe_tx == NULL || sc->sc_pipe_rx == NULL) {
sc 571 dev/usb/if_url.c if (url_openpipes(sc)) {
sc 582 dev/usb/if_url.c timeout_del(&sc->sc_stat_ch);
sc 583 dev/usb/if_url.c timeout_set(&sc->sc_stat_ch, url_tick, sc);
sc 584 dev/usb/if_url.c timeout_add(&sc->sc_stat_ch, hz);
sc 590 dev/usb/if_url.c url_reset(struct url_softc *sc)
sc 594 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 596 dev/usb/if_url.c if (sc->sc_dying)
sc 599 dev/usb/if_url.c URL_SETBIT(sc, URL_CR, URL_CR_SOFT_RST);
sc 602 dev/usb/if_url.c if (!(url_csr_read_1(sc, URL_CR) & URL_CR_SOFT_RST))
sc 613 dev/usb/if_url.c struct url_softc *sc = (struct url_softc *)self;
sc 615 dev/usb/if_url.c DPRINTF(("%s: %s: enter, act=%d\n", sc->sc_dev.dv_xname,
sc 623 dev/usb/if_url.c sc->sc_dying = 1;
sc 634 dev/usb/if_url.c url_setmulti(struct url_softc *sc)
sc 643 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 645 dev/usb/if_url.c if (sc->sc_dying)
sc 648 dev/usb/if_url.c ifp = GET_IFP(sc);
sc 651 dev/usb/if_url.c URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
sc 656 dev/usb/if_url.c URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM);
sc 657 dev/usb/if_url.c URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAP);
sc 662 dev/usb/if_url.c url_csr_write_4(sc, URL_MAR0, 0);
sc 663 dev/usb/if_url.c url_csr_write_4(sc, URL_MAR4, 0);
sc 666 dev/usb/if_url.c ETHER_FIRST_MULTI(step, &sc->sc_ac, enm);
sc 683 dev/usb/if_url.c URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
sc 686 dev/usb/if_url.c URL_SETBIT2(sc, URL_RCR, URL_RCR_AM);
sc 688 dev/usb/if_url.c URL_CLRBIT2(sc, URL_RCR, URL_RCR_AM);
sc 690 dev/usb/if_url.c url_csr_write_4(sc, URL_MAR0, hashes[0]);
sc 691 dev/usb/if_url.c url_csr_write_4(sc, URL_MAR4, hashes[1]);
sc 695 dev/usb/if_url.c url_openpipes(struct url_softc *sc)
sc 702 dev/usb/if_url.c if (sc->sc_dying)
sc 705 dev/usb/if_url.c sc->sc_refcnt++;
sc 708 dev/usb/if_url.c err = usbd_open_pipe(sc->sc_ctl_iface, sc->sc_bulkin_no,
sc 709 dev/usb/if_url.c USBD_EXCLUSIVE_USE, &sc->sc_pipe_rx);
sc 712 dev/usb/if_url.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 718 dev/usb/if_url.c err = usbd_open_pipe(sc->sc_ctl_iface, sc->sc_bulkout_no,
sc 719 dev/usb/if_url.c USBD_EXCLUSIVE_USE, &sc->sc_pipe_tx);
sc 722 dev/usb/if_url.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 730 dev/usb/if_url.c err = usbd_open_pipe_intr(sc->sc_ctl_iface, sc->sc_intrin_no,
sc 731 dev/usb/if_url.c USBD_EXCLUSIVE_USE, &sc->sc_pipe_intr, sc,
sc 732 dev/usb/if_url.c &sc->sc_cdata.url_ibuf, URL_INTR_PKGLEN,
sc 736 dev/usb/if_url.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 745 dev/usb/if_url.c c = &sc->sc_cdata.url_rx_chain[i];
sc 746 dev/usb/if_url.c usbd_setup_xfer(c->url_xfer, sc->sc_pipe_rx,
sc 751 dev/usb/if_url.c DPRINTF(("%s: %s: start read\n", sc->sc_dev.dv_xname,
sc 756 dev/usb/if_url.c if (--sc->sc_refcnt < 0)
sc 757 dev/usb/if_url.c usb_detach_wakeup(&sc->sc_dev);
sc 763 dev/usb/if_url.c url_newbuf(struct url_softc *sc, struct url_chain *c, struct mbuf *m)
sc 767 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 773 dev/usb/if_url.c "-- packet dropped!\n", sc->sc_dev.dv_xname);
sc 779 dev/usb/if_url.c "-- packet dropped!\n", sc->sc_dev.dv_xname);
sc 798 dev/usb/if_url.c url_rx_list_init(struct url_softc *sc)
sc 804 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 806 dev/usb/if_url.c cd = &sc->sc_cdata;
sc 809 dev/usb/if_url.c c->url_sc = sc;
sc 811 dev/usb/if_url.c if (url_newbuf(sc, c, NULL) == ENOBUFS)
sc 814 dev/usb/if_url.c c->url_xfer = usbd_alloc_xfer(sc->sc_udev);
sc 829 dev/usb/if_url.c url_tx_list_init(struct url_softc *sc)
sc 835 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 837 dev/usb/if_url.c cd = &sc->sc_cdata;
sc 840 dev/usb/if_url.c c->url_sc = sc;
sc 844 dev/usb/if_url.c c->url_xfer = usbd_alloc_xfer(sc->sc_udev);
sc 861 dev/usb/if_url.c struct url_softc *sc = ifp->if_softc;
sc 864 dev/usb/if_url.c DPRINTF(("%s: %s: enter, link=%d\n", sc->sc_dev.dv_xname,
sc 865 dev/usb/if_url.c __func__, sc->sc_link));
sc 867 dev/usb/if_url.c if (sc->sc_dying)
sc 870 dev/usb/if_url.c if (!sc->sc_link)
sc 880 dev/usb/if_url.c if (url_send(sc, m_head, 0)) {
sc 899 dev/usb/if_url.c url_send(struct url_softc *sc, struct mbuf *m, int idx)
sc 905 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname,__func__));
sc 907 dev/usb/if_url.c c = &sc->sc_cdata.url_tx_chain[idx];
sc 918 dev/usb/if_url.c usbd_setup_xfer(c->url_xfer, sc->sc_pipe_tx, c, c->url_buf, total_len,
sc 923 dev/usb/if_url.c sc->sc_refcnt++;
sc 925 dev/usb/if_url.c if (--sc->sc_refcnt < 0)
sc 926 dev/usb/if_url.c usb_detach_wakeup(&sc->sc_dev);
sc 928 dev/usb/if_url.c printf("%s: url_send error=%s\n", sc->sc_dev.dv_xname,
sc 931 dev/usb/if_url.c usb_add_task(sc->sc_udev, &sc->sc_stop_task);
sc 935 dev/usb/if_url.c DPRINTF(("%s: %s: send %d bytes\n", sc->sc_dev.dv_xname,
sc 938 dev/usb/if_url.c sc->sc_cdata.url_tx_cnt++;
sc 947 dev/usb/if_url.c struct url_softc *sc = c->url_sc;
sc 948 dev/usb/if_url.c struct ifnet *ifp = GET_IFP(sc);
sc 951 dev/usb/if_url.c if (sc->sc_dying)
sc 956 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 967 dev/usb/if_url.c printf("%s: usb error on tx: %s\n", sc->sc_dev.dv_xname,
sc 970 dev/usb/if_url.c sc->sc_refcnt++;
sc 971 dev/usb/if_url.c usbd_clear_endpoint_stall_async(sc->sc_pipe_tx);
sc 972 dev/usb/if_url.c if (--sc->sc_refcnt < 0)
sc 973 dev/usb/if_url.c usb_detach_wakeup(&sc->sc_dev);
sc 994 dev/usb/if_url.c struct url_softc *sc = c->url_sc;
sc 995 dev/usb/if_url.c struct ifnet *ifp = GET_IFP(sc);
sc 1001 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname,__func__));
sc 1003 dev/usb/if_url.c if (sc->sc_dying)
sc 1009 dev/usb/if_url.c sc->sc_rx_errs++;
sc 1010 dev/usb/if_url.c if (usbd_ratecheck(&sc->sc_rx_notice)) {
sc 1012 dev/usb/if_url.c sc->sc_dev.dv_xname, sc->sc_rx_errs,
sc 1014 dev/usb/if_url.c sc->sc_rx_errs = 0;
sc 1017 dev/usb/if_url.c sc->sc_refcnt++;
sc 1018 dev/usb/if_url.c usbd_clear_endpoint_stall_async(sc->sc_pipe_rx);
sc 1019 dev/usb/if_url.c if (--sc->sc_refcnt < 0)
sc 1020 dev/usb/if_url.c usb_detach_wakeup(&sc->sc_dev);
sc 1037 dev/usb/if_url.c sc->sc_dev.dv_xname,
sc 1058 dev/usb/if_url.c if (url_newbuf(sc, c, NULL) == ENOBUFS) {
sc 1068 dev/usb/if_url.c DPRINTF(("%s: %s: deliver %d\n", sc->sc_dev.dv_xname,
sc 1077 dev/usb/if_url.c usbd_setup_xfer(xfer, sc->sc_pipe_rx, c, c->url_buf, URL_BUFSZ,
sc 1080 dev/usb/if_url.c sc->sc_refcnt++;
sc 1082 dev/usb/if_url.c if (--sc->sc_refcnt < 0)
sc 1083 dev/usb/if_url.c usb_detach_wakeup(&sc->sc_dev);
sc 1085 dev/usb/if_url.c DPRINTF(("%s: %s: start rx\n", sc->sc_dev.dv_xname, __func__));
sc 1097 dev/usb/if_url.c struct url_softc *sc = ifp->if_softc;
sc 1103 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 1105 dev/usb/if_url.c if (sc->sc_dying)
sc 1118 dev/usb/if_url.c arp_ifinit(&sc->sc_ac, ifa);
sc 1135 dev/usb/if_url.c URL_SETBIT2(sc, URL_RCR,
sc 1139 dev/usb/if_url.c URL_CLRBIT2(sc, URL_RCR,
sc 1152 dev/usb/if_url.c ether_addmulti(ifr, &sc->sc_ac) :
sc 1153 dev/usb/if_url.c ether_delmulti(ifr, &sc->sc_ac);
sc 1157 dev/usb/if_url.c url_setmulti(sc);
sc 1163 dev/usb/if_url.c mii = GET_MII(sc);
sc 1179 dev/usb/if_url.c struct url_softc *sc = ifp->if_softc;
sc 1184 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 1187 dev/usb/if_url.c printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
sc 1190 dev/usb/if_url.c c = &sc->sc_cdata.url_tx_chain[0];
sc 1200 dev/usb/if_url.c url_stop_task(struct url_softc *sc)
sc 1202 dev/usb/if_url.c url_stop(GET_IFP(sc), 1);
sc 1209 dev/usb/if_url.c struct url_softc *sc = ifp->if_softc;
sc 1213 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 1218 dev/usb/if_url.c url_reset(sc);
sc 1220 dev/usb/if_url.c timeout_del(&sc->sc_stat_ch);
sc 1224 dev/usb/if_url.c if (sc->sc_pipe_rx != NULL) {
sc 1225 dev/usb/if_url.c err = usbd_abort_pipe(sc->sc_pipe_rx);
sc 1228 dev/usb/if_url.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1229 dev/usb/if_url.c err = usbd_close_pipe(sc->sc_pipe_rx);
sc 1232 dev/usb/if_url.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1233 dev/usb/if_url.c sc->sc_pipe_rx = NULL;
sc 1237 dev/usb/if_url.c if (sc->sc_pipe_tx != NULL) {
sc 1238 dev/usb/if_url.c err = usbd_abort_pipe(sc->sc_pipe_tx);
sc 1241 dev/usb/if_url.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1242 dev/usb/if_url.c err = usbd_close_pipe(sc->sc_pipe_tx);
sc 1245 dev/usb/if_url.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1246 dev/usb/if_url.c sc->sc_pipe_tx = NULL;
sc 1252 dev/usb/if_url.c if (sc->sc_pipe_intr != NULL) {
sc 1253 dev/usb/if_url.c err = usbd_abort_pipe(sc->sc_pipe_intr);
sc 1256 dev/usb/if_url.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1257 dev/usb/if_url.c err = usbd_close_pipe(sc->sc_pipe_intr);
sc 1260 dev/usb/if_url.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1261 dev/usb/if_url.c sc->sc_pipe_intr = NULL;
sc 1267 dev/usb/if_url.c if (sc->sc_cdata.url_rx_chain[i].url_mbuf != NULL) {
sc 1268 dev/usb/if_url.c m_freem(sc->sc_cdata.url_rx_chain[i].url_mbuf);
sc 1269 dev/usb/if_url.c sc->sc_cdata.url_rx_chain[i].url_mbuf = NULL;
sc 1271 dev/usb/if_url.c if (sc->sc_cdata.url_rx_chain[i].url_xfer != NULL) {
sc 1272 dev/usb/if_url.c usbd_free_xfer(sc->sc_cdata.url_rx_chain[i].url_xfer);
sc 1273 dev/usb/if_url.c sc->sc_cdata.url_rx_chain[i].url_xfer = NULL;
sc 1279 dev/usb/if_url.c if (sc->sc_cdata.url_tx_chain[i].url_mbuf != NULL) {
sc 1280 dev/usb/if_url.c m_freem(sc->sc_cdata.url_tx_chain[i].url_mbuf);
sc 1281 dev/usb/if_url.c sc->sc_cdata.url_tx_chain[i].url_mbuf = NULL;
sc 1283 dev/usb/if_url.c if (sc->sc_cdata.url_tx_chain[i].url_xfer != NULL) {
sc 1284 dev/usb/if_url.c usbd_free_xfer(sc->sc_cdata.url_tx_chain[i].url_xfer);
sc 1285 dev/usb/if_url.c sc->sc_cdata.url_tx_chain[i].url_xfer = NULL;
sc 1289 dev/usb/if_url.c sc->sc_link = 0;
sc 1296 dev/usb/if_url.c struct url_softc *sc = ifp->if_softc;
sc 1297 dev/usb/if_url.c struct mii_data *mii = GET_MII(sc);
sc 1299 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 1301 dev/usb/if_url.c if (sc->sc_dying)
sc 1304 dev/usb/if_url.c sc->sc_link = 0;
sc 1319 dev/usb/if_url.c struct url_softc *sc = ifp->if_softc;
sc 1320 dev/usb/if_url.c struct mii_data *mii = GET_MII(sc);
sc 1322 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 1324 dev/usb/if_url.c if (sc->sc_dying)
sc 1341 dev/usb/if_url.c struct url_softc *sc = xsc;
sc 1343 dev/usb/if_url.c if (sc == NULL)
sc 1346 dev/usb/if_url.c DPRINTFN(0xff, ("%s: %s: enter\n", sc->sc_dev.dv_xname,
sc 1349 dev/usb/if_url.c if (sc->sc_dying)
sc 1353 dev/usb/if_url.c usb_add_task(sc->sc_udev, &sc->sc_tick_task);
sc 1359 dev/usb/if_url.c struct url_softc *sc = xsc;
sc 1364 dev/usb/if_url.c if (sc == NULL)
sc 1367 dev/usb/if_url.c DPRINTFN(0xff, ("%s: %s: enter\n", sc->sc_dev.dv_xname,
sc 1370 dev/usb/if_url.c if (sc->sc_dying)
sc 1373 dev/usb/if_url.c ifp = GET_IFP(sc);
sc 1374 dev/usb/if_url.c mii = GET_MII(sc);
sc 1382 dev/usb/if_url.c if (!sc->sc_link && mii->mii_media_status & IFM_ACTIVE &&
sc 1385 dev/usb/if_url.c sc->sc_dev.dv_xname, __func__));
sc 1386 dev/usb/if_url.c sc->sc_link++;
sc 1391 dev/usb/if_url.c timeout_del(&sc->sc_stat_ch);
sc 1392 dev/usb/if_url.c timeout_set(&sc->sc_stat_ch, url_tick, sc);
sc 1393 dev/usb/if_url.c timeout_add(&sc->sc_stat_ch, hz);
sc 1400 dev/usb/if_url.c url_lock_mii(struct url_softc *sc)
sc 1402 dev/usb/if_url.c DPRINTFN(0xff, ("%s: %s: enter\n", sc->sc_dev.dv_xname,
sc 1405 dev/usb/if_url.c sc->sc_refcnt++;
sc 1406 dev/usb/if_url.c rw_enter_write(&sc->sc_mii_lock);
sc 1410 dev/usb/if_url.c url_unlock_mii(struct url_softc *sc)
sc 1412 dev/usb/if_url.c DPRINTFN(0xff, ("%s: %s: enter\n", sc->sc_dev.dv_xname,
sc 1415 dev/usb/if_url.c rw_exit_write(&sc->sc_mii_lock);
sc 1416 dev/usb/if_url.c if (--sc->sc_refcnt < 0)
sc 1417 dev/usb/if_url.c usb_detach_wakeup(&sc->sc_dev);
sc 1423 dev/usb/if_url.c struct url_softc *sc;
sc 1429 dev/usb/if_url.c sc = (void *)dev;
sc 1432 dev/usb/if_url.c sc->sc_dev.dv_xname, __func__, phy, reg));
sc 1434 dev/usb/if_url.c if (sc->sc_dying) {
sc 1436 dev/usb/if_url.c printf("%s: %s: dying\n", sc->sc_dev.dv_xname,
sc 1445 dev/usb/if_url.c sc->sc_dev.dv_xname, __func__, phy));
sc 1449 dev/usb/if_url.c url_lock_mii(sc);
sc 1474 dev/usb/if_url.c sc->sc_dev.dv_xname, __func__, reg);
sc 1481 dev/usb/if_url.c val = url_csr_read_1(sc, reg);
sc 1483 dev/usb/if_url.c val = url_csr_read_2(sc, reg);
sc 1487 dev/usb/if_url.c sc->sc_dev.dv_xname, __func__, phy, reg, val));
sc 1489 dev/usb/if_url.c url_unlock_mii(sc);
sc 1496 dev/usb/if_url.c struct url_softc *sc;
sc 1501 dev/usb/if_url.c sc = (void *)dev;
sc 1504 dev/usb/if_url.c sc->sc_dev.dv_xname, __func__, phy, reg, data));
sc 1506 dev/usb/if_url.c if (sc->sc_dying) {
sc 1508 dev/usb/if_url.c printf("%s: %s: dying\n", sc->sc_dev.dv_xname,
sc 1517 dev/usb/if_url.c sc->sc_dev.dv_xname, __func__, phy));
sc 1521 dev/usb/if_url.c url_lock_mii(sc);
sc 1545 dev/usb/if_url.c sc->sc_dev.dv_xname, __func__, reg);
sc 1551 dev/usb/if_url.c url_csr_write_1(sc, reg, data);
sc 1553 dev/usb/if_url.c url_csr_write_2(sc, reg, data);
sc 1556 dev/usb/if_url.c url_unlock_mii(sc);
sc 1564 dev/usb/if_url.c struct url_softc *sc;
sc 1569 dev/usb/if_url.c sc = (void *)dev;
sc 1570 dev/usb/if_url.c DPRINTF(("%s: %s: enter\n", sc->sc_dev.dv_xname, __func__));
sc 1582 dev/usb/if_url.c struct url_softc *sc = (void *)dev;
sc 1586 dev/usb/if_url.c sc->sc_dev.dv_xname, __func__, phy, reg));
sc 1588 dev/usb/if_url.c if (sc->sc_dying) {
sc 1590 dev/usb/if_url.c printf("%s: %s: dying\n", sc->sc_dev.dv_xname,
sc 1596 dev/usb/if_url.c url_lock_mii(sc);
sc 1598 dev/usb/if_url.c url_csr_write_1(sc, URL_PHYADD, phy & URL_PHYADD_MASK);
sc 1604 dev/usb/if_url.c url_csr_write_1(sc, URL_PHYCNT,
sc 1607 dev/usb/if_url.c if ((url_csr_read_1(sc, URL_PHYCNT) & URL_PHYCNT_PHYOWN) == 0)
sc 1611 dev/usb/if_url.c printf("%s: MII read timed out\n", sc->sc_dev.dv_xname);
sc 1614 dev/usb/if_url.c val = url_csr_read_2(sc, URL_PHYDAT);
sc 1617 dev/usb/if_url.c sc->sc_dev.dv_xname, __func__, phy, reg, val));
sc 1619 dev/usb/if_url.c url_unlock_mii(sc);
sc 1626 dev/usb/if_url.c struct url_softc *sc = (void *)dev;
sc 1629 dev/usb/if_url.c sc->sc_dev.dv_xname, __func__, phy, reg, data));
sc 1631 dev/usb/if_url.c if (sc->sc_dying) {
sc 1633 dev/usb/if_url.c printf("%s: %s: dying\n", sc->sc_dev.dv_xname,
sc 1639 dev/usb/if_url.c url_lock_mii(sc);
sc 1641 dev/usb/if_url.c url_csr_write_2(sc, URL_PHYDAT, data);
sc 1642 dev/usb/if_url.c url_csr_write_1(sc, URL_PHYADD, phy);
sc 1643 dev/usb/if_url.c url_csr_write_1(sc, URL_PHYCNT, reg | URL_PHYCNT_RWCR); /* Write */
sc 1646 dev/usb/if_url.c if (url_csr_read_1(sc, URL_PHYCNT) & URL_PHYCNT_PHYOWN)
sc 1652 dev/usb/if_url.c sc->sc_dev.dv_xname);
sc 1655 dev/usb/if_url.c url_unlock_mii(sc);
sc 128 dev/usb/if_urlreg.h #define GET_IFP(sc) (&(sc)->sc_ac.ac_if)
sc 129 dev/usb/if_urlreg.h #define GET_MII(sc) (&(sc)->sc_mii)
sc 99 dev/usb/if_wi_usb.c int wi_send_packet(struct wi_usb_softc *sc, int id);
sc 104 dev/usb/if_wi_usb.c int wi_usb_tx_lock_try(struct wi_usb_softc *sc);
sc 302 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = (struct wi_usb_softc *)self;
sc 313 dev/usb/if_wi_usb.c DPRINTFN(5,(" : wi_usb_attach: sc=%p", sc));
sc 318 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname);
sc 323 dev/usb/if_wi_usb.c printf("\n%s: %s\n", sc->wi_usb_dev.dv_xname, devinfop);
sc 331 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname);
sc 337 dev/usb/if_wi_usb.c sc->wi_usb_udev = dev;
sc 338 dev/usb/if_wi_usb.c sc->wi_usb_iface = iface;
sc 339 dev/usb/if_wi_usb.c sc->wi_usb_product = uaa->product;
sc 340 dev/usb/if_wi_usb.c sc->wi_usb_vendor = uaa->vendor;
sc 342 dev/usb/if_wi_usb.c sc->sc_wi.wi_usb_cdata = sc;
sc 343 dev/usb/if_wi_usb.c sc->sc_wi.wi_flags |= WI_FLAGS_BUS_USB;
sc 345 dev/usb/if_wi_usb.c sc->wi_lock = 0;
sc 346 dev/usb/if_wi_usb.c sc->wi_lockwait = 0;
sc 347 dev/usb/if_wi_usb.c sc->wi_resetonce = 0;
sc 356 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, i);
sc 361 dev/usb/if_wi_usb.c sc->wi_usb_ed[WI_USB_ENDPT_RX] = ed->bEndpointAddress;
sc 364 dev/usb/if_wi_usb.c sc->wi_usb_ed[WI_USB_ENDPT_TX] = ed->bEndpointAddress;
sc 367 dev/usb/if_wi_usb.c sc->wi_usb_ed[WI_USB_ENDPT_INTR] = ed->bEndpointAddress;
sc 371 dev/usb/if_wi_usb.c sc->wi_usb_nummem = 0;
sc 375 dev/usb/if_wi_usb.c if (wi_usb_rx_list_init(sc)) {
sc 377 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname);
sc 380 dev/usb/if_wi_usb.c if (wi_usb_tx_list_init(sc)) {
sc 382 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname);
sc 386 dev/usb/if_wi_usb.c if (wi_usb_open_pipes(sc)){
sc 388 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname);
sc 392 dev/usb/if_wi_usb.c sc->wi_usb_attached = 1;
sc 394 dev/usb/if_wi_usb.c kthread_create_deferred(wi_usb_start_thread, sc);
sc 396 dev/usb/if_wi_usb.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->wi_usb_udev,
sc 397 dev/usb/if_wi_usb.c &sc->wi_usb_dev);
sc 403 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = (struct wi_usb_softc *)self;
sc 404 dev/usb/if_wi_usb.c struct ifnet *ifp = WI_GET_IFP(sc);
sc 405 dev/usb/if_wi_usb.c struct wi_softc *wsc = &sc->sc_wi;
sc 409 dev/usb/if_wi_usb.c sc->wi_usb_dying = 1;
sc 410 dev/usb/if_wi_usb.c if (sc->wi_thread_info != NULL) {
sc 411 dev/usb/if_wi_usb.c sc->wi_thread_info->dying = 1;
sc 413 dev/usb/if_wi_usb.c sc->wi_thread_info->status |= WI_DYING;
sc 414 dev/usb/if_wi_usb.c if (sc->wi_thread_info->idle)
sc 415 dev/usb/if_wi_usb.c wakeup(sc->wi_thread_info);
sc 418 dev/usb/if_wi_usb.c if (!sc->wi_usb_attached) {
sc 428 dev/usb/if_wi_usb.c printf("%s: already detached\n", sc->wi_usb_dev.dv_xname);
sc 433 dev/usb/if_wi_usb.c wi_detach(&sc->sc_wi);
sc 440 dev/usb/if_wi_usb.c sc->wi_usb_attached = 0;
sc 442 dev/usb/if_wi_usb.c if (--sc->wi_usb_refcnt >= 0) {
sc 444 dev/usb/if_wi_usb.c usb_detach_wait(&sc->wi_usb_dev);
sc 447 dev/usb/if_wi_usb.c while (sc->wi_usb_nummem) {
sc 448 dev/usb/if_wi_usb.c sc->wi_usb_nummem--;
sc 449 dev/usb/if_wi_usb.c if (sc->wi_usb_txmem[sc->wi_usb_nummem] != NULL)
sc 450 dev/usb/if_wi_usb.c free(sc->wi_usb_txmem[sc->wi_usb_nummem], M_DEVBUF);
sc 451 dev/usb/if_wi_usb.c sc->wi_usb_txmem[sc->wi_usb_nummem] = NULL;
sc 454 dev/usb/if_wi_usb.c if (sc->wi_usb_ep[WI_USB_ENDPT_INTR] != NULL) {
sc 455 dev/usb/if_wi_usb.c err = usbd_abort_pipe(sc->wi_usb_ep[WI_USB_ENDPT_INTR]);
sc 458 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, usbd_errstr(err));
sc 460 dev/usb/if_wi_usb.c err = usbd_close_pipe(sc->wi_usb_ep[WI_USB_ENDPT_INTR]);
sc 463 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, usbd_errstr(err));
sc 465 dev/usb/if_wi_usb.c sc->wi_usb_ep[WI_USB_ENDPT_INTR] = NULL;
sc 467 dev/usb/if_wi_usb.c if (sc->wi_usb_ep[WI_USB_ENDPT_TX] != NULL) {
sc 468 dev/usb/if_wi_usb.c usbd_abort_pipe(sc->wi_usb_ep[WI_USB_ENDPT_TX]);
sc 471 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, usbd_errstr(err));
sc 473 dev/usb/if_wi_usb.c err = usbd_close_pipe(sc->wi_usb_ep[WI_USB_ENDPT_TX]);
sc 476 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, usbd_errstr(err));
sc 478 dev/usb/if_wi_usb.c sc->wi_usb_ep[WI_USB_ENDPT_TX] = NULL;
sc 480 dev/usb/if_wi_usb.c if (sc->wi_usb_ep[WI_USB_ENDPT_RX] != NULL) {
sc 481 dev/usb/if_wi_usb.c usbd_abort_pipe(sc->wi_usb_ep[WI_USB_ENDPT_RX]);
sc 484 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, usbd_errstr(err));
sc 486 dev/usb/if_wi_usb.c err = usbd_close_pipe(sc->wi_usb_ep[WI_USB_ENDPT_RX]);
sc 489 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, usbd_errstr(err));
sc 491 dev/usb/if_wi_usb.c sc->wi_usb_ep[WI_USB_ENDPT_RX] = NULL;
sc 496 dev/usb/if_wi_usb.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->wi_usb_udev,
sc 497 dev/usb/if_wi_usb.c &sc->wi_usb_dev);
sc 502 dev/usb/if_wi_usb.c wi_send_packet(struct wi_usb_softc *sc, int id)
sc 509 dev/usb/if_wi_usb.c c = &sc->wi_usb_tx_chain[0];
sc 512 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, id));
sc 517 dev/usb/if_wi_usb.c wibuf = sc->wi_usb_txmem[id];
sc 522 dev/usb/if_wi_usb.c if ((total_len > sc->wi_usb_txmemsize[id]) ||
sc 525 dev/usb/if_wi_usb.c total_len, sc->wi_usb_txmemsize[id], WI_USB_BUFSZ);
sc 526 dev/usb/if_wi_usb.c total_len = sc->wi_usb_txmemsize[id];
sc 532 dev/usb/if_wi_usb.c sc->txresp = WI_CMD_TX;
sc 533 dev/usb/if_wi_usb.c sc->txresperr = 0;
sc 546 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, id, total_len));
sc 548 dev/usb/if_wi_usb.c usbd_setup_xfer(c->wi_usb_xfer, sc->wi_usb_ep[WI_USB_ENDPT_TX],
sc 556 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__,
sc 559 dev/usb/if_wi_usb.c wi_usb_stop(sc);
sc 566 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, err));
sc 571 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, id);
sc 579 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = wsc->wi_usb_cdata;
sc 585 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, cmd, val0, val1, val2));
sc 588 dev/usb/if_wi_usb.c return wi_send_packet(sc, val0);
sc 594 dev/usb/if_wi_usb.c while (sc->wi_usb_nummem) {
sc 595 dev/usb/if_wi_usb.c sc->wi_usb_nummem--;
sc 596 dev/usb/if_wi_usb.c free(sc->wi_usb_txmem[sc->wi_usb_nummem], M_DEVBUF);
sc 597 dev/usb/if_wi_usb.c sc->wi_usb_txmem[sc->wi_usb_nummem] = NULL;
sc 602 dev/usb/if_wi_usb.c if (sc->wi_resetonce) {
sc 605 dev/usb/if_wi_usb.c sc->wi_resetonce = 1;
sc 609 dev/usb/if_wi_usb.c wi_usb_ctl_lock(sc);
sc 611 dev/usb/if_wi_usb.c wi_usb_tx_lock(sc);
sc 613 dev/usb/if_wi_usb.c c = &sc->wi_usb_tx_chain[0];
sc 626 dev/usb/if_wi_usb.c sc->cmdresp = cmd;
sc 627 dev/usb/if_wi_usb.c sc->cmdresperr = 0;
sc 639 dev/usb/if_wi_usb.c usbd_setup_xfer(c->wi_usb_xfer, sc->wi_usb_ep[WI_USB_ENDPT_TX],
sc 643 dev/usb/if_wi_usb.c err = wi_usb_do_transmit_sync(sc, c, &sc->cmdresperr);
sc 646 dev/usb/if_wi_usb.c err = sc->cmdresperr;
sc 648 dev/usb/if_wi_usb.c sc->cmdresperr = 0;
sc 651 dev/usb/if_wi_usb.c wi_usb_tx_unlock(sc);
sc 653 dev/usb/if_wi_usb.c wi_usb_ctl_unlock(sc);
sc 656 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, err));
sc 665 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = wsc->wi_usb_cdata;
sc 672 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, ltv->wi_type));
sc 696 dev/usb/if_wi_usb.c wi_usb_tx_lock(sc);
sc 698 dev/usb/if_wi_usb.c c = &sc->wi_usb_tx_chain[0];
sc 707 dev/usb/if_wi_usb.c wi_usb_tx_unlock(sc);
sc 711 dev/usb/if_wi_usb.c sc->ridltv = ltv;
sc 712 dev/usb/if_wi_usb.c sc->ridresperr = 0;
sc 720 dev/usb/if_wi_usb.c usbd_setup_xfer(c->wi_usb_xfer, sc->wi_usb_ep[WI_USB_ENDPT_TX],
sc 725 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, total_len, ltv->wi_len));
sc 727 dev/usb/if_wi_usb.c err = wi_usb_do_transmit_sync(sc, c, &sc->ridresperr);
sc 779 dev/usb/if_wi_usb.c err = sc->ridresperr;
sc 781 dev/usb/if_wi_usb.c sc->ridresperr = 0;
sc 783 dev/usb/if_wi_usb.c wi_usb_tx_unlock(sc);
sc 786 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, err));
sc 794 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = wsc->wi_usb_cdata;
sc 803 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, ltv->wi_type, ltv->wi_len,
sc 909 dev/usb/if_wi_usb.c wi_usb_tx_lock(sc);
sc 911 dev/usb/if_wi_usb.c c = &sc->wi_usb_tx_chain[0];
sc 921 dev/usb/if_wi_usb.c wi_usb_tx_unlock(sc);
sc 934 dev/usb/if_wi_usb.c usbd_setup_xfer(c->wi_usb_xfer, sc->wi_usb_ep[WI_USB_ENDPT_TX],
sc 938 dev/usb/if_wi_usb.c err = wi_usb_do_transmit_sync(sc, c, &sc->ridresperr);
sc 941 dev/usb/if_wi_usb.c err = sc->ridresperr;
sc 943 dev/usb/if_wi_usb.c sc->ridresperr = 0;
sc 945 dev/usb/if_wi_usb.c wi_usb_tx_unlock(sc);
sc 948 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, err));
sc 963 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = wsc->wi_usb_cdata;
sc 966 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, len));
sc 972 dev/usb/if_wi_usb.c nmem = sc->wi_usb_nummem++;
sc 975 dev/usb/if_wi_usb.c sc->wi_usb_nummem--;
sc 979 dev/usb/if_wi_usb.c sc->wi_usb_txmem[nmem] = malloc(len, M_DEVBUF, M_WAITOK);
sc 980 dev/usb/if_wi_usb.c if (sc->wi_usb_txmem[nmem] == NULL) {
sc 981 dev/usb/if_wi_usb.c sc->wi_usb_nummem--;
sc 984 dev/usb/if_wi_usb.c sc->wi_usb_txmemsize[nmem] = len;
sc 1000 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = wsc->wi_usb_cdata;
sc 1003 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, id, off, len));
sc 1005 dev/usb/if_wi_usb.c if (id < 0 && id >= sc->wi_usb_nummem)
sc 1008 dev/usb/if_wi_usb.c ptr = (u_int8_t *)(sc->wi_usb_txmem[id]) + off;
sc 1010 dev/usb/if_wi_usb.c if (len + off > sc->wi_usb_txmemsize[id])
sc 1013 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__));
sc 1027 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = wsc->wi_usb_cdata;
sc 1030 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, id, off, len));
sc 1032 dev/usb/if_wi_usb.c if (id == 0x1001 && sc->wi_info != NULL)
sc 1033 dev/usb/if_wi_usb.c ptr = (u_int8_t *)sc->wi_info + off;
sc 1034 dev/usb/if_wi_usb.c else if (id == 0x1000 && sc->wi_rxframe != NULL)
sc 1035 dev/usb/if_wi_usb.c ptr = (u_int8_t *)sc->wi_rxframe + off;
sc 1036 dev/usb/if_wi_usb.c else if (id >= 0 && id < sc->wi_usb_nummem) {
sc 1038 dev/usb/if_wi_usb.c if (sc->wi_usb_txmem[id] == NULL)
sc 1040 dev/usb/if_wi_usb.c if (len + off > sc->wi_usb_txmemsize[id])
sc 1043 dev/usb/if_wi_usb.c ptr = (u_int8_t *)(sc->wi_usb_txmem[id]) + off;
sc 1047 dev/usb/if_wi_usb.c if (id < sc->wi_usb_nummem) {
sc 1048 dev/usb/if_wi_usb.c ptr = (u_int8_t *)(sc->wi_usb_txmem[id]) + off;
sc 1050 dev/usb/if_wi_usb.c if (len + off > sc->wi_usb_txmemsize[id])
sc 1059 dev/usb/if_wi_usb.c wi_usb_stop(struct wi_usb_softc *sc)
sc 1061 dev/usb/if_wi_usb.c DPRINTFN(1,("%s: %s: enter\n", sc->wi_usb_dev.dv_xname,__func__));
sc 1068 dev/usb/if_wi_usb.c wi_usb_do_transmit_sync(struct wi_usb_softc *sc, struct wi_usb_chain *c,
sc 1074 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__));
sc 1076 dev/usb/if_wi_usb.c sc->wi_usb_refcnt++;
sc 1080 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__,
sc 1083 dev/usb/if_wi_usb.c wi_usb_stop(sc);
sc 1090 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, err));
sc 1094 dev/usb/if_wi_usb.c if (--sc->wi_usb_refcnt < 0)
sc 1095 dev/usb/if_wi_usb.c usb_detach_wakeup(&sc->wi_usb_dev);
sc 1110 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = c->wi_usb_sc;
sc 1114 dev/usb/if_wi_usb.c if (sc->wi_usb_dying)
sc 1119 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: enter status=%d\n", sc->wi_usb_dev.dv_xname,
sc 1127 dev/usb/if_wi_usb.c printf("%s: usb error on tx: %s\n", sc->wi_usb_dev.dv_xname,
sc 1130 dev/usb/if_wi_usb.c sc->wi_usb_refcnt++;
sc 1132 dev/usb/if_wi_usb.c sc->wi_usb_ep[WI_USB_ENDPT_TX]);
sc 1133 dev/usb/if_wi_usb.c if (--sc->wi_usb_refcnt < 0)
sc 1134 dev/usb/if_wi_usb.c usb_detach_wakeup(&sc->wi_usb_dev);
sc 1153 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = c->wi_usb_sc;
sc 1154 dev/usb/if_wi_usb.c struct wi_softc *wsc = &sc->sc_wi;
sc 1160 dev/usb/if_wi_usb.c if (sc->wi_usb_dying)
sc 1165 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: enter status=%d\n", sc->wi_usb_dev.dv_xname,
sc 1173 dev/usb/if_wi_usb.c printf("%s: usb error on tx: %s\n", sc->wi_usb_dev.dv_xname,
sc 1176 dev/usb/if_wi_usb.c sc->wi_usb_refcnt++;
sc 1178 dev/usb/if_wi_usb.c sc->wi_usb_ep[WI_USB_ENDPT_TX]);
sc 1179 dev/usb/if_wi_usb.c if (--sc->wi_usb_refcnt < 0)
sc 1180 dev/usb/if_wi_usb.c usb_detach_wakeup(&sc->wi_usb_dev);
sc 1191 dev/usb/if_wi_usb.c wi_usb_tx_unlock(sc);
sc 1200 dev/usb/if_wi_usb.c wi_usb_rx_list_init(struct wi_usb_softc *sc)
sc 1205 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: enter\n", sc->wi_usb_dev.dv_xname, __func__));
sc 1208 dev/usb/if_wi_usb.c c = &sc->wi_usb_rx_chain[i];
sc 1209 dev/usb/if_wi_usb.c c->wi_usb_sc = sc;
sc 1215 dev/usb/if_wi_usb.c c->wi_usb_xfer = usbd_alloc_xfer(sc->wi_usb_udev);
sc 1229 dev/usb/if_wi_usb.c wi_usb_tx_list_init(struct wi_usb_softc *sc)
sc 1234 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: enter\n", sc->wi_usb_dev.dv_xname, __func__));
sc 1237 dev/usb/if_wi_usb.c c = &sc->wi_usb_tx_chain[i];
sc 1238 dev/usb/if_wi_usb.c c->wi_usb_sc = sc;
sc 1245 dev/usb/if_wi_usb.c c->wi_usb_xfer = usbd_alloc_xfer(sc->wi_usb_udev);
sc 1259 dev/usb/if_wi_usb.c wi_usb_open_pipes(struct wi_usb_softc *sc)
sc 1266 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: enter\n", sc->wi_usb_dev.dv_xname,__func__));
sc 1268 dev/usb/if_wi_usb.c sc->wi_usb_refcnt++;
sc 1271 dev/usb/if_wi_usb.c err = usbd_open_pipe(sc->wi_usb_iface, sc->wi_usb_ed[WI_USB_ENDPT_RX],
sc 1272 dev/usb/if_wi_usb.c USBD_EXCLUSIVE_USE, &sc->wi_usb_ep[WI_USB_ENDPT_RX]);
sc 1275 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, usbd_errstr(err));
sc 1280 dev/usb/if_wi_usb.c err = usbd_open_pipe(sc->wi_usb_iface, sc->wi_usb_ed[WI_USB_ENDPT_TX],
sc 1281 dev/usb/if_wi_usb.c USBD_EXCLUSIVE_USE, &sc->wi_usb_ep[WI_USB_ENDPT_TX]);
sc 1284 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, usbd_errstr(err));
sc 1290 dev/usb/if_wi_usb.c err = usbd_open_pipe_intr(sc->wi_usb_iface,
sc 1291 dev/usb/if_wi_usb.c sc->wi_usb_ed[WI_USB_ENDPT_INTR], USBD_EXCLUSIVE_USE,
sc 1292 dev/usb/if_wi_usb.c &sc->wi_usb_ep[WI_USB_ENDPT_INTR], sc, &sc->wi_usb_ibuf,
sc 1296 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, usbd_errstr(err));
sc 1303 dev/usb/if_wi_usb.c c = &sc->wi_usb_rx_chain[i];
sc 1304 dev/usb/if_wi_usb.c usbd_setup_xfer(c->wi_usb_xfer, sc->wi_usb_ep[WI_USB_ENDPT_RX],
sc 1308 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: start read\n", sc->wi_usb_dev.dv_xname,
sc 1314 dev/usb/if_wi_usb.c if (--sc->wi_usb_refcnt < 0)
sc 1315 dev/usb/if_wi_usb.c usb_detach_wakeup(&sc->wi_usb_dev);
sc 1334 dev/usb/if_wi_usb.c wi_get_fid_usb(struct wi_softc *sc, int fid)
sc 1350 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = (struct wi_usb_softc *)self;
sc 1352 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: enter\n", sc->wi_usb_dev.dv_xname, __func__));
sc 1359 dev/usb/if_wi_usb.c sc->wi_usb_dying = 1;
sc 1360 dev/usb/if_wi_usb.c sc->wi_thread_info->dying = 1;
sc 1390 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = c->wi_usb_sc;
sc 1395 dev/usb/if_wi_usb.c if (sc->wi_usb_dying)
sc 1398 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: enter status=%d\n", sc->wi_usb_dev.dv_xname,
sc 1406 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, 1,
sc 1412 dev/usb/if_wi_usb.c sc->wi_usb_rx_errs++;
sc 1413 dev/usb/if_wi_usb.c if (usbd_ratecheck(&sc->wi_usb_rx_notice)) {
sc 1415 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, sc->wi_usb_rx_errs,
sc 1417 dev/usb/if_wi_usb.c sc->wi_usb_rx_errs = 0;
sc 1421 dev/usb/if_wi_usb.c sc->wi_usb_refcnt++;
sc 1423 dev/usb/if_wi_usb.c sc->wi_usb_ep[WI_USB_ENDPT_RX]);
sc 1424 dev/usb/if_wi_usb.c if (--sc->wi_usb_refcnt < 0)
sc 1425 dev/usb/if_wi_usb.c usb_detach_wakeup(&sc->wi_usb_dev);
sc 1445 dev/usb/if_wi_usb.c wi_usb_rxfrm(sc, uin, total_len);
sc 1450 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, rtype));
sc 1451 dev/usb/if_wi_usb.c wi_usb_txfrm(sc, uin, total_len);
sc 1459 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, rtype));
sc 1474 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, rtype));
sc 1479 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, rtype));
sc 1497 dev/usb/if_wi_usb.c usbd_setup_xfer(c->wi_usb_xfer, sc->wi_usb_ep[WI_USB_ENDPT_RX],
sc 1500 dev/usb/if_wi_usb.c sc->wi_usb_refcnt++;
sc 1502 dev/usb/if_wi_usb.c if (--sc->wi_usb_refcnt < 0)
sc 1503 dev/usb/if_wi_usb.c usb_detach_wakeup(&sc->wi_usb_dev);
sc 1505 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: start rx\n", sc->wi_usb_dev.dv_xname,
sc 1512 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = priv;
sc 1514 dev/usb/if_wi_usb.c DPRINTFN(2,("%s: %s: enter\n", sc->wi_usb_dev.dv_xname, __func__));
sc 1516 dev/usb/if_wi_usb.c if (sc->wi_usb_dying)
sc 1524 dev/usb/if_wi_usb.c sc->wi_usb_refcnt++;
sc 1526 dev/usb/if_wi_usb.c sc->wi_usb_ep[WI_USB_ENDPT_RX]);
sc 1527 dev/usb/if_wi_usb.c if (--sc->wi_usb_refcnt < 0)
sc 1528 dev/usb/if_wi_usb.c usb_detach_wakeup(&sc->wi_usb_dev);
sc 1539 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = c->wi_usb_sc;
sc 1547 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, type, status, sc->cmdresp,
sc 1552 dev/usb/if_wi_usb.c if (sc->cmdresp != (status & WI_STAT_CMD_CODE)) {
sc 1554 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname,
sc 1555 dev/usb/if_wi_usb.c type, status, sc->cmdresp, cmdresperr));
sc 1559 dev/usb/if_wi_usb.c sc->cmdresperr = (status & WI_STAT_CMD_RESULT) >> 8;
sc 1561 dev/usb/if_wi_usb.c sc->cmdresp = 0; /* good value for idle == INI ?? XXX */
sc 1563 dev/usb/if_wi_usb.c wakeup(&sc->cmdresperr);
sc 1570 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = c->wi_usb_sc;
sc 1575 dev/usb/if_wi_usb.c ltv = sc->ridltv;
sc 1579 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, rid,
sc 1585 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, rid, ltv->wi_type,
sc 1591 dev/usb/if_wi_usb.c sc->ridresperr = EIO;
sc 1596 dev/usb/if_wi_usb.c sc->ridresperr = ENOSPC;
sc 1597 dev/usb/if_wi_usb.c sc->ridltv = 0;
sc 1598 dev/usb/if_wi_usb.c wakeup(&sc->ridresperr);
sc 1605 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, (ltv->wi_len-1)*2,
sc 1612 dev/usb/if_wi_usb.c sc->ridresperr = 0;
sc 1613 dev/usb/if_wi_usb.c sc->ridltv = 0;
sc 1614 dev/usb/if_wi_usb.c wakeup(&sc->ridresperr);
sc 1622 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = c->wi_usb_sc;
sc 1628 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, status));
sc 1630 dev/usb/if_wi_usb.c sc->ridresperr = (status & WI_STAT_CMD_RESULT) >> 8;
sc 1631 dev/usb/if_wi_usb.c sc->ridltv = 0;
sc 1632 dev/usb/if_wi_usb.c wakeup(&sc->ridresperr);
sc 1638 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = c->wi_usb_sc;
sc 1641 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__));
sc 1643 dev/usb/if_wi_usb.c sc->wi_info = ((char *)c->wi_usb_buf) + 2;
sc 1644 dev/usb/if_wi_usb.c wi_update_stats(&sc->sc_wi);
sc 1645 dev/usb/if_wi_usb.c sc->wi_info = NULL;
sc 1649 dev/usb/if_wi_usb.c wi_usb_txfrm(struct wi_usb_softc *sc, wi_usb_usbin *uin, int total_len)
sc 1653 dev/usb/if_wi_usb.c struct wi_softc *wsc = &sc->sc_wi;
sc 1661 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, status));
sc 1663 dev/usb/if_wi_usb.c if (sc->txresp == WI_CMD_TX) {
sc 1664 dev/usb/if_wi_usb.c sc->txresperr=status;
sc 1665 dev/usb/if_wi_usb.c sc->txresp = 0;
sc 1666 dev/usb/if_wi_usb.c wakeup(&sc->txresperr);
sc 1671 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, status));
sc 1677 dev/usb/if_wi_usb.c wi_usb_rxfrm(struct wi_usb_softc *sc, wi_usb_usbin *uin, int total_len)
sc 1682 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, total_len));
sc 1686 dev/usb/if_wi_usb.c sc->wi_rxframe = (void *)uin;
sc 1688 dev/usb/if_wi_usb.c wi_rxeof(&sc->sc_wi);
sc 1690 dev/usb/if_wi_usb.c sc->wi_rxframe = NULL;
sc 1700 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = arg;
sc 1701 dev/usb/if_wi_usb.c kthread_create (wi_usb_thread, arg, NULL, sc->wi_usb_dev.dv_xname);
sc 1708 dev/usb/if_wi_usb.c struct wi_usb_softc *sc;
sc 1712 dev/usb/if_wi_usb.c sc = wsc->wi_usb_cdata;
sc 1717 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__));
sc 1719 dev/usb/if_wi_usb.c if (wi_usb_tx_lock_try(sc)) {
sc 1723 dev/usb/if_wi_usb.c sc->wi_thread_info->status |= WI_START;
sc 1724 dev/usb/if_wi_usb.c if (sc->wi_thread_info->idle)
sc 1725 dev/usb/if_wi_usb.c wakeup(sc->wi_thread_info);
sc 1756 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = wsc->wi_usb_cdata;
sc 1763 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__));
sc 1765 dev/usb/if_wi_usb.c sc->wi_thread_info->status |= WI_INQUIRE;
sc 1767 dev/usb/if_wi_usb.c if (sc->wi_thread_info->idle)
sc 1768 dev/usb/if_wi_usb.c wakeup(sc->wi_thread_info);
sc 1781 dev/usb/if_wi_usb.c struct wi_usb_softc *sc;
sc 1785 dev/usb/if_wi_usb.c sc = wsc->wi_usb_cdata;
sc 1790 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__, ifp));
sc 1792 dev/usb/if_wi_usb.c sc->wi_thread_info->status |= WI_WATCHDOG;
sc 1794 dev/usb/if_wi_usb.c if (sc->wi_thread_info->idle)
sc 1795 dev/usb/if_wi_usb.c wakeup(sc->wi_thread_info);
sc 1821 dev/usb/if_wi_usb.c struct wi_usb_softc *sc = arg;
sc 1832 dev/usb/if_wi_usb.c sc->wi_usb_refcnt++;
sc 1834 dev/usb/if_wi_usb.c sc->wi_thread_info = wi_thread_info;
sc 1838 dev/usb/if_wi_usb.c wi_usb_ctl_lock(sc);
sc 1840 dev/usb/if_wi_usb.c wi_attach(&sc->sc_wi, &wi_func_usb);
sc 1842 dev/usb/if_wi_usb.c wi_usb_ctl_unlock(sc);
sc 1846 dev/usb/if_wi_usb.c if (--sc->wi_usb_refcnt < 0)
sc 1847 dev/usb/if_wi_usb.c usb_detach_wakeup(&sc->wi_usb_dev);
sc 1852 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__,
sc 1855 dev/usb/if_wi_usb.c wi_usb_ctl_lock(sc);
sc 1858 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__,
sc 1864 dev/usb/if_wi_usb.c wi_usb_tx_lock(sc);
sc 1865 dev/usb/if_wi_usb.c wi_func_io.f_start(&sc->sc_wi.sc_ic.ic_if);
sc 1872 dev/usb/if_wi_usb.c wi_func_io.f_inquire(&sc->sc_wi);
sc 1875 dev/usb/if_wi_usb.c wi_func_io.f_watchdog( &sc->sc_wi.sc_ic.ic_if);
sc 1880 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__,
sc 1882 dev/usb/if_wi_usb.c wi_usb_ctl_unlock(sc);
sc 1895 dev/usb/if_wi_usb.c wi_usb_tx_lock_try(struct wi_usb_softc *sc)
sc 1901 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: enter\n", sc->wi_usb_dev.dv_xname, __func__));
sc 1903 dev/usb/if_wi_usb.c if (sc->wi_lock != 0) {
sc 1907 dev/usb/if_wi_usb.c sc->wi_lock = 1;
sc 1914 dev/usb/if_wi_usb.c wi_usb_tx_lock(struct wi_usb_softc *sc)
sc 1921 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: enter\n", sc->wi_usb_dev.dv_xname, __func__));
sc 1923 dev/usb/if_wi_usb.c if (sc->wi_lock != 0) {
sc 1924 dev/usb/if_wi_usb.c sc->wi_lockwait++;
sc 1925 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: busy %d\n", sc->wi_usb_dev.dv_xname,
sc 1926 dev/usb/if_wi_usb.c __func__, sc->wi_lockwait ));
sc 1927 dev/usb/if_wi_usb.c tsleep(&sc->wi_lock, PRIBIO, "witxl", 0);
sc 1930 dev/usb/if_wi_usb.c if (sc->wi_lock != 0)
sc 1932 dev/usb/if_wi_usb.c sc->wi_lock = 1;
sc 1941 dev/usb/if_wi_usb.c wi_usb_tx_unlock(struct wi_usb_softc *sc)
sc 1946 dev/usb/if_wi_usb.c sc->wi_lock = 0;
sc 1948 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: enter\n", sc->wi_usb_dev.dv_xname, __func__));
sc 1950 dev/usb/if_wi_usb.c if (sc->wi_lockwait) {
sc 1952 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__));
sc 1953 dev/usb/if_wi_usb.c sc->wi_lockwait = 0;
sc 1954 dev/usb/if_wi_usb.c wakeup(&sc->wi_lock);
sc 1961 dev/usb/if_wi_usb.c wi_usb_ctl_lock(struct wi_usb_softc *sc)
sc 1968 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: enter\n", sc->wi_usb_dev.dv_xname,
sc 1971 dev/usb/if_wi_usb.c if (sc->wi_ctllock != 0) {
sc 1972 dev/usb/if_wi_usb.c if (curproc == sc->wi_curproc) {
sc 1974 dev/usb/if_wi_usb.c sc->wi_ctllock++;
sc 1978 dev/usb/if_wi_usb.c sc->wi_ctllockwait++;
sc 1979 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: busy %d\n", sc->wi_usb_dev.dv_xname,
sc 1980 dev/usb/if_wi_usb.c __func__, sc->wi_ctllockwait ));
sc 1981 dev/usb/if_wi_usb.c tsleep(&sc->wi_ctllock, PRIBIO, "wiusbthr", 0);
sc 1984 dev/usb/if_wi_usb.c if (sc->wi_ctllock != 0)
sc 1986 dev/usb/if_wi_usb.c sc->wi_ctllock++;
sc 1987 dev/usb/if_wi_usb.c sc->wi_curproc = curproc;
sc 1996 dev/usb/if_wi_usb.c wi_usb_ctl_unlock(struct wi_usb_softc *sc)
sc 2002 dev/usb/if_wi_usb.c sc->wi_ctllock--;
sc 2004 dev/usb/if_wi_usb.c DPRINTFN(10,("%s: %s: enter\n", sc->wi_usb_dev.dv_xname, __func__));
sc 2006 dev/usb/if_wi_usb.c if (sc->wi_ctllock == 0 && sc->wi_ctllockwait) {
sc 2008 dev/usb/if_wi_usb.c sc->wi_usb_dev.dv_xname, __func__));
sc 2009 dev/usb/if_wi_usb.c sc->wi_ctllockwait = 0;
sc 2010 dev/usb/if_wi_usb.c sc->wi_curproc = 0;
sc 2011 dev/usb/if_wi_usb.c wakeup(&sc->wi_ctllock);
sc 144 dev/usb/if_wi_usb.h #define WI_GET_IFP(sc) &(sc)->sc_wi.sc_ic.ic_if
sc 147 dev/usb/if_wi_usb.h int wi_cmd_usb(struct wi_softc *sc, int cmd, int val0, int val1, int val2);
sc 148 dev/usb/if_wi_usb.h int wi_read_record_usb(struct wi_softc *sc, struct wi_ltv_gen *ltv);
sc 149 dev/usb/if_wi_usb.h int wi_write_record_usb(struct wi_softc *sc, struct wi_ltv_gen *ltv);
sc 150 dev/usb/if_wi_usb.h int wi_read_data_usb(struct wi_softc *sc, int id, int off, caddr_t buf,
sc 152 dev/usb/if_wi_usb.h int wi_write_data_usb(struct wi_softc *sc, int id, int off, caddr_t buf,
sc 154 dev/usb/if_wi_usb.h int wi_alloc_nicmem_usb(struct wi_softc *sc, int len, int *id);
sc 155 dev/usb/if_wi_usb.h int wi_get_fid_usb(struct wi_softc *sc, int fid);
sc 156 dev/usb/if_wi_usb.h void wi_init_usb(struct wi_softc *sc);
sc 251 dev/usb/if_zyd.c struct zyd_softc *sc = xsc;
sc 257 dev/usb/if_zyd.c fwname = (sc->mac_rev == ZYD_ZD1211) ? "zd1211" : "zd1211b";
sc 260 dev/usb/if_zyd.c sc->sc_dev.dv_xname, fwname, error);
sc 264 dev/usb/if_zyd.c error = zyd_loadfirmware(sc, fw, size);
sc 268 dev/usb/if_zyd.c sc->sc_dev.dv_xname, error);
sc 273 dev/usb/if_zyd.c if (zyd_complete_attach(sc) == 0)
sc 274 dev/usb/if_zyd.c sc->attached = 1;
sc 280 dev/usb/if_zyd.c struct zyd_softc *sc = (struct zyd_softc *)self;
sc 285 dev/usb/if_zyd.c sc->sc_udev = uaa->device;
sc 287 dev/usb/if_zyd.c devinfop = usbd_devinfo_alloc(sc->sc_udev, 0);
sc 288 dev/usb/if_zyd.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 291 dev/usb/if_zyd.c sc->mac_rev = zyd_lookup(uaa->vendor, uaa->product)->rev;
sc 293 dev/usb/if_zyd.c ddesc = usbd_get_device_descriptor(sc->sc_udev);
sc 296 dev/usb/if_zyd.c "(only >= 43.30 supported)\n", sc->sc_dev.dv_xname,
sc 302 dev/usb/if_zyd.c mountroothook_establish(zyd_attachhook, sc);
sc 304 dev/usb/if_zyd.c zyd_attachhook(sc);
sc 308 dev/usb/if_zyd.c zyd_complete_attach(struct zyd_softc *sc)
sc 310 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 315 dev/usb/if_zyd.c usb_init_task(&sc->sc_task, zyd_task, sc);
sc 316 dev/usb/if_zyd.c timeout_set(&sc->scan_to, zyd_next_scan, sc);
sc 318 dev/usb/if_zyd.c sc->amrr.amrr_min_success_threshold = 1;
sc 319 dev/usb/if_zyd.c sc->amrr.amrr_max_success_threshold = 10;
sc 320 dev/usb/if_zyd.c timeout_set(&sc->amrr_to, zyd_amrr_timeout, sc);
sc 322 dev/usb/if_zyd.c error = usbd_set_config_no(sc->sc_udev, ZYD_CONFIG_NO, 1);
sc 325 dev/usb/if_zyd.c sc->sc_dev.dv_xname);
sc 329 dev/usb/if_zyd.c error = usbd_device2interface_handle(sc->sc_udev, ZYD_IFACE_INDEX,
sc 330 dev/usb/if_zyd.c &sc->sc_iface);
sc 333 dev/usb/if_zyd.c sc->sc_dev.dv_xname);
sc 337 dev/usb/if_zyd.c if ((error = zyd_open_pipes(sc)) != 0) {
sc 338 dev/usb/if_zyd.c printf("%s: could not open pipes\n", sc->sc_dev.dv_xname);
sc 342 dev/usb/if_zyd.c if ((error = zyd_read_eeprom(sc)) != 0) {
sc 343 dev/usb/if_zyd.c printf("%s: could not read EEPROM\n", sc->sc_dev.dv_xname);
sc 347 dev/usb/if_zyd.c if ((error = zyd_rf_attach(sc, sc->rf_rev)) != 0) {
sc 348 dev/usb/if_zyd.c printf("%s: could not attach RF\n", sc->sc_dev.dv_xname);
sc 352 dev/usb/if_zyd.c if ((error = zyd_hw_init(sc)) != 0) {
sc 354 dev/usb/if_zyd.c sc->sc_dev.dv_xname);
sc 359 dev/usb/if_zyd.c sc->sc_dev.dv_xname, (sc->mac_rev == ZYD_ZD1211) ? "": "B",
sc 360 dev/usb/if_zyd.c sc->fw_rev >> 8, sc->fw_rev & 0xff, zyd_rf_name(sc->rf_rev),
sc 361 dev/usb/if_zyd.c sc->pa_rev, ether_sprintf(ic->ic_myaddr));
sc 387 dev/usb/if_zyd.c ifp->if_softc = sc;
sc 394 dev/usb/if_zyd.c memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 402 dev/usb/if_zyd.c sc->sc_newstate = ic->ic_newstate;
sc 407 dev/usb/if_zyd.c bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO,
sc 410 dev/usb/if_zyd.c sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
sc 411 dev/usb/if_zyd.c sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
sc 412 dev/usb/if_zyd.c sc->sc_rxtap.wr_ihdr.it_present = htole32(ZYD_RX_RADIOTAP_PRESENT);
sc 414 dev/usb/if_zyd.c sc->sc_txtap_len = sizeof sc->sc_txtapu;
sc 415 dev/usb/if_zyd.c sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
sc 416 dev/usb/if_zyd.c sc->sc_txtap.wt_ihdr.it_present = htole32(ZYD_TX_RADIOTAP_PRESENT);
sc 419 dev/usb/if_zyd.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 420 dev/usb/if_zyd.c &sc->sc_dev);
sc 428 dev/usb/if_zyd.c struct zyd_softc *sc = (struct zyd_softc *)self;
sc 429 dev/usb/if_zyd.c struct ifnet *ifp = &sc->sc_ic.ic_if;
sc 434 dev/usb/if_zyd.c usb_rem_task(sc->sc_udev, &sc->sc_task);
sc 435 dev/usb/if_zyd.c timeout_del(&sc->scan_to);
sc 436 dev/usb/if_zyd.c timeout_del(&sc->amrr_to);
sc 438 dev/usb/if_zyd.c zyd_close_pipes(sc);
sc 440 dev/usb/if_zyd.c if (!sc->attached) {
sc 448 dev/usb/if_zyd.c zyd_free_rx_list(sc);
sc 449 dev/usb/if_zyd.c zyd_free_tx_list(sc);
sc 451 dev/usb/if_zyd.c sc->attached = 0;
sc 455 dev/usb/if_zyd.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 456 dev/usb/if_zyd.c &sc->sc_dev);
sc 462 dev/usb/if_zyd.c zyd_open_pipes(struct zyd_softc *sc)
sc 469 dev/usb/if_zyd.c edesc = usbd_get_endpoint_descriptor(sc->sc_iface, 0x83);
sc 477 dev/usb/if_zyd.c sc->ibuf = malloc(isize, M_USBDEV, M_NOWAIT);
sc 478 dev/usb/if_zyd.c if (sc->ibuf == NULL)
sc 481 dev/usb/if_zyd.c error = usbd_open_pipe_intr(sc->sc_iface, 0x83, USBD_SHORT_XFER_OK,
sc 482 dev/usb/if_zyd.c &sc->zyd_ep[ZYD_ENDPT_IIN], sc, sc->ibuf, isize, zyd_intr,
sc 486 dev/usb/if_zyd.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 491 dev/usb/if_zyd.c error = usbd_open_pipe(sc->sc_iface, 0x04, USBD_EXCLUSIVE_USE,
sc 492 dev/usb/if_zyd.c &sc->zyd_ep[ZYD_ENDPT_IOUT]);
sc 495 dev/usb/if_zyd.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 500 dev/usb/if_zyd.c error = usbd_open_pipe(sc->sc_iface, 0x82, USBD_EXCLUSIVE_USE,
sc 501 dev/usb/if_zyd.c &sc->zyd_ep[ZYD_ENDPT_BIN]);
sc 504 dev/usb/if_zyd.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 509 dev/usb/if_zyd.c error = usbd_open_pipe(sc->sc_iface, 0x01, USBD_EXCLUSIVE_USE,
sc 510 dev/usb/if_zyd.c &sc->zyd_ep[ZYD_ENDPT_BOUT]);
sc 513 dev/usb/if_zyd.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 519 dev/usb/if_zyd.c fail: zyd_close_pipes(sc);
sc 524 dev/usb/if_zyd.c zyd_close_pipes(struct zyd_softc *sc)
sc 529 dev/usb/if_zyd.c if (sc->zyd_ep[i] != NULL) {
sc 530 dev/usb/if_zyd.c usbd_abort_pipe(sc->zyd_ep[i]);
sc 531 dev/usb/if_zyd.c usbd_close_pipe(sc->zyd_ep[i]);
sc 532 dev/usb/if_zyd.c sc->zyd_ep[i] = NULL;
sc 535 dev/usb/if_zyd.c if (sc->ibuf != NULL) {
sc 536 dev/usb/if_zyd.c free(sc->ibuf, M_USBDEV);
sc 537 dev/usb/if_zyd.c sc->ibuf = NULL;
sc 542 dev/usb/if_zyd.c zyd_alloc_tx_list(struct zyd_softc *sc)
sc 546 dev/usb/if_zyd.c sc->tx_queued = 0;
sc 549 dev/usb/if_zyd.c struct zyd_tx_data *data = &sc->tx_data[i];
sc 551 dev/usb/if_zyd.c data->sc = sc; /* backpointer for callbacks */
sc 553 dev/usb/if_zyd.c data->xfer = usbd_alloc_xfer(sc->sc_udev);
sc 556 dev/usb/if_zyd.c sc->sc_dev.dv_xname);
sc 563 dev/usb/if_zyd.c sc->sc_dev.dv_xname);
sc 573 dev/usb/if_zyd.c fail: zyd_free_tx_list(sc);
sc 578 dev/usb/if_zyd.c zyd_free_tx_list(struct zyd_softc *sc)
sc 580 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 584 dev/usb/if_zyd.c struct zyd_tx_data *data = &sc->tx_data[i];
sc 598 dev/usb/if_zyd.c zyd_alloc_rx_list(struct zyd_softc *sc)
sc 603 dev/usb/if_zyd.c struct zyd_rx_data *data = &sc->rx_data[i];
sc 605 dev/usb/if_zyd.c data->sc = sc; /* backpointer for callbacks */
sc 607 dev/usb/if_zyd.c data->xfer = usbd_alloc_xfer(sc->sc_udev);
sc 610 dev/usb/if_zyd.c sc->sc_dev.dv_xname);
sc 617 dev/usb/if_zyd.c sc->sc_dev.dv_xname);
sc 624 dev/usb/if_zyd.c fail: zyd_free_rx_list(sc);
sc 629 dev/usb/if_zyd.c zyd_free_rx_list(struct zyd_softc *sc)
sc 634 dev/usb/if_zyd.c struct zyd_rx_data *data = &sc->rx_data[i];
sc 676 dev/usb/if_zyd.c struct zyd_softc *sc = arg;
sc 677 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 687 dev/usb/if_zyd.c struct zyd_softc *sc = arg;
sc 688 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 693 dev/usb/if_zyd.c switch (sc->sc_state) {
sc 697 dev/usb/if_zyd.c zyd_set_led(sc, ZYD_LED1, 0);
sc 700 dev/usb/if_zyd.c zyd_write32(sc, sc->fwbase + ZYD_FW_LINK_STATUS, 0);
sc 705 dev/usb/if_zyd.c zyd_set_chan(sc, ic->ic_bss->ni_chan);
sc 706 dev/usb/if_zyd.c timeout_add(&sc->scan_to, hz / 5);
sc 711 dev/usb/if_zyd.c zyd_set_chan(sc, ic->ic_bss->ni_chan);
sc 718 dev/usb/if_zyd.c zyd_set_chan(sc, ni->ni_chan);
sc 722 dev/usb/if_zyd.c zyd_set_led(sc, ZYD_LED1, 1);
sc 725 dev/usb/if_zyd.c zyd_write32(sc, sc->fwbase + ZYD_FW_LINK_STATUS, 1);
sc 727 dev/usb/if_zyd.c zyd_set_bssid(sc, ni->ni_bssid);
sc 737 dev/usb/if_zyd.c timeout_add(&sc->amrr_to, hz);
sc 743 dev/usb/if_zyd.c sc->sc_newstate(ic, sc->sc_state, sc->sc_arg);
sc 749 dev/usb/if_zyd.c struct zyd_softc *sc = ic->ic_softc;
sc 751 dev/usb/if_zyd.c usb_rem_task(sc->sc_udev, &sc->sc_task);
sc 752 dev/usb/if_zyd.c timeout_del(&sc->scan_to);
sc 753 dev/usb/if_zyd.c timeout_del(&sc->amrr_to);
sc 756 dev/usb/if_zyd.c sc->sc_state = nstate;
sc 757 dev/usb/if_zyd.c sc->sc_arg = arg;
sc 758 dev/usb/if_zyd.c usb_add_task(sc->sc_udev, &sc->sc_task);
sc 764 dev/usb/if_zyd.c zyd_cmd(struct zyd_softc *sc, uint16_t code, const void *idata, int ilen,
sc 773 dev/usb/if_zyd.c if ((xfer = usbd_alloc_xfer(sc->sc_udev)) == NULL)
sc 785 dev/usb/if_zyd.c sc->odata = odata;
sc 786 dev/usb/if_zyd.c sc->olen = olen;
sc 788 dev/usb/if_zyd.c usbd_setup_xfer(xfer, sc->zyd_ep[ZYD_ENDPT_IOUT], 0, &cmd,
sc 795 dev/usb/if_zyd.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 804 dev/usb/if_zyd.c error = tsleep(sc, PCATCH, "zydcmd", hz);
sc 805 dev/usb/if_zyd.c sc->odata = NULL; /* in case answer is received too late */
sc 813 dev/usb/if_zyd.c zyd_read16(struct zyd_softc *sc, uint16_t reg, uint16_t *val)
sc 819 dev/usb/if_zyd.c error = zyd_cmd(sc, ZYD_CMD_IORD, ®, sizeof reg, &tmp, sizeof tmp,
sc 827 dev/usb/if_zyd.c zyd_read32(struct zyd_softc *sc, uint16_t reg, uint32_t *val)
sc 835 dev/usb/if_zyd.c error = zyd_cmd(sc, ZYD_CMD_IORD, regs, sizeof regs, tmp, sizeof tmp,
sc 843 dev/usb/if_zyd.c zyd_write16(struct zyd_softc *sc, uint16_t reg, uint16_t val)
sc 850 dev/usb/if_zyd.c return zyd_cmd(sc, ZYD_CMD_IOWR, &pair, sizeof pair, NULL, 0, 0);
sc 854 dev/usb/if_zyd.c zyd_write32(struct zyd_softc *sc, uint16_t reg, uint32_t val)
sc 863 dev/usb/if_zyd.c return zyd_cmd(sc, ZYD_CMD_IOWR, pair, sizeof pair, NULL, 0, 0);
sc 867 dev/usb/if_zyd.c zyd_rfwrite(struct zyd_softc *sc, uint32_t val)
sc 869 dev/usb/if_zyd.c struct zyd_rf *rf = &sc->sc_rf;
sc 874 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &cr203);
sc 884 dev/usb/if_zyd.c return zyd_cmd(sc, ZYD_CMD_RFCFG, &req, 4 + 2 * rf->width, NULL, 0, 0);
sc 888 dev/usb/if_zyd.c zyd_lock_phy(struct zyd_softc *sc)
sc 892 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_MAC_MISC, &tmp);
sc 894 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_MISC, tmp);
sc 898 dev/usb/if_zyd.c zyd_unlock_phy(struct zyd_softc *sc)
sc 902 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_MAC_MISC, &tmp);
sc 904 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_MISC, tmp);
sc 914 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 921 dev/usb/if_zyd.c error = zyd_write16(sc, phyini[i].reg, phyini[i].val);
sc 928 dev/usb/if_zyd.c if ((error = zyd_rfwrite(sc, rfini[i])) != 0)
sc 938 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 940 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR10, on ? 0x89 : 0x15);
sc 941 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR11, on ? 0x00 : 0x81);
sc 949 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 954 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, rfprog[chan - 1].r1);
sc 955 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, rfprog[chan - 1].r2);
sc 967 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 974 dev/usb/if_zyd.c error = zyd_write16(sc, phyini[i].reg, phyini[i].val);
sc 981 dev/usb/if_zyd.c if ((error = zyd_rfwrite(sc, rfini[i])) != 0)
sc 992 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 999 dev/usb/if_zyd.c error = zyd_write16(sc, phyini[i].reg, phyini[i].val);
sc 1006 dev/usb/if_zyd.c if ((error = zyd_rfwrite(sc, rfini[i])) != 0)
sc 1016 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 1017 dev/usb/if_zyd.c int on251 = (sc->mac_rev == ZYD_ZD1211) ? 0x3f : 0x7f;
sc 1019 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR11, on ? 0x00 : 0x04);
sc 1020 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR251, on ? on251 : 0x2f);
sc 1028 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 1033 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, rfprog[chan - 1].r1);
sc 1034 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, rfprog[chan - 1].r2);
sc 1035 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, rfprog[chan - 1].r3);
sc 1037 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR138, 0x28);
sc 1038 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, 0x06);
sc 1050 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 1062 dev/usb/if_zyd.c error = zyd_write16(sc, phyini_1[i].reg, phyini_1[i].val);
sc 1068 dev/usb/if_zyd.c if ((error = zyd_rfwrite(sc, rfini_1[i])) != 0)
sc 1073 dev/usb/if_zyd.c error = zyd_write16(sc, phyini_2[i].reg, phyini_2[i].val);
sc 1079 dev/usb/if_zyd.c if ((error = zyd_rfwrite(sc, rfini_2[i])) != 0)
sc 1084 dev/usb/if_zyd.c error = zyd_write16(sc, phyini_3[i].reg, phyini_3[i].val);
sc 1096 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 1098 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR11, on ? 0x00 : 0x04);
sc 1099 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR251, on ? 0x3f : 0x2f);
sc 1108 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 1115 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR240, 0x57);
sc 1116 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR251, 0x2f);
sc 1119 dev/usb/if_zyd.c if ((error = zyd_rfwrite(sc, rfsc[i])) != 0)
sc 1123 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR128, 0x14);
sc 1124 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR129, 0x12);
sc 1125 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR130, 0x10);
sc 1126 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR38, 0x38);
sc 1127 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR136, 0xdf);
sc 1129 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, rfprog[chan - 1].r1);
sc 1130 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, rfprog[chan - 1].r2);
sc 1131 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, 0x3c9000);
sc 1133 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR251, 0x3f);
sc 1134 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, 0x06);
sc 1135 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR240, 0x08);
sc 1148 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 1154 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR18, 2);
sc 1158 dev/usb/if_zyd.c error = zyd_write16(sc, phyini[i].reg, phyini[i].val);
sc 1164 dev/usb/if_zyd.c if ((error = zyd_rfwrite(sc, rfini[i])) != 0)
sc 1167 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR47, 0x1e);
sc 1168 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_CR_RADIO_PD, &tmp);
sc 1169 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_RADIO_PD, tmp & ~1);
sc 1170 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_RADIO_PD, tmp | 1);
sc 1171 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_RFCFG, 0x05);
sc 1172 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_RFCFG, 0x00);
sc 1173 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR47, 0x1e);
sc 1174 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR18, 3);
sc 1191 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 1195 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR18, 2);
sc 1196 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR47, 0x1e);
sc 1197 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_CR_RADIO_PD, &tmp);
sc 1198 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_RADIO_PD, tmp & ~1);
sc 1199 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_RADIO_PD, tmp | 1);
sc 1200 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_RFCFG, 0x05);
sc 1202 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_RFCFG, 0x00);
sc 1203 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR47, 0x1e);
sc 1206 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, rfprog[chan - 1]);
sc 1208 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR18, 3);
sc 1220 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 1227 dev/usb/if_zyd.c error = zyd_write16(sc, phyini[i].reg, phyini[i].val);
sc 1233 dev/usb/if_zyd.c if ((error = zyd_rfwrite(sc, rfini[i])) != 0)
sc 1251 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 1254 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, 0x1c0000);
sc 1255 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, rfprog[chan - 1]);
sc 1256 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, 0x1c0008);
sc 1268 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 1276 dev/usb/if_zyd.c error = zyd_write16(sc, phyini[i].reg, phyini[i].val);
sc 1280 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
sc 1281 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp & ~(1 << 4));
sc 1285 dev/usb/if_zyd.c if ((error = zyd_rfwrite(sc, rfini[i])) != 0)
sc 1288 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
sc 1289 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp | (1 << 4));
sc 1307 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 1323 dev/usb/if_zyd.c error = zyd_write16(sc, phyini[i].reg, phyini[i].val);
sc 1327 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
sc 1328 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp & ~(1 << 4));
sc 1331 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, rfprog[chan - 1].r1);
sc 1332 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, rfprog[chan - 1].r2);
sc 1336 dev/usb/if_zyd.c if ((error = zyd_rfwrite(sc, rfini[i])) != 0)
sc 1339 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
sc 1340 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp | (1 << 4));
sc 1353 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 1361 dev/usb/if_zyd.c error = zyd_write16(sc, phyini[i].reg, phyini[i].val);
sc 1365 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
sc 1366 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp & ~(1 << 4));
sc 1370 dev/usb/if_zyd.c if ((error = zyd_rfwrite(sc, rfini[i])) != 0)
sc 1373 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
sc 1374 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp | (1 << 4));
sc 1392 dev/usb/if_zyd.c struct zyd_softc *sc = rf->rf_sc;
sc 1408 dev/usb/if_zyd.c error = zyd_write16(sc, phyini[i].reg, phyini[i].val);
sc 1412 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
sc 1413 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp & ~(1 << 4));
sc 1416 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, rfprog[chan - 1].r1);
sc 1417 dev/usb/if_zyd.c (void)zyd_rfwrite(sc, rfprog[chan - 1].r2);
sc 1421 dev/usb/if_zyd.c if ((error = zyd_rfwrite(sc, rfini[i])) != 0)
sc 1424 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
sc 1425 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp | (1 << 4));
sc 1432 dev/usb/if_zyd.c zyd_rf_attach(struct zyd_softc *sc, uint8_t type)
sc 1434 dev/usb/if_zyd.c struct zyd_rf *rf = &sc->sc_rf;
sc 1436 dev/usb/if_zyd.c rf->rf_sc = sc;
sc 1446 dev/usb/if_zyd.c if (sc->mac_rev == ZYD_ZD1211B)
sc 1486 dev/usb/if_zyd.c sc->sc_dev.dv_xname, zyd_rf_name(type));
sc 1505 dev/usb/if_zyd.c zyd_hw_init(struct zyd_softc *sc)
sc 1507 dev/usb/if_zyd.c struct zyd_rf *rf = &sc->sc_rf;
sc 1512 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_AFTER_PNP, 1);
sc 1514 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_FIRMWARE_BASE_ADDR, &sc->fwbase);
sc 1515 dev/usb/if_zyd.c DPRINTF(("firmware base address=0x%04x\n", sc->fwbase));
sc 1518 dev/usb/if_zyd.c (void)zyd_read16(sc, sc->fwbase + ZYD_FW_FIRMWARE_REV, &sc->fw_rev);
sc 1520 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_GPI_EN, 0);
sc 1521 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_CONT_WIN_LIMIT, 0x7f043f);
sc 1524 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_INTERRUPT, 0);
sc 1527 dev/usb/if_zyd.c zyd_lock_phy(sc);
sc 1528 dev/usb/if_zyd.c phyp = (sc->mac_rev == ZYD_ZD1211B) ? zyd_def_phyB : zyd_def_phy;
sc 1530 dev/usb/if_zyd.c if ((error = zyd_write16(sc, phyp->reg, phyp->val)) != 0)
sc 1533 dev/usb/if_zyd.c zyd_unlock_phy(sc);
sc 1536 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_ACK_EXT, 0x00000020);
sc 1537 dev/usb/if_zyd.c zyd_write32(sc, ZYD_CR_ADDA_MBIAS_WT, 0x30000808);
sc 1539 dev/usb/if_zyd.c if (sc->mac_rev == ZYD_ZD1211) {
sc 1540 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_RETRY, 0x00000002);
sc 1542 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_RETRY, 0x02020202);
sc 1543 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MACB_TXPWR_CTL4, 0x007f003f);
sc 1544 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MACB_TXPWR_CTL3, 0x007f003f);
sc 1545 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MACB_TXPWR_CTL2, 0x003f001f);
sc 1546 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MACB_TXPWR_CTL1, 0x001f000f);
sc 1547 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MACB_AIFS_CTL1, 0x00280028);
sc 1548 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MACB_AIFS_CTL2, 0x008C003C);
sc 1549 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MACB_TXOP, 0x01800824);
sc 1552 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_SNIFFER, 0x00000000);
sc 1553 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_RXFILTER, 0x00000000);
sc 1554 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_GHTBL, 0x00000000);
sc 1555 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_GHTBH, 0x80000000);
sc 1556 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_MISC, 0x000000a4);
sc 1557 dev/usb/if_zyd.c zyd_write32(sc, ZYD_CR_ADDA_PWR_DWN, 0x0000007f);
sc 1558 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_BCNCFG, 0x00f00401);
sc 1559 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_PHY_DELAY2, 0x00000000);
sc 1560 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_ACK_EXT, 0x00000080);
sc 1561 dev/usb/if_zyd.c zyd_write32(sc, ZYD_CR_ADDA_PWR_DWN, 0x00000000);
sc 1562 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_SIFS_ACK_TIME, 0x00000100);
sc 1563 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_DIFS_EIFS_SIFS, 0x0547c032);
sc 1564 dev/usb/if_zyd.c zyd_write32(sc, ZYD_CR_RX_PE_DELAY, 0x00000070);
sc 1565 dev/usb/if_zyd.c zyd_write32(sc, ZYD_CR_PS_CTRL, 0x10000000);
sc 1566 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_RTSCTSRATE, 0x02030203);
sc 1567 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_RX_THRESHOLD, 0x000c0640);
sc 1568 dev/usb/if_zyd.c zyd_write32(sc, ZYD_MAC_BACKOFF_PROTECT, 0x00000114);
sc 1571 dev/usb/if_zyd.c zyd_lock_phy(sc);
sc 1573 dev/usb/if_zyd.c zyd_unlock_phy(sc);
sc 1576 dev/usb/if_zyd.c sc->sc_dev.dv_xname);
sc 1581 dev/usb/if_zyd.c if ((error = zyd_set_beacon_interval(sc, 100)) != 0)
sc 1588 dev/usb/if_zyd.c zyd_read_eeprom(struct zyd_softc *sc)
sc 1590 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 1596 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_EEPROM_MAC_ADDR_P1, &tmp);
sc 1601 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_EEPROM_MAC_ADDR_P2, &tmp);
sc 1605 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_EEPROM_POD, &tmp);
sc 1606 dev/usb/if_zyd.c sc->rf_rev = tmp & 0x0f;
sc 1607 dev/usb/if_zyd.c sc->pa_rev = (tmp >> 16) & 0x0f;
sc 1610 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_EEPROM_SUBID, &tmp);
sc 1611 dev/usb/if_zyd.c sc->regdomain = tmp >> 16;
sc 1612 dev/usb/if_zyd.c DPRINTF(("regulatory domain %x\n", sc->regdomain));
sc 1616 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_EEPROM_PWR_CAL + i, &val);
sc 1617 dev/usb/if_zyd.c sc->pwr_cal[i * 2] = val >> 8;
sc 1618 dev/usb/if_zyd.c sc->pwr_cal[i * 2 + 1] = val & 0xff;
sc 1620 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_EEPROM_PWR_INT + i, &val);
sc 1621 dev/usb/if_zyd.c sc->pwr_int[i * 2] = val >> 8;
sc 1622 dev/usb/if_zyd.c sc->pwr_int[i * 2 + 1] = val & 0xff;
sc 1624 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_EEPROM_36M_CAL + i, &val);
sc 1625 dev/usb/if_zyd.c sc->ofdm36_cal[i * 2] = val >> 8;
sc 1626 dev/usb/if_zyd.c sc->ofdm36_cal[i * 2 + 1] = val & 0xff;
sc 1628 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_EEPROM_48M_CAL + i, &val);
sc 1629 dev/usb/if_zyd.c sc->ofdm48_cal[i * 2] = val >> 8;
sc 1630 dev/usb/if_zyd.c sc->ofdm48_cal[i * 2 + 1] = val & 0xff;
sc 1632 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_EEPROM_54M_CAL + i, &val);
sc 1633 dev/usb/if_zyd.c sc->ofdm54_cal[i * 2] = val >> 8;
sc 1634 dev/usb/if_zyd.c sc->ofdm54_cal[i * 2 + 1] = val & 0xff;
sc 1640 dev/usb/if_zyd.c zyd_set_macaddr(struct zyd_softc *sc, const uint8_t *addr)
sc 1645 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_MACADRL, tmp);
sc 1648 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_MACADRH, tmp);
sc 1654 dev/usb/if_zyd.c zyd_set_bssid(struct zyd_softc *sc, const uint8_t *addr)
sc 1659 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_BSSADRL, tmp);
sc 1662 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_BSSADRH, tmp);
sc 1668 dev/usb/if_zyd.c zyd_switch_radio(struct zyd_softc *sc, int on)
sc 1670 dev/usb/if_zyd.c struct zyd_rf *rf = &sc->sc_rf;
sc 1673 dev/usb/if_zyd.c zyd_lock_phy(sc);
sc 1675 dev/usb/if_zyd.c zyd_unlock_phy(sc);
sc 1681 dev/usb/if_zyd.c zyd_set_led(struct zyd_softc *sc, int which, int on)
sc 1685 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_MAC_TX_PE_CONTROL, &tmp);
sc 1689 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_TX_PE_CONTROL, tmp);
sc 1693 dev/usb/if_zyd.c zyd_set_rxfilter(struct zyd_softc *sc)
sc 1697 dev/usb/if_zyd.c switch (sc->sc_ic.ic_opmode) {
sc 1712 dev/usb/if_zyd.c return zyd_write32(sc, ZYD_MAC_RXFILTER, rxfilter);
sc 1716 dev/usb/if_zyd.c zyd_set_chan(struct zyd_softc *sc, struct ieee80211_channel *c)
sc 1718 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 1719 dev/usb/if_zyd.c struct zyd_rf *rf = &sc->sc_rf;
sc 1726 dev/usb/if_zyd.c zyd_lock_phy(sc);
sc 1731 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR31, sc->pwr_int[chan - 1]);
sc 1732 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR68, sc->pwr_cal[chan - 1]);
sc 1734 dev/usb/if_zyd.c if (sc->mac_rev == ZYD_ZD1211B) {
sc 1735 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR67, sc->ofdm36_cal[chan - 1]);
sc 1736 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR66, sc->ofdm48_cal[chan - 1]);
sc 1737 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR65, sc->ofdm54_cal[chan - 1]);
sc 1739 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR69, 0x28);
sc 1740 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR69, 0x2a);
sc 1743 dev/usb/if_zyd.c zyd_unlock_phy(sc);
sc 1747 dev/usb/if_zyd.c zyd_set_beacon_interval(struct zyd_softc *sc, int bintval)
sc 1750 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_ATIM_WND_PERIOD, bintval - 2);
sc 1751 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_PRE_TBTT, bintval - 1);
sc 1752 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_BCN_INTERVAL, bintval);
sc 1785 dev/usb/if_zyd.c struct zyd_softc *sc = (struct zyd_softc *)priv;
sc 1795 dev/usb/if_zyd.c sc->zyd_ep[ZYD_ENDPT_IIN]);
sc 1800 dev/usb/if_zyd.c cmd = (const struct zyd_cmd *)sc->ibuf;
sc 1805 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 1834 dev/usb/if_zyd.c if (sc->odata == NULL)
sc 1839 dev/usb/if_zyd.c bcopy(cmd->data, sc->odata, sc->olen);
sc 1841 dev/usb/if_zyd.c wakeup(sc); /* wakeup caller */
sc 1844 dev/usb/if_zyd.c printf("%s: unknown notification %x\n", sc->sc_dev.dv_xname,
sc 1850 dev/usb/if_zyd.c zyd_rx_data(struct zyd_softc *sc, const uint8_t *buf, uint16_t len)
sc 1852 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 1863 dev/usb/if_zyd.c sc->sc_dev.dv_xname, len);
sc 1874 dev/usb/if_zyd.c sc->sc_dev.dv_xname, stat->flags));
sc 1887 dev/usb/if_zyd.c sc->sc_dev.dv_xname);
sc 1895 dev/usb/if_zyd.c sc->sc_dev.dv_xname);
sc 1906 dev/usb/if_zyd.c if (sc->sc_drvbpf != NULL) {
sc 1908 dev/usb/if_zyd.c struct zyd_rx_radiotap_header *tap = &sc->sc_rxtap;
sc 1922 dev/usb/if_zyd.c mb.m_len = sc->sc_rxtap_len;
sc 1927 dev/usb/if_zyd.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
sc 1946 dev/usb/if_zyd.c struct zyd_softc *sc = data->sc;
sc 1947 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 1957 dev/usb/if_zyd.c usbd_clear_endpoint_stall(sc->zyd_ep[ZYD_ENDPT_BIN]);
sc 1965 dev/usb/if_zyd.c sc->sc_dev.dv_xname, len);
sc 1985 dev/usb/if_zyd.c zyd_rx_data(sc, p, len);
sc 1992 dev/usb/if_zyd.c zyd_rx_data(sc, data->buf, len);
sc 1996 dev/usb/if_zyd.c usbd_setup_xfer(xfer, sc->zyd_ep[ZYD_ENDPT_BIN], data, NULL,
sc 2006 dev/usb/if_zyd.c struct zyd_softc *sc = data->sc;
sc 2007 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 2016 dev/usb/if_zyd.c sc->sc_dev.dv_xname, usbd_errstr(status));
sc 2020 dev/usb/if_zyd.c sc->zyd_ep[ZYD_ENDPT_BOUT]);
sc 2034 dev/usb/if_zyd.c sc->tx_queued--;
sc 2037 dev/usb/if_zyd.c sc->tx_timer = 0;
sc 2045 dev/usb/if_zyd.c zyd_tx_data(struct zyd_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
sc 2047 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 2082 dev/usb/if_zyd.c data = &sc->tx_data[0];
sc 2123 dev/usb/if_zyd.c if (sc->mac_rev == ZYD_ZD1211)
sc 2136 dev/usb/if_zyd.c if (sc->sc_drvbpf != NULL) {
sc 2138 dev/usb/if_zyd.c struct zyd_tx_radiotap_header *tap = &sc->sc_txtap;
sc 2146 dev/usb/if_zyd.c mb.m_len = sc->sc_txtap_len;
sc 2151 dev/usb/if_zyd.c bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT);
sc 2159 dev/usb/if_zyd.c sc->sc_dev.dv_xname, m0->m_pkthdr.len, rate, xferlen));
sc 2163 dev/usb/if_zyd.c usbd_setup_xfer(data->xfer, sc->zyd_ep[ZYD_ENDPT_BOUT], data,
sc 2171 dev/usb/if_zyd.c sc->tx_queued++;
sc 2179 dev/usb/if_zyd.c struct zyd_softc *sc = ifp->if_softc;
sc 2180 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 2194 dev/usb/if_zyd.c if (sc->tx_queued >= ZYD_TX_LIST_CNT) {
sc 2206 dev/usb/if_zyd.c if (zyd_tx_data(sc, m0, ni) != 0)
sc 2214 dev/usb/if_zyd.c if (sc->tx_queued >= ZYD_TX_LIST_CNT) {
sc 2231 dev/usb/if_zyd.c if (zyd_tx_data(sc, m0, ni) != 0) {
sc 2239 dev/usb/if_zyd.c sc->tx_timer = 5;
sc 2247 dev/usb/if_zyd.c struct zyd_softc *sc = ifp->if_softc;
sc 2251 dev/usb/if_zyd.c if (sc->tx_timer > 0) {
sc 2252 dev/usb/if_zyd.c if (--sc->tx_timer == 0) {
sc 2253 dev/usb/if_zyd.c printf("%s: device timeout\n", sc->sc_dev.dv_xname);
sc 2267 dev/usb/if_zyd.c struct zyd_softc *sc = ifp->if_softc;
sc 2268 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 2313 dev/usb/if_zyd.c zyd_set_chan(sc, ic->ic_ibss_chan);
sc 2337 dev/usb/if_zyd.c struct zyd_softc *sc = ifp->if_softc;
sc 2338 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 2345 dev/usb/if_zyd.c error = zyd_set_macaddr(sc, ic->ic_myaddr);
sc 2351 dev/usb/if_zyd.c error = zyd_write32(sc, ZYD_MAC_ENCRYPTION_TYPE, ZYD_ENC_SNIFFER);
sc 2356 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_SNIFFER,
sc 2359 dev/usb/if_zyd.c (void)zyd_set_rxfilter(sc);
sc 2362 dev/usb/if_zyd.c (void)zyd_switch_radio(sc, 1);
sc 2366 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_BAS_RATE, 0x0003);
sc 2368 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_BAS_RATE, 0x1500);
sc 2370 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_BAS_RATE, 0x000f);
sc 2374 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_MAN_RATE, 0x000f);
sc 2376 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_MAN_RATE, 0x1500);
sc 2378 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_MAN_RATE, 0x150f);
sc 2382 dev/usb/if_zyd.c zyd_set_chan(sc, ic->ic_bss->ni_chan);
sc 2385 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_INTERRUPT, ZYD_HWINT_MASK);
sc 2390 dev/usb/if_zyd.c if ((error = zyd_alloc_tx_list(sc)) != 0) {
sc 2392 dev/usb/if_zyd.c sc->sc_dev.dv_xname);
sc 2395 dev/usb/if_zyd.c if ((error = zyd_alloc_rx_list(sc)) != 0) {
sc 2397 dev/usb/if_zyd.c sc->sc_dev.dv_xname);
sc 2405 dev/usb/if_zyd.c struct zyd_rx_data *data = &sc->rx_data[i];
sc 2407 dev/usb/if_zyd.c usbd_setup_xfer(data->xfer, sc->zyd_ep[ZYD_ENDPT_BIN], data,
sc 2413 dev/usb/if_zyd.c sc->sc_dev.dv_xname);
sc 2435 dev/usb/if_zyd.c struct zyd_softc *sc = ifp->if_softc;
sc 2436 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 2438 dev/usb/if_zyd.c sc->tx_timer = 0;
sc 2445 dev/usb/if_zyd.c (void)zyd_switch_radio(sc, 0);
sc 2448 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_RXFILTER, 0);
sc 2451 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_INTERRUPT, 0);
sc 2453 dev/usb/if_zyd.c usbd_abort_pipe(sc->zyd_ep[ZYD_ENDPT_BIN]);
sc 2454 dev/usb/if_zyd.c usbd_abort_pipe(sc->zyd_ep[ZYD_ENDPT_BOUT]);
sc 2456 dev/usb/if_zyd.c zyd_free_rx_list(sc);
sc 2457 dev/usb/if_zyd.c zyd_free_tx_list(sc);
sc 2461 dev/usb/if_zyd.c zyd_loadfirmware(struct zyd_softc *sc, u_char *fw, size_t size)
sc 2482 dev/usb/if_zyd.c if (usbd_do_request(sc->sc_udev, &req, fw) != 0)
sc 2496 dev/usb/if_zyd.c if (usbd_do_request(sc->sc_udev, &req, &stat) != 0)
sc 2505 dev/usb/if_zyd.c struct zyd_softc *sc = arg;
sc 2508 dev/usb/if_zyd.c ieee80211_amrr_choose(&sc->amrr, ni, &zn->amn);
sc 2514 dev/usb/if_zyd.c struct zyd_softc *sc = arg;
sc 2515 dev/usb/if_zyd.c struct ieee80211com *ic = &sc->sc_ic;
sc 2520 dev/usb/if_zyd.c zyd_iter_func(sc, ic->ic_bss);
sc 2522 dev/usb/if_zyd.c ieee80211_iterate_nodes(ic, zyd_iter_func, sc);
sc 2525 dev/usb/if_zyd.c timeout_add(&sc->amrr_to, hz);
sc 2531 dev/usb/if_zyd.c struct zyd_softc *sc = ic->ic_softc;
sc 2534 dev/usb/if_zyd.c ieee80211_amrr_node_init(&sc->amrr, &((struct zyd_node *)ni)->amn);
sc 1103 dev/usb/if_zydreg.h struct zyd_softc *sc;
sc 1110 dev/usb/if_zydreg.h struct zyd_softc *sc;
sc 201 dev/usb/moscom.c struct moscom_softc *sc = (struct moscom_softc *)self;
sc 211 dev/usb/moscom.c sc->sc_udev = uaa->device;
sc 213 dev/usb/moscom.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 216 dev/usb/moscom.c if (usbd_set_config_index(sc->sc_udev, MOSCOM_CONFIG_NO, 1) != 0) {
sc 218 dev/usb/moscom.c sc->sc_dev.dv_xname);
sc 219 dev/usb/moscom.c sc->sc_dying = 1;
sc 224 dev/usb/moscom.c error = usbd_device2interface_handle(sc->sc_udev, MOSCOM_IFACE_NO,
sc 225 dev/usb/moscom.c &sc->sc_iface);
sc 228 dev/usb/moscom.c sc->sc_dev.dv_xname);
sc 229 dev/usb/moscom.c sc->sc_dying = 1;
sc 233 dev/usb/moscom.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 237 dev/usb/moscom.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 240 dev/usb/moscom.c sc->sc_dev.dv_xname, i);
sc 241 dev/usb/moscom.c sc->sc_dying = 1;
sc 254 dev/usb/moscom.c printf("%s: missing endpoint\n", sc->sc_dev.dv_xname);
sc 255 dev/usb/moscom.c sc->sc_dying = 1;
sc 263 dev/usb/moscom.c uca.device = sc->sc_udev;
sc 264 dev/usb/moscom.c uca.iface = sc->sc_iface;
sc 266 dev/usb/moscom.c uca.arg = sc;
sc 269 dev/usb/moscom.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 270 dev/usb/moscom.c &sc->sc_dev);
sc 272 dev/usb/moscom.c sc->sc_subdev = config_found_sm(self, &uca, ucomprint, ucomsubmatch);
sc 278 dev/usb/moscom.c struct moscom_softc *sc = (struct moscom_softc *)self;
sc 281 dev/usb/moscom.c sc->sc_dying = 1;
sc 282 dev/usb/moscom.c if (sc->sc_subdev != NULL) {
sc 283 dev/usb/moscom.c rv = config_detach(sc->sc_subdev, flags);
sc 284 dev/usb/moscom.c sc->sc_subdev = NULL;
sc 287 dev/usb/moscom.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 288 dev/usb/moscom.c &sc->sc_dev);
sc 296 dev/usb/moscom.c struct moscom_softc *sc = (struct moscom_softc *)self;
sc 304 dev/usb/moscom.c if (sc->sc_subdev != NULL)
sc 305 dev/usb/moscom.c rv = config_deactivate(sc->sc_subdev);
sc 306 dev/usb/moscom.c sc->sc_dying = 1;
sc 315 dev/usb/moscom.c struct moscom_softc *sc = vsc;
sc 318 dev/usb/moscom.c if (sc->sc_dying)
sc 322 dev/usb/moscom.c if (moscom_cmd(sc, MOSCOM_FIFO, 0x00) != 0)
sc 325 dev/usb/moscom.c if (moscom_cmd(sc, MOSCOM_FIFO, MOSCOM_FIFO_EN |
sc 336 dev/usb/moscom.c if (usbd_do_request(sc->sc_udev, &req, NULL) != 0)
sc 345 dev/usb/moscom.c struct moscom_softc *sc = vsc;
sc 356 dev/usb/moscom.c val = sc->sc_lcr;
sc 359 dev/usb/moscom.c moscom_cmd(sc, MOSCOM_LCR, val);
sc 365 dev/usb/moscom.c moscom_cmd(sc, MOSCOM_MCR, val);
sc 371 dev/usb/moscom.c struct moscom_softc *sc = (struct moscom_softc *)vsc;
sc 382 dev/usb/moscom.c moscom_cmd(sc, MOSCOM_LCR, MOSCOM_LCR_DIVLATCH_EN);
sc 383 dev/usb/moscom.c moscom_cmd(sc, MOSCOM_BAUDLO, data & 0xFF);
sc 384 dev/usb/moscom.c moscom_cmd(sc, MOSCOM_BAUDHI, (data >> 8) & 0xFF);
sc 412 dev/usb/moscom.c sc->sc_lcr = data;
sc 413 dev/usb/moscom.c moscom_cmd(sc, MOSCOM_LCR, sc->sc_lcr);
sc 432 dev/usb/moscom.c struct moscom_softc *sc = vsc;
sc 435 dev/usb/moscom.c *msr = sc->sc_msr;
sc 437 dev/usb/moscom.c *lsr = sc->sc_lsr;
sc 441 dev/usb/moscom.c moscom_cmd(struct moscom_softc *sc, int reg, int val)
sc 451 dev/usb/moscom.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 173 dev/usb/ohci.c usbd_status ohci_device_setintr(ohci_softc_t *sc,
sc 198 dev/usb/ohci.c #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
sc 200 dev/usb/ohci.c #define OWRITE1(sc, r, x) \
sc 201 dev/usb/ohci.c do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
sc 202 dev/usb/ohci.c #define OWRITE2(sc, r, x) \
sc 203 dev/usb/ohci.c do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
sc 204 dev/usb/ohci.c #define OWRITE4(sc, r, x) \
sc 205 dev/usb/ohci.c do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
sc 206 dev/usb/ohci.c #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
sc 207 dev/usb/ohci.c #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
sc 208 dev/usb/ohci.c #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
sc 318 dev/usb/ohci.c struct ohci_softc *sc = (struct ohci_softc *)self;
sc 326 dev/usb/ohci.c if (sc->sc_child != NULL)
sc 327 dev/usb/ohci.c rv = config_deactivate(sc->sc_child);
sc 328 dev/usb/ohci.c sc->sc_dying = 1;
sc 335 dev/usb/ohci.c ohci_detach(struct ohci_softc *sc, int flags)
sc 339 dev/usb/ohci.c if (sc->sc_child != NULL)
sc 340 dev/usb/ohci.c rv = config_detach(sc->sc_child, flags);
sc 345 dev/usb/ohci.c timeout_del(&sc->sc_tmo_rhsc);
sc 347 dev/usb/ohci.c if (sc->sc_shutdownhook != NULL)
sc 348 dev/usb/ohci.c shutdownhook_disestablish(sc->sc_shutdownhook);
sc 350 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
sc 358 dev/usb/ohci.c ohci_alloc_sed(ohci_softc_t *sc)
sc 365 dev/usb/ohci.c if (sc->sc_freeeds == NULL) {
sc 367 dev/usb/ohci.c err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
sc 375 dev/usb/ohci.c sed->next = sc->sc_freeeds;
sc 376 dev/usb/ohci.c sc->sc_freeeds = sed;
sc 379 dev/usb/ohci.c sed = sc->sc_freeeds;
sc 380 dev/usb/ohci.c sc->sc_freeeds = sed->next;
sc 387 dev/usb/ohci.c ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
sc 389 dev/usb/ohci.c sed->next = sc->sc_freeeds;
sc 390 dev/usb/ohci.c sc->sc_freeeds = sed;
sc 394 dev/usb/ohci.c ohci_alloc_std(ohci_softc_t *sc)
sc 402 dev/usb/ohci.c if (sc->sc_freetds == NULL) {
sc 404 dev/usb/ohci.c err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
sc 413 dev/usb/ohci.c std->nexttd = sc->sc_freetds;
sc 414 dev/usb/ohci.c sc->sc_freetds = std;
sc 420 dev/usb/ohci.c std = sc->sc_freetds;
sc 421 dev/usb/ohci.c sc->sc_freetds = std->nexttd;
sc 425 dev/usb/ohci.c ohci_hash_add_td(sc, std);
sc 432 dev/usb/ohci.c ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
sc 437 dev/usb/ohci.c ohci_hash_rem_td(sc, std);
sc 438 dev/usb/ohci.c std->nexttd = sc->sc_freetds;
sc 439 dev/usb/ohci.c sc->sc_freetds = std;
sc 444 dev/usb/ohci.c ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
sc 467 dev/usb/ohci.c next = ohci_alloc_std(sc);
sc 514 dev/usb/ohci.c next = ohci_alloc_std(sc);
sc 539 dev/usb/ohci.c ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
sc 546 dev/usb/ohci.c ohci_free_std(sc, std);
sc 552 dev/usb/ohci.c ohci_alloc_sitd(ohci_softc_t *sc)
sc 559 dev/usb/ohci.c if (sc->sc_freeitds == NULL) {
sc 561 dev/usb/ohci.c err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
sc 570 dev/usb/ohci.c sitd->nextitd = sc->sc_freeitds;
sc 571 dev/usb/ohci.c sc->sc_freeitds = sitd;
sc 577 dev/usb/ohci.c sitd = sc->sc_freeitds;
sc 578 dev/usb/ohci.c sc->sc_freeitds = sitd->nextitd;
sc 582 dev/usb/ohci.c ohci_hash_add_itd(sc, sitd);
sc 593 dev/usb/ohci.c ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
sc 609 dev/usb/ohci.c ohci_hash_rem_itd(sc, sitd);
sc 610 dev/usb/ohci.c sitd->nextitd = sc->sc_freeitds;
sc 611 dev/usb/ohci.c sc->sc_freeitds = sitd;
sc 616 dev/usb/ohci.c ohci_checkrev(ohci_softc_t *sc)
sc 621 dev/usb/ohci.c rev = OREAD4(sc, OHCI_REVISION);
sc 627 dev/usb/ohci.c sc->sc_bus.bdev.dv_xname);
sc 628 dev/usb/ohci.c sc->sc_bus.usbrev = USBREV_UNKNOWN;
sc 631 dev/usb/ohci.c sc->sc_bus.usbrev = USBREV_1_0;
sc 637 dev/usb/ohci.c ohci_handover(ohci_softc_t *sc)
sc 642 dev/usb/ohci.c ctl = OREAD4(sc, OHCI_CONTROL);
sc 646 dev/usb/ohci.c if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
sc 648 dev/usb/ohci.c OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
sc 649 dev/usb/ohci.c s = OREAD4(sc, OHCI_COMMAND_STATUS);
sc 650 dev/usb/ohci.c OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
sc 652 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, 1);
sc 653 dev/usb/ohci.c ctl = OREAD4(sc, OHCI_CONTROL);
sc 655 dev/usb/ohci.c OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
sc 658 dev/usb/ohci.c sc->sc_bus.bdev.dv_xname);
sc 666 dev/usb/ohci.c ohci_init(ohci_softc_t *sc)
sc 676 dev/usb/ohci.c LIST_INIT(&sc->sc_hash_tds[i]);
sc 678 dev/usb/ohci.c LIST_INIT(&sc->sc_hash_itds[i]);
sc 680 dev/usb/ohci.c SIMPLEQ_INIT(&sc->sc_free_xfers);
sc 684 dev/usb/ohci.c err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
sc 685 dev/usb/ohci.c OHCI_HCCA_ALIGN, &sc->sc_hccadma);
sc 688 dev/usb/ohci.c sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
sc 689 dev/usb/ohci.c memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
sc 691 dev/usb/ohci.c sc->sc_eintrs = OHCI_NORMAL_INTRS;
sc 694 dev/usb/ohci.c sc->sc_ctrl_head = ohci_alloc_sed(sc);
sc 695 dev/usb/ohci.c if (sc->sc_ctrl_head == NULL) {
sc 699 dev/usb/ohci.c sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
sc 702 dev/usb/ohci.c sc->sc_bulk_head = ohci_alloc_sed(sc);
sc 703 dev/usb/ohci.c if (sc->sc_bulk_head == NULL) {
sc 707 dev/usb/ohci.c sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
sc 710 dev/usb/ohci.c sc->sc_isoc_head = ohci_alloc_sed(sc);
sc 711 dev/usb/ohci.c if (sc->sc_isoc_head == NULL) {
sc 715 dev/usb/ohci.c sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
sc 719 dev/usb/ohci.c sed = ohci_alloc_sed(sc);
sc 722 dev/usb/ohci.c ohci_free_sed(sc, sc->sc_eds[i]);
sc 727 dev/usb/ohci.c sc->sc_eds[i] = sed;
sc 730 dev/usb/ohci.c psed = sc->sc_eds[(i-1) / 2];
sc 732 dev/usb/ohci.c psed= sc->sc_isoc_head;
sc 741 dev/usb/ohci.c sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
sc 742 dev/usb/ohci.c htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
sc 748 dev/usb/ohci.c ohci_dump_ed(sc->sc_eds[i]);
sc 751 dev/usb/ohci.c ohci_dump_ed(sc->sc_isoc_head);
sc 755 dev/usb/ohci.c ctl = OREAD4(sc, OHCI_CONTROL);
sc 757 dev/usb/ohci.c fm = OREAD4(sc, OHCI_FM_INTERVAL);
sc 758 dev/usb/ohci.c desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
sc 759 dev/usb/ohci.c descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
sc 763 dev/usb/ohci.c OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
sc 771 dev/usb/ohci.c OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
sc 772 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
sc 779 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
sc 786 dev/usb/ohci.c DPRINTF(("%s: resetting\n", sc->sc_bus.bdev.dv_xname));
sc 787 dev/usb/ohci.c OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
sc 788 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
sc 792 dev/usb/ohci.c OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
sc 796 dev/usb/ohci.c hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
sc 801 dev/usb/ohci.c printf("%s: reset timeout\n", sc->sc_bus.bdev.dv_xname);
sc 807 dev/usb/ohci.c ohci_dumpregs(sc);
sc 813 dev/usb/ohci.c OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
sc 814 dev/usb/ohci.c OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
sc 815 dev/usb/ohci.c OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
sc 817 dev/usb/ohci.c OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
sc 819 dev/usb/ohci.c ctl = OREAD4(sc, OHCI_CONTROL);
sc 824 dev/usb/ohci.c OWRITE4(sc, OHCI_CONTROL, ctl);
sc 832 dev/usb/ohci.c fm = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT;
sc 834 dev/usb/ohci.c OWRITE4(sc, OHCI_FM_INTERVAL, fm);
sc 836 dev/usb/ohci.c OWRITE4(sc, OHCI_PERIODIC_START, per);
sc 839 dev/usb/ohci.c OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
sc 840 dev/usb/ohci.c OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
sc 841 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
sc 842 dev/usb/ohci.c OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
sc 843 dev/usb/ohci.c OWRITE4(sc, OHCI_RH_DESCRIPTOR_B, descb);
sc 844 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, OHCI_GET_POTPGT(desca) * UHD_PWRON_FACTOR);
sc 850 dev/usb/ohci.c sc->sc_noport = 0;
sc 851 dev/usb/ohci.c for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
sc 852 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
sc 853 dev/usb/ohci.c sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
sc 858 dev/usb/ohci.c ohci_dumpregs(sc);
sc 862 dev/usb/ohci.c sc->sc_bus.methods = &ohci_bus_methods;
sc 863 dev/usb/ohci.c sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
sc 865 dev/usb/ohci.c sc->sc_control = sc->sc_intre = 0;
sc 866 dev/usb/ohci.c sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
sc 868 dev/usb/ohci.c timeout_set(&sc->sc_tmo_rhsc, NULL, NULL);
sc 872 dev/usb/ohci.c OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
sc 878 dev/usb/ohci.c ohci_free_sed(sc, sc->sc_eds[i]);
sc 880 dev/usb/ohci.c ohci_free_sed(sc, sc->sc_isoc_head);
sc 882 dev/usb/ohci.c ohci_free_sed(sc, sc->sc_bulk_head);
sc 884 dev/usb/ohci.c ohci_free_sed(sc, sc->sc_ctrl_head);
sc 886 dev/usb/ohci.c usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
sc 893 dev/usb/ohci.c struct ohci_softc *sc = (struct ohci_softc *)bus;
sc 895 dev/usb/ohci.c return (usb_allocmem(&sc->sc_bus, size, 0, dma));
sc 901 dev/usb/ohci.c struct ohci_softc *sc = (struct ohci_softc *)bus;
sc 903 dev/usb/ohci.c usb_freemem(&sc->sc_bus, dma);
sc 909 dev/usb/ohci.c struct ohci_softc *sc = (struct ohci_softc *)bus;
sc 912 dev/usb/ohci.c xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
sc 914 dev/usb/ohci.c SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
sc 936 dev/usb/ohci.c struct ohci_softc *sc = (struct ohci_softc *)bus;
sc 946 dev/usb/ohci.c SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
sc 955 dev/usb/ohci.c ohci_softc_t *sc = v;
sc 958 dev/usb/ohci.c OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
sc 971 dev/usb/ohci.c ohci_softc_t *sc = v;
sc 976 dev/usb/ohci.c DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
sc 977 dev/usb/ohci.c ohci_dumpregs(sc);
sc 984 dev/usb/ohci.c sc->sc_bus.use_polling++;
sc 985 dev/usb/ohci.c reg = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
sc 986 dev/usb/ohci.c if (sc->sc_control == 0) {
sc 991 dev/usb/ohci.c sc->sc_control = reg;
sc 992 dev/usb/ohci.c sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
sc 993 dev/usb/ohci.c sc->sc_ival = OHCI_GET_IVAL(OREAD4(sc,
sc 997 dev/usb/ohci.c OWRITE4(sc, OHCI_CONTROL, reg);
sc 998 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
sc 999 dev/usb/ohci.c sc->sc_bus.use_polling--;
sc 1002 dev/usb/ohci.c sc->sc_bus.use_polling++;
sc 1005 dev/usb/ohci.c OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
sc 1006 dev/usb/ohci.c OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
sc 1007 dev/usb/ohci.c OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
sc 1008 dev/usb/ohci.c if (sc->sc_intre)
sc 1009 dev/usb/ohci.c OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
sc 1010 dev/usb/ohci.c sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
sc 1011 dev/usb/ohci.c if (sc->sc_control)
sc 1012 dev/usb/ohci.c reg = sc->sc_control;
sc 1014 dev/usb/ohci.c reg = OREAD4(sc, OHCI_CONTROL);
sc 1016 dev/usb/ohci.c OWRITE4(sc, OHCI_CONTROL, reg);
sc 1017 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
sc 1019 dev/usb/ohci.c OWRITE4(sc, OHCI_CONTROL, reg);
sc 1021 dev/usb/ohci.c reg = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT;
sc 1022 dev/usb/ohci.c reg |= OHCI_FSMPS(sc->sc_ival) | sc->sc_ival;
sc 1023 dev/usb/ohci.c OWRITE4(sc, OHCI_FM_INTERVAL, reg);
sc 1024 dev/usb/ohci.c OWRITE4(sc, OHCI_PERIODIC_START, OHCI_PERIODIC(sc->sc_ival));
sc 1027 dev/usb/ohci.c reg = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
sc 1028 dev/usb/ohci.c OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg | OHCI_NOCP);
sc 1029 dev/usb/ohci.c OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
sc 1030 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
sc 1031 dev/usb/ohci.c OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg);
sc 1033 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
sc 1034 dev/usb/ohci.c sc->sc_control = sc->sc_intre = sc->sc_ival = 0;
sc 1035 dev/usb/ohci.c sc->sc_bus.use_polling--;
sc 1043 dev/usb/ohci.c ohci_dumpregs(ohci_softc_t *sc)
sc 1046 dev/usb/ohci.c OREAD4(sc, OHCI_REVISION),
sc 1047 dev/usb/ohci.c OREAD4(sc, OHCI_CONTROL),
sc 1048 dev/usb/ohci.c OREAD4(sc, OHCI_COMMAND_STATUS)));
sc 1050 dev/usb/ohci.c OREAD4(sc, OHCI_INTERRUPT_STATUS),
sc 1051 dev/usb/ohci.c OREAD4(sc, OHCI_INTERRUPT_ENABLE),
sc 1052 dev/usb/ohci.c OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
sc 1054 dev/usb/ohci.c OREAD4(sc, OHCI_HCCA),
sc 1055 dev/usb/ohci.c OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
sc 1056 dev/usb/ohci.c OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
sc 1058 dev/usb/ohci.c OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
sc 1059 dev/usb/ohci.c OREAD4(sc, OHCI_BULK_HEAD_ED),
sc 1060 dev/usb/ohci.c OREAD4(sc, OHCI_BULK_CURRENT_ED)));
sc 1062 dev/usb/ohci.c OREAD4(sc, OHCI_DONE_HEAD),
sc 1063 dev/usb/ohci.c OREAD4(sc, OHCI_FM_INTERVAL),
sc 1064 dev/usb/ohci.c OREAD4(sc, OHCI_FM_REMAINING)));
sc 1066 dev/usb/ohci.c OREAD4(sc, OHCI_FM_NUMBER),
sc 1067 dev/usb/ohci.c OREAD4(sc, OHCI_PERIODIC_START),
sc 1068 dev/usb/ohci.c OREAD4(sc, OHCI_LS_THRESHOLD)));
sc 1070 dev/usb/ohci.c OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
sc 1071 dev/usb/ohci.c OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
sc 1072 dev/usb/ohci.c OREAD4(sc, OHCI_RH_STATUS)));
sc 1074 dev/usb/ohci.c OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
sc 1075 dev/usb/ohci.c OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
sc 1077 dev/usb/ohci.c letoh32(sc->sc_hcca->hcca_frame_number),
sc 1078 dev/usb/ohci.c letoh32(sc->sc_hcca->hcca_done_head)));
sc 1087 dev/usb/ohci.c ohci_softc_t *sc = p;
sc 1089 dev/usb/ohci.c if (sc == NULL || sc->sc_dying)
sc 1093 dev/usb/ohci.c if (!cold && sc->sc_bus.use_polling) {
sc 1096 dev/usb/ohci.c if ((OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) &&
sc 1104 dev/usb/ohci.c return (ohci_intr1(sc));
sc 1108 dev/usb/ohci.c ohci_intr1(ohci_softc_t *sc)
sc 1116 dev/usb/ohci.c if (sc == NULL || sc->sc_hcca == NULL) {
sc 1124 dev/usb/ohci.c done = letoh32(sc->sc_hcca->hcca_done_head);
sc 1129 dev/usb/ohci.c intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
sc 1130 dev/usb/ohci.c sc->sc_hcca->hcca_done_head = 0;
sc 1132 dev/usb/ohci.c intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
sc 1135 dev/usb/ohci.c done = letoh32(sc->sc_hcca->hcca_done_head);
sc 1136 dev/usb/ohci.c sc->sc_hcca->hcca_done_head = 0;
sc 1144 dev/usb/ohci.c OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
sc 1145 dev/usb/ohci.c eintrs = intrs & sc->sc_eintrs;
sc 1149 dev/usb/ohci.c sc->sc_bus.intr_context++;
sc 1150 dev/usb/ohci.c sc->sc_bus.no_intrs++;
sc 1152 dev/usb/ohci.c sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
sc 1156 dev/usb/ohci.c sc->sc_overrun_cnt++;
sc 1157 dev/usb/ohci.c if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
sc 1159 dev/usb/ohci.c sc->sc_bus.bdev.dv_xname, sc->sc_overrun_cnt);
sc 1160 dev/usb/ohci.c sc->sc_overrun_cnt = 0;
sc 1166 dev/usb/ohci.c ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
sc 1167 dev/usb/ohci.c usb_schedsoftintr(&sc->sc_bus);
sc 1171 dev/usb/ohci.c printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname);
sc 1176 dev/usb/ohci.c sc->sc_bus.bdev.dv_xname);
sc 1177 dev/usb/ohci.c OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
sc 1181 dev/usb/ohci.c ohci_rhsc(sc, sc->sc_intrxfer);
sc 1186 dev/usb/ohci.c ohci_rhsc_able(sc, 0);
sc 1188 dev/usb/ohci.c sc->sc_bus.bdev.dv_xname));
sc 1191 dev/usb/ohci.c timeout_del(&sc->sc_tmo_rhsc);
sc 1192 dev/usb/ohci.c timeout_set(&sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
sc 1193 dev/usb/ohci.c timeout_add(&sc->sc_tmo_rhsc, hz);
sc 1197 dev/usb/ohci.c sc->sc_bus.intr_context--;
sc 1201 dev/usb/ohci.c OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
sc 1202 dev/usb/ohci.c sc->sc_eintrs &= ~eintrs;
sc 1204 dev/usb/ohci.c sc->sc_bus.bdev.dv_xname, eintrs);
sc 1211 dev/usb/ohci.c ohci_rhsc_able(ohci_softc_t *sc, int on)
sc 1215 dev/usb/ohci.c sc->sc_eintrs |= OHCI_RHSC;
sc 1216 dev/usb/ohci.c OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
sc 1218 dev/usb/ohci.c sc->sc_eintrs &= ~OHCI_RHSC;
sc 1219 dev/usb/ohci.c OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
sc 1226 dev/usb/ohci.c ohci_softc_t *sc = v_sc;
sc 1230 dev/usb/ohci.c ohci_rhsc(sc, sc->sc_intrxfer);
sc 1232 dev/usb/ohci.c sc->sc_bus.bdev.dv_xname));
sc 1234 dev/usb/ohci.c ohci_rhsc_able(sc, 1);
sc 1260 dev/usb/ohci.c ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
sc 1267 dev/usb/ohci.c std = ohci_hash_find_td(sc, done);
sc 1275 dev/usb/ohci.c sitd = ohci_hash_find_itd(sc, done);
sc 1288 dev/usb/ohci.c for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
sc 1291 dev/usb/ohci.c for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
sc 1299 dev/usb/ohci.c ohci_softc_t *sc = v;
sc 1309 dev/usb/ohci.c sc->sc_bus.intr_context++;
sc 1312 dev/usb/ohci.c sdone = sc->sc_sdone;
sc 1313 dev/usb/ohci.c sc->sc_sdone = NULL;
sc 1314 dev/usb/ohci.c sidone = sc->sc_sidone;
sc 1315 dev/usb/ohci.c sc->sc_sidone = NULL;
sc 1367 dev/usb/ohci.c ohci_free_std(sc, std);
sc 1384 dev/usb/ohci.c ohci_free_std(sc, p);
sc 1389 dev/usb/ohci.c OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
sc 1463 dev/usb/ohci.c ohci_free_sitd(sc, sitd);
sc 1465 dev/usb/ohci.c ohci_free_sitd(sc, sitd);
sc 1478 dev/usb/ohci.c if (sc->sc_softwake) {
sc 1479 dev/usb/ohci.c sc->sc_softwake = 0;
sc 1480 dev/usb/ohci.c wakeup(&sc->sc_softwake);
sc 1484 dev/usb/ohci.c sc->sc_bus.intr_context--;
sc 1504 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
sc 1514 dev/usb/ohci.c tail = ohci_alloc_std(sc); /* XXX should reuse TD */
sc 1550 dev/usb/ohci.c ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
sc 1557 dev/usb/ohci.c hstatus = OREAD4(sc, OHCI_RH_STATUS);
sc 1559 dev/usb/ohci.c sc, xfer, hstatus));
sc 1569 dev/usb/ohci.c m = min(sc->sc_noport, xfer->length * 8 - 1);
sc 1573 dev/usb/ohci.c if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
sc 1599 dev/usb/ohci.c ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
sc 1606 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, 1);
sc 1607 dev/usb/ohci.c if (sc->sc_dying)
sc 1609 dev/usb/ohci.c intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
sc 1613 dev/usb/ohci.c ohci_dumpregs(sc);
sc 1616 dev/usb/ohci.c ohci_intr1(sc);
sc 1632 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)bus;
sc 1636 dev/usb/ohci.c new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
sc 1643 dev/usb/ohci.c if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
sc 1644 dev/usb/ohci.c ohci_intr1(sc);
sc 1653 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
sc 1672 dev/usb/ohci.c stat = ohci_alloc_std(sc);
sc 1677 dev/usb/ohci.c tail = ohci_alloc_std(sc);
sc 1702 dev/usb/ohci.c err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
sc 1748 dev/usb/ohci.c OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
sc 1749 dev/usb/ohci.c if (xfer->timeout && !sc->sc_bus.use_polling) {
sc 1760 dev/usb/ohci.c OREAD4(sc, OHCI_COMMAND_STATUS)));
sc 1761 dev/usb/ohci.c ohci_dumpregs(sc);
sc 1763 dev/usb/ohci.c ohci_dump_ed(sc->sc_ctrl_head);
sc 1773 dev/usb/ohci.c ohci_free_std(sc, tail);
sc 1775 dev/usb/ohci.c ohci_free_std(sc, stat);
sc 1827 dev/usb/ohci.c ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
sc 1833 dev/usb/ohci.c LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
sc 1838 dev/usb/ohci.c ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
sc 1846 dev/usb/ohci.c ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
sc 1851 dev/usb/ohci.c for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
sc 1861 dev/usb/ohci.c ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
sc 1870 dev/usb/ohci.c LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
sc 1875 dev/usb/ohci.c ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
sc 1886 dev/usb/ohci.c ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
sc 1891 dev/usb/ohci.c for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
sc 1904 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
sc 1908 dev/usb/ohci.c if (sc->sc_dying) {
sc 2014 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
sc 2029 dev/usb/ohci.c pipe, addr, ed->bEndpointAddress, sc->sc_addr));
sc 2031 dev/usb/ohci.c if (sc->sc_dying)
sc 2037 dev/usb/ohci.c if (addr == sc->sc_addr) {
sc 2049 dev/usb/ohci.c sed = ohci_alloc_sed(sc);
sc 2054 dev/usb/ohci.c sitd = ohci_alloc_sitd(sc);
sc 2065 dev/usb/ohci.c std = ohci_alloc_std(sc);
sc 2084 dev/usb/ohci.c err = usb_allocmem(&sc->sc_bus,
sc 2090 dev/usb/ohci.c ohci_add_ed(sed, sc->sc_ctrl_head);
sc 2098 dev/usb/ohci.c return (ohci_device_setintr(sc, opipe, ival));
sc 2105 dev/usb/ohci.c ohci_add_ed(sed, sc->sc_bulk_head);
sc 2114 dev/usb/ohci.c ohci_free_std(sc, std);
sc 2117 dev/usb/ohci.c ohci_free_sed(sc, sed);
sc 2131 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
sc 2141 dev/usb/ohci.c std = ohci_hash_find_td(sc, letoh32(sed->ed.ed_headp));
sc 2155 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, 2);
sc 2163 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, 1);
sc 2167 dev/usb/ohci.c ohci_free_sed(sc, opipe->sed);
sc 2184 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
sc 2193 dev/usb/ohci.c if (sc->sc_dying) {
sc 2224 dev/usb/ohci.c sc->sc_softwake = 1;
sc 2226 dev/usb/ohci.c usb_schedsoftintr(&sc->sc_bus);
sc 2228 dev/usb/ohci.c tsleep(&sc->sc_softwake, PZERO, "ohciab", 0);
sc 2262 dev/usb/ohci.c ohci_free_std(sc, p);
sc 2383 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
sc 2393 dev/usb/ohci.c if (sc->sc_dying)
sc 2425 dev/usb/ohci.c *(u_int8_t *)buf = sc->sc_conf;
sc 2438 dev/usb/ohci.c USETW(ohci_devd.idVendor, sc->sc_id_vendor);
sc 2469 dev/usb/ohci.c totlen = ohci_str(buf, len, sc->sc_vendor);
sc 2505 dev/usb/ohci.c sc->sc_addr = value;
sc 2512 dev/usb/ohci.c sc->sc_conf = value;
sc 2532 dev/usb/ohci.c if (index < 1 || index > sc->sc_noport) {
sc 2539 dev/usb/ohci.c OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
sc 2542 dev/usb/ohci.c OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
sc 2546 dev/usb/ohci.c OWRITE4(sc, port, UPS_LOW_SPEED);
sc 2549 dev/usb/ohci.c OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
sc 2552 dev/usb/ohci.c OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
sc 2555 dev/usb/ohci.c OWRITE4(sc, port, UPS_C_SUSPEND << 16);
sc 2558 dev/usb/ohci.c OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
sc 2561 dev/usb/ohci.c OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
sc 2574 dev/usb/ohci.c if ((OREAD4(sc, port) >> 16) == 0)
sc 2575 dev/usb/ohci.c ohci_rhsc_able(sc, 1);
sc 2586 dev/usb/ohci.c v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
sc 2588 dev/usb/ohci.c hubd.bNbrPorts = sc->sc_noport;
sc 2595 dev/usb/ohci.c v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
sc 2596 dev/usb/ohci.c for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
sc 2614 dev/usb/ohci.c if (index < 1 || index > sc->sc_noport) {
sc 2622 dev/usb/ohci.c v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
sc 2637 dev/usb/ohci.c if (index < 1 || index > sc->sc_noport) {
sc 2644 dev/usb/ohci.c OWRITE4(sc, port, UPS_PORT_ENABLED);
sc 2647 dev/usb/ohci.c OWRITE4(sc, port, UPS_SUSPEND);
sc 2652 dev/usb/ohci.c OWRITE4(sc, port, UPS_RESET);
sc 2654 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus,
sc 2656 dev/usb/ohci.c if (sc->sc_dying) {
sc 2660 dev/usb/ohci.c if ((OREAD4(sc, port) & UPS_RESET) == 0)
sc 2664 dev/usb/ohci.c index, OREAD4(sc, port)));
sc 2669 dev/usb/ohci.c OWRITE4(sc, port, UPS_PORT_POWER);
sc 2723 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
sc 2725 dev/usb/ohci.c if (sc->sc_dying)
sc 2728 dev/usb/ohci.c sc->sc_intrxfer = xfer;
sc 2753 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
sc 2757 dev/usb/ohci.c sc->sc_intrxfer = NULL;
sc 2779 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
sc 2782 dev/usb/ohci.c if (sc->sc_dying)
sc 2797 dev/usb/ohci.c if (sc->sc_bus.use_polling)
sc 2798 dev/usb/ohci.c ohci_waitintr(sc, xfer);
sc 2816 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
sc 2819 dev/usb/ohci.c ohci_close_pipe(pipe, sc->sc_ctrl_head);
sc 2820 dev/usb/ohci.c ohci_free_std(sc, opipe->tail.td);
sc 2857 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
sc 2864 dev/usb/ohci.c if (sc->sc_dying)
sc 2894 dev/usb/ohci.c err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
sc 2929 dev/usb/ohci.c OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
sc 2930 dev/usb/ohci.c if (xfer->timeout && !sc->sc_bus.use_polling) {
sc 2941 dev/usb/ohci.c OREAD4(sc, OHCI_COMMAND_STATUS)));
sc 2949 dev/usb/ohci.c if (sc->sc_bus.use_polling)
sc 2950 dev/usb/ohci.c ohci_waitintr(sc, xfer);
sc 2969 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
sc 2972 dev/usb/ohci.c ohci_close_pipe(pipe, sc->sc_bulk_head);
sc 2973 dev/usb/ohci.c ohci_free_std(sc, opipe->tail.td);
sc 2997 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
sc 3002 dev/usb/ohci.c if (sc->sc_dying)
sc 3019 dev/usb/ohci.c tail = ohci_alloc_std(sc);
sc 3060 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, 5);
sc 3062 dev/usb/ohci.c OREAD4(sc, OHCI_COMMAND_STATUS)));
sc 3088 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
sc 3101 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, 2);
sc 3103 dev/usb/ohci.c for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
sc 3114 dev/usb/ohci.c --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
sc 3116 dev/usb/ohci.c ohci_free_std(sc, opipe->tail.td);
sc 3117 dev/usb/ohci.c ohci_free_sed(sc, opipe->sed);
sc 3121 dev/usb/ohci.c ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
sc 3156 dev/usb/ohci.c bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
sc 3166 dev/usb/ohci.c hsed = sc->sc_eds[best];
sc 3174 dev/usb/ohci.c ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
sc 3215 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
sc 3227 dev/usb/ohci.c if (sc->sc_dying)
sc 3232 dev/usb/ohci.c iso->next = letoh32(sc->sc_hcca->hcca_frame_number) + 5;
sc 3249 dev/usb/ohci.c nsitd = ohci_alloc_sitd(sc);
sc 3253 dev/usb/ohci.c sc->sc_bus.bdev.dv_xname);
sc 3278 dev/usb/ohci.c nsitd = ohci_alloc_sitd(sc);
sc 3282 dev/usb/ohci.c sc->sc_bus.bdev.dv_xname);
sc 3308 dev/usb/ohci.c letoh32(sc->sc_hcca->hcca_frame_number)));
sc 3324 dev/usb/ohci.c letoh32(sc->sc_hcca->hcca_frame_number)));
sc 3335 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
sc 3339 dev/usb/ohci.c if (sc->sc_dying)
sc 3356 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
sc 3396 dev/usb/ohci.c usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
sc 3419 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
sc 3427 dev/usb/ohci.c ohci_add_ed(opipe->sed, sc->sc_isoc_head);
sc 3437 dev/usb/ohci.c ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
sc 3440 dev/usb/ohci.c ohci_close_pipe(pipe, sc->sc_isoc_head);
sc 3444 dev/usb/ohci.c ohci_free_sitd(sc, opipe->tail.itd);
sc 77 dev/usb/uark.c int uark_open(void *sc, int);
sc 128 dev/usb/uark.c struct uark_softc *sc = (struct uark_softc *)self;
sc 138 dev/usb/uark.c sc->sc_udev = uaa->device;
sc 140 dev/usb/uark.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 143 dev/usb/uark.c if (usbd_set_config_index(sc->sc_udev, UARK_CONFIG_NO, 1) != 0) {
sc 145 dev/usb/uark.c sc->sc_dev.dv_xname);
sc 146 dev/usb/uark.c sc->sc_dying = 1;
sc 151 dev/usb/uark.c error = usbd_device2interface_handle(sc->sc_udev, UARK_IFACE_NO,
sc 152 dev/usb/uark.c &sc->sc_iface);
sc 155 dev/usb/uark.c sc->sc_dev.dv_xname);
sc 156 dev/usb/uark.c sc->sc_dying = 1;
sc 160 dev/usb/uark.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 164 dev/usb/uark.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 167 dev/usb/uark.c sc->sc_dev.dv_xname, i);
sc 168 dev/usb/uark.c sc->sc_dying = 1;
sc 181 dev/usb/uark.c printf("%s: missing endpoint\n", sc->sc_dev.dv_xname);
sc 182 dev/usb/uark.c sc->sc_dying = 1;
sc 190 dev/usb/uark.c uca.device = sc->sc_udev;
sc 191 dev/usb/uark.c uca.iface = sc->sc_iface;
sc 193 dev/usb/uark.c uca.arg = sc;
sc 196 dev/usb/uark.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 197 dev/usb/uark.c &sc->sc_dev);
sc 199 dev/usb/uark.c sc->sc_subdev = config_found_sm(self, &uca, ucomprint, ucomsubmatch);
sc 205 dev/usb/uark.c struct uark_softc *sc = (struct uark_softc *)self;
sc 208 dev/usb/uark.c sc->sc_dying = 1;
sc 209 dev/usb/uark.c if (sc->sc_subdev != NULL) {
sc 210 dev/usb/uark.c rv = config_detach(sc->sc_subdev, flags);
sc 211 dev/usb/uark.c sc->sc_subdev = NULL;
sc 214 dev/usb/uark.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 215 dev/usb/uark.c &sc->sc_dev);
sc 223 dev/usb/uark.c struct uark_softc *sc = (struct uark_softc *)self;
sc 231 dev/usb/uark.c if (sc->sc_subdev != NULL)
sc 232 dev/usb/uark.c rv = config_deactivate(sc->sc_subdev);
sc 233 dev/usb/uark.c sc->sc_dying = 1;
sc 242 dev/usb/uark.c struct uark_softc *sc = vsc;
sc 246 dev/usb/uark.c uark_break(sc, portno, onoff);
sc 258 dev/usb/uark.c struct uark_softc *sc = (struct uark_softc *)vsc;
sc 273 dev/usb/uark.c uark_cmd(sc, 3, 0x83);
sc 274 dev/usb/uark.c uark_cmd(sc, 0, (UARK_BAUD_REF / t->c_ospeed) & 0xFF);
sc 275 dev/usb/uark.c uark_cmd(sc, 1, (UARK_BAUD_REF / t->c_ospeed) >> 8);
sc 276 dev/usb/uark.c uark_cmd(sc, 3, 0x03);
sc 310 dev/usb/uark.c uark_cmd(sc, 3, 0x00);
sc 311 dev/usb/uark.c uark_cmd(sc, 3, data);
sc 330 dev/usb/uark.c struct uark_softc *sc = vsc;
sc 333 dev/usb/uark.c *msr = sc->sc_msr;
sc 335 dev/usb/uark.c *lsr = sc->sc_lsr;
sc 342 dev/usb/uark.c struct uark_softc *sc = vsc;
sc 344 dev/usb/uark.c printf("%s: break %s!\n", sc->sc_dev.dv_xname,
sc 349 dev/usb/uark.c uark_cmd(sc, 4, 0x01);
sc 351 dev/usb/uark.c uark_cmd(sc, 4, 0x00);
sc 356 dev/usb/uark.c uark_cmd(struct uark_softc *sc, uint16_t index, uint16_t value)
sc 366 dev/usb/uark.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 155 dev/usb/uaudio.c struct uaudio_softc *sc; /* our softc */
sc 401 dev/usb/uaudio.c struct uaudio_softc *sc = (struct uaudio_softc *)self;
sc 413 dev/usb/uaudio.c sc->sc_udev = uaa->device;
sc 415 dev/usb/uaudio.c cdesc = usbd_get_config_descriptor(sc->sc_udev);
sc 418 dev/usb/uaudio.c sc->sc_dev.dv_xname);
sc 422 dev/usb/uaudio.c err = uaudio_identify(sc, cdesc);
sc 425 dev/usb/uaudio.c sc->sc_dev.dv_xname, err);
sc 429 dev/usb/uaudio.c sc->sc_ac_ifaceh = uaa->iface;
sc 438 dev/usb/uaudio.c for (j = 0; j < sc->sc_nalts; j++) {
sc 440 dev/usb/uaudio.c sc->sc_alts[j].idesc->bInterfaceNumber) {
sc 441 dev/usb/uaudio.c sc->sc_alts[j].ifaceh = uaa->ifaces[i];
sc 449 dev/usb/uaudio.c for (j = 0; j < sc->sc_nalts; j++) {
sc 450 dev/usb/uaudio.c if (sc->sc_alts[j].ifaceh == NULL) {
sc 452 dev/usb/uaudio.c sc->sc_dev.dv_xname, j);
sc 457 dev/usb/uaudio.c printf("%s: audio rev %d.%02x", sc->sc_dev.dv_xname,
sc 458 dev/usb/uaudio.c sc->sc_audio_rev >> 8, sc->sc_audio_rev & 0xff);
sc 460 dev/usb/uaudio.c sc->sc_playchan.sc = sc->sc_recchan.sc = sc;
sc 461 dev/usb/uaudio.c sc->sc_playchan.altidx = -1;
sc 462 dev/usb/uaudio.c sc->sc_recchan.altidx = -1;
sc 464 dev/usb/uaudio.c if (usbd_get_quirks(sc->sc_udev)->uq_flags & UQ_AU_NO_FRAC)
sc 465 dev/usb/uaudio.c sc->sc_altflags |= UA_NOFRAC;
sc 467 dev/usb/uaudio.c printf(", %d mixer controls\n", sc->sc_nctls);
sc 469 dev/usb/uaudio.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 470 dev/usb/uaudio.c &sc->sc_dev);
sc 473 dev/usb/uaudio.c sc->sc_audiodev = audio_attach_mi(&uaudio_hw_if, sc, &sc->sc_dev);
sc 487 dev/usb/uaudio.c struct uaudio_softc *sc = (struct uaudio_softc *)self;
sc 494 dev/usb/uaudio.c if (sc->sc_audiodev != NULL)
sc 495 dev/usb/uaudio.c rv = config_deactivate(sc->sc_audiodev);
sc 496 dev/usb/uaudio.c sc->sc_dying = 1;
sc 505 dev/usb/uaudio.c struct uaudio_softc *sc = (struct uaudio_softc *)self;
sc 509 dev/usb/uaudio.c usbd_delay_ms(sc->sc_udev, UAUDIO_NCHANBUFS * UAUDIO_NFRAMES);
sc 511 dev/usb/uaudio.c if (sc->sc_audiodev != NULL)
sc 512 dev/usb/uaudio.c rv = config_detach(sc->sc_audiodev, flags);
sc 514 dev/usb/uaudio.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 515 dev/usb/uaudio.c &sc->sc_dev);
sc 523 dev/usb/uaudio.c struct uaudio_softc *sc = addr;
sc 524 dev/usb/uaudio.c int flags = sc->sc_altflags;
sc 527 dev/usb/uaudio.c if (sc->sc_dying)
sc 530 dev/usb/uaudio.c if (sc->sc_nalts == 0 || flags == 0)
sc 605 dev/usb/uaudio.c uaudio_mixer_add_ctl(struct uaudio_softc *sc, struct mixerctl *mc)
sc 617 dev/usb/uaudio.c len = sizeof(*mc) * (sc->sc_nctls + 1);
sc 624 dev/usb/uaudio.c if (sc->sc_nctls != 0) {
sc 625 dev/usb/uaudio.c bcopy(sc->sc_ctls, nmc, sizeof(*mc) * (sc->sc_nctls));
sc 626 dev/usb/uaudio.c free(sc->sc_ctls, M_USBDEV);
sc 628 dev/usb/uaudio.c sc->sc_ctls = nmc;
sc 639 dev/usb/uaudio.c uaudio_get(sc, GET_MIN, UT_READ_CLASS_INTERFACE,
sc 643 dev/usb/uaudio.c uaudio_get(sc, GET_MAX, UT_READ_CLASS_INTERFACE,
sc 649 dev/usb/uaudio.c res = uaudio_get(sc, GET_RES, UT_READ_CLASS_INTERFACE,
sc 656 dev/usb/uaudio.c sc->sc_ctls[sc->sc_nctls++] = *mc;
sc 673 dev/usb/uaudio.c uaudio_id_name(struct uaudio_softc *sc, const struct io_terminal *iot, int id)
sc 731 dev/usb/uaudio.c uaudio_add_input(struct uaudio_softc *sc, const struct io_terminal *iot, int id)
sc 746 dev/usb/uaudio.c uaudio_add_output(struct uaudio_softc *sc, const struct io_terminal *iot, int id)
sc 759 dev/usb/uaudio.c uaudio_add_mixer(struct uaudio_softc *sc, const struct io_terminal *iot, int id)
sc 781 dev/usb/uaudio.c mix.wIndex = MAKE(d->bUnitId, sc->sc_ac_iface);
sc 809 dev/usb/uaudio.c d->bUnitId, uaudio_id_name(sc, iot,
sc 812 dev/usb/uaudio.c uaudio_mixer_add_ctl(sc, &mix);
sc 823 dev/usb/uaudio.c uaudio_add_selector(struct uaudio_softc *sc, const struct io_terminal *iot, int id)
sc 831 dev/usb/uaudio.c mix.wIndex = MAKE(d->bUnitId, sc->sc_ac_iface);
sc 847 dev/usb/uaudio.c uaudio_mixer_add_ctl(sc, &mix);
sc 1079 dev/usb/uaudio.c uaudio_add_feature(struct uaudio_softc *sc, const struct io_terminal *iot, int id)
sc 1108 dev/usb/uaudio.c mix.wIndex = MAKE(unit, sc->sc_ac_iface);
sc 1187 dev/usb/uaudio.c uaudio_mixer_add_ctl(sc, &mix);
sc 1192 dev/usb/uaudio.c uaudio_add_processing_updown(struct uaudio_softc *sc,
sc 1212 dev/usb/uaudio.c mix.wIndex = MAKE(d->bUnitId, sc->sc_ac_iface);
sc 1225 dev/usb/uaudio.c uaudio_mixer_add_ctl(sc, &mix);
sc 1229 dev/usb/uaudio.c uaudio_add_processing(struct uaudio_softc *sc, const struct io_terminal *iot, int id)
sc 1241 dev/usb/uaudio.c mix.wIndex = MAKE(d->bUnitId, sc->sc_ac_iface);
sc 1249 dev/usb/uaudio.c uaudio_mixer_add_ctl(sc, &mix);
sc 1254 dev/usb/uaudio.c uaudio_add_processing_updown(sc, iot, id);
sc 1271 dev/usb/uaudio.c uaudio_add_extension(struct uaudio_softc *sc, const struct io_terminal *iot, int id)
sc 1281 dev/usb/uaudio.c if (usbd_get_quirks(sc->sc_udev)->uq_flags & UQ_AU_NO_XU)
sc 1285 dev/usb/uaudio.c mix.wIndex = MAKE(d->bUnitId, sc->sc_ac_iface);
sc 1293 dev/usb/uaudio.c uaudio_mixer_add_ctl(sc, &mix);
sc 1484 dev/usb/uaudio.c uaudio_identify(struct uaudio_softc *sc, const usb_config_descriptor_t *cdesc)
sc 1488 dev/usb/uaudio.c err = uaudio_identify_ac(sc, cdesc);
sc 1491 dev/usb/uaudio.c return (uaudio_identify_as(sc, cdesc));
sc 1495 dev/usb/uaudio.c uaudio_add_alt(struct uaudio_softc *sc, const struct as_info *ai)
sc 1500 dev/usb/uaudio.c len = sizeof(*ai) * (sc->sc_nalts + 1);
sc 1507 dev/usb/uaudio.c if (sc->sc_nalts != 0) {
sc 1508 dev/usb/uaudio.c bcopy(sc->sc_alts, nai, sizeof(*ai) * (sc->sc_nalts));
sc 1509 dev/usb/uaudio.c free(sc->sc_alts, M_USBDEV);
sc 1511 dev/usb/uaudio.c sc->sc_alts = nai;
sc 1514 dev/usb/uaudio.c sc->sc_alts[sc->sc_nalts++] = *ai;
sc 1518 dev/usb/uaudio.c uaudio_process_as(struct uaudio_softc *sc, const char *buf, int *offsp,
sc 1552 dev/usb/uaudio.c sc->sc_dev.dv_xname, UGETW(asid->wFormatTag));
sc 1573 dev/usb/uaudio.c if ((usbd_get_quirks(sc->sc_udev)->uq_flags & UQ_AU_INP_ASYNC) &&
sc 1583 dev/usb/uaudio.c sc->sc_dev.dv_xname);
sc 1591 dev/usb/uaudio.c sc->sc_dev.dv_xname);
sc 1607 dev/usb/uaudio.c sc->sc_dev.dv_xname);
sc 1612 dev/usb/uaudio.c sc->sc_dev.dv_xname);
sc 1633 dev/usb/uaudio.c sc->sc_dev.dv_xname);
sc 1638 dev/usb/uaudio.c sc->sc_dev.dv_xname, epdesc1->bmAttributes);
sc 1645 dev/usb/uaudio.c sc->sc_dev.dv_xname, ed->bSynchAddress,
sc 1657 dev/usb/uaudio.c sc->sc_dev.dv_xname, prec);
sc 1663 dev/usb/uaudio.c sc->sc_altflags |= HAS_8;
sc 1665 dev/usb/uaudio.c sc->sc_altflags |= HAS_16;
sc 1667 dev/usb/uaudio.c sc->sc_altflags |= HAS_24;
sc 1674 dev/usb/uaudio.c sc->sc_altflags |= HAS_8U;
sc 1679 dev/usb/uaudio.c sc->sc_altflags |= HAS_ALAW;
sc 1684 dev/usb/uaudio.c sc->sc_altflags |= HAS_MULAW;
sc 1690 dev/usb/uaudio.c sc->sc_dev.dv_xname, format);
sc 1694 dev/usb/uaudio.c printf("%s: %s: %dch, %d/%dbit, %s,", sc->sc_dev.dv_xname,
sc 1715 dev/usb/uaudio.c uaudio_add_alt(sc, &ai);
sc 1722 dev/usb/uaudio.c sc->sc_mode |= (dir == UE_DIR_OUT) ? AUMODE_PLAY : AUMODE_RECORD;
sc 1729 dev/usb/uaudio.c uaudio_identify_as(struct uaudio_softc *sc,
sc 1753 dev/usb/uaudio.c sc->sc_nullalt = id->bAlternateSetting;
sc 1759 dev/usb/uaudio.c uaudio_process_as(sc, buf, &offs, size, id);
sc 1764 dev/usb/uaudio.c sc->sc_dev.dv_xname, id->bNumEndpoints);
sc 1773 dev/usb/uaudio.c DPRINTF(("uaudio_identify_as: %d alts available\n", sc->sc_nalts));
sc 1775 dev/usb/uaudio.c if (sc->sc_mode == 0) {
sc 1777 dev/usb/uaudio.c sc->sc_dev.dv_xname);
sc 1785 dev/usb/uaudio.c uaudio_identify_ac(struct uaudio_softc *sc, const usb_config_descriptor_t *cdesc)
sc 1806 dev/usb/uaudio.c sc->sc_ac_iface = id->bInterfaceNumber;
sc 1807 dev/usb/uaudio.c DPRINTFN(2,("uaudio_identify_ac: AC interface is %d\n", sc->sc_ac_iface));
sc 1819 dev/usb/uaudio.c if (!(usbd_get_quirks(sc->sc_udev)->uq_flags & UQ_BAD_ADC) &&
sc 1823 dev/usb/uaudio.c sc->sc_audio_rev = UGETW(acdp->bcdADC);
sc 1825 dev/usb/uaudio.c sc->sc_audio_rev, aclen));
sc 1827 dev/usb/uaudio.c sc->sc_nullalt = -1;
sc 1951 dev/usb/uaudio.c uaudio_add_input(sc, iot, i);
sc 1954 dev/usb/uaudio.c uaudio_add_output(sc, iot, i);
sc 1957 dev/usb/uaudio.c uaudio_add_mixer(sc, iot, i);
sc 1960 dev/usb/uaudio.c uaudio_add_selector(sc, iot, i);
sc 1963 dev/usb/uaudio.c uaudio_add_feature(sc, iot, i);
sc 1966 dev/usb/uaudio.c uaudio_add_processing(sc, iot, i);
sc 1969 dev/usb/uaudio.c uaudio_add_extension(sc, iot, i);
sc 2001 dev/usb/uaudio.c struct uaudio_softc *sc = addr;
sc 2006 dev/usb/uaudio.c if (sc->sc_dying)
sc 2010 dev/usb/uaudio.c nctls = sc->sc_nctls;
sc 2046 dev/usb/uaudio.c mc = &sc->sc_ctls[n];
sc 2085 dev/usb/uaudio.c struct uaudio_softc *sc = addr;
sc 2087 dev/usb/uaudio.c DPRINTF(("uaudio_open: sc=%p\n", sc));
sc 2088 dev/usb/uaudio.c if (sc->sc_dying)
sc 2091 dev/usb/uaudio.c if ((flags & FWRITE) && !(sc->sc_mode & AUMODE_PLAY))
sc 2093 dev/usb/uaudio.c if ((flags & FREAD) && !(sc->sc_mode & AUMODE_RECORD))
sc 2105 dev/usb/uaudio.c struct uaudio_softc *sc = addr;
sc 2107 dev/usb/uaudio.c if (sc->sc_playchan.altidx != -1)
sc 2108 dev/usb/uaudio.c uaudio_chan_close(sc, &sc->sc_playchan);
sc 2109 dev/usb/uaudio.c if (sc->sc_recchan.altidx != -1)
sc 2110 dev/usb/uaudio.c uaudio_chan_close(sc, &sc->sc_recchan);
sc 2116 dev/usb/uaudio.c struct uaudio_softc *sc = addr;
sc 2118 dev/usb/uaudio.c usbd_delay_ms(sc->sc_udev, UAUDIO_NCHANBUFS * UAUDIO_NFRAMES);
sc 2126 dev/usb/uaudio.c struct uaudio_softc *sc = addr;
sc 2129 dev/usb/uaudio.c if (sc->sc_playchan.pipe != NULL) {
sc 2130 dev/usb/uaudio.c uaudio_chan_close(sc, &sc->sc_playchan);
sc 2131 dev/usb/uaudio.c sc->sc_playchan.pipe = NULL;
sc 2132 dev/usb/uaudio.c uaudio_chan_free_buffers(sc, &sc->sc_playchan);
sc 2133 dev/usb/uaudio.c sc->sc_playchan.intr = NULL;
sc 2141 dev/usb/uaudio.c struct uaudio_softc *sc = addr;
sc 2144 dev/usb/uaudio.c if (sc->sc_recchan.pipe != NULL) {
sc 2145 dev/usb/uaudio.c uaudio_chan_close(sc, &sc->sc_recchan);
sc 2146 dev/usb/uaudio.c sc->sc_recchan.pipe = NULL;
sc 2147 dev/usb/uaudio.c uaudio_chan_free_buffers(sc, &sc->sc_recchan);
sc 2148 dev/usb/uaudio.c sc->sc_recchan.intr = NULL;
sc 2156 dev/usb/uaudio.c struct uaudio_softc *sc = addr;
sc 2159 dev/usb/uaudio.c if (sc->sc_dying)
sc 2172 dev/usb/uaudio.c struct uaudio_softc *sc = addr;
sc 2176 dev/usb/uaudio.c sc->sc_playchan.bytes_per_frame,
sc 2177 dev/usb/uaudio.c sc->sc_recchan.bytes_per_frame));
sc 2178 dev/usb/uaudio.c if (sc->sc_playchan.bytes_per_frame > sc->sc_recchan.bytes_per_frame) {
sc 2179 dev/usb/uaudio.c bpf = sc->sc_playchan.bytes_per_frame
sc 2180 dev/usb/uaudio.c + sc->sc_playchan.sample_size;
sc 2182 dev/usb/uaudio.c bpf = sc->sc_recchan.bytes_per_frame
sc 2183 dev/usb/uaudio.c + sc->sc_recchan.sample_size;
sc 2212 dev/usb/uaudio.c uaudio_get(struct uaudio_softc *sc, int which, int type, int wValue,
sc 2231 dev/usb/uaudio.c err = usbd_do_request(sc->sc_udev, &req, data);
sc 2252 dev/usb/uaudio.c uaudio_set(struct uaudio_softc *sc, int which, int type, int wValue,
sc 2281 dev/usb/uaudio.c err = usbd_do_request(sc->sc_udev, &req, data);
sc 2334 dev/usb/uaudio.c uaudio_ctl_get(struct uaudio_softc *sc, int which, struct mixerctl *mc,
sc 2340 dev/usb/uaudio.c val = uaudio_get(sc, which, UT_READ_CLASS_INTERFACE, mc->wValue[chan],
sc 2346 dev/usb/uaudio.c uaudio_ctl_set(struct uaudio_softc *sc, int which, struct mixerctl *mc,
sc 2350 dev/usb/uaudio.c uaudio_set(sc, which, UT_WRITE_CLASS_INTERFACE, mc->wValue[chan],
sc 2357 dev/usb/uaudio.c struct uaudio_softc *sc = addr;
sc 2363 dev/usb/uaudio.c if (sc->sc_dying)
sc 2367 dev/usb/uaudio.c if (n < 0 || n >= sc->sc_nctls)
sc 2369 dev/usb/uaudio.c mc = &sc->sc_ctls[n];
sc 2374 dev/usb/uaudio.c cp->un.ord = uaudio_ctl_get(sc, GET_CUR, mc, 0);
sc 2378 dev/usb/uaudio.c cp->un.ord = uaudio_ctl_get(sc, GET_CUR, mc, 0);
sc 2386 dev/usb/uaudio.c vals[i] = uaudio_ctl_get(sc, GET_CUR, mc, i);
sc 2402 dev/usb/uaudio.c struct uaudio_softc *sc = addr;
sc 2407 dev/usb/uaudio.c if (sc->sc_dying)
sc 2411 dev/usb/uaudio.c if (n < 0 || n >= sc->sc_nctls)
sc 2413 dev/usb/uaudio.c mc = &sc->sc_ctls[n];
sc 2418 dev/usb/uaudio.c uaudio_ctl_set(sc, SET_CUR, mc, 0, cp->un.ord);
sc 2422 dev/usb/uaudio.c uaudio_ctl_set(sc, SET_CUR, mc, 0, cp->un.ord);
sc 2435 dev/usb/uaudio.c uaudio_ctl_set(sc, SET_CUR, mc, i, vals[i]);
sc 2445 dev/usb/uaudio.c struct uaudio_softc *sc = addr;
sc 2446 dev/usb/uaudio.c struct chan *ch = &sc->sc_recchan;
sc 2450 dev/usb/uaudio.c if (sc->sc_dying)
sc 2454 dev/usb/uaudio.c "blksize=%d\n", sc, start, end, blksize));
sc 2461 dev/usb/uaudio.c err = uaudio_chan_alloc_buffers(sc, ch);
sc 2465 dev/usb/uaudio.c err = uaudio_chan_open(sc, ch);
sc 2467 dev/usb/uaudio.c uaudio_chan_free_buffers(sc, ch);
sc 2487 dev/usb/uaudio.c struct uaudio_softc *sc = addr;
sc 2488 dev/usb/uaudio.c struct chan *ch = &sc->sc_playchan;
sc 2492 dev/usb/uaudio.c if (sc->sc_dying)
sc 2496 dev/usb/uaudio.c "blksize=%d\n", sc, start, end, blksize));
sc 2503 dev/usb/uaudio.c err = uaudio_chan_alloc_buffers(sc, ch);
sc 2507 dev/usb/uaudio.c err = uaudio_chan_open(sc, ch);
sc 2509 dev/usb/uaudio.c uaudio_chan_free_buffers(sc, ch);
sc 2526 dev/usb/uaudio.c uaudio_chan_open(struct uaudio_softc *sc, struct chan *ch)
sc 2528 dev/usb/uaudio.c struct as_info *as = &sc->sc_alts[ch->altidx];
sc 2546 dev/usb/uaudio.c err = uaudio_set_speed(sc, endpt, ch->sample_rate);
sc 2567 dev/usb/uaudio.c uaudio_chan_close(struct uaudio_softc *sc, struct chan *ch)
sc 2569 dev/usb/uaudio.c struct as_info *as = &sc->sc_alts[ch->altidx];
sc 2572 dev/usb/uaudio.c if (sc->sc_nullalt >= 0) {
sc 2574 dev/usb/uaudio.c sc->sc_nullalt));
sc 2575 dev/usb/uaudio.c usbd_set_interface(as->ifaceh, sc->sc_nullalt);
sc 2588 dev/usb/uaudio.c uaudio_chan_alloc_buffers(struct uaudio_softc *sc, struct chan *ch)
sc 2596 dev/usb/uaudio.c xfer = usbd_alloc_xfer(sc->sc_udev);
sc 2619 dev/usb/uaudio.c uaudio_chan_free_buffers(struct uaudio_softc *sc, struct chan *ch)
sc 2634 dev/usb/uaudio.c if (ch->sc->sc_dying)
sc 2649 dev/usb/uaudio.c if ((ch->sc->sc_altflags & UA_NOFRAC) == 0)
sc 2738 dev/usb/uaudio.c if (ch->sc->sc_dying)
sc 3021 dev/usb/uaudio.c struct uaudio_softc *sc = addr;
sc 3022 dev/usb/uaudio.c int flags = sc->sc_altflags;
sc 3030 dev/usb/uaudio.c if (sc->sc_dying)
sc 3033 dev/usb/uaudio.c if (((usemode & AUMODE_PLAY) && sc->sc_playchan.pipe != NULL) ||
sc 3034 dev/usb/uaudio.c ((usemode & AUMODE_RECORD) && sc->sc_recchan.pipe != NULL))
sc 3037 dev/usb/uaudio.c if ((usemode & AUMODE_PLAY) && sc->sc_playchan.altidx != -1)
sc 3038 dev/usb/uaudio.c sc->sc_alts[sc->sc_playchan.altidx].sc_busy = 0;
sc 3039 dev/usb/uaudio.c if ((usemode & AUMODE_RECORD) && sc->sc_recchan.altidx != -1)
sc 3040 dev/usb/uaudio.c sc->sc_alts[sc->sc_recchan.altidx].sc_busy = 0;
sc 3044 dev/usb/uaudio.c setmode &= sc->sc_mode;
sc 3166 dev/usb/uaudio.c i = uaudio_match_alt(sc->sc_nalts, sc->sc_alts, p, mode);
sc 3181 dev/usb/uaudio.c uaudio_chan_init(&sc->sc_playchan, paltidx, play, 0);
sc 3185 dev/usb/uaudio.c uaudio_chan_init(&sc->sc_recchan, raltidx, rec,
sc 3186 dev/usb/uaudio.c UGETW(sc->sc_alts[raltidx].edesc->wMaxPacketSize));
sc 3189 dev/usb/uaudio.c if ((usemode & AUMODE_PLAY) && sc->sc_playchan.altidx != -1)
sc 3190 dev/usb/uaudio.c sc->sc_alts[sc->sc_playchan.altidx].sc_busy = 1;
sc 3191 dev/usb/uaudio.c if ((usemode & AUMODE_RECORD) && sc->sc_recchan.altidx != -1)
sc 3192 dev/usb/uaudio.c sc->sc_alts[sc->sc_recchan.altidx].sc_busy = 1;
sc 3195 dev/usb/uaudio.c sc->sc_playchan.altidx, sc->sc_recchan.altidx,
sc 3196 dev/usb/uaudio.c (sc->sc_playchan.altidx >= 0)
sc 3197 dev/usb/uaudio.c ?sc->sc_alts[sc->sc_playchan.altidx].idesc->bAlternateSetting
sc 3199 dev/usb/uaudio.c (sc->sc_recchan.altidx >= 0)
sc 3200 dev/usb/uaudio.c ? sc->sc_alts[sc->sc_recchan.altidx].idesc->bAlternateSetting
sc 3207 dev/usb/uaudio.c uaudio_set_speed(struct uaudio_softc *sc, int endpt, u_int speed)
sc 3222 dev/usb/uaudio.c return (usbd_do_request(sc->sc_udev, &req, data));
sc 84 dev/usb/uberry.c struct uberry_softc *sc = (struct uberry_softc *)self;
sc 88 dev/usb/uberry.c sc->sc_udev = uaa->device;
sc 91 dev/usb/uberry.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 95 dev/usb/uberry.c if (usbd_set_config_no(sc->sc_udev, UBERRY_CONFIG_NO, 1) != 0) {
sc 97 dev/usb/uberry.c sc->sc_dev.dv_xname);
sc 100 dev/usb/uberry.c printf("%s: Charging enabled\n", sc->sc_dev.dv_xname);
sc 102 dev/usb/uberry.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 103 dev/usb/uberry.c &sc->sc_dev);
sc 109 dev/usb/uberry.c struct uberry_softc *sc = (struct uberry_softc *)self;
sc 111 dev/usb/uberry.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 112 dev/usb/uberry.c &sc->sc_dev);
sc 191 dev/usb/ubsa.c void ubsa_break(struct ubsa_softc *sc, int onoff);
sc 272 dev/usb/ubsa.c struct ubsa_softc *sc = (struct ubsa_softc *)self;
sc 279 dev/usb/ubsa.c const char *devname = sc->sc_dev.dv_xname;
sc 288 dev/usb/ubsa.c sc->sc_udev = dev;
sc 294 dev/usb/ubsa.c sc->sc_dtr = -1;
sc 295 dev/usb/ubsa.c sc->sc_rts = -1;
sc 297 dev/usb/ubsa.c DPRINTF(("ubsa attach: sc = %p\n", sc));
sc 301 dev/usb/ubsa.c sc->sc_intr_number = -1;
sc 302 dev/usb/ubsa.c sc->sc_intr_pipe = NULL;
sc 309 dev/usb/ubsa.c sc->sc_dying = 1;
sc 314 dev/usb/ubsa.c cdesc = usbd_get_config_descriptor(sc->sc_udev);
sc 319 dev/usb/ubsa.c sc->sc_dying = 1;
sc 325 dev/usb/ubsa.c &sc->sc_iface);
sc 329 dev/usb/ubsa.c sc->sc_dying = 1;
sc 335 dev/usb/ubsa.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 336 dev/usb/ubsa.c sc->sc_iface_number = id->bInterfaceNumber;
sc 339 dev/usb/ubsa.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 342 dev/usb/ubsa.c sc->sc_dev.dv_xname, i);
sc 343 dev/usb/ubsa.c sc->sc_dying = 1;
sc 349 dev/usb/ubsa.c sc->sc_intr_number = ed->bEndpointAddress;
sc 350 dev/usb/ubsa.c sc->sc_isize = UGETW(ed->wMaxPacketSize);
sc 362 dev/usb/ubsa.c if (sc->sc_intr_number == -1) {
sc 364 dev/usb/ubsa.c sc->sc_dying = 1;
sc 370 dev/usb/ubsa.c sc->sc_dying = 1;
sc 376 dev/usb/ubsa.c sc->sc_dying = 1;
sc 385 dev/usb/ubsa.c uca.iface = sc->sc_iface;
sc 387 dev/usb/ubsa.c uca.arg = sc;
sc 390 dev/usb/ubsa.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 391 dev/usb/ubsa.c &sc->sc_dev);
sc 394 dev/usb/ubsa.c uca.bulkin, uca.bulkout, sc->sc_intr_number));
sc 396 dev/usb/ubsa.c sc->sc_subdev = config_found_sm(self, &uca, ucomprint, ucomsubmatch);
sc 405 dev/usb/ubsa.c struct ubsa_softc *sc = (struct ubsa_softc *)self;
sc 409 dev/usb/ubsa.c DPRINTF(("ubsa_detach: sc = %p\n", sc));
sc 411 dev/usb/ubsa.c if (sc->sc_intr_pipe != NULL) {
sc 412 dev/usb/ubsa.c usbd_abort_pipe(sc->sc_intr_pipe);
sc 413 dev/usb/ubsa.c usbd_close_pipe(sc->sc_intr_pipe);
sc 414 dev/usb/ubsa.c free(sc->sc_intr_buf, M_USBDEV);
sc 415 dev/usb/ubsa.c sc->sc_intr_pipe = NULL;
sc 418 dev/usb/ubsa.c sc->sc_dying = 1;
sc 419 dev/usb/ubsa.c if (sc->sc_subdev != NULL) {
sc 420 dev/usb/ubsa.c rv = config_detach(sc->sc_subdev, flags);
sc 421 dev/usb/ubsa.c sc->sc_subdev = NULL;
sc 424 dev/usb/ubsa.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 425 dev/usb/ubsa.c &sc->sc_dev);
sc 433 dev/usb/ubsa.c struct ubsa_softc *sc = (struct ubsa_softc *)self;
sc 441 dev/usb/ubsa.c if (sc->sc_subdev != NULL)
sc 442 dev/usb/ubsa.c rv = config_deactivate(sc->sc_subdev);
sc 443 dev/usb/ubsa.c sc->sc_dying = 1;
sc 450 dev/usb/ubsa.c ubsa_request(struct ubsa_softc *sc, u_int8_t request, u_int16_t value)
sc 458 dev/usb/ubsa.c USETW(req.wIndex, sc->sc_iface_number);
sc 461 dev/usb/ubsa.c err = usbd_do_request(sc->sc_udev, &req, 0);
sc 464 dev/usb/ubsa.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 469 dev/usb/ubsa.c ubsa_dtr(struct ubsa_softc *sc, int onoff)
sc 474 dev/usb/ubsa.c if (sc->sc_dtr == onoff)
sc 476 dev/usb/ubsa.c sc->sc_dtr = onoff;
sc 478 dev/usb/ubsa.c ubsa_request(sc, UBSA_SET_DTR, onoff ? 1 : 0);
sc 482 dev/usb/ubsa.c ubsa_rts(struct ubsa_softc *sc, int onoff)
sc 487 dev/usb/ubsa.c if (sc->sc_rts == onoff)
sc 489 dev/usb/ubsa.c sc->sc_rts = onoff;
sc 491 dev/usb/ubsa.c ubsa_request(sc, UBSA_SET_RTS, onoff ? 1 : 0);
sc 495 dev/usb/ubsa.c ubsa_break(struct ubsa_softc *sc, int onoff)
sc 500 dev/usb/ubsa.c ubsa_request(sc, UBSA_SET_BREAK, onoff ? 1 : 0);
sc 506 dev/usb/ubsa.c struct ubsa_softc *sc;
sc 508 dev/usb/ubsa.c sc = addr;
sc 511 dev/usb/ubsa.c ubsa_dtr(sc, onoff);
sc 514 dev/usb/ubsa.c ubsa_rts(sc, onoff);
sc 517 dev/usb/ubsa.c ubsa_break(sc, onoff);
sc 525 dev/usb/ubsa.c ubsa_baudrate(struct ubsa_softc *sc, speed_t speed)
sc 550 dev/usb/ubsa.c sc->sc_dev.dv_xname));
sc 556 dev/usb/ubsa.c ubsa_flow(sc, 0, 0);
sc 557 dev/usb/ubsa.c ubsa_dtr(sc, 0);
sc 558 dev/usb/ubsa.c ubsa_rts(sc, 0);
sc 560 dev/usb/ubsa.c ubsa_request(sc, UBSA_SET_BAUDRATE, value);
sc 564 dev/usb/ubsa.c ubsa_parity(struct ubsa_softc *sc, tcflag_t cflag)
sc 575 dev/usb/ubsa.c ubsa_request(sc, UBSA_SET_PARITY, value);
sc 579 dev/usb/ubsa.c ubsa_databits(struct ubsa_softc *sc, tcflag_t cflag)
sc 593 dev/usb/ubsa.c sc->sc_dev.dv_xname));
sc 597 dev/usb/ubsa.c ubsa_request(sc, UBSA_SET_DATA_BITS, value);
sc 601 dev/usb/ubsa.c ubsa_stopbits(struct ubsa_softc *sc, tcflag_t cflag)
sc 609 dev/usb/ubsa.c ubsa_request(sc, UBSA_SET_STOP_BITS, value);
sc 613 dev/usb/ubsa.c ubsa_flow(struct ubsa_softc *sc, tcflag_t cflag, tcflag_t iflag)
sc 625 dev/usb/ubsa.c ubsa_request(sc, UBSA_SET_FLOW_CTRL, value);
sc 631 dev/usb/ubsa.c struct ubsa_softc *sc = addr;
sc 633 dev/usb/ubsa.c DPRINTF(("ubsa_param: sc = %p\n", sc));
sc 635 dev/usb/ubsa.c ubsa_baudrate(sc, ti->c_ospeed);
sc 636 dev/usb/ubsa.c ubsa_parity(sc, ti->c_cflag);
sc 637 dev/usb/ubsa.c ubsa_databits(sc, ti->c_cflag);
sc 638 dev/usb/ubsa.c ubsa_stopbits(sc, ti->c_cflag);
sc 639 dev/usb/ubsa.c ubsa_flow(sc, ti->c_cflag, ti->c_iflag);
sc 647 dev/usb/ubsa.c struct ubsa_softc *sc = addr;
sc 650 dev/usb/ubsa.c if (sc->sc_dying)
sc 653 dev/usb/ubsa.c DPRINTF(("ubsa_open: sc = %p\n", sc));
sc 655 dev/usb/ubsa.c if (sc->sc_intr_number != -1 && sc->sc_intr_pipe == NULL) {
sc 656 dev/usb/ubsa.c sc->sc_intr_buf = malloc(sc->sc_isize, M_USBDEV, M_WAITOK);
sc 657 dev/usb/ubsa.c err = usbd_open_pipe_intr(sc->sc_iface,
sc 658 dev/usb/ubsa.c sc->sc_intr_number,
sc 660 dev/usb/ubsa.c &sc->sc_intr_pipe,
sc 661 dev/usb/ubsa.c sc,
sc 662 dev/usb/ubsa.c sc->sc_intr_buf,
sc 663 dev/usb/ubsa.c sc->sc_isize,
sc 668 dev/usb/ubsa.c sc->sc_dev.dv_xname,
sc 669 dev/usb/ubsa.c sc->sc_intr_number);
sc 680 dev/usb/ubsa.c struct ubsa_softc *sc = addr;
sc 683 dev/usb/ubsa.c if (sc->sc_dying)
sc 688 dev/usb/ubsa.c if (sc->sc_intr_pipe != NULL) {
sc 689 dev/usb/ubsa.c err = usbd_abort_pipe(sc->sc_intr_pipe);
sc 692 dev/usb/ubsa.c sc->sc_dev.dv_xname,
sc 694 dev/usb/ubsa.c err = usbd_close_pipe(sc->sc_intr_pipe);
sc 697 dev/usb/ubsa.c sc->sc_dev.dv_xname,
sc 699 dev/usb/ubsa.c free(sc->sc_intr_buf, M_USBDEV);
sc 700 dev/usb/ubsa.c sc->sc_intr_pipe = NULL;
sc 707 dev/usb/ubsa.c struct ubsa_softc *sc = priv;
sc 710 dev/usb/ubsa.c buf = sc->sc_intr_buf;
sc 711 dev/usb/ubsa.c if (sc->sc_dying)
sc 719 dev/usb/ubsa.c sc->sc_dev.dv_xname, usbd_errstr(status)));
sc 720 dev/usb/ubsa.c usbd_clear_endpoint_stall_async(sc->sc_intr_pipe);
sc 725 dev/usb/ubsa.c sc->sc_lsr = buf[2];
sc 726 dev/usb/ubsa.c sc->sc_msr = buf[3];
sc 729 dev/usb/ubsa.c sc->sc_dev.dv_xname, sc->sc_lsr, sc->sc_msr));
sc 731 dev/usb/ubsa.c ucom_status_change((struct ucom_softc *)sc->sc_subdev);
sc 737 dev/usb/ubsa.c struct ubsa_softc *sc = addr;
sc 742 dev/usb/ubsa.c *lsr = sc->sc_lsr;
sc 744 dev/usb/ubsa.c *msr = sc->sc_msr;
sc 306 dev/usb/ubt.c struct ubt_softc *sc = (struct ubt_softc *)self;
sc 314 dev/usb/ubt.c DPRINTFN(50, "ubt_attach: sc=%p\n", sc);
sc 316 dev/usb/ubt.c sc->sc_udev = uaa->device;
sc 318 dev/usb/ubt.c devinfop = usbd_devinfo_alloc(sc->sc_udev, 0);
sc 319 dev/usb/ubt.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 325 dev/usb/ubt.c err = usbd_set_config_index(sc->sc_udev, 0, 1);
sc 328 dev/usb/ubt.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 339 dev/usb/ubt.c err = usbd_device2interface_handle(sc->sc_udev, 0, &sc->sc_iface0);
sc 342 dev/usb/ubt.c sc->sc_dev.dv_xname, usbd_errstr(err), err);
sc 347 dev/usb/ubt.c sc->sc_evt_addr = -1;
sc 348 dev/usb/ubt.c sc->sc_aclrd_addr = -1;
sc 349 dev/usb/ubt.c sc->sc_aclwr_addr = -1;
sc 352 dev/usb/ubt.c (void)usbd_endpoint_count(sc->sc_iface0, &count);
sc 357 dev/usb/ubt.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface0, i);
sc 360 dev/usb/ubt.c sc->sc_dev.dv_xname, i);
sc 369 dev/usb/ubt.c sc->sc_evt_addr = ed->bEndpointAddress;
sc 371 dev/usb/ubt.c sc->sc_aclrd_addr = ed->bEndpointAddress;
sc 373 dev/usb/ubt.c sc->sc_aclwr_addr = ed->bEndpointAddress;
sc 376 dev/usb/ubt.c if (sc->sc_evt_addr == -1) {
sc 378 dev/usb/ubt.c sc->sc_dev.dv_xname);
sc 382 dev/usb/ubt.c if (sc->sc_aclrd_addr == -1) {
sc 384 dev/usb/ubt.c sc->sc_dev.dv_xname);
sc 388 dev/usb/ubt.c if (sc->sc_aclwr_addr == -1) {
sc 390 dev/usb/ubt.c sc->sc_dev.dv_xname);
sc 404 dev/usb/ubt.c err = usbd_device2interface_handle(sc->sc_udev, 1, &sc->sc_iface1);
sc 407 dev/usb/ubt.c sc->sc_dev.dv_xname, usbd_errstr(err), err);
sc 412 dev/usb/ubt.c cd = usbd_get_config_descriptor(sc->sc_udev);
sc 415 dev/usb/ubt.c sc->sc_dev.dv_xname);
sc 420 dev/usb/ubt.c sc->sc_alt_config = usbd_get_no_alts(cd, 1);
sc 423 dev/usb/ubt.c err = ubt_set_isoc_config(sc);
sc 426 dev/usb/ubt.c sc->sc_dev.dv_xname);
sc 432 dev/usb/ubt.c sc->sc_unit.hci_softc = self;
sc 433 dev/usb/ubt.c sc->sc_unit.hci_devname = sc->sc_dev.dv_xname;
sc 434 dev/usb/ubt.c sc->sc_unit.hci_enable = ubt_enable;
sc 435 dev/usb/ubt.c sc->sc_unit.hci_disable = ubt_disable;
sc 436 dev/usb/ubt.c sc->sc_unit.hci_start_cmd = ubt_xmit_cmd_start;
sc 437 dev/usb/ubt.c sc->sc_unit.hci_start_acl = ubt_xmit_acl_start;
sc 438 dev/usb/ubt.c sc->sc_unit.hci_start_sco = ubt_xmit_sco_start;
sc 439 dev/usb/ubt.c sc->sc_unit.hci_ipl = IPL_USB; /* XXX: IPL_SOFTUSB ?? */
sc 440 dev/usb/ubt.c hci_attach(&sc->sc_unit);
sc 442 dev/usb/ubt.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 443 dev/usb/ubt.c &sc->sc_dev);
sc 445 dev/usb/ubt.c sc->sc_ok = 1;
sc 453 dev/usb/ubt.c struct ubt_softc *sc = (struct ubt_softc *)self;
sc 456 dev/usb/ubt.c DPRINTF("sc=%p flags=%d\n", sc, flags);
sc 458 dev/usb/ubt.c sc->sc_dying = 1;
sc 460 dev/usb/ubt.c if (!sc->sc_ok)
sc 464 dev/usb/ubt.c hci_detach(&sc->sc_unit);
sc 473 dev/usb/ubt.c ubt_abortdealloc(sc);
sc 477 dev/usb/ubt.c if (sc->sc_refcnt-- > 0)
sc 478 dev/usb/ubt.c usb_detach_wait(&sc->sc_dev);
sc 482 dev/usb/ubt.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 483 dev/usb/ubt.c &sc->sc_dev);
sc 493 dev/usb/ubt.c struct ubt_softc *sc = (struct ubt_softc *)self;
sc 496 dev/usb/ubt.c DPRINTFN(1, "ubt_activate: sc=%p, act=%d\n", sc, act);
sc 504 dev/usb/ubt.c sc->sc_dying = 1;
sc 512 dev/usb/ubt.c ubt_set_isoc_config(struct ubt_softc *sc)
sc 519 dev/usb/ubt.c err = usbd_set_interface(sc->sc_iface1, sc->sc_config);
sc 523 dev/usb/ubt.c sc->sc_dev.dv_xname, sc->sc_config, usbd_errstr(err), err);
sc 535 dev/usb/ubt.c sc->sc_scord_size = rd_size = 0;
sc 536 dev/usb/ubt.c sc->sc_scord_addr = rd_addr = -1;
sc 538 dev/usb/ubt.c sc->sc_scowr_size = wr_size = 0;
sc 539 dev/usb/ubt.c sc->sc_scowr_addr = wr_addr = -1;
sc 542 dev/usb/ubt.c (void)usbd_endpoint_count(sc->sc_iface1, &count);
sc 545 dev/usb/ubt.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface1, i);
sc 548 dev/usb/ubt.c sc->sc_dev.dv_xname, i);
sc 554 dev/usb/ubt.c sc->sc_dev.dv_xname,
sc 575 dev/usb/ubt.c sc->sc_dev.dv_xname, sc->sc_config);
sc 582 dev/usb/ubt.c sc->sc_dev.dv_xname, sc->sc_config);
sc 590 dev/usb/ubt.c sc->sc_dev.dv_xname, rd_size);
sc 597 dev/usb/ubt.c sc->sc_dev.dv_xname, wr_size);
sc 603 dev/usb/ubt.c sc->sc_scord_size = rd_size;
sc 604 dev/usb/ubt.c sc->sc_scord_addr = rd_addr;
sc 606 dev/usb/ubt.c sc->sc_scowr_size = wr_size;
sc 607 dev/usb/ubt.c sc->sc_scowr_addr = wr_addr;
sc 613 dev/usb/ubt.c ubt_abortdealloc(struct ubt_softc *sc)
sc 617 dev/usb/ubt.c DPRINTFN(1, "sc=%p\n", sc);
sc 620 dev/usb/ubt.c if (sc->sc_evt_pipe != NULL) {
sc 621 dev/usb/ubt.c usbd_abort_pipe(sc->sc_evt_pipe);
sc 622 dev/usb/ubt.c usbd_close_pipe(sc->sc_evt_pipe);
sc 623 dev/usb/ubt.c sc->sc_evt_pipe = NULL;
sc 626 dev/usb/ubt.c if (sc->sc_aclrd_pipe != NULL) {
sc 627 dev/usb/ubt.c usbd_abort_pipe(sc->sc_aclrd_pipe);
sc 628 dev/usb/ubt.c usbd_close_pipe(sc->sc_aclrd_pipe);
sc 629 dev/usb/ubt.c sc->sc_aclrd_pipe = NULL;
sc 632 dev/usb/ubt.c if (sc->sc_aclwr_pipe != NULL) {
sc 633 dev/usb/ubt.c usbd_abort_pipe(sc->sc_aclwr_pipe);
sc 634 dev/usb/ubt.c usbd_close_pipe(sc->sc_aclwr_pipe);
sc 635 dev/usb/ubt.c sc->sc_aclwr_pipe = NULL;
sc 638 dev/usb/ubt.c if (sc->sc_scord_pipe != NULL) {
sc 639 dev/usb/ubt.c usbd_abort_pipe(sc->sc_scord_pipe);
sc 640 dev/usb/ubt.c usbd_close_pipe(sc->sc_scord_pipe);
sc 641 dev/usb/ubt.c sc->sc_scord_pipe = NULL;
sc 644 dev/usb/ubt.c if (sc->sc_scowr_pipe != NULL) {
sc 645 dev/usb/ubt.c usbd_abort_pipe(sc->sc_scowr_pipe);
sc 646 dev/usb/ubt.c usbd_close_pipe(sc->sc_scowr_pipe);
sc 647 dev/usb/ubt.c sc->sc_scowr_pipe = NULL;
sc 651 dev/usb/ubt.c if (sc->sc_evt_buf != NULL) {
sc 652 dev/usb/ubt.c free(sc->sc_evt_buf, M_USBDEV);
sc 653 dev/usb/ubt.c sc->sc_evt_buf = NULL;
sc 657 dev/usb/ubt.c if (sc->sc_cmd_xfer != NULL) {
sc 658 dev/usb/ubt.c usbd_free_xfer(sc->sc_cmd_xfer);
sc 659 dev/usb/ubt.c sc->sc_cmd_xfer = NULL;
sc 660 dev/usb/ubt.c sc->sc_cmd_buf = NULL;
sc 663 dev/usb/ubt.c if (sc->sc_aclrd_xfer != NULL) {
sc 664 dev/usb/ubt.c usbd_free_xfer(sc->sc_aclrd_xfer);
sc 665 dev/usb/ubt.c sc->sc_aclrd_xfer = NULL;
sc 666 dev/usb/ubt.c sc->sc_aclrd_buf = NULL;
sc 669 dev/usb/ubt.c if (sc->sc_aclwr_xfer != NULL) {
sc 670 dev/usb/ubt.c usbd_free_xfer(sc->sc_aclwr_xfer);
sc 671 dev/usb/ubt.c sc->sc_aclwr_xfer = NULL;
sc 672 dev/usb/ubt.c sc->sc_aclwr_buf = NULL;
sc 676 dev/usb/ubt.c if (sc->sc_scord[i].xfer != NULL) {
sc 677 dev/usb/ubt.c usbd_free_xfer(sc->sc_scord[i].xfer);
sc 678 dev/usb/ubt.c sc->sc_scord[i].xfer = NULL;
sc 679 dev/usb/ubt.c sc->sc_scord[i].buf = NULL;
sc 682 dev/usb/ubt.c if (sc->sc_scowr[i].xfer != NULL) {
sc 683 dev/usb/ubt.c usbd_free_xfer(sc->sc_scowr[i].xfer);
sc 684 dev/usb/ubt.c sc->sc_scowr[i].xfer = NULL;
sc 685 dev/usb/ubt.c sc->sc_scowr[i].buf = NULL;
sc 690 dev/usb/ubt.c if (sc->sc_scord_mbuf != NULL) {
sc 691 dev/usb/ubt.c m_freem(sc->sc_scord_mbuf);
sc 692 dev/usb/ubt.c sc->sc_scord_mbuf = NULL;
sc 695 dev/usb/ubt.c if (sc->sc_scowr_mbuf != NULL) {
sc 696 dev/usb/ubt.c m_freem(sc->sc_scowr_mbuf);
sc 697 dev/usb/ubt.c sc->sc_scowr_mbuf = NULL;
sc 710 dev/usb/ubt.c struct ubt_softc *sc = (struct ubt_softc *)unit->hci_softc;
sc 714 dev/usb/ubt.c DPRINTFN(1, "sc=%p\n", sc);
sc 720 dev/usb/ubt.c sc->sc_evt_buf = malloc(UBT_BUFSIZ_EVENT, M_USBDEV, M_NOWAIT);
sc 721 dev/usb/ubt.c if (sc->sc_evt_buf == NULL) {
sc 725 dev/usb/ubt.c err = usbd_open_pipe_intr(sc->sc_iface0,
sc 726 dev/usb/ubt.c sc->sc_evt_addr,
sc 728 dev/usb/ubt.c &sc->sc_evt_pipe,
sc 729 dev/usb/ubt.c sc,
sc 730 dev/usb/ubt.c sc->sc_evt_buf,
sc 740 dev/usb/ubt.c sc->sc_cmd_xfer = usbd_alloc_xfer(sc->sc_udev);
sc 741 dev/usb/ubt.c if (sc->sc_cmd_xfer == NULL) {
sc 745 dev/usb/ubt.c sc->sc_cmd_buf = usbd_alloc_buffer(sc->sc_cmd_xfer, UBT_BUFSIZ_CMD);
sc 746 dev/usb/ubt.c if (sc->sc_cmd_buf == NULL) {
sc 752 dev/usb/ubt.c err = usbd_open_pipe(sc->sc_iface0, sc->sc_aclrd_addr,
sc 753 dev/usb/ubt.c USBD_EXCLUSIVE_USE, &sc->sc_aclrd_pipe);
sc 758 dev/usb/ubt.c sc->sc_aclrd_xfer = usbd_alloc_xfer(sc->sc_udev);
sc 759 dev/usb/ubt.c if (sc->sc_aclrd_xfer == NULL) {
sc 763 dev/usb/ubt.c sc->sc_aclrd_buf = usbd_alloc_buffer(sc->sc_aclrd_xfer, UBT_BUFSIZ_ACL);
sc 764 dev/usb/ubt.c if (sc->sc_aclrd_buf == NULL) {
sc 768 dev/usb/ubt.c sc->sc_aclrd_busy = 0;
sc 769 dev/usb/ubt.c ubt_recv_acl_start(sc);
sc 772 dev/usb/ubt.c err = usbd_open_pipe(sc->sc_iface0, sc->sc_aclwr_addr,
sc 773 dev/usb/ubt.c USBD_EXCLUSIVE_USE, &sc->sc_aclwr_pipe);
sc 778 dev/usb/ubt.c sc->sc_aclwr_xfer = usbd_alloc_xfer(sc->sc_udev);
sc 779 dev/usb/ubt.c if (sc->sc_aclwr_xfer == NULL) {
sc 783 dev/usb/ubt.c sc->sc_aclwr_buf = usbd_alloc_buffer(sc->sc_aclwr_xfer, UBT_BUFSIZ_ACL);
sc 784 dev/usb/ubt.c if (sc->sc_aclwr_buf == NULL) {
sc 790 dev/usb/ubt.c if (sc->sc_scord_size > 0) {
sc 791 dev/usb/ubt.c err = usbd_open_pipe(sc->sc_iface1, sc->sc_scord_addr,
sc 792 dev/usb/ubt.c USBD_EXCLUSIVE_USE, &sc->sc_scord_pipe);
sc 799 dev/usb/ubt.c sc->sc_scord[i].xfer = usbd_alloc_xfer(sc->sc_udev);
sc 800 dev/usb/ubt.c if (sc->sc_scord[i].xfer == NULL) {
sc 804 dev/usb/ubt.c sc->sc_scord[i].buf = usbd_alloc_buffer(sc->sc_scord[i].xfer,
sc 805 dev/usb/ubt.c sc->sc_scord_size * UBT_NFRAMES);
sc 806 dev/usb/ubt.c if (sc->sc_scord[i].buf == NULL) {
sc 810 dev/usb/ubt.c sc->sc_scord[i].softc = sc;
sc 811 dev/usb/ubt.c sc->sc_scord[i].busy = 0;
sc 812 dev/usb/ubt.c ubt_recv_sco_start1(sc, &sc->sc_scord[i]);
sc 817 dev/usb/ubt.c if (sc->sc_scowr_size > 0) {
sc 818 dev/usb/ubt.c err = usbd_open_pipe(sc->sc_iface1, sc->sc_scowr_addr,
sc 819 dev/usb/ubt.c USBD_EXCLUSIVE_USE, &sc->sc_scowr_pipe);
sc 826 dev/usb/ubt.c sc->sc_scowr[i].xfer = usbd_alloc_xfer(sc->sc_udev);
sc 827 dev/usb/ubt.c if (sc->sc_scowr[i].xfer == NULL) {
sc 831 dev/usb/ubt.c sc->sc_scowr[i].buf = usbd_alloc_buffer(sc->sc_scowr[i].xfer,
sc 832 dev/usb/ubt.c sc->sc_scowr_size * UBT_NFRAMES);
sc 833 dev/usb/ubt.c if (sc->sc_scowr[i].buf == NULL) {
sc 837 dev/usb/ubt.c sc->sc_scowr[i].softc = sc;
sc 838 dev/usb/ubt.c sc->sc_scowr[i].busy = 0;
sc 847 dev/usb/ubt.c ubt_abortdealloc(sc);
sc 854 dev/usb/ubt.c struct ubt_softc *sc = (struct ubt_softc *)unit->hci_softc;
sc 856 dev/usb/ubt.c DPRINTFN(1, "sc=%p\n", sc);
sc 861 dev/usb/ubt.c ubt_abortdealloc(sc);
sc 869 dev/usb/ubt.c struct ubt_softc *sc = (struct ubt_softc *)unit->hci_softc;
sc 875 dev/usb/ubt.c if (sc->sc_dying)
sc 886 dev/usb/ubt.c sc->sc_refcnt++;
sc 890 dev/usb/ubt.c m_copydata(m, 1, len, sc->sc_cmd_buf);
sc 897 dev/usb/ubt.c usbd_setup_default_xfer(sc->sc_cmd_xfer,
sc 898 dev/usb/ubt.c sc->sc_udev,
sc 902 dev/usb/ubt.c sc->sc_cmd_buf,
sc 907 dev/usb/ubt.c status = usbd_transfer(sc->sc_cmd_xfer);
sc 915 dev/usb/ubt.c sc->sc_refcnt--;
sc 925 dev/usb/ubt.c struct ubt_softc *sc = (struct ubt_softc *)unit->hci_softc;
sc 933 dev/usb/ubt.c if (--sc->sc_refcnt < 0) {
sc 934 dev/usb/ubt.c DPRINTF("sc_refcnt=%d\n", sc->sc_refcnt);
sc 935 dev/usb/ubt.c usb_detach_wakeup(&sc->sc_dev);
sc 939 dev/usb/ubt.c if (sc->sc_dying) {
sc 962 dev/usb/ubt.c struct ubt_softc *sc = (struct ubt_softc *)unit->hci_softc;
sc 967 dev/usb/ubt.c if (sc->sc_dying)
sc 973 dev/usb/ubt.c sc->sc_refcnt++;
sc 989 dev/usb/ubt.c m_copydata(m, 1, len, sc->sc_aclwr_buf);
sc 995 dev/usb/ubt.c usbd_setup_xfer(sc->sc_aclwr_xfer,
sc 996 dev/usb/ubt.c sc->sc_aclwr_pipe,
sc 998 dev/usb/ubt.c sc->sc_aclwr_buf,
sc 1004 dev/usb/ubt.c status = usbd_transfer(sc->sc_aclwr_xfer);
sc 1012 dev/usb/ubt.c sc->sc_refcnt--;
sc 1022 dev/usb/ubt.c struct ubt_softc *sc = (struct ubt_softc *)unit->hci_softc;
sc 1029 dev/usb/ubt.c if (--sc->sc_refcnt < 0) {
sc 1030 dev/usb/ubt.c usb_detach_wakeup(&sc->sc_dev);
sc 1034 dev/usb/ubt.c if (sc->sc_dying)
sc 1044 dev/usb/ubt.c usbd_clear_endpoint_stall_async(sc->sc_aclwr_pipe);
sc 1055 dev/usb/ubt.c struct ubt_softc *sc = (struct ubt_softc *)unit->hci_softc;
sc 1058 dev/usb/ubt.c if (sc->sc_dying || sc->sc_scowr_size == 0)
sc 1062 dev/usb/ubt.c if (sc->sc_scowr[i].busy)
sc 1065 dev/usb/ubt.c ubt_xmit_sco_start1(sc, &sc->sc_scowr[i]);
sc 1070 dev/usb/ubt.c ubt_xmit_sco_start1(struct ubt_softc *sc, struct ubt_isoc_xfer *isoc)
sc 1076 dev/usb/ubt.c space = sc->sc_scowr_size * UBT_NFRAMES;
sc 1089 dev/usb/ubt.c m = sc->sc_scowr_mbuf;
sc 1092 dev/usb/ubt.c IF_DEQUEUE(&sc->sc_unit.hci_scotxq, m);
sc 1111 dev/usb/ubt.c sc->sc_unit.hci_stats.sco_tx++;
sc 1112 dev/usb/ubt.c hci_complete_sco(&sc->sc_unit, m);
sc 1116 dev/usb/ubt.c sc->sc_scowr_mbuf = m;
sc 1123 dev/usb/ubt.c sc->sc_refcnt++;
sc 1124 dev/usb/ubt.c sc->sc_unit.hci_flags |= BTF_XMIT_SCO;
sc 1125 dev/usb/ubt.c sc->sc_unit.hci_stats.byte_tx += len;
sc 1133 dev/usb/ubt.c size = MIN(sc->sc_scowr_size, len);
sc 1140 dev/usb/ubt.c sc->sc_scowr_pipe,
sc 1155 dev/usb/ubt.c struct ubt_softc *sc;
sc 1159 dev/usb/ubt.c sc = isoc->softc;
sc 1168 dev/usb/ubt.c sc->sc_unit.hci_flags &= ~BTF_XMIT_SCO;
sc 1172 dev/usb/ubt.c if (sc->sc_scowr[i].busy)
sc 1176 dev/usb/ubt.c if (--sc->sc_refcnt < 0) {
sc 1177 dev/usb/ubt.c usb_detach_wakeup(&sc->sc_dev);
sc 1181 dev/usb/ubt.c if (sc->sc_dying)
sc 1188 dev/usb/ubt.c sc->sc_unit.hci_stats.err_tx++;
sc 1191 dev/usb/ubt.c usbd_clear_endpoint_stall_async(sc->sc_scowr_pipe);
sc 1196 dev/usb/ubt.c ubt_xmit_sco_start(&sc->sc_unit);
sc 1229 dev/usb/ubt.c struct ubt_softc *sc = h;
sc 1235 dev/usb/ubt.c sc, usbd_errstr(status), status);
sc 1237 dev/usb/ubt.c if (status != USBD_NORMAL_COMPLETION || sc->sc_dying)
sc 1244 dev/usb/ubt.c sc->sc_unit.hci_stats.err_rx++;
sc 1248 dev/usb/ubt.c sc->sc_unit.hci_stats.evt_rx++;
sc 1249 dev/usb/ubt.c sc->sc_unit.hci_stats.byte_rx += count;
sc 1253 dev/usb/ubt.c hci_input_event(&sc->sc_unit, m);
sc 1255 dev/usb/ubt.c sc->sc_unit.hci_stats.err_rx++;
sc 1259 dev/usb/ubt.c ubt_recv_acl_start(struct ubt_softc *sc)
sc 1263 dev/usb/ubt.c DPRINTFN(15, "sc=%p\n", sc);
sc 1265 dev/usb/ubt.c if (sc->sc_aclrd_busy || sc->sc_dying) {
sc 1267 dev/usb/ubt.c sc->sc_aclrd_busy,
sc 1268 dev/usb/ubt.c sc->sc_dying);
sc 1273 dev/usb/ubt.c sc->sc_refcnt++;
sc 1274 dev/usb/ubt.c sc->sc_aclrd_busy = 1;
sc 1276 dev/usb/ubt.c usbd_setup_xfer(sc->sc_aclrd_xfer,
sc 1277 dev/usb/ubt.c sc->sc_aclrd_pipe,
sc 1278 dev/usb/ubt.c sc,
sc 1279 dev/usb/ubt.c sc->sc_aclrd_buf,
sc 1285 dev/usb/ubt.c status = usbd_transfer(sc->sc_aclrd_xfer);
sc 1293 dev/usb/ubt.c sc->sc_refcnt--;
sc 1294 dev/usb/ubt.c sc->sc_aclrd_busy = 0;
sc 1302 dev/usb/ubt.c struct ubt_softc *sc = h;
sc 1308 dev/usb/ubt.c sc, usbd_errstr(status), status);
sc 1310 dev/usb/ubt.c sc->sc_aclrd_busy = 0;
sc 1312 dev/usb/ubt.c if (--sc->sc_refcnt < 0) {
sc 1313 dev/usb/ubt.c DPRINTF("refcnt = %d\n", sc->sc_refcnt);
sc 1314 dev/usb/ubt.c usb_detach_wakeup(&sc->sc_dev);
sc 1318 dev/usb/ubt.c if (sc->sc_dying) {
sc 1327 dev/usb/ubt.c sc->sc_unit.hci_stats.err_rx++;
sc 1330 dev/usb/ubt.c usbd_clear_endpoint_stall_async(sc->sc_aclrd_pipe);
sc 1338 dev/usb/ubt.c sc->sc_unit.hci_stats.err_rx++;
sc 1340 dev/usb/ubt.c sc->sc_unit.hci_stats.acl_rx++;
sc 1341 dev/usb/ubt.c sc->sc_unit.hci_stats.byte_rx += count;
sc 1345 dev/usb/ubt.c hci_input_acl(&sc->sc_unit, m);
sc 1347 dev/usb/ubt.c sc->sc_unit.hci_stats.err_rx++;
sc 1352 dev/usb/ubt.c ubt_recv_acl_start(sc);
sc 1356 dev/usb/ubt.c ubt_recv_sco_start1(struct ubt_softc *sc, struct ubt_isoc_xfer *isoc)
sc 1360 dev/usb/ubt.c DPRINTFN(15, "sc=%p, isoc=%p\n", sc, isoc);
sc 1362 dev/usb/ubt.c if (isoc->busy || sc->sc_dying || sc->sc_scord_size == 0) {
sc 1365 dev/usb/ubt.c sc->sc_dying ? " dying" : "",
sc 1366 dev/usb/ubt.c sc->sc_scord_size == 0 ? " size=0" : "");
sc 1371 dev/usb/ubt.c sc->sc_refcnt++;
sc 1375 dev/usb/ubt.c isoc->size[i] = sc->sc_scord_size;
sc 1378 dev/usb/ubt.c sc->sc_scord_pipe,
sc 1393 dev/usb/ubt.c struct ubt_softc *sc;
sc 1402 dev/usb/ubt.c sc = isoc->softc;
sc 1405 dev/usb/ubt.c if (--sc->sc_refcnt < 0) {
sc 1406 dev/usb/ubt.c DPRINTF("refcnt=%d\n", sc->sc_refcnt);
sc 1407 dev/usb/ubt.c usb_detach_wakeup(&sc->sc_dev);
sc 1411 dev/usb/ubt.c if (sc->sc_dying) {
sc 1420 dev/usb/ubt.c sc->sc_unit.hci_stats.err_rx++;
sc 1423 dev/usb/ubt.c usbd_clear_endpoint_stall_async(sc->sc_scord_pipe);
sc 1435 dev/usb/ubt.c sc, isoc, count);
sc 1437 dev/usb/ubt.c sc->sc_unit.hci_stats.byte_rx += count;
sc 1448 dev/usb/ubt.c m = sc->sc_scord_mbuf;
sc 1450 dev/usb/ubt.c sc->sc_scord_mbuf = NULL;
sc 1463 dev/usb/ubt.c frame = isoc->buf + (i * sc->sc_scord_size);
sc 1472 dev/usb/ubt.c sc->sc_dev.dv_xname);
sc 1474 dev/usb/ubt.c sc->sc_unit.hci_stats.err_rx++;
sc 1507 dev/usb/ubt.c sc->sc_unit.hci_stats.sco_rx++;
sc 1508 dev/usb/ubt.c hci_input_sco(&sc->sc_unit, m);
sc 1519 dev/usb/ubt.c sc->sc_scord_mbuf = m;
sc 1523 dev/usb/ubt.c ubt_recv_sco_start1(sc, isoc);
sc 169 dev/usb/ucom.c ucom_lock(struct ucom_softc *sc)
sc 171 dev/usb/ucom.c sc->sc_refcnt++;
sc 172 dev/usb/ucom.c rw_enter_write(&sc->sc_lock);
sc 176 dev/usb/ucom.c ucom_unlock(struct ucom_softc *sc)
sc 178 dev/usb/ucom.c rw_exit_write(&sc->sc_lock);
sc 179 dev/usb/ucom.c if (--sc->sc_refcnt < 0)
sc 180 dev/usb/ucom.c usb_detach_wakeup(&sc->sc_dev);
sc 192 dev/usb/ucom.c struct ucom_softc *sc = (struct ucom_softc *)self;
sc 200 dev/usb/ucom.c sc->sc_udev = uca->device;
sc 201 dev/usb/ucom.c sc->sc_iface = uca->iface;
sc 202 dev/usb/ucom.c sc->sc_bulkout_no = uca->bulkout;
sc 203 dev/usb/ucom.c sc->sc_bulkin_no = uca->bulkin;
sc 204 dev/usb/ucom.c sc->sc_uhidev = uca->uhidev;
sc 205 dev/usb/ucom.c sc->sc_ibufsize = uca->ibufsize;
sc 206 dev/usb/ucom.c sc->sc_ibufsizepad = uca->ibufsizepad;
sc 207 dev/usb/ucom.c sc->sc_obufsize = uca->obufsize;
sc 208 dev/usb/ucom.c sc->sc_opkthdrlen = uca->opkthdrlen;
sc 209 dev/usb/ucom.c sc->sc_methods = uca->methods;
sc 210 dev/usb/ucom.c sc->sc_parent = uca->arg;
sc 211 dev/usb/ucom.c sc->sc_portno = uca->portno;
sc 216 dev/usb/ucom.c sc->sc_tty = tp;
sc 217 dev/usb/ucom.c sc->sc_cua = 0;
sc 219 dev/usb/ucom.c rw_init(&sc->sc_lock, "ucomlk");
sc 221 dev/usb/ucom.c sc->sc_open = 0;
sc 227 dev/usb/ucom.c struct ucom_softc *sc = (struct ucom_softc *)self;
sc 228 dev/usb/ucom.c struct tty *tp = sc->sc_tty;
sc 233 dev/usb/ucom.c sc, flags, tp, sc->sc_bulkin_no, sc->sc_bulkout_no));
sc 235 dev/usb/ucom.c sc->sc_dying = 1;
sc 237 dev/usb/ucom.c if (sc->sc_bulkin_pipe != NULL)
sc 238 dev/usb/ucom.c usbd_abort_pipe(sc->sc_bulkin_pipe);
sc 239 dev/usb/ucom.c if (sc->sc_bulkout_pipe != NULL)
sc 240 dev/usb/ucom.c usbd_abort_pipe(sc->sc_bulkout_pipe);
sc 243 dev/usb/ucom.c if (--sc->sc_refcnt >= 0) {
sc 251 dev/usb/ucom.c usb_detach_wait(&sc->sc_dev);
sc 269 dev/usb/ucom.c sc->sc_tty = NULL;
sc 278 dev/usb/ucom.c struct ucom_softc *sc = (struct ucom_softc *)self;
sc 287 dev/usb/ucom.c sc->sc_dying = 1;
sc 294 dev/usb/ucom.c ucom_shutdown(struct ucom_softc *sc)
sc 296 dev/usb/ucom.c struct tty *tp = sc->sc_tty;
sc 304 dev/usb/ucom.c ucom_dtr(sc, 0);
sc 305 dev/usb/ucom.c (void)tsleep(sc, TTIPRI, ttclos, hz);
sc 314 dev/usb/ucom.c struct ucom_softc *sc;
sc 322 dev/usb/ucom.c sc = ucom_cd.cd_devs[unit];
sc 323 dev/usb/ucom.c if (sc == NULL)
sc 326 dev/usb/ucom.c if (sc->sc_dying)
sc 329 dev/usb/ucom.c if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
sc 333 dev/usb/ucom.c ucom_lock(sc);
sc 334 dev/usb/ucom.c if (sc->sc_open++ == 0) {
sc 338 dev/usb/ucom.c sc->sc_bulkin_no, sc->sc_bulkout_no));
sc 340 dev/usb/ucom.c sc->sc_uhidev, sc->sc_ipipe, sc->sc_opipe));
sc 342 dev/usb/ucom.c if (sc->sc_bulkin_no != -1) {
sc 345 dev/usb/ucom.c err = usbd_open_pipe(sc->sc_iface, sc->sc_bulkin_no, 0,
sc 346 dev/usb/ucom.c &sc->sc_bulkin_pipe);
sc 349 dev/usb/ucom.c sc->sc_dev.dv_xname, sc->sc_bulkin_no,
sc 354 dev/usb/ucom.c err = usbd_open_pipe(sc->sc_iface, sc->sc_bulkout_no,
sc 355 dev/usb/ucom.c USBD_EXCLUSIVE_USE, &sc->sc_bulkout_pipe);
sc 358 dev/usb/ucom.c sc->sc_dev.dv_xname, sc->sc_bulkout_no,
sc 365 dev/usb/ucom.c sc->sc_ixfer = usbd_alloc_xfer(sc->sc_udev);
sc 366 dev/usb/ucom.c if (sc->sc_ixfer == NULL) {
sc 371 dev/usb/ucom.c sc->sc_ibuf = usbd_alloc_buffer(sc->sc_ixfer,
sc 372 dev/usb/ucom.c sc->sc_ibufsizepad);
sc 373 dev/usb/ucom.c if (sc->sc_ibuf == NULL) {
sc 378 dev/usb/ucom.c sc->sc_oxfer = usbd_alloc_xfer(sc->sc_udev);
sc 379 dev/usb/ucom.c if (sc->sc_oxfer == NULL) {
sc 388 dev/usb/ucom.c sc->sc_ipipe = sc->sc_uhidev->sc_ipipe;
sc 389 dev/usb/ucom.c sc->sc_ixfer = sc->sc_uhidev->sc_ixfer;
sc 390 dev/usb/ucom.c sc->sc_opipe = sc->sc_uhidev->sc_opipe;
sc 391 dev/usb/ucom.c sc->sc_oxfer = sc->sc_uhidev->sc_oxfer;
sc 394 dev/usb/ucom.c sc->sc_obuf = usbd_alloc_buffer(sc->sc_oxfer,
sc 395 dev/usb/ucom.c sc->sc_obufsize + sc->sc_opkthdrlen);
sc 396 dev/usb/ucom.c if (sc->sc_obuf == NULL) {
sc 401 dev/usb/ucom.c if (sc->sc_methods->ucom_open != NULL) {
sc 402 dev/usb/ucom.c error = sc->sc_methods->ucom_open(sc->sc_parent,
sc 403 dev/usb/ucom.c sc->sc_portno);
sc 405 dev/usb/ucom.c ucom_cleanup(sc);
sc 407 dev/usb/ucom.c ucom_unlock(sc);
sc 412 dev/usb/ucom.c ucom_status_change(sc);
sc 414 dev/usb/ucom.c ucomstartread(sc);
sc 418 dev/usb/ucom.c ucom_unlock(sc);
sc 421 dev/usb/ucom.c tp = sc->sc_tty;
sc 438 dev/usb/ucom.c if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
sc 440 dev/usb/ucom.c if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
sc 442 dev/usb/ucom.c if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
sc 462 dev/usb/ucom.c ucom_dtr(sc, 1);
sc 465 dev/usb/ucom.c ucom_hwiflow(sc);
sc 467 dev/usb/ucom.c if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || UCOMCUA(dev) ||
sc 468 dev/usb/ucom.c ISSET(sc->sc_msr, UMSR_DCD) || ISSET(tp->t_cflag, MDMBUF))
sc 484 dev/usb/ucom.c sc->sc_cua = 1;
sc 488 dev/usb/ucom.c if (sc->sc_cua) {
sc 493 dev/usb/ucom.c while (sc->sc_cua || (!ISSET(tp->t_cflag, CLOCAL) &&
sc 524 dev/usb/ucom.c if (sc->sc_uhidev == NULL)
sc 525 dev/usb/ucom.c usbd_free_xfer(sc->sc_oxfer);
sc 526 dev/usb/ucom.c sc->sc_oxfer = NULL;
sc 528 dev/usb/ucom.c usbd_free_xfer(sc->sc_ixfer);
sc 529 dev/usb/ucom.c sc->sc_ixfer = NULL;
sc 531 dev/usb/ucom.c usbd_close_pipe(sc->sc_bulkout_pipe);
sc 532 dev/usb/ucom.c sc->sc_bulkout_pipe = NULL;
sc 534 dev/usb/ucom.c usbd_close_pipe(sc->sc_bulkin_pipe);
sc 535 dev/usb/ucom.c sc->sc_bulkin_pipe = NULL;
sc 538 dev/usb/ucom.c ucom_unlock(sc);
sc 544 dev/usb/ucom.c ucom_lock(sc);
sc 545 dev/usb/ucom.c ucom_cleanup(sc);
sc 546 dev/usb/ucom.c ucom_unlock(sc);
sc 554 dev/usb/ucom.c struct ucom_softc *sc = ucom_cd.cd_devs[UCOMUNIT(dev)];
sc 555 dev/usb/ucom.c struct tty *tp = sc->sc_tty;
sc 562 dev/usb/ucom.c ucom_lock(sc);
sc 567 dev/usb/ucom.c sc->sc_cua = 0;
sc 569 dev/usb/ucom.c ucom_cleanup(sc);
sc 572 dev/usb/ucom.c if (sc->sc_methods->ucom_close != NULL)
sc 573 dev/usb/ucom.c sc->sc_methods->ucom_close(sc->sc_parent, sc->sc_portno);
sc 575 dev/usb/ucom.c ucom_unlock(sc);
sc 583 dev/usb/ucom.c struct ucom_softc *sc = ucom_cd.cd_devs[UCOMUNIT(dev)];
sc 584 dev/usb/ucom.c struct tty *tp = sc->sc_tty;
sc 587 dev/usb/ucom.c if (sc->sc_dying)
sc 590 dev/usb/ucom.c sc->sc_refcnt++;
sc 592 dev/usb/ucom.c if (--sc->sc_refcnt < 0)
sc 593 dev/usb/ucom.c usb_detach_wakeup(&sc->sc_dev);
sc 600 dev/usb/ucom.c struct ucom_softc *sc = ucom_cd.cd_devs[UCOMUNIT(dev)];
sc 601 dev/usb/ucom.c struct tty *tp = sc->sc_tty;
sc 604 dev/usb/ucom.c if (sc->sc_dying)
sc 607 dev/usb/ucom.c sc->sc_refcnt++;
sc 609 dev/usb/ucom.c if (--sc->sc_refcnt < 0)
sc 610 dev/usb/ucom.c usb_detach_wakeup(&sc->sc_dev);
sc 617 dev/usb/ucom.c struct ucom_softc *sc = ucom_cd.cd_devs[UCOMUNIT(dev)];
sc 618 dev/usb/ucom.c struct tty *tp = sc->sc_tty;
sc 626 dev/usb/ucom.c struct ucom_softc *sc = ucom_cd.cd_devs[UCOMUNIT(dev)];
sc 629 dev/usb/ucom.c sc->sc_refcnt++;
sc 630 dev/usb/ucom.c error = ucom_do_ioctl(sc, cmd, data, flag, p);
sc 631 dev/usb/ucom.c if (--sc->sc_refcnt < 0)
sc 632 dev/usb/ucom.c usb_detach_wakeup(&sc->sc_dev);
sc 637 dev/usb/ucom.c ucom_do_ioctl(struct ucom_softc *sc, u_long cmd, caddr_t data,
sc 640 dev/usb/ucom.c struct tty *tp = sc->sc_tty;
sc 644 dev/usb/ucom.c if (sc->sc_dying)
sc 657 dev/usb/ucom.c if (sc->sc_methods->ucom_ioctl != NULL) {
sc 658 dev/usb/ucom.c error = sc->sc_methods->ucom_ioctl(sc->sc_parent,
sc 659 dev/usb/ucom.c sc->sc_portno, cmd, data, flag, p);
sc 671 dev/usb/ucom.c ucom_break(sc, 1);
sc 675 dev/usb/ucom.c ucom_break(sc, 0);
sc 679 dev/usb/ucom.c ucom_dtr(sc, 1);
sc 683 dev/usb/ucom.c ucom_dtr(sc, 0);
sc 687 dev/usb/ucom.c *(int *)data = sc->sc_swflags;
sc 694 dev/usb/ucom.c sc->sc_swflags = *(int *)data;
sc 700 dev/usb/ucom.c tiocm_to_ucom(sc, cmd, *(int *)data);
sc 704 dev/usb/ucom.c *(int *)data = ucom_to_tiocm(sc);
sc 718 dev/usb/ucom.c tiocm_to_ucom(struct ucom_softc *sc, u_long how, int ttybits)
sc 730 dev/usb/ucom.c CLR(sc->sc_mcr, combits);
sc 734 dev/usb/ucom.c SET(sc->sc_mcr, combits);
sc 738 dev/usb/ucom.c CLR(sc->sc_mcr, UMCR_DTR | UMCR_RTS);
sc 739 dev/usb/ucom.c SET(sc->sc_mcr, combits);
sc 744 dev/usb/ucom.c ucom_dtr(sc, (sc->sc_mcr & UMCR_DTR) != 0);
sc 746 dev/usb/ucom.c ucom_rts(sc, (sc->sc_mcr & UMCR_RTS) != 0);
sc 750 dev/usb/ucom.c ucom_to_tiocm(struct ucom_softc *sc)
sc 755 dev/usb/ucom.c combits = sc->sc_mcr;
sc 761 dev/usb/ucom.c combits = sc->sc_msr;
sc 773 dev/usb/ucom.c if (sc->sc_ier != 0)
sc 781 dev/usb/ucom.c ucom_break(sc, onoff)
sc 782 dev/usb/ucom.c struct ucom_softc *sc;
sc 787 dev/usb/ucom.c if (sc->sc_methods->ucom_set != NULL)
sc 788 dev/usb/ucom.c sc->sc_methods->ucom_set(sc->sc_parent, sc->sc_portno,
sc 793 dev/usb/ucom.c ucom_dtr(struct ucom_softc *sc, int onoff)
sc 797 dev/usb/ucom.c if (sc->sc_methods->ucom_set != NULL) {
sc 798 dev/usb/ucom.c sc->sc_methods->ucom_set(sc->sc_parent, sc->sc_portno,
sc 801 dev/usb/ucom.c if (!(sc->sc_swflags & TIOCFLAG_CRTSCTS))
sc 802 dev/usb/ucom.c ucom_rts(sc, onoff);
sc 807 dev/usb/ucom.c ucom_rts(struct ucom_softc *sc, int onoff)
sc 811 dev/usb/ucom.c if (sc->sc_methods->ucom_set != NULL)
sc 812 dev/usb/ucom.c sc->sc_methods->ucom_set(sc->sc_parent, sc->sc_portno,
sc 817 dev/usb/ucom.c ucom_status_change(struct ucom_softc *sc)
sc 819 dev/usb/ucom.c struct tty *tp = sc->sc_tty;
sc 822 dev/usb/ucom.c if (sc->sc_methods->ucom_get_status != NULL) {
sc 823 dev/usb/ucom.c old_msr = sc->sc_msr;
sc 824 dev/usb/ucom.c sc->sc_methods->ucom_get_status(sc->sc_parent, sc->sc_portno,
sc 825 dev/usb/ucom.c &sc->sc_lsr, &sc->sc_msr);
sc 827 dev/usb/ucom.c ttytstamp(tp, old_msr & UMSR_CTS, sc->sc_msr & UMSR_CTS,
sc 828 dev/usb/ucom.c old_msr & UMSR_DCD, sc->sc_msr & UMSR_DCD);
sc 830 dev/usb/ucom.c if (ISSET((sc->sc_msr ^ old_msr), UMSR_DCD))
sc 832 dev/usb/ucom.c ISSET(sc->sc_msr, UMSR_DCD));
sc 834 dev/usb/ucom.c sc->sc_lsr = 0;
sc 835 dev/usb/ucom.c sc->sc_msr = 0;
sc 842 dev/usb/ucom.c struct ucom_softc *sc = ucom_cd.cd_devs[UCOMUNIT(tp->t_dev)];
sc 845 dev/usb/ucom.c if (sc->sc_dying)
sc 856 dev/usb/ucom.c if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR)) {
sc 877 dev/usb/ucom.c if (sc->sc_methods->ucom_param != NULL) {
sc 878 dev/usb/ucom.c error = sc->sc_methods->ucom_param(sc->sc_parent, sc->sc_portno,
sc 897 dev/usb/ucom.c if (sc->sc_tx_stopped) {
sc 898 dev/usb/ucom.c sc->sc_tx_stopped = 0;
sc 911 dev/usb/ucom.c ucom_hwiflow(struct ucom_softc *sc)
sc 916 dev/usb/ucom.c bus_space_tag_t iot = sc->sc_iot;
sc 917 dev/usb/ucom.c bus_space_handle_t ioh = sc->sc_ioh;
sc 919 dev/usb/ucom.c if (sc->sc_mcr_rts == 0)
sc 922 dev/usb/ucom.c if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) {
sc 923 dev/usb/ucom.c CLR(sc->sc_mcr, sc->sc_mcr_rts);
sc 924 dev/usb/ucom.c CLR(sc->sc_mcr_active, sc->sc_mcr_rts);
sc 926 dev/usb/ucom.c SET(sc->sc_mcr, sc->sc_mcr_rts);
sc 927 dev/usb/ucom.c SET(sc->sc_mcr_active, sc->sc_mcr_rts);
sc 929 dev/usb/ucom.c bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active);
sc 936 dev/usb/ucom.c struct ucom_softc *sc = ucom_cd.cd_devs[UCOMUNIT(tp->t_dev)];
sc 942 dev/usb/ucom.c if (sc->sc_dying)
sc 950 dev/usb/ucom.c if (sc->sc_tx_stopped)
sc 974 dev/usb/ucom.c if (cnt > sc->sc_obufsize) {
sc 976 dev/usb/ucom.c cnt = sc->sc_obufsize;
sc 978 dev/usb/ucom.c if (sc->sc_methods->ucom_write != NULL)
sc 979 dev/usb/ucom.c sc->sc_methods->ucom_write(sc->sc_parent, sc->sc_portno,
sc 980 dev/usb/ucom.c sc->sc_obuf, data, &cnt);
sc 982 dev/usb/ucom.c memcpy(sc->sc_obuf, data, cnt);
sc 986 dev/usb/ucom.c if (sc->sc_oxfer == NULL) {
sc 991 dev/usb/ucom.c if (sc->sc_bulkout_pipe != NULL) {
sc 992 dev/usb/ucom.c usbd_setup_xfer(sc->sc_oxfer, sc->sc_bulkout_pipe,
sc 993 dev/usb/ucom.c (usbd_private_handle)sc, sc->sc_obuf, cnt,
sc 996 dev/usb/ucom.c usbd_setup_xfer(sc->sc_oxfer, sc->sc_opipe,
sc 997 dev/usb/ucom.c (usbd_private_handle)sc, sc->sc_obuf, cnt,
sc 1001 dev/usb/ucom.c err = usbd_transfer(sc->sc_oxfer);
sc 1034 dev/usb/ucom.c struct ucom_softc *sc = (struct ucom_softc *)p;
sc 1035 dev/usb/ucom.c struct tty *tp = sc->sc_tty;
sc 1041 dev/usb/ucom.c if (status == USBD_CANCELLED || sc->sc_dying)
sc 1044 dev/usb/ucom.c if (sc->sc_bulkin_pipe != NULL) {
sc 1046 dev/usb/ucom.c usbd_clear_endpoint_stall_async(sc->sc_bulkin_pipe);
sc 1058 dev/usb/ucom.c cc -= sc->sc_opkthdrlen;
sc 1077 dev/usb/ucom.c ucomstartread(struct ucom_softc *sc)
sc 1083 dev/usb/ucom.c if (sc->sc_ixfer == NULL) {
sc 1089 dev/usb/ucom.c if (sc->sc_bulkin_pipe != NULL) {
sc 1090 dev/usb/ucom.c usbd_setup_xfer(sc->sc_ixfer, sc->sc_bulkin_pipe,
sc 1091 dev/usb/ucom.c (usbd_private_handle)sc,
sc 1092 dev/usb/ucom.c sc->sc_ibuf, sc->sc_ibufsize,
sc 1095 dev/usb/ucom.c err = usbd_transfer(sc->sc_ixfer);
sc 1108 dev/usb/ucom.c struct ucom_softc *sc = (struct ucom_softc *)p;
sc 1109 dev/usb/ucom.c struct tty *tp = sc->sc_tty;
sc 1119 dev/usb/ucom.c sc->sc_dying) {
sc 1130 dev/usb/ucom.c if (sc->sc_bulkin_pipe != NULL) {
sc 1131 dev/usb/ucom.c usbd_clear_endpoint_stall_async(sc->sc_bulkin_pipe);
sc 1139 dev/usb/ucom.c if (sc->sc_methods->ucom_read != NULL)
sc 1140 dev/usb/ucom.c sc->sc_methods->ucom_read(sc->sc_parent, sc->sc_portno,
sc 1149 dev/usb/ucom.c printf("%s: lost %d chars\n", sc->sc_dev.dv_xname,
sc 1156 dev/usb/ucom.c err = ucomstartread(sc);
sc 1158 dev/usb/ucom.c printf("%s: read start failed\n", sc->sc_dev.dv_xname);
sc 1164 dev/usb/ucom.c ucom_cleanup(struct ucom_softc *sc)
sc 1166 dev/usb/ucom.c if (--sc->sc_open == 0) {
sc 1169 dev/usb/ucom.c ucom_shutdown(sc);
sc 1170 dev/usb/ucom.c if (sc->sc_bulkin_pipe != NULL) {
sc 1171 dev/usb/ucom.c usbd_abort_pipe(sc->sc_bulkin_pipe);
sc 1172 dev/usb/ucom.c usbd_close_pipe(sc->sc_bulkin_pipe);
sc 1173 dev/usb/ucom.c sc->sc_bulkin_pipe = NULL;
sc 1175 dev/usb/ucom.c if (sc->sc_bulkout_pipe != NULL) {
sc 1176 dev/usb/ucom.c usbd_abort_pipe(sc->sc_bulkout_pipe);
sc 1177 dev/usb/ucom.c usbd_close_pipe(sc->sc_bulkout_pipe);
sc 1178 dev/usb/ucom.c sc->sc_bulkout_pipe = NULL;
sc 1180 dev/usb/ucom.c if (sc->sc_ixfer != NULL) {
sc 1181 dev/usb/ucom.c if (sc->sc_uhidev == NULL)
sc 1182 dev/usb/ucom.c usbd_free_xfer(sc->sc_ixfer);
sc 1183 dev/usb/ucom.c sc->sc_ixfer = NULL;
sc 1185 dev/usb/ucom.c if (sc->sc_oxfer != NULL) {
sc 1186 dev/usb/ucom.c usbd_free_buffer(sc->sc_oxfer);
sc 1187 dev/usb/ucom.c if (sc->sc_uhidev == NULL)
sc 1188 dev/usb/ucom.c usbd_free_xfer(sc->sc_oxfer);
sc 1189 dev/usb/ucom.c sc->sc_oxfer = NULL;
sc 50 dev/usb/ucomvar.h void (*ucom_get_status)(void *sc, int portno, u_char *lsr, u_char *msr);
sc 51 dev/usb/ucomvar.h void (*ucom_set)(void *sc, int portno, int reg, int onoff);
sc 55 dev/usb/ucomvar.h int (*ucom_param)(void *sc, int portno, struct termios *);
sc 56 dev/usb/ucomvar.h int (*ucom_ioctl)(void *sc, int portno, u_long cmd,
sc 58 dev/usb/ucomvar.h int (*ucom_open)(void *sc, int portno);
sc 59 dev/usb/ucomvar.h void (*ucom_close)(void *sc, int portno);
sc 60 dev/usb/ucomvar.h void (*ucom_read)(void *sc, int portno, u_char **ptr, u_int32_t *count);
sc 61 dev/usb/ucomvar.h void (*ucom_write)(void *sc, int portno, u_char *to, u_char *from,
sc 198 dev/usb/ucycom.c struct ucycom_softc *sc = (struct ucycom_softc *)self;
sc 206 dev/usb/ucycom.c sc->sc_hdev.sc_intr = ucycom_intr;
sc 207 dev/usb/ucycom.c sc->sc_hdev.sc_parent = uha->parent;
sc 208 dev/usb/ucycom.c sc->sc_hdev.sc_report_id = uha->reportid;
sc 212 dev/usb/ucycom.c sc->sc_ilen = hid_report_size(desc, size, hid_input, repid);
sc 213 dev/usb/ucycom.c sc->sc_olen = hid_report_size(desc, size, hid_output, repid);
sc 214 dev/usb/ucycom.c sc->sc_flen = hid_report_size(desc, size, hid_feature, repid);
sc 216 dev/usb/ucycom.c DPRINTF(("ucycom_open: olen %d ilen %d flen %d\n", sc->sc_ilen,
sc 217 dev/usb/ucycom.c sc->sc_olen, sc->sc_flen));
sc 221 dev/usb/ucycom.c sc->sc_udev = dev;
sc 223 dev/usb/ucycom.c sc->sc_msr = sc->sc_mcr = 0;
sc 225 dev/usb/ucycom.c err = uhidev_open(&sc->sc_hdev);
sc 232 dev/usb/ucycom.c sc, sc->sc_hdev.sc_parent->sc_opipe, sc->sc_hdev.sc_parent->sc_ipipe,
sc 238 dev/usb/ucycom.c uca.uhidev = sc->sc_hdev.sc_parent;
sc 239 dev/usb/ucycom.c uca.ibufsize = sc->sc_ilen - 1;
sc 240 dev/usb/ucycom.c uca.obufsize = sc->sc_olen - 1;
sc 246 dev/usb/ucycom.c uca.arg = sc;
sc 249 dev/usb/ucycom.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 250 dev/usb/ucycom.c &sc->sc_hdev.sc_dev);
sc 252 dev/usb/ucycom.c sc->sc_subdev = config_found_sm(self, &uca, ucomprint, ucomsubmatch);
sc 253 dev/usb/ucycom.c DPRINTF(("ucycom_attach: complete %p\n", sc->sc_subdev));
sc 259 dev/usb/ucycom.c struct ucycom_softc *sc = addr;
sc 265 dev/usb/ucycom.c *lsr = sc->sc_lsr;
sc 268 dev/usb/ucycom.c *msr = sc->sc_msr;
sc 274 dev/usb/ucycom.c struct ucycom_softc *sc = addr;
sc 280 dev/usb/ucycom.c if (sc->sc_dying)
sc 284 dev/usb/ucycom.c sc->sc_obuf = malloc(sc->sc_olen, M_USBDEV, M_WAITOK);
sc 287 dev/usb/ucycom.c sc->sc_ibuf = malloc(sc->sc_ilen, M_USBDEV, M_WAITOK);
sc 290 dev/usb/ucycom.c sc->sc_ibuf, sc->sc_obuf));
sc 294 dev/usb/ucycom.c (void)ucycom_param(sc, portno, &t);
sc 296 dev/usb/ucycom.c sc->sc_mcr = UCYCOM_DTR | UCYCOM_RTS;
sc 297 dev/usb/ucycom.c memset(sc->sc_obuf, 0, sc->sc_olen);
sc 298 dev/usb/ucycom.c sc->sc_obuf[0] = sc->sc_mcr;
sc 299 dev/usb/ucycom.c err = uhidev_write(sc->sc_hdev.sc_parent, sc->sc_obuf, sc->sc_olen);
sc 311 dev/usb/ucycom.c struct ucycom_softc *sc = addr;
sc 314 dev/usb/ucycom.c if (sc->sc_dying)
sc 318 dev/usb/ucycom.c if (sc->sc_obuf != NULL) {
sc 319 dev/usb/ucycom.c free(sc->sc_obuf, M_USBDEV);
sc 320 dev/usb/ucycom.c sc->sc_obuf = NULL;
sc 322 dev/usb/ucycom.c if (sc->sc_ibuf != NULL) {
sc 323 dev/usb/ucycom.c free(sc->sc_ibuf, M_USBDEV);
sc 324 dev/usb/ucycom.c sc->sc_ibuf = NULL;
sc 332 dev/usb/ucycom.c struct ucycom_softc *sc = addr;
sc 334 dev/usb/ucycom.c if (sc->sc_newmsr ^ sc->sc_msr) {
sc 336 dev/usb/ucycom.c sc->sc_msr, sc->sc_newmsr));
sc 337 dev/usb/ucycom.c sc->sc_msr = sc->sc_newmsr;
sc 338 dev/usb/ucycom.c ucom_status_change((struct ucom_softc *)sc->sc_subdev);
sc 341 dev/usb/ucycom.c DPRINTF(("ucycom_read: buf %p chars %d\n", sc->sc_ibuf, sc->sc_icnt));
sc 342 dev/usb/ucycom.c *ptr = sc->sc_ibuf;
sc 343 dev/usb/ucycom.c *count = sc->sc_icnt;
sc 349 dev/usb/ucycom.c struct ucycom_softc *sc = addr;
sc 362 dev/usb/ucycom.c len = sc->sc_olen;
sc 364 dev/usb/ucycom.c switch (sc->sc_olen) {
sc 366 dev/usb/ucycom.c to[0] = *cnt | sc->sc_mcr;
sc 369 dev/usb/ucycom.c *cnt, sc->sc_mcr, to[0]));
sc 373 dev/usb/ucycom.c to[0] = sc->sc_mcr;
sc 396 dev/usb/ucycom.c ucycom_get_cfg(sc);
sc 404 dev/usb/ucycom.c struct ucycom_softc *sc = addr;
sc 410 dev/usb/ucycom.c if (sc->sc_dying)
sc 438 dev/usb/ucycom.c cfg = sc->sc_cfg;
sc 476 dev/usb/ucycom.c err = uhidev_set_report(&sc->sc_hdev, UHID_FEATURE_REPORT,
sc 477 dev/usb/ucycom.c report, sc->sc_flen);
sc 483 dev/usb/ucycom.c sc->sc_baud = baud;
sc 491 dev/usb/ucycom.c struct ucycom_softc *sc = (struct ucycom_softc *)addr;
sc 496 dev/usb/ucycom.c if (sc->sc_ibuf == NULL)
sc 531 dev/usb/ucycom.c if (n > 0 || st != sc->sc_msr) {
sc 533 dev/usb/ucycom.c sc->sc_newmsr = st;
sc 534 dev/usb/ucycom.c bcopy(cp, sc->sc_ibuf, n);
sc 535 dev/usb/ucycom.c sc->sc_icnt = n;
sc 536 dev/usb/ucycom.c ucomreadcb(addr->sc_parent->sc_ixfer, sc->sc_subdev,
sc 545 dev/usb/ucycom.c struct ucycom_softc *sc = addr;
sc 551 dev/usb/ucycom.c SET(sc->sc_mcr, UCYCOM_DTR);
sc 553 dev/usb/ucycom.c CLR(sc->sc_mcr, UCYCOM_DTR);
sc 557 dev/usb/ucycom.c SET(sc->sc_mcr, UCYCOM_RTS);
sc 559 dev/usb/ucycom.c CLR(sc->sc_mcr, UCYCOM_RTS);
sc 565 dev/usb/ucycom.c memset(sc->sc_obuf, 0, sc->sc_olen);
sc 566 dev/usb/ucycom.c sc->sc_obuf[0] = sc->sc_mcr;
sc 568 dev/usb/ucycom.c err = uhidev_write(sc->sc_hdev.sc_parent, sc->sc_obuf, sc->sc_olen);
sc 574 dev/usb/ucycom.c ucycom_get_cfg(struct ucycom_softc *sc)
sc 579 dev/usb/ucycom.c err = uhidev_get_report(&sc->sc_hdev, UHID_FEATURE_REPORT,
sc 580 dev/usb/ucycom.c report, sc->sc_flen);
sc 593 dev/usb/ucycom.c struct ucycom_softc *sc = (struct ucycom_softc *)self;
sc 595 dev/usb/ucycom.c DPRINTF(("ucycom_detach: sc=%p flags=%d\n", sc, flags));
sc 596 dev/usb/ucycom.c sc->sc_dying = 1;
sc 597 dev/usb/ucycom.c if (sc->sc_subdev != NULL) {
sc 598 dev/usb/ucycom.c config_detach(sc->sc_subdev, flags);
sc 599 dev/usb/ucycom.c sc->sc_subdev = NULL;
sc 607 dev/usb/ucycom.c struct ucycom_softc *sc = (struct ucycom_softc *)self;
sc 617 dev/usb/ucycom.c if (sc->sc_subdev != NULL)
sc 618 dev/usb/ucycom.c rv = config_deactivate(sc->sc_subdev);
sc 619 dev/usb/ucycom.c sc->sc_dying = 1;
sc 169 dev/usb/udcf.c struct udcf_softc *sc = (struct udcf_softc *)self;
sc 183 dev/usb/udcf.c sc->sc_dev.dv_xname, usbd_errstr(err)));
sc 189 dev/usb/udcf.c sc->sc_dev.dv_xname, usbd_errstr(err)));
sc 194 dev/usb/udcf.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 199 dev/usb/udcf.c sc->sc_udev = dev;
sc 200 dev/usb/udcf.c sc->sc_iface = iface;
sc 202 dev/usb/udcf.c sc->sc_clocktype = -1;
sc 203 dev/usb/udcf.c sc->sc_level = 0;
sc 204 dev/usb/udcf.c sc->sc_minute = 0;
sc 205 dev/usb/udcf.c sc->sc_last_mg = 0L;
sc 207 dev/usb/udcf.c sc->sc_sync = 1;
sc 209 dev/usb/udcf.c sc->sc_current = 0L;
sc 210 dev/usb/udcf.c sc->sc_next = 0L;
sc 211 dev/usb/udcf.c sc->sc_nrecv = 0;
sc 212 dev/usb/udcf.c sc->sc_last = 0L;
sc 213 dev/usb/udcf.c sc->sc_last_tv.tv_sec = 0L;
sc 215 dev/usb/udcf.c strlcpy(sc->sc_sensordev.xname, sc->sc_dev.dv_xname,
sc 216 dev/usb/udcf.c sizeof(sc->sc_sensordev.xname));
sc 218 dev/usb/udcf.c sc->sc_sensor.type = SENSOR_TIMEDELTA;
sc 219 dev/usb/udcf.c sc->sc_sensor.status = SENSOR_S_UNKNOWN;
sc 220 dev/usb/udcf.c sc->sc_sensor.value = 0LL;
sc 221 dev/usb/udcf.c sc->sc_sensor.flags = 0;
sc 222 dev/usb/udcf.c strlcpy(sc->sc_sensor.desc, "Unknown", sizeof(sc->sc_sensor.desc));
sc 223 dev/usb/udcf.c sensor_attach(&sc->sc_sensordev, &sc->sc_sensor);
sc 226 dev/usb/udcf.c sc->sc_skew.type = SENSOR_TIMEDELTA;
sc 227 dev/usb/udcf.c sc->sc_skew.status = SENSOR_S_UNKNOWN;
sc 228 dev/usb/udcf.c sc->sc_skew.value = 0LL;
sc 229 dev/usb/udcf.c sc->sc_skew.flags = 0;
sc 230 dev/usb/udcf.c strlcpy(sc->sc_skew.desc, "local clock skew",
sc 231 dev/usb/udcf.c sizeof(sc->sc_skew.desc));
sc 232 dev/usb/udcf.c sensor_attach(&sc->sc_sensordev, &sc->sc_skew);
sc 235 dev/usb/udcf.c sensordev_install(&sc->sc_sensordev);
sc 238 dev/usb/udcf.c sc->sc_req.bmRequestType = UDCF_READ_REQ;
sc 239 dev/usb/udcf.c sc->sc_req.bRequest = 1;
sc 240 dev/usb/udcf.c USETW(sc->sc_req.wValue, 0);
sc 241 dev/usb/udcf.c USETW(sc->sc_req.wIndex, UDCF_READ_IDX);
sc 242 dev/usb/udcf.c USETW(sc->sc_req.wLength, 1);
sc 249 dev/usb/udcf.c if ((err = usbd_do_request_flags(sc->sc_udev, &req, &result,
sc 260 dev/usb/udcf.c if ((err = usbd_do_request_flags(sc->sc_udev, &req, &result,
sc 266 dev/usb/udcf.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 267 dev/usb/udcf.c &sc->sc_dev);
sc 269 dev/usb/udcf.c usb_init_task(&sc->sc_task, udcf_probe, sc);
sc 270 dev/usb/udcf.c usb_init_task(&sc->sc_bv_task, udcf_bv_probe, sc);
sc 271 dev/usb/udcf.c usb_init_task(&sc->sc_mg_task, udcf_mg_probe, sc);
sc 272 dev/usb/udcf.c usb_init_task(&sc->sc_sl_task, udcf_sl_probe, sc);
sc 273 dev/usb/udcf.c usb_init_task(&sc->sc_it_task, udcf_it_probe, sc);
sc 274 dev/usb/udcf.c usb_init_task(&sc->sc_ct_task, udcf_ct_probe, sc);
sc 276 dev/usb/udcf.c timeout_set(&sc->sc_to, udcf_intr, sc);
sc 277 dev/usb/udcf.c timeout_set(&sc->sc_bv_to, udcf_bv_intr, sc);
sc 278 dev/usb/udcf.c timeout_set(&sc->sc_mg_to, udcf_mg_intr, sc);
sc 279 dev/usb/udcf.c timeout_set(&sc->sc_sl_to, udcf_sl_intr, sc);
sc 280 dev/usb/udcf.c timeout_set(&sc->sc_it_to, udcf_it_intr, sc);
sc 281 dev/usb/udcf.c timeout_set(&sc->sc_ct_to, udcf_ct_intr, sc);
sc 316 dev/usb/udcf.c timeout_add(&sc->sc_to, t_wait);
sc 319 dev/usb/udcf.c timeout_add(&sc->sc_sl_to, t_wait + t_sl);
sc 326 dev/usb/udcf.c sc->sc_dying = 1;
sc 332 dev/usb/udcf.c struct udcf_softc *sc = (struct udcf_softc *)self;
sc 334 dev/usb/udcf.c sc->sc_dying = 1;
sc 336 dev/usb/udcf.c timeout_del(&sc->sc_to);
sc 337 dev/usb/udcf.c timeout_del(&sc->sc_bv_to);
sc 338 dev/usb/udcf.c timeout_del(&sc->sc_mg_to);
sc 339 dev/usb/udcf.c timeout_del(&sc->sc_sl_to);
sc 340 dev/usb/udcf.c timeout_del(&sc->sc_it_to);
sc 341 dev/usb/udcf.c timeout_del(&sc->sc_ct_to);
sc 344 dev/usb/udcf.c sensordev_deinstall(&sc->sc_sensordev);
sc 345 dev/usb/udcf.c usb_rem_task(sc->sc_udev, &sc->sc_task);
sc 346 dev/usb/udcf.c usb_rem_task(sc->sc_udev, &sc->sc_bv_task);
sc 347 dev/usb/udcf.c usb_rem_task(sc->sc_udev, &sc->sc_mg_task);
sc 348 dev/usb/udcf.c usb_rem_task(sc->sc_udev, &sc->sc_sl_task);
sc 349 dev/usb/udcf.c usb_rem_task(sc->sc_udev, &sc->sc_it_task);
sc 350 dev/usb/udcf.c usb_rem_task(sc->sc_udev, &sc->sc_ct_task);
sc 352 dev/usb/udcf.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 353 dev/usb/udcf.c &sc->sc_dev);
sc 361 dev/usb/udcf.c struct udcf_softc *sc = xsc;
sc 362 dev/usb/udcf.c usb_add_task(sc->sc_udev, &sc->sc_task);
sc 369 dev/usb/udcf.c struct udcf_softc *sc = xsc;
sc 370 dev/usb/udcf.c usb_add_task(sc->sc_udev, &sc->sc_bv_task);
sc 377 dev/usb/udcf.c struct udcf_softc *sc = xsc;
sc 378 dev/usb/udcf.c usb_add_task(sc->sc_udev, &sc->sc_mg_task);
sc 385 dev/usb/udcf.c struct udcf_softc *sc = xsc;
sc 386 dev/usb/udcf.c usb_add_task(sc->sc_udev, &sc->sc_sl_task);
sc 393 dev/usb/udcf.c struct udcf_softc *sc = xsc;
sc 394 dev/usb/udcf.c usb_add_task(sc->sc_udev, &sc->sc_it_task);
sc 401 dev/usb/udcf.c struct udcf_softc *sc = xsc;
sc 402 dev/usb/udcf.c usb_add_task(sc->sc_udev, &sc->sc_ct_task);
sc 412 dev/usb/udcf.c struct udcf_softc *sc = xsc;
sc 417 dev/usb/udcf.c if (sc->sc_dying)
sc 420 dev/usb/udcf.c if (usbd_do_request_flags(sc->sc_udev, &sc->sc_req, &data,
sc 426 dev/usb/udcf.c sc->sc_level = 1;
sc 427 dev/usb/udcf.c timeout_add(&sc->sc_to, 1);
sc 431 dev/usb/udcf.c if (sc->sc_level == 0)
sc 435 dev/usb/udcf.c sc->sc_level = 0;
sc 436 dev/usb/udcf.c if (sc->sc_minute == 1) {
sc 437 dev/usb/udcf.c if (sc->sc_sync) {
sc 439 dev/usb/udcf.c sc->sc_sync = 0;
sc 440 dev/usb/udcf.c if (sc->sc_sensor.status == SENSOR_S_UNKNOWN)
sc 441 dev/usb/udcf.c sc->sc_clocktype = -1;
sc 444 dev/usb/udcf.c microtime(&sc->sc_sensor.tv);
sc 446 dev/usb/udcf.c sc->sc_current = sc->sc_next;
sc 447 dev/usb/udcf.c sc->sc_sensor.value = (int64_t)(now.tv_sec -
sc 448 dev/usb/udcf.c sc->sc_current) * 1000000000LL + now.tv_nsec;
sc 451 dev/usb/udcf.c if (sc->sc_sensor.status == SENSOR_S_UNKNOWN) {
sc 452 dev/usb/udcf.c strlcpy(sc->sc_sensor.desc, sc->sc_clocktype ?
sc 455 dev/usb/udcf.c sizeof(sc->sc_sensor.desc));
sc 457 dev/usb/udcf.c sc->sc_sensor.status = SENSOR_S_OK;
sc 464 dev/usb/udcf.c timeout_add(&sc->sc_it_to, t_warn);
sc 466 dev/usb/udcf.c sc->sc_minute = 0;
sc 469 dev/usb/udcf.c timeout_add(&sc->sc_to, t_sync); /* resync in 950 ms */
sc 472 dev/usb/udcf.c if (!sc->sc_sync) {
sc 474 dev/usb/udcf.c timeout_add(&sc->sc_bv_to, t_bv);
sc 477 dev/usb/udcf.c if (sc->sc_clocktype == -1)
sc 478 dev/usb/udcf.c timeout_add(&sc->sc_ct_to, t_ct);
sc 480 dev/usb/udcf.c timeout_add(&sc->sc_mg_to, t_mg); /* detect minute gap */
sc 481 dev/usb/udcf.c timeout_add(&sc->sc_sl_to, t_sl); /* detect signal loss */
sc 488 dev/usb/udcf.c struct udcf_softc *sc = xsc;
sc 492 dev/usb/udcf.c if (sc->sc_dying)
sc 495 dev/usb/udcf.c if (usbd_do_request_flags(sc->sc_udev, &sc->sc_req, &data,
sc 504 dev/usb/udcf.c sc->sc_tbits |= sc->sc_mask;
sc 505 dev/usb/udcf.c sc->sc_mask <<= 1;
sc 512 dev/usb/udcf.c struct udcf_softc *sc = xsc;
sc 525 dev/usb/udcf.c if (sc->sc_sync) {
sc 526 dev/usb/udcf.c sc->sc_minute = 1;
sc 530 dev/usb/udcf.c if (time_second - sc->sc_last_mg < 57) {
sc 532 dev/usb/udcf.c sc->sc_sync = sc->sc_minute = 1;
sc 537 dev/usb/udcf.c m_bit = sc->sc_tbits & 1;
sc 538 dev/usb/udcf.c r_bit = sc->sc_tbits >> 15 & 1;
sc 539 dev/usb/udcf.c a1_bit = sc->sc_tbits >> 16 & 1;
sc 540 dev/usb/udcf.c z1_bit = sc->sc_tbits >> 17 & 1;
sc 541 dev/usb/udcf.c z2_bit = sc->sc_tbits >> 18 & 1;
sc 542 dev/usb/udcf.c a2_bit = sc->sc_tbits >> 19 & 1;
sc 543 dev/usb/udcf.c s_bit = sc->sc_tbits >> 20 & 1;
sc 544 dev/usb/udcf.c p1_bit = sc->sc_tbits >> 28 & 1;
sc 545 dev/usb/udcf.c p2_bit = sc->sc_tbits >> 35 & 1;
sc 546 dev/usb/udcf.c p3_bit = sc->sc_tbits >> 58 & 1;
sc 548 dev/usb/udcf.c minute_bits = sc->sc_tbits >> 21 & 0x7f;
sc 549 dev/usb/udcf.c hour_bits = sc->sc_tbits >> 29 & 0x3f;
sc 550 dev/usb/udcf.c day_bits = sc->sc_tbits >> 36 & 0x3f;
sc 551 dev/usb/udcf.c wday = (sc->sc_tbits >> 42) & 0x07;
sc 552 dev/usb/udcf.c month_bits = sc->sc_tbits >> 45 & 0x1f;
sc 553 dev/usb/udcf.c year_bits = sc->sc_tbits >> 50 & 0xff;
sc 575 dev/usb/udcf.c sc->sc_sync = 1;
sc 584 dev/usb/udcf.c sc->sc_next = clock_ymdhms_to_secs(&ymdhm);
sc 588 dev/usb/udcf.c sc->sc_next -= z1_bit ? 7200 : 3600;
sc 598 dev/usb/udcf.c if (sc->sc_last) {
sc 599 dev/usb/udcf.c tdiff_recv = sc->sc_next - sc->sc_last;
sc 600 dev/usb/udcf.c tdiff_local = monotime.tv_sec - sc->sc_last_tv.tv_sec;
sc 603 dev/usb/udcf.c if (sc->sc_skew.status == SENSOR_S_UNKNOWN)
sc 604 dev/usb/udcf.c sc->sc_skew.status = SENSOR_S_CRIT;
sc 605 dev/usb/udcf.c sc->sc_skew.value = skew * 1000000000LL;
sc 606 dev/usb/udcf.c getmicrotime(&sc->sc_skew.tv);
sc 615 dev/usb/udcf.c if (sc->sc_nrecv < 2) {
sc 616 dev/usb/udcf.c sc->sc_nrecv++;
sc 618 dev/usb/udcf.c sc->sc_nrecv));
sc 621 dev/usb/udcf.c sc->sc_minute = 1;
sc 626 dev/usb/udcf.c sc->sc_nrecv = 1;
sc 630 dev/usb/udcf.c sc->sc_last = sc->sc_next;
sc 631 dev/usb/udcf.c sc->sc_last_tv.tv_sec = monotime.tv_sec;
sc 634 dev/usb/udcf.c sc->sc_sync = sc->sc_minute = 1;
sc 638 dev/usb/udcf.c timeout_add(&sc->sc_to, t_mgsync); /* re-sync in 450 ms */
sc 639 dev/usb/udcf.c sc->sc_last_mg = time_second;
sc 640 dev/usb/udcf.c sc->sc_tbits = 0LL;
sc 641 dev/usb/udcf.c sc->sc_mask = 1LL;
sc 648 dev/usb/udcf.c struct udcf_softc *sc = xsc;
sc 650 dev/usb/udcf.c if (sc->sc_dying)
sc 654 dev/usb/udcf.c sc->sc_sync = 1;
sc 655 dev/usb/udcf.c timeout_add(&sc->sc_to, t_wait);
sc 656 dev/usb/udcf.c timeout_add(&sc->sc_sl_to, t_wait + t_sl);
sc 663 dev/usb/udcf.c struct udcf_softc *sc = xsc;
sc 665 dev/usb/udcf.c if (sc->sc_dying)
sc 670 dev/usb/udcf.c if (sc->sc_sensor.status == SENSOR_S_OK) {
sc 671 dev/usb/udcf.c sc->sc_sensor.status = SENSOR_S_WARN;
sc 676 dev/usb/udcf.c timeout_add(&sc->sc_it_to, t_crit);
sc 678 dev/usb/udcf.c sc->sc_sensor.status = SENSOR_S_CRIT;
sc 679 dev/usb/udcf.c sc->sc_nrecv = 0;
sc 687 dev/usb/udcf.c struct udcf_softc *sc = xsc;
sc 691 dev/usb/udcf.c if (sc->sc_dying)
sc 694 dev/usb/udcf.c if (usbd_do_request_flags(sc->sc_udev, &sc->sc_req, &data,
sc 701 dev/usb/udcf.c sc->sc_clocktype = data & 0x01 ? 0 : 1;
sc 702 dev/usb/udcf.c DPRINTF(("\nclocktype is %s\n", sc->sc_clocktype ?
sc 709 dev/usb/udcf.c struct udcf_softc *sc = (struct udcf_softc *)self;
sc 715 dev/usb/udcf.c sc->sc_dying = 1;
sc 97 dev/usb/udsbr.c int udsbr_req(struct udsbr_softc *sc, int ureq, int value, int index);
sc 98 dev/usb/udsbr.c void udsbr_start(struct udsbr_softc *sc);
sc 99 dev/usb/udsbr.c void udsbr_stop(struct udsbr_softc *sc);
sc 100 dev/usb/udsbr.c void udsbr_setfreq(struct udsbr_softc *sc, int freq);
sc 101 dev/usb/udsbr.c int udsbr_status(struct udsbr_softc *sc);
sc 139 dev/usb/udsbr.c struct udsbr_softc *sc = (struct udsbr_softc *)self;
sc 145 dev/usb/udsbr.c DPRINTFN(10,("udsbr_attach: sc=%p\n", sc));
sc 148 dev/usb/udsbr.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 154 dev/usb/udsbr.c sc->sc_dev.dv_xname);
sc 158 dev/usb/udsbr.c sc->sc_udev = dev;
sc 160 dev/usb/udsbr.c DPRINTFN(10, ("udsbr_attach: %p\n", sc->sc_udev));
sc 162 dev/usb/udsbr.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 163 dev/usb/udsbr.c &sc->sc_dev);
sc 165 dev/usb/udsbr.c sc->sc_child = radio_attach_mi(&udsbr_hw_if, sc, &sc->sc_dev);
sc 171 dev/usb/udsbr.c struct udsbr_softc *sc = (struct udsbr_softc *)self;
sc 174 dev/usb/udsbr.c if (sc->sc_child != NULL)
sc 175 dev/usb/udsbr.c rv = config_detach(sc->sc_child, flags);
sc 177 dev/usb/udsbr.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 178 dev/usb/udsbr.c &sc->sc_dev);
sc 186 dev/usb/udsbr.c struct udsbr_softc *sc = (struct udsbr_softc *)self;
sc 194 dev/usb/udsbr.c sc->sc_dying = 1;
sc 195 dev/usb/udsbr.c if (sc->sc_child != NULL)
sc 196 dev/usb/udsbr.c rv = config_deactivate(sc->sc_child);
sc 203 dev/usb/udsbr.c udsbr_req(struct udsbr_softc *sc, int ureq, int value, int index)
sc 216 dev/usb/udsbr.c err = usbd_do_request(sc->sc_udev, &req, &data);
sc 218 dev/usb/udsbr.c printf("%s: request failed err=%d\n", sc->sc_dev.dv_xname,
sc 225 dev/usb/udsbr.c udsbr_start(struct udsbr_softc *sc)
sc 227 dev/usb/udsbr.c (void)udsbr_req(sc, 0x00, 0x0000, 0x00c7);
sc 228 dev/usb/udsbr.c (void)udsbr_req(sc, 0x02, 0x0001, 0x0000);
sc 232 dev/usb/udsbr.c udsbr_stop(struct udsbr_softc *sc)
sc 234 dev/usb/udsbr.c (void)udsbr_req(sc, 0x00, 0x0016, 0x001c);
sc 235 dev/usb/udsbr.c (void)udsbr_req(sc, 0x02, 0x0000, 0x0000);
sc 239 dev/usb/udsbr.c udsbr_setfreq(struct udsbr_softc *sc, int freq)
sc 250 dev/usb/udsbr.c (void)udsbr_req(sc, 0x01, (freq >> 8) & 0xff, freq & 0xff);
sc 251 dev/usb/udsbr.c (void)udsbr_req(sc, 0x00, 0x0096, 0x00b7);
sc 252 dev/usb/udsbr.c usbd_delay_ms(sc->sc_udev, 240); /* wait for signal to settle */
sc 256 dev/usb/udsbr.c udsbr_status(struct udsbr_softc *sc)
sc 258 dev/usb/udsbr.c return (udsbr_req(sc, 0x00, 0x0000, 0x0024));
sc 265 dev/usb/udsbr.c struct udsbr_softc *sc = v;
sc 267 dev/usb/udsbr.c ri->mute = sc->sc_mute;
sc 268 dev/usb/udsbr.c ri->volume = sc->sc_vol ? 255 : 0;
sc 272 dev/usb/udsbr.c ri->freq = sc->sc_freq;
sc 273 dev/usb/udsbr.c ri->info = udsbr_status(sc) ? RADIO_INFO_STEREO : 0;
sc 281 dev/usb/udsbr.c struct udsbr_softc *sc = v;
sc 283 dev/usb/udsbr.c sc->sc_mute = ri->mute != 0;
sc 284 dev/usb/udsbr.c sc->sc_vol = ri->volume != 0;
sc 285 dev/usb/udsbr.c sc->sc_freq = ri->freq;
sc 286 dev/usb/udsbr.c udsbr_setfreq(sc, sc->sc_freq);
sc 288 dev/usb/udsbr.c if (sc->sc_mute || sc->sc_vol == 0)
sc 289 dev/usb/udsbr.c udsbr_stop(sc);
sc 291 dev/usb/udsbr.c udsbr_start(sc);
sc 161 dev/usb/ueagle.c struct ueagle_softc *sc = xsc;
sc 163 dev/usb/ueagle.c firmwares[0] = (char *)sc->fw;
sc 166 dev/usb/ueagle.c if (ezload_downloads_and_reset(sc->sc_udev, firmwares) != 0) {
sc 168 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 176 dev/usb/ueagle.c struct ueagle_softc *sc = (struct ueagle_softc *)self;
sc 178 dev/usb/ueagle.c struct ifnet *ifp = &sc->sc_if;
sc 182 dev/usb/ueagle.c sc->sc_udev = uaa->device;
sc 190 dev/usb/ueagle.c sc->fw = ueagle_lookup(uaa->vendor, uaa->product)->fw;
sc 191 dev/usb/ueagle.c if (sc->fw != NULL) {
sc 193 dev/usb/ueagle.c mountroothook_establish(ueagle_attachhook, sc);
sc 195 dev/usb/ueagle.c ueagle_attachhook(sc);
sc 201 dev/usb/ueagle.c devinfop = usbd_devinfo_alloc(sc->sc_udev, 0);
sc 202 dev/usb/ueagle.c printf("%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 205 dev/usb/ueagle.c if (usbd_set_config_no(sc->sc_udev, UEAGLE_CONFIG_NO, 0) != 0) {
sc 207 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 211 dev/usb/ueagle.c if (ueagle_getesi(sc, addr) != 0) {
sc 213 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 218 dev/usb/ueagle.c sc->sc_dev.dv_xname, addr[0], addr[1], addr[2], addr[3],
sc 221 dev/usb/ueagle.c usb_init_task(&sc->sc_swap_task, ueagle_loadpage, sc);
sc 223 dev/usb/ueagle.c ifp->if_softc = sc;
sc 229 dev/usb/ueagle.c memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
sc 241 dev/usb/ueagle.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 242 dev/usb/ueagle.c &sc->sc_dev);
sc 248 dev/usb/ueagle.c struct ueagle_softc *sc = (struct ueagle_softc *)self;
sc 249 dev/usb/ueagle.c struct ifnet *ifp = &sc->sc_if;
sc 251 dev/usb/ueagle.c if (sc->fw != NULL)
sc 254 dev/usb/ueagle.c sc->gone = 1;
sc 258 dev/usb/ueagle.c if (sc->stat_thread != NULL) {
sc 260 dev/usb/ueagle.c sc->sc_dev.dv_xname));
sc 262 dev/usb/ueagle.c tsleep(sc->stat_thread, PZERO, "ueaglestat", 0);
sc 265 dev/usb/ueagle.c sc->sc_dev.dv_xname));
sc 270 dev/usb/ueagle.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 271 dev/usb/ueagle.c &sc->sc_dev);
sc 280 dev/usb/ueagle.c ueagle_getesi(struct ueagle_softc *sc, uint8_t *addr)
sc 287 dev/usb/ueagle.c error = usbd_get_string_desc(sc->sc_udev, UEAGLE_ESISTR, 0, &us, &len);
sc 319 dev/usb/ueagle.c struct ueagle_softc *sc = xsc;
sc 322 dev/usb/ueagle.c uint16_t pageno = sc->pageno;
sc 323 dev/usb/ueagle.c uint16_t ovl = sc->ovl;
sc 330 dev/usb/ueagle.c p = sc->dsp;
sc 335 dev/usb/ueagle.c sc->sc_dev.dv_xname, pageno);
sc 344 dev/usb/ueagle.c p = sc->dsp + pageoffset;
sc 348 dev/usb/ueagle.c sc->sc_dev.dv_xname, blockcount, pageno));
sc 350 dev/usb/ueagle.c if ((xfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) {
sc 352 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 369 dev/usb/ueagle.c usbd_setup_xfer(xfer, sc->pipeh_idma, sc, &bi, sizeof bi, 0,
sc 373 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 378 dev/usb/ueagle.c usbd_setup_xfer(xfer, sc->pipeh_idma, sc, p, blocksize, 0,
sc 382 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 393 dev/usb/ueagle.c ueagle_request(struct ueagle_softc *sc, uint16_t val, uint16_t index,
sc 405 dev/usb/ueagle.c error = usbd_do_request_async(sc->sc_udev, &req, data);
sc 407 dev/usb/ueagle.c printf("%s: could not send request\n", sc->sc_dev.dv_xname);
sc 412 dev/usb/ueagle.c ueagle_dump_cmv(struct ueagle_softc *sc, struct ueagle_cmv *cmv)
sc 429 dev/usb/ueagle.c ueagle_cr(struct ueagle_softc *sc, uint32_t address, uint16_t offset,
sc 439 dev/usb/ueagle.c USETW(cmv.wIndex, sc->index);
sc 446 dev/usb/ueagle.c printf("%s: reading CMV\n", sc->sc_dev.dv_xname);
sc 447 dev/usb/ueagle.c ueagle_dump_cmv(sc, &cmv);
sc 453 dev/usb/ueagle.c ueagle_request(sc, UEAGLE_SETBLOCK, UEAGLE_MPTXSTART, &cmv, sizeof cmv);
sc 456 dev/usb/ueagle.c error = tsleep(UEAGLE_COND_CMV(sc), PZERO, "cmv", 2 * hz);
sc 459 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 464 dev/usb/ueagle.c *data = sc->data;
sc 471 dev/usb/ueagle.c ueagle_cw(struct ueagle_softc *sc, uint32_t address, uint16_t offset,
sc 481 dev/usb/ueagle.c USETW(cmv.wIndex, sc->index);
sc 488 dev/usb/ueagle.c printf("%s: writing CMV\n", sc->sc_dev.dv_xname);
sc 489 dev/usb/ueagle.c ueagle_dump_cmv(sc, &cmv);
sc 495 dev/usb/ueagle.c ueagle_request(sc, UEAGLE_SETBLOCK, UEAGLE_MPTXSTART, &cmv, sizeof cmv);
sc 498 dev/usb/ueagle.c error = tsleep(UEAGLE_COND_CMV(sc), PZERO, "cmv", 2 * hz);
sc 501 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 512 dev/usb/ueagle.c ueagle_stat(struct ueagle_softc *sc)
sc 514 dev/usb/ueagle.c struct ifnet *ifp = &sc->sc_if;
sc 517 dev/usb/ueagle.c #define CR(sc, address, offset, data) do { \
sc 518 dev/usb/ueagle.c if ((error = ueagle_cr(sc, address, offset, data)) != 0) \
sc 522 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_STAT, 0, &sc->stats.phy.status);
sc 523 dev/usb/ueagle.c switch ((sc->stats.phy.status >> 8) & 0xf) {
sc 526 dev/usb/ueagle.c sc->sc_dev.dv_xname));
sc 527 dev/usb/ueagle.c return ueagle_cw(sc, UEAGLE_CMV_CNTL, 0, 2);
sc 530 dev/usb/ueagle.c DPRINTFN(3, ("%s: initializing\n", sc->sc_dev.dv_xname));
sc 531 dev/usb/ueagle.c return ueagle_cw(sc, UEAGLE_CMV_CNTL, 0, 2);
sc 534 dev/usb/ueagle.c DPRINTFN(4, ("%s: operational\n", sc->sc_dev.dv_xname));
sc 539 dev/usb/ueagle.c sc->sc_dev.dv_xname));
sc 544 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_DIAG, 1, &sc->stats.phy.flags);
sc 545 dev/usb/ueagle.c if (sc->stats.phy.flags & 0x10) {
sc 546 dev/usb/ueagle.c DPRINTF(("%s: delineation LOSS\n", sc->sc_dev.dv_xname));
sc 547 dev/usb/ueagle.c sc->stats.phy.status = 0;
sc 552 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_RATE, 0, &data);
sc 553 dev/usb/ueagle.c sc->stats.phy.dsrate = ((data >> 16) & 0x1ff) * 32;
sc 554 dev/usb/ueagle.c sc->stats.phy.usrate = (data & 0xff) * 32;
sc 556 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_DIAG, 23, &data);
sc 557 dev/usb/ueagle.c sc->stats.phy.attenuation = (data & 0xff) / 2;
sc 559 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_DIAG, 3, &sc->stats.atm.cells_crc_errors);
sc 560 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_DIAG, 22, &sc->stats.phy.dserror);
sc 561 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_DIAG, 25, &sc->stats.phy.dsmargin);
sc 562 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_DIAG, 46, &sc->stats.phy.userror);
sc 563 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_DIAG, 49, &sc->stats.phy.usmargin);
sc 564 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_DIAG, 51, &sc->stats.phy.rxflow);
sc 565 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_DIAG, 52, &sc->stats.phy.txflow);
sc 566 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_DIAG, 54, &sc->stats.phy.dsunc);
sc 567 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_DIAG, 58, &sc->stats.phy.usunc);
sc 568 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_INFO, 8, &sc->stats.phy.vidco);
sc 569 dev/usb/ueagle.c CR(sc, UEAGLE_CMV_INFO, 14, &sc->stats.phy.vidcpe);
sc 571 dev/usb/ueagle.c if (sc->pipeh_tx != NULL)
sc 574 dev/usb/ueagle.c return ueagle_open_pipes(sc);
sc 581 dev/usb/ueagle.c struct ueagle_softc *sc = arg;
sc 584 dev/usb/ueagle.c if (ueagle_stat(sc) != 0)
sc 587 dev/usb/ueagle.c usbd_delay_ms(sc->sc_udev, 5000);
sc 590 dev/usb/ueagle.c wakeup(sc->stat_thread);
sc 596 dev/usb/ueagle.c ueagle_boot(struct ueagle_softc *sc)
sc 600 dev/usb/ueagle.c #define CW(sc, address, offset, data) do { \
sc 601 dev/usb/ueagle.c if ((error = ueagle_cw(sc, address, offset, data)) != 0) \
sc 605 dev/usb/ueagle.c ueagle_request(sc, UEAGLE_SETMODE, UEAGLE_BOOTIDMA, NULL, 0);
sc 606 dev/usb/ueagle.c ueagle_request(sc, UEAGLE_SETMODE, UEAGLE_STARTRESET, NULL, 0);
sc 608 dev/usb/ueagle.c usbd_delay_ms(sc->sc_udev, 200);
sc 610 dev/usb/ueagle.c ueagle_request(sc, UEAGLE_SETMODE, UEAGLE_ENDRESET, NULL, 0);
sc 611 dev/usb/ueagle.c ueagle_request(sc, UEAGLE_SET2183DATA, UEAGLE_MPTXMAILBOX, &zero, 2);
sc 612 dev/usb/ueagle.c ueagle_request(sc, UEAGLE_SET2183DATA, UEAGLE_MPRXMAILBOX, &zero, 2);
sc 613 dev/usb/ueagle.c ueagle_request(sc, UEAGLE_SET2183DATA, UEAGLE_SWAPMAILBOX, &zero, 2);
sc 615 dev/usb/ueagle.c usbd_delay_ms(sc->sc_udev, 1000);
sc 617 dev/usb/ueagle.c sc->pageno = 0;
sc 618 dev/usb/ueagle.c sc->ovl = 0;
sc 619 dev/usb/ueagle.c ueagle_loadpage(sc);
sc 622 dev/usb/ueagle.c error = tsleep(UEAGLE_COND_READY(sc), PZERO | PCATCH, "boot", 10 * hz);
sc 625 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 629 dev/usb/ueagle.c CW(sc, UEAGLE_CMV_CNTL, 0, 1);
sc 632 dev/usb/ueagle.c CW(sc, UEAGLE_CMV_OPTN, 0, UEAGLE_OPTN0);
sc 633 dev/usb/ueagle.c CW(sc, UEAGLE_CMV_OPTN, 2, UEAGLE_OPTN2);
sc 634 dev/usb/ueagle.c CW(sc, UEAGLE_CMV_OPTN, 7, UEAGLE_OPTN7);
sc 637 dev/usb/ueagle.c CW(sc, UEAGLE_CMV_CNTL, 0, 2);
sc 639 dev/usb/ueagle.c return kthread_create(ueagle_stat_thread, sc, &sc->stat_thread,
sc 640 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 645 dev/usb/ueagle.c ueagle_swap_intr(struct ueagle_softc *sc, struct ueagle_swap *swap)
sc 648 dev/usb/ueagle.c sc->pageno = swap->bPageNo;
sc 649 dev/usb/ueagle.c sc->ovl = rotbr(swap->bOvl, 4);
sc 651 dev/usb/ueagle.c usb_add_task(sc->sc_udev, &sc->sc_swap_task);
sc 660 dev/usb/ueagle.c ueagle_cmv_intr(struct ueagle_softc *sc, struct ueagle_cmv *cmv)
sc 664 dev/usb/ueagle.c printf("%s: receiving CMV\n", sc->sc_dev.dv_xname);
sc 665 dev/usb/ueagle.c ueagle_dump_cmv(sc, cmv);
sc 671 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 677 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 682 dev/usb/ueagle.c sc->index = UGETW(cmv->wIndex) + 1;
sc 686 dev/usb/ueagle.c wakeup(UEAGLE_COND_READY(sc));
sc 690 dev/usb/ueagle.c sc->data = UGETDATA(cmv->dwData);
sc 693 dev/usb/ueagle.c wakeup(UEAGLE_COND_CMV(sc));
sc 701 dev/usb/ueagle.c struct ueagle_softc *sc = priv;
sc 709 dev/usb/ueagle.c sc->sc_dev.dv_xname, usbd_errstr(status));
sc 712 dev/usb/ueagle.c usbd_clear_endpoint_stall_async(sc->pipeh_intr);
sc 717 dev/usb/ueagle.c intr = (struct ueagle_intr *)sc->ibuf;
sc 720 dev/usb/ueagle.c ueagle_swap_intr(sc, (struct ueagle_swap *)(intr + 1));
sc 724 dev/usb/ueagle.c ueagle_cmv_intr(sc, (struct ueagle_cmv *)(intr + 1));
sc 729 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 801 dev/usb/ueagle.c ueagle_push_cell(struct ueagle_softc *sc, uint8_t *cell)
sc 803 dev/usb/ueagle.c struct ueagle_vcc *vcc = &sc->vcc;
sc 810 dev/usb/ueagle.c sc->stats.atm.cells_received++;
sc 815 dev/usb/ueagle.c sc->stats.atm.vcc_no_conn++;
sc 822 dev/usb/ueagle.c sc->stats.atm.cspdus_dropped++;
sc 825 dev/usb/ueagle.c sc->stats.atm.cells_dropped++;
sc 850 dev/usb/ueagle.c sc->stats.atm.cells_dropped++;
sc 869 dev/usb/ueagle.c sc->stats.atm.cspdus_dropped++;
sc 874 dev/usb/ueagle.c sc->stats.atm.cspdus_dropped++;
sc 880 dev/usb/ueagle.c sc->stats.atm.cspdus_crc_errors++;
sc 885 dev/usb/ueagle.c ifp = &sc->sc_if;
sc 889 dev/usb/ueagle.c sc->stats.atm.cspdus_received++;
sc 916 dev/usb/ueagle.c struct ueagle_softc *sc = req->sc;
sc 929 dev/usb/ueagle.c ueagle_push_cell(sc, p);
sc 936 dev/usb/ueagle.c sc->sc_dev.dv_xname, count);
sc 939 dev/usb/ueagle.c req->frlengths[i] = sc->isize;
sc 942 dev/usb/ueagle.c usbd_setup_isoc_xfer(req->xfer, sc->pipeh_rx, req, req->frlengths,
sc 952 dev/usb/ueagle.c struct ueagle_softc *sc = req->sc;
sc 953 dev/usb/ueagle.c struct ifnet *ifp = &sc->sc_if;
sc 961 dev/usb/ueagle.c sc->sc_dev.dv_xname, usbd_errstr(status));
sc 964 dev/usb/ueagle.c usbd_clear_endpoint_stall_async(sc->pipeh_tx);
sc 983 dev/usb/ueagle.c ueagle_encap(struct ueagle_softc *sc, struct mbuf *m0)
sc 985 dev/usb/ueagle.c struct ueagle_vcc *vcc = &sc->vcc;
sc 993 dev/usb/ueagle.c req = &sc->txreqs[0];
sc 1024 dev/usb/ueagle.c sc->stats.atm.cells_transmitted++;
sc 1033 dev/usb/ueagle.c sc->stats.atm.cells_transmitted++;
sc 1050 dev/usb/ueagle.c sc->stats.atm.cells_transmitted++;
sc 1069 dev/usb/ueagle.c usbd_setup_xfer(req->xfer, sc->pipeh_tx, req, req->buf,
sc 1077 dev/usb/ueagle.c sc->stats.atm.cspdus_transmitted++;
sc 1085 dev/usb/ueagle.c struct ueagle_softc *sc = ifp->if_softc;
sc 1089 dev/usb/ueagle.c if (!(sc->vcc.flags & UEAGLE_VCC_ACTIVE))
sc 1092 dev/usb/ueagle.c if (sc->pipeh_tx == NULL)
sc 1100 dev/usb/ueagle.c if (ueagle_encap(sc, m0) != 0) {
sc 1116 dev/usb/ueagle.c ueagle_open_vcc(struct ueagle_softc *sc, struct atm_pseudoioctl *api)
sc 1118 dev/usb/ueagle.c struct ueagle_vcc *vcc = &sc->vcc;
sc 1120 dev/usb/ueagle.c DPRINTF(("%s: opening ATM VCC\n", sc->sc_dev.dv_xname));
sc 1136 dev/usb/ueagle.c ueagle_close_vcc(struct ueagle_softc *sc, struct atm_pseudoioctl *api)
sc 1138 dev/usb/ueagle.c DPRINTF(("%s: closing ATM VCC\n", sc->sc_dev.dv_xname));
sc 1140 dev/usb/ueagle.c sc->vcc.flags &= ~UEAGLE_VCC_ACTIVE;
sc 1148 dev/usb/ueagle.c struct ueagle_softc *sc = ifp->if_softc;
sc 1188 dev/usb/ueagle.c error = ueagle_open_vcc(sc, api);
sc 1193 dev/usb/ueagle.c error = ueagle_close_vcc(sc, api);
sc 1206 dev/usb/ueagle.c ueagle_open_pipes(struct ueagle_softc *sc)
sc 1216 dev/usb/ueagle.c error = usbd_device2interface_handle(sc->sc_udev, UEAGLE_US_IFACE_NO,
sc 1220 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 1225 dev/usb/ueagle.c &sc->pipeh_tx);
sc 1227 dev/usb/ueagle.c printf("%s: could not open tx pipe\n", sc->sc_dev.dv_xname);
sc 1232 dev/usb/ueagle.c txreq = &sc->txreqs[i];
sc 1234 dev/usb/ueagle.c txreq->sc = sc;
sc 1236 dev/usb/ueagle.c txreq->xfer = usbd_alloc_xfer(sc->sc_udev);
sc 1239 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 1247 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 1253 dev/usb/ueagle.c error = usbd_device2interface_handle(sc->sc_udev, UEAGLE_DS_IFACE_NO,
sc 1257 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 1265 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 1272 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 1277 dev/usb/ueagle.c sc->isize = UGETW(edesc->wMaxPacketSize);
sc 1280 dev/usb/ueagle.c &sc->pipeh_rx);
sc 1282 dev/usb/ueagle.c printf("%s: could not open rx pipe\n", sc->sc_dev.dv_xname);
sc 1287 dev/usb/ueagle.c isoreq = &sc->isoreqs[i];
sc 1289 dev/usb/ueagle.c isoreq->sc = sc;
sc 1291 dev/usb/ueagle.c isoreq->xfer = usbd_alloc_xfer(sc->sc_udev);
sc 1294 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 1300 dev/usb/ueagle.c sc->isize * UEAGLE_NISOFRMS);
sc 1303 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 1309 dev/usb/ueagle.c isoreq->frlengths[j] = sc->isize;
sc 1310 dev/usb/ueagle.c isoreq->offsets[j] = buf + j * sc->isize;
sc 1313 dev/usb/ueagle.c usbd_setup_isoc_xfer(isoreq->xfer, sc->pipeh_rx, isoreq,
sc 1319 dev/usb/ueagle.c ueagle_request(sc, UEAGLE_SETMODE, UEAGLE_LOOPBACKOFF, NULL, 0);
sc 1323 dev/usb/ueagle.c fail: ueagle_close_pipes(sc);
sc 1328 dev/usb/ueagle.c ueagle_close_pipes(struct ueagle_softc *sc)
sc 1332 dev/usb/ueagle.c ueagle_request(sc, UEAGLE_SETMODE, UEAGLE_LOOPBACKON, NULL, 0);
sc 1335 dev/usb/ueagle.c if (sc->pipeh_tx != NULL) {
sc 1336 dev/usb/ueagle.c usbd_abort_pipe(sc->pipeh_tx);
sc 1337 dev/usb/ueagle.c usbd_close_pipe(sc->pipeh_tx);
sc 1338 dev/usb/ueagle.c sc->pipeh_tx = NULL;
sc 1342 dev/usb/ueagle.c if (sc->txreqs[i].xfer != NULL) {
sc 1343 dev/usb/ueagle.c usbd_free_xfer(sc->txreqs[i].xfer);
sc 1344 dev/usb/ueagle.c sc->txreqs[i].xfer = NULL;
sc 1349 dev/usb/ueagle.c if (sc->pipeh_rx != NULL) {
sc 1350 dev/usb/ueagle.c usbd_abort_pipe(sc->pipeh_rx);
sc 1351 dev/usb/ueagle.c usbd_close_pipe(sc->pipeh_rx);
sc 1352 dev/usb/ueagle.c sc->pipeh_rx = NULL;
sc 1356 dev/usb/ueagle.c if (sc->isoreqs[i].xfer != NULL) {
sc 1357 dev/usb/ueagle.c usbd_free_xfer(sc->isoreqs[i].xfer);
sc 1358 dev/usb/ueagle.c sc->isoreqs[i].xfer = NULL;
sc 1366 dev/usb/ueagle.c struct ueagle_softc *sc = ifp->if_softc;
sc 1373 dev/usb/ueagle.c error = usbd_device2interface_handle(sc->sc_udev, UEAGLE_US_IFACE_NO,
sc 1377 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 1382 dev/usb/ueagle.c &sc->pipeh_idma);
sc 1385 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 1389 dev/usb/ueagle.c error = usbd_device2interface_handle(sc->sc_udev, UEAGLE_INTR_IFACE_NO,
sc 1393 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 1397 dev/usb/ueagle.c error = loadfirmware("ueagle-dsp", &sc->dsp, &len);
sc 1399 dev/usb/ueagle.c printf("%s: could not load firmware\n", sc->sc_dev.dv_xname);
sc 1404 dev/usb/ueagle.c &sc->pipeh_intr, sc, sc->ibuf, UEAGLE_INTR_MAXSIZE, ueagle_intr,
sc 1408 dev/usb/ueagle.c sc->sc_dev.dv_xname);
sc 1412 dev/usb/ueagle.c error = ueagle_boot(sc);
sc 1414 dev/usb/ueagle.c printf("%s: could not boot modem\n", sc->sc_dev.dv_xname);
sc 1435 dev/usb/ueagle.c struct ueagle_softc *sc = ifp->if_softc;
sc 1438 dev/usb/ueagle.c usb_rem_task(sc->sc_udev, &sc->sc_swap_task);
sc 1441 dev/usb/ueagle.c ueagle_close_pipes(sc);
sc 1444 dev/usb/ueagle.c if (sc->dsp != NULL) {
sc 1445 dev/usb/ueagle.c free(sc->dsp, M_DEVBUF);
sc 1446 dev/usb/ueagle.c sc->dsp = NULL;
sc 1450 dev/usb/ueagle.c if (sc->pipeh_intr != NULL) {
sc 1451 dev/usb/ueagle.c usbd_abort_pipe(sc->pipeh_intr);
sc 1452 dev/usb/ueagle.c usbd_close_pipe(sc->pipeh_intr);
sc 1453 dev/usb/ueagle.c sc->pipeh_intr = NULL;
sc 1457 dev/usb/ueagle.c if (sc->pipeh_idma != NULL) {
sc 1458 dev/usb/ueagle.c usbd_abort_pipe(sc->pipeh_idma);
sc 1459 dev/usb/ueagle.c usbd_close_pipe(sc->pipeh_idma);
sc 1460 dev/usb/ueagle.c sc->pipeh_idma = NULL;
sc 1464 dev/usb/ueagle.c memset(&sc->stats, 0, sizeof (struct ueagle_stats));
sc 1472 dev/usb/ueagle.c struct ueagle_softc *sc = (struct ueagle_softc *)self;
sc 1479 dev/usb/ueagle.c sc->gone = 1;
sc 110 dev/usb/ueaglevar.h struct ueagle_softc *sc;
sc 117 dev/usb/ueaglevar.h struct ueagle_softc *sc;
sc 154 dev/usb/ueaglevar.h #define UEAGLE_COND_CMV(sc) ((char *)(sc) + 1)
sc 155 dev/usb/ueaglevar.h #define UEAGLE_COND_READY(sc) ((char *)(sc) + 2)
sc 156 dev/usb/ueaglevar.h #define UEAGLE_COND_SYNC(sc) ((char *)(sc) + 3)
sc 108 dev/usb/uftdi.c int uftdi_open(void *sc, int portno);
sc 109 dev/usb/uftdi.c void uftdi_read(void *sc, int portno, u_char **ptr,
sc 111 dev/usb/uftdi.c void uftdi_write(void *sc, int portno, u_char *to, u_char *from,
sc 113 dev/usb/uftdi.c void uftdi_break(void *sc, int portno, int onoff);
sc 206 dev/usb/uftdi.c struct uftdi_softc *sc = (struct uftdi_softc *)self;
sc 213 dev/usb/uftdi.c char *devname = sc->sc_dev.dv_xname;
sc 218 dev/usb/uftdi.c DPRINTFN(10,("\nuftdi_attach: sc=%p\n", sc));
sc 244 dev/usb/uftdi.c sc->sc_udev = dev;
sc 245 dev/usb/uftdi.c sc->sc_iface = iface;
sc 251 dev/usb/uftdi.c sc->sc_type = UFTDI_TYPE_SIO;
sc 252 dev/usb/uftdi.c sc->sc_hdrlen = 1;
sc 277 dev/usb/uftdi.c sc->sc_type = UFTDI_TYPE_8U232AM;
sc 278 dev/usb/uftdi.c sc->sc_hdrlen = 0;
sc 290 dev/usb/uftdi.c sc->sc_type = UFTDI_TYPE_8U232AM;
sc 291 dev/usb/uftdi.c sc->sc_hdrlen = 0;
sc 302 dev/usb/uftdi.c sc->sc_type = UFTDI_TYPE_8U232AM;
sc 303 dev/usb/uftdi.c sc->sc_hdrlen = 0;
sc 314 dev/usb/uftdi.c sc->sc_type = UFTDI_TYPE_8U232AM;
sc 315 dev/usb/uftdi.c sc->sc_hdrlen = 0;
sc 326 dev/usb/uftdi.c sc->sc_type = UFTDI_TYPE_8U232AM;
sc 327 dev/usb/uftdi.c sc->sc_hdrlen = 0;
sc 360 dev/usb/uftdi.c sc->sc_dev.dv_xname);
sc 365 dev/usb/uftdi.c sc->sc_dev.dv_xname);
sc 375 dev/usb/uftdi.c uca.obufsize = UFTDIOBUFSIZE - sc->sc_hdrlen;
sc 377 dev/usb/uftdi.c uca.opkthdrlen = sc->sc_hdrlen;
sc 381 dev/usb/uftdi.c uca.arg = sc;
sc 384 dev/usb/uftdi.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 385 dev/usb/uftdi.c &sc->sc_dev);
sc 388 dev/usb/uftdi.c sc->sc_subdev = config_found_sm(self, &uca, ucomprint, ucomsubmatch);
sc 394 dev/usb/uftdi.c sc->sc_dying = 1;
sc 400 dev/usb/uftdi.c struct uftdi_softc *sc = (struct uftdi_softc *)self;
sc 408 dev/usb/uftdi.c if (sc->sc_subdev != NULL)
sc 409 dev/usb/uftdi.c rv = config_deactivate(sc->sc_subdev);
sc 410 dev/usb/uftdi.c sc->sc_dying = 1;
sc 419 dev/usb/uftdi.c struct uftdi_softc *sc = (struct uftdi_softc *)self;
sc 421 dev/usb/uftdi.c DPRINTF(("uftdi_detach: sc=%p flags=%d\n", sc, flags));
sc 422 dev/usb/uftdi.c sc->sc_dying = 1;
sc 423 dev/usb/uftdi.c if (sc->sc_subdev != NULL) {
sc 424 dev/usb/uftdi.c config_detach(sc->sc_subdev, flags);
sc 425 dev/usb/uftdi.c sc->sc_subdev = NULL;
sc 428 dev/usb/uftdi.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 429 dev/usb/uftdi.c &sc->sc_dev);
sc 437 dev/usb/uftdi.c struct uftdi_softc *sc = vsc;
sc 442 dev/usb/uftdi.c DPRINTF(("uftdi_open: sc=%p\n", sc));
sc 444 dev/usb/uftdi.c if (sc->sc_dying)
sc 453 dev/usb/uftdi.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 460 dev/usb/uftdi.c (void)uftdi_param(sc, portno, &t);
sc 468 dev/usb/uftdi.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 478 dev/usb/uftdi.c struct uftdi_softc *sc = vsc;
sc 481 dev/usb/uftdi.c DPRINTFN(15,("uftdi_read: sc=%p, port=%d count=%d\n", sc, portno,
sc 490 dev/usb/uftdi.c "0x%02x\n", sc, portno, *count, (*ptr)[2]));
sc 493 dev/usb/uftdi.c if (sc->sc_msr != msr ||
sc 494 dev/usb/uftdi.c (sc->sc_lsr & FTDI_LSR_MASK) != (lsr & FTDI_LSR_MASK)) {
sc 496 dev/usb/uftdi.c "lsr=0x%02x(0x%02x)\n", msr, sc->sc_msr,
sc 497 dev/usb/uftdi.c lsr, sc->sc_lsr));
sc 498 dev/usb/uftdi.c sc->sc_msr = msr;
sc 499 dev/usb/uftdi.c sc->sc_lsr = lsr;
sc 500 dev/usb/uftdi.c ucom_status_change((struct ucom_softc *)sc->sc_subdev);
sc 511 dev/usb/uftdi.c struct uftdi_softc *sc = vsc;
sc 517 dev/usb/uftdi.c if (sc->sc_hdrlen > 0)
sc 520 dev/usb/uftdi.c memcpy(to + sc->sc_hdrlen, from, *count);
sc 521 dev/usb/uftdi.c *count += sc->sc_hdrlen;
sc 527 dev/usb/uftdi.c struct uftdi_softc *sc = vsc;
sc 542 dev/usb/uftdi.c uftdi_break(sc, portno, onoff);
sc 555 dev/usb/uftdi.c (void)usbd_do_request(sc->sc_udev, &req, NULL);
sc 561 dev/usb/uftdi.c struct uftdi_softc *sc = vsc;
sc 566 dev/usb/uftdi.c DPRINTF(("uftdi_param: sc=%p\n", sc));
sc 568 dev/usb/uftdi.c if (sc->sc_dying)
sc 571 dev/usb/uftdi.c switch (sc->sc_type) {
sc 602 dev/usb/uftdi.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 631 dev/usb/uftdi.c sc->last_lcr = data;
sc 641 dev/usb/uftdi.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 659 dev/usb/uftdi.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 669 dev/usb/uftdi.c struct uftdi_softc *sc = vsc;
sc 672 dev/usb/uftdi.c sc->sc_msr, sc->sc_lsr));
sc 675 dev/usb/uftdi.c *msr = sc->sc_msr;
sc 677 dev/usb/uftdi.c *lsr = sc->sc_lsr;
sc 683 dev/usb/uftdi.c struct uftdi_softc *sc = vsc;
sc 691 dev/usb/uftdi.c data = sc->last_lcr | FTDI_SIO_SET_BREAK;
sc 693 dev/usb/uftdi.c data = sc->last_lcr;
sc 701 dev/usb/uftdi.c (void)usbd_do_request(sc->sc_udev, &req, NULL);
sc 80 dev/usb/ugen.c struct ugen_softc *sc;
sc 123 dev/usb/ugen.c int ugen_set_config(struct ugen_softc *sc, int configno);
sc 124 dev/usb/ugen.c usb_config_descriptor_t *ugen_get_cdesc(struct ugen_softc *sc,
sc 127 dev/usb/ugen.c int ugen_get_alt_index(struct ugen_softc *sc, int ifaceidx);
sc 179 dev/usb/ugen.c struct ugen_softc *sc = (struct ugen_softc *)self;
sc 187 dev/usb/ugen.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 190 dev/usb/ugen.c sc->sc_udev = udev = uaa->device;
sc 196 dev/usb/ugen.c sc->sc_dev.dv_xname);
sc 197 dev/usb/ugen.c sc->sc_dying = 1;
sc 203 dev/usb/ugen.c err = ugen_set_config(sc, conf);
sc 206 dev/usb/ugen.c sc->sc_dev.dv_xname, conf);
sc 207 dev/usb/ugen.c sc->sc_dying = 1;
sc 211 dev/usb/ugen.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 212 dev/usb/ugen.c &sc->sc_dev);
sc 216 dev/usb/ugen.c ugen_set_config(struct ugen_softc *sc, int configno)
sc 218 dev/usb/ugen.c usbd_device_handle dev = sc->sc_udev;
sc 228 dev/usb/ugen.c sc->sc_dev.dv_xname, configno, sc));
sc 235 dev/usb/ugen.c if (sc->sc_is_open[endptno]) {
sc 238 dev/usb/ugen.c sc->sc_dev.dv_xname, endptno));
sc 252 dev/usb/ugen.c memset(sc->sc_endpoints, 0, sizeof sc->sc_endpoints);
sc 265 dev/usb/ugen.c sce = &sc->sc_endpoints[UE_GET_ADDR(endpt)][dir];
sc 270 dev/usb/ugen.c sce->sc = sc;
sc 281 dev/usb/ugen.c struct ugen_softc *sc;
sc 294 dev/usb/ugen.c sc = ugen_cd.cd_devs[unit];
sc 295 dev/usb/ugen.c if (sc == NULL)
sc 301 dev/usb/ugen.c if (sc == NULL || sc->sc_dying)
sc 304 dev/usb/ugen.c if (sc->sc_is_open[endpt])
sc 308 dev/usb/ugen.c sc->sc_is_open[USB_CONTROL_ENDPOINT] = 1;
sc 315 dev/usb/ugen.c sce = &sc->sc_endpoints[endpt][dir];
sc 326 dev/usb/ugen.c sce = &sc->sc_endpoints[endpt][dir];
sc 330 dev/usb/ugen.c sc, endpt, dir, sce));
sc 387 dev/usb/ugen.c xfer = usbd_alloc_xfer(sc->sc_udev);
sc 418 dev/usb/ugen.c sc->sc_is_open[endpt] = 1;
sc 426 dev/usb/ugen.c struct ugen_softc *sc;
sc 431 dev/usb/ugen.c sc = ugen_cd.cd_devs[UGENUNIT(dev)];
sc 437 dev/usb/ugen.c if (!sc->sc_is_open[endpt]) {
sc 445 dev/usb/ugen.c sc->sc_is_open[endpt] = 0;
sc 452 dev/usb/ugen.c sce = &sc->sc_endpoints[endpt][dir];
sc 481 dev/usb/ugen.c sc->sc_is_open[endpt] = 0;
sc 487 dev/usb/ugen.c ugen_do_read(struct ugen_softc *sc, int endpt, struct uio *uio, int flag)
sc 489 dev/usb/ugen.c struct ugen_endpoint *sce = &sc->sc_endpoints[endpt][IN];
sc 498 dev/usb/ugen.c DPRINTFN(5, ("%s: ugenread: %d\n", sc->sc_dev.dv_xname, endpt));
sc 500 dev/usb/ugen.c if (sc->sc_dying)
sc 531 dev/usb/ugen.c if (sc->sc_dying)
sc 561 dev/usb/ugen.c xfer = usbd_alloc_xfer(sc->sc_udev);
sc 599 dev/usb/ugen.c if (sc->sc_dying)
sc 637 dev/usb/ugen.c struct ugen_softc *sc;
sc 640 dev/usb/ugen.c sc = ugen_cd.cd_devs[UGENUNIT(dev)];
sc 642 dev/usb/ugen.c sc->sc_refcnt++;
sc 643 dev/usb/ugen.c error = ugen_do_read(sc, endpt, uio, flag);
sc 644 dev/usb/ugen.c if (--sc->sc_refcnt < 0)
sc 645 dev/usb/ugen.c usb_detach_wakeup(&sc->sc_dev);
sc 650 dev/usb/ugen.c ugen_do_write(struct ugen_softc *sc, int endpt, struct uio *uio, int flag)
sc 652 dev/usb/ugen.c struct ugen_endpoint *sce = &sc->sc_endpoints[endpt][OUT];
sc 659 dev/usb/ugen.c DPRINTFN(5, ("%s: ugenwrite: %d\n", sc->sc_dev.dv_xname, endpt));
sc 661 dev/usb/ugen.c if (sc->sc_dying)
sc 680 dev/usb/ugen.c xfer = usbd_alloc_xfer(sc->sc_udev);
sc 703 dev/usb/ugen.c xfer = usbd_alloc_xfer(sc->sc_udev);
sc 736 dev/usb/ugen.c struct ugen_softc *sc;
sc 739 dev/usb/ugen.c sc = ugen_cd.cd_devs[UGENUNIT(dev)];
sc 741 dev/usb/ugen.c sc->sc_refcnt++;
sc 742 dev/usb/ugen.c error = ugen_do_write(sc, endpt, uio, flag);
sc 743 dev/usb/ugen.c if (--sc->sc_refcnt < 0)
sc 744 dev/usb/ugen.c usb_detach_wakeup(&sc->sc_dev);
sc 751 dev/usb/ugen.c struct ugen_softc *sc = (struct ugen_softc *)self;
sc 758 dev/usb/ugen.c sc->sc_dying = 1;
sc 767 dev/usb/ugen.c struct ugen_softc *sc = (struct ugen_softc *)self;
sc 773 dev/usb/ugen.c DPRINTF(("ugen_detach: sc=%p flags=%d\n", sc, flags));
sc 775 dev/usb/ugen.c sc->sc_dying = 1;
sc 779 dev/usb/ugen.c sce = &sc->sc_endpoints[i][dir];
sc 786 dev/usb/ugen.c if (--sc->sc_refcnt >= 0) {
sc 789 dev/usb/ugen.c wakeup(&sc->sc_endpoints[i][IN]);
sc 791 dev/usb/ugen.c usb_detach_wait(&sc->sc_dev);
sc 804 dev/usb/ugen.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 805 dev/usb/ugen.c &sc->sc_dev);
sc 906 dev/usb/ugen.c ugen_set_interface(struct ugen_softc *sc, int ifaceidx, int altno)
sc 917 dev/usb/ugen.c err = usbd_interface_count(sc->sc_udev, &niface);
sc 923 dev/usb/ugen.c err = usbd_device2interface_handle(sc->sc_udev, ifaceidx, &iface);
sc 934 dev/usb/ugen.c sce = &sc->sc_endpoints[UE_GET_ADDR(endpt)][dir];
sc 935 dev/usb/ugen.c sce->sc = 0;
sc 952 dev/usb/ugen.c sce = &sc->sc_endpoints[UE_GET_ADDR(endpt)][dir];
sc 953 dev/usb/ugen.c sce->sc = sc;
sc 962 dev/usb/ugen.c ugen_get_cdesc(struct ugen_softc *sc, int index, int *lenp)
sc 969 dev/usb/ugen.c tdesc = usbd_get_config_descriptor(sc->sc_udev);
sc 977 dev/usb/ugen.c err = usbd_get_config_desc(sc->sc_udev, index, &cdescr);
sc 985 dev/usb/ugen.c err = usbd_get_config_desc_full(sc->sc_udev, index, cdesc,
sc 996 dev/usb/ugen.c ugen_get_alt_index(struct ugen_softc *sc, int ifaceidx)
sc 1001 dev/usb/ugen.c err = usbd_device2interface_handle(sc->sc_udev, ifaceidx, &iface);
sc 1008 dev/usb/ugen.c ugen_do_ioctl(struct ugen_softc *sc, int endpt, u_long cmd,
sc 1025 dev/usb/ugen.c if (sc->sc_dying)
sc 1036 dev/usb/ugen.c sce = &sc->sc_endpoints[endpt][IN];
sc 1045 dev/usb/ugen.c sce = &sc->sc_endpoints[endpt][IN];
sc 1068 dev/usb/ugen.c err = usbd_get_config(sc->sc_udev, &conf);
sc 1076 dev/usb/ugen.c err = ugen_set_config(sc, *(int *)addr);
sc 1088 dev/usb/ugen.c err = usbd_device2interface_handle(sc->sc_udev,
sc 1101 dev/usb/ugen.c err = usbd_device2interface_handle(sc->sc_udev,
sc 1105 dev/usb/ugen.c err = ugen_set_interface(sc, ai->uai_interface_index,
sc 1112 dev/usb/ugen.c cdesc = ugen_get_cdesc(sc, ai->uai_config_index, 0);
sc 1126 dev/usb/ugen.c *usbd_get_device_descriptor(sc->sc_udev);
sc 1130 dev/usb/ugen.c cdesc = ugen_get_cdesc(sc, cd->ucd_config_index, 0);
sc 1138 dev/usb/ugen.c cdesc = ugen_get_cdesc(sc, id->uid_config_index, 0);
sc 1143 dev/usb/ugen.c alt = ugen_get_alt_index(sc, id->uid_interface_index);
sc 1156 dev/usb/ugen.c cdesc = ugen_get_cdesc(sc, ed->ued_config_index, 0);
sc 1161 dev/usb/ugen.c alt = ugen_get_alt_index(sc, ed->ued_interface_index);
sc 1181 dev/usb/ugen.c cdesc = ugen_get_cdesc(sc, fd->ufd_config_index, &len);
sc 1201 dev/usb/ugen.c err = usbd_get_string_desc(sc->sc_udev, si->usd_string_index,
sc 1249 dev/usb/ugen.c sce = &sc->sc_endpoints[endpt][IN];
sc 1250 dev/usb/ugen.c err = usbd_do_request_flags(sc->sc_udev, &ur->ucr_request,
sc 1269 dev/usb/ugen.c usbd_fill_deviceinfo(sc->sc_udev,
sc 1282 dev/usb/ugen.c struct ugen_softc *sc;
sc 1285 dev/usb/ugen.c sc = ugen_cd.cd_devs[UGENUNIT(dev)];
sc 1287 dev/usb/ugen.c sc->sc_refcnt++;
sc 1288 dev/usb/ugen.c error = ugen_do_ioctl(sc, endpt, cmd, addr, flag, p);
sc 1289 dev/usb/ugen.c if (--sc->sc_refcnt < 0)
sc 1290 dev/usb/ugen.c usb_detach_wakeup(&sc->sc_dev);
sc 1297 dev/usb/ugen.c struct ugen_softc *sc;
sc 1302 dev/usb/ugen.c sc = ugen_cd.cd_devs[UGENUNIT(dev)];
sc 1304 dev/usb/ugen.c if (sc->sc_dying)
sc 1308 dev/usb/ugen.c sce = &sc->sc_endpoints[UGENENDPOINT(dev)][IN];
sc 1409 dev/usb/ugen.c struct ugen_softc *sc;
sc 1414 dev/usb/ugen.c sc = ugen_cd.cd_devs[UGENUNIT(dev)];
sc 1416 dev/usb/ugen.c if (sc->sc_dying)
sc 1420 dev/usb/ugen.c sce = &sc->sc_endpoints[UGENENDPOINT(dev)][IN];
sc 172 dev/usb/uhci.c void uhci_add_loop(uhci_softc_t *sc);
sc 173 dev/usb/uhci.c void uhci_rem_loop(uhci_softc_t *sc);
sc 228 dev/usb/uhci.c usbd_status uhci_device_setintr(uhci_softc_t *sc,
sc 248 dev/usb/uhci.c #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
sc 250 dev/usb/uhci.c #define UWRITE1(sc, r, x) \
sc 251 dev/usb/uhci.c do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
sc 253 dev/usb/uhci.c #define UWRITE2(sc, r, x) \
sc 254 dev/usb/uhci.c do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
sc 256 dev/usb/uhci.c #define UWRITE4(sc, r, x) \
sc 257 dev/usb/uhci.c do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
sc 259 dev/usb/uhci.c #define UREAD1(sc, r) (UBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
sc 260 dev/usb/uhci.c #define UREAD2(sc, r) (UBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
sc 261 dev/usb/uhci.c #define UREAD4(sc, r) (UBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
sc 263 dev/usb/uhci.c #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
sc 264 dev/usb/uhci.c #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
sc 268 dev/usb/uhci.c #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
sc 336 dev/usb/uhci.c #define uhci_add_intr_info(sc, ii) \
sc 337 dev/usb/uhci.c LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
sc 362 dev/usb/uhci.c uhci_globalreset(uhci_softc_t *sc)
sc 364 dev/usb/uhci.c UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
sc 365 dev/usb/uhci.c usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
sc 366 dev/usb/uhci.c UHCICMD(sc, 0); /* do nothing */
sc 370 dev/usb/uhci.c uhci_init(uhci_softc_t *sc)
sc 380 dev/usb/uhci.c thesc = sc;
sc 383 dev/usb/uhci.c uhci_dumpregs(sc);
sc 387 dev/usb/uhci.c sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
sc 389 dev/usb/uhci.c UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
sc 390 dev/usb/uhci.c uhci_globalreset(sc); /* reset the controller */
sc 391 dev/usb/uhci.c uhci_reset(sc);
sc 394 dev/usb/uhci.c UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
sc 397 dev/usb/uhci.c err = usb_allocmem(&sc->sc_bus,
sc 399 dev/usb/uhci.c UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
sc 402 dev/usb/uhci.c sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
sc 403 dev/usb/uhci.c UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
sc 404 dev/usb/uhci.c UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
sc 411 dev/usb/uhci.c std = uhci_alloc_std(sc);
sc 421 dev/usb/uhci.c lsqh = uhci_alloc_sqh(sc);
sc 428 dev/usb/uhci.c sc->sc_last_qh = lsqh;
sc 431 dev/usb/uhci.c bsqh = uhci_alloc_sqh(sc);
sc 438 dev/usb/uhci.c sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
sc 441 dev/usb/uhci.c chsqh = uhci_alloc_sqh(sc);
sc 448 dev/usb/uhci.c sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
sc 451 dev/usb/uhci.c clsqh = uhci_alloc_sqh(sc);
sc 458 dev/usb/uhci.c sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
sc 466 dev/usb/uhci.c std = uhci_alloc_std(sc);
sc 467 dev/usb/uhci.c sqh = uhci_alloc_sqh(sc);
sc 479 dev/usb/uhci.c sc->sc_vframes[i].htd = std;
sc 480 dev/usb/uhci.c sc->sc_vframes[i].etd = std;
sc 481 dev/usb/uhci.c sc->sc_vframes[i].hqh = sqh;
sc 482 dev/usb/uhci.c sc->sc_vframes[i].eqh = sqh;
sc 486 dev/usb/uhci.c sc->sc_pframes[j] = htole32(std->physaddr);
sc 489 dev/usb/uhci.c LIST_INIT(&sc->sc_intrhead);
sc 491 dev/usb/uhci.c SIMPLEQ_INIT(&sc->sc_free_xfers);
sc 493 dev/usb/uhci.c timeout_set(&sc->sc_poll_handle, NULL, NULL);
sc 496 dev/usb/uhci.c sc->sc_bus.methods = &uhci_bus_methods;
sc 497 dev/usb/uhci.c sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
sc 499 dev/usb/uhci.c sc->sc_suspend = PWR_RESUME;
sc 500 dev/usb/uhci.c sc->sc_powerhook = powerhook_establish(uhci_power, sc);
sc 501 dev/usb/uhci.c sc->sc_shutdownhook = shutdownhook_establish(uhci_shutdown, sc);
sc 503 dev/usb/uhci.c UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
sc 506 dev/usb/uhci.c UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
sc 509 dev/usb/uhci.c return (uhci_run(sc, 1)); /* and here we go... */
sc 515 dev/usb/uhci.c struct uhci_softc *sc = (struct uhci_softc *)self;
sc 523 dev/usb/uhci.c if (sc->sc_child != NULL)
sc 524 dev/usb/uhci.c rv = config_deactivate(sc->sc_child);
sc 531 dev/usb/uhci.c uhci_detach(struct uhci_softc *sc, int flags)
sc 536 dev/usb/uhci.c if (sc->sc_child != NULL)
sc 537 dev/usb/uhci.c rv = config_detach(sc->sc_child, flags);
sc 542 dev/usb/uhci.c if (sc->sc_powerhook != NULL)
sc 543 dev/usb/uhci.c powerhook_disestablish(sc->sc_powerhook);
sc 544 dev/usb/uhci.c if (sc->sc_shutdownhook != NULL)
sc 545 dev/usb/uhci.c shutdownhook_disestablish(sc->sc_shutdownhook);
sc 549 dev/usb/uhci.c xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
sc 552 dev/usb/uhci.c SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
sc 564 dev/usb/uhci.c struct uhci_softc *sc = (struct uhci_softc *)bus;
sc 585 dev/usb/uhci.c stds[i] = uhci_alloc_std(sc);
sc 588 dev/usb/uhci.c uhci_free_std(sc, stds[i]);
sc 592 dev/usb/uhci.c return (usb_allocmem(&sc->sc_bus, size, 0, dma));
sc 604 dev/usb/uhci.c struct uhci_softc *sc = (struct uhci_softc *)bus;
sc 607 dev/usb/uhci.c xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
sc 609 dev/usb/uhci.c SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
sc 621 dev/usb/uhci.c UXFER(xfer)->iinfo.sc = sc;
sc 633 dev/usb/uhci.c struct uhci_softc *sc = (struct uhci_softc *)bus;
sc 647 dev/usb/uhci.c SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
sc 656 dev/usb/uhci.c uhci_softc_t *sc = v;
sc 659 dev/usb/uhci.c uhci_run(sc, 0); /* stop the controller */
sc 672 dev/usb/uhci.c uhci_softc_t *sc = v;
sc 677 dev/usb/uhci.c cmd = UREAD2(sc, UHCI_CMD);
sc 680 dev/usb/uhci.c sc, why, sc->sc_suspend, cmd));
sc 687 dev/usb/uhci.c uhci_dumpregs(sc);
sc 689 dev/usb/uhci.c if (sc->sc_intr_xfer != NULL)
sc 690 dev/usb/uhci.c timeout_del(&sc->sc_poll_handle);
sc 691 dev/usb/uhci.c sc->sc_bus.use_polling++;
sc 692 dev/usb/uhci.c uhci_run(sc, 0); /* stop the controller */
sc 695 dev/usb/uhci.c sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
sc 697 dev/usb/uhci.c UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
sc 699 dev/usb/uhci.c UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter global suspend */
sc 700 dev/usb/uhci.c usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
sc 701 dev/usb/uhci.c sc->sc_suspend = why;
sc 702 dev/usb/uhci.c sc->sc_bus.use_polling--;
sc 703 dev/usb/uhci.c DPRINTF(("uhci_power: cmd=0x%x\n", UREAD2(sc, UHCI_CMD)));
sc 707 dev/usb/uhci.c if (sc->sc_suspend == PWR_RESUME)
sc 710 dev/usb/uhci.c sc->sc_bus.use_polling++;
sc 711 dev/usb/uhci.c sc->sc_suspend = why;
sc 713 dev/usb/uhci.c uhci_run(sc, 0); /* in case BIOS has started it */
sc 716 dev/usb/uhci.c UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
sc 717 dev/usb/uhci.c UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
sc 718 dev/usb/uhci.c UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
sc 720 dev/usb/uhci.c UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force global resume */
sc 721 dev/usb/uhci.c usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
sc 722 dev/usb/uhci.c UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
sc 723 dev/usb/uhci.c UHCICMD(sc, UHCI_CMD_MAXP);
sc 724 dev/usb/uhci.c UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
sc 726 dev/usb/uhci.c uhci_run(sc, 1); /* and start traffic again */
sc 727 dev/usb/uhci.c usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
sc 728 dev/usb/uhci.c sc->sc_bus.use_polling--;
sc 729 dev/usb/uhci.c if (sc->sc_intr_xfer != NULL) {
sc 730 dev/usb/uhci.c timeout_del(&sc->sc_poll_handle);
sc 731 dev/usb/uhci.c timeout_set(&sc->sc_poll_handle, uhci_poll_hub,
sc 732 dev/usb/uhci.c sc->sc_intr_xfer);
sc 733 dev/usb/uhci.c timeout_add(&sc->sc_poll_handle, sc->sc_ival);
sc 737 dev/usb/uhci.c uhci_dumpregs(sc);
sc 746 dev/usb/uhci.c uhci_dumpregs(uhci_softc_t *sc)
sc 750 dev/usb/uhci.c sc->sc_bus.bdev.dv_xname,
sc 751 dev/usb/uhci.c UREAD2(sc, UHCI_CMD),
sc 752 dev/usb/uhci.c UREAD2(sc, UHCI_STS),
sc 753 dev/usb/uhci.c UREAD2(sc, UHCI_INTR),
sc 754 dev/usb/uhci.c UREAD2(sc, UHCI_FRNUM),
sc 755 dev/usb/uhci.c UREAD4(sc, UHCI_FLBASEADDR),
sc 756 dev/usb/uhci.c UREAD1(sc, UHCI_SOF),
sc 757 dev/usb/uhci.c UREAD2(sc, UHCI_PORTSC1),
sc 758 dev/usb/uhci.c UREAD2(sc, UHCI_PORTSC2)));
sc 808 dev/usb/uhci.c uhci_dump_all(uhci_softc_t *sc)
sc 810 dev/usb/uhci.c uhci_dumpregs(sc);
sc 811 dev/usb/uhci.c printf("intrs=%d\n", sc->sc_bus.no_intrs);
sc 813 dev/usb/uhci.c uhci_dump_qh(sc->sc_lctl_start);
sc 915 dev/usb/uhci.c void uhci_dump_iis(struct uhci_softc *sc);
sc 917 dev/usb/uhci.c uhci_dump_iis(struct uhci_softc *sc)
sc 922 dev/usb/uhci.c for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
sc 940 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
sc 946 dev/usb/uhci.c timeout_del(&sc->sc_poll_handle);
sc 947 dev/usb/uhci.c timeout_set(&sc->sc_poll_handle, uhci_poll_hub, xfer);
sc 948 dev/usb/uhci.c timeout_add(&sc->sc_poll_handle, sc->sc_ival);
sc 952 dev/usb/uhci.c if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
sc 954 dev/usb/uhci.c if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
sc 986 dev/usb/uhci.c uhci_add_loop(uhci_softc_t *sc) {
sc 991 dev/usb/uhci.c if (++sc->sc_loops == 1) {
sc 994 dev/usb/uhci.c sc->sc_last_qh->qh.qh_hlink =
sc 995 dev/usb/uhci.c htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
sc 1000 dev/usb/uhci.c uhci_rem_loop(uhci_softc_t *sc) {
sc 1005 dev/usb/uhci.c if (--sc->sc_loops == 0) {
sc 1007 dev/usb/uhci.c sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
sc 1013 dev/usb/uhci.c uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
sc 1020 dev/usb/uhci.c eqh = sc->sc_hctl_end;
sc 1025 dev/usb/uhci.c sc->sc_hctl_end = sqh;
sc 1027 dev/usb/uhci.c uhci_add_loop(sc);
sc 1033 dev/usb/uhci.c uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
sc 1041 dev/usb/uhci.c uhci_rem_loop(sc);
sc 1056 dev/usb/uhci.c pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
sc 1060 dev/usb/uhci.c if (sc->sc_hctl_end == sqh)
sc 1061 dev/usb/uhci.c sc->sc_hctl_end = pqh;
sc 1066 dev/usb/uhci.c uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
sc 1073 dev/usb/uhci.c eqh = sc->sc_lctl_end;
sc 1078 dev/usb/uhci.c sc->sc_lctl_end = sqh;
sc 1083 dev/usb/uhci.c uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
sc 1095 dev/usb/uhci.c pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
sc 1099 dev/usb/uhci.c if (sc->sc_lctl_end == sqh)
sc 1100 dev/usb/uhci.c sc->sc_lctl_end = pqh;
sc 1105 dev/usb/uhci.c uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
sc 1112 dev/usb/uhci.c eqh = sc->sc_bulk_end;
sc 1117 dev/usb/uhci.c sc->sc_bulk_end = sqh;
sc 1118 dev/usb/uhci.c uhci_add_loop(sc);
sc 1123 dev/usb/uhci.c uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
sc 1130 dev/usb/uhci.c uhci_rem_loop(sc);
sc 1136 dev/usb/uhci.c pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
sc 1140 dev/usb/uhci.c if (sc->sc_bulk_end == sqh)
sc 1141 dev/usb/uhci.c sc->sc_bulk_end = pqh;
sc 1149 dev/usb/uhci.c uhci_softc_t *sc = arg;
sc 1151 dev/usb/uhci.c if (sc->sc_dying)
sc 1154 dev/usb/uhci.c if (sc->sc_bus.use_polling) {
sc 1160 dev/usb/uhci.c return (uhci_intr1(sc));
sc 1164 dev/usb/uhci.c uhci_intr1(uhci_softc_t *sc)
sc 1169 dev/usb/uhci.c status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
sc 1175 dev/usb/uhci.c DPRINTF(("%s: uhci_intr1\n", sc->sc_bus.bdev.dv_xname));
sc 1176 dev/usb/uhci.c uhci_dumpregs(sc);
sc 1180 dev/usb/uhci.c if (sc->sc_suspend != PWR_RESUME) {
sc 1182 dev/usb/uhci.c sc->sc_bus.bdev.dv_xname);
sc 1183 dev/usb/uhci.c UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
sc 1195 dev/usb/uhci.c printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname);
sc 1200 dev/usb/uhci.c printf("%s: host system error\n", sc->sc_bus.bdev.dv_xname);
sc 1205 dev/usb/uhci.c sc->sc_bus.bdev.dv_xname);
sc 1209 dev/usb/uhci.c if (!sc->sc_dying) {
sc 1211 dev/usb/uhci.c sc->sc_bus.bdev.dv_xname);
sc 1213 dev/usb/uhci.c uhci_dump_all(sc);
sc 1216 dev/usb/uhci.c sc->sc_dying = 1;
sc 1221 dev/usb/uhci.c UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
sc 1223 dev/usb/uhci.c sc->sc_bus.no_intrs++;
sc 1224 dev/usb/uhci.c usb_schedsoftintr(&sc->sc_bus);
sc 1226 dev/usb/uhci.c DPRINTFN(15, ("%s: uhci_intr: exit\n", sc->sc_bus.bdev.dv_xname));
sc 1234 dev/usb/uhci.c uhci_softc_t *sc = v;
sc 1237 dev/usb/uhci.c DPRINTFN(10,("%s: uhci_softintr (%d)\n", sc->sc_bus.bdev.dv_xname,
sc 1238 dev/usb/uhci.c sc->sc_bus.intr_context));
sc 1240 dev/usb/uhci.c sc->sc_bus.intr_context++;
sc 1253 dev/usb/uhci.c for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
sc 1255 dev/usb/uhci.c uhci_check_intr(sc, ii);
sc 1259 dev/usb/uhci.c if (sc->sc_softwake) {
sc 1260 dev/usb/uhci.c sc->sc_softwake = 0;
sc 1261 dev/usb/uhci.c wakeup(&sc->sc_softwake);
sc 1265 dev/usb/uhci.c sc->sc_bus.intr_context--;
sc 1270 dev/usb/uhci.c uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
sc 1463 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
sc 1467 dev/usb/uhci.c if (sc->sc_dying) {
sc 1497 dev/usb/uhci.c uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
sc 1506 dev/usb/uhci.c usb_delay_ms(&sc->sc_bus, 1);
sc 1507 dev/usb/uhci.c DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
sc 1508 dev/usb/uhci.c if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS) {
sc 1509 dev/usb/uhci.c uhci_intr1(sc);
sc 1517 dev/usb/uhci.c for (ii = LIST_FIRST(&sc->sc_intrhead);
sc 1531 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)bus;
sc 1533 dev/usb/uhci.c if (UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS)
sc 1534 dev/usb/uhci.c uhci_intr1(sc);
sc 1538 dev/usb/uhci.c uhci_reset(uhci_softc_t *sc)
sc 1542 dev/usb/uhci.c UHCICMD(sc, UHCI_CMD_HCRESET);
sc 1545 dev/usb/uhci.c (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
sc 1546 dev/usb/uhci.c usb_delay_ms(&sc->sc_bus, 1);
sc 1549 dev/usb/uhci.c sc->sc_bus.bdev.dv_xname);
sc 1553 dev/usb/uhci.c uhci_run(uhci_softc_t *sc, int run)
sc 1561 dev/usb/uhci.c cmd = UREAD2(sc, UHCI_CMD);
sc 1566 dev/usb/uhci.c UHCICMD(sc, cmd);
sc 1568 dev/usb/uhci.c running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
sc 1573 dev/usb/uhci.c UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
sc 1576 dev/usb/uhci.c usb_delay_ms(&sc->sc_bus, 1);
sc 1579 dev/usb/uhci.c printf("%s: cannot %s\n", sc->sc_bus.bdev.dv_xname,
sc 1595 dev/usb/uhci.c uhci_alloc_std(uhci_softc_t *sc)
sc 1602 dev/usb/uhci.c if (sc->sc_freetds == NULL) {
sc 1604 dev/usb/uhci.c err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
sc 1612 dev/usb/uhci.c std->link.std = sc->sc_freetds;
sc 1613 dev/usb/uhci.c sc->sc_freetds = std;
sc 1616 dev/usb/uhci.c std = sc->sc_freetds;
sc 1617 dev/usb/uhci.c sc->sc_freetds = std->link.std;
sc 1623 dev/usb/uhci.c uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
sc 1633 dev/usb/uhci.c std->link.std = sc->sc_freetds;
sc 1634 dev/usb/uhci.c sc->sc_freetds = std;
sc 1638 dev/usb/uhci.c uhci_alloc_sqh(uhci_softc_t *sc)
sc 1645 dev/usb/uhci.c if (sc->sc_freeqhs == NULL) {
sc 1647 dev/usb/uhci.c err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
sc 1655 dev/usb/uhci.c sqh->hlink = sc->sc_freeqhs;
sc 1656 dev/usb/uhci.c sc->sc_freeqhs = sqh;
sc 1659 dev/usb/uhci.c sqh = sc->sc_freeqhs;
sc 1660 dev/usb/uhci.c sc->sc_freeqhs = sqh->hlink;
sc 1666 dev/usb/uhci.c uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
sc 1668 dev/usb/uhci.c sqh->hlink = sc->sc_freeqhs;
sc 1669 dev/usb/uhci.c sc->sc_freeqhs = sqh;
sc 1673 dev/usb/uhci.c uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
sc 1680 dev/usb/uhci.c uhci_free_std(sc, std);
sc 1685 dev/usb/uhci.c uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
sc 1726 dev/usb/uhci.c p = uhci_alloc_std(sc);
sc 1728 dev/usb/uhci.c uhci_free_std_chain(sc, lastp, NULL);
sc 1790 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
sc 1801 dev/usb/uhci.c if (sc->sc_dying)
sc 1817 dev/usb/uhci.c err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
sc 1845 dev/usb/uhci.c uhci_add_bulk(sc, sqh);
sc 1846 dev/usb/uhci.c uhci_add_intr_info(sc, ii);
sc 1848 dev/usb/uhci.c if (xfer->timeout && !sc->sc_bus.use_polling) {
sc 1863 dev/usb/uhci.c if (sc->sc_bus.use_polling)
sc 1864 dev/usb/uhci.c uhci_waitintr(sc, xfer);
sc 1892 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
sc 1898 dev/usb/uhci.c if (sc->sc_dying) {
sc 1930 dev/usb/uhci.c sc->sc_softwake = 1;
sc 1932 dev/usb/uhci.c usb_schedsoftintr(&sc->sc_bus);
sc 1935 dev/usb/uhci.c tsleep(&sc->sc_softwake, PZERO, "uhciab", 0);
sc 1957 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
sc 1959 dev/usb/uhci.c uhci_free_sqh(sc, upipe->u.bulk.sqh);
sc 1983 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
sc 1986 dev/usb/uhci.c if (sc->sc_dying)
sc 1998 dev/usb/uhci.c if (sc->sc_bus.use_polling)
sc 1999 dev/usb/uhci.c uhci_waitintr(sc, xfer);
sc 2025 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
sc 2033 dev/usb/uhci.c if (sc->sc_dying)
sc 2049 dev/usb/uhci.c err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
sc 2084 dev/usb/uhci.c uhci_add_intr_info(sc, ii);
sc 2130 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
sc 2138 dev/usb/uhci.c uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
sc 2145 dev/usb/uhci.c usb_delay_ms(&sc->sc_bus, 2);
sc 2148 dev/usb/uhci.c uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
sc 2160 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
sc 2189 dev/usb/uhci.c err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
sc 2242 dev/usb/uhci.c uhci_add_ls_ctrl(sc, sqh);
sc 2244 dev/usb/uhci.c uhci_add_hs_ctrl(sc, sqh);
sc 2245 dev/usb/uhci.c uhci_add_intr_info(sc, ii);
sc 2254 dev/usb/uhci.c for (std = sc->sc_vframes[0].htd, link = 0;
sc 2273 dev/usb/uhci.c if (xfer->timeout && !sc->sc_bus.use_polling) {
sc 2315 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
sc 2325 dev/usb/uhci.c if (sc->sc_dying)
sc 2342 dev/usb/uhci.c next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
sc 2384 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)upipe->pipe.device->bus;
sc 2391 dev/usb/uhci.c if (sc->sc_dying)
sc 2423 dev/usb/uhci.c uhci_add_intr_info(sc, ii);
sc 2481 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
sc 2496 dev/usb/uhci.c usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
sc 2501 dev/usb/uhci.c for (vstd = sc->sc_vframes[i].htd;
sc 2513 dev/usb/uhci.c uhci_free_std(sc, std);
sc 2525 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)dev->bus;
sc 2543 dev/usb/uhci.c std = uhci_alloc_std(sc);
sc 2555 dev/usb/uhci.c vstd = sc->sc_vframes[i].htd;
sc 2570 dev/usb/uhci.c uhci_free_std(sc, iso->stds[i]);
sc 2614 dev/usb/uhci.c uhci_softc_t *sc = ii->sc;
sc 2627 dev/usb/uhci.c uhci_free_std_chain(sc, ii->stdstart, NULL);
sc 2636 dev/usb/uhci.c uhci_alloc_std_chain(upipe, sc, xfer->length,
sc 2676 dev/usb/uhci.c uhci_softc_t *sc = ii->sc;
sc 2690 dev/usb/uhci.c uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
sc 2692 dev/usb/uhci.c uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
sc 2695 dev/usb/uhci.c uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
sc 2705 dev/usb/uhci.c uhci_softc_t *sc = ii->sc;
sc 2709 dev/usb/uhci.c xfer, ii, sc, upipe));
sc 2716 dev/usb/uhci.c uhci_remove_bulk(sc, upipe->u.bulk.sqh);
sc 2718 dev/usb/uhci.c uhci_free_std_chain(sc, ii->stdstart, NULL);
sc 2725 dev/usb/uhci.c uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
sc 2727 dev/usb/uhci.c struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
sc 2743 dev/usb/uhci.c uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
sc 2745 dev/usb/uhci.c struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
sc 2766 dev/usb/uhci.c uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
sc 2794 dev/usb/uhci.c bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
sc 2803 dev/usb/uhci.c upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
sc 2813 dev/usb/uhci.c uhci_add_intr(sc, upipe->u.intr.qhs[i]);
sc 2824 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
sc 2832 dev/usb/uhci.c ed->bEndpointAddress, sc->sc_addr));
sc 2837 dev/usb/uhci.c if (pipe->device->address == sc->sc_addr) {
sc 2852 dev/usb/uhci.c upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
sc 2855 dev/usb/uhci.c upipe->u.ctl.setup = uhci_alloc_std(sc);
sc 2857 dev/usb/uhci.c uhci_free_sqh(sc, upipe->u.ctl.sqh);
sc 2860 dev/usb/uhci.c upipe->u.ctl.stat = uhci_alloc_std(sc);
sc 2862 dev/usb/uhci.c uhci_free_sqh(sc, upipe->u.ctl.sqh);
sc 2863 dev/usb/uhci.c uhci_free_std(sc, upipe->u.ctl.setup);
sc 2866 dev/usb/uhci.c err = usb_allocmem(&sc->sc_bus,
sc 2870 dev/usb/uhci.c uhci_free_sqh(sc, upipe->u.ctl.sqh);
sc 2871 dev/usb/uhci.c uhci_free_std(sc, upipe->u.ctl.setup);
sc 2872 dev/usb/uhci.c uhci_free_std(sc, upipe->u.ctl.stat);
sc 2881 dev/usb/uhci.c return (uhci_device_setintr(sc, upipe, ival));
sc 2887 dev/usb/uhci.c upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
sc 2988 dev/usb/uhci.c uhci_portreset(uhci_softc_t *sc, int index)
sc 2999 dev/usb/uhci.c x = URWMASK(UREAD2(sc, port));
sc 3000 dev/usb/uhci.c UWRITE2(sc, port, x | UHCI_PORTSC_PR);
sc 3002 dev/usb/uhci.c usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
sc 3005 dev/usb/uhci.c index, UREAD2(sc, port)));
sc 3007 dev/usb/uhci.c x = URWMASK(UREAD2(sc, port));
sc 3008 dev/usb/uhci.c UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
sc 3013 dev/usb/uhci.c index, UREAD2(sc, port)));
sc 3015 dev/usb/uhci.c x = URWMASK(UREAD2(sc, port));
sc 3016 dev/usb/uhci.c UWRITE2(sc, port, x | UHCI_PORTSC_PE);
sc 3019 dev/usb/uhci.c usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
sc 3021 dev/usb/uhci.c x = UREAD2(sc, port);
sc 3047 dev/usb/uhci.c UWRITE2(sc, port, URWMASK(x) |
sc 3056 dev/usb/uhci.c UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
sc 3060 dev/usb/uhci.c index, UREAD2(sc, port)));
sc 3067 dev/usb/uhci.c sc->sc_isreset = 1;
sc 3094 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
sc 3102 dev/usb/uhci.c if (sc->sc_dying)
sc 3133 dev/usb/uhci.c *(u_int8_t *)buf = sc->sc_conf;
sc 3146 dev/usb/uhci.c USETW(uhci_devd.idVendor, sc->sc_id_vendor);
sc 3177 dev/usb/uhci.c totlen = uhci_str(buf, len, sc->sc_vendor);
sc 3213 dev/usb/uhci.c sc->sc_addr = value;
sc 3220 dev/usb/uhci.c sc->sc_conf = value;
sc 3250 dev/usb/uhci.c x = URWMASK(UREAD2(sc, port));
sc 3251 dev/usb/uhci.c UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
sc 3254 dev/usb/uhci.c x = URWMASK(UREAD2(sc, port));
sc 3255 dev/usb/uhci.c UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
sc 3258 dev/usb/uhci.c x = URWMASK(UREAD2(sc, port));
sc 3259 dev/usb/uhci.c UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
sc 3262 dev/usb/uhci.c x = URWMASK(UREAD2(sc, port));
sc 3263 dev/usb/uhci.c UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
sc 3266 dev/usb/uhci.c x = URWMASK(UREAD2(sc, port));
sc 3267 dev/usb/uhci.c UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
sc 3270 dev/usb/uhci.c x = URWMASK(UREAD2(sc, port));
sc 3271 dev/usb/uhci.c UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
sc 3274 dev/usb/uhci.c sc->sc_isreset = 0;
sc 3298 dev/usb/uhci.c (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
sc 3333 dev/usb/uhci.c x = UREAD2(sc, port);
sc 3352 dev/usb/uhci.c if (sc->sc_isreset)
sc 3376 dev/usb/uhci.c x = URWMASK(UREAD2(sc, port));
sc 3377 dev/usb/uhci.c UWRITE2(sc, port, x | UHCI_PORTSC_PE);
sc 3380 dev/usb/uhci.c x = URWMASK(UREAD2(sc, port));
sc 3381 dev/usb/uhci.c UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
sc 3384 dev/usb/uhci.c err = uhci_portreset(sc, index);
sc 3435 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)xfer->pipe->device->bus;
sc 3437 dev/usb/uhci.c timeout_del(&sc->sc_poll_handle);
sc 3438 dev/usb/uhci.c sc->sc_intr_xfer = NULL;
sc 3472 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
sc 3477 dev/usb/uhci.c if (sc->sc_dying)
sc 3480 dev/usb/uhci.c sc->sc_ival = mstohz(xfer->pipe->endpoint->edesc->bInterval);
sc 3481 dev/usb/uhci.c timeout_del(&sc->sc_poll_handle);
sc 3482 dev/usb/uhci.c timeout_set(&sc->sc_poll_handle, uhci_poll_hub, xfer);
sc 3483 dev/usb/uhci.c timeout_add(&sc->sc_poll_handle, sc->sc_ival);
sc 3484 dev/usb/uhci.c sc->sc_intr_xfer = xfer;
sc 3492 dev/usb/uhci.c uhci_softc_t *sc = (uhci_softc_t *)pipe->device->bus;
sc 3494 dev/usb/uhci.c timeout_del(&sc->sc_poll_handle);
sc 3495 dev/usb/uhci.c sc->sc_intr_xfer = NULL;
sc 74 dev/usb/uhcivar.h struct uhci_softc *sc;
sc 144 dev/usb/uhid.c struct uhid_softc *sc = (struct uhid_softc *)self;
sc 150 dev/usb/uhid.c sc->sc_hdev.sc_intr = uhid_intr;
sc 151 dev/usb/uhid.c sc->sc_hdev.sc_parent = uha->parent;
sc 152 dev/usb/uhid.c sc->sc_hdev.sc_report_id = uha->reportid;
sc 156 dev/usb/uhid.c sc->sc_isize = hid_report_size(desc, size, hid_input, repid);
sc 157 dev/usb/uhid.c sc->sc_osize = hid_report_size(desc, size, hid_output, repid);
sc 158 dev/usb/uhid.c sc->sc_fsize = hid_report_size(desc, size, hid_feature, repid);
sc 161 dev/usb/uhid.c sc->sc_isize, sc->sc_osize, sc->sc_fsize);
sc 167 dev/usb/uhid.c struct uhid_softc *sc = (struct uhid_softc *)self;
sc 174 dev/usb/uhid.c sc->sc_dying = 1;
sc 183 dev/usb/uhid.c struct uhid_softc *sc = (struct uhid_softc *)self;
sc 187 dev/usb/uhid.c DPRINTF(("uhid_detach: sc=%p flags=%d\n", sc, flags));
sc 189 dev/usb/uhid.c sc->sc_dying = 1;
sc 191 dev/usb/uhid.c if (sc->sc_hdev.sc_state & UHIDEV_OPEN) {
sc 193 dev/usb/uhid.c if (--sc->sc_refcnt >= 0) {
sc 195 dev/usb/uhid.c wakeup(&sc->sc_q);
sc 197 dev/usb/uhid.c usb_detach_wait(&sc->sc_hdev.sc_dev);
sc 213 dev/usb/uhid.c sc->sc_hdev.sc_parent->sc_udev,
sc 214 dev/usb/uhid.c &sc->sc_hdev.sc_dev);
sc 223 dev/usb/uhid.c struct uhid_softc *sc = (struct uhid_softc *)addr;
sc 236 dev/usb/uhid.c (void)b_to_q(data, len, &sc->sc_q);
sc 238 dev/usb/uhid.c if (sc->sc_state & UHID_ASLP) {
sc 239 dev/usb/uhid.c sc->sc_state &= ~UHID_ASLP;
sc 240 dev/usb/uhid.c DPRINTFN(5, ("uhid_intr: waking %p\n", &sc->sc_q));
sc 241 dev/usb/uhid.c wakeup(&sc->sc_q);
sc 243 dev/usb/uhid.c selwakeup(&sc->sc_rsel);
sc 244 dev/usb/uhid.c if (sc->sc_async != NULL) {
sc 245 dev/usb/uhid.c DPRINTFN(3, ("uhid_intr: sending SIGIO %p\n", sc->sc_async));
sc 246 dev/usb/uhid.c psignal(sc->sc_async, SIGIO);
sc 253 dev/usb/uhid.c struct uhid_softc *sc;
sc 258 dev/usb/uhid.c sc = uhid_cd.cd_devs[UHIDUNIT(dev)];
sc 259 dev/usb/uhid.c if (sc == NULL)
sc 262 dev/usb/uhid.c DPRINTF(("uhidopen: sc=%p\n", sc));
sc 264 dev/usb/uhid.c if (sc->sc_dying)
sc 267 dev/usb/uhid.c error = uhidev_open(&sc->sc_hdev);
sc 271 dev/usb/uhid.c if (clalloc(&sc->sc_q, UHID_BSIZE, 0) == -1) {
sc 272 dev/usb/uhid.c uhidev_close(&sc->sc_hdev);
sc 275 dev/usb/uhid.c sc->sc_obuf = malloc(sc->sc_osize, M_USBDEV, M_WAITOK);
sc 276 dev/usb/uhid.c sc->sc_state &= ~UHID_IMMED;
sc 277 dev/usb/uhid.c sc->sc_async = NULL;
sc 285 dev/usb/uhid.c struct uhid_softc *sc;
sc 287 dev/usb/uhid.c sc = uhid_cd.cd_devs[UHIDUNIT(dev)];
sc 289 dev/usb/uhid.c DPRINTF(("uhidclose: sc=%p\n", sc));
sc 291 dev/usb/uhid.c clfree(&sc->sc_q);
sc 292 dev/usb/uhid.c free(sc->sc_obuf, M_USBDEV);
sc 293 dev/usb/uhid.c sc->sc_async = NULL;
sc 294 dev/usb/uhid.c uhidev_close(&sc->sc_hdev);
sc 300 dev/usb/uhid.c uhid_do_read(struct uhid_softc *sc, struct uio *uio, int flag)
sc 310 dev/usb/uhid.c if (sc->sc_state & UHID_IMMED) {
sc 312 dev/usb/uhid.c extra = sc->sc_hdev.sc_report_id != 0;
sc 313 dev/usb/uhid.c err = uhidev_get_report(&sc->sc_hdev, UHID_INPUT_REPORT,
sc 314 dev/usb/uhid.c buffer, sc->sc_isize + extra);
sc 317 dev/usb/uhid.c return (uiomove(buffer+extra, sc->sc_isize, uio));
sc 321 dev/usb/uhid.c while (sc->sc_q.c_cc == 0) {
sc 326 dev/usb/uhid.c sc->sc_state |= UHID_ASLP;
sc 327 dev/usb/uhid.c DPRINTFN(5, ("uhidread: sleep on %p\n", &sc->sc_q));
sc 328 dev/usb/uhid.c error = tsleep(&sc->sc_q, PZERO | PCATCH, "uhidrea", 0);
sc 330 dev/usb/uhid.c if (sc->sc_dying)
sc 333 dev/usb/uhid.c sc->sc_state &= ~UHID_ASLP;
sc 340 dev/usb/uhid.c while (sc->sc_q.c_cc > 0 && uio->uio_resid > 0 && !error) {
sc 341 dev/usb/uhid.c length = min(sc->sc_q.c_cc, uio->uio_resid);
sc 346 dev/usb/uhid.c (void) q_to_b(&sc->sc_q, buffer, length);
sc 360 dev/usb/uhid.c struct uhid_softc *sc;
sc 363 dev/usb/uhid.c sc = uhid_cd.cd_devs[UHIDUNIT(dev)];
sc 365 dev/usb/uhid.c sc->sc_refcnt++;
sc 366 dev/usb/uhid.c error = uhid_do_read(sc, uio, flag);
sc 367 dev/usb/uhid.c if (--sc->sc_refcnt < 0)
sc 368 dev/usb/uhid.c usb_detach_wakeup(&sc->sc_hdev.sc_dev);
sc 373 dev/usb/uhid.c uhid_do_write(struct uhid_softc *sc, struct uio *uio, int flag)
sc 381 dev/usb/uhid.c if (sc->sc_dying)
sc 384 dev/usb/uhid.c size = sc->sc_osize;
sc 388 dev/usb/uhid.c error = uiomove(sc->sc_obuf, size, uio);
sc 390 dev/usb/uhid.c err = uhidev_set_report(&sc->sc_hdev, UHID_OUTPUT_REPORT,
sc 391 dev/usb/uhid.c sc->sc_obuf, size);
sc 402 dev/usb/uhid.c struct uhid_softc *sc;
sc 405 dev/usb/uhid.c sc = uhid_cd.cd_devs[UHIDUNIT(dev)];
sc 407 dev/usb/uhid.c sc->sc_refcnt++;
sc 408 dev/usb/uhid.c error = uhid_do_write(sc, uio, flag);
sc 409 dev/usb/uhid.c if (--sc->sc_refcnt < 0)
sc 410 dev/usb/uhid.c usb_detach_wakeup(&sc->sc_hdev.sc_dev);
sc 415 dev/usb/uhid.c uhid_do_ioctl(struct uhid_softc *sc, u_long cmd, caddr_t addr,
sc 427 dev/usb/uhid.c if (sc->sc_dying)
sc 437 dev/usb/uhid.c if (sc->sc_async != NULL)
sc 439 dev/usb/uhid.c sc->sc_async = p;
sc 442 dev/usb/uhid.c sc->sc_async = NULL;
sc 447 dev/usb/uhid.c if (sc->sc_async == NULL)
sc 449 dev/usb/uhid.c if (*(int *)addr != sc->sc_async->p_pgid)
sc 454 dev/usb/uhid.c uhidev_get_report_desc(sc->sc_hdev.sc_parent, &desc, &size);
sc 463 dev/usb/uhid.c extra = sc->sc_hdev.sc_report_id != 0;
sc 464 dev/usb/uhid.c err = uhidev_get_report(&sc->sc_hdev, UHID_INPUT_REPORT,
sc 465 dev/usb/uhid.c buffer, sc->sc_isize + extra);
sc 469 dev/usb/uhid.c sc->sc_state |= UHID_IMMED;
sc 471 dev/usb/uhid.c sc->sc_state &= ~UHID_IMMED;
sc 478 dev/usb/uhid.c size = sc->sc_isize;
sc 481 dev/usb/uhid.c size = sc->sc_osize;
sc 484 dev/usb/uhid.c size = sc->sc_fsize;
sc 489 dev/usb/uhid.c extra = sc->sc_hdev.sc_report_id != 0;
sc 490 dev/usb/uhid.c err = uhidev_get_report(&sc->sc_hdev, re->ucr_report,
sc 502 dev/usb/uhid.c size = sc->sc_isize;
sc 505 dev/usb/uhid.c size = sc->sc_osize;
sc 508 dev/usb/uhid.c size = sc->sc_fsize;
sc 513 dev/usb/uhid.c err = uhidev_set_report(&sc->sc_hdev, re->ucr_report,
sc 520 dev/usb/uhid.c *(int *)addr = sc->sc_hdev.sc_report_id;
sc 532 dev/usb/uhid.c struct uhid_softc *sc;
sc 535 dev/usb/uhid.c sc = uhid_cd.cd_devs[UHIDUNIT(dev)];
sc 537 dev/usb/uhid.c sc->sc_refcnt++;
sc 538 dev/usb/uhid.c error = uhid_do_ioctl(sc, cmd, addr, flag, p);
sc 539 dev/usb/uhid.c if (--sc->sc_refcnt < 0)
sc 540 dev/usb/uhid.c usb_detach_wakeup(&sc->sc_hdev.sc_dev);
sc 547 dev/usb/uhid.c struct uhid_softc *sc;
sc 551 dev/usb/uhid.c sc = uhid_cd.cd_devs[UHIDUNIT(dev)];
sc 553 dev/usb/uhid.c if (sc->sc_dying)
sc 560 dev/usb/uhid.c if (sc->sc_q.c_cc > 0)
sc 563 dev/usb/uhid.c selrecord(p, &sc->sc_rsel);
sc 577 dev/usb/uhid.c struct uhid_softc *sc = (void *)kn->kn_hook;
sc 581 dev/usb/uhid.c SLIST_REMOVE(&sc->sc_rsel.si_note, kn, knote, kn_selnext);
sc 588 dev/usb/uhid.c struct uhid_softc *sc = (void *)kn->kn_hook;
sc 590 dev/usb/uhid.c kn->kn_data = sc->sc_q.c_cc;
sc 603 dev/usb/uhid.c struct uhid_softc *sc;
sc 607 dev/usb/uhid.c sc = uhid_cd.cd_devs[UHIDUNIT(dev)];
sc 609 dev/usb/uhid.c if (sc->sc_dying)
sc 614 dev/usb/uhid.c klist = &sc->sc_rsel.si_note;
sc 619 dev/usb/uhid.c klist = &sc->sc_rsel.si_note;
sc 627 dev/usb/uhid.c kn->kn_hook = (void *)sc;
sc 134 dev/usb/uhidev.c struct uhidev_softc *sc = (struct uhidev_softc *)self;
sc 149 dev/usb/uhidev.c sc->sc_udev = uaa->device;
sc 150 dev/usb/uhidev.c sc->sc_iface = iface;
sc 154 dev/usb/uhidev.c printf("\n%s: %s, iclass %d/%d\n", sc->sc_dev.dv_xname,
sc 161 dev/usb/uhidev.c qflags = usbd_get_quirks(sc->sc_udev)->uq_flags;
sc 167 dev/usb/uhidev.c sc->sc_iep_addr = sc->sc_oep_addr = -1;
sc 172 dev/usb/uhidev.c sc->sc_dev.dv_xname);
sc 173 dev/usb/uhidev.c sc->sc_dying = 1;
sc 188 dev/usb/uhidev.c sc->sc_iep_addr = ed->bEndpointAddress;
sc 191 dev/usb/uhidev.c sc->sc_oep_addr = ed->bEndpointAddress;
sc 193 dev/usb/uhidev.c printf("%s: unexpected endpoint\n", sc->sc_dev.dv_xname);
sc 194 dev/usb/uhidev.c sc->sc_dying = 1;
sc 203 dev/usb/uhidev.c if (sc->sc_iep_addr == -1) {
sc 204 dev/usb/uhidev.c printf("%s: no input interrupt endpoint\n", sc->sc_dev.dv_xname);
sc 205 dev/usb/uhidev.c sc->sc_dying = 1;
sc 246 dev/usb/uhidev.c printf("%s: no report descriptor\n", sc->sc_dev.dv_xname);
sc 247 dev/usb/uhidev.c sc->sc_dying = 1;
sc 251 dev/usb/uhidev.c sc->sc_repdesc = desc;
sc 252 dev/usb/uhidev.c sc->sc_repdesc_size = size;
sc 259 dev/usb/uhidev.c printf("%s: %d report ids\n", sc->sc_dev.dv_xname, nrepid);
sc 261 dev/usb/uhidev.c sc->sc_subdevs = malloc(nrepid * sizeof(struct device *),
sc 263 dev/usb/uhidev.c if (sc->sc_subdevs == NULL) {
sc 264 dev/usb/uhidev.c printf("%s: no memory\n", sc->sc_dev.dv_xname);
sc 267 dev/usb/uhidev.c bzero(sc->sc_subdevs, nrepid * sizeof(struct device *));
sc 268 dev/usb/uhidev.c sc->sc_nrepid = nrepid;
sc 269 dev/usb/uhidev.c sc->sc_isize = 0;
sc 271 dev/usb/uhidev.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 272 dev/usb/uhidev.c &sc->sc_dev);
sc 279 dev/usb/uhidev.c if (repsz > sc->sc_isize)
sc 280 dev/usb/uhidev.c sc->sc_isize = repsz;
sc 283 dev/usb/uhidev.c sc->sc_isize += nrepid != 1; /* space for report ID */
sc 284 dev/usb/uhidev.c DPRINTF(("uhidev_attach: isize=%d\n", sc->sc_isize));
sc 286 dev/usb/uhidev.c uha.parent = sc;
sc 297 dev/usb/uhidev.c sc->sc_subdevs[repid] = dev;
sc 305 dev/usb/uhidev.c sc->sc_dev.dv_xname);
sc 360 dev/usb/uhidev.c struct uhidev_softc *sc = (struct uhidev_softc *)self;
sc 368 dev/usb/uhidev.c for (i = 0; i < sc->sc_nrepid; i++)
sc 369 dev/usb/uhidev.c if (sc->sc_subdevs[i] != NULL)
sc 371 dev/usb/uhidev.c &sc->sc_subdevs[i]->sc_dev);
sc 372 dev/usb/uhidev.c sc->sc_dying = 1;
sc 381 dev/usb/uhidev.c struct uhidev_softc *sc = (struct uhidev_softc *)self;
sc 384 dev/usb/uhidev.c DPRINTF(("uhidev_detach: sc=%p flags=%d\n", sc, flags));
sc 386 dev/usb/uhidev.c sc->sc_dying = 1;
sc 387 dev/usb/uhidev.c if (sc->sc_ipipe != NULL)
sc 388 dev/usb/uhidev.c usbd_abort_pipe(sc->sc_ipipe);
sc 390 dev/usb/uhidev.c if (sc->sc_repdesc != NULL)
sc 391 dev/usb/uhidev.c free(sc->sc_repdesc, M_USBDEV);
sc 394 dev/usb/uhidev.c for (i = 0; i < sc->sc_nrepid; i++) {
sc 395 dev/usb/uhidev.c if (sc->sc_subdevs[i] != NULL) {
sc 396 dev/usb/uhidev.c rv |= config_detach(&sc->sc_subdevs[i]->sc_dev, flags);
sc 397 dev/usb/uhidev.c sc->sc_subdevs[i] = NULL;
sc 401 dev/usb/uhidev.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 402 dev/usb/uhidev.c &sc->sc_dev);
sc 410 dev/usb/uhidev.c struct uhidev_softc *sc = addr;
sc 425 dev/usb/uhidev.c DPRINTF((" %02x", sc->sc_ibuf[i]));
sc 434 dev/usb/uhidev.c DPRINTF(("%s: interrupt status=%d\n", sc->sc_dev.dv_xname,
sc 436 dev/usb/uhidev.c usbd_clear_endpoint_stall_async(sc->sc_ipipe);
sc 440 dev/usb/uhidev.c p = sc->sc_ibuf;
sc 441 dev/usb/uhidev.c if (sc->sc_nrepid != 1)
sc 445 dev/usb/uhidev.c if (rep >= sc->sc_nrepid) {
sc 449 dev/usb/uhidev.c scd = sc->sc_subdevs[rep];
sc 456 dev/usb/uhidev.c printf("%s: bad input length %d != %d\n",sc->sc_dev.dv_xname,
sc 463 dev/usb/uhidev.c uhidev_get_report_desc(struct uhidev_softc *sc, void **desc, int *size)
sc 465 dev/usb/uhidev.c *desc = sc->sc_repdesc;
sc 466 dev/usb/uhidev.c *size = sc->sc_repdesc_size;
sc 472 dev/usb/uhidev.c struct uhidev_softc *sc = scd->sc_parent;
sc 477 dev/usb/uhidev.c scd->sc_state, sc->sc_refcnt));
sc 482 dev/usb/uhidev.c if (sc->sc_refcnt++)
sc 485 dev/usb/uhidev.c if (sc->sc_isize == 0)
sc 488 dev/usb/uhidev.c sc->sc_ibuf = malloc(sc->sc_isize, M_USBDEV, M_WAITOK);
sc 491 dev/usb/uhidev.c DPRINTF(("uhidev_open: isize=%d, ep=0x%02x\n", sc->sc_isize,
sc 492 dev/usb/uhidev.c sc->sc_iep_addr));
sc 494 dev/usb/uhidev.c err = usbd_open_pipe_intr(sc->sc_iface, sc->sc_iep_addr,
sc 495 dev/usb/uhidev.c USBD_SHORT_XFER_OK, &sc->sc_ipipe, sc, sc->sc_ibuf,
sc 496 dev/usb/uhidev.c sc->sc_isize, uhidev_intr, USBD_DEFAULT_INTERVAL);
sc 504 dev/usb/uhidev.c DPRINTF(("uhidev_open: sc->sc_ipipe=%p\n", sc->sc_ipipe));
sc 506 dev/usb/uhidev.c sc->sc_ixfer = usbd_alloc_xfer(sc->sc_udev);
sc 507 dev/usb/uhidev.c if (sc->sc_ixfer == NULL) {
sc 517 dev/usb/uhidev.c if (sc->sc_oep_addr != -1) {
sc 518 dev/usb/uhidev.c DPRINTF(("uhidev_open: oep=0x%02x\n", sc->sc_oep_addr));
sc 520 dev/usb/uhidev.c err = usbd_open_pipe(sc->sc_iface, sc->sc_oep_addr,
sc 521 dev/usb/uhidev.c 0, &sc->sc_opipe);
sc 529 dev/usb/uhidev.c DPRINTF(("uhidev_open: sc->sc_opipe=%p\n", sc->sc_opipe));
sc 531 dev/usb/uhidev.c sc->sc_oxfer = usbd_alloc_xfer(sc->sc_udev);
sc 532 dev/usb/uhidev.c if (sc->sc_oxfer == NULL) {
sc 538 dev/usb/uhidev.c sc->sc_owxfer = usbd_alloc_xfer(sc->sc_udev);
sc 539 dev/usb/uhidev.c if (sc->sc_owxfer == NULL) {
sc 550 dev/usb/uhidev.c usbd_close_pipe(sc->sc_opipe);
sc 553 dev/usb/uhidev.c usbd_close_pipe(sc->sc_ipipe);
sc 556 dev/usb/uhidev.c free(sc->sc_ibuf, M_USBDEV);
sc 558 dev/usb/uhidev.c sc->sc_refcnt = 0;
sc 559 dev/usb/uhidev.c sc->sc_ipipe = NULL;
sc 560 dev/usb/uhidev.c sc->sc_opipe = NULL;
sc 561 dev/usb/uhidev.c if (sc->sc_oxfer != NULL) {
sc 562 dev/usb/uhidev.c usbd_free_xfer(sc->sc_oxfer);
sc 563 dev/usb/uhidev.c sc->sc_oxfer = NULL;
sc 565 dev/usb/uhidev.c if (sc->sc_owxfer != NULL) {
sc 566 dev/usb/uhidev.c usbd_free_xfer(sc->sc_owxfer);
sc 567 dev/usb/uhidev.c sc->sc_owxfer = NULL;
sc 575 dev/usb/uhidev.c struct uhidev_softc *sc = scd->sc_parent;
sc 580 dev/usb/uhidev.c if (--sc->sc_refcnt)
sc 584 dev/usb/uhidev.c if (sc->sc_oxfer != NULL)
sc 585 dev/usb/uhidev.c usbd_free_xfer(sc->sc_oxfer);
sc 587 dev/usb/uhidev.c if (sc->sc_owxfer != NULL)
sc 588 dev/usb/uhidev.c usbd_free_xfer(sc->sc_owxfer);
sc 591 dev/usb/uhidev.c if (sc->sc_opipe != NULL) {
sc 592 dev/usb/uhidev.c usbd_abort_pipe(sc->sc_opipe);
sc 593 dev/usb/uhidev.c usbd_close_pipe(sc->sc_opipe);
sc 594 dev/usb/uhidev.c sc->sc_opipe = NULL;
sc 597 dev/usb/uhidev.c if (sc->sc_ipipe != NULL) {
sc 598 dev/usb/uhidev.c usbd_abort_pipe(sc->sc_ipipe);
sc 599 dev/usb/uhidev.c usbd_close_pipe(sc->sc_ipipe);
sc 600 dev/usb/uhidev.c sc->sc_ipipe = NULL;
sc 603 dev/usb/uhidev.c if (sc->sc_ibuf != NULL) {
sc 604 dev/usb/uhidev.c free(sc->sc_ibuf, M_USBDEV);
sc 605 dev/usb/uhidev.c sc->sc_ibuf = NULL;
sc 655 dev/usb/uhidev.c uhidev_write(struct uhidev_softc *sc, void *data, int len)
sc 660 dev/usb/uhidev.c if (sc->sc_opipe == NULL)
sc 675 dev/usb/uhidev.c return usbd_intr_transfer(sc->sc_owxfer, sc->sc_opipe, 0,
sc 78 dev/usb/uhub.c #define UHUB_PROTO(sc) ((sc)->sc_hub->ddesc.bDeviceProtocol)
sc 79 dev/usb/uhub.c #define UHUB_IS_HIGH_SPEED(sc) (UHUB_PROTO(sc) != UDPROTO_FSHUB)
sc 80 dev/usb/uhub.c #define UHUB_IS_SINGLE_TT(sc) (UHUB_PROTO(sc) == UDPROTO_HSHUBSTT)
sc 132 dev/usb/uhub.c struct uhub_softc *sc = (struct uhub_softc *)self;
sc 146 dev/usb/uhub.c sc->sc_hub = dev;
sc 155 dev/usb/uhub.c sc->sc_dev.dv_xname, usbd_errstr(err)));
sc 161 dev/usb/uhub.c sc->sc_dev.dv_xname, USB_HUB_MAX_DEPTH);
sc 180 dev/usb/uhub.c sc->sc_dev.dv_xname, usbd_errstr(err)));
sc 190 dev/usb/uhub.c sc->sc_dev.dv_xname, nports, nports != 1 ? "s" : "",
sc 193 dev/usb/uhub.c if (dev->depth > 0 && UHUB_IS_HIGH_SPEED(sc)) {
sc 195 dev/usb/uhub.c UHUB_IS_SINGLE_TT(sc) ? "single" : "multiple",
sc 196 dev/usb/uhub.c UHUB_IS_SINGLE_TT(sc) ? "" : "s");
sc 202 dev/usb/uhub.c printf("%s: no ports, hub ignored\n", sc->sc_dev.dv_xname);
sc 211 dev/usb/uhub.c dev->hub->hubsoftc = sc;
sc 224 dev/usb/uhub.c "ignored\n", sc->sc_dev.dv_xname);
sc 231 dev/usb/uhub.c printf("%s: no interface handle\n", sc->sc_dev.dv_xname);
sc 236 dev/usb/uhub.c printf("%s: no endpoint descriptor\n", sc->sc_dev.dv_xname);
sc 240 dev/usb/uhub.c printf("%s: bad interrupt endpoint\n", sc->sc_dev.dv_xname);
sc 245 dev/usb/uhub.c USBD_SHORT_XFER_OK, &sc->sc_ipipe, sc, sc->sc_status,
sc 246 dev/usb/uhub.c sizeof(sc->sc_status), uhub_intr, UHUB_INTR_INTERVAL);
sc 249 dev/usb/uhub.c sc->sc_dev.dv_xname);
sc 256 dev/usb/uhub.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, dev, &sc->sc_dev);
sc 283 dev/usb/uhub.c if (UHUB_IS_HIGH_SPEED(sc)) {
sc 284 dev/usb/uhub.c tts = malloc((UHUB_IS_SINGLE_TT(sc) ? 1 : nports) *
sc 302 dev/usb/uhub.c if (UHUB_IS_HIGH_SPEED(sc)) {
sc 303 dev/usb/uhub.c up->tt = &tts[UHUB_IS_SINGLE_TT(sc) ? 0 : p];
sc 319 dev/usb/uhub.c sc->sc_dev.dv_xname, port,
sc 330 dev/usb/uhub.c sc->sc_running = 1;
sc 344 dev/usb/uhub.c struct uhub_softc *sc = dev->hub->hubsoftc;
sc 353 dev/usb/uhub.c if (!sc->sc_running)
sc 373 dev/usb/uhub.c sc->sc_dev.dv_xname, port, status, change));
sc 382 dev/usb/uhub.c sc->sc_dev.dv_xname, port);
sc 388 dev/usb/uhub.c sc->sc_dev.dv_xname, port);
sc 395 dev/usb/uhub.c sc->sc_dev.dv_xname, port);
sc 408 dev/usb/uhub.c sc->sc_dev.dv_xname);
sc 431 dev/usb/uhub.c usb_disconnect_port(up, &sc->sc_dev);
sc 446 dev/usb/uhub.c sc->sc_dev.dv_xname, port);
sc 454 dev/usb/uhub.c sc->sc_dev.dv_xname, port);
sc 470 dev/usb/uhub.c sc->sc_dev.dv_xname, port);
sc 483 dev/usb/uhub.c err = usbd_new_device(&sc->sc_dev, dev->bus,
sc 498 dev/usb/uhub.c sc->sc_dev.dv_xname, port);
sc 514 dev/usb/uhub.c struct uhub_softc *sc = (struct uhub_softc *)self;
sc 515 dev/usb/uhub.c struct usbd_hub *hub = sc->sc_hub->hub;
sc 546 dev/usb/uhub.c struct uhub_softc *sc = (struct uhub_softc *)self;
sc 547 dev/usb/uhub.c struct usbd_hub *hub = sc->sc_hub->hub;
sc 551 dev/usb/uhub.c DPRINTF(("uhub_detach: sc=%p flags=%d\n", sc, flags));
sc 556 dev/usb/uhub.c usbd_abort_pipe(sc->sc_ipipe);
sc 557 dev/usb/uhub.c usbd_close_pipe(sc->sc_ipipe);
sc 566 dev/usb/uhub.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_hub,
sc 567 dev/usb/uhub.c &sc->sc_dev);
sc 572 dev/usb/uhub.c sc->sc_hub->hub = NULL;
sc 586 dev/usb/uhub.c struct uhub_softc *sc = addr;
sc 588 dev/usb/uhub.c DPRINTFN(5,("uhub_intr: sc=%p\n", sc));
sc 590 dev/usb/uhub.c usbd_clear_endpoint_stall_async(sc->sc_ipipe);
sc 592 dev/usb/uhub.c usb_needs_explore(sc->sc_hub);
sc 102 dev/usb/uipaq.c void uipaq_dtr(struct uipaq_softc *sc, int onoff);
sc 103 dev/usb/uipaq.c void uipaq_rts(struct uipaq_softc *sc, int onoff);
sc 104 dev/usb/uipaq.c void uipaq_break(struct uipaq_softc* sc, int onoff);
sc 168 dev/usb/uipaq.c struct uipaq_softc *sc = (struct uipaq_softc *)self;
sc 175 dev/usb/uipaq.c char *devname = sc->sc_dev.dv_xname;
sc 180 dev/usb/uipaq.c DPRINTFN(10,("\nuipaq_attach: sc=%p\n", sc));
sc 201 dev/usb/uipaq.c sc->sc_flags = uipaq_lookup(uaa->vendor, uaa->product)->uv_flags;
sc 205 dev/usb/uipaq.c sc->sc_udev = dev;
sc 206 dev/usb/uipaq.c sc->sc_iface = iface;
sc 215 dev/usb/uipaq.c uca.arg = sc;
sc 226 dev/usb/uipaq.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 227 dev/usb/uipaq.c &sc->sc_dev);
sc 246 dev/usb/uipaq.c sc->sc_subdev = config_found_sm(self, &uca,
sc 256 dev/usb/uipaq.c sc->sc_dying = 1;
sc 261 dev/usb/uipaq.c uipaq_dtr(struct uipaq_softc* sc, int onoff)
sc 267 dev/usb/uipaq.c DPRINTF(("%s: uipaq_dtr: onoff=%x\n", sc->sc_dev.dv_xname, onoff));
sc 270 dev/usb/uipaq.c if (onoff && (sc->sc_lcr & UCDC_LINE_DTR))
sc 272 dev/usb/uipaq.c if (!onoff && !(sc->sc_lcr & UCDC_LINE_DTR))
sc 278 dev/usb/uipaq.c sc->sc_lcr = onoff ? sc->sc_lcr | UCDC_LINE_DTR : sc->sc_lcr & ~UCDC_LINE_DTR;
sc 279 dev/usb/uipaq.c USETW(req.wValue, sc->sc_lcr);
sc 285 dev/usb/uipaq.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 294 dev/usb/uipaq.c uipaq_rts(struct uipaq_softc* sc, int onoff)
sc 300 dev/usb/uipaq.c DPRINTF(("%s: uipaq_rts: onoff=%x\n", sc->sc_dev.dv_xname, onoff));
sc 303 dev/usb/uipaq.c if (onoff && (sc->sc_lcr & UCDC_LINE_RTS)) return;
sc 304 dev/usb/uipaq.c if (!onoff && !(sc->sc_lcr & UCDC_LINE_RTS)) return;
sc 308 dev/usb/uipaq.c sc->sc_lcr = onoff ? sc->sc_lcr | UCDC_LINE_RTS : sc->sc_lcr & ~UCDC_LINE_RTS;
sc 309 dev/usb/uipaq.c USETW(req.wValue, sc->sc_lcr);
sc 314 dev/usb/uipaq.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 323 dev/usb/uipaq.c uipaq_break(struct uipaq_softc* sc, int onoff)
sc 329 dev/usb/uipaq.c DPRINTF(("%s: uipaq_break: onoff=%x\n", sc->sc_dev.dv_xname, onoff));
sc 339 dev/usb/uipaq.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 350 dev/usb/uipaq.c struct uipaq_softc* sc = addr;
sc 364 dev/usb/uipaq.c sc->sc_dev.dv_xname, reg, onoff);
sc 373 dev/usb/uipaq.c struct uipaq_softc *sc = (struct uipaq_softc *)self;
sc 381 dev/usb/uipaq.c if (sc->sc_subdev != NULL)
sc 382 dev/usb/uipaq.c rv = config_deactivate(sc->sc_subdev);
sc 383 dev/usb/uipaq.c sc->sc_dying = 1;
sc 392 dev/usb/uipaq.c struct uipaq_softc *sc = (struct uipaq_softc *)self;
sc 395 dev/usb/uipaq.c DPRINTF(("uipaq_detach: sc=%p flags=%d\n", sc, flags));
sc 396 dev/usb/uipaq.c sc->sc_dying = 1;
sc 397 dev/usb/uipaq.c if (sc->sc_subdev != NULL) {
sc 398 dev/usb/uipaq.c rv |= config_detach(sc->sc_subdev, flags);
sc 399 dev/usb/uipaq.c sc->sc_subdev = NULL;
sc 402 dev/usb/uipaq.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 403 dev/usb/uipaq.c &sc->sc_dev);
sc 305 dev/usb/ukbd.c const char *ukbd_parse_desc(struct ukbd_softc *sc);
sc 308 dev/usb/ukbd.c void ukbd_decode(struct ukbd_softc *sc, struct ukbd_data *ud);
sc 367 dev/usb/ukbd.c struct ukbd_softc *sc = (struct ukbd_softc *)self;
sc 376 dev/usb/ukbd.c sc->sc_hdev.sc_intr = ukbd_intr;
sc 377 dev/usb/ukbd.c sc->sc_hdev.sc_parent = uha->parent;
sc 378 dev/usb/ukbd.c sc->sc_hdev.sc_report_id = uha->reportid;
sc 380 dev/usb/ukbd.c parseerr = ukbd_parse_desc(sc);
sc 383 dev/usb/ukbd.c sc->sc_hdev.sc_dev.dv_xname, parseerr);
sc 391 dev/usb/ukbd.c sc->sc_nmod, sc->sc_nkeycode);
sc 395 dev/usb/ukbd.c sc->sc_debounce = (qflags & UQ_SPUR_BUT_UP) != 0;
sc 403 dev/usb/ukbd.c if ((sc->sc_console_keyboard = ukbd_is_console) != 0) {
sc 443 dev/usb/ukbd.c if (sc->sc_console_keyboard) {
sc 444 dev/usb/ukbd.c DPRINTF(("ukbd_attach: console keyboard sc=%p\n", sc));
sc 445 dev/usb/ukbd.c wskbd_cnattach(&ukbd_consops, sc, &ukbd_keymapdata);
sc 446 dev/usb/ukbd.c ukbd_enable(sc, 1);
sc 449 dev/usb/ukbd.c a.console = sc->sc_console_keyboard;
sc 454 dev/usb/ukbd.c a.accesscookie = sc;
sc 456 dev/usb/ukbd.c timeout_set(&sc->sc_rawrepeat_ch, NULL, NULL);
sc 457 dev/usb/ukbd.c timeout_set(&sc->sc_delay, NULL, NULL);
sc 460 dev/usb/ukbd.c ukbd_set_leds(sc, WSKBD_LED_SCROLL | WSKBD_LED_NUM | WSKBD_LED_CAPS);
sc 462 dev/usb/ukbd.c ukbd_set_leds(sc, 0);
sc 464 dev/usb/ukbd.c sc->sc_wskbddev = config_found(self, &a, wskbddevprint);
sc 470 dev/usb/ukbd.c struct ukbd_softc *sc = v;
sc 472 dev/usb/ukbd.c if (on && sc->sc_dying)
sc 476 dev/usb/ukbd.c if (sc->sc_enabled == on) {
sc 478 dev/usb/ukbd.c sc->sc_hdev.sc_dev.dv_xname, on));
sc 482 dev/usb/ukbd.c DPRINTF(("ukbd_enable: sc=%p on=%d\n", sc, on));
sc 483 dev/usb/ukbd.c sc->sc_enabled = on;
sc 485 dev/usb/ukbd.c return (uhidev_open(&sc->sc_hdev));
sc 487 dev/usb/ukbd.c uhidev_close(&sc->sc_hdev);
sc 495 dev/usb/ukbd.c struct ukbd_softc *sc = (struct ukbd_softc *)self;
sc 503 dev/usb/ukbd.c if (sc->sc_wskbddev != NULL)
sc 504 dev/usb/ukbd.c rv = config_deactivate(sc->sc_wskbddev);
sc 505 dev/usb/ukbd.c sc->sc_dying = 1;
sc 514 dev/usb/ukbd.c struct ukbd_softc *sc = (struct ukbd_softc *)self;
sc 517 dev/usb/ukbd.c DPRINTF(("ukbd_detach: sc=%p flags=%d\n", sc, flags));
sc 519 dev/usb/ukbd.c if (sc->sc_console_keyboard) {
sc 539 dev/usb/ukbd.c sc->sc_hdev.sc_dev.dv_xname);
sc 545 dev/usb/ukbd.c if (sc->sc_wskbddev != NULL)
sc 546 dev/usb/ukbd.c rv = config_detach(sc->sc_wskbddev, flags);
sc 549 dev/usb/ukbd.c if (sc->sc_hdev.sc_state & UHIDEV_OPEN)
sc 550 dev/usb/ukbd.c uhidev_close(&sc->sc_hdev);
sc 558 dev/usb/ukbd.c struct ukbd_softc *sc = (struct ukbd_softc *)addr;
sc 559 dev/usb/ukbd.c struct ukbd_data *ud = &sc->sc_ndata;
sc 572 dev/usb/ukbd.c for (i = 0; i < sc->sc_nmod; i++)
sc 573 dev/usb/ukbd.c if (hid_get_data(ibuf, &sc->sc_modloc[i]))
sc 574 dev/usb/ukbd.c ud->modifiers |= sc->sc_mods[i].mask;
sc 575 dev/usb/ukbd.c memcpy(ud->keycode, (char *)ibuf + sc->sc_keycodeloc.pos / 8,
sc 576 dev/usb/ukbd.c sc->sc_nkeycode);
sc 578 dev/usb/ukbd.c if (sc->sc_debounce && !sc->sc_polling) {
sc 585 dev/usb/ukbd.c sc->sc_data = *ud;
sc 586 dev/usb/ukbd.c timeout_del(&sc->sc_delay);
sc 587 dev/usb/ukbd.c timeout_set(&sc->sc_delay, ukbd_delayed_decode, sc);
sc 588 dev/usb/ukbd.c timeout_add(&sc->sc_delay, hz / 50);
sc 590 dev/usb/ukbd.c } else if (sc->sc_console_keyboard && !sc->sc_polling) {
sc 597 dev/usb/ukbd.c sc->sc_data = *ud;
sc 598 dev/usb/ukbd.c timeout_del(&sc->sc_delay);
sc 599 dev/usb/ukbd.c timeout_set(&sc->sc_delay, ukbd_delayed_decode, sc);
sc 600 dev/usb/ukbd.c timeout_add(&sc->sc_delay, 1);
sc 603 dev/usb/ukbd.c ukbd_decode(sc, ud);
sc 610 dev/usb/ukbd.c struct ukbd_softc *sc = addr;
sc 612 dev/usb/ukbd.c ukbd_decode(sc, &sc->sc_data);
sc 616 dev/usb/ukbd.c ukbd_decode(struct ukbd_softc *sc, struct ukbd_data *ud)
sc 632 dev/usb/ukbd.c p->unit = sc->sc_hdev.sc_dev.dv_unit;
sc 655 dev/usb/ukbd.c omod = sc->sc_odata.modifiers;
sc 657 dev/usb/ukbd.c for (i = 0; i < sc->sc_nmod; i++)
sc 658 dev/usb/ukbd.c if (( mod & sc->sc_mods[i].mask) !=
sc 659 dev/usb/ukbd.c (omod & sc->sc_mods[i].mask))
sc 660 dev/usb/ukbd.c ADDKEY(sc->sc_mods[i].key |
sc 661 dev/usb/ukbd.c (mod & sc->sc_mods[i].mask
sc 663 dev/usb/ukbd.c if (memcmp(ud->keycode, sc->sc_odata.keycode, sc->sc_nkeycode) != 0) {
sc 665 dev/usb/ukbd.c for (i = 0; i < sc->sc_nkeycode; i++) {
sc 666 dev/usb/ukbd.c key = sc->sc_odata.keycode[i];
sc 669 dev/usb/ukbd.c for (j = 0; j < sc->sc_nkeycode; j++)
sc 679 dev/usb/ukbd.c for (i = 0; i < sc->sc_nkeycode; i++) {
sc 683 dev/usb/ukbd.c for (j = 0; j < sc->sc_nkeycode; j++)
sc 684 dev/usb/ukbd.c if (key == sc->sc_odata.keycode[j])
sc 692 dev/usb/ukbd.c sc->sc_odata = *ud;
sc 697 dev/usb/ukbd.c if (sc->sc_polling) {
sc 699 dev/usb/ukbd.c memcpy(sc->sc_pollchars, ibuf, nkeys * sizeof(u_int16_t));
sc 700 dev/usb/ukbd.c sc->sc_npollchar = nkeys;
sc 704 dev/usb/ukbd.c if (sc->sc_rawkbd) {
sc 722 dev/usb/ukbd.c sc->sc_rep[npress++] = 0xe0;
sc 723 dev/usb/ukbd.c sc->sc_rep[npress++] = c & 0x7f;
sc 731 dev/usb/ukbd.c wskbd_rawinput(sc->sc_wskbddev, cbuf, j);
sc 733 dev/usb/ukbd.c timeout_del(&sc->sc_rawrepeat_ch);
sc 735 dev/usb/ukbd.c sc->sc_nrep = npress;
sc 736 dev/usb/ukbd.c timeout_del(&sc->sc_rawrepeat_ch);
sc 737 dev/usb/ukbd.c timeout_set(&sc->sc_rawrepeat_ch, ukbd_rawrepeat, sc);
sc 738 dev/usb/ukbd.c timeout_add(&sc->sc_rawrepeat_ch,
sc 748 dev/usb/ukbd.c wskbd_input(sc->sc_wskbddev,
sc 758 dev/usb/ukbd.c struct ukbd_softc *sc = v;
sc 762 dev/usb/ukbd.c sc, leds, sc->sc_leds));
sc 764 dev/usb/ukbd.c if (sc->sc_dying)
sc 767 dev/usb/ukbd.c if (sc->sc_leds == leds)
sc 769 dev/usb/ukbd.c sc->sc_leds = leds;
sc 772 dev/usb/ukbd.c if ((leds & WSKBD_LED_SCROLL) && sc->sc_scroloc.size == 1)
sc 773 dev/usb/ukbd.c res |= 1 << sc->sc_scroloc.pos;
sc 774 dev/usb/ukbd.c if ((leds & WSKBD_LED_NUM) && sc->sc_numloc.size == 1)
sc 775 dev/usb/ukbd.c res |= 1 << sc->sc_numloc.pos;
sc 776 dev/usb/ukbd.c if ((leds & WSKBD_LED_CAPS) && sc->sc_capsloc.size == 1)
sc 777 dev/usb/ukbd.c res |= 1 << sc->sc_capsloc.pos;
sc 778 dev/usb/ukbd.c uhidev_set_report_async(&sc->sc_hdev, UHID_OUTPUT_REPORT, &res, 1);
sc 785 dev/usb/ukbd.c struct ukbd_softc *sc = v;
sc 789 dev/usb/ukbd.c wskbd_rawinput(sc->sc_wskbddev, sc->sc_rep, sc->sc_nrep);
sc 791 dev/usb/ukbd.c timeout_del(&sc->sc_rawrepeat_ch);
sc 792 dev/usb/ukbd.c timeout_set(&sc->sc_rawrepeat_ch, ukbd_rawrepeat, sc);
sc 793 dev/usb/ukbd.c timeout_add(&sc->sc_rawrepeat_ch, hz * REP_DELAYN / 1000);
sc 800 dev/usb/ukbd.c struct ukbd_softc *sc = v;
sc 810 dev/usb/ukbd.c *(int *)data = sc->sc_leds;
sc 815 dev/usb/ukbd.c sc->sc_rawkbd = *(int *)data == WSKBD_RAW;
sc 816 dev/usb/ukbd.c timeout_del(&sc->sc_rawrepeat_ch);
sc 833 dev/usb/ukbd.c struct ukbd_softc *sc = v;
sc 850 dev/usb/ukbd.c sc->sc_polling = 1;
sc 851 dev/usb/ukbd.c while(sc->sc_npollchar <= 0)
sc 852 dev/usb/ukbd.c usbd_dopoll(sc->sc_hdev.sc_parent->sc_iface);
sc 853 dev/usb/ukbd.c sc->sc_polling = 0;
sc 854 dev/usb/ukbd.c c = sc->sc_pollchars[0];
sc 855 dev/usb/ukbd.c sc->sc_npollchar--;
sc 856 dev/usb/ukbd.c memcpy(sc->sc_pollchars, sc->sc_pollchars+1,
sc 857 dev/usb/ukbd.c sc->sc_npollchar * sizeof(u_int16_t));
sc 868 dev/usb/ukbd.c struct ukbd_softc *sc = v;
sc 873 dev/usb/ukbd.c usbd_interface2device_handle(sc->sc_hdev.sc_parent->sc_iface, &dev);
sc 875 dev/usb/ukbd.c sc->sc_spl = splusb();
sc 878 dev/usb/ukbd.c splx(sc->sc_spl);
sc 898 dev/usb/ukbd.c ukbd_parse_desc(struct ukbd_softc *sc)
sc 906 dev/usb/ukbd.c uhidev_get_report_desc(sc->sc_hdev.sc_parent, &desc, &size);
sc 908 dev/usb/ukbd.c sc->sc_nkeycode = 0;
sc 915 dev/usb/ukbd.c h.report_ID != sc->sc_hdev.sc_report_id)
sc 925 dev/usb/ukbd.c sc->sc_modloc[imod] = h.loc;
sc 926 dev/usb/ukbd.c sc->sc_mods[imod].mask = 1 << imod;
sc 927 dev/usb/ukbd.c sc->sc_mods[imod].key = HID_GET_USAGE(h.usage);
sc 939 dev/usb/ukbd.c if (sc->sc_nkeycode != 0)
sc 941 dev/usb/ukbd.c sc->sc_keycodeloc = h.loc;
sc 942 dev/usb/ukbd.c sc->sc_nkeycode = h.loc.count;
sc 945 dev/usb/ukbd.c sc->sc_nmod = imod;
sc 949 dev/usb/ukbd.c sc->sc_hdev.sc_report_id, hid_output, &sc->sc_numloc, NULL);
sc 951 dev/usb/ukbd.c sc->sc_hdev.sc_report_id, hid_output, &sc->sc_capsloc, NULL);
sc 953 dev/usb/ukbd.c sc->sc_hdev.sc_report_id, hid_output, &sc->sc_scroloc, NULL);
sc 171 dev/usb/ulpt.c struct ulpt_softc *sc = (struct ulpt_softc *)self;
sc 184 dev/usb/ulpt.c DPRINTFN(10,("ulpt_attach: sc=%p\n", sc));
sc 187 dev/usb/ulpt.c printf("\n%s: %s, iclass %d/%d\n", sc->sc_dev.dv_xname,
sc 197 dev/usb/ulpt.c sc->sc_dev.dv_xname);
sc 229 dev/usb/ulpt.c sc->sc_dev.dv_xname);
sc 230 dev/usb/ulpt.c sc->sc_dying = 1;
sc 238 dev/usb/ulpt.c sc->sc_in = -1;
sc 239 dev/usb/ulpt.c sc->sc_out = -1;
sc 244 dev/usb/ulpt.c sc->sc_dev.dv_xname, i);
sc 249 dev/usb/ulpt.c sc->sc_in = ed->bEndpointAddress;
sc 252 dev/usb/ulpt.c sc->sc_out = ed->bEndpointAddress;
sc 255 dev/usb/ulpt.c if (sc->sc_out == -1) {
sc 257 dev/usb/ulpt.c sc->sc_dev.dv_xname);
sc 258 dev/usb/ulpt.c sc->sc_dying = 1;
sc 264 dev/usb/ulpt.c sc->sc_in = -1;
sc 267 dev/usb/ulpt.c printf("%s: using %s-directional mode\n", sc->sc_dev.dv_xname,
sc 268 dev/usb/ulpt.c sc->sc_in >= 0 ? "bi" : "uni");
sc 270 dev/usb/ulpt.c DPRINTFN(10, ("ulpt_attach: bulk=%d\n", sc->sc_out));
sc 272 dev/usb/ulpt.c sc->sc_iface = iface;
sc 273 dev/usb/ulpt.c sc->sc_ifaceno = id->bInterfaceNumber;
sc 274 dev/usb/ulpt.c sc->sc_udev = dev;
sc 295 dev/usb/ulpt.c printf("%s: cannot get device id\n", sc->sc_dev.dv_xname);
sc 298 dev/usb/ulpt.c sc->sc_dev.dv_xname);
sc 305 dev/usb/ulpt.c printf("%s: device id <", sc->sc_dev.dv_xname);
sc 311 dev/usb/ulpt.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 312 dev/usb/ulpt.c &sc->sc_dev);
sc 318 dev/usb/ulpt.c struct ulpt_softc *sc = (struct ulpt_softc *)self;
sc 325 dev/usb/ulpt.c sc->sc_dying = 1;
sc 334 dev/usb/ulpt.c struct ulpt_softc *sc = (struct ulpt_softc *)self;
sc 338 dev/usb/ulpt.c DPRINTF(("ulpt_detach: sc=%p\n", sc));
sc 340 dev/usb/ulpt.c sc->sc_dying = 1;
sc 341 dev/usb/ulpt.c if (sc->sc_out_pipe != NULL)
sc 342 dev/usb/ulpt.c usbd_abort_pipe(sc->sc_out_pipe);
sc 343 dev/usb/ulpt.c if (sc->sc_in_pipe != NULL)
sc 344 dev/usb/ulpt.c usbd_abort_pipe(sc->sc_in_pipe);
sc 347 dev/usb/ulpt.c if (--sc->sc_refcnt >= 0) {
sc 350 dev/usb/ulpt.c usb_detach_wait(&sc->sc_dev);
sc 364 dev/usb/ulpt.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 365 dev/usb/ulpt.c &sc->sc_dev);
sc 371 dev/usb/ulpt.c ulpt_status(struct ulpt_softc *sc)
sc 380 dev/usb/ulpt.c USETW(req.wIndex, sc->sc_ifaceno);
sc 382 dev/usb/ulpt.c err = usbd_do_request(sc->sc_udev, &req, &status);
sc 391 dev/usb/ulpt.c ulpt_reset(struct ulpt_softc *sc)
sc 398 dev/usb/ulpt.c USETW(req.wIndex, sc->sc_ifaceno);
sc 408 dev/usb/ulpt.c if (usbd_do_request(sc->sc_udev, &req, 0)) { /* 1.0 */
sc 410 dev/usb/ulpt.c (void)usbd_do_request(sc->sc_udev, &req, 0); /* 1.1 */
sc 417 dev/usb/ulpt.c struct ulpt_softc *sc = priv;
sc 421 dev/usb/ulpt.c if (xfer == sc->sc_in_xfer1)
sc 422 dev/usb/ulpt.c usbd_transfer(sc->sc_in_xfer2);
sc 424 dev/usb/ulpt.c usbd_transfer(sc->sc_in_xfer1);
sc 436 dev/usb/ulpt.c struct ulpt_softc *sc;
sc 442 dev/usb/ulpt.c sc = ulpt_cd.cd_devs[ULPTUNIT(dev)];
sc 443 dev/usb/ulpt.c if (sc == NULL)
sc 446 dev/usb/ulpt.c if (sc == NULL || sc->sc_iface == NULL || sc->sc_dying)
sc 449 dev/usb/ulpt.c if (sc->sc_state)
sc 452 dev/usb/ulpt.c sc->sc_state = ULPT_INIT;
sc 453 dev/usb/ulpt.c sc->sc_flags = flags;
sc 457 dev/usb/ulpt.c sc->sc_refcnt++;
sc 460 dev/usb/ulpt.c ulpt_reset(sc);
sc 462 dev/usb/ulpt.c for (spin = 0; (ulpt_status(sc) & LPS_SELECT) == 0; spin += STEP) {
sc 466 dev/usb/ulpt.c sc->sc_state = 0;
sc 471 dev/usb/ulpt.c error = tsleep((caddr_t)sc, LPTPRI | PCATCH, "ulptop", STEP);
sc 473 dev/usb/ulpt.c sc->sc_state = 0;
sc 477 dev/usb/ulpt.c if (sc->sc_dying) {
sc 479 dev/usb/ulpt.c sc->sc_state = 0;
sc 484 dev/usb/ulpt.c err = usbd_open_pipe(sc->sc_iface, sc->sc_out, 0, &sc->sc_out_pipe);
sc 486 dev/usb/ulpt.c sc->sc_state = 0;
sc 490 dev/usb/ulpt.c if (ulptusein && sc->sc_in != -1) {
sc 492 dev/usb/ulpt.c err = usbd_open_pipe(sc->sc_iface, sc->sc_in,0,&sc->sc_in_pipe);
sc 495 dev/usb/ulpt.c usbd_close_pipe(sc->sc_out_pipe);
sc 496 dev/usb/ulpt.c sc->sc_out_pipe = NULL;
sc 497 dev/usb/ulpt.c sc->sc_state = 0;
sc 500 dev/usb/ulpt.c sc->sc_in_xfer1 = usbd_alloc_xfer(sc->sc_udev);
sc 501 dev/usb/ulpt.c sc->sc_in_xfer2 = usbd_alloc_xfer(sc->sc_udev);
sc 502 dev/usb/ulpt.c if (sc->sc_in_xfer1 == NULL || sc->sc_in_xfer2 == NULL) {
sc 504 dev/usb/ulpt.c if (sc->sc_in_xfer1 != NULL) {
sc 505 dev/usb/ulpt.c usbd_free_xfer(sc->sc_in_xfer1);
sc 506 dev/usb/ulpt.c sc->sc_in_xfer1 = NULL;
sc 508 dev/usb/ulpt.c if (sc->sc_in_xfer2 != NULL) {
sc 509 dev/usb/ulpt.c usbd_free_xfer(sc->sc_in_xfer2);
sc 510 dev/usb/ulpt.c sc->sc_in_xfer2 = NULL;
sc 512 dev/usb/ulpt.c usbd_close_pipe(sc->sc_out_pipe);
sc 513 dev/usb/ulpt.c sc->sc_out_pipe = NULL;
sc 514 dev/usb/ulpt.c usbd_close_pipe(sc->sc_in_pipe);
sc 515 dev/usb/ulpt.c sc->sc_in_pipe = NULL;
sc 516 dev/usb/ulpt.c sc->sc_state = 0;
sc 519 dev/usb/ulpt.c usbd_setup_xfer(sc->sc_in_xfer1, sc->sc_in_pipe, sc,
sc 520 dev/usb/ulpt.c sc->sc_junk, sizeof sc->sc_junk, USBD_SHORT_XFER_OK,
sc 522 dev/usb/ulpt.c usbd_setup_xfer(sc->sc_in_xfer2, sc->sc_in_pipe, sc,
sc 523 dev/usb/ulpt.c sc->sc_junk, sizeof sc->sc_junk, USBD_SHORT_XFER_OK,
sc 525 dev/usb/ulpt.c usbd_transfer(sc->sc_in_xfer1); /* ignore failed start */
sc 528 dev/usb/ulpt.c sc->sc_state = ULPT_OPEN;
sc 531 dev/usb/ulpt.c if (--sc->sc_refcnt < 0)
sc 532 dev/usb/ulpt.c usb_detach_wakeup(&sc->sc_dev);
sc 539 dev/usb/ulpt.c ulpt_statusmsg(u_char status, struct ulpt_softc *sc)
sc 544 dev/usb/ulpt.c new = status & ~sc->sc_laststatus;
sc 545 dev/usb/ulpt.c sc->sc_laststatus = status;
sc 548 dev/usb/ulpt.c log(LOG_NOTICE, "%s: offline\n", sc->sc_dev.dv_xname);
sc 550 dev/usb/ulpt.c log(LOG_NOTICE, "%s: out of paper\n", sc->sc_dev.dv_xname);
sc 552 dev/usb/ulpt.c log(LOG_NOTICE, "%s: output error\n", sc->sc_dev.dv_xname);
sc 560 dev/usb/ulpt.c struct ulpt_softc *sc;
sc 562 dev/usb/ulpt.c sc = ulpt_cd.cd_devs[ULPTUNIT(dev)];
sc 564 dev/usb/ulpt.c if (sc->sc_state != ULPT_OPEN)
sc 568 dev/usb/ulpt.c if (sc->sc_out_pipe != NULL) {
sc 569 dev/usb/ulpt.c usbd_close_pipe(sc->sc_out_pipe);
sc 570 dev/usb/ulpt.c sc->sc_out_pipe = NULL;
sc 572 dev/usb/ulpt.c if (sc->sc_in_pipe != NULL) {
sc 573 dev/usb/ulpt.c usbd_abort_pipe(sc->sc_in_pipe);
sc 574 dev/usb/ulpt.c usbd_close_pipe(sc->sc_in_pipe);
sc 575 dev/usb/ulpt.c sc->sc_in_pipe = NULL;
sc 576 dev/usb/ulpt.c if (sc->sc_in_xfer1 != NULL) {
sc 577 dev/usb/ulpt.c usbd_free_xfer(sc->sc_in_xfer1);
sc 578 dev/usb/ulpt.c sc->sc_in_xfer1 = NULL;
sc 580 dev/usb/ulpt.c if (sc->sc_in_xfer2 != NULL) {
sc 581 dev/usb/ulpt.c usbd_free_xfer(sc->sc_in_xfer2);
sc 582 dev/usb/ulpt.c sc->sc_in_xfer2 = NULL;
sc 586 dev/usb/ulpt.c sc->sc_state = 0;
sc 593 dev/usb/ulpt.c ulpt_do_write(struct ulpt_softc *sc, struct uio *uio, int flags)
sc 602 dev/usb/ulpt.c xfer = usbd_alloc_xfer(sc->sc_udev);
sc 611 dev/usb/ulpt.c ulpt_statusmsg(ulpt_status(sc), sc);
sc 616 dev/usb/ulpt.c err = usbd_bulk_transfer(xfer, sc->sc_out_pipe, USBD_NO_COPY,
sc 632 dev/usb/ulpt.c struct ulpt_softc *sc;
sc 635 dev/usb/ulpt.c sc = ulpt_cd.cd_devs[ULPTUNIT(dev)];
sc 637 dev/usb/ulpt.c if (sc->sc_dying)
sc 640 dev/usb/ulpt.c sc->sc_refcnt++;
sc 641 dev/usb/ulpt.c error = ulpt_do_write(sc, uio, flags);
sc 642 dev/usb/ulpt.c if (--sc->sc_refcnt < 0)
sc 643 dev/usb/ulpt.c usb_detach_wakeup(&sc->sc_dev);
sc 205 dev/usb/umass.c void umass_disco(struct umass_softc *sc);
sc 208 dev/usb/umass.c usbd_status umass_polled_transfer(struct umass_softc *sc,
sc 210 dev/usb/umass.c usbd_status umass_setup_transfer(struct umass_softc *sc,
sc 214 dev/usb/umass.c usbd_status umass_setup_ctrl_transfer(struct umass_softc *sc,
sc 218 dev/usb/umass.c void umass_clear_endpoint_stall(struct umass_softc *sc, int endpt,
sc 222 dev/usb/umass.c void umass_reset(struct umass_softc *sc, transfer_cb_f cb, void *priv);
sc 255 dev/usb/umass.c void umass_bbb_dump_cbw(struct umass_softc *sc,
sc 257 dev/usb/umass.c void umass_bbb_dump_csw(struct umass_softc *sc,
sc 259 dev/usb/umass.c void umass_dump_buffer(struct umass_softc *sc, u_int8_t *buffer,
sc 314 dev/usb/umass.c struct umass_softc *sc = (struct umass_softc *)self;
sc 325 dev/usb/umass.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 328 dev/usb/umass.c sc->sc_udev = uaa->device;
sc 329 dev/usb/umass.c sc->sc_iface = uaa->iface;
sc 330 dev/usb/umass.c sc->sc_ifaceno = uaa->ifaceno;
sc 334 dev/usb/umass.c sc->sc_wire = quirk->uq_wire;
sc 335 dev/usb/umass.c sc->sc_cmd = quirk->uq_cmd;
sc 336 dev/usb/umass.c sc->sc_quirks = quirk->uq_flags;
sc 337 dev/usb/umass.c sc->sc_busquirks = quirk->uq_busquirks;
sc 340 dev/usb/umass.c (*quirk->uq_fixup)(sc);
sc 342 dev/usb/umass.c sc->sc_wire = UMASS_WPROTO_UNSPEC;
sc 343 dev/usb/umass.c sc->sc_cmd = UMASS_CPROTO_UNSPEC;
sc 344 dev/usb/umass.c sc->sc_quirks = 0;
sc 345 dev/usb/umass.c sc->sc_busquirks = 0;
sc 348 dev/usb/umass.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 352 dev/usb/umass.c if (sc->sc_wire == UMASS_WPROTO_UNSPEC) {
sc 355 dev/usb/umass.c sc->sc_wire = UMASS_WPROTO_CBI;
sc 358 dev/usb/umass.c sc->sc_wire = UMASS_WPROTO_CBI_I;
sc 362 dev/usb/umass.c sc->sc_wire = UMASS_WPROTO_BBB;
sc 367 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 373 dev/usb/umass.c if (sc->sc_cmd == UMASS_CPROTO_UNSPEC) {
sc 376 dev/usb/umass.c sc->sc_cmd = UMASS_CPROTO_SCSI;
sc 379 dev/usb/umass.c sc->sc_cmd = UMASS_CPROTO_UFI;
sc 384 dev/usb/umass.c sc->sc_cmd = UMASS_CPROTO_ATAPI;
sc 387 dev/usb/umass.c sc->sc_cmd = UMASS_CPROTO_RBC;
sc 392 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 398 dev/usb/umass.c switch (sc->sc_wire) {
sc 413 dev/usb/umass.c switch (sc->sc_cmd) {
sc 434 dev/usb/umass.c printf("%s: using %s over %s\n", sc->sc_dev.dv_xname, sCommand,
sc 438 dev/usb/umass.c err = (*quirk->uq_init)(sc);
sc 440 dev/usb/umass.c umass_disco(sc);
sc 457 dev/usb/umass.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 460 dev/usb/umass.c sc->sc_dev.dv_xname);
sc 465 dev/usb/umass.c sc->sc_epaddr[UMASS_BULKIN] = ed->bEndpointAddress;
sc 468 dev/usb/umass.c sc->sc_epaddr[UMASS_BULKOUT] = ed->bEndpointAddress;
sc 469 dev/usb/umass.c } else if (sc->sc_wire == UMASS_WPROTO_CBI_I
sc 472 dev/usb/umass.c sc->sc_epaddr[UMASS_INTRIN] = ed->bEndpointAddress;
sc 476 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 484 dev/usb/umass.c if (!sc->sc_epaddr[UMASS_BULKIN] || !sc->sc_epaddr[UMASS_BULKOUT] ||
sc 485 dev/usb/umass.c (sc->sc_wire == UMASS_WPROTO_CBI_I &&
sc 486 dev/usb/umass.c !sc->sc_epaddr[UMASS_INTRIN])) {
sc 488 dev/usb/umass.c sc->sc_dev.dv_xname, sc->sc_epaddr[UMASS_BULKIN],
sc 489 dev/usb/umass.c sc->sc_epaddr[UMASS_BULKOUT],
sc 490 dev/usb/umass.c sc->sc_epaddr[UMASS_INTRIN]));
sc 497 dev/usb/umass.c if (sc->sc_wire == UMASS_WPROTO_BBB) {
sc 498 dev/usb/umass.c err = umass_bbb_get_max_lun(sc, &sc->maxlun);
sc 501 dev/usb/umass.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 505 dev/usb/umass.c sc->maxlun = 0;
sc 510 dev/usb/umass.c sc->sc_dev.dv_xname, sc->sc_iface,
sc 511 dev/usb/umass.c sc->sc_epaddr[UMASS_BULKOUT]));
sc 512 dev/usb/umass.c err = usbd_open_pipe(sc->sc_iface, sc->sc_epaddr[UMASS_BULKOUT],
sc 514 dev/usb/umass.c &sc->sc_pipe[UMASS_BULKOUT]);
sc 517 dev/usb/umass.c sc->sc_dev.dv_xname, sc->sc_epaddr[UMASS_BULKOUT]));
sc 518 dev/usb/umass.c umass_disco(sc);
sc 522 dev/usb/umass.c sc->sc_dev.dv_xname, sc->sc_iface,
sc 523 dev/usb/umass.c sc->sc_epaddr[UMASS_BULKIN]));
sc 524 dev/usb/umass.c err = usbd_open_pipe(sc->sc_iface, sc->sc_epaddr[UMASS_BULKIN],
sc 525 dev/usb/umass.c USBD_EXCLUSIVE_USE, &sc->sc_pipe[UMASS_BULKIN]);
sc 528 dev/usb/umass.c sc->sc_dev.dv_xname, sc->sc_epaddr[UMASS_BULKIN]));
sc 529 dev/usb/umass.c umass_disco(sc);
sc 544 dev/usb/umass.c if (sc->sc_wire == UMASS_WPROTO_CBI_I) {
sc 546 dev/usb/umass.c sc->sc_dev.dv_xname, sc->sc_iface,
sc 547 dev/usb/umass.c sc->sc_epaddr[UMASS_INTRIN]));
sc 548 dev/usb/umass.c err = usbd_open_pipe(sc->sc_iface, sc->sc_epaddr[UMASS_INTRIN],
sc 549 dev/usb/umass.c USBD_EXCLUSIVE_USE, &sc->sc_pipe[UMASS_INTRIN]);
sc 552 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 553 dev/usb/umass.c sc->sc_epaddr[UMASS_INTRIN]));
sc 554 dev/usb/umass.c umass_disco(sc);
sc 560 dev/usb/umass.c sc->transfer_state = TSTATE_IDLE;
sc 564 dev/usb/umass.c sc->transfer_xfer[i] = usbd_alloc_xfer(uaa->device);
sc 565 dev/usb/umass.c if (sc->transfer_xfer[i] == NULL) {
sc 567 dev/usb/umass.c sc->sc_dev.dv_xname));
sc 568 dev/usb/umass.c umass_disco(sc);
sc 573 dev/usb/umass.c switch (sc->sc_wire) {
sc 583 dev/usb/umass.c sc->data_buffer = usbd_alloc_buffer(sc->transfer_xfer[bno],
sc 585 dev/usb/umass.c if (sc->data_buffer == NULL) {
sc 586 dev/usb/umass.c umass_disco(sc);
sc 595 dev/usb/umass.c switch (sc->sc_wire) {
sc 597 dev/usb/umass.c sc->sc_methods = &umass_bbb_methods;
sc 601 dev/usb/umass.c sc->sc_methods = &umass_cbi_methods;
sc 604 dev/usb/umass.c umass_disco(sc);
sc 609 dev/usb/umass.c switch (sc->sc_cmd) {
sc 612 dev/usb/umass.c error = umass_scsi_attach(sc);
sc 618 dev/usb/umass.c error = umass_atapi_attach(sc);
sc 620 dev/usb/umass.c printf("%s: atapiscsi not configured\n", sc->sc_dev.dv_xname);
sc 625 dev/usb/umass.c printf("%s: isdata not configured\n", sc->sc_dev.dv_xname);
sc 630 dev/usb/umass.c sc->sc_dev.dv_xname, sc->sc_cmd);
sc 631 dev/usb/umass.c umass_disco(sc);
sc 635 dev/usb/umass.c printf("%s: bus attach failed\n", sc->sc_dev.dv_xname);
sc 636 dev/usb/umass.c umass_disco(sc);
sc 640 dev/usb/umass.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 641 dev/usb/umass.c &sc->sc_dev);
sc 643 dev/usb/umass.c DPRINTF(UDMASS_GEN, ("%s: Attach finished\n", sc->sc_dev.dv_xname));
sc 649 dev/usb/umass.c struct umass_softc *sc = (struct umass_softc *)self;
sc 653 dev/usb/umass.c DPRINTF(UDMASS_USB, ("%s: detached\n", sc->sc_dev.dv_xname));
sc 657 dev/usb/umass.c if (sc->sc_pipe[i] != NULL) {
sc 658 dev/usb/umass.c usbd_abort_pipe(sc->sc_pipe[i]);
sc 659 dev/usb/umass.c sc->sc_pipe[i] = NULL;
sc 665 dev/usb/umass.c if (--sc->sc_refcnt >= 0) {
sc 667 dev/usb/umass.c printf("%s: waiting for refcnt\n", sc->sc_dev.dv_xname);
sc 670 dev/usb/umass.c usb_detach_wait(&sc->sc_dev);
sc 674 dev/usb/umass.c scbus = sc->bus;
sc 679 dev/usb/umass.c sc->bus = NULL;
sc 685 dev/usb/umass.c umass_disco(sc);
sc 687 dev/usb/umass.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 688 dev/usb/umass.c &sc->sc_dev);
sc 696 dev/usb/umass.c struct umass_softc *sc = (struct umass_softc *)dev;
sc 697 dev/usb/umass.c struct umassbus_softc *scbus = sc->bus;
sc 701 dev/usb/umass.c sc->sc_dev.dv_xname, act));
sc 708 dev/usb/umass.c sc->sc_dying = 1;
sc 713 dev/usb/umass.c "returned %d\n", sc->sc_dev.dv_xname, rv));
sc 720 dev/usb/umass.c umass_disco(struct umass_softc *sc)
sc 728 dev/usb/umass.c if (sc->transfer_xfer[i] != NULL) {
sc 729 dev/usb/umass.c usbd_free_xfer(sc->transfer_xfer[i]);
sc 730 dev/usb/umass.c sc->transfer_xfer[i] = NULL;
sc 735 dev/usb/umass.c if (sc->sc_pipe[i] != NULL) {
sc 736 dev/usb/umass.c usbd_close_pipe(sc->sc_pipe[i]);
sc 737 dev/usb/umass.c sc->sc_pipe[i] = NULL;
sc 747 dev/usb/umass.c umass_polled_transfer(struct umass_softc *sc, usbd_xfer_handle xfer)
sc 751 dev/usb/umass.c if (sc->sc_dying)
sc 761 dev/usb/umass.c if (sc->polling_depth) {
sc 762 dev/usb/umass.c if (sc->next_polled_xfer)
sc 764 dev/usb/umass.c "pending\n", sc->sc_dev.dv_xname, xfer,
sc 765 dev/usb/umass.c sc->next_polled_xfer);
sc 768 dev/usb/umass.c sc->sc_dev.dv_xname, xfer));
sc 769 dev/usb/umass.c sc->next_polled_xfer = xfer;
sc 774 dev/usb/umass.c sc->polling_depth++;
sc 778 dev/usb/umass.c sc->sc_dev.dv_xname, xfer));
sc 780 dev/usb/umass.c if (err && err != USBD_IN_PROGRESS && sc->next_polled_xfer == NULL) {
sc 782 dev/usb/umass.c sc->sc_dev.dv_xname, usbd_errstr(err)));
sc 783 dev/usb/umass.c sc->polling_depth--;
sc 792 dev/usb/umass.c if (sc->next_polled_xfer != NULL) {
sc 794 dev/usb/umass.c "transaction %p\n", sc->next_polled_xfer));
sc 795 dev/usb/umass.c xfer = sc->next_polled_xfer;
sc 796 dev/usb/umass.c sc->next_polled_xfer = NULL;
sc 800 dev/usb/umass.c sc->polling_depth--;
sc 806 dev/usb/umass.c umass_setup_transfer(struct umass_softc *sc, usbd_pipe_handle pipe,
sc 812 dev/usb/umass.c if (sc->sc_dying)
sc 817 dev/usb/umass.c usbd_setup_xfer(xfer, pipe, (void *)sc, buffer, buflen,
sc 818 dev/usb/umass.c flags | sc->sc_xfer_flags, sc->timeout, sc->sc_methods->wire_state);
sc 820 dev/usb/umass.c if (sc->sc_udev->bus->use_polling) {
sc 822 dev/usb/umass.c "buflen=%d flags=0x%x timeout=%d\n", sc->sc_dev.dv_xname,
sc 823 dev/usb/umass.c buffer, buflen, flags | sc->sc_xfer_flags, sc->timeout));
sc 824 dev/usb/umass.c err = umass_polled_transfer(sc, xfer);
sc 828 dev/usb/umass.c "flags=0x%x timeout=%d\n", sc->sc_dev.dv_xname,
sc 829 dev/usb/umass.c buffer, buflen, flags | sc->sc_xfer_flags, sc->timeout));
sc 833 dev/usb/umass.c sc->sc_dev.dv_xname, usbd_errstr(err)));
sc 842 dev/usb/umass.c umass_setup_ctrl_transfer(struct umass_softc *sc, usb_device_request_t *req,
sc 847 dev/usb/umass.c if (sc->sc_dying)
sc 852 dev/usb/umass.c usbd_setup_default_xfer(xfer, sc->sc_udev, (void *) sc,
sc 854 dev/usb/umass.c sc->sc_methods->wire_state);
sc 856 dev/usb/umass.c if (sc->sc_udev->bus->use_polling) {
sc 858 dev/usb/umass.c "buflen=%d flags=0x%x\n", sc->sc_dev.dv_xname, buffer,
sc 860 dev/usb/umass.c err = umass_polled_transfer(sc, xfer);
sc 863 dev/usb/umass.c "flags=0x%x\n", sc->sc_dev.dv_xname, buffer, buflen,
sc 869 dev/usb/umass.c sc->sc_dev.dv_xname, usbd_errstr(err)));
sc 879 dev/usb/umass.c umass_adjust_transfer(struct umass_softc *sc)
sc 881 dev/usb/umass.c switch (sc->sc_cmd) {
sc 883 dev/usb/umass.c sc->cbw.bCDBLength = UFI_COMMAND_LENGTH;
sc 885 dev/usb/umass.c switch (sc->cbw.CBWCDB[0]) {
sc 887 dev/usb/umass.c if (sc->transfer_datalen > 36) {
sc 888 dev/usb/umass.c sc->transfer_datalen = 36;
sc 889 dev/usb/umass.c sc->cbw.CBWCDB[4] = 36;
sc 893 dev/usb/umass.c if (sc->transfer_datalen > 8) {
sc 894 dev/usb/umass.c sc->transfer_datalen = 8;
sc 895 dev/usb/umass.c sc->cbw.CBWCDB[7] = 0;
sc 896 dev/usb/umass.c sc->cbw.CBWCDB[8] = 8;
sc 900 dev/usb/umass.c if (sc->transfer_datalen > 18) {
sc 901 dev/usb/umass.c sc->transfer_datalen = 18;
sc 902 dev/usb/umass.c sc->cbw.CBWCDB[4] = 18;
sc 908 dev/usb/umass.c sc->cbw.bCDBLength = UFI_COMMAND_LENGTH;
sc 914 dev/usb/umass.c umass_clear_endpoint_stall(struct umass_softc *sc, int endpt,
sc 917 dev/usb/umass.c if (sc->sc_dying)
sc 921 dev/usb/umass.c sc->sc_dev.dv_xname, sc->sc_epaddr[endpt]));
sc 923 dev/usb/umass.c usbd_clear_endpoint_toggle(sc->sc_pipe[endpt]);
sc 925 dev/usb/umass.c sc->sc_req.bmRequestType = UT_WRITE_ENDPOINT;
sc 926 dev/usb/umass.c sc->sc_req.bRequest = UR_CLEAR_FEATURE;
sc 927 dev/usb/umass.c USETW(sc->sc_req.wValue, UF_ENDPOINT_HALT);
sc 928 dev/usb/umass.c USETW(sc->sc_req.wIndex, sc->sc_epaddr[endpt]);
sc 929 dev/usb/umass.c USETW(sc->sc_req.wLength, 0);
sc 930 dev/usb/umass.c umass_setup_ctrl_transfer(sc, &sc->sc_req, NULL, 0, 0, xfer);
sc 935 dev/usb/umass.c umass_reset(struct umass_softc *sc, transfer_cb_f cb, void *priv)
sc 937 dev/usb/umass.c sc->transfer_cb = cb;
sc 938 dev/usb/umass.c sc->transfer_priv = priv;
sc 941 dev/usb/umass.c sc->reset(sc, STATUS_CMD_OK);
sc 950 dev/usb/umass.c umass_bbb_reset(struct umass_softc *sc, int status)
sc 952 dev/usb/umass.c KASSERT(sc->sc_wire & UMASS_WPROTO_BBB,
sc 954 dev/usb/umass.c sc->sc_wire));
sc 956 dev/usb/umass.c if (sc->sc_dying)
sc 976 dev/usb/umass.c sc->sc_dev.dv_xname));
sc 978 dev/usb/umass.c sc->transfer_state = TSTATE_BBB_RESET1;
sc 979 dev/usb/umass.c sc->transfer_status = status;
sc 982 dev/usb/umass.c sc->sc_req.bmRequestType = UT_WRITE_CLASS_INTERFACE;
sc 983 dev/usb/umass.c sc->sc_req.bRequest = UR_BBB_RESET;
sc 984 dev/usb/umass.c USETW(sc->sc_req.wValue, 0);
sc 985 dev/usb/umass.c USETW(sc->sc_req.wIndex, sc->sc_ifaceno);
sc 986 dev/usb/umass.c USETW(sc->sc_req.wLength, 0);
sc 987 dev/usb/umass.c umass_setup_ctrl_transfer(sc, &sc->sc_req, NULL, 0, 0,
sc 988 dev/usb/umass.c sc->transfer_xfer[XFER_BBB_RESET1]);
sc 992 dev/usb/umass.c umass_bbb_transfer(struct umass_softc *sc, int lun, void *cmd, int cmdlen,
sc 1000 dev/usb/umass.c sc->sc_dev.dv_xname, *(u_char *)cmd));
sc 1002 dev/usb/umass.c KASSERT(sc->sc_wire & UMASS_WPROTO_BBB,
sc 1004 dev/usb/umass.c sc->sc_wire));
sc 1006 dev/usb/umass.c if (sc->sc_dying) {
sc 1007 dev/usb/umass.c sc->polled_xfer_status = USBD_IOERROR;
sc 1012 dev/usb/umass.c sc->timeout = timeout + USBD_DEFAULT_TIMEOUT;
sc 1036 dev/usb/umass.c ("%s: datalen > 0, but no buffer",sc->sc_dev.dv_xname));
sc 1039 dev/usb/umass.c sc->sc_dev.dv_xname, cmdlen, CBWCDBLENGTH));
sc 1042 dev/usb/umass.c sc->sc_dev.dv_xname));
sc 1045 dev/usb/umass.c sc->sc_dev.dv_xname));
sc 1048 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 1052 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 1076 dev/usb/umass.c USETDW(sc->cbw.dCBWSignature, CBWSIGNATURE);
sc 1077 dev/usb/umass.c USETDW(sc->cbw.dCBWTag, dCBWtag);
sc 1079 dev/usb/umass.c USETDW(sc->cbw.dCBWDataTransferLength, datalen);
sc 1081 dev/usb/umass.c sc->cbw.bCBWFlags = (dir == DIR_IN? CBWFLAGS_IN:CBWFLAGS_OUT);
sc 1082 dev/usb/umass.c sc->cbw.bCBWLUN = lun;
sc 1083 dev/usb/umass.c sc->cbw.bCDBLength = cmdlen;
sc 1084 dev/usb/umass.c bzero(sc->cbw.CBWCDB, sizeof(sc->cbw.CBWCDB));
sc 1085 dev/usb/umass.c memcpy(sc->cbw.CBWCDB, cmd, cmdlen);
sc 1087 dev/usb/umass.c DIF(UDMASS_BBB, umass_bbb_dump_cbw(sc, &sc->cbw));
sc 1090 dev/usb/umass.c sc->transfer_dir = dir;
sc 1091 dev/usb/umass.c sc->transfer_data = data;
sc 1092 dev/usb/umass.c sc->transfer_datalen = datalen;
sc 1093 dev/usb/umass.c sc->transfer_actlen = 0;
sc 1094 dev/usb/umass.c sc->transfer_cb = cb;
sc 1095 dev/usb/umass.c sc->transfer_priv = priv;
sc 1096 dev/usb/umass.c sc->transfer_status = STATUS_CMD_OK;
sc 1099 dev/usb/umass.c sc->transfer_state = TSTATE_BBB_COMMAND;
sc 1102 dev/usb/umass.c umass_adjust_transfer(sc);
sc 1103 dev/usb/umass.c if ((err = umass_setup_transfer(sc, sc->sc_pipe[UMASS_BULKOUT],
sc 1104 dev/usb/umass.c &sc->cbw, UMASS_BBB_CBW_SIZE, 0,
sc 1105 dev/usb/umass.c sc->transfer_xfer[XFER_BBB_CBW])))
sc 1106 dev/usb/umass.c umass_bbb_reset(sc, STATUS_WIRE_FAILED);
sc 1108 dev/usb/umass.c if (sc->sc_udev->bus->use_polling)
sc 1109 dev/usb/umass.c sc->polled_xfer_status = err;
sc 1116 dev/usb/umass.c struct umass_softc *sc = (struct umass_softc *) priv;
sc 1119 dev/usb/umass.c KASSERT(sc->sc_wire & UMASS_WPROTO_BBB,
sc 1121 dev/usb/umass.c sc->sc_wire));
sc 1123 dev/usb/umass.c if (sc->sc_dying)
sc 1138 dev/usb/umass.c sc->sc_dev.dv_xname, sc->transfer_state,
sc 1139 dev/usb/umass.c states[sc->transfer_state], xfer, usbd_errstr(err)));
sc 1141 dev/usb/umass.c switch (sc->transfer_state) {
sc 1148 dev/usb/umass.c sc->sc_dev.dv_xname));
sc 1153 dev/usb/umass.c umass_bbb_reset(sc, STATUS_WIRE_FAILED);
sc 1158 dev/usb/umass.c sc->transfer_state = TSTATE_BBB_DATA;
sc 1159 dev/usb/umass.c if (sc->transfer_dir == DIR_IN) {
sc 1160 dev/usb/umass.c if (umass_setup_transfer(sc, sc->sc_pipe[UMASS_BULKIN],
sc 1161 dev/usb/umass.c sc->data_buffer, sc->transfer_datalen,
sc 1163 dev/usb/umass.c sc->transfer_xfer[XFER_BBB_DATA]))
sc 1164 dev/usb/umass.c umass_bbb_reset(sc, STATUS_WIRE_FAILED);
sc 1167 dev/usb/umass.c } else if (sc->transfer_dir == DIR_OUT) {
sc 1168 dev/usb/umass.c memcpy(sc->data_buffer, sc->transfer_data,
sc 1169 dev/usb/umass.c sc->transfer_datalen);
sc 1170 dev/usb/umass.c if (umass_setup_transfer(sc, sc->sc_pipe[UMASS_BULKOUT],
sc 1171 dev/usb/umass.c sc->data_buffer, sc->transfer_datalen,
sc 1173 dev/usb/umass.c sc->transfer_xfer[XFER_BBB_DATA]))
sc 1174 dev/usb/umass.c umass_bbb_reset(sc, STATUS_WIRE_FAILED);
sc 1179 dev/usb/umass.c sc->sc_dev.dv_xname));
sc 1186 dev/usb/umass.c if (sc->transfer_dir != DIR_NONE) {
sc 1189 dev/usb/umass.c &sc->transfer_actlen, NULL);
sc 1191 dev/usb/umass.c sc->sc_dev.dv_xname, sc->transfer_actlen));
sc 1195 dev/usb/umass.c "%s\n", sc->sc_dev.dv_xname,
sc 1196 dev/usb/umass.c (sc->transfer_dir == DIR_IN?"in":"out"),
sc 1197 dev/usb/umass.c sc->transfer_datalen,usbd_errstr(err)));
sc 1200 dev/usb/umass.c sc->transfer_state = TSTATE_BBB_DCLEAR;
sc 1201 dev/usb/umass.c umass_clear_endpoint_stall(sc,
sc 1202 dev/usb/umass.c (sc->transfer_dir == DIR_IN?
sc 1204 dev/usb/umass.c sc->transfer_xfer[XFER_BBB_DCLEAR]);
sc 1209 dev/usb/umass.c umass_bbb_reset(sc,STATUS_WIRE_FAILED);
sc 1217 dev/usb/umass.c if (sc->transfer_dir == DIR_IN)
sc 1218 dev/usb/umass.c memcpy(sc->transfer_data, sc->data_buffer,
sc 1219 dev/usb/umass.c sc->transfer_actlen);
sc 1221 dev/usb/umass.c DIF(UDMASS_BBB, if (sc->transfer_dir == DIR_IN)
sc 1222 dev/usb/umass.c umass_dump_buffer(sc, sc->transfer_data,
sc 1223 dev/usb/umass.c sc->transfer_datalen, 48));
sc 1235 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 1236 dev/usb/umass.c (sc->transfer_dir == DIR_IN? "in":"out"),
sc 1238 dev/usb/umass.c umass_bbb_reset(sc, STATUS_WIRE_FAILED);
sc 1243 dev/usb/umass.c if (sc->transfer_state == TSTATE_BBB_COMMAND ||
sc 1244 dev/usb/umass.c sc->transfer_state == TSTATE_BBB_DATA ||
sc 1245 dev/usb/umass.c sc->transfer_state == TSTATE_BBB_DCLEAR) {
sc 1249 dev/usb/umass.c sc->transfer_state = TSTATE_BBB_STATUS1;
sc 1250 dev/usb/umass.c next_xfer = sc->transfer_xfer[XFER_BBB_CSW1];
sc 1253 dev/usb/umass.c sc->transfer_state = TSTATE_BBB_STATUS2;
sc 1254 dev/usb/umass.c next_xfer = sc->transfer_xfer[XFER_BBB_CSW2];
sc 1258 dev/usb/umass.c if (umass_setup_transfer(sc, sc->sc_pipe[UMASS_BULKIN],
sc 1259 dev/usb/umass.c &sc->csw, UMASS_BBB_CSW_SIZE, 0, next_xfer)) {
sc 1260 dev/usb/umass.c umass_bbb_reset(sc, STATUS_WIRE_FAILED);
sc 1270 dev/usb/umass.c sc->sc_dev.dv_xname, usbd_errstr(err),
sc 1271 dev/usb/umass.c (sc->transfer_state == TSTATE_BBB_STATUS1?
sc 1277 dev/usb/umass.c if (sc->transfer_state == TSTATE_BBB_STATUS1) {
sc 1278 dev/usb/umass.c sc->transfer_state = TSTATE_BBB_SCLEAR;
sc 1279 dev/usb/umass.c umass_clear_endpoint_stall(sc, UMASS_BULKIN,
sc 1280 dev/usb/umass.c sc->transfer_xfer[XFER_BBB_SCLEAR]);
sc 1283 dev/usb/umass.c umass_bbb_reset(sc, STATUS_WIRE_FAILED);
sc 1288 dev/usb/umass.c DIF(UDMASS_BBB, umass_bbb_dump_csw(sc, &sc->csw));
sc 1291 dev/usb/umass.c if ((sc->sc_quirks & UMASS_QUIRK_WRONG_CSWSIG) &&
sc 1292 dev/usb/umass.c UGETDW(sc->csw.dCSWSignature) == CSWSIGNATURE_OLYMPUS_C1)
sc 1293 dev/usb/umass.c USETDW(sc->csw.dCSWSignature, CSWSIGNATURE);
sc 1296 dev/usb/umass.c if (sc->sc_quirks & UMASS_QUIRK_WRONG_CSWTAG)
sc 1297 dev/usb/umass.c USETDW(sc->csw.dCSWTag, UGETDW(sc->cbw.dCBWTag));
sc 1300 dev/usb/umass.c if (UGETDW(sc->csw.dCSWSignature) != CSWSIGNATURE) {
sc 1305 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 1306 dev/usb/umass.c UGETDW(sc->csw.dCSWSignature),
sc 1309 dev/usb/umass.c umass_bbb_reset(sc, STATUS_WIRE_FAILED);
sc 1311 dev/usb/umass.c } else if (UGETDW(sc->csw.dCSWTag)
sc 1312 dev/usb/umass.c != UGETDW(sc->cbw.dCBWTag)) {
sc 1314 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 1315 dev/usb/umass.c UGETDW(sc->csw.dCSWTag),
sc 1316 dev/usb/umass.c UGETDW(sc->cbw.dCBWTag));
sc 1318 dev/usb/umass.c umass_bbb_reset(sc, STATUS_WIRE_FAILED);
sc 1322 dev/usb/umass.c } else if (sc->csw.bCSWStatus > CSWSTATUS_PHASE) {
sc 1324 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 1325 dev/usb/umass.c sc->csw.bCSWStatus,
sc 1328 dev/usb/umass.c umass_bbb_reset(sc, STATUS_WIRE_FAILED);
sc 1330 dev/usb/umass.c } else if (sc->csw.bCSWStatus == CSWSTATUS_PHASE) {
sc 1332 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 1333 dev/usb/umass.c UGETDW(sc->csw.dCSWDataResidue));
sc 1335 dev/usb/umass.c umass_bbb_reset(sc, STATUS_WIRE_FAILED);
sc 1338 dev/usb/umass.c } else if (sc->transfer_actlen > sc->transfer_datalen) {
sc 1341 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 1342 dev/usb/umass.c sc->transfer_actlen, sc->transfer_datalen);
sc 1344 dev/usb/umass.c } else if (sc->transfer_datalen - sc->transfer_actlen
sc 1345 dev/usb/umass.c != UGETDW(sc->csw.dCSWDataResidue)) {
sc 1347 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 1348 dev/usb/umass.c sc->transfer_datalen - sc->transfer_actlen,
sc 1349 dev/usb/umass.c UGETDW(sc->csw.dCSWDataResidue)));
sc 1351 dev/usb/umass.c umass_bbb_reset(sc, STATUS_WIRE_FAILED);
sc 1354 dev/usb/umass.c } else if (sc->csw.bCSWStatus == CSWSTATUS_FAILED) {
sc 1356 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 1357 dev/usb/umass.c UGETDW(sc->csw.dCSWDataResidue)));
sc 1360 dev/usb/umass.c sc->transfer_state = TSTATE_IDLE;
sc 1361 dev/usb/umass.c sc->transfer_cb(sc, sc->transfer_priv,
sc 1362 dev/usb/umass.c UGETDW(sc->csw.dCSWDataResidue),
sc 1368 dev/usb/umass.c sc->transfer_state = TSTATE_IDLE;
sc 1369 dev/usb/umass.c sc->transfer_cb(sc, sc->transfer_priv,
sc 1370 dev/usb/umass.c UGETDW(sc->csw.dCSWDataResidue),
sc 1380 dev/usb/umass.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1382 dev/usb/umass.c sc->transfer_state = TSTATE_BBB_RESET2;
sc 1383 dev/usb/umass.c umass_clear_endpoint_stall(sc, UMASS_BULKIN,
sc 1384 dev/usb/umass.c sc->transfer_xfer[XFER_BBB_RESET2]);
sc 1390 dev/usb/umass.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1393 dev/usb/umass.c sc->transfer_state = TSTATE_BBB_RESET3;
sc 1394 dev/usb/umass.c umass_clear_endpoint_stall(sc, UMASS_BULKOUT,
sc 1395 dev/usb/umass.c sc->transfer_xfer[XFER_BBB_RESET3]);
sc 1401 dev/usb/umass.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1404 dev/usb/umass.c sc->transfer_state = TSTATE_IDLE;
sc 1405 dev/usb/umass.c if (sc->transfer_priv) {
sc 1406 dev/usb/umass.c sc->transfer_cb(sc, sc->transfer_priv,
sc 1407 dev/usb/umass.c sc->transfer_datalen,
sc 1408 dev/usb/umass.c sc->transfer_status);
sc 1416 dev/usb/umass.c sc->sc_dev.dv_xname, sc->transfer_state);
sc 1425 dev/usb/umass.c umass_cbi_adsc(struct umass_softc *sc, char *buffer, int buflen,
sc 1428 dev/usb/umass.c KASSERT(sc->sc_wire & (UMASS_WPROTO_CBI|UMASS_WPROTO_CBI_I),
sc 1430 dev/usb/umass.c sc->sc_wire));
sc 1432 dev/usb/umass.c sc->sc_req.bmRequestType = UT_WRITE_CLASS_INTERFACE;
sc 1433 dev/usb/umass.c sc->sc_req.bRequest = UR_CBI_ADSC;
sc 1434 dev/usb/umass.c USETW(sc->sc_req.wValue, 0);
sc 1435 dev/usb/umass.c USETW(sc->sc_req.wIndex, sc->sc_ifaceno);
sc 1436 dev/usb/umass.c USETW(sc->sc_req.wLength, buflen);
sc 1437 dev/usb/umass.c return umass_setup_ctrl_transfer(sc, &sc->sc_req, buffer,
sc 1443 dev/usb/umass.c umass_cbi_reset(struct umass_softc *sc, int status)
sc 1448 dev/usb/umass.c KASSERT(sc->sc_wire & (UMASS_WPROTO_CBI|UMASS_WPROTO_CBI_I),
sc 1450 dev/usb/umass.c sc->sc_wire));
sc 1452 dev/usb/umass.c if (sc->sc_dying)
sc 1470 dev/usb/umass.c sc->sc_dev.dv_xname));
sc 1472 dev/usb/umass.c KASSERT(sizeof(sc->cbl) >= SEND_DIAGNOSTIC_CMDLEN,
sc 1474 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 1475 dev/usb/umass.c sizeof(sc->cbl), SEND_DIAGNOSTIC_CMDLEN));
sc 1477 dev/usb/umass.c sc->transfer_state = TSTATE_CBI_RESET1;
sc 1478 dev/usb/umass.c sc->transfer_status = status;
sc 1484 dev/usb/umass.c sc->cbl[0] = 0x1d; /* Command Block Reset */
sc 1485 dev/usb/umass.c sc->cbl[1] = 0x04;
sc 1487 dev/usb/umass.c sc->cbl[i] = 0xff;
sc 1489 dev/usb/umass.c umass_cbi_adsc(sc, sc->cbl, SEND_DIAGNOSTIC_CMDLEN,
sc 1490 dev/usb/umass.c sc->transfer_xfer[XFER_CBI_RESET1]);
sc 1495 dev/usb/umass.c umass_cbi_transfer(struct umass_softc *sc, int lun,
sc 1502 dev/usb/umass.c sc->sc_dev.dv_xname, *(u_char *)cmd, datalen));
sc 1504 dev/usb/umass.c KASSERT(sc->sc_wire & (UMASS_WPROTO_CBI|UMASS_WPROTO_CBI_I),
sc 1506 dev/usb/umass.c sc->sc_wire));
sc 1508 dev/usb/umass.c if (sc->sc_dying) {
sc 1509 dev/usb/umass.c sc->polled_xfer_status = USBD_IOERROR;
sc 1514 dev/usb/umass.c sc->timeout = timeout + USBD_DEFAULT_TIMEOUT;
sc 1535 dev/usb/umass.c ("%s: datalen > 0, but no buffer",sc->sc_dev.dv_xname));
sc 1538 dev/usb/umass.c sc->sc_dev.dv_xname));
sc 1541 dev/usb/umass.c sc->transfer_dir = dir;
sc 1542 dev/usb/umass.c sc->transfer_data = data;
sc 1543 dev/usb/umass.c sc->transfer_datalen = datalen;
sc 1544 dev/usb/umass.c sc->transfer_actlen = 0;
sc 1545 dev/usb/umass.c sc->transfer_cb = cb;
sc 1546 dev/usb/umass.c sc->transfer_priv = priv;
sc 1547 dev/usb/umass.c sc->transfer_status = STATUS_CMD_OK;
sc 1550 dev/usb/umass.c sc->transfer_state = TSTATE_CBI_COMMAND;
sc 1553 dev/usb/umass.c sc->cbw.bCDBLength = cmdlen;
sc 1554 dev/usb/umass.c bzero(sc->cbw.CBWCDB, sizeof(sc->cbw.CBWCDB));
sc 1555 dev/usb/umass.c memcpy(sc->cbw.CBWCDB, cmd, cmdlen);
sc 1556 dev/usb/umass.c umass_adjust_transfer(sc);
sc 1557 dev/usb/umass.c if ((err = umass_cbi_adsc(sc, (void *)sc->cbw.CBWCDB, sc->cbw.bCDBLength,
sc 1558 dev/usb/umass.c sc->transfer_xfer[XFER_CBI_CB])))
sc 1559 dev/usb/umass.c umass_cbi_reset(sc, STATUS_WIRE_FAILED);
sc 1561 dev/usb/umass.c if (sc->sc_udev->bus->use_polling)
sc 1562 dev/usb/umass.c sc->polled_xfer_status = err;
sc 1569 dev/usb/umass.c struct umass_softc *sc = (struct umass_softc *) priv;
sc 1571 dev/usb/umass.c KASSERT(sc->sc_wire & (UMASS_WPROTO_CBI|UMASS_WPROTO_CBI_I),
sc 1573 dev/usb/umass.c sc->sc_wire));
sc 1575 dev/usb/umass.c if (sc->sc_dying)
sc 1583 dev/usb/umass.c sc->sc_dev.dv_xname, sc->transfer_state,
sc 1584 dev/usb/umass.c states[sc->transfer_state], xfer, usbd_errstr(err)));
sc 1586 dev/usb/umass.c switch (sc->transfer_state) {
sc 1592 dev/usb/umass.c sc->sc_dev.dv_xname));
sc 1602 dev/usb/umass.c sc->transfer_state = TSTATE_IDLE;
sc 1603 dev/usb/umass.c sc->transfer_cb(sc, sc->transfer_priv,
sc 1604 dev/usb/umass.c sc->transfer_datalen,
sc 1610 dev/usb/umass.c sc->sc_dev.dv_xname));
sc 1611 dev/usb/umass.c umass_cbi_reset(sc, STATUS_WIRE_FAILED);
sc 1616 dev/usb/umass.c sc->transfer_state = TSTATE_CBI_DATA;
sc 1617 dev/usb/umass.c if (sc->transfer_dir == DIR_IN) {
sc 1618 dev/usb/umass.c if (umass_setup_transfer(sc, sc->sc_pipe[UMASS_BULKIN],
sc 1619 dev/usb/umass.c sc->data_buffer, sc->transfer_datalen,
sc 1621 dev/usb/umass.c sc->transfer_xfer[XFER_CBI_DATA]))
sc 1622 dev/usb/umass.c umass_cbi_reset(sc, STATUS_WIRE_FAILED);
sc 1625 dev/usb/umass.c } else if (sc->transfer_dir == DIR_OUT) {
sc 1626 dev/usb/umass.c memcpy(sc->data_buffer, sc->transfer_data,
sc 1627 dev/usb/umass.c sc->transfer_datalen);
sc 1628 dev/usb/umass.c if (umass_setup_transfer(sc, sc->sc_pipe[UMASS_BULKOUT],
sc 1629 dev/usb/umass.c sc->data_buffer, sc->transfer_datalen,
sc 1631 dev/usb/umass.c sc->transfer_xfer[XFER_CBI_DATA]))
sc 1632 dev/usb/umass.c umass_cbi_reset(sc, STATUS_WIRE_FAILED);
sc 1637 dev/usb/umass.c sc->sc_dev.dv_xname));
sc 1644 dev/usb/umass.c if (sc->transfer_dir != DIR_NONE) {
sc 1647 dev/usb/umass.c &sc->transfer_actlen, NULL);
sc 1649 dev/usb/umass.c sc->sc_dev.dv_xname, sc->transfer_actlen));
sc 1653 dev/usb/umass.c "%s\n", sc->sc_dev.dv_xname,
sc 1654 dev/usb/umass.c (sc->transfer_dir == DIR_IN?"in":"out"),
sc 1655 dev/usb/umass.c sc->transfer_datalen,usbd_errstr(err)));
sc 1658 dev/usb/umass.c sc->transfer_state = TSTATE_CBI_DCLEAR;
sc 1659 dev/usb/umass.c umass_clear_endpoint_stall(sc,
sc 1660 dev/usb/umass.c (sc->transfer_dir == DIR_IN?
sc 1662 dev/usb/umass.c sc->transfer_xfer[XFER_CBI_DCLEAR]);
sc 1667 dev/usb/umass.c umass_cbi_reset(sc, STATUS_WIRE_FAILED);
sc 1673 dev/usb/umass.c if (sc->transfer_dir == DIR_IN)
sc 1674 dev/usb/umass.c memcpy(sc->transfer_data, sc->data_buffer,
sc 1675 dev/usb/umass.c sc->transfer_actlen);
sc 1677 dev/usb/umass.c DIF(UDMASS_CBI, if (sc->transfer_dir == DIR_IN)
sc 1678 dev/usb/umass.c umass_dump_buffer(sc, sc->transfer_data,
sc 1679 dev/usb/umass.c sc->transfer_actlen, 48));
sc 1682 dev/usb/umass.c if (sc->sc_wire == UMASS_WPROTO_CBI_I) {
sc 1683 dev/usb/umass.c sc->transfer_state = TSTATE_CBI_STATUS;
sc 1684 dev/usb/umass.c memset(&sc->sbl, 0, sizeof(sc->sbl));
sc 1685 dev/usb/umass.c if (umass_setup_transfer(sc, sc->sc_pipe[UMASS_INTRIN],
sc 1686 dev/usb/umass.c &sc->sbl, sizeof(sc->sbl),
sc 1688 dev/usb/umass.c sc->transfer_xfer[XFER_CBI_STATUS]))
sc 1689 dev/usb/umass.c umass_cbi_reset(sc, STATUS_WIRE_FAILED);
sc 1694 dev/usb/umass.c sc->transfer_state = TSTATE_IDLE;
sc 1695 dev/usb/umass.c sc->transfer_cb(sc, sc->transfer_priv,
sc 1696 dev/usb/umass.c sc->transfer_datalen - sc->transfer_actlen,
sc 1704 dev/usb/umass.c sc->sc_dev.dv_xname));
sc 1709 dev/usb/umass.c sc->transfer_state = TSTATE_CBI_SCLEAR;
sc 1710 dev/usb/umass.c umass_clear_endpoint_stall(sc, UMASS_INTRIN,
sc 1711 dev/usb/umass.c sc->transfer_xfer[XFER_CBI_SCLEAR]);
sc 1713 dev/usb/umass.c umass_cbi_reset(sc, STATUS_WIRE_FAILED);
sc 1724 dev/usb/umass.c sc->sc_dev.dv_xname, actlen));
sc 1729 dev/usb/umass.c if (sc->sc_cmd == UMASS_CPROTO_UFI) {
sc 1739 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 1740 dev/usb/umass.c sc->sbl.ufi.asc, sc->sbl.ufi.ascq));
sc 1742 dev/usb/umass.c if ((sc->sbl.ufi.asc == 0 && sc->sbl.ufi.ascq == 0) ||
sc 1743 dev/usb/umass.c sc->sc_sense)
sc 1749 dev/usb/umass.c sc->transfer_state = TSTATE_IDLE;
sc 1750 dev/usb/umass.c sc->transfer_cb(sc, sc->transfer_priv,
sc 1751 dev/usb/umass.c sc->transfer_datalen - sc->transfer_actlen, status);
sc 1758 dev/usb/umass.c sc->sc_dev.dv_xname,
sc 1759 dev/usb/umass.c sc->sbl.common.type, sc->sbl.common.value));
sc 1761 dev/usb/umass.c if (sc->sbl.common.type == IDB_TYPE_CCI) {
sc 1762 dev/usb/umass.c switch (sc->sbl.common.value &
sc 1776 dev/usb/umass.c sc->transfer_state = TSTATE_IDLE;
sc 1777 dev/usb/umass.c sc->transfer_cb(sc, sc->transfer_priv,
sc 1778 dev/usb/umass.c sc->transfer_datalen - sc->transfer_actlen,
sc 1787 dev/usb/umass.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1788 dev/usb/umass.c umass_cbi_reset(sc, STATUS_WIRE_FAILED);
sc 1790 dev/usb/umass.c sc->transfer_state = TSTATE_IDLE;
sc 1791 dev/usb/umass.c sc->transfer_cb(sc, sc->transfer_priv,
sc 1792 dev/usb/umass.c sc->transfer_datalen, STATUS_CMD_FAILED);
sc 1799 dev/usb/umass.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1800 dev/usb/umass.c umass_cbi_reset(sc, STATUS_WIRE_FAILED);
sc 1802 dev/usb/umass.c sc->transfer_state = TSTATE_IDLE;
sc 1803 dev/usb/umass.c sc->transfer_cb(sc, sc->transfer_priv,
sc 1804 dev/usb/umass.c sc->transfer_datalen, STATUS_CMD_FAILED);
sc 1812 dev/usb/umass.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1814 dev/usb/umass.c sc->transfer_state = TSTATE_CBI_RESET2;
sc 1815 dev/usb/umass.c umass_clear_endpoint_stall(sc, UMASS_BULKIN,
sc 1816 dev/usb/umass.c sc->transfer_xfer[XFER_CBI_RESET2]);
sc 1822 dev/usb/umass.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1825 dev/usb/umass.c sc->transfer_state = TSTATE_CBI_RESET3;
sc 1826 dev/usb/umass.c umass_clear_endpoint_stall(sc, UMASS_BULKOUT,
sc 1827 dev/usb/umass.c sc->transfer_xfer[XFER_CBI_RESET3]);
sc 1833 dev/usb/umass.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1836 dev/usb/umass.c sc->transfer_state = TSTATE_IDLE;
sc 1837 dev/usb/umass.c if (sc->transfer_priv) {
sc 1838 dev/usb/umass.c sc->transfer_cb(sc, sc->transfer_priv,
sc 1839 dev/usb/umass.c sc->transfer_datalen,
sc 1840 dev/usb/umass.c sc->transfer_status);
sc 1849 dev/usb/umass.c sc->sc_dev.dv_xname, sc->transfer_state);
sc 1854 dev/usb/umass.c umass_bbb_get_max_lun(struct umass_softc *sc, u_int8_t *maxlun)
sc 1861 dev/usb/umass.c DPRINTF(UDMASS_BBB, ("%s: Get Max Lun\n", sc->sc_dev.dv_xname));
sc 1867 dev/usb/umass.c USETW(req.wIndex, sc->sc_ifaceno);
sc 1870 dev/usb/umass.c err = usbd_do_request_flags(sc->sc_udev, &req, maxlun,
sc 1875 dev/usb/umass.c sc->sc_dev.dv_xname, *maxlun));
sc 1884 dev/usb/umass.c sc->sc_dev.dv_xname));
sc 1893 dev/usb/umass.c sc->sc_dev.dv_xname));
sc 1898 dev/usb/umass.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 1908 dev/usb/umass.c umass_bbb_dump_cbw(struct umass_softc *sc, umass_bbb_cbw_t *cbw)
sc 1919 dev/usb/umass.c sc->sc_dev.dv_xname, tag, clen,
sc 1928 dev/usb/umass.c umass_bbb_dump_csw(struct umass_softc *sc, umass_bbb_csw_t *csw)
sc 1936 dev/usb/umass.c "res = %d, status = 0x%02x (%s)\n", sc->sc_dev.dv_xname,
sc 1945 dev/usb/umass.c umass_dump_buffer(struct umass_softc *sc, u_int8_t *buffer, int buflen,
sc 1961 dev/usb/umass.c sc->sc_dev.dv_xname, s1, s2));
sc 1969 dev/usb/umass.c sc->sc_dev.dv_xname, s1, s2, s3));
sc 477 dev/usb/umass_quirks.c umass_init_insystem(struct umass_softc *sc)
sc 481 dev/usb/umass_quirks.c err = usbd_set_interface(sc->sc_iface, 1);
sc 485 dev/usb/umass_quirks.c sc->sc_dev.dv_xname));
sc 493 dev/usb/umass_quirks.c umass_init_shuttle(struct umass_softc *sc)
sc 502 dev/usb/umass_quirks.c USETW(req.wIndex, sc->sc_ifaceno);
sc 505 dev/usb/umass_quirks.c return (usbd_do_request(sc->sc_udev, &req, &status));
sc 509 dev/usb/umass_quirks.c umass_fixup_sony(struct umass_softc *sc)
sc 514 dev/usb/umass_quirks.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 516 dev/usb/umass_quirks.c dd = usbd_get_device_descriptor(sc->sc_udev);
sc 525 dev/usb/umass_quirks.c sc->sc_cmd = UMASS_CPROTO_UFI;
sc 528 dev/usb/umass_quirks.c sc->sc_cmd = UMASS_CPROTO_SCSI;
sc 534 dev/usb/umass_quirks.c umass_fixup_yedata(struct umass_softc *sc)
sc 538 dev/usb/umass_quirks.c dd = usbd_get_device_descriptor(sc->sc_udev);
sc 544 dev/usb/umass_quirks.c sc->sc_wire = UMASS_WPROTO_CBI;
sc 546 dev/usb/umass_quirks.c sc->sc_wire = UMASS_WPROTO_CBI_I;
sc 81 dev/usb/umass_scsi.c void umass_scsi_cb(struct umass_softc *sc, void *priv, int residue,
sc 83 dev/usb/umass_scsi.c void umass_scsi_sense_cb(struct umass_softc *sc, void *priv, int residue,
sc 94 dev/usb/umass_scsi.c umass_scsi_attach(struct umass_softc *sc)
sc 99 dev/usb/umass_scsi.c scbus = umass_scsi_setup(sc);
sc 101 dev/usb/umass_scsi.c scbus->sc_link.luns = sc->maxlun + 1;
sc 111 dev/usb/umass_scsi.c sc->sc_dev.dv_xname, sc, scbus));
sc 113 dev/usb/umass_scsi.c sc->sc_refcnt++;
sc 115 dev/usb/umass_scsi.c config_found((struct device *)sc, &saa, scsiprint);
sc 116 dev/usb/umass_scsi.c if (--sc->sc_refcnt < 0)
sc 117 dev/usb/umass_scsi.c usb_detach_wakeup(&sc->sc_dev);
sc 124 dev/usb/umass_scsi.c umass_atapi_attach(struct umass_softc *sc)
sc 129 dev/usb/umass_scsi.c scbus = umass_scsi_setup(sc);
sc 141 dev/usb/umass_scsi.c sc->sc_dev.dv_xname, sc, scbus));
sc 143 dev/usb/umass_scsi.c sc->sc_refcnt++;
sc 144 dev/usb/umass_scsi.c scbus->base.sc_child = config_found((struct device *)sc,
sc 146 dev/usb/umass_scsi.c if (--sc->sc_refcnt < 0)
sc 147 dev/usb/umass_scsi.c usb_detach_wakeup(&sc->sc_dev);
sc 154 dev/usb/umass_scsi.c umass_scsi_setup(struct umass_softc *sc)
sc 162 dev/usb/umass_scsi.c sc->bus = (struct umassbus_softc *)scbus;
sc 171 dev/usb/umass_scsi.c scbus->sc_link.adapter_softc = sc;
sc 173 dev/usb/umass_scsi.c scbus->sc_link.quirks |= SDEV_ONLYBIG | sc->sc_busquirks;
sc 182 dev/usb/umass_scsi.c struct umass_softc *sc = sc_link->adapter_softc;
sc 188 dev/usb/umass_scsi.c microtime(&sc->tv);
sc 195 dev/usb/umass_scsi.c sc->sc_dev.dv_xname, sc->tv.tv_sec, sc->tv.tv_usec,
sc 206 dev/usb/umass_scsi.c if (sc->sc_dying) {
sc 214 dev/usb/umass_scsi.c sc->sc_dev.dv_xname, sc_link->target));
sc 243 dev/usb/umass_scsi.c usbd_set_polling(sc->sc_udev, 1);
sc 244 dev/usb/umass_scsi.c sc->sc_xfer_flags = USBD_SYNCHRONOUS;
sc 245 dev/usb/umass_scsi.c sc->polled_xfer_status = USBD_INVAL;
sc 246 dev/usb/umass_scsi.c sc->sc_methods->wire_xfer(sc, sc_link->lun, cmd, cmdlen,
sc 249 dev/usb/umass_scsi.c sc->sc_xfer_flags = 0;
sc 251 dev/usb/umass_scsi.c sc->polled_xfer_status));
sc 253 dev/usb/umass_scsi.c switch (sc->polled_xfer_status) {
sc 265 dev/usb/umass_scsi.c usbd_set_polling(sc->sc_udev, 0);
sc 273 dev/usb/umass_scsi.c sc->sc_methods->wire_xfer(sc, sc_link->lun, cmd, cmdlen,
sc 302 dev/usb/umass_scsi.c umass_scsi_cb(struct umass_softc *sc, void *priv, int residue, int status)
sc 304 dev/usb/umass_scsi.c struct umass_scsi_softc *scbus = (struct umass_scsi_softc *)sc->bus;
sc 313 dev/usb/umass_scsi.c delta = (tv.tv_sec - sc->tv.tv_sec) * 1000000 +
sc 314 dev/usb/umass_scsi.c tv.tv_usec - sc->tv.tv_usec;
sc 361 dev/usb/umass_scsi.c sc->sc_sense = 1;
sc 368 dev/usb/umass_scsi.c sc->sc_methods->wire_xfer(sc, link->lun,
sc 381 dev/usb/umass_scsi.c sc->sc_dev.dv_xname, status);
sc 403 dev/usb/umass_scsi.c umass_scsi_sense_cb(struct umass_softc *sc, void *priv, int residue,
sc 412 dev/usb/umass_scsi.c sc->sc_sense = 0;
sc 424 dev/usb/umass_scsi.c sc->sc_dev.dv_xname, status));
sc 41 dev/usb/umass_scsi.h int umass_scsi_attach(struct umass_softc *sc);
sc 42 dev/usb/umass_scsi.h int umass_atapi_attach(struct umass_softc *sc);
sc 191 dev/usb/umct.c struct umct_softc *sc = (struct umct_softc *)self;
sc 199 dev/usb/umct.c char *devname = sc->sc_dev.dv_xname;
sc 208 dev/usb/umct.c sc->sc_udev = dev;
sc 209 dev/usb/umct.c sc->sc_product = uaa->product;
sc 211 dev/usb/umct.c DPRINTF(("\n\numct attach: sc=%p\n", sc));
sc 215 dev/usb/umct.c sc->sc_intr_number = -1;
sc 216 dev/usb/umct.c sc->sc_intr_pipe = NULL;
sc 223 dev/usb/umct.c sc->sc_dying = 1;
sc 228 dev/usb/umct.c cdesc = usbd_get_config_descriptor(sc->sc_udev);
sc 232 dev/usb/umct.c sc->sc_dev.dv_xname);
sc 233 dev/usb/umct.c sc->sc_dying = 1;
sc 239 dev/usb/umct.c &sc->sc_iface);
sc 243 dev/usb/umct.c sc->sc_dying = 1;
sc 249 dev/usb/umct.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 250 dev/usb/umct.c sc->sc_iface_number = id->bInterfaceNumber;
sc 253 dev/usb/umct.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 256 dev/usb/umct.c sc->sc_dev.dv_xname, i);
sc 257 dev/usb/umct.c sc->sc_dying = 1;
sc 275 dev/usb/umct.c sc->sc_intr_number = ed->bEndpointAddress;
sc 276 dev/usb/umct.c sc->sc_isize = UGETW(ed->wMaxPacketSize);
sc 282 dev/usb/umct.c sc->sc_dev.dv_xname);
sc 283 dev/usb/umct.c sc->sc_dying = 1;
sc 289 dev/usb/umct.c sc->sc_dev.dv_xname);
sc 290 dev/usb/umct.c sc->sc_dying = 1;
sc 294 dev/usb/umct.c if (sc->sc_intr_number== -1) {
sc 296 dev/usb/umct.c sc->sc_dev.dv_xname);
sc 297 dev/usb/umct.c sc->sc_dying = 1;
sc 301 dev/usb/umct.c sc->sc_dtr = sc->sc_rts = 0;
sc 305 dev/usb/umct.c if (sc->sc_product == USB_PRODUCT_MCT_SITECOM_USB232)
sc 312 dev/usb/umct.c uca.iface = sc->sc_iface;
sc 314 dev/usb/umct.c uca.arg = sc;
sc 317 dev/usb/umct.c umct_init(sc);
sc 319 dev/usb/umct.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 320 dev/usb/umct.c &sc->sc_dev);
sc 323 dev/usb/umct.c uca.bulkin, uca.bulkout, sc->sc_intr_number ));
sc 324 dev/usb/umct.c sc->sc_subdev = config_found_sm(self, &uca, ucomprint, ucomsubmatch);
sc 330 dev/usb/umct.c struct umct_softc *sc = (struct umct_softc *)self;
sc 333 dev/usb/umct.c DPRINTF(("umct_detach: sc=%p flags=%d\n", sc, flags));
sc 335 dev/usb/umct.c if (sc->sc_intr_pipe != NULL) {
sc 336 dev/usb/umct.c usbd_abort_pipe(sc->sc_intr_pipe);
sc 337 dev/usb/umct.c usbd_close_pipe(sc->sc_intr_pipe);
sc 338 dev/usb/umct.c free(sc->sc_intr_buf, M_USBDEV);
sc 339 dev/usb/umct.c sc->sc_intr_pipe = NULL;
sc 342 dev/usb/umct.c sc->sc_dying = 1;
sc 343 dev/usb/umct.c if (sc->sc_subdev != NULL) {
sc 344 dev/usb/umct.c rv = config_detach(sc->sc_subdev, flags);
sc 345 dev/usb/umct.c sc->sc_subdev = NULL;
sc 348 dev/usb/umct.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 349 dev/usb/umct.c &sc->sc_dev);
sc 357 dev/usb/umct.c struct umct_softc *sc = (struct umct_softc *)self;
sc 365 dev/usb/umct.c if (sc->sc_subdev != NULL)
sc 366 dev/usb/umct.c rv = config_deactivate(sc->sc_subdev);
sc 367 dev/usb/umct.c sc->sc_dying = 1;
sc 374 dev/usb/umct.c umct_set_line_state(struct umct_softc *sc)
sc 379 dev/usb/umct.c ls = (sc->sc_dtr ? MCR_DTR : 0) |
sc 380 dev/usb/umct.c (sc->sc_rts ? MCR_RTS : 0);
sc 383 dev/usb/umct.c sc->sc_dtr, sc->sc_rts, ls));
sc 388 dev/usb/umct.c USETW(req.wIndex, sc->sc_iface_number);
sc 391 dev/usb/umct.c (void)usbd_do_request(sc->sc_udev, &req, &ls);
sc 397 dev/usb/umct.c struct umct_softc *sc = addr;
sc 401 dev/usb/umct.c umct_dtr(sc, onoff);
sc 404 dev/usb/umct.c umct_rts(sc, onoff);
sc 407 dev/usb/umct.c umct_break(sc, onoff);
sc 415 dev/usb/umct.c umct_dtr(struct umct_softc *sc, int onoff)
sc 420 dev/usb/umct.c if (sc->sc_dtr == onoff)
sc 422 dev/usb/umct.c sc->sc_dtr = onoff;
sc 424 dev/usb/umct.c umct_set_line_state(sc);
sc 428 dev/usb/umct.c umct_rts(struct umct_softc *sc, int onoff)
sc 432 dev/usb/umct.c if (sc->sc_rts == onoff)
sc 434 dev/usb/umct.c sc->sc_rts = onoff;
sc 436 dev/usb/umct.c umct_set_line_state(sc);
sc 440 dev/usb/umct.c umct_break(struct umct_softc *sc, int onoff)
sc 444 dev/usb/umct.c umct_set_lcr(sc, onoff ? sc->last_lcr | LCR_SET_BREAK :
sc 445 dev/usb/umct.c sc->last_lcr);
sc 449 dev/usb/umct.c umct_set_lcr(struct umct_softc *sc, u_int data)
sc 458 dev/usb/umct.c USETW(req.wIndex, sc->sc_iface_number);
sc 462 dev/usb/umct.c (void)usbd_do_request(sc->sc_udev, &req, &adata);
sc 466 dev/usb/umct.c umct_set_baudrate(struct umct_softc *sc, u_int rate)
sc 472 dev/usb/umct.c if (sc->sc_product == USB_PRODUCT_MCT_SITECOM_USB232 ||
sc 473 dev/usb/umct.c sc->sc_product == USB_PRODUCT_BELKIN_F5U109) {
sc 495 dev/usb/umct.c USETW(req.wIndex, sc->sc_iface_number);
sc 499 dev/usb/umct.c (void)usbd_do_request(sc->sc_udev, &req, arate);
sc 503 dev/usb/umct.c umct_init(struct umct_softc *sc)
sc 505 dev/usb/umct.c umct_set_baudrate(sc, 9600);
sc 506 dev/usb/umct.c umct_set_lcr(sc, LCR_DATA_BITS_8 | LCR_PARITY_NONE | LCR_STOP_BITS_1);
sc 512 dev/usb/umct.c struct umct_softc *sc = addr;
sc 515 dev/usb/umct.c DPRINTF(("umct_param: sc=%p\n", sc));
sc 545 dev/usb/umct.c umct_set_baudrate(sc, t->c_ospeed);
sc 547 dev/usb/umct.c sc->last_lcr = data;
sc 548 dev/usb/umct.c umct_set_lcr(sc, data);
sc 556 dev/usb/umct.c struct umct_softc *sc = addr;
sc 559 dev/usb/umct.c if (sc->sc_dying)
sc 562 dev/usb/umct.c DPRINTF(("umct_open: sc=%p\n", sc));
sc 567 dev/usb/umct.c umct_set_lcr(sc, lcr_data);
sc 569 dev/usb/umct.c if (sc->sc_intr_number != -1 && sc->sc_intr_pipe == NULL) {
sc 570 dev/usb/umct.c sc->sc_status = 0; /* clear status bit */
sc 571 dev/usb/umct.c sc->sc_intr_buf = malloc(sc->sc_isize, M_USBDEV, M_WAITOK);
sc 572 dev/usb/umct.c err = usbd_open_pipe_intr(sc->sc_iface, sc->sc_intr_number,
sc 573 dev/usb/umct.c USBD_SHORT_XFER_OK, &sc->sc_intr_pipe, sc,
sc 574 dev/usb/umct.c sc->sc_intr_buf, sc->sc_isize,
sc 578 dev/usb/umct.c sc->sc_dev.dv_xname, sc->sc_intr_number));
sc 589 dev/usb/umct.c struct umct_softc *sc = addr;
sc 592 dev/usb/umct.c if (sc->sc_dying)
sc 597 dev/usb/umct.c if (sc->sc_intr_pipe != NULL) {
sc 598 dev/usb/umct.c err = usbd_abort_pipe(sc->sc_intr_pipe);
sc 601 dev/usb/umct.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 602 dev/usb/umct.c err = usbd_close_pipe(sc->sc_intr_pipe);
sc 605 dev/usb/umct.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 606 dev/usb/umct.c free(sc->sc_intr_buf, M_USBDEV);
sc 607 dev/usb/umct.c sc->sc_intr_pipe = NULL;
sc 614 dev/usb/umct.c struct umct_softc *sc = priv;
sc 615 dev/usb/umct.c u_char *buf = sc->sc_intr_buf;
sc 618 dev/usb/umct.c if (sc->sc_dying)
sc 625 dev/usb/umct.c DPRINTF(("%s: abnormal status: %s\n", sc->sc_dev.dv_xname,
sc 627 dev/usb/umct.c usbd_clear_endpoint_stall_async(sc->sc_intr_pipe);
sc 632 dev/usb/umct.c sc->sc_dev.dv_xname, buf[0],buf[1]));
sc 634 dev/usb/umct.c sc->sc_lsr = sc->sc_msr = 0;
sc 637 dev/usb/umct.c sc->sc_msr |= UMSR_DSR;
sc 639 dev/usb/umct.c sc->sc_msr |= UMSR_DCD;
sc 640 dev/usb/umct.c ucom_status_change((struct ucom_softc *)sc->sc_subdev);
sc 646 dev/usb/umct.c struct umct_softc *sc = addr;
sc 651 dev/usb/umct.c *lsr = sc->sc_lsr;
sc 653 dev/usb/umct.c *msr = sc->sc_msr;
sc 183 dev/usb/umidi.c struct umidi_softc *sc = (struct umidi_softc *)self;
sc 191 dev/usb/umidi.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 194 dev/usb/umidi.c sc->sc_iface = uaa->iface;
sc 195 dev/usb/umidi.c sc->sc_udev = uaa->device;
sc 197 dev/usb/umidi.c sc->sc_quirk =
sc 199 dev/usb/umidi.c printf("%s: ", sc->sc_dev.dv_xname);
sc 200 dev/usb/umidi.c umidi_print_quirk(sc->sc_quirk);
sc 203 dev/usb/umidi.c err = alloc_all_endpoints(sc);
sc 207 dev/usb/umidi.c err = alloc_all_jacks(sc);
sc 209 dev/usb/umidi.c free_all_endpoints(sc);
sc 213 dev/usb/umidi.c sc->sc_dev.dv_xname,
sc 214 dev/usb/umidi.c sc->sc_out_num_jacks, sc->sc_in_num_jacks);
sc 216 dev/usb/umidi.c err = assign_all_jacks_automatically(sc);
sc 218 dev/usb/umidi.c unbind_all_jacks(sc);
sc 219 dev/usb/umidi.c free_all_jacks(sc);
sc 220 dev/usb/umidi.c free_all_endpoints(sc);
sc 223 dev/usb/umidi.c err = attach_all_mididevs(sc);
sc 225 dev/usb/umidi.c free_all_jacks(sc);
sc 226 dev/usb/umidi.c free_all_endpoints(sc);
sc 230 dev/usb/umidi.c dump_sc(sc);
sc 233 dev/usb/umidi.c for (i = 0; i < sc->sc_in_num_endpoints; i++) {
sc 234 dev/usb/umidi.c (void)start_input_transfer(&sc->sc_in_ep[i]);
sc 238 dev/usb/umidi.c sc->sc_udev, &sc->sc_dev);
sc 242 dev/usb/umidi.c printf("%s: disabled.\n", sc->sc_dev.dv_xname);
sc 243 dev/usb/umidi.c sc->sc_dying = 1;
sc 249 dev/usb/umidi.c struct umidi_softc *sc = (struct umidi_softc *)self;
sc 257 dev/usb/umidi.c sc->sc_dying = 1;
sc 258 dev/usb/umidi.c deactivate_all_mididevs(sc);
sc 267 dev/usb/umidi.c struct umidi_softc *sc = (struct umidi_softc *)self;
sc 271 dev/usb/umidi.c sc->sc_dying = 1;
sc 272 dev/usb/umidi.c detach_all_mididevs(sc, flags);
sc 273 dev/usb/umidi.c free_all_mididevs(sc);
sc 274 dev/usb/umidi.c free_all_jacks(sc);
sc 275 dev/usb/umidi.c free_all_endpoints(sc);
sc 277 dev/usb/umidi.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 278 dev/usb/umidi.c &sc->sc_dev);
sc 295 dev/usb/umidi.c struct umidi_softc *sc = mididev->sc;
sc 297 dev/usb/umidi.c DPRINTF(("umidi_open: sc=%p\n", sc));
sc 299 dev/usb/umidi.c if (!sc)
sc 303 dev/usb/umidi.c if (sc->sc_dying)
sc 374 dev/usb/umidi.c struct umidi_softc *sc = ep->sc;
sc 377 dev/usb/umidi.c DPRINTF(("%s: alloc_pipe %p\n", sc->sc_dev.dv_xname, ep));
sc 382 dev/usb/umidi.c ep->xfer = usbd_alloc_xfer(sc->sc_udev);
sc 391 dev/usb/umidi.c err = usbd_open_pipe(sc->sc_iface, ep->addr, 0, &ep->pipe);
sc 402 dev/usb/umidi.c DPRINTF(("%s: free_pipe %p\n", ep->sc->sc_dev.dv_xname, ep));
sc 416 dev/usb/umidi.c alloc_all_endpoints(struct umidi_softc *sc)
sc 422 dev/usb/umidi.c if (UMQ_ISTYPE(sc, UMQ_TYPE_FIXED_EP)) {
sc 423 dev/usb/umidi.c err = alloc_all_endpoints_fixed_ep(sc);
sc 424 dev/usb/umidi.c } else if (UMQ_ISTYPE(sc, UMQ_TYPE_YAMAHA)) {
sc 425 dev/usb/umidi.c err = alloc_all_endpoints_yamaha(sc);
sc 427 dev/usb/umidi.c err = alloc_all_endpoints_genuine(sc);
sc 432 dev/usb/umidi.c ep = sc->sc_endpoints;
sc 433 dev/usb/umidi.c for (i=sc->sc_out_num_endpoints+sc->sc_in_num_endpoints; i>0; i--) {
sc 436 dev/usb/umidi.c while(ep != sc->sc_endpoints) {
sc 440 dev/usb/umidi.c free(sc->sc_endpoints, M_USBDEV);
sc 441 dev/usb/umidi.c sc->sc_endpoints = sc->sc_out_ep = sc->sc_in_ep = NULL;
sc 450 dev/usb/umidi.c free_all_endpoints(struct umidi_softc *sc)
sc 453 dev/usb/umidi.c for (i=0; i<sc->sc_in_num_endpoints+sc->sc_out_num_endpoints; i++)
sc 454 dev/usb/umidi.c free_pipe(&sc->sc_endpoints[i]);
sc 455 dev/usb/umidi.c if (sc->sc_endpoints != NULL)
sc 456 dev/usb/umidi.c free(sc->sc_endpoints, M_USBDEV);
sc 457 dev/usb/umidi.c sc->sc_endpoints = sc->sc_out_ep = sc->sc_in_ep = NULL;
sc 461 dev/usb/umidi.c alloc_all_endpoints_fixed_ep(struct umidi_softc *sc)
sc 469 dev/usb/umidi.c fp = umidi_get_quirk_data_from_type(sc->sc_quirk,
sc 471 dev/usb/umidi.c sc->sc_out_num_jacks = 0;
sc 472 dev/usb/umidi.c sc->sc_in_num_jacks = 0;
sc 473 dev/usb/umidi.c sc->sc_out_num_endpoints = fp->num_out_ep;
sc 474 dev/usb/umidi.c sc->sc_in_num_endpoints = fp->num_in_ep;
sc 475 dev/usb/umidi.c sc->sc_endpoints = malloc(sizeof(*sc->sc_out_ep)*
sc 476 dev/usb/umidi.c (sc->sc_out_num_endpoints+
sc 477 dev/usb/umidi.c sc->sc_in_num_endpoints),
sc 479 dev/usb/umidi.c if (!sc->sc_endpoints) {
sc 482 dev/usb/umidi.c sc->sc_out_ep = sc->sc_out_num_endpoints ? sc->sc_endpoints : NULL;
sc 483 dev/usb/umidi.c sc->sc_in_ep =
sc 484 dev/usb/umidi.c sc->sc_in_num_endpoints ?
sc 485 dev/usb/umidi.c sc->sc_endpoints+sc->sc_out_num_endpoints : NULL;
sc 487 dev/usb/umidi.c ep = &sc->sc_out_ep[0];
sc 488 dev/usb/umidi.c for (i=0; i<sc->sc_out_num_endpoints; i++) {
sc 490 dev/usb/umidi.c sc->sc_iface,
sc 494 dev/usb/umidi.c sc->sc_dev.dv_xname, fp->out_ep[i].ep));
sc 501 dev/usb/umidi.c sc->sc_dev.dv_xname, fp->out_ep[i].ep);
sc 505 dev/usb/umidi.c ep->sc = sc;
sc 509 dev/usb/umidi.c sc->sc_out_num_jacks += fp->out_ep[i].num_jacks;
sc 514 dev/usb/umidi.c ep = &sc->sc_in_ep[0];
sc 515 dev/usb/umidi.c for (i=0; i<sc->sc_in_num_endpoints; i++) {
sc 517 dev/usb/umidi.c sc->sc_iface,
sc 521 dev/usb/umidi.c sc->sc_dev.dv_xname, fp->in_ep[i].ep));
sc 528 dev/usb/umidi.c sc->sc_dev.dv_xname, fp->in_ep[i].ep);
sc 532 dev/usb/umidi.c ep->sc = sc;
sc 536 dev/usb/umidi.c sc->sc_in_num_jacks += fp->in_ep[i].num_jacks;
sc 544 dev/usb/umidi.c free(sc->sc_endpoints, M_USBDEV);
sc 545 dev/usb/umidi.c sc->sc_endpoints = NULL;
sc 550 dev/usb/umidi.c alloc_all_endpoints_yamaha(struct umidi_softc *sc)
sc 559 dev/usb/umidi.c sc->sc_out_num_jacks = sc->sc_in_num_jacks = 0;
sc 563 dev/usb/umidi.c desc = TO_D(usbd_get_interface_descriptor(sc->sc_iface));
sc 565 dev/usb/umidi.c epd = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 593 dev/usb/umidi.c sc->sc_out_num_jacks++;
sc 595 dev/usb/umidi.c sc->sc_in_num_jacks++;
sc 602 dev/usb/umidi.c if (sc->sc_out_num_jacks>UMIDI_MAX_EPJACKS)
sc 603 dev/usb/umidi.c sc->sc_out_num_jacks = UMIDI_MAX_EPJACKS;
sc 604 dev/usb/umidi.c if (sc->sc_in_num_jacks>UMIDI_MAX_EPJACKS)
sc 605 dev/usb/umidi.c sc->sc_in_num_jacks = UMIDI_MAX_EPJACKS;
sc 606 dev/usb/umidi.c if (sc->sc_out_num_jacks && out_addr) {
sc 607 dev/usb/umidi.c sc->sc_out_num_endpoints = 1;
sc 609 dev/usb/umidi.c sc->sc_out_num_endpoints = 0;
sc 610 dev/usb/umidi.c sc->sc_out_num_jacks = 0;
sc 612 dev/usb/umidi.c if (sc->sc_in_num_jacks && in_addr) {
sc 613 dev/usb/umidi.c sc->sc_in_num_endpoints = 1;
sc 615 dev/usb/umidi.c sc->sc_in_num_endpoints = 0;
sc 616 dev/usb/umidi.c sc->sc_in_num_jacks = 0;
sc 618 dev/usb/umidi.c sc->sc_endpoints = malloc(sizeof(struct umidi_endpoint)*
sc 619 dev/usb/umidi.c (sc->sc_out_num_endpoints+
sc 620 dev/usb/umidi.c sc->sc_in_num_endpoints),
sc 622 dev/usb/umidi.c if (!sc->sc_endpoints)
sc 624 dev/usb/umidi.c if (sc->sc_out_num_endpoints) {
sc 625 dev/usb/umidi.c sc->sc_out_ep = sc->sc_endpoints;
sc 626 dev/usb/umidi.c sc->sc_out_ep->sc = sc;
sc 627 dev/usb/umidi.c sc->sc_out_ep->addr = out_addr;
sc 628 dev/usb/umidi.c sc->sc_out_ep->packetsize = UGETW(epd->wMaxPacketSize);
sc 629 dev/usb/umidi.c sc->sc_out_ep->num_jacks = sc->sc_out_num_jacks;
sc 630 dev/usb/umidi.c sc->sc_out_ep->num_open = 0;
sc 631 dev/usb/umidi.c memset(sc->sc_out_ep->jacks, 0, sizeof(sc->sc_out_ep->jacks));
sc 633 dev/usb/umidi.c sc->sc_out_ep = NULL;
sc 635 dev/usb/umidi.c if (sc->sc_in_num_endpoints) {
sc 636 dev/usb/umidi.c sc->sc_in_ep = sc->sc_endpoints+sc->sc_out_num_endpoints;
sc 637 dev/usb/umidi.c sc->sc_in_ep->sc = sc;
sc 638 dev/usb/umidi.c sc->sc_in_ep->addr = in_addr;
sc 639 dev/usb/umidi.c sc->sc_in_ep->packetsize = in_packetsize;
sc 640 dev/usb/umidi.c sc->sc_in_ep->num_jacks = sc->sc_in_num_jacks;
sc 641 dev/usb/umidi.c sc->sc_in_ep->num_open = 0;
sc 642 dev/usb/umidi.c memset(sc->sc_in_ep->jacks, 0, sizeof(sc->sc_in_ep->jacks));
sc 644 dev/usb/umidi.c sc->sc_in_ep = NULL;
sc 650 dev/usb/umidi.c alloc_all_endpoints_genuine(struct umidi_softc *sc)
sc 660 dev/usb/umidi.c interface_desc = usbd_get_interface_descriptor(sc->sc_iface);
sc 662 dev/usb/umidi.c sc->sc_endpoints = p = malloc(sizeof(struct umidi_endpoint) * num_ep,
sc 667 dev/usb/umidi.c sc->sc_out_num_jacks = sc->sc_in_num_jacks = 0;
sc 668 dev/usb/umidi.c sc->sc_out_num_endpoints = sc->sc_in_num_endpoints = 0;
sc 672 dev/usb/umidi.c config_desc = usbd_get_config_descriptor(sc->sc_udev);
sc 689 dev/usb/umidi.c p->sc = sc;
sc 694 dev/usb/umidi.c sc->sc_out_num_endpoints++;
sc 695 dev/usb/umidi.c sc->sc_out_num_jacks += p->num_jacks;
sc 697 dev/usb/umidi.c sc->sc_in_num_endpoints++;
sc 698 dev/usb/umidi.c sc->sc_in_num_jacks += p->num_jacks;
sc 709 dev/usb/umidi.c num_ep = sc->sc_out_num_endpoints + sc->sc_in_num_endpoints;
sc 710 dev/usb/umidi.c p = sc->sc_endpoints;
sc 732 dev/usb/umidi.c sc->sc_out_ep = sc->sc_out_num_endpoints ? sc->sc_endpoints : NULL;
sc 733 dev/usb/umidi.c sc->sc_in_ep =
sc 734 dev/usb/umidi.c sc->sc_in_num_endpoints ?
sc 735 dev/usb/umidi.c sc->sc_endpoints+sc->sc_out_num_endpoints : NULL;
sc 746 dev/usb/umidi.c alloc_all_jacks(struct umidi_softc *sc)
sc 753 dev/usb/umidi.c sc->sc_jacks =
sc 754 dev/usb/umidi.c malloc(sizeof(*sc->sc_out_jacks)*(sc->sc_in_num_jacks+
sc 755 dev/usb/umidi.c sc->sc_out_num_jacks),
sc 757 dev/usb/umidi.c if (!sc->sc_jacks)
sc 759 dev/usb/umidi.c sc->sc_out_jacks =
sc 760 dev/usb/umidi.c sc->sc_out_num_jacks ? sc->sc_jacks : NULL;
sc 761 dev/usb/umidi.c sc->sc_in_jacks =
sc 762 dev/usb/umidi.c sc->sc_in_num_jacks ? sc->sc_jacks+sc->sc_out_num_jacks : NULL;
sc 764 dev/usb/umidi.c jack = &sc->sc_out_jacks[0];
sc 765 dev/usb/umidi.c for (i=0; i<sc->sc_out_num_jacks; i++) {
sc 776 dev/usb/umidi.c jack = &sc->sc_in_jacks[0];
sc 777 dev/usb/umidi.c for (i=0; i<sc->sc_in_num_jacks; i++) {
sc 787 dev/usb/umidi.c jack = &sc->sc_out_jacks[0];
sc 788 dev/usb/umidi.c ep = &sc->sc_out_ep[0];
sc 789 dev/usb/umidi.c for (i=0; i<sc->sc_out_num_endpoints; i++) {
sc 799 dev/usb/umidi.c jack = &sc->sc_in_jacks[0];
sc 800 dev/usb/umidi.c ep = &sc->sc_in_ep[0];
sc 801 dev/usb/umidi.c for (i=0; i<sc->sc_in_num_endpoints; i++) {
sc 816 dev/usb/umidi.c free_all_jacks(struct umidi_softc *sc)
sc 821 dev/usb/umidi.c if (sc->sc_out_jacks) {
sc 822 dev/usb/umidi.c free(sc->sc_jacks, M_USBDEV);
sc 823 dev/usb/umidi.c sc->sc_jacks = sc->sc_in_jacks = sc->sc_out_jacks = NULL;
sc 829 dev/usb/umidi.c bind_jacks_to_mididev(struct umidi_softc *sc,
sc 865 dev/usb/umidi.c unbind_all_jacks(struct umidi_softc *sc)
sc 869 dev/usb/umidi.c if (sc->sc_mididevs)
sc 870 dev/usb/umidi.c for (i=0; i<sc->sc_num_mididevs; i++) {
sc 871 dev/usb/umidi.c unbind_jacks_from_mididev(&sc->sc_mididevs[i]);
sc 876 dev/usb/umidi.c assign_all_jacks_automatically(struct umidi_softc *sc)
sc 883 dev/usb/umidi.c alloc_all_mididevs(sc,
sc 884 dev/usb/umidi.c max(sc->sc_out_num_jacks, sc->sc_in_num_jacks));
sc 888 dev/usb/umidi.c for (i=0; i<sc->sc_num_mididevs; i++) {
sc 889 dev/usb/umidi.c out = (i<sc->sc_out_num_jacks) ? &sc->sc_out_jacks[i]:NULL;
sc 890 dev/usb/umidi.c in = (i<sc->sc_in_num_jacks) ? &sc->sc_in_jacks[i]:NULL;
sc 891 dev/usb/umidi.c err = bind_jacks_to_mididev(sc, out, in, &sc->sc_mididevs[i]);
sc 893 dev/usb/umidi.c free_all_mididevs(sc);
sc 949 dev/usb/umidi.c attach_mididev(struct umidi_softc *sc, struct umidi_mididev *mididev)
sc 951 dev/usb/umidi.c if (mididev->sc)
sc 954 dev/usb/umidi.c mididev->sc = sc;
sc 956 dev/usb/umidi.c mididev->mdev = midi_attach_mi(&umidi_hw_if, mididev, &sc->sc_dev);
sc 964 dev/usb/umidi.c if (!mididev->sc)
sc 975 dev/usb/umidi.c mididev->sc = NULL;
sc 993 dev/usb/umidi.c alloc_all_mididevs(struct umidi_softc *sc, int nmidi)
sc 995 dev/usb/umidi.c sc->sc_num_mididevs = nmidi;
sc 996 dev/usb/umidi.c sc->sc_mididevs = malloc(sizeof(*sc->sc_mididevs)*nmidi,
sc 998 dev/usb/umidi.c if (!sc->sc_mididevs)
sc 1000 dev/usb/umidi.c memset(sc->sc_mididevs, 0, sizeof(*sc->sc_mididevs)*nmidi);
sc 1006 dev/usb/umidi.c free_all_mididevs(struct umidi_softc *sc)
sc 1008 dev/usb/umidi.c sc->sc_num_mididevs = 0;
sc 1009 dev/usb/umidi.c if (sc->sc_mididevs)
sc 1010 dev/usb/umidi.c free(sc->sc_mididevs, M_USBDEV);
sc 1014 dev/usb/umidi.c attach_all_mididevs(struct umidi_softc *sc)
sc 1019 dev/usb/umidi.c if (sc->sc_mididevs)
sc 1020 dev/usb/umidi.c for (i=0; i<sc->sc_num_mididevs; i++) {
sc 1021 dev/usb/umidi.c err = attach_mididev(sc, &sc->sc_mididevs[i]);
sc 1030 dev/usb/umidi.c detach_all_mididevs(struct umidi_softc *sc, int flags)
sc 1035 dev/usb/umidi.c if (sc->sc_mididevs)
sc 1036 dev/usb/umidi.c for (i=0; i<sc->sc_num_mididevs; i++) {
sc 1037 dev/usb/umidi.c err = detach_mididev(&sc->sc_mididevs[i], flags);
sc 1046 dev/usb/umidi.c deactivate_all_mididevs(struct umidi_softc *sc)
sc 1051 dev/usb/umidi.c if (sc->sc_mididevs)
sc 1052 dev/usb/umidi.c for (i=0; i<sc->sc_num_mididevs; i++) {
sc 1053 dev/usb/umidi.c err = deactivate_mididev(&sc->sc_mididevs[i]);
sc 1063 dev/usb/umidi.c dump_sc(struct umidi_softc *sc)
sc 1067 dev/usb/umidi.c DPRINTFN(10, ("%s: dump_sc\n", sc->sc_dev.dv_xname));
sc 1068 dev/usb/umidi.c for (i=0; i<sc->sc_out_num_endpoints; i++) {
sc 1069 dev/usb/umidi.c DPRINTFN(10, ("\tout_ep(%p):\n", &sc->sc_out_ep[i]));
sc 1070 dev/usb/umidi.c dump_ep(&sc->sc_out_ep[i]);
sc 1072 dev/usb/umidi.c for (i=0; i<sc->sc_in_num_endpoints; i++) {
sc 1073 dev/usb/umidi.c DPRINTFN(10, ("\tin_ep(%p):\n", &sc->sc_in_ep[i]));
sc 1074 dev/usb/umidi.c dump_ep(&sc->sc_in_ep[i]);
sc 1145 dev/usb/umidi.c ep->sc->sc_dev.dv_xname, usbd_errstr(err)));
sc 1162 dev/usb/umidi.c ep->sc->sc_dev.dv_xname, usbd_errstr(err)));
sc 1171 dev/usb/umidi.c #define DPR_PACKET(dir, sc, p) \
sc 1174 dev/usb/umidi.c sc->sc_dev.dv_xname, \
sc 1180 dev/usb/umidi.c #define DPR_PACKET(dir, sc, p)
sc 1187 dev/usb/umidi.c struct umidi_softc *sc = ep->sc;
sc 1190 dev/usb/umidi.c if (sc->sc_dying)
sc 1249 dev/usb/umidi.c if (ep->sc->sc_dying || !j->opened)
sc 1269 dev/usb/umidi.c if (ep->sc->sc_dying)
sc 1296 dev/usb/umidi.c struct umidi_softc *sc = ep->sc;
sc 1300 dev/usb/umidi.c if (sc->sc_dying)
sc 58 dev/usb/umidivar.h struct umidi_softc *sc;
sc 94 dev/usb/umidivar.h struct umidi_softc *sc;
sc 125 dev/usb/umodem.c usbd_status umodem_set_comm_feature(struct umodem_softc *sc,
sc 127 dev/usb/umodem.c usbd_status umodem_set_line_coding(struct umodem_softc *sc,
sc 204 dev/usb/umodem.c struct umodem_softc *sc = (struct umodem_softc *)self;
sc 224 dev/usb/umodem.c sc->sc_udev = dev;
sc 225 dev/usb/umodem.c sc->sc_ctl_iface = uaa->iface;
sc 227 dev/usb/umodem.c id = usbd_get_interface_descriptor(sc->sc_ctl_iface);
sc 228 dev/usb/umodem.c printf("%s: %s, iclass %d/%d\n", sc->sc_dev.dv_xname,
sc 231 dev/usb/umodem.c sc->sc_ctl_iface_no = id->bInterfaceNumber;
sc 234 dev/usb/umodem.c sc->sc_cm_cap = 0;
sc 235 dev/usb/umodem.c sc->sc_data_iface_no = 0;
sc 236 dev/usb/umodem.c sc->sc_acm_cap = 0;
sc 244 dev/usb/umodem.c if (current_iface_no == sc->sc_ctl_iface_no &&
sc 249 dev/usb/umodem.c sc->sc_cm_cap = cmd->bmCapabilities;
sc 250 dev/usb/umodem.c sc->sc_data_iface_no = cmd->bDataInterface;
sc 254 dev/usb/umodem.c sc->sc_acm_cap = acmd->bmCapabilities;
sc 258 dev/usb/umodem.c sc->sc_data_iface_no =
sc 266 dev/usb/umodem.c if (sc->sc_data_iface_no == 0) {
sc 268 dev/usb/umodem.c sc->sc_dev.dv_xname);
sc 273 dev/usb/umodem.c sc->sc_dev.dv_xname, sc->sc_data_iface_no,
sc 274 dev/usb/umodem.c sc->sc_cm_cap & USB_CDC_CM_OVER_DATA ? "" : "no ",
sc 275 dev/usb/umodem.c sc->sc_acm_cap & USB_CDC_ACM_HAS_BREAK ? "" : "no ");
sc 282 dev/usb/umodem.c id->bInterfaceNumber == sc->sc_data_iface_no) {
sc 283 dev/usb/umodem.c sc->sc_data_iface = uaa->ifaces[i];
sc 288 dev/usb/umodem.c if (sc->sc_data_iface == NULL) {
sc 289 dev/usb/umodem.c printf("%s: no data interface\n", sc->sc_dev.dv_xname);
sc 299 dev/usb/umodem.c id = usbd_get_interface_descriptor(sc->sc_data_iface);
sc 301 dev/usb/umodem.c ed = usbd_interface2endpoint_descriptor(sc->sc_data_iface, i);
sc 304 dev/usb/umodem.c sc->sc_dev.dv_xname, i);
sc 318 dev/usb/umodem.c sc->sc_dev.dv_xname);
sc 323 dev/usb/umodem.c sc->sc_dev.dv_xname);
sc 327 dev/usb/umodem.c if (usbd_get_quirks(sc->sc_udev)->uq_flags & UQ_ASSUME_CM_OVER_DATA) {
sc 328 dev/usb/umodem.c sc->sc_cm_over_data = 1;
sc 330 dev/usb/umodem.c if (sc->sc_cm_cap & USB_CDC_CM_OVER_DATA) {
sc 331 dev/usb/umodem.c if (sc->sc_acm_cap & USB_CDC_ACM_HAS_FEATURE)
sc 332 dev/usb/umodem.c err = umodem_set_comm_feature(sc,
sc 338 dev/usb/umodem.c sc->sc_dev.dv_xname);
sc 341 dev/usb/umodem.c sc->sc_cm_over_data = 1;
sc 353 dev/usb/umodem.c sc->sc_ctl_notify = -1;
sc 354 dev/usb/umodem.c sc->sc_notify_pipe = NULL;
sc 356 dev/usb/umodem.c id = usbd_get_interface_descriptor(sc->sc_ctl_iface);
sc 358 dev/usb/umodem.c ed = usbd_interface2endpoint_descriptor(sc->sc_ctl_iface, i);
sc 365 dev/usb/umodem.c sc->sc_dev.dv_xname);
sc 366 dev/usb/umodem.c sc->sc_ctl_notify = ed->bEndpointAddress;
sc 370 dev/usb/umodem.c sc->sc_dtr = -1;
sc 378 dev/usb/umodem.c uca.device = sc->sc_udev;
sc 379 dev/usb/umodem.c uca.iface = sc->sc_data_iface;
sc 381 dev/usb/umodem.c uca.arg = sc;
sc 384 dev/usb/umodem.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 385 dev/usb/umodem.c &sc->sc_dev);
sc 387 dev/usb/umodem.c DPRINTF(("umodem_attach: sc=%p\n", sc));
sc 388 dev/usb/umodem.c sc->sc_subdev = config_found_sm(self, &uca, ucomprint, ucomsubmatch);
sc 393 dev/usb/umodem.c sc->sc_dying = 1;
sc 399 dev/usb/umodem.c struct umodem_softc *sc = addr;
sc 402 dev/usb/umodem.c DPRINTF(("umodem_open: sc=%p\n", sc));
sc 404 dev/usb/umodem.c if (sc->sc_ctl_notify != -1 && sc->sc_notify_pipe == NULL) {
sc 405 dev/usb/umodem.c err = usbd_open_pipe_intr(sc->sc_ctl_iface, sc->sc_ctl_notify,
sc 406 dev/usb/umodem.c USBD_SHORT_XFER_OK, &sc->sc_notify_pipe, sc,
sc 407 dev/usb/umodem.c &sc->sc_notify_buf, sizeof(sc->sc_notify_buf),
sc 423 dev/usb/umodem.c struct umodem_softc *sc = addr;
sc 426 dev/usb/umodem.c DPRINTF(("umodem_close: sc=%p\n", sc));
sc 428 dev/usb/umodem.c if (sc->sc_notify_pipe != NULL) {
sc 429 dev/usb/umodem.c err = usbd_abort_pipe(sc->sc_notify_pipe);
sc 432 dev/usb/umodem.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 433 dev/usb/umodem.c err = usbd_close_pipe(sc->sc_notify_pipe);
sc 436 dev/usb/umodem.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 437 dev/usb/umodem.c sc->sc_notify_pipe = NULL;
sc 444 dev/usb/umodem.c struct umodem_softc *sc = priv;
sc 447 dev/usb/umodem.c if (sc->sc_dying)
sc 453 dev/usb/umodem.c printf("%s: abnormal status: %s\n", sc->sc_dev.dv_xname,
sc 458 dev/usb/umodem.c if (sc->sc_notify_buf.bmRequestType != UCDC_NOTIFICATION) {
sc 460 dev/usb/umodem.c sc->sc_dev.dv_xname,
sc 461 dev/usb/umodem.c sc->sc_notify_buf.bmRequestType));
sc 465 dev/usb/umodem.c switch (sc->sc_notify_buf.bNotification) {
sc 471 dev/usb/umodem.c if (UGETW(sc->sc_notify_buf.wLength) != 2) {
sc 473 dev/usb/umodem.c sc->sc_dev.dv_xname,
sc 474 dev/usb/umodem.c UGETW(sc->sc_notify_buf.wLength));
sc 478 dev/usb/umodem.c sc->sc_dev.dv_xname,
sc 479 dev/usb/umodem.c sc->sc_notify_buf.data[0],
sc 480 dev/usb/umodem.c sc->sc_notify_buf.data[1]));
sc 482 dev/usb/umodem.c sc->sc_lsr = sc->sc_msr = 0;
sc 483 dev/usb/umodem.c mstatus = sc->sc_notify_buf.data[0];
sc 486 dev/usb/umodem.c sc->sc_msr |= UMSR_RI;
sc 488 dev/usb/umodem.c sc->sc_msr |= UMSR_DSR;
sc 490 dev/usb/umodem.c sc->sc_msr |= UMSR_DCD;
sc 491 dev/usb/umodem.c ucom_status_change((struct ucom_softc *)sc->sc_subdev);
sc 495 dev/usb/umodem.c sc->sc_dev.dv_xname,
sc 496 dev/usb/umodem.c sc->sc_notify_buf.bNotification));
sc 504 dev/usb/umodem.c struct umodem_softc *sc = addr;
sc 509 dev/usb/umodem.c *lsr = sc->sc_lsr;
sc 511 dev/usb/umodem.c *msr = sc->sc_msr;
sc 517 dev/usb/umodem.c struct umodem_softc *sc = addr;
sc 521 dev/usb/umodem.c DPRINTF(("umodem_param: sc=%p\n", sc));
sc 550 dev/usb/umodem.c err = umodem_set_line_coding(sc, &ls);
sc 562 dev/usb/umodem.c struct umodem_softc *sc = addr;
sc 565 dev/usb/umodem.c if (sc->sc_dying)
sc 572 dev/usb/umodem.c *(int *)data = sc->sc_cm_over_data;
sc 576 dev/usb/umodem.c if (*(int *)data != sc->sc_cm_over_data) {
sc 591 dev/usb/umodem.c umodem_dtr(struct umodem_softc *sc, int onoff)
sc 595 dev/usb/umodem.c if (sc->sc_dtr == onoff)
sc 597 dev/usb/umodem.c sc->sc_dtr = onoff;
sc 599 dev/usb/umodem.c umodem_set_line_state(sc);
sc 603 dev/usb/umodem.c umodem_rts(struct umodem_softc *sc, int onoff)
sc 607 dev/usb/umodem.c if (sc->sc_rts == onoff)
sc 609 dev/usb/umodem.c sc->sc_rts = onoff;
sc 611 dev/usb/umodem.c umodem_set_line_state(sc);
sc 615 dev/usb/umodem.c umodem_set_line_state(struct umodem_softc *sc)
sc 620 dev/usb/umodem.c ls = (sc->sc_dtr ? UCDC_LINE_DTR : 0) |
sc 621 dev/usb/umodem.c (sc->sc_rts ? UCDC_LINE_RTS : 0);
sc 625 dev/usb/umodem.c USETW(req.wIndex, sc->sc_ctl_iface_no);
sc 628 dev/usb/umodem.c (void)usbd_do_request(sc->sc_udev, &req, 0);
sc 633 dev/usb/umodem.c umodem_break(struct umodem_softc *sc, int onoff)
sc 639 dev/usb/umodem.c if (!(sc->sc_acm_cap & USB_CDC_ACM_HAS_BREAK))
sc 645 dev/usb/umodem.c USETW(req.wIndex, sc->sc_ctl_iface_no);
sc 648 dev/usb/umodem.c (void)usbd_do_request(sc->sc_udev, &req, 0);
sc 654 dev/usb/umodem.c struct umodem_softc *sc = addr;
sc 658 dev/usb/umodem.c umodem_dtr(sc, onoff);
sc 661 dev/usb/umodem.c umodem_rts(sc, onoff);
sc 664 dev/usb/umodem.c umodem_break(sc, onoff);
sc 672 dev/usb/umodem.c umodem_set_line_coding(struct umodem_softc *sc, usb_cdc_line_state_t *state)
sc 681 dev/usb/umodem.c if (memcmp(state, &sc->sc_line_state, UCDC_LINE_STATE_LENGTH) == 0) {
sc 689 dev/usb/umodem.c USETW(req.wIndex, sc->sc_ctl_iface_no);
sc 692 dev/usb/umodem.c err = usbd_do_request(sc->sc_udev, &req, state);
sc 699 dev/usb/umodem.c sc->sc_line_state = *state;
sc 705 dev/usb/umodem.c umodem_set_comm_feature(struct umodem_softc *sc, int feature, int state)
sc 717 dev/usb/umodem.c USETW(req.wIndex, sc->sc_ctl_iface_no);
sc 721 dev/usb/umodem.c err = usbd_do_request(sc->sc_udev, &req, &ast);
sc 734 dev/usb/umodem.c struct umodem_softc *sc = (struct umodem_softc *)self;
sc 742 dev/usb/umodem.c sc->sc_dying = 1;
sc 743 dev/usb/umodem.c if (sc->sc_subdev)
sc 744 dev/usb/umodem.c rv = config_deactivate(sc->sc_subdev);
sc 753 dev/usb/umodem.c struct umodem_softc *sc = (struct umodem_softc *)self;
sc 756 dev/usb/umodem.c DPRINTF(("umodem_detach: sc=%p flags=%d\n", sc, flags));
sc 758 dev/usb/umodem.c sc->sc_dying = 1;
sc 760 dev/usb/umodem.c if (sc->sc_subdev != NULL)
sc 761 dev/usb/umodem.c rv = config_detach(sc->sc_subdev, flags);
sc 763 dev/usb/umodem.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 764 dev/usb/umodem.c &sc->sc_dev);
sc 163 dev/usb/ums.c struct ums_softc *sc = (struct ums_softc *)self;
sc 173 dev/usb/ums.c sc->sc_hdev.sc_intr = ums_intr;
sc 174 dev/usb/ums.c sc->sc_hdev.sc_parent = uha->parent;
sc 175 dev/usb/ums.c sc->sc_hdev.sc_report_id = uha->reportid;
sc 179 dev/usb/ums.c sc->flags |= UMS_REVZ;
sc 181 dev/usb/ums.c sc->flags |= UMS_SPUR_BUT_UP;
sc 186 dev/usb/ums.c uha->reportid, hid_input, &sc->sc_loc_x, &flags)) {
sc 188 dev/usb/ums.c sc->sc_hdev.sc_dev.dv_xname);
sc 193 dev/usb/ums.c sc->sc_hdev.sc_dev.dv_xname, flags);
sc 198 dev/usb/ums.c uha->reportid, hid_input, &sc->sc_loc_y, &flags)) {
sc 200 dev/usb/ums.c sc->sc_hdev.sc_dev.dv_xname);
sc 205 dev/usb/ums.c sc->sc_hdev.sc_dev.dv_xname, flags);
sc 211 dev/usb/ums.c uha->reportid, hid_input, &sc->sc_loc_z, &flags)) {
sc 214 dev/usb/ums.c sc->sc_hdev.sc_dev.dv_xname, flags));
sc 215 dev/usb/ums.c sc->sc_loc_z.size = 0; /* Bad Z coord, ignore it */
sc 217 dev/usb/ums.c sc->flags |= UMS_Z;
sc 219 dev/usb/ums.c sc->flags ^= UMS_REVZ;
sc 227 dev/usb/ums.c uha->reportid, hid_input, &sc->sc_loc_w, &flags)) {
sc 230 dev/usb/ums.c sc->sc_hdev.sc_dev.dv_xname, flags));
sc 232 dev/usb/ums.c sc->sc_loc_w.size = 0;
sc 237 dev/usb/ums.c uha->reportid, hid_input, &sc->sc_loc_z, &flags)) {
sc 240 dev/usb/ums.c sc->sc_hdev.sc_dev.dv_xname, flags));
sc 241 dev/usb/ums.c sc->sc_loc_z.size = 0; /* Bad Z coord, ignore it */
sc 243 dev/usb/ums.c sc->flags |= UMS_Z;
sc 252 dev/usb/ums.c sc->nbuttons = i - 1;
sc 255 dev/usb/ums.c sc->nbuttons, sc->nbuttons == 1 ? "" : "s",
sc 256 dev/usb/ums.c sc->flags & UMS_Z ? " and Z dir." : "");
sc 258 dev/usb/ums.c for (i = 1; i <= sc->nbuttons; i++)
sc 261 dev/usb/ums.c &sc->sc_loc_btn[i-1], 0);
sc 264 dev/usb/ums.c DPRINTF(("ums_attach: sc=%p\n", sc));
sc 266 dev/usb/ums.c sc->sc_loc_x.pos, sc->sc_loc_x.size));
sc 268 dev/usb/ums.c sc->sc_loc_y.pos, sc->sc_loc_y.size));
sc 269 dev/usb/ums.c if (sc->flags & UMS_Z)
sc 271 dev/usb/ums.c sc->sc_loc_z.pos, sc->sc_loc_z.size));
sc 272 dev/usb/ums.c for (i = 1; i <= sc->nbuttons; i++) {
sc 274 dev/usb/ums.c i, sc->sc_loc_btn[i-1].pos,sc->sc_loc_btn[i-1].size));
sc 279 dev/usb/ums.c a.accesscookie = sc;
sc 281 dev/usb/ums.c sc->sc_wsmousedev = config_found(self, &a, wsmousedevprint);
sc 287 dev/usb/ums.c struct ums_softc *sc = (struct ums_softc *)self;
sc 295 dev/usb/ums.c if (sc->sc_wsmousedev != NULL)
sc 296 dev/usb/ums.c rv = config_deactivate(sc->sc_wsmousedev);
sc 297 dev/usb/ums.c sc->sc_dying = 1;
sc 306 dev/usb/ums.c struct ums_softc *sc = (struct ums_softc *)self;
sc 309 dev/usb/ums.c DPRINTF(("ums_detach: sc=%p flags=%d\n", sc, flags));
sc 312 dev/usb/ums.c if (sc->sc_wsmousedev != NULL)
sc 313 dev/usb/ums.c rv = config_detach(sc->sc_wsmousedev, flags);
sc 321 dev/usb/ums.c struct ums_softc *sc = (struct ums_softc *)addr;
sc 329 dev/usb/ums.c dx = hid_get_data(ibuf, &sc->sc_loc_x);
sc 330 dev/usb/ums.c dy = -hid_get_data(ibuf, &sc->sc_loc_y);
sc 331 dev/usb/ums.c dz = hid_get_data(ibuf, &sc->sc_loc_z);
sc 332 dev/usb/ums.c dw = hid_get_data(ibuf, &sc->sc_loc_w);
sc 333 dev/usb/ums.c if (sc->flags & UMS_REVZ)
sc 335 dev/usb/ums.c for (i = 0; i < sc->nbuttons; i++)
sc 336 dev/usb/ums.c if (hid_get_data(ibuf, &sc->sc_loc_btn[i]))
sc 340 dev/usb/ums.c buttons != sc->sc_buttons) {
sc 343 dev/usb/ums.c sc->sc_buttons = buttons;
sc 344 dev/usb/ums.c if (sc->sc_wsmousedev != NULL) {
sc 346 dev/usb/ums.c wsmouse_input(sc->sc_wsmousedev, buttons,
sc 356 dev/usb/ums.c struct ums_softc *sc = v;
sc 358 dev/usb/ums.c DPRINTFN(1,("ums_enable: sc=%p\n", sc));
sc 360 dev/usb/ums.c if (sc->sc_dying)
sc 363 dev/usb/ums.c if (sc->sc_enabled)
sc 366 dev/usb/ums.c sc->sc_enabled = 1;
sc 367 dev/usb/ums.c sc->sc_buttons = 0;
sc 369 dev/usb/ums.c return (uhidev_open(&sc->sc_hdev));
sc 375 dev/usb/ums.c struct ums_softc *sc = v;
sc 377 dev/usb/ums.c DPRINTFN(1,("ums_disable: sc=%p\n", sc));
sc 379 dev/usb/ums.c if (!sc->sc_enabled) {
sc 385 dev/usb/ums.c sc->sc_enabled = 0;
sc 386 dev/usb/ums.c uhidev_close(&sc->sc_hdev);
sc 112 dev/usb/umsm.c struct umsm_softc *sc = (struct umsm_softc *)self;
sc 122 dev/usb/umsm.c sc->sc_udev = uaa->device;
sc 124 dev/usb/umsm.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 127 dev/usb/umsm.c if (usbd_set_config_index(sc->sc_udev, UMSM_CONFIG_NO, 1) != 0) {
sc 129 dev/usb/umsm.c sc->sc_dev.dv_xname);
sc 130 dev/usb/umsm.c sc->sc_dying = 1;
sc 135 dev/usb/umsm.c error = usbd_device2interface_handle(sc->sc_udev, UMSM_IFACE_NO,
sc 136 dev/usb/umsm.c &sc->sc_iface);
sc 139 dev/usb/umsm.c sc->sc_dev.dv_xname);
sc 140 dev/usb/umsm.c sc->sc_dying = 1;
sc 144 dev/usb/umsm.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 148 dev/usb/umsm.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 151 dev/usb/umsm.c sc->sc_dev.dv_xname, i);
sc 152 dev/usb/umsm.c sc->sc_dying = 1;
sc 164 dev/usb/umsm.c printf("%s: missing endpoint\n", sc->sc_dev.dv_xname);
sc 165 dev/usb/umsm.c sc->sc_dying = 1;
sc 174 dev/usb/umsm.c uca.device = sc->sc_udev;
sc 175 dev/usb/umsm.c uca.iface = sc->sc_iface;
sc 177 dev/usb/umsm.c uca.arg = sc;
sc 180 dev/usb/umsm.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 181 dev/usb/umsm.c &sc->sc_dev);
sc 183 dev/usb/umsm.c sc->sc_subdev = config_found_sm(self, &uca, ucomprint, ucomsubmatch);
sc 189 dev/usb/umsm.c struct umsm_softc *sc = (struct umsm_softc *)self;
sc 192 dev/usb/umsm.c sc->sc_dying = 1;
sc 193 dev/usb/umsm.c if (sc->sc_subdev != NULL) {
sc 194 dev/usb/umsm.c rv = config_detach(sc->sc_subdev, flags);
sc 195 dev/usb/umsm.c sc->sc_subdev = NULL;
sc 198 dev/usb/umsm.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 199 dev/usb/umsm.c &sc->sc_dev);
sc 207 dev/usb/umsm.c struct umsm_softc *sc = (struct umsm_softc *)self;
sc 215 dev/usb/umsm.c if (sc->sc_subdev != NULL)
sc 216 dev/usb/umsm.c rv = config_deactivate(sc->sc_subdev);
sc 217 dev/usb/umsm.c sc->sc_dying = 1;
sc 119 dev/usb/uow.c struct uow_softc *sc = (struct uow_softc *)self;
sc 129 dev/usb/uow.c sc->sc_udev = uaa->device;
sc 134 dev/usb/uow.c printf("%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 138 dev/usb/uow.c if ((error = usbd_set_config_no(sc->sc_udev,
sc 141 dev/usb/uow.c sc->sc_dev.dv_xname, DS2490_USB_CONFIG,
sc 147 dev/usb/uow.c if ((error = usbd_device2interface_handle(sc->sc_udev,
sc 148 dev/usb/uow.c DS2490_USB_IFACE, &sc->sc_iface)) != 0) {
sc 150 dev/usb/uow.c sc->sc_dev.dv_xname, DS2490_USB_IFACE,
sc 156 dev/usb/uow.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 158 dev/usb/uow.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 161 dev/usb/uow.c sc->sc_dev.dv_xname, i);
sc 177 dev/usb/uow.c sc->sc_dev.dv_xname, ep_ibulk, ep_obulk, ep_intr);
sc 182 dev/usb/uow.c if ((error = usbd_open_pipe(sc->sc_iface, ep_ibulk, USBD_EXCLUSIVE_USE,
sc 183 dev/usb/uow.c &sc->sc_ph_ibulk)) != 0) {
sc 185 dev/usb/uow.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 188 dev/usb/uow.c if ((error = usbd_open_pipe(sc->sc_iface, ep_obulk, USBD_EXCLUSIVE_USE,
sc 189 dev/usb/uow.c &sc->sc_ph_obulk)) != 0) {
sc 191 dev/usb/uow.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 194 dev/usb/uow.c if ((error = usbd_open_pipe_intr(sc->sc_iface, ep_intr,
sc 195 dev/usb/uow.c USBD_SHORT_XFER_OK, &sc->sc_ph_intr, sc,
sc 196 dev/usb/uow.c sc->sc_regs, sizeof(sc->sc_regs), uow_intr,
sc 199 dev/usb/uow.c sc->sc_dev.dv_xname, usbd_errstr(error));
sc 205 dev/usb/uow.c if ((sc->sc_xfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) {
sc 207 dev/usb/uow.c sc->sc_dev.dv_xname);
sc 212 dev/usb/uow.c memset(sc->sc_fifo, 0xff, sizeof(sc->sc_fifo));
sc 215 dev/usb/uow.c uow_reset(sc);
sc 218 dev/usb/uow.c sc->sc_ow_bus.bus_cookie = sc;
sc 219 dev/usb/uow.c sc->sc_ow_bus.bus_reset = uow_ow_reset;
sc 220 dev/usb/uow.c sc->sc_ow_bus.bus_bit = uow_ow_bit;
sc 221 dev/usb/uow.c sc->sc_ow_bus.bus_read_byte = uow_ow_read_byte;
sc 222 dev/usb/uow.c sc->sc_ow_bus.bus_write_byte = uow_ow_write_byte;
sc 223 dev/usb/uow.c sc->sc_ow_bus.bus_read_block = uow_ow_read_block;
sc 224 dev/usb/uow.c sc->sc_ow_bus.bus_write_block = uow_ow_write_block;
sc 225 dev/usb/uow.c sc->sc_ow_bus.bus_matchrom = uow_ow_matchrom;
sc 226 dev/usb/uow.c sc->sc_ow_bus.bus_search = uow_ow_search;
sc 229 dev/usb/uow.c oba.oba_bus = &sc->sc_ow_bus;
sc 230 dev/usb/uow.c sc->sc_ow_dev = config_found(self, &oba, onewirebus_print);
sc 235 dev/usb/uow.c if (sc->sc_ph_ibulk != NULL)
sc 236 dev/usb/uow.c usbd_close_pipe(sc->sc_ph_ibulk);
sc 237 dev/usb/uow.c if (sc->sc_ph_obulk != NULL)
sc 238 dev/usb/uow.c usbd_close_pipe(sc->sc_ph_obulk);
sc 239 dev/usb/uow.c if (sc->sc_ph_intr != NULL)
sc 240 dev/usb/uow.c usbd_close_pipe(sc->sc_ph_intr);
sc 241 dev/usb/uow.c if (sc->sc_xfer != NULL)
sc 242 dev/usb/uow.c usbd_free_xfer(sc->sc_xfer);
sc 248 dev/usb/uow.c struct uow_softc *sc = (struct uow_softc *)self;
sc 253 dev/usb/uow.c if (sc->sc_ph_ibulk != NULL) {
sc 254 dev/usb/uow.c usbd_abort_pipe(sc->sc_ph_ibulk);
sc 255 dev/usb/uow.c usbd_close_pipe(sc->sc_ph_ibulk);
sc 257 dev/usb/uow.c if (sc->sc_ph_obulk != NULL) {
sc 258 dev/usb/uow.c usbd_abort_pipe(sc->sc_ph_obulk);
sc 259 dev/usb/uow.c usbd_close_pipe(sc->sc_ph_obulk);
sc 261 dev/usb/uow.c if (sc->sc_ph_intr != NULL) {
sc 262 dev/usb/uow.c usbd_abort_pipe(sc->sc_ph_intr);
sc 263 dev/usb/uow.c usbd_close_pipe(sc->sc_ph_intr);
sc 266 dev/usb/uow.c if (sc->sc_xfer != NULL)
sc 267 dev/usb/uow.c usbd_free_xfer(sc->sc_xfer);
sc 269 dev/usb/uow.c if (sc->sc_ow_dev != NULL)
sc 270 dev/usb/uow.c rv = config_detach(sc->sc_ow_dev, flags);
sc 274 dev/usb/uow.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 275 dev/usb/uow.c &sc->sc_dev);
sc 283 dev/usb/uow.c struct uow_softc *sc = (struct uow_softc *)self;
sc 290 dev/usb/uow.c if (sc->sc_ow_dev != NULL)
sc 291 dev/usb/uow.c rv = config_deactivate(sc->sc_ow_dev);
sc 301 dev/usb/uow.c struct uow_softc *sc = arg;
sc 303 dev/usb/uow.c if (uow_commcmd(sc, DS2490_COMM_1WIRE_RESET | DS2490_BIT_IM, 0) != 0)
sc 313 dev/usb/uow.c struct uow_softc *sc = arg;
sc 316 dev/usb/uow.c if (uow_commcmd(sc, DS2490_COMM_BIT_IO | DS2490_BIT_IM |
sc 319 dev/usb/uow.c if (uow_read(sc, &data, 1) != 1)
sc 328 dev/usb/uow.c struct uow_softc *sc = arg;
sc 331 dev/usb/uow.c if (uow_commcmd(sc, DS2490_COMM_BYTE_IO | DS2490_BIT_IM, 0xff) != 0)
sc 333 dev/usb/uow.c if (uow_read(sc, &data, 1) != 1)
sc 342 dev/usb/uow.c struct uow_softc *sc = arg;
sc 345 dev/usb/uow.c if (uow_commcmd(sc, DS2490_COMM_BYTE_IO | DS2490_BIT_IM, value) != 0)
sc 347 dev/usb/uow.c uow_read(sc, &data, sizeof(data));
sc 353 dev/usb/uow.c struct uow_softc *sc = arg;
sc 355 dev/usb/uow.c if (uow_write(sc, sc->sc_fifo, len) != 0)
sc 357 dev/usb/uow.c if (uow_commcmd(sc, DS2490_COMM_BLOCK_IO | DS2490_BIT_IM, len) != 0)
sc 359 dev/usb/uow.c uow_read(sc, buf, len);
sc 365 dev/usb/uow.c struct uow_softc *sc = arg;
sc 367 dev/usb/uow.c if (uow_write(sc, buf, len) != 0)
sc 369 dev/usb/uow.c if (uow_commcmd(sc, DS2490_COMM_BLOCK_IO | DS2490_BIT_IM, len) != 0)
sc 376 dev/usb/uow.c struct uow_softc *sc = arg;
sc 383 dev/usb/uow.c if (uow_write(sc, data, 8) != 0)
sc 385 dev/usb/uow.c if (uow_commcmd(sc, DS2490_COMM_MATCH_ACCESS | DS2490_BIT_IM,
sc 393 dev/usb/uow.c struct uow_softc *sc = arg;
sc 400 dev/usb/uow.c if (uow_write(sc, data, 8) != 0)
sc 402 dev/usb/uow.c if (uow_commcmd(sc, DS2490_COMM_SEARCH_ACCESS | DS2490_BIT_IM |
sc 407 dev/usb/uow.c if ((rv = uow_read(sc, buf, size * 8)) == -1)
sc 414 dev/usb/uow.c uow_cmd(struct uow_softc *sc, int type, int cmd, int param)
sc 424 dev/usb/uow.c if ((error = usbd_do_request(sc->sc_udev, &req, NULL)) != 0) {
sc 426 dev/usb/uow.c "param 0x%04x: %s\n", sc->sc_dev.dv_xname, type, cmd,
sc 429 dev/usb/uow.c uow_reset(sc);
sc 434 dev/usb/uow.c if (tsleep(sc->sc_regs, PRIBIO, "uowcmd",
sc 437 dev/usb/uow.c "param 0x%04x\n", sc->sc_dev.dv_xname, type, cmd,
sc 441 dev/usb/uow.c if ((sc->sc_regs[DS2490_ST_STFL] & DS2490_ST_STFL_IDLE) == 0)
sc 450 dev/usb/uow.c struct uow_softc *sc = priv;
sc 456 dev/usb/uow.c usbd_clear_endpoint_stall_async(sc->sc_ph_intr);
sc 460 dev/usb/uow.c wakeup(sc->sc_regs);
sc 464 dev/usb/uow.c uow_read(struct uow_softc *sc, void *buf, int len)
sc 472 dev/usb/uow.c sc->sc_dev.dv_xname, len);
sc 476 dev/usb/uow.c if ((sc->sc_xfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) {
sc 477 dev/usb/uow.c printf("%s: failed to alloc xfer\n", sc->sc_dev.dv_xname);
sc 480 dev/usb/uow.c usbd_setup_xfer(sc->sc_xfer, sc->sc_ph_ibulk, sc, buf, len,
sc 482 dev/usb/uow.c error = usbd_sync_transfer(sc->sc_xfer);
sc 483 dev/usb/uow.c usbd_free_xfer(sc->sc_xfer);
sc 486 dev/usb/uow.c sc->sc_dev.dv_xname, len, usbd_errstr(error));
sc 487 dev/usb/uow.c uow_reset(sc);
sc 491 dev/usb/uow.c usbd_get_xfer_status(sc->sc_xfer, NULL, NULL, &count, &error);
sc 496 dev/usb/uow.c uow_write(struct uow_softc *sc, const void *buf, int len)
sc 503 dev/usb/uow.c sc->sc_dev.dv_xname, len);
sc 507 dev/usb/uow.c if ((sc->sc_xfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) {
sc 508 dev/usb/uow.c printf("%s: failed to alloc xfer\n", sc->sc_dev.dv_xname);
sc 511 dev/usb/uow.c usbd_setup_xfer(sc->sc_xfer, sc->sc_ph_obulk, sc, (void *)buf, len, 0,
sc 513 dev/usb/uow.c error = usbd_sync_transfer(sc->sc_xfer);
sc 514 dev/usb/uow.c usbd_free_xfer(sc->sc_xfer);
sc 517 dev/usb/uow.c sc->sc_dev.dv_xname, len, usbd_errstr(error));
sc 518 dev/usb/uow.c uow_reset(sc);
sc 526 dev/usb/uow.c uow_reset(struct uow_softc *sc)
sc 528 dev/usb/uow.c return (uow_ctlcmd(sc, DS2490_CTL_RESET_DEVICE, 0));
sc 124 dev/usb/uplcom.c usbd_status uplcom_set_line_coding(struct uplcom_softc *sc,
sc 224 dev/usb/uplcom.c struct uplcom_softc *sc = (struct uplcom_softc *)self;
sc 233 dev/usb/uplcom.c char *devname = sc->sc_dev.dv_xname;
sc 242 dev/usb/uplcom.c sc->sc_udev = dev;
sc 244 dev/usb/uplcom.c DPRINTF(("\n\nuplcom attach: sc=%p\n", sc));
sc 248 dev/usb/uplcom.c sc->sc_intr_number = -1;
sc 249 dev/usb/uplcom.c sc->sc_intr_pipe = NULL;
sc 256 dev/usb/uplcom.c sc->sc_dying = 1;
sc 261 dev/usb/uplcom.c cdesc = usbd_get_config_descriptor(sc->sc_udev);
sc 265 dev/usb/uplcom.c sc->sc_dev.dv_xname);
sc 266 dev/usb/uplcom.c sc->sc_dying = 1;
sc 271 dev/usb/uplcom.c ddesc = usbd_get_device_descriptor(sc->sc_udev);
sc 274 dev/usb/uplcom.c sc->sc_dev.dv_xname);
sc 275 dev/usb/uplcom.c sc->sc_dying = 1;
sc 284 dev/usb/uplcom.c DPRINTF(("%s: Assuming HX variant\n", sc->sc_dev.dv_xname));
sc 285 dev/usb/uplcom.c sc->sc_type_hx = 1;
sc 287 dev/usb/uplcom.c sc->sc_type_hx = 0;
sc 291 dev/usb/uplcom.c &sc->sc_iface);
sc 295 dev/usb/uplcom.c sc->sc_dying = 1;
sc 301 dev/usb/uplcom.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 302 dev/usb/uplcom.c sc->sc_iface_number = id->bInterfaceNumber;
sc 305 dev/usb/uplcom.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 308 dev/usb/uplcom.c sc->sc_dev.dv_xname, i);
sc 309 dev/usb/uplcom.c sc->sc_dying = 1;
sc 315 dev/usb/uplcom.c sc->sc_intr_number = ed->bEndpointAddress;
sc 316 dev/usb/uplcom.c sc->sc_isize = UGETW(ed->wMaxPacketSize);
sc 320 dev/usb/uplcom.c if (sc->sc_intr_number== -1) {
sc 322 dev/usb/uplcom.c sc->sc_dev.dv_xname);
sc 323 dev/usb/uplcom.c sc->sc_dying = 1;
sc 328 dev/usb/uplcom.c sc->sc_intr_iface = sc->sc_iface;
sc 344 dev/usb/uplcom.c UPLCOM_SECOND_IFACE_INDEX, &sc->sc_iface);
sc 348 dev/usb/uplcom.c sc->sc_dying = 1;
sc 355 dev/usb/uplcom.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 356 dev/usb/uplcom.c sc->sc_iface_number = id->bInterfaceNumber;
sc 359 dev/usb/uplcom.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 362 dev/usb/uplcom.c sc->sc_dev.dv_xname, i);
sc 363 dev/usb/uplcom.c sc->sc_dying = 1;
sc 378 dev/usb/uplcom.c sc->sc_dev.dv_xname);
sc 379 dev/usb/uplcom.c sc->sc_dying = 1;
sc 385 dev/usb/uplcom.c sc->sc_dev.dv_xname);
sc 386 dev/usb/uplcom.c sc->sc_dying = 1;
sc 390 dev/usb/uplcom.c sc->sc_dtr = sc->sc_rts = -1;
sc 398 dev/usb/uplcom.c uca.iface = sc->sc_iface;
sc 400 dev/usb/uplcom.c uca.arg = sc;
sc 403 dev/usb/uplcom.c err = uplcom_reset(sc);
sc 406 dev/usb/uplcom.c printf("%s: reset failed, %s\n", sc->sc_dev.dv_xname,
sc 408 dev/usb/uplcom.c sc->sc_dying = 1;
sc 412 dev/usb/uplcom.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 413 dev/usb/uplcom.c &sc->sc_dev);
sc 416 dev/usb/uplcom.c uca.bulkin, uca.bulkout, sc->sc_intr_number ));
sc 417 dev/usb/uplcom.c sc->sc_subdev = config_found_sm(self, &uca, ucomprint, ucomsubmatch);
sc 423 dev/usb/uplcom.c struct uplcom_softc *sc = (struct uplcom_softc *)self;
sc 426 dev/usb/uplcom.c DPRINTF(("uplcom_detach: sc=%p flags=%d\n", sc, flags));
sc 428 dev/usb/uplcom.c if (sc->sc_intr_pipe != NULL) {
sc 429 dev/usb/uplcom.c usbd_abort_pipe(sc->sc_intr_pipe);
sc 430 dev/usb/uplcom.c usbd_close_pipe(sc->sc_intr_pipe);
sc 431 dev/usb/uplcom.c free(sc->sc_intr_buf, M_USBDEV);
sc 432 dev/usb/uplcom.c sc->sc_intr_pipe = NULL;
sc 435 dev/usb/uplcom.c sc->sc_dying = 1;
sc 436 dev/usb/uplcom.c if (sc->sc_subdev != NULL) {
sc 437 dev/usb/uplcom.c rv = config_detach(sc->sc_subdev, flags);
sc 438 dev/usb/uplcom.c sc->sc_subdev = NULL;
sc 441 dev/usb/uplcom.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 442 dev/usb/uplcom.c &sc->sc_dev);
sc 450 dev/usb/uplcom.c struct uplcom_softc *sc = (struct uplcom_softc *)self;
sc 458 dev/usb/uplcom.c if (sc->sc_subdev != NULL)
sc 459 dev/usb/uplcom.c rv = config_deactivate(sc->sc_subdev);
sc 460 dev/usb/uplcom.c sc->sc_dying = 1;
sc 467 dev/usb/uplcom.c uplcom_reset(struct uplcom_softc *sc)
sc 475 dev/usb/uplcom.c USETW(req.wIndex, sc->sc_iface_number);
sc 478 dev/usb/uplcom.c err = usbd_do_request(sc->sc_udev, &req, 0);
sc 486 dev/usb/uplcom.c uplcom_set_line_state(struct uplcom_softc *sc)
sc 492 dev/usb/uplcom.c if (sc->sc_dtr == -1)
sc 493 dev/usb/uplcom.c sc->sc_dtr = 0;
sc 494 dev/usb/uplcom.c if (sc->sc_rts == -1)
sc 495 dev/usb/uplcom.c sc->sc_rts = 0;
sc 497 dev/usb/uplcom.c ls = (sc->sc_dtr ? UCDC_LINE_DTR : 0) |
sc 498 dev/usb/uplcom.c (sc->sc_rts ? UCDC_LINE_RTS : 0);
sc 503 dev/usb/uplcom.c USETW(req.wIndex, sc->sc_iface_number);
sc 506 dev/usb/uplcom.c (void)usbd_do_request(sc->sc_udev, &req, 0);
sc 513 dev/usb/uplcom.c struct uplcom_softc *sc = addr;
sc 517 dev/usb/uplcom.c uplcom_dtr(sc, onoff);
sc 520 dev/usb/uplcom.c uplcom_rts(sc, onoff);
sc 523 dev/usb/uplcom.c uplcom_break(sc, onoff);
sc 531 dev/usb/uplcom.c uplcom_dtr(struct uplcom_softc *sc, int onoff)
sc 536 dev/usb/uplcom.c if (sc->sc_dtr != -1 && !sc->sc_dtr == !onoff)
sc 539 dev/usb/uplcom.c sc->sc_dtr = !!onoff;
sc 541 dev/usb/uplcom.c uplcom_set_line_state(sc);
sc 545 dev/usb/uplcom.c uplcom_rts(struct uplcom_softc *sc, int onoff)
sc 549 dev/usb/uplcom.c if (sc->sc_rts == -1 && !sc->sc_rts == !onoff)
sc 552 dev/usb/uplcom.c sc->sc_rts = !!onoff;
sc 554 dev/usb/uplcom.c uplcom_set_line_state(sc);
sc 558 dev/usb/uplcom.c uplcom_break(struct uplcom_softc *sc, int onoff)
sc 567 dev/usb/uplcom.c USETW(req.wIndex, sc->sc_iface_number);
sc 570 dev/usb/uplcom.c (void)usbd_do_request(sc->sc_udev, &req, 0);
sc 574 dev/usb/uplcom.c uplcom_set_crtscts(struct uplcom_softc *sc)
sc 585 dev/usb/uplcom.c (sc->sc_type_hx ? UPLCOM_HX_SET_CRTSCTS : UPLCOM_SET_CRTSCTS));
sc 588 dev/usb/uplcom.c err = usbd_do_request(sc->sc_udev, &req, 0);
sc 599 dev/usb/uplcom.c uplcom_set_line_coding(struct uplcom_softc *sc, usb_cdc_line_state_t *state)
sc 608 dev/usb/uplcom.c if (memcmp(state, &sc->sc_line_state, UCDC_LINE_STATE_LENGTH) == 0) {
sc 616 dev/usb/uplcom.c USETW(req.wIndex, sc->sc_iface_number);
sc 619 dev/usb/uplcom.c err = usbd_do_request(sc->sc_udev, &req, state);
sc 626 dev/usb/uplcom.c sc->sc_line_state = *state;
sc 634 dev/usb/uplcom.c struct uplcom_softc *sc = addr;
sc 638 dev/usb/uplcom.c DPRINTF(("uplcom_param: sc=%p\n", sc));
sc 667 dev/usb/uplcom.c err = uplcom_set_line_coding(sc, &ls);
sc 674 dev/usb/uplcom.c uplcom_set_crtscts(sc);
sc 676 dev/usb/uplcom.c if (sc->sc_rts == -1 || sc->sc_dtr == -1)
sc 677 dev/usb/uplcom.c uplcom_set_line_state(sc);
sc 690 dev/usb/uplcom.c struct uplcom_softc *sc = addr;
sc 695 dev/usb/uplcom.c if (sc->sc_dying)
sc 698 dev/usb/uplcom.c DPRINTF(("uplcom_open: sc=%p\n", sc));
sc 700 dev/usb/uplcom.c if (sc->sc_intr_number != -1 && sc->sc_intr_pipe == NULL) {
sc 701 dev/usb/uplcom.c sc->sc_intr_buf = malloc(sc->sc_isize, M_USBDEV, M_WAITOK);
sc 702 dev/usb/uplcom.c err = usbd_open_pipe_intr(sc->sc_intr_iface, sc->sc_intr_number,
sc 703 dev/usb/uplcom.c USBD_SHORT_XFER_OK, &sc->sc_intr_pipe, sc,
sc 704 dev/usb/uplcom.c sc->sc_intr_buf, sc->sc_isize,
sc 708 dev/usb/uplcom.c sc->sc_dev.dv_xname, sc->sc_intr_number));
sc 713 dev/usb/uplcom.c if (sc->sc_type_hx == 1) {
sc 724 dev/usb/uplcom.c uerr = usbd_do_request(sc->sc_udev, &req, 0);
sc 735 dev/usb/uplcom.c uerr = usbd_do_request(sc->sc_udev, &req, 0);
sc 745 dev/usb/uplcom.c uerr = usbd_do_request(sc->sc_udev, &req, 0);
sc 756 dev/usb/uplcom.c struct uplcom_softc *sc = addr;
sc 759 dev/usb/uplcom.c if (sc->sc_dying)
sc 764 dev/usb/uplcom.c if (sc->sc_intr_pipe != NULL) {
sc 765 dev/usb/uplcom.c err = usbd_abort_pipe(sc->sc_intr_pipe);
sc 768 dev/usb/uplcom.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 769 dev/usb/uplcom.c err = usbd_close_pipe(sc->sc_intr_pipe);
sc 772 dev/usb/uplcom.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 773 dev/usb/uplcom.c free(sc->sc_intr_buf, M_USBDEV);
sc 774 dev/usb/uplcom.c sc->sc_intr_pipe = NULL;
sc 781 dev/usb/uplcom.c struct uplcom_softc *sc = priv;
sc 782 dev/usb/uplcom.c u_char *buf = sc->sc_intr_buf;
sc 785 dev/usb/uplcom.c if (sc->sc_dying)
sc 792 dev/usb/uplcom.c DPRINTF(("%s: abnormal status: %s\n", sc->sc_dev.dv_xname,
sc 794 dev/usb/uplcom.c usbd_clear_endpoint_stall_async(sc->sc_intr_pipe);
sc 798 dev/usb/uplcom.c DPRINTF(("%s: uplcom status = %02x\n", sc->sc_dev.dv_xname, buf[8]));
sc 800 dev/usb/uplcom.c sc->sc_lsr = sc->sc_msr = 0;
sc 803 dev/usb/uplcom.c sc->sc_msr |= UMSR_CTS;
sc 805 dev/usb/uplcom.c sc->sc_msr &= ~UMSR_CTS;
sc 807 dev/usb/uplcom.c sc->sc_msr |= UMSR_DSR;
sc 809 dev/usb/uplcom.c sc->sc_msr &= ~UMSR_DSR;
sc 811 dev/usb/uplcom.c sc->sc_msr |= UMSR_DCD;
sc 813 dev/usb/uplcom.c sc->sc_msr &= ~UMSR_DCD;
sc 814 dev/usb/uplcom.c ucom_status_change((struct ucom_softc *) sc->sc_subdev);
sc 820 dev/usb/uplcom.c struct uplcom_softc *sc = addr;
sc 825 dev/usb/uplcom.c *lsr = sc->sc_lsr;
sc 827 dev/usb/uplcom.c *msr = sc->sc_msr;
sc 835 dev/usb/uplcom.c struct uplcom_softc *sc = addr;
sc 838 dev/usb/uplcom.c if (sc->sc_dying)
sc 140 dev/usb/urio.c struct urio_softc *sc = (struct urio_softc *)self;
sc 150 dev/usb/urio.c DPRINTFN(10,("urio_attach: sc=%p\n", sc));
sc 153 dev/usb/urio.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 159 dev/usb/urio.c sc->sc_dev.dv_xname);
sc 166 dev/usb/urio.c sc->sc_dev.dv_xname);
sc 170 dev/usb/urio.c sc->sc_udev = dev;
sc 171 dev/usb/urio.c sc->sc_iface = iface;
sc 176 dev/usb/urio.c sc->sc_in_addr = -1;
sc 177 dev/usb/urio.c sc->sc_out_addr = -1;
sc 182 dev/usb/urio.c sc->sc_dev.dv_xname, i);
sc 187 dev/usb/urio.c sc->sc_in_addr = ed->bEndpointAddress;
sc 190 dev/usb/urio.c sc->sc_out_addr = ed->bEndpointAddress;
sc 193 dev/usb/urio.c if (sc->sc_in_addr == -1 || sc->sc_out_addr == -1) {
sc 194 dev/usb/urio.c printf("%s: missing endpoint\n", sc->sc_dev.dv_xname);
sc 198 dev/usb/urio.c DPRINTFN(10, ("urio_attach: %p\n", sc->sc_udev));
sc 200 dev/usb/urio.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 201 dev/usb/urio.c &sc->sc_dev);
sc 207 dev/usb/urio.c struct urio_softc *sc = (struct urio_softc *)self;
sc 211 dev/usb/urio.c DPRINTF(("urio_detach: sc=%p flags=%d\n", sc, flags));
sc 213 dev/usb/urio.c sc->sc_dying = 1;
sc 215 dev/usb/urio.c if (sc->sc_in_pipe != NULL) {
sc 216 dev/usb/urio.c usbd_abort_pipe(sc->sc_in_pipe);
sc 217 dev/usb/urio.c usbd_close_pipe(sc->sc_in_pipe);
sc 218 dev/usb/urio.c sc->sc_in_pipe = NULL;
sc 220 dev/usb/urio.c if (sc->sc_out_pipe != NULL) {
sc 221 dev/usb/urio.c usbd_abort_pipe(sc->sc_out_pipe);
sc 222 dev/usb/urio.c usbd_close_pipe(sc->sc_out_pipe);
sc 223 dev/usb/urio.c sc->sc_out_pipe = NULL;
sc 227 dev/usb/urio.c if (--sc->sc_refcnt >= 0) {
sc 229 dev/usb/urio.c usb_detach_wait(&sc->sc_dev);
sc 242 dev/usb/urio.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 243 dev/usb/urio.c &sc->sc_dev);
sc 251 dev/usb/urio.c struct urio_softc *sc = (struct urio_softc *)self;
sc 258 dev/usb/urio.c sc->sc_dying = 1;
sc 267 dev/usb/urio.c struct urio_softc *sc;
sc 272 dev/usb/urio.c sc = urio_cd.cd_devs[URIOUNIT(dev)];
sc 273 dev/usb/urio.c if (sc == NULL)
sc 279 dev/usb/urio.c if (sc->sc_dying)
sc 282 dev/usb/urio.c if (sc->sc_in_pipe != NULL)
sc 288 dev/usb/urio.c err = usbd_open_pipe(sc->sc_iface, sc->sc_in_addr, 0, &sc->sc_in_pipe);
sc 291 dev/usb/urio.c err = usbd_open_pipe(sc->sc_iface, sc->sc_out_addr,0,&sc->sc_out_pipe);
sc 293 dev/usb/urio.c usbd_close_pipe(sc->sc_in_pipe);
sc 294 dev/usb/urio.c sc->sc_in_pipe = NULL;
sc 304 dev/usb/urio.c struct urio_softc *sc;
sc 305 dev/usb/urio.c sc = urio_cd.cd_devs[URIOUNIT(dev)];
sc 310 dev/usb/urio.c if (sc->sc_in_pipe != NULL) {
sc 311 dev/usb/urio.c usbd_abort_pipe(sc->sc_in_pipe);
sc 312 dev/usb/urio.c usbd_close_pipe(sc->sc_in_pipe);
sc 313 dev/usb/urio.c sc->sc_in_pipe = NULL;
sc 315 dev/usb/urio.c if (sc->sc_out_pipe != NULL) {
sc 316 dev/usb/urio.c usbd_abort_pipe(sc->sc_out_pipe);
sc 317 dev/usb/urio.c usbd_close_pipe(sc->sc_out_pipe);
sc 318 dev/usb/urio.c sc->sc_out_pipe = NULL;
sc 327 dev/usb/urio.c struct urio_softc *sc;
sc 334 dev/usb/urio.c sc = urio_cd.cd_devs[URIOUNIT(dev)];
sc 338 dev/usb/urio.c if (sc->sc_dying)
sc 341 dev/usb/urio.c xfer = usbd_alloc_xfer(sc->sc_udev);
sc 350 dev/usb/urio.c sc->sc_refcnt++;
sc 355 dev/usb/urio.c err = usbd_bulk_transfer(xfer, sc->sc_in_pipe, USBD_NO_COPY,
sc 375 dev/usb/urio.c if (--sc->sc_refcnt < 0)
sc 376 dev/usb/urio.c usb_detach_wakeup(&sc->sc_dev);
sc 384 dev/usb/urio.c struct urio_softc *sc;
sc 391 dev/usb/urio.c sc = urio_cd.cd_devs[URIOUNIT(dev)];
sc 396 dev/usb/urio.c if (sc->sc_dying)
sc 399 dev/usb/urio.c xfer = usbd_alloc_xfer(sc->sc_udev);
sc 408 dev/usb/urio.c sc->sc_refcnt++;
sc 417 dev/usb/urio.c err = usbd_bulk_transfer(xfer, sc->sc_out_pipe, USBD_NO_COPY,
sc 433 dev/usb/urio.c if (--sc->sc_refcnt < 0)
sc 434 dev/usb/urio.c usb_detach_wakeup(&sc->sc_dev);
sc 446 dev/usb/urio.c struct urio_softc * sc;
sc 459 dev/usb/urio.c sc = urio_cd.cd_devs[unit];
sc 461 dev/usb/urio.c if (sc->sc_dying)
sc 517 dev/usb/urio.c sc->sc_refcnt++;
sc 519 dev/usb/urio.c err = usbd_do_request_flags(sc->sc_udev, &req, ptr, req_flags,
sc 522 dev/usb/urio.c if (--sc->sc_refcnt < 0)
sc 523 dev/usb/urio.c usb_detach_wakeup(&sc->sc_dev);
sc 160 dev/usb/usb.c struct usb_softc *sc = (struct usb_softc *)self;
sc 170 dev/usb/usb.c sc->sc_bus = aux;
sc 171 dev/usb/usb.c sc->sc_bus->usbctl = sc;
sc 172 dev/usb/usb.c sc->sc_port.power = USB_MAX_POWER;
sc 174 dev/usb/usb.c usbrev = sc->sc_bus->usbrev;
sc 186 dev/usb/usb.c sc->sc_dying = 1;
sc 193 dev/usb/usb.c sc->sc_bus->use_polling++;
sc 195 dev/usb/usb.c ue.u.ue_ctrlr.ue_bus = sc->sc_dev.dv_unit;
sc 200 dev/usb/usb.c sc->sc_bus->soft = softintr_establish(IPL_SOFTNET,
sc 201 dev/usb/usb.c sc->sc_bus->methods->soft_intr, sc->sc_bus);
sc 202 dev/usb/usb.c if (sc->sc_bus->soft == NULL) {
sc 203 dev/usb/usb.c printf("%s: can't register softintr\n", sc->sc_dev.dv_xname);
sc 204 dev/usb/usb.c sc->sc_dying = 1;
sc 209 dev/usb/usb.c err = usbd_new_device(&sc->sc_dev, sc->sc_bus, 0, speed, 0,
sc 210 dev/usb/usb.c &sc->sc_port);
sc 212 dev/usb/usb.c dev = sc->sc_port.device;
sc 214 dev/usb/usb.c sc->sc_dying = 1;
sc 216 dev/usb/usb.c sc->sc_dev.dv_xname);
sc 219 dev/usb/usb.c sc->sc_bus->root_hub = dev;
sc 226 dev/usb/usb.c if (cold && (sc->sc_dev.dv_cfdata->cf_flags & 1))
sc 227 dev/usb/usb.c dev->hub->explore(sc->sc_bus->root_hub);
sc 231 dev/usb/usb.c sc->sc_dev.dv_xname, err);
sc 232 dev/usb/usb.c sc->sc_dying = 1;
sc 235 dev/usb/usb.c sc->sc_bus->use_polling--;
sc 238 dev/usb/usb.c kthread_create_deferred(usb_create_event_thread, sc);
sc 244 dev/usb/usb.c struct usb_softc *sc = arg;
sc 247 dev/usb/usb.c if (sc->sc_bus->usbrev == USBREV_2_0)
sc 250 dev/usb/usb.c if (kthread_create(usb_event_thread, sc, &sc->sc_event_thread,
sc 251 dev/usb/usb.c "%s", sc->sc_dev.dv_xname))
sc 253 dev/usb/usb.c sc->sc_dev.dv_xname);
sc 302 dev/usb/usb.c struct usb_softc *sc = arg;
sc 308 dev/usb/usb.c pwrdly = sc->sc_bus->root_hub->hub->hubdesc.bPwrOn2PwrGood *
sc 310 dev/usb/usb.c usb_delay_ms(sc->sc_bus, pwrdly);
sc 313 dev/usb/usb.c while (sc->sc_bus->usbrev != USBREV_2_0 && threads_pending)
sc 317 dev/usb/usb.c sc->sc_bus->needs_explore = 1;
sc 318 dev/usb/usb.c usb_discover(sc);
sc 322 dev/usb/usb.c if (sc->sc_bus->usbrev == USBREV_2_0) {
sc 327 dev/usb/usb.c while (!sc->sc_dying) {
sc 331 dev/usb/usb.c usb_discover(sc);
sc 333 dev/usb/usb.c (void)tsleep(&sc->sc_bus->needs_explore, PWAIT, "usbevt",
sc 336 dev/usb/usb.c (void)tsleep(&sc->sc_bus->needs_explore, PWAIT, "usbevt",
sc 341 dev/usb/usb.c sc->sc_event_thread = NULL;
sc 344 dev/usb/usb.c wakeup(sc);
sc 390 dev/usb/usb.c struct usb_softc *sc;
sc 402 dev/usb/usb.c sc = usb_cd.cd_devs[unit];
sc 403 dev/usb/usb.c if (sc == NULL)
sc 406 dev/usb/usb.c if (sc->sc_dying)
sc 461 dev/usb/usb.c struct usb_softc *sc;
sc 482 dev/usb/usb.c sc = usb_cd.cd_devs[unit];
sc 484 dev/usb/usb.c if (sc->sc_dying)
sc 519 dev/usb/usb.c sc->sc_bus->devices[addr] == 0)
sc 540 dev/usb/usb.c err = usbd_do_request_flags(sc->sc_bus->devices[addr],
sc 568 dev/usb/usb.c dev = sc->sc_bus->devices[addr];
sc 576 dev/usb/usb.c *(struct usb_device_stats *)data = sc->sc_bus->stats;
sc 666 dev/usb/usb.c struct usb_softc *sc = v;
sc 678 dev/usb/usb.c while (sc->sc_bus->needs_explore && !sc->sc_dying) {
sc 679 dev/usb/usb.c sc->sc_bus->needs_explore = 0;
sc 680 dev/usb/usb.c sc->sc_bus->root_hub->hub->explore(sc->sc_bus->root_hub);
sc 791 dev/usb/usb.c struct usb_softc *sc = (struct usb_softc *)self;
sc 792 dev/usb/usb.c usbd_device_handle dev = sc->sc_port.device;
sc 800 dev/usb/usb.c sc->sc_dying = 1;
sc 814 dev/usb/usb.c struct usb_softc *sc = (struct usb_softc *)self;
sc 819 dev/usb/usb.c sc->sc_dying = 1;
sc 822 dev/usb/usb.c if (sc->sc_port.device != NULL)
sc 823 dev/usb/usb.c usb_disconnect_port(&sc->sc_port, self);
sc 826 dev/usb/usb.c if (sc->sc_event_thread != NULL) {
sc 827 dev/usb/usb.c wakeup(&sc->sc_bus->needs_explore);
sc 828 dev/usb/usb.c if (tsleep(sc, PWAIT, "usbdet", hz * 60))
sc 830 dev/usb/usb.c sc->sc_dev.dv_xname);
sc 837 dev/usb/usb.c if (sc->sc_bus->soft != NULL) {
sc 838 dev/usb/usb.c softintr_disestablish(sc->sc_bus->soft);
sc 839 dev/usb/usb.c sc->sc_bus->soft = NULL;
sc 843 dev/usb/usb.c ue.u.ue_ctrlr.ue_bus = sc->sc_dev.dv_unit;
sc 154 dev/usb/usb_port.h #define USB_ATTACH_START(dname, sc, uaa) \
sc 155 dev/usb/usb_port.h struct __CONCAT(dname,_softc) *sc = \
sc 171 dev/usb/usb_port.h #define USB_DETACH_START(dname, sc) \
sc 172 dev/usb/usb_port.h struct __CONCAT(dname,_softc) *sc = \
sc 175 dev/usb/usb_port.h #define USB_GET_SC_OPEN(dname, unit, sc) \
sc 178 dev/usb/usb_port.h sc = __CONCAT(dname,_cd).cd_devs[unit]; \
sc 179 dev/usb/usb_port.h if (sc == NULL) \
sc 182 dev/usb/usb_port.h #define USB_GET_SC(dname, unit, sc) \
sc 183 dev/usb/usb_port.h sc = __CONCAT(dname,_cd).cd_devs[unit]
sc 83 dev/usb/usbf.c #define DEVNAME(sc) ((sc)->sc_dev.dv_xname)
sc 118 dev/usb/usbf.c struct usbf_softc *sc = (struct usbf_softc *)self;
sc 124 dev/usb/usbf.c sc->sc_bus = aux;
sc 125 dev/usb/usbf.c sc->sc_bus->usbfctl = sc;
sc 127 dev/usb/usbf.c usbrev = sc->sc_bus->usbrev;
sc 139 dev/usb/usbf.c sc->sc_dying = 1;
sc 145 dev/usb/usbf.c TAILQ_INIT(&sc->sc_tskq);
sc 148 dev/usb/usbf.c if (usbf_softintr_establish(sc->sc_bus)) {
sc 149 dev/usb/usbf.c printf("%s: can't establish softintr\n", DEVNAME(sc));
sc 150 dev/usb/usbf.c sc->sc_dying = 1;
sc 155 dev/usb/usbf.c err = usbf_new_device(self, sc->sc_bus, 0, speed, 0, &sc->sc_port);
sc 157 dev/usb/usbf.c printf("%s: usbf_new_device failed, %s\n", DEVNAME(sc),
sc 159 dev/usb/usbf.c sc->sc_dying = 1;
sc 165 dev/usb/usbf.c kthread_create_deferred(usbf_create_thread, sc);
sc 180 dev/usb/usbf.c struct usbf_softc *sc = dev->bus->usbfctl;
sc 186 dev/usb/usbf.c task, sc->sc_bus->intr_context ? "(null)" :
sc 188 dev/usb/usbf.c TAILQ_INSERT_TAIL(&sc->sc_tskq, task, next);
sc 192 dev/usb/usbf.c task, sc->sc_bus->intr_context ? "(null)" :
sc 195 dev/usb/usbf.c wakeup(&sc->sc_tskq);
sc 202 dev/usb/usbf.c struct usbf_softc *sc = dev->bus->usbfctl;
sc 208 dev/usb/usbf.c TAILQ_REMOVE(&sc->sc_tskq, task, next);
sc 223 dev/usb/usbf.c struct usbf_softc *sc = arg;
sc 225 dev/usb/usbf.c if (kthread_create(usbf_task_thread, sc, &sc->sc_proc, "%s",
sc 226 dev/usb/usbf.c DEVNAME(sc)) != 0) {
sc 227 dev/usb/usbf.c printf("%s: can't create task thread\n", DEVNAME(sc));
sc 239 dev/usb/usbf.c struct usbf_softc *sc = arg;
sc 246 dev/usb/usbf.c while (!sc->sc_dying) {
sc 247 dev/usb/usbf.c task = TAILQ_FIRST(&sc->sc_tskq);
sc 249 dev/usb/usbf.c tsleep(&sc->sc_tskq, PWAIT, "usbtsk", 0);
sc 250 dev/usb/usbf.c task = TAILQ_FIRST(&sc->sc_tskq);
sc 254 dev/usb/usbf.c TAILQ_REMOVE(&sc->sc_tskq, task, next);
sc 683 dev/usb/usbf.c struct usbf_softc *sc = dev->bus->usbfctl;
sc 686 dev/usb/usbf.c DEVNAME(sc), usbf_request_type_string(req),
sc 690 dev/usb/usbf.c printf("%s: VALUE: 0x%04x (%s)\n", DEVNAME(sc),
sc 693 dev/usb/usbf.c printf("%s: VALUE: 0x%04x\n", DEVNAME(sc),
sc 696 dev/usb/usbf.c printf("%s: INDEX: 0x%04x\n", DEVNAME(sc), UGETW(req->wIndex));
sc 697 dev/usb/usbf.c printf("%s: LENGTH: 0x%04x\n", DEVNAME(sc), UGETW(req->wLength));
sc 273 dev/usb/uscanner.c struct uscanner_softc *sc = (struct uscanner_softc *)self;
sc 282 dev/usb/uscanner.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 285 dev/usb/uscanner.c sc->sc_dev_flags = uscanner_lookup(uaa->vendor, uaa->product)->flags;
sc 287 dev/usb/uscanner.c sc->sc_udev = uaa->device;
sc 292 dev/usb/uscanner.c sc->sc_dev.dv_xname);
sc 297 dev/usb/uscanner.c err = usbd_device2interface_handle(sc->sc_udev, 0, &sc->sc_iface);
sc 298 dev/usb/uscanner.c if (!err && sc->sc_iface)
sc 299 dev/usb/uscanner.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 302 dev/usb/uscanner.c sc->sc_dev.dv_xname, err, id);
sc 308 dev/usb/uscanner.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 311 dev/usb/uscanner.c sc->sc_dev.dv_xname);
sc 330 dev/usb/uscanner.c sc->sc_dev.dv_xname);
sc 334 dev/usb/uscanner.c sc->sc_bulkin = ed_bulkin->bEndpointAddress;
sc 335 dev/usb/uscanner.c sc->sc_bulkout = ed_bulkout->bEndpointAddress;
sc 337 dev/usb/uscanner.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 338 dev/usb/uscanner.c &sc->sc_dev);
sc 344 dev/usb/uscanner.c struct uscanner_softc *sc;
sc 350 dev/usb/uscanner.c sc = uscanner_cd.cd_devs[unit];
sc 351 dev/usb/uscanner.c if (sc == NULL)
sc 357 dev/usb/uscanner.c if (sc->sc_dying)
sc 360 dev/usb/uscanner.c if (sc->sc_state & USCANNER_OPEN)
sc 363 dev/usb/uscanner.c sc->sc_state |= USCANNER_OPEN;
sc 365 dev/usb/uscanner.c sc->sc_bulkin_buffer = malloc(USCANNER_BUFFERSIZE, M_USBDEV, M_WAITOK);
sc 366 dev/usb/uscanner.c sc->sc_bulkout_buffer = malloc(USCANNER_BUFFERSIZE, M_USBDEV, M_WAITOK);
sc 369 dev/usb/uscanner.c sc->sc_bulkin_bufferlen = USCANNER_BUFFERSIZE;
sc 370 dev/usb/uscanner.c sc->sc_bulkout_bufferlen = USCANNER_BUFFERSIZE;
sc 373 dev/usb/uscanner.c if (sc->sc_bulkin_pipe == NULL) {
sc 374 dev/usb/uscanner.c err = usbd_open_pipe(sc->sc_iface, sc->sc_bulkin,
sc 375 dev/usb/uscanner.c USBD_EXCLUSIVE_USE, &sc->sc_bulkin_pipe);
sc 378 dev/usb/uscanner.c sc->sc_dev.dv_xname, sc->sc_bulkin);
sc 379 dev/usb/uscanner.c uscanner_do_close(sc);
sc 383 dev/usb/uscanner.c if (sc->sc_bulkout_pipe == NULL) {
sc 384 dev/usb/uscanner.c err = usbd_open_pipe(sc->sc_iface, sc->sc_bulkout,
sc 385 dev/usb/uscanner.c USBD_EXCLUSIVE_USE, &sc->sc_bulkout_pipe);
sc 388 dev/usb/uscanner.c sc->sc_dev.dv_xname, sc->sc_bulkout);
sc 389 dev/usb/uscanner.c uscanner_do_close(sc);
sc 394 dev/usb/uscanner.c sc->sc_bulkin_xfer = usbd_alloc_xfer(sc->sc_udev);
sc 395 dev/usb/uscanner.c if (sc->sc_bulkin_xfer == NULL) {
sc 396 dev/usb/uscanner.c uscanner_do_close(sc);
sc 399 dev/usb/uscanner.c sc->sc_bulkout_xfer = usbd_alloc_xfer(sc->sc_udev);
sc 400 dev/usb/uscanner.c if (sc->sc_bulkout_xfer == NULL) {
sc 401 dev/usb/uscanner.c uscanner_do_close(sc);
sc 411 dev/usb/uscanner.c struct uscanner_softc *sc;
sc 413 dev/usb/uscanner.c sc = uscanner_cd.cd_devs[USCANNERUNIT(dev)];
sc 419 dev/usb/uscanner.c if (!(sc->sc_state & USCANNER_OPEN)) {
sc 425 dev/usb/uscanner.c uscanner_do_close(sc);
sc 431 dev/usb/uscanner.c uscanner_do_close(struct uscanner_softc *sc)
sc 433 dev/usb/uscanner.c if (sc->sc_bulkin_xfer) {
sc 434 dev/usb/uscanner.c usbd_free_xfer(sc->sc_bulkin_xfer);
sc 435 dev/usb/uscanner.c sc->sc_bulkin_xfer = NULL;
sc 437 dev/usb/uscanner.c if (sc->sc_bulkout_xfer) {
sc 438 dev/usb/uscanner.c usbd_free_xfer(sc->sc_bulkout_xfer);
sc 439 dev/usb/uscanner.c sc->sc_bulkout_xfer = NULL;
sc 442 dev/usb/uscanner.c if (!(sc->sc_dev_flags & USC_KEEP_OPEN)) {
sc 443 dev/usb/uscanner.c if (sc->sc_bulkin_pipe != NULL) {
sc 444 dev/usb/uscanner.c usbd_abort_pipe(sc->sc_bulkin_pipe);
sc 445 dev/usb/uscanner.c usbd_close_pipe(sc->sc_bulkin_pipe);
sc 446 dev/usb/uscanner.c sc->sc_bulkin_pipe = NULL;
sc 448 dev/usb/uscanner.c if (sc->sc_bulkout_pipe != NULL) {
sc 449 dev/usb/uscanner.c usbd_abort_pipe(sc->sc_bulkout_pipe);
sc 450 dev/usb/uscanner.c usbd_close_pipe(sc->sc_bulkout_pipe);
sc 451 dev/usb/uscanner.c sc->sc_bulkout_pipe = NULL;
sc 455 dev/usb/uscanner.c if (sc->sc_bulkin_buffer) {
sc 456 dev/usb/uscanner.c free(sc->sc_bulkin_buffer, M_USBDEV);
sc 457 dev/usb/uscanner.c sc->sc_bulkin_buffer = NULL;
sc 459 dev/usb/uscanner.c if (sc->sc_bulkout_buffer) {
sc 460 dev/usb/uscanner.c free(sc->sc_bulkout_buffer, M_USBDEV);
sc 461 dev/usb/uscanner.c sc->sc_bulkout_buffer = NULL;
sc 464 dev/usb/uscanner.c sc->sc_state &= ~USCANNER_OPEN;
sc 468 dev/usb/uscanner.c uscanner_do_read(struct uscanner_softc *sc, struct uio *uio, int flag)
sc 474 dev/usb/uscanner.c DPRINTFN(5, ("%s: uscannerread\n", sc->sc_dev.dv_xname));
sc 476 dev/usb/uscanner.c if (sc->sc_dying)
sc 479 dev/usb/uscanner.c while ((n = min(sc->sc_bulkin_bufferlen, uio->uio_resid)) != 0) {
sc 484 dev/usb/uscanner.c sc->sc_bulkin_xfer, sc->sc_bulkin_pipe,
sc 486 dev/usb/uscanner.c sc->sc_bulkin_buffer, &tn,
sc 498 dev/usb/uscanner.c error = uiomove(sc->sc_bulkin_buffer, tn, uio);
sc 509 dev/usb/uscanner.c struct uscanner_softc *sc;
sc 512 dev/usb/uscanner.c sc = uscanner_cd.cd_devs[USCANNERUNIT(dev)];
sc 514 dev/usb/uscanner.c sc->sc_refcnt++;
sc 515 dev/usb/uscanner.c error = uscanner_do_read(sc, uio, flag);
sc 516 dev/usb/uscanner.c if (--sc->sc_refcnt < 0)
sc 517 dev/usb/uscanner.c usb_detach_wakeup(&sc->sc_dev);
sc 523 dev/usb/uscanner.c uscanner_do_write(struct uscanner_softc *sc, struct uio *uio, int flag)
sc 529 dev/usb/uscanner.c DPRINTFN(5, ("%s: uscanner_do_write\n", sc->sc_dev.dv_xname));
sc 531 dev/usb/uscanner.c if (sc->sc_dying)
sc 534 dev/usb/uscanner.c while ((n = min(sc->sc_bulkout_bufferlen, uio->uio_resid)) != 0) {
sc 535 dev/usb/uscanner.c error = uiomove(sc->sc_bulkout_buffer, n, uio);
sc 540 dev/usb/uscanner.c sc->sc_bulkout_xfer, sc->sc_bulkout_pipe,
sc 542 dev/usb/uscanner.c sc->sc_bulkout_buffer, &n,
sc 559 dev/usb/uscanner.c struct uscanner_softc *sc;
sc 562 dev/usb/uscanner.c sc = uscanner_cd.cd_devs[USCANNERUNIT(dev)];
sc 564 dev/usb/uscanner.c sc->sc_refcnt++;
sc 565 dev/usb/uscanner.c error = uscanner_do_write(sc, uio, flag);
sc 566 dev/usb/uscanner.c if (--sc->sc_refcnt < 0)
sc 567 dev/usb/uscanner.c usb_detach_wakeup(&sc->sc_dev);
sc 574 dev/usb/uscanner.c struct uscanner_softc *sc = (struct uscanner_softc *)self;
sc 581 dev/usb/uscanner.c sc->sc_dying = 1;
sc 590 dev/usb/uscanner.c struct uscanner_softc *sc = (struct uscanner_softc *)self;
sc 594 dev/usb/uscanner.c DPRINTF(("uscanner_detach: sc=%p flags=%d\n", sc, flags));
sc 596 dev/usb/uscanner.c sc->sc_dying = 1;
sc 597 dev/usb/uscanner.c sc->sc_dev_flags = 0; /* make close really close device */
sc 600 dev/usb/uscanner.c if (sc->sc_bulkin_pipe != NULL)
sc 601 dev/usb/uscanner.c usbd_abort_pipe(sc->sc_bulkin_pipe);
sc 602 dev/usb/uscanner.c if (sc->sc_bulkout_pipe != NULL)
sc 603 dev/usb/uscanner.c usbd_abort_pipe(sc->sc_bulkout_pipe);
sc 606 dev/usb/uscanner.c if (--sc->sc_refcnt >= 0) {
sc 608 dev/usb/uscanner.c usb_detach_wait(&sc->sc_dev);
sc 620 dev/usb/uscanner.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 621 dev/usb/uscanner.c &sc->sc_dev);
sc 629 dev/usb/uscanner.c struct uscanner_softc *sc;
sc 632 dev/usb/uscanner.c sc = uscanner_cd.cd_devs[USCANNERUNIT(dev)];
sc 634 dev/usb/uscanner.c if (sc->sc_dying)
sc 660 dev/usb/uscanner.c struct uscanner_softc *sc = (void *)kn->kn_hook;
sc 662 dev/usb/uscanner.c SLIST_REMOVE(&sc->sc_selq.si_note, kn, knote, kn_selnext);
sc 671 dev/usb/uscanner.c struct uscanner_softc *sc;
sc 674 dev/usb/uscanner.c sc = uscanner_cd.cd_devs[USCANNERUNIT(dev)];
sc 676 dev/usb/uscanner.c if (sc->sc_dying)
sc 687 dev/usb/uscanner.c klist = &sc->sc_selq.si_note;
sc 695 dev/usb/uscanner.c kn->kn_hook = (void *)sc;
sc 97 dev/usb/uslcom.c int uslcom_open(void *sc, int portno);
sc 99 dev/usb/uslcom.c void uslcom_break(void *sc, int portno, int onoff);
sc 164 dev/usb/uslcom.c struct uslcom_softc *sc = (struct uslcom_softc *)self;
sc 174 dev/usb/uslcom.c sc->sc_udev = uaa->device;
sc 176 dev/usb/uslcom.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 179 dev/usb/uslcom.c if (usbd_set_config_index(sc->sc_udev, USLCOM_CONFIG_NO, 1) != 0) {
sc 181 dev/usb/uslcom.c sc->sc_dev.dv_xname);
sc 182 dev/usb/uslcom.c sc->sc_dying = 1;
sc 187 dev/usb/uslcom.c error = usbd_device2interface_handle(sc->sc_udev, USLCOM_IFACE_NO,
sc 188 dev/usb/uslcom.c &sc->sc_iface);
sc 191 dev/usb/uslcom.c sc->sc_dev.dv_xname);
sc 192 dev/usb/uslcom.c sc->sc_dying = 1;
sc 196 dev/usb/uslcom.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 200 dev/usb/uslcom.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 203 dev/usb/uslcom.c sc->sc_dev.dv_xname, i);
sc 204 dev/usb/uslcom.c sc->sc_dying = 1;
sc 217 dev/usb/uslcom.c printf("%s: missing endpoint\n", sc->sc_dev.dv_xname);
sc 218 dev/usb/uslcom.c sc->sc_dying = 1;
sc 226 dev/usb/uslcom.c uca.device = sc->sc_udev;
sc 227 dev/usb/uslcom.c uca.iface = sc->sc_iface;
sc 229 dev/usb/uslcom.c uca.arg = sc;
sc 232 dev/usb/uslcom.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 233 dev/usb/uslcom.c &sc->sc_dev);
sc 235 dev/usb/uslcom.c sc->sc_subdev = config_found_sm(self, &uca, ucomprint, ucomsubmatch);
sc 241 dev/usb/uslcom.c struct uslcom_softc *sc = (struct uslcom_softc *)self;
sc 244 dev/usb/uslcom.c sc->sc_dying = 1;
sc 245 dev/usb/uslcom.c if (sc->sc_subdev != NULL) {
sc 246 dev/usb/uslcom.c rv = config_detach(sc->sc_subdev, flags);
sc 247 dev/usb/uslcom.c sc->sc_subdev = NULL;
sc 250 dev/usb/uslcom.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 251 dev/usb/uslcom.c &sc->sc_dev);
sc 259 dev/usb/uslcom.c struct uslcom_softc *sc = (struct uslcom_softc *)self;
sc 267 dev/usb/uslcom.c if (sc->sc_subdev != NULL)
sc 268 dev/usb/uslcom.c rv = config_deactivate(sc->sc_subdev);
sc 269 dev/usb/uslcom.c sc->sc_dying = 1;
sc 278 dev/usb/uslcom.c struct uslcom_softc *sc = vsc;
sc 282 dev/usb/uslcom.c if (sc->sc_dying)
sc 290 dev/usb/uslcom.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 300 dev/usb/uslcom.c struct uslcom_softc *sc = vsc;
sc 303 dev/usb/uslcom.c if (sc->sc_dying)
sc 311 dev/usb/uslcom.c usbd_do_request(sc->sc_udev, &req, NULL);
sc 317 dev/usb/uslcom.c struct uslcom_softc *sc = vsc;
sc 331 dev/usb/uslcom.c uslcom_break(sc, portno, onoff);
sc 341 dev/usb/uslcom.c usbd_do_request(sc->sc_udev, &req, NULL);
sc 347 dev/usb/uslcom.c struct uslcom_softc *sc = (struct uslcom_softc *)vsc;
sc 370 dev/usb/uslcom.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 409 dev/usb/uslcom.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 430 dev/usb/uslcom.c struct uslcom_softc *sc = vsc;
sc 433 dev/usb/uslcom.c *msr = sc->sc_msr;
sc 435 dev/usb/uslcom.c *lsr = sc->sc_lsr;
sc 441 dev/usb/uslcom.c struct uslcom_softc *sc = vsc;
sc 450 dev/usb/uslcom.c usbd_do_request(sc->sc_udev, &req, NULL);
sc 161 dev/usb/usscanner.c void usscanner_cleanup(struct usscanner_softc *sc);
sc 164 dev/usb/usscanner.c void usscanner_done(struct usscanner_softc *sc);
sc 165 dev/usb/usscanner.c void usscanner_sense(struct usscanner_softc *sc);
sc 210 dev/usb/usscanner.c struct usscanner_softc *sc = (struct usscanner_softc *)self;
sc 221 dev/usb/usscanner.c DPRINTFN(10,("usscanner_attach: sc=%p\n", sc));
sc 224 dev/usb/usscanner.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 230 dev/usb/usscanner.c sc->sc_dev.dv_xname);
sc 237 dev/usb/usscanner.c sc->sc_dev.dv_xname);
sc 241 dev/usb/usscanner.c sc->sc_udev = dev;
sc 242 dev/usb/usscanner.c sc->sc_iface = iface;
sc 247 dev/usb/usscanner.c sc->sc_in_addr = -1;
sc 248 dev/usb/usscanner.c sc->sc_intr_addr = -1;
sc 249 dev/usb/usscanner.c sc->sc_out_addr = -1;
sc 254 dev/usb/usscanner.c sc->sc_dev.dv_xname, i);
sc 259 dev/usb/usscanner.c sc->sc_in_addr = ed->bEndpointAddress;
sc 262 dev/usb/usscanner.c sc->sc_intr_addr = ed->bEndpointAddress;
sc 265 dev/usb/usscanner.c sc->sc_out_addr = ed->bEndpointAddress;
sc 268 dev/usb/usscanner.c if (sc->sc_in_addr == -1 || sc->sc_intr_addr == -1 ||
sc 269 dev/usb/usscanner.c sc->sc_out_addr == -1) {
sc 270 dev/usb/usscanner.c printf("%s: missing endpoint\n", sc->sc_dev.dv_xname);
sc 274 dev/usb/usscanner.c err = usbd_open_pipe(sc->sc_iface, sc->sc_in_addr,
sc 275 dev/usb/usscanner.c USBD_EXCLUSIVE_USE, &sc->sc_in_pipe);
sc 278 dev/usb/usscanner.c sc->sc_dev.dv_xname, err);
sc 283 dev/usb/usscanner.c err = usbd_open_pipe(sc->sc_iface, sc->sc_intr_addr,
sc 284 dev/usb/usscanner.c USBD_EXCLUSIVE_USE, &sc->sc_intr_pipe);
sc 288 dev/usb/usscanner.c sc->sc_dev.dv_xname, err);
sc 289 dev/usb/usscanner.c usscanner_cleanup(sc);
sc 292 dev/usb/usscanner.c err = usbd_open_pipe(sc->sc_iface, sc->sc_out_addr,
sc 293 dev/usb/usscanner.c USBD_EXCLUSIVE_USE, &sc->sc_out_pipe);
sc 296 dev/usb/usscanner.c sc->sc_dev.dv_xname, err);
sc 297 dev/usb/usscanner.c usscanner_cleanup(sc);
sc 301 dev/usb/usscanner.c sc->sc_cmd_xfer = usbd_alloc_xfer(uaa->device);
sc 302 dev/usb/usscanner.c if (sc->sc_cmd_xfer == NULL) {
sc 304 dev/usb/usscanner.c sc->sc_dev.dv_xname, err);
sc 305 dev/usb/usscanner.c usscanner_cleanup(sc);
sc 310 dev/usb/usscanner.c sc->sc_cmd_buffer = usbd_alloc_buffer(sc->sc_cmd_xfer,
sc 312 dev/usb/usscanner.c if (sc->sc_cmd_buffer == NULL) {
sc 314 dev/usb/usscanner.c sc->sc_dev.dv_xname, err);
sc 315 dev/usb/usscanner.c usscanner_cleanup(sc);
sc 319 dev/usb/usscanner.c sc->sc_intr_xfer = usbd_alloc_xfer (uaa->device);
sc 320 dev/usb/usscanner.c if (sc->sc_intr_xfer == NULL) {
sc 322 dev/usb/usscanner.c sc->sc_dev.dv_xname, err);
sc 323 dev/usb/usscanner.c usscanner_cleanup(sc);
sc 327 dev/usb/usscanner.c sc->sc_data_xfer = usbd_alloc_xfer(uaa->device);
sc 328 dev/usb/usscanner.c if (sc->sc_data_xfer == NULL) {
sc 330 dev/usb/usscanner.c sc->sc_dev.dv_xname, err);
sc 331 dev/usb/usscanner.c usscanner_cleanup(sc);
sc 334 dev/usb/usscanner.c sc->sc_data_buffer = usbd_alloc_buffer(sc->sc_data_xfer,
sc 336 dev/usb/usscanner.c if (sc->sc_data_buffer == NULL) {
sc 338 dev/usb/usscanner.c sc->sc_dev.dv_xname, err);
sc 339 dev/usb/usscanner.c usscanner_cleanup(sc);
sc 346 dev/usb/usscanner.c sc->sc_adapter.scsipi_cmd = usscanner_scsipi_cmd;
sc 347 dev/usb/usscanner.c sc->sc_adapter.scsipi_minphys = usscanner_scsipi_minphys;
sc 352 dev/usb/usscanner.c sc->sc_link.flags &= ~SDEV_ATAPI;
sc 353 dev/usb/usscanner.c sc->sc_link.adapter_buswidth = 2;
sc 354 dev/usb/usscanner.c sc->sc_link.adapter_target = USSCANNER_SCSIID_HOST;
sc 356 dev/usb/usscanner.c sc->sc_link.adapter_softc = sc;
sc 357 dev/usb/usscanner.c sc->sc_link.adapter = &sc->sc_adapter;
sc 358 dev/usb/usscanner.c sc->sc_link.device = &usscanner_dev;
sc 359 dev/usb/usscanner.c sc->sc_link.openings = 1;
sc 362 dev/usb/usscanner.c saa.saa_sc_link = &sc->sc_link;
sc 364 dev/usb/usscanner.c sc->sc_child = config_found(&sc->sc_dev, &saa, scsiprint);
sc 366 dev/usb/usscanner.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 367 dev/usb/usscanner.c &sc->sc_dev);
sc 369 dev/usb/usscanner.c DPRINTFN(10, ("usscanner_attach: %p\n", sc->sc_udev));
sc 375 dev/usb/usscanner.c struct usscanner_softc *sc = (struct usscanner_softc *)self;
sc 378 dev/usb/usscanner.c DPRINTF(("usscanner_detach: sc=%p flags=%d\n", sc, flags));
sc 380 dev/usb/usscanner.c sc->sc_dying = 1;
sc 382 dev/usb/usscanner.c if (sc->sc_in_pipe != NULL)
sc 383 dev/usb/usscanner.c usbd_abort_pipe(sc->sc_in_pipe);
sc 384 dev/usb/usscanner.c if (sc->sc_intr_pipe != NULL)
sc 385 dev/usb/usscanner.c usbd_abort_pipe(sc->sc_intr_pipe);
sc 386 dev/usb/usscanner.c if (sc->sc_out_pipe != NULL)
sc 387 dev/usb/usscanner.c usbd_abort_pipe(sc->sc_out_pipe);
sc 390 dev/usb/usscanner.c if (--sc->sc_refcnt >= 0) {
sc 392 dev/usb/usscanner.c usb_detach_wait(&sc->sc_dev);
sc 396 dev/usb/usscanner.c if (sc->sc_child != NULL)
sc 397 dev/usb/usscanner.c rv = config_detach(sc->sc_child, flags);
sc 401 dev/usb/usscanner.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 402 dev/usb/usscanner.c &sc->sc_dev);
sc 408 dev/usb/usscanner.c usscanner_cleanup(struct usscanner_softc *sc)
sc 410 dev/usb/usscanner.c if (sc->sc_in_pipe != NULL) {
sc 411 dev/usb/usscanner.c usbd_close_pipe(sc->sc_in_pipe);
sc 412 dev/usb/usscanner.c sc->sc_in_pipe = NULL;
sc 414 dev/usb/usscanner.c if (sc->sc_intr_pipe != NULL) {
sc 415 dev/usb/usscanner.c usbd_close_pipe(sc->sc_intr_pipe);
sc 416 dev/usb/usscanner.c sc->sc_intr_pipe = NULL;
sc 418 dev/usb/usscanner.c if (sc->sc_out_pipe != NULL) {
sc 419 dev/usb/usscanner.c usbd_close_pipe(sc->sc_out_pipe);
sc 420 dev/usb/usscanner.c sc->sc_out_pipe = NULL;
sc 422 dev/usb/usscanner.c if (sc->sc_cmd_xfer != NULL) {
sc 423 dev/usb/usscanner.c usbd_free_xfer(sc->sc_cmd_xfer);
sc 424 dev/usb/usscanner.c sc->sc_cmd_xfer = NULL;
sc 426 dev/usb/usscanner.c if (sc->sc_data_xfer != NULL) {
sc 427 dev/usb/usscanner.c usbd_free_xfer(sc->sc_data_xfer);
sc 428 dev/usb/usscanner.c sc->sc_data_xfer = NULL;
sc 435 dev/usb/usscanner.c struct usscanner_softc *sc = (struct usscanner_softc *)self;
sc 442 dev/usb/usscanner.c sc->sc_dying = 1;
sc 457 dev/usb/usscanner.c usscanner_sense(struct usscanner_softc *sc)
sc 459 dev/usb/usscanner.c struct scsipi_xfer *xs = sc->sc_xs;
sc 470 dev/usb/usscanner.c sc->sc_state = UAS_SENSECMD;
sc 471 dev/usb/usscanner.c memcpy(sc->sc_cmd_buffer, &sense_cmd, sizeof sense_cmd);
sc 472 dev/usb/usscanner.c usbd_setup_xfer(sc->sc_cmd_xfer, sc->sc_out_pipe, sc, sc->sc_cmd_buffer,
sc 475 dev/usb/usscanner.c err = usbd_transfer(sc->sc_cmd_xfer);
sc 480 dev/usb/usscanner.c usscanner_done(sc);
sc 487 dev/usb/usscanner.c struct usscanner_softc *sc = priv;
sc 493 dev/usb/usscanner.c if (sc->sc_state != UAS_STATUS) {
sc 494 dev/usb/usscanner.c printf("%s: !UAS_STATUS\n", sc->sc_dev.dv_xname);
sc 496 dev/usb/usscanner.c if (sc->sc_status != 0) {
sc 497 dev/usb/usscanner.c printf("%s: status byte=0x%02x\n", sc->sc_dev.dv_xname, sc->sc_status);
sc 502 dev/usb/usscanner.c sc->sc_state = UAS_IDLE;
sc 504 dev/usb/usscanner.c sc->sc_xs->xs_status |= XS_STS_DONE;
sc 506 dev/usb/usscanner.c scsipi_done(sc->sc_xs);
sc 514 dev/usb/usscanner.c struct usscanner_softc *sc = priv;
sc 515 dev/usb/usscanner.c struct scsipi_xfer *xs = sc->sc_xs;
sc 521 dev/usb/usscanner.c if (sc->sc_state != UAS_DATA) {
sc 522 dev/usb/usscanner.c printf("%s: !UAS_DATA\n", sc->sc_dev.dv_xname);
sc 533 dev/usb/usscanner.c memcpy(xs->data, sc->sc_data_buffer, len);
sc 541 dev/usb/usscanner.c usscanner_sense(sc);
sc 549 dev/usb/usscanner.c usscanner_done(sc);
sc 556 dev/usb/usscanner.c struct usscanner_softc *sc = priv;
sc 557 dev/usb/usscanner.c struct scsipi_xfer *xs = sc->sc_xs;
sc 563 dev/usb/usscanner.c if (sc->sc_state != UAS_SENSEDATA) {
sc 564 dev/usb/usscanner.c printf("%s: !UAS_SENSEDATA\n", sc->sc_dev.dv_xname);
sc 572 dev/usb/usscanner.c memcpy(&xs->sense, sc->sc_data_buffer, len);
sc 586 dev/usb/usscanner.c usscanner_done(sc);
sc 590 dev/usb/usscanner.c usscanner_done(struct usscanner_softc *sc)
sc 592 dev/usb/usscanner.c struct scsipi_xfer *xs = sc->sc_xs;
sc 595 dev/usb/usscanner.c DPRINTFN(10,("usscanner_done: error=%d\n", sc->sc_xs->error));
sc 597 dev/usb/usscanner.c sc->sc_state = UAS_STATUS;
sc 598 dev/usb/usscanner.c usbd_setup_xfer(sc->sc_intr_xfer, sc->sc_intr_pipe, sc, &sc->sc_status,
sc 601 dev/usb/usscanner.c err = usbd_transfer(sc->sc_intr_xfer);
sc 611 dev/usb/usscanner.c struct usscanner_softc *sc = priv;
sc 612 dev/usb/usscanner.c struct scsipi_xfer *xs = sc->sc_xs;
sc 623 dev/usb/usscanner.c if (sc->sc_state != UAS_SENSECMD) {
sc 624 dev/usb/usscanner.c printf("%s: !UAS_SENSECMD\n", sc->sc_dev.dv_xname);
sc 641 dev/usb/usscanner.c sc->sc_state = UAS_SENSEDATA;
sc 642 dev/usb/usscanner.c usbd_setup_xfer(sc->sc_data_xfer, sc->sc_in_pipe, sc,
sc 643 dev/usb/usscanner.c sc->sc_data_buffer,
sc 646 dev/usb/usscanner.c err = usbd_transfer(sc->sc_data_xfer);
sc 651 dev/usb/usscanner.c usscanner_done(sc);
sc 658 dev/usb/usscanner.c struct usscanner_softc *sc = priv;
sc 659 dev/usb/usscanner.c struct scsipi_xfer *xs = sc->sc_xs;
sc 671 dev/usb/usscanner.c if (sc->sc_state != UAS_CMD) {
sc 672 dev/usb/usscanner.c printf("%s: !UAS_CMD\n", sc->sc_dev.dv_xname);
sc 700 dev/usb/usscanner.c pipe = sc->sc_in_pipe;
sc 704 dev/usb/usscanner.c memcpy(sc->sc_data_buffer, xs->data, xs->datalen);
sc 705 dev/usb/usscanner.c pipe = sc->sc_out_pipe;
sc 707 dev/usb/usscanner.c sc->sc_state = UAS_DATA;
sc 708 dev/usb/usscanner.c usbd_setup_xfer(sc->sc_data_xfer, pipe, sc, sc->sc_data_buffer,
sc 711 dev/usb/usscanner.c err = usbd_transfer(sc->sc_data_xfer);
sc 717 dev/usb/usscanner.c usscanner_done(sc);
sc 724 dev/usb/usscanner.c struct usscanner_softc *sc = sc_link->adapter_softc;
sc 730 dev/usb/usscanner.c sc->sc_dev.dv_xname,
sc 736 dev/usb/usscanner.c if (sc->sc_dying) {
sc 744 dev/usb/usscanner.c DPRINTF(("%s: wrong SCSI ID %d\n", sc->sc_dev.dv_xname,
sc 750 dev/usb/usscanner.c if (sc->sc_state != UAS_IDLE) {
sc 751 dev/usb/usscanner.c printf("%s: !UAS_IDLE\n", sc->sc_dev.dv_xname);
sc 765 dev/usb/usscanner.c sc->sc_state = UAS_CMD;
sc 766 dev/usb/usscanner.c sc->sc_xs = xs;
sc 767 dev/usb/usscanner.c memcpy(sc->sc_cmd_buffer, xs->cmd, xs->cmdlen);
sc 768 dev/usb/usscanner.c usbd_setup_xfer(sc->sc_cmd_xfer, sc->sc_out_pipe, sc, sc->sc_cmd_buffer,
sc 770 dev/usb/usscanner.c err = usbd_transfer(sc->sc_cmd_xfer);
sc 780 dev/usb/usscanner.c sc->sc_state = UAS_IDLE;
sc 147 dev/usb/uts.c struct uts_softc *sc = (struct uts_softc *)self;
sc 156 dev/usb/uts.c sc->sc_udev = uaa->device;
sc 157 dev/usb/uts.c sc->sc_product = uaa->product;
sc 158 dev/usb/uts.c sc->sc_vendor = uaa->vendor;
sc 159 dev/usb/uts.c sc->sc_intr_number = -1;
sc 160 dev/usb/uts.c sc->sc_intr_pipe = NULL;
sc 161 dev/usb/uts.c sc->sc_enabled = sc->sc_isize = 0;
sc 164 dev/usb/uts.c bcopy(&def_scale, &sc->sc_tsscale, sizeof(sc->sc_tsscale));
sc 169 dev/usb/uts.c printf("%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 175 dev/usb/uts.c sc->sc_dev.dv_xname);
sc 176 dev/usb/uts.c sc->sc_dying = 1;
sc 181 dev/usb/uts.c cdesc = usbd_get_config_descriptor(sc->sc_udev);
sc 184 dev/usb/uts.c sc->sc_dev.dv_xname);
sc 185 dev/usb/uts.c sc->sc_dying = 1;
sc 190 dev/usb/uts.c if (usbd_device2interface_handle(uaa->device, 0, &sc->sc_iface) != 0) {
sc 192 dev/usb/uts.c sc->sc_dev.dv_xname);
sc 193 dev/usb/uts.c sc->sc_dying = 1;
sc 198 dev/usb/uts.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 199 dev/usb/uts.c sc->sc_iface_number = id->bInterfaceNumber;
sc 203 dev/usb/uts.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 206 dev/usb/uts.c sc->sc_dev.dv_xname, i);
sc 207 dev/usb/uts.c sc->sc_dying = 1;
sc 213 dev/usb/uts.c sc->sc_intr_number = ed->bEndpointAddress;
sc 214 dev/usb/uts.c sc->sc_isize = UGETW(ed->wMaxPacketSize);
sc 218 dev/usb/uts.c if (sc->sc_intr_number== -1) {
sc 220 dev/usb/uts.c sc->sc_dev.dv_xname);
sc 221 dev/usb/uts.c sc->sc_dying = 1;
sc 225 dev/usb/uts.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 226 dev/usb/uts.c &sc->sc_dev);
sc 229 dev/usb/uts.c a.accesscookie = sc;
sc 231 dev/usb/uts.c sc->sc_wsmousedev = config_found(self, &a, wsmousedevprint);
sc 237 dev/usb/uts.c struct uts_softc *sc = (struct uts_softc *)self;
sc 240 dev/usb/uts.c if (sc->sc_intr_pipe != NULL) {
sc 241 dev/usb/uts.c usbd_abort_pipe(sc->sc_intr_pipe);
sc 242 dev/usb/uts.c usbd_close_pipe(sc->sc_intr_pipe);
sc 243 dev/usb/uts.c sc->sc_intr_pipe = NULL;
sc 246 dev/usb/uts.c sc->sc_dying = 1;
sc 248 dev/usb/uts.c if (sc->sc_wsmousedev != NULL) {
sc 249 dev/usb/uts.c rv = config_detach(sc->sc_wsmousedev, flags);
sc 250 dev/usb/uts.c sc->sc_wsmousedev = NULL;
sc 253 dev/usb/uts.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 254 dev/usb/uts.c &sc->sc_dev);
sc 262 dev/usb/uts.c struct uts_softc *sc = (struct uts_softc *)self;
sc 270 dev/usb/uts.c if (sc->sc_wsmousedev != NULL)
sc 271 dev/usb/uts.c rv = config_deactivate(sc->sc_wsmousedev);
sc 272 dev/usb/uts.c sc->sc_dying = 1;
sc 282 dev/usb/uts.c struct uts_softc *sc = v;
sc 285 dev/usb/uts.c if (sc->sc_dying)
sc 288 dev/usb/uts.c if (sc->sc_enabled)
sc 291 dev/usb/uts.c if (sc->sc_isize == 0)
sc 293 dev/usb/uts.c sc->sc_ibuf = malloc(sc->sc_isize, M_USBDEV, M_WAITOK);
sc 294 dev/usb/uts.c err = usbd_open_pipe_intr(sc->sc_iface, sc->sc_intr_number,
sc 295 dev/usb/uts.c USBD_SHORT_XFER_OK, &sc->sc_intr_pipe, sc, sc->sc_ibuf,
sc 296 dev/usb/uts.c sc->sc_isize, uts_intr, USBD_DEFAULT_INTERVAL);
sc 298 dev/usb/uts.c free(sc->sc_ibuf, M_USBDEV);
sc 299 dev/usb/uts.c sc->sc_intr_pipe = NULL;
sc 303 dev/usb/uts.c sc->sc_enabled = 1;
sc 304 dev/usb/uts.c sc->sc_buttons = 0;
sc 312 dev/usb/uts.c struct uts_softc *sc = v;
sc 314 dev/usb/uts.c if (!sc->sc_enabled) {
sc 320 dev/usb/uts.c if (sc->sc_intr_pipe != NULL) {
sc 321 dev/usb/uts.c usbd_abort_pipe(sc->sc_intr_pipe);
sc 322 dev/usb/uts.c usbd_close_pipe(sc->sc_intr_pipe);
sc 323 dev/usb/uts.c sc->sc_intr_pipe = NULL;
sc 326 dev/usb/uts.c if (sc->sc_ibuf != NULL) {
sc 327 dev/usb/uts.c free(sc->sc_ibuf, M_USBDEV);
sc 328 dev/usb/uts.c sc->sc_ibuf = NULL;
sc 331 dev/usb/uts.c sc->sc_enabled = 0;
sc 338 dev/usb/uts.c struct uts_softc *sc = v;
sc 356 dev/usb/uts.c sc->sc_tsscale.minx = wsmc->minx;
sc 357 dev/usb/uts.c sc->sc_tsscale.maxx = wsmc->maxx;
sc 358 dev/usb/uts.c sc->sc_tsscale.miny = wsmc->miny;
sc 359 dev/usb/uts.c sc->sc_tsscale.maxy = wsmc->maxy;
sc 360 dev/usb/uts.c sc->sc_tsscale.swapxy = wsmc->swapxy;
sc 361 dev/usb/uts.c sc->sc_tsscale.resx = wsmc->resx;
sc 362 dev/usb/uts.c sc->sc_tsscale.resy = wsmc->resy;
sc 363 dev/usb/uts.c sc->sc_rawmode = wsmc->samplelen;
sc 366 dev/usb/uts.c wsmc->minx = sc->sc_tsscale.minx;
sc 367 dev/usb/uts.c wsmc->maxx = sc->sc_tsscale.maxx;
sc 368 dev/usb/uts.c wsmc->miny = sc->sc_tsscale.miny;
sc 369 dev/usb/uts.c wsmc->maxy = sc->sc_tsscale.maxy;
sc 370 dev/usb/uts.c wsmc->swapxy = sc->sc_tsscale.swapxy;
sc 371 dev/usb/uts.c wsmc->resx = sc->sc_tsscale.resx;
sc 372 dev/usb/uts.c wsmc->resy = sc->sc_tsscale.resy;
sc 373 dev/usb/uts.c wsmc->samplelen = sc->sc_rawmode;
sc 389 dev/usb/uts.c struct uts_softc *sc = addr;
sc 390 dev/usb/uts.c u_char *p = sc->sc_ibuf;
sc 393 dev/usb/uts.c switch (sc->sc_product) {
sc 399 dev/usb/uts.c sc->sc_pkts = 0x8;
sc 407 dev/usb/uts.c switch (sc->sc_vendor) {
sc 413 dev/usb/uts.c sc->sc_pkts = 0x5;
sc 420 dev/usb/uts.c sc->sc_pkts = 0x4;
sc 427 dev/usb/uts.c sc->sc_dev.dv_xname, down, sc->sc_pkts));
sc 431 dev/usb/uts.c if (sc->sc_tsscale.swapxy) { /* Swap X/Y-Axis */
sc 439 dev/usb/uts.c if (!sc->sc_rawmode) {
sc 441 dev/usb/uts.c tp.x = ((tp.x - sc->sc_tsscale.minx) *
sc 442 dev/usb/uts.c sc->sc_tsscale.resx) /
sc 443 dev/usb/uts.c (sc->sc_tsscale.maxx - sc->sc_tsscale.minx);
sc 444 dev/usb/uts.c tp.y = ((tp.y - sc->sc_tsscale.miny) *
sc 445 dev/usb/uts.c sc->sc_tsscale.resy) /
sc 446 dev/usb/uts.c (sc->sc_tsscale.maxy - sc->sc_tsscale.miny);
sc 450 dev/usb/uts.c tp.x = sc->sc_oldx;
sc 451 dev/usb/uts.c tp.y = sc->sc_oldy;
sc 461 dev/usb/uts.c struct uts_softc *sc = addr;
sc 474 dev/usb/uts.c printf("%s: status %d\n", sc->sc_dev.dv_xname, status);
sc 475 dev/usb/uts.c usbd_clear_endpoint_stall_async(sc->sc_intr_pipe);
sc 479 dev/usb/uts.c tp = uts_get_pos(sc, tp);
sc 481 dev/usb/uts.c if (len != sc->sc_pkts) {
sc 483 dev/usb/uts.c sc->sc_dev.dv_xname, len, sc->sc_isize));
sc 488 dev/usb/uts.c sc->sc_dev.dv_xname, tp.z, tp.x, tp.y));
sc 490 dev/usb/uts.c wsmouse_input(sc->sc_wsmousedev, tp.z, tp.x, tp.y, 0, 0,
sc 493 dev/usb/uts.c sc->sc_oldy = tp.y;
sc 494 dev/usb/uts.c sc->sc_oldx = tp.x;
sc 239 dev/usb/uvisor.c struct uvisor_softc *sc = (struct uvisor_softc *)self;
sc 248 dev/usb/uvisor.c char *devname = sc->sc_dev.dv_xname;
sc 253 dev/usb/uvisor.c DPRINTFN(10,("\nuvisor_attach: sc=%p\n", sc));
sc 274 dev/usb/uvisor.c sc->sc_flags = uvisor_lookup(uaa->vendor, uaa->product)->uv_flags;
sc 275 dev/usb/uvisor.c sc->sc_vendor = uaa->vendor;
sc 277 dev/usb/uvisor.c if ((sc->sc_flags & (VISOR | PALM4)) == 0) {
sc 279 dev/usb/uvisor.c sc->sc_dev.dv_xname);
sc 285 dev/usb/uvisor.c sc->sc_udev = dev;
sc 286 dev/usb/uvisor.c sc->sc_iface = iface;
sc 295 dev/usb/uvisor.c uca.arg = sc;
sc 297 dev/usb/uvisor.c err = uvisor_init(sc, &coninfo, &palmconinfo);
sc 299 dev/usb/uvisor.c printf("%s: init failed, %s\n", sc->sc_dev.dv_xname,
sc 304 dev/usb/uvisor.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 305 dev/usb/uvisor.c &sc->sc_dev);
sc 307 dev/usb/uvisor.c if (sc->sc_flags & VISOR) {
sc 308 dev/usb/uvisor.c sc->sc_numcon = UGETW(coninfo.num_ports);
sc 309 dev/usb/uvisor.c if (sc->sc_numcon > UVISOR_MAX_CONN)
sc 310 dev/usb/uvisor.c sc->sc_numcon = UVISOR_MAX_CONN;
sc 313 dev/usb/uvisor.c for (i = 0; i < sc->sc_numcon; ++i) {
sc 352 dev/usb/uvisor.c sc->sc_subdevs[i] = config_found_sm(self, &uca,
sc 356 dev/usb/uvisor.c sc->sc_dev.dv_xname, port, hasin, hasout);
sc 359 dev/usb/uvisor.c sc->sc_numcon = palmconinfo.num_ports;
sc 360 dev/usb/uvisor.c if (sc->sc_numcon > UVISOR_MAX_CONN)
sc 361 dev/usb/uvisor.c sc->sc_numcon = UVISOR_MAX_CONN;
sc 364 dev/usb/uvisor.c for (i = 0; i < sc->sc_numcon; ++i) {
sc 381 dev/usb/uvisor.c sc->sc_subdevs[i] = config_found_sm(self, &uca,
sc 390 dev/usb/uvisor.c sc->sc_dying = 1;
sc 396 dev/usb/uvisor.c struct uvisor_softc *sc = (struct uvisor_softc *)self;
sc 405 dev/usb/uvisor.c for (i = 0; i < sc->sc_numcon; i++)
sc 406 dev/usb/uvisor.c if (sc->sc_subdevs[i] != NULL)
sc 407 dev/usb/uvisor.c rv = config_deactivate(sc->sc_subdevs[i]);
sc 408 dev/usb/uvisor.c sc->sc_dying = 1;
sc 417 dev/usb/uvisor.c struct uvisor_softc *sc = (struct uvisor_softc *)self;
sc 421 dev/usb/uvisor.c DPRINTF(("uvisor_detach: sc=%p flags=%d\n", sc, flags));
sc 422 dev/usb/uvisor.c sc->sc_dying = 1;
sc 423 dev/usb/uvisor.c for (i = 0; i < sc->sc_numcon; i++) {
sc 424 dev/usb/uvisor.c if (sc->sc_subdevs[i] != NULL) {
sc 425 dev/usb/uvisor.c rv |= config_detach(sc->sc_subdevs[i], flags);
sc 426 dev/usb/uvisor.c sc->sc_subdevs[i] = NULL;
sc 430 dev/usb/uvisor.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 431 dev/usb/uvisor.c &sc->sc_dev);
sc 437 dev/usb/uvisor.c uvisor_init(struct uvisor_softc *sc, struct uvisor_connection_info *ci,
sc 445 dev/usb/uvisor.c if (sc->sc_flags & PALM4) {
sc 452 dev/usb/uvisor.c err = usbd_do_request_flags(sc->sc_udev, &req, cpi,
sc 454 dev/usb/uvisor.c if (err == USBD_STALLED && sc->sc_vendor == USB_VENDOR_SONY) {
sc 460 dev/usb/uvisor.c sc->sc_flags = CLIE4;
sc 467 dev/usb/uvisor.c if (sc->sc_flags & VISOR) {
sc 474 dev/usb/uvisor.c err = usbd_do_request_flags(sc->sc_udev, &req, ci,
sc 480 dev/usb/uvisor.c if (sc->sc_flags & NOFRE)
sc 489 dev/usb/uvisor.c err = usbd_do_request(sc->sc_udev, &req, &avail);
sc 500 dev/usb/uvisor.c struct uvisor_softc *sc = addr;
sc 505 dev/usb/uvisor.c if (sc->sc_dying)
sc 513 dev/usb/uvisor.c (void)usbd_do_request_flags(sc->sc_udev, &req, &coninfo,
sc 242 dev/usb/uvscom.c struct uvscom_softc *sc = (struct uvscom_softc *)self;
sc 249 dev/usb/uvscom.c const char *devname = sc->sc_dev.dv_xname;
sc 258 dev/usb/uvscom.c sc->sc_udev = dev;
sc 260 dev/usb/uvscom.c DPRINTF(("uvscom attach: sc = %p\n", sc));
sc 264 dev/usb/uvscom.c sc->sc_intr_number = -1;
sc 265 dev/usb/uvscom.c sc->sc_intr_pipe = NULL;
sc 272 dev/usb/uvscom.c sc->sc_dying = 1;
sc 277 dev/usb/uvscom.c cdesc = usbd_get_config_descriptor(sc->sc_udev);
sc 281 dev/usb/uvscom.c sc->sc_dev.dv_xname);
sc 282 dev/usb/uvscom.c sc->sc_dying = 1;
sc 288 dev/usb/uvscom.c &sc->sc_iface);
sc 292 dev/usb/uvscom.c sc->sc_dying = 1;
sc 296 dev/usb/uvscom.c id = usbd_get_interface_descriptor(sc->sc_iface);
sc 297 dev/usb/uvscom.c sc->sc_iface_number = id->bInterfaceNumber;
sc 301 dev/usb/uvscom.c ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i);
sc 304 dev/usb/uvscom.c sc->sc_dev.dv_xname, i);
sc 305 dev/usb/uvscom.c sc->sc_dying = 1;
sc 317 dev/usb/uvscom.c sc->sc_intr_number = ed->bEndpointAddress;
sc 318 dev/usb/uvscom.c sc->sc_isize = UGETW(ed->wMaxPacketSize);
sc 324 dev/usb/uvscom.c sc->sc_dev.dv_xname);
sc 325 dev/usb/uvscom.c sc->sc_dying = 1;
sc 330 dev/usb/uvscom.c sc->sc_dev.dv_xname);
sc 331 dev/usb/uvscom.c sc->sc_dying = 1;
sc 334 dev/usb/uvscom.c if (sc->sc_intr_number == -1) {
sc 336 dev/usb/uvscom.c sc->sc_dev.dv_xname);
sc 337 dev/usb/uvscom.c sc->sc_dying = 1;
sc 341 dev/usb/uvscom.c sc->sc_dtr = sc->sc_rts = 0;
sc 342 dev/usb/uvscom.c sc->sc_lcr = UVSCOM_LINE_INIT;
sc 351 dev/usb/uvscom.c uca.iface = sc->sc_iface;
sc 353 dev/usb/uvscom.c uca.arg = sc;
sc 356 dev/usb/uvscom.c err = uvscom_reset(sc);
sc 359 dev/usb/uvscom.c printf("%s: reset failed, %s\n", sc->sc_dev.dv_xname,
sc 361 dev/usb/uvscom.c sc->sc_dying = 1;
sc 366 dev/usb/uvscom.c ucom->sc_bulkin_no, ucom->sc_bulkout_no, sc->sc_intr_number));
sc 368 dev/usb/uvscom.c usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev,
sc 369 dev/usb/uvscom.c &sc->sc_dev);
sc 372 dev/usb/uvscom.c uca.bulkin, uca.bulkout, sc->sc_intr_number ));
sc 373 dev/usb/uvscom.c sc->sc_subdev = config_found_sm(self, &uca, ucomprint, ucomsubmatch);
sc 379 dev/usb/uvscom.c struct uvscom_softc *sc = (struct uvscom_softc *)self;
sc 382 dev/usb/uvscom.c DPRINTF(("uvscom_detach: sc = %p\n", sc));
sc 384 dev/usb/uvscom.c sc->sc_dying = 1;
sc 386 dev/usb/uvscom.c if (sc->sc_intr_pipe != NULL) {
sc 387 dev/usb/uvscom.c usbd_abort_pipe(sc->sc_intr_pipe);
sc 388 dev/usb/uvscom.c usbd_close_pipe(sc->sc_intr_pipe);
sc 389 dev/usb/uvscom.c free(sc->sc_intr_buf, M_USBDEV);
sc 390 dev/usb/uvscom.c sc->sc_intr_pipe = NULL;
sc 393 dev/usb/uvscom.c sc->sc_dying = 1;
sc 394 dev/usb/uvscom.c if (sc->sc_subdev != NULL) {
sc 395 dev/usb/uvscom.c rv = config_detach(sc->sc_subdev, flags);
sc 396 dev/usb/uvscom.c sc->sc_subdev = NULL;
sc 399 dev/usb/uvscom.c usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
sc 400 dev/usb/uvscom.c &sc->sc_dev);
sc 408 dev/usb/uvscom.c struct uvscom_softc *sc = (struct uvscom_softc *)self;
sc 416 dev/usb/uvscom.c if (sc->sc_subdev != NULL)
sc 417 dev/usb/uvscom.c rv = config_deactivate(sc->sc_subdev);
sc 418 dev/usb/uvscom.c sc->sc_dying = 1;
sc 425 dev/usb/uvscom.c uvscom_readstat(struct uvscom_softc *sc)
sc 431 dev/usb/uvscom.c DPRINTF(("%s: send readstat\n", sc->sc_dev.dv_xname));
sc 439 dev/usb/uvscom.c err = usbd_do_request(sc->sc_udev, &req, &r);
sc 442 dev/usb/uvscom.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 447 dev/usb/uvscom.c sc->sc_dev.dv_xname, r));
sc 453 dev/usb/uvscom.c uvscom_shutdown(struct uvscom_softc *sc)
sc 458 dev/usb/uvscom.c DPRINTF(("%s: send shutdown\n", sc->sc_dev.dv_xname));
sc 466 dev/usb/uvscom.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 469 dev/usb/uvscom.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 477 dev/usb/uvscom.c uvscom_reset(struct uvscom_softc *sc)
sc 479 dev/usb/uvscom.c DPRINTF(("%s: uvscom_reset\n", sc->sc_dev.dv_xname));
sc 485 dev/usb/uvscom.c uvscom_set_crtscts(struct uvscom_softc *sc)
sc 487 dev/usb/uvscom.c DPRINTF(("%s: uvscom_set_crtscts\n", sc->sc_dev.dv_xname));
sc 493 dev/usb/uvscom.c uvscom_set_line(struct uvscom_softc *sc, uint16_t line)
sc 499 dev/usb/uvscom.c sc->sc_dev.dv_xname, line));
sc 507 dev/usb/uvscom.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 510 dev/usb/uvscom.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 518 dev/usb/uvscom.c uvscom_set_line_coding(struct uvscom_softc *sc, uint16_t lsp, uint16_t ls)
sc 524 dev/usb/uvscom.c sc->sc_dev.dv_xname, lsp, ls));
sc 532 dev/usb/uvscom.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 535 dev/usb/uvscom.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 545 dev/usb/uvscom.c err = usbd_do_request(sc->sc_udev, &req, NULL);
sc 548 dev/usb/uvscom.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 556 dev/usb/uvscom.c uvscom_dtr(struct uvscom_softc *sc, int onoff)
sc 559 dev/usb/uvscom.c sc->sc_dev.dv_xname, onoff));
sc 561 dev/usb/uvscom.c if (sc->sc_dtr == onoff)
sc 564 dev/usb/uvscom.c sc->sc_dtr = onoff;
sc 567 dev/usb/uvscom.c SET(sc->sc_lcr, UVSCOM_DTR);
sc 569 dev/usb/uvscom.c CLR(sc->sc_lcr, UVSCOM_DTR);
sc 571 dev/usb/uvscom.c uvscom_set_line(sc, sc->sc_lcr);
sc 575 dev/usb/uvscom.c uvscom_rts(struct uvscom_softc *sc, int onoff)
sc 578 dev/usb/uvscom.c sc->sc_dev.dv_xname, onoff));
sc 580 dev/usb/uvscom.c if (sc->sc_rts == onoff)
sc 583 dev/usb/uvscom.c sc->sc_rts = onoff;
sc 586 dev/usb/uvscom.c SET(sc->sc_lcr, UVSCOM_RTS);
sc 588 dev/usb/uvscom.c CLR(sc->sc_lcr, UVSCOM_RTS);
sc 590 dev/usb/uvscom.c uvscom_set_line(sc, sc->sc_lcr);
sc 594 dev/usb/uvscom.c uvscom_break(struct uvscom_softc *sc, int onoff)
sc 597 dev/usb/uvscom.c sc->sc_dev.dv_xname, onoff));
sc 600 dev/usb/uvscom.c uvscom_set_line(sc, SET(sc->sc_lcr, UVSCOM_BREAK));
sc 606 dev/usb/uvscom.c struct uvscom_softc *sc = addr;
sc 610 dev/usb/uvscom.c uvscom_dtr(sc, onoff);
sc 613 dev/usb/uvscom.c uvscom_rts(sc, onoff);
sc 616 dev/usb/uvscom.c uvscom_break(sc, onoff);
sc 626 dev/usb/uvscom.c struct uvscom_softc *sc = addr;
sc 632 dev/usb/uvscom.c sc->sc_dev.dv_xname, sc));
sc 704 dev/usb/uvscom.c err = uvscom_set_line_coding(sc, lsp, ls);
sc 709 dev/usb/uvscom.c err = uvscom_set_crtscts(sc);
sc 720 dev/usb/uvscom.c struct uvscom_softc *sc = addr;
sc 724 dev/usb/uvscom.c if (sc->sc_dying)
sc 727 dev/usb/uvscom.c DPRINTF(("uvscom_open: sc = %p\n", sc));
sc 729 dev/usb/uvscom.c if (sc->sc_intr_number != -1 && sc->sc_intr_pipe == NULL) {
sc 732 dev/usb/uvscom.c sc->sc_usr = 0; /* clear unit status */
sc 734 dev/usb/uvscom.c err = uvscom_readstat(sc);
sc 737 dev/usb/uvscom.c sc->sc_dev.dv_xname));
sc 741 dev/usb/uvscom.c sc->sc_intr_buf = malloc(sc->sc_isize, M_USBDEV, M_WAITOK);
sc 742 dev/usb/uvscom.c err = usbd_open_pipe_intr(sc->sc_iface,
sc 743 dev/usb/uvscom.c sc->sc_intr_number,
sc 745 dev/usb/uvscom.c &sc->sc_intr_pipe,
sc 746 dev/usb/uvscom.c sc,
sc 747 dev/usb/uvscom.c sc->sc_intr_buf,
sc 748 dev/usb/uvscom.c sc->sc_isize,
sc 753 dev/usb/uvscom.c sc->sc_dev.dv_xname,
sc 754 dev/usb/uvscom.c sc->sc_intr_number);
sc 761 dev/usb/uvscom.c if ((sc->sc_usr & UVSCOM_USTAT_MASK) == 0) {
sc 766 dev/usb/uvscom.c if (ISSET(sc->sc_usr, UVSCOM_USTAT_MASK))
sc 771 dev/usb/uvscom.c sc->sc_dev.dv_xname));
sc 776 dev/usb/uvscom.c if (ISSET(sc->sc_usr, UVSCOM_NOCARD)) {
sc 778 dev/usb/uvscom.c sc->sc_dev.dv_xname));
sc 789 dev/usb/uvscom.c struct uvscom_softc *sc = addr;
sc 792 dev/usb/uvscom.c if (sc->sc_dying)
sc 797 dev/usb/uvscom.c uvscom_shutdown(sc);
sc 799 dev/usb/uvscom.c if (sc->sc_intr_pipe != NULL) {
sc 800 dev/usb/uvscom.c err = usbd_abort_pipe(sc->sc_intr_pipe);
sc 803 dev/usb/uvscom.c sc->sc_dev.dv_xname,
sc 805 dev/usb/uvscom.c err = usbd_close_pipe(sc->sc_intr_pipe);
sc 808 dev/usb/uvscom.c sc->sc_dev.dv_xname,
sc 810 dev/usb/uvscom.c free(sc->sc_intr_buf, M_USBDEV);
sc 811 dev/usb/uvscom.c sc->sc_intr_pipe = NULL;
sc 818 dev/usb/uvscom.c struct uvscom_softc *sc = priv;
sc 819 dev/usb/uvscom.c u_char *buf = sc->sc_intr_buf;
sc 822 dev/usb/uvscom.c if (sc->sc_dying)
sc 830 dev/usb/uvscom.c sc->sc_dev.dv_xname,
sc 832 dev/usb/uvscom.c usbd_clear_endpoint_stall_async(sc->sc_intr_pipe);
sc 837 dev/usb/uvscom.c sc->sc_dev.dv_xname, buf[0], buf[1]));
sc 839 dev/usb/uvscom.c sc->sc_lsr = sc->sc_msr = 0;
sc 840 dev/usb/uvscom.c sc->sc_usr = buf[1];
sc 844 dev/usb/uvscom.c SET(sc->sc_lsr, ULSR_TXRDY);
sc 846 dev/usb/uvscom.c SET(sc->sc_lsr, ULSR_RXRDY);
sc 850 dev/usb/uvscom.c SET(sc->sc_msr, UMSR_CTS);
sc 852 dev/usb/uvscom.c SET(sc->sc_msr, UMSR_DSR);
sc 854 dev/usb/uvscom.c SET(sc->sc_msr, UMSR_DCD);
sc 856 dev/usb/uvscom.c ucom_status_change((struct ucom_softc *) sc->sc_subdev);
sc 862 dev/usb/uvscom.c struct uvscom_softc *sc = addr;
sc 865 dev/usb/uvscom.c *lsr = sc->sc_lsr;
sc 867 dev/usb/uvscom.c *msr = sc->sc_msr;
sc 96 dev/usb/uyap.c struct uyap_softc *sc = xsc;
sc 99 dev/usb/uyap.c err = ezload_downloads_and_reset(sc->sc_udev, firmwares);
sc 102 dev/usb/uyap.c sc->sc_dev.dv_xname, usbd_errstr(err));
sc 107 dev/usb/uyap.c sc->sc_dev.dv_xname);
sc 113 dev/usb/uyap.c struct uyap_softc *sc = (struct uyap_softc *)self;
sc 119 dev/usb/uyap.c printf("\n%s: %s\n", sc->sc_dev.dv_xname, devinfop);
sc 122 dev/usb/uyap.c printf("%s: downloading firmware\n", sc->sc_dev.dv_xname);
sc 124 dev/usb/uyap.c sc->sc_udev = dev;
sc 126 dev/usb/uyap.c mountroothook_establish(uyap_attachhook, sc);
sc 128 dev/usb/uyap.c uyap_attachhook(sc);
sc 173 dev/vesa/vesabios.c struct vesabios_softc *sc = (struct vesabios_softc *)self;
sc 200 dev/vesa/vesabios.c sc->sc_size = vi->TotalMemory * 65536;
sc 285 dev/vesa/vesabios.c sc->sc_modes =
sc 288 dev/vesa/vesabios.c if (sc->sc_modes == NULL) {
sc 289 dev/vesa/vesabios.c sc->sc_nmodes = 0;
sc 292 dev/vesa/vesabios.c sc->sc_nmodes = nrastermodes;
sc 294 dev/vesa/vesabios.c sc->sc_modes[i] = rastermodes[i];
sc 296 dev/vesa/vesabios.c vesabios_softc = sc;
sc 91 dev/vesa/vesafb.c vesafb_get_ddc_version(struct vga_pci_softc *sc)
sc 108 dev/vesa/vesafb.c vesafb_get_ddc_info(struct vga_pci_softc *sc, struct edid *info)
sc 116 dev/vesa/vesafb.c sc->sc_dev.dv_xname);
sc 138 dev/vesa/vesafb.c vesafb_get_mode(struct vga_pci_softc *sc)
sc 149 dev/vesa/vesafb.c sc->sc_dev.dv_xname, res, tf.tf_eax);
sc 155 dev/vesa/vesafb.c vesafb_get_mode_info(struct vga_pci_softc *sc, int mode,
sc 164 dev/vesa/vesafb.c sc->sc_dev.dv_xname);
sc 176 dev/vesa/vesafb.c sc->sc_dev.dv_xname, res, tf.tf_eax);
sc 178 dev/vesa/vesafb.c sc->sc_dev.dv_xname, mode);
sc 187 dev/vesa/vesafb.c vesafb_set_palette(struct vga_pci_softc *sc, int reg, struct paletteentry pe)
sc 195 dev/vesa/vesafb.c sc->sc_dev.dv_xname);
sc 220 dev/vesa/vesafb.c sc->sc_dev.dv_xname, res, tf.tf_eax);
sc 227 dev/vesa/vesafb.c vesafb_set_mode(struct vga_pci_softc *sc, int mode)
sc 239 dev/vesa/vesafb.c sc->sc_dev.dv_xname, res, tf.tf_eax);
sc 245 dev/vesa/vesafb.c vesafb_find_mode(struct vga_pci_softc *sc, int width, int height, int bpp)
sc 257 dev/vesa/vesafb.c vesafb_get_mode_info(sc, vesabios_softc->sc_modes[i], &mi);
sc 261 dev/vesa/vesafb.c sc->sc_width = mi.XResolution;
sc 262 dev/vesa/vesafb.c sc->sc_height = mi.YResolution;
sc 263 dev/vesa/vesafb.c sc->sc_depth = mi.BitsPerPixel;
sc 264 dev/vesa/vesafb.c sc->sc_linebytes = mi.BytesPerScanLine;
sc 265 dev/vesa/vesafb.c sc->sc_base = mi.PhysBasePtr;
sc 276 dev/vesa/vesafb.c vesafb_putcmap(struct vga_pci_softc *sc, struct wsdisplay_cmap *cm)
sc 300 dev/vesa/vesafb.c memcpy(&sc->sc_cmap_red[idx], &r[idx], cnt);
sc 301 dev/vesa/vesafb.c memcpy(&sc->sc_cmap_green[idx], &g[idx], cnt);
sc 302 dev/vesa/vesafb.c memcpy(&sc->sc_cmap_blue[idx], &b[idx], cnt);
sc 304 dev/vesa/vesafb.c rp = &sc->sc_cmap_red[idx];
sc 305 dev/vesa/vesafb.c gp = &sc->sc_cmap_green[idx];
sc 306 dev/vesa/vesafb.c bp = &sc->sc_cmap_blue[idx];
sc 313 dev/vesa/vesafb.c vesafb_set_palette(sc, idx, pe);
sc 322 dev/vesa/vesafb.c vesafb_getcmap(struct vga_pci_softc *sc, struct wsdisplay_cmap *cm)
sc 333 dev/vesa/vesafb.c rv = copyout(&sc->sc_cmap_red[idx], cm->red, cnt);
sc 336 dev/vesa/vesafb.c rv = copyout(&sc->sc_cmap_green[idx], cm->green, cnt);
sc 339 dev/vesa/vesafb.c rv = copyout(&sc->sc_cmap_blue[idx], cm->blue, cnt);
sc 377 dev/vesa/vesafb.c vesafb_get_supported_depth(struct vga_pci_softc *sc)
sc 388 dev/vesa/vesafb.c vesafb_get_mode_info(sc, vesabios_softc->sc_modes[i], &mi);
sc 166 dev/vnd.c #define vndlock(sc) rw_enter(&sc->sc_rwlock, RW_WRITE|RW_INTR)
sc 167 dev/vnd.c #define vndunlock(sc) rw_exit_write(&sc->sc_rwlock)
sc 222 dev/vnd.c struct vnd_softc *sc;
sc 229 dev/vnd.c sc = &vnd_softc[unit];
sc 231 dev/vnd.c if ((error = vndlock(sc)) != 0)
sc 234 dev/vnd.c if ((flags & FWRITE) && (sc->sc_flags & VNF_READONLY)) {
sc 239 dev/vnd.c if ((sc->sc_flags & VNF_INITED) &&
sc 240 dev/vnd.c (sc->sc_flags & VNF_HAVELABEL) == 0) {
sc 241 dev/vnd.c sc->sc_flags |= VNF_HAVELABEL;
sc 242 dev/vnd.c vndgetdisklabel(dev, sc);
sc 252 dev/vnd.c if (sc->sc_dk.dk_openmask) {
sc 253 dev/vnd.c if (((sc->sc_flags & VNF_SIMPLE) != 0) !=
sc 259 dev/vnd.c sc->sc_flags |= VNF_SIMPLE;
sc 261 dev/vnd.c sc->sc_flags &= ~VNF_SIMPLE;
sc 265 dev/vnd.c ((sc->sc_flags & VNF_HAVELABEL) == 0 ||
sc 266 dev/vnd.c part >= sc->sc_dk.dk_label->d_npartitions ||
sc 267 dev/vnd.c sc->sc_dk.dk_label->d_partitions[part].p_fstype == FS_UNUSED)) {
sc 275 dev/vnd.c sc->sc_dk.dk_copenmask |= pmask;
sc 279 dev/vnd.c sc->sc_dk.dk_bopenmask |= pmask;
sc 282 dev/vnd.c sc->sc_dk.dk_openmask =
sc 283 dev/vnd.c sc->sc_dk.dk_copenmask | sc->sc_dk.dk_bopenmask;
sc 287 dev/vnd.c vndunlock(sc);
sc 295 dev/vnd.c vndgetdisklabel(dev_t dev, struct vnd_softc *sc)
sc 297 dev/vnd.c struct disklabel *lp = sc->sc_dk.dk_label;
sc 305 dev/vnd.c lp->d_ncylinders = sc->sc_size / 100;
sc 311 dev/vnd.c DL_SETDSIZE(lp, sc->sc_size);
sc 324 dev/vnd.c DNPRINTF(VDB_IO, "%s: %s\n", sc->sc_dev.dv_xname,
sc 334 dev/vnd.c struct vnd_softc *sc;
sc 341 dev/vnd.c sc = &vnd_softc[unit];
sc 343 dev/vnd.c if ((error = vndlock(sc)) != 0)
sc 351 dev/vnd.c sc->sc_dk.dk_copenmask &= ~(1 << part);
sc 355 dev/vnd.c sc->sc_dk.dk_bopenmask &= ~(1 << part);
sc 358 dev/vnd.c sc->sc_dk.dk_openmask =
sc 359 dev/vnd.c sc->sc_dk.dk_copenmask | sc->sc_dk.dk_bopenmask;
sc 361 dev/vnd.c vndunlock(sc);
sc 662 dev/vnd.c struct vnd_softc *sc;
sc 668 dev/vnd.c sc = &vnd_softc[unit];
sc 670 dev/vnd.c if ((sc->sc_flags & VNF_INITED) == 0)
sc 681 dev/vnd.c struct vnd_softc *sc;
sc 687 dev/vnd.c sc = &vnd_softc[unit];
sc 689 dev/vnd.c if ((sc->sc_flags & VNF_INITED) == 0)
sc 116 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc;
sc 231 dev/wscons/wsdisplay.c void wsdisplay_common_attach(struct wsdisplay_softc *sc,
sc 274 dev/wscons/wsdisplay.c wsscreen_attach(struct wsdisplay_softc *sc, int console, const char *emul,
sc 319 dev/wscons/wsdisplay.c scr->sc = sc;
sc 374 dev/wscons/wsdisplay.c wsdisplay_addscreen_print(struct wsdisplay_softc *sc, int idx, int count)
sc 376 dev/wscons/wsdisplay.c printf("%s: screen %d", sc->sc_dv.dv_xname, idx);
sc 380 dev/wscons/wsdisplay.c sc->sc_scr[idx]->scr_dconf->scrdata->name,
sc 381 dev/wscons/wsdisplay.c sc->sc_scr[idx]->scr_dconf->wsemul->name);
sc 385 dev/wscons/wsdisplay.c wsdisplay_addscreen(struct wsdisplay_softc *sc, int idx,
sc 398 dev/wscons/wsdisplay.c if (sc->sc_scr[idx] != NULL)
sc 401 dev/wscons/wsdisplay.c scrdesc = wsdisplay_screentype_pick(sc->sc_scrdata, screentype);
sc 404 dev/wscons/wsdisplay.c error = (*sc->sc_accessops->alloc_screen)(sc->sc_accesscookie,
sc 409 dev/wscons/wsdisplay.c scr = wsscreen_attach(sc, 0, emul, scrdesc,
sc 412 dev/wscons/wsdisplay.c (*sc->sc_accessops->free_screen)(sc->sc_accesscookie, cookie);
sc 416 dev/wscons/wsdisplay.c sc->sc_scr[idx] = scr;
sc 420 dev/wscons/wsdisplay.c if (!sc->sc_focus) {
sc 421 dev/wscons/wsdisplay.c (*sc->sc_accessops->show_screen)(sc->sc_accesscookie,
sc 423 dev/wscons/wsdisplay.c sc->sc_focusidx = idx;
sc 424 dev/wscons/wsdisplay.c sc->sc_focus = scr;
sc 429 dev/wscons/wsdisplay.c allocate_copybuffer(sc); /* enlarge the copy buffer is necessary */
sc 435 dev/wscons/wsdisplay.c wsdisplay_getscreen(struct wsdisplay_softc *sc,
sc 440 dev/wscons/wsdisplay.c if (sd->idx < 0 && sc->sc_focus)
sc 441 dev/wscons/wsdisplay.c sd->idx = sc->sc_focusidx;
sc 446 dev/wscons/wsdisplay.c scr = sc->sc_scr[sd->idx];
sc 458 dev/wscons/wsdisplay.c wsdisplay_closescreen(struct wsdisplay_softc *sc, struct wsscreen *scr)
sc 474 dev/wscons/wsdisplay.c if (scr == sc->sc_scr[idx])
sc 482 dev/wscons/wsdisplay.c mn = WSDISPLAYMINOR(sc->sc_dv.dv_unit, idx);
sc 487 dev/wscons/wsdisplay.c wsdisplay_delscreen(struct wsdisplay_softc *sc, int idx, int flags)
sc 495 dev/wscons/wsdisplay.c if ((scr = sc->sc_scr[idx]) == NULL)
sc 505 dev/wscons/wsdisplay.c wsdisplay_closescreen(sc, scr);
sc 512 dev/wscons/wsdisplay.c if (sc->sc_focus == scr) {
sc 513 dev/wscons/wsdisplay.c sc->sc_focus = 0;
sc 515 dev/wscons/wsdisplay.c wsdisplay_update_rawkbd(sc, 0);
sc 518 dev/wscons/wsdisplay.c sc->sc_scr[idx] = 0;
sc 534 dev/wscons/wsdisplay.c (*sc->sc_accessops->free_screen)(sc->sc_accesscookie, cookie);
sc 537 dev/wscons/wsdisplay.c printf("%s: screen %d deleted\n", sc->sc_dv.dv_xname, idx);
sc 568 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = (struct wsdisplay_softc *)self;
sc 571 dev/wscons/wsdisplay.c wsdisplay_common_attach(sc, ap->console,
sc 572 dev/wscons/wsdisplay.c sc->sc_dv.dv_cfdata->wsemuldisplaydevcf_mux, ap->scrdata,
sc 593 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = (struct wsdisplay_softc *)self;
sc 595 dev/wscons/wsdisplay.c return (wsdisplay_common_detach(sc, flags));
sc 599 dev/wscons/wsdisplay.c wsdisplay_common_detach(struct wsdisplay_softc *sc, int flags)
sc 605 dev/wscons/wsdisplay.c if (sc->sc_isconsole)
sc 610 dev/wscons/wsdisplay.c if (sc->sc_scr[i] != NULL) {
sc 611 dev/wscons/wsdisplay.c if ((rc = wsdisplay_delscreen(sc, i,
sc 618 dev/wscons/wsdisplay.c timeout_del(&sc->sc_burner);
sc 622 dev/wscons/wsdisplay.c if (sc->sc_input != NULL) {
sc 624 dev/wscons/wsdisplay.c wsmux_detach_sc(sc->sc_input); /* XXX not exactly correct */
sc 631 dev/wscons/wsdisplay.c if ((rc = wskbd_set_display((struct device *)sc->sc_input,
sc 659 dev/wscons/wsdisplay.c wsdisplay_common_attach(struct wsdisplay_softc *sc, int console, int kbdmux,
sc 674 dev/wscons/wsdisplay.c mux = wsmux_create("dmux", sc->sc_dv.dv_unit);
sc 678 dev/wscons/wsdisplay.c sc->sc_input = &mux->sc_base;
sc 679 dev/wscons/wsdisplay.c mux->sc_displaydv = &sc->sc_dv;
sc 690 dev/wscons/wsdisplay.c sc->sc_isconsole = console;
sc 696 dev/wscons/wsdisplay.c sc->sc_scr[0] = wsscreen_attach(sc, 1, 0, 0, 0, 0, 0, 0);
sc 697 dev/wscons/wsdisplay.c if (sc->sc_scr[0] == NULL)
sc 699 dev/wscons/wsdisplay.c wsdisplay_console_device = sc;
sc 706 dev/wscons/wsdisplay.c kme = wskbd_set_console_display(&sc->sc_dv, sc->sc_input);
sc 710 dev/wscons/wsdisplay.c sc->sc_input = kme;
sc 714 dev/wscons/wsdisplay.c sc->sc_focusidx = 0;
sc 715 dev/wscons/wsdisplay.c sc->sc_focus = sc->sc_scr[0];
sc 721 dev/wscons/wsdisplay.c wsmux_set_display(mux, &sc->sc_dv);
sc 724 dev/wscons/wsdisplay.c sc->sc_accessops = accessops;
sc 725 dev/wscons/wsdisplay.c sc->sc_accesscookie = accesscookie;
sc 726 dev/wscons/wsdisplay.c sc->sc_scrdata = scrdata;
sc 737 dev/wscons/wsdisplay.c if (wsdisplay_addscreen(sc, i, 0, 0))
sc 742 dev/wscons/wsdisplay.c wsdisplay_addscreen_print(sc, start, i-start);
sc 745 dev/wscons/wsdisplay.c sc->sc_burnoutintvl = (hz * WSDISPLAY_DEFBURNOUT) / 1000;
sc 746 dev/wscons/wsdisplay.c sc->sc_burninintvl = (hz * WSDISPLAY_DEFBURNIN ) / 1000;
sc 747 dev/wscons/wsdisplay.c sc->sc_burnflags = 0; /* off by default */
sc 748 dev/wscons/wsdisplay.c timeout_set(&sc->sc_burner, wsdisplay_burner, sc);
sc 749 dev/wscons/wsdisplay.c sc->sc_burnout = sc->sc_burnoutintvl;
sc 750 dev/wscons/wsdisplay.c wsdisplay_burn(sc, sc->sc_burnflags);
sc 765 dev/wscons/wsdisplay.c if (wskbd_cd.cd_ndevs != 0 && sc->sc_dv.dv_unit == 0) {
sc 766 dev/wscons/wsdisplay.c if (wsdisplay_set_kbd(&sc->sc_dv,
sc 769 dev/wscons/wsdisplay.c &sc->sc_dv);
sc 818 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc;
sc 825 dev/wscons/wsdisplay.c (sc = wsdisplay_cd.cd_devs[unit]) == NULL)
sc 833 dev/wscons/wsdisplay.c if ((scr = sc->sc_scr[WSDISPLAYSCREEN(dev)]) == NULL)
sc 875 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc;
sc 881 dev/wscons/wsdisplay.c sc = wsdisplay_cd.cd_devs[unit];
sc 886 dev/wscons/wsdisplay.c if ((scr = sc->sc_scr[WSDISPLAYSCREEN(dev)]) == NULL)
sc 895 dev/wscons/wsdisplay.c wsdisplay_kbdholdscreen((struct device *)sc, 0);
sc 918 dev/wscons/wsdisplay.c (void) wsdisplay_internal_ioctl(sc, scr, WSKBDIO_SETMODE,
sc 938 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc;
sc 944 dev/wscons/wsdisplay.c sc = wsdisplay_cd.cd_devs[unit];
sc 949 dev/wscons/wsdisplay.c if ((scr = sc->sc_scr[WSDISPLAYSCREEN(dev)]) == NULL)
sc 962 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc;
sc 968 dev/wscons/wsdisplay.c sc = wsdisplay_cd.cd_devs[unit];
sc 973 dev/wscons/wsdisplay.c if ((scr = sc->sc_scr[WSDISPLAYSCREEN(dev)]) == NULL)
sc 986 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc;
sc 991 dev/wscons/wsdisplay.c sc = wsdisplay_cd.cd_devs[unit];
sc 996 dev/wscons/wsdisplay.c if ((scr = sc->sc_scr[WSDISPLAYSCREEN(dev)]) == NULL)
sc 1005 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc;
sc 1011 dev/wscons/wsdisplay.c sc = wsdisplay_cd.cd_devs[unit];
sc 1014 dev/wscons/wsdisplay.c error = wsdisplay_usl_ioctl1(sc, cmd, data, flag, p);
sc 1020 dev/wscons/wsdisplay.c return (wsdisplay_cfg_ioctl(sc, cmd, data, flag, p));
sc 1025 dev/wscons/wsdisplay.c if ((scr = sc->sc_scr[WSDISPLAYSCREEN(dev)]) == NULL)
sc 1045 dev/wscons/wsdisplay.c error = wsdisplay_usl_ioctl2(sc, scr, cmd, data, flag, p);
sc 1050 dev/wscons/wsdisplay.c error = wsdisplay_internal_ioctl(sc, scr, cmd, data, flag, p);
sc 1057 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = (struct wsdisplay_softc *)dev;
sc 1059 dev/wscons/wsdisplay.c return ((*sc->sc_accessops->ioctl)(sc->sc_accesscookie, cmd,
sc 1064 dev/wscons/wsdisplay.c wsdisplay_internal_ioctl(struct wsdisplay_softc *sc, struct wsscreen *scr,
sc 1078 dev/wscons/wsdisplay.c return (wsdisplay_update_rawkbd(sc, scr));
sc 1085 dev/wscons/wsdisplay.c inp = sc->sc_input;
sc 1134 dev/wscons/wsdisplay.c wsmoused_release(sc);
sc 1139 dev/wscons/wsdisplay.c if (sc->sc_burnout)
sc 1140 dev/wscons/wsdisplay.c timeout_del(&sc->sc_burner);
sc 1145 dev/wscons/wsdisplay.c if (!sc->sc_burnman)
sc 1146 dev/wscons/wsdisplay.c wsdisplay_burn(sc, sc->sc_burnflags);
sc 1154 dev/wscons/wsdisplay.c wsmoused_wakeup(sc);
sc 1158 dev/wscons/wsdisplay.c (void)(*sc->sc_accessops->ioctl)(sc->sc_accesscookie, cmd, data,
sc 1166 dev/wscons/wsdisplay.c if (!sc->sc_accessops->load_font)
sc 1169 dev/wscons/wsdisplay.c error = (*sc->sc_accessops->load_font)(sc->sc_accesscookie,
sc 1178 dev/wscons/wsdisplay.c *(u_int *)data = !sc->sc_burnman;
sc 1185 dev/wscons/wsdisplay.c if (sc->sc_accessops->burn_screen == NULL)
sc 1187 dev/wscons/wsdisplay.c (*sc->sc_accessops->burn_screen)(sc->sc_accesscookie,
sc 1188 dev/wscons/wsdisplay.c *(u_int *)data, sc->sc_burnflags);
sc 1193 dev/wscons/wsdisplay.c d->on = sc->sc_burninintvl * 1000 / hz;
sc 1194 dev/wscons/wsdisplay.c d->off = sc->sc_burnoutintvl * 1000 / hz;
sc 1195 dev/wscons/wsdisplay.c d->flags = sc->sc_burnflags;
sc 1204 dev/wscons/wsdisplay.c sc->sc_burnflags = d->flags;
sc 1206 dev/wscons/wsdisplay.c if ((sc->sc_burnflags & (WSDISPLAY_BURN_OUTPUT |
sc 1208 dev/wscons/wsdisplay.c if (sc->sc_burnout)
sc 1209 dev/wscons/wsdisplay.c timeout_del(&sc->sc_burner);
sc 1214 dev/wscons/wsdisplay.c sc->sc_burninintvl = hz * d->on / 1000;
sc 1215 dev/wscons/wsdisplay.c if (sc->sc_burnman)
sc 1216 dev/wscons/wsdisplay.c sc->sc_burnout = sc->sc_burninintvl;
sc 1220 dev/wscons/wsdisplay.c sc->sc_burnoutintvl = hz * d->off / 1000;
sc 1221 dev/wscons/wsdisplay.c if (!sc->sc_burnman) {
sc 1222 dev/wscons/wsdisplay.c sc->sc_burnout = sc->sc_burnoutintvl;
sc 1225 dev/wscons/wsdisplay.c wsdisplay_burn(sc, sc->sc_burnflags);
sc 1232 dev/wscons/wsdisplay.c return (wsdisplay_getscreen(sc,
sc 1236 dev/wscons/wsdisplay.c return (wsdisplay_switch((void *)sc, *(int *)data, 1));
sc 1240 dev/wscons/wsdisplay.c return ((*sc->sc_accessops->ioctl)(sc->sc_accesscookie, cmd, data,
sc 1245 dev/wscons/wsdisplay.c wsdisplay_cfg_ioctl(struct wsdisplay_softc *sc, u_long cmd, caddr_t data,
sc 1258 dev/wscons/wsdisplay.c error = wsmoused(sc, cmd, data, flag, p);
sc 1263 dev/wscons/wsdisplay.c if ((error = wsdisplay_addscreen(sc, d->idx,
sc 1265 dev/wscons/wsdisplay.c wsdisplay_addscreen_print(sc, d->idx, 0);
sc 1270 dev/wscons/wsdisplay.c return (wsdisplay_delscreen(sc, d->idx, d->flags));
sc 1273 dev/wscons/wsdisplay.c return (wsdisplay_getscreen(sc,
sc 1276 dev/wscons/wsdisplay.c return (wsdisplay_switch((void *)sc, *(int *)data, 1));
sc 1279 dev/wscons/wsdisplay.c if (!sc->sc_accessops->load_font)
sc 1295 dev/wscons/wsdisplay.c (*sc->sc_accessops->load_font)(sc->sc_accesscookie, 0, d);
sc 1299 dev/wscons/wsdisplay.c sc->sc_fonts[d->index] = *d;
sc 1305 dev/wscons/wsdisplay.c *d = sc->sc_fonts[d->index];
sc 1322 dev/wscons/wsdisplay.c inp = sc->sc_input;
sc 1335 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = wsdisplay_cd.cd_devs[WSDISPLAYUNIT(dev)];
sc 1341 dev/wscons/wsdisplay.c if ((scr = sc->sc_scr[WSDISPLAYSCREEN(dev)]) == NULL)
sc 1348 dev/wscons/wsdisplay.c return ((*sc->sc_accessops->mmap)(sc->sc_accesscookie, offset, prot));
sc 1354 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = wsdisplay_cd.cd_devs[WSDISPLAYUNIT(dev)];
sc 1360 dev/wscons/wsdisplay.c if ((scr = sc->sc_scr[WSDISPLAYSCREEN(dev)]) == NULL)
sc 1372 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = wsdisplay_cd.cd_devs[WSDISPLAYUNIT(dev)];
sc 1378 dev/wscons/wsdisplay.c if ((scr = sc->sc_scr[WSDISPLAYSCREEN(dev)]) == NULL)
sc 1390 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc;
sc 1397 dev/wscons/wsdisplay.c (sc = wsdisplay_cd.cd_devs[unit]) == NULL)
sc 1408 dev/wscons/wsdisplay.c if ((scr = sc->sc_scr[WSDISPLAYSCREEN(tp->t_dev)]) == NULL) {
sc 1434 dev/wscons/wsdisplay.c wsdisplay_burn(sc, WSDISPLAY_BURN_OUTPUT);
sc 1437 dev/wscons/wsdisplay.c if (scr == sc->sc_focus) {
sc 1438 dev/wscons/wsdisplay.c if (IS_SEL_EXISTS(sc->sc_focus))
sc 1440 dev/wscons/wsdisplay.c remove_selection(sc);
sc 1442 dev/wscons/wsdisplay.c mouse_hide(sc);
sc 1455 dev/wscons/wsdisplay.c wsdisplay_burn(sc, WSDISPLAY_BURN_OUTPUT);
sc 1520 dev/wscons/wsdisplay.c (void) wsdisplay_internal_ioctl(scr->sc, scr, WSKBDIO_BELL, NULL,
sc 1549 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = (struct wsdisplay_softc *)dev;
sc 1555 dev/wscons/wsdisplay.c KASSERT(sc != NULL);
sc 1557 dev/wscons/wsdisplay.c scr = sc->sc_focus;
sc 1576 dev/wscons/wsdisplay.c wsdisplay_update_rawkbd(struct wsdisplay_softc *sc, struct wsscreen *scr)
sc 1586 dev/wscons/wsdisplay.c if (scr != sc->sc_focus || sc->sc_rawkbd == raw) {
sc 1592 dev/wscons/wsdisplay.c inp = sc->sc_input;
sc 1599 dev/wscons/wsdisplay.c sc->sc_rawkbd = raw;
sc 1611 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = arg;
sc 1616 dev/wscons/wsdisplay.c if (!(sc->sc_flags & SC_SWITCHPENDING)) {
sc 1621 dev/wscons/wsdisplay.c no = sc->sc_screenwanted;
sc 1624 dev/wscons/wsdisplay.c scr = sc->sc_scr[no];
sc 1633 dev/wscons/wsdisplay.c if (sc->sc_oldscreen == WSDISPLAY_NULLSCREEN) {
sc 1635 dev/wscons/wsdisplay.c sc->sc_focus = 0;
sc 1637 dev/wscons/wsdisplay.c wsdisplay_update_rawkbd(sc, 0);
sc 1639 dev/wscons/wsdisplay.c sc->sc_flags &= ~SC_SWITCHPENDING;
sc 1643 dev/wscons/wsdisplay.c sc->sc_screenwanted = sc->sc_oldscreen;
sc 1644 dev/wscons/wsdisplay.c sc->sc_oldscreen = WSDISPLAY_NULLSCREEN;
sc 1653 dev/wscons/wsdisplay.c no = sc->sc_screenwanted;
sc 1654 dev/wscons/wsdisplay.c scr = sc->sc_scr[no];
sc 1657 dev/wscons/wsdisplay.c sc->sc_flags &= ~SC_SWITCHPENDING;
sc 1667 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = arg;
sc 1671 dev/wscons/wsdisplay.c if (!(sc->sc_flags & SC_SWITCHPENDING)) {
sc 1676 dev/wscons/wsdisplay.c no = sc->sc_screenwanted;
sc 1679 dev/wscons/wsdisplay.c scr = sc->sc_scr[no];
sc 1688 dev/wscons/wsdisplay.c if (sc->sc_oldscreen == WSDISPLAY_NULLSCREEN) {
sc 1690 dev/wscons/wsdisplay.c sc->sc_focus = 0;
sc 1691 dev/wscons/wsdisplay.c sc->sc_flags &= ~SC_SWITCHPENDING;
sc 1695 dev/wscons/wsdisplay.c sc->sc_screenwanted = sc->sc_oldscreen;
sc 1696 dev/wscons/wsdisplay.c sc->sc_oldscreen = WSDISPLAY_NULLSCREEN;
sc 1700 dev/wscons/wsdisplay.c sc->sc_focusidx = no;
sc 1701 dev/wscons/wsdisplay.c sc->sc_focus = scr;
sc 1704 dev/wscons/wsdisplay.c (void) wsdisplay_update_rawkbd(sc, scr);
sc 1712 dev/wscons/wsdisplay.c sc->sc_isconsole && wsdisplay_cons_pollmode ?
sc 1713 dev/wscons/wsdisplay.c 0 : wsswitch_cb3, sc);
sc 1721 dev/wscons/wsdisplay.c return (wsdisplay_switch3(sc, error, waitok));
sc 1727 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = arg;
sc 1731 dev/wscons/wsdisplay.c if (!(sc->sc_flags & SC_SWITCHPENDING)) {
sc 1736 dev/wscons/wsdisplay.c no = sc->sc_screenwanted;
sc 1738 dev/wscons/wsdisplay.c sc->sc_flags &= ~SC_SWITCHPENDING;
sc 1740 dev/wscons/wsdisplay.c sc->sc_focus = 0;
sc 1742 dev/wscons/wsdisplay.c wakeup(sc);
sc 1747 dev/wscons/wsdisplay.c scr = sc->sc_scr[no];
sc 1754 dev/wscons/wsdisplay.c sc->sc_flags &= ~SC_SWITCHPENDING;
sc 1759 dev/wscons/wsdisplay.c error = (*sc->sc_accessops->show_screen)(sc->sc_accesscookie,
sc 1761 dev/wscons/wsdisplay.c sc->sc_isconsole && wsdisplay_cons_pollmode ? 0 : wsswitch_cb2, sc);
sc 1767 dev/wscons/wsdisplay.c return (wsdisplay_switch2(sc, error, waitok));
sc 1773 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = (struct wsdisplay_softc *)dev;
sc 1780 dev/wscons/wsdisplay.c if (sc->sc_scr[no] == NULL)
sc 1786 dev/wscons/wsdisplay.c if ((sc->sc_focus && no == sc->sc_focusidx) ||
sc 1787 dev/wscons/wsdisplay.c (sc->sc_focus == NULL && no == WSDISPLAY_NULLSCREEN)) {
sc 1792 dev/wscons/wsdisplay.c if (sc->sc_flags & SC_SWITCHPENDING) {
sc 1797 dev/wscons/wsdisplay.c sc->sc_flags |= SC_SWITCHPENDING;
sc 1798 dev/wscons/wsdisplay.c sc->sc_screenwanted = no;
sc 1802 dev/wscons/wsdisplay.c scr = sc->sc_focus;
sc 1804 dev/wscons/wsdisplay.c sc->sc_oldscreen = WSDISPLAY_NULLSCREEN;
sc 1805 dev/wscons/wsdisplay.c return (wsdisplay_switch1(sc, 0, waitok));
sc 1807 dev/wscons/wsdisplay.c sc->sc_oldscreen = sc->sc_focusidx;
sc 1827 dev/wscons/wsdisplay.c (!(sc->sc_scr[no]->scr_flags & SCR_GRAPHICS))) {
sc 1832 dev/wscons/wsdisplay.c mouse_remove(sc);
sc 1836 dev/wscons/wsdisplay.c (sc->sc_scr[no]->scr_flags & SCR_GRAPHICS)) {
sc 1840 dev/wscons/wsdisplay.c mouse_remove(sc);
sc 1841 dev/wscons/wsdisplay.c wsmoused_release(sc);
sc 1845 dev/wscons/wsdisplay.c !(sc->sc_scr[no]->scr_flags & SCR_GRAPHICS)) {
sc 1848 dev/wscons/wsdisplay.c wsmoused_wakeup(sc);
sc 1856 dev/wscons/wsdisplay.c sc->sc_isconsole && wsdisplay_cons_pollmode ?
sc 1857 dev/wscons/wsdisplay.c 0 : wsswitch_cb1, sc);
sc 1868 dev/wscons/wsdisplay.c return (wsdisplay_switch1(sc, res, waitok));
sc 1874 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = (struct wsdisplay_softc *)dev;
sc 1877 dev/wscons/wsdisplay.c KASSERT(sc != NULL);
sc 1878 dev/wscons/wsdisplay.c scr = sc->sc_focus;
sc 1889 dev/wscons/wsdisplay.c wsdisplay_closescreen(sc, scr);
sc 1940 dev/wscons/wsdisplay.c wsdisplay_maxscreenidx(struct wsdisplay_softc *sc)
sc 1946 dev/wscons/wsdisplay.c wsdisplay_screenstate(struct wsdisplay_softc *sc, int idx)
sc 1950 dev/wscons/wsdisplay.c if (!sc->sc_scr[idx])
sc 1952 dev/wscons/wsdisplay.c return ((sc->sc_scr[idx]->scr_flags & SCR_OPEN) ? EBUSY : 0);
sc 1956 dev/wscons/wsdisplay.c wsdisplay_getactivescreen(struct wsdisplay_softc *sc)
sc 1958 dev/wscons/wsdisplay.c return (sc->sc_focus ? sc->sc_focusidx : WSDISPLAY_NULLSCREEN);
sc 1962 dev/wscons/wsdisplay.c wsscreen_switchwait(struct wsdisplay_softc *sc, int no)
sc 1969 dev/wscons/wsdisplay.c while (sc->sc_focus && res == 0) {
sc 1970 dev/wscons/wsdisplay.c res = tsleep(sc, PCATCH, "wswait", 0);
sc 1978 dev/wscons/wsdisplay.c scr = sc->sc_scr[no];
sc 1983 dev/wscons/wsdisplay.c if (scr != sc->sc_focus) {
sc 1986 dev/wscons/wsdisplay.c if (scr != sc->sc_scr[no])
sc 1998 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = (struct wsdisplay_softc *)dev;
sc 2001 dev/wscons/wsdisplay.c scr = sc->sc_focus;
sc 2035 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = (struct wsdisplay_softc *)disp;
sc 2037 dev/wscons/wsdisplay.c if (sc->sc_input != NULL)
sc 2040 dev/wscons/wsdisplay.c sc->sc_input = kbd;
sc 2119 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc;
sc 2123 dev/wscons/wsdisplay.c sc = wsdisplay_console_device;
sc 2124 dev/wscons/wsdisplay.c if ((scr = sc->sc_scr[0]) == NULL)
sc 2126 dev/wscons/wsdisplay.c (*sc->sc_accessops->show_screen)(sc->sc_accesscookie,
sc 2135 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = arg;
sc 2141 dev/wscons/wsdisplay.c lines = sc->sc_focus->scr_dconf->scrdata->nrows - 1;
sc 2146 dev/wscons/wsdisplay.c if (sc->sc_accessops->scrollback) {
sc 2147 dev/wscons/wsdisplay.c (*sc->sc_accessops->scrollback)(sc->sc_accesscookie,
sc 2148 dev/wscons/wsdisplay.c sc->sc_focus->scr_dconf->emulcookie, lines);
sc 2157 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = v;
sc 2159 dev/wscons/wsdisplay.c if ((flags & sc->sc_burnflags & (WSDISPLAY_BURN_OUTPUT |
sc 2161 dev/wscons/wsdisplay.c sc->sc_accessops->burn_screen) {
sc 2162 dev/wscons/wsdisplay.c if (sc->sc_burnout)
sc 2163 dev/wscons/wsdisplay.c timeout_add(&sc->sc_burner, sc->sc_burnout);
sc 2164 dev/wscons/wsdisplay.c if (sc->sc_burnman)
sc 2165 dev/wscons/wsdisplay.c sc->sc_burnout = 0;
sc 2172 dev/wscons/wsdisplay.c struct wsdisplay_softc *sc = v;
sc 2175 dev/wscons/wsdisplay.c if (sc->sc_accessops->burn_screen) {
sc 2176 dev/wscons/wsdisplay.c (*sc->sc_accessops->burn_screen)(sc->sc_accesscookie,
sc 2177 dev/wscons/wsdisplay.c sc->sc_burnman, sc->sc_burnflags);
sc 2179 dev/wscons/wsdisplay.c if (sc->sc_burnman) {
sc 2180 dev/wscons/wsdisplay.c sc->sc_burnout = sc->sc_burnoutintvl;
sc 2181 dev/wscons/wsdisplay.c timeout_add(&sc->sc_burner, sc->sc_burnout);
sc 2183 dev/wscons/wsdisplay.c sc->sc_burnout = sc->sc_burninintvl;
sc 2184 dev/wscons/wsdisplay.c sc->sc_burnman = !sc->sc_burnman;
sc 2205 dev/wscons/wsdisplay.c static struct wsdisplay_softc *sc = NULL;
sc 2328 dev/wscons/wsdisplay.c sc = ws_sc;
sc 2329 dev/wscons/wsdisplay.c allocate_copybuffer(sc);
sc 2348 dev/wscons/wsdisplay.c if (sc->sc_scr[i]) {
sc 2349 dev/wscons/wsdisplay.c sc->sc_scr[i]->mouse =
sc 2350 dev/wscons/wsdisplay.c ((WS_NCOLS(sc->sc_scr[i]) *
sc 2351 dev/wscons/wsdisplay.c WS_NROWS(sc->sc_scr[i])) / 2);
sc 2352 dev/wscons/wsdisplay.c sc->sc_scr[i]->cursor = sc->sc_scr[i]->mouse;
sc 2353 dev/wscons/wsdisplay.c sc->sc_scr[i]->cpy_start = 0;
sc 2354 dev/wscons/wsdisplay.c sc->sc_scr[i]->cpy_end = 0;
sc 2355 dev/wscons/wsdisplay.c sc->sc_scr[i]->orig_start = 0;
sc 2356 dev/wscons/wsdisplay.c sc->sc_scr[i]->orig_end = 0;
sc 2357 dev/wscons/wsdisplay.c sc->sc_scr[i]->mouse_flags = 0;
sc 2400 dev/wscons/wsdisplay.c if (IS_SEL_IN_PROGRESS(sc->sc_focus)) {
sc 2405 dev/wscons/wsdisplay.c if (IS_MOUSE_VISIBLE(sc->sc_focus))
sc 2423 dev/wscons/wsdisplay.c dconf = sc->sc_focus->scr_dconf;
sc 2678 dev/wscons/wsdisplay.c if (IS_SEL_EXISTS(sc->sc_focus))
sc 2679 dev/wscons/wsdisplay.c remove_selection(sc);
sc 2682 dev/wscons/wsdisplay.c if (!IS_MOUSE_VISIBLE(sc->sc_focus))
sc 2713 dev/wscons/wsdisplay.c if (IS_SEL_EXISTS(sc->sc_focus))
sc 2714 dev/wscons/wsdisplay.c remove_selection(sc);
sc 2716 dev/wscons/wsdisplay.c if (IS_MOUSE_VISIBLE(sc->sc_focus))
sc 2756 dev/wscons/wsdisplay.c if (IS_SEL_EXISTS(sc->sc_focus))
sc 2757 dev/wscons/wsdisplay.c remove_selection(sc);
sc 2759 dev/wscons/wsdisplay.c if (IS_MOUSE_VISIBLE(sc->sc_focus))
sc 2787 dev/wscons/wsdisplay.c if (IS_SEL_BY_WORD(sc->sc_focus) || IS_SEL_BY_LINE(sc->sc_focus)) {
sc 2801 dev/wscons/wsdisplay.c if (IS_SEL_BY_CHAR(sc->sc_focus))
sc 2803 dev/wscons/wsdisplay.c if (IS_SEL_BY_WORD(sc->sc_focus))
sc 2805 dev/wscons/wsdisplay.c if (IS_SEL_BY_LINE(sc->sc_focus))
sc 2817 dev/wscons/wsdisplay.c if (!IS_SEL_EXT_AFTER(sc->sc_focus)) {
sc 2819 dev/wscons/wsdisplay.c if (IS_BLANK_TO_EOL(sc->sc_focus)) {
sc 2857 dev/wscons/wsdisplay.c remove_selection(sc);
sc 2866 dev/wscons/wsdisplay.c remove_selection(sc);
sc 2910 dev/wscons/wsdisplay.c if (!IS_SEL_EXT_AFTER(sc->sc_focus)) {
sc 2983 dev/wscons/wsdisplay.c if (!IS_SEL_EXT_AFTER(sc->sc_focus)) {
sc 3001 dev/wscons/wsdisplay.c if (!IS_SEL_EXT_AFTER(sc->sc_focus)) {
sc 3046 dev/wscons/wsdisplay.c if (!IS_SEL_EXT_AFTER(sc->sc_focus)) {
sc 3054 dev/wscons/wsdisplay.c mouse_hide(struct wsdisplay_softc *sc)
sc 3056 dev/wscons/wsdisplay.c if (IS_MOUSE_VISIBLE(sc->sc_focus)) {
sc 3071 dev/wscons/wsdisplay.c if (IS_SEL_EXISTS(sc->sc_focus)) {
sc 3073 dev/wscons/wsdisplay.c mouse_hide(sc); /* hide current cursor */
sc 3094 dev/wscons/wsdisplay.c if (IS_SEL_BY_CHAR(sc->sc_focus))
sc 3096 dev/wscons/wsdisplay.c if (IS_SEL_BY_WORD(sc->sc_focus))
sc 3098 dev/wscons/wsdisplay.c if (IS_SEL_BY_LINE(sc->sc_focus))
sc 3108 dev/wscons/wsdisplay.c remove_selection(struct wsdisplay_softc *sc)
sc 3110 dev/wscons/wsdisplay.c if (IS_SEL_EXT_AFTER(sc->sc_focus)) {
sc 3166 dev/wscons/wsdisplay.c (*linesw[sc->sc_focus->scr_tty->t_line].l_rint)
sc 3167 dev/wscons/wsdisplay.c (*current++, sc->sc_focus->scr_tty);
sc 3180 dev/wscons/wsdisplay.c wsscrollback(sc, WSDISPLAY_SCROLL_BACKWARD);
sc 3182 dev/wscons/wsdisplay.c wsscrollback(sc, WSDISPLAY_SCROLL_FORWARD);
sc 3192 dev/wscons/wsdisplay.c allocate_copybuffer(struct wsdisplay_softc *sc)
sc 3194 dev/wscons/wsdisplay.c int nscreens = sc->sc_scrdata->nscreens;
sc 3196 dev/wscons/wsdisplay.c const struct wsscreen_descr **screens_list = sc->sc_scrdata->screens;
sc 3222 dev/wscons/wsdisplay.c mouse_remove(struct wsdisplay_softc *sc)
sc 3224 dev/wscons/wsdisplay.c if (IS_SEL_EXISTS(sc->sc_focus))
sc 3225 dev/wscons/wsdisplay.c remove_selection(sc);
sc 3227 dev/wscons/wsdisplay.c mouse_hide(sc);
sc 3232 dev/wscons/wsdisplay.c wsmoused_release(struct wsdisplay_softc *sc)
sc 3242 dev/wscons/wsdisplay.c if (sc->wsmoused_dev) {
sc 3256 dev/wscons/wsdisplay.c if (cdevsw[major(sc->wsmoused_dev)].d_open == wsmuxopen)
sc 3259 dev/wscons/wsdisplay.c if (is_wsmux && (minor(sc->wsmoused_dev) == WSMOUSEDEVCF_MUX)) {
sc 3268 dev/wscons/wsdisplay.c if (cdevsw[major(sc->wsmoused_dev)].d_open ==
sc 3273 dev/wscons/wsdisplay.c if (is_wsmouse && (minor(sc->wsmoused_dev) <= NWSMOUSE)) {
sc 3275 dev/wscons/wsdisplay.c if (minor(sc->wsmoused_dev) < wsmouse_cd.cd_ndevs) {
sc 3277 dev/wscons/wsdisplay.c wsms_dev_list[minor(sc->wsmoused_dev)];
sc 3295 dev/wscons/wsdisplay.c wsmoused_wakeup(struct wsdisplay_softc *sc)
sc 3298 dev/wscons/wsdisplay.c if (sc->wsmoused_dev) {
sc 3299 dev/wscons/wsdisplay.c sc->wsmoused_sleep = 0;
sc 3300 dev/wscons/wsdisplay.c wakeup(&sc->wsmoused_sleep);
sc 302 dev/wscons/wsdisplay_compat_usl.c wsdisplay_usl_ioctl1(sc, cmd, data, flag, p)
sc 303 dev/wscons/wsdisplay_compat_usl.c struct wsdisplay_softc *sc;
sc 313 dev/wscons/wsdisplay_compat_usl.c maxidx = wsdisplay_maxscreenidx(sc);
sc 315 dev/wscons/wsdisplay_compat_usl.c if (wsdisplay_screenstate(sc, idx) == 0) {
sc 322 dev/wscons/wsdisplay_compat_usl.c idx = wsdisplay_getactivescreen(sc);
sc 329 dev/wscons/wsdisplay_compat_usl.c return (wsdisplay_switch((struct device *)sc, idx, 1));
sc 334 dev/wscons/wsdisplay_compat_usl.c return (wsscreen_switchwait(sc, idx));
sc 337 dev/wscons/wsdisplay_compat_usl.c idx = wsdisplay_getactivescreen(sc);
sc 340 dev/wscons/wsdisplay_compat_usl.c maxidx = wsdisplay_maxscreenidx(sc);
sc 342 dev/wscons/wsdisplay_compat_usl.c if (wsdisplay_screenstate(sc, idx) == EBUSY)
sc 370 dev/wscons/wsdisplay_compat_usl.c wsdisplay_usl_ioctl2(sc, scr, cmd, data, flag, p)
sc 371 dev/wscons/wsdisplay_compat_usl.c struct wsdisplay_softc *sc;
sc 544 dev/wscons/wsdisplay_compat_usl.c res = wsdisplay_internal_ioctl(sc, scr, req, arg, flag, p);
sc 192 dev/wscons/wsdisplayvar.h int wsdisplay_internal_ioctl(struct wsdisplay_softc *sc,
sc 203 dev/wscons/wsdisplayvar.h int wsdisplay_cfg_ioctl(struct wsdisplay_softc *sc,
sc 224 dev/wscons/wskbd.c void wskbd_deliver_event(struct wskbd_softc *sc, u_int type, int value);
sc 357 dev/wscons/wskbd.c struct wskbd_softc *sc = (struct wskbd_softc *)self;
sc 363 dev/wscons/wskbd.c sc->sc_isconsole = ap->console;
sc 366 dev/wscons/wskbd.c sc->sc_base.me_ops = &wskbd_srcops;
sc 369 dev/wscons/wskbd.c mux = sc->sc_base.me_dv.dv_cfdata->wskbddevcf_mux;
sc 379 dev/wscons/wskbd.c if (sc->sc_base.me_dv.dv_cfdata->wskbddevcf_mux >= 0)
sc 385 dev/wscons/wskbd.c sc->id = &wskbd_console_data;
sc 387 dev/wscons/wskbd.c sc->id = malloc(sizeof(struct wskbd_internal),
sc 389 dev/wscons/wskbd.c bzero(sc->id, sizeof(struct wskbd_internal));
sc 390 dev/wscons/wskbd.c sc->id->t_keymap = ap->keymap;
sc 391 dev/wscons/wskbd.c wskbd_update_layout(sc->id, ap->keymap->layout);
sc 395 dev/wscons/wskbd.c timeout_set(&sc->sc_repeat_ch, wskbd_repeat, sc);
sc 398 dev/wscons/wskbd.c sc->id->t_sc = sc;
sc 400 dev/wscons/wskbd.c sc->sc_accessops = ap->accessops;
sc 401 dev/wscons/wskbd.c sc->sc_accesscookie = ap->accesscookie;
sc 402 dev/wscons/wskbd.c sc->sc_repeating = 0;
sc 403 dev/wscons/wskbd.c sc->sc_translating = 1;
sc 404 dev/wscons/wskbd.c sc->sc_ledstate = -1; /* force update */
sc 406 dev/wscons/wskbd.c if (wskbd_load_keymap(sc->id->t_keymap,
sc 407 dev/wscons/wskbd.c &sc->sc_map, &sc->sc_maplen) != 0)
sc 410 dev/wscons/wskbd.c sc->sc_layout = sc->id->t_keymap->layout;
sc 413 dev/wscons/wskbd.c sc->sc_bell_data = wskbd_default_bell_data;
sc 414 dev/wscons/wskbd.c sc->sc_keyrepeat_data = wskbd_default_keyrepeat_data;
sc 420 dev/wscons/wskbd.c wskbd_console_device = sc;
sc 425 dev/wscons/wskbd.c wsdisplay_set_console_kbd(&sc->sc_base); /* sets me_dispdv */
sc 426 dev/wscons/wskbd.c if (sc->sc_displaydv != NULL)
sc 427 dev/wscons/wskbd.c printf(", using %s", sc->sc_displaydv->dv_xname);
sc 434 dev/wscons/wskbd.c error = wsmux_attach_sc(wsmux_getmux(mux), &sc->sc_base);
sc 437 dev/wscons/wskbd.c sc->sc_base.me_dv.dv_xname, error);
sc 453 dev/wscons/wskbd.c (struct wsevsrc *)sc);
sc 501 dev/wscons/wskbd.c struct wskbd_softc *sc = (struct wskbd_softc *)v;
sc 504 dev/wscons/wskbd.c if (!sc->sc_repeating) {
sc 512 dev/wscons/wskbd.c if (sc->sc_translating) {
sc 514 dev/wscons/wskbd.c if (sc->sc_base.me_dispdv != NULL) {
sc 516 dev/wscons/wskbd.c for (i = 0; i < sc->sc_repeating; i++)
sc 517 dev/wscons/wskbd.c wsdisplay_kbdinput(sc->sc_base.me_dispdv,
sc 518 dev/wscons/wskbd.c sc->id->t_symbols[i]);
sc 522 dev/wscons/wskbd.c wskbd_deliver_event(sc, sc->sc_repeat_type,
sc 523 dev/wscons/wskbd.c sc->sc_repeat_value);
sc 525 dev/wscons/wskbd.c if (sc->sc_keyrepeat_data.delN != 0)
sc 526 dev/wscons/wskbd.c timeout_add(&sc->sc_repeat_ch,
sc 527 dev/wscons/wskbd.c (hz * sc->sc_keyrepeat_data.delN) / 1000);
sc 535 dev/wscons/wskbd.c struct wskbd_softc *sc = (struct wskbd_softc *)self;
sc 538 dev/wscons/wskbd.c sc->sc_dying = 1;
sc 553 dev/wscons/wskbd.c struct wskbd_softc *sc = (struct wskbd_softc *)self;
sc 560 dev/wscons/wskbd.c if (sc->sc_base.me_parent != NULL)
sc 561 dev/wscons/wskbd.c wsmux_detach_sc(&sc->sc_base);
sc 565 dev/wscons/wskbd.c if (sc->sc_repeating) {
sc 566 dev/wscons/wskbd.c sc->sc_repeating = 0;
sc 567 dev/wscons/wskbd.c timeout_del(&sc->sc_repeat_ch);
sc 571 dev/wscons/wskbd.c if (sc->sc_isconsole) {
sc 572 dev/wscons/wskbd.c KASSERT(wskbd_console_device == sc);
sc 576 dev/wscons/wskbd.c evar = sc->sc_base.me_evp;
sc 579 dev/wscons/wskbd.c if (--sc->sc_refcnt >= 0) {
sc 585 dev/wscons/wskbd.c if (tsleep(sc, PZERO, "wskdet", hz * 60))
sc 587 dev/wscons/wskbd.c sc->sc_base.me_dv.dv_xname);
sc 607 dev/wscons/wskbd.c struct wskbd_softc *sc = (struct wskbd_softc *)dev;
sc 613 dev/wscons/wskbd.c if (sc->sc_repeating) {
sc 614 dev/wscons/wskbd.c sc->sc_repeating = 0;
sc 615 dev/wscons/wskbd.c timeout_del(&sc->sc_repeat_ch);
sc 622 dev/wscons/wskbd.c if (sc->sc_translating) {
sc 624 dev/wscons/wskbd.c if (type == WSCONS_EVENT_KEY_DOWN && sc->sc_displaydv != NULL)
sc 625 dev/wscons/wskbd.c wsdisplay_burn(sc->sc_displaydv, WSDISPLAY_BURN_KBD);
sc 627 dev/wscons/wskbd.c num = wskbd_translate(sc->id, type, value);
sc 629 dev/wscons/wskbd.c if (sc->sc_base.me_dispdv != NULL) {
sc 632 dev/wscons/wskbd.c if (sc->id->t_symbols[0] != KS_Print_Screen) {
sc 633 dev/wscons/wskbd.c wsscrollback(sc->sc_base.me_dispdv,
sc 638 dev/wscons/wskbd.c wsdisplay_kbdinput(sc->sc_base.me_dispdv,
sc 639 dev/wscons/wskbd.c sc->id->t_symbols[i]);
sc 643 dev/wscons/wskbd.c if (sc->sc_keyrepeat_data.del1 != 0) {
sc 644 dev/wscons/wskbd.c sc->sc_repeating = num;
sc 645 dev/wscons/wskbd.c timeout_add(&sc->sc_repeat_ch,
sc 646 dev/wscons/wskbd.c (hz * sc->sc_keyrepeat_data.del1) / 1000);
sc 653 dev/wscons/wskbd.c wskbd_deliver_event(sc, type, value);
sc 657 dev/wscons/wskbd.c if (type == WSCONS_EVENT_KEY_DOWN && sc->sc_keyrepeat_data.del1 != 0) {
sc 658 dev/wscons/wskbd.c sc->sc_repeat_type = type;
sc 659 dev/wscons/wskbd.c sc->sc_repeat_value = value;
sc 660 dev/wscons/wskbd.c sc->sc_repeating = 1;
sc 661 dev/wscons/wskbd.c timeout_add(&sc->sc_repeat_ch,
sc 662 dev/wscons/wskbd.c (hz * sc->sc_keyrepeat_data.del1) / 1000);
sc 673 dev/wscons/wskbd.c wskbd_deliver_event(struct wskbd_softc *sc, u_int type, int value)
sc 679 dev/wscons/wskbd.c evar = sc->sc_base.me_evp;
sc 698 dev/wscons/wskbd.c sc->sc_base.me_dv.dv_xname);
sc 713 dev/wscons/wskbd.c struct wskbd_softc *sc = (struct wskbd_softc *)dev;
sc 716 dev/wscons/wskbd.c if (sc->sc_base.me_dispdv != NULL)
sc 718 dev/wscons/wskbd.c wsdisplay_kbdinput(sc->sc_base.me_dispdv, buf[i]);
sc 726 dev/wscons/wskbd.c wskbd_holdscreen(struct wskbd_softc *sc, int hold)
sc 730 dev/wscons/wskbd.c if (sc->sc_base.me_dispdv != NULL) {
sc 731 dev/wscons/wskbd.c wsdisplay_kbdholdscreen(sc->sc_base.me_dispdv, hold);
sc 732 dev/wscons/wskbd.c new_state = sc->sc_ledstate;
sc 737 dev/wscons/wskbd.c if (new_state != sc->sc_ledstate) {
sc 738 dev/wscons/wskbd.c (*sc->sc_accessops->set_leds)(sc->sc_accesscookie,
sc 740 dev/wscons/wskbd.c sc->sc_ledstate = new_state;
sc 747 dev/wscons/wskbd.c wskbd_enable(struct wskbd_softc *sc, int on)
sc 752 dev/wscons/wskbd.c if (sc->sc_base.me_dispdv != NULL)
sc 756 dev/wscons/wskbd.c if (sc->sc_repeating) {
sc 757 dev/wscons/wskbd.c sc->sc_repeating = 0;
sc 758 dev/wscons/wskbd.c timeout_del(&sc->sc_repeat_ch);
sc 762 dev/wscons/wskbd.c error = (*sc->sc_accessops->enable)(sc->sc_accesscookie, on);
sc 763 dev/wscons/wskbd.c DPRINTF(("wskbd_enable: sc=%p on=%d res=%d\n", sc, on, error));
sc 771 dev/wscons/wskbd.c struct wskbd_softc *sc = (struct wskbd_softc *)me;
sc 773 dev/wscons/wskbd.c if (sc->sc_dying)
sc 776 dev/wscons/wskbd.c if (sc->sc_base.me_evp != NULL)
sc 779 dev/wscons/wskbd.c return (wskbd_do_open(sc, evp));
sc 786 dev/wscons/wskbd.c struct wskbd_softc *sc;
sc 792 dev/wscons/wskbd.c (sc = wskbd_cd.cd_devs[unit]) == NULL)
sc 796 dev/wscons/wskbd.c DPRINTF(("wskbdopen: %s mux=%p p=%p\n", sc->sc_base.me_dv.dv_xname,
sc 797 dev/wscons/wskbd.c sc->sc_base.me_parent, p));
sc 800 dev/wscons/wskbd.c if (sc->sc_dying)
sc 809 dev/wscons/wskbd.c if (sc->sc_base.me_parent != NULL) {
sc 812 dev/wscons/wskbd.c wsmux_detach_sc(&sc->sc_base);
sc 816 dev/wscons/wskbd.c if (sc->sc_base.me_evp != NULL)
sc 819 dev/wscons/wskbd.c evar = &sc->sc_base.me_evar;
sc 823 dev/wscons/wskbd.c error = wskbd_do_open(sc, evar);
sc 826 dev/wscons/wskbd.c sc->sc_base.me_dv.dv_xname));
sc 827 dev/wscons/wskbd.c sc->sc_base.me_evp = NULL;
sc 834 dev/wscons/wskbd.c wskbd_do_open(struct wskbd_softc *sc, struct wseventvar *evp)
sc 836 dev/wscons/wskbd.c sc->sc_base.me_evp = evp;
sc 837 dev/wscons/wskbd.c sc->sc_translating = 0;
sc 839 dev/wscons/wskbd.c return (wskbd_enable(sc, 1));
sc 845 dev/wscons/wskbd.c struct wskbd_softc *sc =
sc 847 dev/wscons/wskbd.c struct wseventvar *evar = sc->sc_base.me_evp;
sc 853 dev/wscons/wskbd.c sc->sc_base.me_evp = NULL;
sc 854 dev/wscons/wskbd.c sc->sc_translating = 1;
sc 855 dev/wscons/wskbd.c (void)wskbd_enable(sc, 0);
sc 865 dev/wscons/wskbd.c struct wskbd_softc *sc = (struct wskbd_softc *)me;
sc 867 dev/wscons/wskbd.c sc->sc_base.me_evp = NULL;
sc 868 dev/wscons/wskbd.c sc->sc_translating = 1;
sc 869 dev/wscons/wskbd.c (void)wskbd_enable(sc, 0);
sc 878 dev/wscons/wskbd.c struct wskbd_softc *sc = wskbd_cd.cd_devs[minor(dev)];
sc 881 dev/wscons/wskbd.c if (sc->sc_dying)
sc 885 dev/wscons/wskbd.c if (sc->sc_base.me_evp == NULL) {
sc 891 dev/wscons/wskbd.c sc->sc_refcnt++;
sc 892 dev/wscons/wskbd.c error = wsevent_read(&sc->sc_base.me_evar, uio, flags);
sc 893 dev/wscons/wskbd.c if (--sc->sc_refcnt < 0) {
sc 894 dev/wscons/wskbd.c wakeup(sc);
sc 911 dev/wscons/wskbd.c struct wskbd_softc *sc = (struct wskbd_softc *)dv;
sc 914 dev/wscons/wskbd.c sc->sc_refcnt++;
sc 915 dev/wscons/wskbd.c error = wskbd_do_ioctl_sc(sc, cmd, data, flag, p);
sc 916 dev/wscons/wskbd.c if (--sc->sc_refcnt < 0)
sc 917 dev/wscons/wskbd.c wakeup(sc);
sc 922 dev/wscons/wskbd.c wskbd_do_ioctl_sc(struct wskbd_softc *sc, u_long cmd, caddr_t data, int flag,
sc 935 dev/wscons/wskbd.c if (sc->sc_base.me_evp == NULL)
sc 937 dev/wscons/wskbd.c sc->sc_base.me_evp->async = *(int *)data != 0;
sc 941 dev/wscons/wskbd.c if (sc->sc_base.me_evp == NULL)
sc 943 dev/wscons/wskbd.c if (-*(int *)data != sc->sc_base.me_evp->io->p_pgid &&
sc 944 dev/wscons/wskbd.c *(int *)data != sc->sc_base.me_evp->io->p_pid)
sc 949 dev/wscons/wskbd.c if (sc->sc_base.me_evp == NULL)
sc 951 dev/wscons/wskbd.c if (*(int *)data != sc->sc_base.me_evp->io->p_pgid)
sc 960 dev/wscons/wskbd.c error = wskbd_displayioctl(&sc->sc_base.me_dv, cmd, data, flag, p);
sc 972 dev/wscons/wskbd.c struct wskbd_softc *sc = (struct wskbd_softc *)dev;
sc 1006 dev/wscons/wskbd.c return ((*sc->sc_accessops->ioctl)(sc->sc_accesscookie,
sc 1007 dev/wscons/wskbd.c WSKBDIO_COMPLEXBELL, (caddr_t)&sc->sc_bell_data, flag, p));
sc 1011 dev/wscons/wskbd.c SETBELL(ubdp, ubdp, &sc->sc_bell_data);
sc 1012 dev/wscons/wskbd.c return ((*sc->sc_accessops->ioctl)(sc->sc_accesscookie,
sc 1016 dev/wscons/wskbd.c kbdp = &sc->sc_bell_data;
sc 1023 dev/wscons/wskbd.c kbdp = &sc->sc_bell_data;
sc 1052 dev/wscons/wskbd.c kkdp = &sc->sc_keyrepeat_data;
sc 1059 dev/wscons/wskbd.c kkdp = &sc->sc_keyrepeat_data;
sc 1088 dev/wscons/wskbd.c &sc->sc_map, &sc->sc_maplen);
sc 1089 dev/wscons/wskbd.c memcpy(sc->sc_map, buf, len);
sc 1091 dev/wscons/wskbd.c sc->sc_layout = KB_USER |
sc 1092 dev/wscons/wskbd.c (KB_VARIANT(sc->sc_layout) & KB_HANDLEDBYWSKBD);
sc 1093 dev/wscons/wskbd.c wskbd_update_layout(sc->id, sc->sc_layout);
sc 1100 dev/wscons/wskbd.c if (umdp->maplen > sc->sc_maplen)
sc 1101 dev/wscons/wskbd.c umdp->maplen = sc->sc_maplen;
sc 1102 dev/wscons/wskbd.c error = copyout(sc->sc_map, umdp->map,
sc 1107 dev/wscons/wskbd.c *((kbd_t *) data) = sc->sc_layout;
sc 1114 dev/wscons/wskbd.c if (KB_ENCODING(sc->sc_layout) != KB_USER)
sc 1120 dev/wscons/wskbd.c md = *(sc->id->t_keymap); /* structure assignment */
sc 1122 dev/wscons/wskbd.c error = wskbd_load_keymap(&md, &sc->sc_map,
sc 1123 dev/wscons/wskbd.c &sc->sc_maplen);
sc 1127 dev/wscons/wskbd.c sc->sc_layout = enc;
sc 1128 dev/wscons/wskbd.c wskbd_update_layout(sc->id, enc);
sc 1138 dev/wscons/wskbd.c error = (*sc->sc_accessops->ioctl)(sc->sc_accesscookie, cmd, data,
sc 1143 dev/wscons/wskbd.c sc->id->t_modifiers &= ~(MOD_SHIFT_L | MOD_SHIFT_R
sc 1149 dev/wscons/wskbd.c if (sc->sc_repeating) {
sc 1150 dev/wscons/wskbd.c sc->sc_repeating = 0;
sc 1151 dev/wscons/wskbd.c timeout_del(&sc->sc_repeat_ch);
sc 1163 dev/wscons/wskbd.c struct wskbd_softc *sc = wskbd_cd.cd_devs[minor(dev)];
sc 1165 dev/wscons/wskbd.c if (sc->sc_base.me_evp == NULL)
sc 1167 dev/wscons/wskbd.c return (wsevent_poll(sc->sc_base.me_evp, events, p));
sc 1176 dev/wscons/wskbd.c struct wskbd_softc *sc;
sc 1179 dev/wscons/wskbd.c if ((sc = wskbd_cd.cd_devs[i]) == NULL)
sc 1181 dev/wscons/wskbd.c if (sc->sc_displaydv == NULL)
sc 1190 dev/wscons/wskbd.c struct wskbd_softc *sc = wskbd_console_device;
sc 1192 dev/wscons/wskbd.c if (sc == NULL)
sc 1194 dev/wscons/wskbd.c sc->sc_base.me_dispdv = displaydv;
sc 1196 dev/wscons/wskbd.c (void)wsmux_attach_sc((struct wsmux_softc *)me, &sc->sc_base);
sc 1198 dev/wscons/wskbd.c return (&sc->sc_base);
sc 1204 dev/wscons/wskbd.c struct wskbd_softc *sc = (struct wskbd_softc *)dv;
sc 1209 dev/wscons/wskbd.c dv->dv_xname, sc->sc_base.me_dispdv, displaydv,
sc 1210 dev/wscons/wskbd.c sc->sc_isconsole));
sc 1212 dev/wscons/wskbd.c if (sc->sc_isconsole)
sc 1216 dev/wscons/wskbd.c if (sc->sc_base.me_dispdv != NULL)
sc 1219 dev/wscons/wskbd.c if (sc->sc_base.me_dispdv == NULL)
sc 1223 dev/wscons/wskbd.c odisplaydv = sc->sc_base.me_dispdv;
sc 1224 dev/wscons/wskbd.c sc->sc_base.me_dispdv = NULL;
sc 1225 dev/wscons/wskbd.c error = wskbd_enable(sc, displaydv != NULL);
sc 1226 dev/wscons/wskbd.c sc->sc_base.me_dispdv = displaydv;
sc 1228 dev/wscons/wskbd.c sc->sc_base.me_dispdv = odisplaydv;
sc 1234 dev/wscons/wskbd.c sc->sc_base.me_dv.dv_xname, displaydv->dv_xname);
sc 1237 dev/wscons/wskbd.c sc->sc_base.me_dv.dv_xname, odisplaydv->dv_xname);
sc 1248 dev/wscons/wskbd.c struct wskbd_softc *sc;
sc 1251 dev/wscons/wskbd.c (sc = wskbd_cd.cd_devs[unit]) == NULL)
sc 1254 dev/wscons/wskbd.c if (sc->sc_base.me_parent != NULL || sc->sc_base.me_evp != NULL)
sc 1257 dev/wscons/wskbd.c return (wsmux_attach_sc(muxsc, &sc->sc_base));
sc 1360 dev/wscons/wskbd.c change_displayparam(struct wskbd_softc *sc, int param, int updown,
sc 1367 dev/wscons/wskbd.c res = wsdisplay_param(sc->sc_base.me_dispdv, WSDISPLAYIO_GETPARAM, &dp);
sc 1378 dev/wscons/wskbd.c wsdisplay_param(sc->sc_base.me_dispdv, WSDISPLAYIO_SETPARAM, &dp);
sc 1383 dev/wscons/wskbd.c internal_command(struct wskbd_softc *sc, u_int *type, keysym_t ksym,
sc 1388 dev/wscons/wskbd.c update_modifier(sc->id, *type, 0, MOD_COMMAND);
sc 1393 dev/wscons/wskbd.c update_modifier(sc->id, *type, 0, MOD_COMMAND1);
sc 1397 dev/wscons/wskbd.c update_modifier(sc->id, *type, 0, MOD_COMMAND2);
sc 1408 dev/wscons/wskbd.c if (MOD_ONESET(sc->id, MOD_ANYSHIFT)) {
sc 1409 dev/wscons/wskbd.c if (sc->sc_displaydv != NULL)
sc 1410 dev/wscons/wskbd.c wsscrollback(sc->sc_displaydv,
sc 1417 dev/wscons/wskbd.c if (MOD_ONESET(sc->id, MOD_ANYSHIFT)) {
sc 1418 dev/wscons/wskbd.c if (sc->sc_displaydv != NULL)
sc 1419 dev/wscons/wskbd.c wsscrollback(sc->sc_displaydv,
sc 1428 dev/wscons/wskbd.c if (!MOD_ONESET(sc->id, MOD_COMMAND) &&
sc 1429 dev/wscons/wskbd.c !MOD_ALLSET(sc->id, MOD_COMMAND1 | MOD_COMMAND2))
sc 1434 dev/wscons/wskbd.c if (sc->sc_isconsole && db_console)
sc 1443 dev/wscons/wskbd.c if (sc->sc_base.me_dispdv == NULL)
sc 1459 dev/wscons/wskbd.c wsdisplay_switch(sc->sc_displaydv, ksym - KS_Cmd_Screen0, 0);
sc 1462 dev/wscons/wskbd.c wsdisplay_reset(sc->sc_displaydv, WSDISPLAY_RESETEMUL);
sc 1465 dev/wscons/wskbd.c wsdisplay_reset(sc->sc_displaydv, WSDISPLAY_RESETCLOSE);
sc 1478 dev/wscons/wskbd.c change_displayparam(sc, WSDISPLAYIO_PARAM_BACKLIGHT,
sc 1485 dev/wscons/wskbd.c change_displayparam(sc, WSDISPLAYIO_PARAM_BRIGHTNESS,
sc 1492 dev/wscons/wskbd.c change_displayparam(sc, WSDISPLAYIO_PARAM_CONTRAST,
sc 1504 dev/wscons/wskbd.c struct wskbd_softc *sc = id->t_sc;
sc 1511 dev/wscons/wskbd.c if (sc != NULL && sc->sc_repeating) {
sc 1512 dev/wscons/wskbd.c sc->sc_repeating = 0;
sc 1513 dev/wscons/wskbd.c timeout_del(&sc->sc_repeat_ch);
sc 1525 dev/wscons/wskbd.c if (sc != NULL) {
sc 1526 dev/wscons/wskbd.c if (value < 0 || value >= sc->sc_maplen) {
sc 1533 dev/wscons/wskbd.c kp = sc->sc_map + value;
sc 1540 dev/wscons/wskbd.c if (sc != NULL && kp->command != KS_voidSymbol)
sc 1541 dev/wscons/wskbd.c iscommand = internal_command(sc, &type, kp->command,
sc 1592 dev/wscons/wskbd.c if (sc != NULL) {
sc 1594 dev/wscons/wskbd.c wskbd_holdscreen(sc, id->t_modifiers & MOD_HOLDSCREEN);
sc 1599 dev/wscons/wskbd.c if (sc != NULL && sc->sc_repeating &&
sc 1600 dev/wscons/wskbd.c ((type == WSCONS_EVENT_KEY_UP && value != sc->sc_repkey) ||
sc 1601 dev/wscons/wskbd.c (type == WSCONS_EVENT_KEY_DOWN && value == sc->sc_repkey)))
sc 1608 dev/wscons/wskbd.c if (sc != NULL) {
sc 1609 dev/wscons/wskbd.c if (sc->sc_repeating) {
sc 1610 dev/wscons/wskbd.c sc->sc_repeating = 0;
sc 1611 dev/wscons/wskbd.c timeout_del(&sc->sc_repeat_ch);
sc 1613 dev/wscons/wskbd.c sc->sc_repkey = value;
sc 197 dev/wscons/wsmouse.c struct wsmouse_softc *sc = (struct wsmouse_softc *)self;
sc 203 dev/wscons/wsmouse.c sc->sc_accessops = ap->accessops;
sc 204 dev/wscons/wsmouse.c sc->sc_accesscookie = ap->accesscookie;
sc 207 dev/wscons/wsmouse.c sc->sc_base.me_ops = &wsmouse_srcops;
sc 208 dev/wscons/wsmouse.c mux = sc->sc_base.me_dv.dv_cfdata->wsmousedevcf_mux;
sc 210 dev/wscons/wsmouse.c error = wsmux_attach_sc(wsmux_getmux(mux), &sc->sc_base);
sc 218 dev/wscons/wsmouse.c if (sc->sc_base.me_dv.dv_cfdata->wsmousedevcf_mux >= 0)
sc 229 dev/wscons/wsmouse.c struct wsmouse_softc *sc = (struct wsmouse_softc *)self;
sc 232 dev/wscons/wsmouse.c sc->sc_dying = 1;
sc 247 dev/wscons/wsmouse.c struct wsmouse_softc *sc = (struct wsmouse_softc *)self;
sc 254 dev/wscons/wsmouse.c if (sc->sc_base.me_parent != NULL) {
sc 256 dev/wscons/wsmouse.c wsmux_detach_sc(&sc->sc_base);
sc 261 dev/wscons/wsmouse.c evar = sc->sc_base.me_evp;
sc 264 dev/wscons/wsmouse.c if (--sc->sc_refcnt >= 0) {
sc 270 dev/wscons/wsmouse.c if (tsleep(sc, PZERO, "wsmdet", hz * 60))
sc 272 dev/wscons/wsmouse.c sc->sc_base.me_dv.dv_xname);
sc 293 dev/wscons/wsmouse.c struct wsmouse_softc *sc = (struct wsmouse_softc *)wsmousedev;
sc 303 dev/wscons/wsmouse.c evar = sc->sc_base.me_evp;
sc 316 dev/wscons/wsmouse.c sc->sc_base.me_dv.dv_xname, sc->sc_base.me_parent, evar));
sc 319 dev/wscons/wsmouse.c sc->sc_mb = btns;
sc 321 dev/wscons/wsmouse.c sc->sc_dx += x;
sc 323 dev/wscons/wsmouse.c sc->sc_dy += y;
sc 325 dev/wscons/wsmouse.c sc->sc_dz += z;
sc 327 dev/wscons/wsmouse.c sc->sc_dw += w;
sc 336 dev/wscons/wsmouse.c ub = sc->sc_ub;
sc 363 dev/wscons/wsmouse.c if (sc->sc_x != x) {
sc 369 dev/wscons/wsmouse.c sc->sc_x = x;
sc 372 dev/wscons/wsmouse.c if (sc->sc_dx) {
sc 375 dev/wscons/wsmouse.c ev->value = sc->sc_dx;
sc 378 dev/wscons/wsmouse.c sc->sc_dx = 0;
sc 382 dev/wscons/wsmouse.c if (sc->sc_y != y) {
sc 388 dev/wscons/wsmouse.c sc->sc_y = y;
sc 391 dev/wscons/wsmouse.c if (sc->sc_dy) {
sc 394 dev/wscons/wsmouse.c ev->value = sc->sc_dy;
sc 397 dev/wscons/wsmouse.c sc->sc_dy = 0;
sc 401 dev/wscons/wsmouse.c if (sc->sc_z != z) {
sc 407 dev/wscons/wsmouse.c sc->sc_z = z;
sc 410 dev/wscons/wsmouse.c if (sc->sc_dz) {
sc 413 dev/wscons/wsmouse.c ev->value = sc->sc_dz;
sc 416 dev/wscons/wsmouse.c sc->sc_dz = 0;
sc 420 dev/wscons/wsmouse.c if (sc->sc_w != w) {
sc 426 dev/wscons/wsmouse.c sc->sc_w = w;
sc 429 dev/wscons/wsmouse.c if (sc->sc_dw) {
sc 432 dev/wscons/wsmouse.c ev->value = sc->sc_dw;
sc 435 dev/wscons/wsmouse.c sc->sc_dw = 0;
sc 439 dev/wscons/wsmouse.c mb = sc->sc_mb;
sc 473 dev/wscons/wsmouse.c sc->sc_ub = ub;
sc 481 dev/wscons/wsmouse.c sc->sc_base.me_dv.dv_xname, evar));
sc 489 dev/wscons/wsmouse.c struct wsmouse_softc *sc;
sc 495 dev/wscons/wsmouse.c (sc = wsmouse_cd.cd_devs[unit]) == NULL)
sc 499 dev/wscons/wsmouse.c DPRINTF(("wsmouseopen: %s mux=%p p=%p\n", sc->sc_base.me_dv.dv_xname,
sc 500 dev/wscons/wsmouse.c sc->sc_base.me_parent, p));
sc 503 dev/wscons/wsmouse.c if (sc->sc_dying)
sc 510 dev/wscons/wsmouse.c if (sc->sc_base.me_evp != NULL)
sc 513 dev/wscons/wsmouse.c evar = &sc->sc_base.me_evar;
sc 517 dev/wscons/wsmouse.c error = wsmousedoopen(sc, evar);
sc 520 dev/wscons/wsmouse.c sc->sc_base.me_dv.dv_xname));
sc 521 dev/wscons/wsmouse.c sc->sc_base.me_evp = NULL;
sc 530 dev/wscons/wsmouse.c struct wsmouse_softc *sc =
sc 532 dev/wscons/wsmouse.c struct wseventvar *evar = sc->sc_base.me_evp;
sc 540 dev/wscons/wsmouse.c sc->sc_base.me_evp = NULL;
sc 541 dev/wscons/wsmouse.c (*sc->sc_accessops->disable)(sc->sc_accesscookie);
sc 548 dev/wscons/wsmouse.c wsmousedoopen(struct wsmouse_softc *sc, struct wseventvar *evp)
sc 550 dev/wscons/wsmouse.c sc->sc_base.me_evp = evp;
sc 551 dev/wscons/wsmouse.c sc->sc_x = INVALID_X;
sc 552 dev/wscons/wsmouse.c sc->sc_y = INVALID_Y;
sc 553 dev/wscons/wsmouse.c sc->sc_z = INVALID_Z;
sc 554 dev/wscons/wsmouse.c sc->sc_w = INVALID_W;
sc 557 dev/wscons/wsmouse.c return (*sc->sc_accessops->enable)(sc->sc_accesscookie);
sc 563 dev/wscons/wsmouse.c struct wsmouse_softc *sc = wsmouse_cd.cd_devs[minor(dev)];
sc 566 dev/wscons/wsmouse.c if (sc->sc_dying)
sc 570 dev/wscons/wsmouse.c if (sc->sc_base.me_evp == NULL) {
sc 576 dev/wscons/wsmouse.c sc->sc_refcnt++;
sc 577 dev/wscons/wsmouse.c error = wsevent_read(sc->sc_base.me_evp, uio, flags);
sc 578 dev/wscons/wsmouse.c if (--sc->sc_refcnt < 0) {
sc 579 dev/wscons/wsmouse.c wakeup(sc);
sc 597 dev/wscons/wsmouse.c struct wsmouse_softc *sc = (struct wsmouse_softc *)dv;
sc 600 dev/wscons/wsmouse.c sc->sc_refcnt++;
sc 601 dev/wscons/wsmouse.c error = wsmouse_do_ioctl(sc, cmd, data, flag, p);
sc 602 dev/wscons/wsmouse.c if (--sc->sc_refcnt < 0)
sc 603 dev/wscons/wsmouse.c wakeup(sc);
sc 608 dev/wscons/wsmouse.c wsmouse_do_ioctl(struct wsmouse_softc *sc, u_long cmd, caddr_t data, int flag,
sc 613 dev/wscons/wsmouse.c if (sc->sc_dying)
sc 633 dev/wscons/wsmouse.c if (sc->sc_base.me_evp == NULL)
sc 635 dev/wscons/wsmouse.c sc->sc_base.me_evp->async = *(int *)data != 0;
sc 639 dev/wscons/wsmouse.c if (sc->sc_base.me_evp == NULL)
sc 641 dev/wscons/wsmouse.c if (-*(int *)data != sc->sc_base.me_evp->io->p_pgid
sc 642 dev/wscons/wsmouse.c && *(int *)data != sc->sc_base.me_evp->io->p_pid)
sc 647 dev/wscons/wsmouse.c if (sc->sc_base.me_evp == NULL)
sc 649 dev/wscons/wsmouse.c if (*(int *)data != sc->sc_base.me_evp->io->p_pgid)
sc 658 dev/wscons/wsmouse.c error = (*sc->sc_accessops->ioctl)(sc->sc_accesscookie, cmd,
sc 666 dev/wscons/wsmouse.c struct wsmouse_softc *sc = wsmouse_cd.cd_devs[minor(dev)];
sc 668 dev/wscons/wsmouse.c if (sc->sc_base.me_evp == NULL)
sc 670 dev/wscons/wsmouse.c return (wsevent_poll(sc->sc_base.me_evp, events, p));
sc 677 dev/wscons/wsmouse.c struct wsmouse_softc *sc = (struct wsmouse_softc *)me;
sc 679 dev/wscons/wsmouse.c if (sc->sc_base.me_evp != NULL)
sc 682 dev/wscons/wsmouse.c return wsmousedoopen(sc, evp);
sc 688 dev/wscons/wsmouse.c struct wsmouse_softc *sc = (struct wsmouse_softc *)me;
sc 690 dev/wscons/wsmouse.c sc->sc_base.me_evp = NULL;
sc 691 dev/wscons/wsmouse.c (*sc->sc_accessops->disable)(sc->sc_accesscookie);
sc 699 dev/wscons/wsmouse.c struct wsmouse_softc *sc;
sc 702 dev/wscons/wsmouse.c (sc = wsmouse_cd.cd_devs[unit]) == NULL)
sc 705 dev/wscons/wsmouse.c if (sc->sc_base.me_parent != NULL || sc->sc_base.me_evp != NULL)
sc 708 dev/wscons/wsmouse.c return (wsmux_attach_sc(muxsc, &sc->sc_base));
sc 91 dev/wscons/wsmoused.h #define MAXCOL (WS_NCOLS(sc->sc_focus) - 1)
sc 92 dev/wscons/wsmoused.h #define MAXROW (WS_NROWS(sc->sc_focus) - 1)
sc 94 dev/wscons/wsmoused.h #define N_COLS (WS_NCOLS(sc->sc_focus))
sc 95 dev/wscons/wsmoused.h #define N_ROWS (WS_NROWS(sc->sc_focus))
sc 96 dev/wscons/wsmoused.h #define MOUSE (sc->sc_focus->mouse)
sc 97 dev/wscons/wsmoused.h #define CURSOR (sc->sc_focus->cursor)
sc 98 dev/wscons/wsmoused.h #define CPY_START (sc->sc_focus->cpy_start)
sc 99 dev/wscons/wsmoused.h #define CPY_END (sc->sc_focus->cpy_end)
sc 100 dev/wscons/wsmoused.h #define ORIG_START (sc->sc_focus->orig_start)
sc 101 dev/wscons/wsmoused.h #define ORIG_END (sc->sc_focus->orig_end)
sc 102 dev/wscons/wsmoused.h #define MOUSE_FLAGS (sc->sc_focus->mouse_flags)
sc 110 dev/wscons/wsmoused.h ((*sc->sc_accessops->getchar) \
sc 111 dev/wscons/wsmoused.h (sc->sc_accesscookie, (pos) / N_COLS, (pos) % N_COLS, cellp))
sc 113 dev/wscons/wsmoused.h ((*sc->sc_focus->scr_dconf->emulops->putchar) \
sc 114 dev/wscons/wsmoused.h (sc->sc_focus->scr_dconf->emulcookie, ((pos) / N_COLS), \
sc 136 dev/wscons/wsmux.c struct wsmux_softc *sc;
sc 159 dev/wscons/wsmux.c sc = wsmuxdevs[n];
sc 160 dev/wscons/wsmux.c if (sc == NULL) {
sc 161 dev/wscons/wsmux.c sc = wsmux_create("wsmux", n);
sc 162 dev/wscons/wsmux.c if (sc == NULL)
sc 164 dev/wscons/wsmux.c wsmuxdevs[n] = sc;
sc 166 dev/wscons/wsmux.c return (sc);
sc 175 dev/wscons/wsmux.c struct wsmux_softc *sc;
sc 180 dev/wscons/wsmux.c sc = wsmux_getmux(unit);
sc 181 dev/wscons/wsmux.c if (sc == NULL)
sc 184 dev/wscons/wsmux.c DPRINTF(("wsmuxopen: %s: sc=%p p=%p\n", sc->sc_base.me_dv.dv_xname, sc, p));
sc 191 dev/wscons/wsmux.c if (sc->sc_base.me_parent != NULL) {
sc 194 dev/wscons/wsmux.c wsmux_detach_sc(&sc->sc_base);
sc 197 dev/wscons/wsmux.c if (sc->sc_base.me_evp != NULL)
sc 201 dev/wscons/wsmux.c evar = &sc->sc_base.me_evar;
sc 205 dev/wscons/wsmux.c sc->sc_rawkbd = 0;
sc 208 dev/wscons/wsmux.c wsmux_do_open(sc, evar);
sc 219 dev/wscons/wsmux.c struct wsmux_softc *sc = (struct wsmux_softc *)me;
sc 222 dev/wscons/wsmux.c if (sc->sc_base.me_evp != NULL) {
sc 226 dev/wscons/wsmux.c if (sc->sc_base.me_parent == NULL) {
sc 232 dev/wscons/wsmux.c wsmux_do_open(sc, evar);
sc 239 dev/wscons/wsmux.c wsmux_do_open(struct wsmux_softc *sc, struct wseventvar *evar)
sc 246 dev/wscons/wsmux.c sc->sc_base.me_evp = evar; /* remember event variable, mark as open */
sc 249 dev/wscons/wsmux.c CIRCLEQ_FOREACH(me, &sc->sc_cld, me_next) {
sc 251 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, me, me->me_dv.dv_xname));
sc 257 dev/wscons/wsmux.c if (me->me_parent != sc) {
sc 278 dev/wscons/wsmux.c struct wsmux_softc *sc =
sc 280 dev/wscons/wsmux.c struct wseventvar *evar = sc->sc_base.me_evp;
sc 286 dev/wscons/wsmux.c wsmux_do_close(sc);
sc 287 dev/wscons/wsmux.c sc->sc_base.me_evp = NULL;
sc 305 dev/wscons/wsmux.c wsmux_do_close(struct wsmux_softc *sc)
sc 309 dev/wscons/wsmux.c DPRINTF(("wsmuxclose: %s: sc=%p\n", sc->sc_base.me_dv.dv_xname, sc));
sc 312 dev/wscons/wsmux.c CIRCLEQ_FOREACH(me, &sc->sc_cld, me_next) {
sc 314 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, me, me->me_dv.dv_xname));
sc 316 dev/wscons/wsmux.c if (me->me_parent != sc) {
sc 332 dev/wscons/wsmux.c struct wsmux_softc *sc = wsmuxdevs[minor(dev)];
sc 336 dev/wscons/wsmux.c evar = sc->sc_base.me_evp;
sc 346 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, evar));
sc 349 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, error));
sc 369 dev/wscons/wsmux.c struct wsmux_softc *sc = (struct wsmux_softc *)dv;
sc 378 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, sc, cmd));
sc 394 dev/wscons/wsmux.c DPRINTF(("%s: inject\n", sc->sc_base.me_dv.dv_xname));
sc 395 dev/wscons/wsmux.c evar = sc->sc_base.me_evp;
sc 421 dev/wscons/wsmux.c DPRINTF(("%s: add type=%d, no=%d\n", sc->sc_base.me_dv.dv_xname,
sc 426 dev/wscons/wsmux.c return (wsmouse_add_mux(d->idx, sc));
sc 430 dev/wscons/wsmux.c return (wskbd_add_mux(d->idx, sc));
sc 433 dev/wscons/wsmux.c return (wsmux_add_mux(d->idx, sc));
sc 438 dev/wscons/wsmux.c DPRINTF(("%s: rem type=%d, no=%d\n", sc->sc_base.me_dv.dv_xname,
sc 441 dev/wscons/wsmux.c CIRCLEQ_FOREACH(me, &sc->sc_cld, me_next) {
sc 453 dev/wscons/wsmux.c DPRINTF(("%s: list\n", sc->sc_base.me_dv.dv_xname));
sc 456 dev/wscons/wsmux.c CIRCLEQ_FOREACH(me, &sc->sc_cld, me_next) {
sc 467 dev/wscons/wsmux.c sc->sc_rawkbd = *(int *)data;
sc 468 dev/wscons/wsmux.c DPRINTF(("wsmux_do_ioctl: save rawkbd = %d\n", sc->sc_rawkbd));
sc 472 dev/wscons/wsmux.c DPRINTF(("%s: FIONBIO\n", sc->sc_base.me_dv.dv_xname));
sc 476 dev/wscons/wsmux.c DPRINTF(("%s: FIOASYNC\n", sc->sc_base.me_dv.dv_xname));
sc 477 dev/wscons/wsmux.c evar = sc->sc_base.me_evp;
sc 483 dev/wscons/wsmux.c DPRINTF(("%s: FIOSETOWN\n", sc->sc_base.me_dv.dv_xname));
sc 484 dev/wscons/wsmux.c evar = sc->sc_base.me_evp;
sc 492 dev/wscons/wsmux.c DPRINTF(("%s: TIOCSPGRP\n", sc->sc_base.me_dv.dv_xname));
sc 493 dev/wscons/wsmux.c evar = sc->sc_base.me_evp;
sc 500 dev/wscons/wsmux.c DPRINTF(("%s: unknown\n", sc->sc_base.me_dv.dv_xname));
sc 504 dev/wscons/wsmux.c if (sc->sc_base.me_evp == NULL
sc 506 dev/wscons/wsmux.c && sc->sc_displaydv == NULL
sc 514 dev/wscons/wsmux.c CIRCLEQ_FOREACH(me, &sc->sc_cld, me_next) {
sc 517 dev/wscons/wsmux.c if (me->me_parent != sc) {
sc 524 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, me, me->me_dv.dv_xname,
sc 532 dev/wscons/wsmux.c sc->sc_kbd_layout = *((kbd_t *)data);
sc 546 dev/wscons/wsmux.c struct wsmux_softc *sc = wsmuxdevs[minor(dev)];
sc 548 dev/wscons/wsmux.c if (sc->sc_base.me_evp == NULL) {
sc 555 dev/wscons/wsmux.c return (wsevent_poll(sc->sc_base.me_evp, events, p));
sc 564 dev/wscons/wsmux.c struct wsmux_softc *sc, *m;
sc 566 dev/wscons/wsmux.c sc = wsmux_getmux(unit);
sc 567 dev/wscons/wsmux.c if (sc == NULL)
sc 571 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, sc, muxsc->sc_base.me_dv.dv_xname,
sc 574 dev/wscons/wsmux.c if (sc->sc_base.me_parent != NULL || sc->sc_base.me_evp != NULL)
sc 579 dev/wscons/wsmux.c if (m == sc)
sc 582 dev/wscons/wsmux.c return (wsmux_attach_sc(muxsc, &sc->sc_base));
sc 589 dev/wscons/wsmux.c struct wsmux_softc *sc;
sc 592 dev/wscons/wsmux.c sc = malloc(sizeof *sc, M_DEVBUF, M_NOWAIT);
sc 593 dev/wscons/wsmux.c if (sc == NULL)
sc 595 dev/wscons/wsmux.c bzero(sc, sizeof *sc);
sc 596 dev/wscons/wsmux.c CIRCLEQ_INIT(&sc->sc_cld);
sc 597 dev/wscons/wsmux.c snprintf(sc->sc_base.me_dv.dv_xname, sizeof sc->sc_base.me_dv.dv_xname,
sc 599 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_unit = unit;
sc 600 dev/wscons/wsmux.c sc->sc_base.me_ops = &wsmux_srcops;
sc 601 dev/wscons/wsmux.c sc->sc_kbd_layout = KB_NONE;
sc 602 dev/wscons/wsmux.c return (sc);
sc 607 dev/wscons/wsmux.c wsmux_attach_sc(struct wsmux_softc *sc, struct wsevsrc *me)
sc 611 dev/wscons/wsmux.c if (sc == NULL)
sc 615 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, sc, me->me_ops->type));
sc 623 dev/wscons/wsmux.c me->me_parent = sc;
sc 624 dev/wscons/wsmux.c CIRCLEQ_INSERT_TAIL(&sc->sc_cld, me, me_next);
sc 628 dev/wscons/wsmux.c if (sc->sc_displaydv != NULL) {
sc 631 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, sc->sc_displaydv));
sc 633 dev/wscons/wsmux.c error = wsevsrc_set_display(me, sc->sc_displaydv);
sc 640 dev/wscons/wsmux.c me->me_dv.dv_xname, sc->sc_rawkbd));
sc 642 dev/wscons/wsmux.c &sc->sc_rawkbd, FWRITE, 0);
sc 644 dev/wscons/wsmux.c if (sc->sc_kbd_layout != KB_NONE)
sc 647 dev/wscons/wsmux.c &sc->sc_kbd_layout, FWRITE, 0);
sc 652 dev/wscons/wsmux.c if (sc->sc_base.me_evp != NULL) {
sc 655 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, me->me_dv.dv_xname));
sc 656 dev/wscons/wsmux.c error = wsevsrc_open(me, sc->sc_base.me_evp);
sc 659 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname));
sc 664 dev/wscons/wsmux.c CIRCLEQ_REMOVE(&sc->sc_cld, me, me_next);
sc 668 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, sc, error));
sc 676 dev/wscons/wsmux.c struct wsmux_softc *sc = me->me_parent;
sc 679 dev/wscons/wsmux.c me->me_dv.dv_xname, me, sc));
sc 682 dev/wscons/wsmux.c if (sc == NULL) {
sc 690 dev/wscons/wsmux.c if (sc->sc_displaydv != NULL) {
sc 702 dev/wscons/wsmux.c CIRCLEQ_REMOVE(&sc->sc_cld, me, me_next);
sc 705 dev/wscons/wsmux.c DPRINTF(("wsmux_detach_sc: done sc=%p\n", sc));
sc 715 dev/wscons/wsmux.c struct wsmux_softc *sc = (struct wsmux_softc *)dv;
sc 720 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, sc, cmd));
sc 724 dev/wscons/wsmux.c sc->sc_rawkbd = *(int *)data;
sc 725 dev/wscons/wsmux.c DPRINTF(("wsmux_displayioctl: rawkbd = %d\n", sc->sc_rawkbd));
sc 735 dev/wscons/wsmux.c CIRCLEQ_FOREACH(me, &sc->sc_cld, me_next) {
sc 738 dev/wscons/wsmux.c if (me->me_parent != sc) {
sc 764 dev/wscons/wsmux.c struct wsmux_softc *sc = (struct wsmux_softc *)dv;
sc 767 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, displaydv));
sc 770 dev/wscons/wsmux.c if (sc->sc_displaydv != NULL)
sc 773 dev/wscons/wsmux.c if (sc->sc_displaydv == NULL)
sc 777 dev/wscons/wsmux.c return wsmux_set_display(sc, displaydv);
sc 781 dev/wscons/wsmux.c wsmux_set_display(struct wsmux_softc *sc, struct device *displaydv)
sc 785 dev/wscons/wsmux.c struct wsmux_softc *nsc = displaydv ? sc : NULL;
sc 788 dev/wscons/wsmux.c odisplaydv = sc->sc_displaydv;
sc 789 dev/wscons/wsmux.c sc->sc_displaydv = displaydv;
sc 793 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, displaydv->dv_xname));
sc 797 dev/wscons/wsmux.c CIRCLEQ_FOREACH(me, &sc->sc_cld,me_next) {
sc 799 dev/wscons/wsmux.c if (me->me_parent != sc) {
sc 813 dev/wscons/wsmux.c me->me_dv.dv_xname, sc->sc_rawkbd));
sc 815 dev/wscons/wsmux.c &sc->sc_rawkbd, FWRITE, 0);
sc 825 dev/wscons/wsmux.c sc->sc_base.me_dv.dv_xname, odisplaydv->dv_xname));
sc 1642 net/bridgestp.c struct bridge_softc *sc;
sc 1650 net/bridgestp.c sc = (struct bridge_softc *)ifp->if_bridge;
sc 1653 net/bridgestp.c LIST_FOREACH(p, &sc->sc_iflist, next) {
sc 1659 net/bridgestp.c if (p == LIST_END(&sc->sc_iflist))
sc 2133 net/bridgestp.c struct bridge_softc *sc = (struct bridge_softc *)ifp;
sc 2134 net/bridgestp.c struct bstp_state *bs = sc->sc_stp;
sc 2150 net/bridgestp.c if ((caddr_t)sc != ifs->if_bridge) {
sc 2154 net/bridgestp.c LIST_FOREACH(p, &sc->sc_iflist, next) {
sc 2158 net/bridgestp.c if (p == LIST_END(&sc->sc_iflist)) {
sc 188 net/if_bridge.c struct bridge_softc *sc;
sc 192 net/if_bridge.c sc = malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT);
sc 193 net/if_bridge.c if (!sc)
sc 195 net/if_bridge.c bzero(sc, sizeof(*sc));
sc 197 net/if_bridge.c sc->sc_stp = bstp_create(&sc->sc_if);
sc 198 net/if_bridge.c if (!sc->sc_stp) {
sc 199 net/if_bridge.c free(sc, M_DEVBUF);
sc 203 net/if_bridge.c sc->sc_brtmax = BRIDGE_RTABLE_MAX;
sc 204 net/if_bridge.c sc->sc_brttimeout = BRIDGE_RTABLE_TIMEOUT;
sc 205 net/if_bridge.c timeout_set(&sc->sc_brtimeout, bridge_timer, sc);
sc 206 net/if_bridge.c LIST_INIT(&sc->sc_iflist);
sc 207 net/if_bridge.c LIST_INIT(&sc->sc_spanlist);
sc 209 net/if_bridge.c LIST_INIT(&sc->sc_rts[i]);
sc 210 net/if_bridge.c sc->sc_hashkey = arc4random();
sc 211 net/if_bridge.c ifp = &sc->sc_if;
sc 214 net/if_bridge.c ifp->if_softc = sc;
sc 228 net/if_bridge.c bpfattach(&sc->sc_if.if_bpf, ifp,
sc 233 net/if_bridge.c LIST_INSERT_HEAD(&bridge_list, sc, sc_list);
sc 242 net/if_bridge.c struct bridge_softc *sc = ifp->if_softc;
sc 246 net/if_bridge.c bridge_stop(sc);
sc 247 net/if_bridge.c bridge_rtflush(sc, IFBF_FLUSHALL);
sc 248 net/if_bridge.c while ((bif = LIST_FIRST(&sc->sc_iflist)) != NULL)
sc 249 net/if_bridge.c bridge_delete(sc, bif);
sc 250 net/if_bridge.c while ((bif = LIST_FIRST(&sc->sc_spanlist)) != NULL) {
sc 256 net/if_bridge.c LIST_REMOVE(sc, sc_list);
sc 259 net/if_bridge.c bstp_destroy(sc->sc_stp);
sc 262 net/if_bridge.c free(sc, M_DEVBUF);
sc 267 net/if_bridge.c bridge_delete(struct bridge_softc *sc, struct bridge_iflist *p)
sc 278 net/if_bridge.c bridge_rtdelete(sc, p->ifp, 0);
sc 288 net/if_bridge.c struct bridge_softc *sc = (struct bridge_softc *)ifp->if_softc;
sc 297 net/if_bridge.c struct bstp_state *bs = sc->sc_stp;
sc 311 net/if_bridge.c if (ifs->if_bridge == (caddr_t)sc) {
sc 321 net/if_bridge.c LIST_FOREACH(p, &sc->sc_spanlist, next)
sc 325 net/if_bridge.c if (p != LIST_END(&sc->sc_spanlist)) {
sc 391 net/if_bridge.c ifs->if_bridge = (caddr_t)sc;
sc 392 net/if_bridge.c LIST_INSERT_HEAD(&sc->sc_iflist, p, next);
sc 398 net/if_bridge.c LIST_FOREACH(p, &sc->sc_iflist, next) {
sc 401 net/if_bridge.c error = bridge_delete(sc, p);
sc 406 net/if_bridge.c if (p != NULL && p == LIST_END(&sc->sc_iflist)) {
sc 412 net/if_bridge.c error = bridge_bifconf(sc, (struct ifbifconf *)data);
sc 422 net/if_bridge.c if (ifs->if_bridge == (caddr_t)sc) {
sc 430 net/if_bridge.c LIST_FOREACH(p, &sc->sc_spanlist, next) {
sc 434 net/if_bridge.c if (p != LIST_END(&sc->sc_spanlist)) {
sc 449 net/if_bridge.c LIST_INSERT_HEAD(&sc->sc_spanlist, p, next);
sc 454 net/if_bridge.c LIST_FOREACH(p, &sc->sc_spanlist, next) {
sc 462 net/if_bridge.c if (p == LIST_END(&sc->sc_spanlist)) {
sc 473 net/if_bridge.c if ((caddr_t)sc != ifs->if_bridge) {
sc 477 net/if_bridge.c LIST_FOREACH(p, &sc->sc_iflist, next) {
sc 481 net/if_bridge.c if (p == LIST_END(&sc->sc_iflist)) {
sc 521 net/if_bridge.c if ((caddr_t)sc != ifs->if_bridge) {
sc 525 net/if_bridge.c LIST_FOREACH(p, &sc->sc_iflist, next) {
sc 529 net/if_bridge.c if (p == LIST_END(&sc->sc_iflist)) {
sc 540 net/if_bridge.c if ((p->bif_stp = bstp_add(sc->sc_stp,
sc 556 net/if_bridge.c error = bridge_rtfind(sc, (struct ifbaconf *)data);
sc 562 net/if_bridge.c error = bridge_rtflush(sc, req->ifbr_ifsflags);
sc 575 net/if_bridge.c ifs->if_bridge != (caddr_t)sc) {
sc 580 net/if_bridge.c ifs = bridge_rtupdate(sc, &bareq->ifba_dst, ifs, 1,
sc 588 net/if_bridge.c error = bridge_rtdaddr(sc, &bareq->ifba_dst);
sc 591 net/if_bridge.c bparam->ifbrp_csize = sc->sc_brtmax;
sc 596 net/if_bridge.c sc->sc_brtmax = bparam->ifbrp_csize;
sc 597 net/if_bridge.c bridge_rttrim(sc);
sc 607 net/if_bridge.c sc->sc_brttimeout = bparam->ifbrp_ctime;
sc 608 net/if_bridge.c timeout_del(&sc->sc_brtimeout);
sc 610 net/if_bridge.c timeout_add(&sc->sc_brtimeout, sc->sc_brttimeout * hz);
sc 613 net/if_bridge.c bparam->ifbrp_ctime = sc->sc_brttimeout;
sc 617 net/if_bridge.c bridge_init(sc);
sc 620 net/if_bridge.c bridge_stop(sc);
sc 632 net/if_bridge.c ifs->if_bridge != (caddr_t)sc) {
sc 636 net/if_bridge.c LIST_FOREACH(p, &sc->sc_iflist, next) {
sc 640 net/if_bridge.c if (p == LIST_END(&sc->sc_iflist)) {
sc 670 net/if_bridge.c ifs->if_bridge != (caddr_t)sc) {
sc 674 net/if_bridge.c LIST_FOREACH(p, &sc->sc_iflist, next) {
sc 678 net/if_bridge.c if (p == LIST_END(&sc->sc_iflist)) {
sc 685 net/if_bridge.c error = bridge_brlconf(sc, (struct ifbrlconf *)data);
sc 736 net/if_bridge.c struct bridge_softc *sc = (struct bridge_softc *)ifp->if_bridge;
sc 739 net/if_bridge.c LIST_FOREACH(bif, &sc->sc_iflist, next)
sc 742 net/if_bridge.c bridge_rtdelete(sc, ifp, 0);
sc 753 net/if_bridge.c struct bridge_softc *sc = (struct bridge_softc *)ifp->if_bridge;
sc 759 net/if_bridge.c LIST_FOREACH(bif, &sc->sc_iflist, next)
sc 775 net/if_bridge.c bridge_rtdaddr(sc, ea);
sc 779 net/if_bridge.c bridge_rtupdate(sc, ea, ifp, 0,
sc 788 net/if_bridge.c bridge_bifconf(struct bridge_softc *sc, struct ifbifconf *bifc)
sc 792 net/if_bridge.c struct bstp_state *bs = sc->sc_stp;
sc 797 net/if_bridge.c LIST_FOREACH(p, &sc->sc_iflist, next)
sc 800 net/if_bridge.c LIST_FOREACH(p, &sc->sc_spanlist, next)
sc 812 net/if_bridge.c LIST_FOREACH(p, &sc->sc_iflist, next) {
sc 816 net/if_bridge.c strlcpy(breq->ifbr_name, sc->sc_if.if_xname, IFNAMSIZ);
sc 822 net/if_bridge.c breq->ifbr_state = bstp_getstate(sc->sc_stp, bp);
sc 852 net/if_bridge.c LIST_FOREACH(p, &sc->sc_spanlist, next) {
sc 856 net/if_bridge.c strlcpy(breq->ifbr_name, sc->sc_if.if_xname, IFNAMSIZ);
sc 876 net/if_bridge.c bridge_brlconf(struct bridge_softc *sc, struct ifbrlconf *bc)
sc 888 net/if_bridge.c if (ifp->if_bridge == NULL || ifp->if_bridge != (caddr_t)sc)
sc 890 net/if_bridge.c LIST_FOREACH(ifl, &sc->sc_iflist, next) {
sc 894 net/if_bridge.c if (ifl == LIST_END(&sc->sc_iflist))
sc 913 net/if_bridge.c strlcpy(req.ifbr_name, sc->sc_if.if_xname, IFNAMSIZ);
sc 936 net/if_bridge.c strlcpy(req.ifbr_name, sc->sc_if.if_xname, IFNAMSIZ);
sc 961 net/if_bridge.c bridge_init(struct bridge_softc *sc)
sc 963 net/if_bridge.c struct ifnet *ifp = &sc->sc_if;
sc 969 net/if_bridge.c bstp_initialization(sc->sc_stp);
sc 971 net/if_bridge.c if (sc->sc_brttimeout != 0)
sc 972 net/if_bridge.c timeout_add(&sc->sc_brtimeout, sc->sc_brttimeout * hz);
sc 979 net/if_bridge.c bridge_stop(struct bridge_softc *sc)
sc 981 net/if_bridge.c struct ifnet *ifp = &sc->sc_if;
sc 989 net/if_bridge.c timeout_del(&sc->sc_brtimeout);
sc 991 net/if_bridge.c bridge_rtflush(sc, IFBF_FLUSHDYN);
sc 1007 net/if_bridge.c struct bridge_softc *sc;
sc 1014 net/if_bridge.c sc = (struct bridge_softc *)ifp->if_bridge;
sc 1015 net/if_bridge.c if (sc == NULL) {
sc 1036 net/if_bridge.c if ((sc->sc_if.if_flags & IFF_RUNNING) == 0) {
sc 1045 net/if_bridge.c dst_if = bridge_rtlookup(sc, dst);
sc 1074 net/if_bridge.c bridge_span(sc, NULL, m);
sc 1076 net/if_bridge.c LIST_FOREACH(p, &sc->sc_iflist, next) {
sc 1101 net/if_bridge.c sc->sc_if.if_oerrors++;
sc 1104 net/if_bridge.c if (LIST_NEXT(p, next) == LIST_END(&sc->sc_iflist)) {
sc 1113 net/if_bridge.c sc->sc_if.if_oerrors++;
sc 1120 net/if_bridge.c sc->sc_if.if_oerrors++;
sc 1137 net/if_bridge.c error = bridge_ifenqueue(sc, dst_if, mc);
sc 1148 net/if_bridge.c bridge_span(sc, NULL, m);
sc 1154 net/if_bridge.c bridge_ifenqueue(sc, dst_if, m);
sc 1173 net/if_bridge.c struct bridge_softc *sc;
sc 1177 net/if_bridge.c LIST_FOREACH(sc, &bridge_list, sc_list) {
sc 1178 net/if_bridge.c while (sc->sc_if.if_snd.ifq_head) {
sc 1180 net/if_bridge.c IF_DEQUEUE(&sc->sc_if.if_snd, m);
sc 1184 net/if_bridge.c bridgeintr_frame(sc, m);
sc 1193 net/if_bridge.c bridgeintr_frame(struct bridge_softc *sc, struct mbuf *m)
sc 1201 net/if_bridge.c if ((sc->sc_if.if_flags & IFF_RUNNING) == 0) {
sc 1209 net/if_bridge.c if (sc->sc_if.if_bpf)
sc 1210 net/if_bridge.c bpf_mtap(sc->sc_if.if_bpf, m, BPF_DIRECTION_IN);
sc 1213 net/if_bridge.c sc->sc_if.if_ipackets++;
sc 1214 net/if_bridge.c sc->sc_if.if_ibytes += m->m_pkthdr.len;
sc 1216 net/if_bridge.c LIST_FOREACH(ifl, &sc->sc_iflist, next)
sc 1220 net/if_bridge.c if (ifl == LIST_END(&sc->sc_iflist)) {
sc 1248 net/if_bridge.c bridge_rtupdate(sc, src, src_if, 0, IFBAF_DYNAMIC);
sc 1266 net/if_bridge.c dst_if = bridge_rtlookup(sc, dst);
sc 1286 net/if_bridge.c if ((sc->sc_if.if_flags &
sc 1292 net/if_bridge.c if (sc->sc_if.if_flags & IFF_LINK0 &&
sc 1297 net/if_bridge.c if (sc->sc_if.if_flags & IFF_LINK1 &&
sc 1314 net/if_bridge.c m = bridge_filter(sc, BRIDGE_IN, src_if, &eh, m);
sc 1323 net/if_bridge.c sc->sc_if.if_imcasts++;
sc 1325 net/if_bridge.c bridge_broadcast(sc, src_if, &eh, m);
sc 1338 net/if_bridge.c LIST_FOREACH(ifl, &sc->sc_iflist, next) {
sc 1342 net/if_bridge.c if (ifl == LIST_END(&sc->sc_iflist)) {
sc 1356 net/if_bridge.c m = bridge_filter(sc, BRIDGE_OUT, dst_if, &eh, m);
sc 1363 net/if_bridge.c bridge_fragment(sc, dst_if, &eh, m);
sc 1366 net/if_bridge.c bridge_ifenqueue(sc, dst_if, m);
sc 1378 net/if_bridge.c struct bridge_softc *sc;
sc 1395 net/if_bridge.c sc = (struct bridge_softc *)ifp->if_bridge;
sc 1396 net/if_bridge.c if ((sc->sc_if.if_flags & IFF_RUNNING) == 0)
sc 1399 net/if_bridge.c LIST_FOREACH(ifl, &sc->sc_iflist, next) {
sc 1403 net/if_bridge.c if (ifl == LIST_END(&sc->sc_iflist))
sc 1406 net/if_bridge.c bridge_span(sc, eh, m);
sc 1411 net/if_bridge.c m = bstp_input(sc->sc_stp, ifl->bif_stp, eh, m);
sc 1436 net/if_bridge.c if (IF_QFULL(&sc->sc_if.if_snd)) {
sc 1441 net/if_bridge.c IF_ENQUEUE(&sc->sc_if.if_snd, mc);
sc 1445 net/if_bridge.c LIST_FOREACH(ifl, &sc->sc_iflist, next) {
sc 1449 net/if_bridge.c if (ifl != LIST_END(&sc->sc_iflist)) {
sc 1470 net/if_bridge.c LIST_FOREACH(ifl, &sc->sc_iflist, next) {
sc 1481 net/if_bridge.c bridge_rtupdate(sc,
sc 1512 net/if_bridge.c if (IF_QFULL(&sc->sc_if.if_snd)) {
sc 1517 net/if_bridge.c IF_ENQUEUE(&sc->sc_if.if_snd, m);
sc 1529 net/if_bridge.c bridge_broadcast(struct bridge_softc *sc, struct ifnet *ifp,
sc 1539 net/if_bridge.c LIST_FOREACH(p, &sc->sc_iflist, next) {
sc 1564 net/if_bridge.c sc->sc_if.if_oerrors++;
sc 1577 net/if_bridge.c if (LIST_NEXT(p, next) == LIST_END(&sc->sc_iflist)) {
sc 1586 net/if_bridge.c sc->sc_if.if_oerrors++;
sc 1593 net/if_bridge.c sc->sc_if.if_oerrors++;
sc 1612 net/if_bridge.c mc = bridge_filter(sc, BRIDGE_OUT, dst_if, eh, mc);
sc 1618 net/if_bridge.c bridge_fragment(sc, dst_if, eh, mc);
sc 1620 net/if_bridge.c bridge_ifenqueue(sc, dst_if, mc);
sc 1629 net/if_bridge.c bridge_span(struct bridge_softc *sc, struct ether_header *eh,
sc 1637 net/if_bridge.c if (LIST_EMPTY(&sc->sc_spanlist))
sc 1650 net/if_bridge.c LIST_FOREACH(p, &sc->sc_spanlist, next) {
sc 1661 net/if_bridge.c sc->sc_if.if_oerrors++;
sc 1667 net/if_bridge.c sc->sc_if.if_oerrors++;
sc 1671 net/if_bridge.c error = bridge_ifenqueue(sc, ifp, mc);
sc 1679 net/if_bridge.c bridge_rtupdate(struct bridge_softc *sc, struct ether_addr *ea,
sc 1686 net/if_bridge.c h = bridge_hash(sc, ea);
sc 1687 net/if_bridge.c p = LIST_FIRST(&sc->sc_rts[h]);
sc 1688 net/if_bridge.c if (p == LIST_END(&sc->sc_rts[h])) {
sc 1689 net/if_bridge.c if (sc->sc_brtcnt >= sc->sc_brtmax)
sc 1705 net/if_bridge.c LIST_INSERT_HEAD(&sc->sc_rts[h], p, brt_next);
sc 1706 net/if_bridge.c sc->sc_brtcnt++;
sc 1729 net/if_bridge.c if (sc->sc_brtcnt >= sc->sc_brtmax)
sc 1746 net/if_bridge.c sc->sc_brtcnt++;
sc 1750 net/if_bridge.c if (p == LIST_END(&sc->sc_rts[h])) {
sc 1751 net/if_bridge.c if (sc->sc_brtcnt >= sc->sc_brtmax)
sc 1767 net/if_bridge.c sc->sc_brtcnt++;
sc 1770 net/if_bridge.c } while (p != LIST_END(&sc->sc_rts[h]));
sc 1779 net/if_bridge.c bridge_rtlookup(struct bridge_softc *sc, struct ether_addr *ea)
sc 1785 net/if_bridge.c h = bridge_hash(sc, ea);
sc 1786 net/if_bridge.c LIST_FOREACH(p, &sc->sc_rts[h], brt_next) {
sc 1817 net/if_bridge.c bridge_hash(struct bridge_softc *sc, struct ether_addr *addr)
sc 1819 net/if_bridge.c u_int32_t a = 0x9e3779b9, b = 0x9e3779b9, c = sc->sc_hashkey;
sc 1837 net/if_bridge.c bridge_rttrim(struct bridge_softc *sc)
sc 1845 net/if_bridge.c if (sc->sc_brtcnt <= sc->sc_brtmax)
sc 1851 net/if_bridge.c bridge_rtage(sc);
sc 1853 net/if_bridge.c if (sc->sc_brtcnt <= sc->sc_brtmax)
sc 1857 net/if_bridge.c n = LIST_FIRST(&sc->sc_rts[i]);
sc 1858 net/if_bridge.c while (n != LIST_END(&sc->sc_rts[i])) {
sc 1862 net/if_bridge.c sc->sc_brtcnt--;
sc 1865 net/if_bridge.c if (sc->sc_brtcnt <= sc->sc_brtmax)
sc 1875 net/if_bridge.c struct bridge_softc *sc = vsc;
sc 1879 net/if_bridge.c bridge_rtage(sc);
sc 1887 net/if_bridge.c bridge_rtage(struct bridge_softc *sc)
sc 1893 net/if_bridge.c n = LIST_FIRST(&sc->sc_rts[i]);
sc 1894 net/if_bridge.c while (n != LIST_END(&sc->sc_rts[i])) {
sc 1906 net/if_bridge.c sc->sc_brtcnt--;
sc 1913 net/if_bridge.c if (sc->sc_brttimeout != 0)
sc 1914 net/if_bridge.c timeout_add(&sc->sc_brtimeout, sc->sc_brttimeout * hz);
sc 1920 net/if_bridge.c struct bridge_softc *sc = (struct bridge_softc *)ifp->if_bridge;
sc 1924 net/if_bridge.c if (sc == NULL)
sc 1932 net/if_bridge.c bridge_rtdelete(sc, ifp, 1);
sc 1935 net/if_bridge.c n = LIST_FIRST(&sc->sc_rts[i]);
sc 1936 net/if_bridge.c while (n != LIST_END(&sc->sc_rts[i])) {
sc 1953 net/if_bridge.c bridge_rtflush(struct bridge_softc *sc, int full)
sc 1959 net/if_bridge.c n = LIST_FIRST(&sc->sc_rts[i]);
sc 1960 net/if_bridge.c while (n != LIST_END(&sc->sc_rts[i])) {
sc 1965 net/if_bridge.c sc->sc_brtcnt--;
sc 1980 net/if_bridge.c bridge_rtdaddr(struct bridge_softc *sc, struct ether_addr *ea)
sc 1985 net/if_bridge.c h = bridge_hash(sc, ea);
sc 1986 net/if_bridge.c LIST_FOREACH(p, &sc->sc_rts[h], brt_next) {
sc 1989 net/if_bridge.c sc->sc_brtcnt--;
sc 2001 net/if_bridge.c bridge_rtdelete(struct bridge_softc *sc, struct ifnet *ifp, int dynonly)
sc 2011 net/if_bridge.c n = LIST_FIRST(&sc->sc_rts[i]);
sc 2012 net/if_bridge.c while (n != LIST_END(&sc->sc_rts[i])) {
sc 2026 net/if_bridge.c sc->sc_brtcnt--;
sc 2037 net/if_bridge.c bridge_rtfind(struct bridge_softc *sc, struct ifbaconf *baconf)
sc 2048 net/if_bridge.c LIST_FOREACH(n, &sc->sc_rts[i], brt_next) {
sc 2052 net/if_bridge.c bcopy(sc->sc_if.if_xname, bareq.ifba_name,
sc 2214 net/if_bridge.c bridge_ipsec(struct bridge_softc *sc, struct ifnet *ifp,
sc 2392 net/if_bridge.c bridge_send_icmp_err(sc, ifp, eh, m,
sc 2414 net/if_bridge.c bridge_filter(struct bridge_softc *sc, int dir, struct ifnet *ifp,
sc 2504 net/if_bridge.c if ((sc->sc_if.if_flags & IFF_LINK2) == IFF_LINK2 &&
sc 2505 net/if_bridge.c bridge_ipsec(sc, ifp, eh, hassnap, &llc,
sc 2551 net/if_bridge.c if ((sc->sc_if.if_flags & IFF_LINK2) == IFF_LINK2 &&
sc 2552 net/if_bridge.c bridge_ipsec(sc, ifp, eh, hassnap, &llc,
sc 2595 net/if_bridge.c bridge_fragment(struct bridge_softc *sc, struct ifnet *ifp,
sc 2616 net/if_bridge.c bridge_ifenqueue(sc, ifp, m);
sc 2652 net/if_bridge.c bridge_send_icmp_err(sc, ifp, eh, m, hassnap, &llc,
sc 2684 net/if_bridge.c error = bridge_ifenqueue(sc, ifp, m);
sc 2705 net/if_bridge.c bridge_ifenqueue(struct bridge_softc *sc, struct ifnet *ifp, struct mbuf *m)
sc 2719 net/if_bridge.c sc->sc_if.if_oerrors++;
sc 2722 net/if_bridge.c sc->sc_if.if_opackets++;
sc 2723 net/if_bridge.c sc->sc_if.if_obytes += len;
sc 2735 net/if_bridge.c bridge_send_icmp_err(struct bridge_softc *sc, struct ifnet *ifp,
sc 92 net/if_gif.c struct gif_softc *sc;
sc 95 net/if_gif.c sc = malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT);
sc 96 net/if_gif.c if (!sc)
sc 98 net/if_gif.c bzero(sc, sizeof(*sc));
sc 100 net/if_gif.c snprintf(sc->gif_if.if_xname, sizeof sc->gif_if.if_xname,
sc 102 net/if_gif.c sc->gif_if.if_mtu = GIF_MTU;
sc 103 net/if_gif.c sc->gif_if.if_flags = IFF_POINTOPOINT | IFF_MULTICAST;
sc 104 net/if_gif.c sc->gif_if.if_ioctl = gif_ioctl;
sc 105 net/if_gif.c sc->gif_if.if_start = gif_start;
sc 106 net/if_gif.c sc->gif_if.if_output = gif_output;
sc 107 net/if_gif.c sc->gif_if.if_type = IFT_GIF;
sc 108 net/if_gif.c IFQ_SET_MAXLEN(&sc->gif_if.if_snd, ifqmaxlen);
sc 109 net/if_gif.c IFQ_SET_READY(&sc->gif_if.if_snd);
sc 110 net/if_gif.c sc->gif_if.if_softc = sc;
sc 111 net/if_gif.c if_attach(&sc->gif_if);
sc 112 net/if_gif.c if_alloc_sadl(&sc->gif_if);
sc 115 net/if_gif.c bpfattach(&sc->gif_if.if_bpf, &sc->gif_if, DLT_NULL,
sc 119 net/if_gif.c LIST_INSERT_HEAD(&gif_softc_list, sc, gif_list);
sc 129 net/if_gif.c struct gif_softc *sc = ifp->if_softc;
sc 133 net/if_gif.c LIST_REMOVE(sc, gif_list);
sc 138 net/if_gif.c if (sc->gif_psrc)
sc 139 net/if_gif.c free((caddr_t)sc->gif_psrc, M_IFADDR);
sc 140 net/if_gif.c sc->gif_psrc = NULL;
sc 141 net/if_gif.c if (sc->gif_pdst)
sc 142 net/if_gif.c free((caddr_t)sc->gif_pdst, M_IFADDR);
sc 143 net/if_gif.c sc->gif_pdst = NULL;
sc 144 net/if_gif.c free(sc, M_DEVBUF);
sc 152 net/if_gif.c struct gif_softc *sc = (struct gif_softc*)ifp;
sc 161 net/if_gif.c sc->gif_psrc == NULL || sc->gif_pdst == NULL)
sc 166 net/if_gif.c if (sc->gif_psrc->sa_family != AF_INET)
sc 169 net/if_gif.c if (sc->gif_psrc->sa_family != AF_INET6)
sc 248 net/if_gif.c switch (sc->gif_psrc->sa_family) {
sc 275 net/if_gif.c struct gif_softc *sc = (struct gif_softc*)ifp;
sc 280 net/if_gif.c sc->gif_psrc == NULL || sc->gif_pdst == NULL) {
sc 286 net/if_gif.c switch (sc->gif_psrc->sa_family) {
sc 329 net/if_gif.c struct gif_softc *sc = (struct gif_softc*)ifp;
sc 449 net/if_gif.c if (sc2 == sc)
sc 486 net/if_gif.c if (sc->gif_psrc)
sc 487 net/if_gif.c free((caddr_t)sc->gif_psrc, M_IFADDR);
sc 490 net/if_gif.c sc->gif_psrc = sa;
sc 492 net/if_gif.c if (sc->gif_pdst)
sc 493 net/if_gif.c free((caddr_t)sc->gif_pdst, M_IFADDR);
sc 496 net/if_gif.c sc->gif_pdst = sa;
sc 508 net/if_gif.c if (sc->gif_psrc) {
sc 509 net/if_gif.c free((caddr_t)sc->gif_psrc, M_IFADDR);
sc 510 net/if_gif.c sc->gif_psrc = NULL;
sc 512 net/if_gif.c if (sc->gif_pdst) {
sc 513 net/if_gif.c free((caddr_t)sc->gif_pdst, M_IFADDR);
sc 514 net/if_gif.c sc->gif_pdst = NULL;
sc 524 net/if_gif.c if (sc->gif_psrc == NULL) {
sc 528 net/if_gif.c src = sc->gif_psrc;
sc 556 net/if_gif.c if (sc->gif_pdst == NULL) {
sc 560 net/if_gif.c src = sc->gif_pdst;
sc 585 net/if_gif.c if (sc->gif_psrc == NULL || sc->gif_pdst == NULL) {
sc 591 net/if_gif.c src = sc->gif_psrc;
sc 600 net/if_gif.c src = sc->gif_pdst;
sc 120 net/if_gre.c static void gre_compute_route(struct gre_softc *sc);
sc 132 net/if_gre.c struct gre_softc *sc;
sc 135 net/if_gre.c sc = malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT);
sc 136 net/if_gre.c if (!sc)
sc 138 net/if_gre.c bzero(sc, sizeof(*sc));
sc 139 net/if_gre.c snprintf(sc->sc_if.if_xname, sizeof sc->sc_if.if_xname, "%s%d",
sc 141 net/if_gre.c sc->sc_if.if_softc = sc;
sc 142 net/if_gre.c sc->sc_if.if_type = IFT_TUNNEL;
sc 143 net/if_gre.c sc->sc_if.if_addrlen = 0;
sc 144 net/if_gre.c sc->sc_if.if_hdrlen = 24; /* IP + GRE */
sc 145 net/if_gre.c sc->sc_if.if_mtu = GREMTU;
sc 146 net/if_gre.c sc->sc_if.if_flags = IFF_POINTOPOINT|IFF_MULTICAST;
sc 147 net/if_gre.c sc->sc_if.if_output = gre_output;
sc 148 net/if_gre.c sc->sc_if.if_ioctl = gre_ioctl;
sc 149 net/if_gre.c sc->sc_if.if_collisions = 0;
sc 150 net/if_gre.c sc->sc_if.if_ierrors = 0;
sc 151 net/if_gre.c sc->sc_if.if_oerrors = 0;
sc 152 net/if_gre.c sc->sc_if.if_ipackets = 0;
sc 153 net/if_gre.c sc->sc_if.if_opackets = 0;
sc 154 net/if_gre.c sc->g_dst.s_addr = sc->g_src.s_addr = INADDR_ANY;
sc 155 net/if_gre.c sc->g_proto = IPPROTO_GRE;
sc 156 net/if_gre.c sc->sc_if.if_flags |= IFF_LINK0;
sc 158 net/if_gre.c if_attach(&sc->sc_if);
sc 159 net/if_gre.c if_alloc_sadl(&sc->sc_if);
sc 162 net/if_gre.c bpfattach(&sc->sc_if.if_bpf, &sc->sc_if, DLT_NULL,
sc 166 net/if_gre.c LIST_INSERT_HEAD(&gre_softc_list, sc, sc_list);
sc 175 net/if_gre.c struct gre_softc *sc = ifp->if_softc;
sc 179 net/if_gre.c LIST_REMOVE(sc, sc_list);
sc 184 net/if_gre.c free(sc, M_DEVBUF);
sc 198 net/if_gre.c struct gre_softc *sc = (struct gre_softc *) (ifp->if_softc);
sc 207 net/if_gre.c sc->g_src.s_addr == INADDR_ANY || sc->g_dst.s_addr == INADDR_ANY) {
sc 241 net/if_gre.c if (sc->g_proto == IPPROTO_MOBILE) {
sc 281 net/if_gre.c inp->ip_dst.s_addr = sc->g_dst.s_addr;
sc 288 net/if_gre.c if (inp->ip_src.s_addr == sc->g_src.s_addr) {
sc 293 net/if_gre.c inp->ip_src.s_addr = sc->g_src.s_addr;
sc 341 net/if_gre.c } else if (sc->g_proto == IPPROTO_GRE) {
sc 396 net/if_gre.c if (sc->g_proto == IPPROTO_GRE) {
sc 403 net/if_gre.c gh->gi_pr = sc->g_proto;
sc 404 net/if_gre.c if (sc->g_proto != IPPROTO_MOBILE) {
sc 405 net/if_gre.c gh->gi_src = sc->g_src;
sc 406 net/if_gre.c gh->gi_dst = sc->g_dst;
sc 417 net/if_gre.c error = ip_output(m, (void *)NULL, &sc->route, 0, (void *)NULL, (void *)NULL);
sc 430 net/if_gre.c struct gre_softc *sc = ifp->if_softc;
sc 446 net/if_gre.c sc->g_proto = IPPROTO_GRE;
sc 448 net/if_gre.c sc->g_proto = IPPROTO_MOBILE;
sc 458 net/if_gre.c ifr->ifr_mtu = sc->sc_if.if_mtu;
sc 485 net/if_gre.c sc->g_proto = ifr->ifr_flags;
sc 486 net/if_gre.c switch (sc->g_proto) {
sc 499 net/if_gre.c ifr->ifr_flags = sc->g_proto;
sc 513 net/if_gre.c sc->g_src = (satosin(sa))->sin_addr;
sc 515 net/if_gre.c sc->g_dst = (satosin(sa))->sin_addr;
sc 517 net/if_gre.c if ((sc->g_src.s_addr != INADDR_ANY) &&
sc 518 net/if_gre.c (sc->g_dst.s_addr != INADDR_ANY)) {
sc 519 net/if_gre.c if (sc->route.ro_rt != 0) {
sc 521 net/if_gre.c RTFREE(sc->route.ro_rt);
sc 522 net/if_gre.c sc->route.ro_rt = (struct rtentry *) 0;
sc 524 net/if_gre.c gre_compute_route(sc);
sc 532 net/if_gre.c si.sin_addr.s_addr = sc->g_src.s_addr;
sc 540 net/if_gre.c si.sin_addr.s_addr = sc->g_dst.s_addr;
sc 557 net/if_gre.c sc->g_src = (satosin((struct sockadrr *)&lifr->addr))->sin_addr;
sc 558 net/if_gre.c sc->g_dst =
sc 564 net/if_gre.c sc->g_src.s_addr = INADDR_ANY;
sc 565 net/if_gre.c sc->g_dst.s_addr = INADDR_ANY;
sc 568 net/if_gre.c if (sc->g_src.s_addr == INADDR_ANY ||
sc 569 net/if_gre.c sc->g_dst.s_addr == INADDR_ANY) {
sc 576 net/if_gre.c si.sin_addr.s_addr = sc->g_src.s_addr;
sc 578 net/if_gre.c si.sin_addr.s_addr = sc->g_dst.s_addr;
sc 602 net/if_gre.c gre_compute_route(struct gre_softc *sc)
sc 607 net/if_gre.c ro = &sc->route;
sc 610 net/if_gre.c ((struct sockaddr_in *) &ro->ro_dst)->sin_addr = sc->g_dst;
sc 620 net/if_gre.c if ((sc->sc_if.if_flags & IFF_LINK1) == 0) {
sc 621 net/if_gre.c a = ntohl(sc->g_dst.s_addr);
sc 638 net/if_gre.c if (ro->ro_rt->rt_ifp == &sc->sc_if) {
sc 648 net/if_gre.c if ((sc->sc_if.if_flags & IFF_LINK1) == 0)
sc 649 net/if_gre.c ((struct sockaddr_in *) &ro->ro_dst)->sin_addr = sc->g_dst;
sc 328 net/if_pfsync.c struct pfsync_softc *sc = pfsyncif;
sc 349 net/if_pfsync.c if (!sc || !sc->sc_sync_ifp || !pf_status.running)
sc 353 net/if_pfsync.c if (sc->sc_sync_ifp != m->m_pkthdr.rcvif) {
sc 566 net/if_pfsync.c if (sc->sc_mbuf != NULL && !stale)
sc 567 net/if_pfsync.c pfsync_sendout(sc);
sc 581 net/if_pfsync.c if (stale && sc->sc_mbuf != NULL)
sc 582 net/if_pfsync.c pfsync_sendout(sc);
sc 692 net/if_pfsync.c sc->sc_mbuf != NULL) {
sc 693 net/if_pfsync.c pfsync_sendout(sc);
sc 708 net/if_pfsync.c if ((update_requested || stale) && sc->sc_mbuf)
sc 709 net/if_pfsync.c pfsync_sendout(sc);
sc 748 net/if_pfsync.c if (sc->sc_mbuf != NULL)
sc 749 net/if_pfsync.c pfsync_sendout(sc);
sc 757 net/if_pfsync.c sc->sc_ureq_received = time_uptime;
sc 758 net/if_pfsync.c if (sc->sc_bulk_send_next == NULL)
sc 759 net/if_pfsync.c sc->sc_bulk_send_next =
sc 761 net/if_pfsync.c sc->sc_bulk_terminator = sc->sc_bulk_send_next;
sc 765 net/if_pfsync.c pfsync_send_bus(sc, PFSYNC_BUS_START);
sc 766 net/if_pfsync.c timeout_add(&sc->sc_bulk_tmo, 1 * hz);
sc 778 net/if_pfsync.c if (sc->sc_mbuf != NULL)
sc 779 net/if_pfsync.c pfsync_sendout(sc);
sc 784 net/if_pfsync.c if (sc->sc_ureq_sent == 0)
sc 795 net/if_pfsync.c timeout_add(&sc->sc_bulkfail_tmo,
sc 797 net/if_pfsync.c (PFSYNC_BULKPACKETS * sc->sc_maxcount));
sc 804 net/if_pfsync.c sc->sc_ureq_sent) {
sc 806 net/if_pfsync.c sc->sc_ureq_sent = 0;
sc 807 net/if_pfsync.c sc->sc_bulk_tries = 0;
sc 808 net/if_pfsync.c timeout_del(&sc->sc_bulkfail_tmo);
sc 811 net/if_pfsync.c carp_group_demote_adj(&sc->sc_if, -1);
sc 859 net/if_pfsync.c struct pfsync_softc *sc = ifp->if_softc;
sc 861 net/if_pfsync.c struct ip_moptions *imo = &sc->sc_imo;
sc 883 net/if_pfsync.c pfsync_sendout(sc);
sc 884 net/if_pfsync.c pfsync_setmtu(sc, ifr->ifr_mtu);
sc 889 net/if_pfsync.c if (sc->sc_sync_ifp)
sc 891 net/if_pfsync.c sc->sc_sync_ifp->if_xname, IFNAMSIZ);
sc 892 net/if_pfsync.c pfsyncr.pfsyncr_syncpeer = sc->sc_sync_peer;
sc 893 net/if_pfsync.c pfsyncr.pfsyncr_maxupdates = sc->sc_maxupdates;
sc 904 net/if_pfsync.c sc->sc_sync_peer.s_addr = INADDR_PFSYNC_GROUP;
sc 906 net/if_pfsync.c sc->sc_sync_peer.s_addr =
sc 911 net/if_pfsync.c sc->sc_maxupdates = pfsyncr.pfsyncr_maxupdates;
sc 914 net/if_pfsync.c sc->sc_sync_ifp = NULL;
sc 915 net/if_pfsync.c if (sc->sc_mbuf_net != NULL) {
sc 918 net/if_pfsync.c m_freem(sc->sc_mbuf_net);
sc 919 net/if_pfsync.c sc->sc_mbuf_net = NULL;
sc 920 net/if_pfsync.c sc->sc_statep_net.s = NULL;
sc 934 net/if_pfsync.c if (sifp->if_mtu < sc->sc_if.if_mtu ||
sc 935 net/if_pfsync.c (sc->sc_sync_ifp != NULL &&
sc 936 net/if_pfsync.c sifp->if_mtu < sc->sc_sync_ifp->if_mtu) ||
sc 938 net/if_pfsync.c pfsync_sendout(sc);
sc 939 net/if_pfsync.c sc->sc_sync_ifp = sifp;
sc 941 net/if_pfsync.c pfsync_setmtu(sc, sc->sc_if.if_mtu);
sc 948 net/if_pfsync.c if (sc->sc_sync_ifp &&
sc 949 net/if_pfsync.c sc->sc_sync_peer.s_addr == INADDR_PFSYNC_GROUP) {
sc 952 net/if_pfsync.c if (!(sc->sc_sync_ifp->if_flags & IFF_MULTICAST)) {
sc 953 net/if_pfsync.c sc->sc_sync_ifp = NULL;
sc 961 net/if_pfsync.c in_addmulti(&addr, sc->sc_sync_ifp)) == NULL) {
sc 962 net/if_pfsync.c sc->sc_sync_ifp = NULL;
sc 967 net/if_pfsync.c imo->imo_multicast_ifp = sc->sc_sync_ifp;
sc 972 net/if_pfsync.c if (sc->sc_sync_ifp ||
sc 973 net/if_pfsync.c sc->sc_sendaddr.s_addr != INADDR_PFSYNC_GROUP) {
sc 975 net/if_pfsync.c sc->sc_ureq_sent = time_uptime;
sc 978 net/if_pfsync.c carp_group_demote_adj(&sc->sc_if, 1);
sc 983 net/if_pfsync.c timeout_add(&sc->sc_bulkfail_tmo, 5 * hz);
sc 989 net/if_pfsync.c pfsync_sendout(sc);
sc 1003 net/if_pfsync.c pfsync_setmtu(struct pfsync_softc *sc, int mtu_req)
sc 1007 net/if_pfsync.c if (sc->sc_sync_ifp && sc->sc_sync_ifp->if_mtu < mtu_req)
sc 1008 net/if_pfsync.c mtu = sc->sc_sync_ifp->if_mtu;
sc 1012 net/if_pfsync.c sc->sc_maxcount = (mtu - sizeof(struct pfsync_header)) /
sc 1014 net/if_pfsync.c if (sc->sc_maxcount > 254)
sc 1015 net/if_pfsync.c sc->sc_maxcount = 254;
sc 1016 net/if_pfsync.c sc->sc_if.if_mtu = sizeof(struct pfsync_header) +
sc 1017 net/if_pfsync.c sc->sc_maxcount * sizeof(struct pfsync_state);
sc 1021 net/if_pfsync.c pfsync_get_mbuf(struct pfsync_softc *sc, u_int8_t action, void **sp)
sc 1029 net/if_pfsync.c sc->sc_if.if_oerrors++;
sc 1039 net/if_pfsync.c len = (sc->sc_maxcount * sizeof(struct pfsync_state_upd)) +
sc 1043 net/if_pfsync.c len = (sc->sc_maxcount * sizeof(struct pfsync_state_del)) +
sc 1047 net/if_pfsync.c len = (sc->sc_maxcount * sizeof(struct pfsync_state_upd_req)) +
sc 1055 net/if_pfsync.c len = (sc->sc_maxcount * sizeof(struct pfsync_tdb)) +
sc 1059 net/if_pfsync.c len = (sc->sc_maxcount * sizeof(struct pfsync_state)) +
sc 1068 net/if_pfsync.c sc->sc_if.if_oerrors++;
sc 1088 net/if_pfsync.c timeout_add(&sc->sc_tdb_tmo, hz);
sc 1090 net/if_pfsync.c timeout_add(&sc->sc_tmo, hz);
sc 1098 net/if_pfsync.c struct pfsync_softc *sc = pfsyncif;
sc 1109 net/if_pfsync.c if (sc == NULL)
sc 1111 net/if_pfsync.c ifp = &sc->sc_if;
sc 1117 net/if_pfsync.c if (ifp->if_bpf == NULL && sc->sc_sync_ifp == NULL &&
sc 1118 net/if_pfsync.c sc->sc_sync_peer.s_addr == INADDR_PFSYNC_GROUP) {
sc 1120 net/if_pfsync.c if (sc->sc_mbuf != NULL) {
sc 1121 net/if_pfsync.c m_freem(sc->sc_mbuf);
sc 1122 net/if_pfsync.c sc->sc_mbuf = NULL;
sc 1123 net/if_pfsync.c sc->sc_statep.s = NULL;
sc 1132 net/if_pfsync.c if (sc->sc_mbuf == NULL) {
sc 1133 net/if_pfsync.c if ((sc->sc_mbuf = pfsync_get_mbuf(sc, action,
sc 1134 net/if_pfsync.c (void *)&sc->sc_statep.s)) == NULL) {
sc 1138 net/if_pfsync.c h = mtod(sc->sc_mbuf, struct pfsync_header *);
sc 1140 net/if_pfsync.c h = mtod(sc->sc_mbuf, struct pfsync_header *);
sc 1142 net/if_pfsync.c pfsync_sendout(sc);
sc 1143 net/if_pfsync.c if ((sc->sc_mbuf = pfsync_get_mbuf(sc, action,
sc 1144 net/if_pfsync.c (void *)&sc->sc_statep.s)) == NULL) {
sc 1148 net/if_pfsync.c h = mtod(sc->sc_mbuf, struct pfsync_header *);
sc 1154 net/if_pfsync.c if (action == PFSYNC_ACT_UPD && sc->sc_maxupdates) {
sc 1179 net/if_pfsync.c sp = sc->sc_statep.s++;
sc 1180 net/if_pfsync.c sc->sc_mbuf->m_pkthdr.len =
sc 1181 net/if_pfsync.c sc->sc_mbuf->m_len += sizeof(struct pfsync_state);
sc 1228 net/if_pfsync.c if (sc->sc_sync_ifp && flags & PFSYNC_FLAG_COMPRESS) {
sc 1243 net/if_pfsync.c if (sc->sc_mbuf_net == NULL) {
sc 1244 net/if_pfsync.c if ((sc->sc_mbuf_net = pfsync_get_mbuf(sc, newaction,
sc 1245 net/if_pfsync.c (void *)&sc->sc_statep_net.s)) == NULL) {
sc 1250 net/if_pfsync.c h_net = mtod(sc->sc_mbuf_net, struct pfsync_header *);
sc 1260 net/if_pfsync.c sc->sc_mbuf_net->m_pkthdr.len =
sc 1261 net/if_pfsync.c sc->sc_mbuf_net->m_len += sizeof(*up);
sc 1262 net/if_pfsync.c up = sc->sc_statep_net.u++;
sc 1274 net/if_pfsync.c sc->sc_mbuf_net->m_pkthdr.len =
sc 1275 net/if_pfsync.c sc->sc_mbuf_net->m_len += sizeof(*dp);
sc 1276 net/if_pfsync.c dp = sc->sc_statep_net.d++;
sc 1286 net/if_pfsync.c if (h->count == sc->sc_maxcount ||
sc 1287 net/if_pfsync.c (sc->sc_maxupdates && (sp->updates >= sc->sc_maxupdates)))
sc 1288 net/if_pfsync.c ret = pfsync_sendout(sc);
sc 1300 net/if_pfsync.c struct pfsync_softc *sc = pfsyncif;
sc 1304 net/if_pfsync.c if (sc == NULL)
sc 1307 net/if_pfsync.c ifp = &sc->sc_if;
sc 1308 net/if_pfsync.c if (sc->sc_mbuf == NULL) {
sc 1309 net/if_pfsync.c if ((sc->sc_mbuf = pfsync_get_mbuf(sc, PFSYNC_ACT_UREQ,
sc 1310 net/if_pfsync.c (void *)&sc->sc_statep.s)) == NULL)
sc 1312 net/if_pfsync.c h = mtod(sc->sc_mbuf, struct pfsync_header *);
sc 1314 net/if_pfsync.c h = mtod(sc->sc_mbuf, struct pfsync_header *);
sc 1316 net/if_pfsync.c pfsync_sendout(sc);
sc 1317 net/if_pfsync.c if ((sc->sc_mbuf = pfsync_get_mbuf(sc, PFSYNC_ACT_UREQ,
sc 1318 net/if_pfsync.c (void *)&sc->sc_statep.s)) == NULL)
sc 1320 net/if_pfsync.c h = mtod(sc->sc_mbuf, struct pfsync_header *);
sc 1325 net/if_pfsync.c sc->sc_sendaddr = *src;
sc 1326 net/if_pfsync.c sc->sc_mbuf->m_pkthdr.len = sc->sc_mbuf->m_len += sizeof(*rup);
sc 1328 net/if_pfsync.c rup = sc->sc_statep.r++;
sc 1335 net/if_pfsync.c if (h->count == sc->sc_maxcount)
sc 1336 net/if_pfsync.c ret = pfsync_sendout(sc);
sc 1345 net/if_pfsync.c struct pfsync_softc *sc = pfsyncif;
sc 1349 net/if_pfsync.c if (sc == NULL)
sc 1352 net/if_pfsync.c ifp = &sc->sc_if;
sc 1354 net/if_pfsync.c if (sc->sc_mbuf != NULL)
sc 1355 net/if_pfsync.c pfsync_sendout(sc);
sc 1356 net/if_pfsync.c if ((sc->sc_mbuf = pfsync_get_mbuf(sc, PFSYNC_ACT_CLR,
sc 1357 net/if_pfsync.c (void *)&sc->sc_statep.c)) == NULL) {
sc 1361 net/if_pfsync.c sc->sc_mbuf->m_pkthdr.len = sc->sc_mbuf->m_len += sizeof(*cp);
sc 1362 net/if_pfsync.c cp = sc->sc_statep.c;
sc 1367 net/if_pfsync.c ret = (pfsync_sendout(sc));
sc 1375 net/if_pfsync.c struct pfsync_softc *sc = v;
sc 1379 net/if_pfsync.c pfsync_sendout(sc);
sc 1386 net/if_pfsync.c struct pfsync_softc *sc = v;
sc 1390 net/if_pfsync.c pfsync_tdb_sendout(sc);
sc 1396 net/if_pfsync.c pfsync_send_bus(struct pfsync_softc *sc, u_int8_t status)
sc 1400 net/if_pfsync.c if (sc->sc_mbuf != NULL)
sc 1401 net/if_pfsync.c pfsync_sendout(sc);
sc 1404 net/if_pfsync.c (sc->sc_mbuf = pfsync_get_mbuf(sc, PFSYNC_ACT_BUS,
sc 1405 net/if_pfsync.c (void *)&sc->sc_statep.b)) != NULL) {
sc 1406 net/if_pfsync.c sc->sc_mbuf->m_pkthdr.len = sc->sc_mbuf->m_len += sizeof(*bus);
sc 1407 net/if_pfsync.c bus = sc->sc_statep.b;
sc 1410 net/if_pfsync.c bus->endtime = htonl(time_uptime - sc->sc_ureq_received);
sc 1411 net/if_pfsync.c pfsync_sendout(sc);
sc 1418 net/if_pfsync.c struct pfsync_softc *sc = v;
sc 1423 net/if_pfsync.c if (sc->sc_mbuf != NULL)
sc 1424 net/if_pfsync.c pfsync_sendout(sc);
sc 1430 net/if_pfsync.c state = sc->sc_bulk_send_next;
sc 1436 net/if_pfsync.c && state->pfsync_time <= sc->sc_ureq_received) {
sc 1447 net/if_pfsync.c } while (i < sc->sc_maxcount * PFSYNC_BULKPACKETS &&
sc 1448 net/if_pfsync.c state != sc->sc_bulk_terminator);
sc 1450 net/if_pfsync.c if (!state || state == sc->sc_bulk_terminator) {
sc 1452 net/if_pfsync.c pfsync_send_bus(sc, PFSYNC_BUS_END);
sc 1453 net/if_pfsync.c sc->sc_ureq_received = 0;
sc 1454 net/if_pfsync.c sc->sc_bulk_send_next = NULL;
sc 1455 net/if_pfsync.c sc->sc_bulk_terminator = NULL;
sc 1456 net/if_pfsync.c timeout_del(&sc->sc_bulk_tmo);
sc 1461 net/if_pfsync.c timeout_add(&sc->sc_bulk_tmo, 1);
sc 1462 net/if_pfsync.c sc->sc_bulk_send_next = state;
sc 1464 net/if_pfsync.c if (sc->sc_mbuf != NULL)
sc 1465 net/if_pfsync.c pfsync_sendout(sc);
sc 1472 net/if_pfsync.c struct pfsync_softc *sc = v;
sc 1475 net/if_pfsync.c if (sc->sc_bulk_tries++ < PFSYNC_MAX_BULKTRIES) {
sc 1477 net/if_pfsync.c timeout_add(&sc->sc_bulkfail_tmo, 5 * hz);
sc 1485 net/if_pfsync.c pfsync_sendout(sc);
sc 1489 net/if_pfsync.c sc->sc_ureq_sent = 0;
sc 1490 net/if_pfsync.c sc->sc_bulk_tries = 0;
sc 1493 net/if_pfsync.c carp_group_demote_adj(&sc->sc_if, -1);
sc 1499 net/if_pfsync.c timeout_del(&sc->sc_bulkfail_tmo);
sc 1505 net/if_pfsync.c pfsync_sendout(struct pfsync_softc *sc)
sc 1508 net/if_pfsync.c struct ifnet *ifp = &sc->sc_if;
sc 1512 net/if_pfsync.c timeout_del(&sc->sc_tmo);
sc 1514 net/if_pfsync.c if (sc->sc_mbuf == NULL)
sc 1516 net/if_pfsync.c m = sc->sc_mbuf;
sc 1517 net/if_pfsync.c sc->sc_mbuf = NULL;
sc 1518 net/if_pfsync.c sc->sc_statep.s = NULL;
sc 1525 net/if_pfsync.c if (sc->sc_mbuf_net) {
sc 1527 net/if_pfsync.c m = sc->sc_mbuf_net;
sc 1528 net/if_pfsync.c sc->sc_mbuf_net = NULL;
sc 1529 net/if_pfsync.c sc->sc_statep_net.s = NULL;
sc 1532 net/if_pfsync.c return pfsync_sendout_mbuf(sc, m);
sc 1536 net/if_pfsync.c pfsync_tdb_sendout(struct pfsync_softc *sc)
sc 1539 net/if_pfsync.c struct ifnet *ifp = &sc->sc_if;
sc 1543 net/if_pfsync.c timeout_del(&sc->sc_tdb_tmo);
sc 1545 net/if_pfsync.c if (sc->sc_mbuf_tdb == NULL)
sc 1547 net/if_pfsync.c m = sc->sc_mbuf_tdb;
sc 1548 net/if_pfsync.c sc->sc_mbuf_tdb = NULL;
sc 1549 net/if_pfsync.c sc->sc_statep_tdb.t = NULL;
sc 1556 net/if_pfsync.c return pfsync_sendout_mbuf(sc, m);
sc 1560 net/if_pfsync.c pfsync_sendout_mbuf(struct pfsync_softc *sc, struct mbuf *m)
sc 1565 net/if_pfsync.c if (sc->sc_sync_ifp ||
sc 1566 net/if_pfsync.c sc->sc_sync_peer.s_addr != INADDR_PFSYNC_GROUP) {
sc 1586 net/if_pfsync.c if (sc->sc_sendaddr.s_addr == INADDR_PFSYNC_GROUP)
sc 1588 net/if_pfsync.c ip->ip_dst = sc->sc_sendaddr;
sc 1589 net/if_pfsync.c sc->sc_sendaddr.s_addr = sc->sc_sync_peer.s_addr;
sc 1593 net/if_pfsync.c if (ip_output(m, NULL, NULL, IP_RAWOUTPUT, &sc->sc_imo, NULL))
sc 1647 net/if_pfsync.c struct pfsync_softc *sc = pfsyncif;
sc 1652 net/if_pfsync.c if (sc == NULL)
sc 1655 net/if_pfsync.c ifp = &sc->sc_if;
sc 1656 net/if_pfsync.c if (ifp->if_bpf == NULL && sc->sc_sync_ifp == NULL &&
sc 1657 net/if_pfsync.c sc->sc_sync_peer.s_addr == INADDR_PFSYNC_GROUP) {
sc 1659 net/if_pfsync.c if (sc->sc_mbuf_tdb != NULL) {
sc 1660 net/if_pfsync.c m_freem(sc->sc_mbuf_tdb);
sc 1661 net/if_pfsync.c sc->sc_mbuf_tdb = NULL;
sc 1662 net/if_pfsync.c sc->sc_statep_tdb.t = NULL;
sc 1668 net/if_pfsync.c if (sc->sc_mbuf_tdb == NULL) {
sc 1669 net/if_pfsync.c if ((sc->sc_mbuf_tdb = pfsync_get_mbuf(sc, PFSYNC_ACT_TDB_UPD,
sc 1670 net/if_pfsync.c (void *)&sc->sc_statep_tdb.t)) == NULL) {
sc 1674 net/if_pfsync.c h = mtod(sc->sc_mbuf_tdb, struct pfsync_header *);
sc 1676 net/if_pfsync.c h = mtod(sc->sc_mbuf_tdb, struct pfsync_header *);
sc 1682 net/if_pfsync.c pfsync_tdb_sendout(sc);
sc 1683 net/if_pfsync.c sc->sc_mbuf_tdb = pfsync_get_mbuf(sc,
sc 1684 net/if_pfsync.c PFSYNC_ACT_TDB_UPD, (void *)&sc->sc_statep_tdb.t);
sc 1685 net/if_pfsync.c if (sc->sc_mbuf_tdb == NULL) {
sc 1689 net/if_pfsync.c h = mtod(sc->sc_mbuf_tdb, struct pfsync_header *);
sc 1690 net/if_pfsync.c } else if (sc->sc_maxupdates) {
sc 1713 net/if_pfsync.c pt = sc->sc_statep_tdb.t++;
sc 1714 net/if_pfsync.c sc->sc_mbuf_tdb->m_pkthdr.len =
sc 1715 net/if_pfsync.c sc->sc_mbuf_tdb->m_len += sizeof(struct pfsync_tdb);
sc 1745 net/if_pfsync.c if (h->count == sc->sc_maxcount ||
sc 1746 net/if_pfsync.c (sc->sc_maxupdates && (pt->updates >= sc->sc_maxupdates)))
sc 1747 net/if_pfsync.c ret = pfsync_tdb_sendout(sc);
sc 233 net/if_ppp.c struct ppp_softc *sc;
sc 236 net/if_ppp.c sc = malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT);
sc 237 net/if_ppp.c if (!sc)
sc 239 net/if_ppp.c bzero(sc, sizeof(*sc));
sc 241 net/if_ppp.c sc->sc_unit = unit;
sc 242 net/if_ppp.c snprintf(sc->sc_if.if_xname, sizeof sc->sc_if.if_xname, "%s%d",
sc 244 net/if_ppp.c sc->sc_if.if_softc = sc;
sc 245 net/if_ppp.c sc->sc_if.if_mtu = PPP_MTU;
sc 246 net/if_ppp.c sc->sc_if.if_flags = IFF_POINTOPOINT | IFF_MULTICAST;
sc 247 net/if_ppp.c sc->sc_if.if_type = IFT_PPP;
sc 248 net/if_ppp.c sc->sc_if.if_hdrlen = PPP_HDRLEN;
sc 249 net/if_ppp.c sc->sc_if.if_ioctl = pppsioctl;
sc 250 net/if_ppp.c sc->sc_if.if_output = pppoutput;
sc 252 net/if_ppp.c sc->sc_if.if_start = ppp_ifstart;
sc 254 net/if_ppp.c IFQ_SET_MAXLEN(&sc->sc_if.if_snd, ifqmaxlen);
sc 255 net/if_ppp.c sc->sc_inq.ifq_maxlen = ifqmaxlen;
sc 256 net/if_ppp.c sc->sc_fastq.ifq_maxlen = ifqmaxlen;
sc 257 net/if_ppp.c sc->sc_rawq.ifq_maxlen = ifqmaxlen;
sc 258 net/if_ppp.c IFQ_SET_READY(&sc->sc_if.if_snd);
sc 259 net/if_ppp.c if_attach(&sc->sc_if);
sc 260 net/if_ppp.c if_alloc_sadl(&sc->sc_if);
sc 262 net/if_ppp.c bpfattach(&sc->sc_bpf, &sc->sc_if, DLT_PPP, PPP_HDRLEN);
sc 265 net/if_ppp.c LIST_INSERT_HEAD(&ppp_softc_list, sc, sc_list);
sc 275 net/if_ppp.c struct ppp_softc *sc = ifp->if_softc;
sc 278 net/if_ppp.c if (sc->sc_devp != NULL)
sc 282 net/if_ppp.c LIST_REMOVE(sc, sc_list);
sc 287 net/if_ppp.c free(sc, M_DEVBUF);
sc 299 net/if_ppp.c struct ppp_softc *sc;
sc 301 net/if_ppp.c LIST_FOREACH(sc, &ppp_softc_list, sc_list)
sc 302 net/if_ppp.c if (sc->sc_xfer == pid) {
sc 303 net/if_ppp.c sc->sc_xfer = 0;
sc 304 net/if_ppp.c return sc;
sc 306 net/if_ppp.c LIST_FOREACH(sc, &ppp_softc_list, sc_list)
sc 307 net/if_ppp.c if (sc->sc_devp == NULL)
sc 309 net/if_ppp.c if (sc == NULL)
sc 312 net/if_ppp.c sc->sc_flags = 0;
sc 313 net/if_ppp.c sc->sc_mru = PPP_MRU;
sc 314 net/if_ppp.c sc->sc_relinq = NULL;
sc 315 net/if_ppp.c bzero((char *)&sc->sc_stats, sizeof(sc->sc_stats));
sc 317 net/if_ppp.c MALLOC(sc->sc_comp, struct slcompress *, sizeof(struct slcompress),
sc 319 net/if_ppp.c if (sc->sc_comp)
sc 320 net/if_ppp.c sl_compress_init(sc->sc_comp);
sc 323 net/if_ppp.c sc->sc_xc_state = NULL;
sc 324 net/if_ppp.c sc->sc_rc_state = NULL;
sc 327 net/if_ppp.c sc->sc_npmode[i] = NPMODE_ERROR;
sc 328 net/if_ppp.c sc->sc_npqueue = NULL;
sc 329 net/if_ppp.c sc->sc_npqtail = &sc->sc_npqueue;
sc 330 net/if_ppp.c sc->sc_last_sent = sc->sc_last_recv = time_second;
sc 332 net/if_ppp.c return sc;
sc 339 net/if_ppp.c pppdealloc(sc)
sc 340 net/if_ppp.c struct ppp_softc *sc;
sc 346 net/if_ppp.c if_down(&sc->sc_if);
sc 347 net/if_ppp.c sc->sc_if.if_flags &= ~(IFF_UP|IFF_RUNNING);
sc 348 net/if_ppp.c sc->sc_devp = NULL;
sc 349 net/if_ppp.c sc->sc_xfer = 0;
sc 351 net/if_ppp.c IF_DEQUEUE(&sc->sc_rawq, m);
sc 357 net/if_ppp.c IF_DEQUEUE(&sc->sc_inq, m);
sc 363 net/if_ppp.c IF_DEQUEUE(&sc->sc_fastq, m);
sc 368 net/if_ppp.c while ((m = sc->sc_npqueue) != NULL) {
sc 369 net/if_ppp.c sc->sc_npqueue = m->m_nextpkt;
sc 372 net/if_ppp.c if (sc->sc_togo != NULL) {
sc 373 net/if_ppp.c m_freem(sc->sc_togo);
sc 374 net/if_ppp.c sc->sc_togo = NULL;
sc 377 net/if_ppp.c ppp_ccp_closed(sc);
sc 378 net/if_ppp.c sc->sc_xc_state = NULL;
sc 379 net/if_ppp.c sc->sc_rc_state = NULL;
sc 382 net/if_ppp.c if (sc->sc_pass_filt.bf_insns != 0) {
sc 383 net/if_ppp.c FREE(sc->sc_pass_filt.bf_insns, M_DEVBUF);
sc 384 net/if_ppp.c sc->sc_pass_filt.bf_insns = 0;
sc 385 net/if_ppp.c sc->sc_pass_filt.bf_len = 0;
sc 387 net/if_ppp.c if (sc->sc_active_filt.bf_insns != 0) {
sc 388 net/if_ppp.c FREE(sc->sc_active_filt.bf_insns, M_DEVBUF);
sc 389 net/if_ppp.c sc->sc_active_filt.bf_insns = 0;
sc 390 net/if_ppp.c sc->sc_active_filt.bf_len = 0;
sc 394 net/if_ppp.c if (sc->sc_comp != 0) {
sc 395 net/if_ppp.c FREE(sc->sc_comp, M_DEVBUF);
sc 396 net/if_ppp.c sc->sc_comp = 0;
sc 405 net/if_ppp.c pppioctl(sc, cmd, data, flag, p)
sc 406 net/if_ppp.c struct ppp_softc *sc;
sc 429 net/if_ppp.c *(int *)data = sc->sc_inq.ifq_len;
sc 433 net/if_ppp.c *(int *)data = sc->sc_unit; /* XXX */
sc 437 net/if_ppp.c *(u_int *)data = sc->sc_flags;
sc 446 net/if_ppp.c if (sc->sc_flags & SC_CCP_OPEN && !(flags & SC_CCP_OPEN))
sc 447 net/if_ppp.c ppp_ccp_closed(sc);
sc 450 net/if_ppp.c sc->sc_flags = (sc->sc_flags & ~SC_MASK) | flags;
sc 459 net/if_ppp.c sc->sc_mru = mru;
sc 463 net/if_ppp.c *(int *)data = sc->sc_mru;
sc 470 net/if_ppp.c if (sc->sc_comp) {
sc 472 net/if_ppp.c sl_compress_setup(sc->sc_comp, *(int *)data);
sc 481 net/if_ppp.c sc->sc_xfer = p->p_pid;
sc 505 net/if_ppp.c if (sc->sc_xc_state != NULL)
sc 506 net/if_ppp.c (*sc->sc_xcomp->comp_free)(sc->sc_xc_state);
sc 507 net/if_ppp.c sc->sc_xcomp = *cp;
sc 508 net/if_ppp.c sc->sc_xc_state = (*cp)->comp_alloc(ccp_option, nb);
sc 509 net/if_ppp.c if (sc->sc_xc_state == NULL) {
sc 510 net/if_ppp.c if (sc->sc_flags & SC_DEBUG)
sc 512 net/if_ppp.c sc->sc_if.if_xname);
sc 516 net/if_ppp.c sc->sc_flags &= ~SC_COMP_RUN;
sc 520 net/if_ppp.c if (sc->sc_rc_state != NULL)
sc 521 net/if_ppp.c (*sc->sc_rcomp->decomp_free)(sc->sc_rc_state);
sc 522 net/if_ppp.c sc->sc_rcomp = *cp;
sc 523 net/if_ppp.c sc->sc_rc_state = (*cp)->decomp_alloc(ccp_option, nb);
sc 524 net/if_ppp.c if (sc->sc_rc_state == NULL) {
sc 525 net/if_ppp.c if (sc->sc_flags & SC_DEBUG)
sc 527 net/if_ppp.c sc->sc_if.if_xname);
sc 531 net/if_ppp.c sc->sc_flags &= ~SC_DECOMP_RUN;
sc 536 net/if_ppp.c if (sc->sc_flags & SC_DEBUG)
sc 538 net/if_ppp.c sc->sc_if.if_xname, ccp_option[0], ccp_option[1],
sc 554 net/if_ppp.c npi->mode = sc->sc_npmode[npx];
sc 558 net/if_ppp.c if (npi->mode != sc->sc_npmode[npx]) {
sc 560 net/if_ppp.c sc->sc_npmode[npx] = npi->mode;
sc 562 net/if_ppp.c ppp_requeue(sc);
sc 563 net/if_ppp.c (*sc->sc_start)(sc);
sc 573 net/if_ppp.c ((struct ppp_idle *)data)->xmit_idle = t - sc->sc_last_sent;
sc 574 net/if_ppp.c ((struct ppp_idle *)data)->recv_idle = t - sc->sc_last_recv;
sc 598 net/if_ppp.c bp = (cmd == PPPIOCSPASS)? &sc->sc_pass_filt: &sc->sc_active_filt;
sc 624 net/if_ppp.c struct ppp_softc *sc = ifp->if_softc;
sc 650 net/if_ppp.c sc->sc_if.if_mtu = ifr->ifr_mtu;
sc 673 net/if_ppp.c psp->p = sc->sc_stats;
sc 675 net/if_ppp.c if (sc->sc_comp) {
sc 676 net/if_ppp.c psp->vj.vjs_packets = sc->sc_comp->sls_packets;
sc 677 net/if_ppp.c psp->vj.vjs_compressed = sc->sc_comp->sls_compressed;
sc 678 net/if_ppp.c psp->vj.vjs_searches = sc->sc_comp->sls_searches;
sc 679 net/if_ppp.c psp->vj.vjs_misses = sc->sc_comp->sls_misses;
sc 680 net/if_ppp.c psp->vj.vjs_uncompressedin = sc->sc_comp->sls_uncompressedin;
sc 681 net/if_ppp.c psp->vj.vjs_compressedin = sc->sc_comp->sls_compressedin;
sc 682 net/if_ppp.c psp->vj.vjs_errorin = sc->sc_comp->sls_errorin;
sc 683 net/if_ppp.c psp->vj.vjs_tossed = sc->sc_comp->sls_tossed;
sc 692 net/if_ppp.c if (sc->sc_xc_state != NULL)
sc 693 net/if_ppp.c (*sc->sc_xcomp->comp_stat)(sc->sc_xc_state, &pcp->c);
sc 694 net/if_ppp.c if (sc->sc_rc_state != NULL)
sc 695 net/if_ppp.c (*sc->sc_rcomp->decomp_stat)(sc->sc_rc_state, &pcp->d);
sc 717 net/if_ppp.c struct ppp_softc *sc = ifp->if_softc;
sc 726 net/if_ppp.c if (sc->sc_devp == NULL || (ifp->if_flags & IFF_RUNNING) == 0
sc 742 net/if_ppp.c mode = sc->sc_npmode[NP_IP];
sc 797 net/if_ppp.c if (sc->sc_flags & SC_LOG_OUTPKT) {
sc 809 net/if_ppp.c if (sc->sc_pass_filt.bf_insns != 0
sc 810 net/if_ppp.c && bpf_filter(sc->sc_pass_filt.bf_insns, (u_char *) m0,
sc 819 net/if_ppp.c if (sc->sc_active_filt.bf_insns == 0
sc 820 net/if_ppp.c || bpf_filter(sc->sc_active_filt.bf_insns, (u_char *) m0, len, 0))
sc 821 net/if_ppp.c sc->sc_last_sent = time_second;
sc 828 net/if_ppp.c sc->sc_last_sent = time_second;
sc 836 net/if_ppp.c if (sc->sc_bpf)
sc 837 net/if_ppp.c bpf_mtap(sc->sc_bpf, m0, BPF_DIRECTION_OUT);
sc 846 net/if_ppp.c *sc->sc_npqtail = m0;
sc 848 net/if_ppp.c sc->sc_npqtail = &m0->m_nextpkt;
sc 852 net/if_ppp.c && ALTQ_IS_ENABLED(&sc->sc_if.if_snd) == 0
sc 855 net/if_ppp.c ifq = &sc->sc_fastq;
sc 866 net/if_ppp.c IFQ_ENQUEUE(&sc->sc_if.if_snd, m0, NULL, error);
sc 869 net/if_ppp.c sc->sc_if.if_oerrors++;
sc 870 net/if_ppp.c sc->sc_stats.ppp_oerrors++;
sc 873 net/if_ppp.c (*sc->sc_start)(sc);
sc 892 net/if_ppp.c ppp_requeue(sc)
sc 893 net/if_ppp.c struct ppp_softc *sc;
sc 902 net/if_ppp.c for (mpp = &sc->sc_npqueue; (m = *mpp) != NULL; ) {
sc 905 net/if_ppp.c mode = sc->sc_npmode[NP_IP];
sc 920 net/if_ppp.c && ALTQ_IS_ENABLED(&sc->sc_if.if_snd) == 0
sc 923 net/if_ppp.c ifq = &sc->sc_fastq;
sc 934 net/if_ppp.c IFQ_ENQUEUE(&sc->sc_if.if_snd, m, NULL, error);
sc 936 net/if_ppp.c sc->sc_if.if_oerrors++;
sc 937 net/if_ppp.c sc->sc_stats.ppp_oerrors++;
sc 952 net/if_ppp.c sc->sc_npqtail = mpp;
sc 960 net/if_ppp.c ppp_restart(sc)
sc 961 net/if_ppp.c struct ppp_softc *sc;
sc 965 net/if_ppp.c sc->sc_flags &= ~SC_TBUSY;
sc 977 net/if_ppp.c ppp_dequeue(sc)
sc 978 net/if_ppp.c struct ppp_softc *sc;
sc 988 net/if_ppp.c IF_DEQUEUE(&sc->sc_fastq, m);
sc 990 net/if_ppp.c IFQ_DEQUEUE(&sc->sc_if.if_snd, m);
sc 994 net/if_ppp.c ++sc->sc_stats.ppp_opackets;
sc 1011 net/if_ppp.c if ((sc->sc_flags & SC_COMP_TCP) && sc->sc_comp != NULL) {
sc 1025 net/if_ppp.c type = sl_compress_tcp(mp, ip, sc->sc_comp,
sc 1026 net/if_ppp.c !(sc->sc_flags & SC_NO_TCP_CCID));
sc 1047 net/if_ppp.c ppp_ccp(sc, m, 0);
sc 1054 net/if_ppp.c && sc->sc_xc_state && (sc->sc_flags & SC_COMP_RUN)) {
sc 1061 net/if_ppp.c clen = (*sc->sc_xcomp->compress)
sc 1062 net/if_ppp.c (sc->sc_xc_state, &mcomp, m, slen,
sc 1063 net/if_ppp.c (sc->sc_flags & SC_CCP_UP ? sc->sc_if.if_mtu + PPP_HDRLEN : 0));
sc 1065 net/if_ppp.c if (sc->sc_flags & SC_CCP_UP) {
sc 1082 net/if_ppp.c if (sc->sc_flags & SC_COMP_AC && address == PPP_ALLSTATIONS &&
sc 1089 net/if_ppp.c if (sc->sc_flags & SC_COMP_PROT && protocol < 0xFF) {
sc 1108 net/if_ppp.c struct ppp_softc *sc;
sc 1115 net/if_ppp.c LIST_FOREACH(sc, &ppp_softc_list, sc_list) {
sc 1116 net/if_ppp.c if (!(sc->sc_flags & SC_TBUSY)
sc 1117 net/if_ppp.c && (IFQ_IS_EMPTY(&sc->sc_if.if_snd) == 0 || sc->sc_fastq.ifq_head)) {
sc 1119 net/if_ppp.c sc->sc_flags |= SC_TBUSY;
sc 1121 net/if_ppp.c (*sc->sc_start)(sc);
sc 1123 net/if_ppp.c while (sc->sc_rawq.ifq_head) {
sc 1125 net/if_ppp.c IF_DEQUEUE(&sc->sc_rawq, m);
sc 1129 net/if_ppp.c ppp_inproc(sc, m);
sc 1141 net/if_ppp.c ppp_ccp(sc, m, rcvd)
sc 1142 net/if_ppp.c struct ppp_softc *sc;
sc 1168 net/if_ppp.c if (sc->sc_flags & SC_DEBUG)
sc 1179 net/if_ppp.c if (sc->sc_flags & SC_CCP_UP) {
sc 1181 net/if_ppp.c sc->sc_flags &= ~(SC_CCP_UP | SC_COMP_RUN | SC_DECOMP_RUN);
sc 1187 net/if_ppp.c if (sc->sc_flags & SC_CCP_OPEN && !(sc->sc_flags & SC_CCP_UP)
sc 1192 net/if_ppp.c if (sc->sc_xc_state != NULL
sc 1193 net/if_ppp.c && (*sc->sc_xcomp->comp_init)
sc 1194 net/if_ppp.c (sc->sc_xc_state, dp + CCP_HDRLEN, slen - CCP_HDRLEN,
sc 1195 net/if_ppp.c sc->sc_unit, 0, sc->sc_flags & SC_DEBUG)) {
sc 1197 net/if_ppp.c sc->sc_flags |= SC_COMP_RUN;
sc 1202 net/if_ppp.c if (sc->sc_rc_state != NULL
sc 1203 net/if_ppp.c && (*sc->sc_rcomp->decomp_init)
sc 1204 net/if_ppp.c (sc->sc_rc_state, dp + CCP_HDRLEN, slen - CCP_HDRLEN,
sc 1205 net/if_ppp.c sc->sc_unit, 0, sc->sc_mru,
sc 1206 net/if_ppp.c sc->sc_flags & SC_DEBUG)) {
sc 1208 net/if_ppp.c sc->sc_flags |= SC_DECOMP_RUN;
sc 1209 net/if_ppp.c sc->sc_flags &= ~(SC_DC_ERROR | SC_DC_FERROR);
sc 1217 net/if_ppp.c if (sc->sc_flags & SC_CCP_UP) {
sc 1219 net/if_ppp.c if (sc->sc_xc_state && (sc->sc_flags & SC_COMP_RUN))
sc 1220 net/if_ppp.c (*sc->sc_xcomp->comp_reset)(sc->sc_xc_state);
sc 1222 net/if_ppp.c if (sc->sc_rc_state && (sc->sc_flags & SC_DECOMP_RUN)) {
sc 1223 net/if_ppp.c (*sc->sc_rcomp->decomp_reset)(sc->sc_rc_state);
sc 1225 net/if_ppp.c sc->sc_flags &= ~SC_DC_ERROR;
sc 1238 net/if_ppp.c ppp_ccp_closed(sc)
sc 1239 net/if_ppp.c struct ppp_softc *sc;
sc 1241 net/if_ppp.c if (sc->sc_xc_state) {
sc 1242 net/if_ppp.c (*sc->sc_xcomp->comp_free)(sc->sc_xc_state);
sc 1243 net/if_ppp.c sc->sc_xc_state = NULL;
sc 1245 net/if_ppp.c if (sc->sc_rc_state) {
sc 1246 net/if_ppp.c (*sc->sc_rcomp->decomp_free)(sc->sc_rc_state);
sc 1247 net/if_ppp.c sc->sc_rc_state = NULL;
sc 1259 net/if_ppp.c ppppktin(sc, m, lost)
sc 1260 net/if_ppp.c struct ppp_softc *sc;
sc 1268 net/if_ppp.c IF_ENQUEUE(&sc->sc_rawq, m);
sc 1281 net/if_ppp.c ppp_inproc(sc, m)
sc 1282 net/if_ppp.c struct ppp_softc *sc;
sc 1285 net/if_ppp.c struct ifnet *ifp = &sc->sc_if;
sc 1293 net/if_ppp.c sc->sc_stats.ppp_ipackets++;
sc 1295 net/if_ppp.c if (sc->sc_flags & SC_LOG_INPKT) {
sc 1311 net/if_ppp.c sc->sc_flags |= SC_VJ_RESET;
sc 1320 net/if_ppp.c if (proto == PPP_COMP && sc->sc_rc_state && (sc->sc_flags & SC_DECOMP_RUN)
sc 1321 net/if_ppp.c && !(sc->sc_flags & SC_DC_ERROR) && !(sc->sc_flags & SC_DC_FERROR)) {
sc 1323 net/if_ppp.c rv = (*sc->sc_rcomp->decompress)(sc->sc_rc_state, m, &dmp);
sc 1340 net/if_ppp.c if (sc->sc_flags & SC_DEBUG)
sc 1343 net/if_ppp.c sc->sc_flags |= SC_VJ_RESET;
sc 1345 net/if_ppp.c sc->sc_flags |= SC_DC_ERROR;
sc 1347 net/if_ppp.c sc->sc_flags |= SC_DC_FERROR;
sc 1352 net/if_ppp.c if (sc->sc_rc_state && (sc->sc_flags & SC_DECOMP_RUN)) {
sc 1353 net/if_ppp.c (*sc->sc_rcomp->incomp)(sc->sc_rc_state, m);
sc 1356 net/if_ppp.c ppp_ccp(sc, m, 1);
sc 1366 net/if_ppp.c if (sc->sc_flags & SC_VJ_RESET) {
sc 1371 net/if_ppp.c if (sc->sc_comp)
sc 1372 net/if_ppp.c sl_uncompress_tcp(NULL, 0, TYPE_ERROR, sc->sc_comp);
sc 1374 net/if_ppp.c sc->sc_flags &= ~SC_VJ_RESET;
sc 1382 net/if_ppp.c if ((sc->sc_flags & SC_REJ_COMP_TCP) || sc->sc_comp == 0)
sc 1387 net/if_ppp.c sc->sc_comp, &iphdr, &hlen);
sc 1390 net/if_ppp.c if (sc->sc_flags & SC_DEBUG)
sc 1436 net/if_ppp.c if ((sc->sc_flags & SC_REJ_COMP_TCP) || sc->sc_comp == 0)
sc 1441 net/if_ppp.c sc->sc_comp, &iphdr, &hlen);
sc 1444 net/if_ppp.c if (sc->sc_flags & SC_DEBUG)
sc 1479 net/if_ppp.c if (sc->sc_pass_filt.bf_insns != 0
sc 1480 net/if_ppp.c && bpf_filter(sc->sc_pass_filt.bf_insns, (u_char *) m,
sc 1486 net/if_ppp.c if (sc->sc_active_filt.bf_insns == 0
sc 1487 net/if_ppp.c || bpf_filter(sc->sc_active_filt.bf_insns, (u_char *) m, ilen, 0))
sc 1488 net/if_ppp.c sc->sc_last_recv = time_second;
sc 1495 net/if_ppp.c sc->sc_last_recv = time_second;
sc 1501 net/if_ppp.c if (sc->sc_bpf)
sc 1502 net/if_ppp.c bpf_mtap(sc->sc_bpf, m, BPF_DIRECTION_IN);
sc 1513 net/if_ppp.c || sc->sc_npmode[NP_IP] != NPMODE_PASS) {
sc 1530 net/if_ppp.c inq = &sc->sc_inq;
sc 1542 net/if_ppp.c if (sc->sc_flags & SC_DEBUG)
sc 1555 net/if_ppp.c (*sc->sc_ctlp)(sc);
sc 1561 net/if_ppp.c sc->sc_if.if_ierrors++;
sc 1562 net/if_ppp.c sc->sc_stats.ppp_ierrors++;
sc 1610 net/if_ppp.c struct ppp_softc *sc;
sc 1612 net/if_ppp.c sc = ifp->if_softc;
sc 1613 net/if_ppp.c (*sc->sc_start)(sc);
sc 76 net/if_pppoe.c #define PPPOEDEBUG(a) ((sc->sc_sppp.pp_if.if_flags & IFF_DEBUG) ? printf a : 0)
sc 225 net/if_pppoe.c struct pppoe_softc *sc;
sc 228 net/if_pppoe.c MALLOC(sc, struct pppoe_softc *, sizeof(*sc), M_DEVBUF, M_WAITOK);
sc 229 net/if_pppoe.c if (sc == NULL)
sc 231 net/if_pppoe.c bzero(sc, sizeof(struct pppoe_softc));
sc 233 net/if_pppoe.c sc->sc_unique = arc4random();
sc 235 net/if_pppoe.c snprintf(sc->sc_sppp.pp_if.if_xname,
sc 236 net/if_pppoe.c sizeof(sc->sc_sppp.pp_if.if_xname),
sc 238 net/if_pppoe.c sc->sc_sppp.pp_if.if_softc = sc;
sc 239 net/if_pppoe.c sc->sc_sppp.pp_if.if_mtu = PPPOE_MAXMTU;
sc 240 net/if_pppoe.c sc->sc_sppp.pp_if.if_flags = IFF_SIMPLEX | IFF_POINTOPOINT | IFF_MULTICAST;
sc 241 net/if_pppoe.c sc->sc_sppp.pp_if.if_type = IFT_PPP;
sc 242 net/if_pppoe.c sc->sc_sppp.pp_if.if_hdrlen = sizeof(struct ether_header) + PPPOE_HEADERLEN;
sc 243 net/if_pppoe.c sc->sc_sppp.pp_flags |= PP_KEEPALIVE | /* use LCP keepalive */
sc 245 net/if_pppoe.c sc->sc_sppp.pp_framebytes = PPPOE_HEADERLEN; /* framing added to ppp packets */
sc 246 net/if_pppoe.c sc->sc_sppp.pp_if.if_ioctl = pppoe_ioctl;
sc 247 net/if_pppoe.c sc->sc_sppp.pp_if.if_start = pppoe_start;
sc 248 net/if_pppoe.c sc->sc_sppp.pp_tls = pppoe_tls;
sc 249 net/if_pppoe.c sc->sc_sppp.pp_tlf = pppoe_tlf;
sc 250 net/if_pppoe.c IFQ_SET_MAXLEN(&sc->sc_sppp.pp_if.if_snd, IFQ_MAXLEN);
sc 251 net/if_pppoe.c IFQ_SET_READY(&sc->sc_sppp.pp_if.if_snd);
sc 254 net/if_pppoe.c memcpy(&sc->sc_dest, etherbroadcastaddr, sizeof(sc->sc_dest));
sc 257 net/if_pppoe.c timeout_set(&sc->sc_timeout, pppoe_timeout, sc);
sc 259 net/if_pppoe.c if_attach(&sc->sc_sppp.pp_if);
sc 260 net/if_pppoe.c if_alloc_sadl(&sc->sc_sppp.pp_if);
sc 261 net/if_pppoe.c sppp_attach(&sc->sc_sppp.pp_if);
sc 263 net/if_pppoe.c bpfattach(&sc->sc_sppp.pp_if.if_bpf, &sc->sc_sppp.pp_if, DLT_PPP_ETHER, 0);
sc 267 net/if_pppoe.c LIST_INSERT_HEAD(&pppoe_softc_list, sc, sc_list);
sc 277 net/if_pppoe.c struct pppoe_softc *sc = ifp->if_softc;
sc 281 net/if_pppoe.c LIST_REMOVE(sc, sc_list);
sc 282 net/if_pppoe.c timeout_del(&sc->sc_timeout);
sc 285 net/if_pppoe.c sppp_detach(&sc->sc_sppp.pp_if);
sc 288 net/if_pppoe.c if (sc->sc_concentrator_name)
sc 289 net/if_pppoe.c free(sc->sc_concentrator_name, M_DEVBUF);
sc 290 net/if_pppoe.c if (sc->sc_service_name)
sc 291 net/if_pppoe.c free(sc->sc_service_name, M_DEVBUF);
sc 292 net/if_pppoe.c if (sc->sc_ac_cookie)
sc 293 net/if_pppoe.c free(sc->sc_ac_cookie, M_DEVBUF);
sc 295 net/if_pppoe.c free(sc, M_DEVBUF);
sc 309 net/if_pppoe.c struct pppoe_softc *sc;
sc 314 net/if_pppoe.c LIST_FOREACH(sc, &pppoe_softc_list, sc_list) {
sc 315 net/if_pppoe.c if (sc->sc_state == PPPOE_STATE_SESSION
sc 316 net/if_pppoe.c && sc->sc_session == session) {
sc 317 net/if_pppoe.c if (sc->sc_eth_if == rcvif)
sc 318 net/if_pppoe.c return (sc);
sc 333 net/if_pppoe.c struct pppoe_softc *sc;
sc 343 net/if_pppoe.c LIST_FOREACH(sc, &pppoe_softc_list, sc_list)
sc 344 net/if_pppoe.c if (sc->sc_unique == hunique)
sc 347 net/if_pppoe.c if (sc == NULL) {
sc 353 net/if_pppoe.c if (sc->sc_state < PPPOE_STATE_PADI_SENT || sc->sc_state >= PPPOE_STATE_SESSION) {
sc 355 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname, sc->sc_state);
sc 358 net/if_pppoe.c if (sc->sc_eth_if != rcvif) {
sc 360 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname);
sc 363 net/if_pppoe.c return (sc);
sc 370 net/if_pppoe.c struct pppoe_softc *sc;
sc 375 net/if_pppoe.c LIST_FOREACH(sc, &pppoe_softc_list, sc_list) {
sc 395 net/if_pppoe.c struct pppoe_softc *sc;
sc 463 net/if_pppoe.c sc = NULL;
sc 487 net/if_pppoe.c if (sc != NULL)
sc 499 net/if_pppoe.c sc = pppoe_find_softc_by_hunique(mtod(n, caddr_t) + noff,
sc 501 net/if_pppoe.c if (sc != NULL)
sc 502 net/if_pppoe.c devname = sc->sc_sppp.pp_if.if_xname;
sc 557 net/if_pppoe.c LIST_FOREACH(sc, &pppoe_softc_list, sc_list) {
sc 558 net/if_pppoe.c if (!(sc->sc_sppp.pp_if.if_flags & IFF_UP))
sc 560 net/if_pppoe.c if (!(sc->sc_sppp.pp_if.if_flags & IFF_PASSIVE))
sc 562 net/if_pppoe.c if (sc->sc_state == PPPOE_STATE_INITIAL)
sc 565 net/if_pppoe.c if (sc == NULL) {
sc 572 net/if_pppoe.c if (sc->sc_hunique)
sc 573 net/if_pppoe.c free(sc->sc_hunique, M_DEVBUF);
sc 574 net/if_pppoe.c sc->sc_hunique = malloc(hunique_len, M_DEVBUF,
sc 576 net/if_pppoe.c if (sc->sc_hunique == NULL)
sc 578 net/if_pppoe.c sc->sc_hunique_len = hunique_len;
sc 579 net/if_pppoe.c memcpy(sc->sc_hunique, hunique, hunique_len);
sc 582 net/if_pppoe.c memcpy(&sc->sc_dest, eh->ether_shost, sizeof(sc->sc_dest));
sc 583 net/if_pppoe.c sc->sc_state = PPPOE_STATE_PADO_SENT;
sc 584 net/if_pppoe.c pppoe_send_pado(sc);
sc 599 net/if_pppoe.c sc = pppoe_find_softc_by_hunique(ac_cookie,
sc 602 net/if_pppoe.c if (sc == NULL) {
sc 608 net/if_pppoe.c if (sc->sc_state != PPPOE_STATE_PADO_SENT) {
sc 610 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname);
sc 614 net/if_pppoe.c if (sc->sc_hunique)
sc 615 net/if_pppoe.c free(sc->sc_hunique, M_DEVBUF);
sc 616 net/if_pppoe.c sc->sc_hunique = malloc(hunique_len, M_DEVBUF,
sc 618 net/if_pppoe.c if (sc->sc_hunique == NULL)
sc 620 net/if_pppoe.c sc->sc_hunique_len = hunique_len;
sc 621 net/if_pppoe.c memcpy(sc->sc_hunique, hunique, hunique_len);
sc 624 net/if_pppoe.c pppoe_send_pads(sc);
sc 625 net/if_pppoe.c sc->sc_state = PPPOE_STATE_SESSION;
sc 626 net/if_pppoe.c sc->sc_sppp.pp_up(&sc->sc_sppp);
sc 634 net/if_pppoe.c if (sc == NULL) {
sc 640 net/if_pppoe.c if (sc->sc_state != PPPOE_STATE_PADI_SENT) {
sc 642 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname);
sc 646 net/if_pppoe.c if (sc->sc_ac_cookie)
sc 647 net/if_pppoe.c free(sc->sc_ac_cookie, M_DEVBUF);
sc 648 net/if_pppoe.c sc->sc_ac_cookie = malloc(ac_cookie_len, M_DEVBUF,
sc 650 net/if_pppoe.c if (sc->sc_ac_cookie == NULL)
sc 652 net/if_pppoe.c sc->sc_ac_cookie_len = ac_cookie_len;
sc 653 net/if_pppoe.c memcpy(sc->sc_ac_cookie, ac_cookie, ac_cookie_len);
sc 656 net/if_pppoe.c memcpy(&sc->sc_dest, eh->ether_shost, sizeof(sc->sc_dest));
sc 657 net/if_pppoe.c timeout_del(&sc->sc_timeout);
sc 658 net/if_pppoe.c sc->sc_padr_retried = 0;
sc 659 net/if_pppoe.c sc->sc_state = PPPOE_STATE_PADR_SENT;
sc 660 net/if_pppoe.c if ((err = pppoe_send_padr(sc)) != 0) {
sc 662 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname, err));
sc 664 net/if_pppoe.c timeout_add(&sc->sc_timeout,
sc 665 net/if_pppoe.c PPPOE_DISC_TIMEOUT * (1 + sc->sc_padr_retried));
sc 669 net/if_pppoe.c if (sc == NULL)
sc 672 net/if_pppoe.c sc->sc_session = session;
sc 673 net/if_pppoe.c timeout_del(&sc->sc_timeout);
sc 675 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname, session));
sc 676 net/if_pppoe.c sc->sc_state = PPPOE_STATE_SESSION;
sc 677 net/if_pppoe.c microtime(&sc->sc_session_time);
sc 678 net/if_pppoe.c sc->sc_sppp.pp_up(&sc->sc_sppp); /* notify upper layers */
sc 682 net/if_pppoe.c if (sc == NULL)
sc 686 net/if_pppoe.c timeout_del(&sc->sc_timeout);
sc 688 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname, session));
sc 691 net/if_pppoe.c sc->sc_state = PPPOE_STATE_INITIAL;
sc 692 net/if_pppoe.c memcpy(&sc->sc_dest, etherbroadcastaddr, sizeof(sc->sc_dest));
sc 693 net/if_pppoe.c if (sc->sc_ac_cookie) {
sc 694 net/if_pppoe.c free(sc->sc_ac_cookie, M_DEVBUF);
sc 695 net/if_pppoe.c sc->sc_ac_cookie = NULL;
sc 697 net/if_pppoe.c sc->sc_ac_cookie_len = 0;
sc 698 net/if_pppoe.c sc->sc_session = 0;
sc 699 net/if_pppoe.c sc->sc_session_time.tv_sec = 0;
sc 700 net/if_pppoe.c sc->sc_session_time.tv_usec = 0;
sc 701 net/if_pppoe.c sc->sc_sppp.pp_down(&sc->sc_sppp); /* signal upper layer */
sc 706 net/if_pppoe.c sc ? sc->sc_sppp.pp_if.if_xname : "pppoe",
sc 731 net/if_pppoe.c struct pppoe_softc *sc;
sc 766 net/if_pppoe.c sc = pppoe_find_softc_by_session(session, m->m_pkthdr.rcvif);
sc 767 net/if_pppoe.c if (sc == NULL) {
sc 779 net/if_pppoe.c if(sc->sc_sppp.pp_if.if_bpf)
sc 780 net/if_pppoe.c bpf_mtap(sc->sc_sppp.pp_if.if_bpf, m, BPF_DIRECTION_IN);
sc 790 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname,
sc 805 net/if_pppoe.c m->m_pkthdr.rcvif = &sc->sc_sppp.pp_if;
sc 808 net/if_pppoe.c sc->sc_sppp.pp_if.if_ipackets++;
sc 809 net/if_pppoe.c sppp_input(&sc->sc_sppp.pp_if, m);
sc 817 net/if_pppoe.c pppoe_output(struct pppoe_softc *sc, struct mbuf *m)
sc 823 net/if_pppoe.c if (sc->sc_eth_if == NULL) {
sc 828 net/if_pppoe.c if ((sc->sc_eth_if->if_flags & (IFF_UP|IFF_RUNNING))
sc 837 net/if_pppoe.c etype = sc->sc_state == PPPOE_STATE_SESSION ? ETHERTYPE_PPPOE : ETHERTYPE_PPPOEDISC;
sc 839 net/if_pppoe.c memcpy(&eh->ether_dhost, &sc->sc_dest, sizeof sc->sc_dest);
sc 842 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname, etype,
sc 843 net/if_pppoe.c sc->sc_state, sc->sc_session,
sc 844 net/if_pppoe.c ether_sprintf((unsigned char *)&sc->sc_dest), m->m_pkthdr.len));
sc 847 net/if_pppoe.c sc->sc_sppp.pp_if.if_opackets++;
sc 848 net/if_pppoe.c return (sc->sc_eth_if->if_output(sc->sc_eth_if, m, &dst, NULL));
sc 856 net/if_pppoe.c struct pppoe_softc *sc = (struct pppoe_softc *)ifp;
sc 868 net/if_pppoe.c sc->sc_eth_if = ifunit(parms->eth_ifname);
sc 869 net/if_pppoe.c if (sc->sc_eth_if == NULL)
sc 873 net/if_pppoe.c if (sc->sc_concentrator_name)
sc 874 net/if_pppoe.c free(sc->sc_concentrator_name, M_DEVBUF);
sc 875 net/if_pppoe.c sc->sc_concentrator_name = NULL;
sc 883 net/if_pppoe.c sc->sc_concentrator_name = p;
sc 886 net/if_pppoe.c if (sc->sc_service_name)
sc 887 net/if_pppoe.c free(sc->sc_service_name, M_DEVBUF);
sc 888 net/if_pppoe.c sc->sc_service_name = NULL;
sc 896 net/if_pppoe.c sc->sc_service_name = p;
sc 905 net/if_pppoe.c if (sc->sc_eth_if)
sc 906 net/if_pppoe.c strlcpy(parms->eth_ifname, sc->sc_eth_if->if_xname,
sc 911 net/if_pppoe.c if (sc->sc_concentrator_name)
sc 912 net/if_pppoe.c strlcpy(parms->ac_name, sc->sc_concentrator_name,
sc 917 net/if_pppoe.c if (sc->sc_service_name)
sc 918 net/if_pppoe.c strlcpy(parms->service_name, sc->sc_service_name,
sc 930 net/if_pppoe.c state->state = sc->sc_state;
sc 931 net/if_pppoe.c state->session_id = sc->sc_session;
sc 932 net/if_pppoe.c state->padi_retry_no = sc->sc_padi_retried;
sc 933 net/if_pppoe.c state->padr_retry_no = sc->sc_padr_retried;
sc 934 net/if_pppoe.c state->session_time.tv_sec = sc->sc_session_time.tv_sec;
sc 935 net/if_pppoe.c state->session_time.tv_usec = sc->sc_session_time.tv_usec;
sc 947 net/if_pppoe.c && sc->sc_state >= PPPOE_STATE_PADI_SENT
sc 948 net/if_pppoe.c && sc->sc_state < PPPOE_STATE_SESSION) {
sc 949 net/if_pppoe.c timeout_del(&sc->sc_timeout);
sc 950 net/if_pppoe.c sc->sc_state = PPPOE_STATE_INITIAL;
sc 951 net/if_pppoe.c sc->sc_padi_retried = 0;
sc 952 net/if_pppoe.c sc->sc_padr_retried = 0;
sc 953 net/if_pppoe.c memcpy(&sc->sc_dest, etherbroadcastaddr,
sc 954 net/if_pppoe.c sizeof(sc->sc_dest));
sc 1004 net/if_pppoe.c pppoe_send_padi(struct pppoe_softc *sc)
sc 1010 net/if_pppoe.c if (sc->sc_state > PPPOE_STATE_PADI_SENT)
sc 1011 net/if_pppoe.c panic("pppoe_send_padi in state %d", sc->sc_state);
sc 1014 net/if_pppoe.c len = 2 + 2 + 2 + 2 + sizeof(sc->sc_unique); /* service name tag is required, host unique is send too */
sc 1015 net/if_pppoe.c if (sc->sc_service_name != NULL) {
sc 1016 net/if_pppoe.c l1 = strlen(sc->sc_service_name);
sc 1019 net/if_pppoe.c if (sc->sc_concentrator_name != NULL) {
sc 1020 net/if_pppoe.c l2 = strlen(sc->sc_concentrator_name);
sc 1033 net/if_pppoe.c if (sc->sc_service_name != NULL) {
sc 1035 net/if_pppoe.c memcpy(p, sc->sc_service_name, l1);
sc 1040 net/if_pppoe.c if (sc->sc_concentrator_name != NULL) {
sc 1043 net/if_pppoe.c memcpy(p, sc->sc_concentrator_name, l2);
sc 1047 net/if_pppoe.c PPPOE_ADD_16(p, sizeof(sc->sc_unique));
sc 1048 net/if_pppoe.c memcpy(p, &sc->sc_unique, sizeof(sc->sc_unique));
sc 1051 net/if_pppoe.c p += sizeof(sc->sc_unique);
sc 1058 net/if_pppoe.c return (pppoe_output(sc, m0));
sc 1065 net/if_pppoe.c struct pppoe_softc *sc = (struct pppoe_softc *)arg;
sc 1068 net/if_pppoe.c PPPOEDEBUG(("%s: timeout\n", sc->sc_sppp.pp_if.if_xname));
sc 1070 net/if_pppoe.c switch (sc->sc_state) {
sc 1083 net/if_pppoe.c retry_wait = PPPOE_DISC_TIMEOUT * (1 + sc->sc_padi_retried);
sc 1086 net/if_pppoe.c sc->sc_padi_retried++;
sc 1087 net/if_pppoe.c if (sc->sc_padi_retried >= PPPOE_DISC_MAXPADI) {
sc 1088 net/if_pppoe.c if ((sc->sc_sppp.pp_if.if_flags & IFF_LINK1) == 0) {
sc 1092 net/if_pppoe.c pppoe_abort_connect(sc);
sc 1097 net/if_pppoe.c if ((err = pppoe_send_padi(sc)) != 0) {
sc 1098 net/if_pppoe.c sc->sc_padi_retried--;
sc 1100 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname, err));
sc 1102 net/if_pppoe.c timeout_add(&sc->sc_timeout, retry_wait);
sc 1108 net/if_pppoe.c sc->sc_padr_retried++;
sc 1109 net/if_pppoe.c if (sc->sc_padr_retried >= PPPOE_DISC_MAXPADR) {
sc 1110 net/if_pppoe.c memcpy(&sc->sc_dest, etherbroadcastaddr,
sc 1111 net/if_pppoe.c sizeof(sc->sc_dest));
sc 1112 net/if_pppoe.c sc->sc_state = PPPOE_STATE_PADI_SENT;
sc 1113 net/if_pppoe.c sc->sc_padr_retried = 0;
sc 1114 net/if_pppoe.c if ((err = pppoe_send_padi(sc)) != 0) {
sc 1116 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname, err));
sc 1118 net/if_pppoe.c timeout_add(&sc->sc_timeout,
sc 1119 net/if_pppoe.c PPPOE_DISC_TIMEOUT * (1 + sc->sc_padi_retried));
sc 1123 net/if_pppoe.c if ((err = pppoe_send_padr(sc)) != 0) {
sc 1124 net/if_pppoe.c sc->sc_padr_retried--;
sc 1126 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname, err));
sc 1128 net/if_pppoe.c timeout_add(&sc->sc_timeout,
sc 1129 net/if_pppoe.c PPPOE_DISC_TIMEOUT * (1 + sc->sc_padr_retried));
sc 1134 net/if_pppoe.c pppoe_disconnect(sc);
sc 1143 net/if_pppoe.c pppoe_connect(struct pppoe_softc *sc)
sc 1147 net/if_pppoe.c if (sc->sc_state != PPPOE_STATE_INITIAL)
sc 1152 net/if_pppoe.c if ((sc->sc_sppp.pp_if.if_flags & IFF_PASSIVE))
sc 1158 net/if_pppoe.c sc->sc_state = PPPOE_STATE_PADI_SENT;
sc 1159 net/if_pppoe.c sc->sc_padr_retried = 0;
sc 1160 net/if_pppoe.c err = pppoe_send_padi(sc);
sc 1163 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname, err));
sc 1165 net/if_pppoe.c timeout_add(&sc->sc_timeout, PPPOE_DISC_TIMEOUT);
sc 1173 net/if_pppoe.c pppoe_disconnect(struct pppoe_softc *sc)
sc 1179 net/if_pppoe.c if (sc->sc_state < PPPOE_STATE_SESSION)
sc 1183 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname));
sc 1184 net/if_pppoe.c err = pppoe_send_padt(sc->sc_eth_if, sc->sc_session, (const u_int8_t *)&sc->sc_dest);
sc 1188 net/if_pppoe.c sc->sc_state = PPPOE_STATE_INITIAL;
sc 1189 net/if_pppoe.c memcpy(&sc->sc_dest, etherbroadcastaddr, sizeof(sc->sc_dest));
sc 1190 net/if_pppoe.c if (sc->sc_ac_cookie) {
sc 1191 net/if_pppoe.c free(sc->sc_ac_cookie, M_DEVBUF);
sc 1192 net/if_pppoe.c sc->sc_ac_cookie = NULL;
sc 1194 net/if_pppoe.c sc->sc_ac_cookie_len = 0;
sc 1196 net/if_pppoe.c if (sc->sc_hunique) {
sc 1197 net/if_pppoe.c free(sc->sc_hunique, M_DEVBUF);
sc 1198 net/if_pppoe.c sc->sc_hunique = NULL;
sc 1200 net/if_pppoe.c sc->sc_hunique_len = 0;
sc 1202 net/if_pppoe.c sc->sc_session = 0;
sc 1205 net/if_pppoe.c sc->sc_sppp.pp_down(&sc->sc_sppp);
sc 1214 net/if_pppoe.c pppoe_abort_connect(struct pppoe_softc *sc)
sc 1217 net/if_pppoe.c sc->sc_sppp.pp_if.if_xname);
sc 1218 net/if_pppoe.c sc->sc_state = PPPOE_STATE_CLOSING;
sc 1221 net/if_pppoe.c sc->sc_sppp.pp_down(&sc->sc_sppp);
sc 1224 net/if_pppoe.c memcpy(&sc->sc_dest, etherbroadcastaddr, sizeof(sc->sc_dest));
sc 1225 net/if_pppoe.c sc->sc_state = PPPOE_STATE_INITIAL;
sc 1230 net/if_pppoe.c pppoe_send_padr(struct pppoe_softc *sc)
sc 1236 net/if_pppoe.c if (sc->sc_state != PPPOE_STATE_PADR_SENT)
sc 1239 net/if_pppoe.c len = 2 + 2 + 2 + 2 + sizeof(sc->sc_unique); /* service name, host unique */
sc 1240 net/if_pppoe.c if (sc->sc_service_name != NULL) { /* service name tag maybe empty */
sc 1241 net/if_pppoe.c l1 = strlen(sc->sc_service_name);
sc 1244 net/if_pppoe.c if (sc->sc_ac_cookie_len > 0)
sc 1245 net/if_pppoe.c len += 2 + 2 + sc->sc_ac_cookie_len; /* AC cookie */
sc 1255 net/if_pppoe.c if (sc->sc_service_name != NULL) {
sc 1257 net/if_pppoe.c memcpy(p, sc->sc_service_name, l1);
sc 1262 net/if_pppoe.c if (sc->sc_ac_cookie_len > 0) {
sc 1264 net/if_pppoe.c PPPOE_ADD_16(p, sc->sc_ac_cookie_len);
sc 1265 net/if_pppoe.c memcpy(p, sc->sc_ac_cookie, sc->sc_ac_cookie_len);
sc 1266 net/if_pppoe.c p += sc->sc_ac_cookie_len;
sc 1269 net/if_pppoe.c PPPOE_ADD_16(p, sizeof(sc->sc_unique));
sc 1270 net/if_pppoe.c memcpy(p, &sc->sc_unique, sizeof(sc->sc_unique));
sc 1273 net/if_pppoe.c p += sizeof(sc->sc_unique);
sc 1279 net/if_pppoe.c return (pppoe_output(sc, m0));
sc 1311 net/if_pppoe.c pppoe_send_pado(struct pppoe_softc *sc)
sc 1317 net/if_pppoe.c if (sc->sc_state != PPPOE_STATE_PADO_SENT)
sc 1323 net/if_pppoe.c len += 2 + 2 + sizeof(sc->sc_unique);
sc 1325 net/if_pppoe.c len += 2 + 2 + sc->sc_hunique_len;
sc 1334 net/if_pppoe.c PPPOE_ADD_16(p, sizeof(sc->sc_unique));
sc 1335 net/if_pppoe.c memcpy(p, &sc, sizeof(sc->sc_unique));
sc 1336 net/if_pppoe.c p += sizeof(sc->sc_unique);
sc 1338 net/if_pppoe.c PPPOE_ADD_16(p, sc->sc_hunique_len);
sc 1339 net/if_pppoe.c memcpy(p, sc->sc_hunique, sc->sc_hunique_len);
sc 1341 net/if_pppoe.c return (pppoe_output(sc, m0));
sc 1346 net/if_pppoe.c pppoe_send_pads(struct pppoe_softc *sc)
sc 1352 net/if_pppoe.c if (sc->sc_state != PPPOE_STATE_PADO_SENT)
sc 1355 net/if_pppoe.c sc->sc_session = mono_time.tv_sec % 0xff + 1;
sc 1360 net/if_pppoe.c len += 2 + 2 + 2 + 2 + sc->sc_hunique_len; /* service name, host unique */
sc 1361 net/if_pppoe.c if (sc->sc_service_name != NULL) { /* service name tag maybe empty */
sc 1362 net/if_pppoe.c l1 = strlen(sc->sc_service_name);
sc 1371 net/if_pppoe.c PPPOE_ADD_HEADER(p, PPPOE_CODE_PADS, sc->sc_session, len);
sc 1373 net/if_pppoe.c if (sc->sc_service_name != NULL) {
sc 1375 net/if_pppoe.c memcpy(p, sc->sc_service_name, l1);
sc 1381 net/if_pppoe.c PPPOE_ADD_16(p, sc->sc_hunique_len);
sc 1382 net/if_pppoe.c memcpy(p, sc->sc_hunique, sc->sc_hunique_len);
sc 1384 net/if_pppoe.c return (pppoe_output(sc, m0));
sc 1392 net/if_pppoe.c struct pppoe_softc *sc = (void *)sp;
sc 1394 net/if_pppoe.c if (sc->sc_state != PPPOE_STATE_INITIAL)
sc 1396 net/if_pppoe.c pppoe_connect(sc);
sc 1403 net/if_pppoe.c struct pppoe_softc *sc = (void *)sp;
sc 1405 net/if_pppoe.c if (sc->sc_state < PPPOE_STATE_SESSION)
sc 1412 net/if_pppoe.c sc->sc_state = PPPOE_STATE_CLOSING;
sc 1413 net/if_pppoe.c timeout_add(&sc->sc_timeout, hz / 50);
sc 1419 net/if_pppoe.c struct pppoe_softc *sc = (void *)ifp;
sc 1428 net/if_pppoe.c if (sc->sc_state < PPPOE_STATE_SESSION) {
sc 1429 net/if_pppoe.c sppp_flush(&sc->sc_sppp.pp_if);
sc 1441 net/if_pppoe.c PPPOE_ADD_HEADER(p, 0, sc->sc_session, len);
sc 1444 net/if_pppoe.c if(sc->sc_sppp.pp_if.if_bpf)
sc 1445 net/if_pppoe.c bpf_mtap(sc->sc_sppp.pp_if.if_bpf, m,
sc 1449 net/if_pppoe.c pppoe_output(sc, m);
sc 140 net/if_pppvar.h void pppdealloc(struct ppp_softc *sc);
sc 141 net/if_pppvar.h int pppioctl(struct ppp_softc *sc, u_long cmd, caddr_t data,
sc 143 net/if_pppvar.h void ppppktin(struct ppp_softc *sc, struct mbuf *m, int lost);
sc 144 net/if_pppvar.h struct mbuf *ppp_dequeue(struct ppp_softc *sc);
sc 145 net/if_pppvar.h void ppp_restart(struct ppp_softc *sc);
sc 206 net/if_sl.c struct sl_softc *sc;
sc 209 net/if_sl.c sc = malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT);
sc 210 net/if_sl.c if (!sc)
sc 212 net/if_sl.c bzero(sc, sizeof(*sc));
sc 214 net/if_sl.c sc->sc_unit = unit; /* XXX */
sc 215 net/if_sl.c snprintf(sc->sc_if.if_xname, sizeof sc->sc_if.if_xname, "%s%d",
sc 217 net/if_sl.c sc->sc_if.if_softc = sc;
sc 218 net/if_sl.c sc->sc_if.if_mtu = SLMTU;
sc 219 net/if_sl.c sc->sc_if.if_flags =
sc 221 net/if_sl.c sc->sc_if.if_type = IFT_SLIP;
sc 222 net/if_sl.c sc->sc_if.if_ioctl = slioctl;
sc 223 net/if_sl.c sc->sc_if.if_output = sloutput;
sc 224 net/if_sl.c IFQ_SET_MAXLEN(&sc->sc_if.if_snd, 50);
sc 225 net/if_sl.c sc->sc_fastq.ifq_maxlen = 32;
sc 226 net/if_sl.c IFQ_SET_READY(&sc->sc_if.if_snd);
sc 227 net/if_sl.c if_attach(&sc->sc_if);
sc 228 net/if_sl.c if_alloc_sadl(&sc->sc_if);
sc 230 net/if_sl.c bpfattach(&sc->sc_bpf, &sc->sc_if, DLT_SLIP, SLIP_HDRLEN);
sc 233 net/if_sl.c LIST_INSERT_HEAD(&sl_softc_list, sc, sc_list);
sc 243 net/if_sl.c struct sl_softc *sc = ifp->if_softc;
sc 246 net/if_sl.c if (sc->sc_ttyp != NULL)
sc 250 net/if_sl.c LIST_REMOVE(sc, sc_list);
sc 255 net/if_sl.c free(sc, M_DEVBUF);
sc 260 net/if_sl.c slinit(sc)
sc 261 net/if_sl.c struct sl_softc *sc;
sc 263 net/if_sl.c if (sc->sc_ep == (u_char *) 0) {
sc 264 net/if_sl.c MGETHDR(sc->sc_mbuf, M_WAIT, MT_DATA);
sc 265 net/if_sl.c if (sc->sc_mbuf)
sc 266 net/if_sl.c MCLGET(sc->sc_mbuf, M_WAIT);
sc 267 net/if_sl.c if (sc->sc_mbuf == NULL || sc->sc_mbuf->m_ext.ext_buf == NULL) {
sc 268 net/if_sl.c printf("sl%d: can't allocate buffer\n", sc->sc_unit);
sc 269 net/if_sl.c sc->sc_if.if_flags &= ~IFF_UP;
sc 273 net/if_sl.c sc->sc_ep = (u_char *) sc->sc_mbuf->m_ext.ext_buf +
sc 274 net/if_sl.c sc->sc_mbuf->m_ext.ext_size;
sc 275 net/if_sl.c sc->sc_mp = sc->sc_pktstart = (u_char *) sc->sc_mbuf->m_ext.ext_buf +
sc 278 net/if_sl.c sl_compress_init(&sc->sc_comp);
sc 294 net/if_sl.c struct sl_softc *sc;
sc 303 net/if_sl.c LIST_FOREACH(sc, &sl_softc_list, sc_list)
sc 304 net/if_sl.c if (sc->sc_ttyp == NULL) {
sc 305 net/if_sl.c if (slinit(sc) == 0)
sc 307 net/if_sl.c tp->t_sc = (caddr_t)sc;
sc 308 net/if_sl.c sc->sc_ttyp = tp;
sc 309 net/if_sl.c sc->sc_if.if_baudrate = tp->t_ospeed;
sc 325 net/if_sl.c sc->sc_oldbufsize = tp->t_outq.c_cn;
sc 326 net/if_sl.c sc->sc_oldbufquot = tp->t_outq.c_cq != 0;
sc 335 net/if_sl.c sc->sc_oldbufsize = sc->sc_oldbufquot = 0;
sc 351 net/if_sl.c struct sl_softc *sc;
sc 356 net/if_sl.c sc = (struct sl_softc *)tp->t_sc;
sc 357 net/if_sl.c if (sc != NULL) {
sc 360 net/if_sl.c if_down(&sc->sc_if);
sc 361 net/if_sl.c sc->sc_ttyp = NULL;
sc 364 net/if_sl.c m_freem(sc->sc_mbuf);
sc 365 net/if_sl.c sc->sc_mbuf = NULL;
sc 366 net/if_sl.c sc->sc_ep = sc->sc_mp = sc->sc_pktstart = NULL;
sc 370 net/if_sl.c if (sc->sc_oldbufsize != 0) {
sc 372 net/if_sl.c clalloc(&tp->t_outq, sc->sc_oldbufsize, sc->sc_oldbufquot);
sc 391 net/if_sl.c struct sl_softc *sc = (struct sl_softc *)tp->t_sc;
sc 395 net/if_sl.c *(int *)data = sc->sc_unit; /* XXX */
sc 417 net/if_sl.c struct sl_softc *sc = ifp->if_softc;
sc 426 net/if_sl.c printf("%s: af%d not supported\n", sc->sc_if.if_xname,
sc 429 net/if_sl.c sc->sc_if.if_noproto++;
sc 433 net/if_sl.c if (sc->sc_ttyp == NULL) {
sc 437 net/if_sl.c if ((sc->sc_ttyp->t_state & TS_CARR_ON) == 0 &&
sc 438 net/if_sl.c (sc->sc_ttyp->t_cflag & CLOCAL) == 0) {
sc 443 net/if_sl.c if (sc->sc_if.if_flags & SC_NOICMP && ip->ip_p == IPPROTO_ICMP) {
sc 448 net/if_sl.c if (sc->sc_oqlen && sc->sc_ttyp->t_outq.c_cc == sc->sc_oqlen) {
sc 453 net/if_sl.c timersub(&tm, &sc->sc_lastpacket, &tv);
sc 455 net/if_sl.c sc->sc_otimeout++;
sc 456 net/if_sl.c slstart(sc->sc_ttyp);
sc 461 net/if_sl.c IFQ_ENQUEUE(&sc->sc_if.if_snd, m, NULL, error);
sc 464 net/if_sl.c sc->sc_if.if_oerrors++;
sc 469 net/if_sl.c getmicrotime(&sc->sc_lastpacket);
sc 470 net/if_sl.c if ((sc->sc_oqlen = sc->sc_ttyp->t_outq.c_cc) == 0)
sc 471 net/if_sl.c slstart(sc->sc_ttyp);
sc 485 net/if_sl.c struct sl_softc *sc = (struct sl_softc *)tp->t_sc;
sc 513 net/if_sl.c if (sc == NULL)
sc 531 net/if_sl.c IF_DEQUEUE(&sc->sc_fastq, m);
sc 533 net/if_sl.c sc->sc_if.if_omcasts++; /* XXX */
sc 535 net/if_sl.c IFQ_DEQUEUE(&sc->sc_if.if_snd, m);
sc 547 net/if_sl.c if (sc->sc_bpf) {
sc 570 net/if_sl.c if (sc->sc_if.if_flags & SC_COMPRESS)
sc 572 net/if_sl.c &sc->sc_comp, 1);
sc 575 net/if_sl.c if (sc->sc_bpf) {
sc 583 net/if_sl.c bpf_tap(sc->sc_bpf, bpfbuf, len + SLIP_HDRLEN,
sc 587 net/if_sl.c getmicrotime(&sc->sc_lastpacket);
sc 597 net/if_sl.c sc->sc_if.if_collisions++;
sc 607 net/if_sl.c ++sc->sc_if.if_obytes;
sc 643 net/if_sl.c sc->sc_if.if_obytes += cp - bp;
sc 659 net/if_sl.c sc->sc_if.if_obytes += 2;
sc 676 net/if_sl.c sc->sc_if.if_collisions++;
sc 678 net/if_sl.c ++sc->sc_if.if_obytes;
sc 679 net/if_sl.c sc->sc_if.if_opackets++;
sc 688 net/if_sl.c sl_btom(sc, len)
sc 689 net/if_sl.c struct sl_softc *sc;
sc 697 net/if_sl.c m = sc->sc_mbuf;
sc 698 net/if_sl.c MGETHDR(sc->sc_mbuf, M_DONTWAIT, MT_DATA);
sc 699 net/if_sl.c if (sc->sc_mbuf == NULL) {
sc 700 net/if_sl.c sc->sc_mbuf = m;
sc 703 net/if_sl.c MCLGET(sc->sc_mbuf, M_DONTWAIT);
sc 704 net/if_sl.c if ((sc->sc_mbuf->m_flags & M_EXT) == 0) {
sc 709 net/if_sl.c m_freem(sc->sc_mbuf);
sc 710 net/if_sl.c sc->sc_mbuf = m;
sc 713 net/if_sl.c sc->sc_ep = (u_char *) sc->sc_mbuf->m_ext.ext_buf +
sc 714 net/if_sl.c sc->sc_mbuf->m_ext.ext_size;
sc 716 net/if_sl.c m->m_data = sc->sc_pktstart;
sc 720 net/if_sl.c m->m_pkthdr.rcvif = &sc->sc_if;
sc 732 net/if_sl.c struct sl_softc *sc;
sc 741 net/if_sl.c sc = (struct sl_softc *)tp->t_sc;
sc 742 net/if_sl.c if (sc == NULL)
sc 746 net/if_sl.c sc->sc_flags |= SC_ERROR;
sc 751 net/if_sl.c ++sc->sc_if.if_ibytes;
sc 753 net/if_sl.c if (sc->sc_if.if_flags & IFF_DEBUG) {
sc 759 net/if_sl.c if (sc->sc_abortcount &&
sc 760 net/if_sl.c time_second >= sc->sc_starttime + ABT_WINDOW)
sc 761 net/if_sl.c sc->sc_abortcount = 0;
sc 766 net/if_sl.c if (time_second >= sc->sc_lasttime + ABT_IDLE) {
sc 767 net/if_sl.c if (++sc->sc_abortcount == 1)
sc 768 net/if_sl.c sc->sc_starttime = time_second;
sc 769 net/if_sl.c if (sc->sc_abortcount >= ABT_COUNT) {
sc 775 net/if_sl.c sc->sc_abortcount = 0;
sc 776 net/if_sl.c sc->sc_lasttime = time_second;
sc 782 net/if_sl.c if (sc->sc_escape)
sc 787 net/if_sl.c if (sc->sc_escape)
sc 792 net/if_sl.c sc->sc_escape = 1;
sc 796 net/if_sl.c if(sc->sc_flags & SC_ERROR) {
sc 797 net/if_sl.c sc->sc_flags &= ~SC_ERROR;
sc 800 net/if_sl.c len = sc->sc_mp - sc->sc_pktstart;
sc 806 net/if_sl.c if (sc->sc_bpf) {
sc 815 net/if_sl.c bcopy(sc->sc_pktstart, chdr, CHDR_LEN);
sc 819 net/if_sl.c if ((c = (*sc->sc_pktstart & 0xf0)) != (IPVERSION << 4)) {
sc 823 net/if_sl.c *sc->sc_pktstart &= 0x4f; /* XXX */
sc 831 net/if_sl.c if (sc->sc_if.if_flags & SC_COMPRESS) {
sc 832 net/if_sl.c len = sl_uncompress_tcp(&sc->sc_pktstart, len,
sc 833 net/if_sl.c (u_int)c, &sc->sc_comp);
sc 836 net/if_sl.c } else if ((sc->sc_if.if_flags & SC_AUTOCOMP) &&
sc 838 net/if_sl.c len = sl_uncompress_tcp(&sc->sc_pktstart, len,
sc 839 net/if_sl.c (u_int)c, &sc->sc_comp);
sc 842 net/if_sl.c sc->sc_if.if_flags |= SC_COMPRESS;
sc 847 net/if_sl.c m = sl_btom(sc, len);
sc 852 net/if_sl.c if (sc->sc_bpf) {
sc 870 net/if_sl.c bpf_mtap(sc->sc_bpf, m, BPF_DIRECTION_IN);
sc 877 net/if_sl.c sc->sc_if.if_ipackets++;
sc 878 net/if_sl.c getmicrotime(&sc->sc_lastpacket);
sc 882 net/if_sl.c sc->sc_if.if_ierrors++;
sc 883 net/if_sl.c sc->sc_if.if_iqdrops++;
sc 894 net/if_sl.c if (sc->sc_mp < sc->sc_ep) {
sc 895 net/if_sl.c *sc->sc_mp++ = c;
sc 896 net/if_sl.c sc->sc_escape = 0;
sc 901 net/if_sl.c sc->sc_flags |= SC_ERROR;
sc 904 net/if_sl.c sc->sc_if.if_ierrors++;
sc 906 net/if_sl.c sc->sc_mp = sc->sc_pktstart = (u_char *) sc->sc_mbuf->m_ext.ext_buf +
sc 908 net/if_sl.c sc->sc_escape = 0;
sc 920 net/if_sl.c struct sl_softc *sc = ifp->if_softc;
sc 964 net/if_sl.c slsp->sl.sl_ibytes = sc->sc_if.if_ibytes;
sc 965 net/if_sl.c slsp->sl.sl_obytes = sc->sc_if.if_obytes;
sc 966 net/if_sl.c slsp->sl.sl_ipackets = sc->sc_if.if_ipackets;
sc 967 net/if_sl.c slsp->sl.sl_opackets = sc->sc_if.if_opackets;
sc 969 net/if_sl.c slsp->vj.vjs_packets = sc->sc_comp.sls_packets;
sc 970 net/if_sl.c slsp->vj.vjs_compressed = sc->sc_comp.sls_compressed;
sc 971 net/if_sl.c slsp->vj.vjs_searches = sc->sc_comp.sls_searches;
sc 972 net/if_sl.c slsp->vj.vjs_misses = sc->sc_comp.sls_misses;
sc 973 net/if_sl.c slsp->vj.vjs_uncompressedin = sc->sc_comp.sls_uncompressedin;
sc 974 net/if_sl.c slsp->vj.vjs_compressedin = sc->sc_comp.sls_compressedin;
sc 975 net/if_sl.c slsp->vj.vjs_errorin = sc->sc_comp.sls_errorin;
sc 976 net/if_sl.c slsp->vj.vjs_tossed = sc->sc_comp.sls_tossed;
sc 261 net/if_strip.c static void RecvErr(char *msg, struct st_softc *sc);
sc 264 net/if_strip.c void strip_resetradio(struct st_softc *sc, struct tty *tp);
sc 265 net/if_strip.c void strip_proberadio(struct st_softc *sc, struct tty *tp);
sc 267 net/if_strip.c void strip_sendbody(struct st_softc *sc, struct mbuf *m);
sc 268 net/if_strip.c int strip_newpacket(struct st_softc *sc, u_char *ptr, u_char *end);
sc 269 net/if_strip.c struct mbuf * strip_send(struct st_softc *sc, struct mbuf *m0);
sc 312 net/if_strip.c #define CLEAR_RESET_TIMER(sc) \
sc 314 net/if_strip.c (sc)->sc_state = ST_ALIVE; \
sc 315 net/if_strip.c (sc)->sc_statetimo = time_second + ST_PROBE_INTERVAL; \
sc 322 net/if_strip.c #define FORCE_RESET(sc) \
sc 324 net/if_strip.c (sc)->sc_statetimo = time_second - 1; \
sc 325 net/if_strip.c (sc)->sc_state = ST_DEAD; \
sc 329 net/if_strip.c #define RADIO_PROBE_TIMEOUT(sc) \
sc 330 net/if_strip.c ((sc)-> sc_statetimo > time_second)
sc 341 net/if_strip.c struct st_softc *sc;
sc 344 net/if_strip.c for (sc = st_softc; i < NSTRIP; sc++) {
sc 345 net/if_strip.c timeout_set(&sc->sc_timo, strip_timeout, sc);
sc 346 net/if_strip.c sc->sc_unit = i; /* XXX */
sc 347 net/if_strip.c snprintf(sc->sc_if.if_xname, sizeof sc->sc_if.if_xname,
sc 349 net/if_strip.c sc->sc_if.if_softc = sc;
sc 350 net/if_strip.c sc->sc_if.if_mtu = SLMTU;
sc 351 net/if_strip.c sc->sc_if.if_flags = 0;
sc 352 net/if_strip.c sc->sc_if.if_type = IFT_OTHER;
sc 354 net/if_strip.c sc->sc_if.if_flags |= SC_AUTOCOMP /* | IFF_POINTOPOINT | IFF_MULTICAST*/;
sc 356 net/if_strip.c sc->sc_if.if_type = IFT_SLIP;
sc 357 net/if_strip.c sc->sc_if.if_ioctl = stripioctl;
sc 358 net/if_strip.c sc->sc_if.if_output = stripoutput;
sc 359 net/if_strip.c IFQ_SET_MAXLEN(&sc->sc_if.if_snd, 50);
sc 360 net/if_strip.c sc->sc_fastq.ifq_maxlen = 32;
sc 362 net/if_strip.c sc->sc_if.if_watchdog = strip_watchdog;
sc 363 net/if_strip.c sc->sc_if.if_timer = STRIP_WATCHDOG_INTERVAL;
sc 364 net/if_strip.c IFQ_SET_READY(&sc->sc_if.if_snd);
sc 365 net/if_strip.c if_attach(&sc->sc_if);
sc 366 net/if_strip.c if_alloc_sadl(&sc->sc_if);
sc 368 net/if_strip.c bpfattach(&sc->sc_bpf, &sc->sc_if, DLT_SLIP, SLIP_HDRLEN);
sc 374 net/if_strip.c stripinit(sc)
sc 375 net/if_strip.c struct st_softc *sc;
sc 379 net/if_strip.c if (sc->sc_ep == (u_char *) 0) {
sc 382 net/if_strip.c sc->sc_ep = (u_char *)p + SLBUFSIZE;
sc 385 net/if_strip.c sc->sc_if.if_xname);
sc 386 net/if_strip.c sc->sc_if.if_flags &= ~IFF_UP;
sc 392 net/if_strip.c if (sc->sc_rxbuf == (u_char *) 0) {
sc 395 net/if_strip.c sc->sc_rxbuf = (u_char *)p + SLBUFSIZE - SLMAX;
sc 398 net/if_strip.c sc->sc_if.if_xname);
sc 399 net/if_strip.c sc->sc_if.if_flags &= ~IFF_UP;
sc 405 net/if_strip.c if (sc->sc_txbuf == (u_char *) 0) {
sc 408 net/if_strip.c sc->sc_txbuf = (u_char *)p + SLBUFSIZE - SLMAX;
sc 411 net/if_strip.c sc->sc_if.if_xname);
sc 413 net/if_strip.c sc->sc_if.if_flags &= ~IFF_UP;
sc 418 net/if_strip.c sc->sc_buf = sc->sc_ep - SLMAX;
sc 419 net/if_strip.c sc->sc_mp = sc->sc_buf;
sc 420 net/if_strip.c sl_compress_init(&sc->sc_comp);
sc 423 net/if_strip.c sc->sc_state = ST_DEAD; /* assumet the worst. */
sc 424 net/if_strip.c sc->sc_statetimo = time_second; /* do reset immediately */
sc 440 net/if_strip.c struct st_softc *sc;
sc 453 net/if_strip.c for (nstrip = NSTRIP, sc = st_softc; --nstrip >= 0; sc++)
sc 454 net/if_strip.c if (sc->sc_ttyp == NULL) {
sc 455 net/if_strip.c if (stripinit(sc) == 0)
sc 457 net/if_strip.c tp->t_sc = (caddr_t)sc;
sc 458 net/if_strip.c sc->sc_ttyp = tp;
sc 459 net/if_strip.c sc->sc_if.if_baudrate = tp->t_ospeed;
sc 472 net/if_strip.c sc->sc_oldbufsize = tp->t_outq.c_cn;
sc 473 net/if_strip.c sc->sc_oldbufquot = tp->t_outq.c_cq != 0;
sc 482 net/if_strip.c sc->sc_oldbufsize = sc->sc_oldbufquot = 0;
sc 486 net/if_strip.c strip_resetradio(sc, tp);
sc 502 net/if_strip.c struct st_softc *sc;
sc 509 net/if_strip.c sc = (struct st_softc *)tp->t_sc;
sc 510 net/if_strip.c if (sc != NULL) {
sc 511 net/if_strip.c if_down(&sc->sc_if);
sc 512 net/if_strip.c sc->sc_ttyp = NULL;
sc 514 net/if_strip.c MCLFREE((caddr_t)(sc->sc_ep - SLBUFSIZE));
sc 515 net/if_strip.c MCLFREE((caddr_t)(sc->sc_rxbuf - SLBUFSIZE + SLMAX)); /* XXX */
sc 516 net/if_strip.c MCLFREE((caddr_t)(sc->sc_txbuf - SLBUFSIZE + SLMAX)); /* XXX */
sc 517 net/if_strip.c sc->sc_ep = 0;
sc 518 net/if_strip.c sc->sc_mp = 0;
sc 519 net/if_strip.c sc->sc_buf = 0;
sc 520 net/if_strip.c sc->sc_rxbuf = 0;
sc 521 net/if_strip.c sc->sc_txbuf = 0;
sc 523 net/if_strip.c if (sc->sc_flags & SC_TIMEOUT) {
sc 524 net/if_strip.c timeout_del(&sc->sc_timo);
sc 525 net/if_strip.c sc->sc_flags &= ~SC_TIMEOUT;
sc 530 net/if_strip.c if (sc->sc_oldbufsize != 0) {
sc 532 net/if_strip.c clalloc(&tp->t_outq, sc->sc_oldbufsize, sc->sc_oldbufquot);
sc 550 net/if_strip.c struct st_softc *sc = (struct st_softc *)tp->t_sc;
sc 554 net/if_strip.c *(int *)data = sc->sc_unit;
sc 568 net/if_strip.c strip_sendbody(sc, m)
sc 569 net/if_strip.c struct st_softc *sc;
sc 572 net/if_strip.c struct tty *tp = sc->sc_ttyp;
sc 573 net/if_strip.c u_char *dp = sc->sc_txbuf;
sc 596 net/if_strip.c len = dp - sc->sc_txbuf;
sc 597 net/if_strip.c if (b_to_q((ttychar_t *)sc->sc_txbuf,
sc 599 net/if_strip.c if (sc->sc_if.if_flags & IFF_DEBUG)
sc 601 net/if_strip.c sc->sc_if.if_xname);
sc 604 net/if_strip.c sc->sc_if.if_obytes += len;
sc 622 net/if_strip.c strip_send(sc, m0)
sc 623 net/if_strip.c struct st_softc *sc;
sc 626 net/if_strip.c struct tty *tp = sc->sc_ttyp;
sc 634 net/if_strip.c if (sc->sc_if.if_flags & IFF_DEBUG)
sc 636 net/if_strip.c sc->sc_if.if_xname);
sc 650 net/if_strip.c sc->sc_if.if_xname, m0->m_len); /*XXX*/
sc 664 net/if_strip.c strip_sendbody(sc, m0);
sc 676 net/if_strip.c sc->sc_if.if_collisions++;
sc 678 net/if_strip.c ++sc->sc_if.if_obytes;
sc 679 net/if_strip.c sc->sc_if.if_opackets++;
sc 686 net/if_strip.c if (time_second >= sc->sc_statetimo && sc->sc_state == ST_ALIVE)
sc 687 net/if_strip.c strip_proberadio(sc, tp);
sc 707 net/if_strip.c struct st_softc *sc = ifp->if_softc;
sc 718 net/if_strip.c if (sc->sc_ttyp == NULL) {
sc 722 net/if_strip.c if ((sc->sc_ttyp->t_state & TS_CARR_ON) == 0 &&
sc 723 net/if_strip.c (sc->sc_ttyp->t_cflag & CLOCAL) == 0) {
sc 769 net/if_strip.c addlog("%s: af %d not supported\n", sc->sc_if.if_xname,
sc 772 net/if_strip.c sc->sc_if.if_noproto++;
sc 778 net/if_strip.c if (sc->sc_if.if_flags & SC_NOICMP && ip->ip_p == IPPROTO_ICMP) {
sc 784 net/if_strip.c && ALTQ_IS_ENABLED(&sc->sc_if.if_snd) == 0
sc 787 net/if_strip.c ifq = &sc->sc_fastq;
sc 832 net/if_strip.c if (sc->sc_oqlen && sc->sc_ttyp->t_outq.c_cc == sc->sc_oqlen) {
sc 837 net/if_strip.c timersub(&tm, &sc->sc_lastpacket, &tv);
sc 840 net/if_strip.c sc->sc_otimeout++;
sc 841 net/if_strip.c stripstart(sc->sc_ttyp);
sc 856 net/if_strip.c IFQ_ENQUEUE(&sc->sc_if.if_snd, m, NULL, error);
sc 859 net/if_strip.c sc->sc_if.if_oerrors++;
sc 864 net/if_strip.c getmicrotime(&sc->sc_lastpacket);
sc 865 net/if_strip.c if ((sc->sc_oqlen = sc->sc_ttyp->t_outq.c_cc) == 0) {
sc 866 net/if_strip.c stripstart(sc->sc_ttyp);
sc 873 net/if_strip.c stripstart(sc->sc_ttyp);
sc 890 net/if_strip.c struct st_softc *sc = (struct st_softc *)tp->t_sc;
sc 910 net/if_strip.c || sc == NULL || tp != (struct tty *) sc->sc_ttyp) {
sc 913 net/if_strip.c if (sc && (sc->sc_if.if_flags & IFF_DEBUG))
sc 915 net/if_strip.c sc->sc_if.if_xname);
sc 928 net/if_strip.c if (sc == NULL) {
sc 949 net/if_strip.c IF_DEQUEUE(&sc->sc_fastq, m);
sc 951 net/if_strip.c sc->sc_if.if_omcasts++; /* XXX */
sc 953 net/if_strip.c IFQ_DEQUEUE(&sc->sc_if.if_snd, m);
sc 965 net/if_strip.c if (sc->sc_bpf) {
sc 988 net/if_strip.c if (sc->sc_if.if_flags & SC_COMPRESS)
sc 990 net/if_strip.c &sc->sc_comp, 1);
sc 993 net/if_strip.c if (sc->sc_bpf) {
sc 1003 net/if_strip.c bpf_tap(sc->sc_bpf, cp, len + SLIP_HDRLEN,
sc 1007 net/if_strip.c getmicrotime(&sc->sc_lastpacket);
sc 1017 net/if_strip.c sc->sc_if.if_collisions++;
sc 1022 net/if_strip.c if (strip_send(sc, m) == NULL) {
sc 1030 net/if_strip.c if ((sc->sc_flags & SC_TIMEOUT) == 0) {
sc 1031 net/if_strip.c timeout_add(&sc->sc_timo, hz);
sc 1032 net/if_strip.c sc->sc_flags |= SC_TIMEOUT;
sc 1042 net/if_strip.c if ((sc->sc_flags & SC_TIMEOUT) == 0) {
sc 1043 net/if_strip.c timeout_add(&sc->sc_timo, hz);
sc 1044 net/if_strip.c sc->sc_flags |= SC_TIMEOUT;
sc 1067 net/if_strip.c strip_btom(sc, len)
sc 1068 net/if_strip.c struct st_softc *sc;
sc 1094 net/if_strip.c sc->sc_ep = mtod(m, u_char *) + SLBUFSIZE;
sc 1095 net/if_strip.c m->m_data = (caddr_t)sc->sc_buf;
sc 1096 net/if_strip.c m->m_ext.ext_buf = (caddr_t)((long)sc->sc_buf &~ MCLOFSET);
sc 1098 net/if_strip.c bcopy((caddr_t)sc->sc_buf, mtod(m, caddr_t), len);
sc 1102 net/if_strip.c m->m_pkthdr.rcvif = &sc->sc_if;
sc 1119 net/if_strip.c struct st_softc *sc;
sc 1128 net/if_strip.c sc = (struct st_softc *)tp->t_sc;
sc 1129 net/if_strip.c if (sc == NULL)
sc 1133 net/if_strip.c sc->sc_flags |= SC_ERROR;
sc 1139 net/if_strip.c ++sc->sc_if.if_ibytes;
sc 1153 net/if_strip.c if (sc->sc_mp - sc->sc_buf == 0)
sc 1159 net/if_strip.c if (sc->sc_mp < sc->sc_ep) {
sc 1160 net/if_strip.c *sc->sc_mp++ = c;
sc 1162 net/if_strip.c sc->sc_flags |= SC_ERROR;
sc 1177 net/if_strip.c len = sc->sc_mp - sc->sc_buf;
sc 1180 net/if_strip.c if (len < 15 || sc->sc_flags & SC_ERROR)
sc 1182 net/if_strip.c len, sc->sc_flags & SC_ERROR); /*XXX*/
sc 1184 net/if_strip.c if(sc->sc_flags & SC_ERROR) {
sc 1185 net/if_strip.c sc->sc_flags &= ~SC_ERROR;
sc 1187 net/if_strip.c sc->sc_if.if_xname);
sc 1196 net/if_strip.c len = strip_newpacket(sc, sc->sc_buf, sc->sc_mp);
sc 1203 net/if_strip.c if (sc->sc_bpf) {
sc 1212 net/if_strip.c bcopy(sc->sc_buf, chdr, CHDR_LEN);
sc 1216 net/if_strip.c if ((c = (*sc->sc_buf & 0xf0)) != (IPVERSION << 4)) {
sc 1220 net/if_strip.c *sc->sc_buf &= 0x4f; /* XXX */
sc 1228 net/if_strip.c if (sc->sc_if.if_flags & SC_COMPRESS) {
sc 1229 net/if_strip.c len = sl_uncompress_tcp(&sc->sc_buf, len,
sc 1230 net/if_strip.c (u_int)c, &sc->sc_comp);
sc 1233 net/if_strip.c } else if ((sc->sc_if.if_flags & SC_AUTOCOMP) &&
sc 1235 net/if_strip.c len = sl_uncompress_tcp(&sc->sc_buf, len,
sc 1236 net/if_strip.c (u_int)c, &sc->sc_comp);
sc 1239 net/if_strip.c sc->sc_if.if_flags |= SC_COMPRESS;
sc 1245 net/if_strip.c if (sc->sc_bpf) {
sc 1252 net/if_strip.c u_char *hp = sc->sc_buf - SLIP_HDRLEN;
sc 1256 net/if_strip.c bpf_tap(sc->sc_bpf, hp, len + SLIP_HDRLEN, BPF_DIRECTION_IN);
sc 1259 net/if_strip.c m = strip_btom(sc, len);
sc 1264 net/if_strip.c sc->sc_if.if_ipackets++;
sc 1265 net/if_strip.c getmicrotime(&sc->sc_lastpacket);
sc 1269 net/if_strip.c sc->sc_if.if_ierrors++;
sc 1270 net/if_strip.c sc->sc_if.if_iqdrops++;
sc 1282 net/if_strip.c sc->sc_if.if_ierrors++;
sc 1286 net/if_strip.c sc->sc_mp = sc->sc_buf = sc->sc_ep - SLMAX;
sc 1357 net/if_strip.c strip_resetradio(sc, tp)
sc 1358 net/if_strip.c struct st_softc *sc;
sc 1381 net/if_strip.c sc->sc_if.if_obytes += sizeof(InitString) - 1;
sc 1388 net/if_strip.c sc->sc_state = ST_DEAD;
sc 1389 net/if_strip.c getmicrotime(&sc->sc_lastpacket);
sc 1390 net/if_strip.c sc->sc_statetimo = time_second + STRIP_RESET_INTERVAL;
sc 1395 net/if_strip.c (*sc->sc_ttyp->t_oproc)(tp);
sc 1410 net/if_strip.c strip_proberadio(sc, tp)
sc 1411 net/if_strip.c struct st_softc *sc;
sc 1418 net/if_strip.c if (sc->sc_if.if_flags & IFF_DEBUG)
sc 1419 net/if_strip.c addlog("%s: attempting to probe radio\n", sc->sc_if.if_xname);
sc 1422 net/if_strip.c addlog("%s: no tty attached\n", sc->sc_if.if_xname);
sc 1428 net/if_strip.c if (sc->sc_if.if_flags & IFF_DEBUG)
sc 1430 net/if_strip.c sc->sc_if.if_xname);
sc 1432 net/if_strip.c sc->sc_state = ST_PROBE_SENT;
sc 1433 net/if_strip.c sc->sc_statetimo = time_second + ST_PROBERESPONSE_INTERVAL;
sc 1436 net/if_strip.c sc->sc_if.if_xname, overflow);
sc 1458 net/if_strip.c struct st_softc *sc = (struct st_softc *) x;
sc 1459 net/if_strip.c struct tty *tp = sc->sc_ttyp;
sc 1463 net/if_strip.c sc->sc_flags &= ~SC_TIMEOUT;
sc 1494 net/if_strip.c struct st_softc *sc = ifp->if_softc;
sc 1495 net/if_strip.c struct tty *tp = sc->sc_ttyp;
sc 1501 net/if_strip.c ((unsigned) sc->sc_state < 3) ?
sc 1502 net/if_strip.c strip_statenames[sc->sc_state] : "<<illegal state>>",
sc 1503 net/if_strip.c sc->sc_statetimo - time_second);
sc 1509 net/if_strip.c if ((ifp->if_flags & IFF_UP) == 0 || sc->sc_statetimo > time_second) {
sc 1517 net/if_strip.c switch (sc->sc_state) {
sc 1525 net/if_strip.c strip_proberadio(sc, sc->sc_ttyp);
sc 1535 net/if_strip.c strip_resetradio(sc, sc->sc_ttyp);
sc 1547 net/if_strip.c strip_resetradio(sc, sc->sc_ttyp);
sc 1554 net/if_strip.c sc->sc_if.if_xname,
sc 1556 net/if_strip.c sc->sc_state);
sc 1557 net/if_strip.c strip_resetradio(sc, sc->sc_ttyp);
sc 1558 net/if_strip.c sc->sc_state = ST_DEAD;
sc 1581 net/if_strip.c strip_newpacket(sc, ptr, end)
sc 1582 net/if_strip.c struct st_softc *sc;
sc 1595 net/if_strip.c sc->sc_if.if_xname);
sc 1596 net/if_strip.c FORCE_RESET(sc); /* Do reset ASAP */
sc 1604 net/if_strip.c RecvErr_Message(sc, NULL, ptr+4);
sc 1607 net/if_strip.c RecvErr("No initial *", sc);
sc 1623 net/if_strip.c RecvErr("No second *", sc);
sc 1633 net/if_strip.c RecvErr_Message(sc, name, ptr+4);
sc 1635 net/if_strip.c else RecvErr("No SRIP key", sc);
sc 1641 net/if_strip.c ptr = UnStuffData(ptr, end, sc->sc_rxbuf, 4);
sc 1643 net/if_strip.c RecvErr("Runt packet (hdr)", sc);
sc 1652 net/if_strip.c packetlen = ((u_short)sc->sc_rxbuf[2] << 8) | sc->sc_rxbuf[3];
sc 1662 net/if_strip.c ptr = UnStuffData(ptr, end, sc->sc_rxbuf+4, packetlen-4);
sc 1664 net/if_strip.c RecvErr("Short packet", sc);
sc 1669 net/if_strip.c bcopy(sc->sc_rxbuf, sc->sc_buf, packetlen );
sc 1926 net/if_strip.c RecvErr(msg, sc)
sc 1928 net/if_strip.c struct st_softc *sc;
sc 1931 net/if_strip.c u_char *ptr = sc->sc_buf;
sc 1932 net/if_strip.c u_char *end = sc->sc_mp;
sc 1950 net/if_strip.c addlog("%s: %13s : %s\n", sc->sc_if.if_xname, msg, pkt_text);
sc 1952 net/if_strip.c sc->sc_if.if_ierrors++;
sc 143 net/ppp_tty.c void pppgetm(struct ppp_softc *sc);
sc 163 net/ppp_tty.c #define ESCAPE_P(c) (sc->sc_asyncmap[(c) >> 5] & (1 << ((c) & 0x1F)))
sc 187 net/ppp_tty.c struct ppp_softc *sc;
sc 196 net/ppp_tty.c sc = (struct ppp_softc *) tp->t_sc;
sc 197 net/ppp_tty.c if (sc != NULL && sc->sc_devp == (void *) tp) {
sc 203 net/ppp_tty.c if ((sc = pppalloc(p->p_pid)) == NULL) {
sc 208 net/ppp_tty.c if (sc->sc_relinq)
sc 209 net/ppp_tty.c (*sc->sc_relinq)(sc); /* get previous owner to relinquish the unit */
sc 211 net/ppp_tty.c timeout_set(&sc->sc_timo, ppp_timeout, sc);
sc 212 net/ppp_tty.c sc->sc_ilen = 0;
sc 213 net/ppp_tty.c sc->sc_m = NULL;
sc 214 net/ppp_tty.c bzero(sc->sc_asyncmap, sizeof(sc->sc_asyncmap));
sc 215 net/ppp_tty.c sc->sc_asyncmap[0] = 0xffffffff;
sc 216 net/ppp_tty.c sc->sc_asyncmap[3] = 0x60000000;
sc 217 net/ppp_tty.c sc->sc_rasyncmap = 0;
sc 218 net/ppp_tty.c sc->sc_devp = (void *) tp;
sc 219 net/ppp_tty.c sc->sc_start = pppasyncstart;
sc 220 net/ppp_tty.c sc->sc_ctlp = pppasyncctlp;
sc 221 net/ppp_tty.c sc->sc_relinq = pppasyncrelinq;
sc 222 net/ppp_tty.c sc->sc_outm = NULL;
sc 223 net/ppp_tty.c pppgetm(sc);
sc 224 net/ppp_tty.c sc->sc_if.if_flags |= IFF_RUNNING;
sc 225 net/ppp_tty.c sc->sc_if.if_baudrate = tp->t_ospeed;
sc 227 net/ppp_tty.c tp->t_sc = (caddr_t) sc;
sc 245 net/ppp_tty.c struct ppp_softc *sc;
sc 251 net/ppp_tty.c sc = (struct ppp_softc *) tp->t_sc;
sc 252 net/ppp_tty.c if (sc != NULL) {
sc 254 net/ppp_tty.c if (tp == (struct tty *) sc->sc_devp) {
sc 255 net/ppp_tty.c pppasyncrelinq(sc);
sc 256 net/ppp_tty.c pppdealloc(sc);
sc 267 net/ppp_tty.c pppasyncrelinq(sc)
sc 268 net/ppp_tty.c struct ppp_softc *sc;
sc 273 net/ppp_tty.c if (sc->sc_outm) {
sc 274 net/ppp_tty.c m_freem(sc->sc_outm);
sc 275 net/ppp_tty.c sc->sc_outm = NULL;
sc 277 net/ppp_tty.c if (sc->sc_m) {
sc 278 net/ppp_tty.c m_freem(sc->sc_m);
sc 279 net/ppp_tty.c sc->sc_m = NULL;
sc 281 net/ppp_tty.c if (sc->sc_flags & SC_TIMEOUT) {
sc 282 net/ppp_tty.c timeout_del(&sc->sc_timo);
sc 283 net/ppp_tty.c sc->sc_flags &= ~SC_TIMEOUT;
sc 297 net/ppp_tty.c struct ppp_softc *sc = (struct ppp_softc *)tp->t_sc;
sc 302 net/ppp_tty.c if (sc == NULL)
sc 310 net/ppp_tty.c if (tp != (struct tty *) sc->sc_devp || tp->t_line != PPPDISC) {
sc 314 net/ppp_tty.c if (sc->sc_inq.ifq_head != NULL)
sc 336 net/ppp_tty.c IF_DEQUEUE(&sc->sc_inq, m0);
sc 355 net/ppp_tty.c struct ppp_softc *sc = (struct ppp_softc *)tp->t_sc;
sc 364 net/ppp_tty.c if (sc == NULL || tp != (struct tty *) sc->sc_devp)
sc 366 net/ppp_tty.c if (uio->uio_resid > sc->sc_if.if_mtu + PPP_HDRLEN ||
sc 393 net/ppp_tty.c return ((*sc->sc_if.if_output)(&sc->sc_if, m0, &dst, (struct rtentry *)0));
sc 410 net/ppp_tty.c struct ppp_softc *sc = (struct ppp_softc *) tp->t_sc;
sc 413 net/ppp_tty.c if (sc == NULL || tp != (struct tty *) sc->sc_devp)
sc 421 net/ppp_tty.c sc->sc_asyncmap[0] = *(u_int *)data;
sc 425 net/ppp_tty.c *(u_int *)data = sc->sc_asyncmap[0];
sc 431 net/ppp_tty.c sc->sc_rasyncmap = *(u_int *)data;
sc 435 net/ppp_tty.c *(u_int *)data = sc->sc_rasyncmap;
sc 442 net/ppp_tty.c bcopy(data, sc->sc_asyncmap, sizeof(sc->sc_asyncmap));
sc 443 net/ppp_tty.c sc->sc_asyncmap[1] = 0; /* mustn't escape 0x20 - 0x3f */
sc 444 net/ppp_tty.c sc->sc_asyncmap[2] &= ~0x40000000; /* mustn't escape 0x5e */
sc 445 net/ppp_tty.c sc->sc_asyncmap[3] |= 0x60000000; /* must escape 0x7d, 0x7e */
sc 450 net/ppp_tty.c bcopy(sc->sc_asyncmap, data, sizeof(sc->sc_asyncmap));
sc 454 net/ppp_tty.c error = pppioctl(sc, cmd, data, flag, p);
sc 456 net/ppp_tty.c pppgetm(sc);
sc 519 net/ppp_tty.c pppasyncstart(sc)
sc 520 net/ppp_tty.c struct ppp_softc *sc;
sc 522 net/ppp_tty.c struct tty *tp = (struct tty *) sc->sc_devp;
sc 536 net/ppp_tty.c m = sc->sc_outm;
sc 541 net/ppp_tty.c m = ppp_dequeue(sc);
sc 553 net/ppp_tty.c ++sc->sc_stats.ppp_obytes;
sc 558 net/ppp_tty.c sc->sc_outfcs = pppfcs(PPP_INITFCS, mtod(m, u_char *), m->m_len);
sc 579 net/ppp_tty.c sc->sc_stats.ppp_obytes += ndone;
sc 601 net/ppp_tty.c sc->sc_stats.ppp_obytes += 2;
sc 623 net/ppp_tty.c c = ~sc->sc_outfcs & 0xFF;
sc 629 net/ppp_tty.c c = (~sc->sc_outfcs >> 8) & 0xFF;
sc 651 net/ppp_tty.c sc->sc_stats.ppp_obytes += q - endseq;
sc 668 net/ppp_tty.c sc->sc_outfcs = pppfcs(sc->sc_outfcs, mtod(m, u_char *), m->m_len);
sc 676 net/ppp_tty.c sc->sc_outm = m;
sc 690 net/ppp_tty.c if (!idle && (sc->sc_flags & SC_TIMEOUT) == 0) {
sc 691 net/ppp_tty.c timeout_add(&sc->sc_timo, 1);
sc 692 net/ppp_tty.c sc->sc_flags |= SC_TIMEOUT;
sc 703 net/ppp_tty.c pppasyncctlp(sc)
sc 704 net/ppp_tty.c struct ppp_softc *sc;
sc 711 net/ppp_tty.c tp = (struct tty *) sc->sc_devp;
sc 727 net/ppp_tty.c struct ppp_softc *sc = (struct ppp_softc *) tp->t_sc;
sc 742 net/ppp_tty.c if (ALTQ_IS_ENABLED(&sc->sc_if.if_snd))
sc 752 net/ppp_tty.c && sc != NULL && tp == (struct tty *) sc->sc_devp) {
sc 753 net/ppp_tty.c ppp_restart(sc);
sc 766 net/ppp_tty.c struct ppp_softc *sc = (struct ppp_softc *) x;
sc 767 net/ppp_tty.c struct tty *tp = (struct tty *) sc->sc_devp;
sc 771 net/ppp_tty.c sc->sc_flags &= ~SC_TIMEOUT;
sc 780 net/ppp_tty.c pppgetm(sc)
sc 781 net/ppp_tty.c struct ppp_softc *sc;
sc 788 net/ppp_tty.c mp = &sc->sc_m;
sc 789 net/ppp_tty.c for (len = sc->sc_mru + PPP_HDRLEN + PPP_FCSLEN; len > 0; ){
sc 816 net/ppp_tty.c struct ppp_softc *sc;
sc 820 net/ppp_tty.c sc = (struct ppp_softc *) tp->t_sc;
sc 821 net/ppp_tty.c if (sc == NULL || tp != (struct tty *) sc->sc_devp)
sc 825 net/ppp_tty.c ++sc->sc_stats.ppp_ibytes;
sc 829 net/ppp_tty.c if (sc->sc_flags & SC_DEBUG)
sc 830 net/ppp_tty.c printf("%s: bad char %x\n", sc->sc_if.if_xname, c);
sc 857 net/ppp_tty.c sc->sc_flags |= SC_RCV_B7_1;
sc 859 net/ppp_tty.c sc->sc_flags |= SC_RCV_B7_0;
sc 861 net/ppp_tty.c sc->sc_flags |= SC_RCV_ODDP;
sc 863 net/ppp_tty.c sc->sc_flags |= SC_RCV_EVNP;
sc 866 net/ppp_tty.c if (sc->sc_flags & SC_LOG_RAWIN)
sc 867 net/ppp_tty.c ppplogchar(sc, c);
sc 870 net/ppp_tty.c ilen = sc->sc_ilen;
sc 871 net/ppp_tty.c sc->sc_ilen = 0;
sc 873 net/ppp_tty.c if (sc->sc_rawin_count > 0)
sc 874 net/ppp_tty.c ppplogchar(sc, -1);
sc 880 net/ppp_tty.c if (sc->sc_flags & (SC_FLUSH | SC_ESCAPED)
sc 881 net/ppp_tty.c || (ilen > 0 && sc->sc_fcs != PPP_GOODFCS)) {
sc 883 net/ppp_tty.c sc->sc_flags |= SC_PKTLOST; /* note the dropped packet */
sc 884 net/ppp_tty.c if ((sc->sc_flags & (SC_FLUSH | SC_ESCAPED)) == 0){
sc 885 net/ppp_tty.c if (sc->sc_flags & SC_DEBUG)
sc 886 net/ppp_tty.c printf("%s: bad fcs %x\n", sc->sc_if.if_xname,
sc 887 net/ppp_tty.c sc->sc_fcs);
sc 888 net/ppp_tty.c sc->sc_if.if_ierrors++;
sc 889 net/ppp_tty.c sc->sc_stats.ppp_ierrors++;
sc 891 net/ppp_tty.c sc->sc_flags &= ~(SC_FLUSH | SC_ESCAPED);
sc 898 net/ppp_tty.c if (sc->sc_flags & SC_DEBUG)
sc 899 net/ppp_tty.c printf("%s: too short (%d)\n", sc->sc_if.if_xname, ilen);
sc 901 net/ppp_tty.c sc->sc_if.if_ierrors++;
sc 902 net/ppp_tty.c sc->sc_stats.ppp_ierrors++;
sc 903 net/ppp_tty.c sc->sc_flags |= SC_PKTLOST;
sc 913 net/ppp_tty.c if (--sc->sc_mc->m_len == 0) {
sc 914 net/ppp_tty.c for (m = sc->sc_m; m->m_next != sc->sc_mc; m = m->m_next)
sc 916 net/ppp_tty.c sc->sc_mc = m;
sc 918 net/ppp_tty.c sc->sc_mc->m_len--;
sc 921 net/ppp_tty.c m = sc->sc_m;
sc 922 net/ppp_tty.c sc->sc_m = sc->sc_mc->m_next;
sc 923 net/ppp_tty.c sc->sc_mc->m_next = NULL;
sc 925 net/ppp_tty.c ppppktin(sc, m, sc->sc_flags & SC_PKTLOST);
sc 926 net/ppp_tty.c if (sc->sc_flags & SC_PKTLOST) {
sc 928 net/ppp_tty.c sc->sc_flags &= ~SC_PKTLOST;
sc 932 net/ppp_tty.c pppgetm(sc);
sc 936 net/ppp_tty.c if (sc->sc_flags & SC_FLUSH) {
sc 937 net/ppp_tty.c if (sc->sc_flags & SC_LOG_FLUSH)
sc 938 net/ppp_tty.c ppplogchar(sc, c);
sc 942 net/ppp_tty.c if (c < 0x20 && (sc->sc_rasyncmap & (1 << c)))
sc 946 net/ppp_tty.c if (sc->sc_flags & SC_ESCAPED) {
sc 947 net/ppp_tty.c sc->sc_flags &= ~SC_ESCAPED;
sc 950 net/ppp_tty.c sc->sc_flags |= SC_ESCAPED;
sc 965 net/ppp_tty.c if (sc->sc_ilen == 0) {
sc 967 net/ppp_tty.c if (sc->sc_m == NULL) {
sc 968 net/ppp_tty.c pppgetm(sc);
sc 969 net/ppp_tty.c if (sc->sc_m == NULL) {
sc 970 net/ppp_tty.c if (sc->sc_flags & SC_DEBUG)
sc 971 net/ppp_tty.c printf("%s: no input mbufs!\n", sc->sc_if.if_xname);
sc 975 net/ppp_tty.c m = sc->sc_m;
sc 977 net/ppp_tty.c m->m_data = M_DATASTART(sc->sc_m);
sc 978 net/ppp_tty.c sc->sc_mc = m;
sc 979 net/ppp_tty.c sc->sc_mp = mtod(m, char *);
sc 980 net/ppp_tty.c sc->sc_fcs = PPP_INITFCS;
sc 982 net/ppp_tty.c if (sc->sc_flags & SC_REJ_COMP_AC) {
sc 983 net/ppp_tty.c if (sc->sc_flags & SC_DEBUG)
sc 985 net/ppp_tty.c sc->sc_if.if_xname, c);
sc 988 net/ppp_tty.c *sc->sc_mp++ = PPP_ALLSTATIONS;
sc 989 net/ppp_tty.c *sc->sc_mp++ = PPP_UI;
sc 990 net/ppp_tty.c sc->sc_ilen += 2;
sc 994 net/ppp_tty.c if (sc->sc_ilen == 1 && c != PPP_UI) {
sc 995 net/ppp_tty.c if (sc->sc_flags & SC_DEBUG)
sc 997 net/ppp_tty.c sc->sc_if.if_xname, c);
sc 1000 net/ppp_tty.c if (sc->sc_ilen == 2 && (c & 1) == 1) {
sc 1002 net/ppp_tty.c *sc->sc_mp++ = 0;
sc 1003 net/ppp_tty.c sc->sc_ilen++;
sc 1004 net/ppp_tty.c sc->sc_mc->m_len++;
sc 1006 net/ppp_tty.c if (sc->sc_ilen == 3 && (c & 1) == 0) {
sc 1007 net/ppp_tty.c if (sc->sc_flags & SC_DEBUG)
sc 1008 net/ppp_tty.c printf("%s: bad protocol %x\n", sc->sc_if.if_xname,
sc 1009 net/ppp_tty.c (sc->sc_mp[-1] << 8) + c);
sc 1014 net/ppp_tty.c if (++sc->sc_ilen > sc->sc_mru + PPP_HDRLEN + PPP_FCSLEN) {
sc 1015 net/ppp_tty.c if (sc->sc_flags & SC_DEBUG)
sc 1016 net/ppp_tty.c printf("%s: packet too big\n", sc->sc_if.if_xname);
sc 1021 net/ppp_tty.c m = sc->sc_mc;
sc 1024 net/ppp_tty.c pppgetm(sc);
sc 1026 net/ppp_tty.c if (sc->sc_flags & SC_DEBUG)
sc 1027 net/ppp_tty.c printf("%s: too few input mbufs!\n", sc->sc_if.if_xname);
sc 1031 net/ppp_tty.c sc->sc_mc = m = m->m_next;
sc 1034 net/ppp_tty.c sc->sc_mp = mtod(m, char *);
sc 1038 net/ppp_tty.c *sc->sc_mp++ = c;
sc 1039 net/ppp_tty.c sc->sc_fcs = PPP_FCS(sc->sc_fcs, c);
sc 1043 net/ppp_tty.c if (!(sc->sc_flags & SC_FLUSH)) {
sc 1045 net/ppp_tty.c sc->sc_if.if_ierrors++;
sc 1046 net/ppp_tty.c sc->sc_stats.ppp_ierrors++;
sc 1047 net/ppp_tty.c sc->sc_flags |= SC_FLUSH;
sc 1049 net/ppp_tty.c if (sc->sc_flags & SC_LOG_FLUSH)
sc 1050 net/ppp_tty.c ppplogchar(sc, c);
sc 1058 net/ppp_tty.c ppplogchar(sc, c)
sc 1059 net/ppp_tty.c struct ppp_softc *sc;
sc 1063 net/ppp_tty.c sc->sc_rawin[sc->sc_rawin_count++] = c;
sc 1064 net/ppp_tty.c if (sc->sc_rawin_count >= sizeof(sc->sc_rawin)
sc 1065 net/ppp_tty.c || (c < 0 && sc->sc_rawin_count > 0)) {
sc 1066 net/ppp_tty.c printf("%s input: ", sc->sc_if.if_xname);
sc 1067 net/ppp_tty.c pppdumpb(sc->sc_rawin, sc->sc_rawin_count);
sc 1068 net/ppp_tty.c sc->sc_rawin_count = 0;
sc 62 netinet/in_gif.c struct gif_softc *sc = (struct gif_softc*)ifp;
sc 63 netinet/in_gif.c struct sockaddr_in *sin_src = (struct sockaddr_in *)sc->gif_psrc;
sc 64 netinet/in_gif.c struct sockaddr_in *sin_dst = (struct sockaddr_in *)sc->gif_pdst;
sc 132 netinet/in_gif.c struct gif_softc *sc;
sc 151 netinet/in_gif.c LIST_FOREACH(sc, &gif_softc_list, gif_list) {
sc 152 netinet/in_gif.c if (sc->gif_psrc == NULL || sc->gif_pdst == NULL ||
sc 153 netinet/in_gif.c sc->gif_psrc->sa_family != AF_INET ||
sc 154 netinet/in_gif.c sc->gif_pdst->sa_family != AF_INET) {
sc 158 netinet/in_gif.c if ((sc->gif_if.if_flags & IFF_UP) == 0)
sc 161 netinet/in_gif.c if (in_hosteq(satosin(sc->gif_psrc)->sin_addr, ip->ip_dst) &&
sc 162 netinet/in_gif.c in_hosteq(satosin(sc->gif_pdst)->sin_addr, ip->ip_src))
sc 164 netinet/in_gif.c gifp = &sc->gif_if;
sc 167 netinet/ip_carp.c #define CARP_LOG(sc, s) \
sc 169 netinet/ip_carp.c if (sc) \
sc 171 netinet/ip_carp.c (sc)->sc_if.if_xname); \
sc 228 netinet/ip_carp.c carp_hmac_prepare(struct carp_softc *sc)
sc 233 netinet/ip_carp.c carp_hmac_prepare_ctx(sc, i);
sc 237 netinet/ip_carp.c carp_hmac_prepare_ctx(struct carp_softc *sc, u_int8_t ctx)
sc 240 netinet/ip_carp.c u_int8_t vhid = sc->sc_vhid & 0xff;
sc 251 netinet/ip_carp.c bzero(sc->sc_pad, sizeof(sc->sc_pad));
sc 252 netinet/ip_carp.c bcopy(sc->sc_key, sc->sc_pad, sizeof(sc->sc_key));
sc 253 netinet/ip_carp.c for (i = 0; i < sizeof(sc->sc_pad); i++)
sc 254 netinet/ip_carp.c sc->sc_pad[i] ^= 0x36;
sc 257 netinet/ip_carp.c SHA1Init(&sc->sc_sha1[ctx]);
sc 258 netinet/ip_carp.c SHA1Update(&sc->sc_sha1[ctx], sc->sc_pad, sizeof(sc->sc_pad));
sc 259 netinet/ip_carp.c SHA1Update(&sc->sc_sha1[ctx], (void *)&version, sizeof(version));
sc 260 netinet/ip_carp.c SHA1Update(&sc->sc_sha1[ctx], (void *)&type, sizeof(type));
sc 263 netinet/ip_carp.c bcopy(&sc->sc_sha1[ctx], &sha1ctx, sizeof(sha1ctx));
sc 265 netinet/ip_carp.c sc->sc_hashkey[0] = kmd[0] ^ kmd[1];
sc 266 netinet/ip_carp.c sc->sc_hashkey[1] = kmd[2] ^ kmd[3];
sc 269 netinet/ip_carp.c if (bcmp(sc->sc_ac.ac_enaddr, sc->sc_carplladdr, ETHER_ADDR_LEN) != 0)
sc 270 netinet/ip_carp.c SHA1Update(&sc->sc_sha1[ctx], sc->sc_ac.ac_enaddr,
sc 273 netinet/ip_carp.c SHA1Update(&sc->sc_sha1[ctx], (void *)&vhid, sizeof(vhid));
sc 282 netinet/ip_carp.c TAILQ_FOREACH(ifa, &sc->sc_if.if_addrlist, ifa_list) {
sc 292 netinet/ip_carp.c SHA1Update(&sc->sc_sha1[ctx],
sc 302 netinet/ip_carp.c TAILQ_FOREACH(ifa, &sc->sc_if.if_addrlist, ifa_list) {
sc 317 netinet/ip_carp.c SHA1Update(&sc->sc_sha1[ctx],
sc 323 netinet/ip_carp.c for (i = 0; i < sizeof(sc->sc_pad); i++)
sc 324 netinet/ip_carp.c sc->sc_pad[i] ^= 0x36 ^ 0x5c;
sc 328 netinet/ip_carp.c carp_hmac_generate(struct carp_softc *sc, u_int32_t counter[2],
sc 334 netinet/ip_carp.c bcopy(&sc->sc_sha1[ctx], &sha1ctx, sizeof(sha1ctx));
sc 336 netinet/ip_carp.c SHA1Update(&sha1ctx, (void *)counter, sizeof(sc->sc_counter));
sc 341 netinet/ip_carp.c SHA1Update(&sha1ctx, sc->sc_pad, sizeof(sc->sc_pad));
sc 347 netinet/ip_carp.c carp_hmac_verify(struct carp_softc *sc, u_int32_t counter[2],
sc 354 netinet/ip_carp.c carp_hmac_generate(sc, counter, md2, i);
sc 362 netinet/ip_carp.c carp_setroute(struct carp_softc *sc, int cmd)
sc 370 netinet/ip_carp.c TAILQ_FOREACH(ifa, &sc->sc_if.if_addrlist, ifa_list) {
sc 388 netinet/ip_carp.c if (sc->sc_carpdev != NULL &&
sc 389 netinet/ip_carp.c sc->sc_carpdev->if_carp != NULL) {
sc 391 netinet/ip_carp.c (struct carp_if *)sc->sc_carpdev->if_carp,
sc 412 netinet/ip_carp.c hr_otherif = (rt && rt->rt_ifp != &sc->sc_if &&
sc 421 netinet/ip_carp.c nr_ourif = (rt && rt->rt_ifp == &sc->sc_if);
sc 506 netinet/ip_carp.c struct carp_softc *sc = NULL;
sc 525 netinet/ip_carp.c CARP_LOG(sc, ("packet received on non-carp interface: %s",
sc 534 netinet/ip_carp.c CARP_LOG(sc, ("received ttl %d != %d on %s", ip->ip_ttl,
sc 548 netinet/ip_carp.c CARP_LOG(sc, ("packet too short %d on %s", m->m_pkthdr.len,
sc 565 netinet/ip_carp.c CARP_LOG(sc, ("checksum failed on %s",
sc 580 netinet/ip_carp.c struct carp_softc *sc = NULL;
sc 595 netinet/ip_carp.c CARP_LOG(sc, ("packet received on non-carp interface: %s",
sc 604 netinet/ip_carp.c CARP_LOG(sc, ("received ttl %d != %d on %s", ip6->ip6_hlim,
sc 615 netinet/ip_carp.c CARP_LOG(sc, ("packet size %u too small", len));
sc 624 netinet/ip_carp.c CARP_LOG(sc, ("checksum failed, on %s",
sc 639 netinet/ip_carp.c struct carp_softc *sc;
sc 643 netinet/ip_carp.c TAILQ_FOREACH(sc, &((struct carp_if *)
sc 645 netinet/ip_carp.c if (sc->sc_vhid == ch->carp_vhid)
sc 648 netinet/ip_carp.c if (!sc || (sc->sc_if.if_flags & (IFF_UP|IFF_RUNNING)) !=
sc 662 netinet/ip_carp.c if ((sc->sc_carpdev->if_flags & IFF_SIMPLEX) == 0) {
sc 668 netinet/ip_carp.c ifa = ifaof_ifpforaddr(&sa, sc->sc_carpdev);
sc 697 netinet/ip_carp.c getmicrotime(&sc->sc_if.if_lastchange);
sc 698 netinet/ip_carp.c sc->sc_if.if_ipackets++;
sc 699 netinet/ip_carp.c sc->sc_if.if_ibytes += m->m_pkthdr.len;
sc 704 netinet/ip_carp.c sc->sc_if.if_ierrors++;
sc 705 netinet/ip_carp.c CARP_LOG(sc, ("invalid version %d != %d",
sc 712 netinet/ip_carp.c if (carp_hmac_verify(sc, ch->carp_counter, ch->carp_md)) {
sc 714 netinet/ip_carp.c sc->sc_if.if_ierrors++;
sc 715 netinet/ip_carp.c CARP_LOG(sc, ("incorrect hash"));
sc 726 netinet/ip_carp.c sc->sc_init_counter = 0;
sc 727 netinet/ip_carp.c sc->sc_counter = tmp_counter;
sc 730 netinet/ip_carp.c sc_tv.tv_sec = sc->sc_advbase;
sc 731 netinet/ip_carp.c if (carp_group_demote_count(sc) && sc->sc_advskew < 240)
sc 734 netinet/ip_carp.c sc_tv.tv_usec = sc->sc_advskew * 1000000 / 256;
sc 738 netinet/ip_carp.c switch (sc->sc_state) {
sc 749 netinet/ip_carp.c (carp_group_demote_count(sc) & 0xff))) {
sc 750 netinet/ip_carp.c timeout_del(&sc->sc_ad_tmo);
sc 751 netinet/ip_carp.c carp_set_state(sc, BACKUP);
sc 752 netinet/ip_carp.c carp_setrun(sc, 0);
sc 753 netinet/ip_carp.c carp_setroute(sc, RTM_DELETE);
sc 762 netinet/ip_carp.c carp_master_down(sc);
sc 770 netinet/ip_carp.c if (ch->carp_demote > (carp_group_demote_count(sc) & 0xff)) {
sc 771 netinet/ip_carp.c carp_master_down(sc);
sc 780 netinet/ip_carp.c sc_tv.tv_sec = sc->sc_advbase * 3;
sc 782 netinet/ip_carp.c carp_master_down(sc);
sc 790 netinet/ip_carp.c carp_setrun(sc, af);
sc 832 netinet/ip_carp.c struct carp_softc *sc;
sc 835 netinet/ip_carp.c sc = malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT);
sc 836 netinet/ip_carp.c if (!sc)
sc 838 netinet/ip_carp.c bzero(sc, sizeof(*sc));
sc 840 netinet/ip_carp.c sc->sc_suppress = 0;
sc 841 netinet/ip_carp.c sc->sc_advbase = CARP_DFLTINTV;
sc 842 netinet/ip_carp.c sc->sc_vhid = -1; /* required setting */
sc 843 netinet/ip_carp.c sc->sc_advskew = 0;
sc 844 netinet/ip_carp.c sc->sc_init_counter = 1;
sc 845 netinet/ip_carp.c sc->sc_naddrs = sc->sc_naddrs6 = 0;
sc 847 netinet/ip_carp.c sc->sc_im6o.im6o_multicast_hlim = CARP_DFLTTL;
sc 850 netinet/ip_carp.c timeout_set(&sc->sc_ad_tmo, carp_send_ad, sc);
sc 851 netinet/ip_carp.c timeout_set(&sc->sc_md_tmo, carp_master_down, sc);
sc 852 netinet/ip_carp.c timeout_set(&sc->sc_md6_tmo, carp_master_down, sc);
sc 854 netinet/ip_carp.c LIST_INIT(&sc->carp_mc_listhead);
sc 855 netinet/ip_carp.c ifp = &sc->sc_if;
sc 856 netinet/ip_carp.c ifp->if_softc = sc;
sc 872 netinet/ip_carp.c LIST_INIT(&sc->sc_ac.ac_multiaddrs);
sc 891 netinet/ip_carp.c carpdetach(struct carp_softc *sc)
sc 896 netinet/ip_carp.c timeout_del(&sc->sc_ad_tmo);
sc 897 netinet/ip_carp.c timeout_del(&sc->sc_md_tmo);
sc 898 netinet/ip_carp.c timeout_del(&sc->sc_md6_tmo);
sc 900 netinet/ip_carp.c if (sc->sc_suppress)
sc 901 netinet/ip_carp.c carp_group_demote_adj(&sc->sc_if, -1);
sc 902 netinet/ip_carp.c sc->sc_suppress = 0;
sc 904 netinet/ip_carp.c if (sc->sc_sendad_errors >= CARP_SENDAD_MAX_ERRORS)
sc 905 netinet/ip_carp.c carp_group_demote_adj(&sc->sc_if, -1);
sc 906 netinet/ip_carp.c sc->sc_sendad_errors = 0;
sc 908 netinet/ip_carp.c carp_set_state(sc, INIT);
sc 909 netinet/ip_carp.c sc->sc_if.if_flags &= ~IFF_UP;
sc 910 netinet/ip_carp.c carp_setrun(sc, 0);
sc 911 netinet/ip_carp.c carp_multicast_cleanup(sc);
sc 914 netinet/ip_carp.c if (sc->sc_carpdev != NULL) {
sc 915 netinet/ip_carp.c if (sc->lh_cookie != NULL)
sc 916 netinet/ip_carp.c hook_disestablish(sc->sc_carpdev->if_linkstatehooks,
sc 917 netinet/ip_carp.c sc->lh_cookie);
sc 918 netinet/ip_carp.c cif = (struct carp_if *)sc->sc_carpdev->if_carp;
sc 919 netinet/ip_carp.c TAILQ_REMOVE(&cif->vhif_vrs, sc, sc_list);
sc 921 netinet/ip_carp.c ifpromisc(sc->sc_carpdev, 0);
sc 922 netinet/ip_carp.c sc->sc_carpdev->if_carp = NULL;
sc 926 netinet/ip_carp.c sc->sc_carpdev = NULL;
sc 934 netinet/ip_carp.c struct carp_softc *sc, *nextsc;
sc 937 netinet/ip_carp.c for (sc = TAILQ_FIRST(&cif->vhif_vrs); sc; sc = nextsc) {
sc 938 netinet/ip_carp.c nextsc = TAILQ_NEXT(sc, sc_list);
sc 939 netinet/ip_carp.c carpdetach(sc);
sc 944 netinet/ip_carp.c carp_prepare_ad(struct mbuf *m, struct carp_softc *sc, struct carp_header *ch)
sc 946 netinet/ip_carp.c if (sc->sc_init_counter) {
sc 948 netinet/ip_carp.c sc->sc_counter = arc4random();
sc 949 netinet/ip_carp.c sc->sc_counter = sc->sc_counter << 32;
sc 950 netinet/ip_carp.c sc->sc_counter += arc4random();
sc 952 netinet/ip_carp.c sc->sc_counter++;
sc 954 netinet/ip_carp.c ch->carp_counter[0] = htonl((sc->sc_counter>>32)&0xffffffff);
sc 955 netinet/ip_carp.c ch->carp_counter[1] = htonl(sc->sc_counter&0xffffffff);
sc 961 netinet/ip_carp.c carp_hmac_generate(sc, ch->carp_counter, ch->carp_md, HMAC_NOV6LL);
sc 992 netinet/ip_carp.c struct carp_softc *sc = v;
sc 1001 netinet/ip_carp.c if (sc->sc_carpdev == NULL) {
sc 1002 netinet/ip_carp.c sc->sc_if.if_oerrors++;
sc 1007 netinet/ip_carp.c if (sc->sc_bow_out) {
sc 1008 netinet/ip_carp.c sc->sc_bow_out = 0;
sc 1012 netinet/ip_carp.c advbase = sc->sc_advbase;
sc 1013 netinet/ip_carp.c if (!carp_group_demote_count(sc) || sc->sc_advskew > 240)
sc 1014 netinet/ip_carp.c advskew = sc->sc_advskew;
sc 1023 netinet/ip_carp.c ch.carp_vhid = sc->sc_vhid;
sc 1024 netinet/ip_carp.c ch.carp_demote = carp_group_demote_count(sc) & 0xff;
sc 1032 netinet/ip_carp.c if (sc->sc_naddrs) {
sc 1037 netinet/ip_carp.c sc->sc_if.if_oerrors++;
sc 1061 netinet/ip_carp.c ifa = ifaof_ifpforaddr(&sa, sc->sc_carpdev);
sc 1071 netinet/ip_carp.c if (carp_prepare_ad(m, sc, ch_ptr))
sc 1078 netinet/ip_carp.c getmicrotime(&sc->sc_if.if_lastchange);
sc 1079 netinet/ip_carp.c sc->sc_if.if_opackets++;
sc 1080 netinet/ip_carp.c sc->sc_if.if_obytes += len;
sc 1083 netinet/ip_carp.c error = ip_output(m, NULL, NULL, IP_RAWOUTPUT, &sc->sc_imo,
sc 1089 netinet/ip_carp.c CARP_LOG(sc, ("ip_output failed: %d", error));
sc 1090 netinet/ip_carp.c sc->sc_if.if_oerrors++;
sc 1091 netinet/ip_carp.c if (sc->sc_sendad_errors < INT_MAX)
sc 1092 netinet/ip_carp.c sc->sc_sendad_errors++;
sc 1093 netinet/ip_carp.c if (sc->sc_sendad_errors == CARP_SENDAD_MAX_ERRORS)
sc 1094 netinet/ip_carp.c carp_group_demote_adj(&sc->sc_if, 1);
sc 1095 netinet/ip_carp.c sc->sc_sendad_success = 0;
sc 1097 netinet/ip_carp.c if (sc->sc_sendad_errors >= CARP_SENDAD_MAX_ERRORS) {
sc 1098 netinet/ip_carp.c if (++sc->sc_sendad_success >=
sc 1100 netinet/ip_carp.c carp_group_demote_adj(&sc->sc_if, -1);
sc 1101 netinet/ip_carp.c sc->sc_sendad_errors = 0;
sc 1104 netinet/ip_carp.c sc->sc_sendad_errors = 0;
sc 1106 netinet/ip_carp.c if (sc->sc_delayed_arp > 0)
sc 1107 netinet/ip_carp.c sc->sc_delayed_arp--;
sc 1108 netinet/ip_carp.c if (sc->sc_delayed_arp == 0) {
sc 1109 netinet/ip_carp.c carp_send_arp(sc);
sc 1110 netinet/ip_carp.c sc->sc_delayed_arp = -1;
sc 1115 netinet/ip_carp.c if (sc->sc_naddrs6) {
sc 1120 netinet/ip_carp.c sc->sc_if.if_oerrors++;
sc 1140 netinet/ip_carp.c ifa = ifaof_ifpforaddr(&sa, sc->sc_carpdev);
sc 1154 netinet/ip_carp.c if (carp_prepare_ad(m, sc, ch_ptr))
sc 1161 netinet/ip_carp.c getmicrotime(&sc->sc_if.if_lastchange);
sc 1162 netinet/ip_carp.c sc->sc_if.if_opackets++;
sc 1163 netinet/ip_carp.c sc->sc_if.if_obytes += len;
sc 1166 netinet/ip_carp.c error = ip6_output(m, NULL, NULL, 0, &sc->sc_im6o, NULL, NULL);
sc 1171 netinet/ip_carp.c CARP_LOG(sc, ("ip6_output failed: %d", error));
sc 1172 netinet/ip_carp.c sc->sc_if.if_oerrors++;
sc 1173 netinet/ip_carp.c if (sc->sc_sendad_errors < INT_MAX)
sc 1174 netinet/ip_carp.c sc->sc_sendad_errors++;
sc 1175 netinet/ip_carp.c if (sc->sc_sendad_errors == CARP_SENDAD_MAX_ERRORS)
sc 1176 netinet/ip_carp.c carp_group_demote_adj(&sc->sc_if, 1);
sc 1177 netinet/ip_carp.c sc->sc_sendad_success = 0;
sc 1179 netinet/ip_carp.c if (sc->sc_sendad_errors >= CARP_SENDAD_MAX_ERRORS) {
sc 1180 netinet/ip_carp.c if (++sc->sc_sendad_success >=
sc 1182 netinet/ip_carp.c carp_group_demote_adj(&sc->sc_if, -1);
sc 1183 netinet/ip_carp.c sc->sc_sendad_errors = 0;
sc 1186 netinet/ip_carp.c sc->sc_sendad_errors = 0;
sc 1194 netinet/ip_carp.c timeout_add(&sc->sc_ad_tmo, tvtohz(&tv));
sc 1203 netinet/ip_carp.c carp_send_arp(struct carp_softc *sc)
sc 1209 netinet/ip_carp.c TAILQ_FOREACH(ifa, &sc->sc_if.if_addrlist, ifa_list) {
sc 1214 netinet/ip_carp.c if (carp_addrcount((struct carp_if *)sc->sc_carpdev->if_carp,
sc 1219 netinet/ip_carp.c arprequest(sc->sc_carpdev, &in, &in, sc->sc_ac.ac_enaddr);
sc 1227 netinet/ip_carp.c carp_send_na(struct carp_softc *sc)
sc 1234 netinet/ip_carp.c TAILQ_FOREACH(ifa, &sc->sc_if.if_addrlist, ifa_list) {
sc 1240 netinet/ip_carp.c nd6_na_output(sc->sc_carpdev, &mcast, in6,
sc 1265 netinet/ip_carp.c carp_hash(struct carp_softc *sc, u_char *src)
sc 1267 netinet/ip_carp.c u_int32_t a = 0x9e3779b9, b = sc->sc_hashkey[0], c = sc->sc_hashkey[1];
sc 1269 netinet/ip_carp.c c += sc->sc_key[3] << 24;
sc 1270 netinet/ip_carp.c c += sc->sc_key[2] << 16;
sc 1271 netinet/ip_carp.c c += sc->sc_key[1] << 8;
sc 1272 netinet/ip_carp.c c += sc->sc_key[0];
sc 1327 netinet/ip_carp.c carp_update_lsmask(struct carp_softc *sc)
sc 1334 netinet/ip_carp.c if (!sc->sc_carpdev)
sc 1336 netinet/ip_carp.c cif = (struct carp_if *)sc->sc_carpdev->if_carp;
sc 1409 netinet/ip_carp.c CARP_LOG(sc, ("carp_update_lsmask: %x", sc0->sc_lsmask))
sc 1416 netinet/ip_carp.c struct carp_softc *sc = ia->ia_ifp->if_softc;
sc 1422 netinet/ip_carp.c if (!(sc->sc_if.if_flags & IFF_LINK0) && sc->sc_carpdev &&
sc 1423 netinet/ip_carp.c carp_addrcount((struct carp_if *)sc->sc_carpdev->if_carp,
sc 1445 netinet/ip_carp.c if (carp_hash(sc, src) % *count == index - 1 &&
sc 1446 netinet/ip_carp.c sc->sc_state == MASTER) {
sc 1450 netinet/ip_carp.c if (sc->sc_state == MASTER)
sc 1461 netinet/ip_carp.c struct carp_softc *sc = ifp->if_softc;
sc 1467 netinet/ip_carp.c if (!(sc->sc_if.if_flags & IFF_LINK0) && sc->sc_carpdev &&
sc 1468 netinet/ip_carp.c carp_addrcount((struct carp_if *)sc->sc_carpdev->if_carp,
sc 1472 netinet/ip_carp.c if (sc->sc_state == MASTER)
sc 1552 netinet/ip_carp.c struct carp_softc *sc = m->m_pkthdr.rcvif->if_softc;
sc 1571 netinet/ip_carp.c if (sc->sc_lscount == 0) /* just to be safe */
sc 1573 netinet/ip_carp.c match = (1 << (ntohl(fold) % sc->sc_lscount)) & sc->sc_lsmask;
sc 1581 netinet/ip_carp.c struct carp_softc *sc = v;
sc 1583 netinet/ip_carp.c switch (sc->sc_state) {
sc 1586 netinet/ip_carp.c sc->sc_if.if_xname);
sc 1591 netinet/ip_carp.c carp_set_state(sc, MASTER);
sc 1592 netinet/ip_carp.c carp_send_ad(sc);
sc 1593 netinet/ip_carp.c carp_send_arp(sc);
sc 1595 netinet/ip_carp.c sc->sc_delayed_arp = 2;
sc 1597 netinet/ip_carp.c carp_send_na(sc);
sc 1599 netinet/ip_carp.c carp_setrun(sc, 0);
sc 1600 netinet/ip_carp.c carp_setroute(sc, RTM_ADD);
sc 1610 netinet/ip_carp.c carp_setrun(struct carp_softc *sc, sa_family_t af)
sc 1614 netinet/ip_carp.c if (sc->sc_carpdev == NULL) {
sc 1615 netinet/ip_carp.c sc->sc_if.if_flags &= ~IFF_RUNNING;
sc 1616 netinet/ip_carp.c carp_set_state(sc, INIT);
sc 1620 netinet/ip_carp.c if (sc->sc_if.if_flags & IFF_UP && sc->sc_vhid > 0 &&
sc 1621 netinet/ip_carp.c (sc->sc_naddrs || sc->sc_naddrs6) && !sc->sc_suppress) {
sc 1622 netinet/ip_carp.c sc->sc_if.if_flags |= IFF_RUNNING;
sc 1624 netinet/ip_carp.c sc->sc_if.if_flags &= ~IFF_RUNNING;
sc 1625 netinet/ip_carp.c carp_setroute(sc, RTM_DELETE);
sc 1629 netinet/ip_carp.c switch (sc->sc_state) {
sc 1631 netinet/ip_carp.c carp_set_state(sc, BACKUP);
sc 1632 netinet/ip_carp.c carp_setroute(sc, RTM_DELETE);
sc 1633 netinet/ip_carp.c carp_setrun(sc, 0);
sc 1636 netinet/ip_carp.c timeout_del(&sc->sc_ad_tmo);
sc 1637 netinet/ip_carp.c tv.tv_sec = 3 * sc->sc_advbase;
sc 1638 netinet/ip_carp.c tv.tv_usec = sc->sc_advskew * 1000000 / 256;
sc 1639 netinet/ip_carp.c sc->sc_delayed_arp = -1;
sc 1643 netinet/ip_carp.c timeout_add(&sc->sc_md_tmo, tvtohz(&tv));
sc 1648 netinet/ip_carp.c timeout_add(&sc->sc_md6_tmo, tvtohz(&tv));
sc 1652 netinet/ip_carp.c if (sc->sc_naddrs)
sc 1653 netinet/ip_carp.c timeout_add(&sc->sc_md_tmo, tvtohz(&tv));
sc 1654 netinet/ip_carp.c if (sc->sc_naddrs6)
sc 1655 netinet/ip_carp.c timeout_add(&sc->sc_md6_tmo, tvtohz(&tv));
sc 1660 netinet/ip_carp.c tv.tv_sec = sc->sc_advbase;
sc 1661 netinet/ip_carp.c tv.tv_usec = sc->sc_advskew * 1000000 / 256;
sc 1662 netinet/ip_carp.c timeout_add(&sc->sc_ad_tmo, tvtohz(&tv));
sc 1668 netinet/ip_carp.c carp_multicast_cleanup(struct carp_softc *sc)
sc 1670 netinet/ip_carp.c struct ip_moptions *imo = &sc->sc_imo;
sc 1672 netinet/ip_carp.c struct ip6_moptions *im6o = &sc->sc_im6o;
sc 1698 netinet/ip_carp.c carp_ether_purgemulti(sc);
sc 1702 netinet/ip_carp.c carp_set_ifp(struct carp_softc *sc, struct ifnet *ifp)
sc 1709 netinet/ip_carp.c if (ifp == sc->sc_carpdev)
sc 1734 netinet/ip_carp.c if (vr != sc && vr->sc_vhid == sc->sc_vhid)
sc 1739 netinet/ip_carp.c if (sc->sc_carpdev != NULL)
sc 1740 netinet/ip_carp.c carpdetach(sc);
sc 1743 netinet/ip_carp.c if (sc->sc_naddrs < 0 &&
sc 1744 netinet/ip_carp.c (error = carp_join_multicast(sc)) != 0) {
sc 1751 netinet/ip_carp.c if (sc->sc_naddrs6 < 0 &&
sc 1752 netinet/ip_carp.c (error = carp_join_multicast6(sc)) != 0) {
sc 1755 netinet/ip_carp.c carp_multicast_cleanup(sc);
sc 1763 netinet/ip_carp.c sc->sc_carpdev = ifp;
sc 1766 netinet/ip_carp.c if (vr == sc)
sc 1768 netinet/ip_carp.c if (vr->sc_vhid < sc->sc_vhid)
sc 1775 netinet/ip_carp.c TAILQ_INSERT_TAIL(&cif->vhif_vrs, sc, sc_list);
sc 1778 netinet/ip_carp.c sc, sc_list);
sc 1782 netinet/ip_carp.c if (sc->sc_naddrs || sc->sc_naddrs6)
sc 1783 netinet/ip_carp.c sc->sc_if.if_flags |= IFF_UP;
sc 1784 netinet/ip_carp.c carp_set_enaddr(sc);
sc 1786 netinet/ip_carp.c sc->lh_cookie = hook_establish(ifp->if_linkstatehooks, 1,
sc 1791 netinet/ip_carp.c carpdetach(sc);
sc 1792 netinet/ip_carp.c sc->sc_if.if_flags &= ~(IFF_UP|IFF_RUNNING);
sc 1798 netinet/ip_carp.c carp_set_enaddr(struct carp_softc *sc)
sc 1800 netinet/ip_carp.c if (sc->sc_vhid != -1 && sc->sc_carpdev) {
sc 1802 netinet/ip_carp.c if (sc->sc_if.if_flags & IFF_LINK2)
sc 1803 netinet/ip_carp.c sc->sc_carplladdr[0] = 1;
sc 1805 netinet/ip_carp.c sc->sc_carplladdr[0] = 0;
sc 1806 netinet/ip_carp.c sc->sc_carplladdr[1] = 0;
sc 1807 netinet/ip_carp.c sc->sc_carplladdr[2] = 0x5e;
sc 1808 netinet/ip_carp.c sc->sc_carplladdr[3] = 0;
sc 1809 netinet/ip_carp.c sc->sc_carplladdr[4] = 1;
sc 1810 netinet/ip_carp.c sc->sc_carplladdr[5] = sc->sc_vhid;
sc 1812 netinet/ip_carp.c bzero(sc->sc_carplladdr, ETHER_ADDR_LEN);
sc 1818 netinet/ip_carp.c if ((bcmp(sc->sc_ac.ac_enaddr + 1, sc->sc_carplladdr + 1,
sc 1820 netinet/ip_carp.c (!sc->sc_ac.ac_enaddr[0] && !sc->sc_ac.ac_enaddr[1] &&
sc 1821 netinet/ip_carp.c !sc->sc_ac.ac_enaddr[2] && !sc->sc_ac.ac_enaddr[3] &&
sc 1822 netinet/ip_carp.c !sc->sc_ac.ac_enaddr[4] && !sc->sc_ac.ac_enaddr[5]))
sc 1823 netinet/ip_carp.c bcopy(sc->sc_carplladdr, sc->sc_ac.ac_enaddr, ETHER_ADDR_LEN);
sc 1826 netinet/ip_carp.c if (bcmp(sc->sc_ac.ac_enaddr, sc->sc_curlladdr, ETHER_ADDR_LEN) != 0) {
sc 1827 netinet/ip_carp.c bcopy(sc->sc_ac.ac_enaddr, LLADDR(sc->sc_if.if_sadl),
sc 1829 netinet/ip_carp.c bcopy(sc->sc_ac.ac_enaddr, sc->sc_curlladdr, ETHER_ADDR_LEN);
sc 1835 netinet/ip_carp.c in6_ifattach_linklocal(&sc->sc_if, NULL);
sc 1837 netinet/ip_carp.c carp_set_state(sc, INIT);
sc 1838 netinet/ip_carp.c carp_setrun(sc, 0);
sc 1845 netinet/ip_carp.c struct carp_softc *sc = (struct carp_softc *) v;
sc 1849 netinet/ip_carp.c TAILQ_FOREACH(ifa, &sc->sc_if.if_addrlist, ifa_list) {
sc 1858 netinet/ip_carp.c if (new_naddrs < sc->sc_naddrs || new_naddrs6 < sc->sc_naddrs6) {
sc 1862 netinet/ip_carp.c sc->sc_naddrs = new_naddrs;
sc 1863 netinet/ip_carp.c sc->sc_naddrs6 = new_naddrs6;
sc 1867 netinet/ip_carp.c IN_LOOKUP_MULTI(mc_addr, &sc->sc_if, inm);
sc 1869 netinet/ip_carp.c bzero(&sc->sc_imo, sizeof(sc->sc_imo));
sc 1871 netinet/ip_carp.c if (sc->sc_carpdev != NULL && sc->sc_naddrs > 0)
sc 1872 netinet/ip_carp.c carp_join_multicast(sc);
sc 1875 netinet/ip_carp.c if (sc->sc_naddrs == 0 && sc->sc_naddrs6 == 0) {
sc 1876 netinet/ip_carp.c sc->sc_if.if_flags &= ~IFF_UP;
sc 1877 netinet/ip_carp.c carp_set_state(sc, INIT);
sc 1879 netinet/ip_carp.c carp_hmac_prepare(sc);
sc 1882 netinet/ip_carp.c carp_setrun(sc, 0);
sc 1886 netinet/ip_carp.c carp_set_addr(struct carp_softc *sc, struct sockaddr_in *sin)
sc 1888 netinet/ip_carp.c struct ifnet *ifp = sc->sc_carpdev;
sc 1893 netinet/ip_carp.c if (!(sc->sc_if.if_flags & IFF_UP))
sc 1894 netinet/ip_carp.c carp_set_state(sc, INIT);
sc 1895 netinet/ip_carp.c if (sc->sc_naddrs)
sc 1896 netinet/ip_carp.c sc->sc_if.if_flags |= IFF_UP;
sc 1897 netinet/ip_carp.c carp_setrun(sc, 0);
sc 1907 netinet/ip_carp.c if (ia->ia_ifp != &sc->sc_if &&
sc 1927 netinet/ip_carp.c if ((error = carp_set_ifp(sc, ifp)))
sc 1930 netinet/ip_carp.c if (sc->sc_carpdev == NULL)
sc 1933 netinet/ip_carp.c if (sc->sc_naddrs == 0 && (error = carp_join_multicast(sc)) != 0)
sc 1936 netinet/ip_carp.c sc->sc_naddrs++;
sc 1937 netinet/ip_carp.c if (sc->sc_carpdev != NULL)
sc 1938 netinet/ip_carp.c sc->sc_if.if_flags |= IFF_UP;
sc 1940 netinet/ip_carp.c carp_set_state(sc, INIT);
sc 1946 netinet/ip_carp.c if (sc->ah_cookie == NULL)
sc 1947 netinet/ip_carp.c sc->ah_cookie = hook_establish(sc->sc_if.if_addrhooks, 0,
sc 1948 netinet/ip_carp.c carp_addr_updated, sc);
sc 1954 netinet/ip_carp.c carp_join_multicast(struct carp_softc *sc)
sc 1956 netinet/ip_carp.c struct ip_moptions *imo = &sc->sc_imo, tmpimo;
sc 1962 netinet/ip_carp.c in_addmulti(&addr, &sc->sc_if)) == NULL) {
sc 1968 netinet/ip_carp.c imo->imo_multicast_ifp = &sc->sc_if;
sc 1977 netinet/ip_carp.c carp_set_addr6(struct carp_softc *sc, struct sockaddr_in6 *sin6)
sc 1979 netinet/ip_carp.c struct ifnet *ifp = sc->sc_carpdev;
sc 1984 netinet/ip_carp.c if (!(sc->sc_if.if_flags & IFF_UP))
sc 1985 netinet/ip_carp.c carp_set_state(sc, INIT);
sc 1986 netinet/ip_carp.c if (sc->sc_naddrs6)
sc 1987 netinet/ip_carp.c sc->sc_if.if_flags |= IFF_UP;
sc 1988 netinet/ip_carp.c carp_setrun(sc, 0);
sc 2005 netinet/ip_carp.c if (ia->ia_ifp != &sc->sc_if &&
sc 2016 netinet/ip_carp.c if (sc->sc_carpdev) {
sc 2017 netinet/ip_carp.c if (sc->sc_carpdev != ia->ia_ifp)
sc 2024 netinet/ip_carp.c if ((error = carp_set_ifp(sc, ifp)))
sc 2027 netinet/ip_carp.c if (sc->sc_carpdev == NULL)
sc 2030 netinet/ip_carp.c if (sc->sc_naddrs6 == 0 && (error = carp_join_multicast6(sc)) != 0)
sc 2034 netinet/ip_carp.c sc->sc_naddrs6++;
sc 2035 netinet/ip_carp.c if (sc->sc_carpdev != NULL && sc->sc_naddrs6)
sc 2036 netinet/ip_carp.c sc->sc_if.if_flags |= IFF_UP;
sc 2037 netinet/ip_carp.c carp_set_state(sc, INIT);
sc 2038 netinet/ip_carp.c carp_setrun(sc, 0);
sc 2044 netinet/ip_carp.c carp_join_multicast6(struct carp_softc *sc)
sc 2047 netinet/ip_carp.c struct ip6_moptions *im6o = &sc->sc_im6o;
sc 2056 netinet/ip_carp.c addr6.sin6_addr.s6_addr16[1] = htons(sc->sc_if.if_index);
sc 2058 netinet/ip_carp.c if ((imm = in6_joingroup(&sc->sc_if,
sc 2065 netinet/ip_carp.c addr6.sin6_addr.s6_addr16[1] = htons(sc->sc_if.if_index);
sc 2070 netinet/ip_carp.c if ((imm2 = in6_joingroup(&sc->sc_if,
sc 2077 netinet/ip_carp.c im6o->im6o_multicast_ifp = &sc->sc_if;
sc 2094 netinet/ip_carp.c struct carp_softc *sc = ifp->if_softc, *vr;
sc 2106 netinet/ip_carp.c sc->sc_if.if_flags |= IFF_UP;
sc 2109 netinet/ip_carp.c error = carp_set_addr(sc, satosin(ifa->ifa_addr));
sc 2114 netinet/ip_carp.c sc->sc_if.if_flags |= IFF_UP;
sc 2115 netinet/ip_carp.c error = carp_set_addr6(sc, satosin6(ifa->ifa_addr));
sc 2125 netinet/ip_carp.c if (sc->sc_state != INIT && !(ifr->ifr_flags & IFF_UP)) {
sc 2126 netinet/ip_carp.c timeout_del(&sc->sc_ad_tmo);
sc 2127 netinet/ip_carp.c timeout_del(&sc->sc_md_tmo);
sc 2128 netinet/ip_carp.c timeout_del(&sc->sc_md6_tmo);
sc 2129 netinet/ip_carp.c if (sc->sc_state == MASTER) {
sc 2131 netinet/ip_carp.c sc->sc_if.if_flags |= IFF_UP;
sc 2132 netinet/ip_carp.c sc->sc_bow_out = 1;
sc 2133 netinet/ip_carp.c carp_send_ad(sc);
sc 2135 netinet/ip_carp.c sc->sc_if.if_flags &= ~IFF_UP;
sc 2136 netinet/ip_carp.c carp_set_state(sc, INIT);
sc 2137 netinet/ip_carp.c carp_setrun(sc, 0);
sc 2138 netinet/ip_carp.c } else if (sc->sc_state == INIT && (ifr->ifr_flags & IFF_UP)) {
sc 2139 netinet/ip_carp.c sc->sc_if.if_flags |= IFF_UP;
sc 2140 netinet/ip_carp.c carp_setrun(sc, 0);
sc 2142 netinet/ip_carp.c carp_set_enaddr(sc); /* for changes on LINK2 */
sc 2144 netinet/ip_carp.c carp_update_lsmask(sc);
sc 2156 netinet/ip_carp.c if ((error = carp_set_ifp(sc, cdev)))
sc 2158 netinet/ip_carp.c if (sc->sc_state != INIT && carpr.carpr_state != sc->sc_state) {
sc 2161 netinet/ip_carp.c timeout_del(&sc->sc_ad_tmo);
sc 2162 netinet/ip_carp.c carp_set_state(sc, BACKUP);
sc 2163 netinet/ip_carp.c carp_setrun(sc, 0);
sc 2164 netinet/ip_carp.c carp_setroute(sc, RTM_DELETE);
sc 2167 netinet/ip_carp.c carp_master_down(sc);
sc 2173 netinet/ip_carp.c if (carpr.carpr_vhid > 0 && carpr.carpr_vhid != sc->sc_vhid) {
sc 2178 netinet/ip_carp.c if (sc->sc_carpdev) {
sc 2180 netinet/ip_carp.c cif = (struct carp_if *)sc->sc_carpdev->if_carp;
sc 2182 netinet/ip_carp.c if (vr != sc &&
sc 2186 netinet/ip_carp.c if (carpr.carpr_vhid != sc->sc_vhid) {
sc 2187 netinet/ip_carp.c sc->sc_vhid = carpr.carpr_vhid;
sc 2188 netinet/ip_carp.c carp_set_enaddr(sc);
sc 2189 netinet/ip_carp.c carp_set_state(sc, INIT);
sc 2202 netinet/ip_carp.c sc->sc_advbase = carpr.carpr_advbase;
sc 2203 netinet/ip_carp.c sc->sc_advskew = carpr.carpr_advskew;
sc 2206 netinet/ip_carp.c bcopy(carpr.carpr_key, sc->sc_key, sizeof(sc->sc_key));
sc 2211 netinet/ip_carp.c carp_setrun(sc, 0);
sc 2217 netinet/ip_carp.c if (sc->sc_carpdev != NULL)
sc 2218 netinet/ip_carp.c strlcpy(carpr.carpr_carpdev, sc->sc_carpdev->if_xname,
sc 2220 netinet/ip_carp.c carpr.carpr_state = sc->sc_state;
sc 2221 netinet/ip_carp.c carpr.carpr_vhid = sc->sc_vhid;
sc 2222 netinet/ip_carp.c carpr.carpr_advbase = sc->sc_advbase;
sc 2223 netinet/ip_carp.c carpr.carpr_advskew = sc->sc_advskew;
sc 2225 netinet/ip_carp.c bcopy(sc->sc_key, carpr.carpr_key,
sc 2231 netinet/ip_carp.c error = carp_ether_addmulti(sc, ifr);
sc 2235 netinet/ip_carp.c error = carp_ether_delmulti(sc, ifr);
sc 2239 netinet/ip_carp.c if (sc->sc_suppress)
sc 2249 netinet/ip_carp.c if (bcmp(sc->sc_ac.ac_enaddr, sc->sc_curlladdr, ETHER_ADDR_LEN) != 0)
sc 2250 netinet/ip_carp.c carp_set_enaddr(sc);
sc 2251 netinet/ip_carp.c carp_hmac_prepare(sc);
sc 2277 netinet/ip_carp.c struct carp_softc *sc = ifp->if_softc;
sc 2279 netinet/ip_carp.c if (ifgr->ifgr_attrib.ifg_carp_demoted > 0 && (sc->sc_if.if_flags &
sc 2281 netinet/ip_carp.c sc->sc_state == MASTER)
sc 2282 netinet/ip_carp.c carp_send_ad(sc);
sc 2300 netinet/ip_carp.c struct carp_softc *sc = ((struct carp_softc *)ifp->if_softc);
sc 2302 netinet/ip_carp.c if (sc->sc_carpdev != NULL && sc->sc_state == MASTER)
sc 2303 netinet/ip_carp.c return (sc->sc_carpdev->if_output(ifp, m, sa, rt));
sc 2311 netinet/ip_carp.c carp_set_state(struct carp_softc *sc, int state)
sc 2313 netinet/ip_carp.c if (sc->sc_state == state)
sc 2316 netinet/ip_carp.c sc->sc_state = state;
sc 2317 netinet/ip_carp.c carp_update_lsmask(sc);
sc 2321 netinet/ip_carp.c sc->sc_if.if_link_state = LINK_STATE_DOWN;
sc 2324 netinet/ip_carp.c sc->sc_if.if_link_state = LINK_STATE_UP;
sc 2327 netinet/ip_carp.c sc->sc_if.if_link_state = LINK_STATE_UNKNOWN;
sc 2330 netinet/ip_carp.c if_link_state_change(&sc->sc_if);
sc 2358 netinet/ip_carp.c carp_group_demote_count(struct carp_softc *sc)
sc 2363 netinet/ip_carp.c TAILQ_FOREACH(ifgl, &sc->sc_if.if_groups, ifgl_next)
sc 2373 netinet/ip_carp.c struct carp_softc *sc;
sc 2381 netinet/ip_carp.c TAILQ_FOREACH(sc, &cif->vhif_vrs, sc_list) {
sc 2382 netinet/ip_carp.c int suppressed = sc->sc_suppress;
sc 2384 netinet/ip_carp.c if (sc->sc_carpdev->if_link_state == LINK_STATE_DOWN ||
sc 2385 netinet/ip_carp.c !(sc->sc_carpdev->if_flags & IFF_UP)) {
sc 2386 netinet/ip_carp.c sc->sc_if.if_flags &= ~IFF_RUNNING;
sc 2387 netinet/ip_carp.c timeout_del(&sc->sc_ad_tmo);
sc 2388 netinet/ip_carp.c timeout_del(&sc->sc_md_tmo);
sc 2389 netinet/ip_carp.c timeout_del(&sc->sc_md6_tmo);
sc 2390 netinet/ip_carp.c carp_set_state(sc, INIT);
sc 2391 netinet/ip_carp.c sc->sc_suppress = 1;
sc 2392 netinet/ip_carp.c carp_setrun(sc, 0);
sc 2394 netinet/ip_carp.c carp_group_demote_adj(&sc->sc_if, 1);
sc 2396 netinet/ip_carp.c carp_set_state(sc, INIT);
sc 2397 netinet/ip_carp.c sc->sc_suppress = 0;
sc 2398 netinet/ip_carp.c carp_setrun(sc, 0);
sc 2400 netinet/ip_carp.c carp_group_demote_adj(&sc->sc_if, -1);
sc 2406 netinet/ip_carp.c carp_ether_addmulti(struct carp_softc *sc, struct ifreq *ifr)
sc 2413 netinet/ip_carp.c ifp = sc->sc_carpdev;
sc 2417 netinet/ip_carp.c error = ether_addmulti(ifr, (struct arpcom *)&sc->sc_ac);
sc 2438 netinet/ip_carp.c ETHER_LOOKUP_MULTI(addrlo, addrhi, &sc->sc_ac, mc->mc_enm);
sc 2440 netinet/ip_carp.c LIST_INSERT_HEAD(&sc->carp_mc_listhead, mc, mc_entries);
sc 2452 netinet/ip_carp.c (void)ether_delmulti(ifr, (struct arpcom *)&sc->sc_ac);
sc 2458 netinet/ip_carp.c carp_ether_delmulti(struct carp_softc *sc, struct ifreq *ifr)
sc 2466 netinet/ip_carp.c ifp = sc->sc_carpdev;
sc 2476 netinet/ip_carp.c ETHER_LOOKUP_MULTI(addrlo, addrhi, &sc->sc_ac, enm);
sc 2480 netinet/ip_carp.c LIST_FOREACH(mc, &sc->carp_mc_listhead, mc_entries)
sc 2488 netinet/ip_carp.c error = ether_delmulti(ifr, (struct arpcom *)&sc->sc_ac);
sc 2499 netinet/ip_carp.c (void)ether_addmulti(ifr, (struct arpcom *)&sc->sc_ac);
sc 2508 netinet/ip_carp.c carp_ether_purgemulti(struct carp_softc *sc)
sc 2510 netinet/ip_carp.c struct ifnet *ifp = sc->sc_carpdev; /* Parent. */
sc 2525 netinet/ip_carp.c while ((mc = LIST_FIRST(&sc->carp_mc_listhead)) != NULL) {
sc 89 netinet/ip_ether.c struct gif_softc *sc;
sc 222 netinet/ip_ether.c LIST_FOREACH(sc, &gif_softc_list, gif_list) {
sc 223 netinet/ip_ether.c if ((sc->gif_psrc == NULL) ||
sc 224 netinet/ip_ether.c (sc->gif_pdst == NULL) ||
sc 225 netinet/ip_ether.c !(sc->gif_if.if_flags & (IFF_UP|IFF_RUNNING)))
sc 228 netinet/ip_ether.c if (!bcmp(sc->gif_psrc, &sdst, sc->gif_psrc->sa_len) &&
sc 229 netinet/ip_ether.c !bcmp(sc->gif_pdst, &ssrc, sc->gif_pdst->sa_len) &&
sc 230 netinet/ip_ether.c sc->gif_if.if_bridge != NULL)
sc 235 netinet/ip_ether.c if (sc == NULL) {
sc 242 netinet/ip_ether.c if (sc->gif_if.if_bpf)
sc 243 netinet/ip_ether.c bpf_mtap_af(sc->gif_if.if_bpf, AF_LINK, m, BPF_DIRECTION_IN);
sc 255 netinet/ip_ether.c m->m_pkthdr.rcvif = &sc->gif_if;
sc 257 netinet/ip_ether.c sc->gif_if.if_imcasts++;
sc 260 netinet/ip_ether.c m = bridge_input(&sc->gif_if, &eh, m);
sc 104 netinet/ip_gre.c struct gre_softc *sc;
sc 108 netinet/ip_gre.c if ((sc = gre_lookup(m, proto)) == NULL) {
sc 120 netinet/ip_gre.c m->m_pkthdr.rcvif = &sc->sc_if;
sc 122 netinet/ip_gre.c sc->sc_if.if_ipackets++;
sc 123 netinet/ip_gre.c sc->sc_if.if_ibytes += m->m_pkthdr.len;
sc 195 netinet/ip_gre.c if (sc->sc_if.if_bpf)
sc 196 netinet/ip_gre.c bpf_mtap_af(sc->sc_if.if_bpf, af, m, BPF_DIRECTION_IN);
sc 251 netinet/ip_gre.c struct gre_softc *sc;
sc 266 netinet/ip_gre.c if ((sc = gre_lookup(m, IPPROTO_MOBILE)) == NULL) {
sc 280 netinet/ip_gre.c m->m_pkthdr.rcvif = &sc->sc_if;
sc 282 netinet/ip_gre.c sc->sc_if.if_ipackets++;
sc 283 netinet/ip_gre.c sc->sc_if.if_ibytes += m->m_pkthdr.len;
sc 321 netinet/ip_gre.c if (sc->sc_if.if_bpf)
sc 322 netinet/ip_gre.c bpf_mtap_af(sc->sc_if.if_bpf, AF_INET, m, BPF_DIRECTION_IN);
sc 339 netinet/ip_gre.c struct gre_softc *sc;
sc 341 netinet/ip_gre.c LIST_FOREACH(sc, &gre_softc_list, sc_list) {
sc 342 netinet/ip_gre.c if ((sc->g_dst.s_addr == ip->ip_src.s_addr) &&
sc 343 netinet/ip_gre.c (sc->g_src.s_addr == ip->ip_dst.s_addr) &&
sc 344 netinet/ip_gre.c (sc->g_proto == proto) &&
sc 345 netinet/ip_gre.c ((sc->sc_if.if_flags & IFF_UP) != 0))
sc 346 netinet/ip_gre.c return (sc);
sc 3331 netinet/tcp_input.c #define SYN_CACHE_RM(sc) \
sc 3333 netinet/tcp_input.c (sc)->sc_flags |= SCF_DEAD; \
sc 3334 netinet/tcp_input.c TAILQ_REMOVE(&tcp_syn_cache[(sc)->sc_bucketidx].sch_bucket, \
sc 3335 netinet/tcp_input.c (sc), sc_bucketq); \
sc 3336 netinet/tcp_input.c (sc)->sc_tp = NULL; \
sc 3337 netinet/tcp_input.c LIST_REMOVE((sc), sc_tpq); \
sc 3338 netinet/tcp_input.c tcp_syn_cache[(sc)->sc_bucketidx].sch_length--; \
sc 3339 netinet/tcp_input.c timeout_del(&(sc)->sc_timer); \
sc 3343 netinet/tcp_input.c #define SYN_CACHE_PUT(sc) \
sc 3345 netinet/tcp_input.c if ((sc)->sc_ipopts) \
sc 3346 netinet/tcp_input.c (void) m_free((sc)->sc_ipopts); \
sc 3347 netinet/tcp_input.c if ((sc)->sc_route4.ro_rt != NULL) \
sc 3348 netinet/tcp_input.c RTFREE((sc)->sc_route4.ro_rt); \
sc 3349 netinet/tcp_input.c timeout_set(&(sc)->sc_timer, syn_cache_reaper, (sc)); \
sc 3350 netinet/tcp_input.c timeout_add(&(sc)->sc_timer, 0); \
sc 3359 netinet/tcp_input.c #define SYN_CACHE_TIMER_ARM(sc) \
sc 3361 netinet/tcp_input.c TCPT_RANGESET((sc)->sc_rxtcur, \
sc 3362 netinet/tcp_input.c TCPTV_SRTTDFLT * tcp_backoff[(sc)->sc_rxtshift], TCPTV_MIN, \
sc 3364 netinet/tcp_input.c if (!timeout_initialized(&(sc)->sc_timer)) \
sc 3365 netinet/tcp_input.c timeout_set(&(sc)->sc_timer, syn_cache_timer, (sc)); \
sc 3366 netinet/tcp_input.c timeout_add(&(sc)->sc_timer, (sc)->sc_rxtcur * (hz / PR_SLOWHZ)); \
sc 3369 netinet/tcp_input.c #define SYN_CACHE_TIMESTAMP(sc) tcp_now + (sc)->sc_modulate
sc 3386 netinet/tcp_input.c syn_cache_insert(sc, tp)
sc 3387 netinet/tcp_input.c struct syn_cache *sc;
sc 3403 netinet/tcp_input.c SYN_HASHALL(sc->sc_hash, &sc->sc_src.sa, &sc->sc_dst.sa);
sc 3404 netinet/tcp_input.c sc->sc_bucketidx = sc->sc_hash % tcp_syn_cache_size;
sc 3405 netinet/tcp_input.c scp = &tcp_syn_cache[sc->sc_bucketidx];
sc 3468 netinet/tcp_input.c sc->sc_rxttot = 0;
sc 3469 netinet/tcp_input.c sc->sc_rxtshift = 0;
sc 3470 netinet/tcp_input.c SYN_CACHE_TIMER_ARM(sc);
sc 3473 netinet/tcp_input.c LIST_INSERT_HEAD(&tp->t_sc, sc, sc_tpq);
sc 3476 netinet/tcp_input.c TAILQ_INSERT_TAIL(&scp->sch_bucket, sc, sc_bucketq);
sc 3492 netinet/tcp_input.c struct syn_cache *sc = arg;
sc 3496 netinet/tcp_input.c if (sc->sc_flags & SCF_DEAD) {
sc 3501 netinet/tcp_input.c if (__predict_false(sc->sc_rxtshift == TCP_MAXRXTSHIFT)) {
sc 3511 netinet/tcp_input.c sc->sc_rxttot += sc->sc_rxtcur;
sc 3512 netinet/tcp_input.c if (sc->sc_rxttot >= tcptv_keep_init)
sc 3516 netinet/tcp_input.c (void) syn_cache_respond(sc, NULL);
sc 3519 netinet/tcp_input.c sc->sc_rxtshift++;
sc 3520 netinet/tcp_input.c SYN_CACHE_TIMER_ARM(sc);
sc 3527 netinet/tcp_input.c SYN_CACHE_RM(sc);
sc 3528 netinet/tcp_input.c SYN_CACHE_PUT(sc);
sc 3535 netinet/tcp_input.c struct syn_cache *sc = arg;
sc 3539 netinet/tcp_input.c pool_put(&syn_cache_pool, (sc));
sc 3553 netinet/tcp_input.c struct syn_cache *sc, *nsc;
sc 3558 netinet/tcp_input.c for (sc = LIST_FIRST(&tp->t_sc); sc != NULL; sc = nsc) {
sc 3559 netinet/tcp_input.c nsc = LIST_NEXT(sc, sc_tpq);
sc 3562 netinet/tcp_input.c if (sc->sc_tp != tp)
sc 3565 netinet/tcp_input.c SYN_CACHE_RM(sc);
sc 3566 netinet/tcp_input.c SYN_CACHE_PUT(sc);
sc 3583 netinet/tcp_input.c struct syn_cache *sc;
sc 3593 netinet/tcp_input.c for (sc = TAILQ_FIRST(&scp->sch_bucket); sc != NULL;
sc 3594 netinet/tcp_input.c sc = TAILQ_NEXT(sc, sc_bucketq)) {
sc 3595 netinet/tcp_input.c if (sc->sc_hash != hash)
sc 3597 netinet/tcp_input.c if (!bcmp(&sc->sc_src, src, src->sa_len) &&
sc 3598 netinet/tcp_input.c !bcmp(&sc->sc_dst, dst, dst->sa_len)) {
sc 3600 netinet/tcp_input.c return (sc);
sc 3639 netinet/tcp_input.c struct syn_cache *sc;
sc 3648 netinet/tcp_input.c if ((sc = syn_cache_lookup(src, dst, &scp)) == NULL) {
sc 3657 netinet/tcp_input.c if ((th->th_ack != sc->sc_iss + 1) ||
sc 3658 netinet/tcp_input.c SEQ_LEQ(th->th_seq, sc->sc_irs) ||
sc 3659 netinet/tcp_input.c SEQ_GT(th->th_seq, sc->sc_irs + 1 + sc->sc_win)) {
sc 3660 netinet/tcp_input.c (void) syn_cache_respond(sc, m);
sc 3666 netinet/tcp_input.c SYN_CACHE_RM(sc);
sc 3739 netinet/tcp_input.c inp->inp_options = sc->sc_ipopts;
sc 3740 netinet/tcp_input.c sc->sc_ipopts = NULL;
sc 3750 netinet/tcp_input.c inp->inp_route = sc->sc_route4; /* struct assignment */
sc 3753 netinet/tcp_input.c inp->inp_route6 = sc->sc_route6;
sc 3755 netinet/tcp_input.c sc->sc_route4.ro_rt = NULL;
sc 3788 netinet/tcp_input.c if (sc->sc_request_r_scale != 15) {
sc 3789 netinet/tcp_input.c tp->requested_s_scale = sc->sc_requested_s_scale;
sc 3790 netinet/tcp_input.c tp->request_r_scale = sc->sc_request_r_scale;
sc 3791 netinet/tcp_input.c tp->snd_scale = sc->sc_requested_s_scale;
sc 3792 netinet/tcp_input.c tp->rcv_scale = sc->sc_request_r_scale;
sc 3795 netinet/tcp_input.c if (sc->sc_flags & SCF_TIMESTAMP)
sc 3806 netinet/tcp_input.c tp->sack_enable = sc->sc_flags & SCF_SACK_PERMIT;
sc 3809 netinet/tcp_input.c tp->ts_modulate = sc->sc_modulate;
sc 3810 netinet/tcp_input.c tp->iss = sc->sc_iss;
sc 3811 netinet/tcp_input.c tp->irs = sc->sc_irs;
sc 3822 netinet/tcp_input.c if (sc->sc_flags & SCF_ECN_PERMIT) {
sc 3828 netinet/tcp_input.c if (sc->sc_flags & SCF_SACK_PERMIT)
sc 3832 netinet/tcp_input.c if (sc->sc_flags & SCF_SIGNATURE)
sc 3841 netinet/tcp_input.c tcp_mss(tp, sc->sc_peermaxseg); /* sets t_maxseg */
sc 3842 netinet/tcp_input.c if (sc->sc_peermaxseg)
sc 3845 netinet/tcp_input.c if (sc->sc_rxtshift > 0)
sc 3847 netinet/tcp_input.c tp->snd_wl1 = sc->sc_irs;
sc 3848 netinet/tcp_input.c tp->rcv_up = sc->sc_irs + 1;
sc 3857 netinet/tcp_input.c if (sc->sc_win > 0 && SEQ_GT(tp->rcv_nxt + sc->sc_win, tp->rcv_adv))
sc 3858 netinet/tcp_input.c tp->rcv_adv = tp->rcv_nxt + sc->sc_win;
sc 3862 netinet/tcp_input.c SYN_CACHE_PUT(sc);
sc 3870 netinet/tcp_input.c SYN_CACHE_PUT(sc);
sc 3887 netinet/tcp_input.c struct syn_cache *sc;
sc 3891 netinet/tcp_input.c if ((sc = syn_cache_lookup(src, dst, &scp)) == NULL) {
sc 3895 netinet/tcp_input.c if (SEQ_LT(th->th_seq, sc->sc_irs) ||
sc 3896 netinet/tcp_input.c SEQ_GT(th->th_seq, sc->sc_irs+1)) {
sc 3900 netinet/tcp_input.c SYN_CACHE_RM(sc);
sc 3903 netinet/tcp_input.c SYN_CACHE_PUT(sc);
sc 3912 netinet/tcp_input.c struct syn_cache *sc;
sc 3917 netinet/tcp_input.c if ((sc = syn_cache_lookup(src, dst, &scp)) == NULL) {
sc 3922 netinet/tcp_input.c if (ntohl (th->th_seq) != sc->sc_iss) {
sc 3935 netinet/tcp_input.c if ((sc->sc_flags & SCF_UNREACH) == 0 || sc->sc_rxtshift < 3) {
sc 3936 netinet/tcp_input.c sc->sc_flags |= SCF_UNREACH;
sc 3941 netinet/tcp_input.c SYN_CACHE_RM(sc);
sc 3944 netinet/tcp_input.c SYN_CACHE_PUT(sc);
sc 3976 netinet/tcp_input.c struct syn_cache *sc;
sc 4033 netinet/tcp_input.c if ((sc = syn_cache_lookup(src, dst, &scp)) != NULL) {
sc 4040 netinet/tcp_input.c if (sc->sc_ipopts)
sc 4041 netinet/tcp_input.c (void) m_free(sc->sc_ipopts);
sc 4042 netinet/tcp_input.c sc->sc_ipopts = ipopts;
sc 4044 netinet/tcp_input.c sc->sc_timestamp = tb.ts_recent;
sc 4045 netinet/tcp_input.c if (syn_cache_respond(sc, m) == 0) {
sc 4052 netinet/tcp_input.c sc = pool_get(&syn_cache_pool, PR_NOWAIT);
sc 4053 netinet/tcp_input.c if (sc == NULL) {
sc 4063 netinet/tcp_input.c bzero(sc, sizeof(struct syn_cache));
sc 4064 netinet/tcp_input.c bzero(&sc->sc_timer, sizeof(sc->sc_timer));
sc 4065 netinet/tcp_input.c bcopy(src, &sc->sc_src, src->sa_len);
sc 4066 netinet/tcp_input.c bcopy(dst, &sc->sc_dst, dst->sa_len);
sc 4067 netinet/tcp_input.c sc->sc_flags = 0;
sc 4068 netinet/tcp_input.c sc->sc_ipopts = ipopts;
sc 4069 netinet/tcp_input.c sc->sc_irs = th->th_seq;
sc 4073 netinet/tcp_input.c sc->sc_iss = tcp_iss;
sc 4075 netinet/tcp_input.c sc->sc_iss = issp ? *issp : arc4random();
sc 4077 netinet/tcp_input.c sc->sc_peermaxseg = oi->maxseg;
sc 4078 netinet/tcp_input.c sc->sc_ourmaxseg = tcp_mss_adv(m->m_flags & M_PKTHDR ?
sc 4079 netinet/tcp_input.c m->m_pkthdr.rcvif : NULL, sc->sc_src.sa.sa_family);
sc 4080 netinet/tcp_input.c sc->sc_win = win;
sc 4081 netinet/tcp_input.c sc->sc_timestamp = tb.ts_recent;
sc 4084 netinet/tcp_input.c sc->sc_flags |= SCF_TIMESTAMP;
sc 4085 netinet/tcp_input.c sc->sc_modulate = arc4random();
sc 4089 netinet/tcp_input.c sc->sc_requested_s_scale = tb.requested_s_scale;
sc 4090 netinet/tcp_input.c sc->sc_request_r_scale = 0;
sc 4091 netinet/tcp_input.c while (sc->sc_request_r_scale < TCP_MAX_WINSHIFT &&
sc 4092 netinet/tcp_input.c TCP_MAXWIN << sc->sc_request_r_scale <
sc 4094 netinet/tcp_input.c sc->sc_request_r_scale++;
sc 4096 netinet/tcp_input.c sc->sc_requested_s_scale = 15;
sc 4097 netinet/tcp_input.c sc->sc_request_r_scale = 15;
sc 4105 netinet/tcp_input.c sc->sc_flags |= SCF_ECN_PERMIT;
sc 4113 netinet/tcp_input.c sc->sc_flags |= SCF_SACK_PERMIT;
sc 4117 netinet/tcp_input.c sc->sc_flags |= SCF_SIGNATURE;
sc 4119 netinet/tcp_input.c sc->sc_tp = tp;
sc 4120 netinet/tcp_input.c if (syn_cache_respond(sc, m) == 0) {
sc 4121 netinet/tcp_input.c syn_cache_insert(sc, tp);
sc 4125 netinet/tcp_input.c SYN_CACHE_PUT(sc);
sc 4132 netinet/tcp_input.c syn_cache_respond(sc, m)
sc 4133 netinet/tcp_input.c struct syn_cache *sc;
sc 4148 netinet/tcp_input.c switch (sc->sc_src.sa.sa_family) {
sc 4151 netinet/tcp_input.c ro = &sc->sc_route4;
sc 4156 netinet/tcp_input.c ro = (struct route *)&sc->sc_route6;
sc 4166 netinet/tcp_input.c optlen = 4 + (sc->sc_request_r_scale != 15 ? 4 : 0) +
sc 4168 netinet/tcp_input.c ((sc->sc_flags & SCF_SACK_PERMIT) ? 4 : 0) +
sc 4171 netinet/tcp_input.c ((sc->sc_flags & SCF_SIGNATURE) ? TCPOLEN_SIGLEN : 0) +
sc 4173 netinet/tcp_input.c ((sc->sc_flags & SCF_TIMESTAMP) ? TCPOLEN_TSTAMP_APPA : 0);
sc 4203 netinet/tcp_input.c switch (sc->sc_src.sa.sa_family) {
sc 4206 netinet/tcp_input.c ip->ip_dst = sc->sc_src.sin.sin_addr;
sc 4207 netinet/tcp_input.c ip->ip_src = sc->sc_dst.sin.sin_addr;
sc 4210 netinet/tcp_input.c th->th_dport = sc->sc_src.sin.sin_port;
sc 4211 netinet/tcp_input.c th->th_sport = sc->sc_dst.sin.sin_port;
sc 4216 netinet/tcp_input.c ip6->ip6_dst = sc->sc_src.sin6.sin6_addr;
sc 4217 netinet/tcp_input.c ip6->ip6_src = sc->sc_dst.sin6.sin6_addr;
sc 4221 netinet/tcp_input.c th->th_dport = sc->sc_src.sin6.sin6_port;
sc 4222 netinet/tcp_input.c th->th_sport = sc->sc_dst.sin6.sin6_port;
sc 4229 netinet/tcp_input.c th->th_seq = htonl(sc->sc_iss);
sc 4230 netinet/tcp_input.c th->th_ack = htonl(sc->sc_irs + 1);
sc 4235 netinet/tcp_input.c if (tcp_do_ecn && (sc->sc_flags & SCF_ECN_PERMIT))
sc 4238 netinet/tcp_input.c th->th_win = htons(sc->sc_win);
sc 4246 netinet/tcp_input.c *optp++ = (sc->sc_ourmaxseg >> 8) & 0xff;
sc 4247 netinet/tcp_input.c *optp++ = sc->sc_ourmaxseg & 0xff;
sc 4251 netinet/tcp_input.c if (sc->sc_flags & SCF_SACK_PERMIT) {
sc 4257 netinet/tcp_input.c if (sc->sc_request_r_scale != 15) {
sc 4260 netinet/tcp_input.c sc->sc_request_r_scale);
sc 4264 netinet/tcp_input.c if (sc->sc_flags & SCF_TIMESTAMP) {
sc 4268 netinet/tcp_input.c *lp++ = htonl(SYN_CACHE_TIMESTAMP(sc));
sc 4269 netinet/tcp_input.c *lp = htonl(sc->sc_timestamp);
sc 4274 netinet/tcp_input.c if (sc->sc_flags & SCF_SIGNATURE) {
sc 4280 netinet/tcp_input.c src.sa.sa_len = sc->sc_src.sa.sa_len;
sc 4281 netinet/tcp_input.c src.sa.sa_family = sc->sc_src.sa.sa_family;
sc 4282 netinet/tcp_input.c dst.sa.sa_len = sc->sc_dst.sa.sa_len;
sc 4283 netinet/tcp_input.c dst.sa.sa_family = sc->sc_dst.sa.sa_family;
sc 4285 netinet/tcp_input.c switch (sc->sc_src.sa.sa_family) {
sc 4312 netinet/tcp_input.c if (tcp_signature(tdb, sc->sc_src.sa.sa_family, m, th,
sc 4329 netinet/tcp_input.c switch (sc->sc_src.sa.sa_family) {
sc 4345 netinet/tcp_input.c inp = sc->sc_tp ? sc->sc_tp->t_inpcb : NULL;
sc 4351 netinet/tcp_input.c switch (sc->sc_src.sa.sa_family) {
sc 4370 netinet/tcp_input.c switch (sc->sc_src.sa.sa_family) {
sc 4373 netinet/tcp_input.c error = ip_output(m, sc->sc_ipopts, ro,
sc 77 netinet6/in6_gif.c struct gif_softc *sc = (struct gif_softc*)ifp;
sc 78 netinet6/in6_gif.c struct sockaddr_in6 *dst = (struct sockaddr_in6 *)&sc->gif_ro6.ro_dst;
sc 79 netinet6/in6_gif.c struct sockaddr_in6 *sin6_src = (struct sockaddr_in6 *)sc->gif_psrc;
sc 80 netinet6/in6_gif.c struct sockaddr_in6 *sin6_dst = (struct sockaddr_in6 *)sc->gif_pdst;
sc 150 netinet6/in6_gif.c if (sc->gif_ro6.ro_rt) {
sc 151 netinet6/in6_gif.c RTFREE(sc->gif_ro6.ro_rt);
sc 152 netinet6/in6_gif.c sc->gif_ro6.ro_rt = NULL;
sc 156 netinet6/in6_gif.c if (sc->gif_ro6.ro_rt == NULL) {
sc 157 netinet6/in6_gif.c rtalloc((struct route *)&sc->gif_ro6);
sc 158 netinet6/in6_gif.c if (sc->gif_ro6.ro_rt == NULL) {
sc 169 netinet6/in6_gif.c error = ip6_output(m, 0, &sc->gif_ro6, IPV6_MINMTU, 0, NULL, NULL);
sc 179 netinet6/in6_gif.c struct gif_softc *sc;
sc 190 netinet6/in6_gif.c LIST_FOREACH(sc, &gif_softc_list, gif_list) {
sc 191 netinet6/in6_gif.c if (sc->gif_psrc == NULL || sc->gif_pdst == NULL ||
sc 192 netinet6/in6_gif.c sc->gif_psrc->sa_family != AF_INET6 ||
sc 193 netinet6/in6_gif.c sc->gif_pdst->sa_family != AF_INET6) {
sc 197 netinet6/in6_gif.c if ((sc->gif_if.if_flags & IFF_UP) == 0)
sc 200 netinet6/in6_gif.c if (IN6_ARE_ADDR_EQUAL(&satoin6(sc->gif_psrc), &ip6->ip6_dst) &&
sc 201 netinet6/in6_gif.c IN6_ARE_ADDR_EQUAL(&satoin6(sc->gif_pdst), &ip6->ip6_src)) {
sc 202 netinet6/in6_gif.c gifp = &sc->gif_if;
sc 165 scsi/ch.c struct ch_softc *sc = (struct ch_softc *)self;
sc 170 scsi/ch.c sc->sc_link = link;
sc 172 scsi/ch.c link->device_softc = sc;
sc 180 scsi/ch.c ch_get_quirks(sc, sa->sa_inqbuf);
sc 190 scsi/ch.c struct ch_softc *sc;
sc 196 scsi/ch.c ((sc = ch_cd.cd_devs[unit]) == NULL))
sc 202 scsi/ch.c if (sc->sc_link->flags & SDEV_OPEN)
sc 205 scsi/ch.c sc->sc_link->flags |= SDEV_OPEN;
sc 213 scsi/ch.c error = scsi_test_unit_ready(sc->sc_link, TEST_READY_RETRIES,
sc 223 scsi/ch.c oldcounts[i] = sc->sc_counts[i];
sc 225 scsi/ch.c error = ch_get_params(sc, scsi_autoconf);
sc 230 scsi/ch.c if (oldcounts[i] != sc->sc_counts[i]) {
sc 238 scsi/ch.c sc->sc_dev.dv_xname,
sc 239 scsi/ch.c sc->sc_counts[CHET_ST], PLURAL(sc->sc_counts[CHET_ST]),
sc 240 scsi/ch.c sc->sc_counts[CHET_DT], PLURAL(sc->sc_counts[CHET_DT]),
sc 241 scsi/ch.c sc->sc_counts[CHET_MT], PLURAL(sc->sc_counts[CHET_MT]),
sc 242 scsi/ch.c sc->sc_counts[CHET_IE], PLURAL(sc->sc_counts[CHET_IE]));
sc 245 scsi/ch.c sc->sc_dev.dv_xname,
sc 246 scsi/ch.c sc->sc_movemask[CHET_MT], sc->sc_movemask[CHET_ST],
sc 247 scsi/ch.c sc->sc_movemask[CHET_IE], sc->sc_movemask[CHET_DT]);
sc 249 scsi/ch.c sc->sc_dev.dv_xname,
sc 250 scsi/ch.c sc->sc_exchangemask[CHET_MT], sc->sc_exchangemask[CHET_ST],
sc 251 scsi/ch.c sc->sc_exchangemask[CHET_IE], sc->sc_exchangemask[CHET_DT]);
sc 256 scsi/ch.c sc->sc_picker = sc->sc_firsts[CHET_MT];
sc 261 scsi/ch.c sc->sc_link->flags &= ~SDEV_OPEN;
sc 271 scsi/ch.c struct ch_softc *sc = ch_cd.cd_devs[CHUNIT(dev)];
sc 273 scsi/ch.c sc->sc_link->flags &= ~SDEV_OPEN;
sc 285 scsi/ch.c struct ch_softc *sc = ch_cd.cd_devs[CHUNIT(dev)];
sc 305 scsi/ch.c error = ch_move(sc, (struct changer_move *)data);
sc 309 scsi/ch.c error = ch_exchange(sc, (struct changer_exchange *)data);
sc 313 scsi/ch.c error = ch_position(sc, (struct changer_position *)data);
sc 317 scsi/ch.c *(int *)data = sc->sc_picker - sc->sc_firsts[CHET_MT];
sc 323 scsi/ch.c if (new_picker > (sc->sc_counts[CHET_MT] - 1))
sc 325 scsi/ch.c sc->sc_picker = sc->sc_firsts[CHET_MT] + new_picker;
sc 331 scsi/ch.c cp->cp_curpicker = sc->sc_picker - sc->sc_firsts[CHET_MT];
sc 332 scsi/ch.c cp->cp_npickers = sc->sc_counts[CHET_MT];
sc 333 scsi/ch.c cp->cp_nslots = sc->sc_counts[CHET_ST];
sc 334 scsi/ch.c cp->cp_nportals = sc->sc_counts[CHET_IE];
sc 335 scsi/ch.c cp->cp_ndrives = sc->sc_counts[CHET_DT];
sc 342 scsi/ch.c error = ch_usergetelemstatus(sc, cesr);
sc 348 scsi/ch.c error = scsi_do_ioctl(sc->sc_link, dev, cmd, data,
sc 357 scsi/ch.c ch_move(sc, cm)
sc 358 scsi/ch.c struct ch_softc *sc;
sc 369 scsi/ch.c if ((cm->cm_fromunit > (sc->sc_counts[cm->cm_fromtype] - 1)) ||
sc 370 scsi/ch.c (cm->cm_tounit > (sc->sc_counts[cm->cm_totype] - 1)))
sc 376 scsi/ch.c if ((sc->sc_movemask[cm->cm_fromtype] & (1 << cm->cm_totype)) == 0)
sc 382 scsi/ch.c fromelem = sc->sc_firsts[cm->cm_fromtype] + cm->cm_fromunit;
sc 383 scsi/ch.c toelem = sc->sc_firsts[cm->cm_totype] + cm->cm_tounit;
sc 390 scsi/ch.c _lto2b(sc->sc_picker, cmd.tea);
sc 399 scsi/ch.c return (scsi_scsi_cmd(sc->sc_link, (struct scsi_generic *)&cmd,
sc 404 scsi/ch.c ch_exchange(sc, ce)
sc 405 scsi/ch.c struct ch_softc *sc;
sc 417 scsi/ch.c if ((ce->ce_srcunit > (sc->sc_counts[ce->ce_srctype] - 1)) ||
sc 418 scsi/ch.c (ce->ce_fdstunit > (sc->sc_counts[ce->ce_fdsttype] - 1)) ||
sc 419 scsi/ch.c (ce->ce_sdstunit > (sc->sc_counts[ce->ce_sdsttype] - 1)))
sc 425 scsi/ch.c if (((sc->sc_exchangemask[ce->ce_srctype] &
sc 427 scsi/ch.c ((sc->sc_exchangemask[ce->ce_fdsttype] &
sc 434 scsi/ch.c src = sc->sc_firsts[ce->ce_srctype] + ce->ce_srcunit;
sc 435 scsi/ch.c dst1 = sc->sc_firsts[ce->ce_fdsttype] + ce->ce_fdstunit;
sc 436 scsi/ch.c dst2 = sc->sc_firsts[ce->ce_sdsttype] + ce->ce_sdstunit;
sc 443 scsi/ch.c _lto2b(sc->sc_picker, cmd.tea);
sc 455 scsi/ch.c return (scsi_scsi_cmd(sc->sc_link, (struct scsi_generic *)&cmd,
sc 460 scsi/ch.c ch_position(sc, cp)
sc 461 scsi/ch.c struct ch_softc *sc;
sc 472 scsi/ch.c if (cp->cp_unit > (sc->sc_counts[cp->cp_type] - 1))
sc 478 scsi/ch.c dst = sc->sc_firsts[cp->cp_type] + cp->cp_unit;
sc 485 scsi/ch.c _lto2b(sc->sc_picker, cmd.tea);
sc 493 scsi/ch.c return (scsi_scsi_cmd(sc->sc_link, (struct scsi_generic *)&cmd,
sc 542 scsi/ch.c ch_usergetelemstatus(sc, cesr)
sc 543 scsi/ch.c struct ch_softc *sc;
sc 560 scsi/ch.c if (sc->sc_counts[chet] == 0)
sc 570 scsi/ch.c error = ch_getelemstatus(sc, sc->sc_firsts[chet], 1, data, 1024,
sc 582 scsi/ch.c (desclen * sc->sc_counts[chet]);
sc 590 scsi/ch.c error = ch_getelemstatus(sc, sc->sc_firsts[chet],
sc 591 scsi/ch.c sc->sc_counts[chet], data, size, want_voltags);
sc 603 scsi/ch.c if (avail != sc->sc_counts[chet]) {
sc 633 scsi/ch.c ch_getelemstatus(sc, first, count, data, datalen, voltag)
sc 634 scsi/ch.c struct ch_softc *sc;
sc 657 scsi/ch.c return (scsi_scsi_cmd(sc->sc_link, (struct scsi_generic *)&cmd,
sc 667 scsi/ch.c ch_get_params(sc, flags)
sc 668 scsi/ch.c struct ch_softc *sc;
sc 684 scsi/ch.c error = scsi_do_mode_sense(sc->sc_link, 0x1d, data,
sc 691 scsi/ch.c sc->sc_dev.dv_xname);
sc 697 scsi/ch.c sc->sc_firsts[CHET_MT] = _2btol(ea->mtea);
sc 698 scsi/ch.c sc->sc_counts[CHET_MT] = _2btol(ea->nmte);
sc 699 scsi/ch.c sc->sc_firsts[CHET_ST] = _2btol(ea->fsea);
sc 700 scsi/ch.c sc->sc_counts[CHET_ST] = _2btol(ea->nse);
sc 701 scsi/ch.c sc->sc_firsts[CHET_IE] = _2btol(ea->fieea);
sc 702 scsi/ch.c sc->sc_counts[CHET_IE] = _2btol(ea->niee);
sc 703 scsi/ch.c sc->sc_firsts[CHET_DT] = _2btol(ea->fdtea);
sc 704 scsi/ch.c sc->sc_counts[CHET_DT] = _2btol(ea->ndte);
sc 711 scsi/ch.c error = scsi_do_mode_sense(sc->sc_link, 0x1f, data,
sc 718 scsi/ch.c sc->sc_dev.dv_xname);
sc 724 scsi/ch.c bzero(sc->sc_movemask, sizeof(sc->sc_movemask));
sc 725 scsi/ch.c bzero(sc->sc_exchangemask, sizeof(sc->sc_exchangemask));
sc 729 scsi/ch.c sc->sc_movemask[from] = moves[from];
sc 730 scsi/ch.c sc->sc_exchangemask[from] = exchanges[from];
sc 733 scsi/ch.c sc->sc_link->flags |= SDEV_MEDIA_LOADED;
sc 739 scsi/ch.c ch_get_quirks(sc, inqbuf)
sc 740 scsi/ch.c struct ch_softc *sc;
sc 746 scsi/ch.c sc->sc_settledelay = 0;
sc 753 scsi/ch.c sc->sc_settledelay = match->cq_settledelay;
sc 162 scsi/safte.c struct safte_softc *sc = (struct safte_softc *)self;
sc 166 scsi/safte.c sc->sc_link = sa->sa_sc_link;
sc 167 scsi/safte.c sa->sa_sc_link->device_softc = sc;
sc 168 scsi/safte.c rw_init(&sc->sc_lock, DEVNAME(sc));
sc 172 scsi/safte.c sc->sc_encbuf = NULL;
sc 173 scsi/safte.c sc->sc_nsensors = 0;
sc 175 scsi/safte.c sc->sc_nslots = 0;
sc 178 scsi/safte.c if (safte_read_config(sc) != 0) {
sc 180 scsi/safte.c DEVNAME(sc));
sc 184 scsi/safte.c if (sc->sc_nsensors > 0) {
sc 185 scsi/safte.c sc->sc_sensortask = sensor_task_register(sc,
sc 187 scsi/safte.c if (sc->sc_sensortask == NULL) {
sc 189 scsi/safte.c DEVNAME(sc));
sc 190 scsi/safte.c sc->sc_nsensors = sc->sc_ntemps = 0;
sc 191 scsi/safte.c free(sc->sc_sensors, M_DEVBUF);
sc 193 scsi/safte.c for (i = 0; i < sc->sc_nsensors; i++)
sc 194 scsi/safte.c sensor_attach(&sc->sc_sensordev,
sc 195 scsi/safte.c &sc->sc_sensors[i].se_sensor);
sc 196 scsi/safte.c sensordev_install(&sc->sc_sensordev);
sc 201 scsi/safte.c if (sc->sc_nslots > 0 &&
sc 203 scsi/safte.c printf("%s: unable to register ioctl with bio\n", DEVNAME(sc));
sc 204 scsi/safte.c sc->sc_nslots = 0;
sc 210 scsi/safte.c safte_read_encstat(sc);
sc 212 scsi/safte.c free(sc->sc_encbuf, M_DEVBUF);
sc 213 scsi/safte.c sc->sc_encbuf = NULL;
sc 220 scsi/safte.c struct safte_softc *sc = (struct safte_softc *)self;
sc 223 scsi/safte.c rw_enter_write(&sc->sc_lock);
sc 226 scsi/safte.c if (sc->sc_nslots > 0)
sc 230 scsi/safte.c if (sc->sc_nsensors > 0) {
sc 231 scsi/safte.c sensordev_deinstall(&sc->sc_sensordev);
sc 232 scsi/safte.c sensor_task_unregister(sc->sc_sensortask);
sc 234 scsi/safte.c for (i = 0; i < sc->sc_nsensors; i++)
sc 235 scsi/safte.c sensor_detach(&sc->sc_sensordev,
sc 236 scsi/safte.c &sc->sc_sensors[i].se_sensor);
sc 237 scsi/safte.c free(sc->sc_sensors, M_DEVBUF);
sc 240 scsi/safte.c if (sc->sc_encbuf != NULL)
sc 241 scsi/safte.c free(sc->sc_encbuf, M_DEVBUF);
sc 243 scsi/safte.c rw_exit_write(&sc->sc_lock);
sc 249 scsi/safte.c safte_read_config(struct safte_softc *sc)
sc 269 scsi/safte.c if (scsi_scsi_cmd(sc->sc_link, (struct scsi_generic *)&cmd,
sc 275 scsi/safte.c " alarm: %d celsius: %d ntherm: %d\n", DEVNAME(sc), config.nfans,
sc 280 scsi/safte.c sc->sc_encbuflen = config.nfans * sizeof(u_int8_t) + /* fan status */
sc 288 scsi/safte.c sc->sc_encbuf = malloc(sc->sc_encbuflen, M_DEVBUF, M_NOWAIT);
sc 289 scsi/safte.c if (sc->sc_encbuf == NULL)
sc 292 scsi/safte.c sc->sc_nsensors = config.nfans + config.npwrsup + config.ntemps +
sc 295 scsi/safte.c sc->sc_sensors = malloc(sc->sc_nsensors * sizeof(struct safte_sensor),
sc 297 scsi/safte.c if (sc->sc_sensors == NULL) {
sc 298 scsi/safte.c free(sc->sc_encbuf, M_DEVBUF);
sc 299 scsi/safte.c sc->sc_encbuf = NULL;
sc 300 scsi/safte.c sc->sc_nsensors = 0;
sc 304 scsi/safte.c strlcpy(sc->sc_sensordev.xname, DEVNAME(sc),
sc 305 scsi/safte.c sizeof(sc->sc_sensordev.xname));
sc 307 scsi/safte.c memset(sc->sc_sensors, 0,
sc 308 scsi/safte.c sc->sc_nsensors * sizeof(struct safte_sensor));
sc 309 scsi/safte.c s = sc->sc_sensors;
sc 313 scsi/safte.c s->se_field = (u_int8_t *)(sc->sc_encbuf + i);
sc 324 scsi/safte.c s->se_field = (u_int8_t *)(sc->sc_encbuf + j + i);
sc 334 scsi/safte.c sc->sc_nslots = config.nslots;
sc 335 scsi/safte.c sc->sc_slots = (u_int8_t *)(sc->sc_encbuf + j);
sc 341 scsi/safte.c s->se_field = (u_int8_t *)(sc->sc_encbuf + j);
sc 352 scsi/safte.c s->se_field = (u_int8_t *)(sc->sc_encbuf + j);
sc 364 scsi/safte.c sc->sc_ntemps = (config.ntemps > 15) ? 15 : config.ntemps;
sc 365 scsi/safte.c sc->sc_temps = s;
sc 366 scsi/safte.c sc->sc_celsius = SAFTE_CFG_CELSIUS(config.therm);
sc 369 scsi/safte.c s->se_field = (u_int8_t *)(sc->sc_encbuf + j + i);
sc 376 scsi/safte.c sc->sc_temperrs = (u_int16_t *)(sc->sc_encbuf + j);
sc 384 scsi/safte.c struct safte_softc *sc = (struct safte_softc *)arg;
sc 390 scsi/safte.c rw_enter_write(&sc->sc_lock);
sc 396 scsi/safte.c cmd.length = htobe16(sc->sc_encbuflen);
sc 405 scsi/safte.c if (scsi_scsi_cmd(sc->sc_link, (struct scsi_generic *)&cmd,
sc 406 scsi/safte.c sizeof(cmd), sc->sc_encbuf, sc->sc_encbuflen, 2, 30000, NULL,
sc 408 scsi/safte.c rw_exit_write(&sc->sc_lock);
sc 412 scsi/safte.c for (i = 0; i < sc->sc_nsensors; i++) {
sc 413 scsi/safte.c s = &sc->sc_sensors[i];
sc 416 scsi/safte.c DPRINTF(("%s: %d type: %d field: 0x%02x\n", DEVNAME(sc), i,
sc 501 scsi/safte.c sc->sc_celsius);
sc 506 scsi/safte.c oot = betoh16(*sc->sc_temperrs);
sc 507 scsi/safte.c for (i = 0; i < sc->sc_ntemps; i++)
sc 508 scsi/safte.c sc->sc_temps[i].se_sensor.status =
sc 511 scsi/safte.c rw_exit_write(&sc->sc_lock);
sc 518 scsi/safte.c struct safte_softc *sc = (struct safte_softc *)dev;
sc 523 scsi/safte.c error = safte_bio_blink(sc, (struct bioc_blink *)addr);
sc 535 scsi/safte.c safte_bio_blink(struct safte_softc *sc, struct bioc_blink *blink)
sc 554 scsi/safte.c rw_enter_read(&sc->sc_lock);
sc 555 scsi/safte.c for (slot = 0; slot < sc->sc_nslots; slot++) {
sc 556 scsi/safte.c if (sc->sc_slots[slot] == blink->bb_target)
sc 559 scsi/safte.c rw_exit_read(&sc->sc_lock);
sc 561 scsi/safte.c if (slot >= sc->sc_nslots)
sc 582 scsi/safte.c if (scsi_scsi_cmd(sc->sc_link, (struct scsi_generic *)&cmd,
sc 241 scsi/scsiconf.c struct scsibus_softc *sc = (struct scsibus_softc *)dev;
sc 249 scsi/scsiconf.c return (scsi_probe_bus(sc));
sc 256 scsi/scsiconf.c return (scsi_probe_target(sc, sdev->sd_target));
sc 258 scsi/scsiconf.c return (scsi_probe_lun(sc, sdev->sd_target, sdev->sd_lun));
sc 267 scsi/scsiconf.c return (scsi_detach_target(sc, sdev->sd_target, 0));
sc 269 scsi/scsiconf.c return (scsi_detach_lun(sc, sdev->sd_target, sdev->sd_lun, 0));
sc 278 scsi/scsiconf.c scsi_probe_bus(struct scsibus_softc *sc)
sc 280 scsi/scsiconf.c struct scsi_link *alink = sc->adapter_link;
sc 284 scsi/scsiconf.c scsi_probe_target(sc, i);
sc 290 scsi/scsiconf.c scsi_probe_target(struct scsibus_softc *sc, int target)
sc 292 scsi/scsiconf.c struct scsi_link *alink = sc->adapter_link;
sc 297 scsi/scsiconf.c if (scsi_probe_lun(sc, target, 0) == EINVAL)
sc 300 scsi/scsiconf.c link = sc->sc_link[target][0];
sc 333 scsi/scsiconf.c sc->sc_link[target][0] = NULL;
sc 334 scsi/scsiconf.c scsi_probe_lun(sc, target, lun);
sc 335 scsi/scsiconf.c sc->sc_link[target][0] = link;
sc 344 scsi/scsiconf.c if (scsi_probe_lun(sc, target, i) == EINVAL)
sc 352 scsi/scsiconf.c scsi_probe_lun(struct scsibus_softc *sc, int target, int lun)
sc 354 scsi/scsiconf.c struct scsi_link *alink = sc->adapter_link;
sc 361 scsi/scsiconf.c return (scsi_probedev(sc, target, lun));
sc 365 scsi/scsiconf.c scsi_detach_bus(struct scsibus_softc *sc, int flags)
sc 367 scsi/scsiconf.c struct scsi_link *alink = sc->adapter_link;
sc 371 scsi/scsiconf.c scsi_detach_target(sc, i, flags);
sc 377 scsi/scsiconf.c scsi_detach_target(struct scsibus_softc *sc, int target, int flags)
sc 379 scsi/scsiconf.c struct scsi_link *alink = sc->adapter_link;
sc 386 scsi/scsiconf.c if (sc->sc_link[target] == NULL)
sc 390 scsi/scsiconf.c if (sc->sc_link[target][i] == NULL)
sc 393 scsi/scsiconf.c err = scsi_detach_lun(sc, target, i, flags);
sc 403 scsi/scsiconf.c scsi_detach_lun(struct scsibus_softc *sc, int target, int lun, int flags)
sc 405 scsi/scsiconf.c struct scsi_link *alink = sc->adapter_link;
sc 414 scsi/scsiconf.c if (sc->sc_link[target] == NULL)
sc 417 scsi/scsiconf.c link = sc->sc_link[target][lun];
sc 433 scsi/scsiconf.c sc->sc_link[target][lun] = NULL;
sc 146 scsi/ses.c struct ses_softc *sc = (struct ses_softc *)self;
sc 154 scsi/ses.c sc->sc_link = sa->sa_sc_link;
sc 155 scsi/ses.c sa->sa_sc_link->device_softc = sc;
sc 156 scsi/ses.c rw_init(&sc->sc_lock, DEVNAME(sc));
sc 158 scsi/ses.c scsi_strvis(vendor, sc->sc_link->inqdata.vendor,
sc 159 scsi/ses.c sizeof(sc->sc_link->inqdata.vendor));
sc 161 scsi/ses.c sc->sc_enctype = SES_ENC_DELL;
sc 163 scsi/ses.c sc->sc_enctype = SES_ENC_STD;
sc 167 scsi/ses.c if (ses_read_config(sc) != 0) {
sc 169 scsi/ses.c DEVNAME(sc));
sc 173 scsi/ses.c if (!TAILQ_EMPTY(&sc->sc_sensors)) {
sc 174 scsi/ses.c sc->sc_sensortask = sensor_task_register(sc,
sc 176 scsi/ses.c if (sc->sc_sensortask == NULL) {
sc 178 scsi/ses.c DEVNAME(sc));
sc 179 scsi/ses.c while (!TAILQ_EMPTY(&sc->sc_sensors)) {
sc 180 scsi/ses.c sensor = TAILQ_FIRST(&sc->sc_sensors);
sc 181 scsi/ses.c TAILQ_REMOVE(&sc->sc_sensors, sensor,
sc 186 scsi/ses.c TAILQ_FOREACH(sensor, &sc->sc_sensors, se_entry)
sc 187 scsi/ses.c sensor_attach(&sc->sc_sensordev,
sc 189 scsi/ses.c sensordev_install(&sc->sc_sensordev);
sc 194 scsi/ses.c if (!TAILQ_EMPTY(&sc->sc_slots) &&
sc 196 scsi/ses.c printf("%s: unable to register ioctl\n", DEVNAME(sc));
sc 197 scsi/ses.c while (!TAILQ_EMPTY(&sc->sc_slots)) {
sc 198 scsi/ses.c slot = TAILQ_FIRST(&sc->sc_slots);
sc 199 scsi/ses.c TAILQ_REMOVE(&sc->sc_slots, slot, sl_entry);
sc 205 scsi/ses.c if (TAILQ_EMPTY(&sc->sc_sensors)
sc 207 scsi/ses.c && TAILQ_EMPTY(&sc->sc_slots)
sc 210 scsi/ses.c free(sc->sc_buf, M_DEVBUF);
sc 211 scsi/ses.c sc->sc_buf = NULL;
sc 218 scsi/ses.c struct ses_softc *sc = (struct ses_softc *)self;
sc 224 scsi/ses.c rw_enter_write(&sc->sc_lock);
sc 227 scsi/ses.c if (!TAILQ_EMPTY(&sc->sc_slots)) {
sc 229 scsi/ses.c while (!TAILQ_EMPTY(&sc->sc_slots)) {
sc 230 scsi/ses.c slot = TAILQ_FIRST(&sc->sc_slots);
sc 231 scsi/ses.c TAILQ_REMOVE(&sc->sc_slots, slot, sl_entry);
sc 237 scsi/ses.c if (!TAILQ_EMPTY(&sc->sc_sensors)) {
sc 238 scsi/ses.c sensordev_deinstall(&sc->sc_sensordev);
sc 239 scsi/ses.c sensor_task_unregister(sc->sc_sensortask);
sc 241 scsi/ses.c while (!TAILQ_EMPTY(&sc->sc_sensors)) {
sc 242 scsi/ses.c sensor = TAILQ_FIRST(&sc->sc_sensors);
sc 243 scsi/ses.c sensor_detach(&sc->sc_sensordev, &sensor->se_sensor);
sc 244 scsi/ses.c TAILQ_REMOVE(&sc->sc_sensors, sensor, se_entry);
sc 249 scsi/ses.c if (sc->sc_buf != NULL)
sc 250 scsi/ses.c free(sc->sc_buf, M_DEVBUF);
sc 252 scsi/ses.c rw_exit_write(&sc->sc_lock);
sc 258 scsi/ses.c ses_read_config(struct ses_softc *sc)
sc 292 scsi/ses.c if (scsi_scsi_cmd(sc->sc_link, (struct scsi_generic *)&cmd,
sc 304 scsi/ses.c DPRINTF("%s: config: n_subenc: %d length: %d\n", DEVNAME(sc),
sc 312 scsi/ses.c DEVNAME(sc), i, enc->enc_id, enc->n_types);
sc 327 scsi/ses.c DEVNAME(sc), i, tdh->subenc_id, tdh->type, tdh->n_elem);
sc 336 scsi/ses.c DPRINTF("%s: td %d '%s'\n", DEVNAME(sc), i,
sc 343 scsi/ses.c sc->sc_buflen = SES_STAT_LEN(ntypes, nelems);
sc 344 scsi/ses.c sc->sc_buf = malloc(sc->sc_buflen, M_DEVBUF, M_NOWAIT);
sc 345 scsi/ses.c if (sc->sc_buf == NULL) {
sc 351 scsi/ses.c if (ses_make_sensors(sc, tdlist, ntypes) != 0) {
sc 353 scsi/ses.c free(sc->sc_buf, M_DEVBUF);
sc 362 scsi/ses.c ses_read_status(struct ses_softc *sc)
sc 371 scsi/ses.c cmd.length = htobe16(sc->sc_buflen);
sc 379 scsi/ses.c if (scsi_scsi_cmd(sc->sc_link, (struct scsi_generic *)&cmd,
sc 380 scsi/ses.c sizeof(cmd), sc->sc_buf, sc->sc_buflen, 2, 3000, NULL, flags) != 0)
sc 387 scsi/ses.c ses_make_sensors(struct ses_softc *sc, struct ses_type_desc *types, int ntypes)
sc 398 scsi/ses.c if (ses_read_status(sc) != 0)
sc 401 scsi/ses.c strlcpy(sc->sc_sensordev.xname, DEVNAME(sc),
sc 402 scsi/ses.c sizeof(sc->sc_sensordev.xname));
sc 404 scsi/ses.c TAILQ_INIT(&sc->sc_sensors);
sc 406 scsi/ses.c TAILQ_INIT(&sc->sc_slots);
sc 409 scsi/ses.c status = (struct ses_status *)(sc->sc_buf + SES_STAT_HDRLEN);
sc 413 scsi/ses.c DEVNAME(sc), i, status->com, status->f1, status->f2,
sc 421 scsi/ses.c DEVNAME(sc), i, j, status->com, status->f1,
sc 438 scsi/ses.c TAILQ_INSERT_TAIL(&sc->sc_slots, slot,
sc 475 scsi/ses.c TAILQ_INSERT_TAIL(&sc->sc_sensors, sensor, se_entry);
sc 485 scsi/ses.c while (!TAILQ_EMPTY(&sc->sc_slots)) {
sc 486 scsi/ses.c slot = TAILQ_FIRST(&sc->sc_slots);
sc 487 scsi/ses.c TAILQ_REMOVE(&sc->sc_slots, slot, sl_entry);
sc 491 scsi/ses.c while (!TAILQ_EMPTY(&sc->sc_sensors)) {
sc 492 scsi/ses.c sensor = TAILQ_FIRST(&sc->sc_sensors);
sc 493 scsi/ses.c TAILQ_REMOVE(&sc->sc_sensors, sensor, se_entry);
sc 502 scsi/ses.c struct ses_softc *sc = (struct ses_softc *)arg;
sc 506 scsi/ses.c rw_enter_write(&sc->sc_lock);
sc 508 scsi/ses.c if (ses_read_status(sc) != 0) {
sc 509 scsi/ses.c rw_exit_write(&sc->sc_lock);
sc 513 scsi/ses.c TAILQ_FOREACH(sensor, &sc->sc_sensors, se_entry) {
sc 514 scsi/ses.c DPRINTFN(10, "%s: %s 0x%02x 0x%02x%02x%02x\n", DEVNAME(sc),
sc 542 scsi/ses.c ses_psu2sensor(sc, sensor);
sc 546 scsi/ses.c ses_cool2sensor(sc, sensor);
sc 550 scsi/ses.c ses_temp2sensor(sc, sensor);
sc 559 scsi/ses.c rw_exit_write(&sc->sc_lock);
sc 562 scsi/ses.c printf("%s: error in sensor data\n", DEVNAME(sc));
sc 569 scsi/ses.c struct ses_softc *sc = (struct ses_softc *)dev;
sc 574 scsi/ses.c error = ses_bio_blink(sc, (struct bioc_blink *)addr);
sc 586 scsi/ses.c ses_write_config(struct ses_softc *sc)
sc 594 scsi/ses.c cmd.length = htobe16(sc->sc_buflen);
sc 603 scsi/ses.c if (scsi_scsi_cmd(sc->sc_link, (struct scsi_generic *)&cmd,
sc 604 scsi/ses.c sizeof(cmd), sc->sc_buf, sc->sc_buflen, 2, 3000, NULL, flags) != 0)
sc 611 scsi/ses.c ses_bio_blink(struct ses_softc *sc, struct bioc_blink *blink)
sc 615 scsi/ses.c rw_enter_write(&sc->sc_lock);
sc 617 scsi/ses.c if (ses_read_status(sc) != 0) {
sc 618 scsi/ses.c rw_exit_write(&sc->sc_lock);
sc 622 scsi/ses.c TAILQ_FOREACH(slot, &sc->sc_slots, sl_entry) {
sc 627 scsi/ses.c if (slot == TAILQ_END(&sc->sc_slots)) {
sc 628 scsi/ses.c rw_exit_write(&sc->sc_lock);
sc 632 scsi/ses.c DPRINTFN(3, "%s: 0x%02x 0x%02x 0x%02x 0x%02x\n", DEVNAME(sc),
sc 650 scsi/ses.c rw_exit_write(&sc->sc_lock);
sc 654 scsi/ses.c DPRINTFN(3, "%s: 0x%02x 0x%02x 0x%02x 0x%02x\n", DEVNAME(sc),
sc 658 scsi/ses.c if (ses_write_config(sc) != 0) {
sc 659 scsi/ses.c rw_exit_write(&sc->sc_lock);
sc 663 scsi/ses.c rw_exit_write(&sc->sc_lock);
sc 670 scsi/ses.c ses_psu2sensor(struct ses_softc *sc, struct ses_sensor *s)
sc 676 scsi/ses.c ses_cool2sensor(struct ses_softc *sc, struct ses_sensor *s)
sc 678 scsi/ses.c switch (sc->sc_enctype) {
sc 725 scsi/ses.c ses_temp2sensor(struct ses_softc *sc, struct ses_sensor *s)
sc 74 sys/memrange.h void (*init)(struct mem_range_softc *sc);
sc 75 sys/memrange.h int (*set)(struct mem_range_softc *sc, struct mem_range_desc *mrd, int *arg);
sc 76 sys/memrange.h void (*initAP)(struct mem_range_softc *sc);