root/dev/usb/ohci.c

DEFINITIONS

1. ohci_activate
2. ohci_detach
3. ohci_alloc_sed
4. ohci_free_sed
5. ohci_alloc_std
6. ohci_free_std
7. ohci_alloc_std_chain
8. ohci_free_std_chain
9. ohci_alloc_sitd
10. ohci_free_sitd
11. ohci_checkrev
12. ohci_handover
13. ohci_init
14. ohci_allocm
15. ohci_freem
16. ohci_allocx
17. ohci_freex
18. ohci_shutdown
19. ohci_power
20. ohci_dumpregs
21. ohci_intr
22. ohci_intr1
23. ohci_rhsc_able
24. ohci_rhsc_enable
25. ohci_add_done
26. ohci_softintr
27. ohci_device_ctrl_done
28. ohci_device_intr_done
29. ohci_device_bulk_done
30. ohci_rhsc
31. ohci_root_intr_done
32. ohci_root_ctrl_done
33. ohci_waitintr
34. ohci_poll
35. ohci_device_request
36. ohci_add_ed
37. ohci_rem_ed
38. ohci_hash_add_td
39. ohci_hash_rem_td
40. ohci_hash_find_td
41. ohci_hash_add_itd
42. ohci_hash_rem_itd
43. ohci_hash_find_itd
44. ohci_timeout
45. ohci_timeout_task
46. ohci_dump_tds
47. ohci_dump_td
48. ohci_dump_itd
49. ohci_dump_itds
50. ohci_dump_ed
51. ohci_open
52. ohci_close_pipe
53. ohci_abort_xfer
54. ohci_str
55. ohci_root_ctrl_transfer
56. ohci_root_ctrl_start
57. ohci_root_ctrl_abort
58. ohci_root_ctrl_close
59. ohci_root_intr_transfer
60. ohci_root_intr_start
61. ohci_root_intr_abort
62. ohci_root_intr_close
63. ohci_device_ctrl_transfer
64. ohci_device_ctrl_start
65. ohci_device_ctrl_abort
66. ohci_device_ctrl_close
67. ohci_device_clear_toggle
68. ohci_noop
69. ohci_device_bulk_transfer
70. ohci_device_bulk_start
71. ohci_device_bulk_abort
72. ohci_device_bulk_close
73. ohci_device_intr_transfer
74. ohci_device_intr_start
75. ohci_device_intr_abort
76. ohci_device_intr_close
77. ohci_device_setintr
78. ohci_device_isoc_transfer
79. ohci_device_isoc_enter
80. ohci_device_isoc_start
81. ohci_device_isoc_abort
82. ohci_device_isoc_done
83. ohci_setup_isoc
84. ohci_device_isoc_close

    1 /*      $OpenBSD: ohci.c,v 1.84 2007/06/15 11:41:48 mbalmer Exp $ */
    2 /*      $NetBSD: ohci.c,v 1.139 2003/02/22 05:24:16 tsutsui Exp $       */
    3 /*      $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $       */
    5 /*
    6  * Copyright (c) 1998 The NetBSD Foundation, Inc.
    7  * All rights reserved.
    8  *
    9  * This code is derived from software contributed to The NetBSD Foundation
   10  * by Lennart Augustsson (lennart@augustsson.net) at
   11  * Carlstedt Research & Technology.
   12  *
   13  * Redistribution and use in source and binary forms, with or without
   14  * modification, are permitted provided that the following conditions
   15  * are met:
   16  * 1. Redistributions of source code must retain the above copyright
   17  *    notice, this list of conditions and the following disclaimer.
   18  * 2. Redistributions in binary form must reproduce the above copyright
   19  *    notice, this list of conditions and the following disclaimer in the
   20  *    documentation and/or other materials provided with the distribution.
   21  * 3. All advertising materials mentioning features or use of this software
   22  *    must display the following acknowledgement:
   23  *        This product includes software developed by the NetBSD
   24  *        Foundation, Inc. and its contributors.
   25  * 4. Neither the name of The NetBSD Foundation nor the names of its
   26  *    contributors may be used to endorse or promote products derived
   27  *    from this software without specific prior written permission.
   28  *
   29  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   30  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   31  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   32  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   33  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   34  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   35  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   36  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   37  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   38  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   39  * POSSIBILITY OF SUCH DAMAGE.
   40  */
   42 /*
   43  * USB Open Host Controller driver.
   44  *
   45  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
   46  * USB spec: http://www.usb.org/developers/docs/usbspec.zip
   47  */
   49 #include <sys/param.h>
   50 #include <sys/systm.h>
   51 #include <sys/malloc.h>
   52 #include <sys/kernel.h>
   53 #include <sys/device.h>
   54 #include <sys/selinfo.h>
   55 #include <sys/proc.h>
   56 #include <sys/queue.h>
   58 #include <machine/bus.h>
   59 #include <machine/endian.h>
   61 #include <dev/usb/usb.h>
   62 #include <dev/usb/usbdi.h>
   63 #include <dev/usb/usbdivar.h>
   64 #include <dev/usb/usb_mem.h>
   65 #include <dev/usb/usb_quirks.h>
   67 #include <dev/usb/ohcireg.h>
   68 #include <dev/usb/ohcivar.h>
   70 struct cfdriver ohci_cd = {
NULL, "ohci", DV_DULL
   72 };
   74 #ifdef OHCI_DEBUG
   75 #define DPRINTF(x)      do { if (ohcidebug) printf x; } while (0)
   76 #define DPRINTFN(n,x)   do { if (ohcidebug>(n)) printf x; } while (0)
   77 int ohcidebug = 0;
   78 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
   79 #else
   80 #define DPRINTF(x)
   81 #define DPRINTFN(n,x)
   82 #endif
   84 #define mstohz(ms) ((ms) * hz / 1000)
   86 /*
   87  * The OHCI controller is little endian, so on big endian machines
   88  * the data stored in memory needs to be swapped.
   89  */
   91 struct ohci_pipe;
ohci_soft_ed_t  *ohci_alloc_sed(ohci_softc_t *);
   94 void            ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
ohci_soft_td_t  *ohci_alloc_std(ohci_softc_t *);
   97 void            ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
  100 void            ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
  102 #if 0
  103 void            ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
ohci_soft_td_t *);
  105 #endif
usbd_status     ohci_alloc_std_chain(struct ohci_pipe *,
ohci_softc_t *, int, int, usbd_xfer_handle,
ohci_soft_td_t *, ohci_soft_td_t **);
  110 void            ohci_shutdown(void *v);
usbd_status     ohci_open(usbd_pipe_handle);
  112 void            ohci_poll(struct usbd_bus *);
  113 void            ohci_softintr(void *);
  114 void            ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
  115 void            ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
  116 void            ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
usbd_status     ohci_device_request(usbd_xfer_handle xfer);
  119 void            ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
  120 void            ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
  121 void            ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
  122 void            ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
ohci_soft_td_t  *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
  124 void            ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
  125 void            ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
ohci_soft_itd_t  *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
usbd_status     ohci_setup_isoc(usbd_pipe_handle pipe);
  129 void            ohci_device_isoc_enter(usbd_xfer_handle);
usbd_status     ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
  132 void            ohci_freem(struct usbd_bus *, usb_dma_t *);
usbd_xfer_handle        ohci_allocx(struct usbd_bus *);
  135 void            ohci_freex(struct usbd_bus *, usbd_xfer_handle);
usbd_status     ohci_root_ctrl_transfer(usbd_xfer_handle);
usbd_status     ohci_root_ctrl_start(usbd_xfer_handle);
  139 void            ohci_root_ctrl_abort(usbd_xfer_handle);
  140 void            ohci_root_ctrl_close(usbd_pipe_handle);
  141 void            ohci_root_ctrl_done(usbd_xfer_handle);
usbd_status     ohci_root_intr_transfer(usbd_xfer_handle);
usbd_status     ohci_root_intr_start(usbd_xfer_handle);
  145 void            ohci_root_intr_abort(usbd_xfer_handle);
  146 void            ohci_root_intr_close(usbd_pipe_handle);
  147 void            ohci_root_intr_done(usbd_xfer_handle);
usbd_status     ohci_device_ctrl_transfer(usbd_xfer_handle);
usbd_status     ohci_device_ctrl_start(usbd_xfer_handle);
  151 void            ohci_device_ctrl_abort(usbd_xfer_handle);
  152 void            ohci_device_ctrl_close(usbd_pipe_handle);
  153 void            ohci_device_ctrl_done(usbd_xfer_handle);
usbd_status     ohci_device_bulk_transfer(usbd_xfer_handle);
usbd_status     ohci_device_bulk_start(usbd_xfer_handle);
  157 void            ohci_device_bulk_abort(usbd_xfer_handle);
  158 void            ohci_device_bulk_close(usbd_pipe_handle);
  159 void            ohci_device_bulk_done(usbd_xfer_handle);
usbd_status     ohci_device_intr_transfer(usbd_xfer_handle);
usbd_status     ohci_device_intr_start(usbd_xfer_handle);
  163 void            ohci_device_intr_abort(usbd_xfer_handle);
  164 void            ohci_device_intr_close(usbd_pipe_handle);
  165 void            ohci_device_intr_done(usbd_xfer_handle);
usbd_status     ohci_device_isoc_transfer(usbd_xfer_handle);
usbd_status     ohci_device_isoc_start(usbd_xfer_handle);
  169 void            ohci_device_isoc_abort(usbd_xfer_handle);
  170 void            ohci_device_isoc_close(usbd_pipe_handle);
  171 void            ohci_device_isoc_done(usbd_xfer_handle);
usbd_status     ohci_device_setintr(ohci_softc_t *sc,
  174                             struct ohci_pipe *pipe, int ival);
  176 int             ohci_str(usb_string_descriptor_t *, int, const char *);
  178 void            ohci_timeout(void *);
  179 void            ohci_timeout_task(void *);
  180 void            ohci_rhsc_able(ohci_softc_t *, int);
  181 void            ohci_rhsc_enable(void *);
  183 void            ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
  184 void            ohci_abort_xfer(usbd_xfer_handle, usbd_status);
  186 void            ohci_device_clear_toggle(usbd_pipe_handle pipe);
  187 void            ohci_noop(usbd_pipe_handle pipe);
  189 #ifdef OHCI_DEBUG
  190 void            ohci_dumpregs(ohci_softc_t *);
  191 void            ohci_dump_tds(ohci_soft_td_t *);
  192 void            ohci_dump_td(ohci_soft_td_t *);
  193 void            ohci_dump_ed(ohci_soft_ed_t *);
  194 void            ohci_dump_itd(ohci_soft_itd_t *);
  195 void            ohci_dump_itds(ohci_soft_itd_t *);
  196 #endif
  198 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
  200 #define OWRITE1(sc, r, x) \
  201  do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
  202 #define OWRITE2(sc, r, x) \
  203  do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
  204 #define OWRITE4(sc, r, x) \
  205  do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
  206 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
  207 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
  208 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
  210 /* Reverse the bits in a value 0 .. 31 */
u_int8_t revbits[OHCI_NO_INTRS] =
  212   { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
  213     0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
  214     0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
  215     0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
  217 struct ohci_pipe {
  218         struct usbd_pipe pipe;
ohci_soft_ed_t *sed;
  220         union {
ohci_soft_td_t *td;
ohci_soft_itd_t *itd;
  223         } tail;
  224         /* Info needed for different pipe kinds. */
  225         union {
  226                 /* Control pipe */
  227                 struct {
usb_dma_t reqdma;
u_int length;
ohci_soft_td_t *setup, *data, *stat;
  231                 } ctl;
  232                 /* Interrupt pipe */
  233                 struct {
  234                         int nslots;
  235                         int pos;
  236                 } intr;
  237                 /* Bulk pipe */
  238                 struct {
u_int length;
  240                         int isread;
  241                 } bulk;
  242                 /* Iso pipe */
  243                 struct iso {
  244                         int next, inuse;
  245                 } iso;
  246         } u;
  247 };
  249 #define OHCI_INTR_ENDPT 1
  251 struct usbd_bus_methods ohci_bus_methods = {
ohci_open,
ohci_softintr,
ohci_poll,
ohci_allocm,
ohci_freem,
ohci_allocx,
ohci_freex,
  259 };
  261 struct usbd_pipe_methods ohci_root_ctrl_methods = {
ohci_root_ctrl_transfer,
ohci_root_ctrl_start,
ohci_root_ctrl_abort,
ohci_root_ctrl_close,
ohci_noop,
ohci_root_ctrl_done,
  268 };
  270 struct usbd_pipe_methods ohci_root_intr_methods = {
ohci_root_intr_transfer,
ohci_root_intr_start,
ohci_root_intr_abort,
ohci_root_intr_close,
ohci_noop,
ohci_root_intr_done,
  277 };
  279 struct usbd_pipe_methods ohci_device_ctrl_methods = {
ohci_device_ctrl_transfer,
ohci_device_ctrl_start,
ohci_device_ctrl_abort,
ohci_device_ctrl_close,
ohci_noop,
ohci_device_ctrl_done,
  286 };
  288 struct usbd_pipe_methods ohci_device_intr_methods = {
ohci_device_intr_transfer,
ohci_device_intr_start,
ohci_device_intr_abort,
ohci_device_intr_close,
ohci_device_clear_toggle,
ohci_device_intr_done,
  295 };
  297 struct usbd_pipe_methods ohci_device_bulk_methods = {
ohci_device_bulk_transfer,
ohci_device_bulk_start,
ohci_device_bulk_abort,
ohci_device_bulk_close,
ohci_device_clear_toggle,
ohci_device_bulk_done,
  304 };
  306 struct usbd_pipe_methods ohci_device_isoc_methods = {
ohci_device_isoc_transfer,
ohci_device_isoc_start,
ohci_device_isoc_abort,
ohci_device_isoc_close,
ohci_noop,
ohci_device_isoc_done,
  313 };
  315 int
ohci_activate(struct device *self, enum devact act)
  317 {
  318         struct ohci_softc *sc = (struct ohci_softc *)self;
  319         int rv = 0;
  321         switch (act) {
  322         case DVACT_ACTIVATE:
  323                 break;
  325         case DVACT_DEACTIVATE:
  326                 if (sc->sc_child != NULL)
rv = config_deactivate(sc->sc_child);
sc->sc_dying = 1;
  329                 break;
  330         }
  331         return (rv);
  332 }
  334 int
ohci_detach(struct ohci_softc *sc, int flags)
  336 {
  337         int rv = 0;
  339         if (sc->sc_child != NULL)
rv = config_detach(sc->sc_child, flags);
  342         if (rv != 0)
  343                 return (rv);
timeout_del(&sc->sc_tmo_rhsc);
  347         if (sc->sc_shutdownhook != NULL)
shutdownhook_disestablish(sc->sc_shutdownhook);
usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
  352         /* free data structures XXX */
  354         return (rv);
  355 }
ohci_soft_ed_t *
ohci_alloc_sed(ohci_softc_t *sc)
  359 {
ohci_soft_ed_t *sed;
usbd_status err;
  362         int i, offs;
usb_dma_t dma;
  365         if (sc->sc_freeeds == NULL) {
DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
OHCI_ED_ALIGN, &dma);
  369                 if (err)
  370                         return (0);
  371                 for(i = 0; i < OHCI_SED_CHUNK; i++) {
offs = i * OHCI_SED_SIZE;
sed = KERNADDR(&dma, offs);
sed->physaddr = DMAADDR(&dma, offs);
sed->next = sc->sc_freeeds;
sc->sc_freeeds = sed;
  377                 }
  378         }
sed = sc->sc_freeeds;
sc->sc_freeeds = sed->next;
memset(&sed->ed, 0, sizeof(ohci_ed_t));
sed->next = 0;
  383         return (sed);
  384 }
  386 void
ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
  388 {
sed->next = sc->sc_freeeds;
sc->sc_freeeds = sed;
  391 }
ohci_soft_td_t *
ohci_alloc_std(ohci_softc_t *sc)
  395 {
ohci_soft_td_t *std;
usbd_status err;
  398         int i, offs;
usb_dma_t dma;
  400         int s;
  402         if (sc->sc_freetds == NULL) {
DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
OHCI_TD_ALIGN, &dma);
  406                 if (err)
  407                         return (NULL);
s = splusb();
  409                 for(i = 0; i < OHCI_STD_CHUNK; i++) {
offs = i * OHCI_STD_SIZE;
std = KERNADDR(&dma, offs);
std->physaddr = DMAADDR(&dma, offs);
std->nexttd = sc->sc_freetds;
sc->sc_freetds = std;
  415                 }
splx(s);
  417         }
s = splusb();
std = sc->sc_freetds;
sc->sc_freetds = std->nexttd;
memset(&std->td, 0, sizeof(ohci_td_t));
std->nexttd = NULL;
std->xfer = NULL;
ohci_hash_add_td(sc, std);
splx(s);
  428         return (std);
  429 }
  431 void
ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
  433 {
  434         int s;
s = splusb();
ohci_hash_rem_td(sc, std);
std->nexttd = sc->sc_freetds;
sc->sc_freetds = std;
splx(s);
  441 }
usbd_status
ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
  445                      int alen, int rd, usbd_xfer_handle xfer,
ohci_soft_td_t *sp, ohci_soft_td_t **ep)
  447 {
ohci_soft_td_t *next, *cur;
ohci_physaddr_t dataphys, dataphysend;
u_int32_t tdflags;
  451         int len, curlen;
usb_dma_t *dma = &xfer->dmabuf;
u_int16_t flags = xfer->flags;
DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
len = alen;
cur = sp;
dataphys = DMAADDR(dma, 0);
dataphysend = OHCI_PAGE(dataphys + len - 1);
tdflags = htole32(
  462             (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
  463             (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
  466         for (;;) {
next = ohci_alloc_std(sc);
  468                 if (next == NULL)
  469                         goto nomem;
  471                 /* The OHCI hardware can handle at most one page crossing. */
  472                 if (OHCI_PAGE(dataphys) == dataphysend ||
OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
  474                         /* we can handle it in this TD */
curlen = len;
  476                 } else {
  477                         /* must use multiple TDs, fill as much as possible. */
curlen = 2 * OHCI_PAGE_SIZE -
  479                                  (dataphys & (OHCI_PAGE_SIZE-1));
  480                         /* the length must be a multiple of the max size */
curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
  482 #ifdef DIAGNOSTIC
  483                         if (curlen == 0)
panic("ohci_alloc_std: curlen == 0");
  485 #endif
  486                 }
DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
  488                             "dataphysend=0x%08x len=%d curlen=%d\n",
dataphys, dataphysend,
len, curlen));
len -= curlen;
cur->td.td_flags = tdflags;
cur->td.td_cbp = htole32(dataphys);
cur->nexttd = next;
cur->td.td_nexttd = htole32(next->physaddr);
cur->td.td_be = htole32(dataphys + curlen - 1);
cur->len = curlen;
cur->flags = OHCI_ADD_LEN;
cur->xfer = xfer;
DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
dataphys, dataphys + curlen - 1));
  503                 if (len == 0)
  504                         break;
DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
dataphys += curlen;
cur = next;
  508         }
  509         if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
  511                 /* Force a 0 length transfer at the end. */
cur = next;
next = ohci_alloc_std(sc);
  515                 if (next == NULL)
  516                         goto nomem;
cur->td.td_flags = tdflags;
cur->td.td_cbp = 0; /* indicate 0 length packet */
cur->nexttd = next;
cur->td.td_nexttd = htole32(next->physaddr);
cur->td.td_be = ~0;
cur->len = 0;
cur->flags = 0;
cur->xfer = xfer;
DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
  527         }
  528         *ep = cur;
  530         return (USBD_NORMAL_COMPLETION);
nomem:
  533         /* XXX free chain */
  534         return (USBD_NOMEM);
  535 }
  537 #if 0
  538 void
ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
ohci_soft_td_t *stdend)
  541 {
ohci_soft_td_t *p;
  544         for (; std != stdend; std = p) {
p = std->nexttd;
ohci_free_std(sc, std);
  547         }
  548 }
  549 #endif
ohci_soft_itd_t *
ohci_alloc_sitd(ohci_softc_t *sc)
  553 {
ohci_soft_itd_t *sitd;
usbd_status err;
  556         int i, s, offs;
usb_dma_t dma;
  559         if (sc->sc_freeitds == NULL) {
DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
OHCI_ITD_ALIGN, &dma);
  563                 if (err)
  564                         return (NULL);
s = splusb();
  566                 for(i = 0; i < OHCI_SITD_CHUNK; i++) {
offs = i * OHCI_SITD_SIZE;
sitd = KERNADDR(&dma, offs);
sitd->physaddr = DMAADDR(&dma, offs);
sitd->nextitd = sc->sc_freeitds;
sc->sc_freeitds = sitd;
  572                 }
splx(s);
  574         }
s = splusb();
sitd = sc->sc_freeitds;
sc->sc_freeitds = sitd->nextitd;
memset(&sitd->itd, 0, sizeof(ohci_itd_t));
sitd->nextitd = NULL;
sitd->xfer = NULL;
ohci_hash_add_itd(sc, sitd);
splx(s);
  585 #ifdef DIAGNOSTIC
sitd->isdone = 0;
  587 #endif
  589         return (sitd);
  590 }
  592 void
ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
  594 {
  595         int s;
DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
  599 #ifdef DIAGNOSTIC
  600         if (!sitd->isdone) {
panic("ohci_free_sitd: sitd=%p not done", sitd);
  602                 return;
  603         }
  604         /* Warn double free */
sitd->isdone = 0;
  606 #endif
s = splusb();
ohci_hash_rem_itd(sc, sitd);
sitd->nextitd = sc->sc_freeitds;
sc->sc_freeitds = sitd;
splx(s);
  613 }
usbd_status
ohci_checkrev(ohci_softc_t *sc)
  617 {
u_int32_t rev;
printf(",");
rev = OREAD4(sc, OHCI_REVISION);
printf(" version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
  625         if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
printf("%s: unsupported OHCI revision\n",
sc->sc_bus.bdev.dv_xname);
sc->sc_bus.usbrev = USBREV_UNKNOWN;
  629                 return (USBD_INVAL);
  630         }
sc->sc_bus.usbrev = USBREV_1_0;
  633         return (USBD_NORMAL_COMPLETION);
  634 }
usbd_status
ohci_handover(ohci_softc_t *sc)
  638 {
u_int32_t s, ctl;
  640         int i;
ctl = OREAD4(sc, OHCI_CONTROL);
  643         if (ctl & OHCI_IR) {
  644                 /* SMM active, request change */
DPRINTF(("ohci_handover: SMM active, request owner change\n"));
  646                 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 
  647                     (OHCI_OC | OHCI_MIE))
OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
s = OREAD4(sc, OHCI_COMMAND_STATUS);
OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
  651                 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
usb_delay_ms(&sc->sc_bus, 1);
ctl = OREAD4(sc, OHCI_CONTROL);
  654                 }
OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
  656                 if (ctl & OHCI_IR) {
printf("%s: SMM does not respond, will reset\n",
sc->sc_bus.bdev.dv_xname);
  659                 }
  660         }
  662         return (USBD_NORMAL_COMPLETION);
  663 }
usbd_status
ohci_init(ohci_softc_t *sc)
  667 {
ohci_soft_ed_t *sed, *psed;
usbd_status err;
  670         int i;
u_int32_t ctl, rwc, ival, hcr, fm, per, desca, descb;
DPRINTF(("ohci_init: start\n"));
  675         for (i = 0; i < OHCI_HASH_SIZE; i++)
LIST_INIT(&sc->sc_hash_tds[i]);
  677         for (i = 0; i < OHCI_HASH_SIZE; i++)
LIST_INIT(&sc->sc_hash_itds[i]);
SIMPLEQ_INIT(&sc->sc_free_xfers);
  682         /* XXX determine alignment by R/W */
  683         /* Allocate the HCCA area. */
err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
OHCI_HCCA_ALIGN, &sc->sc_hccadma);
  686         if (err)
  687                 return (err);
sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
sc->sc_eintrs = OHCI_NORMAL_INTRS;
  693         /* Allocate dummy ED that starts the control list. */
sc->sc_ctrl_head = ohci_alloc_sed(sc);
  695         if (sc->sc_ctrl_head == NULL) {
err = USBD_NOMEM;
  697                 goto bad1;
  698         }
sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
  701         /* Allocate dummy ED that starts the bulk list. */
sc->sc_bulk_head = ohci_alloc_sed(sc);
  703         if (sc->sc_bulk_head == NULL) {
err = USBD_NOMEM;
  705                 goto bad2;
  706         }
sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
  709         /* Allocate dummy ED that starts the isochronous list. */
sc->sc_isoc_head = ohci_alloc_sed(sc);
  711         if (sc->sc_isoc_head == NULL) {
err = USBD_NOMEM;
  713                 goto bad3;
  714         }
sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
  717         /* Allocate all the dummy EDs that make up the interrupt tree. */
  718         for (i = 0; i < OHCI_NO_EDS; i++) {
sed = ohci_alloc_sed(sc);
  720                 if (sed == NULL) {
  721                         while (--i >= 0)
ohci_free_sed(sc, sc->sc_eds[i]);
err = USBD_NOMEM;
  724                         goto bad4;
  725                 }
  726                 /* All ED fields are set to 0. */
sc->sc_eds[i] = sed;
sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
  729                 if (i != 0)
psed = sc->sc_eds[(i-1) / 2];
  731                 else
psed= sc->sc_isoc_head;
sed->next = psed;
sed->ed.ed_nexted = htole32(psed->physaddr);
  735         }
  736         /*
  737          * Fill HCCA interrupt table.  The bit reversal is to get
  738          * the tree set up properly to spread the interrupts.
  739          */
  740         for (i = 0; i < OHCI_NO_INTRS; i++)
sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
  744 #ifdef OHCI_DEBUG
  745         if (ohcidebug > 15) {
  746                 for (i = 0; i < OHCI_NO_EDS; i++) {
printf("ed#%d ", i);
ohci_dump_ed(sc->sc_eds[i]);
  749                 }
printf("iso ");
ohci_dump_ed(sc->sc_isoc_head);
  752         }
  753 #endif
  754         /* Preserve values programmed by SMM/BIOS but lost over reset. */
ctl = OREAD4(sc, OHCI_CONTROL);
rwc = ctl & OHCI_RWC;
fm = OREAD4(sc, OHCI_FM_INTERVAL);
desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
  761         /* Determine in what context we are running. */
  762         if (ctl & OHCI_IR) {
OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
  764                 goto reset;
  765 #if 0
  766 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
  767         } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
  768                 /* BIOS started controller. */
DPRINTF(("ohci_init: BIOS active\n"));
  770                 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
  773                 }
  774 #endif
  775         } else {
DPRINTF(("ohci_init: cold started\n"));
reset:
  778                 /* Controller was cold started. */
usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
  780         }
  782         /*
  783          * This reset should not be necessary according to the OHCI spec, but
  784          * without it some controllers do not start.
  785          */
DPRINTF(("%s: resetting\n", sc->sc_bus.bdev.dv_xname));
OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
  790         /* We now own the host controller and the bus has been reset. */
OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
  793         /* Nominal time for a reset is 10 us. */
  794         for (i = 0; i < 10; i++) {
delay(10);
hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
  797                 if (!hcr)
  798                         break;
  799         }
  800         if (hcr) {
printf("%s: reset timeout\n", sc->sc_bus.bdev.dv_xname);
err = USBD_IOERROR;
  803                 goto bad5;
  804         }
  805 #ifdef OHCI_DEBUG
  806         if (ohcidebug > 15)
ohci_dumpregs(sc);
  808 #endif
  810         /* The controller is now in SUSPEND state, we have 2ms to finish. */
  812         /* Set up HC registers. */
OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
  816         /* disable all interrupts and then switch on all desired interrupts */
OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
  818         /* switch on desired functional features */
ctl = OREAD4(sc, OHCI_CONTROL);
ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
  823         /* And finally start it! */
OWRITE4(sc, OHCI_CONTROL, ctl);
  826         /*
  827          * The controller is now OPERATIONAL.  Set a some final
  828          * registers that should be set earlier, but that the
  829          * controller ignores when in the SUSPEND state.
  830          */
ival = OHCI_GET_IVAL(fm);
fm = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT;
fm |= OHCI_FSMPS(ival) | ival;
OWRITE4(sc, OHCI_FM_INTERVAL, fm);
per = OHCI_PERIODIC(ival); /* 90% periodic */
OWRITE4(sc, OHCI_PERIODIC_START, per);
  838         /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
OWRITE4(sc, OHCI_RH_DESCRIPTOR_B, descb);
usb_delay_ms(&sc->sc_bus, OHCI_GET_POTPGT(desca) * UHD_PWRON_FACTOR);
  846         /*
  847          * The AMD756 requires a delay before re-reading the register,
  848          * otherwise it will occasionally report 0 ports.
  849          */
sc->sc_noport = 0;
  851         for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
  854         }
  856 #ifdef OHCI_DEBUG
  857         if (ohcidebug > 5)
ohci_dumpregs(sc);
  859 #endif
  861         /* Set up the bus struct. */
sc->sc_bus.methods = &ohci_bus_methods;
sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
sc->sc_control = sc->sc_intre = 0;
sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
timeout_set(&sc->sc_tmo_rhsc, NULL, NULL);
  870         /* Finally, turn on interrupts. */
DPRINTFN(1,("ohci_init: enabling\n"));
OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
  874         return (USBD_NORMAL_COMPLETION);
bad5:
  877         for (i = 0; i < OHCI_NO_EDS; i++)
ohci_free_sed(sc, sc->sc_eds[i]);
bad4:
ohci_free_sed(sc, sc->sc_isoc_head);
bad3:
ohci_free_sed(sc, sc->sc_bulk_head);
bad2:
ohci_free_sed(sc, sc->sc_ctrl_head);
bad1:
usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
  887         return (err);
  888 }
usbd_status
ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
  892 {
  893         struct ohci_softc *sc = (struct ohci_softc *)bus;
  895         return (usb_allocmem(&sc->sc_bus, size, 0, dma));
  896 }
  898 void
ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
  900 {
  901         struct ohci_softc *sc = (struct ohci_softc *)bus;
usb_freemem(&sc->sc_bus, dma);
  904 }
usbd_xfer_handle
ohci_allocx(struct usbd_bus *bus)
  908 {
  909         struct ohci_softc *sc = (struct ohci_softc *)bus;
usbd_xfer_handle xfer;
xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
  913         if (xfer != NULL) {
SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
  915 #ifdef DIAGNOSTIC
  916                 if (xfer->busy_free != XFER_FREE) {
printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
xfer->busy_free);
  919                 }
  920 #endif
  921         } else {
xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT);
  923         }
  924         if (xfer != NULL) {
memset(xfer, 0, sizeof (struct ohci_xfer));
  926 #ifdef DIAGNOSTIC
xfer->busy_free = XFER_BUSY;
  928 #endif
  929         }
  930         return (xfer);
  931 }
  933 void
ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
  935 {
  936         struct ohci_softc *sc = (struct ohci_softc *)bus;
  938 #ifdef DIAGNOSTIC
  939         if (xfer->busy_free != XFER_BUSY) {
printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
xfer->busy_free);
  942                 return;
  943         }
xfer->busy_free = XFER_FREE;
  945 #endif
SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
  947 }
  949 /*
  950  * Shut down the controller when the system is going down.
  951  */
  952 void
ohci_shutdown(void *v)
  954 {
ohci_softc_t *sc = v;
DPRINTF(("ohci_shutdown: stopping the HC\n"));
OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
  959 }
  961 /*
  962  * Handle suspend/resume.
  963  *
  964  * We need to switch to polling mode here, because this routine is
  965  * called from an interrupt context.  This is all right since we
  966  * are almost suspended anyway.
  967  */
  968 void
ohci_power(int why, void *v)
  970 {
ohci_softc_t *sc = v;
u_int32_t reg;
  973         int s;
  975 #ifdef OHCI_DEBUG
DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
ohci_dumpregs(sc);
  978 #endif
s = splhardusb();
  981         switch (why) {
  982         case PWR_SUSPEND:
  983         case PWR_STANDBY:
sc->sc_bus.use_polling++;
reg = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
  986                 if (sc->sc_control == 0) {
  987                         /*
  988                          * Preserve register values, in case that APM BIOS
  989                          * does not recover them.
  990                          */
sc->sc_control = reg;
sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
sc->sc_ival = OHCI_GET_IVAL(OREAD4(sc,
OHCI_FM_INTERVAL));
  995                 }
reg |= OHCI_HCFS_SUSPEND;
OWRITE4(sc, OHCI_CONTROL, reg);
usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
sc->sc_bus.use_polling--;
 1000                 break;
 1001         case PWR_RESUME:
sc->sc_bus.use_polling++;
 1004                 /* Some broken BIOSes do not recover these values */
OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
 1008                 if (sc->sc_intre)
OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
 1011                 if (sc->sc_control)
reg = sc->sc_control;
 1013                 else
reg = OREAD4(sc, OHCI_CONTROL);
reg |= OHCI_HCFS_RESUME;
OWRITE4(sc, OHCI_CONTROL, reg);
usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
reg = (reg & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
OWRITE4(sc, OHCI_CONTROL, reg);
reg = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT;
reg |= OHCI_FSMPS(sc->sc_ival) | sc->sc_ival;
OWRITE4(sc, OHCI_FM_INTERVAL, reg);
OWRITE4(sc, OHCI_PERIODIC_START, OHCI_PERIODIC(sc->sc_ival));
 1026                 /* Fiddle the No OverCurrent Protection to avoid a chip bug */
reg = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg | OHCI_NOCP);
OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg);
usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
sc->sc_control = sc->sc_intre = sc->sc_ival = 0;
sc->sc_bus.use_polling--;
 1036                 break;
 1037         }
splx(s);
 1039 }
 1041 #ifdef OHCI_DEBUG
 1042 void
ohci_dumpregs(ohci_softc_t *sc)
 1044 {
DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
OREAD4(sc, OHCI_REVISION),
OREAD4(sc, OHCI_CONTROL),
OREAD4(sc, OHCI_COMMAND_STATUS)));
DPRINTF(("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
OREAD4(sc, OHCI_INTERRUPT_STATUS),
OREAD4(sc, OHCI_INTERRUPT_ENABLE),
OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
DPRINTF(("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
OREAD4(sc, OHCI_HCCA),
OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
DPRINTF(("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
OREAD4(sc, OHCI_BULK_HEAD_ED),
OREAD4(sc, OHCI_BULK_CURRENT_ED)));
DPRINTF(("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
OREAD4(sc, OHCI_DONE_HEAD),
OREAD4(sc, OHCI_FM_INTERVAL),
OREAD4(sc, OHCI_FM_REMAINING)));
DPRINTF(("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
OREAD4(sc, OHCI_FM_NUMBER),
OREAD4(sc, OHCI_PERIODIC_START),
OREAD4(sc, OHCI_LS_THRESHOLD)));
DPRINTF(("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
OREAD4(sc, OHCI_RH_STATUS)));
DPRINTF(("               port1=0x%08x port2=0x%08x\n",
OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
DPRINTF(("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
letoh32(sc->sc_hcca->hcca_frame_number),
letoh32(sc->sc_hcca->hcca_done_head)));
 1079 }
 1080 #endif
 1082 int ohci_intr1(ohci_softc_t *);
 1084 int
ohci_intr(void *p)
 1086 {
ohci_softc_t *sc = p;
 1089         if (sc == NULL || sc->sc_dying)
 1090                 return (0);
 1092         /* If we get an interrupt while polling, then just ignore it. */
 1093         if (!cold && sc->sc_bus.use_polling) {
 1094 #ifdef DIAGNOSTIC
 1095                 static struct timeval ohci_intr_tv;
 1096                 if ((OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) &&
usbd_ratecheck(&ohci_intr_tv))
DPRINTFN(16,
 1099                             ("ohci_intr: ignored interrupt while polling\n"));
 1100 #endif
 1101                 return (0);
 1102         }
 1104         return (ohci_intr1(sc));
 1105 }
 1107 int
ohci_intr1(ohci_softc_t *sc)
 1109 {
u_int32_t intrs, eintrs;
ohci_physaddr_t done;
DPRINTFN(14,("ohci_intr1: enter\n"));
 1115         /* In case the interrupt occurs before initialization has completed. */
 1116         if (sc == NULL || sc->sc_hcca == NULL) {
 1117 #ifdef DIAGNOSTIC
printf("ohci_intr: sc->sc_hcca == NULL\n");
 1119 #endif
 1120                 return (0);
 1121         }
intrs = 0;
done = letoh32(sc->sc_hcca->hcca_done_head);
 1125         if (done != 0) {
 1126                 if (done & ~OHCI_DONE_INTRS)
intrs = OHCI_WDH;
 1128                 if (done & OHCI_DONE_INTRS)
intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
sc->sc_hcca->hcca_done_head = 0;
 1131         } else {
intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
 1133                 /* If we've flushed out a WDH then reread */
 1134                 if (intrs & OHCI_WDH) {
done = letoh32(sc->sc_hcca->hcca_done_head);
sc->sc_hcca->hcca_done_head = 0;
 1137                 }
 1138         }
 1140         if (!intrs)
 1141                 return (0);
intrs &= ~OHCI_MIE;
OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
eintrs = intrs & sc->sc_eintrs;
 1146         if (!eintrs)
 1147                 return (0);
sc->sc_bus.intr_context++;
sc->sc_bus.no_intrs++;
DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
 1153                      (u_int)eintrs));
 1155         if (eintrs & OHCI_SO) {
sc->sc_overrun_cnt++;
 1157                 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
printf("%s: %u scheduling overruns\n",
sc->sc_bus.bdev.dv_xname, sc->sc_overrun_cnt);
sc->sc_overrun_cnt = 0;
 1161                 }
 1162                 /* XXX do what */
eintrs &= ~OHCI_SO;
 1164         }
 1165         if (eintrs & OHCI_WDH) {
ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
usb_schedsoftintr(&sc->sc_bus);
eintrs &= ~OHCI_WDH;
 1169         }
 1170         if (eintrs & OHCI_RD) {
printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname);
 1172                 /* XXX process resume detect */
 1173         }
 1174         if (eintrs & OHCI_UE) {
printf("%s: unrecoverable error, controller halted\n",
sc->sc_bus.bdev.dv_xname);
OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
 1178                 /* XXX what else */
 1179         }
 1180         if (eintrs & OHCI_RHSC) {
ohci_rhsc(sc, sc->sc_intrxfer);
 1182                 /*
 1183                  * Disable RHSC interrupt for now, because it will be
 1184                  * on until the port has been reset.
 1185                  */
ohci_rhsc_able(sc, 0);
DPRINTFN(2, ("%s: rhsc interrupt disabled\n",
sc->sc_bus.bdev.dv_xname));
 1190                 /* Do not allow RHSC interrupts > 1 per second */
timeout_del(&sc->sc_tmo_rhsc);
timeout_set(&sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
timeout_add(&sc->sc_tmo_rhsc, hz);
eintrs &= ~OHCI_RHSC;
 1195         }
sc->sc_bus.intr_context--;
 1199         if (eintrs != 0) {
 1200                 /* Block unprocessed interrupts. XXX */
OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
sc->sc_eintrs &= ~eintrs;
printf("%s: blocking intrs 0x%x\n",
sc->sc_bus.bdev.dv_xname, eintrs);
 1205         }
 1207         return (1);
 1208 }
 1210 void
ohci_rhsc_able(ohci_softc_t *sc, int on)
 1212 {
DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
 1214         if (on) {
sc->sc_eintrs |= OHCI_RHSC;
OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
 1217         } else {
sc->sc_eintrs &= ~OHCI_RHSC;
OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
 1220         }
 1221 }
 1223 void
ohci_rhsc_enable(void *v_sc)
 1225 {
ohci_softc_t *sc = v_sc;
 1227         int s;
s = splhardusb();
ohci_rhsc(sc, sc->sc_intrxfer);
DPRINTFN(2, ("%s: rhsc interrupt enabled\n",
sc->sc_bus.bdev.dv_xname));
ohci_rhsc_able(sc, 1);
splx(s);
 1236 }
 1238 #ifdef OHCI_DEBUG
 1239 char *ohci_cc_strs[] = {
 1240         "NO_ERROR",
 1241         "CRC",
 1242         "BIT_STUFFING",
 1243         "DATA_TOGGLE_MISMATCH",
 1244         "STALL",
 1245         "DEVICE_NOT_RESPONDING",
 1246         "PID_CHECK_FAILURE",
 1247         "UNEXPECTED_PID",
 1248         "DATA_OVERRUN",
 1249         "DATA_UNDERRUN",
 1250         "BUFFER_OVERRUN",
 1251         "BUFFER_UNDERRUN",
 1252         "reserved",
 1253         "reserved",
 1254         "NOT_ACCESSED",
 1255         "NOT_ACCESSED",
 1256 };
 1257 #endif
 1259 void
ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
 1261 {
ohci_soft_itd_t *sitd, *sidone, **ip;
ohci_soft_td_t  *std,  *sdone,  **p;
 1265         /* Reverse the done list. */
 1266         for (sdone = NULL, sidone = NULL; done != 0; ) {
std = ohci_hash_find_td(sc, done);
 1268                 if (std != NULL) {
std->dnext = sdone;
done = letoh32(std->td.td_nexttd);
sdone = std;
DPRINTFN(10,("add TD %p\n", std));
 1273                         continue;
 1274                 }
sitd = ohci_hash_find_itd(sc, done);
 1276                 if (sitd != NULL) {
sitd->dnext = sidone;
done = letoh32(sitd->itd.itd_nextitd);
sidone = sitd;
DPRINTFN(5,("add ITD %p\n", sitd));
 1281                         continue;
 1282                 }
panic("ohci_add_done: addr 0x%08lx not found", (u_long)done);
 1284         }
 1286         /* sdone & sidone now hold the done lists. */
 1287         /* Put them on the already processed lists. */
 1288         for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
 1289                 ;
 1290         *p = sdone;
 1291         for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
 1292                 ;
 1293         *ip = sidone;
 1294 }
 1296 void
ohci_softintr(void *v)
 1298 {
ohci_softc_t *sc = v;
ohci_soft_itd_t *sitd, *sidone, *sitdnext;
ohci_soft_td_t  *std,  *sdone,  *stdnext;
usbd_xfer_handle xfer;
 1303         struct ohci_pipe *opipe;
 1304         int len, cc, s;
 1305         int i, j, actlen, iframes, uedir;
DPRINTFN(10,("ohci_softintr: enter\n"));
sc->sc_bus.intr_context++;
s = splhardusb();
sdone = sc->sc_sdone;
sc->sc_sdone = NULL;
sidone = sc->sc_sidone;
sc->sc_sidone = NULL;
splx(s);
DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
 1320 #ifdef OHCI_DEBUG
 1321         if (ohcidebug > 10) {
DPRINTF(("ohci_process_done: TD done:\n"));
ohci_dump_tds(sdone);
 1324         }
 1325 #endif
 1327         for (std = sdone; std; std = stdnext) {
xfer = std->xfer;
stdnext = std->dnext;
DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
std, xfer, xfer ? xfer->hcpriv : 0));
 1332                 if (xfer == NULL) {
 1333                         /*
 1334                          * xfer == NULL: There seems to be no xfer associated
 1335                          * with this TD. It is tailp that happened to end up on
 1336                          * the done queue.
 1337                          * Shouldn't happen, but some chips are broken(?).
 1338                          */
 1339                         continue;
 1340                 }
 1341                 if (xfer->status == USBD_CANCELLED ||
xfer->status == USBD_TIMEOUT) {
DPRINTF(("ohci_process_done: cancel/timeout %p\n",
xfer));
 1345                         /* Handled by abort routine. */
 1346                         continue;
 1347                 }
timeout_del(&xfer->timeout_handle);
len = std->len;
 1351                 if (std->td.td_cbp != 0)
len -= letoh32(std->td.td_be) -
letoh32(std->td.td_cbp) + 1;
DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
std->flags));
 1356                 if (std->flags & OHCI_ADD_LEN)
xfer->actlen += len;
cc = OHCI_TD_GET_CC(letoh32(std->td.td_flags));
 1360                 if (cc == OHCI_CC_NO_ERROR) {
 1361                         if (std->flags & OHCI_CALL_DONE) {
xfer->status = USBD_NORMAL_COMPLETION;
s = splusb();
usb_transfer_complete(xfer);
splx(s);
 1366                         }
ohci_free_std(sc, std);
 1368                 } else {
 1369                         /*
 1370                          * Endpoint is halted.  First unlink all the TDs
 1371                          * belonging to the failed transfer, and then restart
 1372                          * the endpoint.
 1373                          */
ohci_soft_td_t *p, *n;
opipe = (struct ohci_pipe *)xfer->pipe;
DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
OHCI_TD_GET_CC(letoh32(std->td.td_flags)),
ohci_cc_strs[OHCI_TD_GET_CC(letoh32(std->td.td_flags))]));
 1381                         /* remove TDs */
 1382                         for (p = std; p->xfer == xfer; p = n) {
n = p->nexttd;
ohci_free_std(sc, p);
 1385                         }
 1387                         /* clear halt */
opipe->sed->ed.ed_headp = htole32(p->physaddr);
OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
 1391                         if (cc == OHCI_CC_STALL)
xfer->status = USBD_STALLED;
 1393                         else
xfer->status = USBD_IOERROR;
s = splusb();
usb_transfer_complete(xfer);
splx(s);
 1398                 }
 1399         }
 1401 #ifdef OHCI_DEBUG
 1402         if (ohcidebug > 10) {
DPRINTF(("ohci_softintr: ITD done:\n"));
ohci_dump_itds(sidone);
 1405         }
 1406 #endif
 1408         for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
xfer = sitd->xfer;
sitdnext = sitd->dnext;
DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
sitd, xfer, xfer ? xfer->hcpriv : 0));
 1413                 if (xfer == NULL)
 1414                         continue;
 1415                 if (xfer->status == USBD_CANCELLED ||
xfer->status == USBD_TIMEOUT) {
DPRINTF(("ohci_process_done: cancel/timeout %p\n",
xfer));
 1419                         /* Handled by abort routine. */
 1420                         continue;
 1421                 }
 1422 #ifdef DIAGNOSTIC
 1423                 if (sitd->isdone)
printf("ohci_softintr: sitd=%p is done\n", sitd);
sitd->isdone = 1;
 1426 #endif
 1427                 if (sitd->flags & OHCI_CALL_DONE) {
ohci_soft_itd_t *next;
opipe = (struct ohci_pipe *)xfer->pipe;
opipe->u.iso.inuse -= xfer->nframes;
uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc->
bEndpointAddress);
xfer->status = USBD_NORMAL_COMPLETION;
actlen = 0;
 1436                         for (i = 0, sitd = xfer->hcpriv;;
sitd = next) {
next = sitd->nextitd;
 1439                                 if (OHCI_ITD_GET_CC(letoh32(sitd->
itd.itd_flags)) != OHCI_CC_NO_ERROR)
xfer->status = USBD_IOERROR;
 1442                                 /* For input, update frlengths with actual */
 1443                                 /* XXX anything necessary for output? */
 1444                                 if (uedir == UE_DIR_IN &&
xfer->status == USBD_NORMAL_COMPLETION) {
iframes = OHCI_ITD_GET_FC(letoh32(
sitd->itd.itd_flags));
 1448                                         for (j = 0; j < iframes; i++, j++) {
len = letoh16(sitd->
itd.itd_offset[j]);
 1451                                                 if ((OHCI_ITD_PSW_GET_CC(len) &
OHCI_CC_NOT_ACCESSED_MASK)
 1453                                                     == OHCI_CC_NOT_ACCESSED)
len = 0;
 1455                                                 else
len = OHCI_ITD_PSW_LENGTH(len);
xfer->frlengths[i] = len;
actlen += len;
 1459                                         }
 1460                                 }
 1461                                 if (sitd->flags & OHCI_CALL_DONE)
 1462                                         break;
ohci_free_sitd(sc, sitd);
 1464                         }
ohci_free_sitd(sc, sitd);
 1466                         if (uedir == UE_DIR_IN &&
xfer->status == USBD_NORMAL_COMPLETION)
xfer->actlen = actlen;
xfer->hcpriv = NULL;
s = splusb();
usb_transfer_complete(xfer);
splx(s);
 1474                 }
 1475         }
 1477 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
 1478         if (sc->sc_softwake) {
sc->sc_softwake = 0;
wakeup(&sc->sc_softwake);
 1481         }
 1482 #endif /* __HAVE_GENERIC_SOFT_INTERRUPTS */
sc->sc_bus.intr_context--;
DPRINTFN(10,("ohci_softintr: done:\n"));
 1486 }
 1488 void
ohci_device_ctrl_done(usbd_xfer_handle xfer)
 1490 {
DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
 1493 #ifdef DIAGNOSTIC
 1494         if (!(xfer->rqflags & URQ_REQUEST)) {
panic("ohci_device_ctrl_done: not a request");
 1496         }
 1497 #endif
 1498 }
 1500 void
ohci_device_intr_done(usbd_xfer_handle xfer)
 1502 {
 1503         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
ohci_soft_ed_t *sed = opipe->sed;
ohci_soft_td_t *data, *tail;
DPRINTFN(10, ("ohci_device_intr_done: xfer=%p, actlen=%d\n", xfer,
xfer->actlen));
 1512         if (xfer->pipe->repeat) {
data = opipe->tail.td;
tail = ohci_alloc_std(sc); /* XXX should reuse TD */
 1515                 if (tail == NULL) {
xfer->status = USBD_NOMEM;
 1517                         return;
 1518                 }
tail->xfer = NULL;
data->td.td_flags = htole32(
OHCI_TD_IN | OHCI_TD_NOCC |
OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
 1524                 if (xfer->flags & USBD_SHORT_XFER_OK)
data->td.td_flags |= htole32(OHCI_TD_R);
data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
data->nexttd = tail;
data->td.td_nexttd = htole32(tail->physaddr);
data->td.td_be = htole32(letoh32(data->td.td_cbp) +
xfer->length - 1);
data->len = xfer->length;
data->xfer = xfer;
data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
xfer->hcpriv = data;
xfer->actlen = 0;
sed->ed.ed_tailp = htole32(tail->physaddr);
opipe->tail.td = tail;
 1539         }
 1540 }
 1542 void
ohci_device_bulk_done(usbd_xfer_handle xfer)
 1544 {
DPRINTFN(10, ("ohci_device_bulk_done: xfer=%p, actlen=%d\n", xfer,
xfer->actlen));
 1547 }
 1549 void
ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
 1551 {
usbd_pipe_handle pipe;
u_char *p;
 1554         int i, m;
 1555         int hstatus;
hstatus = OREAD4(sc, OHCI_RH_STATUS);
DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
sc, xfer, hstatus));
 1561         if (xfer == NULL) {
 1562                 /* Just ignore the change. */
 1563                 return;
 1564         }
pipe = xfer->pipe;
p = KERNADDR(&xfer->dmabuf, 0);
m = min(sc->sc_noport, xfer->length * 8 - 1);
memset(p, 0, xfer->length);
 1571         for (i = 1; i <= m; i++) {
 1572                 /* Pick out CHANGE bits from the status reg. */
 1573                 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
p[i/8] |= 1 << (i%8);
 1575         }
DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
xfer->actlen = xfer->length;
xfer->status = USBD_NORMAL_COMPLETION;
usb_transfer_complete(xfer);
 1581 }
 1583 void
ohci_root_intr_done(usbd_xfer_handle xfer)
 1585 {
 1586 }
 1588 void
ohci_root_ctrl_done(usbd_xfer_handle xfer)
 1590 {
 1591 }
 1593 /*
 1594  * Wait here until controller claims to have an interrupt.
 1595  * Then call ohci_intr and return.  Use timeout to avoid waiting
 1596  * too long.
 1597  */
 1598 void
ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
 1600 {
 1601         int timo;
u_int32_t intrs;
xfer->status = USBD_IN_PROGRESS;
 1605         for (timo = xfer->timeout; timo >= 0; timo--) {
usb_delay_ms(&sc->sc_bus, 1);
 1607                 if (sc->sc_dying)
 1608                         break;
intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
 1611 #ifdef OHCI_DEBUG
 1612                 if (ohcidebug > 15)
ohci_dumpregs(sc);
 1614 #endif
 1615                 if (intrs) {
ohci_intr1(sc);
 1617                         if (xfer->status != USBD_IN_PROGRESS)
 1618                                 return;
 1619                 }
 1620         }
 1622         /* Timeout */
DPRINTF(("ohci_waitintr: timeout\n"));
xfer->status = USBD_TIMEOUT;
usb_transfer_complete(xfer);
 1626         /* XXX should free TD */
 1627 }
 1629 void
ohci_poll(struct usbd_bus *bus)
 1631 {
ohci_softc_t *sc = (ohci_softc_t *)bus;
 1633 #ifdef OHCI_DEBUG
 1634         static int last;
 1635         int new;
new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
 1637         if (new != last) {
DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
last = new;
 1640         }
 1641 #endif
 1643         if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
ohci_intr1(sc);
 1645 }
usbd_status
ohci_device_request(usbd_xfer_handle xfer)
 1649 {
 1650         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
usb_device_request_t *req = &xfer->request;
usbd_device_handle dev = opipe->pipe.device;
ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
 1654         int addr = dev->address;
ohci_soft_td_t *setup, *stat, *next, *tail;
ohci_soft_ed_t *sed;
 1657         int isread;
 1658         int len;
usbd_status err;
 1660         int s;
isread = req->bmRequestType & UT_READ;
len = UGETW(req->wLength);
DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
 1666                     "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
req->bmRequestType, req->bRequest, UGETW(req->wValue),
UGETW(req->wIndex), len, addr,
opipe->pipe.endpoint->edesc->bEndpointAddress));
setup = opipe->tail.td;
stat = ohci_alloc_std(sc);
 1673         if (stat == NULL) {
err = USBD_NOMEM;
 1675                 goto bad1;
 1676         }
tail = ohci_alloc_std(sc);
 1678         if (tail == NULL) {
err = USBD_NOMEM;
 1680                 goto bad2;
 1681         }
tail->xfer = NULL;
sed = opipe->sed;
opipe->u.ctl.length = len;
 1687         /* Update device address and length since they may have changed
 1688            during the setup of the control pipe in usbd_new_device(). */
 1689         /* XXX This only needs to be done once, but it's too early in open. */
 1690         /* XXXX Should not touch ED here! */
sed->ed.ed_flags = htole32(
 1692          (letoh32(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
OHCI_ED_SET_FA(addr) |
OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
next = stat;
 1698         /* Set up data transaction */
 1699         if (len != 0) {
ohci_soft_td_t *std = stat;
err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
std, &stat);
stat = stat->nexttd; /* point at free TD */
 1705                 if (err)
 1706                         goto bad3;
 1707                 /* Start toggle at 1 and then use the carried toggle. */
std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
 1710         }
memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
setup->nexttd = next;
setup->td.td_nexttd = htole32(next->physaddr);
setup->td.td_be = htole32(letoh32(setup->td.td_cbp) + sizeof *req - 1);
setup->len = 0;
setup->xfer = xfer;
setup->flags = 0;
xfer->hcpriv = setup;
stat->td.td_flags = htole32(
 1726                 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
stat->td.td_cbp = 0;
stat->nexttd = tail;
stat->td.td_nexttd = htole32(tail->physaddr);
stat->td.td_be = 0;
stat->flags = OHCI_CALL_DONE;
stat->len = 0;
stat->xfer = xfer;
 1736 #ifdef OHCI_DEBUG
 1737         if (ohcidebug > 5) {
DPRINTF(("ohci_device_request:\n"));
ohci_dump_ed(sed);
ohci_dump_tds(setup);
 1741         }
 1742 #endif
 1744         /* Insert ED in schedule */
s = splusb();
sed->ed.ed_tailp = htole32(tail->physaddr);
opipe->tail.td = tail;
OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
 1749         if (xfer->timeout && !sc->sc_bus.use_polling) {
timeout_del(&xfer->timeout_handle);
timeout_set(&xfer->timeout_handle, ohci_timeout, xfer);
timeout_add(&xfer->timeout_handle, mstohz(xfer->timeout));
 1753         }
splx(s);
 1756 #ifdef OHCI_DEBUG
 1757         if (ohcidebug > 20) {
delay(10000);
DPRINTF(("ohci_device_request: status=%x\n",
OREAD4(sc, OHCI_COMMAND_STATUS)));
ohci_dumpregs(sc);
printf("ctrl head:\n");
ohci_dump_ed(sc->sc_ctrl_head);
printf("sed:\n");
ohci_dump_ed(sed);
ohci_dump_tds(setup);
 1767         }
 1768 #endif
 1770         return (USBD_NORMAL_COMPLETION);
bad3:
ohci_free_std(sc, tail);
bad2:
ohci_free_std(sc, stat);
bad1:
 1777         return (err);
 1778 }
 1780 /*
 1781  * Add an ED to the schedule.  Called at splusb().
 1782  */
 1783 void
ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
 1785 {
DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
SPLUSBCHECK;
sed->next = head->next;
sed->ed.ed_nexted = head->ed.ed_nexted;
head->next = sed;
head->ed.ed_nexted = htole32(sed->physaddr);
 1793 }
 1795 /*
 1796  * Remove an ED from the schedule.  Called at splusb().
 1797  */
 1798 void
ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
 1800 {
ohci_soft_ed_t *p;
SPLUSBCHECK;
 1805         /* XXX */
 1806         for (p = head; p != NULL && p->next != sed; p = p->next)
 1807                 ;
 1808         if (p == NULL)
panic("ohci_rem_ed: ED not found");
p->next = sed->next;
p->ed.ed_nexted = sed->ed.ed_nexted;
 1812 }
 1814 /*
 1815  * When a transfer is completed the TD is added to the done queue by
 1816  * the host controller.  This queue is the processed by software.
 1817  * Unfortunately the queue contains the physical address of the TD
 1818  * and we have no simple way to translate this back to a kernel address.
 1819  * To make the translation possible (and fast) we use a hash table of
 1820  * TDs currently in the schedule.  The physical address is used as the
 1821  * hash value.
 1822  */
 1824 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
 1825 /* Called at splusb() */
 1826 void
ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
 1828 {
 1829         int h = HASH(std->physaddr);
SPLUSBCHECK;
LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
 1834 }
 1836 /* Called at splusb() */
 1837 void
ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
 1839 {
SPLUSBCHECK;
LIST_REMOVE(std, hnext);
 1843 }
ohci_soft_td_t *
ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
 1847 {
 1848         int h = HASH(a);
ohci_soft_td_t *std;
 1851         for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
std != NULL;
std = LIST_NEXT(std, hnext))
 1854                 if (std->physaddr == a)
 1855                         return (std);
 1856         return (NULL);
 1857 }
 1859 /* Called at splusb() */
 1860 void
ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
 1862 {
 1863         int h = HASH(sitd->physaddr);
SPLUSBCHECK;
DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
sitd, (u_long)sitd->physaddr));
LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
 1871 }
 1873 /* Called at splusb() */
 1874 void
ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
 1876 {
SPLUSBCHECK;
DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
sitd, (u_long)sitd->physaddr));
LIST_REMOVE(sitd, hnext);
 1883 }
ohci_soft_itd_t *
ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
 1887 {
 1888         int h = HASH(a);
ohci_soft_itd_t *sitd;
 1891         for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
sitd != NULL;
sitd = LIST_NEXT(sitd, hnext))
 1894                 if (sitd->physaddr == a)
 1895                         return (sitd);
 1896         return (NULL);
 1897 }
 1899 void
ohci_timeout(void *addr)
 1901 {
 1902         struct ohci_xfer *oxfer = addr;
 1903         struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
 1908         if (sc->sc_dying) {
ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
 1910                 return;
 1911         }
 1913         /* Execute the abort in a process context. */
usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task);
 1916 }
 1918 void
ohci_timeout_task(void *addr)
 1920 {
usbd_xfer_handle xfer = addr;
 1922         int s;
DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
s = splusb();
ohci_abort_xfer(xfer, USBD_TIMEOUT);
splx(s);
 1929 }
 1931 #ifdef OHCI_DEBUG
 1932 void
ohci_dump_tds(ohci_soft_td_t *std)
 1934 {
 1935         for (; std; std = std->nexttd)
ohci_dump_td(std);
 1937 }
 1939 void
ohci_dump_td(ohci_soft_td_t *std)
 1941 {
 1942         char sbuf[128];
bitmask_snprintf((u_int32_t)letoh32(std->td.td_flags),
 1945                          "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
sbuf, sizeof(sbuf));
printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
 1949                "nexttd=0x%08lx be=0x%08lx\n",
std, (u_long)std->physaddr, sbuf,
OHCI_TD_GET_DI(letoh32(std->td.td_flags)),
OHCI_TD_GET_EC(letoh32(std->td.td_flags)),
OHCI_TD_GET_CC(letoh32(std->td.td_flags)),
 1954                (u_long)letoh32(std->td.td_cbp),
 1955                (u_long)letoh32(std->td.td_nexttd),
 1956                (u_long)letoh32(std->td.td_be));
 1957 }
 1959 void
ohci_dump_itd(ohci_soft_itd_t *sitd)
 1961 {
 1962         int i;
printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
 1965                "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
sitd, (u_long)sitd->physaddr,
OHCI_ITD_GET_SF(letoh32(sitd->itd.itd_flags)),
OHCI_ITD_GET_DI(letoh32(sitd->itd.itd_flags)),
OHCI_ITD_GET_FC(letoh32(sitd->itd.itd_flags)),
OHCI_ITD_GET_CC(letoh32(sitd->itd.itd_flags)),
 1971                (u_long)letoh32(sitd->itd.itd_bp0),
 1972                (u_long)letoh32(sitd->itd.itd_nextitd),
 1973                (u_long)letoh32(sitd->itd.itd_be));
 1974         for (i = 0; i < OHCI_ITD_NOFFSET; i++)
printf("offs[%d]=0x%04x ", i,
 1976                        (u_int)letoh16(sitd->itd.itd_offset[i]));
printf("\n");
 1978 }
 1980 void
ohci_dump_itds(ohci_soft_itd_t *sitd)
 1982 {
 1983         for (; sitd; sitd = sitd->nextitd)
ohci_dump_itd(sitd);
 1985 }
 1987 void
ohci_dump_ed(ohci_soft_ed_t *sed)
 1989 {
 1990         char sbuf[128], sbuf2[128];
bitmask_snprintf((u_int32_t)letoh32(sed->ed.ed_flags),
 1993                          "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
sbuf, sizeof(sbuf));
bitmask_snprintf((u_int32_t)letoh32(sed->ed.ed_headp),
 1996                          "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\n"
 1999                "tailp=0x%08lx headflags=%s headp=0x%08lx nexted=0x%08lx\n",
sed, (u_long)sed->physaddr,
OHCI_ED_GET_FA(letoh32(sed->ed.ed_flags)),
OHCI_ED_GET_EN(letoh32(sed->ed.ed_flags)),
OHCI_ED_GET_MAXP(letoh32(sed->ed.ed_flags)), sbuf,
 2004                (u_long)letoh32(sed->ed.ed_tailp), sbuf2,
 2005                (u_long)letoh32(sed->ed.ed_headp),
 2006                (u_long)letoh32(sed->ed.ed_nexted));
 2007 }
 2008 #endif
usbd_status
ohci_open(usbd_pipe_handle pipe)
 2012 {
usbd_device_handle dev = pipe->device;
ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
 2016         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
u_int8_t addr = dev->address;
u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
ohci_soft_ed_t *sed;
ohci_soft_td_t *std;
ohci_soft_itd_t *sitd;
ohci_physaddr_t tdphys;
u_int32_t fmt;
usbd_status err;
 2025         int s;
 2026         int ival;
DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
pipe, addr, ed->bEndpointAddress, sc->sc_addr));
 2031         if (sc->sc_dying)
 2032                 return (USBD_IOERROR);
std = NULL;
sed = NULL;
 2037         if (addr == sc->sc_addr) {
 2038                 switch (ed->bEndpointAddress) {
 2039                 case USB_CONTROL_ENDPOINT:
pipe->methods = &ohci_root_ctrl_methods;
 2041                         break;
 2042                 case UE_DIR_IN | OHCI_INTR_ENDPT:
pipe->methods = &ohci_root_intr_methods;
 2044                         break;
 2045                 default:
 2046                         return (USBD_INVAL);
 2047                 }
 2048         } else {
sed = ohci_alloc_sed(sc);
 2050                 if (sed == NULL)
 2051                         goto bad0;
opipe->sed = sed;
 2053                 if (xfertype == UE_ISOCHRONOUS) {
sitd = ohci_alloc_sitd(sc);
 2055                         if (sitd == NULL)
 2056                                 goto bad1;
opipe->tail.itd = sitd;
tdphys = sitd->physaddr;
fmt = OHCI_ED_FORMAT_ISO;
 2060                         if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
fmt |= OHCI_ED_DIR_IN;
 2062                         else
fmt |= OHCI_ED_DIR_OUT;
 2064                 } else {
std = ohci_alloc_std(sc);
 2066                         if (std == NULL)
 2067                                 goto bad1;
opipe->tail.td = std;
tdphys = std->physaddr;
fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
 2071                 }
sed->ed.ed_flags = htole32(
OHCI_ED_SET_FA(addr) |
OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
 2075                         (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
fmt | OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
sed->ed.ed_headp = htole32(tdphys |
 2078                     (pipe->endpoint->savedtoggle ? OHCI_TOGGLECARRY : 0));
sed->ed.ed_tailp = htole32(tdphys);
 2081                 switch (xfertype) {
 2082                 case UE_CONTROL:
pipe->methods = &ohci_device_ctrl_methods;
err = usb_allocmem(&sc->sc_bus,
 2085                                   sizeof(usb_device_request_t),
 2086                                   0, &opipe->u.ctl.reqdma);
 2087                         if (err)
 2088                                 goto bad;
s = splusb();
ohci_add_ed(sed, sc->sc_ctrl_head);
splx(s);
 2092                         break;
 2093                 case UE_INTERRUPT:
pipe->methods = &ohci_device_intr_methods;
ival = pipe->interval;
 2096                         if (ival == USBD_DEFAULT_INTERVAL)
ival = ed->bInterval;
 2098                         return (ohci_device_setintr(sc, opipe, ival));
 2099                 case UE_ISOCHRONOUS:
pipe->methods = &ohci_device_isoc_methods;
 2101                         return (ohci_setup_isoc(pipe));
 2102                 case UE_BULK:
pipe->methods = &ohci_device_bulk_methods;
s = splusb();
ohci_add_ed(sed, sc->sc_bulk_head);
splx(s);
 2107                         break;
 2108                 }
 2109         }
 2110         return (USBD_NORMAL_COMPLETION);
bad:
 2113         if (std != NULL)
ohci_free_std(sc, std);
bad1:
 2116         if (sed != NULL)
ohci_free_sed(sc, sed);
bad0:
 2119         return (USBD_NOMEM);
 2121 }
 2123 /*
 2124  * Close a reqular pipe.
 2125  * Assumes that there are no pending transactions.
 2126  */
 2127 void
ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
 2129 {
 2130         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
ohci_soft_ed_t *sed = opipe->sed;
 2133         int s;
s = splusb();
 2136 #ifdef DIAGNOSTIC
sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
 2138         if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
 2139             (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK)) {
ohci_soft_td_t *std;
std = ohci_hash_find_td(sc, letoh32(sed->ed.ed_headp));
printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
 2143                        "tl=0x%x pipe=%p, std=%p\n", sed,
 2144                        (int)letoh32(sed->ed.ed_headp),
 2145                        (int)letoh32(sed->ed.ed_tailp),
pipe, std);
 2147 #ifdef USB_DEBUG
usbd_dump_pipe(&opipe->pipe);
 2149 #endif
 2150 #ifdef OHCI_DEBUG
ohci_dump_ed(sed);
 2152                 if (std)
ohci_dump_td(std);
 2154 #endif
usb_delay_ms(&sc->sc_bus, 2);
 2156                 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
 2157                     (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK))
printf("ohci_close_pipe: pipe still not empty\n");
 2159         }
 2160 #endif
ohci_rem_ed(sed, head);
 2162         /* Make sure the host controller is not touching this ED */
usb_delay_ms(&sc->sc_bus, 1);
splx(s);
pipe->endpoint->savedtoggle =
 2166             (letoh32(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
ohci_free_sed(sc, opipe->sed);
 2168 }
 2170 /*
 2171  * Abort a device request.
 2172  * If this routine is called at splusb() it guarantees that the request
 2173  * will be removed from the hardware scheduling and that the callback
 2174  * for it will be called with USBD_CANCELLED status.
 2175  * It's impossible to guarantee that the requested transfer will not
 2176  * have happened since the hardware runs concurrently.
 2177  * If the transaction has already happened we rely on the ordinary
 2178  * interrupt processing to process it.
 2179  */
 2180 void
ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
 2182 {
 2183         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
ohci_soft_ed_t *sed = opipe->sed;
ohci_soft_td_t *p, *n;
ohci_physaddr_t headp;
 2188         int s, hit;
DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,
sed));
 2193         if (sc->sc_dying) {
 2194                 /* If we're dying, just do the software part. */
s = splusb();
xfer->status = status;  /* make software ignore it */
timeout_del(&xfer->timeout_handle);
usb_transfer_complete(xfer);
splx(s);
 2200                 return;
 2201         }
 2203         if (xfer->device->bus->intr_context || !curproc)
panic("ohci_abort_xfer: not in process context");
 2206         /*
 2207          * Step 1: Make interrupt routine and hardware ignore xfer.
 2208          */
s = splusb();
xfer->status = status;  /* make software ignore it */
timeout_del(&xfer->timeout_handle);
splx(s);
DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
 2216         /*
 2217          * Step 2: Wait until we know hardware has finished any possible
 2218          * use of the xfer.  Also make sure the soft interrupt routine
 2219          * has run.
 2220          */
usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
s = splusb();
 2223 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
sc->sc_softwake = 1;
 2225 #endif /* __HAVE_GENERIC_SOFT_INTERRUPTS */
usb_schedsoftintr(&sc->sc_bus);
 2227 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
tsleep(&sc->sc_softwake, PZERO, "ohciab", 0);
 2229 #endif /* __HAVE_GENERIC_SOFT_INTERRUPTS */
splx(s);
 2232         /*
 2233          * Step 3: Remove any vestiges of the xfer from the hardware.
 2234          * The complication here is that the hardware may have executed
 2235          * beyond the xfer we're trying to abort.  So as we're scanning
 2236          * the TDs of this xfer we check if the hardware points to
 2237          * any of them.
 2238          */
s = splusb();           /* XXX why? */
p = xfer->hcpriv;
 2241 #ifdef DIAGNOSTIC
 2242         if (p == NULL) {
splx(s);
printf("ohci_abort_xfer: hcpriv is NULL\n");
 2245                 return;
 2246         }
 2247 #endif
 2248 #ifdef OHCI_DEBUG
 2249         if (ohcidebug > 1) {
DPRINTF(("ohci_abort_xfer: sed=\n"));
ohci_dump_ed(sed);
ohci_dump_tds(p);
 2253         }
 2254 #endif
headp = letoh32(sed->ed.ed_headp) & OHCI_HEADMASK;
hit = 0;
 2257         for (; p->xfer == xfer; p = n) {
hit |= headp == p->physaddr;
n = p->nexttd;
 2260                 if (OHCI_TD_GET_CC(letoh32(p->td.td_flags)) ==
OHCI_CC_NOT_ACCESSED)
ohci_free_std(sc, p);
 2263         }
 2264         /* Zap headp register if hardware pointed inside the xfer. */
 2265         if (hit) {
DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
 2267                             (int)p->physaddr, (int)letoh32(sed->ed.ed_tailp)));
sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
 2269         } else {
DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
 2271         }
 2273         /*
 2274          * Step 4: Turn on hardware again.
 2275          */
sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
 2278         /*
 2279          * Step 5: Execute callback.
 2280          */
usb_transfer_complete(xfer);
splx(s);
 2284 }
 2286 /*
 2287  * Data structures and routines to emulate the root hub.
 2288  */
usb_device_descriptor_t ohci_devd = {
USB_DEVICE_DESCRIPTOR_SIZE,
UDESC_DEVICE,           /* type */
 2292         {0x00, 0x01},           /* USB version */
UDCLASS_HUB,            /* class */
UDSUBCLASS_HUB,         /* subclass */
UDPROTO_FSHUB,
 2296         64,                     /* max packet */
 2297         {0},{0},{0x00,0x01},    /* device id */
 2298         1,2,0,                  /* string indices */
 2299         1                       /* # of configurations */
 2300 };
usb_config_descriptor_t ohci_confd = {
USB_CONFIG_DESCRIPTOR_SIZE,
UDESC_CONFIG,
 2305         {USB_CONFIG_DESCRIPTOR_SIZE +
USB_INTERFACE_DESCRIPTOR_SIZE +
USB_ENDPOINT_DESCRIPTOR_SIZE},
 2308         1,
 2309         1,
 2310         0,
UC_SELF_POWERED,
 2312         0                       /* max power */
 2313 };
usb_interface_descriptor_t ohci_ifcd = {
USB_INTERFACE_DESCRIPTOR_SIZE,
UDESC_INTERFACE,
 2318         0,
 2319         0,
 2320         1,
UICLASS_HUB,
UISUBCLASS_HUB,
UIPROTO_FSHUB,
 2324         0
 2325 };
usb_endpoint_descriptor_t ohci_endpd = {
USB_ENDPOINT_DESCRIPTOR_SIZE,
UDESC_ENDPOINT,
UE_DIR_IN | OHCI_INTR_ENDPT,
UE_INTERRUPT,
 2332         {8, 0},                 /* max packet */
 2333         255
 2334 };
usb_hub_descriptor_t ohci_hubd = {
USB_HUB_DESCRIPTOR_SIZE,
UDESC_HUB,
 2339         0,
 2340         {0,0},
 2341         0,
 2342         0,
 2343         {0},
 2344 };
 2346 int
ohci_str(usb_string_descriptor_t *p, int l, const char *s)
 2348 {
 2349         int i;
 2351         if (l == 0)
 2352                 return (0);
p->bLength = 2 * strlen(s) + 2;
 2354         if (l == 1)
 2355                 return (1);
p->bDescriptorType = UDESC_STRING;
l -= 2;
 2358         for (i = 0; s[i] && l > 1; i++, l -= 2)
USETW2(p->bString[i], 0, s[i]);
 2360         return (2*i+2);
 2361 }
 2363 /*
 2364  * Simulate a hardware hub by handling all the necessary requests.
 2365  */
usbd_status
ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
 2368 {
usbd_status err;
 2371         /* Insert last in queue. */
err = usb_insert_transfer(xfer);
 2373         if (err)
 2374                 return (err);
 2376         /* Pipe isn't running, start first */
 2377         return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
 2378 }
usbd_status
ohci_root_ctrl_start(usbd_xfer_handle xfer)
 2382 {
ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
usb_device_request_t *req;
 2385         void *buf = NULL;
 2386         int port, i;
 2387         int s, len, value, index, l, totlen = 0;
usb_port_status_t ps;
usb_hub_descriptor_t hubd;
usbd_status err;
u_int32_t v;
 2393         if (sc->sc_dying)
 2394                 return (USBD_IOERROR);
 2396 #ifdef DIAGNOSTIC
 2397         if (!(xfer->rqflags & URQ_REQUEST))
 2398                 /* XXX panic */
 2399                 return (USBD_INVAL);
 2400 #endif
req = &xfer->request;
DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
req->bmRequestType, req->bRequest));
len = UGETW(req->wLength);
value = UGETW(req->wValue);
index = UGETW(req->wIndex);
 2410         if (len != 0)
buf = KERNADDR(&xfer->dmabuf, 0);
 2413 #define C(x,y) ((x) | ((y) << 8))
 2414         switch(C(req->bRequest, req->bmRequestType)) {
 2415         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
 2416         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
 2417         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
 2418                 /*
 2419                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
 2420                  * for the integrated root hub.
 2421                  */
 2422                 break;
 2423         case C(UR_GET_CONFIG, UT_READ_DEVICE):
 2424                 if (len > 0) {
 2425                         *(u_int8_t *)buf = sc->sc_conf;
totlen = 1;
 2427                 }
 2428                 break;
 2429         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
 2431                 switch(value >> 8) {
 2432                 case UDESC_DEVICE:
 2433                         if ((value & 0xff) != 0) {
err = USBD_IOERROR;
 2435                                 goto ret;
 2436                         }
totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
USETW(ohci_devd.idVendor, sc->sc_id_vendor);
memcpy(buf, &ohci_devd, l);
 2440                         break;
 2441                 case UDESC_CONFIG:
 2442                         if ((value & 0xff) != 0) {
err = USBD_IOERROR;
 2444                                 goto ret;
 2445                         }
totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
memcpy(buf, &ohci_confd, l);
buf = (char *)buf + l;
len -= l;
l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
totlen += l;
memcpy(buf, &ohci_ifcd, l);
buf = (char *)buf + l;
len -= l;
l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
totlen += l;
memcpy(buf, &ohci_endpd, l);
 2458                         break;
 2459                 case UDESC_STRING:
 2460                         if (len == 0)
 2461                                 break;
 2462                         *(u_int8_t *)buf = 0;
totlen = 1;
 2464                         switch (value & 0xff) {
 2465                         case 0: /* Language table */
totlen = ohci_str(buf, len, "\001");
 2467                                 break;
 2468                         case 1: /* Vendor */
totlen = ohci_str(buf, len, sc->sc_vendor);
 2470                                 break;
 2471                         case 2: /* Product */
totlen = ohci_str(buf, len, "OHCI root hub");
 2473                                 break;
 2474                         }
 2475                         break;
 2476                 default:
err = USBD_IOERROR;
 2478                         goto ret;
 2479                 }
 2480                 break;
 2481         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
 2482                 if (len > 0) {
 2483                         *(u_int8_t *)buf = 0;
totlen = 1;
 2485                 }
 2486                 break;
 2487         case C(UR_GET_STATUS, UT_READ_DEVICE):
 2488                 if (len > 1) {
USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
totlen = 2;
 2491                 }
 2492                 break;
 2493         case C(UR_GET_STATUS, UT_READ_INTERFACE):
 2494         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
 2495                 if (len > 1) {
USETW(((usb_status_t *)buf)->wStatus, 0);
totlen = 2;
 2498                 }
 2499                 break;
 2500         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
 2501                 if (value >= USB_MAX_DEVICES) {
err = USBD_IOERROR;
 2503                         goto ret;
 2504                 }
sc->sc_addr = value;
 2506                 break;
 2507         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
 2508                 if (value != 0 && value != 1) {
err = USBD_IOERROR;
 2510                         goto ret;
 2511                 }
sc->sc_conf = value;
 2513                 break;
 2514         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
 2515                 break;
 2516         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
 2517         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
 2518         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
err = USBD_IOERROR;
 2520                 goto ret;
 2521         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
 2522                 break;
 2523         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
 2524                 break;
 2525         /* Hub requests */
 2526         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
 2527                 break;
 2528         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
 2530                              "port=%d feature=%d\n",
index, value));
 2532                 if (index < 1 || index > sc->sc_noport) {
err = USBD_IOERROR;
 2534                         goto ret;
 2535                 }
port = OHCI_RH_PORT_STATUS(index);
 2537                 switch(value) {
 2538                 case UHF_PORT_ENABLE:
OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
 2540                         break;
 2541                 case UHF_PORT_SUSPEND:
OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
 2543                         break;
 2544                 case UHF_PORT_POWER:
 2545                         /* Yes, writing to the LOW_SPEED bit clears power. */
OWRITE4(sc, port, UPS_LOW_SPEED);
 2547                         break;
 2548                 case UHF_C_PORT_CONNECTION:
OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
 2550                         break;
 2551                 case UHF_C_PORT_ENABLE:
OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
 2553                         break;
 2554                 case UHF_C_PORT_SUSPEND:
OWRITE4(sc, port, UPS_C_SUSPEND << 16);
 2556                         break;
 2557                 case UHF_C_PORT_OVER_CURRENT:
OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
 2559                         break;
 2560                 case UHF_C_PORT_RESET:
OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
 2562                         break;
 2563                 default:
err = USBD_IOERROR;
 2565                         goto ret;
 2566                 }
 2567                 switch(value) {
 2568                 case UHF_C_PORT_CONNECTION:
 2569                 case UHF_C_PORT_ENABLE:
 2570                 case UHF_C_PORT_SUSPEND:
 2571                 case UHF_C_PORT_OVER_CURRENT:
 2572                 case UHF_C_PORT_RESET:
 2573                         /* Enable RHSC interrupt if condition is cleared. */
 2574                         if ((OREAD4(sc, port) >> 16) == 0)
ohci_rhsc_able(sc, 1);
 2576                         break;
 2577                 default:
 2578                         break;
 2579                 }
 2580                 break;
 2581         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
 2582                 if ((value & 0xff) != 0) {
err = USBD_IOERROR;
 2584                         goto ret;
 2585                 }
v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
hubd = ohci_hubd;
hubd.bNbrPorts = sc->sc_noport;
USETW(hubd.wHubCharacteristics,
 2590                       (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
 2592                       /* XXX overcurrent */
 2593                       );
hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
 2596                 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
hubd.DeviceRemovable[i++] = (u_int8_t)v;
hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
l = min(len, hubd.bDescLength);
totlen = l;
memcpy(buf, &hubd, l);
 2602                 break;
 2603         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
 2604                 if (len != 4) {
err = USBD_IOERROR;
 2606                         goto ret;
 2607                 }
memset(buf, 0, len); /* ? XXX */
totlen = len;
 2610                 break;
 2611         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
index));
 2614                 if (index < 1 || index > sc->sc_noport) {
err = USBD_IOERROR;
 2616                         goto ret;
 2617                 }
 2618                 if (len != 4) {
err = USBD_IOERROR;
 2620                         goto ret;
 2621                 }
v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
v));
USETW(ps.wPortStatus, v);
USETW(ps.wPortChange, v >> 16);
l = min(len, sizeof ps);
memcpy(buf, &ps, l);
totlen = l;
 2630                 break;
 2631         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
err = USBD_IOERROR;
 2633                 goto ret;
 2634         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
 2635                 break;
 2636         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
 2637                 if (index < 1 || index > sc->sc_noport) {
err = USBD_IOERROR;
 2639                         goto ret;
 2640                 }
port = OHCI_RH_PORT_STATUS(index);
 2642                 switch(value) {
 2643                 case UHF_PORT_ENABLE:
OWRITE4(sc, port, UPS_PORT_ENABLED);
 2645                         break;
 2646                 case UHF_PORT_SUSPEND:
OWRITE4(sc, port, UPS_SUSPEND);
 2648                         break;
 2649                 case UHF_PORT_RESET:
DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
index));
OWRITE4(sc, port, UPS_RESET);
 2653                         for (i = 0; i < 5; i++) {
usb_delay_ms(&sc->sc_bus,
USB_PORT_ROOT_RESET_DELAY);
 2656                                 if (sc->sc_dying) {
err = USBD_IOERROR;
 2658                                         goto ret;
 2659                                 }
 2660                                 if ((OREAD4(sc, port) & UPS_RESET) == 0)
 2661                                         break;
 2662                         }
DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
index, OREAD4(sc, port)));
 2665                         break;
 2666                 case UHF_PORT_POWER:
DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
 2668                                     "%d\n", index));
OWRITE4(sc, port, UPS_PORT_POWER);
 2670                         break;
 2671                 default:
err = USBD_IOERROR;
 2673                         goto ret;
 2674                 }
 2675                 break;
 2676         default:
err = USBD_IOERROR;
 2678                 goto ret;
 2679         }
xfer->actlen = totlen;
err = USBD_NORMAL_COMPLETION;
ret:
xfer->status = err;
s = splusb();
usb_transfer_complete(xfer);
splx(s);
 2687         return (USBD_IN_PROGRESS);
 2688 }
 2690 /* Abort a root control request. */
 2691 void
ohci_root_ctrl_abort(usbd_xfer_handle xfer)
 2693 {
 2694         /* Nothing to do, all transfers are synchronous. */
 2695 }
 2697 /* Close the root pipe. */
 2698 void
ohci_root_ctrl_close(usbd_pipe_handle pipe)
 2700 {
DPRINTF(("ohci_root_ctrl_close\n"));
 2702         /* Nothing to do. */
 2703 }
usbd_status
ohci_root_intr_transfer(usbd_xfer_handle xfer)
 2707 {
usbd_status err;
 2710         /* Insert last in queue. */
err = usb_insert_transfer(xfer);
 2712         if (err)
 2713                 return (err);
 2715         /* Pipe isn't running, start first */
 2716         return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
 2717 }
usbd_status
ohci_root_intr_start(usbd_xfer_handle xfer)
 2721 {
usbd_pipe_handle pipe = xfer->pipe;
ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
 2725         if (sc->sc_dying)
 2726                 return (USBD_IOERROR);
sc->sc_intrxfer = xfer;
 2730         return (USBD_IN_PROGRESS);
 2731 }
 2733 /* Abort a root interrupt request. */
 2734 void
ohci_root_intr_abort(usbd_xfer_handle xfer)
 2736 {
 2737         int s;
 2739         if (xfer->pipe->intrxfer == xfer) {
DPRINTF(("ohci_root_intr_abort: remove\n"));
xfer->pipe->intrxfer = NULL;
 2742         }
xfer->status = USBD_CANCELLED;
s = splusb();
usb_transfer_complete(xfer);
splx(s);
 2747 }
 2749 /* Close the root pipe. */
 2750 void
ohci_root_intr_close(usbd_pipe_handle pipe)
 2752 {
ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
DPRINTF(("ohci_root_intr_close\n"));
sc->sc_intrxfer = NULL;
 2758 }
 2760 /************************/
usbd_status
ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
 2764 {
usbd_status err;
 2767         /* Insert last in queue. */
err = usb_insert_transfer(xfer);
 2769         if (err)
 2770                 return (err);
 2772         /* Pipe isn't running, start first */
 2773         return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
 2774 }
usbd_status
ohci_device_ctrl_start(usbd_xfer_handle xfer)
 2778 {
ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
usbd_status err;
 2782         if (sc->sc_dying)
 2783                 return (USBD_IOERROR);
 2785 #ifdef DIAGNOSTIC
 2786         if (!(xfer->rqflags & URQ_REQUEST)) {
 2787                 /* XXX panic */
printf("ohci_device_ctrl_transfer: not a request\n");
 2789                 return (USBD_INVAL);
 2790         }
 2791 #endif
err = ohci_device_request(xfer);
 2794         if (err)
 2795                 return (err);
 2797         if (sc->sc_bus.use_polling)
ohci_waitintr(sc, xfer);
 2800         return (USBD_IN_PROGRESS);
 2801 }
 2803 /* Abort a device control request. */
 2804 void
ohci_device_ctrl_abort(usbd_xfer_handle xfer)
 2806 {
DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
ohci_abort_xfer(xfer, USBD_CANCELLED);
 2809 }
 2811 /* Close a device control pipe. */
 2812 void
ohci_device_ctrl_close(usbd_pipe_handle pipe)
 2814 {
 2815         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
ohci_close_pipe(pipe, sc->sc_ctrl_head);
ohci_free_std(sc, opipe->tail.td);
 2821 }
 2823 /************************/
 2825 void
ohci_device_clear_toggle(usbd_pipe_handle pipe)
 2827 {
 2828         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
 2831 }
 2833 void
ohci_noop(usbd_pipe_handle pipe)
 2835 {
 2836 }
usbd_status
ohci_device_bulk_transfer(usbd_xfer_handle xfer)
 2840 {
usbd_status err;
 2843         /* Insert last in queue. */
err = usb_insert_transfer(xfer);
 2845         if (err)
 2846                 return (err);
 2848         /* Pipe isn't running, start first */
 2849         return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
 2850 }
usbd_status
ohci_device_bulk_start(usbd_xfer_handle xfer)
 2854 {
 2855         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
usbd_device_handle dev = opipe->pipe.device;
ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
 2858         int addr = dev->address;
ohci_soft_td_t *data, *tail, *tdp;
ohci_soft_ed_t *sed;
 2861         int s, len, isread, endpt;
usbd_status err;
 2864         if (sc->sc_dying)
 2865                 return (USBD_IOERROR);
 2867 #ifdef DIAGNOSTIC
 2868         if (xfer->rqflags & URQ_REQUEST) {
 2869                 /* XXX panic */
printf("ohci_device_bulk_start: a request\n");
 2871                 return (USBD_INVAL);
 2872         }
 2873 #endif
len = xfer->length;
endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
isread = UE_GET_DIR(endpt) == UE_DIR_IN;
sed = opipe->sed;
DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
 2881                     "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
endpt));
opipe->u.bulk.isread = isread;
opipe->u.bulk.length = len;
 2887         /* Update device address */
sed->ed.ed_flags = htole32(
 2889                 (letoh32(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
OHCI_ED_SET_FA(addr));
 2892         /* Allocate a chain of new TDs (including a new tail). */
data = opipe->tail.td;
err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
data, &tail);
 2896         /* We want interrupt at the end of the transfer. */
tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
tail->flags |= OHCI_CALL_DONE;
tail = tail->nexttd;    /* point at sentinel */
 2901         if (err)
 2902                 return (err);
tail->xfer = NULL;
xfer->hcpriv = data;
DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
 2908                     "td_cbp=0x%08x td_be=0x%08x\n",
 2909                     (int)letoh32(sed->ed.ed_flags),
 2910                     (int)letoh32(data->td.td_flags),
 2911                     (int)letoh32(data->td.td_cbp),
 2912                     (int)letoh32(data->td.td_be)));
 2914 #ifdef OHCI_DEBUG
 2915         if (ohcidebug > 5) {
ohci_dump_ed(sed);
ohci_dump_tds(data);
 2918         }
 2919 #endif
 2921         /* Insert ED in schedule */
s = splusb();
 2923         for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
tdp->xfer = xfer;
 2925         }
sed->ed.ed_tailp = htole32(tail->physaddr);
opipe->tail.td = tail;
sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
 2930         if (xfer->timeout && !sc->sc_bus.use_polling) {
timeout_del(&xfer->timeout_handle);
timeout_set(&xfer->timeout_handle, ohci_timeout, xfer);
timeout_add(&xfer->timeout_handle, mstohz(xfer->timeout));
 2934         }
 2936 #if 0
 2937 /* This goes wrong if we are too slow. */
 2938         if (ohcidebug > 10) {
delay(10000);
DPRINTF(("ohci_device_intr_transfer: status=%x\n",
OREAD4(sc, OHCI_COMMAND_STATUS)));
ohci_dump_ed(sed);
ohci_dump_tds(data);
 2944         }
 2945 #endif
splx(s);
 2949         if (sc->sc_bus.use_polling)
ohci_waitintr(sc, xfer);
 2952         return (USBD_IN_PROGRESS);
 2953 }
 2955 void
ohci_device_bulk_abort(usbd_xfer_handle xfer)
 2957 {
DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
ohci_abort_xfer(xfer, USBD_CANCELLED);
 2960 }
 2962 /*
 2963  * Close a device bulk pipe.
 2964  */
 2965 void
ohci_device_bulk_close(usbd_pipe_handle pipe)
 2967 {
 2968         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
ohci_close_pipe(pipe, sc->sc_bulk_head);
ohci_free_std(sc, opipe->tail.td);
 2974 }
 2976 /************************/
usbd_status
ohci_device_intr_transfer(usbd_xfer_handle xfer)
 2980 {
usbd_status err;
 2983         /* Insert last in queue. */
err = usb_insert_transfer(xfer);
 2985         if (err)
 2986                 return (err);
 2988         /* Pipe isn't running, start first */
 2989         return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
 2990 }
usbd_status
ohci_device_intr_start(usbd_xfer_handle xfer)
 2994 {
 2995         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
usbd_device_handle dev = opipe->pipe.device;
ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
ohci_soft_ed_t *sed = opipe->sed;
ohci_soft_td_t *data, *tail;
 3000         int s, len, isread, endpt;
 3002         if (sc->sc_dying)
 3003                 return (USBD_IOERROR);
DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
 3006                      "flags=%d priv=%p\n",
xfer, xfer->length, xfer->flags, xfer->priv));
 3009 #ifdef DIAGNOSTIC
 3010         if (xfer->rqflags & URQ_REQUEST)
panic("ohci_device_intr_transfer: a request");
 3012 #endif
len = xfer->length;
endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
isread = UE_GET_DIR(endpt) == UE_DIR_IN;
data = opipe->tail.td;
tail = ohci_alloc_std(sc);
 3020         if (tail == NULL)
 3021                 return (USBD_NOMEM);
tail->xfer = NULL;
data->td.td_flags = htole32(
isread ? OHCI_TD_IN : OHCI_TD_OUT |
OHCI_TD_NOCC |
OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
 3028         if (xfer->flags & USBD_SHORT_XFER_OK)
data->td.td_flags |= htole32(OHCI_TD_R);
data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
data->nexttd = tail;
data->td.td_nexttd = htole32(tail->physaddr);
data->td.td_be = htole32(letoh32(data->td.td_cbp) + len - 1);
data->len = len;
data->xfer = xfer;
data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
xfer->hcpriv = data;
 3039 #ifdef OHCI_DEBUG
 3040         if (ohcidebug > 5) {
DPRINTF(("ohci_device_intr_transfer:\n"));
ohci_dump_ed(sed);
ohci_dump_tds(data);
 3044         }
 3045 #endif
 3047         /* Insert ED in schedule */
s = splusb();
sed->ed.ed_tailp = htole32(tail->physaddr);
opipe->tail.td = tail;
sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
 3053 #if 0
 3054 /*
 3055  * This goes horribly wrong, printing thousands of descriptors,
 3056  * because false references are followed due to the fact that the
 3057  * TD is gone.
 3058  */
 3059         if (ohcidebug > 5) {
usb_delay_ms(&sc->sc_bus, 5);
DPRINTF(("ohci_device_intr_transfer: status=%x\n",
OREAD4(sc, OHCI_COMMAND_STATUS)));
ohci_dump_ed(sed);
ohci_dump_tds(data);
 3065         }
 3066 #endif
splx(s);
 3069         return (USBD_IN_PROGRESS);
 3070 }
 3072 /* Abort a device control request. */
 3073 void
ohci_device_intr_abort(usbd_xfer_handle xfer)
 3075 {
 3076         if (xfer->pipe->intrxfer == xfer) {
DPRINTF(("ohci_device_intr_abort: remove\n"));
xfer->pipe->intrxfer = NULL;
 3079         }
ohci_abort_xfer(xfer, USBD_CANCELLED);
 3081 }
 3083 /* Close a device interrupt pipe. */
 3084 void
ohci_device_intr_close(usbd_pipe_handle pipe)
 3086 {
 3087         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
 3089         int nslots = opipe->u.intr.nslots;
 3090         int pos = opipe->u.intr.pos;
 3091         int j;
ohci_soft_ed_t *p, *sed = opipe->sed;
 3093         int s;
DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
pipe, nslots, pos));
s = splusb();
sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
 3099         if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
 3100             (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK))
usb_delay_ms(&sc->sc_bus, 2);
 3103         for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
 3104                 ;
 3105 #ifdef DIAGNOSTIC
 3106         if (p == NULL)
panic("ohci_device_intr_close: ED not found");
 3108 #endif
p->next = sed->next;
p->ed.ed_nexted = sed->ed.ed_nexted;
splx(s);
 3113         for (j = 0; j < nslots; j++)
 3114                 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
ohci_free_std(sc, opipe->tail.td);
ohci_free_sed(sc, opipe->sed);
 3118 }
usbd_status
ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
 3122 {
 3123         int i, j, s, best;
u_int npoll, slow, shigh, nslots;
u_int bestbw, bw;
ohci_soft_ed_t *hsed, *sed = opipe->sed;
DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
 3129         if (ival == 0) {
printf("ohci_setintr: 0 interval\n");
 3131                 return (USBD_INVAL);
 3132         }
npoll = OHCI_NO_INTRS;
 3135         while (npoll > ival)
npoll /= 2;
DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
 3139         /*
 3140          * We now know which level in the tree the ED must go into.
 3141          * Figure out which slot has most bandwidth left over.
 3142          * Slots to examine:
 3143          * npoll
 3144          * 1    0
 3145          * 2    1 2
 3146          * 4    3 4 5 6
 3147          * 8    7 8 9 10 11 12 13 14
 3148          * N    (N-1) .. (N-1+N-1)
 3149          */
slow = npoll-1;
shigh = slow + npoll;
nslots = OHCI_NO_INTRS / npoll;
 3153         for (best = i = slow, bestbw = ~0; i < shigh; i++) {
bw = 0;
 3155                 for (j = 0; j < nslots; j++)
bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
 3157                 if (bw < bestbw) {
best = i;
bestbw = bw;
 3160                 }
 3161         }
DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
best, slow, shigh, bestbw));
s = splusb();
hsed = sc->sc_eds[best];
sed->next = hsed->next;
sed->ed.ed_nexted = hsed->ed.ed_nexted;
hsed->next = sed;
hsed->ed.ed_nexted = htole32(sed->physaddr);
splx(s);
 3173         for (j = 0; j < nslots; j++)
 3174                 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
opipe->u.intr.nslots = nslots;
opipe->u.intr.pos = best;
DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
 3179         return (USBD_NORMAL_COMPLETION);
 3180 }
 3182 /***********************/
usbd_status
ohci_device_isoc_transfer(usbd_xfer_handle xfer)
 3186 {
usbd_status err;
DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
 3191         /* Put it on our queue, */
err = usb_insert_transfer(xfer);
 3194         /* bail out on error, */
 3195         if (err && err != USBD_IN_PROGRESS)
 3196                 return (err);
 3198         /* XXX should check inuse here */
 3200         /* insert into schedule, */
ohci_device_isoc_enter(xfer);
 3203         /* and start if the pipe wasn't running */
 3204         if (!err)
ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
 3207         return (err);
 3208 }
 3210 void
ohci_device_isoc_enter(usbd_xfer_handle xfer)
 3212 {
 3213         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
usbd_device_handle dev = opipe->pipe.device;
ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
ohci_soft_ed_t *sed = opipe->sed;
 3217         struct iso *iso = &opipe->u.iso;
ohci_soft_itd_t *sitd, *nsitd;
ohci_physaddr_t buf, offs, noffs, bp0;
 3220         int i, ncur, nframes;
 3221         int s;
DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
 3224                     "nframes=%d\n",
iso->inuse, iso->next, xfer, xfer->nframes));
 3227         if (sc->sc_dying)
 3228                 return;
 3230         if (iso->next == -1) {
 3231                 /* Not in use yet, schedule it a few frames ahead. */
iso->next = letoh32(sc->sc_hcca->hcca_frame_number) + 5;
DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
iso->next));
 3235         }
sitd = opipe->tail.itd;
buf = DMAADDR(&xfer->dmabuf, 0);
bp0 = OHCI_PAGE(buf);
offs = OHCI_PAGE_OFFSET(buf);
nframes = xfer->nframes;
xfer->hcpriv = sitd;
 3243         for (i = ncur = 0; i < nframes; i++, ncur++) {
noffs = offs + xfer->frlengths[i];
 3245                 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
 3248                         /* Allocate next ITD */
nsitd = ohci_alloc_sitd(sc);
 3250                         if (nsitd == NULL) {
 3251                                 /* XXX what now? */
printf("%s: isoc TD alloc failed\n",
sc->sc_bus.bdev.dv_xname);
 3254                                 return;
 3255                         }
 3257                         /* Fill current ITD */
sitd->itd.itd_flags = htole32(
OHCI_ITD_NOCC |
OHCI_ITD_SET_SF(iso->next) |
OHCI_ITD_SET_DI(6) | /* delay intr a little */
OHCI_ITD_SET_FC(ncur));
sitd->itd.itd_bp0 = htole32(bp0);
sitd->nextitd = nsitd;
sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
sitd->itd.itd_be = htole32(bp0 + offs - 1);
sitd->xfer = xfer;
sitd->flags = 0;
sitd = nsitd;
iso->next = iso->next + ncur;
bp0 = OHCI_PAGE(buf + offs);
ncur = 0;
 3274                 }
sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
offs = noffs;
 3277         }
nsitd = ohci_alloc_sitd(sc);
 3279         if (nsitd == NULL) {
 3280                 /* XXX what now? */
printf("%s: isoc TD alloc failed\n",
sc->sc_bus.bdev.dv_xname);
 3283                 return;
 3284         }
 3285         /* Fixup last used ITD */
sitd->itd.itd_flags = htole32(
OHCI_ITD_NOCC |
OHCI_ITD_SET_SF(iso->next) |
OHCI_ITD_SET_DI(0) |
OHCI_ITD_SET_FC(ncur));
sitd->itd.itd_bp0 = htole32(bp0);
sitd->nextitd = nsitd;
sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
sitd->itd.itd_be = htole32(bp0 + offs - 1);
sitd->xfer = xfer;
sitd->flags = OHCI_CALL_DONE;
iso->next = iso->next + ncur;
iso->inuse += nframes;
xfer->actlen = offs;    /* XXX pretend we did it all */
xfer->status = USBD_IN_PROGRESS;
 3305 #ifdef OHCI_DEBUG
 3306         if (ohcidebug > 5) {
DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
letoh32(sc->sc_hcca->hcca_frame_number)));
ohci_dump_itds(xfer->hcpriv);
ohci_dump_ed(sed);
 3311         }
 3312 #endif
s = splusb();
sed->ed.ed_tailp = htole32(nsitd->physaddr);
opipe->tail.itd = nsitd;
sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
splx(s);
 3320 #ifdef OHCI_DEBUG
 3321         if (ohcidebug > 5) {
delay(150000);
DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
letoh32(sc->sc_hcca->hcca_frame_number)));
ohci_dump_itds(xfer->hcpriv);
ohci_dump_ed(sed);
 3327         }
 3328 #endif
 3329 }
usbd_status
ohci_device_isoc_start(usbd_xfer_handle xfer)
 3333 {
 3334         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
 3339         if (sc->sc_dying)
 3340                 return (USBD_IOERROR);
 3342 #ifdef DIAGNOSTIC
 3343         if (xfer->status != USBD_IN_PROGRESS)
printf("ohci_device_isoc_start: not in progress %p\n", xfer);
 3345 #endif
 3347         /* XXX anything to do? */
 3349         return (USBD_IN_PROGRESS);
 3350 }
 3352 void
ohci_device_isoc_abort(usbd_xfer_handle xfer)
 3354 {
 3355         struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
ohci_soft_ed_t *sed;
ohci_soft_itd_t *sitd;
 3359         int s;
s = splusb();
DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
 3365         /* Transfer is already done. */
 3366         if (xfer->status != USBD_NOT_STARTED &&
xfer->status != USBD_IN_PROGRESS) {
splx(s);
printf("ohci_device_isoc_abort: early return\n");
 3370                 return;
 3371         }
 3373         /* Give xfer the requested abort code. */
xfer->status = USBD_CANCELLED;
sed = opipe->sed;
sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
sitd = xfer->hcpriv;
 3380 #ifdef DIAGNOSTIC
 3381         if (sitd == NULL) {
splx(s);
printf("ohci_device_isoc_abort: hcpriv==0\n");
 3384                 return;
 3385         }
 3386 #endif
 3387         for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
 3388 #ifdef DIAGNOSTIC
DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
sitd->isdone = 1;
 3391 #endif
 3392         }
splx(s);
usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
s = splusb();
 3400         /* Run callback. */
usb_transfer_complete(xfer);
sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */
sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
splx(s);
 3407 }
 3409 void
ohci_device_isoc_done(usbd_xfer_handle xfer)
 3411 {
DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
 3413 }
usbd_status
ohci_setup_isoc(usbd_pipe_handle pipe)
 3417 {
 3418         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
 3420         struct iso *iso = &opipe->u.iso;
 3421         int s;
iso->next = -1;
iso->inuse = 0;
s = splusb();
ohci_add_ed(opipe->sed, sc->sc_isoc_head);
splx(s);
 3430         return (USBD_NORMAL_COMPLETION);
 3431 }
 3433 void
ohci_device_isoc_close(usbd_pipe_handle pipe)
 3435 {
 3436         struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
ohci_close_pipe(pipe, sc->sc_isoc_head);
 3441 #ifdef DIAGNOSTIC
opipe->tail.itd->isdone = 1;
 3443 #endif
ohci_free_sitd(sc, opipe->tail.itd);
 3445 }