root/dev/pci/ichwdt.c

DEFINITIONS

1. ichwdt_unlock_write
2. ichwdt_match
3. ichwdt_attach
4. ichwdt_cb

    1 /*      $OpenBSD: ichwdt.c,v 1.2 2005/12/17 21:05:50 grange Exp $       */
    3 /*
    4  * Copyright (c) 2004, 2005 Alexander Yurchenko <grange@openbsd.org>
    5  *
    6  * Permission to use, copy, modify, and distribute this software for any
    7  * purpose with or without fee is hereby granted, provided that the above
    8  * copyright notice and this permission notice appear in all copies.
    9  *
   10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
   12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
   13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
   14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
   15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
   16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
   17  */
   19 /*
   20  * Intel 6300ESB ICH watchdog timer driver.
   21  */
   23 #include <sys/param.h>
   24 #include <sys/systm.h>
   25 #include <sys/device.h>
   27 #include <machine/bus.h>
   29 #include <dev/pci/pcireg.h>
   30 #include <dev/pci/pcivar.h>
   31 #include <dev/pci/pcidevs.h>
   33 #include <dev/pci/ichreg.h>
   35 #ifdef ICHWDT_DEBUG
   36 #define DPRINTF(x) printf x
   37 #else
   38 #define DPRINTF(x)
   39 #endif
   41 struct ichwdt_softc {
   42         struct device sc_dev;
pci_chipset_tag_t sc_pc;
pcitag_t sc_tag;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
   50         int sc_divisor;
   51         int sc_period;
   52 };
   54 int     ichwdt_match(struct device *, void *, void *);
   55 void    ichwdt_attach(struct device *, struct device *, void *);
   57 int     ichwdt_cb(void *, int);
   59 struct cfattach ichwdt_ca = {
   60         sizeof(struct ichwdt_softc),
ichwdt_match,
ichwdt_attach
   63 };
   65 struct cfdriver ichwdt_cd = {
NULL, "ichwdt", DV_DULL
   67 };
   69 const struct pci_matchid ichwdt_devices[] = {
   70         { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_WDT }
   71 };
   73 static __inline void
ichwdt_unlock_write(struct ichwdt_softc *sc, int reg, u_int32_t val)
   75 {
   76         /* Register unlocking sequence */
bus_space_write_4(sc->sc_iot, sc->sc_ioh, ICH_WDT_RELOAD, 0x80);
bus_space_write_4(sc->sc_iot, sc->sc_ioh, ICH_WDT_RELOAD, 0x86);
   80         /* Now it's possible to write to the register */
bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, val);
   82 }
   84 int
ichwdt_match(struct device *parent, void *match, void *aux)
   86 {
   87         return (pci_matchbyid((struct pci_attach_args *)aux, ichwdt_devices,
   88             sizeof(ichwdt_devices) / sizeof(ichwdt_devices[0])));
   89 }
   91 void
ichwdt_attach(struct device *parent, struct device *self, void *aux)
   93 {
   94         struct ichwdt_softc *sc = (struct ichwdt_softc *)self;
   95         struct pci_attach_args *pa = aux;
u_int32_t reg;
sc->sc_pc = pa->pa_pc;
sc->sc_tag = pa->pa_tag;
  101         /* Map memory space */
sc->sc_iot = pa->pa_iot;
  103         if (pci_mapreg_map(pa, ICH_WDT_BASE, PCI_MAPREG_TYPE_MEM, 0,
  104             &sc->sc_iot, &sc->sc_ioh, NULL, NULL, 0)) {
printf(": failed to map memory space\n");
  106                 return;
  107         }
  109         /* Read current configuration */
reg = pci_conf_read(sc->sc_pc, sc->sc_tag, ICH_WDT_CONF);
DPRINTF((": conf 0x%x", reg));
  113         /* Get clock divisor */
sc->sc_divisor = (reg & ICH_WDT_CONF_PRE ? 32 : 32768);
printf(": %s clock", (reg & ICH_WDT_CONF_PRE ? "1MHz" : "1kHz"));
  117         /* Disable interrupts since we don't use first stage timeout alarm */
reg &= ~ICH_WDT_CONF_INT_MASK;
reg |= ICH_WDT_CONF_INT_DIS;
pci_conf_write(sc->sc_pc, sc->sc_tag, ICH_WDT_CONF, reg);
  122         /* Check for reboot on timeout */
reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, ICH_WDT_RELOAD);
  124         if (reg & ICH_WDT_RELOAD_TIMEOUT) {
printf(": reboot on timeout");
  127                 /* Clear timeout bit */
ichwdt_unlock_write(sc, ICH_WDT_RELOAD,
ICH_WDT_RELOAD_TIMEOUT);
  130         }
  132         /* Disable watchdog */
pci_conf_write(sc->sc_pc, sc->sc_tag, ICH_WDT_LOCK, 0);
sc->sc_period = 0;
printf("\n");
  138         /* Register new watchdog */
wdog_register(sc, ichwdt_cb);
  140 }
  142 int
ichwdt_cb(void *arg, int period)
  144 {
  145         struct ichwdt_softc *sc = arg;
  146         int ticks;
  148         if (period == 0) {
  149                 if (sc->sc_period != 0) {
  150                         /* Disable watchdog */
ichwdt_unlock_write(sc, ICH_WDT_RELOAD,
ICH_WDT_RELOAD_RLD);
pci_conf_write(sc->sc_pc, sc->sc_tag, ICH_WDT_LOCK, 0);
DPRINTF(("%s: disabled, conf 0x%x\n",
sc->sc_dev.dv_xname,
pci_conf_read(sc->sc_pc, sc->sc_tag,
ICH_WDT_LOCK)));
  158                 }
  159         } else {
  160                 /* 1000s should be enough for everyone */
  161                 if (period > 1000)
period = 1000;
  164                 if (sc->sc_period != period) {
  165                         /* Set new timeout */
ticks = (period * 33000000) / sc->sc_divisor;
ichwdt_unlock_write(sc, ICH_WDT_PRE1, ticks);
ichwdt_unlock_write(sc, ICH_WDT_PRE2, 2);
DPRINTF(("%s: timeout %ds (%d ticks)\n",
sc->sc_dev.dv_xname, period, ticks));
  171                 }
  172                 if (sc->sc_period == 0) {
  173                         /* Enable watchdog */
pci_conf_write(sc->sc_pc, sc->sc_tag, ICH_WDT_LOCK,
ICH_WDT_LOCK_ENABLED);
DPRINTF(("%s: enabled, conf 0x%x\n",
sc->sc_dev.dv_xname,
pci_conf_read(sc->sc_pc, sc->sc_tag,
ICH_WDT_LOCK)));
  180                 } else {
  181                         /* Reset timer */
ichwdt_unlock_write(sc, ICH_WDT_RELOAD,
ICH_WDT_RELOAD_RLD);
DPRINTF(("%s: reloaded\n", sc->sc_dev.dv_xname));
  185                 }
  186         }
sc->sc_period = period;
  189         return (period);
  190 }