root/dev/pci/pci.c

DEFINITIONS

1. pcimatch
2. pciattach
3. pcipower
4. pciprint
5. pcisubmatch
6. pci_probe_device
7. pci_get_capability
8. pci_find_device
9. pci_enumerate_bus
10. pci_matchbyid
11. pciopen
12. pciclose
13. pciioctl

    1 /*      $OpenBSD: pci.c,v 1.50 2007/05/21 22:10:45 kettenis Exp $       */
    2 /*      $NetBSD: pci.c,v 1.31 1997/06/06 23:48:04 thorpej Exp $ */
    4 /*
    5  * Copyright (c) 1995, 1996 Christopher G. Demetriou.  All rights reserved.
    6  * Copyright (c) 1994 Charles Hannum.  All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 3. All advertising materials mentioning features or use of this software
   17  *    must display the following acknowledgement:
   18  *      This product includes software developed by Charles Hannum.
   19  * 4. The name of the author may not be used to endorse or promote products
   20  *    derived from this software without specific prior written permission.
   21  *
   22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   32  */
   34 /*
   35  * PCI bus autoconfiguration.
   36  */
   38 #include <sys/param.h>
   39 #include <sys/systm.h>
   40 #include <sys/device.h>
   41 #include <sys/malloc.h>
   43 #include <dev/pci/pcireg.h>
   44 #include <dev/pci/pcivar.h>
   45 #include <dev/pci/pcidevs.h>
   47 int pcimatch(struct device *, void *, void *);
   48 void pciattach(struct device *, struct device *, void *);
   49 void pcipower(int, void *);
   51 #define NMAPREG                 ((PCI_MAPREG_END - PCI_MAPREG_START) / \
   52                                     sizeof(pcireg_t))
   53 struct pci_dev {
LIST_ENTRY(pci_dev) pd_next;
   55         struct device *pd_dev;
pcitag_t pd_tag;        /* pci register tag */
pcireg_t pd_csr;
pcireg_t pd_bhlc;
pcireg_t pd_int;
pcireg_t pd_map[NMAPREG];
   61 };
   63 #ifdef APERTURE
   64 extern int allowaperture;
   65 #endif
   67 struct cfattach pci_ca = {
   68         sizeof(struct pci_softc), pcimatch, pciattach
   69 };
   71 struct cfdriver pci_cd = {
NULL, "pci", DV_DULL
   73 };
   75 int     pci_ndomains;
   77 int     pciprint(void *, const char *);
   78 int     pcisubmatch(struct device *, void *, void *);
   80 #ifdef PCI_MACHDEP_ENUMERATE_BUS
   81 #define pci_enumerate_bus PCI_MACHDEP_ENUMERATE_BUS
   82 #else
   83 int pci_enumerate_bus(struct pci_softc *,
   84     int (*)(struct pci_attach_args *), struct pci_attach_args *);
   85 #endif
   87 /*
   88  * Important note about PCI-ISA bridges:
   89  *
   90  * Callbacks are used to configure these devices so that ISA/EISA bridges
   91  * can attach their child busses after PCI configuration is done.
   92  *
   93  * This works because:
   94  *      (1) there can be at most one ISA/EISA bridge per PCI bus, and
   95  *      (2) any ISA/EISA bridges must be attached to primary PCI
   96  *          busses (i.e. bus zero).
   97  *
   98  * That boils down to: there can only be one of these outstanding
   99  * at a time, it is cleared when configuring PCI bus 0 before any
  100  * subdevices have been found, and it is run after all subdevices
  101  * of PCI bus 0 have been found.
  102  *
  103  * This is needed because there are some (legacy) PCI devices which
  104  * can show up as ISA/EISA devices as well (the prime example of which
  105  * are VGA controllers).  If you attach ISA from a PCI-ISA/EISA bridge,
  106  * and the bridge is seen before the video board is, the board can show
  107  * up as an ISA device, and that can (bogusly) complicate the PCI device's
  108  * attach code, or make the PCI device not be properly attached at all.
  109  *
  110  * We use the generic config_defer() facility to achieve this.
  111  */
  113 int
pcimatch(struct device *parent, void *match, void *aux)
  115 {
  116         struct cfdata *cf = match;
  117         struct pcibus_attach_args *pba = aux;
  119         if (strcmp(pba->pba_busname, cf->cf_driver->cd_name))
  120                 return (0);
  122         /* Check the locators */
  123         if (cf->pcibuscf_bus != PCIBUS_UNK_BUS &&
cf->pcibuscf_bus != pba->pba_bus)
  125                 return (0);
  127         /* sanity */
  128         if (pba->pba_bus < 0 || pba->pba_bus > 255)
  129                 return (0);
  131         /*
  132          * XXX check other (hardware?) indicators
  133          */
  135         return (1);
  136 }
  138 void
pciattach(struct device *parent, struct device *self, void *aux)
  140 {
  141         struct pcibus_attach_args *pba = aux;
  142         struct pci_softc *sc = (struct pci_softc *)self;
pci_attach_hook(parent, self, pba);
printf("\n");
LIST_INIT(&sc->sc_devs);
sc->sc_powerhook = powerhook_establish(pcipower, sc);
sc->sc_iot = pba->pba_iot;
sc->sc_memt = pba->pba_memt;
sc->sc_dmat = pba->pba_dmat;
sc->sc_pc = pba->pba_pc;
sc->sc_domain = pba->pba_domain;
sc->sc_bus = pba->pba_bus;
sc->sc_bridgetag = pba->pba_bridgetag;
sc->sc_bridgeih = pba->pba_bridgeih;
sc->sc_maxndevs = pci_bus_maxdevs(pba->pba_pc, pba->pba_bus);
sc->sc_intrswiz = pba->pba_intrswiz;
sc->sc_intrtag = pba->pba_intrtag;
pci_enumerate_bus(sc, NULL, NULL);
  163 }
  165 /* save and restore the pci config space */
  166 void
pcipower(int why, void *arg)
  168 {
  169         struct pci_softc *sc = (struct pci_softc *)arg;
  170         struct pci_dev *pd;
pcireg_t reg;
  172         int i;
LIST_FOREACH(pd, &sc->sc_devs, pd_next) {
  175                 if (why != PWR_RESUME) {
  176                         for (i = 0; i < NMAPREG; i++)
pd->pd_map[i] = pci_conf_read(sc->sc_pc,
pd->pd_tag, PCI_MAPREG_START + (i * 4));
pd->pd_csr = pci_conf_read(sc->sc_pc, pd->pd_tag,
PCI_COMMAND_STATUS_REG);
pd->pd_bhlc = pci_conf_read(sc->sc_pc, pd->pd_tag,
PCI_BHLC_REG);
pd->pd_int = pci_conf_read(sc->sc_pc, pd->pd_tag,
PCI_INTERRUPT_REG);
  185                 } else {
  186                         for (i = 0; i < NMAPREG; i++)
pci_conf_write(sc->sc_pc, pd->pd_tag,
PCI_MAPREG_START + (i * 4),
pd->pd_map[i]);
reg = pci_conf_read(sc->sc_pc, pd->pd_tag,
PCI_COMMAND_STATUS_REG);
pci_conf_write(sc->sc_pc, pd->pd_tag,
PCI_COMMAND_STATUS_REG,
  194                             (reg & 0xffff0000) | (pd->pd_csr & 0x0000ffff));
pci_conf_write(sc->sc_pc, pd->pd_tag, PCI_BHLC_REG,
pd->pd_bhlc);
pci_conf_write(sc->sc_pc, pd->pd_tag, PCI_INTERRUPT_REG,
pd->pd_int);
  199                 }
  200         }
  201 }
  203 int
pciprint(void *aux, const char *pnp)
  205 {
  206         struct pci_attach_args *pa = aux;
  207         char devinfo[256];
  209         if (pnp) {
pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo,
  211                     sizeof devinfo);
printf("%s at %s", devinfo, pnp);
  213         }
printf(" dev %d function %d", pa->pa_device, pa->pa_function);
  215         if (!pnp) {
pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo,
  217                     sizeof devinfo);
printf(" %s", devinfo);
  219         }
  221         return (UNCONF);
  222 }
  224 int
pcisubmatch(struct device *parent, void *match,  void *aux)
  226 {
  227         struct cfdata *cf = match;
  228         struct pci_attach_args *pa = aux;
  230         if (cf->pcicf_dev != PCI_UNK_DEV &&
cf->pcicf_dev != pa->pa_device)
  232                 return (0);
  233         if (cf->pcicf_function != PCI_UNK_FUNCTION &&
cf->pcicf_function != pa->pa_function)
  235                 return (0);
  237         return ((*cf->cf_attach->ca_match)(parent, match, aux));
  238 }
  240 int
pci_probe_device(struct pci_softc *sc, pcitag_t tag,
  242     int (*match)(struct pci_attach_args *), struct pci_attach_args *pap)
  243 {
pci_chipset_tag_t pc = sc->sc_pc;
  245         struct pci_attach_args pa;
  246         struct pci_dev *pd;
  247         struct device *dev;
pcireg_t id, csr, class, intr, bhlcr;
  249         int ret, pin, bus, device, function;
pci_decompose_tag(pc, tag, &bus, &device, &function);
bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
  254         if (PCI_HDRTYPE_TYPE(bhlcr) > 2)
  255                 return (0);
id = pci_conf_read(pc, tag, PCI_ID_REG);
csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
class = pci_conf_read(pc, tag, PCI_CLASS_REG);
  261         /* Invalid vendor ID value? */
  262         if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
  263                 return (0);
  264         /* XXX Not invalid, but we've done this ~forever. */
  265         if (PCI_VENDOR(id) == 0)
  266                 return (0);
pa.pa_iot = sc->sc_iot;
pa.pa_memt = sc->sc_memt;
pa.pa_dmat = sc->sc_dmat;
pa.pa_pc = pc;
pa.pa_domain = sc->sc_domain;
pa.pa_bus = bus;
pa.pa_device = device;
pa.pa_function = function;
pa.pa_tag = tag;
pa.pa_id = id;
pa.pa_class = class;
pa.pa_bridgetag = sc->sc_bridgetag;
pa.pa_bridgeih = sc->sc_bridgeih;
  282         /* This is a simplification of the NetBSD code.
  283            We don't support turning off I/O or memory
  284            on broken hardware. <csapuntz@stanford.edu> */
pa.pa_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
  287 #ifdef __i386__
  288         /*
  289          * on i386 we really need to know the device tag
  290          * and not the pci bridge tag, in intr_map
  291          * to be able to program the device and the
  292          * pci interrupt router.
  293          */
pa.pa_intrtag = tag;
pa.pa_intrswiz = 0;
  296 #else
  297         if (sc->sc_bridgetag == NULL) {
pa.pa_intrswiz = 0;
pa.pa_intrtag = tag;
  300         } else {
pa.pa_intrswiz = sc->sc_intrswiz + device;
pa.pa_intrtag = sc->sc_intrtag;
  303         }
  304 #endif
intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
pin = PCI_INTERRUPT_PIN(intr);
pa.pa_rawintrpin = pin;
  310         if (pin == PCI_INTERRUPT_PIN_NONE) {
  311                 /* no interrupt */
pa.pa_intrpin = 0;
  313         } else {
  314                 /*
  315                  * swizzle it based on the number of busses we're
  316                  * behind and our device number.
  317                  */
pa.pa_intrpin =         /* XXX */
  319                     ((pin + pa.pa_intrswiz - 1) % 4) + 1;
  320         }
pa.pa_intrline = PCI_INTERRUPT_LINE(intr);
  323         if (match != NULL) {
ret = (*match)(&pa);
  325                 if (ret != 0 && pap != NULL)
  326                         *pap = pa;
  327         } else {
  328                 if ((dev = config_found_sm(&sc->sc_dev, &pa, pciprint,
pcisubmatch))) {
pcireg_t reg;
  332                                 /* skip header type != 0 */
reg = pci_conf_read(pc, tag, PCI_BHLC_REG);
  334                                 if (PCI_HDRTYPE_TYPE(reg) != 0)
  335                                         return(0);
  336                                 if (pci_get_capability(pc, tag,
PCI_CAP_PWRMGMT, NULL, NULL) == 0)
  338                                         return(0);
  339                                 if (!(pd = malloc(sizeof *pd, M_DEVBUF,
M_NOWAIT)))
  341                                         return(0);
pd->pd_tag = tag;
pd->pd_dev = dev;
LIST_INSERT_HEAD(&sc->sc_devs, pd, pd_next);
  345                         }
  346         }
  348         return (ret);
  349 }
  351 int
pci_get_capability(pci_chipset_tag_t pc, pcitag_t tag, int capid,
  353     int *offset, pcireg_t *value)
  354 {
pcireg_t reg;
  356         unsigned int ofs;
reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
  359         if (!(reg & PCI_STATUS_CAPLIST_SUPPORT))
  360                 return (0);
  362         /* Determine the Capability List Pointer register to start with. */
reg = pci_conf_read(pc, tag, PCI_BHLC_REG);
  364         switch (PCI_HDRTYPE_TYPE(reg)) {
  365         case 0: /* standard device header */
ofs = PCI_CAPLISTPTR_REG;
  367                 break;
  368         case 2: /* PCI-CardBus Bridge header */
ofs = PCI_CARDBUS_CAPLISTPTR_REG;
  370                 break;
  371         default:
  372                 return (0);
  373         }
ofs = PCI_CAPLIST_PTR(pci_conf_read(pc, tag, ofs));
  376         while (ofs != 0) {
  377 #ifdef DIAGNOSTIC
  378                 if ((ofs & 3) || (ofs < 0x40))
panic("pci_get_capability");
  380 #endif
reg = pci_conf_read(pc, tag, ofs);
  382                 if (PCI_CAPLIST_CAP(reg) == capid) {
  383                         if (offset)
  384                                 *offset = ofs;
  385                         if (value)
  386                                 *value = reg;
  387                         return (1);
  388                 }
ofs = PCI_CAPLIST_NEXT(reg);
  390         }
  392         return (0);
  393 }
  395 int
pci_find_device(struct pci_attach_args *pa,
  397                 int (*match)(struct pci_attach_args *))
  398 {
  399         extern struct cfdriver pci_cd;
  400         struct device *pcidev;
  401         int i;
  403         for (i = 0; i < pci_cd.cd_ndevs; i++) {
pcidev = pci_cd.cd_devs[i];
  405                 if (pcidev != NULL &&
pci_enumerate_bus((struct pci_softc *)pcidev,
match, pa) != 0)
  408                         return (1);
  409         }
  410         return (0);
  411 }
  413 #ifndef PCI_MACHDEP_ENUMERATE_BUS
  414 /*
  415  * Generic PCI bus enumeration routine.  Used unless machine-dependent
  416  * code needs to provide something else.
  417  */
  418 int
pci_enumerate_bus(struct pci_softc *sc,
  420     int (*match)(struct pci_attach_args *), struct pci_attach_args *pap)
  421 {
pci_chipset_tag_t pc = sc->sc_pc;
  423         int device, function, nfunctions, ret;
  424         const struct pci_quirkdata *qd;
pcireg_t id, bhlcr;
pcitag_t tag;
  428         for (device = 0; device < sc->sc_maxndevs; device++) {
tag = pci_make_tag(pc, sc->sc_bus, device, 0);
bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
  432                 if (PCI_HDRTYPE_TYPE(bhlcr) > 2)
  433                         continue;
id = pci_conf_read(pc, tag, PCI_ID_REG);
  437                 /* Invalid vendor ID value? */
  438                 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID)
  439                         continue;
  440                 /* XXX Not invalid, but we've done this ~forever. */
  441                 if (PCI_VENDOR(id) == 0)
  442                         continue;
qd = pci_lookup_quirkdata(PCI_VENDOR(id), PCI_PRODUCT(id));
  446                 if (qd != NULL &&
  447                       (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0)
nfunctions = 8;
  449                 else if (qd != NULL &&
  450                       (qd->quirks & PCI_QUIRK_MONOFUNCTION) != 0)
nfunctions = 1;
  452                 else
nfunctions = PCI_HDRTYPE_MULTIFN(bhlcr) ? 8 : 1;
  455                 for (function = 0; function < nfunctions; function++) {
tag = pci_make_tag(pc, sc->sc_bus, device, function);
ret = pci_probe_device(sc, tag, match, pap);
  458                         if (match != NULL && ret != 0)
  459                                 return (ret);
  460                 }
  461         }
  463         return (0);
  464 }
  465 #endif /* PCI_MACHDEP_ENUMERATE_BUS */
  467 int
pci_matchbyid(struct pci_attach_args *pa, const struct pci_matchid *ids,
  469     int nent)
  470 {
  471         const struct pci_matchid *pm;
  472         int i;
  474         for (i = 0, pm = ids; i < nent; i++, pm++)
  475                 if (PCI_VENDOR(pa->pa_id) == pm->pm_vid &&
PCI_PRODUCT(pa->pa_id) == pm->pm_pid)
  477                         return (1);
  478         return (0);
  479 }
  481 #ifdef USER_PCICONF
  482 /*
  483  * This is the user interface to PCI configuration space.
  484  */
  486 #include <sys/pciio.h>
  487 #include <sys/fcntl.h>
  489 #ifdef DEBUG
  490 #define PCIDEBUG(x) printf x
  491 #else
  492 #define PCIDEBUG(x)
  493 #endif
  496 int pciopen(dev_t dev, int oflags, int devtype, struct proc *p);
  497 int pciclose(dev_t dev, int flag, int devtype, struct proc *p);
  498 int pciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p);
  500 int
pciopen(dev_t dev, int oflags, int devtype, struct proc *p) 
  502 {
PCIDEBUG(("pciopen ndevs: %d\n" , pci_cd.cd_ndevs));
  505         if (minor(dev) >= pci_ndomains) {
  506                 return ENXIO;
  507         }
  509 #ifndef APERTURE
  510         if ((oflags & FWRITE) && securelevel > 0) {
  511                 return EPERM;
  512         }
  513 #else
  514         if ((oflags & FWRITE) && securelevel > 0 && allowaperture == 0) {
  515                 return EPERM;
  516         }
  517 #endif
  518         return (0);
  519 }
  521 int
pciclose(dev_t dev, int flag, int devtype, struct proc *p)
  523 {
PCIDEBUG(("pciclose\n"));
  525         return (0);
  526 }
  528 int
pciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
  530 {
  531         struct pci_io *io;
  532         int i, error;
pcitag_t tag;
  534         struct pci_softc *pci = NULL;
pci_chipset_tag_t pc;
io = (struct pci_io *)data;
PCIDEBUG(("pciioctl cmd %s", cmd == PCIOCREAD ? "pciocread" 
  540                   : cmd == PCIOCWRITE ? "pciocwrite" : "unknown"));
PCIDEBUG(("  bus %d dev %d func %d reg %x\n", io->pi_sel.pc_bus,
io->pi_sel.pc_dev, io->pi_sel.pc_func, io->pi_reg));
  544         for (i = 0; i < pci_cd.cd_ndevs; i++) {
pci = pci_cd.cd_devs[i];
  546                 if (pci != NULL && pci->sc_domain == minor(dev) &&
pci->sc_bus == io->pi_sel.pc_bus)
  548                         break;
  549         }
  550         if (pci != NULL && pci->sc_bus == io->pi_sel.pc_bus) {
pc = pci->sc_pc;
  552         } else {
error = ENXIO;
  554                 goto done;
  555         }
  556         /* Check bounds */
  557         if (pci->sc_bus >= 256 || 
io->pi_sel.pc_dev >= pci_bus_maxdevs(pc, pci->sc_bus) ||
io->pi_sel.pc_func >= 8) {
error = EINVAL;
  561                 goto done;
  562         }
tag = pci_make_tag(pc, io->pi_sel.pc_bus, io->pi_sel.pc_dev,
io->pi_sel.pc_func);
  567         switch(cmd) {
  568         case PCIOCGETCONF:
error = ENODEV;
  570                 break;
  572         case PCIOCREAD:
  573                 switch(io->pi_width) {
  574                 case 4:
  575                         /* Make sure the register is properly aligned */
  576                         if (io->pi_reg & 0x3) 
  577                                 return EINVAL;
io->pi_data = pci_conf_read(pc, tag, io->pi_reg);
error = 0;
  580                         break;
  581                 default:
error = ENODEV;
  583                         break;
  584                 }
  585                 break;
  587         case PCIOCWRITE:
  588                 if (!(flag & FWRITE))
  589                         return EPERM;
  591                 switch(io->pi_width) {
  592                 case 4:
  593                         /* Make sure the register is properly aligned */
  594                         if (io->pi_reg & 0x3)
  595                                 return EINVAL;
pci_conf_write(pc, tag, io->pi_reg, io->pi_data);
error = 0;
  598                         break;
  599                 default:
error = ENODEV;
  601                         break;
  602                 }
  603                 break;
  605         default:
error = ENOTTY;
  607                 break;
  608         }
done:
  610         return (error);
  611 }
  613 #endif