offset 216 arch/i386/i386/bios.c bios32_entry.offset = (u_int32_t)ISA_HOLE_VADDR(h->entry);
offset 484 arch/i386/i386/bios.c if (bios32_entry.offset == 0)
offset 527 arch/i386/i386/bios.c e->offset = (vaddr_t)ent;
offset 236 arch/i386/i386/db_trace.c db_expr_t offset;
offset 241 arch/i386/i386/db_trace.c sym = db_search_symbol(callpc, DB_STGY_ANY, &offset);
offset 248 arch/i386/i386/db_trace.c offset = 1;
offset 253 arch/i386/i386/db_trace.c offset = 0;
offset 284 arch/i386/i386/db_trace.c if (lastframe == 0 && offset == 0 && !have_addr) {
offset 306 arch/i386/i386/db_trace.c if (lastframe == 0 && offset == 0 && !have_addr) {
offset 349 arch/i386/i386/freebsd_machdep.c vaddr_t offset = (vaddr_t)addr;
offset 351 arch/i386/i386/freebsd_machdep.c if (offset == FREEBSD_U_AR0_OFFSET) {
offset 354 arch/i386/i386/freebsd_machdep.c } else if (offset >= FREEBSD_REGS_OFFSET &&
offset 355 arch/i386/i386/freebsd_machdep.c offset <= FREEBSD_REGS_OFFSET +
offset 360 arch/i386/i386/freebsd_machdep.c } else if (offset >= FREEBSD_U_SAVEFP_OFFSET &&
offset 361 arch/i386/i386/freebsd_machdep.c offset <= FREEBSD_U_SAVEFP_OFFSET +
offset 364 arch/i386/i386/freebsd_machdep.c [offset - FREEBSD_U_SAVEFP_OFFSET];
offset 368 arch/i386/i386/freebsd_machdep.c printf("freebsd_ptrace_getregs: *(0x%08lx)\n", offset);
offset 376 arch/i386/i386/freebsd_machdep.c vaddr_t offset = (vaddr_t)addr;
offset 378 arch/i386/i386/freebsd_machdep.c if (offset >= FREEBSD_REGS_OFFSET &&
offset 379 arch/i386/i386/freebsd_machdep.c offset <= FREEBSD_REGS_OFFSET +
offset 382 arch/i386/i386/freebsd_machdep.c [offset - FREEBSD_REGS_OFFSET] = data;
offset 384 arch/i386/i386/freebsd_machdep.c } else if (offset >= FREEBSD_U_SAVEFP_OFFSET &&
offset 385 arch/i386/i386/freebsd_machdep.c offset <= FREEBSD_U_SAVEFP_OFFSET +
offset 388 arch/i386/i386/freebsd_machdep.c [offset - FREEBSD_U_SAVEFP_OFFSET] = data;
offset 392 arch/i386/i386/freebsd_machdep.c printf("freebsd_ptrace_setregs: *(0x%08lx) = 0x%08x\n", offset, data);
offset 3637 arch/i386/i386/machdep.c bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
offset 3639 arch/i386/i386/machdep.c *nbshp = bsh + offset;
offset 2090 arch/i386/i386/pmap.c ((vaddr_t)ptes) + ptp->offset);
offset 2100 arch/i386/i386/pmap.c ((vaddr_t)PTE_BASE) + ptp->offset);
offset 2198 arch/i386/i386/pmap.c ((vaddr_t)ptes) + ptp->offset);
offset 2207 arch/i386/i386/pmap.c ((vaddr_t)PTE_BASE) + ptp->offset);
offset 2291 arch/i386/i386/pmap.c ((vaddr_t)ptes) + pve->pv_ptp->offset);
offset 2298 arch/i386/i386/pmap.c ((vaddr_t)PTE_BASE) + pve->pv_ptp->offset);
offset 1435 arch/i386/i386/pmapae.c ((vaddr_t)ptes) + ptp->offset, opte,
offset 1446 arch/i386/i386/pmapae.c ((vaddr_t)PTE_BASE) + ptp->offset, opte,
offset 1531 arch/i386/i386/pmapae.c ((vaddr_t)ptes) + ptp->offset, opte, &cpumask);
offset 1540 arch/i386/i386/pmapae.c ((vaddr_t)PTE_BASE) + ptp->offset, opte, &cpumask);
offset 1650 arch/i386/i386/pmapae.c ((vaddr_t)ptes) + pve->pv_ptp->offset,
offset 1658 arch/i386/i386/pmapae.c ((vaddr_t)PTE_BASE) + pve->pv_ptp->offset,
offset 99 arch/i386/include/biosvar.h u_int32_t offset;
offset 107 arch/i386/include/bus.h bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
offset 50 arch/i386/include/loadfile_machdep.h #define LOADADDR(a) ((((u_long)(a)) + offset)&0xfffffff)
offset 889 arch/i386/isa/isa_machdep.c _isa_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
offset 896 arch/i386/isa/isa_machdep.c if (offset >= map->dm_mapsize)
offset 898 arch/i386/isa/isa_machdep.c if (len == 0 || (offset + len) > map->dm_mapsize)
offset 916 arch/i386/isa/isa_machdep.c bcopy((char *)cookie->id_origbuf + offset,
offset 917 arch/i386/isa/isa_machdep.c cookie->id_bouncebuf + offset,
offset 927 arch/i386/isa/isa_machdep.c bcopy((char *)cookie->id_bouncebuf + offset,
offset 928 arch/i386/isa/isa_machdep.c cookie->id_origbuf + offset,
offset 591 arch/i386/pci/glxsb.c int offset;
offset 648 arch/i386/pci/glxsb.c offset = 0;
offset 658 arch/i386/pci/glxsb.c crd->crd_skip + offset, len, op_src);
offset 661 arch/i386/pci/glxsb.c crd->crd_skip + offset, len, op_src);
offset 663 arch/i386/pci/glxsb.c bcopy(crp->crp_buf + crd->crd_skip + offset, op_src,
offset 675 arch/i386/pci/glxsb.c crd->crd_skip + offset, len, op_dst);
offset 678 arch/i386/pci/glxsb.c crd->crd_skip + offset, len, op_dst);
offset 680 arch/i386/pci/glxsb.c bcopy(op_dst, crp->crp_buf + crd->crd_skip + offset,
offset 683 arch/i386/pci/glxsb.c offset += len;
offset 162 arch/i386/pci/pcibios.c pcibios_entry.segment, pcibios_entry.offset,
offset 395 arch/i386/pci/pcibios.c u_int32_t offset;
offset 400 arch/i386/pci/pcibios.c args.offset = (u_int32_t)table;
offset 140 arch/i386/stand/libsa/pxe.c uw->buffer.offset = VTOPOFF(pkt);
offset 175 arch/i386/stand/libsa/pxe.c ur->buffer.offset = VTOPOFF(pkt);
offset 410 arch/i386/stand/libsa/pxe.c bangpxe_off = pxe->EntryPointSP.offset;
offset 414 arch/i386/stand/libsa/pxe.c pxenv_off = pxenv->RMEntry.offset;
offset 439 arch/i386/stand/libsa/pxe.c SEGOFF2FLAT(gci->Buffer.segment, gci->Buffer.offset),
offset 51 arch/i386/stand/libsa/pxe.h uint16_t offset;
offset 280 compat/common/vfs_syscalls_43.c SCARG(&nuap, offset) = SCARG(uap, offset);
offset 340 compat/ibcs2/ibcs2_exec.c u_long offset;
offset 355 compat/ibcs2/ibcs2_exec.c offset = sh.s_scnptr - (sh.s_vaddr - epp->ep_taddr);
offset 379 compat/ibcs2/ibcs2_exec.c epp->ep_taddr, epp->ep_vp, offset,
offset 383 compat/ibcs2/ibcs2_exec.c epp->ep_taddr, epp->ep_vp, offset,
offset 396 compat/ibcs2/ibcs2_exec.c offset = sh.s_scnptr - (sh.s_vaddr - epp->ep_daddr);
offset 404 compat/ibcs2/ibcs2_exec.c epp->ep_daddr, epp->ep_vp, offset,
offset 408 compat/ibcs2/ibcs2_exec.c dsize, epp->ep_daddr, epp->ep_vp, offset,
offset 486 compat/ibcs2/ibcs2_exec.c int error, taddr, tsize, daddr, dsize, offset;
offset 532 compat/ibcs2/ibcs2_exec.c offset = shp->s_scnptr - (shp->s_vaddr - taddr);
offset 536 compat/ibcs2/ibcs2_exec.c nd.ni_vp, offset,
offset 549 compat/ibcs2/ibcs2_exec.c offset = shp->s_scnptr - (shp->s_vaddr - daddr);
offset 555 compat/ibcs2/ibcs2_exec.c dsize, daddr, nd.ni_vp, offset,
offset 404 compat/ibcs2/ibcs2_fcntl.c SCARG(&ols, offset) = 0;
offset 230 compat/linux/linux_file.c SCARG(&bla, offset) = off;
offset 881 compat/linux/linux_file.c SCARG(&pra, offset) = SCARG(uap, offset);
offset 906 compat/linux/linux_file.c SCARG(&pra, offset) = SCARG(uap, offset);
offset 607 compat/linux/linux_misc.c SCARG(&nlmap,offset) = (unsigned)lmap.lm_pos;
offset 610 compat/linux/linux_misc.c SCARG(&cma, pos) = (off_t)SCARG(&nlmap, offset);
offset 641 compat/linux/linux_misc.c SCARG(&cma, pos) = ((off_t)SCARG(uap, offset)) << PAGE_SHIFT;
offset 469 compat/linux/linux_syscallargs.h syscallarg(linux_off_t) offset;
offset 476 compat/linux/linux_syscallargs.h syscallarg(linux_off_t) offset;
offset 501 compat/linux/linux_syscallargs.h syscallarg(linux_off_t) offset;
offset 287 compat/osf1/osf1_descrip.c SCARG(&a, offset) = SCARG(uap, offset);
offset 47 compat/osf1/osf1_syscallargs.h syscallarg(off_t) offset;
offset 486 compat/ossaudio/ossaudio.c cntinfo.ptr = tmpoffs.offset;
offset 497 compat/ossaudio/ossaudio.c cntinfo.ptr = tmpoffs.offset;
offset 406 compat/svr4/svr4_fcntl.c SCARG(&ap, offset) = (((long long) SCARG(uap, offset1)) << 32) |
offset 409 compat/svr4/svr4_fcntl.c SCARG(&ap, offset) = (((long long) SCARG(uap, offset2)) << 32) |
offset 447 compat/svr4/svr4_fcntl.c SCARG(&pra, offset) = SCARG(uap, off);
offset 464 compat/svr4/svr4_fcntl.c SCARG(&pra, offset) = SCARG(uap, off);
offset 481 compat/svr4/svr4_fcntl.c SCARG(&pwa, offset) = SCARG(uap, off);
offset 498 compat/svr4/svr4_fcntl.c SCARG(&pwa, offset) = SCARG(uap, off);
offset 133 compat/svr4/svr4_stropts.h int offset;
offset 54 ddb/db_print.c db_expr_t value, offset;
offset 60 ddb/db_print.c db_find_xtrn_sym_and_offset((db_addr_t)value, &name, &offset);
offset 61 ddb/db_print.c if (name != 0 && offset <= db_maxoff && offset != value) {
offset 63 ddb/db_print.c if (offset != 0)
offset 64 ddb/db_print.c db_printf("+%#lr", (long)offset);
offset 1485 dev/acpi/acpi.c acpi_read_pmreg(struct acpi_softc *sc, int reg, int offset)
offset 1495 dev/acpi/acpi.c return (acpi_read_pmreg(sc, ACPIREG_PM1A_EN, offset) |
offset 1496 dev/acpi/acpi.c acpi_read_pmreg(sc, ACPIREG_PM1B_EN, offset));
offset 1498 dev/acpi/acpi.c return (acpi_read_pmreg(sc, ACPIREG_PM1A_STS, offset) |
offset 1499 dev/acpi/acpi.c acpi_read_pmreg(sc, ACPIREG_PM1B_STS, offset));
offset 1501 dev/acpi/acpi.c return (acpi_read_pmreg(sc, ACPIREG_PM1A_CNT, offset) |
offset 1502 dev/acpi/acpi.c acpi_read_pmreg(sc, ACPIREG_PM1B_CNT, offset));
offset 1505 dev/acpi/acpi.c dnprintf(50, "read GPE_STS offset: %.2x %.2x %.2x\n", offset,
offset 1507 dev/acpi/acpi.c if (offset < (sc->sc_fadt->gpe0_blk_len >> 1)) {
offset 1514 dev/acpi/acpi.c offset, sc->sc_fadt->gpe0_blk_len>>1,
offset 1516 dev/acpi/acpi.c if (offset < (sc->sc_fadt->gpe0_blk_len >> 1)) {
offset 1535 dev/acpi/acpi.c regval = bus_space_read_1(sc->sc_iot, ioh, offset);
offset 1538 dev/acpi/acpi.c regval = bus_space_read_2(sc->sc_iot, ioh, offset);
offset 1541 dev/acpi/acpi.c regval = bus_space_read_4(sc->sc_iot, ioh, offset);
offset 1547 dev/acpi/acpi.c sc->sc_pmregs[reg].addr, offset, regval);
offset 1553 dev/acpi/acpi.c acpi_write_pmreg(struct acpi_softc *sc, int reg, int offset, int regval)
offset 1562 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1A_EN, offset, regval);
offset 1563 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1B_EN, offset, regval);
offset 1566 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1A_STS, offset, regval);
offset 1567 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1B_STS, offset, regval);
offset 1570 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1A_CNT, offset, regval);
offset 1571 dev/acpi/acpi.c acpi_write_pmreg(sc, ACPIREG_PM1B_CNT, offset, regval);
offset 1576 dev/acpi/acpi.c offset, sc->sc_fadt->gpe0_blk_len>>1,
offset 1578 dev/acpi/acpi.c if (offset < (sc->sc_fadt->gpe0_blk_len >> 1)) {
offset 1585 dev/acpi/acpi.c offset, sc->sc_fadt->gpe0_blk_len>>1,
offset 1587 dev/acpi/acpi.c if (offset < (sc->sc_fadt->gpe0_blk_len >> 1)) {
offset 1605 dev/acpi/acpi.c bus_space_write_1(sc->sc_iot, ioh, offset, regval);
offset 1608 dev/acpi/acpi.c bus_space_write_2(sc->sc_iot, ioh, offset, regval);
offset 1611 dev/acpi/acpi.c bus_space_write_4(sc->sc_iot, ioh, offset, regval);
offset 1616 dev/acpi/acpi.c sc->sc_pmregs[reg].name, sc->sc_pmregs[reg].addr, offset, regval);
offset 203 dev/acpi/acpivar.h int offset;
offset 3248 dev/acpi/dsdt.c int offset;
offset 3276 dev/acpi/dsdt.c for (fixtab = fixlist->fixtab; fixtab->offset != -1;
offset 3278 dev/acpi/dsdt.c if (base[fixtab->offset] == fixtab->oldv)
offset 3279 dev/acpi/dsdt.c base[fixtab->offset] = fixtab->newv;
offset 1645 dev/audio.c ao->offset = sc->sc_rr.inp - sc->sc_rr.start;
offset 1659 dev/audio.c ao->offset = offs;
offset 776 dev/cardbus/cardbus.c cardbustag_t tag, int capid, int *offset, cardbusreg_t *value)
offset 794 dev/cardbus/cardbus.c if (offset)
offset 795 dev/cardbus/cardbus.c *offset = ofs;
offset 197 dev/cardbus/rbus.c bus_addr_t start, bus_addr_t end, bus_addr_t offset, int flags)
offset 221 dev/cardbus/rbus.c rb->rb_offset = offset;
offset 243 dev/cardbus/rbus.c bus_addr_t offset, int flags)
offset 263 dev/cardbus/rbus.c offset, flags);
offset 279 dev/cardbus/rbus.c bus_addr_t offset)
offset 288 dev/cardbus/rbus.c rb = rbus_new_body(bt, NULL, ex, start, start + size, offset,
offset 305 dev/cardbus/rbus.c bus_size_t size, bus_addr_t offset)
offset 316 dev/cardbus/rbus.c return (rbus_new_body(bt, NULL, ex, start, start + size, offset,
offset 900 dev/flash.c daddr64_t offset;
offset 904 dev/flash.c offset = DL_GETPOFFSET(&sc->sc_dk.dk_label->d_partitions[part]) +
offset 906 dev/flash.c pgno = offset / (sc->sc_flashdev->pagesize / DEV_BSIZE);
offset 151 dev/gpio/gpio.c gpio_pin_map(void *gpio, int offset, u_int32_t mask, struct gpio_pinmap *map)
offset 162 dev/gpio/gpio.c pin = offset + i;
offset 818 dev/i2o/i2o.h u_int64_t offset; /* Error replies only */
offset 1454 dev/ic/acx.c acx_read_eeprom(struct acx_softc *sc, uint32_t offset, uint8_t *val)
offset 1460 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_EEPROM_ADDR, offset);
offset 1471 dev/ic/acx.c ifp->if_xname, offset);
offset 1632 dev/ic/acx.c acx_load_firmware(struct acx_softc *sc, uint32_t offset, const uint8_t *data,
offset 1670 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset);
offset 1675 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset + (i * 4));
offset 1686 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset);
offset 1693 dev/ic/acx.c CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset + (i * 4));
offset 425 dev/ic/aic6360.c ti->offset = AIC_SYNC_REQ_ACK_OFS;
offset 427 dev/ic/aic6360.c ti->period = ti->offset = 0;
offset 626 dev/ic/aic6360.c if (ti->offset != 0)
offset 628 dev/ic/aic6360.c ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
offset 1023 dev/ic/aic6360.c ti->period = ti->offset = 0;
offset 1031 dev/ic/aic6360.c ti->period = ti->offset = 0;
offset 1074 dev/ic/aic6360.c ti->offset = sc->sc_imess[4];
offset 1076 dev/ic/aic6360.c if (ti->offset == 0) {
offset 1079 dev/ic/aic6360.c ti->offset > 8) {
offset 1080 dev/ic/aic6360.c ti->period = ti->offset = 0;
offset 1085 dev/ic/aic6360.c ti->offset);
offset 1246 dev/ic/aic6360.c sc->sc_omess[0] = ti->offset;
offset 1847 dev/ic/aic6360.c ti->period = ti->offset = 0;
offset 115 dev/ic/aic6360var.h u_char offset; /* Offset suggestion */
offset 1265 dev/ic/aic6915.c sf_read_eeprom(struct sf_softc *sc, int offset)
offset 1269 dev/ic/aic6915.c reg = sf_genreg_read(sc, SF_EEPROM_BASE + (offset & ~3));
offset 1271 dev/ic/aic6915.c return ((reg >> (8 * (offset & 3))) & 0xff);
offset 177 dev/ic/aic79xx.c u_int period, u_int offset);
offset 183 dev/ic/aic79xx.c u_int period, u_int offset,
offset 2968 dev/ic/aic79xx.c u_int period, u_int *offset, int wide,
offset 2983 dev/ic/aic79xx.c *offset = MIN(*offset, maxoffset);
offset 2986 dev/ic/aic79xx.c *offset = MIN(*offset, tinfo->user.offset);
offset 2988 dev/ic/aic79xx.c *offset = MIN(*offset, tinfo->goal.offset);
offset 3044 dev/ic/aic79xx.c tinfo->curr.offset = AHD_OFFSET_UNKNOWN;
offset 3048 dev/ic/aic79xx.c || tinfo->curr.offset != tinfo->goal.offset
offset 3051 dev/ic/aic79xx.c && (tinfo->goal.offset != 0
offset 3071 dev/ic/aic79xx.c u_int period, u_int offset, u_int ppr_options,
offset 3085 dev/ic/aic79xx.c if (period == 0 || offset == 0) {
offset 3087 dev/ic/aic79xx.c offset = 0;
offset 3095 dev/ic/aic79xx.c tinfo->user.offset = offset;
offset 3101 dev/ic/aic79xx.c tinfo->goal.offset = offset;
offset 3106 dev/ic/aic79xx.c old_offset = tinfo->curr.offset;
offset 3111 dev/ic/aic79xx.c || old_offset != offset
offset 3117 dev/ic/aic79xx.c tinfo->curr.offset = offset;
offset 3124 dev/ic/aic79xx.c if (offset != 0) {
offset 3130 dev/ic/aic79xx.c period, offset);
offset 3291 dev/ic/aic79xx.c u_int offset;
offset 3301 dev/ic/aic79xx.c offset = tinfo->offset;
offset 3323 dev/ic/aic79xx.c offset *= 2;
offset 3371 dev/ic/aic79xx.c ahd_outb(ahd, NEGOFFSET, offset);
offset 3711 dev/ic/aic79xx.c u_int offset;
offset 3722 dev/ic/aic79xx.c offset = tinfo->goal.offset;
offset 3730 dev/ic/aic79xx.c dosync = tinfo->curr.offset != offset || tinfo->curr.period != period;
offset 3740 dev/ic/aic79xx.c dosync = tinfo->goal.offset != 0;
offset 3772 dev/ic/aic79xx.c offset = tinfo->goal.offset;
offset 3773 dev/ic/aic79xx.c ahd_validate_offset(ahd, tinfo, period, &offset,
offset 3778 dev/ic/aic79xx.c ahd_construct_ppr(ahd, devinfo, period, offset,
offset 3781 dev/ic/aic79xx.c ahd_construct_sdtr(ahd, devinfo, period, offset);
offset 3794 dev/ic/aic79xx.c u_int period, u_int offset)
offset 3796 dev/ic/aic79xx.c if (offset == 0)
offset 3802 dev/ic/aic79xx.c ahd->msgout_buf[ahd->msgout_index++] = offset;
offset 3807 dev/ic/aic79xx.c devinfo->lun, period, offset);
offset 3837 dev/ic/aic79xx.c u_int period, u_int offset, u_int bus_width,
offset 3847 dev/ic/aic79xx.c if (offset == 0)
offset 3854 dev/ic/aic79xx.c ahd->msgout_buf[ahd->msgout_index++] = offset;
offset 3862 dev/ic/aic79xx.c bus_width, period, offset, ppr_options);
offset 4340 dev/ic/aic79xx.c u_int offset;
offset 4360 dev/ic/aic79xx.c saved_offset = offset = ahd->msgin_buf[4];
offset 4363 dev/ic/aic79xx.c ahd_validate_offset(ahd, tinfo, period, &offset,
offset 4372 dev/ic/aic79xx.c period, offset);
offset 4375 dev/ic/aic79xx.c offset, ppr_options,
offset 4386 dev/ic/aic79xx.c if (saved_offset != offset) {
offset 4404 dev/ic/aic79xx.c period, offset);
offset 4510 dev/ic/aic79xx.c u_int offset;
offset 4533 dev/ic/aic79xx.c offset = ahd->msgin_buf[5];
offset 4544 dev/ic/aic79xx.c offset = 0;
offset 4546 dev/ic/aic79xx.c saved_offset = offset;
offset 4559 dev/ic/aic79xx.c ahd_validate_offset(ahd, tinfo, period, &offset,
offset 4569 dev/ic/aic79xx.c || saved_offset != offset
offset 4573 dev/ic/aic79xx.c offset = 0;
offset 4590 dev/ic/aic79xx.c ahd_construct_ppr(ahd, devinfo, period, offset,
offset 4604 dev/ic/aic79xx.c bus_width, period, offset, ppr_options);
offset 4610 dev/ic/aic79xx.c offset, ppr_options,
offset 4782 dev/ic/aic79xx.c if (tinfo->goal.offset != tinfo->curr.offset) {
offset 5979 dev/ic/aic79xx.c int offset;
offset 5981 dev/ic/aic79xx.c offset = (PAGE_SIZE / sizeof(*hscb)) - scb_data->scbs_left;
offset 5983 dev/ic/aic79xx.c hscb = &((struct hardware_scb *)hscb_map->vaddr)[offset];
offset 5984 dev/ic/aic79xx.c hscb_busaddr = hscb_map->busaddr + (offset * sizeof(*hscb));
offset 6008 dev/ic/aic79xx.c int offset;
offset 6010 dev/ic/aic79xx.c offset = ((ahd_sglist_allocsize(ahd) / ahd_sglist_size(ahd))
offset 6013 dev/ic/aic79xx.c segs = sg_map->vaddr + offset;
offset 6014 dev/ic/aic79xx.c sg_busaddr = sg_map->busaddr + offset;
offset 6043 dev/ic/aic79xx.c int offset;
offset 6045 dev/ic/aic79xx.c offset = PAGE_SIZE - (AHD_SENSE_BUFSIZE * scb_data->sense_left);
offset 6047 dev/ic/aic79xx.c sense_data = sense_map->vaddr + offset;
offset 6048 dev/ic/aic79xx.c sense_busaddr = sense_map->busaddr + offset;
offset 6741 dev/ic/aic79xx.c tinfo->user.offset = MAX_OFFSET;
offset 6834 dev/ic/aic79xx.c user_tinfo->offset = MAX_OFFSET;
offset 6836 dev/ic/aic79xx.c user_tinfo->offset = 0;
offset 6863 dev/ic/aic79xx.c user_tinfo->period, user_tinfo->offset,
offset 10578 dev/ic/aic79xx.c ahd_inb_scbram(struct ahd_softc *ahd, u_int offset)
offset 10596 dev/ic/aic79xx.c value = ahd_inb(ahd, offset);
offset 10603 dev/ic/aic79xx.c ahd_inw_scbram(struct ahd_softc *ahd, u_int offset)
offset 10605 dev/ic/aic79xx.c return (ahd_inb_scbram(ahd, offset)
offset 10606 dev/ic/aic79xx.c | (ahd_inb_scbram(ahd, offset+1) << 8));
offset 10610 dev/ic/aic79xx.c ahd_inl_scbram(struct ahd_softc *ahd, u_int offset)
offset 10612 dev/ic/aic79xx.c return (ahd_inw_scbram(ahd, offset)
offset 10613 dev/ic/aic79xx.c | (ahd_inw_scbram(ahd, offset+2) << 16));
offset 10617 dev/ic/aic79xx.c ahd_inq_scbram(struct ahd_softc *ahd, u_int offset)
offset 10619 dev/ic/aic79xx.c return (ahd_inl_scbram(ahd, offset)
offset 10620 dev/ic/aic79xx.c | ((uint64_t)ahd_inl_scbram(ahd, offset+4)) << 32);
offset 793 dev/ic/aic79xx.h uint8_t offset; /* Sync offset */
offset 1496 dev/ic/aic79xx.h u_int period, u_int *offset,
offset 1524 dev/ic/aic79xx.h u_int period, u_int offset,
offset 147 dev/ic/aic79xx_inline.h u_int ahd_inb_scbram(struct ahd_softc *ahd, u_int offset);
offset 148 dev/ic/aic79xx_inline.h u_int ahd_inw_scbram(struct ahd_softc *ahd, u_int offset);
offset 149 dev/ic/aic79xx_inline.h uint32_t ahd_inl_scbram(struct ahd_softc *ahd, u_int offset);
offset 150 dev/ic/aic79xx_inline.h uint64_t ahd_inq_scbram(struct ahd_softc *ahd, u_int offset);
offset 661 dev/ic/aic79xx_openbsd.c u_int width, ppr_options, period, offset;
offset 693 dev/ic/aic79xx_openbsd.c offset = 0;
offset 696 dev/ic/aic79xx_openbsd.c offset = tinfo->user.offset;
offset 710 dev/ic/aic79xx_openbsd.c ahd_validate_offset(ahd, NULL, period, &offset, width, ROLE_UNKNOWN);
offset 712 dev/ic/aic79xx_openbsd.c if (offset == 0) {
offset 722 dev/ic/aic79xx_openbsd.c ahd_set_syncrate(ahd, &devinfo, period, offset, ppr_options,
offset 119 dev/ic/aic79xx_openbsd.h #define ahd_dmamap_sync(ahc, dma_tag, dmamap, offset, len, op) \
offset 120 dev/ic/aic79xx_openbsd.h bus_dmamap_sync(dma_tag, dmamap, offset, len, op)
offset 178 dev/ic/aic7xxx.c u_int period, u_int offset);
offset 184 dev/ic/aic7xxx.c u_int period, u_int offset,
offset 1864 dev/ic/aic7xxx.c u_int *offset, int wide, role_t role)
offset 1879 dev/ic/aic7xxx.c *offset = MIN(*offset, maxoffset);
offset 1882 dev/ic/aic7xxx.c *offset = MIN(*offset, tinfo->user.offset);
offset 1884 dev/ic/aic7xxx.c *offset = MIN(*offset, tinfo->goal.offset);
offset 1940 dev/ic/aic7xxx.c tinfo->curr.offset = AHC_OFFSET_UNKNOWN;
offset 1944 dev/ic/aic7xxx.c || tinfo->curr.offset != tinfo->goal.offset
offset 1947 dev/ic/aic7xxx.c && (tinfo->goal.offset != 0
offset 1968 dev/ic/aic7xxx.c u_int offset, u_int ppr_options, u_int type, int paused)
offset 1983 dev/ic/aic7xxx.c offset = 0;
offset 1991 dev/ic/aic7xxx.c tinfo->user.offset = offset;
offset 1997 dev/ic/aic7xxx.c tinfo->goal.offset = offset;
offset 2002 dev/ic/aic7xxx.c old_offset = tinfo->curr.offset;
offset 2007 dev/ic/aic7xxx.c || old_offset != offset
offset 2037 dev/ic/aic7xxx.c scsirate |= offset & SOFS;
offset 2052 dev/ic/aic7xxx.c ahc_outb(ahc, SCSIOFFSET, offset);
offset 2057 dev/ic/aic7xxx.c tinfo->curr.offset = offset;
offset 2063 dev/ic/aic7xxx.c if (offset != 0) {
offset 2068 dev/ic/aic7xxx.c ? " DT" : "", offset);
offset 2191 dev/ic/aic7xxx.c pending_hscb->scsioffset = tinfo->curr.offset;
offset 2448 dev/ic/aic7xxx.c u_int offset;
offset 2459 dev/ic/aic7xxx.c offset = tinfo->goal.offset;
offset 2467 dev/ic/aic7xxx.c dosync = tinfo->curr.offset != offset || tinfo->curr.period != period;
offset 2477 dev/ic/aic7xxx.c dosync = tinfo->goal.offset != 0;
offset 2510 dev/ic/aic7xxx.c offset = tinfo->goal.offset;
offset 2511 dev/ic/aic7xxx.c ahc_validate_offset(ahc, tinfo, rate, &offset,
offset 2516 dev/ic/aic7xxx.c ahc_construct_ppr(ahc, devinfo, period, offset,
offset 2519 dev/ic/aic7xxx.c ahc_construct_sdtr(ahc, devinfo, period, offset);
offset 2532 dev/ic/aic7xxx.c u_int period, u_int offset)
offset 2534 dev/ic/aic7xxx.c if (offset == 0)
offset 2540 dev/ic/aic7xxx.c ahc->msgout_buf[ahc->msgout_index++] = offset;
offset 2545 dev/ic/aic7xxx.c devinfo->lun, period, offset);
offset 2575 dev/ic/aic7xxx.c u_int period, u_int offset, u_int bus_width,
offset 2578 dev/ic/aic7xxx.c if (offset == 0)
offset 2585 dev/ic/aic7xxx.c ahc->msgout_buf[ahc->msgout_index++] = offset;
offset 2593 dev/ic/aic7xxx.c bus_width, period, offset, ppr_options);
offset 3121 dev/ic/aic7xxx.c u_int offset;
offset 3141 dev/ic/aic7xxx.c saved_offset = offset = ahc->msgin_buf[4];
offset 3145 dev/ic/aic7xxx.c ahc_validate_offset(ahc, tinfo, syncrate, &offset,
offset 3155 dev/ic/aic7xxx.c period, offset);
offset 3159 dev/ic/aic7xxx.c offset, ppr_options,
offset 3170 dev/ic/aic7xxx.c if (saved_offset != offset) {
offset 3188 dev/ic/aic7xxx.c period, offset);
offset 3295 dev/ic/aic7xxx.c u_int offset;
offset 3318 dev/ic/aic7xxx.c offset = ahc->msgin_buf[5];
offset 3329 dev/ic/aic7xxx.c offset = 0;
offset 3331 dev/ic/aic7xxx.c saved_offset = offset;
offset 3348 dev/ic/aic7xxx.c &offset, bus_width,
offset 3358 dev/ic/aic7xxx.c || saved_offset != offset
offset 3362 dev/ic/aic7xxx.c offset = 0;
offset 3380 dev/ic/aic7xxx.c ahc_construct_ppr(ahc, devinfo, period, offset,
offset 3394 dev/ic/aic7xxx.c bus_width, period, offset, ppr_options);
offset 3401 dev/ic/aic7xxx.c offset, ppr_options,
offset 3545 dev/ic/aic7xxx.c if (tinfo->goal.offset != tinfo->curr.offset) {
offset 4907 dev/ic/aic7xxx.c tinfo->user.offset = MAX_OFFSET;
offset 4916 dev/ic/aic7xxx.c u_int offset;
offset 4928 dev/ic/aic7xxx.c offset = MAX_OFFSET_ULTRA2;
offset 4930 dev/ic/aic7xxx.c offset = ahc_inb(ahc, TARG_OFFSET + i);
offset 4931 dev/ic/aic7xxx.c if ((scsirate & ~WIDEXFER) == 0 && offset != 0)
offset 4939 dev/ic/aic7xxx.c if (offset == 0)
offset 4942 dev/ic/aic7xxx.c tinfo->user.offset = MAX_OFFSET;
offset 4960 dev/ic/aic7xxx.c tinfo->user.offset = MAX_OFFSET;
offset 4963 dev/ic/aic7xxx.c tinfo->user.offset = 0;
offset 480 dev/ic/aic7xxx_inline.h int offset;
offset 482 dev/ic/aic7xxx_inline.h offset = scb - ahc->scb_data->scbarray;
offset 483 dev/ic/aic7xxx_inline.h return (&ahc->scb_data->sense[offset]);
offset 489 dev/ic/aic7xxx_inline.h int offset;
offset 491 dev/ic/aic7xxx_inline.h offset = scb - ahc->scb_data->scbarray;
offset 493 dev/ic/aic7xxx_inline.h + (offset * sizeof(struct scsi_sense_data)));
offset 453 dev/ic/aic7xxx_openbsd.c scb->hscb->scsioffset = tinfo->curr.offset;
offset 739 dev/ic/aic7xxx_openbsd.c u_int width, ppr_options, period, offset;
offset 768 dev/ic/aic7xxx_openbsd.c offset = 0;
offset 771 dev/ic/aic7xxx_openbsd.c offset = tinfo->user.offset;
offset 786 dev/ic/aic7xxx_openbsd.c ahc_validate_offset(ahc, NULL, syncrate, &offset, width,
offset 789 dev/ic/aic7xxx_openbsd.c if (offset == 0) {
offset 799 dev/ic/aic7xxx_openbsd.c ahc_set_syncrate(ahc, &devinfo, syncrate, period, offset, ppr_options,
offset 109 dev/ic/aic7xxx_openbsd.h #define ahc_dmamap_sync(ahc, dma_tag, dmamap, offset, len, op) \
offset 110 dev/ic/aic7xxx_openbsd.h bus_dmamap_sync(dma_tag, dmamap, offset, len, op)
offset 290 dev/ic/aic7xxx_seeprom.c u_int offset;
offset 293 dev/ic/aic7xxx_seeprom.c offset = MAX_OFFSET_ULTRA2;
offset 295 dev/ic/aic7xxx_seeprom.c offset = 0;
offset 296 dev/ic/aic7xxx_seeprom.c ahc_outb(ahc, TARG_OFFSET + i, offset);
offset 732 dev/ic/aic7xxxvar.h uint8_t offset; /* Sync offset */
offset 1286 dev/ic/aic7xxxvar.h u_int *offset, int wide,
offset 2327 dev/ic/ar5210.c ar5k_ar5210_eeprom_read(struct ath_hal *hal, u_int32_t offset, u_int16_t *data)
offset 2337 dev/ic/ar5210.c (void)AR5K_REG_READ(AR5K_AR5210_EEPROM_BASE + (4 * offset));
offset 2355 dev/ic/ar5210.c ar5k_ar5210_eeprom_write(struct ath_hal *hal, u_int32_t offset, u_int16_t data)
offset 2365 dev/ic/ar5210.c AR5K_REG_WRITE(AR5K_AR5210_EEPROM_BASE + (4 * offset), data);
offset 2459 dev/ic/ar5211.c ar5k_ar5211_eeprom_read(struct ath_hal *hal, u_int32_t offset, u_int16_t *data)
offset 2466 dev/ic/ar5211.c AR5K_REG_WRITE(AR5K_AR5211_EEPROM_BASE, (u_int8_t)offset);
offset 2486 dev/ic/ar5211.c ar5k_ar5211_eeprom_write(struct ath_hal *hal, u_int32_t offset, u_int16_t data)
offset 2499 dev/ic/ar5211.c AR5K_REG_WRITE(AR5K_AR5211_EEPROM_BASE, (u_int8_t)offset - 1);
offset 2834 dev/ic/ar5212.c ar5k_ar5212_eeprom_read(struct ath_hal *hal, u_int32_t offset, u_int16_t *data)
offset 2841 dev/ic/ar5212.c AR5K_REG_WRITE(AR5K_AR5212_EEPROM_BASE, (u_int8_t)offset);
offset 2861 dev/ic/ar5212.c ar5k_ar5212_eeprom_write(struct ath_hal *hal, u_int32_t offset, u_int16_t data)
offset 2874 dev/ic/ar5212.c AR5K_REG_WRITE(AR5K_AR5212_EEPROM_BASE, (u_int8_t)offset - 1);
offset 719 dev/ic/ar5xxx.c ar5k_eeprom_read_ants(struct ath_hal *hal, u_int32_t *offset, u_int mode)
offset 722 dev/ic/ar5xxx.c u_int32_t o = *offset;
offset 769 dev/ic/ar5xxx.c *offset = o;
offset 775 dev/ic/ar5xxx.c ar5k_eeprom_read_modes(struct ath_hal *hal, u_int32_t *offset, u_int mode)
offset 778 dev/ic/ar5xxx.c u_int32_t o = *offset;
offset 850 dev/ic/ar5xxx.c *offset = o;
offset 859 dev/ic/ar5xxx.c u_int32_t offset;
offset 887 dev/ic/ar5xxx.c for (cksum = 0, offset = 0; offset < AR5K_EEPROM_INFO_MAX; offset++) {
offset 888 dev/ic/ar5xxx.c AR5K_EEPROM_READ(AR5K_EEPROM_INFO(offset), val);
offset 918 dev/ic/ar5xxx.c offset = AR5K_EEPROM_CTL(hal->ah_ee_version);
offset 922 dev/ic/ar5xxx.c AR5K_EEPROM_READ(offset++, val);
offset 935 dev/ic/ar5xxx.c offset = AR5K_EEPROM_MODES_11A(hal->ah_ee_version);
offset 937 dev/ic/ar5xxx.c if ((ret = ar5k_eeprom_read_ants(hal, &offset, mode)) != 0)
offset 940 dev/ic/ar5xxx.c AR5K_EEPROM_READ(offset++, val);
offset 946 dev/ic/ar5xxx.c AR5K_EEPROM_READ(offset++, val);
offset 954 dev/ic/ar5xxx.c if ((ret = ar5k_eeprom_read_modes(hal, &offset, mode)) != 0)
offset 958 dev/ic/ar5xxx.c AR5K_EEPROM_READ(offset++, val);
offset 966 dev/ic/ar5xxx.c offset = AR5K_EEPROM_MODES_11B(hal->ah_ee_version);
offset 968 dev/ic/ar5xxx.c if ((ret = ar5k_eeprom_read_ants(hal, &offset, mode)) != 0)
offset 971 dev/ic/ar5xxx.c AR5K_EEPROM_READ(offset++, val);
offset 976 dev/ic/ar5xxx.c if ((ret = ar5k_eeprom_read_modes(hal, &offset, mode)) != 0)
offset 980 dev/ic/ar5xxx.c AR5K_EEPROM_READ(offset++, val);
offset 986 dev/ic/ar5xxx.c AR5K_EEPROM_READ(offset++, val);
offset 999 dev/ic/ar5xxx.c offset = AR5K_EEPROM_MODES_11G(hal->ah_ee_version);
offset 1001 dev/ic/ar5xxx.c if ((ret = ar5k_eeprom_read_ants(hal, &offset, mode)) != 0)
offset 1004 dev/ic/ar5xxx.c AR5K_EEPROM_READ(offset++, val);
offset 1009 dev/ic/ar5xxx.c if ((ret = ar5k_eeprom_read_modes(hal, &offset, mode)) != 0)
offset 1013 dev/ic/ar5xxx.c AR5K_EEPROM_READ(offset++, val);
offset 1019 dev/ic/ar5xxx.c AR5K_EEPROM_READ(offset++, val);
offset 1023 dev/ic/ar5xxx.c AR5K_EEPROM_READ(offset++, val);
offset 1031 dev/ic/ar5xxx.c AR5K_EEPROM_READ(offset++, val);
offset 1036 dev/ic/ar5xxx.c AR5K_EEPROM_READ(offset++, val);
offset 1051 dev/ic/ar5xxx.c u_int32_t total, offset;
offset 1062 dev/ic/ar5xxx.c for (offset = 0x1f, octet = 0, total = 0;
offset 1063 dev/ic/ar5xxx.c offset >= 0x1d; offset--) {
offset 1064 dev/ic/ar5xxx.c if (hal->ah_eeprom_read(hal, offset, &data) != 0)
offset 1299 dev/ic/ar5xxx.c ar5k_rfregs_op(u_int32_t *rf, u_int32_t offset, u_int32_t reg, u_int32_t bits,
offset 1312 dev/ic/ar5xxx.c AR5K_PRINTF("invalid values at offset %u\n", offset);
offset 1316 dev/ic/ar5xxx.c entry = ((first - 1) / 8) + offset;
offset 1074 dev/ic/ar5xxx.h _t int (_a _n##_eeprom_read)(struct ath_hal *, u_int32_t offset, \
offset 1076 dev/ic/ar5xxx.h _t int (_a _n##_eeprom_write)(struct ath_hal *, u_int32_t offset, \
offset 1167 dev/ic/bha.c (!setup.reply.sync[i].offset &&
offset 1172 dev/ic/bha.c setup.reply.sync[i].offset, period.reply.period[i] * 10);
offset 1177 dev/ic/bha.c (!setup.reply_w.sync_high[i].offset &&
offset 1182 dev/ic/bha.c setup.reply_w.sync_high[i].offset,
offset 409 dev/ic/bhareg.h u_char offset :4,
offset 415 dev/ic/bhareg.h offset :4;
offset 282 dev/ic/bt8xx.h short offset;
offset 2131 dev/ic/dc.c int i, pos, offset;
offset 2137 dev/ic/dc.c offset = offsetof(struct dc_list_data, dc_rx_list[pos]);
offset 2139 dev/ic/dc.c offset, sizeof(struct dc_desc),
offset 2169 dev/ic/dc.c int i, offset, total_len = 0;
offset 2178 dev/ic/dc.c offset = offsetof(struct dc_list_data, dc_rx_list[i]);
offset 2180 dev/ic/dc.c offset, sizeof(struct dc_desc),
offset 2274 dev/ic/dc.c int idx, offset;
offset 2286 dev/ic/dc.c offset = offsetof(struct dc_list_data, dc_tx_list[idx]);
offset 2288 dev/ic/dc.c offset, sizeof(struct dc_desc),
offset 2370 dev/ic/dc.c offset, sizeof(struct dc_desc),
offset 1649 dev/ic/elink3.c epreadeeprom(iot, ioh, offset)
offset 1652 dev/ic/elink3.c int offset;
offset 1657 dev/ic/elink3.c bus_space_write_1(iot, ioh, 0, 0x80 + offset);
offset 1694 dev/ic/elink3.c ep_read_eeprom(sc, offset)
offset 1696 dev/ic/elink3.c u_int16_t offset;
offset 1712 dev/ic/elink3.c readcmd | offset);
offset 231 dev/ic/fxp.c fxp_eeprom_putword(struct fxp_softc *sc, int offset, u_int16_t data)
offset 248 dev/ic/fxp.c fxp_eeprom_shiftin(sc, offset, sc->eeprom_size);
offset 275 dev/ic/fxp.c fxp_write_eeprom(struct fxp_softc *sc, u_short *data, int offset, int words)
offset 280 dev/ic/fxp.c fxp_eeprom_putword(sc, offset + i, data[i]);
offset 629 dev/ic/fxp.c fxp_read_eeprom(struct fxp_softc *sc, u_short *data, int offset,
offset 657 dev/ic/fxp.c if ((i + offset) & (1 << (x - 1))) {
offset 1000 dev/ic/i82365.c (h->mem[win].offset >> PCIC_CARDMEM_ADDRX_SHIFT) & 0xff);
offset 1002 dev/ic/i82365.c ((h->mem[win].offset >> (PCIC_CARDMEM_ADDRX_SHIFT + 8)) &
offset 1090 dev/ic/i82365.c h->mem[win].offset = card_offset;
offset 1295 dev/ic/i82365.c pcic_chip_io_map(pch, width, offset, size, pcihp, windowp)
offset 1298 dev/ic/i82365.c bus_addr_t offset;
offset 1304 dev/ic/i82365.c bus_addr_t ioaddr = pcihp->addr + offset;
offset 67 dev/ic/i82365var.h long offset;
offset 216 dev/ic/i82596var.h u_int16_t (*ie_bus_read16)(struct ie_softc *, int offset);
offset 217 dev/ic/i82596var.h void (*ie_bus_write16)(struct ie_softc *, int offset,
offset 219 dev/ic/i82596var.h void (*ie_bus_write24)(struct ie_softc *, int offset,
offset 5484 dev/ic/isp.c u_int16_t flags, period, offset;
offset 5566 dev/ic/isp.c offset = mbs.param[3] >> 8;
offset 5569 dev/ic/isp.c sdp->isp_devparam[tgt].actv_offset = offset;
offset 139 dev/ic/isp_openbsd.h #define MEMORYBARRIER(isp, type, offset, size) \
offset 143 dev/ic/isp_openbsd.h off_t off = (off_t) offset * QENTRY_LEN; \
offset 150 dev/ic/isp_openbsd.h off_t off = (off_t) offset * QENTRY_LEN; \
offset 157 dev/ic/isp_openbsd.h off_t off = (off_t) offset; \
offset 164 dev/ic/isp_openbsd.h off_t off = (off_t) offset; \
offset 174 dev/ic/isp_openbsd.h #define MEMORYBARRIER(isp, type, offset, size)
offset 268 dev/ic/lemac.c lemac_input(struct lemac_softc *sc, bus_size_t offset, size_t length)
offset 281 dev/ic/lemac.c LEMAC_GETBUF16(sc, offset, sizeof(eh) / 2, (void *)&eh);
offset 303 dev/ic/lemac.c LEMAC_GETBUF16(sc, offset + sizeof(eh),
offset 308 dev/ic/lemac.c offset + length - 1);
offset 68 dev/ic/lm700x.c lm->init(lm->iot, lm->ioh, lm->offset, lm->rsetdata | addon);
offset 72 dev/ic/lm700x.c bus_space_write_1(lm->iot, lm->ioh, lm->offset,
offset 75 dev/ic/lm700x.c bus_space_write_1(lm->iot, lm->ioh, lm->offset,
offset 78 dev/ic/lm700x.c bus_space_write_1(lm->iot, lm->ioh, lm->offset,
offset 81 dev/ic/lm700x.c bus_space_write_1(lm->iot, lm->ioh, lm->offset,
offset 84 dev/ic/lm700x.c bus_space_write_1(lm->iot, lm->ioh, lm->offset,
offset 87 dev/ic/lm700x.c bus_space_write_1(lm->iot, lm->ioh, lm->offset,
offset 91 dev/ic/lm700x.c lm->rset(lm->iot, lm->ioh, lm->offset, lm->rsetdata | addon);
offset 61 dev/ic/lm700x.h bus_size_t offset;
offset 35 dev/ic/mc6845reg.h char vsyncs, vsynce, vde, offset;
offset 384 dev/ic/mpi.c struct mpi_cfg_raid_physdisk *physdisk, int period, int offset, int try)
offset 394 dev/ic/mpi.c "link quirks: 0x%x\n", DEVNAME(sc), period, offset, try,
offset 452 dev/ic/mpi.c pg1.req_offset = offset;
offset 456 dev/ic/ncr53c9x.c ti->offset = 0;
offset 547 dev/ic/ncr53c9x.c syncoff = ti->offset;
offset 1634 dev/ic/ncr53c9x.c ti->offset = sc->sc_imess[4];
offset 1637 dev/ic/ncr53c9x.c ti->offset == 0 ||
offset 1648 dev/ic/ncr53c9x.c ti->offset = 0;
offset 1679 dev/ic/ncr53c9x.c if (ti->offset > 15)
offset 1680 dev/ic/ncr53c9x.c ti->offset = 15;
offset 1830 dev/ic/ncr53c9x.c sc->sc_omess[4] = ti->offset;
offset 2408 dev/ic/ncr53c9x.c ti->offset = 15;
offset 183 dev/ic/ncr53c9xvar.h u_char offset; /* Offset suggestion */
offset 660 dev/ic/oosiop.c oosiop_set_syncparam(struct oosiop_softc *sc, int id, int period, int offset)
offset 666 dev/ic/oosiop.c if (offset == 0) {
offset 685 dev/ic/oosiop.c sc->sc_tgt[id].sxfer = ((i - 4) << 4) | offset;
offset 699 dev/ic/oosiop.c sc->sc_tgt[id].sxfer = (synctbl[i].tp << 4) | offset;
offset 899 dev/ic/osiop.c sc->sc_tinfo[i].offset = 0;
offset 1019 dev/ic/osiop.c ti->offset = 0;
offset 1189 dev/ic/osiop.c ti->offset = 0;
offset 1234 dev/ic/osiop.c ti->offset = ds->msgbuf[5];
offset 1860 dev/ic/osiop.c if (ti->offset != 0) {
offset 1896 dev/ic/osiop.c printf(" MHz %d REQ/ACK offset", ti->offset);
offset 1913 dev/ic/osiop.c int period, offset, sxfer, sbcl;
offset 1919 dev/ic/osiop.c offset = sc->sc_tinfo[target].offset;
offset 1923 dev/ic/osiop.c if (offset <= OSIOP_MAX_OFFSET)
offset 1924 dev/ic/osiop.c sxfer = offset;
offset 1949 dev/ic/osiop.c sxfer = (sxfer << 4) | ((offset <= OSIOP_MAX_OFFSET) ?
offset 1950 dev/ic/osiop.c offset : OSIOP_MAX_OFFSET);
offset 185 dev/ic/osiopvar.h int offset; /* Offset suggestion */
offset 139 dev/ic/pdqvar.h #define PDQ_OS_IORD_32(t, base, offset) bus_space_read_4 (t, base, offset)
offset 140 dev/ic/pdqvar.h #define PDQ_OS_IOWR_32(t, base, offset, data) bus_space_write_4 (t, base, offset, data)
offset 141 dev/ic/pdqvar.h #define PDQ_OS_IORD_8(t, base, offset) bus_space_read_1 (t, base, offset)
offset 142 dev/ic/pdqvar.h #define PDQ_OS_IOWR_8(t, base, offset, data) bus_space_write_1 (t, base, offset, data)
offset 143 dev/ic/pdqvar.h #define PDQ_OS_MEMRD_32(t, base, offset) bus_space_read_4(t, base, offset)
offset 144 dev/ic/pdqvar.h #define PDQ_OS_MEMWR_32(t, base, offset, data) bus_space_write_4(t, base, offset, data)
offset 145 dev/ic/pdqvar.h #define PDQ_CSR_OFFSET(base, offset) (0 + (offset)*sizeof(pdq_uint32_t))
offset 170 dev/ic/pdqvar.h #define PDQ_OS_IORD_32(t, base, offset) inl((base) + (offset))
offset 171 dev/ic/pdqvar.h #define PDQ_OS_IOWR_32(t, base, offset, data) outl((base) + (offset), data)
offset 172 dev/ic/pdqvar.h #define PDQ_OS_IORD_8(t, base, offset) inb((base) + (offset))
offset 173 dev/ic/pdqvar.h #define PDQ_OS_IOWR_8(t, base, offset, data) outb((base) + (offset), data)
offset 174 dev/ic/pdqvar.h #define PDQ_OS_MEMRD_32(t, base, offset) (0 + *((base) + (offset)))
offset 175 dev/ic/pdqvar.h #define PDQ_OS_MEMWR_32(t, base, offset, data) do *((base) + (offset)) = (data); while (0)
offset 178 dev/ic/pdqvar.h #define PDQ_CSR_OFFSET(base, offset) (0 + (base) + (offset))
offset 206 dev/ic/pgt.c pgt_read_4(struct pgt_softc *sc, uint16_t offset)
offset 208 dev/ic/pgt.c return (bus_space_read_4(sc->sc_iotag, sc->sc_iohandle, offset));
offset 212 dev/ic/pgt.c pgt_write_4(struct pgt_softc *sc, uint16_t offset, uint32_t value)
offset 214 dev/ic/pgt.c bus_space_write_4(sc->sc_iotag, sc->sc_iohandle, offset, value);
offset 222 dev/ic/pgt.c pgt_write_4_flush(struct pgt_softc *sc, uint16_t offset, uint32_t value)
offset 224 dev/ic/pgt.c bus_space_write_4(sc->sc_iotag, sc->sc_iohandle, offset, value);
offset 244 dev/ic/rt2661reg.h uint8_t offset;
offset 272 dev/ic/rt2661reg.h uint8_t offset;
offset 320 dev/ic/rt2661reg.h #define RAL_READ_REGION_4(sc, offset, datap, count) \
offset 321 dev/ic/rt2661reg.h bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
offset 334 dev/ic/rt2661reg.h #define RAL_WRITE_REGION_1(sc, offset, datap, count) \
offset 335 dev/ic/rt2661reg.h bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \
offset 788 dev/ic/rtl81x9reg.h #define CSR_SETBIT_1(sc, offset, val) \
offset 789 dev/ic/rtl81x9reg.h CSR_WRITE_1(sc, offset, CSR_READ_1(sc, offset) | (val))
offset 791 dev/ic/rtl81x9reg.h #define CSR_CLRBIT_1(sc, offset, val) \
offset 792 dev/ic/rtl81x9reg.h CSR_WRITE_1(sc, offset, CSR_READ_1(sc, offset) & ~(val))
offset 794 dev/ic/rtl81x9reg.h #define CSR_SETBIT_2(sc, offset, val) \
offset 795 dev/ic/rtl81x9reg.h CSR_WRITE_2(sc, offset, CSR_READ_2(sc, offset) | (val))
offset 797 dev/ic/rtl81x9reg.h #define CSR_CLRBIT_2(sc, offset, val) \
offset 798 dev/ic/rtl81x9reg.h CSR_WRITE_2(sc, offset, CSR_READ_2(sc, offset) & ~(val))
offset 800 dev/ic/rtl81x9reg.h #define CSR_SETBIT_4(sc, offset, val) \
offset 801 dev/ic/rtl81x9reg.h CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) | (val))
offset 803 dev/ic/rtl81x9reg.h #define CSR_CLRBIT_4(sc, offset, val) \
offset 804 dev/ic/rtl81x9reg.h CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) & ~(val))
offset 140 dev/ic/siop.c bus_addr_t offset;
offset 142 dev/ic/siop.c offset = siop_cmd->cmd_c.dsa -
offset 144 dev/ic/siop.c bus_dmamap_sync(sc->sc_dmat, siop_cmd->siop_cbdp->xferdma, offset,
offset 159 dev/ic/siop.c siop_script_read(sc, offset)
offset 161 dev/ic/siop.c u_int offset;
offset 165 dev/ic/siop.c offset * 4);
offset 167 dev/ic/siop.c return siop_ctoh32(&sc->sc_c, sc->sc_c.sc_script[offset]);
offset 172 dev/ic/siop.c siop_script_write(sc, offset, val)
offset 174 dev/ic/siop.c u_int offset;
offset 179 dev/ic/siop.c offset * 4, val);
offset 181 dev/ic/siop.c sc->sc_c.sc_script[offset] = siop_htoc32(&sc->sc_c, val);
offset 362 dev/ic/siop.c int offset, target, lun, tag;
offset 791 dev/ic/siop.c siop_target->target_c.offset = 0;
offset 802 dev/ic/siop.c siop_target->target_c.offset = 0;
offset 983 dev/ic/siop.c offset = bus_space_read_1(sc->sc_c.sc_rt,
offset 986 dev/ic/siop.c printf("disconnect offset %d\n", offset);
offset 988 dev/ic/siop.c siop_sdp(&siop_cmd->cmd_c, offset);
offset 997 dev/ic/siop.c offset = bus_space_read_1(sc->sc_c.sc_rt,
offset 1000 dev/ic/siop.c printf("saveoffset offset %d\n", offset);
offset 1002 dev/ic/siop.c siop_cmd->saved_offset = offset;
offset 1031 dev/ic/siop.c offset = bus_space_read_1(sc->sc_c.sc_rt,
offset 1039 dev/ic/siop.c if (offset == 0 &&
offset 1041 dev/ic/siop.c offset = siop_cmd->saved_offset;
offset 1042 dev/ic/siop.c siop_update_resid(&siop_cmd->cmd_c, offset);
offset 1312 dev/ic/siop.c sc->sc_c.targets[target]->offset = 0;
offset 364 dev/ic/siop_common.c siop_target->offset = siop_target->period = 0;
offset 406 dev/ic/siop_common.c siop_target->offset = siop_target->period = 0;
offset 422 dev/ic/siop_common.c int sync, offset, options, scf = 0;
offset 435 dev/ic/siop_common.c offset = tables->msg_in[5];
offset 443 dev/ic/siop_common.c siop_target->offset = 0;
offset 448 dev/ic/siop_common.c if (offset > sc->maxoff || sync < sc->dt_minsync ||
offset 452 dev/ic/siop_common.c sc->sc_dev.dv_xname, target, offset, sync);
offset 456 dev/ic/siop_common.c siop_target->offset = 0;
offset 467 dev/ic/siop_common.c siop_target->offset = offset;
offset 483 dev/ic/siop_common.c siop_target->offset = 0;
offset 495 dev/ic/siop_common.c siop_target->offset = 0;
offset 505 dev/ic/siop_common.c (siop_target->offset & SXFER_MO_MASK) << 8;
offset 535 dev/ic/siop_common.c int sync, maxoffset, offset, i;
offset 543 dev/ic/siop_common.c offset = tables->msg_in[4];
offset 549 dev/ic/siop_common.c printf("sdtr: sync %d offset %d\n", sync, offset);
offset 551 dev/ic/siop_common.c if (offset > maxoffset || sync < sc->st_minsync ||
offset 560 dev/ic/siop_common.c siop_target->offset = offset;
offset 576 dev/ic/siop_common.c (offset & SXFER_MO_MASK) << 8;
offset 593 dev/ic/siop_common.c siop_target->offset = siop_target->period = 0;
offset 596 dev/ic/siop_common.c printf("sdtr (target): sync %d offset %d\n", sync, offset);
offset 598 dev/ic/siop_common.c if (offset == 0 || sync > sc->st_maxsync) { /* async */
offset 601 dev/ic/siop_common.c if (offset > maxoffset)
offset 602 dev/ic/siop_common.c offset = maxoffset;
offset 612 dev/ic/siop_common.c siop_target->offset = offset;
offset 628 dev/ic/siop_common.c (offset & SXFER_MO_MASK) << 8;
offset 630 dev/ic/siop_common.c siop_sdtr_msg(siop_cmd, 0, sync, offset);
offset 636 dev/ic/siop_common.c siop_target->offset = siop_target->period = 0;
offset 663 dev/ic/siop_common.c siop_sdtr_msg(siop_cmd, offset, ssync, soff)
offset 665 dev/ic/siop_common.c int offset;
offset 668 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;
offset 669 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_SDTR_LEN;
offset 670 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_SDTR;
offset 671 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 3] = ssync;
offset 672 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 4] = soff;
offset 674 dev/ic/siop_common.c siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_SDTR_LEN + 2);
offset 678 dev/ic/siop_common.c siop_wdtr_msg(siop_cmd, offset, wide)
offset 680 dev/ic/siop_common.c int offset;
offset 683 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;
offset 684 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_WDTR_LEN;
offset 685 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_WDTR;
offset 686 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 3] = wide;
offset 688 dev/ic/siop_common.c siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_WDTR_LEN + 2);
offset 692 dev/ic/siop_common.c siop_ppr_msg(siop_cmd, offset, ssync, soff)
offset 694 dev/ic/siop_common.c int offset;
offset 697 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;
offset 698 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_PPR_LEN;
offset 699 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_PPR;
offset 700 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 3] = ssync;
offset 701 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 4] = 0; /* reserved */
offset 702 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 5] = soff;
offset 703 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 6] = 1; /* wide */
offset 704 dev/ic/siop_common.c siop_cmd->siop_tables->msg_out[offset + 7] = MSG_EXT_PPR_PROT_DT;
offset 706 dev/ic/siop_common.c siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_PPR_LEN + 2);
offset 723 dev/ic/siop_common.c int offset, dbc, sstat;
offset 735 dev/ic/siop_common.c offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCRATCHA + 1);
offset 736 dev/ic/siop_common.c if (offset >= SIOP_NSG) {
offset 738 dev/ic/siop_common.c sc->sc_dev.dv_xname, offset);
offset 741 dev/ic/siop_common.c table = &siop_cmd->siop_tables->data[offset];
offset 743 dev/ic/siop_common.c printf("siop_ma: offset %d count=%d addr=0x%x ", offset,
offset 787 dev/ic/siop_common.c siop_sdp(siop_cmd, offset)
offset 789 dev/ic/siop_common.c int offset;
offset 803 dev/ic/siop_common.c if (offset == SIOP_NSG)
offset 806 dev/ic/siop_common.c if (offset > SIOP_NSG) {
offset 808 dev/ic/siop_common.c printf(": offset %d > %d\n", offset, SIOP_NSG);
offset 822 dev/ic/siop_common.c siop_update_resid(siop_cmd, offset);
offset 830 dev/ic/siop_common.c table = &siop_cmd->siop_tables->data[offset];
offset 843 dev/ic/siop_common.c bcopy(&siop_cmd->siop_tables->data[offset],
offset 845 dev/ic/siop_common.c (SIOP_NSG - offset) * sizeof(scr_table_t));
offset 849 dev/ic/siop_common.c siop_update_resid(siop_cmd, offset)
offset 851 dev/ic/siop_common.c int offset;
offset 865 dev/ic/siop_common.c for (i = 0; i < offset; i++)
offset 874 dev/ic/siop_common.c table = &siop_cmd->siop_tables->data[offset];
offset 884 dev/ic/siop_common.c int offset;
offset 896 dev/ic/siop_common.c offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCRATCHA + 1);
offset 902 dev/ic/siop_common.c offset--;
offset 903 dev/ic/siop_common.c table = &siop_cmd->siop_tables->data[offset];
offset 920 dev/ic/siop_common.c SIOP_SCRATCHA + 1, offset);
offset 1038 dev/ic/siop_common.c if (siop_target->offset == 0)
offset 1070 dev/ic/siop_common.c printf(" MHz %d REQ/ACK offset ", siop_target->offset);
offset 114 dev/ic/siopvar_common.h int offset;
offset 79 dev/ic/sti.c paddr_t sti_mmap(void *v, off_t offset, int prot);
offset 366 dev/ic/sti.c *p = bases[p - cc->regions] + (r.offset << PGSHIFT);
offset 881 dev/ic/sti.c sti_mmap(v, offset, prot)
offset 883 dev/ic/sti.c off_t offset;
offset 165 dev/ic/stireg.h u_int offset :14; /* page offset dev io space relative */
offset 92 dev/ic/tc921x.c bus_space_write_1(c->iot, c->ioh, c->offset, PH_CH_DH(c));
offset 94 dev/ic/tc921x.c bus_space_write_1(c->iot, c->ioh, c->offset, PL_CH_DH(c));
offset 108 dev/ic/tc921x.c bus_space_write_1(c->iot, c->ioh, c->offset, PL_CH_DH(c));
offset 109 dev/ic/tc921x.c bus_space_write_1(c->iot, c->ioh, c->offset, PH_CH_DH(c));
offset 117 dev/ic/tc921x.c bus_space_write_1(c->iot, c->ioh, c->offset, PH_CH_DH(c));
offset 119 dev/ic/tc921x.c bus_space_write_1(c->iot, c->ioh, c->offset, PL_CH_DH(c));
offset 133 dev/ic/tc921x.c bus_space_write_1(c->iot, c->ioh, c->offset, PL_CH_DH(c));
offset 134 dev/ic/tc921x.c bus_space_write_1(c->iot, c->ioh, c->offset, PH_CH_DH(c));
offset 149 dev/ic/tc921x.c bus_space_write_1(c->iot, c->ioh, c->offset, cldh);
offset 150 dev/ic/tc921x.c bus_space_write_1(c->iot, c->ioh, c->offset, chdh);
offset 152 dev/ic/tc921x.c bus_space_write_1(c->iot, c->ioh, c->offset, cldl);
offset 153 dev/ic/tc921x.c bus_space_write_1(c->iot, c->ioh, c->offset, chdl);
offset 165 dev/ic/tc921x.c bus_space_write_1(c->iot, c->ioh, c->offset, PH_CL_DH(c));
offset 166 dev/ic/tc921x.c bus_space_write_1(c->iot, c->ioh, c->offset, PH_CH_DH(c));
offset 167 dev/ic/tc921x.c ret |= bus_space_read_1(c->iot, c->ioh, c->offset) & DATA_ON ?
offset 99 dev/ic/tc921x.h bus_size_t offset;
offset 873 dev/ic/tcic2.c (u_long)h->mem[win].offset));
offset 895 dev/ic/tcic2.c reg = ((h->mem[win].offset >> TCIC_MEM_SHIFT) & TCIC_MMAP_ADDR_MASK);
offset 1008 dev/ic/tcic2.c h->mem[win].offset = card_offset;
offset 1178 dev/ic/tcic2.c tcic_chip_io_map(pch, width, offset, size, pcihp, windowp)
offset 1181 dev/ic/tcic2.c bus_addr_t offset;
offset 1187 dev/ic/tcic2.c bus_addr_t ioaddr = pcihp->addr + offset;
offset 67 dev/ic/tcic2var.h long offset;
offset 114 dev/ic/tea5757.c reg = tea->read(tea->iot, tea->ioh, tea->offset);
offset 123 dev/ic/tea5757.c tea->init(tea->iot, tea->ioh, tea->offset, 0);
offset 127 dev/ic/tea5757.c tea->write_bit(tea->iot, tea->ioh, tea->offset, 1);
offset 129 dev/ic/tea5757.c tea->write_bit(tea->iot, tea->ioh, tea->offset, 0);
offset 131 dev/ic/tea5757.c tea->rset(tea->iot, tea->ioh, tea->offset, 0);
offset 69 dev/ic/tea5757.h bus_size_t offset;
offset 638 dev/ic/vga.c vga_mmap(v, offset, prot)
offset 640 dev/ic/vga.c off_t offset;
offset 646 dev/ic/vga.c return (*vc->vc_mmap)(v, offset, prot);
offset 90 dev/ic/vga_subr.c int offset, i, j, s;
offset 93 dev/ic/vga_subr.c offset = (fontset << 13) | (first << 5);
offset 101 dev/ic/vga_subr.c offset + (i << 5) + j,
offset 247 dev/ipmi.c bmc_read(struct ipmi_softc *sc, int offset)
offset 250 dev/ipmi.c offset * sc->sc_if_iospacing));
offset 254 dev/ipmi.c bmc_write(struct ipmi_softc *sc, int offset, u_int8_t val)
offset 257 dev/ipmi.c offset * sc->sc_if_iospacing, val);
offset 266 dev/ipmi.c *a->v = bmc_read(sc, a->offset);
offset 283 dev/ipmi.c bmc_io_wait(struct ipmi_softc *sc, int offset, u_int8_t mask, u_int8_t value,
offset 290 dev/ipmi.c return (bmc_io_wait_cold(sc, offset, mask, value, lbl));
offset 295 dev/ipmi.c args.offset = offset;
offset 316 dev/ipmi.c bmc_io_wait_cold(struct ipmi_softc *sc, int offset, u_int8_t mask,
offset 323 dev/ipmi.c v = bmc_read(sc, offset);
offset 1091 dev/ipmi.c u_int8_t offset, u_int8_t length, void *buffer, u_int16_t *nxtRecordId)
offset 1098 dev/ipmi.c cmd[4] = offset;
offset 1123 dev/ipmi.c int len, sdrlen, offset;
offset 1152 dev/ipmi.c for (offset = sizeof(shdr); offset < sdrlen; offset += maxsdrlen) {
offset 1153 dev/ipmi.c len = sdrlen - offset;
offset 1157 dev/ipmi.c if (get_sdr_partial(sc, recid, resid, offset, len,
offset 1158 dev/ipmi.c psdr + offset, NULL)) {
offset 1159 dev/ipmi.c printf(": get chunk: %d,%d fails\n", offset, len);
offset 49 dev/ipmivar.h int offset;
offset 1108 dev/isa/aha.c (!setup.reply.sync[i].offset &&
offset 1112 dev/isa/aha.c sc->sc_dev.dv_xname, i, setup.reply.sync[i].offset,
offset 250 dev/isa/ahareg.h u_char offset:4;
offset 175 dev/isa/aztech.c sc->lm.offset = 0;
offset 284 dev/isa/aztech.c sc.lm.offset = 0;
offset 600 dev/isa/ega.c ega_mmap(v, offset, prot)
offset 602 dev/isa/ega.c off_t offset;
offset 141 dev/isa/if_ex.c #define ISA_GET(offset) bus_space_read_1(sc->sc_iot, sc->sc_ioh, (offset))
offset 142 dev/isa/if_ex.c #define ISA_PUT(offset, value) bus_space_write_1(sc->sc_iot, sc->sc_ioh, \
offset 143 dev/isa/if_ex.c (offset), (value))
offset 144 dev/isa/if_ex.c #define ISA_GET_2(offset) bus_space_read_2(sc->sc_iot, sc->sc_ioh, \
offset 145 dev/isa/if_ex.c (offset))
offset 146 dev/isa/if_ex.c #define ISA_PUT_2(offset, value) bus_space_write_2(sc->sc_iot, sc->sc_ioh, \
offset 147 dev/isa/if_ex.c (offset), (value))
offset 148 dev/isa/if_ex.c #define ISA_GET_2_MULTI(offset, addr, count) bus_space_read_multi_2( \
offset 149 dev/isa/if_ex.c sc->sc_iot, sc->sc_ioh, (offset), (addr), (count))
offset 150 dev/isa/if_ex.c #define ISA_PUT_2_MULTI(offset, addr, count) bus_space_write_multi_2( \
offset 151 dev/isa/if_ex.c sc->sc_iot, sc->sc_ioh, (offset), (addr), (count))
offset 348 dev/isa/pcdisplay.c pcdisplay_mmap(v, offset, prot)
offset 350 dev/isa/pcdisplay.c off_t offset;
offset 172 dev/isa/radiotrack2.c sc->tea.offset = 0;
offset 223 dev/isa/radiotrack2.c sc.tea.offset = 0;
offset 240 dev/isa/radiotrack2.c freq = rtii_hw_read(iot, ioh, sc.tea.offset);
offset 295 dev/isa/radiotrack2.c sc->tea.ioh, sc->tea.offset), sc->tea.flags & TEA5757_TEA5759);
offset 231 dev/isa/seagate.c int offset, length;
offset 367 dev/isa/seagate.c if (!bcmp(sea->maddr + signatures[i].offset,
offset 164 dev/isa/sf16fmr.c sc.c.offset = 0;
offset 186 dev/isa/sf16fmr2.c sc->tea.offset = 0;
offset 198 dev/isa/sf16fmr2.c type = sf2r_read_register(sc->tea.iot, sc->tea.ioh, sc->tea.offset);
offset 265 dev/isa/sf16fmr2.c sc.tea.offset = 0;
offset 283 dev/isa/sf16fmr2.c freq = sf2r_read_register(iot, ioh, sc.tea.offset);
offset 356 dev/isa/sf16fmr2.c buf = sf2r_read_register(sc->tea.iot, sc->tea.ioh, sc->tea.offset);
offset 862 dev/microcode/aic7xxx/aicasm_gram.y $$.offset = 0;
offset 877 dev/microcode/aic7xxx/aicasm_gram.y $$.offset = $3->info.cinfo->value;
offset 888 dev/microcode/aic7xxx/aicasm_gram.y $$.offset = $3;
offset 897 dev/microcode/aic7xxx/aicasm_gram.y $$.offset = 0;
offset 947 dev/microcode/aic7xxx/aicasm_gram.y $$.offset = 0;
offset 1028 dev/microcode/aic7xxx/aicasm_gram.y $$.offset = 0;
offset 1033 dev/microcode/aic7xxx/aicasm_gram.y $$.offset = $3;
offset 1038 dev/microcode/aic7xxx/aicasm_gram.y $$.offset = -$3;
offset 1043 dev/microcode/aic7xxx/aicasm_gram.y $$.offset = 0;
offset 1048 dev/microcode/aic7xxx/aicasm_gram.y $$.offset = $3;
offset 1053 dev/microcode/aic7xxx/aicasm_gram.y $$.offset = -$3;
offset 1630 dev/microcode/aic7xxx/aicasm_gram.y + dest->offset;
offset 1632 dev/microcode/aic7xxx/aicasm_gram.y + src->offset;
offset 1703 dev/microcode/aic7xxx/aicasm_gram.y + dest->offset;
offset 1705 dev/microcode/aic7xxx/aicasm_gram.y + src->offset;
offset 1762 dev/microcode/aic7xxx/aicasm_gram.y addr = instruction_ptr + address->offset;
offset 1765 dev/microcode/aic7xxx/aicasm_gram.y addr = address->offset;
offset 1768 dev/microcode/aic7xxx/aicasm_gram.y addr = address->symbol->info.linfo->address + address->offset;
offset 1772 dev/microcode/aic7xxx/aicasm_gram.y + src->offset;
offset 145 dev/microcode/aic7xxx/aicasm_symbol.h int offset;
offset 105 dev/microcode/ncr53cxxx/ncr53cxxx.c unsigned offset;
offset 362 dev/microcode/ncr53cxxx/ncr53cxxx.c fprintf (outfp, "\t%08x,\n", p->offset / 4);
offset 480 dev/microcode/ncr53cxxx/ncr53cxxx.c if (p->offset > dsps)
offset 483 dev/microcode/ncr53cxxx/ncr53cxxx.c script[p->offset / 4] = dsps - p->offset - 4;
offset 672 dev/microcode/ncr53cxxx/ncr53cxxx.c p->offset = dsps + 4;
offset 687 dev/microcode/ncr53cxxx/ncr53cxxx.c p->offset = dsps + 4;
offset 115 dev/microcode/siop/ncr53cxxx.c unsigned offset;
offset 464 dev/microcode/siop/ncr53cxxx.c fprintf (outfp, "\t0x%08x,\n", p->offset / 4);
offset 529 dev/microcode/siop/ncr53cxxx.c fprintf (outfp, "\t0x%08x,\n", p->offset / 4);
offset 647 dev/microcode/siop/ncr53cxxx.c if (p->offset > dsps)
offset 650 dev/microcode/siop/ncr53cxxx.c script[p->offset / 4] += dsps;
offset 681 dev/microcode/siop/ncr53cxxx.c p->offset = dsps + 4;
offset 849 dev/microcode/siop/ncr53cxxx.c p->offset = dsps + 4;
offset 864 dev/microcode/siop/ncr53cxxx.c p->offset = dsps + 4;
offset 74 dev/mii/mii.c int bmsr, offset = 0;
offset 104 dev/mii/mii.c offset++;
offset 125 dev/mii/mii.c if (offloc != MII_OFFSET_ANY && offloc != offset) {
offset 126 dev/mii/mii.c offset++;
offset 150 dev/mii/mii.c child->mii_offset = offset;
offset 153 dev/mii/mii.c offset++;
offset 511 dev/pci/agp.c off_t offset)
offset 527 dev/pci/agp.c if (offset < 0
offset 528 dev/pci/agp.c || (offset & (AGP_PAGE_SIZE - 1)) != 0
offset 529 dev/pci/agp.c || offset + mem->am_size > AGP_GET_APERTURE(sc)) {
offset 531 dev/pci/agp.c (unsigned long) offset);
offset 596 dev/pci/agp.c (unsigned long)(offset + done + j),
offset 598 dev/pci/agp.c error = AGP_BIND_PAGE(sc, offset + done + j, pa);
offset 605 dev/pci/agp.c AGP_UNBIND_PAGE(sc, offset + k);
offset 632 dev/pci/agp.c mem->am_offset = offset;
offset 213 dev/pci/agp_ali.c agp_ali_bind_page(struct vga_pci_softc *sc, off_t offset, bus_addr_t physical)
offset 217 dev/pci/agp_ali.c if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
offset 220 dev/pci/agp_ali.c asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical;
offset 225 dev/pci/agp_ali.c agp_ali_unbind_page(struct vga_pci_softc *sc, off_t offset)
offset 229 dev/pci/agp_ali.c if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
offset 232 dev/pci/agp_ali.c asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
offset 292 dev/pci/agp_amd.c agp_amd_bind_page(struct vga_pci_softc *sc, off_t offset, bus_addr_t physical)
offset 296 dev/pci/agp_amd.c if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
offset 299 dev/pci/agp_amd.c asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1;
offset 304 dev/pci/agp_amd.c agp_amd_unbind_page(struct vga_pci_softc *sc, off_t offset)
offset 308 dev/pci/agp_amd.c if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
offset 311 dev/pci/agp_amd.c asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
offset 594 dev/pci/agp_i810.c agp_i810_bind_page(struct vga_pci_softc *sc, off_t offset, bus_addr_t physical)
offset 598 dev/pci/agp_i810.c if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
offset 601 dev/pci/agp_i810.c (int)offset, AGP_PAGE_SHIFT,
offset 608 dev/pci/agp_i810.c if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) {
offset 616 dev/pci/agp_i810.c WRITE_GATT(offset, physical);
offset 621 dev/pci/agp_i810.c agp_i810_unbind_page(struct vga_pci_softc *sc, off_t offset)
offset 625 dev/pci/agp_i810.c if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT))
offset 629 dev/pci/agp_i810.c if ((offset >> AGP_PAGE_SHIFT) < isc->stolen) {
offset 637 dev/pci/agp_i810.c WRITE_GATT(offset, 0);
offset 744 dev/pci/agp_i810.c off_t offset)
offset 767 dev/pci/agp_i810.c WRITE_GATT(offset + i, mem->am_physical + i);
offset 769 dev/pci/agp_i810.c mem->am_offset = offset;
offset 775 dev/pci/agp_i810.c return (agp_generic_bind_memory(sc, mem, offset));
offset 782 dev/pci/agp_i810.c (u_int32_t)(offset >> AGP_PAGE_SHIFT) * 4, i | 3);
offset 208 dev/pci/agp_intel.c agp_intel_bind_page(struct vga_pci_softc *sc, off_t offset, bus_addr_t physical)
offset 212 dev/pci/agp_intel.c if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT))
offset 215 dev/pci/agp_intel.c isc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 0x17;
offset 220 dev/pci/agp_intel.c agp_intel_unbind_page(struct vga_pci_softc *sc, off_t offset)
offset 224 dev/pci/agp_intel.c if (offset < 0 || offset >= (isc->gatt->ag_entries << AGP_PAGE_SHIFT))
offset 227 dev/pci/agp_intel.c isc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
offset 193 dev/pci/agp_sis.c agp_sis_bind_page(struct vga_pci_softc *sc, off_t offset, bus_addr_t physical)
offset 197 dev/pci/agp_sis.c if (offset < 0 || offset >= (ssc->gatt->ag_entries << AGP_PAGE_SHIFT))
offset 200 dev/pci/agp_sis.c ssc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical;
offset 205 dev/pci/agp_sis.c agp_sis_unbind_page(struct vga_pci_softc *sc, off_t offset)
offset 209 dev/pci/agp_sis.c if (offset < 0 || offset >= (ssc->gatt->ag_entries << AGP_PAGE_SHIFT))
offset 212 dev/pci/agp_sis.c ssc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
offset 191 dev/pci/agp_via.c agp_via_bind_page(struct vga_pci_softc *sc, off_t offset, bus_addr_t physical)
offset 195 dev/pci/agp_via.c if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
offset 198 dev/pci/agp_via.c asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical;
offset 203 dev/pci/agp_via.c agp_via_unbind_page(struct vga_pci_softc *sc, off_t offset)
offset 207 dev/pci/agp_via.c if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
offset 210 dev/pci/agp_via.c asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
offset 344 dev/pci/ahd_pci.c int error, ioh_valid, ioh2_valid, l, memh_valid, offset;
offset 460 dev/pci/ahd_pci.c if (pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_PWRMGMT, &offset,
offset 463 dev/pci/ahd_pci.c offset += 4;
offset 464 dev/pci/ahd_pci.c reg = pci_conf_read(pa->pa_pc, pa->pa_tag, offset);
offset 466 dev/pci/ahd_pci.c pci_conf_write(pa->pa_pc, pa->pa_tag, offset,
offset 1409 dev/pci/autri.c sc->sc_play.offset = 0;
offset 1453 dev/pci/autri.c sc->sc_rec.offset = 0;
offset 57 dev/pci/autrivar.h u_int offset; /* filled up to here */
offset 390 dev/pci/bktr/bktr_card.c writeEEProm( bktr_ptr_t bktr, int offset, int count, u_char *data )
offset 401 dev/pci/bktr/bktr_card.c readEEProm(bktr_ptr_t bktr, int offset, int count, u_char *data)
offset 414 dev/pci/bktr/bktr_card.c if ( (offset + count) > max )
offset 418 dev/pci/bktr/bktr_card.c if ( i2cWrite( bktr, addr, offset, -1 ) == -1 )
offset 442 dev/pci/bktr/bktr_card.c signCard( bktr_ptr_t bktr, int offset, int count, u_char *sig )
offset 88 dev/pci/bktr/bktr_card.h int signCard( bktr_ptr_t bktr, int offset, int count, u_char *sig );
offset 91 dev/pci/bktr/bktr_card.h int writeEEProm( bktr_ptr_t bktr, int offset, int count, u_char *data );
offset 92 dev/pci/bktr/bktr_card.h int readEEProm( bktr_ptr_t bktr, int offset, int count, u_char *data );
offset 1705 dev/pci/bktr/bktr_core.c int offset;
offset 1979 dev/pci/bktr/bktr_core.c offset = (((struct eeProm *)arg)->offset);
offset 1982 dev/pci/bktr/bktr_core.c if ( writeEEProm( bktr, offset, count, buf ) < 0 )
offset 1987 dev/pci/bktr/bktr_core.c offset = (((struct eeProm *)arg)->offset);
offset 1990 dev/pci/bktr/bktr_core.c if ( readEEProm( bktr, offset, count, buf ) < 0 )
offset 1995 dev/pci/bktr/bktr_core.c offset = (((struct eeProm *)arg)->offset);
offset 1998 dev/pci/bktr/bktr_core.c if ( signCard( bktr, offset, count, buf ) < 0 )
offset 467 dev/pci/bktr/bktr_os.c bktr_mmap(dev_t dev, off_t offset, int nprot)
offset 479 dev/pci/bktr/bktr_os.c if ((vaddr_t)offset < 0)
offset 482 dev/pci/bktr/bktr_os.c if ((vaddr_t)offset >= bktr->alloc_pages * PAGE_SIZE)
offset 486 dev/pci/bktr/bktr_os.c (vaddr_t)offset, nprot, BUS_DMA_WAITOK));
offset 1733 dev/pci/cmpci.c cmpci_mappage(void *handle, void *addr, off_t offset, int prot)
offset 1738 dev/pci/cmpci.c if (offset < 0 || NULL == (p = cmpci_find_dmamem(sc, addr)))
offset 1743 dev/pci/cmpci.c offset, prot, BUS_DMA_WAITOK);
offset 833 dev/pci/cs4280.c cs4280_download(sc, src, offset, len)
offset 836 dev/pci/cs4280.c u_int32_t offset, len;
offset 844 dev/pci/cs4280.c if ((offset&3) || (len&3))
offset 853 dev/pci/cs4280.c BA1WRITE4(sc, offset+ctr*4, htole32(*(src+ctr)));
offset 856 dev/pci/cs4280.c c0 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+0);
offset 857 dev/pci/cs4280.c c1 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+1);
offset 858 dev/pci/cs4280.c c2 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+2);
offset 859 dev/pci/cs4280.c c3 = bus_space_read_1(sc->ba1t, sc->ba1h, offset+ctr*4+3);
offset 863 dev/pci/cs4280.c offset+ctr*4, data, con);
offset 878 dev/pci/cs4280.c u_int32_t offset = 0;
offset 892 dev/pci/cs4280.c err = cs4280_download(sc, &BA1Struct->map[offset],
offset 893 dev/pci/cs4280.c BA1Struct->memory[idx].offset, BA1Struct->memory[idx].size);
offset 899 dev/pci/cs4280.c offset += BA1Struct->memory[idx].size / sizeof(u_int32_t);
offset 906 dev/pci/cs4280.c cs4280_checkimage(sc, src, offset, len)
offset 909 dev/pci/cs4280.c u_int32_t offset, len;
offset 914 dev/pci/cs4280.c if ((offset&3) || (len&3))
offset 922 dev/pci/cs4280.c data = BA1READ4(sc, offset+ctr*4);
offset 925 dev/pci/cs4280.c offset+ctr*4, data, *(src+ctr));
offset 938 dev/pci/cs4280.c u_int32_t offset = 0;
offset 943 dev/pci/cs4280.c err = cs4280_checkimage(sc, &BA1Struct->map[offset],
offset 944 dev/pci/cs4280.c BA1Struct->memory[idx].offset,
offset 950 dev/pci/cs4280.c offset += BA1Struct->memory[idx].size / sizeof(u_int32_t);
offset 271 dev/pci/cs4280reg.h u_int32_t offset;
offset 588 dev/pci/emuxki.c u_int8_t size, offset = 0;
offset 597 dev/pci/emuxki.c offset = (reg >> 16) & 0x1f;
offset 598 dev/pci/emuxki.c mask = ((1 << size) - 1) << offset;
offset 604 dev/pci/emuxki.c >> offset;
offset 615 dev/pci/emuxki.c u_int8_t size, offset;
offset 629 dev/pci/emuxki.c offset = (reg >> 16) & 0x1f;
offset 630 dev/pci/emuxki.c mask = ((1 << size) - 1) << offset;
offset 631 dev/pci/emuxki.c data = ((data << offset) & mask) |
offset 174 dev/pci/fmsradio.c r->tea.offset = FM_IO_CTL;
offset 212 dev/pci/fmsradio.c radio->tea.ioh, radio->tea.offset),
offset 221 dev/pci/fmsradio.c sf256pcs_hw_read(bus_space_tag_t iot, bus_space_handle_t ioh, bus_size_t offset)
offset 231 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d | PCS_CLOCK_OFF);
offset 237 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d | PCS_CLOCK_ON);
offset 238 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d | PCS_CLOCK_OFF);
offset 239 dev/pci/fmsradio.c res |= bus_space_read_2(iot, ioh, offset) &
offset 263 dev/pci/fmsradio.c bus_size_t offset, u_int32_t d)
offset 268 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d);
offset 269 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d);
offset 274 dev/pci/fmsradio.c bus_size_t offset, u_int32_t d)
offset 279 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d);
offset 280 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d);
offset 298 dev/pci/fmsradio.c radio->tea.ioh, radio->tea.offset),
offset 308 dev/pci/fmsradio.c bus_size_t offset)
offset 318 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d | PCPR_CLOCK_OFF);
offset 324 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d | PCPR_CLOCK_ON);
offset 325 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d | PCPR_CLOCK_OFF);
offset 326 dev/pci/fmsradio.c res |= bus_space_read_2(iot, ioh, offset) &
offset 349 dev/pci/fmsradio.c bus_size_t offset, u_int32_t d)
offset 354 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d);
offset 355 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d);
offset 360 dev/pci/fmsradio.c bus_size_t offset, u_int32_t d)
offset 365 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d);
offset 366 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d);
offset 384 dev/pci/fmsradio.c radio->tea.ioh, radio->tea.offset),
offset 393 dev/pci/fmsradio.c sf64pcr_hw_read(bus_space_tag_t iot, bus_space_handle_t ioh, bus_size_t offset)
offset 403 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d | PCR_CLOCK_OFF);
offset 409 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d | PCR_CLOCK_ON);
offset 412 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d | PCR_CLOCK_OFF);
offset 415 dev/pci/fmsradio.c res |= bus_space_read_2(iot, ioh, offset) & PCR_DATA_ON ? 1 : 0;
offset 419 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d | PCR_CLOCK_ON);
offset 422 dev/pci/fmsradio.c i = bus_space_read_1(iot, ioh, offset);
offset 425 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d | PCR_CLOCK_OFF);
offset 427 dev/pci/fmsradio.c i = bus_space_read_2(iot, ioh, offset);
offset 453 dev/pci/fmsradio.c bus_size_t offset, u_int32_t d)
offset 458 dev/pci/fmsradio.c bus_space_write_2(iot, ioh, offset, d);
offset 464 dev/pci/fmsradio.c bus_size_t offset, u_int32_t d)
offset 499 dev/pci/fmsradio.c radio->tea.offset, v);
offset 502 dev/pci/fmsradio.c radio->tea.offset, v);
offset 521 dev/pci/fmsradio.c radio->tea.offset);
offset 527 dev/pci/fmsradio.c radio->tea.offset);
offset 535 dev/pci/fmsradio.c radio->tea.offset);
offset 149 dev/pci/gtp.c sc->tea.offset = 0;
offset 2265 dev/pci/if_bge.c bus_addr_t offset, toff;
offset 2281 dev/pci/if_bge.c offset = offsetof(struct bge_ring_data, bge_rx_return_ring);
offset 2285 dev/pci/if_bge.c toff = offset + (sc->bge_rx_saved_considx * sizeof (struct bge_rx_bd));
offset 2296 dev/pci/if_bge.c offset, tosync * sizeof (struct bge_rx_bd),
offset 2413 dev/pci/if_bge.c bus_addr_t offset, toff;
offset 2430 dev/pci/if_bge.c offset = offsetof(struct bge_ring_data, bge_tx_ring);
offset 2434 dev/pci/if_bge.c toff = offset + (sc->bge_tx_saved_considx * sizeof (struct bge_tx_bd));
offset 2445 dev/pci/if_bge.c offset, tosync * sizeof (struct bge_tx_bd),
offset 1855 dev/pci/if_bgereg.h #define RCB_WRITE_4(sc, rcb, offset, val) \
offset 1857 dev/pci/if_bgereg.h rcb + offsetof(struct bge_rcb, offset), val)
offset 1859 dev/pci/if_bgereg.h #define RCB_WRITE_2(sc, rcb, offset, val) \
offset 1861 dev/pci/if_bgereg.h rcb + offsetof(struct bge_rcb, offset), val)
offset 2289 dev/pci/if_bgereg.h #define BGE_RING_DMA_ADDR(sc, offset) \
offset 2291 dev/pci/if_bgereg.h offsetof(struct bge_ring_data, offset))
offset 1010 dev/pci/if_bnx.c bnx_reg_rd_ind(struct bnx_softc *sc, u_int32_t offset)
offset 1015 dev/pci/if_bnx.c offset);
offset 1022 dev/pci/if_bnx.c "val = 0x%08X\n", __FUNCTION__, offset, val);
offset 1041 dev/pci/if_bnx.c bnx_reg_wr_ind(struct bnx_softc *sc, u_int32_t offset, u_int32_t val)
offset 1046 dev/pci/if_bnx.c __FUNCTION__, offset, val);
offset 1049 dev/pci/if_bnx.c offset);
offset 1063 dev/pci/if_bnx.c bnx_ctx_wr(struct bnx_softc *sc, u_int32_t cid_addr, u_int32_t offset,
offset 1068 dev/pci/if_bnx.c "val = 0x%08X\n", __FUNCTION__, cid_addr, offset, val);
offset 1070 dev/pci/if_bnx.c offset += cid_addr;
offset 1071 dev/pci/if_bnx.c REG_WR(sc, BNX_CTX_DATA_ADR, offset);
offset 1447 dev/pci/if_bnx.c bnx_nvram_erase_page(struct bnx_softc *sc, u_int32_t offset)
offset 1467 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_ADDR, offset & BNX_NVM_ADDR_NVM_ADDR_VALUE);
offset 1500 dev/pci/if_bnx.c bnx_nvram_read_dword(struct bnx_softc *sc, u_int32_t offset,
offset 1511 dev/pci/if_bnx.c offset = ((offset / sc->bnx_flash_info->page_size) <<
offset 1513 dev/pci/if_bnx.c (offset % sc->bnx_flash_info->page_size);
offset 1520 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_ADDR, offset & BNX_NVM_ADDR_NVM_ADDR_VALUE);
offset 1542 dev/pci/if_bnx.c "offset 0x%08X!\n", __FILE__, __LINE__, offset);
offset 1561 dev/pci/if_bnx.c bnx_nvram_write_dword(struct bnx_softc *sc, u_int32_t offset, u_int8_t *val,
offset 1572 dev/pci/if_bnx.c offset = ((offset / sc->bnx_flash_info->page_size) <<
offset 1574 dev/pci/if_bnx.c (offset % sc->bnx_flash_info->page_size);
offset 1584 dev/pci/if_bnx.c REG_WR(sc, BNX_NVM_ADDR, offset & BNX_NVM_ADDR_NVM_ADDR_VALUE);
offset 1596 dev/pci/if_bnx.c "offset 0x%08X\n", __FILE__, __LINE__, offset);
offset 1722 dev/pci/if_bnx.c bnx_nvram_read(struct bnx_softc *sc, u_int32_t offset, u_int8_t *ret_buf,
offset 1739 dev/pci/if_bnx.c offset32 = offset;
offset 1749 dev/pci/if_bnx.c pre_len = 4 - (offset & 3);
offset 1763 dev/pci/if_bnx.c memcpy(ret_buf, buf + (offset & 3), pre_len);
offset 1840 dev/pci/if_bnx.c bnx_nvram_write(struct bnx_softc *sc, u_int32_t offset, u_int8_t *data_buf,
offset 1849 dev/pci/if_bnx.c offset32 = offset;
offset 2529 dev/pci/if_bnx.c u_int32_t offset;
offset 2539 dev/pci/if_bnx.c offset = cpu_reg->spad_base + (fw->text_addr - cpu_reg->mips_view_base);
offset 2543 dev/pci/if_bnx.c for (j = 0; j < (fw->text_len / 4); j++, offset += 4)
offset 2544 dev/pci/if_bnx.c REG_WR_IND(sc, offset, fw->text[j]);
offset 2548 dev/pci/if_bnx.c offset = cpu_reg->spad_base + (fw->data_addr - cpu_reg->mips_view_base);
offset 2552 dev/pci/if_bnx.c for (j = 0; j < (fw->data_len / 4); j++, offset += 4)
offset 2553 dev/pci/if_bnx.c REG_WR_IND(sc, offset, fw->data[j]);
offset 2557 dev/pci/if_bnx.c offset = cpu_reg->spad_base + (fw->sbss_addr - cpu_reg->mips_view_base);
offset 2561 dev/pci/if_bnx.c for (j = 0; j < (fw->sbss_len / 4); j++, offset += 4)
offset 2562 dev/pci/if_bnx.c REG_WR_IND(sc, offset, fw->sbss[j]);
offset 2566 dev/pci/if_bnx.c offset = cpu_reg->spad_base + (fw->bss_addr - cpu_reg->mips_view_base);
offset 2570 dev/pci/if_bnx.c for (j = 0; j < (fw->bss_len/4); j++, offset += 4)
offset 2571 dev/pci/if_bnx.c REG_WR_IND(sc, offset, fw->bss[j]);
offset 2575 dev/pci/if_bnx.c offset = cpu_reg->spad_base +
offset 2580 dev/pci/if_bnx.c for (j = 0; j < (fw->rodata_len / 4); j++, offset += 4)
offset 2581 dev/pci/if_bnx.c REG_WR_IND(sc, offset, fw->rodata[j]);
offset 2819 dev/pci/if_bnx.c u_int32_t vcid_addr, pcid_addr, offset;
offset 2830 dev/pci/if_bnx.c for (offset = 0; offset < PHY_CTX_SIZE; offset += 4)
offset 2831 dev/pci/if_bnx.c CTX_WR(sc, 0x00, offset, 0);
offset 666 dev/pci/if_bnxreg.h #define REG_RD_IND(sc, offset) bnx_reg_rd_ind(sc, offset)
offset 667 dev/pci/if_bnxreg.h #define REG_WR_IND(sc, offset, val) bnx_reg_wr_ind(sc, offset, val)
offset 668 dev/pci/if_bnxreg.h #define CTX_WR(sc, cid_addr, offset, val) bnx_ctx_wr(sc, cid_addr, offset, val)
offset 166 dev/pci/if_de.c unsigned tulip_mii_get_phyaddr(tulip_softc_t * const sc, unsigned offset);
offset 1241 dev/pci/if_de.c tulip_mii_get_phyaddr(tulip_softc_t * const sc, unsigned offset)
offset 1249 dev/pci/if_de.c if (offset == 0)
offset 1251 dev/pci/if_de.c offset--;
offset 1253 dev/pci/if_de.c if (offset == 0) {
offset 105 dev/pci/if_em_hw.c static int32_t em_read_eeprom_eerd(struct em_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);
offset 106 dev/pci/if_em_hw.c static int32_t em_write_eeprom_eewr(struct em_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);
offset 115 dev/pci/if_em_hw.c static int32_t em_read_eeprom_ich8(struct em_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);
offset 116 dev/pci/if_em_hw.c static int32_t em_write_eeprom_ich8(struct em_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);
offset 123 dev/pci/if_em_hw.c static void em_write_reg_io(struct em_hw *hw, uint32_t offset, uint32_t value);
offset 137 dev/pci/if_em_hw.c static int32_t em_write_eeprom_spi(struct em_hw *hw, uint16_t offset,
offset 140 dev/pci/if_em_hw.c uint16_t offset, uint16_t words,
offset 4668 dev/pci/if_em_hw.c uint16_t offset,
offset 4684 dev/pci/if_em_hw.c if ((offset >= eeprom->word_size) || (words > eeprom->word_size - offset) ||
offset 4686 dev/pci/if_em_hw.c DEBUGOUT2("\"words\" parameter out of bounds. Words = %d, size = %d\n", offset, eeprom->word_size);
offset 4703 dev/pci/if_em_hw.c return em_read_eeprom_eerd(hw, offset, words, data);
offset 4707 dev/pci/if_em_hw.c return em_read_eeprom_ich8(hw, offset, words, data);
offset 4723 dev/pci/if_em_hw.c if ((eeprom->address_bits == 8) && (offset >= 128))
offset 4728 dev/pci/if_em_hw.c em_shift_out_ee_bits(hw, (uint16_t)(offset*2), eeprom->address_bits);
offset 4744 dev/pci/if_em_hw.c em_shift_out_ee_bits(hw, (uint16_t)(offset + i),
offset 4770 dev/pci/if_em_hw.c uint16_t offset,
offset 4778 dev/pci/if_em_hw.c eerd = ((offset+i) << E1000_EEPROM_RW_ADDR_SHIFT) +
offset 4804 dev/pci/if_em_hw.c uint16_t offset,
offset 4817 dev/pci/if_em_hw.c ((offset+i) << E1000_EEPROM_RW_ADDR_SHIFT) |
offset 5016 dev/pci/if_em_hw.c uint16_t offset,
offset 5032 dev/pci/if_em_hw.c if ((offset >= eeprom->word_size) || (words > eeprom->word_size - offset) ||
offset 5040 dev/pci/if_em_hw.c return em_write_eeprom_eewr(hw, offset, words, data);
offset 5043 dev/pci/if_em_hw.c return em_write_eeprom_ich8(hw, offset, words, data);
offset 5050 dev/pci/if_em_hw.c status = em_write_eeprom_microwire(hw, offset, words, data);
offset 5052 dev/pci/if_em_hw.c status = em_write_eeprom_spi(hw, offset, words, data);
offset 5073 dev/pci/if_em_hw.c uint16_t offset,
offset 5096 dev/pci/if_em_hw.c if ((eeprom->address_bits == 8) && (offset >= 128))
offset 5102 dev/pci/if_em_hw.c em_shift_out_ee_bits(hw, (uint16_t)((offset + widx)*2),
offset 5118 dev/pci/if_em_hw.c if ((((offset + widx)*2) % eeprom->page_size) == 0) {
offset 5139 dev/pci/if_em_hw.c uint16_t offset,
offset 5169 dev/pci/if_em_hw.c em_shift_out_ee_bits(hw, (uint16_t)(offset + words_written),
offset 5392 dev/pci/if_em_hw.c uint16_t offset = EEPROM_PBA_BYTE_1;
offset 5398 dev/pci/if_em_hw.c if (em_read_eeprom(hw, offset, 1, &eeprom_data) < 0) {
offset 5406 dev/pci/if_em_hw.c if (em_read_eeprom(hw, ++offset, 1, &eeprom_data) < 0) {
offset 5425 dev/pci/if_em_hw.c uint16_t offset;
offset 5431 dev/pci/if_em_hw.c offset = i >> 1;
offset 5432 dev/pci/if_em_hw.c if (em_read_eeprom(hw, offset, 1, &eeprom_data) < 0) {
offset 5771 dev/pci/if_em_hw.c uint32_t offset;
offset 5792 dev/pci/if_em_hw.c for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
offset 5796 dev/pci/if_em_hw.c vfta_value = (offset == vfta_offset) ? vfta_bit_in_reg : 0;
offset 5797 dev/pci/if_em_hw.c E1000_WRITE_REG_ARRAY(hw, VFTA, offset, vfta_value);
offset 6141 dev/pci/if_em_hw.c uint32_t offset,
offset 6147 dev/pci/if_em_hw.c em_io_write(hw, io_addr, offset);
offset 6924 dev/pci/if_em_hw.c uint32_t offset = E1000_MNG_DHCP_COOKIE_OFFSET;
offset 6928 dev/pci/if_em_hw.c offset = (offset >> 2);
offset 6932 dev/pci/if_em_hw.c E1000_READ_REG_ARRAY_DWORD(hw, HOST_IF, offset + i);
offset 7585 dev/pci/if_em_hw.c em_read_eeprom_ich8(struct em_hw *hw, uint16_t offset, uint16_t words,
offset 7612 dev/pci/if_em_hw.c hw->eeprom_shadow_ram[offset+i].modified == TRUE) {
offset 7613 dev/pci/if_em_hw.c data[i] = hw->eeprom_shadow_ram[offset+i].eeprom_word;
offset 7616 dev/pci/if_em_hw.c act_offset = bank_offset + ((offset + i) * 2);
offset 7641 dev/pci/if_em_hw.c em_write_eeprom_ich8(struct em_hw *hw, uint16_t offset, uint16_t words,
offset 7660 dev/pci/if_em_hw.c if ((offset + i) < E1000_SHADOW_RAM_WORDS) {
offset 7661 dev/pci/if_em_hw.c hw->eeprom_shadow_ram[offset+i].modified = TRUE;
offset 7662 dev/pci/if_em_hw.c hw->eeprom_shadow_ram[offset+i].eeprom_word = data[i];
offset 391 dev/pci/if_em_hw.h void em_write_vfta(struct em_hw *hw, uint32_t offset, uint32_t value);
offset 87 dev/pci/if_em_osdep.h #define E1000_READ_OFFSET(hw, offset) \
offset 90 dev/pci/if_em_osdep.h offset)
offset 93 dev/pci/if_em_osdep.h #define E1000_WRITE_OFFSET(hw, offset, value) \
offset 96 dev/pci/if_em_osdep.h offset, value)
offset 1974 dev/pci/if_ipw.c ipw_read_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap,
offset 1977 dev/pci/if_ipw.c for (; count > 0; offset++, datap++, count--) {
offset 1978 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
offset 1979 dev/pci/if_ipw.c *datap = CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3));
offset 1984 dev/pci/if_ipw.c ipw_write_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap,
offset 1987 dev/pci/if_ipw.c for (; count > 0; offset++, datap++, count--) {
offset 1988 dev/pci/if_ipw.c CSR_WRITE_4(sc, IPW_CSR_INDIRECT_ADDR, offset & ~3);
offset 1989 dev/pci/if_ipw.c CSR_WRITE_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3), *datap);
offset 434 dev/pci/if_iwireg.h #define CSR_READ_REGION_4(sc, offset, datap, count) \
offset 435 dev/pci/if_iwireg.h bus_space_read_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
offset 447 dev/pci/if_iwireg.h #define CSR_WRITE_REGION_1(sc, offset, datap, count) \
offset 448 dev/pci/if_iwireg.h bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset), \
offset 90 dev/pci/if_ixgb_osdep.h #define IXGB_READ_REG_ARRAY(a, reg, offset) \
offset 93 dev/pci/if_ixgb_osdep.h (IXGB_##reg + ((offset) << 2)))
offset 95 dev/pci/if_ixgb_osdep.h #define IXGB_WRITE_REG_ARRAY(a, reg, offset, value) \
offset 98 dev/pci/if_ixgb_osdep.h (IXGB_##reg + ((offset) << 2)), value)
offset 347 dev/pci/if_san_common.c if ((dump.offset + dump.length) > memory)
offset 354 dev/pci/if_san_common.c sdla_peek(card->hw, dump.offset, data, dump.length);
offset 157 dev/pci/if_san_common.h unsigned long offset; /* absolute adapter memory address */
offset 254 dev/pci/if_san_xilinx.h unsigned short offset;
offset 362 dev/pci/if_san_xilinx.h unsigned long offset;
offset 859 dev/pci/if_sandrv.c sdla_cmd(void *phw, unsigned long offset, wan_mbox_t *mbox)
offset 869 dev/pci/if_sandrv.c sdla_peek(hw, offset, (void*)&value, 1);
offset 876 dev/pci/if_sandrv.c sdla_poke(hw, offset, (void*)mbox, len);
offset 878 dev/pci/if_sandrv.c err = sdla_exec(hw, offset);
offset 884 dev/pci/if_sandrv.c sdla_peek(hw, offset, (void*)mbox, sizeof(wan_cmd_t));
offset 886 dev/pci/if_sandrv.c sdla_peek(hw, offset+offsetof(wan_mbox_t, wan_data),
offset 900 dev/pci/if_sandrv.c sdla_exec(sdlahw_t *hw, unsigned long offset)
offset 907 dev/pci/if_sandrv.c sdla_poke(hw, offset, (void*)&value, 1);
offset 910 dev/pci/if_sandrv.c sdla_peek(hw, offset, (void*)&value, 1);
offset 920 dev/pci/if_sandrv.c sdla_peek(hw, offset, (void*)&value, 1);
offset 971 dev/pci/if_sandrv.c sdla_peek_by_4(sdlahw_t *hw, unsigned long offset, void *buf, unsigned int len)
offset 974 dev/pci/if_sandrv.c while (len && (offset & 0x03)) {
offset 975 dev/pci/if_sandrv.c sdla_bus_read_1(hw, offset++, (u_int8_t*)buf);
offset 982 dev/pci/if_sandrv.c sdla_bus_read_4(hw, offset, (u_int32_t*)buf);
offset 984 dev/pci/if_sandrv.c offset += 4;
offset 990 dev/pci/if_sandrv.c sdla_bus_read_1(hw, offset++, (u_int8_t*)buf);
offset 1041 dev/pci/if_sandrv.c sdla_poke_by_4(sdlahw_t *hw, unsigned long offset, void *buf, unsigned int len)
offset 1044 dev/pci/if_sandrv.c while (len && (offset & 0x03)) {
offset 1045 dev/pci/if_sandrv.c sdla_bus_write_1(hw, offset++, *(char *)buf);
offset 1052 dev/pci/if_sandrv.c sdla_bus_write_4(hw, offset, *(unsigned long *)buf);
offset 1053 dev/pci/if_sandrv.c offset += 4;
offset 1060 dev/pci/if_sandrv.c sdla_bus_write_1(hw, offset++, *(char *)buf);
offset 1067 dev/pci/if_sandrv.c sdla_poke_byte(void *phw, unsigned long offset, u_int8_t value)
offset 1073 dev/pci/if_sandrv.c sdla_poke(hw, offset, (void*)&value, 1);
offset 1078 dev/pci/if_sandrv.c sdla_set_bit(void *phw, unsigned long offset, u_int8_t value)
offset 1085 dev/pci/if_sandrv.c sdla_peek(hw, offset, (void*)&tmp, 1);
offset 1088 dev/pci/if_sandrv.c sdla_poke(hw, offset, (void*)&tmp, 1);
offset 1093 dev/pci/if_sandrv.c sdla_clear_bit(void *phw, unsigned long offset, u_int8_t value)
offset 1100 dev/pci/if_sandrv.c sdla_peek(hw, offset, (void*)&tmp, 1);
offset 1103 dev/pci/if_sandrv.c sdla_poke(hw, offset, (void*)&tmp, 1);
offset 1345 dev/pci/if_sandrv.c sdla_bus_write_1(void *phw, unsigned int offset, u_int8_t value)
offset 1353 dev/pci/if_sandrv.c bus_space_write_1(hw->hwcard->memt, hw->dpmbase, offset, value);
offset 1358 dev/pci/if_sandrv.c sdla_bus_write_2(void *phw, unsigned int offset, u_int16_t value)
offset 1366 dev/pci/if_sandrv.c bus_space_write_2(hw->hwcard->memt, hw->dpmbase, offset, value);
offset 1371 dev/pci/if_sandrv.c sdla_bus_write_4(void *phw, unsigned int offset, u_int32_t value)
offset 1379 dev/pci/if_sandrv.c bus_space_write_4(hw->hwcard->memt, hw->dpmbase, offset, value);
offset 1384 dev/pci/if_sandrv.c sdla_bus_read_1(void *phw, unsigned int offset, u_int8_t *value)
offset 1392 dev/pci/if_sandrv.c *value = bus_space_read_1(hw->hwcard->memt, hw->dpmbase, offset);
offset 1397 dev/pci/if_sandrv.c sdla_bus_read_2(void *phw, unsigned int offset, u_int16_t *value)
offset 1405 dev/pci/if_sandrv.c *value = bus_space_read_2(hw->hwcard->memt, hw->dpmbase, offset);
offset 1410 dev/pci/if_sandrv.c sdla_bus_read_4(void *phw, unsigned int offset, u_int32_t *value)
offset 1419 dev/pci/if_sandrv.c *value = bus_space_read_4(hw->hwcard->memt, hw->dpmbase, offset);
offset 1484 dev/pci/if_stge.c stge_read_eeprom(struct stge_softc *sc, int offset, uint16_t *data)
offset 1492 dev/pci/if_stge.c EC_EepromAddress(offset) | EC_EepromOpcode(EC_OP_RR));
offset 1035 dev/pci/if_tireg.h #define TI_RING_DMA_ADDR(sc, offset) \
offset 1037 dev/pci/if_tireg.h offsetof(struct ti_ring_data, offset))
offset 1039 dev/pci/if_tireg.h #define TI_RING_DMASYNC(sc, offset, op) \
offset 1041 dev/pci/if_tireg.h offsetof(struct ti_ring_data, offset), \
offset 1042 dev/pci/if_tireg.h sizeof(((struct ti_ring_data *)0)->offset), (op))
offset 501 dev/pci/if_vic.c u_int offset;
offset 535 dev/pci/if_vic.c offset = sizeof(struct vic_data);
offset 538 dev/pci/if_vic.c sc->sc_rxq = (struct vic_rxdesc *)&kva[offset];
offset 540 dev/pci/if_vic.c sc->sc_data->vd_rx_offset = offset;
offset 543 dev/pci/if_vic.c offset += sizeof(struct vic_rxdesc) * sc->sc_nrxbuf;
offset 546 dev/pci/if_vic.c sc->sc_rxq2 = (struct vic_rxdesc *)&kva[offset];
offset 548 dev/pci/if_vic.c sc->sc_data->vd_rx_offset2 = offset;
offset 559 dev/pci/if_vic.c offset += sizeof(struct vic_rxdesc);
offset 563 dev/pci/if_vic.c sc->sc_txq = (struct vic_txdesc *)&kva[offset];
offset 565 dev/pci/if_vic.c sc->sc_data->vd_tx_offset = offset;
offset 725 dev/pci/if_wpireg.h #define WPI_WRITE_REGION_4(sc, offset, datap, count) \
offset 726 dev/pci/if_wpireg.h bus_space_write_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
offset 399 dev/pci/ixgb_ee.c ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data)
offset 417 dev/pci/ixgb_ee.c ixgb_shift_out_bits(hw, offset, 6);
offset 452 dev/pci/ixgb_ee.c ixgb_read_eeprom(struct ixgb_hw *hw, uint16_t offset)
offset 464 dev/pci/ixgb_ee.c ixgb_shift_out_bits(hw, offset, 6);
offset 619 dev/pci/ixgb_hw.c ixgb_write_vfta(struct ixgb_hw *hw, uint32_t offset, uint32_t value)
offset 621 dev/pci/ixgb_hw.c IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, value);
offset 633 dev/pci/ixgb_hw.c uint32_t offset;
offset 635 dev/pci/ixgb_hw.c for(offset = 0; offset < IXGB_VLAN_FILTER_TBL_SIZE; offset++)
offset 636 dev/pci/ixgb_hw.c IXGB_WRITE_REG_ARRAY(hw, VFTA, offset, 0);
offset 847 dev/pci/ixgb_hw.h extern void ixgb_write_vfta(struct ixgb_hw *hw, uint32_t offset,
offset 1302 dev/pci/maestro.c u_int offset = ((caddr_t)start - sc->dmabase) >> 1;
offset 1305 dev/pci/maestro.c sc->play.wpwa = APU_USE_SYSMEM | (offset >> 8);
offset 1308 dev/pci/maestro.c DPRINTF(("offset = %x, size=%x\n", offset, size));
offset 1313 dev/pci/maestro.c sc->play.end = offset+size;
offset 1314 dev/pci/maestro.c sc->play.start = offset;
offset 1558 dev/pci/musycc.c bus_size_t offset, bus_size_t size)
offset 1562 dev/pci/musycc.c e->base = offset << 2;
offset 1565 dev/pci/musycc.c return (bus_space_subregion(ec->mc_st, ec->mc_sh, offset << 2,
offset 1570 dev/pci/musycc.c ebus_read(struct ebus_dev *e, bus_size_t offset)
offset 1574 dev/pci/musycc.c value = bus_space_read_1(e->st, e->sh, offset << 2);
offset 1581 dev/pci/musycc.c ebus_write(struct ebus_dev *e, bus_size_t offset, u_int8_t value)
offset 1583 dev/pci/musycc.c bus_space_write_1(e->st, e->sh, offset << 2, value);
offset 1589 dev/pci/musycc.c ebus_read_buf(struct ebus_dev *rom, bus_size_t offset, void *buf, size_t size)
offset 1595 dev/pci/musycc.c b[i] = ebus_read(rom, offset + i);
offset 177 dev/pci/musycc_obsd.c bus_size_t offset;
offset 222 dev/pci/musycc_obsd.c offset = 0;
offset 223 dev/pci/musycc_obsd.c ebus_read_buf(&rom, offset, &baseconf, sizeof(baseconf));
offset 224 dev/pci/musycc_obsd.c offset += sizeof(baseconf);
offset 245 dev/pci/musycc_obsd.c if (offset >= 0x400) {
offset 249 dev/pci/musycc_obsd.c ebus_read_buf(&rom, offset, &framerconf, sizeof(framerconf));
offset 250 dev/pci/musycc_obsd.c offset += sizeof(framerconf);
offset 1771 dev/pci/pccbb.c pccbb_conf_read(cc, tag, offset)
offset 1774 dev/pci/pccbb.c int offset; /* register offset */
offset 1778 dev/pci/pccbb.c return pci_conf_read(sc->sc_pc, tag, offset);
offset 1922 dev/pci/pccbb.c pccbb_pcmcia_io_map(pch, width, offset, size, pcihp, windowp)
offset 1925 dev/pci/pccbb.c bus_addr_t offset;
offset 1931 dev/pci/pccbb.c bus_addr_t ioaddr = pcihp->addr + offset;
offset 2414 dev/pci/pccbb.c phys_addr, phys_end, ph->mem[win].offset));
offset 2444 dev/pci/pccbb.c off_low = (ph->mem[win].offset >> PCIC_CARDMEM_ADDRX_SHIFT) & 0xff;
offset 2445 dev/pci/pccbb.c off_high = ((ph->mem[win].offset >> (PCIC_CARDMEM_ADDRX_SHIFT + 8))
offset 2552 dev/pci/pccbb.c ph->mem[win].offset = card_offset;
offset 91 dev/pci/pccbbvar.h long offset;
offset 353 dev/pci/pci.c int *offset, pcireg_t *value)
offset 383 dev/pci/pci.c if (offset)
offset 384 dev/pci/pci.c *offset = ofs;
offset 272 dev/pci/puc.c sc->sc_bar_mappings[bar].h, sc->sc_desc->ports[i].offset,
offset 273 dev/pci/puc.c sc->sc_bar_mappings[bar].s - sc->sc_desc->ports[i].offset,
offset 49 dev/pci/pucvar.h u_short offset;
offset 1583 dev/pci/safe.c safe_mcopy(struct mbuf *srcm, struct mbuf *dstm, u_int offset)
offset 1591 dev/pci/safe.c for (j = offset; srcm->m_len <= j;) {
offset 1600 dev/pci/safe.c for (j = offset; dstm->m_len <= j;) {
offset 707 dev/pci/tga.c tga_mmap(v, offset, prot)
offset 709 dev/pci/tga.c off_t offset;
offset 715 dev/pci/tga.c if (offset >= dc->dc_tgaconf->tgac_cspace_size || offset < 0)
offset 722 dev/pci/tga.c offset += dc->dc_tgaconf->tgac_cspace_size / 2;
offset 725 dev/pci/tga.c return atop(sc->sc_dc->dc_paddr + offset);
offset 1096 dev/pci/tga.c int offset = 1 * dc->dc_tgaconf->tgac_vvbr_units;
offset 1138 dev/pci/tga.c tga_srcb = offset + (sy + src->ri_yorigin) * src->ri_stride +
offset 1140 dev/pci/tga.c tga_dstb = offset + (dy + dst->ri_yorigin) * dst->ri_stride +
offset 971 dev/pci/yds.c cpu = sc->sc_play.offset;
offset 984 dev/pci/yds.c sc->sc_play.offset += blk;
offset 985 dev/pci/yds.c if (sc->sc_play.offset >= len) {
offset 986 dev/pci/yds.c sc->sc_play.offset -= len;
offset 988 dev/pci/yds.c if (sc->sc_play.offset != 0)
offset 1011 dev/pci/yds.c cpu = sc->sc_rec.offset;
offset 1024 dev/pci/yds.c sc->sc_rec.offset += blk;
offset 1025 dev/pci/yds.c if (sc->sc_rec.offset >= len) {
offset 1026 dev/pci/yds.c sc->sc_rec.offset -= len;
offset 1028 dev/pci/yds.c if (sc->sc_rec.offset != 0)
offset 1357 dev/pci/yds.c sc->sc_play.offset = 0;
offset 1494 dev/pci/yds.c sc->sc_rec.offset = 0;
offset 364 dev/pci/ydsreg.h u_int offset; /* filled up to here */
offset 189 dev/pcmcia/if_cnw.c read16(sc, offset)
offset 191 dev/pcmcia/if_cnw.c int offset;
offset 201 dev/pcmcia/if_cnw.c sc->sc_memoff + offset);
offset 203 dev/pcmcia/if_cnw.c sc->sc_memoff + offset + 1);
offset 439 dev/pcmcia/if_malo.c int error, offset, i;
offset 461 dev/pcmcia/if_malo.c for (offset = 0; offset < usize; offset += bsize) {
offset 462 dev/pcmcia/if_malo.c if (usize - offset >= MALO_FW_HELPER_BSIZE)
offset 465 dev/pcmcia/if_malo.c bsize = usize - offset;
offset 469 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, bsize, offset);
offset 471 dev/pcmcia/if_malo.c uc = (uint16_t *)(ucode + offset);
offset 510 dev/pcmcia/if_malo.c int error, offset, i, retry;
offset 533 dev/pcmcia/if_malo.c for (offset = 0; offset < usize; offset += bsize) {
offset 548 dev/pcmcia/if_malo.c offset -= bsize;
offset 556 dev/pcmcia/if_malo.c sc->sc_dev.dv_xname, bsize, offset);
offset 558 dev/pcmcia/if_malo.c uc = (uint16_t *)(ucode + offset);
offset 921 dev/pcmcia/if_ne_pcmcia.c bus_size_t offset;
offset 934 dev/pcmcia/if_ne_pcmcia.c ETHER_ADDR_LEN * 2, &pcmh, &offset, &mwindow)) {
offset 941 dev/pcmcia/if_ne_pcmcia.c offset + (j * 2));
offset 989 dev/pcmcia/if_ne_pcmcia.c bus_size_t offset;
offset 998 dev/pcmcia/if_ne_pcmcia.c AX88190_LAN_IOBASE, AX88190_LAN_IOSIZE, &pcmh, &offset,
offset 1007 dev/pcmcia/if_ne_pcmcia.c bus_space_read_1(pcmh.memt, pcmh.memh, offset + 0) |
offset 1008 dev/pcmcia/if_ne_pcmcia.c bus_space_read_1(pcmh.memt, pcmh.memh, offset + 2) << 8,
offset 1011 dev/pcmcia/if_ne_pcmcia.c bus_space_write_1(pcmh.memt, pcmh.memh, offset,
offset 1013 dev/pcmcia/if_ne_pcmcia.c bus_space_write_1(pcmh.memt, pcmh.memh, offset + 2,
offset 1016 dev/pcmcia/if_ne_pcmcia.c printf(" 0x%x", bus_space_read_1(pcmh.memt, pcmh.memh, offset + 0) |
offset 1017 dev/pcmcia/if_ne_pcmcia.c bus_space_read_1(pcmh.memt, pcmh.memh, offset + 2) << 8);
offset 858 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
offset 861 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + GP2, MDC_LOW);
offset 865 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + GP2, MDC_HIGH);
offset 878 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
offset 882 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + GP2, bit | MDC_LOW);
offset 886 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + GP2, bit | MDC_HIGH);
offset 898 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
offset 902 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + GP2, MDC_LOW);
offset 906 dev/pcmcia/if_xe.c x = bus_space_read_1(bst, bsh, offset + GP2) & MDIO;
offset 907 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + GP2, MDC_HIGH);
offset 1094 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
offset 1119 dev/pcmcia/if_xe.c space = bus_space_read_2(bst, bsh, offset + TSO0) & 0x7fff;
offset 1140 dev/pcmcia/if_xe.c bus_space_write_2(bst, bsh, offset + TSO2, (u_int16_t)len + pad + 2);
offset 1141 dev/pcmcia/if_xe.c bus_space_write_2(bst, bsh, offset + EDP, (u_int16_t)len + pad);
offset 1144 dev/pcmcia/if_xe.c bus_space_write_raw_multi_2(bst, bsh, offset + EDP,
offset 1147 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + EDP,
offset 1153 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + CR, TX_PKT | ENABLE_INT);
offset 1156 dev/pcmcia/if_xe.c bus_space_write_2(bst, bsh, offset + EDP, 0);
offset 1158 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + EDP, 0);
offset 1290 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
offset 1299 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + IA + i,
offset 1331 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + pos,
offset 1351 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
offset 1355 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + GP1, 0);
offset 1358 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + GP1, POWER_UP);
offset 1361 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + GP1, POWER_UP | 4);
offset 1371 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
offset 1375 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + CR, SOFT_RESET);
offset 1377 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + CR, 0);
offset 1385 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + GP0,
offset 1391 dev/pcmcia/if_xe.c sc->sc_rev = bus_space_read_1(bst, bsh, offset + BV) &
offset 1401 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + GP0, GP1_OUT);
offset 1407 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + IMR0,
offset 1411 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + IMR0, 0xff);
offset 1415 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + IMR1, 1);
offset 1423 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + SWC0, 0x20);
offset 1430 dev/pcmcia/if_xe.c bus_space_write_2(bst, bsh, offset + RBS0, 0x2000);
offset 1440 dev/pcmcia/if_xe.c bus_space_write_2(bst, bsh, offset + DO0, DO_CHG_OFFSET);
offset 1444 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + RX0MSK,
offset 1446 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + TX0MSK,
offset 1451 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + TX1MSK, 0xb0);
offset 1452 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + RXST0, 0);
offset 1453 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + TXST0, 0);
offset 1454 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + TXST1, 0);
offset 1459 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + MSR,
offset 1460 dev/pcmcia/if_xe.c bus_space_read_1(bst, bsh, offset + MSR) | SELECT_MII);
offset 1467 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + SWC1, SWC1_AUTO_MEDIA);
offset 1477 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + LED,
offset 1480 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + LED3,
offset 1485 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + CMD0, ENABLE_RX | ONLINE);
offset 1490 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + IMR0, 0xff);
offset 1493 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + IMR1, 1);
offset 1498 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + CR, ENABLE_INT);
offset 1502 dev/pcmcia/if_xe.c if ((bus_space_read_1(bst, bsh, offset + 0x10) & 0x01) == 0)
offset 1504 dev/pcmcia/if_xe.c bus_space_write_1(bst, bsh, offset + 0x10, 0x11);
offset 1524 dev/pcmcia/if_xe.c bus_size_t offset = sc->sc_offset;
offset 1528 dev/pcmcia/if_xe.c printf(" %2.2x", bus_space_read_1(bst, bsh, offset + i));
offset 1537 dev/pcmcia/if_xe.c bus_space_read_1(bst, bsh, offset + i));
offset 1550 dev/pcmcia/if_xe.c bus_space_read_1(bst, bsh, offset + i));
offset 623 dev/pcmcia/pcmcia.c pcmcia_io_map(pf, width, offset, size, pcihp, windowp)
offset 626 dev/pcmcia/pcmcia.c bus_addr_t offset;
offset 634 dev/pcmcia/pcmcia.c width, offset, size, pcihp, windowp))
offset 224 dev/pcmcia/pcmcia_cis.c int16_t offset;
offset 229 dev/pcmcia/pcmcia_cis.c *((u_int16_t *) & offset) =
offset 234 dev/pcmcia/pcmcia_cis.c addr = tuple.ptr + offset;
offset 309 dev/raidframe/rf_paritylog.c int boundary, offset = 0;
offset 346 dev/raidframe/rf_paritylog.c data->bufOffset = offset;
offset 347 dev/raidframe/rf_paritylog.c offset = offset + diskAddress->numSector;
offset 363 dev/raidframe/rf_paritylog.c data->bufOffset = offset;
offset 364 dev/raidframe/rf_paritylog.c offset += boundary;
offset 1763 dev/raidframe/rf_reconstruct.c RF_SectorNum_t offset, fd_offset; /*
offset 1841 dev/raidframe/rf_reconstruct.c row, diskno, &offset, &fd_offset,
offset 1857 dev/raidframe/rf_reconstruct.c RF_IO_TYPE_READ, offset +
offset 303 dev/sbus/agten.c agten_mmap(v, offset, prot)
offset 305 dev/sbus/agten.c off_t offset;
offset 310 dev/sbus/agten.c if (offset & PGOFSET)
offset 314 dev/sbus/agten.c if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {
offset 316 dev/sbus/agten.c sc->sc_physoffset + offset, prot, BUS_SPACE_MAP_LINEAR));
offset 313 dev/sbus/bwtwo.c bwtwo_mmap(v, offset, prot)
offset 315 dev/sbus/bwtwo.c off_t offset;
offset 320 dev/sbus/bwtwo.c if (offset & PGOFSET)
offset 323 dev/sbus/bwtwo.c if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize)
offset 325 dev/sbus/bwtwo.c BWTWO_VID_OFFSET + offset, prot, BUS_SPACE_MAP_LINEAR));
offset 386 dev/sbus/cgthree.c cgthree_mmap(void *v, off_t offset, int prot)
offset 390 dev/sbus/cgthree.c if (offset & PGOFSET || offset < 0)
offset 395 dev/sbus/cgthree.c if (offset >= NOOVERLAY)
offset 396 dev/sbus/cgthree.c offset -= NOOVERLAY;
offset 397 dev/sbus/cgthree.c else if (offset >= START)
offset 398 dev/sbus/cgthree.c offset -= START;
offset 400 dev/sbus/cgthree.c offset = 0;
offset 401 dev/sbus/cgthree.c if (offset >= sc->sc_sunfb.sf_fbsize)
offset 404 dev/sbus/cgthree.c CGTHREE_VID_OFFSET + offset, prot, BUS_SPACE_MAP_LINEAR));
offset 406 dev/sbus/cgthree.c if (offset < sc->sc_sunfb.sf_fbsize)
offset 408 dev/sbus/cgthree.c CGTHREE_VID_OFFSET + offset, prot,
offset 418 dev/sbus/cgtwelve.c cgtwelve_mmap(void *v, off_t offset, int prot)
offset 422 dev/sbus/cgtwelve.c if (offset & PGOFSET || offset < 0)
offset 429 dev/sbus/cgtwelve.c if (offset < sc->sc_sunfb.sf_fbsize * 32) {
offset 430 dev/sbus/cgtwelve.c return (bus_space_mmap(sc->sc_bustag, sc->sc_paddr, offset,
offset 356 dev/sbus/isp_sbus.c int offset = sbc->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT];
offset 357 dev/sbus/isp_sbus.c offset += (regoff & 0xff);
offset 358 dev/sbus/isp_sbus.c return (bus_space_read_2(sbc->sbus_bustag, sbc->sbus_reg, offset));
offset 365 dev/sbus/isp_sbus.c int offset = sbc->sbus_poff[(regoff & _BLK_REG_MASK) >> _BLK_REG_SHFT];
offset 366 dev/sbus/isp_sbus.c offset += (regoff & 0xff);
offset 367 dev/sbus/isp_sbus.c bus_space_write_2(sbc->sbus_bustag, sbc->sbus_reg, offset, val);
offset 283 dev/sbus/mgx.c mgx_mmap(void *v, off_t offset, int prot)
offset 287 dev/sbus/mgx.c if (offset & PGOFSET)
offset 291 dev/sbus/mgx.c if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {
offset 293 dev/sbus/mgx.c offset, prot, BUS_SPACE_MAP_LINEAR));
offset 247 dev/sbus/qec.c bus_addr_t offset = BUS_ADDR_PADDR(addr);
offset 262 dev/sbus/qec.c (t, t0, offset, size, flags, hp));
offset 273 dev/sbus/qec.c paddr = sc->sc_range[i].poffset + offset;
offset 372 dev/sbus/rfx.c rfx_mmap(void *v, off_t offset, int prot)
offset 376 dev/sbus/rfx.c if (offset & PGOFSET)
offset 379 dev/sbus/rfx.c if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {
offset 381 dev/sbus/rfx.c RFX_VRAM_ADDR + offset, prot, BUS_SPACE_MAP_LINEAR));
offset 522 dev/sbus/rfx.c u_int32_t *data, offset, value;
offset 549 dev/sbus/rfx.c offset = *data++;
offset 552 dev/sbus/rfx.c if (offset == (u_int32_t)-1 && value == (u_int32_t)-1)
offset 557 dev/sbus/rfx.c offset = letoh32(offset);
offset 558 dev/sbus/rfx.c value = letoh32(offset);
offset 561 dev/sbus/rfx.c if (offset & (1 << 31)) {
offset 562 dev/sbus/rfx.c offset = (offset & ~(1 << 31)) - RFX_RAMDAC_ADDR;
offset 563 dev/sbus/rfx.c if (offset < RFX_RAMDAC_SIZE)
offset 564 dev/sbus/rfx.c sc->sc_ramdac[offset] = value >> 24;
offset 566 dev/sbus/rfx.c offset -= RFX_CONTROL_ADDR;
offset 567 dev/sbus/rfx.c if (offset < RFX_CONTROL_SIZE)
offset 568 dev/sbus/rfx.c sc->sc_ctrl[offset >> 2] = value;
offset 107 dev/sbus/sbusvar.h #define sbus_bus_map(t, slot, offset, sz, flags, unused, hp) \
offset 108 dev/sbus/sbusvar.h bus_space_map(t, BUS_ADDR(slot, offset), sz, flags, hp)
offset 669 dev/sbus/stp4020.c stp4020_chip_io_map(pch, width, offset, size, pcihp, windowp)
offset 672 dev/sbus/stp4020.c bus_addr_t offset;
offset 681 dev/sbus/stp4020.c offset, size, &pcihp->ioh);
offset 369 dev/sbus/tvtwo.c tvtwo_mmap(void *v, off_t offset, int prot)
offset 373 dev/sbus/tvtwo.c if (offset & PGOFSET)
offset 377 dev/sbus/tvtwo.c if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize * 4) {
offset 379 dev/sbus/tvtwo.c PX_PLANE24_OFFSET + offset, prot, BUS_SPACE_MAP_LINEAR));
offset 452 dev/sbus/vigra.c vigra_mmap(void *v, off_t offset, int prot)
offset 456 dev/sbus/vigra.c if (offset & PGOFSET)
offset 459 dev/sbus/vigra.c if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {
offset 461 dev/sbus/vigra.c offset, prot, BUS_SPACE_MAP_LINEAR));
offset 416 dev/sbus/zx.c zx_mmap(void *v, off_t offset, int prot)
offset 420 dev/sbus/zx.c if (offset & PGOFSET)
offset 424 dev/sbus/zx.c if (offset >= 0 && offset < sc->sc_sunfb.sf_fbsize) {
offset 426 dev/sbus/zx.c ZX_OFF_SS0 + offset, prot, BUS_SPACE_MAP_LINEAR));
offset 196 dev/usb/if_rumreg.h uint8_t offset;
offset 214 dev/usb/if_rumreg.h uint8_t offset;
offset 379 dev/usb/if_udav.c udav_mem_read(struct udav_softc *sc, int offset, void *buf, int len)
offset 393 dev/usb/if_udav.c offset &= 0xffff;
offset 399 dev/usb/if_udav.c USETW(req.wIndex, offset);
offset 408 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, offset, err));
offset 416 dev/usb/if_udav.c udav_mem_write(struct udav_softc *sc, int offset, void *buf, int len)
offset 430 dev/usb/if_udav.c offset &= 0xffff;
offset 436 dev/usb/if_udav.c USETW(req.wIndex, offset);
offset 445 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, offset, err));
offset 453 dev/usb/if_udav.c udav_mem_write1(struct udav_softc *sc, int offset, unsigned char ch)
offset 467 dev/usb/if_udav.c offset &= 0xffff;
offset 472 dev/usb/if_udav.c USETW(req.wIndex, offset);
offset 481 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, offset, err));
offset 490 dev/usb/if_udav.c udav_csr_read(struct udav_softc *sc, int offset, void *buf, int len)
offset 504 dev/usb/if_udav.c offset &= 0xff;
offset 510 dev/usb/if_udav.c USETW(req.wIndex, offset);
offset 519 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, offset, err));
offset 527 dev/usb/if_udav.c udav_csr_write(struct udav_softc *sc, int offset, void *buf, int len)
offset 541 dev/usb/if_udav.c offset &= 0xff;
offset 547 dev/usb/if_udav.c USETW(req.wIndex, offset);
offset 556 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, offset, err));
offset 563 dev/usb/if_udav.c udav_csr_read1(struct udav_softc *sc, int offset)
offset 576 dev/usb/if_udav.c return (udav_csr_read(sc, offset, &val, 1) ? 0 : val);
offset 581 dev/usb/if_udav.c udav_csr_write1(struct udav_softc *sc, int offset, unsigned char ch)
offset 595 dev/usb/if_udav.c offset &= 0xff;
offset 600 dev/usb/if_udav.c USETW(req.wIndex, offset);
offset 609 dev/usb/if_udav.c sc->sc_dev.dv_xname, __func__, offset, err));
offset 389 dev/usb/if_url.c url_mem(struct url_softc *sc, int cmd, int offset, void *buf, int len)
offset 408 dev/usb/if_url.c USETW(req.wValue, offset);
offset 420 dev/usb/if_url.c offset, err));
offset 429 dev/usb/ueagle.c ueagle_cr(struct ueagle_softc *sc, uint32_t address, uint16_t offset,
offset 440 dev/usb/ueagle.c USETW(cmv.wOffsetAddress, offset);
offset 471 dev/usb/ueagle.c ueagle_cw(struct ueagle_softc *sc, uint32_t address, uint16_t offset,
offset 482 dev/usb/ueagle.c USETW(cmv.wOffsetAddress, offset);
offset 517 dev/usb/ueagle.c #define CR(sc, address, offset, data) do { \
offset 518 dev/usb/ueagle.c if ((error = ueagle_cr(sc, address, offset, data)) != 0) \
offset 600 dev/usb/ueagle.c #define CW(sc, address, offset, data) do { \
offset 601 dev/usb/ueagle.c if ((error = ueagle_cw(sc, address, offset, data)) != 0) \
offset 1333 dev/wscons/wsdisplay.c wsdisplaymmap(dev_t dev, off_t offset, int prot)
offset 1348 dev/wscons/wsdisplay.c return ((*sc->sc_accessops->mmap)(sc->sc_accesscookie, offset, prot));
offset 2597 dev/wscons/wsdisplay.c skip_char_right(unsigned short offset)
offset 2600 dev/wscons/wsdisplay.c unsigned short current = offset;
offset 2621 dev/wscons/wsdisplay.c skip_char_left(unsigned short offset)
offset 2624 dev/wscons/wsdisplay.c short current = offset;
offset 430 isofs/cd9660/cd9660_lookup.c cd9660_bufatoff(struct iso_node *ip, off_t offset, char **res,
offset 440 isofs/cd9660/cd9660_lookup.c lbn = lblkno(imp, offset);
offset 449 isofs/cd9660/cd9660_lookup.c *res = (char *)bp->b_data + blkoff(imp, offset);
offset 476 isofs/cd9660/cd9660_rrip.c ana->iso_ce_off = isonum_733(p->offset);
offset 137 isofs/cd9660/cd9660_rrip.h char offset [ISODCL ( 12, 19)];
offset 383 isofs/udf/ecma167-udf.h #define GETICB(ad_type, fentry, offset) \
offset 384 isofs/udf/ecma167-udf.h (struct ad_type *)&fentry->data[offset]
offset 87 isofs/udf/udf.h int offset;
offset 422 isofs/udf/udf_vnops.c off_t fsize, offset;
offset 432 isofs/udf/udf_vnops.c offset = uio->uio_offset;
offset 433 isofs/udf/udf_vnops.c if (uio->uio_resid + offset <= fsize)
offset 436 isofs/udf/udf_vnops.c size = fsize - offset;
offset 437 isofs/udf/udf_vnops.c error = udf_readatoffset(up, &size, offset, &bp, &data);
offset 549 isofs/udf/udf_vnops.c udf_opendir(struct unode *up, int offset, int fsize, struct umount *ump)
offset 557 isofs/udf/udf_vnops.c ds->offset = offset;
offset 571 isofs/udf/udf_vnops.c if (ds->offset + ds->off >= ds->fsize) {
offset 579 isofs/udf/udf_vnops.c error = udf_readatoffset(ds->node, &ds->size, ds->offset,
offset 631 isofs/udf/udf_vnops.c ds->offset += ds->size;
offset 633 isofs/udf/udf_vnops.c error = udf_readatoffset(ds->node, &ds->size, ds->offset,
offset 802 isofs/udf/udf_vnops.c uio->uio_offset = ds->offset + ds->off;
offset 976 isofs/udf/udf_vnops.c int offset, error = 0;
offset 1024 isofs/udf/udf_vnops.c offset = 0;
offset 1027 isofs/udf/udf_vnops.c offset = up->u_diroff;
offset 1033 isofs/udf/udf_vnops.c ds = udf_opendir(up, offset, fsize, ump);
offset 1078 isofs/udf/udf_vnops.c up->u_diroff = ds->offset + ds->off;
offset 1092 isofs/udf/udf_vnops.c offset = 0;
offset 1168 isofs/udf/udf_vnops.c udf_readatoffset(struct unode *up, int *size, off_t offset,
offset 1181 isofs/udf/udf_vnops.c error = udf_bmap_internal(up, offset, §or, &max_size);
offset 1207 isofs/udf/udf_vnops.c *data = (uint8_t *)&bp1->b_data[offset % ump->um_bsize];
offset 1216 isofs/udf/udf_vnops.c udf_bmap_internal(struct unode *up, off_t offset, daddr64_t *sector,
offset 1253 isofs/udf/udf_vnops.c offset -= icblen;
offset 1263 isofs/udf/udf_vnops.c } while(offset >= icblen);
offset 1265 isofs/udf/udf_vnops.c lsector = (offset >> ump->um_bshift) +
offset 1278 isofs/udf/udf_vnops.c offset -= icblen;
offset 1288 isofs/udf/udf_vnops.c } while(offset >= icblen);
offset 1290 isofs/udf/udf_vnops.c lsector = (offset >> ump->um_bshift) +
offset 249 kern/exec_elf.c long diff, offset, bdiff;
offset 281 kern/exec_elf.c offset = ph->p_offset - bdiff;
offset 293 kern/exec_elf.c offset, *prot, flags);
offset 296 kern/exec_elf.c base + psize, vp, offset + psize, *prot, flags);
offset 299 kern/exec_elf.c NEW_VMCMD2(vcset, vmcmd_map_pagedvn, psize, base, vp, offset,
offset 57 kern/exec_subr.c new_vmcmd(evsp, proc, len, addr, vp, offset, prot, flags)
offset 63 kern/exec_subr.c u_long offset;
offset 77 kern/exec_subr.c vcp->ev_offset = offset;
offset 343 kern/kern_lkm.c curp->offset = 0;
offset 377 kern/kern_lkm.c || loadbufp->cnt > (curp->size - curp->offset)) {
offset 384 kern/kern_lkm.c (caddr_t)curp->area + curp->offset, loadbufp->cnt);
offset 388 kern/kern_lkm.c if ((curp->offset + loadbufp->cnt) < curp->size)
offset 393 kern/kern_lkm.c curp->offset += loadbufp->cnt;
offset 436 kern/kern_lkm.c if ((curp->size - curp->offset) > 0)
offset 438 kern/kern_lkm.c bzero((caddr_t)curp->area + curp->offset,
offset 439 kern/kern_lkm.c curp->size - curp->offset);
offset 517 kern/kern_lkm.c statp->offset = curp->private.lkm_any->lkm_offset;
offset 233 kern/kern_malloc_debug.c vaddr_t va, offset;
offset 250 kern/kern_malloc_debug.c offset = va - vm_map_min(kernel_map);
offset 273 kern/kern_timeout.c db_expr_t offset;
offset 278 kern/kern_timeout.c db_find_sym_and_offset((db_addr_t)to->to_func, &name, &offset);
offset 167 kern/subr_prof.c upp->pr_off = SCARG(uap, offset);
offset 99 kern/sys_generic.c off_t *offset, register_t *retval)
offset 135 kern/sys_generic.c error = (*fp->f_ops->fo_read)(fp, offset, &auio, fp->f_cred);
offset 183 kern/sys_generic.c int iovcnt, off_t *offset, register_t *retval)
offset 243 kern/sys_generic.c error = (*fp->f_ops->fo_read)(fp, offset, &auio, fp->f_cred);
offset 298 kern/sys_generic.c size_t nbyte, off_t *offset, register_t *retval)
offset 334 kern/sys_generic.c error = (*fp->f_ops->fo_write)(fp, offset, &auio, fp->f_cred);
offset 385 kern/sys_generic.c int iovcnt, off_t *offset, register_t *retval)
offset 445 kern/sys_generic.c error = (*fp->f_ops->fo_write)(fp, offset, &auio, fp->f_cred);
offset 549 kern/uipc_socket.c int flags, len, error, s, offset;
offset 760 kern/uipc_socket.c offset = 0;
offset 773 kern/uipc_socket.c if (so->so_oobmark && len > so->so_oobmark - offset)
offset 774 kern/uipc_socket.c len = so->so_oobmark - offset;
offset 852 kern/uipc_socket.c offset += len;
offset 853 kern/uipc_socket.c if (offset == so->so_oobmark)
offset 1412 kern/vfs_syscalls.c offarg = SCARG(uap, offset);
offset 2450 kern/vfs_syscalls.c off_t offset;
offset 2463 kern/vfs_syscalls.c offset = SCARG(uap, offset);
offset 2469 kern/vfs_syscalls.c &offset, retval));
offset 2488 kern/vfs_syscalls.c off_t offset;
offset 2503 kern/vfs_syscalls.c offset = SCARG(uap, offset);
offset 2507 kern/vfs_syscalls.c &offset, retval));
offset 2526 kern/vfs_syscalls.c off_t offset;
offset 2541 kern/vfs_syscalls.c offset = SCARG(uap, offset);
offset 2545 kern/vfs_syscalls.c &offset, retval));
offset 2564 kern/vfs_syscalls.c off_t offset;
offset 2579 kern/vfs_syscalls.c offset = SCARG(uap, offset);
offset 2583 kern/vfs_syscalls.c &offset, retval));
offset 245 kern/vfs_vnops.c vn_rdwr(enum uio_rw rw, struct vnode *vp, caddr_t base, int len, off_t offset,
offset 260 kern/vfs_vnops.c auio.uio_offset = offset;
offset 349 lib/libsa/cd9660.c cd9660_seek(struct open_file *f, off_t offset, int where)
offset 355 lib/libsa/cd9660.c fp->off = offset;
offset 358 lib/libsa/cd9660.c fp->off += offset;
offset 361 lib/libsa/cd9660.c fp->off = fp->size - offset;
offset 41 lib/libsa/cd9660.h off_t cd9660_seek(struct open_file *f, off_t offset, int where);
offset 366 lib/libsa/cread.c lseek(int fd, off_t offset, int where)
offset 378 lib/libsa/cread.c return(olseek(fd, offset, where));
offset 383 lib/libsa/cread.c off_t res = olseek(fd, offset, where);
offset 393 lib/libsa/cread.c offset += s->stream.total_out;
offset 398 lib/libsa/cread.c if (offset < s->stream.total_out) {
offset 420 lib/libsa/cread.c if (offset > s->stream.total_out) {
offset 421 lib/libsa/cread.c off_t toskip = offset - s->stream.total_out;
offset 438 lib/libsa/cread.c if (offset != s->stream.total_out)
offset 441 lib/libsa/cread.c return(offset);
offset 199 lib/libsa/loadfile.c paddr_t offset = marks[MARK_START];
offset 285 lib/libsa/loadfile.c paddr_t offset = marks[MARK_START];
offset 88 lib/libsa/loadfile_elf.c paddr_t offset = marks[MARK_START], shpp, elfp;
offset 68 lib/libsa/lseek.c lseek(int fd, off_t offset, int where)
offset 70 lib/libsa/lseek.c olseek(int fd, off_t offset, int where)
offset 86 lib/libsa/lseek.c f->f_offset = offset;
offset 89 lib/libsa/lseek.c f->f_offset += offset;
offset 99 lib/libsa/lseek.c return (f->f_ops->seek)(f, offset, where);
offset 564 lib/libsa/nfs.c nfs_seek(struct open_file *f, off_t offset, int where)
offset 571 lib/libsa/nfs.c d->off = offset;
offset 574 lib/libsa/nfs.c d->off += offset;
offset 577 lib/libsa/nfs.c d->off = size - offset;
offset 39 lib/libsa/nfs.h off_t nfs_seek(struct open_file *f, off_t offset, int where);
offset 94 lib/libsa/nullfs.c null_seek(struct open_file *f, off_t offset, int where)
offset 69 lib/libsa/stand.h off_t (*seek)(struct open_file *f, off_t offset, int where);
offset 179 lib/libsa/stand.h off_t null_seek(struct open_file *f, off_t offset, int where);
offset 399 lib/libsa/tftp.c tftp_seek(struct open_file *f, off_t offset, int where)
offset 406 lib/libsa/tftp.c tftpfile->off = offset;
offset 409 lib/libsa/tftp.c tftpfile->off += offset;
offset 603 lib/libsa/ufs.c ufs_seek(struct open_file *f, off_t offset, int where)
offset 609 lib/libsa/ufs.c fp->f_seekp = offset;
offset 612 lib/libsa/ufs.c fp->f_seekp += offset;
offset 615 lib/libsa/ufs.c fp->f_seekp = fp->f_di.di_size - offset;
offset 41 lib/libsa/ufs.h off_t ufs_seek(struct open_file *f, off_t offset, int where);
offset 565 lib/libz/infback.c state->offset = (unsigned)this.val;
offset 571 lib/libz/infback.c state->offset += BITS(state->extra);
offset 574 lib/libz/infback.c if (state->offset > state->wsize - (state->whave < state->wsize ?
offset 580 lib/libz/infback.c Tracevv((stderr, "inflate: distance %u\n", state->offset));
offset 585 lib/libz/infback.c copy = state->wsize - state->offset;
offset 591 lib/libz/infback.c from = put - state->offset;
offset 1093 lib/libz/inflate.c state->offset = (unsigned)this.val;
offset 1099 lib/libz/inflate.c state->offset += BITS(state->extra);
offset 1103 lib/libz/inflate.c if (state->offset > state->dmax) {
offset 1109 lib/libz/inflate.c if (state->offset > state->whave + out - left) {
offset 1118 lib/libz/inflate.c Tracevv((stderr, "inflate: distance %u\n", state->offset));
offset 1123 lib/libz/inflate.c if (state->offset > copy) { /* copy from window */
offset 1124 lib/libz/inflate.c copy = state->offset - copy;
offset 1134 lib/libz/inflate.c from = put - state->offset;
offset 98 lib/libz/inflate.h unsigned offset; /* distance back to copy string from */
offset 1185 lib/libz/zlib.h z_off_t offset, int whence));
offset 951 msdosfs/msdosfs_lookup.c uint32_t offset = pdep->de_fndoffset;
offset 955 msdosfs/msdosfs_lookup.c dep->de_Name, dep, offset);
offset 959 msdosfs/msdosfs_lookup.c offset += sizeof(struct direntry);
offset 961 msdosfs/msdosfs_lookup.c offset -= sizeof(struct direntry);
offset 962 msdosfs/msdosfs_lookup.c error = pcbmap(pdep, de_cluster(pmp, offset), &bn, 0, &blsize);
offset 970 msdosfs/msdosfs_lookup.c ep = bptoep(pmp, bp, offset);
offset 977 msdosfs/msdosfs_lookup.c && offset != pdep->de_fndoffset) {
offset 981 msdosfs/msdosfs_lookup.c offset += sizeof(struct direntry);
offset 989 msdosfs/msdosfs_lookup.c offset -= sizeof(struct direntry);
offset 992 msdosfs/msdosfs_lookup.c || !(offset & pmp->pm_crbomask)
offset 999 msdosfs/msdosfs_lookup.c && !(offset & pmp->pm_crbomask)
offset 1000 msdosfs/msdosfs_lookup.c && offset);
offset 1396 msdosfs/msdosfs_vnops.c off_t offset, wlast = -1;
offset 1424 msdosfs/msdosfs_vnops.c offset = uio->uio_offset;
offset 1426 msdosfs/msdosfs_vnops.c (offset & (sizeof(struct direntry) - 1)))
offset 1452 msdosfs/msdosfs_vnops.c offset);
offset 1455 msdosfs/msdosfs_vnops.c if (offset < bias) {
offset 1456 msdosfs/msdosfs_vnops.c for (n = (int)offset / sizeof(struct direntry);
offset 1482 msdosfs/msdosfs_vnops.c offset += sizeof(struct direntry);
offset 1484 msdosfs/msdosfs_vnops.c *cookies++ = offset;
offset 1493 msdosfs/msdosfs_vnops.c lbn = de_cluster(pmp, offset - bias);
offset 1494 msdosfs/msdosfs_vnops.c on = (offset - bias) & pmp->pm_crbomask;
offset 1496 msdosfs/msdosfs_vnops.c diff = dep->de_FileSize - (offset - bias);
offset 1515 msdosfs/msdosfs_vnops.c dentp++, offset += sizeof(struct direntry)) {
offset 1546 msdosfs/msdosfs_vnops.c wlast = offset;
offset 1607 msdosfs/msdosfs_vnops.c offset = wlast;
offset 1618 msdosfs/msdosfs_vnops.c *cookies++ = offset + sizeof(struct direntry);
offset 1633 msdosfs/msdosfs_vnops.c uio->uio_offset = offset;
offset 1635 msdosfs/msdosfs_vnops.c if (dep->de_FileSize - (offset - bias) <= 0)
offset 694 net80211/ieee80211_output.c u_int i, offset = 0, len;
offset 701 net80211/ieee80211_output.c offset = i & ~1;
offset 706 net80211/ieee80211_output.c len = i - offset + 1;
offset 714 net80211/ieee80211_output.c *frm = offset;
offset 721 net80211/ieee80211_output.c memcpy(frm, &ic->ic_tim_bitmap[offset], len);
offset 2026 netinet/ip_output.c u_int16_t csum, offset;
offset 2029 netinet/ip_output.c offset = ip->ip_hl << 2;
offset 2030 netinet/ip_output.c csum = in4_cksum(m, 0, offset, m->m_pkthdr.len - offset);
offset 2036 netinet/ip_output.c offset += offsetof(struct tcphdr, th_sum);
offset 2040 netinet/ip_output.c offset += offsetof(struct udphdr, uh_sum);
offset 2047 netinet/ip_output.c if ((offset + sizeof(u_int16_t)) > m->m_len)
offset 2048 netinet/ip_output.c m_copyback(m, offset, sizeof(csum), &csum);
offset 2050 netinet/ip_output.c *(u_int16_t *)(mtod(m, caddr_t) + offset) = csum;
offset 183 netinet6/frag6.c int offset = *offp, nxt, i, next;
offset 194 netinet6/frag6.c IP6_EXTHDR_GET(ip6f, struct ip6_frag *, m, offset, sizeof(*ip6f));
offset 227 netinet6/frag6.c icmp6_error(m, ICMP6_PARAM_PROB, ICMP6_PARAMPROB_HEADER, offset);
offset 239 netinet6/frag6.c (((ntohs(ip6->ip6_plen) - offset) & 0x7) != 0)) {
offset 250 netinet6/frag6.c offset += sizeof(struct ip6_frag);
offset 317 netinet6/frag6.c q6->ip6q_unfrglen = offset - sizeof(struct ip6_hdr) -
offset 327 netinet6/frag6.c frgpartlen = sizeof(struct ip6_hdr) + ntohs(ip6->ip6_plen) - offset;
offset 332 netinet6/frag6.c offset - sizeof(struct ip6_frag) +
offset 339 netinet6/frag6.c offset - sizeof(struct ip6_frag) +
offset 393 netinet6/frag6.c ip6af->ip6af_offset = offset;
offset 549 netinet6/frag6.c offset = ip6af->ip6af_offset - sizeof(struct ip6_frag);
offset 552 netinet6/frag6.c ip6->ip6_plen = htons((u_short)next + offset - sizeof(struct ip6_hdr));
offset 563 netinet6/frag6.c if (offset < m->m_len) {
offset 565 netinet6/frag6.c offset);
offset 570 netinet6/frag6.c if ((t = m_split(m, offset, M_DONTWAIT)) == NULL) {
offset 585 netinet6/frag6.c u_int8_t *prvnxtp = ip6_get_prevhdr(m, offset); /* XXX */
offset 609 netinet6/frag6.c *offp = offset;
offset 2529 nfs/nfs_vnops.c nfs_commit(vp, offset, cnt, procp)
offset 2531 nfs/nfs_vnops.c u_quad_t offset;
offset 2549 nfs/nfs_vnops.c txdr_hyper(offset, tl);
offset 506 scsi/scsi_base.c int error, blk_desc_len, offset;
offset 545 scsi/scsi_base.c offset = sizeof(struct scsi_mode_header);
offset 565 scsi/scsi_base.c offset = sizeof(struct scsi_mode_header_big);
offset 579 scsi/scsi_base.c general = (struct scsi_blk_desc *)&buf->buf[offset];
offset 589 scsi/scsi_base.c direct = (struct scsi_direct_blk_desc *)&buf->buf[offset];
offset 102 sys/audioio.h u_int offset; /* Physical transfer offset in buffer */
offset 189 sys/exec.h u_long len, u_long addr, struct vnode *vp, u_long offset,
offset 191 sys/exec.h #define NEW_VMCMD(evsp,proc,len,addr,vp,offset,prot) \
offset 192 sys/exec.h new_vmcmd(evsp,proc,len,addr,vp,offset,prot, 0);
offset 193 sys/exec.h #define NEW_VMCMD2(evsp,proc,len,addr,vp,offset,prot,flags) \
offset 194 sys/exec.h new_vmcmd(evsp,proc,len,addr,vp,offset,prot,flags)
offset 196 sys/exec.h #define NEW_VMCMD(evsp,proc,len,addr,vp,offset,prot) \
offset 197 sys/exec.h NEW_VMCMD2(evsp,proc,len,addr,vp,offset,prot,0)
offset 198 sys/exec.h #define NEW_VMCMD2(evsp,proc,len,addr,vp,offset,prot,flags) do { \
offset 208 sys/exec.h vcp->ev_offset = (offset); \
offset 171 sys/lkm.h u_long offset;
offset 354 sys/lkm.h u_long offset; /* OUT: target table offset */
offset 99 sys/pciio.h u_int32_t offset; /* offset into device list */
offset 110 sys/syscallargs.h syscallarg(long) offset;
offset 213 sys/syscallargs.h syscallarg(u_long) offset;
offset 760 sys/syscallargs.h syscallarg(off_t) offset;
offset 768 sys/syscallargs.h syscallarg(off_t) offset;
offset 866 sys/syscallargs.h syscallarg(off_t) offset;
offset 1096 sys/syscallargs.h syscallarg(off_t) offset;
offset 1104 sys/syscallargs.h syscallarg(off_t) offset;
offset 227 ufs/ext2fs/ext2fs_inode.c int offset, size, level;
offset 272 ufs/ext2fs/ext2fs_inode.c offset = blkoff(fs, length - 1);
offset 277 ufs/ext2fs/ext2fs_inode.c error = ext2fs_buf_alloc(oip, lbn, offset + 1, cred, &bp,
offset 298 ufs/ext2fs/ext2fs_inode.c offset = blkoff(fs, length);
offset 299 ufs/ext2fs/ext2fs_inode.c if (offset == 0) {
offset 306 ufs/ext2fs/ext2fs_inode.c error = ext2fs_buf_alloc(oip, lbn, offset, cred, &bp,
offset 314 ufs/ext2fs/ext2fs_inode.c bzero(bp->b_data + offset, (u_int)(size - offset));
offset 80 ufs/ext2fs/ext2fs_subr.c ext2fs_bufatoff(struct inode *ip, off_t offset, char **res, struct buf **bpp)
offset 90 ufs/ext2fs/ext2fs_subr.c lbn = lblkno(fs, offset);
offset 98 ufs/ext2fs/ext2fs_subr.c *res = (char *)bp->b_data + blkoff(fs, offset);
offset 170 ufs/ffs/ffs_inode.c int offset, size, level;
offset 269 ufs/ffs/ffs_inode.c offset = blkoff(fs, length);
offset 270 ufs/ffs/ffs_inode.c if (offset == 0) {
offset 297 ufs/ffs/ffs_inode.c bzero((char *)bp->b_data + offset,
offset 298 ufs/ffs/ffs_inode.c (u_int)(size - offset));
offset 2610 ufs/ffs/ffs_softdep.c int offset; /* offset of new entry within directory block */
offset 2623 ufs/ffs/ffs_softdep.c offset = blkoff(fs, diroffset);
offset 2627 ufs/ffs/ffs_softdep.c dap->da_offset = offset;
offset 2676 ufs/ffs/ffs_softdep.c LIST_INSERT_HEAD(&pagedep->pd_diraddhd[DIRADDHASH(offset)], dap,
offset 2756 ufs/ffs/ffs_softdep.c int offset, oldoffset, newoffset;
offset 2763 ufs/ffs/ffs_softdep.c offset = blkoff(dp->i_fs, dp->i_offset);
offset 2766 ufs/ffs/ffs_softdep.c oldoffset = offset + (oldloc - base);
offset 2767 ufs/ffs/ffs_softdep.c newoffset = offset + (newloc - base);
offset 2913 ufs/ffs/ffs_softdep.c int offset;
offset 2942 ufs/ffs/ffs_softdep.c offset = blkoff(dp->i_fs, dp->i_offset);
offset 2953 ufs/ffs/ffs_softdep.c LIST_FOREACH(dap, &pagedep->pd_diraddhd[DIRADDHASH(offset)], da_pdlist)
offset 2954 ufs/ffs/ffs_softdep.c if (dap->da_offset == offset)
offset 2959 ufs/ffs/ffs_softdep.c if (dap->da_offset == offset)
offset 3020 ufs/ffs/ffs_softdep.c int offset;
offset 3026 ufs/ffs/ffs_softdep.c offset = blkoff(dp->i_fs, dp->i_offset);
offset 3031 ufs/ffs/ffs_softdep.c dap->da_offset = offset;
offset 3090 ufs/ffs/ffs_softdep.c LIST_INSERT_HEAD(&pagedep->pd_diraddhd[DIRADDHASH(offset)],
offset 57 ufs/ffs/ffs_subr.c ffs_bufatoff(struct inode *ip, off_t offset, char **res, struct buf **bpp)
offset 67 ufs/ffs/ffs_subr.c lbn = lblkno(fs, offset);
offset 77 ufs/ffs/ffs_subr.c *res = (char *)bp->b_data + blkoff(fs, offset);
offset 188 ufs/ffs/softdep.h #define DIRADDHASH(offset) (((offset) >> 2) % DAHASHSZ)
offset 138 ufs/ufs/inode.h int (* iv_bufatoff)(struct inode *, off_t offset, char **res,
offset 161 ufs/ufs/inode.h #define UFS_BUFATOFF(ip, offset, res, bpp) \
offset 162 ufs/ufs/inode.h ((ip)->i_vtbl->iv_bufatoff)((ip), (offset), (res), (bpp))
offset 68 ufs/ufs/ufs_dirhash.c void ufsdirhash_adjfree(struct dirhash *dh, doff_t offset, int diff);
offset 71 ufs/ufs/ufs_dirhash.c doff_t offset);
offset 72 ufs/ufs/ufs_dirhash.c doff_t ufsdirhash_getprev(struct direct *dp, doff_t offset);
offset 319 ufs/ufs/ufs_dirhash.c doff_t blkoff, bmask, offset, prevoff;
offset 378 ufs/ufs/ufs_dirhash.c for (i = slot; (offset = DH_ENTRY(dh, i)) != DIRHASH_EMPTY;
offset 380 ufs/ufs/ufs_dirhash.c if (offset == dh->dh_seqoff)
offset 382 ufs/ufs/ufs_dirhash.c if (offset == dh->dh_seqoff) {
offset 393 ufs/ufs/ufs_dirhash.c for (; (offset = DH_ENTRY(dh, slot)) != DIRHASH_EMPTY;
offset 395 ufs/ufs/ufs_dirhash.c if (offset == DIRHASH_DEL)
offset 399 ufs/ufs/ufs_dirhash.c if (offset < 0 || offset >= DIP(ip, size))
offset 401 ufs/ufs/ufs_dirhash.c if ((offset & ~bmask) != blkoff) {
offset 404 ufs/ufs/ufs_dirhash.c blkoff = offset & ~bmask;
offset 408 ufs/ufs/ufs_dirhash.c dp = (struct direct *)(bp->b_data + (offset & bmask));
offset 410 ufs/ufs/ufs_dirhash.c DIRBLKSIZ - (offset & (DIRBLKSIZ - 1))) {
offset 419 ufs/ufs/ufs_dirhash.c if (offset & (DIRBLKSIZ - 1)) {
offset 421 ufs/ufs/ufs_dirhash.c offset);
offset 427 ufs/ufs/ufs_dirhash.c prevoff = offset;
offset 432 ufs/ufs/ufs_dirhash.c if (dh->dh_seqopt == 0 && dh->dh_seqoff == offset)
offset 434 ufs/ufs/ufs_dirhash.c dh->dh_seqoff = offset + DIRSIZ(0, dp);
offset 437 ufs/ufs/ufs_dirhash.c *offp = offset;
offset 596 ufs/ufs/ufs_dirhash.c ufsdirhash_add(struct inode *ip, struct direct *dirp, doff_t offset)
offset 610 ufs/ufs/ufs_dirhash.c DIRHASH_ASSERT(offset < dh->dh_dirblks * DIRBLKSIZ,
offset 628 ufs/ufs/ufs_dirhash.c DH_ENTRY(dh, slot) = offset;
offset 631 ufs/ufs/ufs_dirhash.c ufsdirhash_adjfree(dh, offset, -DIRSIZ(0, dirp));
offset 641 ufs/ufs/ufs_dirhash.c ufsdirhash_remove(struct inode *ip, struct direct *dirp, doff_t offset)
offset 655 ufs/ufs/ufs_dirhash.c DIRHASH_ASSERT(offset < dh->dh_dirblks * DIRBLKSIZ,
offset 658 ufs/ufs/ufs_dirhash.c slot = ufsdirhash_findslot(dh, dirp->d_name, dirp->d_namlen, offset);
offset 664 ufs/ufs/ufs_dirhash.c ufsdirhash_adjfree(dh, offset, DIRSIZ(0, dirp));
offset 702 ufs/ufs/ufs_dirhash.c ufsdirhash_newblk(struct inode *ip, doff_t offset)
offset 716 ufs/ufs/ufs_dirhash.c DIRHASH_ASSERT(offset == dh->dh_dirblks * DIRBLKSIZ,
offset 718 ufs/ufs/ufs_dirhash.c block = offset / DIRBLKSIZ;
offset 738 ufs/ufs/ufs_dirhash.c ufsdirhash_dirtrunc(struct inode *ip, doff_t offset)
offset 752 ufs/ufs/ufs_dirhash.c DIRHASH_ASSERT(offset <= dh->dh_dirblks * DIRBLKSIZ,
offset 754 ufs/ufs/ufs_dirhash.c block = howmany(offset, DIRBLKSIZ);
offset 794 ufs/ufs/ufs_dirhash.c ufsdirhash_checkblock(struct inode *ip, char *buf, doff_t offset)
offset 811 ufs/ufs/ufs_dirhash.c block = offset / DIRBLKSIZ;
offset 812 ufs/ufs/ufs_dirhash.c if ((offset & (DIRBLKSIZ - 1)) != 0 || block >= dh->dh_dirblks)
offset 837 ufs/ufs/ufs_dirhash.c ufsdirhash_findslot(dh, dp->d_name, dp->d_namlen, offset + i);
offset 884 ufs/ufs/ufs_dirhash.c ufsdirhash_adjfree(struct dirhash *dh, doff_t offset, int diff)
offset 889 ufs/ufs/ufs_dirhash.c block = offset / DIRBLKSIZ;
offset 920 ufs/ufs/ufs_dirhash.c ufsdirhash_findslot(struct dirhash *dh, char *name, int namelen, doff_t offset)
offset 929 ufs/ufs/ufs_dirhash.c while (DH_ENTRY(dh, slot) != offset &&
offset 932 ufs/ufs/ufs_dirhash.c if (DH_ENTRY(dh, slot) != offset)
offset 974 ufs/ufs/ufs_dirhash.c ufsdirhash_getprev(struct direct *dirp, doff_t offset)
offset 981 ufs/ufs/ufs_dirhash.c blkoff = offset & ~(DIRBLKSIZ - 1); /* offset of start of block */
offset 982 ufs/ufs/ufs_dirhash.c entrypos = offset & (DIRBLKSIZ - 1); /* entry relative to block */
offset 604 ufs/ufs/ufs_lookup.c ufs_dirbad(struct inode *ip, doff_t offset, char *how)
offset 610 ufs/ufs/ufs_lookup.c mp->mnt_stat.f_mntonname, ip->i_number, offset, how);
offset 133 uvm/uvm_amap.c pp_getreflen(int *ppref, int offset, int *refp, int *lenp)
offset 136 uvm/uvm_amap.c if (ppref[offset] > 0) { /* chunk size must be 1 */
offset 137 uvm/uvm_amap.c *refp = ppref[offset] - 1; /* don't forget to adjust */
offset 140 uvm/uvm_amap.c *refp = (ppref[offset] * -1) - 1;
offset 141 uvm/uvm_amap.c *lenp = ppref[offset+1];
offset 151 uvm/uvm_amap.c pp_setreflen(int *ppref, int offset, int ref, int len)
offset 154 uvm/uvm_amap.c ppref[offset] = ref + 1;
offset 156 uvm/uvm_amap.c ppref[offset] = (ref + 1) * -1;
offset 157 uvm/uvm_amap.c ppref[offset+1] = len;
offset 865 uvm/uvm_amap.c amap_splitref(struct vm_aref *origref, struct vm_aref *splitref, vaddr_t offset)
offset 869 uvm/uvm_amap.c AMAP_B2SLOT(leftslots, offset);
offset 58 uvm/uvm_amap_i.h amap_lookup(aref, offset)
offset 60 uvm/uvm_amap_i.h vaddr_t offset;
offset 66 uvm/uvm_amap_i.h AMAP_B2SLOT(slot, offset);
offset 73 uvm/uvm_amap_i.h amap, offset, amap->am_anon[slot], 0);
offset 84 uvm/uvm_amap_i.h amap_lookups(aref, offset, anons, npages)
offset 86 uvm/uvm_amap_i.h vaddr_t offset;
offset 94 uvm/uvm_amap_i.h AMAP_B2SLOT(slot, offset);
offset 118 uvm/uvm_amap_i.h amap_add(aref, offset, anon, replace)
offset 120 uvm/uvm_amap_i.h vaddr_t offset;
offset 128 uvm/uvm_amap_i.h AMAP_B2SLOT(slot, offset);
offset 157 uvm/uvm_amap_i.h amap, offset, anon, replace);
offset 166 uvm/uvm_amap_i.h amap_unadd(aref, offset)
offset 168 uvm/uvm_amap_i.h vaddr_t offset;
offset 174 uvm/uvm_amap_i.h AMAP_B2SLOT(slot, offset);
offset 202 uvm/uvm_amap_i.h amap_ref(amap, offset, len, flags)
offset 204 uvm/uvm_amap_i.h vaddr_t offset;
offset 221 uvm/uvm_amap_i.h amap_pp_adjref(amap, offset, len, 1);
offset 237 uvm/uvm_amap_i.h amap_unref(amap, offset, len, all)
offset 239 uvm/uvm_amap_i.h vaddr_t offset;
offset 270 uvm/uvm_amap_i.h amap_pp_adjref(amap, offset, len, -1);
offset 703 uvm/uvm_aobj.c uao_dropswap(&aobj->u_obj, pg->offset >> PAGE_SHIFT);
offset 851 uvm/uvm_aobj.c if (pp->offset < start || pp->offset >= stop)
offset 916 uvm/uvm_aobj.c uao_dropswap(uobj, pp->offset >> PAGE_SHIFT);
offset 953 uvm/uvm_aobj.c uao_get(uobj, offset, pps, npagesp, centeridx, access_type, advice, flags)
offset 955 uvm/uvm_aobj.c voff_t offset;
offset 969 uvm/uvm_aobj.c aobj, (u_long)offset, flags,0);
offset 990 uvm/uvm_aobj.c for (lcv = 0, current_offset = offset ; lcv < maxpages ;
offset 1061 uvm/uvm_aobj.c for (lcv = 0, current_offset = offset ; lcv < maxpages ;
offset 1272 uvm/uvm_aobj.c uao_dropswap(&aobj->u_obj, pg->offset >> PAGE_SHIFT);
offset 422 uvm/uvm_device.c curr_offset = entry->offset + (vaddr - entry->start);
offset 763 uvm/uvm_fault.c uoff = (startva - ufi.entry->start) + ufi.entry->offset;
offset 906 uvm/uvm_fault.c (void) uobj->pgops->pgo_get(uobj, ufi.entry->offset +
offset 1341 uvm/uvm_fault.c uoff = (ufi.orig_rvaddr - ufi.entry->start) + ufi.entry->offset;
offset 1535 uvm/uvm_fault.c uoff = uobjpage->offset;
offset 1735 uvm/uvm_fault.c uao_dropswap(uobj, pg->offset >> PAGE_SHIFT);
offset 343 uvm/uvm_km.c voff_t offset;
offset 383 uvm/uvm_km.c offset = kva - vm_map_min(kernel_map);
offset 385 uvm/uvm_km.c offset = 0;
offset 387 uvm/uvm_km.c UVMHIST_LOG(maphist, " kva=0x%lx, offset=0x%lx", kva, offset,0,0);
offset 396 uvm/uvm_km.c pg = uvm_pagealloc(obj, offset, NULL, 0);
offset 429 uvm/uvm_km.c offset += PAGE_SIZE;
offset 479 uvm/uvm_km.c voff_t offset;
offset 504 uvm/uvm_km.c offset = kva - vm_map_min(kernel_map);
offset 505 uvm/uvm_km.c UVMHIST_LOG(maphist," kva=0x%lx, offset=0x%lx", kva, offset,0,0);
offset 514 uvm/uvm_km.c pg = uvm_pagelookup(uvm.kernel_object, offset);
offset 530 uvm/uvm_km.c pg = uvm_pagealloc(uvm.kernel_object, offset, NULL, 0);
offset 559 uvm/uvm_km.c offset += PAGE_SIZE;
offset 603 uvm/uvm_map.c entry->offset += new_adj; /* shift start over */
offset 655 uvm/uvm_map.c new_entry->offset += new_adj;
offset 805 uvm/uvm_map.c if (uobj && prev_entry->offset +
offset 888 uvm/uvm_map.c new_entry->offset = uoffset;
offset 1609 uvm/uvm_map.c uvm_map_reserve(struct vm_map *map, vsize_t size, vaddr_t offset,
offset 1615 uvm/uvm_map.c map,size,offset,raddr);
offset 1625 uvm/uvm_map.c if (uvm_map(map, raddr, size, NULL, offset, 0,
offset 1924 uvm/uvm_map.c newentry->offset = entry->offset + fudge;
offset 1926 uvm/uvm_map.c newentry->offset = 0;
offset 2142 uvm/uvm_map.c entry->offset = 0;
offset 2866 uvm/uvm_map.c vaddr_t offset;
offset 2921 uvm/uvm_map.c offset = start - current->start;
offset 2923 uvm/uvm_map.c for ( ; size != 0; size -= PAGE_SIZE, offset += PAGE_SIZE) {
offset 2924 uvm/uvm_map.c anon = amap_lookup(¤t->aref, offset);
offset 3002 uvm/uvm_map.c amap_unadd(¤t->aref, offset);
offset 3023 uvm/uvm_map.c offset = current->offset + (start - current->start);
offset 3030 uvm/uvm_map.c rv = uobj->pgops->pgo_flush(uobj, offset,
offset 3031 uvm/uvm_map.c offset + size, flags);
offset 3637 uvm/uvm_map.c (long long)entry->offset, entry->aref.ar_amap,
offset 3677 uvm/uvm_map.c (*pr)("<%p,0x%llx> ", pg, (long long)pg->offset);
offset 3716 uvm/uvm_map.c pg->uobject, pg->uanon, (long long)pg->offset, pg->loan_count);
offset 144 uvm/uvm_map.h voff_t offset; /* offset into object */
offset 346 uvm/uvm_mmap.c entry->offset + (start - entry->start));
offset 161 uvm/uvm_page.c buck = &uvm.page_hash[uvm_pagehash(pg->uobject,pg->offset)];
offset 188 uvm/uvm_page.c buck = &uvm.page_hash[uvm_pagehash(pg->uobject,pg->offset)];
offset 832 uvm/uvm_page.c &uvm.page_hash[uvm_pagehash(pg->uobject, pg->offset)],
offset 1037 uvm/uvm_page.c pg->offset = off;
offset 1106 uvm/uvm_page.c pg->offset = newoff;
offset 1232 uvm/uvm_page.c pg->offset = 0xdeadbeef;
offset 117 uvm/uvm_page.h voff_t offset; /* offset into object (O,P) */
offset 135 uvm/uvm_page_i.h if (pg->uobject == obj && pg->offset == off) {
offset 280 uvm/uvm_pager.c uobj->pgops->pgo_cluster(uobj, center->offset, &lo, &hi);
offset 298 uvm/uvm_pager.c center_idx = (center->offset - lo) >> PAGE_SHIFT;
offset 315 uvm/uvm_pager.c curoff = center->offset + incr;
offset 548 uvm/uvm_pager.c pg->offset >> PAGE_SHIFT,
offset 657 uvm/uvm_pager.c ppsp[lcv]->offset >> PAGE_SHIFT, 0);
offset 609 uvm/uvm_pdaemon.c p->offset >> PAGE_SHIFT);
offset 647 uvm/uvm_pdaemon.c p->offset >> PAGE_SHIFT);
offset 684 uvm/uvm_pdaemon.c p->offset >> PAGE_SHIFT,
offset 1091 uvm/uvm_pdaemon.c p->offset >> PAGE_SHIFT, 0);
offset 370 uvm/uvm_pglist.c m->offset = 0xdeadbeef;
offset 191 uvm/uvm_unix.c off_t offset;
offset 194 uvm/uvm_unix.c offset = chdr->c_hdrsize + chdr->c_seghdrsize + chdr->c_cpusize;
offset 249 uvm/uvm_unix.c offset, UIO_SYSSPACE,
offset 258 uvm/uvm_unix.c offset += chdr->c_seghdrsize;
offset 261 uvm/uvm_unix.c offset, UIO_USERSPACE,
offset 266 uvm/uvm_unix.c offset += cseg.c_size;
offset 862 uvm/uvm_vnode.c (pp->offset < start || pp->offset >= stop))
offset 907 uvm/uvm_vnode.c (pp->offset < start || pp->offset >= stop)) {
offset 1186 uvm/uvm_vnode.c (long long)pp->offset);
offset 1239 uvm/uvm_vnode.c uvn_cluster(uobj, offset, loffset, hoffset)
offset 1241 uvm/uvm_vnode.c voff_t offset;
offset 1245 uvm/uvm_vnode.c *loffset = offset;
offset 1299 uvm/uvm_vnode.c uvn_get(uobj, offset, pps, npagesp, centeridx, access_type, advice, flags)
offset 1301 uvm/uvm_vnode.c voff_t offset;
offset 1335 uvm/uvm_vnode.c for (lcv = 0, current_offset = offset ; lcv < *npagesp ;
offset 1399 uvm/uvm_vnode.c for (lcv = 0, current_offset = offset;
offset 1572 uvm/uvm_vnode.c file_offset = pps[0]->offset;
offset 239 xfs/xfs_message.c t->offset = message->offset;
offset 299 xfs/xfs_message.h uint32_t offset;
offset 311 xfs/xfs_message.h uint32_t offset;
offset 74 xfs/xfs_node-bsd.c result->offset = 0;
offset 62 xfs/xfs_node.h uint32_t offset;
offset 143 xfs/xfs_vnodeops-common.c uint32_t offset;
offset 147 xfs/xfs_vnodeops-common.c offset = want_offset;
offset 148 xfs/xfs_vnodeops-common.c if (NNPFS_TOKEN_GOT(xn, tok|NNPFS_ATTR_R) && offset > xn->attr.va_size) {
offset 149 xfs/xfs_vnodeops-common.c offset = xn->attr.va_size;
offset 154 xfs/xfs_vnodeops-common.c (long) offset, (long) xn->offset,
offset 159 xfs/xfs_vnodeops-common.c if (offset <= xn->offset || xn->attr.va_type == VDIR) {
offset 169 xfs/xfs_vnodeops-common.c msg.offset = offset;
offset 402 xfs/xfs_vnodeops-common.c xn->offset = sub_attr.va_size;
offset 1146 xfs/xfs_vnodeops-common.c printf ("\toffset: %d\n", xn->offset);
offset 98 xfs/xfs_vnodeops.h u_int tok, uint32_t offset);