1 /* $OpenBSD: siopvar_common.h,v 1.25 2007/08/05 19:05:09 kettenis Exp $ */
2 /* $NetBSD: siopvar_common.h,v 1.33 2005/11/18 23:10:32 bouyer Exp $ */
3
4 /*
5 * Copyright (c) 2000 Manuel Bouyer.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Manuel Bouyer.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 */
33
34 /* common struct and routines used by siop and esiop */
35
36 #ifndef SIOP_DEFAULT_TARGET
37 #define SIOP_DEFAULT_TARGET 7
38 #endif
39
40 /* tables used by SCRIPT */
41 typedef struct scr_table {
42 u_int32_t count;
43 u_int32_t addr;
44 } scr_table_t __packed;
45
46 /* Number of scatter/gather entries */
47 /* XXX Ensure alignment of siop_xfer's. */
48 #define SIOP_NSG 17 /* XXX (MAXPHYS/PAGE_SIZE + 1) */
49 #define SIOP_MAXFER ((SIOP_NSG - 1) * PAGE_SIZE)
50
51 /*
52 * This structure interfaces the SCRIPT with the driver; it describes a full
53 * transfer. If you change something here, don't forget to update offsets in
54 * {s,es}iop.ss
55 */
56 struct siop_common_xfer {
57 u_int8_t msg_out[16]; /* 0 */
58 u_int8_t msg_in[16]; /* 16 */
59 u_int32_t status; /* 32 */
60 u_int32_t pad1; /* 36 */
61 u_int32_t id; /* 40 */
62 struct scsi_generic xscmd; /* 44 */
63 scr_table_t t_msgin; /* 60 */
64 scr_table_t t_extmsgin; /* 68 */
65 scr_table_t t_extmsgdata; /* 76 */
66 scr_table_t t_msgout; /* 84 */
67 scr_table_t cmd; /* 92 */
68 scr_table_t t_status; /* 100 */
69 scr_table_t data[SIOP_NSG]; /* 108 */
70 } __packed;
71
72 /* status can hold the SCSI_* status values, and 2 additional values: */
73 #define SCSI_SIOP_NOCHECK 0xfe /* don't check the scsi status */
74 #define SCSI_SIOP_NOSTATUS 0xff /* device didn't report status */
75
76 /* offset is initialised to SIOP_NOOFFSET, used to check if it was updated */
77 #define SIOP_NOOFFSET 0xffffffff
78
79 /*
80 * This describes a command handled by the SCSI controller
81 */
82 struct siop_common_cmd {
83 struct siop_common_softc *siop_sc; /* points back to our adapter */
84 struct siop_common_target *siop_target; /* pointer to our target def */
85 struct scsi_xfer *xs; /* xfer from the upper level */
86 struct siop_common_xfer *siop_tables; /* tables for this cmd */
87 bus_addr_t dsa; /* DSA value to load */
88 bus_dmamap_t dmamap_data;
89 int status;
90 int flags;
91 int tag; /* tag used for tagged command queuing */
92 int resid; /* valid when CMDFL_RESID is set */
93 };
94
95 /* status defs */
96 #define CMDST_FREE 0 /* cmd slot is free */
97 #define CMDST_READY 1 /* cmd slot is waiting for processing */
98 #define CMDST_ACTIVE 2 /* cmd slot is being processed */
99 #define CMDST_SENSE 3 /* cmd slot is requesting sense */
100 #define CMDST_SENSE_ACTIVE 4 /* request sense active */
101 #define CMDST_SENSE_DONE 5 /* request sense done */
102 #define CMDST_DONE 6 /* cmd slot has been processed */
103 /* flags defs */
104 #define CMDFL_TIMEOUT 0x0001 /* cmd timed out */
105 #define CMDFL_TAG 0x0002 /* tagged cmd */
106 #define CMDFL_RESID 0x0004 /* current offset in table is partial */
107
108 /* per-target struct */
109 struct siop_common_target {
110 int status; /* target status, see below */
111 int flags; /* target flags, see below */
112 u_int32_t id; /* for SELECT FROM */
113 int period;
114 int offset;
115 };
116
117 /* target status */
118 #define TARST_PROBING 0 /* target is being probed */
119 #define TARST_ASYNC 1 /* target needs sync/wide negotiation */
120 #define TARST_WIDE_NEG 2 /* target is doing wide negotiation */
121 #define TARST_SYNC_NEG 3 /* target is doing sync negotiation */
122 #define TARST_PPR_NEG 4 /* target is doing sync negotiation */
123 #define TARST_OK 5 /* sync/wide agreement is valid */
124
125 /* target flags */
126 #define TARF_SYNC 0x01 /* target can do sync */
127 #define TARF_WIDE 0x02 /* target can do wide */
128 #define TARF_TAG 0x04 /* target can do tags */
129 #define TARF_DT 0x08 /* target can do DT clocking */
130 #define TARF_ISWIDE 0x10 /* target is wide */
131 #define TARF_ISDT 0x20 /* target is doing DT clocking */
132
133 /* Driver internal state */
134 struct siop_common_softc {
135 struct device sc_dev;
136 struct scsi_link sc_link; /* link to upper level */
137 int features; /* chip's features */
138 int ram_size;
139 int maxburst;
140 int maxoff;
141 int clock_div; /* async. clock divider (scntl3) */
142 int clock_period; /* clock period (ns * 10) */
143 int st_minsync; /* min and max sync period, */
144 int dt_minsync;
145 int st_maxsync; /* as sent in or PPR messages */
146 int dt_maxsync;
147 int mode; /* current SE/LVD/HVD mode */
148 bus_space_tag_t sc_rt; /* bus_space registers tag */
149 bus_space_handle_t sc_rh; /* bus_space registers handle */
150 bus_addr_t sc_raddr; /* register addresses */
151 bus_space_tag_t sc_ramt; /* bus_space ram tag */
152 bus_space_handle_t sc_ramh; /* bus_space ram handle */
153 bus_dma_tag_t sc_dmat; /* bus DMA tag */
154 void (*sc_reset)(struct siop_common_softc*); /* reset callback */
155 bus_dmamap_t sc_scriptdma; /* DMA map for script */
156 bus_addr_t sc_scriptaddr; /* on-board ram or physical address */
157 u_int32_t *sc_script; /* script location in memory */
158 struct siop_common_target *targets[16]; /* per-target states */
159 };
160
161 /* features */
162 #define SF_BUS_WIDE 0x00000001 /* wide bus */
163 #define SF_BUS_ULTRA 0x00000002 /* Ultra (20MHz) bus */
164 #define SF_BUS_ULTRA2 0x00000004 /* Ultra2 (40MHz) bus */
165 #define SF_BUS_ULTRA3 0x00000008 /* Ultra3 (80MHz) bus */
166 #define SF_BUS_DIFF 0x00000010 /* differential bus */
167
168 #define SF_CHIP_LED0 0x00000100 /* led on GPIO0 */
169 #define SF_CHIP_LEDC 0x00000200 /* led on GPIO0 with hardware control */
170 #define SF_CHIP_DBLR 0x00000400 /* clock doubler or quadrupler */
171 #define SF_CHIP_QUAD 0x00000800 /* clock quadrupler, with PPL */
172 #define SF_CHIP_FIFO 0x00001000 /* large fifo */
173 #define SF_CHIP_PF 0x00002000 /* Instructions prefetch */
174 #define SF_CHIP_RAM 0x00004000 /* on-board RAM */
175 #define SF_CHIP_LS 0x00008000 /* load/store instruction */
176 #define SF_CHIP_10REGS 0x00010000 /* 10 scratch registers */
177 #define SF_CHIP_DFBC 0x00020000 /* Use DFBC register */
178 #define SF_CHIP_DT 0x00040000 /* DT clocking */
179 #define SF_CHIP_GEBUG 0x00080000 /* SCSI gross error bug */
180 #define SF_CHIP_AAIP 0x00100000 /* Always generate AIP regardless of SNCTL4*/
181 #define SF_CHIP_BE 0x00200000 /* big-endian */
182
183 #define SF_PCI_RL 0x01000000 /* PCI read line */
184 #define SF_PCI_RM 0x02000000 /* PCI read multiple */
185 #define SF_PCI_BOF 0x04000000 /* PCI burst opcode fetch */
186 #define SF_PCI_CLS 0x08000000 /* PCI cache line size */
187 #define SF_PCI_WRI 0x10000000 /* PCI write and invalidate */
188
189 int siop_common_attach(struct siop_common_softc *);
190 void siop_common_reset(struct siop_common_softc *);
191 void siop_setuptables(struct siop_common_cmd *);
192 int siop_modechange(struct siop_common_softc *);
193
194 int siop_wdtr_neg(struct siop_common_cmd *);
195 int siop_sdtr_neg(struct siop_common_cmd *);
196 int siop_ppr_neg(struct siop_common_cmd *);
197 void siop_sdtr_msg(struct siop_common_cmd *, int, int, int);
198 void siop_wdtr_msg(struct siop_common_cmd *, int, int);
199 void siop_ppr_msg(struct siop_common_cmd *, int, int, int);
200 void siop_update_xfer_mode(struct siop_common_softc *, int);
201 int siop_iwr(struct siop_common_cmd *);
202 /* actions to take at return of siop_wdtr_neg() and siop_sdtr_neg() */
203 #define SIOP_NEG_NOP 0x0
204 #define SIOP_NEG_MSGOUT 0x1
205 #define SIOP_NEG_ACK 0x2
206
207 void siop_minphys(struct buf *);
208 void siop_ma(struct siop_common_cmd *);
209 void siop_sdp(struct siop_common_cmd *, int);
210 void siop_update_resid(struct siop_common_cmd *, int);
211 void siop_clearfifo(struct siop_common_softc *);
212 void siop_resetbus(struct siop_common_softc *);
213
214 #define siop_htoc32(sc, x) \
215 (((sc)->features & SF_CHIP_BE) ? htobe32((x)) : htole32((x)))
216
217 #define siop_ctoh32(sc, x) \
218 (((sc)->features & SF_CHIP_BE) ? betoh32((x)) : letoh32((x)))