siop_sc 139 dev/ic/siop.c struct siop_common_softc *sc = siop_cmd->cmd_c.siop_sc; siop_sc 1093 dev/ic/siop.c struct siop_softc *sc = (struct siop_softc *)siop_cmd->cmd_c.siop_sc; siop_sc 1223 dev/ic/siop.c struct siop_softc *sc = (struct siop_softc *)siop_cmd->cmd_c.siop_sc; siop_sc 1743 dev/ic/siop.c struct siop_softc *sc = (struct siop_softc *)siop_cmd->cmd_c.siop_sc; siop_sc 1861 dev/ic/siop.c newcbd->cmds[i].cmd_c.siop_sc = &sc->sc_c; siop_sc 243 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc; siop_sc 338 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc; siop_sc 418 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc; siop_sc 532 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc; siop_sc 674 dev/ic/siop_common.c siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_SDTR_LEN + 2); siop_sc 688 dev/ic/siop_common.c siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_WDTR_LEN + 2); siop_sc 706 dev/ic/siop_common.c siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_PPR_LEN + 2); siop_sc 724 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc; siop_sc 791 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc; siop_sc 853 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc; siop_sc 886 dev/ic/siop_common.c struct siop_common_softc *sc = siop_cmd->siop_sc; siop_sc 83 dev/ic/siopvar_common.h struct siop_common_softc *siop_sc; /* points back to our adapter */ siop_sc 212 dev/pci/siop_pci_common.c struct siop_common_softc *siop_sc, struct pci_attach_args *pa, siop_sc 233 dev/pci/siop_pci_common.c siop_sc->features = pci_sc->sc_pp->features; siop_sc 235 dev/pci/siop_pci_common.c siop_sc->features |= SF_CHIP_LED0; siop_sc 237 dev/pci/siop_pci_common.c siop_sc->maxburst = pci_sc->sc_pp->maxburst; siop_sc 238 dev/pci/siop_pci_common.c siop_sc->maxoff = pci_sc->sc_pp->maxoff; siop_sc 239 dev/pci/siop_pci_common.c siop_sc->clock_div = pci_sc->sc_pp->clock_div; siop_sc 240 dev/pci/siop_pci_common.c siop_sc->clock_period = pci_sc->sc_pp->clock_period; siop_sc 241 dev/pci/siop_pci_common.c siop_sc->ram_size = pci_sc->sc_pp->ram_size; siop_sc 243 dev/pci/siop_pci_common.c siop_sc->sc_reset = siop_pci_reset; siop_sc 246 dev/pci/siop_pci_common.c siop_sc->sc_dmat = pa->pa_dmat; siop_sc 263 dev/pci/siop_pci_common.c siop_sc->sc_rt = memt; siop_sc 264 dev/pci/siop_pci_common.c siop_sc->sc_rh = memh; siop_sc 265 dev/pci/siop_pci_common.c siop_sc->sc_raddr = memaddr; siop_sc 267 dev/pci/siop_pci_common.c siop_sc->sc_rt = iot; siop_sc 268 dev/pci/siop_pci_common.c siop_sc->sc_rh = ioh; siop_sc 269 dev/pci/siop_pci_common.c siop_sc->sc_raddr = ioaddr; siop_sc 277 dev/pci/siop_pci_common.c bus_space_unmap(siop_sc->sc_rt, siop_sc->sc_rh, iosize); siop_sc 282 dev/pci/siop_pci_common.c intr, siop_sc, siop_sc->sc_dev.dv_xname); siop_sc 291 dev/pci/siop_pci_common.c bus_space_unmap(siop_sc->sc_rt, siop_sc->sc_rh, iosize); siop_sc 295 dev/pci/siop_pci_common.c if (siop_sc->features & SF_CHIP_RAM) { siop_sc 309 dev/pci/siop_pci_common.c &siop_sc->sc_ramt, &siop_sc->sc_ramh, siop_sc 310 dev/pci/siop_pci_common.c &siop_sc->sc_scriptaddr, &memsize, 0) == 0) { siop_sc 315 dev/pci/siop_pci_common.c siop_sc->features &= ~SF_CHIP_RAM;