root/dev/sbus/stp4020.c

DEFINITIONS

1. stp4020_rd_sockctl
2. stp4020_wr_sockctl
3. stp4020_rd_winctl
4. stp4020_wr_winctl
5. stp4020print
6. stpattach_common
7. stp4020_attach_socket
8. stp4020_create_event_thread
9. stp4020_event_thread
10. stp4020_queue_event
11. stp4020_statintr
12. stp4020_iointr
13. stp4020_calc_speed
14. stp4020_map_window
15. stp4020_chip_mem_alloc
16. stp4020_chip_mem_free
17. stp4020_chip_mem_map
18. stp4020_chip_mem_unmap
19. stp4020_chip_io_alloc
20. stp4020_chip_io_free
21. stp4020_chip_io_map
22. stp4020_chip_io_unmap
23. stp4020_chip_socket_enable
24. stp4020_chip_socket_disable
25. stp4020_chip_intr_establish
26. stp4020_chip_intr_disestablish
27. stp4020_chip_intr_string
28. stp4020_delay
29. stp4020_dump_regs

    1 /*      $OpenBSD: stp4020.c,v 1.14 2005/11/23 11:39:37 mickey Exp $     */
    2 /*      $NetBSD: stp4020.c,v 1.23 2002/06/01 23:51:03 lukem Exp $       */
    4 /*-
    5  * Copyright (c) 1998 The NetBSD Foundation, Inc.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software contributed to The NetBSD Foundation
    9  * by Paul Kranenburg.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  * 3. All advertising materials mentioning features or use of this software
   20  *    must display the following acknowledgement:
   21  *        This product includes software developed by the NetBSD
   22  *        Foundation, Inc. and its contributors.
   23  * 4. Neither the name of The NetBSD Foundation nor the names of its
   24  *    contributors may be used to endorse or promote products derived
   25  *    from this software without specific prior written permission.
   26  *
   27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   37  * POSSIBILITY OF SUCH DAMAGE.
   38  */
   40 /*
   41  * STP4020: SBus/PCMCIA bridge supporting one Type-3 PCMCIA card, or up to
   42  * two Type-1 and Type-2 PCMCIA cards..
   43  */
   45 #include <sys/param.h>
   46 #include <sys/systm.h>
   47 #include <sys/errno.h>
   48 #include <sys/extent.h>
   49 #include <sys/proc.h>
   50 #include <sys/kernel.h>
   51 #include <sys/kthread.h>
   52 #include <sys/device.h>
   54 #include <dev/pcmcia/pcmciareg.h>
   55 #include <dev/pcmcia/pcmciavar.h>
   56 #include <dev/pcmcia/pcmciachip.h>
   58 #include <machine/bus.h>
   60 #include <dev/sbus/stp4020reg.h>
   61 #include <dev/sbus/stp4020var.h>
   63 /*
   64  * We use the three available windows per socket in a simple, fixed
   65  * arrangement. Each window maps (at full 1 MB size) one of the pcmcia
   66  * spaces into sbus space.
   67  */
   68 #define STP_WIN_ATTR    0       /* index of the attribute memory space window */
   69 #define STP_WIN_MEM     1       /* index of the common memory space window */
   70 #define STP_WIN_IO      2       /* index of the io space window */
   72 #ifdef STP4020_DEBUG
   73 int stp4020_debug = 0;
   74 #define DPRINTF(x)      do { if (stp4020_debug) printf x; } while(0)
   75 #else
   76 #define DPRINTF(x)
   77 #endif
   79 int     stp4020print(void *, const char *);
   80 void    stp4020_map_window(struct stp4020_socket *, int, int);
   81 void    stp4020_calc_speed(int, int, int *, int *);
   83 struct  cfdriver stp_cd = {
NULL, "stp", DV_DULL
   85 };
   87 #ifdef STP4020_DEBUG
   88 static void     stp4020_dump_regs(struct stp4020_socket *);
   89 #endif
   91 static u_int16_t stp4020_rd_sockctl(struct stp4020_socket *, int);
   92 static void     stp4020_wr_sockctl(struct stp4020_socket *, int, u_int16_t);
   93 static u_int16_t stp4020_rd_winctl(struct stp4020_socket *, int, int);
   94 static void     stp4020_wr_winctl(struct stp4020_socket *, int, int, u_int16_t);
   96 void    stp4020_delay(unsigned int);
   97 void    stp4020_attach_socket(struct stp4020_socket *, int);
   98 void    stp4020_create_event_thread(void *);
   99 void    stp4020_event_thread(void *);
  100 void    stp4020_queue_event(struct stp4020_softc *, int);
  102 int     stp4020_chip_mem_alloc(pcmcia_chipset_handle_t, bus_size_t,
  103             struct pcmcia_mem_handle *);
  104 void    stp4020_chip_mem_free(pcmcia_chipset_handle_t,
  105             struct pcmcia_mem_handle *);
  106 int     stp4020_chip_mem_map(pcmcia_chipset_handle_t, int, bus_addr_t,
bus_size_t, struct pcmcia_mem_handle *, bus_size_t *, int *);
  108 void    stp4020_chip_mem_unmap(pcmcia_chipset_handle_t, int);
  110 int     stp4020_chip_io_alloc(pcmcia_chipset_handle_t,
bus_addr_t, bus_size_t, bus_size_t, struct pcmcia_io_handle *);
  112 void    stp4020_chip_io_free(pcmcia_chipset_handle_t,
  113             struct pcmcia_io_handle *);
  114 int     stp4020_chip_io_map(pcmcia_chipset_handle_t, int, bus_addr_t,
bus_size_t, struct pcmcia_io_handle *, int *);
  116 void    stp4020_chip_io_unmap(pcmcia_chipset_handle_t, int);
  118 void    stp4020_chip_socket_enable(pcmcia_chipset_handle_t);
  119 void    stp4020_chip_socket_disable(pcmcia_chipset_handle_t);
  120 void    *stp4020_chip_intr_establish(pcmcia_chipset_handle_t,
  121             struct pcmcia_function *, int, int (*) (void *), void *, char *);
  122 void    stp4020_chip_intr_disestablish(pcmcia_chipset_handle_t, void *);
  123 const char *stp4020_chip_intr_string(pcmcia_chipset_handle_t, void *);
  125 /* Our PCMCIA chipset methods */
  126 static struct pcmcia_chip_functions stp4020_functions = {
stp4020_chip_mem_alloc,
stp4020_chip_mem_free,
stp4020_chip_mem_map,
stp4020_chip_mem_unmap,
stp4020_chip_io_alloc,
stp4020_chip_io_free,
stp4020_chip_io_map,
stp4020_chip_io_unmap,
stp4020_chip_intr_establish,
stp4020_chip_intr_disestablish,
stp4020_chip_intr_string,
stp4020_chip_socket_enable,
stp4020_chip_socket_disable
  143 };
  146 static __inline__ u_int16_t
stp4020_rd_sockctl(h, idx)
  148         struct stp4020_socket *h;
  149         int idx;
  150 {
  151         int o = ((STP4020_SOCKREGS_SIZE * (h->sock)) + idx);
  152         return (bus_space_read_2(h->tag, h->regs, o));
  153 }
  155 static __inline__ void
stp4020_wr_sockctl(h, idx, v)
  157         struct stp4020_socket *h;
  158         int idx;
u_int16_t v;
  160 {
  161         int o = (STP4020_SOCKREGS_SIZE * (h->sock)) + idx;
bus_space_write_2(h->tag, h->regs, o, v);
  163 }
  165 static __inline__ u_int16_t
stp4020_rd_winctl(h, win, idx)
  167         struct stp4020_socket *h;
  168         int win;
  169         int idx;
  170 {
  171         int o = (STP4020_SOCKREGS_SIZE * (h->sock)) +
  172             (STP4020_WINREGS_SIZE * win) + idx;
  173         return (bus_space_read_2(h->tag, h->regs, o));
  174 }
  176 static __inline__ void
stp4020_wr_winctl(h, win, idx, v)
  178         struct stp4020_socket *h;
  179         int win;
  180         int idx;
u_int16_t v;
  182 {
  183         int o = (STP4020_SOCKREGS_SIZE * (h->sock)) +
  184             (STP4020_WINREGS_SIZE * win) + idx;
bus_space_write_2(h->tag, h->regs, o, v);
  186 }
  189 int
stp4020print(aux, busname)
  191         void *aux;
  192         const char *busname;
  193 {
  194         struct pcmciabus_attach_args *paa = aux;
  195         struct stp4020_socket *h = paa->pch;
printf(" socket %d", h->sock);
  198         return (UNCONF);
  199 }
  201 /*
  202  * Attach all the sub-devices we can find
  203  */
  204 void
stpattach_common(struct stp4020_softc *sc, int clockfreq)
  206 {
  207         int i, rev;
rev = stp4020_rd_sockctl(&sc->sc_socks[0], STP4020_ISR1_IDX) &
STP4020_ISR1_REV_M;
printf(": rev %x\n", rev);
sc->sc_pct = (pcmcia_chipset_tag_t)&stp4020_functions;
  215         /*
  216          * Arrange that a kernel thread be created to handle
  217          * insert/removal events.
  218          */
sc->events = 0;
kthread_create_deferred(stp4020_create_event_thread, sc);
  222         for (i = 0; i < STP4020_NSOCK; i++) {
  223                 struct stp4020_socket *h = &sc->sc_socks[i];
h->sock = i;
h->sc = sc;
  226 #ifdef STP4020_DEBUG
  227                 if (stp4020_debug)
stp4020_dump_regs(h);
  229 #endif
stp4020_attach_socket(h, clockfreq);
  231         }
  232 }
  234 void
stp4020_attach_socket(h, speed)
  236         struct stp4020_socket *h;
  237         int speed;
  238 {
  239         struct pcmciabus_attach_args paa;
  240         int v;
  242         /* Map all three windows */
stp4020_map_window(h, STP_WIN_ATTR, speed);
stp4020_map_window(h, STP_WIN_MEM, speed);
stp4020_map_window(h, STP_WIN_IO, speed);
  247         /* Configure one pcmcia device per socket */
paa.paa_busname = "pcmcia";
paa.pct = (pcmcia_chipset_tag_t)h->sc->sc_pct;
paa.pch = (pcmcia_chipset_handle_t)h;
paa.iobase = 0;
paa.iosize = STP4020_WINDOW_SIZE;
h->pcmcia = config_found(&h->sc->sc_dev, &paa, stp4020print);
  256         if (h->pcmcia == NULL)
  257                 return;
  259         /*
  260          * There's actually a pcmcia bus attached; initialize the slot.
  261          */
  263         /*
  264          * Clear things up before we enable status change interrupts.
  265          * This seems to not be fully initialized by the PROM.
  266          */
stp4020_wr_sockctl(h, STP4020_ICR1_IDX, 0);
stp4020_wr_sockctl(h, STP4020_ICR0_IDX, 0);
stp4020_wr_sockctl(h, STP4020_ISR1_IDX, 0x3fff);
stp4020_wr_sockctl(h, STP4020_ISR0_IDX, 0x3fff);
  272         /*
  273          * Enable socket status change interrupts.
  274          * We use SB_INT[1] for status change interrupts.
  275          */
v = STP4020_ICR0_ALL_STATUS_IE | STP4020_ICR0_SCILVL_SB1;
stp4020_wr_sockctl(h, STP4020_ICR0_IDX, v);
  279         /* Get live status bits from ISR0 */
v = stp4020_rd_sockctl(h, STP4020_ISR0_IDX);
h->sense = v & (STP4020_ISR0_CD1ST | STP4020_ISR0_CD2ST);
  282         if (h->sense != 0) {
h->flags |= STP4020_SOCKET_BUSY;
pcmcia_card_attach(h->pcmcia);
  285         }
  286 }
  289 /*
  290  * Deferred thread creation callback.
  291  */
  292 void
stp4020_create_event_thread(arg)
  294         void *arg;
  295 {
  296         struct stp4020_softc *sc = arg;
  297         const char *name = sc->sc_dev.dv_xname;
  299         if (kthread_create(stp4020_event_thread, sc, &sc->event_thread,
  300             "%s", name)) {
panic("%s: unable to create event thread", name);
  302         }
  303 }
  305 /*
  306  * The actual event handling thread.
  307  */
  308 void
stp4020_event_thread(arg)
  310         void *arg;
  311 {
  312         struct stp4020_softc *sc = arg;
  313         int s, sense;
  314         unsigned int socket;
  316         for (;;) {
  317                 struct stp4020_socket *h;
s = splhigh();
  320                 if ((socket = ffs(sc->events)) == 0) {
splx(s);
  322                         (void)tsleep(&sc->events, PWAIT, "stp4020_ev", 0);
  323                         continue;
  324                 }
socket--;
sc->events &= ~(1 << socket);
splx(s);
  329                 if (socket >= STP4020_NSOCK) {
  330 #ifdef DEBUG
printf("stp4020_event_thread: wayward socket number %d\n",
socket);
  333 #endif
  334                         continue;
  335                 }
h = &sc->sc_socks[socket];
  339                 /* Read socket's ISR0 for the interrupt status bits */
sense = stp4020_rd_sockctl(h, STP4020_ISR0_IDX) &
  341                     (STP4020_ISR0_CD1ST | STP4020_ISR0_CD2ST);
  343                 if (sense > h->sense) {
  344                         /*
  345                          * If at least one more sensor is asserted, this is
  346                          * a card insertion.
  347                          */
h->sense = sense;
  349                         if ((h->flags & STP4020_SOCKET_BUSY) == 0) {
h->flags |= STP4020_SOCKET_BUSY;
pcmcia_card_attach(h->pcmcia);
  352                         }
  353                 } else if (sense < h->sense) {
  354                         /*
  355                          * If at least one less sensor is asserted, this is
  356                          * a card removal.
  357                          */
h->sense = sense;
  359                         if (h->flags & STP4020_SOCKET_BUSY) {
h->flags &= ~STP4020_SOCKET_BUSY;
pcmcia_card_detach(h->pcmcia, DETACH_FORCE);
  362                         }
  363                 }
  364         }
  365 }
  367 void
stp4020_queue_event(sc, sock)
  369         struct stp4020_softc *sc;
  370         int sock;
  371 {
  372         int s;
s = splhigh();
sc->events |= (1 << sock);
splx(s);
wakeup(&sc->events);
  378 }
  380 int
stp4020_statintr(arg)
  382         void *arg;
  383 {
  384         struct stp4020_softc *sc = arg;
  385         int i, sense, r = 0;
  387         /*
  388          * Check each socket for pending requests.
  389          */
  390         for (i = 0 ; i < STP4020_NSOCK; i++) {
  391                 struct stp4020_socket *h;
  392                 int v;
h = &sc->sc_socks[i];
  396                 /* Read socket's ISR0 for the interrupt status bits */
v = stp4020_rd_sockctl(h, STP4020_ISR0_IDX);
sense = v & (STP4020_ISR0_CD1ST | STP4020_ISR0_CD2ST);
  400 #ifdef STP4020_DEBUG
  401                 if (stp4020_debug != 0)
printf("stp4020_statintr: ISR0=%b\n",
v, STP4020_ISR0_IOBITS);
  404 #endif
  406                 /* Ack all interrupts at once */
stp4020_wr_sockctl(h, STP4020_ISR0_IDX,
STP4020_ISR0_ALL_STATUS_IRQ);
  410                 if ((v & STP4020_ISR0_CDCHG) != 0) {
r = 1;
  413                         /*
  414                          * Card detect status changed. In an ideal world,
  415                          * both card detect sensors should be set if a card
  416                          * is in the slot, and clear if it is not.
  417                          *
  418                          * Unfortunately, it turns out that we can get the
  419                          * notification before both sensors are set (or
  420                          * clear).
  421                          *
  422                          * This can be very funny if only one sensor is set.
  423                          * Is this a removal or an insertion operation?
  424                          * Defer appropriate action to the worker thread.
  425                          */
  426                         if (sense != h->sense)
stp4020_queue_event(sc, i);
  429                 }
  431                 /* informational messages */
  432                 if ((v & STP4020_ISR0_BVD1CHG) != 0) {
DPRINTF(("stp4020[%d]: Battery change 1\n",
h->sock));
r = 1;
  436                 }
  438                 if ((v & STP4020_ISR0_BVD2CHG) != 0) {
DPRINTF(("stp4020[%d]: Battery change 2\n",
h->sock));
r = 1;
  442                 }
  444                 if ((v & STP4020_ISR0_RDYCHG) != 0) {
DPRINTF(("stp4020[%d]: Ready/Busy change\n",
h->sock));
r = 1;
  448                 }
  450                 if ((v & STP4020_ISR0_WPCHG) != 0) {
DPRINTF(("stp4020[%d]: Write protect change\n",
h->sock));
r = 1;
  454                 }
  456                 if ((v & STP4020_ISR0_PCTO) != 0) {
DPRINTF(("stp4020[%d]: Card access timeout\n",
h->sock));
r = 1;
  460                 }
  462                 if ((v & STP4020_ISR0_SCINT) != 0) {
DPRINTF(("stp4020[%d]: Status change\n",
h->sock));
r = 1;
  466                 }
  468                 /*
  469                  * Not interrupts flag per se, but interrupts can occur when
  470                  * they are asserted, at least during our slot enable routine.
  471                  */
  472                 if ((h->flags & STP4020_SOCKET_ENABLING) &&
  473                     (v & (STP4020_ISR0_WAITST | STP4020_ISR0_PWRON)))
r = 1;
  475         }
  477         return (r);
  478 }
  480 int
stp4020_iointr(arg)
  482         void *arg;
  483 {
  484         struct stp4020_softc *sc = arg;
  485         int i, r = 0;
  487         /*
  488          * Check each socket for pending requests.
  489          */
  490         for (i = 0 ; i < STP4020_NSOCK; i++) {
  491                 struct stp4020_socket *h;
  492                 int v;
h = &sc->sc_socks[i];
v = stp4020_rd_sockctl(h, STP4020_ISR0_IDX);
  497                 if ((v & STP4020_ISR0_IOINT) != 0) {
  498                         /* we can not deny this is ours, no matter what the
  499                            card driver says. */
r = 1;
  502                         /* ack interrupt */
stp4020_wr_sockctl(h, STP4020_ISR0_IDX, v);
  505                         /* It's a card interrupt */
  506                         if ((h->flags & STP4020_SOCKET_BUSY) == 0) {
printf("stp4020[%d]: spurious interrupt?\n",
h->sock);
  509                                 continue;
  510                         }
  511                         /* Call card handler, if any */
  512                         if (h->intrhandler != NULL) {
  513                                 /*
  514                                  * We ought to be at an higher ipl level
  515                                  * than the callback, since the first
  516                                  * interrupt of this device is usually
  517                                  * higher than IPL_CLOCK.
  518                                  */
splassert(h->ipl);
  520                                 (*h->intrhandler)(h->intrarg);
  521                         }
  522                 }
  524         }
  526         return (r);
  527 }
  529 /*
  530  * The function gets the sbus speed and a access time and calculates
  531  * values for the CMDLNG and CMDDLAY registers.
  532  */
  533 void
stp4020_calc_speed(int bus_speed, int ns, int *length, int *delay)
  535 {
  536         int result;
  538         if (ns < STP4020_MEM_SPEED_MIN)
ns = STP4020_MEM_SPEED_MIN;
  540         else if (ns > STP4020_MEM_SPEED_MAX)
ns = STP4020_MEM_SPEED_MAX;
result = ns * (bus_speed / 1000);
  543         if (result % 1000000)
result = result / 1000000 + 1;
  545         else
result /= 1000000;
  547         *length = result;
  549         /* the sbus frequency range is limited, so we can keep this simple */
  550         *delay = ns <= STP4020_MEM_SPEED_MIN ? 1 : 2;
  551 }
  553 void
stp4020_map_window(struct stp4020_socket *h, int win, int speed)
  555 {
  556         int v, length, delay;
  558         /*
  559          * According to the PC Card standard 300ns access timing should be
  560          * used for attribute memory access. Our pcmcia framework does not
  561          * seem to propagate timing information, so we use that
  562          * everywhere.
  563          */
stp4020_calc_speed(speed, 300, &length, &delay);
  566         /*
  567          * Fill in the Address Space Select and Base Address
  568          * fields of this windows control register 0.
  569          */
v = ((delay << STP4020_WCR0_CMDDLY_S) & STP4020_WCR0_CMDDLY_M) |
  571             ((length << STP4020_WCR0_CMDLNG_S) & STP4020_WCR0_CMDLNG_M);
  572         switch (win) {
  573         case STP_WIN_ATTR:
v |= STP4020_WCR0_ASPSEL_AM;
  575                 break;
  576         case STP_WIN_MEM:
v |= STP4020_WCR0_ASPSEL_CM;
  578                 break;
  579         case STP_WIN_IO:
v |= STP4020_WCR0_ASPSEL_IO;
  581                 break;
  582         }
v |= (STP4020_ADDR2PAGE(0) & STP4020_WCR0_BASE_M);
stp4020_wr_winctl(h, win, STP4020_WCR0_IDX, v);
stp4020_wr_winctl(h, win, STP4020_WCR1_IDX,
  586             1 << STP4020_WCR1_WAITREQ_S);
  587 }
  589 int
stp4020_chip_mem_alloc(pch, size, pcmhp)
pcmcia_chipset_handle_t pch;
bus_size_t size;
  593         struct pcmcia_mem_handle *pcmhp;
  594 {
  595         struct stp4020_socket *h = (struct stp4020_socket *)pch;
  597         /* we can not do much here, defere work to _mem_map */
pcmhp->memt = h->wintag;
pcmhp->size = size;
pcmhp->addr = 0;
pcmhp->mhandle = 0;
pcmhp->realsize = size;
  604         return (0);
  605 }
  607 void
stp4020_chip_mem_free(pch, pcmhp)
pcmcia_chipset_handle_t pch;
  610         struct pcmcia_mem_handle *pcmhp;
  611 {
  612 }
  614 int
stp4020_chip_mem_map(pch, kind, card_addr, size, pcmhp, offsetp, windowp)
pcmcia_chipset_handle_t pch;
  617         int kind;
bus_addr_t card_addr;
bus_size_t size;
  620         struct pcmcia_mem_handle *pcmhp;
bus_size_t *offsetp;
  622         int *windowp;
  623 {
  624         struct stp4020_socket *h = (struct stp4020_socket *)pch;
  625         int win = (kind & PCMCIA_MEM_ATTR) ? STP_WIN_ATTR : STP_WIN_MEM;
pcmhp->memt = h->wintag;
bus_space_subregion(h->wintag, h->windows[win].winaddr,
card_addr, size, &pcmhp->memh);
pcmhp->size = size;
pcmhp->realsize = STP4020_WINDOW_SIZE - card_addr;
  632         *offsetp = 0;
  633         *windowp = win;
  635         return (0);
  636 }
  638 void
stp4020_chip_mem_unmap(pch, win)
pcmcia_chipset_handle_t pch;
  641         int win;
  642 {
  643 }
  645 int
stp4020_chip_io_alloc(pch, start, size, align, pcihp)
pcmcia_chipset_handle_t pch;
bus_addr_t start;
bus_size_t size;
bus_size_t align;
  651         struct pcmcia_io_handle *pcihp;
  652 {
  653         struct stp4020_socket *h = (struct stp4020_socket *)pch;
pcihp->iot = h->wintag;
pcihp->ioh = h->windows[STP_WIN_IO].winaddr;
pcihp->size = size;
  658         return (0);
  659 }
  661 void
stp4020_chip_io_free(pch, pcihp)
pcmcia_chipset_handle_t pch;
  664         struct pcmcia_io_handle *pcihp;
  665 {
  666 }
  668 int
stp4020_chip_io_map(pch, width, offset, size, pcihp, windowp)
pcmcia_chipset_handle_t pch;
  671         int width;
bus_addr_t offset;
bus_size_t size;
  674         struct pcmcia_io_handle *pcihp;
  675         int *windowp;
  676 {
  677         struct stp4020_socket *h = (struct stp4020_socket *)pch;
pcihp->iot = h->wintag;
bus_space_subregion(h->wintag, h->windows[STP_WIN_IO].winaddr,
offset, size, &pcihp->ioh);
  682         *windowp = 0;
  683         return (0);
  684 }
  686 void
stp4020_chip_io_unmap(pch, win)
pcmcia_chipset_handle_t pch;
  689         int win;
  690 {
  691 }
  693 void
stp4020_chip_socket_enable(pch)
pcmcia_chipset_handle_t pch;
  696 {
  697         struct stp4020_socket *h = (struct stp4020_socket *)pch;
  698         int i, v;
h->flags |= STP4020_SOCKET_ENABLING;
  702         /* this bit is mostly stolen from pcic_attach_card */
  704         /* Power down the socket to reset it, clear the card reset pin */
stp4020_wr_sockctl(h, STP4020_ICR1_IDX, 0);
  707         /*
  708          * wait 300ms until power fails (Tpf).  Then, wait 100ms since
  709          * we are changing Vcc (Toff).
  710          */
stp4020_delay((300 + 100) * 1000);
  713         /* Power up the socket */
v = STP4020_ICR1_MSTPWR;
stp4020_wr_sockctl(h, STP4020_ICR1_IDX, v);
  717         /*
  718          * wait 100ms until power raise (Tpr) and 20ms to become
  719          * stable (Tsu(Vcc)).
  720          *
  721          * some machines require some more time to be settled
  722          * (another 200ms is added here).
  723          */
stp4020_delay((100 + 20 + 200) * 1000);
v |= STP4020_ICR1_PCIFOE | STP4020_ICR1_VPP1_VCC;
stp4020_wr_sockctl(h, STP4020_ICR1_IDX, v);
  729         /*
  730          * hold RESET at least 20us.
  731          */
stp4020_wr_sockctl(h, STP4020_ICR0_IDX, 
stp4020_rd_sockctl(h, STP4020_ICR0_IDX) | STP4020_ICR0_RESET);
delay(20);
stp4020_wr_sockctl(h, STP4020_ICR0_IDX,
stp4020_rd_sockctl(h, STP4020_ICR0_IDX) & ~STP4020_ICR0_RESET);
  738         /* wait 20ms as per pc card standard (r2.01) section 4.3.6 */
stp4020_delay(20000);
  741         /* Wait for the chip to finish initializing (5 seconds max) */
  742         for (i = 10000; i > 0; i--) {
v = stp4020_rd_sockctl(h, STP4020_ISR0_IDX);
  744                 /* If the card has been removed, abort */
  745                 if ((v & (STP4020_ISR0_CD1ST | STP4020_ISR0_CD2ST)) == 0) {
h->flags &= ~STP4020_SOCKET_ENABLING;
  747                         return;
  748                 }
  749                 if ((v & STP4020_ISR0_RDYST) != 0)
  750                         break;
delay(500);
  752         }
  753         if (i <= 0) {
  754 #ifdef STP4020_DEBUG
printf("stp4020_chip_socket_enable: not ready: status %b\n",
v, STP4020_ISR0_IOBITS);
  757 #endif
h->flags &= ~STP4020_SOCKET_ENABLING;
  759                 return;
  760         }
v = stp4020_rd_sockctl(h, STP4020_ICR0_IDX);
  764         /*
  765          * Check the card type.
  766          * Enable socket I/O interrupts for IO cards.
  767          * We use level SB_INT[0] for I/O interrupts.
  768          */
  769         if (pcmcia_card_gettype(h->pcmcia) == PCMCIA_IFTYPE_IO) {
v &= ~(STP4020_ICR0_IOILVL | STP4020_ICR0_IFTYPE);
v |= STP4020_ICR0_IFTYPE_IO | STP4020_ICR0_IOIE |
STP4020_ICR0_IOILVL_SB0 | STP4020_ICR0_SPKREN;
DPRINTF(("%s: configuring card for IO usage\n",
h->sc->sc_dev.dv_xname));
  775         } else {
v &= ~(STP4020_ICR0_IOILVL | STP4020_ICR0_IFTYPE |
STP4020_ICR0_SPKREN | STP4020_ICR0_IOIE);
v |= STP4020_ICR0_IFTYPE_MEM;
DPRINTF(("%s: configuring card for MEM ONLY usage\n",
h->sc->sc_dev.dv_xname));
  781         }
stp4020_wr_sockctl(h, STP4020_ICR0_IDX, v);
h->flags &= ~STP4020_SOCKET_ENABLING;
  785 }
  787 void
stp4020_chip_socket_disable(pch)
pcmcia_chipset_handle_t pch;
  790 {
  791         struct stp4020_socket *h = (struct stp4020_socket *)pch;
  792         int v;
  794         /*
  795          * Disable socket I/O interrupts.
  796          */
v = stp4020_rd_sockctl(h, STP4020_ICR0_IDX);
v &= ~(STP4020_ICR0_IOILVL | STP4020_ICR0_IFTYPE |
STP4020_ICR0_SPKREN | STP4020_ICR0_IOIE);
stp4020_wr_sockctl(h, STP4020_ICR0_IDX, v);
  802         /* Power down the socket */
stp4020_wr_sockctl(h, STP4020_ICR1_IDX, 0);
  805         /*
  806          * wait 300ms until power fails (Tpf).
  807          */
stp4020_delay(300 * 1000);
  809 }
  811 void *
stp4020_chip_intr_establish(pch, pf, ipl, handler, arg, xname)
pcmcia_chipset_handle_t pch;
  814         struct pcmcia_function *pf;
  815         int ipl;
  816         int (*handler) (void *);
  817         void *arg;
  818         char *xname;
  819 {
  820         struct stp4020_socket *h = (struct stp4020_socket *)pch;
h->intrhandler = handler;
h->intrarg = arg;
h->ipl = ipl;
  825         return (h);
  826 }
  828 void
stp4020_chip_intr_disestablish(pch, ih)
pcmcia_chipset_handle_t pch;
  831         void *ih;
  832 {
  833         struct stp4020_socket *h = (struct stp4020_socket *)pch;
h->intrhandler = NULL;
h->intrarg = NULL;
  837 }
  839 const char *
stp4020_chip_intr_string(pch, ih)
pcmcia_chipset_handle_t pch;
  842         void *ih;
  843 {
  844         if (ih == NULL)
  845                 return ("couldn't establish interrupt");
  846         else
  847                 return ("");    /* nothing for now */
  848 }
  850 /*
  851  * Delay and possibly yield CPU.
  852  * XXX - assumes a context
  853  */
  854 void
stp4020_delay(ms)
  856         unsigned int ms;
  857 {
  858         unsigned int ticks;
  860         /* Convert to ticks */
ticks = (ms * hz) / 1000000;
  863         if (cold || ticks == 0) {
delay(ms);
  865                 return;
  866         }
  868 #ifdef DEBUG
  869         if (ticks > 60 * hz)
panic("stp4020: preposterous delay: %u", ticks);
  871 #endif
tsleep(&ticks, 0, "stp4020_delay", ticks);
  873 }
  875 #ifdef STP4020_DEBUG
  876 void
stp4020_dump_regs(h)
  878         struct stp4020_socket *h;
  879 {
  880         /*
  881          * Dump control and status registers.
  882          */
printf("socket[%d] registers:\n"
  884             "\tICR0=%b\n\tICR1=%b\n\tISR0=%b\n\tISR1=%x\n", h->sock,
stp4020_rd_sockctl(h, STP4020_ICR0_IDX), STP4020_ICR0_BITS,
stp4020_rd_sockctl(h, STP4020_ICR1_IDX), STP4020_ICR1_BITS,
stp4020_rd_sockctl(h, STP4020_ISR0_IDX), STP4020_ISR0_IOBITS,
stp4020_rd_sockctl(h, STP4020_ISR1_IDX));
  889 }
  890 #endif /* STP4020_DEBUG */