root/dev/pcmcia/pcmciareg.h

INCLUDED FROM

    1 /*      $OpenBSD: pcmciareg.h,v 1.6 2003/06/26 00:35:07 mickey Exp $    */
    2 /*      $NetBSD: pcmciareg.h,v 1.6 1998/08/13 15:00:02 nathanw Exp $    */
    4 /*
    5  * Copyright (c) 1997 Marc Horowitz.  All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  * 3. All advertising materials mentioning features or use of this software
   16  *    must display the following acknowledgement:
   17  *      This product includes software developed by Marc Horowitz.
   18  * 4. The name of the author may not be used to endorse or promote products
   19  *    derived from this software without specific prior written permission.
   20  *
   21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   31  */
   33 /* most of this is from the PCMCIA PC Card Standard, Release 2.1 */
   35 /* Note: the weird indenting here is to make the constants more
   36    readable.  Please don't normalize it.  --marc */
   38 /*
   39  * CIS Tuples */
   41 /* Layer 1 Basic Compatibility Tuples */
   42 #define PCMCIA_CISTPL_NULL                      0x00
   43 #define PCMCIA_CISTPL_DEVICE                    0x01
   44 #define PCMCIA_DTYPE_MASK                               0xF0
   45 #define PCMCIA_DTYPE_NULL                                       0x00
   46 #define PCMCIA_DTYPE_ROM                                        0x10
   47 #define PCMCIA_DTYPE_OTPROM                                     0x20
   48 #define PCMCIA_DTYPE_EPROM                                      0x30
   49 #define PCMCIA_DTYPE_EEPROM                                     0x40
   50 #define PCMCIA_DTYPE_FLASH                                      0x50
   51 #define PCMCIA_DTYPE_SRAM                                       0x60
   52 #define PCMCIA_DTYPE_DRAM                                       0x70
   53 #define PCMCIA_DTYPE_FUNCSPEC                                   0xD0
   54 #define PCMCIA_DTYPE_EXTEND                                     0xE0
   55 #define PCMCIA_DSPEED_MASK                              0x07
   56 #define PCMCIA_DSPEED_NULL                                      0x00
   57 #define PCMCIA_DSPEED_250NS                                     0x01
   58 #define PCMCIA_DSPEED_200NS                                     0x02
   59 #define PCMCIA_DSPEED_150NS                                     0x03
   60 #define PCMCIA_DSPEED_100NS                                     0x04
   61 #define PCMCIA_DSPEED_EXT                                       0x07
   62 #define PCMCIA_CISTPL_LONGLINK_CB               0x02
   63 #define PCMCIA_CISTPL_INDIRECT                  0x03
   64 #define PCMCIA_CISTPL_CONFIG_CB                 0x04
   65 #define PCMCIA_CISTPL_CFTABLE_ENTRY_CB          0x05
   66 #define PCMCIA_CISTPL_LONGLINK_MFC              0x06
   67 #define PCMCIA_MFC_MEM_ATTR                             0x00
   68 #define PCMCIA_MFC_MEM_COMMON                           0x01
   69 #define PCMCIA_CISTPL_BAR                       0x07
   70 #define PCMCIA_CISTPL_PWR_MGMNT                 0x08
   71 #define PCMCIA_CISTPL_EXTDEVICE                 0x09
   72 /* #define      PCMCIA_CISTPL_RESERVED          0x0A-0x0F */
   73 #define PCMCIA_CISTPL_CHECKSUM                  0x10
   74 #define PCMCIA_CISTPL_LONGLINK_A                0x11
   75 #define PCMCIA_CISTPL_LONGLINK_C                0x12
   76 #define PCMCIA_CISTPL_LINKTARGET                0x13
   77 #define PCMCIA_CISTPL_NO_LINK                   0x14
   78 #define PCMCIA_CISTPL_VERS_1                    0x15
   79 #define PCMCIA_CISTPL_ALTSTR                    0x16
   80 #define PCMCIA_CISTPL_DEVICE_A                  0x17
   81 #define PCMCIA_CISTPL_JEDEC_C                   0x18
   82 #define PCMCIA_CISTPL_JEDEC_A                   0x19
   83 #define PCMCIA_CISTPL_CONFIG                    0x1A
   84 #define PCMCIA_TPCC_RASZ_MASK                           0x03
   85 #define PCMCIA_TPCC_RASZ_SHIFT                          0
   86 #define PCMCIA_TPCC_RMSZ_MASK                           0x3C
   87 #define PCMCIA_TPCC_RMSZ_SHIFT                          2
   88 #define PCMCIA_TPCC_RFSZ_MASK                           0xC0
   89 #define PCMCIA_TPCC_RFSZ_SHIFT                          6
   90 #define PCMCIA_CISTPL_CFTABLE_ENTRY             0x1B
   91 #define PCMCIA_TPCE_INDX_INTFACE                        0x80
   92 #define PCMCIA_TPCE_INDX_DEFAULT                        0x40
   93 #define PCMCIA_TPCE_INDX_NUM_MASK                       0x3F
   94 #define PCMCIA_TPCE_IF_MWAIT                            0x80
   95 #define PCMCIA_TPCE_IF_RDYBSY                           0x40
   96 #define PCMCIA_TPCE_IF_WP                               0x20
   97 #define PCMCIA_TPCE_IF_BVD                              0x10
   98 #define PCMCIA_TPCE_IF_IFTYPE                           0x0F
   99 #define PCMCIA_IFTYPE_MEMORY                                    0
  100 #define PCMCIA_IFTYPE_IO                                        1
  101 #define PCMCIA_TPCE_FS_MISC                             0x80
  102 #define PCMCIA_TPCE_FS_MEMSPACE_MASK                    0x60
  103 #define PCMCIA_TPCE_FS_MEMSPACE_NONE                            0x00
  104 #define PCMCIA_TPCE_FS_MEMSPACE_LENGTH                          0x20
  105 #define PCMCIA_TPCE_FS_MEMSPACE_LENGTHADDR                      0x40
  106 #define PCMCIA_TPCE_FS_MEMSPACE_TABLE                           0x60
  107 #define PCMCIA_TPCE_FS_IRQ                              0x10
  108 #define PCMCIA_TPCE_FS_IOSPACE                          0x08
  109 #define PCMCIA_TPCE_FS_TIMING                           0x04
  110 #define PCMCIA_TPCE_FS_POWER_MASK                       0x03
  111 #define PCMCIA_TPCE_FS_POWER_NONE                               0x00
  112 #define PCMCIA_TPCE_FS_POWER_VCC                                0x01
  113 #define PCMCIA_TPCE_FS_POWER_VCCVPP1                            0x02
  114 #define PCMCIA_TPCE_FS_POWER_VCCVPP1VPP2                        0x03
  115 #define PCMCIA_TPCE_TD_RESERVED_MASK                    0xE0
  116 #define PCMCIA_TPCE_TD_RDYBSY_MASK                      0x1C
  117 #define PCMCIA_TPCE_TD_WAIT_MASK                        0x03
  118 #define PCMCIA_TPCE_IO_HASRANGE                         0x80
  119 #define PCMCIA_TPCE_IO_BUSWIDTH_16BIT                   0x40
  120 #define PCMCIA_TPCE_IO_BUSWIDTH_8BIT                    0x20
  121 #define PCMCIA_TPCE_IO_IOADDRLINES_MASK                 0x1F
  122 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_MASK            0xC0
  123 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_NONE                    0x00
  124 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_ONE                     0x40
  125 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_TWO                     0x80
  126 #define PCMCIA_TPCE_IO_RANGE_LENGTHSIZE_FOUR                    0xC0
  127 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_MASK              0x30
  128 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_NONE                      0x00
  129 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_ONE                       0x10
  130 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_TWO                       0x20
  131 #define PCMCIA_TPCE_IO_RANGE_ADDRSIZE_FOUR                      0x30
  132 #define PCMCIA_TPCE_IO_RANGE_COUNT                      0x0F
  133 #define PCMCIA_TPCE_IR_SHARE                            0x80
  134 #define PCMCIA_TPCE_IR_PULSE                            0x40
  135 #define PCMCIA_TPCE_IR_LEVEL                            0x20
  136 #define PCMCIA_TPCE_IR_HASMASK                          0x10
  137 #define PCMCIA_TPCE_IR_IRQ                              0x0F
  138 #define PCMCIA_TPCE_MS_HOSTADDR                         0x80
  139 #define PCMCIA_TPCE_MS_CARDADDR_SIZE_MASK               0x60
  140 #define PCMCIA_TPCE_MS_CARDADDR_SIZE_SHIFT              5
  141 #define PCMCIA_TPCE_MS_LENGTH_SIZE_MASK                 0x18
  142 #define PCMCIA_TPCE_MS_LENGTH_SIZE_SHIFT                3
  143 #define PCMCIA_TPCE_MS_COUNT                            0x07
  144 #define PCMCIA_TPCE_MI_EXT                              0x80
  145 #define PCMCIA_TPCE_MI_RESERVED                         0x40
  146 #define PCMCIA_TPCE_MI_PWRDOWN                          0x20
  147 #define PCMCIA_TPCE_MI_READONLY                         0x10
  148 #define PCMCIA_TPCE_MI_AUDIO                            0x08
  149 #define PCMCIA_TPCE_MI_MAXTWINS                         0x07
  150 #define PCMCIA_CISTPL_DEVICE_OC                 0x1C
  151 #define PCMCIA_CISTPL_DEVICE_OA                 0x1D
  152 #define PCMCIA_CISTPL_DEVICE_GEO                0x1E
  153 #define PCMCIA_CISTPL_DEVICE_GEO_A              0x1F
  154 #define PCMCIA_CISTPL_MANFID                    0x20
  155 #define PCMCIA_CISTPL_FUNCID                    0x21
  156 #define PCMCIA_FUNCTION_UNSPEC          -1
  157 #define PCMCIA_FUNCTION_MULTIFUNCTION   0
  158 #define PCMCIA_FUNCTION_MEMORY          1
  159 #define PCMCIA_FUNCTION_SERIAL          2
  160 #define PCMCIA_FUNCTION_PARALLEL        3
  161 #define PCMCIA_FUNCTION_DISK            4
  162 #define PCMCIA_FUNCTION_VIDEO           5
  163 #define PCMCIA_FUNCTION_NETWORK         6
  164 #define PCMCIA_FUNCTION_AIMS            7
  165 #define PCMCIA_FUNCTION_SCSI            8
  166 #define PCMCIA_FUNCTION_SECURITY        9
  167 #define PCMCIA_FUNCTION_INSTRUMENT      10
  168 #define PCMCIA_FUNCTION_IOBUS           11
  169 #define PCMCIA_CISTPL_FUNCE                     0x22
  170 #define PCMCIA_TPLFE_TYPE_LAN_TECH                      0x01
  171 #define PCMCIA_TPLFE_TYPE_LAN_SPEED                     0x02
  172 #define PCMCIA_TPLFE_TYPE_LAN_MEDIA                     0x03
  173 #define PCMCIA_TPLFE_TYPE_LAN_NID                       0x04
  174 #define PCMCIA_TPLFE_TYPE_LAN_CONN                      0x05
  175 #define PCMCIA_TPLFE_TYPE_DISK_DEVICE_INTERFACE         0x01
  176 #define PCMCIA_TPLFE_DDI_PCCARD_ATA                             0x01
  177 #define PCMCIA_CISTPL_END                       0xFF
  179 /* Layer 2 Data Recording Format Tuples */
  181 #define PCMCIA_CISTPL_SWIL                      0x23
  182 /* #define      PCMCIA_CISTPL_RESERVED          0x24-0x3F */
  183 #define PCMCIA_CISTPL_VERS_2                    0x40
  184 #define PCMCIA_CISTPL_FORMAT                    0x41
  185 #define PCMCIA_CISTPL_GEOMETRY                  0x42
  186 #define PCMCIA_CISTPL_BYTEORDER                 0x43
  187 #define PCMCIA_CISTPL_DATE                      0x44
  188 #define PCMCIA_CISTPL_BATTERY                   0x45
  189 #define PCMCIA_CISTPL_FORMAT_A                  0x47
  191 /* Layer 3 Data Organization Tuples */
  193 #define PCMCIA_CISTPL_ORG                       0x46
  194 /* #define      PCMCIA_CISTPL_RESERVED          0x47-0x7F */
  196 /* Layer 4 System-Specific Standard Tuples */
  198 /* #define      PCMCIA_CISTPL_RESERVED          0x80-0x8F */
  199 #define PCMCIA_CISTPL_SPCL                      0x90
  200 /* #define      PCMCIA_CISTPL_RESERVED          0x90-0xFE */
  202 /*
  203  * Card Configuration Registers
  204  */
  206 #define PCMCIA_CCR_OPTION                       0x00
  207 #define PCMCIA_CCR_OPTION_SRESET                        0x80
  208 #define PCMCIA_CCR_OPTION_LEVIREQ                       0x40
  209 #define PCMCIA_CCR_OPTION_CFINDEX                       0x3F
  210 #define PCMCIA_CCR_OPTION_IREQ_ENABLE                   0x04
  211 #define PCMCIA_CCR_OPTION_ADDR_DECODE                   0x02
  212 #define PCMCIA_CCR_OPTION_FUNC_ENABLE                   0x01
  213 #define PCMCIA_CCR_STATUS                       0x02
  214 #define PCMCIA_CCR_STATUS_PINCHANGED                    0x80
  215 #define PCMCIA_CCR_STATUS_SIGCHG                        0x40
  216 #define PCMCIA_CCR_STATUS_IOIS8                         0x20
  217 #define PCMCIA_CCR_STATUS_RESERVED1                     0x10
  218 #define PCMCIA_CCR_STATUS_AUDIO                         0x08
  219 #define PCMCIA_CCR_STATUS_PWRDWN                        0x04
  220 #define PCMCIA_CCR_STATUS_INTR                          0x02
  221 #define PCMCIA_CCR_STATUS_INTRACK                       0x01
  222 #define PCMCIA_CCR_PIN                          0x04
  223 #define PCMCIA_CCR_PIN_CBVD1                            0x80
  224 #define PCMCIA_CCR_PIN_CBVD2                            0x40
  225 #define PCMCIA_CCR_PIN_CRDYBSY                          0x20
  226 #define PCMCIA_CCR_PIN_CWPROT                           0x10
  227 #define PCMCIA_CCR_PIN_RBVD1                            0x08
  228 #define PCMCIA_CCR_PIN_RBVD2                            0x04
  229 #define PCMCIA_CCR_PIN_RRDYBSY                          0x02
  230 #define PCMCIA_CCR_PIN_RWPROT                           0x01
  231 #define PCMCIA_CCR_SOCKETCOPY                   0x06
  232 #define PCMCIA_CCR_SOCKETCOPY_RESERVED                  0x80
  233 #define PCMCIA_CCR_SOCKETCOPY_COPY_MASK                 0x70
  234 #define PCMCIA_CCR_SOCKETCOPY_COPY_SHIFT                4
  235 #define PCMCIA_CCR_SOCKETCOPY_SOCKET_MASK               0x0F
  236 #define PCMCIA_CCR_EXTSTATUS                    0x08
  237 #define PCMCIA_CCR_IOBASE0                      0x0A
  238 #define PCMCIA_CCR_IOBASE1                      0x0C
  239 #define PCMCIA_CCR_IOBASE2                      0x0E
  240 #define PCMCIA_CCR_IOBASE3                      0x10
  241 #define PCMCIA_CCR_IOSIZE                       0x12
  243 #define PCMCIA_CCR_SIZE                         0x14