root/dev/ic/i82365var.h

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INCLUDED FROM


    1 /*      $OpenBSD: i82365var.h,v 1.14 2005/11/23 11:39:37 mickey Exp $   */
    2 /*      $NetBSD: i82365var.h,v 1.4 1998/05/23 18:32:29 matt Exp $       */
    3 
    4 /*
    5  * Copyright (c) 1997 Marc Horowitz.  All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  * 3. All advertising materials mentioning features or use of this software
   16  *    must display the following acknowledgement:
   17  *      This product includes software developed by Marc Horowitz.
   18  * 4. The name of the author may not be used to endorse or promote products
   19  *    derived from this software without specific prior written permission.
   20  *
   21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   31  */
   32 
   33 #include <sys/device.h>
   34 #include <sys/timeout.h>
   35 
   36 #include <dev/pcmcia/pcmciareg.h>
   37 #include <dev/pcmcia/pcmciachip.h>
   38 
   39 #include <dev/ic/i82365reg.h>
   40 
   41 struct proc;
   42 
   43 struct pcic_event {
   44         SIMPLEQ_ENTRY(pcic_event) pe_q;
   45         int     pe_type;
   46 };
   47 
   48 /* pe_type */
   49 #define PCIC_EVENT_INSERTION    0
   50 #define PCIC_EVENT_REMOVAL      1
   51 
   52 struct pcic_handle {
   53         struct device *ph_parent;
   54         bus_space_tag_t ph_bus_t;
   55         bus_space_handle_t ph_bus_h;
   56         u_int8_t (*ph_read)(struct pcic_handle *, int);
   57         void (*ph_write)(struct pcic_handle *, int, int);
   58 
   59         int     vendor;
   60         int     sock;
   61         int     flags;
   62         int     laststate;
   63         int     memalloc;
   64         struct {
   65                 bus_addr_t      addr;
   66                 bus_size_t      size;
   67                 long            offset;
   68                 int             kind;
   69         } mem[PCIC_MEM_WINS];
   70         int     ioalloc;
   71         struct {
   72                 bus_addr_t      addr;
   73                 bus_size_t      size;
   74                 int             width;
   75         } io[PCIC_IO_WINS];
   76         int     ih_irq;
   77         struct device *pcmcia;
   78 
   79         int     shutdown;
   80         struct proc *event_thread;
   81         SIMPLEQ_HEAD(, pcic_event) events;
   82 };
   83 
   84 #define PCIC_FLAG_SOCKETP       0x0001
   85 #define PCIC_FLAG_CARDP         0x0002
   86 
   87 #define PCIC_LASTSTATE_PRESENT  0x0002
   88 #define PCIC_LASTSTATE_HALF     0x0001
   89 #define PCIC_LASTSTATE_EMPTY    0x0000
   90 
   91 #define C0SA PCIC_CHIP0_BASE+PCIC_SOCKETA_INDEX
   92 #define C0SB PCIC_CHIP0_BASE+PCIC_SOCKETB_INDEX
   93 #define C1SA PCIC_CHIP1_BASE+PCIC_SOCKETA_INDEX
   94 #define C1SB PCIC_CHIP1_BASE+PCIC_SOCKETB_INDEX
   95 
   96 /*
   97  * This is sort of arbitrary.  It merely needs to be "enough". It can be
   98  * overridden in the conf file, anyway.
   99  */
  100 
  101 #define PCIC_MEM_PAGES  4
  102 #define PCIC_MEMSIZE    PCIC_MEM_PAGES*PCIC_MEM_PAGESIZE
  103 
  104 #define PCIC_NSLOTS     4
  105 
  106 struct  pcic_ranges {
  107         u_short start;
  108         u_short len;
  109 };
  110 
  111 struct pcic_softc {
  112         struct device dev;
  113 
  114         bus_space_tag_t memt;
  115         bus_space_handle_t memh;
  116         bus_space_tag_t iot;
  117         bus_space_handle_t ioh;
  118 
  119         /* XXX isa_chipset_tag_t, pci_chipset_tag_t, etc. */
  120         void *intr_est;
  121 
  122         pcmcia_chipset_tag_t pct;
  123 
  124         /* this needs to be large enough to hold PCIC_MEM_PAGES bits */
  125         int     subregionmask;
  126 #define PCIC_MAX_MEM_PAGES      (8 * sizeof(int))
  127 
  128         /* used by memory window mapping functions */
  129         bus_addr_t membase;
  130 
  131         /*
  132          * used by io window mapping functions.  These can actually overlap
  133          * with another pcic, since the underlying extent mapper will deal
  134          * with individual allocations.  This is here to deal with the fact
  135          * that different busses have different real widths (different pc
  136          * hardware seems to use 10 or 12 bits for the I/O bus).
  137          */
  138         bus_addr_t iobase;
  139         bus_addr_t iosize;
  140         struct pcic_ranges *ranges;
  141 
  142         int     irq;
  143         void    *ih;
  144 
  145         /* used by socket event polling */
  146         struct timeout poll_timeout;
  147         int poll_established;
  148 
  149         struct pcic_handle handle[PCIC_NSLOTS];
  150 };
  151 
  152 
  153 int     pcic_ident_ok(int);
  154 int     pcic_vendor(struct pcic_handle *);
  155 
  156 void    pcic_attach(struct pcic_softc *);
  157 void    pcic_attach_sockets(struct pcic_softc *);
  158 int     pcic_intr(void *arg);
  159 void    pcic_poll_intr(void *arg);
  160 
  161 int     pcic_chip_mem_alloc(pcmcia_chipset_handle_t, bus_size_t,
  162             struct pcmcia_mem_handle *);
  163 void    pcic_chip_mem_free(pcmcia_chipset_handle_t,
  164             struct pcmcia_mem_handle *);
  165 int     pcic_chip_mem_map(pcmcia_chipset_handle_t, int, bus_addr_t,
  166             bus_size_t, struct pcmcia_mem_handle *, bus_size_t *, int *);
  167 void    pcic_chip_mem_unmap(pcmcia_chipset_handle_t, int);
  168 
  169 int     pcic_chip_io_alloc(pcmcia_chipset_handle_t, bus_addr_t,
  170             bus_size_t, bus_size_t, struct pcmcia_io_handle *);
  171 void    pcic_chip_io_free(pcmcia_chipset_handle_t,
  172             struct pcmcia_io_handle *);
  173 int     pcic_chip_io_map(pcmcia_chipset_handle_t, int, bus_addr_t,
  174             bus_size_t, struct pcmcia_io_handle *, int *);
  175 void    pcic_chip_io_unmap(pcmcia_chipset_handle_t, int);
  176 
  177 void    pcic_chip_socket_enable(pcmcia_chipset_handle_t);
  178 void    pcic_chip_socket_disable(pcmcia_chipset_handle_t);
  179 
  180 void    pcic_power(int, void *);
  181 
  182 #define pcic_read(h, idx) \
  183         (*(h)->ph_read)((h), (idx))
  184 
  185 #define pcic_write(h, idx, data) \
  186         (*(h)->ph_write)((h), (idx), (data))

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