root/dev/ic/aic79xx.c

DEFINITIONS

1. AHDMSG_1B
2. AHDMSG_2B
3. AHDMSG_EXT
4. ahd_msgtype
5. ahd_assert_atn
6. ahd_currently_packetized
7. ahd_set_active_fifo
8. ahd_restart
9. ahd_clear_fifo
10. ahd_flush_qoutfifo
11. ahd_scb_active_in_fifo
12. ahd_run_data_fifo
13. ahd_run_qoutfifo
14. ahd_handle_hwerrint
15. ahd_handle_seqint
16. ahd_handle_scsiint
17. ahd_handle_transmission_error
18. ahd_handle_lqiphase_error
19. ahd_handle_pkt_busfree
20. ahd_handle_nonpkt_busfree
21. ahd_handle_proto_violation
22. ahd_force_renegotiation
23. ahd_clear_critical_section
24. ahd_clear_intstat
25. ahd_print_scb
26. ahd_dump_sglist
27. ahd_alloc_tstate
28. ahd_free_tstate
29. ahd_devlimited_syncrate
30. ahd_find_syncrate
31. ahd_validate_offset
32. ahd_validate_width
33. ahd_update_neg_request
34. ahd_set_syncrate
35. ahd_set_width
36. ahd_set_tags
37. ahd_update_neg_table
38. ahd_update_pending_scbs
39. ahd_fetch_devinfo
40. ahd_print_devinfo
41. ahd_lookup_phase_entry
42. ahd_compile_devinfo
43. ahd_scb_devinfo
44. ahd_setup_initiator_msgout
45. ahd_build_transfer_msg
46. ahd_construct_sdtr
47. ahd_construct_wdtr
48. ahd_construct_ppr
49. ahd_clear_msg_state
50. ahd_handle_message_phase
51. ahd_sent_msg
52. ahd_parse_msg
53. ahd_handle_msg_reject
54. ahd_handle_ign_wide_residue
55. ahd_reinitialize_dataptrs
56. ahd_handle_devreset
57. ahd_setup_target_msgin
58. ahd_sglist_size
59. ahd_sglist_allocsize
60. ahd_alloc
61. ahd_softc_init
62. ahd_softc_insert
63. ahd_find_softc
64. ahd_set_unit
65. ahd_set_name
66. ahd_free
67. ahd_shutdown
68. ahd_reset
69. ahd_probe_scbs
70. ahd_initialize_hscbs
71. ahd_init_scbdata
72. ahd_find_scb_by_tag
73. ahd_fini_scbdata
74. ahd_setup_iocell_workaround
75. ahd_iocell_first_selection
76. ahd_add_col_list
77. ahd_rem_col_list
78. ahd_get_scb
79. ahd_free_scb
80. ahd_alloc_scbs
81. ahd_controller_info
82. ahd_init
83. ahd_chip_init
84. ahd_default_config
85. ahd_parse_cfgdata
86. ahd_parse_vpddata
87. ahd_intr_enable
88. ahd_update_coalescing_values
89. ahd_enable_coalescing
90. ahd_pause_and_flushwork
91. ahd_suspend
92. ahd_resume
93. ahd_index_busy_tcl
94. ahd_find_busy_tcl
95. ahd_busy_tcl
96. ahd_match_scb
97. ahd_freeze_devq
98. ahd_qinfifo_requeue_tail
99. ahd_qinfifo_requeue
100. ahd_qinfifo_count
101. ahd_reset_cmds_pending
102. ahd_done_with_status
103. ahd_search_qinfifo
104. ahd_search_scb_list
105. ahd_stitch_tid_list
106. ahd_rem_wscb
107. ahd_add_scb_to_free_list
108. ahd_abort_scbs
109. ahd_reset_current_bus
110. ahd_reset_channel
111. ahd_reset_poll
112. ahd_stat_timer
113. ahd_handle_scb_status
114. ahd_handle_scsi_status
115. ahd_calc_residual
116. ahd_queue_lstate_event
117. ahd_send_lstate_events
118. ahd_dumpseq
119. ahd_loadseq
120. ahd_check_patch
121. ahd_resolve_seqaddr
122. ahd_download_instr
123. ahd_probe_stack_size
124. ahd_dump_all_cards_state
125. ahd_print_register
126. ahd_dump_card_state
127. ahd_dump_scbs
128. ahd_timeout
129. ahd_read_seeprom
130. ahd_write_seeprom
131. ahd_wait_seeprom
132. ahd_verify_vpd_cksum
133. ahd_verify_cksum
134. ahd_acquire_seeprom
135. ahd_release_seeprom
136. ahd_write_flexport
137. ahd_read_flexport
138. ahd_wait_flexport
139. ahd_find_tmode_devs
140. ahd_handle_en_lun
141. ahd_update_scsiid
142. ahd_run_tqinfifo
143. ahd_handle_target_cmd
144. ahd_createdmamem
145. ahd_freedmamem
146. ahd_name
147. ahd_known_modes
148. ahd_build_mode_state
149. ahd_extract_mode_state
150. ahd_set_modes
151. ahd_update_modes
152. ahd_assert_modes
153. ahd_save_modes
154. ahd_restore_modes
155. ahd_is_paused
156. ahd_pause
157. ahd_unpause
158. ahd_sg_setup
159. ahd_setup_scb_common
160. ahd_setup_data_scb
161. ahd_setup_noxfer_scb
162. ahd_sg_size
163. ahd_sg_bus_to_virt
164. ahd_sg_virt_to_bus
165. ahd_sync_scb
166. ahd_sync_sglist
167. ahd_sync_sense
168. ahd_targetcmd_offset
169. ahd_complete_scb
170. ahd_update_residual
171. ahd_fetch_transinfo
172. ahd_inw
173. ahd_outw
174. ahd_inl
175. ahd_outl
176. ahd_inq
177. ahd_outq
178. ahd_get_scbptr
179. ahd_set_scbptr
180. ahd_get_hnscb_qoff
181. ahd_set_hnscb_qoff
182. ahd_get_hescb_qoff
183. ahd_set_hescb_qoff
184. ahd_get_snscb_qoff
185. ahd_set_snscb_qoff
186. ahd_get_sescb_qoff
187. ahd_set_sescb_qoff
188. ahd_get_sdscb_qoff
189. ahd_set_sdscb_qoff
190. ahd_inb_scbram
191. ahd_inw_scbram
192. ahd_inl_scbram
193. ahd_inq_scbram
194. ahd_lookup_scb
195. ahd_swap_with_next_hscb
196. ahd_queue_scb
197. ahd_get_sense_buf
198. ahd_get_sense_bufaddr
199. ahd_sync_qoutfifo
200. ahd_sync_tqinfifo
201. ahd_check_cmdcmpltqueues
202. ahd_intr
203. ahd_unbusy_tcl

    1 /*      $OpenBSD: aic79xx.c,v 1.39 2007/05/09 19:24:56 miod Exp $       */
    3 /*
    4  * Copyright (c) 2004 Milos Urbanek, Kenneth R. Westerback & Marco Peereboom
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE FOR
   20  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  *
   28  */
   30 /*
   31  * Core routines and tables shareable across OS platforms.
   32  *
   33  * Copyright (c) 1994-2002, 2004 Justin T. Gibbs.
   34  * Copyright (c) 2000-2003 Adaptec Inc.
   35  * All rights reserved.
   36  *
   37  * Redistribution and use in source and binary forms, with or without
   38  * modification, are permitted provided that the following conditions
   39  * are met:
   40  * 1. Redistributions of source code must retain the above copyright
   41  *    notice, this list of conditions, and the following disclaimer,
   42  *    without modification.
   43  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
   44  *    substantially similar to the "NO WARRANTY" disclaimer below
   45  *    ("Disclaimer") and any redistribution must be conditioned upon
   46  *    including a substantially similar Disclaimer requirement for further
   47  *    binary redistribution.
   48  * 3. Neither the names of the above-listed copyright holders nor the names
   49  *    of any contributors may be used to endorse or promote products derived
   50  *    from this software without specific prior written permission.
   51  *
   52  * Alternatively, this software may be distributed under the terms of the
   53  * GNU General Public License ("GPL") version 2 as published by the Free
   54  * Software Foundation.
   55  *
   56  * NO WARRANTY
   57  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
   58  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
   59  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
   60  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
   61  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   62  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   63  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   64  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
   65  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
   66  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   67  * POSSIBILITY OF SUCH DAMAGES.
   68  *
   69  * Id: //depot/aic7xxx/aic7xxx/aic79xx.c#246
   70  *
   71  * FreeBSD: src/sys/dev/aic7xxx/aic79xx.c,v 1.33 2004/11/18 20:22:30 gibbs Exp
   72  */
   74 #include <sys/cdefs.h>
   76 #include <dev/ic/aic79xx_openbsd.h>
   77 #include <dev/ic/aic79xx_inline.h>
   78 #include <dev/ic/aic79xx.h>
   80 #include <dev/microcode/aic7xxx/aicasm.h>
   81 #include <dev/microcode/aic7xxx/aicasm_insformat.h>
   83 /******************************** Globals *************************************/
   84 struct ahd_softc_tailq ahd_tailq = TAILQ_HEAD_INITIALIZER(ahd_tailq);
uint32_t ahd_attach_to_HostRAID_controllers = 1;
   87 /***************************** Lookup Tables **********************************/
   88 char *ahd_chip_names[] =
   89 {
   90         "NONE",
   91         "aic7901",
   92         "aic7902",
   93         "aic7901A"
   94 };
   95 static const u_int num_chip_names = NUM_ELEMENTS(ahd_chip_names);
   97 /*
   98  * Hardware error codes.
   99  */
  100 struct ahd_hard_error_entry {
uint8_t errno;
  102         char *errmesg;
  103 };
  105 static struct ahd_hard_error_entry ahd_hard_errors[] = {
  106         { DSCTMOUT,     "Discard Timer has timed out" },
  107         { ILLOPCODE,    "Illegal Opcode in sequencer program" },
  108         { SQPARERR,     "Sequencer Parity Error" },
  109         { DPARERR,      "Data-path Parity Error" },
  110         { MPARERR,      "Scratch or SCB Memory Parity Error" },
  111         { CIOPARERR,    "CIOBUS Parity Error" },
  112 };
  113 static const u_int num_errors = NUM_ELEMENTS(ahd_hard_errors);
  115 static struct ahd_phase_table_entry ahd_phase_table[] =
  116 {
  117         { P_DATAOUT,    MSG_NOOP,               "in Data-out phase"     },
  118         { P_DATAIN,     MSG_INITIATOR_DET_ERR,  "in Data-in phase"      },
  119         { P_DATAOUT_DT, MSG_NOOP,               "in DT Data-out phase"  },
  120         { P_DATAIN_DT,  MSG_INITIATOR_DET_ERR,  "in DT Data-in phase"   },
  121         { P_COMMAND,    MSG_NOOP,               "in Command phase"      },
  122         { P_MESGOUT,    MSG_NOOP,               "in Message-out phase"  },
  123         { P_STATUS,     MSG_INITIATOR_DET_ERR,  "in Status phase"       },
  124         { P_MESGIN,     MSG_PARITY_ERROR,       "in Message-in phase"   },
  125         { P_BUSFREE,    MSG_NOOP,               "while idle"            },
  126         { 0,            MSG_NOOP,               "in unknown phase"      }
  127 };
  129 /*
  130  * In most cases we only wish to itterate over real phases, so
  131  * exclude the last element from the count.
  132  */
  133 static const u_int num_phases = NUM_ELEMENTS(ahd_phase_table) - 1;
  135 /* Our Sequencer Program */
  136 #include <dev/microcode/aic7xxx/aic79xx_seq.h>
  138 /**************************** Function Declarations ***************************/
  139 void            ahd_handle_transmission_error(struct ahd_softc *ahd);
  140 void            ahd_handle_lqiphase_error(struct ahd_softc *ahd,
u_int lqistat1);
  142 int             ahd_handle_pkt_busfree(struct ahd_softc *ahd,
u_int busfreetime);
  144 int             ahd_handle_nonpkt_busfree(struct ahd_softc *ahd);
  145 void            ahd_handle_proto_violation(struct ahd_softc *ahd);
  146 void            ahd_force_renegotiation(struct ahd_softc *ahd,
  147                                                 struct ahd_devinfo *devinfo);
  149 struct ahd_tmode_tstate*
ahd_alloc_tstate(struct ahd_softc *ahd,
u_int scsi_id, char channel);
  152 #ifdef AHD_TARGET_MODE
  153 void            ahd_free_tstate(struct ahd_softc *ahd,
u_int scsi_id, char channel, int force);
  155 #endif
  156 void            ahd_devlimited_syncrate(struct ahd_softc *ahd,
  157                                                 struct ahd_initiator_tinfo *,
u_int *period,
u_int *ppr_options,
role_t role);
  161 void            ahd_update_neg_table(struct ahd_softc *ahd,
  162                                              struct ahd_devinfo *devinfo,
  163                                              struct ahd_transinfo *tinfo);
  164 void            ahd_update_pending_scbs(struct ahd_softc *ahd);
  165 void            ahd_fetch_devinfo(struct ahd_softc *ahd,
  166                                           struct ahd_devinfo *devinfo);
  167 void            ahd_scb_devinfo(struct ahd_softc *ahd,
  168                                         struct ahd_devinfo *devinfo,
  169                                         struct scb *scb);
  170 void            ahd_setup_initiator_msgout(struct ahd_softc *ahd,
  171                                                    struct ahd_devinfo *devinfo,
  172                                                    struct scb *scb);
  173 void            ahd_build_transfer_msg(struct ahd_softc *ahd,
  174                                                struct ahd_devinfo *devinfo);
  175 void            ahd_construct_sdtr(struct ahd_softc *ahd,
  176                                            struct ahd_devinfo *devinfo,
u_int period, u_int offset);
  178 void            ahd_construct_wdtr(struct ahd_softc *ahd,
  179                                            struct ahd_devinfo *devinfo,
u_int bus_width);
  181 void            ahd_construct_ppr(struct ahd_softc *ahd,
  182                                           struct ahd_devinfo *devinfo,
u_int period, u_int offset,
u_int bus_width, u_int ppr_options);
  185 void            ahd_clear_msg_state(struct ahd_softc *ahd);
  186 void            ahd_handle_message_phase(struct ahd_softc *ahd);
  187 typedef enum {
AHDMSG_1B,
  189         AHDMSG_2B,
AHDMSG_EXT
  191 } ahd_msgtype;
  192 int             ahd_sent_msg(struct ahd_softc *ahd, ahd_msgtype type,
u_int msgval, int full);
  194 int             ahd_parse_msg(struct ahd_softc *ahd,
  195                                       struct ahd_devinfo *devinfo);
  196 int             ahd_handle_msg_reject(struct ahd_softc *ahd,
  197                                               struct ahd_devinfo *devinfo);
  198 void            ahd_handle_ign_wide_residue(struct ahd_softc *ahd,
  199                                                 struct ahd_devinfo *devinfo);
  200 void            ahd_reinitialize_dataptrs(struct ahd_softc *ahd);
  201 void            ahd_handle_devreset(struct ahd_softc *ahd,
  202                                             struct ahd_devinfo *devinfo,
u_int lun, cam_status status,
  204                                             char *message, int verbose_level);
  205 #if AHD_TARGET_MODE
  206 void            ahd_setup_target_msgin(struct ahd_softc *ahd,
  207                                                struct ahd_devinfo *devinfo,
  208                                                struct scb *scb);
  209 #endif
u_int           ahd_sglist_size(struct ahd_softc *ahd);
u_int           ahd_sglist_allocsize(struct ahd_softc *ahd);
  213 void            ahd_initialize_hscbs(struct ahd_softc *ahd);
  214 int             ahd_init_scbdata(struct ahd_softc *ahd);
  215 struct scb *    ahd_find_scb_by_tag(struct ahd_softc *, u_int);
  216 void            ahd_fini_scbdata(struct ahd_softc *ahd);
  217 void            ahd_setup_iocell_workaround(struct ahd_softc *ahd);
  218 void            ahd_iocell_first_selection(struct ahd_softc *ahd);
  219 void            ahd_add_col_list(struct ahd_softc *ahd,
  220                                          struct scb *scb, u_int col_idx);
  221 void            ahd_rem_col_list(struct ahd_softc *ahd,
  222                                          struct scb *scb);
  223 void            ahd_chip_init(struct ahd_softc *ahd);
  224 void            ahd_qinfifo_requeue(struct ahd_softc *ahd,
  225                                             struct scb *prev_scb,
  226                                             struct scb *scb);
  227 int             ahd_qinfifo_count(struct ahd_softc *ahd);
  228 int             ahd_search_scb_list(struct ahd_softc *ahd, int target,
  229                                             char channel, int lun, u_int tag,
role_t role, uint32_t status,
ahd_search_action action,
u_int *list_head, u_int *list_tail,
u_int tid);
  234 void            ahd_stitch_tid_list(struct ahd_softc *ahd,
u_int tid_prev, u_int tid_cur,
u_int tid_next);
  237 void            ahd_add_scb_to_free_list(struct ahd_softc *ahd,
u_int scbid);
u_int           ahd_rem_wscb(struct ahd_softc *ahd, u_int scbid,
u_int prev, u_int next, u_int tid);
  241 void            ahd_reset_current_bus(struct ahd_softc *ahd);
ahd_callback_t  ahd_reset_poll;
ahd_callback_t  ahd_stat_timer;
  244 #ifdef AHD_DUMP_SEQ
  245 void            ahd_dumpseq(struct ahd_softc *ahd);
  246 #endif
  247 void            ahd_loadseq(struct ahd_softc *ahd);
  248 int             ahd_check_patch(struct ahd_softc *ahd,
  249                                         const struct patch **start_patch,
u_int start_instr, u_int *skip_addr);
u_int           ahd_resolve_seqaddr(struct ahd_softc *ahd,
u_int address);
  253 void            ahd_download_instr(struct ahd_softc *ahd,
u_int instrptr, uint8_t *dconsts);
  255 int             ahd_probe_stack_size(struct ahd_softc *ahd);
  256 int             ahd_scb_active_in_fifo(struct ahd_softc *ahd,
  257                                                struct scb *scb);
  258 void            ahd_run_data_fifo(struct ahd_softc *ahd,
  259                                           struct scb *scb);
  261 #ifdef AHD_TARGET_MODE
  262 void            ahd_queue_lstate_event(struct ahd_softc *ahd,
  263                                                struct ahd_tmode_lstate *lstate,
u_int initiator_id,
u_int event_type,
u_int event_arg);
  267 void            ahd_update_scsiid(struct ahd_softc *ahd,
u_int targid_mask);
  269 int             ahd_handle_target_cmd(struct ahd_softc *ahd,
  270                                               struct target_cmd *cmd);
  271 #endif
  273 /************************** Added for porting to NetBSD ***********************/
  274 int ahd_createdmamem(struct ahd_softc *, size_t, struct map_node *,
  275     const char *);
  277 void ahd_freedmamem(struct ahd_softc *, struct map_node *);
  279 /******************************** Private Inlines *****************************/
  280 __inline void   ahd_assert_atn(struct ahd_softc *ahd);
  281 int     ahd_currently_packetized(struct ahd_softc *ahd);
  282 int     ahd_set_active_fifo(struct ahd_softc *ahd);
  284 __inline void
ahd_assert_atn(struct ahd_softc *ahd)
  286 {
ahd_outb(ahd, SCSISIGO, ATNO);
  288 }
  290 /*
  291  * Determine if the current connection has a packetized
  292  * agreement.  This does not necessarily mean that we
  293  * are currently in a packetized transfer.  We could
  294  * just as easily be sending or receiving a message.
  295  */
  296 int
ahd_currently_packetized(struct ahd_softc *ahd)
  298 {
ahd_mode_state   saved_modes;
  300         int              packetized;
saved_modes = ahd_save_modes(ahd);
  303         if ((ahd->bugs & AHD_PKTIZED_STATUS_BUG) != 0) {
  304                 /*
  305                  * The packetized bit refers to the last
  306                  * connection, not the current one.  Check
  307                  * for non-zero LQISTATE instead.
  308                  */
ahd_set_modes(ahd, AHD_MODE_CFG, AHD_MODE_CFG);
packetized = ahd_inb(ahd, LQISTATE) != 0;
  311         } else {
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
packetized = ahd_inb(ahd, LQISTAT2) & PACKETIZED;
  314         }
ahd_restore_modes(ahd, saved_modes);
  316         return (packetized);
  317 }
  319 int
ahd_set_active_fifo(struct ahd_softc *ahd)
  321 {
u_int active_fifo;
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
active_fifo = ahd_inb(ahd, DFFSTAT) & CURRFIFO;
  326         switch (active_fifo) {
  327         case 0:
  328         case 1:
ahd_set_modes(ahd, active_fifo, active_fifo);
  330                 return (1);
  331         default:
  332                 return (0);
  333         }
  334 }
  336 /************************* Sequencer Execution Control ************************/
  337 /*
  338  * Restart the sequencer program from address zero
  339  */
  340 void
ahd_restart(struct ahd_softc *ahd)
  342 {
ahd_pause(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
  348         /* No more pending messages */
ahd_clear_msg_state(ahd);
ahd_outb(ahd, SCSISIGO, 0);             /* De-assert BSY */
ahd_outb(ahd, MSG_OUT, MSG_NOOP);       /* No message to send */
ahd_outb(ahd, SXFRCTL1, ahd_inb(ahd, SXFRCTL1) & ~BITBUCKET);
ahd_outb(ahd, SEQINTCTL, 0);
ahd_outb(ahd, LASTPHASE, P_BUSFREE);
ahd_outb(ahd, SEQ_FLAGS, 0);
ahd_outb(ahd, SAVED_SCSIID, 0xFF);
ahd_outb(ahd, SAVED_LUN, 0xFF);
  359         /*
  360          * Ensure that the sequencer's idea of TQINPOS
  361          * matches our own.  The sequencer increments TQINPOS
  362          * only after it sees a DMA complete and a reset could
  363          * occur before the increment leaving the kernel to believe
  364          * the command arrived but the sequencer to not.
  365          */
ahd_outb(ahd, TQINPOS, ahd->tqinfifonext);
  368         /* Always allow reselection */
ahd_outb(ahd, SCSISEQ1,
ahd_inb(ahd, SCSISEQ_TEMPLATE) & (ENSELI|ENRSELI|ENAUTOATNP));
ahd_set_modes(ahd, AHD_MODE_CCHAN, AHD_MODE_CCHAN);
  373         /*
  374          * Clear any pending sequencer interrupt.  It is no
  375          * longer relevant since we're resetting the Program
  376          * Counter.
  377          */
ahd_outb(ahd, CLRINT, CLRSEQINT);
ahd_outb(ahd, SEQCTL0, FASTMODE|SEQRESET);
ahd_unpause(ahd);
  382 }
  384 void
ahd_clear_fifo(struct ahd_softc *ahd, u_int fifo)
  386 {
ahd_mode_state   saved_modes;
  389 #ifdef AHD_DEBUG
  390         if ((ahd_debug & AHD_SHOW_FIFOS) != 0)
printf("%s: Clearing FIFO %d\n", ahd_name(ahd), fifo);
  392 #endif
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, fifo, fifo);
ahd_outb(ahd, DFFSXFRCTL, RSTCHN|CLRSHCNT);
  396         if ((ahd_inb(ahd, SG_STATE) & FETCH_INPROG) != 0)
ahd_outb(ahd, CCSGCTL, CCSGRESET);
ahd_outb(ahd, LONGJMP_ADDR + 1, INVALID_ADDR);
ahd_outb(ahd, SG_STATE, 0);
ahd_restore_modes(ahd, saved_modes);
  401 }
  403 /************************* Input/Output Queues ********************************/
  404 /*
  405  * Flush and completed commands that are sitting in the command
  406  * complete queues down on the chip but have yet to be dma'ed back up.
  407  */
  408 void
ahd_flush_qoutfifo(struct ahd_softc *ahd)
  410 {
  411         struct          scb *scb;
ahd_mode_state  saved_modes;
u_int           saved_scbptr;
u_int           ccscbctl;
u_int           scbid;
u_int           next_scbid;
saved_modes = ahd_save_modes(ahd);
  420         /*
  421          * Flush the good status FIFO for completed packetized commands.
  422          */
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
saved_scbptr = ahd_get_scbptr(ahd);
  425         while ((ahd_inb(ahd, LQISTAT2) & LQIGSAVAIL) != 0) {
u_int fifo_mode;
u_int i;
scbid = ahd_inw(ahd, GSFIFO);
scb = ahd_lookup_scb(ahd, scbid);
  431                 if (scb == NULL) {
printf("%s: Warning - GSFIFO SCB %d invalid\n",
ahd_name(ahd), scbid);
  434                         continue;
  435                 }
  436                 /*
  437                  * Determine if this transaction is still active in
  438                  * any FIFO.  If it is, we must flush that FIFO to
  439                  * the host before completing the  command.
  440                  */
fifo_mode = 0;
rescan_fifos:
  443                 for (i = 0; i < 2; i++) {
  444                         /* Toggle to the other mode. */
fifo_mode ^= 1;
ahd_set_modes(ahd, fifo_mode, fifo_mode);
  448                         if (ahd_scb_active_in_fifo(ahd, scb) == 0)
  449                                 continue;
ahd_run_data_fifo(ahd, scb);
  453                         /*
  454                          * Running this FIFO may cause a CFG4DATA for
  455                          * this same transaction to assert in the other
  456                          * FIFO or a new snapshot SAVEPTRS interrupt
  457                          * in this FIFO.  Even running a FIFO may not
  458                          * clear the transaction if we are still waiting
  459                          * for data to drain to the host. We must loop
  460                          * until the transaction is not active in either
  461                          * FIFO just to be sure.  Reset our loop counter
  462                          * so we will visit both FIFOs again before
  463                          * declaring this transaction finished.  We
  464                          * also delay a bit so that status has a chance
  465                          * to change before we look at this FIFO again.
  466                          */
aic_delay(200);
  468                         goto rescan_fifos;
  469                 }
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
ahd_set_scbptr(ahd, scbid);
  472                 if ((ahd_inb_scbram(ahd, SCB_SGPTR) & SG_LIST_NULL) == 0
  473                  && ((ahd_inb_scbram(ahd, SCB_SGPTR) & SG_FULL_RESID) != 0
  474                   || (ahd_inb_scbram(ahd, SCB_RESIDUAL_SGPTR)
  475                       & SG_LIST_NULL) != 0)) {
u_int comp_head;
  478                         /*
  479                          * The transfer completed with a residual.
  480                          * Place this SCB on the complete DMA list
  481                          * so that we update our in-core copy of the
  482                          * SCB before completing the command.
  483                          */
ahd_outb(ahd, SCB_SCSI_STATUS, 0);
ahd_outb(ahd, SCB_SGPTR,
ahd_inb_scbram(ahd, SCB_SGPTR)
  487                                  | SG_STATUS_VALID);
ahd_outw(ahd, SCB_TAG, scbid);
ahd_outw(ahd, SCB_NEXT_COMPLETE, SCB_LIST_NULL);
comp_head = ahd_inw(ahd, COMPLETE_DMA_SCB_HEAD);
  491                         if (SCBID_IS_NULL(comp_head)) {
ahd_outw(ahd, COMPLETE_DMA_SCB_HEAD, scbid);
ahd_outw(ahd, COMPLETE_DMA_SCB_TAIL, scbid);
  494                         } else {
u_int tail;
tail = ahd_inw(ahd, COMPLETE_DMA_SCB_TAIL);
ahd_set_scbptr(ahd, tail);
ahd_outw(ahd, SCB_NEXT_COMPLETE, scbid);
ahd_outw(ahd, COMPLETE_DMA_SCB_TAIL, scbid);
ahd_set_scbptr(ahd, scbid);
  502                         }
  503                 } else
ahd_complete_scb(ahd, scb);
  505         }
ahd_set_scbptr(ahd, saved_scbptr);
  508         /*
  509          * Setup for command channel portion of flush.
  510          */
ahd_set_modes(ahd, AHD_MODE_CCHAN, AHD_MODE_CCHAN);
  513         /*
  514          * Wait for any inprogress DMA to complete and clear DMA state
  515          * if this if for an SCB in the qinfifo.
  516          */
  517         while (((ccscbctl = ahd_inb(ahd, CCSCBCTL)) & (CCARREN|CCSCBEN)) != 0) {
  519                 if ((ccscbctl & (CCSCBDIR|CCARREN)) == (CCSCBDIR|CCARREN)) {
  520                         if ((ccscbctl & ARRDONE) != 0)
  521                                 break;
  522                 } else if ((ccscbctl & CCSCBDONE) != 0)
  523                         break;
aic_delay(200);
  525         }
  526         /*
  527          * We leave the sequencer to cleanup in the case of DMA's to
  528          * update the qoutfifo.  In all other cases (DMA's to the
  529          * chip or a push of an SCB from the COMPLETE_DMA_SCB list),
  530          * we disable the DMA engine so that the sequencer will not
  531          * attempt to handle the DMA completion.
  532          */
  533         if ((ccscbctl & CCSCBDIR) != 0 || (ccscbctl & ARRDONE) != 0)
ahd_outb(ahd, CCSCBCTL, ccscbctl & ~(CCARREN|CCSCBEN));
  536         /*
  537          * Complete any SCBs that just finished
  538          * being DMA'ed into the qoutfifo.
  539          */
ahd_run_qoutfifo(ahd);
saved_scbptr = ahd_get_scbptr(ahd);
  543         /*
  544          * Manually update/complete any completed SCBs that are waiting to be
  545          * DMA'ed back up to the host.
  546          */
scbid = ahd_inw(ahd, COMPLETE_DMA_SCB_HEAD);
  548         while (!SCBID_IS_NULL(scbid)) {
uint8_t *hscb_ptr;
u_int    i;
ahd_set_scbptr(ahd, scbid);
next_scbid = ahd_inw_scbram(ahd, SCB_NEXT_COMPLETE);
scb = ahd_lookup_scb(ahd, scbid);
  555                 if (scb == NULL) {
printf("%s: Warning - DMA-up and complete "
  557                                "SCB %d invalid\n", ahd_name(ahd), scbid);
  558                         continue;
  559                 }
hscb_ptr = (uint8_t *)scb->hscb;
  561                 for (i = 0; i < sizeof(struct hardware_scb); i++)
  562                         *hscb_ptr++ = ahd_inb_scbram(ahd, SCB_BASE + i);
ahd_complete_scb(ahd, scb);
scbid = next_scbid;
  566         }
ahd_outw(ahd, COMPLETE_DMA_SCB_HEAD, SCB_LIST_NULL);
ahd_outw(ahd, COMPLETE_DMA_SCB_TAIL, SCB_LIST_NULL);
scbid = ahd_inw(ahd, COMPLETE_ON_QFREEZE_HEAD);
  571         while (!SCBID_IS_NULL(scbid)) {
ahd_set_scbptr(ahd, scbid);
next_scbid = ahd_inw_scbram(ahd, SCB_NEXT_COMPLETE);
scb = ahd_lookup_scb(ahd, scbid);
  576                 if (scb == NULL) {
printf("%s: Warning - Complete Qfrz SCB %d invalid\n",
ahd_name(ahd), scbid);
  579                         continue;
  580                 }
ahd_complete_scb(ahd, scb);
scbid = next_scbid;
  584         }
ahd_outw(ahd, COMPLETE_ON_QFREEZE_HEAD, SCB_LIST_NULL);
scbid = ahd_inw(ahd, COMPLETE_SCB_HEAD);
  588         while (!SCBID_IS_NULL(scbid)) {
ahd_set_scbptr(ahd, scbid);
next_scbid = ahd_inw_scbram(ahd, SCB_NEXT_COMPLETE);
scb = ahd_lookup_scb(ahd, scbid);
  593                 if (scb == NULL) {
printf("%s: Warning - Complete SCB %d invalid\n",
ahd_name(ahd), scbid);
  596                         continue;
  597                 }
ahd_complete_scb(ahd, scb);
scbid = next_scbid;
  601         }
ahd_outw(ahd, COMPLETE_SCB_HEAD, SCB_LIST_NULL);
  604         /*
  605          * Restore state.
  606          */
ahd_set_scbptr(ahd, saved_scbptr);
ahd_restore_modes(ahd, saved_modes);
ahd->flags |= AHD_UPDATE_PEND_CMDS;
  610 }
  612 /*
  613  * Determine if an SCB for a packetized transaction
  614  * is active in a FIFO.
  615  */
  616 int
ahd_scb_active_in_fifo(struct ahd_softc *ahd, struct scb *scb)
  618 {
  620         /*
  621          * The FIFO is only active for our transaction if
  622          * the SCBPTR matches the SCB's ID and the firmware
  623          * has installed a handler for the FIFO or we have
  624          * a pending SAVEPTRS or CFG4DATA interrupt.
  625          */
  626         if (ahd_get_scbptr(ahd) != SCB_GET_TAG(scb)
  627          || ((ahd_inb(ahd, LONGJMP_ADDR+1) & INVALID_ADDR) != 0
  628           && (ahd_inb(ahd, SEQINTSRC) & (CFG4DATA|SAVEPTRS)) == 0))
  629                 return (0);
  631         return (1);
  632 }
  634 /*
  635  * Run a data fifo to completion for a transaction we know
  636  * has completed across the SCSI bus (good status has been
  637  * received).  We are already set to the correct FIFO mode
  638  * on entry to this routine.
  639  *
  640  * This function attempts to operate exactly as the firmware
  641  * would when running this FIFO.  Care must be taken to update
  642  * this routine any time the firmware's FIFO algorithm is
  643  * changed.
  644  */
  645 void
ahd_run_data_fifo(struct ahd_softc *ahd, struct scb *scb)
  647 {
u_int seqintsrc;
seqintsrc = ahd_inb(ahd, SEQINTSRC);
  651         if ((seqintsrc & CFG4DATA) != 0) {
uint32_t datacnt;
uint32_t sgptr;
  655                 /*
  656                  * Clear full residual flag.
  657                  */
sgptr = ahd_inl_scbram(ahd, SCB_SGPTR) & ~SG_FULL_RESID;
ahd_outb(ahd, SCB_SGPTR, sgptr);
  661                 /*
  662                  * Load datacnt and address.
  663                  */
datacnt = ahd_inl_scbram(ahd, SCB_DATACNT);
  665                 if ((datacnt & AHD_DMA_LAST_SEG) != 0) {
sgptr |= LAST_SEG;
ahd_outb(ahd, SG_STATE, 0);
  668                 } else
ahd_outb(ahd, SG_STATE, LOADING_NEEDED);
ahd_outq(ahd, HADDR, ahd_inq_scbram(ahd, SCB_DATAPTR));
ahd_outl(ahd, HCNT, datacnt & AHD_SG_LEN_MASK);
ahd_outb(ahd, SG_CACHE_PRE, sgptr);
ahd_outb(ahd, DFCNTRL, PRELOADEN|SCSIEN|HDMAEN);
  675                 /*
  676                  * Initialize Residual Fields.
  677                  */
ahd_outb(ahd, SCB_RESIDUAL_DATACNT+3, datacnt >> 24);
ahd_outl(ahd, SCB_RESIDUAL_SGPTR, sgptr & SG_PTR_MASK);
  681                 /*
  682                  * Mark the SCB as having a FIFO in use.
  683                  */
ahd_outb(ahd, SCB_FIFO_USE_COUNT,
ahd_inb_scbram(ahd, SCB_FIFO_USE_COUNT) + 1);
  687                 /*
  688                  * Install a "fake" handler for this FIFO.
  689                  */
ahd_outw(ahd, LONGJMP_ADDR, 0);
  692                 /*
  693                  * Notify the hardware that we have satisfied
  694                  * this sequencer interrupt.
  695                  */
ahd_outb(ahd, CLRSEQINTSRC, CLRCFG4DATA);
  697         } else if ((seqintsrc & SAVEPTRS) != 0) {
uint32_t sgptr;
uint32_t resid;
  701                 if ((ahd_inb(ahd, LONGJMP_ADDR+1)&INVALID_ADDR) != 0) {
  702                         /*
  703                          * Snapshot Save Pointers.  All that
  704                          * is necessary to clear the snapshot
  705                          * is a CLRCHN.
  706                          */
  707                         goto clrchn;
  708                 }
  710                 /*
  711                  * Disable S/G fetch so the DMA engine
  712                  * is available to future users.
  713                  */
  714                 if ((ahd_inb(ahd, SG_STATE) & FETCH_INPROG) != 0)
ahd_outb(ahd, CCSGCTL, 0);
ahd_outb(ahd, SG_STATE, 0);
  718                 /*
  719                  * Flush the data FIFO.  Strickly only
  720                  * necessary for Rev A parts.
  721                  */
ahd_outb(ahd, DFCNTRL, ahd_inb(ahd, DFCNTRL) | FIFOFLUSH);
  724                 /*
  725                  * Calculate residual.
  726                  */
sgptr = ahd_inl_scbram(ahd, SCB_RESIDUAL_SGPTR);
resid = ahd_inl(ahd, SHCNT);
resid |= ahd_inb_scbram(ahd, SCB_RESIDUAL_DATACNT+3) << 24;
ahd_outl(ahd, SCB_RESIDUAL_DATACNT, resid);
  731                 if ((ahd_inb(ahd, SG_CACHE_SHADOW) & LAST_SEG) == 0) {
  732                         /*
  733                          * Must back up to the correct S/G element.
  734                          * Typically this just means resetting our
  735                          * low byte to the offset in the SG_CACHE,
  736                          * but if we wrapped, we have to correct
  737                          * the other bytes of the sgptr too.
  738                          */
  739                         if ((ahd_inb(ahd, SG_CACHE_SHADOW) & 0x80) != 0
  740                          && (sgptr & 0x80) == 0)
sgptr -= 0x100;
sgptr &= ~0xFF;
sgptr |= ahd_inb(ahd, SG_CACHE_SHADOW)
  744                                & SG_ADDR_MASK;
ahd_outl(ahd, SCB_RESIDUAL_SGPTR, sgptr);
ahd_outb(ahd, SCB_RESIDUAL_DATACNT + 3, 0);
  747                 } else if ((resid & AHD_SG_LEN_MASK) == 0) {
ahd_outb(ahd, SCB_RESIDUAL_SGPTR,
sgptr | SG_LIST_NULL);
  750                 }
  751                 /*
  752                  * Save Pointers.
  753                  */
ahd_outq(ahd, SCB_DATAPTR, ahd_inq(ahd, SHADDR));
ahd_outl(ahd, SCB_DATACNT, resid);
ahd_outl(ahd, SCB_SGPTR, sgptr);
ahd_outb(ahd, CLRSEQINTSRC, CLRSAVEPTRS);
ahd_outb(ahd, SEQIMODE,
ahd_inb(ahd, SEQIMODE) | ENSAVEPTRS);
  760                 /*
  761                  * If the data is to the SCSI bus, we are
  762                  * done, otherwise wait for FIFOEMP.
  763                  */
  764                 if ((ahd_inb(ahd, DFCNTRL) & DIRECTION) != 0)
  765                         goto clrchn;
  766         } else if ((ahd_inb(ahd, SG_STATE) & LOADING_NEEDED) != 0) {
uint32_t sgptr;
uint64_t data_addr;
uint32_t data_len;
u_int    dfcntrl;
  772                 /*
  773                  * Disable S/G fetch so the DMA engine
  774                  * is available to future users.  We won't
  775                  * be using the DMA engine to load segments.
  776                  */
  777                 if ((ahd_inb(ahd, SG_STATE) & FETCH_INPROG) != 0) {
ahd_outb(ahd, CCSGCTL, 0);
ahd_outb(ahd, SG_STATE, LOADING_NEEDED);
  780                 }
  782                 /*
  783                  * Wait for the DMA engine to notice that the
  784                  * host transfer is enabled and that there is
  785                  * space in the S/G FIFO for new segments before
  786                  * loading more segments.
  787                  */
  788                 if ((ahd_inb(ahd, DFSTATUS) & PRELOAD_AVAIL) != 0
  789                  && (ahd_inb(ahd, DFCNTRL) & HDMAENACK) != 0) {
  791                         /*
  792                          * Determine the offset of the next S/G
  793                          * element to load.
  794                          */
sgptr = ahd_inl_scbram(ahd, SCB_RESIDUAL_SGPTR);
sgptr &= SG_PTR_MASK;
  797                         if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
  798                                 struct ahd_dma64_seg *sg;
sg = ahd_sg_bus_to_virt(ahd, scb, sgptr);
data_addr = sg->addr;
data_len = sg->len;
sgptr += sizeof(*sg);
  804                         } else {
  805                                 struct  ahd_dma_seg *sg;
sg = ahd_sg_bus_to_virt(ahd, scb, sgptr);
data_addr = sg->len & AHD_SG_HIGH_ADDR_MASK;
data_addr <<= 8;
data_addr |= sg->addr;
data_len = sg->len;
sgptr += sizeof(*sg);
  813                         }
  815                         /*
  816                          * Update residual information.
  817                          */
ahd_outb(ahd, SCB_RESIDUAL_DATACNT+3, data_len >> 24);
ahd_outl(ahd, SCB_RESIDUAL_SGPTR, sgptr);
  821                         /*
  822                          * Load the S/G.
  823                          */
  824                         if (data_len & AHD_DMA_LAST_SEG) {
sgptr |= LAST_SEG;
ahd_outb(ahd, SG_STATE, 0);
  827                         }
ahd_outq(ahd, HADDR, data_addr);
ahd_outl(ahd, HCNT, data_len & AHD_SG_LEN_MASK);
ahd_outb(ahd, SG_CACHE_PRE, sgptr & 0xFF);
  832                         /*
  833                          * Advertise the segment to the hardware.
  834                          */
dfcntrl = ahd_inb(ahd, DFCNTRL)|PRELOADEN|HDMAEN;
  836                         if ((ahd->features & AHD_NEW_DFCNTRL_OPTS) != 0) {
  837                                 /*
  838                                  * Use SCSIENWRDIS so that SCSIEN
  839                                  * is never modified by this
  840                                  * operation.
  841                                  */
dfcntrl |= SCSIENWRDIS;
  843                         }
ahd_outb(ahd, DFCNTRL, dfcntrl);
  845                 }
  846         } else if ((ahd_inb(ahd, SG_CACHE_SHADOW) & LAST_SEG_DONE) != 0) {
  848                 /*
  849                  * Transfer completed to the end of SG list
  850                  * and has flushed to the host.
  851                  */
ahd_outb(ahd, SCB_SGPTR,
ahd_inb_scbram(ahd, SCB_SGPTR) | SG_LIST_NULL);
  854                 goto clrchn;
  855         } else if ((ahd_inb(ahd, DFSTATUS) & FIFOEMP) != 0) {
clrchn:
  857                 /*
  858                  * Clear any handler for this FIFO, decrement
  859                  * the FIFO use count for the SCB, and release
  860                  * the FIFO.
  861                  */
ahd_outb(ahd, LONGJMP_ADDR + 1, INVALID_ADDR);
ahd_outb(ahd, SCB_FIFO_USE_COUNT,
ahd_inb_scbram(ahd, SCB_FIFO_USE_COUNT) - 1);
ahd_outb(ahd, DFFSXFRCTL, CLRCHN);
  866         }
  867 }
  869 /*
  870  * Look for entries in the QoutFIFO that have completed.
  871  * The valid_tag completion field indicates the validity
  872  * of the entry - the valid value toggles each time through
  873  * the queue. We use the sg_status field in the completion
  874  * entry to avoid referencing the hscb if the completion
  875  * occurred with no errors and no residual.  sg_status is
  876  * a copy of the first byte (little endian) of the sgptr
  877  * hscb field.
  878  */
  879 void
ahd_run_qoutfifo(struct ahd_softc *ahd)
  881 {
  882         struct ahd_completion *completion;
  883         struct scb *scb;
u_int  scb_index;
  886         if ((ahd->flags & AHD_RUNNING_QOUTFIFO) != 0)
panic("ahd_run_qoutfifo recursion");
ahd->flags |= AHD_RUNNING_QOUTFIFO;
ahd_sync_qoutfifo(ahd, BUS_DMASYNC_POSTREAD);
  890         for (;;) {
completion = &ahd->qoutfifo[ahd->qoutfifonext];
  893                 if (completion->valid_tag != ahd->qoutfifonext_valid_tag)
  894                         break;
scb_index = aic_le16toh(completion->tag);
scb = ahd_lookup_scb(ahd, scb_index);
  898                 if (scb == NULL) {
printf("%s: WARNING no command for scb %d "
  900                                "(cmdcmplt)\nQOUTPOS = %d\n",
ahd_name(ahd), scb_index,
ahd->qoutfifonext);
ahd_dump_card_state(ahd);
  904                 } else if ((completion->sg_status & SG_STATUS_VALID) != 0) {
ahd_handle_scb_status(ahd, scb);
  906                 } else {
ahd_done(ahd, scb);
  908                 }
ahd->qoutfifonext = (ahd->qoutfifonext+1) & (AHD_QOUT_SIZE-1);
  911                 if (ahd->qoutfifonext == 0)
ahd->qoutfifonext_valid_tag ^= QOUTFIFO_ENTRY_VALID;
  913         }
ahd->flags &= ~AHD_RUNNING_QOUTFIFO;
  915 }
  917 /************************* Interrupt Handling *********************************/
  918 void
ahd_handle_hwerrint(struct ahd_softc *ahd)
  920 {
  921         /*
  922          * Some catastrophic hardware error has occurred.
  923          * Print it for the user and disable the controller.
  924          */
  925         int i;
  926         int error;
error = ahd_inb(ahd, ERROR);
  929         for (i = 0; i < num_errors; i++) {
  930                 if ((error & ahd_hard_errors[i].errno) != 0)
printf("%s: hwerrint, %s\n",
ahd_name(ahd), ahd_hard_errors[i].errmesg);
  933         }
ahd_dump_card_state(ahd);
panic("BRKADRINT");
  938         /* Tell everyone that this HBA is no longer available */
ahd_abort_scbs(ahd, CAM_TARGET_WILDCARD, ALL_CHANNELS,
CAM_LUN_WILDCARD, SCB_LIST_NULL, ROLE_UNKNOWN,
CAM_NO_HBA);
  943         /* Tell the system that this controller has gone away. */
ahd_free(ahd);
  945 }
  947 void
ahd_handle_seqint(struct ahd_softc *ahd, u_int intstat)
  949 {
u_int seqintcode;
  952         /*
  953          * Save the sequencer interrupt code and clear the SEQINT
  954          * bit. We will unpause the sequencer, if appropriate,
  955          * after servicing the request.
  956          */
seqintcode = ahd_inb(ahd, SEQINTCODE);
ahd_outb(ahd, CLRINT, CLRSEQINT);
  959         if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) {
  960                 /*
  961                  * Unpause the sequencer and let it clear
  962                  * SEQINT by writing NO_SEQINT to it.  This
  963                  * will cause the sequencer to be paused again,
  964                  * which is the expected state of this routine.
  965                  */
ahd_unpause(ahd);
  967                 while (!ahd_is_paused(ahd))
  968                         ;
ahd_outb(ahd, CLRINT, CLRSEQINT);
  970         }
ahd_update_modes(ahd);
  972 #ifdef AHD_DEBUG
  973         if ((ahd_debug & AHD_SHOW_MISC) != 0)
printf("%s: Handle Seqint Called for code %d\n",
ahd_name(ahd), seqintcode);
  976 #endif
  977         switch (seqintcode) {
  978         case ENTERING_NONPACK:
  979         {
  980                 struct  scb *scb;
u_int   scbid;
AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK),
  984                                  ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK));
scbid = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scbid);
  987                 if (scb == NULL) {
  988                         /*
  989                          * Somehow need to know if this
  990                          * is from a selection or reselection.
  991                          * From that, we can determine target
  992                          * ID so we at least have an I_T nexus.
  993                          */
  994                 } else {
ahd_outb(ahd, SAVED_SCSIID, scb->hscb->scsiid);
ahd_outb(ahd, SAVED_LUN, scb->hscb->lun);
ahd_outb(ahd, SEQ_FLAGS, 0x0);
  998                 }
  999                 if ((ahd_inb(ahd, LQISTAT2) & LQIPHASE_OUTPKT) != 0
 1000                  && (ahd_inb(ahd, SCSISIGO) & ATNO) != 0) {
 1001                         /*
 1002                          * Phase change after read stream with
 1003                          * CRC error with P0 asserted on last
 1004                          * packet.
 1005                          */
 1006 #ifdef AHD_DEBUG
 1007                         if ((ahd_debug & AHD_SHOW_RECOVERY) != 0)
printf("%s: Assuming LQIPHASE_NLQ with "
 1009                                        "P0 assertion\n", ahd_name(ahd));
 1010 #endif
 1011                 }
 1012 #ifdef AHD_DEBUG
 1013                 if ((ahd_debug & AHD_SHOW_RECOVERY) != 0)
printf("%s: Entering NONPACK\n", ahd_name(ahd));
 1015 #endif
 1016                 break;
 1017         }
 1018         case INVALID_SEQINT:
printf("%s: Invalid Sequencer interrupt occurred.\n",
ahd_name(ahd));
ahd_dump_card_state(ahd);
ahd_reset_channel(ahd, 'A', /*Initiate Reset*/TRUE);
 1023                 break;
 1024         case STATUS_OVERRUN:
 1025         {
 1026                 struct  scb *scb;
u_int   scbid;
scbid = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scbid);
 1031                 if (scb != NULL)
ahd_print_path(ahd, scb);
 1033                 else
printf("%s: ", ahd_name(ahd));
printf("SCB %d Packetized Status Overrun", scbid);
ahd_dump_card_state(ahd);
ahd_reset_channel(ahd, 'A', /*Initiate Reset*/TRUE);
 1038                 break;
 1039         }
 1040         case CFG4ISTAT_INTR:
 1041         {
 1042                 struct  scb *scb;
u_int   scbid;
scbid = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scbid);
 1047                 if (scb == NULL) {
ahd_dump_card_state(ahd);
printf("CFG4ISTAT: Free SCB %d referenced", scbid);
panic("For safety");
 1051                 }
ahd_outq(ahd, HADDR, scb->sense_busaddr);
ahd_outw(ahd, HCNT, AHD_SENSE_BUFSIZE);
ahd_outb(ahd, HCNT + 2, 0);
ahd_outb(ahd, SG_CACHE_PRE, SG_LAST_SEG);
ahd_outb(ahd, DFCNTRL, PRELOADEN|SCSIEN|HDMAEN);
 1057                 break;
 1058         }
 1059         case ILLEGAL_PHASE:
 1060         {
u_int bus_phase;
bus_phase = ahd_inb(ahd, SCSISIGI) & PHASE_MASK;
printf("%s: ILLEGAL_PHASE 0x%x\n",
ahd_name(ahd), bus_phase);
 1067                 switch (bus_phase) {
 1068                 case P_DATAOUT:
 1069                 case P_DATAIN:
 1070                 case P_DATAOUT_DT:
 1071                 case P_DATAIN_DT:
 1072                 case P_MESGOUT:
 1073                 case P_STATUS:
 1074                 case P_MESGIN:
ahd_reset_channel(ahd, 'A', /*Initiate Reset*/TRUE);
printf("%s: Issued Bus Reset.\n", ahd_name(ahd));
 1077                         break;
 1078                 case P_COMMAND:
 1079                 {
 1080                         struct  ahd_devinfo devinfo;
 1081                         struct  scb *scb;
 1082                         struct  ahd_initiator_tinfo *targ_info;
 1083                         struct  ahd_tmode_tstate *tstate;
 1084                         struct  ahd_transinfo *tinfo;
u_int   scbid;
 1087                         /*
 1088                          * If a target takes us into the command phase
 1089                          * assume that it has been externally reset and
 1090                          * has thus lost our previous packetized negotiation
 1091                          * agreement.  Since we have not sent an identify
 1092                          * message and may not have fully qualified the
 1093                          * connection, we change our command to TUR, assert
 1094                          * ATN and ABORT the task when we go to message in
 1095                          * phase.  The OSM will see the REQUEUE_REQUEST
 1096                          * status and retry the command.
 1097                          */
scbid = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scbid);
 1100                         if (scb == NULL) {
printf("Invalid phase with no valid SCB.  "
 1102                                        "Resetting bus.\n");
ahd_reset_channel(ahd, 'A',
 1104                                                   /*Initiate Reset*/TRUE);
 1105                                 break;
 1106                         }
ahd_compile_devinfo(&devinfo, SCB_GET_OUR_ID(scb),
SCB_GET_TARGET(ahd, scb),
SCB_GET_LUN(scb),
SCB_GET_CHANNEL(ahd, scb),
ROLE_INITIATOR);
targ_info = ahd_fetch_transinfo(ahd,
devinfo.channel,
devinfo.our_scsiid,
devinfo.target,
 1116                                                         &tstate);
tinfo = &targ_info->curr;
ahd_set_width(ahd, &devinfo, MSG_EXT_WDTR_BUS_8_BIT,
AHD_TRANS_ACTIVE, /*paused*/TRUE);
ahd_set_syncrate(ahd, &devinfo, /*period*/0,
 1121                                          /*offset*/0, /*ppr_options*/0,
AHD_TRANS_ACTIVE, /*paused*/TRUE);
ahd_outb(ahd, SCB_CDB_STORE, 0);
ahd_outb(ahd, SCB_CDB_STORE+1, 0);
ahd_outb(ahd, SCB_CDB_STORE+2, 0);
ahd_outb(ahd, SCB_CDB_STORE+3, 0);
ahd_outb(ahd, SCB_CDB_STORE+4, 0);
ahd_outb(ahd, SCB_CDB_STORE+5, 0);
ahd_outb(ahd, SCB_CDB_LEN, 6);
scb->hscb->control &= ~(TAG_ENB|SCB_TAG_TYPE);
scb->hscb->control |= MK_MESSAGE;
ahd_outb(ahd, SCB_CONTROL, scb->hscb->control);
ahd_outb(ahd, MSG_OUT, HOST_MSG);
ahd_outb(ahd, SAVED_SCSIID, scb->hscb->scsiid);
 1135                         /*
 1136                          * The lun is 0, regardless of the SCB's lun
 1137                          * as we have not sent an identify message.
 1138                          */
ahd_outb(ahd, SAVED_LUN, 0);
ahd_outb(ahd, SEQ_FLAGS, 0);
ahd_assert_atn(ahd);
scb->flags &= ~SCB_PACKETIZED;
scb->flags |= SCB_ABORT|SCB_CMDPHASE_ABORT;
ahd_freeze_devq(ahd, scb);
aic_set_transaction_status(scb, CAM_REQUEUE_REQ);
aic_freeze_scb(scb);
 1148                         /*
 1149                          * Allow the sequencer to continue with
 1150                          * non-pack processing.
 1151                          */
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
ahd_outb(ahd, CLRLQOINT1, CLRLQOPHACHGINPKT);
 1154                         if ((ahd->bugs & AHD_CLRLQO_AUTOCLR_BUG) != 0) {
ahd_outb(ahd, CLRLQOINT1, 0);
 1156                         }
 1157 #ifdef AHD_DEBUG
 1158                         if ((ahd_debug & AHD_SHOW_RECOVERY) != 0) {
ahd_print_path(ahd, scb);
printf("Unexpected command phase from "
 1161                                        "packetized target\n");
 1162                         }
 1163 #endif
 1164                         break;
 1165                 }
 1166                 }
 1167                 break;
 1168         }
 1169         case CFG4OVERRUN:
 1170         {
 1171                 struct  scb *scb;
u_int   scb_index;
 1174 #ifdef AHD_DEBUG
 1175                 if ((ahd_debug & AHD_SHOW_RECOVERY) != 0) {
printf("%s: CFG4OVERRUN mode = %x\n", ahd_name(ahd),
ahd_inb(ahd, MODE_PTR));
 1178                 }
 1179 #endif
scb_index = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scb_index);
 1182                 if (scb == NULL) {
 1183                         /*
 1184                          * Attempt to transfer to an SCB that is
 1185                          * not outstanding.
 1186                          */
ahd_assert_atn(ahd);
ahd_outb(ahd, MSG_OUT, HOST_MSG);
ahd->msgout_buf[0] = MSG_ABORT_TASK;
ahd->msgout_len = 1;
ahd->msgout_index = 0;
ahd->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
 1193                         /*
 1194                          * Clear status received flag to prevent any
 1195                          * attempt to complete this bogus SCB.
 1196                          */
ahd_outb(ahd, SCB_CONTROL,
ahd_inb_scbram(ahd, SCB_CONTROL)
 1199                                  & ~STATUS_RCVD);
 1200                 }
 1201                 break;
 1202         }
 1203         case DUMP_CARD_STATE:
 1204         {
ahd_dump_card_state(ahd);
 1206                 break;
 1207         }
 1208         case PDATA_REINIT:
 1209         {
 1210 #ifdef AHD_DEBUG
 1211                 if ((ahd_debug & AHD_SHOW_RECOVERY) != 0) {
printf("%s: PDATA_REINIT - DFCNTRL = 0x%x "
 1213                                "SG_CACHE_SHADOW = 0x%x\n",
ahd_name(ahd), ahd_inb(ahd, DFCNTRL),
ahd_inb(ahd, SG_CACHE_SHADOW));
 1216                 }
 1217 #endif
ahd_reinitialize_dataptrs(ahd);
 1219                 break;
 1220         }
 1221         case HOST_MSG_LOOP:
 1222         {
 1223                 struct ahd_devinfo devinfo;
 1225                 /*
 1226                  * The sequencer has encountered a message phase
 1227                  * that requires host assistance for completion.
 1228                  * While handling the message phase(s), we will be
 1229                  * notified by the sequencer after each byte is
 1230                  * transfered so we can track bus phase changes.
 1231                  *
 1232                  * If this is the first time we've seen a HOST_MSG_LOOP
 1233                  * interrupt, initialize the state of the host message
 1234                  * loop.
 1235                  */
ahd_fetch_devinfo(ahd, &devinfo);
 1237                 if (ahd->msg_type == MSG_TYPE_NONE) {
 1238                         struct scb *scb;
u_int scb_index;
u_int bus_phase;
bus_phase = ahd_inb(ahd, SCSISIGI) & PHASE_MASK;
 1243                         if (bus_phase != P_MESGIN
 1244                          && bus_phase != P_MESGOUT) {
printf("ahd_intr: HOST_MSG_LOOP bad "
 1246                                        "phase 0x%x\n", bus_phase);
 1247                                 /*
 1248                                  * Probably transitioned to bus free before
 1249                                  * we got here.  Just punt the message.
 1250                                  */
ahd_dump_card_state(ahd);
ahd_clear_intstat(ahd);
ahd_restart(ahd);
 1254                                 return;
 1255                         }
scb_index = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scb_index);
 1259                         if (devinfo.role == ROLE_INITIATOR) {
 1260                                 if (bus_phase == P_MESGOUT)
ahd_setup_initiator_msgout(ahd,
 1262                                                                    &devinfo,
scb);
 1264                                 else {
ahd->msg_type =
MSG_TYPE_INITIATOR_MSGIN;
ahd->msgin_index = 0;
 1268                                 }
 1269                         }
 1270 #if AHD_TARGET_MODE
 1271                         else {
 1272                                 if (bus_phase == P_MESGOUT) {
ahd->msg_type =
MSG_TYPE_TARGET_MSGOUT;
ahd->msgin_index = 0;
 1276                                 }
 1277                                 else 
ahd_setup_target_msgin(ahd,
 1279                                                                &devinfo,
scb);
 1281                         }
 1282 #endif
 1283                 }
ahd_handle_message_phase(ahd);
 1286                 break;
 1287         }
 1288         case NO_MATCH:
 1289         {
 1290                 /* Ensure we don't leave the selection hardware on */
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
ahd_outb(ahd, SCSISEQ0, ahd_inb(ahd, SCSISEQ0) & ~ENSELO);
printf("%s:%c:%d: no active SCB for reconnecting "
 1295                        "target - issuing BUS DEVICE RESET\n",
ahd_name(ahd), 'A', ahd_inb(ahd, SELID) >> 4);
printf("SAVED_SCSIID == 0x%x, SAVED_LUN == 0x%x, "
 1298                        "REG0 == 0x%x ACCUM = 0x%x\n",
ahd_inb(ahd, SAVED_SCSIID), ahd_inb(ahd, SAVED_LUN),
ahd_inw(ahd, REG0), ahd_inb(ahd, ACCUM));
printf("SEQ_FLAGS == 0x%x, SCBPTR == 0x%x, BTT == 0x%x, "
 1302                        "SINDEX == 0x%x\n",
ahd_inb(ahd, SEQ_FLAGS), ahd_get_scbptr(ahd),
ahd_find_busy_tcl(ahd,
BUILD_TCL(ahd_inb(ahd, SAVED_SCSIID),
ahd_inb(ahd, SAVED_LUN))),
ahd_inw(ahd, SINDEX));
printf("SELID == 0x%x, SCB_SCSIID == 0x%x, SCB_LUN == 0x%x, "
 1309                        "SCB_CONTROL == 0x%x\n",
ahd_inb(ahd, SELID), ahd_inb_scbram(ahd, SCB_SCSIID),
ahd_inb_scbram(ahd, SCB_LUN),
ahd_inb_scbram(ahd, SCB_CONTROL));
printf("SCSIBUS[0] == 0x%x, SCSISIGI == 0x%x\n",
ahd_inb(ahd, SCSIBUS), ahd_inb(ahd, SCSISIGI));
printf("SXFRCTL0 == 0x%x\n", ahd_inb(ahd, SXFRCTL0));
printf("SEQCTL0 == 0x%x\n", ahd_inb(ahd, SEQCTL0));
ahd_dump_card_state(ahd);
ahd->msgout_buf[0] = MSG_BUS_DEV_RESET;
ahd->msgout_len = 1;
ahd->msgout_index = 0;
ahd->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
ahd_outb(ahd, MSG_OUT, HOST_MSG);
ahd_assert_atn(ahd);
 1324                 break;
 1325         }
 1326         case PROTO_VIOLATION:
 1327         {
ahd_handle_proto_violation(ahd);
 1329                 break;
 1330         }
 1331         case IGN_WIDE_RES:
 1332         {
 1333                 struct ahd_devinfo devinfo;
ahd_fetch_devinfo(ahd, &devinfo);
ahd_handle_ign_wide_residue(ahd, &devinfo);
 1337                 break;
 1338         }
 1339         case BAD_PHASE:
 1340         {
u_int lastphase;
lastphase = ahd_inb(ahd, LASTPHASE);
printf("%s:%c:%d: unknown scsi bus phase %x, "
 1345                        "lastphase = 0x%x.  Attempting to continue\n",
ahd_name(ahd), 'A',
SCSIID_TARGET(ahd, ahd_inb(ahd, SAVED_SCSIID)),
lastphase, ahd_inb(ahd, SCSISIGI));
 1349                 break;
 1350         }
 1351         case MISSED_BUSFREE:
 1352         {
u_int lastphase;
lastphase = ahd_inb(ahd, LASTPHASE);
printf("%s:%c:%d: Missed busfree. "
 1357                        "Lastphase = 0x%x, Curphase = 0x%x\n",
ahd_name(ahd), 'A',
SCSIID_TARGET(ahd, ahd_inb(ahd, SAVED_SCSIID)),
lastphase, ahd_inb(ahd, SCSISIGI));
ahd_restart(ahd);
 1362                 return;
 1363         }
 1364         case DATA_OVERRUN:
 1365         {
 1366                 /*
 1367                  * When the sequencer detects an overrun, it
 1368                  * places the controller in "BITBUCKET" mode
 1369                  * and allows the target to complete its transfer.
 1370                  * Unfortunately, none of the counters get updated
 1371                  * when the controller is in this mode, so we have
 1372                  * no way of knowing how large the overrun was.
 1373                  */
 1374                 struct  scb *scb;
u_int   scbindex;
 1376 #ifdef AHD_DEBUG
u_int   lastphase;
 1378 #endif
scbindex = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scbindex);
 1382 #ifdef AHD_DEBUG
lastphase = ahd_inb(ahd, LASTPHASE);
 1384                 if ((ahd_debug & AHD_SHOW_RECOVERY) != 0) {
ahd_print_path(ahd, scb);
printf("data overrun detected %s.  Tag == 0x%x.\n",
ahd_lookup_phase_entry(lastphase)->phasemsg,
SCB_GET_TAG(scb));
ahd_print_path(ahd, scb);
printf("%s seen Data Phase.  Length = %ld.  "
 1391                                "NumSGs = %d.\n",
ahd_inb(ahd, SEQ_FLAGS) & DPHASE
 1393                                ? "Have" : "Haven't",
aic_get_transfer_length(scb), scb->sg_count);
ahd_dump_sglist(scb);
 1396                 }
 1397 #endif
 1399                 /*
 1400                  * Set this and it will take effect when the
 1401                  * target does a command complete.
 1402                  */
ahd_freeze_devq(ahd, scb);
aic_set_transaction_status(scb, CAM_DATA_RUN_ERR);
aic_freeze_scb(scb);
 1406                 break;
 1407         }
 1408         case MKMSG_FAILED:
 1409         {
 1410                 struct ahd_devinfo devinfo;
 1411                 struct scb *scb;
u_int scbid;
ahd_fetch_devinfo(ahd, &devinfo);
printf("%s:%c:%d:%d: Attempt to issue message failed\n",
ahd_name(ahd), devinfo.channel, devinfo.target,
devinfo.lun);
scbid = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scbid);
 1420                 if (scb != NULL)
 1421                         /*
 1422                          * Ensure that we didn't put a second instance of this
 1423                          * SCB into the QINFIFO.
 1424                          */
ahd_search_qinfifo(ahd, SCB_GET_TARGET(ahd, scb),
SCB_GET_CHANNEL(ahd, scb),
SCB_GET_LUN(scb), SCB_GET_TAG(scb),
ROLE_INITIATOR, /*status*/0,
SEARCH_REMOVE);
ahd_outb(ahd, SCB_CONTROL,
ahd_inb_scbram(ahd, SCB_CONTROL) & ~MK_MESSAGE);
 1432                 break;
 1433         }
 1434         case TASKMGMT_FUNC_COMPLETE:
 1435         {
u_int   scbid;
 1437                 struct  scb *scb;
scbid = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scbid);
 1441                 if (scb != NULL) {
u_int      lun;
u_int      tag;
cam_status error;
ahd_print_path(ahd, scb);
printf("Task Management Func 0x%x Complete\n",
scb->hscb->task_management);
lun = CAM_LUN_WILDCARD;
tag = SCB_LIST_NULL;
 1452                         switch (scb->hscb->task_management) {
 1453                         case SIU_TASKMGMT_ABORT_TASK:
tag = SCB_GET_TAG(scb);
 1455                         case SIU_TASKMGMT_ABORT_TASK_SET:
 1456                         case SIU_TASKMGMT_CLEAR_TASK_SET:
lun = scb->hscb->lun;
error = CAM_REQ_ABORTED;
ahd_abort_scbs(ahd, SCB_GET_TARGET(ahd, scb),
 1460                                                'A', lun, tag, ROLE_INITIATOR,
error);
 1462                                 break;
 1463                         case SIU_TASKMGMT_LUN_RESET:
lun = scb->hscb->lun;
 1465                         case SIU_TASKMGMT_TARGET_RESET:
 1466                         {
 1467                                 struct ahd_devinfo devinfo;
ahd_scb_devinfo(ahd, &devinfo, scb);
error = CAM_BDR_SENT;
ahd_handle_devreset(ahd, &devinfo, lun,
CAM_BDR_SENT,
lun != CAM_LUN_WILDCARD
 1474                                                     ? "Lun Reset"
 1475                                                     : "Target Reset",
 1476                                                     /*verbose_level*/0);
 1477                                 break;
 1478                         }
 1479                         default:
panic("Unexpected TaskMgmt Func");
 1481                                 break;
 1482                         }
 1483                 }
 1484                 break;
 1485         }
 1486         case TASKMGMT_CMD_CMPLT_OKAY:
 1487         {
u_int   scbid;
 1489                 struct  scb *scb;
 1491                 /*
 1492                  * An ABORT TASK TMF failed to be delivered before
 1493                  * the targeted command completed normally.
 1494                  */
scbid = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scbid);
 1497                 if (scb != NULL) {
 1498                         /*
 1499                          * Remove the second instance of this SCB from
 1500                          * the QINFIFO if it is still there.
 1501                          */
ahd_print_path(ahd, scb);
printf("SCB completes before TMF\n");
 1504                         /*
 1505                          * Handle losing the race.  Wait until any
 1506                          * current selection completes.  We will then
 1507                          * set the TMF back to zero in this SCB so that
 1508                          * the sequencer doesn't bother to issue another
 1509                          * sequencer interrupt for its completion.
 1510                          */
 1511                         while ((ahd_inb(ahd, SCSISEQ0) & ENSELO) != 0
 1512                             && (ahd_inb(ahd, SSTAT0) & SELDO) == 0
 1513                             && (ahd_inb(ahd, SSTAT1) & SELTO) == 0)
 1514                                 ;
ahd_outb(ahd, SCB_TASK_MANAGEMENT, 0);
ahd_search_qinfifo(ahd, SCB_GET_TARGET(ahd, scb),
SCB_GET_CHANNEL(ahd, scb),  
SCB_GET_LUN(scb), SCB_GET_TAG(scb), 
ROLE_INITIATOR, /*status*/0,   
SEARCH_REMOVE);
 1521                 }
 1522                 break;
 1523         }
 1524         case TRACEPOINT0:
 1525         case TRACEPOINT1:
 1526         case TRACEPOINT2:
 1527         case TRACEPOINT3:
printf("%s: Tracepoint %d\n", ahd_name(ahd),
seqintcode - TRACEPOINT0);
 1530                 break;
 1531         case NO_SEQINT:
 1532                 break;
 1533         case SAW_HWERR:
ahd_handle_hwerrint(ahd);
 1535                 break;
 1536         default:
printf("%s: Unexpected SEQINTCODE %d\n", ahd_name(ahd),
seqintcode);
 1539                 break;
 1540         }
 1541         /*
 1542          *  The sequencer is paused immediately on
 1543          *  a SEQINT, so we should restart it when
 1544          *  we're done.
 1545          */
ahd_unpause(ahd);
 1547 }
 1549 void
ahd_handle_scsiint(struct ahd_softc *ahd, u_int intstat)
 1551 {
 1552         struct scb      *scb;
u_int            status0;
u_int            status3;
u_int            status;
u_int            lqistat1;
u_int            lqostat0;
u_int            scbid;
u_int            busfreetime;
ahd_update_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
status3 = ahd_inb(ahd, SSTAT3) & (NTRAMPERR|OSRAMPERR);
status0 = ahd_inb(ahd, SSTAT0) & (IOERR|OVERRUN|SELDI|SELDO);
status = ahd_inb(ahd, SSTAT1) & (SELTO|SCSIRSTI|BUSFREE|SCSIPERR);
lqistat1 = ahd_inb(ahd, LQISTAT1);
lqostat0 = ahd_inb(ahd, LQOSTAT0);
busfreetime = ahd_inb(ahd, SSTAT2) & BUSFREETIME;
 1570         if ((status0 & (SELDI|SELDO)) != 0) {
u_int simode0;
ahd_set_modes(ahd, AHD_MODE_CFG, AHD_MODE_CFG);
simode0 = ahd_inb(ahd, SIMODE0);
status0 &= simode0 & (IOERR|OVERRUN|SELDI|SELDO);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
 1577         }
scbid = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scbid);
 1580         if (scb != NULL
 1581          && (ahd_inb(ahd, SEQ_FLAGS) & NOT_IDENTIFIED) != 0)
scb = NULL;
 1584         if ((status0 & IOERR) != 0) {
u_int now_lvd;
now_lvd = ahd_inb(ahd, SBLKCTL) & ENAB40;
printf("%s: Transceiver State Has Changed to %s mode\n",
ahd_name(ahd), now_lvd ? "LVD" : "SE");
ahd_outb(ahd, CLRSINT0, CLRIOERR);
 1591                 /*
 1592                  * A change in I/O mode is equivalent to a bus reset.
 1593                  */
ahd_reset_channel(ahd, 'A', /*Initiate Reset*/TRUE);
ahd_pause(ahd);
ahd_setup_iocell_workaround(ahd);
ahd_unpause(ahd);
 1598         } else if ((status0 & OVERRUN) != 0) {
printf("%s: SCSI offset overrun detected.  Resetting bus.\n",
ahd_name(ahd));
ahd_reset_channel(ahd, 'A', /*Initiate Reset*/TRUE);
 1603         } else if ((status & SCSIRSTI) != 0) {
printf("%s: Someone reset channel A\n", ahd_name(ahd));
ahd_reset_channel(ahd, 'A', /*Initiate Reset*/FALSE);
 1607         } else if ((status & SCSIPERR) != 0) {
 1609                 /* Make sure the sequencer is in a safe location. */
ahd_clear_critical_section(ahd);
ahd_handle_transmission_error(ahd);
 1613         } else if (lqostat0 != 0) {
printf("%s: lqostat0 == 0x%x!\n", ahd_name(ahd), lqostat0);
ahd_outb(ahd, CLRLQOINT0, lqostat0);
 1617                 if ((ahd->bugs & AHD_CLRLQO_AUTOCLR_BUG) != 0)
ahd_outb(ahd, CLRLQOINT1, 0);
 1619         } else if ((status & SELTO) != 0) {
u_int  scbid;
 1622                 /* Stop the selection */
ahd_outb(ahd, SCSISEQ0, 0);
 1625                 /* Make sure the sequencer is in a safe location. */
ahd_clear_critical_section(ahd);
 1628                 /* No more pending messages */
ahd_clear_msg_state(ahd);
 1631                 /* Clear interrupt state */
ahd_outb(ahd, CLRSINT1, CLRSELTIMEO|CLRBUSFREE|CLRSCSIPERR);
 1634                 /*
 1635                  * Although the driver does not care about the
 1636                  * 'Selection in Progress' status bit, the busy
 1637                  * LED does.  SELINGO is only cleared by a sucessfull
 1638                  * selection, so we must manually clear it to insure
 1639                  * the LED turns off just incase no future successful
 1640                  * selections occur (e.g. no devices on the bus).
 1641                  */
ahd_outb(ahd, CLRSINT0, CLRSELINGO);
scbid = ahd_inw(ahd, WAITING_TID_HEAD);
scb = ahd_lookup_scb(ahd, scbid);
 1646                 if (scb == NULL) {
printf("%s: ahd_intr - referenced scb not "
 1648                                "valid during SELTO scb(0x%x)\n",
ahd_name(ahd), scbid);
ahd_dump_card_state(ahd);
 1651                 } else {
 1652                         struct ahd_devinfo devinfo;
 1653 #ifdef AHD_DEBUG
 1654                         if ((ahd_debug & AHD_SHOW_SELTO) != 0) {
ahd_print_path(ahd, scb);
printf("Saw Selection Timeout for SCB 0x%x\n",
scbid);
 1658                         }
 1659 #endif
ahd_scb_devinfo(ahd, &devinfo, scb);
aic_set_transaction_status(scb, CAM_SEL_TIMEOUT);
ahd_freeze_devq(ahd, scb);
 1664                         /*
 1665                          * Cancel any pending transactions on the device
 1666                          * now that it seems to be missing.  This will
 1667                          * also revert us to async/narrow transfers until
 1668                          * we can renegotiate with the device.
 1669                          */
ahd_handle_devreset(ahd, &devinfo,
CAM_LUN_WILDCARD,
CAM_SEL_TIMEOUT,
 1673                                             "Selection Timeout",
 1674                                             /*verbose_level*/1);
 1675                 }
ahd_outb(ahd, CLRINT, CLRSCSIINT);
ahd_iocell_first_selection(ahd);
ahd_unpause(ahd);
 1679         } else if ((status0 & (SELDI|SELDO)) != 0) {
ahd_iocell_first_selection(ahd);
ahd_unpause(ahd);
 1683         } else if (status3 != 0) {
printf("%s: SCSI Cell parity error SSTAT3 == 0x%x\n",
ahd_name(ahd), status3);
ahd_outb(ahd, CLRSINT3, status3);
 1687         } else if ((lqistat1 & (LQIPHASE_LQ|LQIPHASE_NLQ)) != 0) {
 1689                 /* Make sure the sequencer is in a safe location. */
ahd_clear_critical_section(ahd);
ahd_handle_lqiphase_error(ahd, lqistat1);
 1693         } else if ((lqistat1 & LQICRCI_NLQ) != 0) {
 1694                 /*
 1695                  * This status can be delayed during some
 1696                  * streaming operations.  The SCSIPHASE
 1697                  * handler has already dealt with this case
 1698                  * so just clear the error.
 1699                  */
ahd_outb(ahd, CLRLQIINT1, CLRLQICRCI_NLQ);
 1701         } else if ((status & BUSFREE) != 0
 1702                 || (lqistat1 & LQOBUSFREE) != 0) {
u_int lqostat1;
 1704                 int   restart;
 1705                 int   clear_fifo;
 1706                 int   packetized;
u_int mode;
 1709                 /*
 1710                  * Clear our selection hardware as soon as possible.
 1711                  * We may have an entry in the waiting Q for this target,
 1712                  * that is affected by this busfree and we don't want to
 1713                  * go about selecting the target while we handle the event.
 1714                  */
ahd_outb(ahd, SCSISEQ0, 0);
 1717                 /* Make sure the sequencer is in a safe location. */
ahd_clear_critical_section(ahd);
 1720                 /*
 1721                  * Determine what we were up to at the time of
 1722                  * the busfree.
 1723                  */
mode = AHD_MODE_SCSI;
busfreetime = ahd_inb(ahd, SSTAT2) & BUSFREETIME;
lqostat1 = ahd_inb(ahd, LQOSTAT1);
 1727                 switch (busfreetime) {
 1728                 case BUSFREE_DFF0:
 1729                 case BUSFREE_DFF1:
 1730                 {
u_int   scbid;
 1732                         struct  scb *scb;
mode = busfreetime == BUSFREE_DFF0
 1735                              ? AHD_MODE_DFF0 : AHD_MODE_DFF1;
ahd_set_modes(ahd, mode, mode);
scbid = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scbid);
 1739                         if (scb == NULL) {
printf("%s: Invalid SCB %d in DFF%d "
 1741                                        "during unexpected busfree\n",
ahd_name(ahd), scbid, mode);
packetized = 0;
 1744                         } else
packetized = (scb->flags & SCB_PACKETIZED) != 0;
clear_fifo = 1;
 1747                         break;
 1748                 }
 1749                 case BUSFREE_LQO:
clear_fifo = 0;
packetized = 1;
 1752                         break;
 1753                 default:
clear_fifo = 0;
packetized =  (lqostat1 & LQOBUSFREE) != 0;
 1756                         if (!packetized
 1757                          && ahd_inb(ahd, LASTPHASE) == P_BUSFREE
 1758                          && (ahd_inb(ahd, SSTAT0) & SELDI) == 0
 1759                          && ((ahd_inb(ahd, SSTAT0) & SELDO) == 0
 1760                           || (ahd_inb(ahd, SCSISEQ0) & ENSELO) == 0))
 1761                                 /*
 1762                                  * Assume packetized if we are not
 1763                                  * on the bus in a non-packetized
 1764                                  * capacity and any pending selection
 1765                                  * was a packetized selection.
 1766                                  */
packetized = 1;
 1768                         break;
 1769                 }
 1771 #ifdef AHD_DEBUG
 1772                 if ((ahd_debug & AHD_SHOW_MISC) != 0)
printf("Saw Busfree.  Busfreetime = 0x%x.\n",
busfreetime);
 1775 #endif
 1776                 /*
 1777                  * Busfrees that occur in non-packetized phases are
 1778                  * handled by the nonpkt_busfree handler.
 1779                  */
 1780                 if (packetized && ahd_inb(ahd, LASTPHASE) == P_BUSFREE) {
restart = ahd_handle_pkt_busfree(ahd, busfreetime);
 1782                 } else {
packetized = 0;
restart = ahd_handle_nonpkt_busfree(ahd);
 1785                 }
 1786                 /*
 1787                  * Clear the busfree interrupt status.  The setting of
 1788                  * the interrupt is a pulse, so in a perfect world, we
 1789                  * would not need to muck with the ENBUSFREE logic.  This
 1790                  * would ensure that if the bus moves on to another
 1791                  * connection, busfree protection is still in force.  If
 1792                  * BUSFREEREV is broken, however, we must manually clear
 1793                  * the ENBUSFREE if the busfree occurred during a non-pack
 1794                  * connection so that we don't get false positives during
 1795                  * future, packetized, connections.
 1796                  */
ahd_outb(ahd, CLRSINT1, CLRBUSFREE);
 1798                 if (packetized == 0
 1799                  && (ahd->bugs & AHD_BUSFREEREV_BUG) != 0)
ahd_outb(ahd, SIMODE1,
ahd_inb(ahd, SIMODE1) & ~ENBUSFREE);
 1803                 if (clear_fifo)
ahd_clear_fifo(ahd, mode);
ahd_clear_msg_state(ahd);
ahd_outb(ahd, CLRINT, CLRSCSIINT);
 1808                 if (restart) {
ahd_restart(ahd);
 1810                 } else {
ahd_unpause(ahd);
 1812                 }
 1813         } else {
printf("%s: Missing case in ahd_handle_scsiint. status = %x\n",
ahd_name(ahd), status);
ahd_dump_card_state(ahd);
ahd_clear_intstat(ahd);
ahd_unpause(ahd);
 1819         }
 1820 }
 1822 void
ahd_handle_transmission_error(struct ahd_softc *ahd)
 1824 {
 1825         struct  scb *scb;
u_int   scbid;
u_int   lqistat1;
u_int   lqistat2;
u_int   msg_out;
u_int   curphase;
u_int   lastphase;
u_int   perrdiag;
u_int   cur_col;
 1834         int     silent;
scb = NULL;
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
lqistat1 = ahd_inb(ahd, LQISTAT1) & ~(LQIPHASE_LQ|LQIPHASE_NLQ);
lqistat2 = ahd_inb(ahd, LQISTAT2);
 1840         if ((lqistat1 & (LQICRCI_NLQ|LQICRCI_LQ)) == 0
 1841          && (ahd->bugs & AHD_NLQICRC_DELAYED_BUG) != 0) {
u_int lqistate;
ahd_set_modes(ahd, AHD_MODE_CFG, AHD_MODE_CFG);
lqistate = ahd_inb(ahd, LQISTATE);
 1846                 if ((lqistate >= 0x1E && lqistate <= 0x24)
 1847                  || (lqistate == 0x29)) {
 1848 #ifdef AHD_DEBUG
 1849                         if ((ahd_debug & AHD_SHOW_RECOVERY) != 0) {
printf("%s: NLQCRC found via LQISTATE\n",
ahd_name(ahd));
 1852                         }
 1853 #endif
lqistat1 |= LQICRCI_NLQ;
 1855                 }
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
 1857         }
ahd_outb(ahd, CLRLQIINT1, lqistat1);
lastphase = ahd_inb(ahd, LASTPHASE);
curphase = ahd_inb(ahd, SCSISIGI) & PHASE_MASK;
perrdiag = ahd_inb(ahd, PERRDIAG);
msg_out = MSG_INITIATOR_DET_ERR;
ahd_outb(ahd, CLRSINT1, CLRSCSIPERR);
 1866         /*
 1867          * Try to find the SCB associated with this error.
 1868          */
silent = FALSE;
 1870         if (lqistat1 == 0
 1871          || (lqistat1 & LQICRCI_NLQ) != 0) {
 1872                 if ((lqistat1 & (LQICRCI_NLQ|LQIOVERI_NLQ)) != 0)
ahd_set_active_fifo(ahd);
scbid = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scbid);
 1876                 if (scb != NULL && SCB_IS_SILENT(scb))
silent = TRUE;
 1878         }
cur_col = 0;
 1881         if (silent == FALSE) {
printf("%s: Transmission error detected\n", ahd_name(ahd));
ahd_lqistat1_print(lqistat1, &cur_col, 50);
ahd_lastphase_print(lastphase, &cur_col, 50);
ahd_scsisigi_print(curphase, &cur_col, 50);
ahd_perrdiag_print(perrdiag, &cur_col, 50);
printf("\n");
ahd_dump_card_state(ahd);
 1889         }
 1891         if ((lqistat1 & (LQIOVERI_LQ|LQIOVERI_NLQ)) != 0) {
 1892                 if (silent == FALSE) {
printf("%s: Gross protocol error during incoming "
 1894                                "packet.  lqistat1 == 0x%x.  Resetting bus.\n",
ahd_name(ahd), lqistat1);
 1896                 }
ahd_reset_channel(ahd, 'A', /*Initiate Reset*/TRUE);
 1898                 return;
 1899         } else if ((lqistat1 & LQICRCI_LQ) != 0) {
 1900                 /*
 1901                  * A CRC error has been detected on an incoming LQ.
 1902                  * The bus is currently hung on the last ACK.
 1903                  * Hit LQIRETRY to release the last ack, and
 1904                  * wait for the sequencer to determine that ATNO
 1905                  * is asserted while in message out to take us
 1906                  * to our host message loop.  No NONPACKREQ or
 1907                  * LQIPHASE type errors will occur in this
 1908                  * scenario.  After this first LQIRETRY, the LQI
 1909                  * manager will be in ISELO where it will
 1910                  * happily sit until another packet phase begins.
 1911                  * Unexpected bus free detection is enabled
 1912                  * through any phases that occur after we release
 1913                  * this last ack until the LQI manager sees a
 1914                  * packet phase.  This implies we may have to
 1915                  * ignore a perfectly valid "unexpected busfree"
 1916                  * after our "initiator detected error" message is
 1917                  * sent.  A busfree is the expected response after
 1918                  * we tell the target that its L_Q was corrupted.
 1919                  * (SPI4R09 10.7.3.3.3)
 1920                  */
ahd_outb(ahd, LQCTL2, LQIRETRY);
printf("LQIRetry for LQICRCI_LQ to release ACK\n");
 1923         } else if ((lqistat1 & LQICRCI_NLQ) != 0) {
 1924                 /*
 1925                  * We detected a CRC error in a NON-LQ packet.
 1926                  * The hardware has varying behavior in this situation
 1927                  * depending on whether this packet was part of a
 1928                  * stream or not.
 1929                  *
 1930                  * PKT by PKT mode:
 1931                  * The hardware has already acked the complete packet.
 1932                  * If the target honors our outstanding ATN condition,
 1933                  * we should be (or soon will be) in MSGOUT phase.
 1934                  * This will trigger the LQIPHASE_LQ status bit as the
 1935                  * hardware was expecting another LQ.  Unexpected
 1936                  * busfree detection is enabled.  Once LQIPHASE_LQ is
 1937                  * true (first entry into host message loop is much
 1938                  * the same), we must clear LQIPHASE_LQ and hit
 1939                  * LQIRETRY so the hardware is ready to handle
 1940                  * a future LQ.  NONPACKREQ will not be asserted again
 1941                  * once we hit LQIRETRY until another packet is
 1942                  * processed.  The target may either go busfree
 1943                  * or start another packet in response to our message.
 1944                  *
 1945                  * Read Streaming P0 asserted:
 1946                  * If we raise ATN and the target completes the entire
 1947                  * stream (P0 asserted during the last packet), the
 1948                  * hardware will ack all data and return to the ISTART
 1949                  * state.  When the target reponds to our ATN condition,
 1950                  * LQIPHASE_LQ will be asserted.  We should respond to
 1951                  * this with an LQIRETRY to prepare for any future
 1952                  * packets.  NONPACKREQ will not be asserted again
 1953                  * once we hit LQIRETRY until another packet is
 1954                  * processed.  The target may either go busfree or
 1955                  * start another packet in response to our message.
 1956                  * Busfree detection is enabled.
 1957                  *
 1958                  * Read Streaming P0 not asserted:
 1959                  * If we raise ATN and the target transitions to
 1960                  * MSGOUT in or after a packet where P0 is not
 1961                  * asserted, the hardware will assert LQIPHASE_NLQ.
 1962                  * We should respond to the LQIPHASE_NLQ with an
 1963                  * LQIRETRY.  Should the target stay in a non-pkt
 1964                  * phase after we send our message, the hardware
 1965                  * will assert LQIPHASE_LQ.  Recovery is then just as
 1966                  * listed above for the read streaming with P0 asserted.
 1967                  * Busfree detection is enabled.
 1968                  */
 1969                 if (silent == FALSE)
printf("LQICRC_NLQ\n");
 1971                 if (scb == NULL) {
printf("%s: No SCB valid for LQICRC_NLQ.  "
 1973                                "Resetting bus\n", ahd_name(ahd));
ahd_reset_channel(ahd, 'A', /*Initiate Reset*/TRUE);
 1975                         return;
 1976                 }
 1977         } else if ((lqistat1 & LQIBADLQI) != 0) {
printf("Need to handle BADLQI!\n");
ahd_reset_channel(ahd, 'A', /*Initiate Reset*/TRUE);
 1980                 return;
 1981         } else if ((perrdiag & (PARITYERR|PREVPHASE)) == PARITYERR) {
 1982                 if ((curphase & ~P_DATAIN_DT) != 0) {
 1983                         /* Ack the byte.  So we can continue. */
 1984                         if (silent == FALSE)
printf("Acking %s to clear perror\n",
ahd_lookup_phase_entry(curphase)->phasemsg);
ahd_inb(ahd, SCSIDAT);
 1988                 }
 1990                 if (curphase == P_MESGIN)
msg_out = MSG_PARITY_ERROR;
 1992         }
 1994         /*
 1995          * We've set the hardware to assert ATN if we 
 1996          * get a parity error on "in" phases, so all we
 1997          * need to do is stuff the message buffer with
 1998          * the appropriate message.  "In" phases have set
 1999          * mesg_out to something other than MSG_NOP.
 2000          */
ahd->send_msg_perror = msg_out;
 2002         if (scb != NULL && msg_out == MSG_INITIATOR_DET_ERR)
scb->flags |= SCB_TRANSMISSION_ERROR;
ahd_outb(ahd, MSG_OUT, HOST_MSG);
ahd_outb(ahd, CLRINT, CLRSCSIINT);
ahd_unpause(ahd);
 2007 }
 2009 void
ahd_handle_lqiphase_error(struct ahd_softc *ahd, u_int lqistat1)
 2011 {
 2012         /*
 2013          * Clear the sources of the interrupts.
 2014          */
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
ahd_outb(ahd, CLRLQIINT1, lqistat1);
 2018         /*
 2019          * If the "illegal" phase changes were in response
 2020          * to our ATN to flag a CRC error, AND we ended up
 2021          * on packet boundaries, clear the error, restart the
 2022          * LQI manager as appropriate, and go on our merry
 2023          * way toward sending the message.  Otherwise, reset
 2024          * the bus to clear the error.
 2025          */
ahd_set_active_fifo(ahd);
 2027         if ((ahd_inb(ahd, SCSISIGO) & ATNO) != 0
 2028          && (ahd_inb(ahd, MDFFSTAT) & DLZERO) != 0) {
 2029                 if ((lqistat1 & LQIPHASE_LQ) != 0) {
printf("LQIRETRY for LQIPHASE_LQ\n");
ahd_outb(ahd, LQCTL2, LQIRETRY);
 2032                 } else if ((lqistat1 & LQIPHASE_NLQ) != 0) {
printf("LQIRETRY for LQIPHASE_NLQ\n");
ahd_outb(ahd, LQCTL2, LQIRETRY);
 2035                 } else
panic("ahd_handle_lqiphase_error: No phase errors");
ahd_dump_card_state(ahd);
ahd_outb(ahd, CLRINT, CLRSCSIINT);
ahd_unpause(ahd);
 2040         } else {
printf("Reseting Channel for LQI Phase error\n");
ahd_dump_card_state(ahd);
ahd_reset_channel(ahd, 'A', /*Initiate Reset*/TRUE);
 2044         }
 2045 }
 2047 /*
 2048  * Packetized unexpected or expected busfree.
 2049  * Entered in mode based on busfreetime.
 2050  */
 2051 int
ahd_handle_pkt_busfree(struct ahd_softc *ahd, u_int busfreetime)
 2053 {
u_int lqostat1;
AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK),
 2057                          ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK));
lqostat1 = ahd_inb(ahd, LQOSTAT1);
 2059         if ((lqostat1 & LQOBUSFREE) != 0) {
 2060                 struct scb *scb;
u_int scbid;
u_int saved_scbptr;
u_int waiting_h;
u_int waiting_t;
u_int next;
 2067                 /*
 2068                  * The LQO manager detected an unexpected busfree
 2069                  * either:
 2070                  *
 2071                  * 1) During an outgoing LQ.
 2072                  * 2) After an outgoing LQ but before the first
 2073                  *    REQ of the command packet.
 2074                  * 3) During an outgoing command packet.
 2075                  *
 2076                  * In all cases, CURRSCB is pointing to the
 2077                  * SCB that encountered the failure.  Clean
 2078                  * up the queue, clear SELDO and LQOBUSFREE,
 2079                  * and allow the sequencer to restart the select
 2080                  * out at its lesure.
 2081                  */
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
scbid = ahd_inw(ahd, CURRSCB);
scb = ahd_lookup_scb(ahd, scbid);
 2085                 if (scb == NULL)
panic("SCB not valid during LQOBUSFREE");
 2087                 /*
 2088                  * Clear the status.
 2089                  */
ahd_outb(ahd, CLRLQOINT1, CLRLQOBUSFREE);
 2091                 if ((ahd->bugs & AHD_CLRLQO_AUTOCLR_BUG) != 0)
ahd_outb(ahd, CLRLQOINT1, 0);
ahd_outb(ahd, SCSISEQ0, ahd_inb(ahd, SCSISEQ0) & ~ENSELO);
ahd_flush_device_writes(ahd);
ahd_outb(ahd, CLRSINT0, CLRSELDO);
 2097                 /*
 2098                  * Return the LQO manager to its idle loop.  It will
 2099                  * not do this automatically if the busfree occurs
 2100                  * after the first REQ of either the LQ or command
 2101                  * packet or between the LQ and command packet.
 2102                  */
ahd_outb(ahd, LQCTL2, ahd_inb(ahd, LQCTL2) | LQOTOIDLE);
 2105                 /*
 2106                  * Update the waiting for selection queue so
 2107                  * we restart on the correct SCB.
 2108                  */
waiting_h = ahd_inw(ahd, WAITING_TID_HEAD);
saved_scbptr = ahd_get_scbptr(ahd);
 2111                 if (waiting_h != scbid) {
ahd_outw(ahd, WAITING_TID_HEAD, scbid);
waiting_t = ahd_inw(ahd, WAITING_TID_TAIL);
 2115                         if (waiting_t == waiting_h) {
ahd_outw(ahd, WAITING_TID_TAIL, scbid);
next = SCB_LIST_NULL;
 2118                         } else {
ahd_set_scbptr(ahd, waiting_h);
next = ahd_inw_scbram(ahd, SCB_NEXT2);
 2121                         }
ahd_set_scbptr(ahd, scbid);
ahd_outw(ahd, SCB_NEXT2, next);
 2124                 }
ahd_set_scbptr(ahd, saved_scbptr);
 2126                 if (scb->crc_retry_count < AHD_MAX_LQ_CRC_ERRORS) {
 2127                         if (SCB_IS_SILENT(scb) == FALSE) {
ahd_print_path(ahd, scb);
printf("Probable outgoing LQ CRC error.  "
 2130                                        "Retrying command\n");
 2131                         }
scb->crc_retry_count++;
 2133                 } else {
aic_set_transaction_status(scb, CAM_UNCOR_PARITY);
aic_freeze_scb(scb);
ahd_freeze_devq(ahd, scb);
 2137                 }
 2138                 /* Return unpausing the sequencer. */
 2139                 return (0);
 2140         } else if ((ahd_inb(ahd, PERRDIAG) & PARITYERR) != 0) {
 2141                 /*
 2142                  * Ignore what are really parity errors that
 2143                  * occur on the last REQ of a free running
 2144                  * clock prior to going busfree.  Some drives
 2145                  * do not properly active negate just before
 2146                  * going busfree resulting in a parity glitch.
 2147                  */
ahd_outb(ahd, CLRSINT1, CLRSCSIPERR|CLRBUSFREE);
 2149 #ifdef AHD_DEBUG
 2150                 if ((ahd_debug & AHD_SHOW_MASKED_ERRORS) != 0)
printf("%s: Parity on last REQ detected "
 2152                                "during busfree phase.\n",
ahd_name(ahd));
 2154 #endif
 2155                 /* Return unpausing the sequencer. */
 2156                 return (0);
 2157         }
 2158         if (ahd->src_mode != AHD_MODE_SCSI) {
u_int   scbid;
 2160                 struct  scb *scb;
scbid = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scbid);
ahd_print_path(ahd, scb);
printf("Unexpected PKT busfree condition\n");
ahd_dump_card_state(ahd);
ahd_abort_scbs(ahd, SCB_GET_TARGET(ahd, scb), 'A',
SCB_GET_LUN(scb), SCB_GET_TAG(scb),
ROLE_INITIATOR, CAM_UNEXP_BUSFREE);
 2171                 /* Return restarting the sequencer. */
 2172                 return (1);
 2173         }
printf("%s: Unexpected PKT busfree condition\n", ahd_name(ahd));
ahd_dump_card_state(ahd);
 2176         /* Restart the sequencer. */
 2177         return (1);
 2178 }
 2180 /*
 2181  * Non-packetized unexpected or expected busfree.
 2182  */
 2183 int
ahd_handle_nonpkt_busfree(struct ahd_softc *ahd)
 2185 {
 2186         struct  ahd_devinfo devinfo;
 2187         struct  scb *scb;
u_int   lastphase;
u_int   saved_scsiid;
u_int   saved_lun;
u_int   target;
u_int   initiator_role_id;
u_int   scbid;
u_int   ppr_busfree;
 2195         int     printerror;
 2197         /*
 2198          * Look at what phase we were last in.  If its message out,
 2199          * chances are pretty good that the busfree was in response
 2200          * to one of our abort requests.
 2201          */
lastphase = ahd_inb(ahd, LASTPHASE);
saved_scsiid = ahd_inb(ahd, SAVED_SCSIID);
saved_lun = ahd_inb(ahd, SAVED_LUN);
target = SCSIID_TARGET(ahd, saved_scsiid);
initiator_role_id = SCSIID_OUR_ID(saved_scsiid);
ahd_compile_devinfo(&devinfo, initiator_role_id,
target, saved_lun, 'A', ROLE_INITIATOR);
printerror = 1;
scbid = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scbid);
 2213         if (scb != NULL
 2214          && (ahd_inb(ahd, SEQ_FLAGS) & NOT_IDENTIFIED) != 0)
scb = NULL;
ppr_busfree = (ahd->msg_flags & MSG_FLAG_EXPECT_PPR_BUSFREE) != 0;
 2218         if (lastphase == P_MESGOUT) {
u_int tag;
tag = SCB_LIST_NULL;
 2222                 if (ahd_sent_msg(ahd, AHDMSG_1B, MSG_ABORT_TAG, TRUE)
 2223                  || ahd_sent_msg(ahd, AHDMSG_1B, MSG_ABORT, TRUE)) {
 2224                         int found;
 2225                         int sent_msg;
 2227                         if (scb == NULL) {
ahd_print_devinfo(ahd, &devinfo);
printf("Abort for unidentified "
 2230                                        "connection completed.\n");
 2231                                 /* restart the sequencer. */
 2232                                 return (1);
 2233                         }
sent_msg = ahd->msgout_buf[ahd->msgout_index - 1];
ahd_print_path(ahd, scb);
printf("SCB %d - Abort%s Completed.\n",
SCB_GET_TAG(scb),
sent_msg == MSG_ABORT_TAG ? "" : " Tag");
 2240                         if (sent_msg == MSG_ABORT_TAG)
tag = SCB_GET_TAG(scb);
 2243                         if ((scb->flags & SCB_CMDPHASE_ABORT) != 0) {
 2244                                 /*
 2245                                  * This abort is in response to an
 2246                                  * unexpected switch to command phase
 2247                                  * for a packetized connection.  Since
 2248                                  * the identify message was never sent,
 2249                                  * "saved lun" is 0.  We really want to
 2250                                  * abort only the SCB that encountered
 2251                                  * this error, which could have a different
 2252                                  * lun.  The SCB will be retried so the OS
 2253                                  * will see the UA after renegotiating to
 2254                                  * packetized.
 2255                                  */
tag = SCB_GET_TAG(scb);
saved_lun = scb->hscb->lun;
 2258                         }
found = ahd_abort_scbs(ahd, target, 'A', saved_lun,
tag, ROLE_INITIATOR,
CAM_REQ_ABORTED);
printf("found == 0x%x\n", found);
printerror = 0;
 2264                 } else if (ahd_sent_msg(ahd, AHDMSG_1B,
MSG_BUS_DEV_RESET, TRUE)) {
 2266 #ifdef __FreeBSD__
 2267                         /*
 2268                          * Don't mark the user's request for this BDR
 2269                          * as completing with CAM_BDR_SENT.  CAM3
 2270                          * specifies CAM_REQ_CMP.
 2271                          */
 2272                         if (scb != NULL
 2273                          && scb->io_ctx->ccb_h.func_code== XPT_RESET_DEV
 2274                          && ahd_match_scb(ahd, scb, target, 'A',
CAM_LUN_WILDCARD, SCB_LIST_NULL,
ROLE_INITIATOR))
aic_set_transaction_status(scb, CAM_REQ_CMP);
 2278 #endif
ahd_handle_devreset(ahd, &devinfo, CAM_LUN_WILDCARD,
CAM_BDR_SENT, "Bus Device Reset",
 2281                                             /*verbose_level*/0);
printerror = 0;
 2283                 } else if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_PPR, FALSE)
 2284                         && ppr_busfree == 0) {
 2285                         struct ahd_initiator_tinfo *tinfo;
 2286                         struct ahd_tmode_tstate *tstate;
 2288                         /*
 2289                          * PPR Rejected.
 2290                          *
 2291                          * If the previous negotiation was packetized,
 2292                          * this could be because the device has been
 2293                          * reset without our knowledge.  Force our
 2294                          * current negotiation to async and retry the
 2295                          * negotiation.  Otherwise retry the command
 2296                          * with non-ppr negotiation.
 2297                          */
 2298 #ifdef AHD_DEBUG
 2299                         if ((ahd_debug & AHD_SHOW_MESSAGES) != 0)
printf("PPR negotiation rejected busfree.\n");
 2301 #endif
tinfo = ahd_fetch_transinfo(ahd, devinfo.channel,
devinfo.our_scsiid,
devinfo.target, &tstate);
 2305                         if ((tinfo->curr.ppr_options & MSG_EXT_PPR_IU_REQ)!=0) {
ahd_set_width(ahd, &devinfo,
MSG_EXT_WDTR_BUS_8_BIT,
AHD_TRANS_CUR,
 2309                                               /*paused*/TRUE);
ahd_set_syncrate(ahd, &devinfo,
 2311                                                 /*period*/0, /*offset*/0,
 2312                                                 /*ppr_options*/0,
AHD_TRANS_CUR,
 2314                                                 /*paused*/TRUE);
 2315                                 /*
 2316                                  * The expect PPR busfree handler below
 2317                                  * will effect the retry and necessary
 2318                                  * abort.
 2319                                  */
 2320                         } else {
tinfo->curr.transport_version = 2;
tinfo->goal.transport_version = 2;
tinfo->goal.ppr_options = 0;
 2324                                 /*
 2325                                  * Remove any SCBs in the waiting for selection
 2326                                  * queue that may also be for this target so
 2327                                  * that command ordering is preserved.
 2328                                  */
ahd_freeze_devq(ahd, scb);
ahd_qinfifo_requeue_tail(ahd, scb);
printerror = 0;
 2332                         }
 2333                 } else if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_WDTR, FALSE)
 2334                         && ppr_busfree == 0) {
 2335                         /*
 2336                          * Negotiation Rejected.  Go-narrow and
 2337                          * retry command.
 2338                          */
 2339 #ifdef AHD_DEBUG
 2340                         if ((ahd_debug & AHD_SHOW_MESSAGES) != 0)
printf("WDTR negotiation rejected busfree.\n");
 2342 #endif
ahd_set_width(ahd, &devinfo,
MSG_EXT_WDTR_BUS_8_BIT,
AHD_TRANS_CUR|AHD_TRANS_GOAL,
 2346                                       /*paused*/TRUE);
 2347                         /*
 2348                          * Remove any SCBs in the waiting for selection
 2349                          * queue that may also be for this target so that
 2350                          * command ordering is preserved.
 2351                          */
ahd_freeze_devq(ahd, scb);
ahd_qinfifo_requeue_tail(ahd, scb);
printerror = 0;
 2355                 } else if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_SDTR, FALSE)
 2356                         && ppr_busfree == 0) {
 2357                         /*
 2358                          * Negotiation Rejected.  Go-async and
 2359                          * retry command.
 2360                          */
 2361 #ifdef AHD_DEBUG
 2362                         if ((ahd_debug & AHD_SHOW_MESSAGES) != 0)
printf("SDTR negotiation rejected busfree.\n");
 2364 #endif
ahd_set_syncrate(ahd, &devinfo,
 2366                                         /*period*/0, /*offset*/0,
 2367                                         /*ppr_options*/0,
AHD_TRANS_CUR|AHD_TRANS_GOAL,
 2369                                         /*paused*/TRUE);
 2370                         /*
 2371                          * Remove any SCBs in the waiting for selection
 2372                          * queue that may also be for this target so that
 2373                          * command ordering is preserved.
 2374                          */
ahd_freeze_devq(ahd, scb);
ahd_qinfifo_requeue_tail(ahd, scb);
printerror = 0;
 2378                 } else if ((ahd->msg_flags & MSG_FLAG_EXPECT_IDE_BUSFREE) != 0
 2379                         && ahd_sent_msg(ahd, AHDMSG_1B,
MSG_INITIATOR_DET_ERR, TRUE)) {
 2382 #ifdef AHD_DEBUG
 2383                         if ((ahd_debug & AHD_SHOW_MESSAGES) != 0)
printf("Expected IDE Busfree\n");
 2385 #endif
printerror = 0;
 2387                 } else if ((ahd->msg_flags & MSG_FLAG_EXPECT_QASREJ_BUSFREE)
 2388                         && ahd_sent_msg(ahd, AHDMSG_1B,
MSG_MESSAGE_REJECT, TRUE)) {
 2391 #ifdef AHD_DEBUG
 2392                         if ((ahd_debug & AHD_SHOW_MESSAGES) != 0)
printf("Expected QAS Reject Busfree\n");
 2394 #endif
printerror = 0;
 2396                 }
 2397         }
 2399         /*
 2400          * The busfree required flag is honored at the end of
 2401          * the message phases.  We check it last in case we
 2402          * had to send some other message that caused a busfree.
 2403          */
 2404         if (printerror != 0
 2405          && (lastphase == P_MESGIN || lastphase == P_MESGOUT)
 2406          && ((ahd->msg_flags & MSG_FLAG_EXPECT_PPR_BUSFREE) != 0)) {
ahd_freeze_devq(ahd, scb);
aic_set_transaction_status(scb, CAM_REQUEUE_REQ);
aic_freeze_scb(scb);
 2411                 if ((ahd->msg_flags & MSG_FLAG_IU_REQ_CHANGED) != 0) {
ahd_abort_scbs(ahd, SCB_GET_TARGET(ahd, scb),
SCB_GET_CHANNEL(ahd, scb),
SCB_GET_LUN(scb), SCB_LIST_NULL,
ROLE_INITIATOR, CAM_REQ_ABORTED);
 2416                 } else {
 2417 #ifdef AHD_DEBUG
 2418                         if ((ahd_debug & AHD_SHOW_MESSAGES) != 0)
printf("PPR Negotiation Busfree.\n");
 2420 #endif
ahd_done(ahd, scb);
 2422                 }
printerror = 0;
 2424         }
 2425         if (printerror != 0) {
 2426                 int aborted;
aborted = 0;
 2429                 if (scb != NULL) {
u_int tag;
 2432                         if ((scb->hscb->control & TAG_ENB) != 0)
tag = SCB_GET_TAG(scb);
 2434                         else
tag = SCB_LIST_NULL;
ahd_print_path(ahd, scb);
aborted = ahd_abort_scbs(ahd, target, 'A',
SCB_GET_LUN(scb), tag,
ROLE_INITIATOR,
CAM_UNEXP_BUSFREE);
 2441                 } else {
 2442                         /*
 2443                          * We had not fully identified this connection,
 2444                          * so we cannot abort anything.
 2445                          */
printf("%s: ", ahd_name(ahd));
 2447                 }
printf("Unexpected busfree %s, %d SCBs aborted, "
 2449                        "PRGMCNT == 0x%x\n",
ahd_lookup_phase_entry(lastphase)->phasemsg,
aborted,
ahd_inw(ahd, PRGMCNT));
ahd_dump_card_state(ahd);
 2454                 if (lastphase != P_BUSFREE)
ahd_force_renegotiation(ahd, &devinfo);
 2456         }
 2457         /* Always restart the sequencer. */
 2458         return (1);
 2459 }
 2461 void
ahd_handle_proto_violation(struct ahd_softc *ahd)
 2463 {
 2464         struct  ahd_devinfo devinfo;
 2465         struct  scb *scb;
u_int   scbid;
u_int   seq_flags;
u_int   curphase;
u_int   lastphase;
 2470         int     found;
ahd_fetch_devinfo(ahd, &devinfo);
scbid = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scbid);
seq_flags = ahd_inb(ahd, SEQ_FLAGS);
curphase = ahd_inb(ahd, SCSISIGI) & PHASE_MASK;
lastphase = ahd_inb(ahd, LASTPHASE);
 2478         if ((seq_flags & NOT_IDENTIFIED) != 0) {
 2480                 /*
 2481                  * The reconnecting target either did not send an
 2482                  * identify message, or did, but we didn't find an SCB
 2483                  * to match.
 2484                  */
ahd_print_devinfo(ahd, &devinfo);
printf("Target did not send an IDENTIFY message. "
 2487                        "LASTPHASE = 0x%x.\n", lastphase);
scb = NULL;
 2489         } else if (scb == NULL) {
 2490                 /*
 2491                  * We don't seem to have an SCB active for this
 2492                  * transaction.  Print an error and reset the bus.
 2493                  */
ahd_print_devinfo(ahd, &devinfo);
printf("No SCB found during protocol violation\n");
 2496                 goto proto_violation_reset;
 2497         } else {
aic_set_transaction_status(scb, CAM_SEQUENCE_FAIL);
 2499                 if ((seq_flags & NO_CDB_SENT) != 0) {
ahd_print_path(ahd, scb);
printf("No or incomplete CDB sent to device.\n");
 2502                 } else if ((ahd_inb_scbram(ahd, SCB_CONTROL)
 2503                           & STATUS_RCVD) == 0) {
 2504                         /*
 2505                          * The target never bothered to provide status to
 2506                          * us prior to completing the command.  Since we don't
 2507                          * know the disposition of this command, we must attempt
 2508                          * to abort it.  Assert ATN and prepare to send an abort
 2509                          * message.
 2510                          */
ahd_print_path(ahd, scb);
printf("Completed command without status.\n");
 2513                 } else {
ahd_print_path(ahd, scb);
printf("Unknown protocol violation.\n");
ahd_dump_card_state(ahd);
 2517                 }
 2518         }
 2519         if ((lastphase & ~P_DATAIN_DT) == 0
 2520          || lastphase == P_COMMAND) {
proto_violation_reset:
 2522                 /*
 2523                  * Target either went directly to data
 2524                  * phase or didn't respond to our ATN.
 2525                  * The only safe thing to do is to blow
 2526                  * it away with a bus reset.
 2527                  */
found = ahd_reset_channel(ahd, 'A', TRUE);
printf("%s: Issued Channel %c Bus Reset. "
 2530                        "%d SCBs aborted\n", ahd_name(ahd), 'A', found);
 2531         } else {
 2532                 /*
 2533                  * Leave the selection hardware off in case
 2534                  * this abort attempt will affect yet to
 2535                  * be sent commands.
 2536                  */
ahd_outb(ahd, SCSISEQ0,
ahd_inb(ahd, SCSISEQ0) & ~ENSELO);
ahd_assert_atn(ahd);
ahd_outb(ahd, MSG_OUT, HOST_MSG);
 2541                 if (scb == NULL) {
ahd_print_devinfo(ahd, &devinfo);
ahd->msgout_buf[0] = MSG_ABORT_TASK;
ahd->msgout_len = 1;
ahd->msgout_index = 0;
ahd->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
 2547                 } else {
ahd_print_path(ahd, scb);
scb->flags |= SCB_ABORT;
 2550                 }
printf("Protocol violation %s.  Attempting to abort.\n",
ahd_lookup_phase_entry(curphase)->phasemsg);
 2553         }
 2554 }
 2556 /*
 2557  * Force renegotiation to occur the next time we initiate
 2558  * a command to the current device.
 2559  */
 2560 void
ahd_force_renegotiation(struct ahd_softc *ahd, struct ahd_devinfo *devinfo)
 2562 {
 2563         struct  ahd_initiator_tinfo *targ_info;
 2564         struct  ahd_tmode_tstate *tstate;
 2566 #ifdef AHD_DEBUG
 2567         if ((ahd_debug & AHD_SHOW_MESSAGES) != 0) {
ahd_print_devinfo(ahd, devinfo);
printf("Forcing renegotiation\n");
 2570         }
 2571 #endif
targ_info = ahd_fetch_transinfo(ahd,
devinfo->channel,
devinfo->our_scsiid,
devinfo->target,
 2576                                         &tstate);
ahd_update_neg_request(ahd, devinfo, tstate,
targ_info, AHD_NEG_IF_NON_ASYNC);
 2579 }
 2581 #define AHD_MAX_STEPS 2000
 2582 void
ahd_clear_critical_section(struct ahd_softc *ahd)
 2584 {
ahd_mode_state  saved_modes;
 2586         int             stepping;
 2587         int             steps;
 2588         int             first_instr;
u_int           simode0;
u_int           simode1;
u_int           simode3;
u_int           lqimode0;
u_int           lqimode1;
u_int           lqomode0;
u_int           lqomode1;
 2597         if (ahd->num_critical_sections == 0)
 2598                 return;
stepping = FALSE;
steps = 0;
first_instr = 0;
simode0 = 0;
simode1 = 0;
simode3 = 0;
lqimode0 = 0;
lqimode1 = 0;
lqomode0 = 0;
lqomode1 = 0;
saved_modes = ahd_save_modes(ahd);
 2611         for (;;) {
 2612                 struct  cs *cs;
u_int   seqaddr;
u_int   i;
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
seqaddr = ahd_inw(ahd, CURADDR);
cs = ahd->critical_sections;
 2620                 for (i = 0; i < ahd->num_critical_sections; i++, cs++) {
 2622                         if (cs->begin < seqaddr && cs->end >= seqaddr)
 2623                                 break;
 2624                 }
 2626                 if (i == ahd->num_critical_sections)
 2627                         break;
 2629                 if (steps > AHD_MAX_STEPS) {
printf("%s: Infinite loop in critical section\n"
 2631                                "%s: First Instruction 0x%x now 0x%x\n",
ahd_name(ahd), ahd_name(ahd), first_instr,
seqaddr);
ahd_dump_card_state(ahd);
panic("critical section loop");
 2636                 }
steps++;
 2639 #ifdef AHD_DEBUG
 2640                 if ((ahd_debug & AHD_SHOW_MISC) != 0)
printf("%s: Single stepping at 0x%x\n", ahd_name(ahd),
seqaddr);
 2643 #endif
 2644                 if (stepping == FALSE) {
first_instr = seqaddr;
ahd_set_modes(ahd, AHD_MODE_CFG, AHD_MODE_CFG);
simode0 = ahd_inb(ahd, SIMODE0);
simode3 = ahd_inb(ahd, SIMODE3);
lqimode0 = ahd_inb(ahd, LQIMODE0);
lqimode1 = ahd_inb(ahd, LQIMODE1);
lqomode0 = ahd_inb(ahd, LQOMODE0);
lqomode1 = ahd_inb(ahd, LQOMODE1);
ahd_outb(ahd, SIMODE0, 0);
ahd_outb(ahd, SIMODE3, 0);
ahd_outb(ahd, LQIMODE0, 0);
ahd_outb(ahd, LQIMODE1, 0);
ahd_outb(ahd, LQOMODE0, 0);
ahd_outb(ahd, LQOMODE1, 0);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
simode1 = ahd_inb(ahd, SIMODE1);
 2662                         /*
 2663                          * We don't clear ENBUSFREE.  Unfortunately
 2664                          * we cannot re-enable busfree detection within
 2665                          * the current connection, so we must leave it
 2666                          * on while single stepping.
 2667                          */
ahd_outb(ahd, SIMODE1, simode1 & ENBUSFREE);
ahd_outb(ahd, SEQCTL0, ahd_inb(ahd, SEQCTL0) | STEP);
stepping = TRUE;
 2671                 }
ahd_outb(ahd, CLRSINT1, CLRBUSFREE);
ahd_outb(ahd, CLRINT, CLRSCSIINT);
ahd_set_modes(ahd, ahd->saved_src_mode, ahd->saved_dst_mode);
ahd_outb(ahd, HCNTRL, ahd->unpause);
 2676                 while (!ahd_is_paused(ahd))
aic_delay(200);
ahd_update_modes(ahd);
 2679         }
 2680         if (stepping) {
ahd_set_modes(ahd, AHD_MODE_CFG, AHD_MODE_CFG);
ahd_outb(ahd, SIMODE0, simode0);
ahd_outb(ahd, SIMODE3, simode3);
ahd_outb(ahd, LQIMODE0, lqimode0);
ahd_outb(ahd, LQIMODE1, lqimode1);
ahd_outb(ahd, LQOMODE0, lqomode0);
ahd_outb(ahd, LQOMODE1, lqomode1);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
ahd_outb(ahd, SEQCTL0, ahd_inb(ahd, SEQCTL0) & ~STEP);
ahd_outb(ahd, SIMODE1, simode1);
 2691                 /*
 2692                  * SCSIINT seems to glitch occassionally when
 2693                  * the interrupt masks are restored.  Clear SCSIINT
 2694                  * one more time so that only persistent errors
 2695                  * are seen as a real interrupt.
 2696                  */
ahd_outb(ahd, CLRINT, CLRSCSIINT);
 2698         }
ahd_restore_modes(ahd, saved_modes);
 2700 }
 2702 /*
 2703  * Clear any pending interrupt status.
 2704  */
 2705 void
ahd_clear_intstat(struct ahd_softc *ahd)
 2707 {
AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK),
 2709                          ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK));
 2710         /* Clear any interrupt conditions this may have caused */
ahd_outb(ahd, CLRLQIINT0, CLRLQIATNQAS|CLRLQICRCT1|CLRLQICRCT2
 2712                                  |CLRLQIBADLQT|CLRLQIATNLQ|CLRLQIATNCMD);
ahd_outb(ahd, CLRLQIINT1, CLRLQIPHASE_LQ|CLRLQIPHASE_NLQ|CLRLIQABORT
 2714                                  |CLRLQICRCI_LQ|CLRLQICRCI_NLQ|CLRLQIBADLQI
 2715                                  |CLRLQIOVERI_LQ|CLRLQIOVERI_NLQ|CLRNONPACKREQ);
ahd_outb(ahd, CLRLQOINT0, CLRLQOTARGSCBPERR|CLRLQOSTOPT2|CLRLQOATNLQ
 2717                                  |CLRLQOATNPKT|CLRLQOTCRC);
ahd_outb(ahd, CLRLQOINT1, CLRLQOINITSCBPERR|CLRLQOSTOPI2|CLRLQOBADQAS
 2719                                  |CLRLQOBUSFREE|CLRLQOPHACHGINPKT);
 2720         if ((ahd->bugs & AHD_CLRLQO_AUTOCLR_BUG) != 0) {
ahd_outb(ahd, CLRLQOINT0, 0);
ahd_outb(ahd, CLRLQOINT1, 0);
 2723         }
ahd_outb(ahd, CLRSINT3, CLRNTRAMPERR|CLROSRAMPERR);
ahd_outb(ahd, CLRSINT1, CLRSELTIMEO|CLRATNO|CLRSCSIRSTI
 2726                                 |CLRBUSFREE|CLRSCSIPERR|CLRREQINIT);
ahd_outb(ahd, CLRSINT0, CLRSELDO|CLRSELDI|CLRSELINGO
 2728                                 |CLRIOERR|CLROVERRUN);
ahd_outb(ahd, CLRINT, CLRSCSIINT);
 2730 }
 2732 /**************************** Debugging Routines ******************************/
 2733 #ifdef AHD_DEBUG
uint32_t ahd_debug = AHD_DEBUG_OPTS;
 2735 #endif
 2736 void
ahd_print_scb(struct scb *scb)
 2738 {
 2739         struct hardware_scb *hscb;
 2740         int i;
hscb = scb->hscb;
printf("scb:%p control:0x%x scsiid:0x%x lun:%d cdb_len:%d\n",
 2744                (void *)scb,
hscb->control,
hscb->scsiid,
hscb->lun,
hscb->cdb_len);
printf("Shared Data: ");
 2750         for (i = 0; i < sizeof(hscb->shared_data.idata.cdb); i++)
printf("%#02x", hscb->shared_data.idata.cdb[i]);
printf("        dataptr:%#x%x datacnt:%#x sgptr:%#x tag:%#x\n",
 2753                (uint32_t)((aic_le64toh(hscb->dataptr) >> 32) & 0xFFFFFFFF),
 2754                (uint32_t)(aic_le64toh(hscb->dataptr) & 0xFFFFFFFF),
aic_le32toh(hscb->datacnt),
aic_le32toh(hscb->sgptr),
SCB_GET_TAG(scb));
ahd_dump_sglist(scb);
 2759 }
 2761 void
ahd_dump_sglist(struct scb *scb)
 2763 {
 2764         int i;
 2766         if (scb->sg_count > 0) {
 2767                 if ((scb->ahd_softc->flags & AHD_64BIT_ADDRESSING) != 0) {
 2768                         struct ahd_dma64_seg *sg_list;
sg_list = (struct ahd_dma64_seg*)scb->sg_list;
 2771                         for (i = 0; i < scb->sg_count; i++) {
uint64_t addr;
uint32_t len;
addr = aic_le64toh(sg_list[i].addr);
len = aic_le32toh(sg_list[i].len);
printf("sg[%d] - Addr 0x%x%x : Length %d%s\n",
i,
 2779                                        (uint32_t)((addr >> 32) & 0xFFFFFFFF),
 2780                                        (uint32_t)(addr & 0xFFFFFFFF),
sg_list[i].len & AHD_SG_LEN_MASK,
 2782                                        (sg_list[i].len & AHD_DMA_LAST_SEG)
 2783                                      ? " Last" : "");
 2784                         }
 2785                 } else {
 2786                         struct ahd_dma_seg *sg_list;
sg_list = (struct ahd_dma_seg*)scb->sg_list;
 2789                         for (i = 0; i < scb->sg_count; i++) {
uint32_t len;
len = aic_le32toh(sg_list[i].len);
printf("sg[%d] - Addr 0x%x%x : Length %d%s\n",
i,
 2795                                        (len & AHD_SG_HIGH_ADDR_MASK) >> 24,
aic_le32toh(sg_list[i].addr),
len & AHD_SG_LEN_MASK,
len & AHD_DMA_LAST_SEG ? " Last" : "");
 2799                         }
 2800                 }
 2801         }
 2802 }
 2804 /************************* Transfer Negotiation *******************************/
 2805 /*
 2806  * Allocate per target mode instance (ID we respond to as a target)
 2807  * transfer negotiation data structures.
 2808  */
 2809 struct ahd_tmode_tstate *
ahd_alloc_tstate(struct ahd_softc *ahd, u_int scsi_id, char channel)
 2811 {
 2812         struct ahd_tmode_tstate *master_tstate;
 2813         struct ahd_tmode_tstate *tstate;
 2814         int i;
master_tstate = ahd->enabled_targets[ahd->our_id];
 2817         if (ahd->enabled_targets[scsi_id] != NULL
 2818          && ahd->enabled_targets[scsi_id] != master_tstate)
panic("%s: ahd_alloc_tstate - Target already allocated",
ahd_name(ahd));
tstate = malloc(sizeof(*tstate), M_DEVBUF, M_NOWAIT);
 2822         if (tstate == NULL)
 2823                 return (NULL);
 2825         /*
 2826          * If we have allocated a master tstate, copy user settings from
 2827          * the master tstate (taken from SRAM or the EEPROM) for this
 2828          * channel, but reset our current and goal settings to async/narrow
 2829          * until an initiator talks to us.
 2830          */
 2831         if (master_tstate != NULL) {
memcpy(tstate, master_tstate, sizeof(*tstate));
memset(tstate->enabled_luns, 0, sizeof(tstate->enabled_luns));
 2834                 for (i = 0; i < 16; i++) {
memset(&tstate->transinfo[i].curr, 0,
 2836                               sizeof(tstate->transinfo[i].curr));
memset(&tstate->transinfo[i].goal, 0,
 2838                               sizeof(tstate->transinfo[i].goal));
 2839                 }
 2840         } else
memset(tstate, 0, sizeof(*tstate));
ahd->enabled_targets[scsi_id] = tstate;
 2843         return (tstate);
 2844 }
 2846 #ifdef AHD_TARGET_MODE
 2847 /*
 2848  * Free per target mode instance (ID we respond to as a target)
 2849  * transfer negotiation data structures.
 2850  */
 2851 void
ahd_free_tstate(struct ahd_softc *ahd, u_int scsi_id, char channel, int force)
 2853 {
 2854         struct ahd_tmode_tstate *tstate;
 2856         /*
 2857          * Don't clean up our "master" tstate.
 2858          * It has our default user settings.
 2859          */
 2860         if (scsi_id == ahd->our_id
 2861          && force == FALSE)
 2862                 return;
tstate = ahd->enabled_targets[scsi_id];
 2865         if (tstate != NULL)
free(tstate, M_DEVBUF);
ahd->enabled_targets[scsi_id] = NULL;
 2868 }
 2869 #endif
 2871 /*
 2872  * Called when we have an active connection to a target on the bus,
 2873  * this function finds the nearest period to the input period limited
 2874  * by the capabilities of the bus connectivity of and sync settings for
 2875  * the target.
 2876  */
 2877 void
ahd_devlimited_syncrate(struct ahd_softc *ahd,
 2879                         struct ahd_initiator_tinfo *tinfo,
u_int *period, u_int *ppr_options, role_t role)
 2881 {
 2882         struct  ahd_transinfo *transinfo;
u_int   maxsync;
 2885         if ((ahd_inb(ahd, SBLKCTL) & ENAB40) != 0
 2886          && (ahd_inb(ahd, SSTAT2) & EXP_ACTIVE) == 0) {
maxsync = AHD_SYNCRATE_PACED;
 2888         } else {
maxsync = AHD_SYNCRATE_ULTRA;
 2890                 /* Can't do DT related options on an SE bus */
 2891                 *ppr_options &= MSG_EXT_PPR_QAS_REQ;
 2892         }
 2893         /*
 2894          * Never allow a value higher than our current goal
 2895          * period otherwise we may allow a target initiated
 2896          * negotiation to go above the limit as set by the
 2897          * user.  In the case of an initiator initiated
 2898          * sync negotiation, we limit based on the user
 2899          * setting.  This allows the system to still accept
 2900          * incoming negotiations even if target initiated
 2901          * negotiation is not performed.
 2902          */
 2903         if (role == ROLE_TARGET)
transinfo = &tinfo->user;
 2905         else 
transinfo = &tinfo->goal;
 2907         *ppr_options &= (transinfo->ppr_options|MSG_EXT_PPR_PCOMP_EN);
 2908         if (transinfo->width == MSG_EXT_WDTR_BUS_8_BIT) {
maxsync = MAX(maxsync, AHD_SYNCRATE_ULTRA2);
 2910                 *ppr_options &= ~MSG_EXT_PPR_DT_REQ;
 2911         }
 2912         if (transinfo->period == 0) {
 2913                 *period = 0;
 2914                 *ppr_options = 0;
 2915         } else {
 2916                 *period = MAX(*period, transinfo->period);
ahd_find_syncrate(ahd, period, ppr_options, maxsync);
 2918         }
 2919 }
 2921 /*
 2922  * Look up the valid period to SCSIRATE conversion in our table.
 2923  * Return the period and offset that should be sent to the target
 2924  * if this was the beginning of an SDTR.
 2925  */
 2926 void
ahd_find_syncrate(struct ahd_softc *ahd, u_int *period,
u_int *ppr_options, u_int maxsync)
 2929 {
 2930         if (*period < maxsync)
 2931                 *period = maxsync;
 2933         if ((*ppr_options & MSG_EXT_PPR_DT_REQ) != 0
 2934          && *period > AHD_SYNCRATE_MIN_DT)
 2935                 *ppr_options &= ~MSG_EXT_PPR_DT_REQ;
 2937         if (*period > AHD_SYNCRATE_MIN)
 2938                 *period = 0;
 2940         /* Honor PPR option conformance rules. */
 2941         if (*period > AHD_SYNCRATE_PACED)
 2942                 *ppr_options &= ~MSG_EXT_PPR_RTI;
 2944         if ((*ppr_options & MSG_EXT_PPR_IU_REQ) == 0)
 2945                 *ppr_options &= (MSG_EXT_PPR_DT_REQ|MSG_EXT_PPR_QAS_REQ);
 2947         if ((*ppr_options & MSG_EXT_PPR_DT_REQ) == 0)
 2948                 *ppr_options &= MSG_EXT_PPR_QAS_REQ;
 2950         /* Skip all PACED only entries if IU is not available */
 2951         if ((*ppr_options & MSG_EXT_PPR_IU_REQ) == 0
 2952          && *period < AHD_SYNCRATE_DT)
 2953                 *period = AHD_SYNCRATE_DT;
 2955         /* Skip all DT only entries if DT is not available */
 2956         if ((*ppr_options & MSG_EXT_PPR_DT_REQ) == 0
 2957          && *period < AHD_SYNCRATE_ULTRA2)
 2958                 *period = AHD_SYNCRATE_ULTRA2;
 2959 }
 2961 /*
 2962  * Truncate the given synchronous offset to a value the
 2963  * current adapter type and syncrate are capable of.
 2964  */
 2965 void
ahd_validate_offset(struct ahd_softc *ahd,
 2967                     struct ahd_initiator_tinfo *tinfo,
u_int period, u_int *offset, int wide,
role_t role)
 2970 {
u_int maxoffset;
 2973         /* Limit offset to what we can do */
 2974         if (period == 0)
maxoffset = 0;
 2976         else if (period <= AHD_SYNCRATE_PACED) {
 2977                 if ((ahd->bugs & AHD_PACED_NEGTABLE_BUG) != 0)
maxoffset = MAX_OFFSET_PACED_BUG;
 2979                 else
maxoffset = MAX_OFFSET_PACED;
 2981         } else
maxoffset = MAX_OFFSET_NON_PACED;
 2983         *offset = MIN(*offset, maxoffset);
 2984         if (tinfo != NULL) {
 2985                 if (role == ROLE_TARGET)
 2986                         *offset = MIN(*offset, tinfo->user.offset);
 2987                 else
 2988                         *offset = MIN(*offset, tinfo->goal.offset);
 2989         }
 2990 }
 2992 /*
 2993  * Truncate the given transfer width parameter to a value the
 2994  * current adapter type is capable of.
 2995  */
 2996 void
ahd_validate_width(struct ahd_softc *ahd, struct ahd_initiator_tinfo *tinfo,
u_int *bus_width, role_t role)
 2999 {
 3000         switch (*bus_width) {
 3001         default:
 3002                 if (ahd->features & AHD_WIDE) {
 3003                         /* Respond Wide */
 3004                         *bus_width = MSG_EXT_WDTR_BUS_16_BIT;
 3005                         break;
 3006                 }
 3007                 /* FALLTHROUGH */
 3008         case MSG_EXT_WDTR_BUS_8_BIT:
 3009                 *bus_width = MSG_EXT_WDTR_BUS_8_BIT;
 3010                 break;
 3011         }
 3012         if (tinfo != NULL) {
 3013                 if (role == ROLE_TARGET)
 3014                         *bus_width = MIN(tinfo->user.width, *bus_width);
 3015                 else
 3016                         *bus_width = MIN(tinfo->goal.width, *bus_width);
 3017         }
 3018 }
 3020 /*
 3021  * Update the bitmask of targets for which the controller should
 3022  * negotiate with at the next convenient oportunity.  This currently
 3023  * means the next time we send the initial identify messages for
 3024  * a new transaction.
 3025  */
 3026 int
ahd_update_neg_request(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
 3028                        struct ahd_tmode_tstate *tstate,
 3029                        struct ahd_initiator_tinfo *tinfo, ahd_neg_type neg_type)
 3030 {
u_int auto_negotiate_orig;
auto_negotiate_orig = tstate->auto_negotiate;
 3034         if (neg_type == AHD_NEG_ALWAYS) {
 3035                 /*
 3036                  * Force our "current" settings to be
 3037                  * unknown so that unless a bus reset
 3038                  * occurs the need to renegotiate is
 3039                  * recorded persistently.
 3040                  */
 3041                 if ((ahd->features & AHD_WIDE) != 0)
tinfo->curr.width = AHD_WIDTH_UNKNOWN;
tinfo->curr.period = AHD_PERIOD_UNKNOWN;
tinfo->curr.offset = AHD_OFFSET_UNKNOWN;
 3045         }
 3046         if (tinfo->curr.period != tinfo->goal.period
 3047          || tinfo->curr.width != tinfo->goal.width
 3048          || tinfo->curr.offset != tinfo->goal.offset
 3049          || tinfo->curr.ppr_options != tinfo->goal.ppr_options
 3050          || (neg_type == AHD_NEG_IF_NON_ASYNC
 3051           && (tinfo->goal.offset != 0
 3052            || tinfo->goal.width != MSG_EXT_WDTR_BUS_8_BIT
 3053            || tinfo->goal.ppr_options != 0)))
tstate->auto_negotiate |= devinfo->target_mask;
 3055         else
tstate->auto_negotiate &= ~devinfo->target_mask;
 3058         return (auto_negotiate_orig != tstate->auto_negotiate);
 3059 }
 3061 /*
 3062  * Update the user/goal/curr tables of synchronous negotiation
 3063  * parameters as well as, in the case of a current or active update,
 3064  * any data structures on the host controller.  In the case of an
 3065  * active update, the specified target is currently talking to us on
 3066  * the bus, so the transfer parameter update must take effect
 3067  * immediately.
 3068  */
 3069 void
ahd_set_syncrate(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
u_int period, u_int offset, u_int ppr_options,
u_int type, int paused)
 3073 {
 3074         struct  ahd_initiator_tinfo *tinfo;
 3075         struct  ahd_tmode_tstate *tstate;
u_int   old_period;
u_int   old_offset;
u_int   old_ppr;
 3079         int     active;
 3080         int     update_needed;
active = (type & AHD_TRANS_ACTIVE) == AHD_TRANS_ACTIVE;
update_needed = 0;
 3085         if (period == 0 || offset == 0) {
period = 0;
offset = 0;
 3088         }
tinfo = ahd_fetch_transinfo(ahd, devinfo->channel, devinfo->our_scsiid,
devinfo->target, &tstate);
 3093         if ((type & AHD_TRANS_USER) != 0) {
tinfo->user.period = period;
tinfo->user.offset = offset;
tinfo->user.ppr_options = ppr_options;
 3097         }
 3099         if ((type & AHD_TRANS_GOAL) != 0) {
tinfo->goal.period = period;
tinfo->goal.offset = offset;
tinfo->goal.ppr_options = ppr_options;
 3103         }
old_period = tinfo->curr.period;
old_offset = tinfo->curr.offset;
old_ppr    = tinfo->curr.ppr_options;
 3109         if ((type & AHD_TRANS_CUR) != 0
 3110          && (old_period != period
 3111           || old_offset != offset
 3112           || old_ppr != ppr_options)) {
update_needed++;
tinfo->curr.period = period;
tinfo->curr.offset = offset;
tinfo->curr.ppr_options = ppr_options;
 3119 #if 0
ahd_send_async(ahd, devinfo->channel, devinfo->target,
CAM_LUN_WILDCARD, AC_TRANSFER_NEG, NULL);
 3122 #endif
 3123                 if (1 /*bootverbose*/) {
 3124                         if (offset != 0) {
 3125                                 int options;
printf("%s: target %d synchronous with "
 3128                                        "period = 0x%x, offset = 0x%x",
ahd_name(ahd), devinfo->target,
period, offset);
options = 0;
 3132                                 if ((ppr_options & MSG_EXT_PPR_RD_STRM) != 0) {
printf("(RDSTRM");
options++;
 3135                                 }
 3136                                 if ((ppr_options & MSG_EXT_PPR_DT_REQ) != 0) {
printf("%s", options ? "|DT" : "(DT");
options++;
 3139                                 }
 3140                                 if ((ppr_options & MSG_EXT_PPR_IU_REQ) != 0) {
printf("%s", options ? "|IU" : "(IU");
options++;
 3143                                 }
 3144                                 if ((ppr_options & MSG_EXT_PPR_RTI) != 0) {
printf("%s", options ? "|RTI" : "(RTI");
options++;
 3147                                 }
 3148                                 if ((ppr_options & MSG_EXT_PPR_QAS_REQ) != 0) {
printf("%s", options ? "|QAS" : "(QAS");
options++;
 3151                                 }
 3152                                 if (options != 0)
printf(")\n");
 3154                                 else
printf("\n");
 3156                         } else {
printf("%s: target %d using "
 3158                                        "asynchronous transfers%s\n",
ahd_name(ahd), devinfo->target,
 3160                                        (ppr_options & MSG_EXT_PPR_QAS_REQ) != 0
 3161                                      ?  "(QAS)" : "");
 3162                         }
 3163                 }
 3164         }
 3165         /*
 3166          * Always refresh the neg-table to handle the case of the
 3167          * sequencer setting the ENATNO bit for a MK_MESSAGE request.
 3168          * We will always renegotiate in that case if this is a
 3169          * packetized request.  Also manage the busfree expected flag
 3170          * from this common routine so that we catch changes due to
 3171          * WDTR or SDTR messages.
 3172          */
 3173         if ((type & AHD_TRANS_CUR) != 0) {
 3174                 if (!paused)
ahd_pause(ahd);
ahd_update_neg_table(ahd, devinfo, &tinfo->curr);
 3177                 if (!paused)
ahd_unpause(ahd);
 3179                 if (ahd->msg_type != MSG_TYPE_NONE) {
 3180                         if ((old_ppr & MSG_EXT_PPR_IU_REQ)
 3181                          != (ppr_options & MSG_EXT_PPR_IU_REQ)) {
 3182 #ifdef AHD_DEBUG
 3183                                 if ((ahd_debug & AHD_SHOW_MESSAGES) != 0) {
ahd_print_devinfo(ahd, devinfo);
printf("Expecting IU Change busfree\n");
 3186                                 }
 3187 #endif
ahd->msg_flags |= MSG_FLAG_EXPECT_PPR_BUSFREE
 3189                                                |  MSG_FLAG_IU_REQ_CHANGED;
 3190                         }
 3191                         if ((old_ppr & MSG_EXT_PPR_IU_REQ) != 0) {
 3192 #ifdef AHD_DEBUG
 3193                                 if ((ahd_debug & AHD_SHOW_MESSAGES) != 0)
printf("PPR with IU_REQ outstanding\n");
 3195 #endif
ahd->msg_flags |= MSG_FLAG_EXPECT_PPR_BUSFREE;
 3197                         }
 3198                 }
 3199         }
update_needed += ahd_update_neg_request(ahd, devinfo, tstate,
tinfo, AHD_NEG_TO_GOAL);
 3204         if (update_needed && active)
ahd_update_pending_scbs(ahd);
 3206 }
 3208 /*
 3209  * Update the user/goal/curr tables of wide negotiation
 3210  * parameters as well as, in the case of a current or active update,
 3211  * any data structures on the host controller.  In the case of an
 3212  * active update, the specified target is currently talking to us on
 3213  * the bus, so the transfer parameter update must take effect
 3214  * immediately.
 3215  */
 3216 void
ahd_set_width(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
u_int width, u_int type, int paused)
 3219 {
 3220         struct  ahd_initiator_tinfo *tinfo;
 3221         struct  ahd_tmode_tstate *tstate;
u_int   oldwidth;
 3223         int     active;
 3224         int     update_needed;
active = (type & AHD_TRANS_ACTIVE) == AHD_TRANS_ACTIVE;
update_needed = 0;
tinfo = ahd_fetch_transinfo(ahd, devinfo->channel, devinfo->our_scsiid,
devinfo->target, &tstate);
 3231         if ((type & AHD_TRANS_USER) != 0)
tinfo->user.width = width;
 3234         if ((type & AHD_TRANS_GOAL) != 0)
tinfo->goal.width = width;
oldwidth = tinfo->curr.width;
 3238         if ((type & AHD_TRANS_CUR) != 0 && oldwidth != width) {
update_needed++;
tinfo->curr.width = width;
 3243 #if 0
ahd_send_async(ahd, devinfo->channel, devinfo->target,
CAM_LUN_WILDCARD, AC_TRANSFER_NEG, NULL);
 3246 #endif
 3247                 if (bootverbose) {
printf("%s: target %d using %dbit transfers\n",
ahd_name(ahd), devinfo->target,
 3250                                8 * (0x01 << width));
 3251                 }
 3252         }
 3254         if ((type & AHD_TRANS_CUR) != 0) {
 3255                 if (!paused)
ahd_pause(ahd);
ahd_update_neg_table(ahd, devinfo, &tinfo->curr);
 3258                 if (!paused)
ahd_unpause(ahd);
 3260         }
update_needed += ahd_update_neg_request(ahd, devinfo, tstate,
tinfo, AHD_NEG_TO_GOAL);
 3264         if (update_needed && active)
ahd_update_pending_scbs(ahd);
 3267 }
 3269 /*
 3270  * Update the current state of tagged queuing for a given target.
 3271  */
 3272 void
ahd_set_tags(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
ahd_queue_alg alg)
 3275 {
ahd_platform_set_tags(ahd, devinfo, alg);
 3277 #if 0
ahd_send_async(ahd, devinfo->channel, devinfo->target,
devinfo->lun, AC_TRANSFER_NEG, &alg);
 3280 #endif
 3281 }
 3283 void
ahd_update_neg_table(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
 3285                      struct ahd_transinfo *tinfo)
 3286 {
ahd_mode_state  saved_modes;
u_int           period;
u_int           ppr_opts;
u_int           con_opts;
u_int           offset;
u_int           saved_negoaddr;
uint8_t         iocell_opts[sizeof(ahd->iocell_opts)];
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
saved_negoaddr = ahd_inb(ahd, NEGOADDR);
ahd_outb(ahd, NEGOADDR, devinfo->target);
period = tinfo->period;
offset = tinfo->offset;
memcpy(iocell_opts, ahd->iocell_opts, sizeof(ahd->iocell_opts)); 
ppr_opts = tinfo->ppr_options & (MSG_EXT_PPR_QAS_REQ|MSG_EXT_PPR_DT_REQ
 3304                                         |MSG_EXT_PPR_IU_REQ|MSG_EXT_PPR_RTI);
con_opts = 0;
 3306         if (period == 0)
period = AHD_SYNCRATE_ASYNC;
 3308         if (period == AHD_SYNCRATE_160) {
 3310                 if ((ahd->bugs & AHD_PACED_NEGTABLE_BUG) != 0) {
 3311                         /*
 3312                          * When the SPI4 spec was finalized, PACE transfers
 3313                          * was not made a configurable option in the PPR
 3314                          * message.  Instead it is assumed to be enabled for
 3315                          * any syncrate faster than 80MHz.  Nevertheless,
 3316                          * Harpoon2A4 allows this to be configurable.
 3317                          *
 3318                          * Harpoon2A4 also assumes at most 2 data bytes per
 3319                          * negotiated REQ/ACK offset.  Paced transfers take
 3320                          * 4, so we must adjust our offset.
 3321                          */
ppr_opts |= PPROPT_PACE;
offset *= 2;
 3325                         /*
 3326                          * Harpoon2A assumed that there would be a
 3327                          * fallback rate between 160MHz and 80MHz,
 3328                          * so 7 is used as the period factor rather
 3329                          * than 8 for 160MHz.
 3330                          */
period = AHD_SYNCRATE_REVA_160;
 3332                 }
 3333                 if ((tinfo->ppr_options & MSG_EXT_PPR_PCOMP_EN) == 0)
iocell_opts[AHD_PRECOMP_SLEW_INDEX] &=
 3335                             ~AHD_PRECOMP_MASK;
 3336         } else {
 3337                 /*
 3338                  * Precomp should be disabled for non-paced transfers.
 3339                  */
iocell_opts[AHD_PRECOMP_SLEW_INDEX] &= ~AHD_PRECOMP_MASK;
 3342                 if ((ahd->features & AHD_NEW_IOCELL_OPTS) != 0
 3343                  && (ppr_opts & MSG_EXT_PPR_DT_REQ) != 0
 3344                  && (ppr_opts & MSG_EXT_PPR_IU_REQ) == 0) {
 3345                         /*
 3346                          * Slow down our CRC interval to be
 3347                          * compatible with non-packetized
 3348                          * U160 devices that can't handle a
 3349                          * CRC at full speed.
 3350                          */
con_opts |= ENSLOWCRC;
 3352                 }
 3354                 if ((ahd->bugs & AHD_PACED_NEGTABLE_BUG) != 0) {
 3355                         /*
 3356                          * On H2A4, revert to a slower slewrate
 3357                          * on non-paced transfers.
 3358                          */
iocell_opts[AHD_PRECOMP_SLEW_INDEX] &=
 3360                             ~AHD_SLEWRATE_MASK;
 3361                 }
 3362         }
ahd_outb(ahd, ANNEXCOL, AHD_ANNEXCOL_PRECOMP_SLEW);
ahd_outb(ahd, ANNEXDAT, iocell_opts[AHD_PRECOMP_SLEW_INDEX]);
ahd_outb(ahd, ANNEXCOL, AHD_ANNEXCOL_AMPLITUDE);
ahd_outb(ahd, ANNEXDAT, iocell_opts[AHD_AMPLITUDE_INDEX]);
ahd_outb(ahd, NEGPERIOD, period);
ahd_outb(ahd, NEGPPROPTS, ppr_opts);
ahd_outb(ahd, NEGOFFSET, offset);
 3373         if (tinfo->width == MSG_EXT_WDTR_BUS_16_BIT)
con_opts |= WIDEXFER;
 3376         /*
 3377          * During packetized transfers, the target will
 3378          * give us the oportunity to send command packets
 3379          * without us asserting attention.
 3380          */
 3381         if ((tinfo->ppr_options & MSG_EXT_PPR_IU_REQ) == 0)
con_opts |= ENAUTOATNO;
ahd_outb(ahd, NEGCONOPTS, con_opts);
ahd_outb(ahd, NEGOADDR, saved_negoaddr);
ahd_restore_modes(ahd, saved_modes);
 3386 }
 3388 /*
 3389  * When the transfer settings for a connection change, setup for
 3390  * negotiation in pending SCBs to effect the change as quickly as
 3391  * possible.  We also cancel any negotiations that are scheduled
 3392  * for inflight SCBs that have not been started yet.
 3393  */
 3394 void
ahd_update_pending_scbs(struct ahd_softc *ahd)
 3396 {
 3397         struct          scb *pending_scb;
 3398         int             pending_scb_count;
 3399         int             paused;
u_int           saved_scbptr;
ahd_mode_state  saved_modes;
 3403         /*
 3404          * Traverse the pending SCB list and ensure that all of the
 3405          * SCBs there have the proper settings.  We can only safely
 3406          * clear the negotiation required flag (setting requires the
 3407          * execution queue to be modified) and this is only possible
 3408          * if we are not already attempting to select out for this
 3409          * SCB.  For this reason, all callers only call this routine
 3410          * if we are changing the negotiation settings for the currently
 3411          * active transaction on the bus.
 3412          */
pending_scb_count = 0;
LIST_FOREACH(pending_scb, &ahd->pending_scbs, pending_links) {
 3415                 struct ahd_devinfo devinfo;
 3416                 struct ahd_initiator_tinfo *tinfo;
 3417                 struct ahd_tmode_tstate *tstate;
ahd_scb_devinfo(ahd, &devinfo, pending_scb);
tinfo = ahd_fetch_transinfo(ahd, devinfo.channel,
devinfo.our_scsiid,
devinfo.target, &tstate);
 3423                 if ((tstate->auto_negotiate & devinfo.target_mask) == 0
 3424                  && (pending_scb->flags & SCB_AUTO_NEGOTIATE) != 0) {
pending_scb->flags &= ~SCB_AUTO_NEGOTIATE;
pending_scb->hscb->control &= ~MK_MESSAGE;
 3427                 }
ahd_sync_scb(ahd, pending_scb,
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
pending_scb_count++;
 3431         }
 3433         if (pending_scb_count == 0)
 3434                 return;
 3436         if (ahd_is_paused(ahd)) {
paused = 1;
 3438         } else {
paused = 0;
ahd_pause(ahd);
 3441         }
 3443         /*
 3444          * Force the sequencer to reinitialize the selection for
 3445          * the command at the head of the execution queue if it
 3446          * has already been setup.  The negotiation changes may
 3447          * effect whether we select-out with ATN.  It is only
 3448          * safe to clear ENSELO when the bus is not free and no
 3449          * selection is in progres or completed.
 3450          */
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
 3453         if ((ahd_inb(ahd, SCSISIGI) & BSYI) != 0
 3454          && (ahd_inb(ahd, SSTAT0) & (SELDO|SELINGO)) == 0)
ahd_outb(ahd, SCSISEQ0, ahd_inb(ahd, SCSISEQ0) & ~ENSELO);
saved_scbptr = ahd_get_scbptr(ahd);
 3457         /* Ensure that the hscbs down on the card match the new information */
LIST_FOREACH(pending_scb, &ahd->pending_scbs, pending_links) {
u_int   scb_tag;
u_int   control;
scb_tag = SCB_GET_TAG(pending_scb);
ahd_set_scbptr(ahd, scb_tag);
control = ahd_inb_scbram(ahd, SCB_CONTROL);
control &= ~MK_MESSAGE;
control |= pending_scb->hscb->control & MK_MESSAGE;
ahd_outb(ahd, SCB_CONTROL, control);
 3468         }
ahd_set_scbptr(ahd, saved_scbptr);
ahd_restore_modes(ahd, saved_modes);
 3472         if (paused == 0)
ahd_unpause(ahd);
 3474 }
 3476 /**************************** Pathing Information *****************************/
 3477 void
ahd_fetch_devinfo(struct ahd_softc *ahd, struct ahd_devinfo *devinfo)
 3479 {
ahd_mode_state  saved_modes;
u_int           saved_scsiid;
role_t          role;
 3483         int             our_id;
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
 3488         if (ahd_inb(ahd, SSTAT0) & TARGET)
role = ROLE_TARGET;
 3490         else
role = ROLE_INITIATOR;
 3493         if (role == ROLE_TARGET
 3494          && (ahd_inb(ahd, SEQ_FLAGS) & CMDPHASE_PENDING) != 0) {
 3495                 /* We were selected, so pull our id from TARGIDIN */
our_id = ahd_inb(ahd, TARGIDIN) & OID;
 3497         } else if (role == ROLE_TARGET)
our_id = ahd_inb(ahd, TOWNID);
 3499         else
our_id = ahd_inb(ahd, IOWNID);
saved_scsiid = ahd_inb(ahd, SAVED_SCSIID);
ahd_compile_devinfo(devinfo,
our_id,
SCSIID_TARGET(ahd, saved_scsiid),
ahd_inb(ahd, SAVED_LUN),
SCSIID_CHANNEL(ahd, saved_scsiid),
role);
ahd_restore_modes(ahd, saved_modes);
 3510 }
 3512 void
ahd_print_devinfo(struct ahd_softc *ahd, struct ahd_devinfo *devinfo)
 3514 {
printf("%s:%c:%d:%d: ", ahd_name(ahd), 'A',
devinfo->target, devinfo->lun);
 3517 }
 3519 struct ahd_phase_table_entry*
ahd_lookup_phase_entry(int phase)
 3521 {
 3522         struct ahd_phase_table_entry *entry;
 3523         struct ahd_phase_table_entry *last_entry;
 3525         /*
 3526          * num_phases doesn't include the default entry which
 3527          * will be returned if the phase doesn't match.
 3528          */
last_entry = &ahd_phase_table[num_phases];
 3530         for (entry = ahd_phase_table; entry < last_entry; entry++) {
 3531                 if (phase == entry->phase)
 3532                         break;
 3533         }
 3534         return (entry);
 3535 }
 3537 void
ahd_compile_devinfo(struct ahd_devinfo *devinfo, u_int our_id, u_int target,
u_int lun, char channel, role_t role)
 3540 {
devinfo->our_scsiid = our_id;
devinfo->target = target;
devinfo->lun = lun;
devinfo->target_offset = target;
devinfo->channel = channel;
devinfo->role = role;
 3547         if (channel == 'B')
devinfo->target_offset += 8;
devinfo->target_mask = (0x01 << devinfo->target_offset);
 3550 }
 3552 void
ahd_scb_devinfo(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
 3554                 struct scb *scb)
 3555 {
role_t  role;
 3557         int     our_id;
our_id = SCSIID_OUR_ID(scb->hscb->scsiid);
role = ROLE_INITIATOR;
 3561         if ((scb->hscb->control & TARGET_SCB) != 0)
role = ROLE_TARGET;
ahd_compile_devinfo(devinfo, our_id, SCB_GET_TARGET(ahd, scb),
SCB_GET_LUN(scb), SCB_GET_CHANNEL(ahd, scb), role);
 3565 }
 3568 /************************ Message Phase Processing ****************************/
 3569 /*
 3570  * When an initiator transaction with the MK_MESSAGE flag either reconnects
 3571  * or enters the initial message out phase, we are interrupted.  Fill our
 3572  * outgoing message buffer with the appropriate message and beging handing
 3573  * the message phase(s) manually.
 3574  */
 3575 void
ahd_setup_initiator_msgout(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
 3577                            struct scb *scb)
 3578 {
 3579         /*
 3580          * To facilitate adding multiple messages together,
 3581          * each routine should increment the index and len
 3582          * variables instead of setting them explicitly.
 3583          */
ahd->msgout_index = 0;
ahd->msgout_len = 0;
 3587         if (ahd_currently_packetized(ahd))
ahd->msg_flags |= MSG_FLAG_PACKETIZED;
 3590         if (ahd->send_msg_perror
 3591          && ahd_inb(ahd, MSG_OUT) == HOST_MSG) {
ahd->msgout_buf[ahd->msgout_index++] = ahd->send_msg_perror;
ahd->msgout_len++;
ahd->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
 3595 #ifdef AHD_DEBUG
 3596                 if ((ahd_debug & AHD_SHOW_MESSAGES) != 0)
printf("Setting up for Parity Error delivery\n");
 3598 #endif
 3599                 return;
 3600         } else if (scb == NULL) {
printf("%s: WARNING. No pending message for "
 3602                        "I_T msgin.  Issuing NO-OP\n", ahd_name(ahd));
ahd->msgout_buf[ahd->msgout_index++] = MSG_NOOP;
ahd->msgout_len++;
ahd->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
 3606                 return;
 3607         }
 3609         if ((scb->flags & SCB_DEVICE_RESET) == 0
 3610          && (scb->flags & SCB_PACKETIZED) == 0
 3611          && ahd_inb(ahd, MSG_OUT) == MSG_IDENTIFYFLAG) {
u_int identify_msg;
identify_msg = MSG_IDENTIFYFLAG | SCB_GET_LUN(scb);
 3615                 if ((scb->hscb->control & DISCENB) != 0)
identify_msg |= MSG_IDENTIFY_DISCFLAG;
ahd->msgout_buf[ahd->msgout_index++] = identify_msg;
ahd->msgout_len++;
 3620                 if ((scb->hscb->control & TAG_ENB) != 0) {
ahd->msgout_buf[ahd->msgout_index++] =
scb->hscb->control & (TAG_ENB|SCB_TAG_TYPE);
ahd->msgout_buf[ahd->msgout_index++] = SCB_GET_TAG(scb);
ahd->msgout_len += 2;
 3625                 }
 3626         }
 3628         if (scb->flags & SCB_DEVICE_RESET) {
ahd->msgout_buf[ahd->msgout_index++] = MSG_BUS_DEV_RESET;
ahd->msgout_len++;
ahd_print_path(ahd, scb);
printf("Bus Device Reset Message Sent\n");
 3633                 /*
 3634                  * Clear our selection hardware in advance of
 3635                  * the busfree.  We may have an entry in the waiting
 3636                  * Q for this target, and we don't want to go about
 3637                  * selecting while we handle the busfree and blow it
 3638                  * away.
 3639                  */
ahd_outb(ahd, SCSISEQ0, 0);
 3641         } else if ((scb->flags & SCB_ABORT) != 0) {
 3643                 if ((scb->hscb->control & TAG_ENB) != 0) {
ahd->msgout_buf[ahd->msgout_index++] = MSG_ABORT_TAG;
 3645                 } else {
ahd->msgout_buf[ahd->msgout_index++] = MSG_ABORT;
 3647                 }
ahd->msgout_len++;
ahd_print_path(ahd, scb);
printf("Abort%s Message Sent\n",
 3651                        (scb->hscb->control & TAG_ENB) != 0 ? " Tag" : "");
 3652                 /*
 3653                  * Clear our selection hardware in advance of
 3654                  * the busfree.  We may have an entry in the waiting
 3655                  * Q for this target, and we don't want to go about
 3656                  * selecting while we handle the busfree and blow it
 3657                  * away.
 3658                  */
ahd_outb(ahd, SCSISEQ0, 0);
 3660         } else if ((scb->flags & (SCB_AUTO_NEGOTIATE|SCB_NEGOTIATE)) != 0) {
ahd_build_transfer_msg(ahd, devinfo);
 3662                 /*
 3663                  * Clear our selection hardware in advance of potential
 3664                  * PPR IU status change busfree.  We may have an entry in
 3665                  * the waiting Q for this target, and we don't want to go
 3666                  * about selecting while we handle the busfree and blow
 3667                  * it away.
 3668                  */
ahd_outb(ahd, SCSISEQ0, 0);
 3670         } else {
printf("ahd_intr: AWAITING_MSG for an SCB that "
 3672                        "does not have a waiting message\n");
printf("SCSIID = %x, target_mask = %x\n", scb->hscb->scsiid,
devinfo->target_mask);
panic("SCB = %d, SCB Control = %x:%x, MSG_OUT = %x "
 3676                       "SCB flags = %x", SCB_GET_TAG(scb), scb->hscb->control,
ahd_inb_scbram(ahd, SCB_CONTROL), ahd_inb(ahd, MSG_OUT),
scb->flags);
 3679         }
 3681         /*
 3682          * Clear the MK_MESSAGE flag from the SCB so we aren't
 3683          * asked to send this message again.
 3684          */
ahd_outb(ahd, SCB_CONTROL,
ahd_inb_scbram(ahd, SCB_CONTROL) & ~MK_MESSAGE);
scb->hscb->control &= ~MK_MESSAGE;
ahd->msgout_index = 0;
ahd->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
 3690 }
 3692 /*
 3693  * Build an appropriate transfer negotiation message for the
 3694  * currently active target.
 3695  */
 3696 void
ahd_build_transfer_msg(struct ahd_softc *ahd, struct ahd_devinfo *devinfo)
 3698 {
 3699         /*
 3700          * We need to initiate transfer negotiations.
 3701          * If our current and goal settings are identical,
 3702          * we want to renegotiate due to a check condition.
 3703          */
 3704         struct  ahd_initiator_tinfo *tinfo;
 3705         struct  ahd_tmode_tstate *tstate;
 3706         int     dowide;
 3707         int     dosync;
 3708         int     doppr;
u_int   period;
u_int   ppr_options;
u_int   offset;
tinfo = ahd_fetch_transinfo(ahd, devinfo->channel, devinfo->our_scsiid,
devinfo->target, &tstate);
 3715         /*
 3716          * Filter our period based on the current connection.
 3717          * If we can't perform DT transfers on this segment (not in LVD
 3718          * mode for instance), then our decision to issue a PPR message
 3719          * may change.
 3720          */
period = tinfo->goal.period;
offset = tinfo->goal.offset;
ppr_options = tinfo->goal.ppr_options;
 3724         /* Target initiated PPR is not allowed in the SCSI spec */
 3725         if (devinfo->role == ROLE_TARGET)
ppr_options = 0;
ahd_devlimited_syncrate(ahd, tinfo, &period,
 3728                                 &ppr_options, devinfo->role);
dowide = tinfo->curr.width != tinfo->goal.width;
dosync = tinfo->curr.offset != offset || tinfo->curr.period != period;
 3731         /*
 3732          * Only use PPR if we have options that need it, even if the device
 3733          * claims to support it.  There might be an expander in the way
 3734          * that doesn't.
 3735          */
doppr = ppr_options != 0;
 3738         if (!dowide && !dosync && !doppr) {
dowide = tinfo->goal.width != MSG_EXT_WDTR_BUS_8_BIT;
dosync = tinfo->goal.offset != 0;
 3741         }
 3743         if (!dowide && !dosync && !doppr) {
 3744                 /*
 3745                  * Force async with a WDTR message if we have a wide bus,
 3746                  * or just issue an SDTR with a 0 offset.
 3747                  */
 3748                 if ((ahd->features & AHD_WIDE) != 0)
dowide = 1;
 3750                 else
dosync = 1;
 3753                 if (bootverbose) {
ahd_print_devinfo(ahd, devinfo);
printf("Ensuring async\n");
 3756                 }
 3757         }
 3758         /* Target initiated PPR is not allowed in the SCSI spec */
 3759         if (devinfo->role == ROLE_TARGET)
doppr = 0;
 3762         /*
 3763          * Both the PPR message and SDTR message require the
 3764          * goal syncrate to be limited to what the target device
 3765          * is capable of handling (based on whether an LVD->SE
 3766          * expander is on the bus), so combine these two cases.
 3767          * Regardless, guarantee that if we are using WDTR and SDTR
 3768          * messages that WDTR comes first.
 3769          */
 3770         if (doppr || (dosync && !dowide)) {
offset = tinfo->goal.offset;
ahd_validate_offset(ahd, tinfo, period, &offset,
doppr ? tinfo->goal.width
 3775                                           : tinfo->curr.width,
devinfo->role);
 3777                 if (doppr) {
ahd_construct_ppr(ahd, devinfo, period, offset,
tinfo->goal.width, ppr_options);
 3780                 } else {
ahd_construct_sdtr(ahd, devinfo, period, offset);
 3782                 }
 3783         } else {
ahd_construct_wdtr(ahd, devinfo, tinfo->goal.width);
 3785         }
 3786 }
 3788 /*
 3789  * Build a synchronous negotiation message in our message
 3790  * buffer based on the input parameters.
 3791  */
 3792 void
ahd_construct_sdtr(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
u_int period, u_int offset)
 3795 {
 3796         if (offset == 0)
period = AHD_ASYNC_XFER_PERIOD;
ahd->msgout_buf[ahd->msgout_index++] = MSG_EXTENDED;
ahd->msgout_buf[ahd->msgout_index++] = MSG_EXT_SDTR_LEN;
ahd->msgout_buf[ahd->msgout_index++] = MSG_EXT_SDTR;
ahd->msgout_buf[ahd->msgout_index++] = period;
ahd->msgout_buf[ahd->msgout_index++] = offset;
ahd->msgout_len += 5;
 3804         if (bootverbose) {
printf("(%s:%c:%d:%d): Sending SDTR period %x, offset %x\n",
ahd_name(ahd), devinfo->channel, devinfo->target,
devinfo->lun, period, offset);
 3808         }
 3809 }
 3811 /*
 3812  * Build a wide negotiateion message in our message
 3813  * buffer based on the input parameters.
 3814  */
 3815 void
ahd_construct_wdtr(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
u_int bus_width)
 3818 {
ahd->msgout_buf[ahd->msgout_index++] = MSG_EXTENDED;
ahd->msgout_buf[ahd->msgout_index++] = MSG_EXT_WDTR_LEN;
ahd->msgout_buf[ahd->msgout_index++] = MSG_EXT_WDTR;
ahd->msgout_buf[ahd->msgout_index++] = bus_width;
ahd->msgout_len += 4;
 3824         if (bootverbose) {
printf("(%s:%c:%d:%d): Sending WDTR %x\n",
ahd_name(ahd), devinfo->channel, devinfo->target,
devinfo->lun, bus_width);
 3828         }
 3829 }
 3831 /*
 3832  * Build a parallel protocol request message in our message
 3833  * buffer based on the input parameters.
 3834  */
 3835 void
ahd_construct_ppr(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
u_int period, u_int offset, u_int bus_width,
u_int ppr_options)
 3839 {
 3840         /*
 3841          * Always request precompensation from
 3842          * the other target if we are running
 3843          * at paced syncrates.
 3844          */
 3845         if (period <= AHD_SYNCRATE_PACED)
ppr_options |= MSG_EXT_PPR_PCOMP_EN;
 3847         if (offset == 0)
period = AHD_ASYNC_XFER_PERIOD;
ahd->msgout_buf[ahd->msgout_index++] = MSG_EXTENDED;
ahd->msgout_buf[ahd->msgout_index++] = MSG_EXT_PPR_LEN;
ahd->msgout_buf[ahd->msgout_index++] = MSG_EXT_PPR;
ahd->msgout_buf[ahd->msgout_index++] = period;
ahd->msgout_buf[ahd->msgout_index++] = 0;
ahd->msgout_buf[ahd->msgout_index++] = offset;
ahd->msgout_buf[ahd->msgout_index++] = bus_width;
ahd->msgout_buf[ahd->msgout_index++] = ppr_options;
ahd->msgout_len += 8;
 3858         if (bootverbose) {
printf("(%s:%c:%d:%d): Sending PPR bus_width %x, period %x, "
 3860                        "offset %x, ppr_options %x\n", ahd_name(ahd),
devinfo->channel, devinfo->target, devinfo->lun,
bus_width, period, offset, ppr_options);
 3863         }
 3864 }
 3866 /*
 3867  * Clear any active message state.
 3868  */
 3869 void
ahd_clear_msg_state(struct ahd_softc *ahd)
 3871 {
ahd_mode_state saved_modes;
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
ahd->send_msg_perror = 0;
ahd->msg_flags = MSG_FLAG_NONE;
ahd->msgout_len = 0;
ahd->msgin_index = 0;
ahd->msg_type = MSG_TYPE_NONE;
 3881         if ((ahd_inb(ahd, SCSISIGO) & ATNO) != 0) {
 3882                 /*
 3883                  * The target didn't care to respond to our
 3884                  * message request, so clear ATN.
 3885                  */
ahd_outb(ahd, CLRSINT1, CLRATNO);
 3887         }
ahd_outb(ahd, MSG_OUT, MSG_NOOP);
ahd_outb(ahd, SEQ_FLAGS2,
ahd_inb(ahd, SEQ_FLAGS2) & ~TARGET_MSG_PENDING);
ahd_restore_modes(ahd, saved_modes);
 3892 }
 3894 /*
 3895  * Manual message loop handler.
 3896  */
 3897 void
ahd_handle_message_phase(struct ahd_softc *ahd)
 3899 { 
 3900         struct  ahd_devinfo devinfo;
u_int   bus_phase;
 3902         int     end_session;
ahd_fetch_devinfo(ahd, &devinfo);
end_session = FALSE;
bus_phase = ahd_inb(ahd, LASTPHASE);
 3908         if ((ahd_inb(ahd, LQISTAT2) & LQIPHASE_OUTPKT) != 0) {
printf("LQIRETRY for LQIPHASE_OUTPKT\n");
ahd_outb(ahd, LQCTL2, LQIRETRY);
 3911         }
reswitch:
 3913         switch (ahd->msg_type) {
 3914         case MSG_TYPE_INITIATOR_MSGOUT:
 3915         {
 3916                 int lastbyte;
 3917                 int phasemis;
 3918                 int msgdone;
 3920                 if (ahd->msgout_len == 0 && ahd->send_msg_perror == 0)
panic("HOST_MSG_LOOP interrupt with no active message");
 3923 #ifdef AHD_DEBUG
 3924                 if ((ahd_debug & AHD_SHOW_MESSAGES) != 0) {
ahd_print_devinfo(ahd, &devinfo);
printf("INITIATOR_MSG_OUT");
 3927                 }
 3928 #endif
phasemis = bus_phase != P_MESGOUT;
 3930                 if (phasemis) {
 3931 #ifdef AHD_DEBUG
 3932                         if ((ahd_debug & AHD_SHOW_MESSAGES) != 0) {
printf(" PHASEMIS %s\n",
ahd_lookup_phase_entry(bus_phase)
 3935                                                              ->phasemsg);
 3936                         }
 3937 #endif
 3938                         if (bus_phase == P_MESGIN) {
 3939                                 /*
 3940                                  * Change gears and see if
 3941                                  * this messages is of interest to
 3942                                  * us or should be passed back to
 3943                                  * the sequencer.
 3944                                  */
ahd_outb(ahd, CLRSINT1, CLRATNO);
ahd->send_msg_perror = 0;
ahd->msg_type = MSG_TYPE_INITIATOR_MSGIN;
ahd->msgin_index = 0;
 3949                                 goto reswitch;
 3950                         }
end_session = TRUE;
 3952                         break;
 3953                 }
 3955                 if (ahd->send_msg_perror) {
ahd_outb(ahd, CLRSINT1, CLRATNO);
ahd_outb(ahd, CLRSINT1, CLRREQINIT);
 3958 #ifdef AHD_DEBUG
 3959                         if ((ahd_debug & AHD_SHOW_MESSAGES) != 0)
printf(" byte 0x%x\n", ahd->send_msg_perror);
 3961 #endif
 3962                         /*
 3963                          * If we are notifying the target of a CRC error
 3964                          * during packetized operations, the target is
 3965                          * within its rights to acknowledge our message
 3966                          * with a busfree.
 3967                          */
 3968                         if ((ahd->msg_flags & MSG_FLAG_PACKETIZED) != 0
 3969                          && ahd->send_msg_perror == MSG_INITIATOR_DET_ERR)
ahd->msg_flags |= MSG_FLAG_EXPECT_IDE_BUSFREE;
ahd_outb(ahd, RETURN_2, ahd->send_msg_perror);
ahd_outb(ahd, RETURN_1, CONT_MSG_LOOP_WRITE);
 3974                         break;
 3975                 }
msgdone = ahd->msgout_index == ahd->msgout_len;
 3978                 if (msgdone) {
 3979                         /*
 3980                          * The target has requested a retry.
 3981                          * Re-assert ATN, reset our message index to
 3982                          * 0, and try again.
 3983                          */
ahd->msgout_index = 0;
ahd_assert_atn(ahd);
 3986                 }
lastbyte = ahd->msgout_index == (ahd->msgout_len - 1);
 3989                 if (lastbyte) {
 3990                         /* Last byte is signified by dropping ATN */
ahd_outb(ahd, CLRSINT1, CLRATNO);
 3992                 }
 3994                 /*
 3995                  * Clear our interrupt status and present
 3996                  * the next byte on the bus.
 3997                  */
ahd_outb(ahd, CLRSINT1, CLRREQINIT);
 3999 #ifdef AHD_DEBUG
 4000                 if ((ahd_debug & AHD_SHOW_MESSAGES) != 0)
printf(" byte 0x%x\n",
ahd->msgout_buf[ahd->msgout_index]);
 4003 #endif
ahd_outb(ahd, RETURN_2, ahd->msgout_buf[ahd->msgout_index++]);
ahd_outb(ahd, RETURN_1, CONT_MSG_LOOP_WRITE);
 4006                 break;
 4007         }
 4008         case MSG_TYPE_INITIATOR_MSGIN:
 4009         {
 4010                 int phasemis;
 4011                 int message_done;
 4013 #ifdef AHD_DEBUG
 4014                 if ((ahd_debug & AHD_SHOW_MESSAGES) != 0) {
ahd_print_devinfo(ahd, &devinfo);
printf("INITIATOR_MSG_IN");
 4017                 }
 4018 #endif
phasemis = bus_phase != P_MESGIN;
 4020                 if (phasemis) {
 4021 #ifdef AHD_DEBUG
 4022                         if ((ahd_debug & AHD_SHOW_MESSAGES) != 0) {
printf(" PHASEMIS %s\n",
ahd_lookup_phase_entry(bus_phase)
 4025                                                              ->phasemsg);
 4026                         }
 4027 #endif
ahd->msgin_index = 0;
 4029                         if (bus_phase == P_MESGOUT
 4030                          && (ahd->send_msg_perror != 0
 4031                           || (ahd->msgout_len != 0
 4032                            && ahd->msgout_index == 0))) {
ahd->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
 4034                                 goto reswitch;
 4035                         }
end_session = TRUE;
 4037                         break;
 4038                 }
 4040                 /* Pull the byte in without acking it */
ahd->msgin_buf[ahd->msgin_index] = ahd_inb(ahd, SCSIBUS);
 4042 #ifdef AHD_DEBUG
 4043                 if ((ahd_debug & AHD_SHOW_MESSAGES) != 0)
printf(" byte 0x%x\n",
ahd->msgin_buf[ahd->msgin_index]);
 4046 #endif
message_done = ahd_parse_msg(ahd, &devinfo);
 4050                 if (message_done) {
 4051                         /*
 4052                          * Clear our incoming message buffer in case there
 4053                          * is another message following this one.
 4054                          */
ahd->msgin_index = 0;
 4057                         /*
 4058                          * If this message illicited a response,
 4059                          * assert ATN so the target takes us to the
 4060                          * message out phase.
 4061                          */
 4062                         if (ahd->msgout_len != 0) {
 4063 #ifdef AHD_DEBUG
 4064                                 if ((ahd_debug & AHD_SHOW_MESSAGES) != 0) {
ahd_print_devinfo(ahd, &devinfo);
printf("Asserting ATN for response\n");
 4067                                 }
 4068 #endif
ahd_assert_atn(ahd);
 4070                         }
 4071                 } else 
ahd->msgin_index++;
 4074                 if (message_done == MSGLOOP_TERMINATED) {
end_session = TRUE;
 4076                 } else {
 4077                         /* Ack the byte */
ahd_outb(ahd, CLRSINT1, CLRREQINIT);
ahd_outb(ahd, RETURN_1, CONT_MSG_LOOP_READ);
 4080                 }
 4081                 break;
 4082         }
 4083         case MSG_TYPE_TARGET_MSGIN:
 4084         {
 4085                 int msgdone;
 4086                 int msgout_request;
 4088                 /*
 4089                  * By default, the message loop will continue.
 4090                  */
ahd_outb(ahd, RETURN_1, CONT_MSG_LOOP_TARG);
 4093                 if (ahd->msgout_len == 0)
panic("Target MSGIN with no active message");
 4096                 /*
 4097                  * If we interrupted a mesgout session, the initiator
 4098                  * will not know this until our first REQ.  So, we
 4099                  * only honor mesgout requests after we've sent our
 4100                  * first byte.
 4101                  */
 4102                 if ((ahd_inb(ahd, SCSISIGI) & ATNI) != 0
 4103                  && ahd->msgout_index > 0)
msgout_request = TRUE;
 4105                 else
msgout_request = FALSE;
 4108                 if (msgout_request) {
 4110                         /*
 4111                          * Change gears and see if
 4112                          * this messages is of interest to
 4113                          * us or should be passed back to
 4114                          * the sequencer.
 4115                          */
ahd->msg_type = MSG_TYPE_TARGET_MSGOUT;
ahd_outb(ahd, SCSISIGO, P_MESGOUT | BSYO);
ahd->msgin_index = 0;
 4119                         /* Dummy read to REQ for first byte */
ahd_inb(ahd, SCSIDAT);
ahd_outb(ahd, SXFRCTL0,
ahd_inb(ahd, SXFRCTL0) | SPIOEN);
 4123                         break;
 4124                 }
msgdone = ahd->msgout_index == ahd->msgout_len;
 4127                 if (msgdone) {
ahd_outb(ahd, SXFRCTL0,
ahd_inb(ahd, SXFRCTL0) & ~SPIOEN);
end_session = TRUE;
 4131                         break;
 4132                 }
 4134                 /*
 4135                  * Present the next byte on the bus.
 4136                  */
ahd_outb(ahd, SXFRCTL0, ahd_inb(ahd, SXFRCTL0) | SPIOEN);
ahd_outb(ahd, SCSIDAT, ahd->msgout_buf[ahd->msgout_index++]);
 4139                 break;
 4140         }
 4141         case MSG_TYPE_TARGET_MSGOUT:
 4142         {
 4143                 int lastbyte;
 4144                 int msgdone;
 4146                 /*
 4147                  * By default, the message loop will continue.
 4148                  */
ahd_outb(ahd, RETURN_1, CONT_MSG_LOOP_TARG);
 4151                 /*
 4152                  * The initiator signals that this is
 4153                  * the last byte by dropping ATN.
 4154                  */
lastbyte = (ahd_inb(ahd, SCSISIGI) & ATNI) == 0;
 4157                 /*
 4158                  * Read the latched byte, but turn off SPIOEN first
 4159                  * so that we don't inadvertently cause a REQ for the
 4160                  * next byte.
 4161                  */
ahd_outb(ahd, SXFRCTL0, ahd_inb(ahd, SXFRCTL0) & ~SPIOEN);
ahd->msgin_buf[ahd->msgin_index] = ahd_inb(ahd, SCSIDAT);
msgdone = ahd_parse_msg(ahd, &devinfo);
 4165                 if (msgdone == MSGLOOP_TERMINATED) {
 4166                         /*
 4167                          * The message is *really* done in that it caused
 4168                          * us to go to bus free.  The sequencer has already
 4169                          * been reset at this point, so pull the ejection
 4170                          * handle.
 4171                          */
 4172                         return;
 4173                 }
ahd->msgin_index++;
 4177                 /*
 4178                  * XXX Read spec about initiator dropping ATN too soon
 4179                  *     and use msgdone to detect it.
 4180                  */
 4181                 if (msgdone == MSGLOOP_MSGCOMPLETE) {
ahd->msgin_index = 0;
 4184                         /*
 4185                          * If this message illicited a response, transition
 4186                          * to the Message in phase and send it.
 4187                          */
 4188                         if (ahd->msgout_len != 0) {
ahd_outb(ahd, SCSISIGO, P_MESGIN | BSYO);
ahd_outb(ahd, SXFRCTL0,
ahd_inb(ahd, SXFRCTL0) | SPIOEN);
ahd->msg_type = MSG_TYPE_TARGET_MSGIN;
ahd->msgin_index = 0;
 4194                                 break;
 4195                         }
 4196                 }
 4198                 if (lastbyte)
end_session = TRUE;
 4200                 else {
 4201                         /* Ask for the next byte. */
ahd_outb(ahd, SXFRCTL0,
ahd_inb(ahd, SXFRCTL0) | SPIOEN);
 4204                 }
 4206                 break;
 4207         }
 4208         default:
panic("Unknown REQINIT message type");
 4210         }
 4212         if (end_session) {
 4213                 if ((ahd->msg_flags & MSG_FLAG_PACKETIZED) != 0) {
printf("%s: Returning to Idle Loop\n",
ahd_name(ahd));
ahd_clear_msg_state(ahd);
 4218                         /*
 4219                          * Perform the equivalent of a clear_target_state.
 4220                          */
ahd_outb(ahd, LASTPHASE, P_BUSFREE);
ahd_outb(ahd, SEQ_FLAGS, NOT_IDENTIFIED|NO_CDB_SENT);
ahd_outb(ahd, SEQCTL0, FASTMODE|SEQRESET);
 4224                 } else {
ahd_clear_msg_state(ahd);
ahd_outb(ahd, RETURN_1, EXIT_MSG_LOOP);
 4227                 }
 4228         }
 4229 }
 4231 /*
 4232  * See if we sent a particular extended message to the target.
 4233  * If "full" is true, return true only if the target saw the full
 4234  * message.  If "full" is false, return true if the target saw at
 4235  * least the first byte of the message.
 4236  */
 4237 int
ahd_sent_msg(struct ahd_softc *ahd, ahd_msgtype type, u_int msgval, int full)
 4239 {
 4240         int found;
u_int index;
found = FALSE;
index = 0;
 4246         while (index < ahd->msgout_len) {
 4247                 if (ahd->msgout_buf[index] == MSG_EXTENDED) {
u_int end_index;
end_index = index + 1 + ahd->msgout_buf[index + 1];
 4251                         if (ahd->msgout_buf[index+2] == msgval
 4252                          && type == AHDMSG_EXT) {
 4254                                 if (full) {
 4255                                         if (ahd->msgout_index > end_index)
found = TRUE;
 4257                                 } else if (ahd->msgout_index > index)
found = TRUE;
 4259                         }
index = end_index;
 4261                 } else if (ahd->msgout_buf[index] >= MSG_SIMPLE_TASK
 4262                         && ahd->msgout_buf[index] <= MSG_IGN_WIDE_RESIDUE) {
 4264                         /* Skip tag type and tag id or residue param*/
index += 2;
 4266                 } else {
 4267                         /* Single byte message */
 4268                         if (type == AHDMSG_1B
 4269                          && ahd->msgout_index > index
 4270                          && (ahd->msgout_buf[index] == msgval
 4271                           || ((ahd->msgout_buf[index] & MSG_IDENTIFYFLAG) != 0
 4272                            && msgval == MSG_IDENTIFYFLAG)))
found = TRUE;
index++;
 4275                 }
 4277                 if (found)
 4278                         break;
 4279         }
 4280         return (found);
 4281 }
 4283 /*
 4284  * Wait for a complete incoming message, parse it, and respond accordingly.
 4285  */
 4286 int
ahd_parse_msg(struct ahd_softc *ahd, struct ahd_devinfo *devinfo)
 4288 {
 4289         struct  ahd_initiator_tinfo *tinfo;
 4290         struct  ahd_tmode_tstate *tstate;
 4291         int     reject;
 4292         int     done;
 4293         int     response;
done = MSGLOOP_IN_PROG;
response = FALSE;
reject = FALSE;
tinfo = ahd_fetch_transinfo(ahd, devinfo->channel, devinfo->our_scsiid,
devinfo->target, &tstate);
 4301         /*
 4302          * Parse as much of the message as is available,
 4303          * rejecting it if we don't support it.  When
 4304          * the entire message is available and has been
 4305          * handled, return MSGLOOP_MSGCOMPLETE, indicating
 4306          * that we have parsed an entire message.
 4307          *
 4308          * In the case of extended messages, we accept the length
 4309          * byte outright and perform more checking once we know the
 4310          * extended message type.
 4311          */
 4312         switch (ahd->msgin_buf[0]) {
 4313         case MSG_DISCONNECT:
 4314         case MSG_SAVEDATAPOINTER:
 4315         case MSG_CMDCOMPLETE:
 4316         case MSG_RESTOREPOINTERS:
 4317         case MSG_IGN_WIDE_RESIDUE:
 4318                 /*
 4319                  * End our message loop as these are messages
 4320                  * the sequencer handles on its own.
 4321                  */
done = MSGLOOP_TERMINATED;
 4323                 break;
 4324         case MSG_MESSAGE_REJECT:
response = ahd_handle_msg_reject(ahd, devinfo);
 4326                 /* FALLTHROUGH */
 4327         case MSG_NOOP:
done = MSGLOOP_MSGCOMPLETE;
 4329                 break;
 4330         case MSG_EXTENDED:
 4331         {
 4332                 /* Wait for enough of the message to begin validation */
 4333                 if (ahd->msgin_index < 2)
 4334                         break;
 4335                 switch (ahd->msgin_buf[2]) {
 4336                 case MSG_EXT_SDTR:
 4337                 {
u_int    period;
u_int    ppr_options;
u_int    offset;
u_int    saved_offset;
 4343                         if (ahd->msgin_buf[1] != MSG_EXT_SDTR_LEN) {
reject = TRUE;
 4345                                 break;
 4346                         }
 4348                         /*
 4349                          * Wait until we have both args before validating
 4350                          * and acting on this message.
 4351                          *
 4352                          * Add one to MSG_EXT_SDTR_LEN to account for
 4353                          * the extended message preamble.
 4354                          */
 4355                         if (ahd->msgin_index < (MSG_EXT_SDTR_LEN + 1))
 4356                                 break;
period = ahd->msgin_buf[3];
ppr_options = 0;
saved_offset = offset = ahd->msgin_buf[4];
ahd_devlimited_syncrate(ahd, tinfo, &period,
 4362                                                 &ppr_options, devinfo->role);
ahd_validate_offset(ahd, tinfo, period, &offset,
tinfo->curr.width, devinfo->role);
 4365                         if (bootverbose) {
printf("(%s:%c:%d:%d): Received "
 4367                                        "SDTR period %x, offset %x\n\t"
 4368                                        "Filtered to period %x, offset %x\n",
ahd_name(ahd), devinfo->channel,
devinfo->target, devinfo->lun,
ahd->msgin_buf[3], saved_offset,
period, offset);
 4373                         }
ahd_set_syncrate(ahd, devinfo, period,
offset, ppr_options,
AHD_TRANS_ACTIVE|AHD_TRANS_GOAL,
 4377                                          /*paused*/TRUE);
 4379                         /*
 4380                          * See if we initiated Sync Negotiation
 4381                          * and didn't have to fall down to async
 4382                          * transfers.
 4383                          */
 4384                         if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_SDTR, TRUE)) {
 4385                                 /* We started it */
 4386                                 if (saved_offset != offset) {
 4387                                         /* Went too low - force async */
reject = TRUE;
 4389                                 }
 4390                         } else {
 4391                                 /*
 4392                                  * Send our own SDTR in reply
 4393                                  */
 4394                                 if (bootverbose
 4395                                  && devinfo->role == ROLE_INITIATOR) {
printf("(%s:%c:%d:%d): Target "
 4397                                                "Initiated SDTR\n",
ahd_name(ahd), devinfo->channel,
devinfo->target, devinfo->lun);
 4400                                 }
ahd->msgout_index = 0;
ahd->msgout_len = 0;
ahd_construct_sdtr(ahd, devinfo,
period, offset);
ahd->msgout_index = 0;
response = TRUE;
 4407                         }
done = MSGLOOP_MSGCOMPLETE;
 4409                         break;
 4410                 }
 4411                 case MSG_EXT_WDTR:
 4412                 {
u_int bus_width;
u_int saved_width;
u_int sending_reply;
sending_reply = FALSE;
 4418                         if (ahd->msgin_buf[1] != MSG_EXT_WDTR_LEN) {
reject = TRUE;
 4420                                 break;
 4421                         }
 4423                         /*
 4424                          * Wait until we have our arg before validating
 4425                          * and acting on this message.
 4426                          *
 4427                          * Add one to MSG_EXT_WDTR_LEN to account for
 4428                          * the extended message preamble.
 4429                          */
 4430                         if (ahd->msgin_index < (MSG_EXT_WDTR_LEN + 1))
 4431                                 break;
bus_width = ahd->msgin_buf[3];
saved_width = bus_width;
ahd_validate_width(ahd, tinfo, &bus_width,
devinfo->role);
 4437                         if (bootverbose) {
printf("(%s:%c:%d:%d): Received WDTR "
 4439                                        "%x filtered to %x\n",
ahd_name(ahd), devinfo->channel,
devinfo->target, devinfo->lun,
saved_width, bus_width);
 4443                         }
 4445                         if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_WDTR, TRUE)) {
 4446                                 /*
 4447                                  * Don't send a WDTR back to the
 4448                                  * target, since we asked first.
 4449                                  * If the width went higher than our
 4450                                  * request, reject it.
 4451                                  */
 4452                                 if (saved_width > bus_width) {
reject = TRUE;
printf("(%s:%c:%d:%d): requested %dBit "
 4455                                                "transfers.  Rejecting...\n",
ahd_name(ahd), devinfo->channel,
devinfo->target, devinfo->lun,
 4458                                                8 * (0x01 << bus_width));
bus_width = 0;
 4460                                 }
 4461                         } else {
 4462                                 /*
 4463                                  * Send our own WDTR in reply
 4464                                  */
 4465                                 if (bootverbose
 4466                                  && devinfo->role == ROLE_INITIATOR) {
printf("(%s:%c:%d:%d): Target "
 4468                                                "Initiated WDTR\n",
ahd_name(ahd), devinfo->channel,
devinfo->target, devinfo->lun);
 4471                                 }
ahd->msgout_index = 0;
ahd->msgout_len = 0;
ahd_construct_wdtr(ahd, devinfo, bus_width);
ahd->msgout_index = 0;
response = TRUE;
sending_reply = TRUE;
 4478                         }
 4479                         /*
 4480                          * After a wide message, we are async, but
 4481                          * some devices don't seem to honor this portion
 4482                          * of the spec.  Force a renegotiation of the
 4483                          * sync component of our transfer agreement even
 4484                          * if our goal is async.  By updating our width
 4485                          * after forcing the negotiation, we avoid
 4486                          * renegotiating for width.
 4487                          */
ahd_update_neg_request(ahd, devinfo, tstate,
tinfo, AHD_NEG_ALWAYS);
ahd_set_width(ahd, devinfo, bus_width,
AHD_TRANS_ACTIVE|AHD_TRANS_GOAL,
 4492                                       /*paused*/TRUE);
 4493                         if (sending_reply == FALSE && reject == FALSE) {
 4495                                 /*
 4496                                  * We will always have an SDTR to send.
 4497                                  */
ahd->msgout_index = 0;
ahd->msgout_len = 0;
ahd_build_transfer_msg(ahd, devinfo);
ahd->msgout_index = 0;
response = TRUE;
 4503                         }
done = MSGLOOP_MSGCOMPLETE;
 4505                         break;
 4506                 }
 4507                 case MSG_EXT_PPR:
 4508                 {
u_int   period;
u_int   offset;
u_int   bus_width;
u_int   ppr_options;
u_int   saved_width;
u_int   saved_offset;
u_int   saved_ppr_options;
 4517                         if (ahd->msgin_buf[1] != MSG_EXT_PPR_LEN) {
reject = TRUE;
 4519                                 break;
 4520                         }
 4522                         /*
 4523                          * Wait until we have all args before validating
 4524                          * and acting on this message.
 4525                          *
 4526                          * Add one to MSG_EXT_PPR_LEN to account for
 4527                          * the extended message preamble.
 4528                          */
 4529                         if (ahd->msgin_index < (MSG_EXT_PPR_LEN + 1))
 4530                                 break;
period = ahd->msgin_buf[3];
offset = ahd->msgin_buf[5];
bus_width = ahd->msgin_buf[6];
saved_width = bus_width;
ppr_options = ahd->msgin_buf[7];
 4537                         /*
 4538                          * According to the spec, a DT only
 4539                          * period factor with no DT option
 4540                          * set implies async.
 4541                          */
 4542                         if ((ppr_options & MSG_EXT_PPR_DT_REQ) == 0
 4543                          && period <= 9)
offset = 0;
saved_ppr_options = ppr_options;
saved_offset = offset;
 4548                         /*
 4549                          * Transfer options are only available if we
 4550                          * are negotiating wide.
 4551                          */
 4552                         if (bus_width == 0)
ppr_options &= MSG_EXT_PPR_QAS_REQ;
ahd_validate_width(ahd, tinfo, &bus_width,
devinfo->role);
ahd_devlimited_syncrate(ahd, tinfo, &period,
 4558                                                 &ppr_options, devinfo->role);
ahd_validate_offset(ahd, tinfo, period, &offset,
bus_width, devinfo->role);
 4562                         if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_PPR, TRUE)) {
 4563                                 /*
 4564                                  * If we are unable to do any of the
 4565                                  * requested options (we went too low),
 4566                                  * then we'll have to reject the message.
 4567                                  */
 4568                                 if (saved_width > bus_width
 4569                                  || saved_offset != offset
 4570                                  || saved_ppr_options != ppr_options) {
reject = TRUE;
period = 0;
offset = 0;
bus_width = 0;
ppr_options = 0;
 4576                                 }
 4577                         } else {
 4578                                 if (devinfo->role != ROLE_TARGET)
printf("(%s:%c:%d:%d): Target "
 4580                                                "Initiated PPR\n",
ahd_name(ahd), devinfo->channel,
devinfo->target, devinfo->lun);
 4583                                 else
printf("(%s:%c:%d:%d): Initiator "
 4585                                                "Initiated PPR\n",
ahd_name(ahd), devinfo->channel,
devinfo->target, devinfo->lun);
ahd->msgout_index = 0;
ahd->msgout_len = 0;
ahd_construct_ppr(ahd, devinfo, period, offset,
bus_width, ppr_options);
ahd->msgout_index = 0;
response = TRUE;
 4594                         }
 4595                         if (bootverbose) {
printf("(%s:%c:%d:%d): Received PPR width %x, "
 4597                                        "period %x, offset %x,options %x\n"
 4598                                        "\tFiltered to width %x, period %x, "
 4599                                        "offset %x, options %x\n",
ahd_name(ahd), devinfo->channel,
devinfo->target, devinfo->lun,
saved_width, ahd->msgin_buf[3],
saved_offset, saved_ppr_options,
bus_width, period, offset, ppr_options);
 4605                         }
ahd_set_width(ahd, devinfo, bus_width,
AHD_TRANS_ACTIVE|AHD_TRANS_GOAL,
 4608                                       /*paused*/TRUE);
ahd_set_syncrate(ahd, devinfo, period,
offset, ppr_options,
AHD_TRANS_ACTIVE|AHD_TRANS_GOAL,
 4612                                          /*paused*/TRUE);
done = MSGLOOP_MSGCOMPLETE;
 4615                         break;
 4616                 }
 4617                 default:
 4618                         /* Unknown extended message.  Reject it. */
reject = TRUE;
 4620                         break;
 4621                 }
 4622                 break;
 4623         }
 4624 #ifdef AHD_TARGET_MODE
 4625         case MSG_BUS_DEV_RESET:
ahd_handle_devreset(ahd, devinfo, CAM_LUN_WILDCARD,
CAM_BDR_SENT,
 4628                                     "Bus Device Reset Received",
 4629                                     /*verbose_level*/0);
ahd_restart(ahd);
done = MSGLOOP_TERMINATED;
 4632                 break;
 4633         case MSG_ABORT_TAG:
 4634         case MSG_ABORT:
 4635         case MSG_CLEAR_QUEUE:
 4636         {
 4637                 int tag;
 4639                 /* Target mode messages */
 4640                 if (devinfo->role != ROLE_TARGET) {
reject = TRUE;
 4642                         break;
 4643                 }
tag = SCB_LIST_NULL;
 4645                 if (ahd->msgin_buf[0] == MSG_ABORT_TAG)
tag = ahd_inb(ahd, INITIATOR_TAG);
ahd_abort_scbs(ahd, devinfo->target, devinfo->channel,
devinfo->lun, tag, ROLE_TARGET,
CAM_REQ_ABORTED);
tstate = ahd->enabled_targets[devinfo->our_scsiid];
 4652                 if (tstate != NULL) {
 4653                         struct ahd_tmode_lstate* lstate;
lstate = tstate->enabled_luns[devinfo->lun];
 4656                         if (lstate != NULL) {
ahd_queue_lstate_event(ahd, lstate,
devinfo->our_scsiid,
ahd->msgin_buf[0],
 4660                                                        /*arg*/tag);
ahd_send_lstate_events(ahd, lstate);
 4662                         }
 4663                 }
ahd_restart(ahd);
done = MSGLOOP_TERMINATED;
 4666                 break;
 4667         }
 4668 #endif
 4669         case MSG_QAS_REQUEST:
 4670 #ifdef AHD_DEBUG
 4671                 if ((ahd_debug & AHD_SHOW_MESSAGES) != 0)
printf("%s: QAS request.  SCSISIGI == 0x%x\n",
ahd_name(ahd), ahd_inb(ahd, SCSISIGI));
 4674 #endif
ahd->msg_flags |= MSG_FLAG_EXPECT_QASREJ_BUSFREE;
 4676                 /* FALLTHROUGH */
 4677         case MSG_TERM_IO_PROC:
 4678         default:
reject = TRUE;
 4680                 break;
 4681         }
 4683         if (reject) {
 4684                 /*
 4685                  * Setup to reject the message.
 4686                  */
ahd->msgout_index = 0;
ahd->msgout_len = 1;
ahd->msgout_buf[0] = MSG_MESSAGE_REJECT;
done = MSGLOOP_MSGCOMPLETE;
response = TRUE;
 4692         }
 4694         if (done != MSGLOOP_IN_PROG && !response)
 4695                 /* Clear the outgoing message buffer */
ahd->msgout_len = 0;
 4698         return (done);
 4699 }
 4701 /*
 4702  * Process a message reject message.
 4703  */
 4704 int
ahd_handle_msg_reject(struct ahd_softc *ahd, struct ahd_devinfo *devinfo)
 4706 {
 4707         /*
 4708          * What we care about here is if we had an
 4709          * outstanding SDTR or WDTR message for this
 4710          * target.  If we did, this is a signal that
 4711          * the target is refusing negotiation.
 4712          */
 4713         struct scb *scb;
 4714         struct ahd_initiator_tinfo *tinfo;
 4715         struct ahd_tmode_tstate *tstate;
u_int scb_index;
u_int last_msg;
 4718         int   response = 0;
scb_index = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scb_index);
tinfo = ahd_fetch_transinfo(ahd, devinfo->channel,
devinfo->our_scsiid,
devinfo->target, &tstate);
 4725         /* Might be necessary */
last_msg = ahd_inb(ahd, LAST_MSG);
 4728         if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_PPR, /*full*/FALSE)) {
 4729                 if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_PPR, /*full*/TRUE)
 4730                  && tinfo->goal.period <= AHD_SYNCRATE_PACED) {
 4731                         /*
 4732                          * Target may not like our SPI-4 PPR Options.
 4733                          * Attempt to negotiate 80MHz which will turn
 4734                          * off these options.
 4735                          */
 4736                         if (bootverbose) {
printf("(%s:%c:%d:%d): PPR Rejected. "
 4738                                        "Trying simple U160 PPR\n",
ahd_name(ahd), devinfo->channel,
devinfo->target, devinfo->lun);
 4741                         }
tinfo->goal.period = AHD_SYNCRATE_DT;
tinfo->goal.ppr_options &= MSG_EXT_PPR_IU_REQ
 4744                                                 |  MSG_EXT_PPR_QAS_REQ
 4745                                                 |  MSG_EXT_PPR_DT_REQ;
 4746                 } else {
 4747                         /*
 4748                          * Target does not support the PPR message.
 4749                          * Attempt to negotiate SPI-2 style.
 4750                          */
 4751                         if (bootverbose) {
printf("(%s:%c:%d:%d): PPR Rejected. "
 4753                                        "Trying WDTR/SDTR\n",
ahd_name(ahd), devinfo->channel,
devinfo->target, devinfo->lun);
 4756                         }
tinfo->goal.ppr_options = 0;
tinfo->curr.transport_version = 2;
tinfo->goal.transport_version = 2;
 4760                 }
ahd->msgout_index = 0;
ahd->msgout_len = 0;
ahd_build_transfer_msg(ahd, devinfo);
ahd->msgout_index = 0;
response = 1;
 4766         } else if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_WDTR, /*full*/FALSE)) {
 4768                 /* note 8bit xfers */
printf("(%s:%c:%d:%d): refuses WIDE negotiation.  Using "
 4770                        "8bit transfers\n", ahd_name(ahd),
devinfo->channel, devinfo->target, devinfo->lun);
ahd_set_width(ahd, devinfo, MSG_EXT_WDTR_BUS_8_BIT,
AHD_TRANS_ACTIVE|AHD_TRANS_GOAL,
 4774                               /*paused*/TRUE);
 4775                 /*
 4776                  * No need to clear the sync rate.  If the target
 4777                  * did not accept the command, our syncrate is
 4778                  * unaffected.  If the target started the negotiation,
 4779                  * but rejected our response, we already cleared the
 4780                  * sync rate before sending our WDTR.
 4781                  */
 4782                 if (tinfo->goal.offset != tinfo->curr.offset) {
 4784                         /* Start the sync negotiation */
ahd->msgout_index = 0;
ahd->msgout_len = 0;
ahd_build_transfer_msg(ahd, devinfo);
ahd->msgout_index = 0;
response = 1;
 4790                 }
 4791         } else if (ahd_sent_msg(ahd, AHDMSG_EXT, MSG_EXT_SDTR, /*full*/FALSE)) {
 4792                 /* note asynch xfers and clear flag */
ahd_set_syncrate(ahd, devinfo, /*period*/0,
 4794                                  /*offset*/0, /*ppr_options*/0,
AHD_TRANS_ACTIVE|AHD_TRANS_GOAL,
 4796                                  /*paused*/TRUE);
printf("(%s:%c:%d:%d): refuses synchronous negotiation. "
 4798                        "Using asynchronous transfers\n",
ahd_name(ahd), devinfo->channel,
devinfo->target, devinfo->lun);
 4801         } else if ((scb->hscb->control & MSG_SIMPLE_TASK) != 0) {
 4802                 int tag_type;
 4803                 int mask;
tag_type = (scb->hscb->control & MSG_SIMPLE_TASK);
 4807                 if (tag_type == MSG_SIMPLE_TASK) {
printf("(%s:%c:%d:%d): refuses tagged commands.  "
 4809                                "Performing non-tagged I/O\n", ahd_name(ahd),
devinfo->channel, devinfo->target, devinfo->lun);
ahd_set_tags(ahd, devinfo, AHD_QUEUE_NONE);
mask = ~0x23;
 4813                 } else {
printf("(%s:%c:%d:%d): refuses %s tagged commands.  "
 4815                                "Performing simple queue tagged I/O only\n",
ahd_name(ahd), devinfo->channel, devinfo->target,
devinfo->lun, tag_type == MSG_ORDERED_TASK
 4818                                ? "ordered" : "head of queue");
ahd_set_tags(ahd, devinfo, AHD_QUEUE_BASIC);
mask = ~0x03;
 4821                 }
 4823                 /*
 4824                  * Resend the identify for this CCB as the target
 4825                  * may believe that the selection is invalid otherwise.
 4826                  */
ahd_outb(ahd, SCB_CONTROL,
ahd_inb_scbram(ahd, SCB_CONTROL) & mask);
scb->hscb->control &= mask;
aic_set_transaction_tag(scb, /*enabled*/FALSE,
 4831                                         /*type*/MSG_SIMPLE_TASK);
ahd_outb(ahd, MSG_OUT, MSG_IDENTIFYFLAG);
ahd_assert_atn(ahd);
ahd_busy_tcl(ahd, BUILD_TCL(scb->hscb->scsiid, devinfo->lun),
SCB_GET_TAG(scb));
 4837                 /*
 4838                  * Requeue all tagged commands for this target
 4839                  * currently in our posession so they can be
 4840                  * converted to untagged commands.
 4841                  */
ahd_search_qinfifo(ahd, SCB_GET_TARGET(ahd, scb),
SCB_GET_CHANNEL(ahd, scb),
SCB_GET_LUN(scb), /*tag*/SCB_LIST_NULL,
ROLE_INITIATOR, CAM_REQUEUE_REQ,
SEARCH_COMPLETE);
 4847         } else if (ahd_sent_msg(ahd, AHDMSG_1B, MSG_IDENTIFYFLAG, TRUE)) {
 4848                 /*
 4849                  * Most likely the device believes that we had
 4850                  * previously negotiated packetized.
 4851                  */
ahd->msg_flags |= MSG_FLAG_EXPECT_PPR_BUSFREE
 4853                                |  MSG_FLAG_IU_REQ_CHANGED;
ahd_force_renegotiation(ahd, devinfo);
ahd->msgout_index = 0;
ahd->msgout_len = 0;
ahd_build_transfer_msg(ahd, devinfo);
ahd->msgout_index = 0;
response = 1;
 4861         } else {
 4862                 /*
 4863                  * Otherwise, we ignore it.
 4864                  */
printf("%s:%c:%d: Message reject for %x -- ignored\n",
ahd_name(ahd), devinfo->channel, devinfo->target,
last_msg);
 4868         }
 4869         return (response);
 4870 }
 4872 /*
 4873  * Process an ingnore wide residue message.
 4874  */
 4875 void
ahd_handle_ign_wide_residue(struct ahd_softc *ahd, struct ahd_devinfo *devinfo)
 4877 {
u_int scb_index;
 4879         struct scb *scb;
scb_index = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scb_index);
 4883         /*
 4884          * XXX Actually check data direction in the sequencer?
 4885          * Perhaps add datadir to some spare bits in the hscb?
 4886          */
 4887         if ((ahd_inb(ahd, SEQ_FLAGS) & DPHASE) == 0
 4888          || aic_get_transfer_dir(scb) != CAM_DIR_IN) {
 4889                 /*
 4890                  * Ignore the message if we haven't
 4891                  * seen an appropriate data phase yet.
 4892                  */
 4893         } else {
 4894                 /*
 4895                  * If the residual occurred on the last
 4896                  * transfer and the transfer request was
 4897                  * expected to end on an odd count, do
 4898                  * nothing.  Otherwise, subtract a byte
 4899                  * and update the residual count accordingly.
 4900                  */
uint32_t sgptr;
sgptr = ahd_inb_scbram(ahd, SCB_RESIDUAL_SGPTR);
 4904                 if ((sgptr & SG_LIST_NULL) != 0
 4905                  && (ahd_inb_scbram(ahd, SCB_TASK_ATTRIBUTE)
 4906                      & SCB_XFERLEN_ODD) != 0) {
 4907                         /*
 4908                          * If the residual occurred on the last
 4909                          * transfer and the transfer request was
 4910                          * expected to end on an odd count, do
 4911                          * nothing.
 4912                          */
 4913                 } else {
uint32_t data_cnt;
uint64_t data_addr;
uint32_t sglen;
 4918                         /* Pull in the rest of the sgptr */
sgptr = ahd_inl_scbram(ahd, SCB_RESIDUAL_SGPTR);
data_cnt = ahd_inl_scbram(ahd, SCB_RESIDUAL_DATACNT);
 4921                         if ((sgptr & SG_LIST_NULL) != 0) {
 4922                                 /*
 4923                                  * The residual data count is not updated
 4924                                  * for the command run to completion case.
 4925                                  * Explicitly zero the count.
 4926                                  */
data_cnt &= ~AHD_SG_LEN_MASK;
 4928                         }
data_addr = ahd_inq(ahd, SHADDR);
data_cnt += 1;
data_addr -= 1;
sgptr &= SG_PTR_MASK;
 4933                         if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
 4934                                 struct ahd_dma64_seg *sg;
sg = ahd_sg_bus_to_virt(ahd, scb, sgptr);
 4938                                 /*
 4939                                  * The residual sg ptr points to the next S/G
 4940                                  * to load so we must go back one.
 4941                                  */
sg--;
sglen = aic_le32toh(sg->len) & AHD_SG_LEN_MASK;
 4944                                 if (sg != scb->sg_list
 4945                                  && sglen < (data_cnt & AHD_SG_LEN_MASK)) {
sg--;
sglen = aic_le32toh(sg->len);
 4949                                         /*
 4950                                          * Preserve High Address and SG_LIST
 4951                                          * bits while setting the count to 1.
 4952                                          */
data_cnt = 1|(sglen&(~AHD_SG_LEN_MASK));
data_addr = aic_le64toh(sg->addr)
 4955                                                   + (sglen & AHD_SG_LEN_MASK)
 4956                                                   - 1;
 4958                                         /*
 4959                                          * Increment sg so it points to the
 4960                                          * "next" sg.
 4961                                          */
sg++;
sgptr = ahd_sg_virt_to_bus(ahd, scb,
sg);
 4965                                 }
 4966                         } else {
 4967                                 struct ahd_dma_seg *sg;
sg = ahd_sg_bus_to_virt(ahd, scb, sgptr);
 4971                                 /*
 4972                                  * The residual sg ptr points to the next S/G
 4973                                  * to load so we must go back one.
 4974                                  */
sg--;
sglen = aic_le32toh(sg->len) & AHD_SG_LEN_MASK;
 4977                                 if (sg != scb->sg_list
 4978                                  && sglen < (data_cnt & AHD_SG_LEN_MASK)) {
sg--;
sglen = aic_le32toh(sg->len);
 4982                                         /*
 4983                                          * Preserve High Address and SG_LIST
 4984                                          * bits while setting the count to 1.
 4985                                          */
data_cnt = 1|(sglen&(~AHD_SG_LEN_MASK));
data_addr = aic_le32toh(sg->addr)
 4988                                                   + (sglen & AHD_SG_LEN_MASK)
 4989                                                   - 1;
 4991                                         /*
 4992                                          * Increment sg so it points to the
 4993                                          * "next" sg.
 4994                                          */
sg++;
sgptr = ahd_sg_virt_to_bus(ahd, scb,
sg);
 4998                                 }
 4999                         }
 5000                         /*
 5001                          * Toggle the "oddness" of the transfer length
 5002                          * to handle this mid-transfer ignore wide
 5003                          * residue.  This ensures that the oddness is
 5004                          * correct for subsequent data transfers.
 5005                          */
ahd_outb(ahd, SCB_TASK_ATTRIBUTE,
ahd_inb_scbram(ahd, SCB_TASK_ATTRIBUTE)
 5008                             ^ SCB_XFERLEN_ODD);
ahd_outl(ahd, SCB_RESIDUAL_SGPTR, sgptr);
ahd_outl(ahd, SCB_RESIDUAL_DATACNT, data_cnt);
 5012                         /*
 5013                          * The FIFO's pointers will be updated if/when the
 5014                          * sequencer re-enters a data phase.
 5015                          */
 5016                 }
 5017         }
 5018 }
 5021 /*
 5022  * Reinitialize the data pointers for the active transfer
 5023  * based on its current residual.
 5024  */
 5025 void
ahd_reinitialize_dataptrs(struct ahd_softc *ahd)
 5027 {
 5028         struct           scb *scb;
ahd_mode_state   saved_modes;
u_int            scb_index;
u_int            wait;
uint32_t         sgptr;
uint32_t         resid;
uint64_t         dataptr;
AHD_ASSERT_MODES(ahd, AHD_MODE_DFF0_MSK|AHD_MODE_DFF1_MSK,
AHD_MODE_DFF0_MSK|AHD_MODE_DFF1_MSK);
scb_index = ahd_get_scbptr(ahd);
scb = ahd_lookup_scb(ahd, scb_index);
 5042         /*
 5043          * Release and reacquire the FIFO so we
 5044          * have a clean slate.
 5045          */
ahd_outb(ahd, DFFSXFRCTL, CLRCHN);
wait = 1000;
 5048         while (--wait && !(ahd_inb(ahd, MDFFSTAT) & FIFOFREE))
aic_delay(100);
 5050         if (wait == 0) {
ahd_print_path(ahd, scb);
printf("ahd_reinitialize_dataptrs: Forcing FIFO free.\n");
ahd_outb(ahd, DFFSXFRCTL, RSTCHN|CLRSHCNT);
 5054         }
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
ahd_outb(ahd, DFFSTAT,
ahd_inb(ahd, DFFSTAT)
 5059                 | (saved_modes == 0x11 ? CURRFIFO_1 : CURRFIFO_0));
 5061         /*
 5062          * Determine initial values for data_addr and data_cnt
 5063          * for resuming the data phase.
 5064          */
sgptr = ahd_inl_scbram(ahd, SCB_RESIDUAL_SGPTR);
sgptr &= SG_PTR_MASK;
resid = (ahd_inb_scbram(ahd, SCB_RESIDUAL_DATACNT + 2) << 16)
 5069               | (ahd_inb_scbram(ahd, SCB_RESIDUAL_DATACNT + 1) << 8)
 5070               | ahd_inb_scbram(ahd, SCB_RESIDUAL_DATACNT);
 5072         if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
 5073                 struct ahd_dma64_seg *sg;
sg = ahd_sg_bus_to_virt(ahd, scb, sgptr);
 5077                 /* The residual sg_ptr always points to the next sg */
sg--;
dataptr = aic_le64toh(sg->addr)
 5081                         + (aic_le32toh(sg->len) & AHD_SG_LEN_MASK)
 5082                         - resid;
ahd_outl(ahd, HADDR + 4, dataptr >> 32);
 5084         } else {
 5085                 struct   ahd_dma_seg *sg;
sg = ahd_sg_bus_to_virt(ahd, scb, sgptr);
 5089                 /* The residual sg_ptr always points to the next sg */
sg--;
dataptr = aic_le32toh(sg->addr)
 5093                         + (aic_le32toh(sg->len) & AHD_SG_LEN_MASK)
 5094                         - resid;
ahd_outb(ahd, HADDR + 4,
 5096                          (aic_le32toh(sg->len) & ~AHD_SG_LEN_MASK) >> 24);
 5097         }
ahd_outl(ahd, HADDR, dataptr);
ahd_outb(ahd, HCNT + 2, resid >> 16);
ahd_outb(ahd, HCNT + 1, resid >> 8);
ahd_outb(ahd, HCNT, resid);
 5102 }
 5104 /*
 5105  * Handle the effects of issuing a bus device reset message.
 5106  */
 5107 void
ahd_handle_devreset(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
u_int lun, cam_status status, char *message,
 5110                     int verbose_level)
 5111 {
 5112 #ifdef AHD_TARGET_MODE
 5113         struct ahd_tmode_tstate* tstate;
 5114 #endif
 5115         int found;
found = ahd_abort_scbs(ahd, devinfo->target, devinfo->channel,
lun, SCB_LIST_NULL, devinfo->role,
status);
 5121 #ifdef AHD_TARGET_MODE
 5122         /*
 5123          * Send an immediate notify ccb to all target mord peripheral
 5124          * drivers affected by this action.
 5125          */
tstate = ahd->enabled_targets[devinfo->our_scsiid];
 5127         if (tstate != NULL) {
u_int cur_lun;
u_int max_lun;
 5131                 if (lun != CAM_LUN_WILDCARD) {
cur_lun = 0;
max_lun = AHD_NUM_LUNS - 1;
 5134                 } else {
cur_lun = lun;
max_lun = lun;
 5137                 }
 5138                 for (cur_lun <= max_lun; cur_lun++) {
 5139                         struct ahd_tmode_lstate* lstate;
lstate = tstate->enabled_luns[cur_lun];
 5142                         if (lstate == NULL)
 5143                                 continue;
ahd_queue_lstate_event(ahd, lstate, devinfo->our_scsiid,
MSG_BUS_DEV_RESET, /*arg*/0);
ahd_send_lstate_events(ahd, lstate);
 5148                 }
 5149         }
 5150 #endif
 5152         /*
 5153          * Go back to async/narrow transfers and renegotiate.
 5154          */
ahd_set_width(ahd, devinfo, MSG_EXT_WDTR_BUS_8_BIT,
AHD_TRANS_CUR, /*paused*/TRUE);
ahd_set_syncrate(ahd, devinfo, /*period*/0, /*offset*/0,
 5158                          /*ppr_options*/0, AHD_TRANS_CUR,
 5159                          /*paused*/TRUE);
 5161 #if 0
 5162         if (status != CAM_SEL_TIMEOUT)
ahd_send_async(ahd, devinfo->channel, devinfo->target,
lun, AC_SENT_BDR, NULL);
 5165 #endif
 5167         if (message != NULL
 5168          && (verbose_level <= bootverbose))
printf("%s: %s on %c:%d. %d SCBs aborted\n", ahd_name(ahd),
message, devinfo->channel, devinfo->target, found);
 5171 }
 5173 #ifdef AHD_TARGET_MODE
 5174 void
ahd_setup_target_msgin(struct ahd_softc *ahd, struct ahd_devinfo *devinfo,
 5176                        struct scb *scb)
 5177 {
 5179         /*              
 5180          * To facilitate adding multiple messages together,
 5181          * each routine should increment the index and len
 5182          * variables instead of setting them explicitly.
 5183          */             
ahd->msgout_index = 0;
ahd->msgout_len = 0;
 5187         if (scb != NULL && (scb->flags & SCB_AUTO_NEGOTIATE) != 0)
ahd_build_transfer_msg(ahd, devinfo);
 5189         else
panic("ahd_intr: AWAITING target message with no message");
ahd->msgout_index = 0;
ahd->msg_type = MSG_TYPE_TARGET_MSGIN;
 5194 }
 5195 #endif
 5196 /**************************** Initialization **********************************/
u_int
ahd_sglist_size(struct ahd_softc *ahd)
 5199 {
bus_size_t list_size;
list_size = sizeof(struct ahd_dma_seg) * AHD_NSEG;
 5203         if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0)
list_size = sizeof(struct ahd_dma64_seg) * AHD_NSEG;
 5205         return (list_size);
 5206 }
 5208 /*
 5209  * Calculate the optimum S/G List allocation size.  S/G elements used
 5210  * for a given transaction must be physically contiguous.  Assume the
 5211  * OS will allocate full pages to us, so it doesn't make sense to request
 5212  * less than a page.
 5213  */
u_int
ahd_sglist_allocsize(struct ahd_softc *ahd)
 5216 {
bus_size_t sg_list_increment;
bus_size_t sg_list_size;
bus_size_t max_list_size;
bus_size_t best_list_size;
 5222         /* Start out with the minimum required for AHD_NSEG. */
sg_list_increment = ahd_sglist_size(ahd);
sg_list_size = sg_list_increment;
 5226         /* Get us as close as possible to a page in size. */
 5227         while ((sg_list_size + sg_list_increment) <= PAGE_SIZE)
sg_list_size += sg_list_increment;
 5230         /*
 5231          * Try to reduce the amount of wastage by allocating
 5232          * multiple pages.
 5233          */
best_list_size = sg_list_size;
max_list_size = roundup(sg_list_increment, PAGE_SIZE);
 5236         if (max_list_size < 4 * PAGE_SIZE)
max_list_size = 4 * PAGE_SIZE;
 5238         if (max_list_size > (AHD_SCB_MAX_ALLOC * sg_list_increment))
max_list_size = (AHD_SCB_MAX_ALLOC * sg_list_increment);
 5240         while ((sg_list_size + sg_list_increment) <= max_list_size
 5241            &&  (sg_list_size % PAGE_SIZE) != 0) {
bus_size_t new_mod;
bus_size_t best_mod;
sg_list_size += sg_list_increment;
new_mod = sg_list_size % PAGE_SIZE;
best_mod = best_list_size % PAGE_SIZE;
 5248                 if (new_mod > best_mod || new_mod == 0) {
best_list_size = sg_list_size;
 5250                 }
 5251         }
 5252         return (best_list_size);
 5253 }
 5255 /*
 5256  * Perform initial initialization for a controller structure.
 5257  */
 5258 struct ahd_softc *
ahd_alloc(void *platform_arg, char *name)
 5260 {
 5261         struct ahd_softc *ahd = (struct ahd_softc *)platform_arg;
ahd->seep_config = malloc(sizeof(*ahd->seep_config),
M_DEVBUF, M_NOWAIT);
 5265         if (ahd->seep_config == NULL)
 5266                 return (NULL);
LIST_INIT(&ahd->pending_scbs);
LIST_INIT(&ahd->timedout_scbs);
 5271         /* We don't know our unit number until the OSM sets it */
ahd->name = name;
ahd->unit = -1;
ahd->bus_description = NULL;
ahd->channel = 'A';
ahd->chip = AHD_NONE;
ahd->features = AHD_FENONE;
ahd->bugs = AHD_BUGNONE;
ahd->flags = AHD_SPCHK_ENB_A|AHD_RESET_BUS_A|AHD_TERM_ENB_A
 5280                    | AHD_EXTENDED_TRANS_A|AHD_STPWLEVEL_A;
ahd->int_coalescing_timer = AHD_INT_COALESCING_TIMER_DEFAULT;
ahd->int_coalescing_maxcmds = AHD_INT_COALESCING_MAXCMDS_DEFAULT;
ahd->int_coalescing_mincmds = AHD_INT_COALESCING_MINCMDS_DEFAULT;
ahd->int_coalescing_threshold = AHD_INT_COALESCING_THRESHOLD_DEFAULT;
ahd->int_coalescing_stop_threshold =
AHD_INT_COALESCING_STOP_THRESHOLD_DEFAULT;
 5288         if (ahd_platform_alloc(ahd, platform_arg) != 0) {
free(ahd->seep_config, M_DEVBUF);
 5290                 return (NULL);
 5291         }       
 5293 #ifdef AHD_DEBUG
 5294         if ((ahd_debug & AHD_SHOW_MEMORY) != 0) {
printf("%s: scb size = 0x%x, hscb size = 0x%x\n",
ahd_name(ahd), (u_int)sizeof(struct scb),
 5297                        (u_int)sizeof(struct hardware_scb));
 5298         }
 5299 #endif
 5300         return (ahd);
 5301 }
 5303 int
ahd_softc_init(struct ahd_softc *ahd)
 5305 {
ahd->unpause = 0;
ahd->pause = PAUSE; 
 5309         return (0);
 5310 }
 5312 void
ahd_softc_insert(struct ahd_softc *ahd)
 5314 {
 5315         struct ahd_softc *list_ahd;
 5317 #if AHD_PCI_CONFIG > 0
 5318         /*
 5319          * Second Function PCI devices need to inherit some
 5320          * settings from function 0.
 5321          */
 5322         if ((ahd->features & AHD_MULTI_FUNC) != 0) {
TAILQ_FOREACH(list_ahd, &ahd_tailq, links) {
aic_dev_softc_t list_pci;
aic_dev_softc_t pci;
list_pci = list_ahd->dev_softc;
pci = ahd->dev_softc;
 5329                         if (aic_get_pci_slot(list_pci) == aic_get_pci_slot(pci)
 5330                          && aic_get_pci_bus(list_pci) == aic_get_pci_bus(pci)) {
 5331                                 struct ahd_softc *master;
 5332                                 struct ahd_softc *slave;
 5334                                 if (aic_get_pci_function(list_pci) == 0) {
master = list_ahd;
slave = ahd;
 5337                                 } else {
master = ahd;
slave = list_ahd;
 5340                                 }
slave->flags &= ~AHD_BIOS_ENABLED; 
slave->flags |=
master->flags & AHD_BIOS_ENABLED;
 5344                                 break;
 5345                         }
 5346                 }
 5347         }
 5348 #endif
 5350         /*
 5351          * Insertion sort into our list of softcs.
 5352          */
list_ahd = TAILQ_FIRST(&ahd_tailq);
 5354         while (list_ahd != NULL
 5355             && ahd_softc_comp(ahd, list_ahd) <= 0)
list_ahd = TAILQ_NEXT(list_ahd, links);
 5357         if (list_ahd != NULL)
TAILQ_INSERT_BEFORE(list_ahd, ahd, links);
 5359         else
TAILQ_INSERT_TAIL(&ahd_tailq, ahd, links);
ahd->init_level++;
 5362 }
 5364 /*
 5365  * Verify that the passed in softc pointer is for a
 5366  * controller that is still configured.
 5367  */
 5368 struct ahd_softc *
ahd_find_softc(struct ahd_softc *ahd)
 5370 {
 5371         struct ahd_softc *list_ahd;
TAILQ_FOREACH(list_ahd, &ahd_tailq, links) {
 5374                 if (list_ahd == ahd)
 5375                         return (ahd);
 5376         }
 5377         return (NULL);
 5378 }
 5380 void
ahd_set_unit(struct ahd_softc *ahd, int unit)
 5382 {
ahd->unit = unit;
 5384 }
 5386 void
ahd_set_name(struct ahd_softc *ahd, char *name)
 5388 {
 5389         if (ahd->name != NULL)
free(ahd->name, M_DEVBUF);
ahd->name = name;
 5392 }
 5394 void
ahd_free(struct ahd_softc *ahd)
 5396 {
 5397         int i;
 5399         switch (ahd->init_level) {
 5400         default:
 5401         case 2:
ahd_shutdown(ahd);
TAILQ_REMOVE(&ahd_tailq, ahd, links);
 5404                 /* FALLTHROUGH */
 5405         case 1:
ahd_freedmamem(ahd, &ahd->shared_data_map);
 5407                 break;
 5408         case 0:
 5409                 break;
 5410         }
ahd_platform_free(ahd);
ahd_fini_scbdata(ahd);
 5414         for (i = 0; i < AHD_NUM_TARGETS; i++) {
 5415                 struct ahd_tmode_tstate *tstate;
tstate = ahd->enabled_targets[i];
 5418                 if (tstate != NULL) {
 5419 #if AHD_TARGET_MODE
 5420                         int j;
 5422                         for (j = 0; j < AHD_NUM_LUNS; j++) {
 5423                                 struct ahd_tmode_lstate *lstate;
lstate = tstate->enabled_luns[j];
 5426                                 if (lstate != NULL) {
xpt_free_path(lstate->path);
free(lstate, M_DEVBUF);
 5429                                 }
 5430                         }
 5431 #endif
free(tstate, M_DEVBUF);
 5433                 }
 5434         }
 5435 #if AHD_TARGET_MODE
 5436         if (ahd->black_hole != NULL) {
xpt_free_path(ahd->black_hole->path);
free(ahd->black_hole, M_DEVBUF);
 5439         }
 5440 #endif
 5441         if (ahd->seep_config != NULL)
free(ahd->seep_config, M_DEVBUF);
 5443         if (ahd->saved_stack != NULL)
free(ahd->saved_stack, M_DEVBUF);
 5445         return;
 5446 }
 5448 void
ahd_shutdown(void *arg)
 5450 {
 5451         struct  ahd_softc *ahd;
ahd = (struct ahd_softc *)arg;
 5455         /*
 5456          * Stop periodic timer callbacks.
 5457          */
aic_timer_stop(&ahd->reset_timer);
aic_timer_stop(&ahd->stat_timer);
 5461         /* This will reset most registers to 0, but not all */
ahd_reset(ahd, /*reinit*/FALSE);
 5463 }
 5465 /*
 5466  * Reset the controller and record some information about it
 5467  * that is only available just after a reset.  If "reinit" is
 5468  * non-zero, this reset occured after initial configuration
 5469  * and the caller requests that the chip be fully reinitialized
 5470  * to a runable state.  Chip interrupts are *not* enabled after
 5471  * a reinitialization.  The caller must enable interrupts via
 5472  * ahd_intr_enable().
 5473  */
 5474 int
ahd_reset(struct ahd_softc *ahd, int reinit)
 5476 {
 5477         const pci_chipset_tag_t pc = ahd->dev_softc->pa_pc;
 5478         const pcitag_t tag = ahd->dev_softc->pa_tag;
u_int    sxfrctl1;
 5480         int      wait;
pcireg_t cmd;
 5483         /*
 5484          * Preserve the value of the SXFRCTL1 register for all channels.
 5485          * It contains settings that affect termination and we don't want
 5486          * to disturb the integrity of the bus.
 5487          */
ahd_pause(ahd);
ahd_update_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
sxfrctl1 = ahd_inb(ahd, SXFRCTL1);
cmd = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
 5495         if ((ahd->bugs & AHD_PCIX_CHIPRST_BUG) != 0) {
pcireg_t mod_cmd;
 5498                 /*
 5499                  * A4 Razor #632
 5500                  * During the assertion of CHIPRST, the chip
 5501                  * does not disable its parity logic prior to
 5502                  * the start of the reset.  This may cause a
 5503                  * parity error to be detected and thus a
 5504                  * spurious SERR or PERR assertion.  Disble
 5505                  * PERR and SERR responses during the CHIPRST.
 5506                  */
mod_cmd = cmd & ~(PCI_COMMAND_PARITY_ENABLE|PCI_COMMAND_SERR_ENABLE);
pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, mod_cmd);
 5509         }
ahd_outb(ahd, HCNTRL, CHIPRST | ahd->pause);
 5512         /*
 5513          * Ensure that the reset has finished.  We delay 1000us
 5514          * prior to reading the register to make sure the chip
 5515          * has sufficiently completed its reset to handle register
 5516          * accesses.
 5517          */
wait = 1000;
 5519         do {
aic_delay(1000);
 5521         } while (--wait && !(ahd_inb(ahd, HCNTRL) & CHIPRSTACK));
 5523         if (wait == 0) {
printf("%s: WARNING - Failed chip reset!  "
 5525                        "Trying to initialize anyway.\n", ahd_name(ahd));
 5526         }
ahd_outb(ahd, HCNTRL, ahd->pause);
 5529         if ((ahd->bugs & AHD_PCIX_CHIPRST_BUG) != 0) {
 5530                 /*
 5531                  * Clear any latched PCI error status and restore
 5532                  * previous SERR and PERR response enables.
 5533                  */
pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, cmd |
 5535                     (PCI_STATUS_PARITY_ERROR | PCI_STATUS_TARGET_TARGET_ABORT |
PCI_STATUS_MASTER_TARGET_ABORT | PCI_STATUS_MASTER_ABORT |
PCI_STATUS_SPECIAL_ERROR));
 5539         }
 5541         /*
 5542          * Mode should be SCSI after a chip reset, but lets
 5543          * set it just to be safe.  We touch the MODE_PTR
 5544          * register directly so as to bypass the lazy update
 5545          * code in ahd_set_modes().
 5546          */
ahd_known_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
ahd_outb(ahd, MODE_PTR,
ahd_build_mode_state(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI));
 5551         /*
 5552          * Restore SXFRCTL1.
 5553          *
 5554          * We must always initialize STPWEN to 1 before we
 5555          * restore the saved values.  STPWEN is initialized
 5556          * to a tri-state condition which can only be cleared
 5557          * by turning it on.
 5558          */
ahd_outb(ahd, SXFRCTL1, sxfrctl1|STPWEN);
ahd_outb(ahd, SXFRCTL1, sxfrctl1);
 5562         /* Determine chip configuration */
ahd->features &= ~AHD_WIDE;
 5564         if ((ahd_inb(ahd, SBLKCTL) & SELWIDE) != 0)
ahd->features |= AHD_WIDE;
 5567         /*
 5568          * If a recovery action has forced a chip reset,
 5569          * re-initialize the chip to our liking.
 5570          */
 5571         if (reinit != 0)
ahd_chip_init(ahd);
 5574         return (0);
 5575 }
 5577 /*
 5578  * Determine the number of SCBs available on the controller
 5579  */
 5580 int
ahd_probe_scbs(struct ahd_softc *ahd) {
 5582         int i;
AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK),
 5585                          ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK));
 5586         for (i = 0; i < AHD_SCB_MAX; i++) {
 5587                 int j;
ahd_set_scbptr(ahd, i);
ahd_outw(ahd, SCB_BASE, i);
 5591                 for (j = 2; j < 64; j++)
ahd_outb(ahd, SCB_BASE+j, 0);
 5593                 /* Start out life as unallocated (needing an abort) */
ahd_outb(ahd, SCB_CONTROL, MK_MESSAGE);
 5595                 if (ahd_inw_scbram(ahd, SCB_BASE) != i)
 5596                         break;
ahd_set_scbptr(ahd, 0);
 5598                 if (ahd_inw_scbram(ahd, SCB_BASE) != 0)
 5599                         break;
 5600         }
 5601         return (i);
 5602 }
 5604 void
ahd_initialize_hscbs(struct ahd_softc *ahd)
 5606 {
 5607         int i;
 5609         for (i = 0; i < ahd->scb_data.maxhscbs; i++) {
ahd_set_scbptr(ahd, i);
 5612                 /* Clear the control byte. */
ahd_outb(ahd, SCB_CONTROL, 0);
 5615                 /* Set the next pointer */
ahd_outw(ahd, SCB_NEXT, SCB_LIST_NULL);
 5617         }
 5618 }
 5620 int
ahd_init_scbdata(struct ahd_softc *ahd)
 5622 {
 5623         struct  scb_data *scb_data;
 5624         int     i;
scb_data = &ahd->scb_data;
TAILQ_INIT(&scb_data->free_scbs);
 5628         for (i = 0; i < AHD_NUM_TARGETS * AHD_NUM_LUNS_NONPKT; i++)
LIST_INIT(&scb_data->free_scb_lists[i]);
LIST_INIT(&scb_data->any_dev_free_scb_list);
SLIST_INIT(&scb_data->hscb_maps);
SLIST_INIT(&scb_data->sg_maps);
SLIST_INIT(&scb_data->sense_maps);
 5635         /* Determine the number of hardware SCBs and initialize them */
scb_data->maxhscbs = ahd_probe_scbs(ahd);
 5637         if (scb_data->maxhscbs == 0) {
printf("%s: No SCB space found\n", ahd_name(ahd));
 5639                 return (ENXIO);
 5640         }
ahd_initialize_hscbs(ahd);
 5644         /*
 5645          * Create our DMA tags.  These tags define the kinds of device
 5646          * accessible memory allocations and memory mappings we will
 5647          * need to perform during normal operation.
 5648          *
 5649          * Unless we need to further restrict the allocation, we rely
 5650          * on the restrictions of the parent dmat, hence the common
 5651          * use of MAXADDR and MAXSIZE.
 5652          */
 5654         /* Perform initial CCB allocation */
 5655         do {
i = scb_data->numscbs;
ahd_alloc_scbs(ahd);
 5658         } while ((i != scb_data->numscbs) && 
 5659             (scb_data->numscbs < AHD_SCB_MAX_ALLOC));
 5661         if (scb_data->numscbs != AHD_SCB_MAX_ALLOC) {
printf("%s: ahd_init_scbdata - "
 5663                        "Unable to allocate initial scbs\n",
ahd_name(ahd));
 5665                 goto error_exit;
 5666         }
 5668         /*
 5669          * Note that we were successfull
 5670          */
 5671         return (0); 
error_exit:
 5675         return (ENOMEM);
 5676 }
 5678 struct scb *
ahd_find_scb_by_tag(struct ahd_softc *ahd, u_int tag)
 5680 {
 5681         struct scb *scb;
 5683         /*
 5684          * Look on the pending list.
 5685          */
LIST_FOREACH(scb, &ahd->pending_scbs, pending_links) {
 5687                 if (SCB_GET_TAG(scb) == tag)
 5688                         return (scb);
 5689         }
 5691         /*
 5692          * Then on all of the collision free lists.
 5693          */
TAILQ_FOREACH(scb, &ahd->scb_data.free_scbs, links.tqe) {
 5695                 struct scb *list_scb;
list_scb = scb;
 5698                 do {
 5699                         if (SCB_GET_TAG(list_scb) == tag)
 5700                                 return (list_scb);
list_scb = LIST_NEXT(list_scb, collision_links);
 5702                 } while (list_scb);
 5703         }
 5705         /*
 5706          * And finally on the generic free list.
 5707          */
LIST_FOREACH(scb, &ahd->scb_data.any_dev_free_scb_list, links.le) {
 5709                 if (SCB_GET_TAG(scb) == tag)
 5710                         return (scb);
 5711         }
 5713         return (NULL);
 5714 }
 5716 void
ahd_fini_scbdata(struct ahd_softc *ahd)
 5718 {
 5719         struct scb_data *scb_data;
scb_data = &ahd->scb_data;
 5722         if (scb_data == NULL)
 5723                 return;
 5725         switch (scb_data->init_level) {
 5726         default:
 5727         case 3:
 5728         {
 5729                 struct map_node *sns_map;
 5731                 while ((sns_map = SLIST_FIRST(&scb_data->sense_maps)) != NULL) {
SLIST_REMOVE_HEAD(&scb_data->sense_maps, links);
ahd_freedmamem(ahd, sns_map);
free(sns_map, M_DEVBUF);
 5735                 }
 5736                 /* FALLTHROUGH */
 5737         }
 5738         case 2:
 5739         {
 5740                 struct map_node *sg_map;
 5742                 while ((sg_map = SLIST_FIRST(&scb_data->sg_maps)) != NULL) {
SLIST_REMOVE_HEAD(&scb_data->sg_maps, links);
ahd_freedmamem(ahd, sg_map);
free(sg_map, M_DEVBUF);
 5746                 }
 5747                 /* FALLTHROUGH */
 5748         }
 5749         case 1:
 5750         {
 5751                 struct map_node *hscb_map;
 5753                 while ((hscb_map = SLIST_FIRST(&scb_data->hscb_maps)) != NULL) {
SLIST_REMOVE_HEAD(&scb_data->hscb_maps, links);
ahd_freedmamem(ahd, hscb_map);
free(hscb_map, M_DEVBUF);
 5757                 }
 5758                 /* FALLTHROUGH */
 5759         }
 5760         case 0:
 5761                 break;
 5762         }
 5763 }
 5765 /*
 5766  * DSP filter Bypass must be enabled until the first selection
 5767  * after a change in bus mode (Razor #491 and #493).
 5768  */
 5769 void
ahd_setup_iocell_workaround(struct ahd_softc *ahd)
 5771 {
ahd_mode_state saved_modes;
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_CFG, AHD_MODE_CFG);
ahd_outb(ahd, DSPDATACTL, ahd_inb(ahd, DSPDATACTL)
 5777                | BYPASSENAB | RCVROFFSTDIS | XMITOFFSTDIS);
ahd_outb(ahd, SIMODE0, ahd_inb(ahd, SIMODE0) | (ENSELDO|ENSELDI));
 5779 #ifdef AHD_DEBUG
 5780         if ((ahd_debug & AHD_SHOW_MISC) != 0)
printf("%s: Setting up iocell workaround\n", ahd_name(ahd));
 5782 #endif
ahd_restore_modes(ahd, saved_modes);
ahd->flags &= ~AHD_HAD_FIRST_SEL;
 5785 }
 5787 void
ahd_iocell_first_selection(struct ahd_softc *ahd)
 5789 {
ahd_mode_state  saved_modes;
u_int           sblkctl;
 5793         if ((ahd->flags & AHD_HAD_FIRST_SEL) != 0)
 5794                 return;
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
sblkctl = ahd_inb(ahd, SBLKCTL);
ahd_set_modes(ahd, AHD_MODE_CFG, AHD_MODE_CFG);
 5799 #ifdef AHD_DEBUG
 5800         if ((ahd_debug & AHD_SHOW_MISC) != 0)
printf("%s: iocell first selection\n", ahd_name(ahd));
 5802 #endif
 5803         if ((sblkctl & ENAB40) != 0) {
ahd_outb(ahd, DSPDATACTL,
ahd_inb(ahd, DSPDATACTL) & ~BYPASSENAB);
 5806 #ifdef AHD_DEBUG
 5807                 if ((ahd_debug & AHD_SHOW_MISC) != 0)
printf("%s: BYPASS now disabled\n", ahd_name(ahd));
 5809 #endif
 5810         }
ahd_outb(ahd, SIMODE0, ahd_inb(ahd, SIMODE0) & ~(ENSELDO|ENSELDI));
ahd_outb(ahd, CLRINT, CLRSCSIINT);
ahd_restore_modes(ahd, saved_modes);
ahd->flags |= AHD_HAD_FIRST_SEL;
 5815 }
 5817 /*************************** SCB Management ***********************************/
 5818 void
ahd_add_col_list(struct ahd_softc *ahd, struct scb *scb, u_int col_idx)
 5820 {
 5821         struct  scb_list *free_list;
 5822         struct  scb_tailq *free_tailq;
 5823         struct  scb *first_scb;
scb->flags |= SCB_ON_COL_LIST;
AHD_SET_SCB_COL_IDX(scb, col_idx);
free_list = &ahd->scb_data.free_scb_lists[col_idx];
free_tailq = &ahd->scb_data.free_scbs;
first_scb = LIST_FIRST(free_list);
 5830         if (first_scb != NULL) {
LIST_INSERT_AFTER(first_scb, scb, collision_links);
 5832         } else {
LIST_INSERT_HEAD(free_list, scb, collision_links);
TAILQ_INSERT_TAIL(free_tailq, scb, links.tqe);
 5835         }
 5836 }
 5838 void
ahd_rem_col_list(struct ahd_softc *ahd, struct scb *scb)
 5840 {
 5841         struct  scb_list *free_list;
 5842         struct  scb_tailq *free_tailq;
 5843         struct  scb *first_scb;
u_int   col_idx;
scb->flags &= ~SCB_ON_COL_LIST;
col_idx = AHD_GET_SCB_COL_IDX(ahd, scb);
free_list = &ahd->scb_data.free_scb_lists[col_idx];
free_tailq = &ahd->scb_data.free_scbs;
first_scb = LIST_FIRST(free_list);
 5851         if (first_scb == scb) {
 5852                 struct scb *next_scb;
 5854                 /*
 5855                  * Maintain order in the collision free
 5856                  * lists for fairness if this device has
 5857                  * other colliding tags active.
 5858                  */
next_scb = LIST_NEXT(scb, collision_links);
 5860                 if (next_scb != NULL) {
TAILQ_INSERT_AFTER(free_tailq, scb,
next_scb, links.tqe);
 5863                 }
TAILQ_REMOVE(free_tailq, scb, links.tqe);
 5865         }
LIST_REMOVE(scb, collision_links);
 5867 }
 5869 /*
 5870  * Get a free scb. If there are none, see if we can allocate a new SCB.
 5871  */
 5872 struct scb *
ahd_get_scb(struct ahd_softc *ahd, u_int col_idx)
 5874 {
 5875         struct scb *scb;
TAILQ_FOREACH(scb, &ahd->scb_data.free_scbs, links.tqe) {
 5878                 if (AHD_GET_SCB_COL_IDX(ahd, scb) != col_idx) {
ahd_rem_col_list(ahd, scb);
 5880                         goto found;
 5881                 }
 5882         }
 5883         if ((scb = LIST_FIRST(&ahd->scb_data.any_dev_free_scb_list)) == NULL) {
 5884                 /* All scb's are allocated at initialization in OpenBSD. */
 5885                 return (NULL);
 5886         }
LIST_REMOVE(scb, links.le);
 5888         if (col_idx != AHD_NEVER_COL_IDX
 5889          && (scb->col_scb != NULL)
 5890          && (scb->col_scb->flags & SCB_ACTIVE) == 0) {
LIST_REMOVE(scb->col_scb, links.le);
ahd_add_col_list(ahd, scb->col_scb, col_idx);
 5893         }
found:
scb->flags |= SCB_ACTIVE;
 5896         return (scb);
 5897 }
 5899 /*
 5900  * Return an SCB resource to the free list.
 5901  */
 5902 void
ahd_free_scb(struct ahd_softc *ahd, struct scb *scb)
 5904 {       
 5906         /* Clean up for the next user */
scb->flags = SCB_FLAG_NONE;
scb->hscb->control = 0;
ahd->scb_data.scbindex[SCB_GET_TAG(scb)] = NULL;
 5911         if (scb->col_scb == NULL) {
 5913                 /*
 5914                  * No collision possible.  Just free normally.
 5915                  */
LIST_INSERT_HEAD(&ahd->scb_data.any_dev_free_scb_list,
scb, links.le);
 5918         } else if ((scb->col_scb->flags & SCB_ON_COL_LIST) != 0) {
 5920                 /*
 5921                  * The SCB we might have collided with is on
 5922                  * a free collision list.  Put both SCBs on
 5923                  * the generic list.
 5924                  */
ahd_rem_col_list(ahd, scb->col_scb);
LIST_INSERT_HEAD(&ahd->scb_data.any_dev_free_scb_list,
scb, links.le);
LIST_INSERT_HEAD(&ahd->scb_data.any_dev_free_scb_list,
scb->col_scb, links.le);
 5930         } else if ((scb->col_scb->flags
 5931                   & (SCB_PACKETIZED|SCB_ACTIVE)) == SCB_ACTIVE
 5932                 && (scb->col_scb->hscb->control & TAG_ENB) != 0) {
 5934                 /*
 5935                  * The SCB we might collide with on the next allocation
 5936                  * is still active in a non-packetized, tagged, context.
 5937                  * Put us on the SCB collision list.
 5938                  */
ahd_add_col_list(ahd, scb,
AHD_GET_SCB_COL_IDX(ahd, scb->col_scb));
 5941         } else {
 5942                 /*
 5943                  * The SCB we might collide with on the next allocation
 5944                  * is either active in a packetized context, or free.
 5945                  * Since we can't collide, put this SCB on the generic
 5946                  * free list.
 5947                  */
LIST_INSERT_HEAD(&ahd->scb_data.any_dev_free_scb_list,
scb, links.le);
 5950         }
aic_platform_scb_free(ahd, scb);
 5953 }
 5955 void
ahd_alloc_scbs(struct ahd_softc *ahd)
 5957 {
 5958         struct scb_data *scb_data;
 5959         struct scb      *next_scb;
 5960         struct hardware_scb *hscb;
 5961         struct map_node *hscb_map;
 5962         struct map_node *sg_map;
 5963         struct map_node *sense_map;
uint8_t         *segs;
uint8_t         *sense_data;
bus_addr_t       hscb_busaddr;
bus_addr_t       sg_busaddr;
bus_addr_t       sense_busaddr;
 5969         int              newcount;
 5970         int              i;
scb_data = &ahd->scb_data;
 5973         if (scb_data->numscbs >= AHD_SCB_MAX_ALLOC)
 5974                 /* Can't allocate any more */
 5975                 return;
KASSERT(scb_data->scbs_left >= 0);
 5978         if (scb_data->scbs_left != 0) {
 5979                 int offset;
offset = (PAGE_SIZE / sizeof(*hscb)) - scb_data->scbs_left;
hscb_map = SLIST_FIRST(&scb_data->hscb_maps);
hscb = &((struct hardware_scb *)hscb_map->vaddr)[offset];
hscb_busaddr = hscb_map->busaddr + (offset * sizeof(*hscb));
 5985         } else {
hscb_map = malloc(sizeof(*hscb_map), M_DEVBUF, M_NOWAIT);
 5988                 if (hscb_map == NULL)
 5989                         return;
 5991                 /* Allocate the next batch of hardware SCBs */
 5992                 if (ahd_createdmamem(ahd, PAGE_SIZE, hscb_map,
 5993                     "hardware SCB structures") < 0) {
free(hscb_map, M_DEVBUF);
 5995                         return;
 5996                 }
SLIST_INSERT_HEAD(&scb_data->hscb_maps, hscb_map, links);
hscb = (struct hardware_scb *)hscb_map->vaddr;
hscb_busaddr = hscb_map->busaddr;
scb_data->scbs_left = PAGE_SIZE / sizeof(*hscb);
 6003         }
scb_data->init_level++;
 6007         if (scb_data->sgs_left != 0) {
 6008                 int offset;
offset = ((ahd_sglist_allocsize(ahd) / ahd_sglist_size(ahd))
 6011                        - scb_data->sgs_left) * ahd_sglist_size(ahd);
sg_map = SLIST_FIRST(&scb_data->sg_maps);
segs = sg_map->vaddr + offset;
sg_busaddr = sg_map->busaddr + offset;
 6015         } else {
sg_map = malloc(sizeof(*sg_map), M_DEVBUF, M_NOWAIT);
 6018                 if (sg_map == NULL)
 6019                         return;
 6021                 /* Allocate the next batch of S/G lists */
 6022                 if (ahd_createdmamem(ahd, ahd_sglist_allocsize(ahd), sg_map,
 6023                     "SG data structures") < 0) {
free(sg_map, M_DEVBUF);
 6025                         return;
 6026                 }
SLIST_INSERT_HEAD(&scb_data->sg_maps, sg_map, links);
segs = sg_map->vaddr;
sg_busaddr = sg_map->busaddr;
scb_data->sgs_left =
ahd_sglist_allocsize(ahd) / ahd_sglist_size(ahd);
 6034 #ifdef AHD_DEBUG
 6035                 if (ahd_debug & AHD_SHOW_MEMORY)
printf("%s: ahd_alloc_scbs - Mapped SG data\n", ahd_name(ahd));
 6037 #endif
 6038         }
scb_data->init_level++;
 6042         if (scb_data->sense_left != 0) {
 6043                 int offset;
offset = PAGE_SIZE - (AHD_SENSE_BUFSIZE * scb_data->sense_left);
sense_map = SLIST_FIRST(&scb_data->sense_maps);
sense_data = sense_map->vaddr + offset;
sense_busaddr = sense_map->busaddr + offset;
 6049         } else {
sense_map = malloc(sizeof(*sense_map), M_DEVBUF, M_NOWAIT);
 6052                 if (sense_map == NULL)
 6053                         return;
 6055                 /* Allocate the next batch of sense buffers */
 6056                 if (ahd_createdmamem(ahd, PAGE_SIZE, sense_map,
 6057                     "Sense Data structures") < 0) {
free(sense_map, M_DEVBUF);
 6059                         return;
 6060                 }
SLIST_INSERT_HEAD(&scb_data->sense_maps, sense_map, links);
sense_data = sense_map->vaddr;
sense_busaddr = sense_map->busaddr;
scb_data->sense_left = PAGE_SIZE / AHD_SENSE_BUFSIZE;
 6067 #ifdef AHD_DEBUG
 6068                 if (ahd_debug & AHD_SHOW_MEMORY)
printf("%s: ahd_alloc_scbs - Mapped sense data\n", ahd_name(ahd));
 6070 #endif
 6071         }
scb_data->init_level++;
newcount = MIN(scb_data->sense_left, scb_data->scbs_left);
newcount = MIN(newcount, scb_data->sgs_left);
newcount = MIN(newcount, (AHD_SCB_MAX_ALLOC - scb_data->numscbs));
scb_data->sense_left -= newcount;
scb_data->scbs_left -= newcount;
scb_data->sgs_left -= newcount;
 6081         for (i = 0; i < newcount; i++) {
 6082                 struct scb_platform_data *pdata = NULL;
u_int col_tag;
 6084 #ifndef __linux__
 6085                 int error;
 6086 #endif
next_scb = (struct scb *)malloc(sizeof(*next_scb),
M_DEVBUF, M_NOWAIT);
 6090                 if (next_scb == NULL)
 6091                         break;
 6093                 if (sizeof(*pdata) > 0) {
pdata = malloc(sizeof(*pdata), M_DEVBUF, M_NOWAIT);
 6095                         if (pdata == NULL) {
free(next_scb, M_DEVBUF);
 6097                                 break;
 6098                         }
 6099                 }       
next_scb->platform_data = pdata;
next_scb->hscb_map = hscb_map;
next_scb->sg_map = sg_map;
next_scb->sense_map = sense_map;
next_scb->sg_list = segs;
next_scb->sense_data = sense_data;
next_scb->sense_busaddr = sense_busaddr;
memset(hscb, 0, sizeof(*hscb));
next_scb->hscb = hscb;
KASSERT((vaddr_t)hscb >= (vaddr_t)hscb_map->vaddr &&
 6110                         (vaddr_t)hscb < (vaddr_t)hscb_map->vaddr + PAGE_SIZE);
hscb->hscb_busaddr = aic_htole32(hscb_busaddr);
 6113                 /*
 6114                  * The sequencer always starts with the second entry.
 6115                  * The first entry is embedded in the scb.
 6116                  */
next_scb->sg_list_busaddr = sg_busaddr;
 6118                 if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0)
next_scb->sg_list_busaddr
 6120                             += sizeof(struct ahd_dma64_seg);
 6121                 else
next_scb->sg_list_busaddr += sizeof(struct ahd_dma_seg);
next_scb->ahd_softc = ahd;
next_scb->flags = SCB_FLAG_NONE;
error = bus_dmamap_create(ahd->parent_dmat,
AHD_MAXTRANSFER_SIZE, AHD_NSEG, MAXBSIZE, 0,
BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, &next_scb->dmamap);
 6130                 if (error != 0) {
free(next_scb, M_DEVBUF);
free(pdata, M_DEVBUF);
 6133                         break;
 6134                 }
next_scb->hscb->tag = aic_htole16(scb_data->numscbs);
col_tag = scb_data->numscbs ^ 0x100;
next_scb->col_scb = ahd_find_scb_by_tag(ahd, col_tag);
 6138                 if (next_scb->col_scb != NULL)
next_scb->col_scb->col_scb = next_scb;
ahd_free_scb(ahd, next_scb);
hscb++;
hscb_busaddr += sizeof(*hscb);
segs += ahd_sglist_size(ahd);
sg_busaddr += ahd_sglist_size(ahd);
sense_data += AHD_SENSE_BUFSIZE;
sense_busaddr += AHD_SENSE_BUFSIZE;
scb_data->numscbs++;
 6148         }
 6149 }
 6151 void
ahd_controller_info(struct ahd_softc *ahd, char *buf, size_t bufsz)
 6153 {
snprintf(buf, bufsz, "%s: %s, U320 %s Channel %c, SCSI Id=%d, %s, %d SCBs",
ahd_name(ahd), ahd_chip_names[ahd->chip & AHD_CHIPID_MASK],
 6156             ((ahd->features & AHD_WIDE) != 0) ? "Wide" : "Single",
ahd->channel, ahd->our_id, ahd->bus_description,
ahd->scb_data.maxhscbs);
 6159 }
 6161 static const char *channel_strings[] = {
 6162         "Primary Low",
 6163         "Primary High",
 6164         "Secondary Low", 
 6165         "Secondary High"
 6166 };
 6168 static const char *termstat_strings[] = {
 6169         "Terminated Correctly",
 6170         "Over Terminated",
 6171         "Under Terminated",
 6172         "Not Configured"
 6173 };
 6175 /*
 6176  * Start the board, ready for normal operation
 6177  */
 6178 int
ahd_init(struct ahd_softc *ahd)
 6180 {
uint8_t         *next_vaddr;
bus_addr_t       next_baddr;
size_t           driver_data_size;
 6184         int              i;
 6185         int              error;
u_int            warn_user;
uint8_t          current_sensing;
uint8_t          fstat;
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
ahd->stack_size = ahd_probe_stack_size(ahd);
ahd->saved_stack = malloc(ahd->stack_size * sizeof(uint16_t),
M_DEVBUF, M_NOWAIT);
 6195         if (ahd->saved_stack == NULL)
 6196                 return (ENOMEM);
 6198         /* Zero the memory */
memset(ahd->saved_stack, 0, ahd->stack_size * sizeof(uint16_t));
 6201         /*
 6202          * Verify that the compiler hasn't over-agressively
 6203          * padded important structures.
 6204          */
 6205         if (sizeof(struct hardware_scb) != 64)
panic("Hardware SCB size is incorrect");
 6208 #ifdef AHD_DEBUG
 6209         if ((ahd_debug & AHD_DEBUG_SEQUENCER) != 0)
ahd->flags |= AHD_SEQUENCER_DEBUG;
 6211 #endif
 6213         /*
 6214          * Default to allowing initiator operations.
 6215          */
ahd->flags |= AHD_INITIATORROLE;
 6218         /*
 6219          * Only allow target mode features if this unit has them enabled.
 6220          */
 6221         if ((AHD_TMODE_ENABLE & (0x1 << ahd->unit)) == 0)
ahd->features &= ~AHD_TARGETMODE;
 6224         /*
 6225          * DMA tag for our command fifos and other data in system memory
 6226          * the card's sequencer must be able to access.  For initiator
 6227          * roles, we need to allocate space for the qoutfifo.  When providing
 6228          * for the target mode role, we must additionally provide space for
 6229          * the incoming target command fifo.
 6230          */
driver_data_size = AHD_SCB_MAX * sizeof(*ahd->qoutfifo)
 6232                          + sizeof(struct hardware_scb);
 6233         if ((ahd->features & AHD_TARGETMODE) != 0)
driver_data_size += AHD_TMODE_CMDS * sizeof(struct target_cmd);
 6235         if ((ahd->bugs & AHD_PKT_BITBUCKET_BUG) != 0)
driver_data_size += PKT_OVERRUN_BUFSIZE;
 6237         if (ahd_createdmamem(ahd, driver_data_size, &ahd->shared_data_map,
 6238             "shared data") < 0)
 6239                 return (ENOMEM);
ahd->qoutfifo = (struct ahd_completion *)ahd->shared_data_map.vaddr;
ahd->init_level++;
next_vaddr = (uint8_t *)&ahd->qoutfifo[AHD_QOUT_SIZE];
next_baddr = ahd->shared_data_map.busaddr
 6247                    + AHD_QOUT_SIZE*sizeof(struct ahd_completion);
 6248         if ((ahd->features & AHD_TARGETMODE) != 0) {
ahd->targetcmds = (struct target_cmd *)next_vaddr;
next_vaddr += AHD_TMODE_CMDS * sizeof(struct target_cmd);
next_baddr += AHD_TMODE_CMDS * sizeof(struct target_cmd);
 6252         }
 6254         if ((ahd->bugs & AHD_PKT_BITBUCKET_BUG) != 0) {
ahd->overrun_buf = next_vaddr;
next_vaddr += PKT_OVERRUN_BUFSIZE;
next_baddr += PKT_OVERRUN_BUFSIZE;
 6258         }
 6260         /*
 6261          * We need one SCB to serve as the "next SCB".  Since the
 6262          * tag identifier in this SCB will never be used, there is
 6263          * no point in using a valid HSCB tag from an SCB pulled from
 6264          * the standard free pool.  So, we allocate this "sentinel"
 6265          * specially from the DMA safe memory chunk used for the QOUTFIFO.
 6266          */
ahd->next_queued_hscb = (struct hardware_scb *)next_vaddr;
ahd->next_queued_hscb_map = &ahd->shared_data_map;
ahd->next_queued_hscb->hscb_busaddr = aic_htole32(next_baddr);
 6271         /* Allocate SCB data now that buffer_dmat is initialized */
 6272         if (ahd_init_scbdata(ahd) != 0)
 6273                 return (ENOMEM);
 6275         if ((ahd->flags & AHD_INITIATORROLE) == 0)
ahd->flags &= ~AHD_RESET_BUS_A;
 6278         /*
 6279          * Before committing these settings to the chip, give
 6280          * the OSM one last chance to modify our configuration.
 6281          */
ahd_platform_init(ahd);
 6284         /* Bring up the chip. */
ahd_chip_init(ahd);
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
 6289         if ((ahd->flags & AHD_CURRENT_SENSING) == 0)
 6290                 goto init_done;
 6292         /*
 6293          * Verify termination based on current draw and
 6294          * warn user if the bus is over/under terminated.
 6295          */
error = ahd_write_flexport(ahd, FLXADDR_ROMSTAT_CURSENSECTL,
CURSENSE_ENB);
 6298         if (error != 0) {
printf("%s: current sensing timeout 1\n", ahd_name(ahd));
 6300                 goto init_done;
 6301         }
 6302         for (i = 20, fstat = FLX_FSTAT_BUSY;
 6303              (fstat & FLX_FSTAT_BUSY) != 0 && i; i--) {
error = ahd_read_flexport(ahd, FLXADDR_FLEXSTAT, &fstat);
 6305                 if (error != 0) {
printf("%s: current sensing timeout 2\n",
ahd_name(ahd));
 6308                         goto init_done;
 6309                 }
 6310         }
 6311         if (i == 0) {
printf("%s: Timeout during current-sensing test\n",
ahd_name(ahd));
 6314                 goto init_done;
 6315         }
 6317         /* Latch Current Sensing status. */
error = ahd_read_flexport(ahd, FLXADDR_CURRENT_STAT, &current_sensing);
 6319         if (error != 0) {
printf("%s: current sensing timeout 3\n", ahd_name(ahd));
 6321                 goto init_done;
 6322         }
 6324         /* Disable current sensing. */
ahd_write_flexport(ahd, FLXADDR_ROMSTAT_CURSENSECTL, 0);
 6327 #ifdef AHD_DEBUG
 6328         if ((ahd_debug & AHD_SHOW_TERMCTL) != 0) {
printf("%s: current_sensing == 0x%x\n",
ahd_name(ahd), current_sensing);
 6331         }
 6332 #endif
warn_user = 0;
 6334         for (i = 0; i < 4; i++, current_sensing >>= FLX_CSTAT_SHIFT) {
u_int term_stat;
term_stat = (current_sensing & FLX_CSTAT_MASK);
 6338                 switch (term_stat) {
 6339                 case FLX_CSTAT_OVER:
 6340                 case FLX_CSTAT_UNDER:
warn_user++;
 6342                 case FLX_CSTAT_INVALID:
 6343                 case FLX_CSTAT_OKAY:
 6344                         if (warn_user == 0 && bootverbose == 0)
 6345                                 break;
printf("%s: %s Channel %s\n", ahd_name(ahd),
channel_strings[i], termstat_strings[term_stat]);
 6348                         break;
 6349                 }
 6350         }
 6351         if (warn_user) {
printf("%s: WARNING. Termination is not configured correctly.\n"
 6353                        "%s: WARNING. SCSI bus operations may FAIL.\n",
ahd_name(ahd), ahd_name(ahd));
 6355         }
init_done:
ahd_reset_current_bus(ahd);
ahd_restart(ahd);
aic_timer_reset(&ahd->stat_timer, AHD_STAT_UPDATE_MS,
ahd_stat_timer, ahd);
 6362         /* We have to wait until after any system dumps... */
ahd->shutdown_hook = shutdownhook_establish(ahd_shutdown, ahd);
 6364         return (0);
 6365 }
 6367 /*
 6368  * (Re)initialize chip state after a chip reset.
 6369  */
 6370 void
ahd_chip_init(struct ahd_softc *ahd)
 6372 {
uint32_t busaddr;
u_int    sxfrctl1;
u_int    scsiseq_template;
u_int    wait;
u_int    i;
u_int    target;
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
 6381         /*
 6382          * Take the LED out of diagnostic mode
 6383          */
ahd_outb(ahd, SBLKCTL, ahd_inb(ahd, SBLKCTL) & ~(DIAGLEDEN|DIAGLEDON));
 6386         /*
 6387          * Return HS_MAILBOX to its default value.
 6388          */
ahd->hs_mailbox = 0;
ahd_outb(ahd, HS_MAILBOX, 0);
 6392         /* Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1. */
ahd_outb(ahd, IOWNID, ahd->our_id);
ahd_outb(ahd, TOWNID, ahd->our_id);
sxfrctl1 = (ahd->flags & AHD_TERM_ENB_A) != 0 ? STPWEN : 0;
sxfrctl1 |= (ahd->flags & AHD_SPCHK_ENB_A) != 0 ? ENSPCHK : 0;
 6397         if ((ahd->bugs & AHD_LONG_SETIMO_BUG)
 6398          && (ahd->seltime != STIMESEL_MIN)) {
 6399                 /*
 6400                  * The selection timer duration is twice as long
 6401                  * as it should be.  Halve it by adding "1" to
 6402                  * the user specified setting.
 6403                  */
sxfrctl1 |= ahd->seltime + STIMESEL_BUG_ADJ;
 6405         } else {
sxfrctl1 |= ahd->seltime;
 6407         }
ahd_outb(ahd, SXFRCTL0, DFON);
ahd_outb(ahd, SXFRCTL1, sxfrctl1|ahd->seltime|ENSTIMER|ACTNEGEN);
ahd_outb(ahd, SIMODE1, ENSELTIMO|ENSCSIRST|ENSCSIPERR);
 6413         /*
 6414          * Now that termination is set, wait for up
 6415          * to 500ms for our transceivers to settle.  If
 6416          * the adapter does not have a cable attached,
 6417          * the transceivers may never settle, so don't
 6418          * complain if we fail here.
 6419          */
 6420         for (wait = 10000;
 6421              (ahd_inb(ahd, SBLKCTL) & (ENAB40|ENAB20)) == 0 && wait;
wait--)
aic_delay(100);
 6425         /* Clear any false bus resets due to the transceivers settling */
ahd_outb(ahd, CLRSINT1, CLRSCSIRSTI);
ahd_outb(ahd, CLRINT, CLRSCSIINT);
 6429         /* Initialize mode specific S/G state. */
 6430         for (i = 0; i < 2; i++) {
ahd_set_modes(ahd, AHD_MODE_DFF0 + i, AHD_MODE_DFF0 + i);
ahd_outb(ahd, LONGJMP_ADDR + 1, INVALID_ADDR);
ahd_outb(ahd, SG_STATE, 0);
ahd_outb(ahd, CLRSEQINTSRC, 0xFF);
ahd_outb(ahd, SEQIMODE,
ENSAVEPTRS|ENCFG4DATA|ENCFG4ISTAT
 6437                         |ENCFG4TSTAT|ENCFG4ICMD|ENCFG4TCMD);
 6438         }
ahd_set_modes(ahd, AHD_MODE_CFG, AHD_MODE_CFG);
ahd_outb(ahd, DSCOMMAND0, ahd_inb(ahd, DSCOMMAND0)|MPARCKEN|CACHETHEN);
ahd_outb(ahd, DFF_THRSH, RD_DFTHRSH_75|WR_DFTHRSH_75);
ahd_outb(ahd, SIMODE0, ENIOERR|ENOVERRUN);
ahd_outb(ahd, SIMODE3, ENNTRAMPERR|ENOSRAMPERR);
 6445         if ((ahd->bugs & AHD_BUSFREEREV_BUG) != 0) {
ahd_outb(ahd, OPTIONMODE, AUTOACKEN|AUTO_MSGOUT_DE);
 6447         } else {
ahd_outb(ahd, OPTIONMODE, AUTOACKEN|BUSFREEREV|AUTO_MSGOUT_DE);
 6449         }
ahd_outb(ahd, SCSCHKN, CURRFIFODEF|WIDERESEN|SHVALIDSTDIS);
 6451         if ((ahd->chip & AHD_BUS_MASK) == AHD_PCIX)
 6452                 /*
 6453                  * Do not issue a target abort when a split completion
 6454                  * error occurs.  Let our PCIX interrupt handler deal
 6455                  * with it instead. H2A4 Razor #625
 6456                  */
ahd_outb(ahd, PCIXCTL, ahd_inb(ahd, PCIXCTL) | SPLTSTADIS);
 6459         if ((ahd->bugs & AHD_LQOOVERRUN_BUG) != 0)
ahd_outb(ahd, LQOSCSCTL, LQONOCHKOVER);
 6462         /*
 6463          * Tweak IOCELL settings.
 6464          */
 6465         if ((ahd->flags & AHD_HP_BOARD) != 0) {
 6466                 for (i = 0; i < NUMDSPS; i++) {
ahd_outb(ahd, DSPSELECT, i);
ahd_outb(ahd, WRTBIASCTL, WRTBIASCTL_HP_DEFAULT);
 6469                 }
 6470 #ifdef AHD_DEBUG
 6471                 if ((ahd_debug & AHD_SHOW_MISC) != 0)
printf("%s: WRTBIASCTL now 0x%x\n", ahd_name(ahd),
WRTBIASCTL_HP_DEFAULT);
 6474 #endif
 6475         }
ahd_setup_iocell_workaround(ahd);
 6478         /*
 6479          * Enable LQI Manager interrupts.
 6480          */
ahd_outb(ahd, LQIMODE1, ENLQIPHASE_LQ|ENLQIPHASE_NLQ|ENLIQABORT
 6482                               | ENLQICRCI_LQ|ENLQICRCI_NLQ|ENLQIBADLQI
 6483                               | ENLQIOVERI_LQ|ENLQIOVERI_NLQ);
ahd_outb(ahd, LQOMODE0, ENLQOATNLQ|ENLQOATNPKT|ENLQOTCRC);
 6485         /*
 6486          * We choose to have the sequencer catch LQOPHCHGINPKT errors
 6487          * manually for the command phase at the start of a packetized
 6488          * selection case.  ENLQOBUSFREE should be made redundant by
 6489          * the BUSFREE interrupt, but it seems that some LQOBUSFREE
 6490          * events fail to assert the BUSFREE interrupt so we must
 6491          * also enable LQOBUSFREE interrupts.
 6492          */
ahd_outb(ahd, LQOMODE1, ENLQOBUSFREE);
 6495         /*
 6496          * Setup sequencer interrupt handlers.
 6497          */
ahd_outw(ahd, INTVEC1_ADDR, ahd_resolve_seqaddr(ahd, LABEL_seq_isr));
ahd_outw(ahd, INTVEC2_ADDR, ahd_resolve_seqaddr(ahd, LABEL_timer_isr));
 6501         /*
 6502          * Setup SCB Offset registers.
 6503          */
 6504         if ((ahd->bugs & AHD_PKT_LUN_BUG) != 0) {
ahd_outb(ahd, LUNPTR, offsetof(struct hardware_scb,
pkt_long_lun));
 6507         } else {
ahd_outb(ahd, LUNPTR, offsetof(struct hardware_scb, lun));
 6509         }
ahd_outb(ahd, CMDLENPTR, offsetof(struct hardware_scb, cdb_len));
ahd_outb(ahd, ATTRPTR, offsetof(struct hardware_scb, task_attribute));
ahd_outb(ahd, FLAGPTR, offsetof(struct hardware_scb, task_management));
ahd_outb(ahd, CMDPTR, offsetof(struct hardware_scb,
shared_data.idata.cdb));
ahd_outb(ahd, QNEXTPTR,
offsetof(struct hardware_scb, next_hscb_busaddr));
ahd_outb(ahd, ABRTBITPTR, MK_MESSAGE_BIT_OFFSET);
ahd_outb(ahd, ABRTBYTEPTR, offsetof(struct hardware_scb, control));
 6519         if ((ahd->bugs & AHD_PKT_LUN_BUG) != 0) {
ahd_outb(ahd, LUNLEN,
 6521                          sizeof(ahd->next_queued_hscb->pkt_long_lun) - 1);
 6522         } else {
ahd_outb(ahd, LUNLEN, LUNLEN_SINGLE_LEVEL_LUN);
 6524         }
ahd_outb(ahd, CDBLIMIT, SCB_CDB_LEN_PTR - 1);
ahd_outb(ahd, MAXCMD, 0xFF);
ahd_outb(ahd, SCBAUTOPTR,
AUSCBPTR_EN | offsetof(struct hardware_scb, tag));
 6530         /* We haven't been enabled for target mode yet. */
ahd_outb(ahd, MULTARGID, 0);
ahd_outb(ahd, MULTARGID + 1, 0);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
 6535         /* Initialize the negotiation table. */
 6536         if ((ahd->features & AHD_NEW_IOCELL_OPTS) == 0) {
 6537                 /*
 6538                  * Clear the spare bytes in the neg table to avoid
 6539                  * spurious parity errors.
 6540                  */
 6541                 for (target = 0; target < AHD_NUM_TARGETS; target++) {
ahd_outb(ahd, NEGOADDR, target);
ahd_outb(ahd, ANNEXCOL, AHD_ANNEXCOL_PER_DEV0);
 6544                         for (i = 0; i < AHD_NUM_PER_DEV_ANNEXCOLS; i++)
ahd_outb(ahd, ANNEXDAT, 0);
 6546                 }
 6547         }
 6548         for (target = 0; target < AHD_NUM_TARGETS; target++) {
 6549                 struct   ahd_devinfo devinfo;
 6550                 struct   ahd_initiator_tinfo *tinfo;
 6551                 struct   ahd_tmode_tstate *tstate;
tinfo = ahd_fetch_transinfo(ahd, 'A', ahd->our_id,
target, &tstate);
ahd_compile_devinfo(&devinfo, ahd->our_id,
target, CAM_LUN_WILDCARD,
 6557                                     'A', ROLE_INITIATOR);
ahd_update_neg_table(ahd, &devinfo, &tinfo->curr);
 6559         }
ahd_outb(ahd, CLRSINT3, NTRAMPERR|OSRAMPERR);
ahd_outb(ahd, CLRINT, CLRSCSIINT);
 6564 #if NEEDS_MORE_TESTING
 6565         /*
 6566          * Always enable abort on incoming L_Qs if this feature is
 6567          * supported.  We use this to catch invalid SCB references.
 6568          */
 6569         if ((ahd->bugs & AHD_ABORT_LQI_BUG) == 0)
ahd_outb(ahd, LQCTL1, ABORTPENDING);
 6571         else
 6572 #endif
ahd_outb(ahd, LQCTL1, 0);
 6575         /* All of our queues are empty */
ahd->qoutfifonext = 0;
ahd->qoutfifonext_valid_tag = QOUTFIFO_ENTRY_VALID;
ahd_outb(ahd, QOUTFIFO_ENTRY_VALID_TAG, QOUTFIFO_ENTRY_VALID);
 6579         for (i = 0; i < AHD_QOUT_SIZE; i++)
ahd->qoutfifo[i].valid_tag = 0;
ahd_sync_qoutfifo(ahd, BUS_DMASYNC_PREREAD);
ahd->qinfifonext = 0;
 6584         for (i = 0; i < AHD_QIN_SIZE; i++)
ahd->qinfifo[i] = SCB_LIST_NULL;
 6587         if ((ahd->features & AHD_TARGETMODE) != 0) {
 6588                 /* All target command blocks start out invalid. */
 6589                 for (i = 0; i < AHD_TMODE_CMDS; i++)
ahd->targetcmds[i].cmd_valid = 0;
ahd_sync_tqinfifo(ahd, BUS_DMASYNC_PREREAD);
ahd->tqinfifonext = 1;
ahd_outb(ahd, KERNEL_TQINPOS, ahd->tqinfifonext - 1);
ahd_outb(ahd, TQINPOS, ahd->tqinfifonext);
 6595         }
 6597         /* Initialize Scratch Ram. */
ahd_outb(ahd, SEQ_FLAGS, 0);
ahd_outb(ahd, SEQ_FLAGS2, 0);
 6601         /* We don't have any waiting selections */
ahd_outw(ahd, WAITING_TID_HEAD, SCB_LIST_NULL);
ahd_outw(ahd, WAITING_TID_TAIL, SCB_LIST_NULL);
ahd_outw(ahd, MK_MESSAGE_SCB, SCB_LIST_NULL);
ahd_outw(ahd, MK_MESSAGE_SCSIID, 0xFF);
 6606         for (i = 0; i < AHD_NUM_TARGETS; i++)
ahd_outw(ahd, WAITING_SCB_TAILS + (2 * i), SCB_LIST_NULL);
 6609         /*
 6610          * Nobody is waiting to be DMAed into the QOUTFIFO.
 6611          */
ahd_outw(ahd, COMPLETE_SCB_HEAD, SCB_LIST_NULL);
ahd_outw(ahd, COMPLETE_SCB_DMAINPROG_HEAD, SCB_LIST_NULL);
ahd_outw(ahd, COMPLETE_DMA_SCB_HEAD, SCB_LIST_NULL);
ahd_outw(ahd, COMPLETE_DMA_SCB_TAIL, SCB_LIST_NULL);
ahd_outw(ahd, COMPLETE_ON_QFREEZE_HEAD, SCB_LIST_NULL);
 6618         /*
 6619          * The Freeze Count is 0.
 6620          */
ahd->qfreeze_cnt = 0;
ahd_outw(ahd, QFREEZE_COUNT, 0);
ahd_outw(ahd, KERNEL_QFREEZE_COUNT, 0);
 6625         /*
 6626          * Tell the sequencer where it can find our arrays in memory.
 6627          */
busaddr = ahd->shared_data_map.busaddr;
ahd_outl(ahd, SHARED_DATA_ADDR, busaddr);
ahd_outl(ahd, QOUTFIFO_NEXT_ADDR, busaddr);
 6632         /*
 6633          * Setup the allowed SCSI Sequences based on operational mode.
 6634          * If we are a target, we'll enable select in operations once
 6635          * we've had a lun enabled.
 6636          */
scsiseq_template = ENAUTOATNP;
 6638         if ((ahd->flags & AHD_INITIATORROLE) != 0)
scsiseq_template |= ENRSELI;
ahd_outb(ahd, SCSISEQ_TEMPLATE, scsiseq_template);
 6642         /* There are no busy SCBs yet. */
 6643         for (target = 0; target < AHD_NUM_TARGETS; target++) {
 6644                 int lun;
 6646                 for (lun = 0; lun < AHD_NUM_LUNS_NONPKT; lun++)
ahd_unbusy_tcl(ahd, BUILD_TCL_RAW(target, 'A', lun));
 6648         }
 6650         /*
 6651          * Initialize the group code to command length table.
 6652          * Vendor Unique codes are set to 0 so we only capture
 6653          * the first byte of the cdb.  These can be overridden
 6654          * when target mode is enabled.
 6655          */
ahd_outb(ahd, CMDSIZE_TABLE, 5);
ahd_outb(ahd, CMDSIZE_TABLE + 1, 9);
ahd_outb(ahd, CMDSIZE_TABLE + 2, 9);
ahd_outb(ahd, CMDSIZE_TABLE + 3, 0);
ahd_outb(ahd, CMDSIZE_TABLE + 4, 15);
ahd_outb(ahd, CMDSIZE_TABLE + 5, 11);
ahd_outb(ahd, CMDSIZE_TABLE + 6, 0);
ahd_outb(ahd, CMDSIZE_TABLE + 7, 0);
 6665         /* Tell the sequencer of our initial queue positions */
ahd_set_modes(ahd, AHD_MODE_CCHAN, AHD_MODE_CCHAN);
ahd_outb(ahd, QOFF_CTLSTA, SCB_QSIZE_512);
ahd->qinfifonext = 0;
ahd_set_hnscb_qoff(ahd, ahd->qinfifonext);
ahd_set_hescb_qoff(ahd, 0);
ahd_set_snscb_qoff(ahd, 0);
ahd_set_sescb_qoff(ahd, 0);
ahd_set_sdscb_qoff(ahd, 0);
 6675         /*
 6676          * Tell the sequencer which SCB will be the next one it receives.
 6677          */
busaddr = aic_le32toh(ahd->next_queued_hscb->hscb_busaddr);
ahd_outl(ahd, NEXT_QUEUED_SCB_ADDR, busaddr);
 6681         /*
 6682          * Default to coalescing disabled.
 6683          */
ahd_outw(ahd, INT_COALESCING_CMDCOUNT, 0);
ahd_outw(ahd, CMDS_PENDING, 0);
ahd_update_coalescing_values(ahd, ahd->int_coalescing_timer,
ahd->int_coalescing_maxcmds,
ahd->int_coalescing_mincmds);
ahd_enable_coalescing(ahd, FALSE);
ahd_loadseq(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
 6693 }
 6695 /*
 6696  * Setup default device and controller settings.
 6697  * This should only be called if our probe has
 6698  * determined that no configuration data is available.
 6699  */
 6700 int
ahd_default_config(struct ahd_softc *ahd)
 6702 {
 6703         int     targ;
ahd->our_id = 7;
 6707         /*
 6708          * Allocate a tstate to house information for our
 6709          * initiator presence on the bus as well as the user
 6710          * data for any target mode initiator.
 6711          */
 6712         if (ahd_alloc_tstate(ahd, ahd->our_id, 'A') == NULL) {
printf("%s: unable to allocate ahd_tmode_tstate.  "
 6714                        "Failing attach\n", ahd_name(ahd));
 6715                 return (ENOMEM);
 6716         }
 6718         for (targ = 0; targ < AHD_NUM_TARGETS; targ++) {
 6719                 struct   ahd_devinfo devinfo;
 6720                 struct   ahd_initiator_tinfo *tinfo;
 6721                 struct   ahd_tmode_tstate *tstate;
uint16_t target_mask;
tinfo = ahd_fetch_transinfo(ahd, 'A', ahd->our_id,
targ, &tstate);
 6726                 /*
 6727                  * We support SPC2 and SPI4.
 6728                  */
tinfo->user.protocol_version = 4;
tinfo->user.transport_version = 4;
target_mask = 0x01 << targ;
ahd->user_discenable |= target_mask;
tstate->discenable |= target_mask;
ahd->user_tagenable |= target_mask;
 6736 #ifdef AHD_FORCE_160
tinfo->user.period = AHD_SYNCRATE_DT;
 6738 #else
tinfo->user.period = AHD_SYNCRATE_160;
 6740 #endif
tinfo->user.offset = MAX_OFFSET;
tinfo->user.ppr_options = MSG_EXT_PPR_RD_STRM
 6743                                         | MSG_EXT_PPR_WR_FLOW
 6744                                         | MSG_EXT_PPR_HOLD_MCS
 6745                                         | MSG_EXT_PPR_IU_REQ
 6746                                         | MSG_EXT_PPR_QAS_REQ
 6747                                         | MSG_EXT_PPR_DT_REQ;
 6748                 if ((ahd->features & AHD_RTI) != 0)
tinfo->user.ppr_options |= MSG_EXT_PPR_RTI;
tinfo->user.width = MSG_EXT_WDTR_BUS_16_BIT;
 6753                 /*
 6754                  * Start out Async/Narrow/Untagged and with
 6755                  * conservative protocol support.
 6756                  */
tinfo->goal.protocol_version = 2;
tinfo->goal.transport_version = 2;
tinfo->curr.protocol_version = 2;
tinfo->curr.transport_version = 2;
ahd_compile_devinfo(&devinfo, ahd->our_id,
targ, CAM_LUN_WILDCARD,
 6763                                     'A', ROLE_INITIATOR);
tstate->tagenable &= ~target_mask;
ahd_set_width(ahd, &devinfo, MSG_EXT_WDTR_BUS_8_BIT,
AHD_TRANS_CUR|AHD_TRANS_GOAL, /*paused*/TRUE);
ahd_set_syncrate(ahd, &devinfo, /*period*/0, /*offset*/0,
 6768                                  /*ppr_options*/0, AHD_TRANS_CUR|AHD_TRANS_GOAL,
 6769                                  /*paused*/TRUE);
 6770         }
 6771         return (0);
 6772 }
 6774 /*
 6775  * Parse device configuration information.
 6776  */
 6777 int
ahd_parse_cfgdata(struct ahd_softc *ahd, struct seeprom_config *sc)
 6779 {
 6780         int targ;
 6781         int max_targ;
max_targ = sc->max_targets & CFMAXTARG;
ahd->our_id = sc->brtime_id & CFSCSIID;
 6786         /*
 6787          * Allocate a tstate to house information for our
 6788          * initiator presence on the bus as well as the user
 6789          * data for any target mode initiator.
 6790          */
 6791         if (ahd_alloc_tstate(ahd, ahd->our_id, 'A') == NULL) {
printf("%s: unable to allocate ahd_tmode_tstate.  "
 6793                        "Failing attach\n", ahd_name(ahd));
 6794                 return (ENOMEM);
 6795         }
 6797         for (targ = 0; targ < max_targ; targ++) {
 6798                 struct   ahd_devinfo devinfo;
 6799                 struct   ahd_initiator_tinfo *tinfo;
 6800                 struct   ahd_transinfo *user_tinfo;
 6801                 struct   ahd_tmode_tstate *tstate;
uint16_t target_mask;
tinfo = ahd_fetch_transinfo(ahd, 'A', ahd->our_id,
targ, &tstate);
user_tinfo = &tinfo->user;
 6808                 /*
 6809                  * We support SPC2 and SPI4.
 6810                  */
tinfo->user.protocol_version = 4;
tinfo->user.transport_version = 4;
target_mask = 0x01 << targ;
ahd->user_discenable &= ~target_mask;
tstate->discenable &= ~target_mask;
ahd->user_tagenable &= ~target_mask;
 6818                 if (sc->device_flags[targ] & CFDISC) {
tstate->discenable |= target_mask;
ahd->user_discenable |= target_mask;
ahd->user_tagenable |= target_mask;
 6822                 } else {
 6823                         /*
 6824                          * Cannot be packetized without disconnection.
 6825                          */
sc->device_flags[targ] &= ~CFPACKETIZED;
 6827                 }
user_tinfo->ppr_options = 0;
user_tinfo->period = (sc->device_flags[targ] & CFXFER);
 6831                 if (user_tinfo->period < CFXFER_ASYNC) {
 6832                         if (user_tinfo->period <= AHD_PERIOD_10MHz)
user_tinfo->ppr_options |= MSG_EXT_PPR_DT_REQ;
user_tinfo->offset = MAX_OFFSET;
 6835                 } else  {
user_tinfo->offset = 0;
user_tinfo->period = AHD_ASYNC_XFER_PERIOD;
 6838                 }
 6839 #ifdef AHD_FORCE_160
 6840                 if (user_tinfo->period <= AHD_SYNCRATE_160)
user_tinfo->period = AHD_SYNCRATE_DT;
 6842 #endif
 6844                 if ((sc->device_flags[targ] & CFPACKETIZED) != 0) {
user_tinfo->ppr_options |= MSG_EXT_PPR_RD_STRM
 6846                                                 |  MSG_EXT_PPR_WR_FLOW
 6847                                                 |  MSG_EXT_PPR_HOLD_MCS
 6848                                                 |  MSG_EXT_PPR_IU_REQ;
 6849                         if ((ahd->features & AHD_RTI) != 0)
user_tinfo->ppr_options |= MSG_EXT_PPR_RTI;
 6851                 }
 6853                 if ((sc->device_flags[targ] & CFQAS) != 0)
user_tinfo->ppr_options |= MSG_EXT_PPR_QAS_REQ;
 6856                 if ((sc->device_flags[targ] & CFWIDEB) != 0)
user_tinfo->width = MSG_EXT_WDTR_BUS_16_BIT;
 6858                 else
user_tinfo->width = MSG_EXT_WDTR_BUS_8_BIT;
 6860 #ifdef AHD_DEBUG
 6861                 if ((ahd_debug & AHD_SHOW_MISC) != 0)
printf("(%d): %x:%x:%x:%x\n", targ, user_tinfo->width,
user_tinfo->period, user_tinfo->offset,
user_tinfo->ppr_options);
 6865 #endif
 6866                 /*
 6867                  * Start out Async/Narrow/Untagged and with
 6868                  * conservative protocol support.
 6869                  */
tstate->tagenable &= ~target_mask;
tinfo->goal.protocol_version = 2;
tinfo->goal.transport_version = 2;
tinfo->curr.protocol_version = 2;
tinfo->curr.transport_version = 2;
ahd_compile_devinfo(&devinfo, ahd->our_id,
targ, CAM_LUN_WILDCARD,
 6877                                     'A', ROLE_INITIATOR);
ahd_set_width(ahd, &devinfo, MSG_EXT_WDTR_BUS_8_BIT,
AHD_TRANS_CUR|AHD_TRANS_GOAL, /*paused*/TRUE);
ahd_set_syncrate(ahd, &devinfo, /*period*/0, /*offset*/0,
 6881                                  /*ppr_options*/0, AHD_TRANS_CUR|AHD_TRANS_GOAL,
 6882                                  /*paused*/TRUE);
 6883         }
ahd->flags &= ~AHD_SPCHK_ENB_A;
 6886         if (sc->bios_control & CFSPARITY)
ahd->flags |= AHD_SPCHK_ENB_A;
ahd->flags &= ~AHD_RESET_BUS_A;
 6890         if (sc->bios_control & CFRESETB)
ahd->flags |= AHD_RESET_BUS_A;
ahd->flags &= ~AHD_EXTENDED_TRANS_A;
 6894         if (sc->bios_control & CFEXTEND)
ahd->flags |= AHD_EXTENDED_TRANS_A;
ahd->flags &= ~AHD_BIOS_ENABLED;
 6898         if ((sc->bios_control & CFBIOSSTATE) == CFBS_ENABLED)
ahd->flags |= AHD_BIOS_ENABLED;
ahd->flags &= ~AHD_STPWLEVEL_A;
 6902         if ((sc->adapter_control & CFSTPWLEVEL) != 0)
ahd->flags |= AHD_STPWLEVEL_A;
 6905         return (0);
 6906 }
 6908 /*
 6909  * Parse device configuration information.
 6910  */
 6911 int
ahd_parse_vpddata(struct ahd_softc *ahd, struct vpd_config *vpd)
 6913 {
 6914         int error;
error = ahd_verify_vpd_cksum(vpd);
 6917         if (error == 0)
 6918                 return (EINVAL);
 6919         if ((vpd->bios_flags & VPDBOOTHOST) != 0)
ahd->flags |= AHD_BOOT_CHANNEL;
 6921         return (0);
 6922 }
 6924 void
ahd_intr_enable(struct ahd_softc *ahd, int enable)
 6926 {
u_int hcntrl;
hcntrl = ahd_inb(ahd, HCNTRL);
hcntrl &= ~INTEN;
ahd->pause &= ~INTEN;
ahd->unpause &= ~INTEN;
 6933         if (enable) {
hcntrl |= INTEN;
ahd->pause |= INTEN;
ahd->unpause |= INTEN;
 6937         }
ahd_outb(ahd, HCNTRL, hcntrl);
 6939 }
 6941 void
ahd_update_coalescing_values(struct ahd_softc *ahd, u_int timer, u_int maxcmds,
u_int mincmds)
 6944 {
 6945         if (timer > AHD_TIMER_MAX_US)
timer = AHD_TIMER_MAX_US;
ahd->int_coalescing_timer = timer;
 6949         if (maxcmds > AHD_INT_COALESCING_MAXCMDS_MAX)
maxcmds = AHD_INT_COALESCING_MAXCMDS_MAX;
 6951         if (mincmds > AHD_INT_COALESCING_MINCMDS_MAX)
mincmds = AHD_INT_COALESCING_MINCMDS_MAX;
ahd->int_coalescing_maxcmds = maxcmds;
ahd_outw(ahd, INT_COALESCING_TIMER, timer / AHD_TIMER_US_PER_TICK);
ahd_outb(ahd, INT_COALESCING_MAXCMDS, -maxcmds);
ahd_outb(ahd, INT_COALESCING_MINCMDS, -mincmds);
 6957 }
 6959 void
ahd_enable_coalescing(struct ahd_softc *ahd, int enable)
 6961 {
ahd->hs_mailbox &= ~ENINT_COALESCE;
 6964         if (enable)
ahd->hs_mailbox |= ENINT_COALESCE;
ahd_outb(ahd, HS_MAILBOX, ahd->hs_mailbox);
ahd_flush_device_writes(ahd);
ahd_run_qoutfifo(ahd);
 6969 }
 6971 /*
 6972  * Ensure that the card is paused in a location
 6973  * outside of all critical sections and that all
 6974  * pending work is completed prior to returning.
 6975  * This routine should only be called from outside
 6976  * an interrupt context.
 6977  */
 6978 void
ahd_pause_and_flushwork(struct ahd_softc *ahd)
 6980 {
u_int intstat;
u_int maxloops;
maxloops = 1000;
ahd->flags |= AHD_ALL_INTERRUPTS;
ahd_pause(ahd);
 6987         /*
 6988          * Freeze the outgoing selections.  We do this only
 6989          * until we are safely paused without further selections
 6990          * pending.
 6991          */
ahd->qfreeze_cnt--;
ahd_outw(ahd, KERNEL_QFREEZE_COUNT, ahd->qfreeze_cnt);
ahd_outb(ahd, SEQ_FLAGS2, ahd_inb(ahd, SEQ_FLAGS2) | SELECTOUT_QFROZEN);
 6995         do {
ahd_unpause(ahd);
 6998                 /*
 6999                  * Give the sequencer some time to service
 7000                  * any active selections.
 7001                  */
aic_delay(500);
ahd_intr(ahd);
ahd_pause(ahd);
intstat = ahd_inb(ahd, INTSTAT);
 7007                 if ((intstat & INT_PEND) == 0) {
ahd_clear_critical_section(ahd);
intstat = ahd_inb(ahd, INTSTAT);
 7010                 }
 7011         } while (--maxloops
 7012               && (intstat != 0xFF || (ahd->features & AHD_REMOVABLE) == 0)
 7013               && ((intstat & INT_PEND) != 0
 7014                || (ahd_inb(ahd, SCSISEQ0) & ENSELO) != 0
 7015                || (ahd_inb(ahd, SSTAT0) & (SELDO|SELINGO)) != 0));
 7017         if (maxloops == 0) {
printf("Infinite interrupt loop, INTSTAT = %x",
ahd_inb(ahd, INTSTAT));
 7020         }
ahd->qfreeze_cnt++;
ahd_outw(ahd, KERNEL_QFREEZE_COUNT, ahd->qfreeze_cnt);
ahd_flush_qoutfifo(ahd);
ahd_platform_flushwork(ahd);
ahd->flags &= ~AHD_ALL_INTERRUPTS;
 7028 }
 7030 int
ahd_suspend(struct ahd_softc *ahd)
 7032 {
ahd_pause_and_flushwork(ahd);
 7036         if (LIST_FIRST(&ahd->pending_scbs) != NULL) {
ahd_unpause(ahd);
 7038                 return (EBUSY);
 7039         }
ahd_shutdown(ahd);
 7041         return (0);
 7042 }
 7044 int
ahd_resume(struct ahd_softc *ahd)
 7046 {
ahd_reset(ahd, /*reinit*/TRUE);
ahd_intr_enable(ahd, TRUE); 
ahd_restart(ahd);
 7051         return (0);
 7052 }
 7054 /************************** Busy Target Table *********************************/
 7055 /*
 7056  * Set SCBPTR to the SCB that contains the busy
 7057  * table entry for TCL.  Return the offset into
 7058  * the SCB that contains the entry for TCL.
 7059  * saved_scbid is dereferenced and set to the
 7060  * scbid that should be restored once manipualtion
 7061  * of the TCL entry is complete.
 7062  */
 7063 __inline u_int ahd_index_busy_tcl(struct ahd_softc *, u_int *, u_int);
 7064 __inline u_int
ahd_index_busy_tcl(struct ahd_softc *ahd, u_int *saved_scbid, u_int tcl)
 7066 {
 7067         /*
 7068          * Index to the SCB that contains the busy entry.
 7069          */
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
 7071         *saved_scbid = ahd_get_scbptr(ahd);
ahd_set_scbptr(ahd, TCL_LUN(tcl)
 7073                      | ((TCL_TARGET_OFFSET(tcl) & 0xC) << 4));
 7075         /*
 7076          * And now calculate the SCB offset to the entry.
 7077          * Each entry is 2 bytes wide, hence the
 7078          * multiplication by 2.
 7079          */
 7080         return (((TCL_TARGET_OFFSET(tcl) & 0x3) << 1) + SCB_DISCONNECTED_LISTS);
 7081 }
 7083 /*
 7084  * Return the untagged transaction id for a given target/channel lun.
 7085  */
u_int
ahd_find_busy_tcl(struct ahd_softc *ahd, u_int tcl)
 7088 {
u_int scbid;
u_int scb_offset;
u_int saved_scbptr;
scb_offset = ahd_index_busy_tcl(ahd, &saved_scbptr, tcl);
scbid = ahd_inw_scbram(ahd, scb_offset);
ahd_set_scbptr(ahd, saved_scbptr);
 7096         return (scbid);
 7097 }
 7099 void
ahd_busy_tcl(struct ahd_softc *ahd, u_int tcl, u_int scbid)
 7101 {
u_int scb_offset;
u_int saved_scbptr;
scb_offset = ahd_index_busy_tcl(ahd, &saved_scbptr, tcl);
ahd_outw(ahd, scb_offset, scbid);
ahd_set_scbptr(ahd, saved_scbptr);
 7108 }
 7110 /************************** SCB and SCB queue management **********************/
 7111 int
ahd_match_scb(struct ahd_softc *ahd, struct scb *scb, int target,
 7113               char channel, int lun, u_int tag, role_t role)
 7114 {
 7115         int targ = SCB_GET_TARGET(ahd, scb);
 7116         char chan = SCB_GET_CHANNEL(ahd, scb);
 7117         int slun = SCB_GET_LUN(scb);
 7118         int match;
match = ((chan == channel) || (channel == ALL_CHANNELS));
 7121         if (match != 0)
match = ((targ == target) || (target == CAM_TARGET_WILDCARD));
 7123         if (match != 0)
match = ((lun == slun) || (lun == CAM_LUN_WILDCARD));
 7125         if (match != 0) {
 7126 #if AHD_TARGET_MODE
 7127                 int group;
group = XPT_FC_GROUP(scb->io_ctx->ccb_h.func_code);
 7130                 if (role == ROLE_INITIATOR) {
match = (group != XPT_FC_GROUP_TMODE)
 7132                               && ((tag == SCB_GET_TAG(scb))
 7133                                || (tag == SCB_LIST_NULL));
 7134                 } else if (role == ROLE_TARGET) {
match = (group == XPT_FC_GROUP_TMODE)
 7136                               && ((tag == scb->io_ctx->csio.tag_id)
 7137                                || (tag == SCB_LIST_NULL));
 7138                 }
 7139 #else /* !AHD_TARGET_MODE */
match = ((tag == SCB_GET_TAG(scb)) || (tag == SCB_LIST_NULL));
 7141 #endif /* AHD_TARGET_MODE */
 7142         }
 7144         return match;
 7145 }
 7147 void
ahd_freeze_devq(struct ahd_softc *ahd, struct scb *scb)
 7149 {
 7150         int     target;
 7151         char    channel;
 7152         int     lun;
target = SCB_GET_TARGET(ahd, scb);
lun = SCB_GET_LUN(scb);
channel = SCB_GET_CHANNEL(ahd, scb);
ahd_search_qinfifo(ahd, target, channel, lun,
 7159                            /*tag*/SCB_LIST_NULL, ROLE_UNKNOWN,
CAM_REQUEUE_REQ, SEARCH_COMPLETE);
ahd_platform_freeze_devq(ahd, scb);
 7163 }
 7165 void
ahd_qinfifo_requeue_tail(struct ahd_softc *ahd, struct scb *scb)
 7167 {
 7168         struct scb      *prev_scb;
ahd_mode_state   saved_modes;
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_CCHAN, AHD_MODE_CCHAN);
prev_scb = NULL;
 7174         if (ahd_qinfifo_count(ahd) != 0) {
u_int prev_tag;
u_int prev_pos;
prev_pos = AHD_QIN_WRAP(ahd->qinfifonext - 1);
prev_tag = ahd->qinfifo[prev_pos];
prev_scb = ahd_lookup_scb(ahd, prev_tag);
 7181         }
ahd_qinfifo_requeue(ahd, prev_scb, scb);
ahd_set_hnscb_qoff(ahd, ahd->qinfifonext);
ahd_restore_modes(ahd, saved_modes);
 7185 }
 7187 void
ahd_qinfifo_requeue(struct ahd_softc *ahd, struct scb *prev_scb,
 7189                     struct scb *scb)
 7190 {
 7191         if (prev_scb == NULL) {
uint32_t busaddr;
busaddr = aic_le32toh(scb->hscb->hscb_busaddr);
ahd_outl(ahd, NEXT_QUEUED_SCB_ADDR, busaddr);
 7196         } else {
prev_scb->hscb->next_hscb_busaddr = scb->hscb->hscb_busaddr;
ahd_sync_scb(ahd, prev_scb, 
BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
 7200         }
ahd->qinfifo[AHD_QIN_WRAP(ahd->qinfifonext)] = SCB_GET_TAG(scb);
ahd->qinfifonext++;
scb->hscb->next_hscb_busaddr = ahd->next_queued_hscb->hscb_busaddr;
ahd_sync_scb(ahd, scb, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
 7205 }
 7207 int
ahd_qinfifo_count(struct ahd_softc *ahd)
 7209 {
u_int qinpos;
u_int wrap_qinpos;
u_int wrap_qinfifonext;
AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
qinpos = ahd_get_snscb_qoff(ahd);
wrap_qinpos = AHD_QIN_WRAP(qinpos);
wrap_qinfifonext = AHD_QIN_WRAP(ahd->qinfifonext);
 7218         if (wrap_qinfifonext >= wrap_qinpos)
 7219                 return (wrap_qinfifonext - wrap_qinpos);
 7220         else
 7221                 return (wrap_qinfifonext
 7222                       + NUM_ELEMENTS(ahd->qinfifo) - wrap_qinpos);
 7223 }
 7225 void
ahd_reset_cmds_pending(struct ahd_softc *ahd)
 7227 {
 7228         struct          scb *scb;
ahd_mode_state  saved_modes;
u_int           pending_cmds;
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_CCHAN, AHD_MODE_CCHAN);
 7235         /*
 7236          * Don't count any commands as outstanding that the
 7237          * sequencer has already marked for completion.
 7238          */
ahd_flush_qoutfifo(ahd);
pending_cmds = 0;
LIST_FOREACH(scb, &ahd->pending_scbs, pending_links) {
pending_cmds++;
 7244         }
ahd_outw(ahd, CMDS_PENDING, pending_cmds - ahd_qinfifo_count(ahd));
ahd_restore_modes(ahd, saved_modes);
ahd->flags &= ~AHD_UPDATE_PEND_CMDS;
 7248 }
 7250 void
ahd_done_with_status(struct ahd_softc *ahd, struct scb *scb, uint32_t status)
 7252 {
cam_status ostat;
cam_status cstat;
ostat = aic_get_transaction_status(scb);
 7257         if (ostat == CAM_REQ_INPROG)
aic_set_transaction_status(scb, status);
cstat = aic_get_transaction_status(scb);
 7260         if (cstat != CAM_REQ_CMP)
aic_freeze_scb(scb);
ahd_done(ahd, scb);
 7263 }
 7265 int
ahd_search_qinfifo(struct ahd_softc *ahd, int target, char channel,
 7267                    int lun, u_int tag, role_t role, uint32_t status,
ahd_search_action action)
 7269 {
 7270         struct scb      *scb;
 7271         struct scb      *mk_msg_scb;
 7272         struct scb      *prev_scb;
ahd_mode_state   saved_modes;
u_int            qinstart;
u_int            qinpos;
u_int            qintail;
u_int            tid_next;
u_int            tid_prev;
u_int            scbid;
u_int            seq_flags2;
u_int            savedscbptr;
uint32_t         busaddr;
 7283         int              found;
 7284         int              targets;
 7286         /* Must be in CCHAN mode */
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_CCHAN, AHD_MODE_CCHAN);
 7290         /*
 7291          * Halt any pending SCB DMA.  The sequencer will reinitiate
 7292          * this dma if the qinfifo is not empty once we unpause.
 7293          */
 7294         if ((ahd_inb(ahd, CCSCBCTL) & (CCARREN|CCSCBEN|CCSCBDIR))
 7295          == (CCARREN|CCSCBEN|CCSCBDIR)) {
ahd_outb(ahd, CCSCBCTL,
ahd_inb(ahd, CCSCBCTL) & ~(CCARREN|CCSCBEN));
 7298                 while ((ahd_inb(ahd, CCSCBCTL) & (CCARREN|CCSCBEN)) != 0)
 7299                         ;
 7300         }
 7301         /* Determine sequencer's position in the qinfifo. */
qintail = AHD_QIN_WRAP(ahd->qinfifonext);
qinstart = ahd_get_snscb_qoff(ahd);
qinpos = AHD_QIN_WRAP(qinstart);
found = 0;
prev_scb = NULL;
 7308         if (action == SEARCH_PRINT) {
printf("qinstart = %d qinfifonext = %d\nQINFIFO:",
qinstart, ahd->qinfifonext);
 7311         }
 7313         /*
 7314          * Start with an empty queue.  Entries that are not chosen
 7315          * for removal will be re-added to the queue as we go.
 7316          */
ahd->qinfifonext = qinstart;
busaddr = aic_le32toh(ahd->next_queued_hscb->hscb_busaddr);
ahd_outl(ahd, NEXT_QUEUED_SCB_ADDR, busaddr);
 7321         while (qinpos != qintail) {
scb = ahd_lookup_scb(ahd, ahd->qinfifo[qinpos]);
 7323                 if (scb == NULL) {
printf("qinpos = %d, SCB index = %d\n",
qinpos, ahd->qinfifo[qinpos]);
panic("Loop 1");
 7327                 }
 7329                 if (ahd_match_scb(ahd, scb, target, channel, lun, tag, role)) {
 7330                         /*
 7331                          * We found an scb that needs to be acted on.
 7332                          */
found++;
 7334                         switch (action) {
 7335                         case SEARCH_COMPLETE:
 7336                                 if ((scb->flags & SCB_ACTIVE) == 0)
printf("Inactive SCB in qinfifo\n");
ahd_done_with_status(ahd, scb, status);
 7339                                 /* FALLTHROUGH */
 7340                         case SEARCH_REMOVE:
 7341                                 break;
 7342                         case SEARCH_PRINT:
printf(" 0x%x", ahd->qinfifo[qinpos]);
 7344                                 /* FALLTHROUGH */
 7345                         case SEARCH_COUNT:
ahd_qinfifo_requeue(ahd, prev_scb, scb);
prev_scb = scb;
 7348                                 break;
 7349                         }
 7350                 } else {
ahd_qinfifo_requeue(ahd, prev_scb, scb);
prev_scb = scb;
 7353                 }
qinpos = AHD_QIN_WRAP(qinpos+1);
 7355         }
ahd_set_hnscb_qoff(ahd, ahd->qinfifonext);
 7359         if (action == SEARCH_PRINT)
printf("\nWAITING_TID_QUEUES:\n");
 7362         /*
 7363          * Search waiting for selection lists.  We traverse the
 7364          * list of "their ids" waiting for selection and, if
 7365          * appropriate, traverse the SCBs of each "their id"
 7366          * looking for matches.
 7367          */
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
seq_flags2 = ahd_inb(ahd, SEQ_FLAGS2);
 7370         if ((seq_flags2 & PENDING_MK_MESSAGE) != 0) {
scbid = ahd_inw(ahd, MK_MESSAGE_SCB);
mk_msg_scb = ahd_lookup_scb(ahd, scbid);
 7373         } else
mk_msg_scb = NULL;
savedscbptr = ahd_get_scbptr(ahd);
tid_next = ahd_inw(ahd, WAITING_TID_HEAD);
tid_prev = SCB_LIST_NULL;
targets = 0;
 7379         for (scbid = tid_next; !SCBID_IS_NULL(scbid); scbid = tid_next) {
u_int tid_head;
u_int tid_tail;
targets++;
 7384                 if (targets > AHD_NUM_TARGETS)
panic("TID LIST LOOP");
 7387                 if (scbid >= ahd->scb_data.numscbs) {
printf("%s: Waiting TID List inconsistency. "
 7389                                "SCB index == 0x%x, yet numscbs == 0x%x.",
ahd_name(ahd), scbid, ahd->scb_data.numscbs);
ahd_dump_card_state(ahd);
panic("for safety");
 7393                 }
scb = ahd_lookup_scb(ahd, scbid);
 7395                 if (scb == NULL) {
printf("%s: SCB = 0x%x Not Active!\n",
ahd_name(ahd), scbid);
panic("Waiting TID List traversal");
 7399                 }
ahd_set_scbptr(ahd, scbid);
tid_next = ahd_inw_scbram(ahd, SCB_NEXT2);
 7402                 if (ahd_match_scb(ahd, scb, target, channel, CAM_LUN_WILDCARD,
SCB_LIST_NULL, ROLE_UNKNOWN) == 0) {
tid_prev = scbid;
 7405                         continue;
 7406                 }
 7408                 /*
 7409                  * We found a list of scbs that needs to be searched.
 7410                  */
 7411                 if (action == SEARCH_PRINT)
printf("       %d ( ", SCB_GET_TARGET(ahd, scb));
tid_head = scbid;
found += ahd_search_scb_list(ahd, target, channel,
lun, tag, role, status,
action, &tid_head, &tid_tail,
SCB_GET_TARGET(ahd, scb));
 7418                 /*
 7419                  * Check any MK_MESSAGE SCB that is still waiting to
 7420                  * enter this target's waiting for selection queue.
 7421                  */
 7422                 if (mk_msg_scb != NULL
 7423                  && ahd_match_scb(ahd, mk_msg_scb, target, channel,
lun, tag, role)) {
 7426                         /*
 7427                          * We found an scb that needs to be acted on.
 7428                          */
found++;
 7430                         switch (action) {
 7431                         case SEARCH_COMPLETE:
 7432                                 if ((mk_msg_scb->flags & SCB_ACTIVE) == 0)
printf("Inactive SCB pending MK_MSG\n");
ahd_done_with_status(ahd, mk_msg_scb, status);
 7435                                 /* FALLTHROUGH */
 7436                         case SEARCH_REMOVE:
 7437                         {
u_int tail_offset;
printf("Removing MK_MSG scb\n");
 7442                                 /*
 7443                                  * Reset our tail to the tail of the
 7444                                  * main per-target list.
 7445                                  */
tail_offset = WAITING_SCB_TAILS
 7447                                     + (2 * SCB_GET_TARGET(ahd, mk_msg_scb));
ahd_outw(ahd, tail_offset, tid_tail);
seq_flags2 &= ~PENDING_MK_MESSAGE;
ahd_outb(ahd, SEQ_FLAGS2, seq_flags2);
ahd_outw(ahd, CMDS_PENDING,
ahd_inw(ahd, CMDS_PENDING)-1);
mk_msg_scb = NULL;
 7455                                 break;
 7456                         }
 7457                         case SEARCH_PRINT:
printf(" 0x%x", SCB_GET_TAG(scb));
 7459                                 /* FALLTHROUGH */
 7460                         case SEARCH_COUNT:
 7461                                 break;
 7462                         }
 7463                 }
 7465                 if (mk_msg_scb != NULL
 7466                  && SCBID_IS_NULL(tid_head)
 7467                  && ahd_match_scb(ahd, scb, target, channel, CAM_LUN_WILDCARD,
SCB_LIST_NULL, ROLE_UNKNOWN)) {
 7470                         /*
 7471                          * When removing the last SCB for a target
 7472                          * queue with a pending MK_MESSAGE scb, we
 7473                          * must queue the MK_MESSAGE scb.
 7474                          */
printf("Queueing mk_msg_scb\n");
tid_head = ahd_inw(ahd, MK_MESSAGE_SCB);
seq_flags2 &= ~PENDING_MK_MESSAGE;
ahd_outb(ahd, SEQ_FLAGS2, seq_flags2);
mk_msg_scb = NULL;
 7480                 }
 7481                 if (tid_head != scbid)
ahd_stitch_tid_list(ahd, tid_prev, tid_head, tid_next);
 7483                 if (!SCBID_IS_NULL(tid_head))
tid_prev = tid_head;
 7485                 if (action == SEARCH_PRINT)
printf(")\n");
 7487         }
 7489         /* Restore saved state. */
ahd_set_scbptr(ahd, savedscbptr);
ahd_restore_modes(ahd, saved_modes);
 7492         return (found);
 7493 }
 7495 int
ahd_search_scb_list(struct ahd_softc *ahd, int target, char channel,
 7497                     int lun, u_int tag, role_t role, uint32_t status,
ahd_search_action action, u_int *list_head, 
u_int *list_tail, u_int tid)
 7500 {
 7501         struct  scb *scb;
u_int   scbid;
u_int   next;
u_int   prev;
 7505         int     found;
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
found = 0;
prev = SCB_LIST_NULL;
next = *list_head;
 7511         *list_tail = SCB_LIST_NULL;
 7512         for (scbid = next; !SCBID_IS_NULL(scbid); scbid = next) {
 7513                 if (scbid >= ahd->scb_data.numscbs) {
printf("%s:SCB List inconsistency. "
 7515                                "SCB == 0x%x, yet numscbs == 0x%x.",
ahd_name(ahd), scbid, ahd->scb_data.numscbs);
ahd_dump_card_state(ahd);
panic("for safety");
 7519                 }
scb = ahd_lookup_scb(ahd, scbid);
 7521                 if (scb == NULL) {
printf("%s: SCB = %d Not Active!\n",
ahd_name(ahd), scbid);
panic("Waiting List traversal");
 7525                 }
ahd_set_scbptr(ahd, scbid);
 7527                 *list_tail = scbid;
next = ahd_inw_scbram(ahd, SCB_NEXT);
 7529                 if (ahd_match_scb(ahd, scb, target, channel,
lun, SCB_LIST_NULL, role) == 0) {
prev = scbid;
 7532                         continue;
 7533                 }
found++;
 7535                 switch (action) {
 7536                 case SEARCH_COMPLETE:
 7537                         if ((scb->flags & SCB_ACTIVE) == 0)
printf("Inactive SCB in Waiting List\n");
ahd_done_with_status(ahd, scb, status);
 7540                         /* FALLTHROUGH */
 7541                 case SEARCH_REMOVE:
ahd_rem_wscb(ahd, scbid, prev, next, tid);
 7543                         *list_tail = prev;
 7544                         if (SCBID_IS_NULL(prev))
 7545                                 *list_head = next;
 7546                         break;
 7547                 case SEARCH_PRINT:
printf("0x%x ", scbid);
 7549                 case SEARCH_COUNT:
prev = scbid;
 7551                         break;
 7552                 }
 7553                 if (found > AHD_SCB_MAX)
panic("SCB LIST LOOP");
 7555         }
 7556         if (action == SEARCH_COMPLETE
 7557          || action == SEARCH_REMOVE)
ahd_outw(ahd, CMDS_PENDING, ahd_inw(ahd, CMDS_PENDING) - found);
 7559         return (found);
 7560 }
 7562 void
ahd_stitch_tid_list(struct ahd_softc *ahd, u_int tid_prev,
u_int tid_cur, u_int tid_next)
 7565 {
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
 7568         if (SCBID_IS_NULL(tid_cur)) {
 7570                 /* Bypass current TID list */
 7571                 if (SCBID_IS_NULL(tid_prev)) {
ahd_outw(ahd, WAITING_TID_HEAD, tid_next);
 7573                 } else {
ahd_set_scbptr(ahd, tid_prev);
ahd_outw(ahd, SCB_NEXT2, tid_next);
 7576                 }
 7577                 if (SCBID_IS_NULL(tid_next))
ahd_outw(ahd, WAITING_TID_TAIL, tid_prev);
 7579         } else {
 7581                 /* Stitch through tid_cur */
 7582                 if (SCBID_IS_NULL(tid_prev)) {
ahd_outw(ahd, WAITING_TID_HEAD, tid_cur);
 7584                 } else {
ahd_set_scbptr(ahd, tid_prev);
ahd_outw(ahd, SCB_NEXT2, tid_cur);
 7587                 }
ahd_set_scbptr(ahd, tid_cur);
ahd_outw(ahd, SCB_NEXT2, tid_next);
 7591                 if (SCBID_IS_NULL(tid_next))
ahd_outw(ahd, WAITING_TID_TAIL, tid_cur);
 7593         }
 7594 }
 7596 /*
 7597  * Manipulate the waiting for selection list and return the
 7598  * scb that follows the one that we remove.
 7599  */
u_int
ahd_rem_wscb(struct ahd_softc *ahd, u_int scbid,
u_int prev, u_int next, u_int tid)
 7603 {
u_int tail_offset;
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
 7607         if (!SCBID_IS_NULL(prev)) {
ahd_set_scbptr(ahd, prev);
ahd_outw(ahd, SCB_NEXT, next);
 7610         }
 7612         /*
 7613          * SCBs that have MK_MESSAGE set in them may
 7614          * cause the tail pointer to be updated without
 7615          * setting the next pointer of the previous tail.
 7616          * Only clear the tail if the removed SCB was
 7617          * the tail.
 7618          */
tail_offset = WAITING_SCB_TAILS + (2 * tid);
 7620         if (SCBID_IS_NULL(next)
 7621          && ahd_inw(ahd, tail_offset) == scbid)
ahd_outw(ahd, tail_offset, prev);
ahd_add_scb_to_free_list(ahd, scbid);
 7625         return (next);
 7626 }
 7628 /*
 7629  * Add the SCB as selected by SCBPTR onto the on chip list of
 7630  * free hardware SCBs.  This list is empty/unused if we are not
 7631  * performing SCB paging.
 7632  */
 7633 void
ahd_add_scb_to_free_list(struct ahd_softc *ahd, u_int scbid)
 7635 {
 7636 /* XXX Need some other mechanism to designate "free". */
 7637         /*
 7638          * Invalidate the tag so that our abort
 7639          * routines don't think it's active.
 7640         ahd_outb(ahd, SCB_TAG, SCB_LIST_NULL);
 7641          */
 7642 }
 7644 /******************************** Error Handling ******************************/
 7645 /*
 7646  * Abort all SCBs that match the given description (target/channel/lun/tag),
 7647  * setting their status to the passed in status if the status has not already
 7648  * been modified from CAM_REQ_INPROG.  This routine assumes that the sequencer
 7649  * is paused before it is called.
 7650  */
 7651 int
ahd_abort_scbs(struct ahd_softc *ahd, int target, char channel,
 7653                int lun, u_int tag, role_t role, uint32_t status)
 7654 {
 7655         struct          scb *scbp;
 7656         struct          scb *scbp_next;
u_int           i, j;
u_int           maxtarget;
u_int           minlun;
u_int           maxlun;
 7661         int             found;
ahd_mode_state  saved_modes;
 7664         /* restore this when we're done */
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
found = ahd_search_qinfifo(ahd, target, channel, lun, SCB_LIST_NULL,
role, CAM_REQUEUE_REQ, SEARCH_COMPLETE);
 7671         /*
 7672          * Clean out the busy target table for any untagged commands.
 7673          */
i = 0;
maxtarget = 16;
 7676         if (target != CAM_TARGET_WILDCARD) {
i = target;
 7678                 if (channel == 'B')
i += 8;
maxtarget = i + 1;
 7681         }
 7683         if (lun == CAM_LUN_WILDCARD) {
minlun = 0;
maxlun = AHD_NUM_LUNS_NONPKT;
 7686         } else if (lun >= AHD_NUM_LUNS_NONPKT) {
minlun = maxlun = 0;
 7688         } else {
minlun = lun;
maxlun = lun + 1;
 7691         }
 7693         if (role != ROLE_TARGET) {
 7694                 for (;i < maxtarget; i++) {
 7695                         for (j = minlun;j < maxlun; j++) {
u_int scbid;
u_int tcl;
tcl = BUILD_TCL_RAW(i, 'A', j);
scbid = ahd_find_busy_tcl(ahd, tcl);
scbp = ahd_lookup_scb(ahd, scbid);
 7702                                 if (scbp == NULL
 7703                                  || ahd_match_scb(ahd, scbp, target, channel,
lun, tag, role) == 0)
 7705                                         continue;
ahd_unbusy_tcl(ahd, BUILD_TCL_RAW(i, 'A', j));
 7707                         }
 7708                 }
 7709         }
 7711         /*
 7712          * Don't abort commands that have already completed,
 7713          * but haven't quite made it up to the host yet.
 7714          */
ahd_flush_qoutfifo(ahd);
 7717         /*
 7718          * Go through the pending CCB list and look for
 7719          * commands for this target that are still active.
 7720          * These are other tagged commands that were
 7721          * disconnected when the reset occurred.
 7722          */
scbp_next = LIST_FIRST(&ahd->pending_scbs);
 7724         while (scbp_next != NULL) {
scbp = scbp_next;
scbp_next = LIST_NEXT(scbp, pending_links);
 7727                 if (ahd_match_scb(ahd, scbp, target, channel, lun, tag, role)) {
cam_status ostat;
ostat = aic_get_transaction_status(scbp);
 7731                         if (ostat == CAM_REQ_INPROG)
aic_set_transaction_status(scbp, status);
 7733                         if (aic_get_transaction_status(scbp) != CAM_REQ_CMP)
aic_freeze_scb(scbp);
 7735                         if ((scbp->flags & SCB_ACTIVE) == 0)
printf("Inactive SCB on pending list\n");
ahd_done(ahd, scbp);
found++;
 7739                 }
 7740         }
ahd_restore_modes(ahd, saved_modes);
ahd_platform_abort_scbs(ahd, target, channel, lun, tag, role, status);
ahd->flags |= AHD_UPDATE_PEND_CMDS;
 7744         return found;
 7745 }
 7747 void
ahd_reset_current_bus(struct ahd_softc *ahd)
 7749 {
uint8_t scsiseq;
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
ahd_outb(ahd, SIMODE1, ahd_inb(ahd, SIMODE1) & ~ENSCSIRST);
scsiseq = ahd_inb(ahd, SCSISEQ0) & ~(ENSELO|ENARBO|SCSIRSTO);
ahd_outb(ahd, SCSISEQ0, scsiseq | SCSIRSTO);
ahd_flush_device_writes(ahd);
aic_delay(AHD_BUSRESET_DELAY);
 7758         /* Turn off the bus reset */
ahd_outb(ahd, SCSISEQ0, scsiseq);
ahd_flush_device_writes(ahd);
aic_delay(AHD_BUSRESET_DELAY);
 7762         if ((ahd->bugs & AHD_SCSIRST_BUG) != 0) {
 7763                 /*
 7764                  * 2A Razor #474
 7765                  * Certain chip state is not cleared for
 7766                  * SCSI bus resets that we initiate, so
 7767                  * we must reset the chip.
 7768                  */
ahd_reset(ahd, /*reinit*/TRUE);
ahd_intr_enable(ahd, /*enable*/TRUE);
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
 7772         }
ahd_clear_intstat(ahd);
 7775 }
 7777 int
ahd_reset_channel(struct ahd_softc *ahd, char channel, int initiate_reset)
 7779 {
 7780         struct  ahd_devinfo devinfo;
u_int   initiator;
u_int   target;
u_int   max_scsiid;
 7784         int     found;
u_int   fifo;
u_int   next_fifo;
ahd->pending_device = NULL;
ahd_compile_devinfo(&devinfo,
CAM_TARGET_WILDCARD,
CAM_TARGET_WILDCARD,
CAM_LUN_WILDCARD,
channel, ROLE_UNKNOWN);
ahd_pause(ahd);
 7797         /* Make sure the sequencer is in a safe location. */
ahd_clear_critical_section(ahd);
 7800 #if AHD_TARGET_MODE
 7801         if ((ahd->flags & AHD_TARGETROLE) != 0) {
ahd_run_tqinfifo(ahd, /*paused*/TRUE);
 7803         }
 7804 #endif
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
 7807         /*
 7808          * Disable selections so no automatic hardware
 7809          * functions will modify chip state.
 7810          */
ahd_outb(ahd, SCSISEQ0, 0);
ahd_outb(ahd, SCSISEQ1, 0);
 7814         /*
 7815          * Safely shut down our DMA engines.  Always start with
 7816          * the FIFO that is not currently active (if any are
 7817          * actively connected).
 7818          */
next_fifo = fifo = ahd_inb(ahd, DFFSTAT) & CURRFIFO;
 7820         if (next_fifo > CURRFIFO_1)
 7821                 /* If disconneced, arbitrarily start with FIFO1. */
next_fifo = fifo = 0;
 7823         do {
next_fifo ^= CURRFIFO_1;
ahd_set_modes(ahd, next_fifo, next_fifo);
ahd_outb(ahd, DFCNTRL,
ahd_inb(ahd, DFCNTRL) & ~(SCSIEN|HDMAEN));
 7828                 while ((ahd_inb(ahd, DFCNTRL) & HDMAENACK) != 0)
aic_delay(10);
 7830                 /*
 7831                  * Set CURRFIFO to the now inactive channel.
 7832                  */
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
ahd_outb(ahd, DFFSTAT, next_fifo);
 7835         } while (next_fifo != fifo);
 7837         /*
 7838          * Reset the bus if we are initiating this reset
 7839          */
ahd_clear_msg_state(ahd);
ahd_outb(ahd, SIMODE1,
ahd_inb(ahd, SIMODE1) & ~(ENBUSFREE|ENSCSIRST));
 7844         if (initiate_reset)
ahd_reset_current_bus(ahd);
ahd_clear_intstat(ahd);
 7849         /*
 7850          * Clean up all the state information for the
 7851          * pending transactions on this bus.
 7852          */
found = ahd_abort_scbs(ahd, CAM_TARGET_WILDCARD, channel,
CAM_LUN_WILDCARD, SCB_LIST_NULL,
ROLE_UNKNOWN, CAM_SCSI_BUS_RESET);
 7857         /*
 7858          * Cleanup anything left in the FIFOs.
 7859          */
ahd_clear_fifo(ahd, 0);
ahd_clear_fifo(ahd, 1);
 7863         /*
 7864          * Revert to async/narrow transfers until we renegotiate.
 7865          */
max_scsiid = (ahd->features & AHD_WIDE) ? 15 : 7;
 7867         for (target = 0; target <= max_scsiid; target++) {
 7869                 if (ahd->enabled_targets[target] == NULL)
 7870                         continue;
 7871                 for (initiator = 0; initiator <= max_scsiid; initiator++) {
 7872                         struct ahd_devinfo devinfo;
ahd_compile_devinfo(&devinfo, target, initiator,
CAM_LUN_WILDCARD,
 7876                                             'A', ROLE_UNKNOWN);
ahd_set_width(ahd, &devinfo, MSG_EXT_WDTR_BUS_8_BIT,
AHD_TRANS_CUR, /*paused*/TRUE);
ahd_set_syncrate(ahd, &devinfo, /*period*/0,
 7880                                          /*offset*/0, /*ppr_options*/0,
AHD_TRANS_CUR, /*paused*/TRUE);
 7882                 }
 7883         }
 7885 #ifdef AHD_TARGET_MODE
max_scsiid = (ahd->features & AHD_WIDE) ? 15 : 7;
 7888         /*
 7889          * Send an immediate notify ccb to all target more peripheral
 7890          * drivers affected by this action.
 7891          */
 7892         for (target = 0; target <= max_scsiid; target++) {
 7893                 struct ahd_tmode_tstate* tstate;
u_int lun;
tstate = ahd->enabled_targets[target];
 7897                 if (tstate == NULL)
 7898                         continue;
 7899                 for (lun = 0; lun < AHD_NUM_LUNS; lun++) {
 7900                         struct ahd_tmode_lstate* lstate;
lstate = tstate->enabled_luns[lun];
 7903                         if (lstate == NULL)
 7904                                 continue;
ahd_queue_lstate_event(ahd, lstate, CAM_TARGET_WILDCARD,
EVENT_TYPE_BUS_RESET, /*arg*/0);
ahd_send_lstate_events(ahd, lstate);
 7909                 }
 7910         }
 7911 #endif
 7912 #if 0
 7913         /* Notify the XPT that a bus reset occurred */
ahd_send_async(ahd, devinfo.channel, CAM_TARGET_WILDCARD,
CAM_LUN_WILDCARD, AC_BUS_RESET, NULL);
 7916 #endif
ahd_restart(ahd);
 7918         /*
 7919          * Freeze the SIMQ until our poller can determine that
 7920          * the bus reset has really gone away.  We set the initial
 7921          * timer to 0 to have the check performed as soon as possible
 7922          * from the timer context.
 7923          */
 7924         if ((ahd->flags & AHD_RESET_POLL_ACTIVE) == 0) {
ahd->flags |= AHD_RESET_POLL_ACTIVE;
aic_freeze_simq(ahd);
aic_timer_reset(&ahd->reset_timer, 0, ahd_reset_poll, ahd);
 7928         }
 7929         return (found);
 7930 }
 7933 #define AHD_RESET_POLL_MS 1
 7934 void
ahd_reset_poll(void *arg)
 7936 {
 7937         struct  ahd_softc *ahd;
u_int   scsiseq1;
 7939         int     l;
 7940         int     s;
ahd_list_lock(&l);
ahd = ahd_find_softc((struct ahd_softc *)arg);
 7944         if (ahd == NULL) {
printf("ahd_reset_poll: Instance %p no longer exists\n", arg);
ahd_list_unlock(&l);
 7947                 return;
 7948         }
ahd_lock(ahd, &s);
ahd_pause(ahd);
ahd_update_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
ahd_outb(ahd, CLRSINT1, CLRSCSIRSTI);
 7954         if ((ahd_inb(ahd, SSTAT1) & SCSIRSTI) != 0) {
aic_timer_reset(&ahd->reset_timer, AHD_RESET_POLL_MS,
ahd_reset_poll, ahd);
ahd_unpause(ahd);
ahd_unlock(ahd, &s);
ahd_list_unlock(&l);
 7960                 return;
 7961         }
 7963         /* Reset is now low.  Complete chip reinitialization. */
ahd_outb(ahd, SIMODE1, ahd_inb(ahd, SIMODE1) | ENSCSIRST);
scsiseq1 = ahd_inb(ahd, SCSISEQ_TEMPLATE);
ahd_outb(ahd, SCSISEQ1, scsiseq1 & (ENSELI|ENRSELI|ENAUTOATNP));
ahd_unpause(ahd);
ahd->flags &= ~AHD_RESET_POLL_ACTIVE;
ahd_unlock(ahd, &s);
aic_release_simq(ahd);
ahd_list_unlock(&l);
 7972 }
 7974 /**************************** Statistics Processing ***************************/
 7975 void
ahd_stat_timer(void *arg)
 7977 {
 7978         struct  ahd_softc *ahd;
 7979         int     l;
 7980         int     s;
 7981         int     enint_coal;
ahd_list_lock(&l);
ahd = ahd_find_softc((struct ahd_softc *)arg);
 7985         if (ahd == NULL) {
printf("ahd_stat_timer: Instance %p no longer exists\n", arg);
ahd_list_unlock(&l);
 7988                 return;
 7989         }
ahd_lock(ahd, &s);
enint_coal = ahd->hs_mailbox & ENINT_COALESCE;
 7993         if (ahd->cmdcmplt_total > ahd->int_coalescing_threshold)
enint_coal |= ENINT_COALESCE;
 7995         else if (ahd->cmdcmplt_total < ahd->int_coalescing_stop_threshold)
enint_coal &= ~ENINT_COALESCE;
 7998         if (enint_coal != (ahd->hs_mailbox & ENINT_COALESCE)) {
ahd_enable_coalescing(ahd, enint_coal);
 8000 #ifdef AHD_DEBUG
 8001                 if ((ahd_debug & AHD_SHOW_INT_COALESCING) != 0)
printf("%s: Interrupt coalescing "
 8003                                "now %sabled. Cmds %d\n",
ahd_name(ahd),
 8005                                (enint_coal & ENINT_COALESCE) ? "en" : "dis",
ahd->cmdcmplt_total);
 8007 #endif
 8008         }
ahd->cmdcmplt_bucket = (ahd->cmdcmplt_bucket+1) & (AHD_STAT_BUCKETS-1);
ahd->cmdcmplt_total -= ahd->cmdcmplt_counts[ahd->cmdcmplt_bucket];
ahd->cmdcmplt_counts[ahd->cmdcmplt_bucket] = 0;
aic_timer_reset(&ahd->stat_timer, AHD_STAT_UPDATE_MS,
ahd_stat_timer, ahd);
ahd_unlock(ahd, &s);
ahd_list_unlock(&l);
 8017 }
 8019 /****************************** Status Processing *****************************/
 8020 void
ahd_handle_scb_status(struct ahd_softc *ahd, struct scb *scb)
 8022 {
 8023         if (scb->hscb->shared_data.istatus.scsi_status != 0) {
ahd_handle_scsi_status(ahd, scb);
 8025         } else {
ahd_calc_residual(ahd, scb);
ahd_done(ahd, scb);
 8028         }
 8029 }
 8031 void
ahd_handle_scsi_status(struct ahd_softc *ahd, struct scb *scb)
 8033 {
 8034         struct  hardware_scb *hscb;
 8035         int     paused;
 8037         /*
 8038          * The sequencer freezes its select-out queue
 8039          * anytime a SCSI status error occurs.  We must
 8040          * handle the error and increment our qfreeze count
 8041          * to allow the sequencer to continue.  We don't
 8042          * bother clearing critical sections here since all
 8043          * operations are on data structures that the sequencer
 8044          * is not touching once the queue is frozen.
 8045          */
hscb = scb->hscb; 
 8048         if (ahd_is_paused(ahd)) {
paused = 1;
 8050         } else {
paused = 0;
ahd_pause(ahd);
 8053         }
 8055         /* Freeze the queue until the client sees the error. */
ahd_freeze_devq(ahd, scb);
aic_freeze_scb(scb);
ahd->qfreeze_cnt++;
ahd_outw(ahd, KERNEL_QFREEZE_COUNT, ahd->qfreeze_cnt);
 8061         if (paused == 0)
ahd_unpause(ahd);
 8064         /* Don't want to clobber the original sense code */
 8065         if ((scb->flags & SCB_SENSE) != 0) {
 8066                 /*
 8067                  * Clear the SCB_SENSE Flag and perform
 8068                  * a normal command completion.
 8069                  */
scb->flags &= ~SCB_SENSE;
aic_set_transaction_status(scb, CAM_AUTOSENSE_FAIL);
ahd_done(ahd, scb);
 8073                 return;
 8074         }
aic_set_transaction_status(scb, CAM_SCSI_STATUS_ERROR);
aic_set_scsi_status(scb, hscb->shared_data.istatus.scsi_status);
 8077         switch (hscb->shared_data.istatus.scsi_status) {
 8078         case STATUS_PKT_SENSE:
 8079         {
 8080                 struct scsi_status_iu_header *siu;
ahd_sync_sense(ahd, scb, BUS_DMASYNC_POSTREAD);
siu = (struct scsi_status_iu_header *)scb->sense_data;
aic_set_scsi_status(scb, siu->status);
 8085 #ifdef AHD_DEBUG
 8086                 if ((ahd_debug & AHD_SHOW_SENSE) != 0) {
ahd_print_path(ahd, scb);
printf("SCB 0x%x Received PKT Status of 0x%x\n",
SCB_GET_TAG(scb), siu->status);
printf("\tflags = 0x%x, sense len = 0x%x, "
 8091                                "pktfail = 0x%x\n",
siu->flags, scsi_4btoul(siu->sense_length),
scsi_4btoul(siu->pkt_failures_length));
 8094                 }
 8095 #endif
 8096                 if ((siu->flags & SIU_RSPVALID) != 0) {
ahd_print_path(ahd, scb);
 8098                         if (scsi_4btoul(siu->pkt_failures_length) < 4) {
printf("Unable to parse pkt_failures\n");
 8100                         } else {
 8102                                 switch (SIU_PKTFAIL_CODE(siu)) {
 8103                                 case SIU_PFC_NONE:
printf("No packet failure found\n");
 8105                                         break;
 8106                                 case SIU_PFC_CIU_FIELDS_INVALID:
printf("Invalid Command IU Field\n");
 8108                                         break;
 8109                                 case SIU_PFC_TMF_NOT_SUPPORTED:
printf("TMF not supportd\n");
 8111                                         break;
 8112                                 case SIU_PFC_TMF_FAILED:
printf("TMF failed\n");
 8114                                         break;
 8115                                 case SIU_PFC_INVALID_TYPE_CODE:
printf("Invalid L_Q Type code\n");
 8117                                         break;
 8118                                 case SIU_PFC_ILLEGAL_REQUEST:
printf("Illegal request\n");
 8120                                 default:
 8121                                         break;
 8122                                 }
 8123                         }
 8124                         if (siu->status == SCSI_STATUS_OK)
aic_set_transaction_status(scb,
CAM_REQ_CMP_ERR);
 8127                 }
 8128                 if ((siu->flags & SIU_SNSVALID) != 0) {
scb->flags |= SCB_PKT_SENSE;
 8130 #ifdef AHD_DEBUG
 8131                         if ((ahd_debug & AHD_SHOW_SENSE) != 0)
printf("Sense data available\n");
 8133 #endif
 8134                 }
ahd_done(ahd, scb);
 8136                 break;
 8137         }
 8138         case SCSI_STATUS_CMD_TERMINATED:
 8139         case SCSI_STATUS_CHECK_COND:
 8140         {
 8141                 struct ahd_devinfo devinfo;
 8142                 struct ahd_dma_seg *sg;
 8143                 struct scsi_sense *sc;
 8144                 struct ahd_initiator_tinfo *targ_info;
 8145                 struct ahd_tmode_tstate *tstate;
 8146                 struct ahd_transinfo *tinfo;
 8147 #ifdef AHD_DEBUG
 8148                 if (ahd_debug & AHD_SHOW_SENSE) {
ahd_print_path(ahd, scb);
printf("SCB %d: requests Check Status\n",
SCB_GET_TAG(scb));
 8152                 }
 8153 #endif
 8155                 if (aic_perform_autosense(scb) == 0)
 8156                         break;
ahd_compile_devinfo(&devinfo, SCB_GET_OUR_ID(scb),
SCB_GET_TARGET(ahd, scb),
SCB_GET_LUN(scb),
SCB_GET_CHANNEL(ahd, scb),
ROLE_INITIATOR);
targ_info = ahd_fetch_transinfo(ahd,
devinfo.channel,
devinfo.our_scsiid,
devinfo.target,
 8167                                                 &tstate);
tinfo = &targ_info->curr;
sg = scb->sg_list;
sc = (struct scsi_sense *)hscb->shared_data.idata.cdb;
 8171                 /*
 8172                  * Save off the residual if there is one.
 8173                  */
ahd_update_residual(ahd, scb);
 8175 #ifdef AHD_DEBUG
 8176                 if (ahd_debug & AHD_SHOW_SENSE) {
ahd_print_path(ahd, scb);
printf("Sending Sense\n");
 8179                 }
 8180 #endif
scb->sg_count = 0;
sg = ahd_sg_setup(ahd, scb, sg, ahd_get_sense_bufaddr(ahd, scb),
aic_get_sense_bufsize(ahd, scb),
 8184                                   /*last*/TRUE);
sc->opcode = REQUEST_SENSE;
sc->byte2 = 0;
 8187                 if (tinfo->protocol_version <= SCSI_REV_2
 8188                  && SCB_GET_LUN(scb) < 8)
sc->byte2 = SCB_GET_LUN(scb) << 5;
sc->unused[0] = 0;
sc->unused[1] = 0;
sc->length = aic_get_sense_bufsize(ahd, scb);
sc->control = 0;
 8195                 /*
 8196                  * We can't allow the target to disconnect.
 8197                  * This will be an untagged transaction and
 8198                  * having the target disconnect will make this
 8199                  * transaction indestinguishable from outstanding
 8200                  * tagged transactions.
 8201                  */
hscb->control = 0;
 8204                 /*
 8205                  * This request sense could be because the
 8206                  * the device lost power or in some other
 8207                  * way has lost our transfer negotiations.
 8208                  * Renegotiate if appropriate.  Unit attention
 8209                  * errors will be reported before any data
 8210                  * phases occur.
 8211                  */
 8212                 if (aic_get_residual(scb) == aic_get_transfer_length(scb)) {
ahd_update_neg_request(ahd, &devinfo,
tstate, targ_info,
AHD_NEG_IF_NON_ASYNC);
 8216                 }
 8217                 if (tstate->auto_negotiate & devinfo.target_mask) {
hscb->control |= MK_MESSAGE;
scb->flags &=
 8220                             ~(SCB_NEGOTIATE|SCB_ABORT|SCB_DEVICE_RESET);
scb->flags |= SCB_AUTO_NEGOTIATE;
 8222                 }
hscb->cdb_len = sizeof(*sc);
ahd_setup_data_scb(ahd, scb);
scb->flags |= SCB_SENSE;
ahd_queue_scb(ahd, scb);
 8227                 /*
 8228                  * Ensure we have enough time to actually
 8229                  * retrieve the sense, but only schedule
 8230                  * the timer if we are not in recovery or
 8231                  * this is a recovery SCB that is allowed
 8232                  * to have an active timer.
 8233                  */
aic_scb_timer_reset(scb, 5 * 1000);
 8235                 break;
 8236         }
 8237         case SCSI_STATUS_OK:
printf("%s: Interrupted for staus of 0???\n",
ahd_name(ahd));
 8240                 /* FALLTHROUGH */
 8241         default:
ahd_done(ahd, scb);
 8243                 break;
 8244         }
 8245 }
 8247 /*
 8248  * Calculate the residual for a just completed SCB.
 8249  */
 8250 void
ahd_calc_residual(struct ahd_softc *ahd, struct scb *scb)
 8252 {
 8253         struct hardware_scb *hscb;
 8254         struct initiator_status *spkt;
uint32_t sgptr;
uint32_t resid_sgptr;
uint32_t resid;
 8259         /*
 8260          * 5 cases.
 8261          * 1) No residual.
 8262          *    SG_STATUS_VALID clear in sgptr.
 8263          * 2) Transferless command
 8264          * 3) Never performed any transfers.
 8265          *    sgptr has SG_FULL_RESID set.
 8266          * 4) No residual but target did not
 8267          *    save data pointers after the
 8268          *    last transfer, so sgptr was
 8269          *    never updated.
 8270          * 5) We have a partial residual.
 8271          *    Use residual_sgptr to determine
 8272          *    where we are.
 8273          */
hscb = scb->hscb;
sgptr = aic_le32toh(hscb->sgptr);
 8277         if ((sgptr & SG_STATUS_VALID) == 0)
 8278                 /* Case 1 */
 8279                 return;
sgptr &= ~SG_STATUS_VALID;
 8282         if ((sgptr & SG_LIST_NULL) != 0)
 8283                 /* Case 2 */
 8284                 return;
 8286         /*
 8287          * Residual fields are the same in both
 8288          * target and initiator status packets,
 8289          * so we can always use the initiator fields
 8290          * regardless of the role for this SCB.
 8291          */
spkt = &hscb->shared_data.istatus;
resid_sgptr = aic_le32toh(spkt->residual_sgptr);
 8294         if ((sgptr & SG_FULL_RESID) != 0) {
 8295                 /* Case 3 */
resid = aic_get_transfer_length(scb);
 8297         } else if ((resid_sgptr & SG_LIST_NULL) != 0) {
 8298                 /* Case 4 */
 8299                 return;
 8300         } else if ((resid_sgptr & SG_OVERRUN_RESID) != 0) {
ahd_print_path(ahd, scb);
printf("data overrun detected Tag == 0x%x.\n",
SCB_GET_TAG(scb));
ahd_freeze_devq(ahd, scb);
aic_set_transaction_status(scb, CAM_DATA_RUN_ERR);
aic_freeze_scb(scb);
 8307                 return;
 8308         } else if ((resid_sgptr & ~SG_PTR_MASK) != 0) {
panic("Bogus resid sgptr value 0x%x", resid_sgptr);
 8310                 /* NOTREACHED */
 8311         } else {
 8312                 struct ahd_dma_seg *sg;
 8314                 /*
 8315                  * Remainder of the SG where the transfer
 8316                  * stopped.  
 8317                  */
resid = aic_le32toh(spkt->residual_datacnt) & AHD_SG_LEN_MASK;
sg = ahd_sg_bus_to_virt(ahd, scb, resid_sgptr & SG_PTR_MASK);
 8321                 /* The residual sg_ptr always points to the next sg */
sg--;
 8324                 /*
 8325                  * Add up the contents of all residual
 8326                  * SG segments that are after the SG where
 8327                  * the transfer stopped.
 8328                  */
 8329                 while ((aic_le32toh(sg->len) & AHD_DMA_LAST_SEG) == 0) {
sg++;
resid += aic_le32toh(sg->len) & AHD_SG_LEN_MASK;
 8332                 }
 8333         }
 8334         if ((scb->flags & SCB_SENSE) == 0)
aic_set_residual(scb, resid);
 8336         else
aic_set_sense_residual(scb, resid);
 8339 #ifdef AHD_DEBUG
 8340         if ((ahd_debug & AHD_SHOW_MISC) != 0) {
ahd_print_path(ahd, scb);
printf("Handled %sResidual of %d bytes\n",
 8343                        (scb->flags & SCB_SENSE) ? "Sense " : "", resid);
 8344         }
 8345 #endif
 8346 }
 8348 /******************************* Target Mode **********************************/
 8349 #ifdef AHD_TARGET_MODE
 8350 /*
 8351  * Add a target mode event to this lun's queue
 8352  */
 8353 void
ahd_queue_lstate_event(struct ahd_softc *ahd, struct ahd_tmode_lstate *lstate,
u_int initiator_id, u_int event_type, u_int event_arg)
 8356 {
 8357         struct ahd_tmode_event *event;
 8358         int pending;
xpt_freeze_devq(lstate->path, /*count*/1);
 8361         if (lstate->event_w_idx >= lstate->event_r_idx)
pending = lstate->event_w_idx - lstate->event_r_idx;
 8363         else
pending = AHD_TMODE_EVENT_BUFFER_SIZE + 1
 8365                         - (lstate->event_r_idx - lstate->event_w_idx);
 8367         if (event_type == EVENT_TYPE_BUS_RESET
 8368          || event_type == MSG_BUS_DEV_RESET) {
 8369                 /*
 8370                  * Any earlier events are irrelevant, so reset our buffer.
 8371                  * This has the effect of allowing us to deal with reset
 8372                  * floods (an external device holding down the reset line)
 8373                  * without losing the event that is really interesting.
 8374                  */
lstate->event_r_idx = 0;
lstate->event_w_idx = 0;
xpt_release_devq(lstate->path, pending, /*runqueue*/FALSE);
 8378         }
 8380         if (pending == AHD_TMODE_EVENT_BUFFER_SIZE) {
xpt_print_path(lstate->path);
printf("immediate event %x:%x lost\n",
lstate->event_buffer[lstate->event_r_idx].event_type,
lstate->event_buffer[lstate->event_r_idx].event_arg);
lstate->event_r_idx++;
 8386                 if (lstate->event_r_idx == AHD_TMODE_EVENT_BUFFER_SIZE)
lstate->event_r_idx = 0;
xpt_release_devq(lstate->path, /*count*/1, /*runqueue*/FALSE);
 8389         }
event = &lstate->event_buffer[lstate->event_w_idx];
event->initiator_id = initiator_id;
event->event_type = event_type;
event->event_arg = event_arg;
lstate->event_w_idx++;
 8396         if (lstate->event_w_idx == AHD_TMODE_EVENT_BUFFER_SIZE)
lstate->event_w_idx = 0;
 8398 }
 8400 /*
 8401  * Send any target mode events queued up waiting
 8402  * for immediate notify resources.
 8403  */
 8404 void
ahd_send_lstate_events(struct ahd_softc *ahd, struct ahd_tmode_lstate *lstate)
 8406 {
 8407         struct ccb_hdr *ccbh;
 8408         struct ccb_immed_notify *inot;
 8410         while (lstate->event_r_idx != lstate->event_w_idx
 8411             && (ccbh = SLIST_FIRST(&lstate->immed_notifies)) != NULL) {
 8412                 struct ahd_tmode_event *event;
event = &lstate->event_buffer[lstate->event_r_idx];
SLIST_REMOVE_HEAD(&lstate->immed_notifies, sim_links.sle);
inot = (struct ccb_immed_notify *)ccbh;
 8417                 switch (event->event_type) {
 8418                 case EVENT_TYPE_BUS_RESET:
ccbh->status = CAM_SCSI_BUS_RESET|CAM_DEV_QFRZN;
 8420                         break;
 8421                 default:
ccbh->status = CAM_MESSAGE_RECV|CAM_DEV_QFRZN;
inot->message_args[0] = event->event_type;
inot->message_args[1] = event->event_arg;
 8425                         break;
 8426                 }
inot->initiator_id = event->initiator_id;
inot->sense_len = 0;
xpt_done((union ccb *)inot);
lstate->event_r_idx++;
 8431                 if (lstate->event_r_idx == AHD_TMODE_EVENT_BUFFER_SIZE)
lstate->event_r_idx = 0;
 8433         }
 8434 }
 8435 #endif
 8437 /******************** Sequencer Program Patching/Download *********************/
 8439 #ifdef AHD_DUMP_SEQ
 8440 void
ahd_dumpseq(struct ahd_softc* ahd)
 8442 {
 8443         int i;
 8444         int max_prog;
max_prog = 2048;
ahd_outb(ahd, SEQCTL0, PERRORDIS|FAILDIS|FASTMODE|LOADRAM);
ahd_outw(ahd, PRGMCNT, 0);
 8450         for (i = 0; i < max_prog; i++) {
uint8_t ins_bytes[4];
ahd_insb(ahd, SEQRAM, ins_bytes, 4);
printf("0x%08x\n", ins_bytes[0] << 24
 8455                                  | ins_bytes[1] << 16
 8456                                  | ins_bytes[2] << 8
 8457                                  | ins_bytes[3]);
 8458         }
 8459 }
 8460 #endif
 8462 void
ahd_loadseq(struct ahd_softc *ahd)
 8464 {
 8465         struct  cs cs_table[NUM_CRITICAL_SECTIONS];
u_int   begin_set[NUM_CRITICAL_SECTIONS];
u_int   end_set[NUM_CRITICAL_SECTIONS];
 8468         const struct    patch *cur_patch;
u_int   cs_count;
u_int   cur_cs;
u_int   i;
 8472         int     downloaded;
u_int   skip_addr;
u_int   sg_prefetch_cnt;
u_int   sg_prefetch_cnt_limit;
u_int   sg_prefetch_align;
u_int   sg_size;
u_int   cacheline_mask;
uint8_t download_consts[DOWNLOAD_CONST_COUNT];
 8481         if (bootverbose)
printf("%s: Downloading Sequencer Program...",
ahd_name(ahd));
 8485 #if DOWNLOAD_CONST_COUNT != 8
 8486 #error "Download Const Mismatch"
 8487 #endif
 8488         /*
 8489          * Start out with 0 critical sections
 8490          * that apply to this firmware load.
 8491          */
cs_count = 0;
cur_cs = 0;
memset(begin_set, 0, sizeof(begin_set));
memset(end_set, 0, sizeof(end_set));
 8497         /*
 8498          * Setup downloadable constant table.
 8499          * 
 8500          * The computation for the S/G prefetch variables is
 8501          * a bit complicated.  We would like to always fetch
 8502          * in terms of cachelined sized increments.  However,
 8503          * if the cacheline is not an even multiple of the
 8504          * SG element size or is larger than our SG RAM, using
 8505          * just the cache size might leave us with only a portion
 8506          * of an SG element at the tail of a prefetch.  If the
 8507          * cacheline is larger than our S/G prefetch buffer less
 8508          * the size of an SG element, we may round down to a cacheline
 8509          * that doesn't contain any or all of the S/G of interest
 8510          * within the bounds of our S/G ram.  Provide variables to
 8511          * the sequencer that will allow it to handle these edge
 8512          * cases.
 8513          */
 8514         /* Start by aligning to the nearest cacheline. */
sg_prefetch_align = ahd->pci_cachesize;
 8516         if (sg_prefetch_align == 0)
sg_prefetch_align = 8;
 8518         /* Round down to the nearest power of 2. */
 8519         while (powerof2(sg_prefetch_align) == 0)
sg_prefetch_align--;
cacheline_mask = sg_prefetch_align - 1;
 8524         /*
 8525          * If the cacheline boundary is greater than half our prefetch RAM
 8526          * we risk not being able to fetch even a single complete S/G
 8527          * segment if we align to that boundary.
 8528          */
 8529         if (sg_prefetch_align > CCSGADDR_MAX/2)
sg_prefetch_align = CCSGADDR_MAX/2;
 8531         /* Start by fetching a single cacheline. */
sg_prefetch_cnt = sg_prefetch_align;
 8533         /*
 8534          * Increment the prefetch count by cachelines until
 8535          * at least one S/G element will fit.
 8536          */
sg_size = sizeof(struct ahd_dma_seg);
 8538         if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0)
sg_size = sizeof(struct ahd_dma64_seg);
 8540         while (sg_prefetch_cnt < sg_size)
sg_prefetch_cnt += sg_prefetch_align;
 8542         /*
 8543          * If the cacheline is not an even multiple of
 8544          * the S/G size, we may only get a partial S/G when
 8545          * we align. Add a cacheline if this is the case.
 8546          */
 8547         if ((sg_prefetch_align % sg_size) != 0
 8548          && (sg_prefetch_cnt < CCSGADDR_MAX))
sg_prefetch_cnt += sg_prefetch_align;
 8550         /*
 8551          * Lastly, compute a value that the sequencer can use
 8552          * to determine if the remainder of the CCSGRAM buffer
 8553          * has a full S/G element in it.
 8554          */
sg_prefetch_cnt_limit = -(sg_prefetch_cnt - sg_size + 1);
download_consts[SG_PREFETCH_CNT] = sg_prefetch_cnt;
download_consts[SG_PREFETCH_CNT_LIMIT] = sg_prefetch_cnt_limit;
download_consts[SG_PREFETCH_ALIGN_MASK] = ~(sg_prefetch_align - 1);
download_consts[SG_PREFETCH_ADDR_MASK] = (sg_prefetch_align - 1);
download_consts[SG_SIZEOF] = sg_size;
download_consts[PKT_OVERRUN_BUFOFFSET] =
 8562                 (ahd->overrun_buf - (uint8_t *)ahd->qoutfifo) / 256;
download_consts[SCB_TRANSFER_SIZE] = SCB_TRANSFER_SIZE_1BYTE_LUN;
download_consts[CACHELINE_MASK] = cacheline_mask;
cur_patch = patches;
downloaded = 0;
skip_addr = 0;
ahd_outb(ahd, SEQCTL0, PERRORDIS|FAILDIS|FASTMODE|LOADRAM);
ahd_outw(ahd, PRGMCNT, 0);
 8571         for (i = 0; i < sizeof(seqprog)/4; i++) {
 8572                 if (ahd_check_patch(ahd, &cur_patch, i, &skip_addr) == 0) {
 8573                         /*
 8574                          * Don't download this instruction as it
 8575                          * is in a patch that was removed.
 8576                          */
 8577                         continue;
 8578                 }
 8579                 /*
 8580                  * Move through the CS table until we find a CS
 8581                  * that might apply to this instruction.
 8582                  */
 8583                 for (; cur_cs < NUM_CRITICAL_SECTIONS; cur_cs++) {
 8584                         if (critical_sections[cur_cs].end <= i) {
 8585                                 if (begin_set[cs_count] == TRUE
 8586                                  && end_set[cs_count] == FALSE) {
cs_table[cs_count].end = downloaded;
end_set[cs_count] = TRUE;
cs_count++;
 8590                                 }
 8591                                 continue;
 8592                         }
 8593                         if (critical_sections[cur_cs].begin <= i
 8594                          && begin_set[cs_count] == FALSE) {
cs_table[cs_count].begin = downloaded;
begin_set[cs_count] = TRUE;
 8597                         }
 8598                         break;
 8599                 }
ahd_download_instr(ahd, i, download_consts);
downloaded++;
 8602         }
ahd->num_critical_sections = cs_count;
 8605         if (cs_count != 0) {
cs_count *= sizeof(struct cs);
ahd->critical_sections = malloc(cs_count, M_DEVBUF, M_NOWAIT);
 8609                 if (ahd->critical_sections == NULL)
panic("ahd_loadseq: Could not malloc");
memcpy(ahd->critical_sections, cs_table, cs_count);
 8612         }
ahd_outb(ahd, SEQCTL0, PERRORDIS|FAILDIS|FASTMODE);
 8615         if (bootverbose) {
printf(" %d instructions downloaded\n", downloaded);
printf("%s: Features 0x%x, Bugs 0x%x, Flags 0x%x\n",
ahd_name(ahd), ahd->features, ahd->bugs, ahd->flags);
 8619         }
 8620 }
 8622 int
ahd_check_patch(struct ahd_softc *ahd, const struct patch **start_patch,
u_int start_instr, u_int *skip_addr)
 8625 {
 8626         const struct    patch *cur_patch;
 8627         const struct    patch *last_patch;
u_int   num_patches;
num_patches = sizeof(patches)/sizeof(struct patch);
last_patch = &patches[num_patches];
cur_patch = *start_patch;
 8634         while (cur_patch < last_patch && start_instr == cur_patch->begin) {
 8636                 if (cur_patch->patch_func(ahd) == 0) {
 8638                         /* Start rejecting code */
 8639                         *skip_addr = start_instr + cur_patch->skip_instr;
cur_patch += cur_patch->skip_patch;
 8641                 } else {
 8642                         /* Accepted this patch.  Advance to the next
 8643                          * one and wait for our intruction pointer to
 8644                          * hit this point.
 8645                          */
cur_patch++;
 8647                 }
 8648         }
 8650         *start_patch = cur_patch;
 8651         if (start_instr < *skip_addr)
 8652                 /* Still skipping */
 8653                 return (0);
 8655         return (1);
 8656 }
u_int
ahd_resolve_seqaddr(struct ahd_softc *ahd, u_int address)
 8660 {
 8661         const struct patch *cur_patch;
 8662         int address_offset;
u_int skip_addr;
u_int i;
address_offset = 0;
cur_patch = patches;
skip_addr = 0;
 8670         for (i = 0; i < address;) {
ahd_check_patch(ahd, &cur_patch, i, &skip_addr);
 8674                 if (skip_addr > i) {
 8675                         int end_addr;
end_addr = MIN(address, skip_addr);
address_offset += end_addr - i;
i = skip_addr;
 8680                 } else {
i++;
 8682                 }
 8683         }
 8684         return (address - address_offset);
 8685 }
 8687 void
ahd_download_instr(struct ahd_softc *ahd, u_int instrptr, uint8_t *dconsts)
 8689 {
 8690         union   ins_formats instr;
 8691         struct  ins_format1 *fmt1_ins;
 8692         struct  ins_format3 *fmt3_ins;
u_int   opcode;
 8695         /*
 8696          * The firmware is always compiled into a little endian format.
 8697          */
instr.integer = aic_le32toh(*(uint32_t*)&seqprog[instrptr * 4]);
fmt1_ins = &instr.format1;
fmt3_ins = NULL;
 8703         /* Pull the opcode */
opcode = instr.format1.opcode;
 8705         switch (opcode) {
 8706         case AIC_OP_JMP:
 8707         case AIC_OP_JC:
 8708         case AIC_OP_JNC:
 8709         case AIC_OP_CALL:
 8710         case AIC_OP_JNE:
 8711         case AIC_OP_JNZ:
 8712         case AIC_OP_JE:
 8713         case AIC_OP_JZ:
 8714         {
fmt3_ins = &instr.format3;
fmt3_ins->address = ahd_resolve_seqaddr(ahd, fmt3_ins->address);
 8717                 /* FALLTHROUGH */
 8718         }
 8719         case AIC_OP_OR:
 8720         case AIC_OP_AND:
 8721         case AIC_OP_XOR:
 8722         case AIC_OP_ADD:
 8723         case AIC_OP_ADC:
 8724         case AIC_OP_BMOV:
 8725                 if (fmt1_ins->parity != 0) {
fmt1_ins->immediate = dconsts[fmt1_ins->immediate];
 8727                 }
fmt1_ins->parity = 0;
 8729                 /* FALLTHROUGH */
 8730         case AIC_OP_ROL:
 8731         {
 8732                 int i, count;
 8734                 /* Calculate odd parity for the instruction */
 8735                 for (i = 0, count = 0; i < 31; i++) {
uint32_t mask;
mask = 0x01 << i;
 8739                         if ((instr.integer & mask) != 0)
count++;
 8741                 }
 8742                 if ((count & 0x01) == 0)
instr.format1.parity = 1;
 8745                 /* The sequencer is a little endian cpu */
instr.integer = aic_htole32(instr.integer);
ahd_outsb(ahd, SEQRAM, instr.bytes, 4);
 8748                 break;
 8749         }
 8750         default:
panic("Unknown opcode encountered in seq program");
 8752                 break;
 8753         }
 8754 }
 8756 int
ahd_probe_stack_size(struct ahd_softc *ahd)
 8758 {
 8759         int last_probe;
last_probe = 0;
 8762         while (1) {
 8763                 int i;
 8765                 /*
 8766                  * We avoid using 0 as a pattern to avoid
 8767                  * confusion if the stack implementation
 8768                  * "back-fills" with zeros when "poping'
 8769                  * entries.
 8770                  */
 8771                 for (i = 1; i <= last_probe+1; i++) {
ahd_outb(ahd, STACK, i & 0xFF);
ahd_outb(ahd, STACK, (i >> 8) & 0xFF);
 8774                 }
 8776                 /* Verify */
 8777                 for (i = last_probe+1; i > 0; i--) {
u_int stack_entry;
stack_entry = ahd_inb(ahd, STACK)
 8781                                     |(ahd_inb(ahd, STACK) << 8);
 8782                         if (stack_entry != i)
 8783                                 goto sized;
 8784                 }
last_probe++;
 8786         }
sized:
 8788         return (last_probe);
 8789 }
 8791 void
ahd_dump_all_cards_state(void)
 8793 {
 8794         struct ahd_softc *list_ahd;
TAILQ_FOREACH(list_ahd, &ahd_tailq, links) {
ahd_dump_card_state(list_ahd);
 8798         }
 8799 }
 8801 int
ahd_print_register(ahd_reg_parse_entry_t *table, u_int num_entries,
 8803                    const char *name, u_int address, u_int value,
u_int *cur_column, u_int wrap_point)
 8805 {
u_int   printed_mask;
 8807         int entry, printed;
 8809         if (cur_column != NULL && *cur_column >= wrap_point) {
printf("\n");
 8811                 *cur_column = 0;
 8812         }
printed = printf("%s[0x%x]", name, value);
 8814         if (table == NULL) {
printed += printf(" ");
 8816                 if (cur_column != NULL)
 8817                         *cur_column += printed;
 8818                 return (printed);
 8819         }
printed_mask = 0;
 8822         while (printed_mask != 0xFF) {
 8823                 for (entry = 0; entry < num_entries; entry++) {
 8824                         if (((value & table[entry].mask) != table[entry].value)
 8825                             || ((printed_mask & table[entry].mask) ==
table[entry].mask))
 8827                                 continue;
printed += printf("%s%s",
printed_mask == 0 ? ":(" : "|",
table[entry].name);
printed_mask |= table[entry].mask;
 8834                         break;
 8835                 }
 8836                 if (entry >= num_entries)
 8837                         break;
 8838         }
printed += printf("%s", printed_mask == 0 ? " " : ") ");
 8841         if (cur_column != NULL)
 8842                 *cur_column += printed;
 8844         return (printed);
 8845 }
 8847 void
ahd_dump_card_state(struct ahd_softc *ahd)
 8849 {
 8850         struct scb      *scb;
ahd_mode_state   saved_modes;
u_int            dffstat;
 8853         int              paused;
u_int            scb_index;
u_int            saved_scb_index;
u_int            cur_col;
 8857         int              i;
 8859         if (ahd_is_paused(ahd)) {
paused = 1;
 8861         } else {
paused = 0;
ahd_pause(ahd);
 8864         }
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
printf("================== Dump Card State Begins =================\n"
 8868                "%s: Dumping Card State at program address 0x%x Mode 0x%x\n",
ahd_name(ahd), 
ahd_inw(ahd, CURADDR),
ahd_build_mode_state(ahd, ahd->saved_src_mode,
ahd->saved_dst_mode));
 8873         if (paused)
printf("Card was paused\n");
 8876         if (ahd_check_cmdcmpltqueues(ahd))
printf("Completions are pending\n");
 8879         /*
 8880          * Mode independent registers.
 8881          */
cur_col = 0;
ahd_intstat_print(ahd_inb(ahd, INTSTAT), &cur_col, 50);
ahd_seloid_print(ahd_inb(ahd, SELOID), &cur_col, 50);
ahd_selid_print(ahd_inb(ahd, SELID), &cur_col, 50);
ahd_hs_mailbox_print(ahd_inb(ahd, LOCAL_HS_MAILBOX), &cur_col, 50);
ahd_intctl_print(ahd_inb(ahd, INTCTL), &cur_col, 50);
ahd_seqintstat_print(ahd_inb(ahd, SEQINTSTAT), &cur_col, 50);
ahd_saved_mode_print(ahd_inb(ahd, SAVED_MODE), &cur_col, 50);
ahd_dffstat_print(ahd_inb(ahd, DFFSTAT), &cur_col, 50);
ahd_scsisigi_print(ahd_inb(ahd, SCSISIGI), &cur_col, 50);
ahd_scsiphase_print(ahd_inb(ahd, SCSIPHASE), &cur_col, 50);
ahd_scsibus_print(ahd_inb(ahd, SCSIBUS), &cur_col, 50);
ahd_lastphase_print(ahd_inb(ahd, LASTPHASE), &cur_col, 50);
ahd_scsiseq0_print(ahd_inb(ahd, SCSISEQ0), &cur_col, 50);
ahd_scsiseq1_print(ahd_inb(ahd, SCSISEQ1), &cur_col, 50);
ahd_seqctl0_print(ahd_inb(ahd, SEQCTL0), &cur_col, 50);
ahd_seqintctl_print(ahd_inb(ahd, SEQINTCTL), &cur_col, 50);
ahd_seq_flags_print(ahd_inb(ahd, SEQ_FLAGS), &cur_col, 50);
ahd_seq_flags2_print(ahd_inb(ahd, SEQ_FLAGS2), &cur_col, 50);
ahd_qfreeze_count_print(ahd_inw(ahd, QFREEZE_COUNT), &cur_col, 50);
ahd_kernel_qfreeze_count_print(ahd_inw(ahd, KERNEL_QFREEZE_COUNT),
 8903                                        &cur_col, 50);
ahd_mk_message_scb_print(ahd_inw(ahd, MK_MESSAGE_SCB), &cur_col, 50);
ahd_mk_message_scsiid_print(ahd_inb(ahd, MK_MESSAGE_SCSIID),
 8906                                     &cur_col, 50);
ahd_sstat0_print(ahd_inb(ahd, SSTAT0), &cur_col, 50);
ahd_sstat1_print(ahd_inb(ahd, SSTAT1), &cur_col, 50);
ahd_sstat2_print(ahd_inb(ahd, SSTAT2), &cur_col, 50);
ahd_sstat3_print(ahd_inb(ahd, SSTAT3), &cur_col, 50);
ahd_perrdiag_print(ahd_inb(ahd, PERRDIAG), &cur_col, 50);
ahd_simode1_print(ahd_inb(ahd, SIMODE1), &cur_col, 50);
ahd_lqistat0_print(ahd_inb(ahd, LQISTAT0), &cur_col, 50);
ahd_lqistat1_print(ahd_inb(ahd, LQISTAT1), &cur_col, 50);
ahd_lqistat2_print(ahd_inb(ahd, LQISTAT2), &cur_col, 50);
ahd_lqostat0_print(ahd_inb(ahd, LQOSTAT0), &cur_col, 50);
ahd_lqostat1_print(ahd_inb(ahd, LQOSTAT1), &cur_col, 50);
ahd_lqostat2_print(ahd_inb(ahd, LQOSTAT2), &cur_col, 50);
printf("\n");
printf("\nSCB Count = %d CMDS_PENDING = %d LASTSCB 0x%x "
 8921                "CURRSCB 0x%x NEXTSCB 0x%x\n",
ahd->scb_data.numscbs, ahd_inw(ahd, CMDS_PENDING),
ahd_inw(ahd, LASTSCB), ahd_inw(ahd, CURRSCB),
ahd_inw(ahd, NEXTSCB));
cur_col = 0;
 8926         /* QINFIFO */
ahd_search_qinfifo(ahd, CAM_TARGET_WILDCARD, ALL_CHANNELS,
CAM_LUN_WILDCARD, SCB_LIST_NULL,
ROLE_UNKNOWN, /*status*/0, SEARCH_PRINT);
saved_scb_index = ahd_get_scbptr(ahd);
printf("Pending list:");
i = 0;
LIST_FOREACH(scb, &ahd->pending_scbs, pending_links) {
 8934                 if (i++ > AHD_SCB_MAX)
 8935                         break;
cur_col = printf("\n%3d FIFO_USE[0x%x] ", SCB_GET_TAG(scb),
ahd_inb_scbram(ahd, SCB_FIFO_USE_COUNT));
ahd_set_scbptr(ahd, SCB_GET_TAG(scb));
ahd_scb_control_print(ahd_inb_scbram(ahd, SCB_CONTROL),
 8940                                       &cur_col, 60);
ahd_scb_scsiid_print(ahd_inb_scbram(ahd, SCB_SCSIID),
 8942                                      &cur_col, 60);
 8943         }
printf("\nTotal %d\n", i);
printf("Kernel Free SCB list: ");
i = 0;
TAILQ_FOREACH(scb, &ahd->scb_data.free_scbs, links.tqe) {
 8949                 struct scb *list_scb;
list_scb = scb;
 8952                 do {
printf("%d ", SCB_GET_TAG(list_scb));
list_scb = LIST_NEXT(list_scb, collision_links);
 8955                 } while (list_scb && i++ < AHD_SCB_MAX);
 8956         }
LIST_FOREACH(scb, &ahd->scb_data.any_dev_free_scb_list, links.le) {
 8959                 if (i++ > AHD_SCB_MAX)
 8960                         break;
printf("%d ", SCB_GET_TAG(scb));
 8962         }
printf("\n");
printf("Sequencer Complete DMA-inprog list: ");
scb_index = ahd_inw(ahd, COMPLETE_SCB_DMAINPROG_HEAD);
i = 0;
 8968         while (!SCBID_IS_NULL(scb_index) && i++ < AHD_SCB_MAX) {
ahd_set_scbptr(ahd, scb_index);
printf("%d ", scb_index);
scb_index = ahd_inw_scbram(ahd, SCB_NEXT_COMPLETE);
 8972         }
printf("\n");
printf("Sequencer Complete list: ");
scb_index = ahd_inw(ahd, COMPLETE_SCB_HEAD);
i = 0;
 8978         while (!SCBID_IS_NULL(scb_index) && i++ < AHD_SCB_MAX) {
ahd_set_scbptr(ahd, scb_index);
printf("%d ", scb_index);
scb_index = ahd_inw_scbram(ahd, SCB_NEXT_COMPLETE);
 8982         }
printf("\n");
printf("Sequencer DMA-Up and Complete list: ");
scb_index = ahd_inw(ahd, COMPLETE_DMA_SCB_HEAD);
i = 0;
 8989         while (!SCBID_IS_NULL(scb_index) && i++ < AHD_SCB_MAX) {
ahd_set_scbptr(ahd, scb_index);
printf("%d ", scb_index);
scb_index = ahd_inw_scbram(ahd, SCB_NEXT_COMPLETE);
 8993         }
printf("\n");
printf("Sequencer On QFreeze and Complete list: ");
scb_index = ahd_inw(ahd, COMPLETE_ON_QFREEZE_HEAD);
i = 0;
 8998         while (!SCBID_IS_NULL(scb_index) && i++ < AHD_SCB_MAX) {
ahd_set_scbptr(ahd, scb_index);
printf("%d ", scb_index);
scb_index = ahd_inw_scbram(ahd, SCB_NEXT_COMPLETE);
 9002         }
printf("\n");
ahd_set_scbptr(ahd, saved_scb_index);
dffstat = ahd_inb(ahd, DFFSTAT);
 9006         for (i = 0; i < 2; i++) {
 9007 #ifdef AHD_DEBUG
 9008                 struct scb *fifo_scb;
 9009 #endif
u_int       fifo_scbptr;
ahd_set_modes(ahd, AHD_MODE_DFF0 + i, AHD_MODE_DFF0 + i);
fifo_scbptr = ahd_get_scbptr(ahd);
printf("\n\n%s: FIFO%d %s, LONGJMP == 0x%x, SCB 0x%x\n",
ahd_name(ahd), i,
 9016                        (dffstat & (FIFO0FREE << i)) ? "Free" : "Active",
ahd_inw(ahd, LONGJMP_ADDR), fifo_scbptr);
cur_col = 0;
ahd_seqimode_print(ahd_inb(ahd, SEQIMODE), &cur_col, 50);
ahd_seqintsrc_print(ahd_inb(ahd, SEQINTSRC), &cur_col, 50);
ahd_dfcntrl_print(ahd_inb(ahd, DFCNTRL), &cur_col, 50);
ahd_dfstatus_print(ahd_inb(ahd, DFSTATUS), &cur_col, 50);
ahd_sg_cache_shadow_print(ahd_inb(ahd, SG_CACHE_SHADOW),
 9024                                           &cur_col, 50);
ahd_sg_state_print(ahd_inb(ahd, SG_STATE), &cur_col, 50);
ahd_dffsxfrctl_print(ahd_inb(ahd, DFFSXFRCTL), &cur_col, 50);
ahd_soffcnt_print(ahd_inb(ahd, SOFFCNT), &cur_col, 50);
ahd_mdffstat_print(ahd_inb(ahd, MDFFSTAT), &cur_col, 50);
 9029                 if (cur_col > 50) {
printf("\n");
cur_col = 0;
 9032                 }
cur_col += printf("SHADDR = 0x%x%x, SHCNT = 0x%x ",
ahd_inl(ahd, SHADDR+4),
ahd_inl(ahd, SHADDR),
 9036                                   (ahd_inb(ahd, SHCNT)
 9037                                 | (ahd_inb(ahd, SHCNT + 1) << 8)
 9038                                 | (ahd_inb(ahd, SHCNT + 2) << 16)));
 9039                 if (cur_col > 50) {
printf("\n");
cur_col = 0;
 9042                 }
cur_col += printf("HADDR = 0x%x%x, HCNT = 0x%x ",
ahd_inl(ahd, HADDR+4),
ahd_inl(ahd, HADDR),
 9046                                   (ahd_inb(ahd, HCNT)
 9047                                 | (ahd_inb(ahd, HCNT + 1) << 8)
 9048                                 | (ahd_inb(ahd, HCNT + 2) << 16)));
ahd_ccsgctl_print(ahd_inb(ahd, CCSGCTL), &cur_col, 50);
 9050 #ifdef AHD_DEBUG
 9051                 if ((ahd_debug & AHD_SHOW_SG) != 0) {
fifo_scb = ahd_lookup_scb(ahd, fifo_scbptr);
 9053                         if (fifo_scb != NULL)
ahd_dump_sglist(fifo_scb);
 9055                 }
 9056 #endif
 9057         }
printf("\nLQIN: ");
 9059         for (i = 0; i < 20; i++)
printf("0x%x ", ahd_inb(ahd, LQIN + i));
printf("\n");
ahd_set_modes(ahd, AHD_MODE_CFG, AHD_MODE_CFG);
printf("%s: LQISTATE = 0x%x, LQOSTATE = 0x%x, OPTIONMODE = 0x%x\n",
ahd_name(ahd), ahd_inb(ahd, LQISTATE), ahd_inb(ahd, LQOSTATE),
ahd_inb(ahd, OPTIONMODE));
printf("%s: OS_SPACE_CNT = 0x%x MAXCMDCNT = 0x%x\n",
ahd_name(ahd), ahd_inb(ahd, OS_SPACE_CNT),
ahd_inb(ahd, MAXCMDCNT));
printf("%s: SAVED_SCSIID = 0x%x SAVED_LUN = 0x%x\n",
ahd_name(ahd), ahd_inb(ahd, SAVED_SCSIID),
ahd_inb(ahd, SAVED_LUN));
ahd_simode0_print(ahd_inb(ahd, SIMODE0), &cur_col, 50);
printf("\n");
ahd_set_modes(ahd, AHD_MODE_CCHAN, AHD_MODE_CCHAN);
cur_col = 0;
ahd_ccscbctl_print(ahd_inb(ahd, CCSCBCTL), &cur_col, 50);
printf("\n");
ahd_set_modes(ahd, ahd->saved_src_mode, ahd->saved_dst_mode);
printf("%s: REG0 == 0x%x, SINDEX = 0x%x, DINDEX = 0x%x\n",
ahd_name(ahd), ahd_inw(ahd, REG0), ahd_inw(ahd, SINDEX),
ahd_inw(ahd, DINDEX));
printf("%s: SCBPTR == 0x%x, SCB_NEXT == 0x%x, SCB_NEXT2 == 0x%x\n",
ahd_name(ahd), ahd_get_scbptr(ahd),
ahd_inw_scbram(ahd, SCB_NEXT),
ahd_inw_scbram(ahd, SCB_NEXT2));
printf("CDB %x %x %x %x %x %x\n",
ahd_inb_scbram(ahd, SCB_CDB_STORE),
ahd_inb_scbram(ahd, SCB_CDB_STORE+1),
ahd_inb_scbram(ahd, SCB_CDB_STORE+2),
ahd_inb_scbram(ahd, SCB_CDB_STORE+3),
ahd_inb_scbram(ahd, SCB_CDB_STORE+4),
ahd_inb_scbram(ahd, SCB_CDB_STORE+5));
printf("STACK:");
 9094         for (i = 0; i < ahd->stack_size; i++) {
ahd->saved_stack[i] =
ahd_inb(ahd, STACK)|(ahd_inb(ahd, STACK) << 8);
printf(" 0x%x", ahd->saved_stack[i]);
 9098         }
 9099         for (i = ahd->stack_size-1; i >= 0; i--) {
ahd_outb(ahd, STACK, ahd->saved_stack[i] & 0xFF);
ahd_outb(ahd, STACK, (ahd->saved_stack[i] >> 8) & 0xFF);
 9102         }
printf("\n================= Dump Card State Ends ==================\n");
ahd_platform_dump_card_state(ahd);
ahd_restore_modes(ahd, saved_modes);
 9106         if (paused == 0)
ahd_unpause(ahd);
 9108 }
 9110 void
ahd_dump_scbs(struct ahd_softc *ahd)
 9112 {
ahd_mode_state saved_modes;
u_int          saved_scb_index;
 9115         int            i;
saved_modes = ahd_save_modes(ahd);
ahd_set_modes(ahd, AHD_MODE_SCSI, AHD_MODE_SCSI);
saved_scb_index = ahd_get_scbptr(ahd);
 9120         for (i = 0; i < AHD_SCB_MAX; i++) {
ahd_set_scbptr(ahd, i);
printf("%3d", i);
printf("(CTRL 0x%x ID 0x%x N 0x%x N2 0x%x SG 0x%x, RSG 0x%x)\n",
ahd_inb_scbram(ahd, SCB_CONTROL),
ahd_inb_scbram(ahd, SCB_SCSIID),
ahd_inw_scbram(ahd, SCB_NEXT),
ahd_inw_scbram(ahd, SCB_NEXT2),
ahd_inl_scbram(ahd, SCB_SGPTR),
ahd_inl_scbram(ahd, SCB_RESIDUAL_SGPTR));
 9130         }
printf("\n");
ahd_set_scbptr(ahd, saved_scb_index);
ahd_restore_modes(ahd, saved_modes);
 9134 }
 9137 /*************************** Timeout Handling *********************************/
 9138 void
ahd_timeout(void *arg)
 9140 {
 9141         struct scb *scb, *list_scb;
 9142         struct ahd_softc *ahd;
 9143         char channel;
 9144         long s;
 9145         int found;
 9146 #ifdef AHD_DEBUG
 9147         int was_paused;
 9148 #endif
scb = (struct scb *)arg;
ahd = scb->ahd_softc;
ahd_lock(ahd, &s);
 9155 #ifdef AHD_DEBUG
was_paused = ahd_is_paused(ahd);
printf("%s: SCB %d timed out - Card was %spaused\n", ahd_name(ahd),
SCB_GET_TAG(scb), was_paused ? "" : "not ");
ahd_dump_card_state(ahd);
 9160 #endif
ahd_pause(ahd);
 9164         if (scb->flags & SCB_ACTIVE) {
aic_set_transaction_status(scb, CAM_CMD_TIMEOUT);
 9166                 /*
 9167                  * Go through all of our pending SCBs and remove any scheduled
 9168                  * timeouts for them. They're about to be aborted so no need
 9169                  * for them to timeout.
 9170                  */
LIST_FOREACH(list_scb, &ahd->pending_scbs, pending_links) {
 9172                         if (list_scb->xs)
timeout_del(&list_scb->xs->stimeout);
 9174                 }
channel = SCB_GET_CHANNEL(ahd, scb);
found = ahd_reset_channel(ahd, channel, /*Initiate Reset*/TRUE);
 9177 #ifdef AHD_DEBUG
printf("%s: Issued Channel %c Bus Reset. %d SCBs aborted\n",
ahd_name(ahd), channel, found);
 9180 #endif
 9181         }
ahd_unpause(ahd);
ahd_unlock(ahd, &s);
 9185 }
 9187 /**************************** Flexport Logic **********************************/
 9188 /*
 9189  * Read count 16bit words from 16bit word address start_addr from the
 9190  * SEEPROM attached to the controller, into buf, using the controller's
 9191  * SEEPROM reading state machine.  Optionally treat the data as a byte
 9192  * stream in terms of byte order.
 9193  */
 9194 int
ahd_read_seeprom(struct ahd_softc *ahd, uint16_t *buf,
u_int start_addr, u_int count, int bytestream)
 9197 {
u_int cur_addr;
u_int end_addr;
 9200         int   error;
 9202         /*
 9203          * If we never make it through the loop even once,
 9204          * we were passed invalid arguments.
 9205          */
error = EINVAL;
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
end_addr = start_addr + count;
 9209         for (cur_addr = start_addr; cur_addr < end_addr; cur_addr++) {
ahd_outb(ahd, SEEADR, cur_addr);
ahd_outb(ahd, SEECTL, SEEOP_READ | SEESTART);
error = ahd_wait_seeprom(ahd);
 9215                 if (error) {
printf("%s: ahd_wait_seeprom timed out\n", ahd_name(ahd));
 9217                         break;
 9218                 }
 9219                 if (bytestream != 0) {
uint8_t *bytestream_ptr;
bytestream_ptr = (uint8_t *)buf;
 9223                         *bytestream_ptr++ = ahd_inb(ahd, SEEDAT);
 9224                         *bytestream_ptr = ahd_inb(ahd, SEEDAT+1);
 9225                 } else {
 9226                         /*
 9227                          * ahd_inw() already handles machine byte order.
 9228                          */
 9229                         *buf = ahd_inw(ahd, SEEDAT);
 9230                 }
buf++;
 9232         }
 9233         return (error);
 9234 }
 9236 /*
 9237  * Write count 16bit words from buf, into SEEPROM attache to the
 9238  * controller starting at 16bit word address start_addr, using the
 9239  * controller's SEEPROM writing state machine.
 9240  */
 9241 int
ahd_write_seeprom(struct ahd_softc *ahd, uint16_t *buf,
u_int start_addr, u_int count)
 9244 {
u_int cur_addr;
u_int end_addr;
 9247         int   error;
 9248         int   retval;
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
error = ENOENT;
 9253         /* Place the chip into write-enable mode */
ahd_outb(ahd, SEEADR, SEEOP_EWEN_ADDR);
ahd_outb(ahd, SEECTL, SEEOP_EWEN | SEESTART);
error = ahd_wait_seeprom(ahd);
 9257         if (error)
 9258                 return (error);
 9260         /*
 9261          * Write the data.  If we don't get throught the loop at
 9262          * least once, the arguments were invalid.
 9263          */
retval = EINVAL;
end_addr = start_addr + count;
 9266         for (cur_addr = start_addr; cur_addr < end_addr; cur_addr++) {
ahd_outw(ahd, SEEDAT, *buf++);
ahd_outb(ahd, SEEADR, cur_addr);
ahd_outb(ahd, SEECTL, SEEOP_WRITE | SEESTART);
retval = ahd_wait_seeprom(ahd);
 9272                 if (retval)
 9273                         break;
 9274         }
 9276         /*
 9277          * Disable writes.
 9278          */
ahd_outb(ahd, SEEADR, SEEOP_EWDS_ADDR);
ahd_outb(ahd, SEECTL, SEEOP_EWDS | SEESTART);
error = ahd_wait_seeprom(ahd);
 9282         if (error)
 9283                 return (error);
 9284         return (retval);
 9285 }
 9287 /*
 9288  * Wait ~100us for the serial eeprom to satisfy our request.
 9289  */
 9290 int
ahd_wait_seeprom(struct ahd_softc *ahd)
 9292 {
 9293         int cnt;
cnt = 5000;
 9296         while ((ahd_inb(ahd, SEESTAT) & (SEEARBACK|SEEBUSY)) != 0 && --cnt)
aic_delay(5);
 9299         if (cnt == 0)
 9300                 return (ETIMEDOUT);
 9301         return (0);
 9302 }
 9304 /*
 9305  * Validate the two checksums in the per_channel
 9306  * vital product data struct.
 9307  */
 9308 int
ahd_verify_vpd_cksum(struct vpd_config *vpd)
 9310 {
 9311         int i;
 9312         int maxaddr;
uint32_t checksum;
uint8_t *vpdarray;
vpdarray = (uint8_t *)vpd;
maxaddr = offsetof(struct vpd_config, vpd_checksum);
checksum = 0;
 9319         for (i = offsetof(struct vpd_config, resource_type); i < maxaddr; i++)
checksum = checksum + vpdarray[i];
 9321         if (checksum == 0
 9322          || (-checksum & 0xFF) != vpd->vpd_checksum)
 9323                 return (0);
checksum = 0;
maxaddr = offsetof(struct vpd_config, checksum);
 9327         for (i = offsetof(struct vpd_config, default_target_flags);
i < maxaddr; i++)
checksum = checksum + vpdarray[i];
 9330         if (checksum == 0
 9331          || (-checksum & 0xFF) != vpd->checksum)
 9332                 return (0);
 9333         return (1);
 9334 }
 9336 int
ahd_verify_cksum(struct seeprom_config *sc)
 9338 {
 9339         int i;
 9340         int maxaddr;
uint32_t checksum;
uint16_t *scarray;
maxaddr = (sizeof(*sc)/2) - 1;
checksum = 0;
scarray = (uint16_t *)sc;
 9348         for (i = 0; i < maxaddr; i++)
checksum = checksum + scarray[i];
 9350         if (checksum == 0
 9351          || (checksum & 0xFFFF) != sc->checksum) {
 9352                 return (0);
 9353         } else {
 9354                 return (1);
 9355         }
 9356 }
 9358 int
ahd_acquire_seeprom(struct ahd_softc *ahd)
 9360 {
 9361         /*
 9362          * We should be able to determine the SEEPROM type
 9363          * from the flexport logic, but unfortunately not
 9364          * all implementations have this logic and there is
 9365          * no programatic method for determining if the logic
 9366          * is present.
 9367          */
 9368         return (1);
 9369 #if 0
uint8_t seetype;
 9371         int     error;
error = ahd_read_flexport(ahd, FLXADDR_ROMSTAT_CURSENSECTL, &seetype);
 9374         if (error != 0
 9375          || ((seetype & FLX_ROMSTAT_SEECFG) == FLX_ROMSTAT_SEE_NONE))
 9376                 return (0);
 9377         return (1);
 9378 #endif
 9379 }
 9381 void
ahd_release_seeprom(struct ahd_softc *ahd)
 9383 {
 9384         /* Currently a no-op */
 9385 }
 9387 int
ahd_write_flexport(struct ahd_softc *ahd, u_int addr, u_int value)
 9389 {
 9390         int error;
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
 9393         if (addr > 7)
panic("ahd_write_flexport: address out of range");
ahd_outb(ahd, BRDCTL, BRDEN|(addr << 3));
error = ahd_wait_flexport(ahd);
 9397         if (error != 0)
 9398                 return (error);
ahd_outb(ahd, BRDDAT, value);
ahd_flush_device_writes(ahd);
ahd_outb(ahd, BRDCTL, BRDSTB|BRDEN|(addr << 3));
ahd_flush_device_writes(ahd);
ahd_outb(ahd, BRDCTL, BRDEN|(addr << 3));
ahd_flush_device_writes(ahd);
ahd_outb(ahd, BRDCTL, 0);
ahd_flush_device_writes(ahd);
 9407         return (0);
 9408 }
 9410 int
ahd_read_flexport(struct ahd_softc *ahd, u_int addr, uint8_t *value)
 9412 {
 9413         int     error;
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
 9416         if (addr > 7)
panic("ahd_read_flexport: address out of range");
ahd_outb(ahd, BRDCTL, BRDRW|BRDEN|(addr << 3));
error = ahd_wait_flexport(ahd);
 9420         if (error != 0)
 9421                 return (error);
 9422         *value = ahd_inb(ahd, BRDDAT);
ahd_outb(ahd, BRDCTL, 0);
ahd_flush_device_writes(ahd);
 9425         return (0);
 9426 }
 9428 /*
 9429  * Wait at most 2 seconds for flexport arbitration to succeed.
 9430  */
 9431 int
ahd_wait_flexport(struct ahd_softc *ahd)
 9433 {
 9434         int cnt;
AHD_ASSERT_MODES(ahd, AHD_MODE_SCSI_MSK, AHD_MODE_SCSI_MSK);
cnt = 1000000 * 2 / 5;
 9438         while ((ahd_inb(ahd, BRDCTL) & FLXARBACK) == 0 && --cnt)
aic_delay(5);
 9441         if (cnt == 0)
 9442                 return (ETIMEDOUT);
 9443         return (0);
 9444 }
 9446 /************************* Target Mode ****************************************/
 9447 #ifdef AHD_TARGET_MODE
cam_status
ahd_find_tmode_devs(struct ahd_softc *ahd, struct cam_sim *sim, union ccb *ccb,
 9450                     struct ahd_tmode_tstate **tstate,
 9451                     struct ahd_tmode_lstate **lstate,
 9452                     int notfound_failure)
 9453 {
 9455         if ((ahd->features & AHD_TARGETMODE) == 0)
 9456                 return (CAM_REQ_INVALID);
 9458         /*
 9459          * Handle the 'black hole' device that sucks up
 9460          * requests to unattached luns on enabled targets.
 9461          */
 9462         if (ccb->ccb_h.target_id == CAM_TARGET_WILDCARD
 9463          && ccb->ccb_h.target_lun == CAM_LUN_WILDCARD) {
 9464                 *tstate = NULL;
 9465                 *lstate = ahd->black_hole;
 9466         } else {
u_int max_id;
max_id = (ahd->features & AHD_WIDE) ? 15 : 7;
 9470                 if (ccb->ccb_h.target_id > max_id)
 9471                         return (CAM_TID_INVALID);
 9473                 if (ccb->ccb_h.target_lun >= AHD_NUM_LUNS)
 9474                         return (CAM_LUN_INVALID);
 9476                 *tstate = ahd->enabled_targets[ccb->ccb_h.target_id];
 9477                 *lstate = NULL;
 9478                 if (*tstate != NULL)
 9479                         *lstate =
 9480                             (*tstate)->enabled_luns[ccb->ccb_h.target_lun];
 9481         }
 9483         if (notfound_failure != 0 && *lstate == NULL)
 9484                 return (CAM_PATH_INVALID);
 9486         return (CAM_REQ_CMP);
 9487 }
 9489 void
ahd_handle_en_lun(struct ahd_softc *ahd, struct cam_sim *sim, union ccb *ccb)
 9491 {
 9492 #if NOT_YET
 9493         struct     ahd_tmode_tstate *tstate;
 9494         struct     ahd_tmode_lstate *lstate;
 9495         struct     ccb_en_lun *cel;
cam_status status;
u_int      target;
u_int      lun;
u_int      target_mask;
 9500         int        s;
 9501         char       channel;
status = ahd_find_tmode_devs(ahd, sim, ccb, &tstate, &lstate,
 9504                                      /*notfound_failure*/FALSE);
 9506         if (status != CAM_REQ_CMP) {
ccb->ccb_h.status = status;
 9508                 return;
 9509         }
 9511         if ((ahd->features & AHD_MULTIROLE) != 0) {
u_int      our_id;
our_id = ahd->our_id;
 9515                 if (ccb->ccb_h.target_id != our_id) {
 9516                         if ((ahd->features & AHD_MULTI_TID) != 0
 9517                          && (ahd->flags & AHD_INITIATORROLE) != 0) {
 9518                                 /*
 9519                                  * Only allow additional targets if
 9520                                  * the initiator role is disabled.
 9521                                  * The hardware cannot handle a re-select-in
 9522                                  * on the initiator id during a re-select-out
 9523                                  * on a different target id.
 9524                                  */
status = CAM_TID_INVALID;
 9526                         } else if ((ahd->flags & AHD_INITIATORROLE) != 0
 9527                                 || ahd->enabled_luns > 0) {
 9528                                 /*
 9529                                  * Only allow our target id to change
 9530                                  * if the initiator role is not configured
 9531                                  * and there are no enabled luns which
 9532                                  * are attached to the currently registered
 9533                                  * scsi id.
 9534                                  */
status = CAM_TID_INVALID;
 9536                         }
 9537                 }
 9538         }
 9540         if (status != CAM_REQ_CMP) {
ccb->ccb_h.status = status;
 9542                 return;
 9543         }
 9545         /*
 9546          * We now have an id that is valid.
 9547          * If we aren't in target mode, switch modes.
 9548          */
 9549         if ((ahd->flags & AHD_TARGETROLE) == 0
 9550          && ccb->ccb_h.target_id != CAM_TARGET_WILDCARD) {
 9551                 int     s;
printf("Configuring Target Mode\n");
ahd_lock(ahd, &s);
 9555                 if (LIST_FIRST(&ahd->pending_scbs) != NULL) {
ccb->ccb_h.status = CAM_BUSY;
ahd_unlock(ahd, &s);
 9558                         return;
 9559                 }
ahd->flags |= AHD_TARGETROLE;
 9561                 if ((ahd->features & AHD_MULTIROLE) == 0)
ahd->flags &= ~AHD_INITIATORROLE;
ahd_pause(ahd);
ahd_loadseq(ahd);
ahd_restart(ahd);
ahd_unlock(ahd, &s);
 9567         }
cel = &ccb->cel;
target = ccb->ccb_h.target_id;
lun = ccb->ccb_h.target_lun;
channel = SCSI_CHANNEL(ahd, sim);
target_mask = 0x01 << target;
 9573         if (channel == 'B')
target_mask <<= 8;
 9576         if (cel->enable != 0) {
u_int scsiseq1;
 9579                 /* Are we already enabled?? */
 9580                 if (lstate != NULL) {
xpt_print_path(ccb->ccb_h.path);
printf("Lun already enabled\n");
ccb->ccb_h.status = CAM_LUN_ALRDY_ENA;
 9584                         return;
 9585                 }
 9587                 if (cel->grp6_len != 0
 9588                  || cel->grp7_len != 0) {
 9589                         /*
 9590                          * Don't (yet?) support vendor
 9591                          * specific commands.
 9592                          */
ccb->ccb_h.status = CAM_REQ_INVALID;
printf("Non-zero Group Codes\n");
 9595                         return;
 9596                 }
 9598                 /*
 9599                  * Seems to be okay.
 9600                  * Setup our data structures.
 9601                  */
 9602                 if (target != CAM_TARGET_WILDCARD && tstate == NULL) {
tstate = ahd_alloc_tstate(ahd, target, channel);
 9604                         if (tstate == NULL) {
xpt_print_path(ccb->ccb_h.path);
printf("Couldn't allocate tstate\n");
ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
 9608                                 return;
 9609                         }
 9610                 }
lstate = malloc(sizeof(*lstate), M_DEVBUF, M_NOWAIT);
 9612                 if (lstate == NULL) {
xpt_print_path(ccb->ccb_h.path);
printf("Couldn't allocate lstate\n");
ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
 9616                         return;
 9617                 }
memset(lstate, 0, sizeof(*lstate));
status = xpt_create_path(&lstate->path, /*periph*/NULL,
xpt_path_path_id(ccb->ccb_h.path),
xpt_path_target_id(ccb->ccb_h.path),
xpt_path_lun_id(ccb->ccb_h.path));
 9623                 if (status != CAM_REQ_CMP) {
free(lstate, M_DEVBUF);
xpt_print_path(ccb->ccb_h.path);
printf("Couldn't allocate path\n");
ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
 9628                         return;
 9629                 }
SLIST_INIT(&lstate->accept_tios);
SLIST_INIT(&lstate->immed_notifies);
ahd_lock(ahd, &s);
ahd_pause(ahd);
 9634                 if (target != CAM_TARGET_WILDCARD) {
tstate->enabled_luns[lun] = lstate;
ahd->enabled_luns++;
 9638                         if ((ahd->features & AHD_MULTI_TID) != 0) {
u_int targid_mask;
targid_mask = ahd_inw(ahd, TARGID);
targid_mask |= target_mask;
ahd_outw(ahd, TARGID, targid_mask);
ahd_update_scsiid(ahd, targid_mask);
 9645                         } else {
u_int our_id;
 9647                                 char  channel;
channel = SCSI_CHANNEL(ahd, sim);
our_id = SCSI_SCSI_ID(ahd, sim);
 9652                                 /*
 9653                                  * This can only happen if selections
 9654                                  * are not enabled
 9655                                  */
 9656                                 if (target != our_id) {
u_int sblkctl;
 9658                                         char  cur_channel;
 9659                                         int   swap;
sblkctl = ahd_inb(ahd, SBLKCTL);
cur_channel = (sblkctl & SELBUSB)
 9663                                                     ? 'B' : 'A';
 9664                                         if ((ahd->features & AHD_TWIN) == 0)
cur_channel = 'A';
swap = cur_channel != channel;
ahd->our_id = target;
 9669                                         if (swap)
ahd_outb(ahd, SBLKCTL,
sblkctl ^ SELBUSB);
ahd_outb(ahd, SCSIID, target);
 9675                                         if (swap)
ahd_outb(ahd, SBLKCTL, sblkctl);
 9677                                 }
 9678                         }
 9679                 } else
ahd->black_hole = lstate;
 9681                 /* Allow select-in operations */
 9682                 if (ahd->black_hole != NULL && ahd->enabled_luns > 0) {
scsiseq1 = ahd_inb(ahd, SCSISEQ_TEMPLATE);
scsiseq1 |= ENSELI;
ahd_outb(ahd, SCSISEQ_TEMPLATE, scsiseq1);
scsiseq1 = ahd_inb(ahd, SCSISEQ1);
scsiseq1 |= ENSELI;
ahd_outb(ahd, SCSISEQ1, scsiseq1);
 9689                 }
ahd_unpause(ahd);
ahd_unlock(ahd, &s);
ccb->ccb_h.status = CAM_REQ_CMP;
xpt_print_path(ccb->ccb_h.path);
printf("Lun now enabled for target mode\n");
 9695         } else {
 9696                 struct scb *scb;
 9697                 int i, empty;
 9699                 if (lstate == NULL) {
ccb->ccb_h.status = CAM_LUN_INVALID;
 9701                         return;
 9702                 }
ahd_lock(ahd, &s);
ccb->ccb_h.status = CAM_REQ_CMP;
LIST_FOREACH(scb, &ahd->pending_scbs, pending_links) {
 9708                         struct ccb_hdr *ccbh;
ccbh = &scb->io_ctx->ccb_h;
 9711                         if (ccbh->func_code == XPT_CONT_TARGET_IO
 9712                          && !xpt_path_comp(ccbh->path, ccb->ccb_h.path)){
printf("CTIO pending\n");
ccb->ccb_h.status = CAM_REQ_INVALID;
ahd_unlock(ahd, &s);
 9716                                 return;
 9717                         }
 9718                 }
 9720                 if (SLIST_FIRST(&lstate->accept_tios) != NULL) {
printf("ATIOs pending\n");
ccb->ccb_h.status = CAM_REQ_INVALID;
 9723                 }
 9725                 if (SLIST_FIRST(&lstate->immed_notifies) != NULL) {
printf("INOTs pending\n");
ccb->ccb_h.status = CAM_REQ_INVALID;
 9728                 }
 9730                 if (ccb->ccb_h.status != CAM_REQ_CMP) {
ahd_unlock(ahd, &s);
 9732                         return;
 9733                 }
xpt_print_path(ccb->ccb_h.path);
printf("Target mode disabled\n");
xpt_free_path(lstate->path);
free(lstate, M_DEVBUF);
ahd_pause(ahd);
 9741                 /* Can we clean up the target too? */
 9742                 if (target != CAM_TARGET_WILDCARD) {
tstate->enabled_luns[lun] = NULL;
ahd->enabled_luns--;
 9745                         for (empty = 1, i = 0; i < 8; i++)
 9746                                 if (tstate->enabled_luns[i] != NULL) {
empty = 0;
 9748                                         break;
 9749                                 }
 9751                         if (empty) {
ahd_free_tstate(ahd, target, channel,
 9753                                                 /*force*/FALSE);
 9754                                 if (ahd->features & AHD_MULTI_TID) {
u_int targid_mask;
targid_mask = ahd_inw(ahd, TARGID);
targid_mask &= ~target_mask;
ahd_outw(ahd, TARGID, targid_mask);
ahd_update_scsiid(ahd, targid_mask);
 9761                                 }
 9762                         }
 9763                 } else {
ahd->black_hole = NULL;
 9767                         /*
 9768                          * We can't allow selections without
 9769                          * our black hole device.
 9770                          */
empty = TRUE;
 9772                 }
 9773                 if (ahd->enabled_luns == 0) {
 9774                         /* Disallow select-in */
u_int scsiseq1;
scsiseq1 = ahd_inb(ahd, SCSISEQ_TEMPLATE);
scsiseq1 &= ~ENSELI;
ahd_outb(ahd, SCSISEQ_TEMPLATE, scsiseq1);
scsiseq1 = ahd_inb(ahd, SCSISEQ1);
scsiseq1 &= ~ENSELI;
ahd_outb(ahd, SCSISEQ1, scsiseq1);
 9784                         if ((ahd->features & AHD_MULTIROLE) == 0) {
printf("Configuring Initiator Mode\n");
ahd->flags &= ~AHD_TARGETROLE;
ahd->flags |= AHD_INITIATORROLE;
ahd_pause(ahd);
ahd_loadseq(ahd);
ahd_restart(ahd);
 9791                                 /*
 9792                                  * Unpaused.  The extra unpause
 9793                                  * that follows is harmless.
 9794                                  */
 9795                         }
 9796                 }
ahd_unpause(ahd);
ahd_unlock(ahd, &s);
 9799         }
 9800 #endif
 9801 }
 9803 void
ahd_update_scsiid(struct ahd_softc *ahd, u_int targid_mask)
 9805 {
 9806 #if NOT_YET
u_int scsiid_mask;
u_int scsiid;
 9810         if ((ahd->features & AHD_MULTI_TID) == 0)
panic("ahd_update_scsiid called on non-multitid unit");
 9813         /*
 9814          * Since we will rely on the TARGID mask
 9815          * for selection enables, ensure that OID
 9816          * in SCSIID is not set to some other ID
 9817          * that we don't want to allow selections on.
 9818          */
 9819         if ((ahd->features & AHD_ULTRA2) != 0)
scsiid = ahd_inb(ahd, SCSIID_ULTRA2);
 9821         else
scsiid = ahd_inb(ahd, SCSIID);
scsiid_mask = 0x1 << (scsiid & OID);
 9824         if ((targid_mask & scsiid_mask) == 0) {
u_int our_id;
 9827                 /* ffs counts from 1 */
our_id = ffs(targid_mask);
 9829                 if (our_id == 0)
our_id = ahd->our_id;
 9831                 else
our_id--;
scsiid &= TID;
scsiid |= our_id;
 9835         }
 9836         if ((ahd->features & AHD_ULTRA2) != 0)
ahd_outb(ahd, SCSIID_ULTRA2, scsiid);
 9838         else
ahd_outb(ahd, SCSIID, scsiid);
 9840 #endif
 9841 }
 9843 void
ahd_run_tqinfifo(struct ahd_softc *ahd, int paused)
 9845 {
 9846         struct target_cmd *cmd;
ahd_sync_tqinfifo(ahd, BUS_DMASYNC_POSTREAD);
 9849         while ((cmd = &ahd->targetcmds[ahd->tqinfifonext])->cmd_valid != 0) {
 9851                 /*
 9852                  * Only advance through the queue if we
 9853                  * have the resources to process the command.
 9854                  */
 9855                 if (ahd_handle_target_cmd(ahd, cmd) != 0)
 9856                         break;
cmd->cmd_valid = 0;
ahd_dmamap_sync(ahd, ahd->parent_dmat /*shared_data_dmat*/,
ahd->shared_data_dmamap,
ahd_targetcmd_offset(ahd, ahd->tqinfifonext),
 9862                                 sizeof(struct target_cmd),
BUS_DMASYNC_PREREAD);
ahd->tqinfifonext++;
 9866                 /*
 9867                  * Lazily update our position in the target mode incoming
 9868                  * command queue as seen by the sequencer.
 9869                  */
 9870                 if ((ahd->tqinfifonext & (HOST_TQINPOS - 1)) == 1) {
u_int hs_mailbox;
hs_mailbox = ahd_inb(ahd, HS_MAILBOX);
hs_mailbox &= ~HOST_TQINPOS;
hs_mailbox |= ahd->tqinfifonext & HOST_TQINPOS;
ahd_outb(ahd, HS_MAILBOX, hs_mailbox);
 9877                 }
 9878         }
 9879 }
 9881 int
ahd_handle_target_cmd(struct ahd_softc *ahd, struct target_cmd *cmd)
 9883 {
 9884         struct    ahd_tmode_tstate *tstate;
 9885         struct    ahd_tmode_lstate *lstate;
 9886         struct    ccb_accept_tio *atio;
uint8_t *byte;
 9888         int       initiator;
 9889         int       target;
 9890         int       lun;
initiator = SCSIID_TARGET(ahd, cmd->scsiid);
target = SCSIID_OUR_ID(cmd->scsiid);
lun    = (cmd->identify & MSG_IDENTIFY_LUNMASK);
byte = cmd->bytes;
tstate = ahd->enabled_targets[target];
lstate = NULL;
 9899         if (tstate != NULL)
lstate = tstate->enabled_luns[lun];
 9902         /*
 9903          * Commands for disabled luns go to the black hole driver.
 9904          */
 9905         if (lstate == NULL)
lstate = ahd->black_hole;
atio = (struct ccb_accept_tio*)SLIST_FIRST(&lstate->accept_tios);
 9909         if (atio == NULL) {
ahd->flags |= AHD_TQINFIFO_BLOCKED;
 9911                 /*
 9912                  * Wait for more ATIOs from the peripheral driver for this lun.
 9913                  */
 9914                 return (1);
 9915         } else
ahd->flags &= ~AHD_TQINFIFO_BLOCKED;
 9917 #ifdef AHD_DEBUG
 9918         if ((ahd_debug & AHD_SHOW_TQIN) != 0)
printf("Incoming command from %d for %d:%d%s\n",
initiator, target, lun,
lstate == ahd->black_hole ? "(Black Holed)" : "");
 9922 #endif
SLIST_REMOVE_HEAD(&lstate->accept_tios, sim_links.sle);
 9925         if (lstate == ahd->black_hole) {
 9926                 /* Fill in the wildcards */
atio->ccb_h.target_id = target;
atio->ccb_h.target_lun = lun;
 9929         }
 9931         /*
 9932          * Package it up and send it off to
 9933          * whomever has this lun enabled.
 9934          */
atio->sense_len = 0;
atio->init_id = initiator;
 9937         if (byte[0] != 0xFF) {
 9938                 /* Tag was included */
atio->tag_action = *byte++;
atio->tag_id = *byte++;
atio->ccb_h.flags = CAM_TAG_ACTION_VALID;
 9942         } else {
atio->ccb_h.flags = 0;
 9944         }
byte++;
 9947         /* Okay.  Now determine the cdb size based on the command code */
 9948         switch (*byte >> CMD_GROUP_CODE_SHIFT) {
 9949         case 0:
atio->cdb_len = 6;
 9951                 break;
 9952         case 1:
 9953         case 2:
atio->cdb_len = 10;
 9955                 break;
 9956         case 4:
atio->cdb_len = 16;
 9958                 break;
 9959         case 5:
atio->cdb_len = 12;
 9961                 break;
 9962         case 3:
 9963         default:
 9964                 /* Only copy the opcode. */
atio->cdb_len = 1;
printf("Reserved or VU command code type encountered\n");
 9967                 break;
 9968         }
memcpy(atio->cdb_io.cdb_bytes, byte, atio->cdb_len);
atio->ccb_h.status |= CAM_CDB_RECVD;
 9974         if ((cmd->identify & MSG_IDENTIFY_DISCFLAG) == 0) {
 9975                 /*
 9976                  * We weren't allowed to disconnect.
 9977                  * We're hanging on the bus until a
 9978                  * continue target I/O comes in response
 9979                  * to this accept tio.
 9980                  */
 9981 #ifdef AHD_DEBUG
 9982                 if ((ahd_debug & AHD_SHOW_TQIN) != 0)
printf("Received Immediate Command %d:%d:%d - %p\n",
initiator, target, lun, ahd->pending_device);
 9985 #endif
ahd->pending_device = lstate;
ahd_freeze_ccb((union ccb *)atio);
atio->ccb_h.flags |= CAM_DIS_DISCONNECT;
 9989         }
xpt_done((union ccb*)atio);
 9991         return (0);
 9992 }
 9994 #endif
 9996 int
ahd_createdmamem(struct ahd_softc *ahd, size_t size, struct map_node *map,
 9998     const char *what)
 9999 {
bus_dma_tag_t tag = ahd->parent_dmat;
10001         int nseg, error;
bzero(map, sizeof(*map));
10005         if ((error = bus_dmamap_create(tag, size, 1, size, 0, BUS_DMA_NOWAIT,
10006             &map->dmamap)) != 0) {
printf("%s: failed to create DMA map for %s, error = %d\n",
ahd_name(ahd), what, error);
10009                 return (error);
10010         }
10012         if ((error = bus_dmamem_alloc(tag, size, PAGE_SIZE, 0, &map->dmaseg,
10013             1, &nseg, BUS_DMA_NOWAIT)) != 0) {
printf("%s: failed to allocate DMA mem for %s, error = %d\n",
ahd_name(ahd), what, error);
10016                 goto destroy;
10017         }
10019         if ((error = bus_dmamem_map(tag, &map->dmaseg, nseg, size,
10020             (caddr_t *)&map->vaddr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
printf("%s: failed to map DMA mem for %s, error = %d\n",
ahd_name(ahd), what, error);
10023                 goto free;
10024         }
10026         if ((error = bus_dmamap_load(tag, map->dmamap, map->vaddr, size, NULL,
BUS_DMA_NOWAIT)) != 0) {
printf("%s: failed to load DMA map for %s, error = %d\n",
ahd_name(ahd), what, error);
10030                 goto unmap;
10031         }
map->size = size;
map->busaddr = map->dmamap->dm_segs[0].ds_addr;
10035         return (0);
unmap:
bus_dmamem_unmap(tag, map->vaddr, size);
free:
bus_dmamem_free(tag, &map->dmaseg, 1);
destroy:
bus_dmamap_destroy(tag, map->dmamap);
bzero(map, sizeof(*map));
10045         return (error);
10046 }
10048 void
ahd_freedmamem(struct ahd_softc* ahd, struct map_node *map)
10050 {
bus_dma_tag_t tag = ahd->parent_dmat;
bus_dmamap_unload(tag, map->dmamap);
bus_dmamem_unmap(tag, map->vaddr, map->size);
bus_dmamem_free(tag, &map->dmaseg, 1);
bus_dmamap_destroy(tag, map->dmamap);
10057 }
10059 char *
ahd_name(struct ahd_softc *ahd)
10061 {
10062         return (ahd->name);
10063 }
10065 void
ahd_known_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst)
10067 {
ahd->src_mode = src;
ahd->dst_mode = dst;
ahd->saved_src_mode = src;
ahd->saved_dst_mode = dst;
10072 }
ahd_mode_state
ahd_build_mode_state(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst)
10076 {
10077         return ((src << SRC_MODE_SHIFT) | (dst << DST_MODE_SHIFT));
10078 }
10080 void
ahd_extract_mode_state(struct ahd_softc *ahd, ahd_mode_state state,
ahd_mode *src, ahd_mode *dst)
10083 {
10084         *src = (state & SRC_MODE) >> SRC_MODE_SHIFT;
10085         *dst = (state & DST_MODE) >> DST_MODE_SHIFT;
10086 }
10088 void
ahd_set_modes(struct ahd_softc *ahd, ahd_mode src, ahd_mode dst)
10090 {
10091         if (ahd->src_mode == src && ahd->dst_mode == dst)
10092                 return;
10093 #ifdef AHD_DEBUG
10094         if (ahd->src_mode == AHD_MODE_UNKNOWN
10095          || ahd->dst_mode == AHD_MODE_UNKNOWN)
panic("Setting mode prior to saving it.");
10097         if ((ahd_debug & AHD_SHOW_MODEPTR) != 0)
printf("%s: Setting mode 0x%x\n", ahd_name(ahd),
ahd_build_mode_state(ahd, src, dst));
10100 #endif
ahd_outb(ahd, MODE_PTR, ahd_build_mode_state(ahd, src, dst));
ahd->src_mode = src;
ahd->dst_mode = dst;
10104 }
10106 void
ahd_update_modes(struct ahd_softc *ahd)
10108 {
ahd_mode_state mode_ptr;
ahd_mode src;
ahd_mode dst;
mode_ptr = ahd_inb(ahd, MODE_PTR);
10114 #ifdef AHD_DEBUG
10115         if ((ahd_debug & AHD_SHOW_MODEPTR) != 0)
printf("Reading mode 0x%x\n", mode_ptr);
10117 #endif
ahd_extract_mode_state(ahd, mode_ptr, &src, &dst);
ahd_known_modes(ahd, src, dst);
10120 }
10122 void
ahd_assert_modes(struct ahd_softc *ahd, ahd_mode srcmode,
ahd_mode dstmode, const char *file, int line)
10125 {
10126 #ifdef AHD_DEBUG
10127         if ((srcmode & AHD_MK_MSK(ahd->src_mode)) == 0
10128          || (dstmode & AHD_MK_MSK(ahd->dst_mode)) == 0) {
panic("%s:%s:%d: Mode assertion failed.",
ahd_name(ahd), file, line);
10131         }
10132 #endif
10133 }
ahd_mode_state
ahd_save_modes(struct ahd_softc *ahd)
10137 {
10138         if (ahd->src_mode == AHD_MODE_UNKNOWN
10139          || ahd->dst_mode == AHD_MODE_UNKNOWN)
ahd_update_modes(ahd);
10142         return (ahd_build_mode_state(ahd, ahd->src_mode, ahd->dst_mode));
10143 }
10145 void
ahd_restore_modes(struct ahd_softc *ahd, ahd_mode_state state)
10147 {
ahd_mode src;
ahd_mode dst;
ahd_extract_mode_state(ahd, state, &src, &dst);
ahd_set_modes(ahd, src, dst);
10153 }
10155 /*
10156  * Determine whether the sequencer has halted code execution.
10157  * Returns non-zero status if the sequencer is stopped.
10158  */
10159 int
ahd_is_paused(struct ahd_softc *ahd)
10161 {
10162         return ((ahd_inb(ahd, HCNTRL) & PAUSE) != 0);
10163 }
10165 /*
10166  * Request that the sequencer stop and wait, indefinitely, for it
10167  * to stop.  The sequencer will only acknowledge that it is paused
10168  * once it has reached an instruction boundary and PAUSEDIS is
10169  * cleared in the SEQCTL register.  The sequencer may use PAUSEDIS
10170  * for critical sections.
10171  */
10172 void
ahd_pause(struct ahd_softc *ahd)
10174 {
ahd_outb(ahd, HCNTRL, ahd->pause);
10177         /*
10178          * Since the sequencer can disable pausing in a critical section, we
10179          * must loop until it actually stops.
10180          */
10181         while (ahd_is_paused(ahd) == 0)
10182                 ;
10183 }
10185 /*
10186  * Allow the sequencer to continue program execution.
10187  * We check here to ensure that no additional interrupt
10188  * sources that would cause the sequencer to halt have been
10189  * asserted.  If, for example, a SCSI bus reset is detected
10190  * while we are fielding a different, pausing, interrupt type,
10191  * we don't want to release the sequencer before going back
10192  * into our interrupt handler and dealing with this new
10193  * condition.
10194  */
10195 void
ahd_unpause(struct ahd_softc *ahd)
10197 {
10198         /*
10199          * Automatically restore our modes to those saved
10200          * prior to the first change of the mode.
10201          */
10202         if (ahd->saved_src_mode != AHD_MODE_UNKNOWN
10203          && ahd->saved_dst_mode != AHD_MODE_UNKNOWN) {
10204                 if ((ahd->flags & AHD_UPDATE_PEND_CMDS) != 0)
ahd_reset_cmds_pending(ahd);
ahd_set_modes(ahd, ahd->saved_src_mode, ahd->saved_dst_mode);
10207         }
10209         if ((ahd_inb(ahd, INTSTAT) & ~CMDCMPLT) == 0)
ahd_outb(ahd, HCNTRL, ahd->unpause);
ahd_known_modes(ahd, AHD_MODE_UNKNOWN, AHD_MODE_UNKNOWN);
10213 }
10215 void *
ahd_sg_setup(struct ahd_softc *ahd, struct scb *scb,
10217              void *sgptr, bus_addr_t addr, bus_size_t len, int last)
10218 {
scb->sg_count++;
10220         if (sizeof(bus_addr_t) > 4
10221          && (ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
10222                 struct ahd_dma64_seg *sg;
sg = (struct ahd_dma64_seg *)sgptr;
sg->addr = aic_htole64(addr);
sg->len = aic_htole32(len | (last ? AHD_DMA_LAST_SEG : 0));
10227                 return (sg + 1);
10228         } else {
10229                 struct ahd_dma_seg *sg;
sg = (struct ahd_dma_seg *)sgptr;
sg->addr = aic_htole32(addr & 0xFFFFFFFF);
sg->len = aic_htole32(len | ((addr >> 8) & 0x7F000000)
10234                                     | (last ? AHD_DMA_LAST_SEG : 0));
10235                 return (sg + 1);
10236         }
10237 }
10239 void
ahd_setup_scb_common(struct ahd_softc *ahd, struct scb *scb)
10241 {
10242         /* XXX Handle target mode SCBs. */
scb->crc_retry_count = 0;
10244         if ((scb->flags & SCB_PACKETIZED) != 0) {
10245                 /* XXX what about ACA??  It is type 4, but TAG_TYPE == 0x3. */
scb->hscb->task_attribute = scb->hscb->control & SCB_TAG_TYPE;
10247         } else {
10248                 if (aic_get_transfer_length(scb) & 0x01)
scb->hscb->task_attribute = SCB_XFERLEN_ODD;
10250                 else
scb->hscb->task_attribute = 0;
10252         }
10254         if (scb->hscb->cdb_len <= MAX_CDB_LEN_WITH_SENSE_ADDR
10255          || (scb->hscb->cdb_len & SCB_CDB_LEN_PTR) != 0)
scb->hscb->shared_data.idata.cdb_plus_saddr.sense_addr =
aic_htole32(scb->sense_busaddr);
10258 }
10260 void
ahd_setup_data_scb(struct ahd_softc *ahd, struct scb *scb)
10262 {
10263         /*
10264          * Copy the first SG into the "current" data pointer area.
10265          */
10266         if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0) {
10267                 struct ahd_dma64_seg *sg;
sg = (struct ahd_dma64_seg *)scb->sg_list;
scb->hscb->dataptr = sg->addr;
scb->hscb->datacnt = sg->len;
10272         } else {
10273                 struct ahd_dma_seg *sg;
uint32_t *dataptr_words;
sg = (struct ahd_dma_seg *)scb->sg_list;
dataptr_words = (uint32_t*)&scb->hscb->dataptr;
dataptr_words[0] = sg->addr;
dataptr_words[1] = 0;
10280                 if ((ahd->flags & AHD_39BIT_ADDRESSING) != 0) {
uint64_t high_addr;
high_addr = aic_le32toh(sg->len) & 0x7F000000;
scb->hscb->dataptr |= aic_htole64(high_addr << 8);
10285                 }
scb->hscb->datacnt = sg->len;
10287         }
10288         /*
10289          * Note where to find the SG entries in bus space.
10290          * We also set the full residual flag which the 
10291          * sequencer will clear as soon as a data transfer
10292          * occurs.
10293          */
scb->hscb->sgptr = aic_htole32(scb->sg_list_busaddr|SG_FULL_RESID);
10295 }
10297 void
ahd_setup_noxfer_scb(struct ahd_softc *ahd, struct scb *scb)
10299 {
scb->hscb->sgptr = aic_htole32(SG_LIST_NULL);
scb->hscb->dataptr = 0;
scb->hscb->datacnt = 0;
10303 }
size_t
ahd_sg_size(struct ahd_softc *ahd)
10307 {
10308         if ((ahd->flags & AHD_64BIT_ADDRESSING) != 0)
10309                 return (sizeof(struct ahd_dma64_seg));
10310         return (sizeof(struct ahd_dma_seg));
10311 }
10313 void *
ahd_sg_bus_to_virt(struct ahd_softc *ahd, struct scb *scb, uint32_t sg_busaddr)
10315 {
bus_addr_t sg_offset;
10318         /* sg_list_phys points to entry 1, not 0 */
sg_offset = sg_busaddr - (scb->sg_list_busaddr - ahd_sg_size(ahd));
10320         return ((uint8_t *)scb->sg_list + sg_offset);
10321 }
uint32_t
ahd_sg_virt_to_bus(struct ahd_softc *ahd, struct scb *scb, void *sg)
10325 {
bus_addr_t sg_offset;
10328         /* sg_list_phys points to entry 1, not 0 */
sg_offset = ((uint8_t *)sg - (uint8_t *)scb->sg_list)
10330                   - ahd_sg_size(ahd);
10332         return (scb->sg_list_busaddr + sg_offset);
10333 }
10335 void
ahd_sync_scb(struct ahd_softc *ahd, struct scb *scb, int op)
10337 {
ahd_dmamap_sync(ahd, ahd->parent_dmat, scb->hscb_map->dmamap,
10339                         /*offset*/(uint8_t*)scb->hscb - scb->hscb_map->vaddr,
10340                         /*len*/sizeof(*scb->hscb), op);
10341 }
10343 void
ahd_sync_sglist(struct ahd_softc *ahd, struct scb *scb, int op)
10345 {
10346         if (scb->sg_count == 0)
10347                 return;
ahd_dmamap_sync(ahd, ahd->parent_dmat,
scb->sense_map->dmamap,
10351                         /*offset*/scb->sg_list_busaddr - ahd_sg_size(ahd),
10352                         /*len*/ahd_sg_size(ahd) * scb->sg_count, op);
10353 }
10355 void
ahd_sync_sense(struct ahd_softc *ahd, struct scb *scb, int op)
10357 {
ahd_dmamap_sync(ahd, ahd->parent_dmat,
scb->sense_map->dmamap,
10360                         /*offset*/scb->sense_busaddr,
10361                         /*len*/AHD_SENSE_BUFSIZE, op);
10362 }
uint32_t
ahd_targetcmd_offset(struct ahd_softc *ahd, u_int index)
10366 {
10367         return (((uint8_t *)&ahd->targetcmds[index])
10368                - (uint8_t *)ahd->qoutfifo);
10369 }
10371 void
ahd_complete_scb(struct ahd_softc *ahd, struct scb *scb)
10373 {
uint32_t sgptr;
sgptr = aic_le32toh(scb->hscb->sgptr);
10377         if ((sgptr & SG_STATUS_VALID) != 0)
ahd_handle_scb_status(ahd, scb);
10379         else
ahd_done(ahd, scb);
10381 }
10383 /*
10384  * Determine whether the sequencer reported a residual
10385  * for this SCB/transaction.
10386  */
10387 void
ahd_update_residual(struct ahd_softc *ahd, struct scb *scb)
10389 {
uint32_t sgptr;
sgptr = aic_le32toh(scb->hscb->sgptr);
10393         if ((sgptr & SG_STATUS_VALID) != 0)
ahd_calc_residual(ahd, scb);
10395 }
10397 /*
10398  * Return pointers to the transfer negotiation information
10399  * for the specified our_id/remote_id pair.
10400  */
10401 struct ahd_initiator_tinfo *
ahd_fetch_transinfo(struct ahd_softc *ahd, char channel, u_int our_id,
u_int remote_id, struct ahd_tmode_tstate **tstate)
10404 {
10405         /*
10406          * Transfer data structures are stored from the perspective
10407          * of the target role.  Since the parameters for a connection
10408          * in the initiator role to a given target are the same as
10409          * when the roles are reversed, we pretend we are the target.
10410          */
10411         if (channel == 'B')
our_id += 8;
10413         *tstate = ahd->enabled_targets[our_id];
10414         return (&(*tstate)->transinfo[remote_id]);
10415 }
10417 #define AHD_COPY_COL_IDX(dst, src)                              \
10418 do {                                                            \
dst->hscb->scsiid = src->hscb->scsiid;                  \
dst->hscb->lun = src->hscb->lun;                        \
10421 } while (0)
uint16_t
ahd_inw(struct ahd_softc *ahd, u_int port)
10425 {
10426         /*
10427          * Read high byte first as some registers increment
10428          * or have other side effects when the low byte is
10429          * read.
10430          */
10431         return ((ahd_inb(ahd, port+1) << 8) | ahd_inb(ahd, port));
10432 }
10434 void
ahd_outw(struct ahd_softc *ahd, u_int port, u_int value)
10436 {
10437         /*
10438          * Write low byte first to accomodate registers
10439          * such as PRGMCNT where the order maters.
10440          */
ahd_outb(ahd, port, value & 0xFF);
ahd_outb(ahd, port+1, (value >> 8) & 0xFF);
10443 }
uint32_t
ahd_inl(struct ahd_softc *ahd, u_int port)
10447 {
10448         return ((ahd_inb(ahd, port))
10449               | (ahd_inb(ahd, port+1) << 8)
10450               | (ahd_inb(ahd, port+2) << 16)
10451               | (ahd_inb(ahd, port+3) << 24));
10452 }
10454 void
ahd_outl(struct ahd_softc *ahd, u_int port, uint32_t value)
10456 {
ahd_outb(ahd, port, (value) & 0xFF);
ahd_outb(ahd, port+1, ((value) >> 8) & 0xFF);
ahd_outb(ahd, port+2, ((value) >> 16) & 0xFF);
ahd_outb(ahd, port+3, ((value) >> 24) & 0xFF);
10461 }
uint64_t
ahd_inq(struct ahd_softc *ahd, u_int port)
10465 {
10466         return ((ahd_inb(ahd, port))
10467               | (ahd_inb(ahd, port+1) << 8)
10468               | (ahd_inb(ahd, port+2) << 16)
10469               | (ahd_inb(ahd, port+3) << 24)
10470               | (((uint64_t)ahd_inb(ahd, port+4)) << 32)
10471               | (((uint64_t)ahd_inb(ahd, port+5)) << 40)
10472               | (((uint64_t)ahd_inb(ahd, port+6)) << 48)
10473               | (((uint64_t)ahd_inb(ahd, port+7)) << 56));
10474 }
10476 void
ahd_outq(struct ahd_softc *ahd, u_int port, uint64_t value)
10478 {
ahd_outb(ahd, port, value & 0xFF);
ahd_outb(ahd, port+1, (value >> 8) & 0xFF);
ahd_outb(ahd, port+2, (value >> 16) & 0xFF);
ahd_outb(ahd, port+3, (value >> 24) & 0xFF);
ahd_outb(ahd, port+4, (value >> 32) & 0xFF);
ahd_outb(ahd, port+5, (value >> 40) & 0xFF);
ahd_outb(ahd, port+6, (value >> 48) & 0xFF);
ahd_outb(ahd, port+7, (value >> 56) & 0xFF);
10487 }
u_int
ahd_get_scbptr(struct ahd_softc *ahd)
10491 {
AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK),
10493                          ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK));
10494         return (ahd_inb(ahd, SCBPTR) | (ahd_inb(ahd, SCBPTR + 1) << 8));
10495 }
10497 void
ahd_set_scbptr(struct ahd_softc *ahd, u_int scbptr)
10499 {
AHD_ASSERT_MODES(ahd, ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK),
10501                          ~(AHD_MODE_UNKNOWN_MSK|AHD_MODE_CFG_MSK));
ahd_outb(ahd, SCBPTR, scbptr & 0xFF);
ahd_outb(ahd, SCBPTR+1, (scbptr >> 8) & 0xFF);
10504 }
u_int
ahd_get_hnscb_qoff(struct ahd_softc *ahd)
10508 {
10509         return (ahd_inw_atomic(ahd, HNSCB_QOFF));
10510 }
10512 void
ahd_set_hnscb_qoff(struct ahd_softc *ahd, u_int value)
10514 {
ahd_outw_atomic(ahd, HNSCB_QOFF, value);
10516 }
u_int
ahd_get_hescb_qoff(struct ahd_softc *ahd)
10520 {
10521         return (ahd_inb(ahd, HESCB_QOFF));
10522 }
10524 void
ahd_set_hescb_qoff(struct ahd_softc *ahd, u_int value)
10526 {
ahd_outb(ahd, HESCB_QOFF, value);
10528 }
u_int
ahd_get_snscb_qoff(struct ahd_softc *ahd)
10532 {
u_int oldvalue;
AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
oldvalue = ahd_inw(ahd, SNSCB_QOFF);
ahd_outw(ahd, SNSCB_QOFF, oldvalue);
10538         return (oldvalue);
10539 }
10541 void
ahd_set_snscb_qoff(struct ahd_softc *ahd, u_int value)
10543 {
AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
ahd_outw(ahd, SNSCB_QOFF, value);
10546 }
u_int
ahd_get_sescb_qoff(struct ahd_softc *ahd)
10550 {
AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
10552         return (ahd_inb(ahd, SESCB_QOFF));
10553 }
10555 void
ahd_set_sescb_qoff(struct ahd_softc *ahd, u_int value)
10557 {
AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
ahd_outb(ahd, SESCB_QOFF, value);
10560 }
u_int
ahd_get_sdscb_qoff(struct ahd_softc *ahd)
10564 {
AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
10566         return (ahd_inb(ahd, SDSCB_QOFF) | (ahd_inb(ahd, SDSCB_QOFF + 1) << 8));
10567 }
10569 void
ahd_set_sdscb_qoff(struct ahd_softc *ahd, u_int value)
10571 {
AHD_ASSERT_MODES(ahd, AHD_MODE_CCHAN_MSK, AHD_MODE_CCHAN_MSK);
ahd_outb(ahd, SDSCB_QOFF, value & 0xFF);
ahd_outb(ahd, SDSCB_QOFF+1, (value >> 8) & 0xFF);
10575 }
u_int
ahd_inb_scbram(struct ahd_softc *ahd, u_int offset)
10579 {
u_int value;
10582         /*
10583          * Workaround PCI-X Rev A. hardware bug.
10584          * After a host read of SCB memory, the chip
10585          * may become confused into thinking prefetch
10586          * was required.  This starts the discard timer
10587          * running and can cause an unexpected discard
10588          * timer interrupt.  The work around is to read
10589          * a normal register prior to the exhaustion of
10590          * the discard timer.  The mode pointer register
10591          * has no side effects and so serves well for
10592          * this purpose.
10593          *
10594          * Razor #528
10595          */
value = ahd_inb(ahd, offset);
10597         if ((ahd->bugs & AHD_PCIX_SCBRAM_RD_BUG) != 0)
ahd_inb(ahd, MODE_PTR);
10599         return (value);
10600 }
u_int
ahd_inw_scbram(struct ahd_softc *ahd, u_int offset)
10604 {
10605         return (ahd_inb_scbram(ahd, offset)
10606               | (ahd_inb_scbram(ahd, offset+1) << 8));
10607 }
uint32_t
ahd_inl_scbram(struct ahd_softc *ahd, u_int offset)
10611 {
10612         return (ahd_inw_scbram(ahd, offset)
10613               | (ahd_inw_scbram(ahd, offset+2) << 16));
10614 }
uint64_t
ahd_inq_scbram(struct ahd_softc *ahd, u_int offset)
10618 {
10619         return (ahd_inl_scbram(ahd, offset)
10620               | ((uint64_t)ahd_inl_scbram(ahd, offset+4)) << 32);
10621 }
10623 struct scb *
ahd_lookup_scb(struct ahd_softc *ahd, u_int tag)
10625 {
10626         struct scb* scb;
10628         if (tag >= AHD_SCB_MAX)
10629                 return (NULL);
scb = ahd->scb_data.scbindex[tag];
10631         if (scb != NULL)
ahd_sync_scb(ahd, scb,
BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
10634         return (scb);
10635 }
10637 void
ahd_swap_with_next_hscb(struct ahd_softc *ahd, struct scb *scb)
10639 {
10640         struct   hardware_scb *q_hscb;
10641         struct   map_node *q_hscb_map;
uint32_t saved_hscb_busaddr;
10644         /*
10645          * Our queuing method is a bit tricky.  The card
10646          * knows in advance which HSCB (by address) to download,
10647          * and we can't disappoint it.  To achieve this, the next
10648          * HSCB to download is saved off in ahd->next_queued_hscb.
10649          * When we are called to queue "an arbitrary scb",
10650          * we copy the contents of the incoming HSCB to the one
10651          * the sequencer knows about, swap HSCB pointers and
10652          * finally assign the SCB to the tag indexed location
10653          * in the scb_array.  This makes sure that we can still
10654          * locate the correct SCB by SCB_TAG.
10655          */
q_hscb = ahd->next_queued_hscb;
q_hscb_map = ahd->next_queued_hscb_map;
saved_hscb_busaddr = q_hscb->hscb_busaddr;
memcpy(q_hscb, scb->hscb, sizeof(*scb->hscb));
q_hscb->hscb_busaddr = saved_hscb_busaddr;
q_hscb->next_hscb_busaddr = scb->hscb->hscb_busaddr;
10663         /* Now swap HSCB pointers. */
ahd->next_queued_hscb = scb->hscb;
ahd->next_queued_hscb_map = scb->hscb_map;
scb->hscb = q_hscb;
scb->hscb_map = q_hscb_map;
10669         /* Now define the mapping from tag to SCB in the scbindex */
ahd->scb_data.scbindex[SCB_GET_TAG(scb)] = scb;
10671 }
10673 /*
10674  * Tell the sequencer about a new transaction to execute.
10675  */
10676 void
ahd_queue_scb(struct ahd_softc *ahd, struct scb *scb)
10678 {
ahd_swap_with_next_hscb(ahd, scb);
10681         if (SCBID_IS_NULL(SCB_GET_TAG(scb)))
panic("Attempt to queue invalid SCB tag %x",
SCB_GET_TAG(scb));
10685         /*
10686          * Keep a history of SCBs we've downloaded in the qinfifo.
10687          */
ahd->qinfifo[AHD_QIN_WRAP(ahd->qinfifonext)] = SCB_GET_TAG(scb);
ahd->qinfifonext++;
10691         if (scb->sg_count != 0)
ahd_setup_data_scb(ahd, scb);
10693         else
ahd_setup_noxfer_scb(ahd, scb);
ahd_setup_scb_common(ahd, scb);
10697         /*
10698          * Make sure our data is consistent from the
10699          * perspective of the adapter.
10700          */
ahd_sync_scb(ahd, scb, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
10703 #ifdef AHD_DEBUG
10704         if ((ahd_debug & AHD_SHOW_QUEUE) != 0) {
uint64_t host_dataptr;
host_dataptr = aic_le64toh(scb->hscb->dataptr);
printf("%s: Queueing SCB %d:0x%x bus addr 0x%x - 0x%x%x/0x%x\n",
ahd_name(ahd),
SCB_GET_TAG(scb), scb->hscb->scsiid,
aic_le32toh(scb->hscb->hscb_busaddr),
10712                        (u_int)((host_dataptr >> 32) & 0xFFFFFFFF),
10713                        (u_int)(host_dataptr & 0xFFFFFFFF),
aic_le32toh(scb->hscb->datacnt));
10715         }
10716 #endif
10717         /* Tell the adapter about the newly queued SCB */
ahd_set_hnscb_qoff(ahd, ahd->qinfifonext);
10719 }
uint8_t *
ahd_get_sense_buf(struct ahd_softc *ahd, struct scb *scb)
10723 {
10724         return (scb->sense_data);
10725 }
uint32_t
ahd_get_sense_bufaddr(struct ahd_softc *ahd, struct scb *scb)
10729 {
10730         return (scb->sense_busaddr);
10731 }
10733 void
ahd_sync_qoutfifo(struct ahd_softc *ahd, int op)
10735 {
ahd_dmamap_sync(ahd, ahd->parent_dmat, ahd->shared_data_map.dmamap,
10737                         /*offset*/0,
10738                         /*len*/AHD_SCB_MAX * sizeof(struct ahd_completion), op);
10739 }
10741 void
ahd_sync_tqinfifo(struct ahd_softc *ahd, int op)
10743 {
10744 #ifdef AHD_TARGET_MODE
10745         if ((ahd->flags & AHD_TARGETROLE) != 0) {
ahd_dmamap_sync(ahd, ahd->parent_dmat,
ahd->shared_data_map.dmamap,
ahd_targetcmd_offset(ahd, 0),
10749                                 sizeof(struct target_cmd) * AHD_TMODE_CMDS,
op);
10751         }
10752 #endif
10753 }
10755 /*
10756  * See if the firmware has posted any completed commands
10757  * into our in-core command complete fifos.
10758  */
10759 #define AHD_RUN_QOUTFIFO 0x1
10760 #define AHD_RUN_TQINFIFO 0x2
u_int
ahd_check_cmdcmpltqueues(struct ahd_softc *ahd)
10763 {
u_int retval;
retval = 0;
ahd_dmamap_sync(ahd, ahd->parent_dmat, ahd->shared_data_map.dmamap,
10768                         /*offset*/ahd->qoutfifonext * sizeof(*ahd->qoutfifo),
10769                         /*len*/sizeof(*ahd->qoutfifo), BUS_DMASYNC_POSTREAD);
10770         if (ahd->qoutfifo[ahd->qoutfifonext].valid_tag
10771           == ahd->qoutfifonext_valid_tag)
retval |= AHD_RUN_QOUTFIFO;
10773 #ifdef AHD_TARGET_MODE
10774         if ((ahd->flags & AHD_TARGETROLE) != 0
10775          && (ahd->flags & AHD_TQINFIFO_BLOCKED) == 0) {
ahd_dmamap_sync(ahd, ahd->parent_dmat
ahd->shared_data_map.dmamap,
ahd_targetcmd_offset(ahd, ahd->tqinfifofnext),
10779                                 /*len*/sizeof(struct target_cmd),
BUS_DMASYNC_POSTREAD);
10781                 if (ahd->targetcmds[ahd->tqinfifonext].cmd_valid != 0)
retval |= AHD_RUN_TQINFIFO;
10783         }
10784 #endif
10785         return (retval);
10786 }
10788 /*
10789  * Catch an interrupt from the adapter
10790  */
10791 int
ahd_intr(struct ahd_softc *ahd)
10793 {
u_int   intstat;
10796         if ((ahd->pause & INTEN) == 0) {
10797                 /*
10798                  * Our interrupt is not enabled on the chip
10799                  * and may be disabled for re-entrancy reasons,
10800                  * so just return.  This is likely just a shared
10801                  * interrupt.
10802                  */
10803                 return (0);
10804         }
10806         /*
10807          * Instead of directly reading the interrupt status register,
10808          * infer the cause of the interrupt by checking our in-core
10809          * completion queues.  This avoids a costly PCI bus read in
10810          * most cases.
10811          */
10812         if ((ahd->flags & AHD_ALL_INTERRUPTS) == 0
10813          && (ahd_check_cmdcmpltqueues(ahd) != 0))
intstat = CMDCMPLT;
10815         else
intstat = ahd_inb(ahd, INTSTAT);
10818         if ((intstat & INT_PEND) == 0)
10819                 return (0);
10821         if (intstat & CMDCMPLT) {
ahd_outb(ahd, CLRINT, CLRCMDINT);
10824                 /*
10825                  * Ensure that the chip sees that we've cleared
10826                  * this interrupt before we walk the output fifo.
10827                  * Otherwise, we may, due to posted bus writes,
10828                  * clear the interrupt after we finish the scan,
10829                  * and after the sequencer has added new entries
10830                  * and asserted the interrupt again.
10831                  */
10832                 if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) {
10833                         if (ahd_is_paused(ahd)) {
10834                                 /*
10835                                  * Potentially lost SEQINT.
10836                                  * If SEQINTCODE is non-zero,
10837                                  * simulate the SEQINT.
10838                                  */
10839                                 if (ahd_inb(ahd, SEQINTCODE) != NO_SEQINT)
intstat |= SEQINT;
10841                         }
10842                 } else {
ahd_flush_device_writes(ahd);
10844                 }
ahd_run_qoutfifo(ahd);
ahd->cmdcmplt_counts[ahd->cmdcmplt_bucket]++;
ahd->cmdcmplt_total++;
10848 #ifdef AHD_TARGET_MODE
10849                 if ((ahd->flags & AHD_TARGETROLE) != 0)
ahd_run_tqinfifo(ahd, /*paused*/FALSE);
10851 #endif
10852         }
10854         /*
10855          * Handle statuses that may invalidate our cached
10856          * copy of INTSTAT separately.
10857          */
10858         if (intstat == 0xFF && (ahd->features & AHD_REMOVABLE) != 0) {
10859                 /* Hot eject.  Do nothing */
10860         } else if (intstat & HWERRINT) {
ahd_handle_hwerrint(ahd);
10862         } else if ((intstat & (PCIINT|SPLTINT)) != 0) {
ahd->bus_intr(ahd);
10864         } else {
10866                 if ((intstat & SEQINT) != 0)
ahd_handle_seqint(ahd, intstat);
10869                 if ((intstat & SCSIINT) != 0)
ahd_handle_scsiint(ahd, intstat);
10871         }
10872         return (1);
10873 }
10875 void
ahd_unbusy_tcl(struct ahd_softc *ahd, u_int tcl)
10877 {
ahd_busy_tcl(ahd, tcl, SCB_LIST_NULL);
10879 }