bus_width         180 dev/ic/aic79xx.c 					   u_int bus_width);
bus_width         184 dev/ic/aic79xx.c 					  u_int bus_width, u_int ppr_options);
bus_width        2998 dev/ic/aic79xx.c 		   u_int *bus_width, role_t role)
bus_width        3000 dev/ic/aic79xx.c 	switch (*bus_width) {
bus_width        3004 dev/ic/aic79xx.c 			*bus_width = MSG_EXT_WDTR_BUS_16_BIT;
bus_width        3009 dev/ic/aic79xx.c 		*bus_width = MSG_EXT_WDTR_BUS_8_BIT;
bus_width        3014 dev/ic/aic79xx.c 			*bus_width = MIN(tinfo->user.width, *bus_width);
bus_width        3016 dev/ic/aic79xx.c 			*bus_width = MIN(tinfo->goal.width, *bus_width);
bus_width        3817 dev/ic/aic79xx.c 		   u_int bus_width)
bus_width        3822 dev/ic/aic79xx.c 	ahd->msgout_buf[ahd->msgout_index++] = bus_width;
bus_width        3827 dev/ic/aic79xx.c 		       devinfo->lun, bus_width);
bus_width        3837 dev/ic/aic79xx.c 		  u_int period, u_int offset, u_int bus_width,
bus_width        3855 dev/ic/aic79xx.c 	ahd->msgout_buf[ahd->msgout_index++] = bus_width;
bus_width        3862 dev/ic/aic79xx.c 		       bus_width, period, offset, ppr_options);
bus_width        4413 dev/ic/aic79xx.c 			u_int bus_width;
bus_width        4433 dev/ic/aic79xx.c 			bus_width = ahd->msgin_buf[3];
bus_width        4434 dev/ic/aic79xx.c 			saved_width = bus_width;
bus_width        4435 dev/ic/aic79xx.c 			ahd_validate_width(ahd, tinfo, &bus_width,
bus_width        4442 dev/ic/aic79xx.c 				       saved_width, bus_width);
bus_width        4452 dev/ic/aic79xx.c 				if (saved_width > bus_width) {
bus_width        4458 dev/ic/aic79xx.c 					       8 * (0x01 << bus_width));
bus_width        4459 dev/ic/aic79xx.c 					bus_width = 0;
bus_width        4474 dev/ic/aic79xx.c 				ahd_construct_wdtr(ahd, devinfo, bus_width);
bus_width        4490 dev/ic/aic79xx.c 			ahd_set_width(ahd, devinfo, bus_width,
bus_width        4511 dev/ic/aic79xx.c 			u_int	bus_width;
bus_width        4534 dev/ic/aic79xx.c 			bus_width = ahd->msgin_buf[6];
bus_width        4535 dev/ic/aic79xx.c 			saved_width = bus_width;
bus_width        4552 dev/ic/aic79xx.c 			if (bus_width == 0)
bus_width        4555 dev/ic/aic79xx.c 			ahd_validate_width(ahd, tinfo, &bus_width,
bus_width        4560 dev/ic/aic79xx.c 					    bus_width, devinfo->role);
bus_width        4568 dev/ic/aic79xx.c 				if (saved_width > bus_width
bus_width        4574 dev/ic/aic79xx.c 					bus_width = 0;
bus_width        4591 dev/ic/aic79xx.c 						  bus_width, ppr_options);
bus_width        4604 dev/ic/aic79xx.c 				       bus_width, period, offset, ppr_options);
bus_width        4606 dev/ic/aic79xx.c 			ahd_set_width(ahd, devinfo, bus_width,
bus_width        1500 dev/ic/aic79xx.h 					   u_int *bus_width,
bus_width         181 dev/ic/aic7xxx.c 					   u_int bus_width);
bus_width         185 dev/ic/aic7xxx.c 					  u_int bus_width, u_int ppr_options);
bus_width        1894 dev/ic/aic7xxx.c 		   u_int *bus_width, role_t role)
bus_width        1896 dev/ic/aic7xxx.c 	switch (*bus_width) {
bus_width        1900 dev/ic/aic7xxx.c 			*bus_width = MSG_EXT_WDTR_BUS_16_BIT;
bus_width        1905 dev/ic/aic7xxx.c 		*bus_width = MSG_EXT_WDTR_BUS_8_BIT;
bus_width        1910 dev/ic/aic7xxx.c 			*bus_width = MIN(tinfo->user.width, *bus_width);
bus_width        1912 dev/ic/aic7xxx.c 			*bus_width = MIN(tinfo->goal.width, *bus_width);
bus_width        2555 dev/ic/aic7xxx.c 		   u_int bus_width)
bus_width        2560 dev/ic/aic7xxx.c 	ahc->msgout_buf[ahc->msgout_index++] = bus_width;
bus_width        2565 dev/ic/aic7xxx.c 		       devinfo->lun, bus_width);
bus_width        2575 dev/ic/aic7xxx.c 		  u_int period, u_int offset, u_int bus_width,
bus_width        2586 dev/ic/aic7xxx.c 	ahc->msgout_buf[ahc->msgout_index++] = bus_width;
bus_width        2593 dev/ic/aic7xxx.c 		       bus_width, period, offset, ppr_options);
bus_width        3197 dev/ic/aic7xxx.c 			u_int bus_width;
bus_width        3217 dev/ic/aic7xxx.c 			bus_width = ahc->msgin_buf[3];
bus_width        3218 dev/ic/aic7xxx.c 			saved_width = bus_width;
bus_width        3219 dev/ic/aic7xxx.c 			ahc_validate_width(ahc, tinfo, &bus_width,
bus_width        3226 dev/ic/aic7xxx.c 				       saved_width, bus_width);
bus_width        3236 dev/ic/aic7xxx.c 				if (saved_width > bus_width) {
bus_width        3242 dev/ic/aic7xxx.c 					       8 * (0x01 << bus_width));
bus_width        3243 dev/ic/aic7xxx.c 					bus_width = 0;
bus_width        3258 dev/ic/aic7xxx.c 				ahc_construct_wdtr(ahc, devinfo, bus_width);
bus_width        3274 dev/ic/aic7xxx.c 			ahc_set_width(ahc, devinfo, bus_width,
bus_width        3296 dev/ic/aic7xxx.c 			u_int	bus_width;
bus_width        3319 dev/ic/aic7xxx.c 			bus_width = ahc->msgin_buf[6];
bus_width        3320 dev/ic/aic7xxx.c 			saved_width = bus_width;
bus_width        3339 dev/ic/aic7xxx.c 			if (bus_width == 0)
bus_width        3342 dev/ic/aic7xxx.c 			ahc_validate_width(ahc, tinfo, &bus_width,
bus_width        3348 dev/ic/aic7xxx.c 					    &offset, bus_width,
bus_width        3357 dev/ic/aic7xxx.c 				if (saved_width > bus_width
bus_width        3363 dev/ic/aic7xxx.c 					bus_width = 0;
bus_width        3381 dev/ic/aic7xxx.c 						  bus_width, ppr_options);
bus_width        3394 dev/ic/aic7xxx.c 				       bus_width, period, offset, ppr_options);
bus_width        3396 dev/ic/aic7xxx.c 			ahc_set_width(ahc, devinfo, bus_width,
bus_width        1290 dev/ic/aic7xxxvar.h 					   u_int *bus_width,
bus_width         475 dev/ic/siopreg.h 		u_int8_t	bus_width;
bus_width        6076 dev/pci/if_em_hw.c         hw->bus_width = em_bus_width_unknown;
bus_width        6088 dev/pci/if_em_hw.c             hw->bus_width = em_bus_width_unknown;
bus_width        6090 dev/pci/if_em_hw.c             hw->bus_width = (pci_ex_link_status & PCI_EX_LINK_WIDTH_MASK) >>
bus_width        6096 dev/pci/if_em_hw.c         hw->bus_width = em_bus_width_pciex_1;
bus_width        6125 dev/pci/if_em_hw.c         hw->bus_width = (status & E1000_STATUS_BUS64) ?
bus_width        1380 dev/pci/if_em_hw.h     em_bus_width bus_width;