root/dev/ic/aic6360.c

DEFINITIONS

1. aic_find
2. aicattach
3. aic_detach
4. aic_reset
5. aic_scsi_reset
6. aic_init
7. aic_free_acb
8. aic_get_acb
9. aic_scsi_cmd
10. aic_minphys
11. aic_poll
12. aic_sched_msgout
13. aic_setsync
14. aic_select
15. aic_reselect
16. aic_sched
17. aic_sense
18. aic_done
19. aic_dequeue
20. aic_msgin
21. aic_msgout
22. aic_dataout_pio
23. aic_datain_pio
24. aicintr
25. aic_abort
26. aic_timeout
27. aic_show_scsi_cmd
28. aic_print_acb
29. aic_print_active_acb
30. aic_dump6360
31. aic_dump_driver

    1 /*      $OpenBSD: aic6360.c,v 1.15 2007/08/09 00:03:16 ray Exp $        */
    2 /*      $NetBSD: aic6360.c,v 1.52 1996/12/10 21:27:51 thorpej Exp $     */
    4 #ifdef DDB
    5 #define integrate
    6 #else
    7 #define integrate       static inline
    8 #endif
   10 /*
   11  * Copyright (c) 1994, 1995, 1996 Charles Hannum.  All rights reserved.
   12  *
   13  * Redistribution and use in source and binary forms, with or without
   14  * modification, are permitted provided that the following conditions
   15  * are met:
   16  * 1. Redistributions of source code must retain the above copyright
   17  *    notice, this list of conditions and the following disclaimer.
   18  * 2. Redistributions in binary form must reproduce the above copyright
   19  *    notice, this list of conditions and the following disclaimer in the
   20  *    documentation and/or other materials provided with the distribution.
   21  * 3. All advertising materials mentioning features or use of this software
   22  *    must display the following acknowledgement:
   23  *      This product includes software developed by Charles M. Hannum.
   24  * 4. The name of the author may not be used to endorse or promote products
   25  *    derived from this software without specific prior written permission.
   26  *
   27  * Copyright (c) 1994 Jarle Greipsland
   28  * All rights reserved.
   29  *
   30  * Redistribution and use in source and binary forms, with or without
   31  * modification, are permitted provided that the following conditions
   32  * are met:
   33  * 1. Redistributions of source code must retain the above copyright
   34  *    notice, this list of conditions and the following disclaimer.
   35  * 2. Redistributions in binary form must reproduce the above copyright
   36  *    notice, this list of conditions and the following disclaimer in the
   37  *    documentation and/or other materials provided with the distribution.
   38  * 3. The name of the author may not be used to endorse or promote products
   39  *    derived from this software without specific prior written permission.
   40  *
   41  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   42  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   43  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
   44  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
   45  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   46  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   47  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   48  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
   49  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
   50  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   51  * POSSIBILITY OF SUCH DAMAGE.
   52  */
   54 /*
   55  * Acknowledgements: Many of the algorithms used in this driver are
   56  * inspired by the work of Julian Elischer (julian@tfs.com) and
   57  * Charles Hannum (mycroft@duality.gnu.ai.mit.edu).  Thanks a million!
   58  */
   60 /* TODO list:
   61  * 1) Get the DMA stuff working.
   62  * 2) Get the iov/uio stuff working. Is this a good thing ???
   63  * 3) Get the synch stuff working.
   64  * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
   65  */
   67 /*
   68  * A few customizable items:
   69  */
   71 /* Use doubleword transfers to/from SCSI chip.  Note: This requires
   72  * motherboard support.  Basicly, some motherboard chipsets are able to
   73  * split a 32 bit I/O operation into two 16 bit I/O operations,
   74  * transparently to the processor.  This speeds up some things, notably long
   75  * data transfers.
   76  */
   77 #define AIC_USE_DWORDS          0
   79 /* Synchronous data transfers? */
   80 #define AIC_USE_SYNCHRONOUS     0
   81 #define AIC_SYNC_REQ_ACK_OFS    8
   83 /* Wide data transfers? */
   84 #define AIC_USE_WIDE            0
   85 #define AIC_MAX_WIDTH           0
   87 /* Max attempts made to transmit a message */
   88 #define AIC_MSG_MAX_ATTEMPT     3 /* Not used now XXX */
   90 /* Use DMA (else we do programmed I/O using string instructions) (not yet!)*/
   91 #define AIC_USE_EISA_DMA        0
   92 #define AIC_USE_ISA_DMA         0
   94 /* How to behave on the (E)ISA bus when/if DMAing (on<<4) + off in us */
   95 #define EISA_BRST_TIM ((15<<4) + 1)     /* 15us on, 1us off */
   97 /* Some spin loop parameters (essentially how long to wait some places)
   98  * The problem(?) is that sometimes we expect either to be able to transmit a
   99  * byte or to get a new one from the SCSI bus pretty soon.  In order to avoid
  100  * returning from the interrupt just to get yanked back for the next byte we
  101  * may spin in the interrupt routine waiting for this byte to come.  How long?
  102  * This is really (SCSI) device and processor dependent.  Tuneable, I guess.
  103  */
  104 #define AIC_MSGIN_SPIN          1       /* Spin upto ?ms for a new msg byte */
  105 #define AIC_MSGOUT_SPIN         1
  107 /* Include debug functions?  At the end of this file there are a bunch of
  108  * functions that will print out various information regarding queued SCSI
  109  * commands, driver state and chip contents.  You can call them from the
  110  * kernel debugger.  If you set AIC_DEBUG to 0 they are not included (the
  111  * kernel uses less memory) but you lose the debugging facilities.
  112  */
  113 #ifndef SMALL_KERNEL
  114 #define AIC_DEBUG               1
  115 #endif
  117 #define AIC_ABORT_TIMEOUT       2000    /* time to wait for abort */
  119 /* End of customizable parameters */
  121 #if AIC_USE_EISA_DMA || AIC_USE_ISA_DMA
  122 #error "I said not yet! Start paying attention... grumble"
  123 #endif
  125 #include <sys/types.h>
  126 #include <sys/param.h>
  127 #include <sys/systm.h>
  128 #include <sys/kernel.h>
  129 #include <sys/errno.h>
  130 #include <sys/ioctl.h>
  131 #include <sys/device.h>
  132 #include <sys/buf.h>
  133 #include <sys/proc.h>
  134 #include <sys/user.h>
  135 #include <sys/queue.h>
  137 #include <machine/bus.h>
  138 #include <machine/intr.h>
  140 #include <scsi/scsi_all.h>
  141 #include <scsi/scsi_message.h>
  142 #include <scsi/scsiconf.h>
  144 #include <dev/isa/isavar.h>
  146 #include <dev/ic/aic6360reg.h>
  147 #include <dev/ic/aic6360var.h>
  149 #ifndef DDB
  150 #define Debugger() panic("should call debugger here (aic6360.c)")
  151 #endif /* ! DDB */
  153 #ifdef AIC_DEBUG
  154 int aic_debug = 0x00; /* AIC_SHOWSTART|AIC_SHOWMISC|AIC_SHOWTRACE; */
  155 #endif
  157 void    aic_minphys(struct buf *);
  158 void    aic_init(struct aic_softc *);
  159 void    aic_done(struct aic_softc *, struct aic_acb *);
  160 void    aic_dequeue(struct aic_softc *, struct aic_acb *);
  161 int     aic_scsi_cmd(struct scsi_xfer *);
  162 int     aic_poll(struct aic_softc *, struct scsi_xfer *, int);
integrate void  aic_sched_msgout(struct aic_softc *, u_char);
integrate void  aic_setsync(struct aic_softc *, struct aic_tinfo *);
  165 void    aic_select(struct aic_softc *, struct aic_acb *);
  166 void    aic_timeout(void *);
  167 void    aic_sched(struct aic_softc *);
  168 void    aic_scsi_reset(struct aic_softc *);
  169 void    aic_reset(struct aic_softc *);
  170 void    aic_free_acb(struct aic_softc *, struct aic_acb *, int);
  171 struct aic_acb* aic_get_acb(struct aic_softc *, int);
  172 int     aic_reselect(struct aic_softc *, int);
  173 void    aic_sense(struct aic_softc *, struct aic_acb *);
  174 void    aic_msgin(struct aic_softc *);
  175 void    aic_abort(struct aic_softc *, struct aic_acb *);
  176 void    aic_msgout(struct aic_softc *);
  177 int     aic_dataout_pio(struct aic_softc *, u_char *, int);
  178 int     aic_datain_pio(struct aic_softc *, u_char *, int);
  179 #ifdef AIC_DEBUG
  180 void    aic_print_acb(struct aic_acb *);
  181 void    aic_dump_driver(struct aic_softc *);
  182 void    aic_dump6360(struct aic_softc *);
  183 void    aic_show_scsi_cmd(struct aic_acb *);
  184 void    aic_print_active_acb(void);
  185 #endif
  187 struct cfdriver aic_cd = {
NULL, "aic", DV_DULL
  189 };
  191 struct scsi_adapter aic_switch = {
aic_scsi_cmd,
  193 #ifdef notyet
aic_minphys,
  195 #else
minphys,
  197 #endif
  198         0,
  199         0,
  200 };
  202 struct scsi_device aic_dev = {
NULL,                   /* Use default error handler */
NULL,                   /* have a queue, served by this */
NULL,                   /* have no async handler */
NULL,                   /* Use default 'done' routine */
  207 };
  210 /*
  211  * Do the real search-for-device.
  212  */
  213 int
aic_find(bus_space_tag_t iot, bus_space_handle_t ioh)
  215 {
  216         char chip_id[sizeof(IDSTRING)]; /* For chips that support it */
  217         int i;
  219         /* Remove aic6360 from possible powerdown mode */
bus_space_write_1(iot, ioh, DMACNTRL0, 0);
  222         /* Thanks to mark@aggregate.com for the new method for detecting
  223          * whether the chip is present or not.  Bonus: may also work for
  224          * the AIC-6260!
  225          */
AIC_TRACE(("aic: probing for aic-chip\n"));
  227         /*
  228          * Linux also init's the stack to 1-16 and then clears it,
  229          *  6260's don't appear to have an ID reg - mpg
  230          */
  231         /* Push the sequence 0,1,..,15 on the stack */
  232 #define STSIZE 16
bus_space_write_1(iot, ioh, DMACNTRL1, 0); /* Reset stack pointer */
  234         for (i = 0; i < STSIZE; i++)
bus_space_write_1(iot, ioh, STACK, i);
  237         /* See if we can pull out the same sequence */
bus_space_write_1(iot, ioh, DMACNTRL1, 0);
  239         for (i = 0; i < STSIZE && bus_space_read_1(iot, ioh, STACK) == i; i++)
  240                 ;
  241         if (i != STSIZE) {
AIC_START(("STACK futzed at %d.\n", i));
  243                 return (0);
  244         }
  246         /* See if we can pull the id string out of the ID register,
  247          * now only used for informational purposes.
  248          */
bzero(chip_id, sizeof(chip_id));
bus_space_read_multi_1(iot, ioh, ID, chip_id, sizeof(IDSTRING) - 1);
AIC_START(("AIC ID: %s ", chip_id));
AIC_START(("chip revision %d\n",
  253             (int)bus_space_read_1(iot, ioh, REV)));
  255         return (1);
  256 }
  258 /* 
  259  * Attach the AIC6360, fill out some high and low level data structures
  260  */
  261 void
aicattach(struct aic_softc *sc)
  263 {
  264         struct scsibus_attach_args saa;
AIC_TRACE(("aicattach  "));
sc->sc_state = AIC_INIT;
sc->sc_initiator = 7;
sc->sc_freq = 20;       /* XXXX assume 20 MHz. */
  271         /*
  272          * These are the bounds of the sync period, based on the frequency of
  273          * the chip's clock input and the size and offset of the sync period
  274          * register.
  275          *
  276          * For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a
  277          * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a
  278          * minimum transfer rate.
  279          */
sc->sc_minsync = (2 * 250) / sc->sc_freq;
sc->sc_maxsync = (9 * 250) / sc->sc_freq;
aic_init(sc);   /* init chip and driver */
  285         /*
  286          * Fill in the prototype scsi_link
  287          */
sc->sc_link.adapter_softc = sc;
sc->sc_link.adapter_target = sc->sc_initiator;
sc->sc_link.adapter = &aic_switch;
sc->sc_link.device = &aic_dev;
sc->sc_link.openings = 2;
bzero(&saa, sizeof(saa));
saa.saa_sc_link = &sc->sc_link;
config_found(&sc->sc_dev, &saa, scsiprint);
  298 }
  300 int
aic_detach(struct device *self, int flags)
  302 {
  303         struct aic_softc *sc = (struct aic_softc *) self;
  304         int rv = 0;
rv = config_detach_children(&sc->sc_dev, flags);
  308         return (rv);
  309 }
  311 /* Initialize AIC6360 chip itself
  312  * The following conditions should hold:
  313  * aicprobe should have succeeded, i.e. the ioh handle in aic_softc must
  314  * be valid.
  315  */
  316 void
aic_reset(struct aic_softc *sc)
  318 {
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
  322         /*
  323          * Doc. recommends to clear these two registers before operations
  324          * commence
  325          */
bus_space_write_1(iot, ioh, SCSITEST, 0);
bus_space_write_1(iot, ioh, TEST, 0);
  329         /* Reset SCSI-FIFO and abort any transfers */
bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRCH | CLRSTCNT);
  332         /* Reset DMA-FIFO */
bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO);
bus_space_write_1(iot, ioh, DMACNTRL1, 0);
  336         /* Disable all selection features */
bus_space_write_1(iot, ioh, SCSISEQ, 0);
bus_space_write_1(iot, ioh, SXFRCTL1, 0);
  340         /* Disable some interrupts */
bus_space_write_1(iot, ioh, SIMODE0, 0x00);
  342         /* Clear a slew of interrupts */
bus_space_write_1(iot, ioh, CLRSINT0, 0x7f);
  345         /* Disable some more interrupts */
bus_space_write_1(iot, ioh, SIMODE1, 0x00);
  347         /* Clear another slew of interrupts */
bus_space_write_1(iot, ioh, CLRSINT1, 0xef);
  350         /* Disable synchronous transfers */
bus_space_write_1(iot, ioh, SCSIRATE, 0);
  353         /* Haven't seen ant errors (yet) */
bus_space_write_1(iot, ioh, CLRSERR, 0x07);
  356         /* Set our SCSI-ID */
bus_space_write_1(iot, ioh, SCSIID, sc->sc_initiator << OID_S);
bus_space_write_1(iot, ioh, BRSTCNTRL, EISA_BRST_TIM);
  359 }
  361 /* Pull the SCSI RST line for 500 us */
  362 void
aic_scsi_reset(struct aic_softc *sc)
  364 {
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
bus_space_write_1(iot, ioh, SCSISEQ, SCSIRSTO);
delay(500);
bus_space_write_1(iot, ioh, SCSISEQ, 0);
delay(50);
  372 }
  374 /*
  375  * Initialize aic SCSI driver.
  376  */
  377 void
aic_init(struct aic_softc *sc)
  379 {
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
  382         struct aic_acb *acb;
  383         int r;
aic_reset(sc);
aic_scsi_reset(sc);
aic_reset(sc);
  389         if (sc->sc_state == AIC_INIT) {
  390                 /* First time through; initialize. */
TAILQ_INIT(&sc->ready_list);
TAILQ_INIT(&sc->nexus_list);
TAILQ_INIT(&sc->free_list);
sc->sc_nexus = NULL;
acb = sc->sc_acb;
bzero(acb, sizeof(sc->sc_acb));
  397                 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
acb++;
  400                 }
bzero(&sc->sc_tinfo, sizeof(sc->sc_tinfo));
  402         } else {
  403                 /* Cancel any active commands. */
sc->sc_state = AIC_CLEANING;
  405                 if ((acb = sc->sc_nexus) != NULL) {
acb->xs->error = XS_DRIVER_STUFFUP;
timeout_del(&acb->xs->stimeout);
aic_done(sc, acb);
  409                 }
  410                 while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) {
acb->xs->error = XS_DRIVER_STUFFUP;
timeout_del(&acb->xs->stimeout);
aic_done(sc, acb);
  414                 }
  415         }
sc->sc_prevphase = PH_INVALID;
  418         for (r = 0; r < 8; r++) {
  419                 struct aic_tinfo *ti = &sc->sc_tinfo[r];
ti->flags = 0;
  422 #if AIC_USE_SYNCHRONOUS
ti->flags |= DO_SYNC;
ti->period = sc->sc_minsync;
ti->offset = AIC_SYNC_REQ_ACK_OFS;
  426 #else
ti->period = ti->offset = 0;
  428 #endif
  429 #if AIC_USE_WIDE
ti->flags |= DO_WIDE;
ti->width = AIC_MAX_WIDTH;
  432 #else
ti->width = 0;
  434 #endif
  435         }
sc->sc_state = AIC_IDLE;
bus_space_write_1(iot, ioh, DMACNTRL0, INTEN);
  439 }
  441 void
aic_free_acb(struct aic_softc *sc, struct aic_acb *acb, int flags)
  443 {
  444         int s;
s = splbio();
acb->flags = 0;
TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
  451         /*
  452          * If there were none, wake anybody waiting for one to come free,
  453          * starting with queued entries.
  454          */
  455         if (TAILQ_NEXT(acb, chain) == NULL)
wakeup(&sc->free_list);
splx(s);
  459 }
  461 struct aic_acb *
aic_get_acb(struct aic_softc *sc, int flags)
  463 {
  464         struct aic_acb *acb;
  465         int s;
s = splbio();
  469         while ((acb = TAILQ_FIRST(&sc->free_list)) == NULL &&
  470                (flags & SCSI_NOSLEEP) == 0)
tsleep(&sc->free_list, PRIBIO, "aicacb", 0);
  472         if (acb) {
TAILQ_REMOVE(&sc->free_list, acb, chain);
acb->flags |= ACB_ALLOC;
  475         }
splx(s);
  478         return acb;
  479 }
  481 /*
  482  * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
  483  */
  485 /*
  486  * Expected sequence:
  487  * 1) Command inserted into ready list
  488  * 2) Command selected for execution
  489  * 3) Command won arbitration and has selected target device
  490  * 4) Send message out (identify message, eventually also sync.negotiations)
  491  * 5) Send command
  492  * 5a) Receive disconnect message, disconnect.
  493  * 5b) Reselected by target
  494  * 5c) Receive identify message from target.
  495  * 6) Send or receive data
  496  * 7) Receive status
  497  * 8) Receive message (command complete etc.)
  498  * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd.
  499  *    Repeat 2-8 (no disconnects please...)
  500  */
  502 /*
  503  * Start a SCSI-command
  504  * This function is called by the higher level SCSI-driver to queue/run
  505  * SCSI-commands.
  506  */
  507 int
aic_scsi_cmd(struct scsi_xfer *xs)
  509 {
  510         struct scsi_link *sc_link = xs->sc_link;
  511         struct aic_softc *sc = sc_link->adapter_softc;
  512         struct aic_acb *acb;
  513         int s, flags;
AIC_TRACE(("aic_scsi_cmd  "));
AIC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
sc_link->target));
flags = xs->flags;
  520         if ((acb = aic_get_acb(sc, flags)) == NULL) {
  521                 return TRY_AGAIN_LATER;
  522         }
  524         /* Initialize acb */
acb->xs = xs;
acb->timeout = xs->timeout;
timeout_set(&xs->stimeout, aic_timeout, acb);
  529         if (xs->flags & SCSI_RESET) {
acb->flags |= ACB_RESET;
acb->scsi_cmd_length = 0;
acb->data_length = 0;
  533         } else {
bcopy(xs->cmd, &acb->scsi_cmd, xs->cmdlen);
acb->scsi_cmd_length = xs->cmdlen;
acb->data_addr = xs->data;
acb->data_length = xs->datalen;
  538         }
acb->target_stat = 0;
s = splbio();
TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
  544         if (sc->sc_state == AIC_IDLE)
aic_sched(sc);
splx(s);
  549         if ((flags & SCSI_POLL) == 0)
  550                 return SUCCESSFULLY_QUEUED;
  552         /* Not allowed to use interrupts, use polling instead */
  553         if (aic_poll(sc, xs, acb->timeout)) {
aic_timeout(acb);
  555                 if (aic_poll(sc, xs, acb->timeout))
aic_timeout(acb);
  557         }
  558         return COMPLETE;
  559 }
  561 #ifdef notyet
  562 /*
  563  * Adjust transfer size in buffer structure
  564  */
  565 void
aic_minphys(struct buf *bp)
  567 {
AIC_TRACE(("aic_minphys  "));
  570         if (bp->b_bcount > (AIC_NSEG << PGSHIFT))
bp->b_bcount = (AIC_NSEG << PGSHIFT);
minphys(bp);
  573 }
  574 #endif
  576 /*
  577  * Used when interrupt driven I/O isn't allowed, e.g. during boot.
  578  */
  579 int
aic_poll(struct aic_softc *sc, struct scsi_xfer *xs, int count)
  581 {
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
AIC_TRACE(("aic_poll  "));
  586         while (count) {
  587                 /*
  588                  * If we had interrupts enabled, would we
  589                  * have got an interrupt?
  590                  */
  591                 if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) != 0)
aicintr(sc);
  593                 if ((xs->flags & ITSDONE) != 0)
  594                         return 0;
delay(1000);
count--;
  597         }
  598         return 1;
  599 }
  601 /*
  602  * LOW LEVEL SCSI UTILITIES
  603  */
integrate void
aic_sched_msgout(struct aic_softc *sc, u_char m)
  607 {
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
  611         if (sc->sc_msgpriq == 0)
bus_space_write_1(iot, ioh, SCSISIG, sc->sc_phase | ATNO);
sc->sc_msgpriq |= m;
  614 }
  616 /*
  617  * Set synchronous transfer offset and period.
  618  */
integrate void
aic_setsync(struct aic_softc *sc, struct aic_tinfo *ti)
  621 {
  622 #if AIC_USE_SYNCHRONOUS
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
  626         if (ti->offset != 0)
bus_space_write_1(iot, ioh, SCSIRATE,
  628                     ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
  629         else
bus_space_write_1(iot, ioh, SCSIRATE, 0);
  631 #endif
  632 }
  634 /*
  635  * Start a selection.  This is used by aic_sched() to select an idle target,
  636  * and by aic_done() to immediately reselect a target to get sense information.
  637  */
  638 void
aic_select(struct aic_softc *sc, struct aic_acb *acb)
  640 {
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
  643         struct scsi_link *sc_link = acb->xs->sc_link;
  644         int target = sc_link->target;
  645         struct aic_tinfo *ti = &sc->sc_tinfo[target];
bus_space_write_1(iot, ioh, SCSIID,
sc->sc_initiator << OID_S | target);
aic_setsync(sc, ti);
bus_space_write_1(iot, ioh, SXFRCTL1, STIMO_256ms | ENSTIMER);
  652         /* Always enable reselections. */
bus_space_write_1(iot, ioh, SIMODE0, ENSELDI | ENSELDO);
bus_space_write_1(iot, ioh, SIMODE1, ENSCSIRST | ENSELTIMO);
bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI | ENSELO | ENAUTOATNO);
sc->sc_state = AIC_SELECTING;
  658 }
  660 int
aic_reselect(struct aic_softc *sc, int message)
  662 {
u_char selid, target, lun;
  664         struct aic_acb *acb;
  665         struct scsi_link *sc_link;
  666         struct aic_tinfo *ti;
  668         /*
  669          * The SCSI chip made a snapshot of the data bus while the reselection
  670          * was being negotiated.  This enables us to determine which target did
  671          * the reselect.
  672          */
selid = sc->sc_selid & ~(1 << sc->sc_initiator);
  674         if (selid & (selid - 1)) {
printf("%s: reselect with invalid selid %02x; ",
sc->sc_dev.dv_xname, selid);
printf("sending DEVICE RESET\n");
AIC_BREAK();
  679                 goto reset;
  680         }
  682         /* Search wait queue for disconnected cmd
  683          * The list should be short, so I haven't bothered with
  684          * any more sophisticated structures than a simple
  685          * singly linked list.
  686          */
target = ffs(selid) - 1;
lun = message & 0x07;
TAILQ_FOREACH(acb, &sc->nexus_list, chain) {
sc_link = acb->xs->sc_link;
  691                 if (sc_link->target == target && sc_link->lun == lun)
  692                         break;
  693         }
  694         if (acb == NULL) {
printf("%s: reselect from target %d lun %d with no nexus; ",
sc->sc_dev.dv_xname, target, lun);
printf("sending ABORT\n");
AIC_BREAK();
  699                 goto abort;
  700         }
  702         /* Make this nexus active again. */
TAILQ_REMOVE(&sc->nexus_list, acb, chain);
sc->sc_state = AIC_CONNECTED;
sc->sc_nexus = acb;
ti = &sc->sc_tinfo[target];
ti->lubusy |= (1 << lun);
aic_setsync(sc, ti);
  710         if (acb->flags & ACB_RESET)
aic_sched_msgout(sc, SEND_DEV_RESET);
  712         else if (acb->flags & ACB_ABORT)
aic_sched_msgout(sc, SEND_ABORT);
  715         /* Do an implicit RESTORE POINTERS. */
sc->sc_dp = acb->data_addr;
sc->sc_dleft = acb->data_length;
sc->sc_cp = (u_char *)&acb->scsi_cmd;
sc->sc_cleft = acb->scsi_cmd_length;
  721         return (0);
reset:
aic_sched_msgout(sc, SEND_DEV_RESET);
  725         return (1);
abort:
aic_sched_msgout(sc, SEND_ABORT);
  729         return (1);
  730 }
  732 /*
  733  * Schedule a SCSI operation.  This has now been pulled out of the interrupt
  734  * handler so that we may call it from aic_scsi_cmd and aic_done.  This may
  735  * save us an unnecessary interrupt just to get things going.  Should only be
  736  * called when state == AIC_IDLE and at bio pl.
  737  */
  738 void
aic_sched(struct aic_softc *sc)
  740 {
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
  743         struct aic_acb *acb;
  744         struct scsi_link *sc_link;
  745         struct aic_tinfo *ti;
  747         /*
  748          * Find first acb in ready queue that is for a target/lunit pair that
  749          * is not busy.
  750          */
bus_space_write_1(iot, ioh, CLRSINT1,
CLRSELTIMO | CLRBUSFREE | CLRSCSIPERR);
TAILQ_FOREACH(acb, &sc->ready_list, chain) {
sc_link = acb->xs->sc_link;
ti = &sc->sc_tinfo[sc_link->target];
  756                 if ((ti->lubusy & (1 << sc_link->lun)) == 0) {
AIC_MISC(("selecting %d:%d  ",
sc_link->target, sc_link->lun));
TAILQ_REMOVE(&sc->ready_list, acb, chain);
sc->sc_nexus = acb;
aic_select(sc, acb);
  762                         return;
  763                 } else
AIC_MISC(("%d:%d busy\n",
sc_link->target, sc_link->lun));
  766         }
AIC_MISC(("idle  "));
  768         /* Nothing to start; just enable reselections and wait. */
bus_space_write_1(iot, ioh, SIMODE0, ENSELDI);
bus_space_write_1(iot, ioh, SIMODE1, ENSCSIRST);
bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI);
  772 }
  774 void
aic_sense(struct aic_softc *sc, struct aic_acb *acb)
  776 {
  777         struct scsi_xfer *xs = acb->xs;
  778         struct scsi_link *sc_link = xs->sc_link;
  779         struct aic_tinfo *ti = &sc->sc_tinfo[sc_link->target];
  780         struct scsi_sense *ss = (void *)&acb->scsi_cmd;
AIC_MISC(("requesting sense  "));
  783         /* Next, setup a request sense command block */
bzero(ss, sizeof(*ss));
ss->opcode = REQUEST_SENSE;
ss->byte2 = sc_link->lun << 5;
ss->length = sizeof(struct scsi_sense_data);
acb->scsi_cmd_length = sizeof(*ss);
acb->data_addr = (char *)&xs->sense;
acb->data_length = sizeof(struct scsi_sense_data);
acb->flags |= ACB_SENSE;
ti->senses++;
  793         if (acb->flags & ACB_NEXUS)
ti->lubusy &= ~(1 << sc_link->lun);
  795         if (acb == sc->sc_nexus) {
aic_select(sc, acb);
  797         } else {
aic_dequeue(sc, acb);
TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
  800                 if (sc->sc_state == AIC_IDLE)
aic_sched(sc);
  802         }
  803 }
  805 /*
  806  * POST PROCESSING OF SCSI_CMD (usually current)
  807  */
  808 void
aic_done(struct aic_softc *sc, struct aic_acb *acb)
  810 {
  811         struct scsi_xfer *xs = acb->xs;
  812         struct scsi_link *sc_link = xs->sc_link;
  813         struct aic_tinfo *ti = &sc->sc_tinfo[sc_link->target];
AIC_TRACE(("aic_done  "));
  817         /*
  818          * Now, if we've come here with no error code, i.e. we've kept the
  819          * initial XS_NOERROR, and the status code signals that we should
  820          * check sense, we'll need to set up a request sense cmd block and
  821          * push the command back into the ready queue *before* any other
  822          * commands for this target/lunit, else we lose the sense info.
  823          * We don't support chk sense conditions for the request sense cmd.
  824          */
  825         if (xs->error == XS_NOERROR) {
  826                 if (acb->flags & ACB_ABORT) {
xs->error = XS_DRIVER_STUFFUP;
  828                 } else if (acb->flags & ACB_SENSE) {
xs->error = XS_SENSE;
  830                 } else if (acb->target_stat == SCSI_CHECK) {
  831                         /* First, save the return values */
xs->resid = acb->data_length;
xs->status = acb->target_stat;
aic_sense(sc, acb);
  835                         return;
  836                 } else {
xs->resid = acb->data_length;
  838                 }
  839         }
xs->flags |= ITSDONE;
  843 #ifdef AIC_DEBUG
  844         if ((aic_debug & AIC_SHOWMISC) != 0) {
  845                 if (xs->resid != 0)
printf("resid=%lu ", (u_long)xs->resid);
  847                 if (xs->error == XS_SENSE)
printf("sense=0x%02x\n", xs->sense.error_code);
  849                 else
printf("error=%d\n", xs->error);
  851         }
  852 #endif
  854         /*
  855          * Remove the ACB from whatever queue it happens to be on.
  856          */
  857         if (acb->flags & ACB_NEXUS)
ti->lubusy &= ~(1 << sc_link->lun);
  859         if (acb == sc->sc_nexus) {
sc->sc_nexus = NULL;
sc->sc_state = AIC_IDLE;
aic_sched(sc);
  863         } else
aic_dequeue(sc, acb);
aic_free_acb(sc, acb, xs->flags);
ti->cmds++;
scsi_done(xs);
  869 }
  871 void
aic_dequeue(struct aic_softc *sc, struct aic_acb *acb)
  873 {
  875         if (acb->flags & ACB_NEXUS) {
TAILQ_REMOVE(&sc->nexus_list, acb, chain);
  877         } else {
TAILQ_REMOVE(&sc->ready_list, acb, chain);
  879         }
  880 }
  882 /*
  883  * INTERRUPT/PROTOCOL ENGINE
  884  */
  886 #define IS1BYTEMSG(m) (((m) != 0x01 && (m) < 0x20) || (m) >= 0x80)
  887 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
  888 #define ISEXTMSG(m) ((m) == 0x01)
  890 /*
  891  * Precondition:
  892  * The SCSI bus is already in the MSGI phase and there is a message byte
  893  * on the bus, along with an asserted REQ signal.
  894  */
  895 void
aic_msgin(struct aic_softc *sc)
  897 {
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
u_char sstat1;
  901         int n;
AIC_TRACE(("aic_msgin  "));
  905         if (sc->sc_prevphase == PH_MSGIN) {
  906                 /* This is a continuation of the previous message. */
n = sc->sc_imp - sc->sc_imess;
  908                 goto nextbyte;
  909         }
  911         /* This is a new MESSAGE IN phase.  Clean up our state. */
sc->sc_flags &= ~AIC_DROP_MSGIN;
nextmsg:
n = 0;
sc->sc_imp = &sc->sc_imess[n];
nextbyte:
  919         /*
  920          * Read a whole message, but don't ack the last byte.  If we reject the
  921          * message, we have to assert ATN during the message transfer phase
  922          * itself.
  923          */
  924         for (;;) {
  925                 for (;;) {
sstat1 = bus_space_read_1(iot, ioh, SSTAT1);
  927                         if ((sstat1 & (REQINIT | PHASECHG | BUSFREE)) != 0)
  928                                 break;
  929                         /* Wait for REQINIT.  XXX Need timeout. */
  930                 }
  931                 if ((sstat1 & (PHASECHG | BUSFREE)) != 0) {
  932                         /*
  933                          * Target left MESSAGE IN, probably because it
  934                          * a) noticed our ATN signal, or
  935                          * b) ran out of messages.
  936                          */
  937                         goto out;
  938                 }
  940                 /* If parity error, just dump everything on the floor. */
  941                 if ((sstat1 & SCSIPERR) != 0) {
sc->sc_flags |= AIC_DROP_MSGIN;
aic_sched_msgout(sc, SEND_PARITY_ERROR);
  944                 }
  946                 /* Gather incoming message bytes if needed. */
  947                 if ((sc->sc_flags & AIC_DROP_MSGIN) == 0) {
  948                         if (n >= AIC_MAX_MSG_LEN) {
  949                                 (void) bus_space_read_1(iot, ioh, SCSIDAT);
sc->sc_flags |= AIC_DROP_MSGIN;
aic_sched_msgout(sc, SEND_REJECT);
  952                         } else {
  953                                 *sc->sc_imp++ = bus_space_read_1(iot, ioh,
SCSIDAT);
n++;
  956                                 /*
  957                                  * This testing is suboptimal, but most
  958                                  * messages will be of the one byte variety, so
  959                                  * it should not affect performance
  960                                  * significantly.
  961                                  */
  962                                 if (n == 1 && IS1BYTEMSG(sc->sc_imess[0]))
  963                                         break;
  964                                 if (n == 2 && IS2BYTEMSG(sc->sc_imess[0]))
  965                                         break;
  966                                 if (n >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
n == sc->sc_imess[1] + 2)
  968                                         break;
  969                         }
  970                 } else
  971                         (void) bus_space_read_1(iot, ioh, SCSIDAT);
  973                 /*
  974                  * If we reach this spot we're either:
  975                  * a) in the middle of a multi-byte message, or
  976                  * b) dropping bytes.
  977                  */
bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN);
  979                 /* Ack the last byte read. */
  980                 (void) bus_space_read_1(iot, ioh, SCSIDAT);
bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
  982                 while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0)
  983                         ;
  984         }
AIC_MISC(("n=%d imess=0x%02x  ", n, sc->sc_imess[0]));
  988         /* We now have a complete message.  Parse it. */
  989         switch (sc->sc_state) {
  990                 struct aic_acb *acb;
  991                 struct scsi_link *sc_link;
  992                 struct aic_tinfo *ti;
  994         case AIC_CONNECTED:
AIC_ASSERT(sc->sc_nexus != NULL);
acb = sc->sc_nexus;
ti = &sc->sc_tinfo[acb->xs->sc_link->target];
  999                 switch (sc->sc_imess[0]) {
 1000                 case MSG_CMDCOMPLETE:
 1001                         if ((long)sc->sc_dleft < 0) {
sc_link = acb->xs->sc_link;
printf("%s: %lu extra bytes from %d:%d\n",
sc->sc_dev.dv_xname, (u_long)-sc->sc_dleft,
sc_link->target, sc_link->lun);
acb->data_length = 0;
 1007                         }
acb->xs->resid = acb->data_length = sc->sc_dleft;
sc->sc_state = AIC_CMDCOMPLETE;
 1010                         break;
 1012                 case MSG_PARITY_ERROR:
 1013                         /* Resend the last message. */
aic_sched_msgout(sc, sc->sc_lastmsg);
 1015                         break;
 1017                 case MSG_MESSAGE_REJECT:
AIC_MISC(("message rejected %02x  ", sc->sc_lastmsg));
 1019                         switch (sc->sc_lastmsg) {
 1020 #if AIC_USE_SYNCHRONOUS + AIC_USE_WIDE
 1021                         case SEND_IDENTIFY:
ti->flags &= ~(DO_SYNC | DO_WIDE);
ti->period = ti->offset = 0;
aic_setsync(sc, ti);
ti->width = 0;
 1026                                 break;
 1027 #endif
 1028 #if AIC_USE_SYNCHRONOUS
 1029                         case SEND_SDTR:
ti->flags &= ~DO_SYNC;
ti->period = ti->offset = 0;
aic_setsync(sc, ti);
 1033                                 break;
 1034 #endif
 1035 #if AIC_USE_WIDE
 1036                         case SEND_WDTR:
ti->flags &= ~DO_WIDE;
ti->width = 0;
 1039                                 break;
 1040 #endif
 1041                         case SEND_INIT_DET_ERR:
aic_sched_msgout(sc, SEND_ABORT);
 1043                                 break;
 1044                         }
 1045                         break;
 1047                 case MSG_NOOP:
 1048                         break;
 1050                 case MSG_DISCONNECT:
ti->dconns++;
sc->sc_state = AIC_DISCONNECT;
 1053                         break;
 1055                 case MSG_SAVEDATAPOINTER:
acb->data_addr = sc->sc_dp;
acb->data_length = sc->sc_dleft;
 1058                         break;
 1060                 case MSG_RESTOREPOINTERS:
sc->sc_dp = acb->data_addr;
sc->sc_dleft = acb->data_length;
sc->sc_cp = (u_char *)&acb->scsi_cmd;
sc->sc_cleft = acb->scsi_cmd_length;
 1065                         break;
 1067                 case MSG_EXTENDED:
 1068                         switch (sc->sc_imess[2]) {
 1069 #if AIC_USE_SYNCHRONOUS
 1070                         case MSG_EXT_SDTR:
 1071                                 if (sc->sc_imess[1] != 3)
 1072                                         goto reject;
ti->period = sc->sc_imess[3];
ti->offset = sc->sc_imess[4];
ti->flags &= ~DO_SYNC;
 1076                                 if (ti->offset == 0) {
 1077                                 } else if (ti->period < sc->sc_minsync ||
ti->period > sc->sc_maxsync ||
ti->offset > 8) {
ti->period = ti->offset = 0;
aic_sched_msgout(sc, SEND_SDTR);
 1082                                 } else {
sc_print_addr(acb->xs->sc_link);
printf("sync, offset %d, ",
ti->offset);
printf("period %dnsec\n",
ti->period * 4);
 1088                                 }
aic_setsync(sc, ti);
 1090                                 break;
 1091 #endif
 1093 #if AIC_USE_WIDE
 1094                         case MSG_EXT_WDTR:
 1095                                 if (sc->sc_imess[1] != 2)
 1096                                         goto reject;
ti->width = sc->sc_imess[3];
ti->flags &= ~DO_WIDE;
 1099                                 if (ti->width == 0) {
 1100                                 } else if (ti->width > AIC_MAX_WIDTH) {
ti->width = 0;
aic_sched_msgout(sc, SEND_WDTR);
 1103                                 } else {
sc_print_addr(acb->xs->sc_link);
printf("wide, width %d\n",
 1106                                             1 << (3 + ti->width));
 1107                                 }
 1108                                 break;
 1109 #endif
 1111                         default:
printf("%s: unrecognized MESSAGE EXTENDED; ",
sc->sc_dev.dv_xname);
printf("sending REJECT\n");
AIC_BREAK();
 1116                                 goto reject;
 1117                         }
 1118                         break;
 1120                 default:
printf("%s: unrecognized MESSAGE; sending REJECT\n",
sc->sc_dev.dv_xname);
AIC_BREAK();
reject:
aic_sched_msgout(sc, SEND_REJECT);
 1126                         break;
 1127                 }
 1128                 break;
 1130         case AIC_RESELECTED:
 1131                 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
printf("%s: reselect without IDENTIFY; ",
sc->sc_dev.dv_xname);
printf("sending DEVICE RESET\n");
AIC_BREAK();
 1136                         goto reset;
 1137                 }
 1139                 (void) aic_reselect(sc, sc->sc_imess[0]);
 1140                 break;
 1142         default:
printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
sc->sc_dev.dv_xname);
AIC_BREAK();
reset:
aic_sched_msgout(sc, SEND_DEV_RESET);
 1148                 break;
 1150 #ifdef notdef
abort:
aic_sched_msgout(sc, SEND_ABORT);
 1153                 break;
 1154 #endif
 1155         }
bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN);
 1158         /* Ack the last message byte. */
 1159         (void) bus_space_read_1(iot, ioh, SCSIDAT);
bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
 1161         while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0)
 1162                 ;
 1164         /* Go get the next message, if any. */
 1165         goto nextmsg;
out:
AIC_MISC(("n=%d imess=0x%02x  ", n, sc->sc_imess[0]));
 1169 }
 1171 /*
 1172  * Send the highest priority, scheduled message.
 1173  */
 1174 void
aic_msgout(struct aic_softc *sc)
 1176 {
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
 1179 #if AIC_USE_SYNCHRONOUS
 1180         struct aic_tinfo *ti;
 1181 #endif
u_char sstat1;
 1183         int n;
AIC_TRACE(("aic_msgout  "));
 1187         /* Reset the FIFO. */
bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO);
 1189         /* Enable REQ/ACK protocol. */
bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN);
 1192         if (sc->sc_prevphase == PH_MSGOUT) {
 1193                 if (sc->sc_omp == sc->sc_omess) {
 1194                         /*
 1195                          * This is a retransmission.
 1196                          *
 1197                          * We get here if the target stayed in MESSAGE OUT
 1198                          * phase.  Section 5.1.9.2 of the SCSI 2 spec indicates
 1199                          * that all of the previously transmitted messages must
 1200                          * be sent again, in the same order.  Therefore, we
 1201                          * requeue all the previously transmitted messages, and
 1202                          * start again from the top.  Our simple priority
 1203                          * scheme keeps the messages in the right order.
 1204                          */
AIC_MISC(("retransmitting  "));
sc->sc_msgpriq |= sc->sc_msgoutq;
 1207                         /*
 1208                          * Set ATN.  If we're just sending a trivial 1-byte
 1209                          * message, we'll clear ATN later on anyway.
 1210                          */
bus_space_write_1(iot, ioh, SCSISIG, PH_MSGOUT | ATNO);
 1212                 } else {
 1213                         /* This is a continuation of the previous message. */
n = sc->sc_omp - sc->sc_omess;
 1215                         goto nextbyte;
 1216                 }
 1217         }
 1219         /* No messages transmitted so far. */
sc->sc_msgoutq = 0;
sc->sc_lastmsg = 0;
nextmsg:
 1224         /* Pick up highest priority message. */
sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
sc->sc_msgpriq &= ~sc->sc_currmsg;
sc->sc_msgoutq |= sc->sc_currmsg;
 1229         /* Build the outgoing message data. */
 1230         switch (sc->sc_currmsg) {
 1231         case SEND_IDENTIFY:
AIC_ASSERT(sc->sc_nexus != NULL);
sc->sc_omess[0] =
MSG_IDENTIFY(sc->sc_nexus->xs->sc_link->lun, 1);
n = 1;
 1236                 break;
 1238 #if AIC_USE_SYNCHRONOUS
 1239         case SEND_SDTR:
AIC_ASSERT(sc->sc_nexus != NULL);
ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->target];
sc->sc_omess[4] = MSG_EXTENDED;
sc->sc_omess[3] = 3;
sc->sc_omess[2] = MSG_EXT_SDTR;
sc->sc_omess[1] = ti->period >> 2;
sc->sc_omess[0] = ti->offset;
n = 5;
 1248                 break;
 1249 #endif
 1251 #if AIC_USE_WIDE
 1252         case SEND_WDTR:
AIC_ASSERT(sc->sc_nexus != NULL);
ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->target];
sc->sc_omess[3] = MSG_EXTENDED;
sc->sc_omess[2] = 2;
sc->sc_omess[1] = MSG_EXT_WDTR;
sc->sc_omess[0] = ti->width;
n = 4;
 1260                 break;
 1261 #endif
 1263         case SEND_DEV_RESET:
sc->sc_flags |= AIC_ABORTING;
sc->sc_omess[0] = MSG_BUS_DEV_RESET;
n = 1;
 1267                 break;
 1269         case SEND_REJECT:
sc->sc_omess[0] = MSG_MESSAGE_REJECT;
n = 1;
 1272                 break;
 1274         case SEND_PARITY_ERROR:
sc->sc_omess[0] = MSG_PARITY_ERROR;
n = 1;
 1277                 break;
 1279         case SEND_INIT_DET_ERR:
sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
n = 1;
 1282                 break;
 1284         case SEND_ABORT:
sc->sc_flags |= AIC_ABORTING;
sc->sc_omess[0] = MSG_ABORT;
n = 1;
 1288                 break;
 1290         default:
printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
sc->sc_dev.dv_xname);
AIC_BREAK();
sc->sc_omess[0] = MSG_NOOP;
n = 1;
 1296                 break;
 1297         }
sc->sc_omp = &sc->sc_omess[n];
nextbyte:
 1301         /* Send message bytes. */
 1302         for (;;) {
 1303                 for (;;) {
sstat1 = bus_space_read_1(iot, ioh, SSTAT1);
 1305                         if ((sstat1 & (REQINIT | PHASECHG | BUSFREE)) != 0)
 1306                                 break;
 1307                         /* Wait for REQINIT.  XXX Need timeout. */
 1308                 }
 1309                 if ((sstat1 & (PHASECHG | BUSFREE)) != 0) {
 1310                         /*
 1311                          * Target left MESSAGE OUT, possibly to reject
 1312                          * our message.
 1313                          *
 1314                          * If this is the last message being sent, then we
 1315                          * deassert ATN, since either the target is going to
 1316                          * ignore this message, or it's going to ask for a
 1317                          * retransmission via MESSAGE PARITY ERROR (in which
 1318                          * case we reassert ATN anyway).
 1319                          */
 1320                         if (sc->sc_msgpriq == 0)
bus_space_write_1(iot, ioh, CLRSINT1, CLRATNO);
 1322                         goto out;
 1323                 }
 1325                 /* Clear ATN before last byte if this is the last message. */
 1326                 if (n == 1 && sc->sc_msgpriq == 0)
bus_space_write_1(iot, ioh, CLRSINT1, CLRATNO);
 1328                 /* Send message byte. */
bus_space_write_1(iot, ioh, SCSIDAT, *--sc->sc_omp);
 1330                 --n;
 1331                 /* Keep track of the last message we've sent any bytes of. */
sc->sc_lastmsg = sc->sc_currmsg;
 1333                 /* Wait for ACK to be negated.  XXX Need timeout. */
 1334                 while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0)
 1335                         ;
 1337                 if (n == 0)
 1338                         break;
 1339         }
 1341         /* We get here only if the entire message has been transmitted. */
 1342         if (sc->sc_msgpriq != 0) {
 1343                 /* There are more outgoing messages. */
 1344                 goto nextmsg;
 1345         }
 1347         /*
 1348          * The last message has been transmitted.  We need to remember the last
 1349          * message transmitted (in case the target switches to MESSAGE IN phase
 1350          * and sends a MESSAGE REJECT), and the list of messages transmitted
 1351          * this time around (in case the target stays in MESSAGE OUT phase to
 1352          * request a retransmit).
 1353          */
out:
 1356         /* Disable REQ/ACK protocol. */
bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
 1358 }
 1360 /* aic_dataout_pio: perform a data transfer using the FIFO datapath in the aic6360
 1361  * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
 1362  * and ACK deasserted (i.e. waiting for a data byte).
 1363  * This new revision has been optimized (I tried) to make the common case fast,
 1364  * and the rarer cases (as a result) somewhat more complex.
 1365  */
 1366 int
aic_dataout_pio(struct aic_softc *sc, u_char *p, int n)
 1368 {
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
u_char dmastat = 0;
 1372         int out = 0;
 1373 #define DOUTAMOUNT 128          /* Full FIFO */
AIC_MISC(("%02x%02x  ", bus_space_read_1(iot, ioh, FIFOSTAT),
bus_space_read_1(iot, ioh, SSTAT2)));
 1378         /* Clear host FIFO and counter. */
bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO | WRITE);
 1380         /* Enable FIFOs. */
bus_space_write_1(iot, ioh, DMACNTRL0, ENDMA | DWORDPIO | WRITE);
bus_space_write_1(iot, ioh, SXFRCTL0, SCSIEN | DMAEN | CHEN);
 1384         /* Turn off ENREQINIT for now. */
bus_space_write_1(iot, ioh, SIMODE1,
ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENPHASECHG);
 1388         /* I have tried to make the main loop as tight as possible.  This
 1389          * means that some of the code following the loop is a bit more
 1390          * complex than otherwise.
 1391          */
 1392         while (n > 0) {
 1393                 for (;;) {
dmastat = bus_space_read_1(iot, ioh, DMASTAT);
 1395                         if ((dmastat & (DFIFOEMP | INTSTAT)) != 0)
 1396                                 break;
 1397                 }
 1399                 if ((dmastat & INTSTAT) != 0)
 1400                         goto phasechange;
 1402                 if (n >= DOUTAMOUNT) {
n -= DOUTAMOUNT;
out += DOUTAMOUNT;
 1406 #if AIC_USE_DWORDS
bus_space_write_multi_4(iot, ioh, DMADATALONG,
 1408                             (u_int32_t *)p, DOUTAMOUNT >> 2);
 1409 #else
bus_space_write_multi_2(iot, ioh, DMADATA,
 1411                             (u_int16_t *)p, DOUTAMOUNT >> 1);
 1412 #endif
p += DOUTAMOUNT;
 1415                 } else {
 1416                         int xfer;
xfer = n;
AIC_MISC(("%d> ", xfer));
n -= xfer;
out += xfer;
 1424 #if AIC_USE_DWORDS
 1425                         if (xfer >= 12) {
bus_space_write_multi_4(iot, ioh, DMADATALONG,
 1427                                     (u_int32_t *)p, xfer >> 2);
p += xfer & ~3;
xfer &= 3;
 1430                         }
 1431 #else
 1432                         if (xfer >= 8) {
bus_space_write_multi_2(iot, ioh,  DMADATA,
 1434                                     (u_int16_t *)p, xfer >> 1);
p += xfer & ~1;
xfer &= 1;
 1437                         }
 1438 #endif
 1440                         if (xfer > 0) {
bus_space_write_1(iot, ioh, DMACNTRL0,
ENDMA | B8MODE | WRITE);
bus_space_write_multi_1(iot, ioh,  DMADATA, p,
xfer);
p += xfer;
bus_space_write_1(iot, ioh, DMACNTRL0,
ENDMA | DWORDPIO | WRITE);
 1448                         }
 1449                 }
 1450         }
 1452         if (out == 0) {
bus_space_write_1(iot, ioh, SXFRCTL1, BITBUCKET);
 1454                 for (;;) {
 1455                         if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) !=
 1456                             0)
 1457                                 break;
 1458                 }
bus_space_write_1(iot, ioh, SXFRCTL1, 0);
AIC_MISC(("extra data  "));
 1461         } else {
 1462                 /* See the bytes off chip */
 1463                 for (;;) {
dmastat = bus_space_read_1(iot, ioh, DMASTAT);
 1465                         if ((dmastat & INTSTAT) != 0)
 1466                                 goto phasechange;
 1467                         if ((dmastat & DFIFOEMP) != 0 &&
 1468                             (bus_space_read_1(iot, ioh, SSTAT2) & SEMPTY) != 0)
 1469                                 break;
 1470                 }
 1471         }
phasechange:
 1474         if ((dmastat & INTSTAT) != 0) {
 1475                 /* Some sort of phase change. */
 1476                 int amount;
 1478                 /* Stop transfers, do some accounting */
amount = bus_space_read_1(iot, ioh, FIFOSTAT) +
 1480                     (bus_space_read_1(iot, ioh, SSTAT2) & 15);
 1481                 if (amount > 0) {
out -= amount;
bus_space_write_1(iot, ioh, DMACNTRL0,
RSTFIFO | WRITE);
bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRCH);
AIC_MISC(("+%d ", amount));
 1487                 }
 1488         }
 1490         /* Turn on ENREQINIT again. */
bus_space_write_1(iot, ioh, SIMODE1,
ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | ENPHASECHG);
 1494         /* Stop the FIFO data path. */
bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
bus_space_write_1(iot, ioh, DMACNTRL0, 0);
 1498         return out;
 1499 }
 1501 /* aic_datain_pio: perform data transfers using the FIFO datapath in the aic6360
 1502  * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
 1503  * and ACK deasserted (i.e. at least one byte is ready).
 1504  * For now, uses a pretty dumb algorithm, hangs around until all data has been
 1505  * transferred.  This, is OK for fast targets, but not so smart for slow
 1506  * targets which don't disconnect or for huge transfers.
 1507  */
 1508 int
aic_datain_pio(struct aic_softc *sc, u_char *p, int n)
 1510 {
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
u_char dmastat;
 1514         int in = 0;
 1515 #define DINAMOUNT 128           /* Full FIFO */
AIC_MISC(("%02x%02x  ", bus_space_read_1(iot, ioh, FIFOSTAT),
bus_space_read_1(iot, ioh, SSTAT2)));
 1520         /* Clear host FIFO and counter. */
bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO);
 1522         /* Enable FIFOs. */
bus_space_write_1(iot, ioh, DMACNTRL0, ENDMA | DWORDPIO);
bus_space_write_1(iot, ioh, SXFRCTL0, SCSIEN | DMAEN | CHEN);
 1526         /* Turn off ENREQINIT for now. */
bus_space_write_1(iot, ioh, SIMODE1,
ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENPHASECHG);
 1530         /* We leave this loop if one or more of the following is true:
 1531          * a) phase != PH_DATAIN && FIFOs are empty
 1532          * b) SCSIRSTI is set (a reset has occurred) or busfree is detected.
 1533          */
 1534         while (n > 0) {
 1535                 /* Wait for fifo half full or phase mismatch */
 1536                 for (;;) {
dmastat = bus_space_read_1(iot, ioh, DMASTAT);
 1538                         if ((dmastat & (DFIFOFULL | INTSTAT)) != 0)
 1539                                 break;
 1540                 }
 1542                 if ((dmastat & DFIFOFULL) != 0) {
n -= DINAMOUNT;
in += DINAMOUNT;
 1546 #if AIC_USE_DWORDS
bus_space_read_multi_4(iot, ioh, DMADATALONG,
 1548                             (u_int32_t *)p, DINAMOUNT >> 2);
 1549 #else
bus_space_read_multi_2(iot, ioh, DMADATA,
 1551                             (u_int16_t *)p, DINAMOUNT >> 1);
 1552 #endif
p += DINAMOUNT;
 1555                 } else {
 1556                         int xfer;
xfer = min(bus_space_read_1(iot, ioh, FIFOSTAT), n);
AIC_MISC((">%d ", xfer));
n -= xfer;
in += xfer;
 1564 #if AIC_USE_DWORDS
 1565                         if (xfer >= 12) {
bus_space_read_multi_4(iot, ioh, DMADATALONG,
 1567                                     (u_int32_t *)p, xfer >> 2);
p += xfer & ~3;
xfer &= 3;
 1570                         }
 1571 #else
 1572                         if (xfer >= 8) {
bus_space_read_multi_2(iot, ioh, DMADATA,
 1574                                     (u_int16_t *)p, xfer >> 1);
p += xfer & ~1;
xfer &= 1;
 1577                         }
 1578 #endif
 1580                         if (xfer > 0) {
bus_space_write_1(iot, ioh, DMACNTRL0,
ENDMA | B8MODE);
bus_space_read_multi_1(iot, ioh, DMADATA, p,
xfer);
p += xfer;
bus_space_write_1(iot, ioh, DMACNTRL0,
ENDMA | DWORDPIO);
 1588                         }
 1589                 }
 1591                 if ((dmastat & INTSTAT) != 0)
 1592                         goto phasechange;
 1593         }
 1595         /* Some SCSI-devices are rude enough to transfer more data than what
 1596          * was requested, e.g. 2048 bytes from a CD-ROM instead of the
 1597          * requested 512.  Test for progress, i.e. real transfers.  If no real
 1598          * transfers have been performed (n is probably already zero) and the
 1599          * FIFO is not empty, waste some bytes....
 1600          */
 1601         if (in == 0) {
bus_space_write_1(iot, ioh, SXFRCTL1, BITBUCKET);
 1603                 for (;;) {
 1604                         if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) !=
 1605                             0)
 1606                                 break;
 1607                 }
bus_space_write_1(iot, ioh, SXFRCTL1, 0);
AIC_MISC(("extra data  "));
 1610         }
phasechange:
 1613         /* Turn on ENREQINIT again. */
bus_space_write_1(iot, ioh, SIMODE1,
ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | ENPHASECHG);
 1617         /* Stop the FIFO data path. */
bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
bus_space_write_1(iot, ioh, DMACNTRL0, 0);
 1621         return in;
 1622 }
 1624 /*
 1625  * This is the workhorse routine of the driver.
 1626  * Deficiencies (for now):
 1627  * 1) always uses programmed I/O
 1628  */
 1629 int
aicintr(void *arg)
 1631 {
 1632         struct aic_softc *sc = arg;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
u_char sstat0, sstat1;
 1636         struct aic_acb *acb;
 1637         struct scsi_link *sc_link;
 1638         struct aic_tinfo *ti;
 1639         int n;
 1641         /*
 1642          * Clear INTEN.  We enable it again before returning.  This makes the
 1643          * interrupt esssentially level-triggered.
 1644          */
bus_space_write_1(iot, ioh, DMACNTRL0, 0);
AIC_TRACE(("aicintr  "));
loop:
 1650         /*
 1651          * First check for abnormal conditions, such as reset.
 1652          */
sstat1 = bus_space_read_1(iot, ioh, SSTAT1);
AIC_MISC(("sstat1:0x%02x ", sstat1));
 1656         if ((sstat1 & SCSIRSTI) != 0) {
printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
 1658                 goto reset;
 1659         }
 1661         /*
 1662          * Check for less serious errors.
 1663          */
 1664         if ((sstat1 & SCSIPERR) != 0) {
printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
bus_space_write_1(iot, ioh, CLRSINT1, CLRSCSIPERR);
 1667                 if (sc->sc_prevphase == PH_MSGIN) {
sc->sc_flags |= AIC_DROP_MSGIN;
aic_sched_msgout(sc, SEND_PARITY_ERROR);
 1670                 } else
aic_sched_msgout(sc, SEND_INIT_DET_ERR);
 1672         }
 1674         /*
 1675          * If we're not already busy doing something test for the following
 1676          * conditions:
 1677          * 1) We have been reselected by something
 1678          * 2) We have selected something successfully
 1679          * 3) Our selection process has timed out
 1680          * 4) This is really a bus free interrupt just to get a new command
 1681          *    going?
 1682          * 5) Spurious interrupt?
 1683          */
 1684         switch (sc->sc_state) {
 1685         case AIC_IDLE:
 1686         case AIC_SELECTING:
sstat0 = bus_space_read_1(iot, ioh, SSTAT0);
AIC_MISC(("sstat0:0x%02x ", sstat0));
 1690                 if ((sstat0 & TARGET) != 0) {
 1691                         /*
 1692                          * We don't currently support target mode.
 1693                          */
printf("%s: target mode selected; going to BUS FREE\n",
sc->sc_dev.dv_xname);
bus_space_write_1(iot, ioh, SCSISIG, 0);
 1698                         goto sched;
 1699                 } else if ((sstat0 & SELDI) != 0) {
AIC_MISC(("reselected  "));
 1702                         /*
 1703                          * If we're trying to select a target ourselves,
 1704                          * push our command back into the ready list.
 1705                          */
 1706                         if (sc->sc_state == AIC_SELECTING) {
AIC_MISC(("backoff selector  "));
AIC_ASSERT(sc->sc_nexus != NULL);
acb = sc->sc_nexus;
sc->sc_nexus = NULL;
TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
 1712                         }
 1714                         /* Save reselection ID. */
sc->sc_selid = bus_space_read_1(iot, ioh, SELID);
sc->sc_state = AIC_RESELECTED;
 1718                 } else if ((sstat0 & SELDO) != 0) {
AIC_MISC(("selected  "));
 1721                         /* We have selected a target. Things to do:
 1722                          * a) Determine what message(s) to send.
 1723                          * b) Verify that we're still selecting the target.
 1724                          * c) Mark device as busy.
 1725                          */
 1726                         if (sc->sc_state != AIC_SELECTING) {
printf("%s: selection out while idle; ",
sc->sc_dev.dv_xname);
printf("resetting\n");
AIC_BREAK();
 1731                                 goto reset;
 1732                         }
AIC_ASSERT(sc->sc_nexus != NULL);
acb = sc->sc_nexus;
sc_link = acb->xs->sc_link;
ti = &sc->sc_tinfo[sc_link->target];
sc->sc_msgpriq = SEND_IDENTIFY;
 1739                         if (acb->flags & ACB_RESET)
sc->sc_msgpriq |= SEND_DEV_RESET;
 1741                         else if (acb->flags & ACB_ABORT)
sc->sc_msgpriq |= SEND_ABORT;
 1743                         else {
 1744 #if AIC_USE_SYNCHRONOUS
 1745                                 if ((ti->flags & DO_SYNC) != 0)
sc->sc_msgpriq |= SEND_SDTR;
 1747 #endif
 1748 #if AIC_USE_WIDE
 1749                                 if ((ti->flags & DO_WIDE) != 0)
sc->sc_msgpriq |= SEND_WDTR;
 1751 #endif
 1752                         }
acb->flags |= ACB_NEXUS;
ti->lubusy |= (1 << sc_link->lun);
 1757                         /* Do an implicit RESTORE POINTERS. */
sc->sc_dp = acb->data_addr;
sc->sc_dleft = acb->data_length;
sc->sc_cp = (u_char *)&acb->scsi_cmd;
sc->sc_cleft = acb->scsi_cmd_length;
 1763                         /* On our first connection, schedule a timeout. */
 1764                         if ((acb->xs->flags & SCSI_POLL) == 0)
timeout_add(&acb->xs->stimeout,
 1766                                     (acb->timeout * hz) / 1000);
sc->sc_state = AIC_CONNECTED;
 1769                 } else if ((sstat1 & SELTO) != 0) {
AIC_MISC(("selection timeout  "));
 1772                         if (sc->sc_state != AIC_SELECTING) {
printf("%s: selection timeout while idle; ",
sc->sc_dev.dv_xname);
printf("resetting\n");
AIC_BREAK();
 1777                                 goto reset;
 1778                         }
AIC_ASSERT(sc->sc_nexus != NULL);
acb = sc->sc_nexus;
bus_space_write_1(iot, ioh, SXFRCTL1, 0);
bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI);
bus_space_write_1(iot, ioh, CLRSINT1, CLRSELTIMO);
delay(250);
acb->xs->error = XS_SELTIMEOUT;
 1788                         goto finish;
 1789                 } else {
 1790                         if (sc->sc_state != AIC_IDLE) {
printf("%s: BUS FREE while not idle; ",
sc->sc_dev.dv_xname);
printf("state=%d\n", sc->sc_state);
AIC_BREAK();
 1795                                 goto out;
 1796                         }
 1798                         goto sched;
 1799                 }
 1801                 /*
 1802                  * Turn off selection stuff, and prepare to catch bus free
 1803                  * interrupts, parity errors, and phase changes.
 1804                  */
bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRSTCNT | CLRCH);
bus_space_write_1(iot, ioh, SXFRCTL1, 0);
bus_space_write_1(iot, ioh, SCSISEQ, ENAUTOATNP);
bus_space_write_1(iot, ioh, CLRSINT0, CLRSELDI | CLRSELDO);
bus_space_write_1(iot, ioh, CLRSINT1,
CLRBUSFREE | CLRPHASECHG);
bus_space_write_1(iot, ioh, SIMODE0, 0);
bus_space_write_1(iot, ioh, SIMODE1,
ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT |
ENPHASECHG);
sc->sc_flags = 0;
sc->sc_prevphase = PH_INVALID;
 1818                 goto dophase;
 1819         }
 1821         if ((sstat1 & BUSFREE) != 0) {
 1822                 /* We've gone to BUS FREE phase. */
bus_space_write_1(iot, ioh, CLRSINT1,
CLRBUSFREE | CLRPHASECHG);
 1826                 switch (sc->sc_state) {
 1827                 case AIC_RESELECTED:
 1828                         goto sched;
 1830                 case AIC_CONNECTED:
AIC_ASSERT(sc->sc_nexus != NULL);
acb = sc->sc_nexus;
 1834 #if AIC_USE_SYNCHRONOUS + AIC_USE_WIDE
 1835                         if (sc->sc_prevphase == PH_MSGOUT) {
 1836                                 /*
 1837                                  * If the target went to BUS FREE phase during
 1838                                  * or immediately after sending a SDTR or WDTR
 1839                                  * message, disable negotiation.
 1840                                  */
sc_link = acb->xs->sc_link;
ti = &sc->sc_tinfo[sc_link->target];
 1843                                 switch (sc->sc_lastmsg) {
 1844 #if AIC_USE_SYNCHRONOUS
 1845                                 case SEND_SDTR:
ti->flags &= ~DO_SYNC;
ti->period = ti->offset = 0;
 1848                                         break;
 1849 #endif
 1850 #if AIC_USE_WIDE
 1851                                 case SEND_WDTR:
ti->flags &= ~DO_WIDE;
ti->width = 0;
 1854                                         break;
 1855 #endif
 1856                                 }
 1857                         }
 1858 #endif
 1860                         if ((sc->sc_flags & AIC_ABORTING) == 0) {
 1861                                 /*
 1862                                  * Section 5.1.1 of the SCSI 2 spec suggests
 1863                                  * issuing a REQUEST SENSE following an
 1864                                  * unexpected disconnect.  Some devices go into
 1865                                  * a contingent allegiance condition when
 1866                                  * disconnecting, and this is necessary to
 1867                                  * clean up their state.
 1868                                  */
printf("%s: unexpected disconnect; ",
sc->sc_dev.dv_xname);
printf("sending REQUEST SENSE\n");
AIC_BREAK();
aic_sense(sc, acb);
 1874                                 goto out;
 1875                         }
acb->xs->error = XS_DRIVER_STUFFUP;
 1878                         goto finish;
 1880                 case AIC_DISCONNECT:
AIC_ASSERT(sc->sc_nexus != NULL);
acb = sc->sc_nexus;
 1883 #if 1 /* XXXX */
acb->data_addr = sc->sc_dp;
acb->data_length = sc->sc_dleft;
 1886 #endif
TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
sc->sc_nexus = NULL;
 1889                         goto sched;
 1891                 case AIC_CMDCOMPLETE:
AIC_ASSERT(sc->sc_nexus != NULL);
acb = sc->sc_nexus;
 1894                         goto finish;
 1895                 }
 1896         }
bus_space_write_1(iot, ioh, CLRSINT1, CLRPHASECHG);
dophase:
 1901         if ((sstat1 & REQINIT) == 0) {
 1902                 /* Wait for REQINIT. */
 1903                 goto out;
 1904         }
sc->sc_phase = bus_space_read_1(iot, ioh, SCSISIG) & PH_MASK;
bus_space_write_1(iot, ioh, SCSISIG, sc->sc_phase);
 1909         switch (sc->sc_phase) {
 1910         case PH_MSGOUT:
 1911                 if (sc->sc_state != AIC_CONNECTED &&
sc->sc_state != AIC_RESELECTED)
 1913                         break;
aic_msgout(sc);
sc->sc_prevphase = PH_MSGOUT;
 1916                 goto loop;
 1918         case PH_MSGIN:
 1919                 if (sc->sc_state != AIC_CONNECTED &&
sc->sc_state != AIC_RESELECTED)
 1921                         break;
aic_msgin(sc);
sc->sc_prevphase = PH_MSGIN;
 1924                 goto loop;
 1926         case PH_CMD:
 1927                 if (sc->sc_state != AIC_CONNECTED)
 1928                         break;
 1929 #ifdef AIC_DEBUG
 1930                 if ((aic_debug & AIC_SHOWMISC) != 0) {
AIC_ASSERT(sc->sc_nexus != NULL);
acb = sc->sc_nexus;
printf("cmd=0x%02x+%d ",
acb->scsi_cmd.opcode, acb->scsi_cmd_length-1);
 1935                 }
 1936 #endif
n = aic_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
sc->sc_cp += n;
sc->sc_cleft -= n;
sc->sc_prevphase = PH_CMD;
 1941                 goto loop;
 1943         case PH_DATAOUT:
 1944                 if (sc->sc_state != AIC_CONNECTED)
 1945                         break;
AIC_MISC(("dataout dleft=%lu ", (u_long)sc->sc_dleft));
n = aic_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
sc->sc_dp += n;
sc->sc_dleft -= n;
sc->sc_prevphase = PH_DATAOUT;
 1951                 goto loop;
 1953         case PH_DATAIN:
 1954                 if (sc->sc_state != AIC_CONNECTED)
 1955                         break;
AIC_MISC(("datain %lu ", (u_long)sc->sc_dleft));
n = aic_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
sc->sc_dp += n;
sc->sc_dleft -= n;
sc->sc_prevphase = PH_DATAIN;
 1961                 goto loop;
 1963         case PH_STAT:
 1964                 if (sc->sc_state != AIC_CONNECTED)
 1965                         break;
AIC_ASSERT(sc->sc_nexus != NULL);
acb = sc->sc_nexus;
bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN);
acb->target_stat = bus_space_read_1(iot, ioh, SCSIDAT);
bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
AIC_MISC(("target_stat=0x%02x ", acb->target_stat));
sc->sc_prevphase = PH_STAT;
 1973                 goto loop;
 1974         }
printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname);
AIC_BREAK();
reset:
aic_init(sc);
 1980         return 1;
finish:
timeout_del(&acb->xs->stimeout);
aic_done(sc, acb);
 1985         goto out;
sched:
sc->sc_state = AIC_IDLE;
aic_sched(sc);
 1990         goto out;
out:
bus_space_write_1(iot, ioh, DMACNTRL0, INTEN);
 1994         return 1;
 1995 }
 1997 void
aic_abort(struct aic_softc *sc, struct aic_acb *acb)
 1999 {
 2001         /* 2 secs for the abort */
acb->timeout = AIC_ABORT_TIMEOUT;
acb->flags |= ACB_ABORT;
 2005         if (acb == sc->sc_nexus) {
 2006                 /*
 2007                  * If we're still selecting, the message will be scheduled
 2008                  * after selection is complete.
 2009                  */
 2010                 if (sc->sc_state == AIC_CONNECTED)
aic_sched_msgout(sc, SEND_ABORT);
 2012         } else {
aic_dequeue(sc, acb);
TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
 2015                 if (sc->sc_state == AIC_IDLE)
aic_sched(sc);
 2017         }
 2018 }
 2020 void
aic_timeout(void *arg)
 2022 {
 2023         struct aic_acb *acb = arg;
 2024         struct scsi_xfer *xs = acb->xs;
 2025         struct scsi_link *sc_link = xs->sc_link;
 2026         struct aic_softc *sc = sc_link->adapter_softc;
 2027         int s;
sc_print_addr(sc_link);
printf("timed out");
s = splbio();
 2034         if (acb->flags & ACB_ABORT) {
 2035                 /* abort timed out */
printf(" AGAIN\n");
 2037                 /* XXX Must reset! */
 2038         } else {
 2039                 /* abort the operation that has timed out */
printf("\n");
acb->xs->error = XS_TIMEOUT;
aic_abort(sc, acb);
 2043         }
splx(s);
 2046 }
 2048 #ifdef AIC_DEBUG
 2049 /*
 2050  * The following functions are mostly used for debugging purposes, either
 2051  * directly called from the driver or from the kernel debugger.
 2052  */
 2054 void
aic_show_scsi_cmd(struct aic_acb *acb)
 2056 {
u_char  *b = (u_char *)&acb->scsi_cmd;
 2058         struct scsi_link *sc_link = acb->xs->sc_link;
 2059         int i;
sc_print_addr(sc_link);
 2062         if ((acb->xs->flags & SCSI_RESET) == 0) {
 2063                 for (i = 0; i < acb->scsi_cmd_length; i++) {
 2064                         if (i)
printf(",");
printf("%x", b[i]);
 2067                 }
printf("\n");
 2069         } else
printf("RESET\n");
 2071 }
 2073 void
aic_print_acb(struct aic_acb *acb)
 2075 {
printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags);
printf(" dp=%p dleft=%d target_stat=%x\n",
acb->data_addr, acb->data_length, acb->target_stat);
aic_show_scsi_cmd(acb);
 2081 }
 2083 void
aic_print_active_acb(void)
 2085 {
 2086         struct aic_acb *acb;
 2087         struct aic_softc *sc = aic_cd.cd_devs[0];
printf("ready list:\n");
TAILQ_FOREACH(acb, &sc->ready_list, chain)
aic_print_acb(acb);
printf("nexus:\n");
 2093         if (sc->sc_nexus != NULL)
aic_print_acb(sc->sc_nexus);
printf("nexus list:\n");
TAILQ_FOREACH(acb, &sc->nexus_list, chain)
aic_print_acb(acb);
 2098 }
 2100 void
aic_dump6360(struct aic_softc *sc)
 2102 {
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
printf("aic6360: SCSISEQ=%x SXFRCTL0=%x SXFRCTL1=%x SCSISIG=%x\n",
bus_space_read_1(iot, ioh, SCSISEQ),
bus_space_read_1(iot, ioh, SXFRCTL0),
bus_space_read_1(iot, ioh, SXFRCTL1),
bus_space_read_1(iot, ioh, SCSISIG));
printf("         SSTAT0=%x SSTAT1=%x SSTAT2=%x SSTAT3=%x SSTAT4=%x\n",
bus_space_read_1(iot, ioh, SSTAT0),
bus_space_read_1(iot, ioh, SSTAT1),
bus_space_read_1(iot, ioh, SSTAT2),
bus_space_read_1(iot, ioh, SSTAT3),
bus_space_read_1(iot, ioh, SSTAT4));
printf("         SIMODE0=%x SIMODE1=%x ",
bus_space_read_1(iot, ioh, SIMODE0),
bus_space_read_1(iot, ioh, SIMODE1));
printf("DMACNTRL0=%x DMACNTRL1=%x DMASTAT=%x\n",
bus_space_read_1(iot, ioh, DMACNTRL0),
bus_space_read_1(iot, ioh, DMACNTRL1),
bus_space_read_1(iot, ioh, DMASTAT));
printf("         FIFOSTAT=%d SCSIBUS=0x%x\n",
bus_space_read_1(iot, ioh, FIFOSTAT),
bus_space_read_1(iot, ioh, SCSIBUS));
 2127 }
 2129 void
aic_dump_driver(struct aic_softc *sc)
 2131 {
 2132         struct aic_tinfo *ti;
 2133         int i;
printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
printf("state=%x msgin=%x ", sc->sc_state, sc->sc_imess[0]);
printf("msgpriq=%x msgoutq=%x lastmsg=%x currmsg=%x\n", sc->sc_msgpriq,
sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
 2139         for (i = 0; i < 7; i++) {
ti = &sc->sc_tinfo[i];
printf("tinfo%d: %d cmds %d disconnects %d timeouts",
i, ti->cmds, ti->dconns, ti->touts);
printf(" %d senses flags=%x\n", ti->senses, ti->flags);
 2144         }
 2145 }
 2146 #endif