ofs 136 arch/i386/pci/opti82c700.c opti82c700_addr(int link, int *addrofs, int *ofs)
ofs 151 arch/i386/pci/opti82c700.c *ofs = (regofs & 3) << 3;
ofs 160 arch/i386/pci/opti82c700.c *ofs = regofs << 2;
ofs 204 arch/i386/pci/opti82c700.c int val, addrofs, ofs;
ofs 206 arch/i386/pci/opti82c700.c if (opti82c700_addr(clink, &addrofs, &ofs))
ofs 210 arch/i386/pci/opti82c700.c val = (reg >> ofs) & FIRESTAR_CFG_PIRQ_MASK;
ofs 222 arch/i386/pci/opti82c700.c int addrofs, ofs;
ofs 228 arch/i386/pci/opti82c700.c if (opti82c700_addr(clink, &addrofs, &ofs))
ofs 232 arch/i386/pci/opti82c700.c reg &= ~(FIRESTAR_CFG_PIRQ_MASK << ofs);
ofs 233 arch/i386/pci/opti82c700.c reg |= (irq << ofs);
ofs 243 arch/i386/pci/opti82c700.c int i, val, addrofs, ofs;
ofs 257 arch/i386/pci/opti82c700.c i), &addrofs, &ofs);
ofs 259 arch/i386/pci/opti82c700.c val = (reg >> ofs) & FIRESTAR_CFG_PIRQ_MASK;
ofs 262 arch/i386/pci/opti82c700.c val = ((reg >> ofs) >> FIRESTAR_TRIGGER_SHIFT) &
ofs 273 arch/i386/pci/opti82c700.c i), &addrofs, &ofs);
ofs 275 arch/i386/pci/opti82c700.c val = (reg >> ofs) & FIRESTAR_CFG_PIRQ_MASK;
ofs 289 arch/i386/pci/opti82c700.c int i, val, addrofs, ofs;
ofs 302 arch/i386/pci/opti82c700.c i), &addrofs, &ofs);
ofs 304 arch/i386/pci/opti82c700.c val = (reg >> ofs) & FIRESTAR_CFG_PIRQ_MASK;
ofs 309 arch/i386/pci/opti82c700.c (FIRESTAR_TRIGGER_SHIFT + ofs));
ofs 312 arch/i386/pci/opti82c700.c (FIRESTAR_TRIGGER_SHIFT + ofs));
ofs 322 arch/i386/pci/opti82c700.c i), &addrofs, &ofs);
ofs 324 arch/i386/pci/opti82c700.c val = (reg >> ofs) & FIRESTAR_CFG_PIRQ_MASK;
ofs 65 arch/i386/pci/opti82c700reg.h #define FIRESTAR_PIR_MAKELINK(src, ofs) \
ofs 67 arch/i386/pci/opti82c700reg.h ((ofs) << FIRESTAR_PIR_REGOFS_SHIFT))
ofs 779 dev/cardbus/cardbus.c unsigned int ofs;
ofs 785 dev/cardbus/cardbus.c ofs = PCI_CAPLIST_PTR(cardbus_conf_read(cc, cf, tag,
ofs 787 dev/cardbus/cardbus.c while (ofs != 0) {
ofs 789 dev/cardbus/cardbus.c if ((ofs & 3) || (ofs < 0x40))
ofs 790 dev/cardbus/cardbus.c panic("cardbus_get_capability 0x%x", ofs);
ofs 792 dev/cardbus/cardbus.c reg = cardbus_conf_read(cc, cf, tag, ofs);
ofs 795 dev/cardbus/cardbus.c *offset = ofs;
ofs 800 dev/cardbus/cardbus.c ofs = PCI_CAPLIST_NEXT(reg);
ofs 131 dev/ic/ac97.c u_int8_t ofs:4;
ofs 644 dev/ic/ac97.c si->ofs = 15;
ofs 891 dev/ic/ac97.c newval = (cp->un.ord << si->ofs);
ofs 893 dev/ic/ac97.c newval |= (newval << (8 + si->ofs));
ofs 932 dev/ic/ac97.c newval = ((l & mask) << si->ofs);
ofs 934 dev/ic/ac97.c newval |= ((r & mask) << (si->ofs + 8));
ofs 944 dev/ic/ac97.c mask = mask << si->ofs;
ofs 990 dev/ic/ac97.c cp->un.ord = (val >> si->ofs) & mask;
ofs 991 dev/ic/ac97.c DPRINTFN(4, ("AUDIO_MIXER_ENUM: %x %d %x %d\n", val, si->ofs,
ofs 1004 dev/ic/ac97.c l = r = (val >> si->ofs) & mask;
ofs 1007 dev/ic/ac97.c l = (val >> si->ofs) & mask;
ofs 1008 dev/ic/ac97.c r = (val >> (si->ofs + 8)) & mask;
ofs 1010 dev/ic/ac97.c r = (val >> si->ofs) & mask;
ofs 1011 dev/ic/ac97.c l = (val >> (si->ofs + 8)) & mask;
ofs 1123 dev/ic/ac97.c as->source_info[i].ofs = 7;
ofs 2170 dev/ic/atw.c atw_write_sram(struct atw_softc *sc, u_int ofs, u_int8_t *buf, u_int buflen)
ofs 2175 dev/ic/atw.c memcpy(&sc->sc_sram[ofs], buf, buflen);
ofs 2177 dev/ic/atw.c KASSERT(ofs % 2 == 0 && buflen % 2 == 0);
ofs 2179 dev/ic/atw.c KASSERT(buflen + ofs <= sc->sc_sramlen);
ofs 2181 dev/ic/atw.c ptr = &sc->sc_sram[ofs];
ofs 2185 dev/ic/atw.c LSHIFT((ofs + i) / 2, ATW_WEPCTL_TBLADD_MASK));
ofs 2197 dev/ic/atw.c sc->sc_dev.dv_xname, buflen, ofs, sc->sc_wepctl);
ofs 2558 dev/ic/rtw.c bus_size_t ofs;
ofs 2574 dev/ic/rtw.c ofs = RTW_PSR;
ofs 2582 dev/ic/rtw.c ofs = RTW_9346CR;
ofs 2591 dev/ic/rtw.c val = RTW_READ8(regs, ofs);
ofs 2594 dev/ic/rtw.c (u_int *)ofs));
ofs 2597 dev/ic/rtw.c RTW_WRITE8(regs, ofs, val);
ofs 2600 dev/ic/rtw.c (u_int *)ofs));
ofs 2601 dev/ic/rtw.c RTW_SYNC(regs, ofs, ofs);
ofs 3749 dev/ic/rtw.c u_int ndesc, bus_addr_t ofs, bus_addr_t physbase)
ofs 3754 dev/ic/rtw.c tdb->tdb_ofs = ofs;
ofs 1122 dev/ic/rtwreg.h #define RTW_READ8(regs, ofs) \
ofs 1123 dev/ic/rtwreg.h ((*(regs)->r_read8)(regs, ofs))
ofs 1125 dev/ic/rtwreg.h #define RTW_READ16(regs, ofs) \
ofs 1126 dev/ic/rtwreg.h ((*(regs)->r_read16)(regs, ofs))
ofs 1128 dev/ic/rtwreg.h #define RTW_READ(regs, ofs) \
ofs 1129 dev/ic/rtwreg.h ((*(regs)->r_read32)(regs, ofs))
ofs 1131 dev/ic/rtwreg.h #define RTW_WRITE8(regs, ofs, val) \
ofs 1132 dev/ic/rtwreg.h ((*(regs)->r_write8)(regs, ofs, val))
ofs 1134 dev/ic/rtwreg.h #define RTW_WRITE16(regs, ofs, val) \
ofs 1135 dev/ic/rtwreg.h ((*(regs)->r_write16)(regs, ofs, val))
ofs 1137 dev/ic/rtwreg.h #define RTW_WRITE(regs, ofs, val) \
ofs 1138 dev/ic/rtwreg.h ((*(regs)->r_write32)(regs, ofs, val))
ofs 141 dev/ic/rtwvar.h #define RTW_SR_GET(sr, ofs) \
ofs 142 dev/ic/rtwvar.h (((sr)->sr_content[(ofs)/2] >> (((ofs) % 2 == 0) ? 0 : 8)) & 0xff)
ofs 144 dev/ic/rtwvar.h #define RTW_SR_GET16(sr, ofs) \
ofs 145 dev/ic/rtwvar.h (RTW_SR_GET((sr), (ofs)) | (RTW_SR_GET((sr), (ofs) + 1) << 8))
ofs 394 dev/pci/neo.c int ofs, sz, i;
ofs 412 dev/pci/neo.c ofs = 0;
ofs 414 dev/pci/neo.c ofs+= nf->coefficientSizes[num];
ofs 416 dev/pci/neo.c nm_wrbuf(sc, sc->cbuf + i, nf->coefficients[ofs + i], 1);
ofs 508 dev/pci/neo.c u_int32_t ofs, i;
ofs 536 dev/pci/neo.c ofs = sc->buftop - 0x0400;
ofs 539 dev/pci/neo.c if ((nm_rdbuf(sc, ofs, 4) & NM_SIG_MASK) == NM_SIGNATURE) {
ofs 540 dev/pci/neo.c i = nm_rdbuf(sc, ofs + 4, 4);
ofs 356 dev/pci/pci.c unsigned int ofs;
ofs 366 dev/pci/pci.c ofs = PCI_CAPLISTPTR_REG;
ofs 369 dev/pci/pci.c ofs = PCI_CARDBUS_CAPLISTPTR_REG;
ofs 375 dev/pci/pci.c ofs = PCI_CAPLIST_PTR(pci_conf_read(pc, tag, ofs));
ofs 376 dev/pci/pci.c while (ofs != 0) {
ofs 378 dev/pci/pci.c if ((ofs & 3) || (ofs < 0x40))
ofs 381 dev/pci/pci.c reg = pci_conf_read(pc, tag, ofs);
ofs 384 dev/pci/pci.c *offset = ofs;
ofs 389 dev/pci/pci.c ofs = PCI_CAPLIST_NEXT(reg);
ofs 97 msdosfs/msdosfs_fat.c fatblock(pmp, ofs, bnp, sizep, bop)
ofs 99 msdosfs/msdosfs_fat.c uint32_t ofs;
ofs 106 msdosfs/msdosfs_fat.c bn = ofs / pmp->pm_fatblocksize * pmp->pm_fatblocksec;
ofs 115 msdosfs/msdosfs_fat.c *bop = ofs % pmp->pm_fatblocksize;