pin 214 arch/i386/i386/ioapic.c ioapic_print_redir(struct ioapic_softc *sc, char *why, int pin)
pin 216 arch/i386/i386/ioapic.c u_int32_t redirlo = ioapic_read(sc, IOAPIC_REDLO(pin));
pin 217 arch/i386/i386/ioapic.c u_int32_t redirhi = ioapic_read(sc, IOAPIC_REDHI(pin));
pin 219 arch/i386/i386/ioapic.c apic_format_redir(sc->sc_dev.dv_xname, why, pin, redirhi, redirlo);
pin 396 arch/i386/i386/ioapic.c apic_set_redir(struct ioapic_softc *sc, int pin)
pin 405 arch/i386/i386/ioapic.c pp = &sc->sc_pins[pin];
pin 445 arch/i386/i386/ioapic.c ioapic_write(sc, IOAPIC_REDLO(pin), IOAPIC_REDLO_MASK);
pin 446 arch/i386/i386/ioapic.c ioapic_write(sc, IOAPIC_REDHI(pin), redhi);
pin 447 arch/i386/i386/ioapic.c ioapic_write(sc, IOAPIC_REDLO(pin), redlo);
pin 449 arch/i386/i386/ioapic.c ioapic_print_redir(sc, "int", pin);
pin 477 arch/i386/i386/ioapic.c apic_vectorset(struct ioapic_softc *sc, int pin, int minlevel, int maxlevel)
pin 479 arch/i386/i386/ioapic.c struct ioapic_pin *pp = &sc->sc_pins[pin];
pin 494 arch/i386/i386/ioapic.c "(%x..%x)\n", sc->sc_dev.dv_xname, pin,
pin 514 arch/i386/i386/ioapic.c sc->sc_dev.dv_xname, pin, maxlevel);
pin 547 arch/i386/i386/ioapic.c apic_set_redir(sc, pin);
pin 632 arch/i386/i386/ioapic.c struct ioapic_pin *pin;
pin 652 arch/i386/i386/ioapic.c pin = &sc->sc_pins[intr];
pin 653 arch/i386/i386/ioapic.c switch (pin->ip_type) {
pin 655 arch/i386/i386/ioapic.c pin->ip_type = type;
pin 659 arch/i386/i386/ioapic.c if (type == pin->ip_type)
pin 679 arch/i386/i386/ioapic.c for (p = &pin->ip_handler; (q = *p) != NULL; p = &q->ih_next) {
pin 715 arch/i386/i386/ioapic.c evcount_attach(&ih->ih_count, ih_what, (void *)&pin->ip_vector,
pin 746 arch/i386/i386/ioapic.c struct ioapic_pin *pin = &sc->sc_pins[intr];
pin 762 arch/i386/i386/ioapic.c for (p = &pin->ip_handler; (q = *p) != NULL && q != ih;
pin 1045 arch/i386/i386/mpbios.c u_int32_t pin = entry->dst_apic_int;
pin 1071 arch/i386/i386/mpbios.c ((id << APIC_INT_APIC_SHIFT) | ((pin << APIC_INT_PIN_SHIFT)));
pin 1078 arch/i386/i386/mpbios.c bus, id, pin);
pin 1096 arch/i386/i386/mpbios.c if (pin >= sc->sc_apic_sz) {
pin 1097 arch/i386/i386/mpbios.c sc2 = ioapic_find_bybase(pin);
pin 1100 arch/i386/i386/mpbios.c pin, id);
pin 1104 arch/i386/i386/mpbios.c "assuming ACPI global int value\n", pin, id);
pin 1105 arch/i386/i386/mpbios.c pin -= sc->sc_apic_vecbase;
pin 1109 arch/i386/i386/mpbios.c mpi->ioapic_pin = pin;
pin 1111 arch/i386/i386/mpbios.c altmpi = sc->sc_pins[pin].ip_map;
pin 1118 arch/i386/i386/mpbios.c sc->sc_dev.dv_xname, pin);
pin 1121 arch/i386/i386/mpbios.c sc->sc_pins[pin].ip_map = mpi;
pin 1124 arch/i386/i386/mpbios.c if (pin >= 2)
pin 1125 arch/i386/i386/mpbios.c printf("pin %d of local apic doesn't exist!\n", pin);
pin 1128 arch/i386/i386/mpbios.c mpi->ioapic_pin = pin;
pin 1135 arch/i386/i386/mpbios.c sc ? sc->sc_dev.dv_xname : "local apic", pin,
pin 86 arch/i386/i386/mpbios_intr_fixup.c int bus, pin;
pin 91 arch/i386/i386/mpbios_intr_fixup.c pin = (reg & NFORCE4_USB2_MASK) >> NFORCE4_USB2_SHIFT;
pin 92 arch/i386/i386/mpbios_intr_fixup.c if (pin != 0)
pin 93 arch/i386/i386/mpbios_intr_fixup.c mpbios_pin_fixup(bus, 2, PCI_INTERRUPT_PIN_B, pin);
pin 94 arch/i386/i386/mpbios_intr_fixup.c pin = (reg & NFORCE4_SATA1_MASK) >> NFORCE4_SATA1_SHIFT;
pin 95 arch/i386/i386/mpbios_intr_fixup.c if (pin != 0)
pin 96 arch/i386/i386/mpbios_intr_fixup.c mpbios_pin_fixup(bus, 7, PCI_INTERRUPT_PIN_A, pin);
pin 97 arch/i386/i386/mpbios_intr_fixup.c pin = (reg & NFORCE4_SATA2_MASK) >> NFORCE4_SATA2_SHIFT;
pin 98 arch/i386/i386/mpbios_intr_fixup.c if (pin != 0)
pin 99 arch/i386/i386/mpbios_intr_fixup.c mpbios_pin_fixup(bus, 8, PCI_INTERRUPT_PIN_A, pin);
pin 102 arch/i386/i386/mpbios_intr_fixup.c pin = (reg & NFORCE4_USB1_MASK) >> NFORCE4_USB1_SHIFT;
pin 103 arch/i386/i386/mpbios_intr_fixup.c if (pin != 0)
pin 104 arch/i386/i386/mpbios_intr_fixup.c mpbios_pin_fixup(bus, 2, PCI_INTERRUPT_PIN_A, pin);
pin 105 arch/i386/i386/mpbios_intr_fixup.c pin = (reg & NFORCE4_LAN_MASK) >> NFORCE4_LAN_SHIFT;
pin 106 arch/i386/i386/mpbios_intr_fixup.c if (pin != 0)
pin 107 arch/i386/i386/mpbios_intr_fixup.c mpbios_pin_fixup(bus, 10, PCI_INTERRUPT_PIN_A, pin);
pin 118 arch/i386/i386/mpbios_intr_fixup.c int bus, pin;
pin 123 arch/i386/i386/mpbios_intr_fixup.c pin = (reg & NFORCE4_SATA1_MASK) >> NFORCE4_SATA1_SHIFT;
pin 124 arch/i386/i386/mpbios_intr_fixup.c if (pin != 0)
pin 125 arch/i386/i386/mpbios_intr_fixup.c mpbios_pin_fixup(bus, 16, PCI_INTERRUPT_PIN_A, pin);
pin 126 arch/i386/i386/mpbios_intr_fixup.c pin = (reg & NFORCE4_SATA2_MASK) >> NFORCE4_SATA2_SHIFT;
pin 127 arch/i386/i386/mpbios_intr_fixup.c if (pin != 0)
pin 128 arch/i386/i386/mpbios_intr_fixup.c mpbios_pin_fixup(bus, 17, PCI_INTERRUPT_PIN_A, pin);
pin 147 arch/i386/i386/mpbios_intr_fixup.c mpbios_pin_fixup(int bus, int dev, int rawpin, int pin)
pin 154 arch/i386/i386/mpbios_intr_fixup.c mip->ioapic_pin != pin) {
pin 160 arch/i386/i386/mpbios_intr_fixup.c pin, mpb->mb_name);
pin 170 arch/i386/i386/mpbios_intr_fixup.c mip->ioapic_pin = pin;
pin 172 arch/i386/i386/mpbios_intr_fixup.c mip->ioapic_ih |= (pin << APIC_INT_PIN_SHIFT);
pin 173 arch/i386/i386/mpbios_intr_fixup.c if (mip->ioapic->sc_pins[pin].ip_map == NULL)
pin 174 arch/i386/i386/mpbios_intr_fixup.c mip->ioapic->sc_pins[pin].ip_map = mip;
pin 89 arch/i386/include/i82093reg.h #define IOAPIC_REDHI(pin) (0x11 + ((pin)<<1))
pin 90 arch/i386/include/i82093reg.h #define IOAPIC_REDLO(pin) (0x10 + ((pin)<<1))
pin 133 arch/i386/pci/elan520.c int pin, reg, shift;
pin 175 arch/i386/pci/elan520.c for (pin = 0; pin < ELANSC_PIO_NPINS; pin++) {
pin 176 arch/i386/pci/elan520.c sc->sc_gpio_pins[pin].pin_num = pin;
pin 177 arch/i386/pci/elan520.c sc->sc_gpio_pins[pin].pin_caps = GPIO_PIN_INPUT |
pin 181 arch/i386/pci/elan520.c reg = (pin < 16 ? MMCR_PIODIR15_0 : MMCR_PIODIR31_16);
pin 182 arch/i386/pci/elan520.c shift = pin % 16;
pin 185 arch/i386/pci/elan520.c sc->sc_gpio_pins[pin].pin_flags = GPIO_PIN_INPUT;
pin 187 arch/i386/pci/elan520.c sc->sc_gpio_pins[pin].pin_flags = GPIO_PIN_OUTPUT;
pin 188 arch/i386/pci/elan520.c if (elansc_gpio_pin_read(sc, pin) == 0)
pin 189 arch/i386/pci/elan520.c sc->sc_gpio_pins[pin].pin_state = GPIO_PIN_LOW;
pin 191 arch/i386/pci/elan520.c sc->sc_gpio_pins[pin].pin_state = GPIO_PIN_HIGH;
pin 374 arch/i386/pci/elan520.c elansc_gpio_pin_read(void *arg, int pin)
pin 380 arch/i386/pci/elan520.c reg = (pin < 16 ? MMCR_PIODATA15_0 : MMCR_PIODATA31_16);
pin 381 arch/i386/pci/elan520.c shift = pin % 16;
pin 388 arch/i386/pci/elan520.c elansc_gpio_pin_write(void *arg, int pin, int value)
pin 394 arch/i386/pci/elan520.c reg = (pin < 16 ? MMCR_PIODATA15_0 : MMCR_PIODATA31_16);
pin 395 arch/i386/pci/elan520.c shift = pin % 16;
pin 406 arch/i386/pci/elan520.c elansc_gpio_pin_ctl(void *arg, int pin, int flags)
pin 412 arch/i386/pci/elan520.c reg = (pin < 16 ? MMCR_PIODIR15_0 : MMCR_PIODIR31_16);
pin 413 arch/i386/pci/elan520.c shift = pin % 16;
pin 147 arch/i386/pci/gscpcib.c gscpcib_gpio_pin_select(struct gscpcib_softc *sc, int pin)
pin 149 arch/i386/pci/gscpcib.c bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GSCGPIO_SEL, pin);
pin 153 arch/i386/pci/gscpcib.c gscpcib_gpio_pin_read(void *arg, int pin)
pin 159 arch/i386/pci/gscpcib.c reg = (pin < 32 ? GSCGPIO_GPDI0 : GSCGPIO_GPDI1);
pin 160 arch/i386/pci/gscpcib.c shift = pin % 32;
pin 167 arch/i386/pci/gscpcib.c gscpcib_gpio_pin_write(void *arg, int pin, int value)
pin 173 arch/i386/pci/gscpcib.c reg = (pin < 32 ? GSCGPIO_GPDO0 : GSCGPIO_GPDO1);
pin 174 arch/i386/pci/gscpcib.c shift = pin % 32;
pin 185 arch/i386/pci/gscpcib.c gscpcib_gpio_pin_ctl(void *arg, int pin, int flags)
pin 190 arch/i386/pci/gscpcib.c gscpcib_gpio_pin_select(sc, pin);
pin 269 arch/i386/pci/pci_intr_fixup.c pciintr_link_alloc(pci_chipset_tag_t pc, struct pcibios_intr_routing *pir, int pin)
pin 271 arch/i386/pci/pci_intr_fixup.c int link = pir->linkmap[pin].link, clink, irq;
pin 315 arch/i386/pci/pci_intr_fixup.c l->bitmap = pir->linkmap[pin].bitmap;
pin 371 arch/i386/pci/pci_intr_fixup.c int entry, pin, link;
pin 385 arch/i386/pci/pci_intr_fixup.c for (pin = 0; pin < PCI_INTERRUPT_PIN_MAX; pin++) {
pin 386 arch/i386/pci/pci_intr_fixup.c if ((link = pir->linkmap[pin].link) == 0)
pin 397 arch/i386/pci/pci_intr_fixup.c pciintr_link_alloc(pc, pir, pin);
pin 398 arch/i386/pci/pci_intr_fixup.c else if (pir->linkmap[pin].bitmap != l->bitmap) {
pin 407 arch/i386/pci/pci_intr_fixup.c pir->linkmap[pin].bitmap, l->bitmap));
pin 409 arch/i386/pci/pci_intr_fixup.c l->bitmap &= pir->linkmap[pin].bitmap;
pin 668 arch/i386/pci/pci_intr_fixup.c (link = pir->linkmap[ihp->pin - 1].link) == 0) {
pin 682 arch/i386/pci/pci_intr_fixup.c link, bus, device, function, '@' + ihp->pin);
pin 724 arch/i386/pci/pci_intr_fixup.c PCI_VENDOR(id), PCI_PRODUCT(id), '@' + ihp->pin, l->clink,
pin 413 arch/i386/pci/pci_machdep.c int pin = pa->pa_intrpin;
pin 426 arch/i386/pci/pci_machdep.c if (pin == 0) {
pin 431 arch/i386/pci/pci_machdep.c if (pin > PCI_INTERRUPT_PIN_MAX) {
pin 432 arch/i386/pci/pci_machdep.c printf("pci_intr_map: bad interrupt pin %d\n", pin);
pin 437 arch/i386/pci/pci_machdep.c ihp->pin = pin;
pin 448 arch/i386/pci/pci_machdep.c int mpspec_pin = (dev<<2)|(pin-1);
pin 458 arch/i386/pci/pci_machdep.c int pin = PPB_INTERRUPT_SWIZZLE(rawpin, dev);
pin 459 arch/i386/pci/pci_machdep.c if (pa->pa_bridgeih[pin - 1].line != -1) {
pin 460 arch/i386/pci/pci_machdep.c ihp->line = pa->pa_bridgeih[pin - 1].line;
pin 526 arch/i386/pci/pci_machdep.c bus, dev, func, pin, line);
pin 69 arch/i386/pci/pci_machdep.h int line, pin;
pin 134 dev/acpi/acpimadt.c int pin;
pin 237 dev/acpi/acpimadt.c pin = entry->madt_override.global_int;
pin 238 dev/acpi/acpimadt.c apic = ioapic_find_bybase(pin);
pin 246 dev/acpi/acpimadt.c map->ioapic_pin = pin - apic->sc_apic_vecbase;
pin 256 dev/acpi/acpimadt.c (pin << APIC_INT_PIN_SHIFT));
pin 258 dev/acpi/acpimadt.c apic->sc_pins[pin].ip_map = map;
pin 270 dev/acpi/acpimadt.c pin = entry->madt_lapic_nmi.local_apic_lint;
pin 275 dev/acpi/acpimadt.c map->ioapic_pin = pin;
pin 291 dev/acpi/acpimadt.c for (pin = 0; pin < ICU_LEN; pin++) {
pin 292 dev/acpi/acpimadt.c apic = ioapic_find_bybase(pin);
pin 293 dev/acpi/acpimadt.c if (apic->sc_pins[pin].ip_map != NULL)
pin 302 dev/acpi/acpimadt.c map->ioapic_pin = pin;
pin 303 dev/acpi/acpimadt.c map->bus_pin = pin;
pin 311 dev/acpi/acpimadt.c (pin << APIC_INT_PIN_SHIFT));
pin 313 dev/acpi/acpimadt.c apic->sc_pins[pin].ip_map = map;
pin 146 dev/acpi/acpiprt.c int pin, irq, sta;
pin 162 dev/acpi/acpiprt.c pin = aml_val2int(v->v_package[1]);
pin 163 dev/acpi/acpiprt.c if (pin > 3) {
pin 206 dev/acpi/acpiprt.c DEVNAME(sc), aml_nodename(pp->node), addr, pin, irq);
pin 224 dev/acpi/acpiprt.c map->bus_pin = ((addr >> 14) & 0x7c) | (pin & 0x3);
pin 254 dev/acpi/acpiprt.c if (PCI_INTERRUPT_PIN(reg) == pin + 1) {
pin 154 dev/gpio/gpio.c int npins, pin, i;
pin 162 dev/gpio/gpio.c pin = offset + i;
pin 163 dev/gpio/gpio.c if (pin < 0 || pin >= sc->sc_npins)
pin 165 dev/gpio/gpio.c if (sc->sc_pins[pin].pin_mapped)
pin 167 dev/gpio/gpio.c sc->sc_pins[pin].pin_mapped = 1;
pin 168 dev/gpio/gpio.c map->pm_map[npins++] = pin;
pin 179 dev/gpio/gpio.c int pin, i;
pin 182 dev/gpio/gpio.c pin = map->pm_map[i];
pin 183 dev/gpio/gpio.c sc->sc_pins[pin].pin_mapped = 0;
pin 188 dev/gpio/gpio.c gpio_pin_read(void *gpio, struct gpio_pinmap *map, int pin)
pin 192 dev/gpio/gpio.c return (gpiobus_pin_read(sc->sc_gc, map->pm_map[pin]));
pin 196 dev/gpio/gpio.c gpio_pin_write(void *gpio, struct gpio_pinmap *map, int pin, int value)
pin 200 dev/gpio/gpio.c return (gpiobus_pin_write(sc->sc_gc, map->pm_map[pin], value));
pin 204 dev/gpio/gpio.c gpio_pin_ctl(void *gpio, struct gpio_pinmap *map, int pin, int flags)
pin 208 dev/gpio/gpio.c return (gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags));
pin 212 dev/gpio/gpio.c gpio_pin_caps(void *gpio, struct gpio_pinmap *map, int pin)
pin 216 dev/gpio/gpio.c return (sc->sc_pins[map->pm_map[pin]].pin_caps);
pin 266 dev/gpio/gpio.c int pin, value, flags;
pin 280 dev/gpio/gpio.c pin = op->gp_pin;
pin 281 dev/gpio/gpio.c if (pin < 0 || pin >= sc->sc_npins)
pin 285 dev/gpio/gpio.c op->gp_value = gpiobus_pin_read(gc, pin);
pin 293 dev/gpio/gpio.c pin = op->gp_pin;
pin 294 dev/gpio/gpio.c if (pin < 0 || pin >= sc->sc_npins)
pin 296 dev/gpio/gpio.c if (sc->sc_pins[pin].pin_mapped)
pin 303 dev/gpio/gpio.c gpiobus_pin_write(gc, pin, value);
pin 305 dev/gpio/gpio.c op->gp_value = sc->sc_pins[pin].pin_state;
pin 307 dev/gpio/gpio.c sc->sc_pins[pin].pin_state = value;
pin 315 dev/gpio/gpio.c pin = op->gp_pin;
pin 316 dev/gpio/gpio.c if (pin < 0 || pin >= sc->sc_npins)
pin 318 dev/gpio/gpio.c if (sc->sc_pins[pin].pin_mapped)
pin 321 dev/gpio/gpio.c value = (sc->sc_pins[pin].pin_state == GPIO_PIN_LOW ?
pin 323 dev/gpio/gpio.c gpiobus_pin_write(gc, pin, value);
pin 325 dev/gpio/gpio.c op->gp_value = sc->sc_pins[pin].pin_state;
pin 327 dev/gpio/gpio.c sc->sc_pins[pin].pin_state = value;
pin 335 dev/gpio/gpio.c pin = ctl->gp_pin;
pin 336 dev/gpio/gpio.c if (pin < 0 || pin >= sc->sc_npins)
pin 338 dev/gpio/gpio.c if (sc->sc_pins[pin].pin_mapped)
pin 343 dev/gpio/gpio.c if ((flags & sc->sc_pins[pin].pin_caps) != flags)
pin 346 dev/gpio/gpio.c ctl->gp_caps = sc->sc_pins[pin].pin_caps;
pin 348 dev/gpio/gpio.c ctl->gp_flags = sc->sc_pins[pin].pin_flags;
pin 350 dev/gpio/gpio.c gpiobus_pin_ctl(gc, pin, flags);
pin 352 dev/gpio/gpio.c sc->sc_pins[pin].pin_flags = flags;
pin 51 dev/gpio/gpiovar.h #define gpiobus_pin_read(gc, pin) \
pin 52 dev/gpio/gpiovar.h ((gc)->gp_pin_read((gc)->gp_cookie, (pin)))
pin 53 dev/gpio/gpiovar.h #define gpiobus_pin_write(gc, pin, value) \
pin 54 dev/gpio/gpiovar.h ((gc)->gp_pin_write((gc)->gp_cookie, (pin), (value)))
pin 55 dev/gpio/gpiovar.h #define gpiobus_pin_ctl(gc, pin, flags) \
pin 56 dev/gpio/gpiovar.h ((gc)->gp_pin_ctl((gc)->gp_cookie, (pin), (flags)))
pin 50 dev/i2c/pca9532.c int pcaled_gpio_pin_read(void *arg, int pin);
pin 51 dev/i2c/pca9532.c void pcaled_gpio_pin_write (void *arg, int pin, int value);
pin 52 dev/i2c/pca9532.c void pcaled_gpio_pin_ctl (void *arg, int pin, int flags);
pin 133 dev/i2c/pca9532.c pcaled_gpio_pin_read(void *arg, int pin)
pin 139 dev/i2c/pca9532.c if (pin < 8)
pin 149 dev/i2c/pca9532.c return (data >> (pin & 3)) & 1;
pin 153 dev/i2c/pca9532.c pcaled_gpio_pin_write (void *arg, int pin, int value)
pin 157 dev/i2c/pca9532.c if (pin < 4)
pin 159 dev/i2c/pca9532.c else if (pin < 8)
pin 161 dev/i2c/pca9532.c else if (pin < 12)
pin 168 dev/i2c/pca9532.c data &= ~(0x3 << (2*(pin & 3)));
pin 169 dev/i2c/pca9532.c data |= (value << (2*(pin & 3)));
pin 180 dev/i2c/pca9532.c pcaled_gpio_pin_ctl (void *arg, int pin, int flags)
pin 209 dev/i2c/pca9554.c pcagpio_gpio_pin_read(void *arg, int pin)
pin 218 dev/i2c/pca9554.c return ((in ^ sc->sc_polarity) & (1 << pin)) ? 1 : 0;
pin 222 dev/i2c/pca9554.c pcagpio_gpio_pin_write(void *arg, int pin, int value)
pin 227 dev/i2c/pca9554.c mask = 0xff ^ (1 << pin);
pin 232 dev/i2c/pca9554.c out = (out & mask) | (value << pin);
pin 241 dev/i2c/pca9554.c pcagpio_gpio_pin_ctl(void *arg, int pin, int flags)
pin 247 dev/i2c/pca9554.c pcagpio_gpio_pin_select(sc, pin);
pin 3265 dev/ic/ath.c ath_gpio_pin_read(void *arg, int pin)
pin 3269 dev/ic/ath.c return (ath_hal_get_gpio(ah, pin) ? GPIO_PIN_HIGH : GPIO_PIN_LOW);
pin 3273 dev/ic/ath.c ath_gpio_pin_write(void *arg, int pin, int value)
pin 3277 dev/ic/ath.c ath_hal_set_gpio(ah, pin, value ? GPIO_PIN_HIGH : GPIO_PIN_LOW);
pin 3281 dev/ic/ath.c ath_gpio_pin_ctl(void *arg, int pin, int flags)
pin 3287 dev/ic/ath.c ath_hal_set_gpio_input(ah, pin);
pin 3289 dev/ic/ath.c ath_hal_set_gpio_output(ah, pin);
pin 1813 dev/ic/pgt.c struct pgt_ieee80211_node *pin;
pin 1815 dev/ic/pgt.c pin = malloc(sizeof(*pin), M_DEVBUF, M_NOWAIT);
pin 1816 dev/ic/pgt.c if (pin != NULL) {
pin 1817 dev/ic/pgt.c bzero(pin, sizeof *pin);
pin 1818 dev/ic/pgt.c pin->pin_dot1x_auth = PIN_DOT1X_UNAUTHORIZED;
pin 1820 dev/ic/pgt.c return (struct ieee80211_node *)pin;
pin 1833 dev/ic/pgt.c struct pgt_ieee80211_node *pin;
pin 1835 dev/ic/pgt.c pin = (struct pgt_ieee80211_node *)ni;
pin 1836 dev/ic/pgt.c free(pin, M_DEVBUF);
pin 2466 dev/ic/pgt.c struct pgt_ieee80211_node *pin;
pin 2473 dev/ic/pgt.c pin = (struct pgt_ieee80211_node *)ni;
pin 2474 dev/ic/pgt.c if (pin->pin_dot1x_auth == PIN_DOT1X_AUTHORIZED)
pin 2475 dev/ic/pgt.c pin->pin_node.ni_inact = 0;
pin 2833 dev/ic/pgt.c struct pgt_ieee80211_node *pin;
pin 2837 dev/ic/pgt.c pin = (struct pgt_ieee80211_node *)ni;
pin 2849 dev/ic/pgt.c pin = (struct pgt_ieee80211_node *)ni;
pin 2852 dev/ic/pgt.c pin->pin_mlme_state = letoh16(mlme->pom_state);
pin 2855 dev/ic/pgt.c if (pin != NULL)
pin 2856 dev/ic/pgt.c pin->pin_mlme_state = letoh16(mlme->pom_state);
pin 130 dev/isa/isagpio.c isagpio_pin_read(void *arg, int pin)
pin 136 dev/isa/isagpio.c return ((mask >> pin) & 0x01);
pin 140 dev/isa/isagpio.c isagpio_pin_write(void *arg, int pin, int value)
pin 145 dev/isa/isagpio.c sc->sc_gpio_mask &= ~(0x01 << pin);
pin 147 dev/isa/isagpio.c sc->sc_gpio_mask |= 0x01 << pin;
pin 152 dev/isa/isagpio.c isagpio_pin_ctl(void *arg, int pin, int flags)
pin 501 dev/isa/nsclpcsio_isa.c nsclpcsio_gpio_pin_select(struct nsclpcsio_softc *sc, int pin)
pin 506 dev/isa/nsclpcsio_isa.c port = pin / 8;
pin 507 dev/isa/nsclpcsio_isa.c shift = pin % 8;
pin 539 dev/isa/nsclpcsio_isa.c nsclpcsio_gpio_pin_read(void *arg, int pin)
pin 545 dev/isa/nsclpcsio_isa.c port = pin / 8;
pin 546 dev/isa/nsclpcsio_isa.c shift = pin % 8;
pin 569 dev/isa/nsclpcsio_isa.c nsclpcsio_gpio_pin_write(void *arg, int pin, int value)
pin 575 dev/isa/nsclpcsio_isa.c port = pin / 8;
pin 576 dev/isa/nsclpcsio_isa.c shift = pin % 8;
pin 603 dev/isa/nsclpcsio_isa.c nsclpcsio_gpio_pin_ctl(void *arg, int pin, int flags)
pin 609 dev/isa/nsclpcsio_isa.c nsclpcsio_gpio_pin_select(sc, pin);
pin 1499 dev/pci/azalia.c pin_colors[this->d.pin.color], nid);
pin 1635 dev/pci/azalia.c this->d.pin.config = result;
pin 1636 dev/pci/azalia.c this->d.pin.sequence = CORB_CD_SEQUENCE(result);
pin 1637 dev/pci/azalia.c this->d.pin.association = CORB_CD_ASSOCIATION(result);
pin 1638 dev/pci/azalia.c this->d.pin.color = CORB_CD_COLOR(result);
pin 1639 dev/pci/azalia.c this->d.pin.device = CORB_CD_DEVICE(result);
pin 1645 dev/pci/azalia.c this->d.pin.cap = result;
pin 1656 dev/pci/azalia.c pin_devices[this->d.pin.device], pin_colors[this->d.pin.color],
pin 1657 dev/pci/azalia.c this->d.pin.association, this->d.pin.sequence));
pin 1658 dev/pci/azalia.c DPRINTF((" cap=%b\n", this->d.pin.cap, PINCAP_BITS));
pin 492 dev/pci/azalia.h } pin;
pin 322 dev/pci/azalia_codec.c if ((this->w[i].d.pin.cap & COP_PINCAP_OUTPUT) == 0)
pin 326 dev/pci/azalia_codec.c if (this->w[i].d.pin.association != assoc)
pin 328 dev/pci/azalia_codec.c if (this->w[i].d.pin.sequence == seq) {
pin 653 dev/pci/azalia_codec.c w->d.pin.cap & COP_PINCAP_OUTPUT &&
pin 654 dev/pci/azalia_codec.c w->d.pin.cap & COP_PINCAP_INPUT) {
pin 674 dev/pci/azalia_codec.c w->d.pin.cap & COP_PINCAP_HEADPHONE) {
pin 840 dev/pci/azalia_codec.c switch (this->w[m->nid].d.pin.device) {
pin 2545 dev/pci/azalia_codec.c azalia_stac9221_gpio_unmute(codec_t *this, int pin)
pin 2553 dev/pci/azalia_codec.c data |= 1 << pin;
pin 2554 dev/pci/azalia_codec.c mask |= 1 << pin;
pin 2555 dev/pci/azalia_codec.c dir |= 1 << pin;
pin 249 dev/pci/pci.c int ret, pin, bus, device, function;
pin 308 dev/pci/pci.c pin = PCI_INTERRUPT_PIN(intr);
pin 309 dev/pci/pci.c pa.pa_rawintrpin = pin;
pin 310 dev/pci/pci.c if (pin == PCI_INTERRUPT_PIN_NONE) {
pin 319 dev/pci/pci.c ((pin + pa.pa_intrswiz - 1) % 4) + 1;
pin 95 dev/pci/ppb.c int pin;
pin 110 dev/pci/ppb.c for (pin = PCI_INTERRUPT_PIN_A; pin <= PCI_INTERRUPT_PIN_D; pin++) {
pin 111 dev/pci/ppb.c pa->pa_intrpin = pa->pa_rawintrpin = pin;
pin 113 dev/pci/ppb.c pci_intr_map(pa, &sc->sc_ih[pin - PCI_INTERRUPT_PIN_A]);
pin 72 dev/pci/ppbreg.h #define PPB_INTERRUPT_SWIZZLE(pin, device) \
pin 73 dev/pci/ppbreg.h ((((pin) + (device) - 1) % 4) + 1)
pin 558 netbt/hci.h uint8_t pin[HCI_PIN_SIZE]; /* pin code */