root/dev/ic/dp857xreg.h

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    1 /*      $OpenBSD: dp857xreg.h,v 1.3 2003/06/09 16:34:22 deraadt Exp $ */
    2 
    3 /*
    4  * Copyright (c) 1996 Per Fogelstrom
    5  * 
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
   16  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   17  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
   19  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  *
   27  */
   28 
   29 #if !defined(_DP857X_H)
   30 #define _DP857X_H
   31 
   32 /*
   33  *      Definition of Real Time Clock address space.
   34  *
   35  *      Clock is a National DP8570A RTC
   36  */
   37 #define BSIZE           1       /* No of Bytes for Address Spacing */
   38 #define MAIN_STATUS     0x00    /* Main status register         */
   39 /*
   40  *  Registers selected with BS=0 RS=0
   41  */
   42 #define TIMER0_CTRL     0x01    /* Timer 0 control register     */
   43 #define TIMER1_CTRL     0x02    /* Timer 0 control register     */
   44 #define PERIODIC_FLAGS  0x03    /* Timer periodic flag register */
   45 #define INTERRUPT_ROUT  0x04    /* Interrupt routing register   */
   46 /*
   47  *  Registers selected with BS=0 RS=1
   48  */
   49 #define REAL_TIME_MODE  0x01    /* Real Time Mode register      */
   50 #define OUTPUT_MODE     0x02    /* Output mode register         */
   51 #define INTERRUPT_CTRL0 0x03    /* Interrupt control register 0 */
   52 #define INTERRUPT_CTRL1 0x04    /* Interrupt control register 1 */
   53 /*
   54  *  Clock and timer registers when BS=0
   55  */
   56 #define CLK_SUBSECONDS  0x05    /* 1/100 seconds reister        */
   57 #define CLK_SECONDS     0x06    /* Seconds                      */
   58 #define CLK_MINUTES     0x07    /* Minutes                      */
   59 #define CLK_HOURS       0x08    /* Hours                        */
   60 #define CLK_DAY         0x09    /* Day of month                 */
   61 #define CLK_MONTH       0x0a    /* Month                        */
   62 #define CLK_YEAR        0x0b    /* Year                         */
   63 #define CLK_JULIAN_L    0x0c    /* Lsb of Julian date           */
   64 #define CLK_JULIAN_H    0x0d    /* Msb of Julian date           */
   65 #define CLK_WEEKDAY     0x0e    /* Day of week                  */
   66 #define TIMER0_LSB      0x0f    /* Timer 0 lsb                  */
   67 #define TIMER0_MSB      0x10    /* Timer 0 msb                  */
   68 #define TIMER1_LSB      0x11    /* Timer 1 lsb                  */
   69 #define TIMER1_MSB      0x12    /* Timer 1 msb                  */
   70 #define CMP_SECONDS     0x13    /* Seconds compare              */
   71 #define CMP_MINUTES     0x14    /* Minutes compare              */
   72 #define CMP_HOUR        0x15    /* Hours compare                */
   73 #define CMP_DAY         0x16    /* Day of month compare         */
   74 #define CMP_MONTH       0x17    /* Month compare                */
   75 #define CMP_WEEKDAY     0x18    /* Day of week compare          */
   76 #define SAVE_SECONDS    0x19    /* Seconds time save            */
   77 #define SAVE_MINUTES    0x1a    /* Minutes time save            */
   78 #define SAVE_HOUR       0x1b    /* Hours time save              */
   79 #define SAVE_DAY        0x1c    /* Day of month time save       */
   80 #define SAVE_MONTH      0x1d    /* Month time save              */
   81 #define RAM_1E          0x1e    /* Ram location 1e              */
   82 #define RAM_1F          0x1f    /* Ram location 1f              */
   83 #define SIZE_DP857X     0x20    /* Size of dp address map       */
   84 
   85 #define DP_FIRSTTODREG  CLK_SUBSECONDS
   86 #define DP_LASTTODREG   CLK_WEEKDAY
   87 
   88 typedef u_int dp_todregs[SIZE_DP857X];
   89 u_int dp857x_read(void *sc, u_int reg);
   90 void dp857x_write(void *sc, u_int reg, u_int datum);
   91 
   92 /*
   93  * Get all of the TOD/Alarm registers
   94  * Must be called at splhigh(), and with the RTC properly set up.
   95  */
   96 #define DP857X_GETTOD(sc, regs)                                 \
   97         do {                                                            \
   98                 int i;                                                  \
   99                                                                         \
  100                 /* make sure clock regs are selected */                 \
  101                 dp857x_write(sc, MAIN_STATUS, 0);                       \
  102                 /* try read until no rollover */                        \
  103                 do {                                                    \
  104                         /* read all of the tod/alarm regs */            \
  105                         for (i = DP_FIRSTTODREG; i < SIZE_DP857X; i++)  \
  106                                 (*regs)[i] = dp857x_read(sc, i);        \
  107                 } while(dp857x_read(sc, PERIODIC_FLAGS) & 7);           \
  108         } while (0);
  109 
  110 /*
  111  * Set all of the TOD/Alarm registers
  112  * Must be called at splhigh(), and with the RTC properly set up.
  113  */
  114 #define DP857X_PUTTOD(sc, regs)                                 \
  115         do {                                                            \
  116                 int i;                                                  \
  117                                                                         \
  118                 /* stop updates while setting, eg clear start bit */    \
  119                 dp857x_write(sc, MAIN_STATUS, 0x40);                    \
  120                 dp857x_write(sc, REAL_TIME_MODE,                        \
  121                     dp857x_read(sc, REAL_TIME_MODE) & 0xF7);            \
  122                                                                         \
  123                 /* write all of the tod/alarm regs */                   \
  124                 for (i = DP_FIRSTTODREG; i <= DP_LASTTODREG; i++)       \
  125                         dp857x_write(sc, i, (*regs)[i]);                \
  126                                                                         \
  127                 /* reenable updates, eg set clock start bit */          \
  128                 dp857x_write(sc, REAL_TIME_MODE,                        \
  129                     dp857x_read(sc, REAL_TIME_MODE) | 0x08);            \
  130         } while (0);
  131 
  132 #endif  /*_DP857X_H*/
  133 

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