1 /* $OpenBSD: ueaglevar.h,v 1.2 2007/06/06 19:25:49 mk Exp $ */
2
3 /*-
4 * Copyright (c) 2003-2005
5 * Damien Bergamini <damien.bergamini@free.fr>
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 #define UEAGLE_NISOREQS 6
21 #define UEAGLE_NISOFRMS 4
22
23 #ifndef UEAGLE_INTR_INTERVAL
24 #define UEAGLE_INTR_INTERVAL 10 /* ms */
25 #endif
26
27 #define UEAGLE_TX_LIST_CNT 1
28
29 #define UEAGLE_IDMA_TIMEOUT 1000
30 #define UEAGLE_TX_TIMEOUT 10000
31
32 #define CRC_INITIAL 0xffffffff
33 #define CRC_MAGIC 0xc704dd7b
34
35 #define ATM_CELL_SIZE 53
36 #define ATM_CELL_HEADER_SIZE 5
37 #define ATM_CELL_PAYLOAD_SIZE (ATM_CELL_SIZE - ATM_CELL_HEADER_SIZE)
38
39 #define AAL5_TRAILER_SIZE 8
40
41 /*-
42 * ATM cell header:
43 *
44 * 0 4 8
45 * +-----------------+-----------------+
46 * | GFC | VPI |
47 * +-----------------+-----------------+
48 * | VPI | VCI |
49 * +-----------------+-----------------+
50 * | VCI |
51 * +-----------------+-----------+-----+
52 * | VCI | PT (3) | CLP |
53 * +-----------------+-----------+-----+
54 * | HEC |
55 * +-----------------------------------+
56 */
57 #define ATM_CH_FILL(x, gfc, vpi, vci, pt, clp, hec) do { \
58 (x)[0] = ((gfc) & 0xf) << 4 | ((vpi) & 0xf0) >> 4; \
59 (x)[1] = ((vpi) & 0xf) << 4 | ((vci) & 0xf000) >> 12; \
60 (x)[2] = ((vci) & 0xff0) >> 4; \
61 (x)[3] = ((vci) & 0xf) << 4 | ((pt) & 0x7) << 1 | ((clp) & 0x1);\
62 (x)[4] = (uint8_t)(hec); \
63 } while (/* CONSTCOND */0)
64
65 #define ATM_CH_SETPTFLAGS(x, v) ((x)[3] |= ((v) & 0x7) << 1)
66 #define ATM_CH_GETPTFLAGS(x) (((x)[3] >> 1) & 0x7)
67 #define ATM_CH_GETVPI(x) ((x)[0] << 4 | (x)[1] >> 4)
68 #define ATM_CH_GETVCI(x) \
69 (((x)[1] & 0xf) << 12 | (x)[2] << 4 | ((x)[3] & 0xf0) >> 4)
70
71 /* optimized shortcut for (ATM_CH_GETPTFLAGS(x) & 1) */
72 #define ATM_CH_ISLASTCELL(x) ((x)[3] & 0x2)
73
74 #define AAL5_TR_SETCPSUU(x, v) ((x)[45] = (uint8_t)(v))
75 #define AAL5_TR_SETCPI(x, v) ((x)[46] = (uint8_t)(v))
76 #define AAL5_TR_SETPDULEN(x, v) do { \
77 (x)[47] = (uint8_t)((v) >> 8); \
78 (x)[48] = (uint8_t)(v); \
79 } while (/* CONSTCOND */0)
80
81 #define AAL5_TR_GETPDULEN(x) (uint16_t)((x)[47] << 8 | (x)[48])
82 #define AAL5_TR_SETCRC(x, v) do { \
83 (x)[49] = (uint8_t)((v) >> 24); \
84 (x)[50] = (uint8_t)((v) >> 16); \
85 (x)[51] = (uint8_t)((v) >> 8); \
86 (x)[52] = (uint8_t)(v); \
87 } while (/* CONSTCOND */0)
88
89 #define UEAGLE_IFMTU 1500
90 #define UEAGLE_TXBUFLEN \
91 (((UEAGLE_IFMTU / ATM_CELL_PAYLOAD_SIZE) + 2) * ATM_CELL_SIZE)
92
93 struct ueagle_vcc {
94 uint16_t vci;
95 uint8_t vpi;
96 uint8_t ch[ATM_CELL_HEADER_SIZE];
97 void *rxhand;
98 struct mbuf *m;
99 uint8_t *dst;
100 uint8_t *limit;
101 struct atm_pseudohdr aph;
102 int flags;
103 #define UEAGLE_VCC_ACTIVE (1 << 0)
104 #define UEAGLE_VCC_DROP (1 << 1)
105 };
106
107 struct ueagle_softc;
108
109 struct ueagle_isoreq {
110 struct ueagle_softc *sc;
111 usbd_xfer_handle xfer;
112 uint16_t frlengths[UEAGLE_NISOFRMS];
113 uint8_t *offsets[UEAGLE_NISOFRMS];
114 };
115
116 struct ueagle_txreq {
117 struct ueagle_softc *sc;
118 usbd_xfer_handle xfer;
119 uint8_t *buf;
120 };
121
122 struct ueagle_stats {
123 struct {
124 uint32_t status;
125 uint32_t flags;
126 uint32_t vidcpe;
127 uint32_t vidco;
128 uint32_t dsrate;
129 uint32_t usrate;
130 uint32_t dserror;
131 uint32_t userror;
132 uint32_t dsunc;
133 uint32_t usunc;
134 uint32_t txflow;
135 uint32_t rxflow;
136 uint32_t attenuation;
137 uint32_t dsmargin;
138 uint32_t usmargin;
139 } phy;
140
141 struct {
142 uint32_t cells_transmitted;
143 uint32_t cells_received;
144 uint32_t cells_crc_errors;
145 uint32_t cells_dropped;
146 uint32_t vcc_no_conn;
147 uint32_t cspdus_transmitted;
148 uint32_t cspdus_received;
149 uint32_t cspdus_crc_errors;
150 uint32_t cspdus_dropped;
151 } atm;
152 };
153
154 #define UEAGLE_COND_CMV(sc) ((char *)(sc) + 1)
155 #define UEAGLE_COND_READY(sc) ((char *)(sc) + 2)
156 #define UEAGLE_COND_SYNC(sc) ((char *)(sc) + 3)
157
158 struct ueagle_softc {
159 struct device sc_dev;
160 struct ifnet sc_if;
161
162 usbd_device_handle sc_udev;
163
164 struct proc *stat_thread;
165 struct usb_task sc_swap_task;
166 uint16_t pageno;
167 uint16_t ovl;
168
169 const char *fw;
170 uint8_t *dsp;
171
172 struct usb_task sc_init_task;
173
174 usbd_pipe_handle pipeh_tx;
175 usbd_pipe_handle pipeh_rx;
176 usbd_pipe_handle pipeh_idma;
177 usbd_pipe_handle pipeh_intr;
178
179 struct ueagle_isoreq isoreqs[UEAGLE_NISOREQS];
180 struct ueagle_txreq txreqs[UEAGLE_TX_LIST_CNT];
181 struct ueagle_vcc vcc;
182 struct ueagle_stats stats;
183
184 uint16_t isize;
185 char ibuf[32];
186
187 int gone;
188
189 uint16_t index;
190 uint32_t data;
191 };