1 /* $OpenBSD: if_udavreg.h,v 1.9 2007/06/10 10:15:35 mbalmer Exp $ */
2 /* $NetBSD: if_udavreg.h,v 1.2 2003/09/04 15:17:39 tsutsui Exp $ */
3 /* $nabe: if_udavreg.h,v 1.2 2003/08/21 16:26:40 nabe Exp $ */
4 /*
5 * Copyright (c) 2003
6 * Shingo WATANABE <nabe@nabechan.org>. All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 */
33
34 #define UDAV_IFACE_INDEX 0
35 #define UDAV_CONFIG_NO 1
36
37 #define UDAV_TX_LIST_CNT 1
38 #define UDAV_RX_LIST_CNT 1
39
40 #define UDAV_TX_TIMEOUT 1000
41 #define UDAV_TIMEOUT 10000
42
43
44 /* Request */
45 #define UDAV_REQ_REG_READ 0x00 /* Read from register(s) */
46 #define UDAV_REQ_REG_WRITE 0x01 /* Write to register(s) */
47 #define UDAV_REQ_REG_WRITE1 0x03 /* Write to a register */
48
49 #define UDAV_REQ_MEM_READ 0x02 /* Read from memory */
50 #define UDAV_REQ_MEM_WRITE 0x05 /* Write to memory */
51 #define UDAV_REQ_MEM_WRITE1 0x07 /* Write a byte to memory */
52
53 /* Registers */
54 #define UDAV_NCR 0x00 /* Network Control Register */
55 #define UDAV_NCR_EXT_PHY (1<<7) /* Select External PHY */
56 #define UDAV_NCR_WAKEEN (1<<6) /* Wakeup Event Enable */
57 #define UDAV_NCR_FCOL (1<<4) /* Force Collision Mode */
58 #define UDAV_NCR_FDX (1<<3) /* Full-Duplex Mode (RO on Int. PHY) */
59 #define UDAV_NCR_LBK1 (1<<2) /* Lookback Mode */
60 #define UDAV_NCR_LBK0 (1<<1) /* Lookback Mode */
61 #define UDAV_NCR_RST (1<<0) /* Software reset */
62
63 #define UDAV_RCR 0x05 /* RX Control Register */
64 #define UDAV_RCR_WTDIS (1<<6) /* Watchdog Timer Disable */
65 #define UDAV_RCR_DIS_LONG (1<<5) /* Discard Long Packet(over 1522Byte) */
66 #define UDAV_RCR_DIS_CRC (1<<4) /* Discard CRC Error Packet */
67 #define UDAV_RCR_ALL (1<<3) /* Pass All Multicast */
68 #define UDAV_RCR_RUNT (1<<2) /* Pass Runt Packet */
69 #define UDAV_RCR_PRMSC (1<<1) /* Promiscuous Mode */
70 #define UDAV_RCR_RXEN (1<<0) /* RX Enable */
71
72 #define UDAV_RSR 0x06 /* RX Status Register */
73 #define UDAV_RSR_RF (1<<7) /* Runt Frame */
74 #define UDAV_RSR_MF (1<<6) /* Multicast Frame */
75 #define UDAV_RSR_LCS (1<<5) /* Late Collision Seen */
76 #define UDAV_RSR_RWTO (1<<4) /* Receive Watchdog Time-Out */
77 #define UDAV_RSR_PLE (1<<3) /* Physical Layer Error */
78 #define UDAV_RSR_AE (1<<2) /* Alignment Error */
79 #define UDAV_RSR_CE (1<<1) /* CRC Error */
80 #define UDAV_RSR_FOE (1<<0) /* FIFO Overflow Error */
81 #define UDAV_RSR_ERR (UDAV_RSR_RF | UDAV_RSR_LCS | UDAV_RSR_RWTO |\
82 UDAV_RSR_PLE | UDAV_RSR_AE | UDAV_RSR_CE |\
83 UDAV_RSR_FOE)
84
85 #define UDAV_EPCR 0x0b /* EEPROM & PHY Control Register */
86 #define UDAV_EPCR_REEP (1<<5) /* Reload EEPROM */
87 #define UDAV_EPCR_WEP (1<<4) /* Write EEPROM enable */
88 #define UDAV_EPCR_EPOS (1<<3) /* EEPROM or PHY Operation Select */
89 #define UDAV_EPCR_ERPRR (1<<2) /* EEPROM/PHY Register Read Command */
90 #define UDAV_EPCR_ERPRW (1<<1) /* EEPROM/PHY Register Write Command */
91 #define UDAV_EPCR_ERRE (1<<0) /* EEPROM/PHY Access Status */
92
93 #define UDAV_EPAR 0x0c /* EEPROM & PHY Control Register */
94 #define UDAV_EPAR_PHY_ADR1 (1<<7) /* PHY Address bit 1 */
95 #define UDAV_EPAR_PHY_ADR0 (1<<6) /* PHY Address bit 0 */
96 #define UDAV_EPAR_EROA (1<<0) /* EEPROM Word/PHY Register Address */
97 #define UDAV_EPAR_EROA_MASK (0x1f) /* [5:0] */
98
99 #define UDAV_EPDRL 0x0d /* EEPROM & PHY Data Register */
100 #define UDAV_EPDRH 0x0e /* EEPROM & PHY Data Register */
101
102 #define UDAV_PAR0 0x10 /* Ethernet Address, load from EEPROM */
103 #define UDAV_PAR1 0x11 /* Ethernet Address, load from EEPROM */
104 #define UDAV_PAR2 0x12 /* Ethernet Address, load from EEPROM */
105 #define UDAV_PAR3 0x13 /* Ethernet Address, load from EEPROM */
106 #define UDAV_PAR4 0x14 /* Ethernet Address, load from EEPROM */
107 #define UDAV_PAR5 0x15 /* Ethernet Address, load from EEPROM */
108 #define UDAV_PAR UDAV_PAR0
109
110 #define UDAV_MAR0 0x16 /* Multicast Register */
111 #define UDAV_MAR1 0x17 /* Multicast Register */
112 #define UDAV_MAR2 0x18 /* Multicast Register */
113 #define UDAV_MAR3 0x19 /* Multicast Register */
114 #define UDAV_MAR4 0x1a /* Multicast Register */
115 #define UDAV_MAR5 0x1b /* Multicast Register */
116 #define UDAV_MAR6 0x1c /* Multicast Register */
117 #define UDAV_MAR7 0x1d /* Multicast Register */
118 #define UDAV_MAR UDAV_MAR0
119
120 #define UDAV_GPCR 0x1e /* General purpose control register */
121 #define UDAV_GPCR_GEP_CNTL6 (1<<6) /* General purpose control 6 */
122 #define UDAV_GPCR_GEP_CNTL5 (1<<5) /* General purpose control 5 */
123 #define UDAV_GPCR_GEP_CNTL4 (1<<4) /* General purpose control 4 */
124 #define UDAV_GPCR_GEP_CNTL3 (1<<3) /* General purpose control 3 */
125 #define UDAV_GPCR_GEP_CNTL2 (1<<2) /* General purpose control 2 */
126 #define UDAV_GPCR_GEP_CNTL1 (1<<1) /* General purpose control 1 */
127 #define UDAV_GPCR_GEP_CNTL0 (1<<0) /* General purpose control 0 */
128
129 #define UDAV_GPR 0x1f /* General purpose register */
130 #define UDAV_GPR_GEPIO6 (1<<6) /* General purpose 6 */
131 #define UDAV_GPR_GEPIO5 (1<<5) /* General purpose 5 */
132 #define UDAV_GPR_GEPIO4 (1<<4) /* General purpose 4 */
133 #define UDAV_GPR_GEPIO3 (1<<3) /* General purpose 3 */
134 #define UDAV_GPR_GEPIO2 (1<<2) /* General purpose 2 */
135 #define UDAV_GPR_GEPIO1 (1<<1) /* General purpose 1 */
136 #define UDAV_GPR_GEPIO0 (1<<0) /* General purpose 0 */
137
138 #define GET_IFP(sc) (&(sc)->sc_ac.ac_if)
139 #define GET_MII(sc) (&(sc)->sc_mii)
140
141 struct udav_chain {
142 struct udav_softc *udav_sc;
143 usbd_xfer_handle udav_xfer;
144 char *udav_buf;
145 struct mbuf *udav_mbuf;
146 int udav_idx;
147 };
148
149 struct udav_cdata {
150 struct udav_chain udav_tx_chain[UDAV_TX_LIST_CNT];
151 struct udav_chain udav_rx_chain[UDAV_TX_LIST_CNT];
152 #if 0
153 /* XXX: Intrrupt Endpoint is not yet supported! */
154 struct udav_intrpkg udav_ibuf;
155 #endif
156 int udav_tx_prod;
157 int udav_tx_cons;
158 int udav_tx_cnt;
159 int udav_rx_prod;
160 };
161
162 struct udav_softc {
163 struct device sc_dev; /* base device */
164 usbd_device_handle sc_udev;
165
166 /* USB */
167 usbd_interface_handle sc_ctl_iface;
168 /* int sc_ctl_iface_no; */
169 int sc_bulkin_no; /* bulk in endpoint */
170 int sc_bulkout_no; /* bulk out endpoint */
171 int sc_intrin_no; /* intr in endpoint */
172 usbd_pipe_handle sc_pipe_rx;
173 usbd_pipe_handle sc_pipe_tx;
174 usbd_pipe_handle sc_pipe_intr;
175 struct timeout sc_stat_ch;
176 u_int sc_rx_errs;
177 /* u_int sc_intr_errs; */
178 struct timeval sc_rx_notice;
179
180 /* Ethernet */
181 struct arpcom sc_ac; /* ethernet common */
182 struct mii_data sc_mii;
183 struct rwlock sc_mii_lock;
184 int sc_link;
185 #define sc_media udav_mii.mii_media
186 struct udav_cdata sc_cdata;
187
188 int sc_attached;
189 int sc_dying;
190 int sc_refcnt;
191
192 struct usb_task sc_tick_task;
193 struct usb_task sc_stop_task;
194
195 u_int16_t sc_flags;
196 };
197
198 struct udav_rx_hdr {
199 uByte pktstat;
200 uWord length;
201 } __packed;
202 #define UDAV_RX_HDRLEN sizeof(struct udav_rx_hdr)
203
204 /* Packet length */
205 #define UDAV_MAX_MTU 1536 /* XXX: max frame size is unknown */
206 #define UDAV_MIN_FRAME_LEN 60
207 #define UDAV_BUFSZ UDAV_MAX_MTU + UDAV_RX_HDRLEN