root/dev/tc/tcds.c

DEFINITIONS

1. tcds_lookup
2. tcdsmatch
3. tcdsattach
4. tcdssubmatch
5. tcdsprint
6. tcds_intr_establish
7. tcds_intr_disestablish
8. tcds_intrnull
9. tcds_scsi_reset
10. tcds_scsi_enable
11. tcds_dma_enable
12. tcds_scsi_isintr
13. tcds_scsi_iserr
14. tcds_intr
15. tcds_params

    1 /* $OpenBSD: tcds.c,v 1.4 2004/06/28 02:28:43 aaron Exp $ */
    2 /* $NetBSD: tcds.c,v 1.3 2001/11/13 06:26:10 lukem Exp $ */
    4 /*-
    5  * Copyright (c) 1998 The NetBSD Foundation, Inc.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software contributed to The NetBSD Foundation
    9  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
   10  * NASA Ames Research Center.
   11  *
   12  * Redistribution and use in source and binary forms, with or without
   13  * modification, are permitted provided that the following conditions
   14  * are met:
   15  * 1. Redistributions of source code must retain the above copyright
   16  *    notice, this list of conditions and the following disclaimer.
   17  * 2. Redistributions in binary form must reproduce the above copyright
   18  *    notice, this list of conditions and the following disclaimer in the
   19  *    documentation and/or other materials provided with the distribution.
   20  * 3. All advertising materials mentioning features or use of this software
   21  *    must display the following acknowledgement:
   22  *      This product includes software developed by the NetBSD
   23  *      Foundation, Inc. and its contributors.
   24  * 4. Neither the name of The NetBSD Foundation nor the names of its
   25  *    contributors may be used to endorse or promote products derived
   26  *    from this software without specific prior written permission.
   27  *
   28  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   29  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   30  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   31  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   32  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   38  * POSSIBILITY OF SUCH DAMAGE.
   39  */
   41 /*
   42  * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
   43  * All rights reserved.
   44  *
   45  * Author: Keith Bostic, Chris G. Demetriou
   46  * 
   47  * Permission to use, copy, modify and distribute this software and
   48  * its documentation is hereby granted, provided that both the copyright
   49  * notice and this permission notice appear in all copies of the
   50  * software, derivative works or modified versions, and any portions
   51  * thereof, and that both notices appear in supporting documentation.
   52  * 
   53  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 
   54  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 
   55  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
   56  * 
   57  * Carnegie Mellon requests users of this software to return to
   58  *
   59  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
   60  *  School of Computer Science
   61  *  Carnegie Mellon University
   62  *  Pittsburgh PA 15213-3890
   63  *
   64  * any improvements or extensions that they make and grant Carnegie the
   65  * rights to redistribute these changes.
   66  */
   68 #include <sys/param.h>
   69 #include <sys/kernel.h>
   70 #include <sys/systm.h>
   71 #include <sys/device.h>
   72 #include <sys/malloc.h>
   74 #ifdef __alpha__
   75 #include <machine/rpb.h>
   76 #endif /* __alpha__ */
   78 #include <scsi/scsi_all.h>
   79 #include <scsi/scsiconf.h>
   81 #include <dev/ic/ncr53c9xvar.h>
   83 #include <machine/bus.h>
   85 #include <dev/tc/tcvar.h>
   86 #include <dev/tc/tcdsreg.h>
   87 #include <dev/tc/tcdsvar.h>
   89 struct tcds_softc {
   90         struct  device sc_dv;
bus_space_tag_t sc_bst;
bus_space_handle_t sc_bsh;
bus_dma_tag_t sc_dmat;
   94         void    *sc_cookie;
   95         int     sc_flags;
   96         struct tcds_slotconfig sc_slots[2];
   97 };
   99 /* sc_flags */
  100 #define TCDSF_BASEBOARD         0x01    /* baseboard on DEC 3000 */
  101 #define TCDSF_FASTSCSI          0x02    /* supports Fast SCSI */
  103 /* Definition of the driver for autoconfig. */
  104 int     tcdsmatch(struct device *, void *, void *);
  105 void    tcdsattach(struct device *, struct device *, void *);
  106 int     tcdsprint(void *, const char *);
  107 int     tcdssubmatch(struct device *, void *, void *);
  109 struct cfattach tcds_ca = {
  110         sizeof(struct tcds_softc), tcdsmatch, tcdsattach,
  111 };
  113 struct cfdriver tcds_cd = {
NULL, "tcds", DV_DULL,
  115 };
  117 /*static*/ int  tcds_intr(void *);
  118 /*static*/ int  tcds_intrnull(void *);
  120 struct tcds_device {
  121         const char *td_name;
  122         int td_flags;
  123 } tcds_devices[] = {
  124 #ifdef __alpha__
  125         { "PMAZ-DS ",   TCDSF_BASEBOARD },
  126         { "PMAZ-FS ",   TCDSF_BASEBOARD|TCDSF_FASTSCSI },
  127 #endif /* __alpha__ */
  128         { "PMAZB-AA",   0 },
  129         { "PMAZC-AA",   TCDSF_FASTSCSI },
  130         { NULL,         0 },
  131 };
  133 struct tcds_device *tcds_lookup(const char *);
  134 void    tcds_params(struct tcds_softc *, int, int *, int *);
  136 struct tcds_device *
tcds_lookup(modname)
  138         const char *modname;
  139 {
  140         struct tcds_device *td;
  142         for (td = tcds_devices; td->td_name != NULL; td++)
  143                 if (strncmp(td->td_name, modname, TC_ROM_LLEN) == 0)
  144                         return (td);
  146         return (NULL);
  147 }
  149 int
tcdsmatch(parent, cfdata, aux)
  151         struct device *parent;
  152         void *cfdata, *aux;
  153 {
  154         struct tc_attach_args *ta = aux;
  156         return (tcds_lookup(ta->ta_modname) != NULL);
  157 }
  159 void
tcdsattach(parent, self, aux)
  161         struct device *parent, *self;
  162         void *aux;
  163 {
  164         struct tcds_softc *sc = (struct tcds_softc *)self;
  165         struct tc_attach_args *ta = aux;
  166         struct tcdsdev_attach_args tcdsdev;
  167         struct tcds_slotconfig *slotc;
  168         struct tcds_device *td;
bus_space_handle_t sbsh[2];
  170         int i, gpi2;
td = tcds_lookup(ta->ta_modname);
  173         if (td == NULL)
panic("tcdsattach: impossible");
printf(": TurboChannel Dual SCSI");
  177         if (td->td_flags & TCDSF_BASEBOARD)
printf(" (baseboard)");
printf("\n");
sc->sc_flags = td->td_flags;
sc->sc_bst = ta->ta_memt;
sc->sc_dmat = ta->ta_dmat;
  186         /*
  187          * Map the device.
  188          */
  189         if (bus_space_map(sc->sc_bst, ta->ta_addr,
  190             (TCDS_SCSI1_OFFSET + 0x100), 0, &sc->sc_bsh)) {
printf("%s: unable to map device\n", sc->sc_dv.dv_xname);
  192                 return;
  193         }
  195         /*
  196          * Now, slice off two subregions for the individual NCR SCSI chips.
  197          */
  198         if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI0_OFFSET,
  199             0x100, &sbsh[0]) ||
bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI1_OFFSET,
  201             0x100, &sbsh[1])) {
printf("%s: unable to subregion SCSI chip space\n",
sc->sc_dv.dv_xname);
  204                 return;
  205         }
sc->sc_cookie = ta->ta_cookie;
tc_intr_establish(parent, sc->sc_cookie, TC_IPL_BIO, tcds_intr, sc);
  211         /*
  212          * XXX
  213          * IMER apparently has some random (or, not so random, but still
  214          * not useful) bits set in it when the system boots.  Clear it.
  215          */
bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, 0);
  218         /* XXX Initial contents of CIR? */
  220         /*
  221          * Remember if GPI2 is set in the CIR; we'll need it later.
  222          */
gpi2 = (bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR) &
TCDS_CIR_GPI_2) != 0;
  226         /*
  227          * Set up the per-slot definitions for later use.
  228          */
  230         /* fill in common information first */
  231         for (i = 0; i < 2; i++) {
slotc = &sc->sc_slots[i];
bzero(slotc, sizeof *slotc);    /* clear everything */
evcount_attach(&slotc->sc_count, sc->sc_dv.dv_xname, NULL,
  236                     &evcount_intr);
slotc->sc_slot = i;
slotc->sc_bst = sc->sc_bst;
slotc->sc_bsh = sc->sc_bsh;
slotc->sc_intrhand = tcds_intrnull;
slotc->sc_intrarg = (void *)(long)i;
  243         }
  245         /* information for slot 0 */
slotc = &sc->sc_slots[0];
slotc->sc_resetbits = TCDS_CIR_SCSI0_RESET;
slotc->sc_intrmaskbits =
TCDS_IMER_SCSI0_MASK | TCDS_IMER_SCSI0_ENB;
slotc->sc_intrbits = TCDS_CIR_SCSI0_INT;
slotc->sc_dmabits = TCDS_CIR_SCSI0_DMAENA;
slotc->sc_errorbits = 0;                                /* XXX */
slotc->sc_sda = TCDS_SCSI0_DMA_ADDR;
slotc->sc_dic = TCDS_SCSI0_DMA_INTR;
slotc->sc_dud0 = TCDS_SCSI0_DMA_DUD0;
slotc->sc_dud1 = TCDS_SCSI0_DMA_DUD1;
  258         /* information for slot 1 */
slotc = &sc->sc_slots[1];
slotc->sc_resetbits = TCDS_CIR_SCSI1_RESET;
slotc->sc_intrmaskbits =
TCDS_IMER_SCSI1_MASK | TCDS_IMER_SCSI1_ENB;
slotc->sc_intrbits = TCDS_CIR_SCSI1_INT;
slotc->sc_dmabits = TCDS_CIR_SCSI1_DMAENA;
slotc->sc_errorbits = 0;                                /* XXX */
slotc->sc_sda = TCDS_SCSI1_DMA_ADDR;
slotc->sc_dic = TCDS_SCSI1_DMA_INTR;
slotc->sc_dud0 = TCDS_SCSI1_DMA_DUD0;
slotc->sc_dud1 = TCDS_SCSI1_DMA_DUD1;
  271         /* find the hardware attached to the TCDS ASIC */
  272         for (i = 0; i < 2; i++) {
tcds_params(sc, i, &tcdsdev.tcdsda_id,
  274                     &tcdsdev.tcdsda_fast);
tcdsdev.tcdsda_bst = sc->sc_bst;
tcdsdev.tcdsda_bsh = sbsh[i];
tcdsdev.tcdsda_dmat = sc->sc_dmat;
tcdsdev.tcdsda_chip = i;
tcdsdev.tcdsda_sc = &sc->sc_slots[i];
  281                 /*
  282                  * Determine the chip frequency.  TCDSF_FASTSCSI will be set
  283                  * for TC option cards.  For baseboard chips, GPI2 is set, for a
  284                  * 25MHz clock, else a 40MHz clock.
  285                  */
  286                 if ((sc->sc_flags & TCDSF_BASEBOARD && gpi2 == 0) ||
sc->sc_flags & TCDSF_FASTSCSI) {
tcdsdev.tcdsda_freq = 40000000;
tcdsdev.tcdsda_period = tcdsdev.tcdsda_fast ? 4 : 8;
  290                 } else {
tcdsdev.tcdsda_freq = 25000000;
tcdsdev.tcdsda_period = 5;
  293                 }
  294                 if (sc->sc_flags & TCDSF_BASEBOARD)
tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C94;
  296                 else
tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C96;
tcds_scsi_reset(tcdsdev.tcdsda_sc);
config_found_sm(self, &tcdsdev, tcdsprint, tcdssubmatch);
  302 #ifdef __alpha__
  303                 /*
  304                  * The second SCSI chip isn't present on the baseboard TCDS
  305                  * on the DEC Alpha 3000/300 series.
  306                  */
  307                 if (sc->sc_flags & TCDSF_BASEBOARD &&
cputype == ST_DEC_3000_300)
  309                         break;
  310 #endif /* __alpha__ */
  311         }
  312 }
  314 int
tcdssubmatch(parent, vcf, aux)
  316         struct device *parent;
  317         void *vcf, *aux;
  318 {
  319         struct tcdsdev_attach_args *tcdsdev = aux;
  320         struct cfdata *cf = vcf;
  322         if (cf->cf_loc[0] != -1 &&
cf->cf_loc[0] != tcdsdev->tcdsda_chip)
  324                 return (0);
  326         return ((*cf->cf_attach->ca_match)(parent, vcf, aux));
  327 }
  329 int
tcdsprint(aux, pnp)
  331         void *aux;
  332         const char *pnp;
  333 {
  334         struct tcdsdev_attach_args *tcdsdev = aux;
  336         /* Only ASCs can attach to TCDSs; easy. */
  337         if (pnp)
printf("asc at %s", pnp);
printf(" chip %d", tcdsdev->tcdsda_chip);
  342         return (UNCONF);
  343 }
  345 void
tcds_intr_establish(tcds, slot, func, arg)
  347         struct device *tcds;
  348         int slot;
  349         int (*func)(void *);
  350         void *arg;
  351 {
  352         struct tcds_softc *sc = (struct tcds_softc *)tcds;
  354         if (sc->sc_slots[slot].sc_intrhand != tcds_intrnull)
panic("tcds_intr_establish: chip %d twice", slot);
sc->sc_slots[slot].sc_intrhand = func;
sc->sc_slots[slot].sc_intrarg = arg;
tcds_scsi_reset(&sc->sc_slots[slot]);
  360 }
  362 void
tcds_intr_disestablish(tcds, slot)
  364         struct device *tcds;
  365         int slot;
  366 {
  367         struct tcds_softc *sc = (struct tcds_softc *)tcds;
  369         if (sc->sc_slots[slot].sc_intrhand == tcds_intrnull)
panic("tcds_intr_disestablish: chip %d missing intr",
slot);
sc->sc_slots[slot].sc_intrhand = tcds_intrnull;
sc->sc_slots[slot].sc_intrarg = (void *)(u_long)slot;
tcds_dma_enable(&sc->sc_slots[slot], 0);
tcds_scsi_enable(&sc->sc_slots[slot], 0);
  378 }
  380 int
tcds_intrnull(val)
  382         void *val;
  383 {
panic("tcds_intrnull: uncaught TCDS intr for chip %lu",
  386             (u_long)val);
  387 }
  389 void
tcds_scsi_reset(sc)
  391         struct tcds_slotconfig *sc;
  392 {
u_int32_t cir;
tcds_dma_enable(sc, 0);
tcds_scsi_enable(sc, 0);
cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
TCDS_CIR_CLR(cir, sc->sc_resetbits);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
DELAY(1);
cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
TCDS_CIR_SET(cir, sc->sc_resetbits);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
tcds_scsi_enable(sc, 1);
tcds_dma_enable(sc, 1);
  410 }
  412 void
tcds_scsi_enable(sc, on)
  414         struct tcds_slotconfig *sc;
  415         int on;
  416 {
u_int32_t imer;
imer = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER);
  421         if (on)
imer |= sc->sc_intrmaskbits;
  423         else
imer &= ~sc->sc_intrmaskbits;
bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, imer);
  427 }
  429 void
tcds_dma_enable(sc, on)
  431         struct tcds_slotconfig *sc;
  432         int on;
  433 {
u_int32_t cir;
cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
  438         /* XXX Clear/set IOSLOT/PBS bits. */
  439         if (on) 
TCDS_CIR_SET(cir, sc->sc_dmabits);
  441         else
TCDS_CIR_CLR(cir, sc->sc_dmabits);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir);
  445 }
  447 int
tcds_scsi_isintr(sc, clear)
  449         struct tcds_slotconfig *sc;
  450         int clear;
  451 {
u_int32_t cir;
cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
  456         if ((cir & sc->sc_intrbits) != 0) {
  457                 if (clear) {
TCDS_CIR_CLR(cir, sc->sc_intrbits);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR,
cir);
  461                 }
  462                 return (1);
  463         } else
  464                 return (0);
  465 }
  467 int
tcds_scsi_iserr(sc)
  469         struct tcds_slotconfig *sc;
  470 {
u_int32_t cir;
cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
  474         return ((cir & sc->sc_errorbits) != 0);
  475 }
  477 int
tcds_intr(arg)
  479         void *arg;
  480 {
  481         struct tcds_softc *sc = arg;
u_int32_t ir, ir0;
  484         /*
  485          * XXX
  486          * Copy and clear (gag!) the interrupts.
  487          */
ir = ir0 = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR);
TCDS_CIR_CLR(ir0, TCDS_CIR_ALLINTR);
bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, ir0);
tc_syncbus();
  493 #define CHECKINTR(slot)                                                 \
  494         if (ir & sc->sc_slots[slot].sc_intrbits) {                      \
sc->sc_slots[slot].sc_count.ec_count++;                 \
  496                 (void)(*sc->sc_slots[slot].sc_intrhand)                 \
  497                     (sc->sc_slots[slot].sc_intrarg);                    \
  498         }
CHECKINTR(0);
CHECKINTR(1);
  501 #undef CHECKINTR
  503 #ifdef DIAGNOSTIC
  504         /* 
  505          * Interrupts not currently handled, but would like to know if they
  506          * occur.
  507          *
  508          * XXX
  509          * Don't know if we have to set the interrupt mask and enable bits
  510          * in the IMER to allow some of them to happen?
  511          */
  512 #define PRINTINTR(msg, bits)                                            \
  513         if (ir & bits)                                                  \
printf("%s: %s", sc->sc_dv.dv_xname, msg);
PRINTINTR("SCSI0 DREQ interrupt.\n", TCDS_CIR_SCSI0_DREQ);
PRINTINTR("SCSI1 DREQ interrupt.\n", TCDS_CIR_SCSI1_DREQ);
PRINTINTR("SCSI0 prefetch interrupt.\n", TCDS_CIR_SCSI0_PREFETCH);
PRINTINTR("SCSI1 prefetch interrupt.\n", TCDS_CIR_SCSI1_PREFETCH);
PRINTINTR("SCSI0 DMA error.\n", TCDS_CIR_SCSI0_DMA);
PRINTINTR("SCSI1 DMA error.\n", TCDS_CIR_SCSI1_DMA);
PRINTINTR("SCSI0 DB parity error.\n", TCDS_CIR_SCSI0_DB);
PRINTINTR("SCSI1 DB parity error.\n", TCDS_CIR_SCSI1_DB);
PRINTINTR("SCSI0 DMA buffer parity error.\n", TCDS_CIR_SCSI0_DMAB_PAR);
PRINTINTR("SCSI1 DMA buffer parity error.\n", TCDS_CIR_SCSI1_DMAB_PAR);
PRINTINTR("SCSI0 DMA read parity error.\n", TCDS_CIR_SCSI0_DMAR_PAR);
PRINTINTR("SCSI1 DMA read parity error.\n", TCDS_CIR_SCSI1_DMAR_PAR);
PRINTINTR("TC write parity error.\n", TCDS_CIR_TCIOW_PAR);
PRINTINTR("TC I/O address parity error.\n", TCDS_CIR_TCIOA_PAR);
  529 #undef PRINTINTR
  530 #endif
  532         /*
  533          * XXX
  534          * The MACH source had this, with the comment:
  535          *      This is wrong, but machine keeps dying.
  536          */
DELAY(1);
  539         return (1);
  540 }
  542 void
tcds_params(sc, chip, idp, fastp)
  544         struct tcds_softc *sc;
  545         int chip, *idp, *fastp;
  546 {
  547         int id, fast;
u_int32_t ids;
  550 #ifdef __alpha__
  551         if (sc->sc_flags & TCDSF_BASEBOARD) {
  552                 extern u_int8_t dec_3000_scsiid[], dec_3000_scsifast[];
id = dec_3000_scsiid[chip];
fast = dec_3000_scsifast[chip];
  556         } else
  557 #endif /* __alpha__ */
  558         {
  559                 /*
  560                  * SCSI IDs are stored in the EEPROM, along with whether or
  561                  * not the device is "fast".  Chip 0 is the high nibble,
  562                  * chip 1 the low nibble.
  563                  */
ids = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_EEPROM_IDS);
  565                 if (chip == 0)
ids >>= 4;
id = ids & 0x7;
fast = ids & 0x8;
  570         }
  572         if (id < 0 || id > 7) {
printf("%s: WARNING: bad SCSI ID %d for chip %d, using 7\n",
sc->sc_dv.dv_xname, id, chip);
id = 7;
  576         }
  578         if (fast)
printf("%s: fast mode set for chip %d\n",
sc->sc_dv.dv_xname, chip);
  582         *idp = id;
  583         *fastp = fast;
  584 }