This source file includes following definitions.
- icsphymatch
- icsphyattach
- icsphy_service
- icsphy_status
- icsphy_reset
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76 #include <sys/param.h>
77 #include <sys/systm.h>
78 #include <sys/kernel.h>
79 #include <sys/device.h>
80 #include <sys/socket.h>
81
82 #include <net/if.h>
83 #include <net/if_media.h>
84
85 #include <dev/mii/mii.h>
86 #include <dev/mii/miivar.h>
87 #include <dev/mii/miidevs.h>
88
89 #include <dev/mii/icsphyreg.h>
90
91 int icsphymatch(struct device *, void *, void *);
92 void icsphyattach(struct device *, struct device *, void *);
93
94 struct cfattach icsphy_ca = {
95 sizeof(struct mii_softc), icsphymatch, icsphyattach, mii_phy_detach,
96 mii_phy_activate
97 };
98
99 struct cfdriver icsphy_cd = {
100 NULL, "icsphy", DV_DULL
101 };
102
103 int icsphy_service(struct mii_softc *, struct mii_data *, int);
104 void icsphy_reset(struct mii_softc *);
105 void icsphy_status(struct mii_softc *);
106
107 const struct mii_phy_funcs icsphy_funcs = {
108 icsphy_service, icsphy_status, icsphy_reset,
109 };
110
111 static const struct mii_phydesc icsphys[] = {
112 { MII_OUI_xxICS, MII_MODEL_xxICS_1890,
113 MII_STR_xxICS_1890 },
114 { MII_OUI_xxICS, MII_MODEL_xxICS_1892,
115 MII_STR_xxICS_1892 },
116 { MII_OUI_xxICS, MII_MODEL_xxICS_1893,
117 MII_STR_xxICS_1893 },
118
119 { 0, 0,
120 NULL },
121
122 };
123
124 int
125 icsphymatch(struct device *parent, void *match, void *aux)
126 {
127 struct mii_attach_args *ma = aux;
128
129 if (mii_phy_match(ma, icsphys) != NULL)
130 return (10);
131
132 return (0);
133 }
134
135 void
136 icsphyattach(struct device *parent, struct device *self, void *aux)
137 {
138 struct mii_softc *sc = (struct mii_softc *)self;
139 struct mii_attach_args *ma = aux;
140 struct mii_data *mii = ma->mii_data;
141 const struct mii_phydesc *mpd;
142
143 mpd = mii_phy_match(ma, icsphys);
144 printf(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
145
146 sc->mii_inst = mii->mii_instance;
147 sc->mii_phy = ma->mii_phyno;
148 sc->mii_funcs = &icsphy_funcs;
149 sc->mii_pdata = mii;
150 sc->mii_flags = ma->mii_flags;
151
152 PHY_RESET(sc);
153
154 sc->mii_capabilities =
155 PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
156 if (sc->mii_capabilities & BMSR_MEDIAMASK)
157 mii_phy_add_media(sc);
158 }
159
160 int
161 icsphy_service(sc, mii, cmd)
162 struct mii_softc *sc;
163 struct mii_data *mii;
164 int cmd;
165 {
166 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
167 int reg;
168
169 if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
170 return (ENXIO);
171
172 switch (cmd) {
173 case MII_POLLSTAT:
174
175
176
177 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
178 return (0);
179 break;
180
181 case MII_MEDIACHG:
182
183
184
185
186 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
187 reg = PHY_READ(sc, MII_BMCR);
188 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
189 return (0);
190 }
191
192
193
194
195 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
196 break;
197
198 mii_phy_setmedia(sc);
199 break;
200
201 case MII_TICK:
202
203
204
205 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
206 return (0);
207
208 if (mii_phy_tick(sc) == EJUSTRETURN)
209 return (0);
210 break;
211
212 case MII_DOWN:
213 mii_phy_down(sc);
214 return (0);
215 }
216
217
218 mii_phy_status(sc);
219
220
221 mii_phy_update(sc, cmd);
222 return (0);
223 }
224
225 void
226 icsphy_status(sc)
227 struct mii_softc *sc;
228 {
229 struct mii_data *mii = sc->mii_pdata;
230 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
231 int bmcr, qpr;
232
233 mii->mii_media_status = IFM_AVALID;
234 mii->mii_media_active = IFM_ETHER;
235
236
237
238
239
240
241 qpr = PHY_READ(sc, MII_ICSPHY_QPR);
242 qpr = PHY_READ(sc, MII_ICSPHY_QPR);
243
244 if (qpr & QPR_LINK)
245 mii->mii_media_status |= IFM_ACTIVE;
246
247 bmcr = PHY_READ(sc, MII_BMCR);
248 if (bmcr & BMCR_ISO) {
249 mii->mii_media_active |= IFM_NONE;
250 mii->mii_media_status = 0;
251 return;
252 }
253
254 if (bmcr & BMCR_LOOP)
255 mii->mii_media_active |= IFM_LOOP;
256
257 if (bmcr & BMCR_AUTOEN) {
258 if ((qpr & QPR_ACOMP) == 0) {
259
260 mii->mii_media_active |= IFM_NONE;
261 return;
262 }
263
264 if (qpr & QPR_SPEED)
265 mii->mii_media_active |= IFM_100_TX;
266 else
267 mii->mii_media_active |= IFM_10_T;
268
269 if (qpr & QPR_FDX)
270 mii->mii_media_active |= IFM_FDX;
271 else
272 mii->mii_media_active |= IFM_HDX;
273 } else
274 mii->mii_media_active = ife->ifm_media;
275 }
276
277 void
278 icsphy_reset(sc)
279 struct mii_softc *sc;
280 {
281
282 mii_phy_reset(sc);
283 PHY_WRITE(sc, MII_ICSPHY_ECR2, ECR2_10TPROT|ECR2_Q10T);
284
285
286
287
288
289 PHY_WRITE(sc, MII_BMCR, BMCR_S100|BMCR_AUTOEN|BMCR_FDX);
290
291 }