root/dev/ic/acx100.c

DEFINITIONS

1. acx100_set_param
2. acx100_init
3. acx100_init_wep
4. acx100_init_tmplt
5. acx100_init_fw_ring
6. acx100_init_memory
7. acx100_init_fw_txring
8. acx100_init_fw_rxring
9. acx100_read_config
10. acx100_write_config
11. acx100_set_txpower
12. acx100_set_fw_txdesc_rate
13. acx100_set_bss_join_param
14. acx100_set_wepkey
15. acx100_proc_wep_rxbuf

    1 /*      $OpenBSD: acx100.c,v 1.20 2007/07/18 19:24:21 damien Exp $ */
    3 /*
    4  * Copyright (c) 2006 Jonathan Gray <jsg@openbsd.org>
    5  *
    6  * Permission to use, copy, modify, and distribute this software for any
    7  * purpose with or without fee is hereby granted, provided that the above
    8  * copyright notice and this permission notice appear in all copies.
    9  *
   10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
   12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
   13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
   14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
   15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
   16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
   17  */
   19 /*
   20  * Copyright (c) 2006 The DragonFly Project.  All rights reserved.
   21  *
   22  * This code is derived from software contributed to The DragonFly Project
   23  * by Sepherosa Ziehau <sepherosa@gmail.com>
   24  *
   25  * Redistribution and use in source and binary forms, with or without
   26  * modification, are permitted provided that the following conditions
   27  * are met:
   28  *
   29  * 1. Redistributions of source code must retain the above copyright
   30  *    notice, this list of conditions and the following disclaimer.
   31  * 2. Redistributions in binary form must reproduce the above copyright
   32  *    notice, this list of conditions and the following disclaimer in
   33  *    the documentation and/or other materials provided with the
   34  *    distribution.
   35  * 3. Neither the name of The DragonFly Project nor the names of its
   36  *    contributors may be used to endorse or promote products derived
   37  *    from this software without specific, prior written permission.
   38  *
   39  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
   40  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
   41  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
   42  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
   43  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
   44  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
   45  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   46  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
   47  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
   48  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
   49  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   50  * SUCH DAMAGE.
   51  */
   53 #include <sys/param.h>
   54 #include <sys/systm.h>
   55 #include <sys/mbuf.h>
   56 #include <sys/endian.h>
   57 #include <sys/socket.h>
   58 #include <sys/sysctl.h>
   59 #include <sys/device.h>
   61 #include <machine/bus.h>
   63 #include <net/if.h>
   64 #include <net/if_arp.h>
   65 #include <net/if_media.h>
   67 #ifdef INET
   68 #include <netinet/in.h>
   69 #include <netinet/if_ether.h>
   70 #endif
   72 #include <net80211/ieee80211_var.h>
   73 #include <net80211/ieee80211_amrr.h>
   74 #include <net80211/ieee80211_radiotap.h>
   76 #include <dev/pci/pcireg.h>
   78 #include <dev/ic/acxvar.h>
   79 #include <dev/ic/acxreg.h>
   81 #define ACX100_CONF_FW_RING     0x0003
   82 #define ACX100_CONF_MEMOPT      0x0005
   84 #define ACX100_INTR_ENABLE      (ACXRV_INTR_TX_FINI | ACXRV_INTR_RX_FINI)
   85 /*
   86  * XXX do we really care about following interrupts?
   87  *
   88  * ACXRV_INTR_INFO | ACXRV_INTR_SCAN_FINI
   89  */
   91 #define ACX100_INTR_DISABLE     (uint16_t)~(ACXRV_INTR_UNKN)
   93 #define ACX100_RATE(rate)       ((rate) * 5)
   95 #define ACX100_TXPOWER          18
   96 #define ACX100_GPIO_POWER_LED   0x0800
   97 #define ACX100_EE_EADDR_OFS     0x1a
   99 #define ACX100_FW_TXRING_SIZE   (ACX_TX_DESC_CNT * sizeof(struct acx_fw_txdesc))
  100 #define ACX100_FW_RXRING_SIZE   (ACX_RX_DESC_CNT * sizeof(struct acx_fw_rxdesc))
  102 int     acx100_init(struct acx_softc *);
  103 int     acx100_init_wep(struct acx_softc *);
  104 int     acx100_init_tmplt(struct acx_softc *);
  105 int     acx100_init_fw_ring(struct acx_softc *);
  106 int     acx100_init_memory(struct acx_softc *);
  107 void    acx100_init_fw_txring(struct acx_softc *, uint32_t);
  108 void    acx100_init_fw_rxring(struct acx_softc *, uint32_t);
  109 int     acx100_read_config(struct acx_softc *, struct acx_config *);
  110 int     acx100_write_config(struct acx_softc *, struct acx_config *);
  111 int     acx100_set_txpower(struct acx_softc *);
  112 void    acx100_set_fw_txdesc_rate(struct acx_softc *,
  113             struct acx_txbuf *, int);
  114 void    acx100_set_bss_join_param(struct acx_softc *, void *, int);
  115 int     acx100_set_wepkey(struct acx_softc *, struct ieee80211_key *, int);
  116 void    acx100_proc_wep_rxbuf(struct acx_softc *, struct mbuf *, int *);
  118 /*
  119  * NOTE:
  120  * Following structs' fields are little endian
  121  */
  122 struct acx100_bss_join {
uint8_t dtim_intvl;
uint8_t basic_rates;
uint8_t all_rates;
  126 } __packed;
  128 struct acx100_conf_fw_ring {
  129         struct acx_conf confcom;
uint32_t        fw_ring_size;   /* total size of fw (tx + rx) ring */
uint32_t        fw_rxring_addr; /* start phyaddr of fw rx desc */
uint8_t         opt;            /* see ACX100_RINGOPT_ */
uint8_t         fw_txring_num;  /* num of TX ring */
uint8_t         fw_rxdesc_num;  /* num of fw rx desc */
uint8_t         reserved0;
uint32_t        fw_ring_end[2]; /* see ACX100_SET_RING_END() */
uint32_t        fw_txring_addr; /* start phyaddr of fw tx desc */
uint8_t         fw_txring_prio; /* see ACX100_TXRING_PRIO_ */
uint8_t         fw_txdesc_num;  /* num of fw tx desc */
uint16_t        reserved1;
  141 } __packed;
  143 #define ACX100_RINGOPT_AUTO_RESET       0x1
  144 #define ACX100_TXRING_PRIO_DEFAULT      0
  145 #define ACX100_SET_RING_END(conf, end)                  \
  146 do {                                                    \
  147         (conf)->fw_ring_end[0] = htole32(end);          \
  148         (conf)->fw_ring_end[1] = htole32(end + 8);      \
  149 } while (0)
  151 struct acx100_conf_memblk_size {
  152         struct acx_conf confcom;
uint16_t        memblk_size;    /* size of each mem block */
  154 } __packed;
  156 struct acx100_conf_mem {
  157         struct acx_conf confcom;
uint32_t        opt;            /* see ACX100_MEMOPT_ */
uint32_t        h_rxring_paddr; /* host rx desc start phyaddr */
  161         /*
  162          * Memory blocks are controled by hardware
  163          * once after they are initialized
  164          */
uint32_t        rx_memblk_addr; /* start addr of rx mem blocks */
uint32_t        tx_memblk_addr; /* start addr of tx mem blocks */
uint16_t        rx_memblk_num;  /* num of RX mem block */
uint16_t        tx_memblk_num;  /* num of TX mem block */
  169 } __packed;
  171 #define ACX100_MEMOPT_MEM_INSTR         0x00000000 /* memory access instruct */
  172 #define ACX100_MEMOPT_HOSTDESC          0x00010000 /* host indirect desc */
  173 #define ACX100_MEMOPT_MEMBLOCK          0x00020000 /* local mem block list */
  174 #define ACX100_MEMOPT_IO_INSTR          0x00040000 /* IO instruct */
  175 #define ACX100_MEMOPT_PCICONF           0x00080000 /* PCI conf space */
  177 #define ACX100_MEMBLK_ALIGN             0x20
  179 struct acx100_conf_cca_mode {
  180         struct acx_conf confcom;
uint8_t         cca_mode;
uint8_t         unknown;
  183 } __packed;
  185 struct acx100_conf_ed_thresh {
  186         struct acx_conf confcom;
uint8_t         ed_thresh;
uint8_t         unknown[3];
  189 } __packed;
  191 struct acx100_conf_wepkey {
  192         struct acx_conf confcom;
uint8_t         action; /* see ACX100_WEPKEY_ACT_ */
uint8_t         key_len;
uint8_t         key_idx;
  196 #define ACX100_WEPKEY_LEN       29
uint8_t         key[ACX100_WEPKEY_LEN];
  198 } __packed;
  200 #define ACX100_WEPKEY_ACT_ADD   1
  202 static const uint16_t   acx100_reg[ACXREG_MAX] = {
ACXREG(SOFT_RESET,              0x0000),
ACXREG(FWMEM_ADDR,              0x0014),
ACXREG(FWMEM_DATA,              0x0018),
ACXREG(FWMEM_CTRL,              0x001c),
ACXREG(FWMEM_START,             0x0020),
ACXREG(EVENT_MASK,              0x0034),
ACXREG(INTR_TRIG,               0x007c),
ACXREG(INTR_MASK,               0x0098),
ACXREG(INTR_STATUS,             0x00a4),
ACXREG(INTR_STATUS_CLR,         0x00a8),
ACXREG(INTR_ACK,                0x00ac),
ACXREG(HINTR_TRIG,              0x00b0),
ACXREG(RADIO_ENABLE,            0x0104),
ACXREG(EEPROM_INIT,             0x02d0),
ACXREG(EEPROM_CTRL,             0x0250),
ACXREG(EEPROM_ADDR,             0x0254),
ACXREG(EEPROM_DATA,             0x0258),
ACXREG(EEPROM_CONF,             0x025c),
ACXREG(EEPROM_INFO,             0x02ac),
ACXREG(PHY_ADDR,                0x0268),
ACXREG(PHY_DATA,                0x026c),
ACXREG(PHY_CTRL,                0x0270),
ACXREG(GPIO_OUT_ENABLE,         0x0290),
ACXREG(GPIO_OUT,                0x0298),
ACXREG(CMD_REG_OFFSET,          0x02a4),
ACXREG(INFO_REG_OFFSET,         0x02a8),
ACXREG(RESET_SENSE,             0x02d4),
ACXREG(ECPU_CTRL,               0x02d8)
  240 };
  242 static const uint8_t    acx100_txpower_maxim[21] = {
  243         63, 63, 63, 62,
  244         61, 61, 60, 60,
  245         59, 58, 57, 55,
  246         53, 50, 47, 43,
  247         38, 31, 23, 13,
  248         0
  249 };
  251 static const uint8_t    acx100_txpower_rfmd[21] = {
  252          0,  0,  0,  1,
  253          2,  2,  3,  3,
  254          4,  5,  6,  8,
  255         10, 13, 16, 20,
  256         25, 32, 41, 50,
  257         63
  258 };
  260 void
acx100_set_param(struct acx_softc *sc)
  262 {
sc->chip_mem1_rid = PCIR_BAR(1);
sc->chip_mem2_rid = PCIR_BAR(2);
sc->chip_ioreg = acx100_reg;
sc->chip_hw_crypt = 1;
sc->chip_intr_enable = ACX100_INTR_ENABLE;
sc->chip_intr_disable = ACX100_INTR_DISABLE;
sc->chip_gpio_pled = ACX100_GPIO_POWER_LED;
sc->chip_ee_eaddr_ofs = ACX100_EE_EADDR_OFS;
sc->chip_txdesc1_len = ACX_FRAME_HDRLEN;
sc->chip_fw_txdesc_ctrl = DESC_CTRL_AUTODMA |
DESC_CTRL_RECLAIM | DESC_CTRL_FIRST_FRAG;
sc->chip_phymode = IEEE80211_MODE_11B;
sc->chip_chan_flags = IEEE80211_CHAN_B;
sc->sc_ic.ic_phytype = IEEE80211_T_DS;
sc->sc_ic.ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
sc->chip_init = acx100_init;
sc->chip_set_wepkey = acx100_set_wepkey;
sc->chip_read_config = acx100_read_config;
sc->chip_write_config = acx100_write_config;
sc->chip_set_fw_txdesc_rate = acx100_set_fw_txdesc_rate;
sc->chip_set_bss_join_param = acx100_set_bss_join_param;
sc->chip_proc_wep_rxbuf = acx100_proc_wep_rxbuf;
  287 }
  289 int
acx100_init(struct acx_softc *sc)
  291 {
  292         struct ifnet *ifp = &sc->sc_ic.ic_if;
  294         /*
  295          * NOTE:
  296          * Order of initialization:
  297          * 1) WEP
  298          * 2) Templates
  299          * 3) Firmware TX/RX ring
  300          * 4) Hardware memory
  301          * Above order is critical to get a correct memory map
  302          */
  303         if (acx100_init_wep(sc) != 0) {
printf("%s: %s can't initialize wep\n",
ifp->if_xname, __func__);
  306                 return (ENXIO);
  307         }
  309         if (acx100_init_tmplt(sc) != 0) {
printf("%s: %s can't initialize templates\n",
ifp->if_xname, __func__);
  312                 return (ENXIO);
  313         }
  315         if (acx100_init_fw_ring(sc) != 0) {
printf("%s: %s can't initialize fw ring\n",
ifp->if_xname, __func__);
  318                 return (ENXIO);
  319         }
  321         if (acx100_init_memory(sc) != 0) {
printf("%s: %s can't initialize hw memory\n",
ifp->if_xname, __func__);
  324                 return (ENXIO);
  325         }
  327         return (0);
  328 }
  330 int
acx100_init_wep(struct acx_softc *sc)
  332 {
  333         struct acx_conf_wepopt wep_opt;
  334         struct acx_conf_mmap mem_map;
  335         struct ifnet *ifp = &sc->sc_ic.ic_if;
  337         /* Set WEP cache start/end address */
  338         if (acx_get_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
printf("%s: can't get mmap\n", ifp->if_xname);
  340                 return (1);
  341         }
mem_map.wep_cache_start = htole32(letoh32(mem_map.code_end) + 4);
mem_map.wep_cache_end = htole32(letoh32(mem_map.code_end) + 4);
  345         if (acx_set_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
printf("%s: can't set mmap\n", ifp->if_xname);
  347                 return (1);
  348         }
  350         /* Set WEP options */
wep_opt.nkey = htole16(IEEE80211_WEP_NKID + 10);
wep_opt.opt = WEPOPT_HDWEP;
  353         if (acx_set_conf(sc, ACX_CONF_WEPOPT, &wep_opt, sizeof(wep_opt)) != 0) {
printf("%s: can't set wep opt\n", ifp->if_xname);
  355                 return (1);
  356         }
  358         return (0);
  359 }
  361 int
acx100_init_tmplt(struct acx_softc *sc)
  363 {
  364         struct acx_conf_mmap mem_map;
  365         struct ifnet *ifp = &sc->sc_ic.ic_if;
  367         /* Set templates start address */
  368         if (acx_get_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
printf("%s: can't get mmap\n", ifp->if_xname);
  370                 return (1);
  371         }
mem_map.pkt_tmplt_start = mem_map.wep_cache_end;
  374         if (acx_set_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
printf("%s: can't set mmap\n", ifp->if_xname);
  376                 return (1);
  377         }
  379         /* Initialize various packet templates */
  380         if (acx_init_tmplt_ordered(sc) != 0) {
printf("%s: can't init tmplt\n", ifp->if_xname);
  382                 return (1);
  383         }
  385         return (0);
  386 }
  388 int
acx100_init_fw_ring(struct acx_softc *sc)
  390 {
  391         struct acx100_conf_fw_ring ring;
  392         struct acx_conf_mmap mem_map;
  393         struct ifnet *ifp = &sc->sc_ic.ic_if;
uint32_t txring_start, rxring_start, ring_end;
  396         /* Set firmware descriptor ring start address */
  397         if (acx_get_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
printf("%s: can't get mmap\n", ifp->if_xname);
  399                 return (1);
  400         }
txring_start = letoh32(mem_map.pkt_tmplt_end) + 4;
rxring_start = txring_start + ACX100_FW_TXRING_SIZE;
ring_end = rxring_start + ACX100_FW_RXRING_SIZE;
mem_map.fw_desc_start = htole32(txring_start);
  407         if (acx_set_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
printf("%s: can't set mmap\n", ifp->if_xname);
  409                 return (1);
  410         }
  412         /* Set firmware descriptor ring configure */
bzero(&ring, sizeof(ring));
ring.fw_ring_size = htole32(ACX100_FW_TXRING_SIZE +
ACX100_FW_RXRING_SIZE + 8);
ring.fw_txring_num = 1;
ring.fw_txring_addr = htole32(txring_start);
ring.fw_txring_prio = ACX100_TXRING_PRIO_DEFAULT;
ring.fw_txdesc_num = 0; /* XXX ignored?? */
ring.fw_rxring_addr = htole32(rxring_start);
ring.fw_rxdesc_num = 0; /* XXX ignored?? */
ring.opt = ACX100_RINGOPT_AUTO_RESET;
ACX100_SET_RING_END(&ring, ring_end);
  427         if (acx_set_conf(sc, ACX100_CONF_FW_RING, &ring, sizeof(ring)) != 0) {
printf("%s: can't set fw ring configure\n", ifp->if_xname);
  429                 return (1);
  430         }
  432         /* Setup firmware TX/RX descriptor ring */
acx100_init_fw_txring(sc, txring_start);
acx100_init_fw_rxring(sc, rxring_start);
  436         return (0);
  437 }
  439 #define MEMBLK_ALIGN(addr)      \
  440     (((addr) + (ACX100_MEMBLK_ALIGN - 1)) & ~(ACX100_MEMBLK_ALIGN - 1))
  442 int
acx100_init_memory(struct acx_softc *sc)
  444 {
  445         struct acx100_conf_memblk_size memblk_sz;
  446         struct acx100_conf_mem mem;
  447         struct acx_conf_mmap mem_map;
  448         struct ifnet *ifp = &sc->sc_ic.ic_if;
uint32_t memblk_start, memblk_end;
  450         int total_memblk, txblk_num, rxblk_num;
  452         /* Set memory block start address */
  453         if (acx_get_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
printf("%s: can't get mmap\n", ifp->if_xname);
  455                 return (1);
  456         }
mem_map.memblk_start =
htole32(MEMBLK_ALIGN(letoh32(mem_map.fw_desc_end) + 4));
  461         if (acx_set_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
printf("%s: can't set mmap\n", ifp->if_xname);
  463                 return (1);
  464         }
  466         /* Set memory block size */
memblk_sz.memblk_size = htole16(ACX_MEMBLOCK_SIZE);
  468         if (acx_set_conf(sc, ACX_CONF_MEMBLK_SIZE, &memblk_sz,
  469             sizeof(memblk_sz)) != 0) {
printf("%s: can't set mem block size\n", ifp->if_xname);
  471                 return (1);
  472         }
  474         /* Get memory map after setting it */
  475         if (acx_get_conf(sc, ACX_CONF_MMAP, &mem_map, sizeof(mem_map)) != 0) {
printf("%s: can't get mmap again\n", ifp->if_xname);
  477                 return (1);
  478         }
memblk_start = letoh32(mem_map.memblk_start);
memblk_end = letoh32(mem_map.memblk_end);
  482         /* Set memory options */
mem.opt = htole32(ACX100_MEMOPT_MEMBLOCK | ACX100_MEMOPT_HOSTDESC);
mem.h_rxring_paddr = htole32(sc->sc_ring_data.rx_ring_paddr);
total_memblk = (memblk_end - memblk_start) / ACX_MEMBLOCK_SIZE;
rxblk_num = total_memblk / 2;           /* 50% */
txblk_num = total_memblk - rxblk_num;   /* 50% */
DPRINTF(("%s: \ttotal memory blocks\t%d\n"
  492             "\trx memory blocks\t%d\n"
  493             "\ttx memory blocks\t%d\n",
ifp->if_xname, total_memblk, rxblk_num, txblk_num));
mem.rx_memblk_num = htole16(rxblk_num);
mem.tx_memblk_num = htole16(txblk_num);
mem.rx_memblk_addr = htole32(MEMBLK_ALIGN(memblk_start));
mem.tx_memblk_addr = htole32(MEMBLK_ALIGN(memblk_start +
  501             (ACX_MEMBLOCK_SIZE * rxblk_num)));
  503         if (acx_set_conf(sc, ACX100_CONF_MEMOPT, &mem, sizeof(mem)) != 0) {
printf("%s: can't set mem options\n", ifp->if_xname);
  505                 return (1);
  506         }
  508         /* Initialize memory */
  509         if (acx_exec_command(sc, ACXCMD_INIT_MEM, NULL, 0, NULL, 0) != 0) {
printf("%s: can't init mem\n", ifp->if_xname);
  511                 return (1);
  512         }
  514         return (0);
  515 }
  517 #undef MEMBLK_ALIGN
  519 void
acx100_init_fw_txring(struct acx_softc *sc, uint32_t fw_txdesc_start)
  521 {
  522         struct acx_fw_txdesc fw_desc;
  523         struct acx_txbuf *tx_buf;
uint32_t desc_paddr, fw_desc_offset;
  525         int i;
bzero(&fw_desc, sizeof(fw_desc));
fw_desc.f_tx_ctrl = DESC_CTRL_HOSTOWN | DESC_CTRL_RECLAIM |
DESC_CTRL_AUTODMA | DESC_CTRL_FIRST_FRAG;
tx_buf = sc->sc_buf_data.tx_buf;
fw_desc_offset = fw_txdesc_start;
desc_paddr = sc->sc_ring_data.tx_ring_paddr;
  535         for (i = 0; i < ACX_TX_DESC_CNT; ++i) {
fw_desc.f_tx_host_desc = htole32(desc_paddr);
  538                 if (i == ACX_TX_DESC_CNT - 1) {
fw_desc.f_tx_next_desc = htole32(fw_txdesc_start);
  540                 } else {
fw_desc.f_tx_next_desc = htole32(fw_desc_offset +
  542                             sizeof(struct acx_fw_txdesc));
  543                 }
tx_buf[i].tb_fwdesc_ofs = fw_desc_offset;
DESC_WRITE_REGION_1(sc, fw_desc_offset, &fw_desc,
  547                     sizeof(fw_desc));
desc_paddr += (2 * sizeof(struct acx_host_desc));
fw_desc_offset += sizeof(fw_desc);
  551         }
  552 }
  554 void
acx100_init_fw_rxring(struct acx_softc *sc, uint32_t fw_rxdesc_start)
  556 {
  557         struct acx_fw_rxdesc fw_desc;
uint32_t fw_desc_offset;
  559         int i;
bzero(&fw_desc, sizeof(fw_desc));
fw_desc.f_rx_ctrl = DESC_CTRL_RECLAIM | DESC_CTRL_AUTODMA;
fw_desc_offset = fw_rxdesc_start;
  566         for (i = 0; i < ACX_RX_DESC_CNT; ++i) {
  567                 if (i == ACX_RX_DESC_CNT - 1) {
fw_desc.f_rx_next_desc = htole32(fw_rxdesc_start);
  569                 } else {
fw_desc.f_rx_next_desc =
htole32(fw_desc_offset +
  572                             sizeof(struct acx_fw_rxdesc));
  573                 }
DESC_WRITE_REGION_1(sc, fw_desc_offset, &fw_desc,
  576                     sizeof(fw_desc));
fw_desc_offset += sizeof(fw_desc);
  579         }
  580 }
  582 int
acx100_read_config(struct acx_softc *sc, struct acx_config *conf)
  584 {
  585         struct acx100_conf_cca_mode cca;
  586         struct acx100_conf_ed_thresh ed;
  587         struct ifnet *ifp = &sc->sc_ic.ic_if;
  589         /*
  590          * NOTE:
  591          * CCA mode and ED threshold MUST be read during initialization
  592          * or the acx100 card won't work as expected
  593          */
  595         /* Get CCA mode */
  596         if (acx_get_conf(sc, ACX_CONF_CCA_MODE, &cca, sizeof(cca)) != 0) {
printf("%s: %s can't get cca mode\n",
ifp->if_xname, __func__);
  599                 return (ENXIO);
  600         }
conf->cca_mode = cca.cca_mode;
DPRINTF(("%s: cca mode %02x\n", ifp->if_xname, cca.cca_mode));
  604         /* Get ED threshold */
  605         if (acx_get_conf(sc, ACX_CONF_ED_THRESH, &ed, sizeof(ed)) != 0) {
printf("%s: %s can't get ed threshold\n",
ifp->if_xname, __func__);
  608                 return (ENXIO);
  609         }
conf->ed_thresh = ed.ed_thresh;
DPRINTF(("%s: ed threshold %02x\n", ifp->if_xname, ed.ed_thresh));
  613         return (0);
  614 }
  616 int
acx100_write_config(struct acx_softc *sc, struct acx_config *conf)
  618 {
  619         struct acx100_conf_cca_mode cca;
  620         struct acx100_conf_ed_thresh ed;
  621         struct ifnet *ifp = &sc->sc_ic.ic_if;
  623         /* Set CCA mode */
cca.cca_mode = conf->cca_mode;
  625         if (acx_set_conf(sc, ACX_CONF_CCA_MODE, &cca, sizeof(cca)) != 0) {
printf("%s: %s can't set cca mode\n",
ifp->if_xname, __func__);
  628                 return (ENXIO);
  629         }
  631         /* Set ED threshold */
ed.ed_thresh = conf->ed_thresh;
  633         if (acx_set_conf(sc, ACX_CONF_ED_THRESH, &ed, sizeof(ed)) != 0) {
printf("%s: %s can't set ed threshold\n",
ifp->if_xname, __func__);
  636                 return (ENXIO);
  637         }
  639         /* Set TX power */
acx100_set_txpower(sc); /* ignore return value */
  642         return (0);
  643 }
  645 int
acx100_set_txpower(struct acx_softc *sc)
  647 {
  648         struct ifnet *ifp = &sc->sc_ic.ic_if;
  649         const uint8_t *map;
  651         switch (sc->sc_radio_type) {
  652         case ACX_RADIO_TYPE_MAXIM:
map = acx100_txpower_maxim;
  654                 break;
  655         case ACX_RADIO_TYPE_RFMD:
  656         case ACX_RADIO_TYPE_RALINK:
map = acx100_txpower_rfmd;
  658                 break;
  659         default:
printf("%s: TX power for radio type 0x%02x can't be set yet\n",
ifp->if_xname, sc->sc_radio_type);
  662                 return (1);
  663         }
acx_write_phyreg(sc, ACXRV_PHYREG_TXPOWER, map[ACX100_TXPOWER]);
  667         return (0);
  668 }
  670 void
acx100_set_fw_txdesc_rate(struct acx_softc *sc, struct acx_txbuf *tx_buf,
  672     int rate)
  673 {
FW_TXDESC_SETFIELD_1(sc, tx_buf, f_tx_rate100, ACX100_RATE(rate));
  675 }
  677 void
acx100_set_bss_join_param(struct acx_softc *sc, void *param, int dtim_intvl)
  679 {
  680         struct acx100_bss_join *bj = param;
bj->dtim_intvl = dtim_intvl;
bj->basic_rates = 15;   /* XXX */
bj->all_rates = 31;     /* XXX */
  685 }
  687 int
acx100_set_wepkey(struct acx_softc *sc, struct ieee80211_key *k, int k_idx)
  689 {
  690         struct acx100_conf_wepkey conf_wk;
  691         struct ifnet *ifp = &sc->sc_ic.ic_if;
  693         if (k->k_len > ACX100_WEPKEY_LEN) {
printf("%s: %dth WEP key size beyond %d\n",
ifp->if_xname, k_idx, ACX100_WEPKEY_LEN);
  696                 return EINVAL;
  697         }
conf_wk.action = ACX100_WEPKEY_ACT_ADD;
conf_wk.key_len = k->k_len;
conf_wk.key_idx = k_idx;
bcopy(k->k_key, conf_wk.key, k->k_len);
  703         if (acx_set_conf(sc, ACX_CONF_WEPKEY, &conf_wk, sizeof(conf_wk)) != 0) {
printf("%s: %s set %dth WEP key failed\n",
ifp->if_xname, __func__, k_idx);
  706                 return ENXIO;
  707         }
  708         return 0;
  709 }
  711 void
acx100_proc_wep_rxbuf(struct acx_softc *sc, struct mbuf *m, int *len)
  713 {
  714         int mac_hdrlen;
  715         struct ieee80211_frame *f;
  717         /*
  718          * Strip leading IV and KID, and trailing CRC
  719          */
f = mtod(m, struct ieee80211_frame *);
  722         if ((f->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS)
mac_hdrlen = sizeof(struct ieee80211_frame_addr4);
  724         else
mac_hdrlen = sizeof(struct ieee80211_frame);
  727 #define IEEEWEP_IVLEN   (IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN)
  728 #define IEEEWEP_EXLEN   (IEEEWEP_IVLEN + IEEE80211_WEP_CRCLEN)
  730         *len = *len - IEEEWEP_EXLEN;
  732         /* Move MAC header toward frame body */
ovbcopy(f, (uint8_t *)f + IEEEWEP_IVLEN, mac_hdrlen);
m_adj(m, IEEEWEP_IVLEN);
  736 #undef IEEEWEP_EXLEN
  737 #undef IEEEWEP_IVLEN
  738 }