root/dev/usb/ehci.c

DEFINITIONS

1. ehci_reverse_bits
2. ehci_init
3. ehci_intr
4. ehci_intr1
5. ehci_pcd_able
6. ehci_pcd_enable
7. ehci_pcd
8. ehci_softintr
9. ehci_check_intr
10. ehci_idone
11. ehci_waitintr
12. ehci_poll
13. ehci_detach
14. ehci_activate
15. ehci_power
16. ehci_shutdown
17. ehci_allocm
18. ehci_freem
19. ehci_allocx
20. ehci_freex
21. ehci_device_clear_toggle
22. ehci_noop
23. ehci_dump_regs
24. ehci_dump
25. ehci_dump_link
26. ehci_dump_sqtds
27. ehci_dump_sqtd
28. ehci_dump_qtd
29. ehci_dump_sqh
30. ehci_dump_exfer
31. ehci_open
32. ehci_add_qh
33. ehci_rem_qh
34. ehci_set_qh_qtd
35. ehci_sync_hc
36. ehci_str
37. ehci_root_ctrl_transfer
38. ehci_root_ctrl_start
39. ehci_disown
40. ehci_root_ctrl_abort
41. ehci_root_ctrl_close
42. ehci_root_intr_done
43. ehci_root_intr_transfer
44. ehci_root_intr_start
45. ehci_root_intr_abort
46. ehci_root_intr_close
47. ehci_root_ctrl_done
48. ehci_alloc_sqh
49. ehci_free_sqh
50. ehci_alloc_sqtd
51. ehci_free_sqtd
52. ehci_alloc_sqtd_chain
53. ehci_free_sqtd_chain
54. ehci_close_pipe
55. ehci_abort_xfer
56. ehci_timeout
57. ehci_timeout_task
58. ehci_intrlist_timeout
59. ehci_device_ctrl_transfer
60. ehci_device_ctrl_start
61. ehci_device_ctrl_done
62. ehci_device_ctrl_abort
63. ehci_device_ctrl_close
64. ehci_device_request
65. ehci_device_bulk_transfer
66. ehci_device_bulk_start
67. ehci_device_bulk_abort
68. ehci_device_bulk_close
69. ehci_device_bulk_done
70. ehci_device_setintr
71. ehci_device_intr_transfer
72. ehci_device_intr_start
73. ehci_device_intr_abort
74. ehci_device_intr_close
75. ehci_device_intr_done
76. ehci_device_isoc_transfer
77. ehci_device_isoc_start
78. ehci_device_isoc_abort
79. ehci_device_isoc_close
80. ehci_device_isoc_done

    1 /*      $OpenBSD: ehci.c,v 1.77 2007/06/15 11:41:47 mbalmer Exp $ */
    2 /*      $NetBSD: ehci.c,v 1.66 2004/06/30 03:11:56 mycroft Exp $        */
    4 /*
    5  * Copyright (c) 2004 The NetBSD Foundation, Inc.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software contributed to The NetBSD Foundation
    9  * by Lennart Augustsson (lennart@augustsson.net) and by Charles M. Hannum.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  * 3. All advertising materials mentioning features or use of this software
   20  *    must display the following acknowledgement:
   21  *        This product includes software developed by the NetBSD
   22  *        Foundation, Inc. and its contributors.
   23  * 4. Neither the name of The NetBSD Foundation nor the names of its
   24  *    contributors may be used to endorse or promote products derived
   25  *    from this software without specific prior written permission.
   26  *
   27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   37  * POSSIBILITY OF SUCH DAMAGE.
   38  */
   40 /*
   41  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
   42  *
   43  * The EHCI 1.0 spec can be found at
   44  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
   45  * and the USB 2.0 spec at
   46  * http://www.usb.org/developers/docs/usb_20.zip
   47  */
   49 /*
   50  * TODO:
   51  * 1) The meaty part to implement is isochronous transactions. They are
   52  *    needed for USB 1 devices below USB 2.0 hubs. They are quite complicated
   53  *    since they need to be able to do "transaction translation", ie,
   54  *    converting to/from USB 2 and USB 1.
   55  *    So the hub driver needs to handle and schedule these things, to
   56  *    assign place in frame where different devices get to go. See chapter
   57  *    on hubs in USB 2.0 for details.
   58  *
   59  * 2) Command failures are not recovered correctly.
   60 */
   62 #include <sys/param.h>
   63 #include <sys/systm.h>
   64 #include <sys/kernel.h>
   65 #include <sys/rwlock.h>
   66 #include <sys/malloc.h>
   67 #include <sys/device.h>
   68 #include <sys/selinfo.h>
   69 #include <sys/proc.h>
   70 #include <sys/queue.h>
   71 #include <sys/timeout.h>
   73 #include <machine/bus.h>
   74 #include <machine/endian.h>
   76 #include <dev/usb/usb.h>
   77 #include <dev/usb/usbdi.h>
   78 #include <dev/usb/usbdivar.h>
   79 #include <dev/usb/usb_mem.h>
   80 #include <dev/usb/usb_quirks.h>
   82 #include <dev/usb/ehcireg.h>
   83 #include <dev/usb/ehcivar.h>
   85 #include <dev/rndvar.h>
   87 struct cfdriver ehci_cd = {
NULL, "ehci", DV_DULL
   89 };
   91 #ifdef USB_DEBUG
   92 #define EHCI_DEBUG
   93 #endif
   95 #ifdef EHCI_DEBUG
   96 #define DPRINTF(x)      do { if (ehcidebug) printf x; } while(0)
   97 #define DPRINTFN(n,x)   do { if (ehcidebug>(n)) printf x; } while (0)
   98 int ehcidebug = 0;
   99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
  100 #else
  101 #define DPRINTF(x)
  102 #define DPRINTFN(n,x)
  103 #endif
  105 #define mstohz(ms) ((ms) * hz / 1000)
  107 struct ehci_pipe {
  108         struct usbd_pipe pipe;
ehci_soft_qh_t *sqh;
  111         union {
ehci_soft_qtd_t *qtd;
  113                 /* ehci_soft_itd_t *itd; */
  114         } tail;
  115         union {
  116                 /* Control pipe */
  117                 struct {
usb_dma_t reqdma;
u_int length;
  120                         /*ehci_soft_qtd_t *setup, *data, *stat;*/
  121                 } ctl;
  122                 /* Interrupt pipe */
  123                 struct {
u_int length;
  125                 } intr;
  126                 /* Bulk pipe */
  127                 struct {
u_int length;
  129                 } bulk;
  130                 /* Iso pipe */
  131                 /* XXX */
  132         } u;
  133 };
u_int8_t                ehci_reverse_bits(u_int8_t, int);
  137 void            ehci_power(int, void *);
usbd_status     ehci_open(usbd_pipe_handle);
  140 void            ehci_poll(struct usbd_bus *);
  141 void            ehci_softintr(void *);
  142 int             ehci_intr1(ehci_softc_t *);
  143 void            ehci_waitintr(ehci_softc_t *, usbd_xfer_handle);
  144 void            ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
  145 void            ehci_idone(struct ehci_xfer *);
  146 void            ehci_timeout(void *);
  147 void            ehci_timeout_task(void *);
  148 void            ehci_intrlist_timeout(void *);
usbd_status     ehci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
  151 void            ehci_freem(struct usbd_bus *, usb_dma_t *);
usbd_xfer_handle        ehci_allocx(struct usbd_bus *);
  154 void            ehci_freex(struct usbd_bus *, usbd_xfer_handle);
usbd_status     ehci_root_ctrl_transfer(usbd_xfer_handle);
usbd_status     ehci_root_ctrl_start(usbd_xfer_handle);
  158 void            ehci_root_ctrl_abort(usbd_xfer_handle);
  159 void            ehci_root_ctrl_close(usbd_pipe_handle);
  160 void            ehci_root_ctrl_done(usbd_xfer_handle);
usbd_status     ehci_root_intr_transfer(usbd_xfer_handle);
usbd_status     ehci_root_intr_start(usbd_xfer_handle);
  164 void            ehci_root_intr_abort(usbd_xfer_handle);
  165 void            ehci_root_intr_close(usbd_pipe_handle);
  166 void            ehci_root_intr_done(usbd_xfer_handle);
usbd_status     ehci_device_ctrl_transfer(usbd_xfer_handle);
usbd_status     ehci_device_ctrl_start(usbd_xfer_handle);
  170 void            ehci_device_ctrl_abort(usbd_xfer_handle);
  171 void            ehci_device_ctrl_close(usbd_pipe_handle);
  172 void            ehci_device_ctrl_done(usbd_xfer_handle);
usbd_status     ehci_device_bulk_transfer(usbd_xfer_handle);
usbd_status     ehci_device_bulk_start(usbd_xfer_handle);
  176 void            ehci_device_bulk_abort(usbd_xfer_handle);
  177 void            ehci_device_bulk_close(usbd_pipe_handle);
  178 void            ehci_device_bulk_done(usbd_xfer_handle);
usbd_status     ehci_device_intr_transfer(usbd_xfer_handle);
usbd_status     ehci_device_intr_start(usbd_xfer_handle);
  182 void            ehci_device_intr_abort(usbd_xfer_handle);
  183 void            ehci_device_intr_close(usbd_pipe_handle);
  184 void            ehci_device_intr_done(usbd_xfer_handle);
usbd_status     ehci_device_isoc_transfer(usbd_xfer_handle);
usbd_status     ehci_device_isoc_start(usbd_xfer_handle);
  188 void            ehci_device_isoc_abort(usbd_xfer_handle);
  189 void            ehci_device_isoc_close(usbd_pipe_handle);
  190 void            ehci_device_isoc_done(usbd_xfer_handle);
  192 void            ehci_device_clear_toggle(usbd_pipe_handle pipe);
  193 void            ehci_noop(usbd_pipe_handle pipe);
  195 int             ehci_str(usb_string_descriptor_t *, int, const char *);
  196 void            ehci_pcd(ehci_softc_t *, usbd_xfer_handle);
  197 void            ehci_pcd_able(ehci_softc_t *, int);
  198 void            ehci_pcd_enable(void *);
  199 void            ehci_disown(ehci_softc_t *, int, int);
ehci_soft_qh_t  *ehci_alloc_sqh(ehci_softc_t *);
  202 void            ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
ehci_soft_qtd_t  *ehci_alloc_sqtd(ehci_softc_t *);
  205 void            ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
usbd_status     ehci_alloc_sqtd_chain(struct ehci_pipe *,
ehci_softc_t *, int, int, usbd_xfer_handle,
ehci_soft_qtd_t **, ehci_soft_qtd_t **);
  209 void            ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
ehci_soft_qtd_t *);
usbd_status     ehci_device_request(usbd_xfer_handle xfer);
usbd_status     ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
  215                             int ival);
  217 void            ehci_add_qh(ehci_soft_qh_t *, ehci_soft_qh_t *);
  218 void            ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
ehci_soft_qh_t *);
  220 void            ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
  221 void            ehci_sync_hc(ehci_softc_t *);
  223 void            ehci_close_pipe(usbd_pipe_handle, ehci_soft_qh_t *);
  224 void            ehci_abort_xfer(usbd_xfer_handle, usbd_status);
  226 #ifdef EHCI_DEBUG
  227 void            ehci_dump_regs(ehci_softc_t *);
  228 void            ehci_dump(void);
ehci_softc_t    *theehci;
  230 void            ehci_dump_link(ehci_link_t, int);
  231 void            ehci_dump_sqtds(ehci_soft_qtd_t *);
  232 void            ehci_dump_sqtd(ehci_soft_qtd_t *);
  233 void            ehci_dump_qtd(ehci_qtd_t *);
  234 void            ehci_dump_sqh(ehci_soft_qh_t *);
  235 #ifdef DIAGNOSTIC
  236 void            ehci_dump_exfer(struct ehci_xfer *);
  237 #endif
  238 #endif
  240 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
  242 #define EHCI_INTR_ENDPT 1
  244 #define ehci_add_intr_list(sc, ex) \
LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ex), inext);
  246 #define ehci_del_intr_list(ex) \
  247         do { \
LIST_REMOVE((ex), inext); \
  249                 (ex)->inext.le_prev = NULL; \
  250         } while (0)
  251 #define ehci_active_intr_list(ex) ((ex)->inext.le_prev != NULL)
  253 struct usbd_bus_methods ehci_bus_methods = {
ehci_open,
ehci_softintr,
ehci_poll,
ehci_allocm,
ehci_freem,
ehci_allocx,
ehci_freex,
  261 };
  263 struct usbd_pipe_methods ehci_root_ctrl_methods = {
ehci_root_ctrl_transfer,
ehci_root_ctrl_start,
ehci_root_ctrl_abort,
ehci_root_ctrl_close,
ehci_noop,
ehci_root_ctrl_done,
  270 };
  272 struct usbd_pipe_methods ehci_root_intr_methods = {
ehci_root_intr_transfer,
ehci_root_intr_start,
ehci_root_intr_abort,
ehci_root_intr_close,
ehci_noop,
ehci_root_intr_done,
  279 };
  281 struct usbd_pipe_methods ehci_device_ctrl_methods = {
ehci_device_ctrl_transfer,
ehci_device_ctrl_start,
ehci_device_ctrl_abort,
ehci_device_ctrl_close,
ehci_noop,
ehci_device_ctrl_done,
  288 };
  290 struct usbd_pipe_methods ehci_device_intr_methods = {
ehci_device_intr_transfer,
ehci_device_intr_start,
ehci_device_intr_abort,
ehci_device_intr_close,
ehci_device_clear_toggle,
ehci_device_intr_done,
  297 };
  299 struct usbd_pipe_methods ehci_device_bulk_methods = {
ehci_device_bulk_transfer,
ehci_device_bulk_start,
ehci_device_bulk_abort,
ehci_device_bulk_close,
ehci_device_clear_toggle,
ehci_device_bulk_done,
  306 };
  308 struct usbd_pipe_methods ehci_device_isoc_methods = {
ehci_device_isoc_transfer,
ehci_device_isoc_start,
ehci_device_isoc_abort,
ehci_device_isoc_close,
ehci_noop,
ehci_device_isoc_done,
  315 };
  317 /*
  318  * Reverse a number with nbits bits.  Used to evenly distribute lower-level
  319  * interrupt heads in the periodic schedule.
  320  * Suitable for use with EHCI_IPOLLRATES <= 9.
  321  */
u_int8_t
ehci_reverse_bits(u_int8_t c, int nbits)
  324 {
c = ((c >> 1) & 0x55) | ((c << 1) & 0xaa);
c = ((c >> 2) & 0x33) | ((c << 2) & 0xcc);
c = ((c >> 4) & 0x0f) | ((c << 4) & 0xf0);
  329         return c >> (8 - nbits);
  330 }
usbd_status
ehci_init(ehci_softc_t *sc)
  334 {
u_int32_t sparams, cparams, hcr;
u_int i, j;
usbd_status err;
ehci_soft_qh_t *sqh;
  340 #ifdef EHCI_DEBUG
u_int32_t vers;
theehci = sc;
DPRINTF(("ehci_init: start\n"));
vers = EREAD2(sc, EHCI_HCIVERSION);
DPRINTF(("%s: EHCI version %x.%x\n", sc->sc_bus.bdev.dv_xname,
vers >> 8, vers & 0xff));
  349 #endif
sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
sparams = EREAD4(sc, EHCI_HCSPARAMS);
DPRINTF(("ehci_init: sparams=0x%x\n", sparams));
sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
cparams = EREAD4(sc, EHCI_HCCPARAMS);
DPRINTF(("ehci_init: cparams=0x%x\n", cparams));
  359         /* MUST clear segment register if 64 bit capable. */
  360         if (EHCI_HCC_64BIT(cparams))
EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
sc->sc_bus.usbrev = USBREV_2_0;
  365         /* Reset the controller */
DPRINTF(("%s: resetting\n", sc->sc_bus.bdev.dv_xname));
EOWRITE4(sc, EHCI_USBCMD, 0);   /* Halt controller */
usb_delay_ms(&sc->sc_bus, 1);
EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
  370         for (i = 0; i < 100; i++) {
usb_delay_ms(&sc->sc_bus, 1);
hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
  373                 if (!hcr)
  374                         break;
  375         }
  376         if (hcr) {
printf("%s: reset timeout\n",
sc->sc_bus.bdev.dv_xname);
  379                 return (USBD_IOERROR);
  380         }
  382         /* XXX need proper intr scheduling */
sc->sc_rand = 96;
  385         /* frame list size at default, read back what we got and use that */
  386         switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
  387         case 0: sc->sc_flsize = 1024; break;
  388         case 1: sc->sc_flsize = 512; break;
  389         case 2: sc->sc_flsize = 256; break;
  390         case 3: return (USBD_IOERROR);
  391         }
err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
  394         if (err)
  395                 return (err);
DPRINTF(("%s: flsize=%d\n", sc->sc_bus.bdev.dv_xname,sc->sc_flsize));
sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
  400         /* Set up the bus struct. */
sc->sc_bus.methods = &ehci_bus_methods;
sc->sc_bus.pipe_size = sizeof(struct ehci_pipe);
sc->sc_powerhook = powerhook_establish(ehci_power, sc);
sc->sc_eintrs = EHCI_NORMAL_INTRS;
  408         /*
  409          * Allocate the interrupt dummy QHs. These are arranged to give poll
  410          * intervals that are powers of 2 times 1ms.
  411          */
  412         for (i = 0; i < EHCI_INTRQHS; i++) {
sqh = ehci_alloc_sqh(sc);
  414                 if (sqh == NULL) {
err = USBD_NOMEM;
  416                         goto bad1;
  417                 }
sc->sc_islots[i].sqh = sqh;
  419         }
  420         for (i = 0; i < EHCI_INTRQHS; i++) {
sqh = sc->sc_islots[i].sqh;
  422                 if (i == 0) {
  423                         /* The last (1ms) QH terminates. */
sqh->qh.qh_link = EHCI_NULL;
sqh->next = NULL;
  426                 } else {
  427                         /* Otherwise the next QH has half the poll interval */
sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh;
sqh->qh.qh_link = htole32(sqh->next->physaddr |
EHCI_LINK_QH);
  431                 }
sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
sqh->qh.qh_endphub = htole32(EHCI_QH_SET_MULT(1));
sqh->qh.qh_curqtd = EHCI_NULL;
sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
sqh->sqtd = NULL;
  439         }
  440         /* Point the frame list at the last level (128ms). */
  441         for (i = 0; i < (1 << (EHCI_IPOLLRATES - 1)); i++)
  442                 for (j = i; j < sc->sc_flsize; j += 1 << (EHCI_IPOLLRATES - 1))
sc->sc_flist[j] = htole32(EHCI_LINK_QH | sc->sc_islots[
EHCI_IQHIDX(EHCI_IPOLLRATES - 1, ehci_reverse_bits(
i, EHCI_IPOLLRATES - 1))].sqh->physaddr);
  447         /* Allocate dummy QH that starts the async list. */
sqh = ehci_alloc_sqh(sc);
  449         if (sqh == NULL) {
err = USBD_NOMEM;
  451                 goto bad1;
  452         }
  453         /* Fill the QH */
sqh->qh.qh_endp =
htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
sqh->qh.qh_link =
htole32(sqh->physaddr | EHCI_LINK_QH);
sqh->qh.qh_curqtd = EHCI_NULL;
sqh->prev = sqh; /*It's a circular list.. */
sqh->next = sqh;
  461         /* Fill the overlay qTD */
sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
sqh->sqtd = NULL;
  466 #ifdef EHCI_DEBUG
  467         if (ehcidebug)
ehci_dump_sqh(sqh);
  469 #endif
  471         /* Point to async list */
sc->sc_async_head = sqh;
EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
timeout_set(&sc->sc_tmo_pcd, NULL, NULL);
timeout_set(&sc->sc_tmo_intrlist, NULL, NULL);
rw_init(&sc->sc_doorbell_lock, "ehcidb");
  480         /* Turn on controller */
EOWRITE4(sc, EHCI_USBCMD,
EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
  483             (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
EHCI_CMD_ASE |
EHCI_CMD_PSE |
EHCI_CMD_RS);
  488         /* Take over port ownership */
EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
  491         for (i = 0; i < 100; i++) {
usb_delay_ms(&sc->sc_bus, 1);
hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
  494                 if (!hcr)
  495                         break;
  496         }
  497         if (hcr) {
printf("%s: run timeout\n", sc->sc_bus.bdev.dv_xname);
  499                 return (USBD_IOERROR);
  500         }
  502         /* Enable interrupts */
DPRINTFN(1,("ehci_init: enabling\n"));
EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
  506         return (USBD_NORMAL_COMPLETION);
  508 #if 0
bad2:
ehci_free_sqh(sc, sc->sc_async_head);
  511 #endif
bad1:
usb_freemem(&sc->sc_bus, &sc->sc_fldma);
  514         return (err);
  515 }
  517 int
ehci_intr(void *v)
  519 {
ehci_softc_t *sc = v;
  522         if (sc == NULL || sc->sc_dying)
  523                 return (0);
  525         /* If we get an interrupt while polling, then just ignore it. */
  526         if (sc->sc_bus.use_polling) {
u_int32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
  529                 if (intrs)
EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
  531                 return (0);
  532         }
  534         return (ehci_intr1(sc));
  535 }
  537 int
ehci_intr1(ehci_softc_t *sc)
  539 {
u_int32_t intrs, eintrs;
DPRINTFN(20,("ehci_intr1: enter\n"));
  544         /* In case the interrupt occurs before initialization has completed. */
  545         if (sc == NULL) {
  546 #ifdef DIAGNOSTIC
printf("ehci_intr1: sc == NULL\n");
  548 #endif
  549                 return (0);
  550         }
intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
  553         if (!intrs)
  554                 return (0);
eintrs = intrs & sc->sc_eintrs;
DPRINTFN(7, ("ehci_intr1: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
sc, (u_int)intrs, EOREAD4(sc, EHCI_USBSTS), (u_int)eintrs));
  559         if (!eintrs)
  560                 return (0);
EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
sc->sc_bus.intr_context++;
sc->sc_bus.no_intrs++;
  565         if (eintrs & EHCI_STS_IAA) {
DPRINTF(("ehci_intr1: door bell\n"));
wakeup(&sc->sc_async_head);
eintrs &= ~EHCI_STS_IAA;
  569         }
  570         if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
DPRINTFN(5,("ehci_intr1: %s %s\n",
eintrs & EHCI_STS_INT ? "INT" : "",
eintrs & EHCI_STS_ERRINT ? "ERRINT" : ""));
usb_schedsoftintr(&sc->sc_bus);
eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
  576         }
  577         if (eintrs & EHCI_STS_HSE) {
printf("%s: unrecoverable error, controller halted\n",
sc->sc_bus.bdev.dv_xname);
  580                 /* XXX what else */
  581         }
  582         if (eintrs & EHCI_STS_PCD) {
ehci_pcd(sc, sc->sc_intrxfer);
  584                 /*
  585                  * Disable PCD interrupt for now, because it will be
  586                  * on until the port has been reset.
  587                  */
ehci_pcd_able(sc, 0);
  589                 /* Do not allow RHSC interrupts > 1 per second */
timeout_del(&sc->sc_tmo_pcd);
timeout_set(&sc->sc_tmo_pcd, ehci_pcd_enable, sc);
timeout_add(&sc->sc_tmo_pcd, hz);
eintrs &= ~EHCI_STS_PCD;
  594         }
sc->sc_bus.intr_context--;
  598         if (eintrs != 0) {
  599                 /* Block unprocessed interrupts. */
sc->sc_eintrs &= ~eintrs;
EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
printf("%s: blocking intrs 0x%x\n",
sc->sc_bus.bdev.dv_xname, eintrs);
  604         }
  606         return (1);
  607 }
  609 void
ehci_pcd_able(ehci_softc_t *sc, int on)
  611 {
DPRINTFN(4, ("ehci_pcd_able: on=%d\n", on));
  613         if (on)
sc->sc_eintrs |= EHCI_STS_PCD;
  615         else
sc->sc_eintrs &= ~EHCI_STS_PCD;
EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
  618 }
  620 void
ehci_pcd_enable(void *v_sc)
  622 {
ehci_softc_t *sc = v_sc;
ehci_pcd_able(sc, 1);
  626 }
  628 void
ehci_pcd(ehci_softc_t *sc, usbd_xfer_handle xfer)
  630 {
usbd_pipe_handle pipe;
u_char *p;
  633         int i, m;
  635         if (xfer == NULL) {
  636                 /* Just ignore the change. */
  637                 return;
  638         }
pipe = xfer->pipe;
p = KERNADDR(&xfer->dmabuf, 0);
m = min(sc->sc_noport, xfer->length * 8 - 1);
memset(p, 0, xfer->length);
  645         for (i = 1; i <= m; i++) {
  646                 /* Pick out CHANGE bits from the status reg. */
  647                 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
p[i/8] |= 1 << (i%8);
  649         }
DPRINTF(("ehci_pcd: change=0x%02x\n", *p));
xfer->actlen = xfer->length;
xfer->status = USBD_NORMAL_COMPLETION;
usb_transfer_complete(xfer);
  655 }
  657 void
ehci_softintr(void *v)
  659 {
ehci_softc_t *sc = v;
  661         struct ehci_xfer *ex, *nextex;
DPRINTFN(10,("%s: ehci_softintr (%d)\n", sc->sc_bus.bdev.dv_xname,
sc->sc_bus.intr_context));
sc->sc_bus.intr_context++;
  668         /*
  669          * The only explanation I can think of for why EHCI is as brain dead
  670          * as UHCI interrupt-wise is that Intel was involved in both.
  671          * An interrupt just tells us that something is done, we have no
  672          * clue what, so we need to scan through all active transfers. :-(
  673          */
  674         for (ex = LIST_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
nextex = LIST_NEXT(ex, inext);
ehci_check_intr(sc, ex);
  677         }
  679         /* Schedule a callout to catch any dropped transactions. */
  680         if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) &&
  681             !LIST_EMPTY(&sc->sc_intrhead)) {
timeout_del(&sc->sc_tmo_intrlist);
timeout_set(&sc->sc_tmo_intrlist, ehci_intrlist_timeout, sc);
timeout_add(&sc->sc_tmo_intrlist, hz);
  685         }
  687 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
  688         if (sc->sc_softwake) {
sc->sc_softwake = 0;
wakeup(&sc->sc_softwake);
  691         }
  692 #endif /* __HAVE_GENERIC_SOFT_INTERRUPTS */
sc->sc_bus.intr_context--;
  695 }
  697 /* Check for an interrupt. */
  698 void
ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
  700 {
ehci_soft_qtd_t *sqtd, *lsqtd;
u_int32_t status;
DPRINTFN(/*15*/2, ("ehci_check_intr: ex=%p\n", ex));
  706         if (ex->sqtdstart == NULL) {
printf("ehci_check_intr: sqtdstart=NULL\n");
  708                 return;
  709         }
lsqtd = ex->sqtdend;
  711 #ifdef DIAGNOSTIC
  712         if (lsqtd == NULL) {
printf("ehci_check_intr: lsqtd==0\n");
  714                 return;
  715         }
  716 #endif
  717         /*
  718          * If the last TD is still active we need to check whether there
  719          * is a an error somewhere in the middle, or whether there was a
  720          * short packet (SPD and not ACTIVE).
  721          */
  722         if (letoh32(lsqtd->qtd.qtd_status) & EHCI_QTD_ACTIVE) {
DPRINTFN(12, ("ehci_check_intr: active ex=%p\n", ex));
  724                 for (sqtd = ex->sqtdstart; sqtd != lsqtd; sqtd=sqtd->nextqtd) {
status = letoh32(sqtd->qtd.qtd_status);
  726                         /* If there's an active QTD the xfer isn't done. */
  727                         if (status & EHCI_QTD_ACTIVE)
  728                                 break;
  729                         /* Any kind of error makes the xfer done. */
  730                         if (status & EHCI_QTD_HALTED)
  731                                 goto done;
  732                         /* We want short packets, and it is short: it's done */
  733                         if (EHCI_QTD_GET_BYTES(status) != 0)
  734                                 goto done;
  735                 }
DPRINTFN(12, ("ehci_check_intr: ex=%p std=%p still active\n",
ex, ex->sqtdstart));
  738                 return;
  739         }
done:
DPRINTFN(12, ("ehci_check_intr: ex=%p done\n", ex));
timeout_del(&ex->xfer.timeout_handle);
usb_rem_task(ex->xfer.pipe->device, &ex->abort_task);
ehci_idone(ex);
  745 }
  747 void
ehci_idone(struct ehci_xfer *ex)
  749 {
usbd_xfer_handle xfer = &ex->xfer;
  751 #ifdef EHCI_DEBUG
  752         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
  753 #endif
ehci_soft_qtd_t *sqtd, *lsqtd;
u_int32_t status = 0, nstatus = 0;
  756         int actlen, cerr;
DPRINTFN(/*12*/2, ("ehci_idone: ex=%p\n", ex));
  759 #ifdef DIAGNOSTIC
  760         {
  761                 int s = splhigh();
  762                 if (ex->isdone) {
splx(s);
  764 #ifdef EHCI_DEBUG
printf("ehci_idone: ex is done!\n   ");
ehci_dump_exfer(ex);
  767 #else
printf("ehci_idone: ex=%p is done!\n", ex);
  769 #endif
  770                         return;
  771                 }
ex->isdone = 1;
splx(s);
  774         }
  775 #endif
  777         if (xfer->status == USBD_CANCELLED ||
xfer->status == USBD_TIMEOUT) {
DPRINTF(("ehci_idone: aborted xfer=%p\n", xfer));
  780                 return;
  781         }
  783 #ifdef EHCI_DEBUG
DPRINTFN(/*10*/2, ("ehci_idone: xfer=%p, pipe=%p ready\n", xfer, epipe));
  785         if (ehcidebug > 10)
ehci_dump_sqtds(ex->sqtdstart);
  787 #endif
  789         /* The transfer is done, compute actual length and status. */
lsqtd = ex->sqtdend;
actlen = 0;
  792         for (sqtd = ex->sqtdstart; sqtd != lsqtd->nextqtd;
sqtd = sqtd->nextqtd) {
nstatus = letoh32(sqtd->qtd.qtd_status);
  795                 if (nstatus & EHCI_QTD_ACTIVE)
  796                         break;
status = nstatus;
  799                 /* halt is ok if descriptor is last, and complete */
  800                 if (sqtd->qtd.qtd_next == EHCI_NULL &&
EHCI_QTD_GET_BYTES(status) == 0)
status &= ~EHCI_QTD_HALTED;
  803                 if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
  805         }
cerr = EHCI_QTD_GET_CERR(status);
DPRINTFN(/*10*/2, ("ehci_idone: len=%d, actlen=%d, cerr=%d, "
  809             "status=0x%x\n", xfer->length, actlen, cerr, status));
xfer->actlen = actlen;
  811         if ((status & EHCI_QTD_HALTED) != 0) {
  812 #ifdef EHCI_DEBUG
  813                 char sbuf[128];
bitmask_snprintf((u_int32_t)status,
  816                     "\20\7HALTED\6BUFERR\5BABBLE\4XACTERR"
  817                     "\3MISSED\2SPLIT\1PING", sbuf, sizeof(sbuf));
DPRINTFN(2,
  820                          ("ehci_idone: error, addr=%d, endpt=0x%02x, "
  821                           "status 0x%s\n",
xfer->pipe->device->address,
xfer->pipe->endpoint->edesc->bEndpointAddress,
sbuf));
  825                 if (ehcidebug > 2) {
ehci_dump_sqh(epipe->sqh);
ehci_dump_sqtds(ex->sqtdstart);
  828                 }
  829 #endif
  830                 if ((status & EHCI_QTD_BABBLE) == 0 && cerr > 0)
xfer->status = USBD_STALLED;
  832                 else
xfer->status = USBD_IOERROR; /* more info XXX */
  834         } else
xfer->status = USBD_NORMAL_COMPLETION;
usb_transfer_complete(xfer);
DPRINTFN(/*12*/2, ("ehci_idone: ex=%p done\n", ex));
  839 }
  841 /*
  842  * Wait here until controller claims to have an interrupt.
  843  * Then call ehci_intr and return.  Use timeout to avoid waiting
  844  * too long.
  845  */
  846 void
ehci_waitintr(ehci_softc_t *sc, usbd_xfer_handle xfer)
  848 {
  849         int timo;
u_int32_t intrs;
xfer->status = USBD_IN_PROGRESS;
  853         for (timo = xfer->timeout; timo >= 0; timo--) {
usb_delay_ms(&sc->sc_bus, 1);
  855                 if (sc->sc_dying)
  856                         break;
intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS)) &
sc->sc_eintrs;
DPRINTFN(15,("ehci_waitintr: 0x%04x\n", intrs));
  860 #ifdef EHCI_DEBUG
  861                 if (ehcidebug > 15)
ehci_dump_regs(sc);
  863 #endif
  864                 if (intrs) {
ehci_intr1(sc);
  866                         if (xfer->status != USBD_IN_PROGRESS)
  867                                 return;
  868                 }
  869         }
  871         /* Timeout */
DPRINTF(("ehci_waitintr: timeout\n"));
xfer->status = USBD_TIMEOUT;
usb_transfer_complete(xfer);
  875         /* XXX should free TD */
  876 }
  878 void
ehci_poll(struct usbd_bus *bus)
  880 {
ehci_softc_t *sc = (ehci_softc_t *)bus;
  882 #ifdef EHCI_DEBUG
  883         static int last;
  884         int new;
new = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
  886         if (new != last) {
DPRINTFN(10,("ehci_poll: intrs=0x%04x\n", new));
last = new;
  889         }
  890 #endif
  892         if (EOREAD4(sc, EHCI_USBSTS) & sc->sc_eintrs)
ehci_intr1(sc);
  894 }
  896 int
ehci_detach(struct ehci_softc *sc, int flags)
  898 {
  899         int rv = 0;
  901         if (sc->sc_child != NULL)
rv = config_detach(sc->sc_child, flags);
  904         if (rv != 0)
  905                 return (rv);
timeout_del(&sc->sc_tmo_intrlist);
timeout_del(&sc->sc_tmo_pcd);
  910         if (sc->sc_powerhook != NULL)
powerhook_disestablish(sc->sc_powerhook);
  912         if (sc->sc_shutdownhook != NULL)
shutdownhook_disestablish(sc->sc_shutdownhook);
usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
  917         /* XXX free other data structures XXX */
  919         return (rv);
  920 }
  923 int
ehci_activate(struct device *self, enum devact act)
  925 {
  926         struct ehci_softc *sc = (struct ehci_softc *)self;
  927         int rv = 0;
  929         switch (act) {
  930         case DVACT_ACTIVATE:
  931                 break;
  933         case DVACT_DEACTIVATE:
  934                 if (sc->sc_child != NULL)
rv = config_deactivate(sc->sc_child);
sc->sc_dying = 1;
  937                 break;
  938         }
  939         return (rv);
  940 }
  942 /*
  943  * Handle suspend/resume.
  944  *
  945  * We need to switch to polling mode here, because this routine is
  946  * called from an interrupt context.  This is all right since we
  947  * are almost suspended anyway.
  948  */
  949 void
ehci_power(int why, void *v)
  951 {
ehci_softc_t *sc = v;
u_int32_t cmd, hcr;
  954         int s, i;
  956 #ifdef EHCI_DEBUG
DPRINTF(("ehci_power: sc=%p, why=%d\n", sc, why));
  958         if (ehcidebug > 0)
ehci_dump_regs(sc);
  960 #endif
s = splhardusb();
  963         switch (why) {
  964         case PWR_SUSPEND:
  965         case PWR_STANDBY:
sc->sc_bus.use_polling++;
  968                 for (i = 1; i <= sc->sc_noport; i++) {
cmd = EOREAD4(sc, EHCI_PORTSC(i));
  970                         if ((cmd & (EHCI_PS_PO|EHCI_PS_PE)) == EHCI_PS_PE)
EOWRITE4(sc, EHCI_PORTSC(i),
cmd | EHCI_PS_SUSP);
  973                 }
sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
EOWRITE4(sc, EHCI_USBCMD, cmd);
  979                 for (i = 0; i < 100; i++) {
hcr = EOREAD4(sc, EHCI_USBSTS) &
  981                             (EHCI_STS_ASS | EHCI_STS_PSS);
  982                         if (hcr == 0)
  983                                 break;
usb_delay_ms(&sc->sc_bus, 1);
  986                 }
  987                 if (hcr != 0)
printf("%s: reset timeout\n",
sc->sc_bus.bdev.dv_xname);
cmd &= ~EHCI_CMD_RS;
EOWRITE4(sc, EHCI_USBCMD, cmd);
  994                 for (i = 0; i < 100; i++) {
hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
  996                         if (hcr == EHCI_STS_HCH)
  997                                 break;
usb_delay_ms(&sc->sc_bus, 1);
 1000                 }
 1001                 if (hcr != EHCI_STS_HCH)
printf("%s: config timeout\n",
sc->sc_bus.bdev.dv_xname);
sc->sc_bus.use_polling--;
 1006                 break;
 1008         case PWR_RESUME:
sc->sc_bus.use_polling++;
 1011                 /* restore things in case the bios sucks */
EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
EOWRITE4(sc, EHCI_ASYNCLISTADDR,
sc->sc_async_head->physaddr | EHCI_LINK_QH);
EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
hcr = 0;
 1019                 for (i = 1; i <= sc->sc_noport; i++) {
cmd = EOREAD4(sc, EHCI_PORTSC(i));
 1021                         if ((cmd & (EHCI_PS_PO|EHCI_PS_SUSP)) == EHCI_PS_SUSP) {
EOWRITE4(sc, EHCI_PORTSC(i),
cmd | EHCI_PS_FPR);
hcr = 1;
 1025                         }
 1026                 }
 1028                 if (hcr) {
usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
 1030                         for (i = 1; i <= sc->sc_noport; i++) {
cmd = EOREAD4(sc, EHCI_PORTSC(i));
 1032                                 if ((cmd & (EHCI_PS_PO|EHCI_PS_SUSP)) ==
EHCI_PS_SUSP)
EOWRITE4(sc, EHCI_PORTSC(i),
cmd & ~EHCI_PS_FPR);
 1036                         }
 1037                 }
EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
 1041                 /* Take over port ownership */
EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
 1044                 for (i = 0; i < 100; i++) {
hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 1046                         if (hcr != EHCI_STS_HCH)
 1047                                 break;
usb_delay_ms(&sc->sc_bus, 1);
 1050                 }
 1051                 if (hcr == EHCI_STS_HCH)
printf("%s: config timeout\n",
sc->sc_bus.bdev.dv_xname);
usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
sc->sc_bus.use_polling--;
 1058                 break;
 1059         }
splx(s);
 1062 #ifdef EHCI_DEBUG
DPRINTF(("ehci_power: sc=%p\n", sc));
 1064         if (ehcidebug > 0)
ehci_dump_regs(sc);
 1066 #endif
 1067 }
 1069 /*
 1070  * Shut down the controller when the system is going down.
 1071  */
 1072 void
ehci_shutdown(void *v)
 1074 {
ehci_softc_t *sc = v;
DPRINTF(("ehci_shutdown: stopping the HC\n"));
EOWRITE4(sc, EHCI_USBCMD, 0);   /* Halt controller */
EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
 1080 }
usbd_status
ehci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
 1084 {
 1085         struct ehci_softc *sc = (struct ehci_softc *)bus;
usbd_status err;
err = usb_allocmem(&sc->sc_bus, size, 0, dma);
 1089 #ifdef EHCI_DEBUG
 1090         if (err)
printf("ehci_allocm: usb_allocmem()=%d\n", err);
 1092 #endif
 1093         return (err);
 1094 }
 1096 void
ehci_freem(struct usbd_bus *bus, usb_dma_t *dma)
 1098 {
 1099         struct ehci_softc *sc = (struct ehci_softc *)bus;
usb_freemem(&sc->sc_bus, dma);
 1102 }
usbd_xfer_handle
ehci_allocx(struct usbd_bus *bus)
 1106 {
 1107         struct ehci_softc *sc = (struct ehci_softc *)bus;
usbd_xfer_handle xfer;
xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
 1111         if (xfer != NULL) {
SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
 1113 #ifdef DIAGNOSTIC
 1114                 if (xfer->busy_free != XFER_FREE)
printf("ehci_allocx: xfer=%p not free, 0x%08x\n",
xfer, xfer->busy_free);
 1117 #endif
 1118         } else
xfer = malloc(sizeof(struct ehci_xfer), M_USB, M_NOWAIT);
 1121         if (xfer != NULL) {
memset(xfer, 0, sizeof(struct ehci_xfer));
usb_init_task(&EXFER(xfer)->abort_task, ehci_timeout_task,
xfer);
EXFER(xfer)->ehci_xfer_flags = 0;
 1126 #ifdef DIAGNOSTIC
EXFER(xfer)->isdone = 1;
xfer->busy_free = XFER_BUSY;
 1129 #endif
 1130         }
 1131         return (xfer);
 1132 }
 1134 void
ehci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
 1136 {
 1137         struct ehci_softc *sc = (struct ehci_softc *)bus;
 1139 #ifdef DIAGNOSTIC
 1140         if (xfer->busy_free != XFER_BUSY) {
printf("ehci_freex: xfer=%p not busy, 0x%08x\n", xfer,
xfer->busy_free);
 1143                 return;
 1144         }
xfer->busy_free = XFER_FREE;
 1146         if (!EXFER(xfer)->isdone) {
printf("ehci_freex: !isdone\n");
 1148                 return;
 1149         }
 1150 #endif
SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
 1152 }
 1154 void
ehci_device_clear_toggle(usbd_pipe_handle pipe)
 1156 {
 1157         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
DPRINTF(("ehci_device_clear_toggle: epipe=%p status=0x%x\n",
epipe, epipe->sqh->qh.qh_qtd.qtd_status));
 1161 #ifdef USB_DEBUG
 1162         if (ehcidebug)
usbd_dump_pipe(pipe);
 1164 #endif
 1165 #ifdef DIAGNOSTIC
 1166         if ((epipe->sqh->qh.qh_qtd.qtd_status & htole32(EHCI_QTD_ACTIVE)) != 0)
panic("ehci_device_clear_toggle: queue active");
 1168 #endif
epipe->sqh->qh.qh_qtd.qtd_status &= htole32(~EHCI_QTD_TOGGLE_MASK);
 1170 }
 1172 void
ehci_noop(usbd_pipe_handle pipe)
 1174 {
 1175 }
 1177 #ifdef EHCI_DEBUG
 1178 void
ehci_dump_regs(ehci_softc_t *sc)
 1180 {
 1181         int i;
printf("cmd=0x%08x, sts=0x%08x, ien=0x%08x\n",
EOREAD4(sc, EHCI_USBCMD),
EOREAD4(sc, EHCI_USBSTS),
EOREAD4(sc, EHCI_USBINTR));
printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
EOREAD4(sc, EHCI_FRINDEX),
EOREAD4(sc, EHCI_CTRLDSSEGMENT),
EOREAD4(sc, EHCI_PERIODICLISTBASE),
EOREAD4(sc, EHCI_ASYNCLISTADDR));
 1192         for (i = 1; i <= sc->sc_noport; i++)
printf("port %d status=0x%08x\n", i,
EOREAD4(sc, EHCI_PORTSC(i)));
 1195 }
 1197 /*
 1198  * Unused function - this is meant to be called from a kernel
 1199  * debugger.
 1200  */
 1201 void
ehci_dump()
 1203 {
ehci_dump_regs(theehci);
 1205 }
 1207 void
ehci_dump_link(ehci_link_t link, int type)
 1209 {
link = letoh32(link);
printf("0x%08x", link);
 1212         if (link & EHCI_LINK_TERMINATE)
printf("<T>");
 1214         else {
printf("<");
 1216                 if (type) {
 1217                         switch (EHCI_LINK_TYPE(link)) {
 1218                         case EHCI_LINK_ITD: printf("ITD"); break;
 1219                         case EHCI_LINK_QH: printf("QH"); break;
 1220                         case EHCI_LINK_SITD: printf("SITD"); break;
 1221                         case EHCI_LINK_FSTN: printf("FSTN"); break;
 1222                         }
 1223                 }
printf(">");
 1225         }
 1226 }
 1228 void
ehci_dump_sqtds(ehci_soft_qtd_t *sqtd)
 1230 {
 1231         int i;
u_int32_t stop;
stop = 0;
 1235         for (i = 0; sqtd && i < 20 && !stop; sqtd = sqtd->nextqtd, i++) {
ehci_dump_sqtd(sqtd);
stop = sqtd->qtd.qtd_next & htole32(EHCI_LINK_TERMINATE);
 1238         }
 1239         if (!stop)
printf("dump aborted, too many TDs\n");
 1241 }
 1243 void
ehci_dump_sqtd(ehci_soft_qtd_t *sqtd)
 1245 {
printf("QTD(%p) at 0x%08x:\n", sqtd, sqtd->physaddr);
ehci_dump_qtd(&sqtd->qtd);
 1248 }
 1250 void
ehci_dump_qtd(ehci_qtd_t *qtd)
 1252 {
u_int32_t s;
 1254         char sbuf[128];
printf("  next="); ehci_dump_link(qtd->qtd_next, 0);
printf(" altnext="); ehci_dump_link(qtd->qtd_altnext, 0);
printf("\n");
s = letoh32(qtd->qtd_status);
bitmask_snprintf(EHCI_QTD_GET_STATUS(s), "\20\10ACTIVE\7HALTED"
 1261             "\6BUFERR\5BABBLE\4XACTERR\3MISSED\2SPLIT\1PING",
sbuf, sizeof(sbuf));
printf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
printf("    cerr=%d pid=%d stat=0x%s\n", EHCI_QTD_GET_CERR(s),
EHCI_QTD_GET_PID(s), sbuf);
 1268         for (s = 0; s < 5; s++)
printf("  buffer[%d]=0x%08x\n", s, letoh32(qtd->qtd_buffer[s]));
 1270 }
 1272 void
ehci_dump_sqh(ehci_soft_qh_t *sqh)
 1274 {
ehci_qh_t *qh = &sqh->qh;
u_int32_t endp, endphub;
printf("QH(%p) at 0x%08x:\n", sqh, sqh->physaddr);
printf("  link="); ehci_dump_link(qh->qh_link, 1); printf("\n");
endp = letoh32(qh->qh_endp);
printf("  endp=0x%08x\n", endp);
printf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
EHCI_QH_GET_ENDPT(endp),  EHCI_QH_GET_EPS(endp),
EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
printf("    mpl=0x%x ctl=%d nrl=%d\n",
EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
EHCI_QH_GET_NRL(endp));
endphub = letoh32(qh->qh_endphub);
printf("  endphub=0x%08x\n", endphub);
printf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
EHCI_QH_GET_MULT(endphub));
printf("  curqtd="); ehci_dump_link(qh->qh_curqtd, 0); printf("\n");
printf("Overlay qTD:\n");
ehci_dump_qtd(&qh->qh_qtd);
 1298 }
 1300 #ifdef DIAGNOSTIC
 1301 void
ehci_dump_exfer(struct ehci_xfer *ex)
 1303 {
printf("ehci_dump_exfer: ex=%p\n", ex);
 1305 }
 1306 #endif
 1307 #endif /* EHCI_DEBUG */
usbd_status
ehci_open(usbd_pipe_handle pipe)
 1311 {
usbd_device_handle dev = pipe->device;
ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
u_int8_t addr = dev->address;
u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
 1317         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
ehci_soft_qh_t *sqh;
usbd_status err;
 1320         int s;
 1321         int ival, speed, naks;
 1322         int hshubaddr, hshubport;
DPRINTFN(1, ("ehci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
pipe, addr, ed->bEndpointAddress, sc->sc_addr));
 1327         if (sc->sc_dying)
 1328                 return (USBD_IOERROR);
 1330         if (dev->myhsport) {
hshubaddr = dev->myhsport->parent->address;
hshubport = dev->myhsport->portno;
 1333         } else {
hshubaddr = 0;
hshubport = 0;
 1336         }
 1338         if (addr == sc->sc_addr) {
 1339                 switch (ed->bEndpointAddress) {
 1340                 case USB_CONTROL_ENDPOINT:
pipe->methods = &ehci_root_ctrl_methods;
 1342                         break;
 1343                 case UE_DIR_IN | EHCI_INTR_ENDPT:
pipe->methods = &ehci_root_intr_methods;
 1345                         break;
 1346                 default:
 1347                         return (USBD_INVAL);
 1348                 }
 1349                 return (USBD_NORMAL_COMPLETION);
 1350         }
 1352         /* XXX All this stuff is only valid for async. */
 1353         switch (dev->speed) {
 1354         case USB_SPEED_LOW:  speed = EHCI_QH_SPEED_LOW;  break;
 1355         case USB_SPEED_FULL: speed = EHCI_QH_SPEED_FULL; break;
 1356         case USB_SPEED_HIGH: speed = EHCI_QH_SPEED_HIGH; break;
 1357         default: panic("ehci_open: bad device speed %d", dev->speed);
 1358         }
 1359         if (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_ISOCHRONOUS) {
printf("%s: *** WARNING: opening low/full speed isochronous "
 1361                     "device, this does not work yet.\n",
sc->sc_bus.bdev.dv_xname);
DPRINTFN(1,("ehci_open: hshubaddr=%d hshubport=%d\n",
hshubaddr, hshubport));
 1365                 return (USBD_INVAL);
 1366         }
naks = 8;               /* XXX */
sqh = ehci_alloc_sqh(sc);
 1370         if (sqh == NULL)
 1371                 goto bad0;
 1372         /* qh_link filled when the QH is added */
sqh->qh.qh_endp = htole32(
EHCI_QH_SET_ADDR(addr) |
EHCI_QH_SET_ENDPT(UE_GET_ADDR(ed->bEndpointAddress)) |
EHCI_QH_SET_EPS(speed) |
 1377             (xfertype == UE_CONTROL ? EHCI_QH_DTC : 0) |
EHCI_QH_SET_MPL(UGETW(ed->wMaxPacketSize)) |
 1379             (speed != EHCI_QH_SPEED_HIGH && xfertype == UE_CONTROL ?
EHCI_QH_CTL : 0) |
EHCI_QH_SET_NRL(naks));
sqh->qh.qh_endphub = htole32(
EHCI_QH_SET_MULT(1) |
EHCI_QH_SET_HUBA(hshubaddr) |
EHCI_QH_SET_PORT(hshubport) |
EHCI_QH_SET_CMASK(0x1c) | /* XXX */
EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0));
sqh->qh.qh_curqtd = EHCI_NULL;
 1389         /* Fill the overlay qTD */
sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
sqh->qh.qh_qtd.qtd_status =
htole32(EHCI_QTD_SET_TOGGLE(pipe->endpoint->savedtoggle));
epipe->sqh = sqh;
 1397         switch (xfertype) {
 1398         case UE_CONTROL:
err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t),
 1400                     0, &epipe->u.ctl.reqdma);
 1401 #ifdef EHCI_DEBUG
 1402                 if (err)
printf("ehci_open: usb_allocmem()=%d\n", err);
 1404 #endif
 1405                 if (err)
 1406                         goto bad1;
pipe->methods = &ehci_device_ctrl_methods;
s = splusb();
ehci_add_qh(sqh, sc->sc_async_head);
splx(s);
 1411                 break;
 1412         case UE_BULK:
pipe->methods = &ehci_device_bulk_methods;
s = splusb();
ehci_add_qh(sqh, sc->sc_async_head);
splx(s);
 1417                 break;
 1418         case UE_INTERRUPT:
pipe->methods = &ehci_device_intr_methods;
ival = pipe->interval;
 1421                 if (ival == USBD_DEFAULT_INTERVAL)
ival = ed->bInterval;
 1423                 return (ehci_device_setintr(sc, sqh, ival));
 1424         case UE_ISOCHRONOUS:
pipe->methods = &ehci_device_isoc_methods;
 1426                 return (USBD_INVAL);
 1427         default:
 1428                 return (USBD_INVAL);
 1429         }
 1430         return (USBD_NORMAL_COMPLETION);
bad1:
ehci_free_sqh(sc, sqh);
bad0:
 1435         return (USBD_NOMEM);
 1436 }
 1438 /*
 1439  * Add an ED to the schedule.  Called at splusb().
 1440  * If in the async schedule, it will always have a next.
 1441  * If in the intr schedule it may not.
 1442  */
 1443 void
ehci_add_qh(ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
 1445 {
SPLUSBCHECK;
sqh->next = head->next;
sqh->prev = head;
sqh->qh.qh_link = head->qh.qh_link;
head->next = sqh;
 1452         if (sqh->next)
sqh->next->prev = sqh;
head->qh.qh_link = htole32(sqh->physaddr | EHCI_LINK_QH);
 1456 #ifdef EHCI_DEBUG
 1457         if (ehcidebug > 5) {
printf("ehci_add_qh:\n");
ehci_dump_sqh(sqh);
 1460         }
 1461 #endif
 1462 }
 1464 /*
 1465  * Remove an ED from the schedule.  Called at splusb().
 1466  * Will always have a 'next' if it's in the async list as it's circular.
 1467  */
 1468 void
ehci_rem_qh(ehci_softc_t *sc, ehci_soft_qh_t *sqh, ehci_soft_qh_t *head)
 1470 {
SPLUSBCHECK;
 1472         /* XXX */
sqh->prev->qh.qh_link = sqh->qh.qh_link;
sqh->prev->next = sqh->next;
 1475         if (sqh->next)
sqh->next->prev = sqh->prev;
ehci_sync_hc(sc);
 1478 }
 1480 void
ehci_set_qh_qtd(ehci_soft_qh_t *sqh, ehci_soft_qtd_t *sqtd)
 1482 {
 1483         int i;
u_int32_t status;
 1486         /* Save toggle bit and ping status. */
status = sqh->qh.qh_qtd.qtd_status &
htole32(EHCI_QTD_TOGGLE_MASK |
EHCI_QTD_SET_STATUS(EHCI_QTD_PINGSTATE));
 1490         /* Set HALTED to make hw leave it alone. */
sqh->qh.qh_qtd.qtd_status =
htole32(EHCI_QTD_SET_STATUS(EHCI_QTD_HALTED));
sqh->qh.qh_curqtd = 0;
sqh->qh.qh_qtd.qtd_next = htole32(sqtd->physaddr);
sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
 1496         for (i = 0; i < EHCI_QTD_NBUFFERS; i++)
sqh->qh.qh_qtd.qtd_buffer[i] = 0;
sqh->sqtd = sqtd;
 1499         /* Set !HALTED && !ACTIVE to start execution, preserve some fields */
sqh->qh.qh_qtd.qtd_status = status;
 1501 }
 1503 /*
 1504  * Ensure that the HC has released all references to the QH.  We do this
 1505  * by asking for a Async Advance Doorbell interrupt and then we wait for
 1506  * the interrupt.
 1507  * To make this easier we first obtain exclusive use of the doorbell.
 1508  */
 1509 void
ehci_sync_hc(ehci_softc_t *sc)
 1511 {
 1512         int s, error;
 1513         int tries = 0;
 1515         if (sc->sc_dying) {
DPRINTFN(2,("ehci_sync_hc: dying\n"));
 1517                 return;
 1518         }
DPRINTFN(2,("ehci_sync_hc: enter\n"));
 1520         /* get doorbell */
rw_enter_write(&sc->sc_doorbell_lock);
s = splhardusb();
 1523         do { 
 1524                 /* ask for doorbell */
EOWRITE4(sc, EHCI_USBCMD, EOREAD4(sc, EHCI_USBCMD) |
EHCI_CMD_IAAD);
DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
 1529                 /* bell wait */
error = tsleep(&sc->sc_async_head, PZERO, "ehcidi", hz / 2);
DPRINTFN(1,("ehci_sync_hc: cmd=0x%08x sts=0x%08x\n",
EOREAD4(sc, EHCI_USBCMD), EOREAD4(sc, EHCI_USBSTS)));
 1533         } while (error && ++tries < 10);
splx(s);
 1535         /* release doorbell */
rw_exit_write(&sc->sc_doorbell_lock);
 1537 #ifdef DIAGNOSTIC
 1538         if (error)
printf("ehci_sync_hc: tsleep() = %d\n", error);
 1540 #endif
DPRINTFN(2,("ehci_sync_hc: exit\n"));
 1542 }
 1544 /***********/
 1546 /*
 1547  * Data structures and routines to emulate the root hub.
 1548  */
usb_device_descriptor_t ehci_devd = {
USB_DEVICE_DESCRIPTOR_SIZE,
UDESC_DEVICE,           /* type */
 1552         {0x00, 0x02},           /* USB version */
UDCLASS_HUB,            /* class */
UDSUBCLASS_HUB,         /* subclass */
UDPROTO_HSHUBSTT,       /* protocol */
 1556         64,                     /* max packet */
 1557         {0},{0},{0x00,0x01},    /* device id */
 1558         1,2,0,                  /* string indicies */
 1559         1                       /* # of configurations */
 1560 };
usb_device_qualifier_t ehci_odevd = {
USB_DEVICE_DESCRIPTOR_SIZE,
UDESC_DEVICE_QUALIFIER, /* type */
 1565         {0x00, 0x02},           /* USB version */
UDCLASS_HUB,            /* class */
UDSUBCLASS_HUB,         /* subclass */
UDPROTO_FSHUB,          /* protocol */
 1569         64,                     /* max packet */
 1570         1,                      /* # of configurations */
 1571         0
 1572 };
usb_config_descriptor_t ehci_confd = {
USB_CONFIG_DESCRIPTOR_SIZE,
UDESC_CONFIG,
 1577         {USB_CONFIG_DESCRIPTOR_SIZE +
USB_INTERFACE_DESCRIPTOR_SIZE +
USB_ENDPOINT_DESCRIPTOR_SIZE},
 1580         1,
 1581         1,
 1582         0,
UC_SELF_POWERED,
 1584         0                       /* max power */
 1585 };
usb_interface_descriptor_t ehci_ifcd = {
USB_INTERFACE_DESCRIPTOR_SIZE,
UDESC_INTERFACE,
 1590         0,
 1591         0,
 1592         1,
UICLASS_HUB,
UISUBCLASS_HUB,
UIPROTO_HSHUBSTT,
 1596         0
 1597 };
usb_endpoint_descriptor_t ehci_endpd = {
USB_ENDPOINT_DESCRIPTOR_SIZE,
UDESC_ENDPOINT,
UE_DIR_IN | EHCI_INTR_ENDPT,
UE_INTERRUPT,
 1604         {8, 0},                 /* max packet */
 1605         255
 1606 };
usb_hub_descriptor_t ehci_hubd = {
USB_HUB_DESCRIPTOR_SIZE,
UDESC_HUB,
 1611         0,
 1612         {0,0},
 1613         0,
 1614         0,
 1615         {0},
 1616 };
 1618 int
ehci_str(usb_string_descriptor_t *p, int l, const char *s)
 1620 {
 1621         int i;
 1623         if (l == 0)
 1624                 return (0);
p->bLength = 2 * strlen(s) + 2;
 1626         if (l == 1)
 1627                 return (1);
p->bDescriptorType = UDESC_STRING;
l -= 2;
 1630         for (i = 0; s[i] && l > 1; i++, l -= 2)
USETW2(p->bString[i], 0, s[i]);
 1632         return (2*i+2);
 1633 }
 1635 /*
 1636  * Simulate a hardware hub by handling all the necessary requests.
 1637  */
usbd_status
ehci_root_ctrl_transfer(usbd_xfer_handle xfer)
 1640 {
usbd_status err;
 1643         /* Insert last in queue. */
err = usb_insert_transfer(xfer);
 1645         if (err)
 1646                 return (err);
 1648         /* Pipe isn't running, start first */
 1649         return (ehci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
 1650 }
usbd_status
ehci_root_ctrl_start(usbd_xfer_handle xfer)
 1654 {
ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
usb_device_request_t *req;
 1657         void *buf = NULL;
 1658         int port, i;
 1659         int s, len, value, index, l, totlen = 0;
usb_port_status_t ps;
usb_hub_descriptor_t hubd;
usbd_status err;
u_int32_t v;
 1665         if (sc->sc_dying)
 1666                 return (USBD_IOERROR);
 1668 #ifdef DIAGNOSTIC
 1669         if (!(xfer->rqflags & URQ_REQUEST))
 1670                 /* XXX panic */
 1671                 return (USBD_INVAL);
 1672 #endif
req = &xfer->request;
DPRINTFN(4,("ehci_root_ctrl_start: type=0x%02x request=%02x\n",
req->bmRequestType, req->bRequest));
len = UGETW(req->wLength);
value = UGETW(req->wValue);
index = UGETW(req->wIndex);
 1682         if (len != 0)
buf = KERNADDR(&xfer->dmabuf, 0);
 1685 #define C(x,y) ((x) | ((y) << 8))
 1686         switch(C(req->bRequest, req->bmRequestType)) {
 1687         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
 1688         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
 1689         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
 1690                 /*
 1691                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
 1692                  * for the integrated root hub.
 1693                  */
 1694                 break;
 1695         case C(UR_GET_CONFIG, UT_READ_DEVICE):
 1696                 if (len > 0) {
 1697                         *(u_int8_t *)buf = sc->sc_conf;
totlen = 1;
 1699                 }
 1700                 break;
 1701         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
DPRINTFN(8,("ehci_root_ctrl_start: wValue=0x%04x\n", value));
 1703                 switch(value >> 8) {
 1704                 case UDESC_DEVICE:
 1705                         if ((value & 0xff) != 0) {
err = USBD_IOERROR;
 1707                                 goto ret;
 1708                         }
totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
USETW(ehci_devd.idVendor, sc->sc_id_vendor);
memcpy(buf, &ehci_devd, l);
 1712                         break;
 1713                 /*
 1714                  * We can't really operate at another speed, but the spec says
 1715                  * we need this descriptor.
 1716                  */
 1717                 case UDESC_DEVICE_QUALIFIER:
 1718                         if ((value & 0xff) != 0) {
err = USBD_IOERROR;
 1720                                 goto ret;
 1721                         }
totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
memcpy(buf, &ehci_odevd, l);
 1724                         break;
 1725                 /*
 1726                  * We can't really operate at another speed, but the spec says
 1727                  * we need this descriptor.
 1728                  */
 1729                 case UDESC_OTHER_SPEED_CONFIGURATION:
 1730                 case UDESC_CONFIG:
 1731                         if ((value & 0xff) != 0) {
err = USBD_IOERROR;
 1733                                 goto ret;
 1734                         }
totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
memcpy(buf, &ehci_confd, l);
 1737                         ((usb_config_descriptor_t *)buf)->bDescriptorType =
value >> 8;
buf = (char *)buf + l;
len -= l;
l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
totlen += l;
memcpy(buf, &ehci_ifcd, l);
buf = (char *)buf + l;
len -= l;
l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
totlen += l;
memcpy(buf, &ehci_endpd, l);
 1749                         break;
 1750                 case UDESC_STRING:
 1751                         if (len == 0)
 1752                                 break;
 1753                         *(u_int8_t *)buf = 0;
totlen = 1;
 1755                         switch (value & 0xff) {
 1756                         case 0: /* Language table */
totlen = ehci_str(buf, len, "\001");
 1758                                 break;
 1759                         case 1: /* Vendor */
totlen = ehci_str(buf, len, sc->sc_vendor);
 1761                                 break;
 1762                         case 2: /* Product */
totlen = ehci_str(buf, len, "EHCI root hub");
 1764                                 break;
 1765                         }
 1766                         break;
 1767                 default:
err = USBD_IOERROR;
 1769                         goto ret;
 1770                 }
 1771                 break;
 1772         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
 1773                 if (len > 0) {
 1774                         *(u_int8_t *)buf = 0;
totlen = 1;
 1776                 }
 1777                 break;
 1778         case C(UR_GET_STATUS, UT_READ_DEVICE):
 1779                 if (len > 1) {
USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
totlen = 2;
 1782                 }
 1783                 break;
 1784         case C(UR_GET_STATUS, UT_READ_INTERFACE):
 1785         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
 1786                 if (len > 1) {
USETW(((usb_status_t *)buf)->wStatus, 0);
totlen = 2;
 1789                 }
 1790                 break;
 1791         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
 1792                 if (value >= USB_MAX_DEVICES) {
err = USBD_IOERROR;
 1794                         goto ret;
 1795                 }
sc->sc_addr = value;
 1797                 break;
 1798         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
 1799                 if (value != 0 && value != 1) {
err = USBD_IOERROR;
 1801                         goto ret;
 1802                 }
sc->sc_conf = value;
 1804                 break;
 1805         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
 1806                 break;
 1807         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
 1808         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
 1809         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
err = USBD_IOERROR;
 1811                 goto ret;
 1812         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
 1813                 break;
 1814         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
 1815                 break;
 1816         /* Hub requests */
 1817         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
 1818                 break;
 1819         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
DPRINTFN(8, ("ehci_root_ctrl_start: UR_CLEAR_PORT_FEATURE "
 1821                     "port=%d feature=%d\n", index, value));
 1822                 if (index < 1 || index > sc->sc_noport) {
err = USBD_IOERROR;
 1824                         goto ret;
 1825                 }
port = EHCI_PORTSC(index);
v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
 1828                 switch(value) {
 1829                 case UHF_PORT_ENABLE:
EOWRITE4(sc, port, v &~ EHCI_PS_PE);
 1831                         break;
 1832                 case UHF_PORT_SUSPEND:
EOWRITE4(sc, port, v &~ EHCI_PS_SUSP);
 1834                         break;
 1835                 case UHF_PORT_POWER:
EOWRITE4(sc, port, v &~ EHCI_PS_PP);
 1837                         break;
 1838                 case UHF_PORT_TEST:
DPRINTFN(2,("ehci_root_ctrl_start: "
 1840                             "clear port test %d\n", index));
 1841                         break;
 1842                 case UHF_PORT_INDICATOR:
DPRINTFN(2,("ehci_root_ctrl_start: "
 1844                             "clear port index %d\n", index));
EOWRITE4(sc, port, v &~ EHCI_PS_PIC);
 1846                         break;
 1847                 case UHF_C_PORT_CONNECTION:
EOWRITE4(sc, port, v | EHCI_PS_CSC);
 1849                         break;
 1850                 case UHF_C_PORT_ENABLE:
EOWRITE4(sc, port, v | EHCI_PS_PEC);
 1852                         break;
 1853                 case UHF_C_PORT_SUSPEND:
 1854                         /* how? */
 1855                         break;
 1856                 case UHF_C_PORT_OVER_CURRENT:
EOWRITE4(sc, port, v | EHCI_PS_OCC);
 1858                         break;
 1859                 case UHF_C_PORT_RESET:
sc->sc_isreset = 0;
 1861                         break;
 1862                 default:
err = USBD_IOERROR;
 1864                         goto ret;
 1865                 }
 1866 #if 0
 1867                 switch(value) {
 1868                 case UHF_C_PORT_CONNECTION:
 1869                 case UHF_C_PORT_ENABLE:
 1870                 case UHF_C_PORT_SUSPEND:
 1871                 case UHF_C_PORT_OVER_CURRENT:
 1872                 case UHF_C_PORT_RESET:
 1873                         /* Enable RHSC interrupt if condition is cleared. */
 1874                         if ((OREAD4(sc, port) >> 16) == 0)
ehci_pcd_able(sc, 1);
 1876                         break;
 1877                 default:
 1878                         break;
 1879                 }
 1880 #endif
 1881                 break;
 1882         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
 1883                 if ((value & 0xff) != 0) {
err = USBD_IOERROR;
 1885                         goto ret;
 1886                 }
hubd = ehci_hubd;
hubd.bNbrPorts = sc->sc_noport;
v = EOREAD4(sc, EHCI_HCSPARAMS);
USETW(hubd.wHubCharacteristics,
EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH |
EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS))
 1893                         ? UHD_PORT_IND : 0);
hubd.bPwrOn2PwrGood = 200; /* XXX can't find out? */
 1895                 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
hubd.DeviceRemovable[i++] = 0; /* XXX can't find out? */
hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
l = min(len, hubd.bDescLength);
totlen = l;
memcpy(buf, &hubd, l);
 1901                 break;
 1902         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
 1903                 if (len != 4) {
err = USBD_IOERROR;
 1905                         goto ret;
 1906                 }
memset(buf, 0, len); /* ? XXX */
totlen = len;
 1909                 break;
 1910         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
DPRINTFN(8,("ehci_root_ctrl_start: get port status i=%d\n",
index));
 1913                 if (index < 1 || index > sc->sc_noport) {
err = USBD_IOERROR;
 1915                         goto ret;
 1916                 }
 1917                 if (len != 4) {
err = USBD_IOERROR;
 1919                         goto ret;
 1920                 }
v = EOREAD4(sc, EHCI_PORTSC(index));
DPRINTFN(8,("ehci_root_ctrl_start: port status=0x%04x\n", v));
i = UPS_HIGH_SPEED;
 1924                 if (v & EHCI_PS_CS)     i |= UPS_CURRENT_CONNECT_STATUS;
 1925                 if (v & EHCI_PS_PE)     i |= UPS_PORT_ENABLED;
 1926                 if (v & EHCI_PS_SUSP)   i |= UPS_SUSPEND;
 1927                 if (v & EHCI_PS_OCA)    i |= UPS_OVERCURRENT_INDICATOR;
 1928                 if (v & EHCI_PS_PR)     i |= UPS_RESET;
 1929                 if (v & EHCI_PS_PP)     i |= UPS_PORT_POWER;
USETW(ps.wPortStatus, i);
i = 0;
 1932                 if (v & EHCI_PS_CSC)    i |= UPS_C_CONNECT_STATUS;
 1933                 if (v & EHCI_PS_PEC)    i |= UPS_C_PORT_ENABLED;
 1934                 if (v & EHCI_PS_OCC)    i |= UPS_C_OVERCURRENT_INDICATOR;
 1935                 if (sc->sc_isreset)     i |= UPS_C_PORT_RESET;
USETW(ps.wPortChange, i);
l = min(len, sizeof(ps));
memcpy(buf, &ps, l);
totlen = l;
 1940                 break;
 1941         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
err = USBD_IOERROR;
 1943                 goto ret;
 1944         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
 1945                 break;
 1946         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
 1947                 if (index < 1 || index > sc->sc_noport) {
err = USBD_IOERROR;
 1949                         goto ret;
 1950                 }
port = EHCI_PORTSC(index);
v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
 1953                 switch(value) {
 1954                 case UHF_PORT_ENABLE:
EOWRITE4(sc, port, v | EHCI_PS_PE);
 1956                         break;
 1957                 case UHF_PORT_SUSPEND:
EOWRITE4(sc, port, v | EHCI_PS_SUSP);
 1959                         break;
 1960                 case UHF_PORT_RESET:
DPRINTFN(5,("ehci_root_ctrl_start: reset port %d\n",
index));
 1963                         if (EHCI_PS_IS_LOWSPEED(v)) {
 1964                                 /* Low speed device, give up ownership. */
ehci_disown(sc, index, 1);
 1966                                 break;
 1967                         }
 1968                         /* Start reset sequence. */
v &= ~ (EHCI_PS_PE | EHCI_PS_PR);
EOWRITE4(sc, port, v | EHCI_PS_PR);
 1971                         /* Wait for reset to complete. */
usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
 1973                         if (sc->sc_dying) {
err = USBD_IOERROR;
 1975                                 goto ret;
 1976                         }
 1977                         /* Terminate reset sequence. */
EOWRITE4(sc, port, v);
 1979                         /* Wait for HC to complete reset. */
usb_delay_ms(&sc->sc_bus, EHCI_PORT_RESET_COMPLETE);
 1981                         if (sc->sc_dying) {
err = USBD_IOERROR;
 1983                                 goto ret;
 1984                         }
v = EOREAD4(sc, port);
DPRINTF(("ehci after reset, status=0x%08x\n", v));
 1987                         if (v & EHCI_PS_PR) {
printf("%s: port reset timeout\n",
sc->sc_bus.bdev.dv_xname);
 1990                                 return (USBD_TIMEOUT);
 1991                         }
 1992                         if (!(v & EHCI_PS_PE)) {
 1993                                 /* Not a high speed device, give up ownership.*/
ehci_disown(sc, index, 0);
 1995                                 break;
 1996                         }
sc->sc_isreset = 1;
DPRINTF(("ehci port %d reset, status = 0x%08x\n",
index, v));
 2000                         break;
 2001                 case UHF_PORT_POWER:
DPRINTFN(2,("ehci_root_ctrl_start: "
 2003                             "set port power %d\n", index));
EOWRITE4(sc, port, v | EHCI_PS_PP);
 2005                         break;
 2006                 case UHF_PORT_TEST:
DPRINTFN(2,("ehci_root_ctrl_start: "
 2008                             "set port test %d\n", index));
 2009                         break;
 2010                 case UHF_PORT_INDICATOR:
DPRINTFN(2,("ehci_root_ctrl_start: "
 2012                             "set port ind %d\n", index));
EOWRITE4(sc, port, v | EHCI_PS_PIC);
 2014                         break;
 2015                 default:
err = USBD_IOERROR;
 2017                         goto ret;
 2018                 }
 2019                 break;
 2020         case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
 2021         case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
 2022         case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
 2023         case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
 2024                 break;
 2025         default:
err = USBD_IOERROR;
 2027                 goto ret;
 2028         }
xfer->actlen = totlen;
err = USBD_NORMAL_COMPLETION;
ret:
xfer->status = err;
s = splusb();
usb_transfer_complete(xfer);
splx(s);
 2036         return (USBD_IN_PROGRESS);
 2037 }
 2039 void
ehci_disown(ehci_softc_t *sc, int index, int lowspeed)
 2041 {
 2042         int port;
u_int32_t v;
DPRINTF(("ehci_disown: index=%d lowspeed=%d\n", index, lowspeed));
port = EHCI_PORTSC(index);
v = EOREAD4(sc, port) &~ EHCI_PS_CLEAR;
EOWRITE4(sc, port, v | EHCI_PS_PO);
 2050 }
 2052 /* Abort a root control request. */
 2053 void
ehci_root_ctrl_abort(usbd_xfer_handle xfer)
 2055 {
 2056         /* Nothing to do, all transfers are synchronous. */
 2057 }
 2059 /* Close the root pipe. */
 2060 void
ehci_root_ctrl_close(usbd_pipe_handle pipe)
 2062 {
DPRINTF(("ehci_root_ctrl_close\n"));
 2064         /* Nothing to do. */
 2065 }
 2067 void
ehci_root_intr_done(usbd_xfer_handle xfer)
 2069 {
 2070 }
usbd_status
ehci_root_intr_transfer(usbd_xfer_handle xfer)
 2074 {
usbd_status err;
 2077         /* Insert last in queue. */
err = usb_insert_transfer(xfer);
 2079         if (err)
 2080                 return (err);
 2082         /* Pipe isn't running, start first */
 2083         return (ehci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
 2084 }
usbd_status
ehci_root_intr_start(usbd_xfer_handle xfer)
 2088 {
usbd_pipe_handle pipe = xfer->pipe;
ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
 2092         if (sc->sc_dying)
 2093                 return (USBD_IOERROR);
sc->sc_intrxfer = xfer;
 2097         return (USBD_IN_PROGRESS);
 2098 }
 2100 /* Abort a root interrupt request. */
 2101 void
ehci_root_intr_abort(usbd_xfer_handle xfer)
 2103 {
 2104         int s;
 2106         if (xfer->pipe->intrxfer == xfer) {
DPRINTF(("ehci_root_intr_abort: remove\n"));
xfer->pipe->intrxfer = NULL;
 2109         }
xfer->status = USBD_CANCELLED;
s = splusb();
usb_transfer_complete(xfer);
splx(s);
 2114 }
 2116 /* Close the root pipe. */
 2117 void
ehci_root_intr_close(usbd_pipe_handle pipe)
 2119 {
ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
DPRINTF(("ehci_root_intr_close\n"));
sc->sc_intrxfer = NULL;
 2125 }
 2127 void
ehci_root_ctrl_done(usbd_xfer_handle xfer)
 2129 {
 2130 }
 2132 /************************/
ehci_soft_qh_t *
ehci_alloc_sqh(ehci_softc_t *sc)
 2136 {
ehci_soft_qh_t *sqh;
usbd_status err;
 2139         int i, offs;
usb_dma_t dma;
 2142         if (sc->sc_freeqhs == NULL) {
DPRINTFN(2, ("ehci_alloc_sqh: allocating chunk\n"));
err = usb_allocmem(&sc->sc_bus, EHCI_SQH_SIZE * EHCI_SQH_CHUNK,
EHCI_PAGE_SIZE, &dma);
 2146 #ifdef EHCI_DEBUG
 2147                 if (err)
printf("ehci_alloc_sqh: usb_allocmem()=%d\n", err);
 2149 #endif
 2150                 if (err)
 2151                         return (NULL);
 2152                 for(i = 0; i < EHCI_SQH_CHUNK; i++) {
offs = i * EHCI_SQH_SIZE;
sqh = KERNADDR(&dma, offs);
sqh->physaddr = DMAADDR(&dma, offs);
sqh->next = sc->sc_freeqhs;
sc->sc_freeqhs = sqh;
 2158                 }
 2159         }
sqh = sc->sc_freeqhs;
sc->sc_freeqhs = sqh->next;
memset(&sqh->qh, 0, sizeof(ehci_qh_t));
sqh->next = NULL;
sqh->prev = NULL;
 2165         return (sqh);
 2166 }
 2168 void
ehci_free_sqh(ehci_softc_t *sc, ehci_soft_qh_t *sqh)
 2170 {
sqh->next = sc->sc_freeqhs;
sc->sc_freeqhs = sqh;
 2173 }
ehci_soft_qtd_t *
ehci_alloc_sqtd(ehci_softc_t *sc)
 2177 {
ehci_soft_qtd_t *sqtd;
usbd_status err;
 2180         int i, offs;
usb_dma_t dma;
 2182         int s;
 2184         if (sc->sc_freeqtds == NULL) {
DPRINTFN(2, ("ehci_alloc_sqtd: allocating chunk\n"));
err = usb_allocmem(&sc->sc_bus, EHCI_SQTD_SIZE*EHCI_SQTD_CHUNK,
EHCI_PAGE_SIZE, &dma);
 2188 #ifdef EHCI_DEBUG
 2189                 if (err)
printf("ehci_alloc_sqtd: usb_allocmem()=%d\n", err);
 2191 #endif
 2192                 if (err)
 2193                         return (NULL);
s = splusb();
 2195                 for(i = 0; i < EHCI_SQTD_CHUNK; i++) {
offs = i * EHCI_SQTD_SIZE;
sqtd = KERNADDR(&dma, offs);
sqtd->physaddr = DMAADDR(&dma, offs);
sqtd->nextqtd = sc->sc_freeqtds;
sc->sc_freeqtds = sqtd;
 2201                 }
splx(s);
 2203         }
s = splusb();
sqtd = sc->sc_freeqtds;
sc->sc_freeqtds = sqtd->nextqtd;
memset(&sqtd->qtd, 0, sizeof(ehci_qtd_t));
sqtd->nextqtd = NULL;
sqtd->xfer = NULL;
splx(s);
 2213         return (sqtd);
 2214 }
 2216 void
ehci_free_sqtd(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd)
 2218 {
 2219         int s;
s = splusb();
sqtd->nextqtd = sc->sc_freeqtds;
sc->sc_freeqtds = sqtd;
splx(s);
 2225 }
usbd_status
ehci_alloc_sqtd_chain(struct ehci_pipe *epipe, ehci_softc_t *sc, int alen,
 2229     int rd, usbd_xfer_handle xfer, ehci_soft_qtd_t **sp, ehci_soft_qtd_t **ep)
 2230 {
ehci_soft_qtd_t *next, *cur;
ehci_physaddr_t dataphys, dataphyspage, dataphyslastpage, nextphys;
u_int32_t qtdstatus;
 2234         int len, curlen, mps;
 2235         int i, iscontrol, forceshort;
usb_dma_t *dma = &xfer->dmabuf;
DPRINTFN(alen<4*4096,("ehci_alloc_sqtd_chain: start len=%d\n", alen));
len = alen;
iscontrol = (epipe->pipe.endpoint->edesc->bmAttributes & UE_XFERTYPE) ==
UE_CONTROL;
dataphys = DMAADDR(dma, 0);
dataphyslastpage = EHCI_PAGE(dataphys + len - 1);
qtdstatus = EHCI_QTD_ACTIVE |
EHCI_QTD_SET_PID(rd ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT) |
EHCI_QTD_SET_CERR(3); /* IOC and BYTES set below */
mps = UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize);
forceshort = ((xfer->flags & USBD_FORCE_SHORT_XFER) || len == 0) &&
len % mps == 0;
 2252         /*
 2253          * The control transfer data stage always starts with a toggle of 1.
 2254          * For other transfers we let the hardware track the toggle state.
 2255          */
 2256         if (iscontrol)
qtdstatus |= EHCI_QTD_SET_TOGGLE(1);
cur = ehci_alloc_sqtd(sc);
 2260         *sp = cur;
 2261         if (cur == NULL)
 2262                 goto nomem;
 2263         for (;;) {
dataphyspage = EHCI_PAGE(dataphys);
 2265                 /* The EHCI hardware can handle at most 5 pages. */
 2266                 if (dataphyslastpage - dataphyspage <
EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE) {
 2268                         /* we can handle it in this QTD */
curlen = len;
 2270                 } else {
 2271                         /* must use multiple TDs, fill as much as possible. */
curlen = EHCI_QTD_NBUFFERS * EHCI_PAGE_SIZE -
EHCI_PAGE_OFFSET(dataphys);
 2274 #ifdef DIAGNOSTIC
 2275                         if (curlen > len) {
printf("ehci_alloc_sqtd_chain: curlen=0x%x "
 2277                                     "len=0x%x offs=0x%x\n", curlen, len,
EHCI_PAGE_OFFSET(dataphys));
printf("lastpage=0x%x page=0x%x phys=0x%x\n",
dataphyslastpage, dataphyspage, dataphys);
curlen = len;
 2282                         }
 2283 #endif
 2284                         /* the length must be a multiple of the max size */
curlen -= curlen % mps;
DPRINTFN(1,("ehci_alloc_sqtd_chain: multiple QTDs, "
 2287                             "curlen=%d\n", curlen));
 2288 #ifdef DIAGNOSTIC
 2289                         if (curlen == 0)
panic("ehci_alloc_std: curlen == 0");
 2291 #endif
 2292                 }
DPRINTFN(4,("ehci_alloc_sqtd_chain: dataphys=0x%08x "
 2294                     "dataphyslastpage=0x%08x len=%d curlen=%d\n",
dataphys, dataphyslastpage, len, curlen));
len -= curlen;
 2298                 /*
 2299                  * Allocate another transfer if there's more data left,
 2300                  * or if force last short transfer flag is set and we're
 2301                  * allocating a multiple of the max packet size.
 2302                  */
 2303                 if (len != 0 || forceshort) {
next = ehci_alloc_sqtd(sc);
 2305                         if (next == NULL)
 2306                                 goto nomem;
nextphys = htole32(next->physaddr);
 2308                 } else {
next = NULL;
nextphys = EHCI_NULL;
 2311                 }
 2313                 for (i = 0; i * EHCI_PAGE_SIZE <
curlen + EHCI_PAGE_OFFSET(dataphys); i++) {
ehci_physaddr_t a = dataphys + i * EHCI_PAGE_SIZE;
 2316                         if (i != 0) /* use offset only in first buffer */
a = EHCI_PAGE(a);
cur->qtd.qtd_buffer[i] = htole32(a);
cur->qtd.qtd_buffer_hi[i] = 0;
 2320 #ifdef DIAGNOSTIC
 2321                         if (i >= EHCI_QTD_NBUFFERS) {
printf("ehci_alloc_sqtd_chain: i=%d\n", i);
 2323                                 goto nomem;
 2324                         }
 2325 #endif
 2326                 }
cur->nextqtd = next;
cur->qtd.qtd_next = cur->qtd.qtd_altnext = nextphys;
cur->qtd.qtd_status = htole32(qtdstatus |
EHCI_QTD_SET_BYTES(curlen));
cur->xfer = xfer;
cur->len = curlen;
DPRINTFN(10,("ehci_alloc_sqtd_chain: cbp=0x%08x end=0x%08x\n",
dataphys, dataphys + curlen));
DPRINTFN(10,("ehci_alloc_sqtd_chain: curlen=%d\n", curlen));
 2336                 if (iscontrol) {
 2337                         /*
 2338                          * adjust the toggle based on the number of packets
 2339                          * in this qtd
 2340                          */
 2341                         if ((((curlen + mps - 1) / mps) & 1) || curlen == 0)
qtdstatus ^= EHCI_QTD_TOGGLE_MASK;
 2343                 }
 2344                 if (len == 0) {
 2345                         if (! forceshort)
 2346                                 break;
forceshort = 0;
 2348                 }
DPRINTFN(10,("ehci_alloc_sqtd_chain: extend chain\n"));
dataphys += curlen;
cur = next;
 2352         }
cur->qtd.qtd_status |= htole32(EHCI_QTD_IOC);
 2354         *ep = cur;
DPRINTFN(10,("ehci_alloc_sqtd_chain: return sqtd=%p sqtdend=%p\n",
 2357             *sp, *ep));
 2359         return (USBD_NORMAL_COMPLETION);
nomem:
 2362         /* XXX free chain */
DPRINTFN(-1,("ehci_alloc_sqtd_chain: no memory\n"));
 2364         return (USBD_NOMEM);
 2365 }
 2367 void
ehci_free_sqtd_chain(ehci_softc_t *sc, ehci_soft_qtd_t *sqtd,
ehci_soft_qtd_t *sqtdend)
 2370 {
ehci_soft_qtd_t *p;
 2372         int i;
DPRINTFN(10,("ehci_free_sqtd_chain: sqtd=%p sqtdend=%p\n",
sqtd, sqtdend));
 2377         for (i = 0; sqtd != sqtdend; sqtd = p, i++) {
p = sqtd->nextqtd;
ehci_free_sqtd(sc, sqtd);
 2380         }
 2381 }
 2383 /****************/
 2385 /*
 2386  * Close a reqular pipe.
 2387  * Assumes that there are no pending transactions.
 2388  */
 2389 void
ehci_close_pipe(usbd_pipe_handle pipe, ehci_soft_qh_t *head)
 2391 {
 2392         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
ehci_soft_qh_t *sqh = epipe->sqh;
 2395         int s;
s = splusb();
ehci_rem_qh(sc, sqh, head);
splx(s);
pipe->endpoint->savedtoggle =
EHCI_QTD_GET_TOGGLE(letoh32(sqh->qh.qh_qtd.qtd_status));
ehci_free_sqh(sc, epipe->sqh);
 2403 }
 2405 /*
 2406  * Abort a device request.
 2407  * If this routine is called at splusb() it guarantees that the request
 2408  * will be removed from the hardware scheduling and that the callback
 2409  * for it will be called with USBD_CANCELLED status.
 2410  * It's impossible to guarantee that the requested transfer will not
 2411  * have happened since the hardware runs concurrently.
 2412  * If the transaction has already happened we rely on the ordinary
 2413  * interrupt processing to process it.
 2414  */
 2415 void
ehci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
 2417 {
 2418 #define exfer EXFER(xfer)
 2419         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
ehci_soft_qh_t *sqh = epipe->sqh;
ehci_soft_qtd_t *sqtd, *snext, **psqtd;
ehci_physaddr_t cur, us, next;
 2424         int s;
 2425         int hit;
ehci_soft_qh_t *psqh;
DPRINTF(("ehci_abort_xfer: xfer=%p pipe=%p\n", xfer, epipe));
 2430         if (sc->sc_dying) {
 2431                 /* If we're dying, just do the software part. */
s = splusb();
xfer->status = status;  /* make software ignore it */
timeout_del(&xfer->timeout_handle);
usb_rem_task(epipe->pipe.device, &exfer->abort_task);
usb_transfer_complete(xfer);
splx(s);
 2438                 return;
 2439         }
 2441         if (xfer->device->bus->intr_context || !curproc)
panic("ehci_abort_xfer: not in process context");
 2444         /*
 2445          * If an abort is already in progress then just wait for it to
 2446          * complete and return.
 2447          */
 2448         if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING) {
DPRINTFN(2, ("ehci_abort_xfer: already aborting\n"));
 2450                 /* No need to wait if we're aborting from a timeout. */
 2451                 if (status == USBD_TIMEOUT)
 2452                         return;
 2453                 /* Override the status which might be USBD_TIMEOUT. */
xfer->status = status;
DPRINTFN(2, ("ehci_abort_xfer: waiting for abort to finish\n"));
exfer->ehci_xfer_flags |= EHCI_XFER_ABORTWAIT;
 2457                 while (exfer->ehci_xfer_flags & EHCI_XFER_ABORTING)
tsleep(&exfer->ehci_xfer_flags, PZERO, "ehciaw", 0);
 2459                 return;
 2460         }
 2462         /*
 2463          * Step 1: Make interrupt routine and timeouts ignore xfer.
 2464          */
s = splusb();
exfer->ehci_xfer_flags |= EHCI_XFER_ABORTING;
xfer->status = status;  /* make software ignore it */
timeout_del(&xfer->timeout_handle);
usb_rem_task(epipe->pipe.device, &exfer->abort_task);
splx(s);
 2472         /*
 2473          * Step 2: Wait until we know hardware has finished any possible
 2474          * use of the xfer. We do this by removing the entire
 2475          * queue from the async schedule and waiting for the doorbell.
 2476          * Nothing else should be touching the queue now.
 2477          */
psqh = sqh->prev;
ehci_rem_qh(sc, sqh, psqh);
 2481         /*
 2482          * Step 3: Deactivate all of the qTDs that we will be removing,
 2483          * otherwise the queue head may go active again.  The EHCI spec
 2484          * suggests we should perform the deactivation before removing the
 2485          * queue head from the schedule, however the VT6202 (at least) only
 2486          * behaves correctly when we deactivate them afterwards.
 2487          */
 2488         for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
sqtd->qtd.qtd_status = htole32(EHCI_QTD_HALTED);
 2490                 if (sqtd == exfer->sqtdend)
 2491                         break;
 2492         }
ehci_sync_hc(sc);
 2495         /*
 2496          * Step 4:  make sure the soft interrupt routine
 2497          * has run. This should remove any completed items off the queue.
 2498          * The hardware has no reference to completed items (TDs).
 2499          * It's safe to remove them at any time.
 2500          * use of the xfer.  Also make sure the soft interrupt routine
 2501          * has run.
 2502          */
s = splusb();
 2504 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
sc->sc_softwake = 1;
 2506 #endif /* __HAVE_GENERIC_SOFT_INTERRUPTS */
usb_schedsoftintr(&sc->sc_bus);
 2508 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
tsleep(&sc->sc_softwake, PZERO, "ehciab", 0);
 2510 #endif /* __HAVE_GENERIC_SOFT_INTERRUPTS */
 2512         /*
 2513          * Step 5: Remove any vestiges of the xfer from the hardware.
 2514          * The complication here is that the hardware may have executed
 2515          * into or even beyond the xfer we're trying to abort.
 2516          * So as we're scanning the TDs of this xfer we check if
 2517          * the hardware points to any of them.
 2518          *
 2519          * first we need to see if there are any transfers
 2520          * on this queue before the xfer we are aborting.. we need
 2521          * to update any pointers that point to us to point past
 2522          * the aborting xfer.  (If there is something past us).
 2523          * Hardware and software.
 2524          */
cur = EHCI_LINK_ADDR(letoh32(sqh->qh.qh_curqtd));
hit = 0;
 2528         /* If they initially point here. */
us = exfer->sqtdstart->physaddr;
 2531         /* We will change them to point here */
snext = exfer->sqtdend->nextqtd;
next = snext ? snext->physaddr : EHCI_NULL;
 2535         /*
 2536          * Now loop through any qTDs before us and keep track of the pointer
 2537          * that points to us for the end.
 2538          */
psqtd = &sqh->sqtd;
sqtd = sqh->sqtd;
 2541         while (sqtd && sqtd != exfer->sqtdstart) {
hit |= (cur == sqtd->physaddr);
 2543                 if (EHCI_LINK_ADDR(letoh32(sqtd->qtd.qtd_next)) == us)
sqtd->qtd.qtd_next = next;
 2545                 if (EHCI_LINK_ADDR(letoh32(sqtd->qtd.qtd_altnext)) == us)
sqtd->qtd.qtd_altnext = next;
psqtd = &sqtd->nextqtd;
sqtd = sqtd->nextqtd;
 2549         }
 2550                 /* make the software pointer bypass us too */
 2551         *psqtd = exfer->sqtdend->nextqtd;
 2553         /*
 2554          * If we already saw the active one then we are pretty much done.
 2555          * We've done all the relinking we need to do.
 2556          */
 2557         if (!hit) {
 2559                 /*
 2560                  * Now reinitialise the QH to point to the next qTD
 2561                  * (if there is one). We only need to do this if
 2562                  * it was previously pointing to us.
 2563                  * XXX Not quite sure what to do about the data toggle.
 2564                  */
sqtd = exfer->sqtdstart;
 2566                 for (sqtd = exfer->sqtdstart; ; sqtd = sqtd->nextqtd) {
 2567                         if (cur == sqtd->physaddr) {
hit++;
 2569                         }
 2570                         if (sqtd == exfer->sqtdend)
 2571                                 break;
 2572                 }
sqtd = sqtd->nextqtd;
 2574                 /*
 2575                  * Only need to alter the QH if it was pointing at a qTD
 2576                  * that we are removing.
 2577                  */
 2578                 if (hit) {
 2579                         if (snext) {
ehci_set_qh_qtd(sqh, snext);
 2581                         } else {
sqh->qh.qh_curqtd = 0; /* unlink qTDs */
sqh->qh.qh_qtd.qtd_status = 0;
sqh->qh.qh_qtd.qtd_next =
sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
DPRINTFN(1,("ehci_abort_xfer: no hit\n"));
 2588                         }
 2589                 }
 2590         }
ehci_add_qh(sqh, psqh);
 2593         /*
 2594          * Step 6: Execute callback.
 2595          */
 2596 #ifdef DIAGNOSTIC
exfer->isdone = 1;
 2598 #endif
 2599         /* Do the wakeup first to avoid touching the xfer after the callback. */
exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTING;
 2601         if (exfer->ehci_xfer_flags & EHCI_XFER_ABORTWAIT) {
exfer->ehci_xfer_flags &= ~EHCI_XFER_ABORTWAIT;
wakeup(&exfer->ehci_xfer_flags);
 2604         }
usb_transfer_complete(xfer);
splx(s);
 2608 #undef exfer
 2609 }
 2611 void
ehci_timeout(void *addr)
 2613 {
 2614         struct ehci_xfer *exfer = addr;
 2615         struct ehci_pipe *epipe = (struct ehci_pipe *)exfer->xfer.pipe;
ehci_softc_t *sc = (ehci_softc_t *)epipe->pipe.device->bus;
DPRINTF(("ehci_timeout: exfer=%p\n", exfer));
 2619 #ifdef USB_DEBUG
 2620         if (ehcidebug > 1)
usbd_dump_pipe(exfer->xfer.pipe);
 2622 #endif
 2624         if (sc->sc_dying) {
ehci_abort_xfer(&exfer->xfer, USBD_TIMEOUT);
 2626                 return;
 2627         }
 2629         /* Execute the abort in a process context. */
usb_add_task(exfer->xfer.pipe->device, &exfer->abort_task);
 2631 }
 2633 void
ehci_timeout_task(void *addr)
 2635 {
usbd_xfer_handle xfer = addr;
 2637         int s;
DPRINTF(("ehci_timeout_task: xfer=%p\n", xfer));
s = splusb();
ehci_abort_xfer(xfer, USBD_TIMEOUT);
splx(s);
 2644 }
 2646 /*
 2647  * Some EHCI chips from VIA seem to trigger interrupts before writing back the
 2648  * qTD status, or miss signalling occasionally under heavy load.  If the host
 2649  * machine is too fast, we we can miss transaction completion - when we scan
 2650  * the active list the transaction still seems to be active.  This generally
 2651  * exhibits itself as a umass stall that never recovers.
 2652  *
 2653  * We work around this behaviour by setting up this callback after any softintr
 2654  * that completes with transactions still pending, giving us another chance to
 2655  * check for completion after the writeback has taken place.
 2656  */
 2657 void
ehci_intrlist_timeout(void *arg)
 2659 {
ehci_softc_t *sc = arg;
 2661         int s = splusb();
DPRINTFN(1, ("ehci_intrlist_timeout\n"));
usb_schedsoftintr(&sc->sc_bus);
splx(s);
 2667 }
 2669 /************************/
usbd_status
ehci_device_ctrl_transfer(usbd_xfer_handle xfer)
 2673 {
usbd_status err;
 2676         /* Insert last in queue. */
err = usb_insert_transfer(xfer);
 2678         if (err)
 2679                 return (err);
 2681         /* Pipe isn't running, start first */
 2682         return (ehci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
 2683 }
usbd_status
ehci_device_ctrl_start(usbd_xfer_handle xfer)
 2687 {
ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
usbd_status err;
 2691         if (sc->sc_dying)
 2692                 return (USBD_IOERROR);
 2694 #ifdef DIAGNOSTIC
 2695         if (!(xfer->rqflags & URQ_REQUEST)) {
 2696                 /* XXX panic */
printf("ehci_device_ctrl_transfer: not a request\n");
 2698                 return (USBD_INVAL);
 2699         }
 2700 #endif
err = ehci_device_request(xfer);
 2703         if (err)
 2704                 return (err);
 2706         if (sc->sc_bus.use_polling)
ehci_waitintr(sc, xfer);
 2708         return (USBD_IN_PROGRESS);
 2709 }
 2711 void
ehci_device_ctrl_done(usbd_xfer_handle xfer)
 2713 {
 2714         struct ehci_xfer *ex = EXFER(xfer);
ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
 2716         /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
DPRINTFN(10,("ehci_ctrl_done: xfer=%p\n", xfer));
 2720 #ifdef DIAGNOSTIC
 2721         if (!(xfer->rqflags & URQ_REQUEST)) {
panic("ehci_ctrl_done: not a request");
 2723         }
 2724 #endif
 2726         if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
ehci_del_intr_list(ex); /* remove from active list */
ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
 2729         }
DPRINTFN(5, ("ehci_ctrl_done: length=%d\n", xfer->actlen));
 2732 }
 2734 /* Abort a device control request. */
 2735 void
ehci_device_ctrl_abort(usbd_xfer_handle xfer)
 2737 {
DPRINTF(("ehci_device_ctrl_abort: xfer=%p\n", xfer));
ehci_abort_xfer(xfer, USBD_CANCELLED);
 2740 }
 2742 /* Close a device control pipe. */
 2743 void
ehci_device_ctrl_close(usbd_pipe_handle pipe)
 2745 {
ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
 2747         /*struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;*/
DPRINTF(("ehci_device_ctrl_close: pipe=%p\n", pipe));
ehci_close_pipe(pipe, sc->sc_async_head);
 2751 }
usbd_status
ehci_device_request(usbd_xfer_handle xfer)
 2755 {
 2756 #define exfer EXFER(xfer)
 2757         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
usb_device_request_t *req = &xfer->request;
usbd_device_handle dev = epipe->pipe.device;
ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
 2761         int addr = dev->address;
ehci_soft_qtd_t *setup, *stat, *next;
ehci_soft_qh_t *sqh;
 2764         int isread;
 2765         int len;
usbd_status err;
 2767         int s;
isread = req->bmRequestType & UT_READ;
len = UGETW(req->wLength);
DPRINTFN(3,("ehci_device_request: type=0x%02x, request=0x%02x, "
 2773             "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
req->bmRequestType, req->bRequest, UGETW(req->wValue),
UGETW(req->wIndex), len, addr,
epipe->pipe.endpoint->edesc->bEndpointAddress));
setup = ehci_alloc_sqtd(sc);
 2779         if (setup == NULL) {
err = USBD_NOMEM;
 2781                 goto bad1;
 2782         }
stat = ehci_alloc_sqtd(sc);
 2784         if (stat == NULL) {
err = USBD_NOMEM;
 2786                 goto bad2;
 2787         }
sqh = epipe->sqh;
epipe->u.ctl.length = len;
 2792         /* Update device address and length since they may have changed
 2793            during the setup of the control pipe in usbd_new_device(). */
 2794         /* XXX This only needs to be done once, but it's too early in open. */
 2795         /* XXXX Should not touch ED here! */
sqh->qh.qh_endp =
 2797             (sqh->qh.qh_endp & htole32(~(EHCI_QH_ADDRMASK | EHCI_QH_MPLMASK))) |
htole32(
EHCI_QH_SET_ADDR(addr) |
EHCI_QH_SET_MPL(UGETW(epipe->pipe.endpoint->edesc->wMaxPacketSize))
 2801             );
 2803         /* Set up data transaction */
 2804         if (len != 0) {
ehci_soft_qtd_t *end;
err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
 2808                           &next, &end);
 2809                 if (err)
 2810                         goto bad3;
end->qtd.qtd_status &= htole32(~EHCI_QTD_IOC);
end->nextqtd = stat;
end->qtd.qtd_next =
end->qtd.qtd_altnext = htole32(stat->physaddr);
 2815         } else {
next = stat;
 2817         }
memcpy(KERNADDR(&epipe->u.ctl.reqdma, 0), req, sizeof(*req));
 2821         /* Clear toggle */
setup->qtd.qtd_status = htole32(
EHCI_QTD_ACTIVE |
EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
EHCI_QTD_SET_CERR(3) |
EHCI_QTD_SET_TOGGLE(0) |
EHCI_QTD_SET_BYTES(sizeof(*req)));
setup->qtd.qtd_buffer[0] = htole32(DMAADDR(&epipe->u.ctl.reqdma, 0));
setup->qtd.qtd_buffer_hi[0] = 0;
setup->nextqtd = next;
setup->qtd.qtd_next = setup->qtd.qtd_altnext = htole32(next->physaddr);
setup->xfer = xfer;
setup->len = sizeof(*req);
stat->qtd.qtd_status = htole32(
EHCI_QTD_ACTIVE |
EHCI_QTD_SET_PID(isread ? EHCI_QTD_PID_OUT : EHCI_QTD_PID_IN) |
EHCI_QTD_SET_CERR(3) |
EHCI_QTD_SET_TOGGLE(1) |
EHCI_QTD_IOC);
stat->qtd.qtd_buffer[0] = 0; /* XXX not needed? */
stat->qtd.qtd_buffer_hi[0] = 0; /* XXX not needed? */
stat->nextqtd = NULL;
stat->qtd.qtd_next = stat->qtd.qtd_altnext = EHCI_NULL;
stat->xfer = xfer;
stat->len = 0;
 2848 #ifdef EHCI_DEBUG
 2849         if (ehcidebug > 5) {
DPRINTF(("ehci_device_request:\n"));
ehci_dump_sqh(sqh);
ehci_dump_sqtds(setup);
 2853         }
 2854 #endif
exfer->sqtdstart = setup;
exfer->sqtdend = stat;
 2858 #ifdef DIAGNOSTIC
 2859         if (!exfer->isdone) {
printf("ehci_device_request: not done, exfer=%p\n", exfer);
 2861         }
exfer->isdone = 0;
 2863 #endif
 2865         /* Insert qTD in QH list. */
s = splusb();
ehci_set_qh_qtd(sqh, setup);
 2868         if (xfer->timeout && !sc->sc_bus.use_polling) {
timeout_del(&xfer->timeout_handle);
timeout_set(&xfer->timeout_handle, ehci_timeout, xfer);
timeout_add(&xfer->timeout_handle, mstohz(xfer->timeout));
 2872         }
ehci_add_intr_list(sc, exfer);
xfer->status = USBD_IN_PROGRESS;
splx(s);
 2877 #ifdef EHCI_DEBUG
 2878         if (ehcidebug > 10) {
DPRINTF(("ehci_device_request: status=%x\n",
EOREAD4(sc, EHCI_USBSTS)));
delay(10000);
ehci_dump_regs(sc);
ehci_dump_sqh(sc->sc_async_head);
ehci_dump_sqh(sqh);
ehci_dump_sqtds(setup);
 2886         }
 2887 #endif
 2889         return (USBD_NORMAL_COMPLETION);
bad3:
ehci_free_sqtd(sc, stat);
bad2:
ehci_free_sqtd(sc, setup);
bad1:
DPRINTFN(-1,("ehci_device_request: no memory\n"));
xfer->status = err;
usb_transfer_complete(xfer);
 2899         return (err);
 2900 #undef exfer
 2901 }
 2903 /************************/
usbd_status
ehci_device_bulk_transfer(usbd_xfer_handle xfer)
 2907 {
usbd_status err;
 2910         /* Insert last in queue. */
err = usb_insert_transfer(xfer);
 2912         if (err)
 2913                 return (err);
 2915         /* Pipe isn't running, start first */
 2916         return (ehci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
 2917 }
usbd_status
ehci_device_bulk_start(usbd_xfer_handle xfer)
 2921 {
 2922 #define exfer EXFER(xfer)
 2923         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
usbd_device_handle dev = epipe->pipe.device;
ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
ehci_soft_qtd_t *data, *dataend;
ehci_soft_qh_t *sqh;
usbd_status err;
 2929         int len, isread, endpt;
 2930         int s;
DPRINTFN(2, ("ehci_device_bulk_start: xfer=%p len=%d flags=%d\n",
xfer, xfer->length, xfer->flags));
 2935         if (sc->sc_dying)
 2936                 return (USBD_IOERROR);
 2938 #ifdef DIAGNOSTIC
 2939         if (xfer->rqflags & URQ_REQUEST)
panic("ehci_device_bulk_start: a request");
 2941 #endif
len = xfer->length;
endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
isread = UE_GET_DIR(endpt) == UE_DIR_IN;
sqh = epipe->sqh;
epipe->u.bulk.length = len;
err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
 2951             &dataend);
 2952         if (err) {
DPRINTFN(-1,("ehci_device_bulk_start: no memory\n"));
xfer->status = err;
usb_transfer_complete(xfer);
 2956                 return (err);
 2957         }
 2959 #ifdef EHCI_DEBUG
 2960         if (ehcidebug > 5) {
DPRINTF(("ehci_device_bulk_start: data(1)\n"));
ehci_dump_sqh(sqh);
ehci_dump_sqtds(data);
 2964         }
 2965 #endif
 2967         /* Set up interrupt info. */
exfer->sqtdstart = data;
exfer->sqtdend = dataend;
 2970 #ifdef DIAGNOSTIC
 2971         if (!exfer->isdone) {
printf("ehci_device_bulk_start: not done, ex=%p\n", exfer);
 2973         }
exfer->isdone = 0;
 2975 #endif
s = splusb();
ehci_set_qh_qtd(sqh, data);
 2979         if (xfer->timeout && !sc->sc_bus.use_polling) {
timeout_del(&xfer->timeout_handle);
timeout_set(&xfer->timeout_handle, ehci_timeout, xfer);
timeout_add(&xfer->timeout_handle, mstohz(xfer->timeout));
 2983         }
ehci_add_intr_list(sc, exfer);
xfer->status = USBD_IN_PROGRESS;
splx(s);
 2988 #ifdef EHCI_DEBUG
 2989         if (ehcidebug > 10) {
DPRINTF(("ehci_device_bulk_start: data(2)\n"));
delay(10000);
DPRINTF(("ehci_device_bulk_start: data(3)\n"));
ehci_dump_regs(sc);
 2994 #if 0
printf("async_head:\n");
ehci_dump_sqh(sc->sc_async_head);
 2997 #endif
printf("sqh:\n");
ehci_dump_sqh(sqh);
ehci_dump_sqtds(data);
 3001         }
 3002 #endif
 3004         if (sc->sc_bus.use_polling)
ehci_waitintr(sc, xfer);
 3007         return (USBD_IN_PROGRESS);
 3008 #undef exfer
 3009 }
 3011 void
ehci_device_bulk_abort(usbd_xfer_handle xfer)
 3013 {
DPRINTF(("ehci_device_bulk_abort: xfer=%p\n", xfer));
ehci_abort_xfer(xfer, USBD_CANCELLED);
 3016 }
 3018 /*
 3019  * Close a device bulk pipe.
 3020  */
 3021 void
ehci_device_bulk_close(usbd_pipe_handle pipe)
 3023 {
ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
DPRINTF(("ehci_device_bulk_close: pipe=%p\n", pipe));
ehci_close_pipe(pipe, sc->sc_async_head);
 3028 }
 3030 void
ehci_device_bulk_done(usbd_xfer_handle xfer)
 3032 {
 3033         struct ehci_xfer *ex = EXFER(xfer);
ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
 3035         /*struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;*/
DPRINTFN(10,("ehci_bulk_done: xfer=%p, actlen=%d\n",
xfer, xfer->actlen));
 3040         if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
ehci_del_intr_list(ex); /* remove from active list */
ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
 3043         }
DPRINTFN(5, ("ehci_bulk_done: length=%d\n", xfer->actlen));
 3046 }
 3048 /************************/
usbd_status
ehci_device_setintr(ehci_softc_t *sc, ehci_soft_qh_t *sqh, int ival)
 3052 {
 3053         struct ehci_soft_islot *isp;
 3054         int islot, lev;
 3056         /* Find a poll rate that is large enough. */
 3057         for (lev = EHCI_IPOLLRATES - 1; lev > 0; lev--)
 3058                 if (EHCI_ILEV_IVAL(lev) <= ival)
 3059                         break;
 3061         /* Pick an interrupt slot at the right level. */
 3062         /* XXX could do better than picking at random */
 3063         if (cold) {
 3064                 /* XXX prevent panics at boot by not using arc4random */
sc->sc_rand = (sc->sc_rand + 192) % sc->sc_flsize;
islot = EHCI_IQHIDX(lev, sc->sc_rand);
 3067         } else
islot = EHCI_IQHIDX(lev, arc4random());
sqh->islot = islot;
isp = &sc->sc_islots[islot];
ehci_add_qh(sqh, isp->sqh);
 3074         return (USBD_NORMAL_COMPLETION);
 3075 }
usbd_status
ehci_device_intr_transfer(usbd_xfer_handle xfer)
 3079 {
usbd_status err;
 3082         /* Insert last in queue. */
err = usb_insert_transfer(xfer);
 3084         if (err)
 3085                 return (err);
 3087         /*
 3088          * Pipe isn't running (otherwise err would be USBD_INPROG),
 3089          * so start it first.
 3090          */
 3091         return (ehci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
 3092 }
usbd_status
ehci_device_intr_start(usbd_xfer_handle xfer)
 3096 {
 3097 #define exfer EXFER(xfer)
 3098         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
usbd_device_handle dev = xfer->pipe->device;
ehci_softc_t *sc = (ehci_softc_t *)dev->bus;
ehci_soft_qtd_t *data, *dataend;
ehci_soft_qh_t *sqh;
usbd_status err;
 3104         int len, isread, endpt;
 3105         int s;
DPRINTFN(2, ("ehci_device_intr_start: xfer=%p len=%d flags=%d\n",
xfer, xfer->length, xfer->flags));
 3110         if (sc->sc_dying)
 3111                 return (USBD_IOERROR);
 3113 #ifdef DIAGNOSTIC
 3114         if (xfer->rqflags & URQ_REQUEST)
panic("ehci_device_intr_start: a request");
 3116 #endif
len = xfer->length;
endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
isread = UE_GET_DIR(endpt) == UE_DIR_IN;
sqh = epipe->sqh;
epipe->u.intr.length = len;
err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer, &data,
 3126             &dataend);
 3127         if (err) {
DPRINTFN(-1, ("ehci_device_intr_start: no memory\n"));
xfer->status = err;
usb_transfer_complete(xfer);
 3131                 return (err);
 3132         }
 3134 #ifdef EHCI_DEBUG
 3135         if (ehcidebug > 5) {
DPRINTF(("ehci_device_intr_start: data(1)\n"));
ehci_dump_sqh(sqh);
ehci_dump_sqtds(data);
 3139         }
 3140 #endif
 3142         /* Set up interrupt info. */
exfer->sqtdstart = data;
exfer->sqtdend = dataend;
 3145 #ifdef DIAGNOSTIC
 3146         if (!exfer->isdone)
printf("ehci_device_intr_start: not done, ex=%p\n", exfer);
exfer->isdone = 0;
 3149 #endif
s = splusb();
ehci_set_qh_qtd(sqh, data);
 3153         if (xfer->timeout && !sc->sc_bus.use_polling) {
timeout_del(&xfer->timeout_handle);
timeout_set(&xfer->timeout_handle, ehci_timeout, xfer);
timeout_add(&xfer->timeout_handle, mstohz(xfer->timeout));
 3157         }
ehci_add_intr_list(sc, exfer);
xfer->status = USBD_IN_PROGRESS;
splx(s);
 3162 #ifdef EHCI_DEBUG
 3163         if (ehcidebug > 10) {
DPRINTF(("ehci_device_intr_start: data(2)\n"));
delay(10000);
DPRINTF(("ehci_device_intr_start: data(3)\n"));
ehci_dump_regs(sc);
printf("sqh:\n");
ehci_dump_sqh(sqh);
ehci_dump_sqtds(data);
 3171         }
 3172 #endif
 3174         if (sc->sc_bus.use_polling)
ehci_waitintr(sc, xfer);
 3177         return (USBD_IN_PROGRESS);
 3178 #undef exfer
 3179 }
 3181 void
ehci_device_intr_abort(usbd_xfer_handle xfer)
 3183 {
DPRINTFN(1, ("ehci_device_intr_abort: xfer=%p\n", xfer));
 3185         if (xfer->pipe->intrxfer == xfer) {
DPRINTFN(1, ("ehci_device_intr_abort: remove\n"));
xfer->pipe->intrxfer = NULL;
 3188         }
ehci_abort_xfer(xfer, USBD_CANCELLED);
 3190 }
 3192 void
ehci_device_intr_close(usbd_pipe_handle pipe)
 3194 {
ehci_softc_t *sc = (ehci_softc_t *)pipe->device->bus;
 3196         struct ehci_pipe *epipe = (struct ehci_pipe *)pipe;
 3197         struct ehci_soft_islot *isp;
isp = &sc->sc_islots[epipe->sqh->islot];
ehci_close_pipe(pipe, isp->sqh);
 3201 }
 3203 void
ehci_device_intr_done(usbd_xfer_handle xfer)
 3205 {
 3206 #define exfer EXFER(xfer)
 3207         struct ehci_xfer *ex = EXFER(xfer);
ehci_softc_t *sc = (ehci_softc_t *)xfer->pipe->device->bus;
 3209         struct ehci_pipe *epipe = (struct ehci_pipe *)xfer->pipe;
ehci_soft_qtd_t *data, *dataend;
ehci_soft_qh_t *sqh;
usbd_status err;
 3213         int len, isread, endpt, s;
DPRINTFN(10, ("ehci_device_intr_done: xfer=%p, actlen=%d\n",
xfer, xfer->actlen));
 3218         if (xfer->pipe->repeat) {
ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
len = epipe->u.intr.length;
xfer->length = len;
endpt = epipe->pipe.endpoint->edesc->bEndpointAddress;
isread = UE_GET_DIR(endpt) == UE_DIR_IN;
sqh = epipe->sqh;
err = ehci_alloc_sqtd_chain(epipe, sc, len, isread, xfer,
 3228                     &data, &dataend);
 3229                 if (err) {
DPRINTFN(-1, ("ehci_device_intr_done: no memory\n"));
xfer->status = err;
 3232                         return;
 3233                 }
 3235                 /* Set up interrupt info. */
exfer->sqtdstart = data;
exfer->sqtdend = dataend;
 3238 #ifdef DIAGNOSTIC
 3239                 if (!exfer->isdone) {
printf("ehci_device_intr_done: not done, ex=%p\n",
exfer);
 3242                 }
exfer->isdone = 0;
 3244 #endif
s = splusb();
ehci_set_qh_qtd(sqh, data);
 3248                 if (xfer->timeout && !sc->sc_bus.use_polling) {
timeout_del(&xfer->timeout_handle);
timeout_set(&xfer->timeout_handle, ehci_timeout, xfer);
timeout_add(&xfer->timeout_handle,
mstohz(xfer->timeout));
 3253                 }
splx(s);
xfer->status = USBD_IN_PROGRESS;
 3257         } else if (xfer->status != USBD_NOMEM && ehci_active_intr_list(ex)) {
ehci_del_intr_list(ex); /* remove from active list */
ehci_free_sqtd_chain(sc, ex->sqtdstart, NULL);
 3260         }
 3261 #undef exfer
 3262 }
 3264 /************************/
usbd_status     ehci_device_isoc_transfer(usbd_xfer_handle xfer) { return USBD_IOERROR; }
usbd_status     ehci_device_isoc_start(usbd_xfer_handle xfer) { return USBD_IOERROR; }
 3268 void            ehci_device_isoc_abort(usbd_xfer_handle xfer) { }
 3269 void            ehci_device_isoc_close(usbd_pipe_handle pipe) { }
 3270 void            ehci_device_isoc_done(usbd_xfer_handle xfer) { }