sc_offs           144 dev/cardbus/ehci_cardbus.c 	sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
sc_offs           145 dev/cardbus/ehci_cardbus.c 	DPRINTF((": offs=%d", devname, sc->sc.sc_offs));
sc_offs           128 dev/pci/ehci_pci.c 	sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
sc_offs           129 dev/pci/ehci_pci.c 	DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs));
sc_offs           351 dev/usb/ehci.c 	sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
sc_offs            99 dev/usb/ehcivar.h 	u_int sc_offs;			/* offset to operational regs */
sc_offs           150 dev/usb/ehcivar.h #define EOREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
sc_offs           151 dev/usb/ehcivar.h #define EOREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
sc_offs           152 dev/usb/ehcivar.h #define EOREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
sc_offs           153 dev/usb/ehcivar.h #define EOWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
sc_offs           154 dev/usb/ehcivar.h #define EOWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
sc_offs           155 dev/usb/ehcivar.h #define EOWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))