root/dev/ic/midway.c

DEFINITIONS

1. en_read
2. en_write
3. en_k2sz
4. en_b2sz
5. en_sz2b
6. en_dqneed
7. en_mget
8. en_attach
9. en_dmaprobe
10. en_dmaprobe_doit
11. en_ioctl
12. en_rxctl
13. en_reset
14. en_init
15. en_loadvc
16. en_start
17. en_mfix
18. en_txdma
19. en_txlaunch
20. en_intr
21. en_service
22. en_dump
23. en_dumpmem

    1 /*      $OpenBSD: midway.c,v 1.37 2006/03/25 22:41:43 djm Exp $ */
    2 /*      (sync'd to midway.c 1.68)       */
    4 /*
    5  *
    6  * Copyright (c) 1996 Charles D. Cranor and Washington University.
    7  * All rights reserved.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. All advertising materials mentioning features or use of this software
   18  *    must display the following acknowledgement:
   19  *      This product includes software developed by Charles D. Cranor and
   20  *      Washington University.
   21  * 4. The name of the author may not be used to endorse or promote products
   22  *    derived from this software without specific prior written permission.
   23  *
   24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   25  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   26  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   27  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   28  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   29  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   31  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   32  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   33  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   34  */
   36 /*
   37  *
   38  * m i d w a y . c   e n i 1 5 5   d r i v e r 
   39  *
   40  * author: Chuck Cranor <chuck@ccrc.wustl.edu>
   41  * started: spring, 1996 (written from scratch).
   42  *
   43  * notes from the author:
   44  *   Extra special thanks go to Werner Almesberger, EPFL LRC.   Werner's
   45  *   ENI driver was especially useful in figuring out how this card works.
   46  *   I would also like to thank Werner for promptly answering email and being
   47  *   generally helpful.
   48  */
   51 #undef  EN_DEBUG
   52 #undef  EN_DEBUG_RANGE          /* check ranges on en_read/en_write's? */
   53 #define EN_MBUF_OPT             /* try and put more stuff in mbuf? */
   54 #define EN_DIAG
   55 #define EN_STAT
   56 #ifndef EN_DMA
   57 #define EN_DMA          1       /* use dma? */
   58 #endif
   59 #define EN_NOTXDMA      0       /* hook to disable tx dma only */
   60 #define EN_NORXDMA      0       /* hook to disable rx dma only */
   61 #define EN_NOWMAYBE     1       /* hook to disable word maybe DMA */
   62                                 /* XXX: WMAYBE doesn't work, needs debugging */
   63 #define EN_DDBHOOK      1       /* compile in ddb functions */
   64 #if defined(MIDWAY_ADPONLY)
   65 #define EN_ENIDMAFIX    0       /* no ENI cards to worry about */
   66 #else
   67 #define EN_ENIDMAFIX    1       /* avoid byte DMA on the ENI card (see below) */
   68 #endif
   70 /*
   71  * note on EN_ENIDMAFIX: the byte aligner on the ENI version of the card
   72  * appears to be broken.   it works just fine if there is no load... however
   73  * when the card is loaded the data get corrupted.   to see this, one only
   74  * has to use "telnet" over ATM.   do the following command in "telnet":
   75  *      cat /usr/share/misc/termcap
   76  * "telnet" seems to generate lots of 1023 byte mbufs (which make great
   77  * use of the byte aligner).   watch "netstat -s" for checksum errors.
   78  * 
   79  * I further tested this by adding a function that compared the transmit 
   80  * data on the card's SRAM with the data in the mbuf chain _after_ the 
   81  * "transmit DMA complete" interrupt.   using the "telnet" test I got data
   82  * mismatches where the byte-aligned data should have been.   using ddb
   83  * and en_dumpmem() I verified that the DTQs fed into the card were 
   84  * absolutely correct.   thus, we are forced to concluded that the ENI
   85  * hardware is buggy.   note that the Adaptec version of the card works
   86  * just fine with byte DMA.
   87  *
   88  * bottom line: we set EN_ENIDMAFIX to 1 to avoid byte DMAs on the ENI
   89  * card.
   90  */
   92 #if defined(DIAGNOSTIC) && !defined(EN_DIAG)
   93 #define EN_DIAG                 /* link in with master DIAG option */
   94 #endif
   95 #ifdef EN_STAT
   96 #define EN_COUNT(X) (X)++
   97 #else
   98 #define EN_COUNT(X) /* nothing */
   99 #endif
  101 #ifdef EN_DEBUG
  102 #undef  EN_DDBHOOK
  103 #define EN_DDBHOOK      1
  104 #define STATIC /* nothing */
  105 #define INLINE /* nothing */
  106 #else /* EN_DEBUG */
  107 #define STATIC static
  108 #define INLINE inline
  109 #endif /* EN_DEBUG */
  111 #include "bpfilter.h"
  113 #ifdef __FreeBSD__
  114 #include "en.h"
  115 #endif
  117 #if NEN > 0 || !defined(__FreeBSD__)
  119 #include <sys/param.h>
  120 #include <sys/systm.h>
  121 #include <sys/types.h>
  122 #if defined(__NetBSD__) || defined(__OpenBSD__) || defined(__bsdi__)
  123 #include <sys/device.h>
  124 #endif
  125 #if defined(__FreeBSD__)
  126 #include <sys/sockio.h>
  127 #else
  128 #include <sys/ioctl.h>
  129 #endif
  130 #include <sys/mbuf.h>
  131 #include <sys/socket.h>
  132 #include <sys/socketvar.h>
  134 #include <net/if.h>
  135 #include <net/if_atm.h>
  137 #include <uvm/uvm_extern.h>
  139 #ifdef INET
  140 #include <netinet/if_atm.h>
  141 #endif
  143 #ifdef NATM
  144 #include <netinet/in.h>
  145 #include <netnatm/natm.h>
  146 #endif
  149 #if !defined(__sparc__) && !defined(__FreeBSD__)
  150 #include <machine/bus.h>
  151 #endif
  153 #if defined(__NetBSD__) || defined(__OpenBSD__)
  154 #include <dev/ic/midwayreg.h>
  155 #include <dev/ic/midwayvar.h>
  156 #if defined(__alpha__)
  157 /* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
  158 #undef vtophys
  159 #define vtophys(va)     alpha_XXX_dmamap((vaddr_t)(va))
  160 #endif
  161 #elif defined(__FreeBSD__)
  162 #include <machine/cpufunc.h>            /* for rdtsc proto for clock.h below */
  163 #include <machine/clock.h>              /* for DELAY */
  164 #include <dev/en/midwayreg.h>
  165 #include <dev/en/midwayvar.h>
  166 #include <vm/pmap.h>                    /* for vtophys proto */
  168 /* 
  169  * 2.1.x does not have if_softc.   detect this by seeing if IFF_NOTRAILERS
  170  * is defined, as per kjc.
  171  */
  172 #ifdef IFF_NOTRAILERS
  173 #define MISSING_IF_SOFTC
  174 #else
  175 #define IFF_NOTRAILERS 0
  176 #endif
  178 #endif  /* __FreeBSD__ */
  180 #if NBPFILTER > 0
  181 #include <net/bpf.h>
  182 #endif
  184 /*
  185  * params
  186  */
  188 #ifndef EN_TXHIWAT
  189 #define EN_TXHIWAT      (64*1024)       /* max 64 KB waiting to be DMAd out */
  190 #endif
  192 #ifndef EN_MINDMA
  193 #define EN_MINDMA       32      /* don't DMA anything less than this (bytes) */
  194 #endif
  196 #define RX_NONE         0xffff  /* recv VC not in use */
  198 #define EN_OBHDR        ATM_PH_DRIVER7  /* TBD in first mbuf ! */
  199 #define EN_OBTRL        ATM_PH_DRIVER8  /* PDU trailer in last mbuf ! */
  201 #define ENOTHER_FREE    0x01            /* free rxslot */
  202 #define ENOTHER_DRAIN   0x02            /* almost free (drain DRQ dma) */
  203 #define ENOTHER_RAW     0x04            /* 'raw' access  (aka boodi mode) */
  204 #define ENOTHER_SWSL    0x08            /* in software service list */
  206 int en_dma = EN_DMA;                    /* use DMA (switch off for dbg) */
  208 /*
  209  * autoconfig attachments
  210  */
  212 struct cfdriver en_cd = {
  213     0, "en", DV_IFNET,
  214 };
  216 /*
  217  * local structures
  218  */
  220 /*
  221  * params to en_txlaunch() function
  222  */
  224 struct en_launch {
u_int32_t tbd1;               /* TBD 1 */
u_int32_t tbd2;               /* TBD 2 */
u_int32_t pdu1;               /* PDU 1 (aal5) */
  228   int nodma;                    /* don't use DMA */
  229   int need;                     /* total space we need (pad out if less data) */
  230   int mlen;                     /* length of mbuf (for dtq) */
  231   struct mbuf *t;               /* data */
u_int32_t aal;                /* aal code */
u_int32_t atm_vci;            /* vci */
u_int8_t atm_flags;           /* flags */
  235 };
  238 /*
  239  * dma table (index by # of words)
  240  *
  241  * plan A: use WMAYBE
  242  * plan B: avoid WMAYBE
  243  */
  245 struct en_dmatab {
u_int8_t bcode;               /* code */
u_int8_t divshift;            /* byte divisor */
  248 };
  250 static struct en_dmatab en_dma_planA[] = {
  251   { 0, 0 },             /* 0 */         { MIDDMA_WORD, 2 },     /* 1 */
  252   { MIDDMA_2WORD, 3},   /* 2 */         { MIDDMA_4WMAYBE, 2},   /* 3 */
  253   { MIDDMA_4WORD, 4},   /* 4 */         { MIDDMA_8WMAYBE, 2},   /* 5 */
  254   { MIDDMA_8WMAYBE, 2}, /* 6 */         { MIDDMA_8WMAYBE, 2},   /* 7 */
  255   { MIDDMA_8WORD, 5},   /* 8 */         { MIDDMA_16WMAYBE, 2},  /* 9 */
  256   { MIDDMA_16WMAYBE,2}, /* 10 */        { MIDDMA_16WMAYBE, 2},  /* 11 */
  257   { MIDDMA_16WMAYBE,2}, /* 12 */        { MIDDMA_16WMAYBE, 2},  /* 13 */
  258   { MIDDMA_16WMAYBE,2}, /* 14 */        { MIDDMA_16WMAYBE, 2},  /* 15 */
  259   { MIDDMA_16WORD, 6},  /* 16 */
  260 };
  262 static struct en_dmatab en_dma_planB[] = {
  263   { 0, 0 },             /* 0 */         { MIDDMA_WORD, 2},      /* 1 */
  264   { MIDDMA_2WORD, 3},   /* 2 */         { MIDDMA_WORD, 2},      /* 3 */
  265   { MIDDMA_4WORD, 4},   /* 4 */         { MIDDMA_WORD, 2},      /* 5 */
  266   { MIDDMA_2WORD, 3},   /* 6 */         { MIDDMA_WORD, 2},      /* 7 */
  267   { MIDDMA_8WORD, 5},   /* 8 */         { MIDDMA_WORD, 2},      /* 9 */
  268   { MIDDMA_2WORD, 3},   /* 10 */        { MIDDMA_WORD, 2},      /* 11 */
  269   { MIDDMA_4WORD, 4},   /* 12 */        { MIDDMA_WORD, 2},      /* 13 */
  270   { MIDDMA_2WORD, 3},   /* 14 */        { MIDDMA_WORD, 2},      /* 15 */
  271   { MIDDMA_16WORD, 6},  /* 16 */
  272 };
  274 static struct en_dmatab *en_dmaplan = en_dma_planA;
  276 /*
  277  * prototypes
  278  */
STATIC INLINE   int en_b2sz(int) __attribute__ ((unused));
  281 #ifdef EN_DDBHOOK
  282                 int en_dump(int,int);
  283                 int en_dumpmem(int,int,int);
  284 #endif
STATIC          void en_dmaprobe(struct en_softc *);
STATIC          int en_dmaprobe_doit(struct en_softc *, u_int8_t *, 
u_int8_t *, int);
STATIC INLINE   int en_dqneed(struct en_softc *, caddr_t, u_int,
u_int) __attribute__ ((unused));
STATIC          void en_init(struct en_softc *);
STATIC          int en_ioctl(struct ifnet *, EN_IOCTL_CMDT, caddr_t);
STATIC INLINE   int en_k2sz(int) __attribute__ ((unused));
STATIC          void en_loadvc(struct en_softc *, int);
STATIC          int en_mfix(struct en_softc *, struct mbuf **,
  295                     struct mbuf *);
STATIC INLINE   struct mbuf *en_mget(struct en_softc *, u_int,
u_int *) __attribute__ ((unused));
STATIC INLINE   u_int32_t en_read(struct en_softc *,
u_int32_t) __attribute__ ((unused));
STATIC          int en_rxctl(struct en_softc *, struct atm_pseudoioctl *,
  301                     int);
STATIC          void en_txdma(struct en_softc *, int);
STATIC          void en_txlaunch(struct en_softc *, int,
  304                     struct en_launch *);
STATIC          void en_service(struct en_softc *);
STATIC          void en_start(struct ifnet *);
STATIC INLINE   int en_sz2b(int) __attribute__ ((unused));
STATIC INLINE   void en_write(struct en_softc *, u_int32_t,
u_int32_t) __attribute__ ((unused));
  311 /*
  312  * macros/inline
  313  */
  315 /*
  316  * raw read/write macros
  317  */
  319 #define EN_READDAT(SC,R) en_read(SC,R)
  320 #define EN_WRITEDAT(SC,R,V) en_write(SC,R,V)
  322 /*
  323  * cooked read/write macros
  324  */
  326 #define EN_READ(SC,R) ntohl(en_read(SC,R))
  327 #define EN_WRITE(SC,R,V) en_write(SC,R, htonl(V))
  329 #define EN_WRAPADD(START,STOP,CUR,VAL) { \
  330         (CUR) = (CUR) + (VAL); \
  331         if ((CUR) >= (STOP)) \
  332                 (CUR) = (START) + ((CUR) - (STOP)); \
  333         }
  335 #define WORD_IDX(START, X) (((X) - (START)) / sizeof(u_int32_t))
  337 /* we store sc->dtq and sc->drq data in the following format... */
  338 #define EN_DQ_MK(SLOT,LEN) (((SLOT) << 20)|(LEN)|(0x80000))
  339                                         /* the 0x80000 ensures we != 0 */
  340 #define EN_DQ_SLOT(X) ((X) >> 20)
  341 #define EN_DQ_LEN(X) ((X) & 0x3ffff)
  343 /* format of DTQ/DRQ word 1 differs between ENI and ADP */
  344 #if defined(MIDWAY_ENIONLY)
  346 #define MID_MK_TXQ(SC,CNT,CHAN,END,BCODE) \
EN_WRITE((SC), (SC)->dtq_us, \
MID_MK_TXQ_ENI((CNT), (CHAN), (END), (BCODE))); 
  350 #define MID_MK_RXQ(SC,CNT,VCI,END,BCODE) \
EN_WRITE((SC), (SC)->drq_us, \
MID_MK_RXQ_ENI((CNT), (VCI), (END), (BCODE))); 
  354 #elif defined(MIDWAY_ADPONLY)
  356 #define MID_MK_TXQ(SC,CNT,CHAN,END,JK) \
EN_WRITE((SC), (SC)->dtq_us, \
MID_MK_TXQ_ADP((CNT), (CHAN), (END), (JK))); 
  360 #define MID_MK_RXQ(SC,CNT,VCI,END,JK) \
EN_WRITE((SC), (SC)->drq_us, \
MID_MK_RXQ_ADP((CNT), (VCI), (END), (JK))); 
  364 #else
  366 #define MID_MK_TXQ(SC,CNT,CHAN,END,JK_OR_BCODE) { \
  367         if ((SC)->is_adaptec) \
EN_WRITE((SC), (SC)->dtq_us, \
MID_MK_TXQ_ADP((CNT), (CHAN), (END), (JK_OR_BCODE))); \
  370         else \
EN_WRITE((SC), (SC)->dtq_us, \
MID_MK_TXQ_ENI((CNT), (CHAN), (END), (JK_OR_BCODE))); \
  373         }
  375 #define MID_MK_RXQ(SC,CNT,VCI,END,JK_OR_BCODE) { \
  376         if ((SC)->is_adaptec) \
EN_WRITE((SC), (SC)->drq_us, \
MID_MK_RXQ_ADP((CNT), (VCI), (END), (JK_OR_BCODE))); \
  379         else \
EN_WRITE((SC), (SC)->drq_us, \
MID_MK_RXQ_ENI((CNT), (VCI), (END), (JK_OR_BCODE))); \
  382         }
  384 #endif
  386 /* add an item to the DTQ */
  387 #define EN_DTQADD(SC,CNT,CHAN,JK_OR_BCODE,ADDR,LEN,END) { \
  388         if (END) \
  389           (SC)->dtq[MID_DTQ_A2REG((SC)->dtq_us)] = EN_DQ_MK(CHAN,LEN); \
MID_MK_TXQ(SC,CNT,CHAN,END,JK_OR_BCODE); \
  391         (SC)->dtq_us += 4; \
EN_WRITE((SC), (SC)->dtq_us, (ADDR)); \
EN_WRAPADD(MID_DTQOFF, MID_DTQEND, (SC)->dtq_us, 4); \
  394         (SC)->dtq_free--; \
  395         if (END) \
EN_WRITE((SC), MID_DMA_WRTX, MID_DTQ_A2REG((SC)->dtq_us)); \
  397 }
  399 /* DRQ add macro */
  400 #define EN_DRQADD(SC,CNT,VCI,JK_OR_BCODE,ADDR,LEN,SLOT,END) { \
  401         if (END) \
  402           (SC)->drq[MID_DRQ_A2REG((SC)->drq_us)] = EN_DQ_MK(SLOT,LEN); \
MID_MK_RXQ(SC,CNT,VCI,END,JK_OR_BCODE); \
  404         (SC)->drq_us += 4; \
EN_WRITE((SC), (SC)->drq_us, (ADDR)); \
EN_WRAPADD(MID_DRQOFF, MID_DRQEND, (SC)->drq_us, 4); \
  407         (SC)->drq_free--; \
  408         if (END) \
EN_WRITE((SC), MID_DMA_WRRX, MID_DRQ_A2REG((SC)->drq_us)); \
  410 }
  412 /*
  413  * the driver code
  414  *
  415  * the code is arranged in a specific way:
  416  * [1] short/inline functions
  417  * [2] autoconfig stuff
  418  * [3] ioctl stuff
  419  * [4] reset -> init -> transmit -> intr -> receive functions
  420  *
  421  */
  423 /***********************************************************************/
  425 /*
  426  * en_read: read a word from the card.   this is the only function
  427  * that reads from the card.
  428  */
STATIC INLINE u_int32_t en_read(sc, r)
  432 struct en_softc *sc;
u_int32_t r;
  435 {
  437 #ifdef EN_DEBUG_RANGE
  438   if (r > MID_MAXOFF || (r % 4)) {
panic("en_read: out of range, r=0x%x", r);
  440   }
  441 #endif
  443   return(bus_space_read_4(sc->en_memt, sc->en_base, r));
  444 }
  446 /*
  447  * en_write: write a word to the card.   this is the only function that
  448  * writes to the card.
  449  */
STATIC INLINE void en_write(sc, r, v)
  453 struct en_softc *sc;
u_int32_t r, v;
  456 {
  457 #ifdef EN_DEBUG_RANGE
  458   if (r > MID_MAXOFF || (r % 4)) {
panic("en_write: out of range, r=0x%x", r);
  460   }
  461 #endif
bus_space_write_4(sc->en_memt, sc->en_base, r, v);
  464 }
  466 /*
  467  * en_k2sz: convert KBytes to a size parameter (a log2)
  468  */
STATIC INLINE int en_k2sz(k)
  472 int k;
  474 {
  475   switch(k) {
  476     case 1:   return(0);
  477     case 2:   return(1);
  478     case 4:   return(2);
  479     case 8:   return(3);
  480     case 16:  return(4);
  481     case 32:  return(5);
  482     case 64:  return(6);
  483     case 128: return(7);
  484     default: panic("en_k2sz");
  485   }
  486   return(0);
  487 }
  488 #define en_log2(X) en_k2sz(X)
  491 /*
  492  * en_b2sz: convert a DMA burst code to its byte size
  493  */
STATIC INLINE int en_b2sz(b)
  497 int b;
  499 {
  500   switch (b) {
  501     case MIDDMA_WORD:   return(1*4);
  502     case MIDDMA_2WMAYBE:
  503     case MIDDMA_2WORD:  return(2*4);
  504     case MIDDMA_4WMAYBE:
  505     case MIDDMA_4WORD:  return(4*4);
  506     case MIDDMA_8WMAYBE:
  507     case MIDDMA_8WORD:  return(8*4);
  508     case MIDDMA_16WMAYBE:
  509     case MIDDMA_16WORD: return(16*4);
  510     default: panic("en_b2sz");
  511   }
  512   return(0);
  513 }
  516 /*
  517  * en_sz2b: convert a burst size (bytes) to DMA burst code
  518  */
STATIC INLINE int en_sz2b(sz)
  522 int sz;
  524 {
  525   switch (sz) {
  526     case 1*4:  return(MIDDMA_WORD);
  527     case 2*4:  return(MIDDMA_2WORD);
  528     case 4*4:  return(MIDDMA_4WORD);
  529     case 8*4:  return(MIDDMA_8WORD);
  530     case 16*4: return(MIDDMA_16WORD);
  531     default: panic("en_sz2b");
  532   }
  533   return(0);
  534 }
  537 /*
  538  * en_dqneed: calculate number of DTQ/DRQ's needed for a buffer
  539  */
STATIC INLINE int en_dqneed(sc, data, len, tx)
  543 struct en_softc *sc;
caddr_t data;
u_int len, tx;
  547 {
  548   int result, needalign, sz;
  550 #if !defined(MIDWAY_ENIONLY)
  551 #if !defined(MIDWAY_ADPONLY)
  552     if (sc->is_adaptec)
  553 #endif /* !MIDWAY_ADPONLY */
  554       return(1);        /* adaptec can DMA anything in one go */
  555 #endif
  557 #if !defined(MIDWAY_ADPONLY)
result = 0;
  559     if (len < EN_MINDMA) {
  560       if (!tx)                  /* XXX: conservative */
  561         return(1);              /* will copy/DMA_JK */
  562     }
  564     if (tx) {                   /* byte burst? */
needalign = (((unsigned long) data) % sizeof(u_int32_t));
  566       if (needalign) {
result++;
sz = min(len, sizeof(u_int32_t) - needalign);
len -= sz;
data += sz;
  571       }
  572     }
  574     if (sc->alburst && len) {
needalign = (((unsigned long) data) & sc->bestburstmask);
  576       if (needalign) {
result++;               /* alburst */
sz = min(len, sc->bestburstlen - needalign);
len -= sz;
  580       }
  581     }
  583     if (len >= sc->bestburstlen) {
sz = len / sc->bestburstlen;
sz = sz * sc->bestburstlen;
len -= sz;
result++;                 /* best shot */
  588     }
  590     if (len) {
result++;                 /* clean up */
  592       if (tx && (len % sizeof(u_int32_t)) != 0)
result++;               /* byte cleanup */
  594     }
  596     return(result);
  597 #endif  /* !MIDWAY_ADPONLY */
  598 }
  601 /*
  602  * en_mget: get an mbuf chain that can hold totlen bytes and return it
  603  * (for recv)   [based on am7990_get from if_le and ieget from if_ie]
  604  * after this call the sum of all the m_len's in the chain will be totlen.
  605  */
STATIC INLINE struct mbuf *en_mget(sc, totlen, drqneed)
  609 struct en_softc *sc;
u_int totlen, *drqneed;
  612 {
  613   struct mbuf *m;
  614   struct mbuf *top, **mp;
  615   *drqneed = 0;
MGETHDR(m, M_DONTWAIT, MT_DATA);
  618   if (m == NULL)
  619     return(NULL);
m->m_pkthdr.rcvif = &sc->enif;
m->m_pkthdr.len = totlen;
m->m_len = MHLEN;
top = NULL;
mp = &top;
  626   /* if (top != NULL) then we've already got 1 mbuf on the chain */
  627   while (totlen > 0) {
  628     if (top) {
MGET(m, M_DONTWAIT, MT_DATA);
  630       if (!m) {
m_freem(top);   
  632         return(NULL);   /* out of mbufs */
  633       }
m->m_len = MLEN;
  635     }
  636     if (totlen >= MINCLSIZE) {
MCLGET(m, M_DONTWAIT);
  638       if ((m->m_flags & M_EXT) == 0) {
m_free(m);
m_freem(top);
  641         return(NULL);   /* out of mbuf clusters */
  642       }
m->m_len = MCLBYTES;
  644     }
m->m_len = min(totlen, m->m_len);
totlen -= m->m_len;
  647     *mp = m;
mp = &m->m_next;
  650     *drqneed += en_dqneed(sc, m->m_data, m->m_len, 0);
  652   }
  653   return(top);
  654 }
  656 /***********************************************************************/
  658 /*
  659  * autoconfig stuff
  660  */
  662 void en_attach(sc)
  664 struct en_softc *sc;
  666 {
  667   struct ifnet *ifp = &sc->enif;
  668   int sz;
u_int32_t reg, lcv, check, ptr, sav, midvloc;
  671   /*
  672    * probe card to determine memory size.   the stupid ENI card always
  673    * reports to PCI that it needs 4MB of space (2MB regs and 2MB RAM).
  674    * if it has less than 2MB RAM the addresses wrap in the RAM address space.
  675    * (i.e. on a 512KB card addresses 0x3ffffc, 0x37fffc, and 0x2ffffc
  676    * are aliases for 0x27fffc  [note that RAM starts at offset 0x200000]).
  677    */
  679   if (sc->en_busreset)
sc->en_busreset(sc);
EN_WRITE(sc, MID_RESID, 0x0); /* reset card before touching RAM */
  682   for (lcv = MID_PROBEOFF; lcv <= MID_MAXOFF ; lcv += MID_PROBSIZE) {
EN_WRITE(sc, lcv, lcv);     /* data[address] = address */
  684     for (check = MID_PROBEOFF ; check < lcv ; check += MID_PROBSIZE) {
reg = EN_READ(sc, check);
  686       if (reg != check) {               /* found an alias! */
  687         goto done_probe;                /* and quit */
  688       }
  689     }
  690   }
done_probe:
lcv -= MID_PROBSIZE;                  /* take one step back */
sc->en_obmemsz = (lcv + 4) - MID_RAMOFF;
  695   /*
  696    * determine the largest DMA burst supported
  697    */
en_dmaprobe(sc);
  701   /*
  702    * "hello world"
  703    */
  705   if (sc->en_busreset)
sc->en_busreset(sc);
EN_WRITE(sc, MID_RESID, 0x0);         /* reset */
  708   for (lcv = MID_RAMOFF ; lcv < MID_RAMOFF + sc->en_obmemsz ; lcv += 4)
EN_WRITE(sc, lcv, 0);       /* zero memory */
reg = EN_READ(sc, MID_RESID);
printf("%s: ATM midway v%d, board IDs %d.%d, %s%s%s, %ldKB on-board RAM\n",
sc->sc_dev.dv_xname, MID_VER(reg), MID_MID(reg), MID_DID(reg), 
  715         (MID_IS_SABRE(reg)) ? "sabre controller, " : "",
  716         (MID_IS_SUNI(reg)) ? "SUNI" : "Utopia",
  717         (!MID_IS_SUNI(reg) && MID_IS_UPIPE(reg)) ? " (pipelined)" : "",
sc->en_obmemsz / 1024);
  720   if (sc->is_adaptec) {
  721     if (sc->bestburstlen == 64 && sc->alburst == 0)
printf("%s: passed 64 byte DMA test\n", sc->sc_dev.dv_xname);
  723     else
printf("%s: FAILED DMA TEST: burst=%d, alburst=%d\n", 
sc->sc_dev.dv_xname, sc->bestburstlen, sc->alburst);
  726   } else {
printf("%s: maximum DMA burst length = %d bytes%s\n", sc->sc_dev.dv_xname,
sc->bestburstlen, (sc->alburst) ? " (must align)" : "");
  729   }
  731 #if 0           /* WMAYBE doesn't work, don't complain about it */
  732   /* check if en_dmaprobe disabled wmaybe */
  733   if (en_dmaplan == en_dma_planB)
printf("%s: note: WMAYBE DMA has been disabled\n", sc->sc_dev.dv_xname);
  735 #endif
  737   /*
  738    * link into network subsystem and prepare card
  739    */
  741 #if defined(__NetBSD__) || defined(__OpenBSD__)
bcopy(sc->sc_dev.dv_xname, sc->enif.if_xname, IFNAMSIZ);
  743 #endif
  744 #if !defined(MISSING_IF_SOFTC)
sc->enif.if_softc = sc;
  746 #endif
ifp->if_flags = IFF_SIMPLEX|IFF_NOTRAILERS;
ifp->if_ioctl = en_ioctl;
ifp->if_start = en_start;
IFQ_SET_READY(&ifp->if_snd);
  752   /*
  753    * init softc
  754    */
  756   for (lcv = 0 ; lcv < MID_N_VC ; lcv++) {
sc->rxvc2slot[lcv] = RX_NONE;
sc->txspeed[lcv] = 0;       /* full */
sc->txvc2slot[lcv] = 0;     /* full speed == slot 0 */
  760   }
sz = sc->en_obmemsz - (MID_BUFOFF - MID_RAMOFF);
ptr = sav = MID_BUFOFF;
ptr = roundup(ptr, EN_TXSZ * 1024);   /* align */
sz = sz - (ptr - sav);
  766   if (EN_TXSZ*1024 * EN_NTX > sz) {
printf("%s: EN_NTX/EN_TXSZ too big\n", sc->sc_dev.dv_xname);
  768     return;
  769   }
  770   for (lcv = 0 ; lcv < EN_NTX ; lcv++) {
sc->txslot[lcv].mbsize = 0;
sc->txslot[lcv].start = ptr;
ptr += (EN_TXSZ * 1024);
sz -= (EN_TXSZ * 1024);
sc->txslot[lcv].stop = ptr;
sc->txslot[lcv].nref = 0;
bzero(&sc->txslot[lcv].indma, sizeof(sc->txslot[lcv].indma));
bzero(&sc->txslot[lcv].q, sizeof(sc->txslot[lcv].q));
  779 #ifdef EN_DEBUG
printf("%s: tx%d: start 0x%x, stop 0x%x\n", sc->sc_dev.dv_xname, lcv,
sc->txslot[lcv].start, sc->txslot[lcv].stop);
  782 #endif
  783   }
sav = ptr;
ptr = roundup(ptr, EN_RXSZ * 1024);   /* align */
sz = sz - (ptr - sav);
sc->en_nrx = sz / (EN_RXSZ * 1024);
  789   if (sc->en_nrx <= 0) {
printf("%s: EN_NTX/EN_TXSZ/EN_RXSZ too big\n", sc->sc_dev.dv_xname);
  791     return;
  792   }
  794   /* 
  795    * ensure that there is always one VC slot on the service list free
  796    * so that we can tell the difference between a full and empty list.
  797    */
  798   if (sc->en_nrx >= MID_N_VC)
sc->en_nrx = MID_N_VC - 1;
  801   for (lcv = 0 ; lcv < sc->en_nrx ; lcv++) {
sc->rxslot[lcv].rxhand = NULL;
sc->rxslot[lcv].oth_flags = ENOTHER_FREE;
bzero(&sc->rxslot[lcv].indma, sizeof(sc->rxslot[lcv].indma));
bzero(&sc->rxslot[lcv].q, sizeof(sc->rxslot[lcv].q));
midvloc = sc->rxslot[lcv].start = ptr;
ptr += (EN_RXSZ * 1024);
sz -= (EN_RXSZ * 1024);
sc->rxslot[lcv].stop = ptr;
midvloc = midvloc - MID_RAMOFF;
midvloc = (midvloc & ~((EN_RXSZ*1024) - 1)) >> 2; /* mask, cvt to words */
midvloc = midvloc >> MIDV_LOCTOPSHFT;  /* we only want the top 11 bits */
midvloc = (midvloc & MIDV_LOCMASK) << MIDV_LOCSHIFT;
sc->rxslot[lcv].mode = midvloc | 
  815         (en_k2sz(EN_RXSZ) << MIDV_SZSHIFT) | MIDV_TRASH;
  817 #ifdef EN_DEBUG
printf("%s: rx%d: start 0x%x, stop 0x%x, mode 0x%x\n", sc->sc_dev.dv_xname,
lcv, sc->rxslot[lcv].start, sc->rxslot[lcv].stop, sc->rxslot[lcv].mode);
  820 #endif
  821   }
  823 #ifdef EN_STAT
sc->vtrash = sc->otrash = sc->mfix = sc->txmbovr = sc->dmaovr = 0;
sc->txoutspace = sc->txdtqout = sc->launch = sc->lheader = sc->ltail = 0;
sc->hwpull = sc->swadd = sc->rxqnotus = sc->rxqus = sc->rxoutboth = 0;
sc->rxdrqout = sc->ttrash = sc->rxmbufout = sc->mfixfail = 0;
sc->headbyte = sc->tailbyte = sc->tailflush = 0;
  829 #endif
sc->need_drqs = sc->need_dtqs = 0;
printf("%s: %d %dKB receive buffers, %d %dKB transmit buffers allocated\n",
sc->sc_dev.dv_xname, sc->en_nrx, EN_RXSZ, EN_NTX, EN_TXSZ);
  835   /*
  836    * final commit
  837    */
if_attach(ifp);
atm_ifattach(ifp); 
  843 #if NBPFILTER > 0
bpfattach(&ifp->if_bpf, ifp, DLT_ATM_RFC1483, sizeof(struct atmllc));
  845 #endif
  847 }
  850 /*
  851  * en_dmaprobe: helper function for en_attach.
  852  *
  853  * see how the card handles DMA by running a few DMA tests.   we need
  854  * to figure out the largest number of bytes we can DMA in one burst
  855  * ("bestburstlen"), and if the starting address for a burst needs to
  856  * be aligned on any sort of boundary or not ("alburst").
  857  *
  858  * typical findings:
  859  * sparc1: bestburstlen=4, alburst=0 (ick, broken DMA!)
  860  * sparc2: bestburstlen=64, alburst=1
  861  * p166:   bestburstlen=64, alburst=0 
  862  */
STATIC void en_dmaprobe(sc)
  866 struct en_softc *sc;
  868 {
u_int32_t srcbuf[64], dstbuf[64];
u_int8_t *sp, *dp;
  871   int bestalgn, bestnotalgn, lcv, try, fail;
sc->alburst = 0;
sp = (u_int8_t *) srcbuf;
  876   while ((((unsigned long) sp) % MIDDMA_MAXBURST) != 0)
sp += 4;
dp = (u_int8_t *) dstbuf;
  879   while ((((unsigned long) dp) % MIDDMA_MAXBURST) != 0)
dp += 4;
bestalgn = bestnotalgn = en_dmaprobe_doit(sc, sp, dp, 0);
  884   for (lcv = 4 ; lcv < MIDDMA_MAXBURST ; lcv += 4) {
try = en_dmaprobe_doit(sc, sp+lcv, dp+lcv, 0);
  886     if (try < bestnotalgn)
bestnotalgn = try;
  888   }
  890   if (bestalgn != bestnotalgn)          /* need bursts aligned */
sc->alburst = 1;
sc->bestburstlen = bestalgn;
sc->bestburstshift = en_log2(bestalgn);
sc->bestburstmask = sc->bestburstlen - 1; /* must be power of 2 */
sc->bestburstcode = en_sz2b(bestalgn);
  898   if (sc->bestburstlen <= 2*sizeof(u_int32_t))
  899     return;                             /* won't be using WMAYBE */
  901   /*
  902    * adaptec does not have (or need) wmaybe.   do not bother testing
  903    * for it.
  904    */
  905   if (sc->is_adaptec) {
  906     /* XXX, actually don't need a DMA plan: adaptec is smarter than that */
en_dmaplan = en_dma_planB; 
  908     return;
  909   }
  911   /*
  912    * test that WMAYBE dma works like we think it should 
  913    * (i.e. no alignment restrictions on host address other than alburst)
  914    */
try = sc->bestburstlen - 4;
fail = 0;
fail += en_dmaprobe_doit(sc, sp, dp, try);
  919   for (lcv = 4 ; lcv < sc->bestburstlen ; lcv += 4) {
fail += en_dmaprobe_doit(sc, sp+lcv, dp+lcv, try);
  921     if (sc->alburst)
try -= 4;
  923   }
  924   if (EN_NOWMAYBE || fail) {
  925     if (fail)
printf("%s: WARNING: WMAYBE DMA test failed %d time(s)\n", 
sc->sc_dev.dv_xname, fail);
en_dmaplan = en_dma_planB;          /* fall back to plan B */
  929   }
  931 }
  934 /*
  935  * en_dmaprobe_doit: do actual testing
  936  */
  938 int
en_dmaprobe_doit(sc, sp, dp, wmtry)
  941 struct en_softc *sc;
u_int8_t *sp, *dp;
  943 int wmtry;
  945 {
  946   int lcv, retval = 4, cnt, count;
u_int32_t reg, bcode, midvloc;
  949   /*
  950    * set up a 1k buffer at MID_BUFOFF
  951    */
  953   if (sc->en_busreset)
sc->en_busreset(sc);
EN_WRITE(sc, MID_RESID, 0x0); /* reset card before touching RAM */
midvloc = ((MID_BUFOFF - MID_RAMOFF) / sizeof(u_int32_t)) >> MIDV_LOCTOPSHFT;
EN_WRITE(sc, MIDX_PLACE(0), MIDX_MKPLACE(en_k2sz(1), midvloc));
EN_WRITE(sc, MID_VC(0), (midvloc << MIDV_LOCSHIFT) 
  960                 | (en_k2sz(1) << MIDV_SZSHIFT) | MIDV_TRASH);
EN_WRITE(sc, MID_DST_RP(0), 0);
EN_WRITE(sc, MID_WP_ST_CNT(0), 0);
  964   for (lcv = 0 ; lcv < 68 ; lcv++)              /* set up sample data */
sp[lcv] = lcv+1;
EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA);   /* enable DMA (only) */
sc->drq_chip = MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX));
sc->dtq_chip = MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX));
  971   /*
  972    * try it now . . .  DMA it out, then DMA it back in and compare
  973    *
  974    * note: in order to get the dma stuff to reverse directions it wants
  975    * the "end" flag set!   since we are not dma'ing valid data we may
  976    * get an ident mismatch interrupt (which we will ignore).
  977    *
  978    * note: we've got two different tests rolled up in the same loop
  979    * if (wmtry) 
  980    *   then we are doing a wmaybe test and wmtry is a byte count
  981    *   else we are doing a burst test
  982    */
  984   for (lcv = 8 ; lcv <= MIDDMA_MAXBURST ; lcv = lcv * 2) {
  986     /* zero SRAM and dest buffer */
  987     for (cnt = 0 ; cnt < 1024; cnt += 4) 
EN_WRITE(sc, MID_BUFOFF+cnt, 0);  /* zero memory */
  989     for (cnt = 0 ; cnt < 68  ; cnt++) 
dp[cnt] = 0;
  992     if (wmtry) {
count = (sc->bestburstlen - sizeof(u_int32_t)) / sizeof(u_int32_t);
bcode = en_dmaplan[count].bcode;
count = wmtry >> en_dmaplan[count].divshift;
  996     } else {
bcode = en_sz2b(lcv);
count = 1;
  999     }
 1000     if (sc->is_adaptec)
EN_WRITE(sc, sc->dtq_chip, MID_MK_TXQ_ADP(lcv, 0, MID_DMA_END, 0));
 1002     else
EN_WRITE(sc, sc->dtq_chip, MID_MK_TXQ_ENI(count, 0, MID_DMA_END, bcode));
EN_WRITE(sc, sc->dtq_chip+4, vtophys(sp));
EN_WRITE(sc, MID_DMA_WRTX, MID_DTQ_A2REG(sc->dtq_chip+8));
cnt = 1000;
 1007     while (EN_READ(sc, MID_DMA_RDTX) == MID_DTQ_A2REG(sc->dtq_chip)) {
DELAY(1);
cnt--;
 1010       if (cnt == 0) {
printf("%s: unexpected timeout in tx DMA test\n", sc->sc_dev.dv_xname);
 1012         return(retval);         /* timeout, give up */
 1013       }
 1014     }
EN_WRAPADD(MID_DTQOFF, MID_DTQEND, sc->dtq_chip, 8);
reg = EN_READ(sc, MID_INTACK); 
 1017     if ((reg & MID_INT_DMA_TX) != MID_INT_DMA_TX) {
printf("%s: unexpected status in tx DMA test: 0x%x\n", 
sc->sc_dev.dv_xname, reg);
 1020       return(retval);
 1021     }
EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA);   /* re-enable DMA (only) */
 1024     /* "return to sender..."  address is known ... */
 1026     if (sc->is_adaptec)
EN_WRITE(sc, sc->drq_chip, MID_MK_RXQ_ADP(lcv, 0, MID_DMA_END, 0));
 1028     else
EN_WRITE(sc, sc->drq_chip, MID_MK_RXQ_ENI(count, 0, MID_DMA_END, bcode));
EN_WRITE(sc, sc->drq_chip+4, vtophys(dp));
EN_WRITE(sc, MID_DMA_WRRX, MID_DRQ_A2REG(sc->drq_chip+8));
cnt = 1000;
 1033     while (EN_READ(sc, MID_DMA_RDRX) == MID_DRQ_A2REG(sc->drq_chip)) {
DELAY(1);
cnt--;
 1036       if (cnt == 0) {
printf("%s: unexpected timeout in rx DMA test\n", sc->sc_dev.dv_xname);
 1038         return(retval);         /* timeout, give up */
 1039       }
 1040     }
EN_WRAPADD(MID_DRQOFF, MID_DRQEND, sc->drq_chip, 8);
reg = EN_READ(sc, MID_INTACK); 
 1043     if ((reg & MID_INT_DMA_RX) != MID_INT_DMA_RX) {
printf("%s: unexpected status in rx DMA test: 0x%x\n", 
sc->sc_dev.dv_xname, reg);
 1046       return(retval);
 1047     }
EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA);   /* re-enable DMA (only) */
 1050     if (wmtry) {
 1051       return(bcmp(sp, dp, wmtry));  /* wmtry always exits here, no looping */
 1052     }
 1054     if (bcmp(sp, dp, lcv))
 1055       return(retval);           /* failed, use last value */
retval = lcv;
 1059   }
 1060   return(retval);               /* studly 64 byte DMA present!  oh baby!! */
 1061 }
 1063 /***********************************************************************/
 1065 /*
 1066  * en_ioctl: handle ioctl requests
 1067  *
 1068  * NOTE: if you add an ioctl to set txspeed, you should choose a new
 1069  * TX channel/slot.   Choose the one with the lowest sc->txslot[slot].nref
 1070  * value, subtract one from sc->txslot[0].nref, add one to the
 1071  * sc->txslot[slot].nref, set sc->txvc2slot[vci] = slot, and then set
 1072  * txspeed[vci].
 1073  */
STATIC int en_ioctl(ifp, cmd, data)
 1077 struct ifnet *ifp;
EN_IOCTL_CMDT cmd;
caddr_t data;
 1081 {
 1082 #ifdef MISSING_IF_SOFTC
 1083     struct en_softc *sc = (struct en_softc *) en_cd.cd_devs[ifp->if_unit];
 1084 #else
 1085     struct en_softc *sc = (struct en_softc *) ifp->if_softc;
 1086 #endif
 1087     struct ifaddr *ifa = (struct ifaddr *) data;
 1088     struct ifreq *ifr = (struct ifreq *) data;
 1089     struct atm_pseudoioctl *api = (struct atm_pseudoioctl *)data;
 1090 #ifdef NATM
 1091     struct atm_rawioctl *ario = (struct atm_rawioctl *)data;
 1092     int slot;
 1093 #endif
 1094     int s, error = 0;
s = splnet();
 1098     switch (cmd) {
 1099         case SIOCATMENA:                /* enable circuit for recv */
error = en_rxctl(sc, api, 1);
 1101                 break;
 1103         case SIOCATMDIS:                /* disable circuit for recv */
error = en_rxctl(sc, api, 0);
 1105                 break;
 1107 #ifdef NATM
 1108         case SIOCXRAWATM:
 1109                 if ((slot = sc->rxvc2slot[ario->npcb->npcb_vci]) == RX_NONE) {
error = EINVAL;
 1111                         break;
 1112                 }
 1113                 if (ario->rawvalue > EN_RXSZ*1024)
ario->rawvalue = EN_RXSZ*1024;
 1115                 if (ario->rawvalue) {
sc->rxslot[slot].oth_flags |= ENOTHER_RAW;
sc->rxslot[slot].raw_threshold = ario->rawvalue;
 1118                 } else {
sc->rxslot[slot].oth_flags &= (~ENOTHER_RAW);
sc->rxslot[slot].raw_threshold = 0;
 1121                 }
 1122 #ifdef EN_DEBUG
printf("%s: rxvci%d: turn %s raw (boodi) mode\n",
sc->sc_dev.dv_xname, ario->npcb->npcb_vci,
 1125                         (ario->rawvalue) ? "on" : "off");
 1126 #endif
 1127                 break;
 1128 #endif
 1129         case SIOCSIFADDR: 
ifp->if_flags |= IFF_UP;
 1131 #ifdef INET
 1132                 if (ifa->ifa_addr->sa_family == AF_INET) {
en_reset(sc);
en_init(sc);
ifa->ifa_rtrequest = atm_rtrequest; /* ??? */
 1136                         break;
 1137                 }
 1138 #endif /* INET */
 1139                 /* what to do if not INET? */
en_reset(sc);
en_init(sc);
 1142                 break;
 1144         case SIOCGIFADDR: 
error = EINVAL;
 1146                 break;
 1148         case SIOCSIFFLAGS: 
error = EINVAL;
 1150                 break;
 1152         case SIOCSIFMTU:
 1153             /*
 1154              * Set the interface MTU.
 1155              */
 1156 #ifdef notsure
 1157             if (ifr->ifr_mtu > ATMMTU) {
error = EINVAL;
 1159                 break;
 1160             }
 1161 #endif
ifp->if_mtu = ifr->ifr_mtu;
 1163                 /* XXXCDC: do we really need to reset on MTU size change? */
en_reset(sc);
en_init(sc);
 1166             break;
 1168         default: 
error = EINVAL;
 1170             break;
 1171     }
splx(s);
 1173     return error;
 1174 }
 1177 /*
 1178  * en_rxctl: turn on and off VCs for recv.
 1179  */
STATIC int en_rxctl(sc, pi, on)
 1183 struct en_softc *sc;
 1184 struct atm_pseudoioctl *pi;
 1185 int on;
 1187 {
u_int s, vci, flags, slot;
u_int32_t oldmode, newmode;
vci = ATM_PH_VCI(&pi->aph);
flags = ATM_PH_FLAGS(&pi->aph);
 1194 #ifdef EN_DEBUG
printf("%s: %s vpi=%d, vci=%d, flags=%d\n", sc->sc_dev.dv_xname,
 1196         (on) ? "enable" : "disable", ATM_PH_VPI(&pi->aph), vci, flags);
 1197 #endif
 1199   if (ATM_PH_VPI(&pi->aph) || vci >= MID_N_VC)
 1200     return(EINVAL);
 1202   /*
 1203    * turn on VCI!
 1204    */
 1206   if (on) {
 1207     if (sc->rxvc2slot[vci] != RX_NONE)
 1208       return(EINVAL);
 1209     for (slot = 0 ; slot < sc->en_nrx ; slot++)
 1210       if (sc->rxslot[slot].oth_flags & ENOTHER_FREE)
 1211         break;
 1212     if (slot == sc->en_nrx)
 1213       return(ENOSPC);
sc->rxvc2slot[vci] = slot;
sc->rxslot[slot].rxhand = NULL;
oldmode = sc->rxslot[slot].mode;
newmode = (flags & ATM_PH_AAL5) ? MIDV_AAL5 : MIDV_NOAAL;
sc->rxslot[slot].mode = MIDV_SETMODE(oldmode, newmode);
sc->rxslot[slot].atm_vci = vci;
sc->rxslot[slot].atm_flags = flags;
sc->rxslot[slot].oth_flags = 0;
sc->rxslot[slot].rxhand = pi->rxhand;
 1223     if (sc->rxslot[slot].indma.ifq_head || sc->rxslot[slot].q.ifq_head)
panic("en_rxctl: left over mbufs on enable");
sc->txspeed[vci] = 0;       /* full speed to start */
sc->txvc2slot[vci] = 0;     /* init value */
sc->txslot[0].nref++;       /* bump reference count */
en_loadvc(sc, vci);         /* does debug printf for us */
 1229     return(0);
 1230   }
 1232   /*
 1233    * turn off VCI
 1234    */
 1236   if (sc->rxvc2slot[vci] == RX_NONE)
 1237     return(EINVAL);
slot = sc->rxvc2slot[vci];
 1239   if ((sc->rxslot[slot].oth_flags & (ENOTHER_FREE|ENOTHER_DRAIN)) != 0)
 1240     return(EINVAL);
s = splnet();         /* block out enintr() */
oldmode = EN_READ(sc, MID_VC(vci));
newmode = MIDV_SETMODE(oldmode, MIDV_TRASH) & ~MIDV_INSERVICE;
EN_WRITE(sc, MID_VC(vci), (newmode | (oldmode & MIDV_INSERVICE)));
 1245                 /* halt in tracks, be careful to preserve inserivce bit */
DELAY(27);
sc->rxslot[slot].rxhand = NULL;
sc->rxslot[slot].mode = newmode;
sc->txslot[sc->txvc2slot[vci]].nref--;
sc->txspeed[vci] = 0;
sc->txvc2slot[vci] = 0;
 1254   /* if stuff is still going on we are going to have to drain it out */
 1255   if (sc->rxslot[slot].indma.ifq_head || 
sc->rxslot[slot].q.ifq_head ||
 1257                 (sc->rxslot[slot].oth_flags & ENOTHER_SWSL) != 0) {
sc->rxslot[slot].oth_flags |= ENOTHER_DRAIN;
 1259   } else {
sc->rxslot[slot].oth_flags = ENOTHER_FREE;
sc->rxslot[slot].atm_vci = RX_NONE;
sc->rxvc2slot[vci] = RX_NONE;
 1263   }
splx(s);              /* enable enintr() */
 1265 #ifdef EN_DEBUG
printf("%s: rx%d: VCI %d is now %s\n", sc->sc_dev.dv_xname, slot, vci,
 1267         (sc->rxslot[slot].oth_flags & ENOTHER_DRAIN) ? "draining" : "free");
 1268 #endif
 1269   return(0);
 1270 }
 1272 /***********************************************************************/
 1274 /*
 1275  * en_reset: reset the board, throw away work in progress.
 1276  * must en_init to recover.
 1277  */
 1279 void en_reset(sc)
 1281 struct en_softc *sc;
 1283 {
 1284   struct mbuf *m;
 1285   int lcv, slot;
 1287 #ifdef EN_DEBUG
printf("%s: reset\n", sc->sc_dev.dv_xname);
 1289 #endif
 1291   if (sc->en_busreset)
sc->en_busreset(sc);
EN_WRITE(sc, MID_RESID, 0x0); /* reset hardware */
 1295   /*
 1296    * recv: dump any mbufs we are dma'ing into, if DRAINing, then a reset
 1297    * will free us!
 1298    */
 1300   for (lcv = 0 ; lcv < MID_N_VC ; lcv++) {
 1301     if (sc->rxvc2slot[lcv] == RX_NONE)
 1302       continue;
slot = sc->rxvc2slot[lcv];
 1304     while (1) {
IF_DEQUEUE(&sc->rxslot[slot].indma, m);
 1306       if (m == NULL) 
 1307         break;          /* >>> exit 'while(1)' here <<< */
m_freem(m);
 1309     }
 1310     while (1) {
IF_DEQUEUE(&sc->rxslot[slot].q, m);
 1312       if (m == NULL) 
 1313         break;          /* >>> exit 'while(1)' here <<< */
m_freem(m);
 1315     }
sc->rxslot[slot].oth_flags &= ~ENOTHER_SWSL;
 1317     if (sc->rxslot[slot].oth_flags & ENOTHER_DRAIN) {
sc->rxslot[slot].oth_flags = ENOTHER_FREE;
sc->rxvc2slot[lcv] = RX_NONE;
 1320 #ifdef EN_DEBUG
printf("%s: rx%d: VCI %d is now free\n", sc->sc_dev.dv_xname, slot, lcv);
 1322 #endif
 1323     }
 1324   }
 1326   /*
 1327    * xmit: dump everything
 1328    */
 1330   for (lcv = 0 ; lcv < EN_NTX ; lcv++) {
 1331     while (1) {
IF_DEQUEUE(&sc->txslot[lcv].indma, m);
 1333       if (m == NULL) 
 1334         break;          /* >>> exit 'while(1)' here <<< */
m_freem(m);
 1336     }
 1337     while (1) {
IF_DEQUEUE(&sc->txslot[lcv].q, m);
 1339       if (m == NULL) 
 1340         break;          /* >>> exit 'while(1)' here <<< */
m_freem(m);
 1342     }
sc->txslot[lcv].mbsize = 0;
 1344   }
 1346   return;
 1347 }
 1350 /*
 1351  * en_init: init board and sync the card with the data in the softc.
 1352  */
STATIC void en_init(sc)
 1356 struct en_softc *sc;
 1358 {
 1359   int vc, slot;
u_int32_t loc;
 1362   if ((sc->enif.if_flags & IFF_UP) == 0) {
 1363 #ifdef EN_DEBUG
printf("%s: going down\n", sc->sc_dev.dv_xname);
 1365 #endif
en_reset(sc);                       /* to be safe */
sc->enif.if_flags &= ~IFF_RUNNING;  /* disable */
 1368     return;
 1369   }
 1371 #ifdef EN_DEBUG
printf("%s: going up\n", sc->sc_dev.dv_xname);
 1373 #endif
sc->enif.if_flags |= IFF_RUNNING;     /* enable */
 1376   if (sc->en_busreset)
sc->en_busreset(sc);
EN_WRITE(sc, MID_RESID, 0x0);         /* reset */
 1380   /*
 1381    * init obmem data structures: vc tab, dma q's, slist.
 1382    *
 1383    * note that we set drq_free/dtq_free to one less than the total number
 1384    * of DTQ/DRQs present.   we do this because the card uses the condition
 1385    * (drq_chip == drq_us) to mean "list is empty"... but if you allow the
 1386    * circular list to be completely full then (drq_chip == drq_us) [i.e.
 1387    * the drq_us pointer will wrap all the way around].   by restricting
 1388    * the number of active requests to (N - 1) we prevent the list from
 1389    * becoming completely full.    note that the card will sometimes give
 1390    * us an interrupt for a DTQ/DRQ we have already processes... this helps
 1391    * keep that interrupt from messing us up.
 1392    */
 1394   for (vc = 0 ; vc < MID_N_VC ; vc++) 
en_loadvc(sc, vc);
bzero(&sc->drq, sizeof(sc->drq));
sc->drq_free = MID_DRQ_N - 1;         /* N - 1 */
sc->drq_chip = MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX));
EN_WRITE(sc, MID_DMA_WRRX, MID_DRQ_A2REG(sc->drq_chip)); 
 1401                                                 /* ensure zero queue */
sc->drq_us = sc->drq_chip;
bzero(&sc->dtq, sizeof(sc->dtq));
sc->dtq_free = MID_DTQ_N - 1;         /* N - 1 */
sc->dtq_chip = MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX));
EN_WRITE(sc, MID_DMA_WRTX, MID_DRQ_A2REG(sc->dtq_chip)); 
 1408                                                 /* ensure zero queue */
sc->dtq_us = sc->dtq_chip;
sc->hwslistp = MID_SL_REG2A(EN_READ(sc, MID_SERV_WRITE));
sc->swsl_size = sc->swsl_head = sc->swsl_tail = 0;
 1414 #ifdef EN_DEBUG
printf("%s: drq free/chip: %d/0x%x, dtq free/chip: %d/0x%x, hwslist: 0x%x\n", 
sc->sc_dev.dv_xname, sc->drq_free, sc->drq_chip, 
sc->dtq_free, sc->dtq_chip, sc->hwslistp);
 1418 #endif
 1420   for (slot = 0 ; slot < EN_NTX ; slot++) {
sc->txslot[slot].bfree = EN_TXSZ * 1024;
EN_WRITE(sc, MIDX_READPTR(slot), 0);
EN_WRITE(sc, MIDX_DESCSTART(slot), 0);
loc = sc->txslot[slot].cur = sc->txslot[slot].start;
loc = loc - MID_RAMOFF;
loc = (loc & ~((EN_TXSZ*1024) - 1)) >> 2; /* mask, cvt to words */
loc = loc >> MIDV_LOCTOPSHFT;       /* top 11 bits */
EN_WRITE(sc, MIDX_PLACE(slot), MIDX_MKPLACE(en_k2sz(EN_TXSZ), loc));
 1429 #ifdef EN_DEBUG
printf("%s: tx%d: place 0x%x\n", sc->sc_dev.dv_xname,  slot,
EN_READ(sc, MIDX_PLACE(slot)));
 1432 #endif
 1433   }
 1435   /*
 1436    * enable!
 1437    */
EN_WRITE(sc, MID_INTENA, MID_INT_TX|MID_INT_DMA_OVR|MID_INT_IDENT|
MID_INT_LERR|MID_INT_DMA_ERR|MID_INT_DMA_RX|MID_INT_DMA_TX|
MID_INT_SERVICE| /* >>> MID_INT_SUNI| XXXCDC<<< */ MID_INT_STATS);
EN_WRITE(sc, MID_MAST_CSR, MID_SETIPL(sc->ipl)|MID_MCSR_ENDMA|
MID_MCSR_ENTX|MID_MCSR_ENRX);
 1445 }
 1448 /*
 1449  * en_loadvc: load a vc tab entry from a slot
 1450  */
STATIC void en_loadvc(sc, vc)
 1454 struct en_softc *sc;
 1455 int vc;
 1457 {
 1458   int slot;
u_int32_t reg = EN_READ(sc, MID_VC(vc));
reg = MIDV_SETMODE(reg, MIDV_TRASH);
EN_WRITE(sc, MID_VC(vc), reg);
DELAY(27);
 1465   if ((slot = sc->rxvc2slot[vc]) == RX_NONE)
 1466     return;
 1468   /* no need to set CRC */
EN_WRITE(sc, MID_DST_RP(vc), 0);      /* read pointer = 0, desc. start = 0 */
EN_WRITE(sc, MID_WP_ST_CNT(vc), 0);   /* write pointer = 0 */
EN_WRITE(sc, MID_VC(vc), sc->rxslot[slot].mode);  /* set mode, size, loc */
sc->rxslot[slot].cur = sc->rxslot[slot].start;
 1474 #ifdef EN_DEBUG
printf("%s: rx%d: assigned to VCI %d\n", sc->sc_dev.dv_xname, slot, vc);
 1476 #endif
 1477 }
 1480 /*
 1481  * en_start: start transmitting the next packet that needs to go out
 1482  * if there is one.    note that atm_output() has already splnet()'d us.
 1483  */
STATIC void en_start(ifp)
 1487 struct ifnet *ifp;
 1489 {
 1490 #ifdef MISSING_IF_SOFTC
 1491     struct en_softc *sc = (struct en_softc *) en_cd.cd_devs[ifp->if_unit];
 1492 #else
 1493     struct en_softc *sc = (struct en_softc *) ifp->if_softc;
 1494 #endif
 1495     struct mbuf *m, *lastm, *prev;
 1496     struct atm_pseudohdr *ap, *new_ap;
 1497     int txchan, mlen, got, need, toadd, cellcnt, first;
u_int32_t atm_vpi, atm_vci, atm_flags, *dat, aal;
u_int8_t *cp;
 1501     if ((ifp->if_flags & IFF_RUNNING) == 0)
 1502         return;
 1504     /*
 1505      * remove everything from interface queue since we handle all queueing
 1506      * locally ... 
 1507      */
 1509     while (1) {
IFQ_DEQUEUE(&ifp->if_snd, m);
 1512       if (m == NULL)
 1513         return;         /* EMPTY: >>> exit here <<< */
 1515       /*
 1516        * calculate size of packet (in bytes)
 1517        * also, if we are not doing transmit DMA we eliminate all stupid
 1518        * (non-word) alignments here using en_mfix().   calls to en_mfix()
 1519        * seem to be due to tcp retransmits for the most part.
 1520        *
 1521        * after this loop mlen total length of mbuf chain (including atm_ph),
 1522        * and lastm is a pointer to the last mbuf on the chain.
 1523        */
lastm = m;
mlen = 0;
prev = NULL;
 1528       while (1) {
 1529         /* no DMA? */
 1530         if ((!sc->is_adaptec && EN_ENIDMAFIX) || EN_NOTXDMA || !en_dma) {
 1531           if ( (mtod(lastm, unsigned long) % sizeof(u_int32_t)) != 0 ||
 1532             ((lastm->m_len % sizeof(u_int32_t)) != 0 && lastm->m_next)) {
first = (lastm == m);
 1534             if (en_mfix(sc, &lastm, prev) == 0) {       /* failed? */
m_freem(m);
m = NULL;
 1537               break;
 1538             }
 1539             if (first)
m = lastm;                /* update */
 1541           }
prev = lastm;
 1543         }
mlen += lastm->m_len;
 1545         if (lastm->m_next == NULL)
 1546           break;
lastm = lastm->m_next;
 1548       }
 1550       if (m == NULL)            /* happens only if mfix fails */
 1551         continue;
ap = mtod(m, struct atm_pseudohdr *);
atm_vpi = ATM_PH_VPI(ap);
atm_vci = ATM_PH_VCI(ap);
atm_flags = ATM_PH_FLAGS(ap) & ~(EN_OBHDR|EN_OBTRL);
aal = ((atm_flags & ATM_PH_AAL5) != 0) 
 1559                         ? MID_TBD_AAL5 : MID_TBD_NOAAL5;
 1561       /*
 1562        * check that vpi/vci is one we can use
 1563        */
 1565       if (atm_vpi || atm_vci > MID_N_VC) {
printf("%s: output vpi=%d, vci=%d out of card range, dropping...\n", 
sc->sc_dev.dv_xname, atm_vpi, atm_vci);
m_freem(m);
 1569         continue;
 1570       }
 1572       /*
 1573        * computing how much padding we need on the end of the mbuf, then
 1574        * see if we can put the TBD at the front of the mbuf where the
 1575        * link header goes (well behaved protocols will reserve room for us).
 1576        * last, check if room for PDU tail.
 1577        *
 1578        * got = number of bytes of data we have
 1579        * cellcnt = number of cells in this mbuf
 1580        * need = number of bytes of data + padding we need (excludes TBD)
 1581        * toadd = number of bytes of data we need to add to end of mbuf,
 1582        *        [including AAL5 PDU, if AAL5]
 1583        */
got = mlen - sizeof(struct atm_pseudohdr);
toadd = (aal == MID_TBD_AAL5) ? MID_PDU_SIZE : 0; /* PDU */
cellcnt = (got + toadd + (MID_ATMDATASZ - 1)) / MID_ATMDATASZ;
need = cellcnt * MID_ATMDATASZ;
toadd = need - got;               /* recompute, including zero padding */
 1591 #ifdef EN_DEBUG
printf("%s: txvci%d: mlen=%d, got=%d, need=%d, toadd=%d, cell#=%d\n",
sc->sc_dev.dv_xname, atm_vci, mlen, got, need, toadd, cellcnt);
printf("     leading_space=%d, trailing_space=%d\n", 
M_LEADINGSPACE(m), M_TRAILINGSPACE(lastm));
 1596 #endif
 1598 #ifdef EN_MBUF_OPT
 1600       /*
 1601        * note: external storage (M_EXT) can be shared between mbufs
 1602        * to avoid copying (see m_copym()).    this means that the same
 1603        * data buffer could be shared by several mbufs, and thus it isn't
 1604        * a good idea to try and write TBDs or PDUs to M_EXT data areas.
 1605        */
 1607       if (M_LEADINGSPACE(m) >= MID_TBD_SIZE && (m->m_flags & M_EXT) == 0) {
m->m_data -= MID_TBD_SIZE;
m->m_len += MID_TBD_SIZE;
mlen += MID_TBD_SIZE;
new_ap = mtod(m, struct atm_pseudohdr *);
 1612         *new_ap = *ap;                  /* move it back */
ap = new_ap;
dat = ((u_int32_t *) ap) + 1;
 1615         /* make sure the TBD is in proper byte order */
 1616         *dat++ = htonl(MID_TBD_MK1(aal, sc->txspeed[atm_vci], cellcnt));
 1617         *dat = htonl(MID_TBD_MK2(atm_vci, 0, 0));
atm_flags |= EN_OBHDR;
 1619       }
 1621       if (toadd && (lastm->m_flags & M_EXT) == 0 && 
M_TRAILINGSPACE(lastm) >= toadd) {
cp = mtod(lastm, u_int8_t *) + lastm->m_len;
lastm->m_len += toadd;
mlen += toadd;
 1626         if (aal == MID_TBD_AAL5) {
bzero(cp, toadd - MID_PDU_SIZE);
dat = (u_int32_t *)(cp + toadd - MID_PDU_SIZE);
 1629           /* make sure the PDU is in proper byte order */
 1630           *dat = htonl(MID_PDU_MK1(0, 0, got));
 1631         } else {
bzero(cp, toadd);
 1633         }
atm_flags |= EN_OBTRL;
 1635       }
ATM_PH_FLAGS(ap) = atm_flags;     /* update EN_OBHDR/EN_OBTRL bits */
 1637 #endif  /* EN_MBUF_OPT */
 1639       /*
 1640        * get assigned channel (will be zero unless txspeed[atm_vci] is set)
 1641        */
txchan = sc->txvc2slot[atm_vci];
 1645       if (sc->txslot[txchan].mbsize > EN_TXHIWAT) {
EN_COUNT(sc->txmbovr);
m_freem(m);
 1648 #ifdef EN_DEBUG
printf("%s: tx%d: buffer space shortage\n", sc->sc_dev.dv_xname,
txchan);
 1651 #endif
 1652         continue;
 1653       }
sc->txslot[txchan].mbsize += mlen;
 1657 #ifdef EN_DEBUG
printf("%s: tx%d: VPI=%d, VCI=%d, FLAGS=0x%x, speed=0x%x\n",
sc->sc_dev.dv_xname, txchan, atm_vpi, atm_vci, atm_flags, 
sc->txspeed[atm_vci]);
printf("     adjusted mlen=%d, mbsize=%d\n", mlen, 
sc->txslot[txchan].mbsize);
 1663 #endif
IF_ENQUEUE(&sc->txslot[txchan].q, m);
en_txdma(sc, txchan);
 1668   }
 1669   /*NOTREACHED*/
 1670 }
 1673 /*
 1674  * en_mfix: fix a stupid mbuf
 1675  */
STATIC int en_mfix(sc, mm, prev)
 1679 struct en_softc *sc;
 1680 struct mbuf **mm, *prev;
 1682 {
 1683   struct mbuf *m, *new;
u_char *d, *cp;
 1685   int off;
 1686   struct mbuf *nxt;
m = *mm;
EN_COUNT(sc->mfix);                   /* count # of calls */
 1691 #ifdef EN_DEBUG
printf("%s: mfix mbuf m_data=%p, m_len=%d\n", sc->sc_dev.dv_xname,
m->m_data, m->m_len);
 1694 #endif
d = mtod(m, u_char *);
off = ((unsigned long) d) % sizeof(u_int32_t);
 1699   if (off) {
 1700     if ((m->m_flags & M_EXT) == 0) {
bcopy(d, d - off, m->m_len);   /* ALIGN! (with costly data copy...) */
d -= off;
m->m_data = (caddr_t)d;
 1704     } else {
 1705       /* can't write to an M_EXT mbuf since it may be shared */
MGET(new, M_DONTWAIT, MT_DATA);
 1707       if (!new) {
EN_COUNT(sc->mfixfail);
 1709         return(0);
 1710       }
MCLGET(new, M_DONTWAIT);
 1712       if ((new->m_flags & M_EXT) == 0) {
m_free(new);
EN_COUNT(sc->mfixfail);
 1715         return(0);
 1716       }
bcopy(d, new->m_data, m->m_len);  /* ALIGN! (with costly data copy...) */
new->m_len = m->m_len;
new->m_next = m->m_next;
 1720       if (prev)
prev->m_next = new;
m_free(m);
 1723       *mm = m = new;    /* note: 'd' now invalid */
 1724     }
 1725   }
off = m->m_len % sizeof(u_int32_t);
 1728   if (off == 0)
 1729     return(1);
d = mtod(m, u_char *) + m->m_len;
off = sizeof(u_int32_t) - off;
nxt = m->m_next;
 1735   while (off--) {
 1736     for ( ; nxt != NULL && nxt->m_len == 0 ; nxt = nxt->m_next)
 1737       /*null*/;
 1738     if (nxt == NULL) {          /* out of data, zero fill */
 1739       *d++ = 0;
 1740       continue;                 /* next "off" */
 1741     }
cp = mtod(nxt, u_char *);
 1743     *d++ = *cp++;
m->m_len++;
nxt->m_len--; 
nxt->m_data = (caddr_t)cp;
 1747   }
 1748   return(1);
 1749 }
 1752 /*
 1753  * en_txdma: start transmit DMA, if possible
 1754  */
STATIC void en_txdma(sc, chan)
 1758 struct en_softc *sc;
 1759 int chan;
 1761 {
 1762   struct mbuf *tmp;
 1763   struct atm_pseudohdr *ap;
 1764   struct en_launch launch;
 1765   int datalen = 0, dtqneed, len, ncells;
u_int8_t *cp;
 1768 #ifdef EN_DEBUG
printf("%s: tx%d: starting...\n", sc->sc_dev.dv_xname, chan);
 1770 #endif
 1772   /*
 1773    * note: now that txlaunch handles non-word aligned/sized requests
 1774    * the only time you can safely set launch.nodma is if you've en_mfix()'d
 1775    * the mbuf chain.    this happens only if EN_NOTXDMA || !en_dma.
 1776    */
launch.nodma = (EN_NOTXDMA || !en_dma);
again:
 1782   /*
 1783    * get an mbuf waiting for DMA
 1784    */
launch.t = sc->txslot[chan].q.ifq_head; /* peek at head of queue */
 1788   if (launch.t == NULL) {
 1789 #ifdef EN_DEBUG
printf("%s: tx%d: ...done!\n", sc->sc_dev.dv_xname, chan);
 1791 #endif
 1792     return;     /* >>> exit here if no data waiting for DMA <<< */
 1793   }
 1795   /*
 1796    * get flags, vci
 1797    * 
 1798    * note: launch.need = # bytes we need to get on the card
 1799    *       dtqneed = # of DTQs we need for this packet
 1800    *       launch.mlen = # of bytes in in mbuf chain (<= launch.need)
 1801    */
ap = mtod(launch.t, struct atm_pseudohdr *);
launch.atm_vci = ATM_PH_VCI(ap);
launch.atm_flags = ATM_PH_FLAGS(ap);
launch.aal = ((launch.atm_flags & ATM_PH_AAL5) != 0) ? 
MID_TBD_AAL5 : MID_TBD_NOAAL5;
 1809   /*
 1810    * XXX: have to recompute the length again, even though we already did
 1811    * it in en_start().   might as well compute dtqneed here as well, so 
 1812    * this isn't that bad.
 1813    */
 1815   if ((launch.atm_flags & EN_OBHDR) == 0) {
dtqneed = 1;                /* header still needs to be added */
launch.need = MID_TBD_SIZE; /* not included with mbuf */
 1818   } else {
dtqneed = 0;                /* header on-board, dma with mbuf */
launch.need = 0;
 1821   }
launch.mlen = 0;
 1824   for (tmp = launch.t ; tmp != NULL ; tmp = tmp->m_next) {
len = tmp->m_len;
launch.mlen += len;
cp = mtod(tmp, u_int8_t *);
 1828     if (tmp == launch.t) {
len -= sizeof(struct atm_pseudohdr); /* don't count this! */
cp += sizeof(struct atm_pseudohdr);
 1831     }
launch.need += len;
 1833     if (len == 0)
 1834       continue;                 /* atm_pseudohdr alone in first mbuf */
dtqneed += en_dqneed(sc, (caddr_t) cp, len, 1);
 1837   }
 1839   if ((launch.need % sizeof(u_int32_t)) != 0) 
dtqneed++;                  /* need DTQ to FLUSH internal buffer */
 1842   if ((launch.atm_flags & EN_OBTRL) == 0) {
 1843     if (launch.aal == MID_TBD_AAL5) {
datalen = launch.need - MID_TBD_SIZE;
launch.need += MID_PDU_SIZE;              /* AAL5: need PDU tail */
 1846     }
dtqneed++;                  /* need to work on the end a bit */
 1848   }
 1850   /*
 1851    * finish calculation of launch.need (need to figure out how much padding
 1852    * we will need).   launch.need includes MID_TBD_SIZE, but we need to
 1853    * remove that to so we can round off properly.     we have to add 
 1854    * MID_TBD_SIZE back in after calculating ncells.
 1855    */
launch.need = roundup(launch.need - MID_TBD_SIZE, MID_ATMDATASZ);
ncells = launch.need / MID_ATMDATASZ;
launch.need += MID_TBD_SIZE;
 1861   if (launch.need > EN_TXSZ * 1024) {
printf("%s: tx%d: packet larger than xmit buffer (%d > %d)\n",
sc->sc_dev.dv_xname, chan, launch.need, EN_TXSZ * 1024);
 1864     goto dequeue_drop;
 1865   }
 1867   /*
 1868    * note: note that we cannot totally fill the circular buffer (i.e.
 1869    * we can't use up all of the remaining sc->txslot[chan].bfree free
 1870    * bytes) because that would cause the circular buffer read pointer
 1871    * to become equal to the write pointer, thus signaling 'empty buffer'
 1872    * to the hardware and stopping the transmitter.
 1873    */
 1874   if (launch.need >= sc->txslot[chan].bfree) {
EN_COUNT(sc->txoutspace);
 1876 #ifdef EN_DEBUG
printf("%s: tx%d: out of transmit space\n", sc->sc_dev.dv_xname, chan);
 1878 #endif
 1879     return;             /* >>> exit here if out of obmem buffer space <<< */
 1880   }
 1882   /*
 1883    * ensure we have enough dtqs to go, if not, wait for more.
 1884    */
 1886   if (launch.nodma) {
dtqneed = 1;
 1888   }
 1889   if (dtqneed > sc->dtq_free) {
sc->need_dtqs = 1;
EN_COUNT(sc->txdtqout);
 1892 #ifdef EN_DEBUG
printf("%s: tx%d: out of transmit DTQs\n", sc->sc_dev.dv_xname, chan);
 1894 #endif
 1895     return;             /* >>> exit here if out of dtqs <<< */
 1896   }
 1898   /*
 1899    * it is a go, commit!  dequeue mbuf start working on the xfer.
 1900    */
IF_DEQUEUE(&sc->txslot[chan].q, tmp);
 1903 #ifdef EN_DIAG
 1904   if (launch.t != tmp)
panic("en dequeue");
 1906 #endif /* EN_DIAG */
 1908   /*
 1909    * launch!
 1910    */
EN_COUNT(sc->launch);
sc->enif.if_opackets++;
 1914   if ((launch.atm_flags & EN_OBHDR) == 0) {
EN_COUNT(sc->lheader);
 1916     /* store tbd1/tbd2 in host byte order */
launch.tbd1 = MID_TBD_MK1(launch.aal, sc->txspeed[launch.atm_vci], ncells);
launch.tbd2 = MID_TBD_MK2(launch.atm_vci, 0, 0);
 1919   }
 1920   if ((launch.atm_flags & EN_OBTRL) == 0 && launch.aal == MID_TBD_AAL5) {
EN_COUNT(sc->ltail);
launch.pdu1 = MID_PDU_MK1(0, 0, datalen);  /* host byte order */
 1923   }
 1925 #if NBPFILTER > 0
 1926         if (sc->enif.if_bpf != NULL) {
 1927                 /*
 1928                  * adjust the top of the mbuf to skip the TBD if present
 1929                  * before passing the packet to bpf.
 1930                  * Also remove padding and the PDU trailer. Assume both of
 1931                  * them to be in the same mbuf. pktlen, m_len and m_data
 1932                  * are not needed anymore so we can change them.
 1933                  */
 1934                 int size = sizeof(struct atm_pseudohdr);
 1935                 if (launch.atm_flags & EN_OBHDR)
size += MID_TBD_SIZE;
launch.t->m_data += size;
launch.t->m_len -= size;
bpf_mtap(sc->enif.if_bpf, launch.t, BPF_DIRECTION_OUT);
launch.t->m_data -= size;
launch.t->m_len += size;
 1945         }
 1946 #endif
en_txlaunch(sc, chan, &launch);
 1950   /*
 1951    * do some housekeeping and get the next packet
 1952    */
sc->txslot[chan].bfree -= launch.need;
IF_ENQUEUE(&sc->txslot[chan].indma, launch.t);
 1956   goto again;
 1958   /*
 1959    * END of txdma loop!
 1960    */
 1962   /*
 1963    * error handles
 1964    */
dequeue_drop:
IF_DEQUEUE(&sc->txslot[chan].q, tmp);
 1968   if (launch.t != tmp)
panic("en dequeue drop");
m_freem(launch.t);
sc->txslot[chan].mbsize -= launch.mlen;
 1972   goto again;
 1973 }
 1976 /*
 1977  * en_txlaunch: launch an mbuf into the dma pool!
 1978  */
STATIC void en_txlaunch(sc, chan, l)
 1982 struct en_softc *sc;
 1983 int chan;
 1984 struct en_launch *l;
 1986 {
 1987   struct mbuf *tmp;
u_int32_t cur = sc->txslot[chan].cur,
start = sc->txslot[chan].start,
stop = sc->txslot[chan].stop,
dma, *data, *datastop, count, bcode;
 1992   int pad, addtail, need, len, needalign, cnt, end, mx;
 1995  /*
 1996   * vars:
 1997   *   need = # bytes card still needs (decr. to zero)
 1998   *   len = # of bytes left in current mbuf
 1999   *   cur = our current pointer
 2000   *   dma = last place we programmed into the DMA
 2001   *   data = pointer into data area of mbuf that needs to go next
 2002   *   cnt = # of bytes to transfer in this DTQ
 2003   *   bcode/count = DMA burst code, and chip's version of cnt
 2004   *
 2005   *   a single buffer can require up to 5 DTQs depending on its size
 2006   *   and alignment requirements.   the 5 possible requests are:
 2007   *   [1] 1, 2, or 3 byte DMA to align src data pointer to word boundary
 2008   *   [2] alburst DMA to align src data pointer to bestburstlen
 2009   *   [3] 1 or more bestburstlen DMAs
 2010   *   [4] clean up burst (to last word boundary)
 2011   *   [5] 1, 2, or 3 byte final clean up DMA
 2012   */
need = l->need;
dma = cur;
addtail = (l->atm_flags & EN_OBTRL) == 0;      /* add a tail? */
 2018 #ifdef EN_DIAG
 2019   if ((need - MID_TBD_SIZE) % MID_ATMDATASZ) 
printf("%s: tx%d: bogus transmit needs (%d)\n", sc->sc_dev.dv_xname, chan,
need);
 2022 #endif
 2023 #ifdef EN_DEBUG
printf("%s: tx%d: launch mbuf %p!   cur=0x%x[%d], need=%d, addtail=%d\n",
sc->sc_dev.dv_xname, chan, l->t, cur, (cur-start)/4, need, addtail);
count = EN_READ(sc, MIDX_PLACE(chan));
printf("     HW: base_address=0x%x, size=%d, read=%d, descstart=%d\n",
MIDX_BASE(count), MIDX_SZ(count), EN_READ(sc, MIDX_READPTR(chan)), 
EN_READ(sc, MIDX_DESCSTART(chan)));
 2030 #endif
 2032  /*
 2033   * do we need to insert the TBD by hand?
 2034   * note that tbd1/tbd2/pdu1 are in host byte order.
 2035   */
 2037   if ((l->atm_flags & EN_OBHDR) == 0) {
 2038 #ifdef EN_DEBUG
printf("%s: tx%d: insert header 0x%x 0x%x\n", sc->sc_dev.dv_xname,
chan, l->tbd1, l->tbd2);
 2041 #endif
EN_WRITE(sc, cur, l->tbd1);
EN_WRAPADD(start, stop, cur, 4);
EN_WRITE(sc, cur, l->tbd2);
EN_WRAPADD(start, stop, cur, 4);
need -= 8;
 2047   }
 2049   /*
 2050    * now do the mbufs...
 2051    */
 2053   for (tmp = l->t ; tmp != NULL ; tmp = tmp->m_next) {
 2055     /* get pointer to data and length */
data = mtod(tmp, u_int32_t *);
len = tmp->m_len;
 2058     if (tmp == l->t) {
data += sizeof(struct atm_pseudohdr)/sizeof(u_int32_t);
len -= sizeof(struct atm_pseudohdr);
 2061     }
 2063     /* now, determine if we should copy it */
 2064     if (l->nodma || (len < EN_MINDMA &&
 2065        (len % 4) == 0 && ((unsigned long) data % 4) == 0 && (cur % 4) == 0)) {
 2067       /* 
 2068        * roundup len: the only time this will change the value of len
 2069        * is when l->nodma is true, tmp is the last mbuf, and there is
 2070        * a non-word number of bytes to transmit.   in this case it is
 2071        * safe to round up because we've en_mfix'd the mbuf (so the first
 2072        * byte is word aligned there must be enough free bytes at the end
 2073        * to round off to the next word boundary)...
 2074        */
len = roundup(len, sizeof(u_int32_t));
datastop = data + (len / sizeof(u_int32_t));
 2077       /* copy loop: preserve byte order!!!  use WRITEDAT */
 2078       while (data != datastop) {
EN_WRITEDAT(sc, cur, *data);
data++;
EN_WRAPADD(start, stop, cur, 4);
 2082       }
need -= len;
 2084 #ifdef EN_DEBUG
printf("%s: tx%d: copied %d bytes (%d left, cur now 0x%x)\n", 
sc->sc_dev.dv_xname, chan, len, need, cur);
 2087 #endif
 2088       continue;         /* continue on to next mbuf */
 2089     }
 2091     /* going to do DMA, first make sure the dtq is in sync. */
 2092     if (dma != cur) {
EN_DTQADD(sc, WORD_IDX(start,cur), chan, MIDDMA_JK, 0, 0, 0);
 2094 #ifdef EN_DEBUG
printf("%s: tx%d: dtq_sync: advance pointer to %d\n",
sc->sc_dev.dv_xname, chan, cur);
 2097 #endif
 2098     }
 2100     /*
 2101      * if this is the last buffer, and it looks like we are going to need to
 2102      * flush the internal buffer, can we extend the length of this mbuf to
 2103      * avoid the FLUSH?
 2104      */
 2106     if (tmp->m_next == NULL) {
cnt = (need - len) % sizeof(u_int32_t);
 2108       if (cnt && M_TRAILINGSPACE(tmp) >= cnt)
len += cnt;                     /* pad for FLUSH */
 2110     }
 2112 #if !defined(MIDWAY_ENIONLY)
 2114     /*
 2115      * the adaptec DMA engine is smart and handles everything for us.
 2116      */
 2118     if (sc->is_adaptec) {
 2119       /* need to DMA "len" bytes out to card */
need -= len;
EN_WRAPADD(start, stop, cur, len);
 2122 #ifdef EN_DEBUG
printf("%s: tx%d: adp_dma %d bytes (%d left, cur now 0x%x)\n",
sc->sc_dev.dv_xname, chan, len, need, cur);
 2125 #endif
end = (need == 0) ? MID_DMA_END : 0;
EN_DTQADD(sc, len, chan, 0, vtophys(data), l->mlen, end);
 2128       if (end)
 2129         goto done;
dma = cur;        /* update dma pointer */
 2131       continue;
 2132     }
 2133 #endif /* !MIDWAY_ENIONLY */
 2135 #if !defined(MIDWAY_ADPONLY)
 2137     /*
 2138      * the ENI DMA engine is not so smart and need more help from us
 2139      */
 2141     /* do we need to do a DMA op to align to word boundary? */
needalign = (unsigned long) data % sizeof(u_int32_t);
 2143     if (needalign) {
EN_COUNT(sc->headbyte);
cnt = sizeof(u_int32_t) - needalign;
 2146       if (cnt == 2 && len >= cnt) {
count = 1;
bcode = MIDDMA_2BYTE;
 2149       } else {
cnt = min(cnt, len);            /* prevent overflow */
count = cnt;
bcode = MIDDMA_BYTE;
 2153       }
need -= cnt;
EN_WRAPADD(start, stop, cur, cnt);
 2156 #ifdef EN_DEBUG
printf("%s: tx%d: small al_dma %d bytes (%d left, cur now 0x%x)\n",
sc->sc_dev.dv_xname, chan, cnt, need, cur);
 2159 #endif
len -= cnt;
end = (need == 0) ? MID_DMA_END : 0;
EN_DTQADD(sc, count, chan, bcode, vtophys(data), l->mlen, end);
 2163       if (end)
 2164         goto done;
data = (u_int32_t *) ((u_char *)data + cnt);
 2166     }
 2168     /* do we need to do a DMA op to align? */
 2169     if (sc->alburst && 
 2170         (needalign = (((unsigned long) data) & sc->bestburstmask)) != 0
 2171         && len >= sizeof(u_int32_t)) {
cnt = sc->bestburstlen - needalign;
mx = len & ~(sizeof(u_int32_t)-1);        /* don't go past end */
 2174       if (cnt > mx) {
cnt = mx;
count = cnt / sizeof(u_int32_t);
bcode = MIDDMA_WORD;
 2178       } else {
count = cnt / sizeof(u_int32_t);
bcode = en_dmaplan[count].bcode;
count = cnt >> en_dmaplan[count].divshift;
 2182       }
need -= cnt;
EN_WRAPADD(start, stop, cur, cnt);
 2185 #ifdef EN_DEBUG
printf("%s: tx%d: al_dma %d bytes (%d left, cur now 0x%x)\n", 
sc->sc_dev.dv_xname, chan, cnt, need, cur);
 2188 #endif
len -= cnt;
end = (need == 0) ? MID_DMA_END : 0;
EN_DTQADD(sc, count, chan, bcode, vtophys(data), l->mlen, end);
 2192       if (end)
 2193         goto done;
data = (u_int32_t *) ((u_char *)data + cnt);
 2195     }
 2197     /* do we need to do a max-sized burst? */
 2198     if (len >= sc->bestburstlen) {
count = len >> sc->bestburstshift;
cnt = count << sc->bestburstshift;
bcode = sc->bestburstcode;
need -= cnt;
EN_WRAPADD(start, stop, cur, cnt);
 2204 #ifdef EN_DEBUG
printf("%s: tx%d: best_dma %d bytes (%d left, cur now 0x%x)\n", 
sc->sc_dev.dv_xname, chan, cnt, need, cur);
 2207 #endif
len -= cnt;
end = (need == 0) ? MID_DMA_END : 0;
EN_DTQADD(sc, count, chan, bcode, vtophys(data), l->mlen, end);
 2211       if (end)
 2212         goto done;
data = (u_int32_t *) ((u_char *)data + cnt);
 2214     }
 2216     /* do we need to do a cleanup burst? */
cnt = len & ~(sizeof(u_int32_t)-1);
 2218     if (cnt) {
count = cnt / sizeof(u_int32_t);
bcode = en_dmaplan[count].bcode;
count = cnt >> en_dmaplan[count].divshift;
need -= cnt;
EN_WRAPADD(start, stop, cur, cnt);
 2224 #ifdef EN_DEBUG
printf("%s: tx%d: cleanup_dma %d bytes (%d left, cur now 0x%x)\n", 
sc->sc_dev.dv_xname, chan, cnt, need, cur);
 2227 #endif
len -= cnt;
end = (need == 0) ? MID_DMA_END : 0;
EN_DTQADD(sc, count, chan, bcode, vtophys(data), l->mlen, end);
 2231       if (end)
 2232         goto done;
data = (u_int32_t *) ((u_char *)data + cnt);
 2234     }
 2236     /* any word fragments left? */
 2237     if (len) {
EN_COUNT(sc->tailbyte);
 2239       if (len == 2) {
count = 1;
bcode = MIDDMA_2BYTE;                 /* use 2byte mode */
 2242       } else {
count = len;
bcode = MIDDMA_BYTE;                  /* use 1 byte mode */
 2245       }
need -= len;
EN_WRAPADD(start, stop, cur, len);
 2248 #ifdef EN_DEBUG
printf("%s: tx%d: byte cleanup_dma %d bytes (%d left, cur now 0x%x)\n",
sc->sc_dev.dv_xname, chan, len, need, cur);
 2251 #endif
end = (need == 0) ? MID_DMA_END : 0;
EN_DTQADD(sc, count, chan, bcode, vtophys(data), l->mlen, end);
 2254       if (end)
 2255         goto done;
 2256     }
dma = cur;          /* update dma pointer */
 2259 #endif /* !MIDWAY_ADPONLY */
 2261   } /* next mbuf, please */
 2263   /*
 2264    * all mbuf data has been copied out to the obmem (or set up to be DMAd).
 2265    * if the trailer or padding needs to be put in, do it now.  
 2266    *
 2267    * NOTE: experimental results reveal the following fact:
 2268    *   if you DMA "X" bytes to the card, where X is not a multiple of 4,
 2269    *   then the card will internally buffer the last (X % 4) bytes (in
 2270    *   hopes of getting (4 - (X % 4)) more bytes to make a complete word).
 2271    *   it is imporant to make sure we don't leave any important data in
 2272    *   this internal buffer because it is discarded on the last (end) DTQ.
 2273    *   one way to do this is to DMA in (4 - (X % 4)) more bytes to flush
 2274    *   the darn thing out.
 2275    */
 2277   if (addtail) {
pad = need % sizeof(u_int32_t);
 2280     if (pad) {
 2281       /*
 2282        * FLUSH internal data buffer.  pad out with random data from the front
 2283        * of the mbuf chain...
 2284        */
bcode = (sc->is_adaptec) ? 0 : MIDDMA_BYTE;
EN_COUNT(sc->tailflush);
EN_WRAPADD(start, stop, cur, pad);
EN_DTQADD(sc, pad, chan, bcode, vtophys(l->t->m_data), 0, 0);
need -= pad;
 2290 #ifdef EN_DEBUG
printf("%s: tx%d: pad/FLUSH dma %d bytes (%d left, cur now 0x%x)\n", 
sc->sc_dev.dv_xname, chan, pad, need, cur);
 2293 #endif
 2294     }
 2296     /* copy data */
pad = need / sizeof(u_int32_t);     /* round *down* */
 2298     if (l->aal == MID_TBD_AAL5)
pad -= 2;
 2300 #ifdef EN_DEBUG
printf("%s: tx%d: padding %d bytes (cur now 0x%x)\n", 
sc->sc_dev.dv_xname, chan, pad * sizeof(u_int32_t), cur);
 2303 #endif
 2304     while (pad--) {
EN_WRITEDAT(sc, cur, 0);  /* no byte order issues with zero */
EN_WRAPADD(start, stop, cur, 4);
 2307     }
 2308     if (l->aal == MID_TBD_AAL5) {
EN_WRITE(sc, cur, l->pdu1); /* in host byte order */
EN_WRAPADD(start, stop, cur, 8);
 2311     }
 2312   }
 2314   if (addtail || dma != cur) {
 2315    /* write final descriptor  */
EN_DTQADD(sc, WORD_IDX(start,cur), chan, MIDDMA_JK, 0, 
l->mlen, MID_DMA_END);
 2318     /* dma = cur; */    /* not necessary since we are done */
 2319   }
done:
 2322   /* update current pointer */
sc->txslot[chan].cur = cur;
 2324 #ifdef EN_DEBUG
printf("%s: tx%d: DONE!   cur now = 0x%x\n", 
sc->sc_dev.dv_xname, chan, cur);
 2327 #endif
 2329   return;
 2330 }
 2333 /*
 2334  * interrupt handler
 2335  */
EN_INTR_TYPE en_intr(arg)
 2339 void *arg;
 2341 {
 2342   struct en_softc *sc = (struct en_softc *) arg;
 2343   struct mbuf *m;
 2344   struct atm_pseudohdr ah;
u_int32_t reg, kick, val, mask, chip, vci, slot, dtq, drq;
 2346   int lcv, idx, need_softserv = 0;
reg = EN_READ(sc, MID_INTACK);
 2350   if ((reg & MID_INT_ANY) == 0) 
EN_INTR_RET(0); /* not us */
 2353 #ifdef EN_DEBUG
printf("%s: interrupt=0x%b\n", sc->sc_dev.dv_xname, reg, MID_INTBITS);
 2355 #endif
 2357   /*
 2358    * unexpected errors that need a reset
 2359    */
 2361   if ((reg & (MID_INT_IDENT|MID_INT_LERR|MID_INT_DMA_ERR|MID_INT_SUNI)) != 0) {
printf("%s: unexpected interrupt=0x%b, resetting card\n", 
sc->sc_dev.dv_xname, reg, MID_INTBITS);
 2364 #ifdef EN_DEBUG
 2365 #ifdef DDB
Debugger();
 2367 #endif  /* DDB */
sc->enif.if_flags &= ~IFF_RUNNING; /* FREEZE! */
 2369 #else
en_reset(sc);
en_init(sc);
 2372 #endif
EN_INTR_RET(1); /* for us */
 2374   }
 2376   /*******************
 2377    * xmit interrupts *
 2378    ******************/
kick = 0;                             /* bitmask of channels to kick */
 2381   if (reg & MID_INT_TX) {               /* TX done! */
 2383     /*
 2384      * check for tx complete, if detected then this means that some space
 2385      * has come free on the card.   we must account for it and arrange to
 2386      * kick the channel to life (in case it is stalled waiting on the card).
 2387      */
 2388     for (mask = 1, lcv = 0 ; lcv < EN_NTX ; lcv++, mask = mask * 2) {
 2389       if (reg & MID_TXCHAN(lcv)) {
kick = kick | mask;     /* want to kick later */
val = EN_READ(sc, MIDX_READPTR(lcv));   /* current read pointer */
val = (val * sizeof(u_int32_t)) + sc->txslot[lcv].start;
 2393                                                 /* convert to offset */
 2394         if (val > sc->txslot[lcv].cur)
sc->txslot[lcv].bfree = val - sc->txslot[lcv].cur;
 2396         else
sc->txslot[lcv].bfree = (val + (EN_TXSZ*1024)) - sc->txslot[lcv].cur;
 2398 #ifdef EN_DEBUG
printf("%s: tx%d: transmit done.   %d bytes now free in buffer\n",
sc->sc_dev.dv_xname, lcv, sc->txslot[lcv].bfree);
 2401 #endif
 2402       }
 2403     }
 2404   }
 2406   if (reg & MID_INT_DMA_TX) {           /* TX DMA done! */
 2408   /*
 2409    * check for TX DMA complete, if detected then this means that some DTQs
 2410    * are now free.   it also means some indma mbufs can be freed.
 2411    * if we needed DTQs, kick all channels.
 2412    */
val = EN_READ(sc, MID_DMA_RDTX);    /* chip's current location */
idx = MID_DTQ_A2REG(sc->dtq_chip);/* where we last saw chip */
 2415     if (sc->need_dtqs) {
kick = MID_NTX_CH - 1;            /* assume power of 2, kick all! */
sc->need_dtqs = 0;                /* recalculated in "kick" loop below */
 2418 #ifdef EN_DEBUG
printf("%s: cleared need DTQ condition\n", sc->sc_dev.dv_xname);
 2420 #endif
 2421     }
 2422     while (idx != val) {
sc->dtq_free++;
 2424       if ((dtq = sc->dtq[idx]) != 0) {
sc->dtq[idx] = 0;       /* don't forget to zero it out when done */
slot = EN_DQ_SLOT(dtq);
IF_DEQUEUE(&sc->txslot[slot].indma, m);
 2428         if (!m) panic("enintr: dtqsync");
sc->txslot[slot].mbsize -= EN_DQ_LEN(dtq);
 2430 #ifdef EN_DEBUG
printf("%s: tx%d: free %d dma bytes, mbsize now %d\n",
sc->sc_dev.dv_xname, slot, EN_DQ_LEN(dtq), 
sc->txslot[slot].mbsize);
 2434 #endif
m_freem(m);
 2436       }
EN_WRAPADD(0, MID_DTQ_N, idx, 1);
 2438     }
sc->dtq_chip = MID_DTQ_REG2A(val);  /* sync softc */
 2440   }
 2443   /*
 2444    * kick xmit channels as needed
 2445    */
 2447   if (kick) {
 2448 #ifdef EN_DEBUG
printf("%s: tx kick mask = 0x%x\n", sc->sc_dev.dv_xname, kick);
 2450 #endif
 2451     for (mask = 1, lcv = 0 ; lcv < EN_NTX ; lcv++, mask = mask * 2) {
 2452       if ((kick & mask) && sc->txslot[lcv].q.ifq_head) {
en_txdma(sc, lcv);              /* kick it! */
 2454       }
 2455     }           /* for each slot */
 2456   }             /* if kick */
 2459   /*******************
 2460    * recv interrupts *
 2461    ******************/
 2463   /*
 2464    * check for RX DMA complete, and pass the data "upstairs"
 2465    */
 2467   if (reg & MID_INT_DMA_RX) {
val = EN_READ(sc, MID_DMA_RDRX); /* chip's current location */
idx = MID_DRQ_A2REG(sc->drq_chip);/* where we last saw chip */
 2470     while (idx != val) {
sc->drq_free++;
 2472       if ((drq = sc->drq[idx]) != 0) {
sc->drq[idx] = 0;       /* don't forget to zero it out when done */
slot = EN_DQ_SLOT(drq);
 2475         if (EN_DQ_LEN(drq) == 0) {  /* "JK" trash DMA? */
m = NULL;
 2477         } else {
IF_DEQUEUE(&sc->rxslot[slot].indma, m);
 2479           if (!m) {
panic("enintr: drqsync: %s: lost mbuf in slot %d!",
sc->sc_dev.dv_xname, slot);
 2482           }
 2483         }
 2484         /* do something with this mbuf */
 2485         if (sc->rxslot[slot].oth_flags & ENOTHER_DRAIN) {  /* drain? */
 2486           if (m)
m_freem(m);
vci = sc->rxslot[slot].atm_vci;
 2489           if (sc->rxslot[slot].indma.ifq_head == NULL &&
sc->rxslot[slot].q.ifq_head == NULL &&
 2491                 (EN_READ(sc, MID_VC(vci)) & MIDV_INSERVICE) == 0 &&
 2492                 (sc->rxslot[slot].oth_flags & ENOTHER_SWSL) == 0) {
sc->rxslot[slot].oth_flags = ENOTHER_FREE; /* done drain */
sc->rxslot[slot].atm_vci = RX_NONE;
sc->rxvc2slot[vci] = RX_NONE;
 2496 #ifdef EN_DEBUG
printf("%s: rx%d: VCI %d now free\n", sc->sc_dev.dv_xname,
slot, vci);
 2499 #endif
 2500           }
 2501         } else if (m != NULL) {
ATM_PH_FLAGS(&ah) = sc->rxslot[slot].atm_flags;
ATM_PH_VPI(&ah) = 0;
ATM_PH_SETVCI(&ah, sc->rxslot[slot].atm_vci);
 2505 #ifdef EN_DEBUG
printf("%s: rx%d: rxvci%d: atm_input, mbuf %p, len %d, hand %p\n",
sc->sc_dev.dv_xname, slot, sc->rxslot[slot].atm_vci, m,
EN_DQ_LEN(drq), sc->rxslot[slot].rxhand);
 2509 #endif
sc->enif.if_ipackets++;
 2512 #if NBPFILTER > 0
 2513           if (sc->enif.if_bpf)
bpf_mtap(sc->enif.if_bpf, m, BPF_DIRECTION_IN);
 2515 #endif
atm_input(&sc->enif, &ah, m, sc->rxslot[slot].rxhand);
 2518         }
 2520       }
EN_WRAPADD(0, MID_DRQ_N, idx, 1);
 2522     }
sc->drq_chip = MID_DRQ_REG2A(val);  /* sync softc */
 2525     if (sc->need_drqs) {        /* true if we had a DRQ shortage */
need_softserv = 1;
sc->need_drqs = 0;
 2528 #ifdef EN_DEBUG
printf("%s: cleared need DRQ condition\n", sc->sc_dev.dv_xname);
 2530 #endif
 2531     }
 2532   }
 2534   /*
 2535    * handle service interrupts
 2536    */
 2538   if (reg & MID_INT_SERVICE) {
chip = MID_SL_REG2A(EN_READ(sc, MID_SERV_WRITE));
 2541     while (sc->hwslistp != chip) {
 2543       /* fetch and remove it from hardware service list */
vci = EN_READ(sc, sc->hwslistp);
EN_WRAPADD(MID_SLOFF, MID_SLEND, sc->hwslistp, 4);/* advance hw ptr */
slot = sc->rxvc2slot[vci];
 2547       if (slot == RX_NONE) {
 2548 #ifdef EN_DEBUG
printf("%s: unexpected rx interrupt on VCI %d\n", 
sc->sc_dev.dv_xname, vci);
 2551 #endif
EN_WRITE(sc, MID_VC(vci), MIDV_TRASH);  /* rx off, damn it! */
 2553         continue;                               /* next */
 2554       }
EN_WRITE(sc, MID_VC(vci), sc->rxslot[slot].mode); /* remove from hwsl */
EN_COUNT(sc->hwpull);
 2558 #ifdef EN_DEBUG
printf("%s: pulled VCI %d off hwslist\n", sc->sc_dev.dv_xname, vci);
 2560 #endif
 2562       /* add it to the software service list (if needed) */
 2563       if ((sc->rxslot[slot].oth_flags & ENOTHER_SWSL) == 0) {
EN_COUNT(sc->swadd);
need_softserv = 1;
sc->rxslot[slot].oth_flags |= ENOTHER_SWSL;
sc->swslist[sc->swsl_tail] = slot;
EN_WRAPADD(0, MID_SL_N, sc->swsl_tail, 1);
sc->swsl_size++;
 2570 #ifdef EN_DEBUG
printf("%s: added VCI %d to swslist\n", sc->sc_dev.dv_xname, vci);
 2572 #endif
 2573       }
 2574     }
 2575   }
 2577   /*
 2578    * now service (function too big to include here)
 2579    */
 2581   if (need_softserv)
en_service(sc);
 2584   /*
 2585    * keep our stats
 2586    */
 2588   if (reg & MID_INT_DMA_OVR) {
EN_COUNT(sc->dmaovr);
 2590 #ifdef EN_DEBUG
printf("%s: MID_INT_DMA_OVR\n", sc->sc_dev.dv_xname);
 2592 #endif
 2593   }
reg = EN_READ(sc, MID_STAT);
 2595 #ifdef EN_STAT
sc->otrash += MID_OTRASH(reg);
sc->vtrash += MID_VTRASH(reg);
 2598 #endif
EN_INTR_RET(1); /* for us */
 2601 }
 2604 /*
 2605  * en_service: handle a service interrupt
 2606  *
 2607  * Q: why do we need a software service list?
 2608  *
 2609  * A: if we remove a VCI from the hardware list and we find that we are
 2610  *    out of DRQs we must defer processing until some DRQs become free.
 2611  *    so we must remember to look at this RX VCI/slot later, but we can't
 2612  *    put it back on the hardware service list (since that isn't allowed).
 2613  *    so we instead save it on the software service list.   it would be nice 
 2614  *    if we could peek at the VCI on top of the hwservice list without removing
 2615  *    it, however this leads to a race condition: if we peek at it and
 2616  *    decide we are done with it new data could come in before we have a 
 2617  *    chance to remove it from the hwslist.   by the time we get it out of
 2618  *    the list the interrupt for the new data will be lost.   oops!
 2619  *
 2620  */
STATIC void en_service(sc)
 2624 struct en_softc *sc;
 2626 {
 2627   struct mbuf *m, *tmp;
u_int32_t cur, dstart, rbd, pdu, *sav, dma, bcode, count, *data, *datastop;
u_int32_t start, stop, cnt, needalign;
 2630   int slot, raw, aal5, llc, vci, fill, mlen, tlen, drqneed, need, needfill, end;
aal5 = 0;             /* Silence gcc */
next_vci:
 2634   if (sc->swsl_size == 0) {
 2635 #ifdef EN_DEBUG
printf("%s: en_service done\n", sc->sc_dev.dv_xname);
 2637 #endif
 2638     return;             /* >>> exit here if swsl now empty <<< */
 2639   }
 2641   /*
 2642    * get slot/vci to service
 2643    */
slot = sc->swslist[sc->swsl_head];
vci = sc->rxslot[slot].atm_vci;
 2647 #ifdef EN_DIAG
 2648   if (sc->rxvc2slot[vci] != slot) panic("en_service rx slot/vci sync");
 2649 #endif
 2651   /*
 2652    * determine our mode and if we've got any work to do
 2653    */
raw = sc->rxslot[slot].oth_flags & ENOTHER_RAW;
start= sc->rxslot[slot].start;
stop= sc->rxslot[slot].stop;
cur = sc->rxslot[slot].cur;
 2660 #ifdef EN_DEBUG
printf("%s: rx%d: service vci=%d raw=%d start/stop/cur=0x%x 0x%x 0x%x\n",
sc->sc_dev.dv_xname, slot, vci, raw, start, stop, cur);
 2663 #endif
same_vci:
dstart = MIDV_DSTART(EN_READ(sc, MID_DST_RP(vci)));
dstart = (dstart * sizeof(u_int32_t)) + start;
 2669   /* check to see if there is any data at all */
 2670   if (dstart == cur) {
defer:                                  /* defer processing */
EN_WRAPADD(0, MID_SL_N, sc->swsl_head, 1); 
sc->rxslot[slot].oth_flags &= ~ENOTHER_SWSL;
sc->swsl_size--;
 2675                                         /* >>> remove from swslist <<< */
 2676 #ifdef EN_DEBUG
printf("%s: rx%d: remove vci %d from swslist\n", 
sc->sc_dev.dv_xname, slot, vci);
 2679 #endif
 2680     goto next_vci;
 2681   }
 2683   /*
 2684    * figure out how many bytes we need
 2685    * [mlen = # bytes to go in mbufs, fill = # bytes to dump (MIDDMA_JK)]
 2686    */
 2688   if (raw) {
 2690     /* raw mode (aka boodi mode) */
fill = 0;
 2692     if (dstart > cur)
mlen = dstart - cur;
 2694     else
mlen = (dstart + (EN_RXSZ*1024)) - cur;
 2697     if (mlen < sc->rxslot[slot].raw_threshold)
 2698       goto defer;               /* too little data to deal with */
 2700   } else {
 2702     /* normal mode */
aal5 = (sc->rxslot[slot].atm_flags & ATM_PH_AAL5);
llc = (aal5 && (sc->rxslot[slot].atm_flags & ATM_PH_LLCSNAP)) ? 1 : 0;
rbd = EN_READ(sc, cur);
 2706     if (MID_RBD_ID(rbd) != MID_RBD_STDID) 
panic("en_service: id mismatch");
 2709     if (rbd & MID_RBD_T) {
mlen = 0;                 /* we've got trash */
fill = MID_RBD_SIZE;
EN_COUNT(sc->ttrash);
 2713     } else if (!aal5) {
mlen = MID_RBD_SIZE + MID_CHDR_SIZE + MID_ATMDATASZ; /* 1 cell (ick!) */
fill = 0;
 2716     } else {
tlen = (MID_RBD_CNT(rbd) * MID_ATMDATASZ) + MID_RBD_SIZE;
pdu = cur + tlen - MID_PDU_SIZE;
 2719       if (pdu >= stop)
pdu -= (EN_RXSZ*1024);
pdu = EN_READ(sc, pdu);   /* get PDU in correct byte order */
fill = tlen - MID_RBD_SIZE - MID_PDU_LEN(pdu);
 2723       if (fill < 0 || (rbd & MID_RBD_CRCERR) != 0) {
printf("%s: %s, dropping frame\n", sc->sc_dev.dv_xname,
 2725             (rbd & MID_RBD_CRCERR) ? "CRC error" : "invalid AAL5 PDU length");
printf("%s: got %d cells (%d bytes), AAL5 len is %d bytes (pdu=0x%x)\n",
sc->sc_dev.dv_xname, MID_RBD_CNT(rbd), tlen - MID_RBD_SIZE,
MID_PDU_LEN(pdu), pdu);
fill = tlen;
 2730       }
mlen = tlen - fill;
 2732     }
 2734   }
 2736   /*
 2737    * now allocate mbufs for mlen bytes of data, if out of mbufs, trash all
 2738    *
 2739    * notes:
 2740    *  1. it is possible that we've already allocated an mbuf for this pkt
 2741    *     but ran out of DRQs, in which case we saved the allocated mbuf on
 2742    *     "q".
 2743    *  2. if we save an mbuf in "q" we store the "cur" (pointer) in the front 
 2744    *     of the mbuf as an identity (that we can check later), and we also
 2745    *     store drqneed (so we don't have to recompute it).
 2746    *  3. after this block of code, if m is still NULL then we ran out of mbufs
 2747    */
m = sc->rxslot[slot].q.ifq_head;
drqneed = 1;
 2751   if (m) {
sav = mtod(m, u_int32_t *);
 2753     if (sav[0] != cur) {
 2754 #ifdef EN_DEBUG
printf("%s: rx%d: q'ed mbuf %p not ours\n", 
sc->sc_dev.dv_xname, slot, m);
 2757 #endif
m = NULL;                 /* wasn't ours */
EN_COUNT(sc->rxqnotus);
 2760     } else {
EN_COUNT(sc->rxqus);
IF_DEQUEUE(&sc->rxslot[slot].q, m);
drqneed = sav[1];
 2764 #ifdef EN_DEBUG
printf("%s: rx%d: recovered q'ed mbuf %p (drqneed=%d)\n", 
sc->sc_dev.dv_xname, slot, m, drqneed);
 2767 #endif
 2768     }
 2769   }
 2771   if (mlen != 0 && m == NULL) {
m = en_mget(sc, mlen, &drqneed);            /* allocate! */
 2773     if (m == NULL) {
fill += mlen;
mlen = 0;
EN_COUNT(sc->rxmbufout);
 2777 #ifdef EN_DEBUG
printf("%s: rx%d: out of mbufs\n", sc->sc_dev.dv_xname, slot);
 2779 #endif
 2780     }
 2781 #ifdef EN_DEBUG
printf("%s: rx%d: allocate mbuf %p, mlen=%d, drqneed=%d\n", 
sc->sc_dev.dv_xname, slot, m, mlen, drqneed);
 2784 #endif
 2785   }
 2787 #ifdef EN_DEBUG
printf("%s: rx%d: VCI %d, mbuf_chain %p, mlen %d, fill %d\n",
sc->sc_dev.dv_xname, slot, vci, m, mlen, fill);
 2790 #endif
 2792   /*
 2793    * now check to see if we've got the DRQs needed.    if we are out of 
 2794    * DRQs we must quit (saving our mbuf, if we've got one).
 2795    */
needfill = (fill) ? 1 : 0;
 2798   if (drqneed + needfill > sc->drq_free) {
sc->need_drqs = 1;  /* flag condition */
 2800     if (m == NULL) {
EN_COUNT(sc->rxoutboth);
 2802 #ifdef EN_DEBUG
printf("%s: rx%d: out of DRQs *and* mbufs!\n", sc->sc_dev.dv_xname, slot);
 2804 #endif
 2805       return;           /* >>> exit here if out of both mbufs and DRQs <<< */
 2806     }
sav = mtod(m, u_int32_t *);
sav[0] = cur;
sav[1] = drqneed;
IF_ENQUEUE(&sc->rxslot[slot].q, m);
EN_COUNT(sc->rxdrqout);
 2812 #ifdef EN_DEBUG
printf("%s: rx%d: out of DRQs\n", sc->sc_dev.dv_xname, slot);
 2814 #endif
 2815     return;             /* >>> exit here if out of DRQs <<< */
 2816   }
 2818   /*
 2819    * at this point all resources have been allocated and we are commited 
 2820    * to servicing this slot.
 2821    *
 2822    * dma = last location we told chip about
 2823    * cur = current location
 2824    * mlen = space in the mbuf we want
 2825    * need = bytes to xfer in (decrs to zero)
 2826    * fill = how much fill we need
 2827    * tlen = how much data to transfer to this mbuf
 2828    * cnt/bcode/count = <same as xmit>
 2829    *
 2830    * 'needfill' not used after this point
 2831    */
dma = cur;            /* dma = last location we told chip about */
need = roundup(mlen, sizeof(u_int32_t));
fill = fill - (need - mlen);  /* note: may invalidate 'needfill' */
 2837   for (tmp = m ; tmp != NULL && need > 0 ; tmp = tmp->m_next) {
tlen = roundup(tmp->m_len, sizeof(u_int32_t)); /* m_len set by en_mget */
data = mtod(tmp, u_int32_t *);
 2841 #ifdef EN_DEBUG
printf("%s: rx%d: load mbuf %p, m_len=%d, m_data=%p, tlen=%d\n",
sc->sc_dev.dv_xname, slot, tmp, tmp->m_len, tmp->m_data, tlen);
 2844 #endif
 2846     /* copy data */
 2847     if (EN_NORXDMA || !en_dma || tlen < EN_MINDMA) {
datastop = (u_int32_t *)((u_char *) data + tlen);
 2849       /* copy loop: preserve byte order!!!  use READDAT */
 2850       while (data != datastop) {
 2851         *data = EN_READDAT(sc, cur);
data++;
EN_WRAPADD(start, stop, cur, 4);
 2854       }
need -= tlen;
 2856 #ifdef EN_DEBUG
printf("%s: rx%d: vci%d: copied %d bytes (%d left)\n",
sc->sc_dev.dv_xname, slot, vci, tlen, need);
 2859 #endif
 2860       continue;
 2861     }
 2863     /* DMA data (check to see if we need to sync DRQ first) */
 2864     if (dma != cur) {
EN_DRQADD(sc, WORD_IDX(start,cur), vci, MIDDMA_JK, 0, 0, 0, 0);
 2866 #ifdef EN_DEBUG
printf("%s: rx%d: vci%d: drq_sync: advance pointer to %d\n",
sc->sc_dev.dv_xname, slot, vci, cur);
 2869 #endif
 2870     }
 2872 #if !defined(MIDWAY_ENIONLY)
 2874     /*
 2875      * the adaptec DMA engine is smart and handles everything for us.
 2876      */ 
 2878     if (sc->is_adaptec) {
need -= tlen;
EN_WRAPADD(start, stop, cur, tlen);
 2881 #ifdef EN_DEBUG
printf("%s: rx%d: vci%d: adp_dma %d bytes (%d left)\n",
sc->sc_dev.dv_xname, slot, vci, tlen, need);
 2884 #endif
end = (need == 0 && !fill) ? MID_DMA_END : 0;
EN_DRQADD(sc, tlen, vci, 0, vtophys(data), mlen, slot, end);
 2887       if (end)
 2888         goto done;
dma = cur;        /* update dma pointer */
 2890       continue;
 2891     }
 2892 #endif /* !MIDWAY_ENIONLY */
 2895 #if !defined(MIDWAY_ADPONLY)
 2897     /*
 2898      * the ENI DMA engine is not so smart and need more help from us
 2899      */
 2901     /* do we need to do a DMA op to align? */
 2902     if (sc->alburst &&
 2903       (needalign = (((unsigned long) data) & sc->bestburstmask)) != 0) {
cnt = sc->bestburstlen - needalign;
 2905       if (cnt > tlen) {
cnt = tlen;
count = cnt / sizeof(u_int32_t);
bcode = MIDDMA_WORD;
 2909       } else {
count = cnt / sizeof(u_int32_t);
bcode = en_dmaplan[count].bcode;
count = cnt >> en_dmaplan[count].divshift;
 2913       }
need -= cnt;
EN_WRAPADD(start, stop, cur, cnt);
 2916 #ifdef EN_DEBUG
printf("%s: rx%d: vci%d: al_dma %d bytes (%d left)\n",
sc->sc_dev.dv_xname, slot, vci, cnt, need);
 2919 #endif
tlen -= cnt;
end = (need == 0 && !fill) ? MID_DMA_END : 0;
EN_DRQADD(sc, count, vci, bcode, vtophys(data), mlen, slot, end);
 2923       if (end)
 2924         goto done;
data = (u_int32_t *)((u_char *) data + cnt);   
 2926     }
 2928     /* do we need a max-sized burst? */
 2929     if (tlen >= sc->bestburstlen) {
count = tlen >> sc->bestburstshift;
cnt = count << sc->bestburstshift;
bcode = sc->bestburstcode;
need -= cnt;
EN_WRAPADD(start, stop, cur, cnt);
 2935 #ifdef EN_DEBUG
printf("%s: rx%d: vci%d: best_dma %d bytes (%d left)\n",
sc->sc_dev.dv_xname, slot, vci, cnt, need);
 2938 #endif
tlen -= cnt;
end = (need == 0 && !fill) ? MID_DMA_END : 0;
EN_DRQADD(sc, count, vci, bcode, vtophys(data), mlen, slot, end);
 2942       if (end)
 2943         goto done;
data = (u_int32_t *)((u_char *) data + cnt);   
 2945     }
 2947     /* do we need to do a cleanup burst? */
 2948     if (tlen) {
count = tlen / sizeof(u_int32_t);
bcode = en_dmaplan[count].bcode;
count = tlen >> en_dmaplan[count].divshift;
need -= tlen;
EN_WRAPADD(start, stop, cur, tlen);
 2954 #ifdef EN_DEBUG
printf("%s: rx%d: vci%d: cleanup_dma %d bytes (%d left)\n",
sc->sc_dev.dv_xname, slot, vci, tlen, need);
 2957 #endif
end = (need == 0 && !fill) ? MID_DMA_END : 0;
EN_DRQADD(sc, count, vci, bcode, vtophys(data), mlen, slot, end);
 2960       if (end)
 2961         goto done;
 2962     }
dma = cur;          /* update dma pointer */
 2966 #endif /* !MIDWAY_ADPONLY */
 2968   }
 2970   /* skip the end */
 2971   if (fill || dma != cur) {
 2972 #ifdef EN_DEBUG
 2973       if (fill)
printf("%s: rx%d: vci%d: skipping %d bytes of fill\n",
sc->sc_dev.dv_xname, slot, vci, fill);
 2976       else
printf("%s: rx%d: vci%d: syncing chip from 0x%x to 0x%x [cur]\n",
sc->sc_dev.dv_xname, slot, vci, dma, cur);
 2979 #endif
EN_WRAPADD(start, stop, cur, fill);
EN_DRQADD(sc, WORD_IDX(start,cur), vci, MIDDMA_JK, 0, mlen,
slot, MID_DMA_END);
 2983     /* dma = cur; */    /* not necessary since we are done */
 2984   }
 2986   /*
 2987    * done, remove stuff we don't want to pass up:
 2988    *   raw mode (boodi mode): pass everything up for later processing
 2989    *   aal5: remove RBD
 2990    *   aal0: remove RBD + cell header
 2991    */
done:
 2994   if (m) {
 2995     if (!raw) {
cnt = MID_RBD_SIZE;
 2997       if (!aal5) cnt += MID_CHDR_SIZE;
m->m_len -= cnt;                          /* chop! */
m->m_pkthdr.len -= cnt;
m->m_data += cnt;
 3001     }
IF_ENQUEUE(&sc->rxslot[slot].indma, m);
 3003   }
sc->rxslot[slot].cur = cur;           /* update master copy of 'cur' */
 3006 #ifdef EN_DEBUG
printf("%s: rx%d: vci%d: DONE!   cur now =0x%x\n", 
sc->sc_dev.dv_xname, slot, vci, cur);
 3009 #endif
 3011   goto same_vci;        /* get next packet in this slot */
 3012 }
 3015 #ifdef EN_DDBHOOK
 3016 /*
 3017  * functions we can call from ddb
 3018  */
 3020 /*
 3021  * en_dump: dump the state
 3022  */
 3024 #define END_SWSL        0x00000040              /* swsl state */
 3025 #define END_DRQ         0x00000020              /* drq state */
 3026 #define END_DTQ         0x00000010              /* dtq state */
 3027 #define END_RX          0x00000008              /* rx state */
 3028 #define END_TX          0x00000004              /* tx state */
 3029 #define END_MREGS       0x00000002              /* registers */
 3030 #define END_STATS       0x00000001              /* dump stats */
 3032 #define END_BITS "\20\7SWSL\6DRQ\5DTQ\4RX\3TX\2MREGS\1STATS"
 3034 int en_dump(unit, level)
 3036 int unit, level;
 3038 {
 3039   struct en_softc *sc;
 3040   int lcv, cnt, slot;
u_int32_t ptr, reg;
 3043   for (lcv = 0 ; lcv < en_cd.cd_ndevs ; lcv++) {
sc = (struct en_softc *) en_cd.cd_devs[lcv];
 3045     if (sc == NULL) continue;
 3046     if (unit != -1 && unit != lcv)
 3047       continue;
printf("dumping device %s at level 0x%b\n", sc->sc_dev.dv_xname, level,
END_BITS);
 3052     if (sc->dtq_us == 0) {
printf("<hasn't been en_init'd yet>\n");
 3054       continue;
 3055     }
 3057     if (level & END_STATS) {
printf("  en_stats:\n");
printf("    %d mfix (%d failed); %d/%d head/tail byte DMAs, %d flushes\n",
sc->mfix, sc->mfixfail, sc->headbyte, sc->tailbyte, sc->tailflush);
printf("    %d rx dma overflow interrupts\n", sc->dmaovr);
printf("    %d times we ran out of TX space and stalled\n", 
sc->txoutspace);
printf("    %d times we ran out of DTQs\n", sc->txdtqout);
printf("    %d times we launched a packet\n", sc->launch);
printf("    %d times we launched without on-board header\n", sc->lheader);
printf("    %d times we launched without on-board tail\n", sc->ltail);
printf("    %d times we pulled the hw service list\n", sc->hwpull);
printf("    %d times we pushed a vci on the sw service list\n", 
sc->swadd);
printf("    %d times RX pulled an mbuf from Q that wasn't ours\n", 
sc->rxqnotus);
printf("    %d times RX pulled a good mbuf from Q\n", sc->rxqus);
printf("    %d times we ran out of mbufs *and* DRQs\n", sc->rxoutboth);
printf("    %d times we ran out of DRQs\n", sc->rxdrqout);
printf("    %d transmit packets dropped due to mbsize\n", sc->txmbovr);
printf("    %d cells trashed due to turned off rxvc\n", sc->vtrash);
printf("    %d cells trashed due to totally full buffer\n", sc->otrash);
printf("    %d cells trashed due almost full buffer\n", sc->ttrash);
printf("    %d rx mbuf allocation failures\n", sc->rxmbufout);
 3082 #ifdef NATM
printf("    %d drops at natmintrq\n", natmintrq.ifq_drops);
 3084 #ifdef NATM_STAT
printf("    natmintr so_rcv: ok/drop cnt: %d/%d, ok/drop bytes: %d/%d\n",
natm_sookcnt, natm_sodropcnt, natm_sookbytes, natm_sodropbytes);
 3087 #endif
 3088 #endif
 3089     }
 3091     if (level & END_MREGS) {
printf("mregs:\n");
printf("resid = 0x%x\n", EN_READ(sc, MID_RESID));
printf("interrupt status = 0x%b\n", 
EN_READ(sc, MID_INTSTAT), MID_INTBITS);
printf("interrupt enable = 0x%b\n", 
EN_READ(sc, MID_INTENA), MID_INTBITS);
printf("mcsr = 0x%b\n", EN_READ(sc, MID_MAST_CSR), MID_MCSRBITS);
printf("serv_write = [chip=%d] [us=%d]\n", EN_READ(sc, MID_SERV_WRITE),
MID_SL_A2REG(sc->hwslistp));
printf("dma addr = 0x%x\n", EN_READ(sc, MID_DMA_ADDR));
printf("DRQ: chip[rd=0x%x,wr=0x%x], sc[chip=0x%x,us=0x%x]\n",
MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX)), 
MID_DRQ_REG2A(EN_READ(sc, MID_DMA_WRRX)), sc->drq_chip, sc->drq_us);
printf("DTQ: chip[rd=0x%x,wr=0x%x], sc[chip=0x%x,us=0x%x]\n",
MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX)), 
MID_DTQ_REG2A(EN_READ(sc, MID_DMA_WRTX)), sc->dtq_chip, sc->dtq_us);
printf("  unusal txspeeds: ");
 3110       for (cnt = 0 ; cnt < MID_N_VC ; cnt++)
 3111         if (sc->txspeed[cnt])
printf(" vci%d=0x%x", cnt, sc->txspeed[cnt]);
printf("\n");
printf("  rxvc slot mappings: ");
 3116       for (cnt = 0 ; cnt < MID_N_VC ; cnt++)
 3117         if (sc->rxvc2slot[cnt] != RX_NONE)
printf("  %d->%d", cnt, sc->rxvc2slot[cnt]);
printf("\n");
 3121     }
 3123     if (level & END_TX) {
printf("tx:\n");
 3125       for (slot = 0 ; slot < EN_NTX; slot++) {
printf("tx%d: start/stop/cur=0x%x/0x%x/0x%x [%d]  ", slot,
sc->txslot[slot].start, sc->txslot[slot].stop, sc->txslot[slot].cur,
 3128                 (sc->txslot[slot].cur - sc->txslot[slot].start)/4);
printf("mbsize=%d, bfree=%d\n", sc->txslot[slot].mbsize,
sc->txslot[slot].bfree);
printf("txhw: base_address=0x%x, size=%d, read=%d, descstart=%d\n",
MIDX_BASE(EN_READ(sc, MIDX_PLACE(slot))), 
MIDX_SZ(EN_READ(sc, MIDX_PLACE(slot))),
EN_READ(sc, MIDX_READPTR(slot)), EN_READ(sc, MIDX_DESCSTART(slot)));
 3135       }
 3136     }
 3138     if (level & END_RX) {
printf("  recv slots:\n");
 3140       for (slot = 0 ; slot < sc->en_nrx; slot++) {
printf("rx%d: vci=%d: start/stop/cur=0x%x/0x%x/0x%x ", slot,
sc->rxslot[slot].atm_vci, sc->rxslot[slot].start, 
sc->rxslot[slot].stop, sc->rxslot[slot].cur);
printf("mode=0x%x, atm_flags=0x%x, oth_flags=0x%x\n", 
sc->rxslot[slot].mode, sc->rxslot[slot].atm_flags, 
sc->rxslot[slot].oth_flags);
printf("RXHW: mode=0x%x, DST_RP=0x%x, WP_ST_CNT=0x%x\n",
EN_READ(sc, MID_VC(sc->rxslot[slot].atm_vci)),
EN_READ(sc, MID_DST_RP(sc->rxslot[slot].atm_vci)),
EN_READ(sc, MID_WP_ST_CNT(sc->rxslot[slot].atm_vci)));
 3151       }
 3152     }
 3154     if (level & END_DTQ) {
printf("  dtq [need_dtqs=%d,dtq_free=%d]:\n", 
sc->need_dtqs, sc->dtq_free);
ptr = sc->dtq_chip;
 3158       while (ptr != sc->dtq_us) {
reg = EN_READ(sc, ptr);
printf("\t0x%x=[cnt=%d, chan=%d, end=%d, type=%d @ 0x%x]\n", 
sc->dtq[MID_DTQ_A2REG(ptr)], MID_DMA_CNT(reg), MID_DMA_TXCHAN(reg),
 3162             (reg & MID_DMA_END) != 0, MID_DMA_TYPE(reg), EN_READ(sc, ptr+4));
EN_WRAPADD(MID_DTQOFF, MID_DTQEND, ptr, 8);
 3164       }
 3165     }
 3167     if (level & END_DRQ) {
printf("  drq [need_drqs=%d,drq_free=%d]:\n", 
sc->need_drqs, sc->drq_free);
ptr = sc->drq_chip;
 3171       while (ptr != sc->drq_us) {
reg = EN_READ(sc, ptr);
printf("\t0x%x=[cnt=%d, chan=%d, end=%d, type=%d @ 0x%x]\n", 
sc->drq[MID_DRQ_A2REG(ptr)], MID_DMA_CNT(reg), MID_DMA_RXVCI(reg),
 3175           (reg & MID_DMA_END) != 0, MID_DMA_TYPE(reg), EN_READ(sc, ptr+4));
EN_WRAPADD(MID_DRQOFF, MID_DRQEND, ptr, 8);
 3177       }
 3178     }
 3180     if (level & END_SWSL) {
printf(" swslist [size=%d]: ", sc->swsl_size);
 3182       for (cnt = sc->swsl_head ; cnt != sc->swsl_tail ; 
cnt = (cnt + 1) % MID_SL_N)
printf("0x%x ", sc->swslist[cnt]);
printf("\n");
 3186     }
 3188   }
 3189   return(0);
 3190 }
 3192 /*
 3193  * en_dumpmem: dump the memory
 3194  */
 3196 int en_dumpmem(unit, addr, len)
 3198 int unit, addr, len;
 3200 {
 3201   struct en_softc *sc;
u_int32_t reg;
 3204   if (unit < 0 || unit >= en_cd.cd_ndevs ||
 3205         (sc = (struct en_softc *) en_cd.cd_devs[unit]) == NULL) {
printf("invalid unit number: %d\n", unit);
 3207     return(0);
 3208   }
addr = addr & ~3;
 3210   if (addr < MID_RAMOFF || addr + len*4 > MID_MAXOFF || len <= 0) {
printf("invalid addr/len number: %d, %d\n", addr, len);
 3212     return(0);
 3213   }
printf("dumping %d words starting at offset 0x%x\n", len, addr);
 3215   while (len--) {
reg = EN_READ(sc, addr);
printf("mem[0x%x] = 0x%x\n", addr, reg);
addr += 4;
 3219   }
 3220   return(0);
 3221 }
 3222 #endif
 3225 #endif /* NEN > 0 || !defined(__FreeBSD__) */