EN_WRITE 347 dev/ic/midway.c EN_WRITE((SC), (SC)->dtq_us, \ EN_WRITE 351 dev/ic/midway.c EN_WRITE((SC), (SC)->drq_us, \ EN_WRITE 357 dev/ic/midway.c EN_WRITE((SC), (SC)->dtq_us, \ EN_WRITE 361 dev/ic/midway.c EN_WRITE((SC), (SC)->drq_us, \ EN_WRITE 368 dev/ic/midway.c EN_WRITE((SC), (SC)->dtq_us, \ EN_WRITE 371 dev/ic/midway.c EN_WRITE((SC), (SC)->dtq_us, \ EN_WRITE 377 dev/ic/midway.c EN_WRITE((SC), (SC)->drq_us, \ EN_WRITE 380 dev/ic/midway.c EN_WRITE((SC), (SC)->drq_us, \ EN_WRITE 392 dev/ic/midway.c EN_WRITE((SC), (SC)->dtq_us, (ADDR)); \ EN_WRITE 396 dev/ic/midway.c EN_WRITE((SC), MID_DMA_WRTX, MID_DTQ_A2REG((SC)->dtq_us)); \ EN_WRITE 405 dev/ic/midway.c EN_WRITE((SC), (SC)->drq_us, (ADDR)); \ EN_WRITE 409 dev/ic/midway.c EN_WRITE((SC), MID_DMA_WRRX, MID_DRQ_A2REG((SC)->drq_us)); \ EN_WRITE 681 dev/ic/midway.c EN_WRITE(sc, MID_RESID, 0x0); /* reset card before touching RAM */ EN_WRITE 683 dev/ic/midway.c EN_WRITE(sc, lcv, lcv); /* data[address] = address */ EN_WRITE 707 dev/ic/midway.c EN_WRITE(sc, MID_RESID, 0x0); /* reset */ EN_WRITE 709 dev/ic/midway.c EN_WRITE(sc, lcv, 0); /* zero memory */ EN_WRITE 955 dev/ic/midway.c EN_WRITE(sc, MID_RESID, 0x0); /* reset card before touching RAM */ EN_WRITE 958 dev/ic/midway.c EN_WRITE(sc, MIDX_PLACE(0), MIDX_MKPLACE(en_k2sz(1), midvloc)); EN_WRITE 959 dev/ic/midway.c EN_WRITE(sc, MID_VC(0), (midvloc << MIDV_LOCSHIFT) EN_WRITE 961 dev/ic/midway.c EN_WRITE(sc, MID_DST_RP(0), 0); EN_WRITE 962 dev/ic/midway.c EN_WRITE(sc, MID_WP_ST_CNT(0), 0); EN_WRITE 966 dev/ic/midway.c EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA); /* enable DMA (only) */ EN_WRITE 988 dev/ic/midway.c EN_WRITE(sc, MID_BUFOFF+cnt, 0); /* zero memory */ EN_WRITE 1001 dev/ic/midway.c EN_WRITE(sc, sc->dtq_chip, MID_MK_TXQ_ADP(lcv, 0, MID_DMA_END, 0)); EN_WRITE 1003 dev/ic/midway.c EN_WRITE(sc, sc->dtq_chip, MID_MK_TXQ_ENI(count, 0, MID_DMA_END, bcode)); EN_WRITE 1004 dev/ic/midway.c EN_WRITE(sc, sc->dtq_chip+4, vtophys(sp)); EN_WRITE 1005 dev/ic/midway.c EN_WRITE(sc, MID_DMA_WRTX, MID_DTQ_A2REG(sc->dtq_chip+8)); EN_WRITE 1022 dev/ic/midway.c EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA); /* re-enable DMA (only) */ EN_WRITE 1027 dev/ic/midway.c EN_WRITE(sc, sc->drq_chip, MID_MK_RXQ_ADP(lcv, 0, MID_DMA_END, 0)); EN_WRITE 1029 dev/ic/midway.c EN_WRITE(sc, sc->drq_chip, MID_MK_RXQ_ENI(count, 0, MID_DMA_END, bcode)); EN_WRITE 1030 dev/ic/midway.c EN_WRITE(sc, sc->drq_chip+4, vtophys(dp)); EN_WRITE 1031 dev/ic/midway.c EN_WRITE(sc, MID_DMA_WRRX, MID_DRQ_A2REG(sc->drq_chip+8)); EN_WRITE 1048 dev/ic/midway.c EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA); /* re-enable DMA (only) */ EN_WRITE 1244 dev/ic/midway.c EN_WRITE(sc, MID_VC(vci), (newmode | (oldmode & MIDV_INSERVICE))); EN_WRITE 1293 dev/ic/midway.c EN_WRITE(sc, MID_RESID, 0x0); /* reset hardware */ EN_WRITE 1378 dev/ic/midway.c EN_WRITE(sc, MID_RESID, 0x0); /* reset */ EN_WRITE 1400 dev/ic/midway.c EN_WRITE(sc, MID_DMA_WRRX, MID_DRQ_A2REG(sc->drq_chip)); EN_WRITE 1407 dev/ic/midway.c EN_WRITE(sc, MID_DMA_WRTX, MID_DRQ_A2REG(sc->dtq_chip)); EN_WRITE 1422 dev/ic/midway.c EN_WRITE(sc, MIDX_READPTR(slot), 0); EN_WRITE 1423 dev/ic/midway.c EN_WRITE(sc, MIDX_DESCSTART(slot), 0); EN_WRITE 1428 dev/ic/midway.c EN_WRITE(sc, MIDX_PLACE(slot), MIDX_MKPLACE(en_k2sz(EN_TXSZ), loc)); EN_WRITE 1439 dev/ic/midway.c EN_WRITE(sc, MID_INTENA, MID_INT_TX|MID_INT_DMA_OVR|MID_INT_IDENT| EN_WRITE 1442 dev/ic/midway.c EN_WRITE(sc, MID_MAST_CSR, MID_SETIPL(sc->ipl)|MID_MCSR_ENDMA| EN_WRITE 1462 dev/ic/midway.c EN_WRITE(sc, MID_VC(vc), reg); EN_WRITE 1469 dev/ic/midway.c EN_WRITE(sc, MID_DST_RP(vc), 0); /* read pointer = 0, desc. start = 0 */ EN_WRITE 1470 dev/ic/midway.c EN_WRITE(sc, MID_WP_ST_CNT(vc), 0); /* write pointer = 0 */ EN_WRITE 1471 dev/ic/midway.c EN_WRITE(sc, MID_VC(vc), sc->rxslot[slot].mode); /* set mode, size, loc */ EN_WRITE 2042 dev/ic/midway.c EN_WRITE(sc, cur, l->tbd1); EN_WRITE 2044 dev/ic/midway.c EN_WRITE(sc, cur, l->tbd2); EN_WRITE 2309 dev/ic/midway.c EN_WRITE(sc, cur, l->pdu1); /* in host byte order */ EN_WRITE 2552 dev/ic/midway.c EN_WRITE(sc, MID_VC(vci), MIDV_TRASH); /* rx off, damn it! */ EN_WRITE 2555 dev/ic/midway.c EN_WRITE(sc, MID_VC(vci), sc->rxslot[slot].mode); /* remove from hwsl */