tmp 823 altq/altq_cdnr.c u_int64_t interval, now, tmp;
tmp 841 altq/altq_cdnr.c tmp = ((u_int64_t)tsw->avg_rate * tsw->timewin
tmp 843 altq/altq_cdnr.c tsw->avg_rate = avg_rate = (u_int32_t)tmp;
tmp 271 arch/i386/i386/lapic.c u_int64_t dtick, dapic, tmp;
tmp 313 arch/i386/i386/lapic.c tmp = (TIMER_FREQ * dapic) / dtick;
tmp 315 arch/i386/i386/lapic.c lapic_per_second = tmp;
tmp 318 arch/i386/i386/lapic.c humanize_number(tbuf, sizeof(tbuf), tmp, "Hz", 1000);
tmp 340 arch/i386/i386/lapic.c for (i = 0; tmp >= max && i < sizeof(prefixes); i++)
tmp 341 arch/i386/i386/lapic.c tmp /= 1000;
tmp 344 arch/i386/i386/lapic.c (unsigned long long)tmp, i == 0 ? "" : " ", prefixes[i],
tmp 372 arch/i386/i386/lapic.c tmp = (1000000 * (u_int64_t)1 << 32) / lapic_per_second;
tmp 373 arch/i386/i386/lapic.c lapic_frac_usec_per_cycle = tmp;
tmp 375 arch/i386/i386/lapic.c tmp = (lapic_per_second * (u_int64_t)1 << 32) / 1000000;
tmp 377 arch/i386/i386/lapic.c lapic_frac_cycle_per_usec = tmp;
tmp 447 arch/i386/i386/lapic.c u_int64_t tmp;
tmp 451 arch/i386/i386/lapic.c tmp = rdtsc() - ci->ci_tscbase;
tmp 454 arch/i386/i386/lapic.c now.tv_usec += (tmp * scaled_pentium_mhz) >> 32;
tmp 556 arch/i386/i386/linux_machdep.c char tmp = KB_101;
tmp 559 arch/i386/i386/linux_machdep.c return copyout(&tmp, SCARG(uap, data), sizeof(char));
tmp 97 arch/i386/i386/nvram.c u_char *tmp;
tmp 111 arch/i386/i386/nvram.c for (tmp = buf; count-- > 0 && pos < NVRAM_SIZE; ++pos, ++tmp)
tmp 112 arch/i386/i386/nvram.c *tmp = nvram_get_byte(pos);
tmp 115 arch/i386/i386/nvram.c printf("nvramread read %d bytes (%s)\n", (tmp - buf), tmp);
tmp 118 arch/i386/i386/nvram.c ret = uiomove((caddr_t)buf, (tmp - buf), uio);
tmp 374 arch/i386/isa/isa_machdep.c int tmp;
tmp 417 arch/i386/isa/isa_machdep.c for (p = &intrhand[i], tmp = 0; (q = *p) != NULL;
tmp 418 arch/i386/isa/isa_machdep.c p = &q->ih_next, tmp++)
tmp 420 arch/i386/isa/isa_machdep.c if ((bestirq == -1) || (count > tmp)) {
tmp 422 arch/i386/isa/isa_machdep.c count = tmp;
tmp 77 arch/i386/stand/libsa/smpprobe.c mp_float_t *tmp = (mp_float_t*)(ptr + i);
tmp 79 arch/i386/stand/libsa/smpprobe.c if (tmp->signature == MP_FLOAT_SIG) {
tmp 82 arch/i386/stand/libsa/smpprobe.c mpp = tmp;
tmp 85 arch/i386/stand/libsa/smpprobe.c if ((tmp->signature == MP_FLOAT_SIG) &&
tmp 86 arch/i386/stand/libsa/smpprobe.c mp_checksum((u_int8_t *)tmp, tmp->length*16)) {
tmp 92 arch/i386/stand/libsa/smpprobe.c mpp = tmp;
tmp 869 compat/hpux/hpux_compat.c int tmp;
tmp 879 compat/hpux/hpux_compat.c tmp = *ofp & HPUX_UF_FIONBIO_ON;
tmp 881 compat/hpux/hpux_compat.c (caddr_t)&tmp, p);
tmp 169 compat/hpux/m68k/hpux_net.c int tmp;
tmp 174 compat/hpux/m68k/hpux_net.c tmp = (int) *mtod(m, char *);
tmp 177 compat/hpux/m68k/hpux_net.c tmp = (int) *mtod(m, short *);
tmp 181 compat/hpux/m68k/hpux_net.c tmp = (((int) *mtod(m, int *)) >> 8) & 0xffffff;
tmp 184 compat/hpux/m68k/hpux_net.c *mtod(m, int *) = tmp;
tmp 201 compat/hpux/m68k/hpux_net.c int tmp, error;
tmp 217 compat/hpux/m68k/hpux_net.c tmp = *mtod(m, int *);
tmp 219 compat/hpux/m68k/hpux_net.c mtod(m, struct linger *)->l_linger = tmp;
tmp 829 compat/sunos/sunos_ioctl.c int tmp = 0;
tmp 832 compat/sunos/sunos_ioctl.c tmp = FREAD;
tmp 835 compat/sunos/sunos_ioctl.c tmp = FWRITE;
tmp 838 compat/sunos/sunos_ioctl.c tmp = FREAD|FWRITE;
tmp 841 compat/sunos/sunos_ioctl.c error = (*ctl)(fp, TIOCFLUSH, (caddr_t)&tmp, p);
tmp 121 compat/vax1k/vax1k_exec.c long etmp, tmp;
tmp 135 compat/vax1k/vax1k_exec.c tmp = round_page(epp->ep_daddr);
tmp 136 compat/vax1k/vax1k_exec.c etmp = execp->a_bss - (tmp - epp->ep_daddr);
tmp 140 compat/vax1k/vax1k_exec.c NEW_VMCMD(&epp->ep_vmcmds, vmcmd_map_zero, etmp, tmp, NULLVP, 0,
tmp 100 crypto/sha2.c u_int32_t tmp = (w); \
tmp 101 crypto/sha2.c tmp = (tmp >> 16) | (tmp << 16); \
tmp 102 crypto/sha2.c (x) = ((tmp & 0xff00ff00UL) >> 8) | ((tmp & 0x00ff00ffUL) << 8); \
tmp 105 crypto/sha2.c u_int64_t tmp = (w); \
tmp 106 crypto/sha2.c tmp = (tmp >> 32) | (tmp << 32); \
tmp 107 crypto/sha2.c tmp = ((tmp & 0xff00ff00ff00ff00ULL) >> 8) | \
tmp 108 crypto/sha2.c ((tmp & 0x00ff00ff00ff00ffULL) << 8); \
tmp 109 crypto/sha2.c (x) = ((tmp & 0xffff0000ffff0000ULL) >> 16) | \
tmp 110 crypto/sha2.c ((tmp & 0x0000ffff0000ffffULL) << 16); \
tmp 223 ddb/db_sym.c static char tmp[256];
tmp 227 ddb/db_sym.c s = tmp;
tmp 233 ddb/db_sym.c return tmp;
tmp 886 dev/acpi/dsdt.c struct aml_vallist *tmp;
tmp 889 dev/acpi/dsdt.c tmp = (struct aml_vallist *)acpi_os_malloc(sizeof(struct aml_vallist) +
tmp 892 dev/acpi/dsdt.c tmp->obj = (struct aml_value *)&tmp[1];
tmp 893 dev/acpi/dsdt.c tmp->nobj = narg;
tmp 896 dev/acpi/dsdt.c tmp->next = scope->tmpvals;
tmp 897 dev/acpi/dsdt.c scope->tmpvals = tmp;
tmp 900 dev/acpi/dsdt.c return tmp->obj;
tmp 1347 dev/acpi/dsdt.c struct aml_value *tmp;
tmp 1383 dev/acpi/dsdt.c tmp = aml_alloctmp(scope, 1);
tmp 1387 dev/acpi/dsdt.c _aml_setvalue(tmp,
tmp 1391 dev/acpi/dsdt.c _aml_setvalue(tmp,
tmp 1394 dev/acpi/dsdt.c tmp->v_field.type =
tmp 1396 dev/acpi/dsdt.c tmp->v_field.bitpos = index * 8;
tmp 1397 dev/acpi/dsdt.c tmp->v_field.bitlen = 8;
tmp 1398 dev/acpi/dsdt.c tmp->v_field.ref1 = ref;
tmp 1401 dev/acpi/dsdt.c return tmp;
tmp 1412 dev/acpi/dsdt.c tmp = aml_alloctmp(scope, argc+1);
tmp 1414 dev/acpi/dsdt.c aml_parseop(scope, &tmp[index]);
tmp 1415 dev/acpi/dsdt.c aml_addref(&tmp[index]);
tmp 1417 dev/acpi/dsdt.c ref = aml_evalmethod(scope, ref->node, argc, tmp, &tmp[argc]);
tmp 1424 dev/acpi/dsdt.c tmp = aml_alloctmp(scope, 1);
tmp 1425 dev/acpi/dsdt.c aml_fieldio(scope, ref, tmp, ACPI_IOREAD);
tmp 1426 dev/acpi/dsdt.c return tmp;
tmp 3345 dev/acpi/dsdt.c struct aml_value *tmp;
tmp 3350 dev/acpi/dsdt.c tmp = aml_allocvalue(def->type, def->ival, def->bval);
tmp 3351 dev/acpi/dsdt.c aml_createname(&aml_root, def->name, tmp);
tmp 3354 dev/acpi/dsdt.c *def->gval = tmp;
tmp 189 dev/i2c/adm1024.c int tmp = data * mul;
tmp 191 dev/i2c/adm1024.c if (tmp == 0)
tmp 194 dev/i2c/adm1024.c sens->value = 1350000 / tmp;
tmp 231 dev/i2c/adm1026.c int tmp = data * mul;
tmp 233 dev/i2c/adm1026.c if (tmp == 0)
tmp 236 dev/i2c/adm1026.c sens->value = 1350000 / tmp;
tmp 276 dev/i2c/asb100.c int tmp = data * mul;
tmp 278 dev/i2c/asb100.c if (tmp == 0)
tmp 281 dev/i2c/asb100.c sens->value = 1350000 / tmp;
tmp 175 dev/i2c/gl518sm.c u_int tmp;
tmp 205 dev/i2c/gl518sm.c tmp = data2[0] * sc->sc_fan1_div * 2;
tmp 206 dev/i2c/gl518sm.c if (tmp == 0)
tmp 209 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_FAN1].value = 960000 / tmp;
tmp 212 dev/i2c/gl518sm.c tmp = data2[1] * sc->sc_fan2_div * 2;
tmp 213 dev/i2c/gl518sm.c if (tmp == 0)
tmp 216 dev/i2c/gl518sm.c sc->sc_sensor[GLENV_FAN2].value = 960000 / tmp;
tmp 243 dev/i2c/lm87.c u_int tmp;
tmp 293 dev/i2c/lm87.c tmp = data * sc->sc_fan1_div;
tmp 294 dev/i2c/lm87.c if (tmp == 0)
tmp 297 dev/i2c/lm87.c sc->sc_sensor[sensor].value = 1350000 / tmp;
tmp 305 dev/i2c/lm87.c tmp = data * sc->sc_fan2_div;
tmp 306 dev/i2c/lm87.c if (tmp == 0)
tmp 309 dev/i2c/lm87.c sc->sc_sensor[sensor].value = 1350000 / tmp;
tmp 1162 dev/ic/am7990.c register u_int16_t tmp;
tmp 1173 dev/ic/am7990.c tmp = *bptr;
tmp 1174 dev/ic/am7990.c *to++ = tmp & 0xff;
tmp 1175 dev/ic/am7990.c *to++ = (tmp >> 8) & 0xff;
tmp 237 dev/ic/bt463.c struct bt463data tmp, *data = &tmp;
tmp 181 dev/ic/bt485.c struct bt485data tmp, *data = &tmp;
tmp 1655 dev/ic/dc.c int mac_offset, tmp, i;
tmp 1788 dev/ic/dc.c tmp = sc->dc_pmode;
tmp 1816 dev/ic/dc.c sc->dc_pmode = tmp;
tmp 3119 dev/ic/if_wi.c int8_t tmp;
tmp 3153 dev/ic/if_wi.c tmp = sc->wi_txpower;
tmp 3154 dev/ic/if_wi.c tmp = -12 - tmp;
tmp 3155 dev/ic/if_wi.c tmp <<= 2;
tmp 3157 dev/ic/if_wi.c power = (u_int16_t)tmp;
tmp 3178 dev/ic/if_wi.c int8_t tmp;
tmp 3196 dev/ic/if_wi.c tmp = power;
tmp 3197 dev/ic/if_wi.c tmp >>= 2;
tmp 3198 dev/ic/if_wi.c txpower->i_val = (u_int16_t)(-12 - tmp);
tmp 520 dev/ic/isp.c u_int16_t tmp = isp->isp_mdvec->dv_conf1;
tmp 525 dev/ic/isp.c tmp &= BIU_BURST_ENABLE;
tmp 527 dev/ic/isp.c ISP_SETBITS(isp, BIU_CONF1, tmp);
tmp 528 dev/ic/isp.c if (tmp & BIU_BURST_ENABLE) {
tmp 277 dev/ic/ispmbox.h u_int8_t tmp; \
tmp 278 dev/ic/ispmbox.h tmp = a; \
tmp 280 dev/ic/ispmbox.h b = tmp; \
tmp 1762 dev/ic/midway.c struct mbuf *tmp;
tmp 1824 dev/ic/midway.c for (tmp = launch.t ; tmp != NULL ; tmp = tmp->m_next) {
tmp 1825 dev/ic/midway.c len = tmp->m_len;
tmp 1827 dev/ic/midway.c cp = mtod(tmp, u_int8_t *);
tmp 1828 dev/ic/midway.c if (tmp == launch.t) {
tmp 1902 dev/ic/midway.c IF_DEQUEUE(&sc->txslot[chan].q, tmp);
tmp 1904 dev/ic/midway.c if (launch.t != tmp)
tmp 1967 dev/ic/midway.c IF_DEQUEUE(&sc->txslot[chan].q, tmp);
tmp 1968 dev/ic/midway.c if (launch.t != tmp)
tmp 1987 dev/ic/midway.c struct mbuf *tmp;
tmp 2053 dev/ic/midway.c for (tmp = l->t ; tmp != NULL ; tmp = tmp->m_next) {
tmp 2056 dev/ic/midway.c data = mtod(tmp, u_int32_t *);
tmp 2057 dev/ic/midway.c len = tmp->m_len;
tmp 2058 dev/ic/midway.c if (tmp == l->t) {
tmp 2106 dev/ic/midway.c if (tmp->m_next == NULL) {
tmp 2108 dev/ic/midway.c if (cnt && M_TRAILINGSPACE(tmp) >= cnt)
tmp 2627 dev/ic/midway.c struct mbuf *m, *tmp;
tmp 2837 dev/ic/midway.c for (tmp = m ; tmp != NULL && need > 0 ; tmp = tmp->m_next) {
tmp 2838 dev/ic/midway.c tlen = roundup(tmp->m_len, sizeof(u_int32_t)); /* m_len set by en_mget */
tmp 2839 dev/ic/midway.c data = mtod(tmp, u_int32_t *);
tmp 2843 dev/ic/midway.c sc->sc_dev.dv_xname, slot, tmp, tmp->m_len, tmp->m_data, tlen);
tmp 306 dev/ic/ne2000.c u_int8_t test_buffer[32], tmp;
tmp 318 dev/ic/ne2000.c tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET);
tmp 330 dev/ic/ne2000.c bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp);
tmp 367 dev/ic/ne2000.c tmp = bus_space_read_1(nict, nich, ED_P0_CR);
tmp 368 dev/ic/ne2000.c if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
tmp 372 dev/ic/ne2000.c tmp = bus_space_read_1(nict, nich, ED_P0_ISR);
tmp 373 dev/ic/ne2000.c if ((tmp & ED_ISR_RST) != ED_ISR_RST)
tmp 825 dev/ic/rt2560.c uint32_t tmp;
tmp 861 dev/ic/rt2560.c tmp = RAL_READ(sc, RT2560_CSR21);
tmp 862 dev/ic/rt2560.c val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n;
tmp 2085 dev/ic/rt2560.c uint32_t tmp;
tmp 2098 dev/ic/rt2560.c tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val;
tmp 2099 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_BBPCSR, tmp);
tmp 2127 dev/ic/rt2560.c uint32_t tmp;
tmp 2140 dev/ic/rt2560.c tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 |
tmp 2142 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RFCSR, tmp);
tmp 2154 dev/ic/rt2560.c uint8_t power, tmp;
tmp 2226 dev/ic/rt2560.c tmp = rt2560_bbp_read(sc, 70);
tmp 2228 dev/ic/rt2560.c tmp &= ~RT2560_JAPAN_FILTER;
tmp 2230 dev/ic/rt2560.c tmp |= RT2560_JAPAN_FILTER;
tmp 2232 dev/ic/rt2560.c rt2560_bbp_write(sc, 70, tmp);
tmp 2248 dev/ic/rt2560.c uint32_t tmp;
tmp 2251 dev/ic/rt2560.c tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE;
tmp 2252 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF1, tmp);
tmp 2255 dev/ic/rt2560.c tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE;
tmp 2256 dev/ic/rt2560.c rt2560_rf_write(sc, RT2560_RF3, tmp);
tmp 2270 dev/ic/rt2560.c uint32_t tmp;
tmp 2275 dev/ic/rt2560.c tmp = 16 * ic->ic_bss->ni_intval;
tmp 2276 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR12, tmp);
tmp 2282 dev/ic/rt2560.c tmp = logcwmin << 16 | preload;
tmp 2283 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_BCNOCSR, tmp);
tmp 2286 dev/ic/rt2560.c tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN;
tmp 2288 dev/ic/rt2560.c tmp |= RT2560_ENABLE_TSF_SYNC(1);
tmp 2290 dev/ic/rt2560.c tmp |= RT2560_ENABLE_TSF_SYNC(2) |
tmp 2292 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR14, tmp);
tmp 2347 dev/ic/rt2560.c uint32_t tmp;
tmp 2357 dev/ic/rt2560.c tmp = RAL_READ(sc, RT2560_CSR11);
tmp 2358 dev/ic/rt2560.c tmp = (tmp & ~0x1f00) | slottime << 8;
tmp 2359 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR11, tmp);
tmp 2361 dev/ic/rt2560.c tmp = pifs << 16 | sifs;
tmp 2362 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR18, tmp);
tmp 2364 dev/ic/rt2560.c tmp = eifs << 16 | difs;
tmp 2365 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR19, tmp);
tmp 2388 dev/ic/rt2560.c uint32_t tmp;
tmp 2391 dev/ic/rt2560.c tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30;
tmp 2392 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_LEDCSR, tmp);
tmp 2398 dev/ic/rt2560.c uint32_t tmp;
tmp 2400 dev/ic/rt2560.c tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
tmp 2401 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR5, tmp);
tmp 2403 dev/ic/rt2560.c tmp = bssid[4] | bssid[5] << 8;
tmp 2404 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR6, tmp);
tmp 2412 dev/ic/rt2560.c uint32_t tmp;
tmp 2414 dev/ic/rt2560.c tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
tmp 2415 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR3, tmp);
tmp 2417 dev/ic/rt2560.c tmp = addr[4] | addr[5] << 8;
tmp 2418 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_CSR4, tmp);
tmp 2426 dev/ic/rt2560.c uint32_t tmp;
tmp 2428 dev/ic/rt2560.c tmp = RAL_READ(sc, RT2560_CSR3);
tmp 2429 dev/ic/rt2560.c addr[0] = tmp & 0xff;
tmp 2430 dev/ic/rt2560.c addr[1] = (tmp >> 8) & 0xff;
tmp 2431 dev/ic/rt2560.c addr[2] = (tmp >> 16) & 0xff;
tmp 2432 dev/ic/rt2560.c addr[3] = (tmp >> 24);
tmp 2434 dev/ic/rt2560.c tmp = RAL_READ(sc, RT2560_CSR4);
tmp 2435 dev/ic/rt2560.c addr[4] = tmp & 0xff;
tmp 2436 dev/ic/rt2560.c addr[5] = (tmp >> 8) & 0xff;
tmp 2443 dev/ic/rt2560.c uint32_t tmp;
tmp 2445 dev/ic/rt2560.c tmp = RAL_READ(sc, RT2560_RXCSR0);
tmp 2447 dev/ic/rt2560.c tmp &= ~RT2560_DROP_NOT_TO_ME;
tmp 2449 dev/ic/rt2560.c tmp |= RT2560_DROP_NOT_TO_ME;
tmp 2451 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RXCSR0, tmp);
tmp 2460 dev/ic/rt2560.c uint32_t tmp;
tmp 2479 dev/ic/rt2560.c tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007;
tmp 2480 dev/ic/rt2560.c tmp |= (tx & 0x7) << 16 | (tx & 0x7);
tmp 2481 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_BBPCSR1, tmp);
tmp 2589 dev/ic/rt2560.c uint32_t tmp;
tmp 2605 dev/ic/rt2560.c tmp = RT2560_PRIO_RING_COUNT << 24 |
tmp 2611 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_TXCSR2, tmp);
tmp 2618 dev/ic/rt2560.c tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE;
tmp 2620 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RXCSR1, tmp);
tmp 2652 dev/ic/rt2560.c tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR;
tmp 2654 dev/ic/rt2560.c tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR;
tmp 2656 dev/ic/rt2560.c tmp |= RT2560_DROP_TODS;
tmp 2658 dev/ic/rt2560.c tmp |= RT2560_DROP_NOT_TO_ME;
tmp 2660 dev/ic/rt2560.c RAL_WRITE(sc, RT2560_RXCSR0, tmp);
tmp 774 dev/ic/rt2661.c uint32_t tmp;
tmp 785 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
tmp 786 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
tmp 841 dev/ic/rt2661.c uint32_t tmp;
tmp 877 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
tmp 878 dev/ic/rt2661.c val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
tmp 1929 dev/ic/rt2661.c uint32_t tmp;
tmp 1942 dev/ic/rt2661.c tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
tmp 1943 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
tmp 1981 dev/ic/rt2661.c uint32_t tmp;
tmp 1994 dev/ic/rt2661.c tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
tmp 1996 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
tmp 2022 dev/ic/rt2661.c uint32_t tmp;
tmp 2030 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
tmp 2031 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
tmp 2037 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
tmp 2048 dev/ic/rt2661.c uint32_t tmp;
tmp 2050 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
tmp 2052 dev/ic/rt2661.c tmp &= ~RT2661_MRR_CCK_FALLBACK;
tmp 2054 dev/ic/rt2661.c tmp |= RT2661_MRR_CCK_FALLBACK;
tmp 2055 dev/ic/rt2661.c tmp |= RT2661_MRR_ENABLED;
tmp 2057 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
tmp 2063 dev/ic/rt2661.c uint32_t tmp;
tmp 2065 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
tmp 2067 dev/ic/rt2661.c tmp &= ~RT2661_SHORT_PREAMBLE;
tmp 2069 dev/ic/rt2661.c tmp |= RT2661_SHORT_PREAMBLE;
tmp 2071 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
tmp 2100 dev/ic/rt2661.c uint32_t tmp;
tmp 2130 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_PHY_CSR0);
tmp 2131 dev/ic/rt2661.c tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
tmp 2133 dev/ic/rt2661.c tmp |= RT2661_PA_PE_2GHZ;
tmp 2135 dev/ic/rt2661.c tmp |= RT2661_PA_PE_5GHZ;
tmp 2136 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
tmp 2219 dev/ic/rt2661.c uint32_t tmp;
tmp 2221 dev/ic/rt2661.c tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
tmp 2222 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
tmp 2224 dev/ic/rt2661.c tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
tmp 2225 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
tmp 2231 dev/ic/rt2661.c uint32_t tmp;
tmp 2233 dev/ic/rt2661.c tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
tmp 2234 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
tmp 2236 dev/ic/rt2661.c tmp = addr[4] | addr[5] << 8 | 0xff << 16;
tmp 2237 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
tmp 2244 dev/ic/rt2661.c uint32_t tmp;
tmp 2246 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
tmp 2248 dev/ic/rt2661.c tmp &= ~RT2661_DROP_NOT_TO_ME;
tmp 2250 dev/ic/rt2661.c tmp |= RT2661_DROP_NOT_TO_ME;
tmp 2252 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
tmp 2279 dev/ic/rt2661.c uint32_t tmp;
tmp 2283 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_MAC_CSR9);
tmp 2284 dev/ic/rt2661.c tmp = (tmp & ~0xff) | slottime;
tmp 2285 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
tmp 2431 dev/ic/rt2661.c uint32_t tmp, sta[3];
tmp 2552 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
tmp 2554 dev/ic/rt2661.c tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
tmp 2556 dev/ic/rt2661.c tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
tmp 2559 dev/ic/rt2661.c tmp |= RT2661_DROP_TODS;
tmp 2561 dev/ic/rt2661.c tmp |= RT2661_DROP_NOT_TO_ME;
tmp 2564 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
tmp 2599 dev/ic/rt2661.c uint32_t tmp;
tmp 2612 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
tmp 2613 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
tmp 2746 dev/ic/rt2661.c uint32_t tmp;
tmp 2749 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
tmp 2750 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
tmp 2772 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
tmp 2856 dev/ic/rt2661.c uint32_t tmp;
tmp 2866 dev/ic/rt2661.c tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
tmp 2869 dev/ic/rt2661.c tmp |= ic->ic_bss->ni_intval * 16;
tmp 2871 dev/ic/rt2661.c tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
tmp 2873 dev/ic/rt2661.c tmp |= RT2661_TSF_MODE(1);
tmp 2875 dev/ic/rt2661.c tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
tmp 2877 dev/ic/rt2661.c RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
tmp 219 dev/ic/smc91cxx.c u_int16_t tmp;
tmp 227 dev/ic/smc91cxx.c tmp = bus_space_read_2(bst, bsh, REVISION_REG_W);
tmp 228 dev/ic/smc91cxx.c sc->sc_chipid = RR_ID(tmp);
tmp 230 dev/ic/smc91cxx.c if ((tmp & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
tmp 232 dev/ic/smc91cxx.c printf("%s: invalid BSR 0x%04x\n", sc->sc_dev.dv_xname, tmp);
tmp 234 dev/ic/smc91cxx.c idstr = smc91cxx_idstrs[RR_ID(tmp)];
tmp 241 dev/ic/smc91cxx.c printf("revision %d", RR_REV(tmp));
tmp 248 dev/ic/smc91cxx.c tmp = bus_space_read_2(bst, bsh, IAR_ADDR0_REG_W + i);
tmp 249 dev/ic/smc91cxx.c sc->sc_arpcom.ac_enaddr[i + 1] = (tmp >>8) & 0xff;
tmp 250 dev/ic/smc91cxx.c sc->sc_arpcom.ac_enaddr[i] = tmp & 0xff;
tmp 283 dev/ic/smc91cxx.c tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
tmp 294 dev/ic/smc91cxx.c if (tmp & CR_MII_SELECT) {
tmp 315 dev/ic/smc91cxx.c aui = tmp & CR_AUI_SELECT;
tmp 349 dev/ic/smc91cxx.c u_int16_t tmp;
tmp 369 dev/ic/smc91cxx.c tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
tmp 371 dev/ic/smc91cxx.c tmp |= CR_AUI_SELECT;
tmp 373 dev/ic/smc91cxx.c tmp &= ~CR_AUI_SELECT;
tmp 374 dev/ic/smc91cxx.c bus_space_write_2(bst, bsh, CONFIG_REG_W, tmp);
tmp 396 dev/ic/smc91cxx.c u_int16_t tmp;
tmp 415 dev/ic/smc91cxx.c tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
tmp 417 dev/ic/smc91cxx.c IFM_ETHER | ((tmp & CR_AUI_SELECT) ? IFM_10_5 : IFM_10_T);
tmp 430 dev/ic/smc91cxx.c u_int16_t tmp;
tmp 492 dev/ic/smc91cxx.c tmp = RCR_ENABLE | RCR_STRIP_CRC | RCR_ALMUL;
tmp 494 dev/ic/smc91cxx.c tmp |= RCR_PROMISC;
tmp 496 dev/ic/smc91cxx.c bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, tmp);
tmp 501 dev/ic/smc91cxx.c tmp = TCR_ENABLE;
tmp 508 dev/ic/smc91cxx.c tmp |= TCR_PAD_ENABLE;
tmp 511 dev/ic/smc91cxx.c bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, tmp);
tmp 510 dev/ic/z8530tty.c register int error, tmp;
tmp 541 dev/ic/z8530tty.c tmp = *(int *)data;
tmp 543 dev/ic/z8530tty.c if (tmp & ~TIOCFLAG_ALL)
tmp 547 dev/ic/z8530tty.c tmp |= TIOCFLAG_SOFTCAR;
tmp 549 dev/ic/z8530tty.c zst->zst_swflags = tmp;
tmp 306 dev/isa/ad1848.c u_char tmp, tmp1 = 0xff, tmp2 = 0xff;
tmp 324 dev/isa/ad1848.c tmp = ADREAD(sc, AD1848_IADDR);
tmp 325 dev/isa/ad1848.c if (tmp & SP_IN_INIT) { /* Not a AD1848 */
tmp 327 dev/isa/ad1848.c DPRINTF(("ad_detect_A %x\n", tmp));
tmp 359 dev/isa/ad1848.c tmp = ad_read(sc, SP_MISC_INFO);
tmp 360 dev/isa/ad1848.c ad_write(sc, SP_MISC_INFO, (~tmp) & 0x0f);
tmp 362 dev/isa/ad1848.c if ((tmp & 0x0f) != ((tmp1 = ad_read(sc, SP_MISC_INFO)) & 0x0f)) {
tmp 258 dev/isa/if_ec.c u_int8_t tmp;
tmp 454 dev/isa/if_ec.c case 9: tmp = ELINK2_IDCFR_IRQ2; break;
tmp 455 dev/isa/if_ec.c case 3: tmp = ELINK2_IDCFR_IRQ3; break;
tmp 456 dev/isa/if_ec.c case 4: tmp = ELINK2_IDCFR_IRQ4; break;
tmp 457 dev/isa/if_ec.c case 5: tmp = ELINK2_IDCFR_IRQ5; break;
tmp 471 dev/isa/if_ec.c bus_space_write_1(asict, asich, ELINK2_IDCFR, tmp);
tmp 185 dev/isa/if_ex.c int tmp;
tmp 228 dev/isa/if_ex.c tmp = eeprom_read(sc, EE_IRQ_No) & IRQ_No_Mask;
tmp 230 dev/isa/if_ex.c if (ee2irqmap[tmp] != ia->ia_irq)
tmp 231 dev/isa/if_ex.c printf("ex: WARING: board's EEPROM is configured for IRQ %d, using %d\n", ee2irqmap[tmp], ia->ia_irq);
tmp 235 dev/isa/if_ex.c sc->irq_no = ee2irqmap[tmp];
tmp 243 dev/isa/if_ex.c tmp = ISA_GET(REG3);
tmp 244 dev/isa/if_ex.c if (tmp & TPE_bit)
tmp 246 dev/isa/if_ex.c else if (tmp & BNC_bit)
tmp 105 dev/isa/if_sm_isa.c u_int16_t tmp;
tmp 120 dev/isa/if_sm_isa.c tmp = bus_space_read_2(iot, ioh, BANK_SELECT_REG_W);
tmp 121 dev/isa/if_sm_isa.c if ((tmp & BSR_DETECT_MASK) != BSR_DETECT_VALUE)
tmp 129 dev/isa/if_sm_isa.c tmp = bus_space_read_2(iot, ioh, BANK_SELECT_REG_W);
tmp 130 dev/isa/if_sm_isa.c if ((tmp & BSR_DETECT_MASK) != BSR_DETECT_VALUE)
tmp 138 dev/isa/if_sm_isa.c tmp = bus_space_read_2(iot, ioh, BASE_ADDR_REG_W);
tmp 139 dev/isa/if_sm_isa.c if (ia->ia_iobase != ((tmp >> 3) & 0x3e0))
tmp 147 dev/isa/if_sm_isa.c tmp = bus_space_read_2(iot, ioh, REVISION_REG_W);
tmp 148 dev/isa/if_sm_isa.c if (smc91cxx_idstrs[RR_ID(tmp)] == NULL)
tmp 923 dev/isa/seagate.c u_char p = *phase, tmp;
tmp 934 dev/isa/seagate.c if ((tmp = STATUS) & STAT_REQ)
tmp 936 dev/isa/seagate.c if (!(tmp & STAT_REQ)) {
tmp 947 dev/isa/seagate.c tmp = ((tmp & 0x08) >> 2) |
tmp 948 dev/isa/seagate.c ((tmp & 0x02) << 2) |
tmp 949 dev/isa/seagate.c (tmp & 0xf5);
tmp 950 dev/isa/seagate.c if ((tmp & PH_MASK) != p)
tmp 985 dev/isa/seagate.c tmp = STATUS;
tmp 986 dev/isa/seagate.c if (tmp & STAT_REQ)
tmp 987 dev/isa/seagate.c *phase = tmp & PH_MASK;
tmp 1099 dev/isa/seagate.c struct sea_scb *tmp;
tmp 1108 dev/isa/seagate.c TAILQ_FOREACH(tmp, &sea->ready_list, chain)
tmp 1109 dev/isa/seagate.c if (scb == tmp) {
tmp 1127 dev/isa/seagate.c TAILQ_FOREACH(tmp, &sea->nexus_list, chain)
tmp 1128 dev/isa/seagate.c if (scb == tmp) {
tmp 1139 dev/isa/seagate.c TAILQ_FOREACH(tmp, &sea->nexus_list, chain)
tmp 1140 dev/isa/seagate.c if (scb == tmp) {
tmp 1210 dev/isa/seagate.c u_char phase, tmp, old_phase = PH_INVALID;
tmp 1215 dev/isa/seagate.c tmp = STATUS;
tmp 1216 dev/isa/seagate.c if (tmp & STAT_PARITY)
tmp 1219 dev/isa/seagate.c if (!(tmp & STAT_BSY)) {
tmp 1221 dev/isa/seagate.c if ((tmp = STATUS) & STAT_BSY)
tmp 1223 dev/isa/seagate.c if (!(tmp & STAT_BSY)) {
tmp 1236 dev/isa/seagate.c if (!(tmp & STAT_REQ))
tmp 1240 dev/isa/seagate.c tmp = ((tmp & 0x08) >> 2) |
tmp 1241 dev/isa/seagate.c ((tmp & 0x02) << 2) |
tmp 1242 dev/isa/seagate.c (tmp & 0xf5);
tmp 1243 dev/isa/seagate.c phase = tmp & PH_MASK;
tmp 1263 dev/isa/seagate.c if ((tmp = STATUS) & STAT_REQ)
tmp 1265 dev/isa/seagate.c if (!(tmp & STAT_REQ)) {
tmp 1271 dev/isa/seagate.c tmp = ((tmp & 0x08) >> 2) |
tmp 1272 dev/isa/seagate.c ((tmp & 0x02) << 2) |
tmp 1273 dev/isa/seagate.c (tmp & 0xf5);
tmp 1274 dev/isa/seagate.c if ((tmp & PH_MASK) != phase)
tmp 1327 dev/isa/seagate.c data = &tmp;
tmp 1331 dev/isa/seagate.c switch (tmp) {
tmp 1371 dev/isa/seagate.c sea->sc_dev.dv_xname, tmp);
tmp 1402 dev/isa/seagate.c data = &tmp;
tmp 1404 dev/isa/seagate.c scb->xs->status = tmp;
tmp 375 dev/isa/wss.c u_int tmp;
tmp 395 dev/isa/wss.c tmp = bus_space_read_1(sc->sc_iot, sc->mad_ioh, port);
tmp 397 dev/isa/wss.c return tmp;
tmp 249 dev/isa/wss_isa.c unsigned char tmp, tmp2;
tmp 258 dev/isa/wss_isa.c if ((tmp = mad_read(sc, MC1_PORT)) == 0xff) {
tmp 267 dev/isa/wss_isa.c if ((tmp2 = bus_space_read_1(sc->sc_iot, sc->mad_ioh, MC1_PORT)) == tmp) {
tmp 272 dev/isa/wss_isa.c mad_write(sc, MC1_PORT, tmp ^ 0x80); /* Toggle a bit */
tmp 275 dev/isa/wss_isa.c if ((tmp2 = mad_read(sc, MC1_PORT)) != (tmp ^ 0x80)) {
tmp 276 dev/isa/wss_isa.c mad_write(sc, MC1_PORT, tmp); /* Restore */
tmp 277 dev/isa/wss_isa.c DPRINTF(("Bit revert test failed (0x%02x, 0x%02x)\n", tmp, tmp2));
tmp 281 dev/isa/wss_isa.c mad_write(sc, MC1_PORT, tmp); /* Restore */
tmp 1602 dev/pci/ahci.c u_int32_t tmp;
tmp 1720 dev/pci/ahci.c tmp = ci_saved;
tmp 1721 dev/pci/ahci.c if (tmp) {
tmp 1722 dev/pci/ahci.c slot = ffs(tmp) - 1;
tmp 1723 dev/pci/ahci.c tmp &= ~(1 << slot);
tmp 1724 dev/pci/ahci.c KASSERT(tmp == 0);
tmp 1808 dev/pci/ahci.c tmp = ci_saved;
tmp 1809 dev/pci/ahci.c while (tmp) {
tmp 1810 dev/pci/ahci.c slot = ffs(tmp) - 1;
tmp 1811 dev/pci/ahci.c tmp &= ~(1 << slot);
tmp 919 dev/pci/eso.c uint8_t tmp;
tmp 1031 dev/pci/eso.c tmp = eso_read_mixreg(sc, ESO_MIXREG_SPAT);
tmp 1033 dev/pci/eso.c tmp |= ESO_MIXREG_SPAT_ENB;
tmp 1035 dev/pci/eso.c tmp &= ~ESO_MIXREG_SPAT_ENB;
tmp 1037 dev/pci/eso.c tmp | ESO_MIXREG_SPAT_RSTREL);
tmp 1046 dev/pci/eso.c tmp = eso_read_mixreg(sc, ESO_MIXREG_MPM);
tmp 1047 dev/pci/eso.c tmp &= ~ESO_MIXREG_MPM_MOMASK;
tmp 1048 dev/pci/eso.c tmp |= sc->sc_monooutsrc;
tmp 1049 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_MPM, tmp);
tmp 1058 dev/pci/eso.c tmp = eso_read_ctlreg(sc, ESO_CTLREG_ACTL);
tmp 1060 dev/pci/eso.c tmp |= ESO_CTLREG_ACTL_RECMON;
tmp 1062 dev/pci/eso.c tmp &= ~ESO_CTLREG_ACTL_RECMON;
tmp 1063 dev/pci/eso.c eso_write_ctlreg(sc, ESO_CTLREG_ACTL, tmp);
tmp 1078 dev/pci/eso.c tmp = eso_read_mixreg(sc, ESO_MIXREG_MPM);
tmp 1079 dev/pci/eso.c tmp &= ~ESO_MIXREG_MPM_RESV0;
tmp 1081 dev/pci/eso.c tmp |= ESO_MIXREG_MPM_PREAMP;
tmp 1083 dev/pci/eso.c tmp &= ~ESO_MIXREG_MPM_PREAMP;
tmp 1084 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_MPM, tmp);
tmp 1822 dev/pci/eso.c uint8_t mixreg, tmp;
tmp 1871 dev/pci/eso.c tmp = eso_read_mixreg(sc, ESO_MIXREG_PCSVR);
tmp 1872 dev/pci/eso.c tmp &= ESO_MIXREG_PCSVR_RESV;
tmp 1874 dev/pci/eso.c tmp |= (sc->sc_gain[port][ESO_LEFT] >> 5);
tmp 1875 dev/pci/eso.c eso_write_mixreg(sc, ESO_MIXREG_PCSVR, tmp);
tmp 1181 dev/pci/if_bge.c u_int32_t tmp;
tmp 1183 dev/pci/if_bge.c tmp = CSR_READ_4(sc, BGE_PCI_CLKCTL) & 0x1f;
tmp 1184 dev/pci/if_bge.c if (tmp == 0x6 || tmp == 0x7)
tmp 3690 dev/pci/if_de.c u_int32_t tmp = csr & sc->tulip_intrmask
tmp 3705 dev/pci/if_de.c sc->tulip_statusbits |= tmp;
tmp 3707 dev/pci/if_de.c tulip_print_abnormal_interrupt(sc, tmp);
tmp 3881 dev/pci/if_de.c struct mbuf *tmp;
tmp 3897 dev/pci/if_de.c IFQ_DEQUEUE(&ifp->if_snd, tmp);
tmp 3898 dev/pci/if_de.c if (tmp != ombuf)
tmp 3971 dev/pci/if_de.c struct mbuf *tmp;
tmp 3972 dev/pci/if_de.c IFQ_DEQUEUE(&ifp->if_snd, tmp);
tmp 3973 dev/pci/if_de.c if (tmp != ombuf)
tmp 707 dev/pci/if_ipw.c uint32_t tmp;
tmp 742 dev/pci/if_ipw.c tmp = MEM_READ_4(sc, IPW_MEM_EEPROM_CTL);
tmp 743 dev/pci/if_ipw.c val |= ((tmp & IPW_EEPROM_Q) >> IPW_EEPROM_SHIFT_Q) << n;
tmp 741 dev/pci/if_iwi.c uint32_t tmp;
tmp 762 dev/pci/if_iwi.c tmp = MEM_READ_4(sc, IWI_MEM_EVENT_CTL) & IWI_LED_MASK;
tmp 763 dev/pci/if_iwi.c MEM_WRITE_4(sc, IWI_MEM_EVENT_CTL, tmp | IWI_LED_ASSOC);
tmp 771 dev/pci/if_iwi.c tmp = MEM_READ_4(sc, IWI_MEM_EVENT_CTL) & IWI_LED_MASK;
tmp 772 dev/pci/if_iwi.c MEM_WRITE_4(sc, IWI_MEM_EVENT_CTL, tmp & ~IWI_LED_ASSOC);
tmp 790 dev/pci/if_iwi.c uint32_t tmp;
tmp 825 dev/pci/if_iwi.c tmp = MEM_READ_4(sc, IWI_MEM_EEPROM_CTL);
tmp 826 dev/pci/if_iwi.c val |= ((tmp & IWI_EEPROM_Q) >> IWI_EEPROM_SHIFT_Q) << n;
tmp 883 dev/pci/if_lmc.c u_int32_t tmp = csr & sc->lmc_intrmask
tmp 895 dev/pci/if_lmc.c sc->lmc_statusbits |= tmp;
tmp 897 dev/pci/if_lmc.c lmc_print_abnormal_interrupt(sc, tmp);
tmp 1045 dev/pci/if_nfe.c uint32_t tmp;
tmp 1099 dev/pci/if_nfe.c tmp = NFE_READ(sc, NFE_PWR_STATE);
tmp 1100 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_PWR_STATE, tmp | NFE_PWR_WAKEUP);
tmp 1102 dev/pci/if_nfe.c tmp = NFE_READ(sc, NFE_PWR_STATE);
tmp 1103 dev/pci/if_nfe.c NFE_WRITE(sc, NFE_PWR_STATE, tmp | NFE_PWR_VALID);
tmp 1726 dev/pci/if_nfe.c uint32_t tmp;
tmp 1728 dev/pci/if_nfe.c tmp = NFE_READ(sc, NFE_MACADDR_LO);
tmp 1729 dev/pci/if_nfe.c addr[0] = (tmp >> 8) & 0xff;
tmp 1730 dev/pci/if_nfe.c addr[1] = (tmp & 0xff);
tmp 1732 dev/pci/if_nfe.c tmp = NFE_READ(sc, NFE_MACADDR_HI);
tmp 1733 dev/pci/if_nfe.c addr[2] = (tmp >> 24) & 0xff;
tmp 1734 dev/pci/if_nfe.c addr[3] = (tmp >> 16) & 0xff;
tmp 1735 dev/pci/if_nfe.c addr[4] = (tmp >> 8) & 0xff;
tmp 1736 dev/pci/if_nfe.c addr[5] = (tmp & 0xff);
tmp 415 dev/pci/if_san_common.c struct mbuf *m, *m0, *tmp;
tmp 458 dev/pci/if_san_common.c for (tmp = m0; tmp; tmp = tmp->m_next) {
tmp 459 dev/pci/if_san_common.c if (tmp->m_len > len) {
tmp 463 dev/pci/if_san_common.c bcopy(mtod(tmp, caddr_t), buffer, tmp->m_len);
tmp 464 dev/pci/if_san_common.c buffer += tmp->m_len;
tmp 465 dev/pci/if_san_common.c m->m_len += tmp->m_len;
tmp 466 dev/pci/if_san_common.c len -= tmp->m_len;
tmp 1607 dev/pci/if_san_te1.c unsigned char tmp = 0x00, value = 0x00;
tmp 1616 dev/pci/if_san_te1.c tmp = READ_REG(REG_TPSC_MICRO_ACCESS_STATUS);
tmp 1617 dev/pci/if_san_te1.c if ((tmp & BIT_TPSC_BUSY) == 0x0) {
tmp 1632 dev/pci/if_san_te1.c tmp = READ_REG(REG_TPSC_MICRO_ACCESS_STATUS);
tmp 1633 dev/pci/if_san_te1.c if ((tmp & BIT_TPSC_BUSY) == 0x0) {
tmp 1709 dev/pci/if_san_te1.c unsigned char tmp = 0x00, value = 0x00;
tmp 1718 dev/pci/if_san_te1.c tmp = READ_REG(REG_RPSC_MICRO_ACCESS_STATUS);
tmp 1719 dev/pci/if_san_te1.c if ((tmp & BIT_RPSC_BUSY) == 0x0) {
tmp 1734 dev/pci/if_san_te1.c tmp = READ_REG(REG_RPSC_MICRO_ACCESS_STATUS);
tmp 1735 dev/pci/if_san_te1.c if ((tmp & BIT_RPSC_BUSY) == 0x0) {
tmp 958 dev/pci/if_san_xilinx.c u_int32_t reg, tmp;
tmp 1127 dev/pci/if_san_xilinx.c sdla_bus_read_4(card->hw, XILINX_DMA_RX_INTR_PENDING_REG, &tmp);
tmp 1128 dev/pci/if_san_xilinx.c sdla_bus_read_4(card->hw, XILINX_DMA_TX_INTR_PENDING_REG, &tmp);
tmp 1129 dev/pci/if_san_xilinx.c sdla_bus_read_4(card->hw, XILINX_HDLC_RX_INTR_PENDING_REG, &tmp);
tmp 1130 dev/pci/if_san_xilinx.c sdla_bus_read_4(card->hw, XILINX_HDLC_TX_INTR_PENDING_REG, &tmp);
tmp 2916 dev/pci/if_san_xilinx.c u_int8_t tmp;
tmp 2926 dev/pci/if_san_xilinx.c sdla_bus_read_1(card->hw, XILINX_MCPU_INTERFACE, &tmp);
tmp 2931 dev/pci/if_san_xilinx.c return (tmp);
tmp 2989 dev/pci/if_san_xilinx.c u_int8_t tmp;
tmp 2993 dev/pci/if_san_xilinx.c sdla_bus_read_1(card->hw, XILINX_MCPU_INTERFACE, &tmp);
tmp 2996 dev/pci/if_san_xilinx.c return (tmp);
tmp 359 dev/pci/if_sandrv.c sdlahw_t *tmp = elm_hw;
tmp 361 dev/pci/if_sandrv.c if (sdla_hw_unregister(tmp->hwcard, tmp->cpu_no) == EBUSY)
tmp 368 dev/pci/if_sandrv.c sdlahw_card_t *tmp = elm_hw_card;
tmp 370 dev/pci/if_sandrv.c if (sdla_card_unregister(tmp->hw_type,
tmp 371 dev/pci/if_sandrv.c tmp->slot_no,
tmp 372 dev/pci/if_sandrv.c tmp->bus_no,
tmp 373 dev/pci/if_sandrv.c tmp->ioport) == EBUSY)
tmp 380 dev/pci/if_sandrv.c sdla_hw_probe_t *tmp = elm_hw_probe;
tmp 382 dev/pci/if_sandrv.c if (tmp->used){
tmp 387 dev/pci/if_sandrv.c LIST_REMOVE(tmp, next);
tmp 388 dev/pci/if_sandrv.c free(tmp, M_DEVBUF);
tmp 1081 dev/pci/if_sandrv.c u_int8_t tmp;
tmp 1085 dev/pci/if_sandrv.c sdla_peek(hw, offset, (void*)&tmp, 1);
tmp 1086 dev/pci/if_sandrv.c tmp |= value;
tmp 1088 dev/pci/if_sandrv.c sdla_poke(hw, offset, (void*)&tmp, 1);
tmp 1096 dev/pci/if_sandrv.c u_int8_t tmp;
tmp 1100 dev/pci/if_sandrv.c sdla_peek(hw, offset, (void*)&tmp, 1);
tmp 1101 dev/pci/if_sandrv.c tmp &= ~value;
tmp 1103 dev/pci/if_sandrv.c sdla_poke(hw, offset, (void*)&tmp, 1);
tmp 1442 dev/pci/if_sandrv.c u_int32_t tmp = 0x00;
tmp 1448 dev/pci/if_sandrv.c tmp = pci_conf_read(hwcard->pa.pa_pc, hwcard->pa.pa_tag, reg);
tmp 1449 dev/pci/if_sandrv.c *value = (u_int16_t)((tmp >> 16) & 0xFFFF);
tmp 1458 dev/pci/if_sandrv.c u_int32_t tmp = 0x00;
tmp 1464 dev/pci/if_sandrv.c tmp = pci_conf_read(hwcard->pa.pa_pc, hwcard->pa.pa_tag, reg);
tmp 1465 dev/pci/if_sandrv.c *value = (u_int8_t)(tmp & 0xFF);
tmp 1020 dev/pci/if_sis.c u_int16_t tmp[4];
tmp 1022 dev/pci/if_sis.c sis_read_eeprom(sc, (caddr_t)&tmp, NS_EE_NODEADDR,4,0);
tmp 1025 dev/pci/if_sis.c tmp[3] = tmp[3] >> 1;
tmp 1026 dev/pci/if_sis.c tmp[3] |= tmp[2] << 15;
tmp 1027 dev/pci/if_sis.c tmp[2] = tmp[2] >> 1;
tmp 1028 dev/pci/if_sis.c tmp[2] |= tmp[1] << 15;
tmp 1029 dev/pci/if_sis.c tmp[1] = tmp[1] >> 1;
tmp 1030 dev/pci/if_sis.c tmp[1] |= tmp[0] << 15;
tmp 1033 dev/pci/if_sis.c tmp[3] = sis_reverse(tmp[3]);
tmp 1034 dev/pci/if_sis.c tmp[2] = sis_reverse(tmp[2]);
tmp 1035 dev/pci/if_sis.c tmp[1] = sis_reverse(tmp[1]);
tmp 1037 dev/pci/if_sis.c bcopy((char *)&tmp[1], sc->arpcom.ac_enaddr,
tmp 2251 dev/pci/if_ti.c int tmp;
tmp 2321 dev/pci/if_ti.c tmp = ifm->ifm_media;
tmp 2324 dev/pci/if_ti.c ifm->ifm_media = tmp;
tmp 882 dev/pci/if_wpi.c uint32_t tmp;
tmp 885 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_GPIO_CTL);
tmp 886 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_GPIO_CTL, tmp | WPI_GPIO_MAC);
tmp 905 dev/pci/if_wpi.c uint32_t tmp = WPI_READ(sc, WPI_GPIO_CTL);
tmp 906 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_GPIO_CTL, tmp & ~WPI_GPIO_MAC);
tmp 2668 dev/pci/if_wpi.c uint32_t tmp;
tmp 2671 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_RESET);
tmp 2672 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_RESET, tmp | WPI_STOP_MASTER);
tmp 2674 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_GPIO_CTL);
tmp 2675 dev/pci/if_wpi.c if ((tmp & WPI_GPIO_PWR_STATUS) == WPI_GPIO_PWR_SLEEP)
tmp 2692 dev/pci/if_wpi.c uint32_t tmp;
tmp 2696 dev/pci/if_wpi.c tmp = wpi_mem_read(sc, WPI_MEM_POWER);
tmp 2697 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_POWER, tmp & ~0x03000000);
tmp 2716 dev/pci/if_wpi.c uint32_t tmp;
tmp 2722 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_PLL_CTL);
tmp 2723 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_PLL_CTL, tmp | WPI_PLL_INIT);
tmp 2725 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_CHICKEN);
tmp 2726 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_CHICKEN, tmp | WPI_CHICKEN_RXNOLOS);
tmp 2728 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_GPIO_CTL);
tmp 2729 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_GPIO_CTL, tmp | WPI_GPIO_INIT);
tmp 2744 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_EEPROM_STATUS);
tmp 2745 dev/pci/if_wpi.c if ((tmp & WPI_EEPROM_VERSION) == 0) {
tmp 2749 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_EEPROM_STATUS, tmp & ~WPI_EEPROM_LOCKED);
tmp 2788 dev/pci/if_wpi.c uint32_t tmp;
tmp 2796 dev/pci/if_wpi.c tmp = wpi_mem_read(sc, WPI_MEM_PCIDEV);
tmp 2797 dev/pci/if_wpi.c wpi_mem_write(sc, WPI_MEM_PCIDEV, tmp | 0x800);
tmp 2891 dev/pci/if_wpi.c uint32_t tmp;
tmp 2929 dev/pci/if_wpi.c tmp = WPI_READ(sc, WPI_RESET);
tmp 2930 dev/pci/if_wpi.c WPI_WRITE(sc, WPI_RESET, tmp | WPI_SW_RESET);
tmp 848 dev/pci/musycc.c struct dma_desc *dd, *tmp;
tmp 867 dev/pci/musycc.c tmp = dd;
tmp 869 dev/pci/musycc.c musycc_dma_free(mg, tmp);
tmp 879 dev/pci/musycc.c struct dma_desc *dd, *tmp;
tmp 898 dev/pci/musycc.c tmp = dd;
tmp 900 dev/pci/musycc.c musycc_dma_free(mg, tmp);
tmp 989 dev/pci/musycc.c struct dma_desc *cur, *tmp;
tmp 1040 dev/pci/musycc.c tmp = mg->mg_dma_d[c].tx_cur;
tmp 1050 dev/pci/musycc.c tmp->status |= htole32(MUSYCC_STATUS_OWNER);
tmp 1058 dev/pci/musycc.c if (mg->mg_dma_d[c].tx_pend == tmp) {
tmp 106 dev/pci/sti_pci.c u_int32_t tmp;
tmp 142 dev/pci/sti_pci.c tmp = bus_space_read_4(pa->pa_memt, romh, offs + 0);
tmp 143 dev/pci/sti_pci.c tmp = letoh32(tmp);
tmp 144 dev/pci/sti_pci.c if (tmp != 0x55aa0000) {
tmp 149 dev/pci/sti_pci.c sc->sc_dev.dv_xname, tmp);
tmp 158 dev/pci/sti_pci.c tmp = bus_space_read_4(pa->pa_memt, romh, offs + 4);
tmp 159 dev/pci/sti_pci.c tmp = letoh32(tmp);
tmp 160 dev/pci/sti_pci.c if (tmp != 0x00000001) { /* 1 == STI ROM */
tmp 164 dev/pci/sti_pci.c sc->sc_dev.dv_xname, tmp);
tmp 177 dev/pci/sti_pci.c offs, subsize, tmp);
tmp 189 dev/pci/sti_pci.c tmp = bus_space_read_4(pa->pa_memt, romh, suboffs + 0);
tmp 190 dev/pci/sti_pci.c tmp = letoh32(tmp);
tmp 191 dev/pci/sti_pci.c if (tmp != 0x50434952) { /* PCIR */
tmp 196 dev/pci/sti_pci.c sc->sc_dev.dv_xname, tmp);
tmp 201 dev/pci/sti_pci.c tmp);
tmp 207 dev/pci/sti_pci.c tmp = bus_space_read_1(pa->pa_memt, romh, suboffs + 0x14);
tmp 210 dev/pci/sti_pci.c printf(" code %02x", tmp);
tmp 213 dev/pci/sti_pci.c switch (tmp) {
tmp 372 dev/pcmcia/if_ray.c struct timeval *tmp; \
tmp 375 dev/pcmcia/if_ray.c tmp = ttp; ttp = ltp; ltp = tmp; \
tmp 380 dev/pcmcia/if_ray.c struct timeval *tmp; \
tmp 383 dev/pcmcia/if_ray.c tmp = ttp; ttp = ltp; ltp = tmp; \
tmp 1376 dev/pcmcia/if_ray.c bus_size_t bufp, ebufp, tmp;
tmp 1482 dev/pcmcia/if_ray.c ray_read_region(sc, bufp, d, (tmp = RAY_RX_END - bufp));
tmp 1483 dev/pcmcia/if_ray.c ray_read_region(sc, RAY_RX_BASE, d + tmp, ebufp - RAY_RX_END);
tmp 3029 dev/pcmcia/if_ray.c u_int n2, n4, tmp;
tmp 3040 dev/pcmcia/if_ray.c tmp = c & ~0x3;
tmp 3042 dev/pcmcia/if_ray.c p += tmp;
tmp 3043 dev/pcmcia/if_ray.c off += tmp;
tmp 3087 dev/pcmcia/if_ray.c size_t n2, n4, tmp;
tmp 3097 dev/pcmcia/if_ray.c tmp = c & ~0x3;
tmp 3099 dev/pcmcia/if_ray.c p += tmp;
tmp 3100 dev/pcmcia/if_ray.c off += tmp;
tmp 429 dev/pcmcia/pcmcia.c struct pcmcia_function *tmp;
tmp 460 dev/pcmcia/pcmcia.c SIMPLEQ_FOREACH(tmp, &pf->sc->card.pf_head, pf_list) {
tmp 461 dev/pcmcia/pcmcia.c if ((tmp->pf_flags & PFF_ENABLED) &&
tmp 462 dev/pcmcia/pcmcia.c (pf->ccr_base >= (tmp->ccr_base - tmp->pf_ccr_offset)) &&
tmp 464 dev/pcmcia/pcmcia.c (tmp->ccr_base - tmp->pf_ccr_offset +
tmp 465 dev/pcmcia/pcmcia.c tmp->pf_ccr_realsize))) {
tmp 466 dev/pcmcia/pcmcia.c pf->pf_ccrt = tmp->pf_ccrt;
tmp 467 dev/pcmcia/pcmcia.c pf->pf_ccrh = tmp->pf_ccrh;
tmp 468 dev/pcmcia/pcmcia.c pf->pf_ccr_realsize = tmp->pf_ccr_realsize;
tmp 475 dev/pcmcia/pcmcia.c (tmp->pf_ccr_offset + pf->ccr_base) -
tmp 476 dev/pcmcia/pcmcia.c tmp->ccr_base;
tmp 477 dev/pcmcia/pcmcia.c pf->pf_ccr_window = tmp->pf_ccr_window;
tmp 482 dev/pcmcia/pcmcia.c if (tmp == NULL) {
tmp 531 dev/pcmcia/pcmcia.c SIMPLEQ_FOREACH(tmp, &pf->sc->card.pf_head, pf_list) {
tmp 534 dev/pcmcia/pcmcia.c tmp->sc->dev.dv_xname, tmp->number,
tmp 535 dev/pcmcia/pcmcia.c tmp->pf_ccr_window, tmp->pf_ccr_offset,
tmp 536 dev/pcmcia/pcmcia.c pcmcia_ccr_read(tmp, 0x00),
tmp 537 dev/pcmcia/pcmcia.c pcmcia_ccr_read(tmp, 0x02),
tmp 538 dev/pcmcia/pcmcia.c pcmcia_ccr_read(tmp, 0x04),
tmp 539 dev/pcmcia/pcmcia.c pcmcia_ccr_read(tmp, 0x06),
tmp 541 dev/pcmcia/pcmcia.c pcmcia_ccr_read(tmp, 0x0A),
tmp 542 dev/pcmcia/pcmcia.c pcmcia_ccr_read(tmp, 0x0C),
tmp 543 dev/pcmcia/pcmcia.c pcmcia_ccr_read(tmp, 0x0E),
tmp 544 dev/pcmcia/pcmcia.c pcmcia_ccr_read(tmp, 0x10),
tmp 546 dev/pcmcia/pcmcia.c pcmcia_ccr_read(tmp, 0x12));
tmp 573 dev/pcmcia/pcmcia.c struct pcmcia_function *tmp;
tmp 597 dev/pcmcia/pcmcia.c SIMPLEQ_FOREACH(tmp, &pf->sc->card.pf_head, pf_list) {
tmp 598 dev/pcmcia/pcmcia.c if ((tmp->pf_flags & PFF_ENABLED) &&
tmp 599 dev/pcmcia/pcmcia.c (pf->ccr_base >= (tmp->ccr_base - tmp->pf_ccr_offset)) &&
tmp 601 dev/pcmcia/pcmcia.c (tmp->ccr_base - tmp->pf_ccr_offset + tmp->pf_ccr_realsize)))
tmp 606 dev/pcmcia/pcmcia.c if (tmp == NULL) {
tmp 67 dev/raidframe/rf_cvscan.c RF_DiskQueueData_t *tmp;
tmp 71 dev/raidframe/rf_cvscan.c for (key = hdr->cur_block, i = 0, tmp = hdr->left;
tmp 72 dev/raidframe/rf_cvscan.c tmp != (RF_DiskQueueData_t *) NULL;
tmp 73 dev/raidframe/rf_cvscan.c key = tmp->sectorOffset, i++, tmp = tmp->next)
tmp 74 dev/raidframe/rf_cvscan.c RF_ASSERT(tmp->sectorOffset <= key
tmp 75 dev/raidframe/rf_cvscan.c && tmp->priority == hdr->nxt_priority &&
tmp 76 dev/raidframe/rf_cvscan.c pri_ok(tmp->priority));
tmp 79 dev/raidframe/rf_cvscan.c for (key = hdr->cur_block, i = 0, tmp = hdr->right;
tmp 80 dev/raidframe/rf_cvscan.c tmp != (RF_DiskQueueData_t *) NULL;
tmp 81 dev/raidframe/rf_cvscan.c key = tmp->sectorOffset, i++, tmp = tmp->next) {
tmp 82 dev/raidframe/rf_cvscan.c RF_ASSERT(key <= tmp->sectorOffset);
tmp 83 dev/raidframe/rf_cvscan.c RF_ASSERT(tmp->priority == hdr->nxt_priority);
tmp 84 dev/raidframe/rf_cvscan.c RF_ASSERT(pri_ok(tmp->priority));
tmp 88 dev/raidframe/rf_cvscan.c for (key = hdr->nxt_priority - 1, tmp = hdr->burner;
tmp 89 dev/raidframe/rf_cvscan.c tmp != (RF_DiskQueueData_t *) NULL;
tmp 90 dev/raidframe/rf_cvscan.c key = tmp->priority, tmp = tmp->next) {
tmp 91 dev/raidframe/rf_cvscan.c RF_ASSERT(tmp);
tmp 93 dev/raidframe/rf_cvscan.c RF_ASSERT(pri_ok(tmp->priority));
tmp 94 dev/raidframe/rf_cvscan.c RF_ASSERT(key >= tmp->priority);
tmp 95 dev/raidframe/rf_cvscan.c RF_ASSERT(tmp->priority < hdr->nxt_priority);
tmp 232 dev/raidframe/rf_cvscan.c RF_DiskQueueData_t *tmp;
tmp 241 dev/raidframe/rf_cvscan.c for (i = 0, tmp = hdr->left, sum_dist_left =
tmp 244 dev/raidframe/rf_cvscan.c tmp != (RF_DiskQueueData_t *) NULL && i < range;
tmp 245 dev/raidframe/rf_cvscan.c tmp = tmp->next, i++) {
tmp 246 dev/raidframe/rf_cvscan.c sum_dist_left += hdr->cur_block - tmp->sectorOffset;
tmp 248 dev/raidframe/rf_cvscan.c for (i = 0, tmp = hdr->right, sum_dist_right =
tmp 251 dev/raidframe/rf_cvscan.c tmp != (RF_DiskQueueData_t *) NULL && i < range;
tmp 252 dev/raidframe/rf_cvscan.c tmp = tmp->next, i++) {
tmp 253 dev/raidframe/rf_cvscan.c sum_dist_right += tmp->sectorOffset - hdr->cur_block;
tmp 260 dev/raidframe/rf_cvscan.c tmp = hdr->left;
tmp 267 dev/raidframe/rf_cvscan.c tmp = hdr->right;
tmp 297 dev/raidframe/rf_cvscan.c RF_DiskQueueData_t *tmp, *headElement;
tmp 306 dev/raidframe/rf_cvscan.c for (i = 0, tmp = hdr->left, sum_dist_left =
tmp 309 dev/raidframe/rf_cvscan.c tmp != (RF_DiskQueueData_t *) NULL && i < range;
tmp 310 dev/raidframe/rf_cvscan.c tmp = tmp->next, i++) {
tmp 311 dev/raidframe/rf_cvscan.c sum_dist_left += hdr->cur_block - tmp->sectorOffset;
tmp 313 dev/raidframe/rf_cvscan.c for (i = 0, tmp = hdr->right, sum_dist_right =
tmp 316 dev/raidframe/rf_cvscan.c tmp != (RF_DiskQueueData_t *) NULL && i < range;
tmp 317 dev/raidframe/rf_cvscan.c tmp = tmp->next, i++) {
tmp 318 dev/raidframe/rf_cvscan.c sum_dist_right += tmp->sectorOffset - hdr->cur_block;
tmp 375 dev/raidframe/rf_cvscan.c RF_DiskQueueData_t *tmp;
tmp 383 dev/raidframe/rf_cvscan.c for (tmp = hdr->left; tmp != (RF_DiskQueueData_t *) NULL;
tmp 384 dev/raidframe/rf_cvscan.c tmp = tmp->next)
tmp 386 dev/raidframe/rf_cvscan.c (int) tmp->sectorOffset,
tmp 387 dev/raidframe/rf_cvscan.c (long) (tmp->sectorOffset + tmp->numSector),
tmp 388 dev/raidframe/rf_cvscan.c tmp->priority);
tmp 391 dev/raidframe/rf_cvscan.c for (tmp = hdr->right; tmp != (RF_DiskQueueData_t *) NULL;
tmp 392 dev/raidframe/rf_cvscan.c tmp = tmp->next)
tmp 394 dev/raidframe/rf_cvscan.c (int) tmp->sectorOffset,
tmp 395 dev/raidframe/rf_cvscan.c (long) (tmp->sectorOffset + tmp->numSector),
tmp 396 dev/raidframe/rf_cvscan.c tmp->priority);
tmp 399 dev/raidframe/rf_cvscan.c for (tmp = hdr->burner; tmp != (RF_DiskQueueData_t *) NULL;
tmp 400 dev/raidframe/rf_cvscan.c tmp = tmp->next)
tmp 402 dev/raidframe/rf_cvscan.c (int) tmp->sectorOffset,
tmp 403 dev/raidframe/rf_cvscan.c (long) (tmp->sectorOffset + tmp->numSector),
tmp 404 dev/raidframe/rf_cvscan.c tmp->priority);
tmp 421 dev/raidframe/rf_cvscan.c RF_DiskQueueData_t *trailer = NULL, *tmp = hdr->burner, *tlist = NULL;
tmp 425 dev/raidframe/rf_cvscan.c while (tmp) { /* Handle entries at the front of the list. */
tmp 426 dev/raidframe/rf_cvscan.c if (tmp->parityStripeID == parityStripeID &&
tmp 427 dev/raidframe/rf_cvscan.c tmp->which_ru == which_ru) {
tmp 428 dev/raidframe/rf_cvscan.c hdr->burner = tmp->next;
tmp 429 dev/raidframe/rf_cvscan.c tmp->priority = RF_IO_NORMAL_PRIORITY;
tmp 430 dev/raidframe/rf_cvscan.c tmp->next = tlist;
tmp 431 dev/raidframe/rf_cvscan.c tlist = tmp;
tmp 432 dev/raidframe/rf_cvscan.c tmp = hdr->burner;
tmp 436 dev/raidframe/rf_cvscan.c if (tmp) {
tmp 437 dev/raidframe/rf_cvscan.c trailer = tmp;
tmp 438 dev/raidframe/rf_cvscan.c tmp = tmp->next;
tmp 440 dev/raidframe/rf_cvscan.c while (tmp) { /* Handle entries on the rest of the list. */
tmp 441 dev/raidframe/rf_cvscan.c if (tmp->parityStripeID == parityStripeID &&
tmp 442 dev/raidframe/rf_cvscan.c tmp->which_ru == which_ru) {
tmp 443 dev/raidframe/rf_cvscan.c trailer->next = tmp->next;
tmp 444 dev/raidframe/rf_cvscan.c tmp->priority = RF_IO_NORMAL_PRIORITY;
tmp 445 dev/raidframe/rf_cvscan.c tmp->next = tlist;
tmp 446 dev/raidframe/rf_cvscan.c tlist = tmp; /* Insert on a temp queue. */
tmp 447 dev/raidframe/rf_cvscan.c tmp = trailer->next;
tmp 449 dev/raidframe/rf_cvscan.c trailer = tmp;
tmp 450 dev/raidframe/rf_cvscan.c tmp = tmp->next;
tmp 455 dev/raidframe/rf_cvscan.c tmp = tlist->next;
tmp 457 dev/raidframe/rf_cvscan.c tlist = tmp;
tmp 66 dev/raidframe/rf_interdecluster.c RF_RowCol_t i, tmp, SUs_per_region;
tmp 83 dev/raidframe/rf_interdecluster.c tmp = i / raidPtr->numCol;
tmp 84 dev/raidframe/rf_interdecluster.c info->stripeIdentifier[i][1] = (i + 1 + tmp) % raidPtr->numCol;
tmp 169 dev/rasops/rasops_bitops.h int tmp, lmask, rmask, height, lnum, rnum, sb, db, cnt, full;
tmp 218 dev/rasops/rasops_bitops.h GETBITS(srp, sb, num, tmp);
tmp 219 dev/rasops/rasops_bitops.h PUTBITS(tmp, db, num, drp);
tmp 261 dev/rasops/rasops_bitops.h GETBITS(sp, src, db, tmp);
tmp 262 dev/rasops/rasops_bitops.h PUTBITS(tmp, 0, db, dp);
tmp 269 dev/rasops/rasops_bitops.h GETBITS(sp, src, 32, tmp);
tmp 270 dev/rasops/rasops_bitops.h *dp-- = tmp;
tmp 278 dev/rasops/rasops_bitops.h GETBITS(sp, sb, lnum, tmp);
tmp 279 dev/rasops/rasops_bitops.h PUTBITS(tmp, rnum, lnum, dp);
tmp 296 dev/rasops/rasops_bitops.h GETBITS(sp, sb, lnum, tmp);
tmp 297 dev/rasops/rasops_bitops.h PUTBITS(tmp, db, lnum, dp);
tmp 308 dev/rasops/rasops_bitops.h GETBITS(sp, sb, 32, tmp);
tmp 309 dev/rasops/rasops_bitops.h *dp++ = tmp;
tmp 313 dev/rasops/rasops_bitops.h GETBITS(sp, sb, rnum, tmp);
tmp 314 dev/rasops/rasops_bitops.h PUTBITS(tmp, 0, rnum, dp);
tmp 64 dev/rasops/rasops_masks.h u_int32_t tmp = (x); \
tmp 65 dev/rasops/rasops_masks.h tmp = ((tmp >> 1) & 0x55555555) | ((tmp << 1) & 0xaaaaaaaa); \
tmp 66 dev/rasops/rasops_masks.h tmp = ((tmp >> 2) & 0x33333333) | ((tmp << 2) & 0xcccccccc); \
tmp 67 dev/rasops/rasops_masks.h tmp = ((tmp >> 4) & 0x0f0f0f0f) | ((tmp << 4) & 0xf0f0f0f0); \
tmp 68 dev/rasops/rasops_masks.h tmp = ((tmp >> 8) & 0x00ff00ff) | ((tmp << 8) & 0xff00ff00); \
tmp 69 dev/rasops/rasops_masks.h tmp = ((tmp >> 16) & 0x0000ffff) | ((tmp << 16) & 0xffff0000); \
tmp 70 dev/rasops/rasops_masks.h tmp; \
tmp 877 dev/rnd.c MD5_CTX tmp;
tmp 890 dev/rnd.c MD5Init(&tmp);
tmp 892 dev/rnd.c MD5Update(&tmp, (u_int8_t*)rs->pool, sizeof(rs->pool));
tmp 898 dev/rnd.c MD5Final(buffer, &tmp);
tmp 924 dev/rnd.c bzero(&tmp, sizeof(tmp));
tmp 547 dev/sbus/zx.c u_int tmp;
tmp 556 dev/sbus/zx.c tmp = (index & 0x0f) + 0x40;
tmp 558 dev/sbus/zx.c tmp = index & 0x3f;
tmp 560 dev/sbus/zx.c SETREG(zx->zx_type, 0x5800 + tmp);
tmp 1656 dev/systrace.c struct str_policy *tmp;
tmp 1659 dev/systrace.c TAILQ_FOREACH(tmp, &fst->policies, next) {
tmp 1660 dev/systrace.c if (tmp->refcount == 1)
tmp 1664 dev/systrace.c if (tmp == NULL)
tmp 1668 dev/systrace.c systrace_msg_policyfree(fst, tmp);
tmp 1670 dev/systrace.c systrace_closepolicy(fst, tmp);
tmp 220 dev/tc/if_le_ioasic.c u_int16_t tmp;
tmp 231 dev/tc/if_le_ioasic.c tmp = *bptr;
tmp 232 dev/tc/if_le_ioasic.c *to++ = tmp & 0xff;
tmp 233 dev/tc/if_le_ioasic.c *to++ = (tmp >> 8) & 0xff;
tmp 1490 dev/usb/if_ral.c uint16_t tmp;
tmp 1502 dev/usb/if_ral.c tmp = reg << 8 | val;
tmp 1503 dev/usb/if_ral.c ural_write(sc, RAL_PHY_CSR7, tmp);
tmp 1529 dev/usb/if_ral.c uint32_t tmp;
tmp 1541 dev/usb/if_ral.c tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
tmp 1542 dev/usb/if_ral.c ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff);
tmp 1543 dev/usb/if_ral.c ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
tmp 1555 dev/usb/if_ral.c uint8_t power, tmp;
tmp 1620 dev/usb/if_ral.c tmp = ural_bbp_read(sc, 70);
tmp 1622 dev/usb/if_ral.c tmp &= ~RAL_JAPAN_FILTER;
tmp 1624 dev/usb/if_ral.c tmp |= RAL_JAPAN_FILTER;
tmp 1626 dev/usb/if_ral.c ural_bbp_write(sc, 70, tmp);
tmp 1642 dev/usb/if_ral.c uint32_t tmp;
tmp 1645 dev/usb/if_ral.c tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
tmp 1646 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF1, tmp);
tmp 1649 dev/usb/if_ral.c tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
tmp 1650 dev/usb/if_ral.c ural_rf_write(sc, RAL_RF3, tmp);
tmp 1663 dev/usb/if_ral.c uint16_t logcwmin, preload, tmp;
tmp 1668 dev/usb/if_ral.c tmp = (16 * ic->ic_bss->ni_intval) << 4;
tmp 1669 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR18, tmp);
tmp 1673 dev/usb/if_ral.c tmp = logcwmin << 12 | preload;
tmp 1674 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR20, tmp);
tmp 1677 dev/usb/if_ral.c tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
tmp 1679 dev/usb/if_ral.c tmp |= RAL_ENABLE_TSF_SYNC(1);
tmp 1681 dev/usb/if_ral.c tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
tmp 1682 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR19, tmp);
tmp 1715 dev/usb/if_ral.c uint16_t tmp;
tmp 1717 dev/usb/if_ral.c tmp = ural_read(sc, RAL_TXRX_CSR10);
tmp 1719 dev/usb/if_ral.c tmp &= ~RAL_SHORT_PREAMBLE;
tmp 1721 dev/usb/if_ral.c tmp |= RAL_SHORT_PREAMBLE;
tmp 1723 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR10, tmp);
tmp 1744 dev/usb/if_ral.c uint16_t tmp;
tmp 1746 dev/usb/if_ral.c tmp = bssid[0] | bssid[1] << 8;
tmp 1747 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR5, tmp);
tmp 1749 dev/usb/if_ral.c tmp = bssid[2] | bssid[3] << 8;
tmp 1750 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR6, tmp);
tmp 1752 dev/usb/if_ral.c tmp = bssid[4] | bssid[5] << 8;
tmp 1753 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR7, tmp);
tmp 1761 dev/usb/if_ral.c uint16_t tmp;
tmp 1763 dev/usb/if_ral.c tmp = addr[0] | addr[1] << 8;
tmp 1764 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR2, tmp);
tmp 1766 dev/usb/if_ral.c tmp = addr[2] | addr[3] << 8;
tmp 1767 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR3, tmp);
tmp 1769 dev/usb/if_ral.c tmp = addr[4] | addr[5] << 8;
tmp 1770 dev/usb/if_ral.c ural_write(sc, RAL_MAC_CSR4, tmp);
tmp 1780 dev/usb/if_ral.c uint16_t tmp;
tmp 1782 dev/usb/if_ral.c tmp = ural_read(sc, RAL_TXRX_CSR2);
tmp 1784 dev/usb/if_ral.c tmp &= ~RAL_DROP_NOT_TO_ME;
tmp 1786 dev/usb/if_ral.c tmp |= RAL_DROP_NOT_TO_ME;
tmp 1788 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR2, tmp);
tmp 1875 dev/usb/if_ral.c uint16_t tmp;
tmp 1894 dev/usb/if_ral.c tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
tmp 1895 dev/usb/if_ral.c ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
tmp 1897 dev/usb/if_ral.c tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
tmp 1898 dev/usb/if_ral.c ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
tmp 1927 dev/usb/if_ral.c uint16_t tmp;
tmp 1939 dev/usb/if_ral.c tmp = ural_read(sc, RAL_MAC_CSR17);
tmp 1940 dev/usb/if_ral.c if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
tmp 2048 dev/usb/if_ral.c tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR;
tmp 2050 dev/usb/if_ral.c tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR;
tmp 2052 dev/usb/if_ral.c tmp |= RAL_DROP_TODS;
tmp 2054 dev/usb/if_ral.c tmp |= RAL_DROP_NOT_TO_ME;
tmp 2056 dev/usb/if_ral.c ural_write(sc, RAL_TXRX_CSR2, tmp);
tmp 274 dev/usb/if_rum.c uint32_t tmp;
tmp 332 dev/usb/if_rum.c if ((tmp = rum_read(sc, RT2573_MAC_CSR0)) != 0)
tmp 346 dev/usb/if_rum.c sc->sc_dev.dv_xname, sc->macbbp_rev, tmp,
tmp 644 dev/usb/if_rum.c uint32_t tmp;
tmp 652 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR9);
tmp 653 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR9, tmp & ~0x00ffffff);
tmp 1448 dev/usb/if_rum.c uint32_t tmp = htole32(val);
tmp 1450 dev/usb/if_rum.c rum_write_multi(sc, reg, &tmp, sizeof tmp);
tmp 1475 dev/usb/if_rum.c uint32_t tmp;
tmp 1487 dev/usb/if_rum.c tmp = RT2573_BBP_BUSY | (reg & 0x7f) << 8 | val;
tmp 1488 dev/usb/if_rum.c rum_write(sc, RT2573_PHY_CSR3, tmp);
tmp 1523 dev/usb/if_rum.c uint32_t tmp;
tmp 1535 dev/usb/if_rum.c tmp = RT2573_RF_BUSY | RT2573_RF_20BIT | (val & 0xfffff) << 2 |
tmp 1537 dev/usb/if_rum.c rum_write(sc, RT2573_PHY_CSR4, tmp);
tmp 1549 dev/usb/if_rum.c uint32_t tmp;
tmp 1557 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR0);
tmp 1558 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR0, tmp | RT2573_DISABLE_RX);
tmp 1563 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR0, tmp);
tmp 1574 dev/usb/if_rum.c uint32_t tmp;
tmp 1576 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR4);
tmp 1578 dev/usb/if_rum.c tmp &= ~RT2573_MRR_CCK_FALLBACK;
tmp 1580 dev/usb/if_rum.c tmp |= RT2573_MRR_CCK_FALLBACK;
tmp 1581 dev/usb/if_rum.c tmp |= RT2573_MRR_ENABLED;
tmp 1583 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR4, tmp);
tmp 1589 dev/usb/if_rum.c uint32_t tmp;
tmp 1591 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR4);
tmp 1593 dev/usb/if_rum.c tmp &= ~RT2573_SHORT_PREAMBLE;
tmp 1595 dev/usb/if_rum.c tmp |= RT2573_SHORT_PREAMBLE;
tmp 1597 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR4, tmp);
tmp 1626 dev/usb/if_rum.c uint32_t tmp;
tmp 1656 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_PHY_CSR0);
tmp 1657 dev/usb/if_rum.c tmp &= ~(RT2573_PA_PE_2GHZ | RT2573_PA_PE_5GHZ);
tmp 1659 dev/usb/if_rum.c tmp |= RT2573_PA_PE_2GHZ;
tmp 1661 dev/usb/if_rum.c tmp |= RT2573_PA_PE_5GHZ;
tmp 1662 dev/usb/if_rum.c rum_write(sc, RT2573_PHY_CSR0, tmp);
tmp 1745 dev/usb/if_rum.c uint32_t tmp;
tmp 1755 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR9) & 0xff000000;
tmp 1758 dev/usb/if_rum.c tmp |= ic->ic_bss->ni_intval * 16;
tmp 1760 dev/usb/if_rum.c tmp |= RT2573_TSF_TICKING | RT2573_ENABLE_TBTT;
tmp 1762 dev/usb/if_rum.c tmp |= RT2573_TSF_MODE(1);
tmp 1764 dev/usb/if_rum.c tmp |= RT2573_TSF_MODE(2) | RT2573_GENERATE_BEACON;
tmp 1766 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR9, tmp);
tmp 1774 dev/usb/if_rum.c uint32_t tmp;
tmp 1778 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_MAC_CSR9);
tmp 1779 dev/usb/if_rum.c tmp = (tmp & ~0xff) | slottime;
tmp 1780 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR9, tmp);
tmp 1788 dev/usb/if_rum.c uint32_t tmp;
tmp 1790 dev/usb/if_rum.c tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
tmp 1791 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR4, tmp);
tmp 1793 dev/usb/if_rum.c tmp = bssid[4] | bssid[5] << 8 | RT2573_ONE_BSSID << 16;
tmp 1794 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR5, tmp);
tmp 1800 dev/usb/if_rum.c uint32_t tmp;
tmp 1802 dev/usb/if_rum.c tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
tmp 1803 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR2, tmp);
tmp 1805 dev/usb/if_rum.c tmp = addr[4] | addr[5] << 8 | 0xff << 16;
tmp 1806 dev/usb/if_rum.c rum_write(sc, RT2573_MAC_CSR3, tmp);
tmp 1813 dev/usb/if_rum.c uint32_t tmp;
tmp 1815 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR0);
tmp 1817 dev/usb/if_rum.c tmp &= ~RT2573_DROP_NOT_TO_ME;
tmp 1819 dev/usb/if_rum.c tmp |= RT2573_DROP_NOT_TO_ME;
tmp 1821 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR0, tmp);
tmp 1954 dev/usb/if_rum.c uint32_t tmp;
tmp 2060 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR0) & 0xffff;
tmp 2062 dev/usb/if_rum.c tmp |= RT2573_DROP_PHY_ERROR | RT2573_DROP_CRC_ERROR;
tmp 2064 dev/usb/if_rum.c tmp |= RT2573_DROP_CTL | RT2573_DROP_VER_ERROR |
tmp 2067 dev/usb/if_rum.c tmp |= RT2573_DROP_TODS;
tmp 2069 dev/usb/if_rum.c tmp |= RT2573_DROP_NOT_TO_ME;
tmp 2071 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR0, tmp);
tmp 2093 dev/usb/if_rum.c uint32_t tmp;
tmp 2102 dev/usb/if_rum.c tmp = rum_read(sc, RT2573_TXRX_CSR0);
tmp 2103 dev/usb/if_rum.c rum_write(sc, RT2573_TXRX_CSR0, tmp | RT2573_DISABLE_RX);
tmp 1626 dev/usb/if_uath.c uint32_t tmp;
tmp 1638 dev/usb/if_uath.c error = uath_read_eeprom(sc, UATH_EEPROM_RXBUFSZ, &tmp);
tmp 1644 dev/usb/if_uath.c sc->rxbufsz = betoh32(tmp) & 0xfff;
tmp 815 dev/usb/if_zyd.c struct zyd_pair tmp;
tmp 819 dev/usb/if_zyd.c error = zyd_cmd(sc, ZYD_CMD_IORD, ®, sizeof reg, &tmp, sizeof tmp,
tmp 822 dev/usb/if_zyd.c *val = letoh16(tmp.val);
tmp 829 dev/usb/if_zyd.c struct zyd_pair tmp[2];
tmp 835 dev/usb/if_zyd.c error = zyd_cmd(sc, ZYD_CMD_IORD, regs, sizeof regs, tmp, sizeof tmp,
tmp 838 dev/usb/if_zyd.c *val = letoh16(tmp[0].val) << 16 | letoh16(tmp[1].val);
tmp 890 dev/usb/if_zyd.c uint32_t tmp;
tmp 892 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_MAC_MISC, &tmp);
tmp 893 dev/usb/if_zyd.c tmp &= ~ZYD_UNLOCK_PHY_REGS;
tmp 894 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_MISC, tmp);
tmp 900 dev/usb/if_zyd.c uint32_t tmp;
tmp 902 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_MAC_MISC, &tmp);
tmp 903 dev/usb/if_zyd.c tmp |= ZYD_UNLOCK_PHY_REGS;
tmp 904 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_MISC, tmp);
tmp 1151 dev/usb/if_zyd.c uint32_t tmp;
tmp 1168 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_CR_RADIO_PD, &tmp);
tmp 1169 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_RADIO_PD, tmp & ~1);
tmp 1170 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_RADIO_PD, tmp | 1);
tmp 1193 dev/usb/if_zyd.c uint32_t tmp;
tmp 1197 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_CR_RADIO_PD, &tmp);
tmp 1198 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_RADIO_PD, tmp & ~1);
tmp 1199 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_CR_RADIO_PD, tmp | 1);
tmp 1271 dev/usb/if_zyd.c uint16_t tmp;
tmp 1280 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
tmp 1281 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp & ~(1 << 4));
tmp 1288 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
tmp 1289 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp | (1 << 4));
tmp 1313 dev/usb/if_zyd.c uint16_t tmp;
tmp 1327 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
tmp 1328 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp & ~(1 << 4));
tmp 1339 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
tmp 1340 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp | (1 << 4));
tmp 1356 dev/usb/if_zyd.c uint16_t tmp;
tmp 1365 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
tmp 1366 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp & ~(1 << 4));
tmp 1373 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
tmp 1374 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp | (1 << 4));
tmp 1398 dev/usb/if_zyd.c uint16_t tmp;
tmp 1412 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
tmp 1413 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp & ~(1 << 4));
tmp 1424 dev/usb/if_zyd.c (void)zyd_read16(sc, ZYD_CR203, &tmp);
tmp 1425 dev/usb/if_zyd.c (void)zyd_write16(sc, ZYD_CR203, tmp | (1 << 4));
tmp 1591 dev/usb/if_zyd.c uint32_t tmp;
tmp 1596 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_EEPROM_MAC_ADDR_P1, &tmp);
tmp 1597 dev/usb/if_zyd.c ic->ic_myaddr[0] = tmp & 0xff;
tmp 1598 dev/usb/if_zyd.c ic->ic_myaddr[1] = tmp >> 8;
tmp 1599 dev/usb/if_zyd.c ic->ic_myaddr[2] = tmp >> 16;
tmp 1600 dev/usb/if_zyd.c ic->ic_myaddr[3] = tmp >> 24;
tmp 1601 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_EEPROM_MAC_ADDR_P2, &tmp);
tmp 1602 dev/usb/if_zyd.c ic->ic_myaddr[4] = tmp & 0xff;
tmp 1603 dev/usb/if_zyd.c ic->ic_myaddr[5] = tmp >> 8;
tmp 1605 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_EEPROM_POD, &tmp);
tmp 1606 dev/usb/if_zyd.c sc->rf_rev = tmp & 0x0f;
tmp 1607 dev/usb/if_zyd.c sc->pa_rev = (tmp >> 16) & 0x0f;
tmp 1610 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_EEPROM_SUBID, &tmp);
tmp 1611 dev/usb/if_zyd.c sc->regdomain = tmp >> 16;
tmp 1642 dev/usb/if_zyd.c uint32_t tmp;
tmp 1644 dev/usb/if_zyd.c tmp = addr[3] << 24 | addr[2] << 16 | addr[1] << 8 | addr[0];
tmp 1645 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_MACADRL, tmp);
tmp 1647 dev/usb/if_zyd.c tmp = addr[5] << 8 | addr[4];
tmp 1648 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_MACADRH, tmp);
tmp 1656 dev/usb/if_zyd.c uint32_t tmp;
tmp 1658 dev/usb/if_zyd.c tmp = addr[3] << 24 | addr[2] << 16 | addr[1] << 8 | addr[0];
tmp 1659 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_BSSADRL, tmp);
tmp 1661 dev/usb/if_zyd.c tmp = addr[5] << 8 | addr[4];
tmp 1662 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_BSSADRH, tmp);
tmp 1683 dev/usb/if_zyd.c uint32_t tmp;
tmp 1685 dev/usb/if_zyd.c (void)zyd_read32(sc, ZYD_MAC_TX_PE_CONTROL, &tmp);
tmp 1686 dev/usb/if_zyd.c tmp &= ~which;
tmp 1688 dev/usb/if_zyd.c tmp |= which;
tmp 1689 dev/usb/if_zyd.c (void)zyd_write32(sc, ZYD_MAC_TX_PE_CONTROL, tmp);
tmp 2420 dev/wscons/wsdisplay.c int tmp;
tmp 2438 dev/wscons/wsdisplay.c tmp = fg;
tmp 2440 dev/wscons/wsdisplay.c bg = tmp;
tmp 163 kern/kern_acct.c struct timeval ut, st, tmp;
tmp 198 kern/kern_acct.c getmicrotime(&tmp);
tmp 199 kern/kern_acct.c timersub(&tmp, &p->p_stats->p_start, &tmp);
tmp 200 kern/kern_acct.c acct.ac_etime = encode_comp_t(tmp.tv_sec, tmp.tv_usec);
tmp 204 kern/kern_acct.c timeradd(&ut, &st, &tmp);
tmp 205 kern/kern_acct.c t = tmp.tv_sec * hz + tmp.tv_usec / tick;
tmp 304 kern/kern_descrip.c int i, tmp, newmin, flg = F_POSIX;
tmp 357 kern/kern_descrip.c tmp = fp->f_flag & FNONBLOCK;
tmp 358 kern/kern_descrip.c error = (*fp->f_ops->fo_ioctl)(fp, FIONBIO, (caddr_t)&tmp, p);
tmp 361 kern/kern_descrip.c tmp = fp->f_flag & FASYNC;
tmp 362 kern/kern_descrip.c error = (*fp->f_ops->fo_ioctl)(fp, FIOASYNC, (caddr_t)&tmp, p);
tmp 366 kern/kern_descrip.c tmp = 0;
tmp 367 kern/kern_descrip.c (void) (*fp->f_ops->fo_ioctl)(fp, FIONBIO, (caddr_t)&tmp, p);
tmp 376 kern/kern_descrip.c (fp, TIOCGPGRP, (caddr_t)&tmp, p);
tmp 377 kern/kern_descrip.c *retval = -tmp;
tmp 138 kern/kern_subr.c char tmp = c;
tmp 140 kern/kern_subr.c if (copyout(&tmp, iov->iov_base, sizeof(char)) != 0)
tmp 315 kern/subr_pool.c struct pool_item_header *ph, tmp;
tmp 320 kern/subr_pool.c tmp.ph_page = page;
tmp 321 kern/subr_pool.c ph = SPLAY_FIND(phtree, &pp->pr_phtree, &tmp);
tmp 719 kern/subr_prf.c int tmp;
tmp 738 kern/subr_prf.c tmp = 0;
tmp 745 kern/subr_prf.c KPRINTF_PUTCHAR(tmp ? ',':'<');
tmp 751 kern/subr_prf.c tmp = 1;
tmp 758 kern/subr_prf.c if (tmp) {
tmp 491 kern/sys_generic.c int tmp;
tmp 545 kern/sys_generic.c if ((tmp = *(int *)data) != 0)
tmp 549 kern/sys_generic.c error = (*fp->f_ops->fo_ioctl)(fp, FIONBIO, (caddr_t)&tmp, p);
tmp 553 kern/sys_generic.c if ((tmp = *(int *)data) != 0)
tmp 557 kern/sys_generic.c error = (*fp->f_ops->fo_ioctl)(fp, FIOASYNC, (caddr_t)&tmp, p);
tmp 561 kern/sys_generic.c tmp = *(int *)data;
tmp 565 kern/sys_generic.c so->so_pgid = tmp;
tmp 571 kern/sys_generic.c if (tmp <= 0) {
tmp 572 kern/sys_generic.c tmp = -tmp;
tmp 574 kern/sys_generic.c struct proc *p1 = pfind(tmp);
tmp 579 kern/sys_generic.c tmp = p1->p_pgrp->pg_id;
tmp 582 kern/sys_generic.c (fp, TIOCSPGRP, (caddr_t)&tmp, p);
tmp 2049 kern/tty.c int tmp;
tmp 2055 kern/tty.c tmp = (averunnable.ldavg[0] * 100 + FSCALE / 2) >> FSHIFT;
tmp 2056 kern/tty.c ttyprintf(tp, "load: %d.%02d ", tmp / 100, tmp % 100);
tmp 2097 kern/tty.c tmp = (pick->p_pctcpu * 10000 + FSCALE / 2) >> FSHIFT;
tmp 2099 kern/tty.c tmp / 100,
tmp 479 kern/tty_subr.c struct clist tmp;
tmp 481 kern/tty_subr.c tmp = *from;
tmp 483 kern/tty_subr.c *to = tmp;
tmp 70 lib/libkern/qdivrem.c union uu tmp;
tmp 84 lib/libkern/qdivrem.c tmp.ul[H] = tmp.ul[L] = 1 / zero;
tmp 87 lib/libkern/qdivrem.c return (tmp.q);
tmp 111 lib/libkern/qdivrem.c tmp.uq = uq;
tmp 113 lib/libkern/qdivrem.c u[1] = (digit)HHALF(tmp.ul[H]);
tmp 114 lib/libkern/qdivrem.c u[2] = (digit)LHALF(tmp.ul[H]);
tmp 115 lib/libkern/qdivrem.c u[3] = (digit)HHALF(tmp.ul[L]);
tmp 116 lib/libkern/qdivrem.c u[4] = (digit)LHALF(tmp.ul[L]);
tmp 117 lib/libkern/qdivrem.c tmp.uq = vq;
tmp 118 lib/libkern/qdivrem.c v[1] = (digit)HHALF(tmp.ul[H]);
tmp 119 lib/libkern/qdivrem.c v[2] = (digit)LHALF(tmp.ul[H]);
tmp 120 lib/libkern/qdivrem.c v[3] = (digit)HHALF(tmp.ul[L]);
tmp 121 lib/libkern/qdivrem.c v[4] = (digit)LHALF(tmp.ul[L]);
tmp 145 lib/libkern/qdivrem.c tmp.ul[H] = COMBINE(q1, q2);
tmp 146 lib/libkern/qdivrem.c tmp.ul[L] = COMBINE(q3, q4);
tmp 147 lib/libkern/qdivrem.c return (tmp.q);
tmp 253 lib/libkern/qdivrem.c tmp.ul[H] = COMBINE(uspace[1], uspace[2]);
tmp 254 lib/libkern/qdivrem.c tmp.ul[L] = COMBINE(uspace[3], uspace[4]);
tmp 255 lib/libkern/qdivrem.c *arq = tmp.q;
tmp 258 lib/libkern/qdivrem.c tmp.ul[H] = COMBINE(qspace[1], qspace[2]);
tmp 259 lib/libkern/qdivrem.c tmp.ul[L] = COMBINE(qspace[3], qspace[4]);
tmp 260 lib/libkern/qdivrem.c return (tmp.q);
tmp 2283 net/pf.c u_int16_t tmp;
tmp 2286 net/pf.c tmp = low;
tmp 2288 net/pf.c high = tmp;
tmp 2293 net/pf.c for (tmp = cut; tmp <= high; ++(tmp)) {
tmp 2294 net/pf.c key.gwy.port = htons(tmp);
tmp 2297 net/pf.c *nport = htons(tmp);
tmp 2301 net/pf.c for (tmp = cut - 1; tmp >= low; --(tmp)) {
tmp 2302 net/pf.c key.gwy.port = htons(tmp);
tmp 2305 net/pf.c *nport = htons(tmp);
tmp 737 net/pf_if.c u_int32_t tmp;
tmp 744 net/pf_if.c tmp = ntohl(m->addr32[j]);
tmp 745 net/pf_if.c for (i = 31; tmp & (1 << i); --i)
tmp 78 net/pf_table.c type tmp = a1; \
tmp 80 net/pf_table.c a2 = tmp; \
tmp 280 netinet/ip6.h int tmp; \
tmp 284 netinet/ip6.h t = m_pulldown((m), (off), (len), &tmp); \
tmp 286 netinet/ip6.h if (t->m_len < tmp + (len)) \
tmp 288 netinet/ip6.h (val) = (typ)(mtod(t, caddr_t) + tmp); \
tmp 79 netinet/ip_id.c static u_int32_t tmp; /* Storage for unused random */
tmp 122 netinet/ip_id.c ru_x = ((tmp = arc4random()) & 0xFFFF) % RU_M;
tmp 125 netinet/ip_id.c ru_seed = (tmp >> 16) & 0x7FFF;
tmp 129 netinet/ip_id.c ru_b = ((tmp = arc4random()) & 0xfffe) | 1;
tmp 130 netinet/ip_id.c ru_a = pmod(RU_AGEN, (tmp >> 16) & 0xfffe, RU_M);
tmp 134 netinet/ip_id.c j = (tmp = arc4random()) % RU_N;
tmp 135 netinet/ip_id.c tmp = tmp >> 16;
tmp 170 netinet/ip_id.c if (!tmp)
tmp 171 netinet/ip_id.c tmp = arc4random();
tmp 174 netinet/ip_id.c n = tmp & 0x3; tmp = tmp >> 2;
tmp 2798 netinet/ip_mroute.c struct bw_meter *prev, *tmp;
tmp 2808 netinet/ip_mroute.c for (prev = NULL, tmp = bw_meter_timers[time_hash];
tmp 2809 netinet/ip_mroute.c tmp != NULL; prev = tmp, tmp = tmp->bm_time_next)
tmp 2810 netinet/ip_mroute.c if (tmp == x)
tmp 2813 netinet/ip_mroute.c if (tmp == NULL)
tmp 411 netinet6/in6_pcb.c struct sockaddr_in6 tmp;
tmp 431 netinet6/in6_pcb.c tmp = *sin6;
tmp 432 netinet6/in6_pcb.c sin6 = &tmp;
tmp 768 netinet6/raw_ip6.c struct sockaddr_in6 tmp;
tmp 778 netinet6/raw_ip6.c bzero(&tmp, sizeof(tmp));
tmp 779 netinet6/raw_ip6.c tmp.sin6_family = AF_INET6;
tmp 780 netinet6/raw_ip6.c tmp.sin6_len = sizeof(struct sockaddr_in6);
tmp 781 netinet6/raw_ip6.c bcopy(&in6p->in6p_faddr, &tmp.sin6_addr,
tmp 783 netinet6/raw_ip6.c dst = &tmp;
tmp 789 netinet6/raw_ip6.c if (nam->m_len != sizeof(tmp)) {
tmp 794 netinet6/raw_ip6.c tmp = *mtod(nam, struct sockaddr_in6 *);
tmp 795 netinet6/raw_ip6.c dst = &tmp;
tmp 131 netinet6/udp6_output.c struct sockaddr_in6 tmp;
tmp 175 netinet6/udp6_output.c tmp = *sin6;
tmp 176 netinet6/udp6_output.c sin6 = &tmp;
tmp 658 ntfs/ntfs_subr.c cn_t tmp;
tmp 683 ntfs/ntfs_subr.c tmp = ((u_int64_t) - 1) << (sz << 3);
tmp 685 ntfs/ntfs_subr.c tmp |= (u_int64_t) run[off++] << (i << 3);
tmp 687 ntfs/ntfs_subr.c tmp = 0;
tmp 689 ntfs/ntfs_subr.c tmp |= (u_int64_t) run[off++] << (i << 3);
tmp 691 ntfs/ntfs_subr.c if (tmp)
tmp 692 ntfs/ntfs_subr.c prev = cn[cnt] = prev + tmp;
tmp 694 ntfs/ntfs_subr.c cn[cnt] = tmp;
tmp 843 ntfs/ntfs_vfsops.c u_int8_t *tmp;
tmp 852 ntfs/ntfs_vfsops.c tmp = (u_int8_t *) malloc(bmsize, M_TEMP, M_WAITOK);
tmp 855 ntfs/ntfs_vfsops.c 0, bmsize, tmp, NULL);
tmp 861 ntfs/ntfs_vfsops.c if(~tmp[i] & (1 << j)) cfree++;
tmp 865 ntfs/ntfs_vfsops.c free(tmp, M_TEMP);
tmp 368 ntfs/ntfs_vnops.c size_t tmp;
tmp 383 ntfs/ntfs_vnops.c bp->b_data, &tmp, NULL);
tmp 744 scsi/cd.c u_long tmp;
tmp 746 scsi/cd.c tmp = lba + CD_BLOCK_OFFSET; /* offset of first logical frame */
tmp 747 scsi/cd.c tmp &= 0xffffff; /* negative lbas use only 24 bits */
tmp 748 scsi/cd.c *m = tmp / (CD_SECS * CD_FRAMES);
tmp 749 scsi/cd.c tmp %= (CD_SECS * CD_FRAMES);
tmp 750 scsi/cd.c *s = tmp / CD_FRAMES;
tmp 751 scsi/cd.c *f = tmp % CD_FRAMES;
tmp 81 sys/tree.h #define SPLAY_ROTATE_RIGHT(head, tmp, field) do { \
tmp 82 sys/tree.h SPLAY_LEFT((head)->sph_root, field) = SPLAY_RIGHT(tmp, field); \
tmp 83 sys/tree.h SPLAY_RIGHT(tmp, field) = (head)->sph_root; \
tmp 84 sys/tree.h (head)->sph_root = tmp; \
tmp 87 sys/tree.h #define SPLAY_ROTATE_LEFT(head, tmp, field) do { \
tmp 88 sys/tree.h SPLAY_RIGHT((head)->sph_root, field) = SPLAY_LEFT(tmp, field); \
tmp 89 sys/tree.h SPLAY_LEFT(tmp, field) = (head)->sph_root; \
tmp 90 sys/tree.h (head)->sph_root = tmp; \
tmp 93 sys/tree.h #define SPLAY_LINKLEFT(head, tmp, field) do { \
tmp 94 sys/tree.h SPLAY_LEFT(tmp, field) = (head)->sph_root; \
tmp 95 sys/tree.h tmp = (head)->sph_root; \
tmp 99 sys/tree.h #define SPLAY_LINKRIGHT(head, tmp, field) do { \
tmp 100 sys/tree.h SPLAY_RIGHT(tmp, field) = (head)->sph_root; \
tmp 101 sys/tree.h tmp = (head)->sph_root; \
tmp 335 sys/tree.h #define RB_ROTATE_LEFT(head, elm, tmp, field) do { \
tmp 336 sys/tree.h (tmp) = RB_RIGHT(elm, field); \
tmp 337 sys/tree.h if ((RB_RIGHT(elm, field) = RB_LEFT(tmp, field))) { \
tmp 338 sys/tree.h RB_PARENT(RB_LEFT(tmp, field), field) = (elm); \
tmp 341 sys/tree.h if ((RB_PARENT(tmp, field) = RB_PARENT(elm, field))) { \
tmp 343 sys/tree.h RB_LEFT(RB_PARENT(elm, field), field) = (tmp); \
tmp 345 sys/tree.h RB_RIGHT(RB_PARENT(elm, field), field) = (tmp); \
tmp 347 sys/tree.h (head)->rbh_root = (tmp); \
tmp 348 sys/tree.h RB_LEFT(tmp, field) = (elm); \
tmp 349 sys/tree.h RB_PARENT(elm, field) = (tmp); \
tmp 350 sys/tree.h RB_AUGMENT(tmp); \
tmp 351 sys/tree.h if ((RB_PARENT(tmp, field))) \
tmp 352 sys/tree.h RB_AUGMENT(RB_PARENT(tmp, field)); \
tmp 355 sys/tree.h #define RB_ROTATE_RIGHT(head, elm, tmp, field) do { \
tmp 356 sys/tree.h (tmp) = RB_LEFT(elm, field); \
tmp 357 sys/tree.h if ((RB_LEFT(elm, field) = RB_RIGHT(tmp, field))) { \
tmp 358 sys/tree.h RB_PARENT(RB_RIGHT(tmp, field), field) = (elm); \
tmp 361 sys/tree.h if ((RB_PARENT(tmp, field) = RB_PARENT(elm, field))) { \
tmp 363 sys/tree.h RB_LEFT(RB_PARENT(elm, field), field) = (tmp); \
tmp 365 sys/tree.h RB_RIGHT(RB_PARENT(elm, field), field) = (tmp); \
tmp 367 sys/tree.h (head)->rbh_root = (tmp); \
tmp 368 sys/tree.h RB_RIGHT(tmp, field) = (elm); \
tmp 369 sys/tree.h RB_PARENT(elm, field) = (tmp); \
tmp 370 sys/tree.h RB_AUGMENT(tmp); \
tmp 371 sys/tree.h if ((RB_PARENT(tmp, field))) \
tmp 372 sys/tree.h RB_AUGMENT(RB_PARENT(tmp, field)); \
tmp 393 sys/tree.h struct type *parent, *gparent, *tmp; \
tmp 398 sys/tree.h tmp = RB_RIGHT(gparent, field); \
tmp 399 sys/tree.h if (tmp && RB_COLOR(tmp, field) == RB_RED) { \
tmp 400 sys/tree.h RB_COLOR(tmp, field) = RB_BLACK; \
tmp 406 sys/tree.h RB_ROTATE_LEFT(head, parent, tmp, field);\
tmp 407 sys/tree.h tmp = parent; \
tmp 409 sys/tree.h elm = tmp; \
tmp 412 sys/tree.h RB_ROTATE_RIGHT(head, gparent, tmp, field); \
tmp 414 sys/tree.h tmp = RB_LEFT(gparent, field); \
tmp 415 sys/tree.h if (tmp && RB_COLOR(tmp, field) == RB_RED) { \
tmp 416 sys/tree.h RB_COLOR(tmp, field) = RB_BLACK; \
tmp 422 sys/tree.h RB_ROTATE_RIGHT(head, parent, tmp, field);\
tmp 423 sys/tree.h tmp = parent; \
tmp 425 sys/tree.h elm = tmp; \
tmp 428 sys/tree.h RB_ROTATE_LEFT(head, gparent, tmp, field); \
tmp 437 sys/tree.h struct type *tmp; \
tmp 441 sys/tree.h tmp = RB_RIGHT(parent, field); \
tmp 442 sys/tree.h if (RB_COLOR(tmp, field) == RB_RED) { \
tmp 443 sys/tree.h RB_SET_BLACKRED(tmp, parent, field); \
tmp 444 sys/tree.h RB_ROTATE_LEFT(head, parent, tmp, field);\
tmp 445 sys/tree.h tmp = RB_RIGHT(parent, field); \
tmp 447 sys/tree.h if ((RB_LEFT(tmp, field) == NULL || \
tmp 448 sys/tree.h RB_COLOR(RB_LEFT(tmp, field), field) == RB_BLACK) &&\
tmp 449 sys/tree.h (RB_RIGHT(tmp, field) == NULL || \
tmp 450 sys/tree.h RB_COLOR(RB_RIGHT(tmp, field), field) == RB_BLACK)) {\
tmp 451 sys/tree.h RB_COLOR(tmp, field) = RB_RED; \
tmp 455 sys/tree.h if (RB_RIGHT(tmp, field) == NULL || \
tmp 456 sys/tree.h RB_COLOR(RB_RIGHT(tmp, field), field) == RB_BLACK) {\
tmp 458 sys/tree.h if ((oleft = RB_LEFT(tmp, field)))\
tmp 460 sys/tree.h RB_COLOR(tmp, field) = RB_RED; \
tmp 461 sys/tree.h RB_ROTATE_RIGHT(head, tmp, oleft, field);\
tmp 462 sys/tree.h tmp = RB_RIGHT(parent, field); \
tmp 464 sys/tree.h RB_COLOR(tmp, field) = RB_COLOR(parent, field);\
tmp 466 sys/tree.h if (RB_RIGHT(tmp, field)) \
tmp 467 sys/tree.h RB_COLOR(RB_RIGHT(tmp, field), field) = RB_BLACK;\
tmp 468 sys/tree.h RB_ROTATE_LEFT(head, parent, tmp, field);\
tmp 473 sys/tree.h tmp = RB_LEFT(parent, field); \
tmp 474 sys/tree.h if (RB_COLOR(tmp, field) == RB_RED) { \
tmp 475 sys/tree.h RB_SET_BLACKRED(tmp, parent, field); \
tmp 476 sys/tree.h RB_ROTATE_RIGHT(head, parent, tmp, field);\
tmp 477 sys/tree.h tmp = RB_LEFT(parent, field); \
tmp 479 sys/tree.h if ((RB_LEFT(tmp, field) == NULL || \
tmp 480 sys/tree.h RB_COLOR(RB_LEFT(tmp, field), field) == RB_BLACK) &&\
tmp 481 sys/tree.h (RB_RIGHT(tmp, field) == NULL || \
tmp 482 sys/tree.h RB_COLOR(RB_RIGHT(tmp, field), field) == RB_BLACK)) {\
tmp 483 sys/tree.h RB_COLOR(tmp, field) = RB_RED; \
tmp 487 sys/tree.h if (RB_LEFT(tmp, field) == NULL || \
tmp 488 sys/tree.h RB_COLOR(RB_LEFT(tmp, field), field) == RB_BLACK) {\
tmp 490 sys/tree.h if ((oright = RB_RIGHT(tmp, field)))\
tmp 492 sys/tree.h RB_COLOR(tmp, field) = RB_RED; \
tmp 493 sys/tree.h RB_ROTATE_LEFT(head, tmp, oright, field);\
tmp 494 sys/tree.h tmp = RB_LEFT(parent, field); \
tmp 496 sys/tree.h RB_COLOR(tmp, field) = RB_COLOR(parent, field);\
tmp 498 sys/tree.h if (RB_LEFT(tmp, field)) \
tmp 499 sys/tree.h RB_COLOR(RB_LEFT(tmp, field), field) = RB_BLACK;\
tmp 500 sys/tree.h RB_ROTATE_RIGHT(head, parent, tmp, field);\
tmp 581 sys/tree.h struct type *tmp; \
tmp 584 sys/tree.h tmp = RB_ROOT(head); \
tmp 585 sys/tree.h while (tmp) { \
tmp 586 sys/tree.h parent = tmp; \
tmp 589 sys/tree.h tmp = RB_LEFT(tmp, field); \
tmp 591 sys/tree.h tmp = RB_RIGHT(tmp, field); \
tmp 593 sys/tree.h return (tmp); \
tmp 612 sys/tree.h struct type *tmp = RB_ROOT(head); \
tmp 614 sys/tree.h while (tmp) { \
tmp 615 sys/tree.h comp = cmp(elm, tmp); \
tmp 617 sys/tree.h tmp = RB_LEFT(tmp, field); \
tmp 619 sys/tree.h tmp = RB_RIGHT(tmp, field); \
tmp 621 sys/tree.h return (tmp); \
tmp 650 sys/tree.h struct type *tmp = RB_ROOT(head); \
tmp 652 sys/tree.h while (tmp) { \
tmp 653 sys/tree.h parent = tmp; \
tmp 655 sys/tree.h tmp = RB_LEFT(tmp, field); \
tmp 657 sys/tree.h tmp = RB_RIGHT(tmp, field); \
tmp 59 ufs/ext2fs/ext2fs_subr.c union _qcvt tmp; \
tmp 60 ufs/ext2fs/ext2fs_subr.c tmp.qcvt = (q); \
tmp 61 ufs/ext2fs/ext2fs_subr.c tmp.val[_QUAD_HIGHWORD] = (h); \
tmp 62 ufs/ext2fs/ext2fs_subr.c (q) = tmp.qcvt; \
tmp 66 ufs/ext2fs/ext2fs_subr.c union _qcvt tmp; \
tmp 67 ufs/ext2fs/ext2fs_subr.c tmp.qcvt = (q); \
tmp 68 ufs/ext2fs/ext2fs_subr.c tmp.val[_QUAD_LOWWORD] = (l); \
tmp 69 ufs/ext2fs/ext2fs_subr.c (q) = tmp.qcvt; \
tmp 1462 ufs/ffs/ffs_vfsops.c int32_t *lp, tmp; /* XXX */
tmp 1465 ufs/ffs/ffs_vfsops.c tmp = lp[4]; /* XXX */
tmp 1468 ufs/ffs/ffs_vfsops.c lp[0] = tmp; /* XXX */
tmp 680 ufs/ufs/ufs_lookup.c { u_char tmp = newdirp->d_namlen;
tmp 682 ufs/ufs/ufs_lookup.c newdirp->d_type = tmp; }
tmp 87 ufs/ufs/ufs_vnops.c union _qcvt tmp; \
tmp 88 ufs/ufs/ufs_vnops.c tmp.qcvt = (q); \
tmp 89 ufs/ufs/ufs_vnops.c tmp.val[_QUAD_HIGHWORD] = (h); \
tmp 90 ufs/ufs/ufs_vnops.c (q) = tmp.qcvt; \
tmp 93 ufs/ufs/ufs_vnops.c union _qcvt tmp; \
tmp 94 ufs/ufs/ufs_vnops.c tmp.qcvt = (q); \
tmp 95 ufs/ufs/ufs_vnops.c tmp.val[_QUAD_LOWWORD] = (l); \
tmp 96 ufs/ufs/ufs_vnops.c (q) = tmp.qcvt; \
tmp 1405 ufs/ufs/ufs_vnops.c u_char tmp;
tmp 1419 ufs/ufs/ufs_vnops.c tmp = dp->d_namlen;
tmp 1421 ufs/ufs/ufs_vnops.c dp->d_type = tmp;
tmp 259 uvm/uvm_map.c vaddr_t space, tmp;
tmp 263 uvm/uvm_map.c tmp = RB_LEFT(entry, rb_entry)->space;
tmp 264 uvm/uvm_map.c if (tmp > space)
tmp 265 uvm/uvm_map.c space = tmp;
tmp 269 uvm/uvm_map.c tmp = RB_RIGHT(entry, rb_entry)->space;
tmp 270 uvm/uvm_map.c if (tmp > space)
tmp 271 uvm/uvm_map.c space = tmp;
tmp 291 uvm/uvm_map.c struct vm_map_entry *tmp;
tmp 294 uvm/uvm_map.c tmp = RB_INSERT(uvm_tree, &(map)->rbhead, entry);
tmp 296 uvm/uvm_map.c if (tmp != NULL)
tmp 327 uvm/uvm_map.c struct vm_map_entry *tmp, *trtmp;
tmp 330 uvm/uvm_map.c RB_FOREACH(tmp, uvm_tree, &map->rbhead) {
tmp 331 uvm/uvm_map.c if (tmp->ownspace != uvm_rb_space(map, tmp)) {
tmp 334 uvm/uvm_map.c tmp->ownspace, uvm_rb_space(map, tmp),
tmp 335 uvm/uvm_map.c tmp->next == &map->header ? "(last)" : "");
tmp 340 uvm/uvm_map.c RB_FOREACH(tmp, uvm_tree, &map->rbhead) {
tmp 341 uvm/uvm_map.c if (tmp->space != uvm_rb_subtree_space(tmp)) {
tmp 343 uvm/uvm_map.c name, tmp->space, uvm_rb_subtree_space(tmp));
tmp 346 uvm/uvm_map.c if (trtmp != NULL && trtmp->start >= tmp->start) {
tmp 348 uvm/uvm_map.c name, trtmp->start, tmp->start);
tmp 353 uvm/uvm_map.c trtmp = tmp;
tmp 362 uvm/uvm_map.c for (tmp = map->header.next; tmp && tmp != &map->header;
tmp 363 uvm/uvm_map.c tmp = tmp->next, i++) {
tmp 364 uvm/uvm_map.c trtmp = RB_FIND(uvm_tree, &map->rbhead, tmp);
tmp 365 uvm/uvm_map.c if (trtmp != tmp) {
tmp 367 uvm/uvm_map.c name, i, tmp, trtmp,
tmp 368 uvm/uvm_map.c RB_PARENT(tmp, rb_entry));
tmp 1149 uvm/uvm_map.c struct vm_map_entry *entry, *next, *tmp;
tmp 1192 uvm/uvm_map.c if (uvm_map_lookup_entry(map, hint, &tmp)) {
tmp 1199 uvm/uvm_map.c hint = tmp->end;
tmp 1201 uvm/uvm_map.c entry = tmp;
tmp 1224 uvm/uvm_map.c tmp = RB_ROOT(&map->rbhead);
tmp 1225 uvm/uvm_map.c if (tmp == NULL || tmp->space < length)
tmp 1229 uvm/uvm_map.c for (; tmp;) {
tmp 1230 uvm/uvm_map.c if (tmp->end >= hint &&
tmp 1231 uvm/uvm_map.c (prev == NULL || tmp->end < prev->end)) {
tmp 1232 uvm/uvm_map.c if (tmp->ownspace >= length)
tmp 1233 uvm/uvm_map.c prev = tmp;
tmp 1234 uvm/uvm_map.c else if ((child = RB_RIGHT(tmp, rb_entry)) != NULL &&
tmp 1236 uvm/uvm_map.c prev = tmp;
tmp 1238 uvm/uvm_map.c if (tmp->end < hint)
tmp 1239 uvm/uvm_map.c child = RB_RIGHT(tmp, rb_entry);
tmp 1240 uvm/uvm_map.c else if (tmp->end > hint)
tmp 1241 uvm/uvm_map.c child = RB_LEFT(tmp, rb_entry);
tmp 1243 uvm/uvm_map.c if (tmp->ownspace >= length)
tmp 1245 uvm/uvm_map.c child = RB_RIGHT(tmp, rb_entry);
tmp 1249 uvm/uvm_map.c tmp = child;
tmp 1252 uvm/uvm_map.c if (tmp != NULL && hint < tmp->end + tmp->ownspace) {
tmp 1257 uvm/uvm_map.c if (hint < tmp->end)
tmp 1258 uvm/uvm_map.c hint = tmp->end;
tmp 1259 uvm/uvm_map.c if (uvm_map_spacefits(map, &hint, length, tmp->next, uoffset,
tmp 1261 uvm/uvm_map.c entry = tmp;
tmp 1263 uvm/uvm_map.c } else if (tmp->ownspace >= length)
tmp 1277 uvm/uvm_map.c tmp = RB_RIGHT(prev, rb_entry);
tmp 1279 uvm/uvm_map.c KASSERT(tmp && tmp->space >= length);
tmp 1280 uvm/uvm_map.c child = RB_LEFT(tmp, rb_entry);
tmp 1282 uvm/uvm_map.c tmp = child;
tmp 1285 uvm/uvm_map.c if (tmp->ownspace >= length)
tmp 1287 uvm/uvm_map.c tmp = RB_RIGHT(tmp, rb_entry);
tmp 1290 uvm/uvm_map.c hint = tmp->end;
tmp 1291 uvm/uvm_map.c if (uvm_map_spacefits(map, &hint, length, tmp->next, uoffset, align)) {
tmp 1292 uvm/uvm_map.c entry = tmp;
tmp 1731 uvm/uvm_map.c struct vm_map_entry *tmp;
tmp 1733 uvm/uvm_map.c tmp = newents;
tmp 1734 uvm/uvm_map.c for (i = 0; i < nnewents && tmp; i++) {
tmp 1735 uvm/uvm_map.c uvm_rb_insert(map, tmp);
tmp 1736 uvm/uvm_map.c tmp = tmp->next;