EN_READ 685 dev/ic/midway.c reg = EN_READ(sc, check);
EN_READ 711 dev/ic/midway.c reg = EN_READ(sc, MID_RESID);
EN_READ 968 dev/ic/midway.c sc->drq_chip = MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX));
EN_READ 969 dev/ic/midway.c sc->dtq_chip = MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX));
EN_READ 1007 dev/ic/midway.c while (EN_READ(sc, MID_DMA_RDTX) == MID_DTQ_A2REG(sc->dtq_chip)) {
EN_READ 1016 dev/ic/midway.c reg = EN_READ(sc, MID_INTACK);
EN_READ 1033 dev/ic/midway.c while (EN_READ(sc, MID_DMA_RDRX) == MID_DRQ_A2REG(sc->drq_chip)) {
EN_READ 1042 dev/ic/midway.c reg = EN_READ(sc, MID_INTACK);
EN_READ 1242 dev/ic/midway.c oldmode = EN_READ(sc, MID_VC(vci));
EN_READ 1399 dev/ic/midway.c sc->drq_chip = MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX));
EN_READ 1406 dev/ic/midway.c sc->dtq_chip = MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX));
EN_READ 1411 dev/ic/midway.c sc->hwslistp = MID_SL_REG2A(EN_READ(sc, MID_SERV_WRITE));
EN_READ 1431 dev/ic/midway.c EN_READ(sc, MIDX_PLACE(slot)));
EN_READ 1459 dev/ic/midway.c u_int32_t reg = EN_READ(sc, MID_VC(vc));
EN_READ 2026 dev/ic/midway.c count = EN_READ(sc, MIDX_PLACE(chan));
EN_READ 2028 dev/ic/midway.c MIDX_BASE(count), MIDX_SZ(count), EN_READ(sc, MIDX_READPTR(chan)),
EN_READ 2029 dev/ic/midway.c EN_READ(sc, MIDX_DESCSTART(chan)));
EN_READ 2348 dev/ic/midway.c reg = EN_READ(sc, MID_INTACK);
EN_READ 2391 dev/ic/midway.c val = EN_READ(sc, MIDX_READPTR(lcv)); /* current read pointer */
EN_READ 2413 dev/ic/midway.c val = EN_READ(sc, MID_DMA_RDTX); /* chip's current location */
EN_READ 2468 dev/ic/midway.c val = EN_READ(sc, MID_DMA_RDRX); /* chip's current location */
EN_READ 2491 dev/ic/midway.c (EN_READ(sc, MID_VC(vci)) & MIDV_INSERVICE) == 0 &&
EN_READ 2539 dev/ic/midway.c chip = MID_SL_REG2A(EN_READ(sc, MID_SERV_WRITE));
EN_READ 2544 dev/ic/midway.c vci = EN_READ(sc, sc->hwslistp);
EN_READ 2594 dev/ic/midway.c reg = EN_READ(sc, MID_STAT);
EN_READ 2666 dev/ic/midway.c dstart = MIDV_DSTART(EN_READ(sc, MID_DST_RP(vci)));
EN_READ 2705 dev/ic/midway.c rbd = EN_READ(sc, cur);
EN_READ 2721 dev/ic/midway.c pdu = EN_READ(sc, pdu); /* get PDU in correct byte order */
EN_READ 3093 dev/ic/midway.c printf("resid = 0x%x\n", EN_READ(sc, MID_RESID));
EN_READ 3095 dev/ic/midway.c EN_READ(sc, MID_INTSTAT), MID_INTBITS);
EN_READ 3097 dev/ic/midway.c EN_READ(sc, MID_INTENA), MID_INTBITS);
EN_READ 3098 dev/ic/midway.c printf("mcsr = 0x%b\n", EN_READ(sc, MID_MAST_CSR), MID_MCSRBITS);
EN_READ 3099 dev/ic/midway.c printf("serv_write = [chip=%d] [us=%d]\n", EN_READ(sc, MID_SERV_WRITE),
EN_READ 3101 dev/ic/midway.c printf("dma addr = 0x%x\n", EN_READ(sc, MID_DMA_ADDR));
EN_READ 3103 dev/ic/midway.c MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX)),
EN_READ 3104 dev/ic/midway.c MID_DRQ_REG2A(EN_READ(sc, MID_DMA_WRRX)), sc->drq_chip, sc->drq_us);
EN_READ 3106 dev/ic/midway.c MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX)),
EN_READ 3107 dev/ic/midway.c MID_DTQ_REG2A(EN_READ(sc, MID_DMA_WRTX)), sc->dtq_chip, sc->dtq_us);
EN_READ 3132 dev/ic/midway.c MIDX_BASE(EN_READ(sc, MIDX_PLACE(slot))),
EN_READ 3133 dev/ic/midway.c MIDX_SZ(EN_READ(sc, MIDX_PLACE(slot))),
EN_READ 3134 dev/ic/midway.c EN_READ(sc, MIDX_READPTR(slot)), EN_READ(sc, MIDX_DESCSTART(slot)));
EN_READ 3148 dev/ic/midway.c EN_READ(sc, MID_VC(sc->rxslot[slot].atm_vci)),
EN_READ 3149 dev/ic/midway.c EN_READ(sc, MID_DST_RP(sc->rxslot[slot].atm_vci)),
EN_READ 3150 dev/ic/midway.c EN_READ(sc, MID_WP_ST_CNT(sc->rxslot[slot].atm_vci)));
EN_READ 3159 dev/ic/midway.c reg = EN_READ(sc, ptr);
EN_READ 3162 dev/ic/midway.c (reg & MID_DMA_END) != 0, MID_DMA_TYPE(reg), EN_READ(sc, ptr+4));
EN_READ 3172 dev/ic/midway.c reg = EN_READ(sc, ptr);
EN_READ 3175 dev/ic/midway.c (reg & MID_DMA_END) != 0, MID_DMA_TYPE(reg), EN_READ(sc, ptr+4));
EN_READ 3216 dev/ic/midway.c reg = EN_READ(sc, addr);