tx 995 arch/i386/i386/esm.c u_int8_t *tx = (u_int8_t *)cmd;
tx 1010 arch/i386/i386/esm.c DPRINTFN(2, "write: %.2x\n", *tx);
tx 1011 arch/i386/i386/esm.c EDATAWR(sc, *tx);
tx 1012 arch/i386/i386/esm.c tx++;
tx 1125 dev/ic/ar5210.c desc->ds_us.tx.ts_tstamp =
tx 1128 dev/ic/ar5210.c desc->ds_us.tx.ts_shortretry =
tx 1131 dev/ic/ar5210.c desc->ds_us.tx.ts_longretry =
tx 1134 dev/ic/ar5210.c desc->ds_us.tx.ts_seqnum =
tx 1137 dev/ic/ar5210.c desc->ds_us.tx.ts_rssi =
tx 1140 dev/ic/ar5210.c desc->ds_us.tx.ts_antenna = 1;
tx 1141 dev/ic/ar5210.c desc->ds_us.tx.ts_status = 0;
tx 1142 dev/ic/ar5210.c desc->ds_us.tx.ts_rate =
tx 1150 dev/ic/ar5210.c desc->ds_us.tx.ts_status |= HAL_TXERR_XRETRY;
tx 1154 dev/ic/ar5210.c desc->ds_us.tx.ts_status |= HAL_TXERR_FIFO;
tx 1158 dev/ic/ar5210.c desc->ds_us.tx.ts_status |= HAL_TXERR_FILT;
tx 1232 dev/ic/ar5211.c desc->ds_us.tx.ts_tstamp =
tx 1235 dev/ic/ar5211.c desc->ds_us.tx.ts_shortretry =
tx 1238 dev/ic/ar5211.c desc->ds_us.tx.ts_longretry =
tx 1241 dev/ic/ar5211.c desc->ds_us.tx.ts_seqnum =
tx 1244 dev/ic/ar5211.c desc->ds_us.tx.ts_rssi =
tx 1247 dev/ic/ar5211.c desc->ds_us.tx.ts_antenna = 1;
tx 1248 dev/ic/ar5211.c desc->ds_us.tx.ts_status = 0;
tx 1249 dev/ic/ar5211.c desc->ds_us.tx.ts_rate =
tx 1257 dev/ic/ar5211.c desc->ds_us.tx.ts_status |= HAL_TXERR_XRETRY;
tx 1261 dev/ic/ar5211.c desc->ds_us.tx.ts_status |= HAL_TXERR_FIFO;
tx 1265 dev/ic/ar5211.c desc->ds_us.tx.ts_status |= HAL_TXERR_FILT;
tx 1433 dev/ic/ar5212.c desc->ds_us.tx.ts_tstamp =
tx 1436 dev/ic/ar5212.c desc->ds_us.tx.ts_shortretry =
tx 1439 dev/ic/ar5212.c desc->ds_us.tx.ts_longretry =
tx 1442 dev/ic/ar5212.c desc->ds_us.tx.ts_seqnum =
tx 1445 dev/ic/ar5212.c desc->ds_us.tx.ts_rssi =
tx 1448 dev/ic/ar5212.c desc->ds_us.tx.ts_antenna = (tx_status->tx_status_1 &
tx 1450 dev/ic/ar5212.c desc->ds_us.tx.ts_status = 0;
tx 1455 dev/ic/ar5212.c desc->ds_us.tx.ts_rate = tx_desc->tx_control_3 &
tx 1459 dev/ic/ar5212.c desc->ds_us.tx.ts_rate =
tx 1462 dev/ic/ar5212.c desc->ds_us.tx.ts_longretry +=
tx 1467 dev/ic/ar5212.c desc->ds_us.tx.ts_rate =
tx 1470 dev/ic/ar5212.c desc->ds_us.tx.ts_longretry +=
tx 1475 dev/ic/ar5212.c desc->ds_us.tx.ts_rate =
tx 1478 dev/ic/ar5212.c desc->ds_us.tx.ts_longretry +=
tx 1488 dev/ic/ar5212.c desc->ds_us.tx.ts_status |= HAL_TXERR_XRETRY;
tx 1492 dev/ic/ar5212.c desc->ds_us.tx.ts_status |= HAL_TXERR_FIFO;
tx 1496 dev/ic/ar5212.c desc->ds_us.tx.ts_status |= HAL_TXERR_FILT;
tx 917 dev/ic/ar5xxx.h struct ath_tx_status tx;
tx 921 dev/ic/ar5xxx.h #define ds_txstat ds_us.tx
tx 541 dev/ic/midway.c STATIC INLINE int en_dqneed(sc, data, len, tx)
tx 545 dev/ic/midway.c u_int len, tx;
tx 560 dev/ic/midway.c if (!tx) /* XXX: conservative */
tx 564 dev/ic/midway.c if (tx) { /* byte burst? */
tx 592 dev/ic/midway.c if (tx && (len % sizeof(u_int32_t)) != 0)
tx 828 dev/ic/pdq.c pdq_tx_info_t *tx = &pdq->pdq_tx_info;
tx 830 dev/ic/pdq.c pdq_uint32_t producer = tx->tx_producer;
tx 835 dev/ic/pdq.c if (tx->tx_free < 1)
tx 838 dev/ic/pdq.c dbp->pdqdb_transmits[producer] = tx->tx_hdrdesc;
tx 841 dev/ic/pdq.c for (freecnt = tx->tx_free - 1, pdu0 = pdu; pdu0 != NULL && freecnt > 0;) {
tx 882 dev/ic/pdq.c tx->tx_descriptor_count[tx->tx_producer] = tx->tx_free - freecnt;
tx 884 dev/ic/pdq.c PDQ_OS_DATABUF_ENQUEUE(&tx->tx_txq, pdu);
tx 885 dev/ic/pdq.c tx->tx_producer = producer;
tx 886 dev/ic/pdq.c tx->tx_free = freecnt;
tx 895 dev/ic/pdq.c pdq_tx_info_t *tx = &pdq->pdq_tx_info;
tx 898 dev/ic/pdq.c pdq_uint32_t completion = tx->tx_completion;
tx 902 dev/ic/pdq.c pdq_uint32_t descriptor_count = tx->tx_descriptor_count[completion];
tx 905 dev/ic/pdq.c PDQ_OS_DATABUF_DEQUEUE(&tx->tx_txq, pdu);
tx 907 dev/ic/pdq.c tx->tx_free += descriptor_count;
tx 911 dev/ic/pdq.c if (tx->tx_completion != completion) {
tx 912 dev/ic/pdq.c tx->tx_completion = completion;
tx 923 dev/ic/pdq.c pdq_tx_info_t *tx = &pdq->pdq_tx_info;
tx 927 dev/ic/pdq.c PDQ_OS_DATABUF_DEQUEUE(&tx->tx_txq, pdu);
tx 937 dev/ic/pdq.c tx->tx_free = PDQ_RING_MASK(pdq->pdq_dbp->pdqdb_transmits);
tx 938 dev/ic/pdq.c tx->tx_completion = cbp->pdqcb_transmits = tx->tx_producer;
tx 131 dev/ic/pdq_ifsubr.c int tx = 0;
tx 143 dev/ic/pdq_ifsubr.c for (;; tx = 1) {
tx 155 dev/ic/pdq_ifsubr.c if (tx)
tx 687 dev/ic/rlnsubr.c rln_msg_txrx(sc, tx, txlen, rx, rxlen)
tx 689 dev/ic/rlnsubr.c void * tx;
tx 694 dev/ic/rlnsubr.c struct rln_mm_cmd * txc = (struct rln_mm_cmd *)tx;
tx 712 dev/ic/rlnsubr.c RLNDUMPHEX((char *)tx + sizeof *txc, txlen - sizeof *txc);
tx 722 dev/ic/rlnsubr.c if ((ret = rln_msg_tx_start(sc, tx, txlen, &state))) {
tx 729 dev/ic/rlnsubr.c rln_msg_tx_data(sc, tx, (txlen + 1) & ~1, &state);
tx 2461 dev/ic/rt2560.c uint8_t tx;
tx 2463 dev/ic/rt2560.c tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK;
tx 2465 dev/ic/rt2560.c tx |= RT2560_BBP_ANTA;
tx 2467 dev/ic/rt2560.c tx |= RT2560_BBP_ANTB;
tx 2469 dev/ic/rt2560.c tx |= RT2560_BBP_DIVERSITY;
tx 2474 dev/ic/rt2560.c tx |= RT2560_BBP_FLIPIQ;
tx 2476 dev/ic/rt2560.c rt2560_bbp_write(sc, RT2560_BBP_TX, tx);
tx 2480 dev/ic/rt2560.c tmp |= (tx & 0x7) << 16 | (tx & 0x7);
tx 956 dev/pci/if_vic.c int tx = 0;
tx 1039 dev/pci/if_vic.c tx = 1;
tx 1045 dev/pci/if_vic.c if (tx)
tx 1564 dev/pci/if_wpi.c struct wpi_cmd_data *tx;
tx 1616 dev/pci/if_wpi.c tx = (struct wpi_cmd_data *)cmd->data;
tx 1618 dev/pci/if_wpi.c tx->flags = 0;
tx 1624 dev/pci/if_wpi.c tx->security = WPI_CIPHER_WEP40;
tx 1626 dev/pci/if_wpi.c tx->security = WPI_CIPHER_WEP104;
tx 1627 dev/pci/if_wpi.c tx->security |= ic->ic_wep_txkey << 6;
tx 1628 dev/pci/if_wpi.c memcpy(&tx->key[3], key->k_key, key->k_len);
tx 1632 dev/pci/if_wpi.c tx->security = 0;
tx 1635 dev/pci/if_wpi.c tx->id = WPI_ID_BSS;
tx 1636 dev/pci/if_wpi.c tx->flags |= htole32(WPI_TX_NEED_ACK);
tx 1638 dev/pci/if_wpi.c tx->id = WPI_ID_BROADCAST;
tx 1645 dev/pci/if_wpi.c tx->flags |= htole32(WPI_TX_NEED_RTS |
tx 1650 dev/pci/if_wpi.c tx->flags |= htole32(WPI_TX_NEED_CTS |
tx 1653 dev/pci/if_wpi.c tx->flags |= htole32(WPI_TX_NEED_RTS |
tx 1659 dev/pci/if_wpi.c tx->flags |= htole32(WPI_TX_AUTO_SEQ);
tx 1667 dev/pci/if_wpi.c tx->flags |= htole32(WPI_TX_INSERT_TSTAMP);
tx 1671 dev/pci/if_wpi.c tx->timeout = htole16(3);
tx 1673 dev/pci/if_wpi.c tx->timeout = htole16(2);
tx 1675 dev/pci/if_wpi.c tx->timeout = htole16(0);
tx 1677 dev/pci/if_wpi.c tx->rate = wpi_plcp_signal(rate);
tx 1680 dev/pci/if_wpi.c tx->rts_ntries = 7;
tx 1681 dev/pci/if_wpi.c tx->data_ntries = 15;
tx 1683 dev/pci/if_wpi.c tx->ofdm_mask = 0xff;
tx 1684 dev/pci/if_wpi.c tx->cck_mask = 0x0f;
tx 1685 dev/pci/if_wpi.c tx->lifetime = htole32(WPI_LIFETIME_INFINITE);
tx 1687 dev/pci/if_wpi.c tx->len = htole16(m0->m_pkthdr.len);
tx 1690 dev/pci/if_wpi.c m_copydata(m0, 0, sizeof (struct ieee80211_frame), (caddr_t)&tx->wh);
tx 1876 dev/usb/if_ral.c uint8_t tx;
tx 1878 dev/usb/if_ral.c tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
tx 1880 dev/usb/if_ral.c tx |= RAL_BBP_ANTA;
tx 1882 dev/usb/if_ral.c tx |= RAL_BBP_ANTB;
tx 1884 dev/usb/if_ral.c tx |= RAL_BBP_DIVERSITY;
tx 1889 dev/usb/if_ral.c tx |= RAL_BBP_FLIPIQ;
tx 1891 dev/usb/if_ral.c ural_bbp_write(sc, RAL_BBP_TX, tx);
tx 1895 dev/usb/if_ral.c ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
tx 1898 dev/usb/if_ral.c ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));