root/dev/tc/asc_tc.c

DEFINITIONS

1. asc_tc_match
2. asc_tc_attach
3. asc_tc_reset
4. asc_tc_intr
5. asc_tc_setup
6. asc_tc_go
7. asc_tc_stop
8. asc_dma_isintr
9. asc_dma_isactive
10. asc_clear_latched_intr

    1 /* $OpenBSD: asc_tc.c,v 1.7 2003/02/11 19:20:28 mickey Exp $ */
    2 /* $NetBSD: asc_tc.c,v 1.19 2001/11/15 09:48:19 lukem Exp $ */
    4 /*-
    5  * Copyright (c) 2000 The NetBSD Foundation, Inc.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software contributed to The NetBSD Foundation
    9  * by Tohru Nishimura.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  * 3. All advertising materials mentioning features or use of this software
   20  *    must display the following acknowledgement:
   21  *      This product includes software developed by the NetBSD
   22  *      Foundation, Inc. and its contributors.
   23  * 4. Neither the name of The NetBSD Foundation nor the names of its
   24  *    contributors may be used to endorse or promote products derived
   25  *    from this software without specific prior written permission.
   26  *
   27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   37  * POSSIBILITY OF SUCH DAMAGE.
   38  */
   40 #include <sys/param.h>
   41 #include <sys/systm.h>
   42 #include <sys/device.h>
   43 #include <sys/buf.h>
   45 #include <scsi/scsi_all.h>
   46 #include <scsi/scsiconf.h>
   47 #include <scsi/scsi_message.h>
   49 #include <machine/bus.h>
   51 #include <dev/ic/ncr53c9xreg.h>
   52 #include <dev/ic/ncr53c9xvar.h>
   53 #include <dev/tc/ascvar.h>
   55 #include <dev/tc/tcvar.h>
   57 struct asc_tc_softc {
   58         struct asc_softc asc;
   60         /* XXX XXX XXX */
caddr_t sc_base, sc_bounce, sc_target;
   62 };
   64 int  asc_tc_match(struct device *, void *, void *);
   65 void asc_tc_attach(struct device *, struct device *, void *);
   67 struct cfattach asc_tc_ca = {
   68         sizeof(struct asc_tc_softc), asc_tc_match, asc_tc_attach
   69 };
   71 extern struct scsi_adapter asc_switch;
   72 extern struct scsi_device asc_dev;
   74 int     asc_dma_isintr(struct ncr53c9x_softc *);
   75 void    asc_tc_reset(struct ncr53c9x_softc *);
   76 int     asc_tc_intr(struct ncr53c9x_softc *);
   77 int     asc_tc_setup(struct ncr53c9x_softc *, caddr_t *,
size_t *, int, size_t *);
   79 void    asc_tc_go(struct ncr53c9x_softc *);
   80 void    asc_tc_stop(struct ncr53c9x_softc *);
   81 int     asc_dma_isactive(struct ncr53c9x_softc *);
   82 void    asc_clear_latched_intr(struct ncr53c9x_softc *);
   84 struct ncr53c9x_glue asc_tc_glue = {
asc_read_reg,
asc_write_reg,
asc_dma_isintr,
asc_tc_reset,
asc_tc_intr,
asc_tc_setup,
asc_tc_go,
asc_tc_stop,
asc_dma_isactive,
asc_clear_latched_intr,
   95 };
   97 /*
   98  * Parameters specific to PMAZ-A TC option card.
   99  */
  100 #define PMAZ_OFFSET_53C94       0x0             /* from module base */
  101 #define PMAZ_OFFSET_DMAR        0x40000         /* DMA Address Register */
  102 #define PMAZ_OFFSET_RAM         0x80000         /* 128KB SRAM buffer */
  103 #define PMAZ_OFFSET_ROM         0xc0000         /* diagnostic ROM */
  105 #define PMAZ_RAM_SIZE           0x20000         /* 128k (32k*32) */
  106 #define PER_TGT_DMA_SIZE        ((PMAZ_RAM_SIZE/7) & ~(sizeof(int)-1))
  108 #define PMAZ_DMAR_WRITE         0x80000000      /* DMA direction bit */
  109 #define PMAZ_DMAR_MASK          0x1ffff         /* 17 bits, 128k */
  110 #define PMAZ_DMA_ADDR(x)        ((unsigned long)(x) & PMAZ_DMAR_MASK)
  112 int
asc_tc_match(parent, cfdata, aux)
  114         struct device *parent;
  115         void *cfdata, *aux;
  116 {
  117         struct tc_attach_args *d = aux;
  119         if (strncmp("PMAZ-AA ", d->ta_modname, TC_ROM_LLEN))
  120                 return (0);
  122         return (1);
  123 }
  125 void
asc_tc_attach(parent, self, aux)
  127         struct device *parent, *self;
  128         void *aux;
  129 {
  130         struct tc_attach_args *ta = aux;
  131         struct asc_tc_softc *asc = (struct asc_tc_softc *)self; 
  132         struct ncr53c9x_softc *sc = &asc->asc.sc_ncr53c9x;
  134         /*
  135          * Set up glue for MI code early; we use some of it here.
  136          */
sc->sc_glue = &asc_tc_glue;
asc->asc.sc_bst = ta->ta_memt;
asc->asc.sc_dmat = ta->ta_dmat;
  140         if (bus_space_map(asc->asc.sc_bst, ta->ta_addr,
PMAZ_OFFSET_RAM + PMAZ_RAM_SIZE, 0, &asc->asc.sc_bsh)) {
printf("%s: unable to map device\n", sc->sc_dev.dv_xname);
  143                 return;
  144         }
asc->sc_base = (caddr_t)ta->ta_addr;    /* XXX XXX XXX */
tc_intr_establish(parent, ta->ta_cookie, IPL_BIO, ncr53c9x_intr, sc);
sc->sc_id = 7;
sc->sc_freq = (ta->ta_busspeed) ? 25000000 : 12500000;
  152         /* gimme MHz */
sc->sc_freq /= 1000000;
  155         /*
  156          * XXX More of this should be in ncr53c9x_attach(), but
  157          * XXX should we really poke around the chip that much in
  158          * XXX the MI code?  Think about this more...
  159          */
  161         /*
  162          * Set up static configuration info.
  163          */
sc->sc_cfg1 = sc->sc_id | NCRCFG1_PARENB;
sc->sc_cfg2 = NCRCFG2_SCSI2;
sc->sc_cfg3 = 0;
sc->sc_rev = NCR_VARIANT_NCR53C94;
  169         /*
  170          * XXX minsync and maxxfer _should_ be set up in MI code,
  171          * XXX but it appears to have some dependency on what sort
  172          * XXX of DMA we're hooked up to, etc.
  173          */
  175         /*
  176          * This is the value used to start sync negotiations
  177          * Note that the NCR register "SYNCTP" is programmed
  178          * in "clocks per byte", and has a minimum value of 4.
  179          * The SCSI period used in negotiation is one-fourth
  180          * of the time (in nanoseconds) needed to transfer one byte.
  181          * Since the chip's clock is given in MHz, we have the following
  182          * formula: 4 * period = (1000 / freq) * 4
  183          */
sc->sc_minsync = (1000 / sc->sc_freq) * 5 / 4;
sc->sc_maxxfer = 64 * 1024;
  188         /* Do the common parts of attachment. */
ncr53c9x_attach(sc, &asc_switch, &asc_dev);
  190 }
  192 void
asc_tc_reset(sc)
  194         struct ncr53c9x_softc *sc;
  195 {
  196         struct asc_tc_softc *asc = (struct asc_tc_softc *)sc;
asc->asc.sc_flags &= ~(ASC_DMAACTIVE|ASC_MAPLOADED);
  199 }
  201 int
asc_tc_intr(sc)
  203         struct ncr53c9x_softc *sc;
  204 {
  205         struct asc_tc_softc *asc = (struct asc_tc_softc *)sc;
  206         int trans, resid;
resid = 0;
  209         if ((asc->asc.sc_flags & ASC_ISPULLUP) == 0 &&
  210             (resid = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF)) != 0) {
NCR_DMA(("asc_tc_intr: empty FIFO of %d ", resid));
DELAY(1);
  213         }
resid += NCR_READ_REG(sc, NCR_TCL);
resid += NCR_READ_REG(sc, NCR_TCM) << 8;
trans = asc->asc.sc_dmasize - resid;
  220         if (asc->asc.sc_flags & ASC_ISPULLUP)
memcpy(asc->sc_target, asc->sc_bounce, trans);
  222         *asc->asc.sc_dmalen -= trans;
  223         *asc->asc.sc_dmaaddr += trans;
asc->asc.sc_flags &= ~(ASC_DMAACTIVE|ASC_MAPLOADED);
  226         return (0);
  227 }
  229 int
asc_tc_setup(sc, addr, len, datain, dmasize)
  231         struct ncr53c9x_softc *sc;
caddr_t *addr;
size_t *len;
  234         int datain;
size_t *dmasize;
  236 {
  237         struct asc_tc_softc *asc = (struct asc_tc_softc *)sc;
u_int32_t tc_dmar;
size_t size;
asc->asc.sc_dmaaddr = addr;
asc->asc.sc_dmalen = len;
asc->asc.sc_flags = (datain) ? ASC_ISPULLUP : 0;
NCR_DMA(("asc_tc_setup: start %ld@%p, %s\n", (long)*asc->asc.sc_dmalen,
  246                 *asc->asc.sc_dmaaddr, datain ? "IN" : "OUT"));
size = *dmasize;
  249         if (size > PER_TGT_DMA_SIZE)
size = PER_TGT_DMA_SIZE;
  251         *dmasize = asc->asc.sc_dmasize = size;
NCR_DMA(("asc_tc_setup: dmasize = %ld\n", (long)asc->asc.sc_dmasize));
asc->sc_bounce = asc->sc_base + PMAZ_OFFSET_RAM;
asc->sc_bounce += PER_TGT_DMA_SIZE *
sc->sc_nexus->xs->sc_link->target;
asc->sc_target = *addr;
  260         if ((asc->asc.sc_flags & ASC_ISPULLUP) == 0)
memcpy(asc->sc_bounce, asc->sc_target, size);
  263 #if 1
  264         if (asc->asc.sc_flags & ASC_ISPULLUP)
tc_dmar = PMAZ_DMA_ADDR(asc->sc_bounce);
  266         else
tc_dmar = PMAZ_DMAR_WRITE | PMAZ_DMA_ADDR(asc->sc_bounce);
bus_space_write_4(asc->asc.sc_bst, asc->asc.sc_bsh, PMAZ_OFFSET_DMAR,
tc_dmar);
asc->asc.sc_flags |= ASC_MAPLOADED|ASC_DMAACTIVE;
  271 #endif
  272         return (0);
  273 }
  275 void
asc_tc_go(sc)
  277         struct ncr53c9x_softc *sc;
  278 {
  279 #if 0
  280         struct asc_tc_softc *asc = (struct asc_tc_softc *)sc;
u_int32_t tc_dmar;
  283         if (asc->asc.sc_flags & ASC_ISPULLUP)
tc_dmar = PMAZ_DMA_ADDR(asc->sc_bounce);
  285         else
tc_dmar = PMAZ_DMAR_WRITE | PMAZ_DMA_ADDR(asc->sc_bounce);
bus_space_write_4(asc->asc.sc_bst, asc->asc.sc_bsh, PMAZ_OFFSET_DMAR,
tc_dmar);
asc->asc.sc_flags |= ASC_DMAACTIVE;
  290 #endif
  291 }
  293 /* NEVER CALLED BY MI 53C9x ENGINE INDEED */
  294 void
asc_tc_stop(sc)
  296         struct ncr53c9x_softc *sc;
  297 {
  298 #if 0
  299         struct asc_tc_softc *asc = (struct asc_tc_softc *)sc;
  301         if (asc->asc.sc_flags & ASC_ISPULLUP)
memcpy(asc->sc_target, asc->sc_bounce, asc->sc_dmasize);
asc->asc.sc_flags &= ~ASC_DMAACTIVE;
  304 #endif
  305 }
  307 /*
  308  * Glue functions.
  309  */
  310 int
asc_dma_isintr(sc)
  312         struct ncr53c9x_softc *sc;
  313 {
  314         return !!(NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT);
  315 }
  317 int
asc_dma_isactive(sc)
  319         struct ncr53c9x_softc *sc;
  320 {
  321         struct asc_tc_softc *asc = (struct asc_tc_softc *)sc;
  323         return !!(asc->asc.sc_flags & ASC_DMAACTIVE);
  324 }
  326 void
asc_clear_latched_intr(sc)
  328         struct ncr53c9x_softc *sc;
  329 {
  330 }