This source file includes following definitions.
- dl10019_mii_reset
- dl10019_media_init
- dl10019_media_fini
- dl10019_mediachange
- dl10019_mediastatus
- dl10019_init_card
- dl10019_stop_card
- dl10019_mii_bitbang_read
- dl10019_mii_bitbang_write
- dl10019_mii_readreg
- dl10019_mii_writereg
- dl10019_mii_statchg
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40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/device.h>
43 #include <sys/mbuf.h>
44 #include <sys/socket.h>
45 #include <sys/syslog.h>
46
47 #include <net/if.h>
48 #include <net/if_dl.h>
49 #include <net/if_types.h>
50 #include <net/if_media.h>
51
52 #ifdef INET
53 #include <netinet/in.h>
54 #include <netinet/in_systm.h>
55 #include <netinet/in_var.h>
56 #include <netinet/ip.h>
57 #include <netinet/if_ether.h>
58 #endif
59
60 #include <machine/bus.h>
61
62 #include <dev/mii/miivar.h>
63 #include <dev/mii/mii.h>
64 #include <dev/mii/mii_bitbang.h>
65
66 #include <dev/ic/dp8390reg.h>
67 #include <dev/ic/dp8390var.h>
68
69 #include <dev/ic/ne2000reg.h>
70 #include <dev/ic/ne2000var.h>
71
72 #include <dev/ic/dl10019reg.h>
73 #include <dev/ic/dl10019var.h>
74
75 int dl10019_mii_readreg(struct device *, int, int);
76 void dl10019_mii_writereg(struct device *, int, int, int);
77 void dl10019_mii_statchg(struct device *);
78
79 void dl10019_mii_reset(struct dp8390_softc *);
80
81
82
83
84 u_int32_t dl10019_mii_bitbang_read(struct device *);
85 void dl10019_mii_bitbang_write(struct device *, u_int32_t);
86
87 const struct mii_bitbang_ops dl10019_mii_bitbang_ops = {
88 dl10019_mii_bitbang_read,
89 dl10019_mii_bitbang_write,
90 {
91 DL0_GPIO_MII_DATAOUT,
92 DL0_GPIO_MII_DATAIN,
93 DL0_GPIO_MII_CLK,
94 DL0_19_GPIO_MII_DIROUT,
95 0,
96 }
97 };
98
99 const struct mii_bitbang_ops dl10022_mii_bitbang_ops = {
100 dl10019_mii_bitbang_read,
101 dl10019_mii_bitbang_write,
102 {
103 DL0_GPIO_MII_DATAOUT,
104 DL0_GPIO_MII_DATAIN,
105 DL0_GPIO_MII_CLK,
106 DL0_22_GPIO_MII_DIROUT,
107 0,
108 }
109 };
110
111 void
112 dl10019_mii_reset(struct dp8390_softc *sc)
113 {
114 struct ne2000_softc *nsc = (void *) sc;
115 int i;
116
117 if (nsc->sc_type != NE2000_TYPE_DL10022)
118 return;
119
120 for (i = 0; i < 2; i++) {
121 bus_space_write_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO,
122 0x08);
123 DELAY(1);
124 bus_space_write_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO,
125 0x0c);
126 DELAY(1);
127 }
128 bus_space_write_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO, 0x00);
129 }
130
131 void
132 dl10019_media_init(struct dp8390_softc *sc)
133 {
134 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
135
136 sc->sc_mii.mii_ifp = ifp;
137 sc->sc_mii.mii_readreg = dl10019_mii_readreg;
138 sc->sc_mii.mii_writereg = dl10019_mii_writereg;
139 sc->sc_mii.mii_statchg = dl10019_mii_statchg;
140 ifmedia_init(&sc->sc_mii.mii_media, 0, dp8390_mediachange,
141 dp8390_mediastatus);
142
143 dl10019_mii_reset(sc);
144
145 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, MII_PHY_ANY,
146 MII_OFFSET_ANY, 0);
147
148 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
149 ifmedia_add(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
150 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_NONE);
151 } else
152 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_AUTO);
153 }
154
155 void
156 dl10019_media_fini(struct dp8390_softc *sc)
157 {
158 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
159 }
160
161 int
162 dl10019_mediachange(struct dp8390_softc *sc)
163 {
164 mii_mediachg(&sc->sc_mii);
165 return (0);
166 }
167
168 void
169 dl10019_mediastatus(struct dp8390_softc *sc, struct ifmediareq *ifmr)
170 {
171 mii_pollstat(&sc->sc_mii);
172 ifmr->ifm_status = sc->sc_mii.mii_media_status;
173 ifmr->ifm_active = sc->sc_mii.mii_media_active;
174 }
175
176 void
177 dl10019_init_card(struct dp8390_softc *sc)
178 {
179 dl10019_mii_reset(sc);
180 mii_mediachg(&sc->sc_mii);
181 }
182
183 void
184 dl10019_stop_card(struct dp8390_softc *sc)
185 {
186 mii_down(&sc->sc_mii);
187 }
188
189 u_int32_t
190 dl10019_mii_bitbang_read(struct device *self)
191 {
192 struct dp8390_softc *sc = (void *) self;
193
194
195 return (bus_space_read_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO) &
196 ~DL0_GPIO_PRESERVE);
197 }
198
199 void
200 dl10019_mii_bitbang_write(struct device *self, u_int32_t val)
201 {
202 struct dp8390_softc *sc = (void *) self;
203 u_int8_t gpio;
204
205
206 gpio = bus_space_read_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO);
207 bus_space_write_1(sc->sc_regt, sc->sc_regh, NEDL_DL0_GPIO,
208 (val & ~DL0_GPIO_PRESERVE) | (gpio & DL0_GPIO_PRESERVE));
209 }
210
211 int
212 dl10019_mii_readreg(struct device *self, int phy, int reg)
213 {
214 struct ne2000_softc *nsc = (void *) self;
215 const struct mii_bitbang_ops *ops;
216
217 ops = (nsc->sc_type == NE2000_TYPE_DL10022) ?
218 &dl10022_mii_bitbang_ops : &dl10019_mii_bitbang_ops;
219
220 return (mii_bitbang_readreg(self, ops, phy, reg));
221 }
222
223 void
224 dl10019_mii_writereg(struct device *self, int phy, int reg, int val)
225 {
226 struct ne2000_softc *nsc = (void *) self;
227 const struct mii_bitbang_ops *ops;
228
229 ops = (nsc->sc_type == NE2000_TYPE_DL10022) ?
230 &dl10022_mii_bitbang_ops : &dl10019_mii_bitbang_ops;
231
232 mii_bitbang_writereg(self, ops, phy, reg, val);
233 }
234
235 void
236 dl10019_mii_statchg(struct device *self)
237 {
238 struct dp8390_softc *sc = (void *) self;
239 struct ne2000_softc *nsc = (void *) self;
240
241
242
243
244
245 if (nsc->sc_type == NE2000_TYPE_DL10022) {
246 u_int8_t diag;
247
248 if (sc->sc_mii.mii_media_active & IFM_FDX)
249 diag = DL0_DIAG_NOCOLLDETECT;
250 else
251 diag = 0;
252 bus_space_write_1(sc->sc_regt, sc->sc_regh,
253 NEDL_DL0_DIAG, diag);
254 }
255 }