pci_conf_read      90 arch/i386/i386/mpbios_intr_fixup.c 	reg = pci_conf_read(pc, tag, NFORCE4_PNPIRQ2);
pci_conf_read     101 arch/i386/i386/mpbios_intr_fixup.c 	reg = pci_conf_read(pc, tag, NFORCE4_PNPIRQ3);
pci_conf_read     122 arch/i386/i386/mpbios_intr_fixup.c 	reg = pci_conf_read(pc, tag, NFORCE4_PNPIRQ2);
pci_conf_read     195 arch/i386/i386/mpbios_intr_fixup.c 		icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
pci_conf_read     204 arch/i386/i386/mpbios_intr_fixup.c 		bhlcr = pci_conf_read(pc, icutag, PCI_BHLC_REG);
pci_conf_read     213 arch/i386/i386/mpbios_intr_fixup.c 			icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
pci_conf_read     199 arch/i386/pci/ali1543.c 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, ALI1543_INTR_CFG_REG);
pci_conf_read     220 arch/i386/pci/ali1543.c 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, ALI1543_INTR_CFG_REG);
pci_conf_read      56 arch/i386/pci/amd756reg.h 	(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) & 0xff)
pci_conf_read      59 arch/i386/pci/amd756reg.h 	(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR) >> 16)
pci_conf_read      63 arch/i386/pci/amd756reg.h 	(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR)	\
pci_conf_read      68 arch/i386/pci/amd756reg.h 	(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, AMD756_CFG_PIR)	\
pci_conf_read      98 arch/i386/pci/geodesc.c 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, SC1100_F5_SCRATCHPAD);
pci_conf_read      98 arch/i386/pci/gscpcib.c 	gpiobase = pci_conf_read(pa->pa_pc, pa->pa_tag, GSCGPIO_BASE);
pci_conf_read     104 arch/i386/pci/gscpm.c 	csr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     109 arch/i386/pci/gscpm.c 	acpibase = pci_conf_read(sc->sc_pc, sc->sc_tag, GSCPM_ACPIBASE);
pci_conf_read     129 arch/i386/pci/ichpcib.c 	cntl = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_ACPI_CNTL);
pci_conf_read     137 arch/i386/pci/ichpcib.c 	pmbase = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_PMBASE);
pci_conf_read     159 arch/i386/pci/ichpcib.c 		    pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_GEN_PMCON1) |
pci_conf_read     221 arch/i386/pci/ichpcib.c 		br_id = pci_conf_read(pa->pa_pc, br_tag, PCI_ID_REG);
pci_conf_read     222 arch/i386/pci/ichpcib.c 		br_class = pci_conf_read(pa->pa_pc, br_tag, PCI_CLASS_REG);
pci_conf_read     167 arch/i386/pci/opti82c558.c 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ);
pci_conf_read     184 arch/i386/pci/opti82c558.c 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ);
pci_conf_read     205 arch/i386/pci/opti82c558.c 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ);
pci_conf_read     226 arch/i386/pci/opti82c558.c 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VIPER_CFG_PIRQ);
pci_conf_read     209 arch/i386/pci/opti82c700.c 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, addrofs);
pci_conf_read     231 arch/i386/pci/opti82c700.c 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, addrofs);
pci_conf_read     258 arch/i386/pci/opti82c700.c 		reg = pci_conf_read(ph->ph_pc, ph->ph_tag, addrofs);
pci_conf_read     274 arch/i386/pci/opti82c700.c 		reg = pci_conf_read(ph->ph_pc, ph->ph_tag, addrofs);
pci_conf_read     303 arch/i386/pci/opti82c700.c 		reg = pci_conf_read(ph->ph_pc, ph->ph_tag, addrofs);
pci_conf_read     323 arch/i386/pci/opti82c700.c 		reg = pci_conf_read(ph->ph_pc, ph->ph_tag, addrofs);
pci_conf_read     220 arch/i386/pci/pchb.c 		bdnum = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x44);
pci_conf_read     257 arch/i386/pci/pchb.c 				bcreg = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     265 arch/i386/pci/pchb.c 			bcreg = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     304 arch/i386/pci/pchb.c 				bcreg = pci_conf_read(pa->pa_pc, tag, 0xd0);
pci_conf_read     310 arch/i386/pci/pchb.c 				bcreg = pci_conf_read(pa->pa_pc, tag, 0xd0);
pci_conf_read     316 arch/i386/pci/pchb.c 				bcreg = pci_conf_read(pa->pa_pc, tag, 0xd4);
pci_conf_read     333 arch/i386/pci/pchb.c 			bcreg = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     462 arch/i386/pci/pchb.c 	type = pci_conf_read(pa->pa_pc, pa->pa_tag, reg);
pci_conf_read     468 arch/i386/pci/pchb.c 	bus = pci_conf_read(pa->pa_pc, pa->pa_tag, reg);
pci_conf_read     190 arch/i386/pci/pci_addr_fixup.c 	val = pci_conf_read(pc, tag, PCI_BHLC_REG);
pci_conf_read     214 arch/i386/pci/pci_addr_fixup.c 		val = pci_conf_read(pc, tag, mapreg);
pci_conf_read     217 arch/i386/pci/pci_addr_fixup.c 		mask = pci_conf_read(pc, tag, mapreg);
pci_conf_read     299 arch/i386/pci/pci_addr_fixup.c 	if (pciaddr_ioaddr(pci_conf_read(pc, tag, mapreg)) != *addr) {
pci_conf_read     320 arch/i386/pci/pci_addr_fixup.c 	val = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     349 arch/i386/pci/pci_addr_fixup.c 	val = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     384 arch/i386/pci/pci_addr_fixup.c 	id = pci_conf_read(pc, tag, PCI_ID_REG);
pci_conf_read     397 arch/i386/pci/pci_addr_fixup.c 	class = pci_conf_read(pc, tag, PCI_CLASS_REG);
pci_conf_read     399 arch/i386/pci/pci_addr_fixup.c 		status = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     401 arch/i386/pci/pci_addr_fixup.c 			rval = pci_conf_read(pc, tag, PCI_CAPLISTPTR_REG);
pci_conf_read     405 arch/i386/pci/pci_addr_fixup.c 				rval = pci_conf_read(pc, tag, off);
pci_conf_read      64 arch/i386/pci/pci_bus_fixup.c 		reg = pci_conf_read(pc, tag, PCI_ID_REG);
pci_conf_read      79 arch/i386/pci/pci_bus_fixup.c 		reg = pci_conf_read(pc, tag, PCI_BHLC_REG);
pci_conf_read      89 arch/i386/pci/pci_bus_fixup.c 			reg = pci_conf_read(pc, tag, PCI_ID_REG);
pci_conf_read      98 arch/i386/pci/pci_bus_fixup.c 			reg = pci_conf_read(pc, tag, PCI_CLASS_REG);
pci_conf_read     103 arch/i386/pci/pci_bus_fixup.c 				reg = pci_conf_read(pc, tag, PPB_REG_BUSINFO);
pci_conf_read     171 arch/i386/pci/pci_bus_fixup.c 		reg = pci_conf_read(pc, tag, PCI_ID_REG);
pci_conf_read     186 arch/i386/pci/pci_bus_fixup.c 		reg = pci_conf_read(pc, tag, PCI_BHLC_REG);
pci_conf_read     196 arch/i386/pci/pci_bus_fixup.c 			reg = pci_conf_read(pc, tag, PCI_ID_REG);
pci_conf_read     205 arch/i386/pci/pci_bus_fixup.c 			reg = pci_conf_read(pc, tag, PCI_CLASS_REG);
pci_conf_read     212 arch/i386/pci/pci_bus_fixup.c 				reg = pci_conf_read(pc, tag, PPB_REG_BUSINFO);
pci_conf_read     264 arch/i386/pci/pci_bus_fixup.c 	id = pci_conf_read(pc, tag, PCI_ID_REG);
pci_conf_read     600 arch/i386/pci/pci_intr_fixup.c 	intr = pci_conf_read(pc, ihp->tag, PCI_INTERRUPT_REG);
pci_conf_read     720 arch/i386/pci/pci_intr_fixup.c 		pcireg_t id = pci_conf_read(pc, tag, PCI_ID_REG);
pci_conf_read     768 arch/i386/pci/pci_intr_fixup.c 			pirh->compat_router = pci_conf_read(pc, icutag,
pci_conf_read     787 arch/i386/pci/pci_intr_fixup.c 			icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
pci_conf_read     799 arch/i386/pci/pci_intr_fixup.c 			bhlcr = pci_conf_read(pc, icutag, PCI_BHLC_REG);
pci_conf_read     808 arch/i386/pci/pci_intr_fixup.c 				icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
pci_conf_read     358 arch/i386/pci/pci_machdep.c 		idreg = pci_conf_read(0, t, PCI_ID_REG); /* needs "pci_mode" */
pci_conf_read      87 arch/i386/pci/pci_machdep.h pcireg_t	pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
pci_conf_read     530 arch/i386/pci/pcibios.c 			id = pci_conf_read(pc, tag, PCI_ID_REG);
pci_conf_read     542 arch/i386/pci/pcibios.c 			bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
pci_conf_read     552 arch/i386/pci/pcibios.c 				id = pci_conf_read(pc, tag, PCI_ID_REG);
pci_conf_read     181 arch/i386/pci/piix.c 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, off);
pci_conf_read     207 arch/i386/pci/piix.c 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, off);
pci_conf_read     266 arch/i386/pci/piix.c 	pcireg_t irqs = pci_conf_read(ph->ph_pc, ph->ph_tag, PIIX_CFG_PIRQ);
pci_conf_read     274 arch/i386/pci/piix.c 			irqs = pci_conf_read(ph->ph_pc, ph->ph_tag,
pci_conf_read     139 arch/i386/pci/sis85c503.c 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag,
pci_conf_read     161 arch/i386/pci/sis85c503.c 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag,
pci_conf_read     156 arch/i386/pci/via8231.c 	id = pci_conf_read(pc, tag, PCI_ID_REG);
pci_conf_read      85 arch/i386/pci/via8231reg.h 	((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR)	\
pci_conf_read      88 arch/i386/pci/via8231reg.h 	((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR)	\
pci_conf_read      93 arch/i386/pci/via8231reg.h 	(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR)	\
pci_conf_read      97 arch/i386/pci/via8231reg.h 	(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR)	\
pci_conf_read     108 arch/i386/pci/via8231reg.h 	((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR)	\
pci_conf_read     111 arch/i386/pci/via8231reg.h 	((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR)	\
pci_conf_read     116 arch/i386/pci/via8231reg.h 	(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR)	\
pci_conf_read     120 arch/i386/pci/via8231reg.h 	(pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR)	\
pci_conf_read     134 arch/i386/pci/via82c586.c 		reg = pci_conf_read(pc, tag, VP3_CFG_KBDMISCCTRL12_REG);
pci_conf_read     167 arch/i386/pci/via82c586.c 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VP3_CFG_PIRQ_REG);
pci_conf_read     185 arch/i386/pci/via82c586.c 	reg = pci_conf_read(ph->ph_pc, ph->ph_tag, VP3_CFG_PIRQ_REG);
pci_conf_read     212 arch/i386/pci/via82c586.c 			reg = pci_conf_read(ph->ph_pc, ph->ph_tag,
pci_conf_read     242 arch/i386/pci/via82c586.c 			reg = pci_conf_read(ph->ph_pc, ph->ph_tag,
pci_conf_read     227 dev/acpi/acpi.c 			ival = pci_conf_read(pc, tag, idx & ~0x3);
pci_conf_read     245 dev/acpi/acpiprt.c 	reg = pci_conf_read(pc, tag, PCI_BHLC_REG);
pci_conf_read     253 dev/acpi/acpiprt.c 		reg = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
pci_conf_read     301 dev/acpi/acpiprt.c 		reg = pci_conf_read(pc, tag, PCI_CLASS_REG);
pci_conf_read     304 dev/acpi/acpiprt.c 			reg = pci_conf_read(pc, tag, PPB_REG_BUSINFO);
pci_conf_read    5493 dev/ic/aic79xx.c 	cmd = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     347 dev/ic/aic7xxx_openbsd.h 	return (pci_conf_read(pci->pa_pc, pci->pa_tag, reg));
pci_conf_read     344 dev/ic/aic7xxx_seeprom.c 		devconfig = pci_conf_read(ahc->bd->pc, ahc->bd->tag, DEVCONFIG);
pci_conf_read     202 dev/pci/aac_pci.c 			subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     229 dev/pci/aac_pci.c 	subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     144 dev/pci/adv_pci.c 		bhlcr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
pci_conf_read     147 dev/pci/adw_pci.c 	command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     173 dev/pci/agp.c  			info->agp_mode = pci_conf_read(sc->sc_pc, sc->sc_pcitag,
pci_conf_read     422 dev/pci/agp.c  	tstatus = pci_conf_read(sc->sc_pc, sc->sc_pcitag,
pci_conf_read     424 dev/pci/agp.c  	mstatus = pci_conf_read(sc->sc_pc, sc->sc_pcitag,
pci_conf_read     119 dev/pci/agp_ali.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_ALI_ATTBASE);
pci_conf_read     124 dev/pci/agp_ali.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_ALI_TLBCTRL);
pci_conf_read     144 dev/pci/agp_ali.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_ALI_TLBCTRL);
pci_conf_read     151 dev/pci/agp_ali.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_ALI_ATTBASE);
pci_conf_read     186 dev/pci/agp_ali.c 	i = (int)pci_conf_read(sc->sc_pc, sc->sc_pcitag,
pci_conf_read     205 dev/pci/agp_ali.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_ALI_ATTBASE);
pci_conf_read     241 dev/pci/agp_ali.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_ALI_TLBCTRL);
pci_conf_read     211 dev/pci/agp_amd.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_AMD751_MODECTRL);
pci_conf_read     235 dev/pci/agp_amd.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_AMD751_MODECTRL);
pci_conf_read     258 dev/pci/agp_amd.c 	vas = (pci_conf_read(sc->sc_pc, sc->sc_pcitag,
pci_conf_read     284 dev/pci/agp_amd.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_AMD751_APCTRL);
pci_conf_read     234 dev/pci/agp_i810.c 		reg = pci_conf_read(isc->bridge_pa.pa_pc,
pci_conf_read     273 dev/pci/agp_i810.c 		reg = pci_conf_read(isc->bridge_pa.pa_pc,
pci_conf_read     338 dev/pci/agp_i810.c 		reg = pci_conf_read(isc->bridge_pa.pa_pc,
pci_conf_read     395 dev/pci/agp_i810.c 		reg = pci_conf_read(isc->bridge_pa.pa_pc,
pci_conf_read     453 dev/pci/agp_i810.c 		reg = pci_conf_read(isc->bridge_pa.pa_pc,
pci_conf_read     464 dev/pci/agp_i810.c 		reg = pci_conf_read(isc->bridge_pa.pa_pc,
pci_conf_read     472 dev/pci/agp_i810.c 		reg = pci_conf_read(isc->bridge_pa.pa_pc,
pci_conf_read     480 dev/pci/agp_i810.c 		reg = pci_conf_read(isc->bridge_pa.pa_pc,
pci_conf_read     514 dev/pci/agp_i810.c 		reg = pci_conf_read(isc->bridge_pa.pa_pc,
pci_conf_read     535 dev/pci/agp_i810.c 		reg = pci_conf_read(isc->bridge_pa.pa_pc,
pci_conf_read     554 dev/pci/agp_i810.c 		reg = pci_conf_read(isc->bridge_pa.pa_pc,
pci_conf_read     564 dev/pci/agp_i810.c 		reg = pci_conf_read(isc->bridge_pa.pa_pc,
pci_conf_read     128 dev/pci/agp_intel.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_NBXCFG);
pci_conf_read     133 dev/pci/agp_intel.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_STS);
pci_conf_read     153 dev/pci/agp_intel.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_NBXCFG);
pci_conf_read     170 dev/pci/agp_intel.c 	apsize = pci_conf_read(sc->sc_pc, sc->sc_pcitag,
pci_conf_read     200 dev/pci/agp_intel.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_INTEL_APSIZE);
pci_conf_read     122 dev/pci/agp_sis.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_SIS_WINCTRL);
pci_conf_read     141 dev/pci/agp_sis.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_SIS_WINCTRL);
pci_conf_read     162 dev/pci/agp_sis.c 	gws = (pci_conf_read(sc->sc_pc, sc->sc_pcitag,
pci_conf_read     184 dev/pci/agp_sis.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_SIS_WINCTRL);	
pci_conf_read     221 dev/pci/agp_sis.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_SIS_TLBFLUSH);
pci_conf_read     152 dev/pci/agp_via.c 	apsize = pci_conf_read(sc->sc_pc, sc->sc_pcitag,
pci_conf_read     182 dev/pci/agp_via.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, AGP_VIA_APSIZE);
pci_conf_read     695 dev/pci/ahc_pci.c 	subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     752 dev/pci/ahc_pci.c 	subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     829 dev/pci/ahc_pci.c 	devconfig = pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG);
pci_conf_read     830 dev/pci/ahc_pci.c 	devconfig = pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG);
pci_conf_read     858 dev/pci/ahc_pci.c 		command = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     949 dev/pci/ahc_pci.c 	    pci_conf_read(pa->pa_pc, pa->pa_tag, CSIZE_LATTIME) & CACHESIZE;
pci_conf_read     965 dev/pci/ahc_pci.c 		devconfig = pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG);
pci_conf_read    1037 dev/pci/ahc_pci.c 	    pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG);
pci_conf_read    1039 dev/pci/ahc_pci.c 	    pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read    1041 dev/pci/ahc_pci.c 	    pci_conf_read(pa->pa_pc, pa->pa_tag, CSIZE_LATTIME);
pci_conf_read    1122 dev/pci/ahc_pci.c 	devconfig = pci_conf_read(ahc->bd->pc, ahc->bd->tag, DEVCONFIG);
pci_conf_read    1165 dev/pci/ahc_pci.c 	devconfig = pci_conf_read(ahc->bd->pc, ahc->bd->tag, DEVCONFIG);
pci_conf_read    1322 dev/pci/ahc_pci.c 	cmd = pci_conf_read(ahc->bd->pc, ahc->bd->tag, PCIR_COMMAND);
pci_conf_read    1354 dev/pci/ahc_pci.c 	status1 = pci_conf_read(ahc->bd->pc, ahc->bd->tag,
pci_conf_read    1363 dev/pci/ahc_pci.c 	status1 = pci_conf_read(ahc->bd->pc, ahc->bd->tag, PCI_COMMAND_STATUS_REG + 1);
pci_conf_read    1383 dev/pci/ahc_pci.c 	status1 = pci_conf_read(ahc->bd->pc, ahc->bd->tag, PCI_COMMAND_STATUS_REG);
pci_conf_read    1640 dev/pci/ahc_pci.c 		command = pci_conf_read(ahc->bd->pc, ahc->bd->tag, PCI_COMMAND_STATUS_REG);
pci_conf_read    1660 dev/pci/ahc_pci.c 	devconfig = pci_conf_read(ahc->bd->pc, ahc->bd->tag, DEVCONFIG);
pci_conf_read     329 dev/pci/ahd_pci.c 	subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     352 dev/pci/ahd_pci.c 	subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     376 dev/pci/ahd_pci.c 	devconfig = pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG);
pci_conf_read     464 dev/pci/ahd_pci.c 		reg = pci_conf_read(pa->pa_pc, pa->pa_tag, offset);
pci_conf_read     490 dev/pci/ahd_pci.c 		devconfig = pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG);
pci_conf_read     528 dev/pci/ahd_pci.c 	ahd->pci_cachesize = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
pci_conf_read     574 dev/pci/ahd_pci.c 	cmd = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     607 dev/pci/ahd_pci.c 	pci_status1 = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     636 dev/pci/ahd_pci.c 		pci_status1 = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     792 dev/pci/ahd_pci.c 	devconfig = pci_conf_read(pc, tag, DEVCONFIG);
pci_conf_read     979 dev/pci/ahd_pci.c 	pci_status1 = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_read    1006 dev/pci/ahd_pci.c 	pcix_status = pci_conf_read(pc, tag, ahd->pcix_off + 0x04);
pci_conf_read    1153 dev/pci/ahd_pci.c 		devconfig1 = pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG1);
pci_conf_read    1155 dev/pci/ahd_pci.c 		devconfig1 = pci_conf_read(pa->pa_pc, pa->pa_tag, DEVCONFIG1);
pci_conf_read     149 dev/pci/alipm.c 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     152 dev/pci/alipm.c 		iobase = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_BASE);
pci_conf_read     161 dev/pci/alipm.c 		reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_CONF);
pci_conf_read     167 dev/pci/alipm.c 		reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_SMB_HOSTC);
pci_conf_read     180 dev/pci/alipm.c 		reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_SMB_HOSTX);
pci_conf_read     154 dev/pci/amdiic.c 	conf = pci_conf_read(pa->pa_pc, pa->pa_tag, AMD8111_SMB_MISC);
pci_conf_read     237 dev/pci/amdpm.c 		cfg_reg = pci_conf_read(pa->pa_pc, pa->pa_tag, AMDPM_CONFREG);
pci_conf_read     243 dev/pci/amdpm.c 		reg = pci_conf_read(pa->pa_pc, pa->pa_tag, AMDPM_PMPTR);
pci_conf_read     275 dev/pci/amdpm.c 				cfg_reg = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     299 dev/pci/amdpm.c 		reg = pci_conf_read(pa->pa_pc, pa->pa_tag, NFPM_PMPTR);
pci_conf_read     177 dev/pci/ami_pci.c 		sig = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     239 dev/pci/ami_pci.c 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     278 dev/pci/ami_pci.c 	switch (pci_conf_read(pa->pa_pc, pa->pa_tag, AMI_PCI_SGL)) {
pci_conf_read     368 dev/pci/auich.c 			csr = pci_conf_read(pa->pa_pc, pa->pa_tag, AUICH_CFG);
pci_conf_read     380 dev/pci/auich.c 			csr = pci_conf_read(pa->pa_pc, pa->pa_tag, AUICH_CFG);
pci_conf_read    1577 dev/pci/auixp.c 	subdev = pci_conf_read(sc->sc_pct, sc->sc_tag, PCI_SUBSYS_ID_REG);
pci_conf_read    1818 dev/pci/auixp.c 		data = pci_conf_read(pc, tag, pmcapreg + PCI_PMCSR);
pci_conf_read     648 dev/pci/autri.c 	DPRINTFN(5,("pci_conf_read(0x40) : 0x%X\n",pci_conf_read(pc,pt,0x40)));
pci_conf_read     649 dev/pci/autri.c 	DPRINTFN(5,("pci_conf_read(0x44) : 0x%X\n",pci_conf_read(pc,pt,0x44)));
pci_conf_read     655 dev/pci/autri.c 		reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
pci_conf_read     659 dev/pci/autri.c 		reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
pci_conf_read     663 dev/pci/autri.c 		reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
pci_conf_read     672 dev/pci/autri.c 		reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
pci_conf_read     676 dev/pci/autri.c 		reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
pci_conf_read     680 dev/pci/autri.c 		reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
pci_conf_read     689 dev/pci/autri.c 		reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
pci_conf_read     693 dev/pci/autri.c 		reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
pci_conf_read     697 dev/pci/autri.c 		reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
pci_conf_read     708 dev/pci/autri.c 		reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
pci_conf_read     712 dev/pci/autri.c 		reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
pci_conf_read     716 dev/pci/autri.c 		reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE);
pci_conf_read     266 dev/pci/auvia.c 	pr = pci_conf_read(pc, pt, AUVIA_PCICONF_JUNK);
pci_conf_read     346 dev/pci/auvia.c 	r = pci_conf_read(sc->sc_pc, sc->sc_pt, AUVIA_PCICONF_JUNK);
pci_conf_read     356 dev/pci/auvia.c 	for (i = 500000; i != 0 && !(pci_conf_read(sc->sc_pc, sc->sc_pt,
pci_conf_read     375 dev/pci/azalia.c 	v = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_PCI_HDBARL);
pci_conf_read     384 dev/pci/azalia.c 	v = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     388 dev/pci/azalia.c 	v = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x44);
pci_conf_read     416 dev/pci/azalia.c 	sc->subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     178 dev/pci/bktr/bktr_os.c 	fun = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     232 dev/pci/bktr/bktr_os.c 	latency = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_LATENCY_TIMER);
pci_conf_read     247 dev/pci/bktr/bktr_os.c 	fun = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ID_REG);
pci_conf_read     248 dev/pci/bktr/bktr_os.c         rev = PCI_REVISION(pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG));
pci_conf_read     137 dev/pci/cac_pci.c 	subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     189 dev/pci/cac_pci.c 		reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i);
pci_conf_read     117 dev/pci/ciss_pci.c 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     625 dev/pci/cs4280.c 	mem = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
pci_conf_read     327 dev/pci/cs4281.c 		reg = pci_conf_read(pa->pa_pc, pa->pa_tag, pci_pwrmgmt_csr_reg);
pci_conf_read     148 dev/pci/ehci_pci.c 	switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) {
pci_conf_read     226 dev/pci/ehci_pci.c 		eec = pci_conf_read(sc->sc_pc, sc->sc_tag, eecp);
pci_conf_read     245 dev/pci/ehci_pci.c 		eec = pci_conf_read(sc->sc_pc, sc->sc_tag, eecp);
pci_conf_read     255 dev/pci/ehci_pci.c 				legsup = pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read     476 dev/pci/emuxki.c 	} else if (pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read    1301 dev/pci/esa.c  	data = pci_conf_read(pc, tag, PCI_LEGACY_AUDIO_CTRL);
pci_conf_read    1384 dev/pci/esa.c  	data = pci_conf_read(pc, tag, ESA_PCI_ALLEGRO_CONFIG);
pci_conf_read    1390 dev/pci/esa.c  	data = pci_conf_read(pc, tag, ESA_PCI_ALLEGRO_CONFIG);
pci_conf_read    1400 dev/pci/esa.c  		data = pci_conf_read(pc, tag, ESA_PCI_USER_CONFIG);
pci_conf_read    1604 dev/pci/esa.c  		data = pci_conf_read(pc, tag, pmcapreg + PCI_PMCSR);
pci_conf_read     344 dev/pci/eso.c  		       pci_conf_read(pa->pa_pc, pa->pa_tag, ESO_PCI_S1C) &
pci_conf_read     473 dev/pci/hifn7751.c 	r = pci_conf_read(sc->sc_pci_pc, sc->sc_pci_tag, HIFN_TRDY_TIMEOUT);
pci_conf_read     122 dev/pci/ichiic.c 	conf = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_SMB_HOSTC);
pci_conf_read     110 dev/pci/ichwdt.c 	reg = pci_conf_read(sc->sc_pc, sc->sc_tag, ICH_WDT_CONF);
pci_conf_read     156 dev/pci/ichwdt.c 			    pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read     178 dev/pci/ichwdt.c 			    pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read     182 dev/pci/if_atw_pci.c 		reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR);
pci_conf_read     232 dev/pci/if_atw_pci.c 	sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
pci_conf_read     265 dev/pci/if_bce.c 		pmode = pci_conf_read(pc, pa->pa_tag, pmreg + 4) & 0x3;
pci_conf_read     907 dev/pci/if_bce.c 	reg_win = pci_conf_read(sc->bce_pa.pa_pc, sc->bce_pa.pa_tag,
pci_conf_read    1222 dev/pci/if_bce.c 		reg_win = pci_conf_read(sc->bce_pa.pa_pc, sc->bce_pa.pa_tag,
pci_conf_read     396 dev/pci/if_bge.c 	return (pci_conf_read(pa->pa_pc, pa->pa_tag, BGE_PCI_MEMWIN_DATA));
pci_conf_read    1136 dev/pci/if_bge.c 		device_ctl = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read    1703 dev/pci/if_bge.c 	subid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read    1740 dev/pci/if_bge.c 	pm_ctl = pci_conf_read(pc, pa->pa_tag, BGE_PCI_PWRMGMT_CMD);
pci_conf_read    1751 dev/pci/if_bge.c             pci_conf_read(pc, pa->pa_tag, BGE_PCI_MISC_CTL) &
pci_conf_read    1771 dev/pci/if_bge.c 	if ((pci_conf_read(pa->pa_pc, pa->pa_tag, BGE_PCI_PCISTATE) &
pci_conf_read    2098 dev/pci/if_bge.c 	cachesize = pci_conf_read(pa->pa_pc, pa->pa_tag, BGE_PCI_CACHESZ);
pci_conf_read    2099 dev/pci/if_bge.c 	command = pci_conf_read(pa->pa_pc, pa->pa_tag, BGE_PCI_CMD);
pci_conf_read    2100 dev/pci/if_bge.c 	pcistate = pci_conf_read(pa->pa_pc, pa->pa_tag, BGE_PCI_PCISTATE);
pci_conf_read    2146 dev/pci/if_bge.c 			v = pci_conf_read(pa->pa_pc, pa->pa_tag, 0xc4);
pci_conf_read    2207 dev/pci/if_bge.c 		new_pcistate = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read    2251 dev/pci/if_bgereg.h 	pci_conf_write(pc, tag, reg, (pci_conf_read(pc, tag, reg) | (x)))
pci_conf_read    2253 dev/pci/if_bgereg.h 	pci_conf_write(pc, tag, reg, (pci_conf_read(pc, tag, reg) & ~(x)))
pci_conf_read     670 dev/pci/if_bnx.c 		    (((pci_conf_read(pa->pa_pc, pa->pa_tag, 0x08) & 0xf0) >> 4)
pci_conf_read     671 dev/pci/if_bnx.c 		    + 'A'), (pci_conf_read(pa->pa_pc, pa->pa_tag, 0x08) & 0xf));
pci_conf_read    1019 dev/pci/if_bnx.c 		val = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read    1026 dev/pci/if_bnx.c 	return pci_conf_read(pa->pa_pc, pa->pa_tag, BNX_PCICFG_REG_WINDOW);
pci_conf_read    3071 dev/pci/if_bnx.c 		val = pci_conf_read(pa->pa_pc, pa->pa_tag, BNX_PCI_PCIX_CMD);
pci_conf_read     671 dev/pci/if_bnxreg.h #define	PCI_SETBIT(pc, tag, reg, x)	pci_conf_write(pc, tag, reg, (pci_conf_read(pc, tag, reg) | (x)))
pci_conf_read     672 dev/pci/if_bnxreg.h #define PCI_CLRBIT(pc, tag, reg, x)	pci_conf_write(pc, tag, reg, (pci_conf_read(pc, tag, reg) & ~(x)))
pci_conf_read     189 dev/pci/if_cas.c 	address = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ROM_REG);
pci_conf_read     191 dev/pci/if_cas.c 	mask = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ROM_REG);
pci_conf_read     286 dev/pci/if_cas.c 	address = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ROM_REG);
pci_conf_read     568 dev/pci/if_che.c 		rv = pci_conf_read(pa->pa_pc, pa->pa_tag, base);
pci_conf_read     578 dev/pci/if_che.c 	*dp = pci_conf_read(pa->pa_pc, pa->pa_tag, base + CHE_PCI_VPD_DATA);
pci_conf_read     168 dev/pci/if_dc_pci.c 	cptr = pci_conf_read(pc, pa->pa_tag, DC_PCI_CCAP) & 0xFF;
pci_conf_read     170 dev/pci/if_dc_pci.c 	r = pci_conf_read(pc, pa->pa_tag, cptr) & 0xFF;
pci_conf_read     173 dev/pci/if_dc_pci.c 		r = pci_conf_read(pc, pa->pa_tag, cptr + PCI_PMCSR);
pci_conf_read     178 dev/pci/if_dc_pci.c 			iobase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBIO);
pci_conf_read     179 dev/pci/if_dc_pci.c 			membase = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFBMA);
pci_conf_read     180 dev/pci/if_dc_pci.c 			irq = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFIT);
pci_conf_read     223 dev/pci/if_dc_pci.c 	sc->dc_csid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     301 dev/pci/if_dc_pci.c 			command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFLT);
pci_conf_read     436 dev/pci/if_dc_pci.c 		sc->dc_cachesize = pci_conf_read(pc, pa->pa_tag,
pci_conf_read     444 dev/pci/if_dc_pci.c 		command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD);
pci_conf_read     462 dev/pci/if_dc_pci.c 		if (pci_conf_read(pc, pa->pa_tag, DC_PCI_CSID) != 0x80281033)
pci_conf_read     503 dev/pci/if_dc_pci.c 		command = pci_conf_read(pc, pa->pa_tag, DC_PCI_CFDD);
pci_conf_read     119 dev/pci/if_de.c #define PCI_CONF_READ(r)	pci_conf_read(pa->pa_pc, pa->pa_tag, (r))
pci_conf_read    1404 dev/pci/if_em.c 	sc->hw.pci_cmd_word = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read    1411 dev/pci/if_em.c 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG);
pci_conf_read    1414 dev/pci/if_em.c 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read    1438 dev/pci/if_em.c 	val = pci_conf_read(pa->pa_pc, pa->pa_tag, EM_MMBA);
pci_conf_read    1453 dev/pci/if_em.c 			val = pci_conf_read(pa->pa_pc, pa->pa_tag, rid);
pci_conf_read    1476 dev/pci/if_em.c 		val = pci_conf_read(pa->pa_pc, pa->pa_tag, EM_FLASH);
pci_conf_read    2790 dev/pci/if_em.c 	*value = pci_conf_read(pc, pa->pa_tag, reg);
pci_conf_read     129 dev/pci/if_ep_pci.c 	i = pci_conf_read(pc, pa->pa_tag, PCI_CONN);
pci_conf_read     133 dev/pci/if_epic_pci.c 	reg = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     165 dev/pci/if_epic_pci.c 		reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR);
pci_conf_read     113 dev/pci/if_fpa.c 	data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
pci_conf_read     234 dev/pci/if_fxp_pci.c 		if (PCI_CACHELINE(pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     239 dev/pci/if_fxp_pci.c 			    pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     146 dev/pci/if_gem_pci.c 	address = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ROM_REG);
pci_conf_read     148 dev/pci/if_gem_pci.c 	mask = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ROM_REG);
pci_conf_read     196 dev/pci/if_gem_pci.c 	address = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ROM_REG);
pci_conf_read     142 dev/pci/if_hme_pci.c 	cl = pci_conf_read(epa.pa_pc, epa.pa_tag, PCI_CLASS_REG);
pci_conf_read     143 dev/pci/if_hme_pci.c 	id = pci_conf_read(epa.pa_pc, epa.pa_tag, PCI_ID_REG);
pci_conf_read     220 dev/pci/if_hme_pci.c 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     180 dev/pci/if_ipw.c 	data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
pci_conf_read     308 dev/pci/if_ipw.c 	data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
pci_conf_read     185 dev/pci/if_iwi.c 	data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
pci_conf_read     377 dev/pci/if_iwi.c 	data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
pci_conf_read     896 dev/pci/if_ixgb.c 	sc->hw.pci_cmd_word = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     903 dev/pci/if_ixgb.c 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG);
pci_conf_read     906 dev/pci/if_ixgb.c 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     935 dev/pci/if_ixgb.c 	val = pci_conf_read(pa->pa_pc, pa->pa_tag, IXGB_MMBA);
pci_conf_read     419 dev/pci/if_lge.c 	command = pci_conf_read(pc, pa->pa_tag, LGE_PCI_CAPID) & 0x000000FF;
pci_conf_read     421 dev/pci/if_lge.c 		command = pci_conf_read(pc, pa->pa_tag, LGE_PCI_PWRMGMTCTRL);
pci_conf_read     426 dev/pci/if_lge.c 			iobase = pci_conf_read(pc, pa->pa_tag, LGE_PCI_LOIO);
pci_conf_read     427 dev/pci/if_lge.c 			membase = pci_conf_read(pc, pa->pa_tag, LGE_PCI_LOMEM);
pci_conf_read     428 dev/pci/if_lge.c 			irq = pci_conf_read(pc, pa->pa_tag, LGE_PCI_INTLINE);
pci_conf_read     127 dev/pci/if_lmc_obsd.c 	id = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CFRV) & 0xff;
pci_conf_read     135 dev/pci/if_lmc_obsd.c 	id = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SSID);
pci_conf_read     178 dev/pci/if_lmc_obsd.c 	revinfo  = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CFRV) & 0xFF;
pci_conf_read     179 dev/pci/if_lmc_obsd.c 	id       = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CFID);
pci_conf_read     180 dev/pci/if_lmc_obsd.c 	cfdainfo = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CFDA);
pci_conf_read     181 dev/pci/if_lmc_obsd.c 	ssid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SSID);
pci_conf_read    1175 dev/pci/if_msk.c 	command = pci_conf_read(pc, pa->pa_tag, SK_PCI_CAPID) & 0x000000FF;
pci_conf_read    1178 dev/pci/if_msk.c 		command = pci_conf_read(pc, pa->pa_tag, SK_PCI_PWRMGMTCTRL);
pci_conf_read    1183 dev/pci/if_msk.c 			iobase = pci_conf_read(pc, pa->pa_tag, SK_PCI_LOIO);
pci_conf_read    1184 dev/pci/if_msk.c 			membase = pci_conf_read(pc, pa->pa_tag, SK_PCI_LOMEM);
pci_conf_read    1185 dev/pci/if_msk.c 			irq = pci_conf_read(pc, pa->pa_tag, SK_PCI_INTLINE);
pci_conf_read      89 dev/pci/if_mtd_pci.c 	command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read      91 dev/pci/if_mtd_pci.c 	    pci_conf_read(pa->pa_pc, pa->pa_tag, MTD_PCI_LOIO) & 0x300) {
pci_conf_read      97 dev/pci/if_mtd_pci.c 	command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     744 dev/pci/if_nge.c 	command = pci_conf_read(pc, pa->pa_tag, NGE_PCI_CAPID) & 0x000000FF;
pci_conf_read     746 dev/pci/if_nge.c 		command = pci_conf_read(pc, pa->pa_tag, NGE_PCI_PWRMGMTCTRL);
pci_conf_read     751 dev/pci/if_nge.c 			iobase = pci_conf_read(pc, pa->pa_tag, NGE_PCI_LOIO);
pci_conf_read     752 dev/pci/if_nge.c 			membase = pci_conf_read(pc, pa->pa_tag, NGE_PCI_LOMEM);
pci_conf_read     753 dev/pci/if_nge.c 			irq = pci_conf_read(pc, pa->pa_tag, NGE_PCI_INTLINE);
pci_conf_read     618 dev/pci/if_pcn.c 		pmode = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR) &
pci_conf_read     102 dev/pci/if_re_pci.c 	subid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     138 dev/pci/if_re_pci.c 	command = pci_conf_read(pc, pa->pa_tag, RL_PCI_CAPID) & 0x000000FF;
pci_conf_read     144 dev/pci/if_re_pci.c 		iobase = pci_conf_read(pc, pa->pa_tag,  RL_PCI_LOIO);
pci_conf_read     145 dev/pci/if_re_pci.c 		membase = pci_conf_read(pc, pa->pa_tag, RL_PCI_LOMEM);
pci_conf_read     146 dev/pci/if_re_pci.c 		irq = pci_conf_read(pc, pa->pa_tag, RL_PCI_INTLINE);
pci_conf_read     191 dev/pci/if_rtw_pci.c 		reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR);
pci_conf_read      86 dev/pci/if_sandrv.c #define PCI_SUBVENDOR(pa)	(pci_conf_read(pa->pa_pc, pa->pa_tag,	\
pci_conf_read     251 dev/pci/if_sandrv.c 	atype = PCI_PRODUCT(pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     489 dev/pci/if_sandrv.c 	irq = (u_int8_t)pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_INTLINE);
pci_conf_read    1433 dev/pci/if_sandrv.c 	*value = pci_conf_read(hwcard->pa.pa_pc, hwcard->pa.pa_tag, reg);
pci_conf_read    1448 dev/pci/if_sandrv.c 	tmp = pci_conf_read(hwcard->pa.pa_pc, hwcard->pa.pa_tag, reg);
pci_conf_read    1464 dev/pci/if_sandrv.c 	tmp = pci_conf_read(hwcard->pa.pa_pc, hwcard->pa.pa_tag, reg);
pci_conf_read     120 dev/pci/if_sf_pci.c 		reg = pci_conf_read(pa->pa_pc, pa->pa_tag, pmreg + PCI_PMCSR);
pci_conf_read     179 dev/pci/if_sf_pci.c 	    pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
pci_conf_read     326 dev/pci/if_sis.c 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x48);
pci_conf_read     907 dev/pci/if_sis.c 	command = pci_conf_read(pc, pa->pa_tag, SIS_PCI_CAPID) & 0x000000FF;
pci_conf_read     910 dev/pci/if_sis.c 		command = pci_conf_read(pc, pa->pa_tag, SIS_PCI_PWRMGMTCTRL);
pci_conf_read     915 dev/pci/if_sis.c 			iobase = pci_conf_read(pc, pa->pa_tag, SIS_PCI_LOIO);
pci_conf_read     916 dev/pci/if_sis.c 			membase = pci_conf_read(pc, pa->pa_tag, SIS_PCI_LOMEM);
pci_conf_read     917 dev/pci/if_sis.c 			irq = pci_conf_read(pc, pa->pa_tag, SIS_PCI_INTLINE);
pci_conf_read     947 dev/pci/if_sk.c 	subid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read    1308 dev/pci/if_sk.c 	command = pci_conf_read(pc, pa->pa_tag, SK_PCI_CAPID) & 0x000000FF;
pci_conf_read    1311 dev/pci/if_sk.c 		command = pci_conf_read(pc, pa->pa_tag, SK_PCI_PWRMGMTCTRL);
pci_conf_read    1316 dev/pci/if_sk.c 			iobase = pci_conf_read(pc, pa->pa_tag, SK_PCI_LOIO);
pci_conf_read    1317 dev/pci/if_sk.c 			membase = pci_conf_read(pc, pa->pa_tag, SK_PCI_LOMEM);
pci_conf_read    1318 dev/pci/if_sk.c 			irq = pci_conf_read(pc, pa->pa_tag, SK_PCI_INTLINE);
pci_conf_read     860 dev/pci/if_ste.c 	command = pci_conf_read(pc, pa->pa_tag, STE_PCI_CAPID) & 0x000000FF;
pci_conf_read     863 dev/pci/if_ste.c 		command = pci_conf_read(pc, pa->pa_tag, STE_PCI_PWRMGMTCTRL);
pci_conf_read     868 dev/pci/if_ste.c 			iobase = pci_conf_read(pc, pa->pa_tag, STE_PCI_LOIO);
pci_conf_read     869 dev/pci/if_ste.c 			membase = pci_conf_read(pc, pa->pa_tag, STE_PCI_LOMEM);
pci_conf_read     870 dev/pci/if_ste.c 			irq = pci_conf_read(pc, pa->pa_tag, STE_PCI_INTLINE);
pci_conf_read     224 dev/pci/if_stge.c 		pmode = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR) &
pci_conf_read    2037 dev/pci/if_tl.c 	command = pci_conf_read(pa->pa_pc, pa->pa_tag, TL_PCI_LATENCY_TIMER);
pci_conf_read     630 dev/pci/if_vr.c 	command = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     633 dev/pci/if_vr.c 		command = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     639 dev/pci/if_vr.c 			iobase = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     641 dev/pci/if_vr.c 			membase = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     643 dev/pci/if_vr.c 			irq = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     713 dev/pci/if_vr.c 	    pci_conf_read(pa->pa_pc, pa->pa_tag, VR_PCI_MODE) |
pci_conf_read     729 dev/pci/if_wb.c 	command = pci_conf_read(pc, pa->pa_tag, WB_PCI_CAPID) & 0x000000FF;
pci_conf_read     732 dev/pci/if_wb.c 		command = pci_conf_read(pc, pa->pa_tag, WB_PCI_PWRMGMTCTRL);
pci_conf_read     737 dev/pci/if_wb.c 			io = pci_conf_read(pc, pa->pa_tag, WB_PCI_LOIO);
pci_conf_read     738 dev/pci/if_wb.c 			mem = pci_conf_read(pc, pa->pa_tag, WB_PCI_LOMEM);
pci_conf_read     739 dev/pci/if_wb.c 			irq = pci_conf_read(pc, pa->pa_tag, WB_PCI_INTLINE);
pci_conf_read     791 dev/pci/if_wb.c 	sc->wb_cachesize = pci_conf_read(pc, pa->pa_tag, WB_PCI_CACHELEN)&0xff;
pci_conf_read     188 dev/pci/if_wpi.c 	data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
pci_conf_read     368 dev/pci/if_wpi.c 	data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
pci_conf_read    2762 dev/pci/if_wpi.c 	rev = pci_conf_read(sc->sc_pct, sc->sc_pcitag, PCI_CLASS_REG);
pci_conf_read     379 dev/pci/if_xge.c 			sc->sc_pciregs[i/4] = pci_conf_read(pa->pa_pc, pa->pa_tag, i);
pci_conf_read     191 dev/pci/if_xl_pci.c 	command = pci_conf_read(pc, pa->pa_tag, XL_PCI_CAPID) & 0xff;
pci_conf_read     194 dev/pci/if_xl_pci.c 		command = pci_conf_read(pc, pa->pa_tag,
pci_conf_read     200 dev/pci/if_xl_pci.c 			io = pci_conf_read(pc, pa->pa_tag, XL_PCI_LOIO);
pci_conf_read     201 dev/pci/if_xl_pci.c 			mem = pci_conf_read(pc, pa->pa_tag, XL_PCI_LOMEM);
pci_conf_read     202 dev/pci/if_xl_pci.c 			irq = pci_conf_read(pc, pa->pa_tag, XL_PCI_INTLINE);
pci_conf_read     116 dev/pci/iop_pci.c 		reg = pci_conf_read(pc, pa->pa_tag, i);
pci_conf_read     379 dev/pci/isp_pci.c 		    pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBVEND_0);
pci_conf_read     465 dev/pci/isp_pci.c 	rev = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG) & 0xff;
pci_conf_read     580 dev/pci/isp_pci.c 		data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG);
pci_conf_read     613 dev/pci/isp_pci.c 		data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG);
pci_conf_read     646 dev/pci/isp_pci.c 	data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     666 dev/pci/isp_pci.c 	data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
pci_conf_read     673 dev/pci/isp_pci.c 	data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCIR_ROMADDR);
pci_conf_read    1248 dev/pci/isp_pci.c 	    pci_conf_read(pcs->pci_pc, pcs->pci_tag, PCI_COMMAND_STATUS_REG));
pci_conf_read     110 dev/pci/jmb.c  	ctl0 = pci_conf_read(pa->pa_pc, pa->pa_tag, JM_PCI_CTL0);
pci_conf_read     111 dev/pci/jmb.c  	ctl5 = pci_conf_read(pa->pa_pc, pa->pa_tag, JM_PCI_CTL5);
pci_conf_read     796 dev/pci/maestro.c 	data = pci_conf_read(sc->pc, sc->pt, CONF_LEGACY);
pci_conf_read     804 dev/pci/maestro.c 	data = pci_conf_read(sc->pc, sc->pt, CONF_MAESTRO);
pci_conf_read    1453 dev/pci/maestro.c 		if (pci_conf_read(sc->pc, sc->pt, 0x58) & 1)
pci_conf_read    1550 dev/pci/maestro.c 	data = pci_conf_read(sc->pc, sc->pt, CONF_PM_PTR);
pci_conf_read    1551 dev/pci/maestro.c 	data = pci_conf_read(sc->pc, sc->pt, data);
pci_conf_read     112 dev/pci/mfi_pci.c 	subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read      56 dev/pci/mpi_pci.c #define PREAD(s, r)	pci_conf_read((s)->psc_pc, (s)->psc_tag, (r))
pci_conf_read     142 dev/pci/mpi_pci.c 	if (pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ID_REG) ==
pci_conf_read     169 dev/pci/nviic.c 		reg = pci_conf_read(pa->pa_pc, pa->pa_tag, baseregs[i]);
pci_conf_read     356 dev/pci/pccbb.c 	command = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     401 dev/pci/pccbb.c 	sock_base = pci_conf_read(pc, pa->pa_tag, PCI_SOCKBASE);
pci_conf_read     439 dev/pci/pccbb.c 	busreg = pci_conf_read(pc, pa->pa_tag, PCI_BUSNUM);
pci_conf_read     512 dev/pci/pccbb.c 		reg = pci_conf_read(pc, pa->pa_tag, PCI_BCR_INTR);
pci_conf_read     565 dev/pci/pccbb.c 		    sc->sc_dev.dv_xname, sockbase, pci_conf_read(pc, sc->sc_tag,
pci_conf_read     594 dev/pci/pccbb.c 		pcireg_t busreg = pci_conf_read(pc, sc->sc_tag, PCI_BUSNUM);
pci_conf_read     595 dev/pci/pccbb.c 		pcireg_t bhlc = pci_conf_read(pc, sc->sc_tag, PCI_BHLC_REG);
pci_conf_read     672 dev/pci/pccbb.c 	reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     681 dev/pci/pccbb.c 	reg = pci_conf_read(pc, tag, PCI_CB_LSCP_REG);
pci_conf_read     688 dev/pci/pccbb.c 	    PCI_CB_LATENCY(reg), pci_conf_read(pc, tag, PCI_CB_LSCP_REG)));
pci_conf_read     693 dev/pci/pccbb.c 	reg = pci_conf_read(pc, tag, PCI_BHLC_REG);
pci_conf_read     700 dev/pci/pccbb.c 	    PCI_LATTIMER(reg), pci_conf_read(pc, tag, PCI_BHLC_REG)));
pci_conf_read     703 dev/pci/pccbb.c 	reg = pci_conf_read(pc, tag, PCI_BCR_INTR);
pci_conf_read     711 dev/pci/pccbb.c 		reg = pci_conf_read(pc, tag, PCI_CBCTRL);
pci_conf_read     732 dev/pci/pccbb.c 		reg = pci_conf_read(pc, tag, PCI12XX_MFUNC);
pci_conf_read     736 dev/pci/pccbb.c 			if ((pci_conf_read(pc, tag, PCI_SYSCTRL) &
pci_conf_read     753 dev/pci/pccbb.c 		reg = pci_conf_read(pc, tag, PCI_SYSCTRL);
pci_conf_read     756 dev/pci/pccbb.c 		reg = pci_conf_read(pc, tag, PCI_CBCTRL);
pci_conf_read     762 dev/pci/pccbb.c 		reg = pci_conf_read(pc, tag, TOPIC_SOCKET_CTRL);
pci_conf_read     766 dev/pci/pccbb.c 		reg = pci_conf_read(pc, tag, TOPIC_SLOT_CTRL);
pci_conf_read     777 dev/pci/pccbb.c 		reg = pci_conf_read(pc, tag, TOPIC_SLOT_CTRL);
pci_conf_read     794 dev/pci/pccbb.c 		reg = pci_conf_read(pc, tag, TOPIC100_PMCSR);
pci_conf_read     810 dev/pci/pccbb.c 		reg = pci_conf_read(pc, tag, O2MICRO_RESERVED1);
pci_conf_read     813 dev/pci/pccbb.c 		reg = pci_conf_read(pc, tag, O2MICRO_RESERVED2);
pci_conf_read    1434 dev/pci/pccbb.c 	u_int32_t bcr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR);
pci_conf_read    1501 dev/pci/pccbb.c 	    pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read    1606 dev/pci/pccbb.c 		reg = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR);
pci_conf_read    1612 dev/pci/pccbb.c 			reg = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_CBCTRL);
pci_conf_read    1683 dev/pci/pccbb.c 		reg = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_BCR_INTR);
pci_conf_read    1689 dev/pci/pccbb.c 			reg = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_CBCTRL);
pci_conf_read    1714 dev/pci/pccbb.c 		printf(" %08x", pci_conf_read(pc, tag, i));
pci_conf_read    1720 dev/pci/pccbb.c 		printf(" %08x", pci_conf_read(pc, tag, i));
pci_conf_read    1778 dev/pci/pccbb.c 	return pci_conf_read(sc->sc_pc, tag, offset);
pci_conf_read    3036 dev/pci/pccbb.c 	    pci_conf_read(pc, tag, offs),
pci_conf_read    3037 dev/pci/pccbb.c 	    pci_conf_read(pc, tag, offs + 4) + align,
pci_conf_read    3038 dev/pci/pccbb.c 	    pci_conf_read(pc, tag, offs + 8),
pci_conf_read    3039 dev/pci/pccbb.c 	    pci_conf_read(pc, tag, offs + 12) + align));
pci_conf_read    3042 dev/pci/pccbb.c 		pcireg_t bcr = pci_conf_read(pc, tag, PCI_BCR_INTR);
pci_conf_read    3078 dev/pci/pccbb.c 		if (pci_conf_read (sc->sc_pc, sc->sc_tag, PCI_SOCKBASE) == 0)
pci_conf_read    3082 dev/pci/pccbb.c 		if (pci_conf_read (sc->sc_pc, sc->sc_tag, PCI_BUSNUM) == 0)
pci_conf_read     177 dev/pci/pci.c  			       pd->pd_map[i] = pci_conf_read(sc->sc_pc,
pci_conf_read     179 dev/pci/pci.c  			pd->pd_csr = pci_conf_read(sc->sc_pc, pd->pd_tag,
pci_conf_read     181 dev/pci/pci.c  			pd->pd_bhlc = pci_conf_read(sc->sc_pc, pd->pd_tag,
pci_conf_read     183 dev/pci/pci.c  			pd->pd_int = pci_conf_read(sc->sc_pc, pd->pd_tag,
pci_conf_read     190 dev/pci/pci.c  			reg = pci_conf_read(sc->sc_pc, pd->pd_tag,
pci_conf_read     253 dev/pci/pci.c  	bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
pci_conf_read     257 dev/pci/pci.c  	id = pci_conf_read(pc, tag, PCI_ID_REG);
pci_conf_read     258 dev/pci/pci.c  	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     259 dev/pci/pci.c  	class = pci_conf_read(pc, tag, PCI_CLASS_REG);
pci_conf_read     306 dev/pci/pci.c  	intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
pci_conf_read     333 dev/pci/pci.c  				reg = pci_conf_read(pc, tag, PCI_BHLC_REG);
pci_conf_read     358 dev/pci/pci.c  	reg = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     363 dev/pci/pci.c  	reg = pci_conf_read(pc, tag, PCI_BHLC_REG);
pci_conf_read     375 dev/pci/pci.c  	ofs = PCI_CAPLIST_PTR(pci_conf_read(pc, tag, ofs));
pci_conf_read     381 dev/pci/pci.c  		reg = pci_conf_read(pc, tag, ofs);
pci_conf_read     431 dev/pci/pci.c  		bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
pci_conf_read     435 dev/pci/pci.c  		id = pci_conf_read(pc, tag, PCI_ID_REG);
pci_conf_read     578 dev/pci/pci.c  			io->pi_data = pci_conf_read(pc, tag, io->pi_reg);
pci_conf_read      86 dev/pci/pci_map.c 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_read      90 dev/pci/pci_map.c 	address = pci_conf_read(pc, tag, reg);
pci_conf_read      92 dev/pci/pci_map.c 	mask = pci_conf_read(pc, tag, reg);
pci_conf_read     157 dev/pci/pci_map.c 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     161 dev/pci/pci_map.c 	address = pci_conf_read(pc, tag, reg);
pci_conf_read     163 dev/pci/pci_map.c 	mask = pci_conf_read(pc, tag, reg);
pci_conf_read     166 dev/pci/pci_map.c 		address1 = pci_conf_read(pc, tag, reg + 4);
pci_conf_read     168 dev/pci/pci_map.c 		mask1 = pci_conf_read(pc, tag, reg + 4);
pci_conf_read     270 dev/pci/pci_map.c 	return (_PCI_MAPREG_TYPEBITS(pci_conf_read(pc, tag, reg)));
pci_conf_read     280 dev/pci/pci_map.c 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     284 dev/pci/pci_map.c 	address = pci_conf_read(pc, tag, reg);
pci_conf_read     286 dev/pci/pci_map.c 	mask = pci_conf_read(pc, tag, reg);
pci_conf_read     332 dev/pci/pci_map.c 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     150 dev/pci/pciide.c 	return (pci_conf_read(pc, pa, (reg & ~0x03)) >>
pci_conf_read     159 dev/pci/pciide.c 	pcival = pci_conf_read(pc, pa, (reg & ~0x03));
pci_conf_read    1277 dev/pci/pciide.c 	    pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG)),
pci_conf_read    1293 dev/pci/pciide.c 	csr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read    2031 dev/pci/pciide.c 		csr = pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read    2184 dev/pci/pciide.c 	    pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_IDETIM)),
pci_conf_read    2189 dev/pci/pciide.c 		    pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_SIDETIM)),
pci_conf_read    2193 dev/pci/pciide.c 			    pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_UDMAREG)),
pci_conf_read    2213 dev/pci/pciide.c 			    pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_CONFIG)),
pci_conf_read    2307 dev/pci/pciide.c 		idetim = pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_IDETIM);
pci_conf_read    2458 dev/pci/pciide.c 	oidetim = pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_IDETIM);
pci_conf_read    2567 dev/pci/pciide.c 	oidetim = pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_IDETIM);
pci_conf_read    2568 dev/pci/pciide.c 	sidetim = pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_SIDETIM);
pci_conf_read    2569 dev/pci/pciide.c 	udmareg = pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_UDMAREG);
pci_conf_read    2570 dev/pci/pciide.c 	ideconf = pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_CONFIG);
pci_conf_read    2823 dev/pci/pciide.c 	chanenable = pci_conf_read(sc->sc_pc, sc->sc_tag, AMD756_CHANSTATUS_EN);
pci_conf_read    2875 dev/pci/pciide.c 	datatim_reg = pci_conf_read(sc->sc_pc, sc->sc_tag, AMD756_DATATIM);
pci_conf_read    2876 dev/pci/pciide.c 	udmatim_reg = pci_conf_read(sc->sc_pc, sc->sc_tag, AMD756_UDMA);
pci_conf_read    2879 dev/pci/pciide.c 	chanenable = pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read    3002 dev/pci/pciide.c 		id = pci_conf_read(sc->sc_pc, tag, PCI_ID_REG);
pci_conf_read    3003 dev/pci/pciide.c 		class = pci_conf_read(sc->sc_pc, tag, PCI_CLASS_REG);
pci_conf_read    3012 dev/pci/pciide.c 			id = pci_conf_read(sc->sc_pc, tag, PCI_ID_REG);
pci_conf_read    3013 dev/pci/pciide.c 			class = pci_conf_read(sc->sc_pc, tag, PCI_CLASS_REG);
pci_conf_read    3082 dev/pci/pciide.c 	    pci_conf_read(sc->sc_pc, sc->sc_tag, APO_IDECONF),
pci_conf_read    3083 dev/pci/pciide.c 	    pci_conf_read(sc->sc_pc, sc->sc_tag, APO_CTLMISC),
pci_conf_read    3084 dev/pci/pciide.c 	    pci_conf_read(sc->sc_pc, sc->sc_tag, APO_DATATIM),
pci_conf_read    3085 dev/pci/pciide.c 	    pci_conf_read(sc->sc_pc, sc->sc_tag, APO_UDMA)),
pci_conf_read    3093 dev/pci/pciide.c 		ideconf = pci_conf_read(sc->sc_pc, sc->sc_tag, APO_IDECONF);
pci_conf_read    3122 dev/pci/pciide.c 	    pci_conf_read(sc->sc_pc, sc->sc_tag, APO_DATATIM),
pci_conf_read    3123 dev/pci/pciide.c 	    pci_conf_read(sc->sc_pc, sc->sc_tag, APO_UDMA)), DEBUG_PROBE);
pci_conf_read    3137 dev/pci/pciide.c 	datatim_reg = pci_conf_read(sc->sc_pc, sc->sc_tag, APO_DATATIM);
pci_conf_read    3138 dev/pci/pciide.c 	udmatim_reg = pci_conf_read(sc->sc_pc, sc->sc_tag, APO_UDMA);
pci_conf_read    3450 dev/pci/pciide.c 		pci_conf_read(sc->sc_pc, sc->sc_tag, 0x54),
pci_conf_read    3451 dev/pci/pciide.c 		pci_conf_read(sc->sc_pc, sc->sc_tag, 0x58)),
pci_conf_read    3466 dev/pci/pciide.c 	    pci_conf_read(sc->sc_pc, sc->sc_tag, 0x54),
pci_conf_read    3467 dev/pci/pciide.c 	    pci_conf_read(sc->sc_pc, sc->sc_tag, 0x58)),
pci_conf_read    3768 dev/pci/pciide.c 	cls = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
pci_conf_read    3772 dev/pci/pciide.c 		cls = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
pci_conf_read    3812 dev/pci/pciide.c 	scs_cmd = pci_conf_read(pa->pa_pc, pa->pa_tag, SII3112_SCS_CMD);
pci_conf_read    3830 dev/pci/pciide.c 		cfgctl = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read    4092 dev/pci/pciide.c 	scs_cmd = pci_conf_read(pa->pa_pc, pa->pa_tag, SII3112_SCS_CMD);
pci_conf_read    4497 dev/pci/pciide.c 	    pci_conf_read(sc->sc_pc, sc->sc_tag, CY_CMD_CTRL)), DEBUG_PROBE);
pci_conf_read    4500 dev/pci/pciide.c 	    pci_conf_read(sc->sc_pc, sc->sc_tag, CY_CMD_CTRL)), DEBUG_PROBE);
pci_conf_read    4673 dev/pci/pciide.c 	br_pa.pa_id = pci_conf_read(sc->sc_pc, br_tag, PCI_ID_REG);
pci_conf_read    4674 dev/pci/pciide.c 	br_pa.pa_class = pci_conf_read(sc->sc_pc, br_tag, PCI_CLASS_REG);
pci_conf_read    4691 dev/pci/pciide.c 				br_pa.pa_id = pci_conf_read(sc->sc_pc,
pci_conf_read    4693 dev/pci/pciide.c 				br_pa.pa_class = pci_conf_read(sc->sc_pc,
pci_conf_read    4883 dev/pci/pciide.c 	    pci_conf_read(sc->sc_pc, sc->sc_tag, SIS_TIM(chp->channel))),
pci_conf_read    5008 dev/pci/pciide.c 	interface = PCI_INTERFACE(pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read    5242 dev/pci/pciide.c 	pioformat = (pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read    5255 dev/pci/pciide.c 		piotim = pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read    5257 dev/pci/pciide.c 		dmatim = pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read    5362 dev/pci/pciide.c 	cr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_CLASS_REG);
pci_conf_read    5366 dev/pci/pciide.c 	interface = PCI_INTERFACE(pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read    5419 dev/pci/pciide.c 	acer_fifo_udma = pci_conf_read(sc->sc_pc, sc->sc_tag, ACER_FTH_UDMA);
pci_conf_read    5738 dev/pci/pciide.c 		before = pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read    5881 dev/pci/pciide.c 		st = pci_conf_read(sc->sc_pc, sc->sc_tag, PDC2xx_STATE);
pci_conf_read    5944 dev/pci/pciide.c 			    channel, pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read    5951 dev/pci/pciide.c 			    channel, pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read    6054 dev/pci/pciide.c 		st = pci_conf_read(sc->sc_pc, sc->sc_tag, PDC2xx_STATE);
pci_conf_read    7143 dev/pci/pciide.c 	    (pci_conf_read(pa->pa_pc, pcib_tag, 0x64) & ~0x2000) | 0x4000);
pci_conf_read    7162 dev/pci/pciide.c 	pio_time = pci_conf_read(sc->sc_pc, sc->sc_tag, 0x40);
pci_conf_read    7163 dev/pci/pciide.c 	dma_time = pci_conf_read(sc->sc_pc, sc->sc_tag, 0x44);
pci_conf_read    7164 dev/pci/pciide.c 	pio_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, 0x48);
pci_conf_read    7165 dev/pci/pciide.c 	udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, 0x54);
pci_conf_read    7189 dev/pci/pciide.c 			    (PCI_PRODUCT(pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read    7273 dev/pci/pciide.c 	if (pci_conf_read(sc->sc_pc, sc->sc_tag,
pci_conf_read    7662 dev/pci/pciide.c 		reg = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL);
pci_conf_read    7684 dev/pci/pciide.c 		udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP850_UDMA);
pci_conf_read    7687 dev/pci/pciide.c 		idetime = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_IDETIME);
pci_conf_read    7689 dev/pci/pciide.c 		udma_mode = pci_conf_read(sc->sc_pc, sc->sc_tag, ATP860_UDMA);
pci_conf_read    7746 dev/pci/pciide.c 		    pci_conf_read(sc->sc_pc, sc->sc_tag, ATP8x0_CTRL)
pci_conf_read    7777 dev/pci/pciide.c 	conf = pci_conf_read(sc->sc_pc, sc->sc_tag, NFORCE_CONF);
pci_conf_read    7852 dev/pci/pciide.c 	conf = pci_conf_read(sc->sc_pc, sc->sc_tag, NFORCE_CONF);
pci_conf_read    7853 dev/pci/pciide.c 	piodmatim = pci_conf_read(sc->sc_pc, sc->sc_tag, NFORCE_PIODMATIM);
pci_conf_read    7854 dev/pci/pciide.c 	piotim = pci_conf_read(sc->sc_pc, sc->sc_tag, NFORCE_PIOTIM);
pci_conf_read    7855 dev/pci/pciide.c 	udmatim = pci_conf_read(sc->sc_pc, sc->sc_tag, NFORCE_UDMATIM);
pci_conf_read    8032 dev/pci/pciide.c 	cfg = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_CFG);
pci_conf_read    8033 dev/pci/pciide.c 	modectl = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_MODE);
pci_conf_read    8076 dev/pci/pciide.c 	cfg = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_CFG);
pci_conf_read    8077 dev/pci/pciide.c 	modectl = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_MODE);
pci_conf_read    8095 dev/pci/pciide.c 	cfg = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_CFG);
pci_conf_read    8096 dev/pci/pciide.c 	modectl = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_MODE);
pci_conf_read    8097 dev/pci/pciide.c 	tim = pci_conf_read(sc->sc_pc, sc->sc_tag, IT_TIM(channel));
pci_conf_read    8244 dev/pci/pciide.c 	pio_timing = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_PIO_TIMING);
pci_conf_read    8245 dev/pci/pciide.c 	pio = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_PIO_CTL);
pci_conf_read    8246 dev/pci/pciide.c 	mdma_timing = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_MDMA_TIMING);
pci_conf_read    8247 dev/pci/pciide.c 	udma = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_UDMA_CTL);
pci_conf_read    8328 dev/pci/pciide.c 	conf = pci_conf_read(sc->sc_pc, sc->sc_tag, JMICRON_CONF);
pci_conf_read    8399 dev/pci/pciide.c 	conf = pci_conf_read(sc->sc_pc, sc->sc_tag, JMICRON_CONF);
pci_conf_read     348 dev/pci/pciide_sii3112_reg.h 	rv = pci_conf_read(sc->sc_pc, sc->sc_tag, SII3112_BA5_IND_DATA);
pci_conf_read     120 dev/pci/piixpm.c 	conf = pci_conf_read(pa->pa_pc, pa->pa_tag, PIIX_SMB_HOSTC);
pci_conf_read     130 dev/pci/piixpm.c 	base = pci_conf_read(pa->pa_pc, pa->pa_tag, PIIX_SMB_BASE) & 0xffff;
pci_conf_read     102 dev/pci/ppb.c  	busdata = pci_conf_read(pc, pa->pa_tag, PPB_REG_BUSINFO);
pci_conf_read      96 dev/pci/puc.c  	bhlc = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
pci_conf_read     100 dev/pci/puc.c  	subsys = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     145 dev/pci/puc.c  	subsys = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
pci_conf_read     108 dev/pci/sdhc_pci.c 	slotinfo = pci_conf_read(pa->pa_pc, pa->pa_tag,
pci_conf_read     154 dev/pci/sdhc_pci.c 	id = pci_conf_read(pa->pa_pc, tag, PCI_ID_REG);
pci_conf_read     162 dev/pci/sdhc_pci.c 	reg = pci_conf_read(pa->pa_pc, tag, SDHC_PCI_GENERAL_CTL);
pci_conf_read     111 dev/pci/sti_pci.c 	address = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ROM_REG);
pci_conf_read     113 dev/pci/sti_pci.c 	mask = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_ROM_REG);
pci_conf_read     325 dev/pci/sti_pci.c 	cf = pci_conf_read(pa->pa_pc, pa->pa_tag, bar);
pci_conf_read     355 dev/pci/sti_pci.c 		address = pci_conf_read(spc->sc_pc, spc->sc_tag, PCI_ROM_REG);
pci_conf_read     372 dev/pci/sti_pci.c 		address = pci_conf_read(spc->sc_pc, spc->sc_tag, PCI_ROM_REG);
pci_conf_read     297 dev/pci/sv.c     dmareg = pci_conf_read(pa->pa_pc, pa->pa_tag, SV_DMAA_CONFIG_OFF);
pci_conf_read     319 dev/pci/sv.c     dmareg = pci_conf_read(pa->pa_pc, pa->pa_tag, SV_DMAC_CONFIG_OFF);
pci_conf_read     404 dev/pci/sv.c       printf ("%02x = %x\n", idx, pci_conf_read(sc->sc_pci_chipset_tag,
pci_conf_read    1611 dev/pci/ubsec.c 	misc = pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG);
pci_conf_read     146 dev/pci/uhci_pci.c 	switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) {
pci_conf_read     132 dev/pci/vga_pci.c 	if ((pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG)
pci_conf_read     162 dev/pci/vga_pci.c 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_read     275 dev/pci/viaenv.c 	iobase = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x70);
pci_conf_read     276 dev/pci/viaenv.c 	control = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x74);
pci_conf_read     326 dev/pci/viaenv.c 	control = pci_conf_read(pa->pa_pc, pa->pa_tag, VIAENV_GENCFG);
pci_conf_read     333 dev/pci/viaenv.c 	iobase = pci_conf_read(pa->pa_pc, pa->pa_tag, VIAENV_PMBASE);
pci_conf_read     158 dev/pci/viapm.c 	iobase = pci_conf_read(pa->pa_pc, pa->pa_tag, VIAPM_SMB_BASE);
pci_conf_read     588 dev/pci/yds.c  	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_LEGACY);
pci_conf_read     729 dev/pci/yds.c  	reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_LEGACY);
pci_conf_read     914 dev/pci/yds.c  	reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, YDS_PCI_DSCTRL);
pci_conf_read    1840 dev/pci/yds.c  	reg = pci_conf_read(pc, sc->sc_pcitag, YDS_PCI_DSCTRL);
pci_conf_read    1848 dev/pci/yds.c  	reg = pci_conf_read(pc, sc->sc_pcitag, YDS_PCI_DSCTRL);