PCI_MAPREG_START 244 arch/i386/pci/glxsb.c if (pci_mapreg_map(pa, PCI_MAPREG_START,
PCI_MAPREG_START 198 arch/i386/pci/pci_addr_fixup.c reg_start = PCI_MAPREG_START;
PCI_MAPREG_START 202 arch/i386/pci/pci_addr_fixup.c reg_start = PCI_MAPREG_START;
PCI_MAPREG_START 206 arch/i386/pci/pci_addr_fixup.c reg_start = PCI_MAPREG_START;
PCI_MAPREG_START 108 dev/cardbus/cardbus_map.c if (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3)) {
PCI_MAPREG_START 165 dev/cardbus/cardbus_map.c (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3))) {
PCI_MAPREG_START 110 dev/cardbus/puc_cardbus.c bar = PCI_MAPREG_START + 4 * i;
PCI_MAPREG_START 246 dev/ic/aic6915.h #define SF_PCI_MEMBA (PCI_MAPREG_START + 0x00)
PCI_MAPREG_START 247 dev/ic/aic6915.h #define SF_PCI_IOBA (PCI_MAPREG_START + 0x08)
PCI_MAPREG_START 1365 dev/ic/aic79xx.h #define AHD_PCI_IOADDR PCI_MAPREG_START /* I/O BAR*/
PCI_MAPREG_START 1366 dev/ic/aic79xx.h #define AHD_PCI_MEMADDR (PCI_MAPREG_START + 4) /* Memory BAR */
PCI_MAPREG_START 1367 dev/ic/aic79xx.h #define AHD_PCI_IOADDR1 (PCI_MAPREG_START + 12)/* Second I/O BAR */
PCI_MAPREG_START 245 dev/pci/aac_pci.c if (pci_mapreg_map(pa, PCI_MAPREG_START,
PCI_MAPREG_START 70 dev/pci/ahc_pci.c #define AHC_PCI_IOADDR PCI_MAPREG_START /* I/O Address */
PCI_MAPREG_START 71 dev/pci/ahc_pci.c #define AHC_PCI_MEMADDR (PCI_MAPREG_START + 4) /* Mem I/O Address */
PCI_MAPREG_START 48 dev/pci/ami_pci.c #define AMI_BAR PCI_MAPREG_START
PCI_MAPREG_START 78 dev/pci/arc.c #define ARC_PCI_BAR PCI_MAPREG_START
PCI_MAPREG_START 187 dev/pci/bktr/bktr_os.c retval = pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM |
PCI_MAPREG_START 46 dev/pci/cmpcireg.h #define CMPCI_PCI_IOBASEREG (PCI_MAPREG_START)
PCI_MAPREG_START 50 dev/pci/hifn7751reg.h #define HIFN_BAR0 (PCI_MAPREG_START + 0) /* PUC register map */
PCI_MAPREG_START 51 dev/pci/hifn7751reg.h #define HIFN_BAR1 (PCI_MAPREG_START + 4) /* DMA register map */
PCI_MAPREG_START 1452 dev/pci/if_em.c for (rid = PCI_MAPREG_START; rid < PCI_MAPREG_END;) {
PCI_MAPREG_START 70 dev/pci/if_fpa.c #define DEFPA_CBMA (PCI_MAPREG_START + 0) /* Config Base Memory Address */
PCI_MAPREG_START 71 dev/pci/if_fpa.c #define DEFPA_CBIO (PCI_MAPREG_START + 4) /* Config Base I/O Address */
PCI_MAPREG_START 30 dev/pci/if_myxreg.h #define MYXBAR0 PCI_MAPREG_START
PCI_MAPREG_START 131 dev/pci/if_pcn.c #define PCN_PCI_CBIO (PCI_MAPREG_START + 0x00)
PCI_MAPREG_START 132 dev/pci/if_pcn.c #define PCN_PCI_CBMEM (PCI_MAPREG_START + 0x04)
PCI_MAPREG_START 144 dev/pci/if_stgereg.h #define STGE_PCI_IOBA (PCI_MAPREG_START + 0x00)
PCI_MAPREG_START 145 dev/pci/if_stgereg.h #define STGE_PCI_MMBA (PCI_MAPREG_START + 0x04)
PCI_MAPREG_START 57 dev/pci/if_vic.c #define VIC_PCI_BAR PCI_MAPREG_START /* Base Address Register */
PCI_MAPREG_START 97 dev/pci/iha_pci.c ioh_valid = pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0,
PCI_MAPREG_START 115 dev/pci/iop_pci.c for (i = PCI_MAPREG_START; i < PCI_MAPREG_END; i += 4) {
PCI_MAPREG_START 173 dev/pci/ises.c if (pci_mapreg_map(pa, PCI_MAPREG_START,
PCI_MAPREG_START 145 dev/pci/mbg.c memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
PCI_MAPREG_START 146 dev/pci/mbg.c if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0, &sc->sc_iot,
PCI_MAPREG_START 107 dev/pci/mpi_pci.c for (r = PCI_MAPREG_START; r < PCI_MAPREG_END; r += sizeof(memtype)) {
PCI_MAPREG_START 51 dev/pci/pci.c #define NMAPREG ((PCI_MAPREG_END - PCI_MAPREG_START) / \
PCI_MAPREG_START 178 dev/pci/pci.c pd->pd_tag, PCI_MAPREG_START + (i * 4));
PCI_MAPREG_START 188 dev/pci/pci.c PCI_MAPREG_START + (i * 4),
PCI_MAPREG_START 64 dev/pci/pci_map.c if (reg < PCI_MAPREG_START ||
PCI_MAPREG_START 132 dev/pci/pci_map.c if (reg < PCI_MAPREG_START ||
PCI_MAPREG_START 3821 dev/pci/pciide.c if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
PCI_MAPREG_START 4110 dev/pci/pciide.c if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
PCI_MAPREG_START 7274 dev/pci/pciide.c PCI_MAPREG_START + 0x14) == 0) {
PCI_MAPREG_START 7279 dev/pci/pciide.c if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x14,
PCI_MAPREG_START 49 dev/pci/pciide_i31244_reg.h #define ARTISEA_PCI_DPA_BASE PCI_MAPREG_START
PCI_MAPREG_START 188 dev/pci/puc.c bar = PCI_MAPREG_START + 4 * i;
PCI_MAPREG_START 65 dev/pci/pucvar.h #define PUC_PORT_BAR_INDEX(bar) (((bar) - PCI_MAPREG_START) / 4)
PCI_MAPREG_START 73 dev/pci/pwdog.c memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
PCI_MAPREG_START 74 dev/pci/pwdog.c if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0, &pwdog->iot,
PCI_MAPREG_START 317 dev/pci/sti_pci.c if (bar < PCI_MAPREG_START || bar > PCI_MAPREG_PPB_END) {
PCI_MAPREG_START 119 dev/pci/trm_pci.c if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0,
PCI_MAPREG_START 23 dev/sdmmc/sdhcreg.h #define SDHC_PCI_BAR_START PCI_MAPREG_START