drive 149 dev/ata/ata_wdc.c xfer->drive = drvp->drive;
drive 165 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
drive 178 dev/ata/ata_wdc.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
drive 186 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
drive 199 dev/ata/ata_wdc.c xfer->drive, drvp->state);
drive 203 dev/ata/ata_wdc.c wdc_set_drive(chp, xfer->drive);
drive 206 dev/ata/ata_wdc.c wdccommandshort(chp, xfer->drive, WDCC_RECAL);
drive 266 dev/ata/ata_wdc.c chp->channel, xfer->drive,
drive 275 dev/ata/ata_wdc.c wdc_set_drive(chp, xfer->drive);
drive 279 dev/ata/ata_wdc.c wdccommandext(chp, xfer->drive, cmd,
drive 282 dev/ata/ata_wdc.c wdccommand(chp, xfer->drive, cmd, cyl,
drive 287 dev/ata/ata_wdc.c chp->channel, xfer->drive);
drive 310 dev/ata/ata_wdc.c wdc_set_drive(chp, xfer->drive);
drive 314 dev/ata/ata_wdc.c wdccommandext(chp, xfer->drive, cmd,
drive 317 dev/ata/ata_wdc.c wdccommand(chp, xfer->drive, cmd, cyl,
drive 336 dev/ata/ata_wdc.c xfer->drive, chp->ch_status, WDCS_BITS,
drive 368 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
drive 380 dev/ata/ata_wdc.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
drive 384 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
drive 391 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
drive 409 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
drive 430 dev/ata/ata_wdc.c xfer->drive, chp->ch_status, WDCS_BITS);
drive 451 dev/ata/ata_wdc.c xfer->drive);
drive 512 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
drive 541 dev/ata/ata_wdc.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
drive 574 dev/ata/ata_wdc.c wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
drive 591 dev/ata/ata_wdc.c wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
drive 594 dev/ata/ata_wdc.c wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
drive 615 dev/ata/ata_wdc.c wdccommand(chp, xfer->drive, WDCC_IDP,
drive 637 dev/ata/ata_wdc.c wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0,
drive 675 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
drive 682 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
drive 43 dev/ata/atavar.h u_int8_t drive; /* drive number */
drive 159 dev/ata/wd.c #define sc_drive sc_wdc_bio.drive
drive 215 dev/ata/wd.c match->cf_loc[1] != aa_link->aa_drv_data->drive)
drive 164 dev/atapiscsi/atapiscsi.c int drive;
drive 248 dev/atapiscsi/atapiscsi.c as->drive = drvp->drive;
drive 328 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[as->drive];
drive 334 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, as->drive), DEBUG_XFERS);
drive 348 dev/atapiscsi/atapiscsi.c xfer->drive = as->drive;
drive 359 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, as->drive),
drive 453 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[as->drive];
drive 513 dev/atapiscsi/atapiscsi.c wdc_atapi_drive_selected(chp, drive)
drive 515 dev/atapiscsi/atapiscsi.c int drive;
drive 521 dev/atapiscsi/atapiscsi.c return ((reg & 0x10) == (drive << 4));
drive 740 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
drive 757 dev/atapiscsi/atapiscsi.c wdc_set_drive(chp, xfer->drive);
drive 766 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive,
drive 782 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
drive 817 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
drive 828 dev/atapiscsi/atapiscsi.c wdccommand(chp, xfer->drive, ATAPI_PKT_CMD,
drive 847 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive
drive 860 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
drive 890 dev/atapiscsi/atapiscsi.c WDC_LOG_ATAPI_CMD(chp, xfer->drive, xfer->c_flags,
drive 900 dev/atapiscsi/atapiscsi.c chp->channel, xfer->drive, xfer->databuf,
drive 914 dev/atapiscsi/atapiscsi.c chp->channel, xfer->drive);
drive 950 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive);
drive 1017 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
drive 1107 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
drive 1137 dev/atapiscsi/atapiscsi.c xfer->drive, 1);
drive 1247 dev/atapiscsi/atapiscsi.c if (!wdc_atapi_drive_selected(chp, xfer->drive)) {
drive 1249 dev/atapiscsi/atapiscsi.c wdc_set_drive(chp, xfer->drive);
drive 1312 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
drive 1330 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
drive 1348 dev/atapiscsi/atapiscsi.c if (!wdc_atapi_drive_selected(chp, xfer->drive))
drive 1350 dev/atapiscsi/atapiscsi.c wdc_set_drive(chp, xfer->drive);
drive 1402 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive, drvp->state),
drive 1425 dev/atapiscsi/atapiscsi.c wdccommandshort(chp, drvp->drive, ATAPI_DEVICE_RESET);
drive 1435 dev/atapiscsi/atapiscsi.c wdccommandshort(chp, drvp->drive, ATAPI_IDENTIFY_DEVICE);
drive 1471 dev/atapiscsi/atapiscsi.c wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
drive 1489 dev/atapiscsi/atapiscsi.c wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
drive 1492 dev/atapiscsi/atapiscsi.c wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
drive 1520 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
drive 1564 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
drive 1566 dev/atapiscsi/atapiscsi.c WDC_LOG_ATAPI_DONE(chp, xfer->drive, xfer->c_flags, sc_xfer->error);
drive 1589 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
drive 1597 dev/atapiscsi/atapiscsi.c wdccommandshort(chp, xfer->drive, ATAPI_SOFT_RESET);
drive 1617 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
drive 1623 dev/atapiscsi/atapiscsi.c xfer->drive);
drive 115 dev/ic/cac.c int drive, int blkno, int flags, struct scsi_xfer *xs);
drive 318 dev/ic/cac.c int drive, int blkno, int flags, struct scsi_xfer *xs)
drive 326 dev/ic/cac.c command, drive, blkno, data, datasize, flags, xs);
drive 361 dev/ic/cac.c ccb->ccb_hdr.drive = drive;
drive 185 dev/ic/cacreg.h u_int8_t drive; /* logical drive */
drive 441 dev/ic/wdc.c aa_link->aa_drv_data->drive);
drive 460 dev/ic/wdc.c wdc_set_drive(struct channel_softc *chp, int drive)
drive 462 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_sdh, (drive << 4) | WDSD_IBM);
drive 463 dev/ic/wdc.c WDC_LOG_SET_DRIVE(chp, drive);
drive 467 dev/ic/wdc.c wdc_floating_bus(chp, drive)
drive 469 dev/ic/wdc.c int drive;
drive 475 dev/ic/wdc.c wdc_set_drive(chp, drive);
drive 503 dev/ic/wdc.c wdc_preata_drive(chp, drive)
drive 505 dev/ic/wdc.c int drive;
drive 508 dev/ic/wdc.c if (wdc_floating_bus(chp, drive)) {
drive 511 dev/ic/wdc.c chp->channel, drive), DEBUG_PROBE);
drive 515 dev/ic/wdc.c wdc_set_drive(chp, drive);
drive 520 dev/ic/wdc.c chp->channel, drive), DEBUG_PROBE);
drive 529 dev/ic/wdc.c chp->channel, drive), DEBUG_PROBE);
drive 537 dev/ic/wdc.c wdc_ata_present(chp, drive)
drive 539 dev/ic/wdc.c int drive;
drive 544 dev/ic/wdc.c wdc_set_drive(chp, drive);
drive 563 dev/ic/wdc.c wdccommandshort(chp, drive, WDCC_CHECK_PWR);
drive 570 dev/ic/wdc.c chp->channel, drive, chp->ch_status),
drive 579 dev/ic/wdc.c chp->channel, drive, chp->ch_status),
drive 587 dev/ic/wdc.c chp->channel, drive, time_to_done), DEBUG_PROBE);
drive 601 dev/ic/wdc.c chp->channel, drive), DEBUG_PROBE);
drive 630 dev/ic/wdc.c u_int8_t drive;
drive 687 dev/ic/wdc.c for (drive = 0; drive < 2; drive++) {
drive 688 dev/ic/wdc.c if ((ret_value & (0x01 << drive)) == 0)
drive 690 dev/ic/wdc.c wdc_set_drive(chp, drive);
drive 703 dev/ic/wdc.c chp->channel, drive, st0, WDCS_BITS, sc, sn, cl, ch),
drive 711 dev/ic/wdc.c chp->ch_drive[drive].drive_flags |= DRIVE_ATAPI;
drive 717 dev/ic/wdc.c for (drive = 0; drive < 2; drive++) {
drive 718 dev/ic/wdc.c if ((ret_value & (0x01 << drive)) == 0)
drive 720 dev/ic/wdc.c if (chp->ch_drive[drive].drive_flags & DRIVE_ATAPI)
drive 725 dev/ic/wdc.c if (wdc_ata_present(chp, drive)) {
drive 726 dev/ic/wdc.c chp->ch_drive[drive].drive_flags |= DRIVE_ATA;
drive 729 dev/ic/wdc.c chp->ch_drive[drive].drive_flags |= DRIVE_OLD;
drive 731 dev/ic/wdc.c ret_value &= ~(1 << drive);
drive 833 dev/ic/wdc.c drvp->drive = i;
drive 947 dev/ic/wdc.c chp->channel, xfer->drive), DEBUG_XFERS);
drive 949 dev/ic/wdc.c if (chp->ch_drive[xfer->drive].drive_flags & DRIVE_RESET) {
drive 950 dev/ic/wdc.c chp->ch_drive[xfer->drive].drive_flags &= ~DRIVE_RESET;
drive 951 dev/ic/wdc.c chp->ch_drive[xfer->drive].state = 0;
drive 1004 dev/ic/wdc.c xfer->drive, 0);
drive 1023 dev/ic/wdc.c int drive;
drive 1025 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive),
drive 1028 dev/ic/wdc.c for (drive = 0; drive < 2; drive++) {
drive 1029 dev/ic/wdc.c chp->ch_drive[drive].state = 0;
drive 1184 dev/ic/wdc.c xfer->drive,
drive 1204 dev/ic/wdc.c chp->channel, xfer->drive, 0);
drive 1211 dev/ic/wdc.c chp->channel, xfer->drive, 1);
drive 1243 dev/ic/wdc.c chp->channel, xfer->drive, 1);
drive 1595 dev/ic/wdc.c int drive;
drive 1598 dev/ic/wdc.c for (drive = 0; drive < 2; drive++) {
drive 1599 dev/ic/wdc.c drvp = &chp->ch_drive[drive];
drive 1605 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, drive);
drive 1689 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive),
drive 1701 dev/ic/wdc.c xfer->drive = drvp->drive;
drive 1740 dev/ic/wdc.c int drive = xfer->drive;
drive 1744 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
drive 1754 dev/ic/wdc.c wdc_set_drive(chp, drive);
drive 1769 dev/ic/wdc.c wdccommand(chp, drive, wdc_c->r_command, wdc_c->r_cyl, wdc_c->r_head,
drive 1786 dev/ic/wdc.c wdc_output_bytes(&chp->ch_drive[drive],
drive 1815 dev/ic/wdc.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
drive 1821 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), DEBUG_INTR);
drive 1853 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
drive 1896 dev/ic/wdc.c wdccommand(chp, drive, command, cylin, head, sector, count, precomp)
drive 1898 dev/ic/wdc.c u_int8_t drive;
drive 1905 dev/ic/wdc.c chp->channel, drive, command, cylin, head, sector, count, precomp),
drive 1911 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_sdh, WDSD_IBM | (drive << 4) | head);
drive 1929 dev/ic/wdc.c wdccommandext(chp, drive, command, blkno, count)
drive 1931 dev/ic/wdc.c u_int8_t drive;
drive 1938 dev/ic/wdc.c chp->channel, drive, command, blkno, count),
drive 1944 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_sdh, (drive << 4) | WDSD_LBA);
drive 1964 dev/ic/wdc.c wdccommandshort(chp, drive, command)
drive 1966 dev/ic/wdc.c int drive;
drive 1971 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, drive, command),
drive 1976 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_sdh, WDSD_IBM | (drive << 4));
drive 1988 dev/ic/wdc.c xfer, xfer->c_flags, chp->channel, xfer->drive), DEBUG_XFERS);
drive 2071 dev/ic/wdc.c chp->ch_drive[xfer->drive].drive_name,
drive 2073 dev/ic/wdc.c chp->channel, xfer->drive, msg);
drive 64 dev/ic/wdcevent.h static __inline void WDC_LOG_ATAPI_CMD(struct channel_softc *chp, int drive,
drive 75 dev/ic/wdcevent.h static __inline void WDC_LOG_ATAPI_DONE(struct channel_softc *chp, int drive,
drive 95 dev/ic/wdcevent.h u_int8_t drive) {
drive 96 dev/ic/wdcevent.h wdc_log(chp, drive ? WDCEVENT_SET_DRIVE1 : WDCEVENT_SET_DRIVE0,
drive 237 dev/ic/wdcvar.h u_int8_t drive;
drive 312 dev/ic/wdcvar.h void wdc_set_drive(struct channel_softc *, int drive);
drive 166 dev/isa/fd.c int drive = fa->fa_drive;
drive 171 dev/isa/fd.c if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != drive)
drive 178 dev/isa/fd.c if (cf->cf_loc[0] == -1 && drive >= 2)
drive 187 dev/isa/fd.c bus_space_write_1(iot, ioh, fdout, drive | FDO_FRST | FDO_MOEN(drive));
drive 191 dev/isa/fd.c out_fdc(iot, ioh, drive);
drive 229 dev/isa/fd.c int drive = fa->fa_drive;
drive 269 dev/isa/fd.c fd->sc_drive = drive;
drive 271 dev/isa/fd.c fdc->sc_type[drive] = FDC_TYPE_DISK;
drive 272 dev/isa/fd.c fdc->sc_link.fdlink.sc_fd[drive] = fd;
drive 295 dev/isa/fd.c fd_nvtotype(fdc, nvraminfo, drive)
drive 297 dev/isa/fd.c int nvraminfo, drive;
drive 307 dev/isa/fd.c type = (drive == 0 ? nvraminfo : nvraminfo << 4) & 0xf0;
drive 324 dev/isa/fd.c fdc, drive, type);
drive 198 dev/isa/wdc_isa.c wdc_isa_dma_init(void *v, int channel, int drive, void *databuf, size_t datalen,
drive 211 dev/isa/wdc_isa.c wdc_isa_dma_start(void *v, int channel, int drive)
drive 217 dev/isa/wdc_isa.c wdc_isa_dma_finish(void *v, int channel, int drive, int force)
drive 117 dev/pci/ips.c u_int8_t drive;
drive 169 dev/pci/ips.c } drive[IPS_MAXDRIVES];
drive 499 dev/pci/ips.c struct ips_drive *drive;
drive 521 dev/pci/ips.c drive = &sc->sc_di.drive[target];
drive 541 dev/pci/ips.c if (blkno >= letoh32(drive->seccnt) || blkno + blkcnt >
drive 542 dev/pci/ips.c letoh32(drive->seccnt)) {
drive 590 dev/pci/ips.c "ServeRAID RAID%d #%02d", drive->raid, target);
drive 596 dev/pci/ips.c _lto4b(letoh32(drive->seccnt) - 1, rcd->addr);
drive 625 dev/pci/ips.c ips_cmd(struct ips_softc *sc, int code, int drive, u_int32_t lba, void *data,
drive 634 dev/pci/ips.c "size %lu, flags 0x%02x\n", sc->sc_dev.dv_xname, code, drive, lba,
drive 650 dev/pci/ips.c cmd->drive = drive;
drive 1577 dev/pci/pciide.c int drive;
drive 1581 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 1582 dev/pci/pciide.c drvp = &cp->wdc_channel.ch_drive[drive];
drive 1593 dev/pci/pciide.c if (pciide_dma_table_setup(sc, cp->wdc_channel.channel, drive)
drive 1603 dev/pci/pciide.c pciide_dma_table_setup(struct pciide_softc *sc, int channel, int drive)
drive 1610 dev/pci/pciide.c &sc->pciide_channels[channel].dma_maps[drive];
drive 1622 dev/pci/pciide.c channel, drive, error);
drive 1632 dev/pci/pciide.c channel, drive, error);
drive 1646 dev/pci/pciide.c channel, drive, error);
drive 1655 dev/pci/pciide.c channel, drive, error);
drive 1667 dev/pci/pciide.c channel, drive, error);
drive 1674 dev/pci/pciide.c pciide_dma_init(void *v, int channel, int drive, void *databuf,
drive 1681 dev/pci/pciide.c &sc->pciide_channels[channel].dma_maps[drive];
drive 1692 dev/pci/pciide.c channel, drive, error);
drive 1756 dev/pci/pciide.c pciide_dma_start(void *v, int channel, int drive)
drive 1768 dev/pci/pciide.c pciide_dma_finish(void *v, int channel, int drive, int force)
drive 1775 dev/pci/pciide.c &sc->pciide_channels[channel].dma_maps[drive];
drive 1803 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, channel, drive, status);
drive 1810 dev/pci/pciide.c drive, status);
drive 1966 dev/pci/pciide.c int channel, drive;
drive 2069 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 2070 dev/pci/pciide.c drvp = &cp->wdc_channel.ch_drive[drive];
drive 2076 dev/pci/pciide.c if (pciide_dma_table_setup(sc, channel, drive) != 0) {
drive 2081 dev/pci/pciide.c channel, drive);
drive 2086 dev/pci/pciide.c channel, drive);
drive 2087 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 2144 dev/pci/pciide.c int drive;
drive 2154 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 2155 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 2162 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 2164 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 2452 dev/pci/pciide.c u_int8_t mode[2], drive;
drive 2521 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 2522 dev/pci/pciide.c if (drvp[drive].drive_flags & DRIVE_DMA) {
drive 2524 dev/pci/pciide.c mode[drive], 1, chp->channel);
drive 2539 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 2541 dev/pci/pciide.c if ((drvp[drive].drive_flags & DRIVE) == 0)
drive 2543 dev/pci/pciide.c idetim |= piix_setup_idetim_drvs(&drvp[drive]);
drive 2544 dev/pci/pciide.c if (drvp[drive].drive_flags & DRIVE_DMA)
drive 2545 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 2564 dev/pci/pciide.c int drive;
drive 2585 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 2586 dev/pci/pciide.c udmareg &= ~(PIIX_UDMACTL_DRV_EN(channel, drive) |
drive 2587 dev/pci/pciide.c PIIX_UDMATIM_SET(0x3, channel, drive));
drive 2588 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 2629 dev/pci/pciide.c (ideconf & PIIX_CONFIG_CR(channel, drive)) == 0)
drive 2632 dev/pci/pciide.c ideconf |= PIIX_CONFIG_UDMA100(channel, drive);
drive 2634 dev/pci/pciide.c ideconf &= ~PIIX_CONFIG_UDMA100(channel, drive);
drive 2637 dev/pci/pciide.c drive);
drive 2640 dev/pci/pciide.c drive);
drive 2648 dev/pci/pciide.c (ideconf & PIIX_CONFIG_CR(channel, drive)) == 0)
drive 2651 dev/pci/pciide.c ideconf |= PIIX_CONFIG_UDMA66(channel, drive);
drive 2653 dev/pci/pciide.c ideconf &= ~PIIX_CONFIG_UDMA66(channel, drive);
drive 2660 dev/pci/pciide.c udmareg |= PIIX_UDMACTL_DRV_EN( channel, drive);
drive 2662 dev/pci/pciide.c piix4_sct_udma[drvp->UDMA_mode], channel, drive);
drive 2666 dev/pci/pciide.c if (drive == 0) {
drive 2676 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 2680 dev/pci/pciide.c if (drive == 0) {
drive 2728 dev/pci/pciide.c u_int8_t drive = drvp->drive;
drive 2741 dev/pci/pciide.c ret = PIIX_IDETIM_SET(ret, PIIX_IDETIM_TIME(drive), channel);
drive 2753 dev/pci/pciide.c ret = PIIX_IDETIM_SET(ret, PIIX_IDETIM_DTE(drive),
drive 2768 dev/pci/pciide.c ret = PIIX_IDETIM_SET(ret, PIIX_IDETIM_TIME(drive), channel);
drive 2770 dev/pci/pciide.c ret = PIIX_IDETIM_SET(ret, PIIX_IDETIM_IE(drive), channel);
drive 2771 dev/pci/pciide.c ret = PIIX_IDETIM_SET(ret, PIIX_IDETIM_PPE(drive), channel);
drive 2864 dev/pci/pciide.c int mode, drive;
drive 2885 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 2886 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 2903 dev/pci/pciide.c drive)) == 0 && drvp->UDMA_mode > 2) {
drive 2907 dev/pci/pciide.c chp->channel, drive), DEBUG_PROBE);
drive 2911 dev/pci/pciide.c udmatim_reg |= AMD756_UDMA_EN(chp->channel, drive) |
drive 2912 dev/pci/pciide.c AMD756_UDMA_EN_MTH(chp->channel, drive) |
drive 2913 dev/pci/pciide.c AMD756_UDMA_TIME(chp->channel, drive,
drive 2931 dev/pci/pciide.c chp->channel, drive);
drive 2943 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 2955 dev/pci/pciide.c AMD756_DATATIM_PULSE(chp->channel, drive,
drive 2957 dev/pci/pciide.c AMD756_DATATIM_RECOV(chp->channel, drive,
drive 3131 dev/pci/pciide.c int mode, drive;
drive 3163 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 3164 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 3178 dev/pci/pciide.c udmatim_reg |= APO_UDMA_EN(chp->channel, drive) |
drive 3179 dev/pci/pciide.c APO_UDMA_EN_MTH(chp->channel, drive);
drive 3182 dev/pci/pciide.c drive, apollo_udma133_tim[drvp->UDMA_mode]);
drive 3186 dev/pci/pciide.c drive, apollo_udma100_tim[drvp->UDMA_mode]);
drive 3191 dev/pci/pciide.c drive, apollo_udma66_tim[drvp->UDMA_mode]);
drive 3195 dev/pci/pciide.c drive, apollo_udma33_tim[drvp->UDMA_mode]);
drive 3208 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 3220 dev/pci/pciide.c APO_DATATIM_PULSE(chp->channel, drive,
drive 3222 dev/pci/pciide.c APO_DATATIM_RECOV(chp->channel, drive,
drive 3477 dev/pci/pciide.c int drive;
drive 3485 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 3486 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 3506 dev/pci/pciide.c chp->channel, drive), DEBUG_PROBE);
drive 3510 dev/pci/pciide.c udma_reg &= ~CMD_UDMATIM_UDMA33(drive);
drive 3512 dev/pci/pciide.c udma_reg |= CMD_UDMATIM_UDMA33(drive);
drive 3513 dev/pci/pciide.c udma_reg |= CMD_UDMATIM_UDMA(drive);
drive 3515 dev/pci/pciide.c CMD_UDMATIM_TIM_OFF(drive));
drive 3518 dev/pci/pciide.c CMD_UDMATIM_TIM_OFF(drive));
drive 3532 dev/pci/pciide.c udma_reg &= ~CMD_UDMATIM_UDMA(drive);
drive 3543 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 3546 dev/pci/pciide.c CMD_DATA_TIM(chp->channel, drive), tim);
drive 3681 dev/pci/pciide.c int drive;
drive 3699 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 3700 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 3704 dev/pci/pciide.c mode &= ~(0x03 << (drive * 4));
drive 3718 dev/pci/pciide.c mode |= 0x03 << (drive * 4);
drive 3719 dev/pci/pciide.c off = 0xac + chp->channel * 16 + drive * 2;
drive 3726 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 3728 dev/pci/pciide.c mode |= 0x02 << (drive * 4);
drive 3729 dev/pci/pciide.c off = 0xa8 + chp->channel * 16 + drive * 2;
drive 3733 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 3735 dev/pci/pciide.c mode |= 0x01 << (drive * 4);
drive 3736 dev/pci/pciide.c off = 0xa4 + chp->channel * 16 + drive * 2;
drive 3898 dev/pci/pciide.c int drive;
drive 3909 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 3910 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 3917 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 3920 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 3952 dev/pci/pciide.c chp->ch_drive[i].drive = i;
drive 4507 dev/pci/pciide.c int drive;
drive 4520 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 4521 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 4527 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 4533 dev/pci/pciide.c CY_CMD_CTRL_IOW_PULSE_OFF(drive));
drive 4535 dev/pci/pciide.c CY_CMD_CTRL_IOW_REC_OFF(drive));
drive 4537 dev/pci/pciide.c CY_CMD_CTRL_IOR_PULSE_OFF(drive));
drive 4539 dev/pci/pciide.c CY_CMD_CTRL_IOR_REC_OFF(drive));
drive 4809 dev/pci/pciide.c int drive;
drive 4821 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 4824 dev/pci/pciide.c chp->channel, drive);
drive 4825 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 4840 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 4853 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 4859 dev/pci/pciide.c chp->channel, drive, sis_tim, regtim), DEBUG_PROBE);
drive 4874 dev/pci/pciide.c int drive;
drive 4890 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 4891 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 4912 dev/pci/pciide.c SIS_TIM66_UDMA_TIME_OFF(drive);
drive 4917 dev/pci/pciide.c SIS_TIM100_UDMA_TIME_OFF(drive);
drive 4922 dev/pci/pciide.c SIS_TIM100_UDMA_TIME_OFF(drive);
drive 4942 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 4948 dev/pci/pciide.c SIS_TIM66_ACT_OFF(drive);
drive 4950 dev/pci/pciide.c SIS_TIM66_REC_OFF(drive);
drive 4955 dev/pci/pciide.c SIS_TIM100_ACT_OFF(drive);
drive 4957 dev/pci/pciide.c SIS_TIM100_REC_OFF(drive);
drive 5044 dev/pci/pciide.c int drive, ndrives = 0;
drive 5053 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 5054 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 5074 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 5080 dev/pci/pciide.c NATSEMI_RTREG(chp->channel, drive), tim);
drive 5082 dev/pci/pciide.c NATSEMI_WTREG(chp->channel, drive), tim);
drive 5229 dev/pci/pciide.c int drive, mode;
drive 5248 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 5249 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 5256 dev/pci/pciide.c SCx200_TIM_PIO(channel, drive));
drive 5258 dev/pci/pciide.c SCx200_TIM_DMA(channel, drive));
drive 5260 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, channel, drive,
drive 5267 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 5274 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 5296 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, channel, drive,
drive 5300 dev/pci/pciide.c SCx200_TIM_PIO(channel, drive), piotim);
drive 5302 dev/pci/pciide.c SCx200_TIM_DMA(channel, drive), dmatim);
drive 5412 dev/pci/pciide.c int drive;
drive 5439 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 5440 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 5445 dev/pci/pciide.c "channel %d drive %d 0x%x\n", chp->channel, drive,
drive 5447 dev/pci/pciide.c ACER_IDETIM(chp->channel, drive))), DEBUG_PROBE);
drive 5449 dev/pci/pciide.c acer_fifo_udma &= ~(ACER_FTH_OPL(chp->channel, drive, 0x3) |
drive 5450 dev/pci/pciide.c ACER_UDMA_EN(chp->channel, drive) |
drive 5451 dev/pci/pciide.c ACER_UDMA_TIM(chp->channel, drive, 0x7));
drive 5457 dev/pci/pciide.c ACER_FTH_OPL(chp->channel, drive, 0x1);
drive 5461 dev/pci/pciide.c acer_fifo_udma |= ACER_FTH_OPL(chp->channel, drive, 0x2);
drive 5465 dev/pci/pciide.c acer_fifo_udma |= ACER_UDMA_EN(chp->channel, drive);
drive 5467 dev/pci/pciide.c ACER_UDMA_TIM(chp->channel, drive,
drive 5490 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 5492 dev/pci/pciide.c ACER_IDETIM(chp->channel, drive),
drive 5681 dev/pci/pciide.c int drive;
drive 5733 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 5734 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 5739 dev/pci/pciide.c HPT_IDETIM(chp->channel, drive));
drive 5750 dev/pci/pciide.c chp->channel, drive), DEBUG_PROBE);
drive 5754 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 5766 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 5772 dev/pci/pciide.c HPT_IDETIM(chp->channel, drive), after);
drive 6034 dev/pci/pciide.c int drive;
drive 6108 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 6109 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 6121 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 6127 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 6141 dev/pci/pciide.c if (drive == 0)
drive 6147 dev/pci/pciide.c chp->channel, drive, mode), DEBUG_PROBE);
drive 6149 dev/pci/pciide.c PDC2xx_TIM(chp->channel, drive), mode);
drive 6163 dev/pci/pciide.c int drive, cable;
drive 6177 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 6178 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 6185 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 6190 dev/pci/pciide.c channel, drive), DEBUG_PROBE);
drive 6194 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 6285 dev/pci/pciide.c pdc20262_dma_start(void *v, int channel, int drive)
drive 6289 dev/pci/pciide.c &sc->pciide_channels[channel].dma_maps[drive];
drive 6305 dev/pci/pciide.c pciide_dma_start(v, channel, drive);
drive 6309 dev/pci/pciide.c pdc20262_dma_finish(void *v, int channel, int drive, int force)
drive 6313 dev/pci/pciide.c &sc->pciide_channels[channel].dma_maps[drive];
drive 6325 dev/pci/pciide.c return (pciide_dma_finish(v, channel, drive, force));
drive 6569 dev/pci/pciide.c int drive, s;
drive 6573 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 6574 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 6667 dev/pci/pciide.c pdc203xx_dma_start(void *v, int channel, int drive)
drive 6671 dev/pci/pciide.c struct pciide_dma_maps *dma_maps = &cp->dma_maps[drive];
drive 6688 dev/pci/pciide.c pdc203xx_dma_finish(void *v, int channel, int drive, int force)
drive 6692 dev/pci/pciide.c struct pciide_dma_maps *dma_maps = &cp->dma_maps[drive];
drive 6780 dev/pci/pciide.c chp->ch_drive[i].drive = i;
drive 6987 dev/pci/pciide.c int drive, spd;
drive 7010 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 7011 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 7014 dev/pci/pciide.c mode[drive] = -1;
drive 7031 dev/pci/pciide.c mode[drive] = drvp->DMA_mode + 5;
drive 7033 dev/pci/pciide.c mode[drive] = drvp->PIO_mode;
drive 7035 dev/pci/pciide.c if (drive && mode[0] >= 0 &&
drive 7052 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 7054 dev/pci/pciide.c if ((m = mode[drive]) < 0)
drive 7059 dev/pci/pciide.c rv |= OPTI_MISC_INDEX(drive);
drive 7070 dev/pci/pciide.c rv &= ~OPTI_ENH_MODE_MASK(chp->channel, drive);
drive 7071 dev/pci/pciide.c rv |= OPTI_ENH_MODE(chp->channel, drive, opti_tim_em[m]);
drive 7153 dev/pci/pciide.c int drive, unit;
drive 7176 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 7177 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 7181 dev/pci/pciide.c unit = drive + 2 * channel;
drive 7195 dev/pci/pciide.c channel, drive), DEBUG_PROBE);
drive 7201 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 7207 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 7442 dev/pci/pciide.c chp->ch_drive[i].drive = i;
drive 7675 dev/pci/pciide.c int drive;
drive 7696 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 7697 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 7706 dev/pci/pciide.c idetime |= ATP850_SETTIME(drive,
drive 7709 dev/pci/pciide.c udma_mode |= ATP850_UDMA_MODE(channel, drive,
drive 7712 dev/pci/pciide.c idetime |= ATP860_SETTIME(channel, drive,
drive 7715 dev/pci/pciide.c udma_mode |= ATP860_UDMA_MODE(channel, drive,
drive 7718 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 7724 dev/pci/pciide.c idetime |= ATP850_SETTIME(drive,
drive 7728 dev/pci/pciide.c idetime |= ATP860_SETTIME(channel, drive,
drive 7732 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 7737 dev/pci/pciide.c idetime |= ATP850_SETTIME(drive,
drive 7741 dev/pci/pciide.c idetime |= ATP860_SETTIME(channel, drive,
drive 7845 dev/pci/pciide.c int drive, mode;
drive 7869 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 7870 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 7881 dev/pci/pciide.c udmatim |= NFORCE_UDMATIM_SET(channel, drive,
drive 7883 dev/pci/pciide.c NFORCE_UDMA_EN(channel, drive) |
drive 7884 dev/pci/pciide.c NFORCE_UDMA_ENM(channel, drive);
drive 7901 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 7913 dev/pci/pciide.c piodmatim |= NFORCE_PIODMATIM_SET(channel, drive,
drive 8087 dev/pci/pciide.c int drive, mode;
drive 8108 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 8109 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 8119 dev/pci/pciide.c modectl &= ~IT_MODE_DMA(channel, drive);
drive 8124 dev/pci/pciide.c (cfg & IT_CFG_CABLE(channel, drive)) == 0) {
drive 8129 dev/pci/pciide.c channel, drive), DEBUG_PROBE);
drive 8135 dev/pci/pciide.c tim |= IT_TIM_UDMA5(drive);
drive 8137 dev/pci/pciide.c tim &= ~IT_TIM_UDMA5(drive);
drive 8144 dev/pci/pciide.c modectl |= IT_MODE_DMA(channel, drive);
drive 8154 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 8237 dev/pci/pciide.c int drive, mode;
drive 8255 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 8256 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 8264 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 8265 dev/pci/pciide.c IXP_UDMA_ENABLE(udma, chp->channel, drive);
drive 8266 dev/pci/pciide.c IXP_SET_MODE(udma, chp->channel, drive,
drive 8273 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 8274 dev/pci/pciide.c IXP_UDMA_DISABLE(udma, chp->channel, drive);
drive 8275 dev/pci/pciide.c IXP_SET_TIMING(mdma_timing, chp->channel, drive,
drive 8300 dev/pci/pciide.c IXP_SET_MODE(pio, chp->channel, drive, drvp->PIO_mode);
drive 8301 dev/pci/pciide.c IXP_SET_TIMING(pio_timing, chp->channel, drive,
drive 8392 dev/pci/pciide.c int drive, mode;
drive 8408 dev/pci/pciide.c for (drive = 0; drive < 2; drive++) {
drive 8409 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
drive 8440 dev/pci/pciide.c idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
drive 37 dev/pci/pciide_acard_reg.h #define ATP850_SETTIME(drive, act, rec) \
drive 38 dev/pci/pciide_acard_reg.h (((((act) & 0xf) << 8) | ((rec) & 0xf)) << ((drive) * 16))
drive 39 dev/pci/pciide_acard_reg.h #define ATP860_SETTIME(channel, drive, act, rec) \
drive 41 dev/pci/pciide_acard_reg.h ((channel) * 16 + (drive) * 8))
drive 54 dev/pci/pciide_acard_reg.h #define ATP850_UDMA_MODE(channel, drive, x) \
drive 55 dev/pci/pciide_acard_reg.h (((x) & 0x3) << ((channel) * 4 + (drive) * 2))
drive 56 dev/pci/pciide_acard_reg.h #define ATP860_UDMA_MODE(channel, drive, x) \
drive 57 dev/pci/pciide_acard_reg.h (((x) & 0xf) << ((channel) * 8 + (drive) * 4))
drive 63 dev/pci/pciide_amd_reg.h #define AMD756_CABLE(chan, drive) (0x00010000 << ((chan) * 2 + (drive)))
drive 68 dev/pci/pciide_amd_reg.h #define AMD756_DATATIM_RECOV(channel, drive, x) (((x) & 0xf) << \
drive 69 dev/pci/pciide_amd_reg.h (((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
drive 70 dev/pci/pciide_amd_reg.h #define AMD756_DATATIM_PULSE(channel, drive, x) (((x) & 0xf) << \
drive 71 dev/pci/pciide_amd_reg.h (((1 - (channel)) << 4) + ((1 - (drive)) << 3) + 4))
drive 79 dev/pci/pciide_amd_reg.h #define AMD756_UDMA_TIME(channel, drive, x) (((x) & 0x7) << \
drive 80 dev/pci/pciide_amd_reg.h (((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
drive 81 dev/pci/pciide_amd_reg.h #define AMD756_UDMA_EN(channel, drive) (0x40 << \
drive 82 dev/pci/pciide_amd_reg.h (((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
drive 83 dev/pci/pciide_amd_reg.h #define AMD756_UDMA_EN_MTH(channel, drive) (0x80 << \
drive 84 dev/pci/pciide_amd_reg.h (((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
drive 82 dev/pci/pciide_apollo_reg.h #define APO_DATATIM_RECOV(channel, drive, x) (((x) & 0xf) << \
drive 83 dev/pci/pciide_apollo_reg.h (((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
drive 84 dev/pci/pciide_apollo_reg.h #define APO_DATATIM_PULSE(channel, drive, x) (((x) & 0xf) << \
drive 85 dev/pci/pciide_apollo_reg.h (((1 - (channel)) << 4) + ((1 - (drive)) << 3) + 4))
drive 93 dev/pci/pciide_apollo_reg.h #define APO_UDMA_TIME(channel, drive, x) (((x) & 0xf) << \
drive 94 dev/pci/pciide_apollo_reg.h (((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
drive 95 dev/pci/pciide_apollo_reg.h #define APO_UDMA_PIO_MODE(channel, drive) (0x20 << \
drive 96 dev/pci/pciide_apollo_reg.h (((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
drive 97 dev/pci/pciide_apollo_reg.h #define APO_UDMA_EN(channel, drive) (0x40 << \
drive 98 dev/pci/pciide_apollo_reg.h (((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
drive 99 dev/pci/pciide_apollo_reg.h #define APO_UDMA_EN_MTH(channel, drive) (0x80 << \
drive 100 dev/pci/pciide_apollo_reg.h (((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
drive 71 dev/pci/pciide_cmd_reg.h #define CMD_DATA_TIM(chan, drive) \
drive 73 dev/pci/pciide_cmd_reg.h ((drive) == 0) ? 0x54: 0x56 \
drive 75 dev/pci/pciide_cmd_reg.h ((drive) == 0) ? 0x58 : 0x5b)
drive 99 dev/pci/pciide_cmd_reg.h #define CMD_UDMATIM_UDMA(drive) (0x01 << (drive))
drive 100 dev/pci/pciide_cmd_reg.h #define CMD_UDMATIM_UDMA33(drive) (0x04 << (drive))
drive 102 dev/pci/pciide_cmd_reg.h #define CMD_UDMATIM_TIM_OFF(drive) (4 + ((drive) * 2))
drive 50 dev/pci/pciide_cy693_reg.h #define CY_CTRL_PREFETCH(drive) (0x00000100 << (2 * (drive)))
drive 58 dev/pci/pciide_cy693_reg.h #define CY_ADDR_CTRL_SETUP_OFF(drive) (4 * (drive))
drive 59 dev/pci/pciide_cy693_reg.h #define CY_ADDR_CTRL_SETUP_MASK(drive) \
drive 60 dev/pci/pciide_cy693_reg.h (0x00000007 << CY_ADDR_CTRL_SETUP_OFF(drive))
drive 64 dev/pci/pciide_cy693_reg.h #define CY_CMD_CTRL_IOW_PULSE_OFF(drive) (12 + 16 * (drive))
drive 65 dev/pci/pciide_cy693_reg.h #define CY_CMD_CTRL_IOW_REC_OFF(drive) (8 + 16 * (drive))
drive 66 dev/pci/pciide_cy693_reg.h #define CY_CMD_CTRL_IOR_PULSE_OFF(drive) (4 + 16 * (drive))
drive 67 dev/pci/pciide_cy693_reg.h #define CY_CMD_CTRL_IOR_REC_OFF(drive) (0 + 16 * (drive))
drive 54 dev/pci/pciide_hpt_reg.h #define HPT_IDETIM(chan, drive) (0x40 + ((drive) * 4) + ((chan) * 8))
drive 28 dev/pci/pciide_ite_reg.h #define IT_CFG_CABLE(chan, drive) (0x0010 << ((chan) * 2 + (drive)))
drive 35 dev/pci/pciide_ite_reg.h #define IT_MODE_DMA(chan, drive) (0x0008 << ((chan) * 2 + (drive)))
drive 40 dev/pci/pciide_ite_reg.h #define IT_TIM_UDMA5(drive) (0x00800000 << (drive) * 8)
drive 110 dev/pci/pciide_natsemi_reg.h #define SCx200_TIM_PIO(chan, drive) (0x40 + 16 * (chan) + 8 * (drive))
drive 111 dev/pci/pciide_natsemi_reg.h #define SCx200_TIM_DMA(chan, drive) (0x44 + 16 * (chan) + 8 * (drive))
drive 40 dev/pci/pciide_nforce_reg.h #define NFORCE_PIODMATIM_SET(chan, drive, x) \
drive 41 dev/pci/pciide_nforce_reg.h ((x) << ((3 - ((chan) * 2 + (drive))) * 8))
drive 50 dev/pci/pciide_nforce_reg.h #define NFORCE_UDMATIM_SET(chan, drive, x) \
drive 51 dev/pci/pciide_nforce_reg.h ((x) << ((3 - ((chan) * 2 + (drive))) * 8))
drive 52 dev/pci/pciide_nforce_reg.h #define NFORCE_UDMA_EN(chan, drive) \
drive 53 dev/pci/pciide_nforce_reg.h (0x40 << ((3 - ((chan) * 2 + (drive))) * 8))
drive 54 dev/pci/pciide_nforce_reg.h #define NFORCE_UDMA_ENM(chan, drive) \
drive 55 dev/pci/pciide_nforce_reg.h (0x80 << ((3 - ((chan) * 2 + (drive))) * 8))
drive 59 dev/pci/pciide_pdc202xx_reg.h #define PDC2xx_TIM(channel, drive) (0x60 + 4 * (drive) + 8 * (channel))
drive 98 dev/pci/pciide_piix_reg.h #define PIIX_UDMACTL_DRV_EN(channel, drive) (0x01 << ((channel) * 2 + (drive)))
drive 101 dev/pci/pciide_piix_reg.h #define PIIX_UDMATIM_SET(x, channel, drive) \
drive 102 dev/pci/pciide_piix_reg.h (((x) << ((channel * 8) + (drive * 4))) << PIIX_UDMATIM_SHIFT)
drive 110 dev/pci/pciide_piix_reg.h #define PIIX_CONFIG_CR(channel, drive) (0x0010 << ((channel) * 2 + (drive)))
drive 111 dev/pci/pciide_piix_reg.h #define PIIX_CONFIG_UDMA66(channel, drive) (0x0001 << ((channel) * 2 + (drive)))
drive 113 dev/pci/pciide_piix_reg.h #define PIIX_CONFIG_UDMA100(channel, drive) (0x1000 << ((channel) * 2 + (drive)))
drive 46 dev/pci/pciide_sis_reg.h #define SIS_TIM66_REC_OFF(drive) (16 * (drive))
drive 47 dev/pci/pciide_sis_reg.h #define SIS_TIM66_ACT_OFF(drive) (8 + 16 * (drive))
drive 48 dev/pci/pciide_sis_reg.h #define SIS_TIM66_UDMA_TIME_OFF(drive) (12 + 16 * (drive))
drive 50 dev/pci/pciide_sis_reg.h #define SIS_TIM100_REC_OFF(drive) (16 * (drive))
drive 51 dev/pci/pciide_sis_reg.h #define SIS_TIM100_ACT_OFF(drive) (4 + 16 * (drive))
drive 52 dev/pci/pciide_sis_reg.h #define SIS_TIM100_UDMA_TIME_OFF(drive) (8 + 16 * (drive))
drive 59 dev/pci/pciide_sis_reg.h #define SIS_TIM133(reg57, channel, drive) \
drive 60 dev/pci/pciide_sis_reg.h ((((reg57) & 0x40) ? 0x70 : 0x40) + ((channel) << 3) + ((drive) << 2))