1 /* $OpenBSD: pciide_cy693_reg.h,v 1.7 2004/10/17 18:16:12 grange Exp $ */
2 /* $NetBSD: pciide_cy693_reg.h,v 1.4 2000/05/15 08:46:01 bouyer Exp $ */
3
4 /*
5 * Copyright (c) 1998 Manuel Bouyer.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Manuel Bouyer.
18 * 4. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 */
34
35 #ifndef _DEV_PCI_PCIIDE_CY693_REG_H_
36 #define _DEV_PCI_PCIIDE_CY693_REG_H_
37
38 /*
39 * Registers definitions for Contaq/Cypress's CY82693U PCI IDE controller.
40 * Available from http://www.cypress.com/japan/prodgate/chip/cy82c693.html
41 * This chip has 2 PCI IDE functions, each of them has only one channel
42 * So there's no primary/secodary distinction in the registers defs.
43 */
44
45 /* IDE control register */
46 #define CY_CTRL 0x40
47 #define CY_CTRL_RETRY 0x00002000
48 #define CY_CTRL_SLAVE_PREFETCH 0x00000400
49 #define CY_CTRL_POSTWRITE 0x00000200
50 #define CY_CTRL_PREFETCH(drive) (0x00000100 << (2 * (drive)))
51 #define CY_CTRL_POSTWRITE_LENGTH_MASK 0x00000030
52 #define CY_CTRL_POSTWRITE_LENGTH_OFF 4
53 #define CY_CTRL_PREFETCH_LENGTH_MASK 0x00000003
54 #define CY_CTRL_PREFETCH_LENGTH_OFF 0
55
56 /* IDE addr setup control register */
57 #define CY_ADDR_CTRL 0x48
58 #define CY_ADDR_CTRL_SETUP_OFF(drive) (4 * (drive))
59 #define CY_ADDR_CTRL_SETUP_MASK(drive) \
60 (0x00000007 << CY_ADDR_CTRL_SETUP_OFF(drive))
61
62 /* command control register */
63 #define CY_CMD_CTRL 0x4c
64 #define CY_CMD_CTRL_IOW_PULSE_OFF(drive) (12 + 16 * (drive))
65 #define CY_CMD_CTRL_IOW_REC_OFF(drive) (8 + 16 * (drive))
66 #define CY_CMD_CTRL_IOR_PULSE_OFF(drive) (4 + 16 * (drive))
67 #define CY_CMD_CTRL_IOR_REC_OFF(drive) (0 + 16 * (drive))
68
69 static int8_t cy_pio_pulse[] = {9, 4, 3, 2, 2};
70 static int8_t cy_pio_rec[] = {9, 7, 4, 2, 0};
71 #ifdef unused
72 static int8_t cy_dma_pulse[] = {7, 2, 2};
73 static int8_t cy_dma_rec[] = {7, 1, 0};
74 #endif
75
76 /*
77 * The cypress is quite weird: it uses 8-bit ISA registers to control
78 * DMA modes.
79 */
80
81 #define CY_DMA_ADDR 0x22
82 #define CY_DMA_SIZE 0x2
83
84 #define CY_DMA_IDX 0x00
85 #define CY_DMA_IDX_PRIMARY 0x30
86 #define CY_DMA_IDX_SECONDARY 0x31
87 #define CY_DMA_IDX_TIMEOUT 0x32
88
89 #define CY_DMA_DATA 0x01
90 /* Multiword DMA transfer, for CY_DMA_IDX_PRIMARY or CY_DMA_IDX_SECONDARY */
91 #define CY_DMA_DATA_MODE_MASK 0x03
92 #define CY_DMA_DATA_SINGLE 0x04
93
94 /* Private data */
95 struct pciide_cy {
96 const struct cy82c693_handle *cy_handle;
97 int cy_compatchan;
98 };
99
100 #endif /* !_DEV_PCI_PCIIDE_CY693_REG_H_ */