root/dev/pci/pciide_ite_reg.h

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INCLUDED FROM


    1 /*      $OpenBSD: pciide_ite_reg.h,v 1.1 2003/12/20 08:03:55 grange Exp $       */
    2 /*
    3  * Copyright (c) 2003 Alexander Yurchenko <grange@openbsd.org>
    4  *
    5  * Permission to use, copy, modify, and distribute this software for any
    6  * purpose with or without fee is hereby granted, provided that the above
    7  * copyright notice and this permission notice appear in all copies.
    8  *
    9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
   11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
   12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
   13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
   14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
   15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
   16  */
   17 
   18 #ifndef _DEV_PCI_PCIIDE_ITE_REG_H_
   19 #define _DEV_PCI_PCIIDE_ITE_REG_H_
   20 
   21 /*
   22  * Registers definition for IT8212F
   23  */
   24 #define IT_CFG                  0x40    /* I/O configuration */
   25 #define IT_CFG_MASK                     0x0000ffff
   26 #define IT_CFG_IORDY(chan)              (0x0001 << (chan))
   27 #define IT_CFG_BLID(chan)               (0x0004 << (chan))
   28 #define IT_CFG_CABLE(chan, drive)       (0x0010 << ((chan) * 2 + (drive)))
   29 #define IT_CFG_DECODE(chan)             (0x8000 >> ((chan) * 2))
   30 
   31 #define IT_MODE                 0x50    /* mode control / RAID function */
   32 #define IT_MODE_MASK                    0x0000ffff
   33 #define IT_MODE_CPU                     0x0001
   34 #define IT_MODE_50MHZ(chan)             (0x0002 << (chan))
   35 #define IT_MODE_DMA(chan, drive)        (0x0008 << ((chan) * 2 + (drive)))
   36 #define IT_MODE_RESET                   0x0080
   37 #define IT_MODE_RAID1                   0x0100
   38 
   39 #define IT_TIM(chan)            ((chan) ? 0x58 : 0x54) /* timings */
   40 #define IT_TIM_UDMA5(drive)             (0x00800000 << (drive) * 8)
   41 
   42 #endif  /* !_DEV_PCI_PCIIDE_ITE_REG_H_ */

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