sc_cddmamap       226 dev/ic/aic6915.c 	    &sc->sc_cddmamap)) != 0) {
sc_cddmamap       232 dev/ic/aic6915.c 	if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
sc_cddmamap       342 dev/ic/aic6915.c 	bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
sc_cddmamap       344 dev/ic/aic6915.c 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
sc_cddmamap       780 dev/ic/aic6915.h 	bus_dmamap_t sc_cddmamap;	/* control data DMA map */
sc_cddmamap       781 dev/ic/aic6915.h #define	sc_cddma	sc_cddmamap->dm_segs[0].ds_addr
sc_cddmamap       817 dev/ic/aic6915.h 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
sc_cddmamap       821 dev/ic/aic6915.h 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
sc_cddmamap       825 dev/ic/aic6915.h 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
sc_cddmamap       829 dev/ic/aic6915.h 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
sc_cddmamap       611 dev/ic/atw.c   	    sizeof(struct atw_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
sc_cddmamap       617 dev/ic/atw.c   	if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
sc_cddmamap       908 dev/ic/atw.c   	bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
sc_cddmamap       910 dev/ic/atw.c   	bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
sc_cddmamap      2770 dev/ic/atw.c   	bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
sc_cddmamap      2771 dev/ic/atw.c   	bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
sc_cddmamap       239 dev/ic/atwvar.h 	bus_dmamap_t		sc_cddmamap;	/* control data DMA map */
sc_cddmamap       240 dev/ic/atwvar.h #define	sc_cddma	sc_cddmamap->dm_segs[0].ds_addr
sc_cddmamap       390 dev/ic/atwvar.h 		bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,	\
sc_cddmamap       398 dev/ic/atwvar.h 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
sc_cddmamap       403 dev/ic/atwvar.h 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
sc_cddmamap       167 dev/ic/gem.c   	    sizeof(struct gem_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
sc_cddmamap       173 dev/ic/gem.c   	if ((error = bus_dmamap_load(sc->sc_dmatag, sc->sc_cddmamap,
sc_cddmamap       370 dev/ic/gem.c   	bus_dmamap_unload(sc->sc_dmatag, sc->sc_cddmamap);
sc_cddmamap       372 dev/ic/gem.c   	bus_dmamap_destroy(sc->sc_dmatag, sc->sc_cddmamap);
sc_cddmamap      1633 dev/ic/gem.c   		bus_dmamap_sync(sc->sc_dmatag, sc->sc_cddmamap,
sc_cddmamap       170 dev/ic/gemvar.h 	bus_dmamap_t sc_cddmamap;	/* control data DMA map */
sc_cddmamap       171 dev/ic/gemvar.h #define	sc_cddma	sc_cddmamap->dm_segs[0].ds_addr
sc_cddmamap       241 dev/ic/gemvar.h 		bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap,	\
sc_cddmamap       249 dev/ic/gemvar.h 	bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap,		\
sc_cddmamap       254 dev/ic/gemvar.h 	bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap,		\
sc_cddmamap       258 dev/ic/gemvar.h 	bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap,		\
sc_cddmamap       168 dev/ic/smc83c170.c 	    &sc->sc_cddmamap)) != 0) {
sc_cddmamap       174 dev/ic/smc83c170.c 	if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
sc_cddmamap       339 dev/ic/smc83c170.c 	bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
sc_cddmamap       341 dev/ic/smc83c170.c 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
sc_cddmamap       119 dev/ic/smc83c170var.h 	bus_dmamap_t sc_cddmamap;	/* control data DMA map */
sc_cddmamap       120 dev/ic/smc83c170var.h #define	sc_cddma	sc_cddmamap->dm_segs[0].ds_addr
sc_cddmamap       156 dev/ic/smc83c170var.h 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
sc_cddmamap       160 dev/ic/smc83c170var.h 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
sc_cddmamap       164 dev/ic/smc83c170var.h 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
sc_cddmamap       401 dev/pci/if_cas.c 	    sizeof(struct cas_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
sc_cddmamap       407 dev/pci/if_cas.c 	if ((error = bus_dmamap_load(sc->sc_dmatag, sc->sc_cddmamap,
sc_cddmamap       604 dev/pci/if_cas.c 	bus_dmamap_unload(sc->sc_dmatag, sc->sc_cddmamap);
sc_cddmamap       606 dev/pci/if_cas.c 	bus_dmamap_destroy(sc->sc_dmatag, sc->sc_cddmamap);
sc_cddmamap      1868 dev/pci/if_cas.c 		bus_dmamap_sync(sc->sc_dmatag, sc->sc_cddmamap,
sc_cddmamap       145 dev/pci/if_casvar.h 	bus_dmamap_t sc_cddmamap;	/* control data DMA map */
sc_cddmamap       146 dev/pci/if_casvar.h #define	sc_cddma	sc_cddmamap->dm_segs[0].ds_addr
sc_cddmamap       205 dev/pci/if_casvar.h 		bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap,	\
sc_cddmamap       213 dev/pci/if_casvar.h 	bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap,		\
sc_cddmamap       218 dev/pci/if_casvar.h 	bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap,		\
sc_cddmamap       222 dev/pci/if_casvar.h 	bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap,		\
sc_cddmamap       302 dev/pci/if_pcn.c 	bus_dmamap_t sc_cddmamap;	/* control data DMA map */
sc_cddmamap       303 dev/pci/if_pcn.c #define	sc_cddma	sc_cddmamap->dm_segs[0].ds_addr
sc_cddmamap       356 dev/pci/if_pcn.c 		bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,	\
sc_cddmamap       364 dev/pci/if_pcn.c 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
sc_cddmamap       369 dev/pci/if_pcn.c 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
sc_cddmamap       373 dev/pci/if_pcn.c 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
sc_cddmamap       713 dev/pci/if_pcn.c 	     sizeof(struct pcn_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
sc_cddmamap       719 dev/pci/if_pcn.c 	if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
sc_cddmamap       835 dev/pci/if_pcn.c 	bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
sc_cddmamap       837 dev/pci/if_pcn.c 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
sc_cddmamap       282 dev/pci/if_stge.c 	    sizeof(struct stge_control_data), 0, 0, &sc->sc_cddmamap)) != 0) {
sc_cddmamap       288 dev/pci/if_stge.c 	if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cddmamap,
sc_cddmamap       468 dev/pci/if_stge.c 	bus_dmamap_unload(sc->sc_dmat, sc->sc_cddmamap);
sc_cddmamap       470 dev/pci/if_stge.c 	bus_dmamap_destroy(sc->sc_dmat, sc->sc_cddmamap);
sc_cddmamap       548 dev/pci/if_stgereg.h 	bus_dmamap_t sc_cddmamap;	/* control data DMA map */
sc_cddmamap       549 dev/pci/if_stgereg.h #define sc_cddma	sc_cddmamap->dm_segs[0].ds_addr
sc_cddmamap       602 dev/pci/if_stgereg.h 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
sc_cddmamap       606 dev/pci/if_stgereg.h 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\