base 481 arch/i386/i386/bios.c u_int32_t base, count, off, ent;
base 487 arch/i386/i386/bios.c base = 0;
base 489 arch/i386/i386/bios.c : "+a" (service), "+b" (base), "=c" (count), "=d" (off)
base 496 arch/i386/i386/bios.c ent = base + off;
base 518 arch/i386/i386/bios.c if (pa >= trunc_page(base)) {
base 529 arch/i386/i386/bios.c ei->bei_base = base;
base 825 arch/i386/i386/db_disasm.c char * base;
base 903 arch/i386/i386/db_disasm.c addrp->base = 0;
base 906 arch/i386/i386/db_disasm.c addrp->base = db_index_reg_16[rm];
base 913 arch/i386/i386/db_disasm.c addrp->base = db_index_reg_16[rm];
base 918 arch/i386/i386/db_disasm.c addrp->base = db_index_reg_16[rm];
base 935 arch/i386/i386/db_disasm.c addrp->base = 0;
base 938 arch/i386/i386/db_disasm.c addrp->base = db_reg[LONG][rm];
base 944 arch/i386/i386/db_disasm.c addrp->base = db_reg[LONG][rm];
base 949 arch/i386/i386/db_disasm.c addrp->base = db_reg[LONG][rm];
base 968 arch/i386/i386/db_disasm.c if (addrp->base != 0 || addrp->index != 0) {
base 970 arch/i386/i386/db_disasm.c if (addrp->base)
base 971 arch/i386/i386/db_disasm.c db_printf("%s", addrp->base);
base 114 arch/i386/i386/gdt.c setsegment(sd, base, limit, type, dpl, def32, gran);
base 56 arch/i386/i386/i686_mem.c ((!(base & ((1 << 12) - 1))) && /* base is multiple of 4k */ \
base 59 arch/i386/i386/i686_mem.c !((base) & ((len) - 1))) /* range is not discontiuous */
base 2725 arch/i386/i386/machdep.c rd->rd_base = (int)base;
base 2734 arch/i386/i386/machdep.c sd->sd_lobase = (int)base;
base 2742 arch/i386/i386/machdep.c sd->sd_hibase = (int)base >> 24;
base 417 arch/i386/i386/mpbios.c const u_int8_t *base = mpbios_map(start, count, &t);
base 424 arch/i386/i386/mpbios.c m = (struct mpbios_fps *)&base[i];
base 412 arch/i386/i386/svr4_machdep.c ssd.selector, ssd.base, ssd.limit,
base 425 arch/i386/i386/svr4_machdep.c bsd.sd.sd_lobase = ssd.base & 0xffffff;
base 426 arch/i386/i386/svr4_machdep.c bsd.sd.sd_hibase = (ssd.base >> 24) & 0xff;
base 89 arch/i386/i386/vm86.c : "r" (base), "q" (val), "0" (ptr))
base 104 arch/i386/i386/vm86.c : "r" (base), "q" (val), "0" (ptr))
base 111 arch/i386/i386/vm86.c : "=r" (ptr), "=r" (base), "=q" (__res) \
base 112 arch/i386/i386/vm86.c : "0" (ptr), "1" (base), "2" (0)); \
base 122 arch/i386/i386/vm86.c : "=r" (ptr), "=r" (base), "=q" (__res) \
base 123 arch/i386/i386/vm86.c : "0" (ptr), "1" (base), "2" (0)); \
base 139 arch/i386/i386/vm86.c : "=r" (ptr), "=r" (base), "=q" (__res) \
base 140 arch/i386/i386/vm86.c : "0" (ptr), "1" (base)); \
base 91 arch/i386/include/svr4_machdep.h unsigned int base;
base 566 arch/i386/isa/clock.c if (base < 15*SECYR) { /* if before 1985, something's odd... */
base 569 arch/i386/isa/clock.c base = 17*SECYR + 186*SECDAY + SECDAY/2;
base 611 arch/i386/isa/clock.c if (base < ts.tv_sec - 5*SECYR)
base 613 arch/i386/isa/clock.c else if (base > ts.tv_sec + 5*SECYR) {
base 624 arch/i386/isa/clock.c ts.tv_sec = base;
base 70 arch/i386/isa/joy_isapnp.c int iobase = ia->ipa_io[0].base;
base 42 compat/common/kern_ipc_23.c bcopy((caddr_t)&(from)->base, (caddr_t)&(to)->base, \
base 43 compat/common/kern_ipc_23.c sizeof(*(to)) - ((caddr_t)&(to)->base - (caddr_t)to)); \
base 94 compat/common/kern_ipc_35.c bcopy((caddr_t)&(from)->base, (caddr_t)&(to)->base, \
base 95 compat/common/kern_ipc_35.c sizeof(*(to)) - ((caddr_t)&(to)->base - (caddr_t)to)); \
base 274 compat/osf1/osf1.h osf1_data_ptr base;
base 285 compat/osf1/osf1_mount.c bsd_ma.base = osf_ma.base;
base 1358 dev/acpi/acpi.c base += gas->address;
base 1371 dev/acpi/acpi.c if (bus_space_map(*piot, base, size, 0, pioh))
base 578 dev/acpi/dsdt.c type, base, length, bitpos, bitlen, size,
base 580 dev/acpi/dsdt.c acpi_gasio(sc, mode, type, base+(bitpos>>3),
base 3278 dev/acpi/dsdt.c if (base[fixtab->offset] == fixtab->oldv)
base 3279 dev/acpi/dsdt.c base[fixtab->offset] = fixtab->newv;
base 503 dev/adb/akbdmap.h { name, base, sizeof(map)/sizeof(keysym_t), map }
base 255 dev/cardbus/cardbus_map.c bus_addr_t base;
base 267 dev/cardbus/cardbus_map.c if (cardbus_io_find(cc, cf, tag, reg, type, &base, &size,
base 273 dev/cardbus/cardbus_map.c if (cardbus_mem_find(cc, cf, tag, reg, type, &base, &size,
base 281 dev/cardbus/cardbus_map.c if (base != 0)
base 283 dev/cardbus/cardbus_map.c if ((*cf->cardbus_space_alloc)(cc, rbustag, base, size, mask,
base 284 dev/cardbus/cardbus_map.c size, busflags | flags, &base, &handle)) {
base 288 dev/cardbus/cardbus_map.c cardbus_conf_write(cc, cf, tag, reg, base);
base 290 dev/cardbus/cardbus_map.c DPRINTF(("cardbus_mapreg_map: physaddr %lx\n", (unsigned long)base));
base 297 dev/cardbus/cardbus_map.c *basep = base;
base 117 dev/cardbus/if_acx_cardbus.c bus_addr_t base;
base 134 dev/cardbus/if_acx_cardbus.c &base, &csc->sc_iomapsize);
base 139 dev/cardbus/if_acx_cardbus.c csc->sc_iobar_val = base | CARDBUS_MAPREG_TYPE_IO;
base 146 dev/cardbus/if_acx_cardbus.c &sc->sc_mem1_bt, &sc->sc_mem1_bh, &base, &csc->sc_mapsize1);
base 152 dev/cardbus/if_acx_cardbus.c csc->sc_bar1_val = base | CARDBUS_MAPREG_TYPE_MEM;
base 156 dev/cardbus/if_acx_cardbus.c &sc->sc_mem2_bt, &sc->sc_mem2_bh, &base, &csc->sc_mapsize2);
base 162 dev/cardbus/if_acx_cardbus.c csc->sc_bar2_val = base | CARDBUS_MAPREG_TYPE_MEM;
base 92 dev/cardbus/if_malo_cardbus.c bus_addr_t base;
base 110 dev/cardbus/if_malo_cardbus.c &sc->sc_mem1_bh, &base, &csc->sc_mapsize1);
base 115 dev/cardbus/if_malo_cardbus.c csc->sc_bar1_val = base | CARDBUS_MAPREG_TYPE_MEM;
base 120 dev/cardbus/if_malo_cardbus.c &sc->sc_mem2_bh, &base, &csc->sc_mapsize2);
base 127 dev/cardbus/if_malo_cardbus.c csc->sc_bar2_val = base | CARDBUS_MAPREG_TYPE_MEM;
base 102 dev/cardbus/if_pgt_cardbus.c bus_addr_t base;
base 122 dev/cardbus/if_pgt_cardbus.c &sc->sc_iotag, &sc->sc_iohandle, &base, &csc->sc_mapsize);
base 127 dev/cardbus/if_pgt_cardbus.c csc->sc_bar0_val = base | CARDBUS_MAPREG_TYPE_MEM;
base 128 dev/cardbus/if_ral_cardbus.c bus_addr_t base;
base 147 dev/cardbus/if_ral_cardbus.c CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &base,
base 154 dev/cardbus/if_ral_cardbus.c csc->sc_bar_val = base | CARDBUS_MAPREG_TYPE_MEM;
base 662 dev/hil/hilkbdmap.c { name, base, sizeof(map)/sizeof(keysym_t), map }
base 49 dev/ic/ad1848reg.h #define AD1848_BASE_VALID(base) (((base) & 0x003) == 0)
base 275 dev/ic/hmereg.h #define HME_XD_FLAGS(base, index) ((base) + ((index) * HME_XD_SIZE) + 0)
base 276 dev/ic/hmereg.h #define HME_XD_ADDR(base, index) ((base) + ((index) * HME_XD_SIZE) + 4)
base 101 dev/ic/i82596reg.h #define IE_SCP_BUS_USE(base) ((base) + 2)
base 102 dev/ic/i82596reg.h #define IE_SCP_TEST(base) ((base) + 4)
base 103 dev/ic/i82596reg.h #define IE_SCP_ISCP(base) ((base) + 8)
base 124 dev/ic/i82596reg.h #define IE_ISCP_BUSY(base) ((base) + 0)
base 125 dev/ic/i82596reg.h #define IE_ISCP_SCB(base) ((base) + 2)
base 126 dev/ic/i82596reg.h #define IE_ISCP_BASE(base) ((base) + 4)
base 156 dev/ic/i82596reg.h #define IE_SCB_STATUS(base) ((base) + 0)
base 157 dev/ic/i82596reg.h #define IE_SCB_CMD(base) ((base) + 2)
base 158 dev/ic/i82596reg.h #define IE_SCB_CMDLST(base) ((base) + 4)
base 159 dev/ic/i82596reg.h #define IE_SCB_RCVLST(base) ((base) + 6)
base 160 dev/ic/i82596reg.h #define IE_SCB_ERRCRC(base) ((base) + 8)
base 161 dev/ic/i82596reg.h #define IE_SCB_ERRALN(base) ((base) + 10)
base 162 dev/ic/i82596reg.h #define IE_SCB_ERRRES(base) ((base) + 12)
base 163 dev/ic/i82596reg.h #define IE_SCB_ERROVR(base) ((base) + 14)
base 222 dev/ic/i82596reg.h #define IE_RFRAME_ADDR(base,i) ((base) + (i) * 64)
base 262 dev/ic/i82596reg.h #define IE_RBD_ADDR(base,i) ((base) + (i) * 32)
base 287 dev/ic/i82596reg.h #define IE_CMD_COMMON_STATUS(base) ((base) + 0)
base 288 dev/ic/i82596reg.h #define IE_CMD_COMMON_CMD(base) ((base) + 2)
base 289 dev/ic/i82596reg.h #define IE_CMD_COMMON_LINK(base) ((base) + 4)
base 314 dev/ic/i82596reg.h #define IE_CMD_NOP_ADDR(base,i) ((base) + (i) * 32)
base 333 dev/ic/i82596reg.h #define IE_CMD_XMIT_ADDR(base,i) ((base) + (i) * 32)
base 366 dev/ic/i82596reg.h #define IE_XBD_ADDR(base,i) ((base) + (i) * 32)
base 389 dev/ic/i82596reg.h #define IE_CMD_MCAST_BYTES(base) ((base) + IE_CMD_COMMON_SZ + 0)
base 390 dev/ic/i82596reg.h #define IE_CMD_MCAST_MADDR(base) ((base) + IE_CMD_COMMON_SZ + 2)
base 402 dev/ic/i82596reg.h #define IE_CMD_TDR_TIME(base) ((base) + IE_CMD_COMMON_SZ + 0)
base 422 dev/ic/i82596reg.h #define IE_CMD_IAS_EADDR(base) ((base) + IE_CMD_COMMON_SZ + 0)
base 446 dev/ic/i82596reg.h #define IE_CMD_CFG_CNT(base) ((base) + IE_CMD_COMMON_SZ + 0)
base 447 dev/ic/i82596reg.h #define IE_CMD_CFG_FIFO(base) ((base) + IE_CMD_COMMON_SZ + 1)
base 448 dev/ic/i82596reg.h #define IE_CMD_CFG_SAVEBAD(base) ((base) + IE_CMD_COMMON_SZ + 2)
base 449 dev/ic/i82596reg.h #define IE_CMD_CFG_ADDRLEN(base) ((base) + IE_CMD_COMMON_SZ + 3)
base 450 dev/ic/i82596reg.h #define IE_CMD_CFG_PRIORITY(base) ((base) + IE_CMD_COMMON_SZ + 4)
base 451 dev/ic/i82596reg.h #define IE_CMD_CFG_IFS(base) ((base) + IE_CMD_COMMON_SZ + 5)
base 452 dev/ic/i82596reg.h #define IE_CMD_CFG_SLOT_LOW(base) ((base) + IE_CMD_COMMON_SZ + 6)
base 453 dev/ic/i82596reg.h #define IE_CMD_CFG_SLOT_HIGH(base) ((base) + IE_CMD_COMMON_SZ + 7)
base 454 dev/ic/i82596reg.h #define IE_CMD_CFG_PROMISC(base) ((base) + IE_CMD_COMMON_SZ + 8)
base 455 dev/ic/i82596reg.h #define IE_CMD_CFG_CRSCDT(base) ((base) + IE_CMD_COMMON_SZ + 9)
base 456 dev/ic/i82596reg.h #define IE_CMD_CFG_MINLEN(base) ((base) + IE_CMD_COMMON_SZ + 10)
base 457 dev/ic/i82596reg.h #define IE_CMD_CFG_JUNK(base) ((base) + IE_CMD_COMMON_SZ + 11)
base 1792 dev/ic/isp.c int loopid, base, lim;
base 1840 dev/ic/isp.c base = FC_SNS_ID+1;
base 1842 dev/ic/isp.c base = 0;
base 1854 dev/ic/isp.c for (lp = &fcp->portdb[base]; lp < &fcp->portdb[lim]; lp++) {
base 813 dev/ic/isp_openbsd.c int target, base, lim;
base 875 dev/ic/isp_openbsd.c base = FC_SNS_ID+1;
base 877 dev/ic/isp_openbsd.c base = 0;
base 887 dev/ic/isp_openbsd.c for (target = base; target < lim; target++) {
base 901 dev/ic/isp_openbsd.c for (target = base; target < lim; target++) {
base 132 dev/ic/lpt.c LPRINTF(("lpt: port=0x%x out=0x%x in=0x%x timeout=%d\n", base + off,
base 288 dev/ic/opl.c opl_command(sc, v->iooffs, base + v->op[op], value);
base 299 dev/ic/opl.c opl_command(sc, v->iooffs, base + v->voiceno, value);
base 139 dev/ic/pdqvar.h #define PDQ_OS_IORD_32(t, base, offset) bus_space_read_4 (t, base, offset)
base 140 dev/ic/pdqvar.h #define PDQ_OS_IOWR_32(t, base, offset, data) bus_space_write_4 (t, base, offset, data)
base 141 dev/ic/pdqvar.h #define PDQ_OS_IORD_8(t, base, offset) bus_space_read_1 (t, base, offset)
base 142 dev/ic/pdqvar.h #define PDQ_OS_IOWR_8(t, base, offset, data) bus_space_write_1 (t, base, offset, data)
base 143 dev/ic/pdqvar.h #define PDQ_OS_MEMRD_32(t, base, offset) bus_space_read_4(t, base, offset)
base 144 dev/ic/pdqvar.h #define PDQ_OS_MEMWR_32(t, base, offset, data) bus_space_write_4(t, base, offset, data)
base 170 dev/ic/pdqvar.h #define PDQ_OS_IORD_32(t, base, offset) inl((base) + (offset))
base 171 dev/ic/pdqvar.h #define PDQ_OS_IOWR_32(t, base, offset, data) outl((base) + (offset), data)
base 172 dev/ic/pdqvar.h #define PDQ_OS_IORD_8(t, base, offset) inb((base) + (offset))
base 173 dev/ic/pdqvar.h #define PDQ_OS_IOWR_8(t, base, offset, data) outb((base) + (offset), data)
base 174 dev/ic/pdqvar.h #define PDQ_OS_MEMRD_32(t, base, offset) (0 + *((base) + (offset)))
base 175 dev/ic/pdqvar.h #define PDQ_OS_MEMWR_32(t, base, offset, data) do *((base) + (offset)) = (data); while (0)
base 178 dev/ic/pdqvar.h #define PDQ_CSR_OFFSET(base, offset) (0 + (base) + (offset))
base 384 dev/isa/aha.c ia->ia_iobase = ia->ipa_io[0].base;
base 132 dev/isa/aps.c iobase = ia->ipa_io[0].base;
base 191 dev/isa/aps.c iobase = ia->ipa_io[0].base;
base 37 dev/isa/ariareg.h #define ARIA_BASE_VALID(base) ((base) == 0x290 || (base) == 0x280 || (base) == 0x2a0 || (base) == 0x2b0)
base 85 dev/isa/ess_isapnp.c sc->sc_iobase = ia->ipa_io[0].base;
base 167 dev/isa/essreg.h #define ESS_BASE_VALID(base) ((base) == 0x220 || (base) == 0x230 || (base) == 0x240 || (base) == 0x250)
base 125 dev/isa/gscsio.c iobase = ia->ipa_io[0].base;
base 152 dev/isa/gscsio.c if (bus_space_map(sc->sc_iot, ia->ipa_io[0].base, GSCSIO_IOSIZE,
base 167 dev/isa/i82365_isapnp.c pcic_isa_bus_width_probe(sc, iot, ioh, ipa->ipa_io[0].base,
base 134 dev/isa/i82365_isasubr.c if (bus_space_map(iot, base + 0x400, length, 0, &ioh_high)) {
base 326 dev/isa/if_ie.c #define MK_24(base, ptr) ((caddr_t)((u_long)ptr - (u_long)base))
base 327 dev/isa/if_ie.c #define MK_16(base, ptr) ((u_short)(u_long)MK_24(base, ptr))
base 221 dev/isa/isapnp.c for (r->base = r->minbase; r->base <= r->maxbase;
base 222 dev/isa/isapnp.c r->base += r->align) {
base 223 dev/isa/isapnp.c error = bus_space_map(t, r->base, r->length, 0, &r->h);
base 518 dev/isa/isapnp.c printf("0x%x", r->base);
base 720 dev/isa/isapnp.c isapnp_io_range[i] + ISAPNP_IO_BASE_15_8, B1(r->base));
base 722 dev/isa/isapnp.c isapnp_io_range[i] + ISAPNP_IO_BASE_7_0, B0(r->base));
base 732 dev/isa/isapnp.c isapnp_mem_range[i] + ISAPNP_MEM_BASE_23_16, B2(r->base));
base 734 dev/isa/isapnp.c isapnp_mem_range[i] + ISAPNP_MEM_BASE_15_8, B1(r->base));
base 796 dev/isa/isapnp.c B3(r->base));
base 799 dev/isa/isapnp.c B2(r->base));
base 802 dev/isa/isapnp.c B1(r->base));
base 805 dev/isa/isapnp.c B0(r->base));
base 271 dev/isa/isapnpdebug.c r->base = (v0 << 8) | v1;
base 272 dev/isa/isapnpdebug.c if (r->base == 0)
base 283 dev/isa/isapnpdebug.c r->base = (v0 << 16) | (v1 << 8);
base 284 dev/isa/isapnpdebug.c if (r->base == 0)
base 346 dev/isa/isapnpdebug.c r->base = (v0 << 24) | (v1 << 16) | (v2 << 8) | v3;
base 347 dev/isa/isapnpdebug.c if (r->base == 0)
base 382 dev/isa/isapnpdebug.c printf("io[%d]: 0x%x/%d\n", i, r->base, r->length);
base 388 dev/isa/isapnpdebug.c printf("mem[%d]: 0x%x/%d\n", i, r->base, r->length);
base 406 dev/isa/isapnpdebug.c printf("mem32[%d]: 0x%x/%d\n", i, r->base, r->length);
base 214 dev/isa/isavar.h u_int32_t base;
base 292 dev/isa/isavar.h #define ia_iobase ipa_io[0].base
base 298 dev/isa/isavar.h #define ia_maddr ipa_mem[0].base
base 103 dev/isa/it.c iobase = ia->ipa_io[0].base;
base 137 dev/isa/it.c iobase = ia->ipa_io[0].base;
base 71 dev/isa/lm78_isa.c iobase = ia->ipa_io[0].base;
base 145 dev/isa/lm78_isa.c iobase = ia->ipa_io[0].base;
base 106 dev/isa/lpt_isa.c bus_addr_t base;
base 122 dev/isa/lpt_isa.c base = ia->ia_iobase;
base 124 dev/isa/lpt_isa.c if (bus_space_map(iot, base, iosz, 0, &ioh))
base 131 dev/isa/lpt_isa.c if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
base 135 dev/isa/lpt_isa.c if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
base 140 dev/isa/lpt_isa.c if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
base 146 dev/isa/lpt_isa.c if (!lpt_port_test(iot, ioh, base, lpt_data, data, mask))
base 255 dev/isa/nsclpcsio_isa.c iobase = ia->ipa_io[0].base;
base 286 dev/isa/nsclpcsio_isa.c iobase = ia->ipa_io[0].base;
base 45 dev/isa/pssreg.h #define PSS_BASE_VALID(base) ((base) == 0x220 || (base) == 0x240)
base 100 dev/isa/sb_isapnp.c sc->sc_iobase = ia->ipa_io[0].base;
base 116 dev/isa/sb_isapnp.c sc->sc_mpu_sc.iobase = ia->ipa_io[1].base;
base 288 dev/isa/sbreg.h #define SB_BASE_VALID(base) ((base) == 0x220 || (base) == 0x240)
base 149 dev/isa/viasio.c if (bus_space_map(iot, ia->ipa_io[0].base, VT1211_IOSIZE, 0, &ioh))
base 177 dev/isa/viasio.c if (bus_space_map(sc->sc_iot, ia->ipa_io[0].base,
base 47 dev/isa/wssreg.h #define WSS_BASE_VALID(base) ((base) == 0x0530 || \
base 48 dev/isa/wssreg.h (base) == 0x0604 || \
base 49 dev/isa/wssreg.h (base) == 0x0e80 || \
base 50 dev/isa/wssreg.h (base) == 0x0f40)
base 118 dev/isa/ym_isapnp.c sc->sc_mpu_sc.iobase = ia->ipa_io[3].base;
base 1149 dev/microcode/ncr53cxxx/ncr53cxxx.c size_t len = strlen (base) + strlen (sub) + 2;
base 1152 dev/microcode/ncr53cxxx/ncr53cxxx.c strlcpy (fn, base, len);
base 1153 dev/microcode/ncr53cxxx/ncr53cxxx.c base = strrchr(fn, '.');
base 1154 dev/microcode/ncr53cxxx/ncr53cxxx.c if (base)
base 1155 dev/microcode/ncr53cxxx/ncr53cxxx.c *base = 0;
base 1489 dev/microcode/siop/ncr53cxxx.c size_t len = strlen (base) + strlen (sub) + 2;
base 1492 dev/microcode/siop/ncr53cxxx.c strlcpy (fn, base, len);
base 1493 dev/microcode/siop/ncr53cxxx.c base = strrchr(fn, '.');
base 1494 dev/microcode/siop/ncr53cxxx.c if (base)
base 1495 dev/microcode/siop/ncr53cxxx.c *base = 0;
base 143 dev/pci/auich.c u_int32_t base;
base 1212 dev/pci/auich.c q->base = sc->pcmo_p;
base 1267 dev/pci/auich.c q->base = sc->pcmi_p;
base 1354 dev/pci/auich.c q->base = sc->pcmo_start;
base 1405 dev/pci/auich.c q->base = sc->pcmi_start;
base 1488 dev/pci/auich.c sc->dmalist_pcmi[i].base = p->map->dm_segs[0].ds_addr;
base 525 dev/pci/auvia.c int mode, base;
base 535 dev/pci/auvia.c base = AUVIA_PLAY_BASE;
base 538 dev/pci/auvia.c base = AUVIA_RECORD_BASE;
base 543 dev/pci/auvia.c base + VIA8233_RP_RATEFMT) & ~(VIA8233_RATEFMT_48K
base 555 dev/pci/auvia.c base + VIA8233_RP_RATEFMT, v);
base 666 dev/pci/emuxkireg.h #define EMU_DSP_IOL(base, num) (base + (num << 1))
base 667 dev/pci/emuxkireg.h #define EMU_DSP_IOR(base, num) (EMU_DSP_IOL(base, num) + 1)
base 553 dev/pci/if_che.c pcireg_t rv, base;
base 557 dev/pci/if_che.c &base, NULL)) {
base 564 dev/pci/if_che.c pci_conf_write(pa->pa_pc, pa->pa_tag, base, addr);
base 568 dev/pci/if_che.c rv = pci_conf_read(pa->pa_pc, pa->pa_tag, base);
base 578 dev/pci/if_che.c *dp = pci_conf_read(pa->pa_pc, pa->pa_tag, base + CHE_PCI_VPD_DATA);
base 170 dev/pci/if_ipw.c bus_addr_t base;
base 186 dev/pci/if_ipw.c PCI_MAPREG_MEM_TYPE_32BIT, 0, &memt, &memh, &base, &sc->sc_sz, 0);
base 358 dev/pci/if_msk.c int base = XM_RXFILT_ENTRY(slot);
base 360 dev/pci/if_msk.c SK_XM_WRITE_2(sc_if, base, *(u_int16_t *)(&addr[0]));
base 361 dev/pci/if_msk.c SK_XM_WRITE_2(sc_if, base + 2, *(u_int16_t *)(&addr[2]));
base 362 dev/pci/if_msk.c SK_XM_WRITE_2(sc_if, base + 4, *(u_int16_t *)(&addr[4]));
base 422 dev/pci/if_sk.c int base = XM_RXFILT_ENTRY(slot);
base 424 dev/pci/if_sk.c SK_XM_WRITE_2(sc_if, base, letoh16(*(u_int16_t *)(&addr[0])));
base 425 dev/pci/if_sk.c SK_XM_WRITE_2(sc_if, base + 2, letoh16(*(u_int16_t *)(&addr[2])));
base 426 dev/pci/if_sk.c SK_XM_WRITE_2(sc_if, base + 4, letoh16(*(u_int16_t *)(&addr[4])));
base 1035 dev/pci/if_txp.c sc->sc_cmdring.base = (struct txp_cmd_desc *)sc->sc_cmdring_dma.dma_vaddr;
base 1049 dev/pci/if_txp.c sc->sc_rspring.base = (struct txp_rsp_desc *)sc->sc_rspring_dma.dma_vaddr;
base 1610 dev/pci/if_txp.c cmd = (struct txp_cmd_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
base 1628 dev/pci/if_txp.c ext = (struct txp_ext_desc *)(((u_int8_t *)sc->sc_cmdring.base) + idx);
base 1680 dev/pci/if_txp.c rsp = (struct txp_rsp_desc *)(((u_int8_t *)sc->sc_rspring.base) + ridx);
base 1736 dev/pci/if_txp.c src = sc->sc_rspring.base;
base 533 dev/pci/if_txpreg.h struct txp_cmd_desc *base;
base 539 dev/pci/if_txpreg.h struct txp_rsp_desc *base;
base 745 dev/pci/musycc.c bus_addr_t base;
base 756 dev/pci/musycc.c base = mg->mg_listmap->dm_segs[0].ds_addr;
base 769 dev/pci/musycc.c md->tx_cur->next = htole32(base + (caddr_t)dd -
base 777 dev/pci/musycc.c dd->next = htole32(base + (caddr_t)md->tx_pend - mg->mg_listkva);
base 780 dev/pci/musycc.c mg->mg_group->tx_headp[c] = htole32(base + (caddr_t)dd -
base 800 dev/pci/musycc.c bus_addr_t base;
base 808 dev/pci/musycc.c base = mg->mg_listmap->dm_segs[0].ds_addr;
base 825 dev/pci/musycc.c md->rx_prod->next = htole32(base + (caddr_t)dd -
base 833 dev/pci/musycc.c dd->next = htole32(base + (caddr_t)last - mg->mg_listkva);
base 835 dev/pci/musycc.c mg->mg_group->rx_headp[c] = htole32(base + (caddr_t)dd -
base 991 dev/pci/musycc.c bus_addr_t base;
base 1006 dev/pci/musycc.c base = mg->mg_listmap->dm_segs[0].ds_addr;
base 1062 dev/pci/musycc.c mg->mg_group->tx_headp[c] = htole32(base +
base 1562 dev/pci/musycc.c e->base = offset << 2;
base 1948 dev/pci/musycc.c bus_addr_t base, addr;
base 1964 dev/pci/musycc.c base = mg->mg_listmap->dm_segs[0].ds_addr;
base 1979 dev/pci/musycc.c addr = htole32(base + ((caddr_t)dd - mg->mg_listkva));
base 2000 dev/pci/musycc.c addr = htole32(base + ((caddr_t)dd - mg->mg_listkva));
base 253 dev/pci/musycc_obsd.c ma.ma_base = ntohl(framerconf.base);
base 247 dev/pci/musyccreg.h u_int32_t base;
base 134 dev/pci/musyccvar.h bus_size_t base;
base 839 dev/pci/neo.c u_int32_t base;
base 867 dev/pci/neo.c base = (mode == AUMODE_PLAY) ?
base 869 dev/pci/neo.c nm_wr(sc, base + NM_RATE_REG_OFFSET, x, 1);
base 320 dev/pci/pci_map.c bus_addr_t base;
base 327 dev/pci/pci_map.c &base, &size, &flags)) != 0)
base 329 dev/pci/pci_map.c if (base == 0)
base 360 dev/pci/pci_map.c if (bus_space_map(tag, base, size, busflags | flags, &handle))
base 368 dev/pci/pci_map.c *basep = base;
base 141 dev/pci/pciide_pdc202xx_reg.h #define PDC205_REGADDR(base,ch) ((base)+((ch)<<8))
base 115 dev/pci/piixpm.c pcireg_t base, conf;
base 130 dev/pci/piixpm.c base = pci_conf_read(pa->pa_pc, pa->pa_tag, PIIX_SMB_BASE) & 0xffff;
base 131 dev/pci/piixpm.c if (PCI_MAPREG_IO_ADDR(base) == 0 ||
base 132 dev/pci/piixpm.c bus_space_map(sc->sc_iot, PCI_MAPREG_IO_ADDR(base),
base 983 dev/pckbc/wskbdmap_mfii.c { name, base, sizeof(map)/sizeof(keysym_t), map }
base 863 dev/sun/sunkbdmap.c { name, base, sizeof(map)/sizeof(keysym_t), map }
base 199 dev/tc/ioasicreg.h #define IOASIC_SYS_ETHER_ADDRESS(base) ((base) + IOASIC_SLOT_2_START)
base 200 dev/tc/ioasicreg.h #define IOASIC_SYS_LANCE(base) ((base) + IOASIC_SLOT_3_START)
base 1019 dev/usb/ukbdmap.c { name, base, sizeof(map)/sizeof(keysym_t), map }
base 65 dev/usb/umass_scsi.c struct umassbus_softc base;
base 114 dev/usb/umass_scsi.c scbus->base.sc_child =
base 144 dev/usb/umass_scsi.c scbus->base.sc_child = config_found((struct device *)sc,
base 299 dev/usb/usb_subr.c char *cp = base;
base 306 dev/usb/usb_subr.c snprintf(cp, base + len - cp, ", class %d/%d",
base 312 dev/usb/usb_subr.c snprintf(cp, base + len - cp, ", rev ");
base 314 dev/usb/usb_subr.c usbd_printBCD(cp, base + len - cp, bcdUSB);
base 316 dev/usb/usb_subr.c snprintf(cp, base + len - cp, "/");
base 318 dev/usb/usb_subr.c usbd_printBCD(cp, base + len - cp, bcdDevice);
base 320 dev/usb/usb_subr.c snprintf(cp, base + len - cp, ", addr %d", dev->address);
base 387 dev/wscons/wskbdutil.c cur = mp->base;
base 445 dev/wscons/wskbdutil.c cur = mp->base;
base 58 dev/wscons/wsksymvar.h kbd_t base; /* map this one is based on */
base 666 dev/wsfont/wsfont.c int base; /* High byte for first level2 entry */
base 671 dev/wsfont/wsfont.c int base; /* Low byte for first character */
base 850 dev/wsfont/wsfont.c if (hi >= map1->base && hi < map1->base + map1->size) {
base 852 dev/wsfont/wsfont.c map1->level2[hi - map1->base];
base 855 dev/wsfont/wsfont.c lo >= map2->base && lo < map2->base + map2->size) {
base 857 dev/wsfont/wsfont.c lo -= map2->base;
base 250 kern/exec_elf.c Elf_Addr base;
base 260 kern/exec_elf.c base = *addr + trunc_page(ph->p_vaddr)
base 271 kern/exec_elf.c base = trunc_page(uaddr);
base 272 kern/exec_elf.c bdiff = uaddr - base;
base 292 kern/exec_elf.c NEW_VMCMD2(vcset, vmcmd_map_pagedvn, psize, base, vp,
base 296 kern/exec_elf.c base + psize, vp, offset + psize, *prot, flags);
base 299 kern/exec_elf.c NEW_VMCMD2(vcset, vmcmd_map_pagedvn, psize, base, vp, offset,
base 504 kern/kern_malloc.c vaddr_t base, limit;
base 519 kern/kern_malloc.c base = vm_map_min(kernel_map);
base 520 kern/kern_malloc.c kmem_map = uvm_km_suballoc(kernel_map, &base, &limit,
base 523 kern/kern_malloc.c kmembase = (char *)base;
base 682 kern/subr_prf.c enum { OCT, DEC, HEX } base;/* base for [diouxX] conversion */
base 778 kern/subr_prf.c base = (db_radix == 8) ? OCT : DEC;
base 791 kern/subr_prf.c base = HEX;
base 890 kern/subr_prf.c base = DEC;
base 929 kern/subr_prf.c base = OCT;
base 941 kern/subr_prf.c base = HEX;
base 972 kern/subr_prf.c base = DEC;
base 980 kern/subr_prf.c base = HEX;
base 1007 kern/subr_prf.c switch (base) {
base 313 kern/subr_userconf.c int base = 10;
base 320 kern/subr_userconf.c base = 8;
base 323 kern/subr_userconf.c base = 16;
base 339 kern/subr_userconf.c if (cc > base)
base 341 kern/subr_userconf.c num = num * base + cc;
base 257 kern/vfs_vnops.c aiov.iov_base = base;
base 243 lib/libsa/printf.c *p++ = hexdig[ul % base];
base 244 lib/libsa/printf.c } while (ul /= base);
base 259 lib/libsa/printf.c *p++ = hexdig[ull % base];
base 260 lib/libsa/printf.c } while (ull /= base);
base 66 lib/libsa/strtol.c if ((base == 0 || base == 16) &&
base 70 lib/libsa/strtol.c base = 16;
base 72 lib/libsa/strtol.c if (base == 0)
base 73 lib/libsa/strtol.c base = c == '0' ? 8 : 10;
base 93 lib/libsa/strtol.c cutlim = cutoff % base;
base 94 lib/libsa/strtol.c cutoff /= base;
base 97 lib/libsa/strtol.c cutlim -= base;
base 111 lib/libsa/strtol.c if (c >= base)
base 121 lib/libsa/strtol.c acc *= base;
base 130 lib/libsa/strtol.c acc *= base;
base 66 lib/libsa/strtoll.c if ((base == 0 || base == 16) &&
base 70 lib/libsa/strtoll.c base = 16;
base 72 lib/libsa/strtoll.c if (base == 0)
base 73 lib/libsa/strtoll.c base = c == '0' ? 8 : 10;
base 94 lib/libsa/strtoll.c cutlim = cutoff % base;
base 95 lib/libsa/strtoll.c cutoff /= base;
base 98 lib/libsa/strtoll.c cutlim -= base;
base 110 lib/libsa/strtoll.c if (c >= base)
base 120 lib/libsa/strtoll.c acc *= base;
base 129 lib/libsa/strtoll.c acc *= base;
base 56 lib/libz/inftrees.c const unsigned short FAR *base; /* base value table to use */
base 185 lib/libz/inftrees.c base = extra = work; /* dummy value--not used */
base 189 lib/libz/inftrees.c base = lbase;
base 190 lib/libz/inftrees.c base -= 257;
base 196 lib/libz/inftrees.c base = dbase;
base 226 lib/libz/inftrees.c this.val = base[work[sym]];
base 899 net/radix.c struct radix_node *base, *next;
base 910 net/radix.c base = rn;
base 919 net/radix.c while ((rn = base) != NULL) {
base 920 net/radix.c base = rn->rn_dupedkey;
base 1868 net/zlib.c int base = desc->stat_desc->extra_base;
base 1895 net/zlib.c if (n >= base) xbits = extra[n-base];
base 3879 net/zlib.c r.base = *p++; /* simple code is just the value */
base 3884 net/zlib.c r.base = d[*p++ - s];
base 4209 net/zlib.c c->sub.lit = t->base;
base 4210 net/zlib.c Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
base 4212 net/zlib.c "inflate: literal 0x%02x\n", t->base));
base 4219 net/zlib.c c->len = t->base;
base 4257 net/zlib.c c->sub.copy.dist = t->base;
base 4461 net/zlib.c Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
base 4463 net/zlib.c "inflate: * literal 0x%02x\n", t->base));
base 4464 net/zlib.c *q++ = (Byte)t->base;
base 4474 net/zlib.c c = t->base + ((uInt)b & inflate_mask[e]);
base 4488 net/zlib.c d = t->base + ((uInt)b & inflate_mask[e]);
base 4535 net/zlib.c Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ?
base 4537 net/zlib.c "inflate: * literal 0x%02x\n", t->base));
base 4538 net/zlib.c *q++ = (Byte)t->base;
base 71 net80211/ieee80211_crypto.c const void *base;
base 696 net80211/ieee80211_crypto.c MD5Update(&ctx, (u_int8_t *)vec[i].base, vec[i].len);
base 715 net80211/ieee80211_crypto.c vec.base = text;
base 746 net80211/ieee80211_crypto.c SHA1Update(&ctx, (u_int8_t *)vec[i].base, vec[i].len);
base 765 net80211/ieee80211_crypto.c vec.base = text;
base 781 net80211/ieee80211_crypto.c vec[vcnt].base = &count;
base 810 net80211/ieee80211_crypto.c vec[0].base = "Pairwise key expansion";
base 815 net80211/ieee80211_crypto.c vec[1].base = ret ? aa : spa;
base 818 net80211/ieee80211_crypto.c vec[2].base = ret ? spa : aa;
base 823 net80211/ieee80211_crypto.c vec[3].base = ret ? anonce : snonce;
base 826 net80211/ieee80211_crypto.c vec[4].base = ret ? snonce : anonce;
base 842 net80211/ieee80211_crypto.c vec[0].base = "PMK Name";
base 844 net80211/ieee80211_crypto.c vec[1].base = aa;
base 846 net80211/ieee80211_crypto.c vec[2].base = spa;
base 863 net80211/ieee80211_crypto.c vec[0].base = "Group key expansion";
base 865 net80211/ieee80211_crypto.c vec[1].base = aa;
base 867 net80211/ieee80211_crypto.c vec[2].base = gnonce;
base 66 net80211/ieee80211_regdomain.c const char *base = base0;
base 71 net80211/ieee80211_regdomain.c p = base + (lim >> 1) * size;
base 76 net80211/ieee80211_regdomain.c base = (const char *)p + size;
base 880 scsi/scsiconf.c const unsigned char *base = (const unsigned char *)_base;
base 886 scsi/scsiconf.c for (*bestpriority = 0, bestmatch = 0; nmatches--; base += matchsize) {
base 887 scsi/scsiconf.c struct scsi_inquiry_pattern *match = (void *)base;
base 915 scsi/scsiconf.c bestmatch = base;
base 86 sys/mount.h caddr_t base; /* base of file system in memory */
base 2766 ufs/ffs/ffs_softdep.c oldoffset = offset + (oldloc - base);
base 2767 ufs/ffs/ffs_softdep.c newoffset = offset + (newloc - base);
base 140 ufs/mfs/mfs_vfsops.c struct fs *fs = (struct fs *)(base + SBOFF);
base 148 ufs/mfs/mfs_vfsops.c mfs_rootbase = base;
base 210 ufs/mfs/mfs_vfsops.c mfsp->mfs_baseoff = args.base;
base 249 ufs/mfs/mfs_vfsops.c caddr_t base;
base 252 ufs/mfs/mfs_vfsops.c base = mfsp->mfs_baseoff;
base 256 ufs/mfs/mfs_vfsops.c mfs_doio(bp, base);
base 151 ufs/mfs/mfs_vnops.c caddr_t base;
base 153 ufs/mfs/mfs_vnops.c base = mfsp->mfs_baseoff + (bp->b_blkno << DEV_BSHIFT);
base 155 ufs/mfs/mfs_vnops.c bcopy(base, bp->b_data, bp->b_bcount);
base 157 ufs/mfs/mfs_vnops.c bcopy(bp->b_data, base, bp->b_bcount);
base 181 ufs/mfs/mfs_vnops.c base += (bp->b_blkno << DEV_BSHIFT);
base 183 ufs/mfs/mfs_vnops.c bp->b_error = copyin(base, bp->b_data, bp->b_bcount);
base 185 ufs/mfs/mfs_vnops.c bp->b_error = copyout(bp->b_data, base, bp->b_bcount);
base 167 uvm/uvm_km.c vaddr_t base = VM_MIN_KERNEL_ADDRESS;
base 183 uvm/uvm_km.c uvm_map_setup(&kernel_map_store, base, end, VM_MAP_PAGEABLE);
base 185 uvm/uvm_km.c if (base != start && uvm_map(&kernel_map_store, &base, start - base,