sh 226 arch/i386/i386/bios.c struct smbhdr * sh = (struct smbhdr *)va; sh 232 arch/i386/i386/bios.c if (sh->sig != SMBIOS_SIGNATURE) sh 234 arch/i386/i386/bios.c i = sh->len; sh 248 arch/i386/i386/bios.c pa = trunc_page(sh->addr); sh 249 arch/i386/i386/bios.c end = round_page(sh->addr + sh->size); sh 255 arch/i386/i386/bios.c (sh->addr & PGOFSET)); sh 256 arch/i386/i386/bios.c smbios_entry.len = sh->size; sh 257 arch/i386/i386/bios.c smbios_entry.mjr = sh->majrev; sh 258 arch/i386/i386/bios.c smbios_entry.min = sh->minrev; sh 259 arch/i386/i386/bios.c smbios_entry.count = sh->count; sh 265 arch/i386/i386/bios.c sh->majrev, sh->minrev, sh->addr, sh->count); sh 288 compat/ibcs2/ibcs2_exec.c coff_find_section(p, vp, fp, sh, s_type) sh 292 compat/ibcs2/ibcs2_exec.c struct coff_scnhdr *sh; sh 301 compat/ibcs2/ibcs2_exec.c error = vn_rdwr(UIO_READ, vp, (caddr_t) sh, sh 316 compat/ibcs2/ibcs2_exec.c if (sh->s_flags == s_type) sh 342 compat/ibcs2/ibcs2_exec.c struct coff_scnhdr sh; sh 347 compat/ibcs2/ibcs2_exec.c error = coff_find_section(p, epp->ep_vp, fp, &sh, COFF_STYP_TEXT); sh 354 compat/ibcs2/ibcs2_exec.c epp->ep_taddr = COFF_ALIGN(sh.s_vaddr); sh 355 compat/ibcs2/ibcs2_exec.c offset = sh.s_scnptr - (sh.s_vaddr - epp->ep_taddr); sh 356 compat/ibcs2/ibcs2_exec.c epp->ep_tsize = sh.s_size + (sh.s_vaddr - epp->ep_taddr); sh 388 compat/ibcs2/ibcs2_exec.c error = coff_find_section(p, epp->ep_vp, fp, &sh, COFF_STYP_DATA); sh 395 compat/ibcs2/ibcs2_exec.c epp->ep_daddr = COFF_ALIGN(sh.s_vaddr); sh 396 compat/ibcs2/ibcs2_exec.c offset = sh.s_scnptr - (sh.s_vaddr - epp->ep_daddr); sh 397 compat/ibcs2/ibcs2_exec.c dsize = sh.s_size + (sh.s_vaddr - epp->ep_daddr); sh 424 compat/ibcs2/ibcs2_exec.c error = coff_find_section(p, epp->ep_vp, fp, &sh, COFF_STYP_SHLIB); sh 429 compat/ibcs2/ibcs2_exec.c unsigned int len = sh.s_size, entry_len; sh 438 compat/ibcs2/ibcs2_exec.c len, sh.s_scnptr, sh 490 compat/ibcs2/ibcs2_exec.c struct coff_scnhdr sh, *shp = &sh; sh 194 dev/ic/ar5210.c bus_space_handle_t sh, int *status) sh 198 dev/ic/ar5211.c bus_space_handle_t sh, int *status) sh 195 dev/ic/ar5212.c bus_space_handle_t sh, int *status) sh 151 dev/ic/ar5xxx.c bus_space_handle_t sh, u_int is_64bit, int *status) sh 187 dev/ic/ar5xxx.c hal->ah_sh = sh; sh 240 dev/ic/ar5xxx.c if ((attach)(device, hal, st, sh, status) == NULL) sh 977 dev/ic/elink3.c int sh, len, pad, txreg; sh 1037 dev/ic/elink3.c sh = splhigh(); sh 1070 dev/ic/elink3.c splx(sh); sh 1378 dev/ic/elink3.c int len, pad, sh, rxreg; sh 1416 dev/ic/elink3.c sh = splhigh(); sh 1427 dev/ic/elink3.c splx(sh); sh 1467 dev/ic/elink3.c splx(sh); sh 131 dev/ic/smc83c170.c bus_space_handle_t sh = sc->sc_sh; sh 231 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_GENCTL, 0); sh 964 dev/ic/smc83c170.c bus_space_handle_t sh = sc->sc_sh; sh 983 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_TXTEST, 0); sh 995 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_GENCTL, genctl); sh 1000 dev/ic/smc83c170.c reg0 = bus_space_read_4(st, sh, EPIC_NVCTL); sh 1001 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_NVCTL, reg0 | NVCTL_GPIO1 | NVCTL_GPOE1); sh 1002 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_MIICFG, MIICFG_ENASER); sh 1003 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_GENCTL, genctl | GENCTL_RESET_PHY); sh 1005 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_GENCTL, genctl); sh 1007 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_NVCTL, reg0); sh 1013 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_LAN0, reg0); sh 1015 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_LAN1, reg0); sh 1017 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_LAN2, reg0); sh 1023 dev/ic/smc83c170.c reg0 = bus_space_read_4(st, sh, EPIC_RXCON) & sh 1028 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_RXCON, reg0); sh 1077 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_INTMASK, INTMASK); sh 1078 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_GENCTL, genctl | GENCTL_INTENA); sh 1083 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_PTCDAR, sh 1085 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_PRCDAR, sh 1091 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_COMMAND, sh 1143 dev/ic/smc83c170.c bus_space_handle_t sh = sc->sc_sh; sh 1168 dev/ic/smc83c170.c reg = bus_space_read_4(st, sh, EPIC_GENCTL); sh 1169 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_GENCTL, reg & ~GENCTL_INTENA); sh 1170 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_INTMASK, 0); sh 1175 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_COMMAND, COMMAND_STOP_RDMA | sh 1201 dev/ic/smc83c170.c bus_space_handle_t sh = sc->sc_sh; sh 1205 dev/ic/smc83c170.c #define EEPROM_WAIT_READY(st, sh) \ sh 1206 dev/ic/smc83c170.c while ((bus_space_read_4((st), (sh), EPIC_EECTL) & EECTL_EERDY) == 0) \ sh 1212 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_EECTL, EECTL_ENABLE); sh 1213 dev/ic/smc83c170.c EEPROM_WAIT_READY(st, sh); sh 1217 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_EECTL, EECTL_ENABLE|EECTL_EECS); sh 1218 dev/ic/smc83c170.c EEPROM_WAIT_READY(st, sh); sh 1225 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_EECTL, reg); sh 1226 dev/ic/smc83c170.c EEPROM_WAIT_READY(st, sh); sh 1227 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_EECTL, reg|EECTL_EESK); sh 1228 dev/ic/smc83c170.c EEPROM_WAIT_READY(st, sh); sh 1229 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_EECTL, reg); sh 1230 dev/ic/smc83c170.c EEPROM_WAIT_READY(st, sh); sh 1238 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_EECTL, reg); sh 1239 dev/ic/smc83c170.c EEPROM_WAIT_READY(st, sh); sh 1240 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_EECTL, reg|EECTL_EESK); sh 1241 dev/ic/smc83c170.c EEPROM_WAIT_READY(st, sh); sh 1242 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_EECTL, reg); sh 1243 dev/ic/smc83c170.c EEPROM_WAIT_READY(st, sh); sh 1250 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_EECTL, reg|EECTL_EESK); sh 1251 dev/ic/smc83c170.c EEPROM_WAIT_READY(st, sh); sh 1252 dev/ic/smc83c170.c if (bus_space_read_4(st, sh, EPIC_EECTL) & EECTL_EEDO) sh 1254 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_EECTL, reg); sh 1255 dev/ic/smc83c170.c EEPROM_WAIT_READY(st, sh); sh 1259 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_EECTL, EECTL_ENABLE); sh 1260 dev/ic/smc83c170.c EEPROM_WAIT_READY(st, sh); sh 1266 dev/ic/smc83c170.c bus_space_write_4(st, sh, EPIC_EECTL, 0); sh 719 dev/pci/ahc_pci.c bus_space_handle_t sh, ioh; sh 802 dev/pci/ahc_pci.c sh = ioh; sh 806 dev/pci/ahc_pci.c sh = memh; sh 813 dev/pci/ahc_pci.c ahc->bsh = sh; sh 401 dev/pci/isp_pci.c bus_space_handle_t sh, ioh, memh; sh 416 dev/pci/isp_pci.c sh = memh; sh 424 dev/pci/isp_pci.c sh = ioh; sh 434 dev/pci/isp_pci.c sh = ioh; sh 443 dev/pci/isp_pci.c sh = memh; sh 457 dev/pci/isp_pci.c pcs->pci_sh = sh; sh 1566 dev/pci/musycc.c size, &e->sh)); sh 1574 dev/pci/musycc.c value = bus_space_read_1(e->st, e->sh, offset << 2); sh 1575 dev/pci/musycc.c bus_space_barrier(e->st, e->sh, 0, e->size, sh 1583 dev/pci/musycc.c bus_space_write_1(e->st, e->sh, offset << 2, value); sh 1584 dev/pci/musycc.c bus_space_barrier(e->st, e->sh, 0, e->size, sh 137 dev/pci/musyccvar.h bus_space_handle_t sh; sh 293 dev/pci/neo.c bus_space_handle_t sh = sc->regioh; sh 297 dev/pci/neo.c return bus_space_read_1(st, sh, regno); sh 299 dev/pci/neo.c return bus_space_read_2(st, sh, regno); sh 301 dev/pci/neo.c return bus_space_read_4(st, sh, regno); sh 311 dev/pci/neo.c bus_space_handle_t sh = sc->regioh; sh 315 dev/pci/neo.c bus_space_write_1(st, sh, regno, data); sh 318 dev/pci/neo.c bus_space_write_2(st, sh, regno, data); sh 321 dev/pci/neo.c bus_space_write_4(st, sh, regno, data); sh 330 dev/pci/neo.c bus_space_handle_t sh = sc->bufioh; sh 334 dev/pci/neo.c return bus_space_read_1(st, sh, regno); sh 336 dev/pci/neo.c return bus_space_read_2(st, sh, regno); sh 338 dev/pci/neo.c return bus_space_read_4(st, sh, regno); sh 348 dev/pci/neo.c bus_space_handle_t sh = sc->bufioh; sh 352 dev/pci/neo.c bus_space_write_1(st, sh, regno, data); sh 355 dev/pci/neo.c bus_space_write_2(st, sh, regno, data); sh 358 dev/pci/neo.c bus_space_write_4(st, sh, regno, data); sh 69 kern/kern_sensors.c struct ksensors_head *sh; sh 73 kern/kern_sensors.c sh = &sensdev->sensors_list; sh 78 kern/kern_sensors.c SLIST_INSERT_HEAD(sh, sens, list); sh 80 kern/kern_sensors.c for (v = SLIST_FIRST(sh); sh 119 kern/kern_sensors.c struct ksensors_head *sh; sh 123 kern/kern_sensors.c sh = &sensdev->sensors_list; sh 125 kern/kern_sensors.c SLIST_REMOVE(sh, sens, ksensor, list); sh 151 kern/kern_sensors.c struct ksensors_head *sh; sh 157 kern/kern_sensors.c sh = &sensdev->sensors_list; sh 158 kern/kern_sensors.c SLIST_FOREACH(s, sh, list) sh 57 lib/libkern/qdivrem.c static void shl(digit *p, int len, int sh); sh 269 lib/libkern/qdivrem.c shl(digit *p, int len, int sh) sh 274 lib/libkern/qdivrem.c p[i] = (digit)(LHALF((u_int)p[i] << sh) | sh 275 lib/libkern/qdivrem.c ((u_int)p[i + 1] >> (HALF_BITS - sh))); sh 276 lib/libkern/qdivrem.c p[i] = (digit)(LHALF((u_int)p[i] << sh));