isr 632 dev/ic/aic6915.c uint32_t isr;
isr 637 dev/ic/aic6915.c isr = sf_funcreg_read(sc, SF_InterruptStatus);
isr 638 dev/ic/aic6915.c if ((isr & IS_PCIPadInt) == 0)
isr 644 dev/ic/aic6915.c if (isr & IS_RxQ1DoneInt)
isr 648 dev/ic/aic6915.c if (isr & (IS_TxDmaDoneInt|IS_TxQueueDoneInt))
isr 652 dev/ic/aic6915.c if (isr & IS_AbnormalInterrupt) {
isr 654 dev/ic/aic6915.c if (isr & IS_StatisticWrapInt)
isr 658 dev/ic/aic6915.c if (isr & IS_DmaErrInt) {
isr 665 dev/ic/aic6915.c if (isr & IS_TxDataLowInt) {
isr 659 dev/ic/am7990.c register u_int16_t isr;
isr 661 dev/ic/am7990.c isr = (*sc->sc_rdcsr)(sc, LE_CSR0);
isr 665 dev/ic/am7990.c sc->sc_dev.dv_xname, isr);
isr 666 dev/ic/am7990.c printf(" isr: 0x%b\n", isr, LE_C0_BITS);
isr 669 dev/ic/am7990.c if ((isr & LE_C0_INTR) == 0)
isr 677 dev/ic/am7990.c (*sc->sc_wrcsr)(sc, LE_CSR0, isr & ~LE_C0_INEA);
isr 680 dev/ic/am7990.c if (isr & LE_C0_ERR) {
isr 681 dev/ic/am7990.c if (isr & LE_C0_BABL) {
isr 688 dev/ic/am7990.c if (isr & LE_C0_CERR) {
isr 693 dev/ic/am7990.c if (isr & LE_C0_MISS) {
isr 699 dev/ic/am7990.c if (isr & LE_C0_MERR) {
isr 706 dev/ic/am7990.c if ((isr & LE_C0_RXON) == 0) {
isr 712 dev/ic/am7990.c if ((isr & LE_C0_TXON) == 0) {
isr 719 dev/ic/am7990.c if (isr & LE_C0_RINT)
isr 721 dev/ic/am7990.c if (isr & LE_C0_TINT)
isr 1249 dev/ic/dc.c u_int32_t isr;
isr 1259 dev/ic/dc.c isr = CSR_READ_4(sc, DC_ISR);
isr 1260 dev/ic/dc.c if (isr & DC_ISR_TX_IDLE &&
isr 1261 dev/ic/dc.c ((isr & DC_ISR_RX_STATE) == DC_RXSTATE_STOPPED ||
isr 1262 dev/ic/dc.c (isr & DC_ISR_RX_STATE) == DC_RXSTATE_WAIT))
isr 2468 dev/ic/dc.c u_int32_t isr;
isr 2483 dev/ic/dc.c isr = CSR_READ_4(sc, DC_ISR);
isr 2484 dev/ic/dc.c if (isr & DC_ISR_TX_IDLE)
isr 616 dev/ic/dp8390.c u_char isr;
isr 627 dev/ic/dp8390.c isr = NIC_GET(regt, regh, ED_P0_ISR);
isr 628 dev/ic/dp8390.c if (!isr)
isr 638 dev/ic/dp8390.c NIC_PUT(regt, regh, ED_P0_ISR, isr);
isr 642 dev/ic/dp8390.c while ((NIC_GET(regt, regh, ED_P0_ISR) & isr) != 0) {
isr 644 dev/ic/dp8390.c NIC_PUT(regt, regh, ED_P0_ISR, isr);
isr 655 dev/ic/dp8390.c if (isr & (ED_ISR_PTX | ED_ISR_TXE) &&
isr 669 dev/ic/dp8390.c if (isr & ED_ISR_TXE) {
isr 724 dev/ic/dp8390.c if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) {
isr 734 dev/ic/dp8390.c if (isr & ED_ISR_OVW) {
isr 749 dev/ic/dp8390.c if (isr & ED_ISR_RXE) {
isr 798 dev/ic/dp8390.c if (isr & ED_ISR_CNT) {
isr 804 dev/ic/dp8390.c isr = NIC_GET(regt, regh, ED_P0_ISR);
isr 805 dev/ic/dp8390.c if (!isr)
isr 3486 dev/ic/isp.c isp_intr(struct ispsoftc *isp, u_int16_t isr, u_int16_t sema, u_int16_t mbox)
isr 3537 dev/ic/isp.c "interrupt (ISR=%x SEMA=%x) when not ready", isr, sema);
isr 3622 dev/ic/isp.c isr, junk, iptr, optr);
isr 421 dev/ic/isp_openbsd.c u_int16_t isr, sema, mbox;
isr 422 dev/ic/isp_openbsd.c if (ISP_READ_ISR(isp, &isr, &sema, &mbox)) {
isr 423 dev/ic/isp_openbsd.c isp_intr(isp, isr, sema, mbox);
isr 488 dev/ic/isp_openbsd.c u_int16_t isr, sema, mbox;
isr 508 dev/ic/isp_openbsd.c if (ISP_READ_ISR(isp, &isr, &sema, &mbox)) {
isr 509 dev/ic/isp_openbsd.c isp_intr(isp, isr, sema, mbox);
isr 394 dev/ic/isp_openbsd.h u_int16_t isr, sema, mbox;
isr 398 dev/ic/isp_openbsd.h if (ISP_READ_ISR(isp, &isr, &sema, &mbox)) {
isr 399 dev/ic/isp_openbsd.h isp_intr(isp, isr, sema, mbox);
isr 256 dev/ic/ispreg.h #define INT_PENDING(isp, isr) (IS_FC(isp)? \
isr 257 dev/ic/ispreg.h ((isr & BIU2100_ISR_RISC_INT) != 0) : ((isr & BIU_ISR_RISC_INT) != 0))
isr 1125 dev/ic/rtw.c rtw_intr_rx(struct rtw_softc *sc, u_int16_t isr)
isr 1493 dev/ic/rtw.c rtw_intr_tx(struct rtw_softc *sc, u_int16_t isr)
isr 1507 dev/ic/rtw.c if ((isr & RTW_INTR_TX) != 0)
isr 1512 dev/ic/rtw.c rtw_intr_beacon(struct rtw_softc *sc, u_int16_t isr)
isr 1524 dev/ic/rtw.c if ((isr & (RTW_INTR_TBDOK|RTW_INTR_TBDER)) != 0) {
isr 1529 dev/ic/rtw.c (next == tdb->tdb_next) ? "" : "un", isr, next,
isr 1538 dev/ic/rtw.c if ((isr & RTW_INTR_BCNINT) != 0 &&
isr 1543 dev/ic/rtw.c ", %16llu\n", __func__, isr,
isr 1737 dev/ic/rtw.c rtw_intr_ioerror(struct rtw_softc *sc, u_int16_t isr)
isr 1743 dev/ic/rtw.c if ((isr & RTW_INTR_TXFOVW) != 0) {
isr 1750 dev/ic/rtw.c if ((isr & (RTW_INTR_RDU|RTW_INTR_RXFOVW)) != 0) {
isr 1756 dev/ic/rtw.c "\n", sc->sc_dev.dv_xname, isr));
isr 1836 dev/ic/rtw.c u_int16_t isr;
isr 1851 dev/ic/rtw.c isr = RTW_READ16(regs, RTW_ISR);
isr 1853 dev/ic/rtw.c RTW_WRITE16(regs, RTW_ISR, isr);
isr 1859 dev/ic/rtw.c if (isr == 0)
isr 1864 dev/ic/rtw.c if ((isr & flag) != 0) { \
isr 1870 dev/ic/rtw.c if ((rtw_debug & RTW_DEBUG_INTR) != 0 && isr != 0) {
isr 1873 dev/ic/rtw.c printf("%s: reg[ISR] = %x", sc->sc_dev.dv_xname, isr);
isr 1897 dev/ic/rtw.c if ((isr & RTW_INTR_RX) != 0)
isr 1898 dev/ic/rtw.c rtw_intr_rx(sc, isr & RTW_INTR_RX);
isr 1899 dev/ic/rtw.c if ((isr & RTW_INTR_TX) != 0)
isr 1900 dev/ic/rtw.c rtw_intr_tx(sc, isr & RTW_INTR_TX);
isr 1901 dev/ic/rtw.c if ((isr & RTW_INTR_BEACON) != 0)
isr 1902 dev/ic/rtw.c rtw_intr_beacon(sc, isr & RTW_INTR_BEACON);
isr 1903 dev/ic/rtw.c if ((isr & RTW_INTR_ATIMINT) != 0)
isr 1905 dev/ic/rtw.c if ((isr & RTW_INTR_IOERROR) != 0)
isr 1906 dev/ic/rtw.c rtw_intr_ioerror(sc, isr & RTW_INTR_IOERROR);
isr 1907 dev/ic/rtw.c if ((isr & RTW_INTR_TIMEOUT) != 0)
isr 379 dev/pci/if_san_common.c if (card->isr)
isr 380 dev/pci/if_san_common.c card->isr(card);
isr 395 dev/pci/if_san_common.h void(*isr)(struct sdla*); /* interrupt service routine */
isr 511 dev/pci/if_san_xilinx.c card->isr = &wp_xilinx_isr;
isr 564 dev/pci/if_san_xilinx.c card->isr = NULL;
isr 805 dev/pci/if_stge.c uint16_t isr;
isr 811 dev/pci/if_stge.c isr = CSR_READ_2(sc, STGE_IntStatusAck);
isr 812 dev/pci/if_stge.c if ((isr & sc->sc_IntEnable) == 0)
isr 816 dev/pci/if_stge.c if (isr & IS_HostError) {
isr 824 dev/pci/if_stge.c if (isr & (IS_RxDMAComplete|IS_RFDListEnd)) {
isr 826 dev/pci/if_stge.c if (isr & IS_RFDListEnd) {
isr 838 dev/pci/if_stge.c if (isr & (IS_TxDMAComplete|IS_TxComplete))
isr 842 dev/pci/if_stge.c if (isr & IS_UpdateStats)
isr 846 dev/pci/if_stge.c if (isr & IS_TxComplete) {
isr 828 dev/pci/if_tht.c u_int32_t isr;
isr 830 dev/pci/if_tht.c isr = tht_read(sc, THT_REG_ISR);
isr 831 dev/pci/if_tht.c if (isr == 0x0) {
isr 836 dev/pci/if_tht.c DPRINTF(THT_D_INTR, "%s: isr: 0x%b\n", DEVNAME(sc), isr, THT_FMT_ISR);
isr 838 dev/pci/if_tht.c if (ISSET(isr, THT_REG_ISR_LINKCHG(0) | THT_REG_ISR_LINKCHG(1)))
isr 843 dev/pci/if_tht.c if (ISSET(isr, THT_REG_ISR_RXD(0)))
isr 846 dev/pci/if_tht.c if (ISSET(isr, THT_REG_ISR_RXF(0)))
isr 849 dev/pci/if_tht.c if (ISSET(isr, THT_REG_ISR_TXF(0)))
isr 570 dev/pci/if_txp.c u_int32_t isr;
isr 583 dev/pci/if_txp.c isr = READ_REG(sc, TXP_ISR);
isr 584 dev/pci/if_txp.c while (isr) {
isr 586 dev/pci/if_txp.c WRITE_REG(sc, TXP_ISR, isr);
isr 604 dev/pci/if_txp.c isr = READ_REG(sc, TXP_ISR);
isr 765 dev/pci/isp_pci.c u_int16_t isr, sema;
isr 768 dev/pci/isp_pci.c if (isp_pci_rd_debounced(isp, BIU_ISR, &isr)) {
isr 775 dev/pci/isp_pci.c isr = BXR2(pcs, IspVirt2Off(isp, BIU_ISR));
isr 778 dev/pci/isp_pci.c isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema);
isr 779 dev/pci/isp_pci.c isr &= INT_PENDING_MASK(isp);
isr 781 dev/pci/isp_pci.c if (isr == 0 && sema == 0) {
isr 784 dev/pci/isp_pci.c *isrp = isr;
isr 1205 dev/pci/isp_pci.c u_int16_t isr, sema, mbox;
isr 1209 dev/pci/isp_pci.c if (ISP_READ_ISR(isp, &isr, &sema, &mbox) == 0) {
isr 1214 dev/pci/isp_pci.c isp_intr(isp, isr, sema, mbox);
isr 639 dev/pcmcia/if_xe.c u_int8_t esr, rsr, isr, rx_status, savedpage;
isr 655 dev/pcmcia/if_xe.c isr = bus_space_read_1(sc->sc_bst, sc->sc_bsh, sc->sc_offset + ISR0);
isr 659 dev/pcmcia/if_xe.c if (isr == 0xff) {
isr 308 dev/sbus/isp_sbus.c u_int16_t isr, sema, mbox;
isr 312 dev/sbus/isp_sbus.c if (ISP_READ_ISR(isp, &isr, &sema, &mbox) == 0) {
isr 317 dev/sbus/isp_sbus.c isp_intr(isp, isr, sema, mbox);
isr 335 dev/sbus/isp_sbus.c u_int16_t isr, sema;
isr 337 dev/sbus/isp_sbus.c isr = BXR2(sbc, IspVirt2Off(isp, BIU_ISR));
isr 339 dev/sbus/isp_sbus.c isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema);
isr 340 dev/sbus/isp_sbus.c isr &= INT_PENDING_MASK(isp);
isr 342 dev/sbus/isp_sbus.c if (isr == 0 && sema == 0) {
isr 345 dev/sbus/isp_sbus.c *isrp = isr;
isr 137 net/if_faith.c int s, isr;
isr 166 net/if_faith.c isr = NETISR_IP;
isr 172 net/if_faith.c isr = NETISR_IPV6;
isr 191 net/if_faith.c schednetisr(isr);
isr 234 net/if_loop.c int s, isr;
isr 288 net/if_loop.c isr = NETISR_IP;
isr 294 net/if_loop.c isr = NETISR_IPV6;
isr 300 net/if_loop.c isr = NETISR_ATALK;
isr 317 net/if_loop.c schednetisr(isr);
isr 332 net/if_loop.c int s, isr;
isr 349 net/if_loop.c isr = NETISR_IP;
isr 356 net/if_loop.c isr = NETISR_IPV6;
isr 362 net/if_loop.c isr = NETISR_ATALK;
isr 379 net/if_loop.c schednetisr(isr);
isr 780 net/if_tun.c int isr;
isr 874 net/if_tun.c isr = NETISR_IP;
isr 880 net/if_tun.c isr = NETISR_IPV6;
isr 886 net/if_tun.c isr = NETISR_ATALK;
isr 905 net/if_tun.c schednetisr(isr);
isr 151 netinet/ip_ipip.c int isr;
isr 338 netinet/ip_ipip.c isr = NETISR_IP;
isr 344 netinet/ip_ipip.c isr = NETISR_IPV6;
isr 371 netinet/ip_ipip.c schednetisr(isr);