clock             271 dev/ic/ar5211.c 	u_int32_t turbo, mode, clock;
clock             275 dev/ic/ar5211.c 	clock = 0;
clock             283 dev/ic/ar5211.c 		clock |= AR5K_AR5211_PHY_PLL_44MHZ;
clock             286 dev/ic/ar5211.c 		clock |= AR5K_AR5211_PHY_PLL_40MHZ;
clock             333 dev/ic/ar5211.c 	AR5K_REG_WRITE(AR5K_AR5211_PHY_PLL, clock);
clock             274 dev/ic/ar5212.c 	u_int32_t turbo, mode, clock;
clock             278 dev/ic/ar5212.c 	clock = 0;
clock             286 dev/ic/ar5212.c 		clock = AR5K_AR5212_PHY_PLL_AR5112;
clock             289 dev/ic/ar5212.c 		clock = AR5K_AR5212_PHY_PLL_AR5111;
clock             294 dev/ic/ar5212.c 		clock |= AR5K_AR5212_PHY_PLL_44MHZ;
clock             297 dev/ic/ar5212.c 		clock |= AR5K_AR5212_PHY_PLL_40MHZ;
clock             345 dev/ic/ar5212.c 	AR5K_REG_WRITE(AR5K_AR5212_PHY_PLL, clock);
clock             627 dev/ic/ar5212.c 		    ds_coef_man, clock;
clock             629 dev/ic/ar5212.c 		clock = channel->c_channel_flags & IEEE80211_CHAN_T ? 80 : 40;
clock             630 dev/ic/ar5212.c 		coef_scaled = ((5 * (clock << 24)) / 2) / channel->c_channel;
clock             654 dev/ic/ar5xxx.c ar5k_clocktoh(u_int clock, HAL_BOOL turbo)
clock             656 dev/ic/ar5xxx.c 	return (turbo == AH_TRUE ? (clock / 80) : (clock / 40));
clock            1216 dev/ic/ar5xxx.c 	u_int32_t data0, data1, clock;
clock            1238 dev/ic/ar5xxx.c 		clock = 1;
clock            1240 dev/ic/ar5xxx.c 		    | (clock << 1) | (1 << 10) | 1;
clock            1242 dev/ic/ar5xxx.c 		clock = 0;
clock            1244 dev/ic/ar5xxx.c 		    | (clock << 1) | (1 << 10) | 1;
clock             107 dev/ic/pcf8584.c pcfiic_attach(struct pcfiic_softc *sc, i2c_addr_t addr, u_int8_t clock,
clock             121 dev/ic/pcf8584.c 	sc->sc_clock = clock;
clock             130 dev/ic/siop_common.c 		if (sc->clock_period != scf_period[i].clock)
clock             140 dev/ic/siop_common.c 		if (sc->clock_period != dt_scf_period[i].clock)
clock             463 dev/ic/siop_common.c 				if (sc->clock_period != dt_scf_period[i].clock)
clock             556 dev/ic/siop_common.c 			if (sc->clock_period != scf_period[i].clock)
clock             608 dev/ic/siop_common.c 			if (sc->clock_period != scf_period[i].clock)
clock              79 dev/ic/siopreg.h 	int clock; /* clock period (ns * 10) */
clock              55 dev/ic/tc921x.c #define PL_CL_DL(c)	((0 << c->period) | (0 << c->clock) | (0 << c->data))
clock              56 dev/ic/tc921x.c #define PL_CL_DH(c)	((0 << c->period) | (0 << c->clock) | (1 << c->data))
clock              57 dev/ic/tc921x.c #define PL_CH_DL(c)	((0 << c->period) | (1 << c->clock) | (0 << c->data))
clock              58 dev/ic/tc921x.c #define PL_CH_DH(c)	((0 << c->period) | (1 << c->clock) | (1 << c->data))
clock              60 dev/ic/tc921x.c #define PH_CL_DL(c)	((1 << c->period) | (0 << c->clock) | (0 << c->data))
clock              61 dev/ic/tc921x.c #define PH_CL_DH(c)	((1 << c->period) | (0 << c->clock) | (1 << c->data))
clock              62 dev/ic/tc921x.c #define PH_CH_DL(c)	((1 << c->period) | (1 << c->clock) | (0 << c->data))
clock              63 dev/ic/tc921x.c #define PH_CH_DH(c)	((1 << c->period) | (1 << c->clock) | (1 << c->data))
clock             102 dev/ic/tc921x.h 	u_int8_t	clock;
clock             139 dev/isa/sf16fmr.c 	sc->c.clock = SF16FMR_FREQ_CLOCK;
clock             166 dev/isa/sf16fmr.c 	sc.c.clock = SF16FMR_FREQ_CLOCK;
clock            1750 dev/pci/maestro.c 	u_int clock = 48000 << 2;
clock            1751 dev/pci/maestro.c 	u_int prescale = 0, divide = (freq != 0) ? (clock / freq) : ~0;
clock            6290 dev/pci/pciide.c 	u_int8_t clock;
clock            6294 dev/pci/pciide.c 		clock = bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
clock            6297 dev/pci/pciide.c 		    PDC262_U66, clock | PDC262_U66_EN(channel));
clock            6314 dev/pci/pciide.c  	u_int8_t clock;
clock            6317 dev/pci/pciide.c 		clock = bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
clock            6320 dev/pci/pciide.c 		    PDC262_U66, clock & ~PDC262_U66_EN(channel));
clock            1615 dev/pci/tga.c  	bus_space_handle_t clock;
clock            1665 dev/pci/tga.c  	    TGA2_MEM_CLOCK + (0xe << 12), 4, &clock); /* XXX */
clock            1674 dev/pci/tga.c  		bus_space_write_4(dc->dc_memt, clock, 0, writeval);
clock            1675 dev/pci/tga.c  		bus_space_barrier(dc->dc_memt, clock, 0, 4, BUS_SPACE_BARRIER_WRITE);
clock            1679 dev/pci/tga.c  		&clock); /* XXX */
clock            1680 dev/pci/tga.c  	bus_space_write_4(dc->dc_memt, clock, 0, 0x0);
clock            1681 dev/pci/tga.c  	bus_space_barrier(dc->dc_memt, clock, 0, 0, BUS_SPACE_BARRIER_WRITE);
clock             206 dev/sbus/magma.c cd1400_compute_baud(speed_t speed, int clock, int *cor, int *bpr)
clock             214 dev/sbus/magma.c 		br = ((clock * 1000000) + (co * speed) / 2) / (co * speed);
clock            1017 dev/sbus/spif.c stty_compute_baud(speed, clock, bprlp, bprhp)
clock            1019 dev/sbus/spif.c 	int clock;
clock            1024 dev/sbus/spif.c 	rate = (2 * clock) / (16 * speed);
clock              34 lib/libsa/ctime.c ctime(const time_t *clock)
clock              48 lib/libsa/ctime.c 	time_t tt = *clock;
clock            1541 netbt/hci.h    	uint8_t		clock;		/* which clock */
clock            1547 netbt/hci.h    	uint32_t	clock;		/* clock value */