STATUS            216 dev/isa/seagate.c #define CONTROL	STATUS
STATUS            464 dev/isa/seagate.c 	if ((STATUS & STAT_PARITY) == 0 &&
STATUS            465 dev/isa/seagate.c 	    (STATUS & (STAT_SEL | STAT_IO)) != (STAT_SEL | STAT_IO))
STATUS            473 dev/isa/seagate.c 	if (STATUS & STAT_PARITY) {
STATUS            479 dev/isa/seagate.c 	if ((STATUS & (STAT_SEL | STAT_IO)) == (STAT_SEL | STAT_IO)) {
STATUS            728 dev/isa/seagate.c 					if ((STATUS & (STAT_SEL | STAT_IO)) ==
STATUS            744 dev/isa/seagate.c 				if ((STATUS & (STAT_SEL | STAT_IO)) ==
STATUS            837 dev/isa/seagate.c 	if (!((target_mask = STATUS) & STAT_SEL)) {
STATUS            845 dev/isa/seagate.c 	for (i = 10; i && (STATUS & (STAT_SEL | STAT_IO | STAT_BSY)) !=
STATUS            861 dev/isa/seagate.c 	for (i = 50000; i && (STATUS & STAT_SEL); i++);
STATUS            865 dev/isa/seagate.c 	for (i = 50000; i && !(STATUS & STAT_REQ); i--);
STATUS            934 dev/isa/seagate.c 			if ((tmp = STATUS) & STAT_REQ)
STATUS            975 dev/isa/seagate.c 			if (!(STATUS & STAT_REQ))
STATUS            977 dev/isa/seagate.c 		if (STATUS & STAT_REQ)
STATUS            985 dev/isa/seagate.c 	tmp = STATUS;
STATUS           1016 dev/isa/seagate.c 		if (STATUS & STAT_ARB_CMPL)
STATUS           1018 dev/isa/seagate.c 	if (!(STATUS & STAT_ARB_CMPL)) {
STATUS           1019 dev/isa/seagate.c 		if (STATUS & STAT_SEL) {
STATUS           1043 dev/isa/seagate.c 		if (STATUS & STAT_BSY)
STATUS           1045 dev/isa/seagate.c 	if (!(STATUS & STAT_BSY)) {
STATUS           1062 dev/isa/seagate.c 		if (STATUS & STAT_REQ)
STATUS           1066 dev/isa/seagate.c 	if (!(STATUS & STAT_REQ)) {
STATUS           1081 dev/isa/seagate.c 	if (!(STATUS & STAT_BSY))
STATUS           1215 dev/isa/seagate.c 		tmp = STATUS;
STATUS           1221 dev/isa/seagate.c 				if ((tmp = STATUS) & STAT_BSY)
STATUS           1263 dev/isa/seagate.c 						if ((tmp = STATUS) & STAT_REQ)
STATUS            597 dev/pci/if_em.c 	if (E1000_READ_REG(&sc->hw, STATUS) & E1000_STATUS_TXOFF) {
STATUS           1328 dev/pci/if_em.c 	if (E1000_READ_REG(&sc->hw, STATUS) & E1000_STATUS_LU) {
STATUS           2898 dev/pci/if_em.c 	    (E1000_READ_REG(&sc->hw, STATUS) & E1000_STATUS_LU)) {
STATUS            526 dev/pci/if_em_hw.c             status = E1000_READ_REG(hw, STATUS);
STATUS            890 dev/pci/if_em_hw.c             reg_data = E1000_READ_REG(hw, STATUS);
STATUS            892 dev/pci/if_em_hw.c             E1000_WRITE_REG(hw, STATUS, reg_data);
STATUS           1369 dev/pci/if_em_hw.c             status = E1000_READ_REG(hw, STATUS);
STATUS           2931 dev/pci/if_em_hw.c     status = E1000_READ_REG(hw, STATUS);
STATUS           3140 dev/pci/if_em_hw.c         hw->serdes_link_down = !(E1000_STATUS_LU & E1000_READ_REG(hw, STATUS));
STATUS           3164 dev/pci/if_em_hw.c         status = E1000_READ_REG(hw, STATUS);
STATUS           3495 dev/pci/if_em_hw.c         (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)) {
STATUS           3633 dev/pci/if_em_hw.c         (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)) {
STATUS           3753 dev/pci/if_em_hw.c         (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)) {
STATUS           3786 dev/pci/if_em_hw.c         (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)) {
STATUS           3828 dev/pci/if_em_hw.c             (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)) {
STATUS           5447 dev/pci/if_em_hw.c         if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
STATUS           6099 dev/pci/if_em_hw.c         status = E1000_READ_REG(hw, STATUS);
STATUS           7190 dev/pci/if_em_hw.c         if (!(E1000_READ_REG(hw, STATUS) & E1000_STATUS_GIO_MASTER_ENABLE))
STATUS           7277 dev/pci/if_em_hw.c         if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
STATUS           8185 dev/pci/if_em_hw.c         reg_data = E1000_READ_REG(hw, STATUS) & E1000_STATUS_LAN_INIT_DONE;
STATUS           8191 dev/pci/if_em_hw.c     reg_data = E1000_READ_REG(hw, STATUS);
STATUS           8193 dev/pci/if_em_hw.c     E1000_WRITE_REG(hw, STATUS, reg_data);
STATUS             84 dev/pci/if_em_osdep.h #define E1000_WRITE_FLUSH(hw)	E1000_READ_REG(hw, STATUS)
STATUS            444 dev/pci/if_ixgb.c 	if (IXGB_READ_REG(&sc->hw, STATUS) & IXGB_STATUS_TXOFF) {
STATUS             78 dev/pci/if_ixgb_osdep.h #define IXGB_WRITE_FLUSH(a)	IXGB_READ_REG(a, STATUS)
STATUS            915 dev/pci/ixgb_hw.c 	status_reg = IXGB_READ_REG(hw, STATUS);
STATUS           1086 dev/pci/ixgb_hw.c 	status_reg = IXGB_READ_REG(hw, STATUS);
STATUS           1178 dev/pci/ixgb_hw.c 				((IXGB_READ_REG(hw, STATUS) & IXGB_STATUS_LU) &&