auxreg            114 dev/ic/tcic2.c 	int val, auxreg;
auxreg            144 dev/ic/tcic2.c 	auxreg = bus_space_read_1(iot, ioh, TCIC_R_MODE)
auxreg            147 dev/ic/tcic2.c 	DPRINTF(("tcic: auxreg 0x%02x val 0x%04x\n", auxreg, val));
auxreg            148 dev/ic/tcic2.c 	switch (auxreg) {
auxreg            307 dev/ic/tcic2var.h tcic_read_aux_1(iot, ioh, auxreg, reg)
auxreg            310 dev/ic/tcic2var.h 	int auxreg, reg;
auxreg            314 dev/ic/tcic2var.h 	bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
auxreg            321 dev/ic/tcic2var.h tcic_read_aux_2(iot, ioh, auxreg)
auxreg            324 dev/ic/tcic2var.h 	int auxreg;
auxreg            328 dev/ic/tcic2var.h 	bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
auxreg            335 dev/ic/tcic2var.h tcic_write_aux_1(iot, ioh, auxreg, reg, val)
auxreg            338 dev/ic/tcic2var.h 	int auxreg, reg, val;
auxreg            342 dev/ic/tcic2var.h 	bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
auxreg            348 dev/ic/tcic2var.h tcic_write_aux_2(iot, ioh, auxreg, val)
auxreg            351 dev/ic/tcic2var.h 	int auxreg, val;
auxreg            355 dev/ic/tcic2var.h 	bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);