ah_capabilities 434 dev/ic/ar5210.c if (AR5K_EEPROM_HDR_RFKILL(hal->ah_capabilities.cap_eeprom.ee_header)) {
ah_capabilities 446 dev/ic/ar5210.c for (i = 0; i < hal->ah_capabilities.cap_queues.q_tx_num; i++) {
ah_capabilities 763 dev/ic/ar5210.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 780 dev/ic/ar5210.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 788 dev/ic/ar5210.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 820 dev/ic/ar5210.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 873 dev/ic/ar5210.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 898 dev/ic/ar5210.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 932 dev/ic/ar5210.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 972 dev/ic/ar5210.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 2275 dev/ic/ar5210.c hal->ah_capabilities.cap_queues.q_tx_num = AR5K_AR5210_TX_NUM_QUEUES;
ah_capabilities 2281 dev/ic/ar5210.c hal->ah_capabilities.cap_range.range_5ghz_min = 5120;
ah_capabilities 2282 dev/ic/ar5210.c hal->ah_capabilities.cap_range.range_5ghz_max = 5430;
ah_capabilities 2283 dev/ic/ar5210.c hal->ah_capabilities.cap_range.range_2ghz_min = 0;
ah_capabilities 2284 dev/ic/ar5210.c hal->ah_capabilities.cap_range.range_2ghz_max = 0;
ah_capabilities 2287 dev/ic/ar5210.c hal->ah_capabilities.cap_mode = HAL_MODE_11A | HAL_MODE_TURBO;
ah_capabilities 420 dev/ic/ar5211.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ah_capabilities 638 dev/ic/ar5211.c for (i = 0; i < hal->ah_capabilities.cap_queues.q_tx_num; i++) {
ah_capabilities 652 dev/ic/ar5211.c if (AR5K_EEPROM_HDR_RFKILL(hal->ah_capabilities.cap_eeprom.ee_header)) {
ah_capabilities 843 dev/ic/ar5211.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 863 dev/ic/ar5211.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 871 dev/ic/ar5211.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 888 dev/ic/ar5211.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 1059 dev/ic/ar5211.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 1070 dev/ic/ar5211.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 1087 dev/ic/ar5211.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 1094 dev/ic/ar5211.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 1111 dev/ic/ar5211.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 2378 dev/ic/ar5211.c ee_header = hal->ah_capabilities.cap_eeprom.ee_header;
ah_capabilities 2395 dev/ic/ar5211.c hal->ah_capabilities.cap_range.range_5ghz_min = 5005; /* 4920 */
ah_capabilities 2396 dev/ic/ar5211.c hal->ah_capabilities.cap_range.range_5ghz_max = 6100;
ah_capabilities 2399 dev/ic/ar5211.c hal->ah_capabilities.cap_mode = HAL_MODE_11A | HAL_MODE_TURBO;
ah_capabilities 2404 dev/ic/ar5211.c hal->ah_capabilities.cap_range.range_2ghz_min = 2412; /* 2312 */
ah_capabilities 2405 dev/ic/ar5211.c hal->ah_capabilities.cap_range.range_2ghz_max = 2732;
ah_capabilities 2408 dev/ic/ar5211.c hal->ah_capabilities.cap_mode |= HAL_MODE_11B;
ah_capabilities 2411 dev/ic/ar5211.c hal->ah_capabilities.cap_mode |= HAL_MODE_11G;
ah_capabilities 2419 dev/ic/ar5211.c hal->ah_capabilities.cap_queues.q_tx_num = AR5K_AR5211_TX_NUM_QUEUES;
ah_capabilities 2522 dev/ic/ar5211.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ah_capabilities 437 dev/ic/ar5212.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ah_capabilities 775 dev/ic/ar5212.c for (i = 0; i < hal->ah_capabilities.cap_queues.q_tx_num; i++) {
ah_capabilities 789 dev/ic/ar5212.c if (AR5K_EEPROM_HDR_RFKILL(hal->ah_capabilities.cap_eeprom.ee_header)) {
ah_capabilities 999 dev/ic/ar5212.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 1019 dev/ic/ar5212.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 1027 dev/ic/ar5212.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 1044 dev/ic/ar5212.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 1218 dev/ic/ar5212.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 1229 dev/ic/ar5212.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 1246 dev/ic/ar5212.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 1253 dev/ic/ar5212.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 1270 dev/ic/ar5212.c AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
ah_capabilities 2752 dev/ic/ar5212.c ee_header = hal->ah_capabilities.cap_eeprom.ee_header;
ah_capabilities 2769 dev/ic/ar5212.c hal->ah_capabilities.cap_range.range_5ghz_min = 5005; /* 4920 */
ah_capabilities 2770 dev/ic/ar5212.c hal->ah_capabilities.cap_range.range_5ghz_max = 6100;
ah_capabilities 2773 dev/ic/ar5212.c hal->ah_capabilities.cap_mode =
ah_capabilities 2779 dev/ic/ar5212.c hal->ah_capabilities.cap_range.range_2ghz_min = 2412; /* 2312 */
ah_capabilities 2780 dev/ic/ar5212.c hal->ah_capabilities.cap_range.range_2ghz_max = 2732;
ah_capabilities 2783 dev/ic/ar5212.c hal->ah_capabilities.cap_mode |= HAL_MODE_11B;
ah_capabilities 2786 dev/ic/ar5212.c hal->ah_capabilities.cap_mode |= HAL_MODE_11G;
ah_capabilities 2794 dev/ic/ar5212.c hal->ah_capabilities.cap_queues.q_tx_num = AR5K_AR5212_TX_NUM_QUEUES;
ah_capabilities 273 dev/ic/ar5xxx.c if (hal->ah_capabilities.cap_mode & HAL_MODE_11A)
ah_capabilities 275 dev/ic/ar5xxx.c if (hal->ah_capabilities.cap_mode & HAL_MODE_11B)
ah_capabilities 277 dev/ic/ar5xxx.c if (hal->ah_capabilities.cap_mode & HAL_MODE_11G)
ah_capabilities 279 dev/ic/ar5xxx.c if (hal->ah_capabilities.cap_mode & HAL_MODE_TURBO)
ah_capabilities 281 dev/ic/ar5xxx.c if (hal->ah_capabilities.cap_mode & HAL_MODE_XR)
ah_capabilities 377 dev/ic/ar5xxx.c if ((freq >= hal->ah_capabilities.cap_range.range_2ghz_min) &&
ah_capabilities 378 dev/ic/ar5xxx.c (freq <= hal->ah_capabilities.cap_range.range_2ghz_max))
ah_capabilities 381 dev/ic/ar5xxx.c if ((freq >= hal->ah_capabilities.cap_range.range_5ghz_min) &&
ah_capabilities 382 dev/ic/ar5xxx.c (freq <= hal->ah_capabilities.cap_range.range_5ghz_max))
ah_capabilities 451 dev/ic/ar5xxx.c for (i = 0; (hal->ah_capabilities.cap_range.range_5ghz_max > 0) &&
ah_capabilities 481 dev/ic/ar5xxx.c for (i = 0; (hal->ah_capabilities.cap_range.range_2ghz_max > 0) &&
ah_capabilities 496 dev/ic/ar5xxx.c if ((hal->ah_capabilities.cap_mode & HAL_MODE_11B) &&
ah_capabilities 500 dev/ic/ar5xxx.c if ((hal->ah_capabilities.cap_mode & HAL_MODE_11G) &&
ah_capabilities 609 dev/ic/ar5xxx.c hal->ah_capabilities.cap_regdomain.reg_hw = ieee_regdomain;
ah_capabilities 621 dev/ic/ar5xxx.c hal->ah_capabilities.cap_regdomain.reg_current = regdomain;
ah_capabilities 721 dev/ic/ar5xxx.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ah_capabilities 777 dev/ic/ar5xxx.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ah_capabilities 858 dev/ic/ar5xxx.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ah_capabilities 1089 dev/ic/ar5xxx.c ee_regdomain = hal->ah_capabilities.cap_eeprom.ee_regdomain;
ah_capabilities 1097 dev/ic/ar5xxx.c if (hal->ah_capabilities.cap_eeprom.ee_protect &
ah_capabilities 1104 dev/ic/ar5xxx.c hal->ah_capabilities.cap_eeprom.ee_regdomain = ee_regdomain;
ah_capabilities 1122 dev/ic/ar5xxx.c if ((channel->channel < hal->ah_capabilities.cap_range.range_2ghz_min ||
ah_capabilities 1123 dev/ic/ar5xxx.c channel->channel > hal->ah_capabilities.cap_range.range_2ghz_max) &&
ah_capabilities 1124 dev/ic/ar5xxx.c (channel->channel < hal->ah_capabilities.cap_range.range_5ghz_min ||
ah_capabilities 1125 dev/ic/ar5xxx.c channel->channel > hal->ah_capabilities.cap_range.range_5ghz_max)) {
ah_capabilities 1518 dev/ic/ar5xxx.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ah_capabilities 1613 dev/ic/ar5xxx.c struct ar5k_eeprom_info *ee = &hal->ah_capabilities.cap_eeprom;
ah_capabilities 1133 dev/ic/ar5xxx.h #define ah_regdomain ah_capabilities.cap_regdomain.reg_current
ah_capabilities 1134 dev/ic/ar5xxx.h #define ah_regdomain_hw ah_capabilities.cap_regdomain.reg_hw
ah_capabilities 1135 dev/ic/ar5xxx.h #define ah_modes ah_capabilities.cap_mode
ah_capabilities 1136 dev/ic/ar5xxx.h #define ah_ee_version ah_capabilities.cap_eeprom.ee_version
ah_capabilities 1154 dev/ic/ar5xxx.h ar5k_capabilities_t ah_capabilities;
ah_capabilities 1396 dev/ic/ar5xxx.h AR5K_EEPROM_READ(_o, hal->ah_capabilities.cap_eeprom._v); \