_q 467 dev/ic/athvar.h #define ath_hal_put_tx_buf(_ah, _q, _bufaddr) \ _q 468 dev/ic/athvar.h ((*(_ah)->ah_put_tx_buf)((_ah), (_q), (_bufaddr))) _q 469 dev/ic/athvar.h #define ath_hal_get_tx_buf(_ah, _q) \ _q 470 dev/ic/athvar.h ((*(_ah)->ah_get_tx_buf)((_ah), (_q))) _q 473 dev/ic/athvar.h #define ath_hal_tx_start(_ah, _q) \ _q 474 dev/ic/athvar.h ((*(_ah)->ah_tx_start)((_ah), (_q))) _q 523 dev/ic/athvar.h #define ath_hal_reset_tx_queue(_ah, _q) \ _q 524 dev/ic/athvar.h ((*(_ah)->ah_reset_tx_queue)((_ah), (_q))) _q 525 dev/ic/athvar.h #define ath_hal_release_tx_queue(_ah, _q) \ _q 526 dev/ic/athvar.h ((*(_ah)->ah_release_tx_queue)((_ah), (_q))) _q 78 dev/pci/if_tht.c #define _Q(_q) ((_q) * 4) _q 90 dev/pci/if_tht.c #define THT_REG_TXT_CFG0(_q) (0x4040 + _Q(_q)) /* CFG0 TX Task queues */ _q 91 dev/pci/if_tht.c #define THT_REG_RXF_CFG0(_q) (0x4050 + _Q(_q)) /* CFG0 RX Free queues */ _q 92 dev/pci/if_tht.c #define THT_REG_RXD_CFG0(_q) (0x4060 + _Q(_q)) /* CFG0 RX DSC queues */ _q 93 dev/pci/if_tht.c #define THT_REG_TXF_CFG0(_q) (0x4070 + _Q(_q)) /* CFG0 TX Free queues */ _q 94 dev/pci/if_tht.c #define THT_REG_TXT_CFG1(_q) (0x4000 + _Q(_q)) /* CFG1 TX Task queues */ _q 95 dev/pci/if_tht.c #define THT_REG_RXF_CFG1(_q) (0x4010 + _Q(_q)) /* CFG1 RX Free queues */ _q 96 dev/pci/if_tht.c #define THT_REG_RXD_CFG1(_q) (0x4020 + _Q(_q)) /* CFG1 RX DSC queues */ _q 97 dev/pci/if_tht.c #define THT_REG_TXF_CFG1(_q) (0x4030 + _Q(_q)) /* CFG1 TX Free queues */ _q 98 dev/pci/if_tht.c #define THT_REG_TXT_RPTR(_q) (0x40c0 + _Q(_q)) /* TX Task read ptr */ _q 99 dev/pci/if_tht.c #define THT_REG_RXF_RPTR(_q) (0x40d0 + _Q(_q)) /* RX Free read ptr */ _q 100 dev/pci/if_tht.c #define THT_REG_RXD_RPTR(_q) (0x40e0 + _Q(_q)) /* RX DSC read ptr */ _q 101 dev/pci/if_tht.c #define THT_REG_TXF_RPTR(_q) (0x40f0 + _Q(_q)) /* TX Free read ptr */ _q 102 dev/pci/if_tht.c #define THT_REG_TXT_WPTR(_q) (0x4080 + _Q(_q)) /* TX Task write ptr */ _q 103 dev/pci/if_tht.c #define THT_REG_RXF_WPTR(_q) (0x4090 + _Q(_q)) /* RX Free write ptr */ _q 104 dev/pci/if_tht.c #define THT_REG_RXD_WPTR(_q) (0x40a0 + _Q(_q)) /* RX DSC write ptr */ _q 105 dev/pci/if_tht.c #define THT_REG_TXF_WPTR(_q) (0x40b0 + _Q(_q)) /* TX Free write ptr */ _q 109 dev/pci/if_tht.c #define THT_REG_RDINTCM(_q) (0x5120 + _Q(_q)) /* RX DSC Intr Coalescing */ _q 114 dev/pci/if_tht.c #define THT_REG_TDINTCM(_q) (0x5130 + _Q(_q)) /* TX DSC Intr Coalescing */ _q 164 dev/pci/if_tht.c #define THT_REG_ISR_RXF(_q) (1<<(19+(_q))) /* rx free fifo */ _q 165 dev/pci/if_tht.c #define THT_REG_ISR_TXF(_q) (1<<(15+(_q))) /* tx free fifo */ _q 166 dev/pci/if_tht.c #define THT_REG_ISR_RXD(_q) (1<<(11+(_q))) /* rx desc fifo */ _q 189 dev/pci/if_tht.c #define THT_REG_IMR_RXF(_q) (1<<(19+(_q))) /* rx free fifo */ _q 190 dev/pci/if_tht.c #define THT_REG_IMR_TXF(_q) (1<<(15+(_q))) /* tx free fifo */ _q 191 dev/pci/if_tht.c #define THT_REG_IMR_RXD(_q) (1<<(11+(_q))) /* rx desc fifo */ _q 212 dev/pci/if_tht.c #define THT_REG_TXTSK_PR(_q) (0x41b0 + _Q(_q)) /* TX Queue Priority */ _q 202 dev/raidframe/rf_diskqueue.h #define RF_QUEUE_LOCKED(_q) ((_q)->flags & RF_DQ_LOCKED) _q 203 dev/raidframe/rf_diskqueue.h #define RF_QUEUE_EMPTY(_q) (((_q)->numOutstanding == 0) && \ _q 204 dev/raidframe/rf_diskqueue.h ((_q)->nextLockingOp == NULL) && \ _q 205 dev/raidframe/rf_diskqueue.h !RF_QUEUE_LOCKED(_q)) _q 206 dev/raidframe/rf_diskqueue.h #define RF_QUEUE_FULL(_q) ((_q)->numOutstanding == \ _q 207 dev/raidframe/rf_diskqueue.h (_q)->maxOutstanding) _q 209 dev/raidframe/rf_diskqueue.h #define RF_LOCK_QUEUE(_q) (_q)->flags |= RF_DQ_LOCKED _q 210 dev/raidframe/rf_diskqueue.h #define RF_UNLOCK_QUEUE(_q) (_q)->flags &= ~RF_DQ_LOCKED