scsirate 1119 dev/ic/aic7xxx.c u_int scsirate;
scsirate 1160 dev/ic/aic7xxx.c scsirate = ahc_inb(ahc, SCSIRATE);
scsirate 1166 dev/ic/aic7xxx.c scsirate);
scsirate 1178 dev/ic/aic7xxx.c (scsirate & SINGLE_EDGE)
scsirate 1831 dev/ic/aic7xxx.c ahc_find_period(struct ahc_softc *ahc, u_int scsirate, u_int maxsync)
scsirate 1836 dev/ic/aic7xxx.c scsirate &= SXFR_ULTRA2;
scsirate 1838 dev/ic/aic7xxx.c scsirate &= SXFR;
scsirate 1846 dev/ic/aic7xxx.c else if (scsirate == (syncrate->sxfr_u2 & SXFR_ULTRA2))
scsirate 1848 dev/ic/aic7xxx.c } else if (scsirate == (syncrate->sxfr & SXFR)) {
scsirate 2009 dev/ic/aic7xxx.c u_int scsirate;
scsirate 2012 dev/ic/aic7xxx.c scsirate = tinfo->scsirate;
scsirate 2015 dev/ic/aic7xxx.c scsirate &= ~(SXFR_ULTRA2|SINGLE_EDGE|ENABLE_CRC);
scsirate 2017 dev/ic/aic7xxx.c scsirate |= syncrate->sxfr_u2;
scsirate 2019 dev/ic/aic7xxx.c scsirate |= ENABLE_CRC;
scsirate 2021 dev/ic/aic7xxx.c scsirate |= SINGLE_EDGE;
scsirate 2025 dev/ic/aic7xxx.c scsirate &= ~(SXFR|SOFS);
scsirate 2036 dev/ic/aic7xxx.c scsirate |= syncrate->sxfr & SXFR;
scsirate 2037 dev/ic/aic7xxx.c scsirate |= offset & SOFS;
scsirate 2050 dev/ic/aic7xxx.c ahc_outb(ahc, SCSIRATE, scsirate);
scsirate 2055 dev/ic/aic7xxx.c tinfo->scsirate = scsirate;
scsirate 2115 dev/ic/aic7xxx.c u_int scsirate;
scsirate 2118 dev/ic/aic7xxx.c scsirate = tinfo->scsirate;
scsirate 2119 dev/ic/aic7xxx.c scsirate &= ~WIDEXFER;
scsirate 2121 dev/ic/aic7xxx.c scsirate |= WIDEXFER;
scsirate 2123 dev/ic/aic7xxx.c tinfo->scsirate = scsirate;
scsirate 2126 dev/ic/aic7xxx.c ahc_outb(ahc, SCSIRATE, scsirate);
scsirate 2190 dev/ic/aic7xxx.c pending_hscb->scsirate = tinfo->scsirate;
scsirate 2230 dev/ic/aic7xxx.c ahc_outb(ahc, SCB_SCSIRATE, pending_hscb->scsirate);
scsirate 3079 dev/ic/aic7xxx.c targ_scsirate = tinfo->scsirate;
scsirate 4909 dev/ic/aic7xxx.c u_int scsirate;
scsirate 4913 dev/ic/aic7xxx.c scsirate = ahc_inb(ahc, TARG_SCSIRATE + i);
scsirate 4919 dev/ic/aic7xxx.c if ((scsirate & SOFS) == 0x0F) {
scsirate 4924 dev/ic/aic7xxx.c scsirate = (scsirate & SXFR) >> 4
scsirate 4927 dev/ic/aic7xxx.c | (scsirate & WIDEXFER);
scsirate 4931 dev/ic/aic7xxx.c if ((scsirate & ~WIDEXFER) == 0 && offset != 0)
scsirate 4933 dev/ic/aic7xxx.c scsirate |= 0x1c;
scsirate 4938 dev/ic/aic7xxx.c ahc_find_period(ahc, scsirate, maxsync);
scsirate 4943 dev/ic/aic7xxx.c if ((scsirate & SXFR_ULTRA2) <= 8/*10MHz*/
scsirate 4947 dev/ic/aic7xxx.c } else if ((scsirate & SOFS) != 0) {
scsirate 4948 dev/ic/aic7xxx.c if ((scsirate & SXFR) == 0x40
scsirate 4951 dev/ic/aic7xxx.c scsirate &= ~SXFR;
scsirate 4955 dev/ic/aic7xxx.c ahc_find_period(ahc, scsirate,
scsirate 4964 dev/ic/aic7xxx.c if ((scsirate & WIDEXFER) != 0
scsirate 452 dev/ic/aic7xxx_openbsd.c scb->hscb->scsirate = tinfo->scsirate;
scsirate 271 dev/ic/aic7xxx_seeprom.c u_int scsirate;
scsirate 303 dev/ic/aic7xxx_seeprom.c scsirate = (sc->device_flags[i] & CFXFER)
scsirate 306 dev/ic/aic7xxx_seeprom.c scsirate |= WIDEXFER;
scsirate 308 dev/ic/aic7xxx_seeprom.c scsirate = (sc->device_flags[i] & CFXFER) << 4;
scsirate 310 dev/ic/aic7xxx_seeprom.c scsirate |= SOFS;
scsirate 312 dev/ic/aic7xxx_seeprom.c scsirate |= WIDEXFER;
scsirate 314 dev/ic/aic7xxx_seeprom.c ahc_outb(ahc, TARG_SCSIRATE + i, scsirate);
scsirate 489 dev/ic/aic7xxxvar.h /*29*/ uint8_t scsirate; /* Value for SCSIRATE register */
scsirate 739 dev/ic/aic7xxxvar.h uint8_t scsirate; /* Computed value for SCSIRATE reg */
scsirate 1282 dev/ic/aic7xxxvar.h u_int scsirate, u_int maxsync);