sc_regs 203 dev/cardbus/if_rtw_cardbus.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 292 dev/cardbus/if_rtw_cardbus.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 353 dev/cardbus/if_rtw_cardbus.c rtw_cardbus_funcregen(&sc->sc_regs, 1);
sc_regs 355 dev/cardbus/if_rtw_cardbus.c RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR);
sc_regs 356 dev/cardbus/if_rtw_cardbus.c RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR);
sc_regs 369 dev/cardbus/if_rtw_cardbus.c RTW_WRITE(&sc->sc_regs, RTW_FEMR,
sc_regs 370 dev/cardbus/if_rtw_cardbus.c RTW_READ(&sc->sc_regs, RTW_FEMR) & ~RTW_FEMR_INTR);
sc_regs 372 dev/cardbus/if_rtw_cardbus.c rtw_cardbus_funcregen(&sc->sc_regs, 0);
sc_regs 284 dev/ic/lsi64854.c bus_space_write_4(sc->sc_bustag, sc->sc_regs, L64854_REG_ADDR, 0);
sc_regs 333 dev/ic/lsi64854.c bus_space_write_4(sc->sc_bustag, sc->sc_regs, L64854_REG_CNT, *dmasize);
sc_regs 349 dev/ic/lsi64854.c bus_space_write_4(sc->sc_bustag, sc->sc_regs, L64854_REG_ADDR,
sc_regs 359 dev/ic/lsi64854.c bus_space_write_4(sc->sc_bustag, sc->sc_regs, L64854_REG_CNT,
sc_regs 401 dev/ic/lsi64854.c bus_space_read_4(sc->sc_bustag, sc->sc_regs, L64854_REG_ADDR),
sc_regs 596 dev/ic/lsi64854.c bus_space_write_4(sc->sc_bustag, sc->sc_regs, L64854_REG_ADDR,
sc_regs 599 dev/ic/lsi64854.c bus_space_write_4(sc->sc_bustag, sc->sc_regs, L64854_REG_CNT,
sc_regs 639 dev/ic/lsi64854.c bus_space_read_4(sc->sc_bustag, sc->sc_regs, L64854_REG_ADDR),
sc_regs 643 dev/ic/lsi64854.c resid = bus_space_read_4(sc->sc_bustag, sc->sc_regs,
sc_regs 658 dev/ic/lsi64854.c resid = bus_space_read_4(sc->sc_bustag, sc->sc_regs,
sc_regs 45 dev/ic/lsi64854var.h bus_space_handle_t sc_regs; /* the registers */
sc_regs 74 dev/ic/lsi64854var.h (bus_space_read_4((sc)->sc_bustag, (sc)->sc_regs, L64854_REG_CSR))
sc_regs 77 dev/ic/lsi64854var.h bus_space_write_4((sc)->sc_bustag, (sc)->sc_regs, L64854_REG_CSR, csr)
sc_regs 277 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 412 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 498 dev/ic/rtw.c if ((rc = rtw_chip_reset(&sc->sc_regs, sc->sc_dev.dv_xname)) != 0)
sc_regs 501 dev/ic/rtw.c if ((rc = rtw_recall_eeprom(&sc->sc_regs, sc->sc_dev.dv_xname)) != 0)
sc_regs 504 dev/ic/rtw.c config1 = RTW_READ8(&sc->sc_regs, RTW_CONFIG1);
sc_regs 505 dev/ic/rtw.c RTW_WRITE8(&sc->sc_regs, RTW_CONFIG1, config1 & ~RTW_CONFIG1_PMEN);
sc_regs 1521 dev/ic/rtw.c tsfth = RTW_READ(&sc->sc_regs, RTW_TSFTRH);
sc_regs 1522 dev/ic/rtw.c tsftl = RTW_READ(&sc->sc_regs, RTW_TSFTRL);
sc_regs 1525 dev/ic/rtw.c next = rtw_txring_next(&sc->sc_regs, tdb);
sc_regs 1531 dev/ic/rtw.c if ((RTW_READ8(&sc->sc_regs, RTW_TPPOLL) & RTW_TPPOLL_BQ) == 0){
sc_regs 1606 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 1692 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 1713 dev/ic/rtw.c rdsar = letoh32(RTW_READ(&sc->sc_regs, RTW_RDSAR));
sc_regs 1741 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 1808 dev/ic/rtw.c tsftrl0 = RTW_READ(&sc->sc_regs, RTW_TSFTRL);
sc_regs 1810 dev/ic/rtw.c tsftrl1 = RTW_READ(&sc->sc_regs, RTW_TSFTRL);
sc_regs 1812 dev/ic/rtw.c RTW_WRITE(&sc->sc_regs, RTW_TINT, next_tick);
sc_regs 1835 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 1921 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 1943 dev/ic/rtw.c rtw_io_enable(&sc->sc_regs, RTW_CR_RE|RTW_CR_TE, 0);
sc_regs 2114 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 2181 dev/ic/rtw.c rtw_io_enable(&sc->sc_regs, RTW_CR_RE | RTW_CR_TE, 0);
sc_regs 2201 dev/ic/rtw.c rtw_io_enable(&sc->sc_regs, RTW_CR_RE | RTW_CR_TE, 1);
sc_regs 2246 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 2272 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 2293 dev/ic/rtw.c rtw_set_access(&sc->sc_regs, RTW_ACCESS_CONFIG);
sc_regs 2295 dev/ic/rtw.c msr = RTW_READ8(&sc->sc_regs, RTW_MSR) & ~RTW_MSR_NETYPE_MASK;
sc_regs 2313 dev/ic/rtw.c RTW_WRITE8(&sc->sc_regs, RTW_MSR, msr);
sc_regs 2315 dev/ic/rtw.c rtw_set_access(&sc->sc_regs, RTW_ACCESS_NONE);
sc_regs 2321 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 2413 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 2530 dev/ic/rtw.c rtw_led_init(&sc->sc_regs);
sc_regs 2551 dev/ic/rtw.c rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
sc_regs 2624 dev/ic/rtw.c rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
sc_regs 2639 dev/ic/rtw.c rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
sc_regs 3326 dev/ic/rtw.c tppoll = RTW_READ8(&sc->sc_regs, RTW_TPPOLL);
sc_regs 3329 dev/ic/rtw.c RTW_WRITE8(&sc->sc_regs, RTW_TPPOLL, tppoll);
sc_regs 3330 dev/ic/rtw.c RTW_SYNC(&sc->sc_regs, RTW_TPPOLL, RTW_TPPOLL);
sc_regs 3397 dev/ic/rtw.c rtw_idle(&sc->sc_regs);
sc_regs 3398 dev/ic/rtw.c rtw_io_enable(&sc->sc_regs, RTW_CR_TE, 0);
sc_regs 3400 dev/ic/rtw.c rtw_io_enable(&sc->sc_regs, RTW_CR_TE, 1);
sc_regs 3427 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 3542 dev/ic/rtw.c rtw_tsf_extend(&sc->sc_regs, rstamp)) == ENETRESET) {
sc_regs 3546 dev/ic/rtw.c tppoll = RTW_READ8(&sc->sc_regs, RTW_TPPOLL);
sc_regs 3548 dev/ic/rtw.c RTW_WRITE8(&sc->sc_regs, RTW_TPPOLL, tppoll);
sc_regs 3943 dev/ic/rtw.c if (sc->sc_regs.r_read8 == NULL) {
sc_regs 3944 dev/ic/rtw.c sc->sc_regs.r_read8 = rtw_read8;
sc_regs 3945 dev/ic/rtw.c sc->sc_regs.r_read16 = rtw_read16;
sc_regs 3946 dev/ic/rtw.c sc->sc_regs.r_read32 = rtw_read32;
sc_regs 3947 dev/ic/rtw.c sc->sc_regs.r_write8 = rtw_write8;
sc_regs 3948 dev/ic/rtw.c sc->sc_regs.r_write16 = rtw_write16;
sc_regs 3949 dev/ic/rtw.c sc->sc_regs.r_write32 = rtw_write32;
sc_regs 3950 dev/ic/rtw.c sc->sc_regs.r_barrier = rtw_barrier;
sc_regs 3953 dev/ic/rtw.c sc->sc_hwverid = RTW_READ(&sc->sc_regs, RTW_TCR) & RTW_TCR_HWVERID_MASK;
sc_regs 4050 dev/ic/rtw.c sc->sc_rcr = RTW_READ(&sc->sc_regs, RTW_RCR);
sc_regs 4055 dev/ic/rtw.c if (rtw_srom_read(&sc->sc_regs, sc->sc_flags, &sc->sc_srom,
sc_regs 4077 dev/ic/rtw.c sc->sc_phydelay = rtw_check_phydelay(&sc->sc_regs, sc->sc_rcr);
sc_regs 4083 dev/ic/rtw.c rtw_identify_country(&sc->sc_regs, &sc->sc_locale);
sc_regs 4088 dev/ic/rtw.c if (rtw_identify_sta(&sc->sc_regs, &sc->sc_ic.ic_myaddr,
sc_regs 4749 dev/ic/rtw.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 5066 dev/ic/rtw.c (*rf_bangbits)(&sc->sc_regs, bits, lo_to_hi, nbits);
sc_regs 5128 dev/ic/rtw.c return rtw_rf_macbangbits(&sc->sc_regs, reg);
sc_regs 362 dev/ic/rtwvar.h struct rtw_regs sc_regs;
sc_regs 156 dev/pci/if_rtw_pci.c struct rtw_regs *regs = &sc->sc_regs;
sc_regs 262 dev/sbus/be.c sc->sc_qr = qec->sc_regs;
sc_regs 144 dev/sbus/bpp.c BUS_SPACE_MAP_PROMADDRESS, 0, &sc->sc_regs) != 0) {
sc_regs 149 dev/sbus/bpp.c sa->sa_size, 0, 0, &sc->sc_regs) != 0) {
sc_regs 196 dev/sbus/bpp.c bus_space_handle_t h = sc->sc_regs;
sc_regs 219 dev/sbus/bpp.c bus_space_handle_t h = sc->sc_lsi64854.sc_regs;
sc_regs 259 dev/sbus/bpp.c bus_space_write_2(lsi->sc_bustag, lsi->sc_regs, L64854_REG_ICR, irq);
sc_regs 273 dev/sbus/bpp.c bus_space_write_2(lsi->sc_bustag, lsi->sc_regs, L64854_REG_ICR, irq);
sc_regs 333 dev/sbus/bpp.c tcr = bus_space_read_1(lsi->sc_bustag, lsi->sc_regs,
sc_regs 336 dev/sbus/bpp.c bus_space_write_1(lsi->sc_bustag, lsi->sc_regs,
sc_regs 396 dev/sbus/bpp.c irq = bus_space_read_2(lsi->sc_bustag, lsi->sc_regs, L64854_REG_ICR);
sc_regs 398 dev/sbus/bpp.c bus_space_write_2(lsi->sc_bustag, lsi->sc_regs, L64854_REG_ICR,
sc_regs 116 dev/sbus/cs4231.c bus_space_write_1((sc)->sc_bustag, (sc)->sc_regs, (r) << 2, (v))
sc_regs 118 dev/sbus/cs4231.c bus_space_read_1((sc)->sc_bustag, (sc)->sc_regs, (r) << 2)
sc_regs 121 dev/sbus/cs4231.c bus_space_write_4(sc->sc_bustag, sc->sc_regs, r, v)
sc_regs 123 dev/sbus/cs4231.c bus_space_read_4(sc->sc_bustag, sc->sc_regs, r)
sc_regs 244 dev/sbus/cs4231.c BUS_SPACE_MAP_LINEAR, 0, &sc->sc_regs) != 0) {
sc_regs 70 dev/sbus/cs4231var.h bus_space_handle_t sc_regs; /* CS4231/APC register handle */
sc_regs 182 dev/sbus/dma_sbus.c sc->sc_regs = bh;
sc_regs 224 dev/sbus/esp_sbus.c 0, 0, &lsc->sc_regs) != 0) {
sc_regs 238 dev/sbus/if_le_ledma.c bus_space_write_4(dma->sc_bustag, dma->sc_regs, L64854_REG_ENBAR,
sc_regs 230 dev/sbus/qe.c sc->sc_qr = qec->sc_regs;
sc_regs 141 dev/sbus/qec.c 0, 0, &sc->sc_regs) != 0) {
sc_regs 324 dev/sbus/qec.c bus_space_handle_t qr = sc->sc_regs;
sc_regs 48 dev/sbus/qecvar.h bus_space_handle_t sc_regs; /* QEC registers */
sc_regs 82 dev/sbus/spifvar.h struct spifregs *sc_regs; /* registers */
sc_regs 130 dev/sbus/tvtwo.c volatile u_int8_t *sc_regs;
sc_regs 233 dev/sbus/tvtwo.c sc->sc_regs = bus_space_vaddr(bt, bh);
sc_regs 432 dev/sbus/tvtwo.c *(volatile u_int32_t *)(sc->sc_regs + PX_REG_DISPKLUDGE) =
sc_regs 454 dev/sbus/tvtwo.c volatile u_int32_t *dac = (u_int32_t *)(sc->sc_regs + PX_REG_BT463_RED);
sc_regs 463 dev/sbus/tvtwo.c volatile u_int32_t *dac = (u_int32_t *)(sc->sc_regs + PX_REG_BT463_RED);
sc_regs 478 dev/sbus/tvtwo.c volatile u_int32_t *dac = (u_int32_t *)(sc->sc_regs + PX_REG_BT463_RED);
sc_regs 179 dev/sbus/vigra.c volatile struct csregs *sc_regs;/* control registers */
sc_regs 284 dev/sbus/vigra.c sc->sc_regs = bus_space_vaddr(bt, bh);
sc_regs 580 dev/sbus/vigra.c sc->sc_regs->imr = 1;
sc_regs 589 dev/sbus/vigra.c sc->sc_regs->bcr = 0;
sc_regs 591 dev/sbus/vigra.c sc->sc_regs->bcr = 1;
sc_regs 600 dev/sbus/vigra.c if (sc->sc_regs->imr == 0 ||
sc_regs 601 dev/sbus/vigra.c !ISSET(sc->sc_regs->g3sr, STATUS_INTR)) {
sc_regs 607 dev/sbus/vigra.c sc->sc_regs->imr = 0;
sc_regs 58 dev/usb/uow.c u_int8_t sc_regs[DS2490_NREGS];
sc_regs 196 dev/usb/uow.c sc->sc_regs, sizeof(sc->sc_regs), uow_intr,
sc_regs 434 dev/usb/uow.c if (tsleep(sc->sc_regs, PRIBIO, "uowcmd",
sc_regs 441 dev/usb/uow.c if ((sc->sc_regs[DS2490_ST_STFL] & DS2490_ST_STFL_IDLE) == 0)
sc_regs 460 dev/usb/uow.c wakeup(sc->sc_regs);