rx_desc 1287 dev/ic/ar5210.c struct ar5k_ar5210_rx_desc *rx_desc; rx_desc 1289 dev/ic/ar5210.c rx_desc = (struct ar5k_ar5210_rx_desc*)&desc->ds_ctl0; rx_desc 1291 dev/ic/ar5210.c if ((rx_desc->rx_control_1 = (size & rx_desc 1296 dev/ic/ar5210.c rx_desc->rx_control_1 |= AR5K_AR5210_DESC_RX_CTL1_INTREQ; rx_desc 1387 dev/ic/ar5211.c struct ar5k_ar5211_rx_desc *rx_desc; rx_desc 1389 dev/ic/ar5211.c rx_desc = (struct ar5k_ar5211_rx_desc*)&desc->ds_ctl0; rx_desc 1391 dev/ic/ar5211.c if ((rx_desc->rx_control_1 = (size & rx_desc 1396 dev/ic/ar5211.c rx_desc->rx_control_1 |= AR5K_AR5211_DESC_RX_CTL1_INTREQ; rx_desc 1646 dev/ic/ar5212.c struct ar5k_ar5212_rx_desc *rx_desc; rx_desc 1648 dev/ic/ar5212.c rx_desc = (struct ar5k_ar5212_rx_desc*)&desc->ds_ctl0; rx_desc 1650 dev/ic/ar5212.c if ((rx_desc->rx_control_1 = (size & rx_desc 1655 dev/ic/ar5212.c rx_desc->rx_control_1 |= AR5K_AR5212_DESC_RX_CTL1_INTREQ; rx_desc 2712 dev/pci/if_em.c em_receive_checksum(struct em_softc *sc, struct em_rx_desc *rx_desc, rx_desc 2718 dev/pci/if_em.c (rx_desc->status & E1000_RXD_STAT_IXSM)) { rx_desc 2723 dev/pci/if_em.c if (rx_desc->status & E1000_RXD_STAT_IPCS) { rx_desc 2725 dev/pci/if_em.c if (!(rx_desc->errors & E1000_RXD_ERR_IPE)) { rx_desc 2733 dev/pci/if_em.c if (rx_desc->status & E1000_RXD_STAT_TCPCS) { rx_desc 2735 dev/pci/if_em.c if (!(rx_desc->errors & E1000_RXD_ERR_TCPE)) rx_desc 96 dev/pci/if_ixgb.c struct ixgb_rx_desc * rx_desc, rx_desc 1901 dev/pci/if_ixgb.c struct ixgb_rx_desc *rx_desc, rx_desc 1904 dev/pci/if_ixgb.c if (rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) { rx_desc 1909 dev/pci/if_ixgb.c if (rx_desc->status & IXGB_RX_DESC_STATUS_IPCS) { rx_desc 1911 dev/pci/if_ixgb.c if (!(rx_desc->errors & IXGB_RX_DESC_ERRORS_IPE)) { rx_desc 1919 dev/pci/if_ixgb.c if (rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS) { rx_desc 1921 dev/pci/if_ixgb.c if (!(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE)) {