rcb 677 dev/ic/mpi.c struct mpi_rcb *rcb = NULL; rcb 694 dev/ic/mpi.c rcb = &sc->sc_rcbs[i]; rcb 695 dev/ic/mpi.c reply = rcb->rcb_reply; rcb 723 dev/ic/mpi.c ccb->ccb_rcb = rcb; rcb 911 dev/ic/mpi.c struct mpi_rcb *rcb; rcb 919 dev/ic/mpi.c rcb = &sc->sc_rcbs[i]; rcb 921 dev/ic/mpi.c rcb->rcb_reply = kva + MPI_REPLY_SIZE * i; rcb 922 dev/ic/mpi.c rcb->rcb_reply_dva = (u_int32_t)MPI_DMA_DVA(sc->sc_replies) + rcb 924 dev/ic/mpi.c mpi_push_reply(sc, rcb->rcb_reply_dva); rcb 1940 dev/ic/mpi.c struct mpi_rcb *rcb = arg; rcb 1941 dev/ic/mpi.c struct mpi_msg_event_reply *enp = rcb->rcb_reply; rcb 1946 dev/ic/mpi.c data = rcb->rcb_reply; rcb 1974 dev/ic/mpi.c mpi_push_reply(sc, rcb->rcb_reply_dva); rcb 942 dev/pci/if_bge.c volatile struct bge_rcb *rcb; rcb 955 dev/pci/if_bge.c rcb = &sc->bge_rdata->bge_info.bge_jumbo_rx_rcb; rcb 956 dev/pci/if_bge.c rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(0, 0); rcb 957 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags); rcb 1239 dev/pci/if_bge.c volatile struct bge_rcb *rcb; rcb 1320 dev/pci/if_bge.c rcb = &sc->bge_rdata->bge_info.bge_std_rx_rcb; rcb 1321 dev/pci/if_bge.c BGE_HOSTADDR(rcb->bge_hostaddr, BGE_RING_DMA_ADDR(sc, bge_rx_std_ring)); rcb 1323 dev/pci/if_bge.c rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(512, 0); rcb 1325 dev/pci/if_bge.c rcb->bge_maxlen_flags = rcb 1327 dev/pci/if_bge.c rcb->bge_nicaddr = BGE_STD_RX_RINGS; rcb 1328 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_HI, rcb->bge_hostaddr.bge_addr_hi); rcb 1329 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_LO, rcb->bge_hostaddr.bge_addr_lo); rcb 1330 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_STD_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags); rcb 1331 dev/pci/if_bge.c CSR_WRITE_4(sc, BGE_RX_STD_RCB_NICADDR, rcb->bge_nicaddr); rcb 1341 dev/pci/if_bge.c rcb = &sc->bge_rdata->bge_info.bge_jumbo_rx_rcb; rcb 1342 dev/pci/if_bge.c BGE_HOSTADDR(rcb->bge_hostaddr, rcb 1344 dev/pci/if_bge.c rcb->bge_maxlen_flags = rcb 1347 dev/pci/if_bge.c rcb->bge_nicaddr = BGE_JUMBO_RX_RINGS; rcb 1350 dev/pci/if_bge.c rcb->bge_hostaddr.bge_addr_hi); rcb 1352 dev/pci/if_bge.c rcb->bge_hostaddr.bge_addr_lo); rcb 1354 dev/pci/if_bge.c rcb->bge_maxlen_flags); rcb 1356 dev/pci/if_bge.c rcb->bge_nicaddr); rcb 1359 dev/pci/if_bge.c rcb = &sc->bge_rdata->bge_info.bge_mini_rx_rcb; rcb 1360 dev/pci/if_bge.c rcb->bge_maxlen_flags = rcb 1363 dev/pci/if_bge.c rcb->bge_maxlen_flags); rcb 1855 dev/pci/if_bgereg.h #define RCB_WRITE_4(sc, rcb, offset, val) \ rcb 1857 dev/pci/if_bgereg.h rcb + offsetof(struct bge_rcb, offset), val) rcb 1859 dev/pci/if_bgereg.h #define RCB_WRITE_2(sc, rcb, offset, val) \ rcb 1861 dev/pci/if_bgereg.h rcb + offsetof(struct bge_rcb, offset), val) rcb 1356 dev/pci/if_ti.c struct ti_rcb *rcb; rcb 1381 dev/pci/if_ti.c rcb = &sc->ti_rdata->ti_info.ti_ev_rcb; rcb 1383 dev/pci/if_ti.c TI_HOSTADDR(rcb->ti_hostaddr) = TI_RING_DMA_ADDR(sc, ti_event_ring); rcb 1384 dev/pci/if_ti.c rcb->ti_flags = 0; rcb 1392 dev/pci/if_ti.c rcb = &sc->ti_rdata->ti_info.ti_cmd_rcb; rcb 1394 dev/pci/if_ti.c TI_HOSTADDR(rcb->ti_hostaddr) = TI_GCR_NIC_ADDR(TI_GCR_CMDRING); rcb 1395 dev/pci/if_ti.c rcb->ti_flags = 0; rcb 1396 dev/pci/if_ti.c rcb->ti_max_len = 0; rcb 1413 dev/pci/if_ti.c rcb = &sc->ti_rdata->ti_info.ti_std_rx_rcb; rcb 1414 dev/pci/if_ti.c TI_HOSTADDR(rcb->ti_hostaddr) = rcb 1416 dev/pci/if_ti.c rcb->ti_max_len = ETHER_MAX_LEN; rcb 1417 dev/pci/if_ti.c rcb->ti_flags = 0; rcb 1418 dev/pci/if_ti.c rcb->ti_flags |= TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; rcb 1421 dev/pci/if_ti.c rcb = &sc->ti_rdata->ti_info.ti_jumbo_rx_rcb; rcb 1422 dev/pci/if_ti.c TI_HOSTADDR(rcb->ti_hostaddr) = TI_RING_DMA_ADDR(sc, ti_rx_jumbo_ring); rcb 1423 dev/pci/if_ti.c rcb->ti_max_len = TI_JUMBO_FRAMELEN; rcb 1424 dev/pci/if_ti.c rcb->ti_flags = 0; rcb 1425 dev/pci/if_ti.c rcb->ti_flags |= TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; rcb 1432 dev/pci/if_ti.c rcb = &sc->ti_rdata->ti_info.ti_mini_rx_rcb; rcb 1433 dev/pci/if_ti.c TI_HOSTADDR(rcb->ti_hostaddr) = TI_RING_DMA_ADDR(sc, ti_rx_mini_ring); rcb 1434 dev/pci/if_ti.c rcb->ti_max_len = MHLEN - ETHER_ALIGN; rcb 1436 dev/pci/if_ti.c rcb->ti_flags = TI_RCB_FLAG_RING_DISABLED; rcb 1438 dev/pci/if_ti.c rcb->ti_flags = 0; rcb 1439 dev/pci/if_ti.c rcb->ti_flags |= TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; rcb 1444 dev/pci/if_ti.c rcb = &sc->ti_rdata->ti_info.ti_return_rcb; rcb 1445 dev/pci/if_ti.c TI_HOSTADDR(rcb->ti_hostaddr) = TI_RING_DMA_ADDR(sc,ti_rx_return_ring); rcb 1446 dev/pci/if_ti.c rcb->ti_flags = 0; rcb 1447 dev/pci/if_ti.c rcb->ti_max_len = TI_RETURN_RING_CNT; rcb 1463 dev/pci/if_ti.c rcb = &sc->ti_rdata->ti_info.ti_tx_rcb; rcb 1465 dev/pci/if_ti.c rcb->ti_flags = 0; rcb 1467 dev/pci/if_ti.c rcb->ti_flags = TI_RCB_FLAG_HOST_RING; rcb 1468 dev/pci/if_ti.c rcb->ti_flags |= TI_RCB_FLAG_IP_CKSUM | TI_RCB_FLAG_NO_PHDR_CKSUM; rcb 1471 dev/pci/if_ti.c rcb->ti_flags |= TI_RCB_FLAG_VLAN_ASSIST; rcb 1473 dev/pci/if_ti.c rcb->ti_max_len = TI_TX_RING_CNT; rcb 1475 dev/pci/if_ti.c TI_HOSTADDR(rcb->ti_hostaddr) = TI_TX_RING_BASE; rcb 1477 dev/pci/if_ti.c TI_HOSTADDR(rcb->ti_hostaddr) =