datap 347 arch/i386/i386/freebsd_machdep.c register_t *datap)
datap 352 arch/i386/i386/freebsd_machdep.c *datap = FREEBSD_REGS_OFFSET + FREEBSD_USRSTACK;
datap 357 arch/i386/i386/freebsd_machdep.c *datap = *(register_t *)&((caddr_t)&fregs->freebsd_ptrace_regs)
datap 363 arch/i386/i386/freebsd_machdep.c *datap= *(register_t *)&((caddr_t)&fregs->freebsd_ptrace_fpregs)
datap 320 dev/ic/rt2661reg.h #define RAL_READ_REGION_4(sc, offset, datap, count) \
datap 322 dev/ic/rt2661reg.h (datap), (count))
datap 334 dev/ic/rt2661reg.h #define RAL_WRITE_REGION_1(sc, offset, datap, count) \
datap 336 dev/ic/rt2661reg.h (datap), (count))
datap 2721 dev/isa/ess.c ess_read_multi_mix_reg(sc, reg, datap, count)
datap 2724 dev/isa/ess.c u_int8_t *datap;
datap 2733 dev/isa/ess.c bus_space_read_multi_1(iot, ioh, ESS_MIX_REG_DATA, datap, count);
datap 525 dev/pci/if_che.c che_read_flash_multi4(struct cheg_softc *sc, u_int addr, u_int32_t *datap,
datap 537 dev/pci/if_che.c if ((rv = che_read_flash_reg(sc, 1, 1, datap)))
datap 541 dev/pci/if_che.c if ((rv = che_read_flash_reg(sc, 4, count > 1, datap)))
datap 544 dev/pci/if_che.c datap++;
datap 1974 dev/pci/if_ipw.c ipw_read_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap,
datap 1977 dev/pci/if_ipw.c for (; count > 0; offset++, datap++, count--) {
datap 1979 dev/pci/if_ipw.c *datap = CSR_READ_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3));
datap 1984 dev/pci/if_ipw.c ipw_write_mem_1(struct ipw_softc *sc, bus_size_t offset, uint8_t *datap,
datap 1987 dev/pci/if_ipw.c for (; count > 0; offset++, datap++, count--) {
datap 1989 dev/pci/if_ipw.c CSR_WRITE_1(sc, IPW_CSR_INDIRECT_DATA + (offset & 3), *datap);
datap 434 dev/pci/if_iwireg.h #define CSR_READ_REGION_4(sc, offset, datap, count) \
datap 436 dev/pci/if_iwireg.h (datap), (count))
datap 447 dev/pci/if_iwireg.h #define CSR_WRITE_REGION_1(sc, offset, datap, count) \
datap 449 dev/pci/if_iwireg.h (datap), (count))
datap 725 dev/pci/if_wpireg.h #define WPI_WRITE_REGION_4(sc, offset, datap, count) \
datap 727 dev/pci/if_wpireg.h (datap), (count))
datap 1335 dev/pci/maestro.c maestro_read_codec(self, regno, datap)
datap 1338 dev/pci/maestro.c u_int16_t *datap;
datap 1371 dev/pci/maestro.c *datap = bus_space_read_2(sc->iot, sc->ioh, PORT_CODEC_REG);
datap 725 dev/sdmmc/sdhc.c u_char *datap = cmd->c_data;
datap 758 dev/sdmmc/sdhc.c sdhc_read_data(hp, datap, i);
datap 760 dev/sdmmc/sdhc.c sdhc_write_data(hp, datap, i);
datap 762 dev/sdmmc/sdhc.c datap += i;
datap 779 dev/sdmmc/sdhc.c sdhc_read_data(struct sdhc_host *hp, u_char *datap, int datalen)
datap 782 dev/sdmmc/sdhc.c *(u_int32_t *)datap = HREAD4(hp, SDHC_DATA);
datap 783 dev/sdmmc/sdhc.c datap += 4;
datap 789 dev/sdmmc/sdhc.c *datap++ = rv & 0xff;
datap 796 dev/sdmmc/sdhc.c sdhc_write_data(struct sdhc_host *hp, u_char *datap, int datalen)
datap 799 dev/sdmmc/sdhc.c DPRINTF(3,("%08x\n", *(u_int32_t *)datap));
datap 800 dev/sdmmc/sdhc.c HWRITE4(hp, SDHC_DATA, *((u_int32_t *)datap)++);
datap 804 dev/sdmmc/sdhc.c u_int32_t rv = *datap++;
datap 806 dev/sdmmc/sdhc.c rv |= *datap++ << 8;
datap 808 dev/sdmmc/sdhc.c rv |= *datap++ << 16;
datap 340 dev/sdmmc/sdmmc_io.c int reg, u_char *datap, int arg)
datap 357 dev/sdmmc/sdmmc_io.c arg |= (*datap & SD_ARG_CMD52_DATA_MASK) <<
datap 366 dev/sdmmc/sdmmc_io.c *datap = SD_R5_DATA(cmd.c_resp);
datap 380 dev/sdmmc/sdmmc_io.c int reg, u_char *datap, int datalen, int arg)
datap 406 dev/sdmmc/sdmmc_io.c cmd.c_data = datap;
datap 509 dev/sdmmc/sdmmc_io.c int reg, u_char *datap)
datap 511 dev/sdmmc/sdmmc_io.c return sdmmc_io_rw_direct(sc, sf, reg, datap,
datap 323 lib/libsa/bootparam.c char *datap;
datap 331 lib/libsa/bootparam.c datap = *pkt;
datap 333 lib/libsa/bootparam.c bcopy(str, datap, len);
datap 342 lib/libsa/bootparam.c char *datap;
datap 354 lib/libsa/bootparam.c datap = *pkt;
datap 356 lib/libsa/bootparam.c bcopy(datap, str, slen);
datap 60 ntfs/ntfs_subr.h caddr_t datap;
datap 69 ntfs/ntfs_subr.h #define va_datap va_d.datap