chp 136 dev/ata/ata_wdc.c struct channel_softc *chp = drvp->chnl_softc;
chp 147 dev/ata/ata_wdc.c (chp->wdc->quirks & WDC_QUIRK_NOSHORTDMA) == 0))
chp 156 dev/ata/ata_wdc.c wdc_exec_xfer(chp, xfer);
chp 161 dev/ata/ata_wdc.c wdc_ata_bio_start(struct channel_softc *chp, struct wdc_xfer *xfer)
chp 165 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
chp 170 dev/ata/ata_wdc.c timeout_add(&chp->ch_timo, ATA_DELAY / 1000 * hz);
chp 171 dev/ata/ata_wdc.c _wdc_ata_bio_start(chp, xfer);
chp 175 dev/ata/ata_wdc.c _wdc_ata_bio_start(struct channel_softc *chp, struct wdc_xfer *xfer)
chp 178 dev/ata/ata_wdc.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
chp 186 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
chp 198 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel,
chp 203 dev/ata/ata_wdc.c wdc_set_drive(chp, xfer->drive);
chp 204 dev/ata/ata_wdc.c if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0)
chp 206 dev/ata/ata_wdc.c wdccommandshort(chp, xfer->drive, WDCC_RECAL);
chp 209 dev/ata/ata_wdc.c chp->ch_flags |= WDCF_IRQ_WAIT;
chp 213 dev/ata/ata_wdc.c wdc_ata_ctrl_intr(chp, xfer, 0);
chp 265 dev/ata/ata_wdc.c if ((*chp->wdc->dma_init)(chp->wdc->dma_arg,
chp 266 dev/ata/ata_wdc.c chp->channel, xfer->drive,
chp 271 dev/ata/ata_wdc.c wdc_ata_bio_done(chp, xfer);
chp 275 dev/ata/ata_wdc.c wdc_set_drive(chp, xfer->drive);
chp 276 dev/ata/ata_wdc.c if (wait_for_ready(chp, ata_delay) < 0)
chp 279 dev/ata/ata_wdc.c wdccommandext(chp, xfer->drive, cmd,
chp 282 dev/ata/ata_wdc.c wdccommand(chp, xfer->drive, cmd, cyl,
chp 286 dev/ata/ata_wdc.c (*chp->wdc->dma_start)(chp->wdc->dma_arg,
chp 287 dev/ata/ata_wdc.c chp->channel, xfer->drive);
chp 288 dev/ata/ata_wdc.c chp->ch_flags |= WDCF_DMA_WAIT;
chp 310 dev/ata/ata_wdc.c wdc_set_drive(chp, xfer->drive);
chp 311 dev/ata/ata_wdc.c if (wait_for_ready(chp, ata_delay) < 0)
chp 314 dev/ata/ata_wdc.c wdccommandext(chp, xfer->drive, cmd,
chp 317 dev/ata/ata_wdc.c wdccommand(chp, xfer->drive, cmd, cyl,
chp 332 dev/ata/ata_wdc.c if (wait_for_drq(chp, ata_delay) != 0) {
chp 335 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel,
chp 336 dev/ata/ata_wdc.c xfer->drive, chp->ch_status, WDCS_BITS,
chp 337 dev/ata/ata_wdc.c chp->ch_error);
chp 340 dev/ata/ata_wdc.c wdc_ata_bio_done(chp, xfer);
chp 344 dev/ata/ata_wdc.c wdc_ata_bio_done(chp, xfer);
chp 353 dev/ata/ata_wdc.c chp->ch_flags |= WDCF_IRQ_WAIT;
chp 357 dev/ata/ata_wdc.c if (chp->ch_flags & WDCF_DMA_WAIT) {
chp 358 dev/ata/ata_wdc.c wdc_dmawait(chp, xfer, ATA_DELAY);
chp 359 dev/ata/ata_wdc.c chp->ch_flags &= ~WDCF_DMA_WAIT;
chp 361 dev/ata/ata_wdc.c wdc_ata_bio_intr(chp, xfer, 0);
chp 368 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
chp 369 dev/ata/ata_wdc.c chp->ch_status, WDCS_BITS, chp->ch_error);
chp 372 dev/ata/ata_wdc.c wdc_ata_bio_done(chp, xfer);
chp 377 dev/ata/ata_wdc.c wdc_ata_bio_intr(struct channel_softc *chp, struct wdc_xfer *xfer, int irq)
chp 380 dev/ata/ata_wdc.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
chp 384 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
chp 391 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
chp 404 dev/ata/ata_wdc.c if (wait_for_unbusy(chp,
chp 409 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
chp 414 dev/ata/ata_wdc.c if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
chp 415 dev/ata/ata_wdc.c chp->wdc->irqack(chp);
chp 420 dev/ata/ata_wdc.c if (chp->wdc->dma_status != 0) {
chp 426 dev/ata/ata_wdc.c if (chp->ch_status & WDCS_DRQ) {
chp 429 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel,
chp 430 dev/ata/ata_wdc.c xfer->drive, chp->ch_status, WDCS_BITS);
chp 442 dev/ata/ata_wdc.c wdc_ata_bio_done(chp, xfer);
chp 448 dev/ata/ata_wdc.c if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) {
chp 450 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel,
chp 453 dev/ata/ata_wdc.c wdc_ata_bio_done(chp, xfer);
chp 468 dev/ata/ata_wdc.c _wdc_ata_bio_start(chp, xfer);
chp 475 dev/ata/ata_wdc.c wdc_ata_bio_done(chp, xfer);
chp 484 dev/ata/ata_wdc.c wdc_ata_bio_done(chp, xfer);
chp 489 dev/ata/ata_wdc.c wdc_ata_bio_kill_xfer(struct channel_softc *chp, struct wdc_xfer *xfer)
chp 493 dev/ata/ata_wdc.c timeout_del(&chp->ch_timo);
chp 495 dev/ata/ata_wdc.c wdc_free_xfer(chp, xfer);
chp 507 dev/ata/ata_wdc.c wdc_ata_bio_done(struct channel_softc *chp, struct wdc_xfer *xfer)
chp 512 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
chp 516 dev/ata/ata_wdc.c timeout_del(&chp->ch_timo);
chp 522 dev/ata/ata_wdc.c wdc_free_xfer(chp, xfer);
chp 530 dev/ata/ata_wdc.c chp->ch_flags), DEBUG_XFERS);
chp 531 dev/ata/ata_wdc.c wdcstart(chp);
chp 538 dev/ata/ata_wdc.c wdc_ata_ctrl_intr(struct channel_softc *chp, struct wdc_xfer *xfer, int irq)
chp 541 dev/ata/ata_wdc.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
chp 556 dev/ata/ata_wdc.c if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
chp 558 dev/ata/ata_wdc.c if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
chp 559 dev/ata/ata_wdc.c chp->wdc->irqack(chp);
chp 560 dev/ata/ata_wdc.c if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
chp 566 dev/ata/ata_wdc.c if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0)
chp 574 dev/ata/ata_wdc.c wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
chp 581 dev/ata/ata_wdc.c if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
chp 583 dev/ata/ata_wdc.c if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
chp 584 dev/ata/ata_wdc.c chp->wdc->irqack(chp);
chp 585 dev/ata/ata_wdc.c if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
chp 591 dev/ata/ata_wdc.c wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
chp 594 dev/ata/ata_wdc.c wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
chp 603 dev/ata/ata_wdc.c if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
chp 605 dev/ata/ata_wdc.c if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
chp 606 dev/ata/ata_wdc.c chp->wdc->irqack(chp);
chp 607 dev/ata/ata_wdc.c if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
chp 615 dev/ata/ata_wdc.c wdccommand(chp, xfer->drive, WDCC_IDP,
chp 625 dev/ata/ata_wdc.c if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
chp 627 dev/ata/ata_wdc.c if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
chp 628 dev/ata/ata_wdc.c chp->wdc->irqack(chp);
chp 629 dev/ata/ata_wdc.c if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
chp 637 dev/ata/ata_wdc.c wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0,
chp 644 dev/ata/ata_wdc.c if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay))
chp 646 dev/ata/ata_wdc.c if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
chp 647 dev/ata/ata_wdc.c chp->wdc->irqack(chp);
chp 648 dev/ata/ata_wdc.c if (chp->ch_status & (WDCS_ERR | WDCS_DWF))
chp 659 dev/ata/ata_wdc.c _wdc_ata_bio_start(chp, xfer);
chp 664 dev/ata/ata_wdc.c chp->ch_flags |= WDCF_IRQ_WAIT;
chp 675 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
chp 678 dev/ata/ata_wdc.c wdc_ata_bio_done(chp, xfer);
chp 682 dev/ata/ata_wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
chp 684 dev/ata/ata_wdc.c if (chp->ch_status & WDCS_DWF) {
chp 688 dev/ata/ata_wdc.c printf("error (%x)\n", chp->ch_error);
chp 689 dev/ata/ata_wdc.c ata_bio->r_error = chp->ch_error;
chp 693 dev/ata/ata_wdc.c wdc_ata_bio_done(chp, xfer);
chp 700 dev/ata/ata_wdc.c struct channel_softc *chp = drvp->chnl_softc;
chp 702 dev/ata/ata_wdc.c if (chp->ch_status & WDCS_BSY) {
chp 707 dev/ata/ata_wdc.c if (chp->ch_status & WDCS_DWF) {
chp 712 dev/ata/ata_wdc.c if (chp->ch_status & WDCS_ERR) {
chp 714 dev/ata/ata_wdc.c ata_bio->r_error = chp->ch_error;
chp 729 dev/ata/ata_wdc.c if (chp->ch_status & WDCS_CORR)
chp 739 dev/ata/ata_wdc.c struct channel_softc *chp = drvp->chnl_softc;
chp 741 dev/ata/ata_wdc.c return (wdc_addref(chp));
chp 748 dev/ata/ata_wdc.c struct channel_softc *chp = drvp->chnl_softc;
chp 750 dev/ata/ata_wdc.c wdc_delref(chp);
chp 161 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 233 dev/atapiscsi/atapiscsi.c struct channel_softc *chp = drvp->chnl_softc;
chp 243 dev/atapiscsi/atapiscsi.c if (chp->wdc->sc_dev.dv_cfdata->cf_flags & WDC_OPTION_PROBE_VERBOSE)
chp 247 dev/atapiscsi/atapiscsi.c as->chp = chp;
chp 309 dev/atapiscsi/atapiscsi.c if (chp->wdc->sc_dev.dv_cfdata->cf_flags & WDC_OPTION_PROBE_VERBOSE)
chp 327 dev/atapiscsi/atapiscsi.c struct channel_softc *chp = as->chp;
chp 328 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[as->drive];
chp 334 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, as->drive), DEBUG_XFERS);
chp 356 dev/atapiscsi/atapiscsi.c timeout_set(&xfer->atapi_poll_to, wdc_atapi_timer_handler, chp);
chp 359 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, as->drive),
chp 424 dev/atapiscsi/atapiscsi.c wdc_exec_xfer(chp, xfer);
chp 452 dev/atapiscsi/atapiscsi.c struct channel_softc *chp = as->chp;
chp 453 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[as->drive];
chp 513 dev/atapiscsi/atapiscsi.c wdc_atapi_drive_selected(chp, drive)
chp 514 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 517 dev/atapiscsi/atapiscsi.c u_int8_t reg = CHP_READ_REG(chp, wdr_sdh);
chp 519 dev/atapiscsi/atapiscsi.c WDC_LOG_REG(chp, wdr_sdh, reg);
chp 536 dev/atapiscsi/atapiscsi.c wdc_atapi_start(chp, xfer)
chp 537 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 542 dev/atapiscsi/atapiscsi.c wdc_atapi_the_machine(chp, xfer, ctxt_process);
chp 550 dev/atapiscsi/atapiscsi.c struct channel_softc *chp = arg;
chp 555 dev/atapiscsi/atapiscsi.c xfer = TAILQ_FIRST(&chp->ch_queue->sc_xfer);
chp 563 dev/atapiscsi/atapiscsi.c chp->ch_flags &= ~WDCF_IRQ_WAIT;
chp 564 dev/atapiscsi/atapiscsi.c wdc_atapi_the_machine(chp, xfer, ctxt_timer);
chp 570 dev/atapiscsi/atapiscsi.c wdc_atapi_intr(chp, xfer, irq)
chp 571 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 575 dev/atapiscsi/atapiscsi.c timeout_del(&chp->ch_timo);
chp 580 dev/atapiscsi/atapiscsi.c wdc_atapi_the_machine(chp, xfer, ctxt_timer);
chp 584 dev/atapiscsi/atapiscsi.c wdc_atapi_the_machine(chp, xfer, ctxt_interrupt);
chp 598 dev/atapiscsi/atapiscsi.c wdc_atapi_the_poll_machine(chp, xfer)
chp 599 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 610 dev/atapiscsi/atapiscsi.c (xfer->next)(chp, xfer, (current_timeout * 1000 <= idx),
chp 614 dev/atapiscsi/atapiscsi.c wdc_free_xfer(chp, xfer);
chp 615 dev/atapiscsi/atapiscsi.c wdcstart(chp);
chp 635 dev/atapiscsi/atapiscsi.c wdc_atapi_the_machine(chp, xfer, ctxt)
chp 636 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 645 dev/atapiscsi/atapiscsi.c wdc_disable_intr(chp);
chp 654 dev/atapiscsi/atapiscsi.c wdc_atapi_the_poll_machine(chp, xfer);
chp 664 dev/atapiscsi/atapiscsi.c (xfer->next)(chp, xfer,
chp 680 dev/atapiscsi/atapiscsi.c wdc_free_xfer(chp, xfer);
chp 681 dev/atapiscsi/atapiscsi.c wdcstart(chp);
chp 687 dev/atapiscsi/atapiscsi.c chp->ch_flags |= WDCF_IRQ_WAIT;
chp 688 dev/atapiscsi/atapiscsi.c timeout_add(&chp->ch_timo, xfer->endticks - ticks);
chp 710 dev/atapiscsi/atapiscsi.c wdc_atapi_update_status(chp)
chp 711 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 713 dev/atapiscsi/atapiscsi.c chp->ch_status = CHP_READ_REG(chp, wdr_status);
chp 715 dev/atapiscsi/atapiscsi.c WDC_LOG_STATUS(chp, chp->ch_status);
chp 717 dev/atapiscsi/atapiscsi.c if (chp->ch_status == 0xff && (chp->ch_flags & WDCF_ONESLAVE)) {
chp 718 dev/atapiscsi/atapiscsi.c wdc_set_drive(chp, 1);
chp 720 dev/atapiscsi/atapiscsi.c chp->ch_status = CHP_READ_REG(chp, wdr_status);
chp 721 dev/atapiscsi/atapiscsi.c WDC_LOG_STATUS(chp, chp->ch_status);
chp 724 dev/atapiscsi/atapiscsi.c if ((chp->ch_status & (WDCS_BSY | WDCS_ERR)) == WDCS_ERR) {
chp 725 dev/atapiscsi/atapiscsi.c chp->ch_error = CHP_READ_REG(chp, wdr_error);
chp 726 dev/atapiscsi/atapiscsi.c WDC_LOG_ERROR(chp, chp->ch_error);
chp 731 dev/atapiscsi/atapiscsi.c wdc_atapi_real_start(chp, xfer, timeout, ret)
chp 732 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 740 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
chp 757 dev/atapiscsi/atapiscsi.c wdc_set_drive(chp, xfer->drive);
chp 766 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive,
chp 775 dev/atapiscsi/atapiscsi.c wdc_atapi_real_start_2(chp, xfer, timeout, ret)
chp 776 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 782 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
chp 786 dev/atapiscsi/atapiscsi.c chp->ch_status);
chp 792 dev/atapiscsi/atapiscsi.c wdc_atapi_update_status(chp);
chp 794 dev/atapiscsi/atapiscsi.c if (chp->ch_status & (WDCS_BSY | WDCS_DRQ))
chp 810 dev/atapiscsi/atapiscsi.c wdc_atapi_send_packet(chp, xfer, timeout, ret)
chp 811 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 817 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
chp 828 dev/atapiscsi/atapiscsi.c wdccommand(chp, xfer->drive, ATAPI_PKT_CMD,
chp 847 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive
chp 853 dev/atapiscsi/atapiscsi.c wdc_atapi_intr_command(chp, xfer, timeout, ret)
chp 854 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 860 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
chp 869 dev/atapiscsi/atapiscsi.c wdc_atapi_update_status(chp);
chp 871 dev/atapiscsi/atapiscsi.c if ((chp->ch_status & WDCS_BSY) || !(chp->ch_status & WDCS_DRQ)) {
chp 878 dev/atapiscsi/atapiscsi.c if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
chp 879 dev/atapiscsi/atapiscsi.c chp->wdc->irqack(chp);
chp 890 dev/atapiscsi/atapiscsi.c WDC_LOG_ATAPI_CMD(chp, xfer->drive, xfer->c_flags,
chp 899 dev/atapiscsi/atapiscsi.c if ((*chp->wdc->dma_init)(chp->wdc->dma_arg,
chp 900 dev/atapiscsi/atapiscsi.c chp->channel, xfer->drive, xfer->databuf,
chp 913 dev/atapiscsi/atapiscsi.c (*chp->wdc->dma_start)(chp->wdc->dma_arg,
chp 914 dev/atapiscsi/atapiscsi.c chp->channel, xfer->drive);
chp 950 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive);
chp 1010 dev/atapiscsi/atapiscsi.c wdc_atapi_intr_data(chp, xfer, timeout, ret)
chp 1011 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 1017 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
chp 1022 dev/atapiscsi/atapiscsi.c len = (CHP_READ_REG(chp, wdr_cyl_hi) << 8) |
chp 1023 dev/atapiscsi/atapiscsi.c CHP_READ_REG(chp, wdr_cyl_lo);
chp 1024 dev/atapiscsi/atapiscsi.c WDC_LOG_REG(chp, wdr_cyl_lo, len);
chp 1026 dev/atapiscsi/atapiscsi.c ire = CHP_READ_REG(chp, wdr_ireason);
chp 1027 dev/atapiscsi/atapiscsi.c WDC_LOG_REG(chp, wdr_ireason, ire);
chp 1052 dev/atapiscsi/atapiscsi.c len, chp->ch_status, WDCS_BITS, chp->ch_error, ire),
chp 1077 dev/atapiscsi/atapiscsi.c CHP_WRITE_RAW_MULTI_2(chp, NULL,
chp 1086 dev/atapiscsi/atapiscsi.c wdcbit_bucket(chp, len - xfer->c_bcount);
chp 1100 dev/atapiscsi/atapiscsi.c wdc_atapi_intr_complete(chp, xfer, timeout, ret)
chp 1101 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 1107 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
chp 1124 dev/atapiscsi/atapiscsi.c wdc_atapi_update_status(chp);
chp 1125 dev/atapiscsi/atapiscsi.c if ((chp->ch_status & (WDCS_BSY | WDCS_DRQ)) == 0)
chp 1134 dev/atapiscsi/atapiscsi.c chp->wdc->dma_status =
chp 1135 dev/atapiscsi/atapiscsi.c (*chp->wdc->dma_finish)
chp 1136 dev/atapiscsi/atapiscsi.c (chp->wdc->dma_arg, chp->channel,
chp 1139 dev/atapiscsi/atapiscsi.c if (chp->wdc->dma_status & WDC_DMAST_UNDER)
chp 1148 dev/atapiscsi/atapiscsi.c if (chp->ch_status & WDCS_ERR) {
chp 1149 dev/atapiscsi/atapiscsi.c if (chp->ch_error & WDCE_ABRT) {
chp 1174 dev/atapiscsi/atapiscsi.c if (chp->ch_status & WDCS_ERR) {
chp 1175 dev/atapiscsi/atapiscsi.c if (!atapi_to_scsi_sense(sc_xfer, chp->ch_error) &&
chp 1194 dev/atapiscsi/atapiscsi.c (chp->wdc->dma_status & ~WDC_DMAST_UNDER)) {
chp 1228 dev/atapiscsi/atapiscsi.c wdc_atapi_pio_intr(chp, xfer, timeout, ret)
chp 1229 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 1238 dev/atapiscsi/atapiscsi.c wdc_atapi_update_status(chp);
chp 1240 dev/atapiscsi/atapiscsi.c if (chp->ch_status & WDCS_BSY) {
chp 1247 dev/atapiscsi/atapiscsi.c if (!wdc_atapi_drive_selected(chp, xfer->drive)) {
chp 1249 dev/atapiscsi/atapiscsi.c wdc_set_drive(chp, xfer->drive);
chp 1257 dev/atapiscsi/atapiscsi.c !(chp->ch_status & (WDCS_DSC | WDCS_DRQ))) {
chp 1265 dev/atapiscsi/atapiscsi.c if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
chp 1266 dev/atapiscsi/atapiscsi.c chp->wdc->irqack(chp);
chp 1268 dev/atapiscsi/atapiscsi.c ireason = CHP_READ_REG(chp, wdr_ireason);
chp 1269 dev/atapiscsi/atapiscsi.c WDC_LOG_REG(chp, wdr_ireason, ireason);
chp 1272 dev/atapiscsi/atapiscsi.c chp->ch_status, WDCS_BITS, ireason), DEBUG_INTR );
chp 1276 dev/atapiscsi/atapiscsi.c if ((chp->ch_status & WDCS_DRQ) ||
chp 1281 dev/atapiscsi/atapiscsi.c wdc_atapi_intr_data(chp, xfer, timeout, ret);
chp 1286 dev/atapiscsi/atapiscsi.c if ((chp->ch_status & WDCS_DRQ) ||
chp 1295 dev/atapiscsi/atapiscsi.c wdc_atapi_intr_complete(chp, xfer, timeout, ret);
chp 1307 dev/atapiscsi/atapiscsi.c ireason = CHP_READ_REG(chp, wdr_ireason);
chp 1308 dev/atapiscsi/atapiscsi.c WDC_LOG_REG(chp, wdr_ireason, ireason);
chp 1312 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
chp 1313 dev/atapiscsi/atapiscsi.c xfer->c_bcount, xfer->c_skip, chp->ch_status, WDCS_BITS, ireason);
chp 1323 dev/atapiscsi/atapiscsi.c wdc_atapi_ctrl(chp, xfer, timeout, ret)
chp 1324 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 1330 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
chp 1333 dev/atapiscsi/atapiscsi.c wdc_atapi_update_status(chp);
chp 1338 dev/atapiscsi/atapiscsi.c if (chp->ch_status & WDCS_BSY)
chp 1342 dev/atapiscsi/atapiscsi.c if (chp->ch_status & (WDCS_BSY | WDCS_DRQ))
chp 1348 dev/atapiscsi/atapiscsi.c if (!wdc_atapi_drive_selected(chp, xfer->drive))
chp 1350 dev/atapiscsi/atapiscsi.c wdc_set_drive(chp, xfer->drive);
chp 1365 dev/atapiscsi/atapiscsi.c if (!(chp->ch_status & WDCS_BSY) &&
chp 1366 dev/atapiscsi/atapiscsi.c (chp->ch_status & (WDCS_DRQ | WDCS_ERR)))
chp 1373 dev/atapiscsi/atapiscsi.c if (!(chp->ch_status & (WDCS_BSY | WDCS_DRQ)))
chp 1379 dev/atapiscsi/atapiscsi.c if (chp->ch_status & (WDCS_BSY | WDCS_DRQ))
chp 1386 dev/atapiscsi/atapiscsi.c if (chp->ch_status & (WDCS_BSY | WDCS_DRQ))
chp 1402 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive, drvp->state),
chp 1425 dev/atapiscsi/atapiscsi.c wdccommandshort(chp, drvp->drive, ATAPI_DEVICE_RESET);
chp 1435 dev/atapiscsi/atapiscsi.c wdccommandshort(chp, drvp->drive, ATAPI_IDENTIFY_DEVICE);
chp 1444 dev/atapiscsi/atapiscsi.c while ((chp->ch_status & WDCS_DRQ) &&
chp 1446 dev/atapiscsi/atapiscsi.c wdcbit_bucket(chp, 512);
chp 1449 dev/atapiscsi/atapiscsi.c wdc_atapi_update_status(chp);
chp 1463 dev/atapiscsi/atapiscsi.c if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0)
chp 1471 dev/atapiscsi/atapiscsi.c wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
chp 1478 dev/atapiscsi/atapiscsi.c if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
chp 1479 dev/atapiscsi/atapiscsi.c chp->wdc->irqack(chp);
chp 1480 dev/atapiscsi/atapiscsi.c if (chp->ch_status & WDCS_ERR) {
chp 1483 dev/atapiscsi/atapiscsi.c chp->wdc->set_modes(chp);
chp 1489 dev/atapiscsi/atapiscsi.c wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
chp 1492 dev/atapiscsi/atapiscsi.c wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
chp 1504 dev/atapiscsi/atapiscsi.c if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
chp 1505 dev/atapiscsi/atapiscsi.c chp->wdc->irqack(chp);
chp 1506 dev/atapiscsi/atapiscsi.c if (chp->ch_status & WDCS_ERR)
chp 1520 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
chp 1528 dev/atapiscsi/atapiscsi.c wdc_atapi_tape_done(chp, xfer, timeout, ret)
chp 1529 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 1555 dev/atapiscsi/atapiscsi.c wdc_atapi_done(chp, xfer, timeout, ret)
chp 1556 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 1564 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
chp 1566 dev/atapiscsi/atapiscsi.c WDC_LOG_ATAPI_DONE(chp, xfer->drive, xfer->c_flags, sc_xfer->error);
chp 1571 dev/atapiscsi/atapiscsi.c wdc_enable_intr(chp);
chp 1583 dev/atapiscsi/atapiscsi.c wdc_atapi_reset(chp, xfer, timeout, ret)
chp 1584 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 1589 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
chp 1597 dev/atapiscsi/atapiscsi.c wdccommandshort(chp, xfer->drive, ATAPI_SOFT_RESET);
chp 1611 dev/atapiscsi/atapiscsi.c wdc_atapi_reset_2(chp, xfer, timeout, ret)
chp 1612 dev/atapiscsi/atapiscsi.c struct channel_softc *chp;
chp 1617 dev/atapiscsi/atapiscsi.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
chp 1622 dev/atapiscsi/atapiscsi.c chp->wdc->sc_dev.dv_xname, chp->channel,
chp 1631 dev/atapiscsi/atapiscsi.c wdc_atapi_update_status(chp);
chp 1633 dev/atapiscsi/atapiscsi.c if (chp->ch_status & (WDCS_BSY | WDCS_DRQ)) {
chp 395 dev/ic/athvar.h #define ATH_CALLOUT_INIT(chp) callout_init((chp))
chp 156 dev/ic/wdc.c wdc_log(struct channel_softc *chp, enum wdcevent_type type,
chp 184 dev/ic/wdc.c if (chp->ch_log_idx == 0)
chp 185 dev/ic/wdc.c chp->ch_log_idx = chp_idx++;
chp 215 dev/ic/wdc.c *ptr++ = ((chp->ch_log_idx & 0x7) << 5) | (size & 0x1f);
chp 299 dev/ic/wdc.c wdc_default_read_reg(chp, reg)
chp 300 dev/ic/wdc.c struct channel_softc *chp;
chp 310 dev/ic/wdc.c return (bus_space_read_1(chp->ctl_iot, chp->ctl_ioh,
chp 313 dev/ic/wdc.c return (bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
chp 318 dev/ic/wdc.c wdc_default_write_reg(chp, reg, val)
chp 319 dev/ic/wdc.c struct channel_softc *chp;
chp 330 dev/ic/wdc.c bus_space_write_1(chp->ctl_iot, chp->ctl_ioh,
chp 333 dev/ic/wdc.c bus_space_write_1(chp->cmd_iot, chp->cmd_ioh,
chp 338 dev/ic/wdc.c wdc_default_lba48_write_reg(chp, reg, val)
chp 339 dev/ic/wdc.c struct channel_softc *chp;
chp 344 dev/ic/wdc.c CHP_WRITE_REG(chp, reg, val >> 8);
chp 345 dev/ic/wdc.c CHP_WRITE_REG(chp, reg, val);
chp 349 dev/ic/wdc.c wdc_default_read_raw_multi_2(chp, data, nbytes)
chp 350 dev/ic/wdc.c struct channel_softc *chp;
chp 358 dev/ic/wdc.c bus_space_read_2(chp->cmd_iot, chp->cmd_ioh, 0);
chp 364 dev/ic/wdc.c bus_space_read_raw_multi_2(chp->cmd_iot, chp->cmd_ioh, 0,
chp 370 dev/ic/wdc.c wdc_default_write_raw_multi_2(chp, data, nbytes)
chp 371 dev/ic/wdc.c struct channel_softc *chp;
chp 379 dev/ic/wdc.c bus_space_write_2(chp->cmd_iot, chp->cmd_ioh, 0, 0);
chp 385 dev/ic/wdc.c bus_space_write_raw_multi_2(chp->cmd_iot, chp->cmd_ioh, 0,
chp 391 dev/ic/wdc.c wdc_default_write_raw_multi_4(chp, data, nbytes)
chp 392 dev/ic/wdc.c struct channel_softc *chp;
chp 400 dev/ic/wdc.c bus_space_write_4(chp->cmd_iot, chp->cmd_ioh, 0, 0);
chp 406 dev/ic/wdc.c bus_space_write_raw_multi_4(chp->cmd_iot, chp->cmd_ioh, 0,
chp 412 dev/ic/wdc.c wdc_default_read_raw_multi_4(chp, data, nbytes)
chp 413 dev/ic/wdc.c struct channel_softc *chp;
chp 421 dev/ic/wdc.c bus_space_read_4(chp->cmd_iot, chp->cmd_ioh, 0);
chp 427 dev/ic/wdc.c bus_space_read_raw_multi_4(chp->cmd_iot, chp->cmd_ioh, 0,
chp 446 dev/ic/wdc.c wdc_disable_intr(chp)
chp 447 dev/ic/wdc.c struct channel_softc *chp;
chp 449 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_ctlr, WDCTL_IDS);
chp 453 dev/ic/wdc.c wdc_enable_intr(chp)
chp 454 dev/ic/wdc.c struct channel_softc *chp;
chp 456 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_ctlr, WDCTL_4BIT);
chp 460 dev/ic/wdc.c wdc_set_drive(struct channel_softc *chp, int drive)
chp 462 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_sdh, (drive << 4) | WDSD_IBM);
chp 463 dev/ic/wdc.c WDC_LOG_SET_DRIVE(chp, drive);
chp 467 dev/ic/wdc.c wdc_floating_bus(chp, drive)
chp 468 dev/ic/wdc.c struct channel_softc *chp;
chp 475 dev/ic/wdc.c wdc_set_drive(chp, drive);
chp 481 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_seccnt, 0x7f);
chp 484 dev/ic/wdc.c status = CHP_READ_REG(chp, wdr_status);
chp 503 dev/ic/wdc.c wdc_preata_drive(chp, drive)
chp 504 dev/ic/wdc.c struct channel_softc *chp;
chp 508 dev/ic/wdc.c if (wdc_floating_bus(chp, drive)) {
chp 510 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname,
chp 511 dev/ic/wdc.c chp->channel, drive), DEBUG_PROBE);
chp 515 dev/ic/wdc.c wdc_set_drive(chp, drive);
chp 517 dev/ic/wdc.c if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 10000) != 0) {
chp 519 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname,
chp 520 dev/ic/wdc.c chp->channel, drive), DEBUG_PROBE);
chp 524 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_command, WDCC_RECAL);
chp 525 dev/ic/wdc.c WDC_LOG_ATA_CMDSHORT(chp, WDCC_RECAL);
chp 526 dev/ic/wdc.c if (wdcwait(chp, WDCS_DRDY | WDCS_DRQ, WDCS_DRDY, 10000) != 0) {
chp 528 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname,
chp 529 dev/ic/wdc.c chp->channel, drive), DEBUG_PROBE);
chp 537 dev/ic/wdc.c wdc_ata_present(chp, drive)
chp 538 dev/ic/wdc.c struct channel_softc *chp;
chp 544 dev/ic/wdc.c wdc_set_drive(chp, drive);
chp 557 dev/ic/wdc.c time_to_done = wdc_wait_for_status(chp,
chp 561 dev/ic/wdc.c if (retry_cnt == 0 && chp->ch_status == 0x00) {
chp 563 dev/ic/wdc.c wdccommandshort(chp, drive, WDCC_CHECK_PWR);
chp 569 dev/ic/wdc.c chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
chp 570 dev/ic/wdc.c chp->channel, drive, chp->ch_status),
chp 575 dev/ic/wdc.c if ((chp->ch_status & 0xfc) != (WDCS_DRDY | WDCS_DSC)) {
chp 578 dev/ic/wdc.c chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
chp 579 dev/ic/wdc.c chp->channel, drive, chp->ch_status),
chp 586 dev/ic/wdc.c chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
chp 587 dev/ic/wdc.c chp->channel, drive, time_to_done), DEBUG_PROBE);
chp 592 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_cyl_lo, 0xaa);
chp 593 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_cyl_hi, 0x55);
chp 594 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_seccnt, 0xff);
chp 597 dev/ic/wdc.c if (CHP_READ_REG(chp, wdr_cyl_lo) != 0xaa &&
chp 598 dev/ic/wdc.c CHP_READ_REG(chp, wdr_cyl_hi) != 0x55) {
chp 600 dev/ic/wdc.c chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
chp 601 dev/ic/wdc.c chp->channel, drive), DEBUG_PROBE);
chp 625 dev/ic/wdc.c wdcprobe(chp)
chp 626 dev/ic/wdc.c struct channel_softc *chp;
chp 635 dev/ic/wdc.c if (chp->_vtbl == 0) {
chp 637 dev/ic/wdc.c chp->_vtbl = &wdc_default_vtbl;
chp 642 dev/ic/wdc.c if ((chp->ch_flags & WDCF_VERBOSE_PROBE) ||
chp 643 dev/ic/wdc.c (chp->wdc &&
chp 644 dev/ic/wdc.c (chp->wdc->sc_dev.dv_cfdata->cf_flags & WDC_OPTION_PROBE_VERBOSE)))
chp 648 dev/ic/wdc.c if (chp->wdc == NULL ||
chp 649 dev/ic/wdc.c (chp->wdc->cap & WDC_CAPABILITY_NO_EXTRA_RESETS) == 0) {
chp 651 dev/ic/wdc.c wdc_set_drive(chp, 0);
chp 653 dev/ic/wdc.c st0 = CHP_READ_REG(chp, wdr_status);
chp 654 dev/ic/wdc.c WDC_LOG_STATUS(chp, st0);
chp 655 dev/ic/wdc.c wdc_set_drive(chp, 1);
chp 657 dev/ic/wdc.c st1 = CHP_READ_REG(chp, wdr_status);
chp 658 dev/ic/wdc.c WDC_LOG_STATUS(chp, st1);
chp 661 dev/ic/wdc.c chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
chp 662 dev/ic/wdc.c chp->channel, st0, WDCS_BITS, st1, WDCS_BITS),
chp 674 dev/ic/wdc.c wdc_do_reset(chp);
chp 676 dev/ic/wdc.c ret_value = __wdcwait_reset(chp, ret_value);
chp 678 dev/ic/wdc.c chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe", chp->channel,
chp 690 dev/ic/wdc.c wdc_set_drive(chp, drive);
chp 693 dev/ic/wdc.c st0 = CHP_READ_REG(chp, wdr_status);
chp 694 dev/ic/wdc.c sc = CHP_READ_REG(chp, wdr_seccnt);
chp 695 dev/ic/wdc.c sn = CHP_READ_REG(chp, wdr_sector);
chp 696 dev/ic/wdc.c cl = CHP_READ_REG(chp, wdr_cyl_lo);
chp 697 dev/ic/wdc.c ch = CHP_READ_REG(chp, wdr_cyl_hi);
chp 698 dev/ic/wdc.c WDC_LOG_REG(chp, wdr_cyl_lo, (ch << 8) | cl);
chp 702 dev/ic/wdc.c chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe",
chp 703 dev/ic/wdc.c chp->channel, drive, st0, WDCS_BITS, sc, sn, cl, ch),
chp 711 dev/ic/wdc.c chp->ch_drive[drive].drive_flags |= DRIVE_ATAPI;
chp 720 dev/ic/wdc.c if (chp->ch_drive[drive].drive_flags & DRIVE_ATAPI)
chp 723 dev/ic/wdc.c wdc_disable_intr(chp);
chp 725 dev/ic/wdc.c if (wdc_ata_present(chp, drive)) {
chp 726 dev/ic/wdc.c chp->ch_drive[drive].drive_flags |= DRIVE_ATA;
chp 727 dev/ic/wdc.c if (chp->wdc == NULL ||
chp 728 dev/ic/wdc.c (chp->wdc->cap & WDC_CAPABILITY_PREATA) != 0)
chp 729 dev/ic/wdc.c chp->ch_drive[drive].drive_flags |= DRIVE_OLD;
chp 733 dev/ic/wdc.c wdc_enable_intr(chp);
chp 761 dev/ic/wdc.c wdcattach(chp)
chp 762 dev/ic/wdc.c struct channel_softc *chp;
chp 777 dev/ic/wdc.c if (chp->wdc->reset == NULL)
chp 778 dev/ic/wdc.c chp->wdc->reset = wdc_do_reset;
chp 780 dev/ic/wdc.c timeout_set(&chp->ch_timo, wdctimeout, chp);
chp 783 dev/ic/wdc.c if ((error = wdc_addref(chp)) != 0) {
chp 785 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname);
chp 789 dev/ic/wdc.c if (!chp->_vtbl)
chp 790 dev/ic/wdc.c chp->_vtbl = &wdc_default_vtbl;
chp 792 dev/ic/wdc.c if (chp->wdc->drv_probe != NULL) {
chp 793 dev/ic/wdc.c chp->wdc->drv_probe(chp);
chp 795 dev/ic/wdc.c if (wdcprobe(chp) == 0) {
chp 798 dev/ic/wdc.c wdc_delref(chp);
chp 805 dev/ic/wdc.c if ((chp->ch_drive[0].drive_flags & DRIVE_ATAPI) ||
chp 806 dev/ic/wdc.c (chp->ch_drive[1].drive_flags & DRIVE_ATAPI)) {
chp 811 dev/ic/wdc.c if (chp->wdc->sc_dev.dv_cfdata->cf_flags & WDC_OPTION_PROBE_VERBOSE)
chp 814 dev/ic/wdc.c if ((chp->ch_drive[0].drive_flags & DRIVE_ATAPI) ||
chp 815 dev/ic/wdc.c (chp->ch_drive[1].drive_flags & DRIVE_ATAPI)) {
chp 827 dev/ic/wdc.c TAILQ_INIT(&chp->ch_queue->sc_xfer);
chp 830 dev/ic/wdc.c struct ata_drive_datas *drvp = &chp->ch_drive[i];
chp 832 dev/ic/wdc.c drvp->chnl_softc = chp;
chp 835 dev/ic/wdc.c if ((chp->wdc->cap &
chp 843 dev/ic/wdc.c if (i == 1 && ((chp->ch_drive[0].drive_flags & DRIVE) == 0))
chp 844 dev/ic/wdc.c chp->ch_flags |= WDCF_ONESLAVE;
chp 850 dev/ic/wdc.c if (ata_get_params(&chp->ch_drive[i], at_poll, &drvp->id) ==
chp 859 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname,
chp 860 dev/ic/wdc.c chp->channel, i), DEBUG_PROBE);
chp 863 dev/ic/wdc.c !wdc_preata_drive(chp, i))
chp 867 dev/ic/wdc.c ctrl_flags = chp->wdc->sc_dev.dv_cfdata->cf_flags;
chp 868 dev/ic/wdc.c channel_flags = (ctrl_flags >> (NBBY * chp->channel)) & 0xff;
chp 871 dev/ic/wdc.c chp->ch_drive[0].drive_flags, chp->ch_drive[1].drive_flags),
chp 875 dev/ic/wdc.c if ((chp->ch_drive[0].drive_flags & DRIVE) == 0 &&
chp 876 dev/ic/wdc.c (chp->ch_drive[1].drive_flags & DRIVE) == 0)
chp 880 dev/ic/wdc.c if ((chp->ch_drive[i].drive_flags & DRIVE) == 0) {
chp 884 dev/ic/wdc.c if (chp->ch_drive[i].drive_flags & DRIVE_ATAPI)
chp 888 dev/ic/wdc.c aa_link.aa_channel = chp->channel;
chp 890 dev/ic/wdc.c aa_link.aa_drv_data = &chp->ch_drive[i];
chp 891 dev/ic/wdc.c config_found(&chp->wdc->sc_dev, (void *)&aa_link, wdprint);
chp 899 dev/ic/wdc.c if (chp->ch_drive[i].drive_name[0] == 0)
chp 900 dev/ic/wdc.c chp->ch_drive[i].drive_flags = 0;
chp 904 dev/ic/wdc.c wdc_delref(chp);
chp 920 dev/ic/wdc.c wdcstart(chp)
chp 921 dev/ic/wdc.c struct channel_softc *chp;
chp 928 dev/ic/wdc.c if ((xfer = TAILQ_FIRST(&chp->ch_queue->sc_xfer)) == NULL) {
chp 933 dev/ic/wdc.c chp = xfer->chp;
chp 935 dev/ic/wdc.c if ((chp->ch_flags & WDCF_ACTIVE) != 0 ) {
chp 939 dev/ic/wdc.c if ((chp->ch_flags & WDCF_IRQ_WAIT) != 0)
chp 942 dev/ic/wdc.c if (chp->wdc->cap & WDC_CAPABILITY_HWLOCK)
chp 943 dev/ic/wdc.c if (!(chp->wdc->claim_hw)(chp, 0))
chp 947 dev/ic/wdc.c chp->channel, xfer->drive), DEBUG_XFERS);
chp 948 dev/ic/wdc.c chp->ch_flags |= WDCF_ACTIVE;
chp 949 dev/ic/wdc.c if (chp->ch_drive[xfer->drive].drive_flags & DRIVE_RESET) {
chp 950 dev/ic/wdc.c chp->ch_drive[xfer->drive].drive_flags &= ~DRIVE_RESET;
chp 951 dev/ic/wdc.c chp->ch_drive[xfer->drive].state = 0;
chp 953 dev/ic/wdc.c xfer->c_start(chp, xfer);
chp 957 dev/ic/wdc.c wdcdetach(chp, flags)
chp 958 dev/ic/wdc.c struct channel_softc *chp;
chp 964 dev/ic/wdc.c wdc_kill_pending(chp);
chp 966 dev/ic/wdc.c rv = config_detach_children((struct device *)chp->wdc, flags);
chp 982 dev/ic/wdc.c struct channel_softc *chp = arg;
chp 986 dev/ic/wdc.c if ((chp->ch_flags & WDCF_IRQ_WAIT) == 0) {
chp 988 dev/ic/wdc.c if (chp->_vtbl == 0) {
chp 989 dev/ic/wdc.c bus_space_read_1(chp->cmd_iot, chp->cmd_ioh,
chp 992 dev/ic/wdc.c CHP_READ_REG(chp, wdr_status);
chp 1000 dev/ic/wdc.c xfer = TAILQ_FIRST(&chp->ch_queue->sc_xfer);
chp 1001 dev/ic/wdc.c if (chp->ch_flags & WDCF_DMA_WAIT) {
chp 1002 dev/ic/wdc.c chp->wdc->dma_status =
chp 1003 dev/ic/wdc.c (*chp->wdc->dma_finish)(chp->wdc->dma_arg, chp->channel,
chp 1005 dev/ic/wdc.c if (chp->wdc->dma_status & WDC_DMAST_NOIRQ) {
chp 1009 dev/ic/wdc.c chp->ch_flags &= ~WDCF_DMA_WAIT;
chp 1011 dev/ic/wdc.c chp->ch_flags &= ~WDCF_IRQ_WAIT;
chp 1012 dev/ic/wdc.c ret = xfer->c_intr(chp, xfer, 1);
chp 1014 dev/ic/wdc.c chp->ch_flags |= WDCF_IRQ_WAIT;
chp 1022 dev/ic/wdc.c struct channel_softc *chp = drvp->chnl_softc;
chp 1025 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive),
chp 1027 dev/ic/wdc.c (void) wdcreset(chp, VERBOSE);
chp 1029 dev/ic/wdc.c chp->ch_drive[drive].state = 0;
chp 1034 dev/ic/wdc.c wdcreset(chp, verb)
chp 1035 dev/ic/wdc.c struct channel_softc *chp;
chp 1040 dev/ic/wdc.c if (!chp->_vtbl)
chp 1041 dev/ic/wdc.c chp->_vtbl = &wdc_default_vtbl;
chp 1043 dev/ic/wdc.c chp->wdc->reset(chp);
chp 1045 dev/ic/wdc.c drv_mask1 = (chp->ch_drive[0].drive_flags & DRIVE) ? 0x01:0x00;
chp 1046 dev/ic/wdc.c drv_mask1 |= (chp->ch_drive[1].drive_flags & DRIVE) ? 0x02:0x00;
chp 1047 dev/ic/wdc.c drv_mask2 = __wdcwait_reset(chp, drv_mask1);
chp 1050 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel);
chp 1062 dev/ic/wdc.c wdc_do_reset(struct channel_softc *chp)
chp 1064 dev/ic/wdc.c wdc_set_drive(chp, 0);
chp 1066 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_ctlr, WDCTL_4BIT | WDCTL_RST);
chp 1068 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_ctlr, WDCTL_4BIT);
chp 1073 dev/ic/wdc.c __wdcwait_reset(chp, drv_mask)
chp 1074 dev/ic/wdc.c struct channel_softc *chp;
chp 1082 dev/ic/wdc.c wdc_set_drive(chp, 0);
chp 1084 dev/ic/wdc.c st0 = CHP_READ_REG(chp, wdr_status);
chp 1085 dev/ic/wdc.c er0 = CHP_READ_REG(chp, wdr_error);
chp 1086 dev/ic/wdc.c wdc_set_drive(chp, 1);
chp 1088 dev/ic/wdc.c st1 = CHP_READ_REG(chp, wdr_status);
chp 1089 dev/ic/wdc.c er1 = CHP_READ_REG(chp, wdr_error);
chp 1119 dev/ic/wdc.c chp->wdc ? chp->wdc->sc_dev.dv_xname : "wdcprobe", chp->channel,
chp 1131 dev/ic/wdc.c wdc_wait_for_status(chp, mask, bits, timeout)
chp 1132 dev/ic/wdc.c struct channel_softc *chp;
chp 1138 dev/ic/wdc.c WDCDEBUG_PRINT(("wdcwait %s:%d\n", chp->wdc ?chp->wdc->sc_dev.dv_xname
chp 1139 dev/ic/wdc.c :"none", chp->channel), DEBUG_STATUS);
chp 1140 dev/ic/wdc.c chp->ch_error = 0;
chp 1145 dev/ic/wdc.c chp->ch_status = status = CHP_READ_REG(chp, wdr_status);
chp 1146 dev/ic/wdc.c WDC_LOG_STATUS(chp, chp->ch_status);
chp 1148 dev/ic/wdc.c if (status == 0xff && (chp->ch_flags & WDCF_ONESLAVE)) {
chp 1149 dev/ic/wdc.c wdc_set_drive(chp, 1);
chp 1150 dev/ic/wdc.c chp->ch_status = status =
chp 1151 dev/ic/wdc.c CHP_READ_REG(chp, wdr_status);
chp 1152 dev/ic/wdc.c WDC_LOG_STATUS(chp, chp->ch_status);
chp 1159 dev/ic/wdc.c CHP_READ_REG(chp, wdr_error)),
chp 1166 dev/ic/wdc.c chp->ch_error = CHP_READ_REG(chp, wdr_error);
chp 1167 dev/ic/wdc.c WDC_LOG_ERROR(chp, chp->ch_error);
chp 1169 dev/ic/wdc.c WDCDEBUG_PRINT(("wdcwait: error %x\n", chp->ch_error),
chp 1176 dev/ic/wdc.c struct wdc_xfer *xfer = TAILQ_FIRST(&chp->ch_queue->sc_xfer);
chp 1179 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel,
chp 1183 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel,
chp 1195 dev/ic/wdc.c wdc_dmawait(chp, xfer, timeout)
chp 1196 dev/ic/wdc.c struct channel_softc *chp;
chp 1202 dev/ic/wdc.c chp->wdc->dma_status =
chp 1203 dev/ic/wdc.c (*chp->wdc->dma_finish)(chp->wdc->dma_arg,
chp 1204 dev/ic/wdc.c chp->channel, xfer->drive, 0);
chp 1205 dev/ic/wdc.c if ((chp->wdc->dma_status & WDC_DMAST_NOIRQ) == 0)
chp 1210 dev/ic/wdc.c chp->wdc->dma_status = (*chp->wdc->dma_finish)(chp->wdc->dma_arg,
chp 1211 dev/ic/wdc.c chp->channel, xfer->drive, 1);
chp 1219 dev/ic/wdc.c struct channel_softc *chp = (struct channel_softc *)arg;
chp 1226 dev/ic/wdc.c xfer = TAILQ_FIRST(&chp->ch_queue->sc_xfer);
chp 1230 dev/ic/wdc.c !timeout_triggered(&chp->ch_timo)) {
chp 1234 dev/ic/wdc.c if ((chp->ch_flags & WDCF_IRQ_WAIT) != 0) {
chp 1235 dev/ic/wdc.c __wdcerror(chp, "timeout");
chp 1240 dev/ic/wdc.c if (chp->ch_flags & WDCF_DMA_WAIT) {
chp 1241 dev/ic/wdc.c chp->wdc->dma_status =
chp 1242 dev/ic/wdc.c (*chp->wdc->dma_finish)(chp->wdc->dma_arg,
chp 1243 dev/ic/wdc.c chp->channel, xfer->drive, 1);
chp 1244 dev/ic/wdc.c chp->ch_flags &= ~WDCF_DMA_WAIT;
chp 1252 dev/ic/wdc.c chp->ch_flags &= ~WDCF_IRQ_WAIT;
chp 1253 dev/ic/wdc.c xfer->c_intr(chp, xfer, 1);
chp 1255 dev/ic/wdc.c __wdcerror(chp, "missing untimeout");
chp 1269 dev/ic/wdc.c struct channel_softc *chp = drvp->chnl_softc;
chp 1270 dev/ic/wdc.c struct wdc_softc *wdc = chp->wdc;
chp 1513 dev/ic/wdc.c struct channel_softc *chp = drvp->chnl_softc;
chp 1520 dev/ic/wdc.c CHP_WRITE_RAW_MULTI_4(chp,
chp 1530 dev/ic/wdc.c CHP_WRITE_RAW_MULTI_2(chp,
chp 1541 dev/ic/wdc.c struct channel_softc *chp = drvp->chnl_softc;
chp 1548 dev/ic/wdc.c CHP_READ_RAW_MULTI_4(chp,
chp 1558 dev/ic/wdc.c CHP_READ_RAW_MULTI_2(chp,
chp 1592 dev/ic/wdc.c wdc_print_current_modes(chp)
chp 1593 dev/ic/wdc.c struct channel_softc *chp;
chp 1599 dev/ic/wdc.c drvp = &chp->ch_drive[drive];
chp 1605 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, drive);
chp 1607 dev/ic/wdc.c if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0 &&
chp 1628 dev/ic/wdc.c struct channel_softc *chp = drvp->chnl_softc;
chp 1629 dev/ic/wdc.c struct wdc_softc *wdc = chp->wdc;
chp 1673 dev/ic/wdc.c wdc->set_modes(chp);
chp 1684 dev/ic/wdc.c struct channel_softc *chp = drvp->chnl_softc;
chp 1689 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive),
chp 1710 dev/ic/wdc.c wdc_exec_xfer(chp, xfer);
chp 1736 dev/ic/wdc.c __wdccommand_start(chp, xfer)
chp 1737 dev/ic/wdc.c struct channel_softc *chp;
chp 1744 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive),
chp 1751 dev/ic/wdc.c wdc_disable_intr(chp);
chp 1754 dev/ic/wdc.c wdc_set_drive(chp, drive);
chp 1762 dev/ic/wdc.c if (wdcwait(chp, wdc_c->r_st_bmask | WDCS_DRQ,
chp 1769 dev/ic/wdc.c wdccommand(chp, drive, wdc_c->r_command, wdc_c->r_cyl, wdc_c->r_head,
chp 1775 dev/ic/wdc.c if (wait_for_unbusy(chp, wdc_c->timeout) != 0)
chp 1778 dev/ic/wdc.c if ((chp->ch_status & (WDCS_DRQ | WDCS_ERR)) == WDCS_ERR) {
chp 1779 dev/ic/wdc.c __wdccommand_done(chp, xfer);
chp 1783 dev/ic/wdc.c if (wait_for_drq(chp, wdc_c->timeout) != 0)
chp 1786 dev/ic/wdc.c wdc_output_bytes(&chp->ch_drive[drive],
chp 1791 dev/ic/wdc.c chp->ch_flags |= WDCF_IRQ_WAIT; /* wait for interrupt */
chp 1792 dev/ic/wdc.c timeout_add(&chp->ch_timo, wdc_c->timeout / 1000 * hz);
chp 1801 dev/ic/wdc.c __wdccommand_intr(chp, xfer, 0);
chp 1806 dev/ic/wdc.c __wdccommand_done(chp, xfer);
chp 1810 dev/ic/wdc.c __wdccommand_intr(chp, xfer, irq)
chp 1811 dev/ic/wdc.c struct channel_softc *chp;
chp 1815 dev/ic/wdc.c struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
chp 1821 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), DEBUG_INTR);
chp 1822 dev/ic/wdc.c if (wdcwait(chp, wdc_c->r_st_pmask, wdc_c->r_st_pmask,
chp 1829 dev/ic/wdc.c if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
chp 1830 dev/ic/wdc.c chp->wdc->irqack(chp);
chp 1832 dev/ic/wdc.c if ((chp->ch_status & WDCS_DRQ) == 0) {
chp 1840 dev/ic/wdc.c __wdccommand_done(chp, xfer);
chp 1846 dev/ic/wdc.c __wdccommand_done(chp, xfer)
chp 1847 dev/ic/wdc.c struct channel_softc *chp;
chp 1853 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
chp 1854 dev/ic/wdc.c chp->ch_status), DEBUG_FUNCS);
chp 1855 dev/ic/wdc.c if (chp->ch_status & WDCS_DWF)
chp 1857 dev/ic/wdc.c if (chp->ch_status & WDCS_ERR) {
chp 1859 dev/ic/wdc.c wdc_c->r_error = chp->ch_error;
chp 1864 dev/ic/wdc.c wdc_c->r_head = CHP_READ_REG(chp, wdr_sdh);
chp 1865 dev/ic/wdc.c wdc_c->r_cyl = CHP_READ_REG(chp, wdr_cyl_hi) << 8;
chp 1866 dev/ic/wdc.c wdc_c->r_cyl |= CHP_READ_REG(chp, wdr_cyl_lo);
chp 1867 dev/ic/wdc.c wdc_c->r_sector = CHP_READ_REG(chp, wdr_sector);
chp 1868 dev/ic/wdc.c wdc_c->r_count = CHP_READ_REG(chp, wdr_seccnt);
chp 1869 dev/ic/wdc.c wdc_c->r_error = CHP_READ_REG(chp, wdr_error);
chp 1876 dev/ic/wdc.c wdc_enable_intr(chp);
chp 1879 dev/ic/wdc.c wdc_free_xfer(chp, xfer);
chp 1887 dev/ic/wdc.c wdcstart(chp);
chp 1896 dev/ic/wdc.c wdccommand(chp, drive, command, cylin, head, sector, count, precomp)
chp 1897 dev/ic/wdc.c struct channel_softc *chp;
chp 1904 dev/ic/wdc.c "sector=%d count=%d precomp=%d\n", chp->wdc->sc_dev.dv_xname,
chp 1905 dev/ic/wdc.c chp->channel, drive, command, cylin, head, sector, count, precomp),
chp 1907 dev/ic/wdc.c WDC_LOG_ATA_CMDLONG(chp, head, precomp, cylin, cylin >> 8, sector,
chp 1911 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_sdh, WDSD_IBM | (drive << 4) | head);
chp 1914 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_precomp, precomp);
chp 1915 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_cyl_lo, cylin);
chp 1916 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_cyl_hi, cylin >> 8);
chp 1917 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_sector, sector);
chp 1918 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_seccnt, count);
chp 1921 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_command, command);
chp 1929 dev/ic/wdc.c wdccommandext(chp, drive, command, blkno, count)
chp 1930 dev/ic/wdc.c struct channel_softc *chp;
chp 1937 dev/ic/wdc.c "count=%d\n", chp->wdc->sc_dev.dv_xname,
chp 1938 dev/ic/wdc.c chp->channel, drive, command, blkno, count),
chp 1940 dev/ic/wdc.c WDC_LOG_ATA_CMDEXT(chp, blkno >> 40, blkno >> 16, blkno >> 32,
chp 1944 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_sdh, (drive << 4) | WDSD_LBA);
chp 1947 dev/ic/wdc.c CHP_LBA48_WRITE_REG(chp, wdr_lba_hi,
chp 1949 dev/ic/wdc.c CHP_LBA48_WRITE_REG(chp, wdr_lba_mi,
chp 1951 dev/ic/wdc.c CHP_LBA48_WRITE_REG(chp, wdr_lba_lo,
chp 1953 dev/ic/wdc.c CHP_LBA48_WRITE_REG(chp, wdr_seccnt, count);
chp 1956 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_command, command);
chp 1964 dev/ic/wdc.c wdccommandshort(chp, drive, command)
chp 1965 dev/ic/wdc.c struct channel_softc *chp;
chp 1971 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname, chp->channel, drive, command),
chp 1973 dev/ic/wdc.c WDC_LOG_ATA_CMDSHORT(chp, command);
chp 1976 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_sdh, WDSD_IBM | (drive << 4));
chp 1977 dev/ic/wdc.c CHP_WRITE_REG(chp, wdr_command, command);
chp 1983 dev/ic/wdc.c wdc_exec_xfer(chp, xfer)
chp 1984 dev/ic/wdc.c struct channel_softc *chp;
chp 1988 dev/ic/wdc.c xfer, xfer->c_flags, chp->channel, xfer->drive), DEBUG_XFERS);
chp 1991 dev/ic/wdc.c xfer->chp = chp;
chp 1999 dev/ic/wdc.c !TAILQ_EMPTY(&chp->ch_queue->sc_xfer)) {
chp 2000 dev/ic/wdc.c TAILQ_INIT(&chp->ch_queue->sc_xfer);
chp 2003 dev/ic/wdc.c TAILQ_INSERT_TAIL(&chp->ch_queue->sc_xfer,xfer , c_xferchain);
chp 2005 dev/ic/wdc.c chp->ch_flags), DEBUG_XFERS);
chp 2006 dev/ic/wdc.c wdcstart(chp);
chp 2026 dev/ic/wdc.c wdc_free_xfer(chp, xfer)
chp 2027 dev/ic/wdc.c struct channel_softc *chp;
chp 2030 dev/ic/wdc.c struct wdc_softc *wdc = chp->wdc;
chp 2034 dev/ic/wdc.c (*wdc->free_hw)(chp);
chp 2036 dev/ic/wdc.c chp->ch_flags &= ~WDCF_ACTIVE;
chp 2037 dev/ic/wdc.c TAILQ_REMOVE(&chp->ch_queue->sc_xfer, xfer, c_xferchain);
chp 2049 dev/ic/wdc.c wdc_kill_pending(chp)
chp 2050 dev/ic/wdc.c struct channel_softc *chp;
chp 2054 dev/ic/wdc.c while ((xfer = TAILQ_FIRST(&chp->ch_queue->sc_xfer)) != NULL) {
chp 2055 dev/ic/wdc.c chp = xfer->chp;
chp 2056 dev/ic/wdc.c (*xfer->c_kill_xfer)(chp, xfer);
chp 2061 dev/ic/wdc.c __wdcerror(chp, msg)
chp 2062 dev/ic/wdc.c struct channel_softc *chp;
chp 2065 dev/ic/wdc.c struct wdc_xfer *xfer = TAILQ_FIRST(&chp->ch_queue->sc_xfer);
chp 2067 dev/ic/wdc.c printf("%s:%d: %s\n", chp->wdc->sc_dev.dv_xname, chp->channel,
chp 2071 dev/ic/wdc.c chp->ch_drive[xfer->drive].drive_name,
chp 2072 dev/ic/wdc.c chp->wdc->sc_dev.dv_xname,
chp 2073 dev/ic/wdc.c chp->channel, xfer->drive, msg);
chp 2080 dev/ic/wdc.c wdcbit_bucket(chp, size)
chp 2081 dev/ic/wdc.c struct channel_softc *chp;
chp 2084 dev/ic/wdc.c CHP_READ_RAW_MULTI_2(chp, NULL, size);
chp 47 dev/ic/wdcevent.h void wdc_log(struct channel_softc *chp, enum wdcevent_type type,
chp 50 dev/ic/wdcevent.h static __inline void WDC_LOG_STATUS(struct channel_softc *chp,
chp 52 dev/ic/wdcevent.h if (chp->ch_prev_log_status == status)
chp 55 dev/ic/wdcevent.h chp->ch_prev_log_status = status;
chp 56 dev/ic/wdcevent.h wdc_log(chp, WDCEVENT_STATUS, 1, &status);
chp 59 dev/ic/wdcevent.h static __inline void WDC_LOG_ERROR(struct channel_softc *chp,
chp 61 dev/ic/wdcevent.h wdc_log(chp, WDCEVENT_ERROR, 1, &error);
chp 64 dev/ic/wdcevent.h static __inline void WDC_LOG_ATAPI_CMD(struct channel_softc *chp, int drive,
chp 72 dev/ic/wdcevent.h wdc_log(chp, WDCEVENT_ATAPI_CMD, len + 2, record);
chp 75 dev/ic/wdcevent.h static __inline void WDC_LOG_ATAPI_DONE(struct channel_softc *chp, int drive,
chp 78 dev/ic/wdcevent.h wdc_log(chp, WDCEVENT_ATAPI_DONE, 3, record);
chp 81 dev/ic/wdcevent.h static __inline void WDC_LOG_ATA_CMDSHORT(struct channel_softc *chp, u_int8_t cmd) {
chp 82 dev/ic/wdcevent.h wdc_log(chp, WDCEVENT_ATA_SHORT, 1, &cmd);
chp 85 dev/ic/wdcevent.h static __inline void WDC_LOG_ATA_CMDLONG(struct channel_softc *chp,
chp 91 dev/ic/wdcevent.h wdc_log(chp, WDCEVENT_ATA_LONG, 7, record);
chp 94 dev/ic/wdcevent.h static __inline void WDC_LOG_SET_DRIVE(struct channel_softc *chp,
chp 96 dev/ic/wdcevent.h wdc_log(chp, drive ? WDCEVENT_SET_DRIVE1 : WDCEVENT_SET_DRIVE0,
chp 100 dev/ic/wdcevent.h static __inline void WDC_LOG_REG(struct channel_softc *chp,
chp 108 dev/ic/wdcevent.h wdc_log(chp, WDCEVENT_REG, 3, record);
chp 111 dev/ic/wdcevent.h static __inline void WDC_LOG_ATA_CMDEXT(struct channel_softc *chp,
chp 118 dev/ic/wdcevent.h wdc_log(chp, WDCEVENT_ATA_EXT, 9, record);
chp 139 dev/ic/wdcvar.h #define CHP_READ_REG(chp, a) ((chp)->_vtbl->read_reg)(chp, a)
chp 140 dev/ic/wdcvar.h #define CHP_WRITE_REG(chp, a, b) ((chp)->_vtbl->write_reg)(chp, a, b)
chp 141 dev/ic/wdcvar.h #define CHP_LBA48_WRITE_REG(chp, a, b) \
chp 142 dev/ic/wdcvar.h ((chp)->_vtbl->lba48_write_reg)(chp, a, b)
chp 144 dev/ic/wdcvar.h #define CHP_READ_RAW_MULTI_2(chp, a, b) \
chp 145 dev/ic/wdcvar.h ((chp)->_vtbl->read_raw_multi_2)(chp, a, b)
chp 146 dev/ic/wdcvar.h #define CHP_WRITE_RAW_MULTI_2(chp, a, b) \
chp 147 dev/ic/wdcvar.h ((chp)->_vtbl->write_raw_multi_2)(chp, a, b)
chp 148 dev/ic/wdcvar.h #define CHP_READ_RAW_MULTI_4(chp, a, b) \
chp 149 dev/ic/wdcvar.h ((chp)->_vtbl->read_raw_multi_4)(chp, a, b)
chp 150 dev/ic/wdcvar.h #define CHP_WRITE_RAW_MULTI_4(chp, a, b) \
chp 151 dev/ic/wdcvar.h ((chp)->_vtbl->write_raw_multi_4)(chp, a, b)
chp 236 dev/ic/wdcvar.h struct channel_softc *chp;
chp 300 dev/ic/wdcvar.h #define wdcwait(chp, status, mask, timeout) ((wdc_wait_for_status((chp), (status), (mask), (timeout)) >= 0) ? 0 : -1)
chp 301 dev/ic/wdcvar.h #define wait_for_drq(chp, timeout) wdcwait((chp), WDCS_DRQ, WDCS_DRQ, (timeout))
chp 302 dev/ic/wdcvar.h #define wait_for_unbusy(chp, timeout) wdcwait((chp), 0, 0, (timeout))
chp 303 dev/ic/wdcvar.h #define wait_for_ready(chp, timeout) wdcwait((chp), WDCS_DRDY, \
chp 1825 dev/pci/pciide.c pciide_irqack(struct channel_softc *chp)
chp 1827 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 1829 dev/pci/pciide.c int chan = chp->channel;
chp 2141 dev/pci/pciide.c sata_setup_channel(struct channel_softc *chp)
chp 2146 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 2155 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 2175 dev/pci/pciide.c PCIIDE_DMACTL_WRITE(sc, chp->channel, idedma_ctl);
chp 2450 dev/pci/pciide.c piix_setup_channel(struct channel_softc *chp)
chp 2454 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 2459 dev/pci/pciide.c idetim = PIIX_IDETIM_CLEAR(oidetim, 0xffff, chp->channel);
chp 2464 dev/pci/pciide.c chp->channel);
chp 2524 dev/pci/pciide.c mode[drive], 1, chp->channel);
chp 2531 dev/pci/pciide.c mode[0], 0, chp->channel);
chp 2534 dev/pci/pciide.c mode[1], 0, chp->channel);
chp 2550 dev/pci/pciide.c IDEDMA_CTL(chp->channel),
chp 2558 dev/pci/pciide.c piix3_4_setup_channel(struct channel_softc *chp)
chp 2562 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 2565 dev/pci/pciide.c int channel = chp->channel;
chp 2588 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 2656 dev/pci/pciide.c if ((chp->wdc->cap & WDC_CAPABILITY_UDMA) &&
chp 2726 dev/pci/pciide.c struct channel_softc *chp = drvp->chnl_softc;
chp 2727 dev/pci/pciide.c u_int8_t channel = chp->channel;
chp 2860 dev/pci/pciide.c amd756_setup_channel(struct channel_softc *chp)
chp 2866 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 2877 dev/pci/pciide.c datatim_reg &= ~AMD756_DATATIM_MASK(chp->channel);
chp 2878 dev/pci/pciide.c udmatim_reg &= ~AMD756_UDMA_MASK(chp->channel);
chp 2886 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 2896 dev/pci/pciide.c if ((chp->wdc->cap & WDC_CAPABILITY_UDMA) &&
chp 2902 dev/pci/pciide.c if ((chanenable & AMD756_CABLE(chp->channel,
chp 2907 dev/pci/pciide.c chp->channel, drive), DEBUG_PROBE);
chp 2911 dev/pci/pciide.c udmatim_reg |= AMD756_UDMA_EN(chp->channel, drive) |
chp 2912 dev/pci/pciide.c AMD756_UDMA_EN_MTH(chp->channel, drive) |
chp 2913 dev/pci/pciide.c AMD756_UDMA_TIME(chp->channel, drive,
chp 2931 dev/pci/pciide.c chp->channel, drive);
chp 2955 dev/pci/pciide.c AMD756_DATATIM_PULSE(chp->channel, drive,
chp 2957 dev/pci/pciide.c AMD756_DATATIM_RECOV(chp->channel, drive,
chp 2963 dev/pci/pciide.c IDEDMA_CTL(chp->channel),
chp 3127 dev/pci/pciide.c apollo_setup_channel(struct channel_softc *chp)
chp 3133 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 3139 dev/pci/pciide.c datatim_reg &= ~APO_DATATIM_MASK(chp->channel);
chp 3140 dev/pci/pciide.c udmatim_reg &= ~APO_UDMA_MASK(chp->channel);
chp 3149 dev/pci/pciide.c if ((chp->ch_drive[0].drive_flags & DRIVE_UDMA) &&
chp 3150 dev/pci/pciide.c (chp->ch_drive[1].drive_flags & DRIVE_UDMA)) {
chp 3152 dev/pci/pciide.c if (chp->ch_drive[0].UDMA_mode > 2 &&
chp 3153 dev/pci/pciide.c chp->ch_drive[1].UDMA_mode <= 2) {
chp 3155 dev/pci/pciide.c chp->ch_drive[0].UDMA_mode = 2;
chp 3156 dev/pci/pciide.c } else if (chp->ch_drive[1].UDMA_mode > 2 &&
chp 3157 dev/pci/pciide.c chp->ch_drive[0].UDMA_mode <= 2) {
chp 3159 dev/pci/pciide.c chp->ch_drive[1].UDMA_mode = 2;
chp 3164 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 3174 dev/pci/pciide.c if ((chp->wdc->cap & WDC_CAPABILITY_UDMA) &&
chp 3178 dev/pci/pciide.c udmatim_reg |= APO_UDMA_EN(chp->channel, drive) |
chp 3179 dev/pci/pciide.c APO_UDMA_EN_MTH(chp->channel, drive);
chp 3181 dev/pci/pciide.c udmatim_reg |= APO_UDMA_TIME(chp->channel,
chp 3185 dev/pci/pciide.c udmatim_reg |= APO_UDMA_TIME(chp->channel,
chp 3189 dev/pci/pciide.c udmatim_reg |= APO_UDMA_CLK66(chp->channel);
chp 3190 dev/pci/pciide.c udmatim_reg |= APO_UDMA_TIME(chp->channel,
chp 3194 dev/pci/pciide.c udmatim_reg |= APO_UDMA_TIME(chp->channel,
chp 3220 dev/pci/pciide.c APO_DATATIM_PULSE(chp->channel, drive,
chp 3222 dev/pci/pciide.c APO_DATATIM_RECOV(chp->channel, drive,
chp 3228 dev/pci/pciide.c IDEDMA_CTL(chp->channel),
chp 3472 dev/pci/pciide.c cmd0643_9_setup_channel(struct channel_softc *chp)
chp 3478 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 3486 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 3497 dev/pci/pciide.c sc->sc_tag, CMD_UDMATIM(chp->channel));
chp 3501 dev/pci/pciide.c CMD_BICSR_80(chp->channel)) == 0) {
chp 3506 dev/pci/pciide.c chp->channel, drive), DEBUG_PROBE);
chp 3520 dev/pci/pciide.c CMD_UDMATIM(chp->channel), udma_reg);
chp 3531 dev/pci/pciide.c CMD_UDMATIM(chp->channel));
chp 3534 dev/pci/pciide.c CMD_UDMATIM(chp->channel),
chp 3546 dev/pci/pciide.c CMD_DATA_TIM(chp->channel, drive), tim);
chp 3551 dev/pci/pciide.c IDEDMA_CTL(chp->channel),
chp 3563 dev/pci/pciide.c wdcreset(chp, SILENT);
chp 3568 dev/pci/pciide.c cmd646_9_irqack(struct channel_softc *chp)
chp 3571 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 3574 dev/pci/pciide.c if (chp->channel == 0) {
chp 3581 dev/pci/pciide.c pciide_irqack(chp);
chp 3675 dev/pci/pciide.c cmd680_setup_channel(struct channel_softc *chp)
chp 3682 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 3697 dev/pci/pciide.c mode = pciide_pci_read(pc, pa, 0x80 + chp->channel * 4);
chp 3700 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 3707 dev/pci/pciide.c off = 0xa0 + chp->channel * 16;
chp 3719 dev/pci/pciide.c off = 0xac + chp->channel * 16 + drive * 2;
chp 3729 dev/pci/pciide.c off = 0xa8 + chp->channel * 16 + drive * 2;
chp 3736 dev/pci/pciide.c off = 0xa4 + chp->channel * 16 + drive * 2;
chp 3743 dev/pci/pciide.c pciide_pci_write(pc, pa, 0x80 + chp->channel * 4, mode);
chp 3747 dev/pci/pciide.c IDEDMA_CTL(chp->channel),
chp 3895 dev/pci/pciide.c sii3112_setup_channel(struct channel_softc *chp)
chp 3900 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 3910 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 3934 dev/pci/pciide.c PCIIDE_DMACTL_WRITE(sc, chp->channel, idedma_ctl);
chp 3936 dev/pci/pciide.c BA5_WRITE_4(sc, chp->channel, ba5_IDE_DTM, dtm);
chp 3941 dev/pci/pciide.c sii3112_drv_probe(struct channel_softc *chp)
chp 3943 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 3951 dev/pci/pciide.c chp->ch_drive[i].chnl_softc = chp;
chp 3952 dev/pci/pciide.c chp->ch_drive[i].drive = i;
chp 3974 dev/pci/pciide.c BA5_WRITE_4(sc, chp->channel, ba5_SControl, scontrol);
chp 3977 dev/pci/pciide.c BA5_WRITE_4(sc, chp->channel, ba5_SControl, scontrol);
chp 3980 dev/pci/pciide.c sstatus = BA5_READ_4(sc, chp->channel, ba5_SStatus);
chp 3983 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel, sstatus,
chp 3984 dev/pci/pciide.c BA5_READ_4(sc, chp->channel, ba5_SControl));
chp 3994 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
chp 3999 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
chp 4009 dev/pci/pciide.c if (chp->_vtbl != NULL)
chp 4010 dev/pci/pciide.c CHP_WRITE_REG(chp, wdr_sdh, WDSD_IBM | (0 << 4));
chp 4012 dev/pci/pciide.c bus_space_write_1(chp->cmd_iot, chp->cmd_ioh,
chp 4016 dev/pci/pciide.c if (chp->_vtbl != NULL) {
chp 4017 dev/pci/pciide.c scnt = CHP_READ_REG(chp, wdr_seccnt);
chp 4018 dev/pci/pciide.c sn = CHP_READ_REG(chp, wdr_sector);
chp 4019 dev/pci/pciide.c cl = CHP_READ_REG(chp, wdr_cyl_lo);
chp 4020 dev/pci/pciide.c ch = CHP_READ_REG(chp, wdr_cyl_hi);
chp 4022 dev/pci/pciide.c scnt = bus_space_read_1(chp->cmd_iot,
chp 4023 dev/pci/pciide.c chp->cmd_ioh, wdr_seccnt & _WDC_REGMASK);
chp 4024 dev/pci/pciide.c sn = bus_space_read_1(chp->cmd_iot,
chp 4025 dev/pci/pciide.c chp->cmd_ioh, wdr_sector & _WDC_REGMASK);
chp 4026 dev/pci/pciide.c cl = bus_space_read_1(chp->cmd_iot,
chp 4027 dev/pci/pciide.c chp->cmd_ioh, wdr_cyl_lo & _WDC_REGMASK);
chp 4028 dev/pci/pciide.c ch = bus_space_read_1(chp->cmd_iot,
chp 4029 dev/pci/pciide.c chp->cmd_ioh, wdr_cyl_hi & _WDC_REGMASK);
chp 4033 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel,
chp 4042 dev/pci/pciide.c chp->ch_drive[0].drive_flags |= DRIVE_ATAPI;
chp 4044 dev/pci/pciide.c chp->ch_drive[0].drive_flags |= DRIVE_ATA;
chp 4048 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
chp 4062 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel, sstatus);
chp 4326 dev/pci/pciide.c sii3114_read_reg(struct channel_softc *chp, enum wdc_regs reg)
chp 4328 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 4333 dev/pci/pciide.c return (bus_space_read_1(sl->regs[chp->channel].ctl_iot,
chp 4334 dev/pci/pciide.c sl->regs[chp->channel].ctl_ioh, reg & _WDC_REGMASK));
chp 4336 dev/pci/pciide.c return (bus_space_read_1(sl->regs[chp->channel].cmd_iot,
chp 4337 dev/pci/pciide.c sl->regs[chp->channel].cmd_iohs[reg & _WDC_REGMASK], 0));
chp 4341 dev/pci/pciide.c sii3114_write_reg(struct channel_softc *chp, enum wdc_regs reg, u_int8_t val)
chp 4343 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 4348 dev/pci/pciide.c bus_space_write_1(sl->regs[chp->channel].ctl_iot,
chp 4349 dev/pci/pciide.c sl->regs[chp->channel].ctl_ioh, reg & _WDC_REGMASK, val);
chp 4351 dev/pci/pciide.c bus_space_write_1(sl->regs[chp->channel].cmd_iot,
chp 4352 dev/pci/pciide.c sl->regs[chp->channel].cmd_iohs[reg & _WDC_REGMASK],
chp 4504 dev/pci/pciide.c cy693_setup_channel(struct channel_softc *chp)
chp 4510 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 4521 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 4542 dev/pci/pciide.c chp->ch_drive[0].DMA_mode = dma_mode;
chp 4543 dev/pci/pciide.c chp->ch_drive[1].DMA_mode = dma_mode;
chp 4560 dev/pci/pciide.c IDEDMA_CTL(chp->channel), idedma_ctl);
chp 4806 dev/pci/pciide.c sis96x_setup_channel(struct channel_softc *chp)
chp 4813 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 4824 dev/pci/pciide.c chp->channel, drive);
chp 4825 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 4834 dev/pci/pciide.c SIS96x_REG_CBL(chp->channel)) & SIS96x_REG_CBL_33) {
chp 4859 dev/pci/pciide.c chp->channel, drive, sis_tim, regtim), DEBUG_PROBE);
chp 4865 dev/pci/pciide.c IDEDMA_CTL(chp->channel), idedma_ctl);
chp 4871 dev/pci/pciide.c sis_setup_channel(struct channel_softc *chp)
chp 4877 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 4882 dev/pci/pciide.c "channel %d 0x%x\n", chp->channel,
chp 4883 dev/pci/pciide.c pci_conf_read(sc->sc_pc, sc->sc_tag, SIS_TIM(chp->channel))),
chp 4891 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 4904 dev/pci/pciide.c SIS_REG_CBL) & SIS_REG_CBL_33(chp->channel)) {
chp 4965 dev/pci/pciide.c "channel %d 0x%x\n", chp->channel, sis_tim), DEBUG_PROBE);
chp 4966 dev/pci/pciide.c pci_conf_write(sc->sc_pc, sc->sc_tag, SIS_TIM(chp->channel), sis_tim);
chp 4970 dev/pci/pciide.c IDEDMA_CTL(chp->channel), idedma_ctl);
chp 5041 dev/pci/pciide.c natsemi_setup_channel(struct channel_softc *chp)
chp 5046 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 5054 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 5080 dev/pci/pciide.c NATSEMI_RTREG(chp->channel, drive), tim);
chp 5082 dev/pci/pciide.c NATSEMI_WTREG(chp->channel, drive), tim);
chp 5087 dev/pci/pciide.c IDEDMA_CTL(chp->channel), idedma_ctl);
chp 5093 dev/pci/pciide.c ~(NATSEMI_CHMASK(chp->channel)));
chp 5100 dev/pci/pciide.c IDEDMA_CTL(chp->channel),
chp 5102 dev/pci/pciide.c IDEDMA_CTL(chp->channel)));
chp 5106 dev/pci/pciide.c natsemi_irqack(struct channel_softc *chp)
chp 5108 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 5114 dev/pci/pciide.c IDEDMA_CMD(chp->channel));
chp 5116 dev/pci/pciide.c IDEDMA_CTL(chp->channel)) &
chp 5119 dev/pci/pciide.c IDEDMA_CMD(chp->channel), clr);
chp 5226 dev/pci/pciide.c ns_scx200_setup_channel(struct channel_softc *chp)
chp 5231 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel*)chp;
chp 5233 dev/pci/pciide.c int channel = chp->channel;
chp 5249 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 5263 dev/pci/pciide.c if ((chp->wdc->cap & WDC_CAPABILITY_UDMA) != 0 &&
chp 5270 dev/pci/pciide.c } else if ((chp->wdc->cap & WDC_CAPABILITY_DMA) != 0 &&
chp 5409 dev/pci/pciide.c acer_setup_channel(struct channel_softc *chp)
chp 5415 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 5425 dev/pci/pciide.c if ((chp->ch_drive[0].drive_flags | chp->ch_drive[1].drive_flags) &
chp 5428 dev/pci/pciide.c ACER_0x4A_80PIN(chp->channel)) {
chp 5430 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel),
chp 5432 dev/pci/pciide.c if (chp->ch_drive[0].UDMA_mode > 2)
chp 5433 dev/pci/pciide.c chp->ch_drive[0].UDMA_mode = 2;
chp 5434 dev/pci/pciide.c if (chp->ch_drive[1].UDMA_mode > 2)
chp 5435 dev/pci/pciide.c chp->ch_drive[1].UDMA_mode = 2;
chp 5440 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 5445 dev/pci/pciide.c "channel %d drive %d 0x%x\n", chp->channel, drive,
chp 5447 dev/pci/pciide.c ACER_IDETIM(chp->channel, drive))), DEBUG_PROBE);
chp 5449 dev/pci/pciide.c acer_fifo_udma &= ~(ACER_FTH_OPL(chp->channel, drive, 0x3) |
chp 5450 dev/pci/pciide.c ACER_UDMA_EN(chp->channel, drive) |
chp 5451 dev/pci/pciide.c ACER_UDMA_TIM(chp->channel, drive, 0x7));
chp 5457 dev/pci/pciide.c ACER_FTH_OPL(chp->channel, drive, 0x1);
chp 5461 dev/pci/pciide.c acer_fifo_udma |= ACER_FTH_OPL(chp->channel, drive, 0x2);
chp 5465 dev/pci/pciide.c acer_fifo_udma |= ACER_UDMA_EN(chp->channel, drive);
chp 5467 dev/pci/pciide.c ACER_UDMA_TIM(chp->channel, drive,
chp 5492 dev/pci/pciide.c ACER_IDETIM(chp->channel, drive),
chp 5501 dev/pci/pciide.c IDEDMA_CTL(chp->channel), idedma_ctl);
chp 5678 dev/pci/pciide.c hpt_setup_channel(struct channel_softc *chp)
chp 5685 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 5734 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 5739 dev/pci/pciide.c HPT_IDETIM(chp->channel, drive));
chp 5745 dev/pci/pciide.c if ((cable & HPT_CSEL_CBLID(chp->channel)) != 0 &&
chp 5750 dev/pci/pciide.c chp->channel, drive), DEBUG_PROBE);
chp 5772 dev/pci/pciide.c HPT_IDETIM(chp->channel, drive), after);
chp 5781 dev/pci/pciide.c IDEDMA_CTL(chp->channel), idedma_ctl);
chp 5846 dev/pci/pciide.c pdc268_config_read(struct channel_softc *chp, int index)
chp 5848 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 5850 dev/pci/pciide.c int channel = chp->channel;
chp 5860 dev/pci/pciide.c pdc268_config_write(struct channel_softc *chp, int index, u_int8_t value)
chp 5862 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 5864 dev/pci/pciide.c int channel = chp->channel;
chp 6031 dev/pci/pciide.c pdc202xx_setup_channel(struct channel_softc *chp)
chp 6037 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 6039 dev/pci/pciide.c int channel = chp->channel;
chp 6057 dev/pci/pciide.c ((chp->ch_drive[0].drive_flags & DRIVE_UDMA &&
chp 6058 dev/pci/pciide.c chp->ch_drive[0].UDMA_mode > 2) ||
chp 6059 dev/pci/pciide.c (chp->ch_drive[1].drive_flags & DRIVE_UDMA &&
chp 6060 dev/pci/pciide.c chp->ch_drive[1].UDMA_mode > 2))) {
chp 6064 dev/pci/pciide.c if (chp->ch_drive[0].UDMA_mode > 2)
chp 6065 dev/pci/pciide.c chp->ch_drive[0].UDMA_mode = 2;
chp 6066 dev/pci/pciide.c if (chp->ch_drive[1].UDMA_mode > 2)
chp 6067 dev/pci/pciide.c chp->ch_drive[1].UDMA_mode = 2;
chp 6070 dev/pci/pciide.c if ((chp->ch_drive[0].drive_flags & DRIVE_UDMA &&
chp 6071 dev/pci/pciide.c chp->ch_drive[0].UDMA_mode <= 2) ||
chp 6072 dev/pci/pciide.c (chp->ch_drive[1].drive_flags & DRIVE_UDMA &&
chp 6073 dev/pci/pciide.c chp->ch_drive[1].UDMA_mode <= 2)) {
chp 6074 dev/pci/pciide.c if (chp->ch_drive[0].UDMA_mode > 2)
chp 6075 dev/pci/pciide.c chp->ch_drive[0].UDMA_mode = 2;
chp 6076 dev/pci/pciide.c if (chp->ch_drive[1].UDMA_mode > 2)
chp 6077 dev/pci/pciide.c chp->ch_drive[1].UDMA_mode = 2;
chp 6080 dev/pci/pciide.c if ((chp->ch_drive[0].drive_flags & DRIVE_UDMA &&
chp 6081 dev/pci/pciide.c chp->ch_drive[0].UDMA_mode > 2) ||
chp 6082 dev/pci/pciide.c (chp->ch_drive[1].drive_flags & DRIVE_UDMA &&
chp 6083 dev/pci/pciide.c chp->ch_drive[1].UDMA_mode > 2))
chp 6093 dev/pci/pciide.c if (chp->ch_drive[0].drive_flags & DRIVE_ATAPI ||
chp 6094 dev/pci/pciide.c chp->ch_drive[1].drive_flags & DRIVE_ATAPI) {
chp 6095 dev/pci/pciide.c if (((chp->ch_drive[0].drive_flags & DRIVE_UDMA) &&
chp 6096 dev/pci/pciide.c !(chp->ch_drive[1].drive_flags & DRIVE_UDMA) &&
chp 6097 dev/pci/pciide.c (chp->ch_drive[1].drive_flags & DRIVE_DMA)) ||
chp 6098 dev/pci/pciide.c ((chp->ch_drive[1].drive_flags & DRIVE_UDMA) &&
chp 6099 dev/pci/pciide.c !(chp->ch_drive[0].drive_flags & DRIVE_UDMA) &&
chp 6100 dev/pci/pciide.c (chp->ch_drive[0].drive_flags & DRIVE_DMA)))
chp 6109 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 6147 dev/pci/pciide.c chp->channel, drive, mode), DEBUG_PROBE);
chp 6149 dev/pci/pciide.c PDC2xx_TIM(chp->channel, drive), mode);
chp 6160 dev/pci/pciide.c pdc20268_setup_channel(struct channel_softc *chp)
chp 6165 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 6167 dev/pci/pciide.c int channel = chp->channel;
chp 6170 dev/pci/pciide.c cable = pdc268_config_read(chp, 0x0b) & PDC268_CABLE;
chp 6178 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 6565 dev/pci/pciide.c pdc203xx_setup_channel(struct channel_softc *chp)
chp 6568 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 6574 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 6650 dev/pci/pciide.c pdc203xx_irqack(struct channel_softc *chp)
chp 6652 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 6655 dev/pci/pciide.c int chan = chp->channel;
chp 6713 dev/pci/pciide.c pdc203xx_read_reg(struct channel_softc *chp, enum wdc_regs reg)
chp 6715 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 6721 dev/pci/pciide.c return (bus_space_read_1(ps->regs[chp->channel].ctl_iot,
chp 6722 dev/pci/pciide.c ps->regs[chp->channel].ctl_ioh, reg & _WDC_REGMASK));
chp 6724 dev/pci/pciide.c val = bus_space_read_1(ps->regs[chp->channel].cmd_iot,
chp 6725 dev/pci/pciide.c ps->regs[chp->channel].cmd_iohs[reg & _WDC_REGMASK], 0);
chp 6731 dev/pci/pciide.c pdc203xx_write_reg(struct channel_softc *chp, enum wdc_regs reg, u_int8_t val)
chp 6733 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 6738 dev/pci/pciide.c bus_space_write_1(ps->regs[chp->channel].ctl_iot,
chp 6739 dev/pci/pciide.c ps->regs[chp->channel].ctl_ioh, reg & _WDC_REGMASK, val);
chp 6741 dev/pci/pciide.c bus_space_write_1(ps->regs[chp->channel].cmd_iot,
chp 6742 dev/pci/pciide.c ps->regs[chp->channel].cmd_iohs[reg & _WDC_REGMASK],
chp 6747 dev/pci/pciide.c pdc205xx_do_reset(struct channel_softc *chp)
chp 6749 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 6754 dev/pci/pciide.c wdc_do_reset(chp);
chp 6758 dev/pci/pciide.c SCONTROL_WRITE(ps, chp->channel, scontrol);
chp 6762 dev/pci/pciide.c SCONTROL_WRITE(ps, chp->channel, scontrol);
chp 6767 dev/pci/pciide.c pdc205xx_drv_probe(struct channel_softc *chp)
chp 6769 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 6779 dev/pci/pciide.c chp->ch_drive[i].chnl_softc = chp;
chp 6780 dev/pci/pciide.c chp->ch_drive[i].drive = i;
chp 6783 dev/pci/pciide.c SCONTROL_WRITE(ps, chp->channel, 0);
chp 6787 dev/pci/pciide.c SCONTROL_WRITE(ps,chp->channel,scontrol);
chp 6791 dev/pci/pciide.c SCONTROL_WRITE(ps,chp->channel,scontrol);
chp 6794 dev/pci/pciide.c sstatus = SSTATUS_READ(ps,chp->channel);
chp 6804 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
chp 6809 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
chp 6813 dev/pci/pciide.c iohs = ps->regs[chp->channel].cmd_iohs;
chp 6814 dev/pci/pciide.c bus_space_write_1(chp->cmd_iot, iohs[wdr_sdh], 0,
chp 6817 dev/pci/pciide.c scnt = bus_space_read_2(chp->cmd_iot, iohs[wdr_seccnt], 0);
chp 6818 dev/pci/pciide.c sn = bus_space_read_2(chp->cmd_iot, iohs[wdr_sector], 0);
chp 6819 dev/pci/pciide.c cl = bus_space_read_2(chp->cmd_iot, iohs[wdr_cyl_lo], 0);
chp 6820 dev/pci/pciide.c ch = bus_space_read_2(chp->cmd_iot, iohs[wdr_cyl_hi], 0);
chp 6823 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel,
chp 6832 dev/pci/pciide.c chp->ch_drive[0].drive_flags |= DRIVE_ATAPI;
chp 6834 dev/pci/pciide.c chp->ch_drive[0].drive_flags |= DRIVE_ATA;
chp 6838 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
chp 6853 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel, sstatus);
chp 6868 dev/pci/pciide.c opti_read_config(struct channel_softc *chp, int reg)
chp 6874 dev/pci/pciide.c (void) bus_space_read_2(chp->cmd_iot, chp->cmd_ioh, wdr_features);
chp 6875 dev/pci/pciide.c (void) bus_space_read_2(chp->cmd_iot, chp->cmd_ioh, wdr_features);
chp 6878 dev/pci/pciide.c bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wdr_seccnt, 0x03u);
chp 6881 dev/pci/pciide.c rv = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, reg);
chp 6884 dev/pci/pciide.c bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wdr_seccnt, 0x83u);
chp 6892 dev/pci/pciide.c opti_write_config(struct channel_softc *chp, int reg, u_int8_t val)
chp 6897 dev/pci/pciide.c (void) bus_space_read_2(chp->cmd_iot, chp->cmd_ioh, wdr_features);
chp 6898 dev/pci/pciide.c (void) bus_space_read_2(chp->cmd_iot, chp->cmd_ioh, wdr_features);
chp 6901 dev/pci/pciide.c bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wdr_seccnt, 0x03u);
chp 6904 dev/pci/pciide.c bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, reg, val);
chp 6907 dev/pci/pciide.c bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wdr_seccnt, 0x83u);
chp 6982 dev/pci/pciide.c opti_setup_channel(struct channel_softc *chp)
chp 6985 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 6995 dev/pci/pciide.c mr = opti_read_config(chp, OPTI_REG_MISC) & ~OPTI_MISC_INDEX_MASK;
chp 7001 dev/pci/pciide.c opti_write_config(chp, OPTI_REG_CONTROL, OPTI_CONTROL_DISABLE);
chp 7004 dev/pci/pciide.c spd = (int) opti_read_config(chp, OPTI_REG_STRAP);
chp 7011 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 7046 dev/pci/pciide.c chp->ch_drive[d].PIO_mode = chp->ch_drive[1-d].PIO_mode;
chp 7047 dev/pci/pciide.c chp->ch_drive[d].DMA_mode = 0;
chp 7048 dev/pci/pciide.c chp->ch_drive[d].drive_flags &= DRIVE_DMA;
chp 7060 dev/pci/pciide.c opti_write_config(chp, OPTI_REG_MISC, mr | rv);
chp 7065 dev/pci/pciide.c opti_write_config(chp, OPTI_REG_READ_CYCLE_TIMING, rv);
chp 7066 dev/pci/pciide.c opti_write_config(chp, OPTI_REG_WRITE_CYCLE_TIMING, rv);
chp 7070 dev/pci/pciide.c rv &= ~OPTI_ENH_MODE_MASK(chp->channel, drive);
chp 7071 dev/pci/pciide.c rv |= OPTI_ENH_MODE(chp->channel, drive, opti_tim_em[m]);
chp 7076 dev/pci/pciide.c opti_write_config(chp, OPTI_REG_CONTROL, OPTI_CONTROL_ENABLE);
chp 7147 dev/pci/pciide.c serverworks_setup_channel(struct channel_softc *chp)
chp 7150 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 7152 dev/pci/pciide.c int channel = chp->channel;
chp 7177 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 7185 dev/pci/pciide.c if ((chp->wdc->cap & WDC_CAPABILITY_UDMA) &&
chp 7202 dev/pci/pciide.c } else if ((chp->wdc->cap & WDC_CAPABILITY_DMA) &&
chp 7429 dev/pci/pciide.c svwsata_drv_probe(struct channel_softc *chp)
chp 7431 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 7434 dev/pci/pciide.c int channel = chp->channel;
chp 7441 dev/pci/pciide.c chp->ch_drive[i].chnl_softc = chp;
chp 7442 dev/pci/pciide.c chp->ch_drive[i].drive = i;
chp 7469 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel, sstatus,
chp 7481 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
chp 7486 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
chp 7496 dev/pci/pciide.c if (chp->_vtbl != NULL)
chp 7497 dev/pci/pciide.c CHP_WRITE_REG(chp, wdr_sdh, WDSD_IBM | (0 << 4));
chp 7499 dev/pci/pciide.c bus_space_write_1(chp->cmd_iot, chp->cmd_ioh,
chp 7503 dev/pci/pciide.c if (chp->_vtbl != NULL) {
chp 7504 dev/pci/pciide.c scnt = CHP_READ_REG(chp, wdr_seccnt);
chp 7505 dev/pci/pciide.c sn = CHP_READ_REG(chp, wdr_sector);
chp 7506 dev/pci/pciide.c cl = CHP_READ_REG(chp, wdr_cyl_lo);
chp 7507 dev/pci/pciide.c ch = CHP_READ_REG(chp, wdr_cyl_hi);
chp 7509 dev/pci/pciide.c scnt = bus_space_read_1(chp->cmd_iot,
chp 7510 dev/pci/pciide.c chp->cmd_ioh, wdr_seccnt & _WDC_REGMASK);
chp 7511 dev/pci/pciide.c sn = bus_space_read_1(chp->cmd_iot,
chp 7512 dev/pci/pciide.c chp->cmd_ioh, wdr_sector & _WDC_REGMASK);
chp 7513 dev/pci/pciide.c cl = bus_space_read_1(chp->cmd_iot,
chp 7514 dev/pci/pciide.c chp->cmd_ioh, wdr_cyl_lo & _WDC_REGMASK);
chp 7515 dev/pci/pciide.c ch = bus_space_read_1(chp->cmd_iot,
chp 7516 dev/pci/pciide.c chp->cmd_ioh, wdr_cyl_hi & _WDC_REGMASK);
chp 7520 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel,
chp 7529 dev/pci/pciide.c chp->ch_drive[0].drive_flags |= DRIVE_ATAPI;
chp 7531 dev/pci/pciide.c chp->ch_drive[0].drive_flags |= DRIVE_ATA;
chp 7535 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel);
chp 7549 dev/pci/pciide.c sc->sc_wdcdev.sc_dev.dv_xname, chp->channel, sstatus);
chp 7554 dev/pci/pciide.c svwsata_read_reg(struct channel_softc *chp, enum wdc_regs reg)
chp 7557 dev/pci/pciide.c return (bus_space_read_4(chp->ctl_iot, chp->ctl_ioh,
chp 7560 dev/pci/pciide.c return (bus_space_read_4(chp->cmd_iot, chp->cmd_ioh,
chp 7566 dev/pci/pciide.c svwsata_write_reg(struct channel_softc *chp, enum wdc_regs reg, u_int8_t val)
chp 7569 dev/pci/pciide.c bus_space_write_4(chp->ctl_iot, chp->ctl_ioh,
chp 7572 dev/pci/pciide.c bus_space_write_4(chp->cmd_iot, chp->cmd_ioh,
chp 7578 dev/pci/pciide.c svwsata_lba48_write_reg(struct channel_softc *chp, enum wdc_regs reg, u_int16_t val)
chp 7581 dev/pci/pciide.c bus_space_write_4(chp->ctl_iot, chp->ctl_ioh,
chp 7584 dev/pci/pciide.c bus_space_write_4(chp->cmd_iot, chp->cmd_ioh,
chp 7669 dev/pci/pciide.c acard_setup_channel(struct channel_softc *chp)
chp 7672 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 7674 dev/pci/pciide.c int channel = chp->channel;
chp 7697 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 7702 dev/pci/pciide.c if ((chp->wdc->cap & WDC_CAPABILITY_UDMA) &&
chp 7719 dev/pci/pciide.c } else if ((chp->wdc->cap & WDC_CAPABILITY_DMA) &&
chp 7842 dev/pci/pciide.c nforce_setup_channel(struct channel_softc *chp)
chp 7847 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 7849 dev/pci/pciide.c int channel = chp->channel;
chp 7870 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 7876 dev/pci/pciide.c if ((chp->wdc->cap & WDC_CAPABILITY_UDMA) != 0 &&
chp 7887 dev/pci/pciide.c } else if ((chp->wdc->cap & WDC_CAPABILITY_DMA) != 0 &&
chp 8084 dev/pci/pciide.c ite_setup_channel(struct channel_softc *chp)
chp 8089 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 8091 dev/pci/pciide.c int channel = chp->channel;
chp 8109 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 8115 dev/pci/pciide.c if ((chp->wdc->cap & WDC_CAPABILITY_UDMA) != 0 &&
chp 8140 dev/pci/pciide.c } else if ((chp->wdc->cap & WDC_CAPABILITY_DMA) != 0 &&
chp 8234 dev/pci/pciide.c ixp_setup_channel(struct channel_softc *chp)
chp 8239 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel*)chp;
chp 8241 dev/pci/pciide.c int channel = chp->channel;
chp 8256 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 8261 dev/pci/pciide.c if ((chp->wdc->cap & WDC_CAPABILITY_UDMA) != 0 &&
chp 8265 dev/pci/pciide.c IXP_UDMA_ENABLE(udma, chp->channel, drive);
chp 8266 dev/pci/pciide.c IXP_SET_MODE(udma, chp->channel, drive,
chp 8269 dev/pci/pciide.c } else if ((chp->wdc->cap & WDC_CAPABILITY_DMA) != 0 &&
chp 8274 dev/pci/pciide.c IXP_UDMA_DISABLE(udma, chp->channel, drive);
chp 8275 dev/pci/pciide.c IXP_SET_TIMING(mdma_timing, chp->channel, drive,
chp 8300 dev/pci/pciide.c IXP_SET_MODE(pio, chp->channel, drive, drvp->PIO_mode);
chp 8301 dev/pci/pciide.c IXP_SET_TIMING(pio_timing, chp->channel, drive,
chp 8389 dev/pci/pciide.c jmicron_setup_channel(struct channel_softc *chp)
chp 8394 dev/pci/pciide.c struct pciide_channel *cp = (struct pciide_channel *)chp;
chp 8396 dev/pci/pciide.c int channel = chp->channel;
chp 8409 dev/pci/pciide.c drvp = &chp->ch_drive[drive];
chp 8415 dev/pci/pciide.c if ((chp->wdc->cap & WDC_CAPABILITY_UDMA) != 0 &&
chp 8426 dev/pci/pciide.c } else if ((chp->wdc->cap & WDC_CAPABILITY_DMA) != 0 &&